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authorLinus Torvalds <torvalds@linux-foundation.org>2012-12-11 16:59:44 -0500
committerLinus Torvalds <torvalds@linux-foundation.org>2012-12-11 16:59:44 -0500
commit8966961b31c251b854169e9886394c2a20f2cea7 (patch)
tree248a625b23335acbd5ca4b55eb136fe0dc8ba0aa /drivers
parent6a5971d8fea1f4a8c33dfe0cec6a1c490f0c9cde (diff)
parent7bcb57cde66c19df378f3468ea342166a8a4504d (diff)
Merge tag 'staging-3.8-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/gregkh/staging
Pull staging driver tree merge from Greg Kroah-Hartman: "Here's the big staging tree merge for 3.8-rc1 There's a lot of patches in here, the majority being the comedi rework/cleanup that has been ongoing and is causing a huge reduction in overall code size, which is amazing to watch. We also removed some older drivers (telephony and rts_pstor), and added a new one (fwserial which also came in through the tty tree due to tty api changes, take that one if you get merge conflicts.) The iio and ipack drivers are moving out of the staging area into their own part of the kernel as they have been cleaned up sufficiently and are working well. Overall, again a reduction of code: 768 files changed, 31887 insertions(+), 82166 deletions(-) All of this has been in the linux-next tree for a while. Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>" * tag 'staging-3.8-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/gregkh/staging: (1298 commits) iio: imu: adis16480: remove duplicated include from adis16480.c iio: gyro: adis16136: remove duplicated include from adis16136.c iio:imu: adis16480: show_firmware() buffer too small iio:gyro: adis16136: divide by zero in write_frequency() iio: adc: Add Texas Instruments ADC081C021/027 support iio:ad7793: Add support for the ad7796 and ad7797 iio:ad7793: Add support for the ad7798 and ad7799 staging:iio: Move ad7793 driver out of staging staging:iio:ad7793: Implement stricter id checking staging:iio:ad7793: Move register definitions from header to source staging:iio:ad7793: Rework regulator handling staging:iio:ad7793: Rework platform data staging:iio:ad7793: Use kstrtol instead of strict_strtol staging:iio:ad7793: Use usleep_range instead of msleep staging:iio:ad7793: Fix temperature scale staging:iio:ad7793: Fix VDD monitor scale staging: gdm72xx: unlock on error in init_usb() staging: panel: pass correct lengths to keypad_send_key() staging: comedi: addi_apci_2032: fix interrupt support staging: comedi: addi_apci_2032: move i_APCI2032_ConfigDigitalOutput() ...
Diffstat (limited to 'drivers')
-rw-r--r--drivers/Kconfig2
-rw-r--r--drivers/Makefile1
-rw-r--r--drivers/iio/Kconfig13
-rw-r--r--drivers/iio/Makefile8
-rw-r--r--drivers/iio/accel/Kconfig2
-rw-r--r--drivers/iio/accel/hid-sensor-accel-3d.c21
-rw-r--r--drivers/iio/adc/Kconfig65
-rw-r--r--drivers/iio/adc/Makefile6
-rw-r--r--drivers/iio/adc/ad7266.c3
-rw-r--r--drivers/iio/adc/ad7298.c (renamed from drivers/staging/iio/adc/ad7298_core.c)201
-rw-r--r--drivers/iio/adc/ad7476.c2
-rw-r--r--drivers/iio/adc/ad7793.c (renamed from drivers/staging/iio/adc/ad7793.c)390
-rw-r--r--drivers/iio/adc/ad7887.c (renamed from drivers/staging/iio/adc/ad7887_core.c)217
-rw-r--r--drivers/iio/adc/ad_sigma_delta.c2
-rw-r--r--drivers/iio/adc/at91_adc.c6
-rw-r--r--drivers/iio/adc/max1363.c (renamed from drivers/staging/iio/adc/max1363_core.c)330
-rw-r--r--drivers/iio/adc/ti-adc081c.c161
-rw-r--r--drivers/iio/buffer_cb.c113
-rw-r--r--drivers/iio/common/hid-sensors/Kconfig2
-rw-r--r--drivers/iio/common/hid-sensors/hid-sensor-trigger.c6
-rw-r--r--drivers/iio/dac/Kconfig12
-rw-r--r--drivers/iio/dac/Makefile1
-rw-r--r--drivers/iio/dac/ad5449.c376
-rw-r--r--drivers/iio/dac/ad5686.c2
-rw-r--r--drivers/iio/gyro/Kconfig9
-rw-r--r--drivers/iio/gyro/Makefile1
-rw-r--r--drivers/iio/gyro/adis16136.c580
-rw-r--r--drivers/iio/gyro/hid-sensor-gyro-3d.c21
-rw-r--r--drivers/iio/imu/Kconfig27
-rw-r--r--drivers/iio/imu/Makefile10
-rw-r--r--drivers/iio/imu/adis.c440
-rw-r--r--drivers/iio/imu/adis16480.c924
-rw-r--r--drivers/iio/imu/adis_buffer.c176
-rw-r--r--drivers/iio/imu/adis_trigger.c89
-rw-r--r--drivers/iio/industrialio-buffer.c386
-rw-r--r--drivers/iio/industrialio-core.c105
-rw-r--r--drivers/iio/industrialio-event.c11
-rw-r--r--drivers/iio/inkern.c6
-rw-r--r--drivers/iio/light/adjd_s311.c3
-rw-r--r--drivers/iio/light/hid-sensor-als.c20
-rw-r--r--drivers/iio/magnetometer/hid-sensor-magn-3d.c21
-rw-r--r--drivers/ipack/Kconfig24
-rw-r--r--drivers/ipack/Makefile (renamed from drivers/staging/ipack/Makefile)2
-rw-r--r--drivers/ipack/carriers/Kconfig7
-rw-r--r--drivers/ipack/carriers/Makefile (renamed from drivers/staging/ipack/bridges/Makefile)0
-rw-r--r--drivers/ipack/carriers/tpci200.c (renamed from drivers/staging/ipack/bridges/tpci200.c)321
-rw-r--r--drivers/ipack/carriers/tpci200.h (renamed from drivers/staging/ipack/bridges/tpci200.h)33
-rw-r--r--drivers/ipack/devices/Kconfig (renamed from drivers/staging/ipack/devices/Kconfig)1
-rw-r--r--drivers/ipack/devices/Makefile (renamed from drivers/staging/ipack/devices/Makefile)0
-rw-r--r--drivers/ipack/devices/ipoctal.c (renamed from drivers/staging/ipack/devices/ipoctal.c)127
-rw-r--r--drivers/ipack/devices/ipoctal.h (renamed from drivers/staging/ipack/devices/ipoctal.h)7
-rw-r--r--drivers/ipack/devices/scc2698.h (renamed from drivers/staging/ipack/devices/scc2698.h)7
-rw-r--r--drivers/ipack/ipack.c (renamed from drivers/staging/ipack/ipack.c)64
-rw-r--r--drivers/staging/Kconfig8
-rw-r--r--drivers/staging/Makefile4
-rw-r--r--drivers/staging/android/Makefile2
-rw-r--r--drivers/staging/android/binder.c471
-rw-r--r--drivers/staging/android/binder_trace.h327
-rw-r--r--drivers/staging/android/logger.c21
-rw-r--r--drivers/staging/bcm/Adapter.h8
-rw-r--r--drivers/staging/bcm/Bcmchar.c149
-rw-r--r--drivers/staging/bcm/Bcmnet.c6
-rw-r--r--drivers/staging/bcm/CmHost.c90
-rw-r--r--drivers/staging/bcm/CmHost.h189
-rw-r--r--drivers/staging/bcm/HandleControlPacket.c2
-rw-r--r--drivers/staging/bcm/HostMIBSInterface.h384
-rw-r--r--drivers/staging/bcm/InterfaceAdapter.h142
-rw-r--r--drivers/staging/bcm/InterfaceDld.c4
-rw-r--r--drivers/staging/bcm/InterfaceIdleMode.c2
-rw-r--r--drivers/staging/bcm/InterfaceIdleMode.h5
-rw-r--r--drivers/staging/bcm/InterfaceInit.c25
-rw-r--r--drivers/staging/bcm/InterfaceInit.h4
-rw-r--r--drivers/staging/bcm/InterfaceIsr.c6
-rw-r--r--drivers/staging/bcm/InterfaceIsr.h4
-rw-r--r--drivers/staging/bcm/InterfaceMisc.c124
-rw-r--r--drivers/staging/bcm/InterfaceMisc.h6
-rw-r--r--drivers/staging/bcm/InterfaceRx.c16
-rw-r--r--drivers/staging/bcm/InterfaceRx.h2
-rw-r--r--drivers/staging/bcm/InterfaceTx.c14
-rw-r--r--drivers/staging/bcm/Ioctl.h482
-rw-r--r--drivers/staging/bcm/LeakyBucket.c6
-rw-r--r--drivers/staging/bcm/Misc.c236
-rw-r--r--drivers/staging/bcm/Prototypes.h36
-rw-r--r--drivers/staging/bcm/Transmit.c2
-rw-r--r--drivers/staging/bcm/cntrl_SignalingInterface.h256
-rw-r--r--drivers/staging/bcm/hostmibs.c12
-rw-r--r--drivers/staging/bcm/nvm.c94
-rw-r--r--drivers/staging/bcm/vendorspecificextn.c6
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-rw-r--r--drivers/staging/ccg/ccg.c8
-rw-r--r--drivers/staging/ced1401/ced_ioc.c37
-rw-r--r--drivers/staging/ced1401/usb1401.c36
-rw-r--r--drivers/staging/ced1401/usb1401.h2
-rw-r--r--drivers/staging/ced1401/userspace/use1401.c8
-rw-r--r--drivers/staging/comedi/Kconfig45
-rw-r--r--drivers/staging/comedi/comedi.h65
-rw-r--r--drivers/staging/comedi/comedi_compat32.c1
-rw-r--r--drivers/staging/comedi/comedi_fops.c5
-rw-r--r--drivers/staging/comedi/comedidev.h70
-rw-r--r--drivers/staging/comedi/drivers.c144
-rw-r--r--drivers/staging/comedi/drivers/8255.c27
-rw-r--r--drivers/staging/comedi/drivers/8255_pci.c26
-rw-r--r--drivers/staging/comedi/drivers/Makefile2
-rw-r--r--drivers/staging/comedi/drivers/addi-data/APCI1710_82x54.c205
-rw-r--r--drivers/staging/comedi/drivers/addi-data/APCI1710_82x54.h73
-rw-r--r--drivers/staging/comedi/drivers/addi-data/APCI1710_Chrono.c245
-rw-r--r--drivers/staging/comedi/drivers/addi-data/APCI1710_Chrono.h74
-rw-r--r--drivers/staging/comedi/drivers/addi-data/APCI1710_Dig_io.c44
-rw-r--r--drivers/staging/comedi/drivers/addi-data/APCI1710_Dig_io.h46
-rw-r--r--drivers/staging/comedi/drivers/addi-data/APCI1710_INCCPT.c886
-rw-r--r--drivers/staging/comedi/drivers/addi-data/APCI1710_INCCPT.h271
-rw-r--r--drivers/staging/comedi/drivers/addi-data/APCI1710_Inp_cpt.c39
-rw-r--r--drivers/staging/comedi/drivers/addi-data/APCI1710_Inp_cpt.h47
-rw-r--r--drivers/staging/comedi/drivers/addi-data/APCI1710_Pwm.c278
-rw-r--r--drivers/staging/comedi/drivers/addi-data/APCI1710_Pwm.h76
-rw-r--r--drivers/staging/comedi/drivers/addi-data/APCI1710_Ssi.c41
-rw-r--r--drivers/staging/comedi/drivers/addi-data/APCI1710_Ssi.h43
-rw-r--r--drivers/staging/comedi/drivers/addi-data/APCI1710_Tor.c50
-rw-r--r--drivers/staging/comedi/drivers/addi-data/APCI1710_Tor.h57
-rw-r--r--drivers/staging/comedi/drivers/addi-data/APCI1710_Ttl.c38
-rw-r--r--drivers/staging/comedi/drivers/addi-data/APCI1710_Ttl.h44
-rw-r--r--drivers/staging/comedi/drivers/addi-data/addi_amcc_s5933.h469
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-rw-r--r--drivers/staging/comedi/drivers/addi-data/addi_eeprom.c1367
-rw-r--r--drivers/staging/comedi/drivers/addi-data/hwdrv_APCI1710.c69
-rw-r--r--drivers/staging/comedi/drivers/addi-data/hwdrv_APCI1710.h71
-rw-r--r--drivers/staging/comedi/drivers/addi-data/hwdrv_apci035.c116
-rw-r--r--drivers/staging/comedi/drivers/addi-data/hwdrv_apci035.h109
-rw-r--r--drivers/staging/comedi/drivers/addi-data/hwdrv_apci1032.c287
-rw-r--r--drivers/staging/comedi/drivers/addi-data/hwdrv_apci1032.h64
-rw-r--r--drivers/staging/comedi/drivers/addi-data/hwdrv_apci1500.c197
-rw-r--r--drivers/staging/comedi/drivers/addi-data/hwdrv_apci1500.h165
-rw-r--r--drivers/staging/comedi/drivers/addi-data/hwdrv_apci1516.c542
-rw-r--r--drivers/staging/comedi/drivers/addi-data/hwdrv_apci1516.h65
-rw-r--r--drivers/staging/comedi/drivers/addi-data/hwdrv_apci1564.c469
-rw-r--r--drivers/staging/comedi/drivers/addi-data/hwdrv_apci1564.h121
-rw-r--r--drivers/staging/comedi/drivers/addi-data/hwdrv_apci16xx.c57
-rw-r--r--drivers/staging/comedi/drivers/addi-data/hwdrv_apci16xx.h79
-rw-r--r--drivers/staging/comedi/drivers/addi-data/hwdrv_apci2016.c460
-rw-r--r--drivers/staging/comedi/drivers/addi-data/hwdrv_apci2016.h72
-rw-r--r--drivers/staging/comedi/drivers/addi-data/hwdrv_apci2032.c579
-rw-r--r--drivers/staging/comedi/drivers/addi-data/hwdrv_apci2032.h83
-rw-r--r--drivers/staging/comedi/drivers/addi-data/hwdrv_apci2200.c392
-rw-r--r--drivers/staging/comedi/drivers/addi-data/hwdrv_apci2200.h61
-rw-r--r--drivers/staging/comedi/drivers/addi-data/hwdrv_apci3120.c1704
-rw-r--r--drivers/staging/comedi/drivers/addi-data/hwdrv_apci3120.h249
-rw-r--r--drivers/staging/comedi/drivers/addi-data/hwdrv_apci3200.c2777
-rw-r--r--drivers/staging/comedi/drivers/addi-data/hwdrv_apci3200.h191
-rw-r--r--drivers/staging/comedi/drivers/addi-data/hwdrv_apci3501.c320
-rw-r--r--drivers/staging/comedi/drivers/addi-data/hwdrv_apci3501.h98
-rw-r--r--drivers/staging/comedi/drivers/addi-data/hwdrv_apci3xxx.c414
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-rw-r--r--drivers/staging/line6/variax.c484
-rw-r--r--drivers/staging/line6/variax.h60
-rw-r--r--drivers/staging/media/dt3155v4l/dt3155v4l.c12
-rw-r--r--drivers/staging/media/lirc/lirc_parallel.c6
-rw-r--r--drivers/staging/media/lirc/lirc_serial.c6
-rw-r--r--drivers/staging/media/lirc/lirc_sir.c6
-rw-r--r--drivers/staging/media/solo6x10/core.c4
-rw-r--r--drivers/staging/net/pc300_drv.c6
-rw-r--r--drivers/staging/nvec/Kconfig1
-rw-r--r--drivers/staging/nvec/nvec.c8
-rw-r--r--drivers/staging/nvec/nvec_kbd.c6
-rw-r--r--drivers/staging/nvec/nvec_paz00.c6
-rw-r--r--drivers/staging/nvec/nvec_power.c6
-rw-r--r--drivers/staging/nvec/nvec_ps2.c6
-rw-r--r--drivers/staging/octeon/ethernet.c12
-rw-r--r--drivers/staging/olpc_dcon/olpc_dcon.c85
-rw-r--r--drivers/staging/olpc_dcon/olpc_dcon.h2
-rw-r--r--drivers/staging/olpc_dcon/olpc_dcon_xo_1_5.c30
-rw-r--r--drivers/staging/omap-thermal/omap-bandgap.c67
-rw-r--r--drivers/staging/omap-thermal/omap-bandgap.h9
-rw-r--r--drivers/staging/omap-thermal/omap-thermal-common.c69
-rw-r--r--drivers/staging/omapdrm/Kconfig2
-rw-r--r--drivers/staging/omapdrm/omap_connector.c8
-rw-r--r--drivers/staging/omapdrm/omap_crtc.c8
-rw-r--r--drivers/staging/omapdrm/omap_dmm_priv.h9
-rw-r--r--drivers/staging/omapdrm/omap_dmm_tiler.c108
-rw-r--r--drivers/staging/omapdrm/omap_dmm_tiler.h8
-rw-r--r--drivers/staging/omapdrm/omap_drv.c73
-rw-r--r--drivers/staging/omapdrm/omap_drv.h14
-rw-r--r--drivers/staging/omapdrm/omap_encoder.c7
-rw-r--r--drivers/staging/omapdrm/omap_fb.c25
-rw-r--r--drivers/staging/omapdrm/omap_gem.c46
-rw-r--r--drivers/staging/omapdrm/omap_gem_dmabuf.c4
-rw-r--r--drivers/staging/omapdrm/omap_gem_helpers.c6
-rw-r--r--drivers/staging/omapdrm/omap_plane.c42
-rw-r--r--drivers/staging/ozwpan/ozevent.c2
-rw-r--r--drivers/staging/ozwpan/ozhcd.c7
-rw-r--r--drivers/staging/ozwpan/ozpd.c6
-rw-r--r--drivers/staging/ozwpan/ozproto.c3
-rw-r--r--drivers/staging/panel/panel.c8
-rw-r--r--drivers/staging/rtl8187se/ieee80211/ieee80211.h6
-rw-r--r--drivers/staging/rtl8187se/ieee80211/ieee80211_crypt.c24
-rw-r--r--drivers/staging/rtl8187se/ieee80211/ieee80211_crypt.h2
-rw-r--r--drivers/staging/rtl8187se/ieee80211/ieee80211_crypt_ccmp.c38
-rw-r--r--drivers/staging/rtl8187se/ieee80211/ieee80211_crypt_wep.c18
-rw-r--r--drivers/staging/rtl8187se/ieee80211/ieee80211_module.c23
-rw-r--r--drivers/staging/rtl8187se/ieee80211/ieee80211_rx.c321
-rw-r--r--drivers/staging/rtl8187se/ieee80211/ieee80211_softmac_wx.c121
-rw-r--r--drivers/staging/rtl8187se/r8180.h28
-rw-r--r--drivers/staging/rtl8187se/r8180_core.c496
-rw-r--r--drivers/staging/rtl8187se/r8180_dm.h4
-rw-r--r--drivers/staging/rtl8187se/r8180_rtl8225.h4
-rw-r--r--drivers/staging/rtl8187se/r8180_rtl8225z2.c229
-rw-r--r--drivers/staging/rtl8187se/r8180_wx.c2
-rw-r--r--drivers/staging/rtl8187se/r8185b_init.c239
-rw-r--r--drivers/staging/rtl8192e/rtl8192e/rtl_core.c15
-rw-r--r--drivers/staging/rtl8192e/rtllib.h6
-rw-r--r--drivers/staging/rtl8192e/rtllib_tx.c2
-rw-r--r--drivers/staging/rtl8192u/ieee80211/ieee80211.h5
-rw-r--r--drivers/staging/rtl8192u/r8192U_core.c8
-rw-r--r--drivers/staging/rtl8712/mlme_linux.c2
-rw-r--r--drivers/staging/rtl8712/rtl871x_cmd.c4
-rw-r--r--drivers/staging/rtl8712/rtl871x_ioctl_linux.c4
-rw-r--r--drivers/staging/rts5139/Makefile22
-rw-r--r--drivers/staging/rts5139/ms.c96
-rw-r--r--drivers/staging/rts5139/ms.h18
-rw-r--r--drivers/staging/rts5139/ms_mg.c104
-rw-r--r--drivers/staging/rts5139/ms_mg.h14
-rw-r--r--drivers/staging/rts5139/rts51x.c10
-rw-r--r--drivers/staging/rts5139/rts51x_card.c80
-rw-r--r--drivers/staging/rts5139/rts51x_card.h30
-rw-r--r--drivers/staging/rts5139/rts51x_chip.c24
-rw-r--r--drivers/staging/rts5139/rts51x_chip.h16
-rw-r--r--drivers/staging/rts5139/rts51x_fop.c6
-rw-r--r--drivers/staging/rts5139/rts51x_scsi.c238
-rw-r--r--drivers/staging/rts5139/rts51x_scsi.h6
-rw-r--r--drivers/staging/rts5139/sd.c36
-rw-r--r--drivers/staging/rts5139/sd.h12
-rw-r--r--drivers/staging/rts5139/sd_cprm.c124
-rw-r--r--drivers/staging/rts5139/sd_cprm.h18
-rw-r--r--drivers/staging/rts5139/xd.c58
-rw-r--r--drivers/staging/rts5139/xd.h10
-rw-r--r--drivers/staging/rts_pstor/Kconfig16
-rw-r--r--drivers/staging/rts_pstor/Makefile16
-rw-r--r--drivers/staging/rts_pstor/TODO9
-rw-r--r--drivers/staging/rts_pstor/debug.h43
-rw-r--r--drivers/staging/rts_pstor/general.c35
-rw-r--r--drivers/staging/rts_pstor/general.h31
-rw-r--r--drivers/staging/rts_pstor/ms.c4051
-rw-r--r--drivers/staging/rts_pstor/ms.h225
-rw-r--r--drivers/staging/rts_pstor/rtsx.c1105
-rw-r--r--drivers/staging/rts_pstor/rtsx.h186
-rw-r--r--drivers/staging/rts_pstor/rtsx_card.c1233
-rw-r--r--drivers/staging/rts_pstor/rtsx_card.h1093
-rw-r--r--drivers/staging/rts_pstor/rtsx_chip.c2264
-rw-r--r--drivers/staging/rts_pstor/rtsx_chip.h989
-rw-r--r--drivers/staging/rts_pstor/rtsx_scsi.c3137
-rw-r--r--drivers/staging/rts_pstor/rtsx_scsi.h142
-rw-r--r--drivers/staging/rts_pstor/rtsx_sys.h50
-rw-r--r--drivers/staging/rts_pstor/rtsx_transport.c769
-rw-r--r--drivers/staging/rts_pstor/rtsx_transport.h66
-rw-r--r--drivers/staging/rts_pstor/sd.c4570
-rw-r--r--drivers/staging/rts_pstor/sd.h300
-rw-r--r--drivers/staging/rts_pstor/spi.c812
-rw-r--r--drivers/staging/rts_pstor/spi.h65
-rw-r--r--drivers/staging/rts_pstor/trace.h93
-rw-r--r--drivers/staging/rts_pstor/xd.c2052
-rw-r--r--drivers/staging/rts_pstor/xd.h188
-rw-r--r--drivers/staging/sbe-2t3e3/cpld.c2
-rw-r--r--drivers/staging/sbe-2t3e3/main.c7
-rw-r--r--drivers/staging/sbe-2t3e3/module.c19
-rw-r--r--drivers/staging/sbe-2t3e3/netdev.c5
-rw-r--r--drivers/staging/sep/sep_main.c6
-rw-r--r--drivers/staging/serqt_usb2/serqt_usb2.c287
-rw-r--r--drivers/staging/silicom/bp_mod.c219
-rw-r--r--drivers/staging/silicom/bp_proc.c85
-rw-r--r--drivers/staging/silicom/bypasslib/bplibk.h9
-rw-r--r--drivers/staging/silicom/bypasslib/bypass.c1
-rw-r--r--drivers/staging/slicoss/slicoss.c166
-rw-r--r--drivers/staging/sm7xxfb/sm7xxfb.c6
-rw-r--r--drivers/staging/ste_rmi4/synaptics_i2c_rmi4.c106
-rw-r--r--drivers/staging/telephony/Kconfig47
-rw-r--r--drivers/staging/telephony/Makefile7
-rw-r--r--drivers/staging/telephony/TODO10
-rw-r--r--drivers/staging/telephony/ixj-ver.h4
-rw-r--r--drivers/staging/telephony/ixj.c10571
-rw-r--r--drivers/staging/telephony/ixj.h1322
-rw-r--r--drivers/staging/telephony/ixj_pcmcia.c187
-rw-r--r--drivers/staging/telephony/phonedev.c166
-rw-r--r--drivers/staging/tidspbridge/dynload/dload_internal.h8
-rw-r--r--drivers/staging/tidspbridge/dynload/reloc.c6
-rw-r--r--drivers/staging/tidspbridge/rmgr/drv_interface.c6
-rw-r--r--drivers/staging/usbip/stub_dev.c15
-rw-r--r--drivers/staging/usbip/stub_rx.c5
-rw-r--r--drivers/staging/usbip/stub_tx.c3
-rw-r--r--drivers/staging/usbip/usbip_common.c40
-rw-r--r--drivers/staging/usbip/usbip_common.h4
-rw-r--r--drivers/staging/usbip/userspace/src/usbip_detach.c9
-rw-r--r--drivers/staging/usbip/vhci.h1
-rw-r--r--drivers/staging/usbip/vhci_hcd.c51
-rw-r--r--drivers/staging/usbip/vhci_rx.c2
-rw-r--r--drivers/staging/usbip/vhci_sysfs.c6
-rw-r--r--drivers/staging/usbip/vhci_tx.c2
-rw-r--r--drivers/staging/vme/devices/vme_pio2.h2
-rw-r--r--drivers/staging/vme/devices/vme_pio2_core.c10
-rw-r--r--drivers/staging/vme/devices/vme_pio2_gpio.c2
-rw-r--r--drivers/staging/vme/devices/vme_user.c83
-rw-r--r--drivers/staging/vt6655/device_main.c6
-rw-r--r--drivers/staging/vt6655/hostap.c6
-rw-r--r--drivers/staging/vt6655/rxtx.c2
-rw-r--r--drivers/staging/vt6655/wcmd.c1
-rw-r--r--drivers/staging/vt6656/80211mgr.c2
-rw-r--r--drivers/staging/vt6656/Makefile1
-rw-r--r--drivers/staging/vt6656/bssdb.c43
-rw-r--r--drivers/staging/vt6656/desc.h28
-rw-r--r--drivers/staging/vt6656/device.h48
-rw-r--r--drivers/staging/vt6656/dpc.c64
-rw-r--r--drivers/staging/vt6656/firmware.c22
-rw-r--r--drivers/staging/vt6656/hostap.c6
-rw-r--r--drivers/staging/vt6656/int.h4
-rw-r--r--drivers/staging/vt6656/ioctl.c648
-rw-r--r--drivers/staging/vt6656/ioctl.h54
-rw-r--r--drivers/staging/vt6656/iwctl.c510
-rw-r--r--drivers/staging/vt6656/iwctl.h79
-rw-r--r--drivers/staging/vt6656/key.c55
-rw-r--r--drivers/staging/vt6656/key.h8
-rw-r--r--drivers/staging/vt6656/mac.c6
-rw-r--r--drivers/staging/vt6656/main_usb.c552
-rw-r--r--drivers/staging/vt6656/mib.c1
-rw-r--r--drivers/staging/vt6656/mib.h1
-rw-r--r--drivers/staging/vt6656/rf.c3
-rw-r--r--drivers/staging/vt6656/rxtx.c36
-rw-r--r--drivers/staging/vt6656/rxtx.h8
-rw-r--r--drivers/staging/vt6656/tkip.c40
-rw-r--r--drivers/staging/vt6656/ttype.h16
-rw-r--r--drivers/staging/vt6656/upc.h162
-rw-r--r--drivers/staging/vt6656/usbpipe.c4
-rw-r--r--drivers/staging/vt6656/wcmd.c44
-rw-r--r--drivers/staging/vt6656/wmgr.c66
-rw-r--r--drivers/staging/vt6656/wmgr.h42
-rw-r--r--drivers/staging/vt6656/wpa2.c2
-rw-r--r--drivers/staging/vt6656/wpa2.h4
-rw-r--r--drivers/staging/vt6656/wpactl.c664
-rw-r--r--drivers/staging/vt6656/wpactl.h12
-rw-r--r--drivers/staging/winbond/mds.c7
-rw-r--r--drivers/staging/winbond/wb35rx_f.h12
-rw-r--r--drivers/staging/winbond/wb35rx_s.h62
-rw-r--r--drivers/staging/winbond/wbhal.h4
-rw-r--r--drivers/staging/winbond/wbusb.c14
-rw-r--r--drivers/staging/wlags49_h2/ap_h2.c16
-rw-r--r--drivers/staging/wlags49_h2/man/wlags49.42
-rw-r--r--drivers/staging/wlags49_h2/wl_if.h133
-rw-r--r--drivers/staging/wlags49_h2/wl_pci.c25
-rw-r--r--drivers/staging/wlan-ng/hfa384x_usb.c6
-rw-r--r--drivers/staging/xgifb/TODO2
-rw-r--r--drivers/staging/xgifb/XGI_main_26.c60
-rw-r--r--drivers/staging/xgifb/vb_def.h9
-rw-r--r--drivers/staging/xgifb/vb_init.c47
-rw-r--r--drivers/staging/xgifb/vb_init.h1
-rw-r--r--drivers/staging/xgifb/vb_setmode.c898
-rw-r--r--drivers/staging/xgifb/vb_struct.h36
-rw-r--r--drivers/staging/xgifb/vb_table.h504
-rw-r--r--drivers/staging/zram/zram_drv.c113
-rw-r--r--drivers/staging/zram/zram_drv.h4
-rw-r--r--drivers/staging/zram/zram_sysfs.c8
-rw-r--r--drivers/vme/boards/vme_vmivme7805.c15
-rw-r--r--drivers/vme/bridges/vme_ca91cx42.c15
-rw-r--r--drivers/vme/bridges/vme_tsi148.c15
751 files changed, 30857 insertions, 81574 deletions
diff --git a/drivers/Kconfig b/drivers/Kconfig
index dbdefa3fe775..f5fb0722a63a 100644
--- a/drivers/Kconfig
+++ b/drivers/Kconfig
@@ -156,4 +156,6 @@ source "drivers/pwm/Kconfig"
156 156
157source "drivers/irqchip/Kconfig" 157source "drivers/irqchip/Kconfig"
158 158
159source "drivers/ipack/Kconfig"
160
159endmenu 161endmenu
diff --git a/drivers/Makefile b/drivers/Makefile
index a16a8d001ae0..7863b9fee50b 100644
--- a/drivers/Makefile
+++ b/drivers/Makefile
@@ -145,3 +145,4 @@ obj-$(CONFIG_EXTCON) += extcon/
145obj-$(CONFIG_MEMORY) += memory/ 145obj-$(CONFIG_MEMORY) += memory/
146obj-$(CONFIG_IIO) += iio/ 146obj-$(CONFIG_IIO) += iio/
147obj-$(CONFIG_VME_BUS) += vme/ 147obj-$(CONFIG_VME_BUS) += vme/
148obj-$(CONFIG_IPACK_BUS) += ipack/
diff --git a/drivers/iio/Kconfig b/drivers/iio/Kconfig
index fc937aca71fb..b2f963be3993 100644
--- a/drivers/iio/Kconfig
+++ b/drivers/iio/Kconfig
@@ -20,6 +20,12 @@ config IIO_BUFFER
20 20
21if IIO_BUFFER 21if IIO_BUFFER
22 22
23config IIO_BUFFER_CB
24boolean "IIO callback buffer used for push in-kernel interfaces"
25 help
26 Should be selected by any drivers that do-inkernel push
27 usage. That is, those where the data is pushed to the consumer.
28
23config IIO_KFIFO_BUF 29config IIO_KFIFO_BUF
24 select IIO_TRIGGER 30 select IIO_TRIGGER
25 tristate "Industrial I/O buffering based on kfifo" 31 tristate "Industrial I/O buffering based on kfifo"
@@ -57,11 +63,12 @@ config IIO_CONSUMERS_PER_TRIGGER
57source "drivers/iio/accel/Kconfig" 63source "drivers/iio/accel/Kconfig"
58source "drivers/iio/adc/Kconfig" 64source "drivers/iio/adc/Kconfig"
59source "drivers/iio/amplifiers/Kconfig" 65source "drivers/iio/amplifiers/Kconfig"
60source "drivers/iio/light/Kconfig"
61source "drivers/iio/frequency/Kconfig"
62source "drivers/iio/dac/Kconfig"
63source "drivers/iio/common/Kconfig" 66source "drivers/iio/common/Kconfig"
67source "drivers/iio/dac/Kconfig"
68source "drivers/iio/frequency/Kconfig"
64source "drivers/iio/gyro/Kconfig" 69source "drivers/iio/gyro/Kconfig"
70source "drivers/iio/imu/Kconfig"
71source "drivers/iio/light/Kconfig"
65source "drivers/iio/magnetometer/Kconfig" 72source "drivers/iio/magnetometer/Kconfig"
66 73
67endif # IIO 74endif # IIO
diff --git a/drivers/iio/Makefile b/drivers/iio/Makefile
index 761f2b65ac52..a0e8cdd67e4d 100644
--- a/drivers/iio/Makefile
+++ b/drivers/iio/Makefile
@@ -6,6 +6,7 @@ obj-$(CONFIG_IIO) += industrialio.o
6industrialio-y := industrialio-core.o industrialio-event.o inkern.o 6industrialio-y := industrialio-core.o industrialio-event.o inkern.o
7industrialio-$(CONFIG_IIO_BUFFER) += industrialio-buffer.o 7industrialio-$(CONFIG_IIO_BUFFER) += industrialio-buffer.o
8industrialio-$(CONFIG_IIO_TRIGGER) += industrialio-trigger.o 8industrialio-$(CONFIG_IIO_TRIGGER) += industrialio-trigger.o
9industrialio-$(CONFIG_IIO_BUFFER_CB) += buffer_cb.o
9 10
10obj-$(CONFIG_IIO_TRIGGERED_BUFFER) += industrialio-triggered-buffer.o 11obj-$(CONFIG_IIO_TRIGGERED_BUFFER) += industrialio-triggered-buffer.o
11obj-$(CONFIG_IIO_KFIFO_BUF) += kfifo_buf.o 12obj-$(CONFIG_IIO_KFIFO_BUF) += kfifo_buf.o
@@ -13,9 +14,10 @@ obj-$(CONFIG_IIO_KFIFO_BUF) += kfifo_buf.o
13obj-y += accel/ 14obj-y += accel/
14obj-y += adc/ 15obj-y += adc/
15obj-y += amplifiers/ 16obj-y += amplifiers/
16obj-y += light/
17obj-y += frequency/
18obj-y += dac/
19obj-y += common/ 17obj-y += common/
18obj-y += dac/
20obj-y += gyro/ 19obj-y += gyro/
20obj-y += frequency/
21obj-y += imu/
22obj-y += light/
21obj-y += magnetometer/ 23obj-y += magnetometer/
diff --git a/drivers/iio/accel/Kconfig b/drivers/iio/accel/Kconfig
index b2510c4d9a5a..fe4bcd7c5b12 100644
--- a/drivers/iio/accel/Kconfig
+++ b/drivers/iio/accel/Kconfig
@@ -8,7 +8,7 @@ config HID_SENSOR_ACCEL_3D
8 select IIO_BUFFER 8 select IIO_BUFFER
9 select IIO_TRIGGERED_BUFFER 9 select IIO_TRIGGERED_BUFFER
10 select HID_SENSOR_IIO_COMMON 10 select HID_SENSOR_IIO_COMMON
11 tristate "HID Acelerometers 3D" 11 tristate "HID Accelerometers 3D"
12 help 12 help
13 Say yes here to build support for the HID SENSOR 13 Say yes here to build support for the HID SENSOR
14 accelerometers 3D. 14 accelerometers 3D.
diff --git a/drivers/iio/accel/hid-sensor-accel-3d.c b/drivers/iio/accel/hid-sensor-accel-3d.c
index 314a4057879e..e67bb912bd19 100644
--- a/drivers/iio/accel/hid-sensor-accel-3d.c
+++ b/drivers/iio/accel/hid-sensor-accel-3d.c
@@ -197,21 +197,8 @@ static const struct iio_info accel_3d_info = {
197/* Function to push data to buffer */ 197/* Function to push data to buffer */
198static void hid_sensor_push_data(struct iio_dev *indio_dev, u8 *data, int len) 198static void hid_sensor_push_data(struct iio_dev *indio_dev, u8 *data, int len)
199{ 199{
200 struct iio_buffer *buffer = indio_dev->buffer;
201 int datum_sz;
202
203 dev_dbg(&indio_dev->dev, "hid_sensor_push_data\n"); 200 dev_dbg(&indio_dev->dev, "hid_sensor_push_data\n");
204 if (!buffer) { 201 iio_push_to_buffers(indio_dev, (u8 *)data);
205 dev_err(&indio_dev->dev, "Buffer == NULL\n");
206 return;
207 }
208 datum_sz = buffer->access->get_bytes_per_datum(buffer);
209 if (len > datum_sz) {
210 dev_err(&indio_dev->dev, "Datum size mismatch %d:%d\n", len,
211 datum_sz);
212 return;
213 }
214 iio_push_to_buffer(buffer, (u8 *)data);
215} 202}
216 203
217/* Callback handler to send event after all samples are received and captured */ 204/* Callback handler to send event after all samples are received and captured */
@@ -319,10 +306,10 @@ static int __devinit hid_accel_3d_probe(struct platform_device *pdev)
319 goto error_free_dev; 306 goto error_free_dev;
320 } 307 }
321 308
322 channels = kmemdup(accel_3d_channels, 309 channels = kmemdup(accel_3d_channels, sizeof(accel_3d_channels),
323 sizeof(accel_3d_channels), 310 GFP_KERNEL);
324 GFP_KERNEL);
325 if (!channels) { 311 if (!channels) {
312 ret = -ENOMEM;
326 dev_err(&pdev->dev, "failed to duplicate channels\n"); 313 dev_err(&pdev->dev, "failed to duplicate channels\n");
327 goto error_free_dev; 314 goto error_free_dev;
328 } 315 }
diff --git a/drivers/iio/adc/Kconfig b/drivers/iio/adc/Kconfig
index 492758120338..961b8d0a4bac 100644
--- a/drivers/iio/adc/Kconfig
+++ b/drivers/iio/adc/Kconfig
@@ -18,6 +18,18 @@ config AD7266
18 Say yes here to build support for Analog Devices AD7265 and AD7266 18 Say yes here to build support for Analog Devices AD7265 and AD7266
19 ADCs. 19 ADCs.
20 20
21config AD7298
22 tristate "Analog Devices AD7298 ADC driver"
23 depends on SPI
24 select IIO_BUFFER
25 select IIO_TRIGGERED_BUFFER
26 help
27 Say yes here to build support for Analog Devices AD7298
28 8 Channel ADC with temperature sensor.
29
30 To compile this driver as a module, choose M here: the
31 module will be called ad7298.
32
21config AD7791 33config AD7791
22 tristate "Analog Devices AD7791 ADC driver" 34 tristate "Analog Devices AD7791 ADC driver"
23 depends on SPI 35 depends on SPI
@@ -30,6 +42,18 @@ config AD7791
30 To compile this driver as a module, choose M here: the module will be 42 To compile this driver as a module, choose M here: the module will be
31 called ad7791. 43 called ad7791.
32 44
45config AD7793
46 tristate "Analog Devices AD7793 and similar ADCs driver"
47 depends on SPI
48 select AD_SIGMA_DELTA
49 help
50 Say yes here to build support for Analog Devices AD7785, AD7792, AD7793,
51 AD7794 and AD7795 SPI analog to digital converters (ADC).
52 If unsure, say N (but it's safe to say "Y").
53
54 To compile this driver as a module, choose M here: the
55 module will be called AD7793.
56
33config AD7476 57config AD7476
34 tristate "Analog Devices AD7476 and similar 1-channel ADCs driver" 58 tristate "Analog Devices AD7476 and similar 1-channel ADCs driver"
35 depends on SPI 59 depends on SPI
@@ -45,6 +69,19 @@ config AD7476
45 To compile this driver as a module, choose M here: the 69 To compile this driver as a module, choose M here: the
46 module will be called ad7476. 70 module will be called ad7476.
47 71
72config AD7887
73 tristate "Analog Devices AD7887 ADC driver"
74 depends on SPI
75 select IIO_BUFFER
76 select IIO_TRIGGERED_BUFFER
77 help
78 Say yes here to build support for Analog Devices
79 AD7887 SPI analog to digital converter (ADC).
80 If unsure, say N (but it's safe to say "Y").
81
82 To compile this driver as a module, choose M here: the
83 module will be called ad7887.
84
48config AT91_ADC 85config AT91_ADC
49 tristate "Atmel AT91 ADC" 86 tristate "Atmel AT91 ADC"
50 depends on ARCH_AT91 87 depends on ARCH_AT91
@@ -60,4 +97,32 @@ config LP8788_ADC
60 help 97 help
61 Say yes here to build support for TI LP8788 ADC. 98 Say yes here to build support for TI LP8788 ADC.
62 99
100config MAX1363
101 tristate "Maxim max1363 ADC driver"
102 depends on I2C
103 select IIO_TRIGGER
104 select MAX1363_RING_BUFFER
105 select IIO_BUFFER
106 select IIO_KFIFO_BUF
107 help
108 Say yes here to build support for many Maxim i2c analog to digital
109 converters (ADC). (max1361, max1362, max1363, max1364, max1036,
110 max1037, max1038, max1039, max1136, max1136, max1137, max1138,
111 max1139, max1236, max1237, max11238, max1239, max11600, max11601,
112 max11602, max11603, max11604, max11605, max11606, max11607,
113 max11608, max11609, max11610, max11611, max11612, max11613,
114 max11614, max11615, max11616, max11617, max11644, max11645,
115 max11646, max11647) Provides direct access via sysfs and buffered
116 data via the iio dev interface.
117
118config TI_ADC081C
119 tristate "Texas Instruments ADC081C021/027"
120 depends on I2C
121 help
122 If you say yes here you get support for Texas Instruments ADC081C021
123 and ADC081C027 ADC chips.
124
125 This driver can also be built as a module. If so, the module will be
126 called ti-adc081c.
127
63endmenu 128endmenu
diff --git a/drivers/iio/adc/Makefile b/drivers/iio/adc/Makefile
index 900995d5e179..472fd7cd2417 100644
--- a/drivers/iio/adc/Makefile
+++ b/drivers/iio/adc/Makefile
@@ -4,7 +4,13 @@
4 4
5obj-$(CONFIG_AD_SIGMA_DELTA) += ad_sigma_delta.o 5obj-$(CONFIG_AD_SIGMA_DELTA) += ad_sigma_delta.o
6obj-$(CONFIG_AD7266) += ad7266.o 6obj-$(CONFIG_AD7266) += ad7266.o
7obj-$(CONFIG_AD7298) += ad7298.o
7obj-$(CONFIG_AD7476) += ad7476.o 8obj-$(CONFIG_AD7476) += ad7476.o
8obj-$(CONFIG_AD7791) += ad7791.o 9obj-$(CONFIG_AD7791) += ad7791.o
10obj-$(CONFIG_AD7793) += ad7793.o
11obj-$(CONFIG_AD7887) += ad7887.o
9obj-$(CONFIG_AT91_ADC) += at91_adc.o 12obj-$(CONFIG_AT91_ADC) += at91_adc.o
10obj-$(CONFIG_LP8788_ADC) += lp8788_adc.o 13obj-$(CONFIG_LP8788_ADC) += lp8788_adc.o
14obj-$(CONFIG_MAX1363) += max1363.o
15obj-$(CONFIG_TI_ADC081C) += ti-adc081c.o
16
diff --git a/drivers/iio/adc/ad7266.c b/drivers/iio/adc/ad7266.c
index b11f214779a2..a6f4fc5f8201 100644
--- a/drivers/iio/adc/ad7266.c
+++ b/drivers/iio/adc/ad7266.c
@@ -91,7 +91,6 @@ static irqreturn_t ad7266_trigger_handler(int irq, void *p)
91{ 91{
92 struct iio_poll_func *pf = p; 92 struct iio_poll_func *pf = p;
93 struct iio_dev *indio_dev = pf->indio_dev; 93 struct iio_dev *indio_dev = pf->indio_dev;
94 struct iio_buffer *buffer = indio_dev->buffer;
95 struct ad7266_state *st = iio_priv(indio_dev); 94 struct ad7266_state *st = iio_priv(indio_dev);
96 int ret; 95 int ret;
97 96
@@ -99,7 +98,7 @@ static irqreturn_t ad7266_trigger_handler(int irq, void *p)
99 if (ret == 0) { 98 if (ret == 0) {
100 if (indio_dev->scan_timestamp) 99 if (indio_dev->scan_timestamp)
101 ((s64 *)st->data)[1] = pf->timestamp; 100 ((s64 *)st->data)[1] = pf->timestamp;
102 iio_push_to_buffer(buffer, (u8 *)st->data); 101 iio_push_to_buffers(indio_dev, (u8 *)st->data);
103 } 102 }
104 103
105 iio_trigger_notify_done(indio_dev->trig); 104 iio_trigger_notify_done(indio_dev->trig);
diff --git a/drivers/staging/iio/adc/ad7298_core.c b/drivers/iio/adc/ad7298.c
index 4c75114e7d7c..2364807a5d6c 100644
--- a/drivers/staging/iio/adc/ad7298_core.c
+++ b/drivers/iio/adc/ad7298.c
@@ -15,12 +15,48 @@
15#include <linux/err.h> 15#include <linux/err.h>
16#include <linux/delay.h> 16#include <linux/delay.h>
17#include <linux/module.h> 17#include <linux/module.h>
18#include <linux/interrupt.h>
18 19
19#include <linux/iio/iio.h> 20#include <linux/iio/iio.h>
20#include <linux/iio/sysfs.h> 21#include <linux/iio/sysfs.h>
21#include <linux/iio/buffer.h> 22#include <linux/iio/buffer.h>
22 23#include <linux/iio/trigger_consumer.h>
23#include "ad7298.h" 24#include <linux/iio/triggered_buffer.h>
25
26#include <linux/platform_data/ad7298.h>
27
28#define AD7298_WRITE (1 << 15) /* write to the control register */
29#define AD7298_REPEAT (1 << 14) /* repeated conversion enable */
30#define AD7298_CH(x) (1 << (13 - (x))) /* channel select */
31#define AD7298_TSENSE (1 << 5) /* temperature conversion enable */
32#define AD7298_EXTREF (1 << 2) /* external reference enable */
33#define AD7298_TAVG (1 << 1) /* temperature sensor averaging enable */
34#define AD7298_PDD (1 << 0) /* partial power down enable */
35
36#define AD7298_MAX_CHAN 8
37#define AD7298_BITS 12
38#define AD7298_STORAGE_BITS 16
39#define AD7298_INTREF_mV 2500
40
41#define AD7298_CH_TEMP 9
42
43#define RES_MASK(bits) ((1 << (bits)) - 1)
44
45struct ad7298_state {
46 struct spi_device *spi;
47 struct regulator *reg;
48 unsigned ext_ref;
49 struct spi_transfer ring_xfer[10];
50 struct spi_transfer scan_single_xfer[3];
51 struct spi_message ring_msg;
52 struct spi_message scan_single_msg;
53 /*
54 * DMA (thus cache coherency maintenance) requires the
55 * transfer buffers to live in their own cache lines.
56 */
57 __be16 rx_buf[12] ____cacheline_aligned;
58 __be16 tx_buf[2];
59};
24 60
25#define AD7298_V_CHAN(index) \ 61#define AD7298_V_CHAN(index) \
26 { \ 62 { \
@@ -35,6 +71,7 @@
35 .sign = 'u', \ 71 .sign = 'u', \
36 .realbits = 12, \ 72 .realbits = 12, \
37 .storagebits = 16, \ 73 .storagebits = 16, \
74 .endianness = IIO_BE, \
38 }, \ 75 }, \
39 } 76 }
40 77
@@ -44,7 +81,8 @@ static const struct iio_chan_spec ad7298_channels[] = {
44 .indexed = 1, 81 .indexed = 1,
45 .channel = 0, 82 .channel = 0,
46 .info_mask = IIO_CHAN_INFO_RAW_SEPARATE_BIT | 83 .info_mask = IIO_CHAN_INFO_RAW_SEPARATE_BIT |
47 IIO_CHAN_INFO_SCALE_SEPARATE_BIT, 84 IIO_CHAN_INFO_SCALE_SEPARATE_BIT |
85 IIO_CHAN_INFO_OFFSET_SEPARATE_BIT,
48 .address = AD7298_CH_TEMP, 86 .address = AD7298_CH_TEMP,
49 .scan_index = -1, 87 .scan_index = -1,
50 .scan_type = { 88 .scan_type = {
@@ -64,6 +102,84 @@ static const struct iio_chan_spec ad7298_channels[] = {
64 IIO_CHAN_SOFT_TIMESTAMP(8), 102 IIO_CHAN_SOFT_TIMESTAMP(8),
65}; 103};
66 104
105/**
106 * ad7298_update_scan_mode() setup the spi transfer buffer for the new scan mask
107 **/
108static int ad7298_update_scan_mode(struct iio_dev *indio_dev,
109 const unsigned long *active_scan_mask)
110{
111 struct ad7298_state *st = iio_priv(indio_dev);
112 int i, m;
113 unsigned short command;
114 int scan_count;
115
116 /* Now compute overall size */
117 scan_count = bitmap_weight(active_scan_mask, indio_dev->masklength);
118
119 command = AD7298_WRITE | st->ext_ref;
120
121 for (i = 0, m = AD7298_CH(0); i < AD7298_MAX_CHAN; i++, m >>= 1)
122 if (test_bit(i, active_scan_mask))
123 command |= m;
124
125 st->tx_buf[0] = cpu_to_be16(command);
126
127 /* build spi ring message */
128 st->ring_xfer[0].tx_buf = &st->tx_buf[0];
129 st->ring_xfer[0].len = 2;
130 st->ring_xfer[0].cs_change = 1;
131 st->ring_xfer[1].tx_buf = &st->tx_buf[1];
132 st->ring_xfer[1].len = 2;
133 st->ring_xfer[1].cs_change = 1;
134
135 spi_message_init(&st->ring_msg);
136 spi_message_add_tail(&st->ring_xfer[0], &st->ring_msg);
137 spi_message_add_tail(&st->ring_xfer[1], &st->ring_msg);
138
139 for (i = 0; i < scan_count; i++) {
140 st->ring_xfer[i + 2].rx_buf = &st->rx_buf[i];
141 st->ring_xfer[i + 2].len = 2;
142 st->ring_xfer[i + 2].cs_change = 1;
143 spi_message_add_tail(&st->ring_xfer[i + 2], &st->ring_msg);
144 }
145 /* make sure last transfer cs_change is not set */
146 st->ring_xfer[i + 1].cs_change = 0;
147
148 return 0;
149}
150
151/**
152 * ad7298_trigger_handler() bh of trigger launched polling to ring buffer
153 *
154 * Currently there is no option in this driver to disable the saving of
155 * timestamps within the ring.
156 **/
157static irqreturn_t ad7298_trigger_handler(int irq, void *p)
158{
159 struct iio_poll_func *pf = p;
160 struct iio_dev *indio_dev = pf->indio_dev;
161 struct ad7298_state *st = iio_priv(indio_dev);
162 s64 time_ns = 0;
163 int b_sent;
164
165 b_sent = spi_sync(st->spi, &st->ring_msg);
166 if (b_sent)
167 goto done;
168
169 if (indio_dev->scan_timestamp) {
170 time_ns = iio_get_time_ns();
171 memcpy((u8 *)st->rx_buf + indio_dev->scan_bytes - sizeof(s64),
172 &time_ns, sizeof(time_ns));
173 }
174
175 iio_push_to_buffers(indio_dev, (u8 *)st->rx_buf);
176
177done:
178 iio_trigger_notify_done(indio_dev->trig);
179
180 return IRQ_HANDLED;
181}
182
67static int ad7298_scan_direct(struct ad7298_state *st, unsigned ch) 183static int ad7298_scan_direct(struct ad7298_state *st, unsigned ch)
68{ 184{
69 int ret; 185 int ret;
@@ -79,7 +195,7 @@ static int ad7298_scan_direct(struct ad7298_state *st, unsigned ch)
79 195
80static int ad7298_scan_temp(struct ad7298_state *st, int *val) 196static int ad7298_scan_temp(struct ad7298_state *st, int *val)
81{ 197{
82 int tmp, ret; 198 int ret;
83 __be16 buf; 199 __be16 buf;
84 200
85 buf = cpu_to_be16(AD7298_WRITE | AD7298_TSENSE | 201 buf = cpu_to_be16(AD7298_WRITE | AD7298_TSENSE |
@@ -101,24 +217,24 @@ static int ad7298_scan_temp(struct ad7298_state *st, int *val)
101 if (ret) 217 if (ret)
102 return ret; 218 return ret;
103 219
104 tmp = be16_to_cpu(buf) & RES_MASK(AD7298_BITS); 220 *val = sign_extend32(be16_to_cpu(buf), 11);
105 221
106 /* 222 return 0;
107 * One LSB of the ADC corresponds to 0.25 deg C. 223}
108 * The temperature reading is in 12-bit twos complement format
109 */
110 224
111 if (tmp & (1 << (AD7298_BITS - 1))) { 225static int ad7298_get_ref_voltage(struct ad7298_state *st)
112 tmp = (4096 - tmp) * 250; 226{
113 tmp -= (2 * tmp); 227 int vref;
228
229 if (st->ext_ref) {
230 vref = regulator_get_voltage(st->reg);
231 if (vref < 0)
232 return vref;
114 233
234 return vref / 1000;
115 } else { 235 } else {
116 tmp *= 250; /* temperature in milli degrees Celsius */ 236 return AD7298_INTREF_mV;
117 } 237 }
118
119 *val = tmp;
120
121 return 0;
122} 238}
123 239
124static int ad7298_read_raw(struct iio_dev *indio_dev, 240static int ad7298_read_raw(struct iio_dev *indio_dev,
@@ -129,7 +245,6 @@ static int ad7298_read_raw(struct iio_dev *indio_dev,
129{ 245{
130 int ret; 246 int ret;
131 struct ad7298_state *st = iio_priv(indio_dev); 247 struct ad7298_state *st = iio_priv(indio_dev);
132 unsigned int scale_uv;
133 248
134 switch (m) { 249 switch (m) {
135 case IIO_CHAN_INFO_RAW: 250 case IIO_CHAN_INFO_RAW:
@@ -154,17 +269,19 @@ static int ad7298_read_raw(struct iio_dev *indio_dev,
154 case IIO_CHAN_INFO_SCALE: 269 case IIO_CHAN_INFO_SCALE:
155 switch (chan->type) { 270 switch (chan->type) {
156 case IIO_VOLTAGE: 271 case IIO_VOLTAGE:
157 scale_uv = (st->int_vref_mv * 1000) >> AD7298_BITS; 272 *val = ad7298_get_ref_voltage(st);
158 *val = scale_uv / 1000; 273 *val2 = chan->scan_type.realbits;
159 *val2 = (scale_uv % 1000) * 1000; 274 return IIO_VAL_FRACTIONAL_LOG2;
160 return IIO_VAL_INT_PLUS_MICRO;
161 case IIO_TEMP: 275 case IIO_TEMP:
162 *val = 1; 276 *val = ad7298_get_ref_voltage(st);
163 *val2 = 0; 277 *val2 = 10;
164 return IIO_VAL_INT_PLUS_MICRO; 278 return IIO_VAL_FRACTIONAL;
165 default: 279 default:
166 return -EINVAL; 280 return -EINVAL;
167 } 281 }
282 case IIO_CHAN_INFO_OFFSET:
283 *val = 1093 - 2732500 / ad7298_get_ref_voltage(st);
284 return IIO_VAL_INT;
168 } 285 }
169 return -EINVAL; 286 return -EINVAL;
170} 287}
@@ -179,16 +296,23 @@ static int __devinit ad7298_probe(struct spi_device *spi)
179{ 296{
180 struct ad7298_platform_data *pdata = spi->dev.platform_data; 297 struct ad7298_platform_data *pdata = spi->dev.platform_data;
181 struct ad7298_state *st; 298 struct ad7298_state *st;
182 int ret;
183 struct iio_dev *indio_dev = iio_device_alloc(sizeof(*st)); 299 struct iio_dev *indio_dev = iio_device_alloc(sizeof(*st));
300 int ret;
184 301
185 if (indio_dev == NULL) 302 if (indio_dev == NULL)
186 return -ENOMEM; 303 return -ENOMEM;
187 304
188 st = iio_priv(indio_dev); 305 st = iio_priv(indio_dev);
189 306
190 st->reg = regulator_get(&spi->dev, "vcc"); 307 if (pdata && pdata->ext_ref)
191 if (!IS_ERR(st->reg)) { 308 st->ext_ref = AD7298_EXTREF;
309
310 if (st->ext_ref) {
311 st->reg = regulator_get(&spi->dev, "vref");
312 if (IS_ERR(st->reg)) {
313 ret = PTR_ERR(st->reg);
314 goto error_free;
315 }
192 ret = regulator_enable(st->reg); 316 ret = regulator_enable(st->reg);
193 if (ret) 317 if (ret)
194 goto error_put_reg; 318 goto error_put_reg;
@@ -221,14 +345,8 @@ static int __devinit ad7298_probe(struct spi_device *spi)
221 spi_message_add_tail(&st->scan_single_xfer[1], &st->scan_single_msg); 345 spi_message_add_tail(&st->scan_single_xfer[1], &st->scan_single_msg);
222 spi_message_add_tail(&st->scan_single_xfer[2], &st->scan_single_msg); 346 spi_message_add_tail(&st->scan_single_xfer[2], &st->scan_single_msg);
223 347
224 if (pdata && pdata->vref_mv) { 348 ret = iio_triggered_buffer_setup(indio_dev, NULL,
225 st->int_vref_mv = pdata->vref_mv; 349 &ad7298_trigger_handler, NULL);
226 st->ext_ref = AD7298_EXTREF;
227 } else {
228 st->int_vref_mv = AD7298_INTREF_mV;
229 }
230
231 ret = ad7298_register_ring_funcs_and_init(indio_dev);
232 if (ret) 350 if (ret)
233 goto error_disable_reg; 351 goto error_disable_reg;
234 352
@@ -239,13 +357,14 @@ static int __devinit ad7298_probe(struct spi_device *spi)
239 return 0; 357 return 0;
240 358
241error_cleanup_ring: 359error_cleanup_ring:
242 ad7298_ring_cleanup(indio_dev); 360 iio_triggered_buffer_cleanup(indio_dev);
243error_disable_reg: 361error_disable_reg:
244 if (!IS_ERR(st->reg)) 362 if (st->ext_ref)
245 regulator_disable(st->reg); 363 regulator_disable(st->reg);
246error_put_reg: 364error_put_reg:
247 if (!IS_ERR(st->reg)) 365 if (st->ext_ref)
248 regulator_put(st->reg); 366 regulator_put(st->reg);
367error_free:
249 iio_device_free(indio_dev); 368 iio_device_free(indio_dev);
250 369
251 return ret; 370 return ret;
@@ -257,8 +376,8 @@ static int __devexit ad7298_remove(struct spi_device *spi)
257 struct ad7298_state *st = iio_priv(indio_dev); 376 struct ad7298_state *st = iio_priv(indio_dev);
258 377
259 iio_device_unregister(indio_dev); 378 iio_device_unregister(indio_dev);
260 ad7298_ring_cleanup(indio_dev); 379 iio_triggered_buffer_cleanup(indio_dev);
261 if (!IS_ERR(st->reg)) { 380 if (st->ext_ref) {
262 regulator_disable(st->reg); 381 regulator_disable(st->reg);
263 regulator_put(st->reg); 382 regulator_put(st->reg);
264 } 383 }
diff --git a/drivers/iio/adc/ad7476.c b/drivers/iio/adc/ad7476.c
index 7f2f45a0a48d..330248bfebae 100644
--- a/drivers/iio/adc/ad7476.c
+++ b/drivers/iio/adc/ad7476.c
@@ -76,7 +76,7 @@ static irqreturn_t ad7476_trigger_handler(int irq, void *p)
76 if (indio_dev->scan_timestamp) 76 if (indio_dev->scan_timestamp)
77 ((s64 *)st->data)[1] = time_ns; 77 ((s64 *)st->data)[1] = time_ns;
78 78
79 iio_push_to_buffer(indio_dev->buffer, st->data); 79 iio_push_to_buffers(indio_dev, st->data);
80done: 80done:
81 iio_trigger_notify_done(indio_dev->trig); 81 iio_trigger_notify_done(indio_dev->trig);
82 82
diff --git a/drivers/staging/iio/adc/ad7793.c b/drivers/iio/adc/ad7793.c
index 691a7be6f5cb..334e31ff7a4e 100644
--- a/drivers/staging/iio/adc/ad7793.c
+++ b/drivers/iio/adc/ad7793.c
@@ -25,8 +25,106 @@
25#include <linux/iio/trigger_consumer.h> 25#include <linux/iio/trigger_consumer.h>
26#include <linux/iio/triggered_buffer.h> 26#include <linux/iio/triggered_buffer.h>
27#include <linux/iio/adc/ad_sigma_delta.h> 27#include <linux/iio/adc/ad_sigma_delta.h>
28 28#include <linux/platform_data/ad7793.h>
29#include "ad7793.h" 29
30/* Registers */
31#define AD7793_REG_COMM 0 /* Communications Register (WO, 8-bit) */
32#define AD7793_REG_STAT 0 /* Status Register (RO, 8-bit) */
33#define AD7793_REG_MODE 1 /* Mode Register (RW, 16-bit */
34#define AD7793_REG_CONF 2 /* Configuration Register (RW, 16-bit) */
35#define AD7793_REG_DATA 3 /* Data Register (RO, 16-/24-bit) */
36#define AD7793_REG_ID 4 /* ID Register (RO, 8-bit) */
37#define AD7793_REG_IO 5 /* IO Register (RO, 8-bit) */
38#define AD7793_REG_OFFSET 6 /* Offset Register (RW, 16-bit
39 * (AD7792)/24-bit (AD7793)) */
40#define AD7793_REG_FULLSALE 7 /* Full-Scale Register
41 * (RW, 16-bit (AD7792)/24-bit (AD7793)) */
42
43/* Communications Register Bit Designations (AD7793_REG_COMM) */
44#define AD7793_COMM_WEN (1 << 7) /* Write Enable */
45#define AD7793_COMM_WRITE (0 << 6) /* Write Operation */
46#define AD7793_COMM_READ (1 << 6) /* Read Operation */
47#define AD7793_COMM_ADDR(x) (((x) & 0x7) << 3) /* Register Address */
48#define AD7793_COMM_CREAD (1 << 2) /* Continuous Read of Data Register */
49
50/* Status Register Bit Designations (AD7793_REG_STAT) */
51#define AD7793_STAT_RDY (1 << 7) /* Ready */
52#define AD7793_STAT_ERR (1 << 6) /* Error (Overrange, Underrange) */
53#define AD7793_STAT_CH3 (1 << 2) /* Channel 3 */
54#define AD7793_STAT_CH2 (1 << 1) /* Channel 2 */
55#define AD7793_STAT_CH1 (1 << 0) /* Channel 1 */
56
57/* Mode Register Bit Designations (AD7793_REG_MODE) */
58#define AD7793_MODE_SEL(x) (((x) & 0x7) << 13) /* Operation Mode Select */
59#define AD7793_MODE_SEL_MASK (0x7 << 13) /* Operation Mode Select mask */
60#define AD7793_MODE_CLKSRC(x) (((x) & 0x3) << 6) /* ADC Clock Source Select */
61#define AD7793_MODE_RATE(x) ((x) & 0xF) /* Filter Update Rate Select */
62
63#define AD7793_MODE_CONT 0 /* Continuous Conversion Mode */
64#define AD7793_MODE_SINGLE 1 /* Single Conversion Mode */
65#define AD7793_MODE_IDLE 2 /* Idle Mode */
66#define AD7793_MODE_PWRDN 3 /* Power-Down Mode */
67#define AD7793_MODE_CAL_INT_ZERO 4 /* Internal Zero-Scale Calibration */
68#define AD7793_MODE_CAL_INT_FULL 5 /* Internal Full-Scale Calibration */
69#define AD7793_MODE_CAL_SYS_ZERO 6 /* System Zero-Scale Calibration */
70#define AD7793_MODE_CAL_SYS_FULL 7 /* System Full-Scale Calibration */
71
72#define AD7793_CLK_INT 0 /* Internal 64 kHz Clock not
73 * available at the CLK pin */
74#define AD7793_CLK_INT_CO 1 /* Internal 64 kHz Clock available
75 * at the CLK pin */
76#define AD7793_CLK_EXT 2 /* External 64 kHz Clock */
77#define AD7793_CLK_EXT_DIV2 3 /* External Clock divided by 2 */
78
79/* Configuration Register Bit Designations (AD7793_REG_CONF) */
80#define AD7793_CONF_VBIAS(x) (((x) & 0x3) << 14) /* Bias Voltage
81 * Generator Enable */
82#define AD7793_CONF_BO_EN (1 << 13) /* Burnout Current Enable */
83#define AD7793_CONF_UNIPOLAR (1 << 12) /* Unipolar/Bipolar Enable */
84#define AD7793_CONF_BOOST (1 << 11) /* Boost Enable */
85#define AD7793_CONF_GAIN(x) (((x) & 0x7) << 8) /* Gain Select */
86#define AD7793_CONF_REFSEL(x) ((x) << 6) /* INT/EXT Reference Select */
87#define AD7793_CONF_BUF (1 << 4) /* Buffered Mode Enable */
88#define AD7793_CONF_CHAN(x) ((x) & 0xf) /* Channel select */
89#define AD7793_CONF_CHAN_MASK 0xf /* Channel select mask */
90
91#define AD7793_CH_AIN1P_AIN1M 0 /* AIN1(+) - AIN1(-) */
92#define AD7793_CH_AIN2P_AIN2M 1 /* AIN2(+) - AIN2(-) */
93#define AD7793_CH_AIN3P_AIN3M 2 /* AIN3(+) - AIN3(-) */
94#define AD7793_CH_AIN1M_AIN1M 3 /* AIN1(-) - AIN1(-) */
95#define AD7793_CH_TEMP 6 /* Temp Sensor */
96#define AD7793_CH_AVDD_MONITOR 7 /* AVDD Monitor */
97
98#define AD7795_CH_AIN4P_AIN4M 4 /* AIN4(+) - AIN4(-) */
99#define AD7795_CH_AIN5P_AIN5M 5 /* AIN5(+) - AIN5(-) */
100#define AD7795_CH_AIN6P_AIN6M 6 /* AIN6(+) - AIN6(-) */
101#define AD7795_CH_AIN1M_AIN1M 8 /* AIN1(-) - AIN1(-) */
102
103/* ID Register Bit Designations (AD7793_REG_ID) */
104#define AD7785_ID 0xB
105#define AD7792_ID 0xA
106#define AD7793_ID 0xB
107#define AD7794_ID 0xF
108#define AD7795_ID 0xF
109#define AD7796_ID 0xA
110#define AD7797_ID 0xB
111#define AD7798_ID 0x8
112#define AD7799_ID 0x9
113#define AD7793_ID_MASK 0xF
114
115/* IO (Excitation Current Sources) Register Bit Designations (AD7793_REG_IO) */
116#define AD7793_IO_IEXC1_IOUT1_IEXC2_IOUT2 0 /* IEXC1 connect to IOUT1,
117 * IEXC2 connect to IOUT2 */
118#define AD7793_IO_IEXC1_IOUT2_IEXC2_IOUT1 1 /* IEXC1 connect to IOUT2,
119 * IEXC2 connect to IOUT1 */
120#define AD7793_IO_IEXC1_IEXC2_IOUT1 2 /* Both current sources
121 * IEXC1,2 connect to IOUT1 */
122#define AD7793_IO_IEXC1_IEXC2_IOUT2 3 /* Both current sources
123 * IEXC1,2 connect to IOUT2 */
124
125#define AD7793_IO_IXCEN_10uA (1 << 0) /* Excitation Current 10uA */
126#define AD7793_IO_IXCEN_210uA (2 << 0) /* Excitation Current 210uA */
127#define AD7793_IO_IXCEN_1mA (3 << 0) /* Excitation Current 1mA */
30 128
31/* NOTE: 129/* NOTE:
32 * The AD7792/AD7793 features a dual use data out ready DOUT/RDY output. 130 * The AD7792/AD7793 features a dual use data out ready DOUT/RDY output.
@@ -36,9 +134,21 @@
36 * The DOUT/RDY output must also be wired to an interrupt capable GPIO. 134 * The DOUT/RDY output must also be wired to an interrupt capable GPIO.
37 */ 135 */
38 136
137#define AD7793_FLAG_HAS_CLKSEL BIT(0)
138#define AD7793_FLAG_HAS_REFSEL BIT(1)
139#define AD7793_FLAG_HAS_VBIAS BIT(2)
140#define AD7793_HAS_EXITATION_CURRENT BIT(3)
141#define AD7793_FLAG_HAS_GAIN BIT(4)
142#define AD7793_FLAG_HAS_BUFFER BIT(5)
143
39struct ad7793_chip_info { 144struct ad7793_chip_info {
145 unsigned int id;
40 const struct iio_chan_spec *channels; 146 const struct iio_chan_spec *channels;
41 unsigned int num_channels; 147 unsigned int num_channels;
148 unsigned int flags;
149
150 const struct iio_info *iio_info;
151 const u16 *sample_freq_avail;
42}; 152};
43 153
44struct ad7793_state { 154struct ad7793_state {
@@ -59,6 +169,10 @@ enum ad7793_supported_device_ids {
59 ID_AD7793, 169 ID_AD7793,
60 ID_AD7794, 170 ID_AD7794,
61 ID_AD7795, 171 ID_AD7795,
172 ID_AD7796,
173 ID_AD7797,
174 ID_AD7798,
175 ID_AD7799,
62}; 176};
63 177
64static struct ad7793_state *ad_sigma_delta_to_ad7793(struct ad_sigma_delta *sd) 178static struct ad7793_state *ad_sigma_delta_to_ad7793(struct ad_sigma_delta *sd)
@@ -110,19 +224,52 @@ static int ad7793_calibrate_all(struct ad7793_state *st)
110 ARRAY_SIZE(ad7793_calib_arr)); 224 ARRAY_SIZE(ad7793_calib_arr));
111} 225}
112 226
113static int ad7793_setup(struct iio_dev *indio_dev, 227static int ad7793_check_platform_data(struct ad7793_state *st,
114 const struct ad7793_platform_data *pdata) 228 const struct ad7793_platform_data *pdata)
115{ 229{
230 if ((pdata->current_source_direction == AD7793_IEXEC1_IEXEC2_IOUT1 ||
231 pdata->current_source_direction == AD7793_IEXEC1_IEXEC2_IOUT2) &&
232 ((pdata->exitation_current != AD7793_IX_10uA) &&
233 (pdata->exitation_current != AD7793_IX_210uA)))
234 return -EINVAL;
235
236 if (!(st->chip_info->flags & AD7793_FLAG_HAS_CLKSEL) &&
237 pdata->clock_src != AD7793_CLK_SRC_INT)
238 return -EINVAL;
239
240 if (!(st->chip_info->flags & AD7793_FLAG_HAS_REFSEL) &&
241 pdata->refsel != AD7793_REFSEL_REFIN1)
242 return -EINVAL;
243
244 if (!(st->chip_info->flags & AD7793_FLAG_HAS_VBIAS) &&
245 pdata->bias_voltage != AD7793_BIAS_VOLTAGE_DISABLED)
246 return -EINVAL;
247
248 if (!(st->chip_info->flags & AD7793_HAS_EXITATION_CURRENT) &&
249 pdata->exitation_current != AD7793_IX_DISABLED)
250 return -EINVAL;
251
252 return 0;
253}
254
255static int ad7793_setup(struct iio_dev *indio_dev,
256 const struct ad7793_platform_data *pdata,
257 unsigned int vref_mv)
258{
116 struct ad7793_state *st = iio_priv(indio_dev); 259 struct ad7793_state *st = iio_priv(indio_dev);
117 int i, ret = -1; 260 int i, ret = -1;
118 unsigned long long scale_uv; 261 unsigned long long scale_uv;
119 u32 id; 262 u32 id;
120 263
264 ret = ad7793_check_platform_data(st, pdata);
265 if (ret)
266 return ret;
267
121 /* reset the serial interface */ 268 /* reset the serial interface */
122 ret = spi_write(st->sd.spi, (u8 *)&ret, sizeof(ret)); 269 ret = spi_write(st->sd.spi, (u8 *)&ret, sizeof(ret));
123 if (ret < 0) 270 if (ret < 0)
124 goto out; 271 goto out;
125 msleep(1); /* Wait for at least 500us */ 272 usleep_range(500, 2000); /* Wait for at least 500us */
126 273
127 /* write/read test for device presence */ 274 /* write/read test for device presence */
128 ret = ad_sd_read_reg(&st->sd, AD7793_REG_ID, 1, &id); 275 ret = ad_sd_read_reg(&st->sd, AD7793_REG_ID, 1, &id);
@@ -131,13 +278,32 @@ static int ad7793_setup(struct iio_dev *indio_dev,
131 278
132 id &= AD7793_ID_MASK; 279 id &= AD7793_ID_MASK;
133 280
134 if (!((id == AD7792_ID) || (id == AD7793_ID) || (id == AD7795_ID))) { 281 if (id != st->chip_info->id) {
135 dev_err(&st->sd.spi->dev, "device ID query failed\n"); 282 dev_err(&st->sd.spi->dev, "device ID query failed\n");
136 goto out; 283 goto out;
137 } 284 }
138 285
139 st->mode = pdata->mode; 286 st->mode = AD7793_MODE_RATE(1);
140 st->conf = pdata->conf; 287 st->conf = 0;
288
289 if (st->chip_info->flags & AD7793_FLAG_HAS_CLKSEL)
290 st->mode |= AD7793_MODE_CLKSRC(pdata->clock_src);
291 if (st->chip_info->flags & AD7793_FLAG_HAS_REFSEL)
292 st->conf |= AD7793_CONF_REFSEL(pdata->refsel);
293 if (st->chip_info->flags & AD7793_FLAG_HAS_VBIAS)
294 st->conf |= AD7793_CONF_VBIAS(pdata->bias_voltage);
295 if (pdata->buffered || !(st->chip_info->flags & AD7793_FLAG_HAS_BUFFER))
296 st->conf |= AD7793_CONF_BUF;
297 if (pdata->boost_enable &&
298 (st->chip_info->flags & AD7793_FLAG_HAS_VBIAS))
299 st->conf |= AD7793_CONF_BOOST;
300 if (pdata->burnout_current)
301 st->conf |= AD7793_CONF_BO_EN;
302 if (pdata->unipolar)
303 st->conf |= AD7793_CONF_UNIPOLAR;
304
305 if (!(st->chip_info->flags & AD7793_FLAG_HAS_GAIN))
306 st->conf |= AD7793_CONF_GAIN(7);
141 307
142 ret = ad7793_set_mode(&st->sd, AD_SD_MODE_IDLE); 308 ret = ad7793_set_mode(&st->sd, AD_SD_MODE_IDLE);
143 if (ret) 309 if (ret)
@@ -147,10 +313,13 @@ static int ad7793_setup(struct iio_dev *indio_dev,
147 if (ret) 313 if (ret)
148 goto out; 314 goto out;
149 315
150 ret = ad_sd_write_reg(&st->sd, AD7793_REG_IO, 316 if (st->chip_info->flags & AD7793_HAS_EXITATION_CURRENT) {
151 sizeof(pdata->io), pdata->io); 317 ret = ad_sd_write_reg(&st->sd, AD7793_REG_IO, 1,
152 if (ret) 318 pdata->exitation_current |
153 goto out; 319 (pdata->current_source_direction << 2));
320 if (ret)
321 goto out;
322 }
154 323
155 ret = ad7793_calibrate_all(st); 324 ret = ad7793_calibrate_all(st);
156 if (ret) 325 if (ret)
@@ -158,7 +327,7 @@ static int ad7793_setup(struct iio_dev *indio_dev,
158 327
159 /* Populate available ADC input ranges */ 328 /* Populate available ADC input ranges */
160 for (i = 0; i < ARRAY_SIZE(st->scale_avail); i++) { 329 for (i = 0; i < ARRAY_SIZE(st->scale_avail); i++) {
161 scale_uv = ((u64)st->int_vref_mv * 100000000) 330 scale_uv = ((u64)vref_mv * 100000000)
162 >> (st->chip_info->channels[0].scan_type.realbits - 331 >> (st->chip_info->channels[0].scan_type.realbits -
163 (!!(st->conf & AD7793_CONF_UNIPOLAR) ? 0 : 1)); 332 (!!(st->conf & AD7793_CONF_UNIPOLAR) ? 0 : 1));
164 scale_uv >>= i; 333 scale_uv >>= i;
@@ -173,8 +342,11 @@ out:
173 return ret; 342 return ret;
174} 343}
175 344
176static const u16 sample_freq_avail[16] = {0, 470, 242, 123, 62, 50, 39, 33, 19, 345static const u16 ad7793_sample_freq_avail[16] = {0, 470, 242, 123, 62, 50, 39,
177 17, 16, 12, 10, 8, 6, 4}; 346 33, 19, 17, 16, 12, 10, 8, 6, 4};
347
348static const u16 ad7797_sample_freq_avail[16] = {0, 0, 0, 123, 62, 50, 0,
349 33, 0, 17, 16, 12, 10, 8, 6, 4};
178 350
179static ssize_t ad7793_read_frequency(struct device *dev, 351static ssize_t ad7793_read_frequency(struct device *dev,
180 struct device_attribute *attr, 352 struct device_attribute *attr,
@@ -184,7 +356,7 @@ static ssize_t ad7793_read_frequency(struct device *dev,
184 struct ad7793_state *st = iio_priv(indio_dev); 356 struct ad7793_state *st = iio_priv(indio_dev);
185 357
186 return sprintf(buf, "%d\n", 358 return sprintf(buf, "%d\n",
187 sample_freq_avail[AD7793_MODE_RATE(st->mode)]); 359 st->chip_info->sample_freq_avail[AD7793_MODE_RATE(st->mode)]);
188} 360}
189 361
190static ssize_t ad7793_write_frequency(struct device *dev, 362static ssize_t ad7793_write_frequency(struct device *dev,
@@ -204,14 +376,17 @@ static ssize_t ad7793_write_frequency(struct device *dev,
204 } 376 }
205 mutex_unlock(&indio_dev->mlock); 377 mutex_unlock(&indio_dev->mlock);
206 378
207 ret = strict_strtol(buf, 10, &lval); 379 ret = kstrtol(buf, 10, &lval);
208 if (ret) 380 if (ret)
209 return ret; 381 return ret;
210 382
383 if (lval == 0)
384 return -EINVAL;
385
211 ret = -EINVAL; 386 ret = -EINVAL;
212 387
213 for (i = 0; i < ARRAY_SIZE(sample_freq_avail); i++) 388 for (i = 0; i < 16; i++)
214 if (lval == sample_freq_avail[i]) { 389 if (lval == st->chip_info->sample_freq_avail[i]) {
215 mutex_lock(&indio_dev->mlock); 390 mutex_lock(&indio_dev->mlock);
216 st->mode &= ~AD7793_MODE_RATE(-1); 391 st->mode &= ~AD7793_MODE_RATE(-1);
217 st->mode |= AD7793_MODE_RATE(i); 392 st->mode |= AD7793_MODE_RATE(i);
@@ -231,6 +406,9 @@ static IIO_DEV_ATTR_SAMP_FREQ(S_IWUSR | S_IRUGO,
231static IIO_CONST_ATTR_SAMP_FREQ_AVAIL( 406static IIO_CONST_ATTR_SAMP_FREQ_AVAIL(
232 "470 242 123 62 50 39 33 19 17 16 12 10 8 6 4"); 407 "470 242 123 62 50 39 33 19 17 16 12 10 8 6 4");
233 408
409static IIO_CONST_ATTR_NAMED(sampling_frequency_available_ad7797,
410 sampling_frequency_available, "123 62 50 33 17 16 12 10 8 6 4");
411
234static ssize_t ad7793_show_scale_available(struct device *dev, 412static ssize_t ad7793_show_scale_available(struct device *dev,
235 struct device_attribute *attr, char *buf) 413 struct device_attribute *attr, char *buf)
236{ 414{
@@ -262,6 +440,16 @@ static const struct attribute_group ad7793_attribute_group = {
262 .attrs = ad7793_attributes, 440 .attrs = ad7793_attributes,
263}; 441};
264 442
443static struct attribute *ad7797_attributes[] = {
444 &iio_dev_attr_sampling_frequency.dev_attr.attr,
445 &iio_const_attr_sampling_frequency_available_ad7797.dev_attr.attr,
446 NULL
447};
448
449static const struct attribute_group ad7797_attribute_group = {
450 .attrs = ad7797_attributes,
451};
452
265static int ad7793_read_raw(struct iio_dev *indio_dev, 453static int ad7793_read_raw(struct iio_dev *indio_dev,
266 struct iio_chan_spec const *chan, 454 struct iio_chan_spec const *chan,
267 int *val, 455 int *val,
@@ -292,12 +480,12 @@ static int ad7793_read_raw(struct iio_dev *indio_dev,
292 return IIO_VAL_INT_PLUS_NANO; 480 return IIO_VAL_INT_PLUS_NANO;
293 } else { 481 } else {
294 /* 1170mV / 2^23 * 6 */ 482 /* 1170mV / 2^23 * 6 */
295 scale_uv = (1170ULL * 100000000ULL * 6ULL); 483 scale_uv = (1170ULL * 1000000000ULL * 6ULL);
296 } 484 }
297 break; 485 break;
298 case IIO_TEMP: 486 case IIO_TEMP:
299 /* 1170mV / 0.81 mV/C / 2^23 */ 487 /* 1170mV / 0.81 mV/C / 2^23 */
300 scale_uv = 1444444444444ULL; 488 scale_uv = 1444444444444444ULL;
301 break; 489 break;
302 default: 490 default:
303 return -EINVAL; 491 return -EINVAL;
@@ -387,6 +575,15 @@ static const struct iio_info ad7793_info = {
387 .driver_module = THIS_MODULE, 575 .driver_module = THIS_MODULE,
388}; 576};
389 577
578static const struct iio_info ad7797_info = {
579 .read_raw = &ad7793_read_raw,
580 .write_raw = &ad7793_write_raw,
581 .write_raw_get_fmt = &ad7793_write_raw_get_fmt,
582 .attrs = &ad7793_attribute_group,
583 .validate_trigger = ad_sd_validate_trigger,
584 .driver_module = THIS_MODULE,
585};
586
390#define DECLARE_AD7793_CHANNELS(_name, _b, _sb, _s) \ 587#define DECLARE_AD7793_CHANNELS(_name, _b, _sb, _s) \
391const struct iio_chan_spec _name##_channels[] = { \ 588const struct iio_chan_spec _name##_channels[] = { \
392 AD_SD_DIFF_CHANNEL(0, 0, 0, AD7793_CH_AIN1P_AIN1M, (_b), (_sb), (_s)), \ 589 AD_SD_DIFF_CHANNEL(0, 0, 0, AD7793_CH_AIN1P_AIN1M, (_b), (_sb), (_s)), \
@@ -412,41 +609,143 @@ const struct iio_chan_spec _name##_channels[] = { \
412 IIO_CHAN_SOFT_TIMESTAMP(9), \ 609 IIO_CHAN_SOFT_TIMESTAMP(9), \
413} 610}
414 611
612#define DECLARE_AD7797_CHANNELS(_name, _b, _sb) \
613const struct iio_chan_spec _name##_channels[] = { \
614 AD_SD_DIFF_CHANNEL(0, 0, 0, AD7793_CH_AIN1P_AIN1M, (_b), (_sb), 0), \
615 AD_SD_SHORTED_CHANNEL(1, 0, AD7793_CH_AIN1M_AIN1M, (_b), (_sb), 0), \
616 AD_SD_TEMP_CHANNEL(2, AD7793_CH_TEMP, (_b), (_sb), 0), \
617 AD_SD_SUPPLY_CHANNEL(3, 3, AD7793_CH_AVDD_MONITOR, (_b), (_sb), 0), \
618 IIO_CHAN_SOFT_TIMESTAMP(4), \
619}
620
621#define DECLARE_AD7799_CHANNELS(_name, _b, _sb) \
622const struct iio_chan_spec _name##_channels[] = { \
623 AD_SD_DIFF_CHANNEL(0, 0, 0, AD7793_CH_AIN1P_AIN1M, (_b), (_sb), 0), \
624 AD_SD_DIFF_CHANNEL(1, 1, 1, AD7793_CH_AIN2P_AIN2M, (_b), (_sb), 0), \
625 AD_SD_DIFF_CHANNEL(2, 2, 2, AD7793_CH_AIN3P_AIN3M, (_b), (_sb), 0), \
626 AD_SD_SHORTED_CHANNEL(3, 0, AD7793_CH_AIN1M_AIN1M, (_b), (_sb), 0), \
627 AD_SD_SUPPLY_CHANNEL(4, 3, AD7793_CH_AVDD_MONITOR, (_b), (_sb), 0), \
628 IIO_CHAN_SOFT_TIMESTAMP(5), \
629}
630
415static DECLARE_AD7793_CHANNELS(ad7785, 20, 32, 4); 631static DECLARE_AD7793_CHANNELS(ad7785, 20, 32, 4);
416static DECLARE_AD7793_CHANNELS(ad7792, 16, 32, 0); 632static DECLARE_AD7793_CHANNELS(ad7792, 16, 32, 0);
417static DECLARE_AD7793_CHANNELS(ad7793, 24, 32, 0); 633static DECLARE_AD7793_CHANNELS(ad7793, 24, 32, 0);
418static DECLARE_AD7795_CHANNELS(ad7794, 16, 32); 634static DECLARE_AD7795_CHANNELS(ad7794, 16, 32);
419static DECLARE_AD7795_CHANNELS(ad7795, 24, 32); 635static DECLARE_AD7795_CHANNELS(ad7795, 24, 32);
636static DECLARE_AD7797_CHANNELS(ad7796, 16, 16);
637static DECLARE_AD7797_CHANNELS(ad7797, 24, 32);
638static DECLARE_AD7799_CHANNELS(ad7798, 16, 16);
639static DECLARE_AD7799_CHANNELS(ad7799, 24, 32);
420 640
421static const struct ad7793_chip_info ad7793_chip_info_tbl[] = { 641static const struct ad7793_chip_info ad7793_chip_info_tbl[] = {
422 [ID_AD7785] = { 642 [ID_AD7785] = {
643 .id = AD7785_ID,
423 .channels = ad7785_channels, 644 .channels = ad7785_channels,
424 .num_channels = ARRAY_SIZE(ad7785_channels), 645 .num_channels = ARRAY_SIZE(ad7785_channels),
646 .iio_info = &ad7793_info,
647 .sample_freq_avail = ad7793_sample_freq_avail,
648 .flags = AD7793_FLAG_HAS_CLKSEL |
649 AD7793_FLAG_HAS_REFSEL |
650 AD7793_FLAG_HAS_VBIAS |
651 AD7793_HAS_EXITATION_CURRENT |
652 AD7793_FLAG_HAS_GAIN |
653 AD7793_FLAG_HAS_BUFFER,
425 }, 654 },
426 [ID_AD7792] = { 655 [ID_AD7792] = {
656 .id = AD7792_ID,
427 .channels = ad7792_channels, 657 .channels = ad7792_channels,
428 .num_channels = ARRAY_SIZE(ad7792_channels), 658 .num_channels = ARRAY_SIZE(ad7792_channels),
659 .iio_info = &ad7793_info,
660 .sample_freq_avail = ad7793_sample_freq_avail,
661 .flags = AD7793_FLAG_HAS_CLKSEL |
662 AD7793_FLAG_HAS_REFSEL |
663 AD7793_FLAG_HAS_VBIAS |
664 AD7793_HAS_EXITATION_CURRENT |
665 AD7793_FLAG_HAS_GAIN |
666 AD7793_FLAG_HAS_BUFFER,
429 }, 667 },
430 [ID_AD7793] = { 668 [ID_AD7793] = {
669 .id = AD7793_ID,
431 .channels = ad7793_channels, 670 .channels = ad7793_channels,
432 .num_channels = ARRAY_SIZE(ad7793_channels), 671 .num_channels = ARRAY_SIZE(ad7793_channels),
672 .iio_info = &ad7793_info,
673 .sample_freq_avail = ad7793_sample_freq_avail,
674 .flags = AD7793_FLAG_HAS_CLKSEL |
675 AD7793_FLAG_HAS_REFSEL |
676 AD7793_FLAG_HAS_VBIAS |
677 AD7793_HAS_EXITATION_CURRENT |
678 AD7793_FLAG_HAS_GAIN |
679 AD7793_FLAG_HAS_BUFFER,
433 }, 680 },
434 [ID_AD7794] = { 681 [ID_AD7794] = {
682 .id = AD7794_ID,
435 .channels = ad7794_channels, 683 .channels = ad7794_channels,
436 .num_channels = ARRAY_SIZE(ad7794_channels), 684 .num_channels = ARRAY_SIZE(ad7794_channels),
685 .iio_info = &ad7793_info,
686 .sample_freq_avail = ad7793_sample_freq_avail,
687 .flags = AD7793_FLAG_HAS_CLKSEL |
688 AD7793_FLAG_HAS_REFSEL |
689 AD7793_FLAG_HAS_VBIAS |
690 AD7793_HAS_EXITATION_CURRENT |
691 AD7793_FLAG_HAS_GAIN |
692 AD7793_FLAG_HAS_BUFFER,
437 }, 693 },
438 [ID_AD7795] = { 694 [ID_AD7795] = {
695 .id = AD7795_ID,
439 .channels = ad7795_channels, 696 .channels = ad7795_channels,
440 .num_channels = ARRAY_SIZE(ad7795_channels), 697 .num_channels = ARRAY_SIZE(ad7795_channels),
698 .iio_info = &ad7793_info,
699 .sample_freq_avail = ad7793_sample_freq_avail,
700 .flags = AD7793_FLAG_HAS_CLKSEL |
701 AD7793_FLAG_HAS_REFSEL |
702 AD7793_FLAG_HAS_VBIAS |
703 AD7793_HAS_EXITATION_CURRENT |
704 AD7793_FLAG_HAS_GAIN |
705 AD7793_FLAG_HAS_BUFFER,
706 },
707 [ID_AD7796] = {
708 .id = AD7796_ID,
709 .channels = ad7796_channels,
710 .num_channels = ARRAY_SIZE(ad7796_channels),
711 .iio_info = &ad7797_info,
712 .sample_freq_avail = ad7797_sample_freq_avail,
713 .flags = AD7793_FLAG_HAS_CLKSEL,
714 },
715 [ID_AD7797] = {
716 .id = AD7797_ID,
717 .channels = ad7797_channels,
718 .num_channels = ARRAY_SIZE(ad7797_channels),
719 .iio_info = &ad7797_info,
720 .sample_freq_avail = ad7797_sample_freq_avail,
721 .flags = AD7793_FLAG_HAS_CLKSEL,
722 },
723 [ID_AD7798] = {
724 .id = AD7798_ID,
725 .channels = ad7798_channels,
726 .num_channels = ARRAY_SIZE(ad7798_channels),
727 .iio_info = &ad7793_info,
728 .sample_freq_avail = ad7793_sample_freq_avail,
729 .flags = AD7793_FLAG_HAS_GAIN |
730 AD7793_FLAG_HAS_BUFFER,
731 },
732 [ID_AD7799] = {
733 .id = AD7799_ID,
734 .channels = ad7799_channels,
735 .num_channels = ARRAY_SIZE(ad7799_channels),
736 .iio_info = &ad7793_info,
737 .sample_freq_avail = ad7793_sample_freq_avail,
738 .flags = AD7793_FLAG_HAS_GAIN |
739 AD7793_FLAG_HAS_BUFFER,
441 }, 740 },
442}; 741};
443 742
444static int __devinit ad7793_probe(struct spi_device *spi) 743static int ad7793_probe(struct spi_device *spi)
445{ 744{
446 const struct ad7793_platform_data *pdata = spi->dev.platform_data; 745 const struct ad7793_platform_data *pdata = spi->dev.platform_data;
447 struct ad7793_state *st; 746 struct ad7793_state *st;
448 struct iio_dev *indio_dev; 747 struct iio_dev *indio_dev;
449 int ret, voltage_uv = 0; 748 int ret, vref_mv = 0;
450 749
451 if (!pdata) { 750 if (!pdata) {
452 dev_err(&spi->dev, "no platform data?\n"); 751 dev_err(&spi->dev, "no platform data?\n");
@@ -466,25 +765,31 @@ static int __devinit ad7793_probe(struct spi_device *spi)
466 765
467 ad_sd_init(&st->sd, indio_dev, spi, &ad7793_sigma_delta_info); 766 ad_sd_init(&st->sd, indio_dev, spi, &ad7793_sigma_delta_info);
468 767
469 st->reg = regulator_get(&spi->dev, "vcc"); 768 if (pdata->refsel != AD7793_REFSEL_INTERNAL) {
470 if (!IS_ERR(st->reg)) { 769 st->reg = regulator_get(&spi->dev, "refin");
770 if (IS_ERR(st->reg)) {
771 ret = PTR_ERR(st->reg);
772 goto error_device_free;
773 }
774
471 ret = regulator_enable(st->reg); 775 ret = regulator_enable(st->reg);
472 if (ret) 776 if (ret)
473 goto error_put_reg; 777 goto error_put_reg;
474 778
475 voltage_uv = regulator_get_voltage(st->reg); 779 vref_mv = regulator_get_voltage(st->reg);
780 if (vref_mv < 0) {
781 ret = vref_mv;
782 goto error_disable_reg;
783 }
784
785 vref_mv /= 1000;
786 } else {
787 vref_mv = 1170; /* Build-in ref */
476 } 788 }
477 789
478 st->chip_info = 790 st->chip_info =
479 &ad7793_chip_info_tbl[spi_get_device_id(spi)->driver_data]; 791 &ad7793_chip_info_tbl[spi_get_device_id(spi)->driver_data];
480 792
481 if (pdata && pdata->vref_mv)
482 st->int_vref_mv = pdata->vref_mv;
483 else if (voltage_uv)
484 st->int_vref_mv = voltage_uv / 1000;
485 else
486 st->int_vref_mv = 1170; /* Build-in ref */
487
488 spi_set_drvdata(spi, indio_dev); 793 spi_set_drvdata(spi, indio_dev);
489 794
490 indio_dev->dev.parent = &spi->dev; 795 indio_dev->dev.parent = &spi->dev;
@@ -492,13 +797,13 @@ static int __devinit ad7793_probe(struct spi_device *spi)
492 indio_dev->modes = INDIO_DIRECT_MODE; 797 indio_dev->modes = INDIO_DIRECT_MODE;
493 indio_dev->channels = st->chip_info->channels; 798 indio_dev->channels = st->chip_info->channels;
494 indio_dev->num_channels = st->chip_info->num_channels; 799 indio_dev->num_channels = st->chip_info->num_channels;
495 indio_dev->info = &ad7793_info; 800 indio_dev->info = st->chip_info->iio_info;
496 801
497 ret = ad_sd_setup_buffer_and_trigger(indio_dev); 802 ret = ad_sd_setup_buffer_and_trigger(indio_dev);
498 if (ret) 803 if (ret)
499 goto error_disable_reg; 804 goto error_disable_reg;
500 805
501 ret = ad7793_setup(indio_dev, pdata); 806 ret = ad7793_setup(indio_dev, pdata, vref_mv);
502 if (ret) 807 if (ret)
503 goto error_remove_trigger; 808 goto error_remove_trigger;
504 809
@@ -511,26 +816,27 @@ static int __devinit ad7793_probe(struct spi_device *spi)
511error_remove_trigger: 816error_remove_trigger:
512 ad_sd_cleanup_buffer_and_trigger(indio_dev); 817 ad_sd_cleanup_buffer_and_trigger(indio_dev);
513error_disable_reg: 818error_disable_reg:
514 if (!IS_ERR(st->reg)) 819 if (pdata->refsel != AD7793_REFSEL_INTERNAL)
515 regulator_disable(st->reg); 820 regulator_disable(st->reg);
516error_put_reg: 821error_put_reg:
517 if (!IS_ERR(st->reg)) 822 if (pdata->refsel != AD7793_REFSEL_INTERNAL)
518 regulator_put(st->reg); 823 regulator_put(st->reg);
519 824error_device_free:
520 iio_device_free(indio_dev); 825 iio_device_free(indio_dev);
521 826
522 return ret; 827 return ret;
523} 828}
524 829
525static int __devexit ad7793_remove(struct spi_device *spi) 830static int ad7793_remove(struct spi_device *spi)
526{ 831{
832 const struct ad7793_platform_data *pdata = spi->dev.platform_data;
527 struct iio_dev *indio_dev = spi_get_drvdata(spi); 833 struct iio_dev *indio_dev = spi_get_drvdata(spi);
528 struct ad7793_state *st = iio_priv(indio_dev); 834 struct ad7793_state *st = iio_priv(indio_dev);
529 835
530 iio_device_unregister(indio_dev); 836 iio_device_unregister(indio_dev);
531 ad_sd_cleanup_buffer_and_trigger(indio_dev); 837 ad_sd_cleanup_buffer_and_trigger(indio_dev);
532 838
533 if (!IS_ERR(st->reg)) { 839 if (pdata->refsel != AD7793_REFSEL_INTERNAL) {
534 regulator_disable(st->reg); 840 regulator_disable(st->reg);
535 regulator_put(st->reg); 841 regulator_put(st->reg);
536 } 842 }
@@ -546,6 +852,10 @@ static const struct spi_device_id ad7793_id[] = {
546 {"ad7793", ID_AD7793}, 852 {"ad7793", ID_AD7793},
547 {"ad7794", ID_AD7794}, 853 {"ad7794", ID_AD7794},
548 {"ad7795", ID_AD7795}, 854 {"ad7795", ID_AD7795},
855 {"ad7796", ID_AD7796},
856 {"ad7797", ID_AD7797},
857 {"ad7798", ID_AD7798},
858 {"ad7799", ID_AD7799},
549 {} 859 {}
550}; 860};
551MODULE_DEVICE_TABLE(spi, ad7793_id); 861MODULE_DEVICE_TABLE(spi, ad7793_id);
@@ -556,7 +866,7 @@ static struct spi_driver ad7793_driver = {
556 .owner = THIS_MODULE, 866 .owner = THIS_MODULE,
557 }, 867 },
558 .probe = ad7793_probe, 868 .probe = ad7793_probe,
559 .remove = __devexit_p(ad7793_remove), 869 .remove = ad7793_remove,
560 .id_table = ad7793_id, 870 .id_table = ad7793_id,
561}; 871};
562module_spi_driver(ad7793_driver); 872module_spi_driver(ad7793_driver);
diff --git a/drivers/staging/iio/adc/ad7887_core.c b/drivers/iio/adc/ad7887.c
index 551790584a12..81153fafac7a 100644
--- a/drivers/staging/iio/adc/ad7887_core.c
+++ b/drivers/iio/adc/ad7887.c
@@ -14,13 +14,139 @@
14#include <linux/regulator/consumer.h> 14#include <linux/regulator/consumer.h>
15#include <linux/err.h> 15#include <linux/err.h>
16#include <linux/module.h> 16#include <linux/module.h>
17#include <linux/interrupt.h>
17 18
18#include <linux/iio/iio.h> 19#include <linux/iio/iio.h>
19#include <linux/iio/sysfs.h> 20#include <linux/iio/sysfs.h>
20#include <linux/iio/buffer.h> 21#include <linux/iio/buffer.h>
21 22
23#include <linux/iio/trigger_consumer.h>
24#include <linux/iio/triggered_buffer.h>
22 25
23#include "ad7887.h" 26#include <linux/platform_data/ad7887.h>
27
28#define AD7887_REF_DIS (1 << 5) /* on-chip reference disable */
29#define AD7887_DUAL (1 << 4) /* dual-channel mode */
30#define AD7887_CH_AIN1 (1 << 3) /* convert on channel 1, DUAL=1 */
31#define AD7887_CH_AIN0 (0 << 3) /* convert on channel 0, DUAL=0,1 */
32#define AD7887_PM_MODE1 (0) /* CS based shutdown */
33#define AD7887_PM_MODE2 (1) /* full on */
34#define AD7887_PM_MODE3 (2) /* auto shutdown after conversion */
35#define AD7887_PM_MODE4 (3) /* standby mode */
36
37enum ad7887_channels {
38 AD7887_CH0,
39 AD7887_CH0_CH1,
40 AD7887_CH1,
41};
42
43#define RES_MASK(bits) ((1 << (bits)) - 1)
44
45/**
46 * struct ad7887_chip_info - chip specifc information
47 * @int_vref_mv: the internal reference voltage
48 * @channel: channel specification
49 */
50struct ad7887_chip_info {
51 u16 int_vref_mv;
52 struct iio_chan_spec channel[3];
53};
54
55struct ad7887_state {
56 struct spi_device *spi;
57 const struct ad7887_chip_info *chip_info;
58 struct regulator *reg;
59 struct spi_transfer xfer[4];
60 struct spi_message msg[3];
61 struct spi_message *ring_msg;
62 unsigned char tx_cmd_buf[4];
63
64 /*
65 * DMA (thus cache coherency maintenance) requires the
66 * transfer buffers to live in their own cache lines.
67 * Buffer needs to be large enough to hold two 16 bit samples and a
68 * 64 bit aligned 64 bit timestamp.
69 */
70 unsigned char data[ALIGN(4, sizeof(s64)) + sizeof(s64)]
71 ____cacheline_aligned;
72};
73
74enum ad7887_supported_device_ids {
75 ID_AD7887
76};
77
78static int ad7887_ring_preenable(struct iio_dev *indio_dev)
79{
80 struct ad7887_state *st = iio_priv(indio_dev);
81 int ret;
82
83 ret = iio_sw_buffer_preenable(indio_dev);
84 if (ret < 0)
85 return ret;
86
87 /* We know this is a single long so can 'cheat' */
88 switch (*indio_dev->active_scan_mask) {
89 case (1 << 0):
90 st->ring_msg = &st->msg[AD7887_CH0];
91 break;
92 case (1 << 1):
93 st->ring_msg = &st->msg[AD7887_CH1];
94 /* Dummy read: push CH1 setting down to hardware */
95 spi_sync(st->spi, st->ring_msg);
96 break;
97 case ((1 << 1) | (1 << 0)):
98 st->ring_msg = &st->msg[AD7887_CH0_CH1];
99 break;
100 }
101
102 return 0;
103}
104
105static int ad7887_ring_postdisable(struct iio_dev *indio_dev)
106{
107 struct ad7887_state *st = iio_priv(indio_dev);
108
109 /* dummy read: restore default CH0 settin */
110 return spi_sync(st->spi, &st->msg[AD7887_CH0]);
111}
112
113/**
114 * ad7887_trigger_handler() bh of trigger launched polling to ring buffer
115 *
116 * Currently there is no option in this driver to disable the saving of
117 * timestamps within the ring.
118 **/
119static irqreturn_t ad7887_trigger_handler(int irq, void *p)
120{
121 struct iio_poll_func *pf = p;
122 struct iio_dev *indio_dev = pf->indio_dev;
123 struct ad7887_state *st = iio_priv(indio_dev);
124 s64 time_ns;
125 int b_sent;
126
127 b_sent = spi_sync(st->spi, st->ring_msg);
128 if (b_sent)
129 goto done;
130
131 time_ns = iio_get_time_ns();
132
133 if (indio_dev->scan_timestamp)
134 memcpy(st->data + indio_dev->scan_bytes - sizeof(s64),
135 &time_ns, sizeof(time_ns));
136
137 iio_push_to_buffers(indio_dev, st->data);
138done:
139 iio_trigger_notify_done(indio_dev->trig);
140
141 return IRQ_HANDLED;
142}
143
144static const struct iio_buffer_setup_ops ad7887_ring_setup_ops = {
145 .preenable = &ad7887_ring_preenable,
146 .postenable = &iio_triggered_buffer_postenable,
147 .predisable = &iio_triggered_buffer_predisable,
148 .postdisable = &ad7887_ring_postdisable,
149};
24 150
25static int ad7887_scan_direct(struct ad7887_state *st, unsigned ch) 151static int ad7887_scan_direct(struct ad7887_state *st, unsigned ch)
26{ 152{
@@ -39,7 +165,6 @@ static int ad7887_read_raw(struct iio_dev *indio_dev,
39{ 165{
40 int ret; 166 int ret;
41 struct ad7887_state *st = iio_priv(indio_dev); 167 struct ad7887_state *st = iio_priv(indio_dev);
42 unsigned int scale_uv;
43 168
44 switch (m) { 169 switch (m) {
45 case IIO_CHAN_INFO_RAW: 170 case IIO_CHAN_INFO_RAW:
@@ -52,15 +177,22 @@ static int ad7887_read_raw(struct iio_dev *indio_dev,
52 177
53 if (ret < 0) 178 if (ret < 0)
54 return ret; 179 return ret;
55 *val = (ret >> st->chip_info->channel[0].scan_type.shift) & 180 *val = ret >> chan->scan_type.shift;
56 RES_MASK(st->chip_info->channel[0].scan_type.realbits); 181 *val &= RES_MASK(chan->scan_type.realbits);
57 return IIO_VAL_INT; 182 return IIO_VAL_INT;
58 case IIO_CHAN_INFO_SCALE: 183 case IIO_CHAN_INFO_SCALE:
59 scale_uv = (st->int_vref_mv * 1000) 184 if (st->reg) {
60 >> st->chip_info->channel[0].scan_type.realbits; 185 *val = regulator_get_voltage(st->reg);
61 *val = scale_uv/1000; 186 if (*val < 0)
62 *val2 = (scale_uv%1000)*1000; 187 return *val;
63 return IIO_VAL_INT_PLUS_MICRO; 188 *val /= 1000;
189 } else {
190 *val = st->chip_info->int_vref_mv;
191 }
192
193 *val2 = chan->scan_type.realbits;
194
195 return IIO_VAL_FRACTIONAL_LOG2;
64 } 196 }
65 return -EINVAL; 197 return -EINVAL;
66} 198}
@@ -105,21 +237,25 @@ static int __devinit ad7887_probe(struct spi_device *spi)
105{ 237{
106 struct ad7887_platform_data *pdata = spi->dev.platform_data; 238 struct ad7887_platform_data *pdata = spi->dev.platform_data;
107 struct ad7887_state *st; 239 struct ad7887_state *st;
108 int ret, voltage_uv = 0;
109 struct iio_dev *indio_dev = iio_device_alloc(sizeof(*st)); 240 struct iio_dev *indio_dev = iio_device_alloc(sizeof(*st));
241 uint8_t mode;
242 int ret;
110 243
111 if (indio_dev == NULL) 244 if (indio_dev == NULL)
112 return -ENOMEM; 245 return -ENOMEM;
113 246
114 st = iio_priv(indio_dev); 247 st = iio_priv(indio_dev);
115 248
116 st->reg = regulator_get(&spi->dev, "vcc"); 249 if (!pdata || !pdata->use_onchip_ref) {
117 if (!IS_ERR(st->reg)) { 250 st->reg = regulator_get(&spi->dev, "vref");
251 if (IS_ERR(st->reg)) {
252 ret = PTR_ERR(st->reg);
253 goto error_free;
254 }
255
118 ret = regulator_enable(st->reg); 256 ret = regulator_enable(st->reg);
119 if (ret) 257 if (ret)
120 goto error_put_reg; 258 goto error_put_reg;
121
122 voltage_uv = regulator_get_voltage(st->reg);
123 } 259 }
124 260
125 st->chip_info = 261 st->chip_info =
@@ -136,9 +272,13 @@ static int __devinit ad7887_probe(struct spi_device *spi)
136 272
137 /* Setup default message */ 273 /* Setup default message */
138 274
139 st->tx_cmd_buf[0] = AD7887_CH_AIN0 | AD7887_PM_MODE4 | 275 mode = AD7887_PM_MODE4;
140 ((pdata && pdata->use_onchip_ref) ? 276 if (!pdata || !pdata->use_onchip_ref)
141 0 : AD7887_REF_DIS); 277 mode |= AD7887_REF_DIS;
278 if (pdata && pdata->en_dual)
279 mode |= AD7887_DUAL;
280
281 st->tx_cmd_buf[0] = AD7887_CH_AIN0 | mode;
142 282
143 st->xfer[0].rx_buf = &st->data[0]; 283 st->xfer[0].rx_buf = &st->data[0];
144 st->xfer[0].tx_buf = &st->tx_cmd_buf[0]; 284 st->xfer[0].tx_buf = &st->tx_cmd_buf[0];
@@ -148,56 +288,36 @@ static int __devinit ad7887_probe(struct spi_device *spi)
148 spi_message_add_tail(&st->xfer[0], &st->msg[AD7887_CH0]); 288 spi_message_add_tail(&st->xfer[0], &st->msg[AD7887_CH0]);
149 289
150 if (pdata && pdata->en_dual) { 290 if (pdata && pdata->en_dual) {
151 st->tx_cmd_buf[0] |= AD7887_DUAL | AD7887_REF_DIS; 291 st->tx_cmd_buf[2] = AD7887_CH_AIN1 | mode;
152
153 st->tx_cmd_buf[2] = AD7887_CH_AIN1 | AD7887_DUAL |
154 AD7887_REF_DIS | AD7887_PM_MODE4;
155 st->tx_cmd_buf[4] = AD7887_CH_AIN0 | AD7887_DUAL |
156 AD7887_REF_DIS | AD7887_PM_MODE4;
157 st->tx_cmd_buf[6] = AD7887_CH_AIN1 | AD7887_DUAL |
158 AD7887_REF_DIS | AD7887_PM_MODE4;
159 292
160 st->xfer[1].rx_buf = &st->data[0]; 293 st->xfer[1].rx_buf = &st->data[0];
161 st->xfer[1].tx_buf = &st->tx_cmd_buf[2]; 294 st->xfer[1].tx_buf = &st->tx_cmd_buf[2];
162 st->xfer[1].len = 2; 295 st->xfer[1].len = 2;
163 296
164 st->xfer[2].rx_buf = &st->data[2]; 297 st->xfer[2].rx_buf = &st->data[2];
165 st->xfer[2].tx_buf = &st->tx_cmd_buf[4]; 298 st->xfer[2].tx_buf = &st->tx_cmd_buf[0];
166 st->xfer[2].len = 2; 299 st->xfer[2].len = 2;
167 300
168 spi_message_init(&st->msg[AD7887_CH0_CH1]); 301 spi_message_init(&st->msg[AD7887_CH0_CH1]);
169 spi_message_add_tail(&st->xfer[1], &st->msg[AD7887_CH0_CH1]); 302 spi_message_add_tail(&st->xfer[1], &st->msg[AD7887_CH0_CH1]);
170 spi_message_add_tail(&st->xfer[2], &st->msg[AD7887_CH0_CH1]); 303 spi_message_add_tail(&st->xfer[2], &st->msg[AD7887_CH0_CH1]);
171 304
172 st->xfer[3].rx_buf = &st->data[0]; 305 st->xfer[3].rx_buf = &st->data[2];
173 st->xfer[3].tx_buf = &st->tx_cmd_buf[6]; 306 st->xfer[3].tx_buf = &st->tx_cmd_buf[2];
174 st->xfer[3].len = 2; 307 st->xfer[3].len = 2;
175 308
176 spi_message_init(&st->msg[AD7887_CH1]); 309 spi_message_init(&st->msg[AD7887_CH1]);
177 spi_message_add_tail(&st->xfer[3], &st->msg[AD7887_CH1]); 310 spi_message_add_tail(&st->xfer[3], &st->msg[AD7887_CH1]);
178 311
179 if (pdata && pdata->vref_mv)
180 st->int_vref_mv = pdata->vref_mv;
181 else if (voltage_uv)
182 st->int_vref_mv = voltage_uv / 1000;
183 else
184 dev_warn(&spi->dev, "reference voltage unspecified\n");
185
186 indio_dev->channels = st->chip_info->channel; 312 indio_dev->channels = st->chip_info->channel;
187 indio_dev->num_channels = 3; 313 indio_dev->num_channels = 3;
188 } else { 314 } else {
189 if (pdata && pdata->vref_mv)
190 st->int_vref_mv = pdata->vref_mv;
191 else if (pdata && pdata->use_onchip_ref)
192 st->int_vref_mv = st->chip_info->int_vref_mv;
193 else
194 dev_warn(&spi->dev, "reference voltage unspecified\n");
195
196 indio_dev->channels = &st->chip_info->channel[1]; 315 indio_dev->channels = &st->chip_info->channel[1];
197 indio_dev->num_channels = 2; 316 indio_dev->num_channels = 2;
198 } 317 }
199 318
200 ret = ad7887_register_ring_funcs_and_init(indio_dev); 319 ret = iio_triggered_buffer_setup(indio_dev, &iio_pollfunc_store_time,
320 &ad7887_trigger_handler, &ad7887_ring_setup_ops);
201 if (ret) 321 if (ret)
202 goto error_disable_reg; 322 goto error_disable_reg;
203 323
@@ -207,13 +327,14 @@ static int __devinit ad7887_probe(struct spi_device *spi)
207 327
208 return 0; 328 return 0;
209error_unregister_ring: 329error_unregister_ring:
210 ad7887_ring_cleanup(indio_dev); 330 iio_triggered_buffer_cleanup(indio_dev);
211error_disable_reg: 331error_disable_reg:
212 if (!IS_ERR(st->reg)) 332 if (st->reg)
213 regulator_disable(st->reg); 333 regulator_disable(st->reg);
214error_put_reg: 334error_put_reg:
215 if (!IS_ERR(st->reg)) 335 if (st->reg)
216 regulator_put(st->reg); 336 regulator_put(st->reg);
337error_free:
217 iio_device_free(indio_dev); 338 iio_device_free(indio_dev);
218 339
219 return ret; 340 return ret;
@@ -225,8 +346,8 @@ static int __devexit ad7887_remove(struct spi_device *spi)
225 struct ad7887_state *st = iio_priv(indio_dev); 346 struct ad7887_state *st = iio_priv(indio_dev);
226 347
227 iio_device_unregister(indio_dev); 348 iio_device_unregister(indio_dev);
228 ad7887_ring_cleanup(indio_dev); 349 iio_triggered_buffer_cleanup(indio_dev);
229 if (!IS_ERR(st->reg)) { 350 if (st->reg) {
230 regulator_disable(st->reg); 351 regulator_disable(st->reg);
231 regulator_put(st->reg); 352 regulator_put(st->reg);
232 } 353 }
diff --git a/drivers/iio/adc/ad_sigma_delta.c b/drivers/iio/adc/ad_sigma_delta.c
index 67baa1363d7a..afe6d78c8ff0 100644
--- a/drivers/iio/adc/ad_sigma_delta.c
+++ b/drivers/iio/adc/ad_sigma_delta.c
@@ -391,7 +391,7 @@ static irqreturn_t ad_sd_trigger_handler(int irq, void *p)
391 break; 391 break;
392 } 392 }
393 393
394 iio_push_to_buffer(indio_dev->buffer, (uint8_t *)data); 394 iio_push_to_buffers(indio_dev, (uint8_t *)data);
395 395
396 iio_trigger_notify_done(indio_dev->trig); 396 iio_trigger_notify_done(indio_dev->trig);
397 sigma_delta->irq_dis = false; 397 sigma_delta->irq_dis = false;
diff --git a/drivers/iio/adc/at91_adc.c b/drivers/iio/adc/at91_adc.c
index 3ed94bf80596..03b85940f4ba 100644
--- a/drivers/iio/adc/at91_adc.c
+++ b/drivers/iio/adc/at91_adc.c
@@ -46,7 +46,6 @@ struct at91_adc_state {
46 struct clk *clk; 46 struct clk *clk;
47 bool done; 47 bool done;
48 int irq; 48 int irq;
49 bool irq_enabled;
50 u16 last_value; 49 u16 last_value;
51 struct mutex lock; 50 struct mutex lock;
52 u8 num_channels; 51 u8 num_channels;
@@ -66,7 +65,6 @@ static irqreturn_t at91_adc_trigger_handler(int irq, void *p)
66 struct iio_poll_func *pf = p; 65 struct iio_poll_func *pf = p;
67 struct iio_dev *idev = pf->indio_dev; 66 struct iio_dev *idev = pf->indio_dev;
68 struct at91_adc_state *st = iio_priv(idev); 67 struct at91_adc_state *st = iio_priv(idev);
69 struct iio_buffer *buffer = idev->buffer;
70 int i, j = 0; 68 int i, j = 0;
71 69
72 for (i = 0; i < idev->masklength; i++) { 70 for (i = 0; i < idev->masklength; i++) {
@@ -82,10 +80,9 @@ static irqreturn_t at91_adc_trigger_handler(int irq, void *p)
82 *timestamp = pf->timestamp; 80 *timestamp = pf->timestamp;
83 } 81 }
84 82
85 buffer->access->store_to(buffer, (u8 *)st->buffer); 83 iio_push_to_buffers(indio_dev, (u8 *)st->buffer);
86 84
87 iio_trigger_notify_done(idev->trig); 85 iio_trigger_notify_done(idev->trig);
88 st->irq_enabled = true;
89 86
90 /* Needed to ACK the DRDY interruption */ 87 /* Needed to ACK the DRDY interruption */
91 at91_adc_readl(st, AT91_ADC_LCDR); 88 at91_adc_readl(st, AT91_ADC_LCDR);
@@ -106,7 +103,6 @@ static irqreturn_t at91_adc_eoc_trigger(int irq, void *private)
106 103
107 if (iio_buffer_enabled(idev)) { 104 if (iio_buffer_enabled(idev)) {
108 disable_irq_nosync(irq); 105 disable_irq_nosync(irq);
109 st->irq_enabled = false;
110 iio_trigger_poll(idev->trig, iio_get_time_ns()); 106 iio_trigger_poll(idev->trig, iio_get_time_ns());
111 } else { 107 } else {
112 st->last_value = at91_adc_readl(st, AT91_ADC_LCDR); 108 st->last_value = at91_adc_readl(st, AT91_ADC_LCDR);
diff --git a/drivers/staging/iio/adc/max1363_core.c b/drivers/iio/adc/max1363.c
index d7b4ffcfa052..1e84b5b55093 100644
--- a/drivers/staging/iio/adc/max1363_core.c
+++ b/drivers/iio/adc/max1363.c
@@ -37,8 +37,151 @@
37#include <linux/iio/events.h> 37#include <linux/iio/events.h>
38#include <linux/iio/buffer.h> 38#include <linux/iio/buffer.h>
39#include <linux/iio/driver.h> 39#include <linux/iio/driver.h>
40#include <linux/iio/kfifo_buf.h>
41#include <linux/iio/trigger_consumer.h>
42
43#define MAX1363_SETUP_BYTE(a) ((a) | 0x80)
44
45/* There is a fair bit more defined here than currently
46 * used, but the intention is to support everything these
47 * chips do in the long run */
48
49/* see data sheets */
50/* max1363 and max1236, max1237, max1238, max1239 */
51#define MAX1363_SETUP_AIN3_IS_AIN3_REF_IS_VDD 0x00
52#define MAX1363_SETUP_AIN3_IS_REF_EXT_TO_REF 0x20
53#define MAX1363_SETUP_AIN3_IS_AIN3_REF_IS_INT 0x40
54#define MAX1363_SETUP_AIN3_IS_REF_REF_IS_INT 0x60
55#define MAX1363_SETUP_POWER_UP_INT_REF 0x10
56#define MAX1363_SETUP_POWER_DOWN_INT_REF 0x00
57
58/* think about includeing max11600 etc - more settings */
59#define MAX1363_SETUP_EXT_CLOCK 0x08
60#define MAX1363_SETUP_INT_CLOCK 0x00
61#define MAX1363_SETUP_UNIPOLAR 0x00
62#define MAX1363_SETUP_BIPOLAR 0x04
63#define MAX1363_SETUP_RESET 0x00
64#define MAX1363_SETUP_NORESET 0x02
65/* max1363 only - though don't care on others.
66 * For now monitor modes are not implemented as the relevant
67 * line is not connected on my test board.
68 * The definitions are here as I intend to add this soon.
69 */
70#define MAX1363_SETUP_MONITOR_SETUP 0x01
71
72/* Specific to the max1363 */
73#define MAX1363_MON_RESET_CHAN(a) (1 << ((a) + 4))
74#define MAX1363_MON_INT_ENABLE 0x01
75
76/* defined for readability reasons */
77/* All chips */
78#define MAX1363_CONFIG_BYTE(a) ((a))
79
80#define MAX1363_CONFIG_SE 0x01
81#define MAX1363_CONFIG_DE 0x00
82#define MAX1363_CONFIG_SCAN_TO_CS 0x00
83#define MAX1363_CONFIG_SCAN_SINGLE_8 0x20
84#define MAX1363_CONFIG_SCAN_MONITOR_MODE 0x40
85#define MAX1363_CONFIG_SCAN_SINGLE_1 0x60
86/* max123{6-9} only */
87#define MAX1236_SCAN_MID_TO_CHANNEL 0x40
88
89/* max1363 only - merely part of channel selects or don't care for others*/
90#define MAX1363_CONFIG_EN_MON_MODE_READ 0x18
91
92#define MAX1363_CHANNEL_SEL(a) ((a) << 1)
93
94/* max1363 strictly 0x06 - but doesn't matter */
95#define MAX1363_CHANNEL_SEL_MASK 0x1E
96#define MAX1363_SCAN_MASK 0x60
97#define MAX1363_SE_DE_MASK 0x01
98
99#define MAX1363_MAX_CHANNELS 25
100/**
101 * struct max1363_mode - scan mode information
102 * @conf: The corresponding value of the configuration register
103 * @modemask: Bit mask corresponding to channels enabled in this mode
104 */
105struct max1363_mode {
106 int8_t conf;
107 DECLARE_BITMAP(modemask, MAX1363_MAX_CHANNELS);
108};
40 109
41#include "max1363.h" 110/* This must be maintained along side the max1363_mode_table in max1363_core */
111enum max1363_modes {
112 /* Single read of a single channel */
113 _s0, _s1, _s2, _s3, _s4, _s5, _s6, _s7, _s8, _s9, _s10, _s11,
114 /* Differential single read */
115 d0m1, d2m3, d4m5, d6m7, d8m9, d10m11,
116 d1m0, d3m2, d5m4, d7m6, d9m8, d11m10,
117 /* Scan to channel and mid to channel where overlapping */
118 s0to1, s0to2, s2to3, s0to3, s0to4, s0to5, s0to6,
119 s6to7, s0to7, s6to8, s0to8, s6to9,
120 s0to9, s6to10, s0to10, s6to11, s0to11,
121 /* Differential scan to channel and mid to channel where overlapping */
122 d0m1to2m3, d0m1to4m5, d0m1to6m7, d6m7to8m9,
123 d0m1to8m9, d6m7to10m11, d0m1to10m11, d1m0to3m2,
124 d1m0to5m4, d1m0to7m6, d7m6to9m8, d1m0to9m8,
125 d7m6to11m10, d1m0to11m10,
126};
127
128/**
129 * struct max1363_chip_info - chip specifc information
130 * @info: iio core function callbacks structure
131 * @channels: channel specification
132 * @num_channels: number of channels
133 * @mode_list: array of available scan modes
134 * @default_mode: the scan mode in which the chip starts up
135 * @int_vref_mv: the internal reference voltage
136 * @num_channels: number of channels
137 * @bits: accuracy of the adc in bits
138 */
139struct max1363_chip_info {
140 const struct iio_info *info;
141 const struct iio_chan_spec *channels;
142 int num_channels;
143 const enum max1363_modes *mode_list;
144 enum max1363_modes default_mode;
145 u16 int_vref_mv;
146 u8 num_modes;
147 u8 bits;
148};
149
150/**
151 * struct max1363_state - driver instance specific data
152 * @client: i2c_client
153 * @setupbyte: cache of current device setup byte
154 * @configbyte: cache of current device config byte
155 * @chip_info: chip model specific constants, available modes etc
156 * @current_mode: the scan mode of this chip
157 * @requestedmask: a valid requested set of channels
158 * @reg: supply regulator
159 * @monitor_on: whether monitor mode is enabled
160 * @monitor_speed: parameter corresponding to device monitor speed setting
161 * @mask_high: bitmask for enabled high thresholds
162 * @mask_low: bitmask for enabled low thresholds
163 * @thresh_high: high threshold values
164 * @thresh_low: low threshold values
165 */
166struct max1363_state {
167 struct i2c_client *client;
168 u8 setupbyte;
169 u8 configbyte;
170 const struct max1363_chip_info *chip_info;
171 const struct max1363_mode *current_mode;
172 u32 requestedmask;
173 struct regulator *reg;
174
175 /* Using monitor modes and buffer at the same time is
176 currently not supported */
177 bool monitor_on;
178 unsigned int monitor_speed:3;
179 u8 mask_high;
180 u8 mask_low;
181 /* 4x unipolar first then the fours bipolar ones */
182 s16 thresh_high[8];
183 s16 thresh_low[8];
184};
42 185
43#define MAX1363_MODE_SINGLE(_num, _mask) { \ 186#define MAX1363_MODE_SINGLE(_num, _mask) { \
44 .conf = MAX1363_CHANNEL_SEL(_num) \ 187 .conf = MAX1363_CHANNEL_SEL(_num) \
@@ -148,7 +291,7 @@ static const struct max1363_mode max1363_mode_table[] = {
148 MAX1363_MODE_DIFF_SCAN_TO_CHANNEL(11, 6, 0xFC0000), 291 MAX1363_MODE_DIFF_SCAN_TO_CHANNEL(11, 6, 0xFC0000),
149}; 292};
150 293
151const struct max1363_mode 294static const struct max1363_mode
152*max1363_match_mode(const unsigned long *mask, 295*max1363_match_mode(const unsigned long *mask,
153const struct max1363_chip_info *ci) 296const struct max1363_chip_info *ci)
154{ 297{
@@ -172,7 +315,7 @@ static int max1363_write_basic_config(struct i2c_client *client,
172 return i2c_master_send(client, tx_buf, 2); 315 return i2c_master_send(client, tx_buf, 2);
173} 316}
174 317
175int max1363_set_scan_mode(struct max1363_state *st) 318static int max1363_set_scan_mode(struct max1363_state *st)
176{ 319{
177 st->configbyte &= ~(MAX1363_CHANNEL_SEL_MASK 320 st->configbyte &= ~(MAX1363_CHANNEL_SEL_MASK
178 | MAX1363_SCAN_MASK 321 | MAX1363_SCAN_MASK
@@ -622,9 +765,9 @@ static int max1363_read_event_config(struct iio_dev *indio_dev,
622 u64 event_code) 765 u64 event_code)
623{ 766{
624 struct max1363_state *st = iio_priv(indio_dev); 767 struct max1363_state *st = iio_priv(indio_dev);
625
626 int val; 768 int val;
627 int number = IIO_EVENT_CODE_EXTRACT_CHAN(event_code); 769 int number = IIO_EVENT_CODE_EXTRACT_CHAN(event_code);
770
628 mutex_lock(&indio_dev->mlock); 771 mutex_lock(&indio_dev->mlock);
629 if (IIO_EVENT_CODE_EXTRACT_DIR(event_code) == IIO_EV_DIR_FALLING) 772 if (IIO_EVENT_CODE_EXTRACT_DIR(event_code) == IIO_EV_DIR_FALLING)
630 val = (1 << number) & st->mask_low; 773 val = (1 << number) & st->mask_low;
@@ -644,7 +787,7 @@ static int max1363_monitor_mode_update(struct max1363_state *st, int enabled)
644 const long *modemask; 787 const long *modemask;
645 788
646 if (!enabled) { 789 if (!enabled) {
647 /* transition to ring capture is not currently supported */ 790 /* transition to buffered capture is not currently supported */
648 st->setupbyte &= ~MAX1363_SETUP_MONITOR_SETUP; 791 st->setupbyte &= ~MAX1363_SETUP_MONITOR_SETUP;
649 st->configbyte &= ~MAX1363_SCAN_MASK; 792 st->configbyte &= ~MAX1363_SCAN_MASK;
650 st->monitor_on = false; 793 st->monitor_on = false;
@@ -826,8 +969,21 @@ static struct attribute_group max1363_event_attribute_group = {
826 .name = "events", 969 .name = "events",
827}; 970};
828 971
829#define MAX1363_EVENT_FUNCS \ 972static int max1363_update_scan_mode(struct iio_dev *indio_dev,
973 const unsigned long *scan_mask)
974{
975 struct max1363_state *st = iio_priv(indio_dev);
830 976
977 /*
978 * Need to figure out the current mode based upon the requested
979 * scan mask in iio_dev
980 */
981 st->current_mode = max1363_match_mode(scan_mask, st->chip_info);
982 if (!st->current_mode)
983 return -EINVAL;
984 max1363_set_scan_mode(st);
985 return 0;
986}
831 987
832static const struct iio_info max1238_info = { 988static const struct iio_info max1238_info = {
833 .read_raw = &max1363_read_raw, 989 .read_raw = &max1363_read_raw,
@@ -1230,8 +1386,6 @@ static const struct max1363_chip_info max1363_chip_info_tbl[] = {
1230 }, 1386 },
1231}; 1387};
1232 1388
1233
1234
1235static int max1363_initial_setup(struct max1363_state *st) 1389static int max1363_initial_setup(struct max1363_state *st)
1236{ 1390{
1237 st->setupbyte = MAX1363_SETUP_AIN3_IS_AIN3_REF_IS_VDD 1391 st->setupbyte = MAX1363_SETUP_AIN3_IS_AIN3_REF_IS_VDD
@@ -1269,34 +1423,137 @@ static int __devinit max1363_alloc_scan_masks(struct iio_dev *indio_dev)
1269 return 0; 1423 return 0;
1270} 1424}
1271 1425
1426
1427static irqreturn_t max1363_trigger_handler(int irq, void *p)
1428{
1429 struct iio_poll_func *pf = p;
1430 struct iio_dev *indio_dev = pf->indio_dev;
1431 struct max1363_state *st = iio_priv(indio_dev);
1432 s64 time_ns;
1433 __u8 *rxbuf;
1434 int b_sent;
1435 size_t d_size;
1436 unsigned long numvals = bitmap_weight(st->current_mode->modemask,
1437 MAX1363_MAX_CHANNELS);
1438
1439 /* Ensure the timestamp is 8 byte aligned */
1440 if (st->chip_info->bits != 8)
1441 d_size = numvals*2;
1442 else
1443 d_size = numvals;
1444 if (indio_dev->scan_timestamp) {
1445 d_size += sizeof(s64);
1446 if (d_size % sizeof(s64))
1447 d_size += sizeof(s64) - (d_size % sizeof(s64));
1448 }
1449 /* Monitor mode prevents reading. Whilst not currently implemented
1450 * might as well have this test in here in the meantime as it does
1451 * no harm.
1452 */
1453 if (numvals == 0)
1454 goto done;
1455
1456 rxbuf = kmalloc(d_size, GFP_KERNEL);
1457 if (rxbuf == NULL)
1458 goto done;
1459 if (st->chip_info->bits != 8)
1460 b_sent = i2c_master_recv(st->client, rxbuf, numvals*2);
1461 else
1462 b_sent = i2c_master_recv(st->client, rxbuf, numvals);
1463 if (b_sent < 0)
1464 goto done_free;
1465
1466 time_ns = iio_get_time_ns();
1467
1468 if (indio_dev->scan_timestamp)
1469 memcpy(rxbuf + d_size - sizeof(s64), &time_ns, sizeof(time_ns));
1470 iio_push_to_buffers(indio_dev, rxbuf);
1471
1472done_free:
1473 kfree(rxbuf);
1474done:
1475 iio_trigger_notify_done(indio_dev->trig);
1476
1477 return IRQ_HANDLED;
1478}
1479
1480static const struct iio_buffer_setup_ops max1363_buffered_setup_ops = {
1481 .postenable = &iio_triggered_buffer_postenable,
1482 .preenable = &iio_sw_buffer_preenable,
1483 .predisable = &iio_triggered_buffer_predisable,
1484};
1485
1486static int max1363_register_buffered_funcs_and_init(struct iio_dev *indio_dev)
1487{
1488 struct max1363_state *st = iio_priv(indio_dev);
1489 int ret = 0;
1490
1491 indio_dev->buffer = iio_kfifo_allocate(indio_dev);
1492 if (!indio_dev->buffer) {
1493 ret = -ENOMEM;
1494 goto error_ret;
1495 }
1496 indio_dev->pollfunc = iio_alloc_pollfunc(NULL,
1497 &max1363_trigger_handler,
1498 IRQF_ONESHOT,
1499 indio_dev,
1500 "%s_consumer%d",
1501 st->client->name,
1502 indio_dev->id);
1503 if (indio_dev->pollfunc == NULL) {
1504 ret = -ENOMEM;
1505 goto error_deallocate_sw_rb;
1506 }
1507 /* Buffer functions - here trigger setup related */
1508 indio_dev->setup_ops = &max1363_buffered_setup_ops;
1509
1510 /* Flag that polled buffering is possible */
1511 indio_dev->modes |= INDIO_BUFFER_TRIGGERED;
1512
1513 return 0;
1514
1515error_deallocate_sw_rb:
1516 iio_kfifo_free(indio_dev->buffer);
1517error_ret:
1518 return ret;
1519}
1520
1521static void max1363_buffer_cleanup(struct iio_dev *indio_dev)
1522{
1523 /* ensure that the trigger has been detached */
1524 iio_dealloc_pollfunc(indio_dev->pollfunc);
1525 iio_kfifo_free(indio_dev->buffer);
1526}
1527
1272static int __devinit max1363_probe(struct i2c_client *client, 1528static int __devinit max1363_probe(struct i2c_client *client,
1273 const struct i2c_device_id *id) 1529 const struct i2c_device_id *id)
1274{ 1530{
1275 int ret; 1531 int ret;
1276 struct max1363_state *st; 1532 struct max1363_state *st;
1277 struct iio_dev *indio_dev; 1533 struct iio_dev *indio_dev;
1278 struct regulator *reg;
1279
1280 reg = regulator_get(&client->dev, "vcc");
1281 if (IS_ERR(reg)) {
1282 ret = PTR_ERR(reg);
1283 goto error_out;
1284 }
1285
1286 ret = regulator_enable(reg);
1287 if (ret)
1288 goto error_put_reg;
1289 1534
1290 indio_dev = iio_device_alloc(sizeof(struct max1363_state)); 1535 indio_dev = iio_device_alloc(sizeof(struct max1363_state));
1291 if (indio_dev == NULL) { 1536 if (indio_dev == NULL) {
1292 ret = -ENOMEM; 1537 ret = -ENOMEM;
1293 goto error_disable_reg; 1538 goto error_out;
1294 } 1539 }
1540
1295 ret = iio_map_array_register(indio_dev, client->dev.platform_data); 1541 ret = iio_map_array_register(indio_dev, client->dev.platform_data);
1296 if (ret < 0) 1542 if (ret < 0)
1297 goto error_free_device; 1543 goto error_free_device;
1544
1298 st = iio_priv(indio_dev); 1545 st = iio_priv(indio_dev);
1299 st->reg = reg; 1546
1547 st->reg = regulator_get(&client->dev, "vcc");
1548 if (IS_ERR(st->reg)) {
1549 ret = PTR_ERR(st->reg);
1550 goto error_unregister_map;
1551 }
1552
1553 ret = regulator_enable(st->reg);
1554 if (ret)
1555 goto error_put_reg;
1556
1300 /* this is only used for device removal purposes */ 1557 /* this is only used for device removal purposes */
1301 i2c_set_clientdata(client, indio_dev); 1558 i2c_set_clientdata(client, indio_dev);
1302 1559
@@ -1305,7 +1562,7 @@ static int __devinit max1363_probe(struct i2c_client *client,
1305 1562
1306 ret = max1363_alloc_scan_masks(indio_dev); 1563 ret = max1363_alloc_scan_masks(indio_dev);
1307 if (ret) 1564 if (ret)
1308 goto error_unregister_map; 1565 goto error_disable_reg;
1309 1566
1310 /* Estabilish that the iio_dev is a child of the i2c device */ 1567 /* Estabilish that the iio_dev is a child of the i2c device */
1311 indio_dev->dev.parent = &client->dev; 1568 indio_dev->dev.parent = &client->dev;
@@ -1320,7 +1577,7 @@ static int __devinit max1363_probe(struct i2c_client *client,
1320 if (ret < 0) 1577 if (ret < 0)
1321 goto error_free_available_scan_masks; 1578 goto error_free_available_scan_masks;
1322 1579
1323 ret = max1363_register_ring_funcs_and_init(indio_dev); 1580 ret = max1363_register_buffered_funcs_and_init(indio_dev);
1324 if (ret) 1581 if (ret)
1325 goto error_free_available_scan_masks; 1582 goto error_free_available_scan_masks;
1326 1583
@@ -1328,7 +1585,7 @@ static int __devinit max1363_probe(struct i2c_client *client,
1328 st->chip_info->channels, 1585 st->chip_info->channels,
1329 st->chip_info->num_channels); 1586 st->chip_info->num_channels);
1330 if (ret) 1587 if (ret)
1331 goto error_cleanup_ring; 1588 goto error_cleanup_buffer;
1332 1589
1333 if (client->irq) { 1590 if (client->irq) {
1334 ret = request_threaded_irq(st->client->irq, 1591 ret = request_threaded_irq(st->client->irq,
@@ -1339,7 +1596,7 @@ static int __devinit max1363_probe(struct i2c_client *client,
1339 indio_dev); 1596 indio_dev);
1340 1597
1341 if (ret) 1598 if (ret)
1342 goto error_uninit_ring; 1599 goto error_uninit_buffer;
1343 } 1600 }
1344 1601
1345 ret = iio_device_register(indio_dev); 1602 ret = iio_device_register(indio_dev);
@@ -1349,20 +1606,20 @@ static int __devinit max1363_probe(struct i2c_client *client,
1349 return 0; 1606 return 0;
1350error_free_irq: 1607error_free_irq:
1351 free_irq(st->client->irq, indio_dev); 1608 free_irq(st->client->irq, indio_dev);
1352error_uninit_ring: 1609error_uninit_buffer:
1353 iio_buffer_unregister(indio_dev); 1610 iio_buffer_unregister(indio_dev);
1354error_cleanup_ring: 1611error_cleanup_buffer:
1355 max1363_ring_cleanup(indio_dev); 1612 max1363_buffer_cleanup(indio_dev);
1356error_free_available_scan_masks: 1613error_free_available_scan_masks:
1357 kfree(indio_dev->available_scan_masks); 1614 kfree(indio_dev->available_scan_masks);
1358error_unregister_map: 1615error_unregister_map:
1359 iio_map_array_unregister(indio_dev, client->dev.platform_data); 1616 iio_map_array_unregister(indio_dev, client->dev.platform_data);
1360error_free_device:
1361 iio_device_free(indio_dev);
1362error_disable_reg: 1617error_disable_reg:
1363 regulator_disable(reg); 1618 regulator_disable(st->reg);
1364error_put_reg: 1619error_put_reg:
1365 regulator_put(reg); 1620 regulator_put(st->reg);
1621error_free_device:
1622 iio_device_free(indio_dev);
1366error_out: 1623error_out:
1367 return ret; 1624 return ret;
1368} 1625}
@@ -1371,17 +1628,16 @@ static int __devexit max1363_remove(struct i2c_client *client)
1371{ 1628{
1372 struct iio_dev *indio_dev = i2c_get_clientdata(client); 1629 struct iio_dev *indio_dev = i2c_get_clientdata(client);
1373 struct max1363_state *st = iio_priv(indio_dev); 1630 struct max1363_state *st = iio_priv(indio_dev);
1374 struct regulator *reg = st->reg;
1375 1631
1376 iio_device_unregister(indio_dev); 1632 iio_device_unregister(indio_dev);
1377 if (client->irq) 1633 if (client->irq)
1378 free_irq(st->client->irq, indio_dev); 1634 free_irq(st->client->irq, indio_dev);
1379 iio_buffer_unregister(indio_dev); 1635 iio_buffer_unregister(indio_dev);
1380 max1363_ring_cleanup(indio_dev); 1636 max1363_buffer_cleanup(indio_dev);
1381 kfree(indio_dev->available_scan_masks); 1637 kfree(indio_dev->available_scan_masks);
1382 if (!IS_ERR(reg)) { 1638 if (!IS_ERR(st->reg)) {
1383 regulator_disable(reg); 1639 regulator_disable(st->reg);
1384 regulator_put(reg); 1640 regulator_put(st->reg);
1385 } 1641 }
1386 iio_map_array_unregister(indio_dev, client->dev.platform_data); 1642 iio_map_array_unregister(indio_dev, client->dev.platform_data);
1387 iio_device_free(indio_dev); 1643 iio_device_free(indio_dev);
diff --git a/drivers/iio/adc/ti-adc081c.c b/drivers/iio/adc/ti-adc081c.c
new file mode 100644
index 000000000000..f4a46dd8f43b
--- /dev/null
+++ b/drivers/iio/adc/ti-adc081c.c
@@ -0,0 +1,161 @@
1/*
2 * Copyright (C) 2012 Avionic Design GmbH
3 *
4 * This program is free software; you can redistribute it and/or modify
5 * it under the terms of the GNU General Public License version 2 as
6 * published by the Free Software Foundation.
7 */
8
9#include <linux/err.h>
10#include <linux/i2c.h>
11#include <linux/module.h>
12
13#include <linux/iio/iio.h>
14#include <linux/regulator/consumer.h>
15
16struct adc081c {
17 struct i2c_client *i2c;
18 struct regulator *ref;
19};
20
21#define REG_CONV_RES 0x00
22
23static int adc081c_read_raw(struct iio_dev *iio,
24 struct iio_chan_spec const *channel, int *value,
25 int *shift, long mask)
26{
27 struct adc081c *adc = iio_priv(iio);
28 int err;
29
30 switch (mask) {
31 case IIO_CHAN_INFO_RAW:
32 err = i2c_smbus_read_word_swapped(adc->i2c, REG_CONV_RES);
33 if (err < 0)
34 return err;
35
36 *value = (err >> 4) & 0xff;
37 return IIO_VAL_INT;
38
39 case IIO_CHAN_INFO_SCALE:
40 err = regulator_get_voltage(adc->ref);
41 if (err < 0)
42 return err;
43
44 *value = err / 1000;
45 *shift = 8;
46
47 return IIO_VAL_FRACTIONAL_LOG2;
48
49 default:
50 break;
51 }
52
53 return -EINVAL;
54}
55
56static const struct iio_chan_spec adc081c_channel = {
57 .type = IIO_VOLTAGE,
58 .info_mask = IIO_CHAN_INFO_SCALE_SHARED_BIT |
59 IIO_CHAN_INFO_RAW_SEPARATE_BIT,
60};
61
62static const struct iio_info adc081c_info = {
63 .read_raw = adc081c_read_raw,
64 .driver_module = THIS_MODULE,
65};
66
67static int adc081c_probe(struct i2c_client *client,
68 const struct i2c_device_id *id)
69{
70 struct iio_dev *iio;
71 struct adc081c *adc;
72 int err;
73
74 if (!i2c_check_functionality(client->adapter, I2C_FUNC_SMBUS_WORD_DATA))
75 return -ENODEV;
76
77 iio = iio_device_alloc(sizeof(*adc));
78 if (!iio)
79 return -ENOMEM;
80
81 adc = iio_priv(iio);
82 adc->i2c = client;
83
84 adc->ref = regulator_get(&client->dev, "vref");
85 if (IS_ERR(adc->ref)) {
86 err = PTR_ERR(adc->ref);
87 goto iio_free;
88 }
89
90 err = regulator_enable(adc->ref);
91 if (err < 0)
92 goto regulator_put;
93
94 iio->dev.parent = &client->dev;
95 iio->name = dev_name(&client->dev);
96 iio->modes = INDIO_DIRECT_MODE;
97 iio->info = &adc081c_info;
98
99 iio->channels = &adc081c_channel;
100 iio->num_channels = 1;
101
102 err = iio_device_register(iio);
103 if (err < 0)
104 goto regulator_disable;
105
106 i2c_set_clientdata(client, iio);
107
108 return 0;
109
110regulator_disable:
111 regulator_disable(adc->ref);
112regulator_put:
113 regulator_put(adc->ref);
114iio_free:
115 iio_device_free(iio);
116
117 return err;
118}
119
120static int adc081c_remove(struct i2c_client *client)
121{
122 struct iio_dev *iio = i2c_get_clientdata(client);
123 struct adc081c *adc = iio_priv(iio);
124
125 iio_device_unregister(iio);
126 regulator_disable(adc->ref);
127 regulator_put(adc->ref);
128 iio_device_free(iio);
129
130 return 0;
131}
132
133static const struct i2c_device_id adc081c_id[] = {
134 { "adc081c", 0 },
135 { }
136};
137MODULE_DEVICE_TABLE(i2c, adc081c_id);
138
139#ifdef CONFIG_OF
140static const struct of_device_id adc081c_of_match[] = {
141 { .compatible = "ti,adc081c" },
142 { }
143};
144MODULE_DEVICE_TABLE(of, adc081c_of_match);
145#endif
146
147static struct i2c_driver adc081c_driver = {
148 .driver = {
149 .name = "adc081c",
150 .owner = THIS_MODULE,
151 .of_match_table = of_match_ptr(adc081c_of_match),
152 },
153 .probe = adc081c_probe,
154 .remove = adc081c_remove,
155 .id_table = adc081c_id,
156};
157module_i2c_driver(adc081c_driver);
158
159MODULE_AUTHOR("Thierry Reding <thierry.reding@avionic-design.de>");
160MODULE_DESCRIPTION("Texas Instruments ADC081C021/027 driver");
161MODULE_LICENSE("GPL v2");
diff --git a/drivers/iio/buffer_cb.c b/drivers/iio/buffer_cb.c
new file mode 100644
index 000000000000..4d40e24f3721
--- /dev/null
+++ b/drivers/iio/buffer_cb.c
@@ -0,0 +1,113 @@
1#include <linux/kernel.h>
2#include <linux/slab.h>
3#include <linux/err.h>
4#include <linux/export.h>
5#include <linux/iio/buffer.h>
6#include <linux/iio/consumer.h>
7
8struct iio_cb_buffer {
9 struct iio_buffer buffer;
10 int (*cb)(u8 *data, void *private);
11 void *private;
12 struct iio_channel *channels;
13};
14
15static int iio_buffer_cb_store_to(struct iio_buffer *buffer, u8 *data)
16{
17 struct iio_cb_buffer *cb_buff = container_of(buffer,
18 struct iio_cb_buffer,
19 buffer);
20
21 return cb_buff->cb(data, cb_buff->private);
22}
23
24static struct iio_buffer_access_funcs iio_cb_access = {
25 .store_to = &iio_buffer_cb_store_to,
26};
27
28struct iio_cb_buffer *iio_channel_get_all_cb(const char *name,
29 int (*cb)(u8 *data,
30 void *private),
31 void *private)
32{
33 int ret;
34 struct iio_cb_buffer *cb_buff;
35 struct iio_dev *indio_dev;
36 struct iio_channel *chan;
37
38 cb_buff = kzalloc(sizeof(*cb_buff), GFP_KERNEL);
39 if (cb_buff == NULL) {
40 ret = -ENOMEM;
41 goto error_ret;
42 }
43
44 cb_buff->private = private;
45 cb_buff->cb = cb;
46 cb_buff->buffer.access = &iio_cb_access;
47 INIT_LIST_HEAD(&cb_buff->buffer.demux_list);
48
49 cb_buff->channels = iio_channel_get_all(name);
50 if (IS_ERR(cb_buff->channels)) {
51 ret = PTR_ERR(cb_buff->channels);
52 goto error_free_cb_buff;
53 }
54
55 indio_dev = cb_buff->channels[0].indio_dev;
56 cb_buff->buffer.scan_mask
57 = kcalloc(BITS_TO_LONGS(indio_dev->masklength), sizeof(long),
58 GFP_KERNEL);
59 if (cb_buff->buffer.scan_mask == NULL) {
60 ret = -ENOMEM;
61 goto error_release_channels;
62 }
63 chan = &cb_buff->channels[0];
64 while (chan->indio_dev) {
65 if (chan->indio_dev != indio_dev) {
66 ret = -EINVAL;
67 goto error_release_channels;
68 }
69 set_bit(chan->channel->scan_index,
70 cb_buff->buffer.scan_mask);
71 chan++;
72 }
73
74 return cb_buff;
75
76error_release_channels:
77 iio_channel_release_all(cb_buff->channels);
78error_free_cb_buff:
79 kfree(cb_buff);
80error_ret:
81 return ERR_PTR(ret);
82}
83EXPORT_SYMBOL_GPL(iio_channel_get_all_cb);
84
85int iio_channel_start_all_cb(struct iio_cb_buffer *cb_buff)
86{
87 return iio_update_buffers(cb_buff->channels[0].indio_dev,
88 &cb_buff->buffer,
89 NULL);
90}
91EXPORT_SYMBOL_GPL(iio_channel_start_all_cb);
92
93void iio_channel_stop_all_cb(struct iio_cb_buffer *cb_buff)
94{
95 iio_update_buffers(cb_buff->channels[0].indio_dev,
96 NULL,
97 &cb_buff->buffer);
98}
99EXPORT_SYMBOL_GPL(iio_channel_stop_all_cb);
100
101void iio_channel_release_all_cb(struct iio_cb_buffer *cb_buff)
102{
103 iio_channel_release_all(cb_buff->channels);
104 kfree(cb_buff);
105}
106EXPORT_SYMBOL_GPL(iio_channel_release_all_cb);
107
108struct iio_channel
109*iio_channel_cb_get_channels(const struct iio_cb_buffer *cb_buffer)
110{
111 return cb_buffer->channels;
112}
113EXPORT_SYMBOL_GPL(iio_channel_cb_get_channels);
diff --git a/drivers/iio/common/hid-sensors/Kconfig b/drivers/iio/common/hid-sensors/Kconfig
index 8e63d81d652a..ae10778da7aa 100644
--- a/drivers/iio/common/hid-sensors/Kconfig
+++ b/drivers/iio/common/hid-sensors/Kconfig
@@ -15,7 +15,7 @@ config HID_SENSOR_IIO_COMMON
15 attributes. 15 attributes.
16 16
17config HID_SENSOR_ENUM_BASE_QUIRKS 17config HID_SENSOR_ENUM_BASE_QUIRKS
18 tristate "ENUM base quirks for HID Sensor IIO drivers" 18 bool "ENUM base quirks for HID Sensor IIO drivers"
19 depends on HID_SENSOR_IIO_COMMON 19 depends on HID_SENSOR_IIO_COMMON
20 help 20 help
21 Say yes here to build support for sensor hub FW using 21 Say yes here to build support for sensor hub FW using
diff --git a/drivers/iio/common/hid-sensors/hid-sensor-trigger.c b/drivers/iio/common/hid-sensors/hid-sensor-trigger.c
index d4b790d18efb..d60198a6ca29 100644
--- a/drivers/iio/common/hid-sensors/hid-sensor-trigger.c
+++ b/drivers/iio/common/hid-sensors/hid-sensor-trigger.c
@@ -36,10 +36,8 @@ static int hid_sensor_data_rdy_trigger_set_state(struct iio_trigger *trig,
36 int state_val; 36 int state_val;
37 37
38 state_val = state ? 1 : 0; 38 state_val = state ? 1 : 0;
39#if (defined CONFIG_HID_SENSOR_ENUM_BASE_QUIRKS) || \ 39 if (IS_ENABLED(CONFIG_HID_SENSOR_ENUM_BASE_QUIRKS))
40 (defined CONFIG_HID_SENSOR_ENUM_BASE_QUIRKS_MODULE) 40 ++state_val;
41 ++state_val;
42#endif
43 st->data_ready = state; 41 st->data_ready = state;
44 sensor_hub_set_feature(st->hsdev, st->power_state.report_id, 42 sensor_hub_set_feature(st->hsdev, st->power_state.report_id,
45 st->power_state.index, 43 st->power_state.index,
diff --git a/drivers/iio/dac/Kconfig b/drivers/iio/dac/Kconfig
index b1c0ee5294ca..f4a6f0838327 100644
--- a/drivers/iio/dac/Kconfig
+++ b/drivers/iio/dac/Kconfig
@@ -67,6 +67,16 @@ config AD5446
67 To compile this driver as a module, choose M here: the 67 To compile this driver as a module, choose M here: the
68 module will be called ad5446. 68 module will be called ad5446.
69 69
70config AD5449
71 tristate "Analog Device AD5449 and similar DACs driver"
72 depends on SPI_MASTER
73 help
74 Say yes here to build support for Analog Devices AD5415, AD5426, AD5429,
75 AD5432, AD5439, AD5443, AD5449 Digital to Analog Converters.
76
77 To compile this driver as a module, choose M here: the
78 module will be called ad5449.
79
70config AD5504 80config AD5504
71 tristate "Analog Devices AD5504/AD5501 DAC SPI driver" 81 tristate "Analog Devices AD5504/AD5501 DAC SPI driver"
72 depends on SPI 82 depends on SPI
@@ -122,7 +132,7 @@ config AD5686
122 132
123config MAX517 133config MAX517
124 tristate "Maxim MAX517/518/519 DAC driver" 134 tristate "Maxim MAX517/518/519 DAC driver"
125 depends on I2C && EXPERIMENTAL 135 depends on I2C
126 help 136 help
127 If you say yes here you get support for the Maxim chips MAX517, 137 If you say yes here you get support for the Maxim chips MAX517,
128 MAX518 and MAX519 (I2C 8-Bit DACs with rail-to-rail outputs). 138 MAX518 and MAX519 (I2C 8-Bit DACs with rail-to-rail outputs).
diff --git a/drivers/iio/dac/Makefile b/drivers/iio/dac/Makefile
index c0d333b23ba3..5b528ebb3343 100644
--- a/drivers/iio/dac/Makefile
+++ b/drivers/iio/dac/Makefile
@@ -9,6 +9,7 @@ obj-$(CONFIG_AD5624R_SPI) += ad5624r_spi.o
9obj-$(CONFIG_AD5064) += ad5064.o 9obj-$(CONFIG_AD5064) += ad5064.o
10obj-$(CONFIG_AD5504) += ad5504.o 10obj-$(CONFIG_AD5504) += ad5504.o
11obj-$(CONFIG_AD5446) += ad5446.o 11obj-$(CONFIG_AD5446) += ad5446.o
12obj-$(CONFIG_AD5449) += ad5449.o
12obj-$(CONFIG_AD5755) += ad5755.o 13obj-$(CONFIG_AD5755) += ad5755.o
13obj-$(CONFIG_AD5764) += ad5764.o 14obj-$(CONFIG_AD5764) += ad5764.o
14obj-$(CONFIG_AD5791) += ad5791.o 15obj-$(CONFIG_AD5791) += ad5791.o
diff --git a/drivers/iio/dac/ad5449.c b/drivers/iio/dac/ad5449.c
new file mode 100644
index 000000000000..0ee6f8eeba8d
--- /dev/null
+++ b/drivers/iio/dac/ad5449.c
@@ -0,0 +1,376 @@
1/*
2 * AD5415, AD5426, AD5429, AD5432, AD5439, AD5443, AD5449 Digital to Analog
3 * Converter driver.
4 *
5 * Copyright 2012 Analog Devices Inc.
6 * Author: Lars-Peter Clausen <lars@metafoo.de>
7 *
8 * Licensed under the GPL-2.
9 */
10
11#include <linux/device.h>
12#include <linux/err.h>
13#include <linux/module.h>
14#include <linux/kernel.h>
15#include <linux/spi/spi.h>
16#include <linux/slab.h>
17#include <linux/sysfs.h>
18#include <linux/regulator/consumer.h>
19#include <asm/unaligned.h>
20
21#include <linux/iio/iio.h>
22#include <linux/iio/sysfs.h>
23
24#include <linux/platform_data/ad5449.h>
25
26#define AD5449_MAX_CHANNELS 2
27#define AD5449_MAX_VREFS 2
28
29#define AD5449_CMD_NOOP 0x0
30#define AD5449_CMD_LOAD_AND_UPDATE(x) (0x1 + (x) * 3)
31#define AD5449_CMD_READ(x) (0x2 + (x) * 3)
32#define AD5449_CMD_LOAD(x) (0x3 + (x) * 3)
33#define AD5449_CMD_CTRL 13
34
35#define AD5449_CTRL_SDO_OFFSET 10
36#define AD5449_CTRL_DAISY_CHAIN BIT(9)
37#define AD5449_CTRL_HCLR_TO_MIDSCALE BIT(8)
38#define AD5449_CTRL_SAMPLE_RISING BIT(7)
39
40/**
41 * struct ad5449_chip_info - chip specific information
42 * @channels: Channel specification
43 * @num_channels: Number of channels
44 * @has_ctrl: Chip has a control register
45 */
46struct ad5449_chip_info {
47 const struct iio_chan_spec *channels;
48 unsigned int num_channels;
49 bool has_ctrl;
50};
51
52/**
53 * struct ad5449 - driver instance specific data
54 * @spi: the SPI device for this driver instance
55 * @chip_info: chip model specific constants, available modes etc
56 * @vref_reg: vref supply regulators
57 * @has_sdo: whether the SDO line is connected
58 * @dac_cache: Cache for the DAC values
59 * @data: spi transfer buffers
60 */
61struct ad5449 {
62 struct spi_device *spi;
63 const struct ad5449_chip_info *chip_info;
64 struct regulator_bulk_data vref_reg[AD5449_MAX_VREFS];
65
66 bool has_sdo;
67 uint16_t dac_cache[AD5449_MAX_CHANNELS];
68
69 /*
70 * DMA (thus cache coherency maintenance) requires the
71 * transfer buffers to live in their own cache lines.
72 */
73 __be16 data[2] ____cacheline_aligned;
74};
75
76enum ad5449_type {
77 ID_AD5426,
78 ID_AD5429,
79 ID_AD5432,
80 ID_AD5439,
81 ID_AD5443,
82 ID_AD5449,
83};
84
85static int ad5449_write(struct iio_dev *indio_dev, unsigned int addr,
86 unsigned int val)
87{
88 struct ad5449 *st = iio_priv(indio_dev);
89 int ret;
90
91 mutex_lock(&indio_dev->mlock);
92 st->data[0] = cpu_to_be16((addr << 12) | val);
93 ret = spi_write(st->spi, st->data, 2);
94 mutex_unlock(&indio_dev->mlock);
95
96 return ret;
97}
98
99static int ad5449_read(struct iio_dev *indio_dev, unsigned int addr,
100 unsigned int *val)
101{
102 struct ad5449 *st = iio_priv(indio_dev);
103 int ret;
104 struct spi_message msg;
105 struct spi_transfer t[] = {
106 {
107 .tx_buf = &st->data[0],
108 .len = 2,
109 .cs_change = 1,
110 }, {
111 .tx_buf = &st->data[1],
112 .rx_buf = &st->data[1],
113 .len = 2,
114 },
115 };
116
117 spi_message_init(&msg);
118 spi_message_add_tail(&t[0], &msg);
119 spi_message_add_tail(&t[1], &msg);
120
121 mutex_lock(&indio_dev->mlock);
122 st->data[0] = cpu_to_be16(addr << 12);
123 st->data[1] = cpu_to_be16(AD5449_CMD_NOOP);
124
125 ret = spi_sync(st->spi, &msg);
126 if (ret < 0)
127 goto out_unlock;
128
129 *val = be16_to_cpu(st->data[1]);
130
131out_unlock:
132 mutex_unlock(&indio_dev->mlock);
133 return ret;
134}
135
136static int ad5449_read_raw(struct iio_dev *indio_dev,
137 struct iio_chan_spec const *chan, int *val, int *val2, long info)
138{
139 struct ad5449 *st = iio_priv(indio_dev);
140 struct regulator_bulk_data *reg;
141 int scale_uv;
142 int ret;
143
144 switch (info) {
145 case IIO_CHAN_INFO_RAW:
146 if (st->has_sdo) {
147 ret = ad5449_read(indio_dev,
148 AD5449_CMD_READ(chan->address), val);
149 if (ret)
150 return ret;
151 *val &= 0xfff;
152 } else {
153 *val = st->dac_cache[chan->address];
154 }
155
156 return IIO_VAL_INT;
157 case IIO_CHAN_INFO_SCALE:
158 reg = &st->vref_reg[chan->channel];
159 scale_uv = regulator_get_voltage(reg->consumer);
160 if (scale_uv < 0)
161 return scale_uv;
162
163 *val = scale_uv / 1000;
164 *val2 = chan->scan_type.realbits;
165
166 return IIO_VAL_FRACTIONAL_LOG2;
167 default:
168 break;
169 }
170
171 return -EINVAL;
172}
173
174static int ad5449_write_raw(struct iio_dev *indio_dev,
175 struct iio_chan_spec const *chan, int val, int val2, long info)
176{
177 struct ad5449 *st = iio_priv(indio_dev);
178 int ret;
179
180 switch (info) {
181 case IIO_CHAN_INFO_RAW:
182 if (val < 0 || val >= (1 << chan->scan_type.realbits))
183 return -EINVAL;
184
185 ret = ad5449_write(indio_dev,
186 AD5449_CMD_LOAD_AND_UPDATE(chan->address),
187 val << chan->scan_type.shift);
188 if (ret == 0)
189 st->dac_cache[chan->address] = val;
190 break;
191 default:
192 ret = -EINVAL;
193 }
194
195 return ret;
196}
197
198static const struct iio_info ad5449_info = {
199 .read_raw = ad5449_read_raw,
200 .write_raw = ad5449_write_raw,
201 .driver_module = THIS_MODULE,
202};
203
204#define AD5449_CHANNEL(chan, bits) { \
205 .type = IIO_VOLTAGE, \
206 .indexed = 1, \
207 .output = 1, \
208 .channel = (chan), \
209 .info_mask = IIO_CHAN_INFO_RAW_SEPARATE_BIT | \
210 IIO_CHAN_INFO_SCALE_SEPARATE_BIT, \
211 .address = (chan), \
212 .scan_type = IIO_ST('u', (bits), 16, 12 - (bits)), \
213}
214
215#define DECLARE_AD5449_CHANNELS(name, bits) \
216const struct iio_chan_spec name[] = { \
217 AD5449_CHANNEL(0, bits), \
218 AD5449_CHANNEL(1, bits), \
219}
220
221static DECLARE_AD5449_CHANNELS(ad5429_channels, 8);
222static DECLARE_AD5449_CHANNELS(ad5439_channels, 10);
223static DECLARE_AD5449_CHANNELS(ad5449_channels, 12);
224
225static const struct ad5449_chip_info ad5449_chip_info[] = {
226 [ID_AD5426] = {
227 .channels = ad5429_channels,
228 .num_channels = 1,
229 .has_ctrl = false,
230 },
231 [ID_AD5429] = {
232 .channels = ad5429_channels,
233 .num_channels = 2,
234 .has_ctrl = true,
235 },
236 [ID_AD5432] = {
237 .channels = ad5439_channels,
238 .num_channels = 1,
239 .has_ctrl = false,
240 },
241 [ID_AD5439] = {
242 .channels = ad5439_channels,
243 .num_channels = 2,
244 .has_ctrl = true,
245 },
246 [ID_AD5443] = {
247 .channels = ad5449_channels,
248 .num_channels = 1,
249 .has_ctrl = false,
250 },
251 [ID_AD5449] = {
252 .channels = ad5449_channels,
253 .num_channels = 2,
254 .has_ctrl = true,
255 },
256};
257
258static const char *ad5449_vref_name(struct ad5449 *st, int n)
259{
260 if (st->chip_info->num_channels == 1)
261 return "VREF";
262
263 if (n == 0)
264 return "VREFA";
265 else
266 return "VREFB";
267}
268
269static int __devinit ad5449_spi_probe(struct spi_device *spi)
270{
271 struct ad5449_platform_data *pdata = spi->dev.platform_data;
272 const struct spi_device_id *id = spi_get_device_id(spi);
273 struct iio_dev *indio_dev;
274 struct ad5449 *st;
275 unsigned int i;
276 int ret;
277
278 indio_dev = iio_device_alloc(sizeof(*st));
279 if (indio_dev == NULL)
280 return -ENOMEM;
281
282 st = iio_priv(indio_dev);
283 spi_set_drvdata(spi, indio_dev);
284
285 st->chip_info = &ad5449_chip_info[id->driver_data];
286 st->spi = spi;
287
288 for (i = 0; i < st->chip_info->num_channels; ++i)
289 st->vref_reg[i].supply = ad5449_vref_name(st, i);
290
291 ret = regulator_bulk_get(&spi->dev, st->chip_info->num_channels,
292 st->vref_reg);
293 if (ret)
294 goto error_free;
295
296 ret = regulator_bulk_enable(st->chip_info->num_channels, st->vref_reg);
297 if (ret)
298 goto error_free_reg;
299
300 indio_dev->dev.parent = &spi->dev;
301 indio_dev->name = id->name;
302 indio_dev->info = &ad5449_info;
303 indio_dev->modes = INDIO_DIRECT_MODE;
304 indio_dev->channels = st->chip_info->channels;
305 indio_dev->num_channels = st->chip_info->num_channels;
306
307 if (st->chip_info->has_ctrl) {
308 unsigned int ctrl = 0x00;
309 if (pdata) {
310 if (pdata->hardware_clear_to_midscale)
311 ctrl |= AD5449_CTRL_HCLR_TO_MIDSCALE;
312 ctrl |= pdata->sdo_mode << AD5449_CTRL_SDO_OFFSET;
313 st->has_sdo = pdata->sdo_mode != AD5449_SDO_DISABLED;
314 } else {
315 st->has_sdo = true;
316 }
317 ad5449_write(indio_dev, AD5449_CMD_CTRL, ctrl);
318 }
319
320 ret = iio_device_register(indio_dev);
321 if (ret)
322 goto error_disable_reg;
323
324 return 0;
325
326error_disable_reg:
327 regulator_bulk_disable(st->chip_info->num_channels, st->vref_reg);
328error_free_reg:
329 regulator_bulk_free(st->chip_info->num_channels, st->vref_reg);
330error_free:
331 iio_device_free(indio_dev);
332
333 return ret;
334}
335
336static int __devexit ad5449_spi_remove(struct spi_device *spi)
337{
338 struct iio_dev *indio_dev = spi_get_drvdata(spi);
339 struct ad5449 *st = iio_priv(indio_dev);
340
341 iio_device_unregister(indio_dev);
342
343 regulator_bulk_disable(st->chip_info->num_channels, st->vref_reg);
344 regulator_bulk_free(st->chip_info->num_channels, st->vref_reg);
345
346 iio_device_free(indio_dev);
347
348 return 0;
349}
350
351static const struct spi_device_id ad5449_spi_ids[] = {
352 { "ad5415", ID_AD5449 },
353 { "ad5426", ID_AD5426 },
354 { "ad5429", ID_AD5429 },
355 { "ad5432", ID_AD5432 },
356 { "ad5439", ID_AD5439 },
357 { "ad5443", ID_AD5443 },
358 { "ad5449", ID_AD5449 },
359 {}
360};
361MODULE_DEVICE_TABLE(spi, ad5449_spi_ids);
362
363static struct spi_driver ad5449_spi_driver = {
364 .driver = {
365 .name = "ad5449",
366 .owner = THIS_MODULE,
367 },
368 .probe = ad5449_spi_probe,
369 .remove = __devexit_p(ad5449_spi_remove),
370 .id_table = ad5449_spi_ids,
371};
372module_spi_driver(ad5449_spi_driver);
373
374MODULE_AUTHOR("Lars-Peter Clausen <lars@metafoo.de>");
375MODULE_DESCRIPTION("Analog Devices AD5449 and similar DACs");
376MODULE_LICENSE("GPL v2");
diff --git a/drivers/iio/dac/ad5686.c b/drivers/iio/dac/ad5686.c
index 6948d75e1036..bc92ff9309c2 100644
--- a/drivers/iio/dac/ad5686.c
+++ b/drivers/iio/dac/ad5686.c
@@ -188,7 +188,7 @@ static ssize_t ad5686_write_dac_powerdown(struct iio_dev *indio_dev,
188 if (ret) 188 if (ret)
189 return ret; 189 return ret;
190 190
191 if (readin == true) 191 if (readin)
192 st->pwr_down_mask |= (0x3 << (chan->channel * 2)); 192 st->pwr_down_mask |= (0x3 << (chan->channel * 2));
193 else 193 else
194 st->pwr_down_mask &= ~(0x3 << (chan->channel * 2)); 194 st->pwr_down_mask &= ~(0x3 << (chan->channel * 2));
diff --git a/drivers/iio/gyro/Kconfig b/drivers/iio/gyro/Kconfig
index 21e27e2fc68c..48ed1483ff27 100644
--- a/drivers/iio/gyro/Kconfig
+++ b/drivers/iio/gyro/Kconfig
@@ -3,6 +3,15 @@
3# 3#
4menu "Digital gyroscope sensors" 4menu "Digital gyroscope sensors"
5 5
6config ADIS16136
7 tristate "Analog devices ADIS16136 and similar gyroscopes driver"
8 depends on SPI_MASTER
9 select IIO_ADIS_LIB
10 select IIO_ADIS_LIB_BUFFER if IIO_BUFFER
11 help
12 Say yes here to build support for the Analog Devices ADIS16133, ADIS16135,
13 ADIS16136 gyroscope devices.
14
6config HID_SENSOR_GYRO_3D 15config HID_SENSOR_GYRO_3D
7 depends on HID_SENSOR_HUB 16 depends on HID_SENSOR_HUB
8 select IIO_BUFFER 17 select IIO_BUFFER
diff --git a/drivers/iio/gyro/Makefile b/drivers/iio/gyro/Makefile
index 8a895d9fcbce..702a058907e3 100644
--- a/drivers/iio/gyro/Makefile
+++ b/drivers/iio/gyro/Makefile
@@ -2,4 +2,5 @@
2# Makefile for industrial I/O gyroscope sensor drivers 2# Makefile for industrial I/O gyroscope sensor drivers
3# 3#
4 4
5obj-$(CONFIG_ADIS16136) += adis16136.o
5obj-$(CONFIG_HID_SENSOR_GYRO_3D) += hid-sensor-gyro-3d.o 6obj-$(CONFIG_HID_SENSOR_GYRO_3D) += hid-sensor-gyro-3d.o
diff --git a/drivers/iio/gyro/adis16136.c b/drivers/iio/gyro/adis16136.c
new file mode 100644
index 000000000000..8cb0bcbfd609
--- /dev/null
+++ b/drivers/iio/gyro/adis16136.c
@@ -0,0 +1,580 @@
1/*
2 * ADIS16133/ADIS16135/ADIS16136 gyroscope driver
3 *
4 * Copyright 2012 Analog Devices Inc.
5 * Author: Lars-Peter Clausen <lars@metafoo.de>
6 *
7 * Licensed under the GPL-2.
8 */
9
10#include <linux/interrupt.h>
11#include <linux/delay.h>
12#include <linux/mutex.h>
13#include <linux/device.h>
14#include <linux/kernel.h>
15#include <linux/spi/spi.h>
16#include <linux/slab.h>
17#include <linux/sysfs.h>
18#include <linux/module.h>
19
20#include <linux/iio/iio.h>
21#include <linux/iio/sysfs.h>
22#include <linux/iio/buffer.h>
23#include <linux/iio/imu/adis.h>
24
25#include <linux/debugfs.h>
26
27#define ADIS16136_REG_FLASH_CNT 0x00
28#define ADIS16136_REG_TEMP_OUT 0x02
29#define ADIS16136_REG_GYRO_OUT2 0x04
30#define ADIS16136_REG_GYRO_OUT 0x06
31#define ADIS16136_REG_GYRO_OFF2 0x08
32#define ADIS16136_REG_GYRO_OFF 0x0A
33#define ADIS16136_REG_ALM_MAG1 0x10
34#define ADIS16136_REG_ALM_MAG2 0x12
35#define ADIS16136_REG_ALM_SAMPL1 0x14
36#define ADIS16136_REG_ALM_SAMPL2 0x16
37#define ADIS16136_REG_ALM_CTRL 0x18
38#define ADIS16136_REG_GPIO_CTRL 0x1A
39#define ADIS16136_REG_MSC_CTRL 0x1C
40#define ADIS16136_REG_SMPL_PRD 0x1E
41#define ADIS16136_REG_AVG_CNT 0x20
42#define ADIS16136_REG_DEC_RATE 0x22
43#define ADIS16136_REG_SLP_CTRL 0x24
44#define ADIS16136_REG_DIAG_STAT 0x26
45#define ADIS16136_REG_GLOB_CMD 0x28
46#define ADIS16136_REG_LOT1 0x32
47#define ADIS16136_REG_LOT2 0x34
48#define ADIS16136_REG_LOT3 0x36
49#define ADIS16136_REG_PROD_ID 0x38
50#define ADIS16136_REG_SERIAL_NUM 0x3A
51
52#define ADIS16136_DIAG_STAT_FLASH_UPDATE_FAIL 2
53#define ADIS16136_DIAG_STAT_SPI_FAIL 3
54#define ADIS16136_DIAG_STAT_SELF_TEST_FAIL 5
55#define ADIS16136_DIAG_STAT_FLASH_CHKSUM_FAIL 6
56
57#define ADIS16136_MSC_CTRL_MEMORY_TEST BIT(11)
58#define ADIS16136_MSC_CTRL_SELF_TEST BIT(10)
59
60struct adis16136_chip_info {
61 unsigned int precision;
62 unsigned int fullscale;
63};
64
65struct adis16136 {
66 const struct adis16136_chip_info *chip_info;
67
68 struct adis adis;
69};
70
71#ifdef CONFIG_DEBUG_FS
72
73static ssize_t adis16136_show_serial(struct file *file,
74 char __user *userbuf, size_t count, loff_t *ppos)
75{
76 struct adis16136 *adis16136 = file->private_data;
77 uint16_t lot1, lot2, lot3, serial;
78 char buf[20];
79 size_t len;
80 int ret;
81
82 ret = adis_read_reg_16(&adis16136->adis, ADIS16136_REG_SERIAL_NUM,
83 &serial);
84 if (ret < 0)
85 return ret;
86
87 ret = adis_read_reg_16(&adis16136->adis, ADIS16136_REG_LOT1, &lot1);
88 if (ret < 0)
89 return ret;
90
91 ret = adis_read_reg_16(&adis16136->adis, ADIS16136_REG_LOT2, &lot2);
92 if (ret < 0)
93 return ret;
94
95 ret = adis_read_reg_16(&adis16136->adis, ADIS16136_REG_LOT3, &lot3);
96 if (ret < 0)
97 return ret;
98
99 len = snprintf(buf, sizeof(buf), "%.4x%.4x%.4x-%.4x\n", lot1, lot2,
100 lot3, serial);
101
102 return simple_read_from_buffer(userbuf, count, ppos, buf, len);
103}
104
105static const struct file_operations adis16136_serial_fops = {
106 .open = simple_open,
107 .read = adis16136_show_serial,
108 .llseek = default_llseek,
109 .owner = THIS_MODULE,
110};
111
112static int adis16136_show_product_id(void *arg, u64 *val)
113{
114 struct adis16136 *adis16136 = arg;
115 u16 prod_id;
116 int ret;
117
118 ret = adis_read_reg_16(&adis16136->adis, ADIS16136_REG_PROD_ID,
119 &prod_id);
120 if (ret < 0)
121 return ret;
122
123 *val = prod_id;
124
125 return 0;
126}
127DEFINE_SIMPLE_ATTRIBUTE(adis16136_product_id_fops,
128 adis16136_show_product_id, NULL, "%llu\n");
129
130static int adis16136_show_flash_count(void *arg, u64 *val)
131{
132 struct adis16136 *adis16136 = arg;
133 uint16_t flash_count;
134 int ret;
135
136 ret = adis_read_reg_16(&adis16136->adis, ADIS16136_REG_FLASH_CNT,
137 &flash_count);
138 if (ret < 0)
139 return ret;
140
141 *val = flash_count;
142
143 return 0;
144}
145DEFINE_SIMPLE_ATTRIBUTE(adis16136_flash_count_fops,
146 adis16136_show_flash_count, NULL, "%lld\n");
147
148static int adis16136_debugfs_init(struct iio_dev *indio_dev)
149{
150 struct adis16136 *adis16136 = iio_priv(indio_dev);
151
152 debugfs_create_file("serial_number", 0400, indio_dev->debugfs_dentry,
153 adis16136, &adis16136_serial_fops);
154 debugfs_create_file("product_id", 0400, indio_dev->debugfs_dentry,
155 adis16136, &adis16136_product_id_fops);
156 debugfs_create_file("flash_count", 0400, indio_dev->debugfs_dentry,
157 adis16136, &adis16136_flash_count_fops);
158
159 return 0;
160}
161
162#else
163
164static int adis16136_debugfs_init(struct iio_dev *indio_dev)
165{
166 return 0;
167}
168
169#endif
170
171static int adis16136_set_freq(struct adis16136 *adis16136, unsigned int freq)
172{
173 unsigned int t;
174
175 t = 32768 / freq;
176 if (t < 0xf)
177 t = 0xf;
178 else if (t > 0xffff)
179 t = 0xffff;
180 else
181 t--;
182
183 return adis_write_reg_16(&adis16136->adis, ADIS16136_REG_SMPL_PRD, t);
184}
185
186static int adis16136_get_freq(struct adis16136 *adis16136, unsigned int *freq)
187{
188 uint16_t t;
189 int ret;
190
191 ret = adis_read_reg_16(&adis16136->adis, ADIS16136_REG_SMPL_PRD, &t);
192 if (ret < 0)
193 return ret;
194
195 *freq = 32768 / (t + 1);
196
197 return 0;
198}
199
200static ssize_t adis16136_write_frequency(struct device *dev,
201 struct device_attribute *attr, const char *buf, size_t len)
202{
203 struct iio_dev *indio_dev = dev_to_iio_dev(dev);
204 struct adis16136 *adis16136 = iio_priv(indio_dev);
205 unsigned int val;
206 int ret;
207
208 ret = kstrtouint(buf, 10, &val);
209 if (ret)
210 return ret;
211
212 if (val == 0)
213 return -EINVAL;
214
215 ret = adis16136_set_freq(adis16136, val);
216
217 return ret ? ret : len;
218}
219
220static ssize_t adis16136_read_frequency(struct device *dev,
221 struct device_attribute *attr, char *buf)
222{
223 struct iio_dev *indio_dev = dev_to_iio_dev(dev);
224 struct adis16136 *adis16136 = iio_priv(indio_dev);
225 unsigned int freq;
226 int ret;
227
228 ret = adis16136_get_freq(adis16136, &freq);
229 if (ret < 0)
230 return ret;
231
232 return sprintf(buf, "%d\n", freq);
233}
234
235static IIO_DEV_ATTR_SAMP_FREQ(S_IWUSR | S_IRUGO,
236 adis16136_read_frequency,
237 adis16136_write_frequency);
238
239static const unsigned adis16136_3db_divisors[] = {
240 [0] = 2, /* Special case */
241 [1] = 6,
242 [2] = 12,
243 [3] = 25,
244 [4] = 50,
245 [5] = 100,
246 [6] = 200,
247 [7] = 200, /* Not a valid setting */
248};
249
250static int adis16136_set_filter(struct iio_dev *indio_dev, int val)
251{
252 struct adis16136 *adis16136 = iio_priv(indio_dev);
253 unsigned int freq;
254 int i, ret;
255
256 ret = adis16136_get_freq(adis16136, &freq);
257 if (ret < 0)
258 return ret;
259
260 for (i = ARRAY_SIZE(adis16136_3db_divisors) - 1; i >= 1; i--) {
261 if (freq / adis16136_3db_divisors[i] >= val)
262 break;
263 }
264
265 return adis_write_reg_16(&adis16136->adis, ADIS16136_REG_AVG_CNT, i);
266}
267
268static int adis16136_get_filter(struct iio_dev *indio_dev, int *val)
269{
270 struct adis16136 *adis16136 = iio_priv(indio_dev);
271 unsigned int freq;
272 uint16_t val16;
273 int ret;
274
275 mutex_lock(&indio_dev->mlock);
276
277 ret = adis_read_reg_16(&adis16136->adis, ADIS16136_REG_AVG_CNT, &val16);
278 if (ret < 0)
279 goto err_unlock;
280
281 ret = adis16136_get_freq(adis16136, &freq);
282 if (ret < 0)
283 goto err_unlock;
284
285 *val = freq / adis16136_3db_divisors[val16 & 0x07];
286
287err_unlock:
288 mutex_unlock(&indio_dev->mlock);
289
290 return ret ? ret : IIO_VAL_INT;
291}
292
293static int adis16136_read_raw(struct iio_dev *indio_dev,
294 const struct iio_chan_spec *chan, int *val, int *val2, long info)
295{
296 struct adis16136 *adis16136 = iio_priv(indio_dev);
297 uint32_t val32;
298 int ret;
299
300 switch (info) {
301 case IIO_CHAN_INFO_RAW:
302 return adis_single_conversion(indio_dev, chan, 0, val);
303 case IIO_CHAN_INFO_SCALE:
304 switch (chan->type) {
305 case IIO_ANGL_VEL:
306 *val = adis16136->chip_info->precision;
307 *val2 = (adis16136->chip_info->fullscale << 16);
308 return IIO_VAL_FRACTIONAL;
309 case IIO_TEMP:
310 *val = 10;
311 *val2 = 697000; /* 0.010697 degree Celsius */
312 return IIO_VAL_INT_PLUS_MICRO;
313 default:
314 return -EINVAL;
315 }
316 case IIO_CHAN_INFO_CALIBBIAS:
317 ret = adis_read_reg_32(&adis16136->adis,
318 ADIS16136_REG_GYRO_OFF2, &val32);
319 if (ret < 0)
320 return ret;
321
322 *val = sign_extend32(val32, 31);
323
324 return IIO_VAL_INT;
325 case IIO_CHAN_INFO_LOW_PASS_FILTER_3DB_FREQUENCY:
326 return adis16136_get_filter(indio_dev, val);
327 default:
328 return -EINVAL;
329 }
330}
331
332static int adis16136_write_raw(struct iio_dev *indio_dev,
333 const struct iio_chan_spec *chan, int val, int val2, long info)
334{
335 struct adis16136 *adis16136 = iio_priv(indio_dev);
336
337 switch (info) {
338 case IIO_CHAN_INFO_CALIBBIAS:
339 return adis_write_reg_32(&adis16136->adis,
340 ADIS16136_REG_GYRO_OFF2, val);
341 case IIO_CHAN_INFO_LOW_PASS_FILTER_3DB_FREQUENCY:
342 return adis16136_set_filter(indio_dev, val);
343 default:
344 break;
345 }
346
347 return -EINVAL;
348}
349
350enum {
351 ADIS16136_SCAN_GYRO,
352 ADIS16136_SCAN_TEMP,
353};
354
355static const struct iio_chan_spec adis16136_channels[] = {
356 {
357 .type = IIO_ANGL_VEL,
358 .modified = 1,
359 .channel2 = IIO_MOD_X,
360 .info_mask = IIO_CHAN_INFO_RAW_SEPARATE_BIT |
361 IIO_CHAN_INFO_CALIBBIAS_SEPARATE_BIT |
362 IIO_CHAN_INFO_SCALE_SHARED_BIT |
363 IIO_CHAN_INFO_LOW_PASS_FILTER_3DB_FREQUENCY_SEPARATE_BIT,
364 .address = ADIS16136_REG_GYRO_OUT2,
365 .scan_index = ADIS16136_SCAN_GYRO,
366 .scan_type = {
367 .sign = 's',
368 .realbits = 32,
369 .storagebits = 32,
370 .endianness = IIO_BE,
371 },
372 }, {
373 .type = IIO_TEMP,
374 .indexed = 1,
375 .channel = 0,
376 .info_mask = IIO_CHAN_INFO_RAW_SEPARATE_BIT |
377 IIO_CHAN_INFO_SCALE_SEPARATE_BIT,
378 .address = ADIS16136_REG_TEMP_OUT,
379 .scan_index = ADIS16136_SCAN_TEMP,
380 .scan_type = {
381 .sign = 's',
382 .realbits = 16,
383 .storagebits = 16,
384 .endianness = IIO_BE,
385 },
386 },
387 IIO_CHAN_SOFT_TIMESTAMP(2),
388};
389
390static struct attribute *adis16136_attributes[] = {
391 &iio_dev_attr_sampling_frequency.dev_attr.attr,
392 NULL
393};
394
395static const struct attribute_group adis16136_attribute_group = {
396 .attrs = adis16136_attributes,
397};
398
399static const struct iio_info adis16136_info = {
400 .driver_module = THIS_MODULE,
401 .attrs = &adis16136_attribute_group,
402 .read_raw = &adis16136_read_raw,
403 .write_raw = &adis16136_write_raw,
404 .update_scan_mode = adis_update_scan_mode,
405 .debugfs_reg_access = adis_debugfs_reg_access,
406};
407
408static int adis16136_stop_device(struct iio_dev *indio_dev)
409{
410 struct adis16136 *adis16136 = iio_priv(indio_dev);
411 int ret;
412
413 ret = adis_write_reg_16(&adis16136->adis, ADIS16136_REG_SLP_CTRL, 0xff);
414 if (ret)
415 dev_err(&indio_dev->dev,
416 "Could not power down device: %d\n", ret);
417
418 return ret;
419}
420
421static int adis16136_initial_setup(struct iio_dev *indio_dev)
422{
423 struct adis16136 *adis16136 = iio_priv(indio_dev);
424 unsigned int device_id;
425 uint16_t prod_id;
426 int ret;
427
428 ret = adis_initial_startup(&adis16136->adis);
429 if (ret)
430 return ret;
431
432 ret = adis_read_reg_16(&adis16136->adis, ADIS16136_REG_PROD_ID,
433 &prod_id);
434 if (ret)
435 return ret;
436
437 sscanf(indio_dev->name, "adis%u\n", &device_id);
438
439 if (prod_id != device_id)
440 dev_warn(&indio_dev->dev, "Device ID(%u) and product ID(%u) do not match.",
441 device_id, prod_id);
442
443 return 0;
444}
445
446static const char * const adis16136_status_error_msgs[] = {
447 [ADIS16136_DIAG_STAT_FLASH_UPDATE_FAIL] = "Flash update failed",
448 [ADIS16136_DIAG_STAT_SPI_FAIL] = "SPI failure",
449 [ADIS16136_DIAG_STAT_SELF_TEST_FAIL] = "Self test error",
450 [ADIS16136_DIAG_STAT_FLASH_CHKSUM_FAIL] = "Flash checksum error",
451};
452
453static const struct adis_data adis16136_data = {
454 .diag_stat_reg = ADIS16136_REG_DIAG_STAT,
455 .glob_cmd_reg = ADIS16136_REG_GLOB_CMD,
456 .msc_ctrl_reg = ADIS16136_REG_MSC_CTRL,
457
458 .self_test_mask = ADIS16136_MSC_CTRL_SELF_TEST,
459 .startup_delay = 80,
460
461 .read_delay = 10,
462 .write_delay = 10,
463
464 .status_error_msgs = adis16136_status_error_msgs,
465 .status_error_mask = BIT(ADIS16136_DIAG_STAT_FLASH_UPDATE_FAIL) |
466 BIT(ADIS16136_DIAG_STAT_SPI_FAIL) |
467 BIT(ADIS16136_DIAG_STAT_SELF_TEST_FAIL) |
468 BIT(ADIS16136_DIAG_STAT_FLASH_CHKSUM_FAIL),
469};
470
471enum adis16136_id {
472 ID_ADIS16133,
473 ID_ADIS16135,
474 ID_ADIS16136,
475};
476
477static const struct adis16136_chip_info adis16136_chip_info[] = {
478 [ID_ADIS16133] = {
479 .precision = IIO_DEGREE_TO_RAD(1200),
480 .fullscale = 24000,
481 },
482 [ID_ADIS16135] = {
483 .precision = IIO_DEGREE_TO_RAD(300),
484 .fullscale = 24000,
485 },
486 [ID_ADIS16136] = {
487 .precision = IIO_DEGREE_TO_RAD(450),
488 .fullscale = 24623,
489 },
490};
491
492static int adis16136_probe(struct spi_device *spi)
493{
494 const struct spi_device_id *id = spi_get_device_id(spi);
495 struct adis16136 *adis16136;
496 struct iio_dev *indio_dev;
497 int ret;
498
499 indio_dev = iio_device_alloc(sizeof(*adis16136));
500 if (indio_dev == NULL)
501 return -ENOMEM;
502
503 spi_set_drvdata(spi, indio_dev);
504
505 adis16136 = iio_priv(indio_dev);
506
507 adis16136->chip_info = &adis16136_chip_info[id->driver_data];
508 indio_dev->dev.parent = &spi->dev;
509 indio_dev->name = spi_get_device_id(spi)->name;
510 indio_dev->channels = adis16136_channels;
511 indio_dev->num_channels = ARRAY_SIZE(adis16136_channels);
512 indio_dev->info = &adis16136_info;
513 indio_dev->modes = INDIO_DIRECT_MODE;
514
515 ret = adis_init(&adis16136->adis, indio_dev, spi, &adis16136_data);
516 if (ret)
517 goto error_free_dev;
518
519 ret = adis_setup_buffer_and_trigger(&adis16136->adis, indio_dev, NULL);
520 if (ret)
521 goto error_free_dev;
522
523 ret = adis16136_initial_setup(indio_dev);
524 if (ret)
525 goto error_cleanup_buffer;
526
527 ret = iio_device_register(indio_dev);
528 if (ret)
529 goto error_stop_device;
530
531 adis16136_debugfs_init(indio_dev);
532
533 return 0;
534
535error_stop_device:
536 adis16136_stop_device(indio_dev);
537error_cleanup_buffer:
538 adis_cleanup_buffer_and_trigger(&adis16136->adis, indio_dev);
539error_free_dev:
540 iio_device_free(indio_dev);
541 return ret;
542}
543
544static int adis16136_remove(struct spi_device *spi)
545{
546 struct iio_dev *indio_dev = spi_get_drvdata(spi);
547 struct adis16136 *adis16136 = iio_priv(indio_dev);
548
549 iio_device_unregister(indio_dev);
550 adis16136_stop_device(indio_dev);
551
552 adis_cleanup_buffer_and_trigger(&adis16136->adis, indio_dev);
553
554 iio_device_free(indio_dev);
555
556 return 0;
557}
558
559static const struct spi_device_id adis16136_ids[] = {
560 { "adis16133", ID_ADIS16133 },
561 { "adis16135", ID_ADIS16135 },
562 { "adis16136", ID_ADIS16136 },
563 { }
564};
565MODULE_DEVICE_TABLE(spi, adis16136_ids);
566
567static struct spi_driver adis16136_driver = {
568 .driver = {
569 .name = "adis16136",
570 .owner = THIS_MODULE,
571 },
572 .id_table = adis16136_ids,
573 .probe = adis16136_probe,
574 .remove = adis16136_remove,
575};
576module_spi_driver(adis16136_driver);
577
578MODULE_AUTHOR("Lars-Peter Clausen <lars@metafoo.de>");
579MODULE_DESCRIPTION("Analog Devices ADIS16133/ADIS16135/ADIS16136 gyroscope driver");
580MODULE_LICENSE("GPL v2");
diff --git a/drivers/iio/gyro/hid-sensor-gyro-3d.c b/drivers/iio/gyro/hid-sensor-gyro-3d.c
index 4c56ada51c39..4c8b158e40e1 100644
--- a/drivers/iio/gyro/hid-sensor-gyro-3d.c
+++ b/drivers/iio/gyro/hid-sensor-gyro-3d.c
@@ -197,21 +197,8 @@ static const struct iio_info gyro_3d_info = {
197/* Function to push data to buffer */ 197/* Function to push data to buffer */
198static void hid_sensor_push_data(struct iio_dev *indio_dev, u8 *data, int len) 198static void hid_sensor_push_data(struct iio_dev *indio_dev, u8 *data, int len)
199{ 199{
200 struct iio_buffer *buffer = indio_dev->buffer;
201 int datum_sz;
202
203 dev_dbg(&indio_dev->dev, "hid_sensor_push_data\n"); 200 dev_dbg(&indio_dev->dev, "hid_sensor_push_data\n");
204 if (!buffer) { 201 iio_push_to_buffers(indio_dev, (u8 *)data);
205 dev_err(&indio_dev->dev, "Buffer == NULL\n");
206 return;
207 }
208 datum_sz = buffer->access->get_bytes_per_datum(buffer);
209 if (len > datum_sz) {
210 dev_err(&indio_dev->dev, "Datum size mismatch %d:%d\n", len,
211 datum_sz);
212 return;
213 }
214 iio_push_to_buffer(buffer, (u8 *)data);
215} 202}
216 203
217/* Callback handler to send event after all samples are received and captured */ 204/* Callback handler to send event after all samples are received and captured */
@@ -319,10 +306,10 @@ static int __devinit hid_gyro_3d_probe(struct platform_device *pdev)
319 goto error_free_dev; 306 goto error_free_dev;
320 } 307 }
321 308
322 channels = kmemdup(gyro_3d_channels, 309 channels = kmemdup(gyro_3d_channels, sizeof(gyro_3d_channels),
323 sizeof(gyro_3d_channels), 310 GFP_KERNEL);
324 GFP_KERNEL);
325 if (!channels) { 311 if (!channels) {
312 ret = -ENOMEM;
326 dev_err(&pdev->dev, "failed to duplicate channels\n"); 313 dev_err(&pdev->dev, "failed to duplicate channels\n");
327 goto error_free_dev; 314 goto error_free_dev;
328 } 315 }
diff --git a/drivers/iio/imu/Kconfig b/drivers/iio/imu/Kconfig
new file mode 100644
index 000000000000..3d79a40e916b
--- /dev/null
+++ b/drivers/iio/imu/Kconfig
@@ -0,0 +1,27 @@
1#
2# IIO imu drivers configuration
3#
4menu "Inertial measurement units"
5
6config ADIS16480
7 tristate "Analog Devices ADIS16480 and similar IMU driver"
8 depends on SPI
9 select IIO_ADIS_LIB
10 select IIO_ADIS_LIB_BUFFER if IIO_BUFFER
11 help
12 Say yes here to build support for Analog Devices ADIS16375, ADIS16480,
13 ADIS16485, ADIS16488 inertial sensors.
14
15endmenu
16
17config IIO_ADIS_LIB
18 tristate
19 help
20 A set of IO helper functions for the Analog Devices ADIS* device family.
21
22config IIO_ADIS_LIB_BUFFER
23 bool
24 select IIO_TRIGGERED_BUFFER
25 help
26 A set of buffer helper functions for the Analog Devices ADIS* device
27 family.
diff --git a/drivers/iio/imu/Makefile b/drivers/iio/imu/Makefile
new file mode 100644
index 000000000000..cfe57638f6f9
--- /dev/null
+++ b/drivers/iio/imu/Makefile
@@ -0,0 +1,10 @@
1#
2# Makefile for Inertial Measurement Units
3#
4
5obj-$(CONFIG_ADIS16480) += adis16480.o
6
7adis_lib-y += adis.o
8adis_lib-$(CONFIG_IIO_ADIS_LIB_BUFFER) += adis_trigger.o
9adis_lib-$(CONFIG_IIO_ADIS_LIB_BUFFER) += adis_buffer.o
10obj-$(CONFIG_IIO_ADIS_LIB) += adis_lib.o
diff --git a/drivers/iio/imu/adis.c b/drivers/iio/imu/adis.c
new file mode 100644
index 000000000000..911255d41c1a
--- /dev/null
+++ b/drivers/iio/imu/adis.c
@@ -0,0 +1,440 @@
1/*
2 * Common library for ADIS16XXX devices
3 *
4 * Copyright 2012 Analog Devices Inc.
5 * Author: Lars-Peter Clausen <lars@metafoo.de>
6 *
7 * Licensed under the GPL-2 or later.
8 */
9
10#include <linux/delay.h>
11#include <linux/mutex.h>
12#include <linux/device.h>
13#include <linux/kernel.h>
14#include <linux/spi/spi.h>
15#include <linux/slab.h>
16#include <linux/sysfs.h>
17#include <linux/module.h>
18#include <asm/unaligned.h>
19
20#include <linux/iio/iio.h>
21#include <linux/iio/sysfs.h>
22#include <linux/iio/buffer.h>
23#include <linux/iio/imu/adis.h>
24
25#define ADIS_MSC_CTRL_DATA_RDY_EN BIT(2)
26#define ADIS_MSC_CTRL_DATA_RDY_POL_HIGH BIT(1)
27#define ADIS_MSC_CTRL_DATA_RDY_DIO2 BIT(0)
28#define ADIS_GLOB_CMD_SW_RESET BIT(7)
29
30int adis_write_reg(struct adis *adis, unsigned int reg,
31 unsigned int value, unsigned int size)
32{
33 unsigned int page = reg / ADIS_PAGE_SIZE;
34 int ret, i;
35 struct spi_message msg;
36 struct spi_transfer xfers[] = {
37 {
38 .tx_buf = adis->tx,
39 .bits_per_word = 8,
40 .len = 2,
41 .cs_change = 1,
42 .delay_usecs = adis->data->write_delay,
43 }, {
44 .tx_buf = adis->tx + 2,
45 .bits_per_word = 8,
46 .len = 2,
47 .cs_change = 1,
48 .delay_usecs = adis->data->write_delay,
49 }, {
50 .tx_buf = adis->tx + 4,
51 .bits_per_word = 8,
52 .len = 2,
53 .cs_change = 1,
54 .delay_usecs = adis->data->write_delay,
55 }, {
56 .tx_buf = adis->tx + 6,
57 .bits_per_word = 8,
58 .len = 2,
59 .delay_usecs = adis->data->write_delay,
60 }, {
61 .tx_buf = adis->tx + 8,
62 .bits_per_word = 8,
63 .len = 2,
64 .delay_usecs = adis->data->write_delay,
65 },
66 };
67
68 mutex_lock(&adis->txrx_lock);
69
70 spi_message_init(&msg);
71
72 if (adis->current_page != page) {
73 adis->tx[0] = ADIS_WRITE_REG(ADIS_REG_PAGE_ID);
74 adis->tx[1] = page;
75 spi_message_add_tail(&xfers[0], &msg);
76 }
77
78 switch (size) {
79 case 4:
80 adis->tx[8] = ADIS_WRITE_REG(reg + 3);
81 adis->tx[9] = (value >> 24) & 0xff;
82 adis->tx[6] = ADIS_WRITE_REG(reg + 2);
83 adis->tx[7] = (value >> 16) & 0xff;
84 case 2:
85 adis->tx[4] = ADIS_WRITE_REG(reg + 1);
86 adis->tx[5] = (value >> 8) & 0xff;
87 case 1:
88 adis->tx[2] = ADIS_WRITE_REG(reg);
89 adis->tx[3] = value & 0xff;
90 break;
91 default:
92 ret = -EINVAL;
93 goto out_unlock;
94 }
95
96 xfers[size].cs_change = 0;
97
98 for (i = 1; i <= size; i++)
99 spi_message_add_tail(&xfers[i], &msg);
100
101 ret = spi_sync(adis->spi, &msg);
102 if (ret) {
103 dev_err(&adis->spi->dev, "Failed to write register 0x%02X: %d\n",
104 reg, ret);
105 } else {
106 adis->current_page = page;
107 }
108
109out_unlock:
110 mutex_unlock(&adis->txrx_lock);
111
112 return ret;
113}
114EXPORT_SYMBOL_GPL(adis_write_reg);
115
116/**
117 * adis_read_reg() - read 2 bytes from a 16-bit register
118 * @adis: The adis device
119 * @reg: The address of the lower of the two registers
120 * @val: The value read back from the device
121 */
122int adis_read_reg(struct adis *adis, unsigned int reg,
123 unsigned int *val, unsigned int size)
124{
125 unsigned int page = reg / ADIS_PAGE_SIZE;
126 struct spi_message msg;
127 int ret;
128 struct spi_transfer xfers[] = {
129 {
130 .tx_buf = adis->tx,
131 .bits_per_word = 8,
132 .len = 2,
133 .cs_change = 1,
134 .delay_usecs = adis->data->write_delay,
135 }, {
136 .tx_buf = adis->tx + 2,
137 .bits_per_word = 8,
138 .len = 2,
139 .cs_change = 1,
140 .delay_usecs = adis->data->read_delay,
141 }, {
142 .tx_buf = adis->tx + 4,
143 .rx_buf = adis->rx,
144 .bits_per_word = 8,
145 .len = 2,
146 .cs_change = 1,
147 .delay_usecs = adis->data->read_delay,
148 }, {
149 .rx_buf = adis->rx + 2,
150 .bits_per_word = 8,
151 .len = 2,
152 .delay_usecs = adis->data->read_delay,
153 },
154 };
155
156 mutex_lock(&adis->txrx_lock);
157 spi_message_init(&msg);
158
159 if (adis->current_page != page) {
160 adis->tx[0] = ADIS_WRITE_REG(ADIS_REG_PAGE_ID);
161 adis->tx[1] = page;
162 spi_message_add_tail(&xfers[0], &msg);
163 }
164
165 switch (size) {
166 case 4:
167 adis->tx[2] = ADIS_READ_REG(reg + 2);
168 adis->tx[3] = 0;
169 spi_message_add_tail(&xfers[1], &msg);
170 case 2:
171 adis->tx[4] = ADIS_READ_REG(reg);
172 adis->tx[5] = 0;
173 spi_message_add_tail(&xfers[2], &msg);
174 spi_message_add_tail(&xfers[3], &msg);
175 break;
176 default:
177 ret = -EINVAL;
178 goto out_unlock;
179 }
180
181 ret = spi_sync(adis->spi, &msg);
182 if (ret) {
183 dev_err(&adis->spi->dev, "Failed to read register 0x%02X: %d\n",
184 reg, ret);
185 goto out_unlock;
186 } else {
187 adis->current_page = page;
188 }
189
190 switch (size) {
191 case 4:
192 *val = get_unaligned_be32(adis->rx);
193 break;
194 case 2:
195 *val = get_unaligned_be16(adis->rx + 2);
196 break;
197 }
198
199out_unlock:
200 mutex_unlock(&adis->txrx_lock);
201
202 return ret;
203}
204EXPORT_SYMBOL_GPL(adis_read_reg);
205
206#ifdef CONFIG_DEBUG_FS
207
208int adis_debugfs_reg_access(struct iio_dev *indio_dev,
209 unsigned int reg, unsigned int writeval, unsigned int *readval)
210{
211 struct adis *adis = iio_device_get_drvdata(indio_dev);
212
213 if (readval) {
214 uint16_t val16;
215 int ret;
216
217 ret = adis_read_reg_16(adis, reg, &val16);
218 *readval = val16;
219
220 return ret;
221 } else {
222 return adis_write_reg_16(adis, reg, writeval);
223 }
224}
225EXPORT_SYMBOL(adis_debugfs_reg_access);
226
227#endif
228
229/**
230 * adis_enable_irq() - Enable or disable data ready IRQ
231 * @adis: The adis device
232 * @enable: Whether to enable the IRQ
233 *
234 * Returns 0 on success, negative error code otherwise
235 */
236int adis_enable_irq(struct adis *adis, bool enable)
237{
238 int ret = 0;
239 uint16_t msc;
240
241 if (adis->data->enable_irq)
242 return adis->data->enable_irq(adis, enable);
243
244 ret = adis_read_reg_16(adis, adis->data->msc_ctrl_reg, &msc);
245 if (ret)
246 goto error_ret;
247
248 msc |= ADIS_MSC_CTRL_DATA_RDY_POL_HIGH;
249 msc &= ~ADIS_MSC_CTRL_DATA_RDY_DIO2;
250 if (enable)
251 msc |= ADIS_MSC_CTRL_DATA_RDY_EN;
252 else
253 msc &= ~ADIS_MSC_CTRL_DATA_RDY_EN;
254
255 ret = adis_write_reg_16(adis, adis->data->msc_ctrl_reg, msc);
256
257error_ret:
258 return ret;
259}
260EXPORT_SYMBOL(adis_enable_irq);
261
262/**
263 * adis_check_status() - Check the device for error conditions
264 * @adis: The adis device
265 *
266 * Returns 0 on success, a negative error code otherwise
267 */
268int adis_check_status(struct adis *adis)
269{
270 uint16_t status;
271 int ret;
272 int i;
273
274 ret = adis_read_reg_16(adis, adis->data->diag_stat_reg, &status);
275 if (ret < 0)
276 return ret;
277
278 status &= adis->data->status_error_mask;
279
280 if (status == 0)
281 return 0;
282
283 for (i = 0; i < 16; ++i) {
284 if (status & BIT(i)) {
285 dev_err(&adis->spi->dev, "%s.\n",
286 adis->data->status_error_msgs[i]);
287 }
288 }
289
290 return -EIO;
291}
292EXPORT_SYMBOL_GPL(adis_check_status);
293
294/**
295 * adis_reset() - Reset the device
296 * @adis: The adis device
297 *
298 * Returns 0 on success, a negative error code otherwise
299 */
300int adis_reset(struct adis *adis)
301{
302 int ret;
303
304 ret = adis_write_reg_8(adis, adis->data->glob_cmd_reg,
305 ADIS_GLOB_CMD_SW_RESET);
306 if (ret)
307 dev_err(&adis->spi->dev, "Failed to reset device: %d\n", ret);
308
309 return ret;
310}
311EXPORT_SYMBOL_GPL(adis_reset);
312
313static int adis_self_test(struct adis *adis)
314{
315 int ret;
316
317 ret = adis_write_reg_16(adis, adis->data->msc_ctrl_reg,
318 adis->data->self_test_mask);
319 if (ret) {
320 dev_err(&adis->spi->dev, "Failed to initiate self test: %d\n",
321 ret);
322 return ret;
323 }
324
325 msleep(adis->data->startup_delay);
326
327 return adis_check_status(adis);
328}
329
330/**
331 * adis_inital_startup() - Performs device self-test
332 * @adis: The adis device
333 *
334 * Returns 0 if the device is operational, a negative error code otherwise.
335 *
336 * This function should be called early on in the device initialization sequence
337 * to ensure that the device is in a sane and known state and that it is usable.
338 */
339int adis_initial_startup(struct adis *adis)
340{
341 int ret;
342
343 ret = adis_self_test(adis);
344 if (ret) {
345 dev_err(&adis->spi->dev, "Self-test failed, trying reset.\n");
346 adis_reset(adis);
347 msleep(adis->data->startup_delay);
348 ret = adis_self_test(adis);
349 if (ret) {
350 dev_err(&adis->spi->dev, "Second self-test failed, giving up.\n");
351 return ret;
352 }
353 }
354
355 return 0;
356}
357EXPORT_SYMBOL_GPL(adis_initial_startup);
358
359/**
360 * adis_single_conversion() - Performs a single sample conversion
361 * @indio_dev: The IIO device
362 * @chan: The IIO channel
363 * @error_mask: Mask for the error bit
364 * @val: Result of the conversion
365 *
366 * Returns IIO_VAL_INT on success, a negative error code otherwise.
367 *
368 * The function performs a single conversion on a given channel and post
369 * processes the value accordingly to the channel spec. If a error_mask is given
370 * the function will check if the mask is set in the returned raw value. If it
371 * is set the function will perform a self-check. If the device does not report
372 * a error bit in the channels raw value set error_mask to 0.
373 */
374int adis_single_conversion(struct iio_dev *indio_dev,
375 const struct iio_chan_spec *chan, unsigned int error_mask, int *val)
376{
377 struct adis *adis = iio_device_get_drvdata(indio_dev);
378 unsigned int uval;
379 int ret;
380
381 mutex_lock(&indio_dev->mlock);
382
383 ret = adis_read_reg(adis, chan->address, &uval,
384 chan->scan_type.storagebits / 8);
385 if (ret)
386 goto err_unlock;
387
388 if (uval & error_mask) {
389 ret = adis_check_status(adis);
390 if (ret)
391 goto err_unlock;
392 }
393
394 if (chan->scan_type.sign == 's')
395 *val = sign_extend32(uval, chan->scan_type.realbits - 1);
396 else
397 *val = uval & ((1 << chan->scan_type.realbits) - 1);
398
399 ret = IIO_VAL_INT;
400err_unlock:
401 mutex_unlock(&indio_dev->mlock);
402 return ret;
403}
404EXPORT_SYMBOL_GPL(adis_single_conversion);
405
406/**
407 * adis_init() - Initialize adis device structure
408 * @adis: The adis device
409 * @indio_dev: The iio device
410 * @spi: The spi device
411 * @data: Chip specific data
412 *
413 * Returns 0 on success, a negative error code otherwise.
414 *
415 * This function must be called, before any other adis helper function may be
416 * called.
417 */
418int adis_init(struct adis *adis, struct iio_dev *indio_dev,
419 struct spi_device *spi, const struct adis_data *data)
420{
421 mutex_init(&adis->txrx_lock);
422 adis->spi = spi;
423 adis->data = data;
424 iio_device_set_drvdata(indio_dev, adis);
425
426 if (data->has_paging) {
427 /* Need to set the page before first read/write */
428 adis->current_page = -1;
429 } else {
430 /* Page will always be 0 */
431 adis->current_page = 0;
432 }
433
434 return adis_enable_irq(adis, false);
435}
436EXPORT_SYMBOL_GPL(adis_init);
437
438MODULE_LICENSE("GPL");
439MODULE_AUTHOR("Lars-Peter Clausen <lars@metafoo.de>");
440MODULE_DESCRIPTION("Common library code for ADIS16XXX devices");
diff --git a/drivers/iio/imu/adis16480.c b/drivers/iio/imu/adis16480.c
new file mode 100644
index 000000000000..8c26a5f7cd5d
--- /dev/null
+++ b/drivers/iio/imu/adis16480.c
@@ -0,0 +1,924 @@
1/*
2 * ADIS16480 and similar IMUs driver
3 *
4 * Copyright 2012 Analog Devices Inc.
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License version 2 as
8 * published by the Free Software Foundation.
9 *
10 */
11
12#include <linux/interrupt.h>
13#include <linux/delay.h>
14#include <linux/mutex.h>
15#include <linux/device.h>
16#include <linux/kernel.h>
17#include <linux/spi/spi.h>
18#include <linux/slab.h>
19#include <linux/sysfs.h>
20#include <linux/module.h>
21
22#include <linux/iio/iio.h>
23#include <linux/iio/sysfs.h>
24#include <linux/iio/buffer.h>
25#include <linux/iio/imu/adis.h>
26
27#include <linux/debugfs.h>
28
29#define ADIS16480_PAGE_SIZE 0x80
30
31#define ADIS16480_REG(page, reg) ((page) * ADIS16480_PAGE_SIZE + (reg))
32
33#define ADIS16480_REG_PAGE_ID 0x00 /* Same address on each page */
34#define ADIS16480_REG_SEQ_CNT ADIS16480_REG(0x00, 0x06)
35#define ADIS16480_REG_SYS_E_FLA ADIS16480_REG(0x00, 0x08)
36#define ADIS16480_REG_DIAG_STS ADIS16480_REG(0x00, 0x0A)
37#define ADIS16480_REG_ALM_STS ADIS16480_REG(0x00, 0x0C)
38#define ADIS16480_REG_TEMP_OUT ADIS16480_REG(0x00, 0x0E)
39#define ADIS16480_REG_X_GYRO_OUT ADIS16480_REG(0x00, 0x10)
40#define ADIS16480_REG_Y_GYRO_OUT ADIS16480_REG(0x00, 0x14)
41#define ADIS16480_REG_Z_GYRO_OUT ADIS16480_REG(0x00, 0x18)
42#define ADIS16480_REG_X_ACCEL_OUT ADIS16480_REG(0x00, 0x1C)
43#define ADIS16480_REG_Y_ACCEL_OUT ADIS16480_REG(0x00, 0x20)
44#define ADIS16480_REG_Z_ACCEL_OUT ADIS16480_REG(0x00, 0x24)
45#define ADIS16480_REG_X_MAGN_OUT ADIS16480_REG(0x00, 0x28)
46#define ADIS16480_REG_Y_MAGN_OUT ADIS16480_REG(0x00, 0x2A)
47#define ADIS16480_REG_Z_MAGN_OUT ADIS16480_REG(0x00, 0x2C)
48#define ADIS16480_REG_BAROM_OUT ADIS16480_REG(0x00, 0x2E)
49#define ADIS16480_REG_X_DELTAANG_OUT ADIS16480_REG(0x00, 0x40)
50#define ADIS16480_REG_Y_DELTAANG_OUT ADIS16480_REG(0x00, 0x44)
51#define ADIS16480_REG_Z_DELTAANG_OUT ADIS16480_REG(0x00, 0x48)
52#define ADIS16480_REG_X_DELTAVEL_OUT ADIS16480_REG(0x00, 0x4C)
53#define ADIS16480_REG_Y_DELTAVEL_OUT ADIS16480_REG(0x00, 0x50)
54#define ADIS16480_REG_Z_DELTAVEL_OUT ADIS16480_REG(0x00, 0x54)
55#define ADIS16480_REG_PROD_ID ADIS16480_REG(0x00, 0x7E)
56
57#define ADIS16480_REG_X_GYRO_SCALE ADIS16480_REG(0x02, 0x04)
58#define ADIS16480_REG_Y_GYRO_SCALE ADIS16480_REG(0x02, 0x06)
59#define ADIS16480_REG_Z_GYRO_SCALE ADIS16480_REG(0x02, 0x08)
60#define ADIS16480_REG_X_ACCEL_SCALE ADIS16480_REG(0x02, 0x0A)
61#define ADIS16480_REG_Y_ACCEL_SCALE ADIS16480_REG(0x02, 0x0C)
62#define ADIS16480_REG_Z_ACCEL_SCALE ADIS16480_REG(0x02, 0x0E)
63#define ADIS16480_REG_X_GYRO_BIAS ADIS16480_REG(0x02, 0x10)
64#define ADIS16480_REG_Y_GYRO_BIAS ADIS16480_REG(0x02, 0x14)
65#define ADIS16480_REG_Z_GYRO_BIAS ADIS16480_REG(0x02, 0x18)
66#define ADIS16480_REG_X_ACCEL_BIAS ADIS16480_REG(0x02, 0x1C)
67#define ADIS16480_REG_Y_ACCEL_BIAS ADIS16480_REG(0x02, 0x20)
68#define ADIS16480_REG_Z_ACCEL_BIAS ADIS16480_REG(0x02, 0x24)
69#define ADIS16480_REG_X_HARD_IRON ADIS16480_REG(0x02, 0x28)
70#define ADIS16480_REG_Y_HARD_IRON ADIS16480_REG(0x02, 0x2A)
71#define ADIS16480_REG_Z_HARD_IRON ADIS16480_REG(0x02, 0x2C)
72#define ADIS16480_REG_BAROM_BIAS ADIS16480_REG(0x02, 0x40)
73#define ADIS16480_REG_FLASH_CNT ADIS16480_REG(0x02, 0x7C)
74
75#define ADIS16480_REG_GLOB_CMD ADIS16480_REG(0x03, 0x02)
76#define ADIS16480_REG_FNCTIO_CTRL ADIS16480_REG(0x03, 0x06)
77#define ADIS16480_REG_GPIO_CTRL ADIS16480_REG(0x03, 0x08)
78#define ADIS16480_REG_CONFIG ADIS16480_REG(0x03, 0x0A)
79#define ADIS16480_REG_DEC_RATE ADIS16480_REG(0x03, 0x0C)
80#define ADIS16480_REG_SLP_CNT ADIS16480_REG(0x03, 0x10)
81#define ADIS16480_REG_FILTER_BNK0 ADIS16480_REG(0x03, 0x16)
82#define ADIS16480_REG_FILTER_BNK1 ADIS16480_REG(0x03, 0x18)
83#define ADIS16480_REG_ALM_CNFG0 ADIS16480_REG(0x03, 0x20)
84#define ADIS16480_REG_ALM_CNFG1 ADIS16480_REG(0x03, 0x22)
85#define ADIS16480_REG_ALM_CNFG2 ADIS16480_REG(0x03, 0x24)
86#define ADIS16480_REG_XG_ALM_MAGN ADIS16480_REG(0x03, 0x28)
87#define ADIS16480_REG_YG_ALM_MAGN ADIS16480_REG(0x03, 0x2A)
88#define ADIS16480_REG_ZG_ALM_MAGN ADIS16480_REG(0x03, 0x2C)
89#define ADIS16480_REG_XA_ALM_MAGN ADIS16480_REG(0x03, 0x2E)
90#define ADIS16480_REG_YA_ALM_MAGN ADIS16480_REG(0x03, 0x30)
91#define ADIS16480_REG_ZA_ALM_MAGN ADIS16480_REG(0x03, 0x32)
92#define ADIS16480_REG_XM_ALM_MAGN ADIS16480_REG(0x03, 0x34)
93#define ADIS16480_REG_YM_ALM_MAGN ADIS16480_REG(0x03, 0x36)
94#define ADIS16480_REG_ZM_ALM_MAGN ADIS16480_REG(0x03, 0x38)
95#define ADIS16480_REG_BR_ALM_MAGN ADIS16480_REG(0x03, 0x3A)
96#define ADIS16480_REG_FIRM_REV ADIS16480_REG(0x03, 0x78)
97#define ADIS16480_REG_FIRM_DM ADIS16480_REG(0x03, 0x7A)
98#define ADIS16480_REG_FIRM_Y ADIS16480_REG(0x03, 0x7C)
99
100#define ADIS16480_REG_SERIAL_NUM ADIS16480_REG(0x04, 0x20)
101
102/* Each filter coefficent bank spans two pages */
103#define ADIS16480_FIR_COEF(page) (x < 60 ? ADIS16480_REG(page, (x) + 8) : \
104 ADIS16480_REG((page) + 1, (x) - 60 + 8))
105#define ADIS16480_FIR_COEF_A(x) ADIS16480_FIR_COEF(0x05, (x))
106#define ADIS16480_FIR_COEF_B(x) ADIS16480_FIR_COEF(0x07, (x))
107#define ADIS16480_FIR_COEF_C(x) ADIS16480_FIR_COEF(0x09, (x))
108#define ADIS16480_FIR_COEF_D(x) ADIS16480_FIR_COEF(0x0B, (x))
109
110struct adis16480_chip_info {
111 unsigned int num_channels;
112 const struct iio_chan_spec *channels;
113};
114
115struct adis16480 {
116 const struct adis16480_chip_info *chip_info;
117
118 struct adis adis;
119};
120
121#ifdef CONFIG_DEBUG_FS
122
123static ssize_t adis16480_show_firmware_revision(struct file *file,
124 char __user *userbuf, size_t count, loff_t *ppos)
125{
126 struct adis16480 *adis16480 = file->private_data;
127 char buf[7];
128 size_t len;
129 u16 rev;
130 int ret;
131
132 ret = adis_read_reg_16(&adis16480->adis, ADIS16480_REG_FIRM_REV, &rev);
133 if (ret < 0)
134 return ret;
135
136 len = scnprintf(buf, sizeof(buf), "%x.%x\n", rev >> 8, rev & 0xff);
137
138 return simple_read_from_buffer(userbuf, count, ppos, buf, len);
139}
140
141static const struct file_operations adis16480_firmware_revision_fops = {
142 .open = simple_open,
143 .read = adis16480_show_firmware_revision,
144 .llseek = default_llseek,
145 .owner = THIS_MODULE,
146};
147
148static ssize_t adis16480_show_firmware_date(struct file *file,
149 char __user *userbuf, size_t count, loff_t *ppos)
150{
151 struct adis16480 *adis16480 = file->private_data;
152 u16 md, year;
153 char buf[12];
154 size_t len;
155 int ret;
156
157 ret = adis_read_reg_16(&adis16480->adis, ADIS16480_REG_FIRM_Y, &year);
158 if (ret < 0)
159 return ret;
160
161 ret = adis_read_reg_16(&adis16480->adis, ADIS16480_REG_FIRM_DM, &md);
162 if (ret < 0)
163 return ret;
164
165 len = snprintf(buf, sizeof(buf), "%.2x-%.2x-%.4x\n",
166 md >> 8, md & 0xff, year);
167
168 return simple_read_from_buffer(userbuf, count, ppos, buf, len);
169}
170
171static const struct file_operations adis16480_firmware_date_fops = {
172 .open = simple_open,
173 .read = adis16480_show_firmware_date,
174 .llseek = default_llseek,
175 .owner = THIS_MODULE,
176};
177
178static int adis16480_show_serial_number(void *arg, u64 *val)
179{
180 struct adis16480 *adis16480 = arg;
181 u16 serial;
182 int ret;
183
184 ret = adis_read_reg_16(&adis16480->adis, ADIS16480_REG_SERIAL_NUM,
185 &serial);
186 if (ret < 0)
187 return ret;
188
189 *val = serial;
190
191 return 0;
192}
193DEFINE_SIMPLE_ATTRIBUTE(adis16480_serial_number_fops,
194 adis16480_show_serial_number, NULL, "0x%.4llx\n");
195
196static int adis16480_show_product_id(void *arg, u64 *val)
197{
198 struct adis16480 *adis16480 = arg;
199 u16 prod_id;
200 int ret;
201
202 ret = adis_read_reg_16(&adis16480->adis, ADIS16480_REG_PROD_ID,
203 &prod_id);
204 if (ret < 0)
205 return ret;
206
207 *val = prod_id;
208
209 return 0;
210}
211DEFINE_SIMPLE_ATTRIBUTE(adis16480_product_id_fops,
212 adis16480_show_product_id, NULL, "%llu\n");
213
214static int adis16480_show_flash_count(void *arg, u64 *val)
215{
216 struct adis16480 *adis16480 = arg;
217 u32 flash_count;
218 int ret;
219
220 ret = adis_read_reg_32(&adis16480->adis, ADIS16480_REG_FLASH_CNT,
221 &flash_count);
222 if (ret < 0)
223 return ret;
224
225 *val = flash_count;
226
227 return 0;
228}
229DEFINE_SIMPLE_ATTRIBUTE(adis16480_flash_count_fops,
230 adis16480_show_flash_count, NULL, "%lld\n");
231
232static int adis16480_debugfs_init(struct iio_dev *indio_dev)
233{
234 struct adis16480 *adis16480 = iio_priv(indio_dev);
235
236 debugfs_create_file("firmware_revision", 0400,
237 indio_dev->debugfs_dentry, adis16480,
238 &adis16480_firmware_revision_fops);
239 debugfs_create_file("firmware_date", 0400, indio_dev->debugfs_dentry,
240 adis16480, &adis16480_firmware_date_fops);
241 debugfs_create_file("serial_number", 0400, indio_dev->debugfs_dentry,
242 adis16480, &adis16480_serial_number_fops);
243 debugfs_create_file("product_id", 0400, indio_dev->debugfs_dentry,
244 adis16480, &adis16480_product_id_fops);
245 debugfs_create_file("flash_count", 0400, indio_dev->debugfs_dentry,
246 adis16480, &adis16480_flash_count_fops);
247
248 return 0;
249}
250
251#else
252
253static int adis16480_debugfs_init(struct iio_dev *indio_dev)
254{
255 return 0;
256}
257
258#endif
259
260static int adis16480_set_freq(struct adis16480 *st, unsigned int freq)
261{
262 unsigned int t;
263
264 t = 2460000 / freq;
265 if (t > 2048)
266 t = 2048;
267
268 if (t != 0)
269 t--;
270
271 return adis_write_reg_16(&st->adis, ADIS16480_REG_DEC_RATE, t);
272}
273
274static int adis16480_get_freq(struct adis16480 *st, unsigned int *freq)
275{
276 uint16_t t;
277 int ret;
278
279 ret = adis_read_reg_16(&st->adis, ADIS16480_REG_DEC_RATE, &t);
280 if (ret < 0)
281 return ret;
282
283 *freq = 2460000 / (t + 1);
284
285 return 0;
286}
287
288static ssize_t adis16480_read_frequency(struct device *dev,
289 struct device_attribute *attr,
290 char *buf)
291{
292 struct iio_dev *indio_dev = dev_to_iio_dev(dev);
293 struct adis16480 *st = iio_priv(indio_dev);
294 unsigned int freq;
295 int ret;
296
297 ret = adis16480_get_freq(st, &freq);
298 if (ret < 0)
299 return ret;
300
301 return sprintf(buf, "%d.%.3d\n", freq / 1000, freq % 1000);
302}
303
304static ssize_t adis16480_write_frequency(struct device *dev,
305 struct device_attribute *attr,
306 const char *buf,
307 size_t len)
308{
309 struct iio_dev *indio_dev = dev_to_iio_dev(dev);
310 struct adis16480 *st = iio_priv(indio_dev);
311 int freq_int, freq_fract;
312 long val;
313 int ret;
314
315 ret = iio_str_to_fixpoint(buf, 100, &freq_int, &freq_fract);
316 if (ret)
317 return ret;
318
319 val = freq_int * 1000 + freq_fract;
320
321 if (val <= 0)
322 return -EINVAL;
323
324 ret = adis16480_set_freq(st, val);
325
326 return ret ? ret : len;
327}
328
329static IIO_DEV_ATTR_SAMP_FREQ(S_IWUSR | S_IRUGO,
330 adis16480_read_frequency,
331 adis16480_write_frequency);
332
333enum {
334 ADIS16480_SCAN_GYRO_X,
335 ADIS16480_SCAN_GYRO_Y,
336 ADIS16480_SCAN_GYRO_Z,
337 ADIS16480_SCAN_ACCEL_X,
338 ADIS16480_SCAN_ACCEL_Y,
339 ADIS16480_SCAN_ACCEL_Z,
340 ADIS16480_SCAN_MAGN_X,
341 ADIS16480_SCAN_MAGN_Y,
342 ADIS16480_SCAN_MAGN_Z,
343 ADIS16480_SCAN_BARO,
344 ADIS16480_SCAN_TEMP,
345};
346
347static const unsigned int adis16480_calibbias_regs[] = {
348 [ADIS16480_SCAN_GYRO_X] = ADIS16480_REG_X_GYRO_BIAS,
349 [ADIS16480_SCAN_GYRO_Y] = ADIS16480_REG_Y_GYRO_BIAS,
350 [ADIS16480_SCAN_GYRO_Z] = ADIS16480_REG_Z_GYRO_BIAS,
351 [ADIS16480_SCAN_ACCEL_X] = ADIS16480_REG_X_ACCEL_BIAS,
352 [ADIS16480_SCAN_ACCEL_Y] = ADIS16480_REG_Y_ACCEL_BIAS,
353 [ADIS16480_SCAN_ACCEL_Z] = ADIS16480_REG_Z_ACCEL_BIAS,
354 [ADIS16480_SCAN_MAGN_X] = ADIS16480_REG_X_HARD_IRON,
355 [ADIS16480_SCAN_MAGN_Y] = ADIS16480_REG_Y_HARD_IRON,
356 [ADIS16480_SCAN_MAGN_Z] = ADIS16480_REG_Z_HARD_IRON,
357 [ADIS16480_SCAN_BARO] = ADIS16480_REG_BAROM_BIAS,
358};
359
360static const unsigned int adis16480_calibscale_regs[] = {
361 [ADIS16480_SCAN_GYRO_X] = ADIS16480_REG_X_GYRO_SCALE,
362 [ADIS16480_SCAN_GYRO_Y] = ADIS16480_REG_Y_GYRO_SCALE,
363 [ADIS16480_SCAN_GYRO_Z] = ADIS16480_REG_Z_GYRO_SCALE,
364 [ADIS16480_SCAN_ACCEL_X] = ADIS16480_REG_X_ACCEL_SCALE,
365 [ADIS16480_SCAN_ACCEL_Y] = ADIS16480_REG_Y_ACCEL_SCALE,
366 [ADIS16480_SCAN_ACCEL_Z] = ADIS16480_REG_Z_ACCEL_SCALE,
367};
368
369static int adis16480_set_calibbias(struct iio_dev *indio_dev,
370 const struct iio_chan_spec *chan, int bias)
371{
372 unsigned int reg = adis16480_calibbias_regs[chan->scan_index];
373 struct adis16480 *st = iio_priv(indio_dev);
374
375 switch (chan->type) {
376 case IIO_MAGN:
377 case IIO_PRESSURE:
378 if (bias < -0x8000 || bias >= 0x8000)
379 return -EINVAL;
380 return adis_write_reg_16(&st->adis, reg, bias);
381 case IIO_ANGL_VEL:
382 case IIO_ACCEL:
383 return adis_write_reg_32(&st->adis, reg, bias);
384 default:
385 break;
386 }
387
388 return -EINVAL;
389}
390
391static int adis16480_get_calibbias(struct iio_dev *indio_dev,
392 const struct iio_chan_spec *chan, int *bias)
393{
394 unsigned int reg = adis16480_calibbias_regs[chan->scan_index];
395 struct adis16480 *st = iio_priv(indio_dev);
396 uint16_t val16;
397 uint32_t val32;
398 int ret;
399
400 switch (chan->type) {
401 case IIO_MAGN:
402 case IIO_PRESSURE:
403 ret = adis_read_reg_16(&st->adis, reg, &val16);
404 *bias = sign_extend32(val16, 15);
405 break;
406 case IIO_ANGL_VEL:
407 case IIO_ACCEL:
408 ret = adis_read_reg_32(&st->adis, reg, &val32);
409 *bias = sign_extend32(val32, 31);
410 break;
411 default:
412 ret = -EINVAL;
413 }
414
415 if (ret < 0)
416 return ret;
417
418 return IIO_VAL_INT;
419}
420
421static int adis16480_set_calibscale(struct iio_dev *indio_dev,
422 const struct iio_chan_spec *chan, int scale)
423{
424 unsigned int reg = adis16480_calibscale_regs[chan->scan_index];
425 struct adis16480 *st = iio_priv(indio_dev);
426
427 if (scale < -0x8000 || scale >= 0x8000)
428 return -EINVAL;
429
430 return adis_write_reg_16(&st->adis, reg, scale);
431}
432
433static int adis16480_get_calibscale(struct iio_dev *indio_dev,
434 const struct iio_chan_spec *chan, int *scale)
435{
436 unsigned int reg = adis16480_calibscale_regs[chan->scan_index];
437 struct adis16480 *st = iio_priv(indio_dev);
438 uint16_t val16;
439 int ret;
440
441 ret = adis_read_reg_16(&st->adis, reg, &val16);
442 if (ret < 0)
443 return ret;
444
445 *scale = sign_extend32(val16, 15);
446 return IIO_VAL_INT;
447}
448
449static const unsigned int adis16480_def_filter_freqs[] = {
450 310,
451 55,
452 275,
453 63,
454};
455
456static const unsigned int ad16480_filter_data[][2] = {
457 [ADIS16480_SCAN_GYRO_X] = { ADIS16480_REG_FILTER_BNK0, 0 },
458 [ADIS16480_SCAN_GYRO_Y] = { ADIS16480_REG_FILTER_BNK0, 3 },
459 [ADIS16480_SCAN_GYRO_Z] = { ADIS16480_REG_FILTER_BNK0, 6 },
460 [ADIS16480_SCAN_ACCEL_X] = { ADIS16480_REG_FILTER_BNK0, 9 },
461 [ADIS16480_SCAN_ACCEL_Y] = { ADIS16480_REG_FILTER_BNK0, 12 },
462 [ADIS16480_SCAN_ACCEL_Z] = { ADIS16480_REG_FILTER_BNK1, 0 },
463 [ADIS16480_SCAN_MAGN_X] = { ADIS16480_REG_FILTER_BNK1, 3 },
464 [ADIS16480_SCAN_MAGN_Y] = { ADIS16480_REG_FILTER_BNK1, 6 },
465 [ADIS16480_SCAN_MAGN_Z] = { ADIS16480_REG_FILTER_BNK1, 9 },
466};
467
468static int adis16480_get_filter_freq(struct iio_dev *indio_dev,
469 const struct iio_chan_spec *chan, int *freq)
470{
471 struct adis16480 *st = iio_priv(indio_dev);
472 unsigned int enable_mask, offset, reg;
473 uint16_t val;
474 int ret;
475
476 reg = ad16480_filter_data[chan->scan_index][0];
477 offset = ad16480_filter_data[chan->scan_index][1];
478 enable_mask = BIT(offset + 2);
479
480 ret = adis_read_reg_16(&st->adis, reg, &val);
481 if (ret < 0)
482 return ret;
483
484 if (!(val & enable_mask))
485 *freq = 0;
486 else
487 *freq = adis16480_def_filter_freqs[(val >> offset) & 0x3];
488
489 return IIO_VAL_INT;
490}
491
492static int adis16480_set_filter_freq(struct iio_dev *indio_dev,
493 const struct iio_chan_spec *chan, unsigned int freq)
494{
495 struct adis16480 *st = iio_priv(indio_dev);
496 unsigned int enable_mask, offset, reg;
497 unsigned int diff, best_diff;
498 unsigned int i, best_freq;
499 uint16_t val;
500 int ret;
501
502 reg = ad16480_filter_data[chan->scan_index][0];
503 offset = ad16480_filter_data[chan->scan_index][1];
504 enable_mask = BIT(offset + 2);
505
506 ret = adis_read_reg_16(&st->adis, reg, &val);
507 if (ret < 0)
508 return ret;
509
510 if (freq == 0) {
511 val &= ~enable_mask;
512 } else {
513 best_freq = 0;
514 best_diff = 310;
515 for (i = 0; i < ARRAY_SIZE(adis16480_def_filter_freqs); i++) {
516 if (adis16480_def_filter_freqs[i] >= freq) {
517 diff = adis16480_def_filter_freqs[i] - freq;
518 if (diff < best_diff) {
519 best_diff = diff;
520 best_freq = i;
521 }
522 }
523 }
524
525 val &= ~(0x3 << offset);
526 val |= best_freq << offset;
527 val |= enable_mask;
528 }
529
530 return adis_write_reg_16(&st->adis, reg, val);
531}
532
533static int adis16480_read_raw(struct iio_dev *indio_dev,
534 const struct iio_chan_spec *chan, int *val, int *val2, long info)
535{
536 switch (info) {
537 case IIO_CHAN_INFO_RAW:
538 return adis_single_conversion(indio_dev, chan, 0, val);
539 case IIO_CHAN_INFO_SCALE:
540 switch (chan->type) {
541 case IIO_ANGL_VEL:
542 *val = 0;
543 *val2 = IIO_DEGREE_TO_RAD(20000); /* 0.02 degree/sec */
544 return IIO_VAL_INT_PLUS_MICRO;
545 case IIO_ACCEL:
546 *val = 0;
547 *val2 = IIO_G_TO_M_S_2(800); /* 0.8 mg */
548 return IIO_VAL_INT_PLUS_MICRO;
549 case IIO_MAGN:
550 *val = 0;
551 *val2 = 100; /* 0.0001 gauss */
552 return IIO_VAL_INT_PLUS_MICRO;
553 case IIO_TEMP:
554 *val = 5;
555 *val2 = 650000; /* 5.65 milli degree Celsius */
556 return IIO_VAL_INT_PLUS_MICRO;
557 case IIO_PRESSURE:
558 *val = 0;
559 *val2 = 4000; /* 40ubar = 0.004 kPa */
560 return IIO_VAL_INT_PLUS_MICRO;
561 default:
562 return -EINVAL;
563 }
564 case IIO_CHAN_INFO_OFFSET:
565 /* Only the temperature channel has a offset */
566 *val = 4425; /* 25 degree Celsius = 0x0000 */
567 return IIO_VAL_INT;
568 case IIO_CHAN_INFO_CALIBBIAS:
569 return adis16480_get_calibbias(indio_dev, chan, val);
570 case IIO_CHAN_INFO_CALIBSCALE:
571 return adis16480_get_calibscale(indio_dev, chan, val);
572 case IIO_CHAN_INFO_LOW_PASS_FILTER_3DB_FREQUENCY:
573 return adis16480_get_filter_freq(indio_dev, chan, val);
574 default:
575 return -EINVAL;
576 }
577}
578
579static int adis16480_write_raw(struct iio_dev *indio_dev,
580 const struct iio_chan_spec *chan, int val, int val2, long info)
581{
582 switch (info) {
583 case IIO_CHAN_INFO_CALIBBIAS:
584 return adis16480_set_calibbias(indio_dev, chan, val);
585 case IIO_CHAN_INFO_CALIBSCALE:
586 return adis16480_set_calibscale(indio_dev, chan, val);
587 case IIO_CHAN_INFO_LOW_PASS_FILTER_3DB_FREQUENCY:
588 return adis16480_set_filter_freq(indio_dev, chan, val);
589 default:
590 return -EINVAL;
591 }
592}
593
594#define ADIS16480_MOD_CHANNEL(_type, _mod, _address, _si, _info, _bits) \
595 { \
596 .type = (_type), \
597 .modified = 1, \
598 .channel2 = (_mod), \
599 .info_mask = IIO_CHAN_INFO_RAW_SEPARATE_BIT | \
600 IIO_CHAN_INFO_CALIBBIAS_SEPARATE_BIT | \
601 IIO_CHAN_INFO_SCALE_SHARED_BIT | \
602 _info, \
603 .address = (_address), \
604 .scan_index = (_si), \
605 .scan_type = { \
606 .sign = 's', \
607 .realbits = (_bits), \
608 .storagebits = (_bits), \
609 .endianness = IIO_BE, \
610 }, \
611 }
612
613#define ADIS16480_GYRO_CHANNEL(_mod) \
614 ADIS16480_MOD_CHANNEL(IIO_ANGL_VEL, IIO_MOD_ ## _mod, \
615 ADIS16480_REG_ ## _mod ## _GYRO_OUT, ADIS16480_SCAN_GYRO_ ## _mod, \
616 IIO_CHAN_INFO_LOW_PASS_FILTER_3DB_FREQUENCY_SEPARATE_BIT | \
617 IIO_CHAN_INFO_CALIBSCALE_SEPARATE_BIT, \
618 32)
619
620#define ADIS16480_ACCEL_CHANNEL(_mod) \
621 ADIS16480_MOD_CHANNEL(IIO_ACCEL, IIO_MOD_ ## _mod, \
622 ADIS16480_REG_ ## _mod ## _ACCEL_OUT, ADIS16480_SCAN_ACCEL_ ## _mod, \
623 IIO_CHAN_INFO_LOW_PASS_FILTER_3DB_FREQUENCY_SEPARATE_BIT | \
624 IIO_CHAN_INFO_CALIBSCALE_SEPARATE_BIT, \
625 32)
626
627#define ADIS16480_MAGN_CHANNEL(_mod) \
628 ADIS16480_MOD_CHANNEL(IIO_MAGN, IIO_MOD_ ## _mod, \
629 ADIS16480_REG_ ## _mod ## _MAGN_OUT, ADIS16480_SCAN_MAGN_ ## _mod, \
630 IIO_CHAN_INFO_LOW_PASS_FILTER_3DB_FREQUENCY_SEPARATE_BIT, \
631 16)
632
633#define ADIS16480_PRESSURE_CHANNEL() \
634 { \
635 .type = IIO_PRESSURE, \
636 .indexed = 1, \
637 .channel = 0, \
638 .info_mask = IIO_CHAN_INFO_RAW_SEPARATE_BIT | \
639 IIO_CHAN_INFO_CALIBBIAS_SEPARATE_BIT | \
640 IIO_CHAN_INFO_SCALE_SEPARATE_BIT, \
641 .address = ADIS16480_REG_BAROM_OUT, \
642 .scan_index = ADIS16480_SCAN_BARO, \
643 .scan_type = { \
644 .sign = 's', \
645 .realbits = 32, \
646 .storagebits = 32, \
647 .endianness = IIO_BE, \
648 }, \
649 }
650
651#define ADIS16480_TEMP_CHANNEL() { \
652 .type = IIO_TEMP, \
653 .indexed = 1, \
654 .channel = 0, \
655 .info_mask = IIO_CHAN_INFO_RAW_SEPARATE_BIT | \
656 IIO_CHAN_INFO_SCALE_SEPARATE_BIT | \
657 IIO_CHAN_INFO_OFFSET_SEPARATE_BIT, \
658 .address = ADIS16480_REG_TEMP_OUT, \
659 .scan_index = ADIS16480_SCAN_TEMP, \
660 .scan_type = { \
661 .sign = 's', \
662 .realbits = 16, \
663 .storagebits = 16, \
664 .endianness = IIO_BE, \
665 }, \
666 }
667
668static const struct iio_chan_spec adis16480_channels[] = {
669 ADIS16480_GYRO_CHANNEL(X),
670 ADIS16480_GYRO_CHANNEL(Y),
671 ADIS16480_GYRO_CHANNEL(Z),
672 ADIS16480_ACCEL_CHANNEL(X),
673 ADIS16480_ACCEL_CHANNEL(Y),
674 ADIS16480_ACCEL_CHANNEL(Z),
675 ADIS16480_MAGN_CHANNEL(X),
676 ADIS16480_MAGN_CHANNEL(Y),
677 ADIS16480_MAGN_CHANNEL(Z),
678 ADIS16480_PRESSURE_CHANNEL(),
679 ADIS16480_TEMP_CHANNEL(),
680 IIO_CHAN_SOFT_TIMESTAMP(11)
681};
682
683static const struct iio_chan_spec adis16485_channels[] = {
684 ADIS16480_GYRO_CHANNEL(X),
685 ADIS16480_GYRO_CHANNEL(Y),
686 ADIS16480_GYRO_CHANNEL(Z),
687 ADIS16480_ACCEL_CHANNEL(X),
688 ADIS16480_ACCEL_CHANNEL(Y),
689 ADIS16480_ACCEL_CHANNEL(Z),
690 ADIS16480_TEMP_CHANNEL(),
691 IIO_CHAN_SOFT_TIMESTAMP(7)
692};
693
694enum adis16480_variant {
695 ADIS16375,
696 ADIS16480,
697 ADIS16485,
698 ADIS16488,
699};
700
701static const struct adis16480_chip_info adis16480_chip_info[] = {
702 [ADIS16375] = {
703 .channels = adis16485_channels,
704 .num_channels = ARRAY_SIZE(adis16485_channels),
705 },
706 [ADIS16480] = {
707 .channels = adis16480_channels,
708 .num_channels = ARRAY_SIZE(adis16480_channels),
709 },
710 [ADIS16485] = {
711 .channels = adis16485_channels,
712 .num_channels = ARRAY_SIZE(adis16485_channels),
713 },
714 [ADIS16488] = {
715 .channels = adis16480_channels,
716 .num_channels = ARRAY_SIZE(adis16480_channels),
717 },
718};
719
720static struct attribute *adis16480_attributes[] = {
721 &iio_dev_attr_sampling_frequency.dev_attr.attr,
722 NULL
723};
724
725static const struct attribute_group adis16480_attribute_group = {
726 .attrs = adis16480_attributes,
727};
728
729static const struct iio_info adis16480_info = {
730 .attrs = &adis16480_attribute_group,
731 .read_raw = &adis16480_read_raw,
732 .write_raw = &adis16480_write_raw,
733 .update_scan_mode = adis_update_scan_mode,
734 .driver_module = THIS_MODULE,
735};
736
737static int adis16480_stop_device(struct iio_dev *indio_dev)
738{
739 struct adis16480 *st = iio_priv(indio_dev);
740 int ret;
741
742 ret = adis_write_reg_16(&st->adis, ADIS16480_REG_SLP_CNT, BIT(9));
743 if (ret)
744 dev_err(&indio_dev->dev,
745 "Could not power down device: %d\n", ret);
746
747 return ret;
748}
749
750static int adis16480_enable_irq(struct adis *adis, bool enable)
751{
752 return adis_write_reg_16(adis, ADIS16480_REG_FNCTIO_CTRL,
753 enable ? BIT(3) : 0);
754}
755
756static int adis16480_initial_setup(struct iio_dev *indio_dev)
757{
758 struct adis16480 *st = iio_priv(indio_dev);
759 uint16_t prod_id;
760 unsigned int device_id;
761 int ret;
762
763 adis_reset(&st->adis);
764 msleep(70);
765
766 ret = adis_write_reg_16(&st->adis, ADIS16480_REG_GLOB_CMD, BIT(1));
767 if (ret)
768 return ret;
769 msleep(30);
770
771 ret = adis_check_status(&st->adis);
772 if (ret)
773 return ret;
774
775 ret = adis_read_reg_16(&st->adis, ADIS16480_REG_PROD_ID, &prod_id);
776 if (ret)
777 return ret;
778
779 sscanf(indio_dev->name, "adis%u\n", &device_id);
780
781 if (prod_id != device_id)
782 dev_warn(&indio_dev->dev, "Device ID(%u) and product ID(%u) do not match.",
783 device_id, prod_id);
784
785 return 0;
786}
787
788#define ADIS16480_DIAG_STAT_XGYRO_FAIL 0
789#define ADIS16480_DIAG_STAT_YGYRO_FAIL 1
790#define ADIS16480_DIAG_STAT_ZGYRO_FAIL 2
791#define ADIS16480_DIAG_STAT_XACCL_FAIL 3
792#define ADIS16480_DIAG_STAT_YACCL_FAIL 4
793#define ADIS16480_DIAG_STAT_ZACCL_FAIL 5
794#define ADIS16480_DIAG_STAT_XMAGN_FAIL 8
795#define ADIS16480_DIAG_STAT_YMAGN_FAIL 9
796#define ADIS16480_DIAG_STAT_ZMAGN_FAIL 10
797#define ADIS16480_DIAG_STAT_BARO_FAIL 11
798
799static const char * const adis16480_status_error_msgs[] = {
800 [ADIS16480_DIAG_STAT_XGYRO_FAIL] = "X-axis gyroscope self-test failure",
801 [ADIS16480_DIAG_STAT_YGYRO_FAIL] = "Y-axis gyroscope self-test failure",
802 [ADIS16480_DIAG_STAT_ZGYRO_FAIL] = "Z-axis gyroscope self-test failure",
803 [ADIS16480_DIAG_STAT_XACCL_FAIL] = "X-axis accelerometer self-test failure",
804 [ADIS16480_DIAG_STAT_YACCL_FAIL] = "Y-axis accelerometer self-test failure",
805 [ADIS16480_DIAG_STAT_ZACCL_FAIL] = "Z-axis accelerometer self-test failure",
806 [ADIS16480_DIAG_STAT_XMAGN_FAIL] = "X-axis magnetometer self-test failure",
807 [ADIS16480_DIAG_STAT_YMAGN_FAIL] = "Y-axis magnetometer self-test failure",
808 [ADIS16480_DIAG_STAT_ZMAGN_FAIL] = "Z-axis magnetometer self-test failure",
809 [ADIS16480_DIAG_STAT_BARO_FAIL] = "Barometer self-test failure",
810};
811
812static const struct adis_data adis16480_data = {
813 .diag_stat_reg = ADIS16480_REG_DIAG_STS,
814 .glob_cmd_reg = ADIS16480_REG_GLOB_CMD,
815 .has_paging = true,
816
817 .read_delay = 5,
818 .write_delay = 5,
819
820 .status_error_msgs = adis16480_status_error_msgs,
821 .status_error_mask = BIT(ADIS16480_DIAG_STAT_XGYRO_FAIL) |
822 BIT(ADIS16480_DIAG_STAT_YGYRO_FAIL) |
823 BIT(ADIS16480_DIAG_STAT_ZGYRO_FAIL) |
824 BIT(ADIS16480_DIAG_STAT_XACCL_FAIL) |
825 BIT(ADIS16480_DIAG_STAT_YACCL_FAIL) |
826 BIT(ADIS16480_DIAG_STAT_ZACCL_FAIL) |
827 BIT(ADIS16480_DIAG_STAT_XMAGN_FAIL) |
828 BIT(ADIS16480_DIAG_STAT_YMAGN_FAIL) |
829 BIT(ADIS16480_DIAG_STAT_ZMAGN_FAIL) |
830 BIT(ADIS16480_DIAG_STAT_BARO_FAIL),
831
832 .enable_irq = adis16480_enable_irq,
833};
834
835static int adis16480_probe(struct spi_device *spi)
836{
837 const struct spi_device_id *id = spi_get_device_id(spi);
838 struct iio_dev *indio_dev;
839 struct adis16480 *st;
840 int ret;
841
842 indio_dev = iio_device_alloc(sizeof(*st));
843 if (indio_dev == NULL)
844 return -ENOMEM;
845
846 spi_set_drvdata(spi, indio_dev);
847
848 st = iio_priv(indio_dev);
849
850 st->chip_info = &adis16480_chip_info[id->driver_data];
851 indio_dev->dev.parent = &spi->dev;
852 indio_dev->name = spi_get_device_id(spi)->name;
853 indio_dev->channels = st->chip_info->channels;
854 indio_dev->num_channels = st->chip_info->num_channels;
855 indio_dev->info = &adis16480_info;
856 indio_dev->modes = INDIO_DIRECT_MODE;
857
858 ret = adis_init(&st->adis, indio_dev, spi, &adis16480_data);
859 if (ret)
860 goto error_free_dev;
861
862 ret = adis_setup_buffer_and_trigger(&st->adis, indio_dev, NULL);
863 if (ret)
864 goto error_free_dev;
865
866 ret = adis16480_initial_setup(indio_dev);
867 if (ret)
868 goto error_cleanup_buffer;
869
870 ret = iio_device_register(indio_dev);
871 if (ret)
872 goto error_stop_device;
873
874 adis16480_debugfs_init(indio_dev);
875
876 return 0;
877
878error_stop_device:
879 adis16480_stop_device(indio_dev);
880error_cleanup_buffer:
881 adis_cleanup_buffer_and_trigger(&st->adis, indio_dev);
882error_free_dev:
883 iio_device_free(indio_dev);
884 return ret;
885}
886
887static int adis16480_remove(struct spi_device *spi)
888{
889 struct iio_dev *indio_dev = spi_get_drvdata(spi);
890 struct adis16480 *st = iio_priv(indio_dev);
891
892 iio_device_unregister(indio_dev);
893 adis16480_stop_device(indio_dev);
894
895 adis_cleanup_buffer_and_trigger(&st->adis, indio_dev);
896
897 iio_device_free(indio_dev);
898
899 return 0;
900}
901
902static const struct spi_device_id adis16480_ids[] = {
903 { "adis16375", ADIS16375 },
904 { "adis16480", ADIS16480 },
905 { "adis16485", ADIS16485 },
906 { "adis16488", ADIS16488 },
907 { }
908};
909MODULE_DEVICE_TABLE(spi, adis16480_ids);
910
911static struct spi_driver adis16480_driver = {
912 .driver = {
913 .name = "adis16480",
914 .owner = THIS_MODULE,
915 },
916 .id_table = adis16480_ids,
917 .probe = adis16480_probe,
918 .remove = adis16480_remove,
919};
920module_spi_driver(adis16480_driver);
921
922MODULE_AUTHOR("Lars-Peter Clausen <lars@metafoo.de>");
923MODULE_DESCRIPTION("Analog Devices ADIS16480 IMU driver");
924MODULE_LICENSE("GPL v2");
diff --git a/drivers/iio/imu/adis_buffer.c b/drivers/iio/imu/adis_buffer.c
new file mode 100644
index 000000000000..99d8e0b0dd34
--- /dev/null
+++ b/drivers/iio/imu/adis_buffer.c
@@ -0,0 +1,176 @@
1/*
2 * Common library for ADIS16XXX devices
3 *
4 * Copyright 2012 Analog Devices Inc.
5 * Author: Lars-Peter Clausen <lars@metafoo.de>
6 *
7 * Licensed under the GPL-2 or later.
8 */
9
10#include <linux/export.h>
11#include <linux/interrupt.h>
12#include <linux/mutex.h>
13#include <linux/kernel.h>
14#include <linux/spi/spi.h>
15#include <linux/slab.h>
16
17#include <linux/iio/iio.h>
18#include <linux/iio/buffer.h>
19#include <linux/iio/trigger_consumer.h>
20#include <linux/iio/triggered_buffer.h>
21#include <linux/iio/imu/adis.h>
22
23int adis_update_scan_mode(struct iio_dev *indio_dev,
24 const unsigned long *scan_mask)
25{
26 struct adis *adis = iio_device_get_drvdata(indio_dev);
27 const struct iio_chan_spec *chan;
28 unsigned int scan_count;
29 unsigned int i, j;
30 __be16 *tx, *rx;
31
32 kfree(adis->xfer);
33 kfree(adis->buffer);
34
35 scan_count = indio_dev->scan_bytes / 2;
36
37 adis->xfer = kcalloc(scan_count + 1, sizeof(*adis->xfer), GFP_KERNEL);
38 if (!adis->xfer)
39 return -ENOMEM;
40
41 adis->buffer = kzalloc(indio_dev->scan_bytes * 2, GFP_KERNEL);
42 if (!adis->buffer)
43 return -ENOMEM;
44
45 rx = adis->buffer;
46 tx = rx + indio_dev->scan_bytes;
47
48 spi_message_init(&adis->msg);
49
50 for (j = 0; j <= scan_count; j++) {
51 adis->xfer[j].bits_per_word = 8;
52 if (j != scan_count)
53 adis->xfer[j].cs_change = 1;
54 adis->xfer[j].len = 2;
55 adis->xfer[j].delay_usecs = adis->data->read_delay;
56 if (j < scan_count)
57 adis->xfer[j].tx_buf = &tx[j];
58 if (j >= 1)
59 adis->xfer[j].rx_buf = &rx[j - 1];
60 spi_message_add_tail(&adis->xfer[j], &adis->msg);
61 }
62
63 chan = indio_dev->channels;
64 for (i = 0; i < indio_dev->num_channels; i++, chan++) {
65 if (!test_bit(chan->scan_index, scan_mask))
66 continue;
67 if (chan->scan_type.storagebits == 32)
68 *tx++ = cpu_to_be16((chan->address + 2) << 8);
69 *tx++ = cpu_to_be16(chan->address << 8);
70 }
71
72 return 0;
73}
74EXPORT_SYMBOL_GPL(adis_update_scan_mode);
75
76static irqreturn_t adis_trigger_handler(int irq, void *p)
77{
78 struct iio_poll_func *pf = p;
79 struct iio_dev *indio_dev = pf->indio_dev;
80 struct adis *adis = iio_device_get_drvdata(indio_dev);
81 int ret;
82
83 if (!adis->buffer)
84 return -ENOMEM;
85
86 if (adis->data->has_paging) {
87 mutex_lock(&adis->txrx_lock);
88 if (adis->current_page != 0) {
89 adis->tx[0] = ADIS_WRITE_REG(ADIS_REG_PAGE_ID);
90 adis->tx[1] = 0;
91 spi_write(adis->spi, adis->tx, 2);
92 }
93 }
94
95 ret = spi_sync(adis->spi, &adis->msg);
96 if (ret)
97 dev_err(&adis->spi->dev, "Failed to read data: %d", ret);
98
99
100 if (adis->data->has_paging) {
101 adis->current_page = 0;
102 mutex_unlock(&adis->txrx_lock);
103 }
104
105 /* Guaranteed to be aligned with 8 byte boundary */
106 if (indio_dev->scan_timestamp) {
107 void *b = adis->buffer + indio_dev->scan_bytes - sizeof(s64);
108 *(s64 *)b = pf->timestamp;
109 }
110
111 iio_push_to_buffers(indio_dev, adis->buffer);
112
113 iio_trigger_notify_done(indio_dev->trig);
114
115 return IRQ_HANDLED;
116}
117
118/**
119 * adis_setup_buffer_and_trigger() - Sets up buffer and trigger for the adis device
120 * @adis: The adis device.
121 * @indio_dev: The IIO device.
122 * @trigger_handler: Optional trigger handler, may be NULL.
123 *
124 * Returns 0 on success, a negative error code otherwise.
125 *
126 * This function sets up the buffer and trigger for a adis devices. If
127 * 'trigger_handler' is NULL the default trigger handler will be used. The
128 * default trigger handler will simply read the registers assigned to the
129 * currently active channels.
130 *
131 * adis_cleanup_buffer_and_trigger() should be called to free the resources
132 * allocated by this function.
133 */
134int adis_setup_buffer_and_trigger(struct adis *adis, struct iio_dev *indio_dev,
135 irqreturn_t (*trigger_handler)(int, void *))
136{
137 int ret;
138
139 if (!trigger_handler)
140 trigger_handler = adis_trigger_handler;
141
142 ret = iio_triggered_buffer_setup(indio_dev, &iio_pollfunc_store_time,
143 trigger_handler, NULL);
144 if (ret)
145 return ret;
146
147 if (adis->spi->irq) {
148 ret = adis_probe_trigger(adis, indio_dev);
149 if (ret)
150 goto error_buffer_cleanup;
151 }
152 return 0;
153
154error_buffer_cleanup:
155 iio_triggered_buffer_cleanup(indio_dev);
156 return ret;
157}
158EXPORT_SYMBOL_GPL(adis_setup_buffer_and_trigger);
159
160/**
161 * adis_cleanup_buffer_and_trigger() - Free buffer and trigger resources
162 * @adis: The adis device.
163 * @indio_dev: The IIO device.
164 *
165 * Frees resources allocated by adis_setup_buffer_and_trigger()
166 */
167void adis_cleanup_buffer_and_trigger(struct adis *adis,
168 struct iio_dev *indio_dev)
169{
170 if (adis->spi->irq)
171 adis_remove_trigger(adis);
172 kfree(adis->buffer);
173 kfree(adis->xfer);
174 iio_triggered_buffer_cleanup(indio_dev);
175}
176EXPORT_SYMBOL_GPL(adis_cleanup_buffer_and_trigger);
diff --git a/drivers/iio/imu/adis_trigger.c b/drivers/iio/imu/adis_trigger.c
new file mode 100644
index 000000000000..5a24c9cac343
--- /dev/null
+++ b/drivers/iio/imu/adis_trigger.c
@@ -0,0 +1,89 @@
1/*
2 * Common library for ADIS16XXX devices
3 *
4 * Copyright 2012 Analog Devices Inc.
5 * Author: Lars-Peter Clausen <lars@metafoo.de>
6 *
7 * Licensed under the GPL-2 or later.
8 */
9
10#include <linux/interrupt.h>
11#include <linux/kernel.h>
12#include <linux/spi/spi.h>
13#include <linux/export.h>
14
15#include <linux/iio/iio.h>
16#include <linux/iio/trigger.h>
17#include <linux/iio/imu/adis.h>
18
19static int adis_data_rdy_trigger_set_state(struct iio_trigger *trig,
20 bool state)
21{
22 struct adis *adis = trig->private_data;
23
24 return adis_enable_irq(adis, state);
25}
26
27static const struct iio_trigger_ops adis_trigger_ops = {
28 .owner = THIS_MODULE,
29 .set_trigger_state = &adis_data_rdy_trigger_set_state,
30};
31
32/**
33 * adis_probe_trigger() - Sets up trigger for a adis device
34 * @adis: The adis device
35 * @indio_dev: The IIO device
36 *
37 * Returns 0 on success or a negative error code
38 *
39 * adis_remove_trigger() should be used to free the trigger.
40 */
41int adis_probe_trigger(struct adis *adis, struct iio_dev *indio_dev)
42{
43 int ret;
44
45 adis->trig = iio_trigger_alloc("%s-dev%d", indio_dev->name,
46 indio_dev->id);
47 if (adis->trig == NULL)
48 return -ENOMEM;
49
50 ret = request_irq(adis->spi->irq,
51 &iio_trigger_generic_data_rdy_poll,
52 IRQF_TRIGGER_RISING,
53 indio_dev->name,
54 adis->trig);
55 if (ret)
56 goto error_free_trig;
57
58 adis->trig->dev.parent = &adis->spi->dev;
59 adis->trig->ops = &adis_trigger_ops;
60 adis->trig->private_data = adis;
61 ret = iio_trigger_register(adis->trig);
62
63 indio_dev->trig = adis->trig;
64 if (ret)
65 goto error_free_irq;
66
67 return 0;
68
69error_free_irq:
70 free_irq(adis->spi->irq, adis->trig);
71error_free_trig:
72 iio_trigger_free(adis->trig);
73 return ret;
74}
75EXPORT_SYMBOL_GPL(adis_probe_trigger);
76
77/**
78 * adis_remove_trigger() - Remove trigger for a adis devices
79 * @adis: The adis device
80 *
81 * Removes the trigger previously registered with adis_probe_trigger().
82 */
83void adis_remove_trigger(struct adis *adis)
84{
85 iio_trigger_unregister(adis->trig);
86 free_irq(adis->spi->irq, adis->trig);
87 iio_trigger_free(adis->trig);
88}
89EXPORT_SYMBOL_GPL(adis_remove_trigger);
diff --git a/drivers/iio/industrialio-buffer.c b/drivers/iio/industrialio-buffer.c
index d4ad37455a67..aaadd32f9f0d 100644
--- a/drivers/iio/industrialio-buffer.c
+++ b/drivers/iio/industrialio-buffer.c
@@ -31,6 +31,18 @@ static const char * const iio_endian_prefix[] = {
31 [IIO_LE] = "le", 31 [IIO_LE] = "le",
32}; 32};
33 33
34static bool iio_buffer_is_active(struct iio_dev *indio_dev,
35 struct iio_buffer *buf)
36{
37 struct list_head *p;
38
39 list_for_each(p, &indio_dev->buffer_list)
40 if (p == &buf->buffer_list)
41 return true;
42
43 return false;
44}
45
34/** 46/**
35 * iio_buffer_read_first_n_outer() - chrdev read for buffer access 47 * iio_buffer_read_first_n_outer() - chrdev read for buffer access
36 * 48 *
@@ -134,7 +146,7 @@ static ssize_t iio_scan_el_store(struct device *dev,
134 if (ret < 0) 146 if (ret < 0)
135 return ret; 147 return ret;
136 mutex_lock(&indio_dev->mlock); 148 mutex_lock(&indio_dev->mlock);
137 if (iio_buffer_enabled(indio_dev)) { 149 if (iio_buffer_is_active(indio_dev, indio_dev->buffer)) {
138 ret = -EBUSY; 150 ret = -EBUSY;
139 goto error_ret; 151 goto error_ret;
140 } 152 }
@@ -180,12 +192,11 @@ static ssize_t iio_scan_el_ts_store(struct device *dev,
180 return ret; 192 return ret;
181 193
182 mutex_lock(&indio_dev->mlock); 194 mutex_lock(&indio_dev->mlock);
183 if (iio_buffer_enabled(indio_dev)) { 195 if (iio_buffer_is_active(indio_dev, indio_dev->buffer)) {
184 ret = -EBUSY; 196 ret = -EBUSY;
185 goto error_ret; 197 goto error_ret;
186 } 198 }
187 indio_dev->buffer->scan_timestamp = state; 199 indio_dev->buffer->scan_timestamp = state;
188 indio_dev->scan_timestamp = state;
189error_ret: 200error_ret:
190 mutex_unlock(&indio_dev->mlock); 201 mutex_unlock(&indio_dev->mlock);
191 202
@@ -371,12 +382,12 @@ ssize_t iio_buffer_write_length(struct device *dev,
371 const char *buf, 382 const char *buf,
372 size_t len) 383 size_t len)
373{ 384{
374 int ret;
375 ulong val;
376 struct iio_dev *indio_dev = dev_to_iio_dev(dev); 385 struct iio_dev *indio_dev = dev_to_iio_dev(dev);
377 struct iio_buffer *buffer = indio_dev->buffer; 386 struct iio_buffer *buffer = indio_dev->buffer;
387 unsigned int val;
388 int ret;
378 389
379 ret = strict_strtoul(buf, 10, &val); 390 ret = kstrtouint(buf, 10, &val);
380 if (ret) 391 if (ret)
381 return ret; 392 return ret;
382 393
@@ -385,7 +396,7 @@ ssize_t iio_buffer_write_length(struct device *dev,
385 return len; 396 return len;
386 397
387 mutex_lock(&indio_dev->mlock); 398 mutex_lock(&indio_dev->mlock);
388 if (iio_buffer_enabled(indio_dev)) { 399 if (iio_buffer_is_active(indio_dev, indio_dev->buffer)) {
389 ret = -EBUSY; 400 ret = -EBUSY;
390 } else { 401 } else {
391 if (buffer->access->set_length) 402 if (buffer->access->set_length)
@@ -398,102 +409,14 @@ ssize_t iio_buffer_write_length(struct device *dev,
398} 409}
399EXPORT_SYMBOL(iio_buffer_write_length); 410EXPORT_SYMBOL(iio_buffer_write_length);
400 411
401ssize_t iio_buffer_store_enable(struct device *dev,
402 struct device_attribute *attr,
403 const char *buf,
404 size_t len)
405{
406 int ret;
407 bool requested_state, current_state;
408 int previous_mode;
409 struct iio_dev *indio_dev = dev_to_iio_dev(dev);
410 struct iio_buffer *buffer = indio_dev->buffer;
411
412 mutex_lock(&indio_dev->mlock);
413 previous_mode = indio_dev->currentmode;
414 requested_state = !(buf[0] == '0');
415 current_state = iio_buffer_enabled(indio_dev);
416 if (current_state == requested_state) {
417 printk(KERN_INFO "iio-buffer, current state requested again\n");
418 goto done;
419 }
420 if (requested_state) {
421 if (indio_dev->setup_ops->preenable) {
422 ret = indio_dev->setup_ops->preenable(indio_dev);
423 if (ret) {
424 printk(KERN_ERR
425 "Buffer not started: "
426 "buffer preenable failed\n");
427 goto error_ret;
428 }
429 }
430 if (buffer->access->request_update) {
431 ret = buffer->access->request_update(buffer);
432 if (ret) {
433 printk(KERN_INFO
434 "Buffer not started: "
435 "buffer parameter update failed\n");
436 goto error_ret;
437 }
438 }
439 /* Definitely possible for devices to support both of these. */
440 if (indio_dev->modes & INDIO_BUFFER_TRIGGERED) {
441 if (!indio_dev->trig) {
442 printk(KERN_INFO
443 "Buffer not started: no trigger\n");
444 ret = -EINVAL;
445 goto error_ret;
446 }
447 indio_dev->currentmode = INDIO_BUFFER_TRIGGERED;
448 } else if (indio_dev->modes & INDIO_BUFFER_HARDWARE)
449 indio_dev->currentmode = INDIO_BUFFER_HARDWARE;
450 else { /* should never be reached */
451 ret = -EINVAL;
452 goto error_ret;
453 }
454
455 if (indio_dev->setup_ops->postenable) {
456 ret = indio_dev->setup_ops->postenable(indio_dev);
457 if (ret) {
458 printk(KERN_INFO
459 "Buffer not started: "
460 "postenable failed\n");
461 indio_dev->currentmode = previous_mode;
462 if (indio_dev->setup_ops->postdisable)
463 indio_dev->setup_ops->
464 postdisable(indio_dev);
465 goto error_ret;
466 }
467 }
468 } else {
469 if (indio_dev->setup_ops->predisable) {
470 ret = indio_dev->setup_ops->predisable(indio_dev);
471 if (ret)
472 goto error_ret;
473 }
474 indio_dev->currentmode = INDIO_DIRECT_MODE;
475 if (indio_dev->setup_ops->postdisable) {
476 ret = indio_dev->setup_ops->postdisable(indio_dev);
477 if (ret)
478 goto error_ret;
479 }
480 }
481done:
482 mutex_unlock(&indio_dev->mlock);
483 return len;
484
485error_ret:
486 mutex_unlock(&indio_dev->mlock);
487 return ret;
488}
489EXPORT_SYMBOL(iio_buffer_store_enable);
490
491ssize_t iio_buffer_show_enable(struct device *dev, 412ssize_t iio_buffer_show_enable(struct device *dev,
492 struct device_attribute *attr, 413 struct device_attribute *attr,
493 char *buf) 414 char *buf)
494{ 415{
495 struct iio_dev *indio_dev = dev_to_iio_dev(dev); 416 struct iio_dev *indio_dev = dev_to_iio_dev(dev);
496 return sprintf(buf, "%d\n", iio_buffer_enabled(indio_dev)); 417 return sprintf(buf, "%d\n",
418 iio_buffer_is_active(indio_dev,
419 indio_dev->buffer));
497} 420}
498EXPORT_SYMBOL(iio_buffer_show_enable); 421EXPORT_SYMBOL(iio_buffer_show_enable);
499 422
@@ -537,35 +460,220 @@ static int iio_compute_scan_bytes(struct iio_dev *indio_dev, const long *mask,
537 return bytes; 460 return bytes;
538} 461}
539 462
540int iio_sw_buffer_preenable(struct iio_dev *indio_dev) 463int iio_update_buffers(struct iio_dev *indio_dev,
464 struct iio_buffer *insert_buffer,
465 struct iio_buffer *remove_buffer)
541{ 466{
542 struct iio_buffer *buffer = indio_dev->buffer; 467 int ret;
543 dev_dbg(&indio_dev->dev, "%s\n", __func__); 468 int success = 0;
469 struct iio_buffer *buffer;
470 unsigned long *compound_mask;
471 const unsigned long *old_mask;
544 472
545 /* How much space will the demuxed element take? */ 473 /* Wind down existing buffers - iff there are any */
546 indio_dev->scan_bytes = 474 if (!list_empty(&indio_dev->buffer_list)) {
547 iio_compute_scan_bytes(indio_dev, buffer->scan_mask, 475 if (indio_dev->setup_ops->predisable) {
548 buffer->scan_timestamp); 476 ret = indio_dev->setup_ops->predisable(indio_dev);
549 buffer->access->set_bytes_per_datum(buffer, indio_dev->scan_bytes); 477 if (ret)
478 goto error_ret;
479 }
480 indio_dev->currentmode = INDIO_DIRECT_MODE;
481 if (indio_dev->setup_ops->postdisable) {
482 ret = indio_dev->setup_ops->postdisable(indio_dev);
483 if (ret)
484 goto error_ret;
485 }
486 }
487 /* Keep a copy of current setup to allow roll back */
488 old_mask = indio_dev->active_scan_mask;
489 if (!indio_dev->available_scan_masks)
490 indio_dev->active_scan_mask = NULL;
491
492 if (remove_buffer)
493 list_del(&remove_buffer->buffer_list);
494 if (insert_buffer)
495 list_add(&insert_buffer->buffer_list, &indio_dev->buffer_list);
496
497 /* If no buffers in list, we are done */
498 if (list_empty(&indio_dev->buffer_list)) {
499 indio_dev->currentmode = INDIO_DIRECT_MODE;
500 if (indio_dev->available_scan_masks == NULL)
501 kfree(old_mask);
502 return 0;
503 }
550 504
551 /* What scan mask do we actually have ?*/ 505 /* What scan mask do we actually have ?*/
552 if (indio_dev->available_scan_masks) 506 compound_mask = kcalloc(BITS_TO_LONGS(indio_dev->masklength),
507 sizeof(long), GFP_KERNEL);
508 if (compound_mask == NULL) {
509 if (indio_dev->available_scan_masks == NULL)
510 kfree(old_mask);
511 return -ENOMEM;
512 }
513 indio_dev->scan_timestamp = 0;
514
515 list_for_each_entry(buffer, &indio_dev->buffer_list, buffer_list) {
516 bitmap_or(compound_mask, compound_mask, buffer->scan_mask,
517 indio_dev->masklength);
518 indio_dev->scan_timestamp |= buffer->scan_timestamp;
519 }
520 if (indio_dev->available_scan_masks) {
553 indio_dev->active_scan_mask = 521 indio_dev->active_scan_mask =
554 iio_scan_mask_match(indio_dev->available_scan_masks, 522 iio_scan_mask_match(indio_dev->available_scan_masks,
555 indio_dev->masklength, 523 indio_dev->masklength,
556 buffer->scan_mask); 524 compound_mask);
557 else 525 if (indio_dev->active_scan_mask == NULL) {
558 indio_dev->active_scan_mask = buffer->scan_mask; 526 /*
559 527 * Roll back.
560 if (indio_dev->active_scan_mask == NULL) 528 * Note can only occur when adding a buffer.
561 return -EINVAL; 529 */
530 list_del(&insert_buffer->buffer_list);
531 indio_dev->active_scan_mask = old_mask;
532 success = -EINVAL;
533 }
534 } else {
535 indio_dev->active_scan_mask = compound_mask;
536 }
562 537
563 iio_update_demux(indio_dev); 538 iio_update_demux(indio_dev);
564 539
565 if (indio_dev->info->update_scan_mode) 540 /* Wind up again */
566 return indio_dev->info 541 if (indio_dev->setup_ops->preenable) {
542 ret = indio_dev->setup_ops->preenable(indio_dev);
543 if (ret) {
544 printk(KERN_ERR
545 "Buffer not started:"
546 "buffer preenable failed\n");
547 goto error_remove_inserted;
548 }
549 }
550 indio_dev->scan_bytes =
551 iio_compute_scan_bytes(indio_dev,
552 indio_dev->active_scan_mask,
553 indio_dev->scan_timestamp);
554 list_for_each_entry(buffer, &indio_dev->buffer_list, buffer_list)
555 if (buffer->access->request_update) {
556 ret = buffer->access->request_update(buffer);
557 if (ret) {
558 printk(KERN_INFO
559 "Buffer not started:"
560 "buffer parameter update failed\n");
561 goto error_run_postdisable;
562 }
563 }
564 if (indio_dev->info->update_scan_mode) {
565 ret = indio_dev->info
567 ->update_scan_mode(indio_dev, 566 ->update_scan_mode(indio_dev,
568 indio_dev->active_scan_mask); 567 indio_dev->active_scan_mask);
568 if (ret < 0) {
569 printk(KERN_INFO "update scan mode failed\n");
570 goto error_run_postdisable;
571 }
572 }
573 /* Definitely possible for devices to support both of these.*/
574 if (indio_dev->modes & INDIO_BUFFER_TRIGGERED) {
575 if (!indio_dev->trig) {
576 printk(KERN_INFO "Buffer not started: no trigger\n");
577 ret = -EINVAL;
578 /* Can only occur on first buffer */
579 goto error_run_postdisable;
580 }
581 indio_dev->currentmode = INDIO_BUFFER_TRIGGERED;
582 } else if (indio_dev->modes & INDIO_BUFFER_HARDWARE) {
583 indio_dev->currentmode = INDIO_BUFFER_HARDWARE;
584 } else { /* should never be reached */
585 ret = -EINVAL;
586 goto error_run_postdisable;
587 }
588
589 if (indio_dev->setup_ops->postenable) {
590 ret = indio_dev->setup_ops->postenable(indio_dev);
591 if (ret) {
592 printk(KERN_INFO
593 "Buffer not started: postenable failed\n");
594 indio_dev->currentmode = INDIO_DIRECT_MODE;
595 if (indio_dev->setup_ops->postdisable)
596 indio_dev->setup_ops->postdisable(indio_dev);
597 goto error_disable_all_buffers;
598 }
599 }
600
601 if (indio_dev->available_scan_masks)
602 kfree(compound_mask);
603 else
604 kfree(old_mask);
605
606 return success;
607
608error_disable_all_buffers:
609 indio_dev->currentmode = INDIO_DIRECT_MODE;
610error_run_postdisable:
611 if (indio_dev->setup_ops->postdisable)
612 indio_dev->setup_ops->postdisable(indio_dev);
613error_remove_inserted:
614
615 if (insert_buffer)
616 list_del(&insert_buffer->buffer_list);
617 indio_dev->active_scan_mask = old_mask;
618 kfree(compound_mask);
619error_ret:
620
621 return ret;
622}
623EXPORT_SYMBOL_GPL(iio_update_buffers);
624
625ssize_t iio_buffer_store_enable(struct device *dev,
626 struct device_attribute *attr,
627 const char *buf,
628 size_t len)
629{
630 int ret;
631 bool requested_state;
632 struct iio_dev *indio_dev = dev_to_iio_dev(dev);
633 struct iio_buffer *pbuf = indio_dev->buffer;
634 bool inlist;
635
636 ret = strtobool(buf, &requested_state);
637 if (ret < 0)
638 return ret;
639
640 mutex_lock(&indio_dev->mlock);
641
642 /* Find out if it is in the list */
643 inlist = iio_buffer_is_active(indio_dev, pbuf);
644 /* Already in desired state */
645 if (inlist == requested_state)
646 goto done;
647
648 if (requested_state)
649 ret = iio_update_buffers(indio_dev,
650 indio_dev->buffer, NULL);
651 else
652 ret = iio_update_buffers(indio_dev,
653 NULL, indio_dev->buffer);
654
655 if (ret < 0)
656 goto done;
657done:
658 mutex_unlock(&indio_dev->mlock);
659 return (ret < 0) ? ret : len;
660}
661EXPORT_SYMBOL(iio_buffer_store_enable);
662
663int iio_sw_buffer_preenable(struct iio_dev *indio_dev)
664{
665 struct iio_buffer *buffer;
666 unsigned bytes;
667 dev_dbg(&indio_dev->dev, "%s\n", __func__);
668
669 list_for_each_entry(buffer, &indio_dev->buffer_list, buffer_list)
670 if (buffer->access->set_bytes_per_datum) {
671 bytes = iio_compute_scan_bytes(indio_dev,
672 buffer->scan_mask,
673 buffer->scan_timestamp);
674
675 buffer->access->set_bytes_per_datum(buffer, bytes);
676 }
569 return 0; 677 return 0;
570} 678}
571EXPORT_SYMBOL(iio_sw_buffer_preenable); 679EXPORT_SYMBOL(iio_sw_buffer_preenable);
@@ -599,7 +707,11 @@ static bool iio_validate_scan_mask(struct iio_dev *indio_dev,
599 * iio_scan_mask_set() - set particular bit in the scan mask 707 * iio_scan_mask_set() - set particular bit in the scan mask
600 * @buffer: the buffer whose scan mask we are interested in 708 * @buffer: the buffer whose scan mask we are interested in
601 * @bit: the bit to be set. 709 * @bit: the bit to be set.
602 **/ 710 *
711 * Note that at this point we have no way of knowing what other
712 * buffers might request, hence this code only verifies that the
713 * individual buffers request is plausible.
714 */
603int iio_scan_mask_set(struct iio_dev *indio_dev, 715int iio_scan_mask_set(struct iio_dev *indio_dev,
604 struct iio_buffer *buffer, int bit) 716 struct iio_buffer *buffer, int bit)
605{ 717{
@@ -682,13 +794,12 @@ static unsigned char *iio_demux(struct iio_buffer *buffer,
682 return buffer->demux_bounce; 794 return buffer->demux_bounce;
683} 795}
684 796
685int iio_push_to_buffer(struct iio_buffer *buffer, unsigned char *data) 797static int iio_push_to_buffer(struct iio_buffer *buffer, unsigned char *data)
686{ 798{
687 unsigned char *dataout = iio_demux(buffer, data); 799 unsigned char *dataout = iio_demux(buffer, data);
688 800
689 return buffer->access->store_to(buffer, dataout); 801 return buffer->access->store_to(buffer, dataout);
690} 802}
691EXPORT_SYMBOL_GPL(iio_push_to_buffer);
692 803
693static void iio_buffer_demux_free(struct iio_buffer *buffer) 804static void iio_buffer_demux_free(struct iio_buffer *buffer)
694{ 805{
@@ -699,10 +810,26 @@ static void iio_buffer_demux_free(struct iio_buffer *buffer)
699 } 810 }
700} 811}
701 812
702int iio_update_demux(struct iio_dev *indio_dev) 813
814int iio_push_to_buffers(struct iio_dev *indio_dev, unsigned char *data)
815{
816 int ret;
817 struct iio_buffer *buf;
818
819 list_for_each_entry(buf, &indio_dev->buffer_list, buffer_list) {
820 ret = iio_push_to_buffer(buf, data);
821 if (ret < 0)
822 return ret;
823 }
824
825 return 0;
826}
827EXPORT_SYMBOL_GPL(iio_push_to_buffers);
828
829static int iio_buffer_update_demux(struct iio_dev *indio_dev,
830 struct iio_buffer *buffer)
703{ 831{
704 const struct iio_chan_spec *ch; 832 const struct iio_chan_spec *ch;
705 struct iio_buffer *buffer = indio_dev->buffer;
706 int ret, in_ind = -1, out_ind, length; 833 int ret, in_ind = -1, out_ind, length;
707 unsigned in_loc = 0, out_loc = 0; 834 unsigned in_loc = 0, out_loc = 0;
708 struct iio_demux_table *p; 835 struct iio_demux_table *p;
@@ -787,4 +914,23 @@ error_clear_mux_table:
787 914
788 return ret; 915 return ret;
789} 916}
917
918int iio_update_demux(struct iio_dev *indio_dev)
919{
920 struct iio_buffer *buffer;
921 int ret;
922
923 list_for_each_entry(buffer, &indio_dev->buffer_list, buffer_list) {
924 ret = iio_buffer_update_demux(indio_dev, buffer);
925 if (ret < 0)
926 goto error_clear_mux_table;
927 }
928 return 0;
929
930error_clear_mux_table:
931 list_for_each_entry(buffer, &indio_dev->buffer_list, buffer_list)
932 iio_buffer_demux_free(buffer);
933
934 return ret;
935}
790EXPORT_SYMBOL_GPL(iio_update_demux); 936EXPORT_SYMBOL_GPL(iio_update_demux);
diff --git a/drivers/iio/industrialio-core.c b/drivers/iio/industrialio-core.c
index 6eb24dbc081e..8848f16c547b 100644
--- a/drivers/iio/industrialio-core.c
+++ b/drivers/iio/industrialio-core.c
@@ -65,6 +65,7 @@ static const char * const iio_chan_type_name_spec[] = {
65 [IIO_CAPACITANCE] = "capacitance", 65 [IIO_CAPACITANCE] = "capacitance",
66 [IIO_ALTVOLTAGE] = "altvoltage", 66 [IIO_ALTVOLTAGE] = "altvoltage",
67 [IIO_CCT] = "cct", 67 [IIO_CCT] = "cct",
68 [IIO_PRESSURE] = "pressure",
68}; 69};
69 70
70static const char * const iio_modifier_names[] = { 71static const char * const iio_modifier_names[] = {
@@ -397,11 +398,74 @@ static ssize_t iio_read_channel_info(struct device *dev,
397 val2 = do_div(tmp, 1000000000LL); 398 val2 = do_div(tmp, 1000000000LL);
398 val = tmp; 399 val = tmp;
399 return sprintf(buf, "%d.%09u\n", val, val2); 400 return sprintf(buf, "%d.%09u\n", val, val2);
401 case IIO_VAL_FRACTIONAL_LOG2:
402 tmp = (s64)val * 1000000000LL >> val2;
403 val2 = do_div(tmp, 1000000000LL);
404 val = tmp;
405 return sprintf(buf, "%d.%09u\n", val, val2);
400 default: 406 default:
401 return 0; 407 return 0;
402 } 408 }
403} 409}
404 410
411/**
412 * iio_str_to_fixpoint() - Parse a fixed-point number from a string
413 * @str: The string to parse
414 * @fract_mult: Multiplier for the first decimal place, should be a power of 10
415 * @integer: The integer part of the number
416 * @fract: The fractional part of the number
417 *
418 * Returns 0 on success, or a negative error code if the string could not be
419 * parsed.
420 */
421int iio_str_to_fixpoint(const char *str, int fract_mult,
422 int *integer, int *fract)
423{
424 int i = 0, f = 0;
425 bool integer_part = true, negative = false;
426
427 if (str[0] == '-') {
428 negative = true;
429 str++;
430 } else if (str[0] == '+') {
431 str++;
432 }
433
434 while (*str) {
435 if ('0' <= *str && *str <= '9') {
436 if (integer_part) {
437 i = i * 10 + *str - '0';
438 } else {
439 f += fract_mult * (*str - '0');
440 fract_mult /= 10;
441 }
442 } else if (*str == '\n') {
443 if (*(str + 1) == '\0')
444 break;
445 else
446 return -EINVAL;
447 } else if (*str == '.' && integer_part) {
448 integer_part = false;
449 } else {
450 return -EINVAL;
451 }
452 str++;
453 }
454
455 if (negative) {
456 if (i)
457 i = -i;
458 else
459 f = -f;
460 }
461
462 *integer = i;
463 *fract = f;
464
465 return 0;
466}
467EXPORT_SYMBOL_GPL(iio_str_to_fixpoint);
468
405static ssize_t iio_write_channel_info(struct device *dev, 469static ssize_t iio_write_channel_info(struct device *dev,
406 struct device_attribute *attr, 470 struct device_attribute *attr,
407 const char *buf, 471 const char *buf,
@@ -409,8 +473,8 @@ static ssize_t iio_write_channel_info(struct device *dev,
409{ 473{
410 struct iio_dev *indio_dev = dev_to_iio_dev(dev); 474 struct iio_dev *indio_dev = dev_to_iio_dev(dev);
411 struct iio_dev_attr *this_attr = to_iio_dev_attr(attr); 475 struct iio_dev_attr *this_attr = to_iio_dev_attr(attr);
412 int ret, integer = 0, fract = 0, fract_mult = 100000; 476 int ret, fract_mult = 100000;
413 bool integer_part = true, negative = false; 477 int integer, fract;
414 478
415 /* Assumes decimal - precision based on number of digits */ 479 /* Assumes decimal - precision based on number of digits */
416 if (!indio_dev->info->write_raw) 480 if (!indio_dev->info->write_raw)
@@ -429,39 +493,9 @@ static ssize_t iio_write_channel_info(struct device *dev,
429 return -EINVAL; 493 return -EINVAL;
430 } 494 }
431 495
432 if (buf[0] == '-') { 496 ret = iio_str_to_fixpoint(buf, fract_mult, &integer, &fract);
433 negative = true; 497 if (ret)
434 buf++; 498 return ret;
435 }
436
437 while (*buf) {
438 if ('0' <= *buf && *buf <= '9') {
439 if (integer_part)
440 integer = integer*10 + *buf - '0';
441 else {
442 fract += fract_mult*(*buf - '0');
443 if (fract_mult == 1)
444 break;
445 fract_mult /= 10;
446 }
447 } else if (*buf == '\n') {
448 if (*(buf + 1) == '\0')
449 break;
450 else
451 return -EINVAL;
452 } else if (*buf == '.') {
453 integer_part = false;
454 } else {
455 return -EINVAL;
456 }
457 buf++;
458 }
459 if (negative) {
460 if (integer)
461 integer = -integer;
462 else
463 fract = -fract;
464 }
465 499
466 ret = indio_dev->info->write_raw(indio_dev, this_attr->c, 500 ret = indio_dev->info->write_raw(indio_dev, this_attr->c,
467 integer, fract, this_attr->address); 501 integer, fract, this_attr->address);
@@ -851,6 +885,7 @@ struct iio_dev *iio_device_alloc(int sizeof_priv)
851 return NULL; 885 return NULL;
852 } 886 }
853 dev_set_name(&dev->dev, "iio:device%d", dev->id); 887 dev_set_name(&dev->dev, "iio:device%d", dev->id);
888 INIT_LIST_HEAD(&dev->buffer_list);
854 } 889 }
855 890
856 return dev; 891 return dev;
diff --git a/drivers/iio/industrialio-event.c b/drivers/iio/industrialio-event.c
index fa6543bf6731..261cae00557e 100644
--- a/drivers/iio/industrialio-event.c
+++ b/drivers/iio/industrialio-event.c
@@ -239,13 +239,13 @@ static ssize_t iio_ev_value_store(struct device *dev,
239{ 239{
240 struct iio_dev *indio_dev = dev_to_iio_dev(dev); 240 struct iio_dev *indio_dev = dev_to_iio_dev(dev);
241 struct iio_dev_attr *this_attr = to_iio_dev_attr(attr); 241 struct iio_dev_attr *this_attr = to_iio_dev_attr(attr);
242 unsigned long val; 242 int val;
243 int ret; 243 int ret;
244 244
245 if (!indio_dev->info->write_event_value) 245 if (!indio_dev->info->write_event_value)
246 return -EINVAL; 246 return -EINVAL;
247 247
248 ret = strict_strtoul(buf, 10, &val); 248 ret = kstrtoint(buf, 10, &val);
249 if (ret) 249 if (ret)
250 return ret; 250 return ret;
251 251
@@ -350,15 +350,10 @@ static inline int __iio_add_event_config_attrs(struct iio_dev *indio_dev)
350 ret = iio_device_add_event_sysfs(indio_dev, 350 ret = iio_device_add_event_sysfs(indio_dev,
351 &indio_dev->channels[j]); 351 &indio_dev->channels[j]);
352 if (ret < 0) 352 if (ret < 0)
353 goto error_clear_attrs; 353 return ret;
354 attrcount += ret; 354 attrcount += ret;
355 } 355 }
356 return attrcount; 356 return attrcount;
357
358error_clear_attrs:
359 __iio_remove_event_config_attrs(indio_dev);
360
361 return ret;
362} 357}
363 358
364static bool iio_check_for_dynamic_events(struct iio_dev *indio_dev) 359static bool iio_check_for_dynamic_events(struct iio_dev *indio_dev)
diff --git a/drivers/iio/inkern.c b/drivers/iio/inkern.c
index f2b78d4fe457..d55e98fb300e 100644
--- a/drivers/iio/inkern.c
+++ b/drivers/iio/inkern.c
@@ -78,7 +78,7 @@ int iio_map_array_unregister(struct iio_dev *indio_dev,
78 found_it = true; 78 found_it = true;
79 break; 79 break;
80 } 80 }
81 if (found_it == false) { 81 if (!found_it) {
82 ret = -ENODEV; 82 ret = -ENODEV;
83 goto error_ret; 83 goto error_ret;
84 } 84 }
@@ -203,6 +203,7 @@ struct iio_channel *iio_channel_get_all(const char *name)
203 if (name && strcmp(name, c->map->consumer_dev_name) != 0) 203 if (name && strcmp(name, c->map->consumer_dev_name) != 0)
204 continue; 204 continue;
205 chans[mapind].indio_dev = c->indio_dev; 205 chans[mapind].indio_dev = c->indio_dev;
206 chans[mapind].data = c->map->consumer_data;
206 chans[mapind].channel = 207 chans[mapind].channel =
207 iio_chan_spec_from_name(chans[mapind].indio_dev, 208 iio_chan_spec_from_name(chans[mapind].indio_dev,
208 c->map->adc_channel_label); 209 c->map->adc_channel_label);
@@ -314,6 +315,9 @@ static int iio_convert_raw_to_processed_unlocked(struct iio_channel *chan,
314 *processed = div_s64(raw64 * (s64)scale_val * scale, 315 *processed = div_s64(raw64 * (s64)scale_val * scale,
315 scale_val2); 316 scale_val2);
316 break; 317 break;
318 case IIO_VAL_FRACTIONAL_LOG2:
319 *processed = (raw64 * (s64)scale_val * scale) >> scale_val2;
320 break;
317 default: 321 default:
318 return -EINVAL; 322 return -EINVAL;
319 } 323 }
diff --git a/drivers/iio/light/adjd_s311.c b/drivers/iio/light/adjd_s311.c
index 164b62b91a4b..36d210a06b28 100644
--- a/drivers/iio/light/adjd_s311.c
+++ b/drivers/iio/light/adjd_s311.c
@@ -164,7 +164,6 @@ static irqreturn_t adjd_s311_trigger_handler(int irq, void *p)
164 struct iio_poll_func *pf = p; 164 struct iio_poll_func *pf = p;
165 struct iio_dev *indio_dev = pf->indio_dev; 165 struct iio_dev *indio_dev = pf->indio_dev;
166 struct adjd_s311_data *data = iio_priv(indio_dev); 166 struct adjd_s311_data *data = iio_priv(indio_dev);
167 struct iio_buffer *buffer = indio_dev->buffer;
168 s64 time_ns = iio_get_time_ns(); 167 s64 time_ns = iio_get_time_ns();
169 int len = 0; 168 int len = 0;
170 int i, j = 0; 169 int i, j = 0;
@@ -187,7 +186,7 @@ static irqreturn_t adjd_s311_trigger_handler(int irq, void *p)
187 if (indio_dev->scan_timestamp) 186 if (indio_dev->scan_timestamp)
188 *(s64 *)((u8 *)data->buffer + ALIGN(len, sizeof(s64))) 187 *(s64 *)((u8 *)data->buffer + ALIGN(len, sizeof(s64)))
189 = time_ns; 188 = time_ns;
190 iio_push_to_buffer(buffer, (u8 *)data->buffer); 189 iio_push_to_buffers(indio_dev, (u8 *)data->buffer);
191 190
192done: 191done:
193 iio_trigger_notify_done(indio_dev->trig); 192 iio_trigger_notify_done(indio_dev->trig);
diff --git a/drivers/iio/light/hid-sensor-als.c b/drivers/iio/light/hid-sensor-als.c
index 96e3691e42c4..23eeeef64e84 100644
--- a/drivers/iio/light/hid-sensor-als.c
+++ b/drivers/iio/light/hid-sensor-als.c
@@ -176,21 +176,8 @@ static const struct iio_info als_info = {
176/* Function to push data to buffer */ 176/* Function to push data to buffer */
177static void hid_sensor_push_data(struct iio_dev *indio_dev, u8 *data, int len) 177static void hid_sensor_push_data(struct iio_dev *indio_dev, u8 *data, int len)
178{ 178{
179 struct iio_buffer *buffer = indio_dev->buffer;
180 int datum_sz;
181
182 dev_dbg(&indio_dev->dev, "hid_sensor_push_data\n"); 179 dev_dbg(&indio_dev->dev, "hid_sensor_push_data\n");
183 if (!buffer) { 180 iio_push_to_buffers(indio_dev, (u8 *)data);
184 dev_err(&indio_dev->dev, "Buffer == NULL\n");
185 return;
186 }
187 datum_sz = buffer->access->get_bytes_per_datum(buffer);
188 if (len > datum_sz) {
189 dev_err(&indio_dev->dev, "Datum size mismatch %d:%d\n", len,
190 datum_sz);
191 return;
192 }
193 iio_push_to_buffer(buffer, (u8 *)data);
194} 181}
195 182
196/* Callback handler to send event after all samples are received and captured */ 183/* Callback handler to send event after all samples are received and captured */
@@ -285,10 +272,9 @@ static int __devinit hid_als_probe(struct platform_device *pdev)
285 goto error_free_dev; 272 goto error_free_dev;
286 } 273 }
287 274
288 channels = kmemdup(als_channels, 275 channels = kmemdup(als_channels, sizeof(als_channels), GFP_KERNEL);
289 sizeof(als_channels),
290 GFP_KERNEL);
291 if (!channels) { 276 if (!channels) {
277 ret = -ENOMEM;
292 dev_err(&pdev->dev, "failed to duplicate channels\n"); 278 dev_err(&pdev->dev, "failed to duplicate channels\n");
293 goto error_free_dev; 279 goto error_free_dev;
294 } 280 }
diff --git a/drivers/iio/magnetometer/hid-sensor-magn-3d.c b/drivers/iio/magnetometer/hid-sensor-magn-3d.c
index c4f0d274f577..8e75eb76ccd9 100644
--- a/drivers/iio/magnetometer/hid-sensor-magn-3d.c
+++ b/drivers/iio/magnetometer/hid-sensor-magn-3d.c
@@ -198,21 +198,8 @@ static const struct iio_info magn_3d_info = {
198/* Function to push data to buffer */ 198/* Function to push data to buffer */
199static void hid_sensor_push_data(struct iio_dev *indio_dev, u8 *data, int len) 199static void hid_sensor_push_data(struct iio_dev *indio_dev, u8 *data, int len)
200{ 200{
201 struct iio_buffer *buffer = indio_dev->buffer;
202 int datum_sz;
203
204 dev_dbg(&indio_dev->dev, "hid_sensor_push_data\n"); 201 dev_dbg(&indio_dev->dev, "hid_sensor_push_data\n");
205 if (!buffer) { 202 iio_push_to_buffers(indio_dev, (u8 *)data);
206 dev_err(&indio_dev->dev, "Buffer == NULL\n");
207 return;
208 }
209 datum_sz = buffer->access->get_bytes_per_datum(buffer);
210 if (len > datum_sz) {
211 dev_err(&indio_dev->dev, "Datum size mismatch %d:%d\n", len,
212 datum_sz);
213 return;
214 }
215 iio_push_to_buffer(buffer, (u8 *)data);
216} 203}
217 204
218/* Callback handler to send event after all samples are received and captured */ 205/* Callback handler to send event after all samples are received and captured */
@@ -320,10 +307,10 @@ static int __devinit hid_magn_3d_probe(struct platform_device *pdev)
320 goto error_free_dev; 307 goto error_free_dev;
321 } 308 }
322 309
323 channels = kmemdup(magn_3d_channels, 310 channels = kmemdup(magn_3d_channels, sizeof(magn_3d_channels),
324 sizeof(magn_3d_channels), 311 GFP_KERNEL);
325 GFP_KERNEL);
326 if (!channels) { 312 if (!channels) {
313 ret = -ENOMEM;
327 dev_err(&pdev->dev, "failed to duplicate channels\n"); 314 dev_err(&pdev->dev, "failed to duplicate channels\n");
328 goto error_free_dev; 315 goto error_free_dev;
329 } 316 }
diff --git a/drivers/ipack/Kconfig b/drivers/ipack/Kconfig
new file mode 100644
index 000000000000..3949e5589560
--- /dev/null
+++ b/drivers/ipack/Kconfig
@@ -0,0 +1,24 @@
1#
2# IPACK configuration.
3#
4
5menuconfig IPACK_BUS
6 tristate "IndustryPack bus support"
7 depends on HAS_IOMEM
8 ---help---
9 This option provides support for the IndustryPack framework. There
10 are IndustryPack carrier boards, which interface another bus (such as
11 PCI) to an IndustryPack bus, and IndustryPack modules, that are
12 hosted on these buses. While IndustryPack modules can provide a
13 large variety of functionality, they are most often found in
14 industrial control applications.
15
16 Say N if unsure.
17
18if IPACK_BUS
19
20source "drivers/ipack/carriers/Kconfig"
21
22source "drivers/ipack/devices/Kconfig"
23
24endif # IPACK
diff --git a/drivers/staging/ipack/Makefile b/drivers/ipack/Makefile
index 85ff223616fd..6f14ade0f8f3 100644
--- a/drivers/staging/ipack/Makefile
+++ b/drivers/ipack/Makefile
@@ -3,4 +3,4 @@
3# 3#
4obj-$(CONFIG_IPACK_BUS) += ipack.o 4obj-$(CONFIG_IPACK_BUS) += ipack.o
5obj-y += devices/ 5obj-y += devices/
6obj-y += bridges/ 6obj-y += carriers/
diff --git a/drivers/ipack/carriers/Kconfig b/drivers/ipack/carriers/Kconfig
new file mode 100644
index 000000000000..922ff5c35acc
--- /dev/null
+++ b/drivers/ipack/carriers/Kconfig
@@ -0,0 +1,7 @@
1config BOARD_TPCI200
2 tristate "Support for the TEWS TPCI-200 IndustryPack carrier board"
3 depends on IPACK_BUS
4 depends on PCI
5 help
6 This driver adds support for the TEWS TPCI200 IndustryPack carrier board.
7 default n
diff --git a/drivers/staging/ipack/bridges/Makefile b/drivers/ipack/carriers/Makefile
index d8b76459300f..d8b76459300f 100644
--- a/drivers/staging/ipack/bridges/Makefile
+++ b/drivers/ipack/carriers/Makefile
diff --git a/drivers/staging/ipack/bridges/tpci200.c b/drivers/ipack/carriers/tpci200.c
index 46d6657280b8..0246b1fddffe 100644
--- a/drivers/staging/ipack/bridges/tpci200.c
+++ b/drivers/ipack/carriers/tpci200.c
@@ -2,9 +2,10 @@
2 * tpci200.c 2 * tpci200.c
3 * 3 *
4 * driver for the TEWS TPCI-200 device 4 * driver for the TEWS TPCI-200 device
5 * Copyright (c) 2009 Nicolas Serafini, EIC2 SA 5 *
6 * Copyright (c) 2010,2011 Samuel Iglesias Gonsalvez <siglesia@cern.ch>, CERN 6 * Copyright (C) 2009-2012 CERN (www.cern.ch)
7 * Copyright (c) 2012 Samuel Iglesias Gonsalvez <siglesias@igalia.com>, Igalia 7 * Author: Nicolas Serafini, EIC2 SA
8 * Author: Samuel Iglesias Gonsalvez <siglesias@igalia.com>
8 * 9 *
9 * This program is free software; you can redistribute it and/or modify it 10 * This program is free software; you can redistribute it and/or modify it
10 * under the terms of the GNU General Public License as published by the Free 11 * under the terms of the GNU General Public License as published by the Free
@@ -15,20 +16,36 @@
15#include <linux/slab.h> 16#include <linux/slab.h>
16#include "tpci200.h" 17#include "tpci200.h"
17 18
18static u16 tpci200_status_timeout[] = { 19static const u16 tpci200_status_timeout[] = {
19 TPCI200_A_TIMEOUT, 20 TPCI200_A_TIMEOUT,
20 TPCI200_B_TIMEOUT, 21 TPCI200_B_TIMEOUT,
21 TPCI200_C_TIMEOUT, 22 TPCI200_C_TIMEOUT,
22 TPCI200_D_TIMEOUT, 23 TPCI200_D_TIMEOUT,
23}; 24};
24 25
25static u16 tpci200_status_error[] = { 26static const u16 tpci200_status_error[] = {
26 TPCI200_A_ERROR, 27 TPCI200_A_ERROR,
27 TPCI200_B_ERROR, 28 TPCI200_B_ERROR,
28 TPCI200_C_ERROR, 29 TPCI200_C_ERROR,
29 TPCI200_D_ERROR, 30 TPCI200_D_ERROR,
30}; 31};
31 32
33static const size_t tpci200_space_size[IPACK_SPACE_COUNT] = {
34 [IPACK_IO_SPACE] = TPCI200_IO_SPACE_SIZE,
35 [IPACK_ID_SPACE] = TPCI200_ID_SPACE_SIZE,
36 [IPACK_INT_SPACE] = TPCI200_INT_SPACE_SIZE,
37 [IPACK_MEM8_SPACE] = TPCI200_MEM8_SPACE_SIZE,
38 [IPACK_MEM16_SPACE] = TPCI200_MEM16_SPACE_SIZE,
39};
40
41static const size_t tpci200_space_interval[IPACK_SPACE_COUNT] = {
42 [IPACK_IO_SPACE] = TPCI200_IO_SPACE_INTERVAL,
43 [IPACK_ID_SPACE] = TPCI200_ID_SPACE_INTERVAL,
44 [IPACK_INT_SPACE] = TPCI200_INT_SPACE_INTERVAL,
45 [IPACK_MEM8_SPACE] = TPCI200_MEM8_SPACE_INTERVAL,
46 [IPACK_MEM16_SPACE] = TPCI200_MEM16_SPACE_INTERVAL,
47};
48
32static struct tpci200_board *check_slot(struct ipack_device *dev) 49static struct tpci200_board *check_slot(struct ipack_device *dev)
33{ 50{
34 struct tpci200_board *tpci200; 51 struct tpci200_board *tpci200;
@@ -47,7 +64,7 @@ static struct tpci200_board *check_slot(struct ipack_device *dev)
47 if (dev->slot >= TPCI200_NB_SLOT) { 64 if (dev->slot >= TPCI200_NB_SLOT) {
48 dev_info(&dev->dev, 65 dev_info(&dev->dev,
49 "Slot [%d:%d] doesn't exist! Last tpci200 slot is %d.\n", 66 "Slot [%d:%d] doesn't exist! Last tpci200 slot is %d.\n",
50 dev->bus_nr, dev->slot, TPCI200_NB_SLOT-1); 67 dev->bus->bus_nr, dev->slot, TPCI200_NB_SLOT-1);
51 return NULL; 68 return NULL;
52 } 69 }
53 70
@@ -74,33 +91,19 @@ static void tpci200_set_mask(struct tpci200_board *tpci200,
74 91
75static void tpci200_unregister(struct tpci200_board *tpci200) 92static void tpci200_unregister(struct tpci200_board *tpci200)
76{ 93{
77 int i;
78
79 free_irq(tpci200->info->pdev->irq, (void *) tpci200); 94 free_irq(tpci200->info->pdev->irq, (void *) tpci200);
80 95
81 pci_iounmap(tpci200->info->pdev, tpci200->info->interface_regs); 96 pci_iounmap(tpci200->info->pdev, tpci200->info->interface_regs);
82 pci_iounmap(tpci200->info->pdev, tpci200->info->ioidint_space);
83 pci_iounmap(tpci200->info->pdev, tpci200->info->mem8_space);
84 pci_iounmap(tpci200->info->pdev, tpci200->info->cfg_regs); 97 pci_iounmap(tpci200->info->pdev, tpci200->info->cfg_regs);
85 98
86 pci_release_region(tpci200->info->pdev, TPCI200_IP_INTERFACE_BAR); 99 pci_release_region(tpci200->info->pdev, TPCI200_IP_INTERFACE_BAR);
87 pci_release_region(tpci200->info->pdev, TPCI200_IO_ID_INT_SPACES_BAR); 100 pci_release_region(tpci200->info->pdev, TPCI200_IO_ID_INT_SPACES_BAR);
101 pci_release_region(tpci200->info->pdev, TPCI200_MEM16_SPACE_BAR);
88 pci_release_region(tpci200->info->pdev, TPCI200_MEM8_SPACE_BAR); 102 pci_release_region(tpci200->info->pdev, TPCI200_MEM8_SPACE_BAR);
89 pci_release_region(tpci200->info->pdev, TPCI200_CFG_MEM_BAR); 103 pci_release_region(tpci200->info->pdev, TPCI200_CFG_MEM_BAR);
90 104
91 pci_disable_device(tpci200->info->pdev); 105 pci_disable_device(tpci200->info->pdev);
92 pci_dev_put(tpci200->info->pdev); 106 pci_dev_put(tpci200->info->pdev);
93
94 for (i = 0; i < TPCI200_NB_SLOT; i++) {
95 tpci200->slots[i].io_phys.address = NULL;
96 tpci200->slots[i].io_phys.size = 0;
97 tpci200->slots[i].id_phys.address = NULL;
98 tpci200->slots[i].id_phys.size = 0;
99 tpci200->slots[i].int_phys.address = NULL;
100 tpci200->slots[i].int_phys.size = 0;
101 tpci200->slots[i].mem_phys.address = NULL;
102 tpci200->slots[i].mem_phys.size = 0;
103 }
104} 107}
105 108
106static void tpci200_enable_irq(struct tpci200_board *tpci200, 109static void tpci200_enable_irq(struct tpci200_board *tpci200,
@@ -207,7 +210,8 @@ static int tpci200_request_irq(struct ipack_device *dev,
207 210
208 if (tpci200->slots[dev->slot].irq != NULL) { 211 if (tpci200->slots[dev->slot].irq != NULL) {
209 dev_err(&dev->dev, 212 dev_err(&dev->dev,
210 "Slot [%d:%d] IRQ already registered !\n", dev->bus_nr, 213 "Slot [%d:%d] IRQ already registered !\n",
214 dev->bus->bus_nr,
211 dev->slot); 215 dev->slot);
212 res = -EINVAL; 216 res = -EINVAL;
213 goto out_unlock; 217 goto out_unlock;
@@ -217,7 +221,7 @@ static int tpci200_request_irq(struct ipack_device *dev,
217 if (slot_irq == NULL) { 221 if (slot_irq == NULL) {
218 dev_err(&dev->dev, 222 dev_err(&dev->dev,
219 "Slot [%d:%d] unable to allocate memory for IRQ !\n", 223 "Slot [%d:%d] unable to allocate memory for IRQ !\n",
220 dev->bus_nr, dev->slot); 224 dev->bus->bus_nr, dev->slot);
221 res = -ENOMEM; 225 res = -ENOMEM;
222 goto out_unlock; 226 goto out_unlock;
223 } 227 }
@@ -244,8 +248,7 @@ static int tpci200_register(struct tpci200_board *tpci200)
244{ 248{
245 int i; 249 int i;
246 int res; 250 int res;
247 unsigned long ioidint_base; 251 phys_addr_t ioidint_base;
248 unsigned long mem_base;
249 unsigned short slot_ctrl; 252 unsigned short slot_ctrl;
250 253
251 if (pci_enable_device(tpci200->info->pdev) < 0) 254 if (pci_enable_device(tpci200->info->pdev) < 0)
@@ -274,38 +277,49 @@ static int tpci200_register(struct tpci200_board *tpci200)
274 goto out_release_ip_space; 277 goto out_release_ip_space;
275 } 278 }
276 279
277 /* Request MEM space (Bar 4) */ 280 /* Request MEM8 space (Bar 5) */
278 res = pci_request_region(tpci200->info->pdev, TPCI200_MEM8_SPACE_BAR, 281 res = pci_request_region(tpci200->info->pdev, TPCI200_MEM8_SPACE_BAR,
279 "Carrier MEM space"); 282 "Carrier MEM8 space");
280 if (res) { 283 if (res) {
281 dev_err(&tpci200->info->pdev->dev, 284 dev_err(&tpci200->info->pdev->dev,
282 "(bn 0x%X, sn 0x%X) failed to allocate PCI resource for BAR 4!", 285 "(bn 0x%X, sn 0x%X) failed to allocate PCI resource for BAR 5!",
283 tpci200->info->pdev->bus->number, 286 tpci200->info->pdev->bus->number,
284 tpci200->info->pdev->devfn); 287 tpci200->info->pdev->devfn);
285 goto out_release_ioid_int_space; 288 goto out_release_ioid_int_space;
286 } 289 }
287 290
291 /* Request MEM16 space (Bar 4) */
292 res = pci_request_region(tpci200->info->pdev, TPCI200_MEM16_SPACE_BAR,
293 "Carrier MEM16 space");
294 if (res) {
295 dev_err(&tpci200->info->pdev->dev,
296 "(bn 0x%X, sn 0x%X) failed to allocate PCI resource for BAR 4!",
297 tpci200->info->pdev->bus->number,
298 tpci200->info->pdev->devfn);
299 goto out_release_mem8_space;
300 }
301
288 /* Map internal tpci200 driver user space */ 302 /* Map internal tpci200 driver user space */
289 tpci200->info->interface_regs = 303 tpci200->info->interface_regs =
290 ioremap_nocache(pci_resource_start(tpci200->info->pdev, 304 ioremap_nocache(pci_resource_start(tpci200->info->pdev,
291 TPCI200_IP_INTERFACE_BAR), 305 TPCI200_IP_INTERFACE_BAR),
292 TPCI200_IFACE_SIZE); 306 TPCI200_IFACE_SIZE);
293 tpci200->info->ioidint_space =
294 ioremap_nocache(pci_resource_start(tpci200->info->pdev,
295 TPCI200_IO_ID_INT_SPACES_BAR),
296 TPCI200_IOIDINT_SIZE);
297 tpci200->info->mem8_space =
298 ioremap_nocache(pci_resource_start(tpci200->info->pdev,
299 TPCI200_MEM8_SPACE_BAR),
300 TPCI200_MEM8_SIZE);
301 307
302 /* Initialize lock that protects interface_regs */ 308 /* Initialize lock that protects interface_regs */
303 spin_lock_init(&tpci200->regs_lock); 309 spin_lock_init(&tpci200->regs_lock);
304 310
305 ioidint_base = pci_resource_start(tpci200->info->pdev, 311 ioidint_base = pci_resource_start(tpci200->info->pdev,
306 TPCI200_IO_ID_INT_SPACES_BAR); 312 TPCI200_IO_ID_INT_SPACES_BAR);
307 mem_base = pci_resource_start(tpci200->info->pdev, 313 tpci200->mod_mem[IPACK_IO_SPACE] = ioidint_base + TPCI200_IO_SPACE_OFF;
308 TPCI200_MEM8_SPACE_BAR); 314 tpci200->mod_mem[IPACK_ID_SPACE] = ioidint_base + TPCI200_ID_SPACE_OFF;
315 tpci200->mod_mem[IPACK_INT_SPACE] =
316 ioidint_base + TPCI200_INT_SPACE_OFF;
317 tpci200->mod_mem[IPACK_MEM8_SPACE] =
318 pci_resource_start(tpci200->info->pdev,
319 TPCI200_MEM8_SPACE_BAR);
320 tpci200->mod_mem[IPACK_MEM16_SPACE] =
321 pci_resource_start(tpci200->info->pdev,
322 TPCI200_MEM16_SPACE_BAR);
309 323
310 /* Set the default parameters of the slot 324 /* Set the default parameters of the slot
311 * INT0 disabled, level sensitive 325 * INT0 disabled, level sensitive
@@ -316,30 +330,8 @@ static int tpci200_register(struct tpci200_board *tpci200)
316 * clock rate 8 MHz 330 * clock rate 8 MHz
317 */ 331 */
318 slot_ctrl = 0; 332 slot_ctrl = 0;
319 333 for (i = 0; i < TPCI200_NB_SLOT; i++)
320 /* Set all slot physical address space */
321 for (i = 0; i < TPCI200_NB_SLOT; i++) {
322 tpci200->slots[i].io_phys.address =
323 (void __iomem *)ioidint_base +
324 TPCI200_IO_SPACE_OFF + TPCI200_IO_SPACE_GAP*i;
325 tpci200->slots[i].io_phys.size = TPCI200_IO_SPACE_SIZE;
326
327 tpci200->slots[i].id_phys.address =
328 (void __iomem *)ioidint_base +
329 TPCI200_ID_SPACE_OFF + TPCI200_ID_SPACE_GAP*i;
330 tpci200->slots[i].id_phys.size = TPCI200_ID_SPACE_SIZE;
331
332 tpci200->slots[i].int_phys.address =
333 (void __iomem *)ioidint_base +
334 TPCI200_INT_SPACE_OFF + TPCI200_INT_SPACE_GAP * i;
335 tpci200->slots[i].int_phys.size = TPCI200_INT_SPACE_SIZE;
336
337 tpci200->slots[i].mem_phys.address =
338 (void __iomem *)mem_base + TPCI200_MEM8_GAP*i;
339 tpci200->slots[i].mem_phys.size = TPCI200_MEM8_SIZE;
340
341 writew(slot_ctrl, &tpci200->info->interface_regs->control[i]); 334 writew(slot_ctrl, &tpci200->info->interface_regs->control[i]);
342 }
343 335
344 res = request_irq(tpci200->info->pdev->irq, 336 res = request_irq(tpci200->info->pdev->irq,
345 tpci200_interrupt, IRQF_SHARED, 337 tpci200_interrupt, IRQF_SHARED,
@@ -354,6 +346,8 @@ static int tpci200_register(struct tpci200_board *tpci200)
354 346
355 return 0; 347 return 0;
356 348
349out_release_mem8_space:
350 pci_release_region(tpci200->info->pdev, TPCI200_MEM8_SPACE_BAR);
357out_release_ioid_int_space: 351out_release_ioid_int_space:
358 pci_release_region(tpci200->info->pdev, TPCI200_IO_ID_INT_SPACES_BAR); 352 pci_release_region(tpci200->info->pdev, TPCI200_IO_ID_INT_SPACES_BAR);
359out_release_ip_space: 353out_release_ip_space:
@@ -363,166 +357,6 @@ out_disable_pci:
363 return res; 357 return res;
364} 358}
365 359
366static int tpci200_slot_unmap_space(struct ipack_device *dev, int space)
367{
368 struct ipack_addr_space *virt_addr_space;
369 struct tpci200_board *tpci200;
370
371 tpci200 = check_slot(dev);
372 if (tpci200 == NULL)
373 return -EINVAL;
374
375 if (mutex_lock_interruptible(&tpci200->mutex))
376 return -ERESTARTSYS;
377
378 switch (space) {
379 case IPACK_IO_SPACE:
380 if (dev->io_space.address == NULL) {
381 dev_info(&dev->dev,
382 "Slot [%d:%d] IO space not mapped !\n",
383 dev->bus_nr, dev->slot);
384 goto out_unlock;
385 }
386 virt_addr_space = &dev->io_space;
387 break;
388 case IPACK_ID_SPACE:
389 if (dev->id_space.address == NULL) {
390 dev_info(&dev->dev,
391 "Slot [%d:%d] ID space not mapped !\n",
392 dev->bus_nr, dev->slot);
393 goto out_unlock;
394 }
395 virt_addr_space = &dev->id_space;
396 break;
397 case IPACK_INT_SPACE:
398 if (dev->int_space.address == NULL) {
399 dev_info(&dev->dev,
400 "Slot [%d:%d] INT space not mapped !\n",
401 dev->bus_nr, dev->slot);
402 goto out_unlock;
403 }
404 virt_addr_space = &dev->int_space;
405 break;
406 case IPACK_MEM_SPACE:
407 if (dev->mem_space.address == NULL) {
408 dev_info(&dev->dev,
409 "Slot [%d:%d] MEM space not mapped !\n",
410 dev->bus_nr, dev->slot);
411 goto out_unlock;
412 }
413 virt_addr_space = &dev->mem_space;
414 break;
415 default:
416 dev_err(&dev->dev,
417 "Slot [%d:%d] space number %d doesn't exist !\n",
418 dev->bus_nr, dev->slot, space);
419 mutex_unlock(&tpci200->mutex);
420 return -EINVAL;
421 }
422
423 iounmap(virt_addr_space->address);
424
425 virt_addr_space->address = NULL;
426 virt_addr_space->size = 0;
427out_unlock:
428 mutex_unlock(&tpci200->mutex);
429 return 0;
430}
431
432static int tpci200_slot_map_space(struct ipack_device *dev,
433 unsigned int memory_size, int space)
434{
435 int res = 0;
436 unsigned int size_to_map;
437 void __iomem *phys_address;
438 struct ipack_addr_space *virt_addr_space;
439 struct tpci200_board *tpci200;
440
441 tpci200 = check_slot(dev);
442 if (tpci200 == NULL)
443 return -EINVAL;
444
445 if (mutex_lock_interruptible(&tpci200->mutex))
446 return -ERESTARTSYS;
447
448 switch (space) {
449 case IPACK_IO_SPACE:
450 if (dev->io_space.address != NULL) {
451 dev_err(&dev->dev,
452 "Slot [%d:%d] IO space already mapped !\n",
453 tpci200->number, dev->slot);
454 res = -EINVAL;
455 goto out_unlock;
456 }
457 virt_addr_space = &dev->io_space;
458
459 phys_address = tpci200->slots[dev->slot].io_phys.address;
460 size_to_map = tpci200->slots[dev->slot].io_phys.size;
461 break;
462 case IPACK_ID_SPACE:
463 if (dev->id_space.address != NULL) {
464 dev_err(&dev->dev,
465 "Slot [%d:%d] ID space already mapped !\n",
466 tpci200->number, dev->slot);
467 res = -EINVAL;
468 goto out_unlock;
469 }
470 virt_addr_space = &dev->id_space;
471
472 phys_address = tpci200->slots[dev->slot].id_phys.address;
473 size_to_map = tpci200->slots[dev->slot].id_phys.size;
474 break;
475 case IPACK_INT_SPACE:
476 if (dev->int_space.address != NULL) {
477 dev_err(&dev->dev,
478 "Slot [%d:%d] INT space already mapped !\n",
479 tpci200->number, dev->slot);
480 res = -EINVAL;
481 goto out_unlock;
482 }
483 virt_addr_space = &dev->int_space;
484
485 phys_address = tpci200->slots[dev->slot].int_phys.address;
486 size_to_map = tpci200->slots[dev->slot].int_phys.size;
487 break;
488 case IPACK_MEM_SPACE:
489 if (dev->mem_space.address != NULL) {
490 dev_err(&dev->dev,
491 "Slot [%d:%d] MEM space already mapped !\n",
492 tpci200->number, dev->slot);
493 res = -EINVAL;
494 goto out_unlock;
495 }
496 virt_addr_space = &dev->mem_space;
497
498 if (memory_size > tpci200->slots[dev->slot].mem_phys.size) {
499 dev_err(&dev->dev,
500 "Slot [%d:%d] request is 0x%X memory, only 0x%X available !\n",
501 dev->bus_nr, dev->slot, memory_size,
502 tpci200->slots[dev->slot].mem_phys.size);
503 res = -EINVAL;
504 goto out_unlock;
505 }
506
507 phys_address = tpci200->slots[dev->slot].mem_phys.address;
508 size_to_map = memory_size;
509 break;
510 default:
511 dev_err(&dev->dev, "Slot [%d:%d] space %d doesn't exist !\n",
512 tpci200->number, dev->slot, space);
513 res = -EINVAL;
514 goto out_unlock;
515 }
516
517 virt_addr_space->size = size_to_map;
518 virt_addr_space->address =
519 ioremap_nocache((unsigned long)phys_address, size_to_map);
520
521out_unlock:
522 mutex_unlock(&tpci200->mutex);
523 return res;
524}
525
526static int tpci200_get_clockrate(struct ipack_device *dev) 360static int tpci200_get_clockrate(struct ipack_device *dev)
527{ 361{
528 struct tpci200_board *tpci200 = check_slot(dev); 362 struct tpci200_board *tpci200 = check_slot(dev);
@@ -610,8 +444,6 @@ static void tpci200_uninstall(struct tpci200_board *tpci200)
610} 444}
611 445
612static const struct ipack_bus_ops tpci200_bus_ops = { 446static const struct ipack_bus_ops tpci200_bus_ops = {
613 .map_space = tpci200_slot_map_space,
614 .unmap_space = tpci200_slot_unmap_space,
615 .request_irq = tpci200_request_irq, 447 .request_irq = tpci200_request_irq,
616 .free_irq = tpci200_free_irq, 448 .free_irq = tpci200_free_irq,
617 .get_clockrate = tpci200_get_clockrate, 449 .get_clockrate = tpci200_get_clockrate,
@@ -641,6 +473,31 @@ static int tpci200_install(struct tpci200_board *tpci200)
641 return 0; 473 return 0;
642} 474}
643 475
476static void tpci200_release_device(struct ipack_device *dev)
477{
478 kfree(dev);
479}
480
481static int tpci200_create_device(struct tpci200_board *tpci200, int i)
482{
483 enum ipack_space space;
484 struct ipack_device *dev =
485 kzalloc(sizeof(struct ipack_device), GFP_KERNEL);
486 if (!dev)
487 return -ENOMEM;
488 dev->slot = i;
489 dev->bus = tpci200->info->ipack_bus;
490 dev->release = tpci200_release_device;
491
492 for (space = 0; space < IPACK_SPACE_COUNT; space++) {
493 dev->region[space].start =
494 tpci200->mod_mem[space]
495 + tpci200_space_interval[space] * i;
496 dev->region[space].size = tpci200_space_size[space];
497 }
498 return ipack_device_register(dev);
499}
500
644static int tpci200_pci_probe(struct pci_dev *pdev, 501static int tpci200_pci_probe(struct pci_dev *pdev,
645 const struct pci_device_id *id) 502 const struct pci_device_id *id)
646{ 503{
@@ -716,7 +573,7 @@ static int tpci200_pci_probe(struct pci_dev *pdev,
716 dev_set_drvdata(&pdev->dev, tpci200); 573 dev_set_drvdata(&pdev->dev, tpci200);
717 574
718 for (i = 0; i < TPCI200_NB_SLOT; i++) 575 for (i = 0; i < TPCI200_NB_SLOT; i++)
719 ipack_device_register(tpci200->info->ipack_bus, i); 576 tpci200_create_device(tpci200, i);
720 return 0; 577 return 0;
721 578
722out_err_bus_register: 579out_err_bus_register:
@@ -742,7 +599,7 @@ static void __tpci200_pci_remove(struct tpci200_board *tpci200)
742 kfree(tpci200); 599 kfree(tpci200);
743} 600}
744 601
745static void __devexit tpci200_pci_remove(struct pci_dev *dev) 602static void tpci200_pci_remove(struct pci_dev *dev)
746{ 603{
747 struct tpci200_board *tpci200 = pci_get_drvdata(dev); 604 struct tpci200_board *tpci200 = pci_get_drvdata(dev);
748 605
@@ -761,20 +618,10 @@ static struct pci_driver tpci200_pci_drv = {
761 .name = "tpci200", 618 .name = "tpci200",
762 .id_table = tpci200_idtable, 619 .id_table = tpci200_idtable,
763 .probe = tpci200_pci_probe, 620 .probe = tpci200_pci_probe,
764 .remove = __devexit_p(tpci200_pci_remove), 621 .remove = tpci200_pci_remove,
765}; 622};
766 623
767static int __init tpci200_drvr_init_module(void) 624module_pci_driver(tpci200_pci_drv);
768{
769 return pci_register_driver(&tpci200_pci_drv);
770}
771
772static void __exit tpci200_drvr_exit_module(void)
773{
774 pci_unregister_driver(&tpci200_pci_drv);
775}
776 625
777MODULE_DESCRIPTION("TEWS TPCI-200 device driver"); 626MODULE_DESCRIPTION("TEWS TPCI-200 device driver");
778MODULE_LICENSE("GPL"); 627MODULE_LICENSE("GPL");
779module_init(tpci200_drvr_init_module);
780module_exit(tpci200_drvr_exit_module);
diff --git a/drivers/staging/ipack/bridges/tpci200.h b/drivers/ipack/carriers/tpci200.h
index 235d1fe4f48c..a7a151dab83c 100644
--- a/drivers/staging/ipack/bridges/tpci200.h
+++ b/drivers/ipack/carriers/tpci200.h
@@ -2,9 +2,10 @@
2 * tpci200.h 2 * tpci200.h
3 * 3 *
4 * driver for the carrier TEWS TPCI-200 4 * driver for the carrier TEWS TPCI-200
5 * Copyright (c) 2009 Nicolas Serafini, EIC2 SA 5 *
6 * Copyright (c) 2010,2011 Samuel Iglesias Gonsalvez <siglesia@cern.ch>, CERN 6 * Copyright (C) 2009-2012 CERN (www.cern.ch)
7 * Copyright (c) 2012 Samuel Iglesias Gonsalvez <siglesias@igalia.com>, Igalia 7 * Author: Nicolas Serafini, EIC2 SA
8 * Author: Samuel Iglesias Gonsalvez <siglesias@igalia.com>
8 * 9 *
9 * This program is free software; you can redistribute it and/or modify it 10 * This program is free software; you can redistribute it and/or modify it
10 * under the terms of the GNU General Public License as published by the Free 11 * under the terms of the GNU General Public License as published by the Free
@@ -19,8 +20,7 @@
19#include <linux/spinlock.h> 20#include <linux/spinlock.h>
20#include <linux/swab.h> 21#include <linux/swab.h>
21#include <linux/io.h> 22#include <linux/io.h>
22 23#include <linux/ipack.h>
23#include "../ipack.h"
24 24
25#define TPCI200_NB_SLOT 0x4 25#define TPCI200_NB_SLOT 0x4
26#define TPCI200_NB_BAR 0x6 26#define TPCI200_NB_BAR 0x6
@@ -49,20 +49,20 @@ struct tpci200_regs {
49#define TPCI200_IFACE_SIZE 0x100 49#define TPCI200_IFACE_SIZE 0x100
50 50
51#define TPCI200_IO_SPACE_OFF 0x0000 51#define TPCI200_IO_SPACE_OFF 0x0000
52#define TPCI200_IO_SPACE_GAP 0x0100 52#define TPCI200_IO_SPACE_INTERVAL 0x0100
53#define TPCI200_IO_SPACE_SIZE 0x0080 53#define TPCI200_IO_SPACE_SIZE 0x0080
54#define TPCI200_ID_SPACE_OFF 0x0080 54#define TPCI200_ID_SPACE_OFF 0x0080
55#define TPCI200_ID_SPACE_GAP 0x0100 55#define TPCI200_ID_SPACE_INTERVAL 0x0100
56#define TPCI200_ID_SPACE_SIZE 0x0040 56#define TPCI200_ID_SPACE_SIZE 0x0040
57#define TPCI200_INT_SPACE_OFF 0x00C0 57#define TPCI200_INT_SPACE_OFF 0x00C0
58#define TPCI200_INT_SPACE_GAP 0x0100 58#define TPCI200_INT_SPACE_INTERVAL 0x0100
59#define TPCI200_INT_SPACE_SIZE 0x0040 59#define TPCI200_INT_SPACE_SIZE 0x0040
60#define TPCI200_IOIDINT_SIZE 0x0400 60#define TPCI200_IOIDINT_SIZE 0x0400
61 61
62#define TPCI200_MEM8_GAP 0x00400000 62#define TPCI200_MEM8_SPACE_INTERVAL 0x00400000
63#define TPCI200_MEM8_SIZE 0x00400000 63#define TPCI200_MEM8_SPACE_SIZE 0x00400000
64#define TPCI200_MEM16_GAP 0x00800000 64#define TPCI200_MEM16_SPACE_INTERVAL 0x00800000
65#define TPCI200_MEM16_SIZE 0x00800000 65#define TPCI200_MEM16_SPACE_SIZE 0x00800000
66 66
67/* control field in tpci200_regs */ 67/* control field in tpci200_regs */
68#define TPCI200_INT0_EN 0x0040 68#define TPCI200_INT0_EN 0x0040
@@ -137,11 +137,7 @@ struct slot_irq {
137 * 137 *
138 */ 138 */
139struct tpci200_slot { 139struct tpci200_slot {
140 struct slot_irq *irq; 140 struct slot_irq *irq;
141 struct ipack_addr_space io_phys;
142 struct ipack_addr_space id_phys;
143 struct ipack_addr_space int_phys;
144 struct ipack_addr_space mem_phys;
145}; 141};
146 142
147/** 143/**
@@ -156,8 +152,6 @@ struct tpci200_infos {
156 struct pci_dev *pdev; 152 struct pci_dev *pdev;
157 struct pci_device_id *id_table; 153 struct pci_device_id *id_table;
158 struct tpci200_regs __iomem *interface_regs; 154 struct tpci200_regs __iomem *interface_regs;
159 void __iomem *ioidint_space;
160 void __iomem *mem8_space;
161 void __iomem *cfg_regs; 155 void __iomem *cfg_regs;
162 struct ipack_bus_device *ipack_bus; 156 struct ipack_bus_device *ipack_bus;
163}; 157};
@@ -167,6 +161,7 @@ struct tpci200_board {
167 spinlock_t regs_lock; 161 spinlock_t regs_lock;
168 struct tpci200_slot *slots; 162 struct tpci200_slot *slots;
169 struct tpci200_infos *info; 163 struct tpci200_infos *info;
164 phys_addr_t mod_mem[IPACK_SPACE_COUNT];
170}; 165};
171 166
172#endif /* _TPCI200_H_ */ 167#endif /* _TPCI200_H_ */
diff --git a/drivers/staging/ipack/devices/Kconfig b/drivers/ipack/devices/Kconfig
index 39f71888a584..0b82fdc198c0 100644
--- a/drivers/staging/ipack/devices/Kconfig
+++ b/drivers/ipack/devices/Kconfig
@@ -4,4 +4,3 @@ config SERIAL_IPOCTAL
4 help 4 help
5 This driver supports the IPOCTAL serial port device for the IndustryPack bus. 5 This driver supports the IPOCTAL serial port device for the IndustryPack bus.
6 default n 6 default n
7
diff --git a/drivers/staging/ipack/devices/Makefile b/drivers/ipack/devices/Makefile
index 6de18bda4a9a..6de18bda4a9a 100644
--- a/drivers/staging/ipack/devices/Makefile
+++ b/drivers/ipack/devices/Makefile
diff --git a/drivers/staging/ipack/devices/ipoctal.c b/drivers/ipack/devices/ipoctal.c
index d751edfda839..c06ab396e84f 100644
--- a/drivers/staging/ipack/devices/ipoctal.c
+++ b/drivers/ipack/devices/ipoctal.c
@@ -2,9 +2,10 @@
2 * ipoctal.c 2 * ipoctal.c
3 * 3 *
4 * driver for the GE IP-OCTAL boards 4 * driver for the GE IP-OCTAL boards
5 * Copyright (c) 2009 Nicolas Serafini, EIC2 SA 5 *
6 * Copyright (c) 2010,2011 Samuel Iglesias Gonsalvez <siglesia@cern.ch>, CERN 6 * Copyright (C) 2009-2012 CERN (www.cern.ch)
7 * Copyright (c) 2012 Samuel Iglesias Gonsalvez <siglesias@igalia.com>, Igalia 7 * Author: Nicolas Serafini, EIC2 SA
8 * Author: Samuel Iglesias Gonsalvez <siglesias@igalia.com>
8 * 9 *
9 * This program is free software; you can redistribute it and/or modify it 10 * This program is free software; you can redistribute it and/or modify it
10 * under the terms of the GNU General Public License as published by the Free 11 * under the terms of the GNU General Public License as published by the Free
@@ -21,7 +22,7 @@
21#include <linux/slab.h> 22#include <linux/slab.h>
22#include <linux/atomic.h> 23#include <linux/atomic.h>
23#include <linux/io.h> 24#include <linux/io.h>
24#include "../ipack.h" 25#include <linux/ipack.h>
25#include "ipoctal.h" 26#include "ipoctal.h"
26#include "scc2698.h" 27#include "scc2698.h"
27 28
@@ -53,6 +54,8 @@ struct ipoctal {
53 struct ipoctal_channel channel[NR_CHANNELS]; 54 struct ipoctal_channel channel[NR_CHANNELS];
54 unsigned char write; 55 unsigned char write;
55 struct tty_driver *tty_drv; 56 struct tty_driver *tty_drv;
57 u8 __iomem *mem8_space;
58 u8 __iomem *int_space;
56}; 59};
57 60
58static int ipoctal_port_activate(struct tty_port *port, struct tty_struct *tty) 61static int ipoctal_port_activate(struct tty_port *port, struct tty_struct *tty)
@@ -252,35 +255,12 @@ static irqreturn_t ipoctal_irq_handler(void *arg)
252 ipoctal_irq_channel(&ipoctal->channel[i]); 255 ipoctal_irq_channel(&ipoctal->channel[i]);
253 256
254 /* Clear the IPack device interrupt */ 257 /* Clear the IPack device interrupt */
255 readw(ipoctal->dev->int_space.address + ACK_INT_REQ0); 258 readw(ipoctal->int_space + ACK_INT_REQ0);
256 readw(ipoctal->dev->int_space.address + ACK_INT_REQ1); 259 readw(ipoctal->int_space + ACK_INT_REQ1);
257 260
258 return IRQ_HANDLED; 261 return IRQ_HANDLED;
259} 262}
260 263
261static int ipoctal_check_model(struct ipack_device *dev, unsigned char *id)
262{
263 unsigned char manufacturerID;
264 unsigned char board_id;
265
266
267 manufacturerID = ioread8(dev->id_space.address + IPACK_IDPROM_OFFSET_MANUFACTURER_ID);
268 if (manufacturerID != IPACK1_VENDOR_ID_SBS)
269 return -ENODEV;
270 board_id = ioread8(dev->id_space.address + IPACK_IDPROM_OFFSET_MODEL);
271 switch (board_id) {
272 case IPACK1_DEVICE_ID_SBS_OCTAL_232:
273 case IPACK1_DEVICE_ID_SBS_OCTAL_422:
274 case IPACK1_DEVICE_ID_SBS_OCTAL_485:
275 *id = board_id;
276 break;
277 default:
278 return -ENODEV;
279 }
280
281 return 0;
282}
283
284static const struct tty_port_operations ipoctal_tty_port_ops = { 264static const struct tty_port_operations ipoctal_tty_port_ops = {
285 .dtr_rts = NULL, 265 .dtr_rts = NULL,
286 .activate = ipoctal_port_activate, 266 .activate = ipoctal_port_activate,
@@ -289,64 +269,55 @@ static const struct tty_port_operations ipoctal_tty_port_ops = {
289static int ipoctal_inst_slot(struct ipoctal *ipoctal, unsigned int bus_nr, 269static int ipoctal_inst_slot(struct ipoctal *ipoctal, unsigned int bus_nr,
290 unsigned int slot) 270 unsigned int slot)
291{ 271{
292 int res = 0; 272 int res;
293 int i; 273 int i;
294 struct tty_driver *tty; 274 struct tty_driver *tty;
295 char name[20]; 275 char name[20];
296 unsigned char board_id;
297 struct ipoctal_channel *channel; 276 struct ipoctal_channel *channel;
277 struct ipack_region *region;
278 void __iomem *addr;
298 union scc2698_channel __iomem *chan_regs; 279 union scc2698_channel __iomem *chan_regs;
299 union scc2698_block __iomem *block_regs; 280 union scc2698_block __iomem *block_regs;
300 281
301 res = ipoctal->dev->bus->ops->map_space(ipoctal->dev, 0, 282 ipoctal->board_id = ipoctal->dev->id_device;
302 IPACK_ID_SPACE);
303 if (res) {
304 dev_err(&ipoctal->dev->dev,
305 "Unable to map slot [%d:%d] ID space!\n",
306 bus_nr, slot);
307 return res;
308 }
309
310 res = ipoctal_check_model(ipoctal->dev, &board_id);
311 if (res) {
312 ipoctal->dev->bus->ops->unmap_space(ipoctal->dev,
313 IPACK_ID_SPACE);
314 goto out_unregister_id_space;
315 }
316 ipoctal->board_id = board_id;
317 283
318 res = ipoctal->dev->bus->ops->map_space(ipoctal->dev, 0, 284 region = &ipoctal->dev->region[IPACK_IO_SPACE];
319 IPACK_IO_SPACE); 285 addr = devm_ioremap_nocache(&ipoctal->dev->dev,
320 if (res) { 286 region->start, region->size);
287 if (!addr) {
321 dev_err(&ipoctal->dev->dev, 288 dev_err(&ipoctal->dev->dev,
322 "Unable to map slot [%d:%d] IO space!\n", 289 "Unable to map slot [%d:%d] IO space!\n",
323 bus_nr, slot); 290 bus_nr, slot);
324 goto out_unregister_id_space; 291 return -EADDRNOTAVAIL;
325 } 292 }
293 /* Save the virtual address to access the registers easily */
294 chan_regs =
295 (union scc2698_channel __iomem *) addr;
296 block_regs =
297 (union scc2698_block __iomem *) addr;
326 298
327 res = ipoctal->dev->bus->ops->map_space(ipoctal->dev, 0, 299 region = &ipoctal->dev->region[IPACK_INT_SPACE];
328 IPACK_INT_SPACE); 300 ipoctal->int_space =
329 if (res) { 301 devm_ioremap_nocache(&ipoctal->dev->dev,
302 region->start, region->size);
303 if (!ipoctal->int_space) {
330 dev_err(&ipoctal->dev->dev, 304 dev_err(&ipoctal->dev->dev,
331 "Unable to map slot [%d:%d] INT space!\n", 305 "Unable to map slot [%d:%d] INT space!\n",
332 bus_nr, slot); 306 bus_nr, slot);
333 goto out_unregister_io_space; 307 return -EADDRNOTAVAIL;
334 } 308 }
335 309
336 res = ipoctal->dev->bus->ops->map_space(ipoctal->dev, 310 region = &ipoctal->dev->region[IPACK_MEM8_SPACE];
337 0x8000, IPACK_MEM_SPACE); 311 ipoctal->mem8_space =
338 if (res) { 312 devm_ioremap_nocache(&ipoctal->dev->dev,
313 region->start, 0x8000);
314 if (!addr) {
339 dev_err(&ipoctal->dev->dev, 315 dev_err(&ipoctal->dev->dev,
340 "Unable to map slot [%d:%d] MEM space!\n", 316 "Unable to map slot [%d:%d] MEM8 space!\n",
341 bus_nr, slot); 317 bus_nr, slot);
342 goto out_unregister_int_space; 318 return -EADDRNOTAVAIL;
343 } 319 }
344 320
345 /* Save the virtual address to access the registers easily */
346 chan_regs =
347 (union scc2698_channel __iomem *) ipoctal->dev->io_space.address;
348 block_regs =
349 (union scc2698_block __iomem *) ipoctal->dev->io_space.address;
350 321
351 /* Disable RX and TX before touching anything */ 322 /* Disable RX and TX before touching anything */
352 for (i = 0; i < NR_CHANNELS ; i++) { 323 for (i = 0; i < NR_CHANNELS ; i++) {
@@ -389,17 +360,15 @@ static int ipoctal_inst_slot(struct ipoctal *ipoctal, unsigned int bus_nr,
389 ipoctal->dev->bus->ops->request_irq(ipoctal->dev, 360 ipoctal->dev->bus->ops->request_irq(ipoctal->dev,
390 ipoctal_irq_handler, ipoctal); 361 ipoctal_irq_handler, ipoctal);
391 /* Dummy write */ 362 /* Dummy write */
392 iowrite8(1, ipoctal->dev->mem_space.address + 1); 363 iowrite8(1, ipoctal->mem8_space + 1);
393 364
394 /* Register the TTY device */ 365 /* Register the TTY device */
395 366
396 /* Each IP-OCTAL channel is a TTY port */ 367 /* Each IP-OCTAL channel is a TTY port */
397 tty = alloc_tty_driver(NR_CHANNELS); 368 tty = alloc_tty_driver(NR_CHANNELS);
398 369
399 if (!tty) { 370 if (!tty)
400 res = -ENOMEM; 371 return -ENOMEM;
401 goto out_unregister_slot_unmap;
402 }
403 372
404 /* Fill struct tty_driver with ipoctal data */ 373 /* Fill struct tty_driver with ipoctal data */
405 tty->owner = THIS_MODULE; 374 tty->owner = THIS_MODULE;
@@ -422,7 +391,7 @@ static int ipoctal_inst_slot(struct ipoctal *ipoctal, unsigned int bus_nr,
422 if (res) { 391 if (res) {
423 dev_err(&ipoctal->dev->dev, "Can't register tty driver.\n"); 392 dev_err(&ipoctal->dev->dev, "Can't register tty driver.\n");
424 put_tty_driver(tty); 393 put_tty_driver(tty);
425 goto out_unregister_slot_unmap; 394 return res;
426 } 395 }
427 396
428 /* Save struct tty_driver for use it when uninstalling the device */ 397 /* Save struct tty_driver for use it when uninstalling the device */
@@ -458,16 +427,6 @@ static int ipoctal_inst_slot(struct ipoctal *ipoctal, unsigned int bus_nr,
458 } 427 }
459 428
460 return 0; 429 return 0;
461
462out_unregister_slot_unmap:
463 ipoctal->dev->bus->ops->unmap_space(ipoctal->dev, IPACK_ID_SPACE);
464out_unregister_int_space:
465 ipoctal->dev->bus->ops->unmap_space(ipoctal->dev, IPACK_INT_SPACE);
466out_unregister_io_space:
467 ipoctal->dev->bus->ops->unmap_space(ipoctal->dev, IPACK_IO_SPACE);
468out_unregister_id_space:
469 ipoctal->dev->bus->ops->unmap_space(ipoctal->dev, IPACK_MEM_SPACE);
470 return res;
471} 430}
472 431
473static inline int ipoctal_copy_write_buffer(struct ipoctal_channel *channel, 432static inline int ipoctal_copy_write_buffer(struct ipoctal_channel *channel,
@@ -719,7 +678,7 @@ static int ipoctal_probe(struct ipack_device *dev)
719 return -ENOMEM; 678 return -ENOMEM;
720 679
721 ipoctal->dev = dev; 680 ipoctal->dev = dev;
722 res = ipoctal_inst_slot(ipoctal, dev->bus_nr, dev->slot); 681 res = ipoctal_inst_slot(ipoctal, dev->bus->bus_nr, dev->slot);
723 if (res) 682 if (res)
724 goto out_uninst; 683 goto out_uninst;
725 684
@@ -745,10 +704,6 @@ static void __ipoctal_remove(struct ipoctal *ipoctal)
745 704
746 tty_unregister_driver(ipoctal->tty_drv); 705 tty_unregister_driver(ipoctal->tty_drv);
747 put_tty_driver(ipoctal->tty_drv); 706 put_tty_driver(ipoctal->tty_drv);
748 ipoctal->dev->bus->ops->unmap_space(ipoctal->dev, IPACK_MEM_SPACE);
749 ipoctal->dev->bus->ops->unmap_space(ipoctal->dev, IPACK_INT_SPACE);
750 ipoctal->dev->bus->ops->unmap_space(ipoctal->dev, IPACK_IO_SPACE);
751 ipoctal->dev->bus->ops->unmap_space(ipoctal->dev, IPACK_ID_SPACE);
752 kfree(ipoctal); 707 kfree(ipoctal);
753} 708}
754 709
diff --git a/drivers/staging/ipack/devices/ipoctal.h b/drivers/ipack/devices/ipoctal.h
index c5b4ed46516f..28f1c4233154 100644
--- a/drivers/staging/ipack/devices/ipoctal.h
+++ b/drivers/ipack/devices/ipoctal.h
@@ -2,9 +2,10 @@
2 * ipoctal.h 2 * ipoctal.h
3 * 3 *
4 * driver for the IPOCTAL boards 4 * driver for the IPOCTAL boards
5 * Copyright (c) 2009 Nicolas Serafini, EIC2 SA 5
6 * Copyright (c) 2010,2011 Samuel Iglesias Gonsalvez <siglesia@cern.ch>, CERN 6 * Copyright (C) 2009-2012 CERN (www.cern.ch)
7 * Copyright (c) 2012 Samuel Iglesias Gonsalvez <siglesias@igalia.com>, Igalia 7 * Author: Nicolas Serafini, EIC2 SA
8 * Author: Samuel Iglesias Gonsalvez <siglesias@igalia.com>
8 * 9 *
9 * This program is free software; you can redistribute it and/or modify it 10 * This program is free software; you can redistribute it and/or modify it
10 * under the terms of the GNU General Public License as published by the Free 11 * under the terms of the GNU General Public License as published by the Free
diff --git a/drivers/staging/ipack/devices/scc2698.h b/drivers/ipack/devices/scc2698.h
index 96e8d8c30e14..2ad6acd513fa 100644
--- a/drivers/staging/ipack/devices/scc2698.h
+++ b/drivers/ipack/devices/scc2698.h
@@ -2,9 +2,10 @@
2 * scc2698.h 2 * scc2698.h
3 * 3 *
4 * driver for the IPOCTAL boards 4 * driver for the IPOCTAL boards
5 * Copyright (c) 2009 Nicolas Serafini, EIC2 SA 5 *
6 * Copyright (c) 2010,2011 Samuel Iglesias Gonsalvez <siglesia@cern.ch>, CERN 6 * Copyright (C) 2009-2012 CERN (www.cern.ch)
7 * Copyright (c) 2012 Samuel Iglesias Gonsalvez <siglesias@igalia.com>, Igalia 7 * Author: Nicolas Serafini, EIC2 SA
8 * Author: Samuel Iglesias Gonsalvez <siglesias@igalia.com>
8 * 9 *
9 * This program is free software; you can redistribute it and/or modify it 10 * This program is free software; you can redistribute it and/or modify it
10 * under the terms of the GNU General Public License as published by the Free 11 * under the terms of the GNU General Public License as published by the Free
diff --git a/drivers/staging/ipack/ipack.c b/drivers/ipack/ipack.c
index d1e0651592a2..7ec6b208b1cb 100644
--- a/drivers/staging/ipack/ipack.c
+++ b/drivers/ipack/ipack.c
@@ -1,8 +1,8 @@
1/* 1/*
2 * Industry-pack bus support functions. 2 * Industry-pack bus support functions.
3 * 3 *
4 * (C) 2011 Samuel Iglesias Gonsalvez <siglesia@cern.ch>, CERN 4 * Copyright (C) 2011-2012 CERN (www.cern.ch)
5 * (C) 2012 Samuel Iglesias Gonsalvez <siglesias@igalia.com>, Igalia 5 * Author: Samuel Iglesias Gonsalvez <siglesias@igalia.com>
6 * 6 *
7 * This program is free software; you can redistribute it and/or modify it 7 * This program is free software; you can redistribute it and/or modify it
8 * under the terms of the GNU General Public License as published by the Free 8 * under the terms of the GNU General Public License as published by the Free
@@ -12,8 +12,8 @@
12#include <linux/module.h> 12#include <linux/module.h>
13#include <linux/slab.h> 13#include <linux/slab.h>
14#include <linux/idr.h> 14#include <linux/idr.h>
15#include <asm/io.h> 15#include <linux/io.h>
16#include "ipack.h" 16#include <linux/ipack.h>
17 17
18#define to_ipack_dev(device) container_of(device, struct ipack_device, dev) 18#define to_ipack_dev(device) container_of(device, struct ipack_device, dev)
19#define to_ipack_driver(drv) container_of(drv, struct ipack_driver, driver) 19#define to_ipack_driver(drv) container_of(drv, struct ipack_driver, driver)
@@ -24,7 +24,7 @@ static void ipack_device_release(struct device *dev)
24{ 24{
25 struct ipack_device *device = to_ipack_dev(dev); 25 struct ipack_device *device = to_ipack_dev(dev);
26 kfree(device->id); 26 kfree(device->id);
27 kfree(device); 27 device->release(device);
28} 28}
29 29
30static inline const struct ipack_device_id * 30static inline const struct ipack_device_id *
@@ -85,8 +85,6 @@ static int ipack_bus_remove(struct device *device)
85 return 0; 85 return 0;
86} 86}
87 87
88#ifdef CONFIG_HOTPLUG
89
90static int ipack_uevent(struct device *dev, struct kobj_uevent_env *env) 88static int ipack_uevent(struct device *dev, struct kobj_uevent_env *env)
91{ 89{
92 struct ipack_device *idev; 90 struct ipack_device *idev;
@@ -104,12 +102,6 @@ static int ipack_uevent(struct device *dev, struct kobj_uevent_env *env)
104 return 0; 102 return 0;
105} 103}
106 104
107#else /* !CONFIG_HOTPLUG */
108
109#define ipack_uevent NULL
110
111#endif /* !CONFIG_HOTPLUG */
112
113#define ipack_device_attr(field, format_string) \ 105#define ipack_device_attr(field, format_string) \
114static ssize_t \ 106static ssize_t \
115field##_show(struct device *dev, struct device_attribute *attr, \ 107field##_show(struct device *dev, struct device_attribute *attr, \
@@ -234,7 +226,7 @@ static int ipack_unregister_bus_member(struct device *dev, void *data)
234 struct ipack_device *idev = to_ipack_dev(dev); 226 struct ipack_device *idev = to_ipack_dev(dev);
235 struct ipack_bus_device *bus = data; 227 struct ipack_bus_device *bus = data;
236 228
237 if (idev->bus_nr == bus->bus_nr) 229 if (idev->bus == bus)
238 ipack_device_unregister(idev); 230 ipack_device_unregister(idev);
239 231
240 return 1; 232 return 1;
@@ -242,7 +234,8 @@ static int ipack_unregister_bus_member(struct device *dev, void *data)
242 234
243int ipack_bus_unregister(struct ipack_bus_device *bus) 235int ipack_bus_unregister(struct ipack_bus_device *bus)
244{ 236{
245 bus_for_each_dev(&ipack_bus_type, NULL, bus, ipack_unregister_bus_member); 237 bus_for_each_dev(&ipack_bus_type, NULL, bus,
238 ipack_unregister_bus_member);
246 ida_simple_remove(&ipack_ida, bus->bus_nr); 239 ida_simple_remove(&ipack_ida, bus->bus_nr);
247 kfree(bus); 240 kfree(bus);
248 return 0; 241 return 0;
@@ -351,12 +344,12 @@ static int ipack_device_read_id(struct ipack_device *dev)
351 int i; 344 int i;
352 int ret = 0; 345 int ret = 0;
353 346
354 ret = dev->bus->ops->map_space(dev, 0, IPACK_ID_SPACE); 347 idmem = ioremap(dev->region[IPACK_ID_SPACE].start,
355 if (ret) { 348 dev->region[IPACK_ID_SPACE].size);
349 if (!idmem) {
356 dev_err(&dev->dev, "error mapping memory\n"); 350 dev_err(&dev->dev, "error mapping memory\n");
357 return ret; 351 return -ENOMEM;
358 } 352 }
359 idmem = dev->id_space.address;
360 353
361 /* Determine ID PROM Data Format. If we find the ids "IPAC" or "IPAH" 354 /* Determine ID PROM Data Format. If we find the ids "IPAC" or "IPAH"
362 * we are dealing with a IndustryPack format 1 device. If we detect 355 * we are dealing with a IndustryPack format 1 device. If we detect
@@ -421,57 +414,44 @@ static int ipack_device_read_id(struct ipack_device *dev)
421 } 414 }
422 415
423out: 416out:
424 dev->bus->ops->unmap_space(dev, IPACK_ID_SPACE); 417 iounmap(idmem);
425 418
426 return ret; 419 return ret;
427} 420}
428 421
429struct ipack_device *ipack_device_register(struct ipack_bus_device *bus, 422int ipack_device_register(struct ipack_device *dev)
430 int slot)
431{ 423{
432 int ret; 424 int ret;
433 struct ipack_device *dev;
434
435 dev = kzalloc(sizeof(struct ipack_device), GFP_KERNEL);
436 if (!dev)
437 return NULL;
438 425
439 dev->dev.bus = &ipack_bus_type; 426 dev->dev.bus = &ipack_bus_type;
440 dev->dev.release = ipack_device_release; 427 dev->dev.release = ipack_device_release;
441 dev->dev.parent = bus->parent; 428 dev->dev.parent = dev->bus->parent;
442 dev->slot = slot;
443 dev->bus_nr = bus->bus_nr;
444 dev->bus = bus;
445 dev_set_name(&dev->dev, 429 dev_set_name(&dev->dev,
446 "ipack-dev.%u.%u", dev->bus_nr, dev->slot); 430 "ipack-dev.%u.%u", dev->bus->bus_nr, dev->slot);
447 431
448 if (bus->ops->set_clockrate(dev, 8)) 432 if (dev->bus->ops->set_clockrate(dev, 8))
449 dev_warn(&dev->dev, "failed to switch to 8 MHz operation for reading of device ID.\n"); 433 dev_warn(&dev->dev, "failed to switch to 8 MHz operation for reading of device ID.\n");
450 if (bus->ops->reset_timeout(dev)) 434 if (dev->bus->ops->reset_timeout(dev))
451 dev_warn(&dev->dev, "failed to reset potential timeout."); 435 dev_warn(&dev->dev, "failed to reset potential timeout.");
452 436
453 ret = ipack_device_read_id(dev); 437 ret = ipack_device_read_id(dev);
454 if (ret < 0) { 438 if (ret < 0) {
455 dev_err(&dev->dev, "error reading device id section.\n"); 439 dev_err(&dev->dev, "error reading device id section.\n");
456 kfree(dev); 440 return ret;
457 return NULL;
458 } 441 }
459 442
460 /* if the device supports 32 MHz operation, use it. */ 443 /* if the device supports 32 MHz operation, use it. */
461 if (dev->speed_32mhz) { 444 if (dev->speed_32mhz) {
462 ret = bus->ops->set_clockrate(dev, 32); 445 ret = dev->bus->ops->set_clockrate(dev, 32);
463 if (ret < 0) 446 if (ret < 0)
464 dev_err(&dev->dev, "failed to switch to 32 MHz operation.\n"); 447 dev_err(&dev->dev, "failed to switch to 32 MHz operation.\n");
465 } 448 }
466 449
467 ret = device_register(&dev->dev); 450 ret = device_register(&dev->dev);
468 if (ret < 0) { 451 if (ret < 0)
469 kfree(dev->id); 452 kfree(dev->id);
470 kfree(dev);
471 return NULL;
472 }
473 453
474 return dev; 454 return ret;
475} 455}
476EXPORT_SYMBOL_GPL(ipack_device_register); 456EXPORT_SYMBOL_GPL(ipack_device_register);
477 457
diff --git a/drivers/staging/Kconfig b/drivers/staging/Kconfig
index d805eef11915..943ca607200c 100644
--- a/drivers/staging/Kconfig
+++ b/drivers/staging/Kconfig
@@ -52,8 +52,6 @@ source "drivers/staging/rtl8192e/Kconfig"
52 52
53source "drivers/staging/rtl8712/Kconfig" 53source "drivers/staging/rtl8712/Kconfig"
54 54
55source "drivers/staging/rts_pstor/Kconfig"
56
57source "drivers/staging/rts5139/Kconfig" 55source "drivers/staging/rts5139/Kconfig"
58 56
59source "drivers/staging/frontier/Kconfig" 57source "drivers/staging/frontier/Kconfig"
@@ -120,14 +118,10 @@ source "drivers/staging/omapdrm/Kconfig"
120 118
121source "drivers/staging/android/Kconfig" 119source "drivers/staging/android/Kconfig"
122 120
123source "drivers/staging/telephony/Kconfig"
124
125source "drivers/staging/ozwpan/Kconfig" 121source "drivers/staging/ozwpan/Kconfig"
126 122
127source "drivers/staging/ccg/Kconfig" 123source "drivers/staging/ccg/Kconfig"
128 124
129source "drivers/staging/ipack/Kconfig"
130
131source "drivers/staging/gdm72xx/Kconfig" 125source "drivers/staging/gdm72xx/Kconfig"
132 126
133source "drivers/staging/csr/Kconfig" 127source "drivers/staging/csr/Kconfig"
@@ -144,4 +138,6 @@ source "drivers/staging/imx-drm/Kconfig"
144 138
145source "drivers/staging/dgrp/Kconfig" 139source "drivers/staging/dgrp/Kconfig"
146 140
141source "drivers/staging/fwserial/Kconfig"
142
147endif # STAGING 143endif # STAGING
diff --git a/drivers/staging/Makefile b/drivers/staging/Makefile
index 76e2ebd596ff..20c764d7ab33 100644
--- a/drivers/staging/Makefile
+++ b/drivers/staging/Makefile
@@ -19,7 +19,6 @@ obj-$(CONFIG_R8187SE) += rtl8187se/
19obj-$(CONFIG_RTL8192U) += rtl8192u/ 19obj-$(CONFIG_RTL8192U) += rtl8192u/
20obj-$(CONFIG_RTL8192E) += rtl8192e/ 20obj-$(CONFIG_RTL8192E) += rtl8192e/
21obj-$(CONFIG_R8712U) += rtl8712/ 21obj-$(CONFIG_R8712U) += rtl8712/
22obj-$(CONFIG_RTS_PSTOR) += rts_pstor/
23obj-$(CONFIG_RTS5139) += rts5139/ 22obj-$(CONFIG_RTS5139) += rts5139/
24obj-$(CONFIG_TRANZPORT) += frontier/ 23obj-$(CONFIG_TRANZPORT) += frontier/
25obj-$(CONFIG_IDE_PHISON) += phison/ 24obj-$(CONFIG_IDE_PHISON) += phison/
@@ -29,7 +28,6 @@ obj-$(CONFIG_OCTEON_ETHERNET) += octeon/
29obj-$(CONFIG_VT6655) += vt6655/ 28obj-$(CONFIG_VT6655) += vt6655/
30obj-$(CONFIG_VT6656) += vt6656/ 29obj-$(CONFIG_VT6656) += vt6656/
31obj-$(CONFIG_VME_BUS) += vme/ 30obj-$(CONFIG_VME_BUS) += vme/
32obj-$(CONFIG_IPACK_BUS) += ipack/
33obj-$(CONFIG_DX_SEP) += sep/ 31obj-$(CONFIG_DX_SEP) += sep/
34obj-$(CONFIG_IIO) += iio/ 32obj-$(CONFIG_IIO) += iio/
35obj-$(CONFIG_ZRAM) += zram/ 33obj-$(CONFIG_ZRAM) += zram/
@@ -53,7 +51,6 @@ obj-$(CONFIG_TOUCHSCREEN_SYNAPTICS_I2C_RMI4) += ste_rmi4/
53obj-$(CONFIG_MFD_NVEC) += nvec/ 51obj-$(CONFIG_MFD_NVEC) += nvec/
54obj-$(CONFIG_DRM_OMAP) += omapdrm/ 52obj-$(CONFIG_DRM_OMAP) += omapdrm/
55obj-$(CONFIG_ANDROID) += android/ 53obj-$(CONFIG_ANDROID) += android/
56obj-$(CONFIG_PHONE) += telephony/
57obj-$(CONFIG_USB_WPAN_HCD) += ozwpan/ 54obj-$(CONFIG_USB_WPAN_HCD) += ozwpan/
58obj-$(CONFIG_USB_G_CCG) += ccg/ 55obj-$(CONFIG_USB_G_CCG) += ccg/
59obj-$(CONFIG_WIMAX_GDM72XX) += gdm72xx/ 56obj-$(CONFIG_WIMAX_GDM72XX) += gdm72xx/
@@ -64,3 +61,4 @@ obj-$(CONFIG_NET_VENDOR_SILICOM) += silicom/
64obj-$(CONFIG_CED1401) += ced1401/ 61obj-$(CONFIG_CED1401) += ced1401/
65obj-$(CONFIG_DRM_IMX) += imx-drm/ 62obj-$(CONFIG_DRM_IMX) += imx-drm/
66obj-$(CONFIG_DGRP) += dgrp/ 63obj-$(CONFIG_DGRP) += dgrp/
64obj-$(CONFIG_FIREWIRE_SERIAL) += fwserial/
diff --git a/drivers/staging/android/Makefile b/drivers/staging/android/Makefile
index e16fcd51716e..b35a631734d6 100644
--- a/drivers/staging/android/Makefile
+++ b/drivers/staging/android/Makefile
@@ -1,3 +1,5 @@
1ccflags-y += -I$(src) # needed for trace events
2
1obj-$(CONFIG_ANDROID_BINDER_IPC) += binder.o 3obj-$(CONFIG_ANDROID_BINDER_IPC) += binder.o
2obj-$(CONFIG_ASHMEM) += ashmem.o 4obj-$(CONFIG_ASHMEM) += ashmem.o
3obj-$(CONFIG_ANDROID_LOGGER) += logger.o 5obj-$(CONFIG_ANDROID_LOGGER) += logger.o
diff --git a/drivers/staging/android/binder.c b/drivers/staging/android/binder.c
index 5d4610babd8a..4a36e9ab8cf7 100644
--- a/drivers/staging/android/binder.c
+++ b/drivers/staging/android/binder.c
@@ -15,6 +15,8 @@
15 * 15 *
16 */ 16 */
17 17
18#define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
19
18#include <asm/cacheflush.h> 20#include <asm/cacheflush.h>
19#include <linux/fdtable.h> 21#include <linux/fdtable.h>
20#include <linux/file.h> 22#include <linux/file.h>
@@ -35,8 +37,9 @@
35#include <linux/slab.h> 37#include <linux/slab.h>
36 38
37#include "binder.h" 39#include "binder.h"
40#include "binder_trace.h"
38 41
39static DEFINE_MUTEX(binder_lock); 42static DEFINE_MUTEX(binder_main_lock);
40static DEFINE_MUTEX(binder_deferred_lock); 43static DEFINE_MUTEX(binder_deferred_lock);
41static DEFINE_MUTEX(binder_mmap_lock); 44static DEFINE_MUTEX(binder_mmap_lock);
42 45
@@ -411,6 +414,19 @@ static long task_close_fd(struct binder_proc *proc, unsigned int fd)
411 return retval; 414 return retval;
412} 415}
413 416
417static inline void binder_lock(const char *tag)
418{
419 trace_binder_lock(tag);
420 mutex_lock(&binder_main_lock);
421 trace_binder_locked(tag);
422}
423
424static inline void binder_unlock(const char *tag)
425{
426 trace_binder_unlock(tag);
427 mutex_unlock(&binder_main_lock);
428}
429
414static void binder_set_nice(long nice) 430static void binder_set_nice(long nice)
415{ 431{
416 long min_nice; 432 long min_nice;
@@ -420,12 +436,12 @@ static void binder_set_nice(long nice)
420 } 436 }
421 min_nice = 20 - current->signal->rlim[RLIMIT_NICE].rlim_cur; 437 min_nice = 20 - current->signal->rlim[RLIMIT_NICE].rlim_cur;
422 binder_debug(BINDER_DEBUG_PRIORITY_CAP, 438 binder_debug(BINDER_DEBUG_PRIORITY_CAP,
423 "binder: %d: nice value %ld not allowed use " 439 "%d: nice value %ld not allowed use %ld instead\n",
424 "%ld instead\n", current->pid, nice, min_nice); 440 current->pid, nice, min_nice);
425 set_user_nice(current, min_nice); 441 set_user_nice(current, min_nice);
426 if (min_nice < 20) 442 if (min_nice < 20)
427 return; 443 return;
428 binder_user_error("binder: %d RLIMIT_NICE not set\n", current->pid); 444 binder_user_error("%d RLIMIT_NICE not set\n", current->pid);
429} 445}
430 446
431static size_t binder_buffer_size(struct binder_proc *proc, 447static size_t binder_buffer_size(struct binder_proc *proc,
@@ -452,8 +468,8 @@ static void binder_insert_free_buffer(struct binder_proc *proc,
452 new_buffer_size = binder_buffer_size(proc, new_buffer); 468 new_buffer_size = binder_buffer_size(proc, new_buffer);
453 469
454 binder_debug(BINDER_DEBUG_BUFFER_ALLOC, 470 binder_debug(BINDER_DEBUG_BUFFER_ALLOC,
455 "binder: %d: add free buffer, size %zd, " 471 "%d: add free buffer, size %zd, at %p\n",
456 "at %p\n", proc->pid, new_buffer_size, new_buffer); 472 proc->pid, new_buffer_size, new_buffer);
457 473
458 while (*p) { 474 while (*p) {
459 parent = *p; 475 parent = *p;
@@ -531,12 +547,14 @@ static int binder_update_page_range(struct binder_proc *proc, int allocate,
531 struct mm_struct *mm; 547 struct mm_struct *mm;
532 548
533 binder_debug(BINDER_DEBUG_BUFFER_ALLOC, 549 binder_debug(BINDER_DEBUG_BUFFER_ALLOC,
534 "binder: %d: %s pages %p-%p\n", proc->pid, 550 "%d: %s pages %p-%p\n", proc->pid,
535 allocate ? "allocate" : "free", start, end); 551 allocate ? "allocate" : "free", start, end);
536 552
537 if (end <= start) 553 if (end <= start)
538 return 0; 554 return 0;
539 555
556 trace_binder_update_page_range(proc, allocate, start, end);
557
540 if (vma) 558 if (vma)
541 mm = NULL; 559 mm = NULL;
542 else 560 else
@@ -546,7 +564,7 @@ static int binder_update_page_range(struct binder_proc *proc, int allocate,
546 down_write(&mm->mmap_sem); 564 down_write(&mm->mmap_sem);
547 vma = proc->vma; 565 vma = proc->vma;
548 if (vma && mm != proc->vma_vm_mm) { 566 if (vma && mm != proc->vma_vm_mm) {
549 pr_err("binder: %d: vma mm and task mm mismatch\n", 567 pr_err("%d: vma mm and task mm mismatch\n",
550 proc->pid); 568 proc->pid);
551 vma = NULL; 569 vma = NULL;
552 } 570 }
@@ -556,8 +574,8 @@ static int binder_update_page_range(struct binder_proc *proc, int allocate,
556 goto free_range; 574 goto free_range;
557 575
558 if (vma == NULL) { 576 if (vma == NULL) {
559 pr_err("binder: %d: binder_alloc_buf failed to " 577 pr_err("%d: binder_alloc_buf failed to map pages in userspace, no vma\n",
560 "map pages in userspace, no vma\n", proc->pid); 578 proc->pid);
561 goto err_no_vma; 579 goto err_no_vma;
562 } 580 }
563 581
@@ -569,8 +587,8 @@ static int binder_update_page_range(struct binder_proc *proc, int allocate,
569 BUG_ON(*page); 587 BUG_ON(*page);
570 *page = alloc_page(GFP_KERNEL | __GFP_HIGHMEM | __GFP_ZERO); 588 *page = alloc_page(GFP_KERNEL | __GFP_HIGHMEM | __GFP_ZERO);
571 if (*page == NULL) { 589 if (*page == NULL) {
572 pr_err("binder: %d: binder_alloc_buf failed " 590 pr_err("%d: binder_alloc_buf failed for page at %p\n",
573 "for page at %p\n", proc->pid, page_addr); 591 proc->pid, page_addr);
574 goto err_alloc_page_failed; 592 goto err_alloc_page_failed;
575 } 593 }
576 tmp_area.addr = page_addr; 594 tmp_area.addr = page_addr;
@@ -578,8 +596,7 @@ static int binder_update_page_range(struct binder_proc *proc, int allocate,
578 page_array_ptr = page; 596 page_array_ptr = page;
579 ret = map_vm_area(&tmp_area, PAGE_KERNEL, &page_array_ptr); 597 ret = map_vm_area(&tmp_area, PAGE_KERNEL, &page_array_ptr);
580 if (ret) { 598 if (ret) {
581 pr_err("binder: %d: binder_alloc_buf failed " 599 pr_err("%d: binder_alloc_buf failed to map page at %p in kernel\n",
582 "to map page at %p in kernel\n",
583 proc->pid, page_addr); 600 proc->pid, page_addr);
584 goto err_map_kernel_failed; 601 goto err_map_kernel_failed;
585 } 602 }
@@ -587,8 +604,7 @@ static int binder_update_page_range(struct binder_proc *proc, int allocate,
587 (uintptr_t)page_addr + proc->user_buffer_offset; 604 (uintptr_t)page_addr + proc->user_buffer_offset;
588 ret = vm_insert_page(vma, user_page_addr, page[0]); 605 ret = vm_insert_page(vma, user_page_addr, page[0]);
589 if (ret) { 606 if (ret) {
590 pr_err("binder: %d: binder_alloc_buf failed " 607 pr_err("%d: binder_alloc_buf failed to map page at %lx in userspace\n",
591 "to map page at %lx in userspace\n",
592 proc->pid, user_page_addr); 608 proc->pid, user_page_addr);
593 goto err_vm_insert_page_failed; 609 goto err_vm_insert_page_failed;
594 } 610 }
@@ -636,7 +652,7 @@ static struct binder_buffer *binder_alloc_buf(struct binder_proc *proc,
636 size_t size; 652 size_t size;
637 653
638 if (proc->vma == NULL) { 654 if (proc->vma == NULL) {
639 pr_err("binder: %d: binder_alloc_buf, no vma\n", 655 pr_err("%d: binder_alloc_buf, no vma\n",
640 proc->pid); 656 proc->pid);
641 return NULL; 657 return NULL;
642 } 658 }
@@ -645,16 +661,16 @@ static struct binder_buffer *binder_alloc_buf(struct binder_proc *proc,
645 ALIGN(offsets_size, sizeof(void *)); 661 ALIGN(offsets_size, sizeof(void *));
646 662
647 if (size < data_size || size < offsets_size) { 663 if (size < data_size || size < offsets_size) {
648 binder_user_error("binder: %d: got transaction with invalid " 664 binder_user_error("%d: got transaction with invalid size %zd-%zd\n",
649 "size %zd-%zd\n", proc->pid, data_size, offsets_size); 665 proc->pid, data_size, offsets_size);
650 return NULL; 666 return NULL;
651 } 667 }
652 668
653 if (is_async && 669 if (is_async &&
654 proc->free_async_space < size + sizeof(struct binder_buffer)) { 670 proc->free_async_space < size + sizeof(struct binder_buffer)) {
655 binder_debug(BINDER_DEBUG_BUFFER_ALLOC, 671 binder_debug(BINDER_DEBUG_BUFFER_ALLOC,
656 "binder: %d: binder_alloc_buf size %zd" 672 "%d: binder_alloc_buf size %zd failed, no async space left\n",
657 "failed, no async space left\n", proc->pid, size); 673 proc->pid, size);
658 return NULL; 674 return NULL;
659 } 675 }
660 676
@@ -674,8 +690,8 @@ static struct binder_buffer *binder_alloc_buf(struct binder_proc *proc,
674 } 690 }
675 } 691 }
676 if (best_fit == NULL) { 692 if (best_fit == NULL) {
677 pr_err("binder: %d: binder_alloc_buf size %zd failed, " 693 pr_err("%d: binder_alloc_buf size %zd failed, no address space\n",
678 "no address space\n", proc->pid, size); 694 proc->pid, size);
679 return NULL; 695 return NULL;
680 } 696 }
681 if (n == NULL) { 697 if (n == NULL) {
@@ -684,8 +700,8 @@ static struct binder_buffer *binder_alloc_buf(struct binder_proc *proc,
684 } 700 }
685 701
686 binder_debug(BINDER_DEBUG_BUFFER_ALLOC, 702 binder_debug(BINDER_DEBUG_BUFFER_ALLOC,
687 "binder: %d: binder_alloc_buf size %zd got buff" 703 "%d: binder_alloc_buf size %zd got buffer %p size %zd\n",
688 "er %p size %zd\n", proc->pid, size, buffer, buffer_size); 704 proc->pid, size, buffer, buffer_size);
689 705
690 has_page_addr = 706 has_page_addr =
691 (void *)(((uintptr_t)buffer->data + buffer_size) & PAGE_MASK); 707 (void *)(((uintptr_t)buffer->data + buffer_size) & PAGE_MASK);
@@ -713,17 +729,16 @@ static struct binder_buffer *binder_alloc_buf(struct binder_proc *proc,
713 binder_insert_free_buffer(proc, new_buffer); 729 binder_insert_free_buffer(proc, new_buffer);
714 } 730 }
715 binder_debug(BINDER_DEBUG_BUFFER_ALLOC, 731 binder_debug(BINDER_DEBUG_BUFFER_ALLOC,
716 "binder: %d: binder_alloc_buf size %zd got " 732 "%d: binder_alloc_buf size %zd got %p\n",
717 "%p\n", proc->pid, size, buffer); 733 proc->pid, size, buffer);
718 buffer->data_size = data_size; 734 buffer->data_size = data_size;
719 buffer->offsets_size = offsets_size; 735 buffer->offsets_size = offsets_size;
720 buffer->async_transaction = is_async; 736 buffer->async_transaction = is_async;
721 if (is_async) { 737 if (is_async) {
722 proc->free_async_space -= size + sizeof(struct binder_buffer); 738 proc->free_async_space -= size + sizeof(struct binder_buffer);
723 binder_debug(BINDER_DEBUG_BUFFER_ALLOC_ASYNC, 739 binder_debug(BINDER_DEBUG_BUFFER_ALLOC_ASYNC,
724 "binder: %d: binder_alloc_buf size %zd " 740 "%d: binder_alloc_buf size %zd async free %zd\n",
725 "async free %zd\n", proc->pid, size, 741 proc->pid, size, proc->free_async_space);
726 proc->free_async_space);
727 } 742 }
728 743
729 return buffer; 744 return buffer;
@@ -754,8 +769,8 @@ static void binder_delete_free_buffer(struct binder_proc *proc,
754 if (buffer_end_page(prev) == buffer_end_page(buffer)) 769 if (buffer_end_page(prev) == buffer_end_page(buffer))
755 free_page_end = 0; 770 free_page_end = 0;
756 binder_debug(BINDER_DEBUG_BUFFER_ALLOC, 771 binder_debug(BINDER_DEBUG_BUFFER_ALLOC,
757 "binder: %d: merge free, buffer %p " 772 "%d: merge free, buffer %p share page with %p\n",
758 "share page with %p\n", proc->pid, buffer, prev); 773 proc->pid, buffer, prev);
759 } 774 }
760 775
761 if (!list_is_last(&buffer->entry, &proc->buffers)) { 776 if (!list_is_last(&buffer->entry, &proc->buffers)) {
@@ -767,16 +782,14 @@ static void binder_delete_free_buffer(struct binder_proc *proc,
767 buffer_start_page(buffer)) 782 buffer_start_page(buffer))
768 free_page_start = 0; 783 free_page_start = 0;
769 binder_debug(BINDER_DEBUG_BUFFER_ALLOC, 784 binder_debug(BINDER_DEBUG_BUFFER_ALLOC,
770 "binder: %d: merge free, buffer" 785 "%d: merge free, buffer %p share page with %p\n",
771 " %p share page with %p\n", proc->pid, 786 proc->pid, buffer, prev);
772 buffer, prev);
773 } 787 }
774 } 788 }
775 list_del(&buffer->entry); 789 list_del(&buffer->entry);
776 if (free_page_start || free_page_end) { 790 if (free_page_start || free_page_end) {
777 binder_debug(BINDER_DEBUG_BUFFER_ALLOC, 791 binder_debug(BINDER_DEBUG_BUFFER_ALLOC,
778 "binder: %d: merge free, buffer %p do " 792 "%d: merge free, buffer %p do not share page%s%s with with %p or %p\n",
779 "not share page%s%s with with %p or %p\n",
780 proc->pid, buffer, free_page_start ? "" : " end", 793 proc->pid, buffer, free_page_start ? "" : " end",
781 free_page_end ? "" : " start", prev, next); 794 free_page_end ? "" : " start", prev, next);
782 binder_update_page_range(proc, 0, free_page_start ? 795 binder_update_page_range(proc, 0, free_page_start ?
@@ -797,8 +810,8 @@ static void binder_free_buf(struct binder_proc *proc,
797 ALIGN(buffer->offsets_size, sizeof(void *)); 810 ALIGN(buffer->offsets_size, sizeof(void *));
798 811
799 binder_debug(BINDER_DEBUG_BUFFER_ALLOC, 812 binder_debug(BINDER_DEBUG_BUFFER_ALLOC,
800 "binder: %d: binder_free_buf %p size %zd buffer" 813 "%d: binder_free_buf %p size %zd buffer_size %zd\n",
801 "_size %zd\n", proc->pid, buffer, size, buffer_size); 814 proc->pid, buffer, size, buffer_size);
802 815
803 BUG_ON(buffer->free); 816 BUG_ON(buffer->free);
804 BUG_ON(size > buffer_size); 817 BUG_ON(size > buffer_size);
@@ -810,9 +823,8 @@ static void binder_free_buf(struct binder_proc *proc,
810 proc->free_async_space += size + sizeof(struct binder_buffer); 823 proc->free_async_space += size + sizeof(struct binder_buffer);
811 824
812 binder_debug(BINDER_DEBUG_BUFFER_ALLOC_ASYNC, 825 binder_debug(BINDER_DEBUG_BUFFER_ALLOC_ASYNC,
813 "binder: %d: binder_free_buf size %zd " 826 "%d: binder_free_buf size %zd async free %zd\n",
814 "async free %zd\n", proc->pid, size, 827 proc->pid, size, proc->free_async_space);
815 proc->free_async_space);
816 } 828 }
817 829
818 binder_update_page_range(proc, 0, 830 binder_update_page_range(proc, 0,
@@ -894,7 +906,7 @@ static struct binder_node *binder_new_node(struct binder_proc *proc,
894 INIT_LIST_HEAD(&node->work.entry); 906 INIT_LIST_HEAD(&node->work.entry);
895 INIT_LIST_HEAD(&node->async_todo); 907 INIT_LIST_HEAD(&node->async_todo);
896 binder_debug(BINDER_DEBUG_INTERNAL_REFS, 908 binder_debug(BINDER_DEBUG_INTERNAL_REFS,
897 "binder: %d:%d node %d u%p c%p created\n", 909 "%d:%d node %d u%p c%p created\n",
898 proc->pid, current->pid, node->debug_id, 910 proc->pid, current->pid, node->debug_id,
899 node->ptr, node->cookie); 911 node->ptr, node->cookie);
900 return node; 912 return node;
@@ -909,8 +921,8 @@ static int binder_inc_node(struct binder_node *node, int strong, int internal,
909 node->internal_strong_refs == 0 && 921 node->internal_strong_refs == 0 &&
910 !(node == binder_context_mgr_node && 922 !(node == binder_context_mgr_node &&
911 node->has_strong_ref)) { 923 node->has_strong_ref)) {
912 pr_err("binder: invalid inc strong " 924 pr_err("invalid inc strong node for %d\n",
913 "node for %d\n", node->debug_id); 925 node->debug_id);
914 return -EINVAL; 926 return -EINVAL;
915 } 927 }
916 node->internal_strong_refs++; 928 node->internal_strong_refs++;
@@ -925,8 +937,8 @@ static int binder_inc_node(struct binder_node *node, int strong, int internal,
925 node->local_weak_refs++; 937 node->local_weak_refs++;
926 if (!node->has_weak_ref && list_empty(&node->work.entry)) { 938 if (!node->has_weak_ref && list_empty(&node->work.entry)) {
927 if (target_list == NULL) { 939 if (target_list == NULL) {
928 pr_err("binder: invalid inc weak node " 940 pr_err("invalid inc weak node for %d\n",
929 "for %d\n", node->debug_id); 941 node->debug_id);
930 return -EINVAL; 942 return -EINVAL;
931 } 943 }
932 list_add_tail(&node->work.entry, target_list); 944 list_add_tail(&node->work.entry, target_list);
@@ -962,12 +974,12 @@ static int binder_dec_node(struct binder_node *node, int strong, int internal)
962 if (node->proc) { 974 if (node->proc) {
963 rb_erase(&node->rb_node, &node->proc->nodes); 975 rb_erase(&node->rb_node, &node->proc->nodes);
964 binder_debug(BINDER_DEBUG_INTERNAL_REFS, 976 binder_debug(BINDER_DEBUG_INTERNAL_REFS,
965 "binder: refless node %d deleted\n", 977 "refless node %d deleted\n",
966 node->debug_id); 978 node->debug_id);
967 } else { 979 } else {
968 hlist_del(&node->dead_node); 980 hlist_del(&node->dead_node);
969 binder_debug(BINDER_DEBUG_INTERNAL_REFS, 981 binder_debug(BINDER_DEBUG_INTERNAL_REFS,
970 "binder: dead node %d deleted\n", 982 "dead node %d deleted\n",
971 node->debug_id); 983 node->debug_id);
972 } 984 }
973 kfree(node); 985 kfree(node);
@@ -1053,14 +1065,13 @@ static struct binder_ref *binder_get_ref_for_node(struct binder_proc *proc,
1053 hlist_add_head(&new_ref->node_entry, &node->refs); 1065 hlist_add_head(&new_ref->node_entry, &node->refs);
1054 1066
1055 binder_debug(BINDER_DEBUG_INTERNAL_REFS, 1067 binder_debug(BINDER_DEBUG_INTERNAL_REFS,
1056 "binder: %d new ref %d desc %d for " 1068 "%d new ref %d desc %d for node %d\n",
1057 "node %d\n", proc->pid, new_ref->debug_id, 1069 proc->pid, new_ref->debug_id, new_ref->desc,
1058 new_ref->desc, node->debug_id); 1070 node->debug_id);
1059 } else { 1071 } else {
1060 binder_debug(BINDER_DEBUG_INTERNAL_REFS, 1072 binder_debug(BINDER_DEBUG_INTERNAL_REFS,
1061 "binder: %d new ref %d desc %d for " 1073 "%d new ref %d desc %d for dead node\n",
1062 "dead node\n", proc->pid, new_ref->debug_id, 1074 proc->pid, new_ref->debug_id, new_ref->desc);
1063 new_ref->desc);
1064 } 1075 }
1065 return new_ref; 1076 return new_ref;
1066} 1077}
@@ -1068,9 +1079,9 @@ static struct binder_ref *binder_get_ref_for_node(struct binder_proc *proc,
1068static void binder_delete_ref(struct binder_ref *ref) 1079static void binder_delete_ref(struct binder_ref *ref)
1069{ 1080{
1070 binder_debug(BINDER_DEBUG_INTERNAL_REFS, 1081 binder_debug(BINDER_DEBUG_INTERNAL_REFS,
1071 "binder: %d delete ref %d desc %d for " 1082 "%d delete ref %d desc %d for node %d\n",
1072 "node %d\n", ref->proc->pid, ref->debug_id, 1083 ref->proc->pid, ref->debug_id, ref->desc,
1073 ref->desc, ref->node->debug_id); 1084 ref->node->debug_id);
1074 1085
1075 rb_erase(&ref->rb_node_desc, &ref->proc->refs_by_desc); 1086 rb_erase(&ref->rb_node_desc, &ref->proc->refs_by_desc);
1076 rb_erase(&ref->rb_node_node, &ref->proc->refs_by_node); 1087 rb_erase(&ref->rb_node_node, &ref->proc->refs_by_node);
@@ -1080,9 +1091,8 @@ static void binder_delete_ref(struct binder_ref *ref)
1080 binder_dec_node(ref->node, 0, 1); 1091 binder_dec_node(ref->node, 0, 1);
1081 if (ref->death) { 1092 if (ref->death) {
1082 binder_debug(BINDER_DEBUG_DEAD_BINDER, 1093 binder_debug(BINDER_DEBUG_DEAD_BINDER,
1083 "binder: %d delete ref %d desc %d " 1094 "%d delete ref %d desc %d has death notification\n",
1084 "has death notification\n", ref->proc->pid, 1095 ref->proc->pid, ref->debug_id, ref->desc);
1085 ref->debug_id, ref->desc);
1086 list_del(&ref->death->work.entry); 1096 list_del(&ref->death->work.entry);
1087 kfree(ref->death); 1097 kfree(ref->death);
1088 binder_stats_deleted(BINDER_STAT_DEATH); 1098 binder_stats_deleted(BINDER_STAT_DEATH);
@@ -1118,8 +1128,7 @@ static int binder_dec_ref(struct binder_ref *ref, int strong)
1118{ 1128{
1119 if (strong) { 1129 if (strong) {
1120 if (ref->strong == 0) { 1130 if (ref->strong == 0) {
1121 binder_user_error("binder: %d invalid dec strong, " 1131 binder_user_error("%d invalid dec strong, ref %d desc %d s %d w %d\n",
1122 "ref %d desc %d s %d w %d\n",
1123 ref->proc->pid, ref->debug_id, 1132 ref->proc->pid, ref->debug_id,
1124 ref->desc, ref->strong, ref->weak); 1133 ref->desc, ref->strong, ref->weak);
1125 return -EINVAL; 1134 return -EINVAL;
@@ -1133,8 +1142,7 @@ static int binder_dec_ref(struct binder_ref *ref, int strong)
1133 } 1142 }
1134 } else { 1143 } else {
1135 if (ref->weak == 0) { 1144 if (ref->weak == 0) {
1136 binder_user_error("binder: %d invalid dec weak, " 1145 binder_user_error("%d invalid dec weak, ref %d desc %d s %d w %d\n",
1137 "ref %d desc %d s %d w %d\n",
1138 ref->proc->pid, ref->debug_id, 1146 ref->proc->pid, ref->debug_id,
1139 ref->desc, ref->strong, ref->weak); 1147 ref->desc, ref->strong, ref->weak);
1140 return -EINVAL; 1148 return -EINVAL;
@@ -1179,8 +1187,7 @@ static void binder_send_failed_reply(struct binder_transaction *t,
1179 } 1187 }
1180 if (target_thread->return_error == BR_OK) { 1188 if (target_thread->return_error == BR_OK) {
1181 binder_debug(BINDER_DEBUG_FAILED_TRANSACTION, 1189 binder_debug(BINDER_DEBUG_FAILED_TRANSACTION,
1182 "binder: send failed reply for " 1190 "send failed reply for transaction %d to %d:%d\n",
1183 "transaction %d to %d:%d\n",
1184 t->debug_id, target_thread->proc->pid, 1191 t->debug_id, target_thread->proc->pid,
1185 target_thread->pid); 1192 target_thread->pid);
1186 1193
@@ -1188,9 +1195,8 @@ static void binder_send_failed_reply(struct binder_transaction *t,
1188 target_thread->return_error = error_code; 1195 target_thread->return_error = error_code;
1189 wake_up_interruptible(&target_thread->wait); 1196 wake_up_interruptible(&target_thread->wait);
1190 } else { 1197 } else {
1191 pr_err("binder: reply failed, target " 1198 pr_err("reply failed, target thread, %d:%d, has error code %d already\n",
1192 "thread, %d:%d, has error code %d " 1199 target_thread->proc->pid,
1193 "already\n", target_thread->proc->pid,
1194 target_thread->pid, 1200 target_thread->pid,
1195 target_thread->return_error); 1201 target_thread->return_error);
1196 } 1202 }
@@ -1199,21 +1205,19 @@ static void binder_send_failed_reply(struct binder_transaction *t,
1199 struct binder_transaction *next = t->from_parent; 1205 struct binder_transaction *next = t->from_parent;
1200 1206
1201 binder_debug(BINDER_DEBUG_FAILED_TRANSACTION, 1207 binder_debug(BINDER_DEBUG_FAILED_TRANSACTION,
1202 "binder: send failed reply " 1208 "send failed reply for transaction %d, target dead\n",
1203 "for transaction %d, target dead\n",
1204 t->debug_id); 1209 t->debug_id);
1205 1210
1206 binder_pop_transaction(target_thread, t); 1211 binder_pop_transaction(target_thread, t);
1207 if (next == NULL) { 1212 if (next == NULL) {
1208 binder_debug(BINDER_DEBUG_DEAD_BINDER, 1213 binder_debug(BINDER_DEBUG_DEAD_BINDER,
1209 "binder: reply failed," 1214 "reply failed, no target thread at root\n");
1210 " no target thread at root\n");
1211 return; 1215 return;
1212 } 1216 }
1213 t = next; 1217 t = next;
1214 binder_debug(BINDER_DEBUG_DEAD_BINDER, 1218 binder_debug(BINDER_DEBUG_DEAD_BINDER,
1215 "binder: reply failed, no target " 1219 "reply failed, no target thread -- retry %d\n",
1216 "thread -- retry %d\n", t->debug_id); 1220 t->debug_id);
1217 } 1221 }
1218 } 1222 }
1219} 1223}
@@ -1226,7 +1230,7 @@ static void binder_transaction_buffer_release(struct binder_proc *proc,
1226 int debug_id = buffer->debug_id; 1230 int debug_id = buffer->debug_id;
1227 1231
1228 binder_debug(BINDER_DEBUG_TRANSACTION, 1232 binder_debug(BINDER_DEBUG_TRANSACTION,
1229 "binder: %d buffer release %d, size %zd-%zd, failed at %p\n", 1233 "%d buffer release %d, size %zd-%zd, failed at %p\n",
1230 proc->pid, buffer->debug_id, 1234 proc->pid, buffer->debug_id,
1231 buffer->data_size, buffer->offsets_size, failed_at); 1235 buffer->data_size, buffer->offsets_size, failed_at);
1232 1236
@@ -1243,9 +1247,8 @@ static void binder_transaction_buffer_release(struct binder_proc *proc,
1243 if (*offp > buffer->data_size - sizeof(*fp) || 1247 if (*offp > buffer->data_size - sizeof(*fp) ||
1244 buffer->data_size < sizeof(*fp) || 1248 buffer->data_size < sizeof(*fp) ||
1245 !IS_ALIGNED(*offp, sizeof(void *))) { 1249 !IS_ALIGNED(*offp, sizeof(void *))) {
1246 pr_err("binder: transaction release %d bad" 1250 pr_err("transaction release %d bad offset %zd, size %zd\n",
1247 "offset %zd, size %zd\n", debug_id, 1251 debug_id, *offp, buffer->data_size);
1248 *offp, buffer->data_size);
1249 continue; 1252 continue;
1250 } 1253 }
1251 fp = (struct flat_binder_object *)(buffer->data + *offp); 1254 fp = (struct flat_binder_object *)(buffer->data + *offp);
@@ -1254,8 +1257,8 @@ static void binder_transaction_buffer_release(struct binder_proc *proc,
1254 case BINDER_TYPE_WEAK_BINDER: { 1257 case BINDER_TYPE_WEAK_BINDER: {
1255 struct binder_node *node = binder_get_node(proc, fp->binder); 1258 struct binder_node *node = binder_get_node(proc, fp->binder);
1256 if (node == NULL) { 1259 if (node == NULL) {
1257 pr_err("binder: transaction release %d" 1260 pr_err("transaction release %d bad node %p\n",
1258 " bad node %p\n", debug_id, fp->binder); 1261 debug_id, fp->binder);
1259 break; 1262 break;
1260 } 1263 }
1261 binder_debug(BINDER_DEBUG_TRANSACTION, 1264 binder_debug(BINDER_DEBUG_TRANSACTION,
@@ -1267,9 +1270,8 @@ static void binder_transaction_buffer_release(struct binder_proc *proc,
1267 case BINDER_TYPE_WEAK_HANDLE: { 1270 case BINDER_TYPE_WEAK_HANDLE: {
1268 struct binder_ref *ref = binder_get_ref(proc, fp->handle); 1271 struct binder_ref *ref = binder_get_ref(proc, fp->handle);
1269 if (ref == NULL) { 1272 if (ref == NULL) {
1270 pr_err("binder: transaction release %d" 1273 pr_err("transaction release %d bad handle %ld\n",
1271 " bad handle %ld\n", debug_id, 1274 debug_id, fp->handle);
1272 fp->handle);
1273 break; 1275 break;
1274 } 1276 }
1275 binder_debug(BINDER_DEBUG_TRANSACTION, 1277 binder_debug(BINDER_DEBUG_TRANSACTION,
@@ -1286,8 +1288,8 @@ static void binder_transaction_buffer_release(struct binder_proc *proc,
1286 break; 1288 break;
1287 1289
1288 default: 1290 default:
1289 pr_err("binder: transaction release %d bad " 1291 pr_err("transaction release %d bad object type %lx\n",
1290 "object type %lx\n", debug_id, fp->type); 1292 debug_id, fp->type);
1291 break; 1293 break;
1292 } 1294 }
1293 } 1295 }
@@ -1320,17 +1322,14 @@ static void binder_transaction(struct binder_proc *proc,
1320 if (reply) { 1322 if (reply) {
1321 in_reply_to = thread->transaction_stack; 1323 in_reply_to = thread->transaction_stack;
1322 if (in_reply_to == NULL) { 1324 if (in_reply_to == NULL) {
1323 binder_user_error("binder: %d:%d got reply transaction " 1325 binder_user_error("%d:%d got reply transaction with no transaction stack\n",
1324 "with no transaction stack\n",
1325 proc->pid, thread->pid); 1326 proc->pid, thread->pid);
1326 return_error = BR_FAILED_REPLY; 1327 return_error = BR_FAILED_REPLY;
1327 goto err_empty_call_stack; 1328 goto err_empty_call_stack;
1328 } 1329 }
1329 binder_set_nice(in_reply_to->saved_priority); 1330 binder_set_nice(in_reply_to->saved_priority);
1330 if (in_reply_to->to_thread != thread) { 1331 if (in_reply_to->to_thread != thread) {
1331 binder_user_error("binder: %d:%d got reply transaction " 1332 binder_user_error("%d:%d got reply transaction with bad transaction stack, transaction %d has target %d:%d\n",
1332 "with bad transaction stack,"
1333 " transaction %d has target %d:%d\n",
1334 proc->pid, thread->pid, in_reply_to->debug_id, 1333 proc->pid, thread->pid, in_reply_to->debug_id,
1335 in_reply_to->to_proc ? 1334 in_reply_to->to_proc ?
1336 in_reply_to->to_proc->pid : 0, 1335 in_reply_to->to_proc->pid : 0,
@@ -1347,9 +1346,7 @@ static void binder_transaction(struct binder_proc *proc,
1347 goto err_dead_binder; 1346 goto err_dead_binder;
1348 } 1347 }
1349 if (target_thread->transaction_stack != in_reply_to) { 1348 if (target_thread->transaction_stack != in_reply_to) {
1350 binder_user_error("binder: %d:%d got reply transaction " 1349 binder_user_error("%d:%d got reply transaction with bad target transaction stack %d, expected %d\n",
1351 "with bad target transaction stack %d, "
1352 "expected %d\n",
1353 proc->pid, thread->pid, 1350 proc->pid, thread->pid,
1354 target_thread->transaction_stack ? 1351 target_thread->transaction_stack ?
1355 target_thread->transaction_stack->debug_id : 0, 1352 target_thread->transaction_stack->debug_id : 0,
@@ -1365,8 +1362,7 @@ static void binder_transaction(struct binder_proc *proc,
1365 struct binder_ref *ref; 1362 struct binder_ref *ref;
1366 ref = binder_get_ref(proc, tr->target.handle); 1363 ref = binder_get_ref(proc, tr->target.handle);
1367 if (ref == NULL) { 1364 if (ref == NULL) {
1368 binder_user_error("binder: %d:%d got " 1365 binder_user_error("%d:%d got transaction to invalid handle\n",
1369 "transaction to invalid handle\n",
1370 proc->pid, thread->pid); 1366 proc->pid, thread->pid);
1371 return_error = BR_FAILED_REPLY; 1367 return_error = BR_FAILED_REPLY;
1372 goto err_invalid_target_handle; 1368 goto err_invalid_target_handle;
@@ -1389,9 +1385,7 @@ static void binder_transaction(struct binder_proc *proc,
1389 struct binder_transaction *tmp; 1385 struct binder_transaction *tmp;
1390 tmp = thread->transaction_stack; 1386 tmp = thread->transaction_stack;
1391 if (tmp->to_thread != thread) { 1387 if (tmp->to_thread != thread) {
1392 binder_user_error("binder: %d:%d got new " 1388 binder_user_error("%d:%d got new transaction with bad transaction stack, transaction %d has target %d:%d\n",
1393 "transaction with bad transaction stack"
1394 ", transaction %d has target %d:%d\n",
1395 proc->pid, thread->pid, tmp->debug_id, 1389 proc->pid, thread->pid, tmp->debug_id,
1396 tmp->to_proc ? tmp->to_proc->pid : 0, 1390 tmp->to_proc ? tmp->to_proc->pid : 0,
1397 tmp->to_thread ? 1391 tmp->to_thread ?
@@ -1436,16 +1430,14 @@ static void binder_transaction(struct binder_proc *proc,
1436 1430
1437 if (reply) 1431 if (reply)
1438 binder_debug(BINDER_DEBUG_TRANSACTION, 1432 binder_debug(BINDER_DEBUG_TRANSACTION,
1439 "binder: %d:%d BC_REPLY %d -> %d:%d, " 1433 "%d:%d BC_REPLY %d -> %d:%d, data %p-%p size %zd-%zd\n",
1440 "data %p-%p size %zd-%zd\n",
1441 proc->pid, thread->pid, t->debug_id, 1434 proc->pid, thread->pid, t->debug_id,
1442 target_proc->pid, target_thread->pid, 1435 target_proc->pid, target_thread->pid,
1443 tr->data.ptr.buffer, tr->data.ptr.offsets, 1436 tr->data.ptr.buffer, tr->data.ptr.offsets,
1444 tr->data_size, tr->offsets_size); 1437 tr->data_size, tr->offsets_size);
1445 else 1438 else
1446 binder_debug(BINDER_DEBUG_TRANSACTION, 1439 binder_debug(BINDER_DEBUG_TRANSACTION,
1447 "binder: %d:%d BC_TRANSACTION %d -> " 1440 "%d:%d BC_TRANSACTION %d -> %d - node %d, data %p-%p size %zd-%zd\n",
1448 "%d - node %d, data %p-%p size %zd-%zd\n",
1449 proc->pid, thread->pid, t->debug_id, 1441 proc->pid, thread->pid, t->debug_id,
1450 target_proc->pid, target_node->debug_id, 1442 target_proc->pid, target_node->debug_id,
1451 tr->data.ptr.buffer, tr->data.ptr.offsets, 1443 tr->data.ptr.buffer, tr->data.ptr.offsets,
@@ -1461,6 +1453,9 @@ static void binder_transaction(struct binder_proc *proc,
1461 t->code = tr->code; 1453 t->code = tr->code;
1462 t->flags = tr->flags; 1454 t->flags = tr->flags;
1463 t->priority = task_nice(current); 1455 t->priority = task_nice(current);
1456
1457 trace_binder_transaction(reply, t, target_node);
1458
1464 t->buffer = binder_alloc_buf(target_proc, tr->data_size, 1459 t->buffer = binder_alloc_buf(target_proc, tr->data_size,
1465 tr->offsets_size, !reply && (t->flags & TF_ONE_WAY)); 1460 tr->offsets_size, !reply && (t->flags & TF_ONE_WAY));
1466 if (t->buffer == NULL) { 1461 if (t->buffer == NULL) {
@@ -1471,27 +1466,27 @@ static void binder_transaction(struct binder_proc *proc,
1471 t->buffer->debug_id = t->debug_id; 1466 t->buffer->debug_id = t->debug_id;
1472 t->buffer->transaction = t; 1467 t->buffer->transaction = t;
1473 t->buffer->target_node = target_node; 1468 t->buffer->target_node = target_node;
1469 trace_binder_transaction_alloc_buf(t->buffer);
1474 if (target_node) 1470 if (target_node)
1475 binder_inc_node(target_node, 1, 0, NULL); 1471 binder_inc_node(target_node, 1, 0, NULL);
1476 1472
1477 offp = (size_t *)(t->buffer->data + ALIGN(tr->data_size, sizeof(void *))); 1473 offp = (size_t *)(t->buffer->data + ALIGN(tr->data_size, sizeof(void *)));
1478 1474
1479 if (copy_from_user(t->buffer->data, tr->data.ptr.buffer, tr->data_size)) { 1475 if (copy_from_user(t->buffer->data, tr->data.ptr.buffer, tr->data_size)) {
1480 binder_user_error("binder: %d:%d got transaction with invalid " 1476 binder_user_error("%d:%d got transaction with invalid data ptr\n",
1481 "data ptr\n", proc->pid, thread->pid); 1477 proc->pid, thread->pid);
1482 return_error = BR_FAILED_REPLY; 1478 return_error = BR_FAILED_REPLY;
1483 goto err_copy_data_failed; 1479 goto err_copy_data_failed;
1484 } 1480 }
1485 if (copy_from_user(offp, tr->data.ptr.offsets, tr->offsets_size)) { 1481 if (copy_from_user(offp, tr->data.ptr.offsets, tr->offsets_size)) {
1486 binder_user_error("binder: %d:%d got transaction with invalid " 1482 binder_user_error("%d:%d got transaction with invalid offsets ptr\n",
1487 "offsets ptr\n", proc->pid, thread->pid); 1483 proc->pid, thread->pid);
1488 return_error = BR_FAILED_REPLY; 1484 return_error = BR_FAILED_REPLY;
1489 goto err_copy_data_failed; 1485 goto err_copy_data_failed;
1490 } 1486 }
1491 if (!IS_ALIGNED(tr->offsets_size, sizeof(size_t))) { 1487 if (!IS_ALIGNED(tr->offsets_size, sizeof(size_t))) {
1492 binder_user_error("binder: %d:%d got transaction with " 1488 binder_user_error("%d:%d got transaction with invalid offsets size, %zd\n",
1493 "invalid offsets size, %zd\n", 1489 proc->pid, thread->pid, tr->offsets_size);
1494 proc->pid, thread->pid, tr->offsets_size);
1495 return_error = BR_FAILED_REPLY; 1490 return_error = BR_FAILED_REPLY;
1496 goto err_bad_offset; 1491 goto err_bad_offset;
1497 } 1492 }
@@ -1501,9 +1496,8 @@ static void binder_transaction(struct binder_proc *proc,
1501 if (*offp > t->buffer->data_size - sizeof(*fp) || 1496 if (*offp > t->buffer->data_size - sizeof(*fp) ||
1502 t->buffer->data_size < sizeof(*fp) || 1497 t->buffer->data_size < sizeof(*fp) ||
1503 !IS_ALIGNED(*offp, sizeof(void *))) { 1498 !IS_ALIGNED(*offp, sizeof(void *))) {
1504 binder_user_error("binder: %d:%d got transaction with " 1499 binder_user_error("%d:%d got transaction with invalid offset, %zd\n",
1505 "invalid offset, %zd\n", 1500 proc->pid, thread->pid, *offp);
1506 proc->pid, thread->pid, *offp);
1507 return_error = BR_FAILED_REPLY; 1501 return_error = BR_FAILED_REPLY;
1508 goto err_bad_offset; 1502 goto err_bad_offset;
1509 } 1503 }
@@ -1523,8 +1517,7 @@ static void binder_transaction(struct binder_proc *proc,
1523 node->accept_fds = !!(fp->flags & FLAT_BINDER_FLAG_ACCEPTS_FDS); 1517 node->accept_fds = !!(fp->flags & FLAT_BINDER_FLAG_ACCEPTS_FDS);
1524 } 1518 }
1525 if (fp->cookie != node->cookie) { 1519 if (fp->cookie != node->cookie) {
1526 binder_user_error("binder: %d:%d sending u%p " 1520 binder_user_error("%d:%d sending u%p node %d, cookie mismatch %p != %p\n",
1527 "node %d, cookie mismatch %p != %p\n",
1528 proc->pid, thread->pid, 1521 proc->pid, thread->pid,
1529 fp->binder, node->debug_id, 1522 fp->binder, node->debug_id,
1530 fp->cookie, node->cookie); 1523 fp->cookie, node->cookie);
@@ -1543,6 +1536,7 @@ static void binder_transaction(struct binder_proc *proc,
1543 binder_inc_ref(ref, fp->type == BINDER_TYPE_HANDLE, 1536 binder_inc_ref(ref, fp->type == BINDER_TYPE_HANDLE,
1544 &thread->todo); 1537 &thread->todo);
1545 1538
1539 trace_binder_transaction_node_to_ref(t, node, ref);
1546 binder_debug(BINDER_DEBUG_TRANSACTION, 1540 binder_debug(BINDER_DEBUG_TRANSACTION,
1547 " node %d u%p -> ref %d desc %d\n", 1541 " node %d u%p -> ref %d desc %d\n",
1548 node->debug_id, node->ptr, ref->debug_id, 1542 node->debug_id, node->ptr, ref->debug_id,
@@ -1552,10 +1546,9 @@ static void binder_transaction(struct binder_proc *proc,
1552 case BINDER_TYPE_WEAK_HANDLE: { 1546 case BINDER_TYPE_WEAK_HANDLE: {
1553 struct binder_ref *ref = binder_get_ref(proc, fp->handle); 1547 struct binder_ref *ref = binder_get_ref(proc, fp->handle);
1554 if (ref == NULL) { 1548 if (ref == NULL) {
1555 binder_user_error("binder: %d:%d got " 1549 binder_user_error("%d:%d got transaction with invalid handle, %ld\n",
1556 "transaction with invalid " 1550 proc->pid,
1557 "handle, %ld\n", proc->pid, 1551 thread->pid, fp->handle);
1558 thread->pid, fp->handle);
1559 return_error = BR_FAILED_REPLY; 1552 return_error = BR_FAILED_REPLY;
1560 goto err_binder_get_ref_failed; 1553 goto err_binder_get_ref_failed;
1561 } 1554 }
@@ -1567,6 +1560,7 @@ static void binder_transaction(struct binder_proc *proc,
1567 fp->binder = ref->node->ptr; 1560 fp->binder = ref->node->ptr;
1568 fp->cookie = ref->node->cookie; 1561 fp->cookie = ref->node->cookie;
1569 binder_inc_node(ref->node, fp->type == BINDER_TYPE_BINDER, 0, NULL); 1562 binder_inc_node(ref->node, fp->type == BINDER_TYPE_BINDER, 0, NULL);
1563 trace_binder_transaction_ref_to_node(t, ref);
1570 binder_debug(BINDER_DEBUG_TRANSACTION, 1564 binder_debug(BINDER_DEBUG_TRANSACTION,
1571 " ref %d desc %d -> node %d u%p\n", 1565 " ref %d desc %d -> node %d u%p\n",
1572 ref->debug_id, ref->desc, ref->node->debug_id, 1566 ref->debug_id, ref->desc, ref->node->debug_id,
@@ -1580,6 +1574,8 @@ static void binder_transaction(struct binder_proc *proc,
1580 } 1574 }
1581 fp->handle = new_ref->desc; 1575 fp->handle = new_ref->desc;
1582 binder_inc_ref(new_ref, fp->type == BINDER_TYPE_HANDLE, NULL); 1576 binder_inc_ref(new_ref, fp->type == BINDER_TYPE_HANDLE, NULL);
1577 trace_binder_transaction_ref_to_ref(t, ref,
1578 new_ref);
1583 binder_debug(BINDER_DEBUG_TRANSACTION, 1579 binder_debug(BINDER_DEBUG_TRANSACTION,
1584 " ref %d desc %d -> ref %d desc %d (node %d)\n", 1580 " ref %d desc %d -> ref %d desc %d (node %d)\n",
1585 ref->debug_id, ref->desc, new_ref->debug_id, 1581 ref->debug_id, ref->desc, new_ref->debug_id,
@@ -1593,13 +1589,13 @@ static void binder_transaction(struct binder_proc *proc,
1593 1589
1594 if (reply) { 1590 if (reply) {
1595 if (!(in_reply_to->flags & TF_ACCEPT_FDS)) { 1591 if (!(in_reply_to->flags & TF_ACCEPT_FDS)) {
1596 binder_user_error("binder: %d:%d got reply with fd, %ld, but target does not allow fds\n", 1592 binder_user_error("%d:%d got reply with fd, %ld, but target does not allow fds\n",
1597 proc->pid, thread->pid, fp->handle); 1593 proc->pid, thread->pid, fp->handle);
1598 return_error = BR_FAILED_REPLY; 1594 return_error = BR_FAILED_REPLY;
1599 goto err_fd_not_allowed; 1595 goto err_fd_not_allowed;
1600 } 1596 }
1601 } else if (!target_node->accept_fds) { 1597 } else if (!target_node->accept_fds) {
1602 binder_user_error("binder: %d:%d got transaction with fd, %ld, but target does not allow fds\n", 1598 binder_user_error("%d:%d got transaction with fd, %ld, but target does not allow fds\n",
1603 proc->pid, thread->pid, fp->handle); 1599 proc->pid, thread->pid, fp->handle);
1604 return_error = BR_FAILED_REPLY; 1600 return_error = BR_FAILED_REPLY;
1605 goto err_fd_not_allowed; 1601 goto err_fd_not_allowed;
@@ -1607,7 +1603,7 @@ static void binder_transaction(struct binder_proc *proc,
1607 1603
1608 file = fget(fp->handle); 1604 file = fget(fp->handle);
1609 if (file == NULL) { 1605 if (file == NULL) {
1610 binder_user_error("binder: %d:%d got transaction with invalid fd, %ld\n", 1606 binder_user_error("%d:%d got transaction with invalid fd, %ld\n",
1611 proc->pid, thread->pid, fp->handle); 1607 proc->pid, thread->pid, fp->handle);
1612 return_error = BR_FAILED_REPLY; 1608 return_error = BR_FAILED_REPLY;
1613 goto err_fget_failed; 1609 goto err_fget_failed;
@@ -1619,6 +1615,7 @@ static void binder_transaction(struct binder_proc *proc,
1619 goto err_get_unused_fd_failed; 1615 goto err_get_unused_fd_failed;
1620 } 1616 }
1621 task_fd_install(target_proc, target_fd, file); 1617 task_fd_install(target_proc, target_fd, file);
1618 trace_binder_transaction_fd(t, fp->handle, target_fd);
1622 binder_debug(BINDER_DEBUG_TRANSACTION, 1619 binder_debug(BINDER_DEBUG_TRANSACTION,
1623 " fd %ld -> %d\n", fp->handle, target_fd); 1620 " fd %ld -> %d\n", fp->handle, target_fd);
1624 /* TODO: fput? */ 1621 /* TODO: fput? */
@@ -1626,8 +1623,7 @@ static void binder_transaction(struct binder_proc *proc,
1626 } break; 1623 } break;
1627 1624
1628 default: 1625 default:
1629 binder_user_error("binder: %d:%d got transactio" 1626 binder_user_error("%d:%d got transaction with invalid object type, %lx\n",
1630 "n with invalid object type, %lx\n",
1631 proc->pid, thread->pid, fp->type); 1627 proc->pid, thread->pid, fp->type);
1632 return_error = BR_FAILED_REPLY; 1628 return_error = BR_FAILED_REPLY;
1633 goto err_bad_object_type; 1629 goto err_bad_object_type;
@@ -1667,6 +1663,7 @@ err_binder_new_node_failed:
1667err_bad_object_type: 1663err_bad_object_type:
1668err_bad_offset: 1664err_bad_offset:
1669err_copy_data_failed: 1665err_copy_data_failed:
1666 trace_binder_transaction_failed_buffer_release(t->buffer);
1670 binder_transaction_buffer_release(target_proc, t->buffer, offp); 1667 binder_transaction_buffer_release(target_proc, t->buffer, offp);
1671 t->buffer->transaction = NULL; 1668 t->buffer->transaction = NULL;
1672 binder_free_buf(target_proc, t->buffer); 1669 binder_free_buf(target_proc, t->buffer);
@@ -1683,7 +1680,7 @@ err_dead_binder:
1683err_invalid_target_handle: 1680err_invalid_target_handle:
1684err_no_context_mgr_node: 1681err_no_context_mgr_node:
1685 binder_debug(BINDER_DEBUG_FAILED_TRANSACTION, 1682 binder_debug(BINDER_DEBUG_FAILED_TRANSACTION,
1686 "binder: %d:%d transaction failed %d, size %zd-%zd\n", 1683 "%d:%d transaction failed %d, size %zd-%zd\n",
1687 proc->pid, thread->pid, return_error, 1684 proc->pid, thread->pid, return_error,
1688 tr->data_size, tr->offsets_size); 1685 tr->data_size, tr->offsets_size);
1689 1686
@@ -1712,6 +1709,7 @@ int binder_thread_write(struct binder_proc *proc, struct binder_thread *thread,
1712 if (get_user(cmd, (uint32_t __user *)ptr)) 1709 if (get_user(cmd, (uint32_t __user *)ptr))
1713 return -EFAULT; 1710 return -EFAULT;
1714 ptr += sizeof(uint32_t); 1711 ptr += sizeof(uint32_t);
1712 trace_binder_command(cmd);
1715 if (_IOC_NR(cmd) < ARRAY_SIZE(binder_stats.bc)) { 1713 if (_IOC_NR(cmd) < ARRAY_SIZE(binder_stats.bc)) {
1716 binder_stats.bc[_IOC_NR(cmd)]++; 1714 binder_stats.bc[_IOC_NR(cmd)]++;
1717 proc->stats.bc[_IOC_NR(cmd)]++; 1715 proc->stats.bc[_IOC_NR(cmd)]++;
@@ -1734,18 +1732,14 @@ int binder_thread_write(struct binder_proc *proc, struct binder_thread *thread,
1734 ref = binder_get_ref_for_node(proc, 1732 ref = binder_get_ref_for_node(proc,
1735 binder_context_mgr_node); 1733 binder_context_mgr_node);
1736 if (ref->desc != target) { 1734 if (ref->desc != target) {
1737 binder_user_error("binder: %d:" 1735 binder_user_error("%d:%d tried to acquire reference to desc 0, got %d instead\n",
1738 "%d tried to acquire "
1739 "reference to desc 0, "
1740 "got %d instead\n",
1741 proc->pid, thread->pid, 1736 proc->pid, thread->pid,
1742 ref->desc); 1737 ref->desc);
1743 } 1738 }
1744 } else 1739 } else
1745 ref = binder_get_ref(proc, target); 1740 ref = binder_get_ref(proc, target);
1746 if (ref == NULL) { 1741 if (ref == NULL) {
1747 binder_user_error("binder: %d:%d refcou" 1742 binder_user_error("%d:%d refcount change on invalid ref %d\n",
1748 "nt change on invalid ref %d\n",
1749 proc->pid, thread->pid, target); 1743 proc->pid, thread->pid, target);
1750 break; 1744 break;
1751 } 1745 }
@@ -1769,7 +1763,7 @@ int binder_thread_write(struct binder_proc *proc, struct binder_thread *thread,
1769 break; 1763 break;
1770 } 1764 }
1771 binder_debug(BINDER_DEBUG_USER_REFS, 1765 binder_debug(BINDER_DEBUG_USER_REFS,
1772 "binder: %d:%d %s ref %d desc %d s %d w %d for node %d\n", 1766 "%d:%d %s ref %d desc %d s %d w %d for node %d\n",
1773 proc->pid, thread->pid, debug_string, ref->debug_id, 1767 proc->pid, thread->pid, debug_string, ref->debug_id,
1774 ref->desc, ref->strong, ref->weak, ref->node->debug_id); 1768 ref->desc, ref->strong, ref->weak, ref->node->debug_id);
1775 break; 1769 break;
@@ -1788,8 +1782,7 @@ int binder_thread_write(struct binder_proc *proc, struct binder_thread *thread,
1788 ptr += sizeof(void *); 1782 ptr += sizeof(void *);
1789 node = binder_get_node(proc, node_ptr); 1783 node = binder_get_node(proc, node_ptr);
1790 if (node == NULL) { 1784 if (node == NULL) {
1791 binder_user_error("binder: %d:%d " 1785 binder_user_error("%d:%d %s u%p no match\n",
1792 "%s u%p no match\n",
1793 proc->pid, thread->pid, 1786 proc->pid, thread->pid,
1794 cmd == BC_INCREFS_DONE ? 1787 cmd == BC_INCREFS_DONE ?
1795 "BC_INCREFS_DONE" : 1788 "BC_INCREFS_DONE" :
@@ -1798,8 +1791,7 @@ int binder_thread_write(struct binder_proc *proc, struct binder_thread *thread,
1798 break; 1791 break;
1799 } 1792 }
1800 if (cookie != node->cookie) { 1793 if (cookie != node->cookie) {
1801 binder_user_error("binder: %d:%d %s u%p node %d" 1794 binder_user_error("%d:%d %s u%p node %d cookie mismatch %p != %p\n",
1802 " cookie mismatch %p != %p\n",
1803 proc->pid, thread->pid, 1795 proc->pid, thread->pid,
1804 cmd == BC_INCREFS_DONE ? 1796 cmd == BC_INCREFS_DONE ?
1805 "BC_INCREFS_DONE" : "BC_ACQUIRE_DONE", 1797 "BC_INCREFS_DONE" : "BC_ACQUIRE_DONE",
@@ -1809,9 +1801,7 @@ int binder_thread_write(struct binder_proc *proc, struct binder_thread *thread,
1809 } 1801 }
1810 if (cmd == BC_ACQUIRE_DONE) { 1802 if (cmd == BC_ACQUIRE_DONE) {
1811 if (node->pending_strong_ref == 0) { 1803 if (node->pending_strong_ref == 0) {
1812 binder_user_error("binder: %d:%d " 1804 binder_user_error("%d:%d BC_ACQUIRE_DONE node %d has no pending acquire request\n",
1813 "BC_ACQUIRE_DONE node %d has "
1814 "no pending acquire request\n",
1815 proc->pid, thread->pid, 1805 proc->pid, thread->pid,
1816 node->debug_id); 1806 node->debug_id);
1817 break; 1807 break;
@@ -1819,9 +1809,7 @@ int binder_thread_write(struct binder_proc *proc, struct binder_thread *thread,
1819 node->pending_strong_ref = 0; 1809 node->pending_strong_ref = 0;
1820 } else { 1810 } else {
1821 if (node->pending_weak_ref == 0) { 1811 if (node->pending_weak_ref == 0) {
1822 binder_user_error("binder: %d:%d " 1812 binder_user_error("%d:%d BC_INCREFS_DONE node %d has no pending increfs request\n",
1823 "BC_INCREFS_DONE node %d has "
1824 "no pending increfs request\n",
1825 proc->pid, thread->pid, 1813 proc->pid, thread->pid,
1826 node->debug_id); 1814 node->debug_id);
1827 break; 1815 break;
@@ -1830,17 +1818,17 @@ int binder_thread_write(struct binder_proc *proc, struct binder_thread *thread,
1830 } 1818 }
1831 binder_dec_node(node, cmd == BC_ACQUIRE_DONE, 0); 1819 binder_dec_node(node, cmd == BC_ACQUIRE_DONE, 0);
1832 binder_debug(BINDER_DEBUG_USER_REFS, 1820 binder_debug(BINDER_DEBUG_USER_REFS,
1833 "binder: %d:%d %s node %d ls %d lw %d\n", 1821 "%d:%d %s node %d ls %d lw %d\n",
1834 proc->pid, thread->pid, 1822 proc->pid, thread->pid,
1835 cmd == BC_INCREFS_DONE ? "BC_INCREFS_DONE" : "BC_ACQUIRE_DONE", 1823 cmd == BC_INCREFS_DONE ? "BC_INCREFS_DONE" : "BC_ACQUIRE_DONE",
1836 node->debug_id, node->local_strong_refs, node->local_weak_refs); 1824 node->debug_id, node->local_strong_refs, node->local_weak_refs);
1837 break; 1825 break;
1838 } 1826 }
1839 case BC_ATTEMPT_ACQUIRE: 1827 case BC_ATTEMPT_ACQUIRE:
1840 pr_err("binder: BC_ATTEMPT_ACQUIRE not supported\n"); 1828 pr_err("BC_ATTEMPT_ACQUIRE not supported\n");
1841 return -EINVAL; 1829 return -EINVAL;
1842 case BC_ACQUIRE_RESULT: 1830 case BC_ACQUIRE_RESULT:
1843 pr_err("binder: BC_ACQUIRE_RESULT not supported\n"); 1831 pr_err("BC_ACQUIRE_RESULT not supported\n");
1844 return -EINVAL; 1832 return -EINVAL;
1845 1833
1846 case BC_FREE_BUFFER: { 1834 case BC_FREE_BUFFER: {
@@ -1853,20 +1841,17 @@ int binder_thread_write(struct binder_proc *proc, struct binder_thread *thread,
1853 1841
1854 buffer = binder_buffer_lookup(proc, data_ptr); 1842 buffer = binder_buffer_lookup(proc, data_ptr);
1855 if (buffer == NULL) { 1843 if (buffer == NULL) {
1856 binder_user_error("binder: %d:%d " 1844 binder_user_error("%d:%d BC_FREE_BUFFER u%p no match\n",
1857 "BC_FREE_BUFFER u%p no match\n",
1858 proc->pid, thread->pid, data_ptr); 1845 proc->pid, thread->pid, data_ptr);
1859 break; 1846 break;
1860 } 1847 }
1861 if (!buffer->allow_user_free) { 1848 if (!buffer->allow_user_free) {
1862 binder_user_error("binder: %d:%d " 1849 binder_user_error("%d:%d BC_FREE_BUFFER u%p matched unreturned buffer\n",
1863 "BC_FREE_BUFFER u%p matched "
1864 "unreturned buffer\n",
1865 proc->pid, thread->pid, data_ptr); 1850 proc->pid, thread->pid, data_ptr);
1866 break; 1851 break;
1867 } 1852 }
1868 binder_debug(BINDER_DEBUG_FREE_BUFFER, 1853 binder_debug(BINDER_DEBUG_FREE_BUFFER,
1869 "binder: %d:%d BC_FREE_BUFFER u%p found buffer %d for %s transaction\n", 1854 "%d:%d BC_FREE_BUFFER u%p found buffer %d for %s transaction\n",
1870 proc->pid, thread->pid, data_ptr, buffer->debug_id, 1855 proc->pid, thread->pid, data_ptr, buffer->debug_id,
1871 buffer->transaction ? "active" : "finished"); 1856 buffer->transaction ? "active" : "finished");
1872 1857
@@ -1881,6 +1866,7 @@ int binder_thread_write(struct binder_proc *proc, struct binder_thread *thread,
1881 else 1866 else
1882 list_move_tail(buffer->target_node->async_todo.next, &thread->todo); 1867 list_move_tail(buffer->target_node->async_todo.next, &thread->todo);
1883 } 1868 }
1869 trace_binder_transaction_buffer_release(buffer);
1884 binder_transaction_buffer_release(proc, buffer, NULL); 1870 binder_transaction_buffer_release(proc, buffer, NULL);
1885 binder_free_buf(proc, buffer); 1871 binder_free_buf(proc, buffer);
1886 break; 1872 break;
@@ -1899,19 +1885,15 @@ int binder_thread_write(struct binder_proc *proc, struct binder_thread *thread,
1899 1885
1900 case BC_REGISTER_LOOPER: 1886 case BC_REGISTER_LOOPER:
1901 binder_debug(BINDER_DEBUG_THREADS, 1887 binder_debug(BINDER_DEBUG_THREADS,
1902 "binder: %d:%d BC_REGISTER_LOOPER\n", 1888 "%d:%d BC_REGISTER_LOOPER\n",
1903 proc->pid, thread->pid); 1889 proc->pid, thread->pid);
1904 if (thread->looper & BINDER_LOOPER_STATE_ENTERED) { 1890 if (thread->looper & BINDER_LOOPER_STATE_ENTERED) {
1905 thread->looper |= BINDER_LOOPER_STATE_INVALID; 1891 thread->looper |= BINDER_LOOPER_STATE_INVALID;
1906 binder_user_error("binder: %d:%d ERROR:" 1892 binder_user_error("%d:%d ERROR: BC_REGISTER_LOOPER called after BC_ENTER_LOOPER\n",
1907 " BC_REGISTER_LOOPER called "
1908 "after BC_ENTER_LOOPER\n",
1909 proc->pid, thread->pid); 1893 proc->pid, thread->pid);
1910 } else if (proc->requested_threads == 0) { 1894 } else if (proc->requested_threads == 0) {
1911 thread->looper |= BINDER_LOOPER_STATE_INVALID; 1895 thread->looper |= BINDER_LOOPER_STATE_INVALID;
1912 binder_user_error("binder: %d:%d ERROR:" 1896 binder_user_error("%d:%d ERROR: BC_REGISTER_LOOPER called without request\n",
1913 " BC_REGISTER_LOOPER called "
1914 "without request\n",
1915 proc->pid, thread->pid); 1897 proc->pid, thread->pid);
1916 } else { 1898 } else {
1917 proc->requested_threads--; 1899 proc->requested_threads--;
@@ -1921,20 +1903,18 @@ int binder_thread_write(struct binder_proc *proc, struct binder_thread *thread,
1921 break; 1903 break;
1922 case BC_ENTER_LOOPER: 1904 case BC_ENTER_LOOPER:
1923 binder_debug(BINDER_DEBUG_THREADS, 1905 binder_debug(BINDER_DEBUG_THREADS,
1924 "binder: %d:%d BC_ENTER_LOOPER\n", 1906 "%d:%d BC_ENTER_LOOPER\n",
1925 proc->pid, thread->pid); 1907 proc->pid, thread->pid);
1926 if (thread->looper & BINDER_LOOPER_STATE_REGISTERED) { 1908 if (thread->looper & BINDER_LOOPER_STATE_REGISTERED) {
1927 thread->looper |= BINDER_LOOPER_STATE_INVALID; 1909 thread->looper |= BINDER_LOOPER_STATE_INVALID;
1928 binder_user_error("binder: %d:%d ERROR:" 1910 binder_user_error("%d:%d ERROR: BC_ENTER_LOOPER called after BC_REGISTER_LOOPER\n",
1929 " BC_ENTER_LOOPER called after "
1930 "BC_REGISTER_LOOPER\n",
1931 proc->pid, thread->pid); 1911 proc->pid, thread->pid);
1932 } 1912 }
1933 thread->looper |= BINDER_LOOPER_STATE_ENTERED; 1913 thread->looper |= BINDER_LOOPER_STATE_ENTERED;
1934 break; 1914 break;
1935 case BC_EXIT_LOOPER: 1915 case BC_EXIT_LOOPER:
1936 binder_debug(BINDER_DEBUG_THREADS, 1916 binder_debug(BINDER_DEBUG_THREADS,
1937 "binder: %d:%d BC_EXIT_LOOPER\n", 1917 "%d:%d BC_EXIT_LOOPER\n",
1938 proc->pid, thread->pid); 1918 proc->pid, thread->pid);
1939 thread->looper |= BINDER_LOOPER_STATE_EXITED; 1919 thread->looper |= BINDER_LOOPER_STATE_EXITED;
1940 break; 1920 break;
@@ -1954,8 +1934,7 @@ int binder_thread_write(struct binder_proc *proc, struct binder_thread *thread,
1954 ptr += sizeof(void *); 1934 ptr += sizeof(void *);
1955 ref = binder_get_ref(proc, target); 1935 ref = binder_get_ref(proc, target);
1956 if (ref == NULL) { 1936 if (ref == NULL) {
1957 binder_user_error("binder: %d:%d %s " 1937 binder_user_error("%d:%d %s invalid ref %d\n",
1958 "invalid ref %d\n",
1959 proc->pid, thread->pid, 1938 proc->pid, thread->pid,
1960 cmd == BC_REQUEST_DEATH_NOTIFICATION ? 1939 cmd == BC_REQUEST_DEATH_NOTIFICATION ?
1961 "BC_REQUEST_DEATH_NOTIFICATION" : 1940 "BC_REQUEST_DEATH_NOTIFICATION" :
@@ -1965,7 +1944,7 @@ int binder_thread_write(struct binder_proc *proc, struct binder_thread *thread,
1965 } 1944 }
1966 1945
1967 binder_debug(BINDER_DEBUG_DEATH_NOTIFICATION, 1946 binder_debug(BINDER_DEBUG_DEATH_NOTIFICATION,
1968 "binder: %d:%d %s %p ref %d desc %d s %d w %d for node %d\n", 1947 "%d:%d %s %p ref %d desc %d s %d w %d for node %d\n",
1969 proc->pid, thread->pid, 1948 proc->pid, thread->pid,
1970 cmd == BC_REQUEST_DEATH_NOTIFICATION ? 1949 cmd == BC_REQUEST_DEATH_NOTIFICATION ?
1971 "BC_REQUEST_DEATH_NOTIFICATION" : 1950 "BC_REQUEST_DEATH_NOTIFICATION" :
@@ -1975,10 +1954,7 @@ int binder_thread_write(struct binder_proc *proc, struct binder_thread *thread,
1975 1954
1976 if (cmd == BC_REQUEST_DEATH_NOTIFICATION) { 1955 if (cmd == BC_REQUEST_DEATH_NOTIFICATION) {
1977 if (ref->death) { 1956 if (ref->death) {
1978 binder_user_error("binder: %d:%" 1957 binder_user_error("%d:%d BC_REQUEST_DEATH_NOTIFICATION death notification already set\n",
1979 "d BC_REQUEST_DEATH_NOTI"
1980 "FICATION death notific"
1981 "ation already set\n",
1982 proc->pid, thread->pid); 1958 proc->pid, thread->pid);
1983 break; 1959 break;
1984 } 1960 }
@@ -1986,8 +1962,7 @@ int binder_thread_write(struct binder_proc *proc, struct binder_thread *thread,
1986 if (death == NULL) { 1962 if (death == NULL) {
1987 thread->return_error = BR_ERROR; 1963 thread->return_error = BR_ERROR;
1988 binder_debug(BINDER_DEBUG_FAILED_TRANSACTION, 1964 binder_debug(BINDER_DEBUG_FAILED_TRANSACTION,
1989 "binder: %d:%d " 1965 "%d:%d BC_REQUEST_DEATH_NOTIFICATION failed\n",
1990 "BC_REQUEST_DEATH_NOTIFICATION failed\n",
1991 proc->pid, thread->pid); 1966 proc->pid, thread->pid);
1992 break; 1967 break;
1993 } 1968 }
@@ -2006,20 +1981,13 @@ int binder_thread_write(struct binder_proc *proc, struct binder_thread *thread,
2006 } 1981 }
2007 } else { 1982 } else {
2008 if (ref->death == NULL) { 1983 if (ref->death == NULL) {
2009 binder_user_error("binder: %d:%" 1984 binder_user_error("%d:%d BC_CLEAR_DEATH_NOTIFICATION death notification not active\n",
2010 "d BC_CLEAR_DEATH_NOTIFI"
2011 "CATION death notificat"
2012 "ion not active\n",
2013 proc->pid, thread->pid); 1985 proc->pid, thread->pid);
2014 break; 1986 break;
2015 } 1987 }
2016 death = ref->death; 1988 death = ref->death;
2017 if (death->cookie != cookie) { 1989 if (death->cookie != cookie) {
2018 binder_user_error("binder: %d:%" 1990 binder_user_error("%d:%d BC_CLEAR_DEATH_NOTIFICATION death notification cookie mismatch %p != %p\n",
2019 "d BC_CLEAR_DEATH_NOTIFI"
2020 "CATION death notificat"
2021 "ion cookie mismatch "
2022 "%p != %p\n",
2023 proc->pid, thread->pid, 1991 proc->pid, thread->pid,
2024 death->cookie, cookie); 1992 death->cookie, cookie);
2025 break; 1993 break;
@@ -2055,11 +2023,10 @@ int binder_thread_write(struct binder_proc *proc, struct binder_thread *thread,
2055 } 2023 }
2056 } 2024 }
2057 binder_debug(BINDER_DEBUG_DEAD_BINDER, 2025 binder_debug(BINDER_DEBUG_DEAD_BINDER,
2058 "binder: %d:%d BC_DEAD_BINDER_DONE %p found %p\n", 2026 "%d:%d BC_DEAD_BINDER_DONE %p found %p\n",
2059 proc->pid, thread->pid, cookie, death); 2027 proc->pid, thread->pid, cookie, death);
2060 if (death == NULL) { 2028 if (death == NULL) {
2061 binder_user_error("binder: %d:%d BC_DEAD" 2029 binder_user_error("%d:%d BC_DEAD_BINDER_DONE %p not found\n",
2062 "_BINDER_DONE %p not found\n",
2063 proc->pid, thread->pid, cookie); 2030 proc->pid, thread->pid, cookie);
2064 break; 2031 break;
2065 } 2032 }
@@ -2077,7 +2044,7 @@ int binder_thread_write(struct binder_proc *proc, struct binder_thread *thread,
2077 } break; 2044 } break;
2078 2045
2079 default: 2046 default:
2080 pr_err("binder: %d:%d unknown command %d\n", 2047 pr_err("%d:%d unknown command %d\n",
2081 proc->pid, thread->pid, cmd); 2048 proc->pid, thread->pid, cmd);
2082 return -EINVAL; 2049 return -EINVAL;
2083 } 2050 }
@@ -2089,6 +2056,7 @@ int binder_thread_write(struct binder_proc *proc, struct binder_thread *thread,
2089void binder_stat_br(struct binder_proc *proc, struct binder_thread *thread, 2056void binder_stat_br(struct binder_proc *proc, struct binder_thread *thread,
2090 uint32_t cmd) 2057 uint32_t cmd)
2091{ 2058{
2059 trace_binder_return(cmd);
2092 if (_IOC_NR(cmd) < ARRAY_SIZE(binder_stats.br)) { 2060 if (_IOC_NR(cmd) < ARRAY_SIZE(binder_stats.br)) {
2093 binder_stats.br[_IOC_NR(cmd)]++; 2061 binder_stats.br[_IOC_NR(cmd)]++;
2094 proc->stats.br[_IOC_NR(cmd)]++; 2062 proc->stats.br[_IOC_NR(cmd)]++;
@@ -2135,6 +2103,7 @@ retry:
2135 if (put_user(thread->return_error2, (uint32_t __user *)ptr)) 2103 if (put_user(thread->return_error2, (uint32_t __user *)ptr))
2136 return -EFAULT; 2104 return -EFAULT;
2137 ptr += sizeof(uint32_t); 2105 ptr += sizeof(uint32_t);
2106 binder_stat_br(proc, thread, thread->return_error2);
2138 if (ptr == end) 2107 if (ptr == end)
2139 goto done; 2108 goto done;
2140 thread->return_error2 = BR_OK; 2109 thread->return_error2 = BR_OK;
@@ -2142,6 +2111,7 @@ retry:
2142 if (put_user(thread->return_error, (uint32_t __user *)ptr)) 2111 if (put_user(thread->return_error, (uint32_t __user *)ptr))
2143 return -EFAULT; 2112 return -EFAULT;
2144 ptr += sizeof(uint32_t); 2113 ptr += sizeof(uint32_t);
2114 binder_stat_br(proc, thread, thread->return_error);
2145 thread->return_error = BR_OK; 2115 thread->return_error = BR_OK;
2146 goto done; 2116 goto done;
2147 } 2117 }
@@ -2150,13 +2120,16 @@ retry:
2150 thread->looper |= BINDER_LOOPER_STATE_WAITING; 2120 thread->looper |= BINDER_LOOPER_STATE_WAITING;
2151 if (wait_for_proc_work) 2121 if (wait_for_proc_work)
2152 proc->ready_threads++; 2122 proc->ready_threads++;
2153 mutex_unlock(&binder_lock); 2123
2124 binder_unlock(__func__);
2125
2126 trace_binder_wait_for_work(wait_for_proc_work,
2127 !!thread->transaction_stack,
2128 !list_empty(&thread->todo));
2154 if (wait_for_proc_work) { 2129 if (wait_for_proc_work) {
2155 if (!(thread->looper & (BINDER_LOOPER_STATE_REGISTERED | 2130 if (!(thread->looper & (BINDER_LOOPER_STATE_REGISTERED |
2156 BINDER_LOOPER_STATE_ENTERED))) { 2131 BINDER_LOOPER_STATE_ENTERED))) {
2157 binder_user_error("binder: %d:%d ERROR: Thread waiting " 2132 binder_user_error("%d:%d ERROR: Thread waiting for process work before calling BC_REGISTER_LOOPER or BC_ENTER_LOOPER (state %x)\n",
2158 "for process work before calling BC_REGISTER_"
2159 "LOOPER or BC_ENTER_LOOPER (state %x)\n",
2160 proc->pid, thread->pid, thread->looper); 2133 proc->pid, thread->pid, thread->looper);
2161 wait_event_interruptible(binder_user_error_wait, 2134 wait_event_interruptible(binder_user_error_wait,
2162 binder_stop_on_user_error < 2); 2135 binder_stop_on_user_error < 2);
@@ -2174,7 +2147,9 @@ retry:
2174 } else 2147 } else
2175 ret = wait_event_interruptible(thread->wait, binder_has_thread_work(thread)); 2148 ret = wait_event_interruptible(thread->wait, binder_has_thread_work(thread));
2176 } 2149 }
2177 mutex_lock(&binder_lock); 2150
2151 binder_lock(__func__);
2152
2178 if (wait_for_proc_work) 2153 if (wait_for_proc_work)
2179 proc->ready_threads--; 2154 proc->ready_threads--;
2180 thread->looper &= ~BINDER_LOOPER_STATE_WAITING; 2155 thread->looper &= ~BINDER_LOOPER_STATE_WAITING;
@@ -2213,7 +2188,7 @@ retry:
2213 2188
2214 binder_stat_br(proc, thread, cmd); 2189 binder_stat_br(proc, thread, cmd);
2215 binder_debug(BINDER_DEBUG_TRANSACTION_COMPLETE, 2190 binder_debug(BINDER_DEBUG_TRANSACTION_COMPLETE,
2216 "binder: %d:%d BR_TRANSACTION_COMPLETE\n", 2191 "%d:%d BR_TRANSACTION_COMPLETE\n",
2217 proc->pid, thread->pid); 2192 proc->pid, thread->pid);
2218 2193
2219 list_del(&w->entry); 2194 list_del(&w->entry);
@@ -2260,13 +2235,13 @@ retry:
2260 2235
2261 binder_stat_br(proc, thread, cmd); 2236 binder_stat_br(proc, thread, cmd);
2262 binder_debug(BINDER_DEBUG_USER_REFS, 2237 binder_debug(BINDER_DEBUG_USER_REFS,
2263 "binder: %d:%d %s %d u%p c%p\n", 2238 "%d:%d %s %d u%p c%p\n",
2264 proc->pid, thread->pid, cmd_name, node->debug_id, node->ptr, node->cookie); 2239 proc->pid, thread->pid, cmd_name, node->debug_id, node->ptr, node->cookie);
2265 } else { 2240 } else {
2266 list_del_init(&w->entry); 2241 list_del_init(&w->entry);
2267 if (!weak && !strong) { 2242 if (!weak && !strong) {
2268 binder_debug(BINDER_DEBUG_INTERNAL_REFS, 2243 binder_debug(BINDER_DEBUG_INTERNAL_REFS,
2269 "binder: %d:%d node %d u%p c%p deleted\n", 2244 "%d:%d node %d u%p c%p deleted\n",
2270 proc->pid, thread->pid, node->debug_id, 2245 proc->pid, thread->pid, node->debug_id,
2271 node->ptr, node->cookie); 2246 node->ptr, node->cookie);
2272 rb_erase(&node->rb_node, &proc->nodes); 2247 rb_erase(&node->rb_node, &proc->nodes);
@@ -2274,7 +2249,7 @@ retry:
2274 binder_stats_deleted(BINDER_STAT_NODE); 2249 binder_stats_deleted(BINDER_STAT_NODE);
2275 } else { 2250 } else {
2276 binder_debug(BINDER_DEBUG_INTERNAL_REFS, 2251 binder_debug(BINDER_DEBUG_INTERNAL_REFS,
2277 "binder: %d:%d node %d u%p c%p state unchanged\n", 2252 "%d:%d node %d u%p c%p state unchanged\n",
2278 proc->pid, thread->pid, node->debug_id, node->ptr, 2253 proc->pid, thread->pid, node->debug_id, node->ptr,
2279 node->cookie); 2254 node->cookie);
2280 } 2255 }
@@ -2297,8 +2272,9 @@ retry:
2297 if (put_user(death->cookie, (void * __user *)ptr)) 2272 if (put_user(death->cookie, (void * __user *)ptr))
2298 return -EFAULT; 2273 return -EFAULT;
2299 ptr += sizeof(void *); 2274 ptr += sizeof(void *);
2275 binder_stat_br(proc, thread, cmd);
2300 binder_debug(BINDER_DEBUG_DEATH_NOTIFICATION, 2276 binder_debug(BINDER_DEBUG_DEATH_NOTIFICATION,
2301 "binder: %d:%d %s %p\n", 2277 "%d:%d %s %p\n",
2302 proc->pid, thread->pid, 2278 proc->pid, thread->pid,
2303 cmd == BR_DEAD_BINDER ? 2279 cmd == BR_DEAD_BINDER ?
2304 "BR_DEAD_BINDER" : 2280 "BR_DEAD_BINDER" :
@@ -2364,10 +2340,10 @@ retry:
2364 return -EFAULT; 2340 return -EFAULT;
2365 ptr += sizeof(tr); 2341 ptr += sizeof(tr);
2366 2342
2343 trace_binder_transaction_received(t);
2367 binder_stat_br(proc, thread, cmd); 2344 binder_stat_br(proc, thread, cmd);
2368 binder_debug(BINDER_DEBUG_TRANSACTION, 2345 binder_debug(BINDER_DEBUG_TRANSACTION,
2369 "binder: %d:%d %s %d %d:%d, cmd %d" 2346 "%d:%d %s %d %d:%d, cmd %d size %zd-%zd ptr %p-%p\n",
2370 "size %zd-%zd ptr %p-%p\n",
2371 proc->pid, thread->pid, 2347 proc->pid, thread->pid,
2372 (cmd == BR_TRANSACTION) ? "BR_TRANSACTION" : 2348 (cmd == BR_TRANSACTION) ? "BR_TRANSACTION" :
2373 "BR_REPLY", 2349 "BR_REPLY",
@@ -2400,10 +2376,11 @@ done:
2400 /*spawn a new thread if we leave this out */) { 2376 /*spawn a new thread if we leave this out */) {
2401 proc->requested_threads++; 2377 proc->requested_threads++;
2402 binder_debug(BINDER_DEBUG_THREADS, 2378 binder_debug(BINDER_DEBUG_THREADS,
2403 "binder: %d:%d BR_SPAWN_LOOPER\n", 2379 "%d:%d BR_SPAWN_LOOPER\n",
2404 proc->pid, thread->pid); 2380 proc->pid, thread->pid);
2405 if (put_user(BR_SPAWN_LOOPER, (uint32_t __user *)buffer)) 2381 if (put_user(BR_SPAWN_LOOPER, (uint32_t __user *)buffer))
2406 return -EFAULT; 2382 return -EFAULT;
2383 binder_stat_br(proc, thread, BR_SPAWN_LOOPER);
2407 } 2384 }
2408 return 0; 2385 return 0;
2409} 2386}
@@ -2424,7 +2401,7 @@ static void binder_release_work(struct list_head *list)
2424 binder_send_failed_reply(t, BR_DEAD_REPLY); 2401 binder_send_failed_reply(t, BR_DEAD_REPLY);
2425 } else { 2402 } else {
2426 binder_debug(BINDER_DEBUG_DEAD_TRANSACTION, 2403 binder_debug(BINDER_DEBUG_DEAD_TRANSACTION,
2427 "binder: undelivered transaction %d\n", 2404 "undelivered transaction %d\n",
2428 t->debug_id); 2405 t->debug_id);
2429 t->buffer->transaction = NULL; 2406 t->buffer->transaction = NULL;
2430 kfree(t); 2407 kfree(t);
@@ -2433,7 +2410,7 @@ static void binder_release_work(struct list_head *list)
2433 } break; 2410 } break;
2434 case BINDER_WORK_TRANSACTION_COMPLETE: { 2411 case BINDER_WORK_TRANSACTION_COMPLETE: {
2435 binder_debug(BINDER_DEBUG_DEAD_TRANSACTION, 2412 binder_debug(BINDER_DEBUG_DEAD_TRANSACTION,
2436 "binder: undelivered TRANSACTION_COMPLETE\n"); 2413 "undelivered TRANSACTION_COMPLETE\n");
2437 kfree(w); 2414 kfree(w);
2438 binder_stats_deleted(BINDER_STAT_TRANSACTION_COMPLETE); 2415 binder_stats_deleted(BINDER_STAT_TRANSACTION_COMPLETE);
2439 } break; 2416 } break;
@@ -2443,13 +2420,13 @@ static void binder_release_work(struct list_head *list)
2443 2420
2444 death = container_of(w, struct binder_ref_death, work); 2421 death = container_of(w, struct binder_ref_death, work);
2445 binder_debug(BINDER_DEBUG_DEAD_TRANSACTION, 2422 binder_debug(BINDER_DEBUG_DEAD_TRANSACTION,
2446 "binder: undelivered death notification, %p\n", 2423 "undelivered death notification, %p\n",
2447 death->cookie); 2424 death->cookie);
2448 kfree(death); 2425 kfree(death);
2449 binder_stats_deleted(BINDER_STAT_DEATH); 2426 binder_stats_deleted(BINDER_STAT_DEATH);
2450 } break; 2427 } break;
2451 default: 2428 default:
2452 pr_err("binder: unexpected work type, %d, not freed\n", 2429 pr_err("unexpected work type, %d, not freed\n",
2453 w->type); 2430 w->type);
2454 break; 2431 break;
2455 } 2432 }
@@ -2506,8 +2483,8 @@ static int binder_free_thread(struct binder_proc *proc,
2506 while (t) { 2483 while (t) {
2507 active_transactions++; 2484 active_transactions++;
2508 binder_debug(BINDER_DEBUG_DEAD_TRANSACTION, 2485 binder_debug(BINDER_DEBUG_DEAD_TRANSACTION,
2509 "binder: release %d:%d transaction %d " 2486 "release %d:%d transaction %d %s, still active\n",
2510 "%s, still active\n", proc->pid, thread->pid, 2487 proc->pid, thread->pid,
2511 t->debug_id, 2488 t->debug_id,
2512 (t->to_thread == thread) ? "in" : "out"); 2489 (t->to_thread == thread) ? "in" : "out");
2513 2490
@@ -2540,12 +2517,14 @@ static unsigned int binder_poll(struct file *filp,
2540 struct binder_thread *thread = NULL; 2517 struct binder_thread *thread = NULL;
2541 int wait_for_proc_work; 2518 int wait_for_proc_work;
2542 2519
2543 mutex_lock(&binder_lock); 2520 binder_lock(__func__);
2521
2544 thread = binder_get_thread(proc); 2522 thread = binder_get_thread(proc);
2545 2523
2546 wait_for_proc_work = thread->transaction_stack == NULL && 2524 wait_for_proc_work = thread->transaction_stack == NULL &&
2547 list_empty(&thread->todo) && thread->return_error == BR_OK; 2525 list_empty(&thread->todo) && thread->return_error == BR_OK;
2548 mutex_unlock(&binder_lock); 2526
2527 binder_unlock(__func__);
2549 2528
2550 if (wait_for_proc_work) { 2529 if (wait_for_proc_work) {
2551 if (binder_has_proc_work(proc, thread)) 2530 if (binder_has_proc_work(proc, thread))
@@ -2573,11 +2552,13 @@ static long binder_ioctl(struct file *filp, unsigned int cmd, unsigned long arg)
2573 2552
2574 /*pr_info("binder_ioctl: %d:%d %x %lx\n", proc->pid, current->pid, cmd, arg);*/ 2553 /*pr_info("binder_ioctl: %d:%d %x %lx\n", proc->pid, current->pid, cmd, arg);*/
2575 2554
2555 trace_binder_ioctl(cmd, arg);
2556
2576 ret = wait_event_interruptible(binder_user_error_wait, binder_stop_on_user_error < 2); 2557 ret = wait_event_interruptible(binder_user_error_wait, binder_stop_on_user_error < 2);
2577 if (ret) 2558 if (ret)
2578 return ret; 2559 goto err_unlocked;
2579 2560
2580 mutex_lock(&binder_lock); 2561 binder_lock(__func__);
2581 thread = binder_get_thread(proc); 2562 thread = binder_get_thread(proc);
2582 if (thread == NULL) { 2563 if (thread == NULL) {
2583 ret = -ENOMEM; 2564 ret = -ENOMEM;
@@ -2596,12 +2577,13 @@ static long binder_ioctl(struct file *filp, unsigned int cmd, unsigned long arg)
2596 goto err; 2577 goto err;
2597 } 2578 }
2598 binder_debug(BINDER_DEBUG_READ_WRITE, 2579 binder_debug(BINDER_DEBUG_READ_WRITE,
2599 "binder: %d:%d write %ld at %08lx, read %ld at %08lx\n", 2580 "%d:%d write %ld at %08lx, read %ld at %08lx\n",
2600 proc->pid, thread->pid, bwr.write_size, bwr.write_buffer, 2581 proc->pid, thread->pid, bwr.write_size,
2601 bwr.read_size, bwr.read_buffer); 2582 bwr.write_buffer, bwr.read_size, bwr.read_buffer);
2602 2583
2603 if (bwr.write_size > 0) { 2584 if (bwr.write_size > 0) {
2604 ret = binder_thread_write(proc, thread, (void __user *)bwr.write_buffer, bwr.write_size, &bwr.write_consumed); 2585 ret = binder_thread_write(proc, thread, (void __user *)bwr.write_buffer, bwr.write_size, &bwr.write_consumed);
2586 trace_binder_write_done(ret);
2605 if (ret < 0) { 2587 if (ret < 0) {
2606 bwr.read_consumed = 0; 2588 bwr.read_consumed = 0;
2607 if (copy_to_user(ubuf, &bwr, sizeof(bwr))) 2589 if (copy_to_user(ubuf, &bwr, sizeof(bwr)))
@@ -2611,6 +2593,7 @@ static long binder_ioctl(struct file *filp, unsigned int cmd, unsigned long arg)
2611 } 2593 }
2612 if (bwr.read_size > 0) { 2594 if (bwr.read_size > 0) {
2613 ret = binder_thread_read(proc, thread, (void __user *)bwr.read_buffer, bwr.read_size, &bwr.read_consumed, filp->f_flags & O_NONBLOCK); 2595 ret = binder_thread_read(proc, thread, (void __user *)bwr.read_buffer, bwr.read_size, &bwr.read_consumed, filp->f_flags & O_NONBLOCK);
2596 trace_binder_read_done(ret);
2614 if (!list_empty(&proc->todo)) 2597 if (!list_empty(&proc->todo))
2615 wake_up_interruptible(&proc->wait); 2598 wake_up_interruptible(&proc->wait);
2616 if (ret < 0) { 2599 if (ret < 0) {
@@ -2620,7 +2603,7 @@ static long binder_ioctl(struct file *filp, unsigned int cmd, unsigned long arg)
2620 } 2603 }
2621 } 2604 }
2622 binder_debug(BINDER_DEBUG_READ_WRITE, 2605 binder_debug(BINDER_DEBUG_READ_WRITE,
2623 "binder: %d:%d wrote %ld of %ld, read return %ld of %ld\n", 2606 "%d:%d wrote %ld of %ld, read return %ld of %ld\n",
2624 proc->pid, thread->pid, bwr.write_consumed, bwr.write_size, 2607 proc->pid, thread->pid, bwr.write_consumed, bwr.write_size,
2625 bwr.read_consumed, bwr.read_size); 2608 bwr.read_consumed, bwr.read_size);
2626 if (copy_to_user(ubuf, &bwr, sizeof(bwr))) { 2609 if (copy_to_user(ubuf, &bwr, sizeof(bwr))) {
@@ -2637,14 +2620,13 @@ static long binder_ioctl(struct file *filp, unsigned int cmd, unsigned long arg)
2637 break; 2620 break;
2638 case BINDER_SET_CONTEXT_MGR: 2621 case BINDER_SET_CONTEXT_MGR:
2639 if (binder_context_mgr_node != NULL) { 2622 if (binder_context_mgr_node != NULL) {
2640 pr_err("binder: BINDER_SET_CONTEXT_MGR already set\n"); 2623 pr_err("BINDER_SET_CONTEXT_MGR already set\n");
2641 ret = -EBUSY; 2624 ret = -EBUSY;
2642 goto err; 2625 goto err;
2643 } 2626 }
2644 if (uid_valid(binder_context_mgr_uid)) { 2627 if (uid_valid(binder_context_mgr_uid)) {
2645 if (!uid_eq(binder_context_mgr_uid, current->cred->euid)) { 2628 if (!uid_eq(binder_context_mgr_uid, current->cred->euid)) {
2646 pr_err("binder: BINDER_SET_" 2629 pr_err("BINDER_SET_CONTEXT_MGR bad uid %d != %d\n",
2647 "CONTEXT_MGR bad uid %d != %d\n",
2648 from_kuid(&init_user_ns, current->cred->euid), 2630 from_kuid(&init_user_ns, current->cred->euid),
2649 from_kuid(&init_user_ns, binder_context_mgr_uid)); 2631 from_kuid(&init_user_ns, binder_context_mgr_uid));
2650 ret = -EPERM; 2632 ret = -EPERM;
@@ -2663,7 +2645,7 @@ static long binder_ioctl(struct file *filp, unsigned int cmd, unsigned long arg)
2663 binder_context_mgr_node->has_weak_ref = 1; 2645 binder_context_mgr_node->has_weak_ref = 1;
2664 break; 2646 break;
2665 case BINDER_THREAD_EXIT: 2647 case BINDER_THREAD_EXIT:
2666 binder_debug(BINDER_DEBUG_THREADS, "binder: %d:%d exit\n", 2648 binder_debug(BINDER_DEBUG_THREADS, "%d:%d exit\n",
2667 proc->pid, thread->pid); 2649 proc->pid, thread->pid);
2668 binder_free_thread(proc, thread); 2650 binder_free_thread(proc, thread);
2669 thread = NULL; 2651 thread = NULL;
@@ -2686,10 +2668,12 @@ static long binder_ioctl(struct file *filp, unsigned int cmd, unsigned long arg)
2686err: 2668err:
2687 if (thread) 2669 if (thread)
2688 thread->looper &= ~BINDER_LOOPER_STATE_NEED_RETURN; 2670 thread->looper &= ~BINDER_LOOPER_STATE_NEED_RETURN;
2689 mutex_unlock(&binder_lock); 2671 binder_unlock(__func__);
2690 wait_event_interruptible(binder_user_error_wait, binder_stop_on_user_error < 2); 2672 wait_event_interruptible(binder_user_error_wait, binder_stop_on_user_error < 2);
2691 if (ret && ret != -ERESTARTSYS) 2673 if (ret && ret != -ERESTARTSYS)
2692 pr_info("binder: %d:%d ioctl %x %lx returned %d\n", proc->pid, current->pid, cmd, arg, ret); 2674 pr_info("%d:%d ioctl %x %lx returned %d\n", proc->pid, current->pid, cmd, arg, ret);
2675err_unlocked:
2676 trace_binder_ioctl_done(ret);
2693 return ret; 2677 return ret;
2694} 2678}
2695 2679
@@ -2697,7 +2681,7 @@ static void binder_vma_open(struct vm_area_struct *vma)
2697{ 2681{
2698 struct binder_proc *proc = vma->vm_private_data; 2682 struct binder_proc *proc = vma->vm_private_data;
2699 binder_debug(BINDER_DEBUG_OPEN_CLOSE, 2683 binder_debug(BINDER_DEBUG_OPEN_CLOSE,
2700 "binder: %d open vm area %lx-%lx (%ld K) vma %lx pagep %lx\n", 2684 "%d open vm area %lx-%lx (%ld K) vma %lx pagep %lx\n",
2701 proc->pid, vma->vm_start, vma->vm_end, 2685 proc->pid, vma->vm_start, vma->vm_end,
2702 (vma->vm_end - vma->vm_start) / SZ_1K, vma->vm_flags, 2686 (vma->vm_end - vma->vm_start) / SZ_1K, vma->vm_flags,
2703 (unsigned long)pgprot_val(vma->vm_page_prot)); 2687 (unsigned long)pgprot_val(vma->vm_page_prot));
@@ -2707,7 +2691,7 @@ static void binder_vma_close(struct vm_area_struct *vma)
2707{ 2691{
2708 struct binder_proc *proc = vma->vm_private_data; 2692 struct binder_proc *proc = vma->vm_private_data;
2709 binder_debug(BINDER_DEBUG_OPEN_CLOSE, 2693 binder_debug(BINDER_DEBUG_OPEN_CLOSE,
2710 "binder: %d close vm area %lx-%lx (%ld K) vma %lx pagep %lx\n", 2694 "%d close vm area %lx-%lx (%ld K) vma %lx pagep %lx\n",
2711 proc->pid, vma->vm_start, vma->vm_end, 2695 proc->pid, vma->vm_start, vma->vm_end,
2712 (vma->vm_end - vma->vm_start) / SZ_1K, vma->vm_flags, 2696 (vma->vm_end - vma->vm_start) / SZ_1K, vma->vm_flags,
2713 (unsigned long)pgprot_val(vma->vm_page_prot)); 2697 (unsigned long)pgprot_val(vma->vm_page_prot));
@@ -2835,13 +2819,16 @@ static int binder_open(struct inode *nodp, struct file *filp)
2835 INIT_LIST_HEAD(&proc->todo); 2819 INIT_LIST_HEAD(&proc->todo);
2836 init_waitqueue_head(&proc->wait); 2820 init_waitqueue_head(&proc->wait);
2837 proc->default_priority = task_nice(current); 2821 proc->default_priority = task_nice(current);
2838 mutex_lock(&binder_lock); 2822
2823 binder_lock(__func__);
2824
2839 binder_stats_created(BINDER_STAT_PROC); 2825 binder_stats_created(BINDER_STAT_PROC);
2840 hlist_add_head(&proc->proc_node, &binder_procs); 2826 hlist_add_head(&proc->proc_node, &binder_procs);
2841 proc->pid = current->group_leader->pid; 2827 proc->pid = current->group_leader->pid;
2842 INIT_LIST_HEAD(&proc->delivered_death); 2828 INIT_LIST_HEAD(&proc->delivered_death);
2843 filp->private_data = proc; 2829 filp->private_data = proc;
2844 mutex_unlock(&binder_lock); 2830
2831 binder_unlock(__func__);
2845 2832
2846 if (binder_debugfs_dir_entry_proc) { 2833 if (binder_debugfs_dir_entry_proc) {
2847 char strbuf[11]; 2834 char strbuf[11];
@@ -2949,9 +2936,8 @@ static void binder_deferred_release(struct binder_proc *proc)
2949 } 2936 }
2950 } 2937 }
2951 binder_debug(BINDER_DEBUG_DEAD_BINDER, 2938 binder_debug(BINDER_DEBUG_DEAD_BINDER,
2952 "binder: node %d now dead, " 2939 "node %d now dead, refs %d, death %d\n",
2953 "refs %d, death %d\n", node->debug_id, 2940 node->debug_id, incoming_refs, death);
2954 incoming_refs, death);
2955 } 2941 }
2956 } 2942 }
2957 outgoing_refs = 0; 2943 outgoing_refs = 0;
@@ -2972,8 +2958,7 @@ static void binder_deferred_release(struct binder_proc *proc)
2972 if (t) { 2958 if (t) {
2973 t->buffer = NULL; 2959 t->buffer = NULL;
2974 buffer->transaction = NULL; 2960 buffer->transaction = NULL;
2975 pr_err("binder: release proc %d, " 2961 pr_err("release proc %d, transaction %d, not freed\n",
2976 "transaction %d, not freed\n",
2977 proc->pid, t->debug_id); 2962 proc->pid, t->debug_id);
2978 /*BUG();*/ 2963 /*BUG();*/
2979 } 2964 }
@@ -2990,8 +2975,7 @@ static void binder_deferred_release(struct binder_proc *proc)
2990 if (proc->pages[i]) { 2975 if (proc->pages[i]) {
2991 void *page_addr = proc->buffer + i * PAGE_SIZE; 2976 void *page_addr = proc->buffer + i * PAGE_SIZE;
2992 binder_debug(BINDER_DEBUG_BUFFER_ALLOC, 2977 binder_debug(BINDER_DEBUG_BUFFER_ALLOC,
2993 "binder_release: %d: " 2978 "binder_release: %d: page %d at %p not freed\n",
2994 "page %d at %p not freed\n",
2995 proc->pid, i, 2979 proc->pid, i,
2996 page_addr); 2980 page_addr);
2997 unmap_kernel_range((unsigned long)page_addr, 2981 unmap_kernel_range((unsigned long)page_addr,
@@ -3007,9 +2991,7 @@ static void binder_deferred_release(struct binder_proc *proc)
3007 put_task_struct(proc->tsk); 2991 put_task_struct(proc->tsk);
3008 2992
3009 binder_debug(BINDER_DEBUG_OPEN_CLOSE, 2993 binder_debug(BINDER_DEBUG_OPEN_CLOSE,
3010 "binder_release: %d threads %d, nodes %d (ref %d), " 2994 "binder_release: %d threads %d, nodes %d (ref %d), refs %d, active transactions %d, buffers %d, pages %d\n",
3011 "refs %d, active transactions %d, buffers %d, "
3012 "pages %d\n",
3013 proc->pid, threads, nodes, incoming_refs, outgoing_refs, 2995 proc->pid, threads, nodes, incoming_refs, outgoing_refs,
3014 active_transactions, buffers, page_count); 2996 active_transactions, buffers, page_count);
3015 2997
@@ -3023,7 +3005,7 @@ static void binder_deferred_func(struct work_struct *work)
3023 3005
3024 int defer; 3006 int defer;
3025 do { 3007 do {
3026 mutex_lock(&binder_lock); 3008 binder_lock(__func__);
3027 mutex_lock(&binder_deferred_lock); 3009 mutex_lock(&binder_deferred_lock);
3028 if (!hlist_empty(&binder_deferred_list)) { 3010 if (!hlist_empty(&binder_deferred_list)) {
3029 proc = hlist_entry(binder_deferred_list.first, 3011 proc = hlist_entry(binder_deferred_list.first,
@@ -3050,7 +3032,7 @@ static void binder_deferred_func(struct work_struct *work)
3050 if (defer & BINDER_DEFERRED_RELEASE) 3032 if (defer & BINDER_DEFERRED_RELEASE)
3051 binder_deferred_release(proc); /* frees proc */ 3033 binder_deferred_release(proc); /* frees proc */
3052 3034
3053 mutex_unlock(&binder_lock); 3035 binder_unlock(__func__);
3054 if (files) 3036 if (files)
3055 put_files_struct(files); 3037 put_files_struct(files);
3056 } while (proc); 3038 } while (proc);
@@ -3391,7 +3373,7 @@ static int binder_state_show(struct seq_file *m, void *unused)
3391 int do_lock = !binder_debug_no_lock; 3373 int do_lock = !binder_debug_no_lock;
3392 3374
3393 if (do_lock) 3375 if (do_lock)
3394 mutex_lock(&binder_lock); 3376 binder_lock(__func__);
3395 3377
3396 seq_puts(m, "binder state:\n"); 3378 seq_puts(m, "binder state:\n");
3397 3379
@@ -3403,7 +3385,7 @@ static int binder_state_show(struct seq_file *m, void *unused)
3403 hlist_for_each_entry(proc, pos, &binder_procs, proc_node) 3385 hlist_for_each_entry(proc, pos, &binder_procs, proc_node)
3404 print_binder_proc(m, proc, 1); 3386 print_binder_proc(m, proc, 1);
3405 if (do_lock) 3387 if (do_lock)
3406 mutex_unlock(&binder_lock); 3388 binder_unlock(__func__);
3407 return 0; 3389 return 0;
3408} 3390}
3409 3391
@@ -3414,7 +3396,7 @@ static int binder_stats_show(struct seq_file *m, void *unused)
3414 int do_lock = !binder_debug_no_lock; 3396 int do_lock = !binder_debug_no_lock;
3415 3397
3416 if (do_lock) 3398 if (do_lock)
3417 mutex_lock(&binder_lock); 3399 binder_lock(__func__);
3418 3400
3419 seq_puts(m, "binder stats:\n"); 3401 seq_puts(m, "binder stats:\n");
3420 3402
@@ -3423,7 +3405,7 @@ static int binder_stats_show(struct seq_file *m, void *unused)
3423 hlist_for_each_entry(proc, pos, &binder_procs, proc_node) 3405 hlist_for_each_entry(proc, pos, &binder_procs, proc_node)
3424 print_binder_proc_stats(m, proc); 3406 print_binder_proc_stats(m, proc);
3425 if (do_lock) 3407 if (do_lock)
3426 mutex_unlock(&binder_lock); 3408 binder_unlock(__func__);
3427 return 0; 3409 return 0;
3428} 3410}
3429 3411
@@ -3434,13 +3416,13 @@ static int binder_transactions_show(struct seq_file *m, void *unused)
3434 int do_lock = !binder_debug_no_lock; 3416 int do_lock = !binder_debug_no_lock;
3435 3417
3436 if (do_lock) 3418 if (do_lock)
3437 mutex_lock(&binder_lock); 3419 binder_lock(__func__);
3438 3420
3439 seq_puts(m, "binder transactions:\n"); 3421 seq_puts(m, "binder transactions:\n");
3440 hlist_for_each_entry(proc, pos, &binder_procs, proc_node) 3422 hlist_for_each_entry(proc, pos, &binder_procs, proc_node)
3441 print_binder_proc(m, proc, 0); 3423 print_binder_proc(m, proc, 0);
3442 if (do_lock) 3424 if (do_lock)
3443 mutex_unlock(&binder_lock); 3425 binder_unlock(__func__);
3444 return 0; 3426 return 0;
3445} 3427}
3446 3428
@@ -3450,11 +3432,11 @@ static int binder_proc_show(struct seq_file *m, void *unused)
3450 int do_lock = !binder_debug_no_lock; 3432 int do_lock = !binder_debug_no_lock;
3451 3433
3452 if (do_lock) 3434 if (do_lock)
3453 mutex_lock(&binder_lock); 3435 binder_lock(__func__);
3454 seq_puts(m, "binder proc state:\n"); 3436 seq_puts(m, "binder proc state:\n");
3455 print_binder_proc(m, proc, 1); 3437 print_binder_proc(m, proc, 1);
3456 if (do_lock) 3438 if (do_lock)
3457 mutex_unlock(&binder_lock); 3439 binder_unlock(__func__);
3458 return 0; 3440 return 0;
3459} 3441}
3460 3442
@@ -3549,4 +3531,7 @@ static int __init binder_init(void)
3549 3531
3550device_initcall(binder_init); 3532device_initcall(binder_init);
3551 3533
3534#define CREATE_TRACE_POINTS
3535#include "binder_trace.h"
3536
3552MODULE_LICENSE("GPL v2"); 3537MODULE_LICENSE("GPL v2");
diff --git a/drivers/staging/android/binder_trace.h b/drivers/staging/android/binder_trace.h
new file mode 100644
index 000000000000..82a567c2af67
--- /dev/null
+++ b/drivers/staging/android/binder_trace.h
@@ -0,0 +1,327 @@
1/*
2 * Copyright (C) 2012 Google, Inc.
3 *
4 * This software is licensed under the terms of the GNU General Public
5 * License version 2, as published by the Free Software Foundation, and
6 * may be copied, distributed, and modified under those terms.
7 *
8 * This program is distributed in the hope that it will be useful,
9 * but WITHOUT ANY WARRANTY; without even the implied warranty of
10 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
11 * GNU General Public License for more details.
12 *
13 */
14
15#undef TRACE_SYSTEM
16#define TRACE_SYSTEM binder
17
18#if !defined(_BINDER_TRACE_H) || defined(TRACE_HEADER_MULTI_READ)
19#define _BINDER_TRACE_H
20
21#include <linux/tracepoint.h>
22
23struct binder_buffer;
24struct binder_node;
25struct binder_proc;
26struct binder_ref;
27struct binder_thread;
28struct binder_transaction;
29
30TRACE_EVENT(binder_ioctl,
31 TP_PROTO(unsigned int cmd, unsigned long arg),
32 TP_ARGS(cmd, arg),
33
34 TP_STRUCT__entry(
35 __field(unsigned int, cmd)
36 __field(unsigned long, arg)
37 ),
38 TP_fast_assign(
39 __entry->cmd = cmd;
40 __entry->arg = arg;
41 ),
42 TP_printk("cmd=0x%x arg=0x%lx", __entry->cmd, __entry->arg)
43);
44
45DECLARE_EVENT_CLASS(binder_lock_class,
46 TP_PROTO(const char *tag),
47 TP_ARGS(tag),
48 TP_STRUCT__entry(
49 __field(const char *, tag)
50 ),
51 TP_fast_assign(
52 __entry->tag = tag;
53 ),
54 TP_printk("tag=%s", __entry->tag)
55);
56
57#define DEFINE_BINDER_LOCK_EVENT(name) \
58DEFINE_EVENT(binder_lock_class, name, \
59 TP_PROTO(const char *func), \
60 TP_ARGS(func))
61
62DEFINE_BINDER_LOCK_EVENT(binder_lock);
63DEFINE_BINDER_LOCK_EVENT(binder_locked);
64DEFINE_BINDER_LOCK_EVENT(binder_unlock);
65
66DECLARE_EVENT_CLASS(binder_function_return_class,
67 TP_PROTO(int ret),
68 TP_ARGS(ret),
69 TP_STRUCT__entry(
70 __field(int, ret)
71 ),
72 TP_fast_assign(
73 __entry->ret = ret;
74 ),
75 TP_printk("ret=%d", __entry->ret)
76);
77
78#define DEFINE_BINDER_FUNCTION_RETURN_EVENT(name) \
79DEFINE_EVENT(binder_function_return_class, name, \
80 TP_PROTO(int ret), \
81 TP_ARGS(ret))
82
83DEFINE_BINDER_FUNCTION_RETURN_EVENT(binder_ioctl_done);
84DEFINE_BINDER_FUNCTION_RETURN_EVENT(binder_write_done);
85DEFINE_BINDER_FUNCTION_RETURN_EVENT(binder_read_done);
86
87TRACE_EVENT(binder_wait_for_work,
88 TP_PROTO(bool proc_work, bool transaction_stack, bool thread_todo),
89 TP_ARGS(proc_work, transaction_stack, thread_todo),
90
91 TP_STRUCT__entry(
92 __field(bool, proc_work)
93 __field(bool, transaction_stack)
94 __field(bool, thread_todo)
95 ),
96 TP_fast_assign(
97 __entry->proc_work = proc_work;
98 __entry->transaction_stack = transaction_stack;
99 __entry->thread_todo = thread_todo;
100 ),
101 TP_printk("proc_work=%d transaction_stack=%d thread_todo=%d",
102 __entry->proc_work, __entry->transaction_stack,
103 __entry->thread_todo)
104);
105
106TRACE_EVENT(binder_transaction,
107 TP_PROTO(bool reply, struct binder_transaction *t,
108 struct binder_node *target_node),
109 TP_ARGS(reply, t, target_node),
110 TP_STRUCT__entry(
111 __field(int, debug_id)
112 __field(int, target_node)
113 __field(int, to_proc)
114 __field(int, to_thread)
115 __field(int, reply)
116 __field(unsigned int, code)
117 __field(unsigned int, flags)
118 ),
119 TP_fast_assign(
120 __entry->debug_id = t->debug_id;
121 __entry->target_node = target_node ? target_node->debug_id : 0;
122 __entry->to_proc = t->to_proc->pid;
123 __entry->to_thread = t->to_thread ? t->to_thread->pid : 0;
124 __entry->reply = reply;
125 __entry->code = t->code;
126 __entry->flags = t->flags;
127 ),
128 TP_printk("transaction=%d dest_node=%d dest_proc=%d dest_thread=%d reply=%d flags=0x%x code=0x%x",
129 __entry->debug_id, __entry->target_node,
130 __entry->to_proc, __entry->to_thread,
131 __entry->reply, __entry->flags, __entry->code)
132);
133
134TRACE_EVENT(binder_transaction_received,
135 TP_PROTO(struct binder_transaction *t),
136 TP_ARGS(t),
137
138 TP_STRUCT__entry(
139 __field(int, debug_id)
140 ),
141 TP_fast_assign(
142 __entry->debug_id = t->debug_id;
143 ),
144 TP_printk("transaction=%d", __entry->debug_id)
145);
146
147TRACE_EVENT(binder_transaction_node_to_ref,
148 TP_PROTO(struct binder_transaction *t, struct binder_node *node,
149 struct binder_ref *ref),
150 TP_ARGS(t, node, ref),
151
152 TP_STRUCT__entry(
153 __field(int, debug_id)
154 __field(int, node_debug_id)
155 __field(void __user *, node_ptr)
156 __field(int, ref_debug_id)
157 __field(uint32_t, ref_desc)
158 ),
159 TP_fast_assign(
160 __entry->debug_id = t->debug_id;
161 __entry->node_debug_id = node->debug_id;
162 __entry->node_ptr = node->ptr;
163 __entry->ref_debug_id = ref->debug_id;
164 __entry->ref_desc = ref->desc;
165 ),
166 TP_printk("transaction=%d node=%d src_ptr=0x%p ==> dest_ref=%d dest_desc=%d",
167 __entry->debug_id, __entry->node_debug_id, __entry->node_ptr,
168 __entry->ref_debug_id, __entry->ref_desc)
169);
170
171TRACE_EVENT(binder_transaction_ref_to_node,
172 TP_PROTO(struct binder_transaction *t, struct binder_ref *ref),
173 TP_ARGS(t, ref),
174
175 TP_STRUCT__entry(
176 __field(int, debug_id)
177 __field(int, ref_debug_id)
178 __field(uint32_t, ref_desc)
179 __field(int, node_debug_id)
180 __field(void __user *, node_ptr)
181 ),
182 TP_fast_assign(
183 __entry->debug_id = t->debug_id;
184 __entry->ref_debug_id = ref->debug_id;
185 __entry->ref_desc = ref->desc;
186 __entry->node_debug_id = ref->node->debug_id;
187 __entry->node_ptr = ref->node->ptr;
188 ),
189 TP_printk("transaction=%d node=%d src_ref=%d src_desc=%d ==> dest_ptr=0x%p",
190 __entry->debug_id, __entry->node_debug_id,
191 __entry->ref_debug_id, __entry->ref_desc, __entry->node_ptr)
192);
193
194TRACE_EVENT(binder_transaction_ref_to_ref,
195 TP_PROTO(struct binder_transaction *t, struct binder_ref *src_ref,
196 struct binder_ref *dest_ref),
197 TP_ARGS(t, src_ref, dest_ref),
198
199 TP_STRUCT__entry(
200 __field(int, debug_id)
201 __field(int, node_debug_id)
202 __field(int, src_ref_debug_id)
203 __field(uint32_t, src_ref_desc)
204 __field(int, dest_ref_debug_id)
205 __field(uint32_t, dest_ref_desc)
206 ),
207 TP_fast_assign(
208 __entry->debug_id = t->debug_id;
209 __entry->node_debug_id = src_ref->node->debug_id;
210 __entry->src_ref_debug_id = src_ref->debug_id;
211 __entry->src_ref_desc = src_ref->desc;
212 __entry->dest_ref_debug_id = dest_ref->debug_id;
213 __entry->dest_ref_desc = dest_ref->desc;
214 ),
215 TP_printk("transaction=%d node=%d src_ref=%d src_desc=%d ==> dest_ref=%d dest_desc=%d",
216 __entry->debug_id, __entry->node_debug_id,
217 __entry->src_ref_debug_id, __entry->src_ref_desc,
218 __entry->dest_ref_debug_id, __entry->dest_ref_desc)
219);
220
221TRACE_EVENT(binder_transaction_fd,
222 TP_PROTO(struct binder_transaction *t, int src_fd, int dest_fd),
223 TP_ARGS(t, src_fd, dest_fd),
224
225 TP_STRUCT__entry(
226 __field(int, debug_id)
227 __field(int, src_fd)
228 __field(int, dest_fd)
229 ),
230 TP_fast_assign(
231 __entry->debug_id = t->debug_id;
232 __entry->src_fd = src_fd;
233 __entry->dest_fd = dest_fd;
234 ),
235 TP_printk("transaction=%d src_fd=%d ==> dest_fd=%d",
236 __entry->debug_id, __entry->src_fd, __entry->dest_fd)
237);
238
239DECLARE_EVENT_CLASS(binder_buffer_class,
240 TP_PROTO(struct binder_buffer *buf),
241 TP_ARGS(buf),
242 TP_STRUCT__entry(
243 __field(int, debug_id)
244 __field(size_t, data_size)
245 __field(size_t, offsets_size)
246 ),
247 TP_fast_assign(
248 __entry->debug_id = buf->debug_id;
249 __entry->data_size = buf->data_size;
250 __entry->offsets_size = buf->offsets_size;
251 ),
252 TP_printk("transaction=%d data_size=%zd offsets_size=%zd",
253 __entry->debug_id, __entry->data_size, __entry->offsets_size)
254);
255
256DEFINE_EVENT(binder_buffer_class, binder_transaction_alloc_buf,
257 TP_PROTO(struct binder_buffer *buffer),
258 TP_ARGS(buffer));
259
260DEFINE_EVENT(binder_buffer_class, binder_transaction_buffer_release,
261 TP_PROTO(struct binder_buffer *buffer),
262 TP_ARGS(buffer));
263
264DEFINE_EVENT(binder_buffer_class, binder_transaction_failed_buffer_release,
265 TP_PROTO(struct binder_buffer *buffer),
266 TP_ARGS(buffer));
267
268TRACE_EVENT(binder_update_page_range,
269 TP_PROTO(struct binder_proc *proc, bool allocate,
270 void *start, void *end),
271 TP_ARGS(proc, allocate, start, end),
272 TP_STRUCT__entry(
273 __field(int, proc)
274 __field(bool, allocate)
275 __field(size_t, offset)
276 __field(size_t, size)
277 ),
278 TP_fast_assign(
279 __entry->proc = proc->pid;
280 __entry->allocate = allocate;
281 __entry->offset = start - proc->buffer;
282 __entry->size = end - start;
283 ),
284 TP_printk("proc=%d allocate=%d offset=%zu size=%zu",
285 __entry->proc, __entry->allocate,
286 __entry->offset, __entry->size)
287);
288
289TRACE_EVENT(binder_command,
290 TP_PROTO(uint32_t cmd),
291 TP_ARGS(cmd),
292 TP_STRUCT__entry(
293 __field(uint32_t, cmd)
294 ),
295 TP_fast_assign(
296 __entry->cmd = cmd;
297 ),
298 TP_printk("cmd=0x%x %s",
299 __entry->cmd,
300 _IOC_NR(__entry->cmd) < ARRAY_SIZE(binder_command_strings) ?
301 binder_command_strings[_IOC_NR(__entry->cmd)] :
302 "unknown")
303);
304
305TRACE_EVENT(binder_return,
306 TP_PROTO(uint32_t cmd),
307 TP_ARGS(cmd),
308 TP_STRUCT__entry(
309 __field(uint32_t, cmd)
310 ),
311 TP_fast_assign(
312 __entry->cmd = cmd;
313 ),
314 TP_printk("cmd=0x%x %s",
315 __entry->cmd,
316 _IOC_NR(__entry->cmd) < ARRAY_SIZE(binder_return_strings) ?
317 binder_return_strings[_IOC_NR(__entry->cmd)] :
318 "unknown")
319);
320
321#endif /* _BINDER_TRACE_H */
322
323#undef TRACE_INCLUDE_PATH
324#undef TRACE_INCLUDE_FILE
325#define TRACE_INCLUDE_PATH .
326#define TRACE_INCLUDE_FILE binder_trace
327#include <trace/define_trace.h>
diff --git a/drivers/staging/android/logger.c b/drivers/staging/android/logger.c
index 1d5ed475364b..dbc63cbb4d3a 100644
--- a/drivers/staging/android/logger.c
+++ b/drivers/staging/android/logger.c
@@ -676,4 +676,25 @@ static int __init logger_init(void)
676out: 676out:
677 return ret; 677 return ret;
678} 678}
679
680static void __exit logger_exit(void)
681{
682 struct logger_log *current_log, *next_log;
683
684 list_for_each_entry_safe(current_log, next_log, &log_list, logs) {
685 /* we have to delete all the entry inside log_list */
686 misc_deregister(&current_log->misc);
687 vfree(current_log->buffer);
688 kfree(current_log->misc.name);
689 list_del(&current_log->logs);
690 kfree(current_log);
691 }
692}
693
694
679device_initcall(logger_init); 695device_initcall(logger_init);
696module_exit(logger_exit);
697
698MODULE_LICENSE("GPL");
699MODULE_AUTHOR("Robert Love, <rlove@google.com>");
700MODULE_DESCRIPTION("Android Logger");
diff --git a/drivers/staging/bcm/Adapter.h b/drivers/staging/bcm/Adapter.h
index 4d490a99110c..f57794827f73 100644
--- a/drivers/staging/bcm/Adapter.h
+++ b/drivers/staging/bcm/Adapter.h
@@ -151,7 +151,7 @@ struct bcm_packet_info {
151 UINT NumOfPacketsSent; 151 UINT NumOfPacketsSent;
152 UCHAR ucDirection; 152 UCHAR ucDirection;
153 USHORT usCID; 153 USHORT usCID;
154 S_MIBS_EXTSERVICEFLOW_PARAMETERS stMibsExtServiceFlowTable; 154 struct bcm_mibs_parameters stMibsExtServiceFlowTable;
155 UINT uiCurrentRxRate; 155 UINT uiCurrentRxRate;
156 UINT uiThisPeriodRxBytes; 156 UINT uiThisPeriodRxBytes;
157 UINT uiTotalRxBytes; 157 UINT uiTotalRxBytes;
@@ -198,7 +198,7 @@ struct bcm_tarang_data {
198 int AppCtrlQueueLen; 198 int AppCtrlQueueLen;
199 BOOLEAN MacTracingEnabled; 199 BOOLEAN MacTracingEnabled;
200 BOOLEAN bApplicationToExit; 200 BOOLEAN bApplicationToExit;
201 S_MIBS_DROPPED_APP_CNTRL_MESSAGES stDroppedAppCntrlMsgs; 201 struct bcm_mibs_dropped_cntrl_msg stDroppedAppCntrlMsgs;
202 ULONG RxCntrlMsgBitMask; 202 ULONG RxCntrlMsgBitMask;
203}; 203};
204 204
@@ -371,8 +371,8 @@ struct bcm_mini_adapter {
371 PFLASH2X_VENDORSPECIFIC_INFO psFlash2xVendorInfo; 371 PFLASH2X_VENDORSPECIFIC_INFO psFlash2xVendorInfo;
372 UINT uiFlashBaseAdd; /* Flash start address */ 372 UINT uiFlashBaseAdd; /* Flash start address */
373 UINT uiActiveISOOffset; /* Active ISO offset chosen before f/w download */ 373 UINT uiActiveISOOffset; /* Active ISO offset chosen before f/w download */
374 FLASH2X_SECTION_VAL eActiveISO; /* Active ISO section val */ 374 enum bcm_flash2x_section_val eActiveISO; /* Active ISO section val */
375 FLASH2X_SECTION_VAL eActiveDSD; /* Active DSD val chosen before f/w download */ 375 enum bcm_flash2x_section_val eActiveDSD; /* Active DSD val chosen before f/w download */
376 UINT uiActiveDSDOffsetAtFwDld; /* For accessing Active DSD chosen before f/w download */ 376 UINT uiActiveDSDOffsetAtFwDld; /* For accessing Active DSD chosen before f/w download */
377 UINT uiFlashLayoutMajorVersion; 377 UINT uiFlashLayoutMajorVersion;
378 UINT uiFlashLayoutMinorVersion; 378 UINT uiFlashLayoutMinorVersion;
diff --git a/drivers/staging/bcm/Bcmchar.c b/drivers/staging/bcm/Bcmchar.c
index 3d02c2ebfb8d..efad33e3ba73 100644
--- a/drivers/staging/bcm/Bcmchar.c
+++ b/drivers/staging/bcm/Bcmchar.c
@@ -160,7 +160,7 @@ static long bcm_char_ioctl(struct file *filp, UINT cmd, ULONG arg)
160 struct bcm_mini_adapter *Adapter = pTarang->Adapter; 160 struct bcm_mini_adapter *Adapter = pTarang->Adapter;
161 INT Status = STATUS_FAILURE; 161 INT Status = STATUS_FAILURE;
162 int timeout = 0; 162 int timeout = 0;
163 IOCTL_BUFFER IoBuffer; 163 struct bcm_ioctl_buffer IoBuffer;
164 int bytes; 164 int bytes;
165 165
166 BCM_DEBUG_PRINT(Adapter, DBG_TYPE_OTHERS, OSAL_DBG, DBG_LVL_ALL, "Parameters Passed to control IOCTL cmd=0x%X arg=0x%lX", cmd, arg); 166 BCM_DEBUG_PRINT(Adapter, DBG_TYPE_OTHERS, OSAL_DBG, DBG_LVL_ALL, "Parameters Passed to control IOCTL cmd=0x%X arg=0x%lX", cmd, arg);
@@ -203,13 +203,13 @@ static long bcm_char_ioctl(struct file *filp, UINT cmd, ULONG arg)
203 switch (cmd) { 203 switch (cmd) {
204 /* Rdms for Swin Idle... */ 204 /* Rdms for Swin Idle... */
205 case IOCTL_BCM_REGISTER_READ_PRIVATE: { 205 case IOCTL_BCM_REGISTER_READ_PRIVATE: {
206 RDM_BUFFER sRdmBuffer = {0}; 206 struct bcm_rdm_buffer sRdmBuffer = {0};
207 PCHAR temp_buff; 207 PCHAR temp_buff;
208 UINT Bufflen; 208 UINT Bufflen;
209 u16 temp_value; 209 u16 temp_value;
210 210
211 /* Copy Ioctl Buffer structure */ 211 /* Copy Ioctl Buffer structure */
212 if (copy_from_user(&IoBuffer, argp, sizeof(IOCTL_BUFFER))) 212 if (copy_from_user(&IoBuffer, argp, sizeof(struct bcm_ioctl_buffer)))
213 return -EFAULT; 213 return -EFAULT;
214 214
215 if (IoBuffer.InputLength > sizeof(sRdmBuffer)) 215 if (IoBuffer.InputLength > sizeof(sRdmBuffer))
@@ -248,11 +248,11 @@ static long bcm_char_ioctl(struct file *filp, UINT cmd, ULONG arg)
248 } 248 }
249 249
250 case IOCTL_BCM_REGISTER_WRITE_PRIVATE: { 250 case IOCTL_BCM_REGISTER_WRITE_PRIVATE: {
251 WRM_BUFFER sWrmBuffer = {0}; 251 struct bcm_wrm_buffer sWrmBuffer = {0};
252 UINT uiTempVar = 0; 252 UINT uiTempVar = 0;
253 /* Copy Ioctl Buffer structure */ 253 /* Copy Ioctl Buffer structure */
254 254
255 if (copy_from_user(&IoBuffer, argp, sizeof(IOCTL_BUFFER))) 255 if (copy_from_user(&IoBuffer, argp, sizeof(struct bcm_ioctl_buffer)))
256 return -EFAULT; 256 return -EFAULT;
257 257
258 if (IoBuffer.InputLength > sizeof(sWrmBuffer)) 258 if (IoBuffer.InputLength > sizeof(sWrmBuffer))
@@ -287,7 +287,7 @@ static long bcm_char_ioctl(struct file *filp, UINT cmd, ULONG arg)
287 287
288 case IOCTL_BCM_REGISTER_READ: 288 case IOCTL_BCM_REGISTER_READ:
289 case IOCTL_BCM_EEPROM_REGISTER_READ: { 289 case IOCTL_BCM_EEPROM_REGISTER_READ: {
290 RDM_BUFFER sRdmBuffer = {0}; 290 struct bcm_rdm_buffer sRdmBuffer = {0};
291 PCHAR temp_buff = NULL; 291 PCHAR temp_buff = NULL;
292 UINT uiTempVar = 0; 292 UINT uiTempVar = 0;
293 if ((Adapter->IdleMode == TRUE) || 293 if ((Adapter->IdleMode == TRUE) ||
@@ -299,7 +299,7 @@ static long bcm_char_ioctl(struct file *filp, UINT cmd, ULONG arg)
299 } 299 }
300 300
301 /* Copy Ioctl Buffer structure */ 301 /* Copy Ioctl Buffer structure */
302 if (copy_from_user(&IoBuffer, argp, sizeof(IOCTL_BUFFER))) 302 if (copy_from_user(&IoBuffer, argp, sizeof(struct bcm_ioctl_buffer)))
303 return -EFAULT; 303 return -EFAULT;
304 304
305 if (IoBuffer.InputLength > sizeof(sRdmBuffer)) 305 if (IoBuffer.InputLength > sizeof(sRdmBuffer))
@@ -345,8 +345,9 @@ static long bcm_char_ioctl(struct file *filp, UINT cmd, ULONG arg)
345 } 345 }
346 case IOCTL_BCM_REGISTER_WRITE: 346 case IOCTL_BCM_REGISTER_WRITE:
347 case IOCTL_BCM_EEPROM_REGISTER_WRITE: { 347 case IOCTL_BCM_EEPROM_REGISTER_WRITE: {
348 WRM_BUFFER sWrmBuffer = {0}; 348 struct bcm_wrm_buffer sWrmBuffer = {0};
349 UINT uiTempVar = 0; 349 UINT uiTempVar = 0;
350
350 if ((Adapter->IdleMode == TRUE) || 351 if ((Adapter->IdleMode == TRUE) ||
351 (Adapter->bShutStatus == TRUE) || 352 (Adapter->bShutStatus == TRUE) ||
352 (Adapter->bPreparingForLowPowerMode == TRUE)) { 353 (Adapter->bPreparingForLowPowerMode == TRUE)) {
@@ -356,7 +357,7 @@ static long bcm_char_ioctl(struct file *filp, UINT cmd, ULONG arg)
356 } 357 }
357 358
358 /* Copy Ioctl Buffer structure */ 359 /* Copy Ioctl Buffer structure */
359 if (copy_from_user(&IoBuffer, argp, sizeof(IOCTL_BUFFER))) 360 if (copy_from_user(&IoBuffer, argp, sizeof(struct bcm_ioctl_buffer)))
360 return -EFAULT; 361 return -EFAULT;
361 362
362 if (IoBuffer.InputLength > sizeof(sWrmBuffer)) 363 if (IoBuffer.InputLength > sizeof(sWrmBuffer))
@@ -401,8 +402,8 @@ static long bcm_char_ioctl(struct file *filp, UINT cmd, ULONG arg)
401 UINT value = 0; 402 UINT value = 0;
402 UINT uiBit = 0; 403 UINT uiBit = 0;
403 UINT uiOperation = 0; 404 UINT uiOperation = 0;
405 struct bcm_gpio_info gpio_info = {0};
404 406
405 GPIO_INFO gpio_info = {0};
406 if ((Adapter->IdleMode == TRUE) || 407 if ((Adapter->IdleMode == TRUE) ||
407 (Adapter->bShutStatus == TRUE) || 408 (Adapter->bShutStatus == TRUE) ||
408 (Adapter->bPreparingForLowPowerMode == TRUE)) { 409 (Adapter->bPreparingForLowPowerMode == TRUE)) {
@@ -411,7 +412,7 @@ static long bcm_char_ioctl(struct file *filp, UINT cmd, ULONG arg)
411 return -EACCES; 412 return -EACCES;
412 } 413 }
413 414
414 if (copy_from_user(&IoBuffer, argp, sizeof(IOCTL_BUFFER))) 415 if (copy_from_user(&IoBuffer, argp, sizeof(struct bcm_ioctl_buffer)))
415 return -EFAULT; 416 return -EFAULT;
416 417
417 if (IoBuffer.InputLength > sizeof(gpio_info)) 418 if (IoBuffer.InputLength > sizeof(gpio_info))
@@ -478,7 +479,7 @@ static long bcm_char_ioctl(struct file *filp, UINT cmd, ULONG arg)
478 break; 479 break;
479 480
480 case BCM_LED_THREAD_STATE_CHANGE_REQ: { 481 case BCM_LED_THREAD_STATE_CHANGE_REQ: {
481 USER_THREAD_REQ threadReq = {0}; 482 struct bcm_user_thread_req threadReq = {0};
482 BCM_DEBUG_PRINT(Adapter, DBG_TYPE_OTHERS, OSAL_DBG, DBG_LVL_ALL, "User made LED thread InActive"); 483 BCM_DEBUG_PRINT(Adapter, DBG_TYPE_OTHERS, OSAL_DBG, DBG_LVL_ALL, "User made LED thread InActive");
483 484
484 if ((Adapter->IdleMode == TRUE) || 485 if ((Adapter->IdleMode == TRUE) ||
@@ -490,7 +491,7 @@ static long bcm_char_ioctl(struct file *filp, UINT cmd, ULONG arg)
490 break; 491 break;
491 } 492 }
492 493
493 if (copy_from_user(&IoBuffer, argp, sizeof(IOCTL_BUFFER))) 494 if (copy_from_user(&IoBuffer, argp, sizeof(struct bcm_ioctl_buffer)))
494 return -EFAULT; 495 return -EFAULT;
495 496
496 if (IoBuffer.InputLength > sizeof(threadReq)) 497 if (IoBuffer.InputLength > sizeof(threadReq))
@@ -518,14 +519,14 @@ static long bcm_char_ioctl(struct file *filp, UINT cmd, ULONG arg)
518 case IOCTL_BCM_GPIO_STATUS_REQUEST: { 519 case IOCTL_BCM_GPIO_STATUS_REQUEST: {
519 ULONG uiBit = 0; 520 ULONG uiBit = 0;
520 UCHAR ucRead[4]; 521 UCHAR ucRead[4];
521 GPIO_INFO gpio_info = {0}; 522 struct bcm_gpio_info gpio_info = {0};
522 523
523 if ((Adapter->IdleMode == TRUE) || 524 if ((Adapter->IdleMode == TRUE) ||
524 (Adapter->bShutStatus == TRUE) || 525 (Adapter->bShutStatus == TRUE) ||
525 (Adapter->bPreparingForLowPowerMode == TRUE)) 526 (Adapter->bPreparingForLowPowerMode == TRUE))
526 return -EACCES; 527 return -EACCES;
527 528
528 if (copy_from_user(&IoBuffer, argp, sizeof(IOCTL_BUFFER))) 529 if (copy_from_user(&IoBuffer, argp, sizeof(struct bcm_ioctl_buffer)))
529 return -EFAULT; 530 return -EFAULT;
530 531
531 if (IoBuffer.InputLength > sizeof(gpio_info)) 532 if (IoBuffer.InputLength > sizeof(gpio_info))
@@ -552,17 +553,17 @@ static long bcm_char_ioctl(struct file *filp, UINT cmd, ULONG arg)
552 553
553 case IOCTL_BCM_GPIO_MULTI_REQUEST: { 554 case IOCTL_BCM_GPIO_MULTI_REQUEST: {
554 UCHAR ucResetValue[4]; 555 UCHAR ucResetValue[4];
555 GPIO_MULTI_INFO gpio_multi_info[MAX_IDX]; 556 struct bcm_gpio_multi_info gpio_multi_info[MAX_IDX];
556 PGPIO_MULTI_INFO pgpio_multi_info = (PGPIO_MULTI_INFO)gpio_multi_info; 557 struct bcm_gpio_multi_info *pgpio_multi_info = (struct bcm_gpio_multi_info *)gpio_multi_info;
557 558
558 memset(pgpio_multi_info, 0, MAX_IDX * sizeof(GPIO_MULTI_INFO)); 559 memset(pgpio_multi_info, 0, MAX_IDX * sizeof(struct bcm_gpio_multi_info));
559 560
560 if ((Adapter->IdleMode == TRUE) || 561 if ((Adapter->IdleMode == TRUE) ||
561 (Adapter->bShutStatus == TRUE) || 562 (Adapter->bShutStatus == TRUE) ||
562 (Adapter->bPreparingForLowPowerMode == TRUE)) 563 (Adapter->bPreparingForLowPowerMode == TRUE))
563 return -EINVAL; 564 return -EINVAL;
564 565
565 if (copy_from_user(&IoBuffer, argp, sizeof(IOCTL_BUFFER))) 566 if (copy_from_user(&IoBuffer, argp, sizeof(struct bcm_ioctl_buffer)))
566 return -EFAULT; 567 return -EFAULT;
567 568
568 if (IoBuffer.InputLength > sizeof(gpio_multi_info)) 569 if (IoBuffer.InputLength > sizeof(gpio_multi_info))
@@ -636,15 +637,15 @@ static long bcm_char_ioctl(struct file *filp, UINT cmd, ULONG arg)
636 637
637 case IOCTL_BCM_GPIO_MODE_REQUEST: { 638 case IOCTL_BCM_GPIO_MODE_REQUEST: {
638 UCHAR ucResetValue[4]; 639 UCHAR ucResetValue[4];
639 GPIO_MULTI_MODE gpio_multi_mode[MAX_IDX]; 640 struct bcm_gpio_multi_mode gpio_multi_mode[MAX_IDX];
640 PGPIO_MULTI_MODE pgpio_multi_mode = (PGPIO_MULTI_MODE)gpio_multi_mode; 641 struct bcm_gpio_multi_mode *pgpio_multi_mode = (struct bcm_gpio_multi_mode *)gpio_multi_mode;
641 642
642 if ((Adapter->IdleMode == TRUE) || 643 if ((Adapter->IdleMode == TRUE) ||
643 (Adapter->bShutStatus == TRUE) || 644 (Adapter->bShutStatus == TRUE) ||
644 (Adapter->bPreparingForLowPowerMode == TRUE)) 645 (Adapter->bPreparingForLowPowerMode == TRUE))
645 return -EINVAL; 646 return -EINVAL;
646 647
647 if (copy_from_user(&IoBuffer, argp, sizeof(IOCTL_BUFFER))) 648 if (copy_from_user(&IoBuffer, argp, sizeof(struct bcm_ioctl_buffer)))
648 return -EFAULT; 649 return -EFAULT;
649 650
650 if (IoBuffer.InputLength > sizeof(gpio_multi_mode)) 651 if (IoBuffer.InputLength > sizeof(gpio_multi_mode))
@@ -719,7 +720,7 @@ static long bcm_char_ioctl(struct file *filp, UINT cmd, ULONG arg)
719 PVOID pvBuffer = NULL; 720 PVOID pvBuffer = NULL;
720 721
721 /* Copy Ioctl Buffer structure */ 722 /* Copy Ioctl Buffer structure */
722 if (copy_from_user(&IoBuffer, argp, sizeof(IOCTL_BUFFER))) 723 if (copy_from_user(&IoBuffer, argp, sizeof(struct bcm_ioctl_buffer)))
723 return -EFAULT; 724 return -EFAULT;
724 725
725 if (IoBuffer.InputLength < sizeof(struct bcm_link_request)) 726 if (IoBuffer.InputLength < sizeof(struct bcm_link_request))
@@ -799,7 +800,7 @@ cntrlEnd:
799 } 800 }
800 801
801 /* Copy Ioctl Buffer structure */ 802 /* Copy Ioctl Buffer structure */
802 if (copy_from_user(&IoBuffer, argp, sizeof(IOCTL_BUFFER))) { 803 if (copy_from_user(&IoBuffer, argp, sizeof(struct bcm_ioctl_buffer))) {
803 up(&Adapter->fw_download_sema); 804 up(&Adapter->fw_download_sema);
804 return -EFAULT; 805 return -EFAULT;
805 } 806 }
@@ -895,7 +896,7 @@ cntrlEnd:
895 mdelay(10); 896 mdelay(10);
896 897
897 /* Wait for MailBox Interrupt */ 898 /* Wait for MailBox Interrupt */
898 if (StartInterruptUrb((PS_INTERFACE_ADAPTER)Adapter->pvInterfaceAdapter)) 899 if (StartInterruptUrb((struct bcm_interface_adapter *)Adapter->pvInterfaceAdapter))
899 BCM_DEBUG_PRINT(Adapter, DBG_TYPE_PRINTK, 0, 0, "Unable to send interrupt...\n"); 900 BCM_DEBUG_PRINT(Adapter, DBG_TYPE_PRINTK, 0, 0, "Unable to send interrupt...\n");
900 901
901 timeout = 5*HZ; 902 timeout = 5*HZ;
@@ -1000,7 +1001,7 @@ cntrlEnd:
1000 ulong len; 1001 ulong len;
1001 1002
1002 /* Copy Ioctl Buffer structure */ 1003 /* Copy Ioctl Buffer structure */
1003 if (copy_from_user(&IoBuffer, argp, sizeof(IOCTL_BUFFER))) 1004 if (copy_from_user(&IoBuffer, argp, sizeof(struct bcm_ioctl_buffer)))
1004 return -EFAULT; 1005 return -EFAULT;
1005 1006
1006 len = min_t(ulong, IoBuffer.OutputLength, strlen(VER_FILEVERSION_STR) + 1); 1007 len = min_t(ulong, IoBuffer.OutputLength, strlen(VER_FILEVERSION_STR) + 1);
@@ -1015,7 +1016,7 @@ cntrlEnd:
1015 LINK_STATE link_state; 1016 LINK_STATE link_state;
1016 1017
1017 /* Copy Ioctl Buffer structure */ 1018 /* Copy Ioctl Buffer structure */
1018 if (copy_from_user(&IoBuffer, argp, sizeof(IOCTL_BUFFER))) { 1019 if (copy_from_user(&IoBuffer, argp, sizeof(struct bcm_ioctl_buffer))) {
1019 BCM_DEBUG_PRINT(Adapter, DBG_TYPE_PRINTK, 0, 0, "copy_from_user failed..\n"); 1020 BCM_DEBUG_PRINT(Adapter, DBG_TYPE_PRINTK, 0, 0, "copy_from_user failed..\n");
1020 return -EFAULT; 1021 return -EFAULT;
1021 } 1022 }
@@ -1042,7 +1043,7 @@ cntrlEnd:
1042 UINT tracing_flag; 1043 UINT tracing_flag;
1043 1044
1044 /* copy ioctl Buffer structure */ 1045 /* copy ioctl Buffer structure */
1045 if (copy_from_user(&IoBuffer, argp, sizeof(IOCTL_BUFFER))) 1046 if (copy_from_user(&IoBuffer, argp, sizeof(struct bcm_ioctl_buffer)))
1046 return -EFAULT; 1047 return -EFAULT;
1047 1048
1048 if (copy_from_user(&tracing_flag, IoBuffer.InputBuffer, sizeof(UINT))) 1049 if (copy_from_user(&tracing_flag, IoBuffer.InputBuffer, sizeof(UINT)))
@@ -1057,13 +1058,13 @@ cntrlEnd:
1057 1058
1058 case IOCTL_BCM_GET_DSX_INDICATION: { 1059 case IOCTL_BCM_GET_DSX_INDICATION: {
1059 ULONG ulSFId = 0; 1060 ULONG ulSFId = 0;
1060 if (copy_from_user(&IoBuffer, argp, sizeof(IOCTL_BUFFER))) 1061 if (copy_from_user(&IoBuffer, argp, sizeof(struct bcm_ioctl_buffer)))
1061 return -EFAULT; 1062 return -EFAULT;
1062 1063
1063 if (IoBuffer.OutputLength < sizeof(stLocalSFAddIndicationAlt)) { 1064 if (IoBuffer.OutputLength < sizeof(struct bcm_add_indication_alt)) {
1064 BCM_DEBUG_PRINT(Adapter, DBG_TYPE_PRINTK, 0, 0, 1065 BCM_DEBUG_PRINT(Adapter, DBG_TYPE_PRINTK, 0, 0,
1065 "Mismatch req: %lx needed is =0x%zx!!!", 1066 "Mismatch req: %lx needed is =0x%zx!!!",
1066 IoBuffer.OutputLength, sizeof(stLocalSFAddIndicationAlt)); 1067 IoBuffer.OutputLength, sizeof(struct bcm_add_indication_alt));
1067 return -EINVAL; 1068 return -EINVAL;
1068 } 1069 }
1069 1070
@@ -1079,18 +1080,18 @@ cntrlEnd:
1079 case IOCTL_BCM_GET_HOST_MIBS: { 1080 case IOCTL_BCM_GET_HOST_MIBS: {
1080 PVOID temp_buff; 1081 PVOID temp_buff;
1081 1082
1082 if (copy_from_user(&IoBuffer, argp, sizeof(IOCTL_BUFFER))) 1083 if (copy_from_user(&IoBuffer, argp, sizeof(struct bcm_ioctl_buffer)))
1083 return -EFAULT; 1084 return -EFAULT;
1084 1085
1085 if (IoBuffer.OutputLength != sizeof(S_MIBS_HOST_STATS_MIBS)) { 1086 if (IoBuffer.OutputLength != sizeof(struct bcm_host_stats_mibs)) {
1086 BCM_DEBUG_PRINT(Adapter, DBG_TYPE_PRINTK, 0, 0, 1087 BCM_DEBUG_PRINT(Adapter, DBG_TYPE_PRINTK, 0, 0,
1087 "Length Check failed %lu %zd\n", 1088 "Length Check failed %lu %zd\n",
1088 IoBuffer.OutputLength, sizeof(S_MIBS_HOST_STATS_MIBS)); 1089 IoBuffer.OutputLength, sizeof(struct bcm_host_stats_mibs));
1089 return -EINVAL; 1090 return -EINVAL;
1090 } 1091 }
1091 1092
1092 /* FIXME: HOST_STATS are too big for kmalloc (122048)! */ 1093 /* FIXME: HOST_STATS are too big for kmalloc (122048)! */
1093 temp_buff = kzalloc(sizeof(S_MIBS_HOST_STATS_MIBS), GFP_KERNEL); 1094 temp_buff = kzalloc(sizeof(struct bcm_host_stats_mibs), GFP_KERNEL);
1094 if (!temp_buff) 1095 if (!temp_buff)
1095 return STATUS_FAILURE; 1096 return STATUS_FAILURE;
1096 1097
@@ -1098,7 +1099,7 @@ cntrlEnd:
1098 GetDroppedAppCntrlPktMibs(temp_buff, pTarang); 1099 GetDroppedAppCntrlPktMibs(temp_buff, pTarang);
1099 1100
1100 if (Status != STATUS_FAILURE) 1101 if (Status != STATUS_FAILURE)
1101 if (copy_to_user(IoBuffer.OutputBuffer, temp_buff, sizeof(S_MIBS_HOST_STATS_MIBS))) { 1102 if (copy_to_user(IoBuffer.OutputBuffer, temp_buff, sizeof(struct bcm_host_stats_mibs))) {
1102 kfree(temp_buff); 1103 kfree(temp_buff);
1103 return -EFAULT; 1104 return -EFAULT;
1104 } 1105 }
@@ -1118,7 +1119,7 @@ cntrlEnd:
1118 break; 1119 break;
1119 1120
1120 case IOCTL_BCM_BULK_WRM: { 1121 case IOCTL_BCM_BULK_WRM: {
1121 PBULKWRM_BUFFER pBulkBuffer; 1122 struct bcm_bulk_wrm_buffer *pBulkBuffer;
1122 UINT uiTempVar = 0; 1123 UINT uiTempVar = 0;
1123 PCHAR pvBuffer = NULL; 1124 PCHAR pvBuffer = NULL;
1124 1125
@@ -1132,7 +1133,7 @@ cntrlEnd:
1132 } 1133 }
1133 1134
1134 /* Copy Ioctl Buffer structure */ 1135 /* Copy Ioctl Buffer structure */
1135 if (copy_from_user(&IoBuffer, argp, sizeof(IOCTL_BUFFER))) 1136 if (copy_from_user(&IoBuffer, argp, sizeof(struct bcm_ioctl_buffer)))
1136 return -EFAULT; 1137 return -EFAULT;
1137 1138
1138 if (IoBuffer.InputLength < sizeof(ULONG) * 2) 1139 if (IoBuffer.InputLength < sizeof(ULONG) * 2)
@@ -1143,7 +1144,7 @@ cntrlEnd:
1143 if (IS_ERR(pvBuffer)) 1144 if (IS_ERR(pvBuffer))
1144 return PTR_ERR(pvBuffer); 1145 return PTR_ERR(pvBuffer);
1145 1146
1146 pBulkBuffer = (PBULKWRM_BUFFER)pvBuffer; 1147 pBulkBuffer = (struct bcm_bulk_wrm_buffer *)pvBuffer;
1147 1148
1148 if (((ULONG)pBulkBuffer->Register & 0x0F000000) != 0x0F000000 || 1149 if (((ULONG)pBulkBuffer->Register & 0x0F000000) != 0x0F000000 ||
1149 ((ULONG)pBulkBuffer->Register & 0x3)) { 1150 ((ULONG)pBulkBuffer->Register & 0x3)) {
@@ -1180,7 +1181,7 @@ cntrlEnd:
1180 } 1181 }
1181 1182
1182 case IOCTL_BCM_GET_NVM_SIZE: 1183 case IOCTL_BCM_GET_NVM_SIZE:
1183 if (copy_from_user(&IoBuffer, argp, sizeof(IOCTL_BUFFER))) 1184 if (copy_from_user(&IoBuffer, argp, sizeof(struct bcm_ioctl_buffer)))
1184 return -EFAULT; 1185 return -EFAULT;
1185 1186
1186 if (Adapter->eNVMType == NVM_EEPROM || Adapter->eNVMType == NVM_FLASH) { 1187 if (Adapter->eNVMType == NVM_EEPROM || Adapter->eNVMType == NVM_FLASH) {
@@ -1194,7 +1195,7 @@ cntrlEnd:
1194 case IOCTL_BCM_CAL_INIT: { 1195 case IOCTL_BCM_CAL_INIT: {
1195 UINT uiSectorSize = 0 ; 1196 UINT uiSectorSize = 0 ;
1196 if (Adapter->eNVMType == NVM_FLASH) { 1197 if (Adapter->eNVMType == NVM_FLASH) {
1197 if (copy_from_user(&IoBuffer, argp, sizeof(IOCTL_BUFFER))) 1198 if (copy_from_user(&IoBuffer, argp, sizeof(struct bcm_ioctl_buffer)))
1198 return -EFAULT; 1199 return -EFAULT;
1199 1200
1200 if (copy_from_user(&uiSectorSize, IoBuffer.InputBuffer, sizeof(UINT))) 1201 if (copy_from_user(&uiSectorSize, IoBuffer.InputBuffer, sizeof(UINT)))
@@ -1231,7 +1232,7 @@ cntrlEnd:
1231 USER_BCM_DBG_STATE sUserDebugState; 1232 USER_BCM_DBG_STATE sUserDebugState;
1232 1233
1233 BCM_DEBUG_PRINT(Adapter, DBG_TYPE_OTHERS, OSAL_DBG, DBG_LVL_ALL, "In SET_DEBUG ioctl\n"); 1234 BCM_DEBUG_PRINT(Adapter, DBG_TYPE_OTHERS, OSAL_DBG, DBG_LVL_ALL, "In SET_DEBUG ioctl\n");
1234 if (copy_from_user(&IoBuffer, argp, sizeof(IOCTL_BUFFER))) 1235 if (copy_from_user(&IoBuffer, argp, sizeof(struct bcm_ioctl_buffer)))
1235 return -EFAULT; 1236 return -EFAULT;
1236 1237
1237 if (copy_from_user(&sUserDebugState, IoBuffer.InputBuffer, sizeof(USER_BCM_DBG_STATE))) 1238 if (copy_from_user(&sUserDebugState, IoBuffer.InputBuffer, sizeof(USER_BCM_DBG_STATE)))
@@ -1262,7 +1263,7 @@ cntrlEnd:
1262 1263
1263 case IOCTL_BCM_NVM_READ: 1264 case IOCTL_BCM_NVM_READ:
1264 case IOCTL_BCM_NVM_WRITE: { 1265 case IOCTL_BCM_NVM_WRITE: {
1265 NVM_READWRITE stNVMReadWrite; 1266 struct bcm_nvm_readwrite stNVMReadWrite;
1266 PUCHAR pReadData = NULL; 1267 PUCHAR pReadData = NULL;
1267 ULONG ulDSDMagicNumInUsrBuff = 0; 1268 ULONG ulDSDMagicNumInUsrBuff = 0;
1268 struct timeval tv0, tv1; 1269 struct timeval tv0, tv1;
@@ -1284,12 +1285,12 @@ cntrlEnd:
1284 } 1285 }
1285 1286
1286 /* Copy Ioctl Buffer structure */ 1287 /* Copy Ioctl Buffer structure */
1287 if (copy_from_user(&IoBuffer, argp, sizeof(IOCTL_BUFFER))) 1288 if (copy_from_user(&IoBuffer, argp, sizeof(struct bcm_ioctl_buffer)))
1288 return -EFAULT; 1289 return -EFAULT;
1289 1290
1290 if (copy_from_user(&stNVMReadWrite, 1291 if (copy_from_user(&stNVMReadWrite,
1291 (IOCTL_BCM_NVM_READ == cmd) ? IoBuffer.OutputBuffer : IoBuffer.InputBuffer, 1292 (IOCTL_BCM_NVM_READ == cmd) ? IoBuffer.OutputBuffer : IoBuffer.InputBuffer,
1292 sizeof(NVM_READWRITE))) 1293 sizeof(struct bcm_nvm_readwrite)))
1293 return -EFAULT; 1294 return -EFAULT;
1294 1295
1295 /* 1296 /*
@@ -1404,7 +1405,7 @@ cntrlEnd:
1404 } 1405 }
1405 1406
1406 case IOCTL_BCM_FLASH2X_SECTION_READ: { 1407 case IOCTL_BCM_FLASH2X_SECTION_READ: {
1407 FLASH2X_READWRITE sFlash2xRead = {0}; 1408 struct bcm_flash2x_readwrite sFlash2xRead = {0};
1408 PUCHAR pReadBuff = NULL ; 1409 PUCHAR pReadBuff = NULL ;
1409 UINT NOB = 0; 1410 UINT NOB = 0;
1410 UINT BuffSize = 0; 1411 UINT BuffSize = 0;
@@ -1418,11 +1419,11 @@ cntrlEnd:
1418 } 1419 }
1419 1420
1420 BCM_DEBUG_PRINT(Adapter, DBG_TYPE_OTHERS, OSAL_DBG, DBG_LVL_ALL, "IOCTL_BCM_FLASH2X_SECTION_READ Called"); 1421 BCM_DEBUG_PRINT(Adapter, DBG_TYPE_OTHERS, OSAL_DBG, DBG_LVL_ALL, "IOCTL_BCM_FLASH2X_SECTION_READ Called");
1421 if (copy_from_user(&IoBuffer, argp, sizeof(IOCTL_BUFFER))) 1422 if (copy_from_user(&IoBuffer, argp, sizeof(struct bcm_ioctl_buffer)))
1422 return -EFAULT; 1423 return -EFAULT;
1423 1424
1424 /* Reading FLASH 2.x READ structure */ 1425 /* Reading FLASH 2.x READ structure */
1425 if (copy_from_user(&sFlash2xRead, IoBuffer.InputBuffer, sizeof(FLASH2X_READWRITE))) 1426 if (copy_from_user(&sFlash2xRead, IoBuffer.InputBuffer, sizeof(struct bcm_flash2x_readwrite)))
1426 return -EFAULT; 1427 return -EFAULT;
1427 1428
1428 BCM_DEBUG_PRINT(Adapter, DBG_TYPE_OTHERS, OSAL_DBG, DBG_LVL_ALL, "\nsFlash2xRead.Section :%x", sFlash2xRead.Section); 1429 BCM_DEBUG_PRINT(Adapter, DBG_TYPE_OTHERS, OSAL_DBG, DBG_LVL_ALL, "\nsFlash2xRead.Section :%x", sFlash2xRead.Section);
@@ -1495,7 +1496,7 @@ cntrlEnd:
1495 break; 1496 break;
1496 1497
1497 case IOCTL_BCM_FLASH2X_SECTION_WRITE: { 1498 case IOCTL_BCM_FLASH2X_SECTION_WRITE: {
1498 FLASH2X_READWRITE sFlash2xWrite = {0}; 1499 struct bcm_flash2x_readwrite sFlash2xWrite = {0};
1499 PUCHAR pWriteBuff; 1500 PUCHAR pWriteBuff;
1500 void __user *InputAddr; 1501 void __user *InputAddr;
1501 UINT NOB = 0; 1502 UINT NOB = 0;
@@ -1513,11 +1514,11 @@ cntrlEnd:
1513 1514
1514 BCM_DEBUG_PRINT(Adapter, DBG_TYPE_OTHERS, OSAL_DBG, DBG_LVL_ALL, "IOCTL_BCM_FLASH2X_SECTION_WRITE Called"); 1515 BCM_DEBUG_PRINT(Adapter, DBG_TYPE_OTHERS, OSAL_DBG, DBG_LVL_ALL, "IOCTL_BCM_FLASH2X_SECTION_WRITE Called");
1515 1516
1516 if (copy_from_user(&IoBuffer, argp, sizeof(IOCTL_BUFFER))) 1517 if (copy_from_user(&IoBuffer, argp, sizeof(struct bcm_ioctl_buffer)))
1517 return -EFAULT; 1518 return -EFAULT;
1518 1519
1519 /* Reading FLASH 2.x READ structure */ 1520 /* Reading FLASH 2.x READ structure */
1520 if (copy_from_user(&sFlash2xWrite, IoBuffer.InputBuffer, sizeof(FLASH2X_READWRITE))) 1521 if (copy_from_user(&sFlash2xWrite, IoBuffer.InputBuffer, sizeof(struct bcm_flash2x_readwrite)))
1521 return -EFAULT; 1522 return -EFAULT;
1522 1523
1523 BCM_DEBUG_PRINT(Adapter, DBG_TYPE_OTHERS, OSAL_DBG, DBG_LVL_ALL, "\nsFlash2xRead.Section :%x", sFlash2xWrite.Section); 1524 BCM_DEBUG_PRINT(Adapter, DBG_TYPE_OTHERS, OSAL_DBG, DBG_LVL_ALL, "\nsFlash2xRead.Section :%x", sFlash2xWrite.Section);
@@ -1604,16 +1605,16 @@ cntrlEnd:
1604 break; 1605 break;
1605 1606
1606 case IOCTL_BCM_GET_FLASH2X_SECTION_BITMAP: { 1607 case IOCTL_BCM_GET_FLASH2X_SECTION_BITMAP: {
1607 PFLASH2X_BITMAP psFlash2xBitMap; 1608 struct bcm_flash2x_bitmap *psFlash2xBitMap;
1608 BCM_DEBUG_PRINT(Adapter, DBG_TYPE_OTHERS, OSAL_DBG, DBG_LVL_ALL, "IOCTL_BCM_GET_FLASH2X_SECTION_BITMAP Called"); 1609 BCM_DEBUG_PRINT(Adapter, DBG_TYPE_OTHERS, OSAL_DBG, DBG_LVL_ALL, "IOCTL_BCM_GET_FLASH2X_SECTION_BITMAP Called");
1609 1610
1610 if (copy_from_user(&IoBuffer, argp, sizeof(IOCTL_BUFFER))) 1611 if (copy_from_user(&IoBuffer, argp, sizeof(struct bcm_ioctl_buffer)))
1611 return -EFAULT; 1612 return -EFAULT;
1612 1613
1613 if (IoBuffer.OutputLength != sizeof(FLASH2X_BITMAP)) 1614 if (IoBuffer.OutputLength != sizeof(struct bcm_flash2x_bitmap))
1614 return -EINVAL; 1615 return -EINVAL;
1615 1616
1616 psFlash2xBitMap = kzalloc(sizeof(FLASH2X_BITMAP), GFP_KERNEL); 1617 psFlash2xBitMap = kzalloc(sizeof(struct bcm_flash2x_bitmap), GFP_KERNEL);
1617 if (psFlash2xBitMap == NULL) { 1618 if (psFlash2xBitMap == NULL) {
1618 BCM_DEBUG_PRINT(Adapter, DBG_TYPE_PRINTK, 0, 0, "Memory is not available"); 1619 BCM_DEBUG_PRINT(Adapter, DBG_TYPE_PRINTK, 0, 0, "Memory is not available");
1619 return -ENOMEM; 1620 return -ENOMEM;
@@ -1634,7 +1635,7 @@ cntrlEnd:
1634 1635
1635 BcmGetFlash2xSectionalBitMap(Adapter, psFlash2xBitMap); 1636 BcmGetFlash2xSectionalBitMap(Adapter, psFlash2xBitMap);
1636 up(&Adapter->NVMRdmWrmLock); 1637 up(&Adapter->NVMRdmWrmLock);
1637 if (copy_to_user(IoBuffer.OutputBuffer, psFlash2xBitMap, sizeof(FLASH2X_BITMAP))) { 1638 if (copy_to_user(IoBuffer.OutputBuffer, psFlash2xBitMap, sizeof(struct bcm_flash2x_bitmap))) {
1638 kfree(psFlash2xBitMap); 1639 kfree(psFlash2xBitMap);
1639 return -EFAULT; 1640 return -EFAULT;
1640 } 1641 }
@@ -1644,7 +1645,7 @@ cntrlEnd:
1644 break; 1645 break;
1645 1646
1646 case IOCTL_BCM_SET_ACTIVE_SECTION: { 1647 case IOCTL_BCM_SET_ACTIVE_SECTION: {
1647 FLASH2X_SECTION_VAL eFlash2xSectionVal = 0; 1648 enum bcm_flash2x_section_val eFlash2xSectionVal = 0;
1648 BCM_DEBUG_PRINT(Adapter, DBG_TYPE_OTHERS, OSAL_DBG, DBG_LVL_ALL, "IOCTL_BCM_SET_ACTIVE_SECTION Called"); 1649 BCM_DEBUG_PRINT(Adapter, DBG_TYPE_OTHERS, OSAL_DBG, DBG_LVL_ALL, "IOCTL_BCM_SET_ACTIVE_SECTION Called");
1649 1650
1650 if (IsFlash2x(Adapter) != TRUE) { 1651 if (IsFlash2x(Adapter) != TRUE) {
@@ -1652,7 +1653,7 @@ cntrlEnd:
1652 return -EINVAL; 1653 return -EINVAL;
1653 } 1654 }
1654 1655
1655 Status = copy_from_user(&IoBuffer, argp, sizeof(IOCTL_BUFFER)); 1656 Status = copy_from_user(&IoBuffer, argp, sizeof(struct bcm_ioctl_buffer));
1656 if (Status) { 1657 if (Status) {
1657 BCM_DEBUG_PRINT(Adapter, DBG_TYPE_PRINTK, 0, 0, "Copy of IOCTL BUFFER failed"); 1658 BCM_DEBUG_PRINT(Adapter, DBG_TYPE_PRINTK, 0, 0, "Copy of IOCTL BUFFER failed");
1658 return -EFAULT; 1659 return -EFAULT;
@@ -1692,7 +1693,7 @@ cntrlEnd:
1692 break; 1693 break;
1693 1694
1694 case IOCTL_BCM_COPY_SECTION: { 1695 case IOCTL_BCM_COPY_SECTION: {
1695 FLASH2X_COPY_SECTION sCopySectStrut = {0}; 1696 struct bcm_flash2x_copy_section sCopySectStrut = {0};
1696 Status = STATUS_SUCCESS; 1697 Status = STATUS_SUCCESS;
1697 BCM_DEBUG_PRINT(Adapter, DBG_TYPE_OTHERS, OSAL_DBG, DBG_LVL_ALL, "IOCTL_BCM_COPY_SECTION Called"); 1698 BCM_DEBUG_PRINT(Adapter, DBG_TYPE_OTHERS, OSAL_DBG, DBG_LVL_ALL, "IOCTL_BCM_COPY_SECTION Called");
1698 1699
@@ -1702,13 +1703,13 @@ cntrlEnd:
1702 return -EINVAL; 1703 return -EINVAL;
1703 } 1704 }
1704 1705
1705 Status = copy_from_user(&IoBuffer, argp, sizeof(IOCTL_BUFFER)); 1706 Status = copy_from_user(&IoBuffer, argp, sizeof(struct bcm_ioctl_buffer));
1706 if (Status) { 1707 if (Status) {
1707 BCM_DEBUG_PRINT(Adapter, DBG_TYPE_PRINTK, 0, 0, "Copy of IOCTL BUFFER failed Status :%d", Status); 1708 BCM_DEBUG_PRINT(Adapter, DBG_TYPE_PRINTK, 0, 0, "Copy of IOCTL BUFFER failed Status :%d", Status);
1708 return -EFAULT; 1709 return -EFAULT;
1709 } 1710 }
1710 1711
1711 Status = copy_from_user(&sCopySectStrut, IoBuffer.InputBuffer, sizeof(FLASH2X_COPY_SECTION)); 1712 Status = copy_from_user(&sCopySectStrut, IoBuffer.InputBuffer, sizeof(struct bcm_flash2x_copy_section));
1712 if (Status) { 1713 if (Status) {
1713 BCM_DEBUG_PRINT(Adapter, DBG_TYPE_PRINTK, 0, 0, "Copy of Copy_Section_Struct failed with Status :%d", Status); 1714 BCM_DEBUG_PRINT(Adapter, DBG_TYPE_PRINTK, 0, 0, "Copy of Copy_Section_Struct failed with Status :%d", Status);
1714 return -EFAULT; 1715 return -EFAULT;
@@ -1769,7 +1770,7 @@ cntrlEnd:
1769 Status = STATUS_SUCCESS; 1770 Status = STATUS_SUCCESS;
1770 BCM_DEBUG_PRINT(Adapter, DBG_TYPE_OTHERS, OSAL_DBG, DBG_LVL_ALL, " IOCTL_BCM_GET_FLASH_CS_INFO Called"); 1771 BCM_DEBUG_PRINT(Adapter, DBG_TYPE_OTHERS, OSAL_DBG, DBG_LVL_ALL, " IOCTL_BCM_GET_FLASH_CS_INFO Called");
1771 1772
1772 Status = copy_from_user(&IoBuffer, argp, sizeof(IOCTL_BUFFER)); 1773 Status = copy_from_user(&IoBuffer, argp, sizeof(struct bcm_ioctl_buffer));
1773 if (Status) { 1774 if (Status) {
1774 BCM_DEBUG_PRINT(Adapter, DBG_TYPE_PRINTK, 0, 0, "Copy of IOCTL BUFFER failed"); 1775 BCM_DEBUG_PRINT(Adapter, DBG_TYPE_PRINTK, 0, 0, "Copy of IOCTL BUFFER failed");
1775 return -EFAULT; 1776 return -EFAULT;
@@ -1799,7 +1800,7 @@ cntrlEnd:
1799 1800
1800 case IOCTL_BCM_SELECT_DSD: { 1801 case IOCTL_BCM_SELECT_DSD: {
1801 UINT SectOfset = 0; 1802 UINT SectOfset = 0;
1802 FLASH2X_SECTION_VAL eFlash2xSectionVal; 1803 enum bcm_flash2x_section_val eFlash2xSectionVal;
1803 eFlash2xSectionVal = NO_SECTION_VAL; 1804 eFlash2xSectionVal = NO_SECTION_VAL;
1804 BCM_DEBUG_PRINT(Adapter, DBG_TYPE_OTHERS, OSAL_DBG, DBG_LVL_ALL, "IOCTL_BCM_SELECT_DSD Called"); 1805 BCM_DEBUG_PRINT(Adapter, DBG_TYPE_OTHERS, OSAL_DBG, DBG_LVL_ALL, "IOCTL_BCM_SELECT_DSD Called");
1805 1806
@@ -1808,7 +1809,7 @@ cntrlEnd:
1808 return -EINVAL; 1809 return -EINVAL;
1809 } 1810 }
1810 1811
1811 Status = copy_from_user(&IoBuffer, argp, sizeof(IOCTL_BUFFER)); 1812 Status = copy_from_user(&IoBuffer, argp, sizeof(struct bcm_ioctl_buffer));
1812 if (Status) { 1813 if (Status) {
1813 BCM_DEBUG_PRINT(Adapter, DBG_TYPE_PRINTK, 0, 0, "Copy of IOCTL BUFFER failed"); 1814 BCM_DEBUG_PRINT(Adapter, DBG_TYPE_PRINTK, 0, 0, "Copy of IOCTL BUFFER failed");
1814 return -EFAULT; 1815 return -EFAULT;
@@ -1842,7 +1843,7 @@ cntrlEnd:
1842 break; 1843 break;
1843 1844
1844 case IOCTL_BCM_NVM_RAW_READ: { 1845 case IOCTL_BCM_NVM_RAW_READ: {
1845 NVM_READWRITE stNVMRead; 1846 struct bcm_nvm_readwrite stNVMRead;
1846 INT NOB ; 1847 INT NOB ;
1847 INT BuffSize ; 1848 INT BuffSize ;
1848 INT ReadOffset = 0; 1849 INT ReadOffset = 0;
@@ -1856,12 +1857,12 @@ cntrlEnd:
1856 } 1857 }
1857 1858
1858 /* Copy Ioctl Buffer structure */ 1859 /* Copy Ioctl Buffer structure */
1859 if (copy_from_user(&IoBuffer, argp, sizeof(IOCTL_BUFFER))) { 1860 if (copy_from_user(&IoBuffer, argp, sizeof(struct bcm_ioctl_buffer))) {
1860 BCM_DEBUG_PRINT(Adapter, DBG_TYPE_PRINTK, 0, 0, "copy_from_user 1 failed\n"); 1861 BCM_DEBUG_PRINT(Adapter, DBG_TYPE_PRINTK, 0, 0, "copy_from_user 1 failed\n");
1861 return -EFAULT; 1862 return -EFAULT;
1862 } 1863 }
1863 1864
1864 if (copy_from_user(&stNVMRead, IoBuffer.OutputBuffer, sizeof(NVM_READWRITE))) 1865 if (copy_from_user(&stNVMRead, IoBuffer.OutputBuffer, sizeof(struct bcm_nvm_readwrite)))
1865 return -EFAULT; 1866 return -EFAULT;
1866 1867
1867 NOB = stNVMRead.uiNumBytes; 1868 NOB = stNVMRead.uiNumBytes;
@@ -1933,7 +1934,7 @@ cntrlEnd:
1933 ULONG RxCntrlMsgBitMask = 0; 1934 ULONG RxCntrlMsgBitMask = 0;
1934 1935
1935 /* Copy Ioctl Buffer structure */ 1936 /* Copy Ioctl Buffer structure */
1936 Status = copy_from_user(&IoBuffer, argp, sizeof(IOCTL_BUFFER)); 1937 Status = copy_from_user(&IoBuffer, argp, sizeof(struct bcm_ioctl_buffer));
1937 if (Status) { 1938 if (Status) {
1938 BCM_DEBUG_PRINT(Adapter, DBG_TYPE_OTHERS, OSAL_DBG, DBG_LVL_ALL, "copy of Ioctl buffer is failed from user space"); 1939 BCM_DEBUG_PRINT(Adapter, DBG_TYPE_OTHERS, OSAL_DBG, DBG_LVL_ALL, "copy of Ioctl buffer is failed from user space");
1939 return -EFAULT; 1940 return -EFAULT;
@@ -1955,7 +1956,7 @@ cntrlEnd:
1955 break; 1956 break;
1956 1957
1957 case IOCTL_BCM_GET_DEVICE_DRIVER_INFO: { 1958 case IOCTL_BCM_GET_DEVICE_DRIVER_INFO: {
1958 DEVICE_DRIVER_INFO DevInfo; 1959 struct bcm_driver_info DevInfo;
1959 1960
1960 BCM_DEBUG_PRINT(Adapter, DBG_TYPE_OTHERS, OSAL_DBG, DBG_LVL_ALL, "Called IOCTL_BCM_GET_DEVICE_DRIVER_INFO\n"); 1961 BCM_DEBUG_PRINT(Adapter, DBG_TYPE_OTHERS, OSAL_DBG, DBG_LVL_ALL, "Called IOCTL_BCM_GET_DEVICE_DRIVER_INFO\n");
1961 1962
@@ -1965,7 +1966,7 @@ cntrlEnd:
1965 DevInfo.u32NVMType = Adapter->eNVMType; 1966 DevInfo.u32NVMType = Adapter->eNVMType;
1966 DevInfo.u32InterfaceType = BCM_USB; 1967 DevInfo.u32InterfaceType = BCM_USB;
1967 1968
1968 if (copy_from_user(&IoBuffer, argp, sizeof(IOCTL_BUFFER))) 1969 if (copy_from_user(&IoBuffer, argp, sizeof(struct bcm_ioctl_buffer)))
1969 return -EFAULT; 1970 return -EFAULT;
1970 1971
1971 if (IoBuffer.OutputLength < sizeof(DevInfo)) 1972 if (IoBuffer.OutputLength < sizeof(DevInfo))
@@ -1977,19 +1978,19 @@ cntrlEnd:
1977 break; 1978 break;
1978 1979
1979 case IOCTL_BCM_TIME_SINCE_NET_ENTRY: { 1980 case IOCTL_BCM_TIME_SINCE_NET_ENTRY: {
1980 ST_TIME_ELAPSED stTimeElapsedSinceNetEntry = {0}; 1981 struct bcm_time_elapsed stTimeElapsedSinceNetEntry = {0};
1981 1982
1982 BCM_DEBUG_PRINT(Adapter, DBG_TYPE_OTHERS, OSAL_DBG, DBG_LVL_ALL, "IOCTL_BCM_TIME_SINCE_NET_ENTRY called"); 1983 BCM_DEBUG_PRINT(Adapter, DBG_TYPE_OTHERS, OSAL_DBG, DBG_LVL_ALL, "IOCTL_BCM_TIME_SINCE_NET_ENTRY called");
1983 1984
1984 if (copy_from_user(&IoBuffer, argp, sizeof(IOCTL_BUFFER))) 1985 if (copy_from_user(&IoBuffer, argp, sizeof(struct bcm_ioctl_buffer)))
1985 return -EFAULT; 1986 return -EFAULT;
1986 1987
1987 if (IoBuffer.OutputLength < sizeof(ST_TIME_ELAPSED)) 1988 if (IoBuffer.OutputLength < sizeof(struct bcm_time_elapsed))
1988 return -EINVAL; 1989 return -EINVAL;
1989 1990
1990 stTimeElapsedSinceNetEntry.ul64TimeElapsedSinceNetEntry = get_seconds() - Adapter->liTimeSinceLastNetEntry; 1991 stTimeElapsedSinceNetEntry.ul64TimeElapsedSinceNetEntry = get_seconds() - Adapter->liTimeSinceLastNetEntry;
1991 1992
1992 if (copy_to_user(IoBuffer.OutputBuffer, &stTimeElapsedSinceNetEntry, sizeof(ST_TIME_ELAPSED))) 1993 if (copy_to_user(IoBuffer.OutputBuffer, &stTimeElapsedSinceNetEntry, sizeof(struct bcm_time_elapsed)))
1993 return -EFAULT; 1994 return -EFAULT;
1994 } 1995 }
1995 break; 1996 break;
diff --git a/drivers/staging/bcm/Bcmnet.c b/drivers/staging/bcm/Bcmnet.c
index 6e8c7f523214..a3b91c7ee8ff 100644
--- a/drivers/staging/bcm/Bcmnet.c
+++ b/drivers/staging/bcm/Bcmnet.c
@@ -142,7 +142,7 @@ static void bcm_get_drvinfo(struct net_device *dev,
142 struct ethtool_drvinfo *info) 142 struct ethtool_drvinfo *info)
143{ 143{
144 struct bcm_mini_adapter *Adapter = GET_BCM_ADAPTER(dev); 144 struct bcm_mini_adapter *Adapter = GET_BCM_ADAPTER(dev);
145 PS_INTERFACE_ADAPTER psIntfAdapter = Adapter->pvInterfaceAdapter; 145 struct bcm_interface_adapter *psIntfAdapter = Adapter->pvInterfaceAdapter;
146 struct usb_device *udev = interface_to_usbdev(psIntfAdapter->interface); 146 struct usb_device *udev = interface_to_usbdev(psIntfAdapter->interface);
147 147
148 strcpy(info->driver, DRV_NAME); 148 strcpy(info->driver, DRV_NAME);
@@ -186,7 +186,7 @@ static const struct ethtool_ops bcm_ethtool_ops = {
186int register_networkdev(struct bcm_mini_adapter *Adapter) 186int register_networkdev(struct bcm_mini_adapter *Adapter)
187{ 187{
188 struct net_device *net = Adapter->dev; 188 struct net_device *net = Adapter->dev;
189 PS_INTERFACE_ADAPTER IntfAdapter = Adapter->pvInterfaceAdapter; 189 struct bcm_interface_adapter *IntfAdapter = Adapter->pvInterfaceAdapter;
190 struct usb_interface *udev = IntfAdapter->interface; 190 struct usb_interface *udev = IntfAdapter->interface;
191 struct usb_device *xdev = IntfAdapter->udev; 191 struct usb_device *xdev = IntfAdapter->udev;
192 192
@@ -227,7 +227,7 @@ int register_networkdev(struct bcm_mini_adapter *Adapter)
227void unregister_networkdev(struct bcm_mini_adapter *Adapter) 227void unregister_networkdev(struct bcm_mini_adapter *Adapter)
228{ 228{
229 struct net_device *net = Adapter->dev; 229 struct net_device *net = Adapter->dev;
230 PS_INTERFACE_ADAPTER IntfAdapter = Adapter->pvInterfaceAdapter; 230 struct bcm_interface_adapter *IntfAdapter = Adapter->pvInterfaceAdapter;
231 struct usb_interface *udev = IntfAdapter->interface; 231 struct usb_interface *udev = IntfAdapter->interface;
232 struct usb_device *xdev = IntfAdapter->udev; 232 struct usb_device *xdev = IntfAdapter->udev;
233 233
diff --git a/drivers/staging/bcm/CmHost.c b/drivers/staging/bcm/CmHost.c
index 325b592fd41f..23ddc3d7c9ea 100644
--- a/drivers/staging/bcm/CmHost.c
+++ b/drivers/staging/bcm/CmHost.c
@@ -107,7 +107,7 @@ static VOID deleteSFBySfid(struct bcm_mini_adapter *Adapter, UINT uiSearchRuleIn
107 DeleteAllClassifiersForSF(Adapter, uiSearchRuleIndex); 107 DeleteAllClassifiersForSF(Adapter, uiSearchRuleIndex);
108 108
109 /* Resetting only MIBS related entries in the SF */ 109 /* Resetting only MIBS related entries in the SF */
110 memset((PVOID)&Adapter->PackInfo[uiSearchRuleIndex], 0, sizeof(S_MIBS_SERVICEFLOW_TABLE)); 110 memset((PVOID)&Adapter->PackInfo[uiSearchRuleIndex], 0, sizeof(struct bcm_mibs_table));
111} 111}
112 112
113static inline VOID 113static inline VOID
@@ -431,7 +431,7 @@ static VOID CopyToAdapter(register struct bcm_mini_adapter *Adapter, /* <Pointer
431 register struct bcm_connect_mgr_params *psfLocalSet, /* Pointer to the connection manager parameters structure */ 431 register struct bcm_connect_mgr_params *psfLocalSet, /* Pointer to the connection manager parameters structure */
432 register UINT uiSearchRuleIndex, /* <Index of Queue, to which this data belongs */ 432 register UINT uiSearchRuleIndex, /* <Index of Queue, to which this data belongs */
433 register UCHAR ucDsxType, 433 register UCHAR ucDsxType,
434 stLocalSFAddIndicationAlt *pstAddIndication) { 434 struct bcm_add_indication_alt *pstAddIndication) {
435 435
436 /* UCHAR ucProtocolLength = 0; */ 436 /* UCHAR ucProtocolLength = 0; */
437 ULONG ulSFID; 437 ULONG ulSFID;
@@ -833,11 +833,11 @@ static VOID DumpCmControlPacket(PVOID pvBuffer)
833{ 833{
834 int uiLoopIndex; 834 int uiLoopIndex;
835 int nIndex; 835 int nIndex;
836 stLocalSFAddIndicationAlt *pstAddIndication; 836 struct bcm_add_indication_alt *pstAddIndication;
837 UINT nCurClassifierCnt; 837 UINT nCurClassifierCnt;
838 struct bcm_mini_adapter *Adapter = GET_BCM_ADAPTER(gblpnetdev); 838 struct bcm_mini_adapter *Adapter = GET_BCM_ADAPTER(gblpnetdev);
839 839
840 pstAddIndication = (stLocalSFAddIndicationAlt *)pvBuffer; 840 pstAddIndication = (struct bcm_add_indication_alt *)pvBuffer;
841 BCM_DEBUG_PRINT(Adapter, DBG_TYPE_OTHERS, DUMP_CONTROL, DBG_LVL_ALL, "======>"); 841 BCM_DEBUG_PRINT(Adapter, DBG_TYPE_OTHERS, DUMP_CONTROL, DBG_LVL_ALL, "======>");
842 BCM_DEBUG_PRINT(Adapter, DBG_TYPE_OTHERS, DUMP_CONTROL, DBG_LVL_ALL, "u8Type: 0x%X", pstAddIndication->u8Type); 842 BCM_DEBUG_PRINT(Adapter, DBG_TYPE_OTHERS, DUMP_CONTROL, DBG_LVL_ALL, "u8Type: 0x%X", pstAddIndication->u8Type);
843 BCM_DEBUG_PRINT(Adapter, DBG_TYPE_OTHERS, DUMP_CONTROL, DBG_LVL_ALL, "u8Direction: 0x%X", pstAddIndication->u8Direction); 843 BCM_DEBUG_PRINT(Adapter, DBG_TYPE_OTHERS, DUMP_CONTROL, DBG_LVL_ALL, "u8Direction: 0x%X", pstAddIndication->u8Direction);
@@ -1333,13 +1333,13 @@ static ULONG StoreSFParam(struct bcm_mini_adapter *Adapter, PUCHAR pucSrcBuffer,
1333 1333
1334ULONG StoreCmControlResponseMessage(struct bcm_mini_adapter *Adapter, PVOID pvBuffer, UINT *puBufferLength) 1334ULONG StoreCmControlResponseMessage(struct bcm_mini_adapter *Adapter, PVOID pvBuffer, UINT *puBufferLength)
1335{ 1335{
1336 stLocalSFAddIndicationAlt *pstAddIndicationAlt = NULL; 1336 struct bcm_add_indication_alt *pstAddIndicationAlt = NULL;
1337 struct bcm_add_indication *pstAddIndication = NULL; 1337 struct bcm_add_indication *pstAddIndication = NULL;
1338 struct bcm_del_request *pstDeletionRequest; 1338 struct bcm_del_request *pstDeletionRequest;
1339 UINT uiSearchRuleIndex; 1339 UINT uiSearchRuleIndex;
1340 ULONG ulSFID; 1340 ULONG ulSFID;
1341 1341
1342 pstAddIndicationAlt = (stLocalSFAddIndicationAlt *)(pvBuffer); 1342 pstAddIndicationAlt = (struct bcm_add_indication_alt *)(pvBuffer);
1343 1343
1344 /* 1344 /*
1345 * In case of DSD Req By MS, we should immediately delete this SF so that 1345 * In case of DSD Req By MS, we should immediately delete this SF so that
@@ -1445,29 +1445,29 @@ ULONG StoreCmControlResponseMessage(struct bcm_mini_adapter *Adapter, PVOID pvBu
1445 return 1; 1445 return 1;
1446} 1446}
1447 1447
1448static inline stLocalSFAddIndicationAlt 1448static inline struct bcm_add_indication_alt
1449*RestoreCmControlResponseMessage(register struct bcm_mini_adapter *Adapter, register PVOID pvBuffer) 1449*RestoreCmControlResponseMessage(register struct bcm_mini_adapter *Adapter, register PVOID pvBuffer)
1450{ 1450{
1451 ULONG ulStatus = 0; 1451 ULONG ulStatus = 0;
1452 struct bcm_add_indication *pstAddIndication = NULL; 1452 struct bcm_add_indication *pstAddIndication = NULL;
1453 stLocalSFAddIndicationAlt *pstAddIndicationDest = NULL; 1453 struct bcm_add_indication_alt *pstAddIndicationDest = NULL;
1454 1454
1455 pstAddIndication = (struct bcm_add_indication *)(pvBuffer); 1455 pstAddIndication = (struct bcm_add_indication *)(pvBuffer);
1456 BCM_DEBUG_PRINT(Adapter, DBG_TYPE_OTHERS, CONN_MSG, DBG_LVL_ALL, "=====>"); 1456 BCM_DEBUG_PRINT(Adapter, DBG_TYPE_OTHERS, CONN_MSG, DBG_LVL_ALL, "=====>");
1457 if ((pstAddIndication->u8Type == DSD_REQ) || 1457 if ((pstAddIndication->u8Type == DSD_REQ) ||
1458 (pstAddIndication->u8Type == DSD_RSP) || 1458 (pstAddIndication->u8Type == DSD_RSP) ||
1459 (pstAddIndication->u8Type == DSD_ACK)) 1459 (pstAddIndication->u8Type == DSD_ACK))
1460 return (stLocalSFAddIndicationAlt *)pvBuffer; 1460 return (struct bcm_add_indication_alt *)pvBuffer;
1461 1461
1462 BCM_DEBUG_PRINT(Adapter, DBG_TYPE_OTHERS, CONN_MSG, DBG_LVL_ALL, "Inside RestoreCmControlResponseMessage "); 1462 BCM_DEBUG_PRINT(Adapter, DBG_TYPE_OTHERS, CONN_MSG, DBG_LVL_ALL, "Inside RestoreCmControlResponseMessage ");
1463 /* 1463 /*
1464 * Need to Allocate memory to contain the SUPER Large structures 1464 * Need to Allocate memory to contain the SUPER Large structures
1465 * Our driver can't create these structures on Stack :( 1465 * Our driver can't create these structures on Stack :(
1466 */ 1466 */
1467 pstAddIndicationDest = kmalloc(sizeof(stLocalSFAddIndicationAlt), GFP_KERNEL); 1467 pstAddIndicationDest = kmalloc(sizeof(struct bcm_add_indication_alt), GFP_KERNEL);
1468 1468
1469 if (pstAddIndicationDest) { 1469 if (pstAddIndicationDest) {
1470 memset(pstAddIndicationDest, 0, sizeof(stLocalSFAddIndicationAlt)); 1470 memset(pstAddIndicationDest, 0, sizeof(struct bcm_add_indication_alt));
1471 } else { 1471 } else {
1472 BCM_DEBUG_PRINT(Adapter, DBG_TYPE_OTHERS, CONN_MSG, DBG_LVL_ALL, "Failed to allocate memory for SF Add Indication Structure "); 1472 BCM_DEBUG_PRINT(Adapter, DBG_TYPE_OTHERS, CONN_MSG, DBG_LVL_ALL, "Failed to allocate memory for SF Add Indication Structure ");
1473 return NULL; 1473 return NULL;
@@ -1573,36 +1573,36 @@ ULONG SetUpTargetDsxBuffers(struct bcm_mini_adapter *Adapter)
1573 1573
1574static ULONG GetNextTargetBufferLocation(struct bcm_mini_adapter *Adapter, B_UINT16 tid) 1574static ULONG GetNextTargetBufferLocation(struct bcm_mini_adapter *Adapter, B_UINT16 tid)
1575{ 1575{
1576 ULONG ulTargetDSXBufferAddress; 1576 ULONG dsx_buf;
1577 ULONG ulTargetDsxBufferIndexToUse, ulMaxTry; 1577 ULONG idx, max_try;
1578 1578
1579 if ((Adapter->ulTotalTargetBuffersAvailable == 0) || (Adapter->ulFreeTargetBufferCnt == 0)) { 1579 if ((Adapter->ulTotalTargetBuffersAvailable == 0) || (Adapter->ulFreeTargetBufferCnt == 0)) {
1580 ClearTargetDSXBuffer(Adapter, tid, FALSE); 1580 ClearTargetDSXBuffer(Adapter, tid, FALSE);
1581 return 0; 1581 return 0;
1582 } 1582 }
1583 1583
1584 ulTargetDsxBufferIndexToUse = Adapter->ulCurrentTargetBuffer; 1584 idx = Adapter->ulCurrentTargetBuffer;
1585 ulMaxTry = Adapter->ulTotalTargetBuffersAvailable; 1585 max_try = Adapter->ulTotalTargetBuffersAvailable;
1586 while ((ulMaxTry) && (Adapter->astTargetDsxBuffer[ulTargetDsxBufferIndexToUse].valid != 1)) { 1586 while ((max_try) && (Adapter->astTargetDsxBuffer[idx].valid != 1)) {
1587 ulTargetDsxBufferIndexToUse = (ulTargetDsxBufferIndexToUse+1) % Adapter->ulTotalTargetBuffersAvailable; 1587 idx = (idx+1) % Adapter->ulTotalTargetBuffersAvailable;
1588 ulMaxTry--; 1588 max_try--;
1589 } 1589 }
1590 1590
1591 if (ulMaxTry == 0) { 1591 if (max_try == 0) {
1592 BCM_DEBUG_PRINT(Adapter, DBG_TYPE_PRINTK, 0, 0, "\n GetNextTargetBufferLocation : Error No Free Target DSX Buffers FreeCnt : %lx ", Adapter->ulFreeTargetBufferCnt); 1592 BCM_DEBUG_PRINT(Adapter, DBG_TYPE_PRINTK, 0, 0, "\n GetNextTargetBufferLocation : Error No Free Target DSX Buffers FreeCnt : %lx ", Adapter->ulFreeTargetBufferCnt);
1593 ClearTargetDSXBuffer(Adapter, tid, FALSE); 1593 ClearTargetDSXBuffer(Adapter, tid, FALSE);
1594 return 0; 1594 return 0;
1595 } 1595 }
1596 1596
1597 ulTargetDSXBufferAddress = Adapter->astTargetDsxBuffer[ulTargetDsxBufferIndexToUse].ulTargetDsxBuffer; 1597 dsx_buf = Adapter->astTargetDsxBuffer[idx].ulTargetDsxBuffer;
1598 Adapter->astTargetDsxBuffer[ulTargetDsxBufferIndexToUse].valid = 0; 1598 Adapter->astTargetDsxBuffer[idx].valid = 0;
1599 Adapter->astTargetDsxBuffer[ulTargetDsxBufferIndexToUse].tid = tid; 1599 Adapter->astTargetDsxBuffer[idx].tid = tid;
1600 Adapter->ulFreeTargetBufferCnt--; 1600 Adapter->ulFreeTargetBufferCnt--;
1601 ulTargetDsxBufferIndexToUse = (ulTargetDsxBufferIndexToUse+1)%Adapter->ulTotalTargetBuffersAvailable; 1601 idx = (idx+1)%Adapter->ulTotalTargetBuffersAvailable;
1602 Adapter->ulCurrentTargetBuffer = ulTargetDsxBufferIndexToUse; 1602 Adapter->ulCurrentTargetBuffer = idx;
1603 BCM_DEBUG_PRINT(Adapter, DBG_TYPE_PRINTK, 0, 0, "GetNextTargetBufferLocation :Returning address %lx tid %d\n", ulTargetDSXBufferAddress, tid); 1603 BCM_DEBUG_PRINT(Adapter, DBG_TYPE_PRINTK, 0, 0, "GetNextTargetBufferLocation :Returning address %lx tid %d\n", dsx_buf, tid);
1604 1604
1605 return ulTargetDSXBufferAddress; 1605 return dsx_buf;
1606} 1606}
1607 1607
1608int AllocAdapterDsxBuffer(struct bcm_mini_adapter *Adapter) 1608int AllocAdapterDsxBuffer(struct bcm_mini_adapter *Adapter)
@@ -1611,7 +1611,7 @@ int AllocAdapterDsxBuffer(struct bcm_mini_adapter *Adapter)
1611 * Need to Allocate memory to contain the SUPER Large structures 1611 * Need to Allocate memory to contain the SUPER Large structures
1612 * Our driver can't create these structures on Stack 1612 * Our driver can't create these structures on Stack
1613 */ 1613 */
1614 Adapter->caDsxReqResp = kmalloc(sizeof(stLocalSFAddIndicationAlt)+LEADER_SIZE, GFP_KERNEL); 1614 Adapter->caDsxReqResp = kmalloc(sizeof(struct bcm_add_indication_alt)+LEADER_SIZE, GFP_KERNEL);
1615 if (!Adapter->caDsxReqResp) 1615 if (!Adapter->caDsxReqResp)
1616 return -ENOMEM; 1616 return -ENOMEM;
1617 1617
@@ -1634,8 +1634,8 @@ BOOLEAN CmControlResponseMessage(struct bcm_mini_adapter *Adapter, /* <Pointer
1634 PVOID pvBuffer /* Starting Address of the Buffer, that contains the AddIndication Data */) 1634 PVOID pvBuffer /* Starting Address of the Buffer, that contains the AddIndication Data */)
1635{ 1635{
1636 struct bcm_connect_mgr_params *psfLocalSet = NULL; 1636 struct bcm_connect_mgr_params *psfLocalSet = NULL;
1637 stLocalSFAddIndicationAlt *pstAddIndication = NULL; 1637 struct bcm_add_indication_alt *pstAddIndication = NULL;
1638 stLocalSFChangeIndicationAlt *pstChangeIndication = NULL; 1638 struct bcm_change_indication *pstChangeIndication = NULL;
1639 struct bcm_leader *pLeader = NULL; 1639 struct bcm_leader *pLeader = NULL;
1640 1640
1641 /* 1641 /*
@@ -1661,12 +1661,12 @@ BOOLEAN CmControlResponseMessage(struct bcm_mini_adapter *Adapter, /* <Pointer
1661 switch (pstAddIndication->u8Type) { 1661 switch (pstAddIndication->u8Type) {
1662 case DSA_REQ: 1662 case DSA_REQ:
1663 { 1663 {
1664 pLeader->PLength = sizeof(stLocalSFAddIndicationAlt); 1664 pLeader->PLength = sizeof(struct bcm_add_indication_alt);
1665 BCM_DEBUG_PRINT(Adapter, DBG_TYPE_OTHERS, CONN_MSG, DBG_LVL_ALL, "Sending DSA Response....\n"); 1665 BCM_DEBUG_PRINT(Adapter, DBG_TYPE_OTHERS, CONN_MSG, DBG_LVL_ALL, "Sending DSA Response....\n");
1666 BCM_DEBUG_PRINT(Adapter, DBG_TYPE_OTHERS, CONN_MSG, DBG_LVL_ALL, "SENDING DSA RESPONSE TO MAC %d", pLeader->PLength); 1666 BCM_DEBUG_PRINT(Adapter, DBG_TYPE_OTHERS, CONN_MSG, DBG_LVL_ALL, "SENDING DSA RESPONSE TO MAC %d", pLeader->PLength);
1667 *((stLocalSFAddIndicationAlt *)&(Adapter->caDsxReqResp[LEADER_SIZE])) 1667 *((struct bcm_add_indication_alt *)&(Adapter->caDsxReqResp[LEADER_SIZE]))
1668 = *pstAddIndication; 1668 = *pstAddIndication;
1669 ((stLocalSFAddIndicationAlt *)&(Adapter->caDsxReqResp[LEADER_SIZE]))->u8Type = DSA_RSP; 1669 ((struct bcm_add_indication_alt *)&(Adapter->caDsxReqResp[LEADER_SIZE]))->u8Type = DSA_RSP;
1670 1670
1671 BCM_DEBUG_PRINT(Adapter, DBG_TYPE_OTHERS, CONN_MSG, DBG_LVL_ALL, " VCID = %x", ntohs(pstAddIndication->u16VCID)); 1671 BCM_DEBUG_PRINT(Adapter, DBG_TYPE_OTHERS, CONN_MSG, DBG_LVL_ALL, " VCID = %x", ntohs(pstAddIndication->u16VCID));
1672 CopyBufferToControlPacket(Adapter, (PVOID)Adapter->caDsxReqResp); 1672 CopyBufferToControlPacket(Adapter, (PVOID)Adapter->caDsxReqResp);
@@ -1675,12 +1675,12 @@ BOOLEAN CmControlResponseMessage(struct bcm_mini_adapter *Adapter, /* <Pointer
1675 break; 1675 break;
1676 case DSA_RSP: 1676 case DSA_RSP:
1677 { 1677 {
1678 pLeader->PLength = sizeof(stLocalSFAddIndicationAlt); 1678 pLeader->PLength = sizeof(struct bcm_add_indication_alt);
1679 BCM_DEBUG_PRINT(Adapter, DBG_TYPE_OTHERS, CONN_MSG, DBG_LVL_ALL, "SENDING DSA ACK TO MAC %d", 1679 BCM_DEBUG_PRINT(Adapter, DBG_TYPE_OTHERS, CONN_MSG, DBG_LVL_ALL, "SENDING DSA ACK TO MAC %d",
1680 pLeader->PLength); 1680 pLeader->PLength);
1681 *((stLocalSFAddIndicationAlt *)&(Adapter->caDsxReqResp[LEADER_SIZE])) 1681 *((struct bcm_add_indication_alt *)&(Adapter->caDsxReqResp[LEADER_SIZE]))
1682 = *pstAddIndication; 1682 = *pstAddIndication;
1683 ((stLocalSFAddIndicationAlt *)&(Adapter->caDsxReqResp[LEADER_SIZE]))->u8Type = DSA_ACK; 1683 ((struct bcm_add_indication_alt *)&(Adapter->caDsxReqResp[LEADER_SIZE]))->u8Type = DSA_ACK;
1684 1684
1685 } /* no break here..we should go down. */ 1685 } /* no break here..we should go down. */
1686 case DSA_ACK: 1686 case DSA_ACK:
@@ -1773,12 +1773,12 @@ BOOLEAN CmControlResponseMessage(struct bcm_mini_adapter *Adapter, /* <Pointer
1773 break; 1773 break;
1774 case DSC_REQ: 1774 case DSC_REQ:
1775 { 1775 {
1776 pLeader->PLength = sizeof(stLocalSFChangeIndicationAlt); 1776 pLeader->PLength = sizeof(struct bcm_change_indication);
1777 pstChangeIndication = (stLocalSFChangeIndicationAlt *)pstAddIndication; 1777 pstChangeIndication = (struct bcm_change_indication *)pstAddIndication;
1778 BCM_DEBUG_PRINT(Adapter, DBG_TYPE_OTHERS, CONN_MSG, DBG_LVL_ALL, "SENDING DSC RESPONSE TO MAC %d", pLeader->PLength); 1778 BCM_DEBUG_PRINT(Adapter, DBG_TYPE_OTHERS, CONN_MSG, DBG_LVL_ALL, "SENDING DSC RESPONSE TO MAC %d", pLeader->PLength);
1779 1779
1780 *((stLocalSFChangeIndicationAlt *)&(Adapter->caDsxReqResp[LEADER_SIZE])) = *pstChangeIndication; 1780 *((struct bcm_change_indication *)&(Adapter->caDsxReqResp[LEADER_SIZE])) = *pstChangeIndication;
1781 ((stLocalSFChangeIndicationAlt *)&(Adapter->caDsxReqResp[LEADER_SIZE]))->u8Type = DSC_RSP; 1781 ((struct bcm_change_indication *)&(Adapter->caDsxReqResp[LEADER_SIZE]))->u8Type = DSC_RSP;
1782 1782
1783 CopyBufferToControlPacket(Adapter, (PVOID)Adapter->caDsxReqResp); 1783 CopyBufferToControlPacket(Adapter, (PVOID)Adapter->caDsxReqResp);
1784 kfree(pstAddIndication); 1784 kfree(pstAddIndication);
@@ -1786,17 +1786,17 @@ BOOLEAN CmControlResponseMessage(struct bcm_mini_adapter *Adapter, /* <Pointer
1786 break; 1786 break;
1787 case DSC_RSP: 1787 case DSC_RSP:
1788 { 1788 {
1789 pLeader->PLength = sizeof(stLocalSFChangeIndicationAlt); 1789 pLeader->PLength = sizeof(struct bcm_change_indication);
1790 pstChangeIndication = (stLocalSFChangeIndicationAlt *)pstAddIndication; 1790 pstChangeIndication = (struct bcm_change_indication *)pstAddIndication;
1791 BCM_DEBUG_PRINT(Adapter, DBG_TYPE_OTHERS, CONN_MSG, DBG_LVL_ALL, "SENDING DSC ACK TO MAC %d", pLeader->PLength); 1791 BCM_DEBUG_PRINT(Adapter, DBG_TYPE_OTHERS, CONN_MSG, DBG_LVL_ALL, "SENDING DSC ACK TO MAC %d", pLeader->PLength);
1792 *((stLocalSFChangeIndicationAlt *)&(Adapter->caDsxReqResp[LEADER_SIZE])) = *pstChangeIndication; 1792 *((struct bcm_change_indication *)&(Adapter->caDsxReqResp[LEADER_SIZE])) = *pstChangeIndication;
1793 ((stLocalSFChangeIndicationAlt *)&(Adapter->caDsxReqResp[LEADER_SIZE]))->u8Type = DSC_ACK; 1793 ((struct bcm_change_indication *)&(Adapter->caDsxReqResp[LEADER_SIZE]))->u8Type = DSC_ACK;
1794 } 1794 }
1795 case DSC_ACK: 1795 case DSC_ACK:
1796 { 1796 {
1797 UINT uiSearchRuleIndex = 0; 1797 UINT uiSearchRuleIndex = 0;
1798 1798
1799 pstChangeIndication = (stLocalSFChangeIndicationAlt *)pstAddIndication; 1799 pstChangeIndication = (struct bcm_change_indication *)pstAddIndication;
1800 uiSearchRuleIndex = SearchSfid(Adapter, ntohl(pstChangeIndication->sfActiveSet.u32SFID)); 1800 uiSearchRuleIndex = SearchSfid(Adapter, ntohl(pstChangeIndication->sfActiveSet.u32SFID));
1801 if (uiSearchRuleIndex > NO_OF_QUEUES-1) 1801 if (uiSearchRuleIndex > NO_OF_QUEUES-1)
1802 BCM_DEBUG_PRINT(Adapter, DBG_TYPE_PRINTK, 0, 0, "SF doesn't exist for which DSC_ACK is received"); 1802 BCM_DEBUG_PRINT(Adapter, DBG_TYPE_PRINTK, 0, 0, "SF doesn't exist for which DSC_ACK is received");
@@ -1902,7 +1902,7 @@ int get_dsx_sf_data_to_application(struct bcm_mini_adapter *Adapter, UINT uiSFId
1902 BCM_DEBUG_PRINT(Adapter, DBG_TYPE_OTHERS, CONN_MSG, DBG_LVL_ALL, "status =%d", status); 1902 BCM_DEBUG_PRINT(Adapter, DBG_TYPE_OTHERS, CONN_MSG, DBG_LVL_ALL, "status =%d", status);
1903 psSfInfo = &Adapter->PackInfo[status]; 1903 psSfInfo = &Adapter->PackInfo[status];
1904 if (psSfInfo->pstSFIndication && copy_to_user(user_buffer, 1904 if (psSfInfo->pstSFIndication && copy_to_user(user_buffer,
1905 psSfInfo->pstSFIndication, sizeof(stLocalSFAddIndicationAlt))) { 1905 psSfInfo->pstSFIndication, sizeof(struct bcm_add_indication_alt))) {
1906 BCM_DEBUG_PRINT(Adapter, DBG_TYPE_PRINTK, 0, 0, "copy to user failed SFID %d, present in queue !!!", uiSFId); 1906 BCM_DEBUG_PRINT(Adapter, DBG_TYPE_PRINTK, 0, 0, "copy to user failed SFID %d, present in queue !!!", uiSFId);
1907 status = -EFAULT; 1907 status = -EFAULT;
1908 return status; 1908 return status;
diff --git a/drivers/staging/bcm/CmHost.h b/drivers/staging/bcm/CmHost.h
index 1c5a07c7bbe2..eecad8d90aea 100644
--- a/drivers/staging/bcm/CmHost.h
+++ b/drivers/staging/bcm/CmHost.h
@@ -1,147 +1,66 @@
1/// ************************************************************************** 1/***************************************************************************
2/// (c) Beceem Communications Inc. 2 * (c) Beceem Communications Inc.
3/// All Rights Reserved 3 * All Rights Reserved
4/// 4 *
5/// \file : CmHost.h 5 * file : CmHost.h
6/// \author : Rajeev Tirumala 6 * author: Rajeev Tirumala
7/// \date : September 8 , 2006 7 * date : September 8 , 2006
8/// \brief : Definitions for Connection Management Requests structure 8 * brief : Definitions for Connection Management Requests structure
9/// which we will use to setup our connection structures.Its high 9 * which we will use to setup our connection structures.Its high
10/// time we had a header file for CmHost.cpp to isolate the way 10 * time we had a header file for CmHost.cpp to isolate the way
11/// f/w sends DSx messages and the way we interpret them in code. 11 * f/w sends DSx messages and the way we interpret them in code.
12/// Revision History 12 * Revision History
13/// 13 *
14/// Date Author Version Description 14 * Date Author Version Description
15/// 08-Sep-06 Rajeev 0.1 Created 15 * 08-Sep-06 Rajeev 0.1 Created
16/// ************************************************************************** 16 ***************************************************************************/
17#ifndef _CM_HOST_H 17#ifndef _CM_HOST_H
18#define _CM_HOST_H 18#define _CM_HOST_H
19 19
20#pragma once 20#pragma once
21#pragma pack (push,4) 21#pragma pack(push, 4)
22 22
23#define DSX_MESSAGE_EXCHANGE_BUFFER 0xBF60AC84 // This contains the pointer 23#define DSX_MESSAGE_EXCHANGE_BUFFER 0xBF60AC84 /* This contains the pointer */
24#define DSX_MESSAGE_EXCHANGE_BUFFER_SIZE 72000 // 24 K Bytes 24#define DSX_MESSAGE_EXCHANGE_BUFFER_SIZE 72000 /* 24 K Bytes */
25 25
26/// \brief structure stLocalSFAddRequest 26struct bcm_add_indication_alt {
27typedef struct stLocalSFAddRequestAlt{ 27 u8 u8Type;
28 B_UINT8 u8Type; 28 u8 u8Direction;
29 B_UINT8 u8Direction; 29 u16 u16TID;
30 30 /* brief 16bitCID */
31 B_UINT16 u16TID; 31 u16 u16CID;
32 /// \brief 16bitCID 32 /* brief 16bitVCID */
33 B_UINT16 u16CID; 33 u16 u16VCID;
34 /// \brief 16bitVCID
35 B_UINT16 u16VCID;
36
37
38 struct bcm_connect_mgr_params sfParameterSet;
39
40 //USE_MEMORY_MANAGER();
41}stLocalSFAddRequestAlt;
42
43/// \brief structure stLocalSFAddIndication
44typedef struct stLocalSFAddIndicationAlt{
45 B_UINT8 u8Type;
46 B_UINT8 u8Direction;
47 B_UINT16 u16TID;
48 /// \brief 16bitCID
49 B_UINT16 u16CID;
50 /// \brief 16bitVCID
51 B_UINT16 u16VCID;
52 struct bcm_connect_mgr_params sfAuthorizedSet; 34 struct bcm_connect_mgr_params sfAuthorizedSet;
53 struct bcm_connect_mgr_params sfAdmittedSet; 35 struct bcm_connect_mgr_params sfAdmittedSet;
54 struct bcm_connect_mgr_params sfActiveSet; 36 struct bcm_connect_mgr_params sfActiveSet;
55 37 u8 u8CC; /* < Confirmation Code */
56 B_UINT8 u8CC; /**< Confirmation Code*/ 38 u8 u8Padd; /* < 8-bit Padding */
57 B_UINT8 u8Padd; /**< 8-bit Padding */ 39 u16 u16Padd; /* < 16 bit Padding */
58 B_UINT16 u16Padd; /**< 16 bit Padding */ 40};
59// USE_MEMORY_MANAGER(); 41
60}stLocalSFAddIndicationAlt; 42struct bcm_change_indication {
61 43 u8 u8Type;
62/// \brief structure stLocalSFAddConfirmation 44 u8 u8Direction;
63typedef struct stLocalSFAddConfirmationAlt{ 45 u16 u16TID;
64 B_UINT8 u8Type; 46 /* brief 16bitCID */
65 B_UINT8 u8Direction; 47 u16 u16CID;
66 B_UINT16 u16TID; 48 /* brief 16bitVCID */
67 /// \brief 16bitCID 49 u16 u16VCID;
68 B_UINT16 u16CID;
69 /// \brief 16bitVCID
70 B_UINT16 u16VCID;
71 struct bcm_connect_mgr_params sfAuthorizedSet; 50 struct bcm_connect_mgr_params sfAuthorizedSet;
72 struct bcm_connect_mgr_params sfAdmittedSet; 51 struct bcm_connect_mgr_params sfAdmittedSet;
73 struct bcm_connect_mgr_params sfActiveSet; 52 struct bcm_connect_mgr_params sfActiveSet;
74}stLocalSFAddConfirmationAlt; 53 u8 u8CC; /* < Confirmation Code */
75 54 u8 u8Padd; /* < 8-bit Padding */
76 55 u16 u16Padd; /* < 16 bit */
77/// \brief structure stLocalSFChangeRequest 56};
78typedef struct stLocalSFChangeRequestAlt{ 57
79 B_UINT8 u8Type; 58unsigned long StoreCmControlResponseMessage(struct bcm_mini_adapter *Adapter, void *pvBuffer, unsigned int *puBufferLength);
80 B_UINT8 u8Direction; 59int AllocAdapterDsxBuffer(struct bcm_mini_adapter *Adapter);
81 B_UINT16 u16TID; 60int FreeAdapterDsxBuffer(struct bcm_mini_adapter *Adapter);
82 /// \brief 16bitCID 61unsigned long SetUpTargetDsxBuffers(struct bcm_mini_adapter *Adapter);
83 B_UINT16 u16CID; 62BOOLEAN CmControlResponseMessage(struct bcm_mini_adapter *Adapter, void *pvBuffer);
84 /// \brief 16bitVCID 63
85 B_UINT16 u16VCID; 64#pragma pack(pop)
86 /*
87 //Pointer location at which following connection manager param Structure can be read
88 //from the target. We only get the address location and we need to read out the
89 //entire connection manager param structure at the given location on target
90 */
91 struct bcm_connect_mgr_params sfAuthorizedSet;
92 struct bcm_connect_mgr_params sfAdmittedSet;
93 struct bcm_connect_mgr_params sfActiveSet;
94
95 B_UINT8 u8CC; /**< Confirmation Code*/
96 B_UINT8 u8Padd; /**< 8-bit Padding */
97 B_UINT16 u16Padd; /**< 16 bit */
98
99}stLocalSFChangeRequestAlt;
100
101/// \brief structure stLocalSFChangeConfirmation
102typedef struct stLocalSFChangeConfirmationAlt{
103 B_UINT8 u8Type;
104 B_UINT8 u8Direction;
105 B_UINT16 u16TID;
106 /// \brief 16bitCID
107 B_UINT16 u16CID;
108 /// \brief 16bitVCID
109 B_UINT16 u16VCID;
110 struct bcm_connect_mgr_params sfAuthorizedSet;
111 struct bcm_connect_mgr_params sfAdmittedSet;
112 struct bcm_connect_mgr_params sfActiveSet;
113
114}stLocalSFChangeConfirmationAlt;
115
116/// \brief structure stLocalSFChangeIndication
117typedef struct stLocalSFChangeIndicationAlt{
118 B_UINT8 u8Type;
119 B_UINT8 u8Direction;
120 B_UINT16 u16TID;
121 /// \brief 16bitCID
122 B_UINT16 u16CID;
123 /// \brief 16bitVCID
124 B_UINT16 u16VCID;
125 struct bcm_connect_mgr_params sfAuthorizedSet;
126 struct bcm_connect_mgr_params sfAdmittedSet;
127 struct bcm_connect_mgr_params sfActiveSet;
128
129 B_UINT8 u8CC; /**< Confirmation Code*/
130 B_UINT8 u8Padd; /**< 8-bit Padding */
131 B_UINT16 u16Padd; /**< 16 bit */
132
133}stLocalSFChangeIndicationAlt;
134
135ULONG StoreCmControlResponseMessage(struct bcm_mini_adapter *Adapter, PVOID pvBuffer,UINT *puBufferLength);
136
137INT AllocAdapterDsxBuffer(struct bcm_mini_adapter *Adapter);
138
139INT FreeAdapterDsxBuffer(struct bcm_mini_adapter *Adapter);
140ULONG SetUpTargetDsxBuffers(struct bcm_mini_adapter *Adapter);
141
142BOOLEAN CmControlResponseMessage(struct bcm_mini_adapter *Adapter, PVOID pvBuffer);
143
144
145#pragma pack (pop)
146 65
147#endif 66#endif
diff --git a/drivers/staging/bcm/HandleControlPacket.c b/drivers/staging/bcm/HandleControlPacket.c
index 25e5c68bfe85..1bb53e247a62 100644
--- a/drivers/staging/bcm/HandleControlPacket.c
+++ b/drivers/staging/bcm/HandleControlPacket.c
@@ -226,7 +226,7 @@ INT flushAllAppQ(void)
226 pTarang->AppCtrlQueueLen = 0; 226 pTarang->AppCtrlQueueLen = 0;
227 /* dropped contrl packet statistics also should be reset. */ 227 /* dropped contrl packet statistics also should be reset. */
228 memset((PVOID)&pTarang->stDroppedAppCntrlMsgs, 0, 228 memset((PVOID)&pTarang->stDroppedAppCntrlMsgs, 0,
229 sizeof(S_MIBS_DROPPED_APP_CNTRL_MESSAGES)); 229 sizeof(struct bcm_mibs_dropped_cntrl_msg));
230 230
231 } 231 }
232 return STATUS_SUCCESS; 232 return STATUS_SUCCESS;
diff --git a/drivers/staging/bcm/HostMIBSInterface.h b/drivers/staging/bcm/HostMIBSInterface.h
index e34531b638e8..f922ac49b70e 100644
--- a/drivers/staging/bcm/HostMIBSInterface.h
+++ b/drivers/staging/bcm/HostMIBSInterface.h
@@ -1,5 +1,3 @@
1
2
3#ifndef _HOST_MIBSINTERFACE_H 1#ifndef _HOST_MIBSINTERFACE_H
4#define _HOST_MIBSINTERFACE_H 2#define _HOST_MIBSINTERFACE_H
5 3
@@ -10,221 +8,185 @@
10 * statistics used for the MIBS. 8 * statistics used for the MIBS.
11 */ 9 */
12 10
13#define MIBS_MAX_CLASSIFIERS 100 11#define MIBS_MAX_CLASSIFIERS 100
14#define MIBS_MAX_PHSRULES 100 12#define MIBS_MAX_PHSRULES 100
15#define MIBS_MAX_SERVICEFLOWS 17 13#define MIBS_MAX_SERVICEFLOWS 17
16#define MIBS_MAX_IP_RANGE_LENGTH 4 14#define MIBS_MAX_IP_RANGE_LENGTH 4
17#define MIBS_MAX_PORT_RANGE 4 15#define MIBS_MAX_PORT_RANGE 4
18#define MIBS_MAX_PROTOCOL_LENGTH 32 16#define MIBS_MAX_PROTOCOL_LENGTH 32
19#define MIBS_MAX_PHS_LENGTHS 255 17#define MIBS_MAX_PHS_LENGTHS 255
20#define MIBS_IPV6_ADDRESS_SIZEINBYTES 0x10 18#define MIBS_IPV6_ADDRESS_SIZEINBYTES 0x10
21#define MIBS_IP_LENGTH_OF_ADDRESS 4 19#define MIBS_IP_LENGTH_OF_ADDRESS 4
22#define MIBS_MAX_HIST_ENTRIES 12 20#define MIBS_MAX_HIST_ENTRIES 12
23#define MIBS_PKTSIZEHIST_RANGE 128 21#define MIBS_PKTSIZEHIST_RANGE 128
24 22
25typedef union _U_MIBS_IP_ADDRESS 23union bcm_mibs_ip_addr {
26{ 24 struct {
27 struct 25 /* Source Ip Address Range */
28 { 26 unsigned long ulIpv4Addr[MIBS_MAX_IP_RANGE_LENGTH];
29 //Source Ip Address Range 27 /* Source Ip Mask Address Range */
30 ULONG ulIpv4Addr[MIBS_MAX_IP_RANGE_LENGTH]; 28 unsigned long ulIpv4Mask[MIBS_MAX_IP_RANGE_LENGTH];
31 //Source Ip Mask Address Range
32 ULONG ulIpv4Mask[MIBS_MAX_IP_RANGE_LENGTH];
33 }; 29 };
34 struct 30 struct {
35 { 31 /* Source Ip Address Range */
36 //Source Ip Address Range 32 unsigned long ulIpv6Addr[MIBS_MAX_IP_RANGE_LENGTH * 4];
37 ULONG ulIpv6Addr[MIBS_MAX_IP_RANGE_LENGTH * 4]; 33 /* Source Ip Mask Address Range */
38 //Source Ip Mask Address Range 34 unsigned long ulIpv6Mask[MIBS_MAX_IP_RANGE_LENGTH * 4];
39 ULONG ulIpv6Mask[MIBS_MAX_IP_RANGE_LENGTH * 4];
40
41 }; 35 };
42 struct 36 struct {
43 { 37 unsigned char ucIpv4Address[MIBS_MAX_IP_RANGE_LENGTH * MIBS_IP_LENGTH_OF_ADDRESS];
44 UCHAR ucIpv4Address[MIBS_MAX_IP_RANGE_LENGTH * 38 unsigned char ucIpv4Mask[MIBS_MAX_IP_RANGE_LENGTH * MIBS_IP_LENGTH_OF_ADDRESS];
45 MIBS_IP_LENGTH_OF_ADDRESS];
46 UCHAR ucIpv4Mask[MIBS_MAX_IP_RANGE_LENGTH *
47 MIBS_IP_LENGTH_OF_ADDRESS];
48 }; 39 };
49 struct 40 struct {
50 { 41 unsigned char ucIpv6Address[MIBS_MAX_IP_RANGE_LENGTH * MIBS_IPV6_ADDRESS_SIZEINBYTES];
51 UCHAR ucIpv6Address[MIBS_MAX_IP_RANGE_LENGTH * MIBS_IPV6_ADDRESS_SIZEINBYTES]; 42 unsigned char ucIpv6Mask[MIBS_MAX_IP_RANGE_LENGTH * MIBS_IPV6_ADDRESS_SIZEINBYTES];
52 UCHAR ucIpv6Mask[MIBS_MAX_IP_RANGE_LENGTH * MIBS_IPV6_ADDRESS_SIZEINBYTES];
53 }; 43 };
54}U_MIBS_IP_ADDRESS; 44};
55 45
56 46struct bcm_mibs_host_info {
57typedef struct _S_MIBS_HOST_INFO 47 u64 GoodTransmits;
58{ 48 u64 GoodReceives;
59 ULONG64 GoodTransmits; 49 /* this to keep track of the Tx and Rx MailBox Registers. */
60 ULONG64 GoodReceives; 50 unsigned long NumDesUsed;
61 // this to keep track of the Tx and Rx MailBox Registers. 51 unsigned long CurrNumFreeDesc;
62 ULONG NumDesUsed; 52 unsigned long PrevNumFreeDesc;
63 ULONG CurrNumFreeDesc; 53 /* to keep track the no of byte received */
64 ULONG PrevNumFreeDesc; 54 unsigned long PrevNumRcevBytes;
65 // to keep track the no of byte received 55 unsigned long CurrNumRcevBytes;
66 ULONG PrevNumRcevBytes;
67 ULONG CurrNumRcevBytes;
68
69 /* QOS Related */ 56 /* QOS Related */
70 ULONG BEBucketSize; 57 unsigned long BEBucketSize;
71 ULONG rtPSBucketSize; 58 unsigned long rtPSBucketSize;
72 ULONG LastTxQueueIndex; 59 unsigned long LastTxQueueIndex;
73 BOOLEAN TxOutofDescriptors; 60 bool TxOutofDescriptors;
74 BOOLEAN TimerActive; 61 bool TimerActive;
75 UINT32 u32TotalDSD; 62 u32 u32TotalDSD;
76 UINT32 aTxPktSizeHist[MIBS_MAX_HIST_ENTRIES]; 63 u32 aTxPktSizeHist[MIBS_MAX_HIST_ENTRIES];
77 UINT32 aRxPktSizeHist[MIBS_MAX_HIST_ENTRIES]; 64 u32 aRxPktSizeHist[MIBS_MAX_HIST_ENTRIES];
78}S_MIBS_HOST_INFO; 65};
79 66
80typedef struct _S_MIBS_CLASSIFIER_RULE 67struct bcm_mibs_classifier_rule {
81{ 68 unsigned long ulSFID;
82 ULONG ulSFID; 69 unsigned char ucReserved[2];
83 UCHAR ucReserved[2]; 70 u16 uiClassifierRuleIndex;
84 B_UINT16 uiClassifierRuleIndex; 71 bool bUsed;
85 BOOLEAN bUsed; 72 unsigned short usVCID_Value;
86 USHORT usVCID_Value; 73 u8 u8ClassifierRulePriority;
87 // This field detemines the Classifier Priority 74 union bcm_mibs_ip_addr stSrcIpAddress;
88 B_UINT8 u8ClassifierRulePriority; 75 /* IP Source Address Length */
89 U_MIBS_IP_ADDRESS stSrcIpAddress; 76 unsigned char ucIPSourceAddressLength;
90 /*IP Source Address Length*/ 77 union bcm_mibs_ip_addr stDestIpAddress;
91 UCHAR ucIPSourceAddressLength;
92
93 U_MIBS_IP_ADDRESS stDestIpAddress;
94 /* IP Destination Address Length */ 78 /* IP Destination Address Length */
95 UCHAR ucIPDestinationAddressLength; 79 unsigned char ucIPDestinationAddressLength;
96 UCHAR ucIPTypeOfServiceLength;//Type of service Length 80 unsigned char ucIPTypeOfServiceLength;
97 UCHAR ucTosLow;//Tos Low 81 unsigned char ucTosLow;
98 UCHAR ucTosHigh;//Tos High 82 unsigned char ucTosHigh;
99 UCHAR ucTosMask;//Tos Mask 83 unsigned char ucTosMask;
100 UCHAR ucProtocolLength;//protocol Length 84 unsigned char ucProtocolLength;
101 UCHAR ucProtocol[MIBS_MAX_PROTOCOL_LENGTH];//protocol Length 85 unsigned char ucProtocol[MIBS_MAX_PROTOCOL_LENGTH];
102 USHORT usSrcPortRangeLo[MIBS_MAX_PORT_RANGE]; 86 unsigned short usSrcPortRangeLo[MIBS_MAX_PORT_RANGE];
103 USHORT usSrcPortRangeHi[MIBS_MAX_PORT_RANGE]; 87 unsigned short usSrcPortRangeHi[MIBS_MAX_PORT_RANGE];
104 UCHAR ucSrcPortRangeLength; 88 unsigned char ucSrcPortRangeLength;
105 USHORT usDestPortRangeLo[MIBS_MAX_PORT_RANGE]; 89 unsigned short usDestPortRangeLo[MIBS_MAX_PORT_RANGE];
106 USHORT usDestPortRangeHi[MIBS_MAX_PORT_RANGE]; 90 unsigned short usDestPortRangeHi[MIBS_MAX_PORT_RANGE];
107 UCHAR ucDestPortRangeLength; 91 unsigned char ucDestPortRangeLength;
108 BOOLEAN bProtocolValid; 92 bool bProtocolValid;
109 BOOLEAN bTOSValid; 93 bool bTOSValid;
110 BOOLEAN bDestIpValid; 94 bool bDestIpValid;
111 BOOLEAN bSrcIpValid; 95 bool bSrcIpValid;
112 UCHAR ucDirection; 96 unsigned char ucDirection;
113 BOOLEAN bIpv6Protocol; 97 bool bIpv6Protocol;
114 UINT32 u32PHSRuleID; 98 u32 u32PHSRuleID;
115}S_MIBS_CLASSIFIER_RULE; 99};
116 100
117 101struct bcm_mibs_phs_rule {
118typedef struct _S_MIBS_PHS_RULE 102 unsigned long ulSFID;
119{ 103 u8 u8PHSI;
120 ULONG ulSFID; 104 u8 u8PHSFLength;
121 /// brief 8bit PHSI Of The Service Flow 105 u8 u8PHSF[MIBS_MAX_PHS_LENGTHS];
122 B_UINT8 u8PHSI; 106 u8 u8PHSMLength;
123 /// brief PHSF Of The Service Flow 107 u8 u8PHSM[MIBS_MAX_PHS_LENGTHS];
124 B_UINT8 u8PHSFLength; 108 u8 u8PHSS;
125 B_UINT8 u8PHSF[MIBS_MAX_PHS_LENGTHS]; 109 u8 u8PHSV;
126 /// brief PHSM Of The Service Flow 110 u8 reserved[5];
127 B_UINT8 u8PHSMLength; 111 long PHSModifiedBytes;
128 B_UINT8 u8PHSM[MIBS_MAX_PHS_LENGTHS]; 112 unsigned long PHSModifiedNumPackets;
129 /// brief 8bit PHSS Of The Service Flow 113 unsigned long PHSErrorNumPackets;
130 B_UINT8 u8PHSS; 114};
131 /// brief 8bit PHSV Of The Service Flow 115
132 B_UINT8 u8PHSV; 116struct bcm_mibs_parameters {
133 // Reserved bytes are 5, so that it is similar to S_PHS_RULE structure. 117 u32 wmanIfSfid;
134 B_UINT8 reserved[5]; 118 u32 wmanIfCmnCpsSfState;
119 u32 wmanIfCmnCpsMaxSustainedRate;
120 u32 wmanIfCmnCpsMaxTrafficBurst;
121 u32 wmanIfCmnCpsMinReservedRate;
122 u32 wmanIfCmnCpsToleratedJitter;
123 u32 wmanIfCmnCpsMaxLatency;
124 u32 wmanIfCmnCpsFixedVsVariableSduInd;
125 u32 wmanIfCmnCpsSduSize;
126 u32 wmanIfCmnCpsSfSchedulingType;
127 u32 wmanIfCmnCpsArqEnable;
128 u32 wmanIfCmnCpsArqWindowSize;
129 u32 wmanIfCmnCpsArqBlockLifetime;
130 u32 wmanIfCmnCpsArqSyncLossTimeout;
131 u32 wmanIfCmnCpsArqDeliverInOrder;
132 u32 wmanIfCmnCpsArqRxPurgeTimeout;
133 u32 wmanIfCmnCpsArqBlockSize;
134 u32 wmanIfCmnCpsMinRsvdTolerableRate;
135 u32 wmanIfCmnCpsReqTxPolicy;
136 u32 wmanIfCmnSfCsSpecification;
137 u32 wmanIfCmnCpsTargetSaid;
138};
139
140struct bcm_mibs_table {
141 unsigned long ulSFID;
142 unsigned short usVCID_Value;
143 unsigned int uiThreshold;
144 u8 u8TrafficPriority;
145 bool bValid;
146 bool bActive;
147 bool bActivateRequestSent;
148 u8 u8QueueType;
149 unsigned int uiMaxBucketSize;
150 unsigned int uiCurrentQueueDepthOnTarget;
151 unsigned int uiCurrentBytesOnHost;
152 unsigned int uiCurrentPacketsOnHost;
153 unsigned int uiDroppedCountBytes;
154 unsigned int uiDroppedCountPackets;
155 unsigned int uiSentBytes;
156 unsigned int uiSentPackets;
157 unsigned int uiCurrentDrainRate;
158 unsigned int uiThisPeriodSentBytes;
159 u64 liDrainCalculated;
160 unsigned int uiCurrentTokenCount;
161 u64 liLastUpdateTokenAt;
162 unsigned int uiMaxAllowedRate;
163 unsigned int NumOfPacketsSent;
164 unsigned char ucDirection;
165 unsigned short usCID;
166 struct bcm_mibs_parameters stMibsExtServiceFlowTable;
167 unsigned int uiCurrentRxRate;
168 unsigned int uiThisPeriodRxBytes;
169 unsigned int uiTotalRxBytes;
170 unsigned int uiTotalTxBytes;
171};
172
173struct bcm_mibs_dropped_cntrl_msg {
174 unsigned long cm_responses;
175 unsigned long cm_control_newdsx_multiclassifier_resp;
176 unsigned long link_control_resp;
177 unsigned long status_rsp;
178 unsigned long stats_pointer_resp;
179 unsigned long idle_mode_status;
180 unsigned long auth_ss_host_msg;
181 unsigned long low_priority_message;
182};
183
184struct bcm_host_stats_mibs {
185 struct bcm_mibs_host_info stHostInfo;
186 struct bcm_mibs_classifier_rule astClassifierTable[MIBS_MAX_CLASSIFIERS];
187 struct bcm_mibs_table astSFtable[MIBS_MAX_SERVICEFLOWS];
188 struct bcm_mibs_phs_rule astPhsRulesTable[MIBS_MAX_PHSRULES];
189 struct bcm_mibs_dropped_cntrl_msg stDroppedAppCntrlMsgs;
190};
135 191
136 LONG PHSModifiedBytes;
137 ULONG PHSModifiedNumPackets;
138 ULONG PHSErrorNumPackets;
139}S_MIBS_PHS_RULE;
140
141typedef struct _S_MIBS_EXTSERVICEFLOW_PARAMETERS
142{
143 UINT32 wmanIfSfid;
144 UINT32 wmanIfCmnCpsSfState;
145 UINT32 wmanIfCmnCpsMaxSustainedRate;
146 UINT32 wmanIfCmnCpsMaxTrafficBurst;
147 UINT32 wmanIfCmnCpsMinReservedRate;
148 UINT32 wmanIfCmnCpsToleratedJitter;
149 UINT32 wmanIfCmnCpsMaxLatency;
150 UINT32 wmanIfCmnCpsFixedVsVariableSduInd;
151 UINT32 wmanIfCmnCpsSduSize;
152 UINT32 wmanIfCmnCpsSfSchedulingType;
153 UINT32 wmanIfCmnCpsArqEnable;
154 UINT32 wmanIfCmnCpsArqWindowSize;
155 UINT32 wmanIfCmnCpsArqBlockLifetime;
156 UINT32 wmanIfCmnCpsArqSyncLossTimeout;
157 UINT32 wmanIfCmnCpsArqDeliverInOrder;
158 UINT32 wmanIfCmnCpsArqRxPurgeTimeout;
159 UINT32 wmanIfCmnCpsArqBlockSize;
160 UINT32 wmanIfCmnCpsMinRsvdTolerableRate;
161 UINT32 wmanIfCmnCpsReqTxPolicy;
162 UINT32 wmanIfCmnSfCsSpecification;
163 UINT32 wmanIfCmnCpsTargetSaid;
164
165}S_MIBS_EXTSERVICEFLOW_PARAMETERS;
166
167
168typedef struct _S_MIBS_SERVICEFLOW_TABLE
169{
170 //classification extension Rule
171 ULONG ulSFID;
172 USHORT usVCID_Value;
173 UINT uiThreshold;
174 // This field determines the priority of the SF Queues
175 B_UINT8 u8TrafficPriority;
176
177 BOOLEAN bValid;
178 BOOLEAN bActive;
179 BOOLEAN bActivateRequestSent;
180 //BE or rtPS
181 B_UINT8 u8QueueType;
182 //maximum size of the bucket for the queue
183 UINT uiMaxBucketSize;
184 UINT uiCurrentQueueDepthOnTarget;
185 UINT uiCurrentBytesOnHost;
186 UINT uiCurrentPacketsOnHost;
187 UINT uiDroppedCountBytes;
188 UINT uiDroppedCountPackets;
189 UINT uiSentBytes;
190 UINT uiSentPackets;
191 UINT uiCurrentDrainRate;
192 UINT uiThisPeriodSentBytes;
193 LARGE_INTEGER liDrainCalculated;
194 UINT uiCurrentTokenCount;
195 LARGE_INTEGER liLastUpdateTokenAt;
196 UINT uiMaxAllowedRate;
197 UINT NumOfPacketsSent;
198 UCHAR ucDirection;
199 USHORT usCID;
200 S_MIBS_EXTSERVICEFLOW_PARAMETERS stMibsExtServiceFlowTable;
201 UINT uiCurrentRxRate;
202 UINT uiThisPeriodRxBytes;
203 UINT uiTotalRxBytes;
204 UINT uiTotalTxBytes;
205}S_MIBS_SERVICEFLOW_TABLE;
206
207typedef struct _S_MIBS_DROPPED_APP_CNTRL_MESSAGES
208{
209 ULONG cm_responses;
210 ULONG cm_control_newdsx_multiclassifier_resp;
211 ULONG link_control_resp;
212 ULONG status_rsp;
213 ULONG stats_pointer_resp;
214 ULONG idle_mode_status;
215 ULONG auth_ss_host_msg;
216 ULONG low_priority_message;
217
218}S_MIBS_DROPPED_APP_CNTRL_MESSAGES;
219
220typedef struct _S_MIBS_HOST_STATS_MIBS
221{
222 S_MIBS_HOST_INFO stHostInfo;
223 S_MIBS_CLASSIFIER_RULE astClassifierTable[MIBS_MAX_CLASSIFIERS];
224 S_MIBS_SERVICEFLOW_TABLE astSFtable[MIBS_MAX_SERVICEFLOWS];
225 S_MIBS_PHS_RULE astPhsRulesTable[MIBS_MAX_PHSRULES];
226 S_MIBS_DROPPED_APP_CNTRL_MESSAGES stDroppedAppCntrlMsgs;
227}S_MIBS_HOST_STATS_MIBS;
228#endif 192#endif
229
230
diff --git a/drivers/staging/bcm/InterfaceAdapter.h b/drivers/staging/bcm/InterfaceAdapter.h
index 4607c265d981..06a6b18bca48 100644
--- a/drivers/staging/bcm/InterfaceAdapter.h
+++ b/drivers/staging/bcm/InterfaceAdapter.h
@@ -1,97 +1,79 @@
1#ifndef _INTERFACE_ADAPTER_H 1#ifndef _INTERFACE_ADAPTER_H
2#define _INTERFACE_ADAPTER_H 2#define _INTERFACE_ADAPTER_H
3 3
4typedef struct _BULK_ENDP_IN 4struct bcm_bulk_endpoint_in {
5{ 5 char *bulk_in_buffer;
6 PCHAR bulk_in_buffer; 6 size_t bulk_in_size;
7 size_t bulk_in_size; 7 unsigned char bulk_in_endpointAddr;
8 UCHAR bulk_in_endpointAddr; 8 unsigned int bulk_in_pipe;
9 UINT bulk_in_pipe; 9};
10}BULK_ENDP_IN, *PBULK_ENDP_IN; 10
11 11struct bcm_bulk_endpoint_out {
12 12 unsigned char bulk_out_buffer;
13typedef struct _BULK_ENDP_OUT 13 size_t bulk_out_size;
14{ 14 unsigned char bulk_out_endpointAddr;
15 UCHAR bulk_out_buffer; 15 unsigned int bulk_out_pipe;
16 size_t bulk_out_size; 16 /* this is used when int out endpoint is used as bulk out end point */
17 UCHAR bulk_out_endpointAddr; 17 unsigned char int_out_interval;
18 UINT bulk_out_pipe; 18};
19 //this is used when int out endpoint is used as bulk out end point 19
20 UCHAR int_out_interval; 20struct bcm_intr_endpoint_in {
21}BULK_ENDP_OUT, *PBULK_ENDP_OUT; 21 char *int_in_buffer;
22 22 size_t int_in_size;
23typedef struct _INTR_ENDP_IN 23 unsigned char int_in_endpointAddr;
24{ 24 unsigned char int_in_interval;
25 PCHAR int_in_buffer; 25 unsigned int int_in_pipe;
26 size_t int_in_size; 26};
27 UCHAR int_in_endpointAddr; 27
28 UCHAR int_in_interval; 28struct bcm_intr_endpoint_out {
29 UINT int_in_pipe; 29 char *int_out_buffer;
30}INTR_ENDP_IN, *PINTR_ENDP_IN; 30 size_t int_out_size;
31 31 unsigned char int_out_endpointAddr;
32typedef struct _INTR_ENDP_OUT 32 unsigned char int_out_interval;
33{ 33 unsigned int int_out_pipe;
34 PCHAR int_out_buffer; 34};
35 size_t int_out_size; 35
36 UCHAR int_out_endpointAddr; 36struct bcm_usb_tcb {
37 UCHAR int_out_interval;
38 UINT int_out_pipe;
39}INTR_ENDP_OUT, *PINTR_ENDP_OUT;
40
41
42typedef struct _USB_TCB
43{
44 struct urb *urb; 37 struct urb *urb;
45 PVOID psIntfAdapter; 38 void *psIntfAdapter;
46 BOOLEAN bUsed; 39 bool bUsed;
47}USB_TCB, *PUSB_TCB; 40};
48 41
49 42struct bcm_usb_rcb {
50typedef struct _USB_RCB
51{
52 struct urb *urb; 43 struct urb *urb;
53 PVOID psIntfAdapter; 44 void *psIntfAdapter;
54 BOOLEAN bUsed; 45 bool bUsed;
55}USB_RCB, *PUSB_RCB; 46};
56 47
57/* 48/*
58//This is the interface specific Sub-Adapter 49 * This is the interface specific Sub-Adapter
59//Structure. 50 * Structure.
60*/ 51 */
61typedef struct _S_INTERFACE_ADAPTER 52struct bcm_interface_adapter {
62{ 53 struct usb_device *udev;
63 struct usb_device * udev; 54 struct usb_interface *interface;
64 struct usb_interface * interface;
65
66 /* Bulk endpoint in info */ 55 /* Bulk endpoint in info */
67 BULK_ENDP_IN sBulkIn; 56 struct bcm_bulk_endpoint_in sBulkIn;
68 /* Bulk endpoint out info */ 57 /* Bulk endpoint out info */
69 BULK_ENDP_OUT sBulkOut; 58 struct bcm_bulk_endpoint_out sBulkOut;
70 /* Interrupt endpoint in info */ 59 /* Interrupt endpoint in info */
71 INTR_ENDP_IN sIntrIn; 60 struct bcm_intr_endpoint_in sIntrIn;
72 /* Interrupt endpoint out info */ 61 /* Interrupt endpoint out info */
73 INTR_ENDP_OUT sIntrOut; 62 struct bcm_intr_endpoint_out sIntrOut;
74 63 unsigned long ulInterruptData[2];
75
76
77 ULONG ulInterruptData[2];
78
79 struct urb *psInterruptUrb; 64 struct urb *psInterruptUrb;
80 65 struct bcm_usb_tcb asUsbTcb[MAXIMUM_USB_TCB];
81 USB_TCB asUsbTcb[MAXIMUM_USB_TCB]; 66 struct bcm_usb_rcb asUsbRcb[MAXIMUM_USB_RCB];
82 USB_RCB asUsbRcb[MAXIMUM_USB_RCB]; 67 atomic_t uNumTcbUsed;
83 atomic_t uNumTcbUsed; 68 atomic_t uCurrTcb;
84 atomic_t uCurrTcb; 69 atomic_t uNumRcbUsed;
85 atomic_t uNumRcbUsed; 70 atomic_t uCurrRcb;
86 atomic_t uCurrRcb;
87
88 struct bcm_mini_adapter *psAdapter; 71 struct bcm_mini_adapter *psAdapter;
89 BOOLEAN bFlashBoot; 72 bool bFlashBoot;
90 BOOLEAN bHighSpeedDevice ; 73 bool bHighSpeedDevice;
91 74 bool bSuspended;
92 BOOLEAN bSuspended; 75 bool bPreparingForBusSuspend;
93 BOOLEAN bPreparingForBusSuspend;
94 struct work_struct usbSuspendWork; 76 struct work_struct usbSuspendWork;
95}S_INTERFACE_ADAPTER,*PS_INTERFACE_ADAPTER; 77};
96 78
97#endif 79#endif
diff --git a/drivers/staging/bcm/InterfaceDld.c b/drivers/staging/bcm/InterfaceDld.c
index 3a89e33733ee..87117a797d5b 100644
--- a/drivers/staging/bcm/InterfaceDld.c
+++ b/drivers/staging/bcm/InterfaceDld.c
@@ -6,7 +6,7 @@ int InterfaceFileDownload(PVOID arg, struct file *flp, unsigned int on_chip_loc)
6 mm_segment_t oldfs = {0}; 6 mm_segment_t oldfs = {0};
7 int errno = 0, len = 0; /* ,is_config_file = 0 */ 7 int errno = 0, len = 0; /* ,is_config_file = 0 */
8 loff_t pos = 0; 8 loff_t pos = 0;
9 PS_INTERFACE_ADAPTER psIntfAdapter = (PS_INTERFACE_ADAPTER)arg; 9 struct bcm_interface_adapter *psIntfAdapter = (struct bcm_interface_adapter *)arg;
10 /* struct bcm_mini_adapter *Adapter = psIntfAdapter->psAdapter; */ 10 /* struct bcm_mini_adapter *Adapter = psIntfAdapter->psAdapter; */
11 char *buff = kmalloc(MAX_TRANSFER_CTRL_BYTE_USB, GFP_KERNEL); 11 char *buff = kmalloc(MAX_TRANSFER_CTRL_BYTE_USB, GFP_KERNEL);
12 12
@@ -61,7 +61,7 @@ int InterfaceFileReadbackFromChip(PVOID arg, struct file *flp, unsigned int on_c
61 loff_t pos = 0; 61 loff_t pos = 0;
62 static int fw_down; 62 static int fw_down;
63 INT Status = STATUS_SUCCESS; 63 INT Status = STATUS_SUCCESS;
64 PS_INTERFACE_ADAPTER psIntfAdapter = (PS_INTERFACE_ADAPTER)arg; 64 struct bcm_interface_adapter *psIntfAdapter = (struct bcm_interface_adapter *)arg;
65 int bytes; 65 int bytes;
66 66
67 buff = kmalloc(MAX_TRANSFER_CTRL_BYTE_USB, GFP_DMA); 67 buff = kmalloc(MAX_TRANSFER_CTRL_BYTE_USB, GFP_DMA);
diff --git a/drivers/staging/bcm/InterfaceIdleMode.c b/drivers/staging/bcm/InterfaceIdleMode.c
index 4f2f490921e1..a1bf21579d3f 100644
--- a/drivers/staging/bcm/InterfaceIdleMode.c
+++ b/drivers/staging/bcm/InterfaceIdleMode.c
@@ -156,7 +156,7 @@ static int InterfaceAbortIdlemode(struct bcm_mini_adapter *Adapter, unsigned int
156 156
157 int lenwritten = 0; 157 int lenwritten = 0;
158 unsigned char aucAbortPattern[8]={0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF}; 158 unsigned char aucAbortPattern[8]={0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF};
159 PS_INTERFACE_ADAPTER psInterfaceAdapter = Adapter->pvInterfaceAdapter; 159 struct bcm_interface_adapter *psInterfaceAdapter = Adapter->pvInterfaceAdapter;
160 160
161 //Abort Bus suspend if its already suspended 161 //Abort Bus suspend if its already suspended
162 if((TRUE == psInterfaceAdapter->bSuspended) && (TRUE == Adapter->bDoSuspend)) 162 if((TRUE == psInterfaceAdapter->bSuspended) && (TRUE == Adapter->bDoSuspend))
diff --git a/drivers/staging/bcm/InterfaceIdleMode.h b/drivers/staging/bcm/InterfaceIdleMode.h
index c3338c8a1dc8..2ef64003aa89 100644
--- a/drivers/staging/bcm/InterfaceIdleMode.h
+++ b/drivers/staging/bcm/InterfaceIdleMode.h
@@ -3,11 +3,12 @@
3 3
4INT InterfaceIdleModeWakeup(struct bcm_mini_adapter *Adapter); 4INT InterfaceIdleModeWakeup(struct bcm_mini_adapter *Adapter);
5 5
6INT InterfaceIdleModeRespond(struct bcm_mini_adapter *Adapter, unsigned int *puiBuffer); 6INT InterfaceIdleModeRespond(struct bcm_mini_adapter *Adapter,
7 unsigned int *puiBuffer);
7 8
8VOID InterfaceWriteIdleModeWakePattern(struct bcm_mini_adapter *Adapter); 9VOID InterfaceWriteIdleModeWakePattern(struct bcm_mini_adapter *Adapter);
9 10
10INT InterfaceWakeUp(struct bcm_mini_adapter * Adapter); 11INT InterfaceWakeUp(struct bcm_mini_adapter *Adapter);
11 12
12VOID InterfaceHandleShutdownModeWakeup(struct bcm_mini_adapter *Adapter); 13VOID InterfaceHandleShutdownModeWakeup(struct bcm_mini_adapter *Adapter);
13#endif 14#endif
diff --git a/drivers/staging/bcm/InterfaceInit.c b/drivers/staging/bcm/InterfaceInit.c
index b05f5f73548c..eb246430b320 100644
--- a/drivers/staging/bcm/InterfaceInit.c
+++ b/drivers/staging/bcm/InterfaceInit.c
@@ -4,11 +4,12 @@ static struct usb_device_id InterfaceUsbtable[] = {
4 { USB_DEVICE(BCM_USB_VENDOR_ID_T3, BCM_USB_PRODUCT_ID_T3) }, 4 { USB_DEVICE(BCM_USB_VENDOR_ID_T3, BCM_USB_PRODUCT_ID_T3) },
5 { USB_DEVICE(BCM_USB_VENDOR_ID_T3, BCM_USB_PRODUCT_ID_T3B) }, 5 { USB_DEVICE(BCM_USB_VENDOR_ID_T3, BCM_USB_PRODUCT_ID_T3B) },
6 { USB_DEVICE(BCM_USB_VENDOR_ID_T3, BCM_USB_PRODUCT_ID_T3L) }, 6 { USB_DEVICE(BCM_USB_VENDOR_ID_T3, BCM_USB_PRODUCT_ID_T3L) },
7 { USB_DEVICE(BCM_USB_VENDOR_ID_T3, BCM_USB_PRODUCT_ID_SM250) }, 7 { USB_DEVICE(BCM_USB_VENDOR_ID_T3, BCM_USB_PRODUCT_ID_SYM) },
8 { USB_DEVICE(BCM_USB_VENDOR_ID_ZTE, BCM_USB_PRODUCT_ID_226) }, 8 { USB_DEVICE(BCM_USB_VENDOR_ID_ZTE, BCM_USB_PRODUCT_ID_226) },
9 { USB_DEVICE(BCM_USB_VENDOR_ID_FOXCONN, BCM_USB_PRODUCT_ID_1901) }, 9 { USB_DEVICE(BCM_USB_VENDOR_ID_FOXCONN, BCM_USB_PRODUCT_ID_1901) },
10 { USB_DEVICE(BCM_USB_VENDOR_ID_ZTE, BCM_USB_PRODUCT_ID_ZTE_TU25) }, 10 { USB_DEVICE(BCM_USB_VENDOR_ID_ZTE, BCM_USB_PRODUCT_ID_ZTE_TU25) },
11 { USB_DEVICE(BCM_USB_VENDOR_ID_ZTE, BCM_USB_PRODUCT_ID_ZTE_226) }, 11 { USB_DEVICE(BCM_USB_VENDOR_ID_ZTE, BCM_USB_PRODUCT_ID_ZTE_226) },
12 { USB_DEVICE(BCM_USB_VENDOR_ID_ZTE, BCM_USB_PRODUCT_ID_ZTE_326) },
12 { } 13 { }
13}; 14};
14MODULE_DEVICE_TABLE(usb, InterfaceUsbtable); 15MODULE_DEVICE_TABLE(usb, InterfaceUsbtable);
@@ -22,9 +23,9 @@ static const u32 default_msg =
22 | NETIF_MSG_TIMER | NETIF_MSG_TX_ERR | NETIF_MSG_RX_ERR 23 | NETIF_MSG_TIMER | NETIF_MSG_TX_ERR | NETIF_MSG_RX_ERR
23 | NETIF_MSG_IFUP | NETIF_MSG_IFDOWN; 24 | NETIF_MSG_IFUP | NETIF_MSG_IFDOWN;
24 25
25static int InterfaceAdapterInit(PS_INTERFACE_ADAPTER Adapter); 26static int InterfaceAdapterInit(struct bcm_interface_adapter *Adapter);
26 27
27static void InterfaceAdapterFree(PS_INTERFACE_ADAPTER psIntfAdapter) 28static void InterfaceAdapterFree(struct bcm_interface_adapter *psIntfAdapter)
28{ 29{
29 int i = 0; 30 int i = 0;
30 31
@@ -79,7 +80,7 @@ static void ConfigureEndPointTypesThroughEEPROM(struct bcm_mini_adapter *Adapter
79 80
80 ulReg = ntohl(EP2_CFG_REG); 81 ulReg = ntohl(EP2_CFG_REG);
81 BeceemEEPROMBulkWrite(Adapter, (PUCHAR)&ulReg, 0x132, 4, TRUE); 82 BeceemEEPROMBulkWrite(Adapter, (PUCHAR)&ulReg, 0x132, 4, TRUE);
82 if (((PS_INTERFACE_ADAPTER)(Adapter->pvInterfaceAdapter))->bHighSpeedDevice == TRUE) { 83 if (((struct bcm_interface_adapter *)(Adapter->pvInterfaceAdapter))->bHighSpeedDevice == TRUE) {
83 ulReg = ntohl(EP2_CFG_INT); 84 ulReg = ntohl(EP2_CFG_INT);
84 BeceemEEPROMBulkWrite(Adapter, (PUCHAR)&ulReg, 0x136, 4, TRUE); 85 BeceemEEPROMBulkWrite(Adapter, (PUCHAR)&ulReg, 0x136, 4, TRUE);
85 } else { 86 } else {
@@ -145,7 +146,7 @@ static int usbbcm_device_probe(struct usb_interface *intf, const struct usb_devi
145 struct usb_device *udev = interface_to_usbdev(intf); 146 struct usb_device *udev = interface_to_usbdev(intf);
146 int retval; 147 int retval;
147 struct bcm_mini_adapter *psAdapter; 148 struct bcm_mini_adapter *psAdapter;
148 PS_INTERFACE_ADAPTER psIntfAdapter; 149 struct bcm_interface_adapter *psIntfAdapter;
149 struct net_device *ndev; 150 struct net_device *ndev;
150 151
151 /* Reserve one extra queue for the bit-bucket */ 152 /* Reserve one extra queue for the bit-bucket */
@@ -189,7 +190,7 @@ static int usbbcm_device_probe(struct usb_interface *intf, const struct usb_devi
189 } 190 }
190 191
191 /* Allocate interface adapter structure */ 192 /* Allocate interface adapter structure */
192 psIntfAdapter = kzalloc(sizeof(S_INTERFACE_ADAPTER), GFP_KERNEL); 193 psIntfAdapter = kzalloc(sizeof(struct bcm_interface_adapter), GFP_KERNEL);
193 if (psIntfAdapter == NULL) { 194 if (psIntfAdapter == NULL) {
194 dev_err(&udev->dev, DRV_NAME ": no memory for Interface adapter\n"); 195 dev_err(&udev->dev, DRV_NAME ": no memory for Interface adapter\n");
195 AdapterFree(psAdapter); 196 AdapterFree(psAdapter);
@@ -257,7 +258,7 @@ static int usbbcm_device_probe(struct usb_interface *intf, const struct usb_devi
257 258
258static void usbbcm_disconnect(struct usb_interface *intf) 259static void usbbcm_disconnect(struct usb_interface *intf)
259{ 260{
260 PS_INTERFACE_ADAPTER psIntfAdapter = usb_get_intfdata(intf); 261 struct bcm_interface_adapter *psIntfAdapter = usb_get_intfdata(intf);
261 struct bcm_mini_adapter *psAdapter; 262 struct bcm_mini_adapter *psAdapter;
262 struct usb_device *udev = interface_to_usbdev(intf); 263 struct usb_device *udev = interface_to_usbdev(intf);
263 264
@@ -276,7 +277,7 @@ static void usbbcm_disconnect(struct usb_interface *intf)
276 usb_put_dev(udev); 277 usb_put_dev(udev);
277} 278}
278 279
279static int AllocUsbCb(PS_INTERFACE_ADAPTER psIntfAdapter) 280static int AllocUsbCb(struct bcm_interface_adapter *psIntfAdapter)
280{ 281{
281 int i = 0; 282 int i = 0;
282 283
@@ -311,7 +312,7 @@ static int AllocUsbCb(PS_INTERFACE_ADAPTER psIntfAdapter)
311 return 0; 312 return 0;
312} 313}
313 314
314static int device_run(PS_INTERFACE_ADAPTER psIntfAdapter) 315static int device_run(struct bcm_interface_adapter *psIntfAdapter)
315{ 316{
316 int value = 0; 317 int value = 0;
317 UINT status = STATUS_SUCCESS; 318 UINT status = STATUS_SUCCESS;
@@ -421,7 +422,7 @@ static inline int bcm_usb_endpoint_is_isoc_out(const struct usb_endpoint_descrip
421 return bcm_usb_endpoint_xfer_isoc(epd) && bcm_usb_endpoint_dir_out(epd); 422 return bcm_usb_endpoint_xfer_isoc(epd) && bcm_usb_endpoint_dir_out(epd);
422} 423}
423 424
424static int InterfaceAdapterInit(PS_INTERFACE_ADAPTER psIntfAdapter) 425static int InterfaceAdapterInit(struct bcm_interface_adapter *psIntfAdapter)
425{ 426{
426 struct usb_host_interface *iface_desc; 427 struct usb_host_interface *iface_desc;
427 struct usb_endpoint_descriptor *endpoint; 428 struct usb_endpoint_descriptor *endpoint;
@@ -619,7 +620,7 @@ static int InterfaceAdapterInit(PS_INTERFACE_ADAPTER psIntfAdapter)
619 620
620static int InterfaceSuspend(struct usb_interface *intf, pm_message_t message) 621static int InterfaceSuspend(struct usb_interface *intf, pm_message_t message)
621{ 622{
622 PS_INTERFACE_ADAPTER psIntfAdapter = usb_get_intfdata(intf); 623 struct bcm_interface_adapter *psIntfAdapter = usb_get_intfdata(intf);
623 624
624 psIntfAdapter->bSuspended = TRUE; 625 psIntfAdapter->bSuspended = TRUE;
625 626
@@ -646,7 +647,7 @@ static int InterfaceSuspend(struct usb_interface *intf, pm_message_t message)
646 647
647static int InterfaceResume(struct usb_interface *intf) 648static int InterfaceResume(struct usb_interface *intf)
648{ 649{
649 PS_INTERFACE_ADAPTER psIntfAdapter = usb_get_intfdata(intf); 650 struct bcm_interface_adapter *psIntfAdapter = usb_get_intfdata(intf);
650 651
651 mdelay(100); 652 mdelay(100);
652 psIntfAdapter->bSuspended = FALSE; 653 psIntfAdapter->bSuspended = FALSE;
diff --git a/drivers/staging/bcm/InterfaceInit.h b/drivers/staging/bcm/InterfaceInit.h
index 866924e35f9c..ffa6e9667ec4 100644
--- a/drivers/staging/bcm/InterfaceInit.h
+++ b/drivers/staging/bcm/InterfaceInit.h
@@ -8,11 +8,11 @@
8#define BCM_USB_PRODUCT_ID_T3 0x0300 8#define BCM_USB_PRODUCT_ID_T3 0x0300
9#define BCM_USB_PRODUCT_ID_T3B 0x0210 9#define BCM_USB_PRODUCT_ID_T3B 0x0210
10#define BCM_USB_PRODUCT_ID_T3L 0x0220 10#define BCM_USB_PRODUCT_ID_T3L 0x0220
11#define BCM_USB_PRODUCT_ID_SM250 0xbccd
12#define BCM_USB_PRODUCT_ID_SYM 0x15E 11#define BCM_USB_PRODUCT_ID_SYM 0x15E
13#define BCM_USB_PRODUCT_ID_1901 0xe017 12#define BCM_USB_PRODUCT_ID_1901 0xe017
14#define BCM_USB_PRODUCT_ID_226 0x0132 /* not sure if this is valid */ 13#define BCM_USB_PRODUCT_ID_226 0x0132 /* not sure if this is valid */
15#define BCM_USB_PRODUCT_ID_ZTE_226 0x172 14#define BCM_USB_PRODUCT_ID_ZTE_226 0x172
15#define BCM_USB_PRODUCT_ID_ZTE_326 0x173 /* ZTE AX326 */
16#define BCM_USB_PRODUCT_ID_ZTE_TU25 0x0007 16#define BCM_USB_PRODUCT_ID_ZTE_TU25 0x0007
17 17
18#define BCM_USB_MINOR_BASE 192 18#define BCM_USB_MINOR_BASE 192
@@ -21,6 +21,6 @@ int InterfaceInitialize(void);
21 21
22int InterfaceExit(void); 22int InterfaceExit(void);
23 23
24int usbbcm_worker_thread(PS_INTERFACE_ADAPTER psIntfAdapter); 24int usbbcm_worker_thread(struct bcm_interface_adapter *psIntfAdapter);
25 25
26#endif 26#endif
diff --git a/drivers/staging/bcm/InterfaceIsr.c b/drivers/staging/bcm/InterfaceIsr.c
index 6ee3428daa55..8322f1b76e2a 100644
--- a/drivers/staging/bcm/InterfaceIsr.c
+++ b/drivers/staging/bcm/InterfaceIsr.c
@@ -4,7 +4,7 @@
4static void read_int_callback(struct urb *urb/*, struct pt_regs *regs*/) 4static void read_int_callback(struct urb *urb/*, struct pt_regs *regs*/)
5{ 5{
6 int status = urb->status; 6 int status = urb->status;
7 PS_INTERFACE_ADAPTER psIntfAdapter = (PS_INTERFACE_ADAPTER)urb->context; 7 struct bcm_interface_adapter *psIntfAdapter = (struct bcm_interface_adapter *)urb->context;
8 struct bcm_mini_adapter *Adapter = psIntfAdapter->psAdapter ; 8 struct bcm_mini_adapter *Adapter = psIntfAdapter->psAdapter ;
9 9
10 if (netif_msg_intr(Adapter)) 10 if (netif_msg_intr(Adapter))
@@ -114,7 +114,7 @@ static void read_int_callback(struct urb *urb/*, struct pt_regs *regs*/)
114 114
115} 115}
116 116
117int CreateInterruptUrb(PS_INTERFACE_ADAPTER psIntfAdapter) 117int CreateInterruptUrb(struct bcm_interface_adapter *psIntfAdapter)
118{ 118{
119 psIntfAdapter->psInterruptUrb = usb_alloc_urb(0, GFP_KERNEL); 119 psIntfAdapter->psInterruptUrb = usb_alloc_urb(0, GFP_KERNEL);
120 if (!psIntfAdapter->psInterruptUrb) 120 if (!psIntfAdapter->psInterruptUrb)
@@ -143,7 +143,7 @@ int CreateInterruptUrb(PS_INTERFACE_ADAPTER psIntfAdapter)
143} 143}
144 144
145 145
146INT StartInterruptUrb(PS_INTERFACE_ADAPTER psIntfAdapter) 146INT StartInterruptUrb(struct bcm_interface_adapter *psIntfAdapter)
147{ 147{
148 INT status = 0; 148 INT status = 0;
149 149
diff --git a/drivers/staging/bcm/InterfaceIsr.h b/drivers/staging/bcm/InterfaceIsr.h
index 40399788c419..3073bd71cfeb 100644
--- a/drivers/staging/bcm/InterfaceIsr.h
+++ b/drivers/staging/bcm/InterfaceIsr.h
@@ -1,10 +1,10 @@
1#ifndef _INTERFACE_ISR_H 1#ifndef _INTERFACE_ISR_H
2#define _INTERFACE_ISR_H 2#define _INTERFACE_ISR_H
3 3
4int CreateInterruptUrb(PS_INTERFACE_ADAPTER psIntfAdapter); 4int CreateInterruptUrb(struct bcm_interface_adapter *psIntfAdapter);
5 5
6 6
7INT StartInterruptUrb(PS_INTERFACE_ADAPTER psIntfAdapter); 7INT StartInterruptUrb(struct bcm_interface_adapter *psIntfAdapter);
8 8
9 9
10VOID InterfaceEnableInterrupt(struct bcm_mini_adapter *Adapter); 10VOID InterfaceEnableInterrupt(struct bcm_mini_adapter *Adapter);
diff --git a/drivers/staging/bcm/InterfaceMisc.c b/drivers/staging/bcm/InterfaceMisc.c
index bbe909946091..afca010f9db5 100644
--- a/drivers/staging/bcm/InterfaceMisc.c
+++ b/drivers/staging/bcm/InterfaceMisc.c
@@ -1,17 +1,14 @@
1#include "headers.h" 1#include "headers.h"
2 2
3INT InterfaceRDM(PS_INTERFACE_ADAPTER psIntfAdapter, 3int InterfaceRDM(struct bcm_interface_adapter *psIntfAdapter,
4 UINT addr, 4 unsigned int addr,
5 PVOID buff, 5 void *buff,
6 INT len) 6 int len)
7{ 7{
8 int bytes; 8 int bytes;
9 USHORT usRetries = 0;
10 9
11 if (psIntfAdapter == NULL) { 10 if (!psIntfAdapter)
12 BCM_DEBUG_PRINT(psIntfAdapter->psAdapter, DBG_TYPE_PRINTK, 0, 0, "Interface Adapter is NULL");
13 return -EINVAL; 11 return -EINVAL;
14 }
15 12
16 if (psIntfAdapter->psAdapter->device_removed == TRUE) { 13 if (psIntfAdapter->psAdapter->device_removed == TRUE) {
17 BCM_DEBUG_PRINT(psIntfAdapter->psAdapter, DBG_TYPE_PRINTK, 0, 0, "Device got removed"); 14 BCM_DEBUG_PRINT(psIntfAdapter->psAdapter, DBG_TYPE_PRINTK, 0, 0, "Device got removed");
@@ -29,27 +26,21 @@ INT InterfaceRDM(PS_INTERFACE_ADAPTER psIntfAdapter,
29 } 26 }
30 psIntfAdapter->psAdapter->DeviceAccess = TRUE; 27 psIntfAdapter->psAdapter->DeviceAccess = TRUE;
31 28
32 do { 29 bytes = usb_control_msg(psIntfAdapter->udev,
33 bytes = usb_control_msg(psIntfAdapter->udev, 30 usb_rcvctrlpipe(psIntfAdapter->udev, 0),
34 usb_rcvctrlpipe(psIntfAdapter->udev, 0), 31 0x02,
35 0x02, 32 0xC2,
36 0xC2, 33 (addr & 0xFFFF),
37 (addr & 0xFFFF), 34 ((addr >> 16) & 0xFFFF),
38 ((addr >> 16) & 0xFFFF), 35 buff,
39 buff, 36 len,
40 len, 37 5000);
41 5000);
42
43 usRetries++;
44 if (-ENODEV == bytes) {
45 psIntfAdapter->psAdapter->device_removed = TRUE;
46 break;
47 }
48 38
49 } while ((bytes < 0) && (usRetries < MAX_RDM_WRM_RETIRES)); 39 if (-ENODEV == bytes)
40 psIntfAdapter->psAdapter->device_removed = TRUE;
50 41
51 if (bytes < 0) 42 if (bytes < 0)
52 BCM_DEBUG_PRINT(psIntfAdapter->psAdapter, DBG_TYPE_OTHERS, RDM, DBG_LVL_ALL, "RDM failed status :%d, retires :%d", bytes, usRetries); 43 BCM_DEBUG_PRINT(psIntfAdapter->psAdapter, DBG_TYPE_OTHERS, RDM, DBG_LVL_ALL, "RDM failed status :%d", bytes);
53 else 44 else
54 BCM_DEBUG_PRINT(psIntfAdapter->psAdapter, DBG_TYPE_OTHERS, RDM, DBG_LVL_ALL, "RDM sent %d", bytes); 45 BCM_DEBUG_PRINT(psIntfAdapter->psAdapter, DBG_TYPE_OTHERS, RDM, DBG_LVL_ALL, "RDM sent %d", bytes);
55 46
@@ -57,18 +48,15 @@ INT InterfaceRDM(PS_INTERFACE_ADAPTER psIntfAdapter,
57 return bytes; 48 return bytes;
58} 49}
59 50
60INT InterfaceWRM(PS_INTERFACE_ADAPTER psIntfAdapter, 51int InterfaceWRM(struct bcm_interface_adapter *psIntfAdapter,
61 UINT addr, 52 unsigned int addr,
62 PVOID buff, 53 void *buff,
63 INT len) 54 int len)
64{ 55{
65 int retval = 0; 56 int retval = 0;
66 USHORT usRetries = 0;
67 57
68 if (psIntfAdapter == NULL) { 58 if (!psIntfAdapter)
69 BCM_DEBUG_PRINT(psIntfAdapter->psAdapter, DBG_TYPE_PRINTK, 0, 0, "Interface Adapter is NULL");
70 return -EINVAL; 59 return -EINVAL;
71 }
72 60
73 if (psIntfAdapter->psAdapter->device_removed == TRUE) { 61 if (psIntfAdapter->psAdapter->device_removed == TRUE) {
74 BCM_DEBUG_PRINT(psIntfAdapter->psAdapter, DBG_TYPE_PRINTK, 0, 0, "Device got removed"); 62 BCM_DEBUG_PRINT(psIntfAdapter->psAdapter, DBG_TYPE_PRINTK, 0, 0, "Device got removed");
@@ -87,27 +75,21 @@ INT InterfaceWRM(PS_INTERFACE_ADAPTER psIntfAdapter,
87 75
88 psIntfAdapter->psAdapter->DeviceAccess = TRUE; 76 psIntfAdapter->psAdapter->DeviceAccess = TRUE;
89 77
90 do { 78 retval = usb_control_msg(psIntfAdapter->udev,
91 retval = usb_control_msg(psIntfAdapter->udev, 79 usb_sndctrlpipe(psIntfAdapter->udev, 0),
92 usb_sndctrlpipe(psIntfAdapter->udev, 0), 80 0x01,
93 0x01, 81 0x42,
94 0x42, 82 (addr & 0xFFFF),
95 (addr & 0xFFFF), 83 ((addr >> 16) & 0xFFFF),
96 ((addr >> 16) & 0xFFFF), 84 buff,
97 buff, 85 len,
98 len, 86 5000);
99 5000);
100
101 usRetries++;
102 if (-ENODEV == retval) {
103 psIntfAdapter->psAdapter->device_removed = TRUE;
104 break;
105 }
106 87
107 } while ((retval < 0) && (usRetries < MAX_RDM_WRM_RETIRES)); 88 if (-ENODEV == retval)
89 psIntfAdapter->psAdapter->device_removed = TRUE;
108 90
109 if (retval < 0) { 91 if (retval < 0) {
110 BCM_DEBUG_PRINT(psIntfAdapter->psAdapter, DBG_TYPE_OTHERS, WRM, DBG_LVL_ALL, "WRM failed status :%d, retires :%d", retval, usRetries); 92 BCM_DEBUG_PRINT(psIntfAdapter->psAdapter, DBG_TYPE_OTHERS, WRM, DBG_LVL_ALL, "WRM failed status :%d", retval);
111 psIntfAdapter->psAdapter->DeviceAccess = FALSE; 93 psIntfAdapter->psAdapter->DeviceAccess = FALSE;
112 return retval; 94 return retval;
113 } else { 95 } else {
@@ -117,26 +99,26 @@ INT InterfaceWRM(PS_INTERFACE_ADAPTER psIntfAdapter,
117 } 99 }
118} 100}
119 101
120INT BcmRDM(PVOID arg, 102int BcmRDM(void *arg,
121 UINT addr, 103 unsigned int addr,
122 PVOID buff, 104 void *buff,
123 INT len) 105 int len)
124{ 106{
125 return InterfaceRDM((PS_INTERFACE_ADAPTER)arg, addr, buff, len); 107 return InterfaceRDM((struct bcm_interface_adapter*)arg, addr, buff, len);
126} 108}
127 109
128INT BcmWRM(PVOID arg, 110int BcmWRM(void *arg,
129 UINT addr, 111 unsigned int addr,
130 PVOID buff, 112 void *buff,
131 INT len) 113 int len)
132{ 114{
133 return InterfaceWRM((PS_INTERFACE_ADAPTER)arg, addr, buff, len); 115 return InterfaceWRM((struct bcm_interface_adapter *)arg, addr, buff, len);
134} 116}
135 117
136INT Bcm_clear_halt_of_endpoints(struct bcm_mini_adapter *Adapter) 118int Bcm_clear_halt_of_endpoints(struct bcm_mini_adapter *Adapter)
137{ 119{
138 PS_INTERFACE_ADAPTER psIntfAdapter = (PS_INTERFACE_ADAPTER)(Adapter->pvInterfaceAdapter); 120 struct bcm_interface_adapter *psIntfAdapter = (struct bcm_interface_adapter *)(Adapter->pvInterfaceAdapter);
139 INT status = STATUS_SUCCESS; 121 int status = STATUS_SUCCESS;
140 122
141 /* 123 /*
142 * usb_clear_halt - tells device to clear endpoint halt/stall condition 124 * usb_clear_halt - tells device to clear endpoint halt/stall condition
@@ -172,10 +154,10 @@ INT Bcm_clear_halt_of_endpoints(struct bcm_mini_adapter *Adapter)
172 return status; 154 return status;
173} 155}
174 156
175VOID Bcm_kill_all_URBs(PS_INTERFACE_ADAPTER psIntfAdapter) 157void Bcm_kill_all_URBs(struct bcm_interface_adapter *psIntfAdapter)
176{ 158{
177 struct urb *tempUrb = NULL; 159 struct urb *tempUrb = NULL;
178 UINT i; 160 unsigned int i;
179 161
180 /* 162 /*
181 * usb_kill_urb - cancel a transfer request and wait for it to finish 163 * usb_kill_urb - cancel a transfer request and wait for it to finish
@@ -193,7 +175,7 @@ VOID Bcm_kill_all_URBs(PS_INTERFACE_ADAPTER psIntfAdapter)
193 */ 175 */
194 176
195 /* Cancel submitted Interrupt-URB's */ 177 /* Cancel submitted Interrupt-URB's */
196 if (psIntfAdapter->psInterruptUrb != NULL) { 178 if (psIntfAdapter->psInterruptUrb) {
197 if (psIntfAdapter->psInterruptUrb->status == -EINPROGRESS) 179 if (psIntfAdapter->psInterruptUrb->status == -EINPROGRESS)
198 usb_kill_urb(psIntfAdapter->psInterruptUrb); 180 usb_kill_urb(psIntfAdapter->psInterruptUrb);
199 } 181 }
@@ -222,11 +204,11 @@ VOID Bcm_kill_all_URBs(PS_INTERFACE_ADAPTER psIntfAdapter)
222 atomic_set(&psIntfAdapter->uCurrRcb, 0); 204 atomic_set(&psIntfAdapter->uCurrRcb, 0);
223} 205}
224 206
225VOID putUsbSuspend(struct work_struct *work) 207void putUsbSuspend(struct work_struct *work)
226{ 208{
227 PS_INTERFACE_ADAPTER psIntfAdapter = NULL; 209 struct bcm_interface_adapter *psIntfAdapter = NULL;
228 struct usb_interface *intf = NULL; 210 struct usb_interface *intf = NULL;
229 psIntfAdapter = container_of(work, S_INTERFACE_ADAPTER, usbSuspendWork); 211 psIntfAdapter = container_of(work, struct bcm_interface_adapter, usbSuspendWork);
230 intf = psIntfAdapter->interface; 212 intf = psIntfAdapter->interface;
231 213
232 if (psIntfAdapter->bSuspended == FALSE) 214 if (psIntfAdapter->bSuspended == FALSE)
diff --git a/drivers/staging/bcm/InterfaceMisc.h b/drivers/staging/bcm/InterfaceMisc.h
index 1dfabdc3aadd..bce6869a7478 100644
--- a/drivers/staging/bcm/InterfaceMisc.h
+++ b/drivers/staging/bcm/InterfaceMisc.h
@@ -2,13 +2,13 @@
2#define __INTERFACE_MISC_H 2#define __INTERFACE_MISC_H
3 3
4INT 4INT
5InterfaceRDM(PS_INTERFACE_ADAPTER psIntfAdapter, 5InterfaceRDM(struct bcm_interface_adapter *psIntfAdapter,
6 UINT addr, 6 UINT addr,
7 PVOID buff, 7 PVOID buff,
8 INT len); 8 INT len);
9 9
10INT 10INT
11InterfaceWRM(PS_INTERFACE_ADAPTER psIntfAdapter, 11InterfaceWRM(struct bcm_interface_adapter *psIntfAdapter,
12 UINT addr, 12 UINT addr,
13 PVOID buff, 13 PVOID buff,
14 INT len); 14 INT len);
@@ -35,7 +35,7 @@ int BcmWRM(PVOID arg,
35 35
36INT Bcm_clear_halt_of_endpoints(struct bcm_mini_adapter *Adapter); 36INT Bcm_clear_halt_of_endpoints(struct bcm_mini_adapter *Adapter);
37 37
38VOID Bcm_kill_all_URBs(PS_INTERFACE_ADAPTER psIntfAdapter); 38VOID Bcm_kill_all_URBs(struct bcm_interface_adapter *psIntfAdapter);
39 39
40#define DISABLE_USB_ZERO_LEN_INT 0x0F011878 40#define DISABLE_USB_ZERO_LEN_INT 0x0F011878
41 41
diff --git a/drivers/staging/bcm/InterfaceRx.c b/drivers/staging/bcm/InterfaceRx.c
index 8a9f90fbdf13..26f5bc76111c 100644
--- a/drivers/staging/bcm/InterfaceRx.c
+++ b/drivers/staging/bcm/InterfaceRx.c
@@ -12,10 +12,10 @@ static int SearchVcid(struct bcm_mini_adapter *Adapter,unsigned short usVcid)
12} 12}
13 13
14 14
15static PUSB_RCB 15static struct bcm_usb_rcb *
16GetBulkInRcb(PS_INTERFACE_ADAPTER psIntfAdapter) 16GetBulkInRcb(struct bcm_interface_adapter *psIntfAdapter)
17{ 17{
18 PUSB_RCB pRcb = NULL; 18 struct bcm_usb_rcb *pRcb = NULL;
19 UINT index = 0; 19 UINT index = 0;
20 20
21 if((atomic_read(&psIntfAdapter->uNumRcbUsed) < MAXIMUM_USB_RCB) && 21 if((atomic_read(&psIntfAdapter->uNumRcbUsed) < MAXIMUM_USB_RCB) &&
@@ -43,8 +43,8 @@ static void read_bulk_callback(struct urb *urb)
43 UINT uiIndex=0; 43 UINT uiIndex=0;
44 int process_done = 1; 44 int process_done = 1;
45 //int idleflag = 0 ; 45 //int idleflag = 0 ;
46 PUSB_RCB pRcb = (PUSB_RCB)urb->context; 46 struct bcm_usb_rcb *pRcb = (struct bcm_usb_rcb *)urb->context;
47 PS_INTERFACE_ADAPTER psIntfAdapter = pRcb->psIntfAdapter; 47 struct bcm_interface_adapter *psIntfAdapter = pRcb->psIntfAdapter;
48 struct bcm_mini_adapter *Adapter = psIntfAdapter->psAdapter; 48 struct bcm_mini_adapter *Adapter = psIntfAdapter->psAdapter;
49 struct bcm_leader *pLeader = urb->transfer_buffer; 49 struct bcm_leader *pLeader = urb->transfer_buffer;
50 50
@@ -196,7 +196,7 @@ static void read_bulk_callback(struct urb *urb)
196 atomic_dec(&psIntfAdapter->uNumRcbUsed); 196 atomic_dec(&psIntfAdapter->uNumRcbUsed);
197} 197}
198 198
199static int ReceiveRcb(PS_INTERFACE_ADAPTER psIntfAdapter, PUSB_RCB pRcb) 199static int ReceiveRcb(struct bcm_interface_adapter *psIntfAdapter, struct bcm_usb_rcb *pRcb)
200{ 200{
201 struct urb *urb = pRcb->urb; 201 struct urb *urb = pRcb->urb;
202 int retval = 0; 202 int retval = 0;
@@ -240,10 +240,10 @@ Return: TRUE - If Rx was successful.
240 Other - If an error occurred. 240 Other - If an error occurred.
241*/ 241*/
242 242
243BOOLEAN InterfaceRx (PS_INTERFACE_ADAPTER psIntfAdapter) 243BOOLEAN InterfaceRx (struct bcm_interface_adapter *psIntfAdapter)
244{ 244{
245 USHORT RxDescCount = NUM_RX_DESC - atomic_read(&psIntfAdapter->uNumRcbUsed); 245 USHORT RxDescCount = NUM_RX_DESC - atomic_read(&psIntfAdapter->uNumRcbUsed);
246 PUSB_RCB pRcb = NULL; 246 struct bcm_usb_rcb *pRcb = NULL;
247 247
248// RxDescCount = psIntfAdapter->psAdapter->CurrNumRecvDescs - 248// RxDescCount = psIntfAdapter->psAdapter->CurrNumRecvDescs -
249// psIntfAdapter->psAdapter->PrevNumRecvDescs; 249// psIntfAdapter->psAdapter->PrevNumRecvDescs;
diff --git a/drivers/staging/bcm/InterfaceRx.h b/drivers/staging/bcm/InterfaceRx.h
index 96e81a1d37b8..424645e9e476 100644
--- a/drivers/staging/bcm/InterfaceRx.h
+++ b/drivers/staging/bcm/InterfaceRx.h
@@ -1,7 +1,7 @@
1#ifndef _INTERFACE_RX_H 1#ifndef _INTERFACE_RX_H
2#define _INTERFACE_RX_H 2#define _INTERFACE_RX_H
3 3
4BOOLEAN InterfaceRx(PS_INTERFACE_ADAPTER Adapter); 4BOOLEAN InterfaceRx(struct bcm_interface_adapter *Adapter);
5 5
6#endif 6#endif
7 7
diff --git a/drivers/staging/bcm/InterfaceTx.c b/drivers/staging/bcm/InterfaceTx.c
index 7e2b53be4d9e..b8c785556dda 100644
--- a/drivers/staging/bcm/InterfaceTx.c
+++ b/drivers/staging/bcm/InterfaceTx.c
@@ -3,8 +3,8 @@
3/*this is transmit call-back(BULK OUT)*/ 3/*this is transmit call-back(BULK OUT)*/
4static void write_bulk_callback(struct urb *urb/*, struct pt_regs *regs*/) 4static void write_bulk_callback(struct urb *urb/*, struct pt_regs *regs*/)
5{ 5{
6 PUSB_TCB pTcb= (PUSB_TCB)urb->context; 6 struct bcm_usb_tcb *pTcb= (struct bcm_usb_tcb *)urb->context;
7 PS_INTERFACE_ADAPTER psIntfAdapter = pTcb->psIntfAdapter; 7 struct bcm_interface_adapter *psIntfAdapter = pTcb->psIntfAdapter;
8 struct bcm_link_request *pControlMsg = (struct bcm_link_request *)urb->transfer_buffer; 8 struct bcm_link_request *pControlMsg = (struct bcm_link_request *)urb->transfer_buffer;
9 struct bcm_mini_adapter *psAdapter = psIntfAdapter->psAdapter ; 9 struct bcm_mini_adapter *psAdapter = psIntfAdapter->psAdapter ;
10 BOOLEAN bpowerDownMsg = FALSE ; 10 BOOLEAN bpowerDownMsg = FALSE ;
@@ -107,9 +107,9 @@ err_exit :
107} 107}
108 108
109 109
110static PUSB_TCB GetBulkOutTcb(PS_INTERFACE_ADAPTER psIntfAdapter) 110static struct bcm_usb_tcb *GetBulkOutTcb(struct bcm_interface_adapter *psIntfAdapter)
111{ 111{
112 PUSB_TCB pTcb = NULL; 112 struct bcm_usb_tcb *pTcb = NULL;
113 UINT index = 0; 113 UINT index = 0;
114 114
115 if((atomic_read(&psIntfAdapter->uNumTcbUsed) < MAXIMUM_USB_TCB) && 115 if((atomic_read(&psIntfAdapter->uNumTcbUsed) < MAXIMUM_USB_TCB) &&
@@ -128,7 +128,7 @@ static PUSB_TCB GetBulkOutTcb(PS_INTERFACE_ADAPTER psIntfAdapter)
128 return pTcb; 128 return pTcb;
129} 129}
130 130
131static int TransmitTcb(PS_INTERFACE_ADAPTER psIntfAdapter, PUSB_TCB pTcb, PVOID data, int len) 131static int TransmitTcb(struct bcm_interface_adapter *psIntfAdapter, struct bcm_usb_tcb *pTcb, PVOID data, int len)
132{ 132{
133 133
134 struct urb *urb = pTcb->urb; 134 struct urb *urb = pTcb->urb;
@@ -182,9 +182,9 @@ static int TransmitTcb(PS_INTERFACE_ADAPTER psIntfAdapter, PUSB_TCB pTcb, PVOID
182 182
183int InterfaceTransmitPacket(PVOID arg, PVOID data, UINT len) 183int InterfaceTransmitPacket(PVOID arg, PVOID data, UINT len)
184{ 184{
185 PUSB_TCB pTcb= NULL; 185 struct bcm_usb_tcb *pTcb= NULL;
186 186
187 PS_INTERFACE_ADAPTER psIntfAdapter = (PS_INTERFACE_ADAPTER)arg; 187 struct bcm_interface_adapter *psIntfAdapter = (struct bcm_interface_adapter *)arg;
188 pTcb= GetBulkOutTcb(psIntfAdapter); 188 pTcb= GetBulkOutTcb(psIntfAdapter);
189 if(pTcb == NULL) 189 if(pTcb == NULL)
190 { 190 {
diff --git a/drivers/staging/bcm/Ioctl.h b/drivers/staging/bcm/Ioctl.h
index f859cf1c47b0..8c70af90969b 100644
--- a/drivers/staging/bcm/Ioctl.h
+++ b/drivers/staging/bcm/Ioctl.h
@@ -1,247 +1,136 @@
1#ifndef _IOCTL_H_ 1#ifndef _IOCTL_H_
2#define _IOCTL_H_ 2#define _IOCTL_H_
3 3
4typedef struct rdmbuffer 4struct bcm_rdm_buffer {
5{ 5 unsigned long Register;
6 ULONG Register; 6 unsigned long Length;
7 ULONG Length; 7} __packed;
8}__attribute__((packed)) RDM_BUFFER, *PRDM_BUFFER; 8
9 9struct bcm_wrm_buffer {
10 10 unsigned long Register;
11typedef struct wrmbuffer 11 unsigned long Length;
12{ 12 unsigned char Data[4];
13 ULONG Register; 13} __packed;
14 ULONG Length; 14
15 UCHAR Data[4]; 15struct bcm_ioctl_buffer {
16}__attribute__((packed)) WRM_BUFFER, *PWRM_BUFFER;
17
18
19typedef struct ioctlbuffer
20{
21 void __user *InputBuffer; 16 void __user *InputBuffer;
22 ULONG InputLength; 17 unsigned long InputLength;
23 void __user *OutputBuffer; 18 void __user *OutputBuffer;
24 ULONG OutputLength; 19 unsigned long OutputLength;
25}__attribute__((packed)) IOCTL_BUFFER, *PIOCTL_BUFFER; 20} __packed;
26
27typedef struct stGPIOInfo
28{
29 UINT uiGpioNumber ; /* valid numbers 0-15 */
30 UINT uiGpioValue; /* 1 set ; 0 not set */
31}__attribute__((packed))GPIO_INFO,*PGPIO_INFO;
32typedef struct stUserThreadReq
33{
34 //0->Inactivate LED thread.
35 //1->Activate the LED thread
36 UINT ThreadState;
37}__attribute__((packed))USER_THREAD_REQ,*PUSER_THREAD_REQ;
38#define LED_THREAD_ACTIVATION_REQ 1
39
40
41////********** ioctl codes ***********////
42
43#define BCM_IOCTL 'k'
44
45//1.Control code for CONTROL MESSAGES
46
47#define IOCTL_SEND_CONTROL_MESSAGE _IOW(BCM_IOCTL, 0x801,int)
48
49//2.Control code to write a particular value to a particular register
50#define IOCTL_BCM_REGISTER_WRITE _IOW(BCM_IOCTL, 0x802, int) //
51
52//3.
53#define IOCTL_BCM_REGISTER_READ _IOR(BCM_IOCTL, 0x803, int) //
54 21
55//4.Control code to write x number of bytes to common memory 22struct bcm_gpio_info {
56//starting from address y 23 unsigned int uiGpioNumber; /* valid numbers 0-15 */
57#define IOCTL_BCM_COMMON_MEMORY_WRITE _IOW(BCM_IOCTL, 0x804, int)// 24 unsigned int uiGpioValue; /* 1 set ; 0 not set */
25} __packed;
58 26
59//5.Control code to write x number of bytes to common memory 27struct bcm_user_thread_req {
60//starting from address y 28 /* 0->Inactivate LED thread. */
61#define IOCTL_BCM_COMMON_MEMORY_READ _IOR(BCM_IOCTL, 0x805, int)// 29 /* 1->Activate the LED thread */
62 30 unsigned int ThreadState;
63//6.Control code for CONTROL MESSAGES 31} __packed;
64#define IOCTL_GET_CONTROL_MESSAGE _IOR(BCM_IOCTL, 0x806, int)//
65
66//7.Control code for FIRMWARE DOWNLOAD
67#define IOCTL_BCM_FIRMWARE_DOWNLOAD _IOW(BCM_IOCTL, 0x807, int)//
68
69#define IOCTL_BCM_SET_SEND_VCID _IOW(BCM_IOCTL, 0x808, int)
70
71//9.Control code for TRANSFER MODE SWITCHING
72#define IOCTL_BCM_SWITCH_TRANSFER_MODE _IOW(BCM_IOCTL, 0x809, int)
73//10.Control code for LINK UP
74#define IOCTL_LINK_REQ _IOW(BCM_IOCTL, 0x80A, int)
75
76//11.Control code for RSSI Level Request
77#define IOCTL_RSSI_LEVEL_REQ _IOW(BCM_IOCTL, 0x80B, int)
78//12.Control code for IDLE MODE CONTROL
79#define IOCTL_IDLE_REQ _IOW(BCM_IOCTL, 0x80C, int)
80//13.Control code for SS/BS info
81#define IOCTL_SS_INFO_REQ _IOW(BCM_IOCTL, 0x80D, int)
82 32
33#define LED_THREAD_ACTIVATION_REQ 1
34#define BCM_IOCTL 'k'
35#define IOCTL_SEND_CONTROL_MESSAGE _IOW(BCM_IOCTL, 0x801, int)
36#define IOCTL_BCM_REGISTER_WRITE _IOW(BCM_IOCTL, 0x802, int)
37#define IOCTL_BCM_REGISTER_READ _IOR(BCM_IOCTL, 0x803, int)
38#define IOCTL_BCM_COMMON_MEMORY_WRITE _IOW(BCM_IOCTL, 0x804, int)
39#define IOCTL_BCM_COMMON_MEMORY_READ _IOR(BCM_IOCTL, 0x805, int)
40#define IOCTL_GET_CONTROL_MESSAGE _IOR(BCM_IOCTL, 0x806, int)
41#define IOCTL_BCM_FIRMWARE_DOWNLOAD _IOW(BCM_IOCTL, 0x807, int)
42#define IOCTL_BCM_SET_SEND_VCID _IOW(BCM_IOCTL, 0x808, int)
43#define IOCTL_BCM_SWITCH_TRANSFER_MODE _IOW(BCM_IOCTL, 0x809, int)
44#define IOCTL_LINK_REQ _IOW(BCM_IOCTL, 0x80A, int)
45#define IOCTL_RSSI_LEVEL_REQ _IOW(BCM_IOCTL, 0x80B, int)
46#define IOCTL_IDLE_REQ _IOW(BCM_IOCTL, 0x80C, int)
47#define IOCTL_SS_INFO_REQ _IOW(BCM_IOCTL, 0x80D, int)
83#define IOCTL_GET_STATISTICS_POINTER _IOW(BCM_IOCTL, 0x80E, int) 48#define IOCTL_GET_STATISTICS_POINTER _IOW(BCM_IOCTL, 0x80E, int)
84 49#define IOCTL_CM_REQUEST _IOW(BCM_IOCTL, 0x80F, int)
85#define IOCTL_CM_REQUEST _IOW(BCM_IOCTL, 0x80F, int) 50#define IOCTL_INIT_PARAM_REQ _IOW(BCM_IOCTL, 0x810, int)
86 51#define IOCTL_MAC_ADDR_REQ _IOW(BCM_IOCTL, 0x811, int)
87#define IOCTL_INIT_PARAM_REQ _IOW(BCM_IOCTL, 0x810, int) 52#define IOCTL_MAC_ADDR_RESP _IOWR(BCM_IOCTL, 0x812, int)
88 53#define IOCTL_CLASSIFICATION_RULE _IOW(BCM_IOCTL, 0x813, char)
89#define IOCTL_MAC_ADDR_REQ _IOW(BCM_IOCTL, 0x811, int)
90
91#define IOCTL_MAC_ADDR_RESP _IOWR(BCM_IOCTL, 0x812, int)
92
93#define IOCTL_CLASSIFICATION_RULE _IOW(BCM_IOCTL, 0x813, char)
94
95#define IOCTL_CLOSE_NOTIFICATION _IO(BCM_IOCTL, 0x814) 54#define IOCTL_CLOSE_NOTIFICATION _IO(BCM_IOCTL, 0x814)
96 55#define IOCTL_LINK_UP _IO(BCM_IOCTL, 0x815)
97#define IOCTL_LINK_UP _IO(BCM_IOCTL, 0x815) 56#define IOCTL_LINK_DOWN _IO(BCM_IOCTL, 0x816, struct bcm_ioctl_buffer)
98 57#define IOCTL_CHIP_RESET _IO(BCM_IOCTL, 0x816)
99#define IOCTL_LINK_DOWN _IO(BCM_IOCTL, 0x816, IOCTL_BUFFER)
100
101#define IOCTL_CHIP_RESET _IO(BCM_IOCTL, 0x816)
102
103#define IOCTL_CINR_LEVEL_REQ _IOW(BCM_IOCTL, 0x817, char) 58#define IOCTL_CINR_LEVEL_REQ _IOW(BCM_IOCTL, 0x817, char)
104 59#define IOCTL_WTM_CONTROL_REQ _IOW(BCM_IOCTL, 0x817, char)
105#define IOCTL_WTM_CONTROL_REQ _IOW(BCM_IOCTL, 0x817,char)
106
107#define IOCTL_BE_BUCKET_SIZE _IOW(BCM_IOCTL, 0x818, unsigned long) 60#define IOCTL_BE_BUCKET_SIZE _IOW(BCM_IOCTL, 0x818, unsigned long)
108
109#define IOCTL_RTPS_BUCKET_SIZE _IOW(BCM_IOCTL, 0x819, unsigned long) 61#define IOCTL_RTPS_BUCKET_SIZE _IOW(BCM_IOCTL, 0x819, unsigned long)
110 62#define IOCTL_QOS_THRESHOLD _IOW(BCM_IOCTL, 0x820, unsigned long)
111#define IOCTL_QOS_THRESHOLD _IOW(BCM_IOCTL, 0x820, unsigned long) 63#define IOCTL_DUMP_PACKET_INFO _IO(BCM_IOCTL, 0x821)
112 64#define IOCTL_GET_PACK_INFO _IOR(BCM_IOCTL, 0x823, int)
113#define IOCTL_DUMP_PACKET_INFO _IO(BCM_IOCTL, 0x821)
114
115#define IOCTL_GET_PACK_INFO _IOR(BCM_IOCTL, 0x823, int)
116
117#define IOCTL_BCM_GET_DRIVER_VERSION _IOR(BCM_IOCTL, 0x829, int) 65#define IOCTL_BCM_GET_DRIVER_VERSION _IOR(BCM_IOCTL, 0x829, int)
118 66#define IOCTL_BCM_GET_CURRENT_STATUS _IOW(BCM_IOCTL, 0x828, int)
119#define IOCTL_BCM_GET_CURRENT_STATUS _IOW(BCM_IOCTL, 0x828, int) 67#define IOCTL_BCM_GPIO_SET_REQUEST _IOW(BCM_IOCTL, 0x82A, int)
120 68#define IOCTL_BCM_GPIO_STATUS_REQUEST _IOW(BCM_IOCTL, 0x82b, int)
121#define IOCTL_BCM_GPIO_SET_REQUEST _IOW(BCM_IOCTL, 0x82A, int) 69#define IOCTL_BCM_GET_DSX_INDICATION _IOR(BCM_IOCTL, 0x854, int)
122 70#define IOCTL_BCM_BUFFER_DOWNLOAD_START _IOW(BCM_IOCTL, 0x855, int)
123#define IOCTL_BCM_GPIO_STATUS_REQUEST _IOW(BCM_IOCTL, 0x82b, int) 71#define IOCTL_BCM_BUFFER_DOWNLOAD _IOW(BCM_IOCTL, 0x856, int)
124 72#define IOCTL_BCM_BUFFER_DOWNLOAD_STOP _IOW(BCM_IOCTL, 0x857, int)
125#define IOCTL_BCM_GET_DSX_INDICATION _IOR(BCM_IOCTL, 0x854, int) 73#define IOCTL_BCM_REGISTER_WRITE_PRIVATE _IOW(BCM_IOCTL, 0x826, char)
126
127#define IOCTL_BCM_BUFFER_DOWNLOAD_START _IOW(BCM_IOCTL, 0x855, int)
128
129#define IOCTL_BCM_BUFFER_DOWNLOAD _IOW(BCM_IOCTL, 0x856, int)
130
131#define IOCTL_BCM_BUFFER_DOWNLOAD_STOP _IOW(BCM_IOCTL, 0x857, int)
132
133#define IOCTL_BCM_REGISTER_WRITE_PRIVATE _IOW(BCM_IOCTL, 0x826, char)
134
135#define IOCTL_BCM_REGISTER_READ_PRIVATE _IOW(BCM_IOCTL, 0x827, char) 74#define IOCTL_BCM_REGISTER_READ_PRIVATE _IOW(BCM_IOCTL, 0x827, char)
136 75#define IOCTL_BCM_SET_DEBUG _IOW(BCM_IOCTL, 0x824, struct bcm_ioctl_buffer)
137#define IOCTL_BCM_SET_DEBUG _IOW(BCM_IOCTL, 0x824, IOCTL_BUFFER) 76#define IOCTL_BCM_EEPROM_REGISTER_WRITE _IOW(BCM_IOCTL, 0x858, int)
138 77#define IOCTL_BCM_EEPROM_REGISTER_READ _IOR(BCM_IOCTL, 0x859, int)
139#define IOCTL_BCM_EEPROM_REGISTER_WRITE _IOW(BCM_IOCTL, 0x858, int)
140
141#define IOCTL_BCM_EEPROM_REGISTER_READ _IOR(BCM_IOCTL, 0x859, int)
142
143#define IOCTL_BCM_WAKE_UP_DEVICE_FROM_IDLE _IOR(BCM_IOCTL, 0x860, int) 78#define IOCTL_BCM_WAKE_UP_DEVICE_FROM_IDLE _IOR(BCM_IOCTL, 0x860, int)
144 79#define IOCTL_BCM_SET_MAC_TRACING _IOW(BCM_IOCTL, 0x82c, int)
145#define IOCTL_BCM_SET_MAC_TRACING _IOW(BCM_IOCTL, 0x82c, int) 80#define IOCTL_BCM_GET_HOST_MIBS _IOW(BCM_IOCTL, 0x853, int)
146 81#define IOCTL_BCM_NVM_READ _IOR(BCM_IOCTL, 0x861, int)
147#define IOCTL_BCM_GET_HOST_MIBS _IOW(BCM_IOCTL, 0x853, int) 82#define IOCTL_BCM_NVM_WRITE _IOW(BCM_IOCTL, 0x862, int)
148 83#define IOCTL_BCM_GET_NVM_SIZE _IOR(BCM_IOCTL, 0x863, int)
149#define IOCTL_BCM_NVM_READ _IOR(BCM_IOCTL, 0x861, int) 84#define IOCTL_BCM_CAL_INIT _IOR(BCM_IOCTL, 0x864, int)
150 85#define IOCTL_BCM_BULK_WRM _IOW(BCM_IOCTL, 0x90B, int)
151#define IOCTL_BCM_NVM_WRITE _IOW(BCM_IOCTL, 0x862, int) 86#define IOCTL_BCM_FLASH2X_SECTION_READ _IOR(BCM_IOCTL, 0x865, int)
152
153#define IOCTL_BCM_GET_NVM_SIZE _IOR(BCM_IOCTL, 0x863, int)
154
155#define IOCTL_BCM_CAL_INIT _IOR(BCM_IOCTL, 0x864, int)
156
157#define IOCTL_BCM_BULK_WRM _IOW(BCM_IOCTL, 0x90B, int)
158
159#define IOCTL_BCM_FLASH2X_SECTION_READ _IOR(BCM_IOCTL, 0x865, int)
160
161#define IOCTL_BCM_FLASH2X_SECTION_WRITE _IOW(BCM_IOCTL, 0x866, int) 87#define IOCTL_BCM_FLASH2X_SECTION_WRITE _IOW(BCM_IOCTL, 0x866, int)
88#define IOCTL_BCM_GET_FLASH2X_SECTION_BITMAP _IOR(BCM_IOCTL, 0x867, int)
89#define IOCTL_BCM_SET_ACTIVE_SECTION _IOW(BCM_IOCTL, 0x868, int)
90#define IOCTL_BCM_IDENTIFY_ACTIVE_SECTION _IO(BCM_IOCTL, 0x869)
91#define IOCTL_BCM_COPY_SECTION _IOW(BCM_IOCTL, 0x870, int)
92#define IOCTL_BCM_GET_FLASH_CS_INFO _IOR(BCM_IOCTL, 0x871, int)
93#define IOCTL_BCM_SELECT_DSD _IOW(BCM_IOCTL, 0x872, int)
94#define IOCTL_BCM_NVM_RAW_READ _IOR(BCM_IOCTL, 0x875, int)
95#define IOCTL_BCM_CNTRLMSG_MASK _IOW(BCM_IOCTL, 0x874, int)
96#define IOCTL_BCM_GET_DEVICE_DRIVER_INFO _IOR(BCM_IOCTL, 0x877, int)
97#define IOCTL_BCM_TIME_SINCE_NET_ENTRY _IOR(BCM_IOCTL, 0x876, int)
98#define BCM_LED_THREAD_STATE_CHANGE_REQ _IOW(BCM_IOCTL, 0x878, int)
99#define IOCTL_BCM_GPIO_MULTI_REQUEST _IOW(BCM_IOCTL, 0x82D, struct bcm_ioctl_buffer)
100#define IOCTL_BCM_GPIO_MODE_REQUEST _IOW(BCM_IOCTL, 0x82E, struct bcm_ioctl_buffer)
101
102enum bcm_interface_type {
103 BCM_MII,
104 BCM_CARDBUS,
105 BCM_USB,
106 BCM_SDIO,
107 BCM_PCMCIA
108};
162 109
163#define IOCTL_BCM_GET_FLASH2X_SECTION_BITMAP _IOR(BCM_IOCTL,0x867, int) 110struct bcm_driver_info {
164 111 NVM_TYPE u32NVMType;
165#define IOCTL_BCM_SET_ACTIVE_SECTION _IOW(BCM_IOCTL,0x868, int) 112 unsigned int MaxRDMBufferSize;
166 113 enum bcm_interface_type u32InterfaceType;
167#define IOCTL_BCM_IDENTIFY_ACTIVE_SECTION _IO(BCM_IOCTL,0x869) 114 unsigned int u32DSDStartOffset;
168 115 unsigned int u32RxAlignmentCorrection;
169#define IOCTL_BCM_COPY_SECTION _IOW(BCM_IOCTL, 0x870,int) 116 unsigned int u32Reserved[10];
170 117};
171#define IOCTL_BCM_GET_FLASH_CS_INFO _IOR(BCM_IOCTL, 0x871, int)
172
173#define IOCTL_BCM_SELECT_DSD _IOW(BCM_IOCTL, 0x872, int)
174
175#define IOCTL_BCM_NVM_RAW_READ _IOR(BCM_IOCTL, 0x875, int)
176
177#define IOCTL_BCM_CNTRLMSG_MASK _IOW(BCM_IOCTL, 0x874, int)
178
179#define IOCTL_BCM_GET_DEVICE_DRIVER_INFO _IOR(BCM_IOCTL, 0x877, int)
180
181#define IOCTL_BCM_TIME_SINCE_NET_ENTRY _IOR(BCM_IOCTL, 0x876, int)
182
183#define BCM_LED_THREAD_STATE_CHANGE_REQ _IOW(BCM_IOCTL, 0x878, int)
184
185#define IOCTL_BCM_GPIO_MULTI_REQUEST _IOW(BCM_IOCTL, 0x82D, IOCTL_BUFFER)
186#define IOCTL_BCM_GPIO_MODE_REQUEST _IOW(BCM_IOCTL, 0x82E, IOCTL_BUFFER)
187
188
189
190typedef enum _BCM_INTERFACE_TYPE
191{
192 BCM_MII,
193 BCM_CARDBUS,
194 BCM_USB,
195 BCM_SDIO,
196 BCM_PCMCIA
197}BCM_INTERFACE_TYPE;
198
199typedef struct _DEVICE_DRIVER_INFO
200{
201 NVM_TYPE u32NVMType;
202 UINT MaxRDMBufferSize;
203 BCM_INTERFACE_TYPE u32InterfaceType;
204 UINT u32DSDStartOffset;
205 UINT u32RxAlignmentCorrection;
206 UINT u32Reserved[10];
207} DEVICE_DRIVER_INFO;
208
209typedef struct _NVM_READWRITE
210{
211 118
119struct bcm_nvm_readwrite {
212 void __user *pBuffer; 120 void __user *pBuffer;
213// Data to be written from|read to. Memory should be allocated by the caller.
214
215 uint32_t uiOffset; 121 uint32_t uiOffset;
216// offset at which data should be written to or read from. 122 uint32_t uiNumBytes;
217 123 bool bVerify;
218 uint32_t uiNumBytes; 124};
219// No. of bytes to be written or read.
220
221 bool bVerify;
222// Applicable only for write. If set verification of written data will be done.
223
224} NVM_READWRITE,*PNVM_READWRITE;
225typedef struct bulkwrmbuffer
226{
227 ULONG Register;
228 ULONG SwapEndian;
229 ULONG Values[1];
230
231}BULKWRM_BUFFER,*PBULKWRM_BUFFER;
232
233
234/***********Structure used for FlashMap2.x *******************************/
235 125
236/* 126struct bcm_bulk_wrm_buffer {
237* These are Sction present inside the Flash. 127 unsigned long Register;
238* There is sectional RD/WR for flash Map 2.x. 128 unsigned long SwapEndian;
239* hence these section will be used in read/write API. 129 unsigned long Values[1];
240*/ 130};
241 131
242typedef enum _FLASH2X_SECTION_VAL 132enum bcm_flash2x_section_val {
243{ 133 NO_SECTION_VAL = 0, /* no section is chosen when absolute offset is given for RD/WR */
244 NO_SECTION_VAL = 0, //no section is chosen when absolute offset is given for RD/WR
245 ISO_IMAGE1, 134 ISO_IMAGE1,
246 ISO_IMAGE2, 135 ISO_IMAGE2,
247 DSD0, 136 DSD0,
@@ -257,104 +146,81 @@ typedef enum _FLASH2X_SECTION_VAL
257 ISO_IMAGE2_PART2, 146 ISO_IMAGE2_PART2,
258 ISO_IMAGE2_PART3, 147 ISO_IMAGE2_PART3,
259 TOTAL_SECTIONS 148 TOTAL_SECTIONS
260}FLASH2X_SECTION_VAL; 149};
261 150
262/* 151/*
263* Structure used for READ/WRITE Flash Map2.x 152 * Structure used for READ/WRITE Flash Map2.x
264*/ 153 */
265typedef struct _FLASH2X_READWRITE 154struct bcm_flash2x_readwrite {
266{ 155 enum bcm_flash2x_section_val Section; /* which section has to be read/written */
267 156 u32 offset; /* Offset within Section. */
268 FLASH2X_SECTION_VAL Section; //which section has to be read/written 157 u32 numOfBytes; /* NOB from the offset */
269 B_UINT32 offset; //Offset within Section. 158 u32 bVerify;
270 B_UINT32 numOfBytes; //NOB from the offset 159 void __user *pDataBuff; /* Buffer for reading/writing */
271 B_UINT32 bVerify; 160};
272 void __user *pDataBuff; //Buffer for reading/writing
273 161
274}FLASH2X_READWRITE, *PFLASH2X_READWRITE;
275/* 162/*
276* This structure is used for coping one section to other. 163 * This structure is used for coping one section to other.
277* there are two ways to copy one section to other. 164 * there are two ways to copy one section to other.
278* it NOB =0, complete section will be copied on to other. 165 * it NOB =0, complete section will be copied on to other.
279* if NOB !=0, only NOB will be copied from the given offset. 166 * if NOB !=0, only NOB will be copied from the given offset.
280*/ 167 */
281 168
282typedef struct _FLASH2X_COPY_SECTION 169struct bcm_flash2x_copy_section {
283{ 170 enum bcm_flash2x_section_val SrcSection;
284 //Src Section from which Data has to be copied to DstSection 171 enum bcm_flash2x_section_val DstSection;
285 FLASH2X_SECTION_VAL SrcSection; 172 u32 offset;
286 173 u32 numOfBytes;
287 //Destination Section from where Data has to be coppied. 174};
288 FLASH2X_SECTION_VAL DstSection;
289
290 //Offset within Section. if NOB =0 it will be ignored and data will be coped from offset 0.
291 B_UINT32 offset;
292
293 //NOB from the offset. if NOB = 0 complete src section will be copied to Destination section.
294 B_UINT32 numOfBytes;
295} FLASH2X_COPY_SECTION, *PFLASH2X_COPY_SECTION;
296
297
298typedef enum _SECTION_TYPE
299{
300 ISO = 0,
301 VSA = 1,
302 DSD = 2
303} SECTION_TYPE, *PSECTION_TYPE;
304 175
305/* 176/*
306* This section provide the complete bitmap of the Flash. 177 * This section provide the complete bitmap of the Flash.
307* using this map lib/APP will isssue read/write command. 178 * using this map lib/APP will isssue read/write command.
308 Fields are defined as : 179 * Fields are defined as :
309 Bit [0] = section is present //1:present, 0: Not present 180 * Bit [0] = section is present //1:present, 0: Not present
310* Bit [1] = section is valid //1: valid, 0: not valid 181 * Bit [1] = section is valid //1: valid, 0: not valid
311* Bit [2] = Section is R/W //0: RW, 1: RO 182 * Bit [2] = Section is R/W //0: RW, 1: RO
312* Bit [3] = Section is Active or not 1 means Active, 0->inactive 183 * Bit [3] = Section is Active or not 1 means Active, 0->inactive
313* Bit [7...3] = Reserved 184 * Bit [7...3] = Reserved
314*/ 185 */
315 186
316typedef struct _FLASH2X_BITMAP 187struct bcm_flash2x_bitmap {
317{ 188 unsigned char ISO_IMAGE1;
318 UCHAR ISO_IMAGE1; 189 unsigned char ISO_IMAGE2;
319 UCHAR ISO_IMAGE2; 190 unsigned char DSD0;
320 UCHAR DSD0; 191 unsigned char DSD1;
321 UCHAR DSD1; 192 unsigned char DSD2;
322 UCHAR DSD2; 193 unsigned char VSA0;
323 UCHAR VSA0; 194 unsigned char VSA1;
324 UCHAR VSA1; 195 unsigned char VSA2;
325 UCHAR VSA2; 196 unsigned char SCSI;
326 UCHAR SCSI; 197 unsigned char CONTROL_SECTION;
327 UCHAR CONTROL_SECTION; 198 /* Reserved for future use */
328 //Reserved for future use 199 unsigned char Reserved0;
329 UCHAR Reserved0; 200 unsigned char Reserved1;
330 UCHAR Reserved1; 201 unsigned char Reserved2;
331 UCHAR Reserved2; 202};
332}FLASH2X_BITMAP, *PFLASH2X_BITMAP;
333 203
334//for net entry time check 204struct bcm_time_elapsed {
335typedef struct _ST_TIME_ELAPSED_ 205 unsigned long long ul64TimeElapsedSinceNetEntry;
336{ 206 u32 uiReserved[4];
337 ULONG64 ul64TimeElapsedSinceNetEntry; 207};
338 UINT32 uiReserved[4]; //By chance if required for future proofing
339}ST_TIME_ELAPSED,*PST_TIME_ELAPSED;
340 208
341enum { 209enum {
342 WIMAX_IDX=0, /*To access WiMAX chip GPIO's for GPIO_MULTI_INFO or GPIO_MULTI_MODE*/ 210 WIMAX_IDX = 0, /* To access WiMAX chip GPIO's for GPIO_MULTI_INFO or GPIO_MULTI_MODE */
343 HOST_IDX, /*To access Host chip GPIO's for GPIO_MULTI_INFO or GPIO_MULTI_MODE*/ 211 HOST_IDX, /* To access Host chip GPIO's for GPIO_MULTI_INFO or GPIO_MULTI_MODE */
344 MAX_IDX 212 MAX_IDX
345}; 213};
346typedef struct stGPIOMultiInfo
347{
348 UINT uiGPIOCommand; /* 1 for set and 0 for get*/
349 UINT uiGPIOMask; /* set the correspondig bit to 1 to access GPIO*/
350 UINT uiGPIOValue; /* 0 or 1; value to be set when command is 1.*/
351}__attribute__((packed))GPIO_MULTI_INFO , *PGPIO_MULTI_INFO;
352 214
353typedef struct stGPIOMultiMode 215struct bcm_gpio_multi_info {
354{ 216 unsigned int uiGPIOCommand; /* 1 for set and 0 for get */
355 UINT uiGPIOMode; /* 1 for OUT mode, 0 for IN mode*/ 217 unsigned int uiGPIOMask; /* set the correspondig bit to 1 to access GPIO */
356 UINT uiGPIOMask; /* GPIO mask to set mode*/ 218 unsigned int uiGPIOValue; /* 0 or 1; value to be set when command is 1. */
357}__attribute__((packed))GPIO_MULTI_MODE, *PGPIO_MULTI_MODE; 219} __packed;
358 220
221struct bcm_gpio_multi_mode {
222 unsigned int uiGPIOMode; /* 1 for OUT mode, 0 for IN mode */
223 unsigned int uiGPIOMask; /* GPIO mask to set mode */
224} __packed;
359 225
360#endif 226#endif
diff --git a/drivers/staging/bcm/LeakyBucket.c b/drivers/staging/bcm/LeakyBucket.c
index 6e8a3279698b..877cf0b2bee1 100644
--- a/drivers/staging/bcm/LeakyBucket.c
+++ b/drivers/staging/bcm/LeakyBucket.c
@@ -21,10 +21,12 @@ static VOID UpdateTokenCount(register struct bcm_mini_adapter *Adapter)
21 INT i = 0; 21 INT i = 0;
22 struct timeval tv; 22 struct timeval tv;
23 23
24 BCM_DEBUG_PRINT(Adapter,DBG_TYPE_TX, TOKEN_COUNTS, DBG_LVL_ALL, "=====>\n"); 24 BCM_DEBUG_PRINT(Adapter, DBG_TYPE_TX, TOKEN_COUNTS, DBG_LVL_ALL,
25 "=====>\n");
25 if(NULL == Adapter) 26 if(NULL == Adapter)
26 { 27 {
27 BCM_DEBUG_PRINT(Adapter,DBG_TYPE_TX, TOKEN_COUNTS, DBG_LVL_ALL, "Adapter found NULL!\n"); 28 BCM_DEBUG_PRINT(Adapter, DBG_TYPE_TX, TOKEN_COUNTS,
29 DBG_LVL_ALL, "Adapter found NULL!\n");
28 return; 30 return;
29 } 31 }
30 32
diff --git a/drivers/staging/bcm/Misc.c b/drivers/staging/bcm/Misc.c
index f13a9582a82f..c92078e7fe86 100644
--- a/drivers/staging/bcm/Misc.c
+++ b/drivers/staging/bcm/Misc.c
@@ -1,14 +1,14 @@
1#include "headers.h" 1#include "headers.h"
2 2
3static int BcmFileDownload(struct bcm_mini_adapter *Adapter, const char *path, unsigned int loc); 3static int BcmFileDownload(struct bcm_mini_adapter *Adapter, const char *path, unsigned int loc);
4static VOID doPowerAutoCorrection(struct bcm_mini_adapter *psAdapter); 4static void doPowerAutoCorrection(struct bcm_mini_adapter *psAdapter);
5static void HandleShutDownModeRequest(struct bcm_mini_adapter *Adapter, PUCHAR pucBuffer); 5static void HandleShutDownModeRequest(struct bcm_mini_adapter *Adapter, PUCHAR pucBuffer);
6static int bcm_parse_target_params(struct bcm_mini_adapter *Adapter); 6static int bcm_parse_target_params(struct bcm_mini_adapter *Adapter);
7static void beceem_protocol_reset(struct bcm_mini_adapter *Adapter); 7static void beceem_protocol_reset(struct bcm_mini_adapter *Adapter);
8 8
9static VOID default_wimax_protocol_initialize(struct bcm_mini_adapter *Adapter) 9static void default_wimax_protocol_initialize(struct bcm_mini_adapter *Adapter)
10{ 10{
11 UINT uiLoopIndex; 11 unsigned int uiLoopIndex;
12 12
13 for (uiLoopIndex = 0; uiLoopIndex < NO_OF_QUEUES-1; uiLoopIndex++) { 13 for (uiLoopIndex = 0; uiLoopIndex < NO_OF_QUEUES-1; uiLoopIndex++) {
14 Adapter->PackInfo[uiLoopIndex].uiThreshold = TX_PACKET_THRESHOLD; 14 Adapter->PackInfo[uiLoopIndex].uiThreshold = TX_PACKET_THRESHOLD;
@@ -24,10 +24,10 @@ static VOID default_wimax_protocol_initialize(struct bcm_mini_adapter *Adapter)
24 return; 24 return;
25} 25}
26 26
27INT InitAdapter(struct bcm_mini_adapter *psAdapter) 27int InitAdapter(struct bcm_mini_adapter *psAdapter)
28{ 28{
29 int i = 0; 29 int i = 0;
30 INT Status = STATUS_SUCCESS; 30 int Status = STATUS_SUCCESS;
31 BCM_DEBUG_PRINT(psAdapter, DBG_TYPE_INITEXIT, MP_INIT, DBG_LVL_ALL, "Initialising Adapter = %p", psAdapter); 31 BCM_DEBUG_PRINT(psAdapter, DBG_TYPE_INITEXIT, MP_INIT, DBG_LVL_ALL, "Initialising Adapter = %p", psAdapter);
32 32
33 if (psAdapter == NULL) { 33 if (psAdapter == NULL) {
@@ -93,7 +93,7 @@ INT InitAdapter(struct bcm_mini_adapter *psAdapter)
93 return STATUS_SUCCESS; 93 return STATUS_SUCCESS;
94} 94}
95 95
96VOID AdapterFree(struct bcm_mini_adapter *Adapter) 96void AdapterFree(struct bcm_mini_adapter *Adapter)
97{ 97{
98 int count; 98 int count;
99 beceem_protocol_reset(Adapter); 99 beceem_protocol_reset(Adapter);
@@ -216,12 +216,12 @@ exit_download:
216 * Logical Adapter 216 * Logical Adapter
217 * Control Packet Buffer 217 * Control Packet Buffer
218 */ 218 */
219INT CopyBufferToControlPacket(struct bcm_mini_adapter *Adapter, PVOID ioBuffer) 219int CopyBufferToControlPacket(struct bcm_mini_adapter *Adapter, void *ioBuffer)
220{ 220{
221 struct bcm_leader *pLeader = NULL; 221 struct bcm_leader *pLeader = NULL;
222 INT Status = 0; 222 int Status = 0;
223 unsigned char *ctrl_buff = NULL; 223 unsigned char *ctrl_buff;
224 UINT pktlen = 0; 224 unsigned int pktlen = 0;
225 struct bcm_link_request *pLinkReq = NULL; 225 struct bcm_link_request *pLinkReq = NULL;
226 PUCHAR pucAddIndication = NULL; 226 PUCHAR pucAddIndication = NULL;
227 227
@@ -253,7 +253,7 @@ INT CopyBufferToControlPacket(struct bcm_mini_adapter *Adapter, PVOID ioBuffer)
253 return STATUS_FAILURE; 253 return STATUS_FAILURE;
254 } 254 }
255 255
256 if (TRUE == Adapter->bShutStatus) { 256 if (Adapter->bShutStatus == TRUE) {
257 BCM_DEBUG_PRINT(Adapter, DBG_TYPE_TX, TX_CONTROL, DBG_LVL_ALL, "SYNC UP IN SHUTDOWN..Device WakeUp\n"); 257 BCM_DEBUG_PRINT(Adapter, DBG_TYPE_TX, TX_CONTROL, DBG_LVL_ALL, "SYNC UP IN SHUTDOWN..Device WakeUp\n");
258 if (Adapter->bTriedToWakeUpFromlowPowerMode == FALSE) { 258 if (Adapter->bTriedToWakeUpFromlowPowerMode == FALSE) {
259 BCM_DEBUG_PRINT(Adapter, DBG_TYPE_TX, TX_CONTROL, DBG_LVL_ALL, "Waking up for the First Time..\n"); 259 BCM_DEBUG_PRINT(Adapter, DBG_TYPE_TX, TX_CONTROL, DBG_LVL_ALL, "Waking up for the First Time..\n");
@@ -275,7 +275,7 @@ INT CopyBufferToControlPacket(struct bcm_mini_adapter *Adapter, PVOID ioBuffer)
275 } 275 }
276 } 276 }
277 277
278 if (TRUE == Adapter->IdleMode) { 278 if (Adapter->IdleMode == TRUE) {
279 /* BCM_DEBUG_PRINT(Adapter,DBG_TYPE_PRINTK, 0, 0,"Device is in Idle mode ... hence\n"); */ 279 /* BCM_DEBUG_PRINT(Adapter,DBG_TYPE_PRINTK, 0, 0,"Device is in Idle mode ... hence\n"); */
280 if (pLeader->Status == LINK_UP_CONTROL_REQ || pLeader->Status == 0x80 || 280 if (pLeader->Status == LINK_UP_CONTROL_REQ || pLeader->Status == 0x80 ||
281 pLeader->Status == CM_CONTROL_NEWDSX_MULTICLASSIFIER_REQ) { 281 pLeader->Status == CM_CONTROL_NEWDSX_MULTICLASSIFIER_REQ) {
@@ -325,64 +325,66 @@ INT CopyBufferToControlPacket(struct bcm_mini_adapter *Adapter, PVOID ioBuffer)
325 pktlen = pLeader->PLength; 325 pktlen = pLeader->PLength;
326 ctrl_buff = (char *)Adapter->txctlpacket[atomic_read(&Adapter->index_wr_txcntrlpkt)%MAX_CNTRL_PKTS]; 326 ctrl_buff = (char *)Adapter->txctlpacket[atomic_read(&Adapter->index_wr_txcntrlpkt)%MAX_CNTRL_PKTS];
327 327
328 if (!ctrl_buff) {
329 BCM_DEBUG_PRINT(Adapter, DBG_TYPE_TX, TX_CONTROL, DBG_LVL_ALL, "mem allocation Failed");
330 return -ENOMEM;
331 }
332
328 BCM_DEBUG_PRINT(Adapter, DBG_TYPE_TX, TX_CONTROL, DBG_LVL_ALL, "Control packet to be taken =%d and address is =%pincoming address is =%p and packet len=%x", 333 BCM_DEBUG_PRINT(Adapter, DBG_TYPE_TX, TX_CONTROL, DBG_LVL_ALL, "Control packet to be taken =%d and address is =%pincoming address is =%p and packet len=%x",
329 atomic_read(&Adapter->index_wr_txcntrlpkt), ctrl_buff, ioBuffer, pktlen); 334 atomic_read(&Adapter->index_wr_txcntrlpkt), ctrl_buff, ioBuffer, pktlen);
330 if (ctrl_buff) { 335
331 if (pLeader) { 336 if (pLeader) {
332 if ((pLeader->Status == 0x80) || 337 if ((pLeader->Status == 0x80) ||
333 (pLeader->Status == CM_CONTROL_NEWDSX_MULTICLASSIFIER_REQ)) { 338 (pLeader->Status == CM_CONTROL_NEWDSX_MULTICLASSIFIER_REQ)) {
334 /* 339 /*
335 * Restructure the DSX message to handle Multiple classifier Support 340 * Restructure the DSX message to handle Multiple classifier Support
336 * Write the Service Flow param Structures directly to the target 341 * Write the Service Flow param Structures directly to the target
337 * and embed the pointers in the DSX messages sent to target. 342 * and embed the pointers in the DSX messages sent to target.
338 */ 343 */
339 /* Lets store the current length of the control packet we are transmitting */ 344 /* Lets store the current length of the control packet we are transmitting */
340 pucAddIndication = (PUCHAR)ioBuffer + LEADER_SIZE; 345 pucAddIndication = (PUCHAR)ioBuffer + LEADER_SIZE;
341 pktlen = pLeader->PLength; 346 pktlen = pLeader->PLength;
342 Status = StoreCmControlResponseMessage(Adapter, pucAddIndication, &pktlen); 347 Status = StoreCmControlResponseMessage(Adapter, pucAddIndication, &pktlen);
343 if (Status != 1) { 348 if (Status != 1) {
344 ClearTargetDSXBuffer(Adapter, ((stLocalSFAddIndicationAlt *)pucAddIndication)->u16TID, FALSE); 349 ClearTargetDSXBuffer(Adapter, ((struct bcm_add_indication_alt *)pucAddIndication)->u16TID, FALSE);
345 BCM_DEBUG_PRINT(Adapter, DBG_TYPE_TX, TX_CONTROL, DBG_LVL_ALL, " Error Restoring The DSX Control Packet. Dsx Buffers on Target may not be Setup Properly "); 350 BCM_DEBUG_PRINT(Adapter, DBG_TYPE_TX, TX_CONTROL, DBG_LVL_ALL, " Error Restoring The DSX Control Packet. Dsx Buffers on Target may not be Setup Properly ");
346 return STATUS_FAILURE; 351 return STATUS_FAILURE;
347 }
348 /*
349 * update the leader to use the new length
350 * The length of the control packet is length of message being sent + Leader length
351 */
352 pLeader->PLength = pktlen;
353 } 352 }
353 /*
354 * update the leader to use the new length
355 * The length of the control packet is length of message being sent + Leader length
356 */
357 pLeader->PLength = pktlen;
354 } 358 }
355
356 if (pktlen + LEADER_SIZE > MAX_CNTL_PKT_SIZE)
357 return -EINVAL;
358
359 memset(ctrl_buff, 0, pktlen+LEADER_SIZE);
360 BCM_DEBUG_PRINT(Adapter, DBG_TYPE_TX, TX_CONTROL, DBG_LVL_ALL, "Copying the Control Packet Buffer with length=%d\n", pLeader->PLength);
361 *(struct bcm_leader *)ctrl_buff = *pLeader;
362 memcpy(ctrl_buff + LEADER_SIZE, ((PUCHAR)ioBuffer + LEADER_SIZE), pLeader->PLength);
363 BCM_DEBUG_PRINT(Adapter, DBG_TYPE_TX, TX_CONTROL, DBG_LVL_ALL, "Enqueuing the Control Packet");
364
365 /* Update the statistics counters */
366 spin_lock_bh(&Adapter->PackInfo[HiPriority].SFQueueLock);
367 Adapter->PackInfo[HiPriority].uiCurrentBytesOnHost += pLeader->PLength;
368 Adapter->PackInfo[HiPriority].uiCurrentPacketsOnHost++;
369 atomic_inc(&Adapter->TotalPacketCount);
370 spin_unlock_bh(&Adapter->PackInfo[HiPriority].SFQueueLock);
371 Adapter->PackInfo[HiPriority].bValid = TRUE;
372
373 BCM_DEBUG_PRINT(Adapter, DBG_TYPE_TX, TX_CONTROL, DBG_LVL_ALL, "CurrBytesOnHost: %x bValid: %x",
374 Adapter->PackInfo[HiPriority].uiCurrentBytesOnHost,
375 Adapter->PackInfo[HiPriority].bValid);
376 Status = STATUS_SUCCESS;
377 /*Queue the packet for transmission */
378 atomic_inc(&Adapter->index_wr_txcntrlpkt);
379 BCM_DEBUG_PRINT(Adapter, DBG_TYPE_TX, TX_CONTROL, DBG_LVL_ALL, "Calling transmit_packets");
380 atomic_set(&Adapter->TxPktAvail, 1);
381 wake_up(&Adapter->tx_packet_wait_queue);
382 } else {
383 Status = -ENOMEM;
384 BCM_DEBUG_PRINT(Adapter, DBG_TYPE_TX, TX_CONTROL, DBG_LVL_ALL, "mem allocation Failed");
385 } 359 }
360
361 if (pktlen + LEADER_SIZE > MAX_CNTL_PKT_SIZE)
362 return -EINVAL;
363
364 memset(ctrl_buff, 0, pktlen+LEADER_SIZE);
365 BCM_DEBUG_PRINT(Adapter, DBG_TYPE_TX, TX_CONTROL, DBG_LVL_ALL, "Copying the Control Packet Buffer with length=%d\n", pLeader->PLength);
366 *(struct bcm_leader *)ctrl_buff = *pLeader;
367 memcpy(ctrl_buff + LEADER_SIZE, ((PUCHAR)ioBuffer + LEADER_SIZE), pLeader->PLength);
368 BCM_DEBUG_PRINT(Adapter, DBG_TYPE_TX, TX_CONTROL, DBG_LVL_ALL, "Enqueuing the Control Packet");
369
370 /* Update the statistics counters */
371 spin_lock_bh(&Adapter->PackInfo[HiPriority].SFQueueLock);
372 Adapter->PackInfo[HiPriority].uiCurrentBytesOnHost += pLeader->PLength;
373 Adapter->PackInfo[HiPriority].uiCurrentPacketsOnHost++;
374 atomic_inc(&Adapter->TotalPacketCount);
375 spin_unlock_bh(&Adapter->PackInfo[HiPriority].SFQueueLock);
376 Adapter->PackInfo[HiPriority].bValid = TRUE;
377
378 BCM_DEBUG_PRINT(Adapter, DBG_TYPE_TX, TX_CONTROL, DBG_LVL_ALL, "CurrBytesOnHost: %x bValid: %x",
379 Adapter->PackInfo[HiPriority].uiCurrentBytesOnHost,
380 Adapter->PackInfo[HiPriority].bValid);
381 Status = STATUS_SUCCESS;
382 /*Queue the packet for transmission */
383 atomic_inc(&Adapter->index_wr_txcntrlpkt);
384 BCM_DEBUG_PRINT(Adapter, DBG_TYPE_TX, TX_CONTROL, DBG_LVL_ALL, "Calling transmit_packets");
385 atomic_set(&Adapter->TxPktAvail, 1);
386 wake_up(&Adapter->tx_packet_wait_queue);
387
386 BCM_DEBUG_PRINT(Adapter, DBG_TYPE_TX, TX_CONTROL, DBG_LVL_ALL, "<===="); 388 BCM_DEBUG_PRINT(Adapter, DBG_TYPE_TX, TX_CONTROL, DBG_LVL_ALL, "<====");
387 return Status; 389 return Status;
388} 390}
@@ -397,7 +399,7 @@ INT CopyBufferToControlPacket(struct bcm_mini_adapter *Adapter, PVOID ioBuffer)
397* 399*
398* Returns - None. 400* Returns - None.
399*******************************************************************/ 401*******************************************************************/
400VOID LinkMessage(struct bcm_mini_adapter *Adapter) 402void LinkMessage(struct bcm_mini_adapter *Adapter)
401{ 403{
402 struct bcm_link_request *pstLinkRequest = NULL; 404 struct bcm_link_request *pstLinkRequest = NULL;
403 BCM_DEBUG_PRINT(Adapter, DBG_TYPE_OTHERS, LINK_UP_MSG, DBG_LVL_ALL, "=====>"); 405 BCM_DEBUG_PRINT(Adapter, DBG_TYPE_OTHERS, LINK_UP_MSG, DBG_LVL_ALL, "=====>");
@@ -448,11 +450,11 @@ VOID LinkMessage(struct bcm_mini_adapter *Adapter)
448* 450*
449* Returns - None. 451* Returns - None.
450************************************************************************/ 452************************************************************************/
451VOID StatisticsResponse(struct bcm_mini_adapter *Adapter, PVOID pvBuffer) 453void StatisticsResponse(struct bcm_mini_adapter *Adapter, void *pvBuffer)
452{ 454{
453 BCM_DEBUG_PRINT(Adapter, DBG_TYPE_OTHERS, DUMP_INFO, DBG_LVL_ALL, "%s====>", __func__); 455 BCM_DEBUG_PRINT(Adapter, DBG_TYPE_OTHERS, DUMP_INFO, DBG_LVL_ALL, "%s====>", __func__);
454 Adapter->StatisticsPointer = ntohl(*(__be32 *)pvBuffer); 456 Adapter->StatisticsPointer = ntohl(*(__be32 *)pvBuffer);
455 BCM_DEBUG_PRINT(Adapter, DBG_TYPE_OTHERS, DUMP_INFO, DBG_LVL_ALL, "Stats at %x", (UINT)Adapter->StatisticsPointer); 457 BCM_DEBUG_PRINT(Adapter, DBG_TYPE_OTHERS, DUMP_INFO, DBG_LVL_ALL, "Stats at %x", (unsigned int)Adapter->StatisticsPointer);
456 BCM_DEBUG_PRINT(Adapter, DBG_TYPE_OTHERS, DUMP_INFO, DBG_LVL_ALL, "%s <====", __func__); 458 BCM_DEBUG_PRINT(Adapter, DBG_TYPE_OTHERS, DUMP_INFO, DBG_LVL_ALL, "%s <====", __func__);
457 return; 459 return;
458} 460}
@@ -467,7 +469,7 @@ VOID StatisticsResponse(struct bcm_mini_adapter *Adapter, PVOID pvBuffer)
467* 469*
468* Returns - None. 470* Returns - None.
469***********************************************************************/ 471***********************************************************************/
470VOID LinkControlResponseMessage(struct bcm_mini_adapter *Adapter, PUCHAR pucBuffer) 472void LinkControlResponseMessage(struct bcm_mini_adapter *Adapter, PUCHAR pucBuffer)
471{ 473{
472 BCM_DEBUG_PRINT(Adapter, DBG_TYPE_RX, RX_DPC, DBG_LVL_ALL, "=====>"); 474 BCM_DEBUG_PRINT(Adapter, DBG_TYPE_RX, RX_DPC, DBG_LVL_ALL, "=====>");
473 475
@@ -543,7 +545,7 @@ VOID LinkControlResponseMessage(struct bcm_mini_adapter *Adapter, PUCHAR pucBuff
543 545
544void SendIdleModeResponse(struct bcm_mini_adapter *Adapter) 546void SendIdleModeResponse(struct bcm_mini_adapter *Adapter)
545{ 547{
546 INT status = 0, NVMAccess = 0, lowPwrAbortMsg = 0; 548 int status = 0, NVMAccess = 0, lowPwrAbortMsg = 0;
547 struct timeval tv; 549 struct timeval tv;
548 struct bcm_link_request stIdleResponse = {{0} }; 550 struct bcm_link_request stIdleResponse = {{0} };
549 memset(&tv, 0, sizeof(tv)); 551 memset(&tv, 0, sizeof(tv));
@@ -583,7 +585,7 @@ void SendIdleModeResponse(struct bcm_mini_adapter *Adapter)
583 585
584 /* Wait for the LED to TURN OFF before sending ACK response */ 586 /* Wait for the LED to TURN OFF before sending ACK response */
585 if (Adapter->LEDInfo.led_thread_running & BCM_LED_THREAD_RUNNING_ACTIVELY) { 587 if (Adapter->LEDInfo.led_thread_running & BCM_LED_THREAD_RUNNING_ACTIVELY) {
586 INT iRetVal = 0; 588 int iRetVal = 0;
587 589
588 /* Wake the LED Thread with IDLEMODE_ENTER State */ 590 /* Wake the LED Thread with IDLEMODE_ENTER State */
589 Adapter->DriverState = LOWPOWER_MODE_ENTER; 591 Adapter->DriverState = LOWPOWER_MODE_ENTER;
@@ -609,7 +611,7 @@ void SendIdleModeResponse(struct bcm_mini_adapter *Adapter)
609 up(&Adapter->rdmwrmsync); 611 up(&Adapter->rdmwrmsync);
610 /* Killing all URBS. */ 612 /* Killing all URBS. */
611 if (Adapter->bDoSuspend == TRUE) 613 if (Adapter->bDoSuspend == TRUE)
612 Bcm_kill_all_URBs((PS_INTERFACE_ADAPTER)(Adapter->pvInterfaceAdapter)); 614 Bcm_kill_all_URBs((struct bcm_interface_adapter *)(Adapter->pvInterfaceAdapter));
613 } else { 615 } else {
614 Adapter->bPreparingForLowPowerMode = FALSE; 616 Adapter->bPreparingForLowPowerMode = FALSE;
615 } 617 }
@@ -625,7 +627,7 @@ void SendIdleModeResponse(struct bcm_mini_adapter *Adapter)
625 if ((status != STATUS_SUCCESS)) { 627 if ((status != STATUS_SUCCESS)) {
626 BCM_DEBUG_PRINT(Adapter, DBG_TYPE_PRINTK, 0, 0, "fail to send the Idle mode Request\n"); 628 BCM_DEBUG_PRINT(Adapter, DBG_TYPE_PRINTK, 0, 0, "fail to send the Idle mode Request\n");
627 Adapter->bPreparingForLowPowerMode = FALSE; 629 Adapter->bPreparingForLowPowerMode = FALSE;
628 StartInterruptUrb((PS_INTERFACE_ADAPTER)(Adapter->pvInterfaceAdapter)); 630 StartInterruptUrb((struct bcm_interface_adapter *)(Adapter->pvInterfaceAdapter));
629 } 631 }
630 do_gettimeofday(&tv); 632 do_gettimeofday(&tv);
631 BCM_DEBUG_PRINT(Adapter, DBG_TYPE_RX, RX_DPC, DBG_LVL_ALL, "IdleMode Msg submitter to Q :%ld ms", tv.tv_sec * 1000 + tv.tv_usec / 1000); 633 BCM_DEBUG_PRINT(Adapter, DBG_TYPE_RX, RX_DPC, DBG_LVL_ALL, "IdleMode Msg submitter to Q :%ld ms", tv.tv_sec * 1000 + tv.tv_usec / 1000);
@@ -640,11 +642,11 @@ void SendIdleModeResponse(struct bcm_mini_adapter *Adapter)
640* 642*
641* Returns - None. 643* Returns - None.
642*******************************************************************/ 644*******************************************************************/
643VOID DumpPackInfo(struct bcm_mini_adapter *Adapter) 645void DumpPackInfo(struct bcm_mini_adapter *Adapter)
644{ 646{
645 UINT uiLoopIndex = 0; 647 unsigned int uiLoopIndex = 0;
646 UINT uiIndex = 0; 648 unsigned int uiIndex = 0;
647 UINT uiClsfrIndex = 0; 649 unsigned int uiClsfrIndex = 0;
648 struct bcm_classifier_rule *pstClassifierEntry = NULL; 650 struct bcm_classifier_rule *pstClassifierEntry = NULL;
649 651
650 for (uiLoopIndex = 0; uiLoopIndex < NO_OF_QUEUES; uiLoopIndex++) { 652 for (uiLoopIndex = 0; uiLoopIndex < NO_OF_QUEUES; uiLoopIndex++) {
@@ -776,11 +778,11 @@ int reset_card_proc(struct bcm_mini_adapter *ps_adapter)
776{ 778{
777 int retval = STATUS_SUCCESS; 779 int retval = STATUS_SUCCESS;
778 struct bcm_mini_adapter *Adapter = GET_BCM_ADAPTER(gblpnetdev); 780 struct bcm_mini_adapter *Adapter = GET_BCM_ADAPTER(gblpnetdev);
779 PS_INTERFACE_ADAPTER psIntfAdapter = NULL; 781 struct bcm_interface_adapter *psIntfAdapter = NULL;
780 unsigned int value = 0, uiResetValue = 0; 782 unsigned int value = 0, uiResetValue = 0;
781 int bytes; 783 int bytes;
782 784
783 psIntfAdapter = ((PS_INTERFACE_ADAPTER)(ps_adapter->pvInterfaceAdapter)); 785 psIntfAdapter = ((struct bcm_interface_adapter *)(ps_adapter->pvInterfaceAdapter));
784 ps_adapter->bDDRInitDone = FALSE; 786 ps_adapter->bDDRInitDone = FALSE;
785 787
786 if (ps_adapter->chip_id >= T3LPB) { 788 if (ps_adapter->chip_id >= T3LPB) {
@@ -920,7 +922,7 @@ int run_card_proc(struct bcm_mini_adapter *ps_adapter)
920int InitCardAndDownloadFirmware(struct bcm_mini_adapter *ps_adapter) 922int InitCardAndDownloadFirmware(struct bcm_mini_adapter *ps_adapter)
921{ 923{
922 int status; 924 int status;
923 UINT value = 0; 925 unsigned int value = 0;
924 /* 926 /*
925 * Create the threads first and then download the 927 * Create the threads first and then download the
926 * Firm/DDR Settings.. 928 * Firm/DDR Settings..
@@ -1088,7 +1090,7 @@ static int bcm_parse_target_params(struct bcm_mini_adapter *Adapter)
1088 1090
1089void beceem_parse_target_struct(struct bcm_mini_adapter *Adapter) 1091void beceem_parse_target_struct(struct bcm_mini_adapter *Adapter)
1090{ 1092{
1091 UINT uiHostDrvrCfg6 = 0, uiEEPROMFlag = 0; 1093 unsigned int uiHostDrvrCfg6 = 0, uiEEPROMFlag = 0;
1092 1094
1093 if (ntohl(Adapter->pstargetparams->m_u32PhyParameter2) & AUTO_SYNC_DISABLE) { 1095 if (ntohl(Adapter->pstargetparams->m_u32PhyParameter2) & AUTO_SYNC_DISABLE) {
1094 pr_info(DRV_NAME ": AutoSyncup is Disabled\n"); 1096 pr_info(DRV_NAME ": AutoSyncup is Disabled\n");
@@ -1144,9 +1146,9 @@ void beceem_parse_target_struct(struct bcm_mini_adapter *Adapter)
1144 doPowerAutoCorrection(Adapter); 1146 doPowerAutoCorrection(Adapter);
1145} 1147}
1146 1148
1147static VOID doPowerAutoCorrection(struct bcm_mini_adapter *psAdapter) 1149static void doPowerAutoCorrection(struct bcm_mini_adapter *psAdapter)
1148{ 1150{
1149 UINT reporting_mode; 1151 unsigned int reporting_mode;
1150 1152
1151 reporting_mode = ntohl(psAdapter->pstargetparams->m_u32PowerSavingModeOptions) & 0x02; 1153 reporting_mode = ntohl(psAdapter->pstargetparams->m_u32PowerSavingModeOptions) & 0x02;
1152 psAdapter->bIsAutoCorrectEnabled = !((char)(psAdapter->ulPowerSaveMode >> 3) & 0x1); 1154 psAdapter->bIsAutoCorrectEnabled = !((char)(psAdapter->ulPowerSaveMode >> 3) & 0x1);
@@ -1175,26 +1177,26 @@ static VOID doPowerAutoCorrection(struct bcm_mini_adapter *psAdapter)
1175 } 1177 }
1176} 1178}
1177 1179
1178static void convertEndian(B_UINT8 rwFlag, PUINT puiBuffer, UINT uiByteCount) 1180static void convertEndian(unsigned char rwFlag, unsigned int *puiBuffer, unsigned int uiByteCount)
1179{ 1181{
1180 UINT uiIndex = 0; 1182 unsigned int uiIndex = 0;
1181 1183
1182 if (RWM_WRITE == rwFlag) { 1184 if (RWM_WRITE == rwFlag) {
1183 for (uiIndex = 0; uiIndex < (uiByteCount/sizeof(UINT)); uiIndex++) 1185 for (uiIndex = 0; uiIndex < (uiByteCount/sizeof(unsigned int)); uiIndex++)
1184 puiBuffer[uiIndex] = htonl(puiBuffer[uiIndex]); 1186 puiBuffer[uiIndex] = htonl(puiBuffer[uiIndex]);
1185 } else { 1187 } else {
1186 for (uiIndex = 0; uiIndex < (uiByteCount/sizeof(UINT)); uiIndex++) 1188 for (uiIndex = 0; uiIndex < (uiByteCount/sizeof(unsigned int)); uiIndex++)
1187 puiBuffer[uiIndex] = ntohl(puiBuffer[uiIndex]); 1189 puiBuffer[uiIndex] = ntohl(puiBuffer[uiIndex]);
1188 } 1190 }
1189} 1191}
1190 1192
1191int rdm(struct bcm_mini_adapter *Adapter, UINT uiAddress, PCHAR pucBuff, size_t sSize) 1193int rdm(struct bcm_mini_adapter *Adapter, unsigned int uiAddress, PCHAR pucBuff, size_t sSize)
1192{ 1194{
1193 return Adapter->interface_rdm(Adapter->pvInterfaceAdapter, 1195 return Adapter->interface_rdm(Adapter->pvInterfaceAdapter,
1194 uiAddress, pucBuff, sSize); 1196 uiAddress, pucBuff, sSize);
1195} 1197}
1196 1198
1197int wrm(struct bcm_mini_adapter *Adapter, UINT uiAddress, PCHAR pucBuff, size_t sSize) 1199int wrm(struct bcm_mini_adapter *Adapter, unsigned int uiAddress, PCHAR pucBuff, size_t sSize)
1198{ 1200{
1199 int iRetVal; 1201 int iRetVal;
1200 1202
@@ -1203,25 +1205,25 @@ int wrm(struct bcm_mini_adapter *Adapter, UINT uiAddress, PCHAR pucBuff, size_t
1203 return iRetVal; 1205 return iRetVal;
1204} 1206}
1205 1207
1206int wrmalt(struct bcm_mini_adapter *Adapter, UINT uiAddress, PUINT pucBuff, size_t size) 1208int wrmalt(struct bcm_mini_adapter *Adapter, unsigned int uiAddress, unsigned int *pucBuff, size_t size)
1207{ 1209{
1208 convertEndian(RWM_WRITE, pucBuff, size); 1210 convertEndian(RWM_WRITE, pucBuff, size);
1209 return wrm(Adapter, uiAddress, (PUCHAR)pucBuff, size); 1211 return wrm(Adapter, uiAddress, (PUCHAR)pucBuff, size);
1210} 1212}
1211 1213
1212int rdmalt(struct bcm_mini_adapter *Adapter, UINT uiAddress, PUINT pucBuff, size_t size) 1214int rdmalt(struct bcm_mini_adapter *Adapter, unsigned int uiAddress, unsigned int *pucBuff, size_t size)
1213{ 1215{
1214 INT uiRetVal = 0; 1216 int uiRetVal = 0;
1215 1217
1216 uiRetVal = rdm(Adapter, uiAddress, (PUCHAR)pucBuff, size); 1218 uiRetVal = rdm(Adapter, uiAddress, (PUCHAR)pucBuff, size);
1217 convertEndian(RWM_READ, (PUINT)pucBuff, size); 1219 convertEndian(RWM_READ, (unsigned int *)pucBuff, size);
1218 1220
1219 return uiRetVal; 1221 return uiRetVal;
1220} 1222}
1221 1223
1222int wrmWithLock(struct bcm_mini_adapter *Adapter, UINT uiAddress, PCHAR pucBuff, size_t sSize) 1224int wrmWithLock(struct bcm_mini_adapter *Adapter, unsigned int uiAddress, PCHAR pucBuff, size_t sSize)
1223{ 1225{
1224 INT status = STATUS_SUCCESS; 1226 int status = STATUS_SUCCESS;
1225 down(&Adapter->rdmwrmsync); 1227 down(&Adapter->rdmwrmsync);
1226 1228
1227 if ((Adapter->IdleMode == TRUE) || 1229 if ((Adapter->IdleMode == TRUE) ||
@@ -1238,7 +1240,7 @@ exit:
1238 return status; 1240 return status;
1239} 1241}
1240 1242
1241int wrmaltWithLock(struct bcm_mini_adapter *Adapter, UINT uiAddress, PUINT pucBuff, size_t size) 1243int wrmaltWithLock(struct bcm_mini_adapter *Adapter, unsigned int uiAddress, unsigned int *pucBuff, size_t size)
1242{ 1244{
1243 int iRetVal = STATUS_SUCCESS; 1245 int iRetVal = STATUS_SUCCESS;
1244 1246
@@ -1258,9 +1260,9 @@ exit:
1258 return iRetVal; 1260 return iRetVal;
1259} 1261}
1260 1262
1261int rdmaltWithLock(struct bcm_mini_adapter *Adapter, UINT uiAddress, PUINT pucBuff, size_t size) 1263int rdmaltWithLock(struct bcm_mini_adapter *Adapter, unsigned int uiAddress, unsigned int *pucBuff, size_t size)
1262{ 1264{
1263 INT uiRetVal = STATUS_SUCCESS; 1265 int uiRetVal = STATUS_SUCCESS;
1264 1266
1265 down(&Adapter->rdmwrmsync); 1267 down(&Adapter->rdmwrmsync);
1266 if ((Adapter->IdleMode == TRUE) || 1268 if ((Adapter->IdleMode == TRUE) ||
@@ -1277,13 +1279,13 @@ exit:
1277 return uiRetVal; 1279 return uiRetVal;
1278} 1280}
1279 1281
1280static VOID HandleShutDownModeWakeup(struct bcm_mini_adapter *Adapter) 1282static void HandleShutDownModeWakeup(struct bcm_mini_adapter *Adapter)
1281{ 1283{
1282 int clear_abort_pattern = 0, Status = 0; 1284 int clear_abort_pattern = 0, Status = 0;
1283 BCM_DEBUG_PRINT(Adapter, DBG_TYPE_OTHERS, MP_SHUTDOWN, DBG_LVL_ALL, "====>\n"); 1285 BCM_DEBUG_PRINT(Adapter, DBG_TYPE_OTHERS, MP_SHUTDOWN, DBG_LVL_ALL, "====>\n");
1284 /* target has woken up From Shut Down */ 1286 /* target has woken up From Shut Down */
1285 BCM_DEBUG_PRINT(Adapter, DBG_TYPE_OTHERS, MP_SHUTDOWN, DBG_LVL_ALL, "Clearing Shut Down Software abort pattern\n"); 1287 BCM_DEBUG_PRINT(Adapter, DBG_TYPE_OTHERS, MP_SHUTDOWN, DBG_LVL_ALL, "Clearing Shut Down Software abort pattern\n");
1286 Status = wrmalt(Adapter, SW_ABORT_IDLEMODE_LOC, (PUINT)&clear_abort_pattern, sizeof(clear_abort_pattern)); 1288 Status = wrmalt(Adapter, SW_ABORT_IDLEMODE_LOC, (unsigned int *)&clear_abort_pattern, sizeof(clear_abort_pattern));
1287 if (Status) { 1289 if (Status) {
1288 BCM_DEBUG_PRINT(Adapter, DBG_TYPE_OTHERS, MP_SHUTDOWN, DBG_LVL_ALL, "WRM to SW_ABORT_IDLEMODE_LOC failed with err:%d", Status); 1290 BCM_DEBUG_PRINT(Adapter, DBG_TYPE_OTHERS, MP_SHUTDOWN, DBG_LVL_ALL, "WRM to SW_ABORT_IDLEMODE_LOC failed with err:%d", Status);
1289 return; 1291 return;
@@ -1306,11 +1308,11 @@ static VOID HandleShutDownModeWakeup(struct bcm_mini_adapter *Adapter)
1306 BCM_DEBUG_PRINT(Adapter, DBG_TYPE_OTHERS, MP_SHUTDOWN, DBG_LVL_ALL, "<====\n"); 1308 BCM_DEBUG_PRINT(Adapter, DBG_TYPE_OTHERS, MP_SHUTDOWN, DBG_LVL_ALL, "<====\n");
1307} 1309}
1308 1310
1309static VOID SendShutModeResponse(struct bcm_mini_adapter *Adapter) 1311static void SendShutModeResponse(struct bcm_mini_adapter *Adapter)
1310{ 1312{
1311 struct bcm_link_request stShutdownResponse; 1313 struct bcm_link_request stShutdownResponse;
1312 UINT NVMAccess = 0, lowPwrAbortMsg = 0; 1314 unsigned int NVMAccess = 0, lowPwrAbortMsg = 0;
1313 UINT Status = 0; 1315 unsigned int Status = 0;
1314 1316
1315 memset(&stShutdownResponse, 0, sizeof(struct bcm_link_request)); 1317 memset(&stShutdownResponse, 0, sizeof(struct bcm_link_request));
1316 stShutdownResponse.Leader.Status = LINK_UP_CONTROL_REQ; 1318 stShutdownResponse.Leader.Status = LINK_UP_CONTROL_REQ;
@@ -1346,7 +1348,7 @@ static VOID SendShutModeResponse(struct bcm_mini_adapter *Adapter)
1346 1348
1347 /* Wait for the LED to TURN OFF before sending ACK response */ 1349 /* Wait for the LED to TURN OFF before sending ACK response */
1348 if (Adapter->LEDInfo.led_thread_running & BCM_LED_THREAD_RUNNING_ACTIVELY) { 1350 if (Adapter->LEDInfo.led_thread_running & BCM_LED_THREAD_RUNNING_ACTIVELY) {
1349 INT iRetVal = 0; 1351 int iRetVal = 0;
1350 1352
1351 /* Wake the LED Thread with LOWPOWER_MODE_ENTER State */ 1353 /* Wake the LED Thread with LOWPOWER_MODE_ENTER State */
1352 Adapter->DriverState = LOWPOWER_MODE_ENTER; 1354 Adapter->DriverState = LOWPOWER_MODE_ENTER;
@@ -1370,7 +1372,7 @@ static VOID SendShutModeResponse(struct bcm_mini_adapter *Adapter)
1370 up(&Adapter->rdmwrmsync); 1372 up(&Adapter->rdmwrmsync);
1371 /* Killing all URBS. */ 1373 /* Killing all URBS. */
1372 if (Adapter->bDoSuspend == TRUE) 1374 if (Adapter->bDoSuspend == TRUE)
1373 Bcm_kill_all_URBs((PS_INTERFACE_ADAPTER)(Adapter->pvInterfaceAdapter)); 1375 Bcm_kill_all_URBs((struct bcm_interface_adapter *)(Adapter->pvInterfaceAdapter));
1374 } else { 1376 } else {
1375 Adapter->bPreparingForLowPowerMode = FALSE; 1377 Adapter->bPreparingForLowPowerMode = FALSE;
1376 } 1378 }
@@ -1386,13 +1388,13 @@ static VOID SendShutModeResponse(struct bcm_mini_adapter *Adapter)
1386 if ((Status != STATUS_SUCCESS)) { 1388 if ((Status != STATUS_SUCCESS)) {
1387 BCM_DEBUG_PRINT(Adapter, DBG_TYPE_OTHERS, MP_SHUTDOWN, DBG_LVL_ALL, "fail to send the Idle mode Request\n"); 1389 BCM_DEBUG_PRINT(Adapter, DBG_TYPE_OTHERS, MP_SHUTDOWN, DBG_LVL_ALL, "fail to send the Idle mode Request\n");
1388 Adapter->bPreparingForLowPowerMode = FALSE; 1390 Adapter->bPreparingForLowPowerMode = FALSE;
1389 StartInterruptUrb((PS_INTERFACE_ADAPTER)(Adapter->pvInterfaceAdapter)); 1391 StartInterruptUrb((struct bcm_interface_adapter *)(Adapter->pvInterfaceAdapter));
1390 } 1392 }
1391} 1393}
1392 1394
1393static void HandleShutDownModeRequest(struct bcm_mini_adapter *Adapter, PUCHAR pucBuffer) 1395static void HandleShutDownModeRequest(struct bcm_mini_adapter *Adapter, PUCHAR pucBuffer)
1394{ 1396{
1395 B_UINT32 uiResetValue = 0; 1397 unsigned int uiResetValue = 0;
1396 1398
1397 BCM_DEBUG_PRINT(Adapter, DBG_TYPE_OTHERS, MP_SHUTDOWN, DBG_LVL_ALL, "====>\n"); 1399 BCM_DEBUG_PRINT(Adapter, DBG_TYPE_OTHERS, MP_SHUTDOWN, DBG_LVL_ALL, "====>\n");
1398 1400
@@ -1412,14 +1414,14 @@ static void HandleShutDownModeRequest(struct bcm_mini_adapter *Adapter, PUCHAR p
1412 } 1414 }
1413 1415
1414 SendShutModeResponse(Adapter); 1416 SendShutModeResponse(Adapter);
1415 BCM_DEBUG_PRINT (Adapter, DBG_TYPE_OTHERS, MP_SHUTDOWN, DBG_LVL_ALL, "ShutDownModeResponse:Notification received: Sending the response(Ack/Nack)\n"); 1417 BCM_DEBUG_PRINT(Adapter, DBG_TYPE_OTHERS, MP_SHUTDOWN, DBG_LVL_ALL, "ShutDownModeResponse:Notification received: Sending the response(Ack/Nack)\n");
1416 } 1418 }
1417 1419
1418 BCM_DEBUG_PRINT(Adapter, DBG_TYPE_OTHERS, MP_SHUTDOWN, DBG_LVL_ALL, "<====\n"); 1420 BCM_DEBUG_PRINT(Adapter, DBG_TYPE_OTHERS, MP_SHUTDOWN, DBG_LVL_ALL, "<====\n");
1419 return; 1421 return;
1420} 1422}
1421 1423
1422VOID ResetCounters(struct bcm_mini_adapter *Adapter) 1424void ResetCounters(struct bcm_mini_adapter *Adapter)
1423{ 1425{
1424 beceem_protocol_reset(Adapter); 1426 beceem_protocol_reset(Adapter);
1425 Adapter->CurrNumRecvDescs = 0; 1427 Adapter->CurrNumRecvDescs = 0;
@@ -1437,7 +1439,7 @@ VOID ResetCounters(struct bcm_mini_adapter *Adapter)
1437 1439
1438struct bcm_classifier_rule *GetFragIPClsEntry(struct bcm_mini_adapter *Adapter, USHORT usIpIdentification, ULONG SrcIP) 1440struct bcm_classifier_rule *GetFragIPClsEntry(struct bcm_mini_adapter *Adapter, USHORT usIpIdentification, ULONG SrcIP)
1439{ 1441{
1440 UINT uiIndex = 0; 1442 unsigned int uiIndex = 0;
1441 for (uiIndex = 0; uiIndex < MAX_FRAGMENTEDIP_CLASSIFICATION_ENTRIES; uiIndex++) { 1443 for (uiIndex = 0; uiIndex < MAX_FRAGMENTEDIP_CLASSIFICATION_ENTRIES; uiIndex++) {
1442 if ((Adapter->astFragmentedPktClassifierTable[uiIndex].bUsed) && 1444 if ((Adapter->astFragmentedPktClassifierTable[uiIndex].bUsed) &&
1443 (Adapter->astFragmentedPktClassifierTable[uiIndex].usIpIdentification == usIpIdentification) && 1445 (Adapter->astFragmentedPktClassifierTable[uiIndex].usIpIdentification == usIpIdentification) &&
@@ -1451,7 +1453,7 @@ struct bcm_classifier_rule *GetFragIPClsEntry(struct bcm_mini_adapter *Adapter,
1451 1453
1452void AddFragIPClsEntry(struct bcm_mini_adapter *Adapter, struct bcm_fragmented_packet_info *psFragPktInfo) 1454void AddFragIPClsEntry(struct bcm_mini_adapter *Adapter, struct bcm_fragmented_packet_info *psFragPktInfo)
1453{ 1455{
1454 UINT uiIndex = 0; 1456 unsigned int uiIndex = 0;
1455 for (uiIndex = 0; uiIndex < MAX_FRAGMENTEDIP_CLASSIFICATION_ENTRIES; uiIndex++) { 1457 for (uiIndex = 0; uiIndex < MAX_FRAGMENTEDIP_CLASSIFICATION_ENTRIES; uiIndex++) {
1456 if (!Adapter->astFragmentedPktClassifierTable[uiIndex].bUsed) { 1458 if (!Adapter->astFragmentedPktClassifierTable[uiIndex].bUsed) {
1457 memcpy(&Adapter->astFragmentedPktClassifierTable[uiIndex], psFragPktInfo, sizeof(struct bcm_fragmented_packet_info)); 1459 memcpy(&Adapter->astFragmentedPktClassifierTable[uiIndex], psFragPktInfo, sizeof(struct bcm_fragmented_packet_info));
@@ -1462,7 +1464,7 @@ void AddFragIPClsEntry(struct bcm_mini_adapter *Adapter, struct bcm_fragmented_p
1462 1464
1463void DelFragIPClsEntry(struct bcm_mini_adapter *Adapter, USHORT usIpIdentification, ULONG SrcIp) 1465void DelFragIPClsEntry(struct bcm_mini_adapter *Adapter, USHORT usIpIdentification, ULONG SrcIp)
1464{ 1466{
1465 UINT uiIndex = 0; 1467 unsigned int uiIndex = 0;
1466 for (uiIndex = 0; uiIndex < MAX_FRAGMENTEDIP_CLASSIFICATION_ENTRIES; uiIndex++) { 1468 for (uiIndex = 0; uiIndex < MAX_FRAGMENTEDIP_CLASSIFICATION_ENTRIES; uiIndex++) {
1467 if ((Adapter->astFragmentedPktClassifierTable[uiIndex].bUsed) && 1469 if ((Adapter->astFragmentedPktClassifierTable[uiIndex].bUsed) &&
1468 (Adapter->astFragmentedPktClassifierTable[uiIndex].usIpIdentification == usIpIdentification) && 1470 (Adapter->astFragmentedPktClassifierTable[uiIndex].usIpIdentification == usIpIdentification) &&
@@ -1474,7 +1476,7 @@ void DelFragIPClsEntry(struct bcm_mini_adapter *Adapter, USHORT usIpIdentificati
1474 1476
1475void update_per_cid_rx(struct bcm_mini_adapter *Adapter) 1477void update_per_cid_rx(struct bcm_mini_adapter *Adapter)
1476{ 1478{
1477 UINT qindex = 0; 1479 unsigned int qindex = 0;
1478 1480
1479 if ((jiffies - Adapter->liDrainCalculated) < XSECONDS) 1481 if ((jiffies - Adapter->liDrainCalculated) < XSECONDS)
1480 return; 1482 return;
@@ -1498,14 +1500,14 @@ void update_per_cid_rx(struct bcm_mini_adapter *Adapter)
1498 1500
1499void update_per_sf_desc_cnts(struct bcm_mini_adapter *Adapter) 1501void update_per_sf_desc_cnts(struct bcm_mini_adapter *Adapter)
1500{ 1502{
1501 INT iIndex = 0; 1503 int iIndex = 0;
1502 u32 uibuff[MAX_TARGET_DSX_BUFFERS]; 1504 u32 uibuff[MAX_TARGET_DSX_BUFFERS];
1503 int bytes; 1505 int bytes;
1504 1506
1505 if (!atomic_read(&Adapter->uiMBupdate)) 1507 if (!atomic_read(&Adapter->uiMBupdate))
1506 return; 1508 return;
1507 1509
1508 bytes = rdmaltWithLock(Adapter, TARGET_SFID_TXDESC_MAP_LOC, (PUINT)uibuff, sizeof(UINT) * MAX_TARGET_DSX_BUFFERS); 1510 bytes = rdmaltWithLock(Adapter, TARGET_SFID_TXDESC_MAP_LOC, (unsigned int *)uibuff, sizeof(unsigned int) * MAX_TARGET_DSX_BUFFERS);
1509 if (bytes < 0) { 1511 if (bytes < 0) {
1510 BCM_DEBUG_PRINT(Adapter, DBG_TYPE_PRINTK, 0, 0, "rdm failed\n"); 1512 BCM_DEBUG_PRINT(Adapter, DBG_TYPE_PRINTK, 0, 0, "rdm failed\n");
1511 return; 1513 return;
@@ -1522,7 +1524,7 @@ void update_per_sf_desc_cnts(struct bcm_mini_adapter *Adapter)
1522 atomic_set(&Adapter->uiMBupdate, FALSE); 1524 atomic_set(&Adapter->uiMBupdate, FALSE);
1523} 1525}
1524 1526
1525void flush_queue(struct bcm_mini_adapter *Adapter, UINT iQIndex) 1527void flush_queue(struct bcm_mini_adapter *Adapter, unsigned int iQIndex)
1526{ 1528{
1527 struct sk_buff *PacketToDrop = NULL; 1529 struct sk_buff *PacketToDrop = NULL;
1528 struct net_device_stats *netstats = &Adapter->dev->stats; 1530 struct net_device_stats *netstats = &Adapter->dev->stats;
@@ -1573,6 +1575,6 @@ static void beceem_protocol_reset(struct bcm_mini_adapter *Adapter)
1573 for (i = 0; i < HiPriority; i++) { 1575 for (i = 0; i < HiPriority; i++) {
1574 /* resetting only the first size (S_MIBS_SERVICEFLOW_TABLE) for the SF. */ 1576 /* resetting only the first size (S_MIBS_SERVICEFLOW_TABLE) for the SF. */
1575 /* It is same between MIBs and SF. */ 1577 /* It is same between MIBs and SF. */
1576 memset(&Adapter->PackInfo[i].stMibsExtServiceFlowTable, 0, sizeof(S_MIBS_EXTSERVICEFLOW_PARAMETERS)); 1578 memset(&Adapter->PackInfo[i].stMibsExtServiceFlowTable, 0, sizeof(struct bcm_mibs_parameters));
1577 } 1579 }
1578} 1580}
diff --git a/drivers/staging/bcm/Prototypes.h b/drivers/staging/bcm/Prototypes.h
index 3ec8f800a5b0..90dbe0f4785e 100644
--- a/drivers/staging/bcm/Prototypes.h
+++ b/drivers/staging/bcm/Prototypes.h
@@ -79,17 +79,17 @@ int rdm(struct bcm_mini_adapter *Adapter, UINT uiAddress, PCHAR pucBuff, size_t
79 79
80int wrm(struct bcm_mini_adapter *Adapter, UINT uiAddress, PCHAR pucBuff, size_t size); 80int wrm(struct bcm_mini_adapter *Adapter, UINT uiAddress, PCHAR pucBuff, size_t size);
81 81
82int wrmalt (struct bcm_mini_adapter *Adapter, UINT uiAddress, PUINT pucBuff, size_t sSize); 82int wrmalt (struct bcm_mini_adapter *Adapter, UINT uiAddress, unsigned int *pucBuff, size_t sSize);
83 83
84int rdmalt (struct bcm_mini_adapter *Adapter, UINT uiAddress, PUINT pucBuff, size_t sSize); 84int rdmalt (struct bcm_mini_adapter *Adapter, UINT uiAddress, unsigned int *pucBuff, size_t sSize);
85 85
86int get_dsx_sf_data_to_application(struct bcm_mini_adapter *Adapter, UINT uiSFId, void __user * user_buffer); 86int get_dsx_sf_data_to_application(struct bcm_mini_adapter *Adapter, UINT uiSFId, void __user * user_buffer);
87 87
88void SendIdleModeResponse(struct bcm_mini_adapter *Adapter); 88void SendIdleModeResponse(struct bcm_mini_adapter *Adapter);
89 89
90 90
91int ProcessGetHostMibs(struct bcm_mini_adapter *Adapter, S_MIBS_HOST_STATS_MIBS *buf); 91int ProcessGetHostMibs(struct bcm_mini_adapter *Adapter, struct bcm_host_stats_mibs *buf);
92void GetDroppedAppCntrlPktMibs(S_MIBS_HOST_STATS_MIBS *ioBuffer, struct bcm_tarang_data *pTarang); 92void GetDroppedAppCntrlPktMibs(struct bcm_host_stats_mibs *ioBuffer, struct bcm_tarang_data *pTarang);
93void beceem_parse_target_struct(struct bcm_mini_adapter *Adapter); 93void beceem_parse_target_struct(struct bcm_mini_adapter *Adapter);
94 94
95int bcm_ioctl_fw_download(struct bcm_mini_adapter *Adapter, struct bcm_firmware_info *psFwInfo); 95int bcm_ioctl_fw_download(struct bcm_mini_adapter *Adapter, struct bcm_firmware_info *psFwInfo);
@@ -161,14 +161,14 @@ INT BeceemNVMWrite(
161INT BcmInitNVM(struct bcm_mini_adapter *Adapter); 161INT BcmInitNVM(struct bcm_mini_adapter *Adapter);
162 162
163INT BcmUpdateSectorSize(struct bcm_mini_adapter *Adapter,UINT uiSectorSize); 163INT BcmUpdateSectorSize(struct bcm_mini_adapter *Adapter,UINT uiSectorSize);
164BOOLEAN IsSectionExistInFlash(struct bcm_mini_adapter *Adapter, FLASH2X_SECTION_VAL section); 164BOOLEAN IsSectionExistInFlash(struct bcm_mini_adapter *Adapter, enum bcm_flash2x_section_val section);
165 165
166INT BcmGetFlash2xSectionalBitMap(struct bcm_mini_adapter *Adapter, PFLASH2X_BITMAP psFlash2xBitMap); 166INT BcmGetFlash2xSectionalBitMap(struct bcm_mini_adapter *Adapter, struct bcm_flash2x_bitmap *psFlash2xBitMap);
167 167
168INT BcmFlash2xBulkWrite( 168INT BcmFlash2xBulkWrite(
169 struct bcm_mini_adapter *Adapter, 169 struct bcm_mini_adapter *Adapter,
170 PUINT pBuffer, 170 PUINT pBuffer,
171 FLASH2X_SECTION_VAL eFlashSectionVal, 171 enum bcm_flash2x_section_val eFlashSectionVal,
172 UINT uiOffset, 172 UINT uiOffset,
173 UINT uiNumBytes, 173 UINT uiNumBytes,
174 UINT bVerify); 174 UINT bVerify);
@@ -176,24 +176,24 @@ INT BcmFlash2xBulkWrite(
176INT BcmFlash2xBulkRead( 176INT BcmFlash2xBulkRead(
177 struct bcm_mini_adapter *Adapter, 177 struct bcm_mini_adapter *Adapter,
178 PUINT pBuffer, 178 PUINT pBuffer,
179 FLASH2X_SECTION_VAL eFlashSectionVal, 179 enum bcm_flash2x_section_val eFlashSectionVal,
180 UINT uiOffsetWithinSectionVal, 180 UINT uiOffsetWithinSectionVal,
181 UINT uiNumBytes); 181 UINT uiNumBytes);
182 182
183INT BcmGetSectionValStartOffset(struct bcm_mini_adapter *Adapter, FLASH2X_SECTION_VAL eFlashSectionVal); 183INT BcmGetSectionValStartOffset(struct bcm_mini_adapter *Adapter, enum bcm_flash2x_section_val eFlashSectionVal);
184 184
185INT BcmSetActiveSection(struct bcm_mini_adapter *Adapter, FLASH2X_SECTION_VAL eFlash2xSectVal); 185INT BcmSetActiveSection(struct bcm_mini_adapter *Adapter, enum bcm_flash2x_section_val eFlash2xSectVal);
186INT BcmAllocFlashCSStructure(struct bcm_mini_adapter *psAdapter); 186INT BcmAllocFlashCSStructure(struct bcm_mini_adapter *psAdapter);
187INT BcmDeAllocFlashCSStructure(struct bcm_mini_adapter *psAdapter); 187INT BcmDeAllocFlashCSStructure(struct bcm_mini_adapter *psAdapter);
188 188
189INT BcmCopyISO(struct bcm_mini_adapter *Adapter, FLASH2X_COPY_SECTION sCopySectStrut); 189INT BcmCopyISO(struct bcm_mini_adapter *Adapter, struct bcm_flash2x_copy_section sCopySectStrut);
190INT BcmFlash2xCorruptSig(struct bcm_mini_adapter *Adapter, FLASH2X_SECTION_VAL eFlash2xSectionVal); 190INT BcmFlash2xCorruptSig(struct bcm_mini_adapter *Adapter, enum bcm_flash2x_section_val eFlash2xSectionVal);
191INT BcmFlash2xWriteSig(struct bcm_mini_adapter *Adapter, FLASH2X_SECTION_VAL eFlashSectionVal); 191INT BcmFlash2xWriteSig(struct bcm_mini_adapter *Adapter, enum bcm_flash2x_section_val eFlashSectionVal);
192INT validateFlash2xReadWrite(struct bcm_mini_adapter *Adapter, PFLASH2X_READWRITE psFlash2xReadWrite); 192INT validateFlash2xReadWrite(struct bcm_mini_adapter *Adapter, struct bcm_flash2x_readwrite *psFlash2xReadWrite);
193INT IsFlash2x(struct bcm_mini_adapter *Adapter); 193INT IsFlash2x(struct bcm_mini_adapter *Adapter);
194INT BcmCopySection(struct bcm_mini_adapter *Adapter, 194INT BcmCopySection(struct bcm_mini_adapter *Adapter,
195 FLASH2X_SECTION_VAL SrcSection, 195 enum bcm_flash2x_section_val SrcSection,
196 FLASH2X_SECTION_VAL DstSection, 196 enum bcm_flash2x_section_val DstSection,
197 UINT offset, 197 UINT offset,
198 UINT numOfBytes); 198 UINT numOfBytes);
199 199
@@ -203,8 +203,8 @@ BOOLEAN IsNonCDLessDevice(struct bcm_mini_adapter *Adapter);
203 203
204VOID OverrideServiceFlowParams(struct bcm_mini_adapter *Adapter,PUINT puiBuffer); 204VOID OverrideServiceFlowParams(struct bcm_mini_adapter *Adapter,PUINT puiBuffer);
205 205
206int wrmaltWithLock (struct bcm_mini_adapter *Adapter, UINT uiAddress, PUINT pucBuff, size_t sSize); 206int wrmaltWithLock (struct bcm_mini_adapter *Adapter, UINT uiAddress, unsigned int *pucBuff, size_t sSize);
207int rdmaltWithLock (struct bcm_mini_adapter *Adapter, UINT uiAddress, PUINT pucBuff, size_t sSize); 207int rdmaltWithLock (struct bcm_mini_adapter *Adapter, UINT uiAddress, unsigned int *pucBuff, size_t sSize);
208 208
209int wrmWithLock(struct bcm_mini_adapter *Adapter, UINT uiAddress, PCHAR pucBuff, size_t size); 209int wrmWithLock(struct bcm_mini_adapter *Adapter, UINT uiAddress, PCHAR pucBuff, size_t size);
210INT buffDnldVerify(struct bcm_mini_adapter *Adapter, unsigned char *mappedbuffer, unsigned int u32FirmwareLength, 210INT buffDnldVerify(struct bcm_mini_adapter *Adapter, unsigned char *mappedbuffer, unsigned int u32FirmwareLength,
diff --git a/drivers/staging/bcm/Transmit.c b/drivers/staging/bcm/Transmit.c
index 27e8c890777b..f8dc3e20b475 100644
--- a/drivers/staging/bcm/Transmit.c
+++ b/drivers/staging/bcm/Transmit.c
@@ -205,7 +205,7 @@ int tx_pkt_handler(struct bcm_mini_adapter *Adapter /**< pointer to adapter obje
205 if (Adapter->bEndPointHalted == TRUE) { 205 if (Adapter->bEndPointHalted == TRUE) {
206 Bcm_clear_halt_of_endpoints(Adapter); 206 Bcm_clear_halt_of_endpoints(Adapter);
207 Adapter->bEndPointHalted = FALSE; 207 Adapter->bEndPointHalted = FALSE;
208 StartInterruptUrb((PS_INTERFACE_ADAPTER)(Adapter->pvInterfaceAdapter)); 208 StartInterruptUrb((struct bcm_interface_adapter *)(Adapter->pvInterfaceAdapter));
209 } 209 }
210 210
211 if (Adapter->LinkUpStatus && !Adapter->IdleMode) { 211 if (Adapter->LinkUpStatus && !Adapter->IdleMode) {
diff --git a/drivers/staging/bcm/cntrl_SignalingInterface.h b/drivers/staging/bcm/cntrl_SignalingInterface.h
index 990e809e9680..8683c2d4276e 100644
--- a/drivers/staging/bcm/cntrl_SignalingInterface.h
+++ b/drivers/staging/bcm/cntrl_SignalingInterface.h
@@ -36,91 +36,91 @@
36 36
37struct bcm_packet_class_rules { 37struct bcm_packet_class_rules {
38 /* 16bit UserPriority Of The Service Flow */ 38 /* 16bit UserPriority Of The Service Flow */
39 B_UINT16 u16UserPriority; 39 u16 u16UserPriority;
40 /* 16bit VLANID Of The Service Flow */ 40 /* 16bit VLANID Of The Service Flow */
41 B_UINT16 u16VLANID; 41 u16 u16VLANID;
42 /* 16bit Packet Classification RuleIndex Of The Service Flow */ 42 /* 16bit Packet Classification RuleIndex Of The Service Flow */
43 B_UINT16 u16PacketClassificationRuleIndex; 43 u16 u16PacketClassificationRuleIndex;
44 /* 8bit Classifier Rule Priority Of The Service Flow */ 44 /* 8bit Classifier Rule Priority Of The Service Flow */
45 B_UINT8 u8ClassifierRulePriority; 45 u8 u8ClassifierRulePriority;
46 /* Length of IP TypeOfService field */ 46 /* Length of IP TypeOfService field */
47 B_UINT8 u8IPTypeOfServiceLength; 47 u8 u8IPTypeOfServiceLength;
48 /* 3bytes IP TypeOfService */ 48 /* 3bytes IP TypeOfService */
49 B_UINT8 u8IPTypeOfService[TYPE_OF_SERVICE_LENGTH]; 49 u8 u8IPTypeOfService[TYPE_OF_SERVICE_LENGTH];
50 /* Protocol used in classification of Service Flow */ 50 /* Protocol used in classification of Service Flow */
51 B_UINT8 u8Protocol; 51 u8 u8Protocol;
52 /* Length of IP Masked Source Address */ 52 /* Length of IP Masked Source Address */
53 B_UINT8 u8IPMaskedSourceAddressLength; 53 u8 u8IPMaskedSourceAddressLength;
54 /* IP Masked Source Address used in classification for the Service Flow */ 54 /* IP Masked Source Address used in classification for the Service Flow */
55 B_UINT8 u8IPMaskedSourceAddress[IP_MASKED_SRC_ADDRESS_LENGTH]; 55 u8 u8IPMaskedSourceAddress[IP_MASKED_SRC_ADDRESS_LENGTH];
56 /* Length of IP Destination Address */ 56 /* Length of IP Destination Address */
57 B_UINT8 u8IPDestinationAddressLength; 57 u8 u8IPDestinationAddressLength;
58 /* IP Destination Address used in classification for the Service Flow */ 58 /* IP Destination Address used in classification for the Service Flow */
59 B_UINT8 u8IPDestinationAddress[IP_MASKED_DEST_ADDRESS_LENGTH]; 59 u8 u8IPDestinationAddress[IP_MASKED_DEST_ADDRESS_LENGTH];
60 /* Length of Protocol Source Port Range */ 60 /* Length of Protocol Source Port Range */
61 B_UINT8 u8ProtocolSourcePortRangeLength; 61 u8 u8ProtocolSourcePortRangeLength;
62 /* Protocol Source Port Range used in the Service Flow */ 62 /* Protocol Source Port Range used in the Service Flow */
63 B_UINT8 u8ProtocolSourcePortRange[PROTOCOL_SRC_PORT_RANGE_LENGTH]; 63 u8 u8ProtocolSourcePortRange[PROTOCOL_SRC_PORT_RANGE_LENGTH];
64 /* Length of Protocol Dest Port Range */ 64 /* Length of Protocol Dest Port Range */
65 B_UINT8 u8ProtocolDestPortRangeLength; 65 u8 u8ProtocolDestPortRangeLength;
66 /* Protocol Dest Port Range used in the Service Flow */ 66 /* Protocol Dest Port Range used in the Service Flow */
67 B_UINT8 u8ProtocolDestPortRange[PROTOCOL_DEST_PORT_RANGE_LENGTH]; 67 u8 u8ProtocolDestPortRange[PROTOCOL_DEST_PORT_RANGE_LENGTH];
68 /* Length of Ethernet Destination MAC Address */ 68 /* Length of Ethernet Destination MAC Address */
69 B_UINT8 u8EthernetDestMacAddressLength; 69 u8 u8EthernetDestMacAddressLength;
70 /* Ethernet Destination MAC Address used in classification of the Service Flow */ 70 /* Ethernet Destination MAC Address used in classification of the Service Flow */
71 B_UINT8 u8EthernetDestMacAddress[ETHERNET_DEST_MAC_ADDR_LENGTH]; 71 u8 u8EthernetDestMacAddress[ETHERNET_DEST_MAC_ADDR_LENGTH];
72 /* Length of Ethernet Source MAC Address */ 72 /* Length of Ethernet Source MAC Address */
73 B_UINT8 u8EthernetSourceMACAddressLength; 73 u8 u8EthernetSourceMACAddressLength;
74 /* Ethernet Source MAC Address used in classification of the Service Flow */ 74 /* Ethernet Source MAC Address used in classification of the Service Flow */
75 B_UINT8 u8EthernetSourceMACAddress[ETHERNET_SRC_MAC_ADDR_LENGTH]; 75 u8 u8EthernetSourceMACAddress[ETHERNET_SRC_MAC_ADDR_LENGTH];
76 /* Length of Ethertype */ 76 /* Length of Ethertype */
77 B_UINT8 u8EthertypeLength; 77 u8 u8EthertypeLength;
78 /* 3bytes Ethertype Of The Service Flow */ 78 /* 3bytes Ethertype Of The Service Flow */
79 B_UINT8 u8Ethertype[NUM_ETHERTYPE_BYTES]; 79 u8 u8Ethertype[NUM_ETHERTYPE_BYTES];
80 /* 8bit Associated PHSI Of The Service Flow */ 80 /* 8bit Associated PHSI Of The Service Flow */
81 B_UINT8 u8AssociatedPHSI; 81 u8 u8AssociatedPHSI;
82 /* Length of Vendor Specific Classifier Param length Of The Service Flow */ 82 /* Length of Vendor Specific Classifier Param length Of The Service Flow */
83 B_UINT8 u8VendorSpecificClassifierParamLength; 83 u8 u8VendorSpecificClassifierParamLength;
84 /* Vendor Specific Classifier Param Of The Service Flow */ 84 /* Vendor Specific Classifier Param Of The Service Flow */
85 B_UINT8 u8VendorSpecificClassifierParam[VENDOR_CLASSIFIER_PARAM_LENGTH]; 85 u8 u8VendorSpecificClassifierParam[VENDOR_CLASSIFIER_PARAM_LENGTH];
86 /* Length Of IPv6 Flow Lable of the Service Flow */ 86 /* Length Of IPv6 Flow Lable of the Service Flow */
87 B_UINT8 u8IPv6FlowLableLength; 87 u8 u8IPv6FlowLableLength;
88 /* IPv6 Flow Lable Of The Service Flow */ 88 /* IPv6 Flow Lable Of The Service Flow */
89 B_UINT8 u8IPv6FlowLable[NUM_IPV6_FLOWLABLE_BYTES]; 89 u8 u8IPv6FlowLable[NUM_IPV6_FLOWLABLE_BYTES];
90 /* Action associated with the classifier rule */ 90 /* Action associated with the classifier rule */
91 B_UINT8 u8ClassifierActionRule; 91 u8 u8ClassifierActionRule;
92 B_UINT16 u16ValidityBitMap; 92 u16 u16ValidityBitMap;
93}; 93};
94 94
95struct bcm_phs_rules { 95struct bcm_phs_rules {
96 /* 8bit PHS Index Of The Service Flow */ 96 /* 8bit PHS Index Of The Service Flow */
97 B_UINT8 u8PHSI; 97 u8 u8PHSI;
98 /* PHSF Length Of The Service Flow */ 98 /* PHSF Length Of The Service Flow */
99 B_UINT8 u8PHSFLength; 99 u8 u8PHSFLength;
100 /* String of bytes containing header information to be suppressed by the sending CS and reconstructed by the receiving CS */ 100 /* String of bytes containing header information to be suppressed by the sending CS and reconstructed by the receiving CS */
101 B_UINT8 u8PHSF[MAX_PHS_LENGTHS]; 101 u8 u8PHSF[MAX_PHS_LENGTHS];
102 /* PHSM Length Of The Service Flow */ 102 /* PHSM Length Of The Service Flow */
103 B_UINT8 u8PHSMLength; 103 u8 u8PHSMLength;
104 /* PHS Mask for the SF */ 104 /* PHS Mask for the SF */
105 B_UINT8 u8PHSM[MAX_PHS_LENGTHS]; 105 u8 u8PHSM[MAX_PHS_LENGTHS];
106 /* 8bit Total number of bytes to be suppressed for the Service Flow */ 106 /* 8bit Total number of bytes to be suppressed for the Service Flow */
107 B_UINT8 u8PHSS; 107 u8 u8PHSS;
108 /* 8bit Indicates whether or not Packet Header contents need to be verified prior to suppression */ 108 /* 8bit Indicates whether or not Packet Header contents need to be verified prior to suppression */
109 B_UINT8 u8PHSV; 109 u8 u8PHSV;
110 /* Vendor Specific PHS param Length Of The Service Flow */ 110 /* Vendor Specific PHS param Length Of The Service Flow */
111 B_UINT8 u8VendorSpecificPHSParamsLength; 111 u8 u8VendorSpecificPHSParamsLength;
112 /* Vendor Specific PHS param Of The Service Flow */ 112 /* Vendor Specific PHS param Of The Service Flow */
113 B_UINT8 u8VendorSpecificPHSParams[VENDOR_PHS_PARAM_LENGTH]; 113 u8 u8VendorSpecificPHSParams[VENDOR_PHS_PARAM_LENGTH];
114 B_UINT8 u8Padding[2]; 114 u8 u8Padding[2];
115}; 115};
116 116
117struct bcm_convergence_types { 117struct bcm_convergence_types {
118 /* 8bit Phs Classfier Action Of The Service Flow */ 118 /* 8bit Phs Classfier Action Of The Service Flow */
119 B_UINT8 u8ClassfierDSCAction; 119 u8 u8ClassfierDSCAction;
120 /* 8bit Phs DSC Action Of The Service Flow */ 120 /* 8bit Phs DSC Action Of The Service Flow */
121 B_UINT8 u8PhsDSCAction; 121 u8 u8PhsDSCAction;
122 /* 16bit Padding */ 122 /* 16bit Padding */
123 B_UINT8 u8Padding[2]; 123 u8 u8Padding[2];
124 /* Packet classification rules structure */ 124 /* Packet classification rules structure */
125 struct bcm_packet_class_rules cCPacketClassificationRule; 125 struct bcm_packet_class_rules cCPacketClassificationRule;
126 /* Payload header suppression rules structure */ 126 /* Payload header suppression rules structure */
@@ -129,118 +129,118 @@ struct bcm_convergence_types {
129 129
130struct bcm_connect_mgr_params { 130struct bcm_connect_mgr_params {
131 /* 32bitSFID Of The Service Flow */ 131 /* 32bitSFID Of The Service Flow */
132 B_UINT32 u32SFID; 132 u32 u32SFID;
133 /* 32bit Maximum Sustained Traffic Rate of the Service Flow */ 133 /* 32bit Maximum Sustained Traffic Rate of the Service Flow */
134 B_UINT32 u32MaxSustainedTrafficRate; 134 u32 u32MaxSustainedTrafficRate;
135 /* 32bit Maximum Traffic Burst allowed for the Service Flow */ 135 /* 32bit Maximum Traffic Burst allowed for the Service Flow */
136 B_UINT32 u32MaxTrafficBurst; 136 u32 u32MaxTrafficBurst;
137 /* 32bit Minimum Reserved Traffic Rate of the Service Flow */ 137 /* 32bit Minimum Reserved Traffic Rate of the Service Flow */
138 B_UINT32 u32MinReservedTrafficRate; 138 u32 u32MinReservedTrafficRate;
139 /* 32bit Tolerated Jitter of the Service Flow */ 139 /* 32bit Tolerated Jitter of the Service Flow */
140 B_UINT32 u32ToleratedJitter; 140 u32 u32ToleratedJitter;
141 /* 32bit Maximum Latency of the Service Flow */ 141 /* 32bit Maximum Latency of the Service Flow */
142 B_UINT32 u32MaximumLatency; 142 u32 u32MaximumLatency;
143 /* 16bitCID Of The Service Flow */ 143 /* 16bitCID Of The Service Flow */
144 B_UINT16 u16CID; 144 u16 u16CID;
145 /* 16bit SAID on which the service flow being set up shall be mapped */ 145 /* 16bit SAID on which the service flow being set up shall be mapped */
146 B_UINT16 u16TargetSAID; 146 u16 u16TargetSAID;
147 /* 16bit ARQ window size negotiated */ 147 /* 16bit ARQ window size negotiated */
148 B_UINT16 u16ARQWindowSize; 148 u16 u16ARQWindowSize;
149 /* 16bit Total Tx delay incl sending, receiving & processing delays */ 149 /* 16bit Total Tx delay incl sending, receiving & processing delays */
150 B_UINT16 u16ARQRetryTxTimeOut; 150 u16 u16ARQRetryTxTimeOut;
151 /* 16bit Total Rx delay incl sending, receiving & processing delays */ 151 /* 16bit Total Rx delay incl sending, receiving & processing delays */
152 B_UINT16 u16ARQRetryRxTimeOut; 152 u16 u16ARQRetryRxTimeOut;
153 /* 16bit ARQ block lifetime */ 153 /* 16bit ARQ block lifetime */
154 B_UINT16 u16ARQBlockLifeTime; 154 u16 u16ARQBlockLifeTime;
155 /* 16bit ARQ Sync loss timeout */ 155 /* 16bit ARQ Sync loss timeout */
156 B_UINT16 u16ARQSyncLossTimeOut; 156 u16 u16ARQSyncLossTimeOut;
157 /* 16bit ARQ Purge timeout */ 157 /* 16bit ARQ Purge timeout */
158 B_UINT16 u16ARQRxPurgeTimeOut; 158 u16 u16ARQRxPurgeTimeOut;
159 /* TODO::Remove this once we move to a new CORR2 driver 159 /* TODO::Remove this once we move to a new CORR2 driver
160 * brief Size of an ARQ block 160 * brief Size of an ARQ block
161 */ 161 */
162 B_UINT16 u16ARQBlockSize; 162 u16 u16ARQBlockSize;
163 /* #endif */ 163 /* #endif */
164 /* 16bit Nominal interval b/w consecutive SDU arrivals at MAC SAP */ 164 /* 16bit Nominal interval b/w consecutive SDU arrivals at MAC SAP */
165 B_UINT16 u16SDUInterArrivalTime; 165 u16 u16SDUInterArrivalTime;
166 /* 16bit Specifies the time base for rate measurement */ 166 /* 16bit Specifies the time base for rate measurement */
167 B_UINT16 u16TimeBase; 167 u16 u16TimeBase;
168 /* 16bit Interval b/w Successive Grant oppurtunities */ 168 /* 16bit Interval b/w Successive Grant oppurtunities */
169 B_UINT16 u16UnsolicitedGrantInterval; 169 u16 u16UnsolicitedGrantInterval;
170 /* 16bit Interval b/w Successive Polling grant oppurtunities */ 170 /* 16bit Interval b/w Successive Polling grant oppurtunities */
171 B_UINT16 u16UnsolicitedPollingInterval; 171 u16 u16UnsolicitedPollingInterval;
172 /* internal var to get the overhead */ 172 /* internal var to get the overhead */
173 B_UINT16 u16MacOverhead; 173 u16 u16MacOverhead;
174 /* MBS contents Identifier */ 174 /* MBS contents Identifier */
175 B_UINT16 u16MBSContentsID[MBS_CONTENTS_ID_LENGTH]; 175 u16 u16MBSContentsID[MBS_CONTENTS_ID_LENGTH];
176 /* MBS contents Identifier length */ 176 /* MBS contents Identifier length */
177 B_UINT8 u8MBSContentsIDLength; 177 u8 u8MBSContentsIDLength;
178 /* ServiceClassName Length Of The Service Flow */ 178 /* ServiceClassName Length Of The Service Flow */
179 B_UINT8 u8ServiceClassNameLength; 179 u8 u8ServiceClassNameLength;
180 /* 32bytes ServiceClassName Of The Service Flow */ 180 /* 32bytes ServiceClassName Of The Service Flow */
181 B_UINT8 u8ServiceClassName[32]; 181 u8 u8ServiceClassName[32];
182 /* 8bit Indicates whether or not MBS service is requested for this Serivce Flow */ 182 /* 8bit Indicates whether or not MBS service is requested for this Serivce Flow */
183 B_UINT8 u8MBSService; 183 u8 u8MBSService;
184 /* 8bit QOS Parameter Set specifies proper application of QoS parameters to Provisioned, Admitted and Active sets */ 184 /* 8bit QOS Parameter Set specifies proper application of QoS parameters to Provisioned, Admitted and Active sets */
185 B_UINT8 u8QosParamSet; 185 u8 u8QosParamSet;
186 /* 8bit Traffic Priority Of the Service Flow */ 186 /* 8bit Traffic Priority Of the Service Flow */
187 B_UINT8 u8TrafficPriority; 187 u8 u8TrafficPriority;
188 /* 8bit Uplink Grant Scheduling Type of The Service Flow */ 188 /* 8bit Uplink Grant Scheduling Type of The Service Flow */
189 B_UINT8 u8ServiceFlowSchedulingType; 189 u8 u8ServiceFlowSchedulingType;
190 /* 8bit Request transmission Policy of the Service Flow */ 190 /* 8bit Request transmission Policy of the Service Flow */
191 B_UINT8 u8RequesttransmissionPolicy; 191 u8 u8RequesttransmissionPolicy;
192 /* 8bit Specifies whether SDUs for this Service flow are of FixedLength or Variable length */ 192 /* 8bit Specifies whether SDUs for this Service flow are of FixedLength or Variable length */
193 B_UINT8 u8FixedLengthVSVariableLengthSDUIndicator; 193 u8 u8FixedLengthVSVariableLengthSDUIndicator;
194 /* 8bit Length of the SDU for a fixed length SDU service flow */ 194 /* 8bit Length of the SDU for a fixed length SDU service flow */
195 B_UINT8 u8SDUSize; 195 u8 u8SDUSize;
196 /* 8bit Indicates whether or not ARQ is requested for this connection */ 196 /* 8bit Indicates whether or not ARQ is requested for this connection */
197 B_UINT8 u8ARQEnable; 197 u8 u8ARQEnable;
198 /* < 8bit Indicates whether or not data has tobe delivered in order to higher layer */ 198 /* < 8bit Indicates whether or not data has tobe delivered in order to higher layer */
199 B_UINT8 u8ARQDeliverInOrder; 199 u8 u8ARQDeliverInOrder;
200 /* 8bit Receiver ARQ ACK processing time */ 200 /* 8bit Receiver ARQ ACK processing time */
201 B_UINT8 u8RxARQAckProcessingTime; 201 u8 u8RxARQAckProcessingTime;
202 /* 8bit Convergence Sublayer Specification Of The Service Flow */ 202 /* 8bit Convergence Sublayer Specification Of The Service Flow */
203 B_UINT8 u8CSSpecification; 203 u8 u8CSSpecification;
204 /* 8 bit Type of data delivery service */ 204 /* 8 bit Type of data delivery service */
205 B_UINT8 u8TypeOfDataDeliveryService; 205 u8 u8TypeOfDataDeliveryService;
206 /* 8bit Specifies whether a service flow may generate Paging */ 206 /* 8bit Specifies whether a service flow may generate Paging */
207 B_UINT8 u8PagingPreference; 207 u8 u8PagingPreference;
208 /* 8bit Indicates the MBS Zone through which the connection or virtual connection is valid */ 208 /* 8bit Indicates the MBS Zone through which the connection or virtual connection is valid */
209 B_UINT8 u8MBSZoneIdentifierassignment; 209 u8 u8MBSZoneIdentifierassignment;
210 /* 8bit Specifies whether traffic on SF should generate MOB_TRF_IND to MS in sleep mode */ 210 /* 8bit Specifies whether traffic on SF should generate MOB_TRF_IND to MS in sleep mode */
211 B_UINT8 u8TrafficIndicationPreference; 211 u8 u8TrafficIndicationPreference;
212 /* 8bit Speciifes the length of predefined Global QoS parameter set encoding for this SF */ 212 /* 8bit Speciifes the length of predefined Global QoS parameter set encoding for this SF */
213 B_UINT8 u8GlobalServicesClassNameLength; 213 u8 u8GlobalServicesClassNameLength;
214 /* 6 byte Speciifes the predefined Global QoS parameter set encoding for this SF */ 214 /* 6 byte Speciifes the predefined Global QoS parameter set encoding for this SF */
215 B_UINT8 u8GlobalServicesClassName[GLOBAL_SF_CLASSNAME_LENGTH]; 215 u8 u8GlobalServicesClassName[GLOBAL_SF_CLASSNAME_LENGTH];
216 /* 8bit Indicates whether or not SN feedback is enabled for the conn */ 216 /* 8bit Indicates whether or not SN feedback is enabled for the conn */
217 B_UINT8 u8SNFeedbackEnabled; 217 u8 u8SNFeedbackEnabled;
218 /* Indicates the size of the Fragment Sequence Number for the connection */ 218 /* Indicates the size of the Fragment Sequence Number for the connection */
219 B_UINT8 u8FSNSize; 219 u8 u8FSNSize;
220 /* 8bit Number of CIDs in active BS list */ 220 /* 8bit Number of CIDs in active BS list */
221 B_UINT8 u8CIDAllocation4activeBSsLength; 221 u8 u8CIDAllocation4activeBSsLength;
222 /* CIDs of BS in the active list */ 222 /* CIDs of BS in the active list */
223 B_UINT8 u8CIDAllocation4activeBSs[MAX_NUM_ACTIVE_BS]; 223 u8 u8CIDAllocation4activeBSs[MAX_NUM_ACTIVE_BS];
224 /* Specifies if PDU extended subheader should be applied on every PDU on this conn */ 224 /* Specifies if PDU extended subheader should be applied on every PDU on this conn */
225 B_UINT8 u8PDUSNExtendedSubheader4HarqReordering; 225 u8 u8PDUSNExtendedSubheader4HarqReordering;
226 /* 8bit Specifies whether the connection uses HARQ or not */ 226 /* 8bit Specifies whether the connection uses HARQ or not */
227 B_UINT8 u8HARQServiceFlows; 227 u8 u8HARQServiceFlows;
228 /* Specifies the length of Authorization token */ 228 /* Specifies the length of Authorization token */
229 B_UINT8 u8AuthTokenLength; 229 u8 u8AuthTokenLength;
230 /* Specifies the Authorization token */ 230 /* Specifies the Authorization token */
231 B_UINT8 u8AuthToken[AUTH_TOKEN_LENGTH]; 231 u8 u8AuthToken[AUTH_TOKEN_LENGTH];
232 /* specifes Number of HARQ channels used to carry data length */ 232 /* specifes Number of HARQ channels used to carry data length */
233 B_UINT8 u8HarqChannelMappingLength; 233 u8 u8HarqChannelMappingLength;
234 /* specifes HARQ channels used to carry data */ 234 /* specifes HARQ channels used to carry data */
235 B_UINT8 u8HARQChannelMapping[NUM_HARQ_CHANNELS]; 235 u8 u8HARQChannelMapping[NUM_HARQ_CHANNELS];
236 /* 8bit Length of Vendor Specific QoS Params */ 236 /* 8bit Length of Vendor Specific QoS Params */
237 B_UINT8 u8VendorSpecificQoSParamLength; 237 u8 u8VendorSpecificQoSParamLength;
238 /* 1byte Vendor Specific QoS Param Of The Service Flow */ 238 /* 1byte Vendor Specific QoS Param Of The Service Flow */
239 B_UINT8 u8VendorSpecificQoSParam[VENDOR_SPECIF_QOS_PARAM]; 239 u8 u8VendorSpecificQoSParam[VENDOR_SPECIF_QOS_PARAM];
240 /* indicates total classifiers in the SF */ 240 /* indicates total classifiers in the SF */
241 B_UINT8 u8TotalClassifiers; /* < Total number of valid classifiers */ 241 u8 u8TotalClassifiers; /* < Total number of valid classifiers */
242 B_UINT8 bValid; /* < Validity flag */ 242 u8 bValid; /* < Validity flag */
243 B_UINT8 u8Padding; /* < Padding byte */ 243 u8 u8Padding; /* < Padding byte */
244 /* 244 /*
245 * Structure for Convergence SubLayer Types with a maximum of 4 classifiers 245 * Structure for Convergence SubLayer Types with a maximum of 4 classifiers
246 */ 246 */
@@ -248,64 +248,64 @@ struct bcm_connect_mgr_params {
248}; 248};
249 249
250struct bcm_add_request { 250struct bcm_add_request {
251 B_UINT8 u8Type; /* < Type */ 251 u8 u8Type; /* < Type */
252 B_UINT8 eConnectionDir; /* < Connection direction */ 252 u8 eConnectionDir; /* < Connection direction */
253 /* brief 16 bit TID */ 253 /* brief 16 bit TID */
254 B_UINT16 u16TID; /* < 16bit TID */ 254 u16 u16TID; /* < 16bit TID */
255 /* brief 16bitCID */ 255 /* brief 16bitCID */
256 B_UINT16 u16CID; /* < 16bit CID */ 256 u16 u16CID; /* < 16bit CID */
257 /* brief 16bitVCID */ 257 /* brief 16bitVCID */
258 B_UINT16 u16VCID; /* < 16bit VCID */ 258 u16 u16VCID; /* < 16bit VCID */
259 struct bcm_connect_mgr_params *psfParameterSet; /* < connection manager parameters */ 259 struct bcm_connect_mgr_params *psfParameterSet; /* < connection manager parameters */
260}; 260};
261 261
262struct bcm_add_indication { 262struct bcm_add_indication {
263 B_UINT8 u8Type; /* < Type */ 263 u8 u8Type; /* < Type */
264 B_UINT8 eConnectionDir; /* < Connection Direction */ 264 u8 eConnectionDir; /* < Connection Direction */
265 /* brief 16 bit TID */ 265 /* brief 16 bit TID */
266 B_UINT16 u16TID; /* < TID */ 266 u16 u16TID; /* < TID */
267 /* brief 16bitCID */ 267 /* brief 16bitCID */
268 B_UINT16 u16CID; /* < 16bitCID */ 268 u16 u16CID; /* < 16bitCID */
269 /* brief 16bitVCID */ 269 /* brief 16bitVCID */
270 B_UINT16 u16VCID; /* < 16bitVCID */ 270 u16 u16VCID; /* < 16bitVCID */
271 struct bcm_connect_mgr_params *psfAuthorizedSet; /* Authorized set of connection manager parameters */ 271 struct bcm_connect_mgr_params *psfAuthorizedSet; /* Authorized set of connection manager parameters */
272 struct bcm_connect_mgr_params *psfAdmittedSet; /* Admitted set of connection manager parameters */ 272 struct bcm_connect_mgr_params *psfAdmittedSet; /* Admitted set of connection manager parameters */
273 struct bcm_connect_mgr_params *psfActiveSet; /* Activeset of connection manager parameters */ 273 struct bcm_connect_mgr_params *psfActiveSet; /* Activeset of connection manager parameters */
274 B_UINT8 u8CC; /* <Confirmation Code */ 274 u8 u8CC; /* <Confirmation Code */
275 B_UINT8 u8Padd; /* < 8-bit Padding */ 275 u8 u8Padd; /* < 8-bit Padding */
276 B_UINT16 u16Padd; /* < 16 bit Padding */ 276 u16 u16Padd; /* < 16 bit Padding */
277}; 277};
278 278
279struct bcm_del_request { 279struct bcm_del_request {
280 B_UINT8 u8Type; /* < Type */ 280 u8 u8Type; /* < Type */
281 B_UINT8 u8Padding; /* < Padding byte */ 281 u8 u8Padding; /* < Padding byte */
282 B_UINT16 u16TID; /* < TID */ 282 u16 u16TID; /* < TID */
283 /* brief 32bitSFID */ 283 /* brief 32bitSFID */
284 B_UINT32 u32SFID; /* < SFID */ 284 u32 u32SFID; /* < SFID */
285}; 285};
286 286
287struct bcm_del_indication { 287struct bcm_del_indication {
288 B_UINT8 u8Type; /* < Type */ 288 u8 u8Type; /* < Type */
289 B_UINT8 u8Padding; /* < Padding */ 289 u8 u8Padding; /* < Padding */
290 B_UINT16 u16TID; /* < TID */ 290 u16 u16TID; /* < TID */
291 /* brief 16bitCID */ 291 /* brief 16bitCID */
292 B_UINT16 u16CID; /* < CID */ 292 u16 u16CID; /* < CID */
293 /* brief 16bitVCID */ 293 /* brief 16bitVCID */
294 B_UINT16 u16VCID; /* < VCID */ 294 u16 u16VCID; /* < VCID */
295 /* brief 32bitSFID */ 295 /* brief 32bitSFID */
296 B_UINT32 u32SFID; /* < SFID */ 296 u32 u32SFID; /* < SFID */
297 /* brief 8bit Confirmation code */ 297 /* brief 8bit Confirmation code */
298 B_UINT8 u8ConfirmationCode; /* < Confirmation code */ 298 u8 u8ConfirmationCode; /* < Confirmation code */
299 B_UINT8 u8Padding1[3]; /* < 3 byte Padding */ 299 u8 u8Padding1[3]; /* < 3 byte Padding */
300}; 300};
301 301
302struct bcm_stim_sfhostnotify { 302struct bcm_stim_sfhostnotify {
303 B_UINT32 SFID; /* SFID of the service flow */ 303 u32 SFID; /* SFID of the service flow */
304 B_UINT16 newCID; /* the new/changed CID */ 304 u16 newCID; /* the new/changed CID */
305 B_UINT16 VCID; /* Get new Vcid if the flow has been made active in CID update TLV, but was inactive earlier or the orig vcid */ 305 u16 VCID; /* Get new Vcid if the flow has been made active in CID update TLV, but was inactive earlier or the orig vcid */
306 B_UINT8 RetainSF; /* Indication to Host if the SF is to be retained or deleted; if TRUE-retain else delete */ 306 u8 RetainSF; /* Indication to Host if the SF is to be retained or deleted; if TRUE-retain else delete */
307 B_UINT8 QoSParamSet; /* QoS paramset of the retained SF */ 307 u8 QoSParamSet; /* QoS paramset of the retained SF */
308 B_UINT16 u16reserved; /* For byte alignment */ 308 u16 u16reserved; /* For byte alignment */
309}; 309};
310 310
311#endif 311#endif
diff --git a/drivers/staging/bcm/hostmibs.c b/drivers/staging/bcm/hostmibs.c
index 10361bb35059..3c5f4a5f0376 100644
--- a/drivers/staging/bcm/hostmibs.c
+++ b/drivers/staging/bcm/hostmibs.c
@@ -9,7 +9,7 @@
9 9
10#include "headers.h" 10#include "headers.h"
11 11
12INT ProcessGetHostMibs(struct bcm_mini_adapter *Adapter, S_MIBS_HOST_STATS_MIBS *pstHostMibs) 12INT ProcessGetHostMibs(struct bcm_mini_adapter *Adapter, struct bcm_host_stats_mibs *pstHostMibs)
13{ 13{
14 S_SERVICEFLOW_ENTRY *pstServiceFlowEntry = NULL; 14 S_SERVICEFLOW_ENTRY *pstServiceFlowEntry = NULL;
15 S_PHS_RULE *pstPhsRule = NULL; 15 S_PHS_RULE *pstPhsRule = NULL;
@@ -31,7 +31,7 @@ INT ProcessGetHostMibs(struct bcm_mini_adapter *Adapter, S_MIBS_HOST_STATS_MIBS
31 astClassifierTable[nClassifierIndex], 31 astClassifierTable[nClassifierIndex],
32 (PVOID) & Adapter-> 32 (PVOID) & Adapter->
33 astClassifierTable[nClassifierIndex], 33 astClassifierTable[nClassifierIndex],
34 sizeof(S_MIBS_CLASSIFIER_RULE)); 34 sizeof(struct bcm_mibs_classifier_rule));
35 } 35 }
36 36
37 /* Copy the SF Table */ 37 /* Copy the SF Table */
@@ -39,7 +39,7 @@ INT ProcessGetHostMibs(struct bcm_mini_adapter *Adapter, S_MIBS_HOST_STATS_MIBS
39 if (Adapter->PackInfo[nSfIndex].bValid) { 39 if (Adapter->PackInfo[nSfIndex].bValid) {
40 memcpy((PVOID) & pstHostMibs->astSFtable[nSfIndex], 40 memcpy((PVOID) & pstHostMibs->astSFtable[nSfIndex],
41 (PVOID) & Adapter->PackInfo[nSfIndex], 41 (PVOID) & Adapter->PackInfo[nSfIndex],
42 sizeof(S_MIBS_SERVICEFLOW_TABLE)); 42 sizeof(struct bcm_mibs_table));
43 } else { 43 } else {
44 /* If index in not valid, 44 /* If index in not valid,
45 * don't process this for the PHS table. 45 * don't process this for the PHS table.
@@ -94,16 +94,16 @@ INT ProcessGetHostMibs(struct bcm_mini_adapter *Adapter, S_MIBS_HOST_STATS_MIBS
94 return STATUS_SUCCESS; 94 return STATUS_SUCCESS;
95} 95}
96 96
97VOID GetDroppedAppCntrlPktMibs(S_MIBS_HOST_STATS_MIBS *pstHostMibs, struct bcm_tarang_data *pTarang) 97VOID GetDroppedAppCntrlPktMibs(struct bcm_host_stats_mibs *pstHostMibs, struct bcm_tarang_data *pTarang)
98{ 98{
99 memcpy(&(pstHostMibs->stDroppedAppCntrlMsgs), 99 memcpy(&(pstHostMibs->stDroppedAppCntrlMsgs),
100 &(pTarang->stDroppedAppCntrlMsgs), 100 &(pTarang->stDroppedAppCntrlMsgs),
101 sizeof(S_MIBS_DROPPED_APP_CNTRL_MESSAGES)); 101 sizeof(struct bcm_mibs_dropped_cntrl_msg));
102} 102}
103 103
104VOID CopyMIBSExtendedSFParameters(struct bcm_mini_adapter *Adapter, struct bcm_connect_mgr_params *psfLocalSet, UINT uiSearchRuleIndex) 104VOID CopyMIBSExtendedSFParameters(struct bcm_mini_adapter *Adapter, struct bcm_connect_mgr_params *psfLocalSet, UINT uiSearchRuleIndex)
105{ 105{
106 S_MIBS_EXTSERVICEFLOW_PARAMETERS *t = &Adapter->PackInfo[uiSearchRuleIndex].stMibsExtServiceFlowTable; 106 struct bcm_mibs_parameters *t = &Adapter->PackInfo[uiSearchRuleIndex].stMibsExtServiceFlowTable;
107 107
108 t->wmanIfSfid = psfLocalSet->u32SFID; 108 t->wmanIfSfid = psfLocalSet->u32SFID;
109 t->wmanIfCmnCpsMaxSustainedRate = psfLocalSet->u32MaxSustainedTrafficRate; 109 t->wmanIfCmnCpsMaxSustainedRate = psfLocalSet->u32MaxSustainedTrafficRate;
diff --git a/drivers/staging/bcm/nvm.c b/drivers/staging/bcm/nvm.c
index b034eb5fa6b1..eab676fe53a6 100644
--- a/drivers/staging/bcm/nvm.c
+++ b/drivers/staging/bcm/nvm.c
@@ -14,25 +14,25 @@ static int BcmGetNvmSize(struct bcm_mini_adapter *Adapter);
14static unsigned int BcmGetFlashSize(struct bcm_mini_adapter *Adapter); 14static unsigned int BcmGetFlashSize(struct bcm_mini_adapter *Adapter);
15static NVM_TYPE BcmGetNvmType(struct bcm_mini_adapter *Adapter); 15static NVM_TYPE BcmGetNvmType(struct bcm_mini_adapter *Adapter);
16 16
17static int BcmGetSectionValEndOffset(struct bcm_mini_adapter *Adapter, FLASH2X_SECTION_VAL eFlash2xSectionVal); 17static int BcmGetSectionValEndOffset(struct bcm_mini_adapter *Adapter, enum bcm_flash2x_section_val eFlash2xSectionVal);
18 18
19static B_UINT8 IsOffsetWritable(struct bcm_mini_adapter *Adapter, unsigned int uiOffset); 19static B_UINT8 IsOffsetWritable(struct bcm_mini_adapter *Adapter, unsigned int uiOffset);
20static int IsSectionWritable(struct bcm_mini_adapter *Adapter, FLASH2X_SECTION_VAL Section); 20static int IsSectionWritable(struct bcm_mini_adapter *Adapter, enum bcm_flash2x_section_val Section);
21static int IsSectionExistInVendorInfo(struct bcm_mini_adapter *Adapter, FLASH2X_SECTION_VAL section); 21static int IsSectionExistInVendorInfo(struct bcm_mini_adapter *Adapter, enum bcm_flash2x_section_val section);
22 22
23static int ReadDSDPriority(struct bcm_mini_adapter *Adapter, FLASH2X_SECTION_VAL dsd); 23static int ReadDSDPriority(struct bcm_mini_adapter *Adapter, enum bcm_flash2x_section_val dsd);
24static int ReadDSDSignature(struct bcm_mini_adapter *Adapter, FLASH2X_SECTION_VAL dsd); 24static int ReadDSDSignature(struct bcm_mini_adapter *Adapter, enum bcm_flash2x_section_val dsd);
25static int ReadISOPriority(struct bcm_mini_adapter *Adapter, FLASH2X_SECTION_VAL iso); 25static int ReadISOPriority(struct bcm_mini_adapter *Adapter, enum bcm_flash2x_section_val iso);
26static int ReadISOSignature(struct bcm_mini_adapter *Adapter, FLASH2X_SECTION_VAL iso); 26static int ReadISOSignature(struct bcm_mini_adapter *Adapter, enum bcm_flash2x_section_val iso);
27 27
28static int CorruptDSDSig(struct bcm_mini_adapter *Adapter, FLASH2X_SECTION_VAL eFlash2xSectionVal); 28static int CorruptDSDSig(struct bcm_mini_adapter *Adapter, enum bcm_flash2x_section_val eFlash2xSectionVal);
29static int CorruptISOSig(struct bcm_mini_adapter *Adapter, FLASH2X_SECTION_VAL eFlash2xSectionVal); 29static int CorruptISOSig(struct bcm_mini_adapter *Adapter, enum bcm_flash2x_section_val eFlash2xSectionVal);
30static int SaveHeaderIfPresent(struct bcm_mini_adapter *Adapter, PUCHAR pBuff, unsigned int uiSectAlignAddr); 30static int SaveHeaderIfPresent(struct bcm_mini_adapter *Adapter, PUCHAR pBuff, unsigned int uiSectAlignAddr);
31static int WriteToFlashWithoutSectorErase(struct bcm_mini_adapter *Adapter, PUINT pBuff, 31static int WriteToFlashWithoutSectorErase(struct bcm_mini_adapter *Adapter, PUINT pBuff,
32 FLASH2X_SECTION_VAL eFlash2xSectionVal, 32 enum bcm_flash2x_section_val eFlash2xSectionVal,
33 unsigned int uiOffset, unsigned int uiNumBytes); 33 unsigned int uiOffset, unsigned int uiNumBytes);
34static FLASH2X_SECTION_VAL getHighestPriDSD(struct bcm_mini_adapter *Adapter); 34static enum bcm_flash2x_section_val getHighestPriDSD(struct bcm_mini_adapter *Adapter);
35static FLASH2X_SECTION_VAL getHighestPriISO(struct bcm_mini_adapter *Adapter); 35static enum bcm_flash2x_section_val getHighestPriISO(struct bcm_mini_adapter *Adapter);
36 36
37static int BeceemFlashBulkRead( 37static int BeceemFlashBulkRead(
38 struct bcm_mini_adapter *Adapter, 38 struct bcm_mini_adapter *Adapter,
@@ -2413,7 +2413,7 @@ static int ConvertEndianOfCSStructure(PFLASH_CS_INFO psFlashCSInfo)
2413 return STATUS_SUCCESS; 2413 return STATUS_SUCCESS;
2414} 2414}
2415 2415
2416static int IsSectionExistInVendorInfo(struct bcm_mini_adapter *Adapter, FLASH2X_SECTION_VAL section) 2416static int IsSectionExistInVendorInfo(struct bcm_mini_adapter *Adapter, enum bcm_flash2x_section_val section)
2417{ 2417{
2418 return (Adapter->uiVendorExtnFlag && 2418 return (Adapter->uiVendorExtnFlag &&
2419 (Adapter->psFlash2xVendorInfo->VendorSection[section].AccessFlags & FLASH2X_SECTION_PRESENT) && 2419 (Adapter->psFlash2xVendorInfo->VendorSection[section].AccessFlags & FLASH2X_SECTION_PRESENT) &&
@@ -2660,14 +2660,14 @@ static NVM_TYPE BcmGetNvmType(struct bcm_mini_adapter *Adapter)
2660/* 2660/*
2661 * BcmGetSectionValStartOffset - this will calculate the section's starting offset if section val is given 2661 * BcmGetSectionValStartOffset - this will calculate the section's starting offset if section val is given
2662 * @Adapter : Drivers Private Data structure 2662 * @Adapter : Drivers Private Data structure
2663 * @eFlashSectionVal : Flash secion value defined in enum FLASH2X_SECTION_VAL 2663 * @eFlashSectionVal : Flash secion value defined in enum bcm_flash2x_section_val
2664 * 2664 *
2665 * Return value:- 2665 * Return value:-
2666 * On success it return the start offset of the provided section val 2666 * On success it return the start offset of the provided section val
2667 * On Failure -returns STATUS_FAILURE 2667 * On Failure -returns STATUS_FAILURE
2668 */ 2668 */
2669 2669
2670int BcmGetSectionValStartOffset(struct bcm_mini_adapter *Adapter, FLASH2X_SECTION_VAL eFlashSectionVal) 2670int BcmGetSectionValStartOffset(struct bcm_mini_adapter *Adapter, enum bcm_flash2x_section_val eFlashSectionVal)
2671{ 2671{
2672 /* 2672 /*
2673 * Considering all the section for which end offset can be calculated or directly given 2673 * Considering all the section for which end offset can be calculated or directly given
@@ -2752,14 +2752,14 @@ int BcmGetSectionValStartOffset(struct bcm_mini_adapter *Adapter, FLASH2X_SECTIO
2752/* 2752/*
2753 * BcmGetSectionValEndOffset - this will calculate the section's Ending offset if section val is given 2753 * BcmGetSectionValEndOffset - this will calculate the section's Ending offset if section val is given
2754 * @Adapter : Drivers Private Data structure 2754 * @Adapter : Drivers Private Data structure
2755 * @eFlashSectionVal : Flash secion value defined in enum FLASH2X_SECTION_VAL 2755 * @eFlashSectionVal : Flash secion value defined in enum bcm_flash2x_section_val
2756 * 2756 *
2757 * Return value:- 2757 * Return value:-
2758 * On success it return the end offset of the provided section val 2758 * On success it return the end offset of the provided section val
2759 * On Failure -returns STATUS_FAILURE 2759 * On Failure -returns STATUS_FAILURE
2760 */ 2760 */
2761 2761
2762int BcmGetSectionValEndOffset(struct bcm_mini_adapter *Adapter, FLASH2X_SECTION_VAL eFlash2xSectionVal) 2762int BcmGetSectionValEndOffset(struct bcm_mini_adapter *Adapter, enum bcm_flash2x_section_val eFlash2xSectionVal)
2763{ 2763{
2764 int SectEndOffset = 0; 2764 int SectEndOffset = 0;
2765 2765
@@ -2837,7 +2837,7 @@ int BcmGetSectionValEndOffset(struct bcm_mini_adapter *Adapter, FLASH2X_SECTION_
2837 * BcmFlash2xBulkRead:- Read API for Flash Map 2.x . 2837 * BcmFlash2xBulkRead:- Read API for Flash Map 2.x .
2838 * @Adapter :Driver Private Data Structure 2838 * @Adapter :Driver Private Data Structure
2839 * @pBuffer : Buffer where data has to be put after reading 2839 * @pBuffer : Buffer where data has to be put after reading
2840 * @eFlashSectionVal :Flash Section Val defined in FLASH2X_SECTION_VAL 2840 * @eFlashSectionVal :Flash Section Val defined in enum bcm_flash2x_section_val
2841 * @uiOffsetWithinSectionVal :- Offset with in provided section 2841 * @uiOffsetWithinSectionVal :- Offset with in provided section
2842 * @uiNumBytes : Number of Bytes for Read 2842 * @uiNumBytes : Number of Bytes for Read
2843 * 2843 *
@@ -2847,7 +2847,7 @@ int BcmGetSectionValEndOffset(struct bcm_mini_adapter *Adapter, FLASH2X_SECTION_
2847 2847
2848int BcmFlash2xBulkRead(struct bcm_mini_adapter *Adapter, 2848int BcmFlash2xBulkRead(struct bcm_mini_adapter *Adapter,
2849 PUINT pBuffer, 2849 PUINT pBuffer,
2850 FLASH2X_SECTION_VAL eFlash2xSectionVal, 2850 enum bcm_flash2x_section_val eFlash2xSectionVal,
2851 unsigned int uiOffsetWithinSectionVal, 2851 unsigned int uiOffsetWithinSectionVal,
2852 unsigned int uiNumBytes) 2852 unsigned int uiNumBytes)
2853{ 2853{
@@ -2898,7 +2898,7 @@ int BcmFlash2xBulkRead(struct bcm_mini_adapter *Adapter,
2898 * BcmFlash2xBulkWrite :-API for Writing on the Flash Map 2.x. 2898 * BcmFlash2xBulkWrite :-API for Writing on the Flash Map 2.x.
2899 * @Adapter :Driver Private Data Structure 2899 * @Adapter :Driver Private Data Structure
2900 * @pBuffer : Buffer From where data has to taken for writing 2900 * @pBuffer : Buffer From where data has to taken for writing
2901 * @eFlashSectionVal :Flash Section Val defined in FLASH2X_SECTION_VAL 2901 * @eFlashSectionVal :Flash Section Val defined in enum bcm_flash2x_section_val
2902 * @uiOffsetWithinSectionVal :- Offset with in provided section 2902 * @uiOffsetWithinSectionVal :- Offset with in provided section
2903 * @uiNumBytes : Number of Bytes for Write 2903 * @uiNumBytes : Number of Bytes for Write
2904 * 2904 *
@@ -2909,7 +2909,7 @@ int BcmFlash2xBulkRead(struct bcm_mini_adapter *Adapter,
2909 2909
2910int BcmFlash2xBulkWrite(struct bcm_mini_adapter *Adapter, 2910int BcmFlash2xBulkWrite(struct bcm_mini_adapter *Adapter,
2911 PUINT pBuffer, 2911 PUINT pBuffer,
2912 FLASH2X_SECTION_VAL eFlash2xSectVal, 2912 enum bcm_flash2x_section_val eFlash2xSectVal,
2913 unsigned int uiOffset, 2913 unsigned int uiOffset,
2914 unsigned int uiNumBytes, 2914 unsigned int uiNumBytes,
2915 unsigned int bVerify) 2915 unsigned int bVerify)
@@ -2971,7 +2971,7 @@ int BcmFlash2xBulkWrite(struct bcm_mini_adapter *Adapter,
2971 2971
2972static int BcmGetActiveDSD(struct bcm_mini_adapter *Adapter) 2972static int BcmGetActiveDSD(struct bcm_mini_adapter *Adapter)
2973{ 2973{
2974 FLASH2X_SECTION_VAL uiHighestPriDSD = 0; 2974 enum bcm_flash2x_section_val uiHighestPriDSD = 0;
2975 2975
2976 uiHighestPriDSD = getHighestPriDSD(Adapter); 2976 uiHighestPriDSD = getHighestPriDSD(Adapter);
2977 Adapter->eActiveDSD = uiHighestPriDSD; 2977 Adapter->eActiveDSD = uiHighestPriDSD;
@@ -3064,7 +3064,7 @@ B_UINT8 IsOffsetWritable(struct bcm_mini_adapter *Adapter, unsigned int uiOffset
3064 return FALSE; 3064 return FALSE;
3065} 3065}
3066 3066
3067static int BcmDumpFlash2xSectionBitMap(PFLASH2X_BITMAP psFlash2xBitMap) 3067static int BcmDumpFlash2xSectionBitMap(struct bcm_flash2x_bitmap *psFlash2xBitMap)
3068{ 3068{
3069 struct bcm_mini_adapter *Adapter = GET_BCM_ADAPTER(gblpnetdev); 3069 struct bcm_mini_adapter *Adapter = GET_BCM_ADAPTER(gblpnetdev);
3070 3070
@@ -3099,11 +3099,11 @@ static int BcmDumpFlash2xSectionBitMap(PFLASH2X_BITMAP psFlash2xBitMap)
3099 * Failure:- negative error code 3099 * Failure:- negative error code
3100 */ 3100 */
3101 3101
3102int BcmGetFlash2xSectionalBitMap(struct bcm_mini_adapter *Adapter, PFLASH2X_BITMAP psFlash2xBitMap) 3102int BcmGetFlash2xSectionalBitMap(struct bcm_mini_adapter *Adapter, struct bcm_flash2x_bitmap *psFlash2xBitMap)
3103{ 3103{
3104 PFLASH2X_CS_INFO psFlash2xCSInfo = Adapter->psFlash2xCSInfo; 3104 PFLASH2X_CS_INFO psFlash2xCSInfo = Adapter->psFlash2xCSInfo;
3105 FLASH2X_SECTION_VAL uiHighestPriDSD = 0; 3105 enum bcm_flash2x_section_val uiHighestPriDSD = 0;
3106 FLASH2X_SECTION_VAL uiHighestPriISO = 0; 3106 enum bcm_flash2x_section_val uiHighestPriISO = 0;
3107 BOOLEAN SetActiveDSDDone = FALSE; 3107 BOOLEAN SetActiveDSDDone = FALSE;
3108 BOOLEAN SetActiveISODone = FALSE; 3108 BOOLEAN SetActiveISODone = FALSE;
3109 3109
@@ -3349,7 +3349,7 @@ int BcmGetFlash2xSectionalBitMap(struct bcm_mini_adapter *Adapter, PFLASH2X_BITM
3349 * 3349 *
3350 */ 3350 */
3351 3351
3352int BcmSetActiveSection(struct bcm_mini_adapter *Adapter, FLASH2X_SECTION_VAL eFlash2xSectVal) 3352int BcmSetActiveSection(struct bcm_mini_adapter *Adapter, enum bcm_flash2x_section_val eFlash2xSectVal)
3353{ 3353{
3354 unsigned int SectImagePriority = 0; 3354 unsigned int SectImagePriority = 0;
3355 int Status = STATUS_SUCCESS; 3355 int Status = STATUS_SUCCESS;
@@ -3529,10 +3529,10 @@ int BcmSetActiveSection(struct bcm_mini_adapter *Adapter, FLASH2X_SECTION_VAL eF
3529 * 3529 *
3530 */ 3530 */
3531 3531
3532int BcmCopyISO(struct bcm_mini_adapter *Adapter, FLASH2X_COPY_SECTION sCopySectStrut) 3532int BcmCopyISO(struct bcm_mini_adapter *Adapter, struct bcm_flash2x_copy_section sCopySectStrut)
3533{ 3533{
3534 PCHAR Buff = NULL; 3534 PCHAR Buff = NULL;
3535 FLASH2X_SECTION_VAL eISOReadPart = 0, eISOWritePart = 0; 3535 enum bcm_flash2x_section_val eISOReadPart = 0, eISOWritePart = 0;
3536 unsigned int uiReadOffsetWithinPart = 0, uiWriteOffsetWithinPart = 0; 3536 unsigned int uiReadOffsetWithinPart = 0, uiWriteOffsetWithinPart = 0;
3537 unsigned int uiTotalDataToCopy = 0; 3537 unsigned int uiTotalDataToCopy = 0;
3538 BOOLEAN IsThisHeaderSector = FALSE; 3538 BOOLEAN IsThisHeaderSector = FALSE;
@@ -3813,7 +3813,7 @@ out:
3813 * Failure :-Return negative error code 3813 * Failure :-Return negative error code
3814 */ 3814 */
3815 3815
3816int BcmFlash2xCorruptSig(struct bcm_mini_adapter *Adapter, FLASH2X_SECTION_VAL eFlash2xSectionVal) 3816int BcmFlash2xCorruptSig(struct bcm_mini_adapter *Adapter, enum bcm_flash2x_section_val eFlash2xSectionVal)
3817{ 3817{
3818 int Status = STATUS_SUCCESS; 3818 int Status = STATUS_SUCCESS;
3819 3819
@@ -3841,7 +3841,7 @@ int BcmFlash2xCorruptSig(struct bcm_mini_adapter *Adapter, FLASH2X_SECTION_VAL e
3841 * Failure :-Return negative error code 3841 * Failure :-Return negative error code
3842 */ 3842 */
3843 3843
3844int BcmFlash2xWriteSig(struct bcm_mini_adapter *Adapter, FLASH2X_SECTION_VAL eFlashSectionVal) 3844int BcmFlash2xWriteSig(struct bcm_mini_adapter *Adapter, enum bcm_flash2x_section_val eFlashSectionVal)
3845{ 3845{
3846 unsigned int uiSignature = 0; 3846 unsigned int uiSignature = 0;
3847 unsigned int uiOffset = 0; 3847 unsigned int uiOffset = 0;
@@ -3901,7 +3901,7 @@ int BcmFlash2xWriteSig(struct bcm_mini_adapter *Adapter, FLASH2X_SECTION_VAL eFl
3901 * Return values:-Return TRUE is request is valid else FALSE. 3901 * Return values:-Return TRUE is request is valid else FALSE.
3902 */ 3902 */
3903 3903
3904int validateFlash2xReadWrite(struct bcm_mini_adapter *Adapter, PFLASH2X_READWRITE psFlash2xReadWrite) 3904int validateFlash2xReadWrite(struct bcm_mini_adapter *Adapter, struct bcm_flash2x_readwrite *psFlash2xReadWrite)
3905{ 3905{
3906 unsigned int uiNumOfBytes = 0; 3906 unsigned int uiNumOfBytes = 0;
3907 unsigned int uiSectStartOffset = 0; 3907 unsigned int uiSectStartOffset = 0;
@@ -4021,8 +4021,8 @@ static int GetFlashBaseAddr(struct bcm_mini_adapter *Adapter)
4021 */ 4021 */
4022 4022
4023int BcmCopySection(struct bcm_mini_adapter *Adapter, 4023int BcmCopySection(struct bcm_mini_adapter *Adapter,
4024 FLASH2X_SECTION_VAL SrcSection, 4024 enum bcm_flash2x_section_val SrcSection,
4025 FLASH2X_SECTION_VAL DstSection, 4025 enum bcm_flash2x_section_val DstSection,
4026 unsigned int offset, 4026 unsigned int offset,
4027 unsigned int numOfBytes) 4027 unsigned int numOfBytes)
4028{ 4028{
@@ -4264,7 +4264,7 @@ static int BcmDoChipSelect(struct bcm_mini_adapter *Adapter, unsigned int offset
4264 return STATUS_SUCCESS; 4264 return STATUS_SUCCESS;
4265} 4265}
4266 4266
4267int ReadDSDSignature(struct bcm_mini_adapter *Adapter, FLASH2X_SECTION_VAL dsd) 4267int ReadDSDSignature(struct bcm_mini_adapter *Adapter, enum bcm_flash2x_section_val dsd)
4268{ 4268{
4269 unsigned int uiDSDsig = 0; 4269 unsigned int uiDSDsig = 0;
4270 /* unsigned int sigoffsetInMap = 0; 4270 /* unsigned int sigoffsetInMap = 0;
@@ -4289,7 +4289,7 @@ int ReadDSDSignature(struct bcm_mini_adapter *Adapter, FLASH2X_SECTION_VAL dsd)
4289 return uiDSDsig; 4289 return uiDSDsig;
4290} 4290}
4291 4291
4292int ReadDSDPriority(struct bcm_mini_adapter *Adapter, FLASH2X_SECTION_VAL dsd) 4292int ReadDSDPriority(struct bcm_mini_adapter *Adapter, enum bcm_flash2x_section_val dsd)
4293{ 4293{
4294 /* unsigned int priOffsetInMap = 0 ; */ 4294 /* unsigned int priOffsetInMap = 0 ; */
4295 unsigned int uiDSDPri = STATUS_FAILURE; 4295 unsigned int uiDSDPri = STATUS_FAILURE;
@@ -4312,11 +4312,11 @@ int ReadDSDPriority(struct bcm_mini_adapter *Adapter, FLASH2X_SECTION_VAL dsd)
4312 return uiDSDPri; 4312 return uiDSDPri;
4313} 4313}
4314 4314
4315FLASH2X_SECTION_VAL getHighestPriDSD(struct bcm_mini_adapter *Adapter) 4315enum bcm_flash2x_section_val getHighestPriDSD(struct bcm_mini_adapter *Adapter)
4316{ 4316{
4317 int DSDHighestPri = STATUS_FAILURE; 4317 int DSDHighestPri = STATUS_FAILURE;
4318 int DsdPri = 0; 4318 int DsdPri = 0;
4319 FLASH2X_SECTION_VAL HighestPriDSD = 0; 4319 enum bcm_flash2x_section_val HighestPriDSD = 0;
4320 4320
4321 if (IsSectionWritable(Adapter, DSD2)) { 4321 if (IsSectionWritable(Adapter, DSD2)) {
4322 DSDHighestPri = ReadDSDPriority(Adapter, DSD2); 4322 DSDHighestPri = ReadDSDPriority(Adapter, DSD2);
@@ -4344,7 +4344,7 @@ FLASH2X_SECTION_VAL getHighestPriDSD(struct bcm_mini_adapter *Adapter)
4344 return HighestPriDSD; 4344 return HighestPriDSD;
4345} 4345}
4346 4346
4347int ReadISOSignature(struct bcm_mini_adapter *Adapter, FLASH2X_SECTION_VAL iso) 4347int ReadISOSignature(struct bcm_mini_adapter *Adapter, enum bcm_flash2x_section_val iso)
4348{ 4348{
4349 unsigned int uiISOsig = 0; 4349 unsigned int uiISOsig = 0;
4350 /* unsigned int sigoffsetInMap = 0; 4350 /* unsigned int sigoffsetInMap = 0;
@@ -4367,7 +4367,7 @@ int ReadISOSignature(struct bcm_mini_adapter *Adapter, FLASH2X_SECTION_VAL iso)
4367 return uiISOsig; 4367 return uiISOsig;
4368} 4368}
4369 4369
4370int ReadISOPriority(struct bcm_mini_adapter *Adapter, FLASH2X_SECTION_VAL iso) 4370int ReadISOPriority(struct bcm_mini_adapter *Adapter, enum bcm_flash2x_section_val iso)
4371{ 4371{
4372 unsigned int ISOPri = STATUS_FAILURE; 4372 unsigned int ISOPri = STATUS_FAILURE;
4373 if (IsSectionWritable(Adapter, iso)) { 4373 if (IsSectionWritable(Adapter, iso)) {
@@ -4386,11 +4386,11 @@ int ReadISOPriority(struct bcm_mini_adapter *Adapter, FLASH2X_SECTION_VAL iso)
4386 return ISOPri; 4386 return ISOPri;
4387} 4387}
4388 4388
4389FLASH2X_SECTION_VAL getHighestPriISO(struct bcm_mini_adapter *Adapter) 4389enum bcm_flash2x_section_val getHighestPriISO(struct bcm_mini_adapter *Adapter)
4390{ 4390{
4391 int ISOHighestPri = STATUS_FAILURE; 4391 int ISOHighestPri = STATUS_FAILURE;
4392 int ISOPri = 0; 4392 int ISOPri = 0;
4393 FLASH2X_SECTION_VAL HighestPriISO = NO_SECTION_VAL; 4393 enum bcm_flash2x_section_val HighestPriISO = NO_SECTION_VAL;
4394 4394
4395 if (IsSectionWritable(Adapter, ISO_IMAGE2)) { 4395 if (IsSectionWritable(Adapter, ISO_IMAGE2)) {
4396 ISOHighestPri = ReadISOPriority(Adapter, ISO_IMAGE2); 4396 ISOHighestPri = ReadISOPriority(Adapter, ISO_IMAGE2);
@@ -4412,7 +4412,7 @@ FLASH2X_SECTION_VAL getHighestPriISO(struct bcm_mini_adapter *Adapter)
4412 4412
4413int WriteToFlashWithoutSectorErase(struct bcm_mini_adapter *Adapter, 4413int WriteToFlashWithoutSectorErase(struct bcm_mini_adapter *Adapter,
4414 PUINT pBuff, 4414 PUINT pBuff,
4415 FLASH2X_SECTION_VAL eFlash2xSectionVal, 4415 enum bcm_flash2x_section_val eFlash2xSectionVal,
4416 unsigned int uiOffset, 4416 unsigned int uiOffset,
4417 unsigned int uiNumBytes) 4417 unsigned int uiNumBytes)
4418{ 4418{
@@ -4468,7 +4468,7 @@ int WriteToFlashWithoutSectorErase(struct bcm_mini_adapter *Adapter,
4468 return Status; 4468 return Status;
4469} 4469}
4470 4470
4471BOOLEAN IsSectionExistInFlash(struct bcm_mini_adapter *Adapter, FLASH2X_SECTION_VAL section) 4471BOOLEAN IsSectionExistInFlash(struct bcm_mini_adapter *Adapter, enum bcm_flash2x_section_val section)
4472{ 4472{
4473 BOOLEAN SectionPresent = FALSE; 4473 BOOLEAN SectionPresent = FALSE;
4474 4474
@@ -4523,7 +4523,7 @@ BOOLEAN IsSectionExistInFlash(struct bcm_mini_adapter *Adapter, FLASH2X_SECTION_
4523 return SectionPresent; 4523 return SectionPresent;
4524} 4524}
4525 4525
4526int IsSectionWritable(struct bcm_mini_adapter *Adapter, FLASH2X_SECTION_VAL Section) 4526int IsSectionWritable(struct bcm_mini_adapter *Adapter, enum bcm_flash2x_section_val Section)
4527{ 4527{
4528 int offset = STATUS_FAILURE; 4528 int offset = STATUS_FAILURE;
4529 int Status = FALSE; 4529 int Status = FALSE;
@@ -4546,7 +4546,7 @@ int IsSectionWritable(struct bcm_mini_adapter *Adapter, FLASH2X_SECTION_VAL Sect
4546 return Status; 4546 return Status;
4547} 4547}
4548 4548
4549static int CorruptDSDSig(struct bcm_mini_adapter *Adapter, FLASH2X_SECTION_VAL eFlash2xSectionVal) 4549static int CorruptDSDSig(struct bcm_mini_adapter *Adapter, enum bcm_flash2x_section_val eFlash2xSectionVal)
4550{ 4550{
4551 PUCHAR pBuff = NULL; 4551 PUCHAR pBuff = NULL;
4552 unsigned int sig = 0; 4552 unsigned int sig = 0;
@@ -4608,7 +4608,7 @@ static int CorruptDSDSig(struct bcm_mini_adapter *Adapter, FLASH2X_SECTION_VAL e
4608 return STATUS_SUCCESS; 4608 return STATUS_SUCCESS;
4609} 4609}
4610 4610
4611static int CorruptISOSig(struct bcm_mini_adapter *Adapter, FLASH2X_SECTION_VAL eFlash2xSectionVal) 4611static int CorruptISOSig(struct bcm_mini_adapter *Adapter, enum bcm_flash2x_section_val eFlash2xSectionVal)
4612{ 4612{
4613 PUCHAR pBuff = NULL; 4613 PUCHAR pBuff = NULL;
4614 unsigned int sig = 0; 4614 unsigned int sig = 0;
diff --git a/drivers/staging/bcm/vendorspecificextn.c b/drivers/staging/bcm/vendorspecificextn.c
index 833883c21a22..40be60aa909a 100644
--- a/drivers/staging/bcm/vendorspecificextn.c
+++ b/drivers/staging/bcm/vendorspecificextn.c
@@ -89,7 +89,7 @@ INT vendorextnIoctl(struct bcm_mini_adapter *Adapter, UINT cmd, ULONG arg)
89// 89//
90//------------------------------------------------------------------ 90//------------------------------------------------------------------
91 91
92INT vendorextnReadSection(PVOID pContext, PUCHAR pBuffer, FLASH2X_SECTION_VAL SectionVal, 92INT vendorextnReadSection(PVOID pContext, PUCHAR pBuffer, enum bcm_flash2x_section_val SectionVal,
93 UINT offset, UINT numOfBytes) 93 UINT offset, UINT numOfBytes)
94{ 94{
95 return STATUS_FAILURE; 95 return STATUS_FAILURE;
@@ -114,7 +114,7 @@ INT vendorextnReadSection(PVOID pContext, PUCHAR pBuffer, FLASH2X_SECTION_VAL S
114// STATUS_SUCCESS/STATUS_FAILURE 114// STATUS_SUCCESS/STATUS_FAILURE
115// 115//
116//------------------------------------------------------------------ 116//------------------------------------------------------------------
117INT vendorextnWriteSection(PVOID pContext, PUCHAR pBuffer, FLASH2X_SECTION_VAL SectionVal, 117INT vendorextnWriteSection(PVOID pContext, PUCHAR pBuffer, enum bcm_flash2x_section_val SectionVal,
118 UINT offset, UINT numOfBytes, BOOLEAN bVerify) 118 UINT offset, UINT numOfBytes, BOOLEAN bVerify)
119{ 119{
120 return STATUS_FAILURE; 120 return STATUS_FAILURE;
@@ -138,7 +138,7 @@ INT vendorextnWriteSection(PVOID pContext, PUCHAR pBuffer, FLASH2X_SECTION_VAL
138// STATUS_SUCCESS/STATUS_FAILURE 138// STATUS_SUCCESS/STATUS_FAILURE
139// 139//
140//------------------------------------------------------------------ 140//------------------------------------------------------------------
141INT vendorextnWriteSectionWithoutErase(PVOID pContext, PUCHAR pBuffer, FLASH2X_SECTION_VAL SectionVal, 141INT vendorextnWriteSectionWithoutErase(PVOID pContext, PUCHAR pBuffer, enum bcm_flash2x_section_val SectionVal,
142 UINT offset, UINT numOfBytes) 142 UINT offset, UINT numOfBytes)
143{ 143{
144 return STATUS_FAILURE; 144 return STATUS_FAILURE;
diff --git a/drivers/staging/bcm/vendorspecificextn.h b/drivers/staging/bcm/vendorspecificextn.h
index f237891b9f29..834410e29e75 100644
--- a/drivers/staging/bcm/vendorspecificextn.h
+++ b/drivers/staging/bcm/vendorspecificextn.h
@@ -8,11 +8,11 @@ INT vendorextnGetSectionInfo(PVOID pContext,PFLASH2X_VENDORSPECIFIC_INFO pVendo
8INT vendorextnExit(struct bcm_mini_adapter *Adapter); 8INT vendorextnExit(struct bcm_mini_adapter *Adapter);
9INT vendorextnInit(struct bcm_mini_adapter *Adapter); 9INT vendorextnInit(struct bcm_mini_adapter *Adapter);
10INT vendorextnIoctl(struct bcm_mini_adapter *Adapter, UINT cmd, ULONG arg); 10INT vendorextnIoctl(struct bcm_mini_adapter *Adapter, UINT cmd, ULONG arg);
11INT vendorextnReadSection(PVOID pContext, PUCHAR pBuffer, FLASH2X_SECTION_VAL SectionVal, 11INT vendorextnReadSection(PVOID pContext, PUCHAR pBuffer, enum bcm_flash2x_section_val SectionVal,
12 UINT offset, UINT numOfBytes); 12 UINT offset, UINT numOfBytes);
13INT vendorextnWriteSection(PVOID pContext, PUCHAR pBuffer, FLASH2X_SECTION_VAL SectionVal, 13INT vendorextnWriteSection(PVOID pContext, PUCHAR pBuffer, enum bcm_flash2x_section_val SectionVal,
14 UINT offset, UINT numOfBytes, BOOLEAN bVerify); 14 UINT offset, UINT numOfBytes, BOOLEAN bVerify);
15INT vendorextnWriteSectionWithoutErase(PVOID pContext, PUCHAR pBuffer, FLASH2X_SECTION_VAL SectionVal, 15INT vendorextnWriteSectionWithoutErase(PVOID pContext, PUCHAR pBuffer, enum bcm_flash2x_section_val SectionVal,
16 UINT offset, UINT numOfBytes); 16 UINT offset, UINT numOfBytes);
17 17
18#endif /* */ 18#endif /* */
diff --git a/drivers/staging/ccg/ccg.c b/drivers/staging/ccg/ccg.c
index 93e1e2ffca0c..ffc5f73a5b5b 100644
--- a/drivers/staging/ccg/ccg.c
+++ b/drivers/staging/ccg/ccg.c
@@ -1239,7 +1239,7 @@ static int ccg_create_device(struct ccg_dev *dev)
1239} 1239}
1240 1240
1241 1241
1242static int __init init(void) 1242static int __init ccg_init(void)
1243{ 1243{
1244 struct ccg_dev *dev; 1244 struct ccg_dev *dev;
1245 int err; 1245 int err;
@@ -1280,13 +1280,13 @@ static int __init init(void)
1280 1280
1281 return err; 1281 return err;
1282} 1282}
1283module_init(init); 1283module_init(ccg_init);
1284 1284
1285static void __exit cleanup(void) 1285static void __exit ccg_exit(void)
1286{ 1286{
1287 usb_composite_unregister(&ccg_usb_driver); 1287 usb_composite_unregister(&ccg_usb_driver);
1288 class_destroy(ccg_class); 1288 class_destroy(ccg_class);
1289 kfree(_ccg_dev); 1289 kfree(_ccg_dev);
1290 _ccg_dev = NULL; 1290 _ccg_dev = NULL;
1291} 1291}
1292module_exit(cleanup); 1292module_exit(ccg_exit);
diff --git a/drivers/staging/ced1401/ced_ioc.c b/drivers/staging/ced1401/ced_ioc.c
index c9492edaaddb..d0434714afd3 100644
--- a/drivers/staging/ced1401/ced_ioc.c
+++ b/drivers/staging/ced1401/ced_ioc.c
@@ -341,7 +341,7 @@ bool Is1401(DEVICE_EXTENSION * pdx)
341 } 341 }
342 342
343 if (iReturn == 0) // if all is OK... 343 if (iReturn == 0) // if all is OK...
344 iReturn = state == 0; // then sucess is that the state is 0 344 iReturn = state == 0; // then success is that the state is 0
345 } else 345 } else
346 iReturn = 0; // we failed 346 iReturn = 0; // we failed
347 pdx->bForceReset = false; // Clear forced reset flag now 347 pdx->bForceReset = false; // Clear forced reset flag now
@@ -565,7 +565,7 @@ int LineCount(DEVICE_EXTENSION * pdx)
565 if (dwIndex >= INBUF_SZ) // see if we fall off buff 565 if (dwIndex >= INBUF_SZ) // see if we fall off buff
566 dwIndex = 0; 566 dwIndex = 0;
567 } 567 }
568 while (dwIndex != dwEnd); // go to last avaliable 568 while (dwIndex != dwEnd); // go to last available
569 } 569 }
570 570
571 spin_unlock_irq(&pdx->charInLock); 571 spin_unlock_irq(&pdx->charInLock);
@@ -697,8 +697,7 @@ static int SetArea(DEVICE_EXTENSION * pdx, int nArea, char __user * puBuf,
697 return -EFAULT; // ...then we are done 697 return -EFAULT; // ...then we are done
698 698
699 // Now allocate space to hold the page pointer and virtual address pointer tables 699 // Now allocate space to hold the page pointer and virtual address pointer tables
700 pPages = 700 pPages = kmalloc(len * sizeof(struct page *), GFP_KERNEL);
701 (struct page **)kmalloc(len * sizeof(struct page *), GFP_KERNEL);
702 if (!pPages) { 701 if (!pPages) {
703 iReturn = U14ERR_NOMEMORY; 702 iReturn = U14ERR_NOMEMORY;
704 goto error; 703 goto error;
@@ -913,18 +912,24 @@ int GetTransfer(DEVICE_EXTENSION * pdx, TGET_TX_BLOCK __user * pTX)
913 iReturn = U14ERR_BADAREA; 912 iReturn = U14ERR_BADAREA;
914 else { 913 else {
915 // Return the best information we have - we don't have physical addresses 914 // Return the best information we have - we don't have physical addresses
916 TGET_TX_BLOCK tx; 915 TGET_TX_BLOCK *tx;
917 memset(&tx, 0, sizeof(tx)); // clean out local work structure 916
918 tx.size = pdx->rTransDef[dwIdent].dwLength; 917 tx = kzalloc(sizeof(*tx), GFP_KERNEL);
919 tx.linear = (long long)((long)pdx->rTransDef[dwIdent].lpvBuff); 918 if (!tx) {
920 tx.avail = GET_TX_MAXENTRIES; // how many blocks we could return 919 mutex_unlock(&pdx->io_mutex);
921 tx.used = 1; // number we actually return 920 return -ENOMEM;
922 tx.entries[0].physical = 921 }
923 (long long)(tx.linear + pdx->StagedOffset); 922 tx->size = pdx->rTransDef[dwIdent].dwLength;
924 tx.entries[0].size = tx.size; 923 tx->linear = (long long)((long)pdx->rTransDef[dwIdent].lpvBuff);
925 924 tx->avail = GET_TX_MAXENTRIES; // how many blocks we could return
926 if (copy_to_user(pTX, &tx, sizeof(tx))) 925 tx->used = 1; // number we actually return
926 tx->entries[0].physical =
927 (long long)(tx->linear + pdx->StagedOffset);
928 tx->entries[0].size = tx->size;
929
930 if (copy_to_user(pTX, tx, sizeof(*tx)))
927 iReturn = -EFAULT; 931 iReturn = -EFAULT;
932 kfree(tx);
928 } 933 }
929 mutex_unlock(&pdx->io_mutex); 934 mutex_unlock(&pdx->io_mutex);
930 return iReturn; 935 return iReturn;
@@ -1508,7 +1513,7 @@ int FreeCircBlock(DEVICE_EXTENSION * pdx, TCIRCBLOCK __user * pCB)
1508 iReturn = U14ERR_BADAREA; 1513 iReturn = U14ERR_BADAREA;
1509 1514
1510 if (copy_to_user(pCB, &cb, sizeof(cb))) 1515 if (copy_to_user(pCB, &cb, sizeof(cb)))
1511 return -EFAULT; 1516 iReturn = -EFAULT;
1512 1517
1513 mutex_unlock(&pdx->io_mutex); 1518 mutex_unlock(&pdx->io_mutex);
1514 return iReturn; 1519 return iReturn;
diff --git a/drivers/staging/ced1401/usb1401.c b/drivers/staging/ced1401/usb1401.c
index 6ba0ef652561..a27043a2f8c5 100644
--- a/drivers/staging/ced1401/usb1401.c
+++ b/drivers/staging/ced1401/usb1401.c
@@ -89,14 +89,11 @@ synchronous non-Urb based transfers.
89#include <linux/mutex.h> 89#include <linux/mutex.h>
90#include <linux/mm.h> 90#include <linux/mm.h>
91#include <linux/highmem.h> 91#include <linux/highmem.h>
92#include <linux/version.h>
93#if ( LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,35) )
94#include <linux/init.h> 92#include <linux/init.h>
95#include <linux/slab.h> 93#include <linux/slab.h>
96#include <linux/module.h> 94#include <linux/module.h>
97#include <linux/kref.h> 95#include <linux/kref.h>
98#include <linux/uaccess.h> 96#include <linux/uaccess.h>
99#endif
100 97
101#include "usb1401.h" 98#include "usb1401.h"
102 99
@@ -123,19 +120,6 @@ MODULE_DEVICE_TABLE(usb, ced_table);
123#define WRITES_IN_FLIGHT 8 120#define WRITES_IN_FLIGHT 8
124/* arbitrarily chosen */ 121/* arbitrarily chosen */
125 122
126/*
127The cause for these errors is that the driver makes use of the functions usb_buffer_alloc() and usb_buffer_free() which got renamed in kernel 2.6.35. This is stated in the Changelog: USB: rename usb_buffer_alloc() and usb_buffer_free() users
128 For more clearance what the functions actually do,
129 usb_buffer_alloc() is renamed to usb_alloc_coherent()
130 usb_buffer_free() is renamed to usb_free_coherent()
131 This is needed on Debian 2.6.32-5-amd64
132*/
133#if ( LINUX_VERSION_CODE < KERNEL_VERSION(2,6,35) )
134#define usb_alloc_coherent usb_buffer_alloc
135#define usb_free_coherent usb_buffer_free
136#define noop_llseek NULL
137#endif
138
139static struct usb_driver ced_driver; 123static struct usb_driver ced_driver;
140 124
141static void ced_delete(struct kref *kref) 125static void ced_delete(struct kref *kref)
@@ -927,9 +911,9 @@ static bool ReadWord(unsigned short *pWord, char *pBuf, unsigned int *pdDone,
927** ReadHuff 911** ReadHuff
928** 912**
929** Reads a coded number in and returns it, Code is: 913** Reads a coded number in and returns it, Code is:
930** If data is in range 0..127 we recieve 1 byte. If data in range 128-16383 914** If data is in range 0..127 we receive 1 byte. If data in range 128-16383
931** we recieve two bytes, top bit of first indicates another on its way. If 915** we receive two bytes, top bit of first indicates another on its way. If
932** data in range 16383-4194303 we get three bytes, top two bits of first set 916** data in range 16384-4194303 we get three bytes, top two bits of first set
933** to indicate three byte total. 917** to indicate three byte total.
934** 918**
935*****************************************************************************/ 919*****************************************************************************/
@@ -1252,12 +1236,7 @@ int Allowi(DEVICE_EXTENSION * pdx, bool bInCallback)
1252** ulArg The argument passed in. Note that long is 64-bits in 64-bit system, i.e. it is big 1236** ulArg The argument passed in. Note that long is 64-bits in 64-bit system, i.e. it is big
1253** enough for a 64-bit pointer. 1237** enough for a 64-bit pointer.
1254*****************************************************************************/ 1238*****************************************************************************/
1255#if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,36)
1256static long ced_ioctl(struct file *file, unsigned int cmd, unsigned long ulArg) 1239static long ced_ioctl(struct file *file, unsigned int cmd, unsigned long ulArg)
1257#else
1258static int ced_ioctl(struct inode *node, struct file *file, unsigned int cmd,
1259 unsigned long ulArg)
1260#endif
1261{ 1240{
1262 int err = 0; 1241 int err = 0;
1263 DEVICE_EXTENSION *pdx = file->private_data; 1242 DEVICE_EXTENSION *pdx = file->private_data;
@@ -1388,11 +1367,7 @@ static const struct file_operations ced_fops = {
1388 .release = ced_release, 1367 .release = ced_release,
1389 .flush = ced_flush, 1368 .flush = ced_flush,
1390 .llseek = noop_llseek, 1369 .llseek = noop_llseek,
1391#if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,36)
1392 .unlocked_ioctl = ced_ioctl, 1370 .unlocked_ioctl = ced_ioctl,
1393#else
1394 .ioctl = ced_ioctl,
1395#endif
1396}; 1371};
1397 1372
1398/* 1373/*
@@ -1537,7 +1512,7 @@ error:
1537static void ced_disconnect(struct usb_interface *interface) 1512static void ced_disconnect(struct usb_interface *interface)
1538{ 1513{
1539 DEVICE_EXTENSION *pdx = usb_get_intfdata(interface); 1514 DEVICE_EXTENSION *pdx = usb_get_intfdata(interface);
1540 int minor = interface->minor; // save for message at the end 1515 int minor = interface->minor;
1541 int i; 1516 int i;
1542 1517
1543 usb_set_intfdata(interface, NULL); // remove the pdx from the interface 1518 usb_set_intfdata(interface, NULL); // remove the pdx from the interface
@@ -1572,8 +1547,7 @@ void ced_draw_down(DEVICE_EXTENSION * pdx)
1572 1547
1573 pdx->bInDrawDown = true; 1548 pdx->bInDrawDown = true;
1574 time = usb_wait_anchor_empty_timeout(&pdx->submitted, 3000); 1549 time = usb_wait_anchor_empty_timeout(&pdx->submitted, 3000);
1575 if (!time) // if we timed out we kill the urbs 1550 if (!time) { // if we timed out we kill the urbs
1576 {
1577 usb_kill_anchored_urbs(&pdx->submitted); 1551 usb_kill_anchored_urbs(&pdx->submitted);
1578 dev_err(&pdx->interface->dev, "%s timed out", __func__); 1552 dev_err(&pdx->interface->dev, "%s timed out", __func__);
1579 } 1553 }
diff --git a/drivers/staging/ced1401/usb1401.h b/drivers/staging/ced1401/usb1401.h
index 331ca9859829..adb5fa402bd4 100644
--- a/drivers/staging/ced1401/usb1401.h
+++ b/drivers/staging/ced1401/usb1401.h
@@ -165,7 +165,7 @@ typedef struct _DEVICE_EXTENSION
165 165
166 // Parameters relating to a block read\write that is in progress. Some of these values 166 // Parameters relating to a block read\write that is in progress. Some of these values
167 // are equivalent to values in rDMAInfo. The values here are those in use, while those 167 // are equivalent to values in rDMAInfo. The values here are those in use, while those
168 // in rDMAInfo are those recieved from the 1401 via an escape sequence. If another 168 // in rDMAInfo are those received from the 1401 via an escape sequence. If another
169 // escape sequence arrives before the previous xfer ends, rDMAInfo values are updated while these 169 // escape sequence arrives before the previous xfer ends, rDMAInfo values are updated while these
170 // are used to finish off the current transfer. 170 // are used to finish off the current transfer.
171 volatile short StagedId; // The transfer area id for this transfer 171 volatile short StagedId; // The transfer area id for this transfer
diff --git a/drivers/staging/ced1401/userspace/use1401.c b/drivers/staging/ced1401/userspace/use1401.c
index d4c63168ea27..38e7c1c82d43 100644
--- a/drivers/staging/ced1401/userspace/use1401.c
+++ b/drivers/staging/ced1401/userspace/use1401.c
@@ -145,7 +145,7 @@
145** You should add a new one of these to keep things tidy for applications. 145** You should add a new one of these to keep things tidy for applications.
146** 146**
147** DRIVERET_MAX (below) specifies the maximum allowed type code from the 147** DRIVERET_MAX (below) specifies the maximum allowed type code from the
148** 1401 driver; I have set this high to accomodate as yet undesigned 1401 148** 1401 driver; I have set this high to accommodate as yet undesigned 1401
149** types. Similarly, as long as the command file names follow the ARM, 149** types. Similarly, as long as the command file names follow the ARM,
150** ARN, ARO sequence, these are calculated by the ExtForType function, so 150** ARN, ARO sequence, these are calculated by the ExtForType function, so
151** you don't need to do anything here either. 151** you don't need to do anything here either.
@@ -160,7 +160,7 @@
160** have broken backwards compatibility. Minor number changes mean that we 160** have broken backwards compatibility. Minor number changes mean that we
161** have added new functionality that does not break backwards compatibility. 161** have added new functionality that does not break backwards compatibility.
162** we starts at 0. Revision changes mean we have fixed something. Each index 162** we starts at 0. Revision changes mean we have fixed something. Each index
163** returns to 0 when a higer one changes. 163** returns to 0 when a higher one changes.
164*/ 164*/
165#define U14LIB_MAJOR 4 165#define U14LIB_MAJOR 4
166#define U14LIB_MINOR 0 166#define U14LIB_MINOR 0
@@ -211,7 +211,7 @@
211 211
212/* 212/*
213** These are the 1401 type codes returned by the driver, they are a slightly 213** These are the 1401 type codes returned by the driver, they are a slightly
214** odd sequence & start for reasons of compatability with the DOS driver. 214** odd sequence & start for reasons of compatibility with the DOS driver.
215** The maximum code value is the upper limit of 1401 device types. 215** The maximum code value is the upper limit of 1401 device types.
216*/ 216*/
217#define DRIVRET_STD 4 // Codes for 1401 types matching driver values 217#define DRIVRET_STD 4 // Codes for 1401 types matching driver values
@@ -2327,7 +2327,7 @@ U14API(short) U14SetTransArea(short hand, WORD wArea, void *pvBuff,
2327 2327
2328/**************************************************************************** 2328/****************************************************************************
2329** U14SetTransferEvent Sets an event for notification of application 2329** U14SetTransferEvent Sets an event for notification of application
2330** wArea The tranfer area index, from 0 to MAXAREAS-1 2330** wArea The transfer area index, from 0 to MAXAREAS-1
2331** bEvent True to create an event, false to remove it 2331** bEvent True to create an event, false to remove it
2332** bToHost Set 0 for notification on to1401 tranfers, 1 for 2332** bToHost Set 0 for notification on to1401 tranfers, 1 for
2333** notification of transfers to the host PC 2333** notification of transfers to the host PC
diff --git a/drivers/staging/comedi/Kconfig b/drivers/staging/comedi/Kconfig
index 2093403af253..7de2a10213bd 100644
--- a/drivers/staging/comedi/Kconfig
+++ b/drivers/staging/comedi/Kconfig
@@ -568,7 +568,6 @@ config COMEDI_8255_PCI
568 568
569config COMEDI_ADDI_APCI_035 569config COMEDI_ADDI_APCI_035
570 tristate "ADDI-DATA APCI_035 support" 570 tristate "ADDI-DATA APCI_035 support"
571 depends on VIRT_TO_BUS
572 ---help--- 571 ---help---
573 Enable support for ADDI-DATA APCI_035 cards 572 Enable support for ADDI-DATA APCI_035 cards
574 573
@@ -577,7 +576,6 @@ config COMEDI_ADDI_APCI_035
577 576
578config COMEDI_ADDI_APCI_1032 577config COMEDI_ADDI_APCI_1032
579 tristate "ADDI-DATA APCI_1032 support" 578 tristate "ADDI-DATA APCI_1032 support"
580 depends on VIRT_TO_BUS
581 ---help--- 579 ---help---
582 Enable support for ADDI-DATA APCI_1032 cards 580 Enable support for ADDI-DATA APCI_1032 cards
583 581
@@ -586,7 +584,6 @@ config COMEDI_ADDI_APCI_1032
586 584
587config COMEDI_ADDI_APCI_1500 585config COMEDI_ADDI_APCI_1500
588 tristate "ADDI-DATA APCI_1500 support" 586 tristate "ADDI-DATA APCI_1500 support"
589 depends on VIRT_TO_BUS
590 ---help--- 587 ---help---
591 Enable support for ADDI-DATA APCI_1500 cards 588 Enable support for ADDI-DATA APCI_1500 cards
592 589
@@ -594,17 +591,17 @@ config COMEDI_ADDI_APCI_1500
594 called addi_apci_1500. 591 called addi_apci_1500.
595 592
596config COMEDI_ADDI_APCI_1516 593config COMEDI_ADDI_APCI_1516
597 tristate "ADDI-DATA APCI_1516 support" 594 tristate "ADDI-DATA APCI-1016/1516/2016 support"
598 depends on VIRT_TO_BUS
599 ---help--- 595 ---help---
600 Enable support for ADDI-DATA APCI_1516 cards 596 Enable support for ADDI-DATA APCI-1016, APCI-1516 and APCI-2016 boards.
597 These are 16 channel, optically isolated, digital I/O boards. The 1516
598 and 2016 boards also have a watchdog for resetting the outputs to "0".
601 599
602 To compile this driver as a module, choose M here: the module will be 600 To compile this driver as a module, choose M here: the module will be
603 called addi_apci_1516. 601 called addi_apci_1516.
604 602
605config COMEDI_ADDI_APCI_1564 603config COMEDI_ADDI_APCI_1564
606 tristate "ADDI-DATA APCI_1564 support" 604 tristate "ADDI-DATA APCI_1564 support"
607 depends on VIRT_TO_BUS
608 ---help--- 605 ---help---
609 Enable support for ADDI-DATA APCI_1564 cards 606 Enable support for ADDI-DATA APCI_1564 cards
610 607
@@ -613,25 +610,14 @@ config COMEDI_ADDI_APCI_1564
613 610
614config COMEDI_ADDI_APCI_16XX 611config COMEDI_ADDI_APCI_16XX
615 tristate "ADDI-DATA APCI_16xx support" 612 tristate "ADDI-DATA APCI_16xx support"
616 depends on VIRT_TO_BUS
617 ---help--- 613 ---help---
618 Enable support for ADDI-DATA APCI_16xx cards 614 Enable support for ADDI-DATA APCI_16xx cards
619 615
620 To compile this driver as a module, choose M here: the module will be 616 To compile this driver as a module, choose M here: the module will be
621 called addi_apci_16xx. 617 called addi_apci_16xx.
622 618
623config COMEDI_ADDI_APCI_2016
624 tristate "ADDI-DATA APCI_2016 support"
625 depends on VIRT_TO_BUS
626 ---help---
627 Enable support for ADDI-DATA APCI_2016 cards
628
629 To compile this driver as a module, choose M here: the module will be
630 called addi_apci_2016.
631
632config COMEDI_ADDI_APCI_2032 619config COMEDI_ADDI_APCI_2032
633 tristate "ADDI-DATA APCI_2032 support" 620 tristate "ADDI-DATA APCI_2032 support"
634 depends on VIRT_TO_BUS
635 ---help--- 621 ---help---
636 Enable support for ADDI-DATA APCI_2032 cards 622 Enable support for ADDI-DATA APCI_2032 cards
637 623
@@ -640,36 +626,24 @@ config COMEDI_ADDI_APCI_2032
640 626
641config COMEDI_ADDI_APCI_2200 627config COMEDI_ADDI_APCI_2200
642 tristate "ADDI-DATA APCI_2200 support" 628 tristate "ADDI-DATA APCI_2200 support"
643 depends on VIRT_TO_BUS
644 ---help--- 629 ---help---
645 Enable support for ADDI-DATA APCI_2200 cards 630 Enable support for ADDI-DATA APCI_2200 cards
646 631
647 To compile this driver as a module, choose M here: the module will be 632 To compile this driver as a module, choose M here: the module will be
648 called addi_apci_2200. 633 called addi_apci_2200.
649 634
650config COMEDI_ADDI_APCI_3001
651 tristate "ADDI-DATA APCI_3001 support"
652 depends on VIRT_TO_BUS
653 select COMEDI_FC
654 ---help---
655 Enable support for ADDI-DATA APCI_3001 cards
656
657 To compile this driver as a module, choose M here: the module will be
658 called addi_apci_3001.
659
660config COMEDI_ADDI_APCI_3120 635config COMEDI_ADDI_APCI_3120
661 tristate "ADDI-DATA APCI_3520 support" 636 tristate "ADDI-DATA APCI_3120/3001 support"
662 depends on VIRT_TO_BUS 637 depends on VIRT_TO_BUS
663 select COMEDI_FC 638 select COMEDI_FC
664 ---help--- 639 ---help---
665 Enable support for ADDI-DATA APCI_3520 cards 640 Enable support for ADDI-DATA APCI_3120/3001 cards
666 641
667 To compile this driver as a module, choose M here: the module will be 642 To compile this driver as a module, choose M here: the module will be
668 called addi_apci_3120. 643 called addi_apci_3120.
669 644
670config COMEDI_ADDI_APCI_3501 645config COMEDI_ADDI_APCI_3501
671 tristate "ADDI-DATA APCI_3501 support" 646 tristate "ADDI-DATA APCI_3501 support"
672 depends on VIRT_TO_BUS
673 ---help--- 647 ---help---
674 Enable support for ADDI-DATA APCI_3501 cards 648 Enable support for ADDI-DATA APCI_3501 cards
675 649
@@ -678,7 +652,6 @@ config COMEDI_ADDI_APCI_3501
678 652
679config COMEDI_ADDI_APCI_3XXX 653config COMEDI_ADDI_APCI_3XXX
680 tristate "ADDI-DATA APCI_3xxx support" 654 tristate "ADDI-DATA APCI_3xxx support"
681 depends on VIRT_TO_BUS
682 ---help--- 655 ---help---
683 Enable support for ADDI-DATA APCI_3xxx cards 656 Enable support for ADDI-DATA APCI_3xxx cards
684 657
@@ -761,10 +734,11 @@ config COMEDI_ADV_PCI_DIO
761 called adv_pci_dio. 734 called adv_pci_dio.
762 735
763config COMEDI_AMPLC_DIO200_PCI 736config COMEDI_AMPLC_DIO200_PCI
764 tristate "Amplicon PCI215 and PCI272 DIO board support" 737 tristate "Amplicon PCI215/PCI272/PCIe215/PCIe236/PCIe296 DIO support"
765 select COMEDI_AMPLC_DIO200 738 select COMEDI_AMPLC_DIO200
766 ---help--- 739 ---help---
767 Enable support for Amplicon PCI215 and PCI272 DIO boards. 740 Enable support for Amplicon PCI215, PCI272, PCIe215, PCIe236
741 and PCIe296 DIO boards.
768 742
769 To compile this driver as a module, choose M here: the module will be 743 To compile this driver as a module, choose M here: the module will be
770 called amplc_dio200. 744 called amplc_dio200.
@@ -1263,7 +1237,6 @@ config COMEDI_FC
1263 1237
1264config COMEDI_AMPLC_DIO200 1238config COMEDI_AMPLC_DIO200
1265 tristate 1239 tristate
1266 select COMEDI_8255
1267 1240
1268config COMEDI_AMPLC_PC236 1241config COMEDI_AMPLC_PC236
1269 tristate 1242 tristate
diff --git a/drivers/staging/comedi/comedi.h b/drivers/staging/comedi/comedi.h
index 133f013e0f6d..c8a8ca126127 100644
--- a/drivers/staging/comedi/comedi.h
+++ b/drivers/staging/comedi/comedi.h
@@ -283,6 +283,44 @@ enum configuration_ids {
283 INSN_CONFIG_PWM_GET_H_BRIDGE = 5004 283 INSN_CONFIG_PWM_GET_H_BRIDGE = 5004
284}; 284};
285 285
286/*
287 * Settings for INSN_CONFIG_DIGITAL_TRIG:
288 * data[0] = INSN_CONFIG_DIGITAL_TRIG
289 * data[1] = trigger ID
290 * data[2] = configuration operation
291 * data[3] = configuration parameter 1
292 * data[4] = configuration parameter 2
293 * data[5] = configuration parameter 3
294 *
295 * operation parameter 1 parameter 2 parameter 3
296 * --------------------------------- ----------- ----------- -----------
297 * COMEDI_DIGITAL_TRIG_DISABLE
298 * COMEDI_DIGITAL_TRIG_ENABLE_EDGES left-shift rising-edges falling-edges
299 * COMEDI_DIGITAL_TRIG_ENABLE_LEVELS left-shift high-levels low-levels
300 *
301 * COMEDI_DIGITAL_TRIG_DISABLE returns the trigger to its default, inactive,
302 * unconfigured state.
303 *
304 * COMEDI_DIGITAL_TRIG_ENABLE_EDGES sets the rising and/or falling edge inputs
305 * that each can fire the trigger.
306 *
307 * COMEDI_DIGITAL_TRIG_ENABLE_LEVELS sets a combination of high and/or low
308 * level inputs that can fire the trigger.
309 *
310 * "left-shift" is useful if the trigger has more than 32 inputs to specify the
311 * first input for this configuration.
312 *
313 * Some sequences of INSN_CONFIG_DIGITAL_TRIG instructions may have a (partly)
314 * accumulative effect, depending on the low-level driver. This is useful
315 * when setting up a trigger that has more than 32 inputs or has a combination
316 * of edge and level triggered inputs.
317 */
318enum comedi_digital_trig_op {
319 COMEDI_DIGITAL_TRIG_DISABLE = 0,
320 COMEDI_DIGITAL_TRIG_ENABLE_EDGES = 1,
321 COMEDI_DIGITAL_TRIG_ENABLE_LEVELS = 2
322};
323
286enum comedi_io_direction { 324enum comedi_io_direction {
287 COMEDI_INPUT = 0, 325 COMEDI_INPUT = 0,
288 COMEDI_OUTPUT = 1, 326 COMEDI_OUTPUT = 1,
@@ -888,7 +926,20 @@ enum amplc_dio_clock_source {
888 subdevice, preceding counter 926 subdevice, preceding counter
889 subdevice is the last counter 927 subdevice is the last counter
890 subdevice) */ 928 subdevice) */
891 AMPLC_DIO_CLK_EXT /* per chip external input pin */ 929 AMPLC_DIO_CLK_EXT, /* per chip external input pin */
930 /* the following are "enhanced" clock sources for PCIe models */
931 AMPLC_DIO_CLK_VCC, /* clock input HIGH */
932 AMPLC_DIO_CLK_GND, /* clock input LOW */
933 AMPLC_DIO_CLK_PAT_PRESENT, /* "pattern present" signal */
934 AMPLC_DIO_CLK_20MHZ /* 20 MHz internal clock */
935};
936
937/* Values for setting a clock source with INSN_CONFIG_SET_CLOCK_SRC for
938 * timer subdevice on some Amplicon DIO PCIe boards (amplc_dio200 driver). */
939enum amplc_dio_ts_clock_src {
940 AMPLC_DIO_TS_CLK_1GHZ, /* 1 ns period with 20 ns granularity */
941 AMPLC_DIO_TS_CLK_1MHZ, /* 1 us period */
942 AMPLC_DIO_TS_CLK_1KHZ /* 1 ms period */
892}; 943};
893 944
894/* Values for setting a gate source with INSN_CONFIG_SET_GATE_SRC for 945/* Values for setting a gate source with INSN_CONFIG_SET_GATE_SRC for
@@ -907,7 +958,17 @@ enum amplc_dio_gate_source {
907 AMPLC_DIO_GAT_RESERVED4, 958 AMPLC_DIO_GAT_RESERVED4,
908 AMPLC_DIO_GAT_RESERVED5, 959 AMPLC_DIO_GAT_RESERVED5,
909 AMPLC_DIO_GAT_RESERVED6, 960 AMPLC_DIO_GAT_RESERVED6,
910 AMPLC_DIO_GAT_RESERVED7 961 AMPLC_DIO_GAT_RESERVED7,
962 /* the following are "enhanced" gate sources for PCIe models */
963 AMPLC_DIO_GAT_NGATN = 6, /* negated per channel gate input */
964 AMPLC_DIO_GAT_OUTNM2, /* non-negated output of counter
965 channel minus 2 */
966 AMPLC_DIO_GAT_PAT_PRESENT, /* "pattern present" signal */
967 AMPLC_DIO_GAT_PAT_OCCURRED, /* "pattern occurred" latched */
968 AMPLC_DIO_GAT_PAT_GONE, /* "pattern gone away" latched */
969 AMPLC_DIO_GAT_NPAT_PRESENT, /* negated "pattern present" */
970 AMPLC_DIO_GAT_NPAT_OCCURRED, /* negated "pattern occurred" */
971 AMPLC_DIO_GAT_NPAT_GONE /* negated "pattern gone away" */
911}; 972};
912 973
913#endif /* _COMEDI_H */ 974#endif /* _COMEDI_H */
diff --git a/drivers/staging/comedi/comedi_compat32.c b/drivers/staging/comedi/comedi_compat32.c
index 0a5057f0919b..4b7cbfad1d74 100644
--- a/drivers/staging/comedi/comedi_compat32.c
+++ b/drivers/staging/comedi/comedi_compat32.c
@@ -24,7 +24,6 @@
24 24
25*/ 25*/
26 26
27#define __NO_VERSION__
28#include <linux/uaccess.h> 27#include <linux/uaccess.h>
29#include <linux/compat.h> 28#include <linux/compat.h>
30#include <linux/fs.h> 29#include <linux/fs.h>
diff --git a/drivers/staging/comedi/comedi_fops.c b/drivers/staging/comedi/comedi_fops.c
index c2a32cf95a82..b7bba1790a20 100644
--- a/drivers/staging/comedi/comedi_fops.c
+++ b/drivers/staging/comedi/comedi_fops.c
@@ -23,7 +23,6 @@
23 23
24#undef DEBUG 24#undef DEBUG
25 25
26#define __NO_VERSION__
27#include "comedi_compat32.h" 26#include "comedi_compat32.h"
28 27
29#include <linux/module.h> 28#include <linux/module.h>
@@ -880,6 +879,10 @@ static int check_insn_config_length(struct comedi_insn *insn,
880 if (insn->n == 5) 879 if (insn->n == 5)
881 return 0; 880 return 0;
882 break; 881 break;
882 case INSN_CONFIG_DIGITAL_TRIG:
883 if (insn->n == 6)
884 return 0;
885 break;
883 /* by default we allow the insn since we don't have checks for 886 /* by default we allow the insn since we don't have checks for
884 * all possible cases yet */ 887 * all possible cases yet */
885 default: 888 default:
diff --git a/drivers/staging/comedi/comedidev.h b/drivers/staging/comedi/comedidev.h
index cb67a5cb9c82..692e1e615d44 100644
--- a/drivers/staging/comedi/comedidev.h
+++ b/drivers/staging/comedi/comedidev.h
@@ -41,6 +41,7 @@
41#include <linux/io.h> 41#include <linux/io.h>
42#include <linux/timer.h> 42#include <linux/timer.h>
43#include <linux/pci.h> 43#include <linux/pci.h>
44#include <linux/usb.h>
44 45
45#include "comedi.h" 46#include "comedi.h"
46 47
@@ -54,9 +55,21 @@
54 COMEDI_MINORVERSION, COMEDI_MICROVERSION) 55 COMEDI_MINORVERSION, COMEDI_MICROVERSION)
55#define COMEDI_RELEASE VERSION 56#define COMEDI_RELEASE VERSION
56 57
57#define PCI_VENDOR_ID_ADLINK 0x144a 58/*
59 * PCI Vendor IDs not in <linux/pci_ids.h>
60 */
61#define PCI_VENDOR_ID_KOLTER 0x1001
58#define PCI_VENDOR_ID_ICP 0x104c 62#define PCI_VENDOR_ID_ICP 0x104c
63#define PCI_VENDOR_ID_AMCC 0x10e8
64#define PCI_VENDOR_ID_DT 0x1116
65#define PCI_VENDOR_ID_IOTECH 0x1616
59#define PCI_VENDOR_ID_CONTEC 0x1221 66#define PCI_VENDOR_ID_CONTEC 0x1221
67#define PCI_VENDOR_ID_CB 0x1307 /* Measurement Computing */
68#define PCI_VENDOR_ID_ADVANTECH 0x13fe
69#define PCI_VENDOR_ID_MEILHAUS 0x1402
70#define PCI_VENDOR_ID_RTD 0x1435
71#define PCI_VENDOR_ID_ADLINK 0x144a
72#define PCI_VENDOR_ID_AMPLICON 0x14dc
60 73
61#define COMEDI_NUM_MINORS 0x100 74#define COMEDI_NUM_MINORS 0x100
62#define COMEDI_NUM_BOARD_MINORS 0x30 75#define COMEDI_NUM_BOARD_MINORS 0x30
@@ -181,8 +194,6 @@ struct comedi_async {
181 unsigned int x); 194 unsigned int x);
182}; 195};
183 196
184struct usb_interface;
185
186struct comedi_driver { 197struct comedi_driver {
187 struct comedi_driver *next; 198 struct comedi_driver *next;
188 199
@@ -190,8 +201,7 @@ struct comedi_driver {
190 struct module *module; 201 struct module *module;
191 int (*attach) (struct comedi_device *, struct comedi_devconfig *); 202 int (*attach) (struct comedi_device *, struct comedi_devconfig *);
192 void (*detach) (struct comedi_device *); 203 void (*detach) (struct comedi_device *);
193 int (*attach_pci) (struct comedi_device *, struct pci_dev *); 204 int (*auto_attach) (struct comedi_device *, unsigned long);
194 int (*attach_usb) (struct comedi_device *, struct usb_interface *);
195 205
196 /* number of elements in board_name and board_id arrays */ 206 /* number of elements in board_name and board_id arrays */
197 unsigned int num_names; 207 unsigned int num_names;
@@ -235,7 +245,7 @@ struct comedi_device {
235 void (*close) (struct comedi_device *dev); 245 void (*close) (struct comedi_device *dev);
236}; 246};
237 247
238static inline const void *comedi_board(struct comedi_device *dev) 248static inline const void *comedi_board(const struct comedi_device *dev)
239{ 249{
240 return dev->board_ptr; 250 return dev->board_ptr;
241} 251}
@@ -415,14 +425,6 @@ struct comedi_lrange {
415 425
416/* some silly little inline functions */ 426/* some silly little inline functions */
417 427
418static inline int alloc_private(struct comedi_device *dev, int size)
419{
420 dev->private = kzalloc(size, GFP_KERNEL);
421 if (!dev->private)
422 return -ENOMEM;
423 return 0;
424}
425
426static inline unsigned int bytes_per_sample(const struct comedi_subdevice *subd) 428static inline unsigned int bytes_per_sample(const struct comedi_subdevice *subd)
427{ 429{
428 if (subd->subdev_flags & SDF_LSAMPL) 430 if (subd->subdev_flags & SDF_LSAMPL)
@@ -436,9 +438,10 @@ into comedi's buffer */
436static inline void comedi_set_hw_dev(struct comedi_device *dev, 438static inline void comedi_set_hw_dev(struct comedi_device *dev,
437 struct device *hw_dev) 439 struct device *hw_dev)
438{ 440{
441 if (dev->hw_dev == hw_dev)
442 return;
439 if (dev->hw_dev) 443 if (dev->hw_dev)
440 put_device(dev->hw_dev); 444 put_device(dev->hw_dev);
441
442 dev->hw_dev = hw_dev; 445 dev->hw_dev = hw_dev;
443 if (dev->hw_dev) { 446 if (dev->hw_dev) {
444 dev->hw_dev = get_device(dev->hw_dev); 447 dev->hw_dev = get_device(dev->hw_dev);
@@ -451,6 +454,12 @@ static inline struct pci_dev *comedi_to_pci_dev(struct comedi_device *dev)
451 return dev->hw_dev ? to_pci_dev(dev->hw_dev) : NULL; 454 return dev->hw_dev ? to_pci_dev(dev->hw_dev) : NULL;
452} 455}
453 456
457static inline struct usb_interface *
458comedi_to_usb_interface(struct comedi_device *dev)
459{
460 return dev->hw_dev ? to_usb_interface(dev->hw_dev) : NULL;
461}
462
454int comedi_buf_put(struct comedi_async *async, short x); 463int comedi_buf_put(struct comedi_async *async, short x);
455int comedi_buf_get(struct comedi_async *async, short *x); 464int comedi_buf_get(struct comedi_async *async, short *x);
456 465
@@ -505,11 +514,30 @@ static inline void *comedi_aux_data(int options[], int n)
505int comedi_alloc_subdevice_minor(struct comedi_device *dev, 514int comedi_alloc_subdevice_minor(struct comedi_device *dev,
506 struct comedi_subdevice *s); 515 struct comedi_subdevice *s);
507void comedi_free_subdevice_minor(struct comedi_subdevice *s); 516void comedi_free_subdevice_minor(struct comedi_subdevice *s);
508int comedi_pci_auto_config(struct pci_dev *pcidev, 517int comedi_auto_config(struct device *hardware_device,
509 struct comedi_driver *driver); 518 struct comedi_driver *driver, unsigned long context);
510void comedi_pci_auto_unconfig(struct pci_dev *pcidev); 519void comedi_auto_unconfig(struct device *hardware_device);
511int comedi_usb_auto_config(struct usb_interface *intf, 520
512 struct comedi_driver *driver); 521static inline int comedi_pci_auto_config(struct pci_dev *pcidev,
513void comedi_usb_auto_unconfig(struct usb_interface *intf); 522 struct comedi_driver *driver)
523{
524 return comedi_auto_config(&pcidev->dev, driver, 0);
525}
526
527static inline void comedi_pci_auto_unconfig(struct pci_dev *pcidev)
528{
529 comedi_auto_unconfig(&pcidev->dev);
530}
531
532static inline int comedi_usb_auto_config(struct usb_interface *intf,
533 struct comedi_driver *driver)
534{
535 return comedi_auto_config(&intf->dev, driver, 0);
536}
537
538static inline void comedi_usb_auto_unconfig(struct usb_interface *intf)
539{
540 comedi_auto_unconfig(&intf->dev);
541}
514 542
515#endif /* _COMEDIDEV_H */ 543#endif /* _COMEDIDEV_H */
diff --git a/drivers/staging/comedi/drivers.c b/drivers/staging/comedi/drivers.c
index 1db6bfdbf13b..50cf498698e2 100644
--- a/drivers/staging/comedi/drivers.c
+++ b/drivers/staging/comedi/drivers.c
@@ -21,9 +21,6 @@
21 21
22*/ 22*/
23 23
24#define _GNU_SOURCE
25
26#define __NO_VERSION__
27#include <linux/device.h> 24#include <linux/device.h>
28#include <linux/module.h> 25#include <linux/module.h>
29#include <linux/pci.h> 26#include <linux/pci.h>
@@ -833,11 +830,8 @@ void comedi_reset_async_buf(struct comedi_async *async)
833 async->events = 0; 830 async->events = 0;
834} 831}
835 832
836static int 833int comedi_auto_config(struct device *hardware_device,
837comedi_auto_config_helper(struct device *hardware_device, 834 struct comedi_driver *driver, unsigned long context)
838 struct comedi_driver *driver,
839 int (*attach_wrapper) (struct comedi_device *,
840 void *), void *context)
841{ 835{
842 int minor; 836 int minor;
843 struct comedi_device_file_info *dev_file_info; 837 struct comedi_device_file_info *dev_file_info;
@@ -847,6 +841,13 @@ comedi_auto_config_helper(struct device *hardware_device,
847 if (!comedi_autoconfig) 841 if (!comedi_autoconfig)
848 return 0; 842 return 0;
849 843
844 if (!driver->auto_attach) {
845 dev_warn(hardware_device,
846 "BUG! comedi driver '%s' has no auto_attach handler\n",
847 driver->driver_name);
848 return -EINVAL;
849 }
850
850 minor = comedi_alloc_board_minor(hardware_device); 851 minor = comedi_alloc_board_minor(hardware_device);
851 if (minor < 0) 852 if (minor < 0)
852 return minor; 853 return minor;
@@ -860,9 +861,9 @@ comedi_auto_config_helper(struct device *hardware_device,
860 else if (!try_module_get(driver->module)) 861 else if (!try_module_get(driver->module))
861 ret = -EIO; 862 ret = -EIO;
862 else { 863 else {
863 /* set comedi_dev->driver here for attach wrapper */ 864 comedi_set_hw_dev(comedi_dev, hardware_device);
864 comedi_dev->driver = driver; 865 comedi_dev->driver = driver;
865 ret = (*attach_wrapper)(comedi_dev, context); 866 ret = driver->auto_attach(comedi_dev, context);
866 if (ret < 0) { 867 if (ret < 0) {
867 module_put(driver->module); 868 module_put(driver->module);
868 __comedi_device_detach(comedi_dev); 869 __comedi_device_detach(comedi_dev);
@@ -876,49 +877,9 @@ comedi_auto_config_helper(struct device *hardware_device,
876 comedi_free_board_minor(minor); 877 comedi_free_board_minor(minor);
877 return ret; 878 return ret;
878} 879}
880EXPORT_SYMBOL_GPL(comedi_auto_config);
879 881
880static int comedi_auto_config_wrapper(struct comedi_device *dev, void *context) 882void comedi_auto_unconfig(struct device *hardware_device)
881{
882 struct comedi_devconfig *it = context;
883 struct comedi_driver *driv = dev->driver;
884
885 if (driv->num_names) {
886 /* look for generic board entry matching driver name, which
887 * has already been copied to it->board_name */
888 dev->board_ptr = comedi_recognize(driv, it->board_name);
889 if (dev->board_ptr == NULL) {
890 dev_warn(dev->class_dev,
891 "auto config failed to find board entry '%s' for driver '%s'\n",
892 it->board_name, driv->driver_name);
893 comedi_report_boards(driv);
894 return -EINVAL;
895 }
896 }
897 if (!driv->attach) {
898 dev_warn(dev->class_dev,
899 "BUG! driver '%s' using old-style auto config but has no attach handler\n",
900 driv->driver_name);
901 return -EINVAL;
902 }
903 return driv->attach(dev, it);
904}
905
906static int comedi_auto_config(struct device *hardware_device,
907 struct comedi_driver *driver, const int *options,
908 unsigned num_options)
909{
910 struct comedi_devconfig it;
911
912 memset(&it, 0, sizeof(it));
913 strncpy(it.board_name, driver->driver_name, COMEDI_NAMELEN);
914 it.board_name[COMEDI_NAMELEN - 1] = '\0';
915 BUG_ON(num_options > COMEDI_NDEVCONFOPTS);
916 memcpy(it.options, options, num_options * sizeof(int));
917 return comedi_auto_config_helper(hardware_device, driver,
918 comedi_auto_config_wrapper, &it);
919}
920
921static void comedi_auto_unconfig(struct device *hardware_device)
922{ 883{
923 int minor; 884 int minor;
924 885
@@ -930,6 +891,7 @@ static void comedi_auto_unconfig(struct device *hardware_device)
930 BUG_ON(minor >= COMEDI_NUM_BOARD_MINORS); 891 BUG_ON(minor >= COMEDI_NUM_BOARD_MINORS);
931 comedi_free_board_minor(minor); 892 comedi_free_board_minor(minor);
932} 893}
894EXPORT_SYMBOL_GPL(comedi_auto_unconfig);
933 895
934/** 896/**
935 * comedi_pci_enable() - Enable the PCI device and request the regions. 897 * comedi_pci_enable() - Enable the PCI device and request the regions.
@@ -965,48 +927,6 @@ void comedi_pci_disable(struct pci_dev *pdev)
965} 927}
966EXPORT_SYMBOL_GPL(comedi_pci_disable); 928EXPORT_SYMBOL_GPL(comedi_pci_disable);
967 929
968static int comedi_old_pci_auto_config(struct pci_dev *pcidev,
969 struct comedi_driver *driver)
970{
971 int options[2];
972
973 /* pci bus */
974 options[0] = pcidev->bus->number;
975 /* pci slot */
976 options[1] = PCI_SLOT(pcidev->devfn);
977
978 return comedi_auto_config(&pcidev->dev, driver,
979 options, ARRAY_SIZE(options));
980}
981
982static int comedi_pci_attach_wrapper(struct comedi_device *dev, void *pcidev)
983{
984 return dev->driver->attach_pci(dev, pcidev);
985}
986
987static int comedi_new_pci_auto_config(struct pci_dev *pcidev,
988 struct comedi_driver *driver)
989{
990 return comedi_auto_config_helper(&pcidev->dev, driver,
991 comedi_pci_attach_wrapper, pcidev);
992}
993
994int comedi_pci_auto_config(struct pci_dev *pcidev, struct comedi_driver *driver)
995{
996
997 if (driver->attach_pci)
998 return comedi_new_pci_auto_config(pcidev, driver);
999 else
1000 return comedi_old_pci_auto_config(pcidev, driver);
1001}
1002EXPORT_SYMBOL_GPL(comedi_pci_auto_config);
1003
1004void comedi_pci_auto_unconfig(struct pci_dev *pcidev)
1005{
1006 comedi_auto_unconfig(&pcidev->dev);
1007}
1008EXPORT_SYMBOL_GPL(comedi_pci_auto_unconfig);
1009
1010int comedi_pci_driver_register(struct comedi_driver *comedi_driver, 930int comedi_pci_driver_register(struct comedi_driver *comedi_driver,
1011 struct pci_driver *pci_driver) 931 struct pci_driver *pci_driver)
1012{ 932{
@@ -1040,42 +960,6 @@ EXPORT_SYMBOL_GPL(comedi_pci_driver_unregister);
1040 960
1041#if IS_ENABLED(CONFIG_USB) 961#if IS_ENABLED(CONFIG_USB)
1042 962
1043static int comedi_old_usb_auto_config(struct usb_interface *intf,
1044 struct comedi_driver *driver)
1045{
1046 return comedi_auto_config(&intf->dev, driver, NULL, 0);
1047}
1048
1049static int comedi_usb_attach_wrapper(struct comedi_device *dev, void *intf)
1050{
1051 return dev->driver->attach_usb(dev, intf);
1052}
1053
1054static int comedi_new_usb_auto_config(struct usb_interface *intf,
1055 struct comedi_driver *driver)
1056{
1057 return comedi_auto_config_helper(&intf->dev, driver,
1058 comedi_usb_attach_wrapper, intf);
1059}
1060
1061int comedi_usb_auto_config(struct usb_interface *intf,
1062 struct comedi_driver *driver)
1063{
1064 BUG_ON(intf == NULL);
1065 if (driver->attach_usb)
1066 return comedi_new_usb_auto_config(intf, driver);
1067 else
1068 return comedi_old_usb_auto_config(intf, driver);
1069}
1070EXPORT_SYMBOL_GPL(comedi_usb_auto_config);
1071
1072void comedi_usb_auto_unconfig(struct usb_interface *intf)
1073{
1074 BUG_ON(intf == NULL);
1075 comedi_auto_unconfig(&intf->dev);
1076}
1077EXPORT_SYMBOL_GPL(comedi_usb_auto_unconfig);
1078
1079int comedi_usb_driver_register(struct comedi_driver *comedi_driver, 963int comedi_usb_driver_register(struct comedi_driver *comedi_driver,
1080 struct usb_driver *usb_driver) 964 struct usb_driver *usb_driver)
1081{ 965{
diff --git a/drivers/staging/comedi/drivers/8255.c b/drivers/staging/comedi/drivers/8255.c
index a256622e2dd7..c7aa41ad842f 100644
--- a/drivers/staging/comedi/drivers/8255.c
+++ b/drivers/staging/comedi/drivers/8255.c
@@ -249,28 +249,13 @@ static int subdev_8255_cmdtest(struct comedi_device *dev,
249 if (err) 249 if (err)
250 return 2; 250 return 2;
251 251
252 /* step 3 */ 252 /* Step 3: check if arguments are trivially valid */
253 253
254 if (cmd->start_arg != 0) { 254 err |= cfc_check_trigger_arg_is(&cmd->start_arg, 0);
255 cmd->start_arg = 0; 255 err |= cfc_check_trigger_arg_is(&cmd->scan_begin_arg, 0);
256 err++; 256 err |= cfc_check_trigger_arg_is(&cmd->convert_arg, 0);
257 } 257 err |= cfc_check_trigger_arg_is(&cmd->scan_end_arg, 1);
258 if (cmd->scan_begin_arg != 0) { 258 err |= cfc_check_trigger_arg_is(&cmd->stop_arg, 0);
259 cmd->scan_begin_arg = 0;
260 err++;
261 }
262 if (cmd->convert_arg != 0) {
263 cmd->convert_arg = 0;
264 err++;
265 }
266 if (cmd->scan_end_arg != 1) {
267 cmd->scan_end_arg = 1;
268 err++;
269 }
270 if (cmd->stop_arg != 0) {
271 cmd->stop_arg = 0;
272 err++;
273 }
274 259
275 if (err) 260 if (err)
276 return 3; 261 return 3;
diff --git a/drivers/staging/comedi/drivers/8255_pci.c b/drivers/staging/comedi/drivers/8255_pci.c
index d00aff6671df..e0a79521f35a 100644
--- a/drivers/staging/comedi/drivers/8255_pci.c
+++ b/drivers/staging/comedi/drivers/8255_pci.c
@@ -65,9 +65,6 @@ Configuration Options: not applicable, uses PCI auto config
65#define PCI_DEVICE_ID_ADLINK_PCI7248 0x7248 65#define PCI_DEVICE_ID_ADLINK_PCI7248 0x7248
66#define PCI_DEVICE_ID_ADLINK_PCI7296 0x7296 66#define PCI_DEVICE_ID_ADLINK_PCI7296 0x7296
67 67
68/* ComputerBoards is now known as Measurement Computing */
69#define PCI_VENDOR_ID_CB 0x1307
70
71#define PCI_DEVICE_ID_CB_PCIDIO48H 0x000b 68#define PCI_DEVICE_ID_CB_PCIDIO48H 0x000b
72#define PCI_DEVICE_ID_CB_PCIDIO24H 0x0014 69#define PCI_DEVICE_ID_CB_PCIDIO24H 0x0014
73#define PCI_DEVICE_ID_CB_PCIDIO96H 0x0017 70#define PCI_DEVICE_ID_CB_PCIDIO96H 0x0017
@@ -216,9 +213,10 @@ static const void *pci_8255_find_boardinfo(struct comedi_device *dev,
216 return NULL; 213 return NULL;
217} 214}
218 215
219static int pci_8255_attach_pci(struct comedi_device *dev, 216static int pci_8255_auto_attach(struct comedi_device *dev,
220 struct pci_dev *pcidev) 217 unsigned long context_unused)
221{ 218{
219 struct pci_dev *pcidev = comedi_to_pci_dev(dev);
222 const struct pci_8255_boardinfo *board; 220 const struct pci_8255_boardinfo *board;
223 struct pci_8255_private *devpriv; 221 struct pci_8255_private *devpriv;
224 struct comedi_subdevice *s; 222 struct comedi_subdevice *s;
@@ -227,18 +225,16 @@ static int pci_8255_attach_pci(struct comedi_device *dev,
227 int ret; 225 int ret;
228 int i; 226 int i;
229 227
230 comedi_set_hw_dev(dev, &pcidev->dev);
231
232 board = pci_8255_find_boardinfo(dev, pcidev); 228 board = pci_8255_find_boardinfo(dev, pcidev);
233 if (!board) 229 if (!board)
234 return -ENODEV; 230 return -ENODEV;
235 dev->board_ptr = board; 231 dev->board_ptr = board;
236 dev->board_name = board->name; 232 dev->board_name = board->name;
237 233
238 ret = alloc_private(dev, sizeof(*devpriv)); 234 devpriv = kzalloc(sizeof(*devpriv), GFP_KERNEL);
239 if (ret < 0) 235 if (!devpriv)
240 return ret; 236 return -ENOMEM;
241 devpriv = dev->private; 237 dev->private = devpriv;
242 238
243 ret = comedi_pci_enable(pcidev, dev->board_name); 239 ret = comedi_pci_enable(pcidev, dev->board_name);
244 if (ret) 240 if (ret)
@@ -308,17 +304,17 @@ static void pci_8255_detach(struct comedi_device *dev)
308static struct comedi_driver pci_8255_driver = { 304static struct comedi_driver pci_8255_driver = {
309 .driver_name = "8255_pci", 305 .driver_name = "8255_pci",
310 .module = THIS_MODULE, 306 .module = THIS_MODULE,
311 .attach_pci = pci_8255_attach_pci, 307 .auto_attach = pci_8255_auto_attach,
312 .detach = pci_8255_detach, 308 .detach = pci_8255_detach,
313}; 309};
314 310
315static int __devinit pci_8255_pci_probe(struct pci_dev *dev, 311static int pci_8255_pci_probe(struct pci_dev *dev,
316 const struct pci_device_id *ent) 312 const struct pci_device_id *ent)
317{ 313{
318 return comedi_pci_auto_config(dev, &pci_8255_driver); 314 return comedi_pci_auto_config(dev, &pci_8255_driver);
319} 315}
320 316
321static void __devexit pci_8255_pci_remove(struct pci_dev *dev) 317static void pci_8255_pci_remove(struct pci_dev *dev)
322{ 318{
323 comedi_pci_auto_unconfig(dev); 319 comedi_pci_auto_unconfig(dev);
324} 320}
@@ -346,7 +342,7 @@ static struct pci_driver pci_8255_pci_driver = {
346 .name = "8255_pci", 342 .name = "8255_pci",
347 .id_table = pci_8255_pci_table, 343 .id_table = pci_8255_pci_table,
348 .probe = pci_8255_pci_probe, 344 .probe = pci_8255_pci_probe,
349 .remove = __devexit_p(pci_8255_pci_remove), 345 .remove = pci_8255_pci_remove,
350}; 346};
351module_comedi_pci_driver(pci_8255_driver, pci_8255_pci_driver); 347module_comedi_pci_driver(pci_8255_driver, pci_8255_pci_driver);
352 348
diff --git a/drivers/staging/comedi/drivers/Makefile b/drivers/staging/comedi/drivers/Makefile
index a2787c0ca327..0de4d2eb76fc 100644
--- a/drivers/staging/comedi/drivers/Makefile
+++ b/drivers/staging/comedi/drivers/Makefile
@@ -62,10 +62,8 @@ obj-$(CONFIG_COMEDI_ADDI_APCI_1500) += addi_apci_1500.o
62obj-$(CONFIG_COMEDI_ADDI_APCI_1516) += addi_apci_1516.o 62obj-$(CONFIG_COMEDI_ADDI_APCI_1516) += addi_apci_1516.o
63obj-$(CONFIG_COMEDI_ADDI_APCI_1564) += addi_apci_1564.o 63obj-$(CONFIG_COMEDI_ADDI_APCI_1564) += addi_apci_1564.o
64obj-$(CONFIG_COMEDI_ADDI_APCI_16XX) += addi_apci_16xx.o 64obj-$(CONFIG_COMEDI_ADDI_APCI_16XX) += addi_apci_16xx.o
65obj-$(CONFIG_COMEDI_ADDI_APCI_2016) += addi_apci_2016.o
66obj-$(CONFIG_COMEDI_ADDI_APCI_2032) += addi_apci_2032.o 65obj-$(CONFIG_COMEDI_ADDI_APCI_2032) += addi_apci_2032.o
67obj-$(CONFIG_COMEDI_ADDI_APCI_2200) += addi_apci_2200.o 66obj-$(CONFIG_COMEDI_ADDI_APCI_2200) += addi_apci_2200.o
68obj-$(CONFIG_COMEDI_ADDI_APCI_3001) += addi_apci_3001.o
69obj-$(CONFIG_COMEDI_ADDI_APCI_3120) += addi_apci_3120.o 67obj-$(CONFIG_COMEDI_ADDI_APCI_3120) += addi_apci_3120.o
70obj-$(CONFIG_COMEDI_ADDI_APCI_3501) += addi_apci_3501.o 68obj-$(CONFIG_COMEDI_ADDI_APCI_3501) += addi_apci_3501.o
71obj-$(CONFIG_COMEDI_ADDI_APCI_3XXX) += addi_apci_3xxx.o 69obj-$(CONFIG_COMEDI_ADDI_APCI_3XXX) += addi_apci_3xxx.o
diff --git a/drivers/staging/comedi/drivers/addi-data/APCI1710_82x54.c b/drivers/staging/comedi/drivers/addi-data/APCI1710_82x54.c
index b59f2d484fd9..d0702084caa2 100644
--- a/drivers/staging/comedi/drivers/addi-data/APCI1710_82x54.c
+++ b/drivers/staging/comedi/drivers/addi-data/APCI1710_82x54.c
@@ -18,7 +18,19 @@
18 | Description : APCI-1710 82X54 timer module | 18 | Description : APCI-1710 82X54 timer module |
19*/ 19*/
20 20
21#include "APCI1710_82x54.h" 21#define APCI1710_PCI_BUS_CLOCK 0
22#define APCI1710_FRONT_CONNECTOR_INPUT 1
23#define APCI1710_TIMER_READVALUE 0
24#define APCI1710_TIMER_GETOUTPUTLEVEL 1
25#define APCI1710_TIMER_GETPROGRESSSTATUS 2
26#define APCI1710_TIMER_WRITEVALUE 3
27
28#define APCI1710_TIMER_READINTERRUPT 1
29#define APCI1710_TIMER_READALLTIMER 2
30
31#ifndef APCI1710_10MHZ
32#define APCI1710_10MHZ 10
33#endif
22 34
23/* 35/*
24+----------------------------------------------------------------------------+ 36+----------------------------------------------------------------------------+
@@ -218,11 +230,12 @@ int i_InsnConfig_InitTimer(struct comedi_device *dev,struct comedi_subdevice *s,
218| -9: Selection from hardware gate level is wrong | 230| -9: Selection from hardware gate level is wrong |
219+----------------------------------------------------------------------------+ 231+----------------------------------------------------------------------------+
220*/ 232*/
221 233static int i_APCI1710_InsnConfigInitTimer(struct comedi_device *dev,
222int i_APCI1710_InsnConfigInitTimer(struct comedi_device *dev, struct comedi_subdevice *s, 234 struct comedi_subdevice *s,
223 struct comedi_insn *insn, unsigned int *data) 235 struct comedi_insn *insn,
236 unsigned int *data)
224{ 237{
225 238 struct addi_private *devpriv = dev->private;
226 int i_ReturnValue = 0; 239 int i_ReturnValue = 0;
227 unsigned char b_ModulNbr; 240 unsigned char b_ModulNbr;
228 unsigned char b_TimerNbr; 241 unsigned char b_TimerNbr;
@@ -447,11 +460,12 @@ i_ReturnValue=insn->n;
447| See function "i_APCI1710_SetBoardIntRoutineX" | 460| See function "i_APCI1710_SetBoardIntRoutineX" |
448+----------------------------------------------------------------------------+ 461+----------------------------------------------------------------------------+
449*/ 462*/
450 463static int i_APCI1710_InsnWriteEnableDisableTimer(struct comedi_device *dev,
451int i_APCI1710_InsnWriteEnableDisableTimer(struct comedi_device *dev, 464 struct comedi_subdevice *s,
452 struct comedi_subdevice *s, 465 struct comedi_insn *insn,
453 struct comedi_insn *insn, unsigned int *data) 466 unsigned int *data)
454{ 467{
468 struct addi_private *devpriv = dev->private;
455 int i_ReturnValue = 0; 469 int i_ReturnValue = 0;
456 unsigned int dw_DummyRead; 470 unsigned int dw_DummyRead;
457 unsigned char b_ModulNbr; 471 unsigned char b_ModulNbr;
@@ -589,10 +603,12 @@ int i_APCI1710_InsnReadAllTimerValue(struct comedi_device *dev,struct comedi_sub
589| "i_APCI1710_InitTimer" | 603| "i_APCI1710_InitTimer" |
590+----------------------------------------------------------------------------+ 604+----------------------------------------------------------------------------+
591*/ 605*/
592 606static int i_APCI1710_InsnReadAllTimerValue(struct comedi_device *dev,
593int i_APCI1710_InsnReadAllTimerValue(struct comedi_device *dev, struct comedi_subdevice *s, 607 struct comedi_subdevice *s,
594 struct comedi_insn *insn, unsigned int *data) 608 struct comedi_insn *insn,
609 unsigned int *data)
595{ 610{
611 struct addi_private *devpriv = dev->private;
596 int i_ReturnValue = 0; 612 int i_ReturnValue = 0;
597 unsigned char b_ModulNbr, b_ReadType; 613 unsigned char b_ModulNbr, b_ReadType;
598 unsigned int *pul_TimerValueArray; 614 unsigned int *pul_TimerValueArray;
@@ -668,70 +684,6 @@ int i_APCI1710_InsnReadAllTimerValue(struct comedi_device *dev, struct comedi_su
668 684
669/* 685/*
670+----------------------------------------------------------------------------+ 686+----------------------------------------------------------------------------+
671| Function Name :INT i_APCI1710_InsnBitsTimer(struct comedi_device *dev,
672struct comedi_subdevice *s,struct comedi_insn *insn,unsigned int *data) |
673+----------------------------------------------------------------------------+
674| Task : Read write functions for Timer |
675+----------------------------------------------------------------------------+
676| Input Parameters :
677+----------------------------------------------------------------------------+
678| Output Parameters : - |
679+----------------------------------------------------------------------------+
680| Return Value :
681+----------------------------------------------------------------------------+
682*/
683
684int i_APCI1710_InsnBitsTimer(struct comedi_device *dev, struct comedi_subdevice *s,
685 struct comedi_insn *insn, unsigned int *data)
686{
687 unsigned char b_BitsType;
688 int i_ReturnValue = 0;
689 b_BitsType = data[0];
690
691 printk("\n82X54");
692
693 switch (b_BitsType) {
694 case APCI1710_TIMER_READVALUE:
695 i_ReturnValue = i_APCI1710_ReadTimerValue(dev,
696 (unsigned char)CR_AREF(insn->chanspec),
697 (unsigned char)CR_CHAN(insn->chanspec),
698 (unsigned int *) &data[0]);
699 break;
700
701 case APCI1710_TIMER_GETOUTPUTLEVEL:
702 i_ReturnValue = i_APCI1710_GetTimerOutputLevel(dev,
703 (unsigned char)CR_AREF(insn->chanspec),
704 (unsigned char)CR_CHAN(insn->chanspec),
705 (unsigned char *) &data[0]);
706 break;
707
708 case APCI1710_TIMER_GETPROGRESSSTATUS:
709 i_ReturnValue = i_APCI1710_GetTimerProgressStatus(dev,
710 (unsigned char)CR_AREF(insn->chanspec),
711 (unsigned char)CR_CHAN(insn->chanspec),
712 (unsigned char *)&data[0]);
713 break;
714
715 case APCI1710_TIMER_WRITEVALUE:
716 i_ReturnValue = i_APCI1710_WriteTimerValue(dev,
717 (unsigned char)CR_AREF(insn->chanspec),
718 (unsigned char)CR_CHAN(insn->chanspec),
719 (unsigned int)data[1]);
720
721 break;
722
723 default:
724 printk("Bits Config Parameter Wrong\n");
725 i_ReturnValue = -1;
726 }
727
728 if (i_ReturnValue >= 0)
729 i_ReturnValue = insn->n;
730 return i_ReturnValue;
731}
732
733/*
734+----------------------------------------------------------------------------+
735| Function Name : _INT_ i_APCI1710_ReadTimerValue | 687| Function Name : _INT_ i_APCI1710_ReadTimerValue |
736| (unsigned char_ b_BoardHandle, | 688| (unsigned char_ b_BoardHandle, |
737| unsigned char_ b_ModulNbr, | 689| unsigned char_ b_ModulNbr, |
@@ -759,11 +711,12 @@ int i_APCI1710_InsnBitsTimer(struct comedi_device *dev, struct comedi_subdevice
759| "i_APCI1710_InitTimer" | 711| "i_APCI1710_InitTimer" |
760+----------------------------------------------------------------------------+ 712+----------------------------------------------------------------------------+
761*/ 713*/
762 714static int i_APCI1710_ReadTimerValue(struct comedi_device *dev,
763int i_APCI1710_ReadTimerValue(struct comedi_device *dev, 715 unsigned char b_ModulNbr,
764 unsigned char b_ModulNbr, unsigned char b_TimerNbr, 716 unsigned char b_TimerNbr,
765 unsigned int *pul_TimerValue) 717 unsigned int *pul_TimerValue)
766{ 718{
719 struct addi_private *devpriv = dev->private;
767 int i_ReturnValue = 0; 720 int i_ReturnValue = 0;
768 721
769 /* Test the module number */ 722 /* Test the module number */
@@ -847,11 +800,12 @@ int i_APCI1710_ReadTimerValue(struct comedi_device *dev,
847 | "i_APCI1710_InitTimer" | 800 | "i_APCI1710_InitTimer" |
848 +----------------------------------------------------------------------------+ 801 +----------------------------------------------------------------------------+
849 */ 802 */
850 803static int i_APCI1710_GetTimerOutputLevel(struct comedi_device *dev,
851int i_APCI1710_GetTimerOutputLevel(struct comedi_device *dev, 804 unsigned char b_ModulNbr,
852 unsigned char b_ModulNbr, unsigned char b_TimerNbr, 805 unsigned char b_TimerNbr,
853 unsigned char *pb_OutputLevel) 806 unsigned char *pb_OutputLevel)
854{ 807{
808 struct addi_private *devpriv = dev->private;
855 int i_ReturnValue = 0; 809 int i_ReturnValue = 0;
856 unsigned int dw_TimerStatus; 810 unsigned int dw_TimerStatus;
857 811
@@ -926,11 +880,12 @@ int i_APCI1710_GetTimerOutputLevel(struct comedi_device *dev,
926| "i_APCI1710_InitTimer" | 880| "i_APCI1710_InitTimer" |
927+----------------------------------------------------------------------------+ 881+----------------------------------------------------------------------------+
928*/ 882*/
929 883static int i_APCI1710_GetTimerProgressStatus(struct comedi_device *dev,
930int i_APCI1710_GetTimerProgressStatus(struct comedi_device *dev, 884 unsigned char b_ModulNbr,
931 unsigned char b_ModulNbr, unsigned char b_TimerNbr, 885 unsigned char b_TimerNbr,
932 unsigned char *pb_TimerStatus) 886 unsigned char *pb_TimerStatus)
933{ 887{
888 struct addi_private *devpriv = dev->private;
934 int i_ReturnValue = 0; 889 int i_ReturnValue = 0;
935 unsigned int dw_TimerStatus; 890 unsigned int dw_TimerStatus;
936 891
@@ -1005,11 +960,12 @@ int i_APCI1710_GetTimerProgressStatus(struct comedi_device *dev,
1005| "i_APCI1710_InitTimer" | 960| "i_APCI1710_InitTimer" |
1006+----------------------------------------------------------------------------+ 961+----------------------------------------------------------------------------+
1007*/ 962*/
1008 963static int i_APCI1710_WriteTimerValue(struct comedi_device *dev,
1009int i_APCI1710_WriteTimerValue(struct comedi_device *dev, 964 unsigned char b_ModulNbr,
1010 unsigned char b_ModulNbr, unsigned char b_TimerNbr, 965 unsigned char b_TimerNbr,
1011 unsigned int ul_WriteValue) 966 unsigned int ul_WriteValue)
1012{ 967{
968 struct addi_private *devpriv = dev->private;
1013 int i_ReturnValue = 0; 969 int i_ReturnValue = 0;
1014 970
1015 /* Test the module number */ 971 /* Test the module number */
@@ -1045,3 +1001,68 @@ int i_APCI1710_WriteTimerValue(struct comedi_device *dev,
1045 1001
1046 return i_ReturnValue; 1002 return i_ReturnValue;
1047} 1003}
1004
1005/*
1006+----------------------------------------------------------------------------+
1007| Function Name :INT i_APCI1710_InsnBitsTimer(struct comedi_device *dev,
1008struct comedi_subdevice *s,struct comedi_insn *insn,unsigned int *data) |
1009+----------------------------------------------------------------------------+
1010| Task : Read write functions for Timer |
1011+----------------------------------------------------------------------------+
1012| Input Parameters :
1013+----------------------------------------------------------------------------+
1014| Output Parameters : - |
1015+----------------------------------------------------------------------------+
1016| Return Value :
1017+----------------------------------------------------------------------------+
1018*/
1019static int i_APCI1710_InsnBitsTimer(struct comedi_device *dev,
1020 struct comedi_subdevice *s,
1021 struct comedi_insn *insn,
1022 unsigned int *data)
1023{
1024 unsigned char b_BitsType;
1025 int i_ReturnValue = 0;
1026 b_BitsType = data[0];
1027
1028 printk("\n82X54");
1029
1030 switch (b_BitsType) {
1031 case APCI1710_TIMER_READVALUE:
1032 i_ReturnValue = i_APCI1710_ReadTimerValue(dev,
1033 (unsigned char)CR_AREF(insn->chanspec),
1034 (unsigned char)CR_CHAN(insn->chanspec),
1035 (unsigned int *) &data[0]);
1036 break;
1037
1038 case APCI1710_TIMER_GETOUTPUTLEVEL:
1039 i_ReturnValue = i_APCI1710_GetTimerOutputLevel(dev,
1040 (unsigned char)CR_AREF(insn->chanspec),
1041 (unsigned char)CR_CHAN(insn->chanspec),
1042 (unsigned char *) &data[0]);
1043 break;
1044
1045 case APCI1710_TIMER_GETPROGRESSSTATUS:
1046 i_ReturnValue = i_APCI1710_GetTimerProgressStatus(dev,
1047 (unsigned char)CR_AREF(insn->chanspec),
1048 (unsigned char)CR_CHAN(insn->chanspec),
1049 (unsigned char *)&data[0]);
1050 break;
1051
1052 case APCI1710_TIMER_WRITEVALUE:
1053 i_ReturnValue = i_APCI1710_WriteTimerValue(dev,
1054 (unsigned char)CR_AREF(insn->chanspec),
1055 (unsigned char)CR_CHAN(insn->chanspec),
1056 (unsigned int)data[1]);
1057
1058 break;
1059
1060 default:
1061 printk("Bits Config Parameter Wrong\n");
1062 i_ReturnValue = -1;
1063 }
1064
1065 if (i_ReturnValue >= 0)
1066 i_ReturnValue = insn->n;
1067 return i_ReturnValue;
1068}
diff --git a/drivers/staging/comedi/drivers/addi-data/APCI1710_82x54.h b/drivers/staging/comedi/drivers/addi-data/APCI1710_82x54.h
deleted file mode 100644
index 81346dbc35f2..000000000000
--- a/drivers/staging/comedi/drivers/addi-data/APCI1710_82x54.h
+++ /dev/null
@@ -1,73 +0,0 @@
1/*
2 * Copyright (C) 2004,2005 ADDI-DATA GmbH for the source code of this module.
3 *
4 * ADDI-DATA GmbH
5 * Dieselstrasse 3
6 * D-77833 Ottersweier
7 * Tel: +19(0)7223/9493-0
8 * Fax: +49(0)7223/9493-92
9 * http://www.addi-data.com
10 * info@addi-data.com
11 *
12 * This program is free software; you can redistribute it and/or modify it
13 * under the terms of the GNU General Public License as published by the Free
14 * Software Foundation; either version 2 of the License, or (at your option)
15 * any later version.
16 */
17
18#define APCI1710_PCI_BUS_CLOCK 0
19#define APCI1710_FRONT_CONNECTOR_INPUT 1
20#define APCI1710_TIMER_READVALUE 0
21#define APCI1710_TIMER_GETOUTPUTLEVEL 1
22#define APCI1710_TIMER_GETPROGRESSSTATUS 2
23#define APCI1710_TIMER_WRITEVALUE 3
24
25#define APCI1710_TIMER_READINTERRUPT 1
26#define APCI1710_TIMER_READALLTIMER 2
27
28/* BEGIN JK 27.10.03 : Add the possibility to use a 40 Mhz quartz */
29#ifndef APCI1710_10MHZ
30#define APCI1710_10MHZ 10
31#endif
32/* END JK 27.10.03 : Add the possibility to use a 40 Mhz quartz */
33
34/*
35 * 82X54 TIMER INISIALISATION FUNCTION
36 */
37int i_APCI1710_InsnConfigInitTimer(struct comedi_device *dev, struct comedi_subdevice *s,
38 struct comedi_insn *insn, unsigned int *data);
39
40int i_APCI1710_InsnWriteEnableDisableTimer(struct comedi_device *dev,
41 struct comedi_subdevice *s,
42 struct comedi_insn *insn, unsigned int *data);
43
44/*
45 * 82X54 READ FUNCTION
46 */
47int i_APCI1710_InsnReadAllTimerValue(struct comedi_device *dev, struct comedi_subdevice *s,
48 struct comedi_insn *insn, unsigned int *data);
49
50int i_APCI1710_InsnBitsTimer(struct comedi_device *dev, struct comedi_subdevice *s,
51 struct comedi_insn *insn, unsigned int *data);
52
53/*
54 * 82X54 READ & WRITE FUNCTION
55 */
56int i_APCI1710_ReadTimerValue(struct comedi_device *dev,
57 unsigned char b_ModulNbr, unsigned char b_TimerNbr,
58 unsigned int *pul_TimerValue);
59
60int i_APCI1710_GetTimerOutputLevel(struct comedi_device *dev,
61 unsigned char b_ModulNbr, unsigned char b_TimerNbr,
62 unsigned char *pb_OutputLevel);
63
64int i_APCI1710_GetTimerProgressStatus(struct comedi_device *dev,
65 unsigned char b_ModulNbr, unsigned char b_TimerNbr,
66 unsigned char *pb_TimerStatus);
67
68/*
69 * 82X54 WRITE FUNCTION
70 */
71int i_APCI1710_WriteTimerValue(struct comedi_device *dev,
72 unsigned char b_ModulNbr, unsigned char b_TimerNbr,
73 unsigned int ul_WriteValue);
diff --git a/drivers/staging/comedi/drivers/addi-data/APCI1710_Chrono.c b/drivers/staging/comedi/drivers/addi-data/APCI1710_Chrono.c
index 482a412aa652..5bd7fe64637c 100644
--- a/drivers/staging/comedi/drivers/addi-data/APCI1710_Chrono.c
+++ b/drivers/staging/comedi/drivers/addi-data/APCI1710_Chrono.c
@@ -52,12 +52,22 @@ You should also find the complete GPL in the COPYING file accompanying this sour
52 +-----------------------------------------------------------------------+ 52 +-----------------------------------------------------------------------+
53*/ 53*/
54 54
55/* 55#define APCI1710_30MHZ 30
56+----------------------------------------------------------------------------+ 56#define APCI1710_33MHZ 33
57| Included files | 57#define APCI1710_40MHZ 40
58+----------------------------------------------------------------------------+ 58
59*/ 59#define APCI1710_SINGLE 0
60#include "APCI1710_Chrono.h" 60#define APCI1710_CONTINUOUS 1
61
62#define APCI1710_CHRONO_PROGRESS_STATUS 0
63#define APCI1710_CHRONO_READVALUE 1
64#define APCI1710_CHRONO_CONVERTVALUE 2
65#define APCI1710_CHRONO_READINTERRUPT 3
66
67#define APCI1710_CHRONO_SET_CHANNELON 0
68#define APCI1710_CHRONO_SET_CHANNELOFF 1
69#define APCI1710_CHRONO_READ_CHANNEL 2
70#define APCI1710_CHRONO_READ_PORT 3
61 71
62/* 72/*
63+----------------------------------------------------------------------------+ 73+----------------------------------------------------------------------------+
@@ -130,10 +140,12 @@ You should also find the complete GPL in the COPYING file accompanying this sour
130| this CHRONOS version | 140| this CHRONOS version |
131+----------------------------------------------------------------------------+ 141+----------------------------------------------------------------------------+
132*/ 142*/
133 143static int i_APCI1710_InsnConfigInitChrono(struct comedi_device *dev,
134int i_APCI1710_InsnConfigInitChrono(struct comedi_device *dev, struct comedi_subdevice *s, 144 struct comedi_subdevice *s,
135 struct comedi_insn *insn, unsigned int *data) 145 struct comedi_insn *insn,
146 unsigned int *data)
136{ 147{
148 struct addi_private *devpriv = dev->private;
137 int i_ReturnValue = 0; 149 int i_ReturnValue = 0;
138 unsigned int ul_TimerValue = 0; 150 unsigned int ul_TimerValue = 0;
139 unsigned int ul_TimingInterval = 0; 151 unsigned int ul_TimingInterval = 0;
@@ -839,10 +851,12 @@ struct comedi_subdevice *s,struct comedi_insn *insn,unsigned int *data) |
839 -8: data[0] wrong input | 851 -8: data[0] wrong input |
840+----------------------------------------------------------------------------+ 852+----------------------------------------------------------------------------+
841*/ 853*/
842 854static int i_APCI1710_InsnWriteEnableDisableChrono(struct comedi_device *dev,
843int i_APCI1710_InsnWriteEnableDisableChrono(struct comedi_device *dev, 855 struct comedi_subdevice *s,
844 struct comedi_subdevice *s, struct comedi_insn *insn, unsigned int *data) 856 struct comedi_insn *insn,
857 unsigned int *data)
845{ 858{
859 struct addi_private *devpriv = dev->private;
846 int i_ReturnValue = 0; 860 int i_ReturnValue = 0;
847 unsigned char b_ModulNbr, b_CycleMode, b_InterruptEnable, b_Action; 861 unsigned char b_ModulNbr, b_CycleMode, b_InterruptEnable, b_Action;
848 b_ModulNbr = CR_AREF(insn->chanspec); 862 b_ModulNbr = CR_AREF(insn->chanspec);
@@ -1077,87 +1091,6 @@ int i_APCI1710_InsnWriteEnableDisableChrono(struct comedi_device *dev,
1077 1091
1078/* 1092/*
1079+----------------------------------------------------------------------------+ 1093+----------------------------------------------------------------------------+
1080| Function Name :INT i_APCI1710_InsnReadChrono(struct comedi_device *dev,struct comedi_subdevice *s,
1081struct comedi_insn *insn,unsigned int *data) |
1082+----------------------------------------------------------------------------+
1083| Task : Read functions for Timer |
1084+----------------------------------------------------------------------------+
1085| Input Parameters :
1086+----------------------------------------------------------------------------+
1087| Output Parameters : - |
1088+----------------------------------------------------------------------------+
1089| Return Value :
1090+----------------------------------------------------------------------------+
1091*/
1092
1093int i_APCI1710_InsnReadChrono(struct comedi_device *dev, struct comedi_subdevice *s,
1094 struct comedi_insn *insn, unsigned int *data)
1095{
1096 unsigned char b_ReadType;
1097 int i_ReturnValue = insn->n;
1098
1099 b_ReadType = CR_CHAN(insn->chanspec);
1100
1101 switch (b_ReadType) {
1102 case APCI1710_CHRONO_PROGRESS_STATUS:
1103 i_ReturnValue = i_APCI1710_GetChronoProgressStatus(dev,
1104 (unsigned char) CR_AREF(insn->chanspec), (unsigned char *) &data[0]);
1105 break;
1106
1107 case APCI1710_CHRONO_READVALUE:
1108 i_ReturnValue = i_APCI1710_ReadChronoValue(dev,
1109 (unsigned char) CR_AREF(insn->chanspec),
1110 (unsigned int) insn->unused[0],
1111 (unsigned char *) &data[0], (unsigned int *) &data[1]);
1112 break;
1113
1114 case APCI1710_CHRONO_CONVERTVALUE:
1115 i_ReturnValue = i_APCI1710_ConvertChronoValue(dev,
1116 (unsigned char) CR_AREF(insn->chanspec),
1117 (unsigned int) insn->unused[0],
1118 (unsigned int *) &data[0],
1119 (unsigned char *) &data[1],
1120 (unsigned char *) &data[2],
1121 (unsigned int *) &data[3],
1122 (unsigned int *) &data[4], (unsigned int *) &data[5]);
1123 break;
1124
1125 case APCI1710_CHRONO_READINTERRUPT:
1126 printk("In Chrono Read Interrupt\n");
1127
1128 data[0] = devpriv->s_InterruptParameters.
1129 s_FIFOInterruptParameters[devpriv->
1130 s_InterruptParameters.ui_Read].b_OldModuleMask;
1131 data[1] = devpriv->s_InterruptParameters.
1132 s_FIFOInterruptParameters[devpriv->
1133 s_InterruptParameters.ui_Read].ul_OldInterruptMask;
1134 data[2] = devpriv->s_InterruptParameters.
1135 s_FIFOInterruptParameters[devpriv->
1136 s_InterruptParameters.ui_Read].ul_OldCounterLatchValue;
1137
1138 /**************************/
1139 /* Increment the read FIFO */
1140 /***************************/
1141
1142 devpriv->
1143 s_InterruptParameters.
1144 ui_Read = (devpriv->
1145 s_InterruptParameters.
1146 ui_Read + 1) % APCI1710_SAVE_INTERRUPT;
1147 break;
1148
1149 default:
1150 printk("ReadType Parameter wrong\n");
1151 }
1152
1153 if (i_ReturnValue >= 0)
1154 i_ReturnValue = insn->n;
1155 return i_ReturnValue;
1156
1157}
1158
1159/*
1160+----------------------------------------------------------------------------+
1161| Function Name : _INT_ i_APCI1710_GetChronoProgressStatus | 1094| Function Name : _INT_ i_APCI1710_GetChronoProgressStatus |
1162| (unsigned char_ b_BoardHandle, | 1095| (unsigned char_ b_BoardHandle, |
1163| unsigned char_ b_ModulNbr, | 1096| unsigned char_ b_ModulNbr, |
@@ -1193,10 +1126,11 @@ int i_APCI1710_InsnReadChrono(struct comedi_device *dev, struct comedi_subdevice
1193| "i_APCI1710_InitChrono" | 1126| "i_APCI1710_InitChrono" |
1194+----------------------------------------------------------------------------+ 1127+----------------------------------------------------------------------------+
1195*/ 1128*/
1196 1129static int i_APCI1710_GetChronoProgressStatus(struct comedi_device *dev,
1197int i_APCI1710_GetChronoProgressStatus(struct comedi_device *dev, 1130 unsigned char b_ModulNbr,
1198 unsigned char b_ModulNbr, unsigned char *pb_ChronoStatus) 1131 unsigned char *pb_ChronoStatus)
1199{ 1132{
1133 struct addi_private *devpriv = dev->private;
1200 int i_ReturnValue = 0; 1134 int i_ReturnValue = 0;
1201 unsigned int dw_Status; 1135 unsigned int dw_Status;
1202 1136
@@ -1354,11 +1288,13 @@ int i_APCI1710_GetChronoProgressStatus(struct comedi_device *dev,
1354| directly the chronometer measured timing. | 1288| directly the chronometer measured timing. |
1355+----------------------------------------------------------------------------+ 1289+----------------------------------------------------------------------------+
1356*/ 1290*/
1357 1291static int i_APCI1710_ReadChronoValue(struct comedi_device *dev,
1358int i_APCI1710_ReadChronoValue(struct comedi_device *dev, 1292 unsigned char b_ModulNbr,
1359 unsigned char b_ModulNbr, 1293 unsigned int ui_TimeOut,
1360 unsigned int ui_TimeOut, unsigned char *pb_ChronoStatus, unsigned int *pul_ChronoValue) 1294 unsigned char *pb_ChronoStatus,
1295 unsigned int *pul_ChronoValue)
1361{ 1296{
1297 struct addi_private *devpriv = dev->private;
1362 int i_ReturnValue = 0; 1298 int i_ReturnValue = 0;
1363 unsigned int dw_Status; 1299 unsigned int dw_Status;
1364 unsigned int dw_TimeOut = 0; 1300 unsigned int dw_TimeOut = 0;
@@ -1617,15 +1553,17 @@ int i_APCI1710_ReadChronoValue(struct comedi_device *dev,
1617| "i_APCI1710_InitChrono" | 1553| "i_APCI1710_InitChrono" |
1618+----------------------------------------------------------------------------+ 1554+----------------------------------------------------------------------------+
1619*/ 1555*/
1620 1556static int i_APCI1710_ConvertChronoValue(struct comedi_device *dev,
1621int i_APCI1710_ConvertChronoValue(struct comedi_device *dev, 1557 unsigned char b_ModulNbr,
1622 unsigned char b_ModulNbr, 1558 unsigned int ul_ChronoValue,
1623 unsigned int ul_ChronoValue, 1559 unsigned int *pul_Hour,
1624 unsigned int *pul_Hour, 1560 unsigned char *pb_Minute,
1625 unsigned char *pb_Minute, 1561 unsigned char *pb_Second,
1626 unsigned char *pb_Second, 1562 unsigned int *pui_MilliSecond,
1627 unsigned int *pui_MilliSecond, unsigned int *pui_MicroSecond, unsigned int *pui_NanoSecond) 1563 unsigned int *pui_MicroSecond,
1564 unsigned int *pui_NanoSecond)
1628{ 1565{
1566 struct addi_private *devpriv = dev->private;
1629 int i_ReturnValue = 0; 1567 int i_ReturnValue = 0;
1630 double d_Hour; 1568 double d_Hour;
1631 double d_Minute; 1569 double d_Minute;
@@ -1756,6 +1694,89 @@ int i_APCI1710_ConvertChronoValue(struct comedi_device *dev,
1756 1694
1757/* 1695/*
1758+----------------------------------------------------------------------------+ 1696+----------------------------------------------------------------------------+
1697| Function Name :INT i_APCI1710_InsnReadChrono(struct comedi_device *dev,struct comedi_subdevice *s,
1698struct comedi_insn *insn,unsigned int *data) |
1699+----------------------------------------------------------------------------+
1700| Task : Read functions for Timer |
1701+----------------------------------------------------------------------------+
1702| Input Parameters :
1703+----------------------------------------------------------------------------+
1704| Output Parameters : - |
1705+----------------------------------------------------------------------------+
1706| Return Value :
1707+----------------------------------------------------------------------------+
1708*/
1709static int i_APCI1710_InsnReadChrono(struct comedi_device *dev,
1710 struct comedi_subdevice *s,
1711 struct comedi_insn *insn,
1712 unsigned int *data)
1713{
1714 struct addi_private *devpriv = dev->private;
1715 unsigned char b_ReadType;
1716 int i_ReturnValue = insn->n;
1717
1718 b_ReadType = CR_CHAN(insn->chanspec);
1719
1720 switch (b_ReadType) {
1721 case APCI1710_CHRONO_PROGRESS_STATUS:
1722 i_ReturnValue = i_APCI1710_GetChronoProgressStatus(dev,
1723 (unsigned char) CR_AREF(insn->chanspec), (unsigned char *) &data[0]);
1724 break;
1725
1726 case APCI1710_CHRONO_READVALUE:
1727 i_ReturnValue = i_APCI1710_ReadChronoValue(dev,
1728 (unsigned char) CR_AREF(insn->chanspec),
1729 (unsigned int) insn->unused[0],
1730 (unsigned char *) &data[0], (unsigned int *) &data[1]);
1731 break;
1732
1733 case APCI1710_CHRONO_CONVERTVALUE:
1734 i_ReturnValue = i_APCI1710_ConvertChronoValue(dev,
1735 (unsigned char) CR_AREF(insn->chanspec),
1736 (unsigned int) insn->unused[0],
1737 (unsigned int *) &data[0],
1738 (unsigned char *) &data[1],
1739 (unsigned char *) &data[2],
1740 (unsigned int *) &data[3],
1741 (unsigned int *) &data[4], (unsigned int *) &data[5]);
1742 break;
1743
1744 case APCI1710_CHRONO_READINTERRUPT:
1745 printk("In Chrono Read Interrupt\n");
1746
1747 data[0] = devpriv->s_InterruptParameters.
1748 s_FIFOInterruptParameters[devpriv->
1749 s_InterruptParameters.ui_Read].b_OldModuleMask;
1750 data[1] = devpriv->s_InterruptParameters.
1751 s_FIFOInterruptParameters[devpriv->
1752 s_InterruptParameters.ui_Read].ul_OldInterruptMask;
1753 data[2] = devpriv->s_InterruptParameters.
1754 s_FIFOInterruptParameters[devpriv->
1755 s_InterruptParameters.ui_Read].ul_OldCounterLatchValue;
1756
1757 /**************************/
1758 /* Increment the read FIFO */
1759 /***************************/
1760
1761 devpriv->
1762 s_InterruptParameters.
1763 ui_Read = (devpriv->
1764 s_InterruptParameters.
1765 ui_Read + 1) % APCI1710_SAVE_INTERRUPT;
1766 break;
1767
1768 default:
1769 printk("ReadType Parameter wrong\n");
1770 }
1771
1772 if (i_ReturnValue >= 0)
1773 i_ReturnValue = insn->n;
1774 return i_ReturnValue;
1775
1776}
1777
1778/*
1779+----------------------------------------------------------------------------+
1759| Function Name : int i_APCI1710_InsnBitsChronoDigitalIO(struct comedi_device *dev,struct comedi_subdevice *s, 1780| Function Name : int i_APCI1710_InsnBitsChronoDigitalIO(struct comedi_device *dev,struct comedi_subdevice *s,
1760 struct comedi_insn *insn,unsigned int *data) | 1781 struct comedi_insn *insn,unsigned int *data) |
1761+----------------------------------------------------------------------------+ 1782+----------------------------------------------------------------------------+
@@ -1874,10 +1895,12 @@ int i_APCI1710_ConvertChronoValue(struct comedi_device *dev,
1874| "i_APCI1710_InitChrono" | 1895| "i_APCI1710_InitChrono" |
1875+----------------------------------------------------------------------------+ 1896+----------------------------------------------------------------------------+
1876*/ 1897*/
1877 1898static int i_APCI1710_InsnBitsChronoDigitalIO(struct comedi_device *dev,
1878int i_APCI1710_InsnBitsChronoDigitalIO(struct comedi_device *dev, 1899 struct comedi_subdevice *s,
1879 struct comedi_subdevice *s, struct comedi_insn *insn, unsigned int *data) 1900 struct comedi_insn *insn,
1901 unsigned int *data)
1880{ 1902{
1903 struct addi_private *devpriv = dev->private;
1881 int i_ReturnValue = 0; 1904 int i_ReturnValue = 0;
1882 unsigned char b_ModulNbr, b_OutputChannel, b_InputChannel, b_IOType; 1905 unsigned char b_ModulNbr, b_OutputChannel, b_InputChannel, b_IOType;
1883 unsigned int dw_Status; 1906 unsigned int dw_Status;
diff --git a/drivers/staging/comedi/drivers/addi-data/APCI1710_Chrono.h b/drivers/staging/comedi/drivers/addi-data/APCI1710_Chrono.h
deleted file mode 100644
index 29bad1d144a1..000000000000
--- a/drivers/staging/comedi/drivers/addi-data/APCI1710_Chrono.h
+++ /dev/null
@@ -1,74 +0,0 @@
1/*
2 * Copyright (C) 2004,2005 ADDI-DATA GmbH for the source code of this module.
3 *
4 * ADDI-DATA GmbH
5 * Dieselstrasse 3
6 * D-77833 Ottersweier
7 * Tel: +19(0)7223/9493-0
8 * Fax: +49(0)7223/9493-92
9 * http://www.addi-data-com
10 * info@addi-data.com
11 *
12 * This program is free software; you can redistribute it and/or modify it
13 * under the terms of the GNU General Public License as published by the Free
14 * Software Foundation; either version 2 of the License, or (at your option)
15 * any later version.
16 */
17
18#define APCI1710_30MHZ 30
19#define APCI1710_33MHZ 33
20#define APCI1710_40MHZ 40
21
22#define APCI1710_SINGLE 0
23#define APCI1710_CONTINUOUS 1
24
25#define APCI1710_CHRONO_PROGRESS_STATUS 0
26#define APCI1710_CHRONO_READVALUE 1
27#define APCI1710_CHRONO_CONVERTVALUE 2
28#define APCI1710_CHRONO_READINTERRUPT 3
29
30#define APCI1710_CHRONO_SET_CHANNELON 0
31#define APCI1710_CHRONO_SET_CHANNELOFF 1
32#define APCI1710_CHRONO_READ_CHANNEL 2
33#define APCI1710_CHRONO_READ_PORT 3
34
35/*
36 * CHRONOMETER INISIALISATION FUNCTION
37 */
38int i_APCI1710_InsnConfigInitChrono(struct comedi_device *dev, struct comedi_subdevice *s,
39 struct comedi_insn *insn, unsigned int *data);
40
41int i_APCI1710_InsnWriteEnableDisableChrono(struct comedi_device *dev,
42 struct comedi_subdevice *s,
43 struct comedi_insn *insn,
44 unsigned int *data);
45
46/*
47 * CHRONOMETER READ FUNCTION
48 */
49int i_APCI1710_InsnReadChrono(struct comedi_device *dev, struct comedi_subdevice *s,
50 struct comedi_insn *insn, unsigned int *data);
51
52int i_APCI1710_GetChronoProgressStatus(struct comedi_device *dev,
53 unsigned char b_ModulNbr, unsigned char *pb_ChronoStatus);
54
55int i_APCI1710_ReadChronoValue(struct comedi_device *dev,
56 unsigned char b_ModulNbr,
57 unsigned int ui_TimeOut, unsigned char *pb_ChronoStatus,
58 unsigned int *pul_ChronoValue);
59
60int i_APCI1710_ConvertChronoValue(struct comedi_device *dev,
61 unsigned char b_ModulNbr,
62 unsigned int ul_ChronoValue,
63 unsigned int *pul_Hour,
64 unsigned char *pb_Minute,
65 unsigned char *pb_Second,
66 unsigned int *pui_MilliSecond, unsigned int *pui_MicroSecond,
67 unsigned int *pui_NanoSecond);
68
69/*
70 * CHRONOMETER DIGITAL INPUT OUTPUT FUNCTION
71 */
72int i_APCI1710_InsnBitsChronoDigitalIO(struct comedi_device *dev,
73 struct comedi_subdevice *s, struct comedi_insn *insn,
74 unsigned int *data);
diff --git a/drivers/staging/comedi/drivers/addi-data/APCI1710_Dig_io.c b/drivers/staging/comedi/drivers/addi-data/APCI1710_Dig_io.c
index 07108f9f4a41..6b38ce7a275b 100644
--- a/drivers/staging/comedi/drivers/addi-data/APCI1710_Dig_io.c
+++ b/drivers/staging/comedi/drivers/addi-data/APCI1710_Dig_io.c
@@ -52,12 +52,16 @@ You should also find the complete GPL in the COPYING file accompanying this sour
52 +-----------------------------------------------------------------------+ 52 +-----------------------------------------------------------------------+
53*/ 53*/
54 54
55/* 55/* Digital Output ON or OFF */
56+----------------------------------------------------------------------------+ 56#define APCI1710_ON 1
57| Included files | 57#define APCI1710_OFF 0
58+----------------------------------------------------------------------------+ 58
59*/ 59/* Digital I/O */
60#include "APCI1710_Dig_io.h" 60#define APCI1710_INPUT 0
61#define APCI1710_OUTPUT 1
62
63#define APCI1710_DIGIO_MEMORYONOFF 0x10
64#define APCI1710_DIGIO_INIT 0x11
61 65
62/* 66/*
63+----------------------------------------------------------------------------+ 67+----------------------------------------------------------------------------+
@@ -99,9 +103,12 @@ Activates and deactivates the digital output memory.
99+----------------------------------------------------------------------------+ 103+----------------------------------------------------------------------------+
100*/ 104*/
101 105
102int i_APCI1710_InsnConfigDigitalIO(struct comedi_device *dev, struct comedi_subdevice *s, 106static int i_APCI1710_InsnConfigDigitalIO(struct comedi_device *dev,
103 struct comedi_insn *insn, unsigned int *data) 107 struct comedi_subdevice *s,
108 struct comedi_insn *insn,
109 unsigned int *data)
104{ 110{
111 struct addi_private *devpriv = dev->private;
105 unsigned char b_ModulNbr, b_ChannelAMode, b_ChannelBMode; 112 unsigned char b_ModulNbr, b_ChannelAMode, b_ChannelBMode;
106 unsigned char b_MemoryOnOff, b_ConfigType; 113 unsigned char b_MemoryOnOff, b_ConfigType;
107 int i_ReturnValue = 0; 114 int i_ReturnValue = 0;
@@ -293,9 +300,12 @@ int i_APCI1710_InsnConfigDigitalIO(struct comedi_device *dev, struct comedi_subd
293* unsigned char_ b_ModulNbr, unsigned char_ b_InputChannel, 300* unsigned char_ b_ModulNbr, unsigned char_ b_InputChannel,
294* unsigned char *_ pb_ChannelStatus) 301* unsigned char *_ pb_ChannelStatus)
295*/ 302*/
296int i_APCI1710_InsnReadDigitalIOChlValue(struct comedi_device *dev, 303static int i_APCI1710_InsnReadDigitalIOChlValue(struct comedi_device *dev,
297 struct comedi_subdevice *s, struct comedi_insn *insn, unsigned int *data) 304 struct comedi_subdevice *s,
305 struct comedi_insn *insn,
306 unsigned int *data)
298{ 307{
308 struct addi_private *devpriv = dev->private;
299 int i_ReturnValue = 0; 309 int i_ReturnValue = 0;
300 unsigned int dw_StatusReg; 310 unsigned int dw_StatusReg;
301 unsigned char b_ModulNbr, b_InputChannel; 311 unsigned char b_ModulNbr, b_InputChannel;
@@ -481,9 +491,12 @@ int i_APCI1710_InsnReadDigitalIOChlValue(struct comedi_device *dev,
481* _INT_ i_APCI1710_SetDigitalIOChlOn (unsigned char_ b_BoardHandle, 491* _INT_ i_APCI1710_SetDigitalIOChlOn (unsigned char_ b_BoardHandle,
482* unsigned char_ b_ModulNbr, unsigned char_ b_OutputChannel) 492* unsigned char_ b_ModulNbr, unsigned char_ b_OutputChannel)
483*/ 493*/
484int i_APCI1710_InsnWriteDigitalIOChlOnOff(struct comedi_device *dev, 494static int i_APCI1710_InsnWriteDigitalIOChlOnOff(struct comedi_device *dev,
485 struct comedi_subdevice *s, struct comedi_insn *insn, unsigned int *data) 495 struct comedi_subdevice *s,
496 struct comedi_insn *insn,
497 unsigned int *data)
486{ 498{
499 struct addi_private *devpriv = dev->private;
487 int i_ReturnValue = 0; 500 int i_ReturnValue = 0;
488 unsigned int dw_WriteValue = 0; 501 unsigned int dw_WriteValue = 0;
489 unsigned char b_ModulNbr, b_OutputChannel; 502 unsigned char b_ModulNbr, b_OutputChannel;
@@ -731,9 +744,12 @@ int i_APCI1710_InsnWriteDigitalIOChlOnOff(struct comedi_device *dev,
731 * b_BoardHandle, unsigned char_ b_ModulNbr, unsigned char_ 744 * b_BoardHandle, unsigned char_ b_ModulNbr, unsigned char_
732 * b_PortValue) 745 * b_PortValue)
733*/ 746*/
734int i_APCI1710_InsnBitsDigitalIOPortOnOff(struct comedi_device *dev, 747static int i_APCI1710_InsnBitsDigitalIOPortOnOff(struct comedi_device *dev,
735 struct comedi_subdevice *s, struct comedi_insn *insn, unsigned int *data) 748 struct comedi_subdevice *s,
749 struct comedi_insn *insn,
750 unsigned int *data)
736{ 751{
752 struct addi_private *devpriv = dev->private;
737 int i_ReturnValue = 0; 753 int i_ReturnValue = 0;
738 unsigned int dw_WriteValue = 0; 754 unsigned int dw_WriteValue = 0;
739 unsigned int dw_StatusReg; 755 unsigned int dw_StatusReg;
diff --git a/drivers/staging/comedi/drivers/addi-data/APCI1710_Dig_io.h b/drivers/staging/comedi/drivers/addi-data/APCI1710_Dig_io.h
deleted file mode 100644
index cc3973d7c2a4..000000000000
--- a/drivers/staging/comedi/drivers/addi-data/APCI1710_Dig_io.h
+++ /dev/null
@@ -1,46 +0,0 @@
1/*
2 * Copyright (C) 2004,2005 ADDI-DATA GmbH for the source code of this module.
3 *
4 * ADDI-DATA GmbH
5 * Dieselstrasse 3
6 * D-77833 Ottersweier
7 * Tel: +19(0)7223/9493-0
8 * Fax: +49(0)7223/9493-92
9 * http://www.addi-data.com
10 * info@addi-data.com
11 *
12 * This program is free software; you can redistribute it and/or modify it
13 * under the terms of the GNU General Public License as published by the Free
14 * Software Foundation; either version 2 of the License, or (at your option)
15 * any later version.
16 */
17
18#define APCI1710_ON 1 /* Digital Output ON or OFF */
19#define APCI1710_OFF 0
20
21#define APCI1710_INPUT 0 /* Digital I/O */
22#define APCI1710_OUTPUT 1
23
24#define APCI1710_DIGIO_MEMORYONOFF 0x10
25#define APCI1710_DIGIO_INIT 0x11
26
27/*
28 * DIGITAL I/O INISIALISATION FUNCTION
29 */
30int i_APCI1710_InsnConfigDigitalIO(struct comedi_device *dev, struct comedi_subdevice *s,
31 struct comedi_insn *insn, unsigned int *data);
32
33/*
34 * INPUT OUTPUT FUNCTIONS
35 */
36int i_APCI1710_InsnReadDigitalIOChlValue(struct comedi_device *dev,
37 struct comedi_subdevice *s,
38 struct comedi_insn *insn, unsigned int *data);
39
40int i_APCI1710_InsnWriteDigitalIOChlOnOff(struct comedi_device *dev,
41 struct comedi_subdevice *s,
42 struct comedi_insn *insn, unsigned int *data);
43
44int i_APCI1710_InsnBitsDigitalIOPortOnOff(struct comedi_device *dev,
45 struct comedi_subdevice *s,
46 struct comedi_insn *insn, unsigned int *data);
diff --git a/drivers/staging/comedi/drivers/addi-data/APCI1710_INCCPT.c b/drivers/staging/comedi/drivers/addi-data/APCI1710_INCCPT.c
index 14b13eae4c50..70a7f953fa2f 100644
--- a/drivers/staging/comedi/drivers/addi-data/APCI1710_INCCPT.c
+++ b/drivers/staging/comedi/drivers/addi-data/APCI1710_INCCPT.c
@@ -51,93 +51,121 @@ You should also find the complete GPL in the COPYING file accompanying this sour
51 +-----------------------------------------------------------------------+ 51 +-----------------------------------------------------------------------+
52*/ 52*/
53 53
54/* 54#define APCI1710_16BIT_COUNTER 0x10
55+----------------------------------------------------------------------------+ 55#define APCI1710_32BIT_COUNTER 0x0
56| Included files | 56#define APCI1710_QUADRUPLE_MODE 0x0
57+----------------------------------------------------------------------------+ 57#define APCI1710_DOUBLE_MODE 0x3
58*/ 58#define APCI1710_SIMPLE_MODE 0xF
59 59#define APCI1710_DIRECT_MODE 0x80
60#include "APCI1710_INCCPT.h" 60#define APCI1710_HYSTERESIS_ON 0x60
61 61#define APCI1710_HYSTERESIS_OFF 0x0
62/* 62#define APCI1710_INCREMENT 0x60
63+----------------------------------------------------------------------------+ 63#define APCI1710_DECREMENT 0x0
64| int i_APCI1710_InsnConfigINCCPT(struct comedi_device *dev,struct comedi_subdevice *s, 64#define APCI1710_LATCH_COUNTER 0x1
65struct comedi_insn *insn,unsigned int *data) 65#define APCI1710_CLEAR_COUNTER 0x0
66 66#define APCI1710_LOW 0x0
67+----------------------------------------------------------------------------+ 67#define APCI1710_HIGH 0x1
68| Task : Configuration function for INC_CPT | 68
69+----------------------------------------------------------------------------+ 69/*********************/
70| Input Parameters : | 70/* Version 0600-0229 */
71+----------------------------------------------------------------------------+ 71/*********************/
72| Output Parameters : *data 72#define APCI1710_HIGH_EDGE_CLEAR_COUNTER 0x0
73+----------------------------------------------------------------------------+ 73#define APCI1710_HIGH_EDGE_LATCH_COUNTER 0x1
74| Return Value : | 74#define APCI1710_LOW_EDGE_CLEAR_COUNTER 0x2
75+----------------------------------------------------------------------------+ 75#define APCI1710_LOW_EDGE_LATCH_COUNTER 0x3
76*/ 76#define APCI1710_HIGH_EDGE_LATCH_AND_CLEAR_COUNTER 0x4
77 77#define APCI1710_LOW_EDGE_LATCH_AND_CLEAR_COUNTER 0x5
78int i_APCI1710_InsnConfigINCCPT(struct comedi_device *dev, struct comedi_subdevice *s, 78#define APCI1710_SOURCE_0 0x0
79 struct comedi_insn *insn, unsigned int *data) 79#define APCI1710_SOURCE_1 0x1
80{ 80
81 unsigned int ui_ConfigType; 81#define APCI1710_30MHZ 30
82 int i_ReturnValue = 0; 82#define APCI1710_33MHZ 33
83 ui_ConfigType = CR_CHAN(insn->chanspec); 83#define APCI1710_40MHZ 40
84 84
85 printk("\nINC_CPT"); 85#define APCI1710_ENABLE_LATCH_INT 0x80
86 86#define APCI1710_DISABLE_LATCH_INT (~APCI1710_ENABLE_LATCH_INT)
87 devpriv->tsk_Current = current; /* Save the current process task structure */ 87
88 switch (ui_ConfigType) { 88#define APCI1710_INDEX_LATCH_COUNTER 0x10
89 case APCI1710_INCCPT_INITCOUNTER: 89#define APCI1710_INDEX_AUTO_MODE 0x8
90 i_ReturnValue = i_APCI1710_InitCounter(dev, 90#define APCI1710_ENABLE_INDEX 0x4
91 CR_AREF(insn->chanspec), 91#define APCI1710_DISABLE_INDEX (~APCI1710_ENABLE_INDEX)
92 (unsigned char) data[0], 92#define APCI1710_ENABLE_LATCH_AND_CLEAR 0x8
93 (unsigned char) data[1], 93#define APCI1710_DISABLE_LATCH_AND_CLEAR (~APCI1710_ENABLE_LATCH_AND_CLEAR)
94 (unsigned char) data[2], (unsigned char) data[3], (unsigned char) data[4]); 94#define APCI1710_SET_LOW_INDEX_LEVEL 0x4
95 break; 95#define APCI1710_SET_HIGH_INDEX_LEVEL (~APCI1710_SET_LOW_INDEX_LEVEL)
96 96#define APCI1710_INVERT_INDEX_RFERENCE 0x2
97 case APCI1710_INCCPT_COUNTERAUTOTEST: 97#define APCI1710_DEFAULT_INDEX_RFERENCE (~APCI1710_INVERT_INDEX_RFERENCE)
98 i_ReturnValue = i_APCI1710_CounterAutoTest(dev, 98
99 (unsigned char *) &data[0]); 99#define APCI1710_ENABLE_INDEX_INT 0x1
100 break; 100#define APCI1710_DISABLE_INDEX_INT (~APCI1710_ENABLE_INDEX_INT)
101 101
102 case APCI1710_INCCPT_INITINDEX: 102#define APCI1710_ENABLE_FREQUENCY 0x4
103 i_ReturnValue = i_APCI1710_InitIndex(dev, 103#define APCI1710_DISABLE_FREQUENCY (~APCI1710_ENABLE_FREQUENCY)
104 CR_AREF(insn->chanspec), 104
105 (unsigned char) data[0], 105#define APCI1710_ENABLE_FREQUENCY_INT 0x8
106 (unsigned char) data[1], (unsigned char) data[2], (unsigned char) data[3]); 106#define APCI1710_DISABLE_FREQUENCY_INT (~APCI1710_ENABLE_FREQUENCY_INT)
107 break; 107
108 108#define APCI1710_ENABLE_40MHZ_FREQUENCY 0x40
109 case APCI1710_INCCPT_INITREFERENCE: 109#define APCI1710_DISABLE_40MHZ_FREQUENCY (~APCI1710_ENABLE_40MHZ_FREQUENCY)
110 i_ReturnValue = i_APCI1710_InitReference(dev, 110
111 CR_AREF(insn->chanspec), (unsigned char) data[0]); 111#define APCI1710_ENABLE_40MHZ_FILTER 0x80
112 break; 112#define APCI1710_DISABLE_40MHZ_FILTER (~APCI1710_ENABLE_40MHZ_FILTER)
113 113
114 case APCI1710_INCCPT_INITEXTERNALSTROBE: 114#define APCI1710_ENABLE_COMPARE_INT 0x2
115 i_ReturnValue = i_APCI1710_InitExternalStrobe(dev, 115#define APCI1710_DISABLE_COMPARE_INT (~APCI1710_ENABLE_COMPARE_INT)
116 CR_AREF(insn->chanspec), 116
117 (unsigned char) data[0], (unsigned char) data[1]); 117#define APCI1710_ENABLE_INDEX_ACTION 0x20
118 break; 118#define APCI1710_DISABLE_INDEX_ACTION (~APCI1710_ENABLE_INDEX_ACTION)
119 119#define APCI1710_REFERENCE_HIGH 0x40
120 case APCI1710_INCCPT_INITCOMPARELOGIC: 120#define APCI1710_REFERENCE_LOW (~APCI1710_REFERENCE_HIGH)
121 i_ReturnValue = i_APCI1710_InitCompareLogic(dev, 121
122 CR_AREF(insn->chanspec), (unsigned int) data[0]); 122#define APCI1710_TOR_GATE_LOW 0x40
123 break; 123#define APCI1710_TOR_GATE_HIGH (~APCI1710_TOR_GATE_LOW)
124 124
125 case APCI1710_INCCPT_INITFREQUENCYMEASUREMENT: 125/* INSN CONFIG */
126 i_ReturnValue = i_APCI1710_InitFrequencyMeasurement(dev, 126#define APCI1710_INCCPT_INITCOUNTER 100
127 CR_AREF(insn->chanspec), 127#define APCI1710_INCCPT_COUNTERAUTOTEST 101
128 (unsigned char) data[0], 128#define APCI1710_INCCPT_INITINDEX 102
129 (unsigned char) data[1], (unsigned int) data[2], (unsigned int *) &data[0]); 129#define APCI1710_INCCPT_INITREFERENCE 103
130 break; 130#define APCI1710_INCCPT_INITEXTERNALSTROBE 104
131 131#define APCI1710_INCCPT_INITCOMPARELOGIC 105
132 default: 132#define APCI1710_INCCPT_INITFREQUENCYMEASUREMENT 106
133 printk("Insn Config : Config Parameter Wrong\n"); 133
134 134/* INSN READ */
135 } 135#define APCI1710_INCCPT_READLATCHREGISTERSTATUS 200
136 136#define APCI1710_INCCPT_READLATCHREGISTERVALUE 201
137 if (i_ReturnValue >= 0) 137#define APCI1710_INCCPT_READ16BITCOUNTERVALUE 202
138 i_ReturnValue = insn->n; 138#define APCI1710_INCCPT_READ32BITCOUNTERVALUE 203
139 return i_ReturnValue; 139#define APCI1710_INCCPT_GETINDEXSTATUS 204
140} 140#define APCI1710_INCCPT_GETREFERENCESTATUS 205
141#define APCI1710_INCCPT_GETUASSTATUS 206
142#define APCI1710_INCCPT_GETCBSTATUS 207
143#define APCI1710_INCCPT_GET16BITCBSTATUS 208
144#define APCI1710_INCCPT_GETUDSTATUS 209
145#define APCI1710_INCCPT_GETINTERRUPTUDLATCHEDSTATUS 210
146#define APCI1710_INCCPT_READFREQUENCYMEASUREMENT 211
147#define APCI1710_INCCPT_READINTERRUPT 212
148
149/* INSN BITS */
150#define APCI1710_INCCPT_CLEARCOUNTERVALUE 300
151#define APCI1710_INCCPT_CLEARALLCOUNTERVALUE 301
152#define APCI1710_INCCPT_SETINPUTFILTER 302
153#define APCI1710_INCCPT_LATCHCOUNTER 303
154#define APCI1710_INCCPT_SETINDEXANDREFERENCESOURCE 304
155#define APCI1710_INCCPT_SETDIGITALCHLON 305
156#define APCI1710_INCCPT_SETDIGITALCHLOFF 306
157
158/* INSN WRITE */
159#define APCI1710_INCCPT_ENABLELATCHINTERRUPT 400
160#define APCI1710_INCCPT_DISABLELATCHINTERRUPT 401
161#define APCI1710_INCCPT_WRITE16BITCOUNTERVALUE 402
162#define APCI1710_INCCPT_WRITE32BITCOUNTERVALUE 403
163#define APCI1710_INCCPT_ENABLEINDEX 404
164#define APCI1710_INCCPT_DISABLEINDEX 405
165#define APCI1710_INCCPT_ENABLECOMPARELOGIC 406
166#define APCI1710_INCCPT_DISABLECOMPARELOGIC 407
167#define APCI1710_INCCPT_ENABLEFREQUENCYMEASUREMENT 408
168#define APCI1710_INCCPT_DISABLEFREQUENCYMEASUREMENT 409
141 169
142/* 170/*
143+----------------------------------------------------------------------------+ 171+----------------------------------------------------------------------------+
@@ -298,14 +326,15 @@ int i_APCI1710_InsnConfigINCCPT(struct comedi_device *dev, struct comedi_subdevi
298| wrong. | 326| wrong. |
299+----------------------------------------------------------------------------+ 327+----------------------------------------------------------------------------+
300*/ 328*/
301 329static int i_APCI1710_InitCounter(struct comedi_device *dev,
302int i_APCI1710_InitCounter(struct comedi_device *dev, 330 unsigned char b_ModulNbr,
303 unsigned char b_ModulNbr, 331 unsigned char b_CounterRange,
304 unsigned char b_CounterRange, 332 unsigned char b_FirstCounterModus,
305 unsigned char b_FirstCounterModus, 333 unsigned char b_FirstCounterOption,
306 unsigned char b_FirstCounterOption, 334 unsigned char b_SecondCounterModus,
307 unsigned char b_SecondCounterModus, unsigned char b_SecondCounterOption) 335 unsigned char b_SecondCounterOption)
308{ 336{
337 struct addi_private *devpriv = dev->private;
309 int i_ReturnValue = 0; 338 int i_ReturnValue = 0;
310 339
311 /*******************************/ 340 /*******************************/
@@ -544,9 +573,10 @@ int i_APCI1710_InitCounter(struct comedi_device *dev,
544| -2: No counter module found | 573| -2: No counter module found |
545+----------------------------------------------------------------------------+ 574+----------------------------------------------------------------------------+
546*/ 575*/
547 576static int i_APCI1710_CounterAutoTest(struct comedi_device *dev,
548int i_APCI1710_CounterAutoTest(struct comedi_device *dev, unsigned char *pb_TestStatus) 577 unsigned char *pb_TestStatus)
549{ 578{
579 struct addi_private *devpriv = dev->private;
550 unsigned char b_ModulCpt = 0; 580 unsigned char b_ModulCpt = 0;
551 int i_ReturnValue = 0; 581 int i_ReturnValue = 0;
552 unsigned int dw_LathchValue; 582 unsigned int dw_LathchValue;
@@ -707,12 +737,14 @@ int i_APCI1710_CounterAutoTest(struct comedi_device *dev, unsigned char *pb_Test
707| See function "i_APCI1710_SetBoardIntRoutineX" | 737| See function "i_APCI1710_SetBoardIntRoutineX" |
708+----------------------------------------------------------------------------+ 738+----------------------------------------------------------------------------+
709*/ 739*/
710 740static int i_APCI1710_InitIndex(struct comedi_device *dev,
711int i_APCI1710_InitIndex(struct comedi_device *dev, 741 unsigned char b_ModulNbr,
712 unsigned char b_ModulNbr, 742 unsigned char b_ReferenceAction,
713 unsigned char b_ReferenceAction, 743 unsigned char b_IndexOperation,
714 unsigned char b_IndexOperation, unsigned char b_AutoMode, unsigned char b_InterruptEnable) 744 unsigned char b_AutoMode,
745 unsigned char b_InterruptEnable)
715{ 746{
747 struct addi_private *devpriv = dev->private;
716 int i_ReturnValue = 0; 748 int i_ReturnValue = 0;
717 749
718 /**************************/ 750 /**************************/
@@ -1151,10 +1183,11 @@ int i_APCI1710_InitIndex(struct comedi_device *dev,
1151| -4: Reference level parameter is wrong | 1183| -4: Reference level parameter is wrong |
1152+----------------------------------------------------------------------------+ 1184+----------------------------------------------------------------------------+
1153*/ 1185*/
1154 1186static int i_APCI1710_InitReference(struct comedi_device *dev,
1155int i_APCI1710_InitReference(struct comedi_device *dev, 1187 unsigned char b_ModulNbr,
1156 unsigned char b_ModulNbr, unsigned char b_ReferenceLevel) 1188 unsigned char b_ReferenceLevel)
1157{ 1189{
1190 struct addi_private *devpriv = dev->private;
1158 int i_ReturnValue = 0; 1191 int i_ReturnValue = 0;
1159 1192
1160 /**************************/ 1193 /**************************/
@@ -1276,10 +1309,12 @@ int i_APCI1710_InitReference(struct comedi_device *dev,
1276| -5: External strobe level parameter is wrong | 1309| -5: External strobe level parameter is wrong |
1277+----------------------------------------------------------------------------+ 1310+----------------------------------------------------------------------------+
1278*/ 1311*/
1279 1312static int i_APCI1710_InitExternalStrobe(struct comedi_device *dev,
1280int i_APCI1710_InitExternalStrobe(struct comedi_device *dev, 1313 unsigned char b_ModulNbr,
1281 unsigned char b_ModulNbr, unsigned char b_ExternalStrobe, unsigned char b_ExternalStrobeLevel) 1314 unsigned char b_ExternalStrobe,
1315 unsigned char b_ExternalStrobeLevel)
1282{ 1316{
1317 struct addi_private *devpriv = dev->private;
1283 int i_ReturnValue = 0; 1318 int i_ReturnValue = 0;
1284 1319
1285 /**************************/ 1320 /**************************/
@@ -1390,10 +1425,11 @@ int i_APCI1710_InitExternalStrobe(struct comedi_device *dev,
1390 | "i_APCI1710_InitCounter" | 1425 | "i_APCI1710_InitCounter" |
1391 +----------------------------------------------------------------------------+ 1426 +----------------------------------------------------------------------------+
1392 */ 1427 */
1393 1428static int i_APCI1710_InitCompareLogic(struct comedi_device *dev,
1394int i_APCI1710_InitCompareLogic(struct comedi_device *dev, 1429 unsigned char b_ModulNbr,
1395 unsigned char b_ModulNbr, unsigned int ui_CompareValue) 1430 unsigned int ui_CompareValue)
1396{ 1431{
1432 struct addi_private *devpriv = dev->private;
1397 int i_ReturnValue = 0; 1433 int i_ReturnValue = 0;
1398 1434
1399 /**************************/ 1435 /**************************/
@@ -1486,13 +1522,14 @@ int i_APCI1710_InitCompareLogic(struct comedi_device *dev,
1486| -7: 40MHz quartz not on board | 1522| -7: 40MHz quartz not on board |
1487+----------------------------------------------------------------------------+ 1523+----------------------------------------------------------------------------+
1488*/ 1524*/
1489 1525static int i_APCI1710_InitFrequencyMeasurement(struct comedi_device *dev,
1490int i_APCI1710_InitFrequencyMeasurement(struct comedi_device *dev, 1526 unsigned char b_ModulNbr,
1491 unsigned char b_ModulNbr, 1527 unsigned char b_PCIInputClock,
1492 unsigned char b_PCIInputClock, 1528 unsigned char b_TimingUnity,
1493 unsigned char b_TimingUnity, 1529 unsigned int ul_TimingInterval,
1494 unsigned int ul_TimingInterval, unsigned int *pul_RealTimingInterval) 1530 unsigned int *pul_RealTimingInterval)
1495{ 1531{
1532 struct addi_private *devpriv = dev->private;
1496 int i_ReturnValue = 0; 1533 int i_ReturnValue = 0;
1497 unsigned int ul_TimerValue = 0; 1534 unsigned int ul_TimerValue = 0;
1498 double d_RealTimingInterval; 1535 double d_RealTimingInterval;
@@ -1995,72 +2032,70 @@ int i_APCI1710_InitFrequencyMeasurement(struct comedi_device *dev,
1995 return i_ReturnValue; 2032 return i_ReturnValue;
1996} 2033}
1997 2034
1998/*########################################################################### */
1999
2000 /* INSN BITS */
2001/*########################################################################### */
2002
2003/* 2035/*
2004+----------------------------------------------------------------------------+ 2036 * Configuration function for INC_CPT
2005| Function Name :INT i_APCI1710_InsnBitsINCCPT(struct comedi_device *dev,struct comedi_subdevice *s, 2037 */
2006struct comedi_insn *insn,unsigned int *data) | 2038static int i_APCI1710_InsnConfigINCCPT(struct comedi_device *dev,
2007+----------------------------------------------------------------------------+ 2039 struct comedi_subdevice *s,
2008| Task : Set & Clear Functions for INC_CPT | 2040 struct comedi_insn *insn,
2009+----------------------------------------------------------------------------+ 2041 unsigned int *data)
2010| Input Parameters :
2011+----------------------------------------------------------------------------+
2012| Output Parameters : - |
2013+----------------------------------------------------------------------------+
2014| Return Value :
2015+----------------------------------------------------------------------------+
2016*/
2017
2018int i_APCI1710_InsnBitsINCCPT(struct comedi_device *dev, struct comedi_subdevice *s,
2019 struct comedi_insn *insn, unsigned int *data)
2020{ 2042{
2021 unsigned int ui_BitsType; 2043 struct addi_private *devpriv = dev->private;
2044 unsigned int ui_ConfigType;
2022 int i_ReturnValue = 0; 2045 int i_ReturnValue = 0;
2023 ui_BitsType = CR_CHAN(insn->chanspec);
2024 devpriv->tsk_Current = current; /* Save the current process task structure */
2025 2046
2026 switch (ui_BitsType) { 2047 ui_ConfigType = CR_CHAN(insn->chanspec);
2027 case APCI1710_INCCPT_CLEARCOUNTERVALUE: 2048
2028 i_ReturnValue = i_APCI1710_ClearCounterValue(dev, 2049 printk("\nINC_CPT");
2029 (unsigned char) CR_AREF(insn->chanspec)); 2050
2051 devpriv->tsk_Current = current; /* Save the current process task structure */
2052 switch (ui_ConfigType) {
2053 case APCI1710_INCCPT_INITCOUNTER:
2054 i_ReturnValue = i_APCI1710_InitCounter(dev,
2055 CR_AREF(insn->chanspec),
2056 (unsigned char) data[0],
2057 (unsigned char) data[1],
2058 (unsigned char) data[2], (unsigned char) data[3], (unsigned char) data[4]);
2030 break; 2059 break;
2031 2060
2032 case APCI1710_INCCPT_CLEARALLCOUNTERVALUE: 2061 case APCI1710_INCCPT_COUNTERAUTOTEST:
2033 i_ReturnValue = i_APCI1710_ClearAllCounterValue(dev); 2062 i_ReturnValue = i_APCI1710_CounterAutoTest(dev,
2063 (unsigned char *) &data[0]);
2034 break; 2064 break;
2035 2065
2036 case APCI1710_INCCPT_SETINPUTFILTER: 2066 case APCI1710_INCCPT_INITINDEX:
2037 i_ReturnValue = i_APCI1710_SetInputFilter(dev, 2067 i_ReturnValue = i_APCI1710_InitIndex(dev,
2038 (unsigned char) CR_AREF(insn->chanspec), 2068 CR_AREF(insn->chanspec),
2039 (unsigned char) data[0], (unsigned char) data[1]); 2069 (unsigned char) data[0],
2070 (unsigned char) data[1], (unsigned char) data[2], (unsigned char) data[3]);
2040 break; 2071 break;
2041 2072
2042 case APCI1710_INCCPT_LATCHCOUNTER: 2073 case APCI1710_INCCPT_INITREFERENCE:
2043 i_ReturnValue = i_APCI1710_LatchCounter(dev, 2074 i_ReturnValue = i_APCI1710_InitReference(dev,
2044 (unsigned char) CR_AREF(insn->chanspec), (unsigned char) data[0]); 2075 CR_AREF(insn->chanspec), (unsigned char) data[0]);
2045 break; 2076 break;
2046 2077
2047 case APCI1710_INCCPT_SETINDEXANDREFERENCESOURCE: 2078 case APCI1710_INCCPT_INITEXTERNALSTROBE:
2048 i_ReturnValue = i_APCI1710_SetIndexAndReferenceSource(dev, 2079 i_ReturnValue = i_APCI1710_InitExternalStrobe(dev,
2049 (unsigned char) CR_AREF(insn->chanspec), (unsigned char) data[0]); 2080 CR_AREF(insn->chanspec),
2081 (unsigned char) data[0], (unsigned char) data[1]);
2050 break; 2082 break;
2051 2083
2052 case APCI1710_INCCPT_SETDIGITALCHLON: 2084 case APCI1710_INCCPT_INITCOMPARELOGIC:
2053 i_ReturnValue = i_APCI1710_SetDigitalChlOn(dev, 2085 i_ReturnValue = i_APCI1710_InitCompareLogic(dev,
2054 (unsigned char) CR_AREF(insn->chanspec)); 2086 CR_AREF(insn->chanspec), (unsigned int) data[0]);
2055 break; 2087 break;
2056 2088
2057 case APCI1710_INCCPT_SETDIGITALCHLOFF: 2089 case APCI1710_INCCPT_INITFREQUENCYMEASUREMENT:
2058 i_ReturnValue = i_APCI1710_SetDigitalChlOff(dev, 2090 i_ReturnValue = i_APCI1710_InitFrequencyMeasurement(dev,
2059 (unsigned char) CR_AREF(insn->chanspec)); 2091 CR_AREF(insn->chanspec),
2092 (unsigned char) data[0],
2093 (unsigned char) data[1], (unsigned int) data[2], (unsigned int *) &data[0]);
2060 break; 2094 break;
2061 2095
2062 default: 2096 default:
2063 printk("Bits Config Parameter Wrong\n"); 2097 printk("Insn Config : Config Parameter Wrong\n");
2098
2064 } 2099 }
2065 2100
2066 if (i_ReturnValue >= 0) 2101 if (i_ReturnValue >= 0)
@@ -2090,9 +2125,10 @@ int i_APCI1710_InsnBitsINCCPT(struct comedi_device *dev, struct comedi_subdevice
2090| "i_APCI1710_InitCounter" | 2125| "i_APCI1710_InitCounter" |
2091+----------------------------------------------------------------------------+ 2126+----------------------------------------------------------------------------+
2092*/ 2127*/
2093 2128static int i_APCI1710_ClearCounterValue(struct comedi_device *dev,
2094int i_APCI1710_ClearCounterValue(struct comedi_device *dev, unsigned char b_ModulNbr) 2129 unsigned char b_ModulNbr)
2095{ 2130{
2131 struct addi_private *devpriv = dev->private;
2096 int i_ReturnValue = 0; 2132 int i_ReturnValue = 0;
2097 2133
2098 /**************************/ 2134 /**************************/
@@ -2150,9 +2186,9 @@ int i_APCI1710_ClearCounterValue(struct comedi_device *dev, unsigned char b_Modu
2150| -2: No counter module found | 2186| -2: No counter module found |
2151+----------------------------------------------------------------------------+ 2187+----------------------------------------------------------------------------+
2152*/ 2188*/
2153 2189static int i_APCI1710_ClearAllCounterValue(struct comedi_device *dev)
2154int i_APCI1710_ClearAllCounterValue(struct comedi_device *dev)
2155{ 2190{
2191 struct addi_private *devpriv = dev->private;
2156 unsigned char b_ModulCpt = 0; 2192 unsigned char b_ModulCpt = 0;
2157 int i_ReturnValue = 0; 2193 int i_ReturnValue = 0;
2158 2194
@@ -2296,10 +2332,12 @@ int i_APCI1710_ClearAllCounterValue(struct comedi_device *dev)
2296| -6: 40MHz quartz not on board | 2332| -6: 40MHz quartz not on board |
2297+----------------------------------------------------------------------------+ 2333+----------------------------------------------------------------------------+
2298*/ 2334*/
2299 2335static int i_APCI1710_SetInputFilter(struct comedi_device *dev,
2300int i_APCI1710_SetInputFilter(struct comedi_device *dev, 2336 unsigned char b_ModulNbr,
2301 unsigned char b_ModulNbr, unsigned char b_PCIInputClock, unsigned char b_Filter) 2337 unsigned char b_PCIInputClock,
2338 unsigned char b_Filter)
2302{ 2339{
2340 struct addi_private *devpriv = dev->private;
2303 int i_ReturnValue = 0; 2341 int i_ReturnValue = 0;
2304 unsigned int dw_Status = 0; 2342 unsigned int dw_Status = 0;
2305 2343
@@ -2560,10 +2598,11 @@ int i_APCI1710_SetInputFilter(struct comedi_device *dev,
2560| -4: The selected latch register parameter is wrong | 2598| -4: The selected latch register parameter is wrong |
2561+----------------------------------------------------------------------------+ 2599+----------------------------------------------------------------------------+
2562*/ 2600*/
2563 2601static int i_APCI1710_LatchCounter(struct comedi_device *dev,
2564int i_APCI1710_LatchCounter(struct comedi_device *dev, 2602 unsigned char b_ModulNbr,
2565 unsigned char b_ModulNbr, unsigned char b_LatchReg) 2603 unsigned char b_LatchReg)
2566{ 2604{
2605 struct addi_private *devpriv = dev->private;
2567 int i_ReturnValue = 0; 2606 int i_ReturnValue = 0;
2568 2607
2569 /**************************/ 2608 /**************************/
@@ -2657,10 +2696,11 @@ int i_APCI1710_LatchCounter(struct comedi_device *dev,
2657| -4: The source selection is wrong | 2696| -4: The source selection is wrong |
2658+----------------------------------------------------------------------------+ 2697+----------------------------------------------------------------------------+
2659*/ 2698*/
2660 2699static int i_APCI1710_SetIndexAndReferenceSource(struct comedi_device *dev,
2661int i_APCI1710_SetIndexAndReferenceSource(struct comedi_device *dev, 2700 unsigned char b_ModulNbr,
2662 unsigned char b_ModulNbr, unsigned char b_SourceSelection) 2701 unsigned char b_SourceSelection)
2663{ 2702{
2703 struct addi_private *devpriv = dev->private;
2664 int i_ReturnValue = 0; 2704 int i_ReturnValue = 0;
2665 2705
2666 /**************************/ 2706 /**************************/
@@ -2794,9 +2834,10 @@ int i_APCI1710_SetIndexAndReferenceSource(struct comedi_device *dev,
2794| "i_APCI1710_InitCounter" | 2834| "i_APCI1710_InitCounter" |
2795+----------------------------------------------------------------------------+ 2835+----------------------------------------------------------------------------+
2796*/ 2836*/
2797 2837static int i_APCI1710_SetDigitalChlOn(struct comedi_device *dev,
2798int i_APCI1710_SetDigitalChlOn(struct comedi_device *dev, unsigned char b_ModulNbr) 2838 unsigned char b_ModulNbr)
2799{ 2839{
2840 struct addi_private *devpriv = dev->private;
2800 int i_ReturnValue = 0; 2841 int i_ReturnValue = 0;
2801 2842
2802 /**************************/ 2843 /**************************/
@@ -2874,9 +2915,10 @@ int i_APCI1710_SetDigitalChlOn(struct comedi_device *dev, unsigned char b_ModulN
2874| "i_APCI1710_InitCounter" | 2915| "i_APCI1710_InitCounter" |
2875+----------------------------------------------------------------------------+ 2916+----------------------------------------------------------------------------+
2876*/ 2917*/
2877 2918static int i_APCI1710_SetDigitalChlOff(struct comedi_device *dev,
2878int i_APCI1710_SetDigitalChlOff(struct comedi_device *dev, unsigned char b_ModulNbr) 2919 unsigned char b_ModulNbr)
2879{ 2920{
2921 struct addi_private *devpriv = dev->private;
2880 int i_ReturnValue = 0; 2922 int i_ReturnValue = 0;
2881 2923
2882 /**************************/ 2924 /**************************/
@@ -2932,88 +2974,59 @@ int i_APCI1710_SetDigitalChlOff(struct comedi_device *dev, unsigned char b_Modul
2932 return i_ReturnValue; 2974 return i_ReturnValue;
2933} 2975}
2934 2976
2935/*########################################################################### */
2936
2937 /* INSN WRITE */
2938/*########################################################################### */
2939
2940/* 2977/*
2941+----------------------------------------------------------------------------+ 2978 * Set & Clear Functions for INC_CPT
2942| Function Name :INT i_APCI1710_InsnWriteINCCPT(struct comedi_device *dev,struct comedi_subdevice *s, 2979 */
2943struct comedi_insn *insn,unsigned int *data) | 2980static int i_APCI1710_InsnBitsINCCPT(struct comedi_device *dev,
2944+----------------------------------------------------------------------------+ 2981 struct comedi_subdevice *s,
2945| Task : Enable Disable functions for INC_CPT | 2982 struct comedi_insn *insn,
2946+----------------------------------------------------------------------------+ 2983 unsigned int *data)
2947| Input Parameters :
2948+----------------------------------------------------------------------------+
2949| Output Parameters : - |
2950+----------------------------------------------------------------------------+
2951| Return Value :
2952+----------------------------------------------------------------------------+
2953*/
2954int i_APCI1710_InsnWriteINCCPT(struct comedi_device *dev, struct comedi_subdevice *s,
2955 struct comedi_insn *insn, unsigned int *data)
2956{ 2984{
2957 unsigned int ui_WriteType; 2985 struct addi_private *devpriv = dev->private;
2986 unsigned int ui_BitsType;
2958 int i_ReturnValue = 0; 2987 int i_ReturnValue = 0;
2959 2988
2960 ui_WriteType = CR_CHAN(insn->chanspec); 2989 ui_BitsType = CR_CHAN(insn->chanspec);
2961 devpriv->tsk_Current = current; /* Save the current process task structure */ 2990 devpriv->tsk_Current = current; /* Save the current process task structure */
2962 2991
2963 switch (ui_WriteType) { 2992 switch (ui_BitsType) {
2964 case APCI1710_INCCPT_ENABLELATCHINTERRUPT: 2993 case APCI1710_INCCPT_CLEARCOUNTERVALUE:
2965 i_ReturnValue = i_APCI1710_EnableLatchInterrupt(dev, 2994 i_ReturnValue = i_APCI1710_ClearCounterValue(dev,
2966 (unsigned char) CR_AREF(insn->chanspec)); 2995 (unsigned char) CR_AREF(insn->chanspec));
2967 break; 2996 break;
2968 2997
2969 case APCI1710_INCCPT_DISABLELATCHINTERRUPT: 2998 case APCI1710_INCCPT_CLEARALLCOUNTERVALUE:
2970 i_ReturnValue = i_APCI1710_DisableLatchInterrupt(dev, 2999 i_ReturnValue = i_APCI1710_ClearAllCounterValue(dev);
2971 (unsigned char) CR_AREF(insn->chanspec));
2972 break; 3000 break;
2973 3001
2974 case APCI1710_INCCPT_WRITE16BITCOUNTERVALUE: 3002 case APCI1710_INCCPT_SETINPUTFILTER:
2975 i_ReturnValue = i_APCI1710_Write16BitCounterValue(dev, 3003 i_ReturnValue = i_APCI1710_SetInputFilter(dev,
2976 (unsigned char) CR_AREF(insn->chanspec), 3004 (unsigned char) CR_AREF(insn->chanspec),
2977 (unsigned char) data[0], (unsigned int) data[1]); 3005 (unsigned char) data[0], (unsigned char) data[1]);
2978 break;
2979
2980 case APCI1710_INCCPT_WRITE32BITCOUNTERVALUE:
2981 i_ReturnValue = i_APCI1710_Write32BitCounterValue(dev,
2982 (unsigned char) CR_AREF(insn->chanspec), (unsigned int) data[0]);
2983
2984 break;
2985
2986 case APCI1710_INCCPT_ENABLEINDEX:
2987 i_APCI1710_EnableIndex(dev, (unsigned char) CR_AREF(insn->chanspec));
2988 break; 3006 break;
2989 3007
2990 case APCI1710_INCCPT_DISABLEINDEX: 3008 case APCI1710_INCCPT_LATCHCOUNTER:
2991 i_ReturnValue = i_APCI1710_DisableIndex(dev, 3009 i_ReturnValue = i_APCI1710_LatchCounter(dev,
2992 (unsigned char) CR_AREF(insn->chanspec)); 3010 (unsigned char) CR_AREF(insn->chanspec), (unsigned char) data[0]);
2993 break; 3011 break;
2994 3012
2995 case APCI1710_INCCPT_ENABLECOMPARELOGIC: 3013 case APCI1710_INCCPT_SETINDEXANDREFERENCESOURCE:
2996 i_ReturnValue = i_APCI1710_EnableCompareLogic(dev, 3014 i_ReturnValue = i_APCI1710_SetIndexAndReferenceSource(dev,
2997 (unsigned char) CR_AREF(insn->chanspec)); 3015 (unsigned char) CR_AREF(insn->chanspec), (unsigned char) data[0]);
2998 break; 3016 break;
2999 3017
3000 case APCI1710_INCCPT_DISABLECOMPARELOGIC: 3018 case APCI1710_INCCPT_SETDIGITALCHLON:
3001 i_ReturnValue = i_APCI1710_DisableCompareLogic(dev, 3019 i_ReturnValue = i_APCI1710_SetDigitalChlOn(dev,
3002 (unsigned char) CR_AREF(insn->chanspec)); 3020 (unsigned char) CR_AREF(insn->chanspec));
3003 break; 3021 break;
3004 3022
3005 case APCI1710_INCCPT_ENABLEFREQUENCYMEASUREMENT: 3023 case APCI1710_INCCPT_SETDIGITALCHLOFF:
3006 i_ReturnValue = i_APCI1710_EnableFrequencyMeasurement(dev, 3024 i_ReturnValue = i_APCI1710_SetDigitalChlOff(dev,
3007 (unsigned char) CR_AREF(insn->chanspec), (unsigned char) data[0]);
3008 break;
3009
3010 case APCI1710_INCCPT_DISABLEFREQUENCYMEASUREMENT:
3011 i_ReturnValue = i_APCI1710_DisableFrequencyMeasurement(dev,
3012 (unsigned char) CR_AREF(insn->chanspec)); 3025 (unsigned char) CR_AREF(insn->chanspec));
3013 break; 3026 break;
3014 3027
3015 default: 3028 default:
3016 printk("Write Config Parameter Wrong\n"); 3029 printk("Bits Config Parameter Wrong\n");
3017 } 3030 }
3018 3031
3019 if (i_ReturnValue >= 0) 3032 if (i_ReturnValue >= 0)
@@ -3046,9 +3059,10 @@ int i_APCI1710_InsnWriteINCCPT(struct comedi_device *dev, struct comedi_subdevic
3046| "i_APCI1710_SetBoardIntRoutine" | 3059| "i_APCI1710_SetBoardIntRoutine" |
3047+----------------------------------------------------------------------------+ 3060+----------------------------------------------------------------------------+
3048*/ 3061*/
3049 3062static int i_APCI1710_EnableLatchInterrupt(struct comedi_device *dev,
3050int i_APCI1710_EnableLatchInterrupt(struct comedi_device *dev, unsigned char b_ModulNbr) 3063 unsigned char b_ModulNbr)
3051{ 3064{
3065 struct addi_private *devpriv = dev->private;
3052 int i_ReturnValue = 0; 3066 int i_ReturnValue = 0;
3053 3067
3054 /**************************/ 3068 /**************************/
@@ -3132,9 +3146,10 @@ int i_APCI1710_EnableLatchInterrupt(struct comedi_device *dev, unsigned char b_M
3132| "i_APCI1710_SetBoardIntRoutine" | 3146| "i_APCI1710_SetBoardIntRoutine" |
3133+----------------------------------------------------------------------------+ 3147+----------------------------------------------------------------------------+
3134*/ 3148*/
3135 3149static int i_APCI1710_DisableLatchInterrupt(struct comedi_device *dev,
3136int i_APCI1710_DisableLatchInterrupt(struct comedi_device *dev, unsigned char b_ModulNbr) 3150 unsigned char b_ModulNbr)
3137{ 3151{
3152 struct addi_private *devpriv = dev->private;
3138 int i_ReturnValue = 0; 3153 int i_ReturnValue = 0;
3139 3154
3140 /**************************/ 3155 /**************************/
@@ -3230,10 +3245,12 @@ int i_APCI1710_DisableLatchInterrupt(struct comedi_device *dev, unsigned char b_
3230| -4: The selected 16-Bit counter parameter is wrong | 3245| -4: The selected 16-Bit counter parameter is wrong |
3231+----------------------------------------------------------------------------+ 3246+----------------------------------------------------------------------------+
3232*/ 3247*/
3233 3248static int i_APCI1710_Write16BitCounterValue(struct comedi_device *dev,
3234int i_APCI1710_Write16BitCounterValue(struct comedi_device *dev, 3249 unsigned char b_ModulNbr,
3235 unsigned char b_ModulNbr, unsigned char b_SelectedCounter, unsigned int ui_WriteValue) 3250 unsigned char b_SelectedCounter,
3251 unsigned int ui_WriteValue)
3236{ 3252{
3253 struct addi_private *devpriv = dev->private;
3237 int i_ReturnValue = 0; 3254 int i_ReturnValue = 0;
3238 3255
3239 /**************************/ 3256 /**************************/
@@ -3315,10 +3332,11 @@ int i_APCI1710_Write16BitCounterValue(struct comedi_device *dev,
3315| "i_APCI1710_InitCounter" | 3332| "i_APCI1710_InitCounter" |
3316+----------------------------------------------------------------------------+ 3333+----------------------------------------------------------------------------+
3317*/ 3334*/
3318 3335static int i_APCI1710_Write32BitCounterValue(struct comedi_device *dev,
3319int i_APCI1710_Write32BitCounterValue(struct comedi_device *dev, 3336 unsigned char b_ModulNbr,
3320 unsigned char b_ModulNbr, unsigned int ul_WriteValue) 3337 unsigned int ul_WriteValue)
3321{ 3338{
3339 struct addi_private *devpriv = dev->private;
3322 int i_ReturnValue = 0; 3340 int i_ReturnValue = 0;
3323 3341
3324 /**************************/ 3342 /**************************/
@@ -3382,9 +3400,10 @@ int i_APCI1710_Write32BitCounterValue(struct comedi_device *dev,
3382| "i_APCI1710_InitIndex" | 3400| "i_APCI1710_InitIndex" |
3383+----------------------------------------------------------------------------+ 3401+----------------------------------------------------------------------------+
3384*/ 3402*/
3385 3403static int i_APCI1710_EnableIndex(struct comedi_device *dev,
3386int i_APCI1710_EnableIndex(struct comedi_device *dev, unsigned char b_ModulNbr) 3404 unsigned char b_ModulNbr)
3387{ 3405{
3406 struct addi_private *devpriv = dev->private;
3388 int i_ReturnValue = 0; 3407 int i_ReturnValue = 0;
3389 unsigned int ul_InterruptLatchReg; 3408 unsigned int ul_InterruptLatchReg;
3390 3409
@@ -3480,9 +3499,10 @@ int i_APCI1710_EnableIndex(struct comedi_device *dev, unsigned char b_ModulNbr)
3480| "i_APCI1710_InitIndex" | 3499| "i_APCI1710_InitIndex" |
3481+----------------------------------------------------------------------------+ 3500+----------------------------------------------------------------------------+
3482*/ 3501*/
3483 3502static int i_APCI1710_DisableIndex(struct comedi_device *dev,
3484int i_APCI1710_DisableIndex(struct comedi_device *dev, unsigned char b_ModulNbr) 3503 unsigned char b_ModulNbr)
3485{ 3504{
3505 struct addi_private *devpriv = dev->private;
3486 int i_ReturnValue = 0; 3506 int i_ReturnValue = 0;
3487 3507
3488 /**************************/ 3508 /**************************/
@@ -3579,9 +3599,10 @@ int i_APCI1710_DisableIndex(struct comedi_device *dev, unsigned char b_ModulNbr)
3579| See function "i_APCI1710_SetBoardIntRoutineX" | 3599| See function "i_APCI1710_SetBoardIntRoutineX" |
3580+----------------------------------------------------------------------------+ 3600+----------------------------------------------------------------------------+
3581*/ 3601*/
3582 3602static int i_APCI1710_EnableCompareLogic(struct comedi_device *dev,
3583int i_APCI1710_EnableCompareLogic(struct comedi_device *dev, unsigned char b_ModulNbr) 3603 unsigned char b_ModulNbr)
3584{ 3604{
3605 struct addi_private *devpriv = dev->private;
3585 int i_ReturnValue = 0; 3606 int i_ReturnValue = 0;
3586 3607
3587 /**************************/ 3608 /**************************/
@@ -3679,9 +3700,10 @@ int i_APCI1710_EnableCompareLogic(struct comedi_device *dev, unsigned char b_Mod
3679| See function "i_APCI1710_InitCompareLogic" | 3700| See function "i_APCI1710_InitCompareLogic" |
3680+----------------------------------------------------------------------------+ 3701+----------------------------------------------------------------------------+
3681*/ 3702*/
3682 3703static int i_APCI1710_DisableCompareLogic(struct comedi_device *dev,
3683int i_APCI1710_DisableCompareLogic(struct comedi_device *dev, unsigned char b_ModulNbr) 3704 unsigned char b_ModulNbr)
3684{ 3705{
3706 struct addi_private *devpriv = dev->private;
3685 int i_ReturnValue = 0; 3707 int i_ReturnValue = 0;
3686 3708
3687 /**************************/ 3709 /**************************/
@@ -3788,10 +3810,11 @@ int i_APCI1710_DisableCompareLogic(struct comedi_device *dev, unsigned char b_Mo
3788 | -6: Interrupt function not initialised. | 3810 | -6: Interrupt function not initialised. |
3789 +----------------------------------------------------------------------------+ 3811 +----------------------------------------------------------------------------+
3790 */ 3812 */
3791 3813static int i_APCI1710_EnableFrequencyMeasurement(struct comedi_device *dev,
3792int i_APCI1710_EnableFrequencyMeasurement(struct comedi_device *dev, 3814 unsigned char b_ModulNbr,
3793 unsigned char b_ModulNbr, unsigned char b_InterruptEnable) 3815 unsigned char b_InterruptEnable)
3794{ 3816{
3817 struct addi_private *devpriv = dev->private;
3795 int i_ReturnValue = 0; 3818 int i_ReturnValue = 0;
3796 3819
3797 /**************************/ 3820 /**************************/
@@ -3935,9 +3958,10 @@ int i_APCI1710_EnableFrequencyMeasurement(struct comedi_device *dev,
3935 | See function "i_APCI1710_InitFrequencyMeasurement" | 3958 | See function "i_APCI1710_InitFrequencyMeasurement" |
3936 +----------------------------------------------------------------------------+ 3959 +----------------------------------------------------------------------------+
3937 */ 3960 */
3938 3961static int i_APCI1710_DisableFrequencyMeasurement(struct comedi_device *dev,
3939int i_APCI1710_DisableFrequencyMeasurement(struct comedi_device *dev, unsigned char b_ModulNbr) 3962 unsigned char b_ModulNbr)
3940{ 3963{
3964 struct addi_private *devpriv = dev->private;
3941 int i_ReturnValue = 0; 3965 int i_ReturnValue = 0;
3942 3966
3943 /**************************/ 3967 /**************************/
@@ -4029,134 +4053,80 @@ int i_APCI1710_DisableFrequencyMeasurement(struct comedi_device *dev, unsigned c
4029 return i_ReturnValue; 4053 return i_ReturnValue;
4030} 4054}
4031 4055
4032/*########################################################################### */
4033
4034 /* INSN READ */
4035
4036/*########################################################################### */
4037
4038/* 4056/*
4039+----------------------------------------------------------------------------+ 4057 * Enable Disable functions for INC_CPT
4040| Function Name :INT i_APCI1710_InsnWriteINCCPT(struct comedi_device *dev,struct comedi_subdevice *s, 4058 */
4041struct comedi_insn *insn,unsigned int *data) | 4059static int i_APCI1710_InsnWriteINCCPT(struct comedi_device *dev,
4042+----------------------------------------------------------------------------+ 4060 struct comedi_subdevice *s,
4043| Task : Read and Get functions for INC_CPT | 4061 struct comedi_insn *insn,
4044+----------------------------------------------------------------------------+ 4062 unsigned int *data)
4045| Input Parameters :
4046+----------------------------------------------------------------------------+
4047| Output Parameters : - |
4048+----------------------------------------------------------------------------+
4049| Return Value :
4050+----------------------------------------------------------------------------+
4051*/
4052int i_APCI1710_InsnReadINCCPT(struct comedi_device *dev, struct comedi_subdevice *s,
4053 struct comedi_insn *insn, unsigned int *data)
4054{ 4063{
4055 unsigned int ui_ReadType; 4064 struct addi_private *devpriv = dev->private;
4065 unsigned int ui_WriteType;
4056 int i_ReturnValue = 0; 4066 int i_ReturnValue = 0;
4057 4067
4058 ui_ReadType = CR_CHAN(insn->chanspec); 4068 ui_WriteType = CR_CHAN(insn->chanspec);
4059
4060 devpriv->tsk_Current = current; /* Save the current process task structure */ 4069 devpriv->tsk_Current = current; /* Save the current process task structure */
4061 switch (ui_ReadType) {
4062 case APCI1710_INCCPT_READLATCHREGISTERSTATUS:
4063 i_ReturnValue = i_APCI1710_ReadLatchRegisterStatus(dev,
4064 (unsigned char) CR_AREF(insn->chanspec),
4065 (unsigned char) CR_RANGE(insn->chanspec), (unsigned char *) &data[0]);
4066 break;
4067 4070
4068 case APCI1710_INCCPT_READLATCHREGISTERVALUE: 4071 switch (ui_WriteType) {
4069 i_ReturnValue = i_APCI1710_ReadLatchRegisterValue(dev, 4072 case APCI1710_INCCPT_ENABLELATCHINTERRUPT:
4070 (unsigned char) CR_AREF(insn->chanspec), 4073 i_ReturnValue = i_APCI1710_EnableLatchInterrupt(dev,
4071 (unsigned char) CR_RANGE(insn->chanspec), (unsigned int *) &data[0]); 4074 (unsigned char) CR_AREF(insn->chanspec));
4072 printk("Latch Register Value %d\n", data[0]);
4073 break; 4075 break;
4074 4076
4075 case APCI1710_INCCPT_READ16BITCOUNTERVALUE: 4077 case APCI1710_INCCPT_DISABLELATCHINTERRUPT:
4076 i_ReturnValue = i_APCI1710_Read16BitCounterValue(dev, 4078 i_ReturnValue = i_APCI1710_DisableLatchInterrupt(dev,
4077 (unsigned char) CR_AREF(insn->chanspec), 4079 (unsigned char) CR_AREF(insn->chanspec));
4078 (unsigned char) CR_RANGE(insn->chanspec), (unsigned int *) &data[0]);
4079 break; 4080 break;
4080 4081
4081 case APCI1710_INCCPT_READ32BITCOUNTERVALUE: 4082 case APCI1710_INCCPT_WRITE16BITCOUNTERVALUE:
4082 i_ReturnValue = i_APCI1710_Read32BitCounterValue(dev, 4083 i_ReturnValue = i_APCI1710_Write16BitCounterValue(dev,
4083 (unsigned char) CR_AREF(insn->chanspec), (unsigned int *) &data[0]); 4084 (unsigned char) CR_AREF(insn->chanspec),
4085 (unsigned char) data[0], (unsigned int) data[1]);
4084 break; 4086 break;
4085 4087
4086 case APCI1710_INCCPT_GETINDEXSTATUS: 4088 case APCI1710_INCCPT_WRITE32BITCOUNTERVALUE:
4087 i_ReturnValue = i_APCI1710_GetIndexStatus(dev, 4089 i_ReturnValue = i_APCI1710_Write32BitCounterValue(dev,
4088 (unsigned char) CR_AREF(insn->chanspec), (unsigned char *) &data[0]); 4090 (unsigned char) CR_AREF(insn->chanspec), (unsigned int) data[0]);
4089 break;
4090 4091
4091 case APCI1710_INCCPT_GETREFERENCESTATUS:
4092 i_ReturnValue = i_APCI1710_GetReferenceStatus(dev,
4093 (unsigned char) CR_AREF(insn->chanspec), (unsigned char *) &data[0]);
4094 break; 4092 break;
4095 4093
4096 case APCI1710_INCCPT_GETUASSTATUS: 4094 case APCI1710_INCCPT_ENABLEINDEX:
4097 i_ReturnValue = i_APCI1710_GetUASStatus(dev, 4095 i_APCI1710_EnableIndex(dev, (unsigned char) CR_AREF(insn->chanspec));
4098 (unsigned char) CR_AREF(insn->chanspec), (unsigned char *) &data[0]);
4099 break;
4100
4101 case APCI1710_INCCPT_GETCBSTATUS:
4102 i_ReturnValue = i_APCI1710_GetCBStatus(dev,
4103 (unsigned char) CR_AREF(insn->chanspec), (unsigned char *) &data[0]);
4104 break; 4096 break;
4105 4097
4106 case APCI1710_INCCPT_GET16BITCBSTATUS: 4098 case APCI1710_INCCPT_DISABLEINDEX:
4107 i_ReturnValue = i_APCI1710_Get16BitCBStatus(dev, 4099 i_ReturnValue = i_APCI1710_DisableIndex(dev,
4108 (unsigned char) CR_AREF(insn->chanspec), 4100 (unsigned char) CR_AREF(insn->chanspec));
4109 (unsigned char *) &data[0], (unsigned char *) &data[1]);
4110 break; 4101 break;
4111 4102
4112 case APCI1710_INCCPT_GETUDSTATUS: 4103 case APCI1710_INCCPT_ENABLECOMPARELOGIC:
4113 i_ReturnValue = i_APCI1710_GetUDStatus(dev, 4104 i_ReturnValue = i_APCI1710_EnableCompareLogic(dev,
4114 (unsigned char) CR_AREF(insn->chanspec), (unsigned char *) &data[0]); 4105 (unsigned char) CR_AREF(insn->chanspec));
4115
4116 break; 4106 break;
4117 4107
4118 case APCI1710_INCCPT_GETINTERRUPTUDLATCHEDSTATUS: 4108 case APCI1710_INCCPT_DISABLECOMPARELOGIC:
4119 i_ReturnValue = i_APCI1710_GetInterruptUDLatchedStatus(dev, 4109 i_ReturnValue = i_APCI1710_DisableCompareLogic(dev,
4120 (unsigned char) CR_AREF(insn->chanspec), (unsigned char *) &data[0]); 4110 (unsigned char) CR_AREF(insn->chanspec));
4121 break; 4111 break;
4122 4112
4123 case APCI1710_INCCPT_READFREQUENCYMEASUREMENT: 4113 case APCI1710_INCCPT_ENABLEFREQUENCYMEASUREMENT:
4124 i_ReturnValue = i_APCI1710_ReadFrequencyMeasurement(dev, 4114 i_ReturnValue = i_APCI1710_EnableFrequencyMeasurement(dev,
4125 (unsigned char) CR_AREF(insn->chanspec), 4115 (unsigned char) CR_AREF(insn->chanspec), (unsigned char) data[0]);
4126 (unsigned char *) &data[0],
4127 (unsigned char *) &data[1], (unsigned int *) &data[2]);
4128 break; 4116 break;
4129 4117
4130 case APCI1710_INCCPT_READINTERRUPT: 4118 case APCI1710_INCCPT_DISABLEFREQUENCYMEASUREMENT:
4131 data[0] = devpriv->s_InterruptParameters. 4119 i_ReturnValue = i_APCI1710_DisableFrequencyMeasurement(dev,
4132 s_FIFOInterruptParameters[devpriv-> 4120 (unsigned char) CR_AREF(insn->chanspec));
4133 s_InterruptParameters.ui_Read].b_OldModuleMask;
4134 data[1] = devpriv->s_InterruptParameters.
4135 s_FIFOInterruptParameters[devpriv->
4136 s_InterruptParameters.ui_Read].ul_OldInterruptMask;
4137 data[2] = devpriv->s_InterruptParameters.
4138 s_FIFOInterruptParameters[devpriv->
4139 s_InterruptParameters.ui_Read].ul_OldCounterLatchValue;
4140
4141 /**************************/
4142 /* Increment the read FIFO */
4143 /***************************/
4144
4145 devpriv->
4146 s_InterruptParameters.
4147 ui_Read = (devpriv->s_InterruptParameters.
4148 ui_Read + 1) % APCI1710_SAVE_INTERRUPT;
4149
4150 break; 4121 break;
4151 4122
4152 default: 4123 default:
4153 printk("ReadType Parameter wrong\n"); 4124 printk("Write Config Parameter Wrong\n");
4154 } 4125 }
4155 4126
4156 if (i_ReturnValue >= 0) 4127 if (i_ReturnValue >= 0)
4157 i_ReturnValue = insn->n; 4128 i_ReturnValue = insn->n;
4158 return i_ReturnValue; 4129 return i_ReturnValue;
4159
4160} 4130}
4161 4131
4162/* 4132/*
@@ -4192,10 +4162,12 @@ int i_APCI1710_InsnReadINCCPT(struct comedi_device *dev, struct comedi_subdevice
4192| -4: The selected latch register parameter is wrong | 4162| -4: The selected latch register parameter is wrong |
4193+----------------------------------------------------------------------------+ 4163+----------------------------------------------------------------------------+
4194*/ 4164*/
4195 4165static int i_APCI1710_ReadLatchRegisterStatus(struct comedi_device *dev,
4196int i_APCI1710_ReadLatchRegisterStatus(struct comedi_device *dev, 4166 unsigned char b_ModulNbr,
4197 unsigned char b_ModulNbr, unsigned char b_LatchReg, unsigned char *pb_LatchStatus) 4167 unsigned char b_LatchReg,
4168 unsigned char *pb_LatchStatus)
4198{ 4169{
4170 struct addi_private *devpriv = dev->private;
4199 int i_ReturnValue = 0; 4171 int i_ReturnValue = 0;
4200 unsigned int dw_LatchReg; 4172 unsigned int dw_LatchReg;
4201 4173
@@ -4279,10 +4251,12 @@ int i_APCI1710_ReadLatchRegisterStatus(struct comedi_device *dev,
4279| -4: The selected latch register parameter is wrong | 4251| -4: The selected latch register parameter is wrong |
4280+----------------------------------------------------------------------------+ 4252+----------------------------------------------------------------------------+
4281*/ 4253*/
4282 4254static int i_APCI1710_ReadLatchRegisterValue(struct comedi_device *dev,
4283int i_APCI1710_ReadLatchRegisterValue(struct comedi_device *dev, 4255 unsigned char b_ModulNbr,
4284 unsigned char b_ModulNbr, unsigned char b_LatchReg, unsigned int *pul_LatchValue) 4256 unsigned char b_LatchReg,
4257 unsigned int *pul_LatchValue)
4285{ 4258{
4259 struct addi_private *devpriv = dev->private;
4286 int i_ReturnValue = 0; 4260 int i_ReturnValue = 0;
4287 4261
4288 /**************************/ 4262 /**************************/
@@ -4363,10 +4337,12 @@ int i_APCI1710_ReadLatchRegisterValue(struct comedi_device *dev,
4363| -4: The selected 16-Bit counter parameter is wrong | 4337| -4: The selected 16-Bit counter parameter is wrong |
4364+----------------------------------------------------------------------------+ 4338+----------------------------------------------------------------------------+
4365*/ 4339*/
4366 4340static int i_APCI1710_Read16BitCounterValue(struct comedi_device *dev,
4367int i_APCI1710_Read16BitCounterValue(struct comedi_device *dev, 4341 unsigned char b_ModulNbr,
4368 unsigned char b_ModulNbr, unsigned char b_SelectedCounter, unsigned int *pui_CounterValue) 4342 unsigned char b_SelectedCounter,
4343 unsigned int *pui_CounterValue)
4369{ 4344{
4345 struct addi_private *devpriv = dev->private;
4370 int i_ReturnValue = 0; 4346 int i_ReturnValue = 0;
4371 unsigned int dw_LathchValue = 0; 4347 unsigned int dw_LathchValue = 0;
4372 4348
@@ -4458,10 +4434,11 @@ int i_APCI1710_Read16BitCounterValue(struct comedi_device *dev,
4458| "i_APCI1710_InitCounter" | 4434| "i_APCI1710_InitCounter" |
4459+----------------------------------------------------------------------------+ 4435+----------------------------------------------------------------------------+
4460*/ 4436*/
4461 4437static int i_APCI1710_Read32BitCounterValue(struct comedi_device *dev,
4462int i_APCI1710_Read32BitCounterValue(struct comedi_device *dev, 4438 unsigned char b_ModulNbr,
4463 unsigned char b_ModulNbr, unsigned int *pul_CounterValue) 4439 unsigned int *pul_CounterValue)
4464{ 4440{
4441 struct addi_private *devpriv = dev->private;
4465 int i_ReturnValue = 0; 4442 int i_ReturnValue = 0;
4466 4443
4467 /**************************/ 4444 /**************************/
@@ -4534,10 +4511,11 @@ int i_APCI1710_Read32BitCounterValue(struct comedi_device *dev,
4534| "i_APCI1710_InitIndex" | 4511| "i_APCI1710_InitIndex" |
4535+----------------------------------------------------------------------------+ 4512+----------------------------------------------------------------------------+
4536*/ 4513*/
4537 4514static int i_APCI1710_GetIndexStatus(struct comedi_device *dev,
4538int i_APCI1710_GetIndexStatus(struct comedi_device *dev, 4515 unsigned char b_ModulNbr,
4539 unsigned char b_ModulNbr, unsigned char *pb_IndexStatus) 4516 unsigned char *pb_IndexStatus)
4540{ 4517{
4518 struct addi_private *devpriv = dev->private;
4541 int i_ReturnValue = 0; 4519 int i_ReturnValue = 0;
4542 unsigned int dw_StatusReg = 0; 4520 unsigned int dw_StatusReg = 0;
4543 4521
@@ -4618,10 +4596,11 @@ int i_APCI1710_GetIndexStatus(struct comedi_device *dev,
4618| "i_APCI1710_InitReference" | 4596| "i_APCI1710_InitReference" |
4619+----------------------------------------------------------------------------+ 4597+----------------------------------------------------------------------------+
4620*/ 4598*/
4621 4599static int i_APCI1710_GetReferenceStatus(struct comedi_device *dev,
4622int i_APCI1710_GetReferenceStatus(struct comedi_device *dev, 4600 unsigned char b_ModulNbr,
4623 unsigned char b_ModulNbr, unsigned char *pb_ReferenceStatus) 4601 unsigned char *pb_ReferenceStatus)
4624{ 4602{
4603 struct addi_private *devpriv = dev->private;
4625 int i_ReturnValue = 0; 4604 int i_ReturnValue = 0;
4626 unsigned int dw_StatusReg = 0; 4605 unsigned int dw_StatusReg = 0;
4627 4606
@@ -4702,10 +4681,11 @@ int i_APCI1710_GetReferenceStatus(struct comedi_device *dev,
4702| "i_APCI1710_InitCounter" | 4681| "i_APCI1710_InitCounter" |
4703+----------------------------------------------------------------------------+ 4682+----------------------------------------------------------------------------+
4704*/ 4683*/
4705 4684static int i_APCI1710_GetUASStatus(struct comedi_device *dev,
4706int i_APCI1710_GetUASStatus(struct comedi_device *dev, 4685 unsigned char b_ModulNbr,
4707 unsigned char b_ModulNbr, unsigned char *pb_UASStatus) 4686 unsigned char *pb_UASStatus)
4708{ 4687{
4688 struct addi_private *devpriv = dev->private;
4709 int i_ReturnValue = 0; 4689 int i_ReturnValue = 0;
4710 unsigned int dw_StatusReg = 0; 4690 unsigned int dw_StatusReg = 0;
4711 4691
@@ -4770,10 +4750,11 @@ int i_APCI1710_GetUASStatus(struct comedi_device *dev,
4770| "i_APCI1710_InitCounter" | 4750| "i_APCI1710_InitCounter" |
4771+----------------------------------------------------------------------------+ 4751+----------------------------------------------------------------------------+
4772*/ 4752*/
4773 4753static int i_APCI1710_GetCBStatus(struct comedi_device *dev,
4774int i_APCI1710_GetCBStatus(struct comedi_device *dev, 4754 unsigned char b_ModulNbr,
4775 unsigned char b_ModulNbr, unsigned char *pb_CBStatus) 4755 unsigned char *pb_CBStatus)
4776{ 4756{
4757 struct addi_private *devpriv = dev->private;
4777 int i_ReturnValue = 0; 4758 int i_ReturnValue = 0;
4778 unsigned int dw_StatusReg = 0; 4759 unsigned int dw_StatusReg = 0;
4779 4760
@@ -4852,10 +4833,12 @@ int i_APCI1710_GetCBStatus(struct comedi_device *dev,
4852| -5: Firmware revision error | 4833| -5: Firmware revision error |
4853+----------------------------------------------------------------------------+ 4834+----------------------------------------------------------------------------+
4854*/ 4835*/
4855 4836static int i_APCI1710_Get16BitCBStatus(struct comedi_device *dev,
4856int i_APCI1710_Get16BitCBStatus(struct comedi_device *dev, 4837 unsigned char b_ModulNbr,
4857 unsigned char b_ModulNbr, unsigned char *pb_CBStatusCounter0, unsigned char *pb_CBStatusCounter1) 4838 unsigned char *pb_CBStatusCounter0,
4839 unsigned char *pb_CBStatusCounter1)
4858{ 4840{
4841 struct addi_private *devpriv = dev->private;
4859 int i_ReturnValue = 0; 4842 int i_ReturnValue = 0;
4860 unsigned int dw_StatusReg = 0; 4843 unsigned int dw_StatusReg = 0;
4861 4844
@@ -4965,10 +4948,11 @@ int i_APCI1710_Get16BitCBStatus(struct comedi_device *dev,
4965| "i_APCI1710_InitCounter" | 4948| "i_APCI1710_InitCounter" |
4966+----------------------------------------------------------------------------+ 4949+----------------------------------------------------------------------------+
4967*/ 4950*/
4968 4951static int i_APCI1710_GetUDStatus(struct comedi_device *dev,
4969int i_APCI1710_GetUDStatus(struct comedi_device *dev, 4952 unsigned char b_ModulNbr,
4970 unsigned char b_ModulNbr, unsigned char *pb_UDStatus) 4953 unsigned char *pb_UDStatus)
4971{ 4954{
4955 struct addi_private *devpriv = dev->private;
4972 int i_ReturnValue = 0; 4956 int i_ReturnValue = 0;
4973 unsigned int dw_StatusReg = 0; 4957 unsigned int dw_StatusReg = 0;
4974 4958
@@ -5039,10 +5023,11 @@ int i_APCI1710_GetUDStatus(struct comedi_device *dev,
5039| See function "i_APCI1710_SetBoardIntRoutineX" | 5023| See function "i_APCI1710_SetBoardIntRoutineX" |
5040+----------------------------------------------------------------------------+ 5024+----------------------------------------------------------------------------+
5041*/ 5025*/
5042 5026static int i_APCI1710_GetInterruptUDLatchedStatus(struct comedi_device *dev,
5043int i_APCI1710_GetInterruptUDLatchedStatus(struct comedi_device *dev, 5027 unsigned char b_ModulNbr,
5044 unsigned char b_ModulNbr, unsigned char *pb_UDStatus) 5028 unsigned char *pb_UDStatus)
5045{ 5029{
5030 struct addi_private *devpriv = dev->private;
5046 int i_ReturnValue = 0; 5031 int i_ReturnValue = 0;
5047 unsigned int dw_StatusReg = 0; 5032 unsigned int dw_StatusReg = 0;
5048 5033
@@ -5144,11 +5129,13 @@ int i_APCI1710_GetInterruptUDLatchedStatus(struct comedi_device *dev,
5144 | See function "i_APCI1710_InitFrequencyMeasurement" | 5129 | See function "i_APCI1710_InitFrequencyMeasurement" |
5145 +----------------------------------------------------------------------------+ 5130 +----------------------------------------------------------------------------+
5146 */ 5131 */
5147 5132static int i_APCI1710_ReadFrequencyMeasurement(struct comedi_device *dev,
5148int i_APCI1710_ReadFrequencyMeasurement(struct comedi_device *dev, 5133 unsigned char b_ModulNbr,
5149 unsigned char b_ModulNbr, 5134 unsigned char *pb_Status,
5150 unsigned char *pb_Status, unsigned char *pb_UDStatus, unsigned int *pul_ReadValue) 5135 unsigned char *pb_UDStatus,
5136 unsigned int *pul_ReadValue)
5151{ 5137{
5138 struct addi_private *devpriv = dev->private;
5152 int i_ReturnValue = 0; 5139 int i_ReturnValue = 0;
5153 unsigned int ui_16BitValue; 5140 unsigned int ui_16BitValue;
5154 unsigned int dw_StatusReg; 5141 unsigned int dw_StatusReg;
@@ -5361,3 +5348,118 @@ int i_APCI1710_ReadFrequencyMeasurement(struct comedi_device *dev,
5361 5348
5362 return i_ReturnValue; 5349 return i_ReturnValue;
5363} 5350}
5351/*
5352 * Read and Get functions for INC_CPT
5353 */
5354static int i_APCI1710_InsnReadINCCPT(struct comedi_device *dev,
5355 struct comedi_subdevice *s,
5356 struct comedi_insn *insn,
5357 unsigned int *data)
5358{
5359 struct addi_private *devpriv = dev->private;
5360 unsigned int ui_ReadType;
5361 int i_ReturnValue = 0;
5362
5363 ui_ReadType = CR_CHAN(insn->chanspec);
5364
5365 devpriv->tsk_Current = current; /* Save the current process task structure */
5366 switch (ui_ReadType) {
5367 case APCI1710_INCCPT_READLATCHREGISTERSTATUS:
5368 i_ReturnValue = i_APCI1710_ReadLatchRegisterStatus(dev,
5369 (unsigned char) CR_AREF(insn->chanspec),
5370 (unsigned char) CR_RANGE(insn->chanspec), (unsigned char *) &data[0]);
5371 break;
5372
5373 case APCI1710_INCCPT_READLATCHREGISTERVALUE:
5374 i_ReturnValue = i_APCI1710_ReadLatchRegisterValue(dev,
5375 (unsigned char) CR_AREF(insn->chanspec),
5376 (unsigned char) CR_RANGE(insn->chanspec), (unsigned int *) &data[0]);
5377 printk("Latch Register Value %d\n", data[0]);
5378 break;
5379
5380 case APCI1710_INCCPT_READ16BITCOUNTERVALUE:
5381 i_ReturnValue = i_APCI1710_Read16BitCounterValue(dev,
5382 (unsigned char) CR_AREF(insn->chanspec),
5383 (unsigned char) CR_RANGE(insn->chanspec), (unsigned int *) &data[0]);
5384 break;
5385
5386 case APCI1710_INCCPT_READ32BITCOUNTERVALUE:
5387 i_ReturnValue = i_APCI1710_Read32BitCounterValue(dev,
5388 (unsigned char) CR_AREF(insn->chanspec), (unsigned int *) &data[0]);
5389 break;
5390
5391 case APCI1710_INCCPT_GETINDEXSTATUS:
5392 i_ReturnValue = i_APCI1710_GetIndexStatus(dev,
5393 (unsigned char) CR_AREF(insn->chanspec), (unsigned char *) &data[0]);
5394 break;
5395
5396 case APCI1710_INCCPT_GETREFERENCESTATUS:
5397 i_ReturnValue = i_APCI1710_GetReferenceStatus(dev,
5398 (unsigned char) CR_AREF(insn->chanspec), (unsigned char *) &data[0]);
5399 break;
5400
5401 case APCI1710_INCCPT_GETUASSTATUS:
5402 i_ReturnValue = i_APCI1710_GetUASStatus(dev,
5403 (unsigned char) CR_AREF(insn->chanspec), (unsigned char *) &data[0]);
5404 break;
5405
5406 case APCI1710_INCCPT_GETCBSTATUS:
5407 i_ReturnValue = i_APCI1710_GetCBStatus(dev,
5408 (unsigned char) CR_AREF(insn->chanspec), (unsigned char *) &data[0]);
5409 break;
5410
5411 case APCI1710_INCCPT_GET16BITCBSTATUS:
5412 i_ReturnValue = i_APCI1710_Get16BitCBStatus(dev,
5413 (unsigned char) CR_AREF(insn->chanspec),
5414 (unsigned char *) &data[0], (unsigned char *) &data[1]);
5415 break;
5416
5417 case APCI1710_INCCPT_GETUDSTATUS:
5418 i_ReturnValue = i_APCI1710_GetUDStatus(dev,
5419 (unsigned char) CR_AREF(insn->chanspec), (unsigned char *) &data[0]);
5420
5421 break;
5422
5423 case APCI1710_INCCPT_GETINTERRUPTUDLATCHEDSTATUS:
5424 i_ReturnValue = i_APCI1710_GetInterruptUDLatchedStatus(dev,
5425 (unsigned char) CR_AREF(insn->chanspec), (unsigned char *) &data[0]);
5426 break;
5427
5428 case APCI1710_INCCPT_READFREQUENCYMEASUREMENT:
5429 i_ReturnValue = i_APCI1710_ReadFrequencyMeasurement(dev,
5430 (unsigned char) CR_AREF(insn->chanspec),
5431 (unsigned char *) &data[0],
5432 (unsigned char *) &data[1], (unsigned int *) &data[2]);
5433 break;
5434
5435 case APCI1710_INCCPT_READINTERRUPT:
5436 data[0] = devpriv->s_InterruptParameters.
5437 s_FIFOInterruptParameters[devpriv->
5438 s_InterruptParameters.ui_Read].b_OldModuleMask;
5439 data[1] = devpriv->s_InterruptParameters.
5440 s_FIFOInterruptParameters[devpriv->
5441 s_InterruptParameters.ui_Read].ul_OldInterruptMask;
5442 data[2] = devpriv->s_InterruptParameters.
5443 s_FIFOInterruptParameters[devpriv->
5444 s_InterruptParameters.ui_Read].ul_OldCounterLatchValue;
5445
5446 /**************************/
5447 /* Increment the read FIFO */
5448 /***************************/
5449
5450 devpriv->
5451 s_InterruptParameters.
5452 ui_Read = (devpriv->s_InterruptParameters.
5453 ui_Read + 1) % APCI1710_SAVE_INTERRUPT;
5454
5455 break;
5456
5457 default:
5458 printk("ReadType Parameter wrong\n");
5459 }
5460
5461 if (i_ReturnValue >= 0)
5462 i_ReturnValue = insn->n;
5463 return i_ReturnValue;
5464
5465}
diff --git a/drivers/staging/comedi/drivers/addi-data/APCI1710_INCCPT.h b/drivers/staging/comedi/drivers/addi-data/APCI1710_INCCPT.h
deleted file mode 100644
index 358298bfc64f..000000000000
--- a/drivers/staging/comedi/drivers/addi-data/APCI1710_INCCPT.h
+++ /dev/null
@@ -1,271 +0,0 @@
1/*
2 * Copyright (C) 2004,2005 ADDI-DATA GmbH for the source code of this module.
3 *
4 * ADDI-DATA GmbH
5 * Dieselstrasse 3
6 * D-77833 Ottersweier
7 * Tel: +19(0)7223/9493-0
8 * Fax: +49(0)7223/9493-92
9 * http://www.addi-data.com
10 * info@addi-data.com
11 *
12 * This program is free software; you can redistribute it and/or modify it
13 * under the terms of the GNU General Public License as published by the Free
14 * Software Foundation; either version 2 of the License, or (at your option)
15 * any later version.
16 */
17
18#define APCI1710_16BIT_COUNTER 0x10
19#define APCI1710_32BIT_COUNTER 0x0
20#define APCI1710_QUADRUPLE_MODE 0x0
21#define APCI1710_DOUBLE_MODE 0x3
22#define APCI1710_SIMPLE_MODE 0xF
23#define APCI1710_DIRECT_MODE 0x80
24#define APCI1710_HYSTERESIS_ON 0x60
25#define APCI1710_HYSTERESIS_OFF 0x0
26#define APCI1710_INCREMENT 0x60
27#define APCI1710_DECREMENT 0x0
28#define APCI1710_LATCH_COUNTER 0x1
29#define APCI1710_CLEAR_COUNTER 0x0
30#define APCI1710_LOW 0x0
31#define APCI1710_HIGH 0x1
32
33/*********************/
34/* Version 0600-0229 */
35/*********************/
36#define APCI1710_HIGH_EDGE_CLEAR_COUNTER 0x0
37#define APCI1710_HIGH_EDGE_LATCH_COUNTER 0x1
38#define APCI1710_LOW_EDGE_CLEAR_COUNTER 0x2
39#define APCI1710_LOW_EDGE_LATCH_COUNTER 0x3
40#define APCI1710_HIGH_EDGE_LATCH_AND_CLEAR_COUNTER 0x4
41#define APCI1710_LOW_EDGE_LATCH_AND_CLEAR_COUNTER 0x5
42#define APCI1710_SOURCE_0 0x0
43#define APCI1710_SOURCE_1 0x1
44
45#define APCI1710_30MHZ 30
46#define APCI1710_33MHZ 33
47#define APCI1710_40MHZ 40
48
49#define APCI1710_ENABLE_LATCH_INT 0x80
50#define APCI1710_DISABLE_LATCH_INT (~APCI1710_ENABLE_LATCH_INT)
51
52#define APCI1710_INDEX_LATCH_COUNTER 0x10
53#define APCI1710_INDEX_AUTO_MODE 0x8
54#define APCI1710_ENABLE_INDEX 0x4
55#define APCI1710_DISABLE_INDEX (~APCI1710_ENABLE_INDEX)
56#define APCI1710_ENABLE_LATCH_AND_CLEAR 0x8
57#define APCI1710_DISABLE_LATCH_AND_CLEAR (~APCI1710_ENABLE_LATCH_AND_CLEAR)
58#define APCI1710_SET_LOW_INDEX_LEVEL 0x4
59#define APCI1710_SET_HIGH_INDEX_LEVEL (~APCI1710_SET_LOW_INDEX_LEVEL)
60#define APCI1710_INVERT_INDEX_RFERENCE 0x2
61#define APCI1710_DEFAULT_INDEX_RFERENCE (~APCI1710_INVERT_INDEX_RFERENCE)
62
63#define APCI1710_ENABLE_INDEX_INT 0x1
64#define APCI1710_DISABLE_INDEX_INT (~APCI1710_ENABLE_INDEX_INT)
65
66#define APCI1710_ENABLE_FREQUENCY 0x4
67#define APCI1710_DISABLE_FREQUENCY (~APCI1710_ENABLE_FREQUENCY)
68
69#define APCI1710_ENABLE_FREQUENCY_INT 0x8
70#define APCI1710_DISABLE_FREQUENCY_INT (~APCI1710_ENABLE_FREQUENCY_INT)
71
72#define APCI1710_ENABLE_40MHZ_FREQUENCY 0x40
73#define APCI1710_DISABLE_40MHZ_FREQUENCY (~APCI1710_ENABLE_40MHZ_FREQUENCY)
74
75#define APCI1710_ENABLE_40MHZ_FILTER 0x80
76#define APCI1710_DISABLE_40MHZ_FILTER (~APCI1710_ENABLE_40MHZ_FILTER)
77
78#define APCI1710_ENABLE_COMPARE_INT 0x2
79#define APCI1710_DISABLE_COMPARE_INT (~APCI1710_ENABLE_COMPARE_INT)
80
81#define APCI1710_ENABLE_INDEX_ACTION 0x20
82#define APCI1710_DISABLE_INDEX_ACTION (~APCI1710_ENABLE_INDEX_ACTION)
83#define APCI1710_REFERENCE_HIGH 0x40
84#define APCI1710_REFERENCE_LOW (~APCI1710_REFERENCE_HIGH)
85
86#define APCI1710_TOR_GATE_LOW 0x40
87#define APCI1710_TOR_GATE_HIGH (~APCI1710_TOR_GATE_LOW)
88
89/* INSN CONFIG */
90#define APCI1710_INCCPT_INITCOUNTER 100
91#define APCI1710_INCCPT_COUNTERAUTOTEST 101
92#define APCI1710_INCCPT_INITINDEX 102
93#define APCI1710_INCCPT_INITREFERENCE 103
94#define APCI1710_INCCPT_INITEXTERNALSTROBE 104
95#define APCI1710_INCCPT_INITCOMPARELOGIC 105
96#define APCI1710_INCCPT_INITFREQUENCYMEASUREMENT 106
97
98/* INSN READ */
99#define APCI1710_INCCPT_READLATCHREGISTERSTATUS 200
100#define APCI1710_INCCPT_READLATCHREGISTERVALUE 201
101#define APCI1710_INCCPT_READ16BITCOUNTERVALUE 202
102#define APCI1710_INCCPT_READ32BITCOUNTERVALUE 203
103#define APCI1710_INCCPT_GETINDEXSTATUS 204
104#define APCI1710_INCCPT_GETREFERENCESTATUS 205
105#define APCI1710_INCCPT_GETUASSTATUS 206
106#define APCI1710_INCCPT_GETCBSTATUS 207
107#define APCI1710_INCCPT_GET16BITCBSTATUS 208
108#define APCI1710_INCCPT_GETUDSTATUS 209
109#define APCI1710_INCCPT_GETINTERRUPTUDLATCHEDSTATUS 210
110#define APCI1710_INCCPT_READFREQUENCYMEASUREMENT 211
111#define APCI1710_INCCPT_READINTERRUPT 212
112
113/* INSN BITS */
114#define APCI1710_INCCPT_CLEARCOUNTERVALUE 300
115#define APCI1710_INCCPT_CLEARALLCOUNTERVALUE 301
116#define APCI1710_INCCPT_SETINPUTFILTER 302
117#define APCI1710_INCCPT_LATCHCOUNTER 303
118#define APCI1710_INCCPT_SETINDEXANDREFERENCESOURCE 304
119#define APCI1710_INCCPT_SETDIGITALCHLON 305
120#define APCI1710_INCCPT_SETDIGITALCHLOFF 306
121
122/* INSN WRITE */
123#define APCI1710_INCCPT_ENABLELATCHINTERRUPT 400
124#define APCI1710_INCCPT_DISABLELATCHINTERRUPT 401
125#define APCI1710_INCCPT_WRITE16BITCOUNTERVALUE 402
126#define APCI1710_INCCPT_WRITE32BITCOUNTERVALUE 403
127#define APCI1710_INCCPT_ENABLEINDEX 404
128#define APCI1710_INCCPT_DISABLEINDEX 405
129#define APCI1710_INCCPT_ENABLECOMPARELOGIC 406
130#define APCI1710_INCCPT_DISABLECOMPARELOGIC 407
131#define APCI1710_INCCPT_ENABLEFREQUENCYMEASUREMENT 408
132#define APCI1710_INCCPT_DISABLEFREQUENCYMEASUREMENT 409
133
134/************ Main Functions *************/
135int i_APCI1710_InsnConfigINCCPT(struct comedi_device *dev, struct comedi_subdevice *s,
136 struct comedi_insn *insn, unsigned int * data);
137
138int i_APCI1710_InsnBitsINCCPT(struct comedi_device *dev, struct comedi_subdevice * s,
139 struct comedi_insn *insn, unsigned int * data);
140
141int i_APCI1710_InsnWriteINCCPT(struct comedi_device *dev, struct comedi_subdevice * s,
142 struct comedi_insn *insn, unsigned int * data);
143
144int i_APCI1710_InsnReadINCCPT(struct comedi_device *dev, struct comedi_subdevice * s,
145 struct comedi_insn *insn, unsigned int * data);
146
147/*********** Supplementary Functions********/
148
149/* INSN CONFIG */
150int i_APCI1710_InitCounter(struct comedi_device *dev,
151 unsigned char b_ModulNbr,
152 unsigned char b_CounterRange,
153 unsigned char b_FirstCounterModus,
154 unsigned char b_FirstCounterOption,
155 unsigned char b_SecondCounterModus,
156 unsigned char b_SecondCounterOption);
157
158int i_APCI1710_CounterAutoTest(struct comedi_device *dev, unsigned char * pb_TestStatus);
159
160int i_APCI1710_InitIndex(struct comedi_device *dev,
161 unsigned char b_ModulNbr,
162 unsigned char b_ReferenceAction,
163 unsigned char b_IndexOperation, unsigned char b_AutoMode,
164 unsigned char b_InterruptEnable);
165
166int i_APCI1710_InitReference(struct comedi_device *dev,
167 unsigned char b_ModulNbr, unsigned char b_ReferenceLevel);
168
169int i_APCI1710_InitExternalStrobe(struct comedi_device *dev,
170 unsigned char b_ModulNbr, unsigned char b_ExternalStrobe,
171 unsigned char b_ExternalStrobeLevel);
172
173int i_APCI1710_InitCompareLogic(struct comedi_device *dev,
174 unsigned char b_ModulNbr, unsigned int ui_CompareValue);
175
176int i_APCI1710_InitFrequencyMeasurement(struct comedi_device *dev,
177 unsigned char b_ModulNbr,
178 unsigned char b_PCIInputClock,
179 unsigned char b_TimingUnity,
180 unsigned int ul_TimingInterval,
181 unsigned int *pul_RealTimingInterval);
182
183/* INSN BITS */
184int i_APCI1710_ClearCounterValue(struct comedi_device *dev, unsigned char b_ModulNbr);
185
186int i_APCI1710_ClearAllCounterValue(struct comedi_device *dev);
187
188int i_APCI1710_SetInputFilter(struct comedi_device *dev,
189 unsigned char b_ModulNbr, unsigned char b_PCIInputClock,
190 unsigned char b_Filter);
191
192int i_APCI1710_LatchCounter(struct comedi_device *dev,
193 unsigned char b_ModulNbr, unsigned char b_LatchReg);
194
195int i_APCI1710_SetIndexAndReferenceSource(struct comedi_device *dev,
196 unsigned char b_ModulNbr,
197 unsigned char b_SourceSelection);
198
199int i_APCI1710_SetDigitalChlOn(struct comedi_device *dev, unsigned char b_ModulNbr);
200
201int i_APCI1710_SetDigitalChlOff(struct comedi_device *dev, unsigned char b_ModulNbr);
202
203/* INSN WRITE */
204int i_APCI1710_EnableLatchInterrupt(struct comedi_device *dev, unsigned char b_ModulNbr);
205
206int i_APCI1710_DisableLatchInterrupt(struct comedi_device *dev, unsigned char b_ModulNbr);
207
208int i_APCI1710_Write16BitCounterValue(struct comedi_device *dev,
209 unsigned char b_ModulNbr, unsigned char b_SelectedCounter,
210 unsigned int ui_WriteValue);
211
212int i_APCI1710_Write32BitCounterValue(struct comedi_device *dev,
213 unsigned char b_ModulNbr, unsigned int ul_WriteValue);
214
215int i_APCI1710_EnableIndex(struct comedi_device *dev, unsigned char b_ModulNbr);
216
217int i_APCI1710_DisableIndex(struct comedi_device *dev, unsigned char b_ModulNbr);
218
219int i_APCI1710_EnableCompareLogic(struct comedi_device *dev, unsigned char b_ModulNbr);
220
221int i_APCI1710_DisableCompareLogic(struct comedi_device *dev, unsigned char b_ModulNbr);
222
223int i_APCI1710_EnableFrequencyMeasurement(struct comedi_device *dev,
224 unsigned char b_ModulNbr,
225 unsigned char b_InterruptEnable);
226
227int i_APCI1710_DisableFrequencyMeasurement(struct comedi_device *dev,
228 unsigned char b_ModulNbr);
229
230/* INSN READ */
231int i_APCI1710_ReadLatchRegisterStatus(struct comedi_device *dev,
232 unsigned char b_ModulNbr, unsigned char b_LatchReg,
233 unsigned char *pb_LatchStatus);
234
235int i_APCI1710_ReadLatchRegisterValue(struct comedi_device *dev,
236 unsigned char b_ModulNbr, unsigned char b_LatchReg,
237 unsigned int *pul_LatchValue);
238
239int i_APCI1710_Read16BitCounterValue(struct comedi_device *dev,
240 unsigned char b_ModulNbr, unsigned char b_SelectedCounter,
241 unsigned int *pui_CounterValue);
242
243int i_APCI1710_Read32BitCounterValue(struct comedi_device *dev,
244 unsigned char b_ModulNbr, unsigned int *pul_CounterValue);
245
246int i_APCI1710_GetIndexStatus(struct comedi_device *dev,
247 unsigned char b_ModulNbr, unsigned char *pb_IndexStatus);
248
249int i_APCI1710_GetReferenceStatus(struct comedi_device *dev,
250 unsigned char b_ModulNbr, unsigned char *pb_ReferenceStatus);
251
252int i_APCI1710_GetUASStatus(struct comedi_device *dev,
253 unsigned char b_ModulNbr, unsigned char *pb_UASStatus);
254
255int i_APCI1710_GetCBStatus(struct comedi_device *dev,
256 unsigned char b_ModulNbr, unsigned char *pb_CBStatus);
257
258int i_APCI1710_Get16BitCBStatus(struct comedi_device *dev,
259 unsigned char b_ModulNbr, unsigned char *pb_CBStatusCounter0,
260 unsigned char *pb_CBStatusCounter1);
261
262int i_APCI1710_GetUDStatus(struct comedi_device *dev,
263 unsigned char b_ModulNbr, unsigned char *pb_UDStatus);
264
265int i_APCI1710_GetInterruptUDLatchedStatus(struct comedi_device *dev,
266 unsigned char b_ModulNbr, unsigned char *pb_UDStatus);
267
268int i_APCI1710_ReadFrequencyMeasurement(struct comedi_device *dev,
269 unsigned char b_ModulNbr,
270 unsigned char *pb_Status, unsigned char *pb_UDStatus,
271 unsigned int *pul_ReadValue);
diff --git a/drivers/staging/comedi/drivers/addi-data/APCI1710_Inp_cpt.c b/drivers/staging/comedi/drivers/addi-data/APCI1710_Inp_cpt.c
index 3f9cfa20d886..be0c6adbdc94 100644
--- a/drivers/staging/comedi/drivers/addi-data/APCI1710_Inp_cpt.c
+++ b/drivers/staging/comedi/drivers/addi-data/APCI1710_Inp_cpt.c
@@ -49,13 +49,11 @@ You should also find the complete GPL in the COPYING file accompanying this sour
49 +-----------------------------------------------------------------------+ 49 +-----------------------------------------------------------------------+
50*/ 50*/
51 51
52/* 52#define APCI1710_SINGLE 0
53+----------------------------------------------------------------------------+ 53#define APCI1710_CONTINUOUS 1
54| Included files |
55+----------------------------------------------------------------------------+
56*/
57 54
58#include "APCI1710_Inp_cpt.h" 55#define APCI1710_PULSEENCODER_READ 0
56#define APCI1710_PULSEENCODER_WRITE 1
59 57
60/* 58/*
61+----------------------------------------------------------------------------+ 59+----------------------------------------------------------------------------+
@@ -123,12 +121,14 @@ You should also find the complete GPL in the COPYING file accompanying this sour
123+----------------------------------------------------------------------------+ 121+----------------------------------------------------------------------------+
124*/ 122*/
125 123
126int i_APCI1710_InsnConfigInitPulseEncoder(struct comedi_device *dev, 124static int i_APCI1710_InsnConfigInitPulseEncoder(struct comedi_device *dev,
127 struct comedi_subdevice *s, struct comedi_insn *insn, unsigned int *data) 125 struct comedi_subdevice *s,
126 struct comedi_insn *insn,
127 unsigned int *data)
128{ 128{
129 struct addi_private *devpriv = dev->private;
129 int i_ReturnValue = 0; 130 int i_ReturnValue = 0;
130 unsigned int dw_IntRegister; 131 unsigned int dw_IntRegister;
131
132 unsigned char b_ModulNbr; 132 unsigned char b_ModulNbr;
133 unsigned char b_PulseEncoderNbr; 133 unsigned char b_PulseEncoderNbr;
134 unsigned char b_InputLevelSelection; 134 unsigned char b_InputLevelSelection;
@@ -414,9 +414,12 @@ int i_APCI1710_InsnConfigInitPulseEncoder(struct comedi_device *dev,
414+----------------------------------------------------------------------------+ 414+----------------------------------------------------------------------------+
415*/ 415*/
416 416
417int i_APCI1710_InsnWriteEnableDisablePulseEncoder(struct comedi_device *dev, 417static int i_APCI1710_InsnWriteEnableDisablePulseEncoder(struct comedi_device *dev,
418 struct comedi_subdevice *s, struct comedi_insn *insn, unsigned int *data) 418 struct comedi_subdevice *s,
419 struct comedi_insn *insn,
420 unsigned int *data)
419{ 421{
422 struct addi_private *devpriv = dev->private;
420 int i_ReturnValue = 0; 423 int i_ReturnValue = 0;
421 unsigned char b_ModulNbr; 424 unsigned char b_ModulNbr;
422 unsigned char b_PulseEncoderNbr; 425 unsigned char b_PulseEncoderNbr;
@@ -708,9 +711,12 @@ int i_APCI1710_InsnWriteEnableDisablePulseEncoder(struct comedi_device *dev,
708 711
709 unsigned char *_ pb_Status) 712 unsigned char *_ pb_Status)
710 */ 713 */
711int i_APCI1710_InsnBitsReadWritePulseEncoder(struct comedi_device *dev, 714static int i_APCI1710_InsnBitsReadWritePulseEncoder(struct comedi_device *dev,
712 struct comedi_subdevice *s, struct comedi_insn *insn, unsigned int *data) 715 struct comedi_subdevice *s,
716 struct comedi_insn *insn,
717 unsigned int *data)
713{ 718{
719 struct addi_private *devpriv = dev->private;
714 int i_ReturnValue = 0; 720 int i_ReturnValue = 0;
715 unsigned int dw_StatusRegister; 721 unsigned int dw_StatusRegister;
716 unsigned char b_ModulNbr; 722 unsigned char b_ModulNbr;
@@ -834,9 +840,12 @@ int i_APCI1710_InsnBitsReadWritePulseEncoder(struct comedi_device *dev,
834 return i_ReturnValue; 840 return i_ReturnValue;
835} 841}
836 842
837int i_APCI1710_InsnReadInterruptPulseEncoder(struct comedi_device *dev, 843static int i_APCI1710_InsnReadInterruptPulseEncoder(struct comedi_device *dev,
838 struct comedi_subdevice *s, struct comedi_insn *insn, unsigned int *data) 844 struct comedi_subdevice *s,
845 struct comedi_insn *insn,
846 unsigned int *data)
839{ 847{
848 struct addi_private *devpriv = dev->private;
840 849
841 data[0] = devpriv->s_InterruptParameters. 850 data[0] = devpriv->s_InterruptParameters.
842 s_FIFOInterruptParameters[devpriv-> 851 s_FIFOInterruptParameters[devpriv->
diff --git a/drivers/staging/comedi/drivers/addi-data/APCI1710_Inp_cpt.h b/drivers/staging/comedi/drivers/addi-data/APCI1710_Inp_cpt.h
deleted file mode 100644
index 31fbb0bec52a..000000000000
--- a/drivers/staging/comedi/drivers/addi-data/APCI1710_Inp_cpt.h
+++ /dev/null
@@ -1,47 +0,0 @@
1/*
2 * Copyright (C) 2004,2005 ADDI-DATA GmbH for the source code of this module.
3 *
4 * ADDI-DATA GmbH
5 * Dieselstrasse 3
6 * D-77833 Ottersweier
7 * Tel: +19(0)7223/9493-0
8 * Fax: +49(0)7223/9493-92
9 * http://www.addi-data.com
10 * info@addi-data.com
11 *
12 * This program is free software; you can redistribute it and/or modify it
13 * under the terms of the GNU General Public License as published by the Free
14 * Software Foundation; either version 2 of the License, or (at your option)
15 * any later version.
16 */
17
18#define APCI1710_SINGLE 0
19#define APCI1710_CONTINUOUS 1
20
21#define APCI1710_PULSEENCODER_READ 0
22#define APCI1710_PULSEENCODER_WRITE 1
23
24int i_APCI1710_InsnConfigInitPulseEncoder(struct comedi_device *dev,
25 struct comedi_subdevice *s,
26 struct comedi_insn *insn, unsigned int *data);
27
28int i_APCI1710_InsnWriteEnableDisablePulseEncoder(struct comedi_device *dev,
29 struct comedi_subdevice *s,
30 struct comedi_insn *insn,
31 unsigned int *data);
32
33/*
34 * READ PULSE ENCODER FUNCTIONS
35 */
36int i_APCI1710_InsnReadInterruptPulseEncoder(struct comedi_device *dev,
37 struct comedi_subdevice *s,
38 struct comedi_insn *insn,
39 unsigned int *data);
40
41/*
42 * WRITE PULSE ENCODER FUNCTIONS
43 */
44int i_APCI1710_InsnBitsReadWritePulseEncoder(struct comedi_device *dev,
45 struct comedi_subdevice *s,
46 struct comedi_insn *insn,
47 unsigned int *data);
diff --git a/drivers/staging/comedi/drivers/addi-data/APCI1710_Pwm.c b/drivers/staging/comedi/drivers/addi-data/APCI1710_Pwm.c
index 8883e6662115..a211e78dd3ba 100644
--- a/drivers/staging/comedi/drivers/addi-data/APCI1710_Pwm.c
+++ b/drivers/staging/comedi/drivers/addi-data/APCI1710_Pwm.c
@@ -47,72 +47,16 @@ You should also find the complete GPL in the COPYING file accompanying this sour
47 +-----------------------------------------------------------------------+ 47 +-----------------------------------------------------------------------+
48*/ 48*/
49 49
50/* 50#define APCI1710_30MHZ 30
51+----------------------------------------------------------------------------+ 51#define APCI1710_33MHZ 33
52| Included files | 52#define APCI1710_40MHZ 40
53+----------------------------------------------------------------------------+
54*/
55
56#include "APCI1710_Pwm.h"
57
58/*
59+----------------------------------------------------------------------------+
60| Function Name :INT i_APCI1710_InsnConfigPWM(struct comedi_device *dev,
61struct comedi_subdevice *s,struct comedi_insn *insn,unsigned int *data) |
62+----------------------------------------------------------------------------+
63| Task : Pwm Init and Get Pwm Initialisation |
64+----------------------------------------------------------------------------+
65| Input Parameters :
66+----------------------------------------------------------------------------+
67| Output Parameters : - |
68+----------------------------------------------------------------------------+
69| Return Value :
70+----------------------------------------------------------------------------+
71*/
72 53
73int i_APCI1710_InsnConfigPWM(struct comedi_device *dev, struct comedi_subdevice *s, 54#define APCI1710_PWM_INIT 0
74 struct comedi_insn *insn, unsigned int *data) 55#define APCI1710_PWM_GETINITDATA 1
75{
76 unsigned char b_ConfigType;
77 int i_ReturnValue = 0;
78 b_ConfigType = CR_CHAN(insn->chanspec);
79 56
80 switch (b_ConfigType) { 57#define APCI1710_PWM_DISABLE 0
81 case APCI1710_PWM_INIT: 58#define APCI1710_PWM_ENABLE 1
82 i_ReturnValue = i_APCI1710_InitPWM(dev, (unsigned char) CR_AREF(insn->chanspec), /* b_ModulNbr */ 59#define APCI1710_PWM_NEWTIMING 2
83 (unsigned char) data[0], /* b_PWM */
84 (unsigned char) data[1], /* b_ClockSelection */
85 (unsigned char) data[2], /* b_TimingUnit */
86 (unsigned int) data[3], /* ul_LowTiming */
87 (unsigned int) data[4], /* ul_HighTiming */
88 (unsigned int *) &data[0], /* pul_RealLowTiming */
89 (unsigned int *) &data[1] /* pul_RealHighTiming */
90 );
91 break;
92
93 case APCI1710_PWM_GETINITDATA:
94 i_ReturnValue = i_APCI1710_GetPWMInitialisation(dev, (unsigned char) CR_AREF(insn->chanspec), /* b_ModulNbr */
95 (unsigned char) data[0], /* b_PWM */
96 (unsigned char *) &data[0], /* pb_TimingUnit */
97 (unsigned int *) &data[1], /* pul_LowTiming */
98 (unsigned int *) &data[2], /* pul_HighTiming */
99 (unsigned char *) &data[3], /* pb_StartLevel */
100 (unsigned char *) &data[4], /* pb_StopMode */
101 (unsigned char *) &data[5], /* pb_StopLevel */
102 (unsigned char *) &data[6], /* pb_ExternGate */
103 (unsigned char *) &data[7], /* pb_InterruptEnable */
104 (unsigned char *) &data[8] /* pb_Enable */
105 );
106 break;
107
108 default:
109 printk(" Config Parameter Wrong\n");
110 }
111
112 if (i_ReturnValue >= 0)
113 i_ReturnValue = insn->n;
114 return i_ReturnValue;
115}
116 60
117/* 61/*
118+----------------------------------------------------------------------------+ 62+----------------------------------------------------------------------------+
@@ -178,16 +122,17 @@ int i_APCI1710_InsnConfigPWM(struct comedi_device *dev, struct comedi_subdevice
178| this board | 122| this board |
179+----------------------------------------------------------------------------+ 123+----------------------------------------------------------------------------+
180*/ 124*/
181 125static int i_APCI1710_InitPWM(struct comedi_device *dev,
182int i_APCI1710_InitPWM(struct comedi_device *dev, 126 unsigned char b_ModulNbr,
183 unsigned char b_ModulNbr, 127 unsigned char b_PWM,
184 unsigned char b_PWM, 128 unsigned char b_ClockSelection,
185 unsigned char b_ClockSelection, 129 unsigned char b_TimingUnit,
186 unsigned char b_TimingUnit, 130 unsigned int ul_LowTiming,
187 unsigned int ul_LowTiming, 131 unsigned int ul_HighTiming,
188 unsigned int ul_HighTiming, 132 unsigned int *pul_RealLowTiming,
189 unsigned int *pul_RealLowTiming, unsigned int *pul_RealHighTiming) 133 unsigned int *pul_RealHighTiming)
190{ 134{
135 struct addi_private *devpriv = dev->private;
191 int i_ReturnValue = 0; 136 int i_ReturnValue = 0;
192 unsigned int ul_LowTimerValue = 0; 137 unsigned int ul_LowTimerValue = 0;
193 unsigned int ul_HighTimerValue = 0; 138 unsigned int ul_HighTimerValue = 0;
@@ -1533,18 +1478,20 @@ int i_APCI1710_InitPWM(struct comedi_device *dev,
1533| "i_APCI1710_InitPWM" | 1478| "i_APCI1710_InitPWM" |
1534+----------------------------------------------------------------------------+ 1479+----------------------------------------------------------------------------+
1535*/ 1480*/
1536 1481static int i_APCI1710_GetPWMInitialisation(struct comedi_device *dev,
1537int i_APCI1710_GetPWMInitialisation(struct comedi_device *dev, 1482 unsigned char b_ModulNbr,
1538 unsigned char b_ModulNbr, 1483 unsigned char b_PWM,
1539 unsigned char b_PWM, 1484 unsigned char *pb_TimingUnit,
1540 unsigned char *pb_TimingUnit, 1485 unsigned int *pul_LowTiming,
1541 unsigned int *pul_LowTiming, 1486 unsigned int *pul_HighTiming,
1542 unsigned int *pul_HighTiming, 1487 unsigned char *pb_StartLevel,
1543 unsigned char *pb_StartLevel, 1488 unsigned char *pb_StopMode,
1544 unsigned char *pb_StopMode, 1489 unsigned char *pb_StopLevel,
1545 unsigned char *pb_StopLevel, 1490 unsigned char *pb_ExternGate,
1546 unsigned char *pb_ExternGate, unsigned char *pb_InterruptEnable, unsigned char *pb_Enable) 1491 unsigned char *pb_InterruptEnable,
1492 unsigned char *pb_Enable)
1547{ 1493{
1494 struct addi_private *devpriv = dev->private;
1548 int i_ReturnValue = 0; 1495 int i_ReturnValue = 0;
1549 unsigned int dw_Status; 1496 unsigned int dw_Status;
1550 unsigned int dw_Command; 1497 unsigned int dw_Command;
@@ -1669,51 +1616,47 @@ int i_APCI1710_GetPWMInitialisation(struct comedi_device *dev,
1669} 1616}
1670 1617
1671/* 1618/*
1672+----------------------------------------------------------------------------+ 1619 * Pwm Init and Get Pwm Initialisation
1673| Function Name :INT i_APCI1710_InsnWritePWM(struct comedi_device *dev, 1620 */
1674struct comedi_subdevice *s,struct comedi_insn *insn,unsigned int *data) | 1621static int i_APCI1710_InsnConfigPWM(struct comedi_device *dev,
1675+----------------------------------------------------------------------------+ 1622 struct comedi_subdevice *s,
1676| Task : Pwm Enable Disable and Set New Timing | 1623 struct comedi_insn *insn,
1677+----------------------------------------------------------------------------+ 1624 unsigned int *data)
1678| Input Parameters :
1679+----------------------------------------------------------------------------+
1680| Output Parameters : - |
1681+----------------------------------------------------------------------------+
1682| Return Value :
1683+----------------------------------------------------------------------------+
1684*/
1685
1686int i_APCI1710_InsnWritePWM(struct comedi_device *dev, struct comedi_subdevice *s,
1687 struct comedi_insn *insn, unsigned int *data)
1688{ 1625{
1689 unsigned char b_WriteType; 1626 unsigned char b_ConfigType;
1690 int i_ReturnValue = 0; 1627 int i_ReturnValue = 0;
1691 b_WriteType = CR_CHAN(insn->chanspec); 1628 b_ConfigType = CR_CHAN(insn->chanspec);
1692
1693 switch (b_WriteType) {
1694 case APCI1710_PWM_ENABLE:
1695 i_ReturnValue = i_APCI1710_EnablePWM(dev,
1696 (unsigned char) CR_AREF(insn->chanspec),
1697 (unsigned char) data[0],
1698 (unsigned char) data[1],
1699 (unsigned char) data[2],
1700 (unsigned char) data[3], (unsigned char) data[4], (unsigned char) data[5]);
1701 break;
1702 1629
1703 case APCI1710_PWM_DISABLE: 1630 switch (b_ConfigType) {
1704 i_ReturnValue = i_APCI1710_DisablePWM(dev, 1631 case APCI1710_PWM_INIT:
1705 (unsigned char) CR_AREF(insn->chanspec), (unsigned char) data[0]); 1632 i_ReturnValue = i_APCI1710_InitPWM(dev, (unsigned char) CR_AREF(insn->chanspec), /* b_ModulNbr */
1633 (unsigned char) data[0], /* b_PWM */
1634 (unsigned char) data[1], /* b_ClockSelection */
1635 (unsigned char) data[2], /* b_TimingUnit */
1636 (unsigned int) data[3], /* ul_LowTiming */
1637 (unsigned int) data[4], /* ul_HighTiming */
1638 (unsigned int *) &data[0], /* pul_RealLowTiming */
1639 (unsigned int *) &data[1] /* pul_RealHighTiming */
1640 );
1706 break; 1641 break;
1707 1642
1708 case APCI1710_PWM_NEWTIMING: 1643 case APCI1710_PWM_GETINITDATA:
1709 i_ReturnValue = i_APCI1710_SetNewPWMTiming(dev, 1644 i_ReturnValue = i_APCI1710_GetPWMInitialisation(dev, (unsigned char) CR_AREF(insn->chanspec), /* b_ModulNbr */
1710 (unsigned char) CR_AREF(insn->chanspec), 1645 (unsigned char) data[0], /* b_PWM */
1711 (unsigned char) data[0], 1646 (unsigned char *) &data[0], /* pb_TimingUnit */
1712 (unsigned char) data[1], (unsigned int) data[2], (unsigned int) data[3]); 1647 (unsigned int *) &data[1], /* pul_LowTiming */
1648 (unsigned int *) &data[2], /* pul_HighTiming */
1649 (unsigned char *) &data[3], /* pb_StartLevel */
1650 (unsigned char *) &data[4], /* pb_StopMode */
1651 (unsigned char *) &data[5], /* pb_StopLevel */
1652 (unsigned char *) &data[6], /* pb_ExternGate */
1653 (unsigned char *) &data[7], /* pb_InterruptEnable */
1654 (unsigned char *) &data[8] /* pb_Enable */
1655 );
1713 break; 1656 break;
1714 1657
1715 default: 1658 default:
1716 printk("Write Config Parameter Wrong\n"); 1659 printk(" Config Parameter Wrong\n");
1717 } 1660 }
1718 1661
1719 if (i_ReturnValue >= 0) 1662 if (i_ReturnValue >= 0)
@@ -1805,14 +1748,16 @@ int i_APCI1710_InsnWritePWM(struct comedi_device *dev, struct comedi_subdevice *
1805| See function "i_APCI1710_SetBoardIntRoutineX" | 1748| See function "i_APCI1710_SetBoardIntRoutineX" |
1806+----------------------------------------------------------------------------+ 1749+----------------------------------------------------------------------------+
1807*/ 1750*/
1808 1751static int i_APCI1710_EnablePWM(struct comedi_device *dev,
1809int i_APCI1710_EnablePWM(struct comedi_device *dev, 1752 unsigned char b_ModulNbr,
1810 unsigned char b_ModulNbr, 1753 unsigned char b_PWM,
1811 unsigned char b_PWM, 1754 unsigned char b_StartLevel,
1812 unsigned char b_StartLevel, 1755 unsigned char b_StopMode,
1813 unsigned char b_StopMode, 1756 unsigned char b_StopLevel,
1814 unsigned char b_StopLevel, unsigned char b_ExternGate, unsigned char b_InterruptEnable) 1757 unsigned char b_ExternGate,
1758 unsigned char b_InterruptEnable)
1815{ 1759{
1760 struct addi_private *devpriv = dev->private;
1816 int i_ReturnValue = 0; 1761 int i_ReturnValue = 0;
1817 unsigned int dw_Status; 1762 unsigned int dw_Status;
1818 unsigned int dw_Command; 1763 unsigned int dw_Command;
@@ -2061,9 +2006,11 @@ int i_APCI1710_EnablePWM(struct comedi_device *dev,
2061| "i_APCI1710_EnablePWM" | 2006| "i_APCI1710_EnablePWM" |
2062+----------------------------------------------------------------------------+ 2007+----------------------------------------------------------------------------+
2063*/ 2008*/
2064 2009static int i_APCI1710_DisablePWM(struct comedi_device *dev,
2065int i_APCI1710_DisablePWM(struct comedi_device *dev, unsigned char b_ModulNbr, unsigned char b_PWM) 2010 unsigned char b_ModulNbr,
2011 unsigned char b_PWM)
2066{ 2012{
2013 struct addi_private *devpriv = dev->private;
2067 int i_ReturnValue = 0; 2014 int i_ReturnValue = 0;
2068 unsigned int dw_Status; 2015 unsigned int dw_Status;
2069 2016
@@ -2188,11 +2135,14 @@ int i_APCI1710_DisablePWM(struct comedi_device *dev, unsigned char b_ModulNbr, u
2188| -8: High base timing selection is wrong | 2135| -8: High base timing selection is wrong |
2189+----------------------------------------------------------------------------+ 2136+----------------------------------------------------------------------------+
2190*/ 2137*/
2191 2138static int i_APCI1710_SetNewPWMTiming(struct comedi_device *dev,
2192int i_APCI1710_SetNewPWMTiming(struct comedi_device *dev, 2139 unsigned char b_ModulNbr,
2193 unsigned char b_ModulNbr, 2140 unsigned char b_PWM,
2194 unsigned char b_PWM, unsigned char b_TimingUnit, unsigned int ul_LowTiming, unsigned int ul_HighTiming) 2141 unsigned char b_TimingUnit,
2142 unsigned int ul_LowTiming,
2143 unsigned int ul_HighTiming)
2195{ 2144{
2145 struct addi_private *devpriv = dev->private;
2196 unsigned char b_ClockSelection; 2146 unsigned char b_ClockSelection;
2197 int i_ReturnValue = 0; 2147 int i_ReturnValue = 0;
2198 unsigned int ul_LowTimerValue = 0; 2148 unsigned int ul_LowTimerValue = 0;
@@ -3415,6 +3365,49 @@ int i_APCI1710_SetNewPWMTiming(struct comedi_device *dev,
3415} 3365}
3416 3366
3417/* 3367/*
3368 * Pwm Enable Disable and Set New Timing
3369 */
3370static int i_APCI1710_InsnWritePWM(struct comedi_device *dev,
3371 struct comedi_subdevice *s,
3372 struct comedi_insn *insn,
3373 unsigned int *data)
3374{
3375 unsigned char b_WriteType;
3376 int i_ReturnValue = 0;
3377 b_WriteType = CR_CHAN(insn->chanspec);
3378
3379 switch (b_WriteType) {
3380 case APCI1710_PWM_ENABLE:
3381 i_ReturnValue = i_APCI1710_EnablePWM(dev,
3382 (unsigned char) CR_AREF(insn->chanspec),
3383 (unsigned char) data[0],
3384 (unsigned char) data[1],
3385 (unsigned char) data[2],
3386 (unsigned char) data[3], (unsigned char) data[4], (unsigned char) data[5]);
3387 break;
3388
3389 case APCI1710_PWM_DISABLE:
3390 i_ReturnValue = i_APCI1710_DisablePWM(dev,
3391 (unsigned char) CR_AREF(insn->chanspec), (unsigned char) data[0]);
3392 break;
3393
3394 case APCI1710_PWM_NEWTIMING:
3395 i_ReturnValue = i_APCI1710_SetNewPWMTiming(dev,
3396 (unsigned char) CR_AREF(insn->chanspec),
3397 (unsigned char) data[0],
3398 (unsigned char) data[1], (unsigned int) data[2], (unsigned int) data[3]);
3399 break;
3400
3401 default:
3402 printk("Write Config Parameter Wrong\n");
3403 }
3404
3405 if (i_ReturnValue >= 0)
3406 i_ReturnValue = insn->n;
3407 return i_ReturnValue;
3408}
3409
3410/*
3418+----------------------------------------------------------------------------+ 3411+----------------------------------------------------------------------------+
3419| Function Name : _INT_ i_APCI1710_GetPWMStatus | 3412| Function Name : _INT_ i_APCI1710_GetPWMStatus |
3420| (unsigned char_ b_BoardHandle, | 3413| (unsigned char_ b_BoardHandle, |
@@ -3459,13 +3452,14 @@ int i_APCI1710_SetNewPWMTiming(struct comedi_device *dev,
3459| -6: PWM not enabled see function "i_APCI1710_EnablePWM"| 3452| -6: PWM not enabled see function "i_APCI1710_EnablePWM"|
3460+----------------------------------------------------------------------------+ 3453+----------------------------------------------------------------------------+
3461*/ 3454*/
3462 3455static int i_APCI1710_InsnReadGetPWMStatus(struct comedi_device *dev,
3463int i_APCI1710_InsnReadGetPWMStatus(struct comedi_device *dev, struct comedi_subdevice *s, 3456 struct comedi_subdevice *s,
3464 struct comedi_insn *insn, unsigned int *data) 3457 struct comedi_insn *insn,
3458 unsigned int *data)
3465{ 3459{
3460 struct addi_private *devpriv = dev->private;
3466 int i_ReturnValue = 0; 3461 int i_ReturnValue = 0;
3467 unsigned int dw_Status; 3462 unsigned int dw_Status;
3468
3469 unsigned char b_ModulNbr; 3463 unsigned char b_ModulNbr;
3470 unsigned char b_PWM; 3464 unsigned char b_PWM;
3471 unsigned char *pb_PWMOutputStatus; 3465 unsigned char *pb_PWMOutputStatus;
@@ -3561,9 +3555,13 @@ int i_APCI1710_InsnReadGetPWMStatus(struct comedi_device *dev, struct comedi_sub
3561 return i_ReturnValue; 3555 return i_ReturnValue;
3562} 3556}
3563 3557
3564int i_APCI1710_InsnBitsReadPWMInterrupt(struct comedi_device *dev, 3558static int i_APCI1710_InsnBitsReadPWMInterrupt(struct comedi_device *dev,
3565 struct comedi_subdevice *s, struct comedi_insn *insn, unsigned int *data) 3559 struct comedi_subdevice *s,
3560 struct comedi_insn *insn,
3561 unsigned int *data)
3566{ 3562{
3563 struct addi_private *devpriv = dev->private;
3564
3567 data[0] = devpriv->s_InterruptParameters. 3565 data[0] = devpriv->s_InterruptParameters.
3568 s_FIFOInterruptParameters[devpriv-> 3566 s_FIFOInterruptParameters[devpriv->
3569 s_InterruptParameters.ui_Read].b_OldModuleMask; 3567 s_InterruptParameters.ui_Read].b_OldModuleMask;
diff --git a/drivers/staging/comedi/drivers/addi-data/APCI1710_Pwm.h b/drivers/staging/comedi/drivers/addi-data/APCI1710_Pwm.h
deleted file mode 100644
index d8ad0b9cf509..000000000000
--- a/drivers/staging/comedi/drivers/addi-data/APCI1710_Pwm.h
+++ /dev/null
@@ -1,76 +0,0 @@
1/*
2 * Copyright (C) 2004,2005 ADDI-DATA GmbH for the source code of this module.
3 *
4 * ADDI-DATA GmbH
5 * Dieselstrasse 3
6 * D-77833 Ottersweier
7 * Tel: +19(0)7223/9493-0
8 * Fax: +49(0)7223/9493-92
9 * http://www.addi-data.com
10 * info@addi-data.com
11 *
12 * This program is free software; you can redistribute it and/or modify it
13 * under the terms of the GNU General Public License as published by the Free
14 * Software Foundation; either version 2 of the License, or (at your option)
15 * any later version.
16 */
17
18#define APCI1710_30MHZ 30
19#define APCI1710_33MHZ 33
20#define APCI1710_40MHZ 40
21
22#define APCI1710_PWM_INIT 0
23#define APCI1710_PWM_GETINITDATA 1
24
25#define APCI1710_PWM_DISABLE 0
26#define APCI1710_PWM_ENABLE 1
27#define APCI1710_PWM_NEWTIMING 2
28
29int i_APCI1710_InsnConfigPWM(struct comedi_device *dev, struct comedi_subdevice *s,
30 struct comedi_insn *insn, unsigned int *data);
31
32int i_APCI1710_InitPWM(struct comedi_device *dev,
33 unsigned char b_ModulNbr,
34 unsigned char b_PWM,
35 unsigned char b_ClockSelection,
36 unsigned char b_TimingUnit,
37 unsigned int ul_LowTiming,
38 unsigned int ul_HighTiming,
39 unsigned int *pul_RealLowTiming, unsigned int *pul_RealHighTiming);
40
41int i_APCI1710_GetPWMInitialisation(struct comedi_device *dev,
42 unsigned char b_ModulNbr,
43 unsigned char b_PWM,
44 unsigned char *pb_TimingUnit,
45 unsigned int *pul_LowTiming,
46 unsigned int *pul_HighTiming,
47 unsigned char *pb_StartLevel,
48 unsigned char *pb_StopMode,
49 unsigned char *pb_StopLevel,
50 unsigned char *pb_ExternGate,
51 unsigned char *pb_InterruptEnable, unsigned char *pb_Enable);
52
53int i_APCI1710_InsnWritePWM(struct comedi_device *dev, struct comedi_subdevice *s,
54 struct comedi_insn *insn, unsigned int *data);
55
56int i_APCI1710_EnablePWM(struct comedi_device *dev,
57 unsigned char b_ModulNbr,
58 unsigned char b_PWM,
59 unsigned char b_StartLevel,
60 unsigned char b_StopMode,
61 unsigned char b_StopLevel, unsigned char b_ExternGate,
62 unsigned char b_InterruptEnable);
63
64int i_APCI1710_SetNewPWMTiming(struct comedi_device *dev,
65 unsigned char b_ModulNbr,
66 unsigned char b_PWM, unsigned char b_TimingUnit,
67 unsigned int ul_LowTiming, unsigned int ul_HighTiming);
68
69int i_APCI1710_DisablePWM(struct comedi_device *dev, unsigned char b_ModulNbr, unsigned char b_PWM);
70
71int i_APCI1710_InsnReadGetPWMStatus(struct comedi_device *dev, struct comedi_subdevice *s,
72 struct comedi_insn *insn, unsigned int *data);
73
74int i_APCI1710_InsnBitsReadPWMInterrupt(struct comedi_device *dev,
75 struct comedi_subdevice *s,
76 struct comedi_insn *insn, unsigned int *data);
diff --git a/drivers/staging/comedi/drivers/addi-data/APCI1710_Ssi.c b/drivers/staging/comedi/drivers/addi-data/APCI1710_Ssi.c
index c13b00274923..1e05732e9f3d 100644
--- a/drivers/staging/comedi/drivers/addi-data/APCI1710_Ssi.c
+++ b/drivers/staging/comedi/drivers/addi-data/APCI1710_Ssi.c
@@ -40,13 +40,20 @@ You should also find the complete GPL in the COPYING file accompanying this sour
40 +-----------------------------------------------------------------------+ 40 +-----------------------------------------------------------------------+
41*/ 41*/
42 42
43/* 43#define APCI1710_30MHZ 30
44+----------------------------------------------------------------------------+ 44#define APCI1710_33MHZ 33
45| Included files | 45#define APCI1710_40MHZ 40
46+----------------------------------------------------------------------------+
47*/
48 46
49#include "APCI1710_Ssi.h" 47#define APCI1710_BINARY_MODE 0x1
48#define APCI1710_GRAY_MODE 0x0
49
50#define APCI1710_SSI_READ1VALUE 1
51#define APCI1710_SSI_READALLVALUE 2
52
53#define APCI1710_SSI_SET_CHANNELON 0
54#define APCI1710_SSI_SET_CHANNELOFF 1
55#define APCI1710_SSI_READ_1CHANNEL 2
56#define APCI1710_SSI_READ_ALLCHANNEL 3
50 57
51/* 58/*
52+----------------------------------------------------------------------------+ 59+----------------------------------------------------------------------------+
@@ -119,9 +126,12 @@ You should also find the complete GPL in the COPYING file accompanying this sour
119+----------------------------------------------------------------------------+ 126+----------------------------------------------------------------------------+
120*/ 127*/
121 128
122int i_APCI1710_InsnConfigInitSSI(struct comedi_device *dev, struct comedi_subdevice *s, 129static int i_APCI1710_InsnConfigInitSSI(struct comedi_device *dev,
123 struct comedi_insn *insn, unsigned int *data) 130 struct comedi_subdevice *s,
131 struct comedi_insn *insn,
132 unsigned int *data)
124{ 133{
134 struct addi_private *devpriv = dev->private;
125 int i_ReturnValue = 0; 135 int i_ReturnValue = 0;
126 unsigned int ui_TimerValue; 136 unsigned int ui_TimerValue;
127 unsigned char b_ModulNbr, b_SSIProfile, b_PositionTurnLength, b_TurnCptLength, 137 unsigned char b_ModulNbr, b_SSIProfile, b_PositionTurnLength, b_TurnCptLength,
@@ -386,9 +396,12 @@ pul_Position = (unsigned int *) &data[0];
386+----------------------------------------------------------------------------+ 396+----------------------------------------------------------------------------+
387*/ 397*/
388 398
389int i_APCI1710_InsnReadSSIValue(struct comedi_device *dev, struct comedi_subdevice *s, 399static int i_APCI1710_InsnReadSSIValue(struct comedi_device *dev,
390 struct comedi_insn *insn, unsigned int *data) 400 struct comedi_subdevice *s,
401 struct comedi_insn *insn,
402 unsigned int *data)
391{ 403{
404 struct addi_private *devpriv = dev->private;
392 int i_ReturnValue = 0; 405 int i_ReturnValue = 0;
393 unsigned char b_Cpt; 406 unsigned char b_Cpt;
394 unsigned char b_Length; 407 unsigned char b_Length;
@@ -719,9 +732,12 @@ int i_APCI1710_InsnReadSSIValue(struct comedi_device *dev, struct comedi_subdevi
719+----------------------------------------------------------------------------+ 732+----------------------------------------------------------------------------+
720*/ 733*/
721 734
722int i_APCI1710_InsnBitsSSIDigitalIO(struct comedi_device *dev, struct comedi_subdevice *s, 735static int i_APCI1710_InsnBitsSSIDigitalIO(struct comedi_device *dev,
723 struct comedi_insn *insn, unsigned int *data) 736 struct comedi_subdevice *s,
737 struct comedi_insn *insn,
738 unsigned int *data)
724{ 739{
740 struct addi_private *devpriv = dev->private;
725 int i_ReturnValue = 0; 741 int i_ReturnValue = 0;
726 unsigned int dw_StatusReg; 742 unsigned int dw_StatusReg;
727 unsigned char b_ModulNbr; 743 unsigned char b_ModulNbr;
@@ -729,6 +745,7 @@ int i_APCI1710_InsnBitsSSIDigitalIO(struct comedi_device *dev, struct comedi_sub
729 unsigned char *pb_ChannelStatus; 745 unsigned char *pb_ChannelStatus;
730 unsigned char *pb_InputStatus; 746 unsigned char *pb_InputStatus;
731 unsigned char b_IOType; 747 unsigned char b_IOType;
748
732 i_ReturnValue = insn->n; 749 i_ReturnValue = insn->n;
733 b_ModulNbr = (unsigned char) CR_AREF(insn->chanspec); 750 b_ModulNbr = (unsigned char) CR_AREF(insn->chanspec);
734 b_IOType = (unsigned char) data[0]; 751 b_IOType = (unsigned char) data[0];
diff --git a/drivers/staging/comedi/drivers/addi-data/APCI1710_Ssi.h b/drivers/staging/comedi/drivers/addi-data/APCI1710_Ssi.h
deleted file mode 100644
index ef4d88789d55..000000000000
--- a/drivers/staging/comedi/drivers/addi-data/APCI1710_Ssi.h
+++ /dev/null
@@ -1,43 +0,0 @@
1/*
2 * Copyright (C) 2004,2005 ADDI-DATA GmbH for the source code of this module.
3 *
4 * ADDI-DATA GmbH
5 * Dieselstrasse 3
6 * D-77833 Ottersweier
7 * Tel: +19(0)7223/9493-0
8 * Fax: +49(0)7223/9493-92
9 * http://www.addi-data.com
10 * info@addi-data.com
11 *
12 * This program is free software; you can redistribute it and/or modify it
13 * under the terms of the GNU General Public License as published by the Free
14 * Software Foundation; either version 2 of the License, or (at your option)
15 * any later version.
16 */
17
18#define APCI1710_30MHZ 30
19#define APCI1710_33MHZ 33
20#define APCI1710_40MHZ 40
21
22#define APCI1710_BINARY_MODE 0x1
23#define APCI1710_GRAY_MODE 0x0
24
25#define APCI1710_SSI_READ1VALUE 1
26#define APCI1710_SSI_READALLVALUE 2
27
28#define APCI1710_SSI_SET_CHANNELON 0
29#define APCI1710_SSI_SET_CHANNELOFF 1
30#define APCI1710_SSI_READ_1CHANNEL 2
31#define APCI1710_SSI_READ_ALLCHANNEL 3
32
33/*
34 * SSI INISIALISATION FUNCTION
35 */
36int i_APCI1710_InsnConfigInitSSI(struct comedi_device *dev, struct comedi_subdevice *s,
37 struct comedi_insn *insn, unsigned int *data);
38
39int i_APCI1710_InsnReadSSIValue(struct comedi_device *dev, struct comedi_subdevice *s,
40 struct comedi_insn *insn, unsigned int *data);
41
42int i_APCI1710_InsnBitsSSIDigitalIO(struct comedi_device *dev, struct comedi_subdevice *s,
43 struct comedi_insn *insn, unsigned int *data);
diff --git a/drivers/staging/comedi/drivers/addi-data/APCI1710_Tor.c b/drivers/staging/comedi/drivers/addi-data/APCI1710_Tor.c
index 0e6affd95962..3bc9826ce40b 100644
--- a/drivers/staging/comedi/drivers/addi-data/APCI1710_Tor.c
+++ b/drivers/staging/comedi/drivers/addi-data/APCI1710_Tor.c
@@ -52,13 +52,22 @@ You should also find the complete GPL in the COPYING file accompanying this sour
52 +-----------------------------------------------------------------------+ 52 +-----------------------------------------------------------------------+
53*/ 53*/
54 54
55/* 55#define APCI1710_30MHZ 30
56+----------------------------------------------------------------------------+ 56#define APCI1710_33MHZ 33
57| Included files | 57#define APCI1710_40MHZ 40
58+----------------------------------------------------------------------------+
59*/
60 58
61#include "APCI1710_Tor.h" 59#define APCI1710_GATE_INPUT 10
60
61#define APCI1710_TOR_SIMPLE_MODE 2
62#define APCI1710_TOR_DOUBLE_MODE 3
63#define APCI1710_TOR_QUADRUPLE_MODE 4
64
65#define APCI1710_SINGLE 0
66#define APCI1710_CONTINUOUS 1
67
68#define APCI1710_TOR_GETPROGRESSSTATUS 0
69#define APCI1710_TOR_GETCOUNTERVALUE 1
70#define APCI1710_TOR_READINTERRUPT 2
62 71
63/* 72/*
64+----------------------------------------------------------------------------+ 73+----------------------------------------------------------------------------+
@@ -130,9 +139,12 @@ You should also find the complete GPL in the COPYING file accompanying this sour
130+----------------------------------------------------------------------------+ 139+----------------------------------------------------------------------------+
131*/ 140*/
132 141
133int i_APCI1710_InsnConfigInitTorCounter(struct comedi_device *dev, 142static int i_APCI1710_InsnConfigInitTorCounter(struct comedi_device *dev,
134 struct comedi_subdevice *s, struct comedi_insn *insn, unsigned int *data) 143 struct comedi_subdevice *s,
144 struct comedi_insn *insn,
145 unsigned int *data)
135{ 146{
147 struct addi_private *devpriv = dev->private;
136 int i_ReturnValue = 0; 148 int i_ReturnValue = 0;
137 unsigned int ul_TimerValue = 0; 149 unsigned int ul_TimerValue = 0;
138 unsigned int dw_Command; 150 unsigned int dw_Command;
@@ -987,9 +999,12 @@ int i_APCI1710_InsnConfigInitTorCounter(struct comedi_device *dev,
987+----------------------------------------------------------------------------+ 999+----------------------------------------------------------------------------+
988*/ 1000*/
989 1001
990int i_APCI1710_InsnWriteEnableDisableTorCounter(struct comedi_device *dev, 1002static int i_APCI1710_InsnWriteEnableDisableTorCounter(struct comedi_device *dev,
991 struct comedi_subdevice *s, struct comedi_insn *insn, unsigned int *data) 1003 struct comedi_subdevice *s,
1004 struct comedi_insn *insn,
1005 unsigned int *data)
992{ 1006{
1007 struct addi_private *devpriv = dev->private;
993 int i_ReturnValue = 0; 1008 int i_ReturnValue = 0;
994 unsigned int dw_Status; 1009 unsigned int dw_Status;
995 unsigned int dw_DummyRead; 1010 unsigned int dw_DummyRead;
@@ -1460,9 +1475,12 @@ int i_APCI1710_InsnWriteEnableDisableTorCounter(struct comedi_device *dev,
1460+----------------------------------------------------------------------------+ 1475+----------------------------------------------------------------------------+
1461*/ 1476*/
1462 1477
1463int i_APCI1710_InsnReadGetTorCounterInitialisation(struct comedi_device *dev, 1478static int i_APCI1710_InsnReadGetTorCounterInitialisation(struct comedi_device *dev,
1464 struct comedi_subdevice *s, struct comedi_insn *insn, unsigned int *data) 1479 struct comedi_subdevice *s,
1480 struct comedi_insn *insn,
1481 unsigned int *data)
1465{ 1482{
1483 struct addi_private *devpriv = dev->private;
1466 int i_ReturnValue = 0; 1484 int i_ReturnValue = 0;
1467 unsigned int dw_Status; 1485 unsigned int dw_Status;
1468 unsigned char b_ModulNbr; 1486 unsigned char b_ModulNbr;
@@ -1700,13 +1718,15 @@ int i_APCI1710_InsnReadGetTorCounterInitialisation(struct comedi_device *dev,
1700+----------------------------------------------------------------------------+ 1718+----------------------------------------------------------------------------+
1701*/ 1719*/
1702 1720
1703int i_APCI1710_InsnBitsGetTorCounterProgressStatusAndValue(struct comedi_device *dev, 1721static int i_APCI1710_InsnBitsGetTorCounterProgressStatusAndValue(struct comedi_device *dev,
1704 struct comedi_subdevice *s, struct comedi_insn *insn, unsigned int *data) 1722 struct comedi_subdevice *s,
1723 struct comedi_insn *insn,
1724 unsigned int *data)
1705{ 1725{
1726 struct addi_private *devpriv = dev->private;
1706 int i_ReturnValue = 0; 1727 int i_ReturnValue = 0;
1707 unsigned int dw_Status; 1728 unsigned int dw_Status;
1708 unsigned int dw_TimeOut = 0; 1729 unsigned int dw_TimeOut = 0;
1709
1710 unsigned char b_ModulNbr; 1730 unsigned char b_ModulNbr;
1711 unsigned char b_TorCounter; 1731 unsigned char b_TorCounter;
1712 unsigned char b_ReadType; 1732 unsigned char b_ReadType;
diff --git a/drivers/staging/comedi/drivers/addi-data/APCI1710_Tor.h b/drivers/staging/comedi/drivers/addi-data/APCI1710_Tor.h
deleted file mode 100644
index 537d4755132e..000000000000
--- a/drivers/staging/comedi/drivers/addi-data/APCI1710_Tor.h
+++ /dev/null
@@ -1,57 +0,0 @@
1/*
2 * Copyright (C) 2004,2005 ADDI-DATA GmbH for the source code of this module.
3 *
4 * ADDI-DATA GmbH
5 * Dieselstrasse 3
6 * D-77833 Ottersweier
7 * Tel: +19(0)7223/9493-0
8 * Fax: +49(0)7223/9493-92
9 * http://www.addi-data.com
10 * info@addi-data.com
11 *
12 * This program is free software; you can redistribute it and/or modify it
13 * under the terms of the GNU General Public License as published by the Free
14 * Software Foundation; either version 2 of the License, or (at your option)
15 * any later version.
16 */
17
18#define APCI1710_30MHZ 30
19#define APCI1710_33MHZ 33
20#define APCI1710_40MHZ 40
21
22#define APCI1710_GATE_INPUT 10
23
24#define APCI1710_TOR_SIMPLE_MODE 2
25#define APCI1710_TOR_DOUBLE_MODE 3
26#define APCI1710_TOR_QUADRUPLE_MODE 4
27
28#define APCI1710_SINGLE 0
29#define APCI1710_CONTINUOUS 1
30
31#define APCI1710_TOR_GETPROGRESSSTATUS 0
32#define APCI1710_TOR_GETCOUNTERVALUE 1
33#define APCI1710_TOR_READINTERRUPT 2
34
35/*
36 * TOR_COUNTER INISIALISATION FUNCTION
37 */
38int i_APCI1710_InsnConfigInitTorCounter(struct comedi_device *dev,
39 struct comedi_subdevice *s,
40 struct comedi_insn *insn, unsigned int *data);
41
42int i_APCI1710_InsnWriteEnableDisableTorCounter(struct comedi_device *dev,
43 struct comedi_subdevice *s,
44 struct comedi_insn *insn,
45 unsigned int *data);
46
47int i_APCI1710_InsnReadGetTorCounterInitialisation(struct comedi_device *dev,
48 struct comedi_subdevice *s,
49 struct comedi_insn *insn,
50 unsigned int *data);
51/*
52 * TOR_COUNTER READ FUNCTION
53 */
54int i_APCI1710_InsnBitsGetTorCounterProgressStatusAndValue(struct comedi_device *dev,
55 struct comedi_subdevice *s,
56 struct comedi_insn *insn,
57 unsigned int *data);
diff --git a/drivers/staging/comedi/drivers/addi-data/APCI1710_Ttl.c b/drivers/staging/comedi/drivers/addi-data/APCI1710_Ttl.c
index 9e177f4af861..c8238b8921cd 100644
--- a/drivers/staging/comedi/drivers/addi-data/APCI1710_Ttl.c
+++ b/drivers/staging/comedi/drivers/addi-data/APCI1710_Ttl.c
@@ -52,13 +52,11 @@ You should also find the complete GPL in the COPYING file accompanying this sour
52 +-----------------------------------------------------------------------+ 52 +-----------------------------------------------------------------------+
53*/ 53*/
54 54
55/* 55#define APCI1710_TTL_INIT 0
56+----------------------------------------------------------------------------+ 56#define APCI1710_TTL_INITDIRECTION 1
57| Included files |
58+----------------------------------------------------------------------------+
59*/
60 57
61#include "APCI1710_Ttl.h" 58#define APCI1710_TTL_READCHANNEL 0
59#define APCI1710_TTL_READPORT 1
62 60
63/* 61/*
64+----------------------------------------------------------------------------+ 62+----------------------------------------------------------------------------+
@@ -100,9 +98,12 @@ You should also find the complete GPL in the COPYING file accompanying this sour
100+----------------------------------------------------------------------------+ 98+----------------------------------------------------------------------------+
101*/ 99*/
102 100
103int i_APCI1710_InsnConfigInitTTLIO(struct comedi_device *dev, struct comedi_subdevice *s, 101static int i_APCI1710_InsnConfigInitTTLIO(struct comedi_device *dev,
104 struct comedi_insn *insn, unsigned int *data) 102 struct comedi_subdevice *s,
103 struct comedi_insn *insn,
104 unsigned int *data)
105{ 105{
106 struct addi_private *devpriv = dev->private;
106 int i_ReturnValue = 0; 107 int i_ReturnValue = 0;
107 unsigned char b_ModulNbr; 108 unsigned char b_ModulNbr;
108 unsigned char b_InitType; 109 unsigned char b_InitType;
@@ -406,9 +407,12 @@ APCI1710_TTL_READCHANNEL
406+----------------------------------------------------------------------------+ 407+----------------------------------------------------------------------------+
407*/ 408*/
408 409
409int i_APCI1710_InsnBitsReadTTLIO(struct comedi_device *dev, struct comedi_subdevice *s, 410static int i_APCI1710_InsnBitsReadTTLIO(struct comedi_device *dev,
410 struct comedi_insn *insn, unsigned int *data) 411 struct comedi_subdevice *s,
412 struct comedi_insn *insn,
413 unsigned int *data)
411{ 414{
415 struct addi_private *devpriv = dev->private;
412 int i_ReturnValue = 0; 416 int i_ReturnValue = 0;
413 unsigned int dw_StatusReg; 417 unsigned int dw_StatusReg;
414 unsigned char b_ModulNbr; 418 unsigned char b_ModulNbr;
@@ -655,9 +659,12 @@ int i_APCI1710_InsnBitsReadTTLIO(struct comedi_device *dev, struct comedi_subdev
655+----------------------------------------------------------------------------+ 659+----------------------------------------------------------------------------+
656*/ 660*/
657 661
658int i_APCI1710_InsnReadTTLIOAllPortValue(struct comedi_device *dev, 662static int i_APCI1710_InsnReadTTLIOAllPortValue(struct comedi_device *dev,
659 struct comedi_subdevice *s, struct comedi_insn *insn, unsigned int *data) 663 struct comedi_subdevice *s,
664 struct comedi_insn *insn,
665 unsigned int *data)
660{ 666{
667 struct addi_private *devpriv = dev->private;
661 int i_ReturnValue = 0; 668 int i_ReturnValue = 0;
662 unsigned int dw_StatusReg; 669 unsigned int dw_StatusReg;
663 unsigned char b_ModulNbr; 670 unsigned char b_ModulNbr;
@@ -825,9 +832,12 @@ int i_APCI1710_InsnWriteSetTTLIOChlOnOff(struct comedi_device *dev,struct comedi
825+----------------------------------------------------------------------------+ 832+----------------------------------------------------------------------------+
826*/ 833*/
827 834
828int i_APCI1710_InsnWriteSetTTLIOChlOnOff(struct comedi_device *dev, 835static int i_APCI1710_InsnWriteSetTTLIOChlOnOff(struct comedi_device *dev,
829 struct comedi_subdevice *s, struct comedi_insn *insn, unsigned int *data) 836 struct comedi_subdevice *s,
837 struct comedi_insn *insn,
838 unsigned int *data)
830{ 839{
840 struct addi_private *devpriv = dev->private;
831 int i_ReturnValue = 0; 841 int i_ReturnValue = 0;
832 unsigned int dw_StatusReg = 0; 842 unsigned int dw_StatusReg = 0;
833 unsigned char b_ModulNbr; 843 unsigned char b_ModulNbr;
diff --git a/drivers/staging/comedi/drivers/addi-data/APCI1710_Ttl.h b/drivers/staging/comedi/drivers/addi-data/APCI1710_Ttl.h
deleted file mode 100644
index adcab824b25e..000000000000
--- a/drivers/staging/comedi/drivers/addi-data/APCI1710_Ttl.h
+++ /dev/null
@@ -1,44 +0,0 @@
1/*
2 * Copyright (C) 2004,2005 ADDI-DATA GmbH for the source code of this module.
3 *
4 * ADDI-DATA GmbH
5 * Dieselstrasse 3
6 * D-77833 Ottersweier
7 * Tel: +19(0)7223/9493-0
8 * Fax: +49(0)7223/9493-92
9 * http://www.addi-data.com
10 * info@addi-data.com
11 *
12 * This program is free software; you can redistribute it and/or modify it
13 * under the terms of the GNU General Public License as published by the Free
14 * Software Foundation; either version 2 of the License, or (at your option)
15 * any later version.
16 */
17
18#define APCI1710_TTL_INIT 0
19#define APCI1710_TTL_INITDIRECTION 1
20
21#define APCI1710_TTL_READCHANNEL 0
22#define APCI1710_TTL_READPORT 1
23
24/*
25 * TTL INISIALISATION FUNCTION
26 */
27int i_APCI1710_InsnConfigInitTTLIO(struct comedi_device *dev, struct comedi_subdevice *s,
28 struct comedi_insn *insn, unsigned int *data);
29
30/*
31 * TTL INPUT FUNCTION
32 */
33int i_APCI1710_InsnBitsReadTTLIO(struct comedi_device *dev, struct comedi_subdevice *s,
34 struct comedi_insn *insn, unsigned int *data);
35int i_APCI1710_InsnReadTTLIOAllPortValue(struct comedi_device *dev,
36 struct comedi_subdevice *s,
37 struct comedi_insn *insn, unsigned int *data);
38
39/*
40 * TTL OUTPUT FUNCTIONS
41 */
42int i_APCI1710_InsnWriteSetTTLIOChlOnOff(struct comedi_device *dev,
43 struct comedi_subdevice *s,
44 struct comedi_insn *insn, unsigned int *data);
diff --git a/drivers/staging/comedi/drivers/addi-data/addi_amcc_s5933.h b/drivers/staging/comedi/drivers/addi-data/addi_amcc_s5933.h
deleted file mode 100644
index 95f7dc61cd00..000000000000
--- a/drivers/staging/comedi/drivers/addi-data/addi_amcc_s5933.h
+++ /dev/null
@@ -1,469 +0,0 @@
1/*
2 * Copyright (C) 2004,2005 ADDI-DATA GmbH for the source code of this module.
3 *
4 * ADDI-DATA GmbH
5 * Dieselstrasse 3
6 * D-77833 Ottersweier
7 * Tel: +19(0)7223/9493-0
8 * Fax: +49(0)7223/9493-92
9 * http://www.addi-data.com
10 * info@addi-data.com
11 *
12 * This program is free software; you can redistribute it and/or modify it
13 * under the terms of the GNU General Public License as published by the Free
14 * Software Foundation; either version 2 of the License, or (at your option)
15 * any later version.
16 */
17
18/* Header file for AMCC s 5933 */
19
20#ifndef _AMCC_S5933_H_
21#define _AMCC_S5933_H_
22
23#include "../../comedidev.h"
24
25/* written on base0 */
26#define FIFO_ADVANCE_ON_BYTE_2 0x20000000
27
28/* added for step 6 dma written on base2 */
29#define AMWEN_ENABLE 0x02
30
31#define A2P_FIFO_WRITE_ENABLE 0x01
32
33/* for transfer count enable bit */
34#define AGCSTS_TC_ENABLE 0x10000000
35
36/*
37 * ADDON RELATED ADDITIONS
38 */
39/* Constant */
40#define APCI3120_ENABLE_TRANSFER_ADD_ON_LOW 0x00
41#define APCI3120_ENABLE_TRANSFER_ADD_ON_HIGH 0x1200
42#define APCI3120_A2P_FIFO_MANAGEMENT 0x04000400L
43#define APCI3120_AMWEN_ENABLE 0x02
44#define APCI3120_A2P_FIFO_WRITE_ENABLE 0x01
45#define APCI3120_FIFO_ADVANCE_ON_BYTE_2 0x20000000L
46#define APCI3120_ENABLE_WRITE_TC_INT 0x00004000L
47#define APCI3120_CLEAR_WRITE_TC_INT 0x00040000L
48#define APCI3120_DISABLE_AMWEN_AND_A2P_FIFO_WRITE 0x0
49#define APCI3120_DISABLE_BUS_MASTER_ADD_ON 0x0
50#define APCI3120_DISABLE_BUS_MASTER_PCI 0x0
51
52/* ADD_ON ::: this needed since apci supports 16 bit interface to add on */
53#define APCI3120_ADD_ON_AGCSTS_LOW 0x3C
54#define APCI3120_ADD_ON_AGCSTS_HIGH (APCI3120_ADD_ON_AGCSTS_LOW + 2)
55#define APCI3120_ADD_ON_MWAR_LOW 0x24
56#define APCI3120_ADD_ON_MWAR_HIGH (APCI3120_ADD_ON_MWAR_LOW + 2)
57#define APCI3120_ADD_ON_MWTC_LOW 0x058
58#define APCI3120_ADD_ON_MWTC_HIGH (APCI3120_ADD_ON_MWTC_LOW + 2)
59
60/* AMCC */
61#define APCI3120_AMCC_OP_MCSR 0x3C
62#define APCI3120_AMCC_OP_REG_INTCSR 0x38
63
64/*
65 * AMCC Operation Register Offsets - PCI
66 */
67#define AMCC_OP_REG_OMB1 0x00
68#define AMCC_OP_REG_OMB2 0x04
69#define AMCC_OP_REG_OMB3 0x08
70#define AMCC_OP_REG_OMB4 0x0c
71#define AMCC_OP_REG_IMB1 0x10
72#define AMCC_OP_REG_IMB2 0x14
73#define AMCC_OP_REG_IMB3 0x18
74#define AMCC_OP_REG_IMB4 0x1c
75#define AMCC_OP_REG_FIFO 0x20
76#define AMCC_OP_REG_MWAR 0x24
77#define AMCC_OP_REG_MWTC 0x28
78#define AMCC_OP_REG_MRAR 0x2c
79#define AMCC_OP_REG_MRTC 0x30
80#define AMCC_OP_REG_MBEF 0x34
81#define AMCC_OP_REG_INTCSR 0x38
82/* int source */
83#define AMCC_OP_REG_INTCSR_SRC (AMCC_OP_REG_INTCSR + 2)
84/* FIFO ctrl */
85#define AMCC_OP_REG_INTCSR_FEC (AMCC_OP_REG_INTCSR + 3)
86#define AMCC_OP_REG_MCSR 0x3c
87/* Data in byte 2 */
88#define AMCC_OP_REG_MCSR_NVDATA (AMCC_OP_REG_MCSR + 2)
89/* Command in byte 3 */
90#define AMCC_OP_REG_MCSR_NVCMD (AMCC_OP_REG_MCSR + 3)
91
92#define AMCC_FIFO_DEPTH_DWORD 8
93#define AMCC_FIFO_DEPTH_BYTES (8 * sizeof(u32))
94
95/*
96 * AMCC Operation Registers Size - PCI
97 */
98#define AMCC_OP_REG_SIZE 64 /* in bytes */
99
100/*
101 * AMCC Operation Register Offsets - Add-on
102 */
103#define AMCC_OP_REG_AIMB1 0x00
104#define AMCC_OP_REG_AIMB2 0x04
105#define AMCC_OP_REG_AIMB3 0x08
106#define AMCC_OP_REG_AIMB4 0x0c
107#define AMCC_OP_REG_AOMB1 0x10
108#define AMCC_OP_REG_AOMB2 0x14
109#define AMCC_OP_REG_AOMB3 0x18
110#define AMCC_OP_REG_AOMB4 0x1c
111#define AMCC_OP_REG_AFIFO 0x20
112#define AMCC_OP_REG_AMWAR 0x24
113#define AMCC_OP_REG_APTA 0x28
114#define AMCC_OP_REG_APTD 0x2c
115#define AMCC_OP_REG_AMRAR 0x30
116#define AMCC_OP_REG_AMBEF 0x34
117#define AMCC_OP_REG_AINT 0x38
118#define AMCC_OP_REG_AGCSTS 0x3c
119#define AMCC_OP_REG_AMWTC 0x58
120#define AMCC_OP_REG_AMRTC 0x5c
121
122/*
123 * AMCC - Add-on General Control/Status Register
124 */
125#define AGCSTS_CONTROL_MASK 0xfffff000
126#define AGCSTS_NV_ACC_MASK 0xe0000000
127#define AGCSTS_RESET_MASK 0x0e000000
128#define AGCSTS_NV_DA_MASK 0x00ff0000
129#define AGCSTS_BIST_MASK 0x0000f000
130#define AGCSTS_STATUS_MASK 0x000000ff
131#define AGCSTS_TCZERO_MASK 0x000000c0
132#define AGCSTS_FIFO_ST_MASK 0x0000003f
133
134#define AGCSTS_RESET_MBFLAGS 0x08000000
135#define AGCSTS_RESET_P2A_FIFO 0x04000000
136#define AGCSTS_RESET_A2P_FIFO 0x02000000
137#define AGCSTS_RESET_FIFOS (AGCSTS_RESET_A2P_FIFO | AGCSTS_RESET_P2A_FIFO)
138
139#define AGCSTS_A2P_TCOUNT 0x00000080
140#define AGCSTS_P2A_TCOUNT 0x00000040
141
142#define AGCSTS_FS_P2A_EMPTY 0x00000020
143#define AGCSTS_FS_P2A_HALF 0x00000010
144#define AGCSTS_FS_P2A_FULL 0x00000008
145
146#define AGCSTS_FS_A2P_EMPTY 0x00000004
147#define AGCSTS_FS_A2P_HALF 0x00000002
148#define AGCSTS_FS_A2P_FULL 0x00000001
149
150/*
151 * AMCC - Add-on Interrupt Control/Status Register
152 */
153#define AINT_INT_MASK 0x00ff0000
154#define AINT_SEL_MASK 0x0000ffff
155#define AINT_IS_ENSEL_MASK 0x00001f1f
156
157#define AINT_INT_ASSERTED 0x00800000
158#define AINT_BM_ERROR 0x00200000
159#define AINT_BIST_INT 0x00100000
160
161#define AINT_RT_COMPLETE 0x00080000
162#define AINT_WT_COMPLETE 0x00040000
163
164#define AINT_OUT_MB_INT 0x00020000
165#define AINT_IN_MB_INT 0x00010000
166
167#define AINT_READ_COMPL 0x00008000
168#define AINT_WRITE_COMPL 0x00004000
169
170#define AINT_OMB_ENABLE 0x00001000
171#define AINT_OMB_SELECT 0x00000c00
172#define AINT_OMB_BYTE 0x00000300
173
174#define AINT_IMB_ENABLE 0x00000010
175#define AINT_IMB_SELECT 0x0000000c
176#define AINT_IMB_BYTE 0x00000003
177
178/* Enable Bus Mastering */
179#define EN_A2P_TRANSFERS 0x00000400
180/* FIFO Flag Reset */
181#define RESET_A2P_FLAGS 0x04000000L
182/* FIFO Relative Priority */
183#define A2P_HI_PRIORITY 0x00000100L
184/* Identify Interrupt Sources */
185#define ANY_S593X_INT 0x00800000L
186#define READ_TC_INT 0x00080000L
187#define WRITE_TC_INT 0x00040000L
188#define IN_MB_INT 0x00020000L
189#define MASTER_ABORT_INT 0x00100000L
190#define TARGET_ABORT_INT 0x00200000L
191#define BUS_MASTER_INT 0x00200000L
192
193/****************************************************************************/
194
195struct pcilst_struct {
196 struct pcilst_struct *next;
197 int used;
198 struct pci_dev *pcidev;
199 unsigned short vendor;
200 unsigned short device;
201 unsigned char pci_bus;
202 unsigned char pci_slot;
203 unsigned char pci_func;
204 resource_size_t io_addr[5];
205 unsigned int irq;
206};
207
208/* ptr to root list of all amcc devices */
209static struct pcilst_struct *amcc_devices;
210
211static const int i_ADDIDATADeviceID[] = { 0x15B8, 0x10E8 };
212
213/****************************************************************************/
214
215void v_pci_card_list_init(unsigned short pci_vendor, char display);
216void v_pci_card_list_cleanup(unsigned short pci_vendor);
217struct pcilst_struct *ptr_find_free_pci_card_by_device(unsigned short vendor_id,
218 unsigned short
219 device_id);
220int i_find_free_pci_card_by_position(unsigned short vendor_id,
221 unsigned short device_id,
222 unsigned short pci_bus,
223 unsigned short pci_slot,
224 struct pcilst_struct **card);
225struct pcilst_struct *ptr_select_and_alloc_pci_card(unsigned short vendor_id,
226 unsigned short device_id,
227 unsigned short pci_bus,
228 unsigned short pci_slot,
229 int i_Master);
230
231int pci_card_alloc(struct pcilst_struct *amcc, int master);
232int i_pci_card_free(struct pcilst_struct *amcc);
233void v_pci_card_list_display(void);
234int i_pci_card_data(struct pcilst_struct *amcc,
235 unsigned char *pci_bus, unsigned char *pci_slot,
236 unsigned char *pci_func, resource_size_t * io_addr,
237 unsigned int *irq);
238
239/****************************************************************************/
240
241/* build list of amcc cards in this system */
242void v_pci_card_list_init(unsigned short pci_vendor, char display)
243{
244 struct pci_dev *pcidev = NULL;
245 struct pcilst_struct *amcc, *last;
246 int i;
247 int i_Count = 0;
248 amcc_devices = NULL;
249 last = NULL;
250
251 for_each_pci_dev(pcidev) {
252 for (i_Count = 0; i_Count < 2; i_Count++) {
253 pci_vendor = i_ADDIDATADeviceID[i_Count];
254 if (pcidev->vendor == pci_vendor) {
255 amcc = kzalloc(sizeof(*amcc), GFP_KERNEL);
256 if (amcc == NULL)
257 continue;
258
259 amcc->pcidev = pcidev;
260 if (last)
261 last->next = amcc;
262 else
263 amcc_devices = amcc;
264 last = amcc;
265
266 amcc->vendor = pcidev->vendor;
267 amcc->device = pcidev->device;
268 amcc->pci_bus = pcidev->bus->number;
269 amcc->pci_slot = PCI_SLOT(pcidev->devfn);
270 amcc->pci_func = PCI_FUNC(pcidev->devfn);
271 /* Note: resources may be invalid if PCI device
272 * not enabled, but they are corrected in
273 * pci_card_alloc. */
274 for (i = 0; i < 5; i++)
275 amcc->io_addr[i] =
276 pci_resource_start(pcidev, i);
277 amcc->irq = pcidev->irq;
278
279 }
280 }
281 }
282
283 if (display)
284 v_pci_card_list_display();
285}
286
287/****************************************************************************/
288/* free up list of amcc cards in this system */
289void v_pci_card_list_cleanup(unsigned short pci_vendor)
290{
291 struct pcilst_struct *amcc, *next;
292
293 for (amcc = amcc_devices; amcc; amcc = next) {
294 next = amcc->next;
295 kfree(amcc);
296 }
297
298 amcc_devices = NULL;
299}
300
301/****************************************************************************/
302/* find first unused card with this device_id */
303struct pcilst_struct *ptr_find_free_pci_card_by_device(unsigned short vendor_id,
304 unsigned short device_id)
305{
306 struct pcilst_struct *amcc, *next;
307
308 for (amcc = amcc_devices; amcc; amcc = next) {
309 next = amcc->next;
310 if ((!amcc->used) && (amcc->device == device_id)
311 && (amcc->vendor == vendor_id))
312 return amcc;
313
314 }
315
316 return NULL;
317}
318
319/****************************************************************************/
320/* find card on requested position */
321int i_find_free_pci_card_by_position(unsigned short vendor_id,
322 unsigned short device_id,
323 unsigned short pci_bus,
324 unsigned short pci_slot,
325 struct pcilst_struct **card)
326{
327 struct pcilst_struct *amcc, *next;
328
329 *card = NULL;
330 for (amcc = amcc_devices; amcc; amcc = next) {
331 next = amcc->next;
332 if ((amcc->vendor == vendor_id) && (amcc->device == device_id)
333 && (amcc->pci_bus == pci_bus)
334 && (amcc->pci_slot == pci_slot)) {
335 if (!(amcc->used)) {
336 *card = amcc;
337 return 0; /* ok, card is found */
338 } else {
339 printk(" - \nCard on requested position is used b:s %d:%d!\n",
340 pci_bus, pci_slot);
341 return 2; /* card exist but is used */
342 }
343 }
344 }
345
346 /* no card found */
347 return 1;
348}
349
350/****************************************************************************/
351/* mark card as used */
352int pci_card_alloc(struct pcilst_struct *amcc, int master)
353{
354 int i;
355
356 if (!amcc)
357 return -1;
358
359 if (amcc->used)
360 return 1;
361 if (comedi_pci_enable(amcc->pcidev, "addi_amcc_s5933"))
362 return -1;
363 /* Resources will be accurate now. */
364 for (i = 0; i < 5; i++)
365 amcc->io_addr[i] = pci_resource_start(amcc->pcidev, i);
366 if (master)
367 pci_set_master(amcc->pcidev);
368 amcc->used = 1;
369
370 return 0;
371}
372
373/****************************************************************************/
374/* mark card as free */
375int i_pci_card_free(struct pcilst_struct *amcc)
376{
377 if (!amcc)
378 return -1;
379
380 if (!amcc->used)
381 return 1;
382 amcc->used = 0;
383 comedi_pci_disable(amcc->pcidev);
384 return 0;
385}
386
387/****************************************************************************/
388/* display list of found cards */
389void v_pci_card_list_display(void)
390{
391 struct pcilst_struct *amcc, *next;
392
393 printk(KERN_DEBUG "List of pci cards\n");
394 printk(KERN_DEBUG "bus:slot:func vendor device io_amcc io_daq irq used\n");
395
396 for (amcc = amcc_devices; amcc; amcc = next) {
397 next = amcc->next;
398 printk
399 ("%2d %2d %2d 0x%4x 0x%4x 0x%8llx 0x%8llx %2u %2d\n",
400 amcc->pci_bus, amcc->pci_slot, amcc->pci_func,
401 amcc->vendor, amcc->device,
402 (unsigned long long)amcc->io_addr[0],
403 (unsigned long long)amcc->io_addr[2], amcc->irq,
404 amcc->used);
405
406 }
407}
408
409/****************************************************************************/
410/* return all card information for driver */
411int i_pci_card_data(struct pcilst_struct *amcc,
412 unsigned char *pci_bus, unsigned char *pci_slot,
413 unsigned char *pci_func, resource_size_t * io_addr,
414 unsigned int *irq)
415{
416 int i;
417
418 if (!amcc)
419 return -1;
420 *pci_bus = amcc->pci_bus;
421 *pci_slot = amcc->pci_slot;
422 *pci_func = amcc->pci_func;
423 for (i = 0; i < 5; i++)
424 io_addr[i] = amcc->io_addr[i];
425 *irq = amcc->irq;
426 return 0;
427}
428
429/****************************************************************************/
430/* select and alloc card */
431struct pcilst_struct *ptr_select_and_alloc_pci_card(unsigned short vendor_id,
432 unsigned short device_id,
433 unsigned short pci_bus,
434 unsigned short pci_slot,
435 int i_Master)
436{
437 struct pcilst_struct *card;
438
439 if ((pci_bus < 1) & (pci_slot < 1)) {
440 /* use autodetection */
441 card = ptr_find_free_pci_card_by_device(vendor_id, device_id);
442 if (card == NULL) {
443 printk(" - Unused card not found in system!\n");
444 return NULL;
445 }
446 } else {
447 switch (i_find_free_pci_card_by_position(vendor_id, device_id,
448 pci_bus, pci_slot,
449 &card)) {
450 case 1:
451 printk(" - Card not found on requested position b:s %d:%d!\n",
452 pci_bus, pci_slot);
453 return NULL;
454 case 2:
455 printk(" - Card on requested position is used b:s %d:%d!\n",
456 pci_bus, pci_slot);
457 return NULL;
458 }
459 }
460
461 if (pci_card_alloc(card, i_Master) != 0) {
462 printk(" - Can't allocate card!\n");
463 return NULL;
464
465 }
466
467 return card;
468}
469#endif
diff --git a/drivers/staging/comedi/drivers/addi-data/addi_common.c b/drivers/staging/comedi/drivers/addi-data/addi_common.c
index 99a96bd96716..90cc43263aee 100644
--- a/drivers/staging/comedi/drivers/addi-data/addi_common.c
+++ b/drivers/staging/comedi/drivers/addi-data/addi_common.c
@@ -36,1518 +36,107 @@ You should also find the complete GPL in the COPYING file accompanying this sour
36 +-----------------------------------------------------------------------+ 36 +-----------------------------------------------------------------------+
37 | Description : ADDI COMMON Main Module | 37 | Description : ADDI COMMON Main Module |
38 +-----------------------------------------------------------------------+ 38 +-----------------------------------------------------------------------+
39 | CONFIG OPTIONS |
40 | option[0] - PCI bus number - if bus number and slot number are 0, |
41 | then driver search for first unused card |
42 | option[1] - PCI slot number |
43 | |
44 | option[2] = 0 - DMA ENABLE |
45 | = 1 - DMA DISABLE |
46 +----------+-----------+------------------------------------------------+
47*/ 39*/
48 40
49#include <linux/kernel.h>
50#include <linux/module.h>
51#include <linux/sched.h>
52#include <linux/mm.h>
53#include <linux/errno.h>
54#include <linux/ioport.h>
55#include <linux/delay.h>
56#include <linux/interrupt.h>
57#include <linux/timex.h>
58#include <linux/timer.h>
59#include <linux/pci.h>
60#include <linux/gfp.h>
61#include <linux/io.h>
62#include "../../comedidev.h"
63#if defined(CONFIG_APCI_1710) || defined(CONFIG_APCI_3200) || defined(CONFIG_APCI_3300)
64#include <asm/i387.h>
65#endif
66#include "../comedi_fc.h"
67
68#include "addi_common.h"
69#include "addi_amcc_s5933.h"
70
71#ifndef ADDIDATA_DRIVER_NAME
72#define ADDIDATA_DRIVER_NAME "addi_common"
73#endif
74
75/* Update-0.7.57->0.7.68MODULE_AUTHOR("ADDI-DATA GmbH <info@addi-data.com>"); */
76/* Update-0.7.57->0.7.68MODULE_DESCRIPTION("Comedi ADDI-DATA module"); */
77/* Update-0.7.57->0.7.68MODULE_LICENSE("GPL"); */
78
79#define devpriv ((struct addi_private *)dev->private)
80#define this_board ((const struct addi_board *)dev->board_ptr)
81
82#if defined(CONFIG_APCI_1710) || defined(CONFIG_APCI_3200) || defined(CONFIG_APCI_3300)
83/* BYTE b_SaveFPUReg [94]; */
84
85void fpu_begin(void)
86{
87 /* asm ("fstenv b_SaveFPUReg"); */
88 kernel_fpu_begin();
89}
90
91void fpu_end(void)
92{
93 /* asm ("frstor b_SaveFPUReg"); */
94 kernel_fpu_end();
95}
96#endif
97
98#include "addi_eeprom.c"
99#if (defined (CONFIG_APCI_3120) || defined (CONFIG_APCI_3001))
100#include "hwdrv_apci3120.c"
101#endif
102#ifdef CONFIG_APCI_1032
103#include "hwdrv_apci1032.c"
104#endif
105#ifdef CONFIG_APCI_1516
106#include "hwdrv_apci1516.c"
107#endif
108#ifdef CONFIG_APCI_2016
109#include "hwdrv_apci2016.c"
110#endif
111#ifdef CONFIG_APCI_2032
112#include "hwdrv_apci2032.c"
113#endif
114#ifdef CONFIG_APCI_2200
115#include "hwdrv_apci2200.c"
116#endif
117#ifdef CONFIG_APCI_1564
118#include "hwdrv_apci1564.c"
119#endif
120#ifdef CONFIG_APCI_1500
121#include "hwdrv_apci1500.c"
122#endif
123#ifdef CONFIG_APCI_3501
124#include "hwdrv_apci3501.c"
125#endif
126#ifdef CONFIG_APCI_035
127#include "hwdrv_apci035.c"
128#endif
129#if (defined (CONFIG_APCI_3200) || defined (CONFIG_APCI_3300))
130#include "hwdrv_apci3200.c"
131#endif
132#ifdef CONFIG_APCI_1710
133#include "hwdrv_APCI1710.c"
134#endif
135#ifdef CONFIG_APCI_16XX
136#include "hwdrv_apci16xx.c"
137#endif
138#ifdef CONFIG_APCI_3XXX
139#include "hwdrv_apci3xxx.c"
140#endif
141
142#ifndef COMEDI_SUBD_TTLIO 41#ifndef COMEDI_SUBD_TTLIO
143#define COMEDI_SUBD_TTLIO 11 /* Digital Input Output But TTL */ 42#define COMEDI_SUBD_TTLIO 11 /* Digital Input Output But TTL */
144#endif 43#endif
145 44
146static DEFINE_PCI_DEVICE_TABLE(addi_apci_tbl) = { 45static int i_ADDIDATA_InsnReadEeprom(struct comedi_device *dev,
147#ifdef CONFIG_APCI_3120 46 struct comedi_subdevice *s,
148 {PCI_DEVICE(APCI3120_BOARD_VENDOR_ID, 0x818D)}, 47 struct comedi_insn *insn,
149#endif 48 unsigned int *data)
150#ifdef CONFIG_APCI_1032 49{
151 {PCI_DEVICE(APCI1032_BOARD_VENDOR_ID, 0x1003)}, 50 const struct addi_board *this_board = comedi_board(dev);
152#endif 51 struct addi_private *devpriv = dev->private;
153#ifdef CONFIG_APCI_1516 52 unsigned short w_Address = CR_CHAN(insn->chanspec);
154 {PCI_DEVICE(APCI1516_BOARD_VENDOR_ID, 0x1001)}, 53 unsigned short w_Data;
155#endif
156#ifdef CONFIG_APCI_2016
157 {PCI_DEVICE(APCI2016_BOARD_VENDOR_ID, 0x1002)},
158#endif
159#ifdef CONFIG_APCI_2032
160 {PCI_DEVICE(APCI2032_BOARD_VENDOR_ID, 0x1004)},
161#endif
162#ifdef CONFIG_APCI_2200
163 {PCI_DEVICE(APCI2200_BOARD_VENDOR_ID, 0x1005)},
164#endif
165#ifdef CONFIG_APCI_1564
166 {PCI_DEVICE(APCI1564_BOARD_VENDOR_ID, 0x1006)},
167#endif
168#ifdef CONFIG_APCI_1500
169 {PCI_DEVICE(APCI1500_BOARD_VENDOR_ID, 0x80fc)},
170#endif
171#ifdef CONFIG_APCI_3001
172 {PCI_DEVICE(APCI3120_BOARD_VENDOR_ID, 0x828D)},
173#endif
174#ifdef CONFIG_APCI_3501
175 {PCI_DEVICE(APCI3501_BOARD_VENDOR_ID, 0x3001)},
176#endif
177#ifdef CONFIG_APCI_035
178 {PCI_DEVICE(APCI035_BOARD_VENDOR_ID, 0x0300)},
179#endif
180#ifdef CONFIG_APCI_3200
181 {PCI_DEVICE(APCI3200_BOARD_VENDOR_ID, 0x3000)},
182#endif
183#ifdef CONFIG_APCI_3300
184 {PCI_DEVICE(APCI3200_BOARD_VENDOR_ID, 0x3007)},
185#endif
186#ifdef CONFIG_APCI_1710
187 {PCI_DEVICE(APCI1710_BOARD_VENDOR_ID, APCI1710_BOARD_DEVICE_ID)},
188#endif
189#ifdef CONFIG_APCI_16XX
190 {PCI_DEVICE(PCI_VENDOR_ID_ADDIDATA, 0x1009)},
191 {PCI_DEVICE(PCI_VENDOR_ID_ADDIDATA, 0x100A)},
192#endif
193#ifdef CONFIG_APCI_3XXX
194 {PCI_DEVICE(PCI_VENDOR_ID_ADDIDATA, 0x3010)},
195 {PCI_DEVICE(PCI_VENDOR_ID_ADDIDATA, 0x300F)},
196 {PCI_DEVICE(PCI_VENDOR_ID_ADDIDATA, 0x300E)},
197 {PCI_DEVICE(PCI_VENDOR_ID_ADDIDATA, 0x3013)},
198 {PCI_DEVICE(PCI_VENDOR_ID_ADDIDATA, 0x3014)},
199 {PCI_DEVICE(PCI_VENDOR_ID_ADDIDATA, 0x3015)},
200 {PCI_DEVICE(PCI_VENDOR_ID_ADDIDATA, 0x3016)},
201 {PCI_DEVICE(PCI_VENDOR_ID_ADDIDATA, 0x3017)},
202 {PCI_DEVICE(PCI_VENDOR_ID_ADDIDATA, 0x3018)},
203 {PCI_DEVICE(PCI_VENDOR_ID_ADDIDATA, 0x3019)},
204 {PCI_DEVICE(PCI_VENDOR_ID_ADDIDATA, 0x301A)},
205 {PCI_DEVICE(PCI_VENDOR_ID_ADDIDATA, 0x301B)},
206 {PCI_DEVICE(PCI_VENDOR_ID_ADDIDATA, 0x301C)},
207 {PCI_DEVICE(PCI_VENDOR_ID_ADDIDATA, 0x301D)},
208 {PCI_DEVICE(PCI_VENDOR_ID_ADDIDATA, 0x301E)},
209 {PCI_DEVICE(PCI_VENDOR_ID_ADDIDATA, 0x301F)},
210 {PCI_DEVICE(PCI_VENDOR_ID_ADDIDATA, 0x3020)},
211 {PCI_DEVICE(PCI_VENDOR_ID_ADDIDATA, 0x3021)},
212 {PCI_DEVICE(PCI_VENDOR_ID_ADDIDATA, 0x3022)},
213 {PCI_DEVICE(PCI_VENDOR_ID_ADDIDATA, 0x3023)},
214 {PCI_DEVICE(PCI_VENDOR_ID_ADDIDATA, 0x300B)},
215 {PCI_DEVICE(PCI_VENDOR_ID_ADDIDATA, 0x3002)},
216 {PCI_DEVICE(PCI_VENDOR_ID_ADDIDATA, 0x3003)},
217 {PCI_DEVICE(PCI_VENDOR_ID_ADDIDATA, 0x3004)},
218 {PCI_DEVICE(PCI_VENDOR_ID_ADDIDATA, 0x3024)},
219#endif
220 {0}
221};
222
223MODULE_DEVICE_TABLE(pci, addi_apci_tbl);
224
225static const struct addi_board boardtypes[] = {
226#ifdef CONFIG_APCI_3120
227 {
228 .pc_DriverName = "apci3120",
229 .i_VendorId = APCI3120_BOARD_VENDOR_ID,
230 .i_DeviceId = 0x818D,
231 .i_IorangeBase0 = AMCC_OP_REG_SIZE,
232 .i_IorangeBase1 = APCI3120_ADDRESS_RANGE,
233 .i_IorangeBase2 = 8,
234 .i_PCIEeprom = ADDIDATA_NO_EEPROM,
235 .i_NbrAiChannel = 16,
236 .i_NbrAiChannelDiff = 8,
237 .i_AiChannelList = 16,
238 .i_NbrAoChannel = 8,
239 .i_AiMaxdata = 0xffff,
240 .i_AoMaxdata = 0x3fff,
241 .pr_AiRangelist = &range_apci3120_ai,
242 .pr_AoRangelist = &range_apci3120_ao,
243 .i_NbrDiChannel = 4,
244 .i_NbrDoChannel = 4,
245 .i_DoMaxdata = 0x0f,
246 .i_Dma = 1,
247 .i_Timer = 1,
248 .b_AvailableConvertUnit = 1,
249 .ui_MinAcquisitiontimeNs = 10000,
250 .ui_MinDelaytimeNs = 100000,
251 .interrupt = v_APCI3120_Interrupt,
252 .reset = i_APCI3120_Reset,
253 .ai_config = i_APCI3120_InsnConfigAnalogInput,
254 .ai_read = i_APCI3120_InsnReadAnalogInput,
255 .ai_cmdtest = i_APCI3120_CommandTestAnalogInput,
256 .ai_cmd = i_APCI3120_CommandAnalogInput,
257 .ai_cancel = i_APCI3120_StopCyclicAcquisition,
258 .ao_write = i_APCI3120_InsnWriteAnalogOutput,
259 .di_read = i_APCI3120_InsnReadDigitalInput,
260 .di_bits = i_APCI3120_InsnBitsDigitalInput,
261 .do_config = i_APCI3120_InsnConfigDigitalOutput,
262 .do_write = i_APCI3120_InsnWriteDigitalOutput,
263 .do_bits = i_APCI3120_InsnBitsDigitalOutput,
264 .timer_config = i_APCI3120_InsnConfigTimer,
265 .timer_write = i_APCI3120_InsnWriteTimer,
266 .timer_read = i_APCI3120_InsnReadTimer,
267 },
268#endif
269#ifdef CONFIG_APCI_1032
270 {
271 .pc_DriverName = "apci1032",
272 .i_VendorId = APCI1032_BOARD_VENDOR_ID,
273 .i_DeviceId = 0x1003,
274 .i_IorangeBase0 = 4,
275 .i_IorangeBase1 = APCI1032_ADDRESS_RANGE,
276 .i_PCIEeprom = ADDIDATA_EEPROM,
277 .pc_EepromChip = ADDIDATA_93C76,
278 .i_NbrDiChannel = 32,
279 .interrupt = v_APCI1032_Interrupt,
280 .reset = i_APCI1032_Reset,
281 .di_config = i_APCI1032_ConfigDigitalInput,
282 .di_read = i_APCI1032_Read1DigitalInput,
283 .di_bits = i_APCI1032_ReadMoreDigitalInput,
284 },
285#endif
286#ifdef CONFIG_APCI_1516
287 {
288 .pc_DriverName = "apci1516",
289 .i_VendorId = APCI1516_BOARD_VENDOR_ID,
290 .i_DeviceId = 0x1001,
291 .i_IorangeBase0 = 128,
292 .i_IorangeBase1 = APCI1516_ADDRESS_RANGE,
293 .i_IorangeBase2 = 32,
294 .i_PCIEeprom = ADDIDATA_EEPROM,
295 .pc_EepromChip = ADDIDATA_S5920,
296 .i_NbrDiChannel = 8,
297 .i_NbrDoChannel = 8,
298 .i_Timer = 1,
299 .reset = i_APCI1516_Reset,
300 .di_read = i_APCI1516_Read1DigitalInput,
301 .di_bits = i_APCI1516_ReadMoreDigitalInput,
302 .do_config = i_APCI1516_ConfigDigitalOutput,
303 .do_write = i_APCI1516_WriteDigitalOutput,
304 .do_bits = i_APCI1516_ReadDigitalOutput,
305 .timer_config = i_APCI1516_ConfigWatchdog,
306 .timer_write = i_APCI1516_StartStopWriteWatchdog,
307 .timer_read = i_APCI1516_ReadWatchdog,
308 },
309#endif
310#ifdef CONFIG_APCI_2016
311 {
312 .pc_DriverName = "apci2016",
313 .i_VendorId = APCI2016_BOARD_VENDOR_ID,
314 .i_DeviceId = 0x1002,
315 .i_IorangeBase0 = 128,
316 .i_IorangeBase1 = APCI2016_ADDRESS_RANGE,
317 .i_IorangeBase2 = 32,
318 .i_PCIEeprom = ADDIDATA_EEPROM,
319 .pc_EepromChip = ADDIDATA_S5920,
320 .i_NbrDoChannel = 16,
321 .i_Timer = 1,
322 .reset = i_APCI2016_Reset,
323 .do_config = i_APCI2016_ConfigDigitalOutput,
324 .do_write = i_APCI2016_WriteDigitalOutput,
325 .do_bits = i_APCI2016_BitsDigitalOutput,
326 .timer_config = i_APCI2016_ConfigWatchdog,
327 .timer_write = i_APCI2016_StartStopWriteWatchdog,
328 .timer_read = i_APCI2016_ReadWatchdog,
329 },
330#endif
331#ifdef CONFIG_APCI_2032
332 {
333 .pc_DriverName = "apci2032",
334 .i_VendorId = APCI2032_BOARD_VENDOR_ID,
335 .i_DeviceId = 0x1004,
336 .i_IorangeBase0 = 4,
337 .i_IorangeBase1 = APCI2032_ADDRESS_RANGE,
338 .i_PCIEeprom = ADDIDATA_EEPROM,
339 .pc_EepromChip = ADDIDATA_93C76,
340 .i_NbrDoChannel = 32,
341 .i_DoMaxdata = 0xffffffff,
342 .i_Timer = 1,
343 .interrupt = v_APCI2032_Interrupt,
344 .reset = i_APCI2032_Reset,
345 .do_config = i_APCI2032_ConfigDigitalOutput,
346 .do_write = i_APCI2032_WriteDigitalOutput,
347 .do_bits = i_APCI2032_ReadDigitalOutput,
348 .do_read = i_APCI2032_ReadInterruptStatus,
349 .timer_config = i_APCI2032_ConfigWatchdog,
350 .timer_write = i_APCI2032_StartStopWriteWatchdog,
351 .timer_read = i_APCI2032_ReadWatchdog,
352 },
353#endif
354#ifdef CONFIG_APCI_2200
355 {
356 .pc_DriverName = "apci2200",
357 .i_VendorId = APCI2200_BOARD_VENDOR_ID,
358 .i_DeviceId = 0x1005,
359 .i_IorangeBase0 = 4,
360 .i_IorangeBase1 = APCI2200_ADDRESS_RANGE,
361 .i_PCIEeprom = ADDIDATA_EEPROM,
362 .pc_EepromChip = ADDIDATA_93C76,
363 .i_NbrDiChannel = 8,
364 .i_NbrDoChannel = 16,
365 .i_Timer = 1,
366 .reset = i_APCI2200_Reset,
367 .di_read = i_APCI2200_Read1DigitalInput,
368 .di_bits = i_APCI2200_ReadMoreDigitalInput,
369 .do_config = i_APCI2200_ConfigDigitalOutput,
370 .do_write = i_APCI2200_WriteDigitalOutput,
371 .do_bits = i_APCI2200_ReadDigitalOutput,
372 .timer_config = i_APCI2200_ConfigWatchdog,
373 .timer_write = i_APCI2200_StartStopWriteWatchdog,
374 .timer_read = i_APCI2200_ReadWatchdog,
375 },
376#endif
377#ifdef CONFIG_APCI_1564
378 {
379 .pc_DriverName = "apci1564",
380 .i_VendorId = APCI1564_BOARD_VENDOR_ID,
381 .i_DeviceId = 0x1006,
382 .i_IorangeBase0 = 128,
383 .i_IorangeBase1 = APCI1564_ADDRESS_RANGE,
384 .i_PCIEeprom = ADDIDATA_EEPROM,
385 .pc_EepromChip = ADDIDATA_93C76,
386 .i_NbrDiChannel = 32,
387 .i_NbrDoChannel = 32,
388 .i_DoMaxdata = 0xffffffff,
389 .i_Timer = 1,
390 .interrupt = v_APCI1564_Interrupt,
391 .reset = i_APCI1564_Reset,
392 .di_config = i_APCI1564_ConfigDigitalInput,
393 .di_read = i_APCI1564_Read1DigitalInput,
394 .di_bits = i_APCI1564_ReadMoreDigitalInput,
395 .do_config = i_APCI1564_ConfigDigitalOutput,
396 .do_write = i_APCI1564_WriteDigitalOutput,
397 .do_bits = i_APCI1564_ReadDigitalOutput,
398 .do_read = i_APCI1564_ReadInterruptStatus,
399 .timer_config = i_APCI1564_ConfigTimerCounterWatchdog,
400 .timer_write = i_APCI1564_StartStopWriteTimerCounterWatchdog,
401 .timer_read = i_APCI1564_ReadTimerCounterWatchdog,
402 },
403#endif
404#ifdef CONFIG_APCI_1500
405 {
406 .pc_DriverName = "apci1500",
407 .i_VendorId = APCI1500_BOARD_VENDOR_ID,
408 .i_DeviceId = 0x80fc,
409 .i_IorangeBase0 = 128,
410 .i_IorangeBase1 = APCI1500_ADDRESS_RANGE,
411 .i_IorangeBase2 = 4,
412 .i_PCIEeprom = ADDIDATA_NO_EEPROM,
413 .i_NbrDiChannel = 16,
414 .i_NbrDoChannel = 16,
415 .i_DoMaxdata = 0xffff,
416 .i_Timer = 1,
417 .interrupt = v_APCI1500_Interrupt,
418 .reset = i_APCI1500_Reset,
419 .di_config = i_APCI1500_ConfigDigitalInputEvent,
420 .di_read = i_APCI1500_Initialisation,
421 .di_write = i_APCI1500_StartStopInputEvent,
422 .di_bits = i_APCI1500_ReadMoreDigitalInput,
423 .do_config = i_APCI1500_ConfigDigitalOutputErrorInterrupt,
424 .do_write = i_APCI1500_WriteDigitalOutput,
425 .do_bits = i_APCI1500_ConfigureInterrupt,
426 .timer_config = i_APCI1500_ConfigCounterTimerWatchdog,
427 .timer_write = i_APCI1500_StartStopTriggerTimerCounterWatchdog,
428 .timer_read = i_APCI1500_ReadInterruptMask,
429 .timer_bits = i_APCI1500_ReadCounterTimerWatchdog,
430 },
431#endif
432#ifdef CONFIG_APCI_3001
433 {
434 .pc_DriverName = "apci3001",
435 .i_VendorId = APCI3120_BOARD_VENDOR_ID,
436 .i_DeviceId = 0x828D,
437 .i_IorangeBase0 = AMCC_OP_REG_SIZE,
438 .i_IorangeBase1 = APCI3120_ADDRESS_RANGE,
439 .i_IorangeBase2 = 8,
440 .i_PCIEeprom = ADDIDATA_NO_EEPROM,
441 .i_NbrAiChannel = 16,
442 .i_NbrAiChannelDiff = 8,
443 .i_AiChannelList = 16,
444 .i_AiMaxdata = 0xfff,
445 .pr_AiRangelist = &range_apci3120_ai,
446 .i_NbrDiChannel = 4,
447 .i_NbrDoChannel = 4,
448 .i_DoMaxdata = 0x0f,
449 .i_Dma = 1,
450 .i_Timer = 1,
451 .b_AvailableConvertUnit = 1,
452 .ui_MinAcquisitiontimeNs = 10000,
453 .ui_MinDelaytimeNs = 100000,
454 .interrupt = v_APCI3120_Interrupt,
455 .reset = i_APCI3120_Reset,
456 .ai_config = i_APCI3120_InsnConfigAnalogInput,
457 .ai_read = i_APCI3120_InsnReadAnalogInput,
458 .ai_cmdtest = i_APCI3120_CommandTestAnalogInput,
459 .ai_cmd = i_APCI3120_CommandAnalogInput,
460 .ai_cancel = i_APCI3120_StopCyclicAcquisition,
461 .di_read = i_APCI3120_InsnReadDigitalInput,
462 .di_bits = i_APCI3120_InsnBitsDigitalInput,
463 .do_config = i_APCI3120_InsnConfigDigitalOutput,
464 .do_write = i_APCI3120_InsnWriteDigitalOutput,
465 .do_bits = i_APCI3120_InsnBitsDigitalOutput,
466 .timer_config = i_APCI3120_InsnConfigTimer,
467 .timer_write = i_APCI3120_InsnWriteTimer,
468 .timer_read = i_APCI3120_InsnReadTimer,
469 },
470#endif
471#ifdef CONFIG_APCI_3501
472 {
473 .pc_DriverName = "apci3501",
474 .i_VendorId = APCI3501_BOARD_VENDOR_ID,
475 .i_DeviceId = 0x3001,
476 .i_IorangeBase0 = 64,
477 .i_IorangeBase1 = APCI3501_ADDRESS_RANGE,
478 .i_PCIEeprom = ADDIDATA_EEPROM,
479 .pc_EepromChip = ADDIDATA_S5933,
480 .i_AoMaxdata = 16383,
481 .pr_AoRangelist = &range_apci3501_ao,
482 .i_NbrDiChannel = 2,
483 .i_NbrDoChannel = 2,
484 .i_DoMaxdata = 0x3,
485 .i_Timer = 1,
486 .interrupt = v_APCI3501_Interrupt,
487 .reset = i_APCI3501_Reset,
488 .ao_config = i_APCI3501_ConfigAnalogOutput,
489 .ao_write = i_APCI3501_WriteAnalogOutput,
490 .di_bits = i_APCI3501_ReadDigitalInput,
491 .do_config = i_APCI3501_ConfigDigitalOutput,
492 .do_write = i_APCI3501_WriteDigitalOutput,
493 .do_bits = i_APCI3501_ReadDigitalOutput,
494 .timer_config = i_APCI3501_ConfigTimerCounterWatchdog,
495 .timer_write = i_APCI3501_StartStopWriteTimerCounterWatchdog,
496 .timer_read = i_APCI3501_ReadTimerCounterWatchdog,
497 },
498#endif
499#ifdef CONFIG_APCI_035
500 {
501 .pc_DriverName = "apci035",
502 .i_VendorId = APCI035_BOARD_VENDOR_ID,
503 .i_DeviceId = 0x0300,
504 .i_IorangeBase0 = 127,
505 .i_IorangeBase1 = APCI035_ADDRESS_RANGE,
506 .i_PCIEeprom = 1,
507 .pc_EepromChip = ADDIDATA_S5920,
508 .i_NbrAiChannel = 16,
509 .i_NbrAiChannelDiff = 8,
510 .i_AiChannelList = 16,
511 .i_AiMaxdata = 0xff,
512 .pr_AiRangelist = &range_apci035_ai,
513 .i_Timer = 1,
514 .ui_MinAcquisitiontimeNs = 10000,
515 .ui_MinDelaytimeNs = 100000,
516 .interrupt = v_APCI035_Interrupt,
517 .reset = i_APCI035_Reset,
518 .ai_config = i_APCI035_ConfigAnalogInput,
519 .ai_read = i_APCI035_ReadAnalogInput,
520 .timer_config = i_APCI035_ConfigTimerWatchdog,
521 .timer_write = i_APCI035_StartStopWriteTimerWatchdog,
522 .timer_read = i_APCI035_ReadTimerWatchdog,
523 },
524#endif
525#ifdef CONFIG_APCI_3200
526 {
527 .pc_DriverName = "apci3200",
528 .i_VendorId = APCI3200_BOARD_VENDOR_ID,
529 .i_DeviceId = 0x3000,
530 .i_IorangeBase0 = 128,
531 .i_IorangeBase1 = 256,
532 .i_IorangeBase2 = 4,
533 .i_IorangeBase3 = 4,
534 .i_PCIEeprom = ADDIDATA_EEPROM,
535 .pc_EepromChip = ADDIDATA_S5920,
536 .i_NbrAiChannel = 16,
537 .i_NbrAiChannelDiff = 8,
538 .i_AiChannelList = 16,
539 .i_AiMaxdata = 0x3ffff,
540 .pr_AiRangelist = &range_apci3200_ai,
541 .i_NbrDiChannel = 4,
542 .i_NbrDoChannel = 4,
543 .ui_MinAcquisitiontimeNs = 10000,
544 .ui_MinDelaytimeNs = 100000,
545 .interrupt = v_APCI3200_Interrupt,
546 .reset = i_APCI3200_Reset,
547 .ai_config = i_APCI3200_ConfigAnalogInput,
548 .ai_read = i_APCI3200_ReadAnalogInput,
549 .ai_write = i_APCI3200_InsnWriteReleaseAnalogInput,
550 .ai_bits = i_APCI3200_InsnBits_AnalogInput_Test,
551 .ai_cmdtest = i_APCI3200_CommandTestAnalogInput,
552 .ai_cmd = i_APCI3200_CommandAnalogInput,
553 .ai_cancel = i_APCI3200_StopCyclicAcquisition,
554 .di_bits = i_APCI3200_ReadDigitalInput,
555 .do_config = i_APCI3200_ConfigDigitalOutput,
556 .do_write = i_APCI3200_WriteDigitalOutput,
557 .do_bits = i_APCI3200_ReadDigitalOutput,
558 },
559#endif
560#ifdef CONFIG_APCI_3300
561 /* Begin JK .20.10.2004 = APCI-3300 integration */
562 {
563 .pc_DriverName = "apci3300",
564 .i_VendorId = APCI3200_BOARD_VENDOR_ID,
565 .i_DeviceId = 0x3007,
566 .i_IorangeBase0 = 128,
567 .i_IorangeBase1 = 256,
568 .i_IorangeBase2 = 4,
569 .i_IorangeBase3 = 4,
570 .i_PCIEeprom = ADDIDATA_EEPROM,
571 .pc_EepromChip = ADDIDATA_S5920,
572 .i_NbrAiChannelDiff = 8,
573 .i_AiChannelList = 8,
574 .i_AiMaxdata = 0x3ffff,
575 .pr_AiRangelist = &range_apci3300_ai,
576 .i_NbrDiChannel = 4,
577 .i_NbrDoChannel = 4,
578 .ui_MinAcquisitiontimeNs = 10000,
579 .ui_MinDelaytimeNs = 100000,
580 .interrupt = v_APCI3200_Interrupt,
581 .reset = i_APCI3200_Reset,
582 .ai_config = i_APCI3200_ConfigAnalogInput,
583 .ai_read = i_APCI3200_ReadAnalogInput,
584 .ai_write = i_APCI3200_InsnWriteReleaseAnalogInput,
585 .ai_bits = i_APCI3200_InsnBits_AnalogInput_Test,
586 .ai_cmdtest = i_APCI3200_CommandTestAnalogInput,
587 .ai_cmd = i_APCI3200_CommandAnalogInput,
588 .ai_cancel = i_APCI3200_StopCyclicAcquisition,
589 .di_bits = i_APCI3200_ReadDigitalInput,
590 .do_config = i_APCI3200_ConfigDigitalOutput,
591 .do_write = i_APCI3200_WriteDigitalOutput,
592 .do_bits = i_APCI3200_ReadDigitalOutput,
593 },
594#endif
595#ifdef CONFIG_APCI_1710
596 {
597 .pc_DriverName = "apci1710",
598 .i_VendorId = APCI1710_BOARD_VENDOR_ID,
599 .i_DeviceId = APCI1710_BOARD_DEVICE_ID,
600 .i_IorangeBase0 = 128,
601 .i_IorangeBase1 = 8,
602 .i_IorangeBase2 = 256,
603 .i_PCIEeprom = ADDIDATA_NO_EEPROM,
604 .interrupt = v_APCI1710_Interrupt,
605 .reset = i_APCI1710_Reset,
606 },
607#endif
608#ifdef CONFIG_APCI_16XX
609 {
610 .pc_DriverName = "apci1648",
611 .i_VendorId = PCI_VENDOR_ID_ADDIDATA,
612 .i_DeviceId = 0x1009,
613 .i_IorangeBase0 = 128,
614 .i_PCIEeprom = ADDIDATA_NO_EEPROM,
615 .i_NbrTTLChannel = 48,
616 .reset = i_APCI16XX_Reset,
617 .ttl_config = i_APCI16XX_InsnConfigInitTTLIO,
618 .ttl_bits = i_APCI16XX_InsnBitsReadTTLIO,
619 .ttl_read = i_APCI16XX_InsnReadTTLIOAllPortValue,
620 .ttl_write = i_APCI16XX_InsnBitsWriteTTLIO,
621 }, {
622 .pc_DriverName = "apci1696",
623 .i_VendorId = PCI_VENDOR_ID_ADDIDATA,
624 .i_DeviceId = 0x100A,
625 .i_IorangeBase0 = 128,
626 .i_PCIEeprom = ADDIDATA_NO_EEPROM,
627 .i_NbrTTLChannel = 96,
628 .reset = i_APCI16XX_Reset,
629 .ttl_config = i_APCI16XX_InsnConfigInitTTLIO,
630 .ttl_bits = i_APCI16XX_InsnBitsReadTTLIO,
631 .ttl_read = i_APCI16XX_InsnReadTTLIOAllPortValue,
632 .ttl_write = i_APCI16XX_InsnBitsWriteTTLIO,
633 },
634#endif
635#ifdef CONFIG_APCI_3XXX
636 {
637 .pc_DriverName = "apci3000-16",
638 .i_VendorId = PCI_VENDOR_ID_ADDIDATA,
639 .i_DeviceId = 0x3010,
640 .i_IorangeBase0 = 256,
641 .i_IorangeBase1 = 256,
642 .i_IorangeBase2 = 256,
643 .i_IorangeBase3 = 256,
644 .i_PCIEeprom = ADDIDATA_NO_EEPROM,
645 .pc_EepromChip = ADDIDATA_9054,
646 .i_NbrAiChannel = 16,
647 .i_NbrAiChannelDiff = 8,
648 .i_AiChannelList = 16,
649 .i_AiMaxdata = 4095,
650 .pr_AiRangelist = &range_apci3XXX_ai,
651 .i_NbrTTLChannel = 24,
652 .b_AvailableConvertUnit = 6,
653 .ui_MinAcquisitiontimeNs = 10000,
654 .interrupt = v_APCI3XXX_Interrupt,
655 .reset = i_APCI3XXX_Reset,
656 .ai_config = i_APCI3XXX_InsnConfigAnalogInput,
657 .ai_read = i_APCI3XXX_InsnReadAnalogInput,
658 .ttl_config = i_APCI3XXX_InsnConfigInitTTLIO,
659 .ttl_bits = i_APCI3XXX_InsnBitsTTLIO,
660 .ttl_read = i_APCI3XXX_InsnReadTTLIO,
661 .ttl_write = i_APCI3XXX_InsnWriteTTLIO,
662 }, {
663 .pc_DriverName = "apci3000-8",
664 .i_VendorId = PCI_VENDOR_ID_ADDIDATA,
665 .i_DeviceId = 0x300F,
666 .i_IorangeBase0 = 256,
667 .i_IorangeBase1 = 256,
668 .i_IorangeBase2 = 256,
669 .i_IorangeBase3 = 256,
670 .i_PCIEeprom = ADDIDATA_NO_EEPROM,
671 .pc_EepromChip = ADDIDATA_9054,
672 .i_NbrAiChannel = 8,
673 .i_NbrAiChannelDiff = 4,
674 .i_AiChannelList = 8,
675 .i_AiMaxdata = 4095,
676 .pr_AiRangelist = &range_apci3XXX_ai,
677 .i_NbrTTLChannel = 24,
678 .b_AvailableConvertUnit = 6,
679 .ui_MinAcquisitiontimeNs = 10000,
680 .interrupt = v_APCI3XXX_Interrupt,
681 .reset = i_APCI3XXX_Reset,
682 .ai_config = i_APCI3XXX_InsnConfigAnalogInput,
683 .ai_read = i_APCI3XXX_InsnReadAnalogInput,
684 .ttl_config = i_APCI3XXX_InsnConfigInitTTLIO,
685 .ttl_bits = i_APCI3XXX_InsnBitsTTLIO,
686 .ttl_read = i_APCI3XXX_InsnReadTTLIO,
687 .ttl_write = i_APCI3XXX_InsnWriteTTLIO,
688 }, {
689 .pc_DriverName = "apci3000-4",
690 .i_VendorId = PCI_VENDOR_ID_ADDIDATA,
691 .i_DeviceId = 0x300E,
692 .i_IorangeBase0 = 256,
693 .i_IorangeBase1 = 256,
694 .i_IorangeBase2 = 256,
695 .i_IorangeBase3 = 256,
696 .i_PCIEeprom = ADDIDATA_NO_EEPROM,
697 .pc_EepromChip = ADDIDATA_9054,
698 .i_NbrAiChannel = 4,
699 .i_NbrAiChannelDiff = 2,
700 .i_AiChannelList = 4,
701 .i_AiMaxdata = 4095,
702 .pr_AiRangelist = &range_apci3XXX_ai,
703 .i_NbrTTLChannel = 24,
704 .b_AvailableConvertUnit = 6,
705 .ui_MinAcquisitiontimeNs = 10000,
706 .interrupt = v_APCI3XXX_Interrupt,
707 .reset = i_APCI3XXX_Reset,
708 .ai_config = i_APCI3XXX_InsnConfigAnalogInput,
709 .ai_read = i_APCI3XXX_InsnReadAnalogInput,
710 .ttl_config = i_APCI3XXX_InsnConfigInitTTLIO,
711 .ttl_bits = i_APCI3XXX_InsnBitsTTLIO,
712 .ttl_read = i_APCI3XXX_InsnReadTTLIO,
713 .ttl_write = i_APCI3XXX_InsnWriteTTLIO,
714 }, {
715 .pc_DriverName = "apci3006-16",
716 .i_VendorId = PCI_VENDOR_ID_ADDIDATA,
717 .i_DeviceId = 0x3013,
718 .i_IorangeBase0 = 256,
719 .i_IorangeBase1 = 256,
720 .i_IorangeBase2 = 256,
721 .i_IorangeBase3 = 256,
722 .i_PCIEeprom = ADDIDATA_NO_EEPROM,
723 .pc_EepromChip = ADDIDATA_9054,
724 .i_NbrAiChannel = 16,
725 .i_NbrAiChannelDiff = 8,
726 .i_AiChannelList = 16,
727 .i_AiMaxdata = 65535,
728 .pr_AiRangelist = &range_apci3XXX_ai,
729 .i_NbrTTLChannel = 24,
730 .b_AvailableConvertUnit = 6,
731 .ui_MinAcquisitiontimeNs = 10000,
732 .interrupt = v_APCI3XXX_Interrupt,
733 .reset = i_APCI3XXX_Reset,
734 .ai_config = i_APCI3XXX_InsnConfigAnalogInput,
735 .ai_read = i_APCI3XXX_InsnReadAnalogInput,
736 .ttl_config = i_APCI3XXX_InsnConfigInitTTLIO,
737 .ttl_bits = i_APCI3XXX_InsnBitsTTLIO,
738 .ttl_read = i_APCI3XXX_InsnReadTTLIO,
739 .ttl_write = i_APCI3XXX_InsnWriteTTLIO,
740 }, {
741 .pc_DriverName = "apci3006-8",
742 .i_VendorId = PCI_VENDOR_ID_ADDIDATA,
743 .i_DeviceId = 0x3014,
744 .i_IorangeBase0 = 256,
745 .i_IorangeBase1 = 256,
746 .i_IorangeBase2 = 256,
747 .i_IorangeBase3 = 256,
748 .i_PCIEeprom = ADDIDATA_NO_EEPROM,
749 .pc_EepromChip = ADDIDATA_9054,
750 .i_NbrAiChannel = 8,
751 .i_NbrAiChannelDiff = 4,
752 .i_AiChannelList = 8,
753 .i_AiMaxdata = 65535,
754 .pr_AiRangelist = &range_apci3XXX_ai,
755 .i_NbrTTLChannel = 24,
756 .b_AvailableConvertUnit = 6,
757 .ui_MinAcquisitiontimeNs = 10000,
758 .interrupt = v_APCI3XXX_Interrupt,
759 .reset = i_APCI3XXX_Reset,
760 .ai_config = i_APCI3XXX_InsnConfigAnalogInput,
761 .ai_read = i_APCI3XXX_InsnReadAnalogInput,
762 .ttl_config = i_APCI3XXX_InsnConfigInitTTLIO,
763 .ttl_bits = i_APCI3XXX_InsnBitsTTLIO,
764 .ttl_read = i_APCI3XXX_InsnReadTTLIO,
765 .ttl_write = i_APCI3XXX_InsnWriteTTLIO,
766 }, {
767 .pc_DriverName = "apci3006-4",
768 .i_VendorId = PCI_VENDOR_ID_ADDIDATA,
769 .i_DeviceId = 0x3015,
770 .i_IorangeBase0 = 256,
771 .i_IorangeBase1 = 256,
772 .i_IorangeBase2 = 256,
773 .i_IorangeBase3 = 256,
774 .i_PCIEeprom = ADDIDATA_NO_EEPROM,
775 .pc_EepromChip = ADDIDATA_9054,
776 .i_NbrAiChannel = 4,
777 .i_NbrAiChannelDiff = 2,
778 .i_AiChannelList = 4,
779 .i_AiMaxdata = 65535,
780 .pr_AiRangelist = &range_apci3XXX_ai,
781 .i_NbrTTLChannel = 24,
782 .b_AvailableConvertUnit = 6,
783 .ui_MinAcquisitiontimeNs = 10000,
784 .interrupt = v_APCI3XXX_Interrupt,
785 .reset = i_APCI3XXX_Reset,
786 .ai_config = i_APCI3XXX_InsnConfigAnalogInput,
787 .ai_read = i_APCI3XXX_InsnReadAnalogInput,
788 .ttl_config = i_APCI3XXX_InsnConfigInitTTLIO,
789 .ttl_bits = i_APCI3XXX_InsnBitsTTLIO,
790 .ttl_read = i_APCI3XXX_InsnReadTTLIO,
791 .ttl_write = i_APCI3XXX_InsnWriteTTLIO,
792 }, {
793 .pc_DriverName = "apci3010-16",
794 .i_VendorId = PCI_VENDOR_ID_ADDIDATA,
795 .i_DeviceId = 0x3016,
796 .i_IorangeBase0 = 256,
797 .i_IorangeBase1 = 256,
798 .i_IorangeBase2 = 256,
799 .i_IorangeBase3 = 256,
800 .i_PCIEeprom = ADDIDATA_NO_EEPROM,
801 .pc_EepromChip = ADDIDATA_9054,
802 .i_NbrAiChannel = 16,
803 .i_NbrAiChannelDiff = 8,
804 .i_AiChannelList = 16,
805 .i_AiMaxdata = 4095,
806 .pr_AiRangelist = &range_apci3XXX_ai,
807 .i_NbrDiChannel = 4,
808 .i_NbrDoChannel = 4,
809 .i_DoMaxdata = 1,
810 .i_NbrTTLChannel = 24,
811 .b_AvailableConvertUnit = 6,
812 .ui_MinAcquisitiontimeNs = 5000,
813 .interrupt = v_APCI3XXX_Interrupt,
814 .reset = i_APCI3XXX_Reset,
815 .ai_config = i_APCI3XXX_InsnConfigAnalogInput,
816 .ai_read = i_APCI3XXX_InsnReadAnalogInput,
817 .di_read = i_APCI3XXX_InsnReadDigitalInput,
818 .di_bits = i_APCI3XXX_InsnBitsDigitalInput,
819 .do_write = i_APCI3XXX_InsnWriteDigitalOutput,
820 .do_bits = i_APCI3XXX_InsnBitsDigitalOutput,
821 .do_read = i_APCI3XXX_InsnReadDigitalOutput,
822 .ttl_config = i_APCI3XXX_InsnConfigInitTTLIO,
823 .ttl_bits = i_APCI3XXX_InsnBitsTTLIO,
824 .ttl_read = i_APCI3XXX_InsnReadTTLIO,
825 .ttl_write = i_APCI3XXX_InsnWriteTTLIO,
826 }, {
827 .pc_DriverName = "apci3010-8",
828 .i_VendorId = PCI_VENDOR_ID_ADDIDATA,
829 .i_DeviceId = 0x3017,
830 .i_IorangeBase0 = 256,
831 .i_IorangeBase1 = 256,
832 .i_IorangeBase2 = 256,
833 .i_IorangeBase3 = 256,
834 .i_PCIEeprom = ADDIDATA_NO_EEPROM,
835 .pc_EepromChip = ADDIDATA_9054,
836 .i_NbrAiChannel = 8,
837 .i_NbrAiChannelDiff = 4,
838 .i_AiChannelList = 8,
839 .i_AiMaxdata = 4095,
840 .pr_AiRangelist = &range_apci3XXX_ai,
841 .i_NbrDiChannel = 4,
842 .i_NbrDoChannel = 4,
843 .i_DoMaxdata = 1,
844 .i_NbrTTLChannel = 24,
845 .b_AvailableConvertUnit = 6,
846 .ui_MinAcquisitiontimeNs = 5000,
847 .interrupt = v_APCI3XXX_Interrupt,
848 .reset = i_APCI3XXX_Reset,
849 .ai_config = i_APCI3XXX_InsnConfigAnalogInput,
850 .ai_read = i_APCI3XXX_InsnReadAnalogInput,
851 .di_read = i_APCI3XXX_InsnReadDigitalInput,
852 .di_bits = i_APCI3XXX_InsnBitsDigitalInput,
853 .do_write = i_APCI3XXX_InsnWriteDigitalOutput,
854 .do_bits = i_APCI3XXX_InsnBitsDigitalOutput,
855 .do_read = i_APCI3XXX_InsnReadDigitalOutput,
856 .ttl_config = i_APCI3XXX_InsnConfigInitTTLIO,
857 .ttl_bits = i_APCI3XXX_InsnBitsTTLIO,
858 .ttl_read = i_APCI3XXX_InsnReadTTLIO,
859 .ttl_write = i_APCI3XXX_InsnWriteTTLIO,
860 }, {
861 .pc_DriverName = "apci3010-4",
862 .i_VendorId = PCI_VENDOR_ID_ADDIDATA,
863 .i_DeviceId = 0x3018,
864 .i_IorangeBase0 = 256,
865 .i_IorangeBase1 = 256,
866 .i_IorangeBase2 = 256,
867 .i_IorangeBase3 = 256,
868 .i_PCIEeprom = ADDIDATA_NO_EEPROM,
869 .pc_EepromChip = ADDIDATA_9054,
870 .i_NbrAiChannel = 4,
871 .i_NbrAiChannelDiff = 2,
872 .i_AiChannelList = 4,
873 .i_AiMaxdata = 4095,
874 .pr_AiRangelist = &range_apci3XXX_ai,
875 .i_NbrDiChannel = 4,
876 .i_NbrDoChannel = 4,
877 .i_DoMaxdata = 1,
878 .i_NbrTTLChannel = 24,
879 .b_AvailableConvertUnit = 6,
880 .ui_MinAcquisitiontimeNs = 5000,
881 .interrupt = v_APCI3XXX_Interrupt,
882 .reset = i_APCI3XXX_Reset,
883 .ai_config = i_APCI3XXX_InsnConfigAnalogInput,
884 .ai_read = i_APCI3XXX_InsnReadAnalogInput,
885 .di_read = i_APCI3XXX_InsnReadDigitalInput,
886 .di_bits = i_APCI3XXX_InsnBitsDigitalInput,
887 .do_write = i_APCI3XXX_InsnWriteDigitalOutput,
888 .do_bits = i_APCI3XXX_InsnBitsDigitalOutput,
889 .do_read = i_APCI3XXX_InsnReadDigitalOutput,
890 .ttl_config = i_APCI3XXX_InsnConfigInitTTLIO,
891 .ttl_bits = i_APCI3XXX_InsnBitsTTLIO,
892 .ttl_read = i_APCI3XXX_InsnReadTTLIO,
893 .ttl_write = i_APCI3XXX_InsnWriteTTLIO,
894 }, {
895 .pc_DriverName = "apci3016-16",
896 .i_VendorId = PCI_VENDOR_ID_ADDIDATA,
897 .i_DeviceId = 0x3019,
898 .i_IorangeBase0 = 256,
899 .i_IorangeBase1 = 256,
900 .i_IorangeBase2 = 256,
901 .i_IorangeBase3 = 256,
902 .i_PCIEeprom = ADDIDATA_NO_EEPROM,
903 .pc_EepromChip = ADDIDATA_9054,
904 .i_NbrAiChannel = 16,
905 .i_NbrAiChannelDiff = 8,
906 .i_AiChannelList = 16,
907 .i_AiMaxdata = 65535,
908 .pr_AiRangelist = &range_apci3XXX_ai,
909 .i_NbrDiChannel = 4,
910 .i_NbrDoChannel = 4,
911 .i_DoMaxdata = 1,
912 .i_NbrTTLChannel = 24,
913 .b_AvailableConvertUnit = 6,
914 .ui_MinAcquisitiontimeNs = 5000,
915 .interrupt = v_APCI3XXX_Interrupt,
916 .reset = i_APCI3XXX_Reset,
917 .ai_config = i_APCI3XXX_InsnConfigAnalogInput,
918 .ai_read = i_APCI3XXX_InsnReadAnalogInput,
919 .di_read = i_APCI3XXX_InsnReadDigitalInput,
920 .di_bits = i_APCI3XXX_InsnBitsDigitalInput,
921 .do_write = i_APCI3XXX_InsnWriteDigitalOutput,
922 .do_bits = i_APCI3XXX_InsnBitsDigitalOutput,
923 .do_read = i_APCI3XXX_InsnReadDigitalOutput,
924 .ttl_config = i_APCI3XXX_InsnConfigInitTTLIO,
925 .ttl_bits = i_APCI3XXX_InsnBitsTTLIO,
926 .ttl_read = i_APCI3XXX_InsnReadTTLIO,
927 .ttl_write = i_APCI3XXX_InsnWriteTTLIO,
928 }, {
929 .pc_DriverName = "apci3016-8",
930 .i_VendorId = PCI_VENDOR_ID_ADDIDATA,
931 .i_DeviceId = 0x301A,
932 .i_IorangeBase0 = 256,
933 .i_IorangeBase1 = 256,
934 .i_IorangeBase2 = 256,
935 .i_IorangeBase3 = 256,
936 .i_PCIEeprom = ADDIDATA_NO_EEPROM,
937 .pc_EepromChip = ADDIDATA_9054,
938 .i_NbrAiChannel = 8,
939 .i_NbrAiChannelDiff = 4,
940 .i_AiChannelList = 8,
941 .i_AiMaxdata = 65535,
942 .pr_AiRangelist = &range_apci3XXX_ai,
943 .i_NbrDiChannel = 4,
944 .i_NbrDoChannel = 4,
945 .i_DoMaxdata = 1,
946 .i_NbrTTLChannel = 24,
947 .b_AvailableConvertUnit = 6,
948 .ui_MinAcquisitiontimeNs = 5000,
949 .interrupt = v_APCI3XXX_Interrupt,
950 .reset = i_APCI3XXX_Reset,
951 .ai_config = i_APCI3XXX_InsnConfigAnalogInput,
952 .ai_read = i_APCI3XXX_InsnReadAnalogInput,
953 .di_read = i_APCI3XXX_InsnReadDigitalInput,
954 .di_bits = i_APCI3XXX_InsnBitsDigitalInput,
955 .do_write = i_APCI3XXX_InsnWriteDigitalOutput,
956 .do_bits = i_APCI3XXX_InsnBitsDigitalOutput,
957 .do_read = i_APCI3XXX_InsnReadDigitalOutput,
958 .ttl_config = i_APCI3XXX_InsnConfigInitTTLIO,
959 .ttl_bits = i_APCI3XXX_InsnBitsTTLIO,
960 .ttl_read = i_APCI3XXX_InsnReadTTLIO,
961 .ttl_write = i_APCI3XXX_InsnWriteTTLIO,
962 }, {
963 .pc_DriverName = "apci3016-4",
964 .i_VendorId = PCI_VENDOR_ID_ADDIDATA,
965 .i_DeviceId = 0x301B,
966 .i_IorangeBase0 = 256,
967 .i_IorangeBase1 = 256,
968 .i_IorangeBase2 = 256,
969 .i_IorangeBase3 = 256,
970 .i_PCIEeprom = ADDIDATA_NO_EEPROM,
971 .pc_EepromChip = ADDIDATA_9054,
972 .i_NbrAiChannel = 4,
973 .i_NbrAiChannelDiff = 2,
974 .i_AiChannelList = 4,
975 .i_AiMaxdata = 65535,
976 .pr_AiRangelist = &range_apci3XXX_ai,
977 .i_NbrDiChannel = 4,
978 .i_NbrDoChannel = 4,
979 .i_DoMaxdata = 1,
980 .i_NbrTTLChannel = 24,
981 .b_AvailableConvertUnit = 6,
982 .ui_MinAcquisitiontimeNs = 5000,
983 .interrupt = v_APCI3XXX_Interrupt,
984 .reset = i_APCI3XXX_Reset,
985 .ai_config = i_APCI3XXX_InsnConfigAnalogInput,
986 .ai_read = i_APCI3XXX_InsnReadAnalogInput,
987 .di_read = i_APCI3XXX_InsnReadDigitalInput,
988 .di_bits = i_APCI3XXX_InsnBitsDigitalInput,
989 .do_write = i_APCI3XXX_InsnWriteDigitalOutput,
990 .do_bits = i_APCI3XXX_InsnBitsDigitalOutput,
991 .do_read = i_APCI3XXX_InsnReadDigitalOutput,
992 .ttl_config = i_APCI3XXX_InsnConfigInitTTLIO,
993 .ttl_bits = i_APCI3XXX_InsnBitsTTLIO,
994 .ttl_read = i_APCI3XXX_InsnReadTTLIO,
995 .ttl_write = i_APCI3XXX_InsnWriteTTLIO,
996 }, {
997 .pc_DriverName = "apci3100-16-4",
998 .i_VendorId = PCI_VENDOR_ID_ADDIDATA,
999 .i_DeviceId = 0x301C,
1000 .i_IorangeBase0 = 256,
1001 .i_IorangeBase1 = 256,
1002 .i_IorangeBase2 = 256,
1003 .i_IorangeBase3 = 256,
1004 .i_PCIEeprom = ADDIDATA_NO_EEPROM,
1005 .pc_EepromChip = ADDIDATA_9054,
1006 .i_NbrAiChannel = 16,
1007 .i_NbrAiChannelDiff = 8,
1008 .i_AiChannelList = 16,
1009 .i_NbrAoChannel = 4,
1010 .i_AiMaxdata = 4095,
1011 .i_AoMaxdata = 4095,
1012 .pr_AiRangelist = &range_apci3XXX_ai,
1013 .pr_AoRangelist = &range_apci3XXX_ao,
1014 .i_NbrTTLChannel = 24,
1015 .b_AvailableConvertUnit = 6,
1016 .ui_MinAcquisitiontimeNs = 10000,
1017 .interrupt = v_APCI3XXX_Interrupt,
1018 .reset = i_APCI3XXX_Reset,
1019 .ai_config = i_APCI3XXX_InsnConfigAnalogInput,
1020 .ai_read = i_APCI3XXX_InsnReadAnalogInput,
1021 .ao_write = i_APCI3XXX_InsnWriteAnalogOutput,
1022 .ttl_config = i_APCI3XXX_InsnConfigInitTTLIO,
1023 .ttl_bits = i_APCI3XXX_InsnBitsTTLIO,
1024 .ttl_read = i_APCI3XXX_InsnReadTTLIO,
1025 .ttl_write = i_APCI3XXX_InsnWriteTTLIO,
1026 }, {
1027 .pc_DriverName = "apci3100-8-4",
1028 .i_VendorId = PCI_VENDOR_ID_ADDIDATA,
1029 .i_DeviceId = 0x301D,
1030 .i_IorangeBase0 = 256,
1031 .i_IorangeBase1 = 256,
1032 .i_IorangeBase2 = 256,
1033 .i_IorangeBase3 = 256,
1034 .i_PCIEeprom = ADDIDATA_NO_EEPROM,
1035 .pc_EepromChip = ADDIDATA_9054,
1036 .i_NbrAiChannel = 8,
1037 .i_NbrAiChannelDiff = 4,
1038 .i_AiChannelList = 8,
1039 .i_NbrAoChannel = 4,
1040 .i_AiMaxdata = 4095,
1041 .i_AoMaxdata = 4095,
1042 .pr_AiRangelist = &range_apci3XXX_ai,
1043 .pr_AoRangelist = &range_apci3XXX_ao,
1044 .i_NbrTTLChannel = 24,
1045 .b_AvailableConvertUnit = 6,
1046 .ui_MinAcquisitiontimeNs = 10000,
1047 .interrupt = v_APCI3XXX_Interrupt,
1048 .reset = i_APCI3XXX_Reset,
1049 .ai_config = i_APCI3XXX_InsnConfigAnalogInput,
1050 .ai_read = i_APCI3XXX_InsnReadAnalogInput,
1051 .ao_write = i_APCI3XXX_InsnWriteAnalogOutput,
1052 .ttl_config = i_APCI3XXX_InsnConfigInitTTLIO,
1053 .ttl_bits = i_APCI3XXX_InsnBitsTTLIO,
1054 .ttl_read = i_APCI3XXX_InsnReadTTLIO,
1055 .ttl_write = i_APCI3XXX_InsnWriteTTLIO,
1056 }, {
1057 .pc_DriverName = "apci3106-16-4",
1058 .i_VendorId = PCI_VENDOR_ID_ADDIDATA,
1059 .i_DeviceId = 0x301E,
1060 .i_IorangeBase0 = 256,
1061 .i_IorangeBase1 = 256,
1062 .i_IorangeBase2 = 256,
1063 .i_IorangeBase3 = 256,
1064 .i_PCIEeprom = ADDIDATA_NO_EEPROM,
1065 .pc_EepromChip = ADDIDATA_9054,
1066 .i_NbrAiChannel = 16,
1067 .i_NbrAiChannelDiff = 8,
1068 .i_AiChannelList = 16,
1069 .i_NbrAoChannel = 4,
1070 .i_AiMaxdata = 65535,
1071 .i_AoMaxdata = 4095,
1072 .pr_AiRangelist = &range_apci3XXX_ai,
1073 .pr_AoRangelist = &range_apci3XXX_ao,
1074 .i_NbrTTLChannel = 24,
1075 .b_AvailableConvertUnit = 6,
1076 .ui_MinAcquisitiontimeNs = 10000,
1077 .interrupt = v_APCI3XXX_Interrupt,
1078 .reset = i_APCI3XXX_Reset,
1079 .ai_config = i_APCI3XXX_InsnConfigAnalogInput,
1080 .ai_read = i_APCI3XXX_InsnReadAnalogInput,
1081 .ao_write = i_APCI3XXX_InsnWriteAnalogOutput,
1082 .ttl_config = i_APCI3XXX_InsnConfigInitTTLIO,
1083 .ttl_bits = i_APCI3XXX_InsnBitsTTLIO,
1084 .ttl_read = i_APCI3XXX_InsnReadTTLIO,
1085 .ttl_write = i_APCI3XXX_InsnWriteTTLIO,
1086 }, {
1087 .pc_DriverName = "apci3106-8-4",
1088 .i_VendorId = PCI_VENDOR_ID_ADDIDATA,
1089 .i_DeviceId = 0x301F,
1090 .i_IorangeBase0 = 256,
1091 .i_IorangeBase1 = 256,
1092 .i_IorangeBase2 = 256,
1093 .i_IorangeBase3 = 256,
1094 .i_PCIEeprom = ADDIDATA_NO_EEPROM,
1095 .pc_EepromChip = ADDIDATA_9054,
1096 .i_NbrAiChannel = 8,
1097 .i_NbrAiChannelDiff = 4,
1098 .i_AiChannelList = 8,
1099 .i_NbrAoChannel = 4,
1100 .i_AiMaxdata = 65535,
1101 .i_AoMaxdata = 4095,
1102 .pr_AiRangelist = &range_apci3XXX_ai,
1103 .pr_AoRangelist = &range_apci3XXX_ao,
1104 .i_NbrTTLChannel = 24,
1105 .b_AvailableConvertUnit = 6,
1106 .ui_MinAcquisitiontimeNs = 10000,
1107 .interrupt = v_APCI3XXX_Interrupt,
1108 .reset = i_APCI3XXX_Reset,
1109 .ai_config = i_APCI3XXX_InsnConfigAnalogInput,
1110 .ai_read = i_APCI3XXX_InsnReadAnalogInput,
1111 .ao_write = i_APCI3XXX_InsnWriteAnalogOutput,
1112 .ttl_config = i_APCI3XXX_InsnConfigInitTTLIO,
1113 .ttl_bits = i_APCI3XXX_InsnBitsTTLIO,
1114 .ttl_read = i_APCI3XXX_InsnReadTTLIO,
1115 .ttl_write = i_APCI3XXX_InsnWriteTTLIO,
1116 }, {
1117 .pc_DriverName = "apci3110-16-4",
1118 .i_VendorId = PCI_VENDOR_ID_ADDIDATA,
1119 .i_DeviceId = 0x3020,
1120 .i_IorangeBase0 = 256,
1121 .i_IorangeBase1 = 256,
1122 .i_IorangeBase2 = 256,
1123 .i_IorangeBase3 = 256,
1124 .i_PCIEeprom = ADDIDATA_NO_EEPROM,
1125 .pc_EepromChip = ADDIDATA_9054,
1126 .i_NbrAiChannel = 16,
1127 .i_NbrAiChannelDiff = 8,
1128 .i_AiChannelList = 16,
1129 .i_NbrAoChannel = 4,
1130 .i_AiMaxdata = 4095,
1131 .i_AoMaxdata = 4095,
1132 .pr_AiRangelist = &range_apci3XXX_ai,
1133 .pr_AoRangelist = &range_apci3XXX_ao,
1134 .i_NbrDiChannel = 4,
1135 .i_NbrDoChannel = 4,
1136 .i_DoMaxdata = 1,
1137 .i_NbrTTLChannel = 24,
1138 .b_AvailableConvertUnit = 6,
1139 .ui_MinAcquisitiontimeNs = 5000,
1140 .interrupt = v_APCI3XXX_Interrupt,
1141 .reset = i_APCI3XXX_Reset,
1142 .ai_config = i_APCI3XXX_InsnConfigAnalogInput,
1143 .ai_read = i_APCI3XXX_InsnReadAnalogInput,
1144 .ao_write = i_APCI3XXX_InsnWriteAnalogOutput,
1145 .di_read = i_APCI3XXX_InsnReadDigitalInput,
1146 .di_bits = i_APCI3XXX_InsnBitsDigitalInput,
1147 .do_write = i_APCI3XXX_InsnWriteDigitalOutput,
1148 .do_bits = i_APCI3XXX_InsnBitsDigitalOutput,
1149 .do_read = i_APCI3XXX_InsnReadDigitalOutput,
1150 .ttl_config = i_APCI3XXX_InsnConfigInitTTLIO,
1151 .ttl_bits = i_APCI3XXX_InsnBitsTTLIO,
1152 .ttl_read = i_APCI3XXX_InsnReadTTLIO,
1153 .ttl_write = i_APCI3XXX_InsnWriteTTLIO,
1154 }, {
1155 .pc_DriverName = "apci3110-8-4",
1156 .i_VendorId = PCI_VENDOR_ID_ADDIDATA,
1157 .i_DeviceId = 0x3021,
1158 .i_IorangeBase0 = 256,
1159 .i_IorangeBase1 = 256,
1160 .i_IorangeBase2 = 256,
1161 .i_IorangeBase3 = 256,
1162 .i_PCIEeprom = ADDIDATA_NO_EEPROM,
1163 .pc_EepromChip = ADDIDATA_9054,
1164 .i_NbrAiChannel = 8,
1165 .i_NbrAiChannelDiff = 4,
1166 .i_AiChannelList = 8,
1167 .i_NbrAoChannel = 4,
1168 .i_AiMaxdata = 4095,
1169 .i_AoMaxdata = 4095,
1170 .pr_AiRangelist = &range_apci3XXX_ai,
1171 .pr_AoRangelist = &range_apci3XXX_ao,
1172 .i_NbrDiChannel = 4,
1173 .i_NbrDoChannel = 4,
1174 .i_DoMaxdata = 1,
1175 .i_NbrTTLChannel = 24,
1176 .b_AvailableConvertUnit = 6,
1177 .ui_MinAcquisitiontimeNs = 5000,
1178 .interrupt = v_APCI3XXX_Interrupt,
1179 .reset = i_APCI3XXX_Reset,
1180 .ai_config = i_APCI3XXX_InsnConfigAnalogInput,
1181 .ai_read = i_APCI3XXX_InsnReadAnalogInput,
1182 .ao_write = i_APCI3XXX_InsnWriteAnalogOutput,
1183 .di_read = i_APCI3XXX_InsnReadDigitalInput,
1184 .di_bits = i_APCI3XXX_InsnBitsDigitalInput,
1185 .do_write = i_APCI3XXX_InsnWriteDigitalOutput,
1186 .do_bits = i_APCI3XXX_InsnBitsDigitalOutput,
1187 .do_read = i_APCI3XXX_InsnReadDigitalOutput,
1188 .ttl_config = i_APCI3XXX_InsnConfigInitTTLIO,
1189 .ttl_bits = i_APCI3XXX_InsnBitsTTLIO,
1190 .ttl_read = i_APCI3XXX_InsnReadTTLIO,
1191 .ttl_write = i_APCI3XXX_InsnWriteTTLIO,
1192 }, {
1193 .pc_DriverName = "apci3116-16-4",
1194 .i_VendorId = PCI_VENDOR_ID_ADDIDATA,
1195 .i_DeviceId = 0x3022,
1196 .i_IorangeBase0 = 256,
1197 .i_IorangeBase1 = 256,
1198 .i_IorangeBase2 = 256,
1199 .i_IorangeBase3 = 256,
1200 .i_PCIEeprom = ADDIDATA_NO_EEPROM,
1201 .pc_EepromChip = ADDIDATA_9054,
1202 .i_NbrAiChannel = 16,
1203 .i_NbrAiChannelDiff = 8,
1204 .i_AiChannelList = 16,
1205 .i_NbrAoChannel = 4,
1206 .i_AiMaxdata = 65535,
1207 .i_AoMaxdata = 4095,
1208 .pr_AiRangelist = &range_apci3XXX_ai,
1209 .pr_AoRangelist = &range_apci3XXX_ao,
1210 .i_NbrDiChannel = 4,
1211 .i_NbrDoChannel = 4,
1212 .i_DoMaxdata = 1,
1213 .i_NbrTTLChannel = 24,
1214 .b_AvailableConvertUnit = 6,
1215 .ui_MinAcquisitiontimeNs = 5000,
1216 .interrupt = v_APCI3XXX_Interrupt,
1217 .reset = i_APCI3XXX_Reset,
1218 .ai_config = i_APCI3XXX_InsnConfigAnalogInput,
1219 .ai_read = i_APCI3XXX_InsnReadAnalogInput,
1220 .ao_write = i_APCI3XXX_InsnWriteAnalogOutput,
1221 .di_read = i_APCI3XXX_InsnReadDigitalInput,
1222 .di_bits = i_APCI3XXX_InsnBitsDigitalInput,
1223 .do_write = i_APCI3XXX_InsnWriteDigitalOutput,
1224 .do_bits = i_APCI3XXX_InsnBitsDigitalOutput,
1225 .do_read = i_APCI3XXX_InsnReadDigitalOutput,
1226 .ttl_config = i_APCI3XXX_InsnConfigInitTTLIO,
1227 .ttl_bits = i_APCI3XXX_InsnBitsTTLIO,
1228 .ttl_read = i_APCI3XXX_InsnReadTTLIO,
1229 .ttl_write = i_APCI3XXX_InsnWriteTTLIO,
1230 }, {
1231 .pc_DriverName = "apci3116-8-4",
1232 .i_VendorId = PCI_VENDOR_ID_ADDIDATA,
1233 .i_DeviceId = 0x3023,
1234 .i_IorangeBase0 = 256,
1235 .i_IorangeBase1 = 256,
1236 .i_IorangeBase2 = 256,
1237 .i_IorangeBase3 = 256,
1238 .i_PCIEeprom = ADDIDATA_NO_EEPROM,
1239 .pc_EepromChip = ADDIDATA_9054,
1240 .i_NbrAiChannel = 8,
1241 .i_NbrAiChannelDiff = 4,
1242 .i_AiChannelList = 8,
1243 .i_NbrAoChannel = 4,
1244 .i_AiMaxdata = 65535,
1245 .i_AoMaxdata = 4095,
1246 .pr_AiRangelist = &range_apci3XXX_ai,
1247 .pr_AoRangelist = &range_apci3XXX_ao,
1248 .i_NbrDiChannel = 4,
1249 .i_NbrDoChannel = 4,
1250 .i_DoMaxdata = 1,
1251 .i_NbrTTLChannel = 24,
1252 .b_AvailableConvertUnit = 6,
1253 .ui_MinAcquisitiontimeNs = 5000,
1254 .interrupt = v_APCI3XXX_Interrupt,
1255 .reset = i_APCI3XXX_Reset,
1256 .ai_config = i_APCI3XXX_InsnConfigAnalogInput,
1257 .ai_read = i_APCI3XXX_InsnReadAnalogInput,
1258 .ao_write = i_APCI3XXX_InsnWriteAnalogOutput,
1259 .di_read = i_APCI3XXX_InsnReadDigitalInput,
1260 .di_bits = i_APCI3XXX_InsnBitsDigitalInput,
1261 .do_write = i_APCI3XXX_InsnWriteDigitalOutput,
1262 .do_bits = i_APCI3XXX_InsnBitsDigitalOutput,
1263 .do_read = i_APCI3XXX_InsnReadDigitalOutput,
1264 .ttl_config = i_APCI3XXX_InsnConfigInitTTLIO,
1265 .ttl_bits = i_APCI3XXX_InsnBitsTTLIO,
1266 .ttl_read = i_APCI3XXX_InsnReadTTLIO,
1267 .ttl_write = i_APCI3XXX_InsnWriteTTLIO,
1268 }, {
1269 .pc_DriverName = "apci3003",
1270 .i_VendorId = PCI_VENDOR_ID_ADDIDATA,
1271 .i_DeviceId = 0x300B,
1272 .i_IorangeBase0 = 256,
1273 .i_IorangeBase1 = 256,
1274 .i_IorangeBase2 = 256,
1275 .i_IorangeBase3 = 256,
1276 .i_PCIEeprom = ADDIDATA_NO_EEPROM,
1277 .pc_EepromChip = ADDIDATA_9054,
1278 .i_NbrAiChannelDiff = 4,
1279 .i_AiChannelList = 4,
1280 .i_AiMaxdata = 65535,
1281 .pr_AiRangelist = &range_apci3XXX_ai,
1282 .i_NbrDiChannel = 4,
1283 .i_NbrDoChannel = 4,
1284 .i_DoMaxdata = 1,
1285 .b_AvailableConvertUnit = 7,
1286 .ui_MinAcquisitiontimeNs = 2500,
1287 .interrupt = v_APCI3XXX_Interrupt,
1288 .reset = i_APCI3XXX_Reset,
1289 .ai_config = i_APCI3XXX_InsnConfigAnalogInput,
1290 .ai_read = i_APCI3XXX_InsnReadAnalogInput,
1291 .di_read = i_APCI3XXX_InsnReadDigitalInput,
1292 .di_bits = i_APCI3XXX_InsnBitsDigitalInput,
1293 .do_write = i_APCI3XXX_InsnWriteDigitalOutput,
1294 .do_bits = i_APCI3XXX_InsnBitsDigitalOutput,
1295 .do_read = i_APCI3XXX_InsnReadDigitalOutput,
1296 }, {
1297 .pc_DriverName = "apci3002-16",
1298 .i_VendorId = PCI_VENDOR_ID_ADDIDATA,
1299 .i_DeviceId = 0x3002,
1300 .i_IorangeBase0 = 256,
1301 .i_IorangeBase1 = 256,
1302 .i_IorangeBase2 = 256,
1303 .i_IorangeBase3 = 256,
1304 .i_PCIEeprom = ADDIDATA_NO_EEPROM,
1305 .pc_EepromChip = ADDIDATA_9054,
1306 .i_NbrAiChannelDiff = 16,
1307 .i_AiChannelList = 16,
1308 .i_AiMaxdata = 65535,
1309 .pr_AiRangelist = &range_apci3XXX_ai,
1310 .i_NbrDiChannel = 4,
1311 .i_NbrDoChannel = 4,
1312 .i_DoMaxdata = 1,
1313 .b_AvailableConvertUnit = 6,
1314 .ui_MinAcquisitiontimeNs = 5000,
1315 .interrupt = v_APCI3XXX_Interrupt,
1316 .reset = i_APCI3XXX_Reset,
1317 .ai_config = i_APCI3XXX_InsnConfigAnalogInput,
1318 .ai_read = i_APCI3XXX_InsnReadAnalogInput,
1319 .di_read = i_APCI3XXX_InsnReadDigitalInput,
1320 .di_bits = i_APCI3XXX_InsnBitsDigitalInput,
1321 .do_write = i_APCI3XXX_InsnWriteDigitalOutput,
1322 .do_bits = i_APCI3XXX_InsnBitsDigitalOutput,
1323 .do_read = i_APCI3XXX_InsnReadDigitalOutput,
1324 }, {
1325 .pc_DriverName = "apci3002-8",
1326 .i_VendorId = PCI_VENDOR_ID_ADDIDATA,
1327 .i_DeviceId = 0x3003,
1328 .i_IorangeBase0 = 256,
1329 .i_IorangeBase1 = 256,
1330 .i_IorangeBase2 = 256,
1331 .i_IorangeBase3 = 256,
1332 .i_PCIEeprom = ADDIDATA_NO_EEPROM,
1333 .pc_EepromChip = ADDIDATA_9054,
1334 .i_NbrAiChannelDiff = 8,
1335 .i_AiChannelList = 8,
1336 .i_AiMaxdata = 65535,
1337 .pr_AiRangelist = &range_apci3XXX_ai,
1338 .i_NbrDiChannel = 4,
1339 .i_NbrDoChannel = 4,
1340 .i_DoMaxdata = 1,
1341 .b_AvailableConvertUnit = 6,
1342 .ui_MinAcquisitiontimeNs = 5000,
1343 .interrupt = v_APCI3XXX_Interrupt,
1344 .reset = i_APCI3XXX_Reset,
1345 .ai_config = i_APCI3XXX_InsnConfigAnalogInput,
1346 .ai_read = i_APCI3XXX_InsnReadAnalogInput,
1347 .di_read = i_APCI3XXX_InsnReadDigitalInput,
1348 .di_bits = i_APCI3XXX_InsnBitsDigitalInput,
1349 .do_write = i_APCI3XXX_InsnWriteDigitalOutput,
1350 .do_bits = i_APCI3XXX_InsnBitsDigitalOutput,
1351 .do_read = i_APCI3XXX_InsnReadDigitalOutput,
1352 }, {
1353 .pc_DriverName = "apci3002-4",
1354 .i_VendorId = PCI_VENDOR_ID_ADDIDATA,
1355 .i_DeviceId = 0x3004,
1356 .i_IorangeBase0 = 256,
1357 .i_IorangeBase1 = 256,
1358 .i_IorangeBase2 = 256,
1359 .i_IorangeBase3 = 256,
1360 .i_PCIEeprom = ADDIDATA_NO_EEPROM,
1361 .pc_EepromChip = ADDIDATA_9054,
1362 .i_NbrAiChannelDiff = 4,
1363 .i_AiChannelList = 4,
1364 .i_AiMaxdata = 65535,
1365 .pr_AiRangelist = &range_apci3XXX_ai,
1366 .i_NbrDiChannel = 4,
1367 .i_NbrDoChannel = 4,
1368 .i_DoMaxdata = 1,
1369 .b_AvailableConvertUnit = 6,
1370 .ui_MinAcquisitiontimeNs = 5000,
1371 .interrupt = v_APCI3XXX_Interrupt,
1372 .reset = i_APCI3XXX_Reset,
1373 .ai_config = i_APCI3XXX_InsnConfigAnalogInput,
1374 .ai_read = i_APCI3XXX_InsnReadAnalogInput,
1375 .di_read = i_APCI3XXX_InsnReadDigitalInput,
1376 .di_bits = i_APCI3XXX_InsnBitsDigitalInput,
1377 .do_write = i_APCI3XXX_InsnWriteDigitalOutput,
1378 .do_bits = i_APCI3XXX_InsnBitsDigitalOutput,
1379 .do_read = i_APCI3XXX_InsnReadDigitalOutput,
1380 }, {
1381 .pc_DriverName = "apci3500",
1382 .i_VendorId = PCI_VENDOR_ID_ADDIDATA,
1383 .i_DeviceId = 0x3024,
1384 .i_IorangeBase0 = 256,
1385 .i_IorangeBase1 = 256,
1386 .i_IorangeBase2 = 256,
1387 .i_IorangeBase3 = 256,
1388 .i_PCIEeprom = ADDIDATA_NO_EEPROM,
1389 .pc_EepromChip = ADDIDATA_9054,
1390 .i_NbrAoChannel = 4,
1391 .i_AoMaxdata = 4095,
1392 .pr_AoRangelist = &range_apci3XXX_ao,
1393 .i_NbrTTLChannel = 24,
1394 .interrupt = v_APCI3XXX_Interrupt,
1395 .reset = i_APCI3XXX_Reset,
1396 .ao_write = i_APCI3XXX_InsnWriteAnalogOutput,
1397 .ttl_config = i_APCI3XXX_InsnConfigInitTTLIO,
1398 .ttl_bits = i_APCI3XXX_InsnBitsTTLIO,
1399 .ttl_read = i_APCI3XXX_InsnReadTTLIO,
1400 .ttl_write = i_APCI3XXX_InsnWriteTTLIO,
1401 },
1402#endif
1403};
1404 54
1405static struct comedi_driver driver_addi = { 55 w_Data = addi_eeprom_readw(devpriv->i_IobaseAmcc,
1406 .driver_name = ADDIDATA_DRIVER_NAME, 56 this_board->pc_EepromChip, 2 * w_Address);
1407 .module = THIS_MODULE, 57 data[0] = w_Data;
1408 .attach = i_ADDI_Attach,
1409 .detach = i_ADDI_Detach,
1410 .num_names = ARRAY_SIZE(boardtypes),
1411 .board_name = &boardtypes[0].pc_DriverName,
1412 .offset = sizeof(struct addi_board),
1413};
1414 58
1415static int __devinit driver_addi_pci_probe(struct pci_dev *dev, 59 return insn->n;
1416 const struct pci_device_id *ent)
1417{
1418 return comedi_pci_auto_config(dev, &driver_addi);
1419} 60}
1420 61
1421static void __devexit driver_addi_pci_remove(struct pci_dev *dev) 62static irqreturn_t v_ADDI_Interrupt(int irq, void *d)
1422{ 63{
1423 comedi_pci_auto_unconfig(dev); 64 struct comedi_device *dev = d;
1424} 65 const struct addi_board *this_board = comedi_board(dev);
1425 66
1426static struct pci_driver driver_addi_pci_driver = { 67 this_board->interrupt(irq, d);
1427 .id_table = addi_apci_tbl, 68 return IRQ_RETVAL(1);
1428 .probe = &driver_addi_pci_probe, 69}
1429 .remove = __devexit_p(&driver_addi_pci_remove)
1430};
1431 70
1432static int __init driver_addi_init_module(void) 71static int i_ADDI_Reset(struct comedi_device *dev)
1433{ 72{
1434 int retval; 73 const struct addi_board *this_board = comedi_board(dev);
1435
1436 retval = comedi_driver_register(&driver_addi);
1437 if (retval < 0)
1438 return retval;
1439 74
1440 driver_addi_pci_driver.name = (char *)driver_addi.driver_name; 75 this_board->reset(dev);
1441 return pci_register_driver(&driver_addi_pci_driver); 76 return 0;
1442} 77}
1443 78
1444static void __exit driver_addi_cleanup_module(void) 79static const void *addi_find_boardinfo(struct comedi_device *dev,
80 struct pci_dev *pcidev)
1445{ 81{
1446 pci_unregister_driver(&driver_addi_pci_driver); 82 const void *p = dev->driver->board_name;
1447 comedi_driver_unregister(&driver_addi); 83 const struct addi_board *this_board;
84 int i;
85
86 for (i = 0; i < dev->driver->num_names; i++) {
87 this_board = p;
88 if (this_board->i_VendorId == pcidev->vendor &&
89 this_board->i_DeviceId == pcidev->device)
90 return this_board;
91 p += dev->driver->offset;
92 }
93 return NULL;
1448} 94}
1449 95
1450module_init(driver_addi_init_module); 96static int addi_auto_attach(struct comedi_device *dev,
1451module_exit(driver_addi_cleanup_module); 97 unsigned long context_unused)
1452
1453/*
1454+----------------------------------------------------------------------------+
1455| Function name :static int i_ADDI_Attach(struct comedi_device *dev, |
1456| struct comedi_devconfig *it) |
1457| |
1458+----------------------------------------------------------------------------+
1459| Task :Detects the card. |
1460| Configure the driver for a particular board. |
1461| This function does all the initializations and memory |
1462| allocation of data structures for the driver. |
1463+----------------------------------------------------------------------------+
1464| Input Parameters :struct comedi_device *dev |
1465| struct comedi_devconfig *it |
1466| |
1467+----------------------------------------------------------------------------+
1468| Return Value : 0 |
1469| |
1470+----------------------------------------------------------------------------+
1471*/
1472
1473static int i_ADDI_Attach(struct comedi_device *dev, struct comedi_devconfig *it)
1474{ 98{
99 struct pci_dev *pcidev = comedi_to_pci_dev(dev);
100 const struct addi_board *this_board;
101 struct addi_private *devpriv;
1475 struct comedi_subdevice *s; 102 struct comedi_subdevice *s;
1476 int ret, pages, i, n_subdevices; 103 int ret, n_subdevices;
1477 unsigned int dw_Dummy; 104 unsigned int dw_Dummy;
1478 resource_size_t io_addr[5];
1479 unsigned int irq;
1480 resource_size_t iobase_a, iobase_main, iobase_addon, iobase_reserved;
1481 struct pcilst_struct *card = NULL;
1482 unsigned char pci_bus, pci_slot, pci_func;
1483 int i_Dma = 0;
1484
1485 ret = alloc_private(dev, sizeof(struct addi_private));
1486 if (ret < 0)
1487 return -ENOMEM;
1488
1489 if (!pci_list_builded) {
1490 v_pci_card_list_init(this_board->i_VendorId, 1); /* 1 for displaying the list.. */
1491 pci_list_builded = 1;
1492 }
1493 /* printk("comedi%d: "ADDIDATA_DRIVER_NAME": board=%s",dev->minor,this_board->pc_DriverName); */
1494
1495 if ((this_board->i_Dma) && (it->options[2] == 0)) {
1496 i_Dma = 1;
1497 }
1498
1499 card = ptr_select_and_alloc_pci_card(this_board->i_VendorId,
1500 this_board->i_DeviceId,
1501 it->options[0],
1502 it->options[1], i_Dma);
1503
1504 if (card == NULL)
1505 return -EIO;
1506
1507 devpriv->allocated = 1;
1508
1509 if ((i_pci_card_data(card, &pci_bus, &pci_slot, &pci_func, &io_addr[0],
1510 &irq)) < 0) {
1511 i_pci_card_free(card);
1512 printk(" - Can't get AMCC data!\n");
1513 return -EIO;
1514 }
1515
1516 iobase_a = io_addr[0];
1517 iobase_main = io_addr[1];
1518 iobase_addon = io_addr[2];
1519 iobase_reserved = io_addr[3];
1520 printk("\nBus %d: Slot %d: Funct%d\nBase0: 0x%8llx\nBase1: 0x%8llx\nBase2: 0x%8llx\nBase3: 0x%8llx\n", pci_bus, pci_slot, pci_func, (unsigned long long)io_addr[0], (unsigned long long)io_addr[1], (unsigned long long)io_addr[2], (unsigned long long)io_addr[3]);
1521 105
1522 if ((this_board->pc_EepromChip == NULL) 106 this_board = addi_find_boardinfo(dev, pcidev);
1523 || (strcmp(this_board->pc_EepromChip, ADDIDATA_9054) != 0)) { 107 if (!this_board)
1524 /************************************/ 108 return -ENODEV;
1525 /* Test if more that 1 address used */ 109 dev->board_ptr = this_board;
1526 /************************************/ 110 dev->board_name = this_board->pc_DriverName;
1527 111
1528 if (this_board->i_IorangeBase1 != 0) { 112 devpriv = kzalloc(sizeof(*devpriv), GFP_KERNEL);
1529 dev->iobase = (unsigned long)iobase_main; /* DAQ base address... */ 113 if (!devpriv)
1530 } else { 114 return -ENOMEM;
1531 dev->iobase = (unsigned long)iobase_a; /* DAQ base address... */ 115 dev->private = devpriv;
1532 } 116
1533 117 ret = comedi_pci_enable(pcidev, dev->board_name);
1534 dev->board_name = this_board->pc_DriverName; 118 if (ret)
1535 devpriv->amcc = card; 119 return ret;
1536 devpriv->iobase = (int) dev->iobase; 120
1537 devpriv->i_IobaseAmcc = (int) iobase_a; /* AMCC base address... */ 121 if (!this_board->pc_EepromChip ||
1538 devpriv->i_IobaseAddon = (int) iobase_addon; /* ADD ON base address.... */ 122 strcmp(this_board->pc_EepromChip, ADDIDATA_9054)) {
1539 devpriv->i_IobaseReserved = (int) iobase_reserved; 123 /* board does not have an eeprom or is not ADDIDATA_9054 */
124 if (this_board->i_IorangeBase1)
125 dev->iobase = pci_resource_start(pcidev, 1);
126 else
127 dev->iobase = pci_resource_start(pcidev, 0);
128
129 devpriv->iobase = dev->iobase;
130 devpriv->i_IobaseAmcc = pci_resource_start(pcidev, 0);
131 devpriv->i_IobaseAddon = pci_resource_start(pcidev, 2);
1540 } else { 132 } else {
1541 dev->board_name = this_board->pc_DriverName; 133 /* board has an ADDIDATA_9054 eeprom */
1542 dev->iobase = (unsigned long)io_addr[2]; 134 dev->iobase = pci_resource_start(pcidev, 2);
1543 devpriv->amcc = card; 135 devpriv->iobase = pci_resource_start(pcidev, 2);
1544 devpriv->iobase = (int) io_addr[2]; 136 devpriv->dw_AiBase = ioremap(pci_resource_start(pcidev, 3),
1545 devpriv->i_IobaseReserved = (int) io_addr[3];
1546 printk("\nioremap begin");
1547 devpriv->dw_AiBase = ioremap(io_addr[3],
1548 this_board->i_IorangeBase3); 137 this_board->i_IorangeBase3);
1549 printk("\nioremap end");
1550 } 138 }
139 devpriv->i_IobaseReserved = pci_resource_start(pcidev, 3);
1551 140
1552 /* Initialize parameters that can be overridden in EEPROM */ 141 /* Initialize parameters that can be overridden in EEPROM */
1553 devpriv->s_EeParameters.i_NbrAiChannel = this_board->i_NbrAiChannel; 142 devpriv->s_EeParameters.i_NbrAiChannel = this_board->i_NbrAiChannel;
@@ -1566,30 +155,19 @@ static int i_ADDI_Attach(struct comedi_device *dev, struct comedi_devconfig *it)
1566 155
1567 /* ## */ 156 /* ## */
1568 157
1569 if (irq > 0) { 158 if (pcidev->irq > 0) {
1570 if (request_irq(irq, v_ADDI_Interrupt, IRQF_SHARED, 159 ret = request_irq(pcidev->irq, v_ADDI_Interrupt, IRQF_SHARED,
1571 this_board->pc_DriverName, dev) < 0) { 160 dev->board_name, dev);
1572 printk(", unable to allocate IRQ %u, DISABLING IT", 161 if (ret == 0)
1573 irq); 162 dev->irq = pcidev->irq;
1574 irq = 0; /* Can't use IRQ */
1575 } else {
1576 printk("\nirq=%u", irq);
1577 }
1578 } else {
1579 printk(", IRQ disabled");
1580 } 163 }
1581 164
1582 printk("\nOption %d %d %d\n", it->options[0], it->options[1],
1583 it->options[2]);
1584 dev->irq = irq;
1585
1586 /* Read eepeom and fill addi_board Structure */ 165 /* Read eepeom and fill addi_board Structure */
1587 166
1588 if (this_board->i_PCIEeprom) { 167 if (this_board->i_PCIEeprom) {
1589 printk("\nPCI Eeprom used");
1590 if (!(strcmp(this_board->pc_EepromChip, "S5920"))) { 168 if (!(strcmp(this_board->pc_EepromChip, "S5920"))) {
1591 /* Set 3 wait stait */ 169 /* Set 3 wait stait */
1592 if (!(strcmp(this_board->pc_DriverName, "apci035"))) { 170 if (!(strcmp(dev->board_name, "apci035"))) {
1593 outl(0x80808082, devpriv->i_IobaseAmcc + 0x60); 171 outl(0x80808082, devpriv->i_IobaseAmcc + 0x60);
1594 } else { 172 } else {
1595 outl(0x83838383, devpriv->i_IobaseAmcc + 0x60); 173 outl(0x83838383, devpriv->i_IobaseAmcc + 0x60);
@@ -1597,340 +175,174 @@ static int i_ADDI_Attach(struct comedi_device *dev, struct comedi_devconfig *it)
1597 /* Enable the interrupt for the controller */ 175 /* Enable the interrupt for the controller */
1598 dw_Dummy = inl(devpriv->i_IobaseAmcc + 0x38); 176 dw_Dummy = inl(devpriv->i_IobaseAmcc + 0x38);
1599 outl(dw_Dummy | 0x2000, devpriv->i_IobaseAmcc + 0x38); 177 outl(dw_Dummy | 0x2000, devpriv->i_IobaseAmcc + 0x38);
1600 printk("\nEnable the interrupt for the controller");
1601 } 178 }
1602 printk("\nRead Eeprom"); 179 addi_eeprom_read_info(dev, pci_resource_start(pcidev, 0));
1603 i_EepromReadMainHeader(io_addr[0], this_board->pc_EepromChip,
1604 dev);
1605 } else {
1606 printk("\nPCI Eeprom unused");
1607 }
1608
1609 if (it->options[2] > 0) {
1610 devpriv->us_UseDma = ADDI_DISABLE;
1611 } else {
1612 devpriv->us_UseDma = ADDI_ENABLE;
1613 } 180 }
1614 181
1615 if (devpriv->s_EeParameters.i_Dma) { 182 n_subdevices = 7;
1616 printk("\nDMA used"); 183 ret = comedi_alloc_subdevices(dev, n_subdevices);
1617 if (devpriv->us_UseDma == ADDI_ENABLE) { 184 if (ret)
1618 /* alloc DMA buffers */ 185 return ret;
1619 devpriv->b_DmaDoubleBuffer = 0; 186
1620 for (i = 0; i < 2; i++) { 187 /* Allocate and Initialise AI Subdevice Structures */
1621 for (pages = 4; pages >= 0; pages--) { 188 s = &dev->subdevices[0];
1622 devpriv->ul_DmaBufferVirtual[i] = 189 if ((devpriv->s_EeParameters.i_NbrAiChannel)
1623 (void *) __get_free_pages(GFP_KERNEL, pages); 190 || (this_board->i_NbrAiChannelDiff)) {
1624 191 dev->read_subdev = s;
1625 if (devpriv->ul_DmaBufferVirtual[i]) 192 s->type = COMEDI_SUBD_AI;
1626 break; 193 s->subdev_flags =
1627 } 194 SDF_READABLE | SDF_COMMON | SDF_GROUND
1628 if (devpriv->ul_DmaBufferVirtual[i]) { 195 | SDF_DIFF;
1629 devpriv->ui_DmaBufferPages[i] = pages; 196 if (devpriv->s_EeParameters.i_NbrAiChannel) {
1630 devpriv->ui_DmaBufferSize[i] = 197 s->n_chan =
1631 PAGE_SIZE * pages; 198 devpriv->s_EeParameters.i_NbrAiChannel;
1632 devpriv->ui_DmaBufferSamples[i] = 199 devpriv->b_SingelDiff = 0;
1633 devpriv->
1634 ui_DmaBufferSize[i] >> 1;
1635 devpriv->ul_DmaBufferHw[i] =
1636 virt_to_bus((void *)devpriv->
1637 ul_DmaBufferVirtual[i]);
1638 }
1639 }
1640 if (!devpriv->ul_DmaBufferVirtual[0]) {
1641 printk
1642 (", Can't allocate DMA buffer, DMA disabled!");
1643 devpriv->us_UseDma = ADDI_DISABLE;
1644 }
1645
1646 if (devpriv->ul_DmaBufferVirtual[1]) {
1647 devpriv->b_DmaDoubleBuffer = 1;
1648 }
1649 }
1650
1651 if ((devpriv->us_UseDma == ADDI_ENABLE)) {
1652 printk("\nDMA ENABLED\n");
1653 } else { 200 } else {
1654 printk("\nDMA DISABLED\n"); 201 s->n_chan = this_board->i_NbrAiChannelDiff;
202 devpriv->b_SingelDiff = 1;
1655 } 203 }
1656 } 204 s->maxdata = devpriv->s_EeParameters.i_AiMaxdata;
1657 205 s->len_chanlist = this_board->i_AiChannelList;
1658 if (!strcmp(this_board->pc_DriverName, "apci1710")) { 206 s->range_table = this_board->pr_AiRangelist;
1659#ifdef CONFIG_APCI_1710
1660 i_ADDI_AttachPCI1710(dev);
1661
1662 /* save base address */
1663 devpriv->s_BoardInfos.ui_Address = io_addr[2];
1664#endif
1665 } else {
1666 n_subdevices = 7;
1667 ret = comedi_alloc_subdevices(dev, n_subdevices);
1668 if (ret)
1669 return ret;
1670 207
1671 /* Allocate and Initialise AI Subdevice Structures */ 208 /* Set the initialisation flag */
1672 s = &dev->subdevices[0]; 209 devpriv->b_AiInitialisation = 1;
1673 if ((devpriv->s_EeParameters.i_NbrAiChannel)
1674 || (this_board->i_NbrAiChannelDiff)) {
1675 dev->read_subdev = s;
1676 s->type = COMEDI_SUBD_AI;
1677 s->subdev_flags =
1678 SDF_READABLE | SDF_COMMON | SDF_GROUND
1679 | SDF_DIFF;
1680 if (devpriv->s_EeParameters.i_NbrAiChannel) {
1681 s->n_chan =
1682 devpriv->s_EeParameters.i_NbrAiChannel;
1683 devpriv->b_SingelDiff = 0;
1684 } else {
1685 s->n_chan = this_board->i_NbrAiChannelDiff;
1686 devpriv->b_SingelDiff = 1;
1687 }
1688 s->maxdata = devpriv->s_EeParameters.i_AiMaxdata;
1689 s->len_chanlist = this_board->i_AiChannelList;
1690 s->range_table = this_board->pr_AiRangelist;
1691
1692 /* Set the initialisation flag */
1693 devpriv->b_AiInitialisation = 1;
1694
1695 s->insn_config = this_board->ai_config;
1696 s->insn_read = this_board->ai_read;
1697 s->insn_write = this_board->ai_write;
1698 s->insn_bits = this_board->ai_bits;
1699 s->do_cmdtest = this_board->ai_cmdtest;
1700 s->do_cmd = this_board->ai_cmd;
1701 s->cancel = this_board->ai_cancel;
1702
1703 } else {
1704 s->type = COMEDI_SUBD_UNUSED;
1705 }
1706 210
1707 /* Allocate and Initialise AO Subdevice Structures */ 211 s->insn_config = this_board->ai_config;
1708 s = &dev->subdevices[1]; 212 s->insn_read = this_board->ai_read;
1709 if (devpriv->s_EeParameters.i_NbrAoChannel) { 213 s->insn_write = this_board->ai_write;
1710 s->type = COMEDI_SUBD_AO; 214 s->insn_bits = this_board->ai_bits;
1711 s->subdev_flags = SDF_WRITEABLE | SDF_GROUND | SDF_COMMON; 215 s->do_cmdtest = this_board->ai_cmdtest;
1712 s->n_chan = devpriv->s_EeParameters.i_NbrAoChannel; 216 s->do_cmd = this_board->ai_cmd;
1713 s->maxdata = devpriv->s_EeParameters.i_AoMaxdata; 217 s->cancel = this_board->ai_cancel;
1714 s->len_chanlist =
1715 devpriv->s_EeParameters.i_NbrAoChannel;
1716 s->range_table = this_board->pr_AoRangelist;
1717 s->insn_config = this_board->ao_config;
1718 s->insn_write = this_board->ao_write;
1719 } else {
1720 s->type = COMEDI_SUBD_UNUSED;
1721 }
1722 /* Allocate and Initialise DI Subdevice Structures */
1723 s = &dev->subdevices[2];
1724 if (devpriv->s_EeParameters.i_NbrDiChannel) {
1725 s->type = COMEDI_SUBD_DI;
1726 s->subdev_flags = SDF_READABLE | SDF_GROUND | SDF_COMMON;
1727 s->n_chan = devpriv->s_EeParameters.i_NbrDiChannel;
1728 s->maxdata = 1;
1729 s->len_chanlist =
1730 devpriv->s_EeParameters.i_NbrDiChannel;
1731 s->range_table = &range_digital;
1732 s->io_bits = 0; /* all bits input */
1733 s->insn_config = this_board->di_config;
1734 s->insn_read = this_board->di_read;
1735 s->insn_write = this_board->di_write;
1736 s->insn_bits = this_board->di_bits;
1737 } else {
1738 s->type = COMEDI_SUBD_UNUSED;
1739 }
1740 /* Allocate and Initialise DO Subdevice Structures */
1741 s = &dev->subdevices[3];
1742 if (devpriv->s_EeParameters.i_NbrDoChannel) {
1743 s->type = COMEDI_SUBD_DO;
1744 s->subdev_flags =
1745 SDF_READABLE | SDF_WRITEABLE | SDF_GROUND | SDF_COMMON;
1746 s->n_chan = devpriv->s_EeParameters.i_NbrDoChannel;
1747 s->maxdata = devpriv->s_EeParameters.i_DoMaxdata;
1748 s->len_chanlist =
1749 devpriv->s_EeParameters.i_NbrDoChannel;
1750 s->range_table = &range_digital;
1751 s->io_bits = 0xf; /* all bits output */
1752 218
1753 /* insn_config - for digital output memory */ 219 } else {
1754 s->insn_config = this_board->do_config; 220 s->type = COMEDI_SUBD_UNUSED;
1755 s->insn_write = this_board->do_write; 221 }
1756 s->insn_bits = this_board->do_bits;
1757 s->insn_read = this_board->do_read;
1758 } else {
1759 s->type = COMEDI_SUBD_UNUSED;
1760 }
1761 222
1762 /* Allocate and Initialise Timer Subdevice Structures */ 223 /* Allocate and Initialise AO Subdevice Structures */
1763 s = &dev->subdevices[4]; 224 s = &dev->subdevices[1];
1764 if (devpriv->s_EeParameters.i_Timer) { 225 if (devpriv->s_EeParameters.i_NbrAoChannel) {
1765 s->type = COMEDI_SUBD_TIMER; 226 s->type = COMEDI_SUBD_AO;
1766 s->subdev_flags = SDF_WRITEABLE | SDF_GROUND | SDF_COMMON; 227 s->subdev_flags = SDF_WRITEABLE | SDF_GROUND | SDF_COMMON;
1767 s->n_chan = 1; 228 s->n_chan = devpriv->s_EeParameters.i_NbrAoChannel;
1768 s->maxdata = 0; 229 s->maxdata = devpriv->s_EeParameters.i_AoMaxdata;
1769 s->len_chanlist = 1; 230 s->len_chanlist =
1770 s->range_table = &range_digital; 231 devpriv->s_EeParameters.i_NbrAoChannel;
232 s->range_table = this_board->pr_AoRangelist;
233 s->insn_config = this_board->ao_config;
234 s->insn_write = this_board->ao_write;
235 } else {
236 s->type = COMEDI_SUBD_UNUSED;
237 }
238 /* Allocate and Initialise DI Subdevice Structures */
239 s = &dev->subdevices[2];
240 if (devpriv->s_EeParameters.i_NbrDiChannel) {
241 s->type = COMEDI_SUBD_DI;
242 s->subdev_flags = SDF_READABLE | SDF_GROUND | SDF_COMMON;
243 s->n_chan = devpriv->s_EeParameters.i_NbrDiChannel;
244 s->maxdata = 1;
245 s->len_chanlist =
246 devpriv->s_EeParameters.i_NbrDiChannel;
247 s->range_table = &range_digital;
248 s->io_bits = 0; /* all bits input */
249 s->insn_config = this_board->di_config;
250 s->insn_read = this_board->di_read;
251 s->insn_write = this_board->di_write;
252 s->insn_bits = this_board->di_bits;
253 } else {
254 s->type = COMEDI_SUBD_UNUSED;
255 }
256 /* Allocate and Initialise DO Subdevice Structures */
257 s = &dev->subdevices[3];
258 if (devpriv->s_EeParameters.i_NbrDoChannel) {
259 s->type = COMEDI_SUBD_DO;
260 s->subdev_flags =
261 SDF_READABLE | SDF_WRITEABLE | SDF_GROUND | SDF_COMMON;
262 s->n_chan = devpriv->s_EeParameters.i_NbrDoChannel;
263 s->maxdata = devpriv->s_EeParameters.i_DoMaxdata;
264 s->len_chanlist =
265 devpriv->s_EeParameters.i_NbrDoChannel;
266 s->range_table = &range_digital;
267 s->io_bits = 0xf; /* all bits output */
268
269 /* insn_config - for digital output memory */
270 s->insn_config = this_board->do_config;
271 s->insn_write = this_board->do_write;
272 s->insn_bits = this_board->do_bits;
273 s->insn_read = this_board->do_read;
274 } else {
275 s->type = COMEDI_SUBD_UNUSED;
276 }
1771 277
1772 s->insn_write = this_board->timer_write; 278 /* Allocate and Initialise Timer Subdevice Structures */
1773 s->insn_read = this_board->timer_read; 279 s = &dev->subdevices[4];
1774 s->insn_config = this_board->timer_config; 280 if (devpriv->s_EeParameters.i_Timer) {
1775 s->insn_bits = this_board->timer_bits; 281 s->type = COMEDI_SUBD_TIMER;
1776 } else { 282 s->subdev_flags = SDF_WRITEABLE | SDF_GROUND | SDF_COMMON;
1777 s->type = COMEDI_SUBD_UNUSED; 283 s->n_chan = 1;
1778 } 284 s->maxdata = 0;
285 s->len_chanlist = 1;
286 s->range_table = &range_digital;
287
288 s->insn_write = this_board->timer_write;
289 s->insn_read = this_board->timer_read;
290 s->insn_config = this_board->timer_config;
291 s->insn_bits = this_board->timer_bits;
292 } else {
293 s->type = COMEDI_SUBD_UNUSED;
294 }
1779 295
1780 /* Allocate and Initialise TTL */ 296 /* Allocate and Initialise TTL */
1781 s = &dev->subdevices[5]; 297 s = &dev->subdevices[5];
1782 if (this_board->i_NbrTTLChannel) { 298 if (this_board->i_NbrTTLChannel) {
1783 s->type = COMEDI_SUBD_TTLIO; 299 s->type = COMEDI_SUBD_TTLIO;
1784 s->subdev_flags = 300 s->subdev_flags =
1785 SDF_WRITEABLE | SDF_READABLE | SDF_GROUND | SDF_COMMON; 301 SDF_WRITEABLE | SDF_READABLE | SDF_GROUND | SDF_COMMON;
1786 s->n_chan = this_board->i_NbrTTLChannel; 302 s->n_chan = this_board->i_NbrTTLChannel;
1787 s->maxdata = 1; 303 s->maxdata = 1;
1788 s->io_bits = 0; /* all bits input */ 304 s->io_bits = 0; /* all bits input */
1789 s->len_chanlist = this_board->i_NbrTTLChannel; 305 s->len_chanlist = this_board->i_NbrTTLChannel;
1790 s->range_table = &range_digital; 306 s->range_table = &range_digital;
1791 s->insn_config = this_board->ttl_config; 307 s->insn_config = this_board->ttl_config;
1792 s->insn_bits = this_board->ttl_bits; 308 s->insn_bits = this_board->ttl_bits;
1793 s->insn_read = this_board->ttl_read; 309 s->insn_read = this_board->ttl_read;
1794 s->insn_write = this_board->ttl_write; 310 s->insn_write = this_board->ttl_write;
1795 } else { 311 } else {
1796 s->type = COMEDI_SUBD_UNUSED; 312 s->type = COMEDI_SUBD_UNUSED;
1797 } 313 }
1798 314
1799 /* EEPROM */ 315 /* EEPROM */
1800 s = &dev->subdevices[6]; 316 s = &dev->subdevices[6];
1801 if (this_board->i_PCIEeprom) { 317 if (this_board->i_PCIEeprom) {
1802 s->type = COMEDI_SUBD_MEMORY; 318 s->type = COMEDI_SUBD_MEMORY;
1803 s->subdev_flags = SDF_READABLE | SDF_INTERNAL; 319 s->subdev_flags = SDF_READABLE | SDF_INTERNAL;
1804 s->n_chan = 256; 320 s->n_chan = 256;
1805 s->maxdata = 0xffff; 321 s->maxdata = 0xffff;
1806 s->insn_read = i_ADDIDATA_InsnReadEeprom; 322 s->insn_read = i_ADDIDATA_InsnReadEeprom;
1807 } else { 323 } else {
1808 s->type = COMEDI_SUBD_UNUSED; 324 s->type = COMEDI_SUBD_UNUSED;
1809 }
1810 } 325 }
1811 326
1812 printk("\ni_ADDI_Attach end\n");
1813 i_ADDI_Reset(dev); 327 i_ADDI_Reset(dev);
1814 devpriv->b_ValidDriver = 1;
1815 return 0; 328 return 0;
1816} 329}
1817 330
1818static void i_ADDI_Detach(struct comedi_device *dev) 331static void i_ADDI_Detach(struct comedi_device *dev)
1819{ 332{
1820 if (dev->private) { 333 struct pci_dev *pcidev = comedi_to_pci_dev(dev);
1821 if (devpriv->b_ValidDriver) 334 struct addi_private *devpriv = dev->private;
335
336 if (devpriv) {
337 if (dev->iobase)
1822 i_ADDI_Reset(dev); 338 i_ADDI_Reset(dev);
1823 if (dev->irq) 339 if (dev->irq)
1824 free_irq(dev->irq, dev); 340 free_irq(dev->irq, dev);
1825 if ((this_board->pc_EepromChip == NULL) || 341 if (devpriv->dw_AiBase)
1826 (strcmp(this_board->pc_EepromChip, ADDIDATA_9054) != 0)) {
1827 if (devpriv->allocated)
1828 i_pci_card_free(devpriv->amcc);
1829 if (devpriv->ul_DmaBufferVirtual[0]) {
1830 free_pages((unsigned long)devpriv->
1831 ul_DmaBufferVirtual[0],
1832 devpriv->ui_DmaBufferPages[0]);
1833 }
1834 if (devpriv->ul_DmaBufferVirtual[1]) {
1835 free_pages((unsigned long)devpriv->
1836 ul_DmaBufferVirtual[1],
1837 devpriv->ui_DmaBufferPages[1]);
1838 }
1839 } else {
1840 iounmap(devpriv->dw_AiBase); 342 iounmap(devpriv->dw_AiBase);
1841 if (devpriv->allocated)
1842 i_pci_card_free(devpriv->amcc);
1843 }
1844 if (pci_list_builded) {
1845 v_pci_card_list_cleanup(this_board->i_VendorId);
1846 pci_list_builded = 0;
1847 }
1848 } 343 }
1849} 344 if (pcidev) {
1850 345 if (dev->iobase)
1851/* 346 comedi_pci_disable(pcidev);
1852+----------------------------------------------------------------------------+ 347 }
1853| Function name : static int i_ADDI_Reset(struct comedi_device *dev) |
1854| |
1855+----------------------------------------------------------------------------+
1856| Task : Disables all interrupts, Resets digital output to low, |
1857| Set all analog output to low |
1858| |
1859+----------------------------------------------------------------------------+
1860| Input Parameters : struct comedi_device *dev |
1861| |
1862| |
1863+----------------------------------------------------------------------------+
1864| Return Value : 0 |
1865| |
1866+----------------------------------------------------------------------------+
1867*/
1868
1869static int i_ADDI_Reset(struct comedi_device *dev)
1870{
1871
1872 this_board->reset(dev);
1873 return 0;
1874}
1875
1876/* Interrupt function */
1877/*
1878+----------------------------------------------------------------------------+
1879| Function name : |
1880|static void v_ADDI_Interrupt(int irq, void *d) |
1881| |
1882+----------------------------------------------------------------------------+
1883| Task : Registerd interrupt routine |
1884| |
1885+----------------------------------------------------------------------------+
1886| Input Parameters : int irq |
1887| |
1888| |
1889+----------------------------------------------------------------------------+
1890| Return Value : |
1891| |
1892+----------------------------------------------------------------------------+
1893*/
1894
1895static irqreturn_t v_ADDI_Interrupt(int irq, void *d)
1896{
1897 struct comedi_device *dev = d;
1898 this_board->interrupt(irq, d);
1899 return IRQ_RETVAL(1);
1900}
1901
1902/* EEPROM Read Function */
1903/*
1904+----------------------------------------------------------------------------+
1905| Function name : |
1906|INT i_ADDIDATA_InsnReadEeprom(struct comedi_device *dev,struct comedi_subdevice *s,
1907 struct comedi_insn *insn,unsigned int *data)
1908| |
1909+----------------------------------------------------------------------------+
1910| Task : Read 256 words from EEPROM |
1911| |
1912+----------------------------------------------------------------------------+
1913| Input Parameters :(struct comedi_device *dev,struct comedi_subdevice *s,
1914 struct comedi_insn *insn,unsigned int *data) |
1915| |
1916| |
1917+----------------------------------------------------------------------------+
1918| Return Value : |
1919| |
1920+----------------------------------------------------------------------------+
1921*/
1922
1923static int i_ADDIDATA_InsnReadEeprom(struct comedi_device *dev, struct comedi_subdevice *s,
1924 struct comedi_insn *insn, unsigned int *data)
1925{
1926 unsigned short w_Data;
1927 unsigned short w_Address;
1928 w_Address = CR_CHAN(insn->chanspec); /* address to be read as 0,1,2,3...255 */
1929
1930 w_Data = w_EepromReadWord(devpriv->i_IobaseAmcc,
1931 this_board->pc_EepromChip, 0x100 + (2 * w_Address));
1932 data[0] = w_Data;
1933 /* multiplied by 2 bcozinput will be like 0,1,2...255 */
1934 return insn->n;
1935
1936} 348}
diff --git a/drivers/staging/comedi/drivers/addi-data/addi_common.h b/drivers/staging/comedi/drivers/addi-data/addi_common.h
index b7bbb7164f58..6d8b29f945d5 100644
--- a/drivers/staging/comedi/drivers/addi-data/addi_common.h
+++ b/drivers/staging/comedi/drivers/addi-data/addi_common.h
@@ -15,26 +15,8 @@
15 * any later version. 15 * any later version.
16 */ 16 */
17 17
18#include <linux/kernel.h>
19#include <linux/module.h>
20#include <linux/sched.h> 18#include <linux/sched.h>
21#include <linux/mm.h>
22#include <linux/slab.h>
23#include <linux/errno.h>
24#include <linux/ioport.h>
25#include <linux/delay.h>
26#include <linux/interrupt.h> 19#include <linux/interrupt.h>
27#include <linux/timex.h>
28#include <linux/timer.h>
29#include <linux/pci.h>
30#include <linux/io.h>
31#include <linux/kmod.h>
32#include <linux/uaccess.h>
33#include "../../comedidev.h"
34#include "addi_amcc_s5933.h"
35
36#define ERROR -1
37#define SUCCESS 1
38 20
39#define LOBYTE(W) (unsigned char)((W) & 0xFF) 21#define LOBYTE(W) (unsigned char)((W) & 0xFF)
40#define HIBYTE(W) (unsigned char)(((W) >> 8) & 0xFF) 22#define HIBYTE(W) (unsigned char)(((W) >> 8) & 0xFF)
@@ -312,9 +294,6 @@ struct addi_private {
312 int i_IobaseAddon; /* addon base address */ 294 int i_IobaseAddon; /* addon base address */
313 int i_IobaseReserved; 295 int i_IobaseReserved;
314 void __iomem *dw_AiBase; 296 void __iomem *dw_AiBase;
315 struct pcilst_struct *amcc; /* ptr too AMCC data */
316 unsigned char allocated; /* we have blocked card */
317 unsigned char b_ValidDriver; /* driver is ok */
318 unsigned char b_AiContinuous; /* we do unlimited AI */ 297 unsigned char b_AiContinuous; /* we do unlimited AI */
319 unsigned char b_AiInitialisation; 298 unsigned char b_AiInitialisation;
320 unsigned int ui_AiActualScan; /* how many scans we finished */ 299 unsigned int ui_AiActualScan; /* how many scans we finished */
@@ -410,14 +389,3 @@ struct addi_private {
410 /* Minimum Delay in Nano secs */ 389 /* Minimum Delay in Nano secs */
411 } s_EeParameters; 390 } s_EeParameters;
412}; 391};
413
414static unsigned short pci_list_builded; /* set to 1 when list of card is known */
415
416/* Function declarations */
417static int i_ADDI_Attach(struct comedi_device *dev, struct comedi_devconfig *it);
418static void i_ADDI_Detach(struct comedi_device *dev);
419static int i_ADDI_Reset(struct comedi_device *dev);
420
421static irqreturn_t v_ADDI_Interrupt(int irq, void *d);
422static int i_ADDIDATA_InsnReadEeprom(struct comedi_device *dev, struct comedi_subdevice *s,
423 struct comedi_insn *insn, unsigned int *data);
diff --git a/drivers/staging/comedi/drivers/addi-data/addi_eeprom.c b/drivers/staging/comedi/drivers/addi-data/addi_eeprom.c
index 3a9339b92610..5124ac9f1818 100644
--- a/drivers/staging/comedi/drivers/addi-data/addi_eeprom.c
+++ b/drivers/staging/comedi/drivers/addi-data/addi_eeprom.c
@@ -1,1162 +1,365 @@
1/**
2@verbatim
3
4Copyright (C) 2004,2005 ADDI-DATA GmbH for the source code of this module.
5
6 ADDI-DATA GmbH
7 Dieselstrasse 3
8 D-77833 Ottersweier
9 Tel: +19(0)7223/9493-0
10 Fax: +49(0)7223/9493-92
11 http://www.addi-data.com
12 info@addi-data.com
13
14This program is free software; you can redistribute it and/or modify it under the terms of the GNU General Public License as published by the Free Software Foundation; either version 2 of the License, or (at your option) any later version.
15
16This program is distributed in the hope that it will be useful, but WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for more details.
17
18You should have received a copy of the GNU General Public License along with this program; if not, write to the Free Software Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
19
20You should also find the complete GPL in the COPYING file accompanying this source code.
21
22@endverbatim
23*/
24/* 1/*
25 2 * addi_eeprom.c - ADDI EEPROM Module
26 +-----------------------------------------------------------------------+ 3 * Copyright (C) 2004,2005 ADDI-DATA GmbH for the source code of this module.
27 | (C) ADDI-DATA GmbH Dieselstrasse 3 D-77833 Ottersweier | 4 * Project manager: Eric Stolz
28 +-----------------------------------------------------------------------+ 5 *
29 | Tel : +49 (0) 7223/9493-0 | email : info@addi-data.com | 6 * ADDI-DATA GmbH
30 | Fax : +49 (0) 7223/9493-92 | Internet : http://www.addi-data.com | 7 * Dieselstrasse 3
31 +-----------------------------------------------------------------------+ 8 * D-77833 Ottersweier
32 | Project : ADDI DATA | Compiler : GCC | 9 * Tel: +19(0)7223/9493-0
33 | Modulname : addi_eeprom.c | Version : 2.96 | 10 * Fax: +49(0)7223/9493-92
34 +-------------------------------+---------------------------------------+ 11 * http://www.addi-data.com
35 | Project manager: Eric Stolz | Date : 02/12/2002 | 12 * info@addi-data.com
36 +-----------------------------------------------------------------------+ 13 *
37 | Description : ADDI EEPROM Module | 14 * This program is free software; you can redistribute it and/or modify it
38 +-----------------------------------------------------------------------+ 15 * under the terms of the GNU General Public License as published by the
39 | UPDATE'S | 16 * Free Software Foundation; either version 2 of the License, or (at your
40 +-----------------------------------------------------------------------+ 17 * option) any later version.
41 | Date | Author | Description of updates | 18 *
42 +----------+-----------+------------------------------------------------+ 19 * This program is distributed in the hope that it will be useful, but
43 | | | | 20 * WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
44 | | | | 21 * or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
45 +----------+-----------+------------------------------------------------+ 22 * for more details.
46*/ 23 *
47 24 * You should have received a copy of the GNU General Public License along
48#define NVCMD_BEGIN_READ (0x7 << 5) /* nvRam begin read command */ 25 * with this program; if not, write to the Free Software Foundation, Inc.,
49#define NVCMD_LOAD_LOW (0x4 << 5) /* nvRam load low command */ 26 * 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
50#define NVCMD_LOAD_HIGH (0x5 << 5) /* nvRam load high command */ 27 *
51#define EE76_CMD_LEN 13 /* bits in instructions */ 28 * You should also find the complete GPL in the COPYING file accompanying
52#define EE_READ 0x0180 /* 01 1000 0000 read instruction */ 29 * this source code.
53 30 */
54#define EEPROM_DIGITALINPUT 0 31
55#define EEPROM_DIGITALOUTPUT 1 32#define NVRAM_USER_DATA_START 0x100
56#define EEPROM_ANALOGINPUT 2 33
57#define EEPROM_ANALOGOUTPUT 3 34#define NVCMD_BEGIN_READ (0x7 << 5) /* nvRam begin read command */
58#define EEPROM_TIMER 4 35#define NVCMD_LOAD_LOW (0x4 << 5) /* nvRam load low command */
59#define EEPROM_WATCHDOG 5 36#define NVCMD_LOAD_HIGH (0x5 << 5) /* nvRam load high command */
37
38#define EE93C76_CLK_BIT (1 << 0)
39#define EE93C76_CS_BIT (1 << 1)
40#define EE93C76_DOUT_BIT (1 << 2)
41#define EE93C76_DIN_BIT (1 << 3)
42#define EE93C76_READ_CMD (0x0180 << 4)
43#define EE93C76_CMD_LEN 13
44
45#define EEPROM_DIGITALINPUT 0
46#define EEPROM_DIGITALOUTPUT 1
47#define EEPROM_ANALOGINPUT 2
48#define EEPROM_ANALOGOUTPUT 3
49#define EEPROM_TIMER 4
50#define EEPROM_WATCHDOG 5
60#define EEPROM_TIMER_WATCHDOG_COUNTER 10 51#define EEPROM_TIMER_WATCHDOG_COUNTER 10
61 52
62struct str_Functionality { 53static void addi_eeprom_clk_93c76(unsigned long iobase, unsigned int val)
63 unsigned char b_Type;
64 unsigned short w_Address;
65};
66
67struct str_MainHeader {
68 unsigned short w_HeaderSize;
69 unsigned char b_Nfunctions;
70 struct str_Functionality s_Functions[7];
71};
72
73struct str_DigitalInputHeader {
74 unsigned short w_Nchannel;
75 unsigned char b_Interruptible;
76 unsigned short w_NinterruptLogic;
77};
78
79struct str_DigitalOutputHeader {
80
81 unsigned short w_Nchannel;
82};
83
84
85/* used for timer as well as watchdog */
86
87struct str_TimerDetails {
88
89 unsigned short w_HeaderSize;
90 unsigned char b_Resolution;
91 unsigned char b_Mode; /* in case of Watchdog it is functionality */
92 unsigned short w_MinTiming;
93 unsigned char b_TimeBase;
94};
95
96struct str_TimerMainHeader {
97
98
99 unsigned short w_Ntimer;
100 struct str_TimerDetails s_TimerDetails[4]; /* supports 4 timers */
101};
102
103
104struct str_AnalogOutputHeader {
105 unsigned short w_Nchannel;
106 unsigned char b_Resolution;
107};
108
109struct str_AnalogInputHeader {
110 unsigned short w_Nchannel;
111 unsigned short w_MinConvertTiming;
112 unsigned short w_MinDelayTiming;
113 unsigned char b_HasDma;
114 unsigned char b_Resolution;
115};
116
117
118 /*****************************************/
119 /* Read Header Functions */
120 /*****************************************/
121
122int i_EepromReadMainHeader(unsigned short w_PCIBoardEepromAddress,
123 char *pc_PCIChipInformation, struct comedi_device *dev);
124
125int i_EepromReadDigitalInputHeader(unsigned short w_PCIBoardEepromAddress,
126 char *pc_PCIChipInformation, unsigned short w_Address,
127 struct str_DigitalInputHeader *s_Header);
128
129int i_EepromReadDigitalOutputHeader(unsigned short w_PCIBoardEepromAddress,
130 char *pc_PCIChipInformation, unsigned short w_Address,
131 struct str_DigitalOutputHeader *s_Header);
132
133int i_EepromReadTimerHeader(unsigned short w_PCIBoardEepromAddress,
134 char *pc_PCIChipInformation, unsigned short w_Address,
135 struct str_TimerMainHeader *s_Header);
136
137int i_EepromReadAnlogOutputHeader(unsigned short w_PCIBoardEepromAddress,
138 char *pc_PCIChipInformation, unsigned short w_Address,
139 struct str_AnalogOutputHeader *s_Header);
140
141int i_EepromReadAnlogInputHeader(unsigned short w_PCIBoardEepromAddress,
142 char *pc_PCIChipInformation, unsigned short w_Address,
143 struct str_AnalogInputHeader *s_Header);
144
145 /******************************************/
146 /* Eeprom Specific Functions */
147 /******************************************/
148unsigned short w_EepromReadWord(unsigned short w_PCIBoardEepromAddress, char *pc_PCIChipInformation,
149 unsigned short w_EepromStartAddress);
150void v_EepromWaitBusy(unsigned short w_PCIBoardEepromAddress);
151void v_EepromClock76(unsigned int dw_Address, unsigned int dw_RegisterValue);
152void v_EepromWaitBusy(unsigned short w_PCIBoardEepromAddress);
153void v_EepromSendCommand76(unsigned int dw_Address, unsigned int dw_EepromCommand,
154 unsigned char b_DataLengthInBits);
155void v_EepromCs76Read(unsigned int dw_Address, unsigned short w_offset, unsigned short *pw_Value);
156
157/*
158+----------------------------------------------------------------------------+
159| Function Name : unsigned short w_EepromReadWord |
160| (unsigned short w_PCIBoardEepromAddress, |
161| char * pc_PCIChipInformation, |
162| unsigned short w_EepromStartAddress) |
163+----------------------------------------------------------------------------+
164| Task : Read from eepromn a word |
165+----------------------------------------------------------------------------+
166| Input Parameters : unsigned short w_PCIBoardEepromAddress : PCI eeprom address |
167| |
168| char *pc_PCIChipInformation : PCI Chip Type. |
169| |
170| unsigned short w_EepromStartAddress : Selected eeprom address |
171+----------------------------------------------------------------------------+
172| Output Parameters : - |
173+----------------------------------------------------------------------------+
174| Return Value : Read word value from eeprom |
175+----------------------------------------------------------------------------+
176*/
177
178unsigned short w_EepromReadWord(unsigned short w_PCIBoardEepromAddress, char *pc_PCIChipInformation,
179 unsigned short w_EepromStartAddress)
180{ 54{
181 55 outl(val & ~EE93C76_CLK_BIT, iobase);
182 unsigned char b_Counter = 0;
183
184 unsigned char b_ReadByte = 0;
185
186 unsigned char b_ReadLowByte = 0;
187
188 unsigned char b_ReadHighByte = 0;
189
190 unsigned char b_SelectedAddressLow = 0;
191
192 unsigned char b_SelectedAddressHigh = 0;
193
194 unsigned short w_ReadWord = 0;
195
196 /**************************/
197
198 /* Test the PCI chip type */
199
200 /**************************/
201
202 if ((!strcmp(pc_PCIChipInformation, "S5920")) ||
203 (!strcmp(pc_PCIChipInformation, "S5933")))
204 {
205
206 for (b_Counter = 0; b_Counter < 2; b_Counter++)
207 {
208
209 b_SelectedAddressLow = (w_EepromStartAddress + b_Counter) % 256; /* Read the low 8 bit part */
210
211 b_SelectedAddressHigh = (w_EepromStartAddress + b_Counter) / 256; /* Read the high 8 bit part */
212
213 /************************************/
214
215 /* Select the load low address mode */
216
217 /************************************/
218
219 outb(NVCMD_LOAD_LOW, w_PCIBoardEepromAddress + 0x3F);
220
221 /****************/
222
223 /* Wait on busy */
224
225 /****************/
226
227 v_EepromWaitBusy(w_PCIBoardEepromAddress);
228
229 /************************/
230
231 /* Load the low address */
232
233 /************************/
234
235 outb(b_SelectedAddressLow,
236 w_PCIBoardEepromAddress + 0x3E);
237
238 /****************/
239
240 /* Wait on busy */
241
242 /****************/
243
244 v_EepromWaitBusy(w_PCIBoardEepromAddress);
245
246 /*************************************/
247
248 /* Select the load high address mode */
249
250 /*************************************/
251
252 outb(NVCMD_LOAD_HIGH, w_PCIBoardEepromAddress + 0x3F);
253
254 /****************/
255
256 /* Wait on busy */
257
258 /****************/
259
260 v_EepromWaitBusy(w_PCIBoardEepromAddress);
261
262 /*************************/
263
264 /* Load the high address */
265
266 /*************************/
267
268 outb(b_SelectedAddressHigh,
269 w_PCIBoardEepromAddress + 0x3E);
270
271 /****************/
272
273 /* Wait on busy */
274
275 /****************/
276
277 v_EepromWaitBusy(w_PCIBoardEepromAddress);
278
279 /************************/
280
281 /* Select the READ mode */
282
283 /************************/
284
285 outb(NVCMD_BEGIN_READ, w_PCIBoardEepromAddress + 0x3F);
286
287 /****************/
288
289 /* Wait on busy */
290
291 /****************/
292
293 v_EepromWaitBusy(w_PCIBoardEepromAddress);
294
295 /*****************************/
296
297 /* Read data into the EEPROM */
298
299 /*****************************/
300
301 b_ReadByte = inb(w_PCIBoardEepromAddress + 0x3E);
302
303 /****************/
304
305 /* Wait on busy */
306
307 /****************/
308
309 v_EepromWaitBusy(w_PCIBoardEepromAddress);
310
311 /*********************************/
312
313 /* Select the upper address part */
314
315 /*********************************/
316
317 if (b_Counter == 0)
318 {
319
320 b_ReadLowByte = b_ReadByte;
321
322 } /* if(b_Counter==0) */
323
324 else
325 {
326
327 b_ReadHighByte = b_ReadByte;
328
329 } /* if(b_Counter==0) */
330
331 } /* for (b_Counter=0; b_Counter<2; b_Counter++) */
332
333 w_ReadWord = (b_ReadLowByte | (((unsigned short) b_ReadHighByte) * 256));
334
335 } /* end of if ((!strcmp(pc_PCIChipInformation, "S5920")) || (!strcmp(pc_PCIChipInformation, "S5933"))) */
336
337 if (!strcmp(pc_PCIChipInformation, "93C76"))
338 {
339
340 /*************************************/
341
342 /* Read 16 bit from the EEPROM 93C76 */
343
344 /*************************************/
345
346 v_EepromCs76Read(w_PCIBoardEepromAddress, w_EepromStartAddress,
347 &w_ReadWord);
348
349 }
350
351 return w_ReadWord;
352
353}
354
355/*
356
357+----------------------------------------------------------------------------+
358
359| Function Name : void v_EepromWaitBusy |
360
361| (unsigned short w_PCIBoardEepromAddress) |
362
363+----------------------------------------------------------------------------+
364
365| Task : Wait the busy flag from PCI controller |
366
367+----------------------------------------------------------------------------+
368
369| Input Parameters : unsigned short w_PCIBoardEepromAddress : PCI eeprom base address |
370
371+----------------------------------------------------------------------------+
372
373| Output Parameters : - |
374
375+----------------------------------------------------------------------------+
376
377| Return Value : - |
378
379+----------------------------------------------------------------------------+
380
381*/
382
383void v_EepromWaitBusy(unsigned short w_PCIBoardEepromAddress)
384{
385
386 unsigned char b_EepromBusy = 0;
387
388 do
389 {
390
391 /*************/
392
393 /* IMPORTANT */
394
395 /*************/
396
397 /************************************************************************/
398
399 /* An error has been written in the AMCC 5933 book at the page B-13 */
400
401 /* Ex: if you read a byte and look for the busy statusEEPROM=0x80 and */
402
403 /* the operator register is AMCC_OP_REG_MCSR+3 */
404
405 /* unsigned short read EEPROM=0x8000 andAMCC_OP_REG_MCSR+2 */
406
407 /* unsigned int read EEPROM=0x80000000 and AMCC_OP_REG_MCSR */
408
409 /************************************************************************/
410
411 b_EepromBusy = inb(w_PCIBoardEepromAddress + 0x3F);
412 b_EepromBusy = b_EepromBusy & 0x80;
413
414 } while (b_EepromBusy == 0x80);
415
416}
417
418/*
419
420+---------------------------------------------------------------------------------+
421
422| Function Name : void v_EepromClock76(unsigned int dw_Address, |
423
424| unsigned int dw_RegisterValue) |
425
426+---------------------------------------------------------------------------------+
427
428| Task : This function sends the clocking sequence to the EEPROM. |
429
430+---------------------------------------------------------------------------------+
431
432| Input Parameters : unsigned int dw_Address : PCI eeprom base address |
433
434| unsigned int dw_RegisterValue : PCI eeprom register value to write.|
435
436+---------------------------------------------------------------------------------+
437
438| Output Parameters : - |
439
440+---------------------------------------------------------------------------------+
441
442| Return Value : - |
443
444+---------------------------------------------------------------------------------+
445
446*/
447
448void v_EepromClock76(unsigned int dw_Address, unsigned int dw_RegisterValue)
449{
450
451 /************************/
452
453 /* Set EEPROM clock Low */
454
455 /************************/
456
457 outl(dw_RegisterValue & 0x6, dw_Address);
458
459 /***************/
460
461 /* Wait 0.1 ms */
462
463 /***************/
464
465 udelay(100); 56 udelay(100);
466 57
467 /*************************/ 58 outl(val | EE93C76_CLK_BIT, iobase);
468
469 /* Set EEPROM clock High */
470
471 /*************************/
472
473 outl(dw_RegisterValue | 0x1, dw_Address);
474
475 /***************/
476
477 /* Wait 0.1 ms */
478
479 /***************/
480
481 udelay(100); 59 udelay(100);
482
483} 60}
484 61
485/* 62static unsigned int addi_eeprom_cmd_93c76(unsigned long iobase,
486 63 unsigned int cmd,
487+---------------------------------------------------------------------------------+ 64 unsigned char len)
488
489| Function Name : void v_EepromSendCommand76(unsigned int dw_Address, |
490
491| unsigned int dw_EepromCommand, |
492
493| unsigned char b_DataLengthInBits) |
494
495+---------------------------------------------------------------------------------+
496
497| Task : This function sends a Command to the EEPROM 93C76. |
498
499+---------------------------------------------------------------------------------+
500
501| Input Parameters : unsigned int dw_Address : PCI eeprom base address |
502
503| unsigned int dw_EepromCommand : PCI eeprom command to write. |
504
505| unsigned char b_DataLengthInBits : PCI eeprom command data length. |
506
507+---------------------------------------------------------------------------------+
508
509| Output Parameters : - |
510
511+---------------------------------------------------------------------------------+
512
513| Return Value : - |
514
515+---------------------------------------------------------------------------------+
516
517*/
518
519void v_EepromSendCommand76(unsigned int dw_Address, unsigned int dw_EepromCommand,
520 unsigned char b_DataLengthInBits)
521{ 65{
522 66 unsigned int val = EE93C76_CS_BIT;
523 char c_BitPos = 0; 67 int i;
524
525 unsigned int dw_RegisterValue = 0;
526
527 /*****************************/
528
529 /* Enable EEPROM Chip Select */
530
531 /*****************************/
532
533 dw_RegisterValue = 0x2;
534
535 /********************************************************************/
536 68
537 /* Toggle EEPROM's Chip select to get it out of Shift Register Mode */ 69 /* Toggle EEPROM's Chip select to get it out of Shift Register Mode */
538 70 outl(val, iobase);
539 /********************************************************************/
540
541 outl(dw_RegisterValue, dw_Address);
542
543 /***************/
544
545 /* Wait 0.1 ms */
546
547 /***************/
548
549 udelay(100); 71 udelay(100);
550 72
551 /*******************************************/
552
553 /* Send EEPROM command - one bit at a time */ 73 /* Send EEPROM command - one bit at a time */
554 74 for (i = (len - 1); i >= 0; i--) {
555 /*******************************************/ 75 if (cmd & (1 << i))
556 76 val |= EE93C76_DOUT_BIT;
557 for (c_BitPos = (b_DataLengthInBits - 1); c_BitPos >= 0; c_BitPos--)
558 {
559
560 /**********************************/
561
562 /* Check if current bit is 0 or 1 */
563
564 /**********************************/
565
566 if (dw_EepromCommand & (1 << c_BitPos))
567 {
568
569 /***********/
570
571 /* Write 1 */
572
573 /***********/
574
575 dw_RegisterValue = dw_RegisterValue | 0x4;
576
577 }
578
579 else 77 else
580 { 78 val &= ~EE93C76_DOUT_BIT;
581
582 /***********/
583
584 /* Write 0 */
585
586 /***********/
587
588 dw_RegisterValue = dw_RegisterValue & 0x3;
589
590 }
591
592 /*********************/
593 79
594 /* Write the command */ 80 /* Write the command */
595 81 outl(val, iobase);
596 /*********************/
597
598 outl(dw_RegisterValue, dw_Address);
599
600 /***************/
601
602 /* Wait 0.1 ms */
603
604 /***************/
605
606 udelay(100); 82 udelay(100);
607 83
608 /****************************/ 84 addi_eeprom_clk_93c76(iobase, val);
609
610 /* Trigger the EEPROM clock */
611
612 /****************************/
613
614 v_EepromClock76(dw_Address, dw_RegisterValue);
615
616 } 85 }
617 86 return val;
618} 87}
619 88
620/* 89static unsigned short addi_eeprom_readw_93c76(unsigned long iobase,
621 90 unsigned short addr)
622+---------------------------------------------------------------------------------+
623
624| Function Name : void v_EepromCs76Read(unsigned int dw_Address, |
625
626| unsigned short w_offset, |
627
628| unsigned short * pw_Value) |
629
630+---------------------------------------------------------------------------------+
631
632| Task : This function read a value from the EEPROM 93C76. |
633
634+---------------------------------------------------------------------------------+
635
636| Input Parameters : unsigned int dw_Address : PCI eeprom base address |
637
638| unsigned short w_offset : Offset of the address to read |
639
640| unsigned short * pw_Value : PCI eeprom 16 bit read value. |
641
642+---------------------------------------------------------------------------------+
643
644| Output Parameters : - |
645
646+---------------------------------------------------------------------------------+
647
648| Return Value : - |
649
650+---------------------------------------------------------------------------------+
651
652*/
653
654void v_EepromCs76Read(unsigned int dw_Address, unsigned short w_offset, unsigned short *pw_Value)
655{ 91{
656 92 unsigned short val = 0;
657 char c_BitPos = 0; 93 unsigned int cmd;
658 94 unsigned int tmp;
659 unsigned int dw_RegisterValue = 0; 95 int i;
660
661 unsigned int dw_RegisterValueRead = 0;
662
663 /*************************************************/
664 96
665 /* Send EEPROM read command and offset to EEPROM */ 97 /* Send EEPROM read command and offset to EEPROM */
666 98 cmd = EE93C76_READ_CMD | (addr / 2);
667 /*************************************************/ 99 cmd = addi_eeprom_cmd_93c76(iobase, cmd, EE93C76_CMD_LEN);
668
669 v_EepromSendCommand76(dw_Address, (EE_READ << 4) | (w_offset / 2),
670 EE76_CMD_LEN);
671
672 /*******************************/
673
674 /* Get the last register value */
675
676 /*******************************/
677
678 dw_RegisterValue = (((w_offset / 2) & 0x1) << 2) | 0x2;
679
680 /*****************************/
681
682 /* Set the 16-bit value of 0 */
683
684 /*****************************/
685
686 *pw_Value = 0;
687
688 /************************/
689 100
690 /* Get the 16-bit value */ 101 /* Get the 16-bit value */
102 for (i = 0; i < 16; i++) {
103 addi_eeprom_clk_93c76(iobase, cmd);
691 104
692 /************************/ 105 tmp = inl(iobase);
693
694 for (c_BitPos = 0; c_BitPos < 16; c_BitPos++)
695 {
696
697 /****************************/
698
699 /* Trigger the EEPROM clock */
700
701 /****************************/
702
703 v_EepromClock76(dw_Address, dw_RegisterValue);
704
705 /**********************/
706
707 /* Get the result bit */
708
709 /**********************/
710
711 dw_RegisterValueRead = inl(dw_Address);
712
713 /***************/
714
715 /* Wait 0.1 ms */
716
717 /***************/
718
719 udelay(100); 106 udelay(100);
720 107
721 /***************************************/ 108 val <<= 1;
722 109 if (tmp & EE93C76_DIN_BIT)
723 /* Get bit value and shift into result */ 110 val |= 0x1;
724 111 }
725 /***************************************/
726
727 if (dw_RegisterValueRead & 0x8)
728 {
729
730 /**********/
731 112
732 /* Read 1 */ 113 /* Toggle EEPROM's Chip select to get it out of Shift Register Mode */
114 outl(0, iobase);
115 udelay(100);
733 116
734 /**********/ 117 return val;
118}
735 119
736 *pw_Value = (*pw_Value << 1) | 0x1; 120static void addi_eeprom_nvram_wait(unsigned long iobase)
121{
122 unsigned char val;
737 123
738 } 124 do {
125 val = inb(iobase + AMCC_OP_REG_MCSR_NVCMD);
126 } while (val & 0x80);
127}
739 128
129static unsigned short addi_eeprom_readw_nvram(unsigned long iobase,
130 unsigned short addr)
131{
132 unsigned short val = 0;
133 unsigned char tmp;
134 unsigned char i;
135
136 for (i = 0; i < 2; i++) {
137 /* Load the low 8 bit address */
138 outb(NVCMD_LOAD_LOW, iobase + AMCC_OP_REG_MCSR_NVCMD);
139 addi_eeprom_nvram_wait(iobase);
140 outb((addr + i) & 0xff, iobase + AMCC_OP_REG_MCSR_NVDATA);
141 addi_eeprom_nvram_wait(iobase);
142
143 /* Load the high 8 bit address */
144 outb(NVCMD_LOAD_HIGH, iobase + AMCC_OP_REG_MCSR_NVCMD);
145 addi_eeprom_nvram_wait(iobase);
146 outb(((addr + i) >> 8) & 0xff,
147 iobase + AMCC_OP_REG_MCSR_NVDATA);
148 addi_eeprom_nvram_wait(iobase);
149
150 /* Read the eeprom data byte */
151 outb(NVCMD_BEGIN_READ, iobase + AMCC_OP_REG_MCSR_NVCMD);
152 addi_eeprom_nvram_wait(iobase);
153 tmp = inb(iobase + AMCC_OP_REG_MCSR_NVDATA);
154 addi_eeprom_nvram_wait(iobase);
155
156 if (i == 0)
157 val |= tmp;
740 else 158 else
741 { 159 val |= (tmp << 8);
742 160 }
743 /**********/
744
745 /* Read 0 */
746 161
747 /**********/ 162 return val;
163}
748 164
749 *pw_Value = (*pw_Value << 1); 165static unsigned short addi_eeprom_readw(unsigned long iobase,
166 char *type,
167 unsigned short addr)
168{
169 unsigned short val = 0;
750 170
751 } 171 /* Add the offset to the start of the user data */
172 addr += NVRAM_USER_DATA_START;
752 173
753 } 174 if (!strcmp(type, "S5920") || !strcmp(type, "S5933"))
175 val = addi_eeprom_readw_nvram(iobase, addr);
754 176
755 /*************************/ 177 if (!strcmp(type, "93C76"))
178 val = addi_eeprom_readw_93c76(iobase, addr);
756 179
757 /* Clear all EEPROM bits */ 180 return val;
181}
758 182
759 /*************************/ 183static void addi_eeprom_read_di_info(struct comedi_device *dev,
184 unsigned long iobase,
185 unsigned short addr)
186{
187 const struct addi_board *this_board = comedi_board(dev);
188 struct addi_private *devpriv = dev->private;
189 char *type = this_board->pc_EepromChip;
190 unsigned short tmp;
760 191
761 dw_RegisterValue = 0x0; 192 /* Number of channels */
193 tmp = addi_eeprom_readw(iobase, type, addr + 6);
194 devpriv->s_EeParameters.i_NbrDiChannel = tmp;
762 195
763 /********************************************************************/ 196 /* Interruptible or not */
197 tmp = addi_eeprom_readw(iobase, type, addr + 8);
198 tmp = (tmp >> 7) & 0x01;
764 199
765 /* Toggle EEPROM's Chip select to get it out of Shift Register Mode */ 200 /* How many interruptible logic */
201 tmp = addi_eeprom_readw(iobase, type, addr + 10);
202}
766 203
767 /********************************************************************/ 204static void addi_eeprom_read_do_info(struct comedi_device *dev,
205 unsigned long iobase,
206 unsigned short addr)
207{
208 const struct addi_board *this_board = comedi_board(dev);
209 struct addi_private *devpriv = dev->private;
210 char *type = this_board->pc_EepromChip;
211 unsigned short tmp;
768 212
769 outl(dw_RegisterValue, dw_Address); 213 /* Number of channels */
214 tmp = addi_eeprom_readw(iobase, type, addr + 6);
215 devpriv->s_EeParameters.i_NbrDoChannel = tmp;
770 216
771 /***************/ 217 devpriv->s_EeParameters.i_DoMaxdata = 0xffffffff >> (32 - tmp);
218}
772 219
773 /* Wait 0.1 ms */ 220static void addi_eeprom_read_timer_info(struct comedi_device *dev,
221 unsigned long iobase,
222 unsigned short addr)
223{
224 struct addi_private *devpriv = dev->private;
225#if 0
226 const struct addi_board *this_board = comedi_board(dev);
227 char *type = this_board->pc_EepromChip;
228 unsigned short offset = 0;
229 unsigned short ntimers;
230 unsigned short tmp;
231 int i;
232
233 /* Number of Timers */
234 ntimers = addi_eeprom_readw(iobase, type, addr + 6);
235
236 /* Read header size */
237 for (i = 0; i < ntimers; i++) {
238 unsigned short size;
239 unsigned short res;
240 unsigned short mode;
241 unsigned short min_timing;
242 unsigned short timebase;
243
244 size = addi_eeprom_readw(iobase, type, addr + 8 + offset + 0);
245
246 /* Resolution / Mode */
247 tmp = addi_eeprom_readw(iobase, type, addr + 8 + offset + 2);
248 res = (tmp >> 10) & 0x3f;
249 mode = (tmp >> 4) & 0x3f;
250
251 /* MinTiming / Timebase */
252 tmp = addi_eeprom_readw(iobase, type, addr + 8 + offset + 4);
253 min_timing = (tmp >> 6) & 0x3ff;
254 Timebase = tmp & 0x3f;
255
256 offset += size;
257 }
258#endif
259 /* Timer subdevice present */
260 devpriv->s_EeParameters.i_Timer = 1;
261}
774 262
775 /***************/ 263static void addi_eeprom_read_ao_info(struct comedi_device *dev,
264 unsigned long iobase,
265 unsigned short addr)
266{
267 const struct addi_board *this_board = comedi_board(dev);
268 struct addi_private *devpriv = dev->private;
269 char *type = this_board->pc_EepromChip;
270 unsigned short tmp;
271
272 /* No of channels for 1st hard component */
273 tmp = addi_eeprom_readw(iobase, type, addr + 10);
274 devpriv->s_EeParameters.i_NbrAoChannel = (tmp >> 4) & 0x3ff;
275
276 /* Resolution for 1st hard component */
277 tmp = addi_eeprom_readw(iobase, type, addr + 16);
278 tmp = (tmp >> 8) & 0xff;
279 devpriv->s_EeParameters.i_AoMaxdata = 0xfff >> (16 - tmp);
280}
776 281
777 udelay(100); 282static void addi_eeprom_read_ai_info(struct comedi_device *dev,
283 unsigned long iobase,
284 unsigned short addr)
285{
286 const struct addi_board *this_board = comedi_board(dev);
287 struct addi_private *devpriv = dev->private;
288 char *type = this_board->pc_EepromChip;
289 unsigned short offset;
290 unsigned short tmp;
291
292 /* No of channels for 1st hard component */
293 tmp = addi_eeprom_readw(iobase, type, addr + 10);
294 devpriv->s_EeParameters.i_NbrAiChannel = (tmp >> 4) & 0x3ff;
295 if (!strcmp(this_board->pc_DriverName, "apci3200"))
296 devpriv->s_EeParameters.i_NbrAiChannel *= 4;
297
298 tmp = addi_eeprom_readw(iobase, type, addr + 16);
299 devpriv->s_EeParameters.ui_MinAcquisitiontimeNs = tmp * 1000;
300
301 tmp = addi_eeprom_readw(iobase, type, addr + 30);
302 devpriv->s_EeParameters.ui_MinDelaytimeNs = tmp * 1000;
303
304 tmp = addi_eeprom_readw(iobase, type, addr + 20);
305 devpriv->s_EeParameters.i_Dma = (tmp >> 13) & 0x01;
306
307 tmp = addi_eeprom_readw(iobase, type, addr + 72) & 0xff;
308 if (tmp) { /* > 0 */
309 /* offset of first analog input single header */
310 offset = 74 + (2 * tmp) + (10 * (1 + (tmp / 16)));
311 } else { /* = 0 */
312 offset = 74;
313 }
778 314
315 /* Resolution */
316 tmp = addi_eeprom_readw(iobase, type, addr + offset + 2) & 0x1f;
317 devpriv->s_EeParameters.i_AiMaxdata = 0xffff >> (16 - tmp);
779} 318}
780 319
781 /******************************************/ 320static void addi_eeprom_read_info(struct comedi_device *dev,
782 /* EEPROM HEADER READ FUNCTIONS */ 321 unsigned long iobase)
783 /******************************************/
784
785/*
786+----------------------------------------------------------------------------+
787| Function Name : int i_EepromReadMainHeader(unsigned short w_PCIBoardEepromAddress, |
788| char * pc_PCIChipInformation,struct comedi_device *dev) |
789+----------------------------------------------------------------------------+
790| Task : Read from eeprom Main Header |
791+----------------------------------------------------------------------------+
792| Input Parameters : unsigned short w_PCIBoardEepromAddress : PCI eeprom address |
793| |
794| char *pc_PCIChipInformation : PCI Chip Type. |
795| |
796| struct comedi_device *dev : comedi device structure |
797| pointer |
798+----------------------------------------------------------------------------+
799| Output Parameters : - |
800+----------------------------------------------------------------------------+
801| Return Value : 0 |
802+----------------------------------------------------------------------------+
803*/
804
805int i_EepromReadMainHeader(unsigned short w_PCIBoardEepromAddress,
806 char *pc_PCIChipInformation, struct comedi_device *dev)
807{ 322{
808 unsigned short w_Temp, i, w_Count = 0; 323 const struct addi_board *this_board = comedi_board(dev);
809 unsigned int ui_Temp; 324 char *type = this_board->pc_EepromChip;
810 struct str_MainHeader s_MainHeader; 325 unsigned short size;
811 struct str_DigitalInputHeader s_DigitalInputHeader; 326 unsigned char nfuncs;
812 struct str_DigitalOutputHeader s_DigitalOutputHeader; 327 int i;
813 /* struct str_TimerMainHeader s_TimerMainHeader,s_WatchdogMainHeader; */ 328
814 struct str_AnalogOutputHeader s_AnalogOutputHeader; 329 size = addi_eeprom_readw(iobase, type, 8);
815 struct str_AnalogInputHeader s_AnalogInputHeader; 330 nfuncs = addi_eeprom_readw(iobase, type, 10) & 0xff;
816
817 /* Read size */
818 s_MainHeader.w_HeaderSize =
819 w_EepromReadWord(w_PCIBoardEepromAddress, pc_PCIChipInformation,
820 0x100 + 8);
821
822 /* Read nbr of functionality */
823 w_Temp = w_EepromReadWord(w_PCIBoardEepromAddress,
824 pc_PCIChipInformation, 0x100 + 10);
825 s_MainHeader.b_Nfunctions = (unsigned char) w_Temp & 0x00FF;
826 331
827 /* Read functionality details */ 332 /* Read functionality details */
828 for (i = 0; i < s_MainHeader.b_Nfunctions; i++) { 333 for (i = 0; i < nfuncs; i++) {
829 /* Read Type */ 334 unsigned short offset = i * 4;
830 w_Temp = w_EepromReadWord(w_PCIBoardEepromAddress, 335 unsigned short addr;
831 pc_PCIChipInformation, 0x100 + 12 + w_Count); 336 unsigned char func;
832 s_MainHeader.s_Functions[i].b_Type = (unsigned char) w_Temp & 0x3F;
833 w_Count = w_Count + 2;
834 /* Read Address */
835 s_MainHeader.s_Functions[i].w_Address =
836 w_EepromReadWord(w_PCIBoardEepromAddress,
837 pc_PCIChipInformation, 0x100 + 12 + w_Count);
838 w_Count = w_Count + 2;
839 }
840 337
841 /* Display main header info */ 338 func = addi_eeprom_readw(iobase, type, 12 + offset) & 0x3f;
842 for (i = 0; i < s_MainHeader.b_Nfunctions; i++) { 339 addr = addi_eeprom_readw(iobase, type, 14 + offset);
843 340
844 switch (s_MainHeader.s_Functions[i].b_Type) { 341 switch (func) {
845 case EEPROM_DIGITALINPUT: 342 case EEPROM_DIGITALINPUT:
846 i_EepromReadDigitalInputHeader(w_PCIBoardEepromAddress, 343 addi_eeprom_read_di_info(dev, iobase, addr);
847 pc_PCIChipInformation,
848 s_MainHeader.s_Functions[i].w_Address,
849 &s_DigitalInputHeader);
850 devpriv->s_EeParameters.i_NbrDiChannel =
851 s_DigitalInputHeader.w_Nchannel;
852 break; 344 break;
853 345
854 case EEPROM_DIGITALOUTPUT: 346 case EEPROM_DIGITALOUTPUT:
855 i_EepromReadDigitalOutputHeader(w_PCIBoardEepromAddress, 347 addi_eeprom_read_do_info(dev, iobase, addr);
856 pc_PCIChipInformation,
857 s_MainHeader.s_Functions[i].w_Address,
858 &s_DigitalOutputHeader);
859 devpriv->s_EeParameters.i_NbrDoChannel =
860 s_DigitalOutputHeader.w_Nchannel;
861 ui_Temp = 0xffffffff;
862 devpriv->s_EeParameters.i_DoMaxdata =
863 ui_Temp >> (32 -
864 devpriv->s_EeParameters.i_NbrDoChannel);
865 break; 348 break;
866 349
867 case EEPROM_ANALOGINPUT: 350 case EEPROM_ANALOGINPUT:
868 i_EepromReadAnlogInputHeader(w_PCIBoardEepromAddress, 351 addi_eeprom_read_ai_info(dev, iobase, addr);
869 pc_PCIChipInformation,
870 s_MainHeader.s_Functions[i].w_Address,
871 &s_AnalogInputHeader);
872 if (!(strcmp(this_board->pc_DriverName, "apci3200")))
873 devpriv->s_EeParameters.i_NbrAiChannel =
874 s_AnalogInputHeader.w_Nchannel * 4;
875 else
876 devpriv->s_EeParameters.i_NbrAiChannel =
877 s_AnalogInputHeader.w_Nchannel;
878 devpriv->s_EeParameters.i_Dma =
879 s_AnalogInputHeader.b_HasDma;
880 devpriv->s_EeParameters.ui_MinAcquisitiontimeNs =
881 (unsigned int) s_AnalogInputHeader.w_MinConvertTiming *
882 1000;
883 devpriv->s_EeParameters.ui_MinDelaytimeNs =
884 (unsigned int) s_AnalogInputHeader.w_MinDelayTiming *
885 1000;
886 ui_Temp = 0xffff;
887 devpriv->s_EeParameters.i_AiMaxdata =
888 ui_Temp >> (16 -
889 s_AnalogInputHeader.b_Resolution);
890 break; 352 break;
891 353
892 case EEPROM_ANALOGOUTPUT: 354 case EEPROM_ANALOGOUTPUT:
893 i_EepromReadAnlogOutputHeader(w_PCIBoardEepromAddress, 355 addi_eeprom_read_ao_info(dev, iobase, addr);
894 pc_PCIChipInformation,
895 s_MainHeader.s_Functions[i].w_Address,
896 &s_AnalogOutputHeader);
897 devpriv->s_EeParameters.i_NbrAoChannel =
898 s_AnalogOutputHeader.w_Nchannel;
899 ui_Temp = 0xffff;
900 devpriv->s_EeParameters.i_AoMaxdata =
901 ui_Temp >> (16 -
902 s_AnalogOutputHeader.b_Resolution);
903 break; 356 break;
904 357
905 case EEPROM_TIMER: 358 case EEPROM_TIMER:
906 /* Timer subdevice present */
907 devpriv->s_EeParameters.i_Timer = 1;
908 break;
909
910 case EEPROM_WATCHDOG: 359 case EEPROM_WATCHDOG:
911 /* Timer subdevice present */
912 devpriv->s_EeParameters.i_Timer = 1;
913 break;
914
915 case EEPROM_TIMER_WATCHDOG_COUNTER: 360 case EEPROM_TIMER_WATCHDOG_COUNTER:
916 /* Timer subdevice present */ 361 addi_eeprom_read_timer_info(dev, iobase, addr);
917 devpriv->s_EeParameters.i_Timer = 1;
918 break; 362 break;
919 } 363 }
920 } 364 }
921
922 return 0;
923}
924
925/*
926+----------------------------------------------------------------------------+
927| Function Name : int i_EepromReadDigitalInputHeader(unsigned short |
928| w_PCIBoardEepromAddress,char *pc_PCIChipInformation, |
929| unsigned short w_Address,struct str_DigitalInputHeader *s_Header) |
930| |
931+----------------------------------------------------------------------------+
932| Task : Read Digital Input Header |
933+----------------------------------------------------------------------------+
934| Input Parameters : unsigned short w_PCIBoardEepromAddress : PCI eeprom address |
935| |
936| char *pc_PCIChipInformation : PCI Chip Type. |
937| |
938| struct str_DigitalInputHeader *s_Header: Digita Input Header |
939| Pointer |
940+----------------------------------------------------------------------------+
941| Output Parameters : - |
942+----------------------------------------------------------------------------+
943| Return Value : 0 |
944+----------------------------------------------------------------------------+
945*/
946int i_EepromReadDigitalInputHeader(unsigned short w_PCIBoardEepromAddress,
947 char *pc_PCIChipInformation, unsigned short w_Address,
948 struct str_DigitalInputHeader *s_Header)
949{
950 unsigned short w_Temp;
951
952 /* read nbr of channels */
953 s_Header->w_Nchannel =
954 w_EepromReadWord(w_PCIBoardEepromAddress, pc_PCIChipInformation,
955 0x100 + w_Address + 6);
956
957 /* interruptible or not */
958 w_Temp = w_EepromReadWord(w_PCIBoardEepromAddress,
959 pc_PCIChipInformation, 0x100 + w_Address + 8);
960 s_Header->b_Interruptible = (unsigned char) (w_Temp >> 7) & 0x01;
961
962/* How many interruptible logic */
963 s_Header->w_NinterruptLogic =
964 w_EepromReadWord(w_PCIBoardEepromAddress, pc_PCIChipInformation,
965 0x100 + w_Address + 10);
966
967 return 0;
968}
969
970/*
971+----------------------------------------------------------------------------+
972| Function Name : int i_EepromReadDigitalOutputHeader(unsigned short |
973| w_PCIBoardEepromAddress,char *pc_PCIChipInformation, |
974| unsigned short w_Address,struct str_DigitalOutputHeader *s_Header) |
975| |
976+----------------------------------------------------------------------------+
977| Task : Read Digital Output Header |
978+----------------------------------------------------------------------------+
979| Input Parameters : unsigned short w_PCIBoardEepromAddress : PCI eeprom address |
980| |
981| char *pc_PCIChipInformation : PCI Chip Type. |
982| |
983| struct str_DigitalOutputHeader *s_Header: Digital Output Header|
984| Pointer |
985+----------------------------------------------------------------------------+
986| Output Parameters : - |
987+----------------------------------------------------------------------------+
988| Return Value : 0 |
989+----------------------------------------------------------------------------+
990*/
991int i_EepromReadDigitalOutputHeader(unsigned short w_PCIBoardEepromAddress,
992 char *pc_PCIChipInformation, unsigned short w_Address,
993 struct str_DigitalOutputHeader *s_Header)
994{
995/* Read Nbr channels */
996 s_Header->w_Nchannel =
997 w_EepromReadWord(w_PCIBoardEepromAddress, pc_PCIChipInformation,
998 0x100 + w_Address + 6);
999 return 0;
1000}
1001
1002/*
1003+----------------------------------------------------------------------------+
1004| Function Name : int i_EepromReadTimerHeader(unsigned short w_PCIBoardEepromAddress, |
1005| char *pc_PCIChipInformation,WORD w_Address, |
1006| struct str_TimerMainHeader *s_Header) |
1007+----------------------------------------------------------------------------+
1008| Task : Read Timer or Watchdog Header |
1009+----------------------------------------------------------------------------+
1010| Input Parameters : unsigned short w_PCIBoardEepromAddress : PCI eeprom address |
1011| |
1012| char *pc_PCIChipInformation : PCI Chip Type. |
1013| |
1014| struct str_TimerMainHeader *s_Header: Timer Header |
1015| Pointer |
1016+----------------------------------------------------------------------------+
1017| Output Parameters : - |
1018+----------------------------------------------------------------------------+
1019| Return Value : 0 |
1020+----------------------------------------------------------------------------+
1021*/
1022int i_EepromReadTimerHeader(unsigned short w_PCIBoardEepromAddress,
1023 char *pc_PCIChipInformation, unsigned short w_Address,
1024 struct str_TimerMainHeader *s_Header)
1025{
1026
1027 unsigned short i, w_Size = 0, w_Temp;
1028
1029/* Read No of Timer */
1030 s_Header->w_Ntimer =
1031 w_EepromReadWord(w_PCIBoardEepromAddress, pc_PCIChipInformation,
1032 0x100 + w_Address + 6);
1033/* Read header size */
1034
1035 for (i = 0; i < s_Header->w_Ntimer; i++) {
1036 s_Header->s_TimerDetails[i].w_HeaderSize =
1037 w_EepromReadWord(w_PCIBoardEepromAddress,
1038 pc_PCIChipInformation,
1039 0x100 + w_Address + 8 + w_Size + 0);
1040 w_Temp = w_EepromReadWord(w_PCIBoardEepromAddress,
1041 pc_PCIChipInformation,
1042 0x100 + w_Address + 8 + w_Size + 2);
1043
1044 /* Read Resolution */
1045 s_Header->s_TimerDetails[i].b_Resolution =
1046 (unsigned char) (w_Temp >> 10) & 0x3F;
1047
1048 /* Read Mode */
1049 s_Header->s_TimerDetails[i].b_Mode =
1050 (unsigned char) (w_Temp >> 4) & 0x3F;
1051
1052 w_Temp = w_EepromReadWord(w_PCIBoardEepromAddress,
1053 pc_PCIChipInformation,
1054 0x100 + w_Address + 8 + w_Size + 4);
1055
1056 /* Read MinTiming */
1057 s_Header->s_TimerDetails[i].w_MinTiming = (w_Temp >> 6) & 0x3FF;
1058
1059 /* Read Timebase */
1060 s_Header->s_TimerDetails[i].b_TimeBase = (unsigned char) (w_Temp) & 0x3F;
1061 w_Size += s_Header->s_TimerDetails[i].w_HeaderSize;
1062 }
1063
1064 return 0;
1065}
1066
1067/*
1068+----------------------------------------------------------------------------+
1069| Function Name : int i_EepromReadAnlogOutputHeader(unsigned short |
1070| w_PCIBoardEepromAddress,char *pc_PCIChipInformation, |
1071| unsigned short w_Address,str_AnalogOutputHeader *s_Header) |
1072+----------------------------------------------------------------------------+
1073| Task : Read Nalog Output Header |
1074+----------------------------------------------------------------------------+
1075| Input Parameters : unsigned short w_PCIBoardEepromAddress : PCI eeprom address |
1076| |
1077| char *pc_PCIChipInformation : PCI Chip Type. |
1078| |
1079| str_AnalogOutputHeader *s_Header:Anlog Output Header |
1080| Pointer |
1081+----------------------------------------------------------------------------+
1082| Output Parameters : - |
1083+----------------------------------------------------------------------------+
1084| Return Value : 0 |
1085+----------------------------------------------------------------------------+
1086*/
1087
1088int i_EepromReadAnlogOutputHeader(unsigned short w_PCIBoardEepromAddress,
1089 char *pc_PCIChipInformation, unsigned short w_Address,
1090 struct str_AnalogOutputHeader *s_Header)
1091{
1092 unsigned short w_Temp;
1093 /* No of channels for 1st hard component */
1094 w_Temp = w_EepromReadWord(w_PCIBoardEepromAddress,
1095 pc_PCIChipInformation, 0x100 + w_Address + 10);
1096 s_Header->w_Nchannel = (w_Temp >> 4) & 0x03FF;
1097 /* Resolution for 1st hard component */
1098 w_Temp = w_EepromReadWord(w_PCIBoardEepromAddress,
1099 pc_PCIChipInformation, 0x100 + w_Address + 16);
1100 s_Header->b_Resolution = (unsigned char) (w_Temp >> 8) & 0xFF;
1101 return 0;
1102}
1103
1104/*
1105+----------------------------------------------------------------------------+
1106| Function Name : int i_EepromReadAnlogInputHeader(unsigned short |
1107| w_PCIBoardEepromAddress,char *pc_PCIChipInformation, |
1108| unsigned short w_Address,struct str_AnalogInputHeader *s_Header) |
1109+----------------------------------------------------------------------------+
1110| Task : Read Nalog Output Header |
1111+----------------------------------------------------------------------------+
1112| Input Parameters : unsigned short w_PCIBoardEepromAddress : PCI eeprom address |
1113| |
1114| char *pc_PCIChipInformation : PCI Chip Type. |
1115| |
1116| struct str_AnalogInputHeader *s_Header:Anlog Input Header |
1117| Pointer |
1118+----------------------------------------------------------------------------+
1119| Output Parameters : - |
1120+----------------------------------------------------------------------------+
1121| Return Value : 0 |
1122+----------------------------------------------------------------------------+
1123*/
1124
1125/* Reads only for ONE hardware component */
1126int i_EepromReadAnlogInputHeader(unsigned short w_PCIBoardEepromAddress,
1127 char *pc_PCIChipInformation, unsigned short w_Address,
1128 struct str_AnalogInputHeader *s_Header)
1129{
1130 unsigned short w_Temp, w_Offset;
1131 w_Temp = w_EepromReadWord(w_PCIBoardEepromAddress,
1132 pc_PCIChipInformation, 0x100 + w_Address + 10);
1133 s_Header->w_Nchannel = (w_Temp >> 4) & 0x03FF;
1134 s_Header->w_MinConvertTiming =
1135 w_EepromReadWord(w_PCIBoardEepromAddress, pc_PCIChipInformation,
1136 0x100 + w_Address + 16);
1137 s_Header->w_MinDelayTiming =
1138 w_EepromReadWord(w_PCIBoardEepromAddress, pc_PCIChipInformation,
1139 0x100 + w_Address + 30);
1140 w_Temp = w_EepromReadWord(w_PCIBoardEepromAddress,
1141 pc_PCIChipInformation, 0x100 + w_Address + 20);
1142 s_Header->b_HasDma = (w_Temp >> 13) & 0x01; /* whether dma present or not */
1143
1144 w_Temp = w_EepromReadWord(w_PCIBoardEepromAddress, pc_PCIChipInformation, 0x100 + w_Address + 72); /* reading Y */
1145 w_Temp = w_Temp & 0x00FF;
1146 if (w_Temp) /* Y>0 */
1147 {
1148 w_Offset = 74 + (2 * w_Temp) + (10 * (1 + (w_Temp / 16))); /* offset of first analog input single header */
1149 w_Offset = w_Offset + 2; /* resolution */
1150 } else /* Y=0 */
1151 {
1152 w_Offset = 74;
1153 w_Offset = w_Offset + 2; /* resolution */
1154 }
1155
1156/* read Resolution */
1157 w_Temp = w_EepromReadWord(w_PCIBoardEepromAddress,
1158 pc_PCIChipInformation, 0x100 + w_Address + w_Offset);
1159 s_Header->b_Resolution = w_Temp & 0x001F; /* last 5 bits */
1160
1161 return 0;
1162} 365}
diff --git a/drivers/staging/comedi/drivers/addi-data/hwdrv_APCI1710.c b/drivers/staging/comedi/drivers/addi-data/hwdrv_APCI1710.c
index f9a8937be8ed..b05f8505c894 100644
--- a/drivers/staging/comedi/drivers/addi-data/hwdrv_APCI1710.c
+++ b/drivers/staging/comedi/drivers/addi-data/hwdrv_APCI1710.c
@@ -44,7 +44,35 @@ You should also find the complete GPL in the COPYING file accompanying this sour
44 | | | | 44 | | | |
45 +----------+-----------+------------------------------------------------+ 45 +----------+-----------+------------------------------------------------+
46*/ 46*/
47#include "hwdrv_APCI1710.h" 47
48#define COMEDI_SUBD_TTLIO 11 /* Digital Input Output But TTL */
49#define COMEDI_SUBD_PWM 12 /* Pulse width Measurement */
50#define COMEDI_SUBD_SSI 13 /* Synchronous serial interface */
51#define COMEDI_SUBD_TOR 14 /* Tor counter */
52#define COMEDI_SUBD_CHRONO 15 /* Chrono meter */
53#define COMEDI_SUBD_PULSEENCODER 16 /* Pulse Encoder INP CPT */
54#define COMEDI_SUBD_INCREMENTALCOUNTER 17 /* Incremental Counter */
55
56#define APCI1710_BOARD_NAME "apci1710"
57#define APCI1710_BOARD_DEVICE_ID 0x818F
58#define APCI1710_ADDRESS_RANGE 256
59#define APCI1710_CONFIG_ADDRESS_RANGE 8
60#define APCI1710_INCREMENTAL_COUNTER 0x53430000UL
61#define APCI1710_SSI_COUNTER 0x53490000UL
62#define APCI1710_TTL_IO 0x544C0000UL
63#define APCI1710_DIGITAL_IO 0x44490000UL
64#define APCI1710_82X54_TIMER 0x49430000UL
65#define APCI1710_CHRONOMETER 0x43480000UL
66#define APCI1710_PULSE_ENCODER 0x495A0000UL
67#define APCI1710_TOR_COUNTER 0x544F0000UL
68#define APCI1710_PWM 0x50570000UL
69#define APCI1710_ETM 0x45540000UL
70#define APCI1710_CDA 0x43440000UL
71#define APCI1710_DISABLE 0
72#define APCI1710_ENABLE 1
73#define APCI1710_SYNCHRONOUS_MODE 1
74#define APCI1710_ASYNCHRONOUS_MODE 0
75
48#include "APCI1710_Inp_cpt.c" 76#include "APCI1710_Inp_cpt.c"
49 77
50#include "APCI1710_Ssi.c" 78#include "APCI1710_Ssi.c"
@@ -56,7 +84,34 @@ You should also find the complete GPL in the COPYING file accompanying this sour
56#include "APCI1710_Pwm.c" 84#include "APCI1710_Pwm.c"
57#include "APCI1710_INCCPT.c" 85#include "APCI1710_INCCPT.c"
58 86
59void i_ADDI_AttachPCI1710(struct comedi_device *dev) 87static const struct comedi_lrange range_apci1710_ttl = {
88 4, {
89 BIP_RANGE(10),
90 BIP_RANGE(5),
91 BIP_RANGE(2),
92 BIP_RANGE(1)
93 }
94};
95
96static const struct comedi_lrange range_apci1710_ssi = {
97 4, {
98 BIP_RANGE(10),
99 BIP_RANGE(5),
100 BIP_RANGE(2),
101 BIP_RANGE(1)
102 }
103};
104
105static const struct comedi_lrange range_apci1710_inccpt = {
106 4, {
107 BIP_RANGE(10),
108 BIP_RANGE(5),
109 BIP_RANGE(2),
110 BIP_RANGE(1)
111 }
112};
113
114static void i_ADDI_AttachPCI1710(struct comedi_device *dev)
60{ 115{
61 struct comedi_subdevice *s; 116 struct comedi_subdevice *s;
62 int ret = 0; 117 int ret = 0;
@@ -195,12 +250,9 @@ void i_ADDI_AttachPCI1710(struct comedi_device *dev)
195 s->insn_bits = i_APCI1710_InsnBitsINCCPT; 250 s->insn_bits = i_APCI1710_InsnBitsINCCPT;
196} 251}
197 252
198int i_APCI1710_Reset(struct comedi_device *dev); 253static int i_APCI1710_Reset(struct comedi_device *dev)
199void v_APCI1710_Interrupt(int irq, void *d);
200/* for 1710 */
201
202int i_APCI1710_Reset(struct comedi_device *dev)
203{ 254{
255 struct addi_private *devpriv = dev->private;
204 int ret; 256 int ret;
205 unsigned int dw_Dummy; 257 unsigned int dw_Dummy;
206 258
@@ -247,9 +299,10 @@ int i_APCI1710_Reset(struct comedi_device *dev)
247+----------------------------------------------------------------------------+ 299+----------------------------------------------------------------------------+
248*/ 300*/
249 301
250void v_APCI1710_Interrupt(int irq, void *d) 302static void v_APCI1710_Interrupt(int irq, void *d)
251{ 303{
252 struct comedi_device *dev = d; 304 struct comedi_device *dev = d;
305 struct addi_private *devpriv = dev->private;
253 unsigned char b_ModuleCpt = 0; 306 unsigned char b_ModuleCpt = 0;
254 unsigned char b_InterruptFlag = 0; 307 unsigned char b_InterruptFlag = 0;
255 unsigned char b_PWMCpt = 0; 308 unsigned char b_PWMCpt = 0;
diff --git a/drivers/staging/comedi/drivers/addi-data/hwdrv_APCI1710.h b/drivers/staging/comedi/drivers/addi-data/hwdrv_APCI1710.h
deleted file mode 100644
index 89c99eb5228d..000000000000
--- a/drivers/staging/comedi/drivers/addi-data/hwdrv_APCI1710.h
+++ /dev/null
@@ -1,71 +0,0 @@
1/*
2 * Copyright (C) 2004,2005 ADDI-DATA GmbH for the source code of this module.
3 *
4 * ADDI-DATA GmbH
5 * Dieselstrasse 3
6 * D-77833 Ottersweier
7 * Tel: +19(0)7223/9493-0
8 * Fax: +49(0)7223/9493-92
9 * http://www.addi-data.com
10 * info@addi-data.com
11 *
12 * This program is free software; you can redistribute it and/or modify it
13 * under the terms of the GNU General Public License as published by the Free
14 * Software Foundation; either version 2 of the License, or (at your option)
15 * any later version.
16 */
17
18#define COMEDI_SUBD_TTLIO 11 /* Digital Input Output But TTL */
19#define COMEDI_SUBD_PWM 12 /* Pulse width Measurement */
20#define COMEDI_SUBD_SSI 13 /* Synchronous serial interface */
21#define COMEDI_SUBD_TOR 14 /* Tor counter */
22#define COMEDI_SUBD_CHRONO 15 /* Chrono meter */
23#define COMEDI_SUBD_PULSEENCODER 16 /* Pulse Encoder INP CPT */
24#define COMEDI_SUBD_INCREMENTALCOUNTER 17 /* Incremental Counter */
25
26#define APCI1710_BOARD_NAME "apci1710"
27#define APCI1710_BOARD_VENDOR_ID 0x10E8
28#define APCI1710_BOARD_DEVICE_ID 0x818F
29#define APCI1710_ADDRESS_RANGE 256
30#define APCI1710_CONFIG_ADDRESS_RANGE 8
31#define APCI1710_INCREMENTAL_COUNTER 0x53430000UL
32#define APCI1710_SSI_COUNTER 0x53490000UL
33#define APCI1710_TTL_IO 0x544C0000UL
34#define APCI1710_DIGITAL_IO 0x44490000UL
35#define APCI1710_82X54_TIMER 0x49430000UL
36#define APCI1710_CHRONOMETER 0x43480000UL
37#define APCI1710_PULSE_ENCODER 0x495A0000UL
38#define APCI1710_TOR_COUNTER 0x544F0000UL
39#define APCI1710_PWM 0x50570000UL
40#define APCI1710_ETM 0x45540000UL
41#define APCI1710_CDA 0x43440000UL
42#define APCI1710_DISABLE 0
43#define APCI1710_ENABLE 1
44#define APCI1710_SYNCHRONOUS_MODE 1
45#define APCI1710_ASYNCHRONOUS_MODE 0
46
47/* MODULE INFO STRUCTURE */
48
49static const struct comedi_lrange range_apci1710_ttl = { 4, {
50 BIP_RANGE(10),
51 BIP_RANGE(5),
52 BIP_RANGE(2),
53 BIP_RANGE(1)
54 }
55};
56
57static const struct comedi_lrange range_apci1710_ssi = { 4, {
58 BIP_RANGE(10),
59 BIP_RANGE(5),
60 BIP_RANGE(2),
61 BIP_RANGE(1)
62 }
63};
64
65static const struct comedi_lrange range_apci1710_inccpt = { 4, {
66 BIP_RANGE(10),
67 BIP_RANGE(5),
68 BIP_RANGE(2),
69 BIP_RANGE(1)
70 }
71};
diff --git a/drivers/staging/comedi/drivers/addi-data/hwdrv_apci035.c b/drivers/staging/comedi/drivers/addi-data/hwdrv_apci035.c
index 5997b2f504ad..3d66e48e0cf7 100644
--- a/drivers/staging/comedi/drivers/addi-data/hwdrv_apci035.c
+++ b/drivers/staging/comedi/drivers/addi-data/hwdrv_apci035.c
@@ -46,12 +46,70 @@ You should also find the complete GPL in the COPYING file accompanying this sour
46 +----------+-----------+------------------------------------------------+ 46 +----------+-----------+------------------------------------------------+
47*/ 47*/
48 48
49/* 49/* Card Specific information */
50+----------------------------------------------------------------------------+ 50#define APCI035_ADDRESS_RANGE 255
51| Included files | 51
52+----------------------------------------------------------------------------+ 52/* Timer / Watchdog Related Defines */
53*/ 53#define APCI035_TCW_SYNC_ENABLEDISABLE 0
54#include "hwdrv_apci035.h" 54#define APCI035_TCW_RELOAD_VALUE 4
55#define APCI035_TCW_TIMEBASE 8
56#define APCI035_TCW_PROG 12
57#define APCI035_TCW_TRIG_STATUS 16
58#define APCI035_TCW_IRQ 20
59#define APCI035_TCW_WARN_TIMEVAL 24
60#define APCI035_TCW_WARN_TIMEBASE 28
61
62#define ADDIDATA_TIMER 0
63/* #define ADDIDATA_WATCHDOG 1 */
64
65#define APCI035_TW1 0
66#define APCI035_TW2 32
67#define APCI035_TW3 64
68#define APCI035_TW4 96
69
70#define APCI035_AI_OFFSET 0
71#define APCI035_TEMP 128
72#define APCI035_ALR_SEQ 4
73#define APCI035_START_STOP_INDEX 8
74#define APCI035_ALR_START_STOP 12
75#define APCI035_ALR_IRQ 16
76#define APCI035_EOS 20
77#define APCI035_CHAN_NO 24
78#define APCI035_CHAN_VAL 28
79#define APCI035_CONV_TIME_TIME_BASE 36
80#define APCI035_RELOAD_CONV_TIME_VAL 32
81#define APCI035_DELAY_TIME_TIME_BASE 44
82#define APCI035_RELOAD_DELAY_TIME_VAL 40
83#define ENABLE_EXT_TRIG 1
84#define ENABLE_EXT_GATE 2
85#define ENABLE_EXT_TRIG_GATE 3
86
87#define ANALOG_INPUT 0
88#define TEMPERATURE 1
89#define RESISTANCE 2
90
91#define ADDIDATA_GREATER_THAN_TEST 0
92#define ADDIDATA_LESS_THAN_TEST 1
93
94#define APCI035_MAXVOLT 2.5
95
96#define ADDIDATA_UNIPOLAR 1
97#define ADDIDATA_BIPOLAR 2
98
99/* ANALOG INPUT RANGE */
100static struct comedi_lrange range_apci035_ai = {
101 8, {
102 BIP_RANGE(10),
103 BIP_RANGE(5),
104 BIP_RANGE(2),
105 BIP_RANGE(1),
106 UNI_RANGE(10),
107 UNI_RANGE(5),
108 UNI_RANGE(2),
109 UNI_RANGE(1)
110 }
111};
112
55static int i_WatchdogNbr = 0; 113static int i_WatchdogNbr = 0;
56static int i_Temp = 0; 114static int i_Temp = 0;
57static int i_Flag = 1; 115static int i_Flag = 1;
@@ -109,12 +167,16 @@ static int i_Flag = 1;
109| | 167| |
110+----------------------------------------------------------------------------+ 168+----------------------------------------------------------------------------+
111*/ 169*/
112int i_APCI035_ConfigTimerWatchdog(struct comedi_device *dev, struct comedi_subdevice *s, 170static int i_APCI035_ConfigTimerWatchdog(struct comedi_device *dev,
113 struct comedi_insn *insn, unsigned int *data) 171 struct comedi_subdevice *s,
172 struct comedi_insn *insn,
173 unsigned int *data)
114{ 174{
175 struct addi_private *devpriv = dev->private;
115 unsigned int ui_Status = 0; 176 unsigned int ui_Status = 0;
116 unsigned int ui_Command = 0; 177 unsigned int ui_Command = 0;
117 unsigned int ui_Mode = 0; 178 unsigned int ui_Mode = 0;
179
118 i_Temp = 0; 180 i_Temp = 0;
119 devpriv->tsk_Current = current; 181 devpriv->tsk_Current = current;
120 devpriv->b_TimerSelectMode = data[0]; 182 devpriv->b_TimerSelectMode = data[0];
@@ -278,11 +340,15 @@ int i_APCI035_ConfigTimerWatchdog(struct comedi_device *dev, struct comedi_subde
278| | 340| |
279+----------------------------------------------------------------------------+ 341+----------------------------------------------------------------------------+
280*/ 342*/
281int i_APCI035_StartStopWriteTimerWatchdog(struct comedi_device *dev, 343static int i_APCI035_StartStopWriteTimerWatchdog(struct comedi_device *dev,
282 struct comedi_subdevice *s, struct comedi_insn *insn, unsigned int *data) 344 struct comedi_subdevice *s,
345 struct comedi_insn *insn,
346 unsigned int *data)
283{ 347{
348 struct addi_private *devpriv = dev->private;
284 unsigned int ui_Command = 0; 349 unsigned int ui_Command = 0;
285 int i_Count = 0; 350 int i_Count = 0;
351
286 if (data[0] == 1) { 352 if (data[0] == 1) {
287 ui_Command = 353 ui_Command =
288 inl(devpriv->iobase + ((i_WatchdogNbr - 1) * 32) + 12); 354 inl(devpriv->iobase + ((i_WatchdogNbr - 1) * 32) + 12);
@@ -393,10 +459,14 @@ int i_APCI035_StartStopWriteTimerWatchdog(struct comedi_device *dev,
393| | 459| |
394+----------------------------------------------------------------------------+ 460+----------------------------------------------------------------------------+
395*/ 461*/
396int i_APCI035_ReadTimerWatchdog(struct comedi_device *dev, struct comedi_subdevice *s, 462static int i_APCI035_ReadTimerWatchdog(struct comedi_device *dev,
397 struct comedi_insn *insn, unsigned int *data) 463 struct comedi_subdevice *s,
464 struct comedi_insn *insn,
465 unsigned int *data)
398{ 466{
467 struct addi_private *devpriv = dev->private;
399 unsigned int ui_Status = 0; /* Status register */ 468 unsigned int ui_Status = 0; /* Status register */
469
400 i_WatchdogNbr = insn->unused[0]; 470 i_WatchdogNbr = insn->unused[0];
401 471
402 /******************/ 472 /******************/
@@ -453,9 +523,13 @@ int i_APCI035_ReadTimerWatchdog(struct comedi_device *dev, struct comedi_subdevi
453| | 523| |
454+----------------------------------------------------------------------------+ 524+----------------------------------------------------------------------------+
455*/ 525*/
456int i_APCI035_ConfigAnalogInput(struct comedi_device *dev, struct comedi_subdevice *s, 526static int i_APCI035_ConfigAnalogInput(struct comedi_device *dev,
457 struct comedi_insn *insn, unsigned int *data) 527 struct comedi_subdevice *s,
528 struct comedi_insn *insn,
529 unsigned int *data)
458{ 530{
531 struct addi_private *devpriv = dev->private;
532
459 devpriv->tsk_Current = current; 533 devpriv->tsk_Current = current;
460 outl(0x200 | 0, devpriv->iobase + 128 + 0x4); 534 outl(0x200 | 0, devpriv->iobase + 128 + 0x4);
461 outl(0, devpriv->iobase + 128 + 0); 535 outl(0, devpriv->iobase + 128 + 0);
@@ -490,10 +564,14 @@ int i_APCI035_ConfigAnalogInput(struct comedi_device *dev, struct comedi_subdevi
490| | 564| |
491+----------------------------------------------------------------------------+ 565+----------------------------------------------------------------------------+
492*/ 566*/
493int i_APCI035_ReadAnalogInput(struct comedi_device *dev, struct comedi_subdevice *s, 567static int i_APCI035_ReadAnalogInput(struct comedi_device *dev,
494 struct comedi_insn *insn, unsigned int *data) 568 struct comedi_subdevice *s,
569 struct comedi_insn *insn,
570 unsigned int *data)
495{ 571{
572 struct addi_private *devpriv = dev->private;
496 unsigned int ui_CommandRegister = 0; 573 unsigned int ui_CommandRegister = 0;
574
497/******************/ 575/******************/
498/* Set the start */ 576/* Set the start */
499/******************/ 577/******************/
@@ -525,9 +603,11 @@ int i_APCI035_ReadAnalogInput(struct comedi_device *dev, struct comedi_subdevice
525| | 603| |
526+----------------------------------------------------------------------------+ 604+----------------------------------------------------------------------------+
527*/ 605*/
528int i_APCI035_Reset(struct comedi_device *dev) 606static int i_APCI035_Reset(struct comedi_device *dev)
529{ 607{
608 struct addi_private *devpriv = dev->private;
530 int i_Count = 0; 609 int i_Count = 0;
610
531 for (i_Count = 1; i_Count <= 4; i_Count++) { 611 for (i_Count = 1; i_Count <= 4; i_Count++) {
532 i_WatchdogNbr = i_Count; 612 i_WatchdogNbr = i_Count;
533 outl(0x0, devpriv->iobase + ((i_WatchdogNbr - 1) * 32) + 0); /* stop all timers */ 613 outl(0x0, devpriv->iobase + ((i_WatchdogNbr - 1) * 32) + 0); /* stop all timers */
@@ -557,11 +637,13 @@ int i_APCI035_Reset(struct comedi_device *dev)
557static void v_APCI035_Interrupt(int irq, void *d) 637static void v_APCI035_Interrupt(int irq, void *d)
558{ 638{
559 struct comedi_device *dev = d; 639 struct comedi_device *dev = d;
640 struct addi_private *devpriv = dev->private;
560 unsigned int ui_StatusRegister1 = 0; 641 unsigned int ui_StatusRegister1 = 0;
561 unsigned int ui_StatusRegister2 = 0; 642 unsigned int ui_StatusRegister2 = 0;
562 unsigned int ui_ReadCommand = 0; 643 unsigned int ui_ReadCommand = 0;
563 unsigned int ui_ChannelNumber = 0; 644 unsigned int ui_ChannelNumber = 0;
564 unsigned int ui_DigitalTemperature = 0; 645 unsigned int ui_DigitalTemperature = 0;
646
565 if (i_Temp == 1) { 647 if (i_Temp == 1) {
566 i_WatchdogNbr = i_Flag; 648 i_WatchdogNbr = i_Flag;
567 i_Flag = i_Flag + 1; 649 i_Flag = i_Flag + 1;
diff --git a/drivers/staging/comedi/drivers/addi-data/hwdrv_apci035.h b/drivers/staging/comedi/drivers/addi-data/hwdrv_apci035.h
deleted file mode 100644
index 3c700c7bf818..000000000000
--- a/drivers/staging/comedi/drivers/addi-data/hwdrv_apci035.h
+++ /dev/null
@@ -1,109 +0,0 @@
1/*
2 * Copyright (C) 2004,2005 ADDI-DATA GmbH for the source code of this module.
3 *
4 * ADDI-DATA GmbH
5 * Dieselstrasse 3
6 * D-77833 Ottersweier
7 * Tel: +19(0)7223/9493-0
8 * Fax: +49(0)7223/9493-92
9 * http://www.addi-data.com
10 * info@addi-data.com
11 *
12 * This program is free software; you can redistribute it and/or modify it
13 * under the terms of the GNU General Public License as published by the Free
14 * Software Foundation; either version 2 of the License, or (at your option)
15 * any later version.
16 */
17
18/* Card Specific information */
19#define APCI035_BOARD_VENDOR_ID 0x15B8
20#define APCI035_ADDRESS_RANGE 255
21
22/* ANALOG INPUT RANGE */
23static struct comedi_lrange range_apci035_ai = { 8, {
24 BIP_RANGE(10),
25 BIP_RANGE(5),
26 BIP_RANGE(2),
27 BIP_RANGE(1),
28 UNI_RANGE(10),
29 UNI_RANGE(5),
30 UNI_RANGE(2),
31 UNI_RANGE(1)
32 }
33};
34
35/* Timer / Watchdog Related Defines */
36#define APCI035_TCW_SYNC_ENABLEDISABLE 0
37#define APCI035_TCW_RELOAD_VALUE 4
38#define APCI035_TCW_TIMEBASE 8
39#define APCI035_TCW_PROG 12
40#define APCI035_TCW_TRIG_STATUS 16
41#define APCI035_TCW_IRQ 20
42#define APCI035_TCW_WARN_TIMEVAL 24
43#define APCI035_TCW_WARN_TIMEBASE 28
44
45#define ADDIDATA_TIMER 0
46/* #define ADDIDATA_WATCHDOG 1 */
47
48#define APCI035_TW1 0
49#define APCI035_TW2 32
50#define APCI035_TW3 64
51#define APCI035_TW4 96
52
53#define APCI035_AI_OFFSET 0
54#define APCI035_TEMP 128
55#define APCI035_ALR_SEQ 4
56#define APCI035_START_STOP_INDEX 8
57#define APCI035_ALR_START_STOP 12
58#define APCI035_ALR_IRQ 16
59#define APCI035_EOS 20
60#define APCI035_CHAN_NO 24
61#define APCI035_CHAN_VAL 28
62#define APCI035_CONV_TIME_TIME_BASE 36
63#define APCI035_RELOAD_CONV_TIME_VAL 32
64#define APCI035_DELAY_TIME_TIME_BASE 44
65#define APCI035_RELOAD_DELAY_TIME_VAL 40
66#define ENABLE_EXT_TRIG 1
67#define ENABLE_EXT_GATE 2
68#define ENABLE_EXT_TRIG_GATE 3
69
70#define ANALOG_INPUT 0
71#define TEMPERATURE 1
72#define RESISTANCE 2
73
74#define ADDIDATA_GREATER_THAN_TEST 0
75#define ADDIDATA_LESS_THAN_TEST 1
76
77#define APCI035_MAXVOLT 2.5
78
79#define ADDIDATA_UNIPOLAR 1
80#define ADDIDATA_BIPOLAR 2
81
82/* ADDIDATA Enable Disable */
83#define ADDIDATA_ENABLE 1
84#define ADDIDATA_DISABLE 0
85
86/* Hardware Layer functions for Apci035 */
87
88/* TIMER */
89/* timer value is passed as u seconds */
90int i_APCI035_ConfigTimerWatchdog(struct comedi_device *dev, struct comedi_subdevice *s,
91 struct comedi_insn *insn, unsigned int *data);
92int i_APCI035_StartStopWriteTimerWatchdog(struct comedi_device *dev,
93 struct comedi_subdevice *s,
94 struct comedi_insn *insn, unsigned int *data);
95int i_APCI035_ReadTimerWatchdog(struct comedi_device *dev, struct comedi_subdevice *s,
96 struct comedi_insn *insn, unsigned int *data);
97
98/* Temperature Related Defines (Analog Input Subdevice) */
99
100int i_APCI035_ConfigAnalogInput(struct comedi_device *dev, struct comedi_subdevice *s,
101 struct comedi_insn *insn, unsigned int *data);
102int i_APCI035_ReadAnalogInput(struct comedi_device *dev, struct comedi_subdevice *s,
103 struct comedi_insn *insn, unsigned int *data);
104
105/* Interrupt */
106static void v_APCI035_Interrupt(int irq, void *d);
107
108/* Reset functions */
109int i_APCI035_Reset(struct comedi_device *dev);
diff --git a/drivers/staging/comedi/drivers/addi-data/hwdrv_apci1032.c b/drivers/staging/comedi/drivers/addi-data/hwdrv_apci1032.c
deleted file mode 100644
index bab7b61a53bc..000000000000
--- a/drivers/staging/comedi/drivers/addi-data/hwdrv_apci1032.c
+++ /dev/null
@@ -1,287 +0,0 @@
1/**
2@verbatim
3
4Copyright (C) 2004,2005 ADDI-DATA GmbH for the source code of this module.
5
6 ADDI-DATA GmbH
7 Dieselstrasse 3
8 D-77833 Ottersweier
9 Tel: +19(0)7223/9493-0
10 Fax: +49(0)7223/9493-92
11 http://www.addi-data.com
12 info@addi-data.com
13
14This program is free software; you can redistribute it and/or modify it under the terms of the GNU General Public License as published by the Free Software Foundation; either version 2 of the License, or (at your option) any later version.
15
16This program is distributed in the hope that it will be useful, but WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for more details.
17
18You should have received a copy of the GNU General Public License along with this program; if not, write to the Free Software Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
19
20You should also find the complete GPL in the COPYING file accompanying this source code.
21
22@endverbatim
23*/
24/*
25
26 +-----------------------------------------------------------------------+
27 | (C) ADDI-DATA GmbH Dieselstraße 3 D-77833 Ottersweier |
28 +-----------------------------------------------------------------------+
29 | Tel : +49 (0) 7223/9493-0 | email : info@addi-data.com |
30 | Fax : +49 (0) 7223/9493-92 | Internet : http://www.addi-data.com |
31 +-------------------------------+---------------------------------------+
32 | Project : APCI-1032 | Compiler : GCC |
33 | Module name : hwdrv_apci1032.c| Version : 2.96 |
34 +-------------------------------+---------------------------------------+
35 | Project manager: Eric Stolz | Date : 02/12/2002 |
36 +-------------------------------+---------------------------------------+
37 | Description : Hardware Layer Access For APCI-1032 |
38 +-----------------------------------------------------------------------+
39 | UPDATES |
40 +----------+-----------+------------------------------------------------+
41 | Date | Author | Description of updates |
42 +----------+-----------+------------------------------------------------+
43 | | | |
44 | | | |
45 | | | |
46 +----------+-----------+------------------------------------------------+
47*/
48
49/*
50+----------------------------------------------------------------------------+
51| Included files |
52+----------------------------------------------------------------------------+
53*/
54#include "hwdrv_apci1032.h"
55#include <linux/delay.h>
56
57static unsigned int ui_InterruptStatus;
58
59/*
60+----------------------------------------------------------------------------+
61| Function Name : int i_APCI1032_ConfigDigitalInput |
62| (struct comedi_device *dev,struct comedi_subdevice *s, |
63| struct comedi_insn *insn,unsigned int *data) |
64+----------------------------------------------------------------------------+
65| Task : Configures the digital input Subdevice |
66+----------------------------------------------------------------------------+
67| Input Parameters : struct comedi_device *dev : Driver handle |
68| unsigned int *data : Data Pointer contains |
69| configuration parameters as below |
70| |
71| data[0] : 1 Enable Digital Input Interrupt |
72| 0 Disable Digital Input Interrupt |
73| data[1] : 0 ADDIDATA Interrupt OR LOGIC |
74| : 1 ADDIDATA Interrupt AND LOGIC |
75| data[2] : Interrupt mask for the mode 1 |
76| data[3] : Interrupt mask for the mode 2 |
77| |
78+----------------------------------------------------------------------------+
79| Output Parameters : -- |
80+----------------------------------------------------------------------------+
81| Return Value : TRUE : No error occur |
82| : FALSE : Error occur. Return the error |
83| |
84+----------------------------------------------------------------------------+
85*/
86
87int i_APCI1032_ConfigDigitalInput(struct comedi_device *dev, struct comedi_subdevice *s,
88 struct comedi_insn *insn, unsigned int *data)
89{
90 unsigned int ui_TmpValue;
91
92 unsigned int ul_Command1 = 0;
93 unsigned int ul_Command2 = 0;
94 devpriv->tsk_Current = current;
95
96 /*******************************/
97 /* Set the digital input logic */
98 /*******************************/
99 if (data[0] == ADDIDATA_ENABLE) {
100 ul_Command1 = ul_Command1 | data[2];
101 ul_Command2 = ul_Command2 | data[3];
102 outl(ul_Command1,
103 devpriv->iobase + APCI1032_DIGITAL_IP_INTERRUPT_MODE1);
104 outl(ul_Command2,
105 devpriv->iobase + APCI1032_DIGITAL_IP_INTERRUPT_MODE2);
106 if (data[1] == ADDIDATA_OR) {
107 outl(0x4, devpriv->iobase + APCI1032_DIGITAL_IP_IRQ);
108 ui_TmpValue =
109 inl(devpriv->iobase + APCI1032_DIGITAL_IP_IRQ);
110 } /* if (data[1] == ADDIDATA_OR) */
111 else
112 outl(0x6, devpriv->iobase + APCI1032_DIGITAL_IP_IRQ);
113 /* else if(data[1] == ADDIDATA_OR) */
114 } /* if( data[0] == ADDIDATA_ENABLE) */
115 else {
116 ul_Command1 = ul_Command1 & 0xFFFF0000;
117 ul_Command2 = ul_Command2 & 0xFFFF0000;
118 outl(ul_Command1,
119 devpriv->iobase + APCI1032_DIGITAL_IP_INTERRUPT_MODE1);
120 outl(ul_Command2,
121 devpriv->iobase + APCI1032_DIGITAL_IP_INTERRUPT_MODE2);
122 outl(0x0, devpriv->iobase + APCI1032_DIGITAL_IP_IRQ);
123 } /* else if ( data[0] == ADDIDATA_ENABLE) */
124
125 return insn->n;
126}
127
128/*
129+----------------------------------------------------------------------------+
130| Function Name : int i_APCI1032_Read1DigitalInput |
131| (struct comedi_device *dev,struct comedi_subdevice *s, |
132| struct comedi_insn *insn,unsigned int *data) |
133+----------------------------------------------------------------------------+
134| Task : Return the status of the digital input |
135+----------------------------------------------------------------------------+
136| Input Parameters : struct comedi_device *dev : Driver handle |
137| unsigned int ui_Channel : Channel number to read |
138| unsigned int *data : Data Pointer to read status |
139+----------------------------------------------------------------------------+
140| Output Parameters : -- |
141+----------------------------------------------------------------------------+
142| Return Value : TRUE : No error occur |
143| : FALSE : Error occur. Return the error |
144| |
145+----------------------------------------------------------------------------+
146*/
147int i_APCI1032_Read1DigitalInput(struct comedi_device *dev, struct comedi_subdevice *s,
148 struct comedi_insn *insn, unsigned int *data)
149{
150 unsigned int ui_TmpValue = 0;
151 unsigned int ui_Channel;
152 ui_Channel = CR_CHAN(insn->chanspec);
153 if (ui_Channel <= 31) {
154 ui_TmpValue = (unsigned int) inl(devpriv->iobase + APCI1032_DIGITAL_IP);
155/*
156* since only 1 channel reqd to bring it to last bit it is rotated 8
157* +(chan - 1) times then ANDed with 1 for last bit.
158*/
159 *data = (ui_TmpValue >> ui_Channel) & 0x1;
160 } /* if(ui_Channel >= 0 && ui_Channel <=31) */
161 else {
162 /* comedi_error(dev," \n chan spec wrong\n"); */
163 return -EINVAL; /* "sorry channel spec wrong " */
164 } /* else if(ui_Channel >= 0 && ui_Channel <=31) */
165 return insn->n;
166}
167
168/*
169+----------------------------------------------------------------------------+
170| Function Name : int i_APCI1032_ReadMoreDigitalInput |
171| (struct comedi_device *dev,struct comedi_subdevice *s, |
172| struct comedi_insn *insn,unsigned int *data) |
173+----------------------------------------------------------------------------+
174| Task : Return the status of the Requested digital inputs |
175+----------------------------------------------------------------------------+
176| Input Parameters : struct comedi_device *dev : Driver handle |
177| unsigned int ui_NoOfChannels : No Of Channels To be Read |
178| unsigned int *data : Data Pointer to read status |
179+----------------------------------------------------------------------------+
180| Output Parameters : -- |
181+----------------------------------------------------------------------------+
182| Return Value : TRUE : No error occur |
183| : FALSE : Error occur. Return the error |
184| |
185+----------------------------------------------------------------------------+
186*/
187
188int i_APCI1032_ReadMoreDigitalInput(struct comedi_device *dev, struct comedi_subdevice *s,
189 struct comedi_insn *insn, unsigned int *data)
190{
191 unsigned int ui_PortValue = data[0];
192 unsigned int ui_Mask = 0;
193 unsigned int ui_NoOfChannels;
194
195 ui_NoOfChannels = CR_CHAN(insn->chanspec);
196 if (data[1] == 0) {
197 *data = (unsigned int) inl(devpriv->iobase + APCI1032_DIGITAL_IP);
198 switch (ui_NoOfChannels) {
199 case 2:
200 ui_Mask = 3;
201 *data = (*data >> (2 * ui_PortValue)) & ui_Mask;
202 break;
203 case 4:
204 ui_Mask = 15;
205 *data = (*data >> (4 * ui_PortValue)) & ui_Mask;
206 break;
207 case 8:
208 ui_Mask = 255;
209 *data = (*data >> (8 * ui_PortValue)) & ui_Mask;
210 break;
211 case 16:
212 ui_Mask = 65535;
213 *data = (*data >> (16 * ui_PortValue)) & ui_Mask;
214 break;
215 case 31:
216 break;
217 default:
218 /* comedi_error(dev," \nchan spec wrong\n"); */
219 return -EINVAL; /* "sorry channel spec wrong " */
220 break;
221 } /* switch(ui_NoOfChannels) */
222 } /* if(data[1]==0) */
223 else {
224 if (data[1] == 1)
225 *data = ui_InterruptStatus;
226 /* if(data[1]==1) */
227 } /* else if(data[1]==0) */
228 return insn->n;
229}
230
231/*
232+----------------------------------------------------------------------------+
233| Function Name : static void v_APCI1032_Interrupt |
234| (int irq , void *d) |
235+----------------------------------------------------------------------------+
236| Task : Interrupt handler for the interruptible digital inputs |
237+----------------------------------------------------------------------------+
238| Input Parameters : int irq : irq number |
239| void *d : void pointer |
240+----------------------------------------------------------------------------+
241| Output Parameters : -- |
242+----------------------------------------------------------------------------+
243| Return Value : TRUE : No error occur |
244| : FALSE : Error occur. Return the error |
245| |
246+----------------------------------------------------------------------------+
247*/
248static void v_APCI1032_Interrupt(int irq, void *d)
249{
250 struct comedi_device *dev = d;
251
252 unsigned int ui_Temp;
253 /* disable the interrupt */
254 ui_Temp = inl(devpriv->iobase + APCI1032_DIGITAL_IP_IRQ);
255 outl(ui_Temp & APCI1032_DIGITAL_IP_INTERRUPT_DISABLE,
256 devpriv->iobase + APCI1032_DIGITAL_IP_IRQ);
257 ui_InterruptStatus =
258 inl(devpriv->iobase + APCI1032_DIGITAL_IP_INTERRUPT_STATUS);
259 ui_InterruptStatus = ui_InterruptStatus & 0X0000FFFF;
260 send_sig(SIGIO, devpriv->tsk_Current, 0); /* send signal to the sample */
261 outl(ui_Temp, devpriv->iobase + APCI1032_DIGITAL_IP_IRQ); /* enable the interrupt */
262 return;
263}
264
265/*
266+----------------------------------------------------------------------------+
267| Function Name : int i_APCI1032_Reset(struct comedi_device *dev) | |
268+----------------------------------------------------------------------------+
269| Task :resets all the registers |
270+----------------------------------------------------------------------------+
271| Input Parameters : struct comedi_device *dev
272+----------------------------------------------------------------------------+
273| Output Parameters : -- |
274+----------------------------------------------------------------------------+
275| Return Value : |
276| |
277+----------------------------------------------------------------------------+
278*/
279
280int i_APCI1032_Reset(struct comedi_device *dev)
281{
282 outl(0x0, devpriv->iobase + APCI1032_DIGITAL_IP_IRQ); /* disable the interrupts */
283 inl(devpriv->iobase + APCI1032_DIGITAL_IP_INTERRUPT_STATUS); /* Reset the interrupt status register */
284 outl(0x0, devpriv->iobase + APCI1032_DIGITAL_IP_INTERRUPT_MODE1); /* Disable the and/or interrupt */
285 outl(0x0, devpriv->iobase + APCI1032_DIGITAL_IP_INTERRUPT_MODE2);
286 return 0;
287}
diff --git a/drivers/staging/comedi/drivers/addi-data/hwdrv_apci1032.h b/drivers/staging/comedi/drivers/addi-data/hwdrv_apci1032.h
deleted file mode 100644
index 7114acb4bd2b..000000000000
--- a/drivers/staging/comedi/drivers/addi-data/hwdrv_apci1032.h
+++ /dev/null
@@ -1,64 +0,0 @@
1/*
2 * Copyright (C) 2004,2005 ADDI-DATA GmbH for the source code of this module.
3 *
4 * ADDI-DATA GmbH
5 * Dieselstrasse 3
6 * D-77833 Ottersweier
7 * Tel: +19(0)7223/9493-0
8 * Fax: +49(0)7223/9493-92
9 * http://www.addi-data.com
10 * info@addi-data.com
11 *
12 * This program is free software; you can redistribute it and/or modify it
13 * under the terms of the GNU General Public License as published by the Free
14 * Software Foundation; either version 2 of the License, or (at your option)
15 * any later version.
16 */
17
18/********* Definitions for APCI-1032 card *****/
19
20#define APCI1032_BOARD_VENDOR_ID 0x15B8
21#define APCI1032_ADDRESS_RANGE 20
22/* DIGITAL INPUT DEFINE */
23
24#define APCI1032_DIGITAL_IP 0
25#define APCI1032_DIGITAL_IP_INTERRUPT_MODE1 4
26#define APCI1032_DIGITAL_IP_INTERRUPT_MODE2 8
27#define APCI1032_DIGITAL_IP_IRQ 16
28
29/* Digital Input IRQ Function Selection */
30#define ADDIDATA_OR 0
31#define ADDIDATA_AND 1
32
33/* Digital Input Interrupt Status */
34#define APCI1032_DIGITAL_IP_INTERRUPT_STATUS 12
35
36/* Digital Input Interrupt Enable Disable. */
37#define APCI1032_DIGITAL_IP_INTERRUPT_ENABLE 0x4
38#define APCI1032_DIGITAL_IP_INTERRUPT_DISABLE 0xFFFFFFFB
39
40/* ADDIDATA Enable Disable */
41
42#define ADDIDATA_ENABLE 1
43#define ADDIDATA_DISABLE 0
44
45/* Hardware Layer functions for Apci1032 */
46
47/*
48* DI for di read
49*/
50
51int i_APCI1032_ConfigDigitalInput(struct comedi_device *dev, struct comedi_subdevice *s,
52 struct comedi_insn *insn, unsigned int *data);
53
54int i_APCI1032_Read1DigitalInput(struct comedi_device *dev, struct comedi_subdevice *s,
55 struct comedi_insn *insn, unsigned int *data);
56
57int i_APCI1032_ReadMoreDigitalInput(struct comedi_device *dev, struct comedi_subdevice *s,
58 struct comedi_insn *insn, unsigned int *data);
59
60/* Interrupt functions..... */
61
62static void v_APCI1032_Interrupt(int irq, void *d);
63/* Reset */
64int i_APCI1032_Reset(struct comedi_device *dev);
diff --git a/drivers/staging/comedi/drivers/addi-data/hwdrv_apci1500.c b/drivers/staging/comedi/drivers/addi-data/hwdrv_apci1500.c
index 62f421a06f05..24c4c983db38 100644
--- a/drivers/staging/comedi/drivers/addi-data/hwdrv_apci1500.c
+++ b/drivers/staging/comedi/drivers/addi-data/hwdrv_apci1500.c
@@ -45,7 +45,105 @@ You should also find the complete GPL in the COPYING file accompanying this sour
45 | | | | 45 | | | |
46 +----------+-----------+------------------------------------------------+ 46 +----------+-----------+------------------------------------------------+
47*/ 47*/
48#include "hwdrv_apci1500.h" 48
49/********* Definitions for APCI-1500 card *****/
50
51/* Card Specific information */
52#define APCI1500_ADDRESS_RANGE 4
53
54/* DIGITAL INPUT-OUTPUT DEFINE */
55
56#define APCI1500_DIGITAL_OP 2
57#define APCI1500_DIGITAL_IP 0
58#define APCI1500_AND 2
59#define APCI1500_OR 4
60#define APCI1500_OR_PRIORITY 6
61#define APCI1500_CLK_SELECT 0
62#define COUNTER1 0
63#define COUNTER2 1
64#define COUNTER3 2
65#define APCI1500_COUNTER 0x20
66#define APCI1500_TIMER 0
67#define APCI1500_WATCHDOG 0
68#define APCI1500_SINGLE 0
69#define APCI1500_CONTINUOUS 0x80
70#define APCI1500_DISABLE 0
71#define APCI1500_ENABLE 1
72#define APCI1500_SOFTWARE_TRIGGER 0x4
73#define APCI1500_HARDWARE_TRIGGER 0x10
74#define APCI1500_SOFTWARE_GATE 0
75#define APCI1500_HARDWARE_GATE 0x8
76#define START 0
77#define STOP 1
78#define TRIGGER 2
79
80/*
81 * Zillog I/O enumeration
82 */
83enum {
84 APCI1500_Z8536_PORT_C,
85 APCI1500_Z8536_PORT_B,
86 APCI1500_Z8536_PORT_A,
87 APCI1500_Z8536_CONTROL_REGISTER
88};
89
90/*
91 * Z8536 CIO Internal Address
92 */
93enum {
94 APCI1500_RW_MASTER_INTERRUPT_CONTROL,
95 APCI1500_RW_MASTER_CONFIGURATION_CONTROL,
96 APCI1500_RW_PORT_A_INTERRUPT_CONTROL,
97 APCI1500_RW_PORT_B_INTERRUPT_CONTROL,
98 APCI1500_RW_TIMER_COUNTER_INTERRUPT_VECTOR,
99 APCI1500_RW_PORT_C_DATA_PCITCH_POLARITY,
100 APCI1500_RW_PORT_C_DATA_DIRECTION,
101 APCI1500_RW_PORT_C_SPECIAL_IO_CONTROL,
102
103 APCI1500_RW_PORT_A_COMMAND_AND_STATUS,
104 APCI1500_RW_PORT_B_COMMAND_AND_STATUS,
105 APCI1500_RW_CPT_TMR1_CMD_STATUS,
106 APCI1500_RW_CPT_TMR2_CMD_STATUS,
107 APCI1500_RW_CPT_TMR3_CMD_STATUS,
108 APCI1500_RW_PORT_A_DATA,
109 APCI1500_RW_PORT_B_DATA,
110 APCI1500_RW_PORT_C_DATA,
111
112 APCI1500_R_CPT_TMR1_VALUE_HIGH,
113 APCI1500_R_CPT_TMR1_VALUE_LOW,
114 APCI1500_R_CPT_TMR2_VALUE_HIGH,
115 APCI1500_R_CPT_TMR2_VALUE_LOW,
116 APCI1500_R_CPT_TMR3_VALUE_HIGH,
117 APCI1500_R_CPT_TMR3_VALUE_LOW,
118 APCI1500_RW_CPT_TMR1_TIME_CST_HIGH,
119 APCI1500_RW_CPT_TMR1_TIME_CST_LOW,
120 APCI1500_RW_CPT_TMR2_TIME_CST_HIGH,
121 APCI1500_RW_CPT_TMR2_TIME_CST_LOW,
122 APCI1500_RW_CPT_TMR3_TIME_CST_HIGH,
123 APCI1500_RW_CPT_TMR3_TIME_CST_LOW,
124 APCI1500_RW_CPT_TMR1_MODE_SPECIFICATION,
125 APCI1500_RW_CPT_TMR2_MODE_SPECIFICATION,
126 APCI1500_RW_CPT_TMR3_MODE_SPECIFICATION,
127 APCI1500_R_CURRENT_VECTOR,
128
129 APCI1500_RW_PORT_A_SPECIFICATION,
130 APCI1500_RW_PORT_A_HANDSHAKE_SPECIFICATION,
131 APCI1500_RW_PORT_A_DATA_PCITCH_POLARITY,
132 APCI1500_RW_PORT_A_DATA_DIRECTION,
133 APCI1500_RW_PORT_A_SPECIAL_IO_CONTROL,
134 APCI1500_RW_PORT_A_PATTERN_POLARITY,
135 APCI1500_RW_PORT_A_PATTERN_TRANSITION,
136 APCI1500_RW_PORT_A_PATTERN_MASK,
137
138 APCI1500_RW_PORT_B_SPECIFICATION,
139 APCI1500_RW_PORT_B_HANDSHAKE_SPECIFICATION,
140 APCI1500_RW_PORT_B_DATA_PCITCH_POLARITY,
141 APCI1500_RW_PORT_B_DATA_DIRECTION,
142 APCI1500_RW_PORT_B_SPECIAL_IO_CONTROL,
143 APCI1500_RW_PORT_B_PATTERN_POLARITY,
144 APCI1500_RW_PORT_B_PATTERN_TRANSITION,
145 APCI1500_RW_PORT_B_PATTERN_MASK
146};
49 147
50static int i_TimerCounter1Init = 0; 148static int i_TimerCounter1Init = 0;
51static int i_TimerCounter2Init = 0; 149static int i_TimerCounter2Init = 0;
@@ -141,6 +239,7 @@ static int i_APCI1500_ConfigDigitalInputEvent(struct comedi_device *dev,
141 struct comedi_insn *insn, 239 struct comedi_insn *insn,
142 unsigned int *data) 240 unsigned int *data)
143{ 241{
242 struct addi_private *devpriv = dev->private;
144 int i_PatternPolarity = 0, i_PatternTransition = 0, i_PatternMask = 0; 243 int i_PatternPolarity = 0, i_PatternTransition = 0, i_PatternMask = 0;
145 int i_MaxChannel = 0, i_Count = 0, i_EventMask = 0; 244 int i_MaxChannel = 0, i_Count = 0, i_EventMask = 0;
146 int i_PatternTransitionCount = 0, i_RegValue; 245 int i_PatternTransitionCount = 0, i_RegValue;
@@ -525,8 +624,10 @@ static int i_APCI1500_StartStopInputEvent(struct comedi_device *dev,
525 struct comedi_insn *insn, 624 struct comedi_insn *insn,
526 unsigned int *data) 625 unsigned int *data)
527{ 626{
627 struct addi_private *devpriv = dev->private;
528 int i_Event1InterruptStatus = 0, i_Event2InterruptStatus = 628 int i_Event1InterruptStatus = 0, i_Event2InterruptStatus =
529 0, i_RegValue; 629 0, i_RegValue;
630
530 switch (data[0]) { 631 switch (data[0]) {
531 case START: 632 case START:
532 /*************************/ 633 /*************************/
@@ -792,7 +893,9 @@ static int i_APCI1500_Initialisation(struct comedi_device *dev,
792 struct comedi_insn *insn, 893 struct comedi_insn *insn,
793 unsigned int *data) 894 unsigned int *data)
794{ 895{
896 struct addi_private *devpriv = dev->private;
795 int i_DummyRead = 0; 897 int i_DummyRead = 0;
898
796 /******************/ 899 /******************/
797 /* Software reset */ 900 /* Software reset */
798 /******************/ 901 /******************/
@@ -939,82 +1042,15 @@ static int i_APCI1500_Initialisation(struct comedi_device *dev,
939 return insn->n; 1042 return insn->n;
940} 1043}
941 1044
942/* 1045static int apci1500_di_insn_bits(struct comedi_device *dev,
943+----------------------------------------------------------------------------+ 1046 struct comedi_subdevice *s,
944| Function Name : int i_APCI1500_ReadMoreDigitalInput | 1047 struct comedi_insn *insn,
945| (struct comedi_device *dev,struct comedi_subdevice *s, | 1048 unsigned int *data)
946| struct comedi_insn *insn,unsigned int *data) |
947+----------------------------------------------------------------------------+
948| Task : Return the status of the Requested digital inputs |
949+----------------------------------------------------------------------------+
950| Input Parameters : struct comedi_device *dev : Driver handle |
951| unsigned int ui_NoOfChannels : No Of Channels To be Read |
952| unsigned int *data : Data Pointer
953| data[0] : 0 Read a single channel
954| 1 read a port value
955| data[1] : port value
956+----------------------------------------------------------------------------+
957| Output Parameters : -- data[0] :The read status value
958+----------------------------------------------------------------------------+
959| Return Value : TRUE : No error occur |
960| : FALSE : Error occur. Return the error |
961| |
962+----------------------------------------------------------------------------+
963*/
964static int i_APCI1500_ReadMoreDigitalInput(struct comedi_device *dev,
965 struct comedi_subdevice *s,
966 struct comedi_insn *insn,
967 unsigned int *data)
968{ 1049{
969 unsigned int ui_PortValue = data[1]; 1050 struct addi_private *devpriv = dev->private;
970 unsigned int ui_Mask = 0;
971 unsigned int ui_Channel;
972 unsigned int ui_TmpValue = 0;
973 ui_Channel = CR_CHAN(insn->chanspec);
974 1051
975 switch (data[0]) { 1052 data[1] = inw(devpriv->i_IobaseAddon + APCI1500_DIGITAL_IP);
976 case 0:
977 if (ui_Channel <= 15) {
978 ui_TmpValue =
979 (unsigned int) inw(devpriv->i_IobaseAddon +
980 APCI1500_DIGITAL_IP);
981 *data = (ui_TmpValue >> ui_Channel) & 0x1;
982 } /* if(ui_Channel >= 0 && ui_Channel <=15) */
983 else {
984 printk("\nThe channel specification are in error\n");
985 return -EINVAL; /* "sorry channel spec wrong " */
986 } /* else if(ui_Channel >= 0 && ui_Channel <=15) */
987 break;
988 case 1:
989 1053
990 *data = (unsigned int) inw(devpriv->i_IobaseAddon +
991 APCI1500_DIGITAL_IP);
992 switch (ui_Channel) {
993 case 2:
994 ui_Mask = 3;
995 *data = (*data >> (2 * ui_PortValue)) & ui_Mask;
996 break;
997 case 4:
998 ui_Mask = 15;
999 *data = (*data >> (4 * ui_PortValue)) & ui_Mask;
1000 break;
1001 case 8:
1002 ui_Mask = 255;
1003 *data = (*data >> (8 * ui_PortValue)) & ui_Mask;
1004 break;
1005 case 15:
1006 break;
1007
1008 default:
1009 printk("\nSpecified channel cannot be read \n");
1010 return -EINVAL; /* "sorry channel spec wrong " */
1011 break;
1012 } /* switch(ui_Channel) */
1013 break;
1014 default:
1015 printk("\nThe specified functionality does not exist\n");
1016 return -EINVAL;
1017 } /* switch(data[0]) */
1018 return insn->n; 1054 return insn->n;
1019} 1055}
1020 1056
@@ -1051,6 +1087,8 @@ static int i_APCI1500_ConfigDigitalOutputErrorInterrupt(struct comedi_device *de
1051 struct comedi_insn *insn, 1087 struct comedi_insn *insn,
1052 unsigned int *data) 1088 unsigned int *data)
1053{ 1089{
1090 struct addi_private *devpriv = dev->private;
1091
1054 devpriv->b_OutputMemoryStatus = data[0]; 1092 devpriv->b_OutputMemoryStatus = data[0];
1055 return insn->n; 1093 return insn->n;
1056} 1094}
@@ -1079,9 +1117,9 @@ static int i_APCI1500_WriteDigitalOutput(struct comedi_device *dev,
1079 struct comedi_insn *insn, 1117 struct comedi_insn *insn,
1080 unsigned int *data) 1118 unsigned int *data)
1081{ 1119{
1120 struct addi_private *devpriv = dev->private;
1082 static unsigned int ui_Temp = 0; 1121 static unsigned int ui_Temp = 0;
1083 unsigned int ui_Temp1; 1122 unsigned int ui_Temp1;
1084
1085 unsigned int ui_NoOfChannel = CR_CHAN(insn->chanspec); /* get the channel */ 1123 unsigned int ui_NoOfChannel = CR_CHAN(insn->chanspec); /* get the channel */
1086 1124
1087 if (!devpriv->b_OutputMemoryStatus) { 1125 if (!devpriv->b_OutputMemoryStatus) {
@@ -1274,6 +1312,7 @@ static int i_APCI1500_ConfigCounterTimerWatchdog(struct comedi_device *dev,
1274 struct comedi_insn *insn, 1312 struct comedi_insn *insn,
1275 unsigned int *data) 1313 unsigned int *data)
1276{ 1314{
1315 struct addi_private *devpriv = dev->private;
1277 int i_TimerCounterMode, i_MasterConfiguration; 1316 int i_TimerCounterMode, i_MasterConfiguration;
1278 1317
1279 devpriv->tsk_Current = current; 1318 devpriv->tsk_Current = current;
@@ -1875,6 +1914,7 @@ static int i_APCI1500_StartStopTriggerTimerCounterWatchdog(struct comedi_device
1875 struct comedi_insn *insn, 1914 struct comedi_insn *insn,
1876 unsigned int *data) 1915 unsigned int *data)
1877{ 1916{
1917 struct addi_private *devpriv = dev->private;
1878 int i_CommandAndStatusValue; 1918 int i_CommandAndStatusValue;
1879 1919
1880 switch (data[0]) { 1920 switch (data[0]) {
@@ -2198,7 +2238,9 @@ static int i_APCI1500_ReadCounterTimerWatchdog(struct comedi_device *dev,
2198 struct comedi_insn *insn, 2238 struct comedi_insn *insn,
2199 unsigned int *data) 2239 unsigned int *data)
2200{ 2240{
2241 struct addi_private *devpriv = dev->private;
2201 int i_CommandAndStatusValue; 2242 int i_CommandAndStatusValue;
2243
2202 switch (data[0]) { 2244 switch (data[0]) {
2203 case COUNTER1: 2245 case COUNTER1:
2204 /* Read counter/timer1 */ 2246 /* Read counter/timer1 */
@@ -2421,9 +2463,11 @@ static int i_APCI1500_ConfigureInterrupt(struct comedi_device *dev,
2421 struct comedi_insn *insn, 2463 struct comedi_insn *insn,
2422 unsigned int *data) 2464 unsigned int *data)
2423{ 2465{
2466 struct addi_private *devpriv = dev->private;
2424 unsigned int ui_Status; 2467 unsigned int ui_Status;
2425 int i_RegValue; 2468 int i_RegValue;
2426 int i_Constant; 2469 int i_Constant;
2470
2427 devpriv->tsk_Current = current; 2471 devpriv->tsk_Current = current;
2428 outl(0x0, devpriv->i_IobaseAmcc + 0x38); 2472 outl(0x0, devpriv->i_IobaseAmcc + 0x38);
2429 if (data[0] == 1) { 2473 if (data[0] == 1) {
@@ -2597,6 +2641,7 @@ static void v_APCI1500_Interrupt(int irq, void *d)
2597{ 2641{
2598 2642
2599 struct comedi_device *dev = d; 2643 struct comedi_device *dev = d;
2644 struct addi_private *devpriv = dev->private;
2600 unsigned int ui_InterruptStatus = 0; 2645 unsigned int ui_InterruptStatus = 0;
2601 int i_RegValue = 0; 2646 int i_RegValue = 0;
2602 i_InterruptMask = 0; 2647 i_InterruptMask = 0;
@@ -2840,7 +2885,9 @@ static void v_APCI1500_Interrupt(int irq, void *d)
2840*/ 2885*/
2841static int i_APCI1500_Reset(struct comedi_device *dev) 2886static int i_APCI1500_Reset(struct comedi_device *dev)
2842{ 2887{
2888 struct addi_private *devpriv = dev->private;
2843 int i_DummyRead = 0; 2889 int i_DummyRead = 0;
2890
2844 i_TimerCounter1Init = 0; 2891 i_TimerCounter1Init = 0;
2845 i_TimerCounter2Init = 0; 2892 i_TimerCounter2Init = 0;
2846 i_WatchdogCounter3Init = 0; 2893 i_WatchdogCounter3Init = 0;
diff --git a/drivers/staging/comedi/drivers/addi-data/hwdrv_apci1500.h b/drivers/staging/comedi/drivers/addi-data/hwdrv_apci1500.h
deleted file mode 100644
index 647f9ebf552a..000000000000
--- a/drivers/staging/comedi/drivers/addi-data/hwdrv_apci1500.h
+++ /dev/null
@@ -1,165 +0,0 @@
1/*
2 * Copyright (C) 2004,2005 ADDI-DATA GmbH for the source code of this module.
3 *
4 * ADDI-DATA GmbH
5 * Dieselstrasse 3
6 * D-77833 Ottersweier
7 * Tel: +19(0)7223/9493-0
8 * Fax: +49(0)7223/9493-92
9 * http://www.addi-data.com
10 * info@addi-data.com
11 *
12 * This program is free software; you can redistribute it and/or modify it
13 * under the terms of the GNU General Public License as published by the Free
14 * Software Foundation; either version 2 of the License, or (at your option)
15 * any later version.
16 */
17
18/********* Definitions for APCI-1500 card *****/
19
20/* Card Specific information */
21#define APCI1500_BOARD_VENDOR_ID 0x10e8
22#define APCI1500_ADDRESS_RANGE 4
23
24/* DIGITAL INPUT-OUTPUT DEFINE */
25
26#define APCI1500_DIGITAL_OP 2
27#define APCI1500_DIGITAL_IP 0
28#define APCI1500_AND 2
29#define APCI1500_OR 4
30#define APCI1500_OR_PRIORITY 6
31#define APCI1500_CLK_SELECT 0
32#define COUNTER1 0
33#define COUNTER2 1
34#define COUNTER3 2
35#define APCI1500_COUNTER 0x20
36#define APCI1500_TIMER 0
37#define APCI1500_WATCHDOG 0
38#define APCI1500_SINGLE 0
39#define APCI1500_CONTINUOUS 0x80
40#define APCI1500_DISABLE 0
41#define APCI1500_ENABLE 1
42#define APCI1500_SOFTWARE_TRIGGER 0x4
43#define APCI1500_HARDWARE_TRIGGER 0x10
44#define APCI1500_SOFTWARE_GATE 0
45#define APCI1500_HARDWARE_GATE 0x8
46#define START 0
47#define STOP 1
48#define TRIGGER 2
49
50/*
51 * Zillog I/O enumeration
52 */
53enum {
54 APCI1500_Z8536_PORT_C,
55 APCI1500_Z8536_PORT_B,
56 APCI1500_Z8536_PORT_A,
57 APCI1500_Z8536_CONTROL_REGISTER
58};
59
60/*
61 * Z8536 CIO Internal Address
62 */
63enum {
64 APCI1500_RW_MASTER_INTERRUPT_CONTROL,
65 APCI1500_RW_MASTER_CONFIGURATION_CONTROL,
66 APCI1500_RW_PORT_A_INTERRUPT_CONTROL,
67 APCI1500_RW_PORT_B_INTERRUPT_CONTROL,
68 APCI1500_RW_TIMER_COUNTER_INTERRUPT_VECTOR,
69 APCI1500_RW_PORT_C_DATA_PCITCH_POLARITY,
70 APCI1500_RW_PORT_C_DATA_DIRECTION,
71 APCI1500_RW_PORT_C_SPECIAL_IO_CONTROL,
72
73 APCI1500_RW_PORT_A_COMMAND_AND_STATUS,
74 APCI1500_RW_PORT_B_COMMAND_AND_STATUS,
75 APCI1500_RW_CPT_TMR1_CMD_STATUS,
76 APCI1500_RW_CPT_TMR2_CMD_STATUS,
77 APCI1500_RW_CPT_TMR3_CMD_STATUS,
78 APCI1500_RW_PORT_A_DATA,
79 APCI1500_RW_PORT_B_DATA,
80 APCI1500_RW_PORT_C_DATA,
81
82 APCI1500_R_CPT_TMR1_VALUE_HIGH,
83 APCI1500_R_CPT_TMR1_VALUE_LOW,
84 APCI1500_R_CPT_TMR2_VALUE_HIGH,
85 APCI1500_R_CPT_TMR2_VALUE_LOW,
86 APCI1500_R_CPT_TMR3_VALUE_HIGH,
87 APCI1500_R_CPT_TMR3_VALUE_LOW,
88 APCI1500_RW_CPT_TMR1_TIME_CST_HIGH,
89 APCI1500_RW_CPT_TMR1_TIME_CST_LOW,
90 APCI1500_RW_CPT_TMR2_TIME_CST_HIGH,
91 APCI1500_RW_CPT_TMR2_TIME_CST_LOW,
92 APCI1500_RW_CPT_TMR3_TIME_CST_HIGH,
93 APCI1500_RW_CPT_TMR3_TIME_CST_LOW,
94 APCI1500_RW_CPT_TMR1_MODE_SPECIFICATION,
95 APCI1500_RW_CPT_TMR2_MODE_SPECIFICATION,
96 APCI1500_RW_CPT_TMR3_MODE_SPECIFICATION,
97 APCI1500_R_CURRENT_VECTOR,
98
99 APCI1500_RW_PORT_A_SPECIFICATION,
100 APCI1500_RW_PORT_A_HANDSHAKE_SPECIFICATION,
101 APCI1500_RW_PORT_A_DATA_PCITCH_POLARITY,
102 APCI1500_RW_PORT_A_DATA_DIRECTION,
103 APCI1500_RW_PORT_A_SPECIAL_IO_CONTROL,
104 APCI1500_RW_PORT_A_PATTERN_POLARITY,
105 APCI1500_RW_PORT_A_PATTERN_TRANSITION,
106 APCI1500_RW_PORT_A_PATTERN_MASK,
107
108 APCI1500_RW_PORT_B_SPECIFICATION,
109 APCI1500_RW_PORT_B_HANDSHAKE_SPECIFICATION,
110 APCI1500_RW_PORT_B_DATA_PCITCH_POLARITY,
111 APCI1500_RW_PORT_B_DATA_DIRECTION,
112 APCI1500_RW_PORT_B_SPECIAL_IO_CONTROL,
113 APCI1500_RW_PORT_B_PATTERN_POLARITY,
114 APCI1500_RW_PORT_B_PATTERN_TRANSITION,
115 APCI1500_RW_PORT_B_PATTERN_MASK
116};
117
118 /*----------DIGITAL INPUT----------------*/
119static int i_APCI1500_Initialisation(struct comedi_device *dev, struct comedi_subdevice *s,
120 struct comedi_insn *insn, unsigned int *data);
121static int i_APCI1500_ConfigDigitalInputEvent(struct comedi_device *dev,
122 struct comedi_subdevice *s,
123 struct comedi_insn *insn,
124 unsigned int *data);
125
126static int i_APCI1500_StartStopInputEvent(struct comedi_device *dev,
127 struct comedi_subdevice *s,
128 struct comedi_insn *insn, unsigned int *data);
129static int i_APCI1500_ReadMoreDigitalInput(struct comedi_device *dev,
130 struct comedi_subdevice *s,
131 struct comedi_insn *insn, unsigned int *data);
132
133/*---------- DIGITAL OUTPUT------------*/
134static int i_APCI1500_ConfigDigitalOutputErrorInterrupt(struct comedi_device *dev,
135 struct comedi_subdevice *s,
136 struct comedi_insn *insn,
137 unsigned int *data);
138static int i_APCI1500_WriteDigitalOutput(struct comedi_device *dev,
139 struct comedi_subdevice *s,
140 struct comedi_insn *insn, unsigned int *data);
141
142/*----------TIMER----------------*/
143static int i_APCI1500_ConfigCounterTimerWatchdog(struct comedi_device *dev,
144 struct comedi_subdevice *s,
145 struct comedi_insn *insn,
146 unsigned int *data);
147static int i_APCI1500_StartStopTriggerTimerCounterWatchdog(struct comedi_device *dev,
148 struct comedi_subdevice *s,
149 struct comedi_insn *insn,
150 unsigned int *data);
151static int i_APCI1500_ReadCounterTimerWatchdog(struct comedi_device *dev,
152 struct comedi_subdevice *s,
153 struct comedi_insn *insn,
154 unsigned int *data);
155static int i_APCI1500_ReadInterruptMask(struct comedi_device *dev,
156 struct comedi_subdevice *s,
157 struct comedi_insn *insn, unsigned int *data);
158
159/*----------INTERRUPT HANDLER------*/
160static void v_APCI1500_Interrupt(int irq, void *d);
161static int i_APCI1500_ConfigureInterrupt(struct comedi_device *dev,
162 struct comedi_subdevice *s,
163 struct comedi_insn *insn, unsigned int *data);
164/*----------RESET---------------*/
165static int i_APCI1500_Reset(struct comedi_device *dev);
diff --git a/drivers/staging/comedi/drivers/addi-data/hwdrv_apci1516.c b/drivers/staging/comedi/drivers/addi-data/hwdrv_apci1516.c
deleted file mode 100644
index 8a584a014b0b..000000000000
--- a/drivers/staging/comedi/drivers/addi-data/hwdrv_apci1516.c
+++ /dev/null
@@ -1,542 +0,0 @@
1/**
2@verbatim
3
4Copyright (C) 2004,2005 ADDI-DATA GmbH for the source code of this module.
5
6 ADDI-DATA GmbH
7 Dieselstrasse 3
8 D-77833 Ottersweier
9 Tel: +19(0)7223/9493-0
10 Fax: +49(0)7223/9493-92
11 http://www.addi-data.com
12 info@addi-data.com
13
14This program is free software; you can redistribute it and/or modify it under the terms of the GNU General Public License as published by the Free Software Foundation; either version 2 of the License, or (at your option) any later version.
15
16This program is distributed in the hope that it will be useful, but WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for more details.
17
18You should have received a copy of the GNU General Public License along with this program; if not, write to the Free Software Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
19
20You should also find the complete GPL in the COPYING file accompanying this source code.
21
22@endverbatim
23*/
24/*
25
26 +-----------------------------------------------------------------------+
27 | (C) ADDI-DATA GmbH Dieselstraße 3 D-77833 Ottersweier |
28 +-----------------------------------------------------------------------+
29 | Tel : +49 (0) 7223/9493-0 | email : info@addi-data.com |
30 | Fax : +49 (0) 7223/9493-92 | Internet : http://www.addi-data.com |
31 +-------------------------------+---------------------------------------+
32 | Project : APCI-1516 | Compiler : GCC |
33 | Module name : hwdrv_apci1516.c| Version : 2.96 |
34 +-------------------------------+---------------------------------------+
35 | Project manager: Eric Stolz | Date : 02/12/2002 |
36 +-------------------------------+---------------------------------------+
37 | Description : Hardware Layer Access For APCI-1516 |
38 +-----------------------------------------------------------------------+
39 | UPDATES |
40 +----------+-----------+------------------------------------------------+
41 | Date | Author | Description of updates |
42 +----------+-----------+------------------------------------------------+
43 | | | |
44 | | | |
45 | | | |
46 +----------+-----------+------------------------------------------------+
47*/
48
49/*
50+----------------------------------------------------------------------------+
51| Included files |
52+----------------------------------------------------------------------------+
53*/
54#include "hwdrv_apci1516.h"
55
56/*
57+----------------------------------------------------------------------------+
58| Function Name : int i_APCI1516_Read1DigitalInput |
59| (struct comedi_device *dev,struct comedi_subdevice *s, |
60| struct comedi_insn *insn,unsigned int *data) |
61+----------------------------------------------------------------------------+
62| Task : Return the status of the digital input |
63+----------------------------------------------------------------------------+
64| Input Parameters : struct comedi_device *dev : Driver handle |
65| struct comedi_subdevice *s, :pointer to subdevice structure
66| struct comedi_insn *insn :pointer to insn structure |
67| unsigned int *data : Data Pointer to read status |
68+----------------------------------------------------------------------------+
69| Output Parameters : -- |
70+----------------------------------------------------------------------------+
71| Return Value : TRUE : No error occur |
72| : FALSE : Error occur. Return the error |
73| |
74+----------------------------------------------------------------------------+
75*/
76int i_APCI1516_Read1DigitalInput(struct comedi_device *dev, struct comedi_subdevice *s,
77 struct comedi_insn *insn, unsigned int *data)
78{
79 unsigned int ui_TmpValue = 0;
80 unsigned int ui_Channel;
81 ui_Channel = CR_CHAN(insn->chanspec);
82 if (ui_Channel <= 7) {
83 ui_TmpValue = (unsigned int) inw(devpriv->iobase + APCI1516_DIGITAL_IP);
84 /* since only 1 channel reqd to bring it to last bit it is rotated */
85 /* 8 +(chan - 1) times then ANDed with 1 for last bit. */
86 *data = (ui_TmpValue >> ui_Channel) & 0x1;
87 } /* if(ui_Channel >= 0 && ui_Channel <=7) */
88 else {
89 /* comedi_error(dev," \n chan spec wrong\n"); */
90 return -EINVAL; /* "sorry channel spec wrong " */
91 } /* else if(ui_Channel >= 0 && ui_Channel <=7) */
92
93 return insn->n;
94}
95
96/*
97+----------------------------------------------------------------------------+
98| Function Name : int i_APCI1516_ReadMoreDigitalInput |
99| (struct comedi_device *dev,struct comedi_subdevice *s, |
100| struct comedi_insn *insn,unsigned int *data) |
101+----------------------------------------------------------------------------+
102| Task : Return the status of the Requested digital inputs |
103+----------------------------------------------------------------------------+
104| Input Parameters : struct comedi_device *dev : Driver handle |
105| struct comedi_subdevice *s, :pointer to subdevice structure
106| struct comedi_insn *insn :pointer to insn structure |
107| unsigned int *data : Data Pointer to read status |
108+----------------------------------------------------------------------------+
109| Output Parameters : -- |
110+----------------------------------------------------------------------------+
111| Return Value : TRUE : No error occur |
112| : FALSE : Error occur. Return the error |
113| |
114+----------------------------------------------------------------------------+
115*/
116
117int i_APCI1516_ReadMoreDigitalInput(struct comedi_device *dev, struct comedi_subdevice *s,
118 struct comedi_insn *insn, unsigned int *data)
119{
120
121 unsigned int ui_PortValue = data[0];
122 unsigned int ui_Mask = 0;
123 unsigned int ui_NoOfChannels;
124
125 ui_NoOfChannels = CR_CHAN(insn->chanspec);
126
127 *data = (unsigned int) inw(devpriv->iobase + APCI1516_DIGITAL_IP);
128 switch (ui_NoOfChannels) {
129 case 2:
130 ui_Mask = 3;
131 *data = (*data >> (2 * ui_PortValue)) & ui_Mask;
132 break;
133 case 4:
134 ui_Mask = 15;
135 *data = (*data >> (4 * ui_PortValue)) & ui_Mask;
136 break;
137 case 7:
138 break;
139
140 default:
141 printk("\nWrong parameters\n");
142 return -EINVAL; /* "sorry channel spec wrong " */
143 break;
144 } /* switch(ui_NoOfChannels) */
145
146 return insn->n;
147}
148
149/*
150+----------------------------------------------------------------------------+
151| Function Name : int i_APCI1516_ConfigDigitalOutput (struct comedi_device *dev,
152| struct comedi_subdevice *s struct comedi_insn *insn,unsigned int *data) |
153| |
154+----------------------------------------------------------------------------+
155| Task : Configures The Digital Output Subdevice. |
156+----------------------------------------------------------------------------+
157| Input Parameters : struct comedi_device *dev : Driver handle |
158| unsigned int *data : Data Pointer contains |
159| configuration parameters as below |
160| struct comedi_subdevice *s, :pointer to subdevice structure
161| struct comedi_insn *insn :pointer to insn structure |
162| data[0] :1:Memory on |
163| 0:Memory off |
164| |
165| |
166+----------------------------------------------------------------------------+
167| Output Parameters : -- |
168+----------------------------------------------------------------------------+
169| Return Value : TRUE : No error occur |
170| : FALSE : Error occur. Return the error |
171| |
172+----------------------------------------------------------------------------+
173*/
174int i_APCI1516_ConfigDigitalOutput(struct comedi_device *dev, struct comedi_subdevice *s,
175 struct comedi_insn *insn, unsigned int *data)
176{
177 devpriv->b_OutputMemoryStatus = data[0];
178 return insn->n;
179}
180
181/*
182+----------------------------------------------------------------------------+
183| Function Name : int i_APCI1516_WriteDigitalOutput |
184| (struct comedi_device *dev,struct comedi_subdevice *s,struct comedi_insn *insn,
185| unsigned int *data) |
186+----------------------------------------------------------------------------+
187| Task : Writes port value To the selected port |
188+----------------------------------------------------------------------------+
189| Input Parameters : struct comedi_device *dev : Driver handle |
190| struct comedi_subdevice *s, :pointer to subdevice structure
191| struct comedi_insn *insn :pointer to insn structure |
192| unsigned int *data : Data Pointer to read status |
193+----------------------------------------------------------------------------+
194| Output Parameters : -- |
195+----------------------------------------------------------------------------+
196| Return Value : TRUE : No error occur |
197| : FALSE : Error occur. Return the error |
198| |
199+----------------------------------------------------------------------------+
200*/
201
202int i_APCI1516_WriteDigitalOutput(struct comedi_device *dev, struct comedi_subdevice *s,
203 struct comedi_insn *insn, unsigned int *data)
204{
205 unsigned int ui_Temp, ui_Temp1;
206 unsigned int ui_NoOfChannel = CR_CHAN(insn->chanspec); /* get the channel */
207
208 printk("EL311003 : @=%x\n", devpriv->iobase + APCI1516_DIGITAL_OP);
209
210 if (devpriv->b_OutputMemoryStatus) {
211 ui_Temp = inw(devpriv->iobase + APCI1516_DIGITAL_OP);
212
213 } /* if(devpriv->b_OutputMemoryStatus ) */
214 else {
215 ui_Temp = 0;
216 } /* if(devpriv->b_OutputMemoryStatus ) */
217 if (data[3] == 0) {
218 if (data[1] == 0) {
219 data[0] = (data[0] << ui_NoOfChannel) | ui_Temp;
220 outw(data[0], devpriv->iobase + APCI1516_DIGITAL_OP);
221
222 printk("EL311003 : d=%d @=%x\n", data[0],
223 devpriv->iobase + APCI1516_DIGITAL_OP);
224
225 } /* if(data[1]==0) */
226 else {
227 if (data[1] == 1) {
228 switch (ui_NoOfChannel) {
229
230 case 2:
231 data[0] =
232 (data[0] << (2 *
233 data[2])) | ui_Temp;
234 break;
235
236 case 4:
237 data[0] =
238 (data[0] << (4 *
239 data[2])) | ui_Temp;
240 break;
241
242 case 7:
243 data[0] = data[0] | ui_Temp;
244 break;
245
246 default:
247 comedi_error(dev, " chan spec wrong");
248 return -EINVAL; /* "sorry channel spec wrong " */
249
250 } /* switch(ui_NoOfChannels) */
251
252 outw(data[0],
253 devpriv->iobase + APCI1516_DIGITAL_OP);
254
255 printk("EL311003 : d=%d @=%x\n", data[0],
256 devpriv->iobase + APCI1516_DIGITAL_OP);
257 } /* if(data[1]==1) */
258 else {
259 printk("\nSpecified channel not supported\n");
260 } /* else if(data[1]==1) */
261 } /* elseif(data[1]==0) */
262 } /* if(data[3]==0) */
263 else {
264 if (data[3] == 1) {
265 if (data[1] == 0) {
266 data[0] = ~data[0] & 0x1;
267 ui_Temp1 = 1;
268 ui_Temp1 = ui_Temp1 << ui_NoOfChannel;
269 ui_Temp = ui_Temp | ui_Temp1;
270 data[0] = (data[0] << ui_NoOfChannel) ^ 0xff;
271 data[0] = data[0] & ui_Temp;
272 outw(data[0],
273 devpriv->iobase + APCI1516_DIGITAL_OP);
274
275 printk("EL311003 : d=%d @=%x\n", data[0],
276 devpriv->iobase + APCI1516_DIGITAL_OP);
277
278 } /* if(data[1]==0) */
279 else {
280 if (data[1] == 1) {
281 switch (ui_NoOfChannel) {
282
283 case 2:
284 data[0] = ~data[0] & 0x3;
285 ui_Temp1 = 3;
286 ui_Temp1 =
287 ui_Temp1 << 2 * data[2];
288 ui_Temp = ui_Temp | ui_Temp1;
289 data[0] =
290 ((data[0] << (2 *
291 data
292 [2])) ^
293 0xff) & ui_Temp;
294 break;
295
296 case 4:
297 data[0] = ~data[0] & 0xf;
298 ui_Temp1 = 15;
299 ui_Temp1 =
300 ui_Temp1 << 4 * data[2];
301 ui_Temp = ui_Temp | ui_Temp1;
302 data[0] =
303 ((data[0] << (4 *
304 data
305 [2])) ^
306 0xff) & ui_Temp;
307 break;
308
309 case 7:
310 break;
311
312 default:
313 comedi_error(dev,
314 " chan spec wrong");
315 return -EINVAL; /* "sorry channel spec wrong " */
316
317 } /* switch(ui_NoOfChannels) */
318
319 outw(data[0],
320 devpriv->iobase +
321 APCI1516_DIGITAL_OP);
322
323 printk("EL311003 : d=%d @=%x\n",
324 data[0],
325 devpriv->iobase +
326 APCI1516_DIGITAL_OP);
327 } /* if(data[1]==1) */
328 else {
329 printk("\nSpecified channel not supported\n");
330 } /* else if(data[1]==1) */
331 } /* elseif(data[1]==0) */
332 } /* if(data[3]==1); */
333 else {
334 printk("\nSpecified functionality does not exist\n");
335 return -EINVAL;
336 } /* if else data[3]==1) */
337 } /* if else data[3]==0) */
338 return (insn->n);
339}
340
341/*
342+----------------------------------------------------------------------------+
343| Function Name : int i_APCI1516_ReadDigitalOutput |
344| (struct comedi_device *dev,struct comedi_subdevice *s,struct comedi_insn *insn,
345| unsigned int *data) |
346+----------------------------------------------------------------------------+
347| Task : Read value of the selected channel or port |
348+----------------------------------------------------------------------------+
349| Input Parameters : struct comedi_device *dev : Driver handle |
350| struct comedi_subdevice *s, :pointer to subdevice structure
351| struct comedi_insn *insn :pointer to insn structure |
352| unsigned int *data : Data Pointer to read status |
353+----------------------------------------------------------------------------+
354| Output Parameters : -- |
355+----------------------------------------------------------------------------+
356| Return Value : TRUE : No error occur |
357| : FALSE : Error occur. Return the error |
358| |
359+----------------------------------------------------------------------------+
360*/
361
362int i_APCI1516_ReadDigitalOutput(struct comedi_device *dev, struct comedi_subdevice *s,
363 struct comedi_insn *insn, unsigned int *data)
364{
365
366 unsigned int ui_Temp;
367 unsigned int ui_NoOfChannel = CR_CHAN(insn->chanspec); /* get the channel */
368 ui_Temp = data[0];
369 *data = inw(devpriv->iobase + APCI1516_DIGITAL_OP_RW);
370 if (ui_Temp == 0) {
371 *data = (*data >> ui_NoOfChannel) & 0x1;
372 } /* if(ui_Temp==0) */
373 else {
374 if (ui_Temp == 1) {
375 switch (ui_NoOfChannel) {
376
377 case 2:
378 *data = (*data >> (2 * data[1])) & 3;
379 break;
380
381 case 4:
382 *data = (*data >> (4 * data[1])) & 15;
383 break;
384
385 case 7:
386 break;
387
388 default:
389 comedi_error(dev, " chan spec wrong");
390 return -EINVAL; /* "sorry channel spec wrong " */
391
392 } /* switch(ui_NoOfChannels) */
393 } /* if(ui_Temp==1) */
394 else {
395 printk("\nSpecified channel not supported \n");
396 } /* elseif(ui_Temp==1) */
397 } /* elseif(ui_Temp==0) */
398 return insn->n;
399}
400
401/*
402+----------------------------------------------------------------------------+
403| Function Name : int i_APCI1516_ConfigWatchdog(struct comedi_device *dev,
404| struct comedi_subdevice *s,struct comedi_insn *insn,unsigned int *data) |
405| |
406+----------------------------------------------------------------------------+
407| Task : Configures The Watchdog |
408+----------------------------------------------------------------------------+
409| Input Parameters : struct comedi_device *dev : Driver handle |
410| struct comedi_subdevice *s, :pointer to subdevice structure
411| struct comedi_insn *insn :pointer to insn structure |
412| unsigned int *data : Data Pointer to read status |
413+----------------------------------------------------------------------------+
414| Output Parameters : -- |
415+----------------------------------------------------------------------------+
416| Return Value : TRUE : No error occur |
417| : FALSE : Error occur. Return the error |
418| |
419+----------------------------------------------------------------------------+
420*/
421
422int i_APCI1516_ConfigWatchdog(struct comedi_device *dev, struct comedi_subdevice *s,
423 struct comedi_insn *insn, unsigned int *data)
424{
425 if (data[0] == 0) {
426 /* Disable the watchdog */
427 outw(0x0,
428 devpriv->i_IobaseAddon +
429 APCI1516_WATCHDOG_ENABLEDISABLE);
430 /* Loading the Reload value */
431 outw(data[1],
432 devpriv->i_IobaseAddon +
433 APCI1516_WATCHDOG_RELOAD_VALUE);
434 data[1] = data[1] >> 16;
435 outw(data[1],
436 devpriv->i_IobaseAddon +
437 APCI1516_WATCHDOG_RELOAD_VALUE + 2);
438 } /* if(data[0]==0) */
439 else {
440 printk("\nThe input parameters are wrong\n");
441 return -EINVAL;
442 } /* elseif(data[0]==0) */
443
444 return insn->n;
445}
446
447 /*
448 +----------------------------------------------------------------------------+
449 | Function Name : int i_APCI1516_StartStopWriteWatchdog |
450 | (struct comedi_device *dev,struct comedi_subdevice *s,
451 struct comedi_insn *insn,unsigned int *data); |
452 +----------------------------------------------------------------------------+
453 | Task : Start / Stop The Watchdog |
454 +----------------------------------------------------------------------------+
455 | Input Parameters : struct comedi_device *dev : Driver handle |
456 | struct comedi_subdevice *s, :pointer to subdevice structure
457 struct comedi_insn *insn :pointer to insn structure |
458 | unsigned int *data : Data Pointer to read status |
459 +----------------------------------------------------------------------------+
460 | Output Parameters : -- |
461 +----------------------------------------------------------------------------+
462 | Return Value : TRUE : No error occur |
463 | : FALSE : Error occur. Return the error |
464 | |
465 +----------------------------------------------------------------------------+
466 */
467
468int i_APCI1516_StartStopWriteWatchdog(struct comedi_device *dev, struct comedi_subdevice *s,
469 struct comedi_insn *insn, unsigned int *data)
470{
471 switch (data[0]) {
472 case 0: /* stop the watchdog */
473 outw(0x0, devpriv->i_IobaseAddon + APCI1516_WATCHDOG_ENABLEDISABLE); /* disable the watchdog */
474 break;
475 case 1: /* start the watchdog */
476 outw(0x0001,
477 devpriv->i_IobaseAddon +
478 APCI1516_WATCHDOG_ENABLEDISABLE);
479 break;
480 case 2: /* Software trigger */
481 outw(0x0201,
482 devpriv->i_IobaseAddon +
483 APCI1516_WATCHDOG_ENABLEDISABLE);
484 break;
485 default:
486 printk("\nSpecified functionality does not exist\n");
487 return -EINVAL;
488 } /* switch(data[0]) */
489 return insn->n;
490}
491
492/*
493+----------------------------------------------------------------------------+
494| Function Name : int i_APCI1516_ReadWatchdog |
495| (struct comedi_device *dev,struct comedi_subdevice *s,struct comedi_insn *insn,
496 unsigned int *data); |
497+----------------------------------------------------------------------------+
498| Task : Read The Watchdog |
499+----------------------------------------------------------------------------+
500| Input Parameters : struct comedi_device *dev : Driver handle |
501| struct comedi_subdevice *s, :pointer to subdevice structure
502 struct comedi_insn *insn :pointer to insn structure |
503| unsigned int *data : Data Pointer to read status |
504+----------------------------------------------------------------------------+
505| Output Parameters : -- |
506+----------------------------------------------------------------------------+
507| Return Value : TRUE : No error occur |
508| : FALSE : Error occur. Return the error |
509| |
510+----------------------------------------------------------------------------+
511*/
512
513int i_APCI1516_ReadWatchdog(struct comedi_device *dev, struct comedi_subdevice *s,
514 struct comedi_insn *insn, unsigned int *data)
515{
516 data[0] = inw(devpriv->i_IobaseAddon + APCI1516_WATCHDOG_STATUS) & 0x1;
517 return insn->n;
518}
519
520/*
521+----------------------------------------------------------------------------+
522| Function Name : int i_APCI1516_Reset(struct comedi_device *dev) | |
523+----------------------------------------------------------------------------+
524| Task :resets all the registers |
525+----------------------------------------------------------------------------+
526| Input Parameters : struct comedi_device *dev
527+----------------------------------------------------------------------------+
528| Output Parameters : -- |
529+----------------------------------------------------------------------------+
530| Return Value : |
531| |
532+----------------------------------------------------------------------------+
533*/
534
535int i_APCI1516_Reset(struct comedi_device *dev)
536{
537 outw(0x0, devpriv->iobase + APCI1516_DIGITAL_OP); /* RESETS THE DIGITAL OUTPUTS */
538 outw(0x0, devpriv->i_IobaseAddon + APCI1516_WATCHDOG_ENABLEDISABLE);
539 outw(0x0, devpriv->i_IobaseAddon + APCI1516_WATCHDOG_RELOAD_VALUE);
540 outw(0x0, devpriv->i_IobaseAddon + APCI1516_WATCHDOG_RELOAD_VALUE + 2);
541 return 0;
542}
diff --git a/drivers/staging/comedi/drivers/addi-data/hwdrv_apci1516.h b/drivers/staging/comedi/drivers/addi-data/hwdrv_apci1516.h
deleted file mode 100644
index 44728293e494..000000000000
--- a/drivers/staging/comedi/drivers/addi-data/hwdrv_apci1516.h
+++ /dev/null
@@ -1,65 +0,0 @@
1/*
2 * Copyright (C) 2004,2005 ADDI-DATA GmbH for the source code of this module.
3 *
4 * ADDI-DATA GmbH
5 * Dieselstrasse 3
6 * D-77833 Ottersweier
7 * Tel: +19(0)7223/9493-0
8 * Fax: +49(0)7223/9493-92
9 * http://www.addi-data.com
10 * info@addi-data.com
11 *
12 * This program is free software; you can redistribute it and/or modify it
13 * under the terms of the GNU General Public License as published by the Free
14 * Software Foundation; either version 2 of the License, or (at your option)
15 * any later version.
16 */
17
18/********* Definitions for APCI-1516 card *****/
19
20/* Card Specific information */
21#define APCI1516_BOARD_VENDOR_ID 0x15B8
22#define APCI1516_ADDRESS_RANGE 8
23
24/* DIGITAL INPUT-OUTPUT DEFINE */
25
26#define APCI1516_DIGITAL_OP 4
27#define APCI1516_DIGITAL_OP_RW 4
28#define APCI1516_DIGITAL_IP 0
29
30/* TIMER COUNTER WATCHDOG DEFINES */
31
32#define ADDIDATA_WATCHDOG 2
33#define APCI1516_DIGITAL_OP_WATCHDOG 0
34#define APCI1516_WATCHDOG_ENABLEDISABLE 12
35#define APCI1516_WATCHDOG_RELOAD_VALUE 4
36#define APCI1516_WATCHDOG_STATUS 16
37
38/* Hardware Layer functions for Apci1516 */
39
40/* Digital Input */
41int i_APCI1516_ReadMoreDigitalInput(struct comedi_device *dev, struct comedi_subdevice *s,
42 struct comedi_insn *insn, unsigned int *data);
43int i_APCI1516_Read1DigitalInput(struct comedi_device *dev, struct comedi_subdevice *s,
44 struct comedi_insn *insn, unsigned int *data);
45
46/* Digital Output */
47int i_APCI1516_ConfigDigitalOutput(struct comedi_device *dev, struct comedi_subdevice *s,
48 struct comedi_insn *insn, unsigned int *data);
49int i_APCI1516_WriteDigitalOutput(struct comedi_device *dev, struct comedi_subdevice *s,
50 struct comedi_insn *insn, unsigned int *data);
51int i_APCI1516_ReadDigitalOutput(struct comedi_device *dev, struct comedi_subdevice *s,
52 struct comedi_insn *insn, unsigned int *data);
53
54/*
55* TIMER timer value is passed as u seconds
56*/
57int i_APCI1516_ConfigWatchdog(struct comedi_device *dev, struct comedi_subdevice *s,
58 struct comedi_insn *insn, unsigned int *data);
59int i_APCI1516_StartStopWriteWatchdog(struct comedi_device *dev, struct comedi_subdevice *s,
60 struct comedi_insn *insn, unsigned int *data);
61int i_APCI1516_ReadWatchdog(struct comedi_device *dev, struct comedi_subdevice *s,
62 struct comedi_insn *insn, unsigned int *data);
63
64/* reset */
65int i_APCI1516_Reset(struct comedi_device *dev);
diff --git a/drivers/staging/comedi/drivers/addi-data/hwdrv_apci1564.c b/drivers/staging/comedi/drivers/addi-data/hwdrv_apci1564.c
index 5b92e45c9ae3..fc31c4b93407 100644
--- a/drivers/staging/comedi/drivers/addi-data/hwdrv_apci1564.c
+++ b/drivers/staging/comedi/drivers/addi-data/hwdrv_apci1564.c
@@ -46,14 +46,62 @@ You should also find the complete GPL in the COPYING file accompanying this sour
46 +----------+-----------+------------------------------------------------+ 46 +----------+-----------+------------------------------------------------+
47*/ 47*/
48 48
49/* 49/********* Definitions for APCI-1564 card *****/
50+----------------------------------------------------------------------------+ 50
51| Included files | 51#define APCI1564_ADDRESS_RANGE 128
52+----------------------------------------------------------------------------+ 52
53*/ 53/* DIGITAL INPUT-OUTPUT DEFINE */
54 54/* Input defines */
55#include <linux/delay.h> 55#define APCI1564_DIGITAL_IP 0x04
56#include "hwdrv_apci1564.h" 56#define APCI1564_DIGITAL_IP_INTERRUPT_MODE1 4
57#define APCI1564_DIGITAL_IP_INTERRUPT_MODE2 8
58#define APCI1564_DIGITAL_IP_IRQ 16
59
60/* Output defines */
61#define APCI1564_DIGITAL_OP 0x18
62#define APCI1564_DIGITAL_OP_RW 0
63#define APCI1564_DIGITAL_OP_INTERRUPT 4
64#define APCI1564_DIGITAL_OP_IRQ 12
65
66/* Digital Input IRQ Function Selection */
67#define ADDIDATA_OR 0
68#define ADDIDATA_AND 1
69
70/* Digital Input Interrupt Status */
71#define APCI1564_DIGITAL_IP_INTERRUPT_STATUS 12
72
73/* Digital Output Interrupt Status */
74#define APCI1564_DIGITAL_OP_INTERRUPT_STATUS 8
75
76/* Digital Input Interrupt Enable Disable. */
77#define APCI1564_DIGITAL_IP_INTERRUPT_ENABLE 0x4
78#define APCI1564_DIGITAL_IP_INTERRUPT_DISABLE 0xfffffffb
79
80/* Digital Output Interrupt Enable Disable. */
81#define APCI1564_DIGITAL_OP_VCC_INTERRUPT_ENABLE 0x1
82#define APCI1564_DIGITAL_OP_VCC_INTERRUPT_DISABLE 0xfffffffe
83#define APCI1564_DIGITAL_OP_CC_INTERRUPT_ENABLE 0x2
84#define APCI1564_DIGITAL_OP_CC_INTERRUPT_DISABLE 0xfffffffd
85
86/* TIMER COUNTER WATCHDOG DEFINES */
87
88#define ADDIDATA_TIMER 0
89#define ADDIDATA_COUNTER 1
90#define ADDIDATA_WATCHDOG 2
91#define APCI1564_DIGITAL_OP_WATCHDOG 0x28
92#define APCI1564_TIMER 0x48
93#define APCI1564_COUNTER1 0x0
94#define APCI1564_COUNTER2 0x20
95#define APCI1564_COUNTER3 0x40
96#define APCI1564_COUNTER4 0x60
97#define APCI1564_TCW_SYNC_ENABLEDISABLE 0
98#define APCI1564_TCW_RELOAD_VALUE 4
99#define APCI1564_TCW_TIMEBASE 8
100#define APCI1564_TCW_PROG 12
101#define APCI1564_TCW_TRIG_STATUS 16
102#define APCI1564_TCW_IRQ 20
103#define APCI1564_TCW_WARN_TIMEVAL 24
104#define APCI1564_TCW_WARN_TIMEBASE 28
57 105
58/* Global variables */ 106/* Global variables */
59static unsigned int ui_InterruptStatus_1564 = 0; 107static unsigned int ui_InterruptStatus_1564 = 0;
@@ -86,9 +134,13 @@ static unsigned int ui_InterruptData, ui_Type;
86| | 134| |
87+----------------------------------------------------------------------------+ 135+----------------------------------------------------------------------------+
88*/ 136*/
89int i_APCI1564_ConfigDigitalInput(struct comedi_device *dev, struct comedi_subdevice *s, 137static int i_APCI1564_ConfigDigitalInput(struct comedi_device *dev,
90 struct comedi_insn *insn, unsigned int *data) 138 struct comedi_subdevice *s,
139 struct comedi_insn *insn,
140 unsigned int *data)
91{ 141{
142 struct addi_private *devpriv = dev->private;
143
92 devpriv->tsk_Current = current; 144 devpriv->tsk_Current = current;
93 /*******************************/ 145 /*******************************/
94 /* Set the digital input logic */ 146 /* Set the digital input logic */
@@ -128,107 +180,15 @@ int i_APCI1564_ConfigDigitalInput(struct comedi_device *dev, struct comedi_subde
128 return insn->n; 180 return insn->n;
129} 181}
130 182
131/* 183static int apci1564_di_insn_bits(struct comedi_device *dev,
132+----------------------------------------------------------------------------+ 184 struct comedi_subdevice *s,
133| Function Name : int i_APCI1564_Read1DigitalInput | 185 struct comedi_insn *insn,
134| (struct comedi_device *dev,struct comedi_subdevice *s, | 186 unsigned int *data)
135| struct comedi_insn *insn,unsigned int *data) |
136+----------------------------------------------------------------------------+
137| Task : Return the status of the digital input |
138+----------------------------------------------------------------------------+
139| Input Parameters : struct comedi_device *dev : Driver handle |
140| unsigned int ui_Channel : Channel number to read |
141| unsigned int *data : Data Pointer to read status |
142+----------------------------------------------------------------------------+
143| Output Parameters : -- |
144+----------------------------------------------------------------------------+
145| Return Value : TRUE : No error occur |
146| : FALSE : Error occur. Return the error |
147| |
148+----------------------------------------------------------------------------+
149*/
150int i_APCI1564_Read1DigitalInput(struct comedi_device *dev, struct comedi_subdevice *s,
151 struct comedi_insn *insn, unsigned int *data)
152{ 187{
153 unsigned int ui_TmpValue = 0; 188 struct addi_private *devpriv = dev->private;
154 unsigned int ui_Channel;
155 189
156 ui_Channel = CR_CHAN(insn->chanspec); 190 data[1] = inl(devpriv->i_IobaseAmcc + APCI1564_DIGITAL_IP);
157 if (ui_Channel <= 31) {
158 ui_TmpValue =
159 (unsigned int) inl(devpriv->i_IobaseAmcc + APCI1564_DIGITAL_IP);
160/*
161* since only 1 channel reqd to bring it to last bit it is rotated 8
162* +(chan - 1) times then ANDed with 1 for last bit.
163*/
164 *data = (ui_TmpValue >> ui_Channel) & 0x1;
165 } /* if (ui_Channel >= 0 && ui_Channel <=31) */
166 else {
167 comedi_error(dev, "Not a valid channel number !!! \n");
168 return -EINVAL; /* "sorry channel spec wrong " */
169 } /* else if (ui_Channel >= 0 && ui_Channel <=31) */
170 return insn->n;
171}
172 191
173/*
174+----------------------------------------------------------------------------+
175| Function Name : int i_APCI1564_ReadMoreDigitalInput |
176| (struct comedi_device *dev,struct comedi_subdevice *s, |
177| struct comedi_insn *insn,unsigned int *data) |
178+----------------------------------------------------------------------------+
179| Task : Return the status of the Requested digital inputs |
180+----------------------------------------------------------------------------+
181| Input Parameters : struct comedi_device *dev : Driver handle |
182| unsigned int ui_NoOfChannels : No Of Channels To be Read |
183| unsigned int *data : Data Pointer to read status |
184+----------------------------------------------------------------------------+
185| Output Parameters : -- |
186+----------------------------------------------------------------------------+
187| Return Value : TRUE : No error occur |
188| : FALSE : Error occur. Return the error |
189| |
190+----------------------------------------------------------------------------+
191*/
192int i_APCI1564_ReadMoreDigitalInput(struct comedi_device *dev, struct comedi_subdevice *s,
193 struct comedi_insn *insn, unsigned int *data)
194{
195 unsigned int ui_PortValue = data[0];
196 unsigned int ui_Mask = 0;
197 unsigned int ui_NoOfChannels;
198
199 ui_NoOfChannels = CR_CHAN(insn->chanspec);
200 if (data[1] == 0) {
201 *data = (unsigned int) inl(devpriv->i_IobaseAmcc + APCI1564_DIGITAL_IP);
202 switch (ui_NoOfChannels) {
203 case 2:
204 ui_Mask = 3;
205 *data = (*data >> (2 * ui_PortValue)) & ui_Mask;
206 break;
207 case 4:
208 ui_Mask = 15;
209 *data = (*data >> (4 * ui_PortValue)) & ui_Mask;
210 break;
211 case 8:
212 ui_Mask = 255;
213 *data = (*data >> (8 * ui_PortValue)) & ui_Mask;
214 break;
215 case 16:
216 ui_Mask = 65535;
217 *data = (*data >> (16 * ui_PortValue)) & ui_Mask;
218 break;
219 case 31:
220 break;
221 default:
222 comedi_error(dev, "Not a valid Channel number !!!\n");
223 return -EINVAL; /* "sorry channel spec wrong " */
224 break;
225 } /* switch (ui_NoOfChannels) */
226 } /* if (data[1]==0) */
227 else {
228 if (data[1] == 1) {
229 *data = ui_InterruptStatus_1564;
230 } /* if (data[1]==1) */
231 } /* else if (data[1]==0) */
232 return insn->n; 192 return insn->n;
233} 193}
234 194
@@ -257,9 +217,12 @@ int i_APCI1564_ReadMoreDigitalInput(struct comedi_device *dev, struct comedi_sub
257| | 217| |
258+----------------------------------------------------------------------------+ 218+----------------------------------------------------------------------------+
259*/ 219*/
260int i_APCI1564_ConfigDigitalOutput(struct comedi_device *dev, struct comedi_subdevice *s, 220static int i_APCI1564_ConfigDigitalOutput(struct comedi_device *dev,
261 struct comedi_insn *insn, unsigned int *data) 221 struct comedi_subdevice *s,
222 struct comedi_insn *insn,
223 unsigned int *data)
262{ 224{
225 struct addi_private *devpriv = dev->private;
263 unsigned int ul_Command = 0; 226 unsigned int ul_Command = 0;
264 227
265 if ((data[0] != 0) && (data[0] != 1)) { 228 if ((data[0] != 0) && (data[0] != 1)) {
@@ -295,244 +258,27 @@ int i_APCI1564_ConfigDigitalOutput(struct comedi_device *dev, struct comedi_subd
295 return insn->n; 258 return insn->n;
296} 259}
297 260
298/* 261static int apci1564_do_insn_bits(struct comedi_device *dev,
299+----------------------------------------------------------------------------+ 262 struct comedi_subdevice *s,
300| Function Name : int i_APCI1564_WriteDigitalOutput | 263 struct comedi_insn *insn,
301| (struct comedi_device *dev,struct comedi_subdevice *s, | 264 unsigned int *data)
302| struct comedi_insn *insn,unsigned int *data) |
303+----------------------------------------------------------------------------+
304| Task : Writes port value To the selected port |
305+----------------------------------------------------------------------------+
306| Input Parameters : struct comedi_device *dev : Driver handle |
307| unsigned int ui_NoOfChannels : No Of Channels To Write |
308| unsigned int *data : Data Pointer to read status |
309+----------------------------------------------------------------------------+
310| Output Parameters : -- |
311+----------------------------------------------------------------------------+
312| Return Value : TRUE : No error occur |
313| : FALSE : Error occur. Return the error |
314| |
315+----------------------------------------------------------------------------+
316*/
317int i_APCI1564_WriteDigitalOutput(struct comedi_device *dev, struct comedi_subdevice *s,
318 struct comedi_insn *insn, unsigned int *data)
319{ 265{
320 unsigned int ui_Temp, ui_Temp1; 266 struct addi_private *devpriv = dev->private;
321 unsigned int ui_NoOfChannel; 267 unsigned int mask = data[0];
268 unsigned int bits = data[1];
322 269
323 ui_NoOfChannel = CR_CHAN(insn->chanspec); 270 s->state = inl(devpriv->i_IobaseAmcc + APCI1564_DIGITAL_OP +
324 if (devpriv->b_OutputMemoryStatus) {
325 ui_Temp =
326 inl(devpriv->i_IobaseAmcc + APCI1564_DIGITAL_OP +
327 APCI1564_DIGITAL_OP_RW); 271 APCI1564_DIGITAL_OP_RW);
328 } /* if (devpriv->b_OutputMemoryStatus ) */ 272 if (mask) {
329 else { 273 s->state &= ~mask;
330 ui_Temp = 0; 274 s->state |= (bits & mask);
331 } /* else if (devpriv->b_OutputMemoryStatus ) */ 275
332 if (data[3] == 0) { 276 outl(s->state, devpriv->i_IobaseAmcc + APCI1564_DIGITAL_OP +
333 if (data[1] == 0) { 277 APCI1564_DIGITAL_OP_RW);
334 data[0] = (data[0] << ui_NoOfChannel) | ui_Temp; 278 }
335 outl(data[0], 279
336 devpriv->i_IobaseAmcc + APCI1564_DIGITAL_OP + 280 data[1] = s->state;
337 APCI1564_DIGITAL_OP_RW);
338 } /* if (data[1]==0) */
339 else {
340 if (data[1] == 1) {
341 switch (ui_NoOfChannel) {
342 case 2:
343 data[0] =
344 (data[0] << (2 *
345 data[2])) | ui_Temp;
346 break;
347 case 4:
348 data[0] =
349 (data[0] << (4 *
350 data[2])) | ui_Temp;
351 break;
352 case 8:
353 data[0] =
354 (data[0] << (8 *
355 data[2])) | ui_Temp;
356 break;
357 case 16:
358 data[0] =
359 (data[0] << (16 *
360 data[2])) | ui_Temp;
361 break;
362 case 31:
363 data[0] = data[0] | ui_Temp;
364 break;
365 default:
366 comedi_error(dev, " chan spec wrong");
367 return -EINVAL; /* "sorry channel spec wrong " */
368 } /* switch (ui_NoOfChannels) */
369 outl(data[0],
370 devpriv->i_IobaseAmcc +
371 APCI1564_DIGITAL_OP +
372 APCI1564_DIGITAL_OP_RW);
373 } /* if (data[1]==1) */
374 else {
375 printk("\nSpecified channel not supported\n");
376 } /* else if (data[1]==1) */
377 } /* else if (data[1]==0) */
378 } /* if(data[3]==0) */
379 else {
380 if (data[3] == 1) {
381 if (data[1] == 0) {
382 data[0] = ~data[0] & 0x1;
383 ui_Temp1 = 1;
384 ui_Temp1 = ui_Temp1 << ui_NoOfChannel;
385 ui_Temp = ui_Temp | ui_Temp1;
386 data[0] =
387 (data[0] << ui_NoOfChannel) ^
388 0xffffffff;
389 data[0] = data[0] & ui_Temp;
390 outl(data[0],
391 devpriv->i_IobaseAmcc +
392 APCI1564_DIGITAL_OP +
393 APCI1564_DIGITAL_OP_RW);
394 } /* if (data[1]==0) */
395 else {
396 if (data[1] == 1) {
397 switch (ui_NoOfChannel) {
398 case 2:
399 data[0] = ~data[0] & 0x3;
400 ui_Temp1 = 3;
401 ui_Temp1 =
402 ui_Temp1 << 2 * data[2];
403 ui_Temp = ui_Temp | ui_Temp1;
404 data[0] =
405 ((data[0] << (2 *
406 data
407 [2])) ^
408 0xffffffff) & ui_Temp;
409 break;
410 case 4:
411 data[0] = ~data[0] & 0xf;
412 ui_Temp1 = 15;
413 ui_Temp1 =
414 ui_Temp1 << 4 * data[2];
415 ui_Temp = ui_Temp | ui_Temp1;
416 data[0] =
417 ((data[0] << (4 *
418 data
419 [2])) ^
420 0xffffffff) & ui_Temp;
421 break;
422 case 8:
423 data[0] = ~data[0] & 0xff;
424 ui_Temp1 = 255;
425 ui_Temp1 =
426 ui_Temp1 << 8 * data[2];
427 ui_Temp = ui_Temp | ui_Temp1;
428 data[0] =
429 ((data[0] << (8 *
430 data
431 [2])) ^
432 0xffffffff) & ui_Temp;
433 break;
434 case 16:
435 data[0] = ~data[0] & 0xffff;
436 ui_Temp1 = 65535;
437 ui_Temp1 =
438 ui_Temp1 << 16 *
439 data[2];
440 ui_Temp = ui_Temp | ui_Temp1;
441 data[0] =
442 ((data[0] << (16 *
443 data
444 [2])) ^
445 0xffffffff) & ui_Temp;
446 break;
447 case 31:
448 break;
449 default:
450 comedi_error(dev,
451 " chan spec wrong");
452 return -EINVAL; /* "sorry channel spec wrong " */
453 } /* switch(ui_NoOfChannels) */
454 outl(data[0],
455 devpriv->i_IobaseAmcc +
456 APCI1564_DIGITAL_OP +
457 APCI1564_DIGITAL_OP_RW);
458 } /* if (data[1]==1) */
459 else {
460 printk("\nSpecified channel not supported\n");
461 } /* else if (data[1]==1) */
462 } /* else if (data[1]==0) */
463 } /* if (data[3]==1); */
464 else {
465 printk("\nSpecified functionality does not exist\n");
466 return -EINVAL;
467 } /* else if (data[3]==1) */
468 } /* else if (data[3]==0) */
469 return insn->n;
470}
471 281
472/*
473+----------------------------------------------------------------------------+
474| Function Name : int i_APCI1564_ReadDigitalOutput |
475| (struct comedi_device *dev,struct comedi_subdevice *s, |
476| struct comedi_insn *insn,unsigned int *data) |
477+----------------------------------------------------------------------------+
478| Task : Read value of the selected channel or port |
479+----------------------------------------------------------------------------+
480| Input Parameters : struct comedi_device *dev : Driver handle |
481| unsigned int ui_NoOfChannels : No Of Channels To read |
482| unsigned int *data : Data Pointer to read status |
483+----------------------------------------------------------------------------+
484| Output Parameters : -- |
485+----------------------------------------------------------------------------+
486| Return Value : TRUE : No error occur |
487| : FALSE : Error occur. Return the error |
488| |
489+----------------------------------------------------------------------------+
490*/
491int i_APCI1564_ReadDigitalOutput(struct comedi_device *dev, struct comedi_subdevice *s,
492 struct comedi_insn *insn, unsigned int *data)
493{
494 unsigned int ui_Temp;
495 unsigned int ui_NoOfChannel;
496
497 ui_NoOfChannel = CR_CHAN(insn->chanspec);
498 ui_Temp = data[0];
499 *data = inl(devpriv->i_IobaseAmcc + APCI1564_DIGITAL_OP +
500 APCI1564_DIGITAL_OP_RW);
501 if (ui_Temp == 0) {
502 *data = (*data >> ui_NoOfChannel) & 0x1;
503 } /* if (ui_Temp==0) */
504 else {
505 if (ui_Temp == 1) {
506 switch (ui_NoOfChannel) {
507 case 2:
508 *data = (*data >> (2 * data[1])) & 3;
509 break;
510
511 case 4:
512 *data = (*data >> (4 * data[1])) & 15;
513 break;
514
515 case 8:
516 *data = (*data >> (8 * data[1])) & 255;
517 break;
518
519 case 16:
520 *data = (*data >> (16 * data[1])) & 65535;
521 break;
522
523 case 31:
524 break;
525
526 default:
527 comedi_error(dev, " chan spec wrong");
528 return -EINVAL; /* "sorry channel spec wrong " */
529 break;
530 } /* switch(ui_NoOfChannels) */
531 } /* if (ui_Temp==1) */
532 else {
533 printk("\nSpecified channel not supported \n");
534 } /* else if (ui_Temp==1) */
535 } /* else if (ui_Temp==0) */
536 return insn->n; 282 return insn->n;
537} 283}
538 284
@@ -566,10 +312,14 @@ int i_APCI1564_ReadDigitalOutput(struct comedi_device *dev, struct comedi_subdev
566| | 312| |
567+----------------------------------------------------------------------------+ 313+----------------------------------------------------------------------------+
568*/ 314*/
569int i_APCI1564_ConfigTimerCounterWatchdog(struct comedi_device *dev, 315static int i_APCI1564_ConfigTimerCounterWatchdog(struct comedi_device *dev,
570 struct comedi_subdevice *s, struct comedi_insn *insn, unsigned int *data) 316 struct comedi_subdevice *s,
317 struct comedi_insn *insn,
318 unsigned int *data)
571{ 319{
320 struct addi_private *devpriv = dev->private;
572 unsigned int ul_Command1 = 0; 321 unsigned int ul_Command1 = 0;
322
573 devpriv->tsk_Current = current; 323 devpriv->tsk_Current = current;
574 if (data[0] == ADDIDATA_WATCHDOG) { 324 if (data[0] == ADDIDATA_WATCHDOG) {
575 devpriv->b_TimerSelectMode = ADDIDATA_WATCHDOG; 325 devpriv->b_TimerSelectMode = ADDIDATA_WATCHDOG;
@@ -720,10 +470,14 @@ int i_APCI1564_ConfigTimerCounterWatchdog(struct comedi_device *dev,
720| | 470| |
721+----------------------------------------------------------------------------+ 471+----------------------------------------------------------------------------+
722*/ 472*/
723int i_APCI1564_StartStopWriteTimerCounterWatchdog(struct comedi_device *dev, 473static int i_APCI1564_StartStopWriteTimerCounterWatchdog(struct comedi_device *dev,
724 struct comedi_subdevice *s, struct comedi_insn *insn, unsigned int *data) 474 struct comedi_subdevice *s,
475 struct comedi_insn *insn,
476 unsigned int *data)
725{ 477{
478 struct addi_private *devpriv = dev->private;
726 unsigned int ul_Command1 = 0; 479 unsigned int ul_Command1 = 0;
480
727 if (devpriv->b_TimerSelectMode == ADDIDATA_WATCHDOG) { 481 if (devpriv->b_TimerSelectMode == ADDIDATA_WATCHDOG) {
728 switch (data[1]) { 482 switch (data[1]) {
729 case 0: /* stop the watchdog */ 483 case 0: /* stop the watchdog */
@@ -815,9 +569,12 @@ int i_APCI1564_StartStopWriteTimerCounterWatchdog(struct comedi_device *dev,
815| | 569| |
816+----------------------------------------------------------------------------+ 570+----------------------------------------------------------------------------+
817*/ 571*/
818int i_APCI1564_ReadTimerCounterWatchdog(struct comedi_device *dev, 572static int i_APCI1564_ReadTimerCounterWatchdog(struct comedi_device *dev,
819 struct comedi_subdevice *s, struct comedi_insn *insn, unsigned int *data) 573 struct comedi_subdevice *s,
574 struct comedi_insn *insn,
575 unsigned int *data)
820{ 576{
577 struct addi_private *devpriv = dev->private;
821 unsigned int ul_Command1 = 0; 578 unsigned int ul_Command1 = 0;
822 579
823 if (devpriv->b_TimerSelectMode == ADDIDATA_WATCHDOG) { 580 if (devpriv->b_TimerSelectMode == ADDIDATA_WATCHDOG) {
@@ -894,8 +651,10 @@ int i_APCI1564_ReadTimerCounterWatchdog(struct comedi_device *dev,
894+----------------------------------------------------------------------------+ 651+----------------------------------------------------------------------------+
895*/ 652*/
896 653
897int i_APCI1564_ReadInterruptStatus(struct comedi_device *dev, struct comedi_subdevice *s, 654static int i_APCI1564_ReadInterruptStatus(struct comedi_device *dev,
898 struct comedi_insn *insn, unsigned int *data) 655 struct comedi_subdevice *s,
656 struct comedi_insn *insn,
657 unsigned int *data)
899{ 658{
900 *data = ui_Type; 659 *data = ui_Type;
901 return insn->n; 660 return insn->n;
@@ -921,10 +680,12 @@ int i_APCI1564_ReadInterruptStatus(struct comedi_device *dev, struct comedi_subd
921static void v_APCI1564_Interrupt(int irq, void *d) 680static void v_APCI1564_Interrupt(int irq, void *d)
922{ 681{
923 struct comedi_device *dev = d; 682 struct comedi_device *dev = d;
683 struct addi_private *devpriv = dev->private;
924 unsigned int ui_DO, ui_DI; 684 unsigned int ui_DO, ui_DI;
925 unsigned int ui_Timer; 685 unsigned int ui_Timer;
926 unsigned int ui_C1, ui_C2, ui_C3, ui_C4; 686 unsigned int ui_C1, ui_C2, ui_C3, ui_C4;
927 unsigned int ul_Command2 = 0; 687 unsigned int ul_Command2 = 0;
688
928 ui_DI = inl(devpriv->i_IobaseAmcc + APCI1564_DIGITAL_IP + 689 ui_DI = inl(devpriv->i_IobaseAmcc + APCI1564_DIGITAL_IP +
929 APCI1564_DIGITAL_IP_IRQ) & 0x01; 690 APCI1564_DIGITAL_IP_IRQ) & 0x01;
930 ui_DO = inl(devpriv->i_IobaseAmcc + APCI1564_DIGITAL_OP + 691 ui_DO = inl(devpriv->i_IobaseAmcc + APCI1564_DIGITAL_OP +
@@ -1104,8 +865,10 @@ static void v_APCI1564_Interrupt(int irq, void *d)
1104+----------------------------------------------------------------------------+ 865+----------------------------------------------------------------------------+
1105*/ 866*/
1106 867
1107int i_APCI1564_Reset(struct comedi_device *dev) 868static int i_APCI1564_Reset(struct comedi_device *dev)
1108{ 869{
870 struct addi_private *devpriv = dev->private;
871
1109 outl(0x0, devpriv->i_IobaseAmcc + APCI1564_DIGITAL_IP_IRQ); /* disable the interrupts */ 872 outl(0x0, devpriv->i_IobaseAmcc + APCI1564_DIGITAL_IP_IRQ); /* disable the interrupts */
1110 inl(devpriv->i_IobaseAmcc + APCI1564_DIGITAL_IP_INTERRUPT_STATUS); /* Reset the interrupt status register */ 873 inl(devpriv->i_IobaseAmcc + APCI1564_DIGITAL_IP_INTERRUPT_STATUS); /* Reset the interrupt status register */
1111 outl(0x0, devpriv->i_IobaseAmcc + APCI1564_DIGITAL_IP_INTERRUPT_MODE1); /* Disable the and/or interrupt */ 874 outl(0x0, devpriv->i_IobaseAmcc + APCI1564_DIGITAL_IP_INTERRUPT_MODE1); /* Disable the and/or interrupt */
diff --git a/drivers/staging/comedi/drivers/addi-data/hwdrv_apci1564.h b/drivers/staging/comedi/drivers/addi-data/hwdrv_apci1564.h
deleted file mode 100644
index c91594d56a42..000000000000
--- a/drivers/staging/comedi/drivers/addi-data/hwdrv_apci1564.h
+++ /dev/null
@@ -1,121 +0,0 @@
1/*
2 * Copyright (C) 2004,2005 ADDI-DATA GmbH for the source code of this module.
3 *
4 * ADDI-DATA GmbH
5 * Dieselstrasse 3
6 * D-77833 Ottersweier
7 * Tel: +19(0)7223/9493-0
8 * Fax: +49(0)7223/9493-92
9 * http://www.addi-data.com
10 * info@addi-data.com
11 *
12 * This program is free software; you can redistribute it and/or modify it
13 * under the terms of the GNU General Public License as published by the Free
14 * Software Foundation; either version 2 of the License, or (at your option)
15 * any later version.
16 */
17
18/********* Definitions for APCI-1564 card *****/
19
20#define APCI1564_BOARD_VENDOR_ID 0x15B8
21#define APCI1564_ADDRESS_RANGE 128
22
23/* DIGITAL INPUT-OUTPUT DEFINE */
24/* Input defines */
25#define APCI1564_DIGITAL_IP 0x04
26#define APCI1564_DIGITAL_IP_INTERRUPT_MODE1 4
27#define APCI1564_DIGITAL_IP_INTERRUPT_MODE2 8
28#define APCI1564_DIGITAL_IP_IRQ 16
29
30/* Output defines */
31#define APCI1564_DIGITAL_OP 0x18
32#define APCI1564_DIGITAL_OP_RW 0
33#define APCI1564_DIGITAL_OP_INTERRUPT 4
34#define APCI1564_DIGITAL_OP_IRQ 12
35
36/* Digital Input IRQ Function Selection */
37#define ADDIDATA_OR 0
38#define ADDIDATA_AND 1
39
40/* Digital Input Interrupt Status */
41#define APCI1564_DIGITAL_IP_INTERRUPT_STATUS 12
42
43/* Digital Output Interrupt Status */
44#define APCI1564_DIGITAL_OP_INTERRUPT_STATUS 8
45
46/* Digital Input Interrupt Enable Disable. */
47#define APCI1564_DIGITAL_IP_INTERRUPT_ENABLE 0x4
48#define APCI1564_DIGITAL_IP_INTERRUPT_DISABLE 0xFFFFFFFB
49
50/* Digital Output Interrupt Enable Disable. */
51#define APCI1564_DIGITAL_OP_VCC_INTERRUPT_ENABLE 0x1
52#define APCI1564_DIGITAL_OP_VCC_INTERRUPT_DISABLE 0xFFFFFFFE
53#define APCI1564_DIGITAL_OP_CC_INTERRUPT_ENABLE 0x2
54#define APCI1564_DIGITAL_OP_CC_INTERRUPT_DISABLE 0xFFFFFFFD
55
56/* ADDIDATA Enable Disable */
57
58#define ADDIDATA_ENABLE 1
59#define ADDIDATA_DISABLE 0
60
61/* TIMER COUNTER WATCHDOG DEFINES */
62
63#define ADDIDATA_TIMER 0
64#define ADDIDATA_COUNTER 1
65#define ADDIDATA_WATCHDOG 2
66#define APCI1564_DIGITAL_OP_WATCHDOG 0x28
67#define APCI1564_TIMER 0x48
68#define APCI1564_COUNTER1 0x0
69#define APCI1564_COUNTER2 0x20
70#define APCI1564_COUNTER3 0x40
71#define APCI1564_COUNTER4 0x60
72#define APCI1564_TCW_SYNC_ENABLEDISABLE 0
73#define APCI1564_TCW_RELOAD_VALUE 4
74#define APCI1564_TCW_TIMEBASE 8
75#define APCI1564_TCW_PROG 12
76#define APCI1564_TCW_TRIG_STATUS 16
77#define APCI1564_TCW_IRQ 20
78#define APCI1564_TCW_WARN_TIMEVAL 24
79#define APCI1564_TCW_WARN_TIMEBASE 28
80
81/* Hardware Layer functions for Apci1564 */
82
83/*
84* DI for di read
85*/
86int i_APCI1564_ConfigDigitalInput(struct comedi_device *dev, struct comedi_subdevice *s,
87 struct comedi_insn *insn, unsigned int *data);
88int i_APCI1564_Read1DigitalInput(struct comedi_device *dev, struct comedi_subdevice *s,
89 struct comedi_insn *insn, unsigned int *data);
90int i_APCI1564_ReadMoreDigitalInput(struct comedi_device *dev, struct comedi_subdevice *s,
91 struct comedi_insn *insn, unsigned int *data);
92
93/* DO */
94int i_APCI1564_ConfigDigitalOutput(struct comedi_device *dev, struct comedi_subdevice *s,
95 struct comedi_insn *insn, unsigned int *data);
96int i_APCI1564_WriteDigitalOutput(struct comedi_device *dev, struct comedi_subdevice *s,
97 struct comedi_insn *insn, unsigned int *data);
98int i_APCI1564_ReadDigitalOutput(struct comedi_device *dev, struct comedi_subdevice *s,
99 struct comedi_insn *insn, unsigned int *data);
100int i_APCI1564_ReadInterruptStatus(struct comedi_device *dev, struct comedi_subdevice *s,
101 struct comedi_insn *insn, unsigned int *data);
102
103/*
104* TIMER timer value is passed as u seconds
105*/
106int i_APCI1564_ConfigTimerCounterWatchdog(struct comedi_device *dev,
107 struct comedi_subdevice *s,
108 struct comedi_insn *insn, unsigned int *data);
109int i_APCI1564_StartStopWriteTimerCounterWatchdog(struct comedi_device *dev,
110 struct comedi_subdevice *s,
111 struct comedi_insn *insn,
112 unsigned int *data);
113int i_APCI1564_ReadTimerCounterWatchdog(struct comedi_device *dev,
114 struct comedi_subdevice *s,
115 struct comedi_insn *insn, unsigned int *data);
116
117/* intERRUPT */
118static void v_APCI1564_Interrupt(int irq, void *d);
119
120/* RESET */
121int i_APCI1564_Reset(struct comedi_device *dev);
diff --git a/drivers/staging/comedi/drivers/addi-data/hwdrv_apci16xx.c b/drivers/staging/comedi/drivers/addi-data/hwdrv_apci16xx.c
index 00a088f820a7..5958a9cb2a38 100644
--- a/drivers/staging/comedi/drivers/addi-data/hwdrv_apci16xx.c
+++ b/drivers/staging/comedi/drivers/addi-data/hwdrv_apci16xx.c
@@ -47,13 +47,24 @@ You should also find the complete GPL in the COPYING file accompanying this sour
47 +-----------------------------------------------------------------------+ 47 +-----------------------------------------------------------------------+
48*/ 48*/
49 49
50/* 50#ifndef COMEDI_SUBD_TTLIO
51+----------------------------------------------------------------------------+ 51#define COMEDI_SUBD_TTLIO 11 /* Digital Input Output But TTL */
52| Included files | 52#endif
53+----------------------------------------------------------------------------+ 53
54*/ 54#define APCI16XX_TTL_INIT 0
55#define APCI16XX_TTL_INITDIRECTION 1
56#define APCI16XX_TTL_OUTPUTMEMORY 2
57
58#define APCI16XX_TTL_READCHANNEL 0
59#define APCI16XX_TTL_READPORT 1
60
61#define APCI16XX_TTL_WRITECHANNEL_ON 0
62#define APCI16XX_TTL_WRITECHANNEL_OFF 1
63#define APCI16XX_TTL_WRITEPORT_ON 2
64#define APCI16XX_TTL_WRITEPORT_OFF 3
55 65
56#include "hwdrv_apci16xx.h" 66#define APCI16XX_TTL_READ_ALL_INPUTS 0
67#define APCI16XX_TTL_READ_ALL_OUTPUTS 1
57 68
58/* 69/*
59+----------------------------------------------------------------------------+ 70+----------------------------------------------------------------------------+
@@ -90,9 +101,13 @@ You should also find the complete GPL in the COPYING file accompanying this sour
90+----------------------------------------------------------------------------+ 101+----------------------------------------------------------------------------+
91*/ 102*/
92 103
93int i_APCI16XX_InsnConfigInitTTLIO(struct comedi_device *dev, 104static int i_APCI16XX_InsnConfigInitTTLIO(struct comedi_device *dev,
94 struct comedi_subdevice *s, struct comedi_insn *insn, unsigned int *data) 105 struct comedi_subdevice *s,
106 struct comedi_insn *insn,
107 unsigned int *data)
95{ 108{
109 const struct addi_board *this_board = comedi_board(dev);
110 struct addi_private *devpriv = dev->private;
96 int i_ReturnValue = insn->n; 111 int i_ReturnValue = insn->n;
97 unsigned char b_Command = 0; 112 unsigned char b_Command = 0;
98 unsigned char b_Cpt = 0; 113 unsigned char b_Cpt = 0;
@@ -283,9 +298,13 @@ int i_APCI16XX_InsnConfigInitTTLIO(struct comedi_device *dev,
283+----------------------------------------------------------------------------+ 298+----------------------------------------------------------------------------+
284*/ 299*/
285 300
286int i_APCI16XX_InsnBitsReadTTLIO(struct comedi_device *dev, 301static int i_APCI16XX_InsnBitsReadTTLIO(struct comedi_device *dev,
287 struct comedi_subdevice *s, struct comedi_insn *insn, unsigned int *data) 302 struct comedi_subdevice *s,
303 struct comedi_insn *insn,
304 unsigned int *data)
288{ 305{
306 const struct addi_board *this_board = comedi_board(dev);
307 struct addi_private *devpriv = dev->private;
289 int i_ReturnValue = insn->n; 308 int i_ReturnValue = insn->n;
290 unsigned char b_Command = 0; 309 unsigned char b_Command = 0;
291 unsigned char b_NumberOfPort = 310 unsigned char b_NumberOfPort =
@@ -430,9 +449,13 @@ int i_APCI16XX_InsnBitsReadTTLIO(struct comedi_device *dev,
430+----------------------------------------------------------------------------+ 449+----------------------------------------------------------------------------+
431*/ 450*/
432 451
433int i_APCI16XX_InsnReadTTLIOAllPortValue(struct comedi_device *dev, 452static int i_APCI16XX_InsnReadTTLIOAllPortValue(struct comedi_device *dev,
434 struct comedi_subdevice *s, struct comedi_insn *insn, unsigned int *data) 453 struct comedi_subdevice *s,
454 struct comedi_insn *insn,
455 unsigned int *data)
435{ 456{
457 const struct addi_board *this_board = comedi_board(dev);
458 struct addi_private *devpriv = dev->private;
436 unsigned char b_Command = (unsigned char) CR_AREF(insn->chanspec); 459 unsigned char b_Command = (unsigned char) CR_AREF(insn->chanspec);
437 int i_ReturnValue = insn->n; 460 int i_ReturnValue = insn->n;
438 unsigned char b_Cpt = 0; 461 unsigned char b_Cpt = 0;
@@ -570,9 +593,13 @@ int i_APCI16XX_InsnReadTTLIOAllPortValue(struct comedi_device *dev,
570+----------------------------------------------------------------------------+ 593+----------------------------------------------------------------------------+
571*/ 594*/
572 595
573int i_APCI16XX_InsnBitsWriteTTLIO(struct comedi_device *dev, 596static int i_APCI16XX_InsnBitsWriteTTLIO(struct comedi_device *dev,
574 struct comedi_subdevice *s, struct comedi_insn *insn, unsigned int *data) 597 struct comedi_subdevice *s,
598 struct comedi_insn *insn,
599 unsigned int *data)
575{ 600{
601 const struct addi_board *this_board = comedi_board(dev);
602 struct addi_private *devpriv = dev->private;
576 int i_ReturnValue = insn->n; 603 int i_ReturnValue = insn->n;
577 unsigned char b_Command = 0; 604 unsigned char b_Command = 0;
578 unsigned char b_NumberOfPort = 605 unsigned char b_NumberOfPort =
@@ -774,7 +801,7 @@ int i_APCI16XX_InsnBitsWriteTTLIO(struct comedi_device *dev,
774+----------------------------------------------------------------------------+ 801+----------------------------------------------------------------------------+
775*/ 802*/
776 803
777int i_APCI16XX_Reset(struct comedi_device *dev) 804static int i_APCI16XX_Reset(struct comedi_device *dev)
778{ 805{
779 return 0; 806 return 0;
780} 807}
diff --git a/drivers/staging/comedi/drivers/addi-data/hwdrv_apci16xx.h b/drivers/staging/comedi/drivers/addi-data/hwdrv_apci16xx.h
deleted file mode 100644
index a12df4bc88ac..000000000000
--- a/drivers/staging/comedi/drivers/addi-data/hwdrv_apci16xx.h
+++ /dev/null
@@ -1,79 +0,0 @@
1/*
2 * Copyright (C) 2004,2005 ADDI-DATA GmbH for the source code of this module.
3 *
4 * ADDI-DATA GmbH
5 * Dieselstrasse 3
6 * D-77833 Ottersweier
7 * Tel: +19(0)7223/9493-0
8 * Fax: +49(0)7223/9493-92
9 * http://www.addi-data-com
10 * info@addi-data.com
11 *
12 * This program is free software; you can redistribute it and/or modify it
13 * under the terms of the GNU General Public License as published by the Free
14 * Software Foundation; either version 2 of the License, or (at your option)
15 * any later version.
16 */
17
18#ifndef COMEDI_SUBD_TTLIO
19#define COMEDI_SUBD_TTLIO 11 /* Digital Input Output But TTL */
20#endif
21
22#ifndef ADDIDATA_ENABLE
23#define ADDIDATA_ENABLE 1
24#define ADDIDATA_DISABLE 0
25#endif
26
27#define APCI16XX_TTL_INIT 0
28#define APCI16XX_TTL_INITDIRECTION 1
29#define APCI16XX_TTL_OUTPUTMEMORY 2
30
31#define APCI16XX_TTL_READCHANNEL 0
32#define APCI16XX_TTL_READPORT 1
33
34#define APCI16XX_TTL_WRITECHANNEL_ON 0
35#define APCI16XX_TTL_WRITECHANNEL_OFF 1
36#define APCI16XX_TTL_WRITEPORT_ON 2
37#define APCI16XX_TTL_WRITEPORT_OFF 3
38
39#define APCI16XX_TTL_READ_ALL_INPUTS 0
40#define APCI16XX_TTL_READ_ALL_OUTPUTS 1
41
42#ifdef __KERNEL__
43
44/*
45+----------------------------------------------------------------------------+
46| TTL INISIALISATION FUNCTION |
47+----------------------------------------------------------------------------+
48*/
49
50int i_APCI16XX_InsnConfigInitTTLIO(struct comedi_device *dev,
51 struct comedi_subdevice *s, struct comedi_insn *insn,
52 unsigned int *data);
53
54/*
55+----------------------------------------------------------------------------+
56| TTL INPUT FUNCTION |
57+----------------------------------------------------------------------------+
58*/
59
60int i_APCI16XX_InsnBitsReadTTLIO(struct comedi_device *dev,
61 struct comedi_subdevice *s, struct comedi_insn *insn,
62 unsigned int *data);
63
64int i_APCI16XX_InsnReadTTLIOAllPortValue(struct comedi_device *dev,
65 struct comedi_subdevice *s,
66 struct comedi_insn *insn, unsigned int *data);
67
68/*
69+----------------------------------------------------------------------------+
70| TTL OUTPUT FUNCTIONS |
71+----------------------------------------------------------------------------+
72*/
73
74int i_APCI16XX_InsnBitsWriteTTLIO(struct comedi_device *dev,
75 struct comedi_subdevice *s, struct comedi_insn *insn,
76 unsigned int *data);
77
78int i_APCI16XX_Reset(struct comedi_device *dev);
79#endif
diff --git a/drivers/staging/comedi/drivers/addi-data/hwdrv_apci2016.c b/drivers/staging/comedi/drivers/addi-data/hwdrv_apci2016.c
deleted file mode 100644
index 49dcbe24fcd3..000000000000
--- a/drivers/staging/comedi/drivers/addi-data/hwdrv_apci2016.c
+++ /dev/null
@@ -1,460 +0,0 @@
1/**
2@verbatim
3
4Copyright (C) 2004,2005 ADDI-DATA GmbH for the source code of this module.
5
6 ADDI-DATA GmbH
7 Dieselstrasse 3
8 D-77833 Ottersweier
9 Tel: +19(0)7223/9493-0
10 Fax: +49(0)7223/9493-92
11 http://www.addi-data.com
12 info@addi-data.com
13
14This program is free software; you can redistribute it and/or modify it under the terms of the GNU General Public License as published by the Free Software Foundation; either version 2 of the License, or (at your option) any later version.
15
16This program is distributed in the hope that it will be useful, but WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for more details.
17
18You should have received a copy of the GNU General Public License along with this program; if not, write to the Free Software Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
19
20You should also find the complete GPL in the COPYING file accompanying this source code.
21
22@endverbatim
23*/
24/*
25
26 +-----------------------------------------------------------------------+
27 | (C) ADDI-DATA GmbH Dieselstraße 3 D-77833 Ottersweier |
28 +-----------------------------------------------------------------------+
29 | Tel : +49 (0) 7223/9493-0 | email : info@addi-data.com |
30 | Fax : +49 (0) 7223/9493-92 | Internet : http://www.addi-data.com |
31 +-------------------------------+---------------------------------------+
32 | Project : APCI-2016 | Compiler : GCC |
33 | Module name : hwdrv_apci2016.c| Version : 2.96 |
34 +-------------------------------+---------------------------------------+
35 | Project manager: Eric Stolz | Date : 02/12/2002 |
36 +-------------------------------+---------------------------------------+
37 | Description : Hardware Layer Access For APCI-2016 |
38 +-----------------------------------------------------------------------+
39 | UPDATES |
40 +----------+-----------+------------------------------------------------+
41 | Date | Author | Description of updates |
42 +----------+-----------+------------------------------------------------+
43 | | | |
44 | | | |
45 | | | |
46 +----------+-----------+------------------------------------------------+
47*/
48
49/*
50+----------------------------------------------------------------------------+
51| Included files |
52+----------------------------------------------------------------------------+
53*/
54#include "hwdrv_apci2016.h"
55
56/*
57+----------------------------------------------------------------------------+
58| Function Name : int i_APCI2016_ConfigDigitalOutput |
59| (struct comedi_device *dev,struct comedi_subdevice *s, |
60| struct comedi_insn *insn,unsigned int *data) |
61+----------------------------------------------------------------------------+
62| Task : Configures The Digital Output Subdevice. |
63+----------------------------------------------------------------------------+
64| Input Parameters : struct comedi_device *dev : Driver handle |
65| unsigned int *data : Data Pointer contains |
66| configuration parameters as below |
67| |
68| data[0] : 1 Digital Memory On |
69| 0 Digital Memory Off |
70+----------------------------------------------------------------------------+
71| Output Parameters : -- |
72+----------------------------------------------------------------------------+
73| Return Value : TRUE : No error occur |
74| : FALSE : Error occur. Return the error |
75| |
76+----------------------------------------------------------------------------+
77*/
78int i_APCI2016_ConfigDigitalOutput(struct comedi_device *dev, struct comedi_subdevice *s,
79 struct comedi_insn *insn, unsigned int *data)
80{
81 if ((data[0] != 0) && (data[0] != 1)) {
82 comedi_error(dev,
83 "Not a valid Data !!! ,Data should be 1 or 0\n");
84 return -EINVAL;
85 } /* if ((data[0]!=0) && (data[0]!=1)) */
86 if (data[0]) {
87 devpriv->b_OutputMemoryStatus = ADDIDATA_ENABLE;
88 } /* if (data[0] */
89 else {
90 devpriv->b_OutputMemoryStatus = ADDIDATA_DISABLE;
91 } /* else if (data[0] */
92 return insn->n;
93}
94
95/*
96+----------------------------------------------------------------------------+
97| Function Name : int i_APCI2016_WriteDigitalOutput |
98| (struct comedi_device *dev,struct comedi_subdevice *s, |
99| struct comedi_insn *insn,unsigned int *data) |
100+----------------------------------------------------------------------------+
101| Task : Writes port value To the selected port |
102+----------------------------------------------------------------------------+
103| Input Parameters : struct comedi_device *dev : Driver handle |
104| unsigned int ui_NoOfChannels : No Of Channels To Write |
105| unsigned int *data : Data Pointer to read status |
106+----------------------------------------------------------------------------+
107| Output Parameters : -- |
108+----------------------------------------------------------------------------+
109| Return Value : TRUE : No error occur |
110| : FALSE : Error occur. Return the error |
111| |
112+----------------------------------------------------------------------------+
113*/
114int i_APCI2016_WriteDigitalOutput(struct comedi_device *dev, struct comedi_subdevice *s,
115 struct comedi_insn *insn, unsigned int *data)
116{
117 unsigned int ui_NoOfChannel;
118 unsigned int ui_Temp, ui_Temp1;
119 ui_NoOfChannel = CR_CHAN(insn->chanspec);
120 if (ui_NoOfChannel > 15) {
121 comedi_error(dev,
122 "Invalid Channel Numbers !!!, Channel Numbers must be between 0 and 15\n");
123 return -EINVAL;
124 } /* if ((ui_NoOfChannel<0) || (ui_NoOfChannel>15)) */
125 if (devpriv->b_OutputMemoryStatus) {
126 ui_Temp = inw(devpriv->iobase + APCI2016_DIGITAL_OP);
127 } /* if (devpriv->b_OutputMemoryStatus ) */
128 else {
129 ui_Temp = 0;
130 } /* else if (devpriv->b_OutputMemoryStatus ) */
131 if ((data[1] != 0) && (data[1] != 1)) {
132 comedi_error(dev,
133 "Invalid Data[1] value !!!, Data[1] should be 0 or 1\n");
134 return -EINVAL;
135 } /* if ((data[1]!=0) && (data[1]!=1)) */
136
137 if (data[3] == 0) {
138 if (data[1] == 0) {
139 data[0] = (data[0] << ui_NoOfChannel) | ui_Temp;
140 outw(data[0], devpriv->iobase + APCI2016_DIGITAL_OP);
141 } /* if (data[1]==0) */
142 else {
143 if (data[1] == 1) {
144 switch (ui_NoOfChannel) {
145 case 2:
146 data[0] =
147 (data[0] << (2 *
148 data[2])) | ui_Temp;
149 break;
150 case 4:
151 data[0] =
152 (data[0] << (4 *
153 data[2])) | ui_Temp;
154 break;
155 case 8:
156 data[0] =
157 (data[0] << (8 *
158 data[2])) | ui_Temp;
159 break;
160 case 15:
161 data[0] = data[0] | ui_Temp;
162 break;
163 default:
164 comedi_error(dev, " chan spec wrong");
165 return -EINVAL; /* "sorry channel spec wrong " */
166 } /* switch(ui_NoOfChannels) */
167 outw(data[0],
168 devpriv->iobase + APCI2016_DIGITAL_OP);
169 } /* if (data[1]==1) */
170 else {
171 printk("\nSpecified channel not supported\n");
172 } /* else if (data[1]==1) */
173 } /* else if (data[1]==0) */
174 } /* if (data[3]==0) */
175 else {
176 if (data[3] == 1) {
177 if (data[1] == 0) {
178 data[0] = ~data[0] & 0x1;
179 ui_Temp1 = 1;
180 ui_Temp1 = ui_Temp1 << ui_NoOfChannel;
181 ui_Temp = ui_Temp | ui_Temp1;
182 data[0] = (data[0] << ui_NoOfChannel) ^ 0xffff;
183 data[0] = data[0] & ui_Temp;
184 outw(data[0],
185 devpriv->iobase + APCI2016_DIGITAL_OP);
186 } /* if (data[1]==0) */
187 else {
188 if (data[1] == 1) {
189 switch (ui_NoOfChannel) {
190 case 2:
191 data[0] = ~data[0] & 0x3;
192 ui_Temp1 = 3;
193 ui_Temp1 =
194 ui_Temp1 << 2 * data[2];
195 ui_Temp = ui_Temp | ui_Temp1;
196 data[0] =
197 ((data[0] << (2 *
198 data
199 [2])) ^
200 0xffff) & ui_Temp;
201 break;
202 case 4:
203 data[0] = ~data[0] & 0xf;
204 ui_Temp1 = 15;
205 ui_Temp1 =
206 ui_Temp1 << 4 * data[2];
207 ui_Temp = ui_Temp | ui_Temp1;
208 data[0] =
209 ((data[0] << (4 *
210 data
211 [2])) ^
212 0xffff) & ui_Temp;
213 break;
214 case 8:
215 data[0] = ~data[0] & 0xff;
216 ui_Temp1 = 255;
217 ui_Temp1 =
218 ui_Temp1 << 8 * data[2];
219 ui_Temp = ui_Temp | ui_Temp1;
220 data[0] =
221 ((data[0] << (8 *
222 data
223 [2])) ^
224 0xffff) & ui_Temp;
225 break;
226 case 15:
227 break;
228 default:
229 comedi_error(dev,
230 " chan spec wrong");
231 return -EINVAL; /* "sorry channel spec wrong " */
232 } /* switch(ui_NoOfChannels) */
233 outw(data[0],
234 devpriv->iobase +
235 APCI2016_DIGITAL_OP);
236 } /* if(data[1]==1) */
237 else {
238 printk("\nSpecified channel not supported\n");
239 } /* else if(data[1]==1) */
240 } /* elseif(data[1]==0) */
241 } /* if(data[3]==1); */
242 else {
243 printk("\nSpecified functionality does not exist\n");
244 return -EINVAL;
245 } /* if else data[3]==1) */
246 } /* if else data[3]==0) */
247 return insn->n;
248}
249
250/*
251+----------------------------------------------------------------------------+
252| Function Name : int i_APCI2016_BitsDigitalOutput |
253| (struct comedi_device *dev,struct comedi_subdevice *s, |
254| struct comedi_insn *insn,unsigned int *data) |
255+----------------------------------------------------------------------------+
256| Task : Read value of the selected channel or port |
257+----------------------------------------------------------------------------+
258| Input Parameters : struct comedi_device *dev : Driver handle |
259| unsigned int ui_NoOfChannels : No Of Channels To read |
260| unsigned int *data : Data Pointer to read status |
261+----------------------------------------------------------------------------+
262| Output Parameters : -- |
263+----------------------------------------------------------------------------+
264| Return Value : TRUE : No error occur |
265| : FALSE : Error occur. Return the error |
266| |
267+----------------------------------------------------------------------------+
268*/
269int i_APCI2016_BitsDigitalOutput(struct comedi_device *dev, struct comedi_subdevice *s,
270 struct comedi_insn *insn, unsigned int *data)
271{
272 unsigned int ui_Temp;
273 unsigned int ui_NoOfChannel;
274 ui_NoOfChannel = CR_CHAN(insn->chanspec);
275 if (ui_NoOfChannel > 15) {
276 comedi_error(dev,
277 "Invalid Channel Numbers !!!, Channel Numbers must be between 0 and 15\n");
278 return -EINVAL;
279 } /* if ((ui_NoOfChannel<0) || (ui_NoOfChannel>15)) */
280 if ((data[0] != 0) && (data[0] != 1)) {
281 comedi_error(dev,
282 "Invalid Data[0] value !!!, Data[0] should be 0 or 1\n");
283 return -EINVAL;
284 } /* if ((data[0]!=0) && (data[0]!=1)) */
285 ui_Temp = data[0];
286 *data = inw(devpriv->iobase + APCI2016_DIGITAL_OP_RW);
287 if (ui_Temp == 0) {
288 *data = (*data >> ui_NoOfChannel) & 0x1;
289 } /* if (ui_Temp==0) */
290 else {
291 if (ui_Temp == 1) {
292 switch (ui_NoOfChannel) {
293 case 2:
294 *data = (*data >> (2 * data[1])) & 3;
295 break;
296
297 case 4:
298 *data = (*data >> (4 * data[1])) & 15;
299 break;
300
301 case 8:
302 *data = (*data >> (8 * data[1])) & 255;
303 break;
304
305 case 15:
306 break;
307
308 default:
309 comedi_error(dev, " chan spec wrong");
310 return -EINVAL; /* "sorry channel spec wrong " */
311 } /* switch(ui_NoOfChannel) */
312 } /* if (ui_Temp==1) */
313 else {
314 printk("\nSpecified channel not supported \n");
315 } /* else if (ui_Temp==1) */
316 } /* if (ui_Temp==0) */
317 return insn->n;
318}
319
320/*
321+----------------------------------------------------------------------------+
322| Function Name : int i_APCI2016_ConfigWatchdog |
323| (struct comedi_device *dev,struct comedi_subdevice *s, |
324| struct comedi_insn *insn,unsigned int *data) |
325+----------------------------------------------------------------------------+
326| Task : Configures The Watchdog |
327+----------------------------------------------------------------------------+
328| Input Parameters : struct comedi_device *dev : Driver handle |
329| struct comedi_subdevice *s, :pointer to subdevice structure |
330| struct comedi_insn *insn :pointer to insn structure |
331| unsigned int *data : Data Pointer to read status |
332+----------------------------------------------------------------------------+
333| Output Parameters : -- |
334+----------------------------------------------------------------------------+
335| Return Value : TRUE : No error occur |
336| : FALSE : Error occur. Return the error |
337| |
338+----------------------------------------------------------------------------+
339*/
340int i_APCI2016_ConfigWatchdog(struct comedi_device *dev, struct comedi_subdevice *s,
341 struct comedi_insn *insn, unsigned int *data)
342{
343
344 if (data[0] == 0) {
345 /* Disable the watchdog */
346 outw(0x0,
347 devpriv->i_IobaseAddon +
348 APCI2016_WATCHDOG_ENABLEDISABLE);
349 /* Loading the Reload value */
350 outw(data[1],
351 devpriv->i_IobaseAddon +
352 APCI2016_WATCHDOG_RELOAD_VALUE);
353 data[1] = data[1] >> 16;
354 outw(data[1],
355 devpriv->i_IobaseAddon +
356 APCI2016_WATCHDOG_RELOAD_VALUE + 2);
357 } else {
358 printk("\nThe input parameters are wrong\n");
359 }
360 return insn->n;
361}
362
363/*
364+----------------------------------------------------------------------------+
365| Function Name : int i_APCI2016_StartStopWriteWatchdog |
366| (struct comedi_device *dev,struct comedi_subdevice *s, |
367| struct comedi_insn *insn,unsigned int *data) |
368+----------------------------------------------------------------------------+
369| Task : Start / Stop The Watchdog |
370+----------------------------------------------------------------------------+
371| Input Parameters : struct comedi_device *dev : Driver handle |
372| struct comedi_subdevice *s, :pointer to subdevice structure |
373| struct comedi_insn *insn :pointer to insn structure |
374| unsigned int *data : Data Pointer to read status |
375+----------------------------------------------------------------------------+
376| Output Parameters : -- |
377+----------------------------------------------------------------------------+
378| Return Value : TRUE : No error occur |
379| : FALSE : Error occur. Return the error |
380| |
381+----------------------------------------------------------------------------+
382*/
383int i_APCI2016_StartStopWriteWatchdog(struct comedi_device *dev, struct comedi_subdevice *s,
384 struct comedi_insn *insn, unsigned int *data)
385{
386
387 switch (data[0]) {
388 case 0: /* stop the watchdog */
389 outw(0x0, devpriv->i_IobaseAddon + APCI2016_WATCHDOG_ENABLEDISABLE); /* disable the watchdog */
390 break;
391 case 1: /* start the watchdog */
392 outw(0x0001,
393 devpriv->i_IobaseAddon +
394 APCI2016_WATCHDOG_ENABLEDISABLE);
395 break;
396 case 2: /* Software trigger */
397 outw(0x0201,
398 devpriv->i_IobaseAddon +
399 APCI2016_WATCHDOG_ENABLEDISABLE);
400 break;
401 default:
402 printk("\nSpecified functionality does not exist\n");
403 return -EINVAL;
404 } /* switch(data[0]) */
405
406 return insn->n;
407}
408
409/*
410+----------------------------------------------------------------------------+
411| Function Name : int i_APCI2016_ReadWatchdog |
412| (struct comedi_device *dev,struct comedi_subdevice *s, |
413| struct comedi_insn *insn,unsigned int *data) |
414+----------------------------------------------------------------------------+
415| Task : Read The Watchdog |
416+----------------------------------------------------------------------------+
417| Input Parameters : struct comedi_device *dev : Driver handle |
418| struct comedi_subdevice *s, :pointer to subdevice structure |
419| struct comedi_insn *insn :pointer to insn structure |
420| unsigned int *data : Data Pointer to read status |
421+----------------------------------------------------------------------------+
422| Output Parameters : -- |
423+----------------------------------------------------------------------------+
424| Return Value : TRUE : No error occur |
425| : FALSE : Error occur. Return the error |
426| |
427+----------------------------------------------------------------------------+
428*/
429
430int i_APCI2016_ReadWatchdog(struct comedi_device *dev, struct comedi_subdevice *s,
431 struct comedi_insn *insn, unsigned int *data)
432{
433 udelay(5);
434 data[0] = inw(devpriv->i_IobaseAddon + APCI2016_WATCHDOG_STATUS) & 0x1;
435 return insn->n;
436}
437
438/*
439+----------------------------------------------------------------------------+
440| Function Name : int i_APCI2016_Reset(struct comedi_device *dev) | |
441+----------------------------------------------------------------------------+
442| Task :resets all the registers |
443+----------------------------------------------------------------------------+
444| Input Parameters : struct comedi_device *dev
445+----------------------------------------------------------------------------+
446| Output Parameters : -- |
447+----------------------------------------------------------------------------+
448| Return Value : |
449| |
450+----------------------------------------------------------------------------+
451*/
452
453int i_APCI2016_Reset(struct comedi_device *dev)
454{
455 outw(0x0, devpriv->iobase + APCI2016_DIGITAL_OP); /* Resets the digital output channels */
456 outw(0x0, devpriv->i_IobaseAddon + APCI2016_WATCHDOG_ENABLEDISABLE);
457 outw(0x0, devpriv->i_IobaseAddon + APCI2016_WATCHDOG_RELOAD_VALUE);
458 outw(0x0, devpriv->i_IobaseAddon + APCI2016_WATCHDOG_RELOAD_VALUE + 2);
459 return 0;
460}
diff --git a/drivers/staging/comedi/drivers/addi-data/hwdrv_apci2016.h b/drivers/staging/comedi/drivers/addi-data/hwdrv_apci2016.h
deleted file mode 100644
index c42612af0faf..000000000000
--- a/drivers/staging/comedi/drivers/addi-data/hwdrv_apci2016.h
+++ /dev/null
@@ -1,72 +0,0 @@
1/*
2 * Copyright (C) 2004,2005 ADDI-DATA GmbH for the source code of this module.
3 *
4 * ADDI-DATA GmbH
5 * Dieselstrasse 3
6 * D-77833 Ottersweier
7 * Tel: +19(0)7223/9493-0
8 * Fax: +49(0)7223/9493-92
9 * http://www.addi-data.com
10 * info@addi-data.com
11 *
12 * This program is free software; you can redistribute it and/or modify it
13 * under the terms of the GNU General Public License as published by the Free
14 * Software Foundation; either version 2 of the License, or (at your option)
15 * any later version.
16 */
17/********* Definitions for APCI-2016 card *****/
18
19#define APCI2016_BOARD_VENDOR_ID 0x15B8
20#define APCI2016_ADDRESS_RANGE 8
21
22/* DIGITAL INPUT-OUTPUT DEFINE */
23
24#define APCI2016_DIGITAL_OP 0x04
25#define APCI2016_DIGITAL_OP_RW 4
26
27/* ADDIDATA Enable Disable */
28
29#define ADDIDATA_ENABLE 1
30#define ADDIDATA_DISABLE 0
31
32/* TIMER COUNTER WATCHDOG DEFINES */
33
34#define ADDIDATA_WATCHDOG 2
35#define APCI2016_DIGITAL_OP_WATCHDOG 0
36#define APCI2016_WATCHDOG_ENABLEDISABLE 12
37#define APCI2016_WATCHDOG_RELOAD_VALUE 4
38#define APCI2016_WATCHDOG_STATUS 16
39
40/* Hardware Layer functions for Apci2016 */
41
42/* DO */
43int i_APCI2016_ConfigDigitalOutput(struct comedi_device *dev, struct comedi_subdevice *s,
44 struct comedi_insn *insn, unsigned int *data);
45
46int i_APCI2016_WriteDigitalOutput(struct comedi_device *dev, struct comedi_subdevice *s,
47 struct comedi_insn *insn, unsigned int *data);
48
49int i_APCI2016_BitsDigitalOutput(struct comedi_device *dev, struct comedi_subdevice *s,
50 struct comedi_insn *insn, unsigned int *data);
51
52/*
53* TIMER
54* timer value is passed as u seconds
55*/
56
57int i_APCI2016_ConfigWatchdog(struct comedi_device *dev, struct comedi_subdevice *s,
58 struct comedi_insn *insn, unsigned int *data);
59
60int i_APCI2016_StartStopWriteWatchdog(struct comedi_device *dev, struct comedi_subdevice *s,
61 struct comedi_insn *insn, unsigned int *data);
62
63int i_APCI2016_ReadWatchdog(struct comedi_device *dev, struct comedi_subdevice *s,
64 struct comedi_insn *insn, unsigned int *data);
65
66/* Interrupt functions..... */
67
68/* void v_APCI2016_Interrupt(int irq, void *d); */
69
70/* void v_APCI2016_Interrupt(int irq, void *d); */
71/* RESET */
72int i_APCI2016_Reset(struct comedi_device *dev);
diff --git a/drivers/staging/comedi/drivers/addi-data/hwdrv_apci2032.c b/drivers/staging/comedi/drivers/addi-data/hwdrv_apci2032.c
deleted file mode 100644
index 002297dfe33f..000000000000
--- a/drivers/staging/comedi/drivers/addi-data/hwdrv_apci2032.c
+++ /dev/null
@@ -1,579 +0,0 @@
1/**
2@verbatim
3
4Copyright (C) 2004,2005 ADDI-DATA GmbH for the source code of this module.
5
6 ADDI-DATA GmbH
7 Dieselstrasse 3
8 D-77833 Ottersweier
9 Tel: +19(0)7223/9493-0
10 Fax: +49(0)7223/9493-92
11 http://www.addi-data.com
12 info@addi-data.com
13
14This program is free software; you can redistribute it and/or modify it under the terms of the GNU General Public License as published by the Free Software Foundation; either version 2 of the License, or (at your option) any later version.
15
16This program is distributed in the hope that it will be useful, but WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for more details.
17
18You should have received a copy of the GNU General Public License along with this program; if not, write to the Free Software Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
19
20You should also find the complete GPL in the COPYING file accompanying this source code.
21
22@endverbatim
23*/
24/*
25
26 +-----------------------------------------------------------------------+
27 | (C) ADDI-DATA GmbH Dieselstraße 3 D-77833 Ottersweier |
28 +-----------------------------------------------------------------------+
29 | Tel : +49 (0) 7223/9493-0 | email : info@addi-data.com |
30 | Fax : +49 (0) 7223/9493-92 | Internet : http://www.addi-data.com |
31 +-------------------------------+---------------------------------------+
32 | Project : APCI-2032 | Compiler : GCC |
33 | Module name : hwdrv_apci2032.c| Version : 2.96 |
34 +-------------------------------+---------------------------------------+
35 | Project manager: Eric Stolz | Date : 02/12/2002 |
36 +-------------------------------+---------------------------------------+
37 | Description : Hardware Layer Access For APCI-2032 |
38 +-----------------------------------------------------------------------+
39 | UPDATES |
40 +----------+-----------+------------------------------------------------+
41 | Date | Author | Description of updates |
42 +----------+-----------+------------------------------------------------+
43 | | | |
44 | | | |
45 | | | |
46 +----------+-----------+------------------------------------------------+
47*/
48
49/*
50+----------------------------------------------------------------------------+
51| Included files |
52+----------------------------------------------------------------------------+
53*/
54
55#include "hwdrv_apci2032.h"
56static unsigned int ui_InterruptData, ui_Type;
57/*
58+----------------------------------------------------------------------------+
59| Function Name : int i_APCI2032_ConfigDigitalOutput |
60| (struct comedi_device *dev,struct comedi_subdevice *s, |
61| struct comedi_insn *insn,unsigned int *data) |
62+----------------------------------------------------------------------------+
63| Task : Configures The Digital Output Subdevice. |
64+----------------------------------------------------------------------------+
65| Input Parameters : struct comedi_device *dev : Driver handle |
66| unsigned int *data : Data Pointer contains |
67| configuration parameters as below |
68| |
69| data[1] : 1 Enable VCC Interrupt |
70| 0 Disable VCC Interrupt |
71| data[2] : 1 Enable CC Interrupt |
72| 0 Disable CC Interrupt |
73| |
74+----------------------------------------------------------------------------+
75| Output Parameters : -- |
76+----------------------------------------------------------------------------+
77| Return Value : TRUE : No error occur |
78| : FALSE : Error occur. Return the error |
79| |
80+----------------------------------------------------------------------------+
81*/
82int i_APCI2032_ConfigDigitalOutput(struct comedi_device *dev, struct comedi_subdevice *s,
83 struct comedi_insn *insn, unsigned int *data)
84{
85 unsigned int ul_Command = 0;
86 devpriv->tsk_Current = current;
87
88 if ((data[0] != 0) && (data[0] != 1)) {
89 comedi_error(dev,
90 "Not a valid Data !!! ,Data should be 1 or 0\n");
91 return -EINVAL;
92 } /* if ( (data[0]!=0) && (data[0]!=1) ) */
93 if (data[0]) {
94 devpriv->b_OutputMemoryStatus = ADDIDATA_ENABLE;
95 } /* if (data[0]) */
96 else {
97 devpriv->b_OutputMemoryStatus = ADDIDATA_DISABLE;
98 } /* else if (data[0]) */
99
100 if (data[1] == ADDIDATA_ENABLE) {
101 ul_Command = ul_Command | 0x1;
102 } /* if (data[1] == ADDIDATA_ENABLE) */
103 else {
104 ul_Command = ul_Command & 0xFFFFFFFE;
105 } /* elseif (data[1] == ADDIDATA_ENABLE) */
106 if (data[2] == ADDIDATA_ENABLE) {
107 ul_Command = ul_Command | 0x2;
108 } /* if (data[2] == ADDIDATA_ENABLE) */
109 else {
110 ul_Command = ul_Command & 0xFFFFFFFD;
111 } /* elseif (data[2] == ADDIDATA_ENABLE) */
112 outl(ul_Command, devpriv->iobase + APCI2032_DIGITAL_OP_INTERRUPT);
113 ui_InterruptData = inl(devpriv->iobase + APCI2032_DIGITAL_OP_INTERRUPT);
114 return insn->n;
115}
116
117/*
118+----------------------------------------------------------------------------+
119| Function Name : int i_APCI2032_WriteDigitalOutput |
120| (struct comedi_device *dev,struct comedi_subdevice *s, |
121| struct comedi_insn *insn,unsigned int *data) |
122+----------------------------------------------------------------------------+
123| Task : Writes port value To the selected port |
124+----------------------------------------------------------------------------+
125| Input Parameters : struct comedi_device *dev : Driver handle |
126| unsigned int ui_NoOfChannels : No Of Channels To Write |
127| unsigned int *data : Data Pointer to read status |
128+----------------------------------------------------------------------------+
129| Output Parameters : -- |
130+----------------------------------------------------------------------------+
131| Return Value : TRUE : No error occur |
132| : FALSE : Error occur. Return the error |
133| |
134+----------------------------------------------------------------------------+
135*/
136
137int i_APCI2032_WriteDigitalOutput(struct comedi_device *dev, struct comedi_subdevice *s,
138 struct comedi_insn *insn, unsigned int *data)
139{
140 unsigned int ui_Temp, ui_Temp1;
141 unsigned int ui_NoOfChannel = CR_CHAN(insn->chanspec); /* get the channel */
142 if (devpriv->b_OutputMemoryStatus) {
143 ui_Temp = inl(devpriv->iobase + APCI2032_DIGITAL_OP);
144
145 } /* if(devpriv->b_OutputMemoryStatus ) */
146 else {
147 ui_Temp = 0;
148 } /* if(devpriv->b_OutputMemoryStatus ) */
149 if (data[3] == 0) {
150 if (data[1] == 0) {
151 data[0] = (data[0] << ui_NoOfChannel) | ui_Temp;
152 outl(data[0], devpriv->iobase + APCI2032_DIGITAL_OP);
153 } /* if(data[1]==0) */
154 else {
155 if (data[1] == 1) {
156 switch (ui_NoOfChannel) {
157
158 case 2:
159 data[0] =
160 (data[0] << (2 *
161 data[2])) | ui_Temp;
162 break;
163
164 case 4:
165 data[0] =
166 (data[0] << (4 *
167 data[2])) | ui_Temp;
168 break;
169
170 case 8:
171 data[0] =
172 (data[0] << (8 *
173 data[2])) | ui_Temp;
174 break;
175
176 case 16:
177 data[0] =
178 (data[0] << (16 *
179 data[2])) | ui_Temp;
180 break;
181 case 31:
182 data[0] = data[0] | ui_Temp;
183 break;
184
185 default:
186 comedi_error(dev, " chan spec wrong");
187 return -EINVAL; /* "sorry channel spec wrong " */
188
189 } /* switch(ui_NoOfChannels) */
190
191 outl(data[0],
192 devpriv->iobase + APCI2032_DIGITAL_OP);
193 } /* if(data[1]==1) */
194 else {
195 printk("\nSpecified channel not supported\n");
196 } /* else if(data[1]==1) */
197 } /* elseif(data[1]==0) */
198 } /* if(data[3]==0) */
199 else {
200 if (data[3] == 1) {
201 if (data[1] == 0) {
202 data[0] = ~data[0] & 0x1;
203 ui_Temp1 = 1;
204 ui_Temp1 = ui_Temp1 << ui_NoOfChannel;
205 ui_Temp = ui_Temp | ui_Temp1;
206 data[0] =
207 (data[0] << ui_NoOfChannel) ^
208 0xffffffff;
209 data[0] = data[0] & ui_Temp;
210 outl(data[0],
211 devpriv->iobase + APCI2032_DIGITAL_OP);
212 } /* if(data[1]==0) */
213 else {
214 if (data[1] == 1) {
215 switch (ui_NoOfChannel) {
216
217 case 2:
218 data[0] = ~data[0] & 0x3;
219 ui_Temp1 = 3;
220 ui_Temp1 =
221 ui_Temp1 << 2 * data[2];
222 ui_Temp = ui_Temp | ui_Temp1;
223 data[0] =
224 ((data[0] << (2 *
225 data
226 [2])) ^
227 0xffffffff) & ui_Temp;
228 break;
229
230 case 4:
231 data[0] = ~data[0] & 0xf;
232 ui_Temp1 = 15;
233 ui_Temp1 =
234 ui_Temp1 << 4 * data[2];
235 ui_Temp = ui_Temp | ui_Temp1;
236 data[0] =
237 ((data[0] << (4 *
238 data
239 [2])) ^
240 0xffffffff) & ui_Temp;
241 break;
242
243 case 8:
244 data[0] = ~data[0] & 0xff;
245 ui_Temp1 = 255;
246 ui_Temp1 =
247 ui_Temp1 << 8 * data[2];
248 ui_Temp = ui_Temp | ui_Temp1;
249 data[0] =
250 ((data[0] << (8 *
251 data
252 [2])) ^
253 0xffffffff) & ui_Temp;
254 break;
255
256 case 16:
257 data[0] = ~data[0] & 0xffff;
258 ui_Temp1 = 65535;
259 ui_Temp1 =
260 ui_Temp1 << 16 *
261 data[2];
262 ui_Temp = ui_Temp | ui_Temp1;
263 data[0] =
264 ((data[0] << (16 *
265 data
266 [2])) ^
267 0xffffffff) & ui_Temp;
268 break;
269
270 case 31:
271 break;
272 default:
273 comedi_error(dev,
274 " chan spec wrong");
275 return -EINVAL; /* "sorry channel spec wrong " */
276
277 } /* switch(ui_NoOfChannels) */
278
279 outl(data[0],
280 devpriv->iobase +
281 APCI2032_DIGITAL_OP);
282 } /* if(data[1]==1) */
283 else {
284 printk("\nSpecified channel not supported\n");
285 } /* else if(data[1]==1) */
286 } /* elseif(data[1]==0) */
287 } /* if(data[3]==1); */
288 else {
289 printk("\nSpecified functionality does not exist\n");
290 return -EINVAL;
291 } /* if else data[3]==1) */
292 } /* if else data[3]==0) */
293 return insn->n;
294}
295
296/*
297+----------------------------------------------------------------------------+
298| Function Name : int i_APCI2032_ReadDigitalOutput |
299| (struct comedi_device *dev,struct comedi_subdevice *s, |
300| struct comedi_insn *insn,unsigned int *data) |
301+----------------------------------------------------------------------------+
302| Task : Read value of the selected channel or port |
303+----------------------------------------------------------------------------+
304| Input Parameters : struct comedi_device *dev : Driver handle |
305| unsigned int ui_NoOfChannels : No Of Channels To read |
306| unsigned int *data : Data Pointer to read status |
307+----------------------------------------------------------------------------+
308| Output Parameters : -- |
309+----------------------------------------------------------------------------+
310| Return Value : TRUE : No error occur |
311| : FALSE : Error occur. Return the error |
312| |
313+----------------------------------------------------------------------------+
314*/
315
316int i_APCI2032_ReadDigitalOutput(struct comedi_device *dev, struct comedi_subdevice *s,
317 struct comedi_insn *insn, unsigned int *data)
318{
319 unsigned int ui_Temp;
320 unsigned int ui_NoOfChannel;
321 ui_NoOfChannel = CR_CHAN(insn->chanspec);
322 ui_Temp = data[0];
323 *data = inl(devpriv->iobase + APCI2032_DIGITAL_OP_RW);
324 if (ui_Temp == 0) {
325 *data = (*data >> ui_NoOfChannel) & 0x1;
326 } /* if (ui_Temp==0) */
327 else {
328 if (ui_Temp == 1) {
329 switch (ui_NoOfChannel) {
330
331 case 2:
332 *data = (*data >> (2 * data[1])) & 3;
333 break;
334
335 case 4:
336 *data = (*data >> (4 * data[1])) & 15;
337 break;
338
339 case 8:
340 *data = (*data >> (8 * data[1])) & 255;
341 break;
342
343 case 16:
344 *data = (*data >> (16 * data[1])) & 65535;
345 break;
346
347 case 31:
348 break;
349
350 default:
351 comedi_error(dev, " chan spec wrong");
352 return -EINVAL; /* "sorry channel spec wrong " */
353
354 } /* switch(ui_NoOfChannels) */
355 } /* if (ui_Temp==1) */
356 else {
357 printk("\nSpecified channel not supported \n");
358 } /* elseif (ui_Temp==1) */
359 }
360 return insn->n;
361}
362
363/*
364+----------------------------------------------------------------------------+
365| Function Name : int i_APCI2032_ConfigWatchdog(comedi_device
366| *dev,struct comedi_subdevice *s,struct comedi_insn *insn,unsigned int *data)|
367| |
368+----------------------------------------------------------------------------+
369| Task : Configures The Watchdog |
370+----------------------------------------------------------------------------+
371| Input Parameters : struct comedi_device *dev : Driver handle |
372| struct comedi_subdevice *s, :pointer to subdevice structure
373| struct comedi_insn *insn :pointer to insn structure |
374| unsigned int *data : Data Pointer to read status |
375+----------------------------------------------------------------------------+
376| Output Parameters : -- |
377+----------------------------------------------------------------------------+
378| Return Value : TRUE : No error occur |
379| : FALSE : Error occur. Return the error |
380| |
381+----------------------------------------------------------------------------+
382*/
383int i_APCI2032_ConfigWatchdog(struct comedi_device *dev, struct comedi_subdevice *s,
384 struct comedi_insn *insn, unsigned int *data)
385{
386 if (data[0] == 0) {
387 /* Disable the watchdog */
388 outl(0x0,
389 devpriv->iobase + APCI2032_DIGITAL_OP_WATCHDOG +
390 APCI2032_TCW_PROG);
391 /* Loading the Reload value */
392 outl(data[1],
393 devpriv->iobase + APCI2032_DIGITAL_OP_WATCHDOG +
394 APCI2032_TCW_RELOAD_VALUE);
395 } else {
396 printk("\nThe input parameters are wrong\n");
397 return -EINVAL;
398 }
399
400 return insn->n;
401}
402
403 /*
404 +----------------------------------------------------------------------------+
405 | Function Name : int i_APCI2032_StartStopWriteWatchdog |
406 | (struct comedi_device *dev,struct comedi_subdevice *s,
407 struct comedi_insn *insn,unsigned int *data); |
408 +----------------------------------------------------------------------------+
409 | Task : Start / Stop The Watchdog |
410 +----------------------------------------------------------------------------+
411 | Input Parameters : struct comedi_device *dev : Driver handle |
412 | struct comedi_subdevice *s, :pointer to subdevice structure
413 struct comedi_insn *insn :pointer to insn structure |
414 | unsigned int *data : Data Pointer to read status |
415 +----------------------------------------------------------------------------+
416 | Output Parameters : -- |
417 +----------------------------------------------------------------------------+
418 | Return Value : TRUE : No error occur |
419 | : FALSE : Error occur. Return the error |
420 | |
421 +----------------------------------------------------------------------------+
422 */
423
424int i_APCI2032_StartStopWriteWatchdog(struct comedi_device *dev, struct comedi_subdevice *s,
425 struct comedi_insn *insn, unsigned int *data)
426{
427 switch (data[0]) {
428 case 0: /* stop the watchdog */
429 outl(0x0, devpriv->iobase + APCI2032_DIGITAL_OP_WATCHDOG + APCI2032_TCW_PROG); /* disable the watchdog */
430 break;
431 case 1: /* start the watchdog */
432 outl(0x0001,
433 devpriv->iobase + APCI2032_DIGITAL_OP_WATCHDOG +
434 APCI2032_TCW_PROG);
435 break;
436 case 2: /* Software trigger */
437 outl(0x0201,
438 devpriv->iobase + APCI2032_DIGITAL_OP_WATCHDOG +
439 APCI2032_TCW_PROG);
440 break;
441 default:
442 printk("\nSpecified functionality does not exist\n");
443 return -EINVAL;
444 }
445 return insn->n;
446}
447
448/*
449+----------------------------------------------------------------------------+
450| Function Name : int i_APCI2032_ReadWatchdog |
451| (struct comedi_device *dev,struct comedi_subdevice *s,struct comedi_insn *insn,
452| unsigned int *data); |
453+----------------------------------------------------------------------------+
454| Task : Read The Watchdog |
455+----------------------------------------------------------------------------+
456| Input Parameters : struct comedi_device *dev : Driver handle |
457| struct comedi_subdevice *s, :pointer to subdevice structure
458| struct comedi_insn *insn :pointer to insn structure |
459| unsigned int *data : Data Pointer to read status |
460+----------------------------------------------------------------------------+
461| Output Parameters : -- |
462+----------------------------------------------------------------------------+
463| Return Value : TRUE : No error occur |
464| : FALSE : Error occur. Return the error |
465| |
466+----------------------------------------------------------------------------+
467*/
468
469int i_APCI2032_ReadWatchdog(struct comedi_device *dev, struct comedi_subdevice *s,
470 struct comedi_insn *insn, unsigned int *data)
471{
472
473 data[0] =
474 inl(devpriv->iobase + APCI2032_DIGITAL_OP_WATCHDOG +
475 APCI2032_TCW_TRIG_STATUS) & 0x1;
476 return insn->n;
477}
478
479/*
480+----------------------------------------------------------------------------+
481| Function Name : void v_APCI2032_Interrupt |
482| (int irq , void *d) |
483+----------------------------------------------------------------------------+
484| Task : Writes port value To the selected port |
485+----------------------------------------------------------------------------+
486| Input Parameters : int irq : irq number |
487| void *d : void pointer |
488+----------------------------------------------------------------------------+
489| Output Parameters : -- |
490+----------------------------------------------------------------------------+
491| Return Value : TRUE : No error occur |
492| : FALSE : Error occur. Return the error |
493| |
494+----------------------------------------------------------------------------+
495*/
496void v_APCI2032_Interrupt(int irq, void *d)
497{
498 struct comedi_device *dev = d;
499 unsigned int ui_DO;
500
501 ui_DO = inl(devpriv->iobase + APCI2032_DIGITAL_OP_IRQ) & 0x1; /* Check if VCC OR CC interrupt has occurred. */
502
503 if (ui_DO == 0) {
504 printk("\nInterrupt from unKnown source\n");
505 } /* if(ui_DO==0) */
506 if (ui_DO) {
507 /* Check for Digital Output interrupt Type - 1: Vcc interrupt 2: CC interrupt. */
508 ui_Type =
509 inl(devpriv->iobase +
510 APCI2032_DIGITAL_OP_INTERRUPT_STATUS) & 0x3;
511 outl(0x0,
512 devpriv->iobase + APCI2032_DIGITAL_OP +
513 APCI2032_DIGITAL_OP_INTERRUPT);
514 if (ui_Type == 1) {
515 /* Sends signal to user space */
516 send_sig(SIGIO, devpriv->tsk_Current, 0);
517 } /* if (ui_Type==1) */
518 else {
519 if (ui_Type == 2) {
520 /* Sends signal to user space */
521 send_sig(SIGIO, devpriv->tsk_Current, 0);
522 } /* if (ui_Type==2) */
523 } /* else if (ui_Type==1) */
524 } /* if(ui_DO) */
525
526 return;
527
528}
529
530/*
531+----------------------------------------------------------------------------+
532| Function Name : int i_APCI2032_ReadInterruptStatus |
533| (struct comedi_device *dev,struct comedi_subdevice *s, |
534| struct comedi_insn *insn,unsigned int *data) |
535+----------------------------------------------------------------------------+
536| Task :Reads the interrupt status register |
537+----------------------------------------------------------------------------+
538| Input Parameters : |
539+----------------------------------------------------------------------------+
540| Output Parameters : -- |
541+----------------------------------------------------------------------------+
542| Return Value : |
543| |
544+----------------------------------------------------------------------------+
545*/
546
547int i_APCI2032_ReadInterruptStatus(struct comedi_device *dev, struct comedi_subdevice *s,
548 struct comedi_insn *insn, unsigned int *data)
549{
550 *data = ui_Type;
551 return insn->n;
552}
553
554/*
555+----------------------------------------------------------------------------+
556| Function Name : int i_APCI2032_Reset(struct comedi_device *dev) |
557| |
558+----------------------------------------------------------------------------+
559| Task :Resets the registers of the card |
560+----------------------------------------------------------------------------+
561| Input Parameters : |
562+----------------------------------------------------------------------------+
563| Output Parameters : -- |
564+----------------------------------------------------------------------------+
565| Return Value : |
566| |
567+----------------------------------------------------------------------------+
568*/
569
570int i_APCI2032_Reset(struct comedi_device *dev)
571{
572 devpriv->b_DigitalOutputRegister = 0;
573 ui_Type = 0;
574 outl(0x0, devpriv->iobase + APCI2032_DIGITAL_OP); /* Resets the output channels */
575 outl(0x0, devpriv->iobase + APCI2032_DIGITAL_OP_INTERRUPT); /* Disables the interrupt. */
576 outl(0x0, devpriv->iobase + APCI2032_DIGITAL_OP_WATCHDOG + APCI2032_TCW_PROG); /* disable the watchdog */
577 outl(0x0, devpriv->iobase + APCI2032_DIGITAL_OP_WATCHDOG + APCI2032_TCW_RELOAD_VALUE); /* reload=0 */
578 return 0;
579}
diff --git a/drivers/staging/comedi/drivers/addi-data/hwdrv_apci2032.h b/drivers/staging/comedi/drivers/addi-data/hwdrv_apci2032.h
deleted file mode 100644
index ab145e7c9405..000000000000
--- a/drivers/staging/comedi/drivers/addi-data/hwdrv_apci2032.h
+++ /dev/null
@@ -1,83 +0,0 @@
1/*
2 * Copyright (C) 2004,2005 ADDI-DATA GmbH for the source code of this module.
3 *
4 * ADDI-DATA GmbH
5 * Dieselstrasse 3
6 * D-77833 Ottersweier
7 * Tel: +19(0)7223/9493-0
8 * Fax: +49(0)7223/9493-92
9 * http://www.addi-data.com
10 * info@addi-data.com
11 *
12 * This program is free software; you can redistribute it and/or modify it
13 * under the terms of the GNU General Public License as published by the Free
14 * Software Foundation; either version 2 of the License, or (at your option)
15 * any later version.
16 */
17
18/********* Definitions for APCI-2032 card *****/
19
20/* Card Specific information */
21#define APCI2032_BOARD_VENDOR_ID 0x15B8
22#define APCI2032_ADDRESS_RANGE 63
23
24/* DIGITAL INPUT-OUTPUT DEFINE */
25
26#define APCI2032_DIGITAL_OP 0
27#define APCI2032_DIGITAL_OP_RW 0
28#define APCI2032_DIGITAL_OP_INTERRUPT 4
29#define APCI2032_DIGITAL_OP_IRQ 12
30
31/* Digital Output Interrupt Status */
32#define APCI2032_DIGITAL_OP_INTERRUPT_STATUS 8
33
34/* Digital Output Interrupt Enable Disable. */
35#define APCI2032_DIGITAL_OP_VCC_INTERRUPT_ENABLE 0x1
36#define APCI2032_DIGITAL_OP_VCC_INTERRUPT_DISABLE 0xFFFFFFFE
37#define APCI2032_DIGITAL_OP_CC_INTERRUPT_ENABLE 0x2
38#define APCI2032_DIGITAL_OP_CC_INTERRUPT_DISABLE 0xFFFFFFFD
39
40/* ADDIDATA Enable Disable */
41
42#define ADDIDATA_ENABLE 1
43#define ADDIDATA_DISABLE 0
44
45/* TIMER COUNTER WATCHDOG DEFINES */
46
47#define ADDIDATA_WATCHDOG 2
48#define APCI2032_DIGITAL_OP_WATCHDOG 16
49#define APCI2032_TCW_RELOAD_VALUE 4
50#define APCI2032_TCW_TIMEBASE 8
51#define APCI2032_TCW_PROG 12
52#define APCI2032_TCW_TRIG_STATUS 16
53#define APCI2032_TCW_IRQ 20
54
55/* Hardware Layer functions for Apci2032 */
56
57/* DO */
58int i_APCI2032_ConfigDigitalOutput(struct comedi_device *dev, struct comedi_subdevice *s,
59 struct comedi_insn *insn, unsigned int *data);
60int i_APCI2032_WriteDigitalOutput(struct comedi_device *dev, struct comedi_subdevice *s,
61 struct comedi_insn *insn, unsigned int *data);
62int i_APCI2032_ReadDigitalOutput(struct comedi_device *dev, struct comedi_subdevice *s,
63 struct comedi_insn *insn, unsigned int *data);
64int i_APCI2032_ReadInterruptStatus(struct comedi_device *dev, struct comedi_subdevice *s,
65 struct comedi_insn *insn, unsigned int *data);
66
67/* TIMER
68 * timer value is passed as u seconds
69*/
70
71int i_APCI2032_ConfigWatchdog(struct comedi_device *dev, struct comedi_subdevice *s,
72 struct comedi_insn *insn, unsigned int *data);
73int i_APCI2032_StartStopWriteWatchdog(struct comedi_device *dev, struct comedi_subdevice *s,
74 struct comedi_insn *insn, unsigned int *data);
75int i_APCI2032_ReadWatchdog(struct comedi_device *dev, struct comedi_subdevice *s,
76 struct comedi_insn *insn, unsigned int *data);
77
78/* Interrupt functions..... */
79
80void v_APCI2032_Interrupt(int irq, void *d);
81
82/* Reset functions */
83int i_APCI2032_Reset(struct comedi_device *dev);
diff --git a/drivers/staging/comedi/drivers/addi-data/hwdrv_apci2200.c b/drivers/staging/comedi/drivers/addi-data/hwdrv_apci2200.c
index 3d378b5ecbce..9d4a117aad43 100644
--- a/drivers/staging/comedi/drivers/addi-data/hwdrv_apci2200.c
+++ b/drivers/staging/comedi/drivers/addi-data/hwdrv_apci2200.c
@@ -46,354 +46,54 @@ You should also find the complete GPL in the COPYING file accompanying this sour
46 +----------+-----------+------------------------------------------------+ 46 +----------+-----------+------------------------------------------------+
47*/ 47*/
48 48
49/* 49/********* Definitions for APCI-2200 card *****/
50+----------------------------------------------------------------------------+
51| Included files |
52+----------------------------------------------------------------------------+
53*/
54#include "hwdrv_apci2200.h"
55 50
56/* 51/* Card Specific information */
57+----------------------------------------------------------------------------+ 52#define APCI2200_ADDRESS_RANGE 64
58| Function Name : int i_APCI2200_Read1DigitalInput |
59| (struct comedi_device *dev,struct comedi_subdevice *s, |
60| struct comedi_insn *insn,unsigned int *data) |
61+----------------------------------------------------------------------------+
62| Task : Return the status of the digital input |
63+----------------------------------------------------------------------------+
64| Input Parameters : struct comedi_device *dev : Driver handle |
65| struct comedi_subdevice *s, :pointer to subdevice structure
66| struct comedi_insn *insn :pointer to insn structure |
67| unsigned int *data : Data Pointer to read status |
68+----------------------------------------------------------------------------+
69| Output Parameters : -- |
70+----------------------------------------------------------------------------+
71| Return Value : TRUE : No error occur |
72| : FALSE : Error occur. Return the error |
73| |
74+----------------------------------------------------------------------------+
75*/
76int i_APCI2200_Read1DigitalInput(struct comedi_device *dev, struct comedi_subdevice *s,
77 struct comedi_insn *insn, unsigned int *data)
78{
79 unsigned int ui_TmpValue = 0;
80 unsigned int ui_Channel;
81 ui_Channel = CR_CHAN(insn->chanspec);
82 if (ui_Channel <= 7) {
83 ui_TmpValue = (unsigned int) inw(devpriv->iobase + APCI2200_DIGITAL_IP);
84 *data = (ui_TmpValue >> ui_Channel) & 0x1;
85 } /* if(ui_Channel >= 0 && ui_Channel <=7) */
86 else {
87 printk("\nThe specified channel does not exist\n");
88 return -EINVAL; /* "sorry channel spec wrong " */
89 } /* else if(ui_Channel >= 0 && ui_Channel <=7) */
90 53
91 return insn->n; 54/* DIGITAL INPUT-OUTPUT DEFINE */
92}
93
94/*
95+----------------------------------------------------------------------------+
96| Function Name : int i_APCI2200_ReadMoreDigitalInput |
97| (struct comedi_device *dev,struct comedi_subdevice *s, |
98| struct comedi_insn *insn,unsigned int *data) |
99+----------------------------------------------------------------------------+
100| Task : Return the status of the Requested digital inputs |
101+----------------------------------------------------------------------------+
102| Input Parameters : struct comedi_device *dev : Driver handle |
103| struct comedi_subdevice *s, :pointer to subdevice structure
104| struct comedi_insn *insn :pointer to insn structure |
105| unsigned int *data : Data Pointer to read status |
106+----------------------------------------------------------------------------+
107| Output Parameters : -- |
108+----------------------------------------------------------------------------+
109| Return Value : TRUE : No error occur |
110| : FALSE : Error occur. Return the error |
111| |
112+----------------------------------------------------------------------------+
113*/
114 55
115int i_APCI2200_ReadMoreDigitalInput(struct comedi_device *dev, struct comedi_subdevice *s, 56#define APCI2200_DIGITAL_OP 4
116 struct comedi_insn *insn, unsigned int *data) 57#define APCI2200_DIGITAL_IP 0
117{
118 58
119 unsigned int ui_PortValue = data[0]; 59/* TIMER COUNTER WATCHDOG DEFINES */
120 unsigned int ui_Mask = 0;
121 unsigned int ui_NoOfChannels;
122 60
123 ui_NoOfChannels = CR_CHAN(insn->chanspec); 61#define APCI2200_WATCHDOG 0x08
62#define APCI2200_WATCHDOG_ENABLEDISABLE 12
63#define APCI2200_WATCHDOG_RELOAD_VALUE 4
64#define APCI2200_WATCHDOG_STATUS 16
124 65
125 *data = (unsigned int) inw(devpriv->iobase + APCI2200_DIGITAL_IP); 66static int apci2200_di_insn_bits(struct comedi_device *dev,
126 switch (ui_NoOfChannels) { 67 struct comedi_subdevice *s,
127 case 2: 68 struct comedi_insn *insn,
128 ui_Mask = 3; 69 unsigned int *data)
129 *data = (*data >> (2 * ui_PortValue)) & ui_Mask; 70{
130 break; 71 struct addi_private *devpriv = dev->private;
131 case 4:
132 ui_Mask = 15;
133 *data = (*data >> (4 * ui_PortValue)) & ui_Mask;
134 break;
135 case 7:
136 break;
137 72
138 default: 73 data[1] = inw(devpriv->iobase + APCI2200_DIGITAL_IP);
139 printk("\nWrong parameters\n");
140 return -EINVAL; /* "sorry channel spec wrong " */
141 break;
142 } /* switch(ui_NoOfChannels) */
143 74
144 return insn->n; 75 return insn->n;
145} 76}
146 77
147/* 78static int apci2200_do_insn_bits(struct comedi_device *dev,
148+----------------------------------------------------------------------------+ 79 struct comedi_subdevice *s,
149| Function Name : int i_APCI2200_ConfigDigitalOutput (struct comedi_device *dev, 80 struct comedi_insn *insn,
150| struct comedi_subdevice *s struct comedi_insn *insn,unsigned int *data) | 81 unsigned int *data)
151| |
152+----------------------------------------------------------------------------+
153| Task : Configures The Digital Output Subdevice. |
154+----------------------------------------------------------------------------+
155| Input Parameters : struct comedi_device *dev : Driver handle |
156| unsigned int *data : Data Pointer contains |
157| configuration parameters as below |
158| struct comedi_subdevice *s, :pointer to subdevice structure
159| struct comedi_insn *insn :pointer to insn structure |
160| data[0] :1:Memory on |
161| 0:Memory off |
162| |
163| |
164+----------------------------------------------------------------------------+
165| Output Parameters : -- |
166+----------------------------------------------------------------------------+
167| Return Value : TRUE : No error occur |
168| : FALSE : Error occur. Return the error |
169| |
170+----------------------------------------------------------------------------+
171*/
172int i_APCI2200_ConfigDigitalOutput(struct comedi_device *dev, struct comedi_subdevice *s,
173 struct comedi_insn *insn, unsigned int *data)
174{ 82{
175 devpriv->b_OutputMemoryStatus = data[0]; 83 struct addi_private *devpriv = dev->private;
176 return insn->n; 84 unsigned int mask = data[0];
177} 85 unsigned int bits = data[1];
178 86
179/* 87 s->state = inw(devpriv->iobase + APCI2200_DIGITAL_OP);
180+----------------------------------------------------------------------------+ 88 if (mask) {
181| Function Name : int i_APCI2200_WriteDigitalOutput | 89 s->state &= ~mask;
182| (struct comedi_device *dev,struct comedi_subdevice *s,struct comedi_insn *insn, 90 s->state |= (bits & mask);
183| unsigned int *data) |
184+----------------------------------------------------------------------------+
185| Task : Writes port value To the selected port |
186+----------------------------------------------------------------------------+
187| Input Parameters : struct comedi_device *dev : Driver handle |
188| struct comedi_subdevice *s, :pointer to subdevice structure
189| struct comedi_insn *insn :pointer to insn structure |
190| unsigned int *data : Data Pointer to read status |
191+----------------------------------------------------------------------------+
192| Output Parameters : -- |
193+----------------------------------------------------------------------------+
194| Return Value : TRUE : No error occur |
195| : FALSE : Error occur. Return the error |
196| |
197+----------------------------------------------------------------------------+
198*/
199 91
200int i_APCI2200_WriteDigitalOutput(struct comedi_device *dev, struct comedi_subdevice *s, 92 outw(s->state, devpriv->iobase + APCI2200_DIGITAL_OP);
201 struct comedi_insn *insn, unsigned int *data) 93 }
202{
203 unsigned int ui_Temp, ui_Temp1;
204 unsigned int ui_NoOfChannel = CR_CHAN(insn->chanspec); /* get the channel */
205 if (devpriv->b_OutputMemoryStatus) {
206 ui_Temp = inw(devpriv->iobase + APCI2200_DIGITAL_OP);
207 94
208 } /* if(devpriv->b_OutputMemoryStatus ) */ 95 data[1] = s->state;
209 else {
210 ui_Temp = 0;
211 } /* if(devpriv->b_OutputMemoryStatus ) */
212 if (data[3] == 0) {
213 if (data[1] == 0) {
214 data[0] = (data[0] << ui_NoOfChannel) | ui_Temp;
215 outw(data[0], devpriv->iobase + APCI2200_DIGITAL_OP);
216 } /* if(data[1]==0) */
217 else {
218 if (data[1] == 1) {
219 switch (ui_NoOfChannel) {
220
221 case 2:
222 data[0] =
223 (data[0] << (2 *
224 data[2])) | ui_Temp;
225 break;
226
227 case 4:
228 data[0] =
229 (data[0] << (4 *
230 data[2])) | ui_Temp;
231 break;
232
233 case 8:
234 data[0] =
235 (data[0] << (8 *
236 data[2])) | ui_Temp;
237 break;
238 case 15:
239 data[0] = data[0] | ui_Temp;
240 break;
241 default:
242 comedi_error(dev, " chan spec wrong");
243 return -EINVAL; /* "sorry channel spec wrong " */
244
245 } /* switch(ui_NoOfChannels) */
246
247 outw(data[0],
248 devpriv->iobase + APCI2200_DIGITAL_OP);
249 } /* if(data[1]==1) */
250 else {
251 printk("\nSpecified channel not supported\n");
252 } /* else if(data[1]==1) */
253 } /* elseif(data[1]==0) */
254 } /* if(data[3]==0) */
255 else {
256 if (data[3] == 1) {
257 if (data[1] == 0) {
258 data[0] = ~data[0] & 0x1;
259 ui_Temp1 = 1;
260 ui_Temp1 = ui_Temp1 << ui_NoOfChannel;
261 ui_Temp = ui_Temp | ui_Temp1;
262 data[0] = (data[0] << ui_NoOfChannel) ^ 0xffff;
263 data[0] = data[0] & ui_Temp;
264 outw(data[0],
265 devpriv->iobase + APCI2200_DIGITAL_OP);
266 } /* if(data[1]==0) */
267 else {
268 if (data[1] == 1) {
269 switch (ui_NoOfChannel) {
270
271 case 2:
272 data[0] = ~data[0] & 0x3;
273 ui_Temp1 = 3;
274 ui_Temp1 =
275 ui_Temp1 << 2 * data[2];
276 ui_Temp = ui_Temp | ui_Temp1;
277 data[0] =
278 ((data[0] << (2 *
279 data
280 [2])) ^
281 0xffff) & ui_Temp;
282 break;
283
284 case 4:
285 data[0] = ~data[0] & 0xf;
286 ui_Temp1 = 15;
287 ui_Temp1 =
288 ui_Temp1 << 4 * data[2];
289 ui_Temp = ui_Temp | ui_Temp1;
290 data[0] =
291 ((data[0] << (4 *
292 data
293 [2])) ^
294 0xffff) & ui_Temp;
295 break;
296
297 case 8:
298 data[0] = ~data[0] & 0xff;
299 ui_Temp1 = 255;
300 ui_Temp1 =
301 ui_Temp1 << 8 * data[2];
302 ui_Temp = ui_Temp | ui_Temp1;
303 data[0] =
304 ((data[0] << (8 *
305 data
306 [2])) ^
307 0xffff) & ui_Temp;
308 break;
309 case 15:
310 break;
311
312 default:
313 comedi_error(dev,
314 " chan spec wrong");
315 return -EINVAL; /* "sorry channel spec wrong " */
316
317 } /* switch(ui_NoOfChannels) */
318
319 outw(data[0],
320 devpriv->iobase +
321 APCI2200_DIGITAL_OP);
322 } /* if(data[1]==1) */
323 else {
324 printk("\nSpecified channel not supported\n");
325 } /* else if(data[1]==1) */
326 } /* elseif(data[1]==0) */
327 } /* if(data[3]==1); */
328 else {
329 printk("\nSpecified functionality does not exist\n");
330 return -EINVAL;
331 } /* if else data[3]==1) */
332 } /* if else data[3]==0) */
333 return insn->n;
334}
335
336/*
337+----------------------------------------------------------------------------+
338| Function Name : int i_APCI2200_ReadDigitalOutput |
339| (struct comedi_device *dev,struct comedi_subdevice *s,struct comedi_insn *insn,
340| unsigned int *data) |
341+----------------------------------------------------------------------------+
342| Task : Read value of the selected channel or port |
343+----------------------------------------------------------------------------+
344| Input Parameters : struct comedi_device *dev : Driver handle |
345| struct comedi_subdevice *s, :pointer to subdevice structure
346| struct comedi_insn *insn :pointer to insn structure |
347| unsigned int *data : Data Pointer to read status |
348+----------------------------------------------------------------------------+
349| Output Parameters : -- |
350+----------------------------------------------------------------------------+
351| Return Value : TRUE : No error occur |
352| : FALSE : Error occur. Return the error |
353| |
354+----------------------------------------------------------------------------+
355*/
356
357int i_APCI2200_ReadDigitalOutput(struct comedi_device *dev, struct comedi_subdevice *s,
358 struct comedi_insn *insn, unsigned int *data)
359{
360 96
361 unsigned int ui_Temp;
362 unsigned int ui_NoOfChannel = CR_CHAN(insn->chanspec); /* get the channel */
363 ui_Temp = data[0];
364 *data = inw(devpriv->iobase + APCI2200_DIGITAL_OP);
365 if (ui_Temp == 0) {
366 *data = (*data >> ui_NoOfChannel) & 0x1;
367 } /* if(ui_Temp==0) */
368 else {
369 if (ui_Temp == 1) {
370 switch (ui_NoOfChannel) {
371
372 case 2:
373 *data = (*data >> (2 * data[1])) & 3;
374 break;
375
376 case 4:
377 *data = (*data >> (4 * data[1])) & 15;
378 break;
379
380 case 8:
381 *data = (*data >> (8 * data[1])) & 255;
382 break;
383
384 case 15:
385 break;
386
387 default:
388 comedi_error(dev, " chan spec wrong");
389 return -EINVAL; /* "sorry channel spec wrong " */
390
391 } /* switch(ui_NoOfChannels) */
392 } /* if(ui_Temp==1) */
393 else {
394 printk("\nSpecified channel not supported \n");
395 } /* elseif(ui_Temp==1) */
396 } /* elseif(ui_Temp==0) */
397 return insn->n; 97 return insn->n;
398} 98}
399 99
@@ -418,9 +118,13 @@ int i_APCI2200_ReadDigitalOutput(struct comedi_device *dev, struct comedi_subdev
418+----------------------------------------------------------------------------+ 118+----------------------------------------------------------------------------+
419*/ 119*/
420 120
421int i_APCI2200_ConfigWatchdog(struct comedi_device *dev, struct comedi_subdevice *s, 121static int i_APCI2200_ConfigWatchdog(struct comedi_device *dev,
422 struct comedi_insn *insn, unsigned int *data) 122 struct comedi_subdevice *s,
123 struct comedi_insn *insn,
124 unsigned int *data)
423{ 125{
126 struct addi_private *devpriv = dev->private;
127
424 if (data[0] == 0) { 128 if (data[0] == 0) {
425 /* Disable the watchdog */ 129 /* Disable the watchdog */
426 outw(0x0, 130 outw(0x0,
@@ -464,9 +168,13 @@ int i_APCI2200_ConfigWatchdog(struct comedi_device *dev, struct comedi_subdevice
464 +----------------------------------------------------------------------------+ 168 +----------------------------------------------------------------------------+
465 */ 169 */
466 170
467int i_APCI2200_StartStopWriteWatchdog(struct comedi_device *dev, struct comedi_subdevice *s, 171static int i_APCI2200_StartStopWriteWatchdog(struct comedi_device *dev,
468 struct comedi_insn *insn, unsigned int *data) 172 struct comedi_subdevice *s,
173 struct comedi_insn *insn,
174 unsigned int *data)
469{ 175{
176 struct addi_private *devpriv = dev->private;
177
470 switch (data[0]) { 178 switch (data[0]) {
471 case 0: /* stop the watchdog */ 179 case 0: /* stop the watchdog */
472 outw(0x0, devpriv->iobase + APCI2200_WATCHDOG + APCI2200_WATCHDOG_ENABLEDISABLE); /* disable the watchdog */ 180 outw(0x0, devpriv->iobase + APCI2200_WATCHDOG + APCI2200_WATCHDOG_ENABLEDISABLE); /* disable the watchdog */
@@ -509,9 +217,13 @@ int i_APCI2200_StartStopWriteWatchdog(struct comedi_device *dev, struct comedi_s
509+----------------------------------------------------------------------------+ 217+----------------------------------------------------------------------------+
510*/ 218*/
511 219
512int i_APCI2200_ReadWatchdog(struct comedi_device *dev, struct comedi_subdevice *s, 220static int i_APCI2200_ReadWatchdog(struct comedi_device *dev,
513 struct comedi_insn *insn, unsigned int *data) 221 struct comedi_subdevice *s,
222 struct comedi_insn *insn,
223 unsigned int *data)
514{ 224{
225 struct addi_private *devpriv = dev->private;
226
515 data[0] = 227 data[0] =
516 inw(devpriv->iobase + APCI2200_WATCHDOG + 228 inw(devpriv->iobase + APCI2200_WATCHDOG +
517 APCI2200_WATCHDOG_STATUS) & 0x1; 229 APCI2200_WATCHDOG_STATUS) & 0x1;
@@ -533,8 +245,10 @@ int i_APCI2200_ReadWatchdog(struct comedi_device *dev, struct comedi_subdevice *
533+----------------------------------------------------------------------------+ 245+----------------------------------------------------------------------------+
534*/ 246*/
535 247
536int i_APCI2200_Reset(struct comedi_device *dev) 248static int i_APCI2200_Reset(struct comedi_device *dev)
537{ 249{
250 struct addi_private *devpriv = dev->private;
251
538 outw(0x0, devpriv->iobase + APCI2200_DIGITAL_OP); /* RESETS THE DIGITAL OUTPUTS */ 252 outw(0x0, devpriv->iobase + APCI2200_DIGITAL_OP); /* RESETS THE DIGITAL OUTPUTS */
539 outw(0x0, 253 outw(0x0,
540 devpriv->iobase + APCI2200_WATCHDOG + 254 devpriv->iobase + APCI2200_WATCHDOG +
diff --git a/drivers/staging/comedi/drivers/addi-data/hwdrv_apci2200.h b/drivers/staging/comedi/drivers/addi-data/hwdrv_apci2200.h
deleted file mode 100644
index 83f42af84b8f..000000000000
--- a/drivers/staging/comedi/drivers/addi-data/hwdrv_apci2200.h
+++ /dev/null
@@ -1,61 +0,0 @@
1/*
2 * Copyright (C) 2004,2005 ADDI-DATA GmbH for the source code of this module.
3 *
4 * ADDI-DATA GmbH
5 * Dieselstrasse 3
6 * D-77833 Ottersweier
7 * Tel: +19(0)7223/9493-0
8 * Fax: +49(0)7223/9493-92
9 * http://www.addi-data.com
10 * info@addi-data.com
11 *
12 * This program is free software; you can redistribute it and/or modify it
13 * under the terms of the GNU General Public License as published by the Free
14 * Software Foundation; either version 2 of the License, or (at your option)
15 * any later version.
16 */
17
18/********* Definitions for APCI-2200 card *****/
19
20/* Card Specific information */
21#define APCI2200_BOARD_VENDOR_ID 0x15b8
22#define APCI2200_ADDRESS_RANGE 64
23
24/* DIGITAL INPUT-OUTPUT DEFINE */
25
26#define APCI2200_DIGITAL_OP 4
27#define APCI2200_DIGITAL_IP 0
28
29/* TIMER COUNTER WATCHDOG DEFINES */
30
31#define APCI2200_WATCHDOG 0x08
32#define APCI2200_WATCHDOG_ENABLEDISABLE 12
33#define APCI2200_WATCHDOG_RELOAD_VALUE 4
34#define APCI2200_WATCHDOG_STATUS 16
35
36/* Hardware Layer functions for Apci2200 */
37
38/* Digital Input */
39int i_APCI2200_ReadMoreDigitalInput(struct comedi_device *dev, struct comedi_subdevice *s,
40 struct comedi_insn *insn, unsigned int *data);
41int i_APCI2200_Read1DigitalInput(struct comedi_device *dev, struct comedi_subdevice *s,
42 struct comedi_insn *insn, unsigned int *data);
43
44/* Digital Output */
45int i_APCI2200_ConfigDigitalOutput(struct comedi_device *dev, struct comedi_subdevice *s,
46 struct comedi_insn *insn, unsigned int *data);
47int i_APCI2200_WriteDigitalOutput(struct comedi_device *dev, struct comedi_subdevice *s,
48 struct comedi_insn *insn, unsigned int *data);
49int i_APCI2200_ReadDigitalOutput(struct comedi_device *dev, struct comedi_subdevice *s,
50 struct comedi_insn *insn, unsigned int *data);
51
52/* TIMER */
53int i_APCI2200_ConfigWatchdog(struct comedi_device *dev, struct comedi_subdevice *s,
54 struct comedi_insn *insn, unsigned int *data);
55int i_APCI2200_StartStopWriteWatchdog(struct comedi_device *dev, struct comedi_subdevice *s,
56 struct comedi_insn *insn, unsigned int *data);
57int i_APCI2200_ReadWatchdog(struct comedi_device *dev, struct comedi_subdevice *s,
58 struct comedi_insn *insn, unsigned int *data);
59
60/* reset */
61int i_APCI2200_Reset(struct comedi_device *dev);
diff --git a/drivers/staging/comedi/drivers/addi-data/hwdrv_apci3120.c b/drivers/staging/comedi/drivers/addi-data/hwdrv_apci3120.c
index f406dfb2a677..74065baa3c08 100644
--- a/drivers/staging/comedi/drivers/addi-data/hwdrv_apci3120.c
+++ b/drivers/staging/comedi/drivers/addi-data/hwdrv_apci3120.c
@@ -44,8 +44,203 @@ You should also find the complete GPL in the COPYING file accompanying this sour
44 +----------+-----------+------------------------------------------------+ 44 +----------+-----------+------------------------------------------------+
45*/ 45*/
46 46
47#include "hwdrv_apci3120.h" 47/*
48static unsigned int ui_Temp; 48 * ADDON RELATED ADDITIONS
49 */
50/* Constant */
51#define APCI3120_ENABLE_TRANSFER_ADD_ON_LOW 0x00
52#define APCI3120_ENABLE_TRANSFER_ADD_ON_HIGH 0x1200
53#define APCI3120_A2P_FIFO_MANAGEMENT 0x04000400L
54#define APCI3120_AMWEN_ENABLE 0x02
55#define APCI3120_A2P_FIFO_WRITE_ENABLE 0x01
56#define APCI3120_FIFO_ADVANCE_ON_BYTE_2 0x20000000L
57#define APCI3120_ENABLE_WRITE_TC_INT 0x00004000L
58#define APCI3120_CLEAR_WRITE_TC_INT 0x00040000L
59#define APCI3120_DISABLE_AMWEN_AND_A2P_FIFO_WRITE 0x0
60#define APCI3120_DISABLE_BUS_MASTER_ADD_ON 0x0
61#define APCI3120_DISABLE_BUS_MASTER_PCI 0x0
62
63/* ADD_ON ::: this needed since apci supports 16 bit interface to add on */
64#define APCI3120_ADD_ON_AGCSTS_LOW 0x3C
65#define APCI3120_ADD_ON_AGCSTS_HIGH (APCI3120_ADD_ON_AGCSTS_LOW + 2)
66#define APCI3120_ADD_ON_MWAR_LOW 0x24
67#define APCI3120_ADD_ON_MWAR_HIGH (APCI3120_ADD_ON_MWAR_LOW + 2)
68#define APCI3120_ADD_ON_MWTC_LOW 0x058
69#define APCI3120_ADD_ON_MWTC_HIGH (APCI3120_ADD_ON_MWTC_LOW + 2)
70
71/* AMCC */
72#define APCI3120_AMCC_OP_MCSR 0x3C
73#define APCI3120_AMCC_OP_REG_INTCSR 0x38
74
75/* for transfer count enable bit */
76#define AGCSTS_TC_ENABLE 0x10000000
77
78/* used for test on mixture of BIP/UNI ranges */
79#define APCI3120_BIPOLAR_RANGES 4
80
81#define APCI3120_ADDRESS_RANGE 16
82
83#define APCI3120_DISABLE 0
84#define APCI3120_ENABLE 1
85
86#define APCI3120_START 1
87#define APCI3120_STOP 0
88
89#define APCI3120_EOC_MODE 1
90#define APCI3120_EOS_MODE 2
91#define APCI3120_DMA_MODE 3
92
93/* DIGITAL INPUT-OUTPUT DEFINE */
94
95#define APCI3120_DIGITAL_OUTPUT 0x0d
96#define APCI3120_RD_STATUS 0x02
97#define APCI3120_RD_FIFO 0x00
98
99/* digital output insn_write ON /OFF selection */
100#define APCI3120_SET4DIGITALOUTPUTON 1
101#define APCI3120_SET4DIGITALOUTPUTOFF 0
102
103/* analog output SELECT BIT */
104#define APCI3120_ANALOG_OP_CHANNEL_1 0x0000
105#define APCI3120_ANALOG_OP_CHANNEL_2 0x4000
106#define APCI3120_ANALOG_OP_CHANNEL_3 0x8000
107#define APCI3120_ANALOG_OP_CHANNEL_4 0xc000
108#define APCI3120_ANALOG_OP_CHANNEL_5 0x0000
109#define APCI3120_ANALOG_OP_CHANNEL_6 0x4000
110#define APCI3120_ANALOG_OP_CHANNEL_7 0x8000
111#define APCI3120_ANALOG_OP_CHANNEL_8 0xc000
112
113/* Enable external trigger bit in nWrAddress */
114#define APCI3120_ENABLE_EXT_TRIGGER 0x8000
115
116/* ANALOG OUTPUT AND INPUT DEFINE */
117#define APCI3120_UNIPOLAR 0x80
118#define APCI3120_BIPOLAR 0x00
119#define APCI3120_ANALOG_OUTPUT_1 0x08
120#define APCI3120_ANALOG_OUTPUT_2 0x0a
121#define APCI3120_1_GAIN 0x00
122#define APCI3120_2_GAIN 0x10
123#define APCI3120_5_GAIN 0x20
124#define APCI3120_10_GAIN 0x30
125#define APCI3120_SEQ_RAM_ADDRESS 0x06
126#define APCI3120_RESET_FIFO 0x0c
127#define APCI3120_TIMER_0_MODE_2 0x01
128#define APCI3120_TIMER_0_MODE_4 0x2
129#define APCI3120_SELECT_TIMER_0_WORD 0x00
130#define APCI3120_ENABLE_TIMER0 0x1000
131#define APCI3120_CLEAR_PR 0xf0ff
132#define APCI3120_CLEAR_PA 0xfff0
133#define APCI3120_CLEAR_PA_PR (APCI3120_CLEAR_PR & APCI3120_CLEAR_PA)
134
135/* nWrMode_Select */
136#define APCI3120_ENABLE_SCAN 0x8
137#define APCI3120_DISABLE_SCAN (~APCI3120_ENABLE_SCAN)
138#define APCI3120_ENABLE_EOS_INT 0x2
139
140#define APCI3120_DISABLE_EOS_INT (~APCI3120_ENABLE_EOS_INT)
141#define APCI3120_ENABLE_EOC_INT 0x1
142#define APCI3120_DISABLE_EOC_INT (~APCI3120_ENABLE_EOC_INT)
143#define APCI3120_DISABLE_ALL_INTERRUPT_WITHOUT_TIMER \
144 (APCI3120_DISABLE_EOS_INT & APCI3120_DISABLE_EOC_INT)
145#define APCI3120_DISABLE_ALL_INTERRUPT \
146 (APCI3120_DISABLE_TIMER_INT & APCI3120_DISABLE_EOS_INT & APCI3120_DISABLE_EOC_INT)
147
148/* status register bits */
149#define APCI3120_EOC 0x8000
150#define APCI3120_EOS 0x2000
151
152/* software trigger dummy register */
153#define APCI3120_START_CONVERSION 0x02
154
155/* TIMER DEFINE */
156#define APCI3120_QUARTZ_A 70
157#define APCI3120_QUARTZ_B 50
158#define APCI3120_TIMER 1
159#define APCI3120_WATCHDOG 2
160#define APCI3120_TIMER_DISABLE 0
161#define APCI3120_TIMER_ENABLE 1
162#define APCI3120_ENABLE_TIMER2 0x4000
163#define APCI3120_DISABLE_TIMER2 (~APCI3120_ENABLE_TIMER2)
164#define APCI3120_ENABLE_TIMER_INT 0x04
165#define APCI3120_DISABLE_TIMER_INT (~APCI3120_ENABLE_TIMER_INT)
166#define APCI3120_WRITE_MODE_SELECT 0x0e
167#define APCI3120_SELECT_TIMER_0_WORD 0x00
168#define APCI3120_SELECT_TIMER_1_WORD 0x01
169#define APCI3120_TIMER_1_MODE_2 0x4
170
171/* $$ BIT FOR MODE IN nCsTimerCtr1 */
172#define APCI3120_TIMER_2_MODE_0 0x0
173#define APCI3120_TIMER_2_MODE_2 0x10
174#define APCI3120_TIMER_2_MODE_5 0x30
175
176/* $$ BIT FOR MODE IN nCsTimerCtr0 */
177#define APCI3120_SELECT_TIMER_2_LOW_WORD 0x02
178#define APCI3120_SELECT_TIMER_2_HIGH_WORD 0x03
179
180#define APCI3120_TIMER_CRT0 0x0d
181#define APCI3120_TIMER_CRT1 0x0c
182
183#define APCI3120_TIMER_VALUE 0x04
184#define APCI3120_TIMER_STATUS_REGISTER 0x0d
185#define APCI3120_RD_STATUS 0x02
186#define APCI3120_WR_ADDRESS 0x00
187#define APCI3120_ENABLE_WATCHDOG 0x20
188#define APCI3120_DISABLE_WATCHDOG (~APCI3120_ENABLE_WATCHDOG)
189#define APCI3120_ENABLE_TIMER_COUNTER 0x10
190#define APCI3120_DISABLE_TIMER_COUNTER (~APCI3120_ENABLE_TIMER_COUNTER)
191#define APCI3120_FC_TIMER 0x1000
192#define APCI3120_ENABLE_TIMER0 0x1000
193#define APCI3120_ENABLE_TIMER1 0x2000
194#define APCI3120_ENABLE_TIMER2 0x4000
195#define APCI3120_DISABLE_TIMER0 (~APCI3120_ENABLE_TIMER0)
196#define APCI3120_DISABLE_TIMER1 (~APCI3120_ENABLE_TIMER1)
197#define APCI3120_DISABLE_TIMER2 (~APCI3120_ENABLE_TIMER2)
198
199#define APCI3120_TIMER2_SELECT_EOS 0xc0
200#define APCI3120_COUNTER 3
201#define APCI3120_DISABLE_ALL_TIMER (APCI3120_DISABLE_TIMER0 & \
202 APCI3120_DISABLE_TIMER1 & \
203 APCI3120_DISABLE_TIMER2)
204
205#define MAX_ANALOGINPUT_CHANNELS 32
206
207struct str_AnalogReadInformation {
208 /* EOC or EOS */
209 unsigned char b_Type;
210 /* Interrupt use or not */
211 unsigned char b_InterruptFlag;
212 /* Selection of the conversion time */
213 unsigned int ui_ConvertTiming;
214 /* Number of channel to read */
215 unsigned char b_NbrOfChannel;
216 /* Number of the channel to be read */
217 unsigned int ui_ChannelList[MAX_ANALOGINPUT_CHANNELS];
218 /* Gain of each channel */
219 unsigned int ui_RangeList[MAX_ANALOGINPUT_CHANNELS];
220};
221
222/* ANALOG INPUT RANGE */
223static const struct comedi_lrange range_apci3120_ai = {
224 8, {
225 BIP_RANGE(10),
226 BIP_RANGE(5),
227 BIP_RANGE(2),
228 BIP_RANGE(1),
229 UNI_RANGE(10),
230 UNI_RANGE(5),
231 UNI_RANGE(2),
232 UNI_RANGE(1)
233 }
234};
235
236/* ANALOG OUTPUT RANGE */
237static const struct comedi_lrange range_apci3120_ao = {
238 2, {
239 BIP_RANGE(10),
240 UNI_RANGE(10)
241 }
242};
243
49 244
50/* FUNCTION DEFINITIONS */ 245/* FUNCTION DEFINITIONS */
51 246
@@ -55,28 +250,13 @@ static unsigned int ui_Temp;
55+----------------------------------------------------------------------------+ 250+----------------------------------------------------------------------------+
56*/ 251*/
57 252
58/* 253static int i_APCI3120_InsnConfigAnalogInput(struct comedi_device *dev,
59+----------------------------------------------------------------------------+ 254 struct comedi_subdevice *s,
60| Function name :int i_APCI3120_InsnConfigAnalogInput(struct comedi_device *dev,| 255 struct comedi_insn *insn,
61| struct comedi_subdevice *s,struct comedi_insn *insn,unsigned int *data) | 256 unsigned int *data)
62| |
63+----------------------------------------------------------------------------+
64| Task : Calls card specific function |
65| |
66+----------------------------------------------------------------------------+
67| Input Parameters : struct comedi_device *dev |
68| struct comedi_subdevice *s |
69| struct comedi_insn *insn |
70| unsigned int *data |
71+----------------------------------------------------------------------------+
72| Return Value : |
73| |
74+----------------------------------------------------------------------------+
75*/
76
77int i_APCI3120_InsnConfigAnalogInput(struct comedi_device *dev, struct comedi_subdevice *s,
78 struct comedi_insn *insn, unsigned int *data)
79{ 257{
258 const struct addi_board *this_board = comedi_board(dev);
259 struct addi_private *devpriv = dev->private;
80 unsigned int i; 260 unsigned int i;
81 261
82 if ((data[0] != APCI3120_EOC_MODE) && (data[0] != APCI3120_EOS_MODE)) 262 if ((data[0] != APCI3120_EOC_MODE) && (data[0] != APCI3120_EOS_MODE))
@@ -91,7 +271,7 @@ int i_APCI3120_InsnConfigAnalogInput(struct comedi_device *dev, struct comedi_su
91 for (i = 0; i < data[3]; i++) { 271 for (i = 0; i < data[3]; i++) {
92 272
93 if (CR_CHAN(data[4 + i]) >= 273 if (CR_CHAN(data[4 + i]) >=
94 devpriv->s_EeParameters.i_NbrAiChannel) { 274 this_board->i_NbrAiChannel) {
95 printk("bad channel list\n"); 275 printk("bad channel list\n");
96 return -2; 276 return -2;
97 } 277 }
@@ -121,31 +301,72 @@ int i_APCI3120_InsnConfigAnalogInput(struct comedi_device *dev, struct comedi_su
121} 301}
122 302
123/* 303/*
124+----------------------------------------------------------------------------+ 304 * This function will first check channel list is ok or not and then
125| Function name :int i_APCI3120_InsnReadAnalogInput(struct comedi_device *dev, | 305 * initialize the sequence RAM with the polarity, Gain,Channel number.
126| struct comedi_subdevice *s,struct comedi_insn *insn, unsigned int *data) | 306 * If the last argument of function "check"is 1 then it only checks
127| | 307 * the channel list is ok or not.
128+----------------------------------------------------------------------------+ 308 */
129| Task : card specific function | 309static int i_APCI3120_SetupChannelList(struct comedi_device *dev,
130| Reads analog input in synchronous mode | 310 struct comedi_subdevice *s,
131| EOC and EOS is selected as per configured | 311 int n_chan,
132| if no conversion time is set uses default conversion | 312 unsigned int *chanlist,
133| time 10 microsec. | 313 char check)
134| | 314{
135+----------------------------------------------------------------------------+ 315 struct addi_private *devpriv = dev->private;
136| Input Parameters : struct comedi_device *dev | 316 unsigned int i; /* , differencial=0, bipolar=0; */
137| struct comedi_subdevice *s | 317 unsigned int gain;
138| struct comedi_insn *insn | 318 unsigned short us_TmpValue;
139| unsigned int *data |
140+----------------------------------------------------------------------------+
141| Return Value : |
142| |
143+----------------------------------------------------------------------------+
144*/
145 319
146int i_APCI3120_InsnReadAnalogInput(struct comedi_device *dev, struct comedi_subdevice *s, 320 /* correct channel and range number check itself comedi/range.c */
147 struct comedi_insn *insn, unsigned int *data) 321 if (n_chan < 1) {
322 if (!check)
323 comedi_error(dev, "range/channel list is empty!");
324 return 0;
325 }
326 /* All is ok, so we can setup channel/range list */
327 if (check)
328 return 1;
329
330 /* Code to set the PA and PR...Here it set PA to 0.. */
331 devpriv->us_OutputRegister =
332 devpriv->us_OutputRegister & APCI3120_CLEAR_PA_PR;
333 devpriv->us_OutputRegister = ((n_chan - 1) & 0xf) << 8;
334 outw(devpriv->us_OutputRegister, dev->iobase + APCI3120_WR_ADDRESS);
335
336 for (i = 0; i < n_chan; i++) {
337 /* store range list to card */
338 us_TmpValue = CR_CHAN(chanlist[i]); /* get channel number; */
339
340 if (CR_RANGE(chanlist[i]) < APCI3120_BIPOLAR_RANGES)
341 us_TmpValue &= ((~APCI3120_UNIPOLAR) & 0xff); /* set bipolar */
342 else
343 us_TmpValue |= APCI3120_UNIPOLAR; /* enable unipolar...... */
344
345 gain = CR_RANGE(chanlist[i]); /* get gain number */
346 us_TmpValue |= ((gain & 0x03) << 4); /* <<4 for G0 and G1 bit in RAM */
347 us_TmpValue |= i << 8; /* To select the RAM LOCATION.... */
348 outw(us_TmpValue, dev->iobase + APCI3120_SEQ_RAM_ADDRESS);
349
350 printk("\n Gain = %i",
351 (((unsigned char)CR_RANGE(chanlist[i]) & 0x03) << 2));
352 printk("\n Channel = %i", CR_CHAN(chanlist[i]));
353 printk("\n Polarity = %i", us_TmpValue & APCI3120_UNIPOLAR);
354 }
355 return 1; /* we can serve this with scan logic */
356}
357
358/*
359 * Reads analog input in synchronous mode EOC and EOS is selected
360 * as per configured if no conversion time is set uses default
361 * conversion time 10 microsec.
362 */
363static int i_APCI3120_InsnReadAnalogInput(struct comedi_device *dev,
364 struct comedi_subdevice *s,
365 struct comedi_insn *insn,
366 unsigned int *data)
148{ 367{
368 const struct addi_board *this_board = comedi_board(dev);
369 struct addi_private *devpriv = dev->private;
149 unsigned short us_ConvertTiming, us_TmpValue, i; 370 unsigned short us_ConvertTiming, us_TmpValue, i;
150 unsigned char b_Tmp; 371 unsigned char b_Tmp;
151 372
@@ -387,26 +608,86 @@ int i_APCI3120_InsnReadAnalogInput(struct comedi_device *dev, struct comedi_subd
387 608
388} 609}
389 610
611static int i_APCI3120_Reset(struct comedi_device *dev)
612{
613 struct addi_private *devpriv = dev->private;
614 unsigned int i;
615 unsigned short us_TmpValue;
616
617 devpriv->b_AiCyclicAcquisition = APCI3120_DISABLE;
618 devpriv->b_EocEosInterrupt = APCI3120_DISABLE;
619 devpriv->b_InterruptMode = APCI3120_EOC_MODE;
620 devpriv->ui_EocEosConversionTime = 0; /* set eoc eos conv time to 0 */
621 devpriv->b_OutputMemoryStatus = 0;
622
623 /* variables used in timer subdevice */
624 devpriv->b_Timer2Mode = 0;
625 devpriv->b_Timer2Interrupt = 0;
626 devpriv->b_ExttrigEnable = 0; /* Disable ext trigger */
627
628 /* Disable all interrupts, watchdog for the anolog output */
629 devpriv->b_ModeSelectRegister = 0;
630 outb(devpriv->b_ModeSelectRegister,
631 dev->iobase + APCI3120_WRITE_MODE_SELECT);
632
633 /* Disables all counters, ext trigger and clears PA, PR */
634 devpriv->us_OutputRegister = 0;
635 outw(devpriv->us_OutputRegister, dev->iobase + APCI3120_WR_ADDRESS);
636
390/* 637/*
391+----------------------------------------------------------------------------+ 638 * Code to set the all anolog o/p channel to 0v 8191 is decimal
392| Function name :int i_APCI3120_StopCyclicAcquisition(struct comedi_device *dev,| 639 * value for zero(0 v)volt in bipolar mode(default)
393| struct comedi_subdevice *s)| 640 */
394| | 641 outw(8191 | APCI3120_ANALOG_OP_CHANNEL_1, dev->iobase + APCI3120_ANALOG_OUTPUT_1); /* channel 1 */
395+----------------------------------------------------------------------------+ 642 outw(8191 | APCI3120_ANALOG_OP_CHANNEL_2, dev->iobase + APCI3120_ANALOG_OUTPUT_1); /* channel 2 */
396| Task : Stops Cyclic acquisition | 643 outw(8191 | APCI3120_ANALOG_OP_CHANNEL_3, dev->iobase + APCI3120_ANALOG_OUTPUT_1); /* channel 3 */
397| | 644 outw(8191 | APCI3120_ANALOG_OP_CHANNEL_4, dev->iobase + APCI3120_ANALOG_OUTPUT_1); /* channel 4 */
398+----------------------------------------------------------------------------+
399| Input Parameters : struct comedi_device *dev |
400| struct comedi_subdevice *s |
401| |
402+----------------------------------------------------------------------------+
403| Return Value :0 |
404| |
405+----------------------------------------------------------------------------+
406*/
407 645
408int i_APCI3120_StopCyclicAcquisition(struct comedi_device *dev, struct comedi_subdevice *s) 646 outw(8191 | APCI3120_ANALOG_OP_CHANNEL_5, dev->iobase + APCI3120_ANALOG_OUTPUT_2); /* channel 5 */
647 outw(8191 | APCI3120_ANALOG_OP_CHANNEL_6, dev->iobase + APCI3120_ANALOG_OUTPUT_2); /* channel 6 */
648 outw(8191 | APCI3120_ANALOG_OP_CHANNEL_7, dev->iobase + APCI3120_ANALOG_OUTPUT_2); /* channel 7 */
649 outw(8191 | APCI3120_ANALOG_OP_CHANNEL_8, dev->iobase + APCI3120_ANALOG_OUTPUT_2); /* channel 8 */
650
651 /* Reset digital output to L0W */
652
653/* ES05 outb(0x0,dev->iobase+APCI3120_DIGITAL_OUTPUT); */
654 udelay(10);
655
656 inw(dev->iobase + 0); /* make a dummy read */
657 inb(dev->iobase + APCI3120_RESET_FIFO); /* flush FIFO */
658 inw(dev->iobase + APCI3120_RD_STATUS); /* flush A/D status register */
659
660 /* code to reset the RAM sequence */
661 for (i = 0; i < 16; i++) {
662 us_TmpValue = i << 8; /* select the location */
663 outw(us_TmpValue, dev->iobase + APCI3120_SEQ_RAM_ADDRESS);
664 }
665 return 0;
666}
667
668static int i_APCI3120_ExttrigEnable(struct comedi_device *dev)
409{ 669{
670 struct addi_private *devpriv = dev->private;
671
672 devpriv->us_OutputRegister |= APCI3120_ENABLE_EXT_TRIGGER;
673 outw(devpriv->us_OutputRegister, dev->iobase + APCI3120_WR_ADDRESS);
674 return 0;
675}
676
677static int i_APCI3120_ExttrigDisable(struct comedi_device *dev)
678{
679 struct addi_private *devpriv = dev->private;
680
681 devpriv->us_OutputRegister &= ~APCI3120_ENABLE_EXT_TRIGGER;
682 outw(devpriv->us_OutputRegister, dev->iobase + APCI3120_WR_ADDRESS);
683 return 0;
684}
685
686static int i_APCI3120_StopCyclicAcquisition(struct comedi_device *dev,
687 struct comedi_subdevice *s)
688{
689 struct addi_private *devpriv = dev->private;
690
410 /* Disable A2P Fifo write and AMWEN signal */ 691 /* Disable A2P Fifo write and AMWEN signal */
411 outw(0, devpriv->i_IobaseAddon + 4); 692 outw(0, devpriv->i_IobaseAddon + 4);
412 693
@@ -456,28 +737,11 @@ int i_APCI3120_StopCyclicAcquisition(struct comedi_device *dev, struct comedi_su
456 return 0; 737 return 0;
457} 738}
458 739
459/* 740static int i_APCI3120_CommandTestAnalogInput(struct comedi_device *dev,
460+----------------------------------------------------------------------------+ 741 struct comedi_subdevice *s,
461| Function name :int i_APCI3120_CommandTestAnalogInput(struct comedi_device *dev| 742 struct comedi_cmd *cmd)
462| ,struct comedi_subdevice *s,struct comedi_cmd *cmd) |
463| |
464+----------------------------------------------------------------------------+
465| Task : Test validity for a command for cyclic anlog input |
466| acquisition |
467| |
468+----------------------------------------------------------------------------+
469| Input Parameters : struct comedi_device *dev |
470| struct comedi_subdevice *s |
471| struct comedi_cmd *cmd |
472+----------------------------------------------------------------------------+
473| Return Value :0 |
474| |
475+----------------------------------------------------------------------------+
476*/
477
478int i_APCI3120_CommandTestAnalogInput(struct comedi_device *dev, struct comedi_subdevice *s,
479 struct comedi_cmd *cmd)
480{ 743{
744 const struct addi_board *this_board = comedi_board(dev);
481 int err = 0; 745 int err = 0;
482 746
483 /* Step 1 : check if triggers are trivially valid */ 747 /* Step 1 : check if triggers are trivially valid */
@@ -503,63 +767,32 @@ int i_APCI3120_CommandTestAnalogInput(struct comedi_device *dev, struct comedi_s
503 if (err) 767 if (err)
504 return 2; 768 return 2;
505 769
506 /* step 3: make sure arguments are trivially compatible */ 770 /* Step 3: check if arguments are trivially valid */
507 771
508 if (cmd->start_arg != 0) { 772 err |= cfc_check_trigger_arg_is(&cmd->start_arg, 0);
509 cmd->start_arg = 0;
510 err++;
511 }
512 773
513 if (cmd->scan_begin_src == TRIG_TIMER) { /* Test Delay timing */ 774 if (cmd->scan_begin_src == TRIG_TIMER) /* Test Delay timing */
514 if (cmd->scan_begin_arg < 775 err |= cfc_check_trigger_arg_min(&cmd->scan_begin_arg, 100000);
515 devpriv->s_EeParameters.ui_MinDelaytimeNs) {
516 cmd->scan_begin_arg =
517 devpriv->s_EeParameters.ui_MinDelaytimeNs;
518 err++;
519 }
520 }
521 776
522 if (cmd->convert_src == TRIG_TIMER) { /* Test Acquisition timing */ 777 if (cmd->convert_src == TRIG_TIMER) { /* Test Acquisition timing */
523 if (cmd->scan_begin_src == TRIG_TIMER) { 778 if (cmd->scan_begin_src == TRIG_TIMER) {
524 if ((cmd->convert_arg) 779 if (cmd->convert_arg)
525 && (cmd->convert_arg < 780 err |= cfc_check_trigger_arg_min(
526 devpriv->s_EeParameters. 781 &cmd->convert_arg, 10000);
527 ui_MinAcquisitiontimeNs)) {
528 cmd->convert_arg = devpriv->s_EeParameters.
529 ui_MinAcquisitiontimeNs;
530 err++;
531 }
532 } else { 782 } else {
533 if (cmd->convert_arg < 783 err |= cfc_check_trigger_arg_min(&cmd->convert_arg,
534 devpriv->s_EeParameters.ui_MinAcquisitiontimeNs 784 10000);
535 ) {
536 cmd->convert_arg = devpriv->s_EeParameters.
537 ui_MinAcquisitiontimeNs;
538 err++;
539
540 }
541 } 785 }
542 } 786 }
543 787
544 if (!cmd->chanlist_len) { 788 err |= cfc_check_trigger_arg_min(&cmd->chanlist_len, 1);
545 cmd->chanlist_len = 1; 789 err |= cfc_check_trigger_arg_max(&cmd->chanlist_len,
546 err++; 790 this_board->i_AiChannelList);
547 } 791
548 if (cmd->chanlist_len > this_board->i_AiChannelList) { 792 if (cmd->stop_src == TRIG_COUNT)
549 cmd->chanlist_len = this_board->i_AiChannelList; 793 err |= cfc_check_trigger_arg_min(&cmd->stop_arg, 1);
550 err++; 794 else /* TRIG_NONE */
551 } 795 err |= cfc_check_trigger_arg_is(&cmd->stop_arg, 0);
552 if (cmd->stop_src == TRIG_COUNT) {
553 if (!cmd->stop_arg) {
554 cmd->stop_arg = 1;
555 err++;
556 }
557 } else { /* TRIG_NONE */
558 if (cmd->stop_arg != 0) {
559 cmd->stop_arg = 0;
560 err++;
561 }
562 }
563 796
564 if (err) 797 if (err)
565 return 3; 798 return 3;
@@ -584,100 +817,17 @@ int i_APCI3120_CommandTestAnalogInput(struct comedi_device *dev, struct comedi_s
584} 817}
585 818
586/* 819/*
587+----------------------------------------------------------------------------+ 820 * This is used for analog input cyclic acquisition.
588| Function name : int i_APCI3120_CommandAnalogInput(struct comedi_device *dev, | 821 * Performs the command operations.
589| struct comedi_subdevice *s) | 822 * If DMA is configured does DMA initialization otherwise does the
590| | 823 * acquisition with EOS interrupt.
591+----------------------------------------------------------------------------+ 824 */
592| Task : Does asynchronous acquisition | 825static int i_APCI3120_CyclicAnalogInput(int mode,
593| Determines the mode 1 or 2. | 826 struct comedi_device *dev,
594| | 827 struct comedi_subdevice *s)
595+----------------------------------------------------------------------------+
596| Input Parameters : struct comedi_device *dev |
597| struct comedi_subdevice *s |
598| |
599+----------------------------------------------------------------------------+
600| Return Value : |
601| |
602+----------------------------------------------------------------------------+
603*/
604
605int i_APCI3120_CommandAnalogInput(struct comedi_device *dev, struct comedi_subdevice *s)
606{
607 struct comedi_cmd *cmd = &s->async->cmd;
608
609 /* loading private structure with cmd structure inputs */
610 devpriv->ui_AiFlags = cmd->flags;
611 devpriv->ui_AiNbrofChannels = cmd->chanlist_len;
612 devpriv->ui_AiScanLength = cmd->scan_end_arg;
613 devpriv->pui_AiChannelList = cmd->chanlist;
614
615 /* UPDATE-0.7.57->0.7.68devpriv->AiData=s->async->data; */
616 devpriv->AiData = s->async->prealloc_buf;
617 /* UPDATE-0.7.57->0.7.68devpriv->ui_AiDataLength=s->async->data_len; */
618 devpriv->ui_AiDataLength = s->async->prealloc_bufsz;
619
620 if (cmd->stop_src == TRIG_COUNT)
621 devpriv->ui_AiNbrofScans = cmd->stop_arg;
622 else
623 devpriv->ui_AiNbrofScans = 0;
624
625 devpriv->ui_AiTimer0 = 0; /* variables changed to timer0,timer1 */
626 devpriv->ui_AiTimer1 = 0;
627 if ((devpriv->ui_AiNbrofScans == 0) || (devpriv->ui_AiNbrofScans == -1))
628 devpriv->b_AiContinuous = 1; /* user want neverending analog acquisition */
629 /* stopped using cancel */
630
631 if (cmd->start_src == TRIG_EXT)
632 devpriv->b_ExttrigEnable = APCI3120_ENABLE;
633 else
634 devpriv->b_ExttrigEnable = APCI3120_DISABLE;
635
636 if (cmd->scan_begin_src == TRIG_FOLLOW) {
637 /* mode 1 or 3 */
638 if (cmd->convert_src == TRIG_TIMER) {
639 /* mode 1 */
640
641 devpriv->ui_AiTimer0 = cmd->convert_arg; /* timer constant in nano seconds */
642 /* return this_board->ai_cmd(1,dev,s); */
643 return i_APCI3120_CyclicAnalogInput(1, dev, s);
644 }
645
646 }
647 if ((cmd->scan_begin_src == TRIG_TIMER)
648 && (cmd->convert_src == TRIG_TIMER)) {
649 /* mode 2 */
650 devpriv->ui_AiTimer1 = cmd->scan_begin_arg;
651 devpriv->ui_AiTimer0 = cmd->convert_arg; /* variable changed timer2 to timer0 */
652 /* return this_board->ai_cmd(2,dev,s); */
653 return i_APCI3120_CyclicAnalogInput(2, dev, s);
654 }
655 return -1;
656}
657
658/*
659+----------------------------------------------------------------------------+
660| Function name : int i_APCI3120_CyclicAnalogInput(int mode, |
661| struct comedi_device * dev,struct comedi_subdevice * s) |
662+----------------------------------------------------------------------------+
663| Task : This is used for analog input cyclic acquisition |
664| Performs the command operations. |
665| If DMA is configured does DMA initialization |
666| otherwise does the acquisition with EOS interrupt. |
667| |
668+----------------------------------------------------------------------------+
669| Input Parameters : |
670| |
671| |
672+----------------------------------------------------------------------------+
673| Return Value : |
674| |
675+----------------------------------------------------------------------------+
676*/
677
678int i_APCI3120_CyclicAnalogInput(int mode, struct comedi_device *dev,
679 struct comedi_subdevice *s)
680{ 828{
829 const struct addi_board *this_board = comedi_board(dev);
830 struct addi_private *devpriv = dev->private;
681 unsigned char b_Tmp; 831 unsigned char b_Tmp;
682 unsigned int ui_Tmp, ui_DelayTiming = 0, ui_TimerValue1 = 0, dmalen0 = 832 unsigned int ui_Tmp, ui_DelayTiming = 0, ui_TimerValue1 = 0, dmalen0 =
683 0, dmalen1 = 0, ui_TimerValue2 = 833 0, dmalen1 = 0, ui_TimerValue2 =
@@ -1186,241 +1336,277 @@ int i_APCI3120_CyclicAnalogInput(int mode, struct comedi_device *dev,
1186} 1336}
1187 1337
1188/* 1338/*
1189+----------------------------------------------------------------------------+ 1339 * Does asynchronous acquisition.
1190| intERNAL FUNCTIONS | 1340 * Determines the mode 1 or 2.
1191+----------------------------------------------------------------------------+ 1341 */
1192*/ 1342static int i_APCI3120_CommandAnalogInput(struct comedi_device *dev,
1343 struct comedi_subdevice *s)
1344{
1345 struct addi_private *devpriv = dev->private;
1346 struct comedi_cmd *cmd = &s->async->cmd;
1193 1347
1194/* 1348 /* loading private structure with cmd structure inputs */
1195+----------------------------------------------------------------------------+ 1349 devpriv->ui_AiFlags = cmd->flags;
1196| Function name : int i_APCI3120_Reset(struct comedi_device *dev) | 1350 devpriv->ui_AiNbrofChannels = cmd->chanlist_len;
1197| | 1351 devpriv->ui_AiScanLength = cmd->scan_end_arg;
1198| | 1352 devpriv->pui_AiChannelList = cmd->chanlist;
1199+----------------------------------------------------------------------------+
1200| Task : Hardware reset function |
1201| |
1202+----------------------------------------------------------------------------+
1203| Input Parameters : struct comedi_device *dev |
1204| |
1205| |
1206+----------------------------------------------------------------------------+
1207| Return Value : |
1208| |
1209+----------------------------------------------------------------------------+
1210*/
1211 1353
1212int i_APCI3120_Reset(struct comedi_device *dev) 1354 /* UPDATE-0.7.57->0.7.68devpriv->AiData=s->async->data; */
1213{ 1355 devpriv->AiData = s->async->prealloc_buf;
1214 unsigned int i; 1356 /* UPDATE-0.7.57->0.7.68devpriv->ui_AiDataLength=s->async->data_len; */
1215 unsigned short us_TmpValue; 1357 devpriv->ui_AiDataLength = s->async->prealloc_bufsz;
1216 1358
1217 devpriv->b_AiCyclicAcquisition = APCI3120_DISABLE; 1359 if (cmd->stop_src == TRIG_COUNT)
1218 devpriv->b_EocEosInterrupt = APCI3120_DISABLE; 1360 devpriv->ui_AiNbrofScans = cmd->stop_arg;
1219 devpriv->b_InterruptMode = APCI3120_EOC_MODE; 1361 else
1220 devpriv->ui_EocEosConversionTime = 0; /* set eoc eos conv time to 0 */ 1362 devpriv->ui_AiNbrofScans = 0;
1221 devpriv->b_OutputMemoryStatus = 0;
1222 1363
1223 /* variables used in timer subdevice */ 1364 devpriv->ui_AiTimer0 = 0; /* variables changed to timer0,timer1 */
1224 devpriv->b_Timer2Mode = 0; 1365 devpriv->ui_AiTimer1 = 0;
1225 devpriv->b_Timer2Interrupt = 0; 1366 if ((devpriv->ui_AiNbrofScans == 0) || (devpriv->ui_AiNbrofScans == -1))
1226 devpriv->b_ExttrigEnable = 0; /* Disable ext trigger */ 1367 devpriv->b_AiContinuous = 1; /* user want neverending analog acquisition */
1368 /* stopped using cancel */
1227 1369
1228 /* Disable all interrupts, watchdog for the anolog output */ 1370 if (cmd->start_src == TRIG_EXT)
1229 devpriv->b_ModeSelectRegister = 0; 1371 devpriv->b_ExttrigEnable = APCI3120_ENABLE;
1230 outb(devpriv->b_ModeSelectRegister, 1372 else
1231 dev->iobase + APCI3120_WRITE_MODE_SELECT); 1373 devpriv->b_ExttrigEnable = APCI3120_DISABLE;
1232 1374
1233 /* Disables all counters, ext trigger and clears PA, PR */ 1375 if (cmd->scan_begin_src == TRIG_FOLLOW) {
1234 devpriv->us_OutputRegister = 0; 1376 /* mode 1 or 3 */
1235 outw(devpriv->us_OutputRegister, dev->iobase + APCI3120_WR_ADDRESS); 1377 if (cmd->convert_src == TRIG_TIMER) {
1378 /* mode 1 */
1379
1380 devpriv->ui_AiTimer0 = cmd->convert_arg; /* timer constant in nano seconds */
1381 /* return this_board->ai_cmd(1,dev,s); */
1382 return i_APCI3120_CyclicAnalogInput(1, dev, s);
1383 }
1384
1385 }
1386 if ((cmd->scan_begin_src == TRIG_TIMER)
1387 && (cmd->convert_src == TRIG_TIMER)) {
1388 /* mode 2 */
1389 devpriv->ui_AiTimer1 = cmd->scan_begin_arg;
1390 devpriv->ui_AiTimer0 = cmd->convert_arg; /* variable changed timer2 to timer0 */
1391 /* return this_board->ai_cmd(2,dev,s); */
1392 return i_APCI3120_CyclicAnalogInput(2, dev, s);
1393 }
1394 return -1;
1395}
1236 1396
1237/* 1397/*
1238 * Code to set the all anolog o/p channel to 0v 8191 is decimal 1398 * This function copies the data from DMA buffer to the Comedi buffer.
1239 * value for zero(0 v)volt in bipolar mode(default)
1240 */ 1399 */
1241 outw(8191 | APCI3120_ANALOG_OP_CHANNEL_1, dev->iobase + APCI3120_ANALOG_OUTPUT_1); /* channel 1 */ 1400static void v_APCI3120_InterruptDmaMoveBlock16bit(struct comedi_device *dev,
1242 outw(8191 | APCI3120_ANALOG_OP_CHANNEL_2, dev->iobase + APCI3120_ANALOG_OUTPUT_1); /* channel 2 */ 1401 struct comedi_subdevice *s,
1243 outw(8191 | APCI3120_ANALOG_OP_CHANNEL_3, dev->iobase + APCI3120_ANALOG_OUTPUT_1); /* channel 3 */ 1402 short *dma_buffer,
1244 outw(8191 | APCI3120_ANALOG_OP_CHANNEL_4, dev->iobase + APCI3120_ANALOG_OUTPUT_1); /* channel 4 */ 1403 unsigned int num_samples)
1404{
1405 struct addi_private *devpriv = dev->private;
1245 1406
1246 outw(8191 | APCI3120_ANALOG_OP_CHANNEL_5, dev->iobase + APCI3120_ANALOG_OUTPUT_2); /* channel 5 */ 1407 devpriv->ui_AiActualScan +=
1247 outw(8191 | APCI3120_ANALOG_OP_CHANNEL_6, dev->iobase + APCI3120_ANALOG_OUTPUT_2); /* channel 6 */ 1408 (s->async->cur_chan + num_samples) / devpriv->ui_AiScanLength;
1248 outw(8191 | APCI3120_ANALOG_OP_CHANNEL_7, dev->iobase + APCI3120_ANALOG_OUTPUT_2); /* channel 7 */ 1409 s->async->cur_chan += num_samples;
1249 outw(8191 | APCI3120_ANALOG_OP_CHANNEL_8, dev->iobase + APCI3120_ANALOG_OUTPUT_2); /* channel 8 */ 1410 s->async->cur_chan %= devpriv->ui_AiScanLength;
1250 1411
1251 /* Reset digital output to L0W */ 1412 cfc_write_array_to_buffer(s, dma_buffer, num_samples * sizeof(short));
1413}
1252 1414
1253/* ES05 outb(0x0,dev->iobase+APCI3120_DIGITAL_OUTPUT); */ 1415/*
1254 udelay(10); 1416 * This is a handler for the DMA interrupt.
1417 * This function copies the data to Comedi Buffer.
1418 * For continuous DMA it reinitializes the DMA operation.
1419 * For single mode DMA it stop the acquisition.
1420 */
1421static void v_APCI3120_InterruptDma(int irq, void *d)
1422{
1423 struct comedi_device *dev = d;
1424 struct addi_private *devpriv = dev->private;
1425 struct comedi_subdevice *s = &dev->subdevices[0];
1426 unsigned int next_dma_buf, samplesinbuf;
1427 unsigned long low_word, high_word, var;
1428 unsigned int ui_Tmp;
1255 1429
1256 inw(dev->iobase + 0); /* make a dummy read */ 1430 samplesinbuf =
1257 inb(dev->iobase + APCI3120_RESET_FIFO); /* flush FIFO */ 1431 devpriv->ui_DmaBufferUsesize[devpriv->ui_DmaActualBuffer] -
1258 inw(dev->iobase + APCI3120_RD_STATUS); /* flush A/D status register */ 1432 inl(devpriv->i_IobaseAmcc + AMCC_OP_REG_MWTC);
1259 1433
1260 /* code to reset the RAM sequence */ 1434 if (samplesinbuf <
1261 for (i = 0; i < 16; i++) { 1435 devpriv->ui_DmaBufferUsesize[devpriv->ui_DmaActualBuffer]) {
1262 us_TmpValue = i << 8; /* select the location */ 1436 comedi_error(dev, "Interrupted DMA transfer!");
1263 outw(us_TmpValue, dev->iobase + APCI3120_SEQ_RAM_ADDRESS);
1264 } 1437 }
1265 return 0; 1438 if (samplesinbuf & 1) {
1266} 1439 comedi_error(dev, "Odd count of bytes in DMA ring!");
1440 i_APCI3120_StopCyclicAcquisition(dev, s);
1441 devpriv->b_AiCyclicAcquisition = APCI3120_DISABLE;
1442
1443 return;
1444 }
1445 samplesinbuf = samplesinbuf >> 1; /* number of received samples */
1446 if (devpriv->b_DmaDoubleBuffer) {
1447 /* switch DMA buffers if is used double buffering */
1448 next_dma_buf = 1 - devpriv->ui_DmaActualBuffer;
1449
1450 ui_Tmp = AGCSTS_TC_ENABLE | AGCSTS_RESET_A2P_FIFO;
1451 outl(ui_Tmp, devpriv->i_IobaseAddon + AMCC_OP_REG_AGCSTS);
1452
1453 /* changed since 16 bit interface for add on */
1454 outw(APCI3120_ADD_ON_AGCSTS_LOW, devpriv->i_IobaseAddon + 0);
1455 outw(APCI3120_ENABLE_TRANSFER_ADD_ON_LOW,
1456 devpriv->i_IobaseAddon + 2);
1457 outw(APCI3120_ADD_ON_AGCSTS_HIGH, devpriv->i_IobaseAddon + 0);
1458 outw(APCI3120_ENABLE_TRANSFER_ADD_ON_HIGH, devpriv->i_IobaseAddon + 2); /* 0x1000 is out putted in windows driver */
1459
1460 var = devpriv->ul_DmaBufferHw[next_dma_buf];
1461 low_word = var & 0xffff;
1462 var = devpriv->ul_DmaBufferHw[next_dma_buf];
1463 high_word = var / 65536;
1464
1465 /* DMA Start Address Low */
1466 outw(APCI3120_ADD_ON_MWAR_LOW, devpriv->i_IobaseAddon + 0);
1467 outw(low_word, devpriv->i_IobaseAddon + 2);
1468
1469 /* DMA Start Address High */
1470 outw(APCI3120_ADD_ON_MWAR_HIGH, devpriv->i_IobaseAddon + 0);
1471 outw(high_word, devpriv->i_IobaseAddon + 2);
1472
1473 var = devpriv->ui_DmaBufferUsesize[next_dma_buf];
1474 low_word = var & 0xffff;
1475 var = devpriv->ui_DmaBufferUsesize[next_dma_buf];
1476 high_word = var / 65536;
1477
1478 /* Nbr of acquisition LOW */
1479 outw(APCI3120_ADD_ON_MWTC_LOW, devpriv->i_IobaseAddon + 0);
1480 outw(low_word, devpriv->i_IobaseAddon + 2);
1481
1482 /* Nbr of acquisition HIGH */
1483 outw(APCI3120_ADD_ON_MWTC_HIGH, devpriv->i_IobaseAddon + 0);
1484 outw(high_word, devpriv->i_IobaseAddon + 2);
1267 1485
1268/* 1486/*
1269+----------------------------------------------------------------------------+ 1487 * To configure A2P FIFO
1270| Function name : int i_APCI3120_SetupChannelList(struct comedi_device * dev, | 1488 * ENABLE A2P FIFO WRITE AND ENABLE AMWEN
1271| struct comedi_subdevice * s, int n_chan,unsigned int *chanlist| 1489 * AMWEN_ENABLE | A2P_FIFO_WRITE_ENABLE (0x01|0x02)=0x03
1272| ,char check) | 1490 */
1273| | 1491 outw(3, devpriv->i_IobaseAddon + 4);
1274+----------------------------------------------------------------------------+ 1492 /* initialise end of dma interrupt AINT_WRITE_COMPL = ENABLE_WRITE_TC_INT(ADDI) */
1275| Task :This function will first check channel list is ok or not| 1493 outl((APCI3120_FIFO_ADVANCE_ON_BYTE_2 |
1276|and then initialize the sequence RAM with the polarity, Gain,Channel number | 1494 APCI3120_ENABLE_WRITE_TC_INT),
1277|If the last argument of function "check"is 1 then it only checks the channel| 1495 devpriv->i_IobaseAmcc + AMCC_OP_REG_INTCSR);
1278|list is ok or not. |
1279| |
1280+----------------------------------------------------------------------------+
1281| Input Parameters : struct comedi_device * dev |
1282| struct comedi_subdevice * s |
1283| int n_chan |
1284 unsigned int *chanlist
1285 char check
1286+----------------------------------------------------------------------------+
1287| Return Value : |
1288| |
1289+----------------------------------------------------------------------------+
1290*/
1291 1496
1292int i_APCI3120_SetupChannelList(struct comedi_device *dev, struct comedi_subdevice *s, 1497 }
1293 int n_chan, unsigned int *chanlist, char check) 1498 if (samplesinbuf) {
1294{ 1499 v_APCI3120_InterruptDmaMoveBlock16bit(dev, s,
1295 unsigned int i; /* , differencial=0, bipolar=0; */ 1500 devpriv->ul_DmaBufferVirtual[devpriv->
1296 unsigned int gain; 1501 ui_DmaActualBuffer], samplesinbuf);
1297 unsigned short us_TmpValue;
1298 1502
1299 /* correct channel and range number check itself comedi/range.c */ 1503 if (!(devpriv->ui_AiFlags & TRIG_WAKE_EOS)) {
1300 if (n_chan < 1) { 1504 s->async->events |= COMEDI_CB_EOS;
1301 if (!check) 1505 comedi_event(dev, s);
1302 comedi_error(dev, "range/channel list is empty!"); 1506 }
1303 return 0;
1304 } 1507 }
1305 /* All is ok, so we can setup channel/range list */ 1508 if (!devpriv->b_AiContinuous)
1306 if (check) 1509 if (devpriv->ui_AiActualScan >= devpriv->ui_AiNbrofScans) {
1307 return 1; 1510 /* all data sampled */
1511 i_APCI3120_StopCyclicAcquisition(dev, s);
1512 devpriv->b_AiCyclicAcquisition = APCI3120_DISABLE;
1513 s->async->events |= COMEDI_CB_EOA;
1514 comedi_event(dev, s);
1515 return;
1516 }
1308 1517
1309 /* Code to set the PA and PR...Here it set PA to 0.. */ 1518 if (devpriv->b_DmaDoubleBuffer) { /* switch dma buffers */
1310 devpriv->us_OutputRegister = 1519 devpriv->ui_DmaActualBuffer = 1 - devpriv->ui_DmaActualBuffer;
1311 devpriv->us_OutputRegister & APCI3120_CLEAR_PA_PR; 1520 } else {
1312 devpriv->us_OutputRegister = ((n_chan - 1) & 0xf) << 8; 1521/*
1313 outw(devpriv->us_OutputRegister, dev->iobase + APCI3120_WR_ADDRESS); 1522 * restart DMA if is not used double buffering
1523 * ADDED REINITIALISE THE DMA
1524 */
1525 ui_Tmp = AGCSTS_TC_ENABLE | AGCSTS_RESET_A2P_FIFO;
1526 outl(ui_Tmp, devpriv->i_IobaseAddon + AMCC_OP_REG_AGCSTS);
1314 1527
1315 for (i = 0; i < n_chan; i++) { 1528 /* changed since 16 bit interface for add on */
1316 /* store range list to card */ 1529 outw(APCI3120_ADD_ON_AGCSTS_LOW, devpriv->i_IobaseAddon + 0);
1317 us_TmpValue = CR_CHAN(chanlist[i]); /* get channel number; */ 1530 outw(APCI3120_ENABLE_TRANSFER_ADD_ON_LOW,
1531 devpriv->i_IobaseAddon + 2);
1532 outw(APCI3120_ADD_ON_AGCSTS_HIGH, devpriv->i_IobaseAddon + 0);
1533 outw(APCI3120_ENABLE_TRANSFER_ADD_ON_HIGH, devpriv->i_IobaseAddon + 2); /* */
1534/*
1535 * A2P FIFO MANAGEMENT
1536 * A2P fifo reset & transfer control enable
1537 */
1538 outl(APCI3120_A2P_FIFO_MANAGEMENT,
1539 devpriv->i_IobaseAmcc + AMCC_OP_REG_MCSR);
1318 1540
1319 if (CR_RANGE(chanlist[i]) < APCI3120_BIPOLAR_RANGES) 1541 var = devpriv->ul_DmaBufferHw[0];
1320 us_TmpValue &= ((~APCI3120_UNIPOLAR) & 0xff); /* set bipolar */ 1542 low_word = var & 0xffff;
1321 else 1543 var = devpriv->ul_DmaBufferHw[0];
1322 us_TmpValue |= APCI3120_UNIPOLAR; /* enable unipolar...... */ 1544 high_word = var / 65536;
1545 outw(APCI3120_ADD_ON_MWAR_LOW, devpriv->i_IobaseAddon + 0);
1546 outw(low_word, devpriv->i_IobaseAddon + 2);
1547 outw(APCI3120_ADD_ON_MWAR_HIGH, devpriv->i_IobaseAddon + 0);
1548 outw(high_word, devpriv->i_IobaseAddon + 2);
1323 1549
1324 gain = CR_RANGE(chanlist[i]); /* get gain number */ 1550 var = devpriv->ui_DmaBufferUsesize[0];
1325 us_TmpValue |= ((gain & 0x03) << 4); /* <<4 for G0 and G1 bit in RAM */ 1551 low_word = var & 0xffff; /* changed */
1326 us_TmpValue |= i << 8; /* To select the RAM LOCATION.... */ 1552 var = devpriv->ui_DmaBufferUsesize[0];
1327 outw(us_TmpValue, dev->iobase + APCI3120_SEQ_RAM_ADDRESS); 1553 high_word = var / 65536;
1554 outw(APCI3120_ADD_ON_MWTC_LOW, devpriv->i_IobaseAddon + 0);
1555 outw(low_word, devpriv->i_IobaseAddon + 2);
1556 outw(APCI3120_ADD_ON_MWTC_HIGH, devpriv->i_IobaseAddon + 0);
1557 outw(high_word, devpriv->i_IobaseAddon + 2);
1328 1558
1329 printk("\n Gain = %i", 1559/*
1330 (((unsigned char)CR_RANGE(chanlist[i]) & 0x03) << 2)); 1560 * To configure A2P FIFO
1331 printk("\n Channel = %i", CR_CHAN(chanlist[i])); 1561 * ENABLE A2P FIFO WRITE AND ENABLE AMWEN
1332 printk("\n Polarity = %i", us_TmpValue & APCI3120_UNIPOLAR); 1562 * AMWEN_ENABLE | A2P_FIFO_WRITE_ENABLE (0x01|0x02)=0x03
1563 */
1564 outw(3, devpriv->i_IobaseAddon + 4);
1565 /* initialise end of dma interrupt AINT_WRITE_COMPL = ENABLE_WRITE_TC_INT(ADDI) */
1566 outl((APCI3120_FIFO_ADVANCE_ON_BYTE_2 |
1567 APCI3120_ENABLE_WRITE_TC_INT),
1568 devpriv->i_IobaseAmcc + AMCC_OP_REG_INTCSR);
1333 } 1569 }
1334 return 1; /* we can serve this with scan logic */
1335} 1570}
1336 1571
1337/* 1572/*
1338+----------------------------------------------------------------------------+ 1573 * This function handles EOS interrupt.
1339| Function name : int i_APCI3120_ExttrigEnable(struct comedi_device * dev) | 1574 * This function copies the acquired data(from FIFO) to Comedi buffer.
1340| | 1575 */
1341| | 1576static int i_APCI3120_InterruptHandleEos(struct comedi_device *dev)
1342+----------------------------------------------------------------------------+
1343| Task : Enable the external trigger |
1344| |
1345+----------------------------------------------------------------------------+
1346| Input Parameters : struct comedi_device * dev |
1347| |
1348| |
1349+----------------------------------------------------------------------------+
1350| Return Value : 0 |
1351| |
1352+----------------------------------------------------------------------------+
1353*/
1354
1355int i_APCI3120_ExttrigEnable(struct comedi_device *dev)
1356{ 1577{
1578 struct addi_private *devpriv = dev->private;
1579 int n_chan, i;
1580 struct comedi_subdevice *s = &dev->subdevices[0];
1581 int err = 1;
1357 1582
1358 devpriv->us_OutputRegister |= APCI3120_ENABLE_EXT_TRIGGER; 1583 n_chan = devpriv->ui_AiNbrofChannels;
1359 outw(devpriv->us_OutputRegister, dev->iobase + APCI3120_WR_ADDRESS);
1360 return 0;
1361}
1362 1584
1363/* 1585 s->async->events = 0;
1364+----------------------------------------------------------------------------+
1365| Function name : int i_APCI3120_ExttrigDisable(struct comedi_device * dev) |
1366| |
1367+----------------------------------------------------------------------------+
1368| Task : Disables the external trigger |
1369| |
1370+----------------------------------------------------------------------------+
1371| Input Parameters : struct comedi_device * dev |
1372| |
1373| |
1374+----------------------------------------------------------------------------+
1375| Return Value : 0 |
1376| |
1377+----------------------------------------------------------------------------+
1378*/
1379 1586
1380int i_APCI3120_ExttrigDisable(struct comedi_device *dev) 1587 for (i = 0; i < n_chan; i++)
1381{ 1588 err &= comedi_buf_put(s->async, inw(dev->iobase + 0));
1382 devpriv->us_OutputRegister &= ~APCI3120_ENABLE_EXT_TRIGGER;
1383 outw(devpriv->us_OutputRegister, dev->iobase + APCI3120_WR_ADDRESS);
1384 return 0;
1385}
1386 1589
1387/* 1590 s->async->events |= COMEDI_CB_EOS;
1388+----------------------------------------------------------------------------+
1389| intERRUPT FUNCTIONS |
1390+----------------------------------------------------------------------------+
1391*/
1392 1591
1393/* 1592 if (err == 0)
1394+----------------------------------------------------------------------------+ 1593 s->async->events |= COMEDI_CB_OVERFLOW;
1395| Function name : void v_APCI3120_Interrupt(int irq, void *d) | 1594
1396| | 1595 comedi_event(dev, s);
1397| | 1596
1398+----------------------------------------------------------------------------+ 1597 return 0;
1399| Task :Interrupt handler for APCI3120 | 1598}
1400| When interrupt occurs this gets called. |
1401| First it finds which interrupt has been generated and |
1402| handles corresponding interrupt |
1403| |
1404+----------------------------------------------------------------------------+
1405| Input Parameters : int irq |
1406| void *d |
1407| |
1408+----------------------------------------------------------------------------+
1409| Return Value : void |
1410| |
1411+----------------------------------------------------------------------------+
1412*/
1413 1599
1414void v_APCI3120_Interrupt(int irq, void *d) 1600static void v_APCI3120_Interrupt(int irq, void *d)
1415{ 1601{
1416 struct comedi_device *dev = d; 1602 struct comedi_device *dev = d;
1603 struct addi_private *devpriv = dev->private;
1417 unsigned short int_daq; 1604 unsigned short int_daq;
1418
1419 unsigned int int_amcc, ui_Check, i; 1605 unsigned int int_amcc, ui_Check, i;
1420 unsigned short us_TmpValue; 1606 unsigned short us_TmpValue;
1421 unsigned char b_DummyRead; 1607 unsigned char b_DummyRead;
1422
1423 struct comedi_subdevice *s = &dev->subdevices[0]; 1608 struct comedi_subdevice *s = &dev->subdevices[0];
1609
1424 ui_Check = 1; 1610 ui_Check = 1;
1425 1611
1426 int_daq = inw(dev->iobase + APCI3120_RD_STATUS) & 0xf000; /* get IRQ reasons */ 1612 int_daq = inw(dev->iobase + APCI3120_RD_STATUS) & 0xf000; /* get IRQ reasons */
@@ -1602,284 +1788,20 @@ void v_APCI3120_Interrupt(int irq, void *d)
1602} 1788}
1603 1789
1604/* 1790/*
1605+----------------------------------------------------------------------------+ 1791 * Configure Timer 2
1606| Function name :int i_APCI3120_InterruptHandleEos(struct comedi_device *dev) | 1792 *
1607| | 1793 * data[0] = TIMER configure as timer
1608| | 1794 * = WATCHDOG configure as watchdog
1609+----------------------------------------------------------------------------+ 1795 * data[1] = Timer constant
1610| Task : This function handles EOS interrupt. | 1796 * data[2] = Timer2 interrupt (1)enable or(0) disable
1611| This function copies the acquired data(from FIFO) |
1612| to Comedi buffer. |
1613| |
1614+----------------------------------------------------------------------------+
1615| Input Parameters : struct comedi_device *dev |
1616| |
1617| |
1618+----------------------------------------------------------------------------+
1619| Return Value : 0 |
1620| |
1621+----------------------------------------------------------------------------+
1622*/
1623
1624
1625int i_APCI3120_InterruptHandleEos(struct comedi_device *dev)
1626{
1627 int n_chan, i;
1628 struct comedi_subdevice *s = &dev->subdevices[0];
1629 int err = 1;
1630
1631 n_chan = devpriv->ui_AiNbrofChannels;
1632
1633 s->async->events = 0;
1634
1635 for (i = 0; i < n_chan; i++)
1636 err &= comedi_buf_put(s->async, inw(dev->iobase + 0));
1637
1638 s->async->events |= COMEDI_CB_EOS;
1639
1640 if (err == 0)
1641 s->async->events |= COMEDI_CB_OVERFLOW;
1642
1643 comedi_event(dev, s);
1644
1645 return 0;
1646}
1647
1648/*
1649+----------------------------------------------------------------------------+
1650| Function name : void v_APCI3120_InterruptDma(int irq, void *d) |
1651| |
1652+----------------------------------------------------------------------------+
1653| Task : This is a handler for the DMA interrupt |
1654| This function copies the data to Comedi Buffer. |
1655| For continuous DMA it reinitializes the DMA operation. |
1656| For single mode DMA it stop the acquisition. |
1657| |
1658+----------------------------------------------------------------------------+
1659| Input Parameters : int irq, void *d |
1660| |
1661+----------------------------------------------------------------------------+
1662| Return Value : void |
1663| |
1664+----------------------------------------------------------------------------+
1665*/
1666
1667void v_APCI3120_InterruptDma(int irq, void *d)
1668{
1669 struct comedi_device *dev = d;
1670 struct comedi_subdevice *s = &dev->subdevices[0];
1671 unsigned int next_dma_buf, samplesinbuf;
1672 unsigned long low_word, high_word, var;
1673
1674 unsigned int ui_Tmp;
1675 samplesinbuf =
1676 devpriv->ui_DmaBufferUsesize[devpriv->ui_DmaActualBuffer] -
1677 inl(devpriv->i_IobaseAmcc + AMCC_OP_REG_MWTC);
1678
1679 if (samplesinbuf <
1680 devpriv->ui_DmaBufferUsesize[devpriv->ui_DmaActualBuffer]) {
1681 comedi_error(dev, "Interrupted DMA transfer!");
1682 }
1683 if (samplesinbuf & 1) {
1684 comedi_error(dev, "Odd count of bytes in DMA ring!");
1685 i_APCI3120_StopCyclicAcquisition(dev, s);
1686 devpriv->b_AiCyclicAcquisition = APCI3120_DISABLE;
1687
1688 return;
1689 }
1690 samplesinbuf = samplesinbuf >> 1; /* number of received samples */
1691 if (devpriv->b_DmaDoubleBuffer) {
1692 /* switch DMA buffers if is used double buffering */
1693 next_dma_buf = 1 - devpriv->ui_DmaActualBuffer;
1694
1695 ui_Tmp = AGCSTS_TC_ENABLE | AGCSTS_RESET_A2P_FIFO;
1696 outl(ui_Tmp, devpriv->i_IobaseAddon + AMCC_OP_REG_AGCSTS);
1697
1698 /* changed since 16 bit interface for add on */
1699 outw(APCI3120_ADD_ON_AGCSTS_LOW, devpriv->i_IobaseAddon + 0);
1700 outw(APCI3120_ENABLE_TRANSFER_ADD_ON_LOW,
1701 devpriv->i_IobaseAddon + 2);
1702 outw(APCI3120_ADD_ON_AGCSTS_HIGH, devpriv->i_IobaseAddon + 0);
1703 outw(APCI3120_ENABLE_TRANSFER_ADD_ON_HIGH, devpriv->i_IobaseAddon + 2); /* 0x1000 is out putted in windows driver */
1704
1705 var = devpriv->ul_DmaBufferHw[next_dma_buf];
1706 low_word = var & 0xffff;
1707 var = devpriv->ul_DmaBufferHw[next_dma_buf];
1708 high_word = var / 65536;
1709
1710 /* DMA Start Address Low */
1711 outw(APCI3120_ADD_ON_MWAR_LOW, devpriv->i_IobaseAddon + 0);
1712 outw(low_word, devpriv->i_IobaseAddon + 2);
1713
1714 /* DMA Start Address High */
1715 outw(APCI3120_ADD_ON_MWAR_HIGH, devpriv->i_IobaseAddon + 0);
1716 outw(high_word, devpriv->i_IobaseAddon + 2);
1717
1718 var = devpriv->ui_DmaBufferUsesize[next_dma_buf];
1719 low_word = var & 0xffff;
1720 var = devpriv->ui_DmaBufferUsesize[next_dma_buf];
1721 high_word = var / 65536;
1722
1723 /* Nbr of acquisition LOW */
1724 outw(APCI3120_ADD_ON_MWTC_LOW, devpriv->i_IobaseAddon + 0);
1725 outw(low_word, devpriv->i_IobaseAddon + 2);
1726
1727 /* Nbr of acquisition HIGH */
1728 outw(APCI3120_ADD_ON_MWTC_HIGH, devpriv->i_IobaseAddon + 0);
1729 outw(high_word, devpriv->i_IobaseAddon + 2);
1730
1731/*
1732 * To configure A2P FIFO
1733 * ENABLE A2P FIFO WRITE AND ENABLE AMWEN
1734 * AMWEN_ENABLE | A2P_FIFO_WRITE_ENABLE (0x01|0x02)=0x03
1735 */ 1797 */
1736 outw(3, devpriv->i_IobaseAddon + 4); 1798static int i_APCI3120_InsnConfigTimer(struct comedi_device *dev,
1737 /* initialise end of dma interrupt AINT_WRITE_COMPL = ENABLE_WRITE_TC_INT(ADDI) */ 1799 struct comedi_subdevice *s,
1738 outl((APCI3120_FIFO_ADVANCE_ON_BYTE_2 | 1800 struct comedi_insn *insn,
1739 APCI3120_ENABLE_WRITE_TC_INT), 1801 unsigned int *data)
1740 devpriv->i_IobaseAmcc + AMCC_OP_REG_INTCSR);
1741
1742 }
1743 if (samplesinbuf) {
1744 v_APCI3120_InterruptDmaMoveBlock16bit(dev, s,
1745 devpriv->ul_DmaBufferVirtual[devpriv->
1746 ui_DmaActualBuffer], samplesinbuf);
1747
1748 if (!(devpriv->ui_AiFlags & TRIG_WAKE_EOS)) {
1749 s->async->events |= COMEDI_CB_EOS;
1750 comedi_event(dev, s);
1751 }
1752 }
1753 if (!devpriv->b_AiContinuous)
1754 if (devpriv->ui_AiActualScan >= devpriv->ui_AiNbrofScans) {
1755 /* all data sampled */
1756 i_APCI3120_StopCyclicAcquisition(dev, s);
1757 devpriv->b_AiCyclicAcquisition = APCI3120_DISABLE;
1758 s->async->events |= COMEDI_CB_EOA;
1759 comedi_event(dev, s);
1760 return;
1761 }
1762
1763 if (devpriv->b_DmaDoubleBuffer) { /* switch dma buffers */
1764 devpriv->ui_DmaActualBuffer = 1 - devpriv->ui_DmaActualBuffer;
1765 } else {
1766/*
1767 * restart DMA if is not used double buffering
1768 * ADDED REINITIALISE THE DMA
1769 */
1770 ui_Tmp = AGCSTS_TC_ENABLE | AGCSTS_RESET_A2P_FIFO;
1771 outl(ui_Tmp, devpriv->i_IobaseAddon + AMCC_OP_REG_AGCSTS);
1772
1773 /* changed since 16 bit interface for add on */
1774 outw(APCI3120_ADD_ON_AGCSTS_LOW, devpriv->i_IobaseAddon + 0);
1775 outw(APCI3120_ENABLE_TRANSFER_ADD_ON_LOW,
1776 devpriv->i_IobaseAddon + 2);
1777 outw(APCI3120_ADD_ON_AGCSTS_HIGH, devpriv->i_IobaseAddon + 0);
1778 outw(APCI3120_ENABLE_TRANSFER_ADD_ON_HIGH, devpriv->i_IobaseAddon + 2); /* */
1779/*
1780 * A2P FIFO MANAGEMENT
1781 * A2P fifo reset & transfer control enable
1782 */
1783 outl(APCI3120_A2P_FIFO_MANAGEMENT,
1784 devpriv->i_IobaseAmcc + AMCC_OP_REG_MCSR);
1785
1786 var = devpriv->ul_DmaBufferHw[0];
1787 low_word = var & 0xffff;
1788 var = devpriv->ul_DmaBufferHw[0];
1789 high_word = var / 65536;
1790 outw(APCI3120_ADD_ON_MWAR_LOW, devpriv->i_IobaseAddon + 0);
1791 outw(low_word, devpriv->i_IobaseAddon + 2);
1792 outw(APCI3120_ADD_ON_MWAR_HIGH, devpriv->i_IobaseAddon + 0);
1793 outw(high_word, devpriv->i_IobaseAddon + 2);
1794
1795 var = devpriv->ui_DmaBufferUsesize[0];
1796 low_word = var & 0xffff; /* changed */
1797 var = devpriv->ui_DmaBufferUsesize[0];
1798 high_word = var / 65536;
1799 outw(APCI3120_ADD_ON_MWTC_LOW, devpriv->i_IobaseAddon + 0);
1800 outw(low_word, devpriv->i_IobaseAddon + 2);
1801 outw(APCI3120_ADD_ON_MWTC_HIGH, devpriv->i_IobaseAddon + 0);
1802 outw(high_word, devpriv->i_IobaseAddon + 2);
1803
1804/*
1805 * To configure A2P FIFO
1806 * ENABLE A2P FIFO WRITE AND ENABLE AMWEN
1807 * AMWEN_ENABLE | A2P_FIFO_WRITE_ENABLE (0x01|0x02)=0x03
1808 */
1809 outw(3, devpriv->i_IobaseAddon + 4);
1810 /* initialise end of dma interrupt AINT_WRITE_COMPL = ENABLE_WRITE_TC_INT(ADDI) */
1811 outl((APCI3120_FIFO_ADVANCE_ON_BYTE_2 |
1812 APCI3120_ENABLE_WRITE_TC_INT),
1813 devpriv->i_IobaseAmcc + AMCC_OP_REG_INTCSR);
1814 }
1815}
1816
1817/*
1818+----------------------------------------------------------------------------+
1819| Function name :void v_APCI3120_InterruptDmaMoveBlock16bit(comedi_device|
1820|*dev,struct comedi_subdevice *s,short *dma,short *data,int n) |
1821| |
1822+----------------------------------------------------------------------------+
1823| Task : This function copies the data from DMA buffer to the |
1824| Comedi buffer |
1825| |
1826+----------------------------------------------------------------------------+
1827| Input Parameters : struct comedi_device *dev |
1828| struct comedi_subdevice *s |
1829| short *dma |
1830| short *data,int n |
1831+----------------------------------------------------------------------------+
1832| Return Value : void |
1833| |
1834+----------------------------------------------------------------------------+
1835*/
1836
1837void v_APCI3120_InterruptDmaMoveBlock16bit(struct comedi_device *dev,
1838 struct comedi_subdevice *s, short *dma_buffer, unsigned int num_samples)
1839{
1840 devpriv->ui_AiActualScan +=
1841 (s->async->cur_chan + num_samples) / devpriv->ui_AiScanLength;
1842 s->async->cur_chan += num_samples;
1843 s->async->cur_chan %= devpriv->ui_AiScanLength;
1844
1845 cfc_write_array_to_buffer(s, dma_buffer, num_samples * sizeof(short));
1846}
1847
1848/*
1849+----------------------------------------------------------------------------+
1850| TIMER SUBDEVICE |
1851+----------------------------------------------------------------------------+
1852*/
1853
1854/*
1855+----------------------------------------------------------------------------+
1856| Function name :int i_APCI3120_InsnConfigTimer(struct comedi_device *dev, |
1857| struct comedi_subdevice *s,struct comedi_insn *insn,unsigned int *data) |
1858| |
1859+----------------------------------------------------------------------------+
1860| Task :Configure Timer 2 |
1861| |
1862+----------------------------------------------------------------------------+
1863| Input Parameters : struct comedi_device *dev |
1864| struct comedi_subdevice *s |
1865| struct comedi_insn *insn |
1866| unsigned int *data |
1867| |
1868| data[0]= TIMER configure as timer |
1869| = WATCHDOG configure as watchdog |
1870| data[1] = Timer constant |
1871| data[2] = Timer2 interrupt (1)enable or(0) disable |
1872| |
1873+----------------------------------------------------------------------------+
1874| Return Value : |
1875| |
1876+----------------------------------------------------------------------------+
1877*/
1878
1879int i_APCI3120_InsnConfigTimer(struct comedi_device *dev, struct comedi_subdevice *s,
1880 struct comedi_insn *insn, unsigned int *data)
1881{ 1802{
1882 1803 const struct addi_board *this_board = comedi_board(dev);
1804 struct addi_private *devpriv = dev->private;
1883 unsigned int ui_Timervalue2; 1805 unsigned int ui_Timervalue2;
1884 unsigned short us_TmpValue; 1806 unsigned short us_TmpValue;
1885 unsigned char b_Tmp; 1807 unsigned char b_Tmp;
@@ -2007,37 +1929,24 @@ int i_APCI3120_InsnConfigTimer(struct comedi_device *dev, struct comedi_subdevic
2007} 1929}
2008 1930
2009/* 1931/*
2010+----------------------------------------------------------------------------+ 1932 * To start and stop the timer
2011| Function name :int i_APCI3120_InsnWriteTimer(struct comedi_device *dev, | 1933 *
2012| struct comedi_subdevice *s, struct comedi_insn *insn,unsigned int *data) | 1934 * data[0] = 1 (start)
2013| | 1935 * = 0 (stop)
2014+----------------------------------------------------------------------------+ 1936 * = 2 (write new value)
2015| Task : To start and stop the timer | 1937 * data[1] = new value
2016+----------------------------------------------------------------------------+ 1938 *
2017| Input Parameters : struct comedi_device *dev | 1939 * devpriv->b_Timer2Mode = 0 DISABLE
2018| struct comedi_subdevice *s | 1940 * = 1 Timer
2019| struct comedi_insn *insn | 1941 * = 2 Watch dog
2020| unsigned int *data | 1942 */
2021| | 1943static int i_APCI3120_InsnWriteTimer(struct comedi_device *dev,
2022| data[0] = 1 (start) | 1944 struct comedi_subdevice *s,
2023| data[0] = 0 (stop ) | 1945 struct comedi_insn *insn,
2024| data[0] = 2 (write new value) | 1946 unsigned int *data)
2025| data[1]= new value |
2026| |
2027| devpriv->b_Timer2Mode = 0 DISABLE |
2028| 1 Timer |
2029| 2 Watch dog |
2030| |
2031+----------------------------------------------------------------------------+
2032| Return Value : |
2033| |
2034+----------------------------------------------------------------------------+
2035*/
2036
2037int i_APCI3120_InsnWriteTimer(struct comedi_device *dev, struct comedi_subdevice *s,
2038 struct comedi_insn *insn, unsigned int *data)
2039{ 1947{
2040 1948 const struct addi_board *this_board = comedi_board(dev);
1949 struct addi_private *devpriv = dev->private;
2041 unsigned int ui_Timervalue2 = 0; 1950 unsigned int ui_Timervalue2 = 0;
2042 unsigned short us_TmpValue; 1951 unsigned short us_TmpValue;
2043 unsigned char b_Tmp; 1952 unsigned char b_Tmp;
@@ -2196,31 +2105,19 @@ int i_APCI3120_InsnWriteTimer(struct comedi_device *dev, struct comedi_subdevice
2196} 2105}
2197 2106
2198/* 2107/*
2199+----------------------------------------------------------------------------+ 2108 * Read the Timer value
2200| Function name : int i_APCI3120_InsnReadTimer(struct comedi_device *dev, | 2109 *
2201| struct comedi_subdevice *s,struct comedi_insn *insn, unsigned int *data) | 2110 * for Timer: data[0]= Timer constant
2202| | 2111 *
2203| | 2112 * for watchdog: data[0] = 0 (still running)
2204+----------------------------------------------------------------------------+ 2113 * = 1 (run down)
2205| Task : read the Timer value | 2114 */
2206+----------------------------------------------------------------------------+ 2115static int i_APCI3120_InsnReadTimer(struct comedi_device *dev,
2207| Input Parameters : struct comedi_device *dev | 2116 struct comedi_subdevice *s,
2208| struct comedi_subdevice *s | 2117 struct comedi_insn *insn,
2209| struct comedi_insn *insn | 2118 unsigned int *data)
2210| unsigned int *data |
2211| |
2212+----------------------------------------------------------------------------+
2213| Return Value : |
2214| for Timer: data[0]= Timer constant |
2215| |
2216| for watchdog: data[0]=0 (still running) |
2217| data[0]=1 (run down) |
2218| |
2219+----------------------------------------------------------------------------+
2220*/
2221int i_APCI3120_InsnReadTimer(struct comedi_device *dev, struct comedi_subdevice *s,
2222 struct comedi_insn *insn, unsigned int *data)
2223{ 2119{
2120 struct addi_private *devpriv = dev->private;
2224 unsigned char b_Tmp; 2121 unsigned char b_Tmp;
2225 unsigned short us_TmpValue, us_TmpValue_2, us_StatusValue; 2122 unsigned short us_TmpValue, us_TmpValue_2, us_StatusValue;
2226 2123
@@ -2265,299 +2162,52 @@ int i_APCI3120_InsnReadTimer(struct comedi_device *dev, struct comedi_subdevice
2265 return insn->n; 2162 return insn->n;
2266} 2163}
2267 2164
2268/* 2165static int apci3120_di_insn_bits(struct comedi_device *dev,
2269+----------------------------------------------------------------------------+ 2166 struct comedi_subdevice *s,
2270| DIGITAL INPUT SUBDEVICE | 2167 struct comedi_insn *insn,
2271+----------------------------------------------------------------------------+ 2168 unsigned int *data)
2272*/
2273
2274/*
2275+----------------------------------------------------------------------------+
2276| Function name :int i_APCI3120_InsnReadDigitalInput(struct comedi_device *dev, |
2277| struct comedi_subdevice *s, struct comedi_insn *insn,unsigned int *data) |
2278| |
2279| |
2280+----------------------------------------------------------------------------+
2281| Task : Reads the value of the specified Digital input channel|
2282| |
2283+----------------------------------------------------------------------------+
2284| Input Parameters : struct comedi_device *dev |
2285| struct comedi_subdevice *s |
2286| struct comedi_insn *insn |
2287| unsigned int *data |
2288+----------------------------------------------------------------------------+
2289| Return Value : |
2290| |
2291+----------------------------------------------------------------------------+
2292*/
2293
2294int i_APCI3120_InsnReadDigitalInput(struct comedi_device *dev,
2295 struct comedi_subdevice *s,
2296 struct comedi_insn *insn,
2297 unsigned int *data)
2298{
2299 unsigned int ui_Chan, ui_TmpValue;
2300
2301 ui_Chan = CR_CHAN(insn->chanspec); /* channel specified */
2302
2303 /* this_board->di_read(dev,ui_Chan,data); */
2304 if (ui_Chan <= 3) {
2305 ui_TmpValue = (unsigned int) inw(devpriv->iobase + APCI3120_RD_STATUS);
2306
2307/*
2308 * since only 1 channel reqd to bring it to last bit it is rotated 8
2309 * +(chan - 1) times then ANDed with 1 for last bit.
2310 */
2311 *data = (ui_TmpValue >> (ui_Chan + 8)) & 1;
2312 /* return 0; */
2313 } else {
2314 /* comedi_error(dev," chan spec wrong"); */
2315 return -EINVAL; /* "sorry channel spec wrong " */
2316 }
2317 return insn->n;
2318
2319}
2320
2321/*
2322+----------------------------------------------------------------------------+
2323| Function name :int i_APCI3120_InsnBitsDigitalInput(struct comedi_device *dev, |
2324|struct comedi_subdevice *s, struct comedi_insn *insn,unsigned int *data) |
2325| |
2326+----------------------------------------------------------------------------+
2327| Task : Reads the value of the Digital input Port i.e.4channels|
2328| value is returned in data[0] |
2329| |
2330+----------------------------------------------------------------------------+
2331| Input Parameters : struct comedi_device *dev |
2332| struct comedi_subdevice *s |
2333| struct comedi_insn *insn |
2334| unsigned int *data |
2335+----------------------------------------------------------------------------+
2336| Return Value : |
2337| |
2338+----------------------------------------------------------------------------+
2339*/
2340int i_APCI3120_InsnBitsDigitalInput(struct comedi_device *dev, struct comedi_subdevice *s,
2341 struct comedi_insn *insn, unsigned int *data)
2342{
2343 unsigned int ui_TmpValue;
2344 ui_TmpValue = (unsigned int) inw(devpriv->iobase + APCI3120_RD_STATUS);
2345 /***** state of 4 channels in the 11, 10, 9, 8 bits of status reg
2346 rotated right 8 times to bring them to last four bits
2347 ANDed with oxf for value.
2348 *****/
2349
2350 *data = (ui_TmpValue >> 8) & 0xf;
2351 /* this_board->di_bits(dev,data); */
2352 return insn->n;
2353}
2354
2355/*
2356+----------------------------------------------------------------------------+
2357| DIGITAL OUTPUT SUBDEVICE |
2358+----------------------------------------------------------------------------+
2359*/
2360/*
2361+----------------------------------------------------------------------------+
2362| Function name :int i_APCI3120_InsnConfigDigitalOutput(struct comedi_device |
2363| *dev,struct comedi_subdevice *s,struct comedi_insn *insn,unsigned int *data) |
2364| |
2365+----------------------------------------------------------------------------+
2366| Task :Configure the output memory ON or OFF |
2367| |
2368+----------------------------------------------------------------------------+
2369| Input Parameters :struct comedi_device *dev |
2370| struct comedi_subdevice *s |
2371| struct comedi_insn *insn |
2372| unsigned int *data |
2373+----------------------------------------------------------------------------+
2374| Return Value : |
2375| |
2376+----------------------------------------------------------------------------+
2377*/
2378
2379int i_APCI3120_InsnConfigDigitalOutput(struct comedi_device *dev,
2380 struct comedi_subdevice *s, struct comedi_insn *insn, unsigned int *data)
2381{
2382
2383 if ((data[0] != 0) && (data[0] != 1)) {
2384 comedi_error(dev,
2385 "Not a valid Data !!! ,Data should be 1 or 0\n");
2386 return -EINVAL;
2387 }
2388 if (data[0]) {
2389 devpriv->b_OutputMemoryStatus = APCI3120_ENABLE;
2390
2391 } else {
2392 devpriv->b_OutputMemoryStatus = APCI3120_DISABLE;
2393 devpriv->b_DigitalOutputRegister = 0;
2394 }
2395 if (!devpriv->b_OutputMemoryStatus)
2396 ui_Temp = 0;
2397 /* if(!devpriv->b_OutputMemoryStatus ) */
2398
2399 return insn->n;
2400}
2401
2402/*
2403+----------------------------------------------------------------------------+
2404| Function name :int i_APCI3120_InsnBitsDigitalOutput(struct comedi_device *dev, |
2405| struct comedi_subdevice *s, struct comedi_insn *insn,unsigned int *data) |
2406| |
2407+----------------------------------------------------------------------------+
2408| Task : write diatal output port |
2409| |
2410+----------------------------------------------------------------------------+
2411| Input Parameters : struct comedi_device *dev |
2412| struct comedi_subdevice *s |
2413| struct comedi_insn *insn |
2414| unsigned int *data |
2415| data[0] Value to be written
2416| data[1] :1 Set digital o/p ON
2417| data[1] 2 Set digital o/p OFF with memory ON
2418+----------------------------------------------------------------------------+
2419| Return Value : |
2420| |
2421+----------------------------------------------------------------------------+
2422*/
2423
2424int i_APCI3120_InsnBitsDigitalOutput(struct comedi_device *dev,
2425 struct comedi_subdevice *s,
2426 struct comedi_insn *insn,
2427 unsigned int *data)
2428{ 2169{
2429 if ((data[0] > devpriv->s_EeParameters.i_DoMaxdata) || (data[0] < 0)) { 2170 struct addi_private *devpriv = dev->private;
2430 2171 unsigned int val;
2431 comedi_error(dev, "Data is not valid !!! \n");
2432 return -EINVAL;
2433 }
2434 2172
2435 switch (data[1]) { 2173 /* the input channels are bits 11:8 of the status reg */
2436 case 1: 2174 val = inw(devpriv->iobase + APCI3120_RD_STATUS);
2437 data[0] = (data[0] << 4) | devpriv->b_DigitalOutputRegister; 2175 data[1] = (val >> 8) & 0xf;
2438 break;
2439
2440 case 2:
2441 data[0] = data[0];
2442 break;
2443 default:
2444 printk("\nThe parameter passed is in error \n");
2445 return -EINVAL;
2446 } /* switch(data[1]) */
2447 outb(data[0], devpriv->iobase + APCI3120_DIGITAL_OUTPUT);
2448
2449 devpriv->b_DigitalOutputRegister = data[0] & 0xF0;
2450 2176
2451 return insn->n; 2177 return insn->n;
2452
2453} 2178}
2454 2179
2455/* 2180static int apci3120_do_insn_bits(struct comedi_device *dev,
2456+----------------------------------------------------------------------------+ 2181 struct comedi_subdevice *s,
2457| Function name :int i_APCI3120_InsnWriteDigitalOutput(struct comedi_device *dev,| 2182 struct comedi_insn *insn,
2458|struct comedi_subdevice *s,struct comedi_insn *insn,unsigned int *data) | 2183 unsigned int *data)
2459| |
2460+----------------------------------------------------------------------------+
2461| Task : Write digiatl output |
2462| |
2463+----------------------------------------------------------------------------+
2464| Input Parameters : struct comedi_device *dev |
2465| struct comedi_subdevice *s |
2466| struct comedi_insn *insn |
2467| unsigned int *data |
2468 data[0] Value to be written
2469 data[1] :1 Set digital o/p ON
2470 data[1] 2 Set digital o/p OFF with memory ON
2471+----------------------------------------------------------------------------+
2472| Return Value : |
2473| |
2474+----------------------------------------------------------------------------+
2475*/
2476
2477int i_APCI3120_InsnWriteDigitalOutput(struct comedi_device *dev,
2478 struct comedi_subdevice *s,
2479 struct comedi_insn *insn,
2480 unsigned int *data)
2481{ 2184{
2482 2185 struct addi_private *devpriv = dev->private;
2483 unsigned int ui_Temp1; 2186 unsigned int mask = data[0];
2484 2187 unsigned int bits = data[1];
2485 unsigned int ui_NoOfChannel = CR_CHAN(insn->chanspec); /* get the channel */ 2188 unsigned int val;
2486 2189
2487 if ((data[0] != 0) && (data[0] != 1)) { 2190 /* The do channels are bits 7:4 of the do register */
2488 comedi_error(dev, 2191 val = devpriv->b_DigitalOutputRegister >> 4;
2489 "Not a valid Data !!! ,Data should be 1 or 0\n"); 2192 if (mask) {
2490 return -EINVAL; 2193 val &= ~mask;
2491 } 2194 val |= (bits & mask);
2492 if (ui_NoOfChannel > devpriv->s_EeParameters.i_NbrDoChannel - 1) { 2195 devpriv->b_DigitalOutputRegister = val << 4;
2493 comedi_error(dev, 2196
2494 "This board doesn't have specified channel !!! \n"); 2197 outb(val << 4, devpriv->iobase + APCI3120_DIGITAL_OUTPUT);
2495 return -EINVAL;
2496 } 2198 }
2497 2199
2498 switch (data[1]) { 2200 data[1] = val;
2499 case 1:
2500 data[0] = (data[0] << ui_NoOfChannel);
2501/* ES05 data[0]=(data[0]<<4)|ui_Temp; */
2502 data[0] = (data[0] << 4) | devpriv->b_DigitalOutputRegister;
2503 break;
2504 2201
2505 case 2:
2506 data[0] = ~data[0] & 0x1;
2507 ui_Temp1 = 1;
2508 ui_Temp1 = ui_Temp1 << ui_NoOfChannel;
2509 ui_Temp1 = ui_Temp1 << 4;
2510/* ES05 ui_Temp=ui_Temp|ui_Temp1; */
2511 devpriv->b_DigitalOutputRegister =
2512 devpriv->b_DigitalOutputRegister | ui_Temp1;
2513
2514 data[0] = (data[0] << ui_NoOfChannel) ^ 0xf;
2515 data[0] = data[0] << 4;
2516/* ES05 data[0]=data[0]& ui_Temp; */
2517 data[0] = data[0] & devpriv->b_DigitalOutputRegister;
2518 break;
2519 default:
2520 printk("\nThe parameter passed is in error \n");
2521 return -EINVAL;
2522 } /* switch(data[1]) */
2523 outb(data[0], devpriv->iobase + APCI3120_DIGITAL_OUTPUT);
2524
2525/* ES05 ui_Temp=data[0] & 0xf0; */
2526 devpriv->b_DigitalOutputRegister = data[0] & 0xf0;
2527 return insn->n; 2202 return insn->n;
2528
2529} 2203}
2530 2204
2531/* 2205static int i_APCI3120_InsnWriteAnalogOutput(struct comedi_device *dev,
2532+----------------------------------------------------------------------------+ 2206 struct comedi_subdevice *s,
2533| ANALOG OUTPUT SUBDEVICE | 2207 struct comedi_insn *insn,
2534+----------------------------------------------------------------------------+ 2208 unsigned int *data)
2535*/
2536
2537/*
2538+----------------------------------------------------------------------------+
2539| Function name :int i_APCI3120_InsnWriteAnalogOutput(struct comedi_device *dev,|
2540|struct comedi_subdevice *s, struct comedi_insn *insn,unsigned int *data) |
2541| |
2542+----------------------------------------------------------------------------+
2543| Task : Write analog output |
2544| |
2545+----------------------------------------------------------------------------+
2546| Input Parameters : struct comedi_device *dev |
2547| struct comedi_subdevice *s |
2548| struct comedi_insn *insn |
2549| unsigned int *data |
2550+----------------------------------------------------------------------------+
2551| Return Value : |
2552| |
2553+----------------------------------------------------------------------------+
2554*/
2555
2556int i_APCI3120_InsnWriteAnalogOutput(struct comedi_device *dev,
2557 struct comedi_subdevice *s,
2558 struct comedi_insn *insn,
2559 unsigned int *data)
2560{ 2209{
2210 struct addi_private *devpriv = dev->private;
2561 unsigned int ui_Range, ui_Channel; 2211 unsigned int ui_Range, ui_Channel;
2562 unsigned short us_TmpValue; 2212 unsigned short us_TmpValue;
2563 2213
diff --git a/drivers/staging/comedi/drivers/addi-data/hwdrv_apci3120.h b/drivers/staging/comedi/drivers/addi-data/hwdrv_apci3120.h
deleted file mode 100644
index 50eb0a0a0a05..000000000000
--- a/drivers/staging/comedi/drivers/addi-data/hwdrv_apci3120.h
+++ /dev/null
@@ -1,249 +0,0 @@
1
2/* hwdrv_apci3120.h */
3
4/*
5 * Copyright (C) 2004,2005 ADDI-DATA GmbH for the source code of this module.
6 *
7 * ADDI-DATA GmbH
8 * Dieselstrasse 3
9 * D-77833 Ottersweier
10 * Tel: +19(0)7223/9493-0
11 * Fax: +49(0)7223/9493-92
12 * http://www.addi-data.com
13 * info@addi-data.com
14 *
15 * This program is free software; you can redistribute it and/or modify it
16 * under the terms of the GNU General Public License as published by the Free
17 * Software Foundation; either version 2 of the License, or (at your option)
18 * any later version.
19 */
20
21/* comedi related defines */
22
23/* ANALOG INPUT RANGE */
24static const struct comedi_lrange range_apci3120_ai = { 8, {
25 BIP_RANGE(10),
26 BIP_RANGE(5),
27 BIP_RANGE(2),
28 BIP_RANGE(1),
29 UNI_RANGE(10),
30 UNI_RANGE(5),
31 UNI_RANGE(2),
32 UNI_RANGE(1)
33 }
34};
35
36/* ANALOG OUTPUT RANGE */
37static const struct comedi_lrange range_apci3120_ao = { 2, {
38 BIP_RANGE(10),
39 UNI_RANGE(10)
40 }
41};
42
43#define APCI3120_BIPOLAR_RANGES 4 /* used for test on mixture of BIP/UNI ranges */
44
45#define APCI3120_BOARD_VENDOR_ID 0x10E8
46#define APCI3120_ADDRESS_RANGE 16
47
48#define APCI3120_DISABLE 0
49#define APCI3120_ENABLE 1
50
51#define APCI3120_START 1
52#define APCI3120_STOP 0
53
54#define APCI3120_EOC_MODE 1
55#define APCI3120_EOS_MODE 2
56#define APCI3120_DMA_MODE 3
57
58/* DIGITAL INPUT-OUTPUT DEFINE */
59
60#define APCI3120_DIGITAL_OUTPUT 0x0D
61#define APCI3120_RD_STATUS 0x02
62#define APCI3120_RD_FIFO 0x00
63
64/* digital output insn_write ON /OFF selection */
65#define APCI3120_SET4DIGITALOUTPUTON 1
66#define APCI3120_SET4DIGITALOUTPUTOFF 0
67
68/* analog output SELECT BIT */
69#define APCI3120_ANALOG_OP_CHANNEL_1 0x0000
70#define APCI3120_ANALOG_OP_CHANNEL_2 0x4000
71#define APCI3120_ANALOG_OP_CHANNEL_3 0x8000
72#define APCI3120_ANALOG_OP_CHANNEL_4 0xC000
73#define APCI3120_ANALOG_OP_CHANNEL_5 0x0000
74#define APCI3120_ANALOG_OP_CHANNEL_6 0x4000
75#define APCI3120_ANALOG_OP_CHANNEL_7 0x8000
76#define APCI3120_ANALOG_OP_CHANNEL_8 0xC000
77
78/* Enable external trigger bit in nWrAddress */
79#define APCI3120_ENABLE_EXT_TRIGGER 0x8000
80
81/* ANALOG OUTPUT AND INPUT DEFINE */
82#define APCI3120_UNIPOLAR 0x80 /* $$ RAM sequence polarity BIT */
83#define APCI3120_BIPOLAR 0x00 /* $$ RAM sequence polarity BIT */
84#define APCI3120_ANALOG_OUTPUT_1 0x08 /* (ADDRESS ) */
85#define APCI3120_ANALOG_OUTPUT_2 0x0A /* (ADDRESS ) */
86#define APCI3120_1_GAIN 0x00 /* $$ RAM sequence Gain Bits for gain 1 */
87#define APCI3120_2_GAIN 0x10 /* $$ RAM sequence Gain Bits for gain 2 */
88#define APCI3120_5_GAIN 0x20 /* $$ RAM sequence Gain Bits for gain 5 */
89#define APCI3120_10_GAIN 0x30 /* $$ RAM sequence Gain Bits for gain 10 */
90#define APCI3120_SEQ_RAM_ADDRESS 0x06 /* $$ EARLIER NAMED APCI3120_FIFO_ADDRESS */
91#define APCI3120_RESET_FIFO 0x0C /* (ADDRESS) */
92#define APCI3120_TIMER_0_MODE_2 0x01 /* $$ Bits for timer mode */
93#define APCI3120_TIMER_0_MODE_4 0x2
94#define APCI3120_SELECT_TIMER_0_WORD 0x00
95#define APCI3120_ENABLE_TIMER0 0x1000 /* $$Gatebit 0 in nWrAddress */
96#define APCI3120_CLEAR_PR 0xF0FF
97#define APCI3120_CLEAR_PA 0xFFF0
98#define APCI3120_CLEAR_PA_PR (APCI3120_CLEAR_PR & APCI3120_CLEAR_PA)
99
100/* nWrMode_Select */
101#define APCI3120_ENABLE_SCAN 0x8 /* $$ bit in nWrMode_Select */
102#define APCI3120_DISABLE_SCAN (~APCI3120_ENABLE_SCAN)
103#define APCI3120_ENABLE_EOS_INT 0x2 /* $$ bit in nWrMode_Select */
104
105#define APCI3120_DISABLE_EOS_INT (~APCI3120_ENABLE_EOS_INT)
106#define APCI3120_ENABLE_EOC_INT 0x1
107#define APCI3120_DISABLE_EOC_INT (~APCI3120_ENABLE_EOC_INT)
108#define APCI3120_DISABLE_ALL_INTERRUPT_WITHOUT_TIMER (APCI3120_DISABLE_EOS_INT & APCI3120_DISABLE_EOC_INT)
109#define APCI3120_DISABLE_ALL_INTERRUPT (APCI3120_DISABLE_TIMER_INT & APCI3120_DISABLE_EOS_INT & APCI3120_DISABLE_EOC_INT)
110
111/* status register bits */
112#define APCI3120_EOC 0x8000
113#define APCI3120_EOS 0x2000
114
115/* software trigger dummy register */
116#define APCI3120_START_CONVERSION 0x02 /* (ADDRESS) */
117
118/* TIMER DEFINE */
119#define APCI3120_QUARTZ_A 70
120#define APCI3120_QUARTZ_B 50
121#define APCI3120_TIMER 1
122#define APCI3120_WATCHDOG 2
123#define APCI3120_TIMER_DISABLE 0
124#define APCI3120_TIMER_ENABLE 1
125#define APCI3120_ENABLE_TIMER2 0x4000 /* $$ gatebit 2 in nWrAddress */
126#define APCI3120_DISABLE_TIMER2 (~APCI3120_ENABLE_TIMER2)
127#define APCI3120_ENABLE_TIMER_INT 0x04 /* $$ ENAIRQ_FC_Bit in nWrModeSelect */
128#define APCI3120_DISABLE_TIMER_INT (~APCI3120_ENABLE_TIMER_INT)
129#define APCI3120_WRITE_MODE_SELECT 0x0E /* (ADDRESS) */
130#define APCI3120_SELECT_TIMER_0_WORD 0x00
131#define APCI3120_SELECT_TIMER_1_WORD 0x01
132#define APCI3120_TIMER_1_MODE_2 0x4
133
134/* $$ BIT FOR MODE IN nCsTimerCtr1 */
135#define APCI3120_TIMER_2_MODE_0 0x0
136#define APCI3120_TIMER_2_MODE_2 0x10
137#define APCI3120_TIMER_2_MODE_5 0x30
138
139/* $$ BIT FOR MODE IN nCsTimerCtr0 */
140#define APCI3120_SELECT_TIMER_2_LOW_WORD 0x02
141#define APCI3120_SELECT_TIMER_2_HIGH_WORD 0x03
142
143#define APCI3120_TIMER_CRT0 0x0D /* (ADDRESS for cCsTimerCtr0) */
144#define APCI3120_TIMER_CRT1 0x0C /* (ADDRESS for cCsTimerCtr1) */
145
146#define APCI3120_TIMER_VALUE 0x04 /* ADDRESS for nCsTimerWert */
147#define APCI3120_TIMER_STATUS_REGISTER 0x0D /* ADDRESS for delete timer 2 interrupt */
148#define APCI3120_RD_STATUS 0x02 /* ADDRESS */
149#define APCI3120_WR_ADDRESS 0x00 /* ADDRESS */
150#define APCI3120_ENABLE_WATCHDOG 0x20 /* $$BIT in nWrMode_Select */
151#define APCI3120_DISABLE_WATCHDOG (~APCI3120_ENABLE_WATCHDOG)
152#define APCI3120_ENABLE_TIMER_COUNTER 0x10 /* $$BIT in nWrMode_Select */
153#define APCI3120_DISABLE_TIMER_COUNTER (~APCI3120_ENABLE_TIMER_COUNTER)
154#define APCI3120_FC_TIMER 0x1000 /* bit in status register */
155#define APCI3120_ENABLE_TIMER0 0x1000
156#define APCI3120_ENABLE_TIMER1 0x2000
157#define APCI3120_ENABLE_TIMER2 0x4000
158#define APCI3120_DISABLE_TIMER0 (~APCI3120_ENABLE_TIMER0)
159#define APCI3120_DISABLE_TIMER1 (~APCI3120_ENABLE_TIMER1)
160#define APCI3120_DISABLE_TIMER2 (~APCI3120_ENABLE_TIMER2)
161
162#define APCI3120_TIMER2_SELECT_EOS 0xC0 /* ADDED on 20-6 */
163#define APCI3120_COUNTER 3 /* on 20-6 */
164#define APCI3120_DISABLE_ALL_TIMER (APCI3120_DISABLE_TIMER0 & APCI3120_DISABLE_TIMER1 & APCI3120_DISABLE_TIMER2) /* on 20-6 */
165
166#define MAX_ANALOGINPUT_CHANNELS 32
167
168struct str_AnalogReadInformation {
169
170 unsigned char b_Type; /* EOC or EOS */
171 unsigned char b_InterruptFlag; /* Interrupt use or not */
172 unsigned int ui_ConvertTiming; /* Selection of the conversion time */
173 unsigned char b_NbrOfChannel; /* Number of channel to read */
174 unsigned int ui_ChannelList[MAX_ANALOGINPUT_CHANNELS]; /* Number of the channel to be read */
175 unsigned int ui_RangeList[MAX_ANALOGINPUT_CHANNELS]; /* Gain of each channel */
176
177};
178
179
180/* Function Declaration For APCI-3120 */
181
182/* Internal functions */
183int i_APCI3120_SetupChannelList(struct comedi_device *dev, struct comedi_subdevice *s,
184 int n_chan, unsigned int *chanlist, char check);
185int i_APCI3120_ExttrigEnable(struct comedi_device *dev);
186int i_APCI3120_ExttrigDisable(struct comedi_device *dev);
187int i_APCI3120_StopCyclicAcquisition(struct comedi_device *dev, struct comedi_subdevice *s);
188int i_APCI3120_Reset(struct comedi_device *dev);
189int i_APCI3120_CyclicAnalogInput(int mode, struct comedi_device *dev,
190 struct comedi_subdevice *s);
191/* Interrupt functions */
192void v_APCI3120_Interrupt(int irq, void *d);
193/* UPDATE-0.7.57->0.7.68 void v_APCI3120_InterruptDmaMoveBlock16bit(struct comedi_device *dev,struct comedi_subdevice *s,short *dma,short *data,int n); */
194void v_APCI3120_InterruptDmaMoveBlock16bit(struct comedi_device *dev,
195 struct comedi_subdevice *s,
196 short *dma_buffer,
197 unsigned int num_samples);
198int i_APCI3120_InterruptHandleEos(struct comedi_device *dev);
199void v_APCI3120_InterruptDma(int irq, void *d);
200
201/* TIMER */
202
203int i_APCI3120_InsnConfigTimer(struct comedi_device *dev, struct comedi_subdevice *s,
204 struct comedi_insn *insn, unsigned int *data);
205int i_APCI3120_InsnWriteTimer(struct comedi_device *dev, struct comedi_subdevice *s,
206 struct comedi_insn *insn, unsigned int *data);
207int i_APCI3120_InsnReadTimer(struct comedi_device *dev, struct comedi_subdevice *s,
208 struct comedi_insn *insn, unsigned int *data);
209
210/*
211* DI for di read
212*/
213
214int i_APCI3120_InsnBitsDigitalInput(struct comedi_device *dev, struct comedi_subdevice *s,
215 struct comedi_insn *insn, unsigned int *data);
216int i_APCI3120_InsnReadDigitalInput(struct comedi_device *dev, struct comedi_subdevice *s,
217 struct comedi_insn *insn, unsigned int *data);
218
219/* DO */
220/* int i_APCI3120_WriteDigitalOutput(struct comedi_device *dev,
221 * unsigned char data);
222 */
223int i_APCI3120_InsnConfigDigitalOutput(struct comedi_device *dev,
224 struct comedi_subdevice *s, struct comedi_insn *insn,
225 unsigned int *data);
226int i_APCI3120_InsnBitsDigitalOutput(struct comedi_device *dev, struct comedi_subdevice *s,
227 struct comedi_insn *insn, unsigned int *data);
228int i_APCI3120_InsnWriteDigitalOutput(struct comedi_device *dev, struct comedi_subdevice *s,
229 struct comedi_insn *insn, unsigned int *data);
230
231/* AO */
232/* int i_APCI3120_Write1AnalogValue(struct comedi_device *dev,UINT ui_Range,
233 * UINT ui_Channel,UINT data );
234 */
235
236int i_APCI3120_InsnWriteAnalogOutput(struct comedi_device *dev, struct comedi_subdevice *s,
237 struct comedi_insn *insn, unsigned int *data);
238
239/* AI HArdware layer */
240
241int i_APCI3120_InsnConfigAnalogInput(struct comedi_device *dev, struct comedi_subdevice *s,
242 struct comedi_insn *insn, unsigned int *data);
243int i_APCI3120_InsnReadAnalogInput(struct comedi_device *dev, struct comedi_subdevice *s,
244 struct comedi_insn *insn, unsigned int *data);
245int i_APCI3120_CommandTestAnalogInput(struct comedi_device *dev, struct comedi_subdevice *s,
246 struct comedi_cmd *cmd);
247int i_APCI3120_CommandAnalogInput(struct comedi_device *dev, struct comedi_subdevice *s);
248/* int i_APCI3120_CancelAnalogInput(struct comedi_device *dev, struct comedi_subdevice *s); */
249int i_APCI3120_StopCyclicAcquisition(struct comedi_device *dev, struct comedi_subdevice *s);
diff --git a/drivers/staging/comedi/drivers/addi-data/hwdrv_apci3200.c b/drivers/staging/comedi/drivers/addi-data/hwdrv_apci3200.c
index 38ab49917d7e..829af187b249 100644
--- a/drivers/staging/comedi/drivers/addi-data/hwdrv_apci3200.c
+++ b/drivers/staging/comedi/drivers/addi-data/hwdrv_apci3200.c
@@ -51,15 +51,131 @@ You should also find the complete GPL in the COPYING file accompanying this sour
51 +----------+-----------+------------------------------------------------+ 51 +----------+-----------+------------------------------------------------+
52*/ 52*/
53 53
54/*
55 +----------------------------------------------------------------------------+
56 | Included files |
57 +----------------------------------------------------------------------------+
58*/
59#include "hwdrv_apci3200.h"
60
61/* #define PRINT_INFO */ 54/* #define PRINT_INFO */
62 55
56/* Card Specific information */
57/* #define APCI3200_ADDRESS_RANGE 264 */
58
59/* Analog Input related Defines */
60#define APCI3200_AI_OFFSET_GAIN 0
61#define APCI3200_AI_SC_TEST 4
62#define APCI3200_AI_IRQ 8
63#define APCI3200_AI_AUTOCAL 12
64#define APCI3200_RELOAD_CONV_TIME_VAL 32
65#define APCI3200_CONV_TIME_TIME_BASE 36
66#define APCI3200_RELOAD_DELAY_TIME_VAL 40
67#define APCI3200_DELAY_TIME_TIME_BASE 44
68#define APCI3200_AI_MODULE1 0
69#define APCI3200_AI_MODULE2 64
70#define APCI3200_AI_MODULE3 128
71#define APCI3200_AI_MODULE4 192
72#define TRUE 1
73#define FALSE 0
74#define APCI3200_AI_EOSIRQ 16
75#define APCI3200_AI_EOS 20
76#define APCI3200_AI_CHAN_ID 24
77#define APCI3200_AI_CHAN_VAL 28
78#define ANALOG_INPUT 0
79#define TEMPERATURE 1
80#define RESISTANCE 2
81
82#define ENABLE_EXT_TRIG 1
83#define ENABLE_EXT_GATE 2
84#define ENABLE_EXT_TRIG_GATE 3
85
86#define APCI3200_MAXVOLT 2.5
87#define ADDIDATA_GREATER_THAN_TEST 0
88#define ADDIDATA_LESS_THAN_TEST 1
89
90#define ADDIDATA_UNIPOLAR 1
91#define ADDIDATA_BIPOLAR 2
92
93#define MAX_MODULE 4
94
95/* ANALOG INPUT RANGE */
96static const struct comedi_lrange range_apci3200_ai = {
97 8, {
98 BIP_RANGE(10),
99 BIP_RANGE(5),
100 BIP_RANGE(2),
101 BIP_RANGE(1),
102 UNI_RANGE(10),
103 UNI_RANGE(5),
104 UNI_RANGE(2),
105 UNI_RANGE(1)
106 }
107};
108
109static const struct comedi_lrange range_apci3300_ai = {
110 4, {
111 UNI_RANGE(10),
112 UNI_RANGE(5),
113 UNI_RANGE(2),
114 UNI_RANGE(1)
115 }
116};
117
118int MODULE_NO;
119struct {
120 int i_Gain;
121 int i_Polarity;
122 int i_OffsetRange;
123 int i_Coupling;
124 int i_SingleDiff;
125 int i_AutoCalibration;
126 unsigned int ui_ReloadValue;
127 unsigned int ui_TimeUnitReloadVal;
128 int i_Interrupt;
129 int i_ModuleSelection;
130} Config_Parameters_Module1, Config_Parameters_Module2,
131 Config_Parameters_Module3, Config_Parameters_Module4;
132
133
134struct str_ADDIDATA_RTDStruct {
135 unsigned int ul_NumberOfValue;
136 unsigned int *pul_ResistanceValue;
137 unsigned int *pul_TemperatureValue;
138};
139
140struct str_Module {
141 unsigned long ul_CurrentSourceCJC;
142 unsigned long ul_CurrentSource[5];
143 unsigned long ul_GainFactor[8]; /* Gain Factor */
144 unsigned int w_GainValue[10];
145};
146
147struct str_BoardInfos {
148
149 int i_CJCAvailable;
150 int i_CJCPolarity;
151 int i_CJCGain;
152 int i_InterruptFlag;
153 int i_ADDIDATAPolarity;
154 int i_ADDIDATAGain;
155 int i_AutoCalibration;
156 int i_ADDIDATAConversionTime;
157 int i_ADDIDATAConversionTimeUnit;
158 int i_ADDIDATAType;
159 int i_ChannelNo;
160 int i_ChannelCount;
161 int i_ScanType;
162 int i_FirstChannel;
163 int i_LastChannel;
164 int i_Sum;
165 int i_Offset;
166 unsigned int ui_Channel_num;
167 int i_Count;
168 int i_Initialised;
169 unsigned int ui_InterruptChannelValue[144]; /* Buffer */
170 unsigned char b_StructInitialized;
171 /* 7 is the maximal number of channels */
172 unsigned int ui_ScanValueArray[7 + 12];
173
174 int i_ConnectionType;
175 int i_NbrOfModule;
176 struct str_Module s_Module[MAX_MODULE];
177};
178
63/* BEGIN JK 06.07.04: Management of sevrals boards */ 179/* BEGIN JK 06.07.04: Management of sevrals boards */
64/* 180/*
65 int i_CJCAvailable=1; 181 int i_CJCAvailable=1;
@@ -94,27 +210,10 @@ struct str_BoardInfos s_BoardInfos[100]; /* 100 will be the max number of board
94#define NVCMD_BEGIN_READ (0x7 << 5) /* nvRam begin read command */ 210#define NVCMD_BEGIN_READ (0x7 << 5) /* nvRam begin read command */
95#define NVCMD_BEGIN_WRITE (0x6 << 5) /* EEPROM begin write command */ 211#define NVCMD_BEGIN_WRITE (0x6 << 5) /* EEPROM begin write command */
96 212
97/*+----------------------------------------------------------------------------+*/ 213static int i_AddiHeaderRW_ReadEeprom(int i_NbOfWordsToRead,
98/*| Function Name : int i_AddiHeaderRW_ReadEeprom |*/ 214 unsigned int dw_PCIBoardEepromAddress,
99/*| (int i_NbOfWordsToRead, |*/ 215 unsigned short w_EepromStartAddress,
100/*| unsigned int dw_PCIBoardEepromAddress, |*/ 216 unsigned short *pw_DataRead)
101/*| unsigned short w_EepromStartAddress, |*/
102/*| unsigned short * pw_DataRead) |*/
103/*+----------------------------------------------------------------------------+*/
104/*| Task : Read word from the 5920 eeprom. |*/
105/*+----------------------------------------------------------------------------+*/
106/*| Input Parameters : int i_NbOfWordsToRead : Nbr. of word to read |*/
107/*| unsigned int dw_PCIBoardEepromAddress : Address of the eeprom |*/
108/*| unsigned short w_EepromStartAddress : Eeprom start address |*/
109/*+----------------------------------------------------------------------------+*/
110/*| Output Parameters : unsigned short * pw_DataRead : Read data |*/
111/*+----------------------------------------------------------------------------+*/
112/*| Return Value : - |*/
113/*+----------------------------------------------------------------------------+*/
114
115int i_AddiHeaderRW_ReadEeprom(int i_NbOfWordsToRead,
116 unsigned int dw_PCIBoardEepromAddress,
117 unsigned short w_EepromStartAddress, unsigned short *pw_DataRead)
118{ 217{
119 unsigned int dw_eeprom_busy = 0; 218 unsigned int dw_eeprom_busy = 0;
120 int i_Counter = 0; 219 int i_Counter = 0;
@@ -241,20 +340,8 @@ int i_AddiHeaderRW_ReadEeprom(int i_NbOfWordsToRead,
241 return 0; 340 return 0;
242} 341}
243 342
244/*+----------------------------------------------------------------------------+*/ 343static void v_GetAPCI3200EepromCalibrationValue(unsigned int dw_PCIBoardEepromAddress,
245/*| Function Name : void v_GetAPCI3200EepromCalibrationValue (void) |*/ 344 struct str_BoardInfos *BoardInformations)
246/*+----------------------------------------------------------------------------+*/
247/*| Task : Read calibration value from the APCI-3200 eeprom. |*/
248/*+----------------------------------------------------------------------------+*/
249/*| Input Parameters : - |*/
250/*+----------------------------------------------------------------------------+*/
251/*| Output Parameters : - |*/
252/*+----------------------------------------------------------------------------+*/
253/*| Return Value : - |*/
254/*+----------------------------------------------------------------------------+*/
255
256void v_GetAPCI3200EepromCalibrationValue(unsigned int dw_PCIBoardEepromAddress,
257 struct str_BoardInfos *BoardInformations)
258{ 345{
259 unsigned short w_AnalogInputMainHeaderAddress; 346 unsigned short w_AnalogInputMainHeaderAddress;
260 unsigned short w_AnalogInputComponentAddress; 347 unsigned short w_AnalogInputComponentAddress;
@@ -448,9 +535,11 @@ void v_GetAPCI3200EepromCalibrationValue(unsigned int dw_PCIBoardEepromAddress,
448 } 535 }
449} 536}
450 537
451int i_APCI3200_GetChannelCalibrationValue(struct comedi_device *dev, 538static int i_APCI3200_GetChannelCalibrationValue(struct comedi_device *dev,
452 unsigned int ui_Channel_num, unsigned int *CJCCurrentSource, 539 unsigned int ui_Channel_num,
453 unsigned int *ChannelCurrentSource, unsigned int *ChannelGainFactor) 540 unsigned int *CJCCurrentSource,
541 unsigned int *ChannelCurrentSource,
542 unsigned int *ChannelGainFactor)
454{ 543{
455 int i_DiffChannel = 0; 544 int i_DiffChannel = 0;
456 int i_Module = 0; 545 int i_Module = 0;
@@ -520,1135 +609,46 @@ int i_APCI3200_GetChannelCalibrationValue(struct comedi_device *dev,
520 return 0; 609 return 0;
521} 610}
522 611
523/* End JK 21.10.2004: APCI-3200 / APCI-3300 Reading of EEPROM values */ 612static int apci3200_di_insn_bits(struct comedi_device *dev,
524 613 struct comedi_subdevice *s,
525/* 614 struct comedi_insn *insn,
526 +----------------------------------------------------------------------------+ 615 unsigned int *data)
527 | Function Name : int i_APCI3200_ReadDigitalInput |
528 | (struct comedi_device *dev,struct comedi_subdevice *s, |
529 | struct comedi_insn *insn,unsigned int *data) |
530 +----------------------------------------------------------------------------+
531 | Task : Read value of the selected channel or port |
532 +----------------------------------------------------------------------------+
533 | Input Parameters : struct comedi_device *dev : Driver handle |
534 | unsigned int ui_NoOfChannels : No Of Channels To read for Port
535 Channel Numberfor single channel
536 | unsigned int data[0] : 0: Read single channel
537 1: Read port value
538 data[1] Port number
539 +----------------------------------------------------------------------------+
540 | Output Parameters : -- data[0] :Read status value
541 +----------------------------------------------------------------------------+
542 | Return Value : TRUE : No error occur |
543 | : FALSE : Error occur. Return the error |
544 | |
545 +----------------------------------------------------------------------------+
546*/
547
548int i_APCI3200_ReadDigitalInput(struct comedi_device *dev, struct comedi_subdevice *s,
549 struct comedi_insn *insn, unsigned int *data)
550{ 616{
551 unsigned int ui_Temp = 0; 617 struct addi_private *devpriv = dev->private;
552 unsigned int ui_NoOfChannel = 0;
553 ui_NoOfChannel = CR_CHAN(insn->chanspec);
554 ui_Temp = data[0];
555 *data = inl(devpriv->i_IobaseReserved);
556
557 if (ui_Temp == 0) {
558 *data = (*data >> ui_NoOfChannel) & 0x1;
559 } /* if (ui_Temp==0) */
560 else {
561 if (ui_Temp == 1) {
562 if (data[1] < 0 || data[1] > 1) {
563 printk("\nThe port number is in error\n");
564 return -EINVAL;
565 } /* if(data[1] < 0 || data[1] >1) */
566 switch (ui_NoOfChannel) {
567
568 case 2:
569 *data = (*data >> (2 * data[1])) & 0x3;
570 break;
571 case 3:
572 *data = (*data & 15);
573 break;
574 default:
575 comedi_error(dev, " chan spec wrong");
576 return -EINVAL; /* "sorry channel spec wrong " */
577
578 } /* switch(ui_NoOfChannels) */
579 } /* if (ui_Temp==1) */
580 else {
581 printk("\nSpecified channel not supported \n");
582 } /* elseif (ui_Temp==1) */
583 }
584 return insn->n;
585}
586 618
587/* 619 data[1] = inl(devpriv->i_IobaseReserved) & 0xf;
588 +----------------------------------------------------------------------------+
589 | Function Name : int i_APCI3200_ConfigDigitalOutput |
590 | (struct comedi_device *dev,struct comedi_subdevice *s, |
591 | struct comedi_insn *insn,unsigned int *data) |
592 +----------------------------------------------------------------------------+
593 | Task : Configures The Digital Output Subdevice. |
594 +----------------------------------------------------------------------------+
595 | Input Parameters : struct comedi_device *dev : Driver handle |
596 | data[0] :1 Memory enable
597 0 Memory Disable
598 +----------------------------------------------------------------------------+
599 | Output Parameters : -- |
600 +----------------------------------------------------------------------------+
601 | Return Value : TRUE : No error occur |
602 | : FALSE : Error occur. Return the error |
603 | |
604 +----------------------------------------------------------------------------+
605*/
606int i_APCI3200_ConfigDigitalOutput(struct comedi_device *dev, struct comedi_subdevice *s,
607 struct comedi_insn *insn, unsigned int *data)
608{
609 620
610 if ((data[0] != 0) && (data[0] != 1)) {
611 comedi_error(dev,
612 "Not a valid Data !!! ,Data should be 1 or 0\n");
613 return -EINVAL;
614 } /* if ( (data[0]!=0) && (data[0]!=1) ) */
615 if (data[0]) {
616 devpriv->b_OutputMemoryStatus = ADDIDATA_ENABLE;
617 } /* if (data[0]) */
618 else {
619 devpriv->b_OutputMemoryStatus = ADDIDATA_DISABLE;
620 } /* else if (data[0]) */
621 return insn->n; 621 return insn->n;
622} 622}
623 623
624/* 624static int apci3200_do_insn_bits(struct comedi_device *dev,
625 +----------------------------------------------------------------------------+ 625 struct comedi_subdevice *s,
626 | Function Name : int i_APCI3200_WriteDigitalOutput | 626 struct comedi_insn *insn,
627 | (struct comedi_device *dev,struct comedi_subdevice *s, | 627 unsigned int *data)
628 | struct comedi_insn *insn,unsigned int *data) |
629 +----------------------------------------------------------------------------+
630 | Task : writes To the digital Output Subdevice |
631 +----------------------------------------------------------------------------+
632 | Input Parameters : struct comedi_device *dev : Driver handle |
633 | struct comedi_subdevice *s : Subdevice Pointer |
634 | struct comedi_insn *insn : Insn Structure Pointer |
635 | unsigned int *data : Data Pointer contains |
636 | configuration parameters as below |
637 | data[0] :Value to output
638 data[1] : 0 o/p single channel
639 1 o/p port
640 data[2] : port no
641 data[3] :0 set the digital o/p on
642 1 set the digital o/p off
643 +----------------------------------------------------------------------------+
644 | Output Parameters : -- |
645 +----------------------------------------------------------------------------+
646 | Return Value : TRUE : No error occur |
647 | : FALSE : Error occur. Return the error |
648 | |
649 +----------------------------------------------------------------------------+
650*/
651int i_APCI3200_WriteDigitalOutput(struct comedi_device *dev, struct comedi_subdevice *s,
652 struct comedi_insn *insn, unsigned int *data)
653{ 628{
654 unsigned int ui_Temp = 0, ui_Temp1 = 0; 629 struct addi_private *devpriv = dev->private;
655 unsigned int ui_NoOfChannel = CR_CHAN(insn->chanspec); /* get the channel */ 630 unsigned int mask = data[0];
656 if (devpriv->b_OutputMemoryStatus) { 631 unsigned int bits = data[1];
657 ui_Temp = inl(devpriv->i_IobaseAddon);
658
659 } /* if(devpriv->b_OutputMemoryStatus ) */
660 else {
661 ui_Temp = 0;
662 } /* if(devpriv->b_OutputMemoryStatus ) */
663 if (data[3] == 0) {
664 if (data[1] == 0) {
665 data[0] = (data[0] << ui_NoOfChannel) | ui_Temp;
666 outl(data[0], devpriv->i_IobaseAddon);
667 } /* if(data[1]==0) */
668 else {
669 if (data[1] == 1) {
670 switch (ui_NoOfChannel) {
671
672 case 2:
673 data[0] =
674 (data[0] << (2 *
675 data[2])) | ui_Temp;
676 break;
677 case 3:
678 data[0] = (data[0] | ui_Temp);
679 break;
680 } /* switch(ui_NoOfChannels) */
681
682 outl(data[0], devpriv->i_IobaseAddon);
683 } /* if(data[1]==1) */
684 else {
685 printk("\nSpecified channel not supported\n");
686 } /* else if(data[1]==1) */
687 } /* elseif(data[1]==0) */
688 } /* if(data[3]==0) */
689 else {
690 if (data[3] == 1) {
691 if (data[1] == 0) {
692 data[0] = ~data[0] & 0x1;
693 ui_Temp1 = 1;
694 ui_Temp1 = ui_Temp1 << ui_NoOfChannel;
695 ui_Temp = ui_Temp | ui_Temp1;
696 data[0] = (data[0] << ui_NoOfChannel) ^ 0xf;
697 data[0] = data[0] & ui_Temp;
698 outl(data[0], devpriv->i_IobaseAddon);
699 } /* if(data[1]==0) */
700 else {
701 if (data[1] == 1) {
702 switch (ui_NoOfChannel) {
703
704 case 2:
705 data[0] = ~data[0] & 0x3;
706 ui_Temp1 = 3;
707 ui_Temp1 =
708 ui_Temp1 << 2 * data[2];
709 ui_Temp = ui_Temp | ui_Temp1;
710 data[0] =
711 ((data[0] << (2 *
712 data
713 [2])) ^
714 0xf) & ui_Temp;
715
716 break;
717 case 3:
718 break;
719
720 default:
721 comedi_error(dev,
722 " chan spec wrong");
723 return -EINVAL; /* "sorry channel spec wrong " */
724 } /* switch(ui_NoOfChannels) */
725
726 outl(data[0], devpriv->i_IobaseAddon);
727 } /* if(data[1]==1) */
728 else {
729 printk("\nSpecified channel not supported\n");
730 } /* else if(data[1]==1) */
731 } /* elseif(data[1]==0) */
732 } /* if(data[3]==1); */
733 else {
734 printk("\nSpecified functionality does not exist\n");
735 return -EINVAL;
736 } /* if else data[3]==1) */
737 } /* if else data[3]==0) */
738 return insn->n;
739}
740
741/*
742 +----------------------------------------------------------------------------+
743 | Function Name : int i_APCI3200_ReadDigitalOutput |
744 | (struct comedi_device *dev,struct comedi_subdevice *s, |
745 | struct comedi_insn *insn,unsigned int *data) |
746 +----------------------------------------------------------------------------+
747 | Task : Read value of the selected channel or port |
748 +----------------------------------------------------------------------------+
749 | Input Parameters : struct comedi_device *dev : Driver handle |
750 | unsigned int ui_NoOfChannels : No Of Channels To read |
751 | unsigned int *data : Data Pointer to read status |
752 data[0] :0 read single channel
753 1 read port value
754 data[1] port no
755
756 +----------------------------------------------------------------------------+
757 | Output Parameters : -- |
758 +----------------------------------------------------------------------------+
759 | Return Value : TRUE : No error occur |
760 | : FALSE : Error occur. Return the error |
761 | |
762 +----------------------------------------------------------------------------+
763*/
764int i_APCI3200_ReadDigitalOutput(struct comedi_device *dev, struct comedi_subdevice *s,
765 struct comedi_insn *insn, unsigned int *data)
766{
767 unsigned int ui_Temp;
768 unsigned int ui_NoOfChannel;
769 ui_NoOfChannel = CR_CHAN(insn->chanspec);
770 ui_Temp = data[0];
771 *data = inl(devpriv->i_IobaseAddon);
772 if (ui_Temp == 0) {
773 *data = (*data >> ui_NoOfChannel) & 0x1;
774 } /* if (ui_Temp==0) */
775 else {
776 if (ui_Temp == 1) {
777 if (data[1] < 0 || data[1] > 1) {
778 printk("\nThe port selection is in error\n");
779 return -EINVAL;
780 } /* if(data[1] <0 ||data[1] >1) */
781 switch (ui_NoOfChannel) {
782 case 2:
783 *data = (*data >> (2 * data[1])) & 3;
784 break;
785
786 case 3:
787 break;
788
789 default:
790 comedi_error(dev, " chan spec wrong");
791 return -EINVAL; /* "sorry channel spec wrong " */
792 break;
793 } /* switch(ui_NoOfChannels) */
794 } /* if (ui_Temp==1) */
795 else {
796 printk("\nSpecified channel not supported \n");
797 } /* else if (ui_Temp==1) */
798 } /* else if (ui_Temp==0) */
799 return insn->n;
800}
801
802/*
803 +----------------------------------------------------------------------------+
804 | Function Name : int i_APCI3200_ConfigAnalogInput |
805 | (struct comedi_device *dev,struct comedi_subdevice *s, |
806 | struct comedi_insn *insn,unsigned int *data) |
807 +----------------------------------------------------------------------------+
808 | Task : Configures The Analog Input Subdevice |
809 +----------------------------------------------------------------------------+
810 | Input Parameters : struct comedi_device *dev : Driver handle |
811 | struct comedi_subdevice *s : Subdevice Pointer |
812 | struct comedi_insn *insn : Insn Structure Pointer |
813 | unsigned int *data : Data Pointer contains |
814 | configuration parameters as below |
815 | |
816 | data[0]
817 | 0:Normal AI |
818 | 1:RTD |
819 | 2:THERMOCOUPLE |
820 | data[1] : Gain To Use |
821 | |
822 | data[2] : Polarity
823 | 0:Bipolar |
824 | 1:Unipolar |
825 | |
826 | data[3] : Offset Range
827 | |
828 | data[4] : Coupling
829 | 0:DC Coupling |
830 | 1:AC Coupling |
831 | |
832 | data[5] :Differential/Single
833 | 0:Single |
834 | 1:Differential |
835 | |
836 | data[6] :TimerReloadValue
837 | |
838 | data[7] :ConvertingTimeUnit
839 | |
840 | data[8] :0 Analog voltage measurement
841 1 Resistance measurement
842 2 Temperature measurement
843 | data[9] :Interrupt
844 | 0:Disable
845 | 1:Enable
846 data[10] :Type of Thermocouple
847 | data[11] : 0: single channel
848 Module Number
849 |
850 | data[12]
851 | 0:Single Read
852 | 1:Read more channel
853 2:Single scan
854 | 3:Continuous Scan
855 data[13] :Number of channels to read
856 | data[14] :RTD connection type
857 :0:RTD not used
858 1:RTD 2 wire connection
859 2:RTD 3 wire connection
860 3:RTD 4 wire connection
861 | |
862 | |
863 | |
864 +----------------------------------------------------------------------------+
865 | Output Parameters : -- |
866 +----------------------------------------------------------------------------+
867 | Return Value : TRUE : No error occur |
868 | : FALSE : Error occur. Return the error |
869 | |
870 +----------------------------------------------------------------------------+
871*/
872int i_APCI3200_ConfigAnalogInput(struct comedi_device *dev, struct comedi_subdevice *s,
873 struct comedi_insn *insn, unsigned int *data)
874{
875
876 unsigned int ul_Config = 0, ul_Temp = 0;
877 unsigned int ui_ChannelNo = 0;
878 unsigned int ui_Dummy = 0;
879 int i_err = 0;
880
881 /* Begin JK 21.10.2004: APCI-3200 / APCI-3300 Reading of EEPROM values */
882
883#ifdef PRINT_INFO
884 int i = 0, i2 = 0;
885#endif
886 /* End JK 21.10.2004: APCI-3200 / APCI-3300 Reading of EEPROM values */
887
888 /* BEGIN JK 06.07.04: Management of sevrals boards */
889 /* Initialize the structure */
890 if (s_BoardInfos[dev->minor].b_StructInitialized != 1) {
891 s_BoardInfos[dev->minor].i_CJCAvailable = 1;
892 s_BoardInfos[dev->minor].i_CJCPolarity = 0;
893 s_BoardInfos[dev->minor].i_CJCGain = 2; /* changed from 0 to 2 */
894 s_BoardInfos[dev->minor].i_InterruptFlag = 0;
895 s_BoardInfos[dev->minor].i_AutoCalibration = 0; /* : auto calibration */
896 s_BoardInfos[dev->minor].i_ChannelCount = 0;
897 s_BoardInfos[dev->minor].i_Sum = 0;
898 s_BoardInfos[dev->minor].ui_Channel_num = 0;
899 s_BoardInfos[dev->minor].i_Count = 0;
900 s_BoardInfos[dev->minor].i_Initialised = 0;
901 s_BoardInfos[dev->minor].b_StructInitialized = 1;
902
903 /* Begin JK 21.10.2004: APCI-3200 / APCI-3300 Reading of EEPROM values */
904 s_BoardInfos[dev->minor].i_ConnectionType = 0;
905 /* End JK 21.10.2004: APCI-3200 / APCI-3300 Reading of EEPROM values */
906
907 /* Begin JK 21.10.2004: APCI-3200 / APCI-3300 Reading of EEPROM values */
908 memset(s_BoardInfos[dev->minor].s_Module, 0,
909 sizeof(s_BoardInfos[dev->minor].s_Module[MAX_MODULE]));
910
911 v_GetAPCI3200EepromCalibrationValue(devpriv->i_IobaseAmcc,
912 &s_BoardInfos[dev->minor]);
913
914#ifdef PRINT_INFO
915 for (i = 0; i < MAX_MODULE; i++) {
916 printk("\n s_Module[%i].ul_CurrentSourceCJC = %lu", i,
917 s_BoardInfos[dev->minor].s_Module[i].
918 ul_CurrentSourceCJC);
919
920 for (i2 = 0; i2 < 5; i2++) {
921 printk("\n s_Module[%i].ul_CurrentSource [%i] = %lu", i, i2, s_BoardInfos[dev->minor].s_Module[i].ul_CurrentSource[i2]);
922 }
923
924 for (i2 = 0; i2 < 8; i2++) {
925 printk("\n s_Module[%i].ul_GainFactor [%i] = %lu", i, i2, s_BoardInfos[dev->minor].s_Module[i].ul_GainFactor[i2]);
926 }
927
928 for (i2 = 0; i2 < 8; i2++) {
929 printk("\n s_Module[%i].w_GainValue [%i] = %u",
930 i, i2,
931 s_BoardInfos[dev->minor].s_Module[i].
932 w_GainValue[i2]);
933 }
934 }
935#endif
936 /* End JK 21.10.2004: APCI-3200 / APCI-3300 Reading of EEPROM values */
937 }
938
939 if (data[0] != 0 && data[0] != 1 && data[0] != 2) {
940 printk("\nThe selection of acquisition type is in error\n");
941 i_err++;
942 } /* if(data[0]!=0 && data[0]!=1 && data[0]!=2) */
943 if (data[0] == 1) {
944 if (data[14] != 0 && data[14] != 1 && data[14] != 2
945 && data[14] != 4) {
946 printk("\n Error in selection of RTD connection type\n");
947 i_err++;
948 } /* if(data[14]!=0 && data[14]!=1 && data[14]!=2 && data[14]!=4) */
949 } /* if(data[0]==1 ) */
950 if (data[1] < 0 || data[1] > 7) {
951 printk("\nThe selection of gain is in error\n");
952 i_err++;
953 } /* if(data[1]<0 || data[1]>7) */
954 if (data[2] != 0 && data[2] != 1) {
955 printk("\nThe selection of polarity is in error\n");
956 i_err++;
957 } /* if(data[2]!=0 && data[2]!=1) */
958 if (data[3] != 0) {
959 printk("\nThe selection of offset range is in error\n");
960 i_err++;
961 } /* if(data[3]!=0) */
962 if (data[4] != 0 && data[4] != 1) {
963 printk("\nThe selection of coupling is in error\n");
964 i_err++;
965 } /* if(data[4]!=0 && data[4]!=1) */
966 if (data[5] != 0 && data[5] != 1) {
967 printk("\nThe selection of single/differential mode is in error\n");
968 i_err++;
969 } /* if(data[5]!=0 && data[5]!=1) */
970 if (data[8] != 0 && data[8] != 1 && data[2] != 2) {
971 printk("\nError in selection of functionality\n");
972 } /* if(data[8]!=0 && data[8]!=1 && data[2]!=2) */
973 if (data[12] == 0 || data[12] == 1) {
974 if (data[6] != 20 && data[6] != 40 && data[6] != 80
975 && data[6] != 160) {
976 printk("\nThe selection of conversion time reload value is in error\n");
977 i_err++;
978 } /* if (data[6]!=20 && data[6]!=40 && data[6]!=80 && data[6]!=160 ) */
979 if (data[7] != 2) {
980 printk("\nThe selection of conversion time unit is in error\n");
981 i_err++;
982 } /* if(data[7]!=2) */
983 }
984 if (data[9] != 0 && data[9] != 1) {
985 printk("\nThe selection of interrupt enable is in error\n");
986 i_err++;
987 } /* if(data[9]!=0 && data[9]!=1) */
988 if (data[11] < 0 || data[11] > 4) {
989 printk("\nThe selection of module is in error\n");
990 i_err++;
991 } /* if(data[11] <0 || data[11]>1) */
992 if (data[12] < 0 || data[12] > 3) {
993 printk("\nThe selection of singlechannel/scan selection is in error\n");
994 i_err++;
995 } /* if(data[12] < 0 || data[12]> 3) */
996 if (data[13] < 0 || data[13] > 16) {
997 printk("\nThe selection of number of channels is in error\n");
998 i_err++;
999 } /* if(data[13] <0 ||data[13] >15) */
1000
1001 /* BEGIN JK 06.07.04: Management of sevrals boards */
1002 /*
1003 i_ChannelCount=data[13];
1004 i_ScanType=data[12];
1005 i_ADDIDATAPolarity = data[2];
1006 i_ADDIDATAGain=data[1];
1007 i_ADDIDATAConversionTime=data[6];
1008 i_ADDIDATAConversionTimeUnit=data[7];
1009 i_ADDIDATAType=data[0];
1010 */
1011
1012 /* Save acquisition configuration for the actual board */
1013 s_BoardInfos[dev->minor].i_ChannelCount = data[13];
1014 s_BoardInfos[dev->minor].i_ScanType = data[12];
1015 s_BoardInfos[dev->minor].i_ADDIDATAPolarity = data[2];
1016 s_BoardInfos[dev->minor].i_ADDIDATAGain = data[1];
1017 s_BoardInfos[dev->minor].i_ADDIDATAConversionTime = data[6];
1018 s_BoardInfos[dev->minor].i_ADDIDATAConversionTimeUnit = data[7];
1019 s_BoardInfos[dev->minor].i_ADDIDATAType = data[0];
1020 /* Begin JK 19.10.2004: APCI-3200 Driver update 0.7.57 -> 0.7.68 */
1021 s_BoardInfos[dev->minor].i_ConnectionType = data[5];
1022 /* End JK 19.10.2004: APCI-3200 Driver update 0.7.57 -> 0.7.68 */
1023 /* END JK 06.07.04: Management of sevrals boards */
1024
1025 /* Begin JK 19.10.2004: APCI-3200 Driver update 0.7.57 -> 0.7.68 */
1026 memset(s_BoardInfos[dev->minor].ui_ScanValueArray, 0, (7 + 12) * sizeof(unsigned int)); /* 7 is the maximal number of channels */
1027 /* End JK 19.10.2004: APCI-3200 Driver update 0.7.57 -> 0.7.68 */
1028
1029 /* BEGIN JK 02.07.04 : This while can't be do, it block the process when using severals boards */
1030 /* while(i_InterruptFlag==1) */
1031 while (s_BoardInfos[dev->minor].i_InterruptFlag == 1) {
1032#ifndef MSXBOX
1033 udelay(1);
1034#else
1035 /* In the case where the driver is compiled for the MSX-Box */
1036 /* we used a printk to have a little delay because udelay */
1037 /* seems to be broken under the MSX-Box. */
1038 /* This solution hat to be studied. */
1039 printk("");
1040#endif
1041 }
1042 /* END JK 02.07.04 : This while can't be do, it block the process when using severals boards */
1043
1044 ui_ChannelNo = CR_CHAN(insn->chanspec); /* get the channel */
1045 /* BEGIN JK 06.07.04: Management of sevrals boards */
1046 /* i_ChannelNo=ui_ChannelNo; */
1047 /* ui_Channel_num =ui_ChannelNo; */
1048
1049 s_BoardInfos[dev->minor].i_ChannelNo = ui_ChannelNo;
1050 s_BoardInfos[dev->minor].ui_Channel_num = ui_ChannelNo;
1051
1052 /* END JK 06.07.04: Management of sevrals boards */
1053
1054 if (data[5] == 0) {
1055 if (ui_ChannelNo < 0 || ui_ChannelNo > 15) {
1056 printk("\nThe Selection of the channel is in error\n");
1057 i_err++;
1058 } /* if(ui_ChannelNo<0 || ui_ChannelNo>15) */
1059 } /* if(data[5]==0) */
1060 else {
1061 if (data[14] == 2) {
1062 if (ui_ChannelNo < 0 || ui_ChannelNo > 3) {
1063 printk("\nThe Selection of the channel is in error\n");
1064 i_err++;
1065 } /* if(ui_ChannelNo<0 || ui_ChannelNo>3) */
1066 } /* if(data[14]==2) */
1067 else {
1068 if (ui_ChannelNo < 0 || ui_ChannelNo > 7) {
1069 printk("\nThe Selection of the channel is in error\n");
1070 i_err++;
1071 } /* if(ui_ChannelNo<0 || ui_ChannelNo>7) */
1072 } /* elseif(data[14]==2) */
1073 } /* elseif(data[5]==0) */
1074 if (data[12] == 0 || data[12] == 1) {
1075 switch (data[5]) {
1076 case 0:
1077 if (ui_ChannelNo >= 0 && ui_ChannelNo <= 3) {
1078 /* BEGIN JK 06.07.04: Management of sevrals boards */
1079 /* i_Offset=0; */
1080 s_BoardInfos[dev->minor].i_Offset = 0;
1081 /* END JK 06.07.04: Management of sevrals boards */
1082 } /* if(ui_ChannelNo >=0 && ui_ChannelNo <=3) */
1083 if (ui_ChannelNo >= 4 && ui_ChannelNo <= 7) {
1084 /* BEGIN JK 06.07.04: Management of sevrals boards */
1085 /* i_Offset=64; */
1086 s_BoardInfos[dev->minor].i_Offset = 64;
1087 /* END JK 06.07.04: Management of sevrals boards */
1088 } /* if(ui_ChannelNo >=4 && ui_ChannelNo <=7) */
1089 if (ui_ChannelNo >= 8 && ui_ChannelNo <= 11) {
1090 /* BEGIN JK 06.07.04: Management of sevrals boards */
1091 /* i_Offset=128; */
1092 s_BoardInfos[dev->minor].i_Offset = 128;
1093 /* END JK 06.07.04: Management of sevrals boards */
1094 } /* if(ui_ChannelNo >=8 && ui_ChannelNo <=11) */
1095 if (ui_ChannelNo >= 12 && ui_ChannelNo <= 15) {
1096 /* BEGIN JK 06.07.04: Management of sevrals boards */
1097 /* i_Offset=192; */
1098 s_BoardInfos[dev->minor].i_Offset = 192;
1099 /* END JK 06.07.04: Management of sevrals boards */
1100 } /* if(ui_ChannelNo >=12 && ui_ChannelNo <=15) */
1101 break;
1102 case 1:
1103 if (data[14] == 2) {
1104 if (ui_ChannelNo == 0) {
1105 /* BEGIN JK 06.07.04: Management of sevrals boards */
1106 /* i_Offset=0; */
1107 s_BoardInfos[dev->minor].i_Offset = 0;
1108 /* END JK 06.07.04: Management of sevrals boards */
1109 } /* if(ui_ChannelNo ==0 ) */
1110 if (ui_ChannelNo == 1) {
1111 /* BEGIN JK 06.07.04: Management of sevrals boards */
1112 /* i_Offset=0; */
1113 s_BoardInfos[dev->minor].i_Offset = 64;
1114 /* END JK 06.07.04: Management of sevrals boards */
1115 } /* if(ui_ChannelNo ==1) */
1116 if (ui_ChannelNo == 2) {
1117 /* BEGIN JK 06.07.04: Management of sevrals boards */
1118 /* i_Offset=128; */
1119 s_BoardInfos[dev->minor].i_Offset = 128;
1120 /* END JK 06.07.04: Management of sevrals boards */
1121 } /* if(ui_ChannelNo ==2 ) */
1122 if (ui_ChannelNo == 3) {
1123 /* BEGIN JK 06.07.04: Management of sevrals boards */
1124 /* i_Offset=192; */
1125 s_BoardInfos[dev->minor].i_Offset = 192;
1126 /* END JK 06.07.04: Management of sevrals boards */
1127 } /* if(ui_ChannelNo ==3) */
1128
1129 /* BEGIN JK 06.07.04: Management of sevrals boards */
1130 /* i_ChannelNo=0; */
1131 s_BoardInfos[dev->minor].i_ChannelNo = 0;
1132 /* END JK 06.07.04: Management of sevrals boards */
1133 ui_ChannelNo = 0;
1134 break;
1135 } /* if(data[14]==2) */
1136 if (ui_ChannelNo >= 0 && ui_ChannelNo <= 1) {
1137 /* BEGIN JK 06.07.04: Management of sevrals boards */
1138 /* i_Offset=0; */
1139 s_BoardInfos[dev->minor].i_Offset = 0;
1140 /* END JK 06.07.04: Management of sevrals boards */
1141 } /* if(ui_ChannelNo >=0 && ui_ChannelNo <=1) */
1142 if (ui_ChannelNo >= 2 && ui_ChannelNo <= 3) {
1143 /* BEGIN JK 06.07.04: Management of sevrals boards */
1144 /* i_ChannelNo=i_ChannelNo-2; */
1145 /* i_Offset=64; */
1146 s_BoardInfos[dev->minor].i_ChannelNo =
1147 s_BoardInfos[dev->minor].i_ChannelNo -
1148 2;
1149 s_BoardInfos[dev->minor].i_Offset = 64;
1150 /* END JK 06.07.04: Management of sevrals boards */
1151 ui_ChannelNo = ui_ChannelNo - 2;
1152 } /* if(ui_ChannelNo >=2 && ui_ChannelNo <=3) */
1153 if (ui_ChannelNo >= 4 && ui_ChannelNo <= 5) {
1154 /* BEGIN JK 06.07.04: Management of sevrals boards */
1155 /* i_ChannelNo=i_ChannelNo-4; */
1156 /* i_Offset=128; */
1157 s_BoardInfos[dev->minor].i_ChannelNo =
1158 s_BoardInfos[dev->minor].i_ChannelNo -
1159 4;
1160 s_BoardInfos[dev->minor].i_Offset = 128;
1161 /* END JK 06.07.04: Management of sevrals boards */
1162 ui_ChannelNo = ui_ChannelNo - 4;
1163 } /* if(ui_ChannelNo >=4 && ui_ChannelNo <=5) */
1164 if (ui_ChannelNo >= 6 && ui_ChannelNo <= 7) {
1165 /* BEGIN JK 06.07.04: Management of sevrals boards */
1166 /* i_ChannelNo=i_ChannelNo-6; */
1167 /* i_Offset=192; */
1168 s_BoardInfos[dev->minor].i_ChannelNo =
1169 s_BoardInfos[dev->minor].i_ChannelNo -
1170 6;
1171 s_BoardInfos[dev->minor].i_Offset = 192;
1172 /* END JK 06.07.04: Management of sevrals boards */
1173 ui_ChannelNo = ui_ChannelNo - 6;
1174 } /* if(ui_ChannelNo >=6 && ui_ChannelNo <=7) */
1175 break;
1176
1177 default:
1178 printk("\n This selection of polarity does not exist\n");
1179 i_err++;
1180 } /* switch(data[2]) */
1181 } /* if(data[12]==0 || data[12]==1) */
1182 else {
1183 switch (data[11]) {
1184 case 1:
1185 /* BEGIN JK 06.07.04: Management of sevrals boards */
1186 /* i_Offset=0; */
1187 s_BoardInfos[dev->minor].i_Offset = 0;
1188 /* END JK 06.07.04: Management of sevrals boards */
1189 break;
1190 case 2:
1191 /* BEGIN JK 06.07.04: Management of sevrals boards */
1192 /* i_Offset=64; */
1193 s_BoardInfos[dev->minor].i_Offset = 64;
1194 /* END JK 06.07.04: Management of sevrals boards */
1195 break;
1196 case 3:
1197 /* BEGIN JK 06.07.04: Management of sevrals boards */
1198 /* i_Offset=128; */
1199 s_BoardInfos[dev->minor].i_Offset = 128;
1200 /* END JK 06.07.04: Management of sevrals boards */
1201 break;
1202 case 4:
1203 /* BEGIN JK 06.07.04: Management of sevrals boards */
1204 /* i_Offset=192; */
1205 s_BoardInfos[dev->minor].i_Offset = 192;
1206 /* END JK 06.07.04: Management of sevrals boards */
1207 break;
1208 default:
1209 printk("\nError in module selection\n");
1210 i_err++;
1211 } /* switch(data[11]) */
1212 } /* elseif(data[12]==0 || data[12]==1) */
1213 if (i_err) {
1214 i_APCI3200_Reset(dev);
1215 return -EINVAL;
1216 }
1217 /* if(i_ScanType!=1) */
1218 if (s_BoardInfos[dev->minor].i_ScanType != 1) {
1219 /* BEGIN JK 06.07.04: Management of sevrals boards */
1220 /* i_Count=0; */
1221 /* i_Sum=0; */
1222 s_BoardInfos[dev->minor].i_Count = 0;
1223 s_BoardInfos[dev->minor].i_Sum = 0;
1224 /* END JK 06.07.04: Management of sevrals boards */
1225 } /* if(i_ScanType!=1) */
1226
1227 ul_Config =
1228 data[1] | (data[2] << 6) | (data[5] << 7) | (data[3] << 8) |
1229 (data[4] << 9);
1230 /* BEGIN JK 06.07.04: Management of sevrals boards */
1231 /* while (((inl(devpriv->iobase+i_Offset+12)>>19) & 1) != 1); */
1232 while (((inl(devpriv->iobase + s_BoardInfos[dev->minor].i_Offset +
1233 12) >> 19) & 1) != 1) ;
1234 /* END JK 06.07.04: Management of sevrals boards */
1235 /*********************************/
1236 /* Write the channel to configure */
1237 /*********************************/
1238 /* BEGIN JK 06.07.04: Management of sevrals boards */
1239 /* outl(0 | ui_ChannelNo , devpriv->iobase+i_Offset + 0x4); */
1240 outl(0 | ui_ChannelNo,
1241 devpriv->iobase + s_BoardInfos[dev->minor].i_Offset + 0x4);
1242 /* END JK 06.07.04: Management of sevrals boards */
1243
1244 /* BEGIN JK 06.07.04: Management of sevrals boards */
1245 /* while (((inl(devpriv->iobase+i_Offset+12)>>19) & 1) != 1); */
1246 while (((inl(devpriv->iobase + s_BoardInfos[dev->minor].i_Offset +
1247 12) >> 19) & 1) != 1) ;
1248 /* END JK 06.07.04: Management of sevrals boards */
1249 /**************************/
1250 /* Reset the configuration */
1251 /**************************/
1252 /* BEGIN JK 06.07.04: Management of sevrals boards */
1253 /* outl(0 , devpriv->iobase+i_Offset + 0x0); */
1254 outl(0, devpriv->iobase + s_BoardInfos[dev->minor].i_Offset + 0x0);
1255 /* END JK 06.07.04: Management of sevrals boards */
1256
1257 /* BEGIN JK 06.07.04: Management of sevrals boards */
1258 /* while (((inl(devpriv->iobase+i_Offset+12)>>19) & 1) != 1); */
1259 while (((inl(devpriv->iobase + s_BoardInfos[dev->minor].i_Offset +
1260 12) >> 19) & 1) != 1) ;
1261 /* END JK 06.07.04: Management of sevrals boards */
1262
1263 /***************************/
1264 /* Write the configuration */
1265 /***************************/
1266 /* BEGIN JK 06.07.04: Management of sevrals boards */
1267 /* outl(ul_Config , devpriv->iobase+i_Offset + 0x0); */
1268 outl(ul_Config,
1269 devpriv->iobase + s_BoardInfos[dev->minor].i_Offset + 0x0);
1270 /* END JK 06.07.04: Management of sevrals boards */
1271
1272 /***************************/
1273 /*Reset the calibration bit */
1274 /***************************/
1275 /* BEGIN JK 06.07.04: Management of sevrals boards */
1276 /* ul_Temp = inl(devpriv->iobase+i_Offset + 12); */
1277 ul_Temp = inl(devpriv->iobase + s_BoardInfos[dev->minor].i_Offset + 12);
1278 /* END JK 06.07.04: Management of sevrals boards */
1279
1280 /* BEGIN JK 06.07.04: Management of sevrals boards */
1281 /* while (((inl(devpriv->iobase+i_Offset+12)>>19) & 1) != 1); */
1282 while (((inl(devpriv->iobase + s_BoardInfos[dev->minor].i_Offset +
1283 12) >> 19) & 1) != 1) ;
1284 /* END JK 06.07.04: Management of sevrals boards */
1285
1286 /* BEGIN JK 06.07.04: Management of sevrals boards */
1287 /* outl((ul_Temp & 0xFFF9FFFF) , devpriv->iobase+.i_Offset + 12); */
1288 outl((ul_Temp & 0xFFF9FFFF),
1289 devpriv->iobase + s_BoardInfos[dev->minor].i_Offset + 12);
1290 /* END JK 06.07.04: Management of sevrals boards */
1291 632
1292 if (data[9] == 1) { 633 s->state = inl(devpriv->i_IobaseAddon) & 0xf;
1293 devpriv->tsk_Current = current; 634 if (mask) {
1294 /* BEGIN JK 06.07.04: Management of sevrals boards */ 635 s->state &= ~mask;
1295 /* i_InterruptFlag=1; */ 636 s->state |= (bits & mask)
1296 s_BoardInfos[dev->minor].i_InterruptFlag = 1;
1297 /* END JK 06.07.04: Management of sevrals boards */
1298 } /* if(data[9]==1) */
1299 else {
1300 /* BEGIN JK 06.07.04: Management of sevrals boards */
1301 /* i_InterruptFlag=0; */
1302 s_BoardInfos[dev->minor].i_InterruptFlag = 0;
1303 /* END JK 06.07.04: Management of sevrals boards */
1304 } /* else if(data[9]==1) */
1305
1306 /* BEGIN JK 06.07.04: Management of sevrals boards */
1307 /* i_Initialised=1; */
1308 s_BoardInfos[dev->minor].i_Initialised = 1;
1309 /* END JK 06.07.04: Management of sevrals boards */
1310 637
1311 /* BEGIN JK 06.07.04: Management of sevrals boards */ 638 outl(s->state, devpriv->i_IobaseAddon);
1312 /* if(i_ScanType==1) */
1313 if (s_BoardInfos[dev->minor].i_ScanType == 1)
1314 /* END JK 06.07.04: Management of sevrals boards */
1315 {
1316 /* BEGIN JK 06.07.04: Management of sevrals boards */
1317 /* i_Sum=i_Sum+1; */
1318 s_BoardInfos[dev->minor].i_Sum =
1319 s_BoardInfos[dev->minor].i_Sum + 1;
1320 /* END JK 06.07.04: Management of sevrals boards */
1321
1322 insn->unused[0] = 0;
1323 i_APCI3200_ReadAnalogInput(dev, s, insn, &ui_Dummy);
1324 } 639 }
1325 640
1326 return insn->n; 641 data[1] = s->state;
1327}
1328
1329/*
1330 +----------------------------------------------------------------------------+
1331 | Function Name : int i_APCI3200_ReadAnalogInput |
1332 | (struct comedi_device *dev,struct comedi_subdevice *s, |
1333 | struct comedi_insn *insn,unsigned int *data) |
1334 +----------------------------------------------------------------------------+
1335 | Task : Read value of the selected channel |
1336 +----------------------------------------------------------------------------+
1337 | Input Parameters : struct comedi_device *dev : Driver handle |
1338 | unsigned int ui_NoOfChannels : No Of Channels To read |
1339 | unsigned int *data : Data Pointer to read status |
1340 +----------------------------------------------------------------------------+
1341 | Output Parameters : -- |
1342 | data[0] : Digital Value Of Input |
1343 | data[1] : Calibration Offset Value |
1344 | data[2] : Calibration Gain Value
1345 | data[3] : CJC value
1346 | data[4] : CJC offset value
1347 | data[5] : CJC gain value
1348 | Begin JK 21.10.2004: APCI-3200 / APCI-3300 Reading of EEPROM values
1349 | data[6] : CJC current source from eeprom
1350 | data[7] : Channel current source from eeprom
1351 | data[8] : Channle gain factor from eeprom
1352 | End JK 21.10.2004: APCI-3200 / APCI-3300 Reading of EEPROM values
1353 +----------------------------------------------------------------------------+
1354 | Return Value : TRUE : No error occur |
1355 | : FALSE : Error occur. Return the error |
1356 | |
1357 +----------------------------------------------------------------------------+
1358*/
1359int i_APCI3200_ReadAnalogInput(struct comedi_device *dev, struct comedi_subdevice *s,
1360 struct comedi_insn *insn, unsigned int *data)
1361{
1362 unsigned int ui_DummyValue = 0;
1363 int i_ConvertCJCCalibration;
1364 int i = 0;
1365
1366 /* BEGIN JK 06.07.04: Management of sevrals boards */
1367 /* if(i_Initialised==0) */
1368 if (s_BoardInfos[dev->minor].i_Initialised == 0)
1369 /* END JK 06.07.04: Management of sevrals boards */
1370 {
1371 i_APCI3200_Reset(dev);
1372 return -EINVAL;
1373 } /* if(i_Initialised==0); */
1374
1375#ifdef PRINT_INFO
1376 printk("\n insn->unused[0] = %i", insn->unused[0]);
1377#endif
1378
1379 switch (insn->unused[0]) {
1380 case 0:
1381
1382 i_APCI3200_Read1AnalogInputChannel(dev, s, insn,
1383 &ui_DummyValue);
1384 /* BEGIN JK 06.07.04: Management of sevrals boards */
1385 /* ui_InterruptChannelValue[i_Count+0]=ui_DummyValue; */
1386 s_BoardInfos[dev->minor].
1387 ui_InterruptChannelValue[s_BoardInfos[dev->minor].
1388 i_Count + 0] = ui_DummyValue;
1389 /* END JK 06.07.04: Management of sevrals boards */
1390
1391 /* Begin JK 25.10.2004: APCI-3200 / APCI-3300 Reading of EEPROM values */
1392 i_APCI3200_GetChannelCalibrationValue(dev,
1393 s_BoardInfos[dev->minor].ui_Channel_num,
1394 &s_BoardInfos[dev->minor].
1395 ui_InterruptChannelValue[s_BoardInfos[dev->minor].
1396 i_Count + 6],
1397 &s_BoardInfos[dev->minor].
1398 ui_InterruptChannelValue[s_BoardInfos[dev->minor].
1399 i_Count + 7],
1400 &s_BoardInfos[dev->minor].
1401 ui_InterruptChannelValue[s_BoardInfos[dev->minor].
1402 i_Count + 8]);
1403
1404#ifdef PRINT_INFO
1405 printk("\n s_BoardInfos [dev->minor].ui_InterruptChannelValue[s_BoardInfos [dev->minor].i_Count+6] = %lu", s_BoardInfos[dev->minor].ui_InterruptChannelValue[s_BoardInfos[dev->minor].i_Count + 6]);
1406
1407 printk("\n s_BoardInfos [dev->minor].ui_InterruptChannelValue[s_BoardInfos [dev->minor].i_Count+7] = %lu", s_BoardInfos[dev->minor].ui_InterruptChannelValue[s_BoardInfos[dev->minor].i_Count + 7]);
1408
1409 printk("\n s_BoardInfos [dev->minor].ui_InterruptChannelValue[s_BoardInfos [dev->minor].i_Count+8] = %lu", s_BoardInfos[dev->minor].ui_InterruptChannelValue[s_BoardInfos[dev->minor].i_Count + 8]);
1410#endif
1411
1412 /* End JK 25.10.2004: APCI-3200 / APCI-3300 Reading of EEPROM values */
1413
1414 /* BEGIN JK 06.07.04: Management of sevrals boards */
1415 /* if((i_ADDIDATAType==2) && (i_InterruptFlag == FALSE) && (i_CJCAvailable==1)) */
1416 if ((s_BoardInfos[dev->minor].i_ADDIDATAType == 2)
1417 && (s_BoardInfos[dev->minor].i_InterruptFlag == FALSE)
1418 && (s_BoardInfos[dev->minor].i_CJCAvailable == 1))
1419 /* END JK 06.07.04: Management of sevrals boards */
1420 {
1421 i_APCI3200_ReadCJCValue(dev, &ui_DummyValue);
1422 /* BEGIN JK 06.07.04: Management of sevrals boards */
1423 /* ui_InterruptChannelValue[i_Count + 3]=ui_DummyValue; */
1424 s_BoardInfos[dev->minor].
1425 ui_InterruptChannelValue[s_BoardInfos[dev->
1426 minor].i_Count + 3] = ui_DummyValue;
1427 /* END JK 06.07.04: Management of sevrals boards */
1428 } /* if((i_ADDIDATAType==2) && (i_InterruptFlag == FALSE)) */
1429 else {
1430 /* BEGIN JK 06.07.04: Management of sevrals boards */
1431 /* ui_InterruptChannelValue[i_Count + 3]=0; */
1432 s_BoardInfos[dev->minor].
1433 ui_InterruptChannelValue[s_BoardInfos[dev->
1434 minor].i_Count + 3] = 0;
1435 /* END JK 06.07.04: Management of sevrals boards */
1436 } /* elseif((i_ADDIDATAType==2) && (i_InterruptFlag == FALSE) && (i_CJCAvailable==1)) */
1437
1438 /* BEGIN JK 06.07.04: Management of sevrals boards */
1439 /* if (( i_AutoCalibration == FALSE) && (i_InterruptFlag == FALSE)) */
1440 if ((s_BoardInfos[dev->minor].i_AutoCalibration == FALSE)
1441 && (s_BoardInfos[dev->minor].i_InterruptFlag == FALSE))
1442 /* END JK 06.07.04: Management of sevrals boards */
1443 {
1444 i_APCI3200_ReadCalibrationOffsetValue(dev,
1445 &ui_DummyValue);
1446 /* BEGIN JK 06.07.04: Management of sevrals boards */
1447 /* ui_InterruptChannelValue[i_Count + 1]=ui_DummyValue; */
1448 s_BoardInfos[dev->minor].
1449 ui_InterruptChannelValue[s_BoardInfos[dev->
1450 minor].i_Count + 1] = ui_DummyValue;
1451 /* END JK 06.07.04: Management of sevrals boards */
1452 i_APCI3200_ReadCalibrationGainValue(dev,
1453 &ui_DummyValue);
1454 /* BEGIN JK 06.07.04: Management of sevrals boards */
1455 /* ui_InterruptChannelValue[i_Count + 2]=ui_DummyValue; */
1456 s_BoardInfos[dev->minor].
1457 ui_InterruptChannelValue[s_BoardInfos[dev->
1458 minor].i_Count + 2] = ui_DummyValue;
1459 /* END JK 06.07.04: Management of sevrals boards */
1460 } /* if (( i_AutoCalibration == FALSE) && (i_InterruptFlag == FALSE)) */
1461
1462 /* BEGIN JK 06.07.04: Management of sevrals boards */
1463 /* if((i_ADDIDATAType==2) && (i_InterruptFlag == FALSE)&& (i_CJCAvailable==1)) */
1464 if ((s_BoardInfos[dev->minor].i_ADDIDATAType == 2)
1465 && (s_BoardInfos[dev->minor].i_InterruptFlag == FALSE)
1466 && (s_BoardInfos[dev->minor].i_CJCAvailable == 1))
1467 /* END JK 06.07.04: Management of sevrals boards */
1468 {
1469 /**********************************************************/
1470 /*Test if the Calibration channel must be read for the CJC */
1471 /**********************************************************/
1472 /**********************************/
1473 /*Test if the polarity is the same */
1474 /**********************************/
1475 /* BEGIN JK 06.07.04: Management of sevrals boards */
1476 /* if(i_CJCPolarity!=i_ADDIDATAPolarity) */
1477 if (s_BoardInfos[dev->minor].i_CJCPolarity !=
1478 s_BoardInfos[dev->minor].i_ADDIDATAPolarity)
1479 /* END JK 06.07.04: Management of sevrals boards */
1480 {
1481 i_ConvertCJCCalibration = 1;
1482 } /* if(i_CJCPolarity!=i_ADDIDATAPolarity) */
1483 else {
1484 /* BEGIN JK 06.07.04: Management of sevrals boards */
1485 /* if(i_CJCGain==i_ADDIDATAGain) */
1486 if (s_BoardInfos[dev->minor].i_CJCGain ==
1487 s_BoardInfos[dev->minor].i_ADDIDATAGain)
1488 /* END JK 06.07.04: Management of sevrals boards */
1489 {
1490 i_ConvertCJCCalibration = 0;
1491 } /* if(i_CJCGain==i_ADDIDATAGain) */
1492 else {
1493 i_ConvertCJCCalibration = 1;
1494 } /* elseif(i_CJCGain==i_ADDIDATAGain) */
1495 } /* elseif(i_CJCPolarity!=i_ADDIDATAPolarity) */
1496 if (i_ConvertCJCCalibration == 1) {
1497 i_APCI3200_ReadCJCCalOffset(dev,
1498 &ui_DummyValue);
1499 /* BEGIN JK 06.07.04: Management of sevrals boards */
1500 /* ui_InterruptChannelValue[i_Count+4]=ui_DummyValue; */
1501 s_BoardInfos[dev->minor].
1502 ui_InterruptChannelValue[s_BoardInfos
1503 [dev->minor].i_Count + 4] =
1504 ui_DummyValue;
1505 /* END JK 06.07.04: Management of sevrals boards */
1506
1507 i_APCI3200_ReadCJCCalGain(dev, &ui_DummyValue);
1508
1509 /* BEGIN JK 06.07.04: Management of sevrals boards */
1510 /* ui_InterruptChannelValue[i_Count+5]=ui_DummyValue; */
1511 s_BoardInfos[dev->minor].
1512 ui_InterruptChannelValue[s_BoardInfos
1513 [dev->minor].i_Count + 5] =
1514 ui_DummyValue;
1515 /* END JK 06.07.04: Management of sevrals boards */
1516 } /* if(i_ConvertCJCCalibration==1) */
1517 else {
1518 /* BEGIN JK 06.07.04: Management of sevrals boards */
1519 /* ui_InterruptChannelValue[i_Count+4]=0; */
1520 /* ui_InterruptChannelValue[i_Count+5]=0; */
1521
1522 s_BoardInfos[dev->minor].
1523 ui_InterruptChannelValue[s_BoardInfos
1524 [dev->minor].i_Count + 4] = 0;
1525 s_BoardInfos[dev->minor].
1526 ui_InterruptChannelValue[s_BoardInfos
1527 [dev->minor].i_Count + 5] = 0;
1528 /* END JK 06.07.04: Management of sevrals boards */
1529 } /* elseif(i_ConvertCJCCalibration==1) */
1530 } /* if((i_ADDIDATAType==2) && (i_InterruptFlag == FALSE)) */
1531
1532 /* BEGIN JK 06.07.04: Management of sevrals boards */
1533 /* if(i_ScanType!=1) */
1534 if (s_BoardInfos[dev->minor].i_ScanType != 1) {
1535 /* i_Count=0; */
1536 s_BoardInfos[dev->minor].i_Count = 0;
1537 } /* if(i_ScanType!=1) */
1538 else {
1539 /* i_Count=i_Count +6; */
1540 /* Begin JK 22.10.2004: APCI-3200 / APCI-3300 Reading of EEPROM values */
1541 /* s_BoardInfos [dev->minor].i_Count=s_BoardInfos [dev->minor].i_Count +6; */
1542 s_BoardInfos[dev->minor].i_Count =
1543 s_BoardInfos[dev->minor].i_Count + 9;
1544 /* End JK 22.10.2004: APCI-3200 / APCI-3300 Reading of EEPROM values */
1545 } /* else if(i_ScanType!=1) */
1546
1547 /* if((i_ScanType==1) &&(i_InterruptFlag==1)) */
1548 if ((s_BoardInfos[dev->minor].i_ScanType == 1)
1549 && (s_BoardInfos[dev->minor].i_InterruptFlag == 1)) {
1550 /* i_Count=i_Count-6; */
1551 /* Begin JK 22.10.2004: APCI-3200 / APCI-3300 Reading of EEPROM values */
1552 /* s_BoardInfos [dev->minor].i_Count=s_BoardInfos [dev->minor].i_Count-6; */
1553 s_BoardInfos[dev->minor].i_Count =
1554 s_BoardInfos[dev->minor].i_Count - 9;
1555 /* End JK 22.10.2004: APCI-3200 / APCI-3300 Reading of EEPROM values */
1556 }
1557 /* if(i_ScanType==0) */
1558 if (s_BoardInfos[dev->minor].i_ScanType == 0) {
1559 /*
1560 data[0]= ui_InterruptChannelValue[0];
1561 data[1]= ui_InterruptChannelValue[1];
1562 data[2]= ui_InterruptChannelValue[2];
1563 data[3]= ui_InterruptChannelValue[3];
1564 data[4]= ui_InterruptChannelValue[4];
1565 data[5]= ui_InterruptChannelValue[5];
1566 */
1567#ifdef PRINT_INFO
1568 printk("\n data[0]= s_BoardInfos [dev->minor].ui_InterruptChannelValue[0];");
1569#endif
1570 data[0] =
1571 s_BoardInfos[dev->minor].
1572 ui_InterruptChannelValue[0];
1573 data[1] =
1574 s_BoardInfos[dev->minor].
1575 ui_InterruptChannelValue[1];
1576 data[2] =
1577 s_BoardInfos[dev->minor].
1578 ui_InterruptChannelValue[2];
1579 data[3] =
1580 s_BoardInfos[dev->minor].
1581 ui_InterruptChannelValue[3];
1582 data[4] =
1583 s_BoardInfos[dev->minor].
1584 ui_InterruptChannelValue[4];
1585 data[5] =
1586 s_BoardInfos[dev->minor].
1587 ui_InterruptChannelValue[5];
1588
1589 /* Begin JK 22.10.2004: APCI-3200 / APCI-3300 Reading of EEPROM values */
1590 /* printk("\n 0 - i_APCI3200_GetChannelCalibrationValue data [6] = %lu, data [7] = %lu, data [8] = %lu", data [6], data [7], data [8]); */
1591 i_APCI3200_GetChannelCalibrationValue(dev,
1592 s_BoardInfos[dev->minor].ui_Channel_num,
1593 &data[6], &data[7], &data[8]);
1594 /* End JK 22.10.2004: APCI-3200 / APCI-3300 Reading of EEPROM values */
1595 }
1596 break;
1597 case 1:
1598
1599 for (i = 0; i < insn->n; i++) {
1600 /* data[i]=ui_InterruptChannelValue[i]; */
1601 data[i] =
1602 s_BoardInfos[dev->minor].
1603 ui_InterruptChannelValue[i];
1604 }
1605
1606 /* i_Count=0; */
1607 /* i_Sum=0; */
1608 /* if(i_ScanType==1) */
1609 s_BoardInfos[dev->minor].i_Count = 0;
1610 s_BoardInfos[dev->minor].i_Sum = 0;
1611 if (s_BoardInfos[dev->minor].i_ScanType == 1) {
1612 /* i_Initialised=0; */
1613 /* i_InterruptFlag=0; */
1614 s_BoardInfos[dev->minor].i_Initialised = 0;
1615 s_BoardInfos[dev->minor].i_InterruptFlag = 0;
1616 /* END JK 06.07.04: Management of sevrals boards */
1617 }
1618 break;
1619 default:
1620 printk("\nThe parameters passed are in error\n");
1621 i_APCI3200_Reset(dev);
1622 return -EINVAL;
1623 } /* switch(insn->unused[0]) */
1624 642
1625 return insn->n; 643 return insn->n;
1626} 644}
1627 645
1628/* 646static int i_APCI3200_Read1AnalogInputChannel(struct comedi_device *dev,
1629 +----------------------------------------------------------------------------+ 647 struct comedi_subdevice *s,
1630 | Function Name : int i_APCI3200_Read1AnalogInputChannel | 648 struct comedi_insn *insn,
1631 | (struct comedi_device *dev,struct comedi_subdevice *s, | 649 unsigned int *data)
1632 | struct comedi_insn *insn,unsigned int *data) |
1633 +----------------------------------------------------------------------------+
1634 | Task : Read value of the selected channel |
1635 +----------------------------------------------------------------------------+
1636 | Input Parameters : struct comedi_device *dev : Driver handle |
1637 | unsigned int ui_NoOfChannel : Channel No to read |
1638 | unsigned int *data : Data Pointer to read status |
1639 +----------------------------------------------------------------------------+
1640 | Output Parameters : -- |
1641 | data[0] : Digital Value read |
1642 |
1643 +----------------------------------------------------------------------------+
1644 | Return Value : TRUE : No error occur |
1645 | : FALSE : Error occur. Return the error |
1646 | |
1647 +----------------------------------------------------------------------------+
1648*/
1649int i_APCI3200_Read1AnalogInputChannel(struct comedi_device *dev,
1650 struct comedi_subdevice *s, struct comedi_insn *insn, unsigned int *data)
1651{ 650{
651 struct addi_private *devpriv = dev->private;
1652 unsigned int ui_EOC = 0; 652 unsigned int ui_EOC = 0;
1653 unsigned int ui_ChannelNo = 0; 653 unsigned int ui_ChannelNo = 0;
1654 unsigned int ui_CommandRegister = 0; 654 unsigned int ui_CommandRegister = 0;
@@ -1751,28 +751,10 @@ int i_APCI3200_Read1AnalogInputChannel(struct comedi_device *dev,
1751 return 0; 751 return 0;
1752} 752}
1753 753
1754/* 754static int i_APCI3200_ReadCalibrationOffsetValue(struct comedi_device *dev,
1755 +----------------------------------------------------------------------------+ 755 unsigned int *data)
1756 | Function Name : int i_APCI3200_ReadCalibrationOffsetValue |
1757 | (struct comedi_device *dev,struct comedi_subdevice *s, |
1758 | struct comedi_insn *insn,unsigned int *data) |
1759 +----------------------------------------------------------------------------+
1760 | Task : Read calibration offset value of the selected channel|
1761 +----------------------------------------------------------------------------+
1762 | Input Parameters : struct comedi_device *dev : Driver handle |
1763 | unsigned int *data : Data Pointer to read status |
1764 +----------------------------------------------------------------------------+
1765 | Output Parameters : -- |
1766 | data[0] : Calibration offset Value |
1767 |
1768 +----------------------------------------------------------------------------+
1769 | Return Value : TRUE : No error occur |
1770 | : FALSE : Error occur. Return the error |
1771 | |
1772 +----------------------------------------------------------------------------+
1773*/
1774int i_APCI3200_ReadCalibrationOffsetValue(struct comedi_device *dev, unsigned int *data)
1775{ 756{
757 struct addi_private *devpriv = dev->private;
1776 unsigned int ui_Temp = 0, ui_EOC = 0; 758 unsigned int ui_Temp = 0, ui_EOC = 0;
1777 unsigned int ui_CommandRegister = 0; 759 unsigned int ui_CommandRegister = 0;
1778 760
@@ -1887,28 +869,10 @@ int i_APCI3200_ReadCalibrationOffsetValue(struct comedi_device *dev, unsigned in
1887 return 0; 869 return 0;
1888} 870}
1889 871
1890/* 872static int i_APCI3200_ReadCalibrationGainValue(struct comedi_device *dev,
1891 +----------------------------------------------------------------------------+ 873 unsigned int *data)
1892 | Function Name : int i_APCI3200_ReadCalibrationGainValue |
1893 | (struct comedi_device *dev,struct comedi_subdevice *s, |
1894 | struct comedi_insn *insn,unsigned int *data) |
1895 +----------------------------------------------------------------------------+
1896 | Task : Read calibration gain value of the selected channel |
1897 +----------------------------------------------------------------------------+
1898 | Input Parameters : struct comedi_device *dev : Driver handle |
1899 | unsigned int *data : Data Pointer to read status |
1900 +----------------------------------------------------------------------------+
1901 | Output Parameters : -- |
1902 | data[0] : Calibration gain Value Of Input |
1903 |
1904 +----------------------------------------------------------------------------+
1905 | Return Value : TRUE : No error occur |
1906 | : FALSE : Error occur. Return the error |
1907 | |
1908 +----------------------------------------------------------------------------+
1909*/
1910int i_APCI3200_ReadCalibrationGainValue(struct comedi_device *dev, unsigned int *data)
1911{ 874{
875 struct addi_private *devpriv = dev->private;
1912 unsigned int ui_EOC = 0; 876 unsigned int ui_EOC = 0;
1913 int ui_CommandRegister = 0; 877 int ui_CommandRegister = 0;
1914 878
@@ -2022,29 +986,10 @@ int i_APCI3200_ReadCalibrationGainValue(struct comedi_device *dev, unsigned int
2022 return 0; 986 return 0;
2023} 987}
2024 988
2025/* 989static int i_APCI3200_ReadCJCValue(struct comedi_device *dev,
2026 +----------------------------------------------------------------------------+ 990 unsigned int *data)
2027 | Function Name : int i_APCI3200_ReadCJCValue |
2028 | (struct comedi_device *dev,struct comedi_subdevice *s, |
2029 | struct comedi_insn *insn,unsigned int *data) |
2030 +----------------------------------------------------------------------------+
2031 | Task : Read CJC value of the selected channel |
2032 +----------------------------------------------------------------------------+
2033 | Input Parameters : struct comedi_device *dev : Driver handle |
2034 | unsigned int *data : Data Pointer to read status |
2035 +----------------------------------------------------------------------------+
2036 | Output Parameters : -- |
2037 | data[0] : CJC Value |
2038 |
2039 +----------------------------------------------------------------------------+
2040 | Return Value : TRUE : No error occur |
2041 | : FALSE : Error occur. Return the error |
2042 | |
2043 +----------------------------------------------------------------------------+
2044*/
2045
2046int i_APCI3200_ReadCJCValue(struct comedi_device *dev, unsigned int *data)
2047{ 991{
992 struct addi_private *devpriv = dev->private;
2048 unsigned int ui_EOC = 0; 993 unsigned int ui_EOC = 0;
2049 int ui_CommandRegister = 0; 994 int ui_CommandRegister = 0;
2050 995
@@ -2142,30 +1087,13 @@ int i_APCI3200_ReadCJCValue(struct comedi_device *dev, unsigned int *data)
2142 return 0; 1087 return 0;
2143} 1088}
2144 1089
2145/* 1090static int i_APCI3200_ReadCJCCalOffset(struct comedi_device *dev,
2146 +----------------------------------------------------------------------------+ 1091 unsigned int *data)
2147 | Function Name : int i_APCI3200_ReadCJCCalOffset |
2148 | (struct comedi_device *dev,struct comedi_subdevice *s, |
2149 | struct comedi_insn *insn,unsigned int *data) |
2150 +----------------------------------------------------------------------------+
2151 | Task : Read CJC calibration offset value of the selected channel
2152 +----------------------------------------------------------------------------+
2153 | Input Parameters : struct comedi_device *dev : Driver handle |
2154 | unsigned int *data : Data Pointer to read status |
2155 +----------------------------------------------------------------------------+
2156 | Output Parameters : -- |
2157 | data[0] : CJC calibration offset Value
2158 |
2159 +----------------------------------------------------------------------------+
2160 | Return Value : TRUE : No error occur |
2161 | : FALSE : Error occur. Return the error |
2162 | |
2163 +----------------------------------------------------------------------------+
2164*/
2165int i_APCI3200_ReadCJCCalOffset(struct comedi_device *dev, unsigned int *data)
2166{ 1092{
1093 struct addi_private *devpriv = dev->private;
2167 unsigned int ui_EOC = 0; 1094 unsigned int ui_EOC = 0;
2168 int ui_CommandRegister = 0; 1095 int ui_CommandRegister = 0;
1096
2169 /*******************************************/ 1097 /*******************************************/
2170 /*Read calibration offset value for the CJC */ 1098 /*Read calibration offset value for the CJC */
2171 /*******************************************/ 1099 /*******************************************/
@@ -2257,31 +1185,13 @@ int i_APCI3200_ReadCJCCalOffset(struct comedi_device *dev, unsigned int *data)
2257 return 0; 1185 return 0;
2258} 1186}
2259 1187
2260/* 1188static int i_APCI3200_ReadCJCCalGain(struct comedi_device *dev,
2261 +----------------------------------------------------------------------------+ 1189 unsigned int *data)
2262 | Function Name : int i_APCI3200_ReadCJCGainValue |
2263 | (struct comedi_device *dev,struct comedi_subdevice *s, |
2264 | struct comedi_insn *insn,unsigned int *data) |
2265 +----------------------------------------------------------------------------+
2266 | Task : Read CJC calibration gain value
2267 +----------------------------------------------------------------------------+
2268 | Input Parameters : struct comedi_device *dev : Driver handle |
2269 | unsigned int ui_NoOfChannels : No Of Channels To read |
2270 | unsigned int *data : Data Pointer to read status |
2271 +----------------------------------------------------------------------------+
2272 | Output Parameters : -- |
2273 | data[0] : CJC calibration gain value
2274 |
2275 +----------------------------------------------------------------------------+
2276 | Return Value : TRUE : No error occur |
2277 | : FALSE : Error occur. Return the error |
2278 | |
2279 +----------------------------------------------------------------------------+
2280*/
2281int i_APCI3200_ReadCJCCalGain(struct comedi_device *dev, unsigned int *data)
2282{ 1190{
1191 struct addi_private *devpriv = dev->private;
2283 unsigned int ui_EOC = 0; 1192 unsigned int ui_EOC = 0;
2284 int ui_CommandRegister = 0; 1193 int ui_CommandRegister = 0;
1194
2285 /*******************************/ 1195 /*******************************/
2286 /* Set the convert timing unit */ 1196 /* Set the convert timing unit */
2287 /*******************************/ 1197 /*******************************/
@@ -2367,43 +1277,842 @@ int i_APCI3200_ReadCJCCalGain(struct comedi_device *dev, unsigned int *data)
2367 return 0; 1277 return 0;
2368} 1278}
2369 1279
1280static int i_APCI3200_Reset(struct comedi_device *dev)
1281{
1282 struct addi_private *devpriv = dev->private;
1283 int i_Temp;
1284 unsigned int dw_Dummy;
1285
1286 /* i_InterruptFlag=0; */
1287 /* i_Initialised==0; */
1288 /* i_Count=0; */
1289 /* i_Sum=0; */
1290
1291 s_BoardInfos[dev->minor].i_InterruptFlag = 0;
1292 s_BoardInfos[dev->minor].i_Initialised = 0;
1293 s_BoardInfos[dev->minor].i_Count = 0;
1294 s_BoardInfos[dev->minor].i_Sum = 0;
1295 s_BoardInfos[dev->minor].b_StructInitialized = 0;
1296
1297 outl(0x83838383, devpriv->i_IobaseAmcc + 0x60);
1298
1299 /* Enable the interrupt for the controller */
1300 dw_Dummy = inl(devpriv->i_IobaseAmcc + 0x38);
1301 outl(dw_Dummy | 0x2000, devpriv->i_IobaseAmcc + 0x38);
1302 outl(0, devpriv->i_IobaseAddon); /* Resets the output */
1303 /***************/
1304 /*Empty the buffer */
1305 /**************/
1306 for (i_Temp = 0; i_Temp <= 95; i_Temp++) {
1307 /* ui_InterruptChannelValue[i_Temp]=0; */
1308 s_BoardInfos[dev->minor].ui_InterruptChannelValue[i_Temp] = 0;
1309 } /* for(i_Temp=0;i_Temp<=95;i_Temp++) */
1310 /*****************************/
1311 /*Reset the START and IRQ bit */
1312 /*****************************/
1313 for (i_Temp = 0; i_Temp <= 192;) {
1314 while (((inl(devpriv->iobase + i_Temp + 12) >> 19) & 1) != 1) ;
1315 outl(0, devpriv->iobase + i_Temp + 8);
1316 i_Temp = i_Temp + 64;
1317 } /* for(i_Temp=0;i_Temp<=192;i_Temp+64) */
1318 return 0;
1319}
1320
2370/* 1321/*
2371 +----------------------------------------------------------------------------+ 1322 * Read value of the selected channel
2372 | Function Name : int i_APCI3200_InsnBits_AnalogInput_Test | 1323 *
2373 | (struct comedi_device *dev,struct comedi_subdevice *s, | 1324 * data[0] : Digital Value Of Input
2374 | struct comedi_insn *insn,unsigned int *data) | 1325 * data[1] : Calibration Offset Value
2375 +----------------------------------------------------------------------------+ 1326 * data[2] : Calibration Gain Value
2376 | Task : Tests the Selected Anlog Input Channel | 1327 * data[3] : CJC value
2377 +----------------------------------------------------------------------------+ 1328 * data[4] : CJC offset value
2378 | Input Parameters : struct comedi_device *dev : Driver handle | 1329 * data[5] : CJC gain value
2379 | struct comedi_subdevice *s : Subdevice Pointer | 1330 * data[6] : CJC current source from eeprom
2380 | struct comedi_insn *insn : Insn Structure Pointer | 1331 * data[7] : Channel current source from eeprom
2381 | unsigned int *data : Data Pointer contains | 1332 * data[8] : Channle gain factor from eeprom
2382 | configuration parameters as below | 1333 */
2383 | 1334static int i_APCI3200_ReadAnalogInput(struct comedi_device *dev,
2384 | 1335 struct comedi_subdevice *s,
2385 | data[0] : 0 TestAnalogInputShortCircuit 1336 struct comedi_insn *insn,
2386 | 1 TestAnalogInputConnection | 1337 unsigned int *data)
2387 1338{
2388 +----------------------------------------------------------------------------+ 1339 unsigned int ui_DummyValue = 0;
2389 | Output Parameters : -- | 1340 int i_ConvertCJCCalibration;
2390 | data[0] : Digital value obtained | 1341 int i = 0;
2391 | data[1] : calibration offset | 1342
2392 | data[2] : calibration gain | 1343 /* BEGIN JK 06.07.04: Management of sevrals boards */
2393 | | 1344 /* if(i_Initialised==0) */
2394 | | 1345 if (s_BoardInfos[dev->minor].i_Initialised == 0)
2395 +----------------------------------------------------------------------------+ 1346 /* END JK 06.07.04: Management of sevrals boards */
2396 | Return Value : TRUE : No error occur | 1347 {
2397 | : FALSE : Error occur. Return the error | 1348 i_APCI3200_Reset(dev);
2398 | | 1349 return -EINVAL;
2399 +----------------------------------------------------------------------------+ 1350 } /* if(i_Initialised==0); */
2400*/ 1351
1352#ifdef PRINT_INFO
1353 printk("\n insn->unused[0] = %i", insn->unused[0]);
1354#endif
1355
1356 switch (insn->unused[0]) {
1357 case 0:
2401 1358
2402int i_APCI3200_InsnBits_AnalogInput_Test(struct comedi_device *dev, 1359 i_APCI3200_Read1AnalogInputChannel(dev, s, insn,
2403 struct comedi_subdevice *s, struct comedi_insn *insn, unsigned int *data) 1360 &ui_DummyValue);
1361 /* BEGIN JK 06.07.04: Management of sevrals boards */
1362 /* ui_InterruptChannelValue[i_Count+0]=ui_DummyValue; */
1363 s_BoardInfos[dev->minor].
1364 ui_InterruptChannelValue[s_BoardInfos[dev->minor].
1365 i_Count + 0] = ui_DummyValue;
1366 /* END JK 06.07.04: Management of sevrals boards */
1367
1368 /* Begin JK 25.10.2004: APCI-3200 / APCI-3300 Reading of EEPROM values */
1369 i_APCI3200_GetChannelCalibrationValue(dev,
1370 s_BoardInfos[dev->minor].ui_Channel_num,
1371 &s_BoardInfos[dev->minor].
1372 ui_InterruptChannelValue[s_BoardInfos[dev->minor].
1373 i_Count + 6],
1374 &s_BoardInfos[dev->minor].
1375 ui_InterruptChannelValue[s_BoardInfos[dev->minor].
1376 i_Count + 7],
1377 &s_BoardInfos[dev->minor].
1378 ui_InterruptChannelValue[s_BoardInfos[dev->minor].
1379 i_Count + 8]);
1380
1381#ifdef PRINT_INFO
1382 printk("\n s_BoardInfos [dev->minor].ui_InterruptChannelValue[s_BoardInfos [dev->minor].i_Count+6] = %lu", s_BoardInfos[dev->minor].ui_InterruptChannelValue[s_BoardInfos[dev->minor].i_Count + 6]);
1383
1384 printk("\n s_BoardInfos [dev->minor].ui_InterruptChannelValue[s_BoardInfos [dev->minor].i_Count+7] = %lu", s_BoardInfos[dev->minor].ui_InterruptChannelValue[s_BoardInfos[dev->minor].i_Count + 7]);
1385
1386 printk("\n s_BoardInfos [dev->minor].ui_InterruptChannelValue[s_BoardInfos [dev->minor].i_Count+8] = %lu", s_BoardInfos[dev->minor].ui_InterruptChannelValue[s_BoardInfos[dev->minor].i_Count + 8]);
1387#endif
1388
1389 /* End JK 25.10.2004: APCI-3200 / APCI-3300 Reading of EEPROM values */
1390
1391 /* BEGIN JK 06.07.04: Management of sevrals boards */
1392 /* if((i_ADDIDATAType==2) && (i_InterruptFlag == FALSE) && (i_CJCAvailable==1)) */
1393 if ((s_BoardInfos[dev->minor].i_ADDIDATAType == 2)
1394 && (s_BoardInfos[dev->minor].i_InterruptFlag == FALSE)
1395 && (s_BoardInfos[dev->minor].i_CJCAvailable == 1))
1396 /* END JK 06.07.04: Management of sevrals boards */
1397 {
1398 i_APCI3200_ReadCJCValue(dev, &ui_DummyValue);
1399 /* BEGIN JK 06.07.04: Management of sevrals boards */
1400 /* ui_InterruptChannelValue[i_Count + 3]=ui_DummyValue; */
1401 s_BoardInfos[dev->minor].
1402 ui_InterruptChannelValue[s_BoardInfos[dev->
1403 minor].i_Count + 3] = ui_DummyValue;
1404 /* END JK 06.07.04: Management of sevrals boards */
1405 } /* if((i_ADDIDATAType==2) && (i_InterruptFlag == FALSE)) */
1406 else {
1407 /* BEGIN JK 06.07.04: Management of sevrals boards */
1408 /* ui_InterruptChannelValue[i_Count + 3]=0; */
1409 s_BoardInfos[dev->minor].
1410 ui_InterruptChannelValue[s_BoardInfos[dev->
1411 minor].i_Count + 3] = 0;
1412 /* END JK 06.07.04: Management of sevrals boards */
1413 } /* elseif((i_ADDIDATAType==2) && (i_InterruptFlag == FALSE) && (i_CJCAvailable==1)) */
1414
1415 /* BEGIN JK 06.07.04: Management of sevrals boards */
1416 /* if (( i_AutoCalibration == FALSE) && (i_InterruptFlag == FALSE)) */
1417 if ((s_BoardInfos[dev->minor].i_AutoCalibration == FALSE)
1418 && (s_BoardInfos[dev->minor].i_InterruptFlag == FALSE))
1419 /* END JK 06.07.04: Management of sevrals boards */
1420 {
1421 i_APCI3200_ReadCalibrationOffsetValue(dev,
1422 &ui_DummyValue);
1423 /* BEGIN JK 06.07.04: Management of sevrals boards */
1424 /* ui_InterruptChannelValue[i_Count + 1]=ui_DummyValue; */
1425 s_BoardInfos[dev->minor].
1426 ui_InterruptChannelValue[s_BoardInfos[dev->
1427 minor].i_Count + 1] = ui_DummyValue;
1428 /* END JK 06.07.04: Management of sevrals boards */
1429 i_APCI3200_ReadCalibrationGainValue(dev,
1430 &ui_DummyValue);
1431 /* BEGIN JK 06.07.04: Management of sevrals boards */
1432 /* ui_InterruptChannelValue[i_Count + 2]=ui_DummyValue; */
1433 s_BoardInfos[dev->minor].
1434 ui_InterruptChannelValue[s_BoardInfos[dev->
1435 minor].i_Count + 2] = ui_DummyValue;
1436 /* END JK 06.07.04: Management of sevrals boards */
1437 } /* if (( i_AutoCalibration == FALSE) && (i_InterruptFlag == FALSE)) */
1438
1439 /* BEGIN JK 06.07.04: Management of sevrals boards */
1440 /* if((i_ADDIDATAType==2) && (i_InterruptFlag == FALSE)&& (i_CJCAvailable==1)) */
1441 if ((s_BoardInfos[dev->minor].i_ADDIDATAType == 2)
1442 && (s_BoardInfos[dev->minor].i_InterruptFlag == FALSE)
1443 && (s_BoardInfos[dev->minor].i_CJCAvailable == 1))
1444 /* END JK 06.07.04: Management of sevrals boards */
1445 {
1446 /**********************************************************/
1447 /*Test if the Calibration channel must be read for the CJC */
1448 /**********************************************************/
1449 /**********************************/
1450 /*Test if the polarity is the same */
1451 /**********************************/
1452 /* BEGIN JK 06.07.04: Management of sevrals boards */
1453 /* if(i_CJCPolarity!=i_ADDIDATAPolarity) */
1454 if (s_BoardInfos[dev->minor].i_CJCPolarity !=
1455 s_BoardInfos[dev->minor].i_ADDIDATAPolarity)
1456 /* END JK 06.07.04: Management of sevrals boards */
1457 {
1458 i_ConvertCJCCalibration = 1;
1459 } /* if(i_CJCPolarity!=i_ADDIDATAPolarity) */
1460 else {
1461 /* BEGIN JK 06.07.04: Management of sevrals boards */
1462 /* if(i_CJCGain==i_ADDIDATAGain) */
1463 if (s_BoardInfos[dev->minor].i_CJCGain ==
1464 s_BoardInfos[dev->minor].i_ADDIDATAGain)
1465 /* END JK 06.07.04: Management of sevrals boards */
1466 {
1467 i_ConvertCJCCalibration = 0;
1468 } /* if(i_CJCGain==i_ADDIDATAGain) */
1469 else {
1470 i_ConvertCJCCalibration = 1;
1471 } /* elseif(i_CJCGain==i_ADDIDATAGain) */
1472 } /* elseif(i_CJCPolarity!=i_ADDIDATAPolarity) */
1473 if (i_ConvertCJCCalibration == 1) {
1474 i_APCI3200_ReadCJCCalOffset(dev,
1475 &ui_DummyValue);
1476 /* BEGIN JK 06.07.04: Management of sevrals boards */
1477 /* ui_InterruptChannelValue[i_Count+4]=ui_DummyValue; */
1478 s_BoardInfos[dev->minor].
1479 ui_InterruptChannelValue[s_BoardInfos
1480 [dev->minor].i_Count + 4] =
1481 ui_DummyValue;
1482 /* END JK 06.07.04: Management of sevrals boards */
1483
1484 i_APCI3200_ReadCJCCalGain(dev, &ui_DummyValue);
1485
1486 /* BEGIN JK 06.07.04: Management of sevrals boards */
1487 /* ui_InterruptChannelValue[i_Count+5]=ui_DummyValue; */
1488 s_BoardInfos[dev->minor].
1489 ui_InterruptChannelValue[s_BoardInfos
1490 [dev->minor].i_Count + 5] =
1491 ui_DummyValue;
1492 /* END JK 06.07.04: Management of sevrals boards */
1493 } /* if(i_ConvertCJCCalibration==1) */
1494 else {
1495 /* BEGIN JK 06.07.04: Management of sevrals boards */
1496 /* ui_InterruptChannelValue[i_Count+4]=0; */
1497 /* ui_InterruptChannelValue[i_Count+5]=0; */
1498
1499 s_BoardInfos[dev->minor].
1500 ui_InterruptChannelValue[s_BoardInfos
1501 [dev->minor].i_Count + 4] = 0;
1502 s_BoardInfos[dev->minor].
1503 ui_InterruptChannelValue[s_BoardInfos
1504 [dev->minor].i_Count + 5] = 0;
1505 /* END JK 06.07.04: Management of sevrals boards */
1506 } /* elseif(i_ConvertCJCCalibration==1) */
1507 } /* if((i_ADDIDATAType==2) && (i_InterruptFlag == FALSE)) */
1508
1509 /* BEGIN JK 06.07.04: Management of sevrals boards */
1510 /* if(i_ScanType!=1) */
1511 if (s_BoardInfos[dev->minor].i_ScanType != 1) {
1512 /* i_Count=0; */
1513 s_BoardInfos[dev->minor].i_Count = 0;
1514 } /* if(i_ScanType!=1) */
1515 else {
1516 /* i_Count=i_Count +6; */
1517 /* Begin JK 22.10.2004: APCI-3200 / APCI-3300 Reading of EEPROM values */
1518 /* s_BoardInfos [dev->minor].i_Count=s_BoardInfos [dev->minor].i_Count +6; */
1519 s_BoardInfos[dev->minor].i_Count =
1520 s_BoardInfos[dev->minor].i_Count + 9;
1521 /* End JK 22.10.2004: APCI-3200 / APCI-3300 Reading of EEPROM values */
1522 } /* else if(i_ScanType!=1) */
1523
1524 /* if((i_ScanType==1) &&(i_InterruptFlag==1)) */
1525 if ((s_BoardInfos[dev->minor].i_ScanType == 1)
1526 && (s_BoardInfos[dev->minor].i_InterruptFlag == 1)) {
1527 /* i_Count=i_Count-6; */
1528 /* Begin JK 22.10.2004: APCI-3200 / APCI-3300 Reading of EEPROM values */
1529 /* s_BoardInfos [dev->minor].i_Count=s_BoardInfos [dev->minor].i_Count-6; */
1530 s_BoardInfos[dev->minor].i_Count =
1531 s_BoardInfos[dev->minor].i_Count - 9;
1532 /* End JK 22.10.2004: APCI-3200 / APCI-3300 Reading of EEPROM values */
1533 }
1534 /* if(i_ScanType==0) */
1535 if (s_BoardInfos[dev->minor].i_ScanType == 0) {
1536 /*
1537 data[0]= ui_InterruptChannelValue[0];
1538 data[1]= ui_InterruptChannelValue[1];
1539 data[2]= ui_InterruptChannelValue[2];
1540 data[3]= ui_InterruptChannelValue[3];
1541 data[4]= ui_InterruptChannelValue[4];
1542 data[5]= ui_InterruptChannelValue[5];
1543 */
1544#ifdef PRINT_INFO
1545 printk("\n data[0]= s_BoardInfos [dev->minor].ui_InterruptChannelValue[0];");
1546#endif
1547 data[0] =
1548 s_BoardInfos[dev->minor].
1549 ui_InterruptChannelValue[0];
1550 data[1] =
1551 s_BoardInfos[dev->minor].
1552 ui_InterruptChannelValue[1];
1553 data[2] =
1554 s_BoardInfos[dev->minor].
1555 ui_InterruptChannelValue[2];
1556 data[3] =
1557 s_BoardInfos[dev->minor].
1558 ui_InterruptChannelValue[3];
1559 data[4] =
1560 s_BoardInfos[dev->minor].
1561 ui_InterruptChannelValue[4];
1562 data[5] =
1563 s_BoardInfos[dev->minor].
1564 ui_InterruptChannelValue[5];
1565
1566 /* Begin JK 22.10.2004: APCI-3200 / APCI-3300 Reading of EEPROM values */
1567 /* printk("\n 0 - i_APCI3200_GetChannelCalibrationValue data [6] = %lu, data [7] = %lu, data [8] = %lu", data [6], data [7], data [8]); */
1568 i_APCI3200_GetChannelCalibrationValue(dev,
1569 s_BoardInfos[dev->minor].ui_Channel_num,
1570 &data[6], &data[7], &data[8]);
1571 /* End JK 22.10.2004: APCI-3200 / APCI-3300 Reading of EEPROM values */
1572 }
1573 break;
1574 case 1:
1575
1576 for (i = 0; i < insn->n; i++) {
1577 /* data[i]=ui_InterruptChannelValue[i]; */
1578 data[i] =
1579 s_BoardInfos[dev->minor].
1580 ui_InterruptChannelValue[i];
1581 }
1582
1583 /* i_Count=0; */
1584 /* i_Sum=0; */
1585 /* if(i_ScanType==1) */
1586 s_BoardInfos[dev->minor].i_Count = 0;
1587 s_BoardInfos[dev->minor].i_Sum = 0;
1588 if (s_BoardInfos[dev->minor].i_ScanType == 1) {
1589 /* i_Initialised=0; */
1590 /* i_InterruptFlag=0; */
1591 s_BoardInfos[dev->minor].i_Initialised = 0;
1592 s_BoardInfos[dev->minor].i_InterruptFlag = 0;
1593 /* END JK 06.07.04: Management of sevrals boards */
1594 }
1595 break;
1596 default:
1597 printk("\nThe parameters passed are in error\n");
1598 i_APCI3200_Reset(dev);
1599 return -EINVAL;
1600 } /* switch(insn->unused[0]) */
1601
1602 return insn->n;
1603}
1604
1605/*
1606 * Configures The Analog Input Subdevice
1607 *
1608 * data[0] = 0 Normal AI
1609 * = 1 RTD
1610 * = 2 THERMOCOUPLE
1611 * data[1] = Gain To Use
1612 * data[2] = 0 Bipolar
1613 * = 1 Unipolar
1614 * data[3] = Offset Range
1615 * data[4] = 0 DC Coupling
1616 * = 1 AC Coupling
1617 * data[5] = 0 Single
1618 * = 1 Differential
1619 * data[6] = TimerReloadValue
1620 * data[7] = ConvertingTimeUnit
1621 * data[8] = 0 Analog voltage measurement
1622 * = 1 Resistance measurement
1623 * = 2 Temperature measurement
1624 * data[9] = 0 Interrupt Disable
1625 * = 1 INterrupt Enable
1626 * data[10] = Type of Thermocouple
1627 * data[11] = single channel Module Number
1628 * data[12] = 0 Single Read
1629 * = 1 Read more channel
1630 * = 2 Single scan
1631 * = 3 Continuous Scan
1632 * data[13] = Number of channels to read
1633 * data[14] = 0 RTD not used
1634 * = 1 RTD 2 wire connection
1635 * = 2 RTD 3 wire connection
1636 * = 3 RTD 4 wire connection
1637 */
1638static int i_APCI3200_ConfigAnalogInput(struct comedi_device *dev,
1639 struct comedi_subdevice *s,
1640 struct comedi_insn *insn,
1641 unsigned int *data)
2404{ 1642{
1643 struct addi_private *devpriv = dev->private;
1644 unsigned int ul_Config = 0, ul_Temp = 0;
1645 unsigned int ui_ChannelNo = 0;
1646 unsigned int ui_Dummy = 0;
1647 int i_err = 0;
1648
1649 /* Begin JK 21.10.2004: APCI-3200 / APCI-3300 Reading of EEPROM values */
1650
1651#ifdef PRINT_INFO
1652 int i = 0, i2 = 0;
1653#endif
1654 /* End JK 21.10.2004: APCI-3200 / APCI-3300 Reading of EEPROM values */
1655
1656 /* BEGIN JK 06.07.04: Management of sevrals boards */
1657 /* Initialize the structure */
1658 if (s_BoardInfos[dev->minor].b_StructInitialized != 1) {
1659 s_BoardInfos[dev->minor].i_CJCAvailable = 1;
1660 s_BoardInfos[dev->minor].i_CJCPolarity = 0;
1661 s_BoardInfos[dev->minor].i_CJCGain = 2; /* changed from 0 to 2 */
1662 s_BoardInfos[dev->minor].i_InterruptFlag = 0;
1663 s_BoardInfos[dev->minor].i_AutoCalibration = 0; /* : auto calibration */
1664 s_BoardInfos[dev->minor].i_ChannelCount = 0;
1665 s_BoardInfos[dev->minor].i_Sum = 0;
1666 s_BoardInfos[dev->minor].ui_Channel_num = 0;
1667 s_BoardInfos[dev->minor].i_Count = 0;
1668 s_BoardInfos[dev->minor].i_Initialised = 0;
1669 s_BoardInfos[dev->minor].b_StructInitialized = 1;
1670
1671 /* Begin JK 21.10.2004: APCI-3200 / APCI-3300 Reading of EEPROM values */
1672 s_BoardInfos[dev->minor].i_ConnectionType = 0;
1673 /* End JK 21.10.2004: APCI-3200 / APCI-3300 Reading of EEPROM values */
1674
1675 /* Begin JK 21.10.2004: APCI-3200 / APCI-3300 Reading of EEPROM values */
1676 memset(s_BoardInfos[dev->minor].s_Module, 0,
1677 sizeof(s_BoardInfos[dev->minor].s_Module[MAX_MODULE]));
1678
1679 v_GetAPCI3200EepromCalibrationValue(devpriv->i_IobaseAmcc,
1680 &s_BoardInfos[dev->minor]);
1681
1682#ifdef PRINT_INFO
1683 for (i = 0; i < MAX_MODULE; i++) {
1684 printk("\n s_Module[%i].ul_CurrentSourceCJC = %lu", i,
1685 s_BoardInfos[dev->minor].s_Module[i].
1686 ul_CurrentSourceCJC);
1687
1688 for (i2 = 0; i2 < 5; i2++) {
1689 printk("\n s_Module[%i].ul_CurrentSource [%i] = %lu", i, i2, s_BoardInfos[dev->minor].s_Module[i].ul_CurrentSource[i2]);
1690 }
1691
1692 for (i2 = 0; i2 < 8; i2++) {
1693 printk("\n s_Module[%i].ul_GainFactor [%i] = %lu", i, i2, s_BoardInfos[dev->minor].s_Module[i].ul_GainFactor[i2]);
1694 }
1695
1696 for (i2 = 0; i2 < 8; i2++) {
1697 printk("\n s_Module[%i].w_GainValue [%i] = %u",
1698 i, i2,
1699 s_BoardInfos[dev->minor].s_Module[i].
1700 w_GainValue[i2]);
1701 }
1702 }
1703#endif
1704 /* End JK 21.10.2004: APCI-3200 / APCI-3300 Reading of EEPROM values */
1705 }
1706
1707 if (data[0] != 0 && data[0] != 1 && data[0] != 2) {
1708 printk("\nThe selection of acquisition type is in error\n");
1709 i_err++;
1710 } /* if(data[0]!=0 && data[0]!=1 && data[0]!=2) */
1711 if (data[0] == 1) {
1712 if (data[14] != 0 && data[14] != 1 && data[14] != 2
1713 && data[14] != 4) {
1714 printk("\n Error in selection of RTD connection type\n");
1715 i_err++;
1716 } /* if(data[14]!=0 && data[14]!=1 && data[14]!=2 && data[14]!=4) */
1717 } /* if(data[0]==1 ) */
1718 if (data[1] < 0 || data[1] > 7) {
1719 printk("\nThe selection of gain is in error\n");
1720 i_err++;
1721 } /* if(data[1]<0 || data[1]>7) */
1722 if (data[2] != 0 && data[2] != 1) {
1723 printk("\nThe selection of polarity is in error\n");
1724 i_err++;
1725 } /* if(data[2]!=0 && data[2]!=1) */
1726 if (data[3] != 0) {
1727 printk("\nThe selection of offset range is in error\n");
1728 i_err++;
1729 } /* if(data[3]!=0) */
1730 if (data[4] != 0 && data[4] != 1) {
1731 printk("\nThe selection of coupling is in error\n");
1732 i_err++;
1733 } /* if(data[4]!=0 && data[4]!=1) */
1734 if (data[5] != 0 && data[5] != 1) {
1735 printk("\nThe selection of single/differential mode is in error\n");
1736 i_err++;
1737 } /* if(data[5]!=0 && data[5]!=1) */
1738 if (data[8] != 0 && data[8] != 1 && data[2] != 2) {
1739 printk("\nError in selection of functionality\n");
1740 } /* if(data[8]!=0 && data[8]!=1 && data[2]!=2) */
1741 if (data[12] == 0 || data[12] == 1) {
1742 if (data[6] != 20 && data[6] != 40 && data[6] != 80
1743 && data[6] != 160) {
1744 printk("\nThe selection of conversion time reload value is in error\n");
1745 i_err++;
1746 } /* if (data[6]!=20 && data[6]!=40 && data[6]!=80 && data[6]!=160 ) */
1747 if (data[7] != 2) {
1748 printk("\nThe selection of conversion time unit is in error\n");
1749 i_err++;
1750 } /* if(data[7]!=2) */
1751 }
1752 if (data[9] != 0 && data[9] != 1) {
1753 printk("\nThe selection of interrupt enable is in error\n");
1754 i_err++;
1755 } /* if(data[9]!=0 && data[9]!=1) */
1756 if (data[11] < 0 || data[11] > 4) {
1757 printk("\nThe selection of module is in error\n");
1758 i_err++;
1759 } /* if(data[11] <0 || data[11]>1) */
1760 if (data[12] < 0 || data[12] > 3) {
1761 printk("\nThe selection of singlechannel/scan selection is in error\n");
1762 i_err++;
1763 } /* if(data[12] < 0 || data[12]> 3) */
1764 if (data[13] < 0 || data[13] > 16) {
1765 printk("\nThe selection of number of channels is in error\n");
1766 i_err++;
1767 } /* if(data[13] <0 ||data[13] >15) */
1768
1769 /* BEGIN JK 06.07.04: Management of sevrals boards */
1770 /*
1771 i_ChannelCount=data[13];
1772 i_ScanType=data[12];
1773 i_ADDIDATAPolarity = data[2];
1774 i_ADDIDATAGain=data[1];
1775 i_ADDIDATAConversionTime=data[6];
1776 i_ADDIDATAConversionTimeUnit=data[7];
1777 i_ADDIDATAType=data[0];
1778 */
1779
1780 /* Save acquisition configuration for the actual board */
1781 s_BoardInfos[dev->minor].i_ChannelCount = data[13];
1782 s_BoardInfos[dev->minor].i_ScanType = data[12];
1783 s_BoardInfos[dev->minor].i_ADDIDATAPolarity = data[2];
1784 s_BoardInfos[dev->minor].i_ADDIDATAGain = data[1];
1785 s_BoardInfos[dev->minor].i_ADDIDATAConversionTime = data[6];
1786 s_BoardInfos[dev->minor].i_ADDIDATAConversionTimeUnit = data[7];
1787 s_BoardInfos[dev->minor].i_ADDIDATAType = data[0];
1788 /* Begin JK 19.10.2004: APCI-3200 Driver update 0.7.57 -> 0.7.68 */
1789 s_BoardInfos[dev->minor].i_ConnectionType = data[5];
1790 /* End JK 19.10.2004: APCI-3200 Driver update 0.7.57 -> 0.7.68 */
1791 /* END JK 06.07.04: Management of sevrals boards */
1792
1793 /* Begin JK 19.10.2004: APCI-3200 Driver update 0.7.57 -> 0.7.68 */
1794 memset(s_BoardInfos[dev->minor].ui_ScanValueArray, 0, (7 + 12) * sizeof(unsigned int)); /* 7 is the maximal number of channels */
1795 /* End JK 19.10.2004: APCI-3200 Driver update 0.7.57 -> 0.7.68 */
1796
1797 /* BEGIN JK 02.07.04 : This while can't be do, it block the process when using severals boards */
1798 /* while(i_InterruptFlag==1) */
1799 while (s_BoardInfos[dev->minor].i_InterruptFlag == 1) {
1800#ifndef MSXBOX
1801 udelay(1);
1802#else
1803 /* In the case where the driver is compiled for the MSX-Box */
1804 /* we used a printk to have a little delay because udelay */
1805 /* seems to be broken under the MSX-Box. */
1806 /* This solution hat to be studied. */
1807 printk("");
1808#endif
1809 }
1810 /* END JK 02.07.04 : This while can't be do, it block the process when using severals boards */
1811
1812 ui_ChannelNo = CR_CHAN(insn->chanspec); /* get the channel */
1813 /* BEGIN JK 06.07.04: Management of sevrals boards */
1814 /* i_ChannelNo=ui_ChannelNo; */
1815 /* ui_Channel_num =ui_ChannelNo; */
1816
1817 s_BoardInfos[dev->minor].i_ChannelNo = ui_ChannelNo;
1818 s_BoardInfos[dev->minor].ui_Channel_num = ui_ChannelNo;
1819
1820 /* END JK 06.07.04: Management of sevrals boards */
1821
1822 if (data[5] == 0) {
1823 if (ui_ChannelNo < 0 || ui_ChannelNo > 15) {
1824 printk("\nThe Selection of the channel is in error\n");
1825 i_err++;
1826 } /* if(ui_ChannelNo<0 || ui_ChannelNo>15) */
1827 } /* if(data[5]==0) */
1828 else {
1829 if (data[14] == 2) {
1830 if (ui_ChannelNo < 0 || ui_ChannelNo > 3) {
1831 printk("\nThe Selection of the channel is in error\n");
1832 i_err++;
1833 } /* if(ui_ChannelNo<0 || ui_ChannelNo>3) */
1834 } /* if(data[14]==2) */
1835 else {
1836 if (ui_ChannelNo < 0 || ui_ChannelNo > 7) {
1837 printk("\nThe Selection of the channel is in error\n");
1838 i_err++;
1839 } /* if(ui_ChannelNo<0 || ui_ChannelNo>7) */
1840 } /* elseif(data[14]==2) */
1841 } /* elseif(data[5]==0) */
1842 if (data[12] == 0 || data[12] == 1) {
1843 switch (data[5]) {
1844 case 0:
1845 if (ui_ChannelNo >= 0 && ui_ChannelNo <= 3) {
1846 /* BEGIN JK 06.07.04: Management of sevrals boards */
1847 /* i_Offset=0; */
1848 s_BoardInfos[dev->minor].i_Offset = 0;
1849 /* END JK 06.07.04: Management of sevrals boards */
1850 } /* if(ui_ChannelNo >=0 && ui_ChannelNo <=3) */
1851 if (ui_ChannelNo >= 4 && ui_ChannelNo <= 7) {
1852 /* BEGIN JK 06.07.04: Management of sevrals boards */
1853 /* i_Offset=64; */
1854 s_BoardInfos[dev->minor].i_Offset = 64;
1855 /* END JK 06.07.04: Management of sevrals boards */
1856 } /* if(ui_ChannelNo >=4 && ui_ChannelNo <=7) */
1857 if (ui_ChannelNo >= 8 && ui_ChannelNo <= 11) {
1858 /* BEGIN JK 06.07.04: Management of sevrals boards */
1859 /* i_Offset=128; */
1860 s_BoardInfos[dev->minor].i_Offset = 128;
1861 /* END JK 06.07.04: Management of sevrals boards */
1862 } /* if(ui_ChannelNo >=8 && ui_ChannelNo <=11) */
1863 if (ui_ChannelNo >= 12 && ui_ChannelNo <= 15) {
1864 /* BEGIN JK 06.07.04: Management of sevrals boards */
1865 /* i_Offset=192; */
1866 s_BoardInfos[dev->minor].i_Offset = 192;
1867 /* END JK 06.07.04: Management of sevrals boards */
1868 } /* if(ui_ChannelNo >=12 && ui_ChannelNo <=15) */
1869 break;
1870 case 1:
1871 if (data[14] == 2) {
1872 if (ui_ChannelNo == 0) {
1873 /* BEGIN JK 06.07.04: Management of sevrals boards */
1874 /* i_Offset=0; */
1875 s_BoardInfos[dev->minor].i_Offset = 0;
1876 /* END JK 06.07.04: Management of sevrals boards */
1877 } /* if(ui_ChannelNo ==0 ) */
1878 if (ui_ChannelNo == 1) {
1879 /* BEGIN JK 06.07.04: Management of sevrals boards */
1880 /* i_Offset=0; */
1881 s_BoardInfos[dev->minor].i_Offset = 64;
1882 /* END JK 06.07.04: Management of sevrals boards */
1883 } /* if(ui_ChannelNo ==1) */
1884 if (ui_ChannelNo == 2) {
1885 /* BEGIN JK 06.07.04: Management of sevrals boards */
1886 /* i_Offset=128; */
1887 s_BoardInfos[dev->minor].i_Offset = 128;
1888 /* END JK 06.07.04: Management of sevrals boards */
1889 } /* if(ui_ChannelNo ==2 ) */
1890 if (ui_ChannelNo == 3) {
1891 /* BEGIN JK 06.07.04: Management of sevrals boards */
1892 /* i_Offset=192; */
1893 s_BoardInfos[dev->minor].i_Offset = 192;
1894 /* END JK 06.07.04: Management of sevrals boards */
1895 } /* if(ui_ChannelNo ==3) */
1896
1897 /* BEGIN JK 06.07.04: Management of sevrals boards */
1898 /* i_ChannelNo=0; */
1899 s_BoardInfos[dev->minor].i_ChannelNo = 0;
1900 /* END JK 06.07.04: Management of sevrals boards */
1901 ui_ChannelNo = 0;
1902 break;
1903 } /* if(data[14]==2) */
1904 if (ui_ChannelNo >= 0 && ui_ChannelNo <= 1) {
1905 /* BEGIN JK 06.07.04: Management of sevrals boards */
1906 /* i_Offset=0; */
1907 s_BoardInfos[dev->minor].i_Offset = 0;
1908 /* END JK 06.07.04: Management of sevrals boards */
1909 } /* if(ui_ChannelNo >=0 && ui_ChannelNo <=1) */
1910 if (ui_ChannelNo >= 2 && ui_ChannelNo <= 3) {
1911 /* BEGIN JK 06.07.04: Management of sevrals boards */
1912 /* i_ChannelNo=i_ChannelNo-2; */
1913 /* i_Offset=64; */
1914 s_BoardInfos[dev->minor].i_ChannelNo =
1915 s_BoardInfos[dev->minor].i_ChannelNo -
1916 2;
1917 s_BoardInfos[dev->minor].i_Offset = 64;
1918 /* END JK 06.07.04: Management of sevrals boards */
1919 ui_ChannelNo = ui_ChannelNo - 2;
1920 } /* if(ui_ChannelNo >=2 && ui_ChannelNo <=3) */
1921 if (ui_ChannelNo >= 4 && ui_ChannelNo <= 5) {
1922 /* BEGIN JK 06.07.04: Management of sevrals boards */
1923 /* i_ChannelNo=i_ChannelNo-4; */
1924 /* i_Offset=128; */
1925 s_BoardInfos[dev->minor].i_ChannelNo =
1926 s_BoardInfos[dev->minor].i_ChannelNo -
1927 4;
1928 s_BoardInfos[dev->minor].i_Offset = 128;
1929 /* END JK 06.07.04: Management of sevrals boards */
1930 ui_ChannelNo = ui_ChannelNo - 4;
1931 } /* if(ui_ChannelNo >=4 && ui_ChannelNo <=5) */
1932 if (ui_ChannelNo >= 6 && ui_ChannelNo <= 7) {
1933 /* BEGIN JK 06.07.04: Management of sevrals boards */
1934 /* i_ChannelNo=i_ChannelNo-6; */
1935 /* i_Offset=192; */
1936 s_BoardInfos[dev->minor].i_ChannelNo =
1937 s_BoardInfos[dev->minor].i_ChannelNo -
1938 6;
1939 s_BoardInfos[dev->minor].i_Offset = 192;
1940 /* END JK 06.07.04: Management of sevrals boards */
1941 ui_ChannelNo = ui_ChannelNo - 6;
1942 } /* if(ui_ChannelNo >=6 && ui_ChannelNo <=7) */
1943 break;
1944
1945 default:
1946 printk("\n This selection of polarity does not exist\n");
1947 i_err++;
1948 } /* switch(data[2]) */
1949 } /* if(data[12]==0 || data[12]==1) */
1950 else {
1951 switch (data[11]) {
1952 case 1:
1953 /* BEGIN JK 06.07.04: Management of sevrals boards */
1954 /* i_Offset=0; */
1955 s_BoardInfos[dev->minor].i_Offset = 0;
1956 /* END JK 06.07.04: Management of sevrals boards */
1957 break;
1958 case 2:
1959 /* BEGIN JK 06.07.04: Management of sevrals boards */
1960 /* i_Offset=64; */
1961 s_BoardInfos[dev->minor].i_Offset = 64;
1962 /* END JK 06.07.04: Management of sevrals boards */
1963 break;
1964 case 3:
1965 /* BEGIN JK 06.07.04: Management of sevrals boards */
1966 /* i_Offset=128; */
1967 s_BoardInfos[dev->minor].i_Offset = 128;
1968 /* END JK 06.07.04: Management of sevrals boards */
1969 break;
1970 case 4:
1971 /* BEGIN JK 06.07.04: Management of sevrals boards */
1972 /* i_Offset=192; */
1973 s_BoardInfos[dev->minor].i_Offset = 192;
1974 /* END JK 06.07.04: Management of sevrals boards */
1975 break;
1976 default:
1977 printk("\nError in module selection\n");
1978 i_err++;
1979 } /* switch(data[11]) */
1980 } /* elseif(data[12]==0 || data[12]==1) */
1981 if (i_err) {
1982 i_APCI3200_Reset(dev);
1983 return -EINVAL;
1984 }
1985 /* if(i_ScanType!=1) */
1986 if (s_BoardInfos[dev->minor].i_ScanType != 1) {
1987 /* BEGIN JK 06.07.04: Management of sevrals boards */
1988 /* i_Count=0; */
1989 /* i_Sum=0; */
1990 s_BoardInfos[dev->minor].i_Count = 0;
1991 s_BoardInfos[dev->minor].i_Sum = 0;
1992 /* END JK 06.07.04: Management of sevrals boards */
1993 } /* if(i_ScanType!=1) */
1994
1995 ul_Config =
1996 data[1] | (data[2] << 6) | (data[5] << 7) | (data[3] << 8) |
1997 (data[4] << 9);
1998 /* BEGIN JK 06.07.04: Management of sevrals boards */
1999 /* while (((inl(devpriv->iobase+i_Offset+12)>>19) & 1) != 1); */
2000 while (((inl(devpriv->iobase + s_BoardInfos[dev->minor].i_Offset +
2001 12) >> 19) & 1) != 1) ;
2002 /* END JK 06.07.04: Management of sevrals boards */
2003 /*********************************/
2004 /* Write the channel to configure */
2005 /*********************************/
2006 /* BEGIN JK 06.07.04: Management of sevrals boards */
2007 /* outl(0 | ui_ChannelNo , devpriv->iobase+i_Offset + 0x4); */
2008 outl(0 | ui_ChannelNo,
2009 devpriv->iobase + s_BoardInfos[dev->minor].i_Offset + 0x4);
2010 /* END JK 06.07.04: Management of sevrals boards */
2011
2012 /* BEGIN JK 06.07.04: Management of sevrals boards */
2013 /* while (((inl(devpriv->iobase+i_Offset+12)>>19) & 1) != 1); */
2014 while (((inl(devpriv->iobase + s_BoardInfos[dev->minor].i_Offset +
2015 12) >> 19) & 1) != 1) ;
2016 /* END JK 06.07.04: Management of sevrals boards */
2017 /**************************/
2018 /* Reset the configuration */
2019 /**************************/
2020 /* BEGIN JK 06.07.04: Management of sevrals boards */
2021 /* outl(0 , devpriv->iobase+i_Offset + 0x0); */
2022 outl(0, devpriv->iobase + s_BoardInfos[dev->minor].i_Offset + 0x0);
2023 /* END JK 06.07.04: Management of sevrals boards */
2024
2025 /* BEGIN JK 06.07.04: Management of sevrals boards */
2026 /* while (((inl(devpriv->iobase+i_Offset+12)>>19) & 1) != 1); */
2027 while (((inl(devpriv->iobase + s_BoardInfos[dev->minor].i_Offset +
2028 12) >> 19) & 1) != 1) ;
2029 /* END JK 06.07.04: Management of sevrals boards */
2030
2031 /***************************/
2032 /* Write the configuration */
2033 /***************************/
2034 /* BEGIN JK 06.07.04: Management of sevrals boards */
2035 /* outl(ul_Config , devpriv->iobase+i_Offset + 0x0); */
2036 outl(ul_Config,
2037 devpriv->iobase + s_BoardInfos[dev->minor].i_Offset + 0x0);
2038 /* END JK 06.07.04: Management of sevrals boards */
2039
2040 /***************************/
2041 /*Reset the calibration bit */
2042 /***************************/
2043 /* BEGIN JK 06.07.04: Management of sevrals boards */
2044 /* ul_Temp = inl(devpriv->iobase+i_Offset + 12); */
2045 ul_Temp = inl(devpriv->iobase + s_BoardInfos[dev->minor].i_Offset + 12);
2046 /* END JK 06.07.04: Management of sevrals boards */
2047
2048 /* BEGIN JK 06.07.04: Management of sevrals boards */
2049 /* while (((inl(devpriv->iobase+i_Offset+12)>>19) & 1) != 1); */
2050 while (((inl(devpriv->iobase + s_BoardInfos[dev->minor].i_Offset +
2051 12) >> 19) & 1) != 1) ;
2052 /* END JK 06.07.04: Management of sevrals boards */
2053
2054 /* BEGIN JK 06.07.04: Management of sevrals boards */
2055 /* outl((ul_Temp & 0xFFF9FFFF) , devpriv->iobase+.i_Offset + 12); */
2056 outl((ul_Temp & 0xFFF9FFFF),
2057 devpriv->iobase + s_BoardInfos[dev->minor].i_Offset + 12);
2058 /* END JK 06.07.04: Management of sevrals boards */
2059
2060 if (data[9] == 1) {
2061 devpriv->tsk_Current = current;
2062 /* BEGIN JK 06.07.04: Management of sevrals boards */
2063 /* i_InterruptFlag=1; */
2064 s_BoardInfos[dev->minor].i_InterruptFlag = 1;
2065 /* END JK 06.07.04: Management of sevrals boards */
2066 } /* if(data[9]==1) */
2067 else {
2068 /* BEGIN JK 06.07.04: Management of sevrals boards */
2069 /* i_InterruptFlag=0; */
2070 s_BoardInfos[dev->minor].i_InterruptFlag = 0;
2071 /* END JK 06.07.04: Management of sevrals boards */
2072 } /* else if(data[9]==1) */
2073
2074 /* BEGIN JK 06.07.04: Management of sevrals boards */
2075 /* i_Initialised=1; */
2076 s_BoardInfos[dev->minor].i_Initialised = 1;
2077 /* END JK 06.07.04: Management of sevrals boards */
2078
2079 /* BEGIN JK 06.07.04: Management of sevrals boards */
2080 /* if(i_ScanType==1) */
2081 if (s_BoardInfos[dev->minor].i_ScanType == 1)
2082 /* END JK 06.07.04: Management of sevrals boards */
2083 {
2084 /* BEGIN JK 06.07.04: Management of sevrals boards */
2085 /* i_Sum=i_Sum+1; */
2086 s_BoardInfos[dev->minor].i_Sum =
2087 s_BoardInfos[dev->minor].i_Sum + 1;
2088 /* END JK 06.07.04: Management of sevrals boards */
2089
2090 insn->unused[0] = 0;
2091 i_APCI3200_ReadAnalogInput(dev, s, insn, &ui_Dummy);
2092 }
2093
2094 return insn->n;
2095}
2096
2097/*
2098 * Tests the Selected Anlog Input Channel
2099 *
2100 * data[0] = 0 TestAnalogInputShortCircuit
2101 * = 1 TestAnalogInputConnection
2102 *
2103 * data[0] : Digital value obtained
2104 * data[1] : calibration offset
2105 * data[2] : calibration gain
2106 */
2107static int i_APCI3200_InsnBits_AnalogInput_Test(struct comedi_device *dev,
2108 struct comedi_subdevice *s,
2109 struct comedi_insn *insn,
2110 unsigned int *data)
2111{
2112 struct addi_private *devpriv = dev->private;
2405 unsigned int ui_Configuration = 0; 2113 unsigned int ui_Configuration = 0;
2406 int i_Temp; /* ,i_TimeUnit; */ 2114 int i_Temp; /* ,i_TimeUnit; */
2115
2407 /* if(i_Initialised==0) */ 2116 /* if(i_Initialised==0) */
2408 2117
2409 if (s_BoardInfos[dev->minor].i_Initialised == 0) { 2118 if (s_BoardInfos[dev->minor].i_Initialised == 0) {
@@ -2502,61 +2211,18 @@ int i_APCI3200_InsnBits_AnalogInput_Test(struct comedi_device *dev,
2502 return insn->n; 2211 return insn->n;
2503} 2212}
2504 2213
2505/* 2214static int i_APCI3200_InsnWriteReleaseAnalogInput(struct comedi_device *dev,
2506 +----------------------------------------------------------------------------+ 2215 struct comedi_subdevice *s,
2507 | Function Name : int i_APCI3200_InsnWriteReleaseAnalogInput | 2216 struct comedi_insn *insn,
2508 | (struct comedi_device *dev,struct comedi_subdevice *s, | 2217 unsigned int *data)
2509 | struct comedi_insn *insn,unsigned int *data) |
2510 +----------------------------------------------------------------------------+
2511 | Task : Resets the channels |
2512 +----------------------------------------------------------------------------+
2513 | Input Parameters : struct comedi_device *dev : Driver handle |
2514 | struct comedi_subdevice *s : Subdevice Pointer |
2515 | struct comedi_insn *insn : Insn Structure Pointer |
2516 | unsigned int *data : Data Pointer
2517 +----------------------------------------------------------------------------+
2518 | Output Parameters : -- |
2519
2520 +----------------------------------------------------------------------------+
2521 | Return Value : TRUE : No error occur |
2522 | : FALSE : Error occur. Return the error |
2523 | |
2524 +----------------------------------------------------------------------------+
2525*/
2526
2527int i_APCI3200_InsnWriteReleaseAnalogInput(struct comedi_device *dev,
2528 struct comedi_subdevice *s, struct comedi_insn *insn, unsigned int *data)
2529{ 2218{
2530 i_APCI3200_Reset(dev); 2219 i_APCI3200_Reset(dev);
2531 return insn->n; 2220 return insn->n;
2532} 2221}
2533 2222
2534/* 2223static int i_APCI3200_CommandTestAnalogInput(struct comedi_device *dev,
2535 +----------------------------------------------------------------------------+ 2224 struct comedi_subdevice *s,
2536 | Function name :int i_APCI3200_CommandTestAnalogInput(struct comedi_device *dev| 2225 struct comedi_cmd *cmd)
2537 | ,struct comedi_subdevice *s,struct comedi_cmd *cmd) |
2538 | |
2539 +----------------------------------------------------------------------------+
2540 | Task : Test validity for a command for cyclic anlog input |
2541 | acquisition |
2542 | |
2543 +----------------------------------------------------------------------------+
2544 | Input Parameters : struct comedi_device *dev |
2545 | struct comedi_subdevice *s |
2546 | struct comedi_cmd *cmd |
2547 | |
2548 |
2549 | |
2550 | |
2551 | |
2552 +----------------------------------------------------------------------------+
2553 | Return Value :0 |
2554 | |
2555 +----------------------------------------------------------------------------+
2556*/
2557
2558int i_APCI3200_CommandTestAnalogInput(struct comedi_device *dev, struct comedi_subdevice *s,
2559 struct comedi_cmd *cmd)
2560{ 2226{
2561 2227
2562 int err = 0; 2228 int err = 0;
@@ -2716,27 +2382,12 @@ int i_APCI3200_CommandTestAnalogInput(struct comedi_device *dev, struct comedi_s
2716 return 0; 2382 return 0;
2717} 2383}
2718 2384
2719/* 2385static int i_APCI3200_StopCyclicAcquisition(struct comedi_device *dev,
2720 +----------------------------------------------------------------------------+ 2386 struct comedi_subdevice *s)
2721 | Function name :int i_APCI3200_StopCyclicAcquisition(struct comedi_device *dev,|
2722 | struct comedi_subdevice *s)|
2723 | |
2724 +----------------------------------------------------------------------------+
2725 | Task : Stop the acquisition |
2726 | |
2727 +----------------------------------------------------------------------------+
2728 | Input Parameters : struct comedi_device *dev |
2729 | struct comedi_subdevice *s |
2730 | |
2731 +----------------------------------------------------------------------------+
2732 | Return Value :0 |
2733 | |
2734 +----------------------------------------------------------------------------+
2735*/
2736
2737int i_APCI3200_StopCyclicAcquisition(struct comedi_device *dev, struct comedi_subdevice *s)
2738{ 2387{
2388 struct addi_private *devpriv = dev->private;
2739 unsigned int ui_Configuration = 0; 2389 unsigned int ui_Configuration = 0;
2390
2740 /* i_InterruptFlag=0; */ 2391 /* i_InterruptFlag=0; */
2741 /* i_Initialised=0; */ 2392 /* i_Initialised=0; */
2742 /* i_Count=0; */ 2393 /* i_Count=0; */
@@ -2765,27 +2416,13 @@ int i_APCI3200_StopCyclicAcquisition(struct comedi_device *dev, struct comedi_su
2765} 2416}
2766 2417
2767/* 2418/*
2768 +----------------------------------------------------------------------------+ 2419 * Does asynchronous acquisition
2769 | Function name : int i_APCI3200_CommandAnalogInput(struct comedi_device *dev, | 2420 * Determines the mode 1 or 2.
2770 | struct comedi_subdevice *s) | 2421 */
2771 | | 2422static int i_APCI3200_CommandAnalogInput(struct comedi_device *dev,
2772 +----------------------------------------------------------------------------+ 2423 struct comedi_subdevice *s)
2773 | Task : Does asynchronous acquisition |
2774 | Determines the mode 1 or 2. |
2775 | |
2776 +----------------------------------------------------------------------------+
2777 | Input Parameters : struct comedi_device *dev |
2778 | struct comedi_subdevice *s |
2779 | |
2780 | |
2781 +----------------------------------------------------------------------------+
2782 | Return Value : |
2783 | |
2784 +----------------------------------------------------------------------------+
2785*/
2786
2787int i_APCI3200_CommandAnalogInput(struct comedi_device *dev, struct comedi_subdevice *s)
2788{ 2424{
2425 struct addi_private *devpriv = dev->private;
2789 struct comedi_cmd *cmd = &s->async->cmd; 2426 struct comedi_cmd *cmd = &s->async->cmd;
2790 unsigned int ui_Configuration = 0; 2427 unsigned int ui_Configuration = 0;
2791 /* INT i_CurrentSource = 0; */ 2428 /* INT i_CurrentSource = 0; */
@@ -2798,6 +2435,7 @@ int i_APCI3200_CommandAnalogInput(struct comedi_device *dev, struct comedi_subde
2798 unsigned int ui_DelayTime = 0; 2435 unsigned int ui_DelayTime = 0;
2799 unsigned int ui_DelayTimeBase = 0; 2436 unsigned int ui_DelayTimeBase = 0;
2800 unsigned int ui_DelayMode = 0; 2437 unsigned int ui_DelayMode = 0;
2438
2801 /* i_FirstChannel=cmd->chanlist[0]; */ 2439 /* i_FirstChannel=cmd->chanlist[0]; */
2802 /* i_LastChannel=cmd->chanlist[1]; */ 2440 /* i_LastChannel=cmd->chanlist[1]; */
2803 s_BoardInfos[dev->minor].i_FirstChannel = cmd->chanlist[0]; 2441 s_BoardInfos[dev->minor].i_FirstChannel = cmd->chanlist[0];
@@ -2956,80 +2594,155 @@ int i_APCI3200_CommandAnalogInput(struct comedi_device *dev, struct comedi_subde
2956} 2594}
2957 2595
2958/* 2596/*
2959 +----------------------------------------------------------------------------+ 2597 * This function copies the acquired data(from FIFO) to Comedi buffer.
2960 | Function Name : int i_APCI3200_Reset(struct comedi_device *dev) | 2598 */
2961 | | 2599static int i_APCI3200_InterruptHandleEos(struct comedi_device *dev)
2962 +----------------------------------------------------------------------------+
2963 | Task :Resets the registers of the card |
2964 +----------------------------------------------------------------------------+
2965 | Input Parameters : |
2966 +----------------------------------------------------------------------------+
2967 | Output Parameters : -- |
2968 +----------------------------------------------------------------------------+
2969 | Return Value : |
2970 | |
2971 +----------------------------------------------------------------------------+
2972*/
2973
2974int i_APCI3200_Reset(struct comedi_device *dev)
2975{ 2600{
2976 int i_Temp; 2601 struct addi_private *devpriv = dev->private;
2977 unsigned int dw_Dummy; 2602 unsigned int ui_StatusRegister = 0;
2978 /* i_InterruptFlag=0; */ 2603 struct comedi_subdevice *s = &dev->subdevices[0];
2979 /* i_Initialised==0; */
2980 /* i_Count=0; */
2981 /* i_Sum=0; */
2982 2604
2983 s_BoardInfos[dev->minor].i_InterruptFlag = 0; 2605 /* BEGIN JK 18.10.2004: APCI-3200 Driver update 0.7.57 -> 0.7.68 */
2984 s_BoardInfos[dev->minor].i_Initialised = 0; 2606 /* comedi_async *async = s->async; */
2985 s_BoardInfos[dev->minor].i_Count = 0; 2607 /* UINT *data; */
2986 s_BoardInfos[dev->minor].i_Sum = 0; 2608 /* data=async->data+async->buf_int_ptr;//new samples added from here onwards */
2987 s_BoardInfos[dev->minor].b_StructInitialized = 0; 2609 int n = 0, i = 0;
2610 /* END JK 18.10.2004: APCI-3200 Driver update 0.7.57 -> 0.7.68 */
2988 2611
2989 outl(0x83838383, devpriv->i_IobaseAmcc + 0x60); 2612 /************************************/
2613 /*Read the interrupt status register */
2614 /************************************/
2615 /* ui_StatusRegister = inl(devpriv->iobase+i_Offset + 16); */
2616 ui_StatusRegister =
2617 inl(devpriv->iobase + s_BoardInfos[dev->minor].i_Offset + 16);
2990 2618
2991 /* Enable the interrupt for the controller */ 2619 /*************************/
2992 dw_Dummy = inl(devpriv->i_IobaseAmcc + 0x38); 2620 /*Test if interrupt occur */
2993 outl(dw_Dummy | 0x2000, devpriv->i_IobaseAmcc + 0x38); 2621 /*************************/
2994 outl(0, devpriv->i_IobaseAddon); /* Resets the output */ 2622
2995 /***************/ 2623 if ((ui_StatusRegister & 0x2) == 0x2) {
2996 /*Empty the buffer */ 2624 /*************************/
2997 /**************/ 2625 /*Read the channel number */
2998 for (i_Temp = 0; i_Temp <= 95; i_Temp++) { 2626 /*************************/
2999 /* ui_InterruptChannelValue[i_Temp]=0; */ 2627 /* ui_ChannelNumber = inl(devpriv->iobase+i_Offset + 24); */
3000 s_BoardInfos[dev->minor].ui_InterruptChannelValue[i_Temp] = 0; 2628 /* BEGIN JK 18.10.2004: APCI-3200 Driver update 0.7.57 -> 0.7.68 */
3001 } /* for(i_Temp=0;i_Temp<=95;i_Temp++) */ 2629 /* This value is not used */
3002 /*****************************/ 2630 /* ui_ChannelNumber = inl(devpriv->iobase+s_BoardInfos [dev->minor].i_Offset + 24); */
3003 /*Reset the START and IRQ bit */ 2631 s->async->events = 0;
3004 /*****************************/ 2632 /* END JK 18.10.2004: APCI-3200 Driver update 0.7.57 -> 0.7.68 */
3005 for (i_Temp = 0; i_Temp <= 192;) { 2633
3006 while (((inl(devpriv->iobase + i_Temp + 12) >> 19) & 1) != 1) ; 2634 /*************************************/
3007 outl(0, devpriv->iobase + i_Temp + 8); 2635 /*Read the digital Analog Input value */
3008 i_Temp = i_Temp + 64; 2636 /*************************************/
3009 } /* for(i_Temp=0;i_Temp<=192;i_Temp+64) */ 2637
2638 /* data[i_Count] = inl(devpriv->iobase+i_Offset + 28); */
2639 /* Begin JK 18.10.2004: APCI-3200 Driver update 0.7.57 -> 0.7.68 */
2640 /* data[s_BoardInfos [dev->minor].i_Count] = inl(devpriv->iobase+s_BoardInfos [dev->minor].i_Offset + 28); */
2641 s_BoardInfos[dev->minor].ui_ScanValueArray[s_BoardInfos[dev->
2642 minor].i_Count] =
2643 inl(devpriv->iobase +
2644 s_BoardInfos[dev->minor].i_Offset + 28);
2645 /* End JK 18.10.2004: APCI-3200 Driver update 0.7.57 -> 0.7.68 */
2646
2647 /* if((i_Count == (i_LastChannel-i_FirstChannel+3))) */
2648 if ((s_BoardInfos[dev->minor].i_Count ==
2649 (s_BoardInfos[dev->minor].i_LastChannel -
2650 s_BoardInfos[dev->minor].
2651 i_FirstChannel + 3))) {
2652
2653 /* Begin JK 22.10.2004: APCI-3200 / APCI-3300 Reading of EEPROM values */
2654 s_BoardInfos[dev->minor].i_Count++;
2655
2656 for (i = s_BoardInfos[dev->minor].i_FirstChannel;
2657 i <= s_BoardInfos[dev->minor].i_LastChannel;
2658 i++) {
2659 i_APCI3200_GetChannelCalibrationValue(dev, i,
2660 &s_BoardInfos[dev->minor].
2661 ui_ScanValueArray[s_BoardInfos[dev->
2662 minor].i_Count + ((i -
2663 s_BoardInfos
2664 [dev->minor].
2665 i_FirstChannel)
2666 * 3)],
2667 &s_BoardInfos[dev->minor].
2668 ui_ScanValueArray[s_BoardInfos[dev->
2669 minor].i_Count + ((i -
2670 s_BoardInfos
2671 [dev->minor].
2672 i_FirstChannel)
2673 * 3) + 1],
2674 &s_BoardInfos[dev->minor].
2675 ui_ScanValueArray[s_BoardInfos[dev->
2676 minor].i_Count + ((i -
2677 s_BoardInfos
2678 [dev->minor].
2679 i_FirstChannel)
2680 * 3) + 2]);
2681 }
2682
2683 /* End JK 22.10.2004: APCI-3200 / APCI-3300 Reading of EEPROM values */
2684
2685 /* i_Count=-1; */
2686
2687 s_BoardInfos[dev->minor].i_Count = -1;
2688
2689 /* async->buf_int_count+=(i_LastChannel-i_FirstChannel+4)*sizeof(unsigned int); */
2690 /* Begin JK 18.10.2004: APCI-3200 Driver update 0.7.57 -> 0.7.68 */
2691 /* async->buf_int_count+=(s_BoardInfos [dev->minor].i_LastChannel-s_BoardInfos [dev->minor].i_FirstChannel+4)*sizeof(unsigned int); */
2692 /* End JK 18.10.2004: APCI-3200 Driver update 0.7.57 -> 0.7.68 */
2693 /* async->buf_int_ptr+=(i_LastChannel-i_FirstChannel+4)*sizeof(unsigned int); */
2694 /* Begin JK 18.10.2004: APCI-3200 Driver update 0.7.57 -> 0.7.68 */
2695 /* async->buf_int_ptr+=(s_BoardInfos [dev->minor].i_LastChannel-s_BoardInfos [dev->minor].i_FirstChannel+4)*sizeof(unsigned int); */
2696 /* comedi_eos(dev,s); */
2697
2698 /* Set the event type (Comedi Buffer End Of Scan) */
2699 s->async->events |= COMEDI_CB_EOS;
2700
2701 /* Test if enougth memory is available and allocate it for 7 values */
2702 /* n = comedi_buf_write_alloc(s->async, 7*sizeof(unsigned int)); */
2703 n = comedi_buf_write_alloc(s->async,
2704 (7 + 12) * sizeof(unsigned int));
2705
2706 /* If not enough memory available, event is set to Comedi Buffer Error */
2707 if (n > ((7 + 12) * sizeof(unsigned int))) {
2708 printk("\ncomedi_buf_write_alloc n = %i", n);
2709 s->async->events |= COMEDI_CB_ERROR;
2710 }
2711 /* Write all 7 scan values in the comedi buffer */
2712 comedi_buf_memcpy_to(s->async, 0,
2713 (unsigned int *) s_BoardInfos[dev->minor].
2714 ui_ScanValueArray, (7 + 12) * sizeof(unsigned int));
2715
2716 /* Update comedi buffer pinters indexes */
2717 comedi_buf_write_free(s->async,
2718 (7 + 12) * sizeof(unsigned int));
2719
2720 /* Send events */
2721 comedi_event(dev, s);
2722 /* End JK 18.10.2004: APCI-3200 Driver update 0.7.57 -> 0.7.68 */
2723
2724 /* BEGIN JK 18.10.2004: APCI-3200 Driver update 0.7.57 -> 0.7.68 */
2725 /* */
2726 /* if (s->async->buf_int_ptr>=s->async->data_len) // for buffer rool over */
2727 /* { */
2728 /* /* buffer rollover */ */
2729 /* s->async->buf_int_ptr=0; */
2730 /* comedi_eobuf(dev,s); */
2731 /* } */
2732 /* End JK 18.10.2004: APCI-3200 Driver update 0.7.57 -> 0.7.68 */
2733 }
2734 /* i_Count++; */
2735 s_BoardInfos[dev->minor].i_Count++;
2736 }
2737 /* i_InterruptFlag=0; */
2738 s_BoardInfos[dev->minor].i_InterruptFlag = 0;
3010 return 0; 2739 return 0;
3011} 2740}
3012 2741
3013/* 2742static void v_APCI3200_Interrupt(int irq, void *d)
3014 +----------------------------------------------------------------------------+
3015 | Function Name : static void v_APCI3200_Interrupt |
3016 | (int irq , void *d) |
3017 +----------------------------------------------------------------------------+
3018 | Task : Interrupt processing Routine |
3019 +----------------------------------------------------------------------------+
3020 | Input Parameters : int irq : irq number |
3021 | void *d : void pointer |
3022 +----------------------------------------------------------------------------+
3023 | Output Parameters : -- |
3024 +----------------------------------------------------------------------------+
3025 | Return Value : TRUE : No error occur |
3026 | : FALSE : Error occur. Return the error |
3027 | |
3028 +----------------------------------------------------------------------------+
3029*/
3030void v_APCI3200_Interrupt(int irq, void *d)
3031{ 2743{
3032 struct comedi_device *dev = d; 2744 struct comedi_device *dev = d;
2745 struct addi_private *devpriv = dev->private;
3033 unsigned int ui_StatusRegister = 0; 2746 unsigned int ui_StatusRegister = 0;
3034 unsigned int ui_ChannelNumber = 0; 2747 unsigned int ui_ChannelNumber = 0;
3035 int i_CalibrationFlag = 0; 2748 int i_CalibrationFlag = 0;
@@ -3038,7 +2751,6 @@ void v_APCI3200_Interrupt(int irq, void *d)
3038 unsigned int ui_DigitalTemperature = 0; 2751 unsigned int ui_DigitalTemperature = 0;
3039 unsigned int ui_DigitalInput = 0; 2752 unsigned int ui_DigitalInput = 0;
3040 int i_ConvertCJCCalibration; 2753 int i_ConvertCJCCalibration;
3041
3042 /* BEGIN JK TEST */ 2754 /* BEGIN JK TEST */
3043 int i_ReturnValue = 0; 2755 int i_ReturnValue = 0;
3044 /* END JK TEST */ 2756 /* END JK TEST */
@@ -3449,164 +3161,3 @@ void v_APCI3200_Interrupt(int irq, void *d)
3449 } /* switch(i_ScanType) */ 3161 } /* switch(i_ScanType) */
3450 return; 3162 return;
3451} 3163}
3452
3453/*
3454 +----------------------------------------------------------------------------+
3455 | Function name :int i_APCI3200_InterruptHandleEos(struct comedi_device *dev) |
3456 | |
3457 | |
3458 +----------------------------------------------------------------------------+
3459 | Task : . |
3460 | This function copies the acquired data(from FIFO) |
3461 | to Comedi buffer. |
3462 | |
3463 +----------------------------------------------------------------------------+
3464 | Input Parameters : struct comedi_device *dev |
3465 | |
3466 | |
3467 +----------------------------------------------------------------------------+
3468 | Return Value : 0 |
3469 | |
3470 +----------------------------------------------------------------------------+
3471*/
3472int i_APCI3200_InterruptHandleEos(struct comedi_device *dev)
3473{
3474 unsigned int ui_StatusRegister = 0;
3475 struct comedi_subdevice *s = &dev->subdevices[0];
3476
3477 /* BEGIN JK 18.10.2004: APCI-3200 Driver update 0.7.57 -> 0.7.68 */
3478 /* comedi_async *async = s->async; */
3479 /* UINT *data; */
3480 /* data=async->data+async->buf_int_ptr;//new samples added from here onwards */
3481 int n = 0, i = 0;
3482 /* END JK 18.10.2004: APCI-3200 Driver update 0.7.57 -> 0.7.68 */
3483
3484 /************************************/
3485 /*Read the interrupt status register */
3486 /************************************/
3487 /* ui_StatusRegister = inl(devpriv->iobase+i_Offset + 16); */
3488 ui_StatusRegister =
3489 inl(devpriv->iobase + s_BoardInfos[dev->minor].i_Offset + 16);
3490
3491 /*************************/
3492 /*Test if interrupt occur */
3493 /*************************/
3494
3495 if ((ui_StatusRegister & 0x2) == 0x2) {
3496 /*************************/
3497 /*Read the channel number */
3498 /*************************/
3499 /* ui_ChannelNumber = inl(devpriv->iobase+i_Offset + 24); */
3500 /* BEGIN JK 18.10.2004: APCI-3200 Driver update 0.7.57 -> 0.7.68 */
3501 /* This value is not used */
3502 /* ui_ChannelNumber = inl(devpriv->iobase+s_BoardInfos [dev->minor].i_Offset + 24); */
3503 s->async->events = 0;
3504 /* END JK 18.10.2004: APCI-3200 Driver update 0.7.57 -> 0.7.68 */
3505
3506 /*************************************/
3507 /*Read the digital Analog Input value */
3508 /*************************************/
3509
3510 /* data[i_Count] = inl(devpriv->iobase+i_Offset + 28); */
3511 /* Begin JK 18.10.2004: APCI-3200 Driver update 0.7.57 -> 0.7.68 */
3512 /* data[s_BoardInfos [dev->minor].i_Count] = inl(devpriv->iobase+s_BoardInfos [dev->minor].i_Offset + 28); */
3513 s_BoardInfos[dev->minor].ui_ScanValueArray[s_BoardInfos[dev->
3514 minor].i_Count] =
3515 inl(devpriv->iobase +
3516 s_BoardInfos[dev->minor].i_Offset + 28);
3517 /* End JK 18.10.2004: APCI-3200 Driver update 0.7.57 -> 0.7.68 */
3518
3519 /* if((i_Count == (i_LastChannel-i_FirstChannel+3))) */
3520 if ((s_BoardInfos[dev->minor].i_Count ==
3521 (s_BoardInfos[dev->minor].i_LastChannel -
3522 s_BoardInfos[dev->minor].
3523 i_FirstChannel + 3))) {
3524
3525 /* Begin JK 22.10.2004: APCI-3200 / APCI-3300 Reading of EEPROM values */
3526 s_BoardInfos[dev->minor].i_Count++;
3527
3528 for (i = s_BoardInfos[dev->minor].i_FirstChannel;
3529 i <= s_BoardInfos[dev->minor].i_LastChannel;
3530 i++) {
3531 i_APCI3200_GetChannelCalibrationValue(dev, i,
3532 &s_BoardInfos[dev->minor].
3533 ui_ScanValueArray[s_BoardInfos[dev->
3534 minor].i_Count + ((i -
3535 s_BoardInfos
3536 [dev->minor].
3537 i_FirstChannel)
3538 * 3)],
3539 &s_BoardInfos[dev->minor].
3540 ui_ScanValueArray[s_BoardInfos[dev->
3541 minor].i_Count + ((i -
3542 s_BoardInfos
3543 [dev->minor].
3544 i_FirstChannel)
3545 * 3) + 1],
3546 &s_BoardInfos[dev->minor].
3547 ui_ScanValueArray[s_BoardInfos[dev->
3548 minor].i_Count + ((i -
3549 s_BoardInfos
3550 [dev->minor].
3551 i_FirstChannel)
3552 * 3) + 2]);
3553 }
3554
3555 /* End JK 22.10.2004: APCI-3200 / APCI-3300 Reading of EEPROM values */
3556
3557 /* i_Count=-1; */
3558
3559 s_BoardInfos[dev->minor].i_Count = -1;
3560
3561 /* async->buf_int_count+=(i_LastChannel-i_FirstChannel+4)*sizeof(unsigned int); */
3562 /* Begin JK 18.10.2004: APCI-3200 Driver update 0.7.57 -> 0.7.68 */
3563 /* async->buf_int_count+=(s_BoardInfos [dev->minor].i_LastChannel-s_BoardInfos [dev->minor].i_FirstChannel+4)*sizeof(unsigned int); */
3564 /* End JK 18.10.2004: APCI-3200 Driver update 0.7.57 -> 0.7.68 */
3565 /* async->buf_int_ptr+=(i_LastChannel-i_FirstChannel+4)*sizeof(unsigned int); */
3566 /* Begin JK 18.10.2004: APCI-3200 Driver update 0.7.57 -> 0.7.68 */
3567 /* async->buf_int_ptr+=(s_BoardInfos [dev->minor].i_LastChannel-s_BoardInfos [dev->minor].i_FirstChannel+4)*sizeof(unsigned int); */
3568 /* comedi_eos(dev,s); */
3569
3570 /* Set the event type (Comedi Buffer End Of Scan) */
3571 s->async->events |= COMEDI_CB_EOS;
3572
3573 /* Test if enougth memory is available and allocate it for 7 values */
3574 /* n = comedi_buf_write_alloc(s->async, 7*sizeof(unsigned int)); */
3575 n = comedi_buf_write_alloc(s->async,
3576 (7 + 12) * sizeof(unsigned int));
3577
3578 /* If not enough memory available, event is set to Comedi Buffer Error */
3579 if (n > ((7 + 12) * sizeof(unsigned int))) {
3580 printk("\ncomedi_buf_write_alloc n = %i", n);
3581 s->async->events |= COMEDI_CB_ERROR;
3582 }
3583 /* Write all 7 scan values in the comedi buffer */
3584 comedi_buf_memcpy_to(s->async, 0,
3585 (unsigned int *) s_BoardInfos[dev->minor].
3586 ui_ScanValueArray, (7 + 12) * sizeof(unsigned int));
3587
3588 /* Update comedi buffer pinters indexes */
3589 comedi_buf_write_free(s->async,
3590 (7 + 12) * sizeof(unsigned int));
3591
3592 /* Send events */
3593 comedi_event(dev, s);
3594 /* End JK 18.10.2004: APCI-3200 Driver update 0.7.57 -> 0.7.68 */
3595
3596 /* BEGIN JK 18.10.2004: APCI-3200 Driver update 0.7.57 -> 0.7.68 */
3597 /* */
3598 /* if (s->async->buf_int_ptr>=s->async->data_len) // for buffer rool over */
3599 /* { */
3600 /* /* buffer rollover */ */
3601 /* s->async->buf_int_ptr=0; */
3602 /* comedi_eobuf(dev,s); */
3603 /* } */
3604 /* End JK 18.10.2004: APCI-3200 Driver update 0.7.57 -> 0.7.68 */
3605 }
3606 /* i_Count++; */
3607 s_BoardInfos[dev->minor].i_Count++;
3608 }
3609 /* i_InterruptFlag=0; */
3610 s_BoardInfos[dev->minor].i_InterruptFlag = 0;
3611 return 0;
3612}
diff --git a/drivers/staging/comedi/drivers/addi-data/hwdrv_apci3200.h b/drivers/staging/comedi/drivers/addi-data/hwdrv_apci3200.h
deleted file mode 100644
index 812a9c46e119..000000000000
--- a/drivers/staging/comedi/drivers/addi-data/hwdrv_apci3200.h
+++ /dev/null
@@ -1,191 +0,0 @@
1/*
2 * Copyright (C) 2004,2005 ADDI-DATA GmbH for the source code of this module.
3 *
4 * ADDI-DATA GmbH
5 * Dieselstrasse 3
6 * D-77833 Ottersweier
7 * Tel: +19(0)7223/9493-0
8 * Fax: +49(0)7223/9493-92
9 * http://www.addi-data.com
10 * info@addi-data.com
11 *
12 * This program is free software; you can redistribute it and/or modify it
13 * under the terms of the GNU General Public License as published by the Free
14 * Software Foundation; either version 2 of the License, or (at your option)
15 * any later version.
16 */
17
18/* Card Specific information */
19#define APCI3200_BOARD_VENDOR_ID 0x15B8
20/* #define APCI3200_ADDRESS_RANGE 264 */
21
22int MODULE_NO;
23struct {
24 int i_Gain;
25 int i_Polarity;
26 int i_OffsetRange;
27 int i_Coupling;
28 int i_SingleDiff;
29 int i_AutoCalibration;
30 unsigned int ui_ReloadValue;
31 unsigned int ui_TimeUnitReloadVal;
32 int i_Interrupt;
33 int i_ModuleSelection;
34} Config_Parameters_Module1, Config_Parameters_Module2,
35 Config_Parameters_Module3, Config_Parameters_Module4;
36
37/* ANALOG INPUT RANGE */
38static const struct comedi_lrange range_apci3200_ai = { 8, {
39 BIP_RANGE(10),
40 BIP_RANGE(5),
41 BIP_RANGE(2),
42 BIP_RANGE(1),
43 UNI_RANGE(10),
44 UNI_RANGE(5),
45 UNI_RANGE(2),
46 UNI_RANGE(1)
47 }
48};
49
50static const struct comedi_lrange range_apci3300_ai = { 4, {
51 UNI_RANGE(10),
52 UNI_RANGE(5),
53 UNI_RANGE(2),
54 UNI_RANGE(1)
55 }
56};
57
58/* Analog Input related Defines */
59#define APCI3200_AI_OFFSET_GAIN 0
60#define APCI3200_AI_SC_TEST 4
61#define APCI3200_AI_IRQ 8
62#define APCI3200_AI_AUTOCAL 12
63#define APCI3200_RELOAD_CONV_TIME_VAL 32
64#define APCI3200_CONV_TIME_TIME_BASE 36
65#define APCI3200_RELOAD_DELAY_TIME_VAL 40
66#define APCI3200_DELAY_TIME_TIME_BASE 44
67#define APCI3200_AI_MODULE1 0
68#define APCI3200_AI_MODULE2 64
69#define APCI3200_AI_MODULE3 128
70#define APCI3200_AI_MODULE4 192
71#define TRUE 1
72#define FALSE 0
73#define APCI3200_AI_EOSIRQ 16
74#define APCI3200_AI_EOS 20
75#define APCI3200_AI_CHAN_ID 24
76#define APCI3200_AI_CHAN_VAL 28
77#define ANALOG_INPUT 0
78#define TEMPERATURE 1
79#define RESISTANCE 2
80
81#define ENABLE_EXT_TRIG 1
82#define ENABLE_EXT_GATE 2
83#define ENABLE_EXT_TRIG_GATE 3
84
85#define APCI3200_MAXVOLT 2.5
86#define ADDIDATA_GREATER_THAN_TEST 0
87#define ADDIDATA_LESS_THAN_TEST 1
88
89#define ADDIDATA_UNIPOLAR 1
90#define ADDIDATA_BIPOLAR 2
91
92/* BEGIN JK 21.10.2004: APCI-3200 / APCI-3300 Reading of EEPROM values */
93#define MAX_MODULE 4
94/* END JK 21.10.2004: APCI-3200 / APCI-3300 Reading of EEPROM values */
95
96struct str_ADDIDATA_RTDStruct {
97 unsigned int ul_NumberOfValue;
98 unsigned int *pul_ResistanceValue;
99 unsigned int *pul_TemperatureValue;
100};
101
102/* BEGIN JK 21.10.2004: APCI-3200 / APCI-3300 Reading of EEPROM values */
103struct str_Module {
104
105 /* Begin JK 05/08/2003 change for Linux */
106 unsigned long ul_CurrentSourceCJC;
107 unsigned long ul_CurrentSource[5];
108 /* End JK 05/08/2003 change for Linux */
109
110 /* Begin CG 15/02/02 Rev 1.0 -> Rev 1.1 : Add Header Type 1 */
111 unsigned long ul_GainFactor[8]; /* Gain Factor */
112 unsigned int w_GainValue[10];
113 /* End CG 15/02/02 Rev 1.0 -> Rev 1.1 : Add Header Type 1 */
114};
115
116/* END JK 21.10.2004: APCI-3200 / APCI-3300 Reading of EEPROM values */
117
118/* BEGIN JK 06.07.04: Management of sevrals boards */
119struct str_BoardInfos {
120
121 int i_CJCAvailable;
122 int i_CJCPolarity;
123 int i_CJCGain;
124 int i_InterruptFlag;
125 int i_ADDIDATAPolarity;
126 int i_ADDIDATAGain;
127 int i_AutoCalibration;
128 int i_ADDIDATAConversionTime;
129 int i_ADDIDATAConversionTimeUnit;
130 int i_ADDIDATAType;
131 int i_ChannelNo;
132 int i_ChannelCount;
133 int i_ScanType;
134 int i_FirstChannel;
135 int i_LastChannel;
136 int i_Sum;
137 int i_Offset;
138 unsigned int ui_Channel_num;
139 int i_Count;
140 int i_Initialised;
141 /* UINT ui_InterruptChannelValue[96]; //Buffer */
142 unsigned int ui_InterruptChannelValue[144]; /* Buffer */
143 unsigned char b_StructInitialized;
144 /* Begin JK 19.10.2004: APCI-3200 Driver update 0.7.57 -> 0.7.68 */
145 unsigned int ui_ScanValueArray[7 + 12]; /* 7 is the maximal number of channels */
146 /* End JK 19.10.2004: APCI-3200 Driver update 0.7.57 -> 0.7.68 */
147
148 /* Begin JK 21.10.2004: APCI-3200 / APCI-3300 Reading of EEPROM values */
149 int i_ConnectionType;
150 int i_NbrOfModule;
151 struct str_Module s_Module[MAX_MODULE];
152 /* End JK 21.10.2004: APCI-3200 / APCI-3300 Reading of EEPROM values */
153};
154
155/* END JK 06.07.04: Management of sevrals boards */
156
157/* Hardware Layer functions for Apci3200 */
158
159/* AI */
160
161int i_APCI3200_ConfigAnalogInput(struct comedi_device *dev, struct comedi_subdevice *s,
162 struct comedi_insn *insn, unsigned int *data);
163int i_APCI3200_ReadAnalogInput(struct comedi_device *dev, struct comedi_subdevice *s,
164 struct comedi_insn *insn, unsigned int *data);
165int i_APCI3200_InsnWriteReleaseAnalogInput(struct comedi_device *dev,
166 struct comedi_subdevice *s,
167 struct comedi_insn *insn, unsigned int *data);
168int i_APCI3200_InsnBits_AnalogInput_Test(struct comedi_device *dev,
169 struct comedi_subdevice *s,
170 struct comedi_insn *insn, unsigned int *data);
171int i_APCI3200_StopCyclicAcquisition(struct comedi_device *dev, struct comedi_subdevice *s);
172int i_APCI3200_InterruptHandleEos(struct comedi_device *dev);
173int i_APCI3200_CommandTestAnalogInput(struct comedi_device *dev, struct comedi_subdevice *s,
174 struct comedi_cmd *cmd);
175int i_APCI3200_CommandAnalogInput(struct comedi_device *dev, struct comedi_subdevice *s);
176int i_APCI3200_ReadDigitalInput(struct comedi_device *dev, struct comedi_subdevice *s,
177 struct comedi_insn *insn, unsigned int *data);
178/* Interrupt */
179void v_APCI3200_Interrupt(int irq, void *d);
180int i_APCI3200_InterruptHandleEos(struct comedi_device *dev);
181/* Reset functions */
182int i_APCI3200_Reset(struct comedi_device *dev);
183
184int i_APCI3200_ReadCJCCalOffset(struct comedi_device *dev, unsigned int *data);
185int i_APCI3200_ReadCJCValue(struct comedi_device *dev, unsigned int *data);
186int i_APCI3200_ReadCalibrationGainValue(struct comedi_device *dev, unsigned int *data);
187int i_APCI3200_ReadCalibrationOffsetValue(struct comedi_device *dev, unsigned int *data);
188int i_APCI3200_Read1AnalogInputChannel(struct comedi_device *dev,
189 struct comedi_subdevice *s, struct comedi_insn *insn,
190 unsigned int *data);
191int i_APCI3200_ReadCJCCalGain(struct comedi_device *dev, unsigned int *data);
diff --git a/drivers/staging/comedi/drivers/addi-data/hwdrv_apci3501.c b/drivers/staging/comedi/drivers/addi-data/hwdrv_apci3501.c
index acaceb01629a..7a18ce704ba4 100644
--- a/drivers/staging/comedi/drivers/addi-data/hwdrv_apci3501.c
+++ b/drivers/staging/comedi/drivers/addi-data/hwdrv_apci3501.c
@@ -46,229 +46,75 @@ You should also find the complete GPL in the COPYING file accompanying this sour
46 +----------+-----------+------------------------------------------------+ 46 +----------+-----------+------------------------------------------------+
47*/ 47*/
48 48
49/* 49/* Card Specific information */
50+----------------------------------------------------------------------------+ 50#define APCI3501_ADDRESS_RANGE 255
51| Included files | 51
52+----------------------------------------------------------------------------+ 52#define APCI3501_DIGITAL_IP 0x50
53*/ 53#define APCI3501_DIGITAL_OP 0x40
54#include "hwdrv_apci3501.h" 54#define APCI3501_ANALOG_OUTPUT 0x00
55 55
56/* 56/* Analog Output related Defines */
57+----------------------------------------------------------------------------+ 57#define APCI3501_AO_VOLT_MODE 0
58| Function Name : int i_APCI3501_ReadDigitalInput | 58#define APCI3501_AO_PROG 4
59| (struct comedi_device *dev,struct comedi_subdevice *s, | 59#define APCI3501_AO_TRIG_SCS 8
60| struct comedi_insn *insn,unsigned int *data) | 60#define UNIPOLAR 0
61+----------------------------------------------------------------------------+ 61#define BIPOLAR 1
62| Task : Read value of the selected channel or port | 62#define MODE0 0
63+----------------------------------------------------------------------------+ 63#define MODE1 1
64| Input Parameters : struct comedi_device *dev : Driver handle | 64
65| unsigned int ui_NoOfChannels : No Of Channels To read | 65/* Watchdog Related Defines */
66| unsigned int *data : Data Pointer to read status | 66
67+----------------------------------------------------------------------------+ 67#define APCI3501_WATCHDOG 0x20
68| Output Parameters : -- | 68#define APCI3501_TCW_SYNC_ENABLEDISABLE 0
69+----------------------------------------------------------------------------+ 69#define APCI3501_TCW_RELOAD_VALUE 4
70| Return Value : TRUE : No error occur | 70#define APCI3501_TCW_TIMEBASE 8
71| : FALSE : Error occur. Return the error | 71#define APCI3501_TCW_PROG 12
72| | 72#define APCI3501_TCW_TRIG_STATUS 16
73+----------------------------------------------------------------------------+ 73#define APCI3501_TCW_IRQ 20
74*/ 74#define APCI3501_TCW_WARN_TIMEVAL 24
75#define APCI3501_TCW_WARN_TIMEBASE 28
76#define ADDIDATA_TIMER 0
77#define ADDIDATA_WATCHDOG 2
78
79/* ANALOG OUTPUT RANGE */
80static struct comedi_lrange range_apci3501_ao = {
81 2, {
82 BIP_RANGE(10),
83 UNI_RANGE(10)
84 }
85};
75 86
76int i_APCI3501_ReadDigitalInput(struct comedi_device *dev, struct comedi_subdevice *s, 87static int apci3501_di_insn_bits(struct comedi_device *dev,
77 struct comedi_insn *insn, unsigned int *data) 88 struct comedi_subdevice *s,
89 struct comedi_insn *insn,
90 unsigned int *data)
78{ 91{
79 unsigned int ui_Temp; 92 struct addi_private *devpriv = dev->private;
80 unsigned int ui_NoOfChannel;
81 ui_NoOfChannel = CR_CHAN(insn->chanspec);
82 ui_Temp = data[0];
83 *data = inl(devpriv->iobase + APCI3501_DIGITAL_IP);
84 if (ui_Temp == 0) {
85 *data = (*data >> ui_NoOfChannel) & 0x1;
86 } /* if (ui_Temp==0) */
87 else {
88 if (ui_Temp == 1) {
89
90 *data = *data & 0x3;
91 } /* if (ui_Temp==1) */
92 else {
93 printk("\nSpecified channel not supported \n");
94 } /* elseif (ui_Temp==1) */
95 } /* elseif (ui_Temp==0) */
96 return insn->n;
97}
98 93
99/* 94 data[1] = inl(devpriv->iobase + APCI3501_DIGITAL_IP) & 0x3;
100+----------------------------------------------------------------------------+
101| Function Name : int i_APCI3501_ConfigDigitalOutput |
102| (struct comedi_device *dev,struct comedi_subdevice *s, |
103| struct comedi_insn *insn,unsigned int *data) |
104+----------------------------------------------------------------------------+
105| Task : Configures The Digital Output Subdevice. |
106+----------------------------------------------------------------------------+
107| Input Parameters : struct comedi_device *dev : Driver handle |
108| unsigned int *data : Data Pointer contains |
109| configuration parameters as below |
110| |
111| data[1] : 1 Enable VCC Interrupt |
112| 0 Disable VCC Interrupt |
113| data[2] : 1 Enable CC Interrupt |
114| 0 Disable CC Interrupt |
115| |
116+----------------------------------------------------------------------------+
117| Output Parameters : -- |
118+----------------------------------------------------------------------------+
119| Return Value : TRUE : No error occur |
120| : FALSE : Error occur. Return the error |
121| |
122+----------------------------------------------------------------------------+
123*/
124int i_APCI3501_ConfigDigitalOutput(struct comedi_device *dev, struct comedi_subdevice *s,
125 struct comedi_insn *insn, unsigned int *data)
126{
127 95
128 if ((data[0] != 0) && (data[0] != 1)) {
129 comedi_error(dev,
130 "Not a valid Data !!! ,Data should be 1 or 0\n");
131 return -EINVAL;
132 } /* if ( (data[0]!=0) && (data[0]!=1) ) */
133 if (data[0]) {
134 devpriv->b_OutputMemoryStatus = ADDIDATA_ENABLE;
135 } /* if (data[0]) */
136 else {
137 devpriv->b_OutputMemoryStatus = ADDIDATA_DISABLE;
138 } /* else if (data[0]) */
139 return insn->n; 96 return insn->n;
140} 97}
141 98
142/* 99static int apci3501_do_insn_bits(struct comedi_device *dev,
143+----------------------------------------------------------------------------+ 100 struct comedi_subdevice *s,
144| Function Name : int i_APCI3501_WriteDigitalOutput | 101 struct comedi_insn *insn,
145| (struct comedi_device *dev,struct comedi_subdevice *s, | 102 unsigned int *data)
146| struct comedi_insn *insn,unsigned int *data) |
147+----------------------------------------------------------------------------+
148| Task : writes To the digital Output Subdevice |
149+----------------------------------------------------------------------------+
150| Input Parameters : struct comedi_device *dev : Driver handle |
151| struct comedi_subdevice *s : Subdevice Pointer |
152| struct comedi_insn *insn : Insn Structure Pointer |
153| unsigned int *data : Data Pointer contains |
154| configuration parameters as below |
155| |
156+----------------------------------------------------------------------------+
157| Output Parameters : -- |
158+----------------------------------------------------------------------------+
159| Return Value : TRUE : No error occur |
160| : FALSE : Error occur. Return the error |
161| |
162+----------------------------------------------------------------------------+
163*/
164int i_APCI3501_WriteDigitalOutput(struct comedi_device *dev, struct comedi_subdevice *s,
165 struct comedi_insn *insn, unsigned int *data)
166{ 103{
167 unsigned int ui_Temp, ui_Temp1; 104 struct addi_private *devpriv = dev->private;
168 unsigned int ui_NoOfChannel = CR_CHAN(insn->chanspec); /* get the channel */ 105 unsigned int mask = data[0];
169 if (devpriv->b_OutputMemoryStatus) { 106 unsigned int bits = data[1];
170 ui_Temp = inl(devpriv->iobase + APCI3501_DIGITAL_OP); 107
171 } /* if(devpriv->b_OutputMemoryStatus ) */ 108 s->state = inl(devpriv->iobase + APCI3501_DIGITAL_OP);
172 else { 109 if (mask) {
173 ui_Temp = 0; 110 s->state &= ~mask;
174 } /* if(devpriv->b_OutputMemoryStatus ) */ 111 s->state |= (bits & mask);
175 if (data[3] == 0) { 112
176 if (data[1] == 0) { 113 outl(s->state, devpriv->iobase + APCI3501_DIGITAL_OP);
177 data[0] = (data[0] << ui_NoOfChannel) | ui_Temp; 114 }
178 outl(data[0], devpriv->iobase + APCI3501_DIGITAL_OP); 115
179 } /* if(data[1]==0) */ 116 data[1] = s->state;
180 else {
181 if (data[1] == 1) {
182 data[0] = (data[0] << (2 * data[2])) | ui_Temp;
183 outl(data[0],
184 devpriv->iobase + APCI3501_DIGITAL_OP);
185 } /* if(data[1]==1) */
186 else {
187 printk("\nSpecified channel not supported\n");
188 } /* else if(data[1]==1) */
189 } /* elseif(data[1]==0) */
190 } /* if(data[3]==0) */
191 else {
192 if (data[3] == 1) {
193 if (data[1] == 0) {
194 data[0] = ~data[0] & 0x1;
195 ui_Temp1 = 1;
196 ui_Temp1 = ui_Temp1 << ui_NoOfChannel;
197 ui_Temp = ui_Temp | ui_Temp1;
198 data[0] =
199 (data[0] << ui_NoOfChannel) ^
200 0xffffffff;
201 data[0] = data[0] & ui_Temp;
202 outl(data[0],
203 devpriv->iobase + APCI3501_DIGITAL_OP);
204 } /* if(data[1]==0) */
205 else {
206 if (data[1] == 1) {
207 data[0] = ~data[0] & 0x3;
208 ui_Temp1 = 3;
209 ui_Temp1 = ui_Temp1 << 2 * data[2];
210 ui_Temp = ui_Temp | ui_Temp1;
211 data[0] =
212 ((data[0] << (2 *
213 data[2])) ^
214 0xffffffff) & ui_Temp;
215 outl(data[0],
216 devpriv->iobase +
217 APCI3501_DIGITAL_OP);
218 } /* if(data[1]==1) */
219 else {
220 printk("\nSpecified channel not supported\n");
221 } /* else if(data[1]==1) */
222 } /* elseif(data[1]==0) */
223 } /* if(data[3]==1); */
224 else {
225 printk("\nSpecified functionality does not exist\n");
226 return -EINVAL;
227 } /* if else data[3]==1) */
228 } /* if else data[3]==0) */
229 return insn->n;
230}
231 117
232/*
233+----------------------------------------------------------------------------+
234| Function Name : int i_APCI3501_ReadDigitalOutput |
235| (struct comedi_device *dev,struct comedi_subdevice *s, |
236| struct comedi_insn *insn,unsigned int *data) |
237+----------------------------------------------------------------------------+
238| Task : Read value of the selected channel or port |
239+----------------------------------------------------------------------------+
240| Input Parameters : struct comedi_device *dev : Driver handle |
241| unsigned int ui_NoOfChannels : No Of Channels To read |
242| unsigned int *data : Data Pointer to read status |
243+----------------------------------------------------------------------------+
244| Output Parameters : -- |
245+----------------------------------------------------------------------------+
246| Return Value : TRUE : No error occur |
247| : FALSE : Error occur. Return the error |
248| |
249+----------------------------------------------------------------------------+
250*/
251int i_APCI3501_ReadDigitalOutput(struct comedi_device *dev, struct comedi_subdevice *s,
252 struct comedi_insn *insn, unsigned int *data)
253{
254 unsigned int ui_Temp;
255 unsigned int ui_NoOfChannel;
256
257 ui_NoOfChannel = CR_CHAN(insn->chanspec);
258 ui_Temp = data[0];
259 *data = inl(devpriv->iobase + APCI3501_DIGITAL_OP);
260 if (ui_Temp == 0) {
261 *data = (*data >> ui_NoOfChannel) & 0x1;
262 } /* if (ui_Temp==0) */
263 else {
264 if (ui_Temp == 1) {
265 *data = *data & 0x3;
266
267 } /* if (ui_Temp==1) */
268 else {
269 printk("\nSpecified channel not supported \n");
270 } /* else if (ui_Temp==1) */
271 } /* else if (ui_Temp==0) */
272 return insn->n; 118 return insn->n;
273} 119}
274 120
@@ -298,9 +144,13 @@ int i_APCI3501_ReadDigitalOutput(struct comedi_device *dev, struct comedi_subdev
298| | 144| |
299+----------------------------------------------------------------------------+ 145+----------------------------------------------------------------------------+
300*/ 146*/
301int i_APCI3501_ConfigAnalogOutput(struct comedi_device *dev, struct comedi_subdevice *s, 147static int i_APCI3501_ConfigAnalogOutput(struct comedi_device *dev,
302 struct comedi_insn *insn, unsigned int *data) 148 struct comedi_subdevice *s,
149 struct comedi_insn *insn,
150 unsigned int *data)
303{ 151{
152 struct addi_private *devpriv = dev->private;
153
304 outl(data[0], 154 outl(data[0],
305 devpriv->iobase + APCI3501_ANALOG_OUTPUT + 155 devpriv->iobase + APCI3501_ANALOG_OUTPUT +
306 APCI3501_AO_VOLT_MODE); 156 APCI3501_AO_VOLT_MODE);
@@ -336,9 +186,12 @@ int i_APCI3501_ConfigAnalogOutput(struct comedi_device *dev, struct comedi_subde
336| | 186| |
337+----------------------------------------------------------------------------+ 187+----------------------------------------------------------------------------+
338*/ 188*/
339int i_APCI3501_WriteAnalogOutput(struct comedi_device *dev, struct comedi_subdevice *s, 189static int i_APCI3501_WriteAnalogOutput(struct comedi_device *dev,
340 struct comedi_insn *insn, unsigned int *data) 190 struct comedi_subdevice *s,
191 struct comedi_insn *insn,
192 unsigned int *data)
341{ 193{
194 struct addi_private *devpriv = dev->private;
342 unsigned int ul_Command1 = 0, ul_Channel_no, ul_Polarity, ul_DAC_Ready = 0; 195 unsigned int ul_Command1 = 0, ul_Channel_no, ul_Polarity, ul_DAC_Ready = 0;
343 196
344 ul_Channel_no = CR_CHAN(insn->chanspec); 197 ul_Channel_no = CR_CHAN(insn->chanspec);
@@ -410,10 +263,14 @@ int i_APCI3501_WriteAnalogOutput(struct comedi_device *dev, struct comedi_subdev
410| | 263| |
411+----------------------------------------------------------------------------+ 264+----------------------------------------------------------------------------+
412*/ 265*/
413int i_APCI3501_ConfigTimerCounterWatchdog(struct comedi_device *dev, 266static int i_APCI3501_ConfigTimerCounterWatchdog(struct comedi_device *dev,
414 struct comedi_subdevice *s, struct comedi_insn *insn, unsigned int *data) 267 struct comedi_subdevice *s,
268 struct comedi_insn *insn,
269 unsigned int *data)
415{ 270{
271 struct addi_private *devpriv = dev->private;
416 unsigned int ul_Command1 = 0; 272 unsigned int ul_Command1 = 0;
273
417 devpriv->tsk_Current = current; 274 devpriv->tsk_Current = current;
418 if (data[0] == ADDIDATA_WATCHDOG) { 275 if (data[0] == ADDIDATA_WATCHDOG) {
419 276
@@ -511,11 +368,15 @@ int i_APCI3501_ConfigTimerCounterWatchdog(struct comedi_device *dev,
511+----------------------------------------------------------------------------+ 368+----------------------------------------------------------------------------+
512*/ 369*/
513 370
514int i_APCI3501_StartStopWriteTimerCounterWatchdog(struct comedi_device *dev, 371static int i_APCI3501_StartStopWriteTimerCounterWatchdog(struct comedi_device *dev,
515 struct comedi_subdevice *s, struct comedi_insn *insn, unsigned int *data) 372 struct comedi_subdevice *s,
373 struct comedi_insn *insn,
374 unsigned int *data)
516{ 375{
376 struct addi_private *devpriv = dev->private;
517 unsigned int ul_Command1 = 0; 377 unsigned int ul_Command1 = 0;
518 int i_Temp; 378 int i_Temp;
379
519 if (devpriv->b_TimerSelectMode == ADDIDATA_WATCHDOG) { 380 if (devpriv->b_TimerSelectMode == ADDIDATA_WATCHDOG) {
520 381
521 if (data[1] == 1) { 382 if (data[1] == 1) {
@@ -613,9 +474,12 @@ int i_APCI3501_StartStopWriteTimerCounterWatchdog(struct comedi_device *dev,
613+----------------------------------------------------------------------------+ 474+----------------------------------------------------------------------------+
614*/ 475*/
615 476
616int i_APCI3501_ReadTimerCounterWatchdog(struct comedi_device *dev, 477static int i_APCI3501_ReadTimerCounterWatchdog(struct comedi_device *dev,
617 struct comedi_subdevice *s, struct comedi_insn *insn, unsigned int *data) 478 struct comedi_subdevice *s,
479 struct comedi_insn *insn,
480 unsigned int *data)
618{ 481{
482 struct addi_private *devpriv = dev->private;
619 483
620 if (devpriv->b_TimerSelectMode == ADDIDATA_WATCHDOG) { 484 if (devpriv->b_TimerSelectMode == ADDIDATA_WATCHDOG) {
621 data[0] = 485 data[0] =
@@ -654,10 +518,12 @@ int i_APCI3501_ReadTimerCounterWatchdog(struct comedi_device *dev,
654+----------------------------------------------------------------------------+ 518+----------------------------------------------------------------------------+
655*/ 519*/
656 520
657int i_APCI3501_Reset(struct comedi_device *dev) 521static int i_APCI3501_Reset(struct comedi_device *dev)
658{ 522{
523 struct addi_private *devpriv = dev->private;
659 int i_Count = 0, i_temp = 0; 524 int i_Count = 0, i_temp = 0;
660 unsigned int ul_Command1 = 0, ul_Polarity, ul_DAC_Ready = 0; 525 unsigned int ul_Command1 = 0, ul_Polarity, ul_DAC_Ready = 0;
526
661 outl(0x0, devpriv->iobase + APCI3501_DIGITAL_OP); 527 outl(0x0, devpriv->iobase + APCI3501_DIGITAL_OP);
662 outl(1, devpriv->iobase + APCI3501_ANALOG_OUTPUT + 528 outl(1, devpriv->iobase + APCI3501_ANALOG_OUTPUT +
663 APCI3501_AO_VOLT_MODE); 529 APCI3501_AO_VOLT_MODE);
@@ -705,12 +571,14 @@ int i_APCI3501_Reset(struct comedi_device *dev)
705| | 571| |
706+----------------------------------------------------------------------------+ 572+----------------------------------------------------------------------------+
707*/ 573*/
708void v_APCI3501_Interrupt(int irq, void *d) 574static void v_APCI3501_Interrupt(int irq, void *d)
709{ 575{
710 int i_temp; 576 int i_temp;
711 struct comedi_device *dev = d; 577 struct comedi_device *dev = d;
578 struct addi_private *devpriv = dev->private;
712 unsigned int ui_Timer_AOWatchdog; 579 unsigned int ui_Timer_AOWatchdog;
713 unsigned long ul_Command1; 580 unsigned long ul_Command1;
581
714 /* Disable Interrupt */ 582 /* Disable Interrupt */
715 ul_Command1 = 583 ul_Command1 =
716 inl(devpriv->iobase + APCI3501_WATCHDOG + APCI3501_TCW_PROG); 584 inl(devpriv->iobase + APCI3501_WATCHDOG + APCI3501_TCW_PROG);
diff --git a/drivers/staging/comedi/drivers/addi-data/hwdrv_apci3501.h b/drivers/staging/comedi/drivers/addi-data/hwdrv_apci3501.h
deleted file mode 100644
index 63df635a7b68..000000000000
--- a/drivers/staging/comedi/drivers/addi-data/hwdrv_apci3501.h
+++ /dev/null
@@ -1,98 +0,0 @@
1/*
2 * Copyright (C) 2004,2005 ADDI-DATA GmbH for the source code of this module.
3 *
4 * ADDI-DATA GmbH
5 * Dieselstrasse 3
6 * D-77833 Ottersweier
7 * Tel: +19(0)7223/9493-0
8 * Fax: +49(0)7223/9493-92
9 * http://www.addi-data.com
10 * info@addi-data.com
11 *
12 * This program is free software; you can redistribute it and/or modify it
13 * under the terms of the GNU General Public License as published by the Free
14 * Software Foundation; either version 2 of the License, or (at your option)
15 * any later version.
16 */
17
18/* Card Specific information */
19#define APCI3501_BOARD_VENDOR_ID 0x15B8
20#define APCI3501_ADDRESS_RANGE 255
21
22#define APCI3501_DIGITAL_IP 0x50
23#define APCI3501_DIGITAL_OP 0x40
24#define APCI3501_ANALOG_OUTPUT 0x00
25
26/* Analog Output related Defines */
27#define APCI3501_AO_VOLT_MODE 0
28#define APCI3501_AO_PROG 4
29#define APCI3501_AO_TRIG_SCS 8
30#define UNIPOLAR 0
31#define BIPOLAR 1
32#define MODE0 0
33#define MODE1 1
34/* ANALOG OUTPUT RANGE */
35static struct comedi_lrange range_apci3501_ao = { 2, {
36 BIP_RANGE(10),
37 UNI_RANGE(10)
38 }
39};
40
41/* Watchdog Related Defines */
42
43#define APCI3501_WATCHDOG 0x20
44#define APCI3501_TCW_SYNC_ENABLEDISABLE 0
45#define APCI3501_TCW_RELOAD_VALUE 4
46#define APCI3501_TCW_TIMEBASE 8
47#define APCI3501_TCW_PROG 12
48#define APCI3501_TCW_TRIG_STATUS 16
49#define APCI3501_TCW_IRQ 20
50#define APCI3501_TCW_WARN_TIMEVAL 24
51#define APCI3501_TCW_WARN_TIMEBASE 28
52#define ADDIDATA_TIMER 0
53#define ADDIDATA_WATCHDOG 2
54
55/* Hardware Layer functions for Apci3501 */
56
57/* AO */
58int i_APCI3501_ConfigAnalogOutput(struct comedi_device *dev, struct comedi_subdevice *s,
59 struct comedi_insn *insn, unsigned int *data);
60int i_APCI3501_WriteAnalogOutput(struct comedi_device *dev, struct comedi_subdevice *s,
61 struct comedi_insn *insn, unsigned int *data);
62
63/*
64* DI for di read INT i_APCI3501_ReadDigitalInput(struct
65* comedi_device *dev,struct comedi_subdevice *s,struct comedi_insn
66* *insn,unsigned int *data);
67*/
68
69int i_APCI3501_ReadDigitalInput(struct comedi_device *dev, struct comedi_subdevice *s,
70 struct comedi_insn *insn, unsigned int *data);
71
72/* DO */
73int i_APCI3501_ConfigDigitalOutput(struct comedi_device *dev, struct comedi_subdevice *s,
74 struct comedi_insn *insn, unsigned int *data);
75int i_APCI3501_WriteDigitalOutput(struct comedi_device *dev, struct comedi_subdevice *s,
76 struct comedi_insn *insn, unsigned int *data);
77int i_APCI3501_ReadDigitalOutput(struct comedi_device *dev, struct comedi_subdevice *s,
78 struct comedi_insn *insn, unsigned int *data);
79
80/* TIMER
81 * timer value is passed as u seconds
82 */
83
84int i_APCI3501_ConfigTimerCounterWatchdog(struct comedi_device *dev,
85 struct comedi_subdevice *s,
86 struct comedi_insn *insn, unsigned int *data);
87int i_APCI3501_StartStopWriteTimerCounterWatchdog(struct comedi_device *dev,
88 struct comedi_subdevice *s,
89 struct comedi_insn *insn,
90 unsigned int *data);
91int i_APCI3501_ReadTimerCounterWatchdog(struct comedi_device *dev,
92 struct comedi_subdevice *s,
93 struct comedi_insn *insn, unsigned int *data);
94/* Interrupt */
95void v_APCI3501_Interrupt(int irq, void *d);
96
97/* Reset functions */
98int i_APCI3501_Reset(struct comedi_device *dev);
diff --git a/drivers/staging/comedi/drivers/addi-data/hwdrv_apci3xxx.c b/drivers/staging/comedi/drivers/addi-data/hwdrv_apci3xxx.c
index fff99df51e92..a45a2a26e0da 100644
--- a/drivers/staging/comedi/drivers/addi-data/hwdrv_apci3xxx.c
+++ b/drivers/staging/comedi/drivers/addi-data/hwdrv_apci3xxx.c
@@ -44,7 +44,35 @@ You should also find the complete GPL in the COPYING file accompanying this sour
44 +----------+-----------+------------------------------------------------+ 44 +----------+-----------+------------------------------------------------+
45*/ 45*/
46 46
47#include "hwdrv_apci3xxx.h" 47#ifndef COMEDI_SUBD_TTLIO
48#define COMEDI_SUBD_TTLIO 11 /* Digital Input Output But TTL */
49#endif
50
51#define APCI3XXX_SINGLE 0
52#define APCI3XXX_DIFF 1
53#define APCI3XXX_CONFIGURATION 0
54
55#define APCI3XXX_TTL_INIT_DIRECTION_PORT2 0
56
57static const struct comedi_lrange range_apci3XXX_ai = {
58 8, {
59 BIP_RANGE(10),
60 BIP_RANGE(5),
61 BIP_RANGE(2),
62 BIP_RANGE(1),
63 UNI_RANGE(10),
64 UNI_RANGE(5),
65 UNI_RANGE(2),
66 UNI_RANGE(1)
67 }
68};
69
70static const struct comedi_lrange range_apci3XXX_ao = {
71 2, {
72 BIP_RANGE(10),
73 UNI_RANGE(10)
74 }
75};
48 76
49/* 77/*
50+----------------------------------------------------------------------------+ 78+----------------------------------------------------------------------------+
@@ -69,6 +97,8 @@ You should also find the complete GPL in the COPYING file accompanying this sour
69*/ 97*/
70static int i_APCI3XXX_TestConversionStarted(struct comedi_device *dev) 98static int i_APCI3XXX_TestConversionStarted(struct comedi_device *dev)
71{ 99{
100 struct addi_private *devpriv = dev->private;
101
72 if ((readl(devpriv->dw_AiBase + 8) & 0x80000UL) == 0x80000UL) 102 if ((readl(devpriv->dw_AiBase + 8) & 0x80000UL) == 0x80000UL)
73 return 1; 103 return 1;
74 else 104 else
@@ -108,6 +138,8 @@ static int i_APCI3XXX_AnalogInputConfigOperatingMode(struct comedi_device *dev,
108 struct comedi_insn *insn, 138 struct comedi_insn *insn,
109 unsigned int *data) 139 unsigned int *data)
110{ 140{
141 const struct addi_board *this_board = comedi_board(dev);
142 struct addi_private *devpriv = dev->private;
111 int i_ReturnValue = insn->n; 143 int i_ReturnValue = insn->n;
112 unsigned char b_TimeBase = 0; 144 unsigned char b_TimeBase = 0;
113 unsigned char b_SingleDiff = 0; 145 unsigned char b_SingleDiff = 0;
@@ -358,6 +390,8 @@ static int i_APCI3XXX_InsnReadAnalogInput(struct comedi_device *dev,
358 struct comedi_insn *insn, 390 struct comedi_insn *insn,
359 unsigned int *data) 391 unsigned int *data)
360{ 392{
393 const struct addi_board *this_board = comedi_board(dev);
394 struct addi_private *devpriv = dev->private;
361 int i_ReturnValue = insn->n; 395 int i_ReturnValue = insn->n;
362 unsigned char b_Configuration = (unsigned char) CR_RANGE(insn->chanspec); 396 unsigned char b_Configuration = (unsigned char) CR_RANGE(insn->chanspec);
363 unsigned char b_Channel = (unsigned char) CR_CHAN(insn->chanspec); 397 unsigned char b_Channel = (unsigned char) CR_CHAN(insn->chanspec);
@@ -571,6 +605,7 @@ static int i_APCI3XXX_InsnReadAnalogInput(struct comedi_device *dev,
571static void v_APCI3XXX_Interrupt(int irq, void *d) 605static void v_APCI3XXX_Interrupt(int irq, void *d)
572{ 606{
573 struct comedi_device *dev = d; 607 struct comedi_device *dev = d;
608 struct addi_private *devpriv = dev->private;
574 unsigned char b_CopyCpt = 0; 609 unsigned char b_CopyCpt = 0;
575 unsigned int dw_Status = 0; 610 unsigned int dw_Status = 0;
576 611
@@ -651,6 +686,7 @@ static int i_APCI3XXX_InsnWriteAnalogOutput(struct comedi_device *dev,
651 struct comedi_insn *insn, 686 struct comedi_insn *insn,
652 unsigned int *data) 687 unsigned int *data)
653{ 688{
689 struct addi_private *devpriv = dev->private;
654 unsigned char b_Range = (unsigned char) CR_RANGE(insn->chanspec); 690 unsigned char b_Range = (unsigned char) CR_RANGE(insn->chanspec);
655 unsigned char b_Channel = (unsigned char) CR_CHAN(insn->chanspec); 691 unsigned char b_Channel = (unsigned char) CR_CHAN(insn->chanspec);
656 unsigned int dw_Status = 0; 692 unsigned int dw_Status = 0;
@@ -755,6 +791,7 @@ static int i_APCI3XXX_InsnConfigInitTTLIO(struct comedi_device *dev,
755 struct comedi_insn *insn, 791 struct comedi_insn *insn,
756 unsigned int *data) 792 unsigned int *data)
757{ 793{
794 struct addi_private *devpriv = dev->private;
758 int i_ReturnValue = insn->n; 795 int i_ReturnValue = insn->n;
759 unsigned char b_Command = 0; 796 unsigned char b_Command = 0;
760 797
@@ -884,6 +921,7 @@ static int i_APCI3XXX_InsnBitsTTLIO(struct comedi_device *dev,
884 struct comedi_insn *insn, 921 struct comedi_insn *insn,
885 unsigned int *data) 922 unsigned int *data)
886{ 923{
924 struct addi_private *devpriv = dev->private;
887 int i_ReturnValue = insn->n; 925 int i_ReturnValue = insn->n;
888 unsigned char b_ChannelCpt = 0; 926 unsigned char b_ChannelCpt = 0;
889 unsigned int dw_ChannelMask = 0; 927 unsigned int dw_ChannelMask = 0;
@@ -1040,6 +1078,7 @@ static int i_APCI3XXX_InsnReadTTLIO(struct comedi_device *dev,
1040 struct comedi_insn *insn, 1078 struct comedi_insn *insn,
1041 unsigned int *data) 1079 unsigned int *data)
1042{ 1080{
1081 struct addi_private *devpriv = dev->private;
1043 unsigned char b_Channel = (unsigned char) CR_CHAN(insn->chanspec); 1082 unsigned char b_Channel = (unsigned char) CR_CHAN(insn->chanspec);
1044 int i_ReturnValue = insn->n; 1083 int i_ReturnValue = insn->n;
1045 unsigned int *pls_ReadData = data; 1084 unsigned int *pls_ReadData = data;
@@ -1154,6 +1193,7 @@ static int i_APCI3XXX_InsnWriteTTLIO(struct comedi_device *dev,
1154 struct comedi_insn *insn, 1193 struct comedi_insn *insn,
1155 unsigned int *data) 1194 unsigned int *data)
1156{ 1195{
1196 struct addi_private *devpriv = dev->private;
1157 int i_ReturnValue = insn->n; 1197 int i_ReturnValue = insn->n;
1158 unsigned char b_Channel = (unsigned char) CR_CHAN(insn->chanspec); 1198 unsigned char b_Channel = (unsigned char) CR_CHAN(insn->chanspec);
1159 unsigned char b_State = 0; 1199 unsigned char b_State = 0;
@@ -1236,367 +1276,38 @@ static int i_APCI3XXX_InsnWriteTTLIO(struct comedi_device *dev,
1236 return i_ReturnValue; 1276 return i_ReturnValue;
1237} 1277}
1238 1278
1239/* 1279static int apci3xxx_di_insn_bits(struct comedi_device *dev,
1240+----------------------------------------------------------------------------+ 1280 struct comedi_subdevice *s,
1241| DIGITAL INPUT SUBDEVICE | 1281 struct comedi_insn *insn,
1242+----------------------------------------------------------------------------+ 1282 unsigned int *data)
1243*/
1244
1245/*
1246+----------------------------------------------------------------------------+
1247| Function name :int i_APCI3XXX_InsnReadDigitalInput |
1248| (struct comedi_device *dev, |
1249| struct comedi_subdevice *s, |
1250| struct comedi_insn *insn, |
1251| unsigned int *data) |
1252+----------------------------------------------------------------------------+
1253| Task : Reads the value of the specified Digital input channel |
1254+----------------------------------------------------------------------------+
1255| Input Parameters : b_Channel = CR_CHAN(insn->chanspec) (0 to 3) |
1256+----------------------------------------------------------------------------+
1257| Output Parameters : data[0] : Channel value |
1258+----------------------------------------------------------------------------+
1259| Return Value : 0 : No error |
1260| -3 : Channel selection error |
1261| -101 : Data size error |
1262+----------------------------------------------------------------------------+
1263*/
1264
1265static int i_APCI3XXX_InsnReadDigitalInput(struct comedi_device *dev,
1266 struct comedi_subdevice *s,
1267 struct comedi_insn *insn,
1268 unsigned int *data)
1269{
1270 int i_ReturnValue = insn->n;
1271 unsigned char b_Channel = (unsigned char) CR_CHAN(insn->chanspec);
1272 unsigned int dw_Temp = 0;
1273
1274 /***************************/
1275 /* Test the channel number */
1276 /***************************/
1277
1278 if (b_Channel <= devpriv->s_EeParameters.i_NbrDiChannel) {
1279 /************************/
1280 /* Test the buffer size */
1281 /************************/
1282
1283 if (insn->n >= 1) {
1284 dw_Temp = inl(devpriv->iobase + 32);
1285 *data = (dw_Temp >> b_Channel) & 1;
1286 } else {
1287 /*******************/
1288 /* Data size error */
1289 /*******************/
1290
1291 printk("Buffer size error\n");
1292 i_ReturnValue = -101;
1293 }
1294 } else {
1295 /***************************/
1296 /* Channel selection error */
1297 /***************************/
1298
1299 printk("Channel selection error\n");
1300 i_ReturnValue = -3;
1301 }
1302
1303 return i_ReturnValue;
1304}
1305
1306/*
1307+----------------------------------------------------------------------------+
1308| Function name :int i_APCI3XXX_InsnBitsDigitalInput |
1309| (struct comedi_device *dev, |
1310| struct comedi_subdevice *s, |
1311| struct comedi_insn *insn, |
1312| unsigned int *data) |
1313+----------------------------------------------------------------------------+
1314| Task : Reads the value of the Digital input Port i.e.4channels|
1315+----------------------------------------------------------------------------+
1316| Input Parameters : - |
1317+----------------------------------------------------------------------------+
1318| Output Parameters : data[0] : Port value |
1319+----------------------------------------------------------------------------+
1320| Return Value :>0: No error |
1321| .... |
1322| -101 : Data size error |
1323+----------------------------------------------------------------------------+
1324*/
1325static int i_APCI3XXX_InsnBitsDigitalInput(struct comedi_device *dev,
1326 struct comedi_subdevice *s,
1327 struct comedi_insn *insn,
1328 unsigned int *data)
1329{
1330 int i_ReturnValue = insn->n;
1331 unsigned int dw_Temp = 0;
1332
1333 /************************/
1334 /* Test the buffer size */
1335 /************************/
1336
1337 if (insn->n >= 1) {
1338 dw_Temp = inl(devpriv->iobase + 32);
1339 *data = dw_Temp & 0xf;
1340 } else {
1341 /*******************/
1342 /* Data size error */
1343 /*******************/
1344
1345 printk("Buffer size error\n");
1346 i_ReturnValue = -101;
1347 }
1348
1349 return i_ReturnValue;
1350}
1351
1352/*
1353+----------------------------------------------------------------------------+
1354| DIGITAL OUTPUT SUBDEVICE |
1355+----------------------------------------------------------------------------+
1356
1357*/
1358
1359/*
1360+----------------------------------------------------------------------------+
1361| Function name :int i_APCI3XXX_InsnBitsDigitalOutput |
1362| (struct comedi_device *dev, |
1363| struct comedi_subdevice *s, |
1364| struct comedi_insn *insn, |
1365| unsigned int *data) |
1366+----------------------------------------------------------------------------+
1367| Task : Write the selected output mask and read the status from|
1368| all digital output channles |
1369+----------------------------------------------------------------------------+
1370| Input Parameters : dw_ChannelMask = data [0]; |
1371| dw_BitMask = data [1]; |
1372+----------------------------------------------------------------------------+
1373| Output Parameters : data[1] : All digital output channles states |
1374+----------------------------------------------------------------------------+
1375| Return Value : >0 : No error |
1376| -4 : Channel mask error |
1377| -101 : Data size error |
1378+----------------------------------------------------------------------------+
1379*/
1380static int i_APCI3XXX_InsnBitsDigitalOutput(struct comedi_device *dev,
1381 struct comedi_subdevice *s,
1382 struct comedi_insn *insn,
1383 unsigned int *data)
1384{ 1283{
1385 int i_ReturnValue = insn->n; 1284 struct addi_private *devpriv = dev->private;
1386 unsigned char b_ChannelCpt = 0;
1387 unsigned int dw_ChannelMask = 0;
1388 unsigned int dw_BitMask = 0;
1389 unsigned int dw_Status = 0;
1390
1391 /************************/
1392 /* Test the buffer size */
1393 /************************/
1394
1395 if (insn->n >= 2) {
1396 /*******************************/
1397 /* Get the channe and bit mask */
1398 /*******************************/
1399
1400 dw_ChannelMask = data[0];
1401 dw_BitMask = data[1];
1402
1403 /*************************/
1404 /* Test the channel mask */
1405 /*************************/
1406
1407 if ((dw_ChannelMask & 0XFFFFFFF0) == 0) {
1408 /*********************************/
1409 /* Test if set/reset any channel */
1410 /*********************************/
1411
1412 if (dw_ChannelMask & 0xF) {
1413 /********************************/
1414 /* Read the digital output port */
1415 /********************************/
1416
1417 dw_Status = inl(devpriv->iobase + 48);
1418 1285
1419 for (b_ChannelCpt = 0; b_ChannelCpt < 4; 1286 data[1] = inl(devpriv->iobase + 32) & 0xf;
1420 b_ChannelCpt++) {
1421 if ((dw_ChannelMask >> b_ChannelCpt) &
1422 1) {
1423 dw_Status =
1424 (dw_Status & (0xF -
1425 (1 << b_ChannelCpt))) | (dw_BitMask & (1 << b_ChannelCpt));
1426 }
1427 }
1428
1429 outl(dw_Status, devpriv->iobase + 48);
1430 }
1431
1432 /********************************/
1433 /* Read the digital output port */
1434 /********************************/
1435
1436 data[1] = inl(devpriv->iobase + 48);
1437 } else {
1438 /************************/
1439 /* Config command error */
1440 /************************/
1441
1442 printk("Channel mask error\n");
1443 i_ReturnValue = -4;
1444 }
1445 } else {
1446 /*******************/
1447 /* Data size error */
1448 /*******************/
1449
1450 printk("Buffer size error\n");
1451 i_ReturnValue = -101;
1452 }
1453 1287
1454 return i_ReturnValue; 1288 return insn->n;
1455} 1289}
1456 1290
1457/* 1291static int apci3xxx_do_insn_bits(struct comedi_device *dev,
1458+----------------------------------------------------------------------------+ 1292 struct comedi_subdevice *s,
1459| Function name :int i_APCI3XXX_InsnWriteDigitalOutput | 1293 struct comedi_insn *insn,
1460| (struct comedi_device *dev, | 1294 unsigned int *data)
1461| struct comedi_subdevice *s, |
1462| struct comedi_insn *insn, |
1463| unsigned int *data) |
1464+----------------------------------------------------------------------------+
1465| Task : Set the state from digital output channel |
1466+----------------------------------------------------------------------------+
1467| Input Parameters : b_Channel = CR_CHAN(insn->chanspec) |
1468| b_State = data [0] |
1469+----------------------------------------------------------------------------+
1470| Output Parameters : - |
1471+----------------------------------------------------------------------------+
1472| Return Value : >0 : No error |
1473| -3 : Channel selection error |
1474| -101 : Data size error |
1475+----------------------------------------------------------------------------+
1476*/
1477
1478static int i_APCI3XXX_InsnWriteDigitalOutput(struct comedi_device *dev,
1479 struct comedi_subdevice *s,
1480 struct comedi_insn *insn,
1481 unsigned int *data)
1482{ 1295{
1483 int i_ReturnValue = insn->n; 1296 struct addi_private *devpriv = dev->private;
1484 unsigned char b_Channel = CR_CHAN(insn->chanspec); 1297 unsigned int mask = data[0];
1485 unsigned char b_State = 0; 1298 unsigned int bits = data[1];
1486 unsigned int dw_Status = 0;
1487
1488 /************************/
1489 /* Test the buffer size */
1490 /************************/
1491
1492 if (insn->n >= 1) {
1493 /***************************/
1494 /* Test the channel number */
1495 /***************************/
1496
1497 if (b_Channel < devpriv->s_EeParameters.i_NbrDoChannel) {
1498 /*******************/
1499 /* Get the command */
1500 /*******************/
1501
1502 b_State = (unsigned char) data[0];
1503
1504 /********************************/
1505 /* Read the digital output port */
1506 /********************************/
1507
1508 dw_Status = inl(devpriv->iobase + 48);
1509
1510 dw_Status =
1511 (dw_Status & (0xF -
1512 (1 << b_Channel))) | ((b_State & 1) <<
1513 b_Channel);
1514 outl(dw_Status, devpriv->iobase + 48);
1515 } else {
1516 /***************************/
1517 /* Channel selection error */
1518 /***************************/
1519 1299
1520 printk("Channel selection error\n"); 1300 s->state = inl(devpriv->iobase + 48) & 0xf;
1521 i_ReturnValue = -3; 1301 if (mask) {
1522 } 1302 s->state &= ~mask;
1523 } else { 1303 s->state |= (bits & mask);
1524 /*******************/
1525 /* Data size error */
1526 /*******************/
1527 1304
1528 printk("Buffer size error\n"); 1305 outl(s->state, devpriv->iobase + 48);
1529 i_ReturnValue = -101;
1530 } 1306 }
1531 1307
1532 return i_ReturnValue; 1308 data[1] = s->state;
1533}
1534
1535/*
1536+----------------------------------------------------------------------------+
1537| Function name :int i_APCI3XXX_InsnReadDigitalOutput |
1538| (struct comedi_device *dev, |
1539| struct comedi_subdevice *s, |
1540| struct comedi_insn *insn, |
1541| unsigned int *data) |
1542+----------------------------------------------------------------------------+
1543| Task : Read the state from digital output channel |
1544+----------------------------------------------------------------------------+
1545| Input Parameters : b_Channel = CR_CHAN(insn->chanspec) |
1546+----------------------------------------------------------------------------+
1547| Output Parameters : b_State = data [0] |
1548+----------------------------------------------------------------------------+
1549| Return Value : >0 : No error |
1550| -3 : Channel selection error |
1551| -101 : Data size error |
1552+----------------------------------------------------------------------------+
1553*/
1554 1309
1555static int i_APCI3XXX_InsnReadDigitalOutput(struct comedi_device *dev, 1310 return insn->n;
1556 struct comedi_subdevice *s,
1557 struct comedi_insn *insn,
1558 unsigned int *data)
1559{
1560 int i_ReturnValue = insn->n;
1561 unsigned char b_Channel = CR_CHAN(insn->chanspec);
1562 unsigned int dw_Status = 0;
1563
1564 /************************/
1565 /* Test the buffer size */
1566 /************************/
1567
1568 if (insn->n >= 1) {
1569 /***************************/
1570 /* Test the channel number */
1571 /***************************/
1572
1573 if (b_Channel < devpriv->s_EeParameters.i_NbrDoChannel) {
1574 /********************************/
1575 /* Read the digital output port */
1576 /********************************/
1577
1578 dw_Status = inl(devpriv->iobase + 48);
1579
1580 dw_Status = (dw_Status >> b_Channel) & 1;
1581 *data = dw_Status;
1582 } else {
1583 /***************************/
1584 /* Channel selection error */
1585 /***************************/
1586
1587 printk("Channel selection error\n");
1588 i_ReturnValue = -3;
1589 }
1590 } else {
1591 /*******************/
1592 /* Data size error */
1593 /*******************/
1594
1595 printk("Buffer size error\n");
1596 i_ReturnValue = -101;
1597 }
1598
1599 return i_ReturnValue;
1600} 1311}
1601 1312
1602/* 1313/*
@@ -1614,6 +1325,7 @@ static int i_APCI3XXX_InsnReadDigitalOutput(struct comedi_device *dev,
1614 1325
1615static int i_APCI3XXX_Reset(struct comedi_device *dev) 1326static int i_APCI3XXX_Reset(struct comedi_device *dev)
1616{ 1327{
1328 struct addi_private *devpriv = dev->private;
1617 unsigned char b_Cpt = 0; 1329 unsigned char b_Cpt = 0;
1618 1330
1619 /*************************/ 1331 /*************************/
diff --git a/drivers/staging/comedi/drivers/addi-data/hwdrv_apci3xxx.h b/drivers/staging/comedi/drivers/addi-data/hwdrv_apci3xxx.h
deleted file mode 100644
index e10b7e510335..000000000000
--- a/drivers/staging/comedi/drivers/addi-data/hwdrv_apci3xxx.h
+++ /dev/null
@@ -1,48 +0,0 @@
1/*
2 * Copyright (C) 2004,2005 ADDI-DATA GmbH for the source code of this module.
3 *
4 * ADDI-DATA GmbH
5 * Dieselstrasse 3
6 * D-77833 Ottersweier
7 * Tel: +19(0)7223/9493-0
8 * Fax: +49(0)7223/9493-92
9 * http://www.addi-data.com
10 * info@addi-data.com
11 *
12 * This program is free software; you can redistribute it and/or modify it
13 * under the terms of the GNU General Public License as published by the Free
14 * Software Foundation; either version 2 of the License, or (at your option)
15 * any later version.
16 */
17
18#ifndef COMEDI_SUBD_TTLIO
19#define COMEDI_SUBD_TTLIO 11 /* Digital Input Output But TTL */
20#endif
21
22#ifndef ADDIDATA_ENABLE
23#define ADDIDATA_ENABLE 1
24#define ADDIDATA_DISABLE 0
25#endif
26
27#define APCI3XXX_SINGLE 0
28#define APCI3XXX_DIFF 1
29#define APCI3XXX_CONFIGURATION 0
30
31#define APCI3XXX_TTL_INIT_DIRECTION_PORT2 0
32
33#ifdef __KERNEL__
34
35static const struct comedi_lrange range_apci3XXX_ai = { 8, {BIP_RANGE(10),
36 BIP_RANGE(5),
37 BIP_RANGE(2),
38 BIP_RANGE(1),
39 UNI_RANGE(10),
40 UNI_RANGE(5),
41 UNI_RANGE(2),
42 UNI_RANGE(1)}
43};
44
45static const struct comedi_lrange range_apci3XXX_ao = { 2, {BIP_RANGE(10),
46 UNI_RANGE(10)}
47};
48#endif
diff --git a/drivers/staging/comedi/drivers/addi_apci_035.c b/drivers/staging/comedi/drivers/addi_apci_035.c
index 4c00df4bc153..c981d4b1cc73 100644
--- a/drivers/staging/comedi/drivers/addi_apci_035.c
+++ b/drivers/staging/comedi/drivers/addi_apci_035.c
@@ -1,11 +1,77 @@
1#define CONFIG_APCI_035 1 1#include "../comedidev.h"
2#include "comedi_fc.h"
3#include "amcc_s5933.h"
2 4
3#define ADDIDATA_WATCHDOG 2 /* Or shold it be something else */ 5#include "addi-data/addi_common.h"
4 6
5#define ADDIDATA_DRIVER_NAME "addi_apci_035" 7#define ADDIDATA_WATCHDOG 2 /* Or shold it be something else */
6 8
9#include "addi-data/addi_eeprom.c"
10#include "addi-data/hwdrv_apci035.c"
7#include "addi-data/addi_common.c" 11#include "addi-data/addi_common.c"
8 12
13static const struct addi_board apci035_boardtypes[] = {
14 {
15 .pc_DriverName = "apci035",
16 .i_VendorId = PCI_VENDOR_ID_ADDIDATA,
17 .i_DeviceId = 0x0300,
18 .i_IorangeBase0 = 127,
19 .i_IorangeBase1 = APCI035_ADDRESS_RANGE,
20 .i_PCIEeprom = 1,
21 .pc_EepromChip = ADDIDATA_S5920,
22 .i_NbrAiChannel = 16,
23 .i_NbrAiChannelDiff = 8,
24 .i_AiChannelList = 16,
25 .i_AiMaxdata = 0xff,
26 .pr_AiRangelist = &range_apci035_ai,
27 .i_Timer = 1,
28 .ui_MinAcquisitiontimeNs = 10000,
29 .ui_MinDelaytimeNs = 100000,
30 .interrupt = v_APCI035_Interrupt,
31 .reset = i_APCI035_Reset,
32 .ai_config = i_APCI035_ConfigAnalogInput,
33 .ai_read = i_APCI035_ReadAnalogInput,
34 .timer_config = i_APCI035_ConfigTimerWatchdog,
35 .timer_write = i_APCI035_StartStopWriteTimerWatchdog,
36 .timer_read = i_APCI035_ReadTimerWatchdog,
37 },
38};
39
40static struct comedi_driver apci035_driver = {
41 .driver_name = "addi_apci_035",
42 .module = THIS_MODULE,
43 .auto_attach = addi_auto_attach,
44 .detach = i_ADDI_Detach,
45 .num_names = ARRAY_SIZE(apci035_boardtypes),
46 .board_name = &apci035_boardtypes[0].pc_DriverName,
47 .offset = sizeof(struct addi_board),
48};
49
50static int apci035_pci_probe(struct pci_dev *dev,
51 const struct pci_device_id *ent)
52{
53 return comedi_pci_auto_config(dev, &apci035_driver);
54}
55
56static void apci035_pci_remove(struct pci_dev *dev)
57{
58 comedi_pci_auto_unconfig(dev);
59}
60
61static DEFINE_PCI_DEVICE_TABLE(apci035_pci_table) = {
62 { PCI_DEVICE(PCI_VENDOR_ID_ADDIDATA, 0x0300) },
63 { 0 }
64};
65MODULE_DEVICE_TABLE(pci, apci035_pci_table);
66
67static struct pci_driver apci035_pci_driver = {
68 .name = "addi_apci_035",
69 .id_table = apci035_pci_table,
70 .probe = apci035_pci_probe,
71 .remove = apci035_pci_remove,
72};
73module_comedi_pci_driver(apci035_driver, apci035_pci_driver);
74
9MODULE_AUTHOR("Comedi http://www.comedi.org"); 75MODULE_AUTHOR("Comedi http://www.comedi.org");
10MODULE_DESCRIPTION("Comedi low-level driver"); 76MODULE_DESCRIPTION("Comedi low-level driver");
11MODULE_LICENSE("GPL"); 77MODULE_LICENSE("GPL");
diff --git a/drivers/staging/comedi/drivers/addi_apci_1032.c b/drivers/staging/comedi/drivers/addi_apci_1032.c
index 7831ce33b02e..7f9424205a64 100644
--- a/drivers/staging/comedi/drivers/addi_apci_1032.c
+++ b/drivers/staging/comedi/drivers/addi_apci_1032.c
@@ -1,8 +1,398 @@
1#define CONFIG_APCI_1032 1 1/*
2 * addi_apci_1032.c
3 * Copyright (C) 2004,2005 ADDI-DATA GmbH for the source code of this module.
4 * Project manager: Eric Stolz
5 *
6 * ADDI-DATA GmbH
7 * Dieselstrasse 3
8 * D-77833 Ottersweier
9 * Tel: +19(0)7223/9493-0
10 * Fax: +49(0)7223/9493-92
11 * http://www.addi-data.com
12 * info@addi-data.com
13 *
14 * This program is free software; you can redistribute it and/or modify it
15 * under the terms of the GNU General Public License as published by the
16 * Free Software Foundation; either version 2 of the License, or (at your
17 * option) any later version.
18 *
19 * This program is distributed in the hope that it will be useful, but WITHOUT
20 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
21 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
22 * more details.
23 *
24 * You should have received a copy of the GNU General Public License along with
25 * this program; if not, write to the Free Software Foundation, Inc., 59 Temple
26 * Place, Suite 330, Boston, MA 02111-1307 USA
27 *
28 * You should also find the complete GPL in the COPYING file accompanying this
29 * source code.
30 */
2 31
3#define ADDIDATA_DRIVER_NAME "addi_apci_1032" 32#include "../comedidev.h"
33#include "comedi_fc.h"
34#include "amcc_s5933.h"
4 35
5#include "addi-data/addi_common.c" 36/*
37 * I/O Register Map
38 */
39#define APCI1032_DI_REG 0x00
40#define APCI1032_MODE1_REG 0x04
41#define APCI1032_MODE2_REG 0x08
42#define APCI1032_STATUS_REG 0x0c
43#define APCI1032_CTRL_REG 0x10
44#define APCI1032_CTRL_INT_OR (0 << 1)
45#define APCI1032_CTRL_INT_AND (1 << 1)
46#define APCI1032_CTRL_INT_ENA (1 << 2)
47
48struct apci1032_private {
49 unsigned long amcc_iobase; /* base of AMCC I/O registers */
50 unsigned int mode1; /* rising-edge/high level channels */
51 unsigned int mode2; /* falling-edge/low level channels */
52 unsigned int ctrl; /* interrupt mode OR (edge) . AND (level) */
53};
54
55static int apci1032_reset(struct comedi_device *dev)
56{
57 /* disable the interrupts */
58 outl(0x0, dev->iobase + APCI1032_CTRL_REG);
59 /* Reset the interrupt status register */
60 inl(dev->iobase + APCI1032_STATUS_REG);
61 /* Disable the and/or interrupt */
62 outl(0x0, dev->iobase + APCI1032_MODE1_REG);
63 outl(0x0, dev->iobase + APCI1032_MODE2_REG);
64
65 return 0;
66}
67
68/*
69 * Change-Of-State (COS) interrupt configuration
70 *
71 * Channels 0 to 15 are interruptible. These channels can be configured
72 * to generate interrupts based on AND/OR logic for the desired channels.
73 *
74 * OR logic
75 * - reacts to rising or falling edges
76 * - interrupt is generated when any enabled channel
77 * meet the desired interrupt condition
78 *
79 * AND logic
80 * - reacts to changes in level of the selected inputs
81 * - interrupt is generated when all enabled channels
82 * meet the desired interrupt condition
83 * - after an interrupt, a change in level must occur on
84 * the selected inputs to release the IRQ logic
85 *
86 * The COS interrupt must be configured before it can be enabled.
87 *
88 * data[0] : INSN_CONFIG_DIGITAL_TRIG
89 * data[1] : trigger number (= 0)
90 * data[2] : configuration operation:
91 * COMEDI_DIGITAL_TRIG_DISABLE = no interrupts
92 * COMEDI_DIGITAL_TRIG_ENABLE_EDGES = OR (edge) interrupts
93 * COMEDI_DIGITAL_TRIG_ENABLE_LEVELS = AND (level) interrupts
94 * data[3] : left-shift for data[4] and data[5]
95 * data[4] : rising-edge/high level channels
96 * data[5] : falling-edge/low level channels
97 */
98static int apci1032_cos_insn_config(struct comedi_device *dev,
99 struct comedi_subdevice *s,
100 struct comedi_insn *insn,
101 unsigned int *data)
102{
103 struct apci1032_private *devpriv = dev->private;
104 unsigned int shift, oldmask;
105
106 switch (data[0]) {
107 case INSN_CONFIG_DIGITAL_TRIG:
108 if (data[1] != 0)
109 return -EINVAL;
110 shift = data[3];
111 oldmask = (1U << shift) - 1;
112 switch (data[2]) {
113 case COMEDI_DIGITAL_TRIG_DISABLE:
114 devpriv->ctrl = 0;
115 devpriv->mode1 = 0;
116 devpriv->mode2 = 0;
117 apci1032_reset(dev);
118 break;
119 case COMEDI_DIGITAL_TRIG_ENABLE_EDGES:
120 if (devpriv->ctrl != (APCI1032_CTRL_INT_ENA |
121 APCI1032_CTRL_INT_OR)) {
122 /* switching to 'OR' mode */
123 devpriv->ctrl = APCI1032_CTRL_INT_ENA |
124 APCI1032_CTRL_INT_OR;
125 /* wipe old channels */
126 devpriv->mode1 = 0;
127 devpriv->mode2 = 0;
128 } else {
129 /* preserve unspecified channels */
130 devpriv->mode1 &= oldmask;
131 devpriv->mode2 &= oldmask;
132 }
133 /* configure specified channels */
134 devpriv->mode1 |= data[4] << shift;
135 devpriv->mode2 |= data[5] << shift;
136 break;
137 case COMEDI_DIGITAL_TRIG_ENABLE_LEVELS:
138 if (devpriv->ctrl != (APCI1032_CTRL_INT_ENA |
139 APCI1032_CTRL_INT_AND)) {
140 /* switching to 'AND' mode */
141 devpriv->ctrl = APCI1032_CTRL_INT_ENA |
142 APCI1032_CTRL_INT_AND;
143 /* wipe old channels */
144 devpriv->mode1 = 0;
145 devpriv->mode2 = 0;
146 } else {
147 /* preserve unspecified channels */
148 devpriv->mode1 &= oldmask;
149 devpriv->mode2 &= oldmask;
150 }
151 /* configure specified channels */
152 devpriv->mode1 |= data[4] << shift;
153 devpriv->mode2 |= data[5] << shift;
154 break;
155 default:
156 return -EINVAL;
157 }
158 break;
159 default:
160 return -EINVAL;
161 }
162
163 return insn->n;
164}
165
166static int apci1032_cos_insn_bits(struct comedi_device *dev,
167 struct comedi_subdevice *s,
168 struct comedi_insn *insn,
169 unsigned int *data)
170{
171 data[1] = s->state;
172
173 return 0;
174}
175
176static int apci1032_cos_cmdtest(struct comedi_device *dev,
177 struct comedi_subdevice *s,
178 struct comedi_cmd *cmd)
179{
180 int err = 0;
181
182 /* Step 1 : check if triggers are trivially valid */
183
184 err |= cfc_check_trigger_src(&cmd->start_src, TRIG_NOW);
185 err |= cfc_check_trigger_src(&cmd->scan_begin_src, TRIG_EXT);
186 err |= cfc_check_trigger_src(&cmd->convert_src, TRIG_FOLLOW);
187 err |= cfc_check_trigger_src(&cmd->scan_end_src, TRIG_COUNT);
188 err |= cfc_check_trigger_src(&cmd->stop_src, TRIG_NONE);
189
190 if (err)
191 return 1;
192
193 /* Step 2a : make sure trigger sources are unique */
194 /* Step 2b : and mutually compatible */
195
196 if (err)
197 return 2;
198
199 /* Step 3: check if arguments are trivially valid */
200
201 err |= cfc_check_trigger_arg_is(&cmd->start_arg, 0);
202 err |= cfc_check_trigger_arg_is(&cmd->scan_begin_arg, 0);
203 err |= cfc_check_trigger_arg_is(&cmd->convert_arg, 0);
204 err |= cfc_check_trigger_arg_is(&cmd->scan_end_arg, 1);
205 err |= cfc_check_trigger_arg_is(&cmd->stop_arg, 0);
206
207 if (err)
208 return 3;
209
210 /* step 4: ignored */
211
212 if (err)
213 return 4;
214
215 return 0;
216}
217
218/*
219 * Change-Of-State (COS) 'do_cmd' operation
220 *
221 * Enable the COS interrupt as configured by apci1032_cos_insn_config().
222 */
223static int apci1032_cos_cmd(struct comedi_device *dev,
224 struct comedi_subdevice *s)
225{
226 struct apci1032_private *devpriv = dev->private;
227
228 if (!devpriv->ctrl) {
229 dev_warn(dev->class_dev,
230 "Interrupts disabled due to mode configuration!\n");
231 return -EINVAL;
232 }
233
234 outl(devpriv->mode1, dev->iobase + APCI1032_MODE1_REG);
235 outl(devpriv->mode2, dev->iobase + APCI1032_MODE2_REG);
236 outl(devpriv->ctrl, dev->iobase + APCI1032_CTRL_REG);
237
238 return 0;
239}
240
241static int apci1032_cos_cancel(struct comedi_device *dev,
242 struct comedi_subdevice *s)
243{
244 return apci1032_reset(dev);
245}
246
247static irqreturn_t apci1032_interrupt(int irq, void *d)
248{
249 struct comedi_device *dev = d;
250 struct apci1032_private *devpriv = dev->private;
251 struct comedi_subdevice *s = dev->read_subdev;
252 unsigned int ctrl;
253
254 /* check interrupt is from this device */
255 if ((inl(devpriv->amcc_iobase + AMCC_OP_REG_INTCSR) &
256 INTCSR_INTR_ASSERTED) == 0)
257 return IRQ_NONE;
258
259 /* check interrupt is enabled */
260 ctrl = inl(dev->iobase + APCI1032_CTRL_REG);
261 if ((ctrl & APCI1032_CTRL_INT_ENA) == 0)
262 return IRQ_HANDLED;
263
264 /* disable the interrupt */
265 outl(ctrl & ~APCI1032_CTRL_INT_ENA, dev->iobase + APCI1032_CTRL_REG);
266
267 s->state = inl(dev->iobase + APCI1032_STATUS_REG) & 0xffff;
268 comedi_buf_put(s->async, s->state);
269 s->async->events |= COMEDI_CB_BLOCK | COMEDI_CB_EOS;
270 comedi_event(dev, s);
271
272 /* enable the interrupt */
273 outl(ctrl, dev->iobase + APCI1032_CTRL_REG);
274
275 return IRQ_HANDLED;
276}
277
278static int apci1032_di_insn_bits(struct comedi_device *dev,
279 struct comedi_subdevice *s,
280 struct comedi_insn *insn,
281 unsigned int *data)
282{
283 data[1] = inl(dev->iobase + APCI1032_DI_REG);
284
285 return insn->n;
286}
287
288static int apci1032_auto_attach(struct comedi_device *dev,
289 unsigned long context_unused)
290{
291 struct pci_dev *pcidev = comedi_to_pci_dev(dev);
292 struct apci1032_private *devpriv;
293 struct comedi_subdevice *s;
294 int ret;
295
296 dev->board_name = dev->driver->driver_name;
297
298 devpriv = kzalloc(sizeof(*devpriv), GFP_KERNEL);
299 if (!devpriv)
300 return -ENOMEM;
301 dev->private = devpriv;
302
303 ret = comedi_pci_enable(pcidev, dev->board_name);
304 if (ret)
305 return ret;
306
307 devpriv->amcc_iobase = pci_resource_start(pcidev, 0);
308 dev->iobase = pci_resource_start(pcidev, 1);
309 apci1032_reset(dev);
310 if (pcidev->irq > 0) {
311 ret = request_irq(pcidev->irq, apci1032_interrupt, IRQF_SHARED,
312 dev->board_name, dev);
313 if (ret == 0)
314 dev->irq = pcidev->irq;
315 }
316
317 ret = comedi_alloc_subdevices(dev, 2);
318 if (ret)
319 return ret;
320
321 /* Allocate and Initialise DI Subdevice Structures */
322 s = &dev->subdevices[0];
323 s->type = COMEDI_SUBD_DI;
324 s->subdev_flags = SDF_READABLE;
325 s->n_chan = 32;
326 s->maxdata = 1;
327 s->range_table = &range_digital;
328 s->insn_bits = apci1032_di_insn_bits;
329
330 /* Change-Of-State (COS) interrupt subdevice */
331 s = &dev->subdevices[1];
332 if (dev->irq) {
333 dev->read_subdev = s;
334 s->type = COMEDI_SUBD_DI | SDF_CMD_READ;
335 s->subdev_flags = SDF_READABLE;
336 s->n_chan = 1;
337 s->maxdata = 1;
338 s->range_table = &range_digital;
339 s->insn_config = apci1032_cos_insn_config;
340 s->insn_bits = apci1032_cos_insn_bits;
341 s->do_cmdtest = apci1032_cos_cmdtest;
342 s->do_cmd = apci1032_cos_cmd;
343 s->cancel = apci1032_cos_cancel;
344 } else {
345 s->type = COMEDI_SUBD_UNUSED;
346 }
347
348 return 0;
349}
350
351static void apci1032_detach(struct comedi_device *dev)
352{
353 struct pci_dev *pcidev = comedi_to_pci_dev(dev);
354
355 if (dev->iobase)
356 apci1032_reset(dev);
357 if (dev->irq)
358 free_irq(dev->irq, dev);
359 if (pcidev) {
360 if (dev->iobase)
361 comedi_pci_disable(pcidev);
362 }
363}
364
365static struct comedi_driver apci1032_driver = {
366 .driver_name = "addi_apci_1032",
367 .module = THIS_MODULE,
368 .auto_attach = apci1032_auto_attach,
369 .detach = apci1032_detach,
370};
371
372static int apci1032_pci_probe(struct pci_dev *dev,
373 const struct pci_device_id *ent)
374{
375 return comedi_pci_auto_config(dev, &apci1032_driver);
376}
377
378static void apci1032_pci_remove(struct pci_dev *dev)
379{
380 comedi_pci_auto_unconfig(dev);
381}
382
383static DEFINE_PCI_DEVICE_TABLE(apci1032_pci_table) = {
384 { PCI_DEVICE(PCI_VENDOR_ID_ADDIDATA, 0x1003) },
385 { 0 }
386};
387MODULE_DEVICE_TABLE(pci, apci1032_pci_table);
388
389static struct pci_driver apci1032_pci_driver = {
390 .name = "addi_apci_1032",
391 .id_table = apci1032_pci_table,
392 .probe = apci1032_pci_probe,
393 .remove = apci1032_pci_remove,
394};
395module_comedi_pci_driver(apci1032_driver, apci1032_pci_driver);
6 396
7MODULE_AUTHOR("Comedi http://www.comedi.org"); 397MODULE_AUTHOR("Comedi http://www.comedi.org");
8MODULE_DESCRIPTION("Comedi low-level driver"); 398MODULE_DESCRIPTION("Comedi low-level driver");
diff --git a/drivers/staging/comedi/drivers/addi_apci_1500.c b/drivers/staging/comedi/drivers/addi_apci_1500.c
index bfd84f66d9c0..8e686a9b811b 100644
--- a/drivers/staging/comedi/drivers/addi_apci_1500.c
+++ b/drivers/staging/comedi/drivers/addi_apci_1500.c
@@ -1,9 +1,77 @@
1#define CONFIG_APCI_1500 1 1#include "../comedidev.h"
2#include "comedi_fc.h"
3#include "amcc_s5933.h"
2 4
3#define ADDIDATA_DRIVER_NAME "addi_apci_1500" 5#include "addi-data/addi_common.h"
4 6
7#include "addi-data/addi_eeprom.c"
8#include "addi-data/hwdrv_apci1500.c"
5#include "addi-data/addi_common.c" 9#include "addi-data/addi_common.c"
6 10
11static const struct addi_board apci1500_boardtypes[] = {
12 {
13 .pc_DriverName = "apci1500",
14 .i_VendorId = PCI_VENDOR_ID_ADDIDATA_OLD,
15 .i_DeviceId = 0x80fc,
16 .i_IorangeBase0 = 128,
17 .i_IorangeBase1 = APCI1500_ADDRESS_RANGE,
18 .i_IorangeBase2 = 4,
19 .i_PCIEeprom = ADDIDATA_NO_EEPROM,
20 .i_NbrDiChannel = 16,
21 .i_NbrDoChannel = 16,
22 .i_DoMaxdata = 0xffff,
23 .i_Timer = 1,
24 .interrupt = v_APCI1500_Interrupt,
25 .reset = i_APCI1500_Reset,
26 .di_config = i_APCI1500_ConfigDigitalInputEvent,
27 .di_read = i_APCI1500_Initialisation,
28 .di_write = i_APCI1500_StartStopInputEvent,
29 .di_bits = apci1500_di_insn_bits,
30 .do_config = i_APCI1500_ConfigDigitalOutputErrorInterrupt,
31 .do_write = i_APCI1500_WriteDigitalOutput,
32 .do_bits = i_APCI1500_ConfigureInterrupt,
33 .timer_config = i_APCI1500_ConfigCounterTimerWatchdog,
34 .timer_write = i_APCI1500_StartStopTriggerTimerCounterWatchdog,
35 .timer_read = i_APCI1500_ReadInterruptMask,
36 .timer_bits = i_APCI1500_ReadCounterTimerWatchdog,
37 },
38};
39
40static struct comedi_driver apci1500_driver = {
41 .driver_name = "addi_apci_1500",
42 .module = THIS_MODULE,
43 .auto_attach = addi_auto_attach,
44 .detach = i_ADDI_Detach,
45 .num_names = ARRAY_SIZE(apci1500_boardtypes),
46 .board_name = &apci1500_boardtypes[0].pc_DriverName,
47 .offset = sizeof(struct addi_board),
48};
49
50static int apci1500_pci_probe(struct pci_dev *dev,
51 const struct pci_device_id *ent)
52{
53 return comedi_pci_auto_config(dev, &apci1500_driver);
54}
55
56static void apci1500_pci_remove(struct pci_dev *dev)
57{
58 comedi_pci_auto_unconfig(dev);
59}
60
61static DEFINE_PCI_DEVICE_TABLE(apci1500_pci_table) = {
62 { PCI_DEVICE(PCI_VENDOR_ID_ADDIDATA_OLD, 0x80fc) },
63 { 0 }
64};
65MODULE_DEVICE_TABLE(pci, apci1500_pci_table);
66
67static struct pci_driver apci1500_pci_driver = {
68 .name = "addi_apci_1500",
69 .id_table = apci1500_pci_table,
70 .probe = apci1500_pci_probe,
71 .remove = apci1500_pci_remove,
72};
73module_comedi_pci_driver(apci1500_driver, apci1500_pci_driver);
74
7MODULE_AUTHOR("Comedi http://www.comedi.org"); 75MODULE_AUTHOR("Comedi http://www.comedi.org");
8MODULE_DESCRIPTION("Comedi low-level driver"); 76MODULE_DESCRIPTION("Comedi low-level driver");
9MODULE_LICENSE("GPL"); 77MODULE_LICENSE("GPL");
diff --git a/drivers/staging/comedi/drivers/addi_apci_1516.c b/drivers/staging/comedi/drivers/addi_apci_1516.c
index a12e2f421370..8fef04b4d197 100644
--- a/drivers/staging/comedi/drivers/addi_apci_1516.c
+++ b/drivers/staging/comedi/drivers/addi_apci_1516.c
@@ -1,9 +1,349 @@
1#define CONFIG_APCI_1516 1 1/*
2 * addi_apci_1516.c
3 * Copyright (C) 2004,2005 ADDI-DATA GmbH for the source code of this module.
4 * Project manager: Eric Stolz
5 *
6 * ADDI-DATA GmbH
7 * Dieselstrasse 3
8 * D-77833 Ottersweier
9 * Tel: +19(0)7223/9493-0
10 * Fax: +49(0)7223/9493-92
11 * http://www.addi-data.com
12 * info@addi-data.com
13 *
14 * This program is free software; you can redistribute it and/or modify it
15 * under the terms of the GNU General Public License as published by the
16 * Free Software Foundation; either version 2 of the License, or (at your
17 * option) any later version.
18 *
19 * This program is distributed in the hope that it will be useful, but WITHOUT
20 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
21 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
22 * more details.
23 *
24 * You should have received a copy of the GNU General Public License along
25 * with this program; if not, write to the Free Software Foundation, Inc.,
26 * 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
27 *
28 * You should also find the complete GPL in the COPYING file accompanying
29 * this source code.
30 */
2 31
3#define ADDIDATA_DRIVER_NAME "addi_apci_1516" 32#include "../comedidev.h"
33#include "comedi_fc.h"
4 34
5#include "addi-data/addi_common.c" 35/*
36 * PCI device ids supported by this driver
37 */
38#define PCI_DEVICE_ID_APCI1016 0x1000
39#define PCI_DEVICE_ID_APCI1516 0x1001
40#define PCI_DEVICE_ID_APCI2016 0x1002
6 41
42/*
43 * PCI bar 1 I/O Register map - Digital input/output
44 */
45#define APCI1516_DI_REG 0x00
46#define APCI1516_DO_REG 0x04
47
48/*
49 * PCI bar 2 I/O Register map - Watchdog (APCI-1516 and APCI-2016)
50 */
51#define APCI1516_WDOG_REG 0x00
52#define APCI1516_WDOG_RELOAD_REG 0x04
53#define APCI1516_WDOG_CTRL_REG 0x0c
54#define APCI1516_WDOG_CTRL_ENABLE (1 << 0)
55#define APCI1516_WDOG_CTRL_SW_TRIG (1 << 9)
56#define APCI1516_WDOG_STATUS_REG 0x10
57#define APCI1516_WDOG_STATUS_ENABLED (1 << 0)
58#define APCI1516_WDOG_STATUS_SW_TRIG (1 << 1)
59
60struct apci1516_boardinfo {
61 const char *name;
62 unsigned short device;
63 int di_nchan;
64 int do_nchan;
65 int has_wdog;
66};
67
68static const struct apci1516_boardinfo apci1516_boardtypes[] = {
69 {
70 .name = "apci1016",
71 .device = PCI_DEVICE_ID_APCI1016,
72 .di_nchan = 16,
73 }, {
74 .name = "apci1516",
75 .device = PCI_DEVICE_ID_APCI1516,
76 .di_nchan = 8,
77 .do_nchan = 8,
78 .has_wdog = 1,
79 }, {
80 .name = "apci2016",
81 .device = PCI_DEVICE_ID_APCI2016,
82 .do_nchan = 16,
83 .has_wdog = 1,
84 },
85};
86
87struct apci1516_private {
88 unsigned long wdog_iobase;
89 unsigned int ctrl;
90};
91
92static int apci1516_di_insn_bits(struct comedi_device *dev,
93 struct comedi_subdevice *s,
94 struct comedi_insn *insn,
95 unsigned int *data)
96{
97 data[1] = inw(dev->iobase + APCI1516_DI_REG);
98
99 return insn->n;
100}
101
102static int apci1516_do_insn_bits(struct comedi_device *dev,
103 struct comedi_subdevice *s,
104 struct comedi_insn *insn,
105 unsigned int *data)
106{
107 unsigned int mask = data[0];
108 unsigned int bits = data[1];
109
110 s->state = inw(dev->iobase + APCI1516_DO_REG);
111 if (mask) {
112 s->state &= ~mask;
113 s->state |= (bits & mask);
114
115 outw(s->state, dev->iobase + APCI1516_DO_REG);
116 }
117
118 data[1] = s->state;
119
120 return insn->n;
121}
122
123/*
124 * The watchdog subdevice is configured with two INSN_CONFIG instructions:
125 *
126 * Enable the watchdog and set the reload timeout:
127 * data[0] = INSN_CONFIG_ARM
128 * data[1] = timeout reload value
129 *
130 * Disable the watchdog:
131 * data[0] = INSN_CONFIG_DISARM
132 */
133static int apci1516_wdog_insn_config(struct comedi_device *dev,
134 struct comedi_subdevice *s,
135 struct comedi_insn *insn,
136 unsigned int *data)
137{
138 struct apci1516_private *devpriv = dev->private;
139 unsigned int reload;
140
141 switch (data[0]) {
142 case INSN_CONFIG_ARM:
143 devpriv->ctrl = APCI1516_WDOG_CTRL_ENABLE;
144 reload = data[1] & s->maxdata;
145 outw(reload, devpriv->wdog_iobase + APCI1516_WDOG_RELOAD_REG);
146
147 /* Time base is 20ms, let the user know the timeout */
148 dev_info(dev->class_dev, "watchdog enabled, timeout:%dms\n",
149 20 * reload + 20);
150 break;
151 case INSN_CONFIG_DISARM:
152 devpriv->ctrl = 0;
153 break;
154 default:
155 return -EINVAL;
156 }
157
158 outw(devpriv->ctrl, devpriv->wdog_iobase + APCI1516_WDOG_CTRL_REG);
159
160 return insn->n;
161}
162
163static int apci1516_wdog_insn_write(struct comedi_device *dev,
164 struct comedi_subdevice *s,
165 struct comedi_insn *insn,
166 unsigned int *data)
167{
168 struct apci1516_private *devpriv = dev->private;
169 int i;
170
171 if (devpriv->ctrl == 0) {
172 dev_warn(dev->class_dev, "watchdog is disabled\n");
173 return -EINVAL;
174 }
175
176 /* "ping" the watchdog */
177 for (i = 0; i < insn->n; i++) {
178 outw(devpriv->ctrl | APCI1516_WDOG_CTRL_SW_TRIG,
179 devpriv->wdog_iobase + APCI1516_WDOG_CTRL_REG);
180 }
181
182 return insn->n;
183}
184
185static int apci1516_wdog_insn_read(struct comedi_device *dev,
186 struct comedi_subdevice *s,
187 struct comedi_insn *insn,
188 unsigned int *data)
189{
190 struct apci1516_private *devpriv = dev->private;
191 int i;
192
193 for (i = 0; i < insn->n; i++)
194 data[i] = inw(devpriv->wdog_iobase + APCI1516_WDOG_STATUS_REG);
195
196 return insn->n;
197}
198
199static int apci1516_reset(struct comedi_device *dev)
200{
201 const struct apci1516_boardinfo *this_board = comedi_board(dev);
202 struct apci1516_private *devpriv = dev->private;
203
204 if (!this_board->has_wdog)
205 return 0;
206
207 outw(0x0, dev->iobase + APCI1516_DO_REG);
208 outw(0x0, devpriv->wdog_iobase + APCI1516_WDOG_CTRL_REG);
209 outw(0x0, devpriv->wdog_iobase + APCI1516_WDOG_RELOAD_REG);
210
211 return 0;
212}
213
214static const void *apci1516_find_boardinfo(struct comedi_device *dev,
215 struct pci_dev *pcidev)
216{
217 const struct apci1516_boardinfo *this_board;
218 int i;
219
220 for (i = 0; i < dev->driver->num_names; i++) {
221 this_board = &apci1516_boardtypes[i];
222 if (this_board->device == pcidev->device)
223 return this_board;
224 }
225 return NULL;
226}
227
228static int apci1516_auto_attach(struct comedi_device *dev,
229 unsigned long context_unused)
230{
231 struct pci_dev *pcidev = comedi_to_pci_dev(dev);
232 const struct apci1516_boardinfo *this_board;
233 struct apci1516_private *devpriv;
234 struct comedi_subdevice *s;
235 int ret;
236
237 this_board = apci1516_find_boardinfo(dev, pcidev);
238 if (!this_board)
239 return -ENODEV;
240 dev->board_ptr = this_board;
241 dev->board_name = this_board->name;
242
243 devpriv = kzalloc(sizeof(*devpriv), GFP_KERNEL);
244 if (!devpriv)
245 return -ENOMEM;
246 dev->private = devpriv;
247
248 ret = comedi_pci_enable(pcidev, dev->board_name);
249 if (ret)
250 return ret;
251
252 dev->iobase = pci_resource_start(pcidev, 1);
253 devpriv->wdog_iobase = pci_resource_start(pcidev, 2);
254
255 ret = comedi_alloc_subdevices(dev, 3);
256 if (ret)
257 return ret;
258
259 /* Initialize the digital input subdevice */
260 s = &dev->subdevices[0];
261 if (this_board->di_nchan) {
262 s->type = COMEDI_SUBD_DI;
263 s->subdev_flags = SDF_READABLE;
264 s->n_chan = this_board->di_nchan;
265 s->maxdata = 1;
266 s->range_table = &range_digital;
267 s->insn_bits = apci1516_di_insn_bits;
268 } else {
269 s->type = COMEDI_SUBD_UNUSED;
270 }
271
272 /* Initialize the digital output subdevice */
273 s = &dev->subdevices[1];
274 if (this_board->do_nchan) {
275 s->type = COMEDI_SUBD_DO;
276 s->subdev_flags = SDF_WRITEABLE;
277 s->n_chan = this_board->do_nchan;
278 s->maxdata = 1;
279 s->range_table = &range_digital;
280 s->insn_bits = apci1516_do_insn_bits;
281 } else {
282 s->type = COMEDI_SUBD_UNUSED;
283 }
284
285 /* Initialize the watchdog subdevice */
286 s = &dev->subdevices[2];
287 if (this_board->has_wdog) {
288 s->type = COMEDI_SUBD_TIMER;
289 s->subdev_flags = SDF_WRITEABLE;
290 s->n_chan = 1;
291 s->maxdata = 0xff;
292 s->insn_write = apci1516_wdog_insn_write;
293 s->insn_read = apci1516_wdog_insn_read;
294 s->insn_config = apci1516_wdog_insn_config;
295 } else {
296 s->type = COMEDI_SUBD_UNUSED;
297 }
298
299 apci1516_reset(dev);
300 return 0;
301}
302
303static void apci1516_detach(struct comedi_device *dev)
304{
305 struct pci_dev *pcidev = comedi_to_pci_dev(dev);
306
307 if (dev->iobase) {
308 apci1516_reset(dev);
309 comedi_pci_disable(pcidev);
310 }
311}
312
313static struct comedi_driver apci1516_driver = {
314 .driver_name = "addi_apci_1516",
315 .module = THIS_MODULE,
316 .auto_attach = apci1516_auto_attach,
317 .detach = apci1516_detach,
318};
319
320static int apci1516_pci_probe(struct pci_dev *dev,
321 const struct pci_device_id *ent)
322{
323 return comedi_pci_auto_config(dev, &apci1516_driver);
324}
325
326static void apci1516_pci_remove(struct pci_dev *dev)
327{
328 comedi_pci_auto_unconfig(dev);
329}
330
331static DEFINE_PCI_DEVICE_TABLE(apci1516_pci_table) = {
332 { PCI_DEVICE(PCI_VENDOR_ID_ADDIDATA, PCI_DEVICE_ID_APCI1016) },
333 { PCI_DEVICE(PCI_VENDOR_ID_ADDIDATA, PCI_DEVICE_ID_APCI1516) },
334 { PCI_DEVICE(PCI_VENDOR_ID_ADDIDATA, PCI_DEVICE_ID_APCI2016) },
335 { 0 }
336};
337MODULE_DEVICE_TABLE(pci, apci1516_pci_table);
338
339static struct pci_driver apci1516_pci_driver = {
340 .name = "addi_apci_1516",
341 .id_table = apci1516_pci_table,
342 .probe = apci1516_pci_probe,
343 .remove = apci1516_pci_remove,
344};
345module_comedi_pci_driver(apci1516_driver, apci1516_pci_driver);
346
347MODULE_DESCRIPTION("ADDI-DATA APCI-1016/1516/2016, 16 channel DIO boards");
7MODULE_AUTHOR("Comedi http://www.comedi.org"); 348MODULE_AUTHOR("Comedi http://www.comedi.org");
8MODULE_DESCRIPTION("Comedi low-level driver");
9MODULE_LICENSE("GPL"); 349MODULE_LICENSE("GPL");
diff --git a/drivers/staging/comedi/drivers/addi_apci_1564.c b/drivers/staging/comedi/drivers/addi_apci_1564.c
index 1b9d598fb6ca..513e536f292f 100644
--- a/drivers/staging/comedi/drivers/addi_apci_1564.c
+++ b/drivers/staging/comedi/drivers/addi_apci_1564.c
@@ -1,9 +1,74 @@
1#define CONFIG_APCI_1564 1 1#include "../comedidev.h"
2#include "comedi_fc.h"
3#include "amcc_s5933.h"
2 4
3#define ADDIDATA_DRIVER_NAME "addi_apci_1564" 5#include "addi-data/addi_common.h"
4 6
7#include "addi-data/addi_eeprom.c"
8#include "addi-data/hwdrv_apci1564.c"
5#include "addi-data/addi_common.c" 9#include "addi-data/addi_common.c"
6 10
11static const struct addi_board apci1564_boardtypes[] = {
12 {
13 .pc_DriverName = "apci1564",
14 .i_VendorId = PCI_VENDOR_ID_ADDIDATA,
15 .i_DeviceId = 0x1006,
16 .i_IorangeBase0 = 128,
17 .i_IorangeBase1 = APCI1564_ADDRESS_RANGE,
18 .i_PCIEeprom = ADDIDATA_EEPROM,
19 .pc_EepromChip = ADDIDATA_93C76,
20 .i_NbrDiChannel = 32,
21 .i_NbrDoChannel = 32,
22 .i_DoMaxdata = 0xffffffff,
23 .i_Timer = 1,
24 .interrupt = v_APCI1564_Interrupt,
25 .reset = i_APCI1564_Reset,
26 .di_config = i_APCI1564_ConfigDigitalInput,
27 .di_bits = apci1564_di_insn_bits,
28 .do_config = i_APCI1564_ConfigDigitalOutput,
29 .do_bits = apci1564_do_insn_bits,
30 .do_read = i_APCI1564_ReadInterruptStatus,
31 .timer_config = i_APCI1564_ConfigTimerCounterWatchdog,
32 .timer_write = i_APCI1564_StartStopWriteTimerCounterWatchdog,
33 .timer_read = i_APCI1564_ReadTimerCounterWatchdog,
34 },
35};
36
37static struct comedi_driver apci1564_driver = {
38 .driver_name = "addi_apci_1564",
39 .module = THIS_MODULE,
40 .auto_attach = addi_auto_attach,
41 .detach = i_ADDI_Detach,
42 .num_names = ARRAY_SIZE(apci1564_boardtypes),
43 .board_name = &apci1564_boardtypes[0].pc_DriverName,
44 .offset = sizeof(struct addi_board),
45};
46
47static int apci1564_pci_probe(struct pci_dev *dev,
48 const struct pci_device_id *ent)
49{
50 return comedi_pci_auto_config(dev, &apci1564_driver);
51}
52
53static void apci1564_pci_remove(struct pci_dev *dev)
54{
55 comedi_pci_auto_unconfig(dev);
56}
57
58static DEFINE_PCI_DEVICE_TABLE(apci1564_pci_table) = {
59 { PCI_DEVICE(PCI_VENDOR_ID_ADDIDATA, 0x1006) },
60 { 0 }
61};
62MODULE_DEVICE_TABLE(pci, apci1564_pci_table);
63
64static struct pci_driver apci1564_pci_driver = {
65 .name = "addi_apci_1564",
66 .id_table = apci1564_pci_table,
67 .probe = apci1564_pci_probe,
68 .remove = apci1564_pci_remove,
69};
70module_comedi_pci_driver(apci1564_driver, apci1564_pci_driver);
71
7MODULE_AUTHOR("Comedi http://www.comedi.org"); 72MODULE_AUTHOR("Comedi http://www.comedi.org");
8MODULE_DESCRIPTION("Comedi low-level driver"); 73MODULE_DESCRIPTION("Comedi low-level driver");
9MODULE_LICENSE("GPL"); 74MODULE_LICENSE("GPL");
diff --git a/drivers/staging/comedi/drivers/addi_apci_16xx.c b/drivers/staging/comedi/drivers/addi_apci_16xx.c
index d54218d59c58..ab9a96ac8180 100644
--- a/drivers/staging/comedi/drivers/addi_apci_16xx.c
+++ b/drivers/staging/comedi/drivers/addi_apci_16xx.c
@@ -1,9 +1,77 @@
1#define CONFIG_APCI_16XX 1 1#include "../comedidev.h"
2#include "comedi_fc.h"
3#include "amcc_s5933.h"
2 4
3#define ADDIDATA_DRIVER_NAME "addi_apci_16xx" 5#include "addi-data/addi_common.h"
4 6
7#include "addi-data/addi_eeprom.c"
8#include "addi-data/hwdrv_apci16xx.c"
5#include "addi-data/addi_common.c" 9#include "addi-data/addi_common.c"
6 10
11static const struct addi_board apci16xx_boardtypes[] = {
12 {
13 .pc_DriverName = "apci1648",
14 .i_VendorId = PCI_VENDOR_ID_ADDIDATA,
15 .i_DeviceId = 0x1009,
16 .i_IorangeBase0 = 128,
17 .i_PCIEeprom = ADDIDATA_NO_EEPROM,
18 .i_NbrTTLChannel = 48,
19 .reset = i_APCI16XX_Reset,
20 .ttl_config = i_APCI16XX_InsnConfigInitTTLIO,
21 .ttl_bits = i_APCI16XX_InsnBitsReadTTLIO,
22 .ttl_read = i_APCI16XX_InsnReadTTLIOAllPortValue,
23 .ttl_write = i_APCI16XX_InsnBitsWriteTTLIO,
24 }, {
25 .pc_DriverName = "apci1696",
26 .i_VendorId = PCI_VENDOR_ID_ADDIDATA,
27 .i_DeviceId = 0x100A,
28 .i_IorangeBase0 = 128,
29 .i_PCIEeprom = ADDIDATA_NO_EEPROM,
30 .i_NbrTTLChannel = 96,
31 .reset = i_APCI16XX_Reset,
32 .ttl_config = i_APCI16XX_InsnConfigInitTTLIO,
33 .ttl_bits = i_APCI16XX_InsnBitsReadTTLIO,
34 .ttl_read = i_APCI16XX_InsnReadTTLIOAllPortValue,
35 .ttl_write = i_APCI16XX_InsnBitsWriteTTLIO,
36 },
37};
38
39static struct comedi_driver apci16xx_driver = {
40 .driver_name = "addi_apci_16xx",
41 .module = THIS_MODULE,
42 .auto_attach = addi_auto_attach,
43 .detach = i_ADDI_Detach,
44 .num_names = ARRAY_SIZE(apci16xx_boardtypes),
45 .board_name = &apci16xx_boardtypes[0].pc_DriverName,
46 .offset = sizeof(struct addi_board),
47};
48
49static int apci16xx_pci_probe(struct pci_dev *dev,
50 const struct pci_device_id *ent)
51{
52 return comedi_pci_auto_config(dev, &apci16xx_driver);
53}
54
55static void apci16xx_pci_remove(struct pci_dev *dev)
56{
57 comedi_pci_auto_unconfig(dev);
58}
59
60static DEFINE_PCI_DEVICE_TABLE(apci16xx_pci_table) = {
61 { PCI_DEVICE(PCI_VENDOR_ID_ADDIDATA, 0x1009) },
62 { PCI_DEVICE(PCI_VENDOR_ID_ADDIDATA, 0x100a) },
63 { 0 }
64};
65MODULE_DEVICE_TABLE(pci, apci16xx_pci_table);
66
67static struct pci_driver apci16xx_pci_driver = {
68 .name = "addi_apci_16xx",
69 .id_table = apci16xx_pci_table,
70 .probe = apci16xx_pci_probe,
71 .remove = apci16xx_pci_remove,
72};
73module_comedi_pci_driver(apci16xx_driver, apci16xx_pci_driver);
74
7MODULE_AUTHOR("Comedi http://www.comedi.org"); 75MODULE_AUTHOR("Comedi http://www.comedi.org");
8MODULE_DESCRIPTION("Comedi low-level driver"); 76MODULE_DESCRIPTION("Comedi low-level driver");
9MODULE_LICENSE("GPL"); 77MODULE_LICENSE("GPL");
diff --git a/drivers/staging/comedi/drivers/addi_apci_1710.c b/drivers/staging/comedi/drivers/addi_apci_1710.c
index df6ba8ccf56f..152e7ef9b17b 100644
--- a/drivers/staging/comedi/drivers/addi_apci_1710.c
+++ b/drivers/staging/comedi/drivers/addi_apci_1710.c
@@ -1,5 +1,152 @@
1#define CONFIG_APCI_1710 1 1#include <asm/i387.h>
2 2
3#define ADDIDATA_DRIVER_NAME "addi_apci_1710" 3#include "../comedidev.h"
4#include "comedi_fc.h"
5#include "amcc_s5933.h"
4 6
5#include "addi-data/addi_common.c" 7#include "addi-data/addi_common.h"
8
9static void fpu_begin(void)
10{
11 kernel_fpu_begin();
12}
13
14static void fpu_end(void)
15{
16 kernel_fpu_end();
17}
18
19#include "addi-data/addi_eeprom.c"
20#include "addi-data/hwdrv_APCI1710.c"
21
22static const struct addi_board apci1710_boardtypes[] = {
23 {
24 .pc_DriverName = "apci1710",
25 .i_VendorId = PCI_VENDOR_ID_ADDIDATA_OLD,
26 .i_DeviceId = APCI1710_BOARD_DEVICE_ID,
27 .interrupt = v_APCI1710_Interrupt,
28 },
29};
30
31static irqreturn_t v_ADDI_Interrupt(int irq, void *d)
32{
33 struct comedi_device *dev = d;
34 const struct addi_board *this_board = comedi_board(dev);
35
36 this_board->interrupt(irq, d);
37 return IRQ_RETVAL(1);
38}
39
40static const void *apci1710_find_boardinfo(struct comedi_device *dev,
41 struct pci_dev *pcidev)
42{
43 const struct addi_board *this_board;
44 int i;
45
46 for (i = 0; i < ARRAY_SIZE(apci1710_boardtypes); i++) {
47 this_board = &apci1710_boardtypes[i];
48 if (this_board->i_VendorId == pcidev->vendor &&
49 this_board->i_DeviceId == pcidev->device)
50 return this_board;
51 }
52 return NULL;
53}
54
55static int apci1710_auto_attach(struct comedi_device *dev,
56 unsigned long context_unused)
57{
58 struct pci_dev *pcidev = comedi_to_pci_dev(dev);
59 const struct addi_board *this_board;
60 struct addi_private *devpriv;
61 struct comedi_subdevice *s;
62 int ret;
63
64 this_board = apci1710_find_boardinfo(dev, pcidev);
65 if (!this_board)
66 return -ENODEV;
67 dev->board_ptr = this_board;
68 dev->board_name = this_board->pc_DriverName;
69
70 devpriv = kzalloc(sizeof(*devpriv), GFP_KERNEL);
71 if (!devpriv)
72 return -ENOMEM;
73 dev->private = devpriv;
74
75 ret = comedi_pci_enable(pcidev, dev->board_name);
76 if (ret)
77 return ret;
78
79 if (this_board->i_IorangeBase1)
80 dev->iobase = pci_resource_start(pcidev, 1);
81 else
82 dev->iobase = pci_resource_start(pcidev, 0);
83
84 devpriv->iobase = dev->iobase;
85 devpriv->i_IobaseAmcc = pci_resource_start(pcidev, 0);
86 devpriv->i_IobaseAddon = pci_resource_start(pcidev, 2);
87 devpriv->i_IobaseReserved = pci_resource_start(pcidev, 3);
88
89 if (pcidev->irq > 0) {
90 ret = request_irq(pcidev->irq, v_ADDI_Interrupt, IRQF_SHARED,
91 dev->board_name, dev);
92 if (ret == 0)
93 dev->irq = pcidev->irq;
94 }
95
96 i_ADDI_AttachPCI1710(dev);
97
98 devpriv->s_BoardInfos.ui_Address = pci_resource_start(pcidev, 2);
99
100 i_APCI1710_Reset(dev);
101 return 0;
102}
103
104static void apci1710_detach(struct comedi_device *dev)
105{
106 struct pci_dev *pcidev = comedi_to_pci_dev(dev);
107
108 if (dev->iobase)
109 i_APCI1710_Reset(dev);
110 if (dev->irq)
111 free_irq(dev->irq, dev);
112 if (pcidev) {
113 if (dev->iobase)
114 comedi_pci_disable(pcidev);
115 }
116}
117
118static struct comedi_driver apci1710_driver = {
119 .driver_name = "addi_apci_1710",
120 .module = THIS_MODULE,
121 .auto_attach = apci1710_auto_attach,
122 .detach = apci1710_detach,
123};
124
125static int apci1710_pci_probe(struct pci_dev *dev,
126 const struct pci_device_id *ent)
127{
128 return comedi_pci_auto_config(dev, &apci1710_driver);
129}
130
131static void apci1710_pci_remove(struct pci_dev *dev)
132{
133 comedi_pci_auto_unconfig(dev);
134}
135
136static DEFINE_PCI_DEVICE_TABLE(apci1710_pci_table) = {
137 { PCI_DEVICE(PCI_VENDOR_ID_ADDIDATA_OLD, APCI1710_BOARD_DEVICE_ID) },
138 { 0 }
139};
140MODULE_DEVICE_TABLE(pci, apci1710_pci_table);
141
142static struct pci_driver apci1710_pci_driver = {
143 .name = "addi_apci_1710",
144 .id_table = apci1710_pci_table,
145 .probe = apci1710_pci_probe,
146 .remove = apci1710_pci_remove,
147};
148module_comedi_pci_driver(apci1710_driver, apci1710_pci_driver);
149
150MODULE_AUTHOR("Comedi http://www.comedi.org");
151MODULE_DESCRIPTION("Comedi low-level driver");
152MODULE_LICENSE("GPL");
diff --git a/drivers/staging/comedi/drivers/addi_apci_2016.c b/drivers/staging/comedi/drivers/addi_apci_2016.c
deleted file mode 100644
index fa50c7bb7ade..000000000000
--- a/drivers/staging/comedi/drivers/addi_apci_2016.c
+++ /dev/null
@@ -1,9 +0,0 @@
1#define CONFIG_APCI_2016 1
2
3#define ADDIDATA_DRIVER_NAME "addi_apci_2016"
4
5#include "addi-data/addi_common.c"
6
7MODULE_AUTHOR("Comedi http://www.comedi.org");
8MODULE_DESCRIPTION("Comedi low-level driver");
9MODULE_LICENSE("GPL");
diff --git a/drivers/staging/comedi/drivers/addi_apci_2032.c b/drivers/staging/comedi/drivers/addi_apci_2032.c
index 073a8a56dbe4..8f8d3e95fc78 100644
--- a/drivers/staging/comedi/drivers/addi_apci_2032.c
+++ b/drivers/staging/comedi/drivers/addi_apci_2032.c
@@ -1,8 +1,383 @@
1#define CONFIG_APCI_2032 1 1/*
2 * addi_apci_2032.c
3 * Copyright (C) 2004,2005 ADDI-DATA GmbH for the source code of this module.
4 * Project manager: Eric Stolz
5 *
6 * ADDI-DATA GmbH
7 * Dieselstrasse 3
8 * D-77833 Ottersweier
9 * Tel: +19(0)7223/9493-0
10 * Fax: +49(0)7223/9493-92
11 * http://www.addi-data.com
12 * info@addi-data.com
13 *
14 * This program is free software; you can redistribute it and/or modify it
15 * under the terms of the GNU General Public License as published by the
16 * Free Software Foundation; either version 2 of the License, or (at your
17 * option) any later version.
18 *
19 * This program is distributed in the hope that it will be useful, but WITHOUT
20 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
21 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
22 * more details.
23 *
24 * You should have received a copy of the GNU General Public License along
25 * with this program; if not, write to the Free Software Foundation, Inc.,
26 * 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
27 *
28 * You should also find the complete GPL in the COPYING file accompanying
29 * this source code.
30 */
2 31
3#define ADDIDATA_DRIVER_NAME "addi_apci_2032" 32#include "../comedidev.h"
33#include "comedi_fc.h"
4 34
5#include "addi-data/addi_common.c" 35/*
36 * PCI bar 1 I/O Register map
37 */
38#define APCI2032_DO_REG 0x00
39#define APCI2032_INT_CTRL_REG 0x04
40#define APCI2032_INT_CTRL_VCC_ENA (1 << 0)
41#define APCI2032_INT_CTRL_CC_ENA (1 << 1)
42#define APCI2032_INT_STATUS_REG 0x08
43#define APCI2032_INT_STATUS_VCC (1 << 0)
44#define APCI2032_INT_STATUS_CC (1 << 1)
45#define APCI2032_STATUS_REG 0x0c
46#define APCI2032_STATUS_IRQ (1 << 0)
47#define APCI2032_WDOG_REG 0x10
48#define APCI2032_WDOG_RELOAD_REG 0x14
49#define APCI2032_WDOG_TIMEBASE 0x18
50#define APCI2032_WDOG_CTRL_REG 0x1c
51#define APCI2032_WDOG_CTRL_ENABLE (1 << 0)
52#define APCI2032_WDOG_CTRL_SW_TRIG (1 << 9)
53#define APCI2032_WDOG_STATUS_REG 0x20
54#define APCI2032_WDOG_STATUS_ENABLED (1 << 0)
55#define APCI2032_WDOG_STATUS_SW_TRIG (1 << 1)
56
57struct apci2032_private {
58 unsigned int wdog_ctrl;
59};
60
61static int apci2032_do_insn_bits(struct comedi_device *dev,
62 struct comedi_subdevice *s,
63 struct comedi_insn *insn,
64 unsigned int *data)
65{
66 unsigned int mask = data[0];
67 unsigned int bits = data[1];
68
69 s->state = inl(dev->iobase + APCI2032_DO_REG);
70 if (mask) {
71 s->state &= ~mask;
72 s->state |= (bits & mask);
73
74 outl(s->state, dev->iobase + APCI2032_DO_REG);
75 }
76
77 data[1] = s->state;
78
79 return insn->n;
80}
81
82/*
83 * The watchdog subdevice is configured with two INSN_CONFIG instructions:
84 *
85 * Enable the watchdog and set the reload timeout:
86 * data[0] = INSN_CONFIG_ARM
87 * data[1] = timeout reload value
88 *
89 * Disable the watchdog:
90 * data[0] = INSN_CONFIG_DISARM
91 */
92static int apci2032_wdog_insn_config(struct comedi_device *dev,
93 struct comedi_subdevice *s,
94 struct comedi_insn *insn,
95 unsigned int *data)
96{
97 struct apci2032_private *devpriv = dev->private;
98 unsigned int reload;
99
100 switch (data[0]) {
101 case INSN_CONFIG_ARM:
102 devpriv->wdog_ctrl = APCI2032_WDOG_CTRL_ENABLE;
103 reload = data[1] & s->maxdata;
104 outw(reload, dev->iobase + APCI2032_WDOG_RELOAD_REG);
105
106 /* Time base is 20ms, let the user know the timeout */
107 dev_info(dev->class_dev, "watchdog enabled, timeout:%dms\n",
108 20 * reload + 20);
109 break;
110 case INSN_CONFIG_DISARM:
111 devpriv->wdog_ctrl = 0;
112 break;
113 default:
114 return -EINVAL;
115 }
116
117 outw(devpriv->wdog_ctrl, dev->iobase + APCI2032_WDOG_CTRL_REG);
118
119 return insn->n;
120}
121
122static int apci2032_wdog_insn_write(struct comedi_device *dev,
123 struct comedi_subdevice *s,
124 struct comedi_insn *insn,
125 unsigned int *data)
126{
127 struct apci2032_private *devpriv = dev->private;
128 int i;
129
130 if (devpriv->wdog_ctrl == 0) {
131 dev_warn(dev->class_dev, "watchdog is disabled\n");
132 return -EINVAL;
133 }
134
135 /* "ping" the watchdog */
136 for (i = 0; i < insn->n; i++) {
137 outw(devpriv->wdog_ctrl | APCI2032_WDOG_CTRL_SW_TRIG,
138 dev->iobase + APCI2032_WDOG_CTRL_REG);
139 }
140
141 return insn->n;
142}
143
144static int apci2032_wdog_insn_read(struct comedi_device *dev,
145 struct comedi_subdevice *s,
146 struct comedi_insn *insn,
147 unsigned int *data)
148{
149 int i;
150
151 for (i = 0; i < insn->n; i++)
152 data[i] = inl(dev->iobase + APCI2032_WDOG_STATUS_REG);
153
154 return insn->n;
155}
156
157static int apci2032_int_insn_bits(struct comedi_device *dev,
158 struct comedi_subdevice *s,
159 struct comedi_insn *insn,
160 unsigned int *data)
161{
162 data[1] = s->state;
163 return insn->n;
164}
165
166static int apci2032_int_cmdtest(struct comedi_device *dev,
167 struct comedi_subdevice *s,
168 struct comedi_cmd *cmd)
169{
170 int err = 0;
171
172 /* Step 1 : check if triggers are trivially valid */
173
174 err |= cfc_check_trigger_src(&cmd->start_src, TRIG_NOW);
175 err |= cfc_check_trigger_src(&cmd->scan_begin_src, TRIG_OTHER);
176 err |= cfc_check_trigger_src(&cmd->convert_src, TRIG_FOLLOW);
177 err |= cfc_check_trigger_src(&cmd->scan_end_src, TRIG_COUNT);
178 err |= cfc_check_trigger_src(&cmd->stop_src, TRIG_NONE);
179
180 if (err)
181 return 1;
182
183 /* Step 2a : make sure trigger sources are unique */
184 /* Step 2b : and mutually compatible */
185
186 if (err)
187 return 2;
188
189 /* Step 3: check if arguments are trivially valid */
190
191 err |= cfc_check_trigger_arg_is(&cmd->start_arg, 0);
192
193 /*
194 * 0 == no trigger
195 * 1 == trigger on VCC interrupt
196 * 2 == trigger on CC interrupt
197 * 3 == trigger on either VCC or CC interrupt
198 */
199 err |= cfc_check_trigger_arg_max(&cmd->scan_begin_arg, 3);
200
201 err |= cfc_check_trigger_arg_is(&cmd->convert_arg, 0);
202 err |= cfc_check_trigger_arg_is(&cmd->scan_end_arg, 1);
203 err |= cfc_check_trigger_arg_is(&cmd->stop_arg, 0);
204
205 if (err)
206 return 3;
207
208 /* step 4: ignored */
209
210 if (err)
211 return 4;
212
213 return 0;
214}
215
216static int apci2032_int_cmd(struct comedi_device *dev,
217 struct comedi_subdevice *s)
218{
219 struct comedi_cmd *cmd = &s->async->cmd;
220
221 outl(cmd->scan_begin_arg, dev->iobase + APCI2032_INT_CTRL_REG);
222
223 return 0;
224}
225
226static int apci2032_int_cancel(struct comedi_device *dev,
227 struct comedi_subdevice *s)
228{
229 outl(0x0, dev->iobase + APCI2032_INT_CTRL_REG);
230
231 return 0;
232}
233
234static irqreturn_t apci2032_interrupt(int irq, void *d)
235{
236 struct comedi_device *dev = d;
237 struct comedi_subdevice *s = dev->read_subdev;
238 unsigned int val;
239
240 /* Check if VCC OR CC interrupt has occurred */
241 val = inl(dev->iobase + APCI2032_STATUS_REG) & APCI2032_STATUS_IRQ;
242 if (!val)
243 return IRQ_NONE;
244
245 s->state = inl(dev->iobase + APCI2032_INT_STATUS_REG);
246 outl(0x0, dev->iobase + APCI2032_INT_CTRL_REG);
247
248 comedi_buf_put(s->async, s->state);
249 s->async->events |= COMEDI_CB_BLOCK | COMEDI_CB_EOS;
250 comedi_event(dev, s);
251
252 return IRQ_HANDLED;
253}
254
255static int apci2032_reset(struct comedi_device *dev)
256{
257 outl(0x0, dev->iobase + APCI2032_DO_REG);
258 outl(0x0, dev->iobase + APCI2032_INT_CTRL_REG);
259 outl(0x0, dev->iobase + APCI2032_WDOG_CTRL_REG);
260 outl(0x0, dev->iobase + APCI2032_WDOG_RELOAD_REG);
261
262 return 0;
263}
264
265static int apci2032_auto_attach(struct comedi_device *dev,
266 unsigned long context_unused)
267{
268 struct pci_dev *pcidev = comedi_to_pci_dev(dev);
269 struct apci2032_private *devpriv;
270 struct comedi_subdevice *s;
271 int ret;
272
273 dev->board_name = dev->driver->driver_name;
274
275 devpriv = kzalloc(sizeof(*devpriv), GFP_KERNEL);
276 if (!devpriv)
277 return -ENOMEM;
278 dev->private = devpriv;
279
280 ret = comedi_pci_enable(pcidev, dev->board_name);
281 if (ret)
282 return ret;
283 dev->iobase = pci_resource_start(pcidev, 1);
284
285 if (pcidev->irq > 0) {
286 ret = request_irq(pcidev->irq, apci2032_interrupt,
287 IRQF_SHARED, dev->board_name, dev);
288 if (ret == 0)
289 dev->irq = pcidev->irq;
290 }
291
292 ret = comedi_alloc_subdevices(dev, 3);
293 if (ret)
294 return ret;
295
296 /* Initialize the digital output subdevice */
297 s = &dev->subdevices[0];
298 s->type = COMEDI_SUBD_DO;
299 s->subdev_flags = SDF_WRITEABLE;
300 s->n_chan = 32;
301 s->maxdata = 1;
302 s->range_table = &range_digital;
303 s->insn_bits = apci2032_do_insn_bits;
304
305 /* Initialize the watchdog subdevice */
306 s = &dev->subdevices[1];
307 s->type = COMEDI_SUBD_TIMER;
308 s->subdev_flags = SDF_WRITEABLE;
309 s->n_chan = 1;
310 s->maxdata = 0xff;
311 s->insn_write = apci2032_wdog_insn_write;
312 s->insn_read = apci2032_wdog_insn_read;
313 s->insn_config = apci2032_wdog_insn_config;
314
315 /* Initialize the interrupt subdevice */
316 s = &dev->subdevices[2];
317 if (dev->irq) {
318 dev->read_subdev = s;
319 s->type = COMEDI_SUBD_DI | SDF_CMD_READ;
320 s->subdev_flags = SDF_READABLE;
321 s->n_chan = 1;
322 s->maxdata = 1;
323 s->range_table = &range_digital;
324 s->insn_bits = apci2032_int_insn_bits;
325 s->do_cmdtest = apci2032_int_cmdtest;
326 s->do_cmd = apci2032_int_cmd;
327 s->cancel = apci2032_int_cancel;
328 } else {
329 s->type = COMEDI_SUBD_UNUSED;
330 }
331
332 apci2032_reset(dev);
333 return 0;
334}
335
336static void apci2032_detach(struct comedi_device *dev)
337{
338 struct pci_dev *pcidev = comedi_to_pci_dev(dev);
339
340 if (dev->iobase)
341 apci2032_reset(dev);
342 if (dev->irq)
343 free_irq(dev->irq, dev);
344 if (pcidev) {
345 if (dev->iobase)
346 comedi_pci_disable(pcidev);
347 }
348}
349
350static struct comedi_driver apci2032_driver = {
351 .driver_name = "addi_apci_2032",
352 .module = THIS_MODULE,
353 .auto_attach = apci2032_auto_attach,
354 .detach = apci2032_detach,
355};
356
357static int apci2032_pci_probe(struct pci_dev *dev,
358 const struct pci_device_id *ent)
359{
360 return comedi_pci_auto_config(dev, &apci2032_driver);
361}
362
363static void apci2032_pci_remove(struct pci_dev *dev)
364{
365 comedi_pci_auto_unconfig(dev);
366}
367
368static DEFINE_PCI_DEVICE_TABLE(apci2032_pci_table) = {
369 { PCI_DEVICE(PCI_VENDOR_ID_ADDIDATA, 0x1004) },
370 { 0 }
371};
372MODULE_DEVICE_TABLE(pci, apci2032_pci_table);
373
374static struct pci_driver apci2032_pci_driver = {
375 .name = "addi_apci_2032",
376 .id_table = apci2032_pci_table,
377 .probe = apci2032_pci_probe,
378 .remove = apci2032_pci_remove,
379};
380module_comedi_pci_driver(apci2032_driver, apci2032_pci_driver);
6 381
7MODULE_AUTHOR("Comedi http://www.comedi.org"); 382MODULE_AUTHOR("Comedi http://www.comedi.org");
8MODULE_DESCRIPTION("Comedi low-level driver"); 383MODULE_DESCRIPTION("Comedi low-level driver");
diff --git a/drivers/staging/comedi/drivers/addi_apci_2200.c b/drivers/staging/comedi/drivers/addi_apci_2200.c
index adfbb5d410ef..7c2c5db01218 100644
--- a/drivers/staging/comedi/drivers/addi_apci_2200.c
+++ b/drivers/staging/comedi/drivers/addi_apci_2200.c
@@ -1,9 +1,69 @@
1#define CONFIG_APCI_2200 1 1#include "../comedidev.h"
2#include "comedi_fc.h"
3#include "amcc_s5933.h"
2 4
3#define ADDIDATA_DRIVER_NAME "addi_apci_2200" 5#include "addi-data/addi_common.h"
4 6
7#include "addi-data/addi_eeprom.c"
8#include "addi-data/hwdrv_apci2200.c"
5#include "addi-data/addi_common.c" 9#include "addi-data/addi_common.c"
6 10
11static const struct addi_board apci2200_boardtypes[] = {
12 {
13 .pc_DriverName = "apci2200",
14 .i_VendorId = PCI_VENDOR_ID_ADDIDATA,
15 .i_DeviceId = 0x1005,
16 .i_IorangeBase0 = 4,
17 .i_IorangeBase1 = APCI2200_ADDRESS_RANGE,
18 .i_PCIEeprom = ADDIDATA_EEPROM,
19 .pc_EepromChip = ADDIDATA_93C76,
20 .i_NbrDiChannel = 8,
21 .i_NbrDoChannel = 16,
22 .i_Timer = 1,
23 .reset = i_APCI2200_Reset,
24 .di_bits = apci2200_di_insn_bits,
25 .do_bits = apci2200_do_insn_bits,
26 .timer_config = i_APCI2200_ConfigWatchdog,
27 .timer_write = i_APCI2200_StartStopWriteWatchdog,
28 .timer_read = i_APCI2200_ReadWatchdog,
29 },
30};
31
32static struct comedi_driver apci2200_driver = {
33 .driver_name = "addi_apci_2200",
34 .module = THIS_MODULE,
35 .auto_attach = addi_auto_attach,
36 .detach = i_ADDI_Detach,
37 .num_names = ARRAY_SIZE(apci2200_boardtypes),
38 .board_name = &apci2200_boardtypes[0].pc_DriverName,
39 .offset = sizeof(struct addi_board),
40};
41
42static int apci2200_pci_probe(struct pci_dev *dev,
43 const struct pci_device_id *ent)
44{
45 return comedi_pci_auto_config(dev, &apci2200_driver);
46}
47
48static void apci2200_pci_remove(struct pci_dev *dev)
49{
50 comedi_pci_auto_unconfig(dev);
51}
52
53static DEFINE_PCI_DEVICE_TABLE(apci2200_pci_table) = {
54 { PCI_DEVICE(PCI_VENDOR_ID_ADDIDATA, 0x1005) },
55 { 0 }
56};
57MODULE_DEVICE_TABLE(pci, apci2200_pci_table);
58
59static struct pci_driver apci2200_pci_driver = {
60 .name = "addi_apci_2200",
61 .id_table = apci2200_pci_table,
62 .probe = apci2200_pci_probe,
63 .remove = apci2200_pci_remove,
64};
65module_comedi_pci_driver(apci2200_driver, apci2200_pci_driver);
66
7MODULE_AUTHOR("Comedi http://www.comedi.org"); 67MODULE_AUTHOR("Comedi http://www.comedi.org");
8MODULE_DESCRIPTION("Comedi low-level driver"); 68MODULE_DESCRIPTION("Comedi low-level driver");
9MODULE_LICENSE("GPL"); 69MODULE_LICENSE("GPL");
diff --git a/drivers/staging/comedi/drivers/addi_apci_3001.c b/drivers/staging/comedi/drivers/addi_apci_3001.c
deleted file mode 100644
index 00ac762965c1..000000000000
--- a/drivers/staging/comedi/drivers/addi_apci_3001.c
+++ /dev/null
@@ -1,9 +0,0 @@
1#define CONFIG_APCI_3001 1
2
3#define ADDIDATA_DRIVER_NAME "addi_apci_3001"
4
5#include "addi-data/addi_common.c"
6
7MODULE_AUTHOR("Comedi http://www.comedi.org");
8MODULE_DESCRIPTION("Comedi low-level driver");
9MODULE_LICENSE("GPL");
diff --git a/drivers/staging/comedi/drivers/addi_apci_3120.c b/drivers/staging/comedi/drivers/addi_apci_3120.c
index c35515845cf3..fec2962affc7 100644
--- a/drivers/staging/comedi/drivers/addi_apci_3120.c
+++ b/drivers/staging/comedi/drivers/addi_apci_3120.c
@@ -1,8 +1,275 @@
1#define CONFIG_APCI_3120 1 1#include "../comedidev.h"
2#include "comedi_fc.h"
3#include "amcc_s5933.h"
2 4
3#define ADDIDATA_DRIVER_NAME "addi_apci_3120" 5#include "addi-data/addi_common.h"
4 6
5#include "addi-data/addi_common.c" 7#include "addi-data/hwdrv_apci3120.c"
8
9static const struct addi_board apci3120_boardtypes[] = {
10 {
11 .pc_DriverName = "apci3120",
12 .i_VendorId = PCI_VENDOR_ID_ADDIDATA_OLD,
13 .i_DeviceId = 0x818D,
14 .i_NbrAiChannel = 16,
15 .i_NbrAiChannelDiff = 8,
16 .i_AiChannelList = 16,
17 .i_NbrAoChannel = 8,
18 .i_AiMaxdata = 0xffff,
19 .i_AoMaxdata = 0x3fff,
20 .i_NbrDiChannel = 4,
21 .i_NbrDoChannel = 4,
22 .i_DoMaxdata = 0x0f,
23 .interrupt = v_APCI3120_Interrupt,
24 }, {
25 .pc_DriverName = "apci3001",
26 .i_VendorId = PCI_VENDOR_ID_ADDIDATA_OLD,
27 .i_DeviceId = 0x828D,
28 .i_NbrAiChannel = 16,
29 .i_NbrAiChannelDiff = 8,
30 .i_AiChannelList = 16,
31 .i_AiMaxdata = 0xfff,
32 .i_NbrDiChannel = 4,
33 .i_NbrDoChannel = 4,
34 .i_DoMaxdata = 0x0f,
35 .interrupt = v_APCI3120_Interrupt,
36 },
37};
38
39static irqreturn_t v_ADDI_Interrupt(int irq, void *d)
40{
41 struct comedi_device *dev = d;
42 const struct addi_board *this_board = comedi_board(dev);
43
44 this_board->interrupt(irq, d);
45 return IRQ_RETVAL(1);
46}
47
48static const void *apci3120_find_boardinfo(struct comedi_device *dev,
49 struct pci_dev *pcidev)
50{
51 const struct addi_board *this_board;
52 int i;
53
54 for (i = 0; i < ARRAY_SIZE(apci3120_boardtypes); i++) {
55 this_board = &apci3120_boardtypes[i];
56 if (this_board->i_VendorId == pcidev->vendor &&
57 this_board->i_DeviceId == pcidev->device)
58 return this_board;
59 }
60 return NULL;
61}
62
63static int apci3120_auto_attach(struct comedi_device *dev,
64 unsigned long context_unused)
65{
66 struct pci_dev *pcidev = comedi_to_pci_dev(dev);
67 const struct addi_board *this_board;
68 struct addi_private *devpriv;
69 struct comedi_subdevice *s;
70 int ret, pages, i;
71
72 this_board = apci3120_find_boardinfo(dev, pcidev);
73 if (!this_board)
74 return -ENODEV;
75 dev->board_ptr = this_board;
76 dev->board_name = this_board->pc_DriverName;
77
78 devpriv = kzalloc(sizeof(*devpriv), GFP_KERNEL);
79 if (!devpriv)
80 return -ENOMEM;
81 dev->private = devpriv;
82
83 ret = comedi_pci_enable(pcidev, dev->board_name);
84 if (ret)
85 return ret;
86 pci_set_master(pcidev);
87
88 dev->iobase = pci_resource_start(pcidev, 1);
89 devpriv->iobase = dev->iobase;
90 devpriv->i_IobaseAmcc = pci_resource_start(pcidev, 0);
91 devpriv->i_IobaseAddon = pci_resource_start(pcidev, 2);
92 devpriv->i_IobaseReserved = pci_resource_start(pcidev, 3);
93
94 if (pcidev->irq > 0) {
95 ret = request_irq(pcidev->irq, v_ADDI_Interrupt, IRQF_SHARED,
96 dev->board_name, dev);
97 if (ret == 0)
98 dev->irq = pcidev->irq;
99 }
100
101 devpriv->us_UseDma = ADDI_ENABLE;
102
103 /* Allocate DMA buffers */
104 devpriv->b_DmaDoubleBuffer = 0;
105 for (i = 0; i < 2; i++) {
106 for (pages = 4; pages >= 0; pages--) {
107 devpriv->ul_DmaBufferVirtual[i] =
108 (void *) __get_free_pages(GFP_KERNEL, pages);
109
110 if (devpriv->ul_DmaBufferVirtual[i])
111 break;
112 }
113 if (devpriv->ul_DmaBufferVirtual[i]) {
114 devpriv->ui_DmaBufferPages[i] = pages;
115 devpriv->ui_DmaBufferSize[i] = PAGE_SIZE * pages;
116 devpriv->ui_DmaBufferSamples[i] =
117 devpriv->ui_DmaBufferSize[i] >> 1;
118 devpriv->ul_DmaBufferHw[i] =
119 virt_to_bus((void *)devpriv->
120 ul_DmaBufferVirtual[i]);
121 }
122 }
123 if (!devpriv->ul_DmaBufferVirtual[0])
124 devpriv->us_UseDma = ADDI_DISABLE;
125
126 if (devpriv->ul_DmaBufferVirtual[1])
127 devpriv->b_DmaDoubleBuffer = 1;
128
129 ret = comedi_alloc_subdevices(dev, 5);
130 if (ret)
131 return ret;
132
133 /* Allocate and Initialise AI Subdevice Structures */
134 s = &dev->subdevices[0];
135 dev->read_subdev = s;
136 s->type = COMEDI_SUBD_AI;
137 s->subdev_flags =
138 SDF_READABLE | SDF_COMMON | SDF_GROUND
139 | SDF_DIFF;
140 if (this_board->i_NbrAiChannel) {
141 s->n_chan = this_board->i_NbrAiChannel;
142 devpriv->b_SingelDiff = 0;
143 } else {
144 s->n_chan = this_board->i_NbrAiChannelDiff;
145 devpriv->b_SingelDiff = 1;
146 }
147 s->maxdata = this_board->i_AiMaxdata;
148 s->len_chanlist = this_board->i_AiChannelList;
149 s->range_table = &range_apci3120_ai;
150
151 /* Set the initialisation flag */
152 devpriv->b_AiInitialisation = 1;
153
154 s->insn_config = i_APCI3120_InsnConfigAnalogInput;
155 s->insn_read = i_APCI3120_InsnReadAnalogInput;
156 s->do_cmdtest = i_APCI3120_CommandTestAnalogInput;
157 s->do_cmd = i_APCI3120_CommandAnalogInput;
158 s->cancel = i_APCI3120_StopCyclicAcquisition;
159
160 /* Allocate and Initialise AO Subdevice Structures */
161 s = &dev->subdevices[1];
162 if (this_board->i_NbrAoChannel) {
163 s->type = COMEDI_SUBD_AO;
164 s->subdev_flags = SDF_WRITEABLE | SDF_GROUND | SDF_COMMON;
165 s->n_chan = this_board->i_NbrAoChannel;
166 s->maxdata = this_board->i_AoMaxdata;
167 s->len_chanlist = this_board->i_NbrAoChannel;
168 s->range_table = &range_apci3120_ao;
169 s->insn_write = i_APCI3120_InsnWriteAnalogOutput;
170 } else {
171 s->type = COMEDI_SUBD_UNUSED;
172 }
173
174 /* Allocate and Initialise DI Subdevice Structures */
175 s = &dev->subdevices[2];
176 s->type = COMEDI_SUBD_DI;
177 s->subdev_flags = SDF_READABLE | SDF_GROUND | SDF_COMMON;
178 s->n_chan = this_board->i_NbrDiChannel;
179 s->maxdata = 1;
180 s->len_chanlist = this_board->i_NbrDiChannel;
181 s->range_table = &range_digital;
182 s->io_bits = 0; /* all bits input */
183 s->insn_bits = apci3120_di_insn_bits;
184
185 /* Allocate and Initialise DO Subdevice Structures */
186 s = &dev->subdevices[3];
187 s->type = COMEDI_SUBD_DO;
188 s->subdev_flags =
189 SDF_READABLE | SDF_WRITEABLE | SDF_GROUND | SDF_COMMON;
190 s->n_chan = this_board->i_NbrDoChannel;
191 s->maxdata = this_board->i_DoMaxdata;
192 s->len_chanlist = this_board->i_NbrDoChannel;
193 s->range_table = &range_digital;
194 s->io_bits = 0xf; /* all bits output */
195 s->insn_bits = apci3120_do_insn_bits;
196
197 /* Allocate and Initialise Timer Subdevice Structures */
198 s = &dev->subdevices[4];
199 s->type = COMEDI_SUBD_TIMER;
200 s->subdev_flags = SDF_WRITEABLE | SDF_GROUND | SDF_COMMON;
201 s->n_chan = 1;
202 s->maxdata = 0;
203 s->len_chanlist = 1;
204 s->range_table = &range_digital;
205
206 s->insn_write = i_APCI3120_InsnWriteTimer;
207 s->insn_read = i_APCI3120_InsnReadTimer;
208 s->insn_config = i_APCI3120_InsnConfigTimer;
209
210 i_APCI3120_Reset(dev);
211 return 0;
212}
213
214static void apci3120_detach(struct comedi_device *dev)
215{
216 struct pci_dev *pcidev = comedi_to_pci_dev(dev);
217 struct addi_private *devpriv = dev->private;
218
219 if (devpriv) {
220 if (dev->iobase)
221 i_APCI3120_Reset(dev);
222 if (dev->irq)
223 free_irq(dev->irq, dev);
224 if (devpriv->ul_DmaBufferVirtual[0]) {
225 free_pages((unsigned long)devpriv->
226 ul_DmaBufferVirtual[0],
227 devpriv->ui_DmaBufferPages[0]);
228 }
229 if (devpriv->ul_DmaBufferVirtual[1]) {
230 free_pages((unsigned long)devpriv->
231 ul_DmaBufferVirtual[1],
232 devpriv->ui_DmaBufferPages[1]);
233 }
234 }
235 if (pcidev) {
236 if (dev->iobase)
237 comedi_pci_disable(pcidev);
238 }
239}
240
241static struct comedi_driver apci3120_driver = {
242 .driver_name = "addi_apci_3120",
243 .module = THIS_MODULE,
244 .auto_attach = apci3120_auto_attach,
245 .detach = apci3120_detach,
246};
247
248static int apci3120_pci_probe(struct pci_dev *dev,
249 const struct pci_device_id *ent)
250{
251 return comedi_pci_auto_config(dev, &apci3120_driver);
252}
253
254static void apci3120_pci_remove(struct pci_dev *dev)
255{
256 comedi_pci_auto_unconfig(dev);
257}
258
259static DEFINE_PCI_DEVICE_TABLE(apci3120_pci_table) = {
260 { PCI_DEVICE(PCI_VENDOR_ID_ADDIDATA_OLD, 0x818d) },
261 { PCI_DEVICE(PCI_VENDOR_ID_ADDIDATA_OLD, 0x828d) },
262 { 0 }
263};
264MODULE_DEVICE_TABLE(pci, apci3120_pci_table);
265
266static struct pci_driver apci3120_pci_driver = {
267 .name = "addi_apci_3120",
268 .id_table = apci3120_pci_table,
269 .probe = apci3120_pci_probe,
270 .remove = apci3120_pci_remove,
271};
272module_comedi_pci_driver(apci3120_driver, apci3120_pci_driver);
6 273
7MODULE_AUTHOR("Comedi http://www.comedi.org"); 274MODULE_AUTHOR("Comedi http://www.comedi.org");
8MODULE_DESCRIPTION("Comedi low-level driver"); 275MODULE_DESCRIPTION("Comedi low-level driver");
diff --git a/drivers/staging/comedi/drivers/addi_apci_3200.c b/drivers/staging/comedi/drivers/addi_apci_3200.c
index 159313997dcf..9085b774b48d 100644
--- a/drivers/staging/comedi/drivers/addi_apci_3200.c
+++ b/drivers/staging/comedi/drivers/addi_apci_3200.c
@@ -1,5 +1,120 @@
1#define CONFIG_APCI_3200 1 1#include <asm/i387.h>
2 2
3#define ADDIDATA_DRIVER_NAME "addi_apci_3200" 3#include "../comedidev.h"
4#include "comedi_fc.h"
5#include "amcc_s5933.h"
4 6
7#include "addi-data/addi_common.h"
8
9static void fpu_begin(void)
10{
11 kernel_fpu_begin();
12}
13
14static void fpu_end(void)
15{
16 kernel_fpu_end();
17}
18
19#include "addi-data/addi_eeprom.c"
20#include "addi-data/hwdrv_apci3200.c"
5#include "addi-data/addi_common.c" 21#include "addi-data/addi_common.c"
22
23static const struct addi_board apci3200_boardtypes[] = {
24 {
25 .pc_DriverName = "apci3200",
26 .i_VendorId = PCI_VENDOR_ID_ADDIDATA,
27 .i_DeviceId = 0x3000,
28 .i_IorangeBase0 = 128,
29 .i_IorangeBase1 = 256,
30 .i_IorangeBase2 = 4,
31 .i_IorangeBase3 = 4,
32 .i_PCIEeprom = ADDIDATA_EEPROM,
33 .pc_EepromChip = ADDIDATA_S5920,
34 .i_NbrAiChannel = 16,
35 .i_NbrAiChannelDiff = 8,
36 .i_AiChannelList = 16,
37 .i_AiMaxdata = 0x3ffff,
38 .pr_AiRangelist = &range_apci3200_ai,
39 .i_NbrDiChannel = 4,
40 .i_NbrDoChannel = 4,
41 .ui_MinAcquisitiontimeNs = 10000,
42 .ui_MinDelaytimeNs = 100000,
43 .interrupt = v_APCI3200_Interrupt,
44 .reset = i_APCI3200_Reset,
45 .ai_config = i_APCI3200_ConfigAnalogInput,
46 .ai_read = i_APCI3200_ReadAnalogInput,
47 .ai_write = i_APCI3200_InsnWriteReleaseAnalogInput,
48 .ai_bits = i_APCI3200_InsnBits_AnalogInput_Test,
49 .ai_cmdtest = i_APCI3200_CommandTestAnalogInput,
50 .ai_cmd = i_APCI3200_CommandAnalogInput,
51 .ai_cancel = i_APCI3200_StopCyclicAcquisition,
52 .di_bits = apci3200_di_insn_bits,
53 .do_bits = apci3200_do_insn_bits,
54 }, {
55 .pc_DriverName = "apci3300",
56 .i_VendorId = PCI_VENDOR_ID_ADDIDATA,
57 .i_DeviceId = 0x3007,
58 .i_IorangeBase0 = 128,
59 .i_IorangeBase1 = 256,
60 .i_IorangeBase2 = 4,
61 .i_IorangeBase3 = 4,
62 .i_PCIEeprom = ADDIDATA_EEPROM,
63 .pc_EepromChip = ADDIDATA_S5920,
64 .i_NbrAiChannelDiff = 8,
65 .i_AiChannelList = 8,
66 .i_AiMaxdata = 0x3ffff,
67 .pr_AiRangelist = &range_apci3300_ai,
68 .i_NbrDiChannel = 4,
69 .i_NbrDoChannel = 4,
70 .ui_MinAcquisitiontimeNs = 10000,
71 .ui_MinDelaytimeNs = 100000,
72 .interrupt = v_APCI3200_Interrupt,
73 .reset = i_APCI3200_Reset,
74 .ai_config = i_APCI3200_ConfigAnalogInput,
75 .ai_read = i_APCI3200_ReadAnalogInput,
76 .ai_write = i_APCI3200_InsnWriteReleaseAnalogInput,
77 .ai_bits = i_APCI3200_InsnBits_AnalogInput_Test,
78 .ai_cmdtest = i_APCI3200_CommandTestAnalogInput,
79 .ai_cmd = i_APCI3200_CommandAnalogInput,
80 .ai_cancel = i_APCI3200_StopCyclicAcquisition,
81 .di_bits = apci3200_di_insn_bits,
82 .do_bits = apci3200_do_insn_bits,
83 },
84};
85
86static DEFINE_PCI_DEVICE_TABLE(apci3200_pci_table) = {
87 { PCI_DEVICE(PCI_VENDOR_ID_ADDIDATA, 0x3000) },
88 { PCI_DEVICE(PCI_VENDOR_ID_ADDIDATA, 0x3007) },
89 { 0 }
90};
91MODULE_DEVICE_TABLE(pci, apci3200_pci_table);
92
93static struct comedi_driver apci3200_driver = {
94 .driver_name = "addi_apci_3200",
95 .module = THIS_MODULE,
96 .auto_attach = addi_auto_attach,
97 .detach = i_ADDI_Detach,
98 .num_names = ARRAY_SIZE(apci3200_boardtypes),
99 .board_name = &apci3200_boardtypes[0].pc_DriverName,
100 .offset = sizeof(struct addi_board),
101};
102
103static int apci3200_pci_probe(struct pci_dev *dev,
104 const struct pci_device_id *ent)
105{
106 return comedi_pci_auto_config(dev, &apci3200_driver);
107}
108
109static void apci3200_pci_remove(struct pci_dev *dev)
110{
111 comedi_pci_auto_unconfig(dev);
112}
113
114static struct pci_driver apci3200_pci_driver = {
115 .name = "addi_apci_3200",
116 .id_table = apci3200_pci_table,
117 .probe = apci3200_pci_probe,
118 .remove = apci3200_pci_remove,
119};
120module_comedi_pci_driver(apci3200_driver, apci3200_pci_driver);
diff --git a/drivers/staging/comedi/drivers/addi_apci_3300.c b/drivers/staging/comedi/drivers/addi_apci_3300.c
deleted file mode 100644
index 733c69abc43a..000000000000
--- a/drivers/staging/comedi/drivers/addi_apci_3300.c
+++ /dev/null
@@ -1,5 +0,0 @@
1#define CONFIG_APCI_3300 1
2
3#define ADDIDATA_DRIVER_NAME "addi_apci_3300"
4
5#include "addi-data/addi_common.c"
diff --git a/drivers/staging/comedi/drivers/addi_apci_3501.c b/drivers/staging/comedi/drivers/addi_apci_3501.c
index dd2c1d3bc18b..ed297deb8634 100644
--- a/drivers/staging/comedi/drivers/addi_apci_3501.c
+++ b/drivers/staging/comedi/drivers/addi_apci_3501.c
@@ -1,9 +1,75 @@
1#define CONFIG_APCI_3501 1 1#include "../comedidev.h"
2#include "comedi_fc.h"
3#include "amcc_s5933.h"
2 4
3#define ADDIDATA_DRIVER_NAME "addi_apci_3501" 5#include "addi-data/addi_common.h"
4 6
7#include "addi-data/addi_eeprom.c"
8#include "addi-data/hwdrv_apci3501.c"
5#include "addi-data/addi_common.c" 9#include "addi-data/addi_common.c"
6 10
11static const struct addi_board apci3501_boardtypes[] = {
12 {
13 .pc_DriverName = "apci3501",
14 .i_VendorId = PCI_VENDOR_ID_ADDIDATA,
15 .i_DeviceId = 0x3001,
16 .i_IorangeBase0 = 64,
17 .i_IorangeBase1 = APCI3501_ADDRESS_RANGE,
18 .i_PCIEeprom = ADDIDATA_EEPROM,
19 .pc_EepromChip = ADDIDATA_S5933,
20 .i_AoMaxdata = 16383,
21 .pr_AoRangelist = &range_apci3501_ao,
22 .i_NbrDiChannel = 2,
23 .i_NbrDoChannel = 2,
24 .i_DoMaxdata = 0x3,
25 .i_Timer = 1,
26 .interrupt = v_APCI3501_Interrupt,
27 .reset = i_APCI3501_Reset,
28 .ao_config = i_APCI3501_ConfigAnalogOutput,
29 .ao_write = i_APCI3501_WriteAnalogOutput,
30 .di_bits = apci3501_di_insn_bits,
31 .do_bits = apci3501_do_insn_bits,
32 .timer_config = i_APCI3501_ConfigTimerCounterWatchdog,
33 .timer_write = i_APCI3501_StartStopWriteTimerCounterWatchdog,
34 .timer_read = i_APCI3501_ReadTimerCounterWatchdog,
35 },
36};
37
38static DEFINE_PCI_DEVICE_TABLE(apci3501_pci_table) = {
39 { PCI_DEVICE(PCI_VENDOR_ID_ADDIDATA, 0x3001) },
40 { 0 }
41};
42MODULE_DEVICE_TABLE(pci, apci3501_pci_table);
43
44static struct comedi_driver apci3501_driver = {
45 .driver_name = "addi_apci_3501",
46 .module = THIS_MODULE,
47 .auto_attach = addi_auto_attach,
48 .detach = i_ADDI_Detach,
49 .num_names = ARRAY_SIZE(apci3501_boardtypes),
50 .board_name = &apci3501_boardtypes[0].pc_DriverName,
51 .offset = sizeof(struct addi_board),
52};
53
54static int apci3501_pci_probe(struct pci_dev *dev,
55 const struct pci_device_id *ent)
56{
57 return comedi_pci_auto_config(dev, &apci3501_driver);
58}
59
60static void apci3501_pci_remove(struct pci_dev *dev)
61{
62 comedi_pci_auto_unconfig(dev);
63}
64
65static struct pci_driver apci3501_pci_driver = {
66 .name = "addi_apci_3501",
67 .id_table = apci3501_pci_table,
68 .probe = apci3501_pci_probe,
69 .remove = apci3501_pci_remove,
70};
71module_comedi_pci_driver(apci3501_driver, apci3501_pci_driver);
72
7MODULE_AUTHOR("Comedi http://www.comedi.org"); 73MODULE_AUTHOR("Comedi http://www.comedi.org");
8MODULE_DESCRIPTION("Comedi low-level driver"); 74MODULE_DESCRIPTION("Comedi low-level driver");
9MODULE_LICENSE("GPL"); 75MODULE_LICENSE("GPL");
diff --git a/drivers/staging/comedi/drivers/addi_apci_3xxx.c b/drivers/staging/comedi/drivers/addi_apci_3xxx.c
index 03161c88eac2..1562347ed64b 100644
--- a/drivers/staging/comedi/drivers/addi_apci_3xxx.c
+++ b/drivers/staging/comedi/drivers/addi_apci_3xxx.c
@@ -1,9 +1,799 @@
1#define CONFIG_APCI_3XXX 1 1#include "../comedidev.h"
2#include "comedi_fc.h"
3#include "amcc_s5933.h"
2 4
3#define ADDIDATA_DRIVER_NAME "addi_apci_3xxx" 5#include "addi-data/addi_common.h"
4 6
7#include "addi-data/addi_eeprom.c"
8#include "addi-data/hwdrv_apci3xxx.c"
5#include "addi-data/addi_common.c" 9#include "addi-data/addi_common.c"
6 10
11static const struct addi_board apci3xxx_boardtypes[] = {
12 {
13 .pc_DriverName = "apci3000-16",
14 .i_VendorId = PCI_VENDOR_ID_ADDIDATA,
15 .i_DeviceId = 0x3010,
16 .i_IorangeBase0 = 256,
17 .i_IorangeBase1 = 256,
18 .i_IorangeBase2 = 256,
19 .i_IorangeBase3 = 256,
20 .i_PCIEeprom = ADDIDATA_NO_EEPROM,
21 .pc_EepromChip = ADDIDATA_9054,
22 .i_NbrAiChannel = 16,
23 .i_NbrAiChannelDiff = 8,
24 .i_AiChannelList = 16,
25 .i_AiMaxdata = 4095,
26 .pr_AiRangelist = &range_apci3XXX_ai,
27 .i_NbrTTLChannel = 24,
28 .b_AvailableConvertUnit = 6,
29 .ui_MinAcquisitiontimeNs = 10000,
30 .interrupt = v_APCI3XXX_Interrupt,
31 .reset = i_APCI3XXX_Reset,
32 .ai_config = i_APCI3XXX_InsnConfigAnalogInput,
33 .ai_read = i_APCI3XXX_InsnReadAnalogInput,
34 .ttl_config = i_APCI3XXX_InsnConfigInitTTLIO,
35 .ttl_bits = i_APCI3XXX_InsnBitsTTLIO,
36 .ttl_read = i_APCI3XXX_InsnReadTTLIO,
37 .ttl_write = i_APCI3XXX_InsnWriteTTLIO,
38 }, {
39 .pc_DriverName = "apci3000-8",
40 .i_VendorId = PCI_VENDOR_ID_ADDIDATA,
41 .i_DeviceId = 0x300F,
42 .i_IorangeBase0 = 256,
43 .i_IorangeBase1 = 256,
44 .i_IorangeBase2 = 256,
45 .i_IorangeBase3 = 256,
46 .i_PCIEeprom = ADDIDATA_NO_EEPROM,
47 .pc_EepromChip = ADDIDATA_9054,
48 .i_NbrAiChannel = 8,
49 .i_NbrAiChannelDiff = 4,
50 .i_AiChannelList = 8,
51 .i_AiMaxdata = 4095,
52 .pr_AiRangelist = &range_apci3XXX_ai,
53 .i_NbrTTLChannel = 24,
54 .b_AvailableConvertUnit = 6,
55 .ui_MinAcquisitiontimeNs = 10000,
56 .interrupt = v_APCI3XXX_Interrupt,
57 .reset = i_APCI3XXX_Reset,
58 .ai_config = i_APCI3XXX_InsnConfigAnalogInput,
59 .ai_read = i_APCI3XXX_InsnReadAnalogInput,
60 .ttl_config = i_APCI3XXX_InsnConfigInitTTLIO,
61 .ttl_bits = i_APCI3XXX_InsnBitsTTLIO,
62 .ttl_read = i_APCI3XXX_InsnReadTTLIO,
63 .ttl_write = i_APCI3XXX_InsnWriteTTLIO,
64 }, {
65 .pc_DriverName = "apci3000-4",
66 .i_VendorId = PCI_VENDOR_ID_ADDIDATA,
67 .i_DeviceId = 0x300E,
68 .i_IorangeBase0 = 256,
69 .i_IorangeBase1 = 256,
70 .i_IorangeBase2 = 256,
71 .i_IorangeBase3 = 256,
72 .i_PCIEeprom = ADDIDATA_NO_EEPROM,
73 .pc_EepromChip = ADDIDATA_9054,
74 .i_NbrAiChannel = 4,
75 .i_NbrAiChannelDiff = 2,
76 .i_AiChannelList = 4,
77 .i_AiMaxdata = 4095,
78 .pr_AiRangelist = &range_apci3XXX_ai,
79 .i_NbrTTLChannel = 24,
80 .b_AvailableConvertUnit = 6,
81 .ui_MinAcquisitiontimeNs = 10000,
82 .interrupt = v_APCI3XXX_Interrupt,
83 .reset = i_APCI3XXX_Reset,
84 .ai_config = i_APCI3XXX_InsnConfigAnalogInput,
85 .ai_read = i_APCI3XXX_InsnReadAnalogInput,
86 .ttl_config = i_APCI3XXX_InsnConfigInitTTLIO,
87 .ttl_bits = i_APCI3XXX_InsnBitsTTLIO,
88 .ttl_read = i_APCI3XXX_InsnReadTTLIO,
89 .ttl_write = i_APCI3XXX_InsnWriteTTLIO,
90 }, {
91 .pc_DriverName = "apci3006-16",
92 .i_VendorId = PCI_VENDOR_ID_ADDIDATA,
93 .i_DeviceId = 0x3013,
94 .i_IorangeBase0 = 256,
95 .i_IorangeBase1 = 256,
96 .i_IorangeBase2 = 256,
97 .i_IorangeBase3 = 256,
98 .i_PCIEeprom = ADDIDATA_NO_EEPROM,
99 .pc_EepromChip = ADDIDATA_9054,
100 .i_NbrAiChannel = 16,
101 .i_NbrAiChannelDiff = 8,
102 .i_AiChannelList = 16,
103 .i_AiMaxdata = 65535,
104 .pr_AiRangelist = &range_apci3XXX_ai,
105 .i_NbrTTLChannel = 24,
106 .b_AvailableConvertUnit = 6,
107 .ui_MinAcquisitiontimeNs = 10000,
108 .interrupt = v_APCI3XXX_Interrupt,
109 .reset = i_APCI3XXX_Reset,
110 .ai_config = i_APCI3XXX_InsnConfigAnalogInput,
111 .ai_read = i_APCI3XXX_InsnReadAnalogInput,
112 .ttl_config = i_APCI3XXX_InsnConfigInitTTLIO,
113 .ttl_bits = i_APCI3XXX_InsnBitsTTLIO,
114 .ttl_read = i_APCI3XXX_InsnReadTTLIO,
115 .ttl_write = i_APCI3XXX_InsnWriteTTLIO,
116 }, {
117 .pc_DriverName = "apci3006-8",
118 .i_VendorId = PCI_VENDOR_ID_ADDIDATA,
119 .i_DeviceId = 0x3014,
120 .i_IorangeBase0 = 256,
121 .i_IorangeBase1 = 256,
122 .i_IorangeBase2 = 256,
123 .i_IorangeBase3 = 256,
124 .i_PCIEeprom = ADDIDATA_NO_EEPROM,
125 .pc_EepromChip = ADDIDATA_9054,
126 .i_NbrAiChannel = 8,
127 .i_NbrAiChannelDiff = 4,
128 .i_AiChannelList = 8,
129 .i_AiMaxdata = 65535,
130 .pr_AiRangelist = &range_apci3XXX_ai,
131 .i_NbrTTLChannel = 24,
132 .b_AvailableConvertUnit = 6,
133 .ui_MinAcquisitiontimeNs = 10000,
134 .interrupt = v_APCI3XXX_Interrupt,
135 .reset = i_APCI3XXX_Reset,
136 .ai_config = i_APCI3XXX_InsnConfigAnalogInput,
137 .ai_read = i_APCI3XXX_InsnReadAnalogInput,
138 .ttl_config = i_APCI3XXX_InsnConfigInitTTLIO,
139 .ttl_bits = i_APCI3XXX_InsnBitsTTLIO,
140 .ttl_read = i_APCI3XXX_InsnReadTTLIO,
141 .ttl_write = i_APCI3XXX_InsnWriteTTLIO,
142 }, {
143 .pc_DriverName = "apci3006-4",
144 .i_VendorId = PCI_VENDOR_ID_ADDIDATA,
145 .i_DeviceId = 0x3015,
146 .i_IorangeBase0 = 256,
147 .i_IorangeBase1 = 256,
148 .i_IorangeBase2 = 256,
149 .i_IorangeBase3 = 256,
150 .i_PCIEeprom = ADDIDATA_NO_EEPROM,
151 .pc_EepromChip = ADDIDATA_9054,
152 .i_NbrAiChannel = 4,
153 .i_NbrAiChannelDiff = 2,
154 .i_AiChannelList = 4,
155 .i_AiMaxdata = 65535,
156 .pr_AiRangelist = &range_apci3XXX_ai,
157 .i_NbrTTLChannel = 24,
158 .b_AvailableConvertUnit = 6,
159 .ui_MinAcquisitiontimeNs = 10000,
160 .interrupt = v_APCI3XXX_Interrupt,
161 .reset = i_APCI3XXX_Reset,
162 .ai_config = i_APCI3XXX_InsnConfigAnalogInput,
163 .ai_read = i_APCI3XXX_InsnReadAnalogInput,
164 .ttl_config = i_APCI3XXX_InsnConfigInitTTLIO,
165 .ttl_bits = i_APCI3XXX_InsnBitsTTLIO,
166 .ttl_read = i_APCI3XXX_InsnReadTTLIO,
167 .ttl_write = i_APCI3XXX_InsnWriteTTLIO,
168 }, {
169 .pc_DriverName = "apci3010-16",
170 .i_VendorId = PCI_VENDOR_ID_ADDIDATA,
171 .i_DeviceId = 0x3016,
172 .i_IorangeBase0 = 256,
173 .i_IorangeBase1 = 256,
174 .i_IorangeBase2 = 256,
175 .i_IorangeBase3 = 256,
176 .i_PCIEeprom = ADDIDATA_NO_EEPROM,
177 .pc_EepromChip = ADDIDATA_9054,
178 .i_NbrAiChannel = 16,
179 .i_NbrAiChannelDiff = 8,
180 .i_AiChannelList = 16,
181 .i_AiMaxdata = 4095,
182 .pr_AiRangelist = &range_apci3XXX_ai,
183 .i_NbrDiChannel = 4,
184 .i_NbrDoChannel = 4,
185 .i_DoMaxdata = 1,
186 .i_NbrTTLChannel = 24,
187 .b_AvailableConvertUnit = 6,
188 .ui_MinAcquisitiontimeNs = 5000,
189 .interrupt = v_APCI3XXX_Interrupt,
190 .reset = i_APCI3XXX_Reset,
191 .ai_config = i_APCI3XXX_InsnConfigAnalogInput,
192 .ai_read = i_APCI3XXX_InsnReadAnalogInput,
193 .di_bits = apci3xxx_di_insn_bits,
194 .do_bits = apci3xxx_do_insn_bits,
195 .ttl_config = i_APCI3XXX_InsnConfigInitTTLIO,
196 .ttl_bits = i_APCI3XXX_InsnBitsTTLIO,
197 .ttl_read = i_APCI3XXX_InsnReadTTLIO,
198 .ttl_write = i_APCI3XXX_InsnWriteTTLIO,
199 }, {
200 .pc_DriverName = "apci3010-8",
201 .i_VendorId = PCI_VENDOR_ID_ADDIDATA,
202 .i_DeviceId = 0x3017,
203 .i_IorangeBase0 = 256,
204 .i_IorangeBase1 = 256,
205 .i_IorangeBase2 = 256,
206 .i_IorangeBase3 = 256,
207 .i_PCIEeprom = ADDIDATA_NO_EEPROM,
208 .pc_EepromChip = ADDIDATA_9054,
209 .i_NbrAiChannel = 8,
210 .i_NbrAiChannelDiff = 4,
211 .i_AiChannelList = 8,
212 .i_AiMaxdata = 4095,
213 .pr_AiRangelist = &range_apci3XXX_ai,
214 .i_NbrDiChannel = 4,
215 .i_NbrDoChannel = 4,
216 .i_DoMaxdata = 1,
217 .i_NbrTTLChannel = 24,
218 .b_AvailableConvertUnit = 6,
219 .ui_MinAcquisitiontimeNs = 5000,
220 .interrupt = v_APCI3XXX_Interrupt,
221 .reset = i_APCI3XXX_Reset,
222 .ai_config = i_APCI3XXX_InsnConfigAnalogInput,
223 .ai_read = i_APCI3XXX_InsnReadAnalogInput,
224 .di_bits = apci3xxx_di_insn_bits,
225 .do_bits = apci3xxx_do_insn_bits,
226 .ttl_config = i_APCI3XXX_InsnConfigInitTTLIO,
227 .ttl_bits = i_APCI3XXX_InsnBitsTTLIO,
228 .ttl_read = i_APCI3XXX_InsnReadTTLIO,
229 .ttl_write = i_APCI3XXX_InsnWriteTTLIO,
230 }, {
231 .pc_DriverName = "apci3010-4",
232 .i_VendorId = PCI_VENDOR_ID_ADDIDATA,
233 .i_DeviceId = 0x3018,
234 .i_IorangeBase0 = 256,
235 .i_IorangeBase1 = 256,
236 .i_IorangeBase2 = 256,
237 .i_IorangeBase3 = 256,
238 .i_PCIEeprom = ADDIDATA_NO_EEPROM,
239 .pc_EepromChip = ADDIDATA_9054,
240 .i_NbrAiChannel = 4,
241 .i_NbrAiChannelDiff = 2,
242 .i_AiChannelList = 4,
243 .i_AiMaxdata = 4095,
244 .pr_AiRangelist = &range_apci3XXX_ai,
245 .i_NbrDiChannel = 4,
246 .i_NbrDoChannel = 4,
247 .i_DoMaxdata = 1,
248 .i_NbrTTLChannel = 24,
249 .b_AvailableConvertUnit = 6,
250 .ui_MinAcquisitiontimeNs = 5000,
251 .interrupt = v_APCI3XXX_Interrupt,
252 .reset = i_APCI3XXX_Reset,
253 .ai_config = i_APCI3XXX_InsnConfigAnalogInput,
254 .ai_read = i_APCI3XXX_InsnReadAnalogInput,
255 .di_bits = apci3xxx_di_insn_bits,
256 .do_bits = apci3xxx_do_insn_bits,
257 .ttl_config = i_APCI3XXX_InsnConfigInitTTLIO,
258 .ttl_bits = i_APCI3XXX_InsnBitsTTLIO,
259 .ttl_read = i_APCI3XXX_InsnReadTTLIO,
260 .ttl_write = i_APCI3XXX_InsnWriteTTLIO,
261 }, {
262 .pc_DriverName = "apci3016-16",
263 .i_VendorId = PCI_VENDOR_ID_ADDIDATA,
264 .i_DeviceId = 0x3019,
265 .i_IorangeBase0 = 256,
266 .i_IorangeBase1 = 256,
267 .i_IorangeBase2 = 256,
268 .i_IorangeBase3 = 256,
269 .i_PCIEeprom = ADDIDATA_NO_EEPROM,
270 .pc_EepromChip = ADDIDATA_9054,
271 .i_NbrAiChannel = 16,
272 .i_NbrAiChannelDiff = 8,
273 .i_AiChannelList = 16,
274 .i_AiMaxdata = 65535,
275 .pr_AiRangelist = &range_apci3XXX_ai,
276 .i_NbrDiChannel = 4,
277 .i_NbrDoChannel = 4,
278 .i_DoMaxdata = 1,
279 .i_NbrTTLChannel = 24,
280 .b_AvailableConvertUnit = 6,
281 .ui_MinAcquisitiontimeNs = 5000,
282 .interrupt = v_APCI3XXX_Interrupt,
283 .reset = i_APCI3XXX_Reset,
284 .ai_config = i_APCI3XXX_InsnConfigAnalogInput,
285 .ai_read = i_APCI3XXX_InsnReadAnalogInput,
286 .di_bits = apci3xxx_di_insn_bits,
287 .do_bits = apci3xxx_do_insn_bits,
288 .ttl_config = i_APCI3XXX_InsnConfigInitTTLIO,
289 .ttl_bits = i_APCI3XXX_InsnBitsTTLIO,
290 .ttl_read = i_APCI3XXX_InsnReadTTLIO,
291 .ttl_write = i_APCI3XXX_InsnWriteTTLIO,
292 }, {
293 .pc_DriverName = "apci3016-8",
294 .i_VendorId = PCI_VENDOR_ID_ADDIDATA,
295 .i_DeviceId = 0x301A,
296 .i_IorangeBase0 = 256,
297 .i_IorangeBase1 = 256,
298 .i_IorangeBase2 = 256,
299 .i_IorangeBase3 = 256,
300 .i_PCIEeprom = ADDIDATA_NO_EEPROM,
301 .pc_EepromChip = ADDIDATA_9054,
302 .i_NbrAiChannel = 8,
303 .i_NbrAiChannelDiff = 4,
304 .i_AiChannelList = 8,
305 .i_AiMaxdata = 65535,
306 .pr_AiRangelist = &range_apci3XXX_ai,
307 .i_NbrDiChannel = 4,
308 .i_NbrDoChannel = 4,
309 .i_DoMaxdata = 1,
310 .i_NbrTTLChannel = 24,
311 .b_AvailableConvertUnit = 6,
312 .ui_MinAcquisitiontimeNs = 5000,
313 .interrupt = v_APCI3XXX_Interrupt,
314 .reset = i_APCI3XXX_Reset,
315 .ai_config = i_APCI3XXX_InsnConfigAnalogInput,
316 .ai_read = i_APCI3XXX_InsnReadAnalogInput,
317 .di_bits = apci3xxx_di_insn_bits,
318 .do_bits = apci3xxx_do_insn_bits,
319 .ttl_config = i_APCI3XXX_InsnConfigInitTTLIO,
320 .ttl_bits = i_APCI3XXX_InsnBitsTTLIO,
321 .ttl_read = i_APCI3XXX_InsnReadTTLIO,
322 .ttl_write = i_APCI3XXX_InsnWriteTTLIO,
323 }, {
324 .pc_DriverName = "apci3016-4",
325 .i_VendorId = PCI_VENDOR_ID_ADDIDATA,
326 .i_DeviceId = 0x301B,
327 .i_IorangeBase0 = 256,
328 .i_IorangeBase1 = 256,
329 .i_IorangeBase2 = 256,
330 .i_IorangeBase3 = 256,
331 .i_PCIEeprom = ADDIDATA_NO_EEPROM,
332 .pc_EepromChip = ADDIDATA_9054,
333 .i_NbrAiChannel = 4,
334 .i_NbrAiChannelDiff = 2,
335 .i_AiChannelList = 4,
336 .i_AiMaxdata = 65535,
337 .pr_AiRangelist = &range_apci3XXX_ai,
338 .i_NbrDiChannel = 4,
339 .i_NbrDoChannel = 4,
340 .i_DoMaxdata = 1,
341 .i_NbrTTLChannel = 24,
342 .b_AvailableConvertUnit = 6,
343 .ui_MinAcquisitiontimeNs = 5000,
344 .interrupt = v_APCI3XXX_Interrupt,
345 .reset = i_APCI3XXX_Reset,
346 .ai_config = i_APCI3XXX_InsnConfigAnalogInput,
347 .ai_read = i_APCI3XXX_InsnReadAnalogInput,
348 .di_bits = apci3xxx_di_insn_bits,
349 .do_bits = apci3xxx_do_insn_bits,
350 .ttl_config = i_APCI3XXX_InsnConfigInitTTLIO,
351 .ttl_bits = i_APCI3XXX_InsnBitsTTLIO,
352 .ttl_read = i_APCI3XXX_InsnReadTTLIO,
353 .ttl_write = i_APCI3XXX_InsnWriteTTLIO,
354 }, {
355 .pc_DriverName = "apci3100-16-4",
356 .i_VendorId = PCI_VENDOR_ID_ADDIDATA,
357 .i_DeviceId = 0x301C,
358 .i_IorangeBase0 = 256,
359 .i_IorangeBase1 = 256,
360 .i_IorangeBase2 = 256,
361 .i_IorangeBase3 = 256,
362 .i_PCIEeprom = ADDIDATA_NO_EEPROM,
363 .pc_EepromChip = ADDIDATA_9054,
364 .i_NbrAiChannel = 16,
365 .i_NbrAiChannelDiff = 8,
366 .i_AiChannelList = 16,
367 .i_NbrAoChannel = 4,
368 .i_AiMaxdata = 4095,
369 .i_AoMaxdata = 4095,
370 .pr_AiRangelist = &range_apci3XXX_ai,
371 .pr_AoRangelist = &range_apci3XXX_ao,
372 .i_NbrTTLChannel = 24,
373 .b_AvailableConvertUnit = 6,
374 .ui_MinAcquisitiontimeNs = 10000,
375 .interrupt = v_APCI3XXX_Interrupt,
376 .reset = i_APCI3XXX_Reset,
377 .ai_config = i_APCI3XXX_InsnConfigAnalogInput,
378 .ai_read = i_APCI3XXX_InsnReadAnalogInput,
379 .ao_write = i_APCI3XXX_InsnWriteAnalogOutput,
380 .ttl_config = i_APCI3XXX_InsnConfigInitTTLIO,
381 .ttl_bits = i_APCI3XXX_InsnBitsTTLIO,
382 .ttl_read = i_APCI3XXX_InsnReadTTLIO,
383 .ttl_write = i_APCI3XXX_InsnWriteTTLIO,
384 }, {
385 .pc_DriverName = "apci3100-8-4",
386 .i_VendorId = PCI_VENDOR_ID_ADDIDATA,
387 .i_DeviceId = 0x301D,
388 .i_IorangeBase0 = 256,
389 .i_IorangeBase1 = 256,
390 .i_IorangeBase2 = 256,
391 .i_IorangeBase3 = 256,
392 .i_PCIEeprom = ADDIDATA_NO_EEPROM,
393 .pc_EepromChip = ADDIDATA_9054,
394 .i_NbrAiChannel = 8,
395 .i_NbrAiChannelDiff = 4,
396 .i_AiChannelList = 8,
397 .i_NbrAoChannel = 4,
398 .i_AiMaxdata = 4095,
399 .i_AoMaxdata = 4095,
400 .pr_AiRangelist = &range_apci3XXX_ai,
401 .pr_AoRangelist = &range_apci3XXX_ao,
402 .i_NbrTTLChannel = 24,
403 .b_AvailableConvertUnit = 6,
404 .ui_MinAcquisitiontimeNs = 10000,
405 .interrupt = v_APCI3XXX_Interrupt,
406 .reset = i_APCI3XXX_Reset,
407 .ai_config = i_APCI3XXX_InsnConfigAnalogInput,
408 .ai_read = i_APCI3XXX_InsnReadAnalogInput,
409 .ao_write = i_APCI3XXX_InsnWriteAnalogOutput,
410 .ttl_config = i_APCI3XXX_InsnConfigInitTTLIO,
411 .ttl_bits = i_APCI3XXX_InsnBitsTTLIO,
412 .ttl_read = i_APCI3XXX_InsnReadTTLIO,
413 .ttl_write = i_APCI3XXX_InsnWriteTTLIO,
414 }, {
415 .pc_DriverName = "apci3106-16-4",
416 .i_VendorId = PCI_VENDOR_ID_ADDIDATA,
417 .i_DeviceId = 0x301E,
418 .i_IorangeBase0 = 256,
419 .i_IorangeBase1 = 256,
420 .i_IorangeBase2 = 256,
421 .i_IorangeBase3 = 256,
422 .i_PCIEeprom = ADDIDATA_NO_EEPROM,
423 .pc_EepromChip = ADDIDATA_9054,
424 .i_NbrAiChannel = 16,
425 .i_NbrAiChannelDiff = 8,
426 .i_AiChannelList = 16,
427 .i_NbrAoChannel = 4,
428 .i_AiMaxdata = 65535,
429 .i_AoMaxdata = 4095,
430 .pr_AiRangelist = &range_apci3XXX_ai,
431 .pr_AoRangelist = &range_apci3XXX_ao,
432 .i_NbrTTLChannel = 24,
433 .b_AvailableConvertUnit = 6,
434 .ui_MinAcquisitiontimeNs = 10000,
435 .interrupt = v_APCI3XXX_Interrupt,
436 .reset = i_APCI3XXX_Reset,
437 .ai_config = i_APCI3XXX_InsnConfigAnalogInput,
438 .ai_read = i_APCI3XXX_InsnReadAnalogInput,
439 .ao_write = i_APCI3XXX_InsnWriteAnalogOutput,
440 .ttl_config = i_APCI3XXX_InsnConfigInitTTLIO,
441 .ttl_bits = i_APCI3XXX_InsnBitsTTLIO,
442 .ttl_read = i_APCI3XXX_InsnReadTTLIO,
443 .ttl_write = i_APCI3XXX_InsnWriteTTLIO,
444 }, {
445 .pc_DriverName = "apci3106-8-4",
446 .i_VendorId = PCI_VENDOR_ID_ADDIDATA,
447 .i_DeviceId = 0x301F,
448 .i_IorangeBase0 = 256,
449 .i_IorangeBase1 = 256,
450 .i_IorangeBase2 = 256,
451 .i_IorangeBase3 = 256,
452 .i_PCIEeprom = ADDIDATA_NO_EEPROM,
453 .pc_EepromChip = ADDIDATA_9054,
454 .i_NbrAiChannel = 8,
455 .i_NbrAiChannelDiff = 4,
456 .i_AiChannelList = 8,
457 .i_NbrAoChannel = 4,
458 .i_AiMaxdata = 65535,
459 .i_AoMaxdata = 4095,
460 .pr_AiRangelist = &range_apci3XXX_ai,
461 .pr_AoRangelist = &range_apci3XXX_ao,
462 .i_NbrTTLChannel = 24,
463 .b_AvailableConvertUnit = 6,
464 .ui_MinAcquisitiontimeNs = 10000,
465 .interrupt = v_APCI3XXX_Interrupt,
466 .reset = i_APCI3XXX_Reset,
467 .ai_config = i_APCI3XXX_InsnConfigAnalogInput,
468 .ai_read = i_APCI3XXX_InsnReadAnalogInput,
469 .ao_write = i_APCI3XXX_InsnWriteAnalogOutput,
470 .ttl_config = i_APCI3XXX_InsnConfigInitTTLIO,
471 .ttl_bits = i_APCI3XXX_InsnBitsTTLIO,
472 .ttl_read = i_APCI3XXX_InsnReadTTLIO,
473 .ttl_write = i_APCI3XXX_InsnWriteTTLIO,
474 }, {
475 .pc_DriverName = "apci3110-16-4",
476 .i_VendorId = PCI_VENDOR_ID_ADDIDATA,
477 .i_DeviceId = 0x3020,
478 .i_IorangeBase0 = 256,
479 .i_IorangeBase1 = 256,
480 .i_IorangeBase2 = 256,
481 .i_IorangeBase3 = 256,
482 .i_PCIEeprom = ADDIDATA_NO_EEPROM,
483 .pc_EepromChip = ADDIDATA_9054,
484 .i_NbrAiChannel = 16,
485 .i_NbrAiChannelDiff = 8,
486 .i_AiChannelList = 16,
487 .i_NbrAoChannel = 4,
488 .i_AiMaxdata = 4095,
489 .i_AoMaxdata = 4095,
490 .pr_AiRangelist = &range_apci3XXX_ai,
491 .pr_AoRangelist = &range_apci3XXX_ao,
492 .i_NbrDiChannel = 4,
493 .i_NbrDoChannel = 4,
494 .i_DoMaxdata = 1,
495 .i_NbrTTLChannel = 24,
496 .b_AvailableConvertUnit = 6,
497 .ui_MinAcquisitiontimeNs = 5000,
498 .interrupt = v_APCI3XXX_Interrupt,
499 .reset = i_APCI3XXX_Reset,
500 .ai_config = i_APCI3XXX_InsnConfigAnalogInput,
501 .ai_read = i_APCI3XXX_InsnReadAnalogInput,
502 .ao_write = i_APCI3XXX_InsnWriteAnalogOutput,
503 .di_bits = apci3xxx_di_insn_bits,
504 .do_bits = apci3xxx_do_insn_bits,
505 .ttl_config = i_APCI3XXX_InsnConfigInitTTLIO,
506 .ttl_bits = i_APCI3XXX_InsnBitsTTLIO,
507 .ttl_read = i_APCI3XXX_InsnReadTTLIO,
508 .ttl_write = i_APCI3XXX_InsnWriteTTLIO,
509 }, {
510 .pc_DriverName = "apci3110-8-4",
511 .i_VendorId = PCI_VENDOR_ID_ADDIDATA,
512 .i_DeviceId = 0x3021,
513 .i_IorangeBase0 = 256,
514 .i_IorangeBase1 = 256,
515 .i_IorangeBase2 = 256,
516 .i_IorangeBase3 = 256,
517 .i_PCIEeprom = ADDIDATA_NO_EEPROM,
518 .pc_EepromChip = ADDIDATA_9054,
519 .i_NbrAiChannel = 8,
520 .i_NbrAiChannelDiff = 4,
521 .i_AiChannelList = 8,
522 .i_NbrAoChannel = 4,
523 .i_AiMaxdata = 4095,
524 .i_AoMaxdata = 4095,
525 .pr_AiRangelist = &range_apci3XXX_ai,
526 .pr_AoRangelist = &range_apci3XXX_ao,
527 .i_NbrDiChannel = 4,
528 .i_NbrDoChannel = 4,
529 .i_DoMaxdata = 1,
530 .i_NbrTTLChannel = 24,
531 .b_AvailableConvertUnit = 6,
532 .ui_MinAcquisitiontimeNs = 5000,
533 .interrupt = v_APCI3XXX_Interrupt,
534 .reset = i_APCI3XXX_Reset,
535 .ai_config = i_APCI3XXX_InsnConfigAnalogInput,
536 .ai_read = i_APCI3XXX_InsnReadAnalogInput,
537 .ao_write = i_APCI3XXX_InsnWriteAnalogOutput,
538 .di_bits = apci3xxx_di_insn_bits,
539 .do_bits = apci3xxx_do_insn_bits,
540 .ttl_config = i_APCI3XXX_InsnConfigInitTTLIO,
541 .ttl_bits = i_APCI3XXX_InsnBitsTTLIO,
542 .ttl_read = i_APCI3XXX_InsnReadTTLIO,
543 .ttl_write = i_APCI3XXX_InsnWriteTTLIO,
544 }, {
545 .pc_DriverName = "apci3116-16-4",
546 .i_VendorId = PCI_VENDOR_ID_ADDIDATA,
547 .i_DeviceId = 0x3022,
548 .i_IorangeBase0 = 256,
549 .i_IorangeBase1 = 256,
550 .i_IorangeBase2 = 256,
551 .i_IorangeBase3 = 256,
552 .i_PCIEeprom = ADDIDATA_NO_EEPROM,
553 .pc_EepromChip = ADDIDATA_9054,
554 .i_NbrAiChannel = 16,
555 .i_NbrAiChannelDiff = 8,
556 .i_AiChannelList = 16,
557 .i_NbrAoChannel = 4,
558 .i_AiMaxdata = 65535,
559 .i_AoMaxdata = 4095,
560 .pr_AiRangelist = &range_apci3XXX_ai,
561 .pr_AoRangelist = &range_apci3XXX_ao,
562 .i_NbrDiChannel = 4,
563 .i_NbrDoChannel = 4,
564 .i_DoMaxdata = 1,
565 .i_NbrTTLChannel = 24,
566 .b_AvailableConvertUnit = 6,
567 .ui_MinAcquisitiontimeNs = 5000,
568 .interrupt = v_APCI3XXX_Interrupt,
569 .reset = i_APCI3XXX_Reset,
570 .ai_config = i_APCI3XXX_InsnConfigAnalogInput,
571 .ai_read = i_APCI3XXX_InsnReadAnalogInput,
572 .ao_write = i_APCI3XXX_InsnWriteAnalogOutput,
573 .di_bits = apci3xxx_di_insn_bits,
574 .do_bits = apci3xxx_do_insn_bits,
575 .ttl_config = i_APCI3XXX_InsnConfigInitTTLIO,
576 .ttl_bits = i_APCI3XXX_InsnBitsTTLIO,
577 .ttl_read = i_APCI3XXX_InsnReadTTLIO,
578 .ttl_write = i_APCI3XXX_InsnWriteTTLIO,
579 }, {
580 .pc_DriverName = "apci3116-8-4",
581 .i_VendorId = PCI_VENDOR_ID_ADDIDATA,
582 .i_DeviceId = 0x3023,
583 .i_IorangeBase0 = 256,
584 .i_IorangeBase1 = 256,
585 .i_IorangeBase2 = 256,
586 .i_IorangeBase3 = 256,
587 .i_PCIEeprom = ADDIDATA_NO_EEPROM,
588 .pc_EepromChip = ADDIDATA_9054,
589 .i_NbrAiChannel = 8,
590 .i_NbrAiChannelDiff = 4,
591 .i_AiChannelList = 8,
592 .i_NbrAoChannel = 4,
593 .i_AiMaxdata = 65535,
594 .i_AoMaxdata = 4095,
595 .pr_AiRangelist = &range_apci3XXX_ai,
596 .pr_AoRangelist = &range_apci3XXX_ao,
597 .i_NbrDiChannel = 4,
598 .i_NbrDoChannel = 4,
599 .i_DoMaxdata = 1,
600 .i_NbrTTLChannel = 24,
601 .b_AvailableConvertUnit = 6,
602 .ui_MinAcquisitiontimeNs = 5000,
603 .interrupt = v_APCI3XXX_Interrupt,
604 .reset = i_APCI3XXX_Reset,
605 .ai_config = i_APCI3XXX_InsnConfigAnalogInput,
606 .ai_read = i_APCI3XXX_InsnReadAnalogInput,
607 .ao_write = i_APCI3XXX_InsnWriteAnalogOutput,
608 .di_bits = apci3xxx_di_insn_bits,
609 .do_bits = apci3xxx_do_insn_bits,
610 .ttl_config = i_APCI3XXX_InsnConfigInitTTLIO,
611 .ttl_bits = i_APCI3XXX_InsnBitsTTLIO,
612 .ttl_read = i_APCI3XXX_InsnReadTTLIO,
613 .ttl_write = i_APCI3XXX_InsnWriteTTLIO,
614 }, {
615 .pc_DriverName = "apci3003",
616 .i_VendorId = PCI_VENDOR_ID_ADDIDATA,
617 .i_DeviceId = 0x300B,
618 .i_IorangeBase0 = 256,
619 .i_IorangeBase1 = 256,
620 .i_IorangeBase2 = 256,
621 .i_IorangeBase3 = 256,
622 .i_PCIEeprom = ADDIDATA_NO_EEPROM,
623 .pc_EepromChip = ADDIDATA_9054,
624 .i_NbrAiChannelDiff = 4,
625 .i_AiChannelList = 4,
626 .i_AiMaxdata = 65535,
627 .pr_AiRangelist = &range_apci3XXX_ai,
628 .i_NbrDiChannel = 4,
629 .i_NbrDoChannel = 4,
630 .i_DoMaxdata = 1,
631 .b_AvailableConvertUnit = 7,
632 .ui_MinAcquisitiontimeNs = 2500,
633 .interrupt = v_APCI3XXX_Interrupt,
634 .reset = i_APCI3XXX_Reset,
635 .ai_config = i_APCI3XXX_InsnConfigAnalogInput,
636 .ai_read = i_APCI3XXX_InsnReadAnalogInput,
637 .di_bits = apci3xxx_di_insn_bits,
638 .do_bits = apci3xxx_do_insn_bits,
639 }, {
640 .pc_DriverName = "apci3002-16",
641 .i_VendorId = PCI_VENDOR_ID_ADDIDATA,
642 .i_DeviceId = 0x3002,
643 .i_IorangeBase0 = 256,
644 .i_IorangeBase1 = 256,
645 .i_IorangeBase2 = 256,
646 .i_IorangeBase3 = 256,
647 .i_PCIEeprom = ADDIDATA_NO_EEPROM,
648 .pc_EepromChip = ADDIDATA_9054,
649 .i_NbrAiChannelDiff = 16,
650 .i_AiChannelList = 16,
651 .i_AiMaxdata = 65535,
652 .pr_AiRangelist = &range_apci3XXX_ai,
653 .i_NbrDiChannel = 4,
654 .i_NbrDoChannel = 4,
655 .i_DoMaxdata = 1,
656 .b_AvailableConvertUnit = 6,
657 .ui_MinAcquisitiontimeNs = 5000,
658 .interrupt = v_APCI3XXX_Interrupt,
659 .reset = i_APCI3XXX_Reset,
660 .ai_config = i_APCI3XXX_InsnConfigAnalogInput,
661 .ai_read = i_APCI3XXX_InsnReadAnalogInput,
662 .di_bits = apci3xxx_di_insn_bits,
663 .do_bits = apci3xxx_do_insn_bits,
664 }, {
665 .pc_DriverName = "apci3002-8",
666 .i_VendorId = PCI_VENDOR_ID_ADDIDATA,
667 .i_DeviceId = 0x3003,
668 .i_IorangeBase0 = 256,
669 .i_IorangeBase1 = 256,
670 .i_IorangeBase2 = 256,
671 .i_IorangeBase3 = 256,
672 .i_PCIEeprom = ADDIDATA_NO_EEPROM,
673 .pc_EepromChip = ADDIDATA_9054,
674 .i_NbrAiChannelDiff = 8,
675 .i_AiChannelList = 8,
676 .i_AiMaxdata = 65535,
677 .pr_AiRangelist = &range_apci3XXX_ai,
678 .i_NbrDiChannel = 4,
679 .i_NbrDoChannel = 4,
680 .i_DoMaxdata = 1,
681 .b_AvailableConvertUnit = 6,
682 .ui_MinAcquisitiontimeNs = 5000,
683 .interrupt = v_APCI3XXX_Interrupt,
684 .reset = i_APCI3XXX_Reset,
685 .ai_config = i_APCI3XXX_InsnConfigAnalogInput,
686 .ai_read = i_APCI3XXX_InsnReadAnalogInput,
687 .di_bits = apci3xxx_di_insn_bits,
688 .do_bits = apci3xxx_do_insn_bits,
689 }, {
690 .pc_DriverName = "apci3002-4",
691 .i_VendorId = PCI_VENDOR_ID_ADDIDATA,
692 .i_DeviceId = 0x3004,
693 .i_IorangeBase0 = 256,
694 .i_IorangeBase1 = 256,
695 .i_IorangeBase2 = 256,
696 .i_IorangeBase3 = 256,
697 .i_PCIEeprom = ADDIDATA_NO_EEPROM,
698 .pc_EepromChip = ADDIDATA_9054,
699 .i_NbrAiChannelDiff = 4,
700 .i_AiChannelList = 4,
701 .i_AiMaxdata = 65535,
702 .pr_AiRangelist = &range_apci3XXX_ai,
703 .i_NbrDiChannel = 4,
704 .i_NbrDoChannel = 4,
705 .i_DoMaxdata = 1,
706 .b_AvailableConvertUnit = 6,
707 .ui_MinAcquisitiontimeNs = 5000,
708 .interrupt = v_APCI3XXX_Interrupt,
709 .reset = i_APCI3XXX_Reset,
710 .ai_config = i_APCI3XXX_InsnConfigAnalogInput,
711 .ai_read = i_APCI3XXX_InsnReadAnalogInput,
712 .di_bits = apci3xxx_di_insn_bits,
713 .do_bits = apci3xxx_do_insn_bits,
714 }, {
715 .pc_DriverName = "apci3500",
716 .i_VendorId = PCI_VENDOR_ID_ADDIDATA,
717 .i_DeviceId = 0x3024,
718 .i_IorangeBase0 = 256,
719 .i_IorangeBase1 = 256,
720 .i_IorangeBase2 = 256,
721 .i_IorangeBase3 = 256,
722 .i_PCIEeprom = ADDIDATA_NO_EEPROM,
723 .pc_EepromChip = ADDIDATA_9054,
724 .i_NbrAoChannel = 4,
725 .i_AoMaxdata = 4095,
726 .pr_AoRangelist = &range_apci3XXX_ao,
727 .i_NbrTTLChannel = 24,
728 .interrupt = v_APCI3XXX_Interrupt,
729 .reset = i_APCI3XXX_Reset,
730 .ao_write = i_APCI3XXX_InsnWriteAnalogOutput,
731 .ttl_config = i_APCI3XXX_InsnConfigInitTTLIO,
732 .ttl_bits = i_APCI3XXX_InsnBitsTTLIO,
733 .ttl_read = i_APCI3XXX_InsnReadTTLIO,
734 .ttl_write = i_APCI3XXX_InsnWriteTTLIO,
735 },
736};
737
738static struct comedi_driver apci3xxx_driver = {
739 .driver_name = "addi_apci_3xxx",
740 .module = THIS_MODULE,
741 .auto_attach = addi_auto_attach,
742 .detach = i_ADDI_Detach,
743 .num_names = ARRAY_SIZE(apci3xxx_boardtypes),
744 .board_name = &apci3xxx_boardtypes[0].pc_DriverName,
745 .offset = sizeof(struct addi_board),
746};
747
748static int apci3xxx_pci_probe(struct pci_dev *dev,
749 const struct pci_device_id *ent)
750{
751 return comedi_pci_auto_config(dev, &apci3xxx_driver);
752}
753
754static void apci3xxx_pci_remove(struct pci_dev *dev)
755{
756 comedi_pci_auto_unconfig(dev);
757}
758
759static DEFINE_PCI_DEVICE_TABLE(apci3xxx_pci_table) = {
760 { PCI_DEVICE(PCI_VENDOR_ID_ADDIDATA, 0x3010) },
761 { PCI_DEVICE(PCI_VENDOR_ID_ADDIDATA, 0x300f) },
762 { PCI_DEVICE(PCI_VENDOR_ID_ADDIDATA, 0x300e) },
763 { PCI_DEVICE(PCI_VENDOR_ID_ADDIDATA, 0x3013) },
764 { PCI_DEVICE(PCI_VENDOR_ID_ADDIDATA, 0x3014) },
765 { PCI_DEVICE(PCI_VENDOR_ID_ADDIDATA, 0x3015) },
766 { PCI_DEVICE(PCI_VENDOR_ID_ADDIDATA, 0x3016) },
767 { PCI_DEVICE(PCI_VENDOR_ID_ADDIDATA, 0x3017) },
768 { PCI_DEVICE(PCI_VENDOR_ID_ADDIDATA, 0x3018) },
769 { PCI_DEVICE(PCI_VENDOR_ID_ADDIDATA, 0x3019) },
770 { PCI_DEVICE(PCI_VENDOR_ID_ADDIDATA, 0x301a) },
771 { PCI_DEVICE(PCI_VENDOR_ID_ADDIDATA, 0x301b) },
772 { PCI_DEVICE(PCI_VENDOR_ID_ADDIDATA, 0x301c) },
773 { PCI_DEVICE(PCI_VENDOR_ID_ADDIDATA, 0x301d) },
774 { PCI_DEVICE(PCI_VENDOR_ID_ADDIDATA, 0x301e) },
775 { PCI_DEVICE(PCI_VENDOR_ID_ADDIDATA, 0x301f) },
776 { PCI_DEVICE(PCI_VENDOR_ID_ADDIDATA, 0x3020) },
777 { PCI_DEVICE(PCI_VENDOR_ID_ADDIDATA, 0x3021) },
778 { PCI_DEVICE(PCI_VENDOR_ID_ADDIDATA, 0x3022) },
779 { PCI_DEVICE(PCI_VENDOR_ID_ADDIDATA, 0x3023) },
780 { PCI_DEVICE(PCI_VENDOR_ID_ADDIDATA, 0x300B) },
781 { PCI_DEVICE(PCI_VENDOR_ID_ADDIDATA, 0x3002) },
782 { PCI_DEVICE(PCI_VENDOR_ID_ADDIDATA, 0x3003) },
783 { PCI_DEVICE(PCI_VENDOR_ID_ADDIDATA, 0x3004) },
784 { PCI_DEVICE(PCI_VENDOR_ID_ADDIDATA, 0x3024) },
785 { 0 }
786};
787MODULE_DEVICE_TABLE(pci, apci3xxx_pci_table);
788
789static struct pci_driver apci3xxx_pci_driver = {
790 .name = "addi_apci_3xxx",
791 .id_table = apci3xxx_pci_table,
792 .probe = apci3xxx_pci_probe,
793 .remove = apci3xxx_pci_remove,
794};
795module_comedi_pci_driver(apci3xxx_driver, apci3xxx_pci_driver);
796
7MODULE_AUTHOR("Comedi http://www.comedi.org"); 797MODULE_AUTHOR("Comedi http://www.comedi.org");
8MODULE_DESCRIPTION("Comedi low-level driver"); 798MODULE_DESCRIPTION("Comedi low-level driver");
9MODULE_LICENSE("GPL"); 799MODULE_LICENSE("GPL");
diff --git a/drivers/staging/comedi/drivers/adl_pci6208.c b/drivers/staging/comedi/drivers/adl_pci6208.c
index 3492ce1156e0..9a56eed3910f 100644
--- a/drivers/staging/comedi/drivers/adl_pci6208.c
+++ b/drivers/staging/comedi/drivers/adl_pci6208.c
@@ -174,27 +174,26 @@ static const void *pci6208_find_boardinfo(struct comedi_device *dev,
174 return NULL; 174 return NULL;
175} 175}
176 176
177static int pci6208_attach_pci(struct comedi_device *dev, 177static int pci6208_auto_attach(struct comedi_device *dev,
178 struct pci_dev *pcidev) 178 unsigned long context_unused)
179{ 179{
180 struct pci_dev *pcidev = comedi_to_pci_dev(dev);
180 const struct pci6208_board *boardinfo; 181 const struct pci6208_board *boardinfo;
181 struct pci6208_private *devpriv; 182 struct pci6208_private *devpriv;
182 struct comedi_subdevice *s; 183 struct comedi_subdevice *s;
183 unsigned int val; 184 unsigned int val;
184 int ret; 185 int ret;
185 186
186 comedi_set_hw_dev(dev, &pcidev->dev);
187
188 boardinfo = pci6208_find_boardinfo(dev, pcidev); 187 boardinfo = pci6208_find_boardinfo(dev, pcidev);
189 if (!boardinfo) 188 if (!boardinfo)
190 return -ENODEV; 189 return -ENODEV;
191 dev->board_ptr = boardinfo; 190 dev->board_ptr = boardinfo;
192 dev->board_name = boardinfo->name; 191 dev->board_name = boardinfo->name;
193 192
194 ret = alloc_private(dev, sizeof(*devpriv)); 193 devpriv = kzalloc(sizeof(*devpriv), GFP_KERNEL);
195 if (ret < 0) 194 if (!devpriv)
196 return ret; 195 return -ENOMEM;
197 devpriv = dev->private; 196 dev->private = devpriv;
198 197
199 ret = comedi_pci_enable(pcidev, dev->board_name); 198 ret = comedi_pci_enable(pcidev, dev->board_name);
200 if (ret) 199 if (ret)
@@ -261,17 +260,17 @@ static void pci6208_detach(struct comedi_device *dev)
261static struct comedi_driver adl_pci6208_driver = { 260static struct comedi_driver adl_pci6208_driver = {
262 .driver_name = "adl_pci6208", 261 .driver_name = "adl_pci6208",
263 .module = THIS_MODULE, 262 .module = THIS_MODULE,
264 .attach_pci = pci6208_attach_pci, 263 .auto_attach = pci6208_auto_attach,
265 .detach = pci6208_detach, 264 .detach = pci6208_detach,
266}; 265};
267 266
268static int __devinit adl_pci6208_pci_probe(struct pci_dev *dev, 267static int adl_pci6208_pci_probe(struct pci_dev *dev,
269 const struct pci_device_id *ent) 268 const struct pci_device_id *ent)
270{ 269{
271 return comedi_pci_auto_config(dev, &adl_pci6208_driver); 270 return comedi_pci_auto_config(dev, &adl_pci6208_driver);
272} 271}
273 272
274static void __devexit adl_pci6208_pci_remove(struct pci_dev *dev) 273static void adl_pci6208_pci_remove(struct pci_dev *dev)
275{ 274{
276 comedi_pci_auto_unconfig(dev); 275 comedi_pci_auto_unconfig(dev);
277} 276}
@@ -287,7 +286,7 @@ static struct pci_driver adl_pci6208_pci_driver = {
287 .name = "adl_pci6208", 286 .name = "adl_pci6208",
288 .id_table = adl_pci6208_pci_table, 287 .id_table = adl_pci6208_pci_table,
289 .probe = adl_pci6208_pci_probe, 288 .probe = adl_pci6208_pci_probe,
290 .remove = __devexit_p(adl_pci6208_pci_remove), 289 .remove = adl_pci6208_pci_remove,
291}; 290};
292module_comedi_pci_driver(adl_pci6208_driver, adl_pci6208_pci_driver); 291module_comedi_pci_driver(adl_pci6208_driver, adl_pci6208_pci_driver);
293 292
diff --git a/drivers/staging/comedi/drivers/adl_pci7x3x.c b/drivers/staging/comedi/drivers/adl_pci7x3x.c
index 599714e978b5..772edc02f5ce 100644
--- a/drivers/staging/comedi/drivers/adl_pci7x3x.c
+++ b/drivers/staging/comedi/drivers/adl_pci7x3x.c
@@ -168,17 +168,16 @@ static const void *adl_pci7x3x_find_boardinfo(struct comedi_device *dev,
168 return NULL; 168 return NULL;
169} 169}
170 170
171static int adl_pci7x3x_attach_pci(struct comedi_device *dev, 171static int adl_pci7x3x_auto_attach(struct comedi_device *dev,
172 struct pci_dev *pcidev) 172 unsigned long context_unused)
173{ 173{
174 struct pci_dev *pcidev = comedi_to_pci_dev(dev);
174 const struct adl_pci7x3x_boardinfo *board; 175 const struct adl_pci7x3x_boardinfo *board;
175 struct comedi_subdevice *s; 176 struct comedi_subdevice *s;
176 int subdev; 177 int subdev;
177 int nchan; 178 int nchan;
178 int ret; 179 int ret;
179 180
180 comedi_set_hw_dev(dev, &pcidev->dev);
181
182 board = adl_pci7x3x_find_boardinfo(dev, pcidev); 181 board = adl_pci7x3x_find_boardinfo(dev, pcidev);
183 if (!board) 182 if (!board)
184 return -ENODEV; 183 return -ENODEV;
@@ -293,17 +292,17 @@ static void adl_pci7x3x_detach(struct comedi_device *dev)
293static struct comedi_driver adl_pci7x3x_driver = { 292static struct comedi_driver adl_pci7x3x_driver = {
294 .driver_name = "adl_pci7x3x", 293 .driver_name = "adl_pci7x3x",
295 .module = THIS_MODULE, 294 .module = THIS_MODULE,
296 .attach_pci = adl_pci7x3x_attach_pci, 295 .auto_attach = adl_pci7x3x_auto_attach,
297 .detach = adl_pci7x3x_detach, 296 .detach = adl_pci7x3x_detach,
298}; 297};
299 298
300static int __devinit adl_pci7x3x_pci_probe(struct pci_dev *dev, 299static int adl_pci7x3x_pci_probe(struct pci_dev *dev,
301 const struct pci_device_id *ent) 300 const struct pci_device_id *ent)
302{ 301{
303 return comedi_pci_auto_config(dev, &adl_pci7x3x_driver); 302 return comedi_pci_auto_config(dev, &adl_pci7x3x_driver);
304} 303}
305 304
306static void __devexit adl_pci7x3x_pci_remove(struct pci_dev *dev) 305static void adl_pci7x3x_pci_remove(struct pci_dev *dev)
307{ 306{
308 comedi_pci_auto_unconfig(dev); 307 comedi_pci_auto_unconfig(dev);
309} 308}
@@ -323,7 +322,7 @@ static struct pci_driver adl_pci7x3x_pci_driver = {
323 .name = "adl_pci7x3x", 322 .name = "adl_pci7x3x",
324 .id_table = adl_pci7x3x_pci_table, 323 .id_table = adl_pci7x3x_pci_table,
325 .probe = adl_pci7x3x_pci_probe, 324 .probe = adl_pci7x3x_pci_probe,
326 .remove = __devexit_p(adl_pci7x3x_pci_remove), 325 .remove = adl_pci7x3x_pci_remove,
327}; 326};
328module_comedi_pci_driver(adl_pci7x3x_driver, adl_pci7x3x_pci_driver); 327module_comedi_pci_driver(adl_pci7x3x_driver, adl_pci7x3x_pci_driver);
329 328
diff --git a/drivers/staging/comedi/drivers/adl_pci8164.c b/drivers/staging/comedi/drivers/adl_pci8164.c
index 05e06e7ba9f7..4dd9d707a79d 100644
--- a/drivers/staging/comedi/drivers/adl_pci8164.c
+++ b/drivers/staging/comedi/drivers/adl_pci8164.c
@@ -89,9 +89,9 @@ static void adl_pci8164_insn_read(struct comedi_device *dev,
89 } 89 }
90 90
91 data[0] = inw(dev->iobase + axis_reg + offset); 91 data[0] = inw(dev->iobase + axis_reg + offset);
92 printk(KERN_DEBUG "comedi: pci8164 %s read -> " 92 dev_dbg(dev->class_dev,
93 "%04X:%04X on axis %s\n", 93 "pci8164 %s read -> %04X:%04X on axis %s\n",
94 action, data[0], data[1], axisname); 94 action, data[0], data[1], axisname);
95} 95}
96 96
97static int adl_pci8164_insn_read_msts(struct comedi_device *dev, 97static int adl_pci8164_insn_read_msts(struct comedi_device *dev,
@@ -170,9 +170,9 @@ static void adl_pci8164_insn_out(struct comedi_device *dev,
170 170
171 outw(data[0], dev->iobase + axis_reg + offset); 171 outw(data[0], dev->iobase + axis_reg + offset);
172 172
173 printk(KERN_DEBUG "comedi: pci8164 %s write -> " 173 dev_dbg(dev->class_dev,
174 "%04X:%04X on axis %s\n", 174 "pci8164 %s write -> %04X:%04X on axis %s\n",
175 action, data[0], data[1], axisname); 175 action, data[0], data[1], axisname);
176 176
177} 177}
178 178
@@ -212,14 +212,13 @@ static int adl_pci8164_insn_write_buf1(struct comedi_device *dev,
212 return 2; 212 return 2;
213} 213}
214 214
215static int adl_pci8164_attach_pci(struct comedi_device *dev, 215static int adl_pci8164_auto_attach(struct comedi_device *dev,
216 struct pci_dev *pcidev) 216 unsigned long context_unused)
217{ 217{
218 struct pci_dev *pcidev = comedi_to_pci_dev(dev);
218 struct comedi_subdevice *s; 219 struct comedi_subdevice *s;
219 int ret; 220 int ret;
220 221
221 comedi_set_hw_dev(dev, &pcidev->dev);
222
223 dev->board_name = dev->driver->driver_name; 222 dev->board_name = dev->driver->driver_name;
224 223
225 ret = comedi_pci_enable(pcidev, dev->board_name); 224 ret = comedi_pci_enable(pcidev, dev->board_name);
@@ -289,17 +288,17 @@ static void adl_pci8164_detach(struct comedi_device *dev)
289static struct comedi_driver adl_pci8164_driver = { 288static struct comedi_driver adl_pci8164_driver = {
290 .driver_name = "adl_pci8164", 289 .driver_name = "adl_pci8164",
291 .module = THIS_MODULE, 290 .module = THIS_MODULE,
292 .attach_pci = adl_pci8164_attach_pci, 291 .auto_attach = adl_pci8164_auto_attach,
293 .detach = adl_pci8164_detach, 292 .detach = adl_pci8164_detach,
294}; 293};
295 294
296static int __devinit adl_pci8164_pci_probe(struct pci_dev *dev, 295static int adl_pci8164_pci_probe(struct pci_dev *dev,
297 const struct pci_device_id *ent) 296 const struct pci_device_id *ent)
298{ 297{
299 return comedi_pci_auto_config(dev, &adl_pci8164_driver); 298 return comedi_pci_auto_config(dev, &adl_pci8164_driver);
300} 299}
301 300
302static void __devexit adl_pci8164_pci_remove(struct pci_dev *dev) 301static void adl_pci8164_pci_remove(struct pci_dev *dev)
303{ 302{
304 comedi_pci_auto_unconfig(dev); 303 comedi_pci_auto_unconfig(dev);
305} 304}
@@ -314,7 +313,7 @@ static struct pci_driver adl_pci8164_pci_driver = {
314 .name = "adl_pci8164", 313 .name = "adl_pci8164",
315 .id_table = adl_pci8164_pci_table, 314 .id_table = adl_pci8164_pci_table,
316 .probe = adl_pci8164_pci_probe, 315 .probe = adl_pci8164_pci_probe,
317 .remove = __devexit_p(adl_pci8164_pci_remove), 316 .remove = adl_pci8164_pci_remove,
318}; 317};
319module_comedi_pci_driver(adl_pci8164_driver, adl_pci8164_pci_driver); 318module_comedi_pci_driver(adl_pci8164_driver, adl_pci8164_pci_driver);
320 319
diff --git a/drivers/staging/comedi/drivers/adl_pci9111.c b/drivers/staging/comedi/drivers/adl_pci9111.c
index a87192ac2846..a339b9dd27cf 100644
--- a/drivers/staging/comedi/drivers/adl_pci9111.c
+++ b/drivers/staging/comedi/drivers/adl_pci9111.c
@@ -366,52 +366,29 @@ static int pci9111_ai_do_cmd_test(struct comedi_device *dev,
366 if (error) 366 if (error)
367 return 2; 367 return 2;
368 368
369 /* Step 3 : make sure arguments are trivialy compatible */ 369 /* Step 3: check if arguments are trivially valid */
370 370
371 if ((cmd->start_src == TRIG_NOW) && (cmd->start_arg != 0)) { 371 error |= cfc_check_trigger_arg_is(&cmd->start_arg, 0);
372 cmd->start_arg = 0;
373 error++;
374 }
375 372
376 if ((cmd->convert_src == TRIG_TIMER) && 373 if (cmd->convert_src == TRIG_TIMER)
377 (cmd->convert_arg < PCI9111_AI_ACQUISITION_PERIOD_MIN_NS)) { 374 error |= cfc_check_trigger_arg_min(&cmd->convert_arg,
378 cmd->convert_arg = PCI9111_AI_ACQUISITION_PERIOD_MIN_NS; 375 PCI9111_AI_ACQUISITION_PERIOD_MIN_NS);
379 error++; 376 else /* TRIG_EXT */
380 } 377 error |= cfc_check_trigger_arg_is(&cmd->convert_arg, 0);
381 if ((cmd->convert_src == TRIG_EXT) && (cmd->convert_arg != 0)) {
382 cmd->convert_arg = 0;
383 error++;
384 }
385 378
386 if ((cmd->scan_begin_src == TRIG_TIMER) && 379 if (cmd->scan_begin_src == TRIG_TIMER)
387 (cmd->scan_begin_arg < PCI9111_AI_ACQUISITION_PERIOD_MIN_NS)) { 380 error |= cfc_check_trigger_arg_min(&cmd->scan_begin_arg,
388 cmd->scan_begin_arg = PCI9111_AI_ACQUISITION_PERIOD_MIN_NS; 381 PCI9111_AI_ACQUISITION_PERIOD_MIN_NS);
389 error++; 382 else /* TRIG_FOLLOW || TRIG_EXT */
390 } 383 error |= cfc_check_trigger_arg_is(&cmd->scan_begin_arg, 0);
391 if ((cmd->scan_begin_src == TRIG_FOLLOW)
392 && (cmd->scan_begin_arg != 0)) {
393 cmd->scan_begin_arg = 0;
394 error++;
395 }
396 if ((cmd->scan_begin_src == TRIG_EXT) && (cmd->scan_begin_arg != 0)) {
397 cmd->scan_begin_arg = 0;
398 error++;
399 }
400 384
401 if ((cmd->scan_end_src == TRIG_COUNT) && 385 error |= cfc_check_trigger_arg_is(&cmd->scan_end_arg,
402 (cmd->scan_end_arg != cmd->chanlist_len)) { 386 cmd->chanlist_len);
403 cmd->scan_end_arg = cmd->chanlist_len;
404 error++;
405 }
406 387
407 if ((cmd->stop_src == TRIG_COUNT) && (cmd->stop_arg < 1)) { 388 if (cmd->stop_src == TRIG_COUNT)
408 cmd->stop_arg = 1; 389 error |= cfc_check_trigger_arg_min(&cmd->stop_arg, 1);
409 error++; 390 else /* TRIG_NONE */
410 } 391 error |= cfc_check_trigger_arg_is(&cmd->stop_arg, 0);
411 if ((cmd->stop_src == TRIG_NONE) && (cmd->stop_arg != 0)) {
412 cmd->stop_arg = 0;
413 error++;
414 }
415 392
416 if (error) 393 if (error)
417 return 3; 394 return 3;
@@ -879,20 +856,20 @@ static int pci9111_reset(struct comedi_device *dev)
879 return 0; 856 return 0;
880} 857}
881 858
882static int pci9111_attach_pci(struct comedi_device *dev, 859static int pci9111_auto_attach(struct comedi_device *dev,
883 struct pci_dev *pcidev) 860 unsigned long context_unused)
884{ 861{
862 struct pci_dev *pcidev = comedi_to_pci_dev(dev);
885 struct pci9111_private_data *dev_private; 863 struct pci9111_private_data *dev_private;
886 struct comedi_subdevice *s; 864 struct comedi_subdevice *s;
887 int ret; 865 int ret;
888 866
889 comedi_set_hw_dev(dev, &pcidev->dev);
890 dev->board_name = dev->driver->driver_name; 867 dev->board_name = dev->driver->driver_name;
891 868
892 ret = alloc_private(dev, sizeof(*dev_private)); 869 dev_private = kzalloc(sizeof(*dev_private), GFP_KERNEL);
893 if (ret) 870 if (!dev_private)
894 return ret; 871 return -ENOMEM;
895 dev_private = dev->private; 872 dev->private = dev_private;
896 873
897 ret = comedi_pci_enable(pcidev, dev->board_name); 874 ret = comedi_pci_enable(pcidev, dev->board_name);
898 if (ret) 875 if (ret)
@@ -976,17 +953,17 @@ static void pci9111_detach(struct comedi_device *dev)
976static struct comedi_driver adl_pci9111_driver = { 953static struct comedi_driver adl_pci9111_driver = {
977 .driver_name = "adl_pci9111", 954 .driver_name = "adl_pci9111",
978 .module = THIS_MODULE, 955 .module = THIS_MODULE,
979 .attach_pci = pci9111_attach_pci, 956 .auto_attach = pci9111_auto_attach,
980 .detach = pci9111_detach, 957 .detach = pci9111_detach,
981}; 958};
982 959
983static int __devinit pci9111_pci_probe(struct pci_dev *dev, 960static int pci9111_pci_probe(struct pci_dev *dev,
984 const struct pci_device_id *ent) 961 const struct pci_device_id *ent)
985{ 962{
986 return comedi_pci_auto_config(dev, &adl_pci9111_driver); 963 return comedi_pci_auto_config(dev, &adl_pci9111_driver);
987} 964}
988 965
989static void __devexit pci9111_pci_remove(struct pci_dev *dev) 966static void pci9111_pci_remove(struct pci_dev *dev)
990{ 967{
991 comedi_pci_auto_unconfig(dev); 968 comedi_pci_auto_unconfig(dev);
992} 969}
@@ -1002,7 +979,7 @@ static struct pci_driver adl_pci9111_pci_driver = {
1002 .name = "adl_pci9111", 979 .name = "adl_pci9111",
1003 .id_table = pci9111_pci_table, 980 .id_table = pci9111_pci_table,
1004 .probe = pci9111_pci_probe, 981 .probe = pci9111_pci_probe,
1005 .remove = __devexit_p(pci9111_pci_remove), 982 .remove = pci9111_pci_remove,
1006}; 983};
1007module_comedi_pci_driver(adl_pci9111_driver, adl_pci9111_pci_driver); 984module_comedi_pci_driver(adl_pci9111_driver, adl_pci9111_pci_driver);
1008 985
diff --git a/drivers/staging/comedi/drivers/adl_pci9118.c b/drivers/staging/comedi/drivers/adl_pci9118.c
index 06ff65c85c9f..b6dda809bd13 100644
--- a/drivers/staging/comedi/drivers/adl_pci9118.c
+++ b/drivers/staging/comedi/drivers/adl_pci9118.c
@@ -62,6 +62,20 @@ Configuration options:
62 256|=ignore nFull - A/D FIFO Full status 62 256|=ignore nFull - A/D FIFO Full status
63 63
64*/ 64*/
65
66/*
67 * FIXME
68 *
69 * All the supported boards have the same PCI vendor and device IDs, so
70 * auto-attachment of PCI devices will always find the first board type.
71 *
72 * Perhaps the boards have different subdevice IDs that we could use to
73 * distinguish them?
74 *
75 * Need some device attributes so the board type can be corrected after
76 * attachment if necessary, and possibly to set other options supported by
77 * manual attachment.
78 */
65#include "../comedidev.h" 79#include "../comedidev.h"
66 80
67#include <linux/delay.h> 81#include <linux/delay.h>
@@ -73,8 +87,6 @@ Configuration options:
73#include "8253.h" 87#include "8253.h"
74#include "comedi_fc.h" 88#include "comedi_fc.h"
75 89
76#define PCI_VENDOR_ID_AMCC 0x10e8
77
78/* paranoid checks are broken */ 90/* paranoid checks are broken */
79#undef PCI9118_PARANOIDCHECK /* 91#undef PCI9118_PARANOIDCHECK /*
80 * if defined, then is used code which control 92 * if defined, then is used code which control
@@ -210,8 +222,7 @@ static const struct comedi_lrange range_pci9118hg = { 8, {
210 222
211struct boardtype { 223struct boardtype {
212 const char *name; /* board name */ 224 const char *name; /* board name */
213 int vendor_id; /* PCI vendor a device ID of card */ 225 int device_id; /* PCI device ID of card */
214 int device_id;
215 int iorange_amcc; /* iorange for own S5933 region */ 226 int iorange_amcc; /* iorange for own S5933 region */
216 int iorange_9118; /* pass thru card region size */ 227 int iorange_9118; /* pass thru card region size */
217 int n_aichan; /* num of A/D chans */ 228 int n_aichan; /* num of A/D chans */
@@ -235,6 +246,61 @@ struct boardtype {
235 246
236}; 247};
237 248
249static const struct boardtype boardtypes[] = {
250 {
251 .name = "pci9118dg",
252 .device_id = 0x80d9,
253 .iorange_amcc = AMCC_OP_REG_SIZE,
254 .iorange_9118 = IORANGE_9118,
255 .n_aichan = 16,
256 .n_aichand = 8,
257 .mux_aichan = 256,
258 .n_aichanlist = PCI9118_CHANLEN,
259 .n_aochan = 2,
260 .ai_maxdata = 0x0fff,
261 .ao_maxdata = 0x0fff,
262 .rangelist_ai = &range_pci9118dg_hr,
263 .rangelist_ao = &range_bipolar10,
264 .ai_ns_min = 3000,
265 .ai_pacer_min = 12,
266 .half_fifo_size = 512,
267 }, {
268 .name = "pci9118hg",
269 .device_id = 0x80d9,
270 .iorange_amcc = AMCC_OP_REG_SIZE,
271 .iorange_9118 = IORANGE_9118,
272 .n_aichan = 16,
273 .n_aichand = 8,
274 .mux_aichan = 256,
275 .n_aichanlist = PCI9118_CHANLEN,
276 .n_aochan = 2,
277 .ai_maxdata = 0x0fff,
278 .ao_maxdata = 0x0fff,
279 .rangelist_ai = &range_pci9118hg,
280 .rangelist_ao = &range_bipolar10,
281 .ai_ns_min = 3000,
282 .ai_pacer_min = 12,
283 .half_fifo_size = 512,
284 }, {
285 .name = "pci9118hr",
286 .device_id = 0x80d9,
287 .iorange_amcc = AMCC_OP_REG_SIZE,
288 .iorange_9118 = IORANGE_9118,
289 .n_aichan = 16,
290 .n_aichand = 8,
291 .mux_aichan = 256,
292 .n_aichanlist = PCI9118_CHANLEN,
293 .n_aochan = 2,
294 .ai_maxdata = 0xffff,
295 .ao_maxdata = 0x0fff,
296 .rangelist_ai = &range_pci9118dg_hr,
297 .rangelist_ao = &range_bipolar10,
298 .ai_ns_min = 10000,
299 .ai_pacer_min = 40,
300 .half_fifo_size = 512,
301 },
302};
303
238struct pci9118_private { 304struct pci9118_private {
239 unsigned long iobase_a; /* base+size for AMCC chip */ 305 unsigned long iobase_a; /* base+size for AMCC chip */
240 unsigned int master; /* master capable */ 306 unsigned int master; /* master capable */
@@ -358,10 +424,8 @@ static int check_channel_list(struct comedi_device *dev,
358 return 0; 424 return 0;
359 } 425 }
360 if ((frontadd + n_chan + backadd) > s->len_chanlist) { 426 if ((frontadd + n_chan + backadd) > s->len_chanlist) {
361 printk 427 comedi_error(dev,
362 ("comedi%d: range/channel list is too long for " 428 "range/channel list is too long for actual configuration!\n");
363 "actual configuration (%d>%d)!",
364 dev->minor, n_chan, s->len_chanlist - frontadd - backadd);
365 return 0; 429 return 0;
366 } 430 }
367 431
@@ -892,11 +956,10 @@ static void interrupt_pci9118_ai_onesample(struct comedi_device *dev,
892 if (devpriv->ai16bits == 0) { 956 if (devpriv->ai16bits == 0) {
893 if ((sampl & 0x000f) != devpriv->chanlist[s->async->cur_chan]) { 957 if ((sampl & 0x000f) != devpriv->chanlist[s->async->cur_chan]) {
894 /* data dropout! */ 958 /* data dropout! */
895 printk 959 dev_info(dev->class_dev,
896 ("comedi: A/D SAMPL - data dropout: " 960 "A/D SAMPL - data dropout: received channel %d, expected %d!\n",
897 "received channel %d, expected %d!\n", 961 sampl & 0x000f,
898 sampl & 0x000f, 962 devpriv->chanlist[s->async->cur_chan]);
899 devpriv->chanlist[s->async->cur_chan]);
900 s->async->events |= COMEDI_CB_ERROR | COMEDI_CB_EOA; 963 s->async->events |= COMEDI_CB_ERROR | COMEDI_CB_EOA;
901 pci9118_ai_cancel(dev, s); 964 pci9118_ai_cancel(dev, s);
902 comedi_event(dev, s); 965 comedi_event(dev, s);
@@ -1153,19 +1216,13 @@ static int pci9118_ai_cmdtest(struct comedi_device *dev,
1153 if (err) 1216 if (err)
1154 return 2; 1217 return 2;
1155 1218
1156 /* step 3: make sure arguments are trivially compatible */ 1219 /* Step 3: check if arguments are trivially valid */
1157 1220
1158 if (cmd->start_src & (TRIG_NOW | TRIG_EXT)) 1221 if (cmd->start_src & (TRIG_NOW | TRIG_EXT))
1159 if (cmd->start_arg != 0) { 1222 err |= cfc_check_trigger_arg_is(&cmd->start_arg, 0);
1160 cmd->start_arg = 0;
1161 err++;
1162 }
1163 1223
1164 if (cmd->scan_begin_src & (TRIG_FOLLOW | TRIG_EXT)) 1224 if (cmd->scan_begin_src & (TRIG_FOLLOW | TRIG_EXT))
1165 if (cmd->scan_begin_arg != 0) { 1225 err |= cfc_check_trigger_arg_is(&cmd->scan_begin_arg, 0);
1166 cmd->scan_begin_arg = 0;
1167 err++;
1168 }
1169 1226
1170 if ((cmd->scan_begin_src == TRIG_TIMER) && 1227 if ((cmd->scan_begin_src == TRIG_TIMER) &&
1171 (cmd->convert_src == TRIG_TIMER) && (cmd->scan_end_arg == 1)) { 1228 (cmd->convert_src == TRIG_TIMER) && (cmd->scan_end_arg == 1)) {
@@ -1175,64 +1232,40 @@ static int pci9118_ai_cmdtest(struct comedi_device *dev,
1175 } 1232 }
1176 1233
1177 if (cmd->scan_begin_src == TRIG_TIMER) 1234 if (cmd->scan_begin_src == TRIG_TIMER)
1178 if (cmd->scan_begin_arg < this_board->ai_ns_min) { 1235 err |= cfc_check_trigger_arg_min(&cmd->scan_begin_arg,
1179 cmd->scan_begin_arg = this_board->ai_ns_min; 1236 this_board->ai_ns_min);
1180 err++;
1181 }
1182 1237
1183 if (cmd->scan_begin_src == TRIG_EXT) 1238 if (cmd->scan_begin_src == TRIG_EXT)
1184 if (cmd->scan_begin_arg) { 1239 if (cmd->scan_begin_arg) {
1185 cmd->scan_begin_arg = 0; 1240 cmd->scan_begin_arg = 0;
1186 err++; 1241 err |= -EINVAL;
1187 if (cmd->scan_end_arg > 65535) { 1242 err |= cfc_check_trigger_arg_max(&cmd->scan_end_arg,
1188 cmd->scan_end_arg = 65535; 1243 65535);
1189 err++;
1190 }
1191 } 1244 }
1192 1245
1193 if (cmd->convert_src & (TRIG_TIMER | TRIG_NOW)) 1246 if (cmd->convert_src & (TRIG_TIMER | TRIG_NOW))
1194 if (cmd->convert_arg < this_board->ai_ns_min) { 1247 err |= cfc_check_trigger_arg_min(&cmd->convert_arg,
1195 cmd->convert_arg = this_board->ai_ns_min; 1248 this_board->ai_ns_min);
1196 err++;
1197 }
1198 1249
1199 if (cmd->convert_src == TRIG_EXT) 1250 if (cmd->convert_src == TRIG_EXT)
1200 if (cmd->convert_arg) { 1251 err |= cfc_check_trigger_arg_is(&cmd->convert_arg, 0);
1201 cmd->convert_arg = 0;
1202 err++;
1203 }
1204 1252
1205 if (cmd->stop_src == TRIG_COUNT) { 1253 if (cmd->stop_src == TRIG_COUNT)
1206 if (!cmd->stop_arg) { 1254 err |= cfc_check_trigger_arg_min(&cmd->stop_arg, 1);
1207 cmd->stop_arg = 1; 1255 else /* TRIG_NONE */
1208 err++; 1256 err |= cfc_check_trigger_arg_is(&cmd->stop_arg, 0);
1209 }
1210 } else { /* TRIG_NONE */
1211 if (cmd->stop_arg != 0) {
1212 cmd->stop_arg = 0;
1213 err++;
1214 }
1215 }
1216 1257
1217 if (!cmd->chanlist_len) { 1258 err |= cfc_check_trigger_arg_min(&cmd->chanlist_len, 1);
1218 cmd->chanlist_len = 1; 1259 err |= cfc_check_trigger_arg_max(&cmd->chanlist_len,
1219 err++; 1260 this_board->n_aichanlist);
1220 }
1221 1261
1222 if (cmd->chanlist_len > this_board->n_aichanlist) { 1262 err |= cfc_check_trigger_arg_min(&cmd->scan_end_arg,
1223 cmd->chanlist_len = this_board->n_aichanlist; 1263 cmd->chanlist_len);
1224 err++;
1225 }
1226
1227 if (cmd->scan_end_arg < cmd->chanlist_len) {
1228 cmd->scan_end_arg = cmd->chanlist_len;
1229 err++;
1230 }
1231 1264
1232 if ((cmd->scan_end_arg % cmd->chanlist_len)) { 1265 if ((cmd->scan_end_arg % cmd->chanlist_len)) {
1233 cmd->scan_end_arg = 1266 cmd->scan_end_arg =
1234 cmd->chanlist_len * (cmd->scan_end_arg / cmd->chanlist_len); 1267 cmd->chanlist_len * (cmd->scan_end_arg / cmd->chanlist_len);
1235 err++; 1268 err |= -EINVAL;
1236 } 1269 }
1237 1270
1238 if (err) 1271 if (err)
@@ -1318,21 +1351,18 @@ static int Compute_and_setup_dma(struct comedi_device *dev)
1318 if (dmalen0 < (devpriv->ai_n_realscanlen << 1)) { 1351 if (dmalen0 < (devpriv->ai_n_realscanlen << 1)) {
1319 /* uff, too short DMA buffer, disable EOS support! */ 1352 /* uff, too short DMA buffer, disable EOS support! */
1320 devpriv->ai_flags &= (~TRIG_WAKE_EOS); 1353 devpriv->ai_flags &= (~TRIG_WAKE_EOS);
1321 printk 1354 dev_info(dev->class_dev,
1322 ("comedi%d: WAR: DMA0 buf too short, can't " 1355 "WAR: DMA0 buf too short, can't support TRIG_WAKE_EOS (%d<%d)\n",
1323 "support TRIG_WAKE_EOS (%d<%d)\n", 1356 dmalen0, devpriv->ai_n_realscanlen << 1);
1324 dev->minor, dmalen0,
1325 devpriv->ai_n_realscanlen << 1);
1326 } else { 1357 } else {
1327 /* short first DMA buffer to one scan */ 1358 /* short first DMA buffer to one scan */
1328 dmalen0 = devpriv->ai_n_realscanlen << 1; 1359 dmalen0 = devpriv->ai_n_realscanlen << 1;
1329 if (devpriv->useeoshandle) 1360 if (devpriv->useeoshandle)
1330 dmalen0 += 2; 1361 dmalen0 += 2;
1331 if (dmalen0 < 4) { 1362 if (dmalen0 < 4) {
1332 printk 1363 dev_info(dev->class_dev,
1333 ("comedi%d: ERR: DMA0 buf len bug? " 1364 "ERR: DMA0 buf len bug? (%d<4)\n",
1334 "(%d<4)\n", 1365 dmalen0);
1335 dev->minor, dmalen0);
1336 dmalen0 = 4; 1366 dmalen0 = 4;
1337 } 1367 }
1338 } 1368 }
@@ -1341,21 +1371,18 @@ static int Compute_and_setup_dma(struct comedi_device *dev)
1341 if (dmalen1 < (devpriv->ai_n_realscanlen << 1)) { 1371 if (dmalen1 < (devpriv->ai_n_realscanlen << 1)) {
1342 /* uff, too short DMA buffer, disable EOS support! */ 1372 /* uff, too short DMA buffer, disable EOS support! */
1343 devpriv->ai_flags &= (~TRIG_WAKE_EOS); 1373 devpriv->ai_flags &= (~TRIG_WAKE_EOS);
1344 printk 1374 dev_info(dev->class_dev,
1345 ("comedi%d: WAR: DMA1 buf too short, " 1375 "WAR: DMA1 buf too short, can't support TRIG_WAKE_EOS (%d<%d)\n",
1346 "can't support TRIG_WAKE_EOS (%d<%d)\n", 1376 dmalen1, devpriv->ai_n_realscanlen << 1);
1347 dev->minor, dmalen1,
1348 devpriv->ai_n_realscanlen << 1);
1349 } else { 1377 } else {
1350 /* short second DMA buffer to one scan */ 1378 /* short second DMA buffer to one scan */
1351 dmalen1 = devpriv->ai_n_realscanlen << 1; 1379 dmalen1 = devpriv->ai_n_realscanlen << 1;
1352 if (devpriv->useeoshandle) 1380 if (devpriv->useeoshandle)
1353 dmalen1 -= 2; 1381 dmalen1 -= 2;
1354 if (dmalen1 < 4) { 1382 if (dmalen1 < 4) {
1355 printk 1383 dev_info(dev->class_dev,
1356 ("comedi%d: ERR: DMA1 buf len bug? " 1384 "ERR: DMA1 buf len bug? (%d<4)\n",
1357 "(%d<4)\n", 1385 dmalen1);
1358 dev->minor, dmalen1);
1359 dmalen1 = 4; 1386 dmalen1 = 4;
1360 } 1387 }
1361 } 1388 }
@@ -1865,6 +1892,20 @@ static int pci9118_reset(struct comedi_device *dev)
1865 return 0; 1892 return 0;
1866} 1893}
1867 1894
1895/*
1896 * FIXME - this is pretty ineffective because all the supported board types
1897 * have the same device ID!
1898 */
1899static const struct boardtype *pci9118_find_boardinfo(struct pci_dev *pcidev)
1900{
1901 unsigned int i;
1902
1903 for (i = 0; i < ARRAY_SIZE(boardtypes); i++)
1904 if (pcidev->device == boardtypes[i].device_id)
1905 return &boardtypes[i];
1906 return NULL;
1907}
1908
1868static struct pci_dev *pci9118_find_pci(struct comedi_device *dev, 1909static struct pci_dev *pci9118_find_pci(struct comedi_device *dev,
1869 struct comedi_devconfig *it) 1910 struct comedi_devconfig *it)
1870{ 1911{
@@ -1884,85 +1925,63 @@ static struct pci_dev *pci9118_find_pci(struct comedi_device *dev,
1884 PCI_SLOT(pcidev->devfn) != slot) 1925 PCI_SLOT(pcidev->devfn) != slot)
1885 continue; 1926 continue;
1886 } 1927 }
1887 /*
1888 * Look for device that isn't in use.
1889 * Enable PCI device and request regions.
1890 */
1891 if (comedi_pci_enable(pcidev, "adl_pci9118"))
1892 continue;
1893 printk(KERN_ERR ", b:s:f=%d:%d:%d, io=0x%4lx, 0x%4lx",
1894 pcidev->bus->number,
1895 PCI_SLOT(pcidev->devfn),
1896 PCI_FUNC(pcidev->devfn),
1897 (unsigned long)pci_resource_start(pcidev, 2),
1898 (unsigned long)pci_resource_start(pcidev, 0));
1899 return pcidev; 1928 return pcidev;
1900 } 1929 }
1901 printk(KERN_ERR 1930 dev_err(dev->class_dev,
1902 "comedi%d: no supported board found! (req. bus/slot : %d/%d)\n", 1931 "no supported board found! (req. bus/slot : %d/%d)\n",
1903 dev->minor, bus, slot); 1932 bus, slot);
1904 return NULL; 1933 return NULL;
1905} 1934}
1906 1935
1907static int pci9118_attach(struct comedi_device *dev, 1936static void pci9118_report_attach(struct comedi_device *dev, unsigned int irq)
1908 struct comedi_devconfig *it) 1937{
1938 struct pci_dev *pcidev = comedi_to_pci_dev(dev);
1939 struct pci9118_private *devpriv = dev->private;
1940 char irqbuf[30];
1941 char muxbuf[30];
1942
1943 if (irq)
1944 snprintf(irqbuf, sizeof(irqbuf), "irq %u%s", irq,
1945 (dev->irq ? "" : " UNAVAILABLE"));
1946 else
1947 snprintf(irqbuf, sizeof(irqbuf), "irq DISABLED");
1948 if (devpriv->usemux)
1949 snprintf(muxbuf, sizeof(muxbuf), "ext mux %u chans",
1950 devpriv->usemux);
1951 else
1952 snprintf(muxbuf, sizeof(muxbuf), "no ext mux");
1953 dev_info(dev->class_dev, "%s (pci %s, %s, %sbus master, %s) attached\n",
1954 dev->board_name, pci_name(pcidev), irqbuf,
1955 (devpriv->master ? "" : "no "), muxbuf);
1956}
1957
1958static int pci9118_common_attach(struct comedi_device *dev, int disable_irq,
1959 int master, int ext_mux, int softsshdelay,
1960 int hw_err_mask)
1909{ 1961{
1910 const struct boardtype *this_board = comedi_board(dev); 1962 const struct boardtype *this_board = comedi_board(dev);
1911 struct pci9118_private *devpriv; 1963 struct pci9118_private *devpriv = dev->private;
1912 struct pci_dev *pcidev; 1964 struct pci_dev *pcidev = comedi_to_pci_dev(dev);
1913 struct comedi_subdevice *s; 1965 struct comedi_subdevice *s;
1914 int ret, pages, i; 1966 int ret, pages, i;
1915 unsigned short master;
1916 unsigned int irq; 1967 unsigned int irq;
1917 u16 u16w; 1968 u16 u16w;
1918 1969
1919 printk("comedi%d: adl_pci9118: board=%s", dev->minor, this_board->name); 1970 dev->board_name = this_board->name;
1920 1971 ret = comedi_pci_enable(pcidev, dev->board_name);
1921 if (it->options[3] & 1) 1972 if (ret) {
1922 master = 0; /* user don't want use bus master */ 1973 dev_err(dev->class_dev,
1923 else 1974 "cannot enable PCI device %s\n", pci_name(pcidev));
1924 master = 1; 1975 return ret;
1925
1926 ret = alloc_private(dev, sizeof(*devpriv));
1927 if (ret < 0) {
1928 printk(" - Allocation failed!\n");
1929 return -ENOMEM;
1930 } 1976 }
1931 devpriv = dev->private;
1932
1933 pcidev = pci9118_find_pci(dev, it);
1934 if (!pcidev)
1935 return -EIO;
1936 comedi_set_hw_dev(dev, &pcidev->dev);
1937
1938 if (master) 1977 if (master)
1939 pci_set_master(pcidev); 1978 pci_set_master(pcidev);
1940 1979
1941 irq = pcidev->irq;
1942 devpriv->iobase_a = pci_resource_start(pcidev, 0); 1980 devpriv->iobase_a = pci_resource_start(pcidev, 0);
1943 dev->iobase = pci_resource_start(pcidev, 2); 1981 dev->iobase = pci_resource_start(pcidev, 2);
1944 1982
1945 dev->board_name = this_board->name;
1946
1947 pci9118_reset(dev); 1983 pci9118_reset(dev);
1948 1984
1949 if (it->options[3] & 2)
1950 irq = 0; /* user don't want use IRQ */
1951 if (irq > 0) {
1952 if (request_irq(irq, interrupt_pci9118, IRQF_SHARED,
1953 "ADLink PCI-9118", dev)) {
1954 printk(", unable to allocate IRQ %d, DISABLING IT",
1955 irq);
1956 irq = 0; /* Can't use IRQ */
1957 } else {
1958 printk(", irq=%u", irq);
1959 }
1960 } else {
1961 printk(", IRQ disabled");
1962 }
1963
1964 dev->irq = irq;
1965
1966 if (master) { /* alloc DMA buffers */ 1985 if (master) { /* alloc DMA buffers */
1967 devpriv->dma_doublebuf = 0; 1986 devpriv->dma_doublebuf = 0;
1968 for (i = 0; i < 2; i++) { 1987 for (i = 0; i < 2; i++) {
@@ -1984,47 +2003,37 @@ static int pci9118_attach(struct comedi_device *dev,
1984 } 2003 }
1985 } 2004 }
1986 if (!devpriv->dmabuf_virt[0]) { 2005 if (!devpriv->dmabuf_virt[0]) {
1987 printk(", Can't allocate DMA buffer, DMA disabled!"); 2006 dev_warn(dev->class_dev,
2007 "Can't allocate DMA buffer, DMA disabled!\n");
1988 master = 0; 2008 master = 0;
1989 } 2009 }
1990
1991 if (devpriv->dmabuf_virt[1]) 2010 if (devpriv->dmabuf_virt[1])
1992 devpriv->dma_doublebuf = 1; 2011 devpriv->dma_doublebuf = 1;
1993
1994 } 2012 }
1995
1996 devpriv->master = master; 2013 devpriv->master = master;
1997 if (devpriv->master) 2014
1998 printk(", bus master"); 2015 if (ext_mux > 0) {
1999 else 2016 if (ext_mux > 256)
2000 printk(", no bus master"); 2017 ext_mux = 256; /* max 256 channels! */
2001 2018 if (softsshdelay > 0)
2002 devpriv->usemux = 0; 2019 if (ext_mux > 128)
2003 if (it->options[2] > 0) { 2020 ext_mux = 128;
2004 devpriv->usemux = it->options[2]; 2021 devpriv->usemux = ext_mux;
2005 if (devpriv->usemux > 256) 2022 } else {
2006 devpriv->usemux = 256; /* max 256 channels! */ 2023 devpriv->usemux = 0;
2007 if (it->options[4] > 0)
2008 if (devpriv->usemux > 128) {
2009 devpriv->usemux = 128;
2010 /* max 128 channels with softare S&H! */
2011 }
2012 printk(", ext. mux %d channels", devpriv->usemux);
2013 } 2024 }
2014 2025
2015 devpriv->softsshdelay = it->options[4]; 2026 if (softsshdelay < 0) {
2016 if (devpriv->softsshdelay < 0) { 2027 /* select sample&hold signal polarity */
2017 /* select sample&hold signal polarity */ 2028 devpriv->softsshdelay = -softsshdelay;
2018 devpriv->softsshdelay = -devpriv->softsshdelay;
2019 devpriv->softsshsample = 0x80; 2029 devpriv->softsshsample = 0x80;
2020 devpriv->softsshhold = 0x00; 2030 devpriv->softsshhold = 0x00;
2021 } else { 2031 } else {
2032 devpriv->softsshdelay = softsshdelay;
2022 devpriv->softsshsample = 0x00; 2033 devpriv->softsshsample = 0x00;
2023 devpriv->softsshhold = 0x80; 2034 devpriv->softsshhold = 0x80;
2024 } 2035 }
2025 2036
2026 printk(".\n");
2027
2028 pci_read_config_word(pcidev, PCI_COMMAND, &u16w); 2037 pci_read_config_word(pcidev, PCI_COMMAND, &u16w);
2029 pci_write_config_word(pcidev, PCI_COMMAND, u16w | 64); 2038 pci_write_config_word(pcidev, PCI_COMMAND, u16w | 64);
2030 /* Enable parity check for parity error */ 2039 /* Enable parity check for parity error */
@@ -2047,12 +2056,7 @@ static int pci9118_attach(struct comedi_device *dev,
2047 s->range_table = this_board->rangelist_ai; 2056 s->range_table = this_board->rangelist_ai;
2048 s->cancel = pci9118_ai_cancel; 2057 s->cancel = pci9118_ai_cancel;
2049 s->insn_read = pci9118_insn_read_ai; 2058 s->insn_read = pci9118_insn_read_ai;
2050 if (dev->irq) { 2059 s->munge = pci9118_ai_munge;
2051 s->subdev_flags |= SDF_CMD_READ;
2052 s->do_cmdtest = pci9118_ai_cmdtest;
2053 s->do_cmd = pci9118_ai_cmd;
2054 s->munge = pci9118_ai_munge;
2055 }
2056 2060
2057 s = &dev->subdevices[1]; 2061 s = &dev->subdevices[1];
2058 s->type = COMEDI_SUBD_AO; 2062 s->type = COMEDI_SUBD_AO;
@@ -2088,8 +2092,8 @@ static int pci9118_attach(struct comedi_device *dev,
2088 devpriv->i8254_osc_base = 250; /* 250ns=4MHz */ 2092 devpriv->i8254_osc_base = 250; /* 250ns=4MHz */
2089 devpriv->ai_maskharderr = 0x10a; 2093 devpriv->ai_maskharderr = 0x10a;
2090 /* default measure crash condition */ 2094 /* default measure crash condition */
2091 if (it->options[5]) /* disable some requested */ 2095 if (hw_err_mask) /* disable some requested */
2092 devpriv->ai_maskharderr &= ~it->options[5]; 2096 devpriv->ai_maskharderr &= ~hw_err_mask;
2093 2097
2094 switch (this_board->ai_maxdata) { 2098 switch (this_board->ai_maxdata) {
2095 case 0xffff: 2099 case 0xffff:
@@ -2099,9 +2103,86 @@ static int pci9118_attach(struct comedi_device *dev,
2099 devpriv->ai16bits = 0; 2103 devpriv->ai16bits = 0;
2100 break; 2104 break;
2101 } 2105 }
2106
2107 if (disable_irq)
2108 irq = 0;
2109 else
2110 irq = pcidev->irq;
2111 if (irq > 0) {
2112 if (request_irq(irq, interrupt_pci9118, IRQF_SHARED,
2113 dev->board_name, dev)) {
2114 dev_warn(dev->class_dev,
2115 "unable to allocate IRQ %u, DISABLING IT\n",
2116 irq);
2117 } else {
2118 dev->irq = irq;
2119 /* Enable AI commands */
2120 s = &dev->subdevices[0];
2121 s->subdev_flags |= SDF_CMD_READ;
2122 s->do_cmdtest = pci9118_ai_cmdtest;
2123 s->do_cmd = pci9118_ai_cmd;
2124 }
2125 }
2126
2127 pci9118_report_attach(dev, irq);
2102 return 0; 2128 return 0;
2103} 2129}
2104 2130
2131static int pci9118_attach(struct comedi_device *dev,
2132 struct comedi_devconfig *it)
2133{
2134 struct pci9118_private *devpriv;
2135 struct pci_dev *pcidev;
2136 int ext_mux, disable_irq, master, softsshdelay, hw_err_mask;
2137
2138 ext_mux = it->options[2];
2139 master = ((it->options[3] & 1) == 0);
2140 disable_irq = ((it->options[3] & 2) != 0);
2141 softsshdelay = it->options[4];
2142 hw_err_mask = it->options[5];
2143
2144 devpriv = kzalloc(sizeof(*devpriv), GFP_KERNEL);
2145 if (!devpriv)
2146 return -ENOMEM;
2147 dev->private = devpriv;
2148
2149 pcidev = pci9118_find_pci(dev, it);
2150 if (!pcidev)
2151 return -EIO;
2152 comedi_set_hw_dev(dev, &pcidev->dev);
2153
2154 return pci9118_common_attach(dev, disable_irq, master, ext_mux,
2155 softsshdelay, hw_err_mask);
2156}
2157
2158static int pci9118_auto_attach(struct comedi_device *dev,
2159 unsigned long context_unused)
2160{
2161 struct pci_dev *pcidev = comedi_to_pci_dev(dev);
2162 struct pci9118_private *devpriv;
2163
2164 devpriv = kzalloc(sizeof(*devpriv), GFP_KERNEL);
2165 if (!devpriv)
2166 return -ENOMEM;
2167 dev->private = devpriv;
2168
2169 dev->board_ptr = pci9118_find_boardinfo(pcidev);
2170 if (dev->board_ptr == NULL) {
2171 dev_err(dev->class_dev,
2172 "adl_pci9118: cannot determine board type for pci %s\n",
2173 pci_name(pcidev));
2174 return -EINVAL;
2175 }
2176 /*
2177 * Need to 'get' the PCI device to match the 'put' in pci9118_detach().
2178 * (The 'put' also matches the implicit 'get' by pci9118_find_pci().)
2179 */
2180 pci_dev_get(pcidev);
2181 /* Don't disable irq, use bus master, no external mux,
2182 * no sample-hold delay, no error mask. */
2183 return pci9118_common_attach(dev, 0, 1, 0, 0, 0);
2184}
2185
2105static void pci9118_detach(struct comedi_device *dev) 2186static void pci9118_detach(struct comedi_device *dev)
2106{ 2187{
2107 struct pci_dev *pcidev = comedi_to_pci_dev(dev); 2188 struct pci_dev *pcidev = comedi_to_pci_dev(dev);
@@ -2127,81 +2208,24 @@ static void pci9118_detach(struct comedi_device *dev)
2127 } 2208 }
2128} 2209}
2129 2210
2130static const struct boardtype boardtypes[] = {
2131 {
2132 .name = "pci9118dg",
2133 .vendor_id = PCI_VENDOR_ID_AMCC,
2134 .device_id = 0x80d9,
2135 .iorange_amcc = AMCC_OP_REG_SIZE,
2136 .iorange_9118 = IORANGE_9118,
2137 .n_aichan = 16,
2138 .n_aichand = 8,
2139 .mux_aichan = 256,
2140 .n_aichanlist = PCI9118_CHANLEN,
2141 .n_aochan = 2,
2142 .ai_maxdata = 0x0fff,
2143 .ao_maxdata = 0x0fff,
2144 .rangelist_ai = &range_pci9118dg_hr,
2145 .rangelist_ao = &range_bipolar10,
2146 .ai_ns_min = 3000,
2147 .ai_pacer_min = 12,
2148 .half_fifo_size = 512,
2149 }, {
2150 .name = "pci9118hg",
2151 .vendor_id = PCI_VENDOR_ID_AMCC,
2152 .device_id = 0x80d9,
2153 .iorange_amcc = AMCC_OP_REG_SIZE,
2154 .iorange_9118 = IORANGE_9118,
2155 .n_aichan = 16,
2156 .n_aichand = 8,
2157 .mux_aichan = 256,
2158 .n_aichanlist = PCI9118_CHANLEN,
2159 .n_aochan = 2,
2160 .ai_maxdata = 0x0fff,
2161 .ao_maxdata = 0x0fff,
2162 .rangelist_ai = &range_pci9118hg,
2163 .rangelist_ao = &range_bipolar10,
2164 .ai_ns_min = 3000,
2165 .ai_pacer_min = 12,
2166 .half_fifo_size = 512,
2167 }, {
2168 .name = "pci9118hr",
2169 .vendor_id = PCI_VENDOR_ID_AMCC,
2170 .device_id = 0x80d9,
2171 .iorange_amcc = AMCC_OP_REG_SIZE,
2172 .iorange_9118 = IORANGE_9118,
2173 .n_aichan = 16,
2174 .n_aichand = 8,
2175 .mux_aichan = 256,
2176 .n_aichanlist = PCI9118_CHANLEN,
2177 .n_aochan = 2,
2178 .ai_maxdata = 0xffff,
2179 .ao_maxdata = 0x0fff,
2180 .rangelist_ai = &range_pci9118dg_hr,
2181 .rangelist_ao = &range_bipolar10,
2182 .ai_ns_min = 10000,
2183 .ai_pacer_min = 40,
2184 .half_fifo_size = 512,
2185 },
2186};
2187
2188static struct comedi_driver adl_pci9118_driver = { 2211static struct comedi_driver adl_pci9118_driver = {
2189 .driver_name = "adl_pci9118", 2212 .driver_name = "adl_pci9118",
2190 .module = THIS_MODULE, 2213 .module = THIS_MODULE,
2191 .attach = pci9118_attach, 2214 .attach = pci9118_attach,
2215 .auto_attach = pci9118_auto_attach,
2192 .detach = pci9118_detach, 2216 .detach = pci9118_detach,
2193 .num_names = ARRAY_SIZE(boardtypes), 2217 .num_names = ARRAY_SIZE(boardtypes),
2194 .board_name = &boardtypes[0].name, 2218 .board_name = &boardtypes[0].name,
2195 .offset = sizeof(struct boardtype), 2219 .offset = sizeof(struct boardtype),
2196}; 2220};
2197 2221
2198static int __devinit adl_pci9118_pci_probe(struct pci_dev *dev, 2222static int adl_pci9118_pci_probe(struct pci_dev *dev,
2199 const struct pci_device_id *ent) 2223 const struct pci_device_id *ent)
2200{ 2224{
2201 return comedi_pci_auto_config(dev, &adl_pci9118_driver); 2225 return comedi_pci_auto_config(dev, &adl_pci9118_driver);
2202} 2226}
2203 2227
2204static void __devexit adl_pci9118_pci_remove(struct pci_dev *dev) 2228static void adl_pci9118_pci_remove(struct pci_dev *dev)
2205{ 2229{
2206 comedi_pci_auto_unconfig(dev); 2230 comedi_pci_auto_unconfig(dev);
2207} 2231}
@@ -2216,7 +2240,7 @@ static struct pci_driver adl_pci9118_pci_driver = {
2216 .name = "adl_pci9118", 2240 .name = "adl_pci9118",
2217 .id_table = adl_pci9118_pci_table, 2241 .id_table = adl_pci9118_pci_table,
2218 .probe = adl_pci9118_pci_probe, 2242 .probe = adl_pci9118_pci_probe,
2219 .remove = __devexit_p(adl_pci9118_pci_remove), 2243 .remove = adl_pci9118_pci_remove,
2220}; 2244};
2221module_comedi_pci_driver(adl_pci9118_driver, adl_pci9118_pci_driver); 2245module_comedi_pci_driver(adl_pci9118_driver, adl_pci9118_pci_driver);
2222 2246
diff --git a/drivers/staging/comedi/drivers/adq12b.c b/drivers/staging/comedi/drivers/adq12b.c
index 3a2aa5628be3..f7950dfe2ddb 100644
--- a/drivers/staging/comedi/drivers/adq12b.c
+++ b/drivers/staging/comedi/drivers/adq12b.c
@@ -116,15 +116,6 @@ static const struct comedi_lrange range_adq12b_ai_unipolar = { 4, {
116 } 116 }
117}; 117};
118 118
119struct adq12b_board {
120 const char *name;
121 int ai_se_chans;
122 int ai_diff_chans;
123 int ai_bits;
124 int di_chans;
125 int do_chans;
126};
127
128struct adq12b_private { 119struct adq12b_private {
129 int unipolar; /* option 2 of comedi_config (1 is iobase) */ 120 int unipolar; /* option 2 of comedi_config (1 is iobase) */
130 int differential; /* option 3 of comedi_config */ 121 int differential; /* option 3 of comedi_config */
@@ -220,13 +211,14 @@ static int adq12b_do_insn_bits(struct comedi_device *dev,
220 211
221static int adq12b_attach(struct comedi_device *dev, struct comedi_devconfig *it) 212static int adq12b_attach(struct comedi_device *dev, struct comedi_devconfig *it)
222{ 213{
223 const struct adq12b_board *board = comedi_board(dev);
224 struct adq12b_private *devpriv; 214 struct adq12b_private *devpriv;
225 struct comedi_subdevice *s; 215 struct comedi_subdevice *s;
226 unsigned long iobase; 216 unsigned long iobase;
227 int unipolar, differential; 217 int unipolar, differential;
228 int ret; 218 int ret;
229 219
220 dev->board_name = dev->driver->driver_name;
221
230 iobase = it->options[0]; 222 iobase = it->options[0];
231 unipolar = it->options[1]; 223 unipolar = it->options[1];
232 differential = it->options[2]; 224 differential = it->options[2];
@@ -251,12 +243,10 @@ static int adq12b_attach(struct comedi_device *dev, struct comedi_devconfig *it)
251 } 243 }
252 dev->iobase = iobase; 244 dev->iobase = iobase;
253 245
254 dev->board_name = board->name; 246 devpriv = kzalloc(sizeof(*devpriv), GFP_KERNEL);
255 247 if (!devpriv)
256 ret = alloc_private(dev, sizeof(*devpriv)); 248 return -ENOMEM;
257 if (ret) 249 dev->private = devpriv;
258 return ret;
259 devpriv = dev->private;
260 250
261 devpriv->unipolar = unipolar; 251 devpriv->unipolar = unipolar;
262 devpriv->differential = differential; 252 devpriv->differential = differential;
@@ -277,10 +267,10 @@ static int adq12b_attach(struct comedi_device *dev, struct comedi_devconfig *it)
277 s->type = COMEDI_SUBD_AI; 267 s->type = COMEDI_SUBD_AI;
278 if (differential) { 268 if (differential) {
279 s->subdev_flags = SDF_READABLE | SDF_GROUND | SDF_DIFF; 269 s->subdev_flags = SDF_READABLE | SDF_GROUND | SDF_DIFF;
280 s->n_chan = board->ai_diff_chans; 270 s->n_chan = 8;
281 } else { 271 } else {
282 s->subdev_flags = SDF_READABLE | SDF_GROUND; 272 s->subdev_flags = SDF_READABLE | SDF_GROUND;
283 s->n_chan = board->ai_se_chans; 273 s->n_chan = 16;
284 } 274 }
285 275
286 if (unipolar) 276 if (unipolar)
@@ -288,7 +278,7 @@ static int adq12b_attach(struct comedi_device *dev, struct comedi_devconfig *it)
288 else 278 else
289 s->range_table = &range_adq12b_ai_bipolar; 279 s->range_table = &range_adq12b_ai_bipolar;
290 280
291 s->maxdata = (1 << board->ai_bits) - 1; 281 s->maxdata = 0xfff;
292 282
293 s->len_chanlist = 4; /* This is the maximum chanlist length that 283 s->len_chanlist = 4; /* This is the maximum chanlist length that
294 the board can handle */ 284 the board can handle */
@@ -298,7 +288,7 @@ static int adq12b_attach(struct comedi_device *dev, struct comedi_devconfig *it)
298 /* digital input subdevice */ 288 /* digital input subdevice */
299 s->type = COMEDI_SUBD_DI; 289 s->type = COMEDI_SUBD_DI;
300 s->subdev_flags = SDF_READABLE; 290 s->subdev_flags = SDF_READABLE;
301 s->n_chan = board->di_chans; 291 s->n_chan = 5;
302 s->maxdata = 1; 292 s->maxdata = 1;
303 s->range_table = &range_digital; 293 s->range_table = &range_digital;
304 s->insn_bits = adq12b_di_insn_bits; 294 s->insn_bits = adq12b_di_insn_bits;
@@ -307,7 +297,7 @@ static int adq12b_attach(struct comedi_device *dev, struct comedi_devconfig *it)
307 /* digital output subdevice */ 297 /* digital output subdevice */
308 s->type = COMEDI_SUBD_DO; 298 s->type = COMEDI_SUBD_DO;
309 s->subdev_flags = SDF_WRITABLE; 299 s->subdev_flags = SDF_WRITABLE;
310 s->n_chan = board->do_chans; 300 s->n_chan = 8;
311 s->maxdata = 1; 301 s->maxdata = 1;
312 s->range_table = &range_digital; 302 s->range_table = &range_digital;
313 s->insn_bits = adq12b_do_insn_bits; 303 s->insn_bits = adq12b_do_insn_bits;
@@ -323,25 +313,11 @@ static void adq12b_detach(struct comedi_device *dev)
323 release_region(dev->iobase, ADQ12B_SIZE); 313 release_region(dev->iobase, ADQ12B_SIZE);
324} 314}
325 315
326static const struct adq12b_board adq12b_boards[] = {
327 {
328 .name = "adq12b",
329 .ai_se_chans = 16,
330 .ai_diff_chans = 8,
331 .ai_bits = 12,
332 .di_chans = 5,
333 .do_chans = 8,
334 },
335};
336
337static struct comedi_driver adq12b_driver = { 316static struct comedi_driver adq12b_driver = {
338 .driver_name = "adq12b", 317 .driver_name = "adq12b",
339 .module = THIS_MODULE, 318 .module = THIS_MODULE,
340 .attach = adq12b_attach, 319 .attach = adq12b_attach,
341 .detach = adq12b_detach, 320 .detach = adq12b_detach,
342 .board_name = &adq12b_boards[0].name,
343 .offset = sizeof(struct adq12b_board),
344 .num_names = ARRAY_SIZE(adq12b_boards),
345}; 321};
346module_comedi_driver(adq12b_driver); 322module_comedi_driver(adq12b_driver);
347 323
diff --git a/drivers/staging/comedi/drivers/adv_pci1710.c b/drivers/staging/comedi/drivers/adv_pci1710.c
index def37bcc2a66..a6fd8c2c16ca 100644
--- a/drivers/staging/comedi/drivers/adv_pci1710.c
+++ b/drivers/staging/comedi/drivers/adv_pci1710.c
@@ -53,8 +53,6 @@ Configuration options:
53 * correct channel number on every 12 bit 53 * correct channel number on every 12 bit
54 * sample */ 54 * sample */
55 55
56#define PCI_VENDOR_ID_ADVANTECH 0x13fe
57
58/* hardware types of the cards */ 56/* hardware types of the cards */
59#define TYPE_PCI171X 0 57#define TYPE_PCI171X 0
60#define TYPE_PCI1713 2 58#define TYPE_PCI1713 2
@@ -1068,45 +1066,23 @@ static int pci171x_ai_cmdtest(struct comedi_device *dev,
1068 if (err) 1066 if (err)
1069 return 2; 1067 return 2;
1070 1068
1071 /* step 3: make sure arguments are trivially compatible */ 1069 /* Step 3: check if arguments are trivially valid */
1072 1070
1073 if (cmd->start_arg != 0) { 1071 err |= cfc_check_trigger_arg_is(&cmd->start_arg, 0);
1074 cmd->start_arg = 0; 1072 err |= cfc_check_trigger_arg_is(&cmd->scan_begin_arg, 0);
1075 err++;
1076 }
1077 1073
1078 if (cmd->scan_begin_arg != 0) { 1074 if (cmd->convert_src == TRIG_TIMER)
1079 cmd->scan_begin_arg = 0; 1075 err |= cfc_check_trigger_arg_min(&cmd->convert_arg,
1080 err++; 1076 this_board->ai_ns_min);
1081 } 1077 else /* TRIG_FOLLOW */
1078 err |= cfc_check_trigger_arg_is(&cmd->convert_arg, 0);
1082 1079
1083 if (cmd->convert_src == TRIG_TIMER) { 1080 err |= cfc_check_trigger_arg_is(&cmd->scan_end_arg, cmd->chanlist_len);
1084 if (cmd->convert_arg < this_board->ai_ns_min) {
1085 cmd->convert_arg = this_board->ai_ns_min;
1086 err++;
1087 }
1088 } else { /* TRIG_FOLLOW */
1089 if (cmd->convert_arg != 0) {
1090 cmd->convert_arg = 0;
1091 err++;
1092 }
1093 }
1094 1081
1095 if (cmd->scan_end_arg != cmd->chanlist_len) { 1082 if (cmd->stop_src == TRIG_COUNT)
1096 cmd->scan_end_arg = cmd->chanlist_len; 1083 err |= cfc_check_trigger_arg_min(&cmd->stop_arg, 1);
1097 err++; 1084 else /* TRIG_NONE */
1098 } 1085 err |= cfc_check_trigger_arg_is(&cmd->stop_arg, 0);
1099 if (cmd->stop_src == TRIG_COUNT) {
1100 if (!cmd->stop_arg) {
1101 cmd->stop_arg = 1;
1102 err++;
1103 }
1104 } else { /* TRIG_NONE */
1105 if (cmd->stop_arg != 0) {
1106 cmd->stop_arg = 0;
1107 err++;
1108 }
1109 }
1110 1086
1111 if (err) 1087 if (err)
1112 return 3; 1088 return 3;
@@ -1257,26 +1233,25 @@ static const void *pci1710_find_boardinfo(struct comedi_device *dev,
1257 return NULL; 1233 return NULL;
1258} 1234}
1259 1235
1260static int pci1710_attach_pci(struct comedi_device *dev, 1236static int pci1710_auto_attach(struct comedi_device *dev,
1261 struct pci_dev *pcidev) 1237 unsigned long context_unused)
1262{ 1238{
1239 struct pci_dev *pcidev = comedi_to_pci_dev(dev);
1263 const struct boardtype *this_board; 1240 const struct boardtype *this_board;
1264 struct pci1710_private *devpriv; 1241 struct pci1710_private *devpriv;
1265 struct comedi_subdevice *s; 1242 struct comedi_subdevice *s;
1266 int ret, subdev, n_subdevices; 1243 int ret, subdev, n_subdevices;
1267 1244
1268 comedi_set_hw_dev(dev, &pcidev->dev);
1269
1270 this_board = pci1710_find_boardinfo(dev, pcidev); 1245 this_board = pci1710_find_boardinfo(dev, pcidev);
1271 if (!this_board) 1246 if (!this_board)
1272 return -ENODEV; 1247 return -ENODEV;
1273 dev->board_ptr = this_board; 1248 dev->board_ptr = this_board;
1274 dev->board_name = this_board->name; 1249 dev->board_name = this_board->name;
1275 1250
1276 ret = alloc_private(dev, sizeof(*devpriv)); 1251 devpriv = kzalloc(sizeof(*devpriv), GFP_KERNEL);
1277 if (ret < 0) 1252 if (!devpriv)
1278 return ret; 1253 return -ENOMEM;
1279 devpriv = dev->private; 1254 dev->private = devpriv;
1280 1255
1281 ret = comedi_pci_enable(pcidev, dev->board_name); 1256 ret = comedi_pci_enable(pcidev, dev->board_name);
1282 if (ret) 1257 if (ret)
@@ -1417,17 +1392,17 @@ static void pci1710_detach(struct comedi_device *dev)
1417static struct comedi_driver adv_pci1710_driver = { 1392static struct comedi_driver adv_pci1710_driver = {
1418 .driver_name = "adv_pci1710", 1393 .driver_name = "adv_pci1710",
1419 .module = THIS_MODULE, 1394 .module = THIS_MODULE,
1420 .attach_pci = pci1710_attach_pci, 1395 .auto_attach = pci1710_auto_attach,
1421 .detach = pci1710_detach, 1396 .detach = pci1710_detach,
1422}; 1397};
1423 1398
1424static int __devinit adv_pci1710_pci_probe(struct pci_dev *dev, 1399static int adv_pci1710_pci_probe(struct pci_dev *dev,
1425 const struct pci_device_id *ent) 1400 const struct pci_device_id *ent)
1426{ 1401{
1427 return comedi_pci_auto_config(dev, &adv_pci1710_driver); 1402 return comedi_pci_auto_config(dev, &adv_pci1710_driver);
1428} 1403}
1429 1404
1430static void __devexit adv_pci1710_pci_remove(struct pci_dev *dev) 1405static void adv_pci1710_pci_remove(struct pci_dev *dev)
1431{ 1406{
1432 comedi_pci_auto_unconfig(dev); 1407 comedi_pci_auto_unconfig(dev);
1433} 1408}
@@ -1446,7 +1421,7 @@ static struct pci_driver adv_pci1710_pci_driver = {
1446 .name = "adv_pci1710", 1421 .name = "adv_pci1710",
1447 .id_table = adv_pci1710_pci_table, 1422 .id_table = adv_pci1710_pci_table,
1448 .probe = adv_pci1710_pci_probe, 1423 .probe = adv_pci1710_pci_probe,
1449 .remove = __devexit_p(adv_pci1710_pci_remove), 1424 .remove = adv_pci1710_pci_remove,
1450}; 1425};
1451module_comedi_pci_driver(adv_pci1710_driver, adv_pci1710_pci_driver); 1426module_comedi_pci_driver(adv_pci1710_driver, adv_pci1710_pci_driver);
1452 1427
diff --git a/drivers/staging/comedi/drivers/adv_pci1723.c b/drivers/staging/comedi/drivers/adv_pci1723.c
index df4efc0606de..5af73146dd85 100644
--- a/drivers/staging/comedi/drivers/adv_pci1723.c
+++ b/drivers/staging/comedi/drivers/adv_pci1723.c
@@ -50,8 +50,6 @@ TODO:
50 50
51#include "../comedidev.h" 51#include "../comedidev.h"
52 52
53#define PCI_VENDOR_ID_ADVANTECH 0x13fe /* Advantech PCI vendor ID */
54
55/* all the registers for the pci1723 board */ 53/* all the registers for the pci1723 board */
56#define PCI1723_DA(N) ((N)<<1) /* W: D/A register N (0 to 7) */ 54#define PCI1723_DA(N) ((N)<<1) /* W: D/A register N (0 to 7) */
57 55
@@ -234,20 +232,20 @@ static int pci1723_dio_insn_bits(struct comedi_device *dev,
234 return insn->n; 232 return insn->n;
235} 233}
236 234
237static int pci1723_attach_pci(struct comedi_device *dev, 235static int pci1723_auto_attach(struct comedi_device *dev,
238 struct pci_dev *pcidev) 236 unsigned long context_unused)
239{ 237{
238 struct pci_dev *pcidev = comedi_to_pci_dev(dev);
240 struct pci1723_private *devpriv; 239 struct pci1723_private *devpriv;
241 struct comedi_subdevice *s; 240 struct comedi_subdevice *s;
242 int ret; 241 int ret;
243 242
244 comedi_set_hw_dev(dev, &pcidev->dev);
245 dev->board_name = dev->driver->driver_name; 243 dev->board_name = dev->driver->driver_name;
246 244
247 ret = alloc_private(dev, sizeof(*devpriv)); 245 devpriv = kzalloc(sizeof(*devpriv), GFP_KERNEL);
248 if (ret < 0) 246 if (!devpriv)
249 return ret; 247 return -ENOMEM;
250 devpriv = dev->private; 248 dev->private = devpriv;
251 249
252 ret = comedi_pci_enable(pcidev, dev->board_name); 250 ret = comedi_pci_enable(pcidev, dev->board_name);
253 if (ret) 251 if (ret)
@@ -319,17 +317,17 @@ static void pci1723_detach(struct comedi_device *dev)
319static struct comedi_driver adv_pci1723_driver = { 317static struct comedi_driver adv_pci1723_driver = {
320 .driver_name = "adv_pci1723", 318 .driver_name = "adv_pci1723",
321 .module = THIS_MODULE, 319 .module = THIS_MODULE,
322 .attach_pci = pci1723_attach_pci, 320 .auto_attach = pci1723_auto_attach,
323 .detach = pci1723_detach, 321 .detach = pci1723_detach,
324}; 322};
325 323
326static int __devinit adv_pci1723_pci_probe(struct pci_dev *dev, 324static int adv_pci1723_pci_probe(struct pci_dev *dev,
327 const struct pci_device_id *ent) 325 const struct pci_device_id *ent)
328{ 326{
329 return comedi_pci_auto_config(dev, &adv_pci1723_driver); 327 return comedi_pci_auto_config(dev, &adv_pci1723_driver);
330} 328}
331 329
332static void __devexit adv_pci1723_pci_remove(struct pci_dev *dev) 330static void adv_pci1723_pci_remove(struct pci_dev *dev)
333{ 331{
334 comedi_pci_auto_unconfig(dev); 332 comedi_pci_auto_unconfig(dev);
335} 333}
@@ -344,7 +342,7 @@ static struct pci_driver adv_pci1723_pci_driver = {
344 .name = "adv_pci1723", 342 .name = "adv_pci1723",
345 .id_table = adv_pci1723_pci_table, 343 .id_table = adv_pci1723_pci_table,
346 .probe = adv_pci1723_pci_probe, 344 .probe = adv_pci1723_pci_probe,
347 .remove = __devexit_p(adv_pci1723_pci_remove), 345 .remove = adv_pci1723_pci_remove,
348}; 346};
349module_comedi_pci_driver(adv_pci1723_driver, adv_pci1723_pci_driver); 347module_comedi_pci_driver(adv_pci1723_driver, adv_pci1723_pci_driver);
350 348
diff --git a/drivers/staging/comedi/drivers/adv_pci_dio.c b/drivers/staging/comedi/drivers/adv_pci_dio.c
index a3c22419cd5f..05a663e970c6 100644
--- a/drivers/staging/comedi/drivers/adv_pci_dio.c
+++ b/drivers/staging/comedi/drivers/adv_pci_dio.c
@@ -36,8 +36,6 @@ Configuration options:
36#include "8255.h" 36#include "8255.h"
37#include "8253.h" 37#include "8253.h"
38 38
39#define PCI_VENDOR_ID_ADVANTECH 0x13fe
40
41/* hardware types of the cards */ 39/* hardware types of the cards */
42enum hw_cards_id { 40enum hw_cards_id {
43 TYPE_PCI1730, TYPE_PCI1733, TYPE_PCI1734, TYPE_PCI1735, TYPE_PCI1736, 41 TYPE_PCI1730, TYPE_PCI1733, TYPE_PCI1734, TYPE_PCI1735, TYPE_PCI1736,
@@ -1092,26 +1090,25 @@ static const void *pci_dio_find_boardinfo(struct comedi_device *dev,
1092 return NULL; 1090 return NULL;
1093} 1091}
1094 1092
1095static int pci_dio_attach_pci(struct comedi_device *dev, 1093static int pci_dio_auto_attach(struct comedi_device *dev,
1096 struct pci_dev *pcidev) 1094 unsigned long context_unused)
1097{ 1095{
1096 struct pci_dev *pcidev = comedi_to_pci_dev(dev);
1098 const struct dio_boardtype *this_board; 1097 const struct dio_boardtype *this_board;
1099 struct pci_dio_private *devpriv; 1098 struct pci_dio_private *devpriv;
1100 struct comedi_subdevice *s; 1099 struct comedi_subdevice *s;
1101 int ret, subdev, i, j; 1100 int ret, subdev, i, j;
1102 1101
1103 comedi_set_hw_dev(dev, &pcidev->dev);
1104
1105 this_board = pci_dio_find_boardinfo(dev, pcidev); 1102 this_board = pci_dio_find_boardinfo(dev, pcidev);
1106 if (!this_board) 1103 if (!this_board)
1107 return -ENODEV; 1104 return -ENODEV;
1108 dev->board_ptr = this_board; 1105 dev->board_ptr = this_board;
1109 dev->board_name = this_board->name; 1106 dev->board_name = this_board->name;
1110 1107
1111 ret = alloc_private(dev, sizeof(*devpriv)); 1108 devpriv = kzalloc(sizeof(*devpriv), GFP_KERNEL);
1112 if (ret < 0) 1109 if (!devpriv)
1113 return ret; 1110 return -ENOMEM;
1114 devpriv = dev->private; 1111 dev->private = devpriv;
1115 1112
1116 ret = comedi_pci_enable(pcidev, dev->board_name); 1113 ret = comedi_pci_enable(pcidev, dev->board_name);
1117 if (ret) 1114 if (ret)
@@ -1199,17 +1196,17 @@ static void pci_dio_detach(struct comedi_device *dev)
1199static struct comedi_driver adv_pci_dio_driver = { 1196static struct comedi_driver adv_pci_dio_driver = {
1200 .driver_name = "adv_pci_dio", 1197 .driver_name = "adv_pci_dio",
1201 .module = THIS_MODULE, 1198 .module = THIS_MODULE,
1202 .attach_pci = pci_dio_attach_pci, 1199 .auto_attach = pci_dio_auto_attach,
1203 .detach = pci_dio_detach, 1200 .detach = pci_dio_detach,
1204}; 1201};
1205 1202
1206static int __devinit adv_pci_dio_pci_probe(struct pci_dev *dev, 1203static int adv_pci_dio_pci_probe(struct pci_dev *dev,
1207 const struct pci_device_id *ent) 1204 const struct pci_device_id *ent)
1208{ 1205{
1209 return comedi_pci_auto_config(dev, &adv_pci_dio_driver); 1206 return comedi_pci_auto_config(dev, &adv_pci_dio_driver);
1210} 1207}
1211 1208
1212static void __devexit adv_pci_dio_pci_remove(struct pci_dev *dev) 1209static void adv_pci_dio_pci_remove(struct pci_dev *dev)
1213{ 1210{
1214 comedi_pci_auto_unconfig(dev); 1211 comedi_pci_auto_unconfig(dev);
1215} 1212}
@@ -1237,7 +1234,7 @@ static struct pci_driver adv_pci_dio_pci_driver = {
1237 .name = "adv_pci_dio", 1234 .name = "adv_pci_dio",
1238 .id_table = adv_pci_dio_pci_table, 1235 .id_table = adv_pci_dio_pci_table,
1239 .probe = adv_pci_dio_pci_probe, 1236 .probe = adv_pci_dio_pci_probe,
1240 .remove = __devexit_p(adv_pci_dio_pci_remove), 1237 .remove = adv_pci_dio_pci_remove,
1241}; 1238};
1242module_comedi_pci_driver(adv_pci_dio_driver, adv_pci_dio_pci_driver); 1239module_comedi_pci_driver(adv_pci_dio_driver, adv_pci_dio_pci_driver);
1243 1240
diff --git a/drivers/staging/comedi/drivers/aio_aio12_8.c b/drivers/staging/comedi/drivers/aio_aio12_8.c
index 8acf60d0f20d..601f03d5897f 100644
--- a/drivers/staging/comedi/drivers/aio_aio12_8.c
+++ b/drivers/staging/comedi/drivers/aio_aio12_8.c
@@ -212,10 +212,10 @@ static int aio_aio12_8_attach(struct comedi_device *dev,
212 } 212 }
213 dev->iobase = iobase; 213 dev->iobase = iobase;
214 214
215 ret = alloc_private(dev, sizeof(*devpriv)); 215 devpriv = kzalloc(sizeof(*devpriv), GFP_KERNEL);
216 if (ret) 216 if (!devpriv)
217 return ret; 217 return -ENOMEM;
218 devpriv = dev->private; 218 dev->private = devpriv;
219 219
220 ret = comedi_alloc_subdevices(dev, 4); 220 ret = comedi_alloc_subdevices(dev, 4);
221 if (ret) 221 if (ret)
diff --git a/drivers/staging/comedi/drivers/aio_iiro_16.c b/drivers/staging/comedi/drivers/aio_iiro_16.c
index b2cb8b02b2a1..64c1ae58ce7f 100644
--- a/drivers/staging/comedi/drivers/aio_iiro_16.c
+++ b/drivers/staging/comedi/drivers/aio_iiro_16.c
@@ -44,19 +44,6 @@ Configuration Options:
44#define AIO_IIRO_16_RELAY_8_15 0x04 44#define AIO_IIRO_16_RELAY_8_15 0x04
45#define AIO_IIRO_16_INPUT_8_15 0x05 45#define AIO_IIRO_16_INPUT_8_15 0x05
46 46
47struct aio_iiro_16_board {
48 const char *name;
49 int do_;
50 int di;
51};
52
53static const struct aio_iiro_16_board aio_iiro_16_boards[] = {
54 {
55 .name = "aio_iiro_16",
56 .di = 16,
57 .do_ = 16},
58};
59
60static int aio_iiro_16_dio_insn_bits_write(struct comedi_device *dev, 47static int aio_iiro_16_dio_insn_bits_write(struct comedi_device *dev,
61 struct comedi_subdevice *s, 48 struct comedi_subdevice *s,
62 struct comedi_insn *insn, 49 struct comedi_insn *insn,
@@ -90,14 +77,13 @@ static int aio_iiro_16_dio_insn_bits_read(struct comedi_device *dev,
90static int aio_iiro_16_attach(struct comedi_device *dev, 77static int aio_iiro_16_attach(struct comedi_device *dev,
91 struct comedi_devconfig *it) 78 struct comedi_devconfig *it)
92{ 79{
93 const struct aio_iiro_16_board *board = comedi_board(dev);
94 int iobase; 80 int iobase;
95 struct comedi_subdevice *s; 81 struct comedi_subdevice *s;
96 int ret; 82 int ret;
97 83
98 printk(KERN_INFO "comedi%d: aio_iiro_16: ", dev->minor); 84 printk(KERN_INFO "comedi%d: aio_iiro_16: ", dev->minor);
99 85
100 dev->board_name = board->name; 86 dev->board_name = dev->driver->driver_name;
101 87
102 iobase = it->options[0]; 88 iobase = it->options[0];
103 89
@@ -144,9 +130,6 @@ static struct comedi_driver aio_iiro_16_driver = {
144 .module = THIS_MODULE, 130 .module = THIS_MODULE,
145 .attach = aio_iiro_16_attach, 131 .attach = aio_iiro_16_attach,
146 .detach = aio_iiro_16_detach, 132 .detach = aio_iiro_16_detach,
147 .board_name = &aio_iiro_16_boards[0].name,
148 .offset = sizeof(struct aio_iiro_16_board),
149 .num_names = ARRAY_SIZE(aio_iiro_16_boards),
150}; 133};
151module_comedi_driver(aio_iiro_16_driver); 134module_comedi_driver(aio_iiro_16_driver);
152 135
diff --git a/drivers/staging/comedi/drivers/amplc_dio200.c b/drivers/staging/comedi/drivers/amplc_dio200.c
index 29eb52d11d2f..5f309ba88a1a 100644
--- a/drivers/staging/comedi/drivers/amplc_dio200.c
+++ b/drivers/staging/comedi/drivers/amplc_dio200.c
@@ -25,185 +25,238 @@
25 25
26*/ 26*/
27/* 27/*
28Driver: amplc_dio200 28 * Driver: amplc_dio200
29Description: Amplicon 200 Series Digital I/O 29 * Description: Amplicon 200 Series Digital I/O
30Author: Ian Abbott <abbotti@mev.co.uk> 30 * Author: Ian Abbott <abbotti@mev.co.uk>
31Devices: [Amplicon] PC212E (pc212e), PC214E (pc214e), PC215E (pc215e), 31 * Devices: [Amplicon] PC212E (pc212e), PC214E (pc214e), PC215E (pc215e),
32 PCI215 (pci215 or amplc_dio200), PC218E (pc218e), PC272E (pc272e), 32 * PCI215 (pci215), PCIe215 (pcie215), PC218E (pc218e), PCIe236 (pcie236),
33 PCI272 (pci272 or amplc_dio200) 33 * PC272E (pc272e), PCI272 (pci272), PCIe296 (pcie296)
34Updated: Wed, 22 Oct 2008 13:36:02 +0100 34 * Updated: Wed, 24 Oct 2012 16:22:34 +0100
35Status: works 35 * Status: works
36 36 *
37Configuration options - PC212E, PC214E, PC215E, PC218E, PC272E: 37 * Configuration options - PC212E, PC214E, PC215E, PC218E, PC272E:
38 [0] - I/O port base address 38 * [0] - I/O port base address
39 [1] - IRQ (optional, but commands won't work without it) 39 * [1] - IRQ (optional, but commands won't work without it)
40 40 *
41Configuration options - PCI215, PCI272: 41 * Manual configuration of PCI(e) cards is not supported; they are configured
42 [0] - PCI bus of device (optional) 42 * automatically.
43 [1] - PCI slot of device (optional) 43 *
44 If bus/slot is not specified, the first available PCI device will 44 * Passing a zero for an option is the same as leaving it unspecified.
45 be used. 45 *
46 46 * SUBDEVICES
47Passing a zero for an option is the same as leaving it unspecified. 47 *
48 48 * PC212E PC214E PC215E/PCI215
49SUBDEVICES 49 * ------------- ------------- -------------
50 50 * Subdevices 6 4 5
51 PC218E PC212E PC215E/PCI215 51 * 0 PPI-X PPI-X PPI-X
52 ------------- ------------- ------------- 52 * 1 CTR-Y1 PPI-Y PPI-Y
53 Subdevices 7 6 5 53 * 2 CTR-Y2 CTR-Z1* CTR-Z1
54 0 CTR-X1 PPI-X PPI-X 54 * 3 CTR-Z1 INTERRUPT* CTR-Z2
55 1 CTR-X2 CTR-Y1 PPI-Y 55 * 4 CTR-Z2 INTERRUPT
56 2 CTR-Y1 CTR-Y2 CTR-Z1 56 * 5 INTERRUPT
57 3 CTR-Y2 CTR-Z1 CTR-Z2 57 *
58 4 CTR-Z1 CTR-Z2 INTERRUPT 58 * PCIe215 PC218E PCIe236
59 5 CTR-Z2 INTERRUPT 59 * ------------- ------------- -------------
60 6 INTERRUPT 60 * Subdevices 8 7 8
61 61 * 0 PPI-X CTR-X1 PPI-X
62 PC214E PC272E/PCI272 62 * 1 UNUSED CTR-X2 UNUSED
63 ------------- ------------- 63 * 2 PPI-Y CTR-Y1 UNUSED
64 Subdevices 4 4 64 * 3 UNUSED CTR-Y2 UNUSED
65 0 PPI-X PPI-X 65 * 4 CTR-Z1 CTR-Z1 CTR-Z1
66 1 PPI-Y PPI-Y 66 * 5 CTR-Z2 CTR-Z2 CTR-Z2
67 2 CTR-Z1* PPI-Z 67 * 6 TIMER INTERRUPT TIMER
68 3 INTERRUPT* INTERRUPT 68 * 7 INTERRUPT INTERRUPT
69 69 *
70Each PPI is a 8255 chip providing 24 DIO channels. The DIO channels 70 * PC272E/PCI272 PCIe296
71are configurable as inputs or outputs in four groups: 71 * ------------- -------------
72 72 * Subdevices 4 8
73 Port A - channels 0 to 7 73 * 0 PPI-X PPI-X1
74 Port B - channels 8 to 15 74 * 1 PPI-Y PPI-X2
75 Port CL - channels 16 to 19 75 * 2 PPI-Z PPI-Y1
76 Port CH - channels 20 to 23 76 * 3 INTERRUPT PPI-Y2
77 77 * 4 CTR-Z1
78Only mode 0 of the 8255 chips is supported. 78 * 5 CTR-Z2
79 79 * 6 TIMER
80Each CTR is a 8254 chip providing 3 16-bit counter channels. Each 80 * 7 INTERRUPT
81channel is configured individually with INSN_CONFIG instructions. The 81 *
82specific type of configuration instruction is specified in data[0]. 82 * Each PPI is a 8255 chip providing 24 DIO channels. The DIO channels
83Some configuration instructions expect an additional parameter in 83 * are configurable as inputs or outputs in four groups:
84data[1]; others return a value in data[1]. The following configuration 84 *
85instructions are supported: 85 * Port A - channels 0 to 7
86 86 * Port B - channels 8 to 15
87 INSN_CONFIG_SET_COUNTER_MODE. Sets the counter channel's mode and 87 * Port CL - channels 16 to 19
88 BCD/binary setting specified in data[1]. 88 * Port CH - channels 20 to 23
89 89 *
90 INSN_CONFIG_8254_READ_STATUS. Reads the status register value for the 90 * Only mode 0 of the 8255 chips is supported.
91 counter channel into data[1]. 91 *
92 92 * Each CTR is a 8254 chip providing 3 16-bit counter channels. Each
93 INSN_CONFIG_SET_CLOCK_SRC. Sets the counter channel's clock source as 93 * channel is configured individually with INSN_CONFIG instructions. The
94 specified in data[1] (this is a hardware-specific value). Not 94 * specific type of configuration instruction is specified in data[0].
95 supported on PC214E. For the other boards, valid clock sources are 95 * Some configuration instructions expect an additional parameter in
96 0 to 7 as follows: 96 * data[1]; others return a value in data[1]. The following configuration
97 97 * instructions are supported:
98 0. CLK n, the counter channel's dedicated CLK input from the SK1 98 *
99 connector. (N.B. for other values, the counter channel's CLKn 99 * INSN_CONFIG_SET_COUNTER_MODE. Sets the counter channel's mode and
100 pin on the SK1 connector is an output!) 100 * BCD/binary setting specified in data[1].
101 1. Internal 10 MHz clock. 101 *
102 2. Internal 1 MHz clock. 102 * INSN_CONFIG_8254_READ_STATUS. Reads the status register value for the
103 3. Internal 100 kHz clock. 103 * counter channel into data[1].
104 4. Internal 10 kHz clock. 104 *
105 5. Internal 1 kHz clock. 105 * INSN_CONFIG_SET_CLOCK_SRC. Sets the counter channel's clock source as
106 6. OUT n-1, the output of counter channel n-1 (see note 1 below). 106 * specified in data[1] (this is a hardware-specific value). Not
107 7. Ext Clock, the counter chip's dedicated Ext Clock input from 107 * supported on PC214E. For the other boards, valid clock sources are
108 the SK1 connector. This pin is shared by all three counter 108 * 0 to 7 as follows:
109 channels on the chip. 109 *
110 110 * 0. CLK n, the counter channel's dedicated CLK input from the SK1
111 INSN_CONFIG_GET_CLOCK_SRC. Returns the counter channel's current 111 * connector. (N.B. for other values, the counter channel's CLKn
112 clock source in data[1]. For internal clock sources, data[2] is set 112 * pin on the SK1 connector is an output!)
113 to the period in ns. 113 * 1. Internal 10 MHz clock.
114 114 * 2. Internal 1 MHz clock.
115 INSN_CONFIG_SET_GATE_SRC. Sets the counter channel's gate source as 115 * 3. Internal 100 kHz clock.
116 specified in data[2] (this is a hardware-specific value). Not 116 * 4. Internal 10 kHz clock.
117 supported on PC214E. For the other boards, valid gate sources are 0 117 * 5. Internal 1 kHz clock.
118 to 7 as follows: 118 * 6. OUT n-1, the output of counter channel n-1 (see note 1 below).
119 119 * 7. Ext Clock, the counter chip's dedicated Ext Clock input from
120 0. VCC (internal +5V d.c.), i.e. gate permanently enabled. 120 * the SK1 connector. This pin is shared by all three counter
121 1. GND (internal 0V d.c.), i.e. gate permanently disabled. 121 * channels on the chip.
122 2. GAT n, the counter channel's dedicated GAT input from the SK1 122 *
123 connector. (N.B. for other values, the counter channel's GATn 123 * For the PCIe boards, clock sources in the range 0 to 31 are allowed
124 pin on the SK1 connector is an output!) 124 * and the following additional clock sources are defined:
125 3. /OUT n-2, the inverted output of counter channel n-2 (see note 125 *
126 2 below). 126 * 8. HIGH logic level.
127 4. Reserved. 127 * 9. LOW logic level.
128 5. Reserved. 128 * 10. "Pattern present" signal.
129 6. Reserved. 129 * 11. Internal 20 MHz clock.
130 7. Reserved. 130 *
131 131 * INSN_CONFIG_GET_CLOCK_SRC. Returns the counter channel's current
132 INSN_CONFIG_GET_GATE_SRC. Returns the counter channel's current gate 132 * clock source in data[1]. For internal clock sources, data[2] is set
133 source in data[2]. 133 * to the period in ns.
134 134 *
135Clock and gate interconnection notes: 135 * INSN_CONFIG_SET_GATE_SRC. Sets the counter channel's gate source as
136 136 * specified in data[2] (this is a hardware-specific value). Not
137 1. Clock source OUT n-1 is the output of the preceding channel on the 137 * supported on PC214E. For the other boards, valid gate sources are 0
138 same counter subdevice if n > 0, or the output of channel 2 on the 138 * to 7 as follows:
139 preceding counter subdevice (see note 3) if n = 0. 139 *
140 140 * 0. VCC (internal +5V d.c.), i.e. gate permanently enabled.
141 2. Gate source /OUT n-2 is the inverted output of channel 0 on the 141 * 1. GND (internal 0V d.c.), i.e. gate permanently disabled.
142 same counter subdevice if n = 2, or the inverted output of channel n+1 142 * 2. GAT n, the counter channel's dedicated GAT input from the SK1
143 on the preceding counter subdevice (see note 3) if n < 2. 143 * connector. (N.B. for other values, the counter channel's GATn
144 144 * pin on the SK1 connector is an output!)
145 3. The counter subdevices are connected in a ring, so the highest 145 * 3. /OUT n-2, the inverted output of counter channel n-2 (see note
146 counter subdevice precedes the lowest. 146 * 2 below).
147 147 * 4. Reserved.
148The 'INTERRUPT' subdevice pretends to be a digital input subdevice. The 148 * 5. Reserved.
149digital inputs come from the interrupt status register. The number of 149 * 6. Reserved.
150channels matches the number of interrupt sources. The PC214E does not 150 * 7. Reserved.
151have an interrupt status register; see notes on 'INTERRUPT SOURCES' 151 *
152below. 152 * For the PCIe boards, gate sources in the range 0 to 31 are allowed;
153 153 * the following additional clock sources and clock sources 6 and 7 are
154INTERRUPT SOURCES 154 * (re)defined:
155 155 *
156 PC218E PC212E PC215E/PCI215 156 * 6. /GAT n, negated version of the counter channel's dedicated
157 ------------- ------------- ------------- 157 * GAT input (negated version of gate source 2).
158 Sources 6 6 6 158 * 7. OUT n-2, the non-inverted output of counter channel n-2
159 0 CTR-X1-OUT PPI-X-C0 PPI-X-C0 159 * (negated version of gate source 3).
160 1 CTR-X2-OUT PPI-X-C3 PPI-X-C3 160 * 8. "Pattern present" signal, HIGH while pattern present.
161 2 CTR-Y1-OUT CTR-Y1-OUT PPI-Y-C0 161 * 9. "Pattern occurred" latched signal, latches HIGH when pattern
162 3 CTR-Y2-OUT CTR-Y2-OUT PPI-Y-C3 162 * occurs.
163 4 CTR-Z1-OUT CTR-Z1-OUT CTR-Z1-OUT 163 * 10. "Pattern gone away" latched signal, latches LOW when pattern
164 5 CTR-Z2-OUT CTR-Z2-OUT CTR-Z2-OUT 164 * goes away after it occurred.
165 165 * 11. Negated "pattern present" signal, LOW while pattern present
166 PC214E PC272E/PCI272 166 * (negated version of gate source 8).
167 ------------- ------------- 167 * 12. Negated "pattern occurred" latched signal, latches LOW when
168 Sources 1 6 168 * pattern occurs (negated version of gate source 9).
169 0 JUMPER-J5 PPI-X-C0 169 * 13. Negated "pattern gone away" latched signal, latches LOW when
170 1 PPI-X-C3 170 * pattern goes away after it occurred (negated version of gate
171 2 PPI-Y-C0 171 * source 10).
172 3 PPI-Y-C3 172 *
173 4 PPI-Z-C0 173 * INSN_CONFIG_GET_GATE_SRC. Returns the counter channel's current gate
174 5 PPI-Z-C3 174 * source in data[2].
175 175 *
176When an interrupt source is enabled in the interrupt source enable 176 * Clock and gate interconnection notes:
177register, a rising edge on the source signal latches the corresponding 177 *
178bit to 1 in the interrupt status register. 178 * 1. Clock source OUT n-1 is the output of the preceding channel on the
179 179 * same counter subdevice if n > 0, or the output of channel 2 on the
180When the interrupt status register value as a whole (actually, just the 180 * preceding counter subdevice (see note 3) if n = 0.
1816 least significant bits) goes from zero to non-zero, the board will 181 *
182generate an interrupt. For level-triggered hardware interrupts (PCI 182 * 2. Gate source /OUT n-2 is the inverted output of channel 0 on the
183card), the interrupt will remain asserted until the interrupt status 183 * same counter subdevice if n = 2, or the inverted output of channel n+1
184register is cleared to zero. For edge-triggered hardware interrupts 184 * on the preceding counter subdevice (see note 3) if n < 2.
185(ISA card), no further interrupts will occur until the interrupt status 185 *
186register is cleared to zero. To clear a bit to zero in the interrupt 186 * 3. The counter subdevices are connected in a ring, so the highest
187status register, the corresponding interrupt source must be disabled 187 * counter subdevice precedes the lowest.
188in the interrupt source enable register (there is no separate interrupt 188 *
189clear register). 189 * The 'TIMER' subdevice is a free-running 32-bit timer subdevice.
190 190 *
191The PC214E does not have an interrupt source enable register or an 191 * The 'INTERRUPT' subdevice pretends to be a digital input subdevice. The
192interrupt status register; its 'INTERRUPT' subdevice has a single 192 * digital inputs come from the interrupt status register. The number of
193channel and its interrupt source is selected by the position of jumper 193 * channels matches the number of interrupt sources. The PC214E does not
194J5. 194 * have an interrupt status register; see notes on 'INTERRUPT SOURCES'
195 195 * below.
196COMMANDS 196 *
197 197 * INTERRUPT SOURCES
198The driver supports a read streaming acquisition command on the 198 *
199'INTERRUPT' subdevice. The channel list selects the interrupt sources 199 * PC212E PC214E PC215E/PCI215
200to be enabled. All channels will be sampled together (convert_src == 200 * ------------- ------------- -------------
201TRIG_NOW). The scan begins a short time after the hardware interrupt 201 * Sources 6 1 6
202occurs, subject to interrupt latencies (scan_begin_src == TRIG_EXT, 202 * 0 PPI-X-C0 JUMPER-J5 PPI-X-C0
203scan_begin_arg == 0). The value read from the interrupt status register 203 * 1 PPI-X-C3 PPI-X-C3
204is packed into a short value, one bit per requested channel, in the 204 * 2 CTR-Y1-OUT1 PPI-Y-C0
205order they appear in the channel list. 205 * 3 CTR-Y2-OUT1 PPI-Y-C3
206*/ 206 * 4 CTR-Z1-OUT1 CTR-Z1-OUT1
207 * 5 CTR-Z2-OUT1 CTR-Z2-OUT1
208 *
209 * PCIe215 PC218E PCIe236
210 * ------------- ------------- -------------
211 * Sources 6 6 6
212 * 0 PPI-X-C0 CTR-X1-OUT1 PPI-X-C0
213 * 1 PPI-X-C3 CTR-X2-OUT1 PPI-X-C3
214 * 2 PPI-Y-C0 CTR-Y1-OUT1 unused
215 * 3 PPI-Y-C3 CTR-Y2-OUT1 unused
216 * 4 CTR-Z1-OUT1 CTR-Z1-OUT1 CTR-Z1-OUT1
217 * 5 CTR-Z2-OUT1 CTR-Z2-OUT1 CTR-Z2-OUT1
218 *
219 * PC272E/PCI272 PCIe296
220 * ------------- -------------
221 * Sources 6 6
222 * 0 PPI-X-C0 PPI-X1-C0
223 * 1 PPI-X-C3 PPI-X1-C3
224 * 2 PPI-Y-C0 PPI-Y1-C0
225 * 3 PPI-Y-C3 PPI-Y1-C3
226 * 4 PPI-Z-C0 CTR-Z1-OUT1
227 * 5 PPI-Z-C3 CTR-Z2-OUT1
228 *
229 * When an interrupt source is enabled in the interrupt source enable
230 * register, a rising edge on the source signal latches the corresponding
231 * bit to 1 in the interrupt status register.
232 *
233 * When the interrupt status register value as a whole (actually, just the
234 * 6 least significant bits) goes from zero to non-zero, the board will
235 * generate an interrupt. For level-triggered hardware interrupts (PCI
236 * card), the interrupt will remain asserted until the interrupt status
237 * register is cleared to zero. For edge-triggered hardware interrupts
238 * (ISA card), no further interrupts will occur until the interrupt status
239 * register is cleared to zero. To clear a bit to zero in the interrupt
240 * status register, the corresponding interrupt source must be disabled
241 * in the interrupt source enable register (there is no separate interrupt
242 * clear register).
243 *
244 * The PC214E does not have an interrupt source enable register or an
245 * interrupt status register; its 'INTERRUPT' subdevice has a single
246 * channel and its interrupt source is selected by the position of jumper
247 * J5.
248 *
249 * COMMANDS
250 *
251 * The driver supports a read streaming acquisition command on the
252 * 'INTERRUPT' subdevice. The channel list selects the interrupt sources
253 * to be enabled. All channels will be sampled together (convert_src ==
254 * TRIG_NOW). The scan begins a short time after the hardware interrupt
255 * occurs, subject to interrupt latencies (scan_begin_src == TRIG_EXT,
256 * scan_begin_arg == 0). The value read from the interrupt status register
257 * is packed into a short value, one bit per requested channel, in the
258 * order they appear in the channel list.
259 */
207 260
208#include <linux/interrupt.h> 261#include <linux/interrupt.h>
209#include <linux/slab.h> 262#include <linux/slab.h>
@@ -211,7 +264,6 @@ order they appear in the channel list.
211#include "../comedidev.h" 264#include "../comedidev.h"
212 265
213#include "comedi_fc.h" 266#include "comedi_fc.h"
214#include "8255.h"
215#include "8253.h" 267#include "8253.h"
216 268
217#define DIO200_DRIVER_NAME "amplc_dio200" 269#define DIO200_DRIVER_NAME "amplc_dio200"
@@ -220,13 +272,24 @@ order they appear in the channel list.
220#define DO_PCI IS_ENABLED(CONFIG_COMEDI_AMPLC_DIO200_PCI) 272#define DO_PCI IS_ENABLED(CONFIG_COMEDI_AMPLC_DIO200_PCI)
221 273
222/* PCI IDs */ 274/* PCI IDs */
223#define PCI_VENDOR_ID_AMPLICON 0x14dc
224#define PCI_DEVICE_ID_AMPLICON_PCI272 0x000a 275#define PCI_DEVICE_ID_AMPLICON_PCI272 0x000a
225#define PCI_DEVICE_ID_AMPLICON_PCI215 0x000b 276#define PCI_DEVICE_ID_AMPLICON_PCI215 0x000b
226#define PCI_DEVICE_ID_INVALID 0xffff 277#define PCI_DEVICE_ID_AMPLICON_PCIE236 0x0011
278#define PCI_DEVICE_ID_AMPLICON_PCIE215 0x0012
279#define PCI_DEVICE_ID_AMPLICON_PCIE296 0x0014
280
281/* 8255 control register bits */
282#define CR_C_LO_IO 0x01
283#define CR_B_IO 0x02
284#define CR_B_MODE 0x04
285#define CR_C_HI_IO 0x08
286#define CR_A_IO 0x10
287#define CR_A_MODE(a) ((a)<<5)
288#define CR_CW 0x80
227 289
228/* 200 series registers */ 290/* 200 series registers */
229#define DIO200_IO_SIZE 0x20 291#define DIO200_IO_SIZE 0x20
292#define DIO200_PCIE_IO_SIZE 0x4000
230#define DIO200_XCLK_SCE 0x18 /* Group X clock selection register */ 293#define DIO200_XCLK_SCE 0x18 /* Group X clock selection register */
231#define DIO200_YCLK_SCE 0x19 /* Group Y clock selection register */ 294#define DIO200_YCLK_SCE 0x19 /* Group Y clock selection register */
232#define DIO200_ZCLK_SCE 0x1a /* Group Z clock selection register */ 295#define DIO200_ZCLK_SCE 0x1a /* Group Z clock selection register */
@@ -234,30 +297,78 @@ order they appear in the channel list.
234#define DIO200_YGAT_SCE 0x1c /* Group Y gate selection register */ 297#define DIO200_YGAT_SCE 0x1c /* Group Y gate selection register */
235#define DIO200_ZGAT_SCE 0x1d /* Group Z gate selection register */ 298#define DIO200_ZGAT_SCE 0x1d /* Group Z gate selection register */
236#define DIO200_INT_SCE 0x1e /* Interrupt enable/status register */ 299#define DIO200_INT_SCE 0x1e /* Interrupt enable/status register */
300/* Extra registers for new PCIe boards */
301#define DIO200_ENHANCE 0x20 /* 1 to enable enhanced features */
302#define DIO200_VERSION 0x24 /* Hardware version register */
303#define DIO200_TS_CONFIG 0x600 /* Timestamp timer config register */
304#define DIO200_TS_COUNT 0x602 /* Timestamp timer count register */
237 305
238/* 306/*
239 * Macros for constructing value for DIO_200_?CLK_SCE and 307 * Functions for constructing value for DIO_200_?CLK_SCE and
240 * DIO_200_?GAT_SCE registers: 308 * DIO_200_?GAT_SCE registers:
241 * 309 *
242 * 'which' is: 0 for CTR-X1, CTR-Y1, CTR-Z1; 1 for CTR-X2, CTR-Y2 or CTR-Z2. 310 * 'which' is: 0 for CTR-X1, CTR-Y1, CTR-Z1; 1 for CTR-X2, CTR-Y2 or CTR-Z2.
243 * 'chan' is the channel: 0, 1 or 2. 311 * 'chan' is the channel: 0, 1 or 2.
244 * 'source' is the signal source: 0 to 7. 312 * 'source' is the signal source: 0 to 7, or 0 to 31 for "enhanced" boards.
245 */ 313 */
246#define CLK_SCE(which, chan, source) (((which) << 5) | ((chan) << 3) | (source)) 314static unsigned char clk_gat_sce(unsigned int which, unsigned int chan,
247#define GAT_SCE(which, chan, source) (((which) << 5) | ((chan) << 3) | (source)) 315 unsigned int source)
316{
317 return (which << 5) | (chan << 3) |
318 ((source & 030) << 3) | (source & 007);
319}
320
321static unsigned char clk_sce(unsigned int which, unsigned int chan,
322 unsigned int source)
323{
324 return clk_gat_sce(which, chan, source);
325}
326
327static unsigned char gat_sce(unsigned int which, unsigned int chan,
328 unsigned int source)
329{
330 return clk_gat_sce(which, chan, source);
331}
248 332
249/* 333/*
250 * Periods of the internal clock sources in nanoseconds. 334 * Periods of the internal clock sources in nanoseconds.
251 */ 335 */
252static const unsigned clock_period[8] = { 336static const unsigned int clock_period[32] = {
253 0, /* dedicated clock input/output pin */ 337 [1] = 100, /* 10 MHz */
254 100, /* 10 MHz */ 338 [2] = 1000, /* 1 MHz */
255 1000, /* 1 MHz */ 339 [3] = 10000, /* 100 kHz */
256 10000, /* 100 kHz */ 340 [4] = 100000, /* 10 kHz */
257 100000, /* 10 kHz */ 341 [5] = 1000000, /* 1 kHz */
258 1000000, /* 1 kHz */ 342 [11] = 50, /* 20 MHz (enhanced boards) */
259 0, /* OUT N-1 */ 343 /* clock sources 12 and later reserved for enhanced boards */
260 0 /* group clock input pin */ 344};
345
346/*
347 * Timestamp timer configuration register (for new PCIe boards).
348 */
349#define TS_CONFIG_RESET 0x100 /* Reset counter to zero. */
350#define TS_CONFIG_CLK_SRC_MASK 0x0FF /* Clock source. */
351#define TS_CONFIG_MAX_CLK_SRC 2 /* Maximum clock source value. */
352
353/*
354 * Periods of the timestamp timer clock sources in nanoseconds.
355 */
356static const unsigned int ts_clock_period[TS_CONFIG_MAX_CLK_SRC + 1] = {
357 1, /* 1 nanosecond (but with 20 ns granularity). */
358 1000, /* 1 microsecond. */
359 1000000, /* 1 millisecond. */
360};
361
362/*
363 * Register region.
364 */
365enum dio200_regtype { no_regtype = 0, io_regtype, mmio_regtype };
366struct dio200_region {
367 union {
368 unsigned long iobase; /* I/O base address */
369 unsigned char __iomem *membase; /* mapped MMIO base address */
370 } u;
371 enum dio200_regtype regtype;
261}; 372};
262 373
263/* 374/*
@@ -269,13 +380,14 @@ enum dio200_bustype { isa_bustype, pci_bustype };
269enum dio200_model { 380enum dio200_model {
270 pc212e_model, 381 pc212e_model,
271 pc214e_model, 382 pc214e_model,
272 pc215e_model, pci215_model, 383 pc215e_model, pci215_model, pcie215_model,
273 pc218e_model, 384 pc218e_model,
385 pcie236_model,
274 pc272e_model, pci272_model, 386 pc272e_model, pci272_model,
275 anypci_model 387 pcie296_model,
276}; 388};
277 389
278enum dio200_layout { 390enum dio200_layout_idx {
279#if DO_ISA 391#if DO_ISA
280 pc212_layout, 392 pc212_layout,
281 pc214_layout, 393 pc214_layout,
@@ -284,7 +396,12 @@ enum dio200_layout {
284#if DO_ISA 396#if DO_ISA
285 pc218_layout, 397 pc218_layout,
286#endif 398#endif
287 pc272_layout 399 pc272_layout,
400#if DO_PCI
401 pcie215_layout,
402 pcie236_layout,
403 pcie296_layout,
404#endif
288}; 405};
289 406
290struct dio200_board { 407struct dio200_board {
@@ -292,7 +409,10 @@ struct dio200_board {
292 unsigned short devid; 409 unsigned short devid;
293 enum dio200_bustype bustype; 410 enum dio200_bustype bustype;
294 enum dio200_model model; 411 enum dio200_model model;
295 enum dio200_layout layout; 412 enum dio200_layout_idx layout;
413 unsigned char mainbar;
414 unsigned char mainshift;
415 unsigned int mainsize;
296}; 416};
297 417
298static const struct dio200_board dio200_boards[] = { 418static const struct dio200_board dio200_boards[] = {
@@ -302,30 +422,35 @@ static const struct dio200_board dio200_boards[] = {
302 .bustype = isa_bustype, 422 .bustype = isa_bustype,
303 .model = pc212e_model, 423 .model = pc212e_model,
304 .layout = pc212_layout, 424 .layout = pc212_layout,
425 .mainsize = DIO200_IO_SIZE,
305 }, 426 },
306 { 427 {
307 .name = "pc214e", 428 .name = "pc214e",
308 .bustype = isa_bustype, 429 .bustype = isa_bustype,
309 .model = pc214e_model, 430 .model = pc214e_model,
310 .layout = pc214_layout, 431 .layout = pc214_layout,
432 .mainsize = DIO200_IO_SIZE,
311 }, 433 },
312 { 434 {
313 .name = "pc215e", 435 .name = "pc215e",
314 .bustype = isa_bustype, 436 .bustype = isa_bustype,
315 .model = pc215e_model, 437 .model = pc215e_model,
316 .layout = pc215_layout, 438 .layout = pc215_layout,
439 .mainsize = DIO200_IO_SIZE,
317 }, 440 },
318 { 441 {
319 .name = "pc218e", 442 .name = "pc218e",
320 .bustype = isa_bustype, 443 .bustype = isa_bustype,
321 .model = pc218e_model, 444 .model = pc218e_model,
322 .layout = pc218_layout, 445 .layout = pc218_layout,
446 .mainsize = DIO200_IO_SIZE,
323 }, 447 },
324 { 448 {
325 .name = "pc272e", 449 .name = "pc272e",
326 .bustype = isa_bustype, 450 .bustype = isa_bustype,
327 .model = pc272e_model, 451 .model = pc272e_model,
328 .layout = pc272_layout, 452 .layout = pc272_layout,
453 .mainsize = DIO200_IO_SIZE,
329 }, 454 },
330#endif 455#endif
331#if DO_PCI 456#if DO_PCI
@@ -335,6 +460,8 @@ static const struct dio200_board dio200_boards[] = {
335 .bustype = pci_bustype, 460 .bustype = pci_bustype,
336 .model = pci215_model, 461 .model = pci215_model,
337 .layout = pc215_layout, 462 .layout = pc215_layout,
463 .mainbar = 2,
464 .mainsize = DIO200_IO_SIZE,
338 }, 465 },
339 { 466 {
340 .name = "pci272", 467 .name = "pci272",
@@ -342,12 +469,38 @@ static const struct dio200_board dio200_boards[] = {
342 .bustype = pci_bustype, 469 .bustype = pci_bustype,
343 .model = pci272_model, 470 .model = pci272_model,
344 .layout = pc272_layout, 471 .layout = pc272_layout,
472 .mainbar = 2,
473 .mainsize = DIO200_IO_SIZE,
474 },
475 {
476 .name = "pcie215",
477 .devid = PCI_DEVICE_ID_AMPLICON_PCIE215,
478 .bustype = pci_bustype,
479 .model = pcie215_model,
480 .layout = pcie215_layout,
481 .mainbar = 1,
482 .mainshift = 3,
483 .mainsize = DIO200_PCIE_IO_SIZE,
345 }, 484 },
346 { 485 {
347 .name = DIO200_DRIVER_NAME, 486 .name = "pcie236",
348 .devid = PCI_DEVICE_ID_INVALID, 487 .devid = PCI_DEVICE_ID_AMPLICON_PCIE236,
349 .bustype = pci_bustype, 488 .bustype = pci_bustype,
350 .model = anypci_model, /* wildcard */ 489 .model = pcie236_model,
490 .layout = pcie236_layout,
491 .mainbar = 1,
492 .mainshift = 3,
493 .mainsize = DIO200_PCIE_IO_SIZE,
494 },
495 {
496 .name = "pcie296",
497 .devid = PCI_DEVICE_ID_AMPLICON_PCIE296,
498 .bustype = pci_bustype,
499 .model = pcie296_model,
500 .layout = pcie296_layout,
501 .mainbar = 1,
502 .mainshift = 3,
503 .mainsize = DIO200_PCIE_IO_SIZE,
351 }, 504 },
352#endif 505#endif
353}; 506};
@@ -357,20 +510,21 @@ static const struct dio200_board dio200_boards[] = {
357 * layout. 510 * layout.
358 */ 511 */
359 512
360enum dio200_sdtype { sd_none, sd_intr, sd_8255, sd_8254 }; 513enum dio200_sdtype { sd_none, sd_intr, sd_8255, sd_8254, sd_timer };
361 514
362#define DIO200_MAX_SUBDEVS 7 515#define DIO200_MAX_SUBDEVS 8
363#define DIO200_MAX_ISNS 6 516#define DIO200_MAX_ISNS 6
364 517
365struct dio200_layout_struct { 518struct dio200_layout {
366 unsigned short n_subdevs; /* number of subdevices */ 519 unsigned short n_subdevs; /* number of subdevices */
367 unsigned char sdtype[DIO200_MAX_SUBDEVS]; /* enum dio200_sdtype */ 520 unsigned char sdtype[DIO200_MAX_SUBDEVS]; /* enum dio200_sdtype */
368 unsigned char sdinfo[DIO200_MAX_SUBDEVS]; /* depends on sdtype */ 521 unsigned char sdinfo[DIO200_MAX_SUBDEVS]; /* depends on sdtype */
369 char has_int_sce; /* has interrupt enable/status register */ 522 char has_int_sce; /* has interrupt enable/status register */
370 char has_clk_gat_sce; /* has clock/gate selection registers */ 523 char has_clk_gat_sce; /* has clock/gate selection registers */
524 char has_enhancements; /* has enhanced features */
371}; 525};
372 526
373static const struct dio200_layout_struct dio200_layouts[] = { 527static const struct dio200_layout dio200_layouts[] = {
374#if DO_ISA 528#if DO_ISA
375 [pc212_layout] = { 529 [pc212_layout] = {
376 .n_subdevs = 6, 530 .n_subdevs = 6,
@@ -421,6 +575,38 @@ static const struct dio200_layout_struct dio200_layouts[] = {
421 .has_int_sce = 1, 575 .has_int_sce = 1,
422 .has_clk_gat_sce = 0, 576 .has_clk_gat_sce = 0,
423 }, 577 },
578#if DO_PCI
579 [pcie215_layout] = {
580 .n_subdevs = 8,
581 .sdtype = {sd_8255, sd_none, sd_8255, sd_none,
582 sd_8254, sd_8254, sd_timer, sd_intr},
583 .sdinfo = {0x00, 0x00, 0x08, 0x00,
584 0x10, 0x14, 0x00, 0x3F},
585 .has_int_sce = 1,
586 .has_clk_gat_sce = 1,
587 .has_enhancements = 1,
588 },
589 [pcie236_layout] = {
590 .n_subdevs = 8,
591 .sdtype = {sd_8255, sd_none, sd_none, sd_none,
592 sd_8254, sd_8254, sd_timer, sd_intr},
593 .sdinfo = {0x00, 0x00, 0x00, 0x00,
594 0x10, 0x14, 0x00, 0x3F},
595 .has_int_sce = 1,
596 .has_clk_gat_sce = 1,
597 .has_enhancements = 1,
598 },
599 [pcie296_layout] = {
600 .n_subdevs = 8,
601 .sdtype = {sd_8255, sd_8255, sd_8255, sd_8255,
602 sd_8254, sd_8254, sd_timer, sd_intr},
603 .sdinfo = {0x00, 0x04, 0x08, 0x0C,
604 0x10, 0x14, 0x00, 0x3F},
605 .has_int_sce = 1,
606 .has_clk_gat_sce = 1,
607 .has_enhancements = 1,
608 },
609#endif
424}; 610};
425 611
426/* this structure is for data unique to this hardware driver. If 612/* this structure is for data unique to this hardware driver. If
@@ -428,31 +614,46 @@ static const struct dio200_layout_struct dio200_layouts[] = {
428 feel free to suggest moving the variable to the struct comedi_device struct. 614 feel free to suggest moving the variable to the struct comedi_device struct.
429 */ 615 */
430struct dio200_private { 616struct dio200_private {
617 struct dio200_region io; /* Register region */
431 int intr_sd; 618 int intr_sd;
432}; 619};
433 620
434struct dio200_subdev_8254 { 621struct dio200_subdev_8254 {
435 unsigned long iobase; /* Counter base address */ 622 unsigned int ofs; /* Counter base offset */
436 unsigned long clk_sce_iobase; /* CLK_SCE base address */ 623 unsigned int clk_sce_ofs; /* CLK_SCE base address */
437 unsigned long gat_sce_iobase; /* GAT_SCE base address */ 624 unsigned int gat_sce_ofs; /* GAT_SCE base address */
438 int which; /* Bit 5 of CLK_SCE or GAT_SCE */ 625 int which; /* Bit 5 of CLK_SCE or GAT_SCE */
439 int has_clk_gat_sce; 626 unsigned int clock_src[3]; /* Current clock sources */
440 unsigned clock_src[3]; /* Current clock sources */ 627 unsigned int gate_src[3]; /* Current gate sources */
441 unsigned gate_src[3]; /* Current gate sources */
442 spinlock_t spinlock; 628 spinlock_t spinlock;
443}; 629};
444 630
631struct dio200_subdev_8255 {
632 unsigned int ofs; /* DIO base offset */
633};
634
445struct dio200_subdev_intr { 635struct dio200_subdev_intr {
446 unsigned long iobase; 636 unsigned int ofs;
447 spinlock_t spinlock; 637 spinlock_t spinlock;
448 int active; 638 int active;
449 int has_int_sce;
450 unsigned int valid_isns; 639 unsigned int valid_isns;
451 unsigned int enabled_isns; 640 unsigned int enabled_isns;
452 unsigned int stopcount; 641 unsigned int stopcount;
453 int continuous; 642 int continuous;
454}; 643};
455 644
645static inline const struct dio200_layout *
646dio200_board_layout(const struct dio200_board *board)
647{
648 return &dio200_layouts[board->layout];
649}
650
651static inline const struct dio200_layout *
652dio200_dev_layout(struct comedi_device *dev)
653{
654 return dio200_board_layout(comedi_board(dev));
655}
656
456static inline bool is_pci_board(const struct dio200_board *board) 657static inline bool is_pci_board(const struct dio200_board *board)
457{ 658{
458 return DO_PCI && board->bustype == pci_bustype; 659 return DO_PCI && board->bustype == pci_bustype;
@@ -464,6 +665,70 @@ static inline bool is_isa_board(const struct dio200_board *board)
464} 665}
465 666
466/* 667/*
668 * Read 8-bit register.
669 */
670static unsigned char dio200_read8(struct comedi_device *dev,
671 unsigned int offset)
672{
673 const struct dio200_board *thisboard = comedi_board(dev);
674 struct dio200_private *devpriv = dev->private;
675
676 offset <<= thisboard->mainshift;
677 if (devpriv->io.regtype == io_regtype)
678 return inb(devpriv->io.u.iobase + offset);
679 else
680 return readb(devpriv->io.u.membase + offset);
681}
682
683/*
684 * Write 8-bit register.
685 */
686static void dio200_write8(struct comedi_device *dev, unsigned int offset,
687 unsigned char val)
688{
689 const struct dio200_board *thisboard = comedi_board(dev);
690 struct dio200_private *devpriv = dev->private;
691
692 offset <<= thisboard->mainshift;
693 if (devpriv->io.regtype == io_regtype)
694 outb(val, devpriv->io.u.iobase + offset);
695 else
696 writeb(val, devpriv->io.u.membase + offset);
697}
698
699/*
700 * Read 32-bit register.
701 */
702static unsigned int dio200_read32(struct comedi_device *dev,
703 unsigned int offset)
704{
705 const struct dio200_board *thisboard = comedi_board(dev);
706 struct dio200_private *devpriv = dev->private;
707
708 offset <<= thisboard->mainshift;
709 if (devpriv->io.regtype == io_regtype)
710 return inl(devpriv->io.u.iobase + offset);
711 else
712 return readl(devpriv->io.u.membase + offset);
713}
714
715/*
716 * Write 32-bit register.
717 */
718static void dio200_write32(struct comedi_device *dev, unsigned int offset,
719 unsigned int val)
720{
721 const struct dio200_board *thisboard = comedi_board(dev);
722 struct dio200_private *devpriv = dev->private;
723
724 offset <<= thisboard->mainshift;
725 if (devpriv->io.regtype == io_regtype)
726 outl(val, devpriv->io.u.iobase + offset);
727 else
728 writel(val, devpriv->io.u.membase + offset);
729}
730
731/*
467 * This function looks for a board matching the supplied PCI device. 732 * This function looks for a board matching the supplied PCI device.
468 */ 733 */
469static const struct dio200_board * 734static const struct dio200_board *
@@ -479,49 +744,6 @@ dio200_find_pci_board(struct pci_dev *pci_dev)
479} 744}
480 745
481/* 746/*
482 * This function looks for a PCI device matching the requested board name,
483 * bus and slot.
484 */
485static struct pci_dev *dio200_find_pci_dev(struct comedi_device *dev,
486 struct comedi_devconfig *it)
487{
488 const struct dio200_board *thisboard = comedi_board(dev);
489 struct pci_dev *pci_dev = NULL;
490 int bus = it->options[0];
491 int slot = it->options[1];
492
493 for_each_pci_dev(pci_dev) {
494 if (bus || slot) {
495 if (bus != pci_dev->bus->number ||
496 slot != PCI_SLOT(pci_dev->devfn))
497 continue;
498 }
499 if (pci_dev->vendor != PCI_VENDOR_ID_AMPLICON)
500 continue;
501
502 if (thisboard->model == anypci_model) {
503 /* Wildcard board matches any supported PCI board. */
504 const struct dio200_board *foundboard;
505
506 foundboard = dio200_find_pci_board(pci_dev);
507 if (foundboard == NULL)
508 continue;
509 /* Replace wildcard board_ptr. */
510 dev->board_ptr = foundboard;
511 } else {
512 /* Match specific model name. */
513 if (pci_dev->device != thisboard->devid)
514 continue;
515 }
516 return pci_dev;
517 }
518 dev_err(dev->class_dev,
519 "No supported board found! (req. bus %d, slot %d)\n",
520 bus, slot);
521 return NULL;
522}
523
524/*
525 * This function checks and requests an I/O region, reporting an error 747 * This function checks and requests an I/O region, reporting an error
526 * if there is a conflict. 748 * if there is a conflict.
527 */ 749 */
@@ -545,11 +767,12 @@ dio200_subdev_intr_insn_bits(struct comedi_device *dev,
545 struct comedi_subdevice *s, 767 struct comedi_subdevice *s,
546 struct comedi_insn *insn, unsigned int *data) 768 struct comedi_insn *insn, unsigned int *data)
547{ 769{
770 const struct dio200_layout *layout = dio200_dev_layout(dev);
548 struct dio200_subdev_intr *subpriv = s->private; 771 struct dio200_subdev_intr *subpriv = s->private;
549 772
550 if (subpriv->has_int_sce) { 773 if (layout->has_int_sce) {
551 /* Just read the interrupt status register. */ 774 /* Just read the interrupt status register. */
552 data[1] = inb(subpriv->iobase) & subpriv->valid_isns; 775 data[1] = dio200_read8(dev, subpriv->ofs) & subpriv->valid_isns;
553 } else { 776 } else {
554 /* No interrupt status register. */ 777 /* No interrupt status register. */
555 data[0] = 0; 778 data[0] = 0;
@@ -564,12 +787,13 @@ dio200_subdev_intr_insn_bits(struct comedi_device *dev,
564static void dio200_stop_intr(struct comedi_device *dev, 787static void dio200_stop_intr(struct comedi_device *dev,
565 struct comedi_subdevice *s) 788 struct comedi_subdevice *s)
566{ 789{
790 const struct dio200_layout *layout = dio200_dev_layout(dev);
567 struct dio200_subdev_intr *subpriv = s->private; 791 struct dio200_subdev_intr *subpriv = s->private;
568 792
569 subpriv->active = 0; 793 subpriv->active = 0;
570 subpriv->enabled_isns = 0; 794 subpriv->enabled_isns = 0;
571 if (subpriv->has_int_sce) 795 if (layout->has_int_sce)
572 outb(0, subpriv->iobase); 796 dio200_write8(dev, subpriv->ofs, 0);
573} 797}
574 798
575/* 799/*
@@ -580,6 +804,7 @@ static int dio200_start_intr(struct comedi_device *dev,
580{ 804{
581 unsigned int n; 805 unsigned int n;
582 unsigned isn_bits; 806 unsigned isn_bits;
807 const struct dio200_layout *layout = dio200_dev_layout(dev);
583 struct dio200_subdev_intr *subpriv = s->private; 808 struct dio200_subdev_intr *subpriv = s->private;
584 struct comedi_cmd *cmd = &s->async->cmd; 809 struct comedi_cmd *cmd = &s->async->cmd;
585 int retval = 0; 810 int retval = 0;
@@ -599,8 +824,8 @@ static int dio200_start_intr(struct comedi_device *dev,
599 isn_bits &= subpriv->valid_isns; 824 isn_bits &= subpriv->valid_isns;
600 /* Enable interrupt sources. */ 825 /* Enable interrupt sources. */
601 subpriv->enabled_isns = isn_bits; 826 subpriv->enabled_isns = isn_bits;
602 if (subpriv->has_int_sce) 827 if (layout->has_int_sce)
603 outb(isn_bits, subpriv->iobase); 828 dio200_write8(dev, subpriv->ofs, isn_bits);
604 } 829 }
605 830
606 return retval; 831 return retval;
@@ -642,6 +867,7 @@ dio200_inttrig_start_intr(struct comedi_device *dev, struct comedi_subdevice *s,
642static int dio200_handle_read_intr(struct comedi_device *dev, 867static int dio200_handle_read_intr(struct comedi_device *dev,
643 struct comedi_subdevice *s) 868 struct comedi_subdevice *s)
644{ 869{
870 const struct dio200_layout *layout = dio200_dev_layout(dev);
645 struct dio200_subdev_intr *subpriv = s->private; 871 struct dio200_subdev_intr *subpriv = s->private;
646 unsigned triggered; 872 unsigned triggered;
647 unsigned intstat; 873 unsigned intstat;
@@ -653,7 +879,7 @@ static int dio200_handle_read_intr(struct comedi_device *dev,
653 879
654 spin_lock_irqsave(&subpriv->spinlock, flags); 880 spin_lock_irqsave(&subpriv->spinlock, flags);
655 oldevents = s->async->events; 881 oldevents = s->async->events;
656 if (subpriv->has_int_sce) { 882 if (layout->has_int_sce) {
657 /* 883 /*
658 * Collect interrupt sources that have triggered and disable 884 * Collect interrupt sources that have triggered and disable
659 * them temporarily. Loop around until no extra interrupt 885 * them temporarily. Loop around until no extra interrupt
@@ -665,11 +891,11 @@ static int dio200_handle_read_intr(struct comedi_device *dev,
665 * loop in case of misconfiguration. 891 * loop in case of misconfiguration.
666 */ 892 */
667 cur_enabled = subpriv->enabled_isns; 893 cur_enabled = subpriv->enabled_isns;
668 while ((intstat = (inb(subpriv->iobase) & subpriv->valid_isns 894 while ((intstat = (dio200_read8(dev, subpriv->ofs) &
669 & ~triggered)) != 0) { 895 subpriv->valid_isns & ~triggered)) != 0) {
670 triggered |= intstat; 896 triggered |= intstat;
671 cur_enabled &= ~triggered; 897 cur_enabled &= ~triggered;
672 outb(cur_enabled, subpriv->iobase); 898 dio200_write8(dev, subpriv->ofs, cur_enabled);
673 } 899 }
674 } else { 900 } else {
675 /* 901 /*
@@ -687,8 +913,8 @@ static int dio200_handle_read_intr(struct comedi_device *dev,
687 * Reenable them NOW to minimize the time they are disabled. 913 * Reenable them NOW to minimize the time they are disabled.
688 */ 914 */
689 cur_enabled = subpriv->enabled_isns; 915 cur_enabled = subpriv->enabled_isns;
690 if (subpriv->has_int_sce) 916 if (layout->has_int_sce)
691 outb(cur_enabled, subpriv->iobase); 917 dio200_write8(dev, subpriv->ofs, cur_enabled);
692 918
693 if (subpriv->active) { 919 if (subpriv->active) {
694 /* 920 /*
@@ -794,41 +1020,19 @@ dio200_subdev_intr_cmdtest(struct comedi_device *dev,
794 if (err) 1020 if (err)
795 return 2; 1021 return 2;
796 1022
797 /* step 3: make sure arguments are trivially compatible */ 1023 /* Step 3: check if arguments are trivially valid */
798 1024
799 /* cmd->start_src == TRIG_NOW || cmd->start_src == TRIG_INT */ 1025 err |= cfc_check_trigger_arg_is(&cmd->start_arg, 0);
800 if (cmd->start_arg != 0) { 1026 err |= cfc_check_trigger_arg_is(&cmd->scan_begin_arg, 0);
801 cmd->start_arg = 0; 1027 err |= cfc_check_trigger_arg_is(&cmd->convert_arg, 0);
802 err++; 1028 err |= cfc_check_trigger_arg_is(&cmd->scan_end_arg, cmd->chanlist_len);
803 }
804
805 /* cmd->scan_begin_src == TRIG_EXT */
806 if (cmd->scan_begin_arg != 0) {
807 cmd->scan_begin_arg = 0;
808 err++;
809 }
810
811 /* cmd->convert_src == TRIG_NOW */
812 if (cmd->convert_arg != 0) {
813 cmd->convert_arg = 0;
814 err++;
815 }
816
817 /* cmd->scan_end_src == TRIG_COUNT */
818 if (cmd->scan_end_arg != cmd->chanlist_len) {
819 cmd->scan_end_arg = cmd->chanlist_len;
820 err++;
821 }
822 1029
823 switch (cmd->stop_src) { 1030 switch (cmd->stop_src) {
824 case TRIG_COUNT: 1031 case TRIG_COUNT:
825 /* any count allowed */ 1032 /* any count allowed */
826 break; 1033 break;
827 case TRIG_NONE: 1034 case TRIG_NONE:
828 if (cmd->stop_arg != 0) { 1035 err |= cfc_check_trigger_arg_is(&cmd->stop_arg, 0);
829 cmd->stop_arg = 0;
830 err++;
831 }
832 break; 1036 break;
833 default: 1037 default:
834 break; 1038 break;
@@ -894,9 +1098,9 @@ static int dio200_subdev_intr_cmd(struct comedi_device *dev,
894 */ 1098 */
895static int 1099static int
896dio200_subdev_intr_init(struct comedi_device *dev, struct comedi_subdevice *s, 1100dio200_subdev_intr_init(struct comedi_device *dev, struct comedi_subdevice *s,
897 unsigned long iobase, unsigned valid_isns, 1101 unsigned int offset, unsigned valid_isns)
898 int has_int_sce)
899{ 1102{
1103 const struct dio200_layout *layout = dio200_dev_layout(dev);
900 struct dio200_subdev_intr *subpriv; 1104 struct dio200_subdev_intr *subpriv;
901 1105
902 subpriv = kzalloc(sizeof(*subpriv), GFP_KERNEL); 1106 subpriv = kzalloc(sizeof(*subpriv), GFP_KERNEL);
@@ -904,18 +1108,18 @@ dio200_subdev_intr_init(struct comedi_device *dev, struct comedi_subdevice *s,
904 dev_err(dev->class_dev, "error! out of memory!\n"); 1108 dev_err(dev->class_dev, "error! out of memory!\n");
905 return -ENOMEM; 1109 return -ENOMEM;
906 } 1110 }
907 subpriv->iobase = iobase; 1111 subpriv->ofs = offset;
908 subpriv->has_int_sce = has_int_sce;
909 subpriv->valid_isns = valid_isns; 1112 subpriv->valid_isns = valid_isns;
910 spin_lock_init(&subpriv->spinlock); 1113 spin_lock_init(&subpriv->spinlock);
911 1114
912 if (has_int_sce) 1115 if (layout->has_int_sce)
913 outb(0, subpriv->iobase); /* Disable interrupt sources. */ 1116 /* Disable interrupt sources. */
1117 dio200_write8(dev, subpriv->ofs, 0);
914 1118
915 s->private = subpriv; 1119 s->private = subpriv;
916 s->type = COMEDI_SUBD_DI; 1120 s->type = COMEDI_SUBD_DI;
917 s->subdev_flags = SDF_READABLE | SDF_CMD_READ; 1121 s->subdev_flags = SDF_READABLE | SDF_CMD_READ;
918 if (has_int_sce) { 1122 if (layout->has_int_sce) {
919 s->n_chan = DIO200_MAX_ISNS; 1123 s->n_chan = DIO200_MAX_ISNS;
920 s->len_chanlist = DIO200_MAX_ISNS; 1124 s->len_chanlist = DIO200_MAX_ISNS;
921 } else { 1125 } else {
@@ -968,6 +1172,73 @@ static irqreturn_t dio200_interrupt(int irq, void *d)
968} 1172}
969 1173
970/* 1174/*
1175 * Read an '8254' counter subdevice channel.
1176 */
1177static unsigned int
1178dio200_subdev_8254_read_chan(struct comedi_device *dev,
1179 struct comedi_subdevice *s, unsigned int chan)
1180{
1181 struct dio200_subdev_8254 *subpriv = s->private;
1182 unsigned int val;
1183
1184 /* latch counter */
1185 val = chan << 6;
1186 dio200_write8(dev, subpriv->ofs + i8254_control_reg, val);
1187 /* read lsb, msb */
1188 val = dio200_read8(dev, subpriv->ofs + chan);
1189 val += dio200_read8(dev, subpriv->ofs + chan) << 8;
1190 return val;
1191}
1192
1193/*
1194 * Write an '8254' subdevice channel.
1195 */
1196static void
1197dio200_subdev_8254_write_chan(struct comedi_device *dev,
1198 struct comedi_subdevice *s, unsigned int chan,
1199 unsigned int count)
1200{
1201 struct dio200_subdev_8254 *subpriv = s->private;
1202
1203 /* write lsb, msb */
1204 dio200_write8(dev, subpriv->ofs + chan, count & 0xff);
1205 dio200_write8(dev, subpriv->ofs + chan, (count >> 8) & 0xff);
1206}
1207
1208/*
1209 * Set mode of an '8254' subdevice channel.
1210 */
1211static void
1212dio200_subdev_8254_set_mode(struct comedi_device *dev,
1213 struct comedi_subdevice *s, unsigned int chan,
1214 unsigned int mode)
1215{
1216 struct dio200_subdev_8254 *subpriv = s->private;
1217 unsigned int byte;
1218
1219 byte = chan << 6;
1220 byte |= 0x30; /* access order: lsb, msb */
1221 byte |= (mode & 0xf); /* counter mode and BCD|binary */
1222 dio200_write8(dev, subpriv->ofs + i8254_control_reg, byte);
1223}
1224
1225/*
1226 * Read status byte of an '8254' counter subdevice channel.
1227 */
1228static unsigned int
1229dio200_subdev_8254_status(struct comedi_device *dev,
1230 struct comedi_subdevice *s, unsigned int chan)
1231{
1232 struct dio200_subdev_8254 *subpriv = s->private;
1233
1234 /* latch status */
1235 dio200_write8(dev, subpriv->ofs + i8254_control_reg,
1236 0xe0 | (2 << chan));
1237 /* read status */
1238 return dio200_read8(dev, subpriv->ofs + chan);
1239}
1240
1241/*
971 * Handle 'insn_read' for an '8254' counter subdevice. 1242 * Handle 'insn_read' for an '8254' counter subdevice.
972 */ 1243 */
973static int 1244static int
@@ -976,13 +1247,15 @@ dio200_subdev_8254_read(struct comedi_device *dev, struct comedi_subdevice *s,
976{ 1247{
977 struct dio200_subdev_8254 *subpriv = s->private; 1248 struct dio200_subdev_8254 *subpriv = s->private;
978 int chan = CR_CHAN(insn->chanspec); 1249 int chan = CR_CHAN(insn->chanspec);
1250 unsigned int n;
979 unsigned long flags; 1251 unsigned long flags;
980 1252
981 spin_lock_irqsave(&subpriv->spinlock, flags); 1253 for (n = 0; n < insn->n; n++) {
982 data[0] = i8254_read(subpriv->iobase, 0, chan); 1254 spin_lock_irqsave(&subpriv->spinlock, flags);
983 spin_unlock_irqrestore(&subpriv->spinlock, flags); 1255 data[n] = dio200_subdev_8254_read_chan(dev, s, chan);
984 1256 spin_unlock_irqrestore(&subpriv->spinlock, flags);
985 return 1; 1257 }
1258 return insn->n;
986} 1259}
987 1260
988/* 1261/*
@@ -994,34 +1267,40 @@ dio200_subdev_8254_write(struct comedi_device *dev, struct comedi_subdevice *s,
994{ 1267{
995 struct dio200_subdev_8254 *subpriv = s->private; 1268 struct dio200_subdev_8254 *subpriv = s->private;
996 int chan = CR_CHAN(insn->chanspec); 1269 int chan = CR_CHAN(insn->chanspec);
1270 unsigned int n;
997 unsigned long flags; 1271 unsigned long flags;
998 1272
999 spin_lock_irqsave(&subpriv->spinlock, flags); 1273 for (n = 0; n < insn->n; n++) {
1000 i8254_write(subpriv->iobase, 0, chan, data[0]); 1274 spin_lock_irqsave(&subpriv->spinlock, flags);
1001 spin_unlock_irqrestore(&subpriv->spinlock, flags); 1275 dio200_subdev_8254_write_chan(dev, s, chan, data[n]);
1002 1276 spin_unlock_irqrestore(&subpriv->spinlock, flags);
1003 return 1; 1277 }
1278 return insn->n;
1004} 1279}
1005 1280
1006/* 1281/*
1007 * Set gate source for an '8254' counter subdevice channel. 1282 * Set gate source for an '8254' counter subdevice channel.
1008 */ 1283 */
1009static int 1284static int
1010dio200_set_gate_src(struct dio200_subdev_8254 *subpriv, 1285dio200_subdev_8254_set_gate_src(struct comedi_device *dev,
1011 unsigned int counter_number, unsigned int gate_src) 1286 struct comedi_subdevice *s,
1287 unsigned int counter_number,
1288 unsigned int gate_src)
1012{ 1289{
1290 const struct dio200_layout *layout = dio200_dev_layout(dev);
1291 struct dio200_subdev_8254 *subpriv = s->private;
1013 unsigned char byte; 1292 unsigned char byte;
1014 1293
1015 if (!subpriv->has_clk_gat_sce) 1294 if (!layout->has_clk_gat_sce)
1016 return -1; 1295 return -1;
1017 if (counter_number > 2) 1296 if (counter_number > 2)
1018 return -1; 1297 return -1;
1019 if (gate_src > 7) 1298 if (gate_src > (layout->has_enhancements ? 31 : 7))
1020 return -1; 1299 return -1;
1021 1300
1022 subpriv->gate_src[counter_number] = gate_src; 1301 subpriv->gate_src[counter_number] = gate_src;
1023 byte = GAT_SCE(subpriv->which, counter_number, gate_src); 1302 byte = gat_sce(subpriv->which, counter_number, gate_src);
1024 outb(byte, subpriv->gat_sce_iobase); 1303 dio200_write8(dev, subpriv->gat_sce_ofs, byte);
1025 1304
1026 return 0; 1305 return 0;
1027} 1306}
@@ -1030,10 +1309,14 @@ dio200_set_gate_src(struct dio200_subdev_8254 *subpriv,
1030 * Get gate source for an '8254' counter subdevice channel. 1309 * Get gate source for an '8254' counter subdevice channel.
1031 */ 1310 */
1032static int 1311static int
1033dio200_get_gate_src(struct dio200_subdev_8254 *subpriv, 1312dio200_subdev_8254_get_gate_src(struct comedi_device *dev,
1034 unsigned int counter_number) 1313 struct comedi_subdevice *s,
1314 unsigned int counter_number)
1035{ 1315{
1036 if (!subpriv->has_clk_gat_sce) 1316 const struct dio200_layout *layout = dio200_dev_layout(dev);
1317 struct dio200_subdev_8254 *subpriv = s->private;
1318
1319 if (!layout->has_clk_gat_sce)
1037 return -1; 1320 return -1;
1038 if (counter_number > 2) 1321 if (counter_number > 2)
1039 return -1; 1322 return -1;
@@ -1045,21 +1328,25 @@ dio200_get_gate_src(struct dio200_subdev_8254 *subpriv,
1045 * Set clock source for an '8254' counter subdevice channel. 1328 * Set clock source for an '8254' counter subdevice channel.
1046 */ 1329 */
1047static int 1330static int
1048dio200_set_clock_src(struct dio200_subdev_8254 *subpriv, 1331dio200_subdev_8254_set_clock_src(struct comedi_device *dev,
1049 unsigned int counter_number, unsigned int clock_src) 1332 struct comedi_subdevice *s,
1333 unsigned int counter_number,
1334 unsigned int clock_src)
1050{ 1335{
1336 const struct dio200_layout *layout = dio200_dev_layout(dev);
1337 struct dio200_subdev_8254 *subpriv = s->private;
1051 unsigned char byte; 1338 unsigned char byte;
1052 1339
1053 if (!subpriv->has_clk_gat_sce) 1340 if (!layout->has_clk_gat_sce)
1054 return -1; 1341 return -1;
1055 if (counter_number > 2) 1342 if (counter_number > 2)
1056 return -1; 1343 return -1;
1057 if (clock_src > 7) 1344 if (clock_src > (layout->has_enhancements ? 31 : 7))
1058 return -1; 1345 return -1;
1059 1346
1060 subpriv->clock_src[counter_number] = clock_src; 1347 subpriv->clock_src[counter_number] = clock_src;
1061 byte = CLK_SCE(subpriv->which, counter_number, clock_src); 1348 byte = clk_sce(subpriv->which, counter_number, clock_src);
1062 outb(byte, subpriv->clk_sce_iobase); 1349 dio200_write8(dev, subpriv->clk_sce_ofs, byte);
1063 1350
1064 return 0; 1351 return 0;
1065} 1352}
@@ -1068,12 +1355,16 @@ dio200_set_clock_src(struct dio200_subdev_8254 *subpriv,
1068 * Get clock source for an '8254' counter subdevice channel. 1355 * Get clock source for an '8254' counter subdevice channel.
1069 */ 1356 */
1070static int 1357static int
1071dio200_get_clock_src(struct dio200_subdev_8254 *subpriv, 1358dio200_subdev_8254_get_clock_src(struct comedi_device *dev,
1072 unsigned int counter_number, unsigned int *period_ns) 1359 struct comedi_subdevice *s,
1360 unsigned int counter_number,
1361 unsigned int *period_ns)
1073{ 1362{
1363 const struct dio200_layout *layout = dio200_dev_layout(dev);
1364 struct dio200_subdev_8254 *subpriv = s->private;
1074 unsigned clock_src; 1365 unsigned clock_src;
1075 1366
1076 if (!subpriv->has_clk_gat_sce) 1367 if (!layout->has_clk_gat_sce)
1077 return -1; 1368 return -1;
1078 if (counter_number > 2) 1369 if (counter_number > 2)
1079 return -1; 1370 return -1;
@@ -1098,20 +1389,21 @@ dio200_subdev_8254_config(struct comedi_device *dev, struct comedi_subdevice *s,
1098 spin_lock_irqsave(&subpriv->spinlock, flags); 1389 spin_lock_irqsave(&subpriv->spinlock, flags);
1099 switch (data[0]) { 1390 switch (data[0]) {
1100 case INSN_CONFIG_SET_COUNTER_MODE: 1391 case INSN_CONFIG_SET_COUNTER_MODE:
1101 ret = i8254_set_mode(subpriv->iobase, 0, chan, data[1]); 1392 if (data[1] > (I8254_MODE5 | I8254_BINARY))
1102 if (ret < 0)
1103 ret = -EINVAL; 1393 ret = -EINVAL;
1394 else
1395 dio200_subdev_8254_set_mode(dev, s, chan, data[1]);
1104 break; 1396 break;
1105 case INSN_CONFIG_8254_READ_STATUS: 1397 case INSN_CONFIG_8254_READ_STATUS:
1106 data[1] = i8254_status(subpriv->iobase, 0, chan); 1398 data[1] = dio200_subdev_8254_status(dev, s, chan);
1107 break; 1399 break;
1108 case INSN_CONFIG_SET_GATE_SRC: 1400 case INSN_CONFIG_SET_GATE_SRC:
1109 ret = dio200_set_gate_src(subpriv, chan, data[2]); 1401 ret = dio200_subdev_8254_set_gate_src(dev, s, chan, data[2]);
1110 if (ret < 0) 1402 if (ret < 0)
1111 ret = -EINVAL; 1403 ret = -EINVAL;
1112 break; 1404 break;
1113 case INSN_CONFIG_GET_GATE_SRC: 1405 case INSN_CONFIG_GET_GATE_SRC:
1114 ret = dio200_get_gate_src(subpriv, chan); 1406 ret = dio200_subdev_8254_get_gate_src(dev, s, chan);
1115 if (ret < 0) { 1407 if (ret < 0) {
1116 ret = -EINVAL; 1408 ret = -EINVAL;
1117 break; 1409 break;
@@ -1119,12 +1411,12 @@ dio200_subdev_8254_config(struct comedi_device *dev, struct comedi_subdevice *s,
1119 data[2] = ret; 1411 data[2] = ret;
1120 break; 1412 break;
1121 case INSN_CONFIG_SET_CLOCK_SRC: 1413 case INSN_CONFIG_SET_CLOCK_SRC:
1122 ret = dio200_set_clock_src(subpriv, chan, data[1]); 1414 ret = dio200_subdev_8254_set_clock_src(dev, s, chan, data[1]);
1123 if (ret < 0) 1415 if (ret < 0)
1124 ret = -EINVAL; 1416 ret = -EINVAL;
1125 break; 1417 break;
1126 case INSN_CONFIG_GET_CLOCK_SRC: 1418 case INSN_CONFIG_GET_CLOCK_SRC:
1127 ret = dio200_get_clock_src(subpriv, chan, &data[2]); 1419 ret = dio200_subdev_8254_get_clock_src(dev, s, chan, &data[2]);
1128 if (ret < 0) { 1420 if (ret < 0) {
1129 ret = -EINVAL; 1421 ret = -EINVAL;
1130 break; 1422 break;
@@ -1141,15 +1433,12 @@ dio200_subdev_8254_config(struct comedi_device *dev, struct comedi_subdevice *s,
1141 1433
1142/* 1434/*
1143 * This function initializes an '8254' counter subdevice. 1435 * This function initializes an '8254' counter subdevice.
1144 *
1145 * Note: iobase is the base address of the board, not the subdevice;
1146 * offset is the offset to the 8254 chip.
1147 */ 1436 */
1148static int 1437static int
1149dio200_subdev_8254_init(struct comedi_device *dev, struct comedi_subdevice *s, 1438dio200_subdev_8254_init(struct comedi_device *dev, struct comedi_subdevice *s,
1150 unsigned long iobase, unsigned offset, 1439 unsigned int offset)
1151 int has_clk_gat_sce)
1152{ 1440{
1441 const struct dio200_layout *layout = dio200_dev_layout(dev);
1153 struct dio200_subdev_8254 *subpriv; 1442 struct dio200_subdev_8254 *subpriv;
1154 unsigned int chan; 1443 unsigned int chan;
1155 1444
@@ -1169,27 +1458,24 @@ dio200_subdev_8254_init(struct comedi_device *dev, struct comedi_subdevice *s,
1169 s->insn_config = dio200_subdev_8254_config; 1458 s->insn_config = dio200_subdev_8254_config;
1170 1459
1171 spin_lock_init(&subpriv->spinlock); 1460 spin_lock_init(&subpriv->spinlock);
1172 subpriv->iobase = offset + iobase; 1461 subpriv->ofs = offset;
1173 subpriv->has_clk_gat_sce = has_clk_gat_sce; 1462 if (layout->has_clk_gat_sce) {
1174 if (has_clk_gat_sce) {
1175 /* Derive CLK_SCE and GAT_SCE register offsets from 1463 /* Derive CLK_SCE and GAT_SCE register offsets from
1176 * 8254 offset. */ 1464 * 8254 offset. */
1177 subpriv->clk_sce_iobase = 1465 subpriv->clk_sce_ofs = DIO200_XCLK_SCE + (offset >> 3);
1178 DIO200_XCLK_SCE + (offset >> 3) + iobase; 1466 subpriv->gat_sce_ofs = DIO200_XGAT_SCE + (offset >> 3);
1179 subpriv->gat_sce_iobase =
1180 DIO200_XGAT_SCE + (offset >> 3) + iobase;
1181 subpriv->which = (offset >> 2) & 1; 1467 subpriv->which = (offset >> 2) & 1;
1182 } 1468 }
1183 1469
1184 /* Initialize channels. */ 1470 /* Initialize channels. */
1185 for (chan = 0; chan < 3; chan++) { 1471 for (chan = 0; chan < 3; chan++) {
1186 i8254_set_mode(subpriv->iobase, 0, chan, 1472 dio200_subdev_8254_set_mode(dev, s, chan,
1187 I8254_MODE0 | I8254_BINARY); 1473 I8254_MODE0 | I8254_BINARY);
1188 if (subpriv->has_clk_gat_sce) { 1474 if (layout->has_clk_gat_sce) {
1189 /* Gate source 0 is VCC (logic 1). */ 1475 /* Gate source 0 is VCC (logic 1). */
1190 dio200_set_gate_src(subpriv, chan, 0); 1476 dio200_subdev_8254_set_gate_src(dev, s, chan, 0);
1191 /* Clock source 0 is the dedicated clock input. */ 1477 /* Clock source 0 is the dedicated clock input. */
1192 dio200_set_clock_src(subpriv, chan, 0); 1478 dio200_subdev_8254_set_clock_src(dev, s, chan, 0);
1193 } 1479 }
1194 } 1480 }
1195 1481
@@ -1207,16 +1493,294 @@ dio200_subdev_8254_cleanup(struct comedi_device *dev,
1207 kfree(subpriv); 1493 kfree(subpriv);
1208} 1494}
1209 1495
1496/*
1497 * This function sets I/O directions for an '8255' DIO subdevice.
1498 */
1499static void dio200_subdev_8255_set_dir(struct comedi_device *dev,
1500 struct comedi_subdevice *s)
1501{
1502 struct dio200_subdev_8255 *subpriv = s->private;
1503 int config;
1504
1505 config = CR_CW;
1506 /* 1 in io_bits indicates output, 1 in config indicates input */
1507 if (!(s->io_bits & 0x0000ff))
1508 config |= CR_A_IO;
1509 if (!(s->io_bits & 0x00ff00))
1510 config |= CR_B_IO;
1511 if (!(s->io_bits & 0x0f0000))
1512 config |= CR_C_LO_IO;
1513 if (!(s->io_bits & 0xf00000))
1514 config |= CR_C_HI_IO;
1515 dio200_write8(dev, subpriv->ofs + 3, config);
1516}
1517
1518/*
1519 * Handle 'insn_bits' for an '8255' DIO subdevice.
1520 */
1521static int dio200_subdev_8255_bits(struct comedi_device *dev,
1522 struct comedi_subdevice *s,
1523 struct comedi_insn *insn, unsigned int *data)
1524{
1525 struct dio200_subdev_8255 *subpriv = s->private;
1526
1527 if (data[0]) {
1528 s->state &= ~data[0];
1529 s->state |= (data[0] & data[1]);
1530 if (data[0] & 0xff)
1531 dio200_write8(dev, subpriv->ofs, s->state & 0xff);
1532 if (data[0] & 0xff00)
1533 dio200_write8(dev, subpriv->ofs + 1,
1534 (s->state >> 8) & 0xff);
1535 if (data[0] & 0xff0000)
1536 dio200_write8(dev, subpriv->ofs + 2,
1537 (s->state >> 16) & 0xff);
1538 }
1539 data[1] = dio200_read8(dev, subpriv->ofs);
1540 data[1] |= dio200_read8(dev, subpriv->ofs + 1) << 8;
1541 data[1] |= dio200_read8(dev, subpriv->ofs + 2) << 16;
1542 return 2;
1543}
1544
1545/*
1546 * Handle 'insn_config' for an '8255' DIO subdevice.
1547 */
1548static int dio200_subdev_8255_config(struct comedi_device *dev,
1549 struct comedi_subdevice *s,
1550 struct comedi_insn *insn,
1551 unsigned int *data)
1552{
1553 unsigned int mask;
1554 unsigned int bits;
1555
1556 mask = 1 << CR_CHAN(insn->chanspec);
1557 if (mask & 0x0000ff)
1558 bits = 0x0000ff;
1559 else if (mask & 0x00ff00)
1560 bits = 0x00ff00;
1561 else if (mask & 0x0f0000)
1562 bits = 0x0f0000;
1563 else
1564 bits = 0xf00000;
1565 switch (data[0]) {
1566 case INSN_CONFIG_DIO_INPUT:
1567 s->io_bits &= ~bits;
1568 break;
1569 case INSN_CONFIG_DIO_OUTPUT:
1570 s->io_bits |= bits;
1571 break;
1572 case INSN_CONFIG_DIO_QUERY:
1573 data[1] = (s->io_bits & bits) ? COMEDI_OUTPUT : COMEDI_INPUT;
1574 return insn->n;
1575 break;
1576 default:
1577 return -EINVAL;
1578 }
1579 dio200_subdev_8255_set_dir(dev, s);
1580 return 1;
1581}
1582
1583/*
1584 * This function initializes an '8255' DIO subdevice.
1585 *
1586 * offset is the offset to the 8255 chip.
1587 */
1588static int dio200_subdev_8255_init(struct comedi_device *dev,
1589 struct comedi_subdevice *s,
1590 unsigned int offset)
1591{
1592 struct dio200_subdev_8255 *subpriv;
1593
1594 subpriv = kzalloc(sizeof(*subpriv), GFP_KERNEL);
1595 if (!subpriv)
1596 return -ENOMEM;
1597 subpriv->ofs = offset;
1598 s->private = subpriv;
1599 s->type = COMEDI_SUBD_DIO;
1600 s->subdev_flags = SDF_READABLE | SDF_WRITABLE;
1601 s->n_chan = 24;
1602 s->range_table = &range_digital;
1603 s->maxdata = 1;
1604 s->insn_bits = dio200_subdev_8255_bits;
1605 s->insn_config = dio200_subdev_8255_config;
1606 s->state = 0;
1607 s->io_bits = 0;
1608 dio200_subdev_8255_set_dir(dev, s);
1609 return 0;
1610}
1611
1612/*
1613 * This function cleans up an '8255' DIO subdevice.
1614 */
1615static void dio200_subdev_8255_cleanup(struct comedi_device *dev,
1616 struct comedi_subdevice *s)
1617{
1618 struct dio200_subdev_8255 *subpriv = s->private;
1619
1620 kfree(subpriv);
1621}
1622
1623/*
1624 * Handle 'insn_read' for a timer subdevice.
1625 */
1626static int dio200_subdev_timer_read(struct comedi_device *dev,
1627 struct comedi_subdevice *s,
1628 struct comedi_insn *insn,
1629 unsigned int *data)
1630{
1631 unsigned int n;
1632
1633 for (n = 0; n < insn->n; n++)
1634 data[n] = dio200_read32(dev, DIO200_TS_COUNT);
1635 return n;
1636}
1637
1638/*
1639 * Reset timer subdevice.
1640 */
1641static void dio200_subdev_timer_reset(struct comedi_device *dev,
1642 struct comedi_subdevice *s)
1643{
1644 unsigned int clock;
1645
1646 clock = dio200_read32(dev, DIO200_TS_CONFIG) & TS_CONFIG_CLK_SRC_MASK;
1647 dio200_write32(dev, DIO200_TS_CONFIG, clock | TS_CONFIG_RESET);
1648 dio200_write32(dev, DIO200_TS_CONFIG, clock);
1649}
1650
1651/*
1652 * Get timer subdevice clock source and period.
1653 */
1654static void dio200_subdev_timer_get_clock_src(struct comedi_device *dev,
1655 struct comedi_subdevice *s,
1656 unsigned int *src,
1657 unsigned int *period)
1658{
1659 unsigned int clk;
1660
1661 clk = dio200_read32(dev, DIO200_TS_CONFIG) & TS_CONFIG_CLK_SRC_MASK;
1662 *src = clk;
1663 *period = (clk < ARRAY_SIZE(ts_clock_period)) ?
1664 ts_clock_period[clk] : 0;
1665}
1666
1667/*
1668 * Set timer subdevice clock source.
1669 */
1670static int dio200_subdev_timer_set_clock_src(struct comedi_device *dev,
1671 struct comedi_subdevice *s,
1672 unsigned int src)
1673{
1674 if (src > TS_CONFIG_MAX_CLK_SRC)
1675 return -EINVAL;
1676 dio200_write32(dev, DIO200_TS_CONFIG, src);
1677 return 0;
1678}
1679
1680/*
1681 * Handle 'insn_config' for a timer subdevice.
1682 */
1683static int dio200_subdev_timer_config(struct comedi_device *dev,
1684 struct comedi_subdevice *s,
1685 struct comedi_insn *insn,
1686 unsigned int *data)
1687{
1688 int ret = 0;
1689
1690 switch (data[0]) {
1691 case INSN_CONFIG_RESET:
1692 dio200_subdev_timer_reset(dev, s);
1693 break;
1694 case INSN_CONFIG_SET_CLOCK_SRC:
1695 ret = dio200_subdev_timer_set_clock_src(dev, s, data[1]);
1696 if (ret < 0)
1697 ret = -EINVAL;
1698 break;
1699 case INSN_CONFIG_GET_CLOCK_SRC:
1700 dio200_subdev_timer_get_clock_src(dev, s, &data[1], &data[2]);
1701 break;
1702 default:
1703 ret = -EINVAL;
1704 break;
1705 }
1706 return ret < 0 ? ret : insn->n;
1707}
1708
1709/*
1710 * This function initializes a timer subdevice.
1711 *
1712 * Uses the timestamp timer registers. There is only one timestamp timer.
1713 */
1714static int dio200_subdev_timer_init(struct comedi_device *dev,
1715 struct comedi_subdevice *s)
1716{
1717 s->type = COMEDI_SUBD_TIMER;
1718 s->subdev_flags = SDF_READABLE | SDF_LSAMPL;
1719 s->n_chan = 1;
1720 s->maxdata = 0xFFFFFFFF;
1721 s->insn_read = dio200_subdev_timer_read;
1722 s->insn_config = dio200_subdev_timer_config;
1723 return 0;
1724}
1725
1726/*
1727 * This function cleans up a timer subdevice.
1728 */
1729static void dio200_subdev_timer_cleanup(struct comedi_device *dev,
1730 struct comedi_subdevice *s)
1731{
1732 /* Nothing to do. */
1733}
1734
1735/*
1736 * This function does some special set-up for the PCIe boards
1737 * PCIe215, PCIe236, PCIe296.
1738 */
1739static int dio200_pcie_board_setup(struct comedi_device *dev)
1740{
1741 struct pci_dev *pcidev = comedi_to_pci_dev(dev);
1742 void __iomem *brbase;
1743 resource_size_t brlen;
1744
1745 /*
1746 * The board uses Altera Cyclone IV with PCI-Express hard IP.
1747 * The FPGA configuration has the PCI-Express Avalon-MM Bridge
1748 * Control registers in PCI BAR 0, offset 0, and the length of
1749 * these registers is 0x4000.
1750 *
1751 * We need to write 0x80 to the "Avalon-MM to PCI-Express Interrupt
1752 * Enable" register at offset 0x50 to allow generation of PCIe
1753 * interrupts when RXmlrq_i is asserted in the SOPC Builder system.
1754 */
1755 brlen = pci_resource_len(pcidev, 0);
1756 if (brlen < 0x4000 ||
1757 !(pci_resource_flags(pcidev, 0) & IORESOURCE_MEM)) {
1758 dev_err(dev->class_dev, "error! bad PCI region!\n");
1759 return -EINVAL;
1760 }
1761 brbase = ioremap_nocache(pci_resource_start(pcidev, 0), brlen);
1762 if (!brbase) {
1763 dev_err(dev->class_dev, "error! failed to map registers!\n");
1764 return -ENOMEM;
1765 }
1766 writel(0x80, brbase + 0x50);
1767 iounmap(brbase);
1768 /* Enable "enhanced" features of board. */
1769 dio200_write8(dev, DIO200_ENHANCE, 1);
1770 return 0;
1771}
1772
1210static void dio200_report_attach(struct comedi_device *dev, unsigned int irq) 1773static void dio200_report_attach(struct comedi_device *dev, unsigned int irq)
1211{ 1774{
1212 const struct dio200_board *thisboard = comedi_board(dev); 1775 const struct dio200_board *thisboard = comedi_board(dev);
1776 struct dio200_private *devpriv = dev->private;
1213 struct pci_dev *pcidev = comedi_to_pci_dev(dev); 1777 struct pci_dev *pcidev = comedi_to_pci_dev(dev);
1214 char tmpbuf[60]; 1778 char tmpbuf[60];
1215 int tmplen; 1779 int tmplen;
1216 1780
1217 if (is_isa_board(thisboard)) 1781 if (is_isa_board(thisboard))
1218 tmplen = scnprintf(tmpbuf, sizeof(tmpbuf), 1782 tmplen = scnprintf(tmpbuf, sizeof(tmpbuf),
1219 "(base %#lx) ", dev->iobase); 1783 "(base %#lx) ", devpriv->io.u.iobase);
1220 else if (is_pci_board(thisboard)) 1784 else if (is_pci_board(thisboard))
1221 tmplen = scnprintf(tmpbuf, sizeof(tmpbuf), 1785 tmplen = scnprintf(tmpbuf, sizeof(tmpbuf),
1222 "(pci %s) ", pci_name(pcidev)); 1786 "(pci %s) ", pci_name(pcidev));
@@ -1232,20 +1796,18 @@ static void dio200_report_attach(struct comedi_device *dev, unsigned int irq)
1232 dev_info(dev->class_dev, "%s %sattached\n", dev->board_name, tmpbuf); 1796 dev_info(dev->class_dev, "%s %sattached\n", dev->board_name, tmpbuf);
1233} 1797}
1234 1798
1235static int dio200_common_attach(struct comedi_device *dev, unsigned long iobase, 1799static int dio200_common_attach(struct comedi_device *dev, unsigned int irq,
1236 unsigned int irq, unsigned long req_irq_flags) 1800 unsigned long req_irq_flags)
1237{ 1801{
1238 const struct dio200_board *thisboard = comedi_board(dev); 1802 const struct dio200_board *thisboard = comedi_board(dev);
1239 struct dio200_private *devpriv = dev->private; 1803 struct dio200_private *devpriv = dev->private;
1240 const struct dio200_layout_struct *layout = 1804 const struct dio200_layout *layout = dio200_board_layout(thisboard);
1241 &dio200_layouts[thisboard->layout];
1242 struct comedi_subdevice *s; 1805 struct comedi_subdevice *s;
1243 int sdx; 1806 int sdx;
1244 unsigned int n; 1807 unsigned int n;
1245 int ret; 1808 int ret;
1246 1809
1247 devpriv->intr_sd = -1; 1810 devpriv->intr_sd = -1;
1248 dev->iobase = iobase;
1249 dev->board_name = thisboard->name; 1811 dev->board_name = thisboard->name;
1250 1812
1251 ret = comedi_alloc_subdevices(dev, layout->n_subdevs); 1813 ret = comedi_alloc_subdevices(dev, layout->n_subdevs);
@@ -1257,16 +1819,15 @@ static int dio200_common_attach(struct comedi_device *dev, unsigned long iobase,
1257 switch (layout->sdtype[n]) { 1819 switch (layout->sdtype[n]) {
1258 case sd_8254: 1820 case sd_8254:
1259 /* counter subdevice (8254) */ 1821 /* counter subdevice (8254) */
1260 ret = dio200_subdev_8254_init(dev, s, iobase, 1822 ret = dio200_subdev_8254_init(dev, s,
1261 layout->sdinfo[n], 1823 layout->sdinfo[n]);
1262 layout->has_clk_gat_sce);
1263 if (ret < 0) 1824 if (ret < 0)
1264 return ret; 1825 return ret;
1265 break; 1826 break;
1266 case sd_8255: 1827 case sd_8255:
1267 /* digital i/o subdevice (8255) */ 1828 /* digital i/o subdevice (8255) */
1268 ret = subdev_8255_init(dev, s, NULL, 1829 ret = dio200_subdev_8255_init(dev, s,
1269 iobase + layout->sdinfo[n]); 1830 layout->sdinfo[n]);
1270 if (ret < 0) 1831 if (ret < 0)
1271 return ret; 1832 return ret;
1272 break; 1833 break;
@@ -1274,11 +1835,9 @@ static int dio200_common_attach(struct comedi_device *dev, unsigned long iobase,
1274 /* 'INTERRUPT' subdevice */ 1835 /* 'INTERRUPT' subdevice */
1275 if (irq) { 1836 if (irq) {
1276 ret = dio200_subdev_intr_init(dev, s, 1837 ret = dio200_subdev_intr_init(dev, s,
1277 iobase +
1278 DIO200_INT_SCE, 1838 DIO200_INT_SCE,
1279 layout->sdinfo[n], 1839 layout->sdinfo[n]
1280 layout-> 1840 );
1281 has_int_sce);
1282 if (ret < 0) 1841 if (ret < 0)
1283 return ret; 1842 return ret;
1284 devpriv->intr_sd = n; 1843 devpriv->intr_sd = n;
@@ -1286,6 +1845,16 @@ static int dio200_common_attach(struct comedi_device *dev, unsigned long iobase,
1286 s->type = COMEDI_SUBD_UNUSED; 1845 s->type = COMEDI_SUBD_UNUSED;
1287 } 1846 }
1288 break; 1847 break;
1848 case sd_timer:
1849 /* Only on PCIe boards. */
1850 if (DO_PCI) {
1851 ret = dio200_subdev_timer_init(dev, s);
1852 if (ret < 0)
1853 return ret;
1854 } else {
1855 s->type = COMEDI_SUBD_UNUSED;
1856 }
1857 break;
1289 default: 1858 default:
1290 s->type = COMEDI_SUBD_UNUSED; 1859 s->type = COMEDI_SUBD_UNUSED;
1291 break; 1860 break;
@@ -1307,24 +1876,6 @@ static int dio200_common_attach(struct comedi_device *dev, unsigned long iobase,
1307 return 1; 1876 return 1;
1308} 1877}
1309 1878
1310static int dio200_pci_common_attach(struct comedi_device *dev,
1311 struct pci_dev *pci_dev)
1312{
1313 unsigned long iobase;
1314 int ret;
1315
1316 comedi_set_hw_dev(dev, &pci_dev->dev);
1317
1318 ret = comedi_pci_enable(pci_dev, DIO200_DRIVER_NAME);
1319 if (ret < 0) {
1320 dev_err(dev->class_dev,
1321 "error! cannot enable PCI device and request regions!\n");
1322 return ret;
1323 }
1324 iobase = pci_resource_start(pci_dev, 2);
1325 return dio200_common_attach(dev, iobase, pci_dev->irq, IRQF_SHARED);
1326}
1327
1328/* 1879/*
1329 * Attach is called by the Comedi core to configure the driver 1880 * Attach is called by the Comedi core to configure the driver
1330 * for a particular board. If you specified a board_name array 1881 * for a particular board. If you specified a board_name array
@@ -1334,15 +1885,15 @@ static int dio200_pci_common_attach(struct comedi_device *dev,
1334static int dio200_attach(struct comedi_device *dev, struct comedi_devconfig *it) 1885static int dio200_attach(struct comedi_device *dev, struct comedi_devconfig *it)
1335{ 1886{
1336 const struct dio200_board *thisboard = comedi_board(dev); 1887 const struct dio200_board *thisboard = comedi_board(dev);
1888 struct dio200_private *devpriv;
1337 int ret; 1889 int ret;
1338 1890
1339 dev_info(dev->class_dev, DIO200_DRIVER_NAME ": attach\n"); 1891 dev_info(dev->class_dev, DIO200_DRIVER_NAME ": attach\n");
1340 1892
1341 ret = alloc_private(dev, sizeof(struct dio200_private)); 1893 devpriv = kzalloc(sizeof(*devpriv), GFP_KERNEL);
1342 if (ret < 0) { 1894 if (!devpriv)
1343 dev_err(dev->class_dev, "error! out of memory!\n"); 1895 return -ENOMEM;
1344 return ret; 1896 dev->private = devpriv;
1345 }
1346 1897
1347 /* Process options and reserve resources according to bus type. */ 1898 /* Process options and reserve resources according to bus type. */
1348 if (is_isa_board(thisboard)) { 1899 if (is_isa_board(thisboard)) {
@@ -1351,17 +1902,17 @@ static int dio200_attach(struct comedi_device *dev, struct comedi_devconfig *it)
1351 1902
1352 iobase = it->options[0]; 1903 iobase = it->options[0];
1353 irq = it->options[1]; 1904 irq = it->options[1];
1354 ret = dio200_request_region(dev, iobase, DIO200_IO_SIZE); 1905 ret = dio200_request_region(dev, iobase, thisboard->mainsize);
1355 if (ret < 0) 1906 if (ret < 0)
1356 return ret; 1907 return ret;
1357 return dio200_common_attach(dev, iobase, irq, 0); 1908 devpriv->io.u.iobase = iobase;
1909 devpriv->io.regtype = io_regtype;
1910 return dio200_common_attach(dev, irq, 0);
1358 } else if (is_pci_board(thisboard)) { 1911 } else if (is_pci_board(thisboard)) {
1359 struct pci_dev *pci_dev; 1912 dev_err(dev->class_dev,
1360 1913 "Manual configuration of PCI board '%s' is not supported\n",
1361 pci_dev = dio200_find_pci_dev(dev, it); 1914 thisboard->name);
1362 if (!pci_dev) 1915 return -EIO;
1363 return -EIO;
1364 return dio200_pci_common_attach(dev, pci_dev);
1365 } else { 1916 } else {
1366 dev_err(dev->class_dev, DIO200_DRIVER_NAME 1917 dev_err(dev->class_dev, DIO200_DRIVER_NAME
1367 ": BUG! cannot determine board type!\n"); 1918 ": BUG! cannot determine board type!\n");
@@ -1370,13 +1921,18 @@ static int dio200_attach(struct comedi_device *dev, struct comedi_devconfig *it)
1370} 1921}
1371 1922
1372/* 1923/*
1373 * The attach_pci hook (if non-NULL) is called at PCI probe time in preference 1924 * The auto_attach hook is called at PCI probe time via
1374 * to the "manual" attach hook. dev->board_ptr is NULL on entry. There should 1925 * comedi_pci_auto_config(). dev->board_ptr is NULL on entry.
1375 * be a board entry matching the supplied PCI device. 1926 * There should be a board entry matching the supplied PCI device.
1376 */ 1927 */
1377static int __devinit dio200_attach_pci(struct comedi_device *dev, 1928static int dio200_auto_attach(struct comedi_device *dev,
1378 struct pci_dev *pci_dev) 1929 unsigned long context_unused)
1379{ 1930{
1931 struct pci_dev *pci_dev = comedi_to_pci_dev(dev);
1932 const struct dio200_board *thisboard;
1933 struct dio200_private *devpriv;
1934 resource_size_t base, len;
1935 unsigned int bar;
1380 int ret; 1936 int ret;
1381 1937
1382 if (!DO_PCI) 1938 if (!DO_PCI)
@@ -1384,38 +1940,71 @@ static int __devinit dio200_attach_pci(struct comedi_device *dev,
1384 1940
1385 dev_info(dev->class_dev, DIO200_DRIVER_NAME ": attach pci %s\n", 1941 dev_info(dev->class_dev, DIO200_DRIVER_NAME ": attach pci %s\n",
1386 pci_name(pci_dev)); 1942 pci_name(pci_dev));
1387 ret = alloc_private(dev, sizeof(struct dio200_private)); 1943
1388 if (ret < 0) { 1944 devpriv = kzalloc(sizeof(*devpriv), GFP_KERNEL);
1389 dev_err(dev->class_dev, "error! out of memory!\n"); 1945 if (!devpriv)
1390 return ret; 1946 return -ENOMEM;
1391 } 1947 dev->private = devpriv;
1948
1392 dev->board_ptr = dio200_find_pci_board(pci_dev); 1949 dev->board_ptr = dio200_find_pci_board(pci_dev);
1393 if (dev->board_ptr == NULL) { 1950 if (dev->board_ptr == NULL) {
1394 dev_err(dev->class_dev, "BUG! cannot determine board type!\n"); 1951 dev_err(dev->class_dev, "BUG! cannot determine board type!\n");
1395 return -EINVAL; 1952 return -EINVAL;
1396 } 1953 }
1397 /* 1954 thisboard = comedi_board(dev);
1398 * Need to 'get' the PCI device to match the 'put' in dio200_detach(). 1955 ret = comedi_pci_enable(pci_dev, DIO200_DRIVER_NAME);
1399 * TODO: Remove the pci_dev_get() and matching pci_dev_put() once 1956 if (ret < 0) {
1400 * support for manual attachment of PCI devices via dio200_attach() 1957 dev_err(dev->class_dev,
1401 * has been removed. 1958 "error! cannot enable PCI device and request regions!\n");
1402 */ 1959 return ret;
1403 pci_dev_get(pci_dev); 1960 }
1404 return dio200_pci_common_attach(dev, pci_dev); 1961 bar = thisboard->mainbar;
1962 base = pci_resource_start(pci_dev, bar);
1963 len = pci_resource_len(pci_dev, bar);
1964 if (len < thisboard->mainsize) {
1965 dev_err(dev->class_dev, "error! PCI region size too small!\n");
1966 return -EINVAL;
1967 }
1968 if ((pci_resource_flags(pci_dev, bar) & IORESOURCE_MEM) != 0) {
1969 devpriv->io.u.membase = ioremap_nocache(base, len);
1970 if (!devpriv->io.u.membase) {
1971 dev_err(dev->class_dev,
1972 "error! cannot remap registers\n");
1973 return -ENOMEM;
1974 }
1975 devpriv->io.regtype = mmio_regtype;
1976 } else {
1977 devpriv->io.u.iobase = (unsigned long)base;
1978 devpriv->io.regtype = io_regtype;
1979 }
1980 switch (thisboard->model)
1981 {
1982 case pcie215_model:
1983 case pcie236_model:
1984 case pcie296_model:
1985 ret = dio200_pcie_board_setup(dev);
1986 if (ret < 0)
1987 return ret;
1988 break;
1989 default:
1990 break;
1991 }
1992 return dio200_common_attach(dev, pci_dev->irq, IRQF_SHARED);
1405} 1993}
1406 1994
1407static void dio200_detach(struct comedi_device *dev) 1995static void dio200_detach(struct comedi_device *dev)
1408{ 1996{
1409 const struct dio200_board *thisboard = comedi_board(dev); 1997 const struct dio200_board *thisboard = comedi_board(dev);
1410 const struct dio200_layout_struct *layout; 1998 struct dio200_private *devpriv = dev->private;
1999 const struct dio200_layout *layout;
1411 unsigned n; 2000 unsigned n;
1412 2001
1413 if (!thisboard) 2002 if (!thisboard || !devpriv)
1414 return; 2003 return;
1415 if (dev->irq) 2004 if (dev->irq)
1416 free_irq(dev->irq, dev); 2005 free_irq(dev->irq, dev);
1417 if (dev->subdevices) { 2006 if (dev->subdevices) {
1418 layout = &dio200_layouts[thisboard->layout]; 2007 layout = dio200_board_layout(thisboard);
1419 for (n = 0; n < dev->n_subdevices; n++) { 2008 for (n = 0; n < dev->n_subdevices; n++) {
1420 struct comedi_subdevice *s = &dev->subdevices[n]; 2009 struct comedi_subdevice *s = &dev->subdevices[n];
1421 switch (layout->sdtype[n]) { 2010 switch (layout->sdtype[n]) {
@@ -1423,25 +2012,33 @@ static void dio200_detach(struct comedi_device *dev)
1423 dio200_subdev_8254_cleanup(dev, s); 2012 dio200_subdev_8254_cleanup(dev, s);
1424 break; 2013 break;
1425 case sd_8255: 2014 case sd_8255:
1426 subdev_8255_cleanup(dev, s); 2015 dio200_subdev_8255_cleanup(dev, s);
1427 break; 2016 break;
1428 case sd_intr: 2017 case sd_intr:
1429 dio200_subdev_intr_cleanup(dev, s); 2018 dio200_subdev_intr_cleanup(dev, s);
1430 break; 2019 break;
2020 case sd_timer:
2021 /* Only on PCIe boards. */
2022 if (DO_PCI)
2023 dio200_subdev_timer_cleanup(dev, s);
2024 break;
1431 default: 2025 default:
1432 break; 2026 break;
1433 } 2027 }
1434 } 2028 }
1435 } 2029 }
1436 if (is_isa_board(thisboard)) { 2030 if (is_isa_board(thisboard)) {
1437 if (dev->iobase) 2031 if (devpriv->io.regtype == io_regtype)
1438 release_region(dev->iobase, DIO200_IO_SIZE); 2032 release_region(devpriv->io.u.iobase,
2033 thisboard->mainsize);
1439 } else if (is_pci_board(thisboard)) { 2034 } else if (is_pci_board(thisboard)) {
1440 struct pci_dev *pcidev = comedi_to_pci_dev(dev); 2035 struct pci_dev *pcidev = comedi_to_pci_dev(dev);
1441 if (pcidev) { 2036 if (pcidev) {
1442 if (dev->iobase) 2037 if (devpriv->io.regtype != no_regtype) {
2038 if (devpriv->io.regtype == mmio_regtype)
2039 iounmap(devpriv->io.u.membase);
1443 comedi_pci_disable(pcidev); 2040 comedi_pci_disable(pcidev);
1444 pci_dev_put(pcidev); 2041 }
1445 } 2042 }
1446 } 2043 }
1447} 2044}
@@ -1456,7 +2053,7 @@ static struct comedi_driver amplc_dio200_driver = {
1456 .driver_name = DIO200_DRIVER_NAME, 2053 .driver_name = DIO200_DRIVER_NAME,
1457 .module = THIS_MODULE, 2054 .module = THIS_MODULE,
1458 .attach = dio200_attach, 2055 .attach = dio200_attach,
1459 .attach_pci = dio200_attach_pci, 2056 .auto_attach = dio200_auto_attach,
1460 .detach = dio200_detach, 2057 .detach = dio200_detach,
1461 .board_name = &dio200_boards[0].name, 2058 .board_name = &dio200_boards[0].name,
1462 .offset = sizeof(struct dio200_board), 2059 .offset = sizeof(struct dio200_board),
@@ -1467,19 +2064,22 @@ static struct comedi_driver amplc_dio200_driver = {
1467static DEFINE_PCI_DEVICE_TABLE(dio200_pci_table) = { 2064static DEFINE_PCI_DEVICE_TABLE(dio200_pci_table) = {
1468 { PCI_DEVICE(PCI_VENDOR_ID_AMPLICON, PCI_DEVICE_ID_AMPLICON_PCI215) }, 2065 { PCI_DEVICE(PCI_VENDOR_ID_AMPLICON, PCI_DEVICE_ID_AMPLICON_PCI215) },
1469 { PCI_DEVICE(PCI_VENDOR_ID_AMPLICON, PCI_DEVICE_ID_AMPLICON_PCI272) }, 2066 { PCI_DEVICE(PCI_VENDOR_ID_AMPLICON, PCI_DEVICE_ID_AMPLICON_PCI272) },
2067 { PCI_DEVICE(PCI_VENDOR_ID_AMPLICON, PCI_DEVICE_ID_AMPLICON_PCIE236) },
2068 { PCI_DEVICE(PCI_VENDOR_ID_AMPLICON, PCI_DEVICE_ID_AMPLICON_PCIE215) },
2069 { PCI_DEVICE(PCI_VENDOR_ID_AMPLICON, PCI_DEVICE_ID_AMPLICON_PCIE296) },
1470 {0} 2070 {0}
1471}; 2071};
1472 2072
1473MODULE_DEVICE_TABLE(pci, dio200_pci_table); 2073MODULE_DEVICE_TABLE(pci, dio200_pci_table);
1474 2074
1475static int __devinit amplc_dio200_pci_probe(struct pci_dev *dev, 2075static int amplc_dio200_pci_probe(struct pci_dev *dev,
1476 const struct pci_device_id 2076 const struct pci_device_id
1477 *ent) 2077 *ent)
1478{ 2078{
1479 return comedi_pci_auto_config(dev, &amplc_dio200_driver); 2079 return comedi_pci_auto_config(dev, &amplc_dio200_driver);
1480} 2080}
1481 2081
1482static void __devexit amplc_dio200_pci_remove(struct pci_dev *dev) 2082static void amplc_dio200_pci_remove(struct pci_dev *dev)
1483{ 2083{
1484 comedi_pci_auto_unconfig(dev); 2084 comedi_pci_auto_unconfig(dev);
1485} 2085}
@@ -1488,7 +2088,7 @@ static struct pci_driver amplc_dio200_pci_driver = {
1488 .name = DIO200_DRIVER_NAME, 2088 .name = DIO200_DRIVER_NAME,
1489 .id_table = dio200_pci_table, 2089 .id_table = dio200_pci_table,
1490 .probe = &amplc_dio200_pci_probe, 2090 .probe = &amplc_dio200_pci_probe,
1491 .remove = __devexit_p(&amplc_dio200_pci_remove) 2091 .remove = &amplc_dio200_pci_remove
1492}; 2092};
1493module_comedi_pci_driver(amplc_dio200_driver, amplc_dio200_pci_driver); 2093module_comedi_pci_driver(amplc_dio200_driver, amplc_dio200_pci_driver);
1494#else 2094#else
diff --git a/drivers/staging/comedi/drivers/amplc_pc236.c b/drivers/staging/comedi/drivers/amplc_pc236.c
index 4e4f3c15df87..289835419577 100644
--- a/drivers/staging/comedi/drivers/amplc_pc236.c
+++ b/drivers/staging/comedi/drivers/amplc_pc236.c
@@ -66,7 +66,6 @@ unused.
66#define DO_PCI IS_ENABLED(CONFIG_COMEDI_AMPLC_PC236_PCI) 66#define DO_PCI IS_ENABLED(CONFIG_COMEDI_AMPLC_PC236_PCI)
67 67
68/* PCI236 PCI configuration register information */ 68/* PCI236 PCI configuration register information */
69#define PCI_VENDOR_ID_AMPLICON 0x14dc
70#define PCI_DEVICE_ID_AMPLICON_PCI236 0x0009 69#define PCI_DEVICE_ID_AMPLICON_PCI236 0x0009
71#define PCI_DEVICE_ID_INVALID 0xffff 70#define PCI_DEVICE_ID_INVALID 0xffff
72 71
@@ -332,28 +331,13 @@ static int pc236_intr_cmdtest(struct comedi_device *dev,
332 if (err) 331 if (err)
333 return 2; 332 return 2;
334 333
335 /* step 3: */ 334 /* Step 3: check it arguments are trivially valid */
336 335
337 if (cmd->start_arg != 0) { 336 err |= cfc_check_trigger_arg_is(&cmd->start_arg, 0);
338 cmd->start_arg = 0; 337 err |= cfc_check_trigger_arg_is(&cmd->scan_begin_arg, 0);
339 err++; 338 err |= cfc_check_trigger_arg_is(&cmd->convert_arg, 0);
340 } 339 err |= cfc_check_trigger_arg_is(&cmd->scan_end_arg, 1);
341 if (cmd->scan_begin_arg != 0) { 340 err |= cfc_check_trigger_arg_is(&cmd->stop_arg, 0);
342 cmd->scan_begin_arg = 0;
343 err++;
344 }
345 if (cmd->convert_arg != 0) {
346 cmd->convert_arg = 0;
347 err++;
348 }
349 if (cmd->scan_end_arg != 1) {
350 cmd->scan_end_arg = 1;
351 err++;
352 }
353 if (cmd->stop_arg != 0) {
354 cmd->stop_arg = 0;
355 err++;
356 }
357 341
358 if (err) 342 if (err)
359 return 3; 343 return 3;
@@ -505,14 +489,16 @@ static int pc236_pci_common_attach(struct comedi_device *dev,
505static int pc236_attach(struct comedi_device *dev, struct comedi_devconfig *it) 489static int pc236_attach(struct comedi_device *dev, struct comedi_devconfig *it)
506{ 490{
507 const struct pc236_board *thisboard = comedi_board(dev); 491 const struct pc236_board *thisboard = comedi_board(dev);
492 struct pc236_private *devpriv;
508 int ret; 493 int ret;
509 494
510 dev_info(dev->class_dev, PC236_DRIVER_NAME ": attach\n"); 495 dev_info(dev->class_dev, PC236_DRIVER_NAME ": attach\n");
511 ret = alloc_private(dev, sizeof(struct pc236_private)); 496
512 if (ret < 0) { 497 devpriv = kzalloc(sizeof(*devpriv), GFP_KERNEL);
513 dev_err(dev->class_dev, "error! out of memory!\n"); 498 if (!devpriv)
514 return ret; 499 return -ENOMEM;
515 } 500 dev->private = devpriv;
501
516 /* Process options according to bus type. */ 502 /* Process options according to bus type. */
517 if (is_isa_board(thisboard)) { 503 if (is_isa_board(thisboard)) {
518 unsigned long iobase = it->options[0]; 504 unsigned long iobase = it->options[0];
@@ -536,25 +522,27 @@ static int pc236_attach(struct comedi_device *dev, struct comedi_devconfig *it)
536} 522}
537 523
538/* 524/*
539 * The attach_pci hook (if non-NULL) is called at PCI probe time in preference 525 * The auto_attach hook is called at PCI probe time via
540 * to the "manual" attach hook. dev->board_ptr is NULL on entry. There should 526 * comedi_pci_auto_config(). dev->board_ptr is NULL on entry.
541 * be a board entry matching the supplied PCI device. 527 * There should be a board entry matching the supplied PCI device.
542 */ 528 */
543static int __devinit pc236_attach_pci(struct comedi_device *dev, 529static int pc236_auto_attach(struct comedi_device *dev,
544 struct pci_dev *pci_dev) 530 unsigned long context_unused)
545{ 531{
546 int ret; 532 struct pci_dev *pci_dev = comedi_to_pci_dev(dev);
533 struct pc236_private *devpriv;
547 534
548 if (!DO_PCI) 535 if (!DO_PCI)
549 return -EINVAL; 536 return -EINVAL;
550 537
551 dev_info(dev->class_dev, PC236_DRIVER_NAME ": attach pci %s\n", 538 dev_info(dev->class_dev, PC236_DRIVER_NAME ": attach pci %s\n",
552 pci_name(pci_dev)); 539 pci_name(pci_dev));
553 ret = alloc_private(dev, sizeof(struct pc236_private)); 540
554 if (ret < 0) { 541 devpriv = kzalloc(sizeof(*devpriv), GFP_KERNEL);
555 dev_err(dev->class_dev, "error! out of memory!\n"); 542 if (!devpriv)
556 return ret; 543 return -ENOMEM;
557 } 544 dev->private = devpriv;
545
558 dev->board_ptr = pc236_find_pci_board(pci_dev); 546 dev->board_ptr = pc236_find_pci_board(pci_dev);
559 if (dev->board_ptr == NULL) { 547 if (dev->board_ptr == NULL) {
560 dev_err(dev->class_dev, "BUG! cannot determine board type!\n"); 548 dev_err(dev->class_dev, "BUG! cannot determine board type!\n");
@@ -605,7 +593,7 @@ static struct comedi_driver amplc_pc236_driver = {
605 .driver_name = PC236_DRIVER_NAME, 593 .driver_name = PC236_DRIVER_NAME,
606 .module = THIS_MODULE, 594 .module = THIS_MODULE,
607 .attach = pc236_attach, 595 .attach = pc236_attach,
608 .attach_pci = pc236_attach_pci, 596 .auto_attach = pc236_auto_attach,
609 .detach = pc236_detach, 597 .detach = pc236_detach,
610 .board_name = &pc236_boards[0].name, 598 .board_name = &pc236_boards[0].name,
611 .offset = sizeof(struct pc236_board), 599 .offset = sizeof(struct pc236_board),
@@ -620,13 +608,13 @@ static DEFINE_PCI_DEVICE_TABLE(pc236_pci_table) = {
620 608
621MODULE_DEVICE_TABLE(pci, pc236_pci_table); 609MODULE_DEVICE_TABLE(pci, pc236_pci_table);
622 610
623static int __devinit amplc_pc236_pci_probe(struct pci_dev *dev, 611static int amplc_pc236_pci_probe(struct pci_dev *dev,
624 const struct pci_device_id *ent) 612 const struct pci_device_id *ent)
625{ 613{
626 return comedi_pci_auto_config(dev, &amplc_pc236_driver); 614 return comedi_pci_auto_config(dev, &amplc_pc236_driver);
627} 615}
628 616
629static void __devexit amplc_pc236_pci_remove(struct pci_dev *dev) 617static void amplc_pc236_pci_remove(struct pci_dev *dev)
630{ 618{
631 comedi_pci_auto_unconfig(dev); 619 comedi_pci_auto_unconfig(dev);
632} 620}
@@ -635,7 +623,7 @@ static struct pci_driver amplc_pc236_pci_driver = {
635 .name = PC236_DRIVER_NAME, 623 .name = PC236_DRIVER_NAME,
636 .id_table = pc236_pci_table, 624 .id_table = pc236_pci_table,
637 .probe = &amplc_pc236_pci_probe, 625 .probe = &amplc_pc236_pci_probe,
638 .remove = __devexit_p(&amplc_pc236_pci_remove) 626 .remove = &amplc_pc236_pci_remove
639}; 627};
640 628
641module_comedi_pci_driver(amplc_pc236_driver, amplc_pc236_pci_driver); 629module_comedi_pci_driver(amplc_pc236_driver, amplc_pc236_pci_driver);
diff --git a/drivers/staging/comedi/drivers/amplc_pc263.c b/drivers/staging/comedi/drivers/amplc_pc263.c
index d0a4c441228b..dfbff77cd795 100644
--- a/drivers/staging/comedi/drivers/amplc_pc263.c
+++ b/drivers/staging/comedi/drivers/amplc_pc263.c
@@ -52,7 +52,6 @@ The state of the outputs can be read.
52#define DO_PCI IS_ENABLED(CONFIG_COMEDI_AMPLC_PC263_PCI) 52#define DO_PCI IS_ENABLED(CONFIG_COMEDI_AMPLC_PC263_PCI)
53 53
54/* PCI263 PCI configuration register information */ 54/* PCI263 PCI configuration register information */
55#define PCI_VENDOR_ID_AMPLICON 0x14dc
56#define PCI_DEVICE_ID_AMPLICON_PCI263 0x000c 55#define PCI_DEVICE_ID_AMPLICON_PCI263 0x000c
57#define PCI_DEVICE_ID_INVALID 0xffff 56#define PCI_DEVICE_ID_INVALID 0xffff
58 57
@@ -291,17 +290,21 @@ static int pc263_attach(struct comedi_device *dev, struct comedi_devconfig *it)
291 return -EINVAL; 290 return -EINVAL;
292 } 291 }
293} 292}
293
294/* 294/*
295 * The attach_pci hook (if non-NULL) is called at PCI probe time in preference 295 * The auto_attach hook is called at PCI probe time via
296 * to the "manual" attach hook. dev->board_ptr is NULL on entry. There should 296 * comedi_pci_auto_config(). dev->board_ptr is NULL on entry.
297 * be a board entry matching the supplied PCI device. 297 * There should be a board entry matching the supplied PCI device.
298 */ 298 */
299static int __devinit pc263_attach_pci(struct comedi_device *dev, 299static int pc263_auto_attach(struct comedi_device *dev,
300 struct pci_dev *pci_dev) 300 unsigned long context_unused)
301{ 301{
302 struct pci_dev *pci_dev;
303
302 if (!DO_PCI) 304 if (!DO_PCI)
303 return -EINVAL; 305 return -EINVAL;
304 306
307 pci_dev = comedi_to_pci_dev(dev);
305 dev_info(dev->class_dev, PC263_DRIVER_NAME ": attach pci %s\n", 308 dev_info(dev->class_dev, PC263_DRIVER_NAME ": attach pci %s\n",
306 pci_name(pci_dev)); 309 pci_name(pci_dev));
307 dev->board_ptr = pc263_find_pci_board(pci_dev); 310 dev->board_ptr = pc263_find_pci_board(pci_dev);
@@ -348,7 +351,7 @@ static struct comedi_driver amplc_pc263_driver = {
348 .driver_name = PC263_DRIVER_NAME, 351 .driver_name = PC263_DRIVER_NAME,
349 .module = THIS_MODULE, 352 .module = THIS_MODULE,
350 .attach = pc263_attach, 353 .attach = pc263_attach,
351 .attach_pci = pc263_attach_pci, 354 .auto_attach = pc263_auto_attach,
352 .detach = pc263_detach, 355 .detach = pc263_detach,
353 .board_name = &pc263_boards[0].name, 356 .board_name = &pc263_boards[0].name,
354 .offset = sizeof(struct pc263_board), 357 .offset = sizeof(struct pc263_board),
@@ -362,14 +365,14 @@ static DEFINE_PCI_DEVICE_TABLE(pc263_pci_table) = {
362}; 365};
363MODULE_DEVICE_TABLE(pci, pc263_pci_table); 366MODULE_DEVICE_TABLE(pci, pc263_pci_table);
364 367
365static int __devinit amplc_pc263_pci_probe(struct pci_dev *dev, 368static int amplc_pc263_pci_probe(struct pci_dev *dev,
366 const struct pci_device_id 369 const struct pci_device_id
367 *ent) 370 *ent)
368{ 371{
369 return comedi_pci_auto_config(dev, &amplc_pc263_driver); 372 return comedi_pci_auto_config(dev, &amplc_pc263_driver);
370} 373}
371 374
372static void __devexit amplc_pc263_pci_remove(struct pci_dev *dev) 375static void amplc_pc263_pci_remove(struct pci_dev *dev)
373{ 376{
374 comedi_pci_auto_unconfig(dev); 377 comedi_pci_auto_unconfig(dev);
375} 378}
@@ -378,7 +381,7 @@ static struct pci_driver amplc_pc263_pci_driver = {
378 .name = PC263_DRIVER_NAME, 381 .name = PC263_DRIVER_NAME,
379 .id_table = pc263_pci_table, 382 .id_table = pc263_pci_table,
380 .probe = &amplc_pc263_pci_probe, 383 .probe = &amplc_pc263_pci_probe,
381 .remove = __devexit_p(&amplc_pc263_pci_remove) 384 .remove = &amplc_pc263_pci_remove
382}; 385};
383module_comedi_pci_driver(amplc_pc263_driver, amplc_pc263_pci_driver); 386module_comedi_pci_driver(amplc_pc263_driver, amplc_pc263_pci_driver);
384#else 387#else
diff --git a/drivers/staging/comedi/drivers/amplc_pci224.c b/drivers/staging/comedi/drivers/amplc_pci224.c
index 1f65ec4d261e..6e2566a2dd57 100644
--- a/drivers/staging/comedi/drivers/amplc_pci224.c
+++ b/drivers/staging/comedi/drivers/amplc_pci224.c
@@ -116,7 +116,6 @@ Caveats:
116/* 116/*
117 * PCI IDs. 117 * PCI IDs.
118 */ 118 */
119#define PCI_VENDOR_ID_AMPLICON 0x14dc
120#define PCI_DEVICE_ID_AMPLICON_PCI224 0x0007 119#define PCI_DEVICE_ID_AMPLICON_PCI224 0x0007
121#define PCI_DEVICE_ID_AMPLICON_PCI234 0x0008 120#define PCI_DEVICE_ID_AMPLICON_PCI234 0x0008
122#define PCI_DEVICE_ID_INVALID 0xffff 121#define PCI_DEVICE_ID_INVALID 0xffff
@@ -758,76 +757,58 @@ pci224_ao_cmdtest(struct comedi_device *dev, struct comedi_subdevice *s,
758 if (err) 757 if (err)
759 return 2; 758 return 2;
760 759
761 /* Step 3: make sure arguments are trivially compatible. */ 760 /* Step 3: check if arguments are trivially valid */
762 761
763 switch (cmd->start_src) { 762 switch (cmd->start_src) {
764 case TRIG_INT: 763 case TRIG_INT:
765 if (cmd->start_arg != 0) { 764 err |= cfc_check_trigger_arg_is(&cmd->start_arg, 0);
766 cmd->start_arg = 0;
767 err++;
768 }
769 break; 765 break;
770 case TRIG_EXT: 766 case TRIG_EXT:
771 /* Force to external trigger 0. */ 767 /* Force to external trigger 0. */
772 if ((cmd->start_arg & ~CR_FLAGS_MASK) != 0) { 768 if ((cmd->start_arg & ~CR_FLAGS_MASK) != 0) {
773 cmd->start_arg = COMBINE(cmd->start_arg, 0, 769 cmd->start_arg = COMBINE(cmd->start_arg, 0,
774 ~CR_FLAGS_MASK); 770 ~CR_FLAGS_MASK);
775 err++; 771 err |= -EINVAL;
776 } 772 }
777 /* The only flag allowed is CR_EDGE, which is ignored. */ 773 /* The only flag allowed is CR_EDGE, which is ignored. */
778 if ((cmd->start_arg & CR_FLAGS_MASK & ~CR_EDGE) != 0) { 774 if ((cmd->start_arg & CR_FLAGS_MASK & ~CR_EDGE) != 0) {
779 cmd->start_arg = COMBINE(cmd->start_arg, 0, 775 cmd->start_arg = COMBINE(cmd->start_arg, 0,
780 CR_FLAGS_MASK & ~CR_EDGE); 776 CR_FLAGS_MASK & ~CR_EDGE);
781 err++; 777 err |= -EINVAL;
782 } 778 }
783 break; 779 break;
784 } 780 }
785 781
786 switch (cmd->scan_begin_src) { 782 switch (cmd->scan_begin_src) {
787 case TRIG_TIMER: 783 case TRIG_TIMER:
788 if (cmd->scan_begin_arg > MAX_SCAN_PERIOD) { 784 err |= cfc_check_trigger_arg_max(&cmd->scan_begin_arg,
789 cmd->scan_begin_arg = MAX_SCAN_PERIOD; 785 MAX_SCAN_PERIOD);
790 err++; 786
791 }
792 tmp = cmd->chanlist_len * CONVERT_PERIOD; 787 tmp = cmd->chanlist_len * CONVERT_PERIOD;
793 if (tmp < MIN_SCAN_PERIOD) 788 if (tmp < MIN_SCAN_PERIOD)
794 tmp = MIN_SCAN_PERIOD; 789 tmp = MIN_SCAN_PERIOD;
795 790 err |= cfc_check_trigger_arg_min(&cmd->scan_begin_arg, tmp);
796 if (cmd->scan_begin_arg < tmp) {
797 cmd->scan_begin_arg = tmp;
798 err++;
799 }
800 break; 791 break;
801 case TRIG_EXT: 792 case TRIG_EXT:
802 /* Force to external trigger 0. */ 793 /* Force to external trigger 0. */
803 if ((cmd->scan_begin_arg & ~CR_FLAGS_MASK) != 0) { 794 if ((cmd->scan_begin_arg & ~CR_FLAGS_MASK) != 0) {
804 cmd->scan_begin_arg = COMBINE(cmd->scan_begin_arg, 0, 795 cmd->scan_begin_arg = COMBINE(cmd->scan_begin_arg, 0,
805 ~CR_FLAGS_MASK); 796 ~CR_FLAGS_MASK);
806 err++; 797 err |= -EINVAL;
807 } 798 }
808 /* Only allow flags CR_EDGE and CR_INVERT. Ignore CR_EDGE. */ 799 /* Only allow flags CR_EDGE and CR_INVERT. Ignore CR_EDGE. */
809 if ((cmd->scan_begin_arg & CR_FLAGS_MASK & 800 if ((cmd->scan_begin_arg & CR_FLAGS_MASK &
810 ~(CR_EDGE | CR_INVERT)) != 0) { 801 ~(CR_EDGE | CR_INVERT)) != 0) {
811 cmd->scan_begin_arg = COMBINE(cmd->scan_begin_arg, 0, 802 cmd->scan_begin_arg = COMBINE(cmd->scan_begin_arg, 0,
812 CR_FLAGS_MASK & ~(CR_EDGE 803 CR_FLAGS_MASK &
813 | 804 ~(CR_EDGE | CR_INVERT));
814 CR_INVERT)); 805 err |= -EINVAL;
815 err++;
816 } 806 }
817 break; 807 break;
818 } 808 }
819 809
820 /* cmd->convert_src == TRIG_NOW */ 810 err |= cfc_check_trigger_arg_is(&cmd->convert_arg, 0);
821 if (cmd->convert_arg != 0) { 811 err |= cfc_check_trigger_arg_is(&cmd->scan_end_arg, cmd->chanlist_len);
822 cmd->convert_arg = 0;
823 err++;
824 }
825
826 /* cmd->scan_end_arg == TRIG_COUNT */
827 if (cmd->scan_end_arg != cmd->chanlist_len) {
828 cmd->scan_end_arg = cmd->chanlist_len;
829 err++;
830 }
831 812
832 switch (cmd->stop_src) { 813 switch (cmd->stop_src) {
833 case TRIG_COUNT: 814 case TRIG_COUNT:
@@ -838,7 +819,7 @@ pci224_ao_cmdtest(struct comedi_device *dev, struct comedi_subdevice *s,
838 if ((cmd->stop_arg & ~CR_FLAGS_MASK) != 0) { 819 if ((cmd->stop_arg & ~CR_FLAGS_MASK) != 0) {
839 cmd->stop_arg = COMBINE(cmd->stop_arg, 0, 820 cmd->stop_arg = COMBINE(cmd->stop_arg, 0,
840 ~CR_FLAGS_MASK); 821 ~CR_FLAGS_MASK);
841 err++; 822 err |= -EINVAL;
842 } 823 }
843 /* The only flag allowed is CR_EDGE, which is ignored. */ 824 /* The only flag allowed is CR_EDGE, which is ignored. */
844 if ((cmd->stop_arg & CR_FLAGS_MASK & ~CR_EDGE) != 0) { 825 if ((cmd->stop_arg & CR_FLAGS_MASK & ~CR_EDGE) != 0) {
@@ -847,10 +828,7 @@ pci224_ao_cmdtest(struct comedi_device *dev, struct comedi_subdevice *s,
847 } 828 }
848 break; 829 break;
849 case TRIG_NONE: 830 case TRIG_NONE:
850 if (cmd->stop_arg != 0) { 831 err |= cfc_check_trigger_arg_is(&cmd->stop_arg, 0);
851 cmd->stop_arg = 0;
852 err++;
853 }
854 break; 832 break;
855 } 833 }
856 834
@@ -1287,7 +1265,7 @@ static void pci224_report_attach(struct comedi_device *dev, unsigned int irq)
1287} 1265}
1288 1266
1289/* 1267/*
1290 * Common part of attach and attach_pci. 1268 * Common part of attach and auto_attach.
1291 */ 1269 */
1292static int pci224_attach_common(struct comedi_device *dev, 1270static int pci224_attach_common(struct comedi_device *dev,
1293 struct pci_dev *pci_dev, int *options) 1271 struct pci_dev *pci_dev, int *options)
@@ -1443,16 +1421,15 @@ static int pci224_attach_common(struct comedi_device *dev,
1443 1421
1444static int pci224_attach(struct comedi_device *dev, struct comedi_devconfig *it) 1422static int pci224_attach(struct comedi_device *dev, struct comedi_devconfig *it)
1445{ 1423{
1424 struct pci224_private *devpriv;
1446 struct pci_dev *pci_dev; 1425 struct pci_dev *pci_dev;
1447 int ret;
1448 1426
1449 dev_info(dev->class_dev, DRIVER_NAME ": attach\n"); 1427 dev_info(dev->class_dev, DRIVER_NAME ": attach\n");
1450 1428
1451 ret = alloc_private(dev, sizeof(struct pci224_private)); 1429 devpriv = kzalloc(sizeof(*devpriv), GFP_KERNEL);
1452 if (ret < 0) { 1430 if (!devpriv)
1453 dev_err(dev->class_dev, "error! out of memory!\n"); 1431 return -ENOMEM;
1454 return ret; 1432 dev->private = devpriv;
1455 }
1456 1433
1457 pci_dev = pci224_find_pci_dev(dev, it); 1434 pci_dev = pci224_find_pci_dev(dev, it);
1458 if (!pci_dev) 1435 if (!pci_dev)
@@ -1461,19 +1438,19 @@ static int pci224_attach(struct comedi_device *dev, struct comedi_devconfig *it)
1461 return pci224_attach_common(dev, pci_dev, it->options); 1438 return pci224_attach_common(dev, pci_dev, it->options);
1462} 1439}
1463 1440
1464static int __devinit 1441static int
1465pci224_attach_pci(struct comedi_device *dev, struct pci_dev *pci_dev) 1442pci224_auto_attach(struct comedi_device *dev, unsigned long context_unused)
1466{ 1443{
1467 int ret; 1444 struct pci_dev *pci_dev = comedi_to_pci_dev(dev);
1445 struct pci224_private *devpriv;
1468 1446
1469 dev_info(dev->class_dev, DRIVER_NAME ": attach_pci %s\n", 1447 dev_info(dev->class_dev, DRIVER_NAME ": attach pci %s\n",
1470 pci_name(pci_dev)); 1448 pci_name(pci_dev));
1471 1449
1472 ret = alloc_private(dev, sizeof(struct pci224_private)); 1450 devpriv = kzalloc(sizeof(*devpriv), GFP_KERNEL);
1473 if (ret < 0) { 1451 if (!devpriv)
1474 dev_err(dev->class_dev, "error! out of memory!\n"); 1452 return -ENOMEM;
1475 return ret; 1453 dev->private = devpriv;
1476 }
1477 1454
1478 dev->board_ptr = pci224_find_pci_board(pci_dev); 1455 dev->board_ptr = pci224_find_pci_board(pci_dev);
1479 if (dev->board_ptr == NULL) { 1456 if (dev->board_ptr == NULL) {
@@ -1522,20 +1499,20 @@ static struct comedi_driver amplc_pci224_driver = {
1522 .module = THIS_MODULE, 1499 .module = THIS_MODULE,
1523 .attach = pci224_attach, 1500 .attach = pci224_attach,
1524 .detach = pci224_detach, 1501 .detach = pci224_detach,
1525 .attach_pci = pci224_attach_pci, 1502 .auto_attach = pci224_auto_attach,
1526 .board_name = &pci224_boards[0].name, 1503 .board_name = &pci224_boards[0].name,
1527 .offset = sizeof(struct pci224_board), 1504 .offset = sizeof(struct pci224_board),
1528 .num_names = ARRAY_SIZE(pci224_boards), 1505 .num_names = ARRAY_SIZE(pci224_boards),
1529}; 1506};
1530 1507
1531static int __devinit amplc_pci224_pci_probe(struct pci_dev *dev, 1508static int amplc_pci224_pci_probe(struct pci_dev *dev,
1532 const struct pci_device_id 1509 const struct pci_device_id
1533 *ent) 1510 *ent)
1534{ 1511{
1535 return comedi_pci_auto_config(dev, &amplc_pci224_driver); 1512 return comedi_pci_auto_config(dev, &amplc_pci224_driver);
1536} 1513}
1537 1514
1538static void __devexit amplc_pci224_pci_remove(struct pci_dev *dev) 1515static void amplc_pci224_pci_remove(struct pci_dev *dev)
1539{ 1516{
1540 comedi_pci_auto_unconfig(dev); 1517 comedi_pci_auto_unconfig(dev);
1541} 1518}
@@ -1551,7 +1528,7 @@ static struct pci_driver amplc_pci224_pci_driver = {
1551 .name = "amplc_pci224", 1528 .name = "amplc_pci224",
1552 .id_table = amplc_pci224_pci_table, 1529 .id_table = amplc_pci224_pci_table,
1553 .probe = amplc_pci224_pci_probe, 1530 .probe = amplc_pci224_pci_probe,
1554 .remove = __devexit_p(amplc_pci224_pci_remove), 1531 .remove = amplc_pci224_pci_remove,
1555}; 1532};
1556module_comedi_pci_driver(amplc_pci224_driver, amplc_pci224_pci_driver); 1533module_comedi_pci_driver(amplc_pci224_driver, amplc_pci224_pci_driver);
1557 1534
diff --git a/drivers/staging/comedi/drivers/amplc_pci230.c b/drivers/staging/comedi/drivers/amplc_pci230.c
index bd8fb876ce2e..366c68be56bd 100644
--- a/drivers/staging/comedi/drivers/amplc_pci230.c
+++ b/drivers/staging/comedi/drivers/amplc_pci230.c
@@ -198,7 +198,6 @@ for (or detection of) various hardware problems added by Ian Abbott.
198#include "8255.h" 198#include "8255.h"
199 199
200/* PCI230 PCI configuration register information */ 200/* PCI230 PCI configuration register information */
201#define PCI_VENDOR_ID_AMPLICON 0x14dc
202#define PCI_DEVICE_ID_PCI230 0x0000 201#define PCI_DEVICE_ID_PCI230 0x0000
203#define PCI_DEVICE_ID_PCI260 0x0006 202#define PCI_DEVICE_ID_PCI260 0x0006
204#define PCI_DEVICE_ID_INVALID 0xffff 203#define PCI_DEVICE_ID_INVALID 0xffff
@@ -1000,14 +999,10 @@ static int pci230_ao_cmdtest(struct comedi_device *dev,
1000 if (err) 999 if (err)
1001 return 2; 1000 return 2;
1002 1001
1003 /* Step 3: make sure arguments are trivially compatible. 1002 /* Step 3: check if arguments are trivially valid */
1004 * "invalid argument" returned by comedilib to user mode process 1003
1005 * if this fails. */ 1004 err |= cfc_check_trigger_arg_is(&cmd->start_arg, 0);
1006 1005
1007 if (cmd->start_arg != 0) {
1008 cmd->start_arg = 0;
1009 err++;
1010 }
1011#define MAX_SPEED_AO 8000 /* 8000 ns => 125 kHz */ 1006#define MAX_SPEED_AO 8000 /* 8000 ns => 125 kHz */
1012#define MIN_SPEED_AO 4294967295u /* 4294967295ns = 4.29s */ 1007#define MIN_SPEED_AO 4294967295u /* 4294967295ns = 4.29s */
1013 /*- Comedi limit due to unsigned int cmd. Driver limit 1008 /*- Comedi limit due to unsigned int cmd. Driver limit
@@ -1016,14 +1011,10 @@ static int pci230_ao_cmdtest(struct comedi_device *dev,
1016 1011
1017 switch (cmd->scan_begin_src) { 1012 switch (cmd->scan_begin_src) {
1018 case TRIG_TIMER: 1013 case TRIG_TIMER:
1019 if (cmd->scan_begin_arg < MAX_SPEED_AO) { 1014 err |= cfc_check_trigger_arg_min(&cmd->scan_begin_arg,
1020 cmd->scan_begin_arg = MAX_SPEED_AO; 1015 MAX_SPEED_AO);
1021 err++; 1016 err |= cfc_check_trigger_arg_max(&cmd->scan_begin_arg,
1022 } 1017 MIN_SPEED_AO);
1023 if (cmd->scan_begin_arg > MIN_SPEED_AO) {
1024 cmd->scan_begin_arg = MIN_SPEED_AO;
1025 err++;
1026 }
1027 break; 1018 break;
1028 case TRIG_EXT: 1019 case TRIG_EXT:
1029 /* External trigger - for PCI230+ hardware version 2 onwards. */ 1020 /* External trigger - for PCI230+ hardware version 2 onwards. */
@@ -1031,37 +1022,27 @@ static int pci230_ao_cmdtest(struct comedi_device *dev,
1031 if ((cmd->scan_begin_arg & ~CR_FLAGS_MASK) != 0) { 1022 if ((cmd->scan_begin_arg & ~CR_FLAGS_MASK) != 0) {
1032 cmd->scan_begin_arg = COMBINE(cmd->scan_begin_arg, 0, 1023 cmd->scan_begin_arg = COMBINE(cmd->scan_begin_arg, 0,
1033 ~CR_FLAGS_MASK); 1024 ~CR_FLAGS_MASK);
1034 err++; 1025 err |= -EINVAL;
1035 } 1026 }
1036 /* The only flags allowed are CR_EDGE and CR_INVERT. The 1027 /* The only flags allowed are CR_EDGE and CR_INVERT. The
1037 * CR_EDGE flag is ignored. */ 1028 * CR_EDGE flag is ignored. */
1038 if ((cmd->scan_begin_arg 1029 if ((cmd->scan_begin_arg
1039 & (CR_FLAGS_MASK & ~(CR_EDGE | CR_INVERT))) != 0) { 1030 & (CR_FLAGS_MASK & ~(CR_EDGE | CR_INVERT))) != 0) {
1040 cmd->scan_begin_arg = 1031 cmd->scan_begin_arg = COMBINE(cmd->scan_begin_arg, 0,
1041 COMBINE(cmd->scan_begin_arg, 0, 1032 CR_FLAGS_MASK &
1042 CR_FLAGS_MASK & ~(CR_EDGE | CR_INVERT)); 1033 ~(CR_EDGE | CR_INVERT));
1043 err++; 1034 err |= -EINVAL;
1044 } 1035 }
1045 break; 1036 break;
1046 default: 1037 default:
1047 if (cmd->scan_begin_arg != 0) { 1038 err |= cfc_check_trigger_arg_is(&cmd->scan_begin_arg, 0);
1048 cmd->scan_begin_arg = 0;
1049 err++;
1050 }
1051 break; 1039 break;
1052 } 1040 }
1053 1041
1054 if (cmd->scan_end_arg != cmd->chanlist_len) { 1042 err |= cfc_check_trigger_arg_is(&cmd->scan_end_arg, cmd->chanlist_len);
1055 cmd->scan_end_arg = cmd->chanlist_len; 1043
1056 err++; 1044 if (cmd->stop_src == TRIG_NONE)
1057 } 1045 err |= cfc_check_trigger_arg_is(&cmd->stop_arg, 0);
1058 if (cmd->stop_src == TRIG_NONE) {
1059 /* TRIG_NONE */
1060 if (cmd->stop_arg != 0) {
1061 cmd->stop_arg = 0;
1062 err++;
1063 }
1064 }
1065 1046
1066 if (err) 1047 if (err)
1067 return 3; 1048 return 3;
@@ -1619,14 +1600,10 @@ static int pci230_ai_cmdtest(struct comedi_device *dev,
1619 if (err) 1600 if (err)
1620 return 2; 1601 return 2;
1621 1602
1622 /* Step 3: make sure arguments are trivially compatible. 1603 /* Step 3: check if arguments are trivially valid */
1623 * "invalid argument" returned by comedilib to user mode process 1604
1624 * if this fails. */ 1605 err |= cfc_check_trigger_arg_is(&cmd->start_arg, 0);
1625 1606
1626 if (cmd->start_arg != 0) {
1627 cmd->start_arg = 0;
1628 err++;
1629 }
1630#define MAX_SPEED_AI_SE 3200 /* PCI230 SE: 3200 ns => 312.5 kHz */ 1607#define MAX_SPEED_AI_SE 3200 /* PCI230 SE: 3200 ns => 312.5 kHz */
1631#define MAX_SPEED_AI_DIFF 8000 /* PCI230 DIFF: 8000 ns => 125 kHz */ 1608#define MAX_SPEED_AI_DIFF 8000 /* PCI230 DIFF: 8000 ns => 125 kHz */
1632#define MAX_SPEED_AI_PLUS 4000 /* PCI230+: 4000 ns => 250 kHz */ 1609#define MAX_SPEED_AI_PLUS 4000 /* PCI230+: 4000 ns => 250 kHz */
@@ -1657,14 +1634,10 @@ static int pci230_ai_cmdtest(struct comedi_device *dev,
1657 max_speed_ai = MAX_SPEED_AI_PLUS; 1634 max_speed_ai = MAX_SPEED_AI_PLUS;
1658 } 1635 }
1659 1636
1660 if (cmd->convert_arg < max_speed_ai) { 1637 err |= cfc_check_trigger_arg_min(&cmd->convert_arg,
1661 cmd->convert_arg = max_speed_ai; 1638 max_speed_ai);
1662 err++; 1639 err |= cfc_check_trigger_arg_max(&cmd->convert_arg,
1663 } 1640 MIN_SPEED_AI);
1664 if (cmd->convert_arg > MIN_SPEED_AI) {
1665 cmd->convert_arg = MIN_SPEED_AI;
1666 err++;
1667 }
1668 } else if (cmd->convert_src == TRIG_EXT) { 1641 } else if (cmd->convert_src == TRIG_EXT) {
1669 /* 1642 /*
1670 * external trigger 1643 * external trigger
@@ -1679,46 +1652,33 @@ static int pci230_ai_cmdtest(struct comedi_device *dev,
1679 if ((cmd->convert_arg & ~CR_FLAGS_MASK) != 0) { 1652 if ((cmd->convert_arg & ~CR_FLAGS_MASK) != 0) {
1680 cmd->convert_arg = COMBINE(cmd->convert_arg, 0, 1653 cmd->convert_arg = COMBINE(cmd->convert_arg, 0,
1681 ~CR_FLAGS_MASK); 1654 ~CR_FLAGS_MASK);
1682 err++; 1655 err |= -EINVAL;
1683 } 1656 }
1684 /* The only flags allowed are CR_INVERT and CR_EDGE. 1657 /* The only flags allowed are CR_INVERT and CR_EDGE.
1685 * CR_EDGE is required. */ 1658 * CR_EDGE is required. */
1686 if ((cmd->convert_arg & (CR_FLAGS_MASK & ~CR_INVERT)) 1659 if ((cmd->convert_arg & (CR_FLAGS_MASK & ~CR_INVERT))
1687 != CR_EDGE) { 1660 != CR_EDGE) {
1688 /* Set CR_EDGE, preserve CR_INVERT. */ 1661 /* Set CR_EDGE, preserve CR_INVERT. */
1689 cmd->convert_arg = 1662 cmd->convert_arg = COMBINE(cmd->start_arg,
1690 COMBINE(cmd->start_arg, (CR_EDGE | 0), 1663 (CR_EDGE | 0),
1691 CR_FLAGS_MASK & ~CR_INVERT); 1664 CR_FLAGS_MASK &
1692 err++; 1665 ~CR_INVERT);
1666 err |= -EINVAL;
1693 } 1667 }
1694 } else { 1668 } else {
1695 /* Backwards compatibility with previous versions. */ 1669 /* Backwards compatibility with previous versions. */
1696 /* convert_arg == 0 => trigger on -ve edge. */ 1670 /* convert_arg == 0 => trigger on -ve edge. */
1697 /* convert_arg == 1 => trigger on +ve edge. */ 1671 /* convert_arg == 1 => trigger on +ve edge. */
1698 if (cmd->convert_arg > 1) { 1672 err |= cfc_check_trigger_arg_max(&cmd->convert_arg, 1);
1699 /* Default to trigger on +ve edge. */
1700 cmd->convert_arg = 1;
1701 err++;
1702 }
1703 } 1673 }
1704 } else { 1674 } else {
1705 if (cmd->convert_arg != 0) { 1675 err |= cfc_check_trigger_arg_is(&cmd->convert_arg, 0);
1706 cmd->convert_arg = 0;
1707 err++;
1708 }
1709 } 1676 }
1710 1677
1711 if (cmd->scan_end_arg != cmd->chanlist_len) { 1678 err |= cfc_check_trigger_arg_is(&cmd->scan_end_arg, cmd->chanlist_len);
1712 cmd->scan_end_arg = cmd->chanlist_len;
1713 err++;
1714 }
1715 1679
1716 if (cmd->stop_src == TRIG_NONE) { 1680 if (cmd->stop_src == TRIG_NONE)
1717 if (cmd->stop_arg != 0) { 1681 err |= cfc_check_trigger_arg_is(&cmd->stop_arg, 0);
1718 cmd->stop_arg = 0;
1719 err++;
1720 }
1721 }
1722 1682
1723 if (cmd->scan_begin_src == TRIG_EXT) { 1683 if (cmd->scan_begin_src == TRIG_EXT) {
1724 /* external "trigger" to begin each scan 1684 /* external "trigger" to begin each scan
@@ -1727,24 +1687,21 @@ static int pci230_ai_cmdtest(struct comedi_device *dev,
1727 if ((cmd->scan_begin_arg & ~CR_FLAGS_MASK) != 0) { 1687 if ((cmd->scan_begin_arg & ~CR_FLAGS_MASK) != 0) {
1728 cmd->scan_begin_arg = COMBINE(cmd->scan_begin_arg, 0, 1688 cmd->scan_begin_arg = COMBINE(cmd->scan_begin_arg, 0,
1729 ~CR_FLAGS_MASK); 1689 ~CR_FLAGS_MASK);
1730 err++; 1690 err |= -EINVAL;
1731 } 1691 }
1732 /* The only flag allowed is CR_EDGE, which is ignored. */ 1692 /* The only flag allowed is CR_EDGE, which is ignored. */
1733 if ((cmd->scan_begin_arg & CR_FLAGS_MASK & ~CR_EDGE) != 0) { 1693 if ((cmd->scan_begin_arg & CR_FLAGS_MASK & ~CR_EDGE) != 0) {
1734 cmd->scan_begin_arg = COMBINE(cmd->scan_begin_arg, 0, 1694 cmd->scan_begin_arg = COMBINE(cmd->scan_begin_arg, 0,
1735 CR_FLAGS_MASK & ~CR_EDGE); 1695 CR_FLAGS_MASK & ~CR_EDGE);
1736 err++; 1696 err |= -EINVAL;
1737 } 1697 }
1738 } else if (cmd->scan_begin_src == TRIG_TIMER) { 1698 } else if (cmd->scan_begin_src == TRIG_TIMER) {
1739 /* N.B. cmd->convert_arg is also TRIG_TIMER */ 1699 /* N.B. cmd->convert_arg is also TRIG_TIMER */
1740 if (!pci230_ai_check_scan_period(cmd)) 1700 if (!pci230_ai_check_scan_period(cmd))
1741 err++; 1701 err |= -EINVAL;
1742 1702
1743 } else { 1703 } else {
1744 if (cmd->scan_begin_arg != 0) { 1704 err |= cfc_check_trigger_arg_is(&cmd->scan_begin_arg, 0);
1745 cmd->scan_begin_arg = 0;
1746 err++;
1747 }
1748 } 1705 }
1749 1706
1750 if (err) 1707 if (err)
@@ -2660,15 +2617,12 @@ static struct pci_dev *pci230_find_pci_dev(struct comedi_device *dev,
2660static int pci230_alloc_private(struct comedi_device *dev) 2617static int pci230_alloc_private(struct comedi_device *dev)
2661{ 2618{
2662 struct pci230_private *devpriv; 2619 struct pci230_private *devpriv;
2663 int err;
2664 2620
2665 /* sets dev->private to allocated memory */ 2621 devpriv = kzalloc(sizeof(*devpriv), GFP_KERNEL);
2666 err = alloc_private(dev, sizeof(struct pci230_private)); 2622 if (!devpriv)
2667 if (err) { 2623 return -ENOMEM;
2668 dev_err(dev->class_dev, "error! out of memory!\n"); 2624 dev->private = devpriv;
2669 return err; 2625
2670 }
2671 devpriv = dev->private;
2672 spin_lock_init(&devpriv->isr_spinlock); 2626 spin_lock_init(&devpriv->isr_spinlock);
2673 spin_lock_init(&devpriv->res_spinlock); 2627 spin_lock_init(&devpriv->res_spinlock);
2674 spin_lock_init(&devpriv->ai_stop_spinlock); 2628 spin_lock_init(&devpriv->ai_stop_spinlock);
@@ -2676,7 +2630,7 @@ static int pci230_alloc_private(struct comedi_device *dev)
2676 return 0; 2630 return 0;
2677} 2631}
2678 2632
2679/* Common part of attach and attach_pci. */ 2633/* Common part of attach and auto_attach. */
2680static int pci230_attach_common(struct comedi_device *dev, 2634static int pci230_attach_common(struct comedi_device *dev,
2681 struct pci_dev *pci_dev) 2635 struct pci_dev *pci_dev)
2682{ 2636{
@@ -2836,25 +2790,30 @@ static int pci230_attach(struct comedi_device *dev, struct comedi_devconfig *it)
2836 2790
2837 dev_info(dev->class_dev, "amplc_pci230: attach %s %d,%d\n", 2791 dev_info(dev->class_dev, "amplc_pci230: attach %s %d,%d\n",
2838 thisboard->name, it->options[0], it->options[1]); 2792 thisboard->name, it->options[0], it->options[1]);
2839 rc = pci230_alloc_private(dev); /* sets dev->private */ 2793
2794 rc = pci230_alloc_private(dev);
2840 if (rc) 2795 if (rc)
2841 return rc; 2796 return rc;
2797
2842 pci_dev = pci230_find_pci_dev(dev, it); 2798 pci_dev = pci230_find_pci_dev(dev, it);
2843 if (!pci_dev) 2799 if (!pci_dev)
2844 return -EIO; 2800 return -EIO;
2845 return pci230_attach_common(dev, pci_dev); 2801 return pci230_attach_common(dev, pci_dev);
2846} 2802}
2847 2803
2848static int __devinit pci230_attach_pci(struct comedi_device *dev, 2804static int pci230_auto_attach(struct comedi_device *dev,
2849 struct pci_dev *pci_dev) 2805 unsigned long context_unused)
2850{ 2806{
2807 struct pci_dev *pci_dev = comedi_to_pci_dev(dev);
2851 int rc; 2808 int rc;
2852 2809
2853 dev_info(dev->class_dev, "amplc_pci230: attach pci %s\n", 2810 dev_info(dev->class_dev, "amplc_pci230: attach pci %s\n",
2854 pci_name(pci_dev)); 2811 pci_name(pci_dev));
2855 rc = pci230_alloc_private(dev); /* sets dev->private */ 2812
2813 rc = pci230_alloc_private(dev);
2856 if (rc) 2814 if (rc)
2857 return rc; 2815 return rc;
2816
2858 dev->board_ptr = pci230_find_pci_board(pci_dev); 2817 dev->board_ptr = pci230_find_pci_board(pci_dev);
2859 if (dev->board_ptr == NULL) { 2818 if (dev->board_ptr == NULL) {
2860 dev_err(dev->class_dev, 2819 dev_err(dev->class_dev,
@@ -2891,20 +2850,20 @@ static struct comedi_driver amplc_pci230_driver = {
2891 .driver_name = "amplc_pci230", 2850 .driver_name = "amplc_pci230",
2892 .module = THIS_MODULE, 2851 .module = THIS_MODULE,
2893 .attach = pci230_attach, 2852 .attach = pci230_attach,
2894 .attach_pci = pci230_attach_pci, 2853 .auto_attach = pci230_auto_attach,
2895 .detach = pci230_detach, 2854 .detach = pci230_detach,
2896 .board_name = &pci230_boards[0].name, 2855 .board_name = &pci230_boards[0].name,
2897 .offset = sizeof(pci230_boards[0]), 2856 .offset = sizeof(pci230_boards[0]),
2898 .num_names = ARRAY_SIZE(pci230_boards), 2857 .num_names = ARRAY_SIZE(pci230_boards),
2899}; 2858};
2900 2859
2901static int __devinit amplc_pci230_pci_probe(struct pci_dev *dev, 2860static int amplc_pci230_pci_probe(struct pci_dev *dev,
2902 const struct pci_device_id *ent) 2861 const struct pci_device_id *ent)
2903{ 2862{
2904 return comedi_pci_auto_config(dev, &amplc_pci230_driver); 2863 return comedi_pci_auto_config(dev, &amplc_pci230_driver);
2905} 2864}
2906 2865
2907static void __devexit amplc_pci230_pci_remove(struct pci_dev *dev) 2866static void amplc_pci230_pci_remove(struct pci_dev *dev)
2908{ 2867{
2909 comedi_pci_auto_unconfig(dev); 2868 comedi_pci_auto_unconfig(dev);
2910} 2869}
@@ -2920,7 +2879,7 @@ static struct pci_driver amplc_pci230_pci_driver = {
2920 .name = "amplc_pci230", 2879 .name = "amplc_pci230",
2921 .id_table = amplc_pci230_pci_table, 2880 .id_table = amplc_pci230_pci_table,
2922 .probe = amplc_pci230_pci_probe, 2881 .probe = amplc_pci230_pci_probe,
2923 .remove = __devexit_p(amplc_pci230_pci_remove) 2882 .remove = amplc_pci230_pci_remove
2924}; 2883};
2925module_comedi_pci_driver(amplc_pci230_driver, amplc_pci230_pci_driver); 2884module_comedi_pci_driver(amplc_pci230_driver, amplc_pci230_pci_driver);
2926 2885
diff --git a/drivers/staging/comedi/drivers/cb_das16_cs.c b/drivers/staging/comedi/drivers/cb_das16_cs.c
index 6d81d8b40ccc..93731de1f2b1 100644
--- a/drivers/staging/comedi/drivers/cb_das16_cs.c
+++ b/drivers/staging/comedi/drivers/cb_das16_cs.c
@@ -194,67 +194,41 @@ static int das16cs_ai_cmdtest(struct comedi_device *dev,
194 if (err) 194 if (err)
195 return 2; 195 return 2;
196 196
197 /* step 3: make sure arguments are trivially compatible */ 197 /* Step 3: check if arguments are trivially valid */
198
199 err |= cfc_check_trigger_arg_is(&cmd->start_arg, 0);
198 200
199 if (cmd->start_arg != 0) {
200 cmd->start_arg = 0;
201 err++;
202 }
203#define MAX_SPEED 10000 /* in nanoseconds */ 201#define MAX_SPEED 10000 /* in nanoseconds */
204#define MIN_SPEED 1000000000 /* in nanoseconds */ 202#define MIN_SPEED 1000000000 /* in nanoseconds */
205 203
206 if (cmd->scan_begin_src == TRIG_TIMER) { 204 if (cmd->scan_begin_src == TRIG_TIMER) {
207 if (cmd->scan_begin_arg < MAX_SPEED) { 205 err |= cfc_check_trigger_arg_min(&cmd->scan_begin_arg,
208 cmd->scan_begin_arg = MAX_SPEED; 206 MAX_SPEED);
209 err++; 207 err |= cfc_check_trigger_arg_max(&cmd->scan_begin_arg,
210 } 208 MIN_SPEED);
211 if (cmd->scan_begin_arg > MIN_SPEED) {
212 cmd->scan_begin_arg = MIN_SPEED;
213 err++;
214 }
215 } else { 209 } else {
216 /* external trigger */ 210 /* external trigger */
217 /* should be level/edge, hi/lo specification here */ 211 /* should be level/edge, hi/lo specification here */
218 /* should specify multiple external triggers */ 212 /* should specify multiple external triggers */
219 if (cmd->scan_begin_arg > 9) { 213 err |= cfc_check_trigger_arg_max(&cmd->scan_begin_arg, 9);
220 cmd->scan_begin_arg = 9;
221 err++;
222 }
223 } 214 }
224 if (cmd->convert_src == TRIG_TIMER) { 215 if (cmd->convert_src == TRIG_TIMER) {
225 if (cmd->convert_arg < MAX_SPEED) { 216 err |= cfc_check_trigger_arg_min(&cmd->convert_arg,
226 cmd->convert_arg = MAX_SPEED; 217 MAX_SPEED);
227 err++; 218 err |= cfc_check_trigger_arg_max(&cmd->convert_arg,
228 } 219 MIN_SPEED);
229 if (cmd->convert_arg > MIN_SPEED) {
230 cmd->convert_arg = MIN_SPEED;
231 err++;
232 }
233 } else { 220 } else {
234 /* external trigger */ 221 /* external trigger */
235 /* see above */ 222 /* see above */
236 if (cmd->convert_arg > 9) { 223 err |= cfc_check_trigger_arg_max(&cmd->convert_arg, 9);
237 cmd->convert_arg = 9;
238 err++;
239 }
240 } 224 }
241 225
242 if (cmd->scan_end_arg != cmd->chanlist_len) { 226 err |= cfc_check_trigger_arg_is(&cmd->scan_end_arg, cmd->chanlist_len);
243 cmd->scan_end_arg = cmd->chanlist_len; 227
244 err++; 228 if (cmd->stop_src == TRIG_COUNT)
245 } 229 err |= cfc_check_trigger_arg_max(&cmd->stop_arg, 0x00ffffff);
246 if (cmd->stop_src == TRIG_COUNT) { 230 else /* TRIG_NONE */
247 if (cmd->stop_arg > 0x00ffffff) { 231 err |= cfc_check_trigger_arg_is(&cmd->stop_arg, 0);
248 cmd->stop_arg = 0x00ffffff;
249 err++;
250 }
251 } else {
252 /* TRIG_NONE */
253 if (cmd->stop_arg != 0) {
254 cmd->stop_arg = 0;
255 err++;
256 }
257 }
258 232
259 if (err) 233 if (err)
260 return 3; 234 return 3;
@@ -428,6 +402,7 @@ static int das16cs_attach(struct comedi_device *dev,
428 struct comedi_devconfig *it) 402 struct comedi_devconfig *it)
429{ 403{
430 const struct das16cs_board *thisboard; 404 const struct das16cs_board *thisboard;
405 struct das16cs_private *devpriv;
431 struct pcmcia_device *link; 406 struct pcmcia_device *link;
432 struct comedi_subdevice *s; 407 struct comedi_subdevice *s;
433 int ret; 408 int ret;
@@ -451,8 +426,10 @@ static int das16cs_attach(struct comedi_device *dev,
451 return ret; 426 return ret;
452 dev->irq = link->irq; 427 dev->irq = link->irq;
453 428
454 if (alloc_private(dev, sizeof(struct das16cs_private)) < 0) 429 devpriv = kzalloc(sizeof(*devpriv), GFP_KERNEL);
430 if (!devpriv)
455 return -ENOMEM; 431 return -ENOMEM;
432 dev->private = devpriv;
456 433
457 ret = comedi_alloc_subdevices(dev, 3); 434 ret = comedi_alloc_subdevices(dev, 3);
458 if (ret) 435 if (ret)
diff --git a/drivers/staging/comedi/drivers/cb_pcidas.c b/drivers/staging/comedi/drivers/cb_pcidas.c
index de21a261ff45..aed68639cc9a 100644
--- a/drivers/staging/comedi/drivers/cb_pcidas.c
+++ b/drivers/staging/comedi/drivers/cb_pcidas.c
@@ -76,9 +76,6 @@ analog triggering on 1602 series
76#include "amcc_s5933.h" 76#include "amcc_s5933.h"
77#include "comedi_fc.h" 77#include "comedi_fc.h"
78 78
79/* PCI vendor number of ComputerBoards/MeasurementComputing */
80#define PCI_VENDOR_ID_CB 0x1307
81
82#define TIMER_BASE 100 /* 10MHz master clock */ 79#define TIMER_BASE 100 /* 10MHz master clock */
83#define AI_BUFFER_SIZE 1024 /* max ai fifo size */ 80#define AI_BUFFER_SIZE 1024 /* max ai fifo size */
84#define AO_BUFFER_SIZE 1024 /* max ao fifo size */ 81#define AO_BUFFER_SIZE 1024 /* max ao fifo size */
@@ -843,49 +840,32 @@ static int cb_pcidas_ai_cmdtest(struct comedi_device *dev,
843 /* External trigger, only CR_EDGE and CR_INVERT flags allowed */ 840 /* External trigger, only CR_EDGE and CR_INVERT flags allowed */
844 if ((cmd->start_arg 841 if ((cmd->start_arg
845 & (CR_FLAGS_MASK & ~(CR_EDGE | CR_INVERT))) != 0) { 842 & (CR_FLAGS_MASK & ~(CR_EDGE | CR_INVERT))) != 0) {
846 cmd->start_arg &= 843 cmd->start_arg &= ~(CR_FLAGS_MASK &
847 ~(CR_FLAGS_MASK & ~(CR_EDGE | CR_INVERT)); 844 ~(CR_EDGE | CR_INVERT));
848 err++; 845 err |= -EINVAL;
849 } 846 }
850 if (!thisboard->is_1602 && (cmd->start_arg & CR_INVERT)) { 847 if (!thisboard->is_1602 && (cmd->start_arg & CR_INVERT)) {
851 cmd->start_arg &= (CR_FLAGS_MASK & ~CR_INVERT); 848 cmd->start_arg &= (CR_FLAGS_MASK & ~CR_INVERT);
852 err++; 849 err |= -EINVAL;
853 } 850 }
854 break; 851 break;
855 default: 852 default:
856 if (cmd->start_arg != 0) { 853 err |= cfc_check_trigger_arg_is(&cmd->start_arg, 0);
857 cmd->start_arg = 0;
858 err++;
859 }
860 break; 854 break;
861 } 855 }
862 856
863 if (cmd->scan_begin_src == TRIG_TIMER) { 857 if (cmd->scan_begin_src == TRIG_TIMER)
864 if (cmd->scan_begin_arg < 858 err |= cfc_check_trigger_arg_min(&cmd->scan_begin_arg,
865 thisboard->ai_speed * cmd->chanlist_len) { 859 thisboard->ai_speed * cmd->chanlist_len);
866 cmd->scan_begin_arg =
867 thisboard->ai_speed * cmd->chanlist_len;
868 err++;
869 }
870 }
871 if (cmd->convert_src == TRIG_TIMER) {
872 if (cmd->convert_arg < thisboard->ai_speed) {
873 cmd->convert_arg = thisboard->ai_speed;
874 err++;
875 }
876 }
877 860
878 if (cmd->scan_end_arg != cmd->chanlist_len) { 861 if (cmd->convert_src == TRIG_TIMER)
879 cmd->scan_end_arg = cmd->chanlist_len; 862 err |= cfc_check_trigger_arg_min(&cmd->convert_arg,
880 err++; 863 thisboard->ai_speed);
881 } 864
882 if (cmd->stop_src == TRIG_NONE) { 865 err |= cfc_check_trigger_arg_is(&cmd->scan_end_arg, cmd->chanlist_len);
883 /* TRIG_NONE */ 866
884 if (cmd->stop_arg != 0) { 867 if (cmd->stop_src == TRIG_NONE)
885 cmd->stop_arg = 0; 868 err |= cfc_check_trigger_arg_is(&cmd->stop_arg, 0);
886 err++;
887 }
888 }
889 869
890 if (err) 870 if (err)
891 return 3; 871 return 3;
@@ -1078,31 +1058,18 @@ static int cb_pcidas_ao_cmdtest(struct comedi_device *dev,
1078 if (err) 1058 if (err)
1079 return 2; 1059 return 2;
1080 1060
1081 /* step 3: arguments are trivially compatible */ 1061 /* Step 3: check if arguments are trivially valid */
1082 1062
1083 if (cmd->start_arg != 0) { 1063 err |= cfc_check_trigger_arg_is(&cmd->start_arg, 0);
1084 cmd->start_arg = 0;
1085 err++;
1086 }
1087 1064
1088 if (cmd->scan_begin_src == TRIG_TIMER) { 1065 if (cmd->scan_begin_src == TRIG_TIMER)
1089 if (cmd->scan_begin_arg < thisboard->ao_scan_speed) { 1066 err |= cfc_check_trigger_arg_min(&cmd->scan_begin_arg,
1090 cmd->scan_begin_arg = thisboard->ao_scan_speed; 1067 thisboard->ao_scan_speed);
1091 err++;
1092 }
1093 }
1094 1068
1095 if (cmd->scan_end_arg != cmd->chanlist_len) { 1069 err |= cfc_check_trigger_arg_is(&cmd->scan_end_arg, cmd->chanlist_len);
1096 cmd->scan_end_arg = cmd->chanlist_len; 1070
1097 err++; 1071 if (cmd->stop_src == TRIG_NONE)
1098 } 1072 err |= cfc_check_trigger_arg_is(&cmd->stop_arg, 0);
1099 if (cmd->stop_src == TRIG_NONE) {
1100 /* TRIG_NONE */
1101 if (cmd->stop_arg != 0) {
1102 cmd->stop_arg = 0;
1103 err++;
1104 }
1105 }
1106 1073
1107 if (err) 1074 if (err)
1108 return 3; 1075 return 3;
@@ -1469,27 +1436,26 @@ static const void *cb_pcidas_find_boardinfo(struct comedi_device *dev,
1469 return NULL; 1436 return NULL;
1470} 1437}
1471 1438
1472static int cb_pcidas_attach_pci(struct comedi_device *dev, 1439static int cb_pcidas_auto_attach(struct comedi_device *dev,
1473 struct pci_dev *pcidev) 1440 unsigned long context_unused)
1474{ 1441{
1442 struct pci_dev *pcidev = comedi_to_pci_dev(dev);
1475 const struct cb_pcidas_board *thisboard; 1443 const struct cb_pcidas_board *thisboard;
1476 struct cb_pcidas_private *devpriv; 1444 struct cb_pcidas_private *devpriv;
1477 struct comedi_subdevice *s; 1445 struct comedi_subdevice *s;
1478 int i; 1446 int i;
1479 int ret; 1447 int ret;
1480 1448
1481 comedi_set_hw_dev(dev, &pcidev->dev);
1482
1483 thisboard = cb_pcidas_find_boardinfo(dev, pcidev); 1449 thisboard = cb_pcidas_find_boardinfo(dev, pcidev);
1484 if (!thisboard) 1450 if (!thisboard)
1485 return -ENODEV; 1451 return -ENODEV;
1486 dev->board_ptr = thisboard; 1452 dev->board_ptr = thisboard;
1487 dev->board_name = thisboard->name; 1453 dev->board_name = thisboard->name;
1488 1454
1489 ret = alloc_private(dev, sizeof(*devpriv)); 1455 devpriv = kzalloc(sizeof(*devpriv), GFP_KERNEL);
1490 if (ret) 1456 if (!devpriv)
1491 return ret; 1457 return -ENOMEM;
1492 devpriv = dev->private; 1458 dev->private = devpriv;
1493 1459
1494 ret = comedi_pci_enable(pcidev, dev->board_name); 1460 ret = comedi_pci_enable(pcidev, dev->board_name);
1495 if (ret) 1461 if (ret)
@@ -1656,17 +1622,17 @@ static void cb_pcidas_detach(struct comedi_device *dev)
1656static struct comedi_driver cb_pcidas_driver = { 1622static struct comedi_driver cb_pcidas_driver = {
1657 .driver_name = "cb_pcidas", 1623 .driver_name = "cb_pcidas",
1658 .module = THIS_MODULE, 1624 .module = THIS_MODULE,
1659 .attach_pci = cb_pcidas_attach_pci, 1625 .auto_attach = cb_pcidas_auto_attach,
1660 .detach = cb_pcidas_detach, 1626 .detach = cb_pcidas_detach,
1661}; 1627};
1662 1628
1663static int __devinit cb_pcidas_pci_probe(struct pci_dev *dev, 1629static int cb_pcidas_pci_probe(struct pci_dev *dev,
1664 const struct pci_device_id *ent) 1630 const struct pci_device_id *ent)
1665{ 1631{
1666 return comedi_pci_auto_config(dev, &cb_pcidas_driver); 1632 return comedi_pci_auto_config(dev, &cb_pcidas_driver);
1667} 1633}
1668 1634
1669static void __devexit cb_pcidas_pci_remove(struct pci_dev *dev) 1635static void cb_pcidas_pci_remove(struct pci_dev *dev)
1670{ 1636{
1671 comedi_pci_auto_unconfig(dev); 1637 comedi_pci_auto_unconfig(dev);
1672} 1638}
@@ -1688,7 +1654,7 @@ static struct pci_driver cb_pcidas_pci_driver = {
1688 .name = "cb_pcidas", 1654 .name = "cb_pcidas",
1689 .id_table = cb_pcidas_pci_table, 1655 .id_table = cb_pcidas_pci_table,
1690 .probe = cb_pcidas_pci_probe, 1656 .probe = cb_pcidas_pci_probe,
1691 .remove = __devexit_p(cb_pcidas_pci_remove) 1657 .remove = cb_pcidas_pci_remove
1692}; 1658};
1693module_comedi_pci_driver(cb_pcidas_driver, cb_pcidas_pci_driver); 1659module_comedi_pci_driver(cb_pcidas_driver, cb_pcidas_pci_driver);
1694 1660
diff --git a/drivers/staging/comedi/drivers/cb_pcidas64.c b/drivers/staging/comedi/drivers/cb_pcidas64.c
index 0472a9088abe..d72b46cc06bc 100644
--- a/drivers/staging/comedi/drivers/cb_pcidas64.c
+++ b/drivers/staging/comedi/drivers/cb_pcidas64.c
@@ -36,53 +36,57 @@
36************************************************************************/ 36************************************************************************/
37 37
38/* 38/*
39 39 * Driver: cb_pcidas64
40Driver: cb_pcidas64 40 * Description: MeasurementComputing PCI-DAS64xx, 60XX, and 4020 series
41Description: MeasurementComputing PCI-DAS64xx, 60XX, and 4020 series with the PLX 9080 PCI controller 41 * with the PLX 9080 PCI controller
42Author: Frank Mori Hess <fmhess@users.sourceforge.net> 42 * Author: Frank Mori Hess <fmhess@users.sourceforge.net>
43Status: works 43 * Status: works
44Updated: 2002-10-09 44 * Updated: Fri, 02 Nov 2012 18:58:55 +0000
45Devices: [Measurement Computing] PCI-DAS6402/16 (cb_pcidas64), 45 * Devices: [Measurement Computing] PCI-DAS6402/16 (cb_pcidas64),
46 PCI-DAS6402/12, PCI-DAS64/M1/16, PCI-DAS64/M2/16, 46 * PCI-DAS6402/12, PCI-DAS64/M1/16, PCI-DAS64/M2/16,
47 PCI-DAS64/M3/16, PCI-DAS6402/16/JR, PCI-DAS64/M1/16/JR, 47 * PCI-DAS64/M3/16, PCI-DAS6402/16/JR, PCI-DAS64/M1/16/JR,
48 PCI-DAS64/M2/16/JR, PCI-DAS64/M3/16/JR, PCI-DAS64/M1/14, 48 * PCI-DAS64/M2/16/JR, PCI-DAS64/M3/16/JR, PCI-DAS64/M1/14,
49 PCI-DAS64/M2/14, PCI-DAS64/M3/14, PCI-DAS6013, PCI-DAS6014, 49 * PCI-DAS64/M2/14, PCI-DAS64/M3/14, PCI-DAS6013, PCI-DAS6014,
50 PCI-DAS6023, PCI-DAS6025, PCI-DAS6030, 50 * PCI-DAS6023, PCI-DAS6025, PCI-DAS6030,
51 PCI-DAS6031, PCI-DAS6032, PCI-DAS6033, PCI-DAS6034, 51 * PCI-DAS6031, PCI-DAS6032, PCI-DAS6033, PCI-DAS6034,
52 PCI-DAS6035, PCI-DAS6036, PCI-DAS6040, PCI-DAS6052, 52 * PCI-DAS6035, PCI-DAS6036, PCI-DAS6040, PCI-DAS6052,
53 PCI-DAS6070, PCI-DAS6071, PCI-DAS4020/12 53 * PCI-DAS6070, PCI-DAS6071, PCI-DAS4020/12
54 54 *
55Configuration options: 55 * Configuration options:
56 [0] - PCI bus of device (optional) 56 * None.
57 [1] - PCI slot of device (optional) 57 *
58 58 * Manual attachment of PCI cards with the comedi_config utility is not
59These boards may be autocalibrated with the comedi_calibrate utility. 59 * supported by this driver; they are attached automatically.
60 60 *
61To select the bnc trigger input on the 4020 (instead of the dio input), 61 * These boards may be autocalibrated with the comedi_calibrate utility.
62specify a nonzero channel in the chanspec. If you wish to use an external 62 *
63master clock on the 4020, you may do so by setting the scan_begin_src 63 * To select the bnc trigger input on the 4020 (instead of the dio input),
64to TRIG_OTHER, and using an INSN_CONFIG_TIMER_1 configuration insn 64 * specify a nonzero channel in the chanspec. If you wish to use an external
65to configure the divisor to use for the external clock. 65 * master clock on the 4020, you may do so by setting the scan_begin_src
66 66 * to TRIG_OTHER, and using an INSN_CONFIG_TIMER_1 configuration insn
67Some devices are not identified because the PCI device IDs are not yet 67 * to configure the divisor to use for the external clock.
68known. If you have such a board, please file a bug report at 68 *
69https://bugs.comedi.org. 69 * Some devices are not identified because the PCI device IDs are not yet
70 70 * known. If you have such a board, please let the maintainers know.
71*/ 71 */
72 72
73/* 73/*
74 74
75TODO: 75TODO:
76 make it return error if user attempts an ai command that uses the 76 make it return error if user attempts an ai command that uses the
77 external queue, and an ao command simultaneously 77 external queue, and an ao command simultaneously user counter subdevice
78 user counter subdevice
79 there are a number of boards this driver will support when they are 78 there are a number of boards this driver will support when they are
80 fully released, but does not yet since the pci device id numbers 79 fully released, but does not yet since the pci device id numbers
81 are not yet available. 80 are not yet available.
82 support prescaled 100khz clock for slow pacing (not available on 6000 series?) 81
82 support prescaled 100khz clock for slow pacing (not available on 6000
83 series?)
84
83 make ao fifo size adjustable like ai fifo 85 make ao fifo size adjustable like ai fifo
84*/ 86*/
85 87
88#define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
89
86#include "../comedidev.h" 90#include "../comedidev.h"
87#include <linux/delay.h> 91#include <linux/delay.h>
88#include <linux/interrupt.h> 92#include <linux/interrupt.h>
@@ -96,17 +100,17 @@ TODO:
96/* #define PCIDAS64_DEBUG enable debugging code */ 100/* #define PCIDAS64_DEBUG enable debugging code */
97 101
98#ifdef PCIDAS64_DEBUG 102#ifdef PCIDAS64_DEBUG
99#define DEBUG_PRINT(format, args...) printk(format , ## args) 103#define DEBUG_PRINT(format, args...) pr_debug(format, ## args)
100#else 104#else
101#define DEBUG_PRINT(format, args...) 105#define DEBUG_PRINT(format, args...) no_printk(format, ## args)
102#endif 106#endif
103 107
104#define TIMER_BASE 25 /* 40MHz master clock */ 108#define TIMER_BASE 25 /* 40MHz master clock */
105#define PRESCALED_TIMER_BASE 10000 /* 100kHz 'prescaled' clock for slow acquisition, maybe I'll support this someday */ 109/* 100kHz 'prescaled' clock for slow acquisition,
110 * maybe I'll support this someday */
111#define PRESCALED_TIMER_BASE 10000
106#define DMA_BUFFER_SIZE 0x1000 112#define DMA_BUFFER_SIZE 0x1000
107 113
108#define PCI_VENDOR_ID_COMPUTERBOARDS 0x1307
109
110/* maximum value that can be loaded into board's 24-bit counters*/ 114/* maximum value that can be loaded into board's 24-bit counters*/
111static const int max_counter_value = 0xffffff; 115static const int max_counter_value = 0xffffff;
112 116
@@ -119,7 +123,7 @@ enum base_address_regions {
119 DIO_COUNTER_BADDRINDEX = 3, 123 DIO_COUNTER_BADDRINDEX = 3,
120}; 124};
121 125
122/* priv(dev)->main_iobase registers */ 126/* devpriv->main_iobase registers */
123enum write_only_registers { 127enum write_only_registers {
124 INTR_ENABLE_REG = 0x0, /* interrupt enable register */ 128 INTR_ENABLE_REG = 0x0, /* interrupt enable register */
125 HW_CONFIG_REG = 0x2, /* hardware config register */ 129 HW_CONFIG_REG = 0x2, /* hardware config register */
@@ -128,26 +132,36 @@ enum write_only_registers {
128 ADC_CONTROL0_REG = 0x10, /* adc control register 0 */ 132 ADC_CONTROL0_REG = 0x10, /* adc control register 0 */
129 ADC_CONTROL1_REG = 0x12, /* adc control register 1 */ 133 ADC_CONTROL1_REG = 0x12, /* adc control register 1 */
130 CALIBRATION_REG = 0x14, 134 CALIBRATION_REG = 0x14,
131 ADC_SAMPLE_INTERVAL_LOWER_REG = 0x16, /* lower 16 bits of adc sample interval counter */ 135 /* lower 16 bits of adc sample interval counter */
132 ADC_SAMPLE_INTERVAL_UPPER_REG = 0x18, /* upper 8 bits of adc sample interval counter */ 136 ADC_SAMPLE_INTERVAL_LOWER_REG = 0x16,
133 ADC_DELAY_INTERVAL_LOWER_REG = 0x1a, /* lower 16 bits of delay interval counter */ 137 /* upper 8 bits of adc sample interval counter */
134 ADC_DELAY_INTERVAL_UPPER_REG = 0x1c, /* upper 8 bits of delay interval counter */ 138 ADC_SAMPLE_INTERVAL_UPPER_REG = 0x18,
135 ADC_COUNT_LOWER_REG = 0x1e, /* lower 16 bits of hardware conversion/scan counter */ 139 /* lower 16 bits of delay interval counter */
136 ADC_COUNT_UPPER_REG = 0x20, /* upper 8 bits of hardware conversion/scan counter */ 140 ADC_DELAY_INTERVAL_LOWER_REG = 0x1a,
141 /* upper 8 bits of delay interval counter */
142 ADC_DELAY_INTERVAL_UPPER_REG = 0x1c,
143 /* lower 16 bits of hardware conversion/scan counter */
144 ADC_COUNT_LOWER_REG = 0x1e,
145 /* upper 8 bits of hardware conversion/scan counter */
146 ADC_COUNT_UPPER_REG = 0x20,
137 ADC_START_REG = 0x22, /* software trigger to start acquisition */ 147 ADC_START_REG = 0x22, /* software trigger to start acquisition */
138 ADC_CONVERT_REG = 0x24, /* initiates single conversion */ 148 ADC_CONVERT_REG = 0x24, /* initiates single conversion */
139 ADC_QUEUE_CLEAR_REG = 0x26, /* clears adc queue */ 149 ADC_QUEUE_CLEAR_REG = 0x26, /* clears adc queue */
140 ADC_QUEUE_LOAD_REG = 0x28, /* loads adc queue */ 150 ADC_QUEUE_LOAD_REG = 0x28, /* loads adc queue */
141 ADC_BUFFER_CLEAR_REG = 0x2a, 151 ADC_BUFFER_CLEAR_REG = 0x2a,
142 ADC_QUEUE_HIGH_REG = 0x2c, /* high channel for internal queue, use adc_chan_bits() inline above */ 152 /* high channel for internal queue, use adc_chan_bits() inline above */
153 ADC_QUEUE_HIGH_REG = 0x2c,
143 DAC_CONTROL0_REG = 0x50, /* dac control register 0 */ 154 DAC_CONTROL0_REG = 0x50, /* dac control register 0 */
144 DAC_CONTROL1_REG = 0x52, /* dac control register 0 */ 155 DAC_CONTROL1_REG = 0x52, /* dac control register 0 */
145 DAC_SAMPLE_INTERVAL_LOWER_REG = 0x54, /* lower 16 bits of dac sample interval counter */ 156 /* lower 16 bits of dac sample interval counter */
146 DAC_SAMPLE_INTERVAL_UPPER_REG = 0x56, /* upper 8 bits of dac sample interval counter */ 157 DAC_SAMPLE_INTERVAL_LOWER_REG = 0x54,
158 /* upper 8 bits of dac sample interval counter */
159 DAC_SAMPLE_INTERVAL_UPPER_REG = 0x56,
147 DAC_SELECT_REG = 0x60, 160 DAC_SELECT_REG = 0x60,
148 DAC_START_REG = 0x64, 161 DAC_START_REG = 0x64,
149 DAC_BUFFER_CLEAR_REG = 0x66, /* clear dac buffer */ 162 DAC_BUFFER_CLEAR_REG = 0x66, /* clear dac buffer */
150}; 163};
164
151static inline unsigned int dac_convert_reg(unsigned int channel) 165static inline unsigned int dac_convert_reg(unsigned int channel)
152{ 166{
153 return 0x70 + (2 * (channel & 0x1)); 167 return 0x70 + (2 * (channel & 0x1));
@@ -164,7 +178,9 @@ static inline unsigned int dac_msb_4020_reg(unsigned int channel)
164} 178}
165 179
166enum read_only_registers { 180enum read_only_registers {
167 HW_STATUS_REG = 0x0, /* hardware status register, reading this apparently clears pending interrupts as well */ 181 /* hardware status register,
182 * reading this apparently clears pending interrupts as well */
183 HW_STATUS_REG = 0x0,
168 PIPE1_READ_REG = 0x4, 184 PIPE1_READ_REG = 0x4,
169 ADC_READ_PNTR_REG = 0x8, 185 ADC_READ_PNTR_REG = 0x8,
170 LOWER_XFER_REG = 0x10, 186 LOWER_XFER_REG = 0x10,
@@ -174,12 +190,14 @@ enum read_only_registers {
174 190
175enum read_write_registers { 191enum read_write_registers {
176 I8255_4020_REG = 0x48, /* 8255 offset, for 4020 only */ 192 I8255_4020_REG = 0x48, /* 8255 offset, for 4020 only */
177 ADC_QUEUE_FIFO_REG = 0x100, /* external channel/gain queue, uses same bits as ADC_QUEUE_LOAD_REG */ 193 /* external channel/gain queue, uses same bits as ADC_QUEUE_LOAD_REG */
194 ADC_QUEUE_FIFO_REG = 0x100,
178 ADC_FIFO_REG = 0x200, /* adc data fifo */ 195 ADC_FIFO_REG = 0x200, /* adc data fifo */
179 DAC_FIFO_REG = 0x300, /* dac data fifo, has weird interactions with external channel queue */ 196 /* dac data fifo, has weird interactions with external channel queue */
197 DAC_FIFO_REG = 0x300,
180}; 198};
181 199
182/* priv(dev)->dio_counter_iobase registers */ 200/* devpriv->dio_counter_iobase registers */
183enum dio_counter_registers { 201enum dio_counter_registers {
184 DIO_8255_OFFSET = 0x0, 202 DIO_8255_OFFSET = 0x0,
185 DO_REG = 0x20, 203 DO_REG = 0x20,
@@ -191,13 +209,13 @@ enum dio_counter_registers {
191/* bit definitions for write-only registers */ 209/* bit definitions for write-only registers */
192 210
193enum intr_enable_contents { 211enum intr_enable_contents {
194 ADC_INTR_SRC_MASK = 0x3, /* bits that set adc interrupt source */ 212 ADC_INTR_SRC_MASK = 0x3, /* adc interrupt source mask */
195 ADC_INTR_QFULL_BITS = 0x0, /* interrupt fifo quater full */ 213 ADC_INTR_QFULL_BITS = 0x0, /* interrupt fifo quarter full */
196 ADC_INTR_EOC_BITS = 0x1, /* interrupt end of conversion */ 214 ADC_INTR_EOC_BITS = 0x1, /* interrupt end of conversion */
197 ADC_INTR_EOSCAN_BITS = 0x2, /* interrupt end of scan */ 215 ADC_INTR_EOSCAN_BITS = 0x2, /* interrupt end of scan */
198 ADC_INTR_EOSEQ_BITS = 0x3, /* interrupt end of sequence (probably wont use this it's pretty fancy) */ 216 ADC_INTR_EOSEQ_BITS = 0x3, /* interrupt end of sequence mask */
199 EN_ADC_INTR_SRC_BIT = 0x4, /* enable adc interrupt source */ 217 EN_ADC_INTR_SRC_BIT = 0x4, /* enable adc interrupt source */
200 EN_ADC_DONE_INTR_BIT = 0x8, /* enable adc acquisition done interrupt */ 218 EN_ADC_DONE_INTR_BIT = 0x8, /* enable adc acquisition done intr */
201 DAC_INTR_SRC_MASK = 0x30, 219 DAC_INTR_SRC_MASK = 0x30,
202 DAC_INTR_QEMPTY_BITS = 0x0, 220 DAC_INTR_QEMPTY_BITS = 0x0,
203 DAC_INTR_HIGH_CHAN_BITS = 0x10, 221 DAC_INTR_HIGH_CHAN_BITS = 0x10,
@@ -211,25 +229,33 @@ enum intr_enable_contents {
211}; 229};
212 230
213enum hw_config_contents { 231enum hw_config_contents {
214 MASTER_CLOCK_4020_MASK = 0x3, /* bits that specify master clock source for 4020 */ 232 MASTER_CLOCK_4020_MASK = 0x3, /* master clock source mask for 4020 */
215 INTERNAL_CLOCK_4020_BITS = 0x1, /* use 40 MHz internal master clock for 4020 */ 233 INTERNAL_CLOCK_4020_BITS = 0x1, /* use 40 MHz internal master clock */
216 BNC_CLOCK_4020_BITS = 0x2, /* use BNC input for master clock */ 234 BNC_CLOCK_4020_BITS = 0x2, /* use BNC input for master clock */
217 EXT_CLOCK_4020_BITS = 0x3, /* use dio input for master clock */ 235 EXT_CLOCK_4020_BITS = 0x3, /* use dio input for master clock */
218 EXT_QUEUE_BIT = 0x200, /* use external channel/gain queue (more versatile than internal queue) */ 236 EXT_QUEUE_BIT = 0x200, /* use external channel/gain queue */
219 SLOW_DAC_BIT = 0x400, /* use 225 nanosec strobe when loading dac instead of 50 nanosec */ 237 /* use 225 nanosec strobe when loading dac instead of 50 nanosec */
220 HW_CONFIG_DUMMY_BITS = 0x2000, /* bit with unknown function yet given as default value in pci-das64 manual */ 238 SLOW_DAC_BIT = 0x400,
221 DMA_CH_SELECT_BIT = 0x8000, /* bit selects channels 1/0 for analog input/output, otherwise 0/1 */ 239 /* bit with unknown function yet given as default value in pci-das64
222 FIFO_SIZE_REG = 0x4, /* allows adjustment of fifo sizes */ 240 * manual */
241 HW_CONFIG_DUMMY_BITS = 0x2000,
242 /* bit selects channels 1/0 for analog input/output, otherwise 0/1 */
243 DMA_CH_SELECT_BIT = 0x8000,
244 FIFO_SIZE_REG = 0x4, /* allows adjustment of fifo sizes */
223 DAC_FIFO_SIZE_MASK = 0xff00, /* bits that set dac fifo size */ 245 DAC_FIFO_SIZE_MASK = 0xff00, /* bits that set dac fifo size */
224 DAC_FIFO_BITS = 0xf800, /* 8k sample ao fifo */ 246 DAC_FIFO_BITS = 0xf800, /* 8k sample ao fifo */
225}; 247};
226#define DAC_FIFO_SIZE 0x2000 248#define DAC_FIFO_SIZE 0x2000
227 249
228enum daq_atrig_low_4020_contents { 250enum daq_atrig_low_4020_contents {
229 EXT_AGATE_BNC_BIT = 0x8000, /* use trig/ext clk bnc input for analog gate signal */ 251 /* use trig/ext clk bnc input for analog gate signal */
230 EXT_STOP_TRIG_BNC_BIT = 0x4000, /* use trig/ext clk bnc input for external stop trigger signal */ 252 EXT_AGATE_BNC_BIT = 0x8000,
231 EXT_START_TRIG_BNC_BIT = 0x2000, /* use trig/ext clk bnc input for external start trigger signal */ 253 /* use trig/ext clk bnc input for external stop trigger signal */
254 EXT_STOP_TRIG_BNC_BIT = 0x4000,
255 /* use trig/ext clk bnc input for external start trigger signal */
256 EXT_START_TRIG_BNC_BIT = 0x2000,
232}; 257};
258
233static inline uint16_t analog_trig_low_threshold_bits(uint16_t threshold) 259static inline uint16_t analog_trig_low_threshold_bits(uint16_t threshold)
234{ 260{
235 return threshold & 0xfff; 261 return threshold & 0xfff;
@@ -247,14 +273,17 @@ enum adc_control0_contents {
247 ADC_START_TRIG_ANALOG_BITS = 0x30, 273 ADC_START_TRIG_ANALOG_BITS = 0x30,
248 ADC_START_TRIG_MASK = 0x30, 274 ADC_START_TRIG_MASK = 0x30,
249 ADC_START_TRIG_FALLING_BIT = 0x40, /* trig 1 uses falling edge */ 275 ADC_START_TRIG_FALLING_BIT = 0x40, /* trig 1 uses falling edge */
250 ADC_EXT_CONV_FALLING_BIT = 0x800, /* external pacing uses falling edge */ 276 /* external pacing uses falling edge */
251 ADC_SAMPLE_COUNTER_EN_BIT = 0x1000, /* enable hardware scan counter */ 277 ADC_EXT_CONV_FALLING_BIT = 0x800,
278 /* enable hardware scan counter */
279 ADC_SAMPLE_COUNTER_EN_BIT = 0x1000,
252 ADC_DMA_DISABLE_BIT = 0x4000, /* disables dma */ 280 ADC_DMA_DISABLE_BIT = 0x4000, /* disables dma */
253 ADC_ENABLE_BIT = 0x8000, /* master adc enable */ 281 ADC_ENABLE_BIT = 0x8000, /* master adc enable */
254}; 282};
255 283
256enum adc_control1_contents { 284enum adc_control1_contents {
257 ADC_QUEUE_CONFIG_BIT = 0x1, /* should be set for boards with > 16 channels */ 285 /* should be set for boards with > 16 channels */
286 ADC_QUEUE_CONFIG_BIT = 0x1,
258 CONVERT_POLARITY_BIT = 0x10, 287 CONVERT_POLARITY_BIT = 0x10,
259 EOC_POLARITY_BIT = 0x20, 288 EOC_POLARITY_BIT = 0x20,
260 ADC_SW_GATE_BIT = 0x40, /* software gate of adc */ 289 ADC_SW_GATE_BIT = 0x40, /* software gate of adc */
@@ -263,10 +292,11 @@ enum adc_control1_contents {
263 ADC_LO_CHANNEL_4020_MASK = 0x300, 292 ADC_LO_CHANNEL_4020_MASK = 0x300,
264 ADC_HI_CHANNEL_4020_MASK = 0xc00, 293 ADC_HI_CHANNEL_4020_MASK = 0xc00,
265 TWO_CHANNEL_4020_BITS = 0x1000, /* two channel mode for 4020 */ 294 TWO_CHANNEL_4020_BITS = 0x1000, /* two channel mode for 4020 */
266 FOUR_CHANNEL_4020_BITS = 0x2000, /* four channel mode for 4020 */ 295 FOUR_CHANNEL_4020_BITS = 0x2000, /* four channel mode for 4020 */
267 CHANNEL_MODE_4020_MASK = 0x3000, 296 CHANNEL_MODE_4020_MASK = 0x3000,
268 ADC_MODE_MASK = 0xf000, 297 ADC_MODE_MASK = 0xf000,
269}; 298};
299
270static inline uint16_t adc_lo_chan_4020_bits(unsigned int channel) 300static inline uint16_t adc_lo_chan_4020_bits(unsigned int channel)
271{ 301{
272 return (channel & 0x3) << 8; 302 return (channel & 0x3) << 8;
@@ -289,9 +319,10 @@ enum calibration_contents {
289 CAL_EN_64XX_BIT = 0x40, /* calibration enable for 64xx series */ 319 CAL_EN_64XX_BIT = 0x40, /* calibration enable for 64xx series */
290 SERIAL_DATA_IN_BIT = 0x80, 320 SERIAL_DATA_IN_BIT = 0x80,
291 SERIAL_CLOCK_BIT = 0x100, 321 SERIAL_CLOCK_BIT = 0x100,
292 CAL_EN_60XX_BIT = 0x200, /* calibration enable for 60xx series */ 322 CAL_EN_60XX_BIT = 0x200, /* calibration enable for 60xx series */
293 CAL_GAIN_BIT = 0x800, 323 CAL_GAIN_BIT = 0x800,
294}; 324};
325
295/* calibration sources for 6025 are: 326/* calibration sources for 6025 are:
296 * 0 : ground 327 * 0 : ground
297 * 1 : 10V 328 * 1 : 10V
@@ -302,6 +333,7 @@ enum calibration_contents {
302 * 6 : dac channel 0 333 * 6 : dac channel 0
303 * 7 : dac channel 1 334 * 7 : dac channel 1
304 */ 335 */
336
305static inline uint16_t adc_src_bits(unsigned int source) 337static inline uint16_t adc_src_bits(unsigned int source)
306{ 338{
307 return (source & 0xf) << 3; 339 return (source & 0xf) << 3;
@@ -315,10 +347,12 @@ static inline uint16_t adc_convert_chan_4020_bits(unsigned int channel)
315enum adc_queue_load_contents { 347enum adc_queue_load_contents {
316 UNIP_BIT = 0x800, /* unipolar/bipolar bit */ 348 UNIP_BIT = 0x800, /* unipolar/bipolar bit */
317 ADC_SE_DIFF_BIT = 0x1000, /* single-ended/ differential bit */ 349 ADC_SE_DIFF_BIT = 0x1000, /* single-ended/ differential bit */
318 ADC_COMMON_BIT = 0x2000, /* non-referenced single-ended (common-mode input) */ 350 /* non-referenced single-ended (common-mode input) */
351 ADC_COMMON_BIT = 0x2000,
319 QUEUE_EOSEQ_BIT = 0x4000, /* queue end of sequence */ 352 QUEUE_EOSEQ_BIT = 0x4000, /* queue end of sequence */
320 QUEUE_EOSCAN_BIT = 0x8000, /* queue end of scan */ 353 QUEUE_EOSCAN_BIT = 0x8000, /* queue end of scan */
321}; 354};
355
322static inline uint16_t adc_chan_bits(unsigned int channel) 356static inline uint16_t adc_chan_bits(unsigned int channel)
323{ 357{
324 return channel & 0x3f; 358 return channel & 0x3f;
@@ -365,6 +399,7 @@ enum hw_status_contents {
365 EXT_INTR_PENDING_BIT = 0x100, 399 EXT_INTR_PENDING_BIT = 0x100,
366 ADC_STOP_BIT = 0x200, 400 ADC_STOP_BIT = 0x200,
367}; 401};
402
368static inline uint16_t pipe_full_bits(uint16_t hw_status_bits) 403static inline uint16_t pipe_full_bits(uint16_t hw_status_bits)
369{ 404{
370 return (hw_status_bits >> 10) & 0x3; 405 return (hw_status_bits >> 10) & 0x3;
@@ -393,9 +428,12 @@ enum i2c_addresses {
393}; 428};
394 429
395enum range_cal_i2c_contents { 430enum range_cal_i2c_contents {
396 ADC_SRC_4020_MASK = 0x70, /* bits that set what source the adc converter measures */ 431 /* bits that set what source the adc converter measures */
397 BNC_TRIG_THRESHOLD_0V_BIT = 0x80, /* make bnc trig/ext clock threshold 0V instead of 2.5V */ 432 ADC_SRC_4020_MASK = 0x70,
433 /* make bnc trig/ext clock threshold 0V instead of 2.5V */
434 BNC_TRIG_THRESHOLD_0V_BIT = 0x80,
398}; 435};
436
399static inline uint8_t adc_src_4020_bits(unsigned int source) 437static inline uint8_t adc_src_4020_bits(unsigned int source)
400{ 438{
401 return (source << 4) & ADC_SRC_4020_MASK; 439 return (source << 4) & ADC_SRC_4020_MASK;
@@ -562,11 +600,12 @@ struct pcidas64_board {
562 const struct comedi_lrange *ai_range_table; 600 const struct comedi_lrange *ai_range_table;
563 int ao_nchan; /* number of analog out channels */ 601 int ao_nchan; /* number of analog out channels */
564 int ao_bits; /* analog output resolution */ 602 int ao_bits; /* analog output resolution */
565 int ao_scan_speed; /* analog output speed (for a scan, not conversion) */ 603 int ao_scan_speed; /* analog output scan speed */
566 const struct comedi_lrange *ao_range_table; 604 const struct comedi_lrange *ao_range_table;
567 const int *ao_range_code; 605 const int *ao_range_code;
568 const struct hw_fifo_info *const ai_fifo; 606 const struct hw_fifo_info *const ai_fifo;
569 enum register_layout layout; /* different board families have slightly different registers */ 607 /* different board families have slightly different registers */
608 enum register_layout layout;
570 unsigned has_8255:1; 609 unsigned has_8255:1;
571}; 610};
572 611
@@ -596,7 +635,7 @@ static const struct hw_fifo_info ai_fifo_60xx = {
596#define MAX_AI_DMA_RING_COUNT (0x80000 / DMA_BUFFER_SIZE) 635#define MAX_AI_DMA_RING_COUNT (0x80000 / DMA_BUFFER_SIZE)
597#define MIN_AI_DMA_RING_COUNT (0x10000 / DMA_BUFFER_SIZE) 636#define MIN_AI_DMA_RING_COUNT (0x10000 / DMA_BUFFER_SIZE)
598#define AO_DMA_RING_COUNT (0x10000 / DMA_BUFFER_SIZE) 637#define AO_DMA_RING_COUNT (0x10000 / DMA_BUFFER_SIZE)
599static inline unsigned int ai_dma_ring_count(struct pcidas64_board *board) 638static inline unsigned int ai_dma_ring_count(const struct pcidas64_board *board)
600{ 639{
601 if (board->layout == LAYOUT_4020) 640 if (board->layout == LAYOUT_4020)
602 return MAX_AI_DMA_RING_COUNT; 641 return MAX_AI_DMA_RING_COUNT;
@@ -1025,24 +1064,23 @@ static const struct pcidas64_board pcidas64_boards[] = {
1025#endif 1064#endif
1026}; 1065};
1027 1066
1028static inline struct pcidas64_board *board(const struct comedi_device *dev)
1029{
1030 return (struct pcidas64_board *)dev->board_ptr;
1031}
1032
1033static inline unsigned short se_diff_bit_6xxx(struct comedi_device *dev, 1067static inline unsigned short se_diff_bit_6xxx(struct comedi_device *dev,
1034 int use_differential) 1068 int use_differential)
1035{ 1069{
1036 if ((board(dev)->layout == LAYOUT_64XX && !use_differential) || 1070 const struct pcidas64_board *thisboard = comedi_board(dev);
1037 (board(dev)->layout == LAYOUT_60XX && use_differential)) 1071
1072 if ((thisboard->layout == LAYOUT_64XX && !use_differential) ||
1073 (thisboard->layout == LAYOUT_60XX && use_differential))
1038 return ADC_SE_DIFF_BIT; 1074 return ADC_SE_DIFF_BIT;
1039 else 1075 else
1040 return 0; 1076 return 0;
1041}; 1077};
1042 1078
1043struct ext_clock_info { 1079struct ext_clock_info {
1044 unsigned int divisor; /* master clock divisor to use for scans with external master clock */ 1080 /* master clock divisor to use for scans with external master clock */
1045 unsigned int chanspec; /* chanspec for master clock input when used as scan begin src */ 1081 unsigned int divisor;
1082 /* chanspec for master clock input when used as scan begin src */
1083 unsigned int chanspec;
1046}; 1084};
1047 1085
1048/* this structure is for data unique to this hardware driver. */ 1086/* this structure is for data unique to this hardware driver. */
@@ -1058,30 +1096,52 @@ struct pcidas64_private {
1058 /* local address (used by dma controller) */ 1096 /* local address (used by dma controller) */
1059 uint32_t local0_iobase; 1097 uint32_t local0_iobase;
1060 uint32_t local1_iobase; 1098 uint32_t local1_iobase;
1061 volatile unsigned int ai_count; /* number of analog input samples remaining */ 1099 /* number of analog input samples remaining */
1062 uint16_t *ai_buffer[MAX_AI_DMA_RING_COUNT]; /* dma buffers for analog input */ 1100 volatile unsigned int ai_count;
1063 dma_addr_t ai_buffer_bus_addr[MAX_AI_DMA_RING_COUNT]; /* physical addresses of ai dma buffers */ 1101 /* dma buffers for analog input */
1064 struct plx_dma_desc *ai_dma_desc; /* array of ai dma descriptors read by plx9080, allocated to get proper alignment */ 1102 uint16_t *ai_buffer[MAX_AI_DMA_RING_COUNT];
1065 dma_addr_t ai_dma_desc_bus_addr; /* physical address of ai dma descriptor array */ 1103 /* physical addresses of ai dma buffers */
1066 volatile unsigned int ai_dma_index; /* index of the ai dma descriptor/buffer that is currently being used */ 1104 dma_addr_t ai_buffer_bus_addr[MAX_AI_DMA_RING_COUNT];
1067 uint16_t *ao_buffer[AO_DMA_RING_COUNT]; /* dma buffers for analog output */ 1105 /* array of ai dma descriptors read by plx9080,
1068 dma_addr_t ao_buffer_bus_addr[AO_DMA_RING_COUNT]; /* physical addresses of ao dma buffers */ 1106 * allocated to get proper alignment */
1107 struct plx_dma_desc *ai_dma_desc;
1108 /* physical address of ai dma descriptor array */
1109 dma_addr_t ai_dma_desc_bus_addr;
1110 /* index of the ai dma descriptor/buffer
1111 * that is currently being used */
1112 volatile unsigned int ai_dma_index;
1113 /* dma buffers for analog output */
1114 uint16_t *ao_buffer[AO_DMA_RING_COUNT];
1115 /* physical addresses of ao dma buffers */
1116 dma_addr_t ao_buffer_bus_addr[AO_DMA_RING_COUNT];
1069 struct plx_dma_desc *ao_dma_desc; 1117 struct plx_dma_desc *ao_dma_desc;
1070 dma_addr_t ao_dma_desc_bus_addr; 1118 dma_addr_t ao_dma_desc_bus_addr;
1071 volatile unsigned int ao_dma_index; /* keeps track of buffer where the next ao sample should go */ 1119 /* keeps track of buffer where the next ao sample should go */
1072 volatile unsigned long ao_count; /* number of analog output samples remaining */ 1120 volatile unsigned int ao_dma_index;
1073 volatile unsigned int ao_value[2]; /* remember what the analog outputs are set to, to allow readback */ 1121 /* number of analog output samples remaining */
1122 volatile unsigned long ao_count;
1123 /* remember what the analog outputs are set to, to allow readback */
1124 volatile unsigned int ao_value[2];
1074 unsigned int hw_revision; /* stc chip hardware revision number */ 1125 unsigned int hw_revision; /* stc chip hardware revision number */
1075 volatile unsigned int intr_enable_bits; /* last bits sent to INTR_ENABLE_REG register */ 1126 /* last bits sent to INTR_ENABLE_REG register */
1076 volatile uint16_t adc_control1_bits; /* last bits sent to ADC_CONTROL1_REG register */ 1127 volatile unsigned int intr_enable_bits;
1077 volatile uint16_t fifo_size_bits; /* last bits sent to FIFO_SIZE_REG register */ 1128 /* last bits sent to ADC_CONTROL1_REG register */
1078 volatile uint16_t hw_config_bits; /* last bits sent to HW_CONFIG_REG register */ 1129 volatile uint16_t adc_control1_bits;
1130 /* last bits sent to FIFO_SIZE_REG register */
1131 volatile uint16_t fifo_size_bits;
1132 /* last bits sent to HW_CONFIG_REG register */
1133 volatile uint16_t hw_config_bits;
1079 volatile uint16_t dac_control1_bits; 1134 volatile uint16_t dac_control1_bits;
1080 volatile uint32_t plx_control_bits; /* last bits written to plx9080 control register */ 1135 /* last bits written to plx9080 control register */
1081 volatile uint32_t plx_intcsr_bits; /* last bits written to plx interrupt control and status register */ 1136 volatile uint32_t plx_control_bits;
1082 volatile int calibration_source; /* index of calibration source readable through ai ch0 */ 1137 /* last bits written to plx interrupt control and status register */
1083 volatile uint8_t i2c_cal_range_bits; /* bits written to i2c calibration/range register */ 1138 volatile uint32_t plx_intcsr_bits;
1084 volatile unsigned int ext_trig_falling; /* configure digital triggers to trigger on falling edge */ 1139 /* index of calibration source readable through ai ch0 */
1140 volatile int calibration_source;
1141 /* bits written to i2c calibration/range register */
1142 volatile uint8_t i2c_cal_range_bits;
1143 /* configure digital triggers to trigger on falling edge */
1144 volatile unsigned int ext_trig_falling;
1085 /* states of various devices stored to enable read-back */ 1145 /* states of various devices stored to enable read-back */
1086 unsigned int ad8402_state[2]; 1146 unsigned int ad8402_state[2];
1087 unsigned int caldac_state[8]; 1147 unsigned int caldac_state[8];
@@ -1091,93 +1151,12 @@ struct pcidas64_private {
1091 short ao_bounce_buffer[DAC_FIFO_SIZE]; 1151 short ao_bounce_buffer[DAC_FIFO_SIZE];
1092}; 1152};
1093 1153
1094/* inline function that makes it easier to
1095 * access the private structure.
1096 */
1097static inline struct pcidas64_private *priv(struct comedi_device *dev)
1098{
1099 return dev->private;
1100}
1101
1102static int ai_rinsn(struct comedi_device *dev, struct comedi_subdevice *s,
1103 struct comedi_insn *insn, unsigned int *data);
1104static int ai_config_insn(struct comedi_device *dev, struct comedi_subdevice *s,
1105 struct comedi_insn *insn, unsigned int *data);
1106static int ao_winsn(struct comedi_device *dev, struct comedi_subdevice *s,
1107 struct comedi_insn *insn, unsigned int *data);
1108static int ao_readback_insn(struct comedi_device *dev,
1109 struct comedi_subdevice *s,
1110 struct comedi_insn *insn, unsigned int *data);
1111static int ai_cmd(struct comedi_device *dev, struct comedi_subdevice *s);
1112static int ai_cmdtest(struct comedi_device *dev, struct comedi_subdevice *s,
1113 struct comedi_cmd *cmd);
1114static int ao_cmd(struct comedi_device *dev, struct comedi_subdevice *s);
1115static int ao_inttrig(struct comedi_device *dev,
1116 struct comedi_subdevice *subdev, unsigned int trig_num);
1117static int ao_cmdtest(struct comedi_device *dev, struct comedi_subdevice *s,
1118 struct comedi_cmd *cmd);
1119static irqreturn_t handle_interrupt(int irq, void *d);
1120static int ai_cancel(struct comedi_device *dev, struct comedi_subdevice *s);
1121static int ao_cancel(struct comedi_device *dev, struct comedi_subdevice *s);
1122static int dio_callback(int dir, int port, int data, unsigned long arg);
1123static int dio_callback_4020(int dir, int port, int data, unsigned long arg);
1124static int di_rbits(struct comedi_device *dev, struct comedi_subdevice *s,
1125 struct comedi_insn *insn, unsigned int *data);
1126static int do_wbits(struct comedi_device *dev, struct comedi_subdevice *s,
1127 struct comedi_insn *insn, unsigned int *data);
1128static int dio_60xx_config_insn(struct comedi_device *dev,
1129 struct comedi_subdevice *s,
1130 struct comedi_insn *insn, unsigned int *data);
1131static int dio_60xx_wbits(struct comedi_device *dev, struct comedi_subdevice *s,
1132 struct comedi_insn *insn, unsigned int *data);
1133static int calib_read_insn(struct comedi_device *dev,
1134 struct comedi_subdevice *s, struct comedi_insn *insn,
1135 unsigned int *data);
1136static int calib_write_insn(struct comedi_device *dev,
1137 struct comedi_subdevice *s,
1138 struct comedi_insn *insn, unsigned int *data);
1139static int ad8402_read_insn(struct comedi_device *dev,
1140 struct comedi_subdevice *s,
1141 struct comedi_insn *insn, unsigned int *data);
1142static void ad8402_write(struct comedi_device *dev, unsigned int channel,
1143 unsigned int value);
1144static int ad8402_write_insn(struct comedi_device *dev,
1145 struct comedi_subdevice *s,
1146 struct comedi_insn *insn, unsigned int *data);
1147static int eeprom_read_insn(struct comedi_device *dev,
1148 struct comedi_subdevice *s,
1149 struct comedi_insn *insn, unsigned int *data);
1150static void check_adc_timing(struct comedi_device *dev, struct comedi_cmd *cmd);
1151static unsigned int get_divisor(unsigned int ns, unsigned int flags);
1152static void i2c_write(struct comedi_device *dev, unsigned int address,
1153 const uint8_t *data, unsigned int length);
1154static void caldac_write(struct comedi_device *dev, unsigned int channel,
1155 unsigned int value);
1156static int caldac_8800_write(struct comedi_device *dev, unsigned int address,
1157 uint8_t value);
1158/* static int dac_1590_write(struct comedi_device *dev, unsigned int dac_a, unsigned int dac_b); */
1159static int caldac_i2c_write(struct comedi_device *dev,
1160 unsigned int caldac_channel, unsigned int value);
1161static void abort_dma(struct comedi_device *dev, unsigned int channel);
1162static void disable_plx_interrupts(struct comedi_device *dev);
1163static int set_ai_fifo_size(struct comedi_device *dev,
1164 unsigned int num_samples);
1165static unsigned int ai_fifo_size(struct comedi_device *dev);
1166static int set_ai_fifo_segment_length(struct comedi_device *dev,
1167 unsigned int num_entries);
1168static void disable_ai_pacing(struct comedi_device *dev);
1169static void disable_ai_interrupts(struct comedi_device *dev);
1170static void enable_ai_interrupts(struct comedi_device *dev,
1171 const struct comedi_cmd *cmd);
1172static unsigned int get_ao_divisor(unsigned int ns, unsigned int flags);
1173static void load_ao_dma(struct comedi_device *dev,
1174 const struct comedi_cmd *cmd);
1175
1176static unsigned int ai_range_bits_6xxx(const struct comedi_device *dev, 1154static unsigned int ai_range_bits_6xxx(const struct comedi_device *dev,
1177 unsigned int range_index) 1155 unsigned int range_index)
1178{ 1156{
1157 const struct pcidas64_board *thisboard = comedi_board(dev);
1179 const struct comedi_krange *range = 1158 const struct comedi_krange *range =
1180 &board(dev)->ai_range_table->range[range_index]; 1159 &thisboard->ai_range_table->range[range_index];
1181 unsigned int bits = 0; 1160 unsigned int bits = 0;
1182 1161
1183 switch (range->max) { 1162 switch (range->max) {
@@ -1220,7 +1199,9 @@ static unsigned int ai_range_bits_6xxx(const struct comedi_device *dev,
1220static unsigned int hw_revision(const struct comedi_device *dev, 1199static unsigned int hw_revision(const struct comedi_device *dev,
1221 uint16_t hw_status_bits) 1200 uint16_t hw_status_bits)
1222{ 1201{
1223 if (board(dev)->layout == LAYOUT_4020) 1202 const struct pcidas64_board *thisboard = comedi_board(dev);
1203
1204 if (thisboard->layout == LAYOUT_4020)
1224 return (hw_status_bits >> 13) & 0x7; 1205 return (hw_status_bits >> 13) & 0x7;
1225 1206
1226 return (hw_status_bits >> 12) & 0xf; 1207 return (hw_status_bits >> 12) & 0xf;
@@ -1230,7 +1211,8 @@ static void set_dac_range_bits(struct comedi_device *dev,
1230 volatile uint16_t *bits, unsigned int channel, 1211 volatile uint16_t *bits, unsigned int channel,
1231 unsigned int range) 1212 unsigned int range)
1232{ 1213{
1233 unsigned int code = board(dev)->ao_range_code[range]; 1214 const struct pcidas64_board *thisboard = comedi_board(dev);
1215 unsigned int code = thisboard->ao_range_code[range];
1234 1216
1235 if (channel > 1) 1217 if (channel > 1)
1236 comedi_error(dev, "bug! bad channel?"); 1218 comedi_error(dev, "bug! bad channel?");
@@ -1246,20 +1228,86 @@ static inline int ao_cmd_is_supported(const struct pcidas64_board *board)
1246 return board->ao_nchan && board->layout != LAYOUT_4020; 1228 return board->ao_nchan && board->layout != LAYOUT_4020;
1247} 1229}
1248 1230
1231static void abort_dma(struct comedi_device *dev, unsigned int channel)
1232{
1233 struct pcidas64_private *devpriv = dev->private;
1234 unsigned long flags;
1235
1236 /* spinlock for plx dma control/status reg */
1237 spin_lock_irqsave(&dev->spinlock, flags);
1238
1239 plx9080_abort_dma(devpriv->plx9080_iobase, channel);
1240
1241 spin_unlock_irqrestore(&dev->spinlock, flags);
1242}
1243
1244static void disable_plx_interrupts(struct comedi_device *dev)
1245{
1246 struct pcidas64_private *devpriv = dev->private;
1247
1248 devpriv->plx_intcsr_bits = 0;
1249 writel(devpriv->plx_intcsr_bits,
1250 devpriv->plx9080_iobase + PLX_INTRCS_REG);
1251}
1252
1253static void disable_ai_interrupts(struct comedi_device *dev)
1254{
1255 struct pcidas64_private *devpriv = dev->private;
1256 unsigned long flags;
1257
1258 spin_lock_irqsave(&dev->spinlock, flags);
1259 devpriv->intr_enable_bits &=
1260 ~EN_ADC_INTR_SRC_BIT & ~EN_ADC_DONE_INTR_BIT &
1261 ~EN_ADC_ACTIVE_INTR_BIT & ~EN_ADC_STOP_INTR_BIT &
1262 ~EN_ADC_OVERRUN_BIT & ~ADC_INTR_SRC_MASK;
1263 writew(devpriv->intr_enable_bits,
1264 devpriv->main_iobase + INTR_ENABLE_REG);
1265 spin_unlock_irqrestore(&dev->spinlock, flags);
1266
1267 DEBUG_PRINT("intr enable bits 0x%x\n", devpriv->intr_enable_bits);
1268}
1269
1270static void enable_ai_interrupts(struct comedi_device *dev,
1271 const struct comedi_cmd *cmd)
1272{
1273 const struct pcidas64_board *thisboard = comedi_board(dev);
1274 struct pcidas64_private *devpriv = dev->private;
1275 uint32_t bits;
1276 unsigned long flags;
1277
1278 bits = EN_ADC_OVERRUN_BIT | EN_ADC_DONE_INTR_BIT |
1279 EN_ADC_ACTIVE_INTR_BIT | EN_ADC_STOP_INTR_BIT;
1280 /* Use pio transfer and interrupt on end of conversion
1281 * if TRIG_WAKE_EOS flag is set. */
1282 if (cmd->flags & TRIG_WAKE_EOS) {
1283 /* 4020 doesn't support pio transfers except for fifo dregs */
1284 if (thisboard->layout != LAYOUT_4020)
1285 bits |= ADC_INTR_EOSCAN_BITS | EN_ADC_INTR_SRC_BIT;
1286 }
1287 spin_lock_irqsave(&dev->spinlock, flags);
1288 devpriv->intr_enable_bits |= bits;
1289 writew(devpriv->intr_enable_bits,
1290 devpriv->main_iobase + INTR_ENABLE_REG);
1291 DEBUG_PRINT("intr enable bits 0x%x\n", devpriv->intr_enable_bits);
1292 spin_unlock_irqrestore(&dev->spinlock, flags);
1293}
1294
1249/* initialize plx9080 chip */ 1295/* initialize plx9080 chip */
1250static void init_plx9080(struct comedi_device *dev) 1296static void init_plx9080(struct comedi_device *dev)
1251{ 1297{
1298 const struct pcidas64_board *thisboard = comedi_board(dev);
1299 struct pcidas64_private *devpriv = dev->private;
1252 uint32_t bits; 1300 uint32_t bits;
1253 void __iomem *plx_iobase = priv(dev)->plx9080_iobase; 1301 void __iomem *plx_iobase = devpriv->plx9080_iobase;
1254 1302
1255 priv(dev)->plx_control_bits = 1303 devpriv->plx_control_bits =
1256 readl(priv(dev)->plx9080_iobase + PLX_CONTROL_REG); 1304 readl(devpriv->plx9080_iobase + PLX_CONTROL_REG);
1257 1305
1258 /* plx9080 dump */ 1306 /* plx9080 dump */
1259 DEBUG_PRINT(" plx interrupt status 0x%x\n", 1307 DEBUG_PRINT(" plx interrupt status 0x%x\n",
1260 readl(plx_iobase + PLX_INTRCS_REG)); 1308 readl(plx_iobase + PLX_INTRCS_REG));
1261 DEBUG_PRINT(" plx id bits 0x%x\n", readl(plx_iobase + PLX_ID_REG)); 1309 DEBUG_PRINT(" plx id bits 0x%x\n", readl(plx_iobase + PLX_ID_REG));
1262 DEBUG_PRINT(" plx control reg 0x%x\n", priv(dev)->plx_control_bits); 1310 DEBUG_PRINT(" plx control reg 0x%x\n", devpriv->plx_control_bits);
1263 DEBUG_PRINT(" plx mode/arbitration reg 0x%x\n", 1311 DEBUG_PRINT(" plx mode/arbitration reg 0x%x\n",
1264 readl(plx_iobase + PLX_MARB_REG)); 1312 readl(plx_iobase + PLX_MARB_REG));
1265 DEBUG_PRINT(" plx region0 reg 0x%x\n", 1313 DEBUG_PRINT(" plx region0 reg 0x%x\n",
@@ -1292,7 +1340,7 @@ static void init_plx9080(struct comedi_device *dev)
1292#else 1340#else
1293 bits = 0; 1341 bits = 0;
1294#endif 1342#endif
1295 writel(bits, priv(dev)->plx9080_iobase + PLX_BIGEND_REG); 1343 writel(bits, devpriv->plx9080_iobase + PLX_BIGEND_REG);
1296 1344
1297 disable_plx_interrupts(dev); 1345 disable_plx_interrupts(dev);
1298 1346
@@ -1307,9 +1355,11 @@ static void init_plx9080(struct comedi_device *dev)
1307 bits |= PLX_EN_BTERM_BIT; 1355 bits |= PLX_EN_BTERM_BIT;
1308 /* enable dma chaining */ 1356 /* enable dma chaining */
1309 bits |= PLX_EN_CHAIN_BIT; 1357 bits |= PLX_EN_CHAIN_BIT;
1310 /* enable interrupt on dma done (probably don't need this, since chain never finishes) */ 1358 /* enable interrupt on dma done
1359 * (probably don't need this, since chain never finishes) */
1311 bits |= PLX_EN_DMA_DONE_INTR_BIT; 1360 bits |= PLX_EN_DMA_DONE_INTR_BIT;
1312 /* don't increment local address during transfers (we are transferring from a fixed fifo register) */ 1361 /* don't increment local address during transfers
1362 * (we are transferring from a fixed fifo register) */
1313 bits |= PLX_LOCAL_ADDR_CONST_BIT; 1363 bits |= PLX_LOCAL_ADDR_CONST_BIT;
1314 /* route dma interrupt to pci bus */ 1364 /* route dma interrupt to pci bus */
1315 bits |= PLX_DMA_INTR_PCI_BIT; 1365 bits |= PLX_DMA_INTR_PCI_BIT;
@@ -1318,324 +1368,235 @@ static void init_plx9080(struct comedi_device *dev)
1318 /* enable local burst mode */ 1368 /* enable local burst mode */
1319 bits |= PLX_DMA_LOCAL_BURST_EN_BIT; 1369 bits |= PLX_DMA_LOCAL_BURST_EN_BIT;
1320 /* 4020 uses 32 bit dma */ 1370 /* 4020 uses 32 bit dma */
1321 if (board(dev)->layout == LAYOUT_4020) { 1371 if (thisboard->layout == LAYOUT_4020)
1322 bits |= PLX_LOCAL_BUS_32_WIDE_BITS; 1372 bits |= PLX_LOCAL_BUS_32_WIDE_BITS;
1323 } else { /* localspace0 bus is 16 bits wide */ 1373 else /* localspace0 bus is 16 bits wide */
1324 bits |= PLX_LOCAL_BUS_16_WIDE_BITS; 1374 bits |= PLX_LOCAL_BUS_16_WIDE_BITS;
1325 }
1326 writel(bits, plx_iobase + PLX_DMA1_MODE_REG); 1375 writel(bits, plx_iobase + PLX_DMA1_MODE_REG);
1327 if (ao_cmd_is_supported(board(dev))) 1376 if (ao_cmd_is_supported(thisboard))
1328 writel(bits, plx_iobase + PLX_DMA0_MODE_REG); 1377 writel(bits, plx_iobase + PLX_DMA0_MODE_REG);
1329 1378
1330 /* enable interrupts on plx 9080 */ 1379 /* enable interrupts on plx 9080 */
1331 priv(dev)->plx_intcsr_bits |= 1380 devpriv->plx_intcsr_bits |=
1332 ICS_AERR | ICS_PERR | ICS_PIE | ICS_PLIE | ICS_PAIE | ICS_LIE | 1381 ICS_AERR | ICS_PERR | ICS_PIE | ICS_PLIE | ICS_PAIE | ICS_LIE |
1333 ICS_DMA0_E | ICS_DMA1_E; 1382 ICS_DMA0_E | ICS_DMA1_E;
1334 writel(priv(dev)->plx_intcsr_bits, 1383 writel(devpriv->plx_intcsr_bits,
1335 priv(dev)->plx9080_iobase + PLX_INTRCS_REG); 1384 devpriv->plx9080_iobase + PLX_INTRCS_REG);
1336} 1385}
1337 1386
1338/* Allocate and initialize the subdevice structures. 1387static void disable_ai_pacing(struct comedi_device *dev)
1339 */
1340static int setup_subdevices(struct comedi_device *dev)
1341{ 1388{
1342 struct comedi_subdevice *s; 1389 struct pcidas64_private *devpriv = dev->private;
1343 void __iomem *dio_8255_iobase; 1390 unsigned long flags;
1344 int i;
1345 int ret;
1346 1391
1347 ret = comedi_alloc_subdevices(dev, 10); 1392 disable_ai_interrupts(dev);
1348 if (ret)
1349 return ret;
1350 1393
1351 s = &dev->subdevices[0]; 1394 spin_lock_irqsave(&dev->spinlock, flags);
1352 /* analog input subdevice */ 1395 devpriv->adc_control1_bits &= ~ADC_SW_GATE_BIT;
1353 dev->read_subdev = s; 1396 writew(devpriv->adc_control1_bits,
1354 s->type = COMEDI_SUBD_AI; 1397 devpriv->main_iobase + ADC_CONTROL1_REG);
1355 s->subdev_flags = SDF_READABLE | SDF_GROUND | SDF_DITHER | SDF_CMD_READ; 1398 spin_unlock_irqrestore(&dev->spinlock, flags);
1356 if (board(dev)->layout == LAYOUT_60XX)
1357 s->subdev_flags |= SDF_COMMON | SDF_DIFF;
1358 else if (board(dev)->layout == LAYOUT_64XX)
1359 s->subdev_flags |= SDF_DIFF;
1360 /* XXX Number of inputs in differential mode is ignored */
1361 s->n_chan = board(dev)->ai_se_chans;
1362 s->len_chanlist = 0x2000;
1363 s->maxdata = (1 << board(dev)->ai_bits) - 1;
1364 s->range_table = board(dev)->ai_range_table;
1365 s->insn_read = ai_rinsn;
1366 s->insn_config = ai_config_insn;
1367 s->do_cmd = ai_cmd;
1368 s->do_cmdtest = ai_cmdtest;
1369 s->cancel = ai_cancel;
1370 if (board(dev)->layout == LAYOUT_4020) {
1371 uint8_t data;
1372 /* set adc to read from inputs (not internal calibration sources) */
1373 priv(dev)->i2c_cal_range_bits = adc_src_4020_bits(4);
1374 /* set channels to +-5 volt input ranges */
1375 for (i = 0; i < s->n_chan; i++)
1376 priv(dev)->i2c_cal_range_bits |= attenuate_bit(i);
1377 data = priv(dev)->i2c_cal_range_bits;
1378 i2c_write(dev, RANGE_CAL_I2C_ADDR, &data, sizeof(data));
1379 }
1380 1399
1381 /* analog output subdevice */ 1400 /* disable pacing, triggering, etc */
1382 s = &dev->subdevices[1]; 1401 writew(ADC_DMA_DISABLE_BIT | ADC_SOFT_GATE_BITS | ADC_GATE_LEVEL_BIT,
1383 if (board(dev)->ao_nchan) { 1402 devpriv->main_iobase + ADC_CONTROL0_REG);
1384 s->type = COMEDI_SUBD_AO; 1403}
1385 s->subdev_flags =
1386 SDF_READABLE | SDF_WRITABLE | SDF_GROUND | SDF_CMD_WRITE;
1387 s->n_chan = board(dev)->ao_nchan;
1388 s->maxdata = (1 << board(dev)->ao_bits) - 1;
1389 s->range_table = board(dev)->ao_range_table;
1390 s->insn_read = ao_readback_insn;
1391 s->insn_write = ao_winsn;
1392 if (ao_cmd_is_supported(board(dev))) {
1393 dev->write_subdev = s;
1394 s->do_cmdtest = ao_cmdtest;
1395 s->do_cmd = ao_cmd;
1396 s->len_chanlist = board(dev)->ao_nchan;
1397 s->cancel = ao_cancel;
1398 }
1399 } else {
1400 s->type = COMEDI_SUBD_UNUSED;
1401 }
1402 1404
1403 /* digital input */ 1405static int set_ai_fifo_segment_length(struct comedi_device *dev,
1404 s = &dev->subdevices[2]; 1406 unsigned int num_entries)
1405 if (board(dev)->layout == LAYOUT_64XX) { 1407{
1406 s->type = COMEDI_SUBD_DI; 1408 const struct pcidas64_board *thisboard = comedi_board(dev);
1407 s->subdev_flags = SDF_READABLE; 1409 struct pcidas64_private *devpriv = dev->private;
1408 s->n_chan = 4; 1410 static const int increment_size = 0x100;
1409 s->maxdata = 1; 1411 const struct hw_fifo_info *const fifo = thisboard->ai_fifo;
1410 s->range_table = &range_digital; 1412 unsigned int num_increments;
1411 s->insn_bits = di_rbits; 1413 uint16_t bits;
1412 } else
1413 s->type = COMEDI_SUBD_UNUSED;
1414 1414
1415 /* digital output */ 1415 if (num_entries < increment_size)
1416 if (board(dev)->layout == LAYOUT_64XX) { 1416 num_entries = increment_size;
1417 s = &dev->subdevices[3]; 1417 if (num_entries > fifo->max_segment_length)
1418 s->type = COMEDI_SUBD_DO; 1418 num_entries = fifo->max_segment_length;
1419 s->subdev_flags = SDF_WRITABLE | SDF_READABLE;
1420 s->n_chan = 4;
1421 s->maxdata = 1;
1422 s->range_table = &range_digital;
1423 s->insn_bits = do_wbits;
1424 } else
1425 s->type = COMEDI_SUBD_UNUSED;
1426 1419
1427 /* 8255 */ 1420 /* 1 == 256 entries, 2 == 512 entries, etc */
1428 s = &dev->subdevices[4]; 1421 num_increments = (num_entries + increment_size / 2) / increment_size;
1429 if (board(dev)->has_8255) {
1430 if (board(dev)->layout == LAYOUT_4020) {
1431 dio_8255_iobase =
1432 priv(dev)->main_iobase + I8255_4020_REG;
1433 subdev_8255_init(dev, s, dio_callback_4020,
1434 (unsigned long)dio_8255_iobase);
1435 } else {
1436 dio_8255_iobase =
1437 priv(dev)->dio_counter_iobase + DIO_8255_OFFSET;
1438 subdev_8255_init(dev, s, dio_callback,
1439 (unsigned long)dio_8255_iobase);
1440 }
1441 } else
1442 s->type = COMEDI_SUBD_UNUSED;
1443 1422
1444 /* 8 channel dio for 60xx */ 1423 bits = (~(num_increments - 1)) & fifo->fifo_size_reg_mask;
1445 s = &dev->subdevices[5]; 1424 devpriv->fifo_size_bits &= ~fifo->fifo_size_reg_mask;
1446 if (board(dev)->layout == LAYOUT_60XX) { 1425 devpriv->fifo_size_bits |= bits;
1447 s->type = COMEDI_SUBD_DIO; 1426 writew(devpriv->fifo_size_bits,
1448 s->subdev_flags = SDF_WRITABLE | SDF_READABLE; 1427 devpriv->main_iobase + FIFO_SIZE_REG);
1449 s->n_chan = 8;
1450 s->maxdata = 1;
1451 s->range_table = &range_digital;
1452 s->insn_config = dio_60xx_config_insn;
1453 s->insn_bits = dio_60xx_wbits;
1454 } else
1455 s->type = COMEDI_SUBD_UNUSED;
1456 1428
1457 /* caldac */ 1429 devpriv->ai_fifo_segment_length = num_increments * increment_size;
1458 s = &dev->subdevices[6];
1459 s->type = COMEDI_SUBD_CALIB;
1460 s->subdev_flags = SDF_READABLE | SDF_WRITABLE | SDF_INTERNAL;
1461 s->n_chan = 8;
1462 if (board(dev)->layout == LAYOUT_4020)
1463 s->maxdata = 0xfff;
1464 else
1465 s->maxdata = 0xff;
1466 s->insn_read = calib_read_insn;
1467 s->insn_write = calib_write_insn;
1468 for (i = 0; i < s->n_chan; i++)
1469 caldac_write(dev, i, s->maxdata / 2);
1470 1430
1471 /* 2 channel ad8402 potentiometer */ 1431 DEBUG_PRINT("set hardware fifo segment length to %i\n",
1472 s = &dev->subdevices[7]; 1432 devpriv->ai_fifo_segment_length);
1473 if (board(dev)->layout == LAYOUT_64XX) {
1474 s->type = COMEDI_SUBD_CALIB;
1475 s->subdev_flags = SDF_READABLE | SDF_WRITABLE | SDF_INTERNAL;
1476 s->n_chan = 2;
1477 s->insn_read = ad8402_read_insn;
1478 s->insn_write = ad8402_write_insn;
1479 s->maxdata = 0xff;
1480 for (i = 0; i < s->n_chan; i++)
1481 ad8402_write(dev, i, s->maxdata / 2);
1482 } else
1483 s->type = COMEDI_SUBD_UNUSED;
1484 1433
1485 /* serial EEPROM, if present */ 1434 return devpriv->ai_fifo_segment_length;
1486 s = &dev->subdevices[8]; 1435}
1487 if (readl(priv(dev)->plx9080_iobase + PLX_CONTROL_REG) & CTL_EECHK) {
1488 s->type = COMEDI_SUBD_MEMORY;
1489 s->subdev_flags = SDF_READABLE | SDF_INTERNAL;
1490 s->n_chan = 128;
1491 s->maxdata = 0xffff;
1492 s->insn_read = eeprom_read_insn;
1493 } else
1494 s->type = COMEDI_SUBD_UNUSED;
1495 1436
1496 /* user counter subd XXX */ 1437/* adjusts the size of hardware fifo (which determines block size for dma xfers) */
1497 s = &dev->subdevices[9]; 1438static int set_ai_fifo_size(struct comedi_device *dev, unsigned int num_samples)
1498 s->type = COMEDI_SUBD_UNUSED; 1439{
1440 const struct pcidas64_board *thisboard = comedi_board(dev);
1441 unsigned int num_fifo_entries;
1442 int retval;
1443 const struct hw_fifo_info *const fifo = thisboard->ai_fifo;
1499 1444
1500 return 0; 1445 num_fifo_entries = num_samples / fifo->sample_packing_ratio;
1446
1447 retval = set_ai_fifo_segment_length(dev,
1448 num_fifo_entries /
1449 fifo->num_segments);
1450 if (retval < 0)
1451 return retval;
1452
1453 num_samples = retval * fifo->num_segments * fifo->sample_packing_ratio;
1454
1455 DEBUG_PRINT("set hardware fifo size to %i\n", num_samples);
1456
1457 return num_samples;
1501} 1458}
1502 1459
1503static void disable_plx_interrupts(struct comedi_device *dev) 1460/* query length of fifo */
1461static unsigned int ai_fifo_size(struct comedi_device *dev)
1504{ 1462{
1505 priv(dev)->plx_intcsr_bits = 0; 1463 const struct pcidas64_board *thisboard = comedi_board(dev);
1506 writel(priv(dev)->plx_intcsr_bits, 1464 struct pcidas64_private *devpriv = dev->private;
1507 priv(dev)->plx9080_iobase + PLX_INTRCS_REG); 1465
1466 return devpriv->ai_fifo_segment_length *
1467 thisboard->ai_fifo->num_segments *
1468 thisboard->ai_fifo->sample_packing_ratio;
1508} 1469}
1509 1470
1510static void init_stc_registers(struct comedi_device *dev) 1471static void init_stc_registers(struct comedi_device *dev)
1511{ 1472{
1473 const struct pcidas64_board *thisboard = comedi_board(dev);
1474 struct pcidas64_private *devpriv = dev->private;
1512 uint16_t bits; 1475 uint16_t bits;
1513 unsigned long flags; 1476 unsigned long flags;
1514 1477
1515 spin_lock_irqsave(&dev->spinlock, flags); 1478 spin_lock_irqsave(&dev->spinlock, flags);
1516 1479
1517 /* bit should be set for 6025, although docs say boards with <= 16 chans should be cleared XXX */ 1480 /* bit should be set for 6025,
1481 * although docs say boards with <= 16 chans should be cleared XXX */
1518 if (1) 1482 if (1)
1519 priv(dev)->adc_control1_bits |= ADC_QUEUE_CONFIG_BIT; 1483 devpriv->adc_control1_bits |= ADC_QUEUE_CONFIG_BIT;
1520 writew(priv(dev)->adc_control1_bits, 1484 writew(devpriv->adc_control1_bits,
1521 priv(dev)->main_iobase + ADC_CONTROL1_REG); 1485 devpriv->main_iobase + ADC_CONTROL1_REG);
1522 1486
1523 /* 6402/16 manual says this register must be initialized to 0xff? */ 1487 /* 6402/16 manual says this register must be initialized to 0xff? */
1524 writew(0xff, priv(dev)->main_iobase + ADC_SAMPLE_INTERVAL_UPPER_REG); 1488 writew(0xff, devpriv->main_iobase + ADC_SAMPLE_INTERVAL_UPPER_REG);
1525 1489
1526 bits = SLOW_DAC_BIT | DMA_CH_SELECT_BIT; 1490 bits = SLOW_DAC_BIT | DMA_CH_SELECT_BIT;
1527 if (board(dev)->layout == LAYOUT_4020) 1491 if (thisboard->layout == LAYOUT_4020)
1528 bits |= INTERNAL_CLOCK_4020_BITS; 1492 bits |= INTERNAL_CLOCK_4020_BITS;
1529 priv(dev)->hw_config_bits |= bits; 1493 devpriv->hw_config_bits |= bits;
1530 writew(priv(dev)->hw_config_bits, 1494 writew(devpriv->hw_config_bits,
1531 priv(dev)->main_iobase + HW_CONFIG_REG); 1495 devpriv->main_iobase + HW_CONFIG_REG);
1532 1496
1533 writew(0, priv(dev)->main_iobase + DAQ_SYNC_REG); 1497 writew(0, devpriv->main_iobase + DAQ_SYNC_REG);
1534 writew(0, priv(dev)->main_iobase + CALIBRATION_REG); 1498 writew(0, devpriv->main_iobase + CALIBRATION_REG);
1535 1499
1536 spin_unlock_irqrestore(&dev->spinlock, flags); 1500 spin_unlock_irqrestore(&dev->spinlock, flags);
1537 1501
1538 /* set fifos to maximum size */ 1502 /* set fifos to maximum size */
1539 priv(dev)->fifo_size_bits |= DAC_FIFO_BITS; 1503 devpriv->fifo_size_bits |= DAC_FIFO_BITS;
1540 set_ai_fifo_segment_length(dev, 1504 set_ai_fifo_segment_length(dev,
1541 board(dev)->ai_fifo->max_segment_length); 1505 thisboard->ai_fifo->max_segment_length);
1542 1506
1543 priv(dev)->dac_control1_bits = DAC_OUTPUT_ENABLE_BIT; 1507 devpriv->dac_control1_bits = DAC_OUTPUT_ENABLE_BIT;
1544 priv(dev)->intr_enable_bits = /* EN_DAC_INTR_SRC_BIT | DAC_INTR_QEMPTY_BITS | */ 1508 devpriv->intr_enable_bits =
1545 EN_DAC_DONE_INTR_BIT | EN_DAC_UNDERRUN_BIT; 1509 /* EN_DAC_INTR_SRC_BIT | DAC_INTR_QEMPTY_BITS | */
1546 writew(priv(dev)->intr_enable_bits, 1510 EN_DAC_DONE_INTR_BIT | EN_DAC_UNDERRUN_BIT;
1547 priv(dev)->main_iobase + INTR_ENABLE_REG); 1511 writew(devpriv->intr_enable_bits,
1512 devpriv->main_iobase + INTR_ENABLE_REG);
1548 1513
1549 disable_ai_pacing(dev); 1514 disable_ai_pacing(dev);
1550}; 1515};
1551 1516
1552static int alloc_and_init_dma_members(struct comedi_device *dev) 1517static int alloc_and_init_dma_members(struct comedi_device *dev)
1553{ 1518{
1519 const struct pcidas64_board *thisboard = comedi_board(dev);
1554 struct pci_dev *pcidev = comedi_to_pci_dev(dev); 1520 struct pci_dev *pcidev = comedi_to_pci_dev(dev);
1521 struct pcidas64_private *devpriv = dev->private;
1555 int i; 1522 int i;
1556 1523
1557 /* alocate pci dma buffers */ 1524 /* alocate pci dma buffers */
1558 for (i = 0; i < ai_dma_ring_count(board(dev)); i++) { 1525 for (i = 0; i < ai_dma_ring_count(thisboard); i++) {
1559 priv(dev)->ai_buffer[i] = 1526 devpriv->ai_buffer[i] =
1560 pci_alloc_consistent(pcidev, DMA_BUFFER_SIZE, 1527 pci_alloc_consistent(pcidev, DMA_BUFFER_SIZE,
1561 &priv(dev)->ai_buffer_bus_addr[i]); 1528 &devpriv->ai_buffer_bus_addr[i]);
1562 if (priv(dev)->ai_buffer[i] == NULL) 1529 if (devpriv->ai_buffer[i] == NULL)
1563 return -ENOMEM; 1530 return -ENOMEM;
1564 1531
1565 } 1532 }
1566 for (i = 0; i < AO_DMA_RING_COUNT; i++) { 1533 for (i = 0; i < AO_DMA_RING_COUNT; i++) {
1567 if (ao_cmd_is_supported(board(dev))) { 1534 if (ao_cmd_is_supported(thisboard)) {
1568 priv(dev)->ao_buffer[i] = 1535 devpriv->ao_buffer[i] =
1569 pci_alloc_consistent(pcidev, 1536 pci_alloc_consistent(pcidev, DMA_BUFFER_SIZE,
1570 DMA_BUFFER_SIZE, 1537 &devpriv->
1571 &priv(dev)-> 1538 ao_buffer_bus_addr[i]);
1572 ao_buffer_bus_addr[i]); 1539 if (devpriv->ao_buffer[i] == NULL)
1573 if (priv(dev)->ao_buffer[i] == NULL)
1574 return -ENOMEM; 1540 return -ENOMEM;
1575 1541
1576 } 1542 }
1577 } 1543 }
1578 /* allocate dma descriptors */ 1544 /* allocate dma descriptors */
1579 priv(dev)->ai_dma_desc = 1545 devpriv->ai_dma_desc =
1580 pci_alloc_consistent(pcidev, 1546 pci_alloc_consistent(pcidev, sizeof(struct plx_dma_desc) *
1581 sizeof(struct plx_dma_desc) * 1547 ai_dma_ring_count(thisboard),
1582 ai_dma_ring_count(board(dev)), 1548 &devpriv->ai_dma_desc_bus_addr);
1583 &priv(dev)->ai_dma_desc_bus_addr); 1549 if (devpriv->ai_dma_desc == NULL)
1584 if (priv(dev)->ai_dma_desc == NULL)
1585 return -ENOMEM; 1550 return -ENOMEM;
1586 1551
1587 DEBUG_PRINT("ai dma descriptors start at bus addr 0x%x\n", 1552 DEBUG_PRINT("ai dma descriptors start at bus addr 0x%llx\n",
1588 priv(dev)->ai_dma_desc_bus_addr); 1553 (unsigned long long)devpriv->ai_dma_desc_bus_addr);
1589 if (ao_cmd_is_supported(board(dev))) { 1554 if (ao_cmd_is_supported(thisboard)) {
1590 priv(dev)->ao_dma_desc = 1555 devpriv->ao_dma_desc =
1591 pci_alloc_consistent(pcidev, 1556 pci_alloc_consistent(pcidev,
1592 sizeof(struct plx_dma_desc) * 1557 sizeof(struct plx_dma_desc) *
1593 AO_DMA_RING_COUNT, 1558 AO_DMA_RING_COUNT,
1594 &priv(dev)->ao_dma_desc_bus_addr); 1559 &devpriv->ao_dma_desc_bus_addr);
1595 if (priv(dev)->ao_dma_desc == NULL) 1560 if (devpriv->ao_dma_desc == NULL)
1596 return -ENOMEM; 1561 return -ENOMEM;
1597 1562
1598 DEBUG_PRINT("ao dma descriptors start at bus addr 0x%x\n", 1563 DEBUG_PRINT("ao dma descriptors start at bus addr 0x%llx\n",
1599 priv(dev)->ao_dma_desc_bus_addr); 1564 (unsigned long long)devpriv->ao_dma_desc_bus_addr);
1600 } 1565 }
1601 /* initialize dma descriptors */ 1566 /* initialize dma descriptors */
1602 for (i = 0; i < ai_dma_ring_count(board(dev)); i++) { 1567 for (i = 0; i < ai_dma_ring_count(thisboard); i++) {
1603 priv(dev)->ai_dma_desc[i].pci_start_addr = 1568 devpriv->ai_dma_desc[i].pci_start_addr =
1604 cpu_to_le32(priv(dev)->ai_buffer_bus_addr[i]); 1569 cpu_to_le32(devpriv->ai_buffer_bus_addr[i]);
1605 if (board(dev)->layout == LAYOUT_4020) 1570 if (thisboard->layout == LAYOUT_4020)
1606 priv(dev)->ai_dma_desc[i].local_start_addr = 1571 devpriv->ai_dma_desc[i].local_start_addr =
1607 cpu_to_le32(priv(dev)->local1_iobase + 1572 cpu_to_le32(devpriv->local1_iobase +
1608 ADC_FIFO_REG); 1573 ADC_FIFO_REG);
1609 else 1574 else
1610 priv(dev)->ai_dma_desc[i].local_start_addr = 1575 devpriv->ai_dma_desc[i].local_start_addr =
1611 cpu_to_le32(priv(dev)->local0_iobase + 1576 cpu_to_le32(devpriv->local0_iobase +
1612 ADC_FIFO_REG); 1577 ADC_FIFO_REG);
1613 priv(dev)->ai_dma_desc[i].transfer_size = cpu_to_le32(0); 1578 devpriv->ai_dma_desc[i].transfer_size = cpu_to_le32(0);
1614 priv(dev)->ai_dma_desc[i].next = 1579 devpriv->ai_dma_desc[i].next =
1615 cpu_to_le32((priv(dev)->ai_dma_desc_bus_addr + ((i + 1580 cpu_to_le32((devpriv->ai_dma_desc_bus_addr +
1616 1) % 1581 ((i + 1) % ai_dma_ring_count(thisboard)) *
1617 ai_dma_ring_count 1582 sizeof(devpriv->ai_dma_desc[0])) |
1618 (board 1583 PLX_DESC_IN_PCI_BIT | PLX_INTR_TERM_COUNT |
1619 (dev))) * 1584 PLX_XFER_LOCAL_TO_PCI);
1620 sizeof(priv(dev)->ai_dma_desc[0])) |
1621 PLX_DESC_IN_PCI_BIT | PLX_INTR_TERM_COUNT |
1622 PLX_XFER_LOCAL_TO_PCI);
1623 } 1585 }
1624 if (ao_cmd_is_supported(board(dev))) { 1586 if (ao_cmd_is_supported(thisboard)) {
1625 for (i = 0; i < AO_DMA_RING_COUNT; i++) { 1587 for (i = 0; i < AO_DMA_RING_COUNT; i++) {
1626 priv(dev)->ao_dma_desc[i].pci_start_addr = 1588 devpriv->ao_dma_desc[i].pci_start_addr =
1627 cpu_to_le32(priv(dev)->ao_buffer_bus_addr[i]); 1589 cpu_to_le32(devpriv->ao_buffer_bus_addr[i]);
1628 priv(dev)->ao_dma_desc[i].local_start_addr = 1590 devpriv->ao_dma_desc[i].local_start_addr =
1629 cpu_to_le32(priv(dev)->local0_iobase + 1591 cpu_to_le32(devpriv->local0_iobase +
1630 DAC_FIFO_REG); 1592 DAC_FIFO_REG);
1631 priv(dev)->ao_dma_desc[i].transfer_size = 1593 devpriv->ao_dma_desc[i].transfer_size = cpu_to_le32(0);
1632 cpu_to_le32(0); 1594 devpriv->ao_dma_desc[i].next =
1633 priv(dev)->ao_dma_desc[i].next = 1595 cpu_to_le32((devpriv->ao_dma_desc_bus_addr +
1634 cpu_to_le32((priv(dev)->ao_dma_desc_bus_addr + 1596 ((i + 1) % (AO_DMA_RING_COUNT)) *
1635 ((i + 1) % (AO_DMA_RING_COUNT)) * 1597 sizeof(devpriv->ao_dma_desc[0])) |
1636 sizeof(priv(dev)->ao_dma_desc[0])) | 1598 PLX_DESC_IN_PCI_BIT |
1637 PLX_DESC_IN_PCI_BIT | 1599 PLX_INTR_TERM_COUNT);
1638 PLX_INTR_TERM_COUNT);
1639 } 1600 }
1640 } 1601 }
1641 return 0; 1602 return 0;
@@ -1649,216 +1610,140 @@ static inline void warn_external_queue(struct comedi_device *dev)
1649 "Use internal AI channel queue (channels must be consecutive and use same range/aref)"); 1610 "Use internal AI channel queue (channels must be consecutive and use same range/aref)");
1650} 1611}
1651 1612
1652static struct pci_dev *cb_pcidas64_find_pci_dev(struct comedi_device *dev, 1613/* Their i2c requires a huge delay on setting clock or data high for some reason */
1653 struct comedi_devconfig *it) 1614static const int i2c_high_udelay = 1000;
1615static const int i2c_low_udelay = 10;
1616
1617/* set i2c data line high or low */
1618static void i2c_set_sda(struct comedi_device *dev, int state)
1654{ 1619{
1655 struct pci_dev *pcidev = NULL; 1620 struct pcidas64_private *devpriv = dev->private;
1656 int bus = it->options[0]; 1621 static const int data_bit = CTL_EE_W;
1657 int slot = it->options[1]; 1622 void __iomem *plx_control_addr = devpriv->plx9080_iobase +
1658 int i; 1623 PLX_CONTROL_REG;
1659 1624
1660 for_each_pci_dev(pcidev) { 1625 if (state) {
1661 if (bus || slot) { 1626 /* set data line high */
1662 if (bus != pcidev->bus->number || 1627 devpriv->plx_control_bits &= ~data_bit;
1663 slot != PCI_SLOT(pcidev->devfn)) 1628 writel(devpriv->plx_control_bits, plx_control_addr);
1664 continue; 1629 udelay(i2c_high_udelay);
1665 } 1630 } else { /* set data line low */
1666 if (pcidev->vendor != PCI_VENDOR_ID_COMPUTERBOARDS) 1631
1667 continue; 1632 devpriv->plx_control_bits |= data_bit;
1668 1633 writel(devpriv->plx_control_bits, plx_control_addr);
1669 for (i = 0; i < ARRAY_SIZE(pcidas64_boards); i++) { 1634 udelay(i2c_low_udelay);
1670 if (pcidas64_boards[i].device_id != pcidev->device)
1671 continue;
1672 dev->board_ptr = pcidas64_boards + i;
1673 return pcidev;
1674 }
1675 } 1635 }
1676 dev_err(dev->class_dev,
1677 "No supported board found! (req. bus %d, slot %d)\n",
1678 bus, slot);
1679 return NULL;
1680} 1636}
1681 1637
1682/* 1638/* set i2c clock line high or low */
1683 * Attach is called by the Comedi core to configure the driver 1639static void i2c_set_scl(struct comedi_device *dev, int state)
1684 * for a particular board.
1685 */
1686static int attach(struct comedi_device *dev, struct comedi_devconfig *it)
1687{ 1640{
1688 struct pci_dev *pcidev; 1641 struct pcidas64_private *devpriv = dev->private;
1689 uint32_t local_range, local_decode; 1642 static const int clock_bit = CTL_USERO;
1690 int retval; 1643 void __iomem *plx_control_addr = devpriv->plx9080_iobase +
1691 1644 PLX_CONTROL_REG;
1692/*
1693 * Allocate the private structure area.
1694 */
1695 if (alloc_private(dev, sizeof(struct pcidas64_private)) < 0)
1696 return -ENOMEM;
1697 1645
1698 pcidev = cb_pcidas64_find_pci_dev(dev, it); 1646 if (state) {
1699 if (!pcidev) 1647 /* set clock line high */
1700 return -EIO; 1648 devpriv->plx_control_bits &= ~clock_bit;
1701 comedi_set_hw_dev(dev, &pcidev->dev); 1649 writel(devpriv->plx_control_bits, plx_control_addr);
1650 udelay(i2c_high_udelay);
1651 } else { /* set clock line low */
1702 1652
1703 if (comedi_pci_enable(pcidev, dev->driver->driver_name)) { 1653 devpriv->plx_control_bits |= clock_bit;
1704 dev_warn(dev->class_dev, 1654 writel(devpriv->plx_control_bits, plx_control_addr);
1705 "failed to enable PCI device and request regions\n"); 1655 udelay(i2c_low_udelay);
1706 return -EIO;
1707 } 1656 }
1708 pci_set_master(pcidev); 1657}
1709
1710 /* Initialize dev->board_name */
1711 dev->board_name = board(dev)->name;
1712 1658
1713 dev->iobase = pci_resource_start(pcidev, MAIN_BADDRINDEX); 1659static void i2c_write_byte(struct comedi_device *dev, uint8_t byte)
1660{
1661 uint8_t bit;
1662 unsigned int num_bits = 8;
1714 1663
1715 priv(dev)->plx9080_phys_iobase = 1664 DEBUG_PRINT("writing to i2c byte 0x%x\n", byte);
1716 pci_resource_start(pcidev, PLX9080_BADDRINDEX);
1717 priv(dev)->main_phys_iobase = dev->iobase;
1718 priv(dev)->dio_counter_phys_iobase =
1719 pci_resource_start(pcidev, DIO_COUNTER_BADDRINDEX);
1720 1665
1721 /* remap, won't work with 2.0 kernels but who cares */ 1666 for (bit = 1 << (num_bits - 1); bit; bit >>= 1) {
1722 priv(dev)->plx9080_iobase = ioremap(priv(dev)->plx9080_phys_iobase, 1667 i2c_set_scl(dev, 0);
1723 pci_resource_len(pcidev, 1668 if ((byte & bit))
1724 PLX9080_BADDRINDEX)); 1669 i2c_set_sda(dev, 1);
1725 priv(dev)->main_iobase = 1670 else
1726 ioremap(priv(dev)->main_phys_iobase, 1671 i2c_set_sda(dev, 0);
1727 pci_resource_len(pcidev, MAIN_BADDRINDEX)); 1672 i2c_set_scl(dev, 1);
1728 priv(dev)->dio_counter_iobase =
1729 ioremap(priv(dev)->dio_counter_phys_iobase,
1730 pci_resource_len(pcidev, DIO_COUNTER_BADDRINDEX));
1731
1732 if (!priv(dev)->plx9080_iobase || !priv(dev)->main_iobase
1733 || !priv(dev)->dio_counter_iobase) {
1734 dev_warn(dev->class_dev, "failed to remap io memory\n");
1735 return -ENOMEM;
1736 } 1673 }
1674}
1737 1675
1738 DEBUG_PRINT(" plx9080 remapped to 0x%p\n", priv(dev)->plx9080_iobase); 1676/* we can't really read the lines, so fake it */
1739 DEBUG_PRINT(" main remapped to 0x%p\n", priv(dev)->main_iobase); 1677static int i2c_read_ack(struct comedi_device *dev)
1740 DEBUG_PRINT(" diocounter remapped to 0x%p\n", 1678{
1741 priv(dev)->dio_counter_iobase); 1679 i2c_set_scl(dev, 0);
1742 1680 i2c_set_sda(dev, 1);
1743 /* figure out what local addresses are */ 1681 i2c_set_scl(dev, 1);
1744 local_range =
1745 readl(priv(dev)->plx9080_iobase + PLX_LAS0RNG_REG) & LRNG_MEM_MASK;
1746 local_decode =
1747 readl(priv(dev)->plx9080_iobase +
1748 PLX_LAS0MAP_REG) & local_range & LMAP_MEM_MASK;
1749 priv(dev)->local0_iobase =
1750 ((uint32_t) priv(dev)->main_phys_iobase & ~local_range) |
1751 local_decode;
1752 local_range =
1753 readl(priv(dev)->plx9080_iobase + PLX_LAS1RNG_REG) & LRNG_MEM_MASK;
1754 local_decode =
1755 readl(priv(dev)->plx9080_iobase +
1756 PLX_LAS1MAP_REG) & local_range & LMAP_MEM_MASK;
1757 priv(dev)->local1_iobase =
1758 ((uint32_t) priv(dev)->dio_counter_phys_iobase & ~local_range) |
1759 local_decode;
1760
1761 DEBUG_PRINT(" local 0 io addr 0x%x\n", priv(dev)->local0_iobase);
1762 DEBUG_PRINT(" local 1 io addr 0x%x\n", priv(dev)->local1_iobase);
1763
1764 retval = alloc_and_init_dma_members(dev);
1765 if (retval < 0)
1766 return retval;
1767
1768 priv(dev)->hw_revision =
1769 hw_revision(dev, readw(priv(dev)->main_iobase + HW_STATUS_REG));
1770 dev_dbg(dev->class_dev, "stc hardware revision %i\n",
1771 priv(dev)->hw_revision);
1772 init_plx9080(dev);
1773 init_stc_registers(dev);
1774 /* get irq */
1775 if (request_irq(pcidev->irq, handle_interrupt, IRQF_SHARED,
1776 "cb_pcidas64", dev)) {
1777 dev_dbg(dev->class_dev, "unable to allocate irq %u\n",
1778 pcidev->irq);
1779 return -EINVAL;
1780 }
1781 dev->irq = pcidev->irq;
1782 dev_dbg(dev->class_dev, "irq %u\n", dev->irq);
1783 1682
1784 retval = setup_subdevices(dev); 1683 return 0; /* return fake acknowledge bit */
1785 if (retval < 0) 1684}
1786 return retval;
1787 1685
1686/* send start bit */
1687static void i2c_start(struct comedi_device *dev)
1688{
1689 i2c_set_scl(dev, 1);
1690 i2c_set_sda(dev, 1);
1691 i2c_set_sda(dev, 0);
1692}
1788 1693
1789 return 0; 1694/* send stop bit */
1695static void i2c_stop(struct comedi_device *dev)
1696{
1697 i2c_set_scl(dev, 0);
1698 i2c_set_sda(dev, 0);
1699 i2c_set_scl(dev, 1);
1700 i2c_set_sda(dev, 1);
1790} 1701}
1791 1702
1792static void detach(struct comedi_device *dev) 1703static void i2c_write(struct comedi_device *dev, unsigned int address,
1704 const uint8_t *data, unsigned int length)
1793{ 1705{
1794 struct pci_dev *pcidev = comedi_to_pci_dev(dev); 1706 struct pcidas64_private *devpriv = dev->private;
1795 unsigned int i; 1707 unsigned int i;
1708 uint8_t bitstream;
1709 static const int read_bit = 0x1;
1796 1710
1797 if (dev->irq) 1711 /* XXX need mutex to prevent simultaneous attempts to access
1798 free_irq(dev->irq, dev); 1712 * eeprom and i2c bus */
1799 if (priv(dev)) { 1713
1800 if (pcidev) { 1714 /* make sure we dont send anything to eeprom */
1801 if (priv(dev)->plx9080_iobase) { 1715 devpriv->plx_control_bits &= ~CTL_EE_CS;
1802 disable_plx_interrupts(dev); 1716
1803 iounmap(priv(dev)->plx9080_iobase); 1717 i2c_stop(dev);
1804 } 1718 i2c_start(dev);
1805 if (priv(dev)->main_iobase) 1719
1806 iounmap(priv(dev)->main_iobase); 1720 /* send address and write bit */
1807 if (priv(dev)->dio_counter_iobase) 1721 bitstream = (address << 1) & ~read_bit;
1808 iounmap(priv(dev)->dio_counter_iobase); 1722 i2c_write_byte(dev, bitstream);
1809 /* free pci dma buffers */
1810 for (i = 0; i < ai_dma_ring_count(board(dev)); i++) {
1811 if (priv(dev)->ai_buffer[i])
1812 pci_free_consistent(pcidev,
1813 DMA_BUFFER_SIZE,
1814 priv(dev)->
1815 ai_buffer[i],
1816 priv
1817 (dev)->ai_buffer_bus_addr
1818 [i]);
1819 }
1820 for (i = 0; i < AO_DMA_RING_COUNT; i++) {
1821 if (priv(dev)->ao_buffer[i])
1822 pci_free_consistent(pcidev,
1823 DMA_BUFFER_SIZE,
1824 priv(dev)->
1825 ao_buffer[i],
1826 priv
1827 (dev)->ao_buffer_bus_addr
1828 [i]);
1829 }
1830 /* free dma descriptors */
1831 if (priv(dev)->ai_dma_desc)
1832 pci_free_consistent(pcidev,
1833 sizeof(struct plx_dma_desc)
1834 *
1835 ai_dma_ring_count(board
1836 (dev)),
1837 priv(dev)->ai_dma_desc,
1838 priv(dev)->
1839 ai_dma_desc_bus_addr);
1840 if (priv(dev)->ao_dma_desc)
1841 pci_free_consistent(pcidev,
1842 sizeof(struct plx_dma_desc)
1843 * AO_DMA_RING_COUNT,
1844 priv(dev)->ao_dma_desc,
1845 priv(dev)->
1846 ao_dma_desc_bus_addr);
1847 }
1848 }
1849 if (dev->subdevices)
1850 subdev_8255_cleanup(dev, &dev->subdevices[4]);
1851 if (pcidev) {
1852 if (dev->iobase)
1853 comedi_pci_disable(pcidev);
1854 1723
1855 pci_dev_put(pcidev); 1724 /* get acknowledge */
1725 if (i2c_read_ack(dev) != 0) {
1726 comedi_error(dev, "i2c write failed: no acknowledge");
1727 i2c_stop(dev);
1728 return;
1856 } 1729 }
1730 /* write data bytes */
1731 for (i = 0; i < length; i++) {
1732 i2c_write_byte(dev, data[i]);
1733 if (i2c_read_ack(dev) != 0) {
1734 comedi_error(dev, "i2c write failed: no acknowledge");
1735 i2c_stop(dev);
1736 return;
1737 }
1738 }
1739 i2c_stop(dev);
1857} 1740}
1858 1741
1859static int ai_rinsn(struct comedi_device *dev, struct comedi_subdevice *s, 1742static int ai_rinsn(struct comedi_device *dev, struct comedi_subdevice *s,
1860 struct comedi_insn *insn, unsigned int *data) 1743 struct comedi_insn *insn, unsigned int *data)
1861{ 1744{
1745 const struct pcidas64_board *thisboard = comedi_board(dev);
1746 struct pcidas64_private *devpriv = dev->private;
1862 unsigned int bits = 0, n, i; 1747 unsigned int bits = 0, n, i;
1863 unsigned int channel, range, aref; 1748 unsigned int channel, range, aref;
1864 unsigned long flags; 1749 unsigned long flags;
@@ -1875,35 +1760,37 @@ static int ai_rinsn(struct comedi_device *dev, struct comedi_subdevice *s,
1875 1760
1876 spin_lock_irqsave(&dev->spinlock, flags); 1761 spin_lock_irqsave(&dev->spinlock, flags);
1877 if (insn->chanspec & CR_ALT_FILTER) 1762 if (insn->chanspec & CR_ALT_FILTER)
1878 priv(dev)->adc_control1_bits |= ADC_DITHER_BIT; 1763 devpriv->adc_control1_bits |= ADC_DITHER_BIT;
1879 else 1764 else
1880 priv(dev)->adc_control1_bits &= ~ADC_DITHER_BIT; 1765 devpriv->adc_control1_bits &= ~ADC_DITHER_BIT;
1881 writew(priv(dev)->adc_control1_bits, 1766 writew(devpriv->adc_control1_bits,
1882 priv(dev)->main_iobase + ADC_CONTROL1_REG); 1767 devpriv->main_iobase + ADC_CONTROL1_REG);
1883 spin_unlock_irqrestore(&dev->spinlock, flags); 1768 spin_unlock_irqrestore(&dev->spinlock, flags);
1884 1769
1885 if (board(dev)->layout != LAYOUT_4020) { 1770 if (thisboard->layout != LAYOUT_4020) {
1886 /* use internal queue */ 1771 /* use internal queue */
1887 priv(dev)->hw_config_bits &= ~EXT_QUEUE_BIT; 1772 devpriv->hw_config_bits &= ~EXT_QUEUE_BIT;
1888 writew(priv(dev)->hw_config_bits, 1773 writew(devpriv->hw_config_bits,
1889 priv(dev)->main_iobase + HW_CONFIG_REG); 1774 devpriv->main_iobase + HW_CONFIG_REG);
1890 1775
1891 /* ALT_SOURCE is internal calibration reference */ 1776 /* ALT_SOURCE is internal calibration reference */
1892 if (insn->chanspec & CR_ALT_SOURCE) { 1777 if (insn->chanspec & CR_ALT_SOURCE) {
1893 unsigned int cal_en_bit; 1778 unsigned int cal_en_bit;
1894 1779
1895 DEBUG_PRINT("reading calibration source\n"); 1780 DEBUG_PRINT("reading calibration source\n");
1896 if (board(dev)->layout == LAYOUT_60XX) 1781 if (thisboard->layout == LAYOUT_60XX)
1897 cal_en_bit = CAL_EN_60XX_BIT; 1782 cal_en_bit = CAL_EN_60XX_BIT;
1898 else 1783 else
1899 cal_en_bit = CAL_EN_64XX_BIT; 1784 cal_en_bit = CAL_EN_64XX_BIT;
1900 /* select internal reference source to connect to channel 0 */ 1785 /* select internal reference source to connect
1786 * to channel 0 */
1901 writew(cal_en_bit | 1787 writew(cal_en_bit |
1902 adc_src_bits(priv(dev)->calibration_source), 1788 adc_src_bits(devpriv->calibration_source),
1903 priv(dev)->main_iobase + CALIBRATION_REG); 1789 devpriv->main_iobase + CALIBRATION_REG);
1904 } else { 1790 } else {
1905 /* make sure internal calibration source is turned off */ 1791 /* make sure internal calibration source
1906 writew(0, priv(dev)->main_iobase + CALIBRATION_REG); 1792 * is turned off */
1793 writew(0, devpriv->main_iobase + CALIBRATION_REG);
1907 } 1794 }
1908 /* load internal queue */ 1795 /* load internal queue */
1909 bits = 0; 1796 bits = 0;
@@ -1916,56 +1803,56 @@ static int ai_rinsn(struct comedi_device *dev, struct comedi_subdevice *s,
1916 bits |= adc_chan_bits(channel); 1803 bits |= adc_chan_bits(channel);
1917 /* set stop channel */ 1804 /* set stop channel */
1918 writew(adc_chan_bits(channel), 1805 writew(adc_chan_bits(channel),
1919 priv(dev)->main_iobase + ADC_QUEUE_HIGH_REG); 1806 devpriv->main_iobase + ADC_QUEUE_HIGH_REG);
1920 /* set start channel, and rest of settings */ 1807 /* set start channel, and rest of settings */
1921 writew(bits, priv(dev)->main_iobase + ADC_QUEUE_LOAD_REG); 1808 writew(bits, devpriv->main_iobase + ADC_QUEUE_LOAD_REG);
1922 } else { 1809 } else {
1923 uint8_t old_cal_range_bits = priv(dev)->i2c_cal_range_bits; 1810 uint8_t old_cal_range_bits = devpriv->i2c_cal_range_bits;
1924 1811
1925 priv(dev)->i2c_cal_range_bits &= ~ADC_SRC_4020_MASK; 1812 devpriv->i2c_cal_range_bits &= ~ADC_SRC_4020_MASK;
1926 if (insn->chanspec & CR_ALT_SOURCE) { 1813 if (insn->chanspec & CR_ALT_SOURCE) {
1927 DEBUG_PRINT("reading calibration source\n"); 1814 DEBUG_PRINT("reading calibration source\n");
1928 priv(dev)->i2c_cal_range_bits |= 1815 devpriv->i2c_cal_range_bits |=
1929 adc_src_4020_bits(priv(dev)->calibration_source); 1816 adc_src_4020_bits(devpriv->calibration_source);
1930 } else { /* select BNC inputs */ 1817 } else { /* select BNC inputs */
1931 priv(dev)->i2c_cal_range_bits |= adc_src_4020_bits(4); 1818 devpriv->i2c_cal_range_bits |= adc_src_4020_bits(4);
1932 } 1819 }
1933 /* select range */ 1820 /* select range */
1934 if (range == 0) 1821 if (range == 0)
1935 priv(dev)->i2c_cal_range_bits |= attenuate_bit(channel); 1822 devpriv->i2c_cal_range_bits |= attenuate_bit(channel);
1936 else 1823 else
1937 priv(dev)->i2c_cal_range_bits &= 1824 devpriv->i2c_cal_range_bits &= ~attenuate_bit(channel);
1938 ~attenuate_bit(channel); 1825 /* update calibration/range i2c register only if necessary,
1939 /* update calibration/range i2c register only if necessary, as it is very slow */ 1826 * as it is very slow */
1940 if (old_cal_range_bits != priv(dev)->i2c_cal_range_bits) { 1827 if (old_cal_range_bits != devpriv->i2c_cal_range_bits) {
1941 uint8_t i2c_data = priv(dev)->i2c_cal_range_bits; 1828 uint8_t i2c_data = devpriv->i2c_cal_range_bits;
1942 i2c_write(dev, RANGE_CAL_I2C_ADDR, &i2c_data, 1829 i2c_write(dev, RANGE_CAL_I2C_ADDR, &i2c_data,
1943 sizeof(i2c_data)); 1830 sizeof(i2c_data));
1944 } 1831 }
1945 1832
1946 /* 4020 manual asks that sample interval register to be set before writing to convert register. 1833 /* 4020 manual asks that sample interval register to be set
1947 * Using somewhat arbitrary setting of 4 master clock ticks = 0.1 usec */ 1834 * before writing to convert register.
1948 writew(0, 1835 * Using somewhat arbitrary setting of 4 master clock ticks
1949 priv(dev)->main_iobase + ADC_SAMPLE_INTERVAL_UPPER_REG); 1836 * = 0.1 usec */
1950 writew(2, 1837 writew(0, devpriv->main_iobase + ADC_SAMPLE_INTERVAL_UPPER_REG);
1951 priv(dev)->main_iobase + ADC_SAMPLE_INTERVAL_LOWER_REG); 1838 writew(2, devpriv->main_iobase + ADC_SAMPLE_INTERVAL_LOWER_REG);
1952 } 1839 }
1953 1840
1954 for (n = 0; n < insn->n; n++) { 1841 for (n = 0; n < insn->n; n++) {
1955 1842
1956 /* clear adc buffer (inside loop for 4020 sake) */ 1843 /* clear adc buffer (inside loop for 4020 sake) */
1957 writew(0, priv(dev)->main_iobase + ADC_BUFFER_CLEAR_REG); 1844 writew(0, devpriv->main_iobase + ADC_BUFFER_CLEAR_REG);
1958 1845
1959 /* trigger conversion, bits sent only matter for 4020 */ 1846 /* trigger conversion, bits sent only matter for 4020 */
1960 writew(adc_convert_chan_4020_bits(CR_CHAN(insn->chanspec)), 1847 writew(adc_convert_chan_4020_bits(CR_CHAN(insn->chanspec)),
1961 priv(dev)->main_iobase + ADC_CONVERT_REG); 1848 devpriv->main_iobase + ADC_CONVERT_REG);
1962 1849
1963 /* wait for data */ 1850 /* wait for data */
1964 for (i = 0; i < timeout; i++) { 1851 for (i = 0; i < timeout; i++) {
1965 bits = readw(priv(dev)->main_iobase + HW_STATUS_REG); 1852 bits = readw(devpriv->main_iobase + HW_STATUS_REG);
1966 DEBUG_PRINT(" pipe bits 0x%x\n", pipe_full_bits(bits)); 1853 DEBUG_PRINT(" pipe bits 0x%x\n", pipe_full_bits(bits));
1967 if (board(dev)->layout == LAYOUT_4020) { 1854 if (thisboard->layout == LAYOUT_4020) {
1968 if (readw(priv(dev)->main_iobase + 1855 if (readw(devpriv->main_iobase +
1969 ADC_WRITE_PNTR_REG)) 1856 ADC_WRITE_PNTR_REG))
1970 break; 1857 break;
1971 } else { 1858 } else {
@@ -1977,16 +1864,14 @@ static int ai_rinsn(struct comedi_device *dev, struct comedi_subdevice *s,
1977 DEBUG_PRINT(" looped %i times waiting for data\n", i); 1864 DEBUG_PRINT(" looped %i times waiting for data\n", i);
1978 if (i == timeout) { 1865 if (i == timeout) {
1979 comedi_error(dev, " analog input read insn timed out"); 1866 comedi_error(dev, " analog input read insn timed out");
1980 printk(" status 0x%x\n", bits); 1867 dev_info(dev->class_dev, "status 0x%x\n", bits);
1981 return -ETIME; 1868 return -ETIME;
1982 } 1869 }
1983 if (board(dev)->layout == LAYOUT_4020) 1870 if (thisboard->layout == LAYOUT_4020)
1984 data[n] = 1871 data[n] = readl(devpriv->dio_counter_iobase +
1985 readl(priv(dev)->dio_counter_iobase + 1872 ADC_FIFO_REG) & 0xffff;
1986 ADC_FIFO_REG) & 0xffff;
1987 else 1873 else
1988 data[n] = 1874 data[n] = readw(devpriv->main_iobase + PIPE1_READ_REG);
1989 readw(priv(dev)->main_iobase + PIPE1_READ_REG);
1990 } 1875 }
1991 1876
1992 return n; 1877 return n;
@@ -1995,10 +1880,12 @@ static int ai_rinsn(struct comedi_device *dev, struct comedi_subdevice *s,
1995static int ai_config_calibration_source(struct comedi_device *dev, 1880static int ai_config_calibration_source(struct comedi_device *dev,
1996 unsigned int *data) 1881 unsigned int *data)
1997{ 1882{
1883 const struct pcidas64_board *thisboard = comedi_board(dev);
1884 struct pcidas64_private *devpriv = dev->private;
1998 unsigned int source = data[1]; 1885 unsigned int source = data[1];
1999 int num_calibration_sources; 1886 int num_calibration_sources;
2000 1887
2001 if (board(dev)->layout == LAYOUT_60XX) 1888 if (thisboard->layout == LAYOUT_60XX)
2002 num_calibration_sources = 16; 1889 num_calibration_sources = 16;
2003 else 1890 else
2004 num_calibration_sources = 8; 1891 num_calibration_sources = 8;
@@ -2009,23 +1896,24 @@ static int ai_config_calibration_source(struct comedi_device *dev,
2009 } 1896 }
2010 1897
2011 DEBUG_PRINT("setting calibration source to %i\n", source); 1898 DEBUG_PRINT("setting calibration source to %i\n", source);
2012 priv(dev)->calibration_source = source; 1899 devpriv->calibration_source = source;
2013 1900
2014 return 2; 1901 return 2;
2015} 1902}
2016 1903
2017static int ai_config_block_size(struct comedi_device *dev, unsigned int *data) 1904static int ai_config_block_size(struct comedi_device *dev, unsigned int *data)
2018{ 1905{
1906 const struct pcidas64_board *thisboard = comedi_board(dev);
2019 int fifo_size; 1907 int fifo_size;
2020 const struct hw_fifo_info *const fifo = board(dev)->ai_fifo; 1908 const struct hw_fifo_info *const fifo = thisboard->ai_fifo;
2021 unsigned int block_size, requested_block_size; 1909 unsigned int block_size, requested_block_size;
2022 int retval; 1910 int retval;
2023 1911
2024 requested_block_size = data[1]; 1912 requested_block_size = data[1];
2025 1913
2026 if (requested_block_size) { 1914 if (requested_block_size) {
2027 fifo_size = 1915 fifo_size = requested_block_size * fifo->num_segments /
2028 requested_block_size * fifo->num_segments / bytes_in_sample; 1916 bytes_in_sample;
2029 1917
2030 retval = set_ai_fifo_size(dev, fifo_size); 1918 retval = set_ai_fifo_size(dev, fifo_size);
2031 if (retval < 0) 1919 if (retval < 0)
@@ -2043,6 +1931,7 @@ static int ai_config_block_size(struct comedi_device *dev, unsigned int *data)
2043static int ai_config_master_clock_4020(struct comedi_device *dev, 1931static int ai_config_master_clock_4020(struct comedi_device *dev,
2044 unsigned int *data) 1932 unsigned int *data)
2045{ 1933{
1934 struct pcidas64_private *devpriv = dev->private;
2046 unsigned int divisor = data[4]; 1935 unsigned int divisor = data[4];
2047 int retval = 0; 1936 int retval = 0;
2048 1937
@@ -2053,8 +1942,8 @@ static int ai_config_master_clock_4020(struct comedi_device *dev,
2053 1942
2054 switch (data[1]) { 1943 switch (data[1]) {
2055 case COMEDI_EV_SCAN_BEGIN: 1944 case COMEDI_EV_SCAN_BEGIN:
2056 priv(dev)->ext_clock.divisor = divisor; 1945 devpriv->ext_clock.divisor = divisor;
2057 priv(dev)->ext_clock.chanspec = data[2]; 1946 devpriv->ext_clock.chanspec = data[2];
2058 break; 1947 break;
2059 default: 1948 default:
2060 return -EINVAL; 1949 return -EINVAL;
@@ -2069,8 +1958,9 @@ static int ai_config_master_clock_4020(struct comedi_device *dev,
2069/* XXX could add support for 60xx series */ 1958/* XXX could add support for 60xx series */
2070static int ai_config_master_clock(struct comedi_device *dev, unsigned int *data) 1959static int ai_config_master_clock(struct comedi_device *dev, unsigned int *data)
2071{ 1960{
1961 const struct pcidas64_board *thisboard = comedi_board(dev);
2072 1962
2073 switch (board(dev)->layout) { 1963 switch (thisboard->layout) {
2074 case LAYOUT_4020: 1964 case LAYOUT_4020:
2075 return ai_config_master_clock_4020(dev, data); 1965 return ai_config_master_clock_4020(dev, data);
2076 break; 1966 break;
@@ -2104,9 +1994,84 @@ static int ai_config_insn(struct comedi_device *dev, struct comedi_subdevice *s,
2104 return -EINVAL; 1994 return -EINVAL;
2105} 1995}
2106 1996
1997/* Gets nearest achievable timing given master clock speed, does not
1998 * take into account possible minimum/maximum divisor values. Used
1999 * by other timing checking functions. */
2000static unsigned int get_divisor(unsigned int ns, unsigned int flags)
2001{
2002 unsigned int divisor;
2003
2004 switch (flags & TRIG_ROUND_MASK) {
2005 case TRIG_ROUND_UP:
2006 divisor = (ns + TIMER_BASE - 1) / TIMER_BASE;
2007 break;
2008 case TRIG_ROUND_DOWN:
2009 divisor = ns / TIMER_BASE;
2010 break;
2011 case TRIG_ROUND_NEAREST:
2012 default:
2013 divisor = (ns + TIMER_BASE / 2) / TIMER_BASE;
2014 break;
2015 }
2016 return divisor;
2017}
2018
2019/* utility function that rounds desired timing to an achievable time, and
2020 * sets cmd members appropriately.
2021 * adc paces conversions from master clock by dividing by (x + 3) where x is 24 bit number
2022 */
2023static void check_adc_timing(struct comedi_device *dev, struct comedi_cmd *cmd)
2024{
2025 const struct pcidas64_board *thisboard = comedi_board(dev);
2026 unsigned int convert_divisor = 0, scan_divisor;
2027 static const int min_convert_divisor = 3;
2028 static const int max_convert_divisor =
2029 max_counter_value + min_convert_divisor;
2030 static const int min_scan_divisor_4020 = 2;
2031 unsigned long long max_scan_divisor, min_scan_divisor;
2032
2033 if (cmd->convert_src == TRIG_TIMER) {
2034 if (thisboard->layout == LAYOUT_4020) {
2035 cmd->convert_arg = 0;
2036 } else {
2037 convert_divisor = get_divisor(cmd->convert_arg,
2038 cmd->flags);
2039 if (convert_divisor > max_convert_divisor)
2040 convert_divisor = max_convert_divisor;
2041 if (convert_divisor < min_convert_divisor)
2042 convert_divisor = min_convert_divisor;
2043 cmd->convert_arg = convert_divisor * TIMER_BASE;
2044 }
2045 } else if (cmd->convert_src == TRIG_NOW) {
2046 cmd->convert_arg = 0;
2047 }
2048
2049 if (cmd->scan_begin_src == TRIG_TIMER) {
2050 scan_divisor = get_divisor(cmd->scan_begin_arg, cmd->flags);
2051 if (cmd->convert_src == TRIG_TIMER) {
2052 /* XXX check for integer overflows */
2053 min_scan_divisor = convert_divisor * cmd->chanlist_len;
2054 max_scan_divisor =
2055 (convert_divisor * cmd->chanlist_len - 1) +
2056 max_counter_value;
2057 } else {
2058 min_scan_divisor = min_scan_divisor_4020;
2059 max_scan_divisor = max_counter_value + min_scan_divisor;
2060 }
2061 if (scan_divisor > max_scan_divisor)
2062 scan_divisor = max_scan_divisor;
2063 if (scan_divisor < min_scan_divisor)
2064 scan_divisor = min_scan_divisor;
2065 cmd->scan_begin_arg = scan_divisor * TIMER_BASE;
2066 }
2067
2068 return;
2069}
2070
2107static int ai_cmdtest(struct comedi_device *dev, struct comedi_subdevice *s, 2071static int ai_cmdtest(struct comedi_device *dev, struct comedi_subdevice *s,
2108 struct comedi_cmd *cmd) 2072 struct comedi_cmd *cmd)
2109{ 2073{
2074 const struct pcidas64_board *thisboard = comedi_board(dev);
2110 int err = 0; 2075 int err = 0;
2111 unsigned int tmp_arg, tmp_arg2; 2076 unsigned int tmp_arg, tmp_arg2;
2112 int i; 2077 int i;
@@ -2118,22 +2083,21 @@ static int ai_cmdtest(struct comedi_device *dev, struct comedi_subdevice *s,
2118 err |= cfc_check_trigger_src(&cmd->start_src, TRIG_NOW | TRIG_EXT); 2083 err |= cfc_check_trigger_src(&cmd->start_src, TRIG_NOW | TRIG_EXT);
2119 2084
2120 triggers = TRIG_TIMER; 2085 triggers = TRIG_TIMER;
2121 if (board(dev)->layout == LAYOUT_4020) 2086 if (thisboard->layout == LAYOUT_4020)
2122 triggers |= TRIG_OTHER; 2087 triggers |= TRIG_OTHER;
2123 else 2088 else
2124 triggers |= TRIG_FOLLOW; 2089 triggers |= TRIG_FOLLOW;
2125 err |= cfc_check_trigger_src(&cmd->scan_begin_src, triggers); 2090 err |= cfc_check_trigger_src(&cmd->scan_begin_src, triggers);
2126 2091
2127 triggers = TRIG_TIMER; 2092 triggers = TRIG_TIMER;
2128 if (board(dev)->layout == LAYOUT_4020) 2093 if (thisboard->layout == LAYOUT_4020)
2129 triggers |= TRIG_NOW; 2094 triggers |= TRIG_NOW;
2130 else 2095 else
2131 triggers |= TRIG_EXT; 2096 triggers |= TRIG_EXT;
2132 err |= cfc_check_trigger_src(&cmd->convert_src, triggers); 2097 err |= cfc_check_trigger_src(&cmd->convert_src, triggers);
2133
2134 err |= cfc_check_trigger_src(&cmd->scan_end_src, TRIG_COUNT); 2098 err |= cfc_check_trigger_src(&cmd->scan_end_src, TRIG_COUNT);
2135 err |= cfc_check_trigger_src(&cmd->stop_src, 2099 err |= cfc_check_trigger_src(&cmd->stop_src,
2136 TRIG_COUNT | TRIG_EXT | TRIG_NONE); 2100 TRIG_COUNT | TRIG_EXT | TRIG_NONE);
2137 2101
2138 if (err) 2102 if (err)
2139 return 1; 2103 return 1;
@@ -2156,55 +2120,34 @@ static int ai_cmdtest(struct comedi_device *dev, struct comedi_subdevice *s,
2156 if (err) 2120 if (err)
2157 return 2; 2121 return 2;
2158 2122
2159 /* step 3: make sure arguments are trivially compatible */ 2123 /* Step 3: check if arguments are trivially valid */
2160 2124
2161 if (cmd->convert_src == TRIG_TIMER) { 2125 if (cmd->convert_src == TRIG_TIMER) {
2162 if (board(dev)->layout == LAYOUT_4020) { 2126 if (thisboard->layout == LAYOUT_4020) {
2163 if (cmd->convert_arg) { 2127 err |= cfc_check_trigger_arg_is(&cmd->convert_arg, 0);
2164 cmd->convert_arg = 0;
2165 err++;
2166 }
2167 } else { 2128 } else {
2168 if (cmd->convert_arg < board(dev)->ai_speed) { 2129 err |= cfc_check_trigger_arg_min(&cmd->convert_arg,
2169 cmd->convert_arg = board(dev)->ai_speed; 2130 thisboard->ai_speed);
2170 err++; 2131 /* if scans are timed faster than conversion rate allows */
2171 } 2132 if (cmd->scan_begin_src == TRIG_TIMER)
2172 if (cmd->scan_begin_src == TRIG_TIMER) { 2133 err |= cfc_check_trigger_arg_min(
2173 /* if scans are timed faster than conversion rate allows */ 2134 &cmd->scan_begin_arg,
2174 if (cmd->convert_arg * cmd->chanlist_len > 2135 cmd->convert_arg *
2175 cmd->scan_begin_arg) { 2136 cmd->chanlist_len);
2176 cmd->scan_begin_arg =
2177 cmd->convert_arg *
2178 cmd->chanlist_len;
2179 err++;
2180 }
2181 }
2182 } 2137 }
2183 } 2138 }
2184 2139
2185 if (!cmd->chanlist_len) { 2140 err |= cfc_check_trigger_arg_min(&cmd->chanlist_len, 1);
2186 cmd->chanlist_len = 1; 2141 err |= cfc_check_trigger_arg_is(&cmd->scan_end_arg, cmd->chanlist_len);
2187 err++;
2188 }
2189 if (cmd->scan_end_arg != cmd->chanlist_len) {
2190 cmd->scan_end_arg = cmd->chanlist_len;
2191 err++;
2192 }
2193 2142
2194 switch (cmd->stop_src) { 2143 switch (cmd->stop_src) {
2195 case TRIG_EXT: 2144 case TRIG_EXT:
2196 break; 2145 break;
2197 case TRIG_COUNT: 2146 case TRIG_COUNT:
2198 if (!cmd->stop_arg) { 2147 err |= cfc_check_trigger_arg_min(&cmd->stop_arg, 1);
2199 cmd->stop_arg = 1;
2200 err++;
2201 }
2202 break; 2148 break;
2203 case TRIG_NONE: 2149 case TRIG_NONE:
2204 if (cmd->stop_arg != 0) { 2150 err |= cfc_check_trigger_arg_is(&cmd->stop_arg, 0);
2205 cmd->stop_arg = 0;
2206 err++;
2207 }
2208 break; 2151 break;
2209 default: 2152 default:
2210 break; 2153 break;
@@ -2240,7 +2183,7 @@ static int ai_cmdtest(struct comedi_device *dev, struct comedi_subdevice *s,
2240 } 2183 }
2241 } 2184 }
2242 /* check 4020 chanlist */ 2185 /* check 4020 chanlist */
2243 if (board(dev)->layout == LAYOUT_4020) { 2186 if (thisboard->layout == LAYOUT_4020) {
2244 unsigned int first_channel = CR_CHAN(cmd->chanlist[0]); 2187 unsigned int first_channel = CR_CHAN(cmd->chanlist[0]);
2245 for (i = 1; i < cmd->chanlist_len; i++) { 2188 for (i = 1; i < cmd->chanlist_len; i++) {
2246 if (CR_CHAN(cmd->chanlist[i]) != 2189 if (CR_CHAN(cmd->chanlist[i]) !=
@@ -2279,89 +2222,37 @@ static int use_hw_sample_counter(struct comedi_cmd *cmd)
2279static void setup_sample_counters(struct comedi_device *dev, 2222static void setup_sample_counters(struct comedi_device *dev,
2280 struct comedi_cmd *cmd) 2223 struct comedi_cmd *cmd)
2281{ 2224{
2225 struct pcidas64_private *devpriv = dev->private;
2226
2282 if (cmd->stop_src == TRIG_COUNT) { 2227 if (cmd->stop_src == TRIG_COUNT) {
2283 /* set software count */ 2228 /* set software count */
2284 priv(dev)->ai_count = cmd->stop_arg * cmd->chanlist_len; 2229 devpriv->ai_count = cmd->stop_arg * cmd->chanlist_len;
2285 } 2230 }
2286 /* load hardware conversion counter */ 2231 /* load hardware conversion counter */
2287 if (use_hw_sample_counter(cmd)) { 2232 if (use_hw_sample_counter(cmd)) {
2288 writew(cmd->stop_arg & 0xffff, 2233 writew(cmd->stop_arg & 0xffff,
2289 priv(dev)->main_iobase + ADC_COUNT_LOWER_REG); 2234 devpriv->main_iobase + ADC_COUNT_LOWER_REG);
2290 writew((cmd->stop_arg >> 16) & 0xff, 2235 writew((cmd->stop_arg >> 16) & 0xff,
2291 priv(dev)->main_iobase + ADC_COUNT_UPPER_REG); 2236 devpriv->main_iobase + ADC_COUNT_UPPER_REG);
2292 } else { 2237 } else {
2293 writew(1, priv(dev)->main_iobase + ADC_COUNT_LOWER_REG); 2238 writew(1, devpriv->main_iobase + ADC_COUNT_LOWER_REG);
2294 } 2239 }
2295} 2240}
2296 2241
2297static inline unsigned int dma_transfer_size(struct comedi_device *dev) 2242static inline unsigned int dma_transfer_size(struct comedi_device *dev)
2298{ 2243{
2244 const struct pcidas64_board *thisboard = comedi_board(dev);
2245 struct pcidas64_private *devpriv = dev->private;
2299 unsigned int num_samples; 2246 unsigned int num_samples;
2300 2247
2301 num_samples = 2248 num_samples = devpriv->ai_fifo_segment_length *
2302 priv(dev)->ai_fifo_segment_length * 2249 thisboard->ai_fifo->sample_packing_ratio;
2303 board(dev)->ai_fifo->sample_packing_ratio;
2304 if (num_samples > DMA_BUFFER_SIZE / sizeof(uint16_t)) 2250 if (num_samples > DMA_BUFFER_SIZE / sizeof(uint16_t))
2305 num_samples = DMA_BUFFER_SIZE / sizeof(uint16_t); 2251 num_samples = DMA_BUFFER_SIZE / sizeof(uint16_t);
2306 2252
2307 return num_samples; 2253 return num_samples;
2308} 2254}
2309 2255
2310static void disable_ai_pacing(struct comedi_device *dev)
2311{
2312 unsigned long flags;
2313
2314 disable_ai_interrupts(dev);
2315
2316 spin_lock_irqsave(&dev->spinlock, flags);
2317 priv(dev)->adc_control1_bits &= ~ADC_SW_GATE_BIT;
2318 writew(priv(dev)->adc_control1_bits,
2319 priv(dev)->main_iobase + ADC_CONTROL1_REG);
2320 spin_unlock_irqrestore(&dev->spinlock, flags);
2321
2322 /* disable pacing, triggering, etc */
2323 writew(ADC_DMA_DISABLE_BIT | ADC_SOFT_GATE_BITS | ADC_GATE_LEVEL_BIT,
2324 priv(dev)->main_iobase + ADC_CONTROL0_REG);
2325}
2326
2327static void disable_ai_interrupts(struct comedi_device *dev)
2328{
2329 unsigned long flags;
2330
2331 spin_lock_irqsave(&dev->spinlock, flags);
2332 priv(dev)->intr_enable_bits &=
2333 ~EN_ADC_INTR_SRC_BIT & ~EN_ADC_DONE_INTR_BIT &
2334 ~EN_ADC_ACTIVE_INTR_BIT & ~EN_ADC_STOP_INTR_BIT &
2335 ~EN_ADC_OVERRUN_BIT & ~ADC_INTR_SRC_MASK;
2336 writew(priv(dev)->intr_enable_bits,
2337 priv(dev)->main_iobase + INTR_ENABLE_REG);
2338 spin_unlock_irqrestore(&dev->spinlock, flags);
2339
2340 DEBUG_PRINT("intr enable bits 0x%x\n", priv(dev)->intr_enable_bits);
2341}
2342
2343static void enable_ai_interrupts(struct comedi_device *dev,
2344 const struct comedi_cmd *cmd)
2345{
2346 uint32_t bits;
2347 unsigned long flags;
2348
2349 bits = EN_ADC_OVERRUN_BIT | EN_ADC_DONE_INTR_BIT |
2350 EN_ADC_ACTIVE_INTR_BIT | EN_ADC_STOP_INTR_BIT;
2351 /* Use pio transfer and interrupt on end of conversion if TRIG_WAKE_EOS flag is set. */
2352 if (cmd->flags & TRIG_WAKE_EOS) {
2353 /* 4020 doesn't support pio transfers except for fifo dregs */
2354 if (board(dev)->layout != LAYOUT_4020)
2355 bits |= ADC_INTR_EOSCAN_BITS | EN_ADC_INTR_SRC_BIT;
2356 }
2357 spin_lock_irqsave(&dev->spinlock, flags);
2358 priv(dev)->intr_enable_bits |= bits;
2359 writew(priv(dev)->intr_enable_bits,
2360 priv(dev)->main_iobase + INTR_ENABLE_REG);
2361 DEBUG_PRINT("intr enable bits 0x%x\n", priv(dev)->intr_enable_bits);
2362 spin_unlock_irqrestore(&dev->spinlock, flags);
2363}
2364
2365static uint32_t ai_convert_counter_6xxx(const struct comedi_device *dev, 2256static uint32_t ai_convert_counter_6xxx(const struct comedi_device *dev,
2366 const struct comedi_cmd *cmd) 2257 const struct comedi_cmd *cmd)
2367{ 2258{
@@ -2373,12 +2264,13 @@ static uint32_t ai_scan_counter_6xxx(struct comedi_device *dev,
2373 struct comedi_cmd *cmd) 2264 struct comedi_cmd *cmd)
2374{ 2265{
2375 uint32_t count; 2266 uint32_t count;
2267
2376 /* figure out how long we need to delay at end of scan */ 2268 /* figure out how long we need to delay at end of scan */
2377 switch (cmd->scan_begin_src) { 2269 switch (cmd->scan_begin_src) {
2378 case TRIG_TIMER: 2270 case TRIG_TIMER:
2379 count = (cmd->scan_begin_arg - 2271 count = (cmd->scan_begin_arg -
2380 (cmd->convert_arg * (cmd->chanlist_len - 1))) 2272 (cmd->convert_arg * (cmd->chanlist_len - 1))) /
2381 / TIMER_BASE; 2273 TIMER_BASE;
2382 break; 2274 break;
2383 case TRIG_FOLLOW: 2275 case TRIG_FOLLOW:
2384 count = cmd->convert_arg / TIMER_BASE; 2276 count = cmd->convert_arg / TIMER_BASE;
@@ -2393,6 +2285,7 @@ static uint32_t ai_scan_counter_6xxx(struct comedi_device *dev,
2393static uint32_t ai_convert_counter_4020(struct comedi_device *dev, 2285static uint32_t ai_convert_counter_4020(struct comedi_device *dev,
2394 struct comedi_cmd *cmd) 2286 struct comedi_cmd *cmd)
2395{ 2287{
2288 struct pcidas64_private *devpriv = dev->private;
2396 unsigned int divisor; 2289 unsigned int divisor;
2397 2290
2398 switch (cmd->scan_begin_src) { 2291 switch (cmd->scan_begin_src) {
@@ -2400,7 +2293,7 @@ static uint32_t ai_convert_counter_4020(struct comedi_device *dev,
2400 divisor = cmd->scan_begin_arg / TIMER_BASE; 2293 divisor = cmd->scan_begin_arg / TIMER_BASE;
2401 break; 2294 break;
2402 case TRIG_OTHER: 2295 case TRIG_OTHER:
2403 divisor = priv(dev)->ext_clock.divisor; 2296 divisor = devpriv->ext_clock.divisor;
2404 break; 2297 break;
2405 default: /* should never happen */ 2298 default: /* should never happen */
2406 comedi_error(dev, "bug! failed to set ai pacing!"); 2299 comedi_error(dev, "bug! failed to set ai pacing!");
@@ -2415,26 +2308,30 @@ static uint32_t ai_convert_counter_4020(struct comedi_device *dev,
2415static void select_master_clock_4020(struct comedi_device *dev, 2308static void select_master_clock_4020(struct comedi_device *dev,
2416 const struct comedi_cmd *cmd) 2309 const struct comedi_cmd *cmd)
2417{ 2310{
2311 struct pcidas64_private *devpriv = dev->private;
2312
2418 /* select internal/external master clock */ 2313 /* select internal/external master clock */
2419 priv(dev)->hw_config_bits &= ~MASTER_CLOCK_4020_MASK; 2314 devpriv->hw_config_bits &= ~MASTER_CLOCK_4020_MASK;
2420 if (cmd->scan_begin_src == TRIG_OTHER) { 2315 if (cmd->scan_begin_src == TRIG_OTHER) {
2421 int chanspec = priv(dev)->ext_clock.chanspec; 2316 int chanspec = devpriv->ext_clock.chanspec;
2422 2317
2423 if (CR_CHAN(chanspec)) 2318 if (CR_CHAN(chanspec))
2424 priv(dev)->hw_config_bits |= BNC_CLOCK_4020_BITS; 2319 devpriv->hw_config_bits |= BNC_CLOCK_4020_BITS;
2425 else 2320 else
2426 priv(dev)->hw_config_bits |= EXT_CLOCK_4020_BITS; 2321 devpriv->hw_config_bits |= EXT_CLOCK_4020_BITS;
2427 } else { 2322 } else {
2428 priv(dev)->hw_config_bits |= INTERNAL_CLOCK_4020_BITS; 2323 devpriv->hw_config_bits |= INTERNAL_CLOCK_4020_BITS;
2429 } 2324 }
2430 writew(priv(dev)->hw_config_bits, 2325 writew(devpriv->hw_config_bits,
2431 priv(dev)->main_iobase + HW_CONFIG_REG); 2326 devpriv->main_iobase + HW_CONFIG_REG);
2432} 2327}
2433 2328
2434static void select_master_clock(struct comedi_device *dev, 2329static void select_master_clock(struct comedi_device *dev,
2435 const struct comedi_cmd *cmd) 2330 const struct comedi_cmd *cmd)
2436{ 2331{
2437 switch (board(dev)->layout) { 2332 const struct pcidas64_board *thisboard = comedi_board(dev);
2333
2334 switch (thisboard->layout) {
2438 case LAYOUT_4020: 2335 case LAYOUT_4020:
2439 select_master_clock_4020(dev, cmd); 2336 select_master_clock_4020(dev, cmd);
2440 break; 2337 break;
@@ -2446,6 +2343,7 @@ static void select_master_clock(struct comedi_device *dev,
2446static inline void dma_start_sync(struct comedi_device *dev, 2343static inline void dma_start_sync(struct comedi_device *dev,
2447 unsigned int channel) 2344 unsigned int channel)
2448{ 2345{
2346 struct pcidas64_private *devpriv = dev->private;
2449 unsigned long flags; 2347 unsigned long flags;
2450 2348
2451 /* spinlock for plx dma control/status reg */ 2349 /* spinlock for plx dma control/status reg */
@@ -2453,23 +2351,25 @@ static inline void dma_start_sync(struct comedi_device *dev,
2453 if (channel) 2351 if (channel)
2454 writeb(PLX_DMA_EN_BIT | PLX_DMA_START_BIT | 2352 writeb(PLX_DMA_EN_BIT | PLX_DMA_START_BIT |
2455 PLX_CLEAR_DMA_INTR_BIT, 2353 PLX_CLEAR_DMA_INTR_BIT,
2456 priv(dev)->plx9080_iobase + PLX_DMA1_CS_REG); 2354 devpriv->plx9080_iobase + PLX_DMA1_CS_REG);
2457 else 2355 else
2458 writeb(PLX_DMA_EN_BIT | PLX_DMA_START_BIT | 2356 writeb(PLX_DMA_EN_BIT | PLX_DMA_START_BIT |
2459 PLX_CLEAR_DMA_INTR_BIT, 2357 PLX_CLEAR_DMA_INTR_BIT,
2460 priv(dev)->plx9080_iobase + PLX_DMA0_CS_REG); 2358 devpriv->plx9080_iobase + PLX_DMA0_CS_REG);
2461 spin_unlock_irqrestore(&dev->spinlock, flags); 2359 spin_unlock_irqrestore(&dev->spinlock, flags);
2462} 2360}
2463 2361
2464static void set_ai_pacing(struct comedi_device *dev, struct comedi_cmd *cmd) 2362static void set_ai_pacing(struct comedi_device *dev, struct comedi_cmd *cmd)
2465{ 2363{
2364 const struct pcidas64_board *thisboard = comedi_board(dev);
2365 struct pcidas64_private *devpriv = dev->private;
2466 uint32_t convert_counter = 0, scan_counter = 0; 2366 uint32_t convert_counter = 0, scan_counter = 0;
2467 2367
2468 check_adc_timing(dev, cmd); 2368 check_adc_timing(dev, cmd);
2469 2369
2470 select_master_clock(dev, cmd); 2370 select_master_clock(dev, cmd);
2471 2371
2472 if (board(dev)->layout == LAYOUT_4020) { 2372 if (thisboard->layout == LAYOUT_4020) {
2473 convert_counter = ai_convert_counter_4020(dev, cmd); 2373 convert_counter = ai_convert_counter_4020(dev, cmd);
2474 } else { 2374 } else {
2475 convert_counter = ai_convert_counter_6xxx(dev, cmd); 2375 convert_counter = ai_convert_counter_6xxx(dev, cmd);
@@ -2478,23 +2378,24 @@ static void set_ai_pacing(struct comedi_device *dev, struct comedi_cmd *cmd)
2478 2378
2479 /* load lower 16 bits of convert interval */ 2379 /* load lower 16 bits of convert interval */
2480 writew(convert_counter & 0xffff, 2380 writew(convert_counter & 0xffff,
2481 priv(dev)->main_iobase + ADC_SAMPLE_INTERVAL_LOWER_REG); 2381 devpriv->main_iobase + ADC_SAMPLE_INTERVAL_LOWER_REG);
2482 DEBUG_PRINT("convert counter 0x%x\n", convert_counter); 2382 DEBUG_PRINT("convert counter 0x%x\n", convert_counter);
2483 /* load upper 8 bits of convert interval */ 2383 /* load upper 8 bits of convert interval */
2484 writew((convert_counter >> 16) & 0xff, 2384 writew((convert_counter >> 16) & 0xff,
2485 priv(dev)->main_iobase + ADC_SAMPLE_INTERVAL_UPPER_REG); 2385 devpriv->main_iobase + ADC_SAMPLE_INTERVAL_UPPER_REG);
2486 /* load lower 16 bits of scan delay */ 2386 /* load lower 16 bits of scan delay */
2487 writew(scan_counter & 0xffff, 2387 writew(scan_counter & 0xffff,
2488 priv(dev)->main_iobase + ADC_DELAY_INTERVAL_LOWER_REG); 2388 devpriv->main_iobase + ADC_DELAY_INTERVAL_LOWER_REG);
2489 /* load upper 8 bits of scan delay */ 2389 /* load upper 8 bits of scan delay */
2490 writew((scan_counter >> 16) & 0xff, 2390 writew((scan_counter >> 16) & 0xff,
2491 priv(dev)->main_iobase + ADC_DELAY_INTERVAL_UPPER_REG); 2391 devpriv->main_iobase + ADC_DELAY_INTERVAL_UPPER_REG);
2492 DEBUG_PRINT("scan counter 0x%x\n", scan_counter); 2392 DEBUG_PRINT("scan counter 0x%x\n", scan_counter);
2493} 2393}
2494 2394
2495static int use_internal_queue_6xxx(const struct comedi_cmd *cmd) 2395static int use_internal_queue_6xxx(const struct comedi_cmd *cmd)
2496{ 2396{
2497 int i; 2397 int i;
2398
2498 for (i = 0; i + 1 < cmd->chanlist_len; i++) { 2399 for (i = 0; i + 1 < cmd->chanlist_len; i++) {
2499 if (CR_CHAN(cmd->chanlist[i + 1]) != 2400 if (CR_CHAN(cmd->chanlist[i + 1]) !=
2500 CR_CHAN(cmd->chanlist[i]) + 1) 2401 CR_CHAN(cmd->chanlist[i]) + 1)
@@ -2511,14 +2412,16 @@ static int use_internal_queue_6xxx(const struct comedi_cmd *cmd)
2511static int setup_channel_queue(struct comedi_device *dev, 2412static int setup_channel_queue(struct comedi_device *dev,
2512 const struct comedi_cmd *cmd) 2413 const struct comedi_cmd *cmd)
2513{ 2414{
2415 const struct pcidas64_board *thisboard = comedi_board(dev);
2416 struct pcidas64_private *devpriv = dev->private;
2514 unsigned short bits; 2417 unsigned short bits;
2515 int i; 2418 int i;
2516 2419
2517 if (board(dev)->layout != LAYOUT_4020) { 2420 if (thisboard->layout != LAYOUT_4020) {
2518 if (use_internal_queue_6xxx(cmd)) { 2421 if (use_internal_queue_6xxx(cmd)) {
2519 priv(dev)->hw_config_bits &= ~EXT_QUEUE_BIT; 2422 devpriv->hw_config_bits &= ~EXT_QUEUE_BIT;
2520 writew(priv(dev)->hw_config_bits, 2423 writew(devpriv->hw_config_bits,
2521 priv(dev)->main_iobase + HW_CONFIG_REG); 2424 devpriv->main_iobase + HW_CONFIG_REG);
2522 bits = 0; 2425 bits = 0;
2523 /* set channel */ 2426 /* set channel */
2524 bits |= adc_chan_bits(CR_CHAN(cmd->chanlist[0])); 2427 bits |= adc_chan_bits(CR_CHAN(cmd->chanlist[0]));
@@ -2534,30 +2437,30 @@ static int setup_channel_queue(struct comedi_device *dev,
2534 /* set stop channel */ 2437 /* set stop channel */
2535 writew(adc_chan_bits 2438 writew(adc_chan_bits
2536 (CR_CHAN(cmd->chanlist[cmd->chanlist_len - 1])), 2439 (CR_CHAN(cmd->chanlist[cmd->chanlist_len - 1])),
2537 priv(dev)->main_iobase + ADC_QUEUE_HIGH_REG); 2440 devpriv->main_iobase + ADC_QUEUE_HIGH_REG);
2538 /* set start channel, and rest of settings */ 2441 /* set start channel, and rest of settings */
2539 writew(bits, 2442 writew(bits,
2540 priv(dev)->main_iobase + ADC_QUEUE_LOAD_REG); 2443 devpriv->main_iobase + ADC_QUEUE_LOAD_REG);
2541 } else { 2444 } else {
2542 /* use external queue */ 2445 /* use external queue */
2543 if (dev->write_subdev && dev->write_subdev->busy) { 2446 if (dev->write_subdev && dev->write_subdev->busy) {
2544 warn_external_queue(dev); 2447 warn_external_queue(dev);
2545 return -EBUSY; 2448 return -EBUSY;
2546 } 2449 }
2547 priv(dev)->hw_config_bits |= EXT_QUEUE_BIT; 2450 devpriv->hw_config_bits |= EXT_QUEUE_BIT;
2548 writew(priv(dev)->hw_config_bits, 2451 writew(devpriv->hw_config_bits,
2549 priv(dev)->main_iobase + HW_CONFIG_REG); 2452 devpriv->main_iobase + HW_CONFIG_REG);
2550 /* clear DAC buffer to prevent weird interactions */ 2453 /* clear DAC buffer to prevent weird interactions */
2551 writew(0, 2454 writew(0,
2552 priv(dev)->main_iobase + DAC_BUFFER_CLEAR_REG); 2455 devpriv->main_iobase + DAC_BUFFER_CLEAR_REG);
2553 /* clear queue pointer */ 2456 /* clear queue pointer */
2554 writew(0, priv(dev)->main_iobase + ADC_QUEUE_CLEAR_REG); 2457 writew(0, devpriv->main_iobase + ADC_QUEUE_CLEAR_REG);
2555 /* load external queue */ 2458 /* load external queue */
2556 for (i = 0; i < cmd->chanlist_len; i++) { 2459 for (i = 0; i < cmd->chanlist_len; i++) {
2557 bits = 0; 2460 bits = 0;
2558 /* set channel */ 2461 /* set channel */
2559 bits |= 2462 bits |= adc_chan_bits(CR_CHAN(cmd->
2560 adc_chan_bits(CR_CHAN(cmd->chanlist[i])); 2463 chanlist[i]));
2561 /* set gain */ 2464 /* set gain */
2562 bits |= ai_range_bits_6xxx(dev, 2465 bits |= ai_range_bits_6xxx(dev,
2563 CR_RANGE(cmd-> 2466 CR_RANGE(cmd->
@@ -2573,42 +2476,42 @@ static int setup_channel_queue(struct comedi_device *dev,
2573 /* mark end of queue */ 2476 /* mark end of queue */
2574 if (i == cmd->chanlist_len - 1) 2477 if (i == cmd->chanlist_len - 1)
2575 bits |= QUEUE_EOSCAN_BIT | 2478 bits |= QUEUE_EOSCAN_BIT |
2576 QUEUE_EOSEQ_BIT; 2479 QUEUE_EOSEQ_BIT;
2577 writew(bits, 2480 writew(bits,
2578 priv(dev)->main_iobase + 2481 devpriv->main_iobase +
2579 ADC_QUEUE_FIFO_REG); 2482 ADC_QUEUE_FIFO_REG);
2580 DEBUG_PRINT 2483 DEBUG_PRINT(
2581 ("wrote 0x%x to external channel queue\n", 2484 "wrote 0x%x to external channel queue\n",
2582 bits); 2485 bits);
2583 } 2486 }
2584 /* doing a queue clear is not specified in board docs, 2487 /* doing a queue clear is not specified in board docs,
2585 * but required for reliable operation */ 2488 * but required for reliable operation */
2586 writew(0, priv(dev)->main_iobase + ADC_QUEUE_CLEAR_REG); 2489 writew(0, devpriv->main_iobase + ADC_QUEUE_CLEAR_REG);
2587 /* prime queue holding register */ 2490 /* prime queue holding register */
2588 writew(0, priv(dev)->main_iobase + ADC_QUEUE_LOAD_REG); 2491 writew(0, devpriv->main_iobase + ADC_QUEUE_LOAD_REG);
2589 } 2492 }
2590 } else { 2493 } else {
2591 unsigned short old_cal_range_bits = 2494 unsigned short old_cal_range_bits = devpriv->i2c_cal_range_bits;
2592 priv(dev)->i2c_cal_range_bits;
2593 2495
2594 priv(dev)->i2c_cal_range_bits &= ~ADC_SRC_4020_MASK; 2496 devpriv->i2c_cal_range_bits &= ~ADC_SRC_4020_MASK;
2595 /* select BNC inputs */ 2497 /* select BNC inputs */
2596 priv(dev)->i2c_cal_range_bits |= adc_src_4020_bits(4); 2498 devpriv->i2c_cal_range_bits |= adc_src_4020_bits(4);
2597 /* select ranges */ 2499 /* select ranges */
2598 for (i = 0; i < cmd->chanlist_len; i++) { 2500 for (i = 0; i < cmd->chanlist_len; i++) {
2599 unsigned int channel = CR_CHAN(cmd->chanlist[i]); 2501 unsigned int channel = CR_CHAN(cmd->chanlist[i]);
2600 unsigned int range = CR_RANGE(cmd->chanlist[i]); 2502 unsigned int range = CR_RANGE(cmd->chanlist[i]);
2601 2503
2602 if (range == 0) 2504 if (range == 0)
2603 priv(dev)->i2c_cal_range_bits |= 2505 devpriv->i2c_cal_range_bits |=
2604 attenuate_bit(channel); 2506 attenuate_bit(channel);
2605 else 2507 else
2606 priv(dev)->i2c_cal_range_bits &= 2508 devpriv->i2c_cal_range_bits &=
2607 ~attenuate_bit(channel); 2509 ~attenuate_bit(channel);
2608 } 2510 }
2609 /* update calibration/range i2c register only if necessary, as it is very slow */ 2511 /* update calibration/range i2c register only if necessary,
2610 if (old_cal_range_bits != priv(dev)->i2c_cal_range_bits) { 2512 * as it is very slow */
2611 uint8_t i2c_data = priv(dev)->i2c_cal_range_bits; 2513 if (old_cal_range_bits != devpriv->i2c_cal_range_bits) {
2514 uint8_t i2c_data = devpriv->i2c_cal_range_bits;
2612 i2c_write(dev, RANGE_CAL_I2C_ADDR, &i2c_data, 2515 i2c_write(dev, RANGE_CAL_I2C_ADDR, &i2c_data,
2613 sizeof(i2c_data)); 2516 sizeof(i2c_data));
2614 } 2517 }
@@ -2620,6 +2523,8 @@ static inline void load_first_dma_descriptor(struct comedi_device *dev,
2620 unsigned int dma_channel, 2523 unsigned int dma_channel,
2621 unsigned int descriptor_bits) 2524 unsigned int descriptor_bits)
2622{ 2525{
2526 struct pcidas64_private *devpriv = dev->private;
2527
2623 /* The transfer size, pci address, and local address registers 2528 /* The transfer size, pci address, and local address registers
2624 * are supposedly unused during chained dma, 2529 * are supposedly unused during chained dma,
2625 * but I have found that left over values from last operation 2530 * but I have found that left over values from last operation
@@ -2627,25 +2532,27 @@ static inline void load_first_dma_descriptor(struct comedi_device *dev,
2627 * block. Initializing them to zero seems to fix the problem. */ 2532 * block. Initializing them to zero seems to fix the problem. */
2628 if (dma_channel) { 2533 if (dma_channel) {
2629 writel(0, 2534 writel(0,
2630 priv(dev)->plx9080_iobase + PLX_DMA1_TRANSFER_SIZE_REG); 2535 devpriv->plx9080_iobase + PLX_DMA1_TRANSFER_SIZE_REG);
2631 writel(0, priv(dev)->plx9080_iobase + PLX_DMA1_PCI_ADDRESS_REG); 2536 writel(0, devpriv->plx9080_iobase + PLX_DMA1_PCI_ADDRESS_REG);
2632 writel(0, 2537 writel(0,
2633 priv(dev)->plx9080_iobase + PLX_DMA1_LOCAL_ADDRESS_REG); 2538 devpriv->plx9080_iobase + PLX_DMA1_LOCAL_ADDRESS_REG);
2634 writel(descriptor_bits, 2539 writel(descriptor_bits,
2635 priv(dev)->plx9080_iobase + PLX_DMA1_DESCRIPTOR_REG); 2540 devpriv->plx9080_iobase + PLX_DMA1_DESCRIPTOR_REG);
2636 } else { 2541 } else {
2637 writel(0, 2542 writel(0,
2638 priv(dev)->plx9080_iobase + PLX_DMA0_TRANSFER_SIZE_REG); 2543 devpriv->plx9080_iobase + PLX_DMA0_TRANSFER_SIZE_REG);
2639 writel(0, priv(dev)->plx9080_iobase + PLX_DMA0_PCI_ADDRESS_REG); 2544 writel(0, devpriv->plx9080_iobase + PLX_DMA0_PCI_ADDRESS_REG);
2640 writel(0, 2545 writel(0,
2641 priv(dev)->plx9080_iobase + PLX_DMA0_LOCAL_ADDRESS_REG); 2546 devpriv->plx9080_iobase + PLX_DMA0_LOCAL_ADDRESS_REG);
2642 writel(descriptor_bits, 2547 writel(descriptor_bits,
2643 priv(dev)->plx9080_iobase + PLX_DMA0_DESCRIPTOR_REG); 2548 devpriv->plx9080_iobase + PLX_DMA0_DESCRIPTOR_REG);
2644 } 2549 }
2645} 2550}
2646 2551
2647static int ai_cmd(struct comedi_device *dev, struct comedi_subdevice *s) 2552static int ai_cmd(struct comedi_device *dev, struct comedi_subdevice *s)
2648{ 2553{
2554 const struct pcidas64_board *thisboard = comedi_board(dev);
2555 struct pcidas64_private *devpriv = dev->private;
2649 struct comedi_async *async = s->async; 2556 struct comedi_async *async = s->async;
2650 struct comedi_cmd *cmd = &async->cmd; 2557 struct comedi_cmd *cmd = &async->cmd;
2651 uint32_t bits; 2558 uint32_t bits;
@@ -2661,7 +2568,7 @@ static int ai_cmd(struct comedi_device *dev, struct comedi_subdevice *s)
2661 return retval; 2568 return retval;
2662 2569
2663 /* make sure internal calibration source is turned off */ 2570 /* make sure internal calibration source is turned off */
2664 writew(0, priv(dev)->main_iobase + CALIBRATION_REG); 2571 writew(0, devpriv->main_iobase + CALIBRATION_REG);
2665 2572
2666 set_ai_pacing(dev, cmd); 2573 set_ai_pacing(dev, cmd);
2667 2574
@@ -2671,50 +2578,51 @@ static int ai_cmd(struct comedi_device *dev, struct comedi_subdevice *s)
2671 2578
2672 spin_lock_irqsave(&dev->spinlock, flags); 2579 spin_lock_irqsave(&dev->spinlock, flags);
2673 /* set mode, allow conversions through software gate */ 2580 /* set mode, allow conversions through software gate */
2674 priv(dev)->adc_control1_bits |= ADC_SW_GATE_BIT; 2581 devpriv->adc_control1_bits |= ADC_SW_GATE_BIT;
2675 priv(dev)->adc_control1_bits &= ~ADC_DITHER_BIT; 2582 devpriv->adc_control1_bits &= ~ADC_DITHER_BIT;
2676 if (board(dev)->layout != LAYOUT_4020) { 2583 if (thisboard->layout != LAYOUT_4020) {
2677 priv(dev)->adc_control1_bits &= ~ADC_MODE_MASK; 2584 devpriv->adc_control1_bits &= ~ADC_MODE_MASK;
2678 if (cmd->convert_src == TRIG_EXT) 2585 if (cmd->convert_src == TRIG_EXT)
2679 priv(dev)->adc_control1_bits |= adc_mode_bits(13); /* good old mode 13 */ 2586 /* good old mode 13 */
2587 devpriv->adc_control1_bits |= adc_mode_bits(13);
2680 else 2588 else
2681 priv(dev)->adc_control1_bits |= adc_mode_bits(8); /* mode 8. What else could you need? */ 2589 /* mode 8. What else could you need? */
2590 devpriv->adc_control1_bits |= adc_mode_bits(8);
2682 } else { 2591 } else {
2683 priv(dev)->adc_control1_bits &= ~CHANNEL_MODE_4020_MASK; 2592 devpriv->adc_control1_bits &= ~CHANNEL_MODE_4020_MASK;
2684 if (cmd->chanlist_len == 4) 2593 if (cmd->chanlist_len == 4)
2685 priv(dev)->adc_control1_bits |= FOUR_CHANNEL_4020_BITS; 2594 devpriv->adc_control1_bits |= FOUR_CHANNEL_4020_BITS;
2686 else if (cmd->chanlist_len == 2) 2595 else if (cmd->chanlist_len == 2)
2687 priv(dev)->adc_control1_bits |= TWO_CHANNEL_4020_BITS; 2596 devpriv->adc_control1_bits |= TWO_CHANNEL_4020_BITS;
2688 priv(dev)->adc_control1_bits &= ~ADC_LO_CHANNEL_4020_MASK; 2597 devpriv->adc_control1_bits &= ~ADC_LO_CHANNEL_4020_MASK;
2689 priv(dev)->adc_control1_bits |= 2598 devpriv->adc_control1_bits |=
2690 adc_lo_chan_4020_bits(CR_CHAN(cmd->chanlist[0])); 2599 adc_lo_chan_4020_bits(CR_CHAN(cmd->chanlist[0]));
2691 priv(dev)->adc_control1_bits &= ~ADC_HI_CHANNEL_4020_MASK; 2600 devpriv->adc_control1_bits &= ~ADC_HI_CHANNEL_4020_MASK;
2692 priv(dev)->adc_control1_bits |= 2601 devpriv->adc_control1_bits |=
2693 adc_hi_chan_4020_bits(CR_CHAN 2602 adc_hi_chan_4020_bits(CR_CHAN(cmd->chanlist
2694 (cmd-> 2603 [cmd->chanlist_len - 1]));
2695 chanlist[cmd->chanlist_len - 1]));
2696 } 2604 }
2697 writew(priv(dev)->adc_control1_bits, 2605 writew(devpriv->adc_control1_bits,
2698 priv(dev)->main_iobase + ADC_CONTROL1_REG); 2606 devpriv->main_iobase + ADC_CONTROL1_REG);
2699 DEBUG_PRINT("control1 bits 0x%x\n", priv(dev)->adc_control1_bits); 2607 DEBUG_PRINT("control1 bits 0x%x\n", devpriv->adc_control1_bits);
2700 spin_unlock_irqrestore(&dev->spinlock, flags); 2608 spin_unlock_irqrestore(&dev->spinlock, flags);
2701 2609
2702 /* clear adc buffer */ 2610 /* clear adc buffer */
2703 writew(0, priv(dev)->main_iobase + ADC_BUFFER_CLEAR_REG); 2611 writew(0, devpriv->main_iobase + ADC_BUFFER_CLEAR_REG);
2704 2612
2705 if ((cmd->flags & TRIG_WAKE_EOS) == 0 || 2613 if ((cmd->flags & TRIG_WAKE_EOS) == 0 ||
2706 board(dev)->layout == LAYOUT_4020) { 2614 thisboard->layout == LAYOUT_4020) {
2707 priv(dev)->ai_dma_index = 0; 2615 devpriv->ai_dma_index = 0;
2708 2616
2709 /* set dma transfer size */ 2617 /* set dma transfer size */
2710 for (i = 0; i < ai_dma_ring_count(board(dev)); i++) 2618 for (i = 0; i < ai_dma_ring_count(thisboard); i++)
2711 priv(dev)->ai_dma_desc[i].transfer_size = 2619 devpriv->ai_dma_desc[i].transfer_size =
2712 cpu_to_le32(dma_transfer_size(dev) * 2620 cpu_to_le32(dma_transfer_size(dev) *
2713 sizeof(uint16_t)); 2621 sizeof(uint16_t));
2714 2622
2715 /* give location of first dma descriptor */ 2623 /* give location of first dma descriptor */
2716 load_first_dma_descriptor(dev, 1, 2624 load_first_dma_descriptor(dev, 1,
2717 priv(dev)->ai_dma_desc_bus_addr | 2625 devpriv->ai_dma_desc_bus_addr |
2718 PLX_DESC_IN_PCI_BIT | 2626 PLX_DESC_IN_PCI_BIT |
2719 PLX_INTR_TERM_COUNT | 2627 PLX_INTR_TERM_COUNT |
2720 PLX_XFER_LOCAL_TO_PCI); 2628 PLX_XFER_LOCAL_TO_PCI);
@@ -2722,14 +2630,14 @@ static int ai_cmd(struct comedi_device *dev, struct comedi_subdevice *s)
2722 dma_start_sync(dev, 1); 2630 dma_start_sync(dev, 1);
2723 } 2631 }
2724 2632
2725 if (board(dev)->layout == LAYOUT_4020) { 2633 if (thisboard->layout == LAYOUT_4020) {
2726 /* set source for external triggers */ 2634 /* set source for external triggers */
2727 bits = 0; 2635 bits = 0;
2728 if (cmd->start_src == TRIG_EXT && CR_CHAN(cmd->start_arg)) 2636 if (cmd->start_src == TRIG_EXT && CR_CHAN(cmd->start_arg))
2729 bits |= EXT_START_TRIG_BNC_BIT; 2637 bits |= EXT_START_TRIG_BNC_BIT;
2730 if (cmd->stop_src == TRIG_EXT && CR_CHAN(cmd->stop_arg)) 2638 if (cmd->stop_src == TRIG_EXT && CR_CHAN(cmd->stop_arg))
2731 bits |= EXT_STOP_TRIG_BNC_BIT; 2639 bits |= EXT_STOP_TRIG_BNC_BIT;
2732 writew(bits, priv(dev)->main_iobase + DAQ_ATRIG_LOW_4020_REG); 2640 writew(bits, devpriv->main_iobase + DAQ_ATRIG_LOW_4020_REG);
2733 } 2641 }
2734 2642
2735 spin_lock_irqsave(&dev->spinlock, flags); 2643 spin_lock_irqsave(&dev->spinlock, flags);
@@ -2747,16 +2655,16 @@ static int ai_cmd(struct comedi_device *dev, struct comedi_subdevice *s)
2747 bits |= ADC_START_TRIG_SOFT_BITS; 2655 bits |= ADC_START_TRIG_SOFT_BITS;
2748 if (use_hw_sample_counter(cmd)) 2656 if (use_hw_sample_counter(cmd))
2749 bits |= ADC_SAMPLE_COUNTER_EN_BIT; 2657 bits |= ADC_SAMPLE_COUNTER_EN_BIT;
2750 writew(bits, priv(dev)->main_iobase + ADC_CONTROL0_REG); 2658 writew(bits, devpriv->main_iobase + ADC_CONTROL0_REG);
2751 DEBUG_PRINT("control0 bits 0x%x\n", bits); 2659 DEBUG_PRINT("control0 bits 0x%x\n", bits);
2752 2660
2753 priv(dev)->ai_cmd_running = 1; 2661 devpriv->ai_cmd_running = 1;
2754 2662
2755 spin_unlock_irqrestore(&dev->spinlock, flags); 2663 spin_unlock_irqrestore(&dev->spinlock, flags);
2756 2664
2757 /* start acquisition */ 2665 /* start acquisition */
2758 if (cmd->start_src == TRIG_NOW) { 2666 if (cmd->start_src == TRIG_NOW) {
2759 writew(0, priv(dev)->main_iobase + ADC_START_REG); 2667 writew(0, devpriv->main_iobase + ADC_START_REG);
2760 DEBUG_PRINT("soft trig\n"); 2668 DEBUG_PRINT("soft trig\n");
2761 } 2669 }
2762 2670
@@ -2766,6 +2674,7 @@ static int ai_cmd(struct comedi_device *dev, struct comedi_subdevice *s)
2766/* read num_samples from 16 bit wide ai fifo */ 2674/* read num_samples from 16 bit wide ai fifo */
2767static void pio_drain_ai_fifo_16(struct comedi_device *dev) 2675static void pio_drain_ai_fifo_16(struct comedi_device *dev)
2768{ 2676{
2677 struct pcidas64_private *devpriv = dev->private;
2769 struct comedi_subdevice *s = dev->read_subdev; 2678 struct comedi_subdevice *s = dev->read_subdev;
2770 struct comedi_async *async = s->async; 2679 struct comedi_async *async = s->async;
2771 struct comedi_cmd *cmd = &async->cmd; 2680 struct comedi_cmd *cmd = &async->cmd;
@@ -2776,18 +2685,19 @@ static void pio_drain_ai_fifo_16(struct comedi_device *dev)
2776 2685
2777 do { 2686 do {
2778 /* get least significant 15 bits */ 2687 /* get least significant 15 bits */
2779 read_index = 2688 read_index = readw(devpriv->main_iobase + ADC_READ_PNTR_REG) &
2780 readw(priv(dev)->main_iobase + ADC_READ_PNTR_REG) & 0x7fff; 2689 0x7fff;
2781 write_index = 2690 write_index = readw(devpriv->main_iobase + ADC_WRITE_PNTR_REG) &
2782 readw(priv(dev)->main_iobase + ADC_WRITE_PNTR_REG) & 0x7fff; 2691 0x7fff;
2783 /* Get most significant bits (grey code). Different boards use different code 2692 /* Get most significant bits (grey code).
2784 * so use a scheme that doesn't depend on encoding. This read must 2693 * Different boards use different code so use a scheme
2694 * that doesn't depend on encoding. This read must
2785 * occur after reading least significant 15 bits to avoid race 2695 * occur after reading least significant 15 bits to avoid race
2786 * with fifo switching to next segment. */ 2696 * with fifo switching to next segment. */
2787 prepost_bits = readw(priv(dev)->main_iobase + PREPOST_REG); 2697 prepost_bits = readw(devpriv->main_iobase + PREPOST_REG);
2788 2698
2789 /* if read and write pointers are not on the same fifo segment, read to the 2699 /* if read and write pointers are not on the same fifo segment,
2790 * end of the read segment */ 2700 * read to the end of the read segment */
2791 read_segment = adc_upper_read_ptr_code(prepost_bits); 2701 read_segment = adc_upper_read_ptr_code(prepost_bits);
2792 write_segment = adc_upper_write_ptr_code(prepost_bits); 2702 write_segment = adc_upper_write_ptr_code(prepost_bits);
2793 2703
@@ -2797,17 +2707,17 @@ static void pio_drain_ai_fifo_16(struct comedi_device *dev)
2797 2707
2798 if (read_segment != write_segment) 2708 if (read_segment != write_segment)
2799 num_samples = 2709 num_samples =
2800 priv(dev)->ai_fifo_segment_length - read_index; 2710 devpriv->ai_fifo_segment_length - read_index;
2801 else 2711 else
2802 num_samples = write_index - read_index; 2712 num_samples = write_index - read_index;
2803 2713
2804 if (cmd->stop_src == TRIG_COUNT) { 2714 if (cmd->stop_src == TRIG_COUNT) {
2805 if (priv(dev)->ai_count == 0) 2715 if (devpriv->ai_count == 0)
2806 break; 2716 break;
2807 if (num_samples > priv(dev)->ai_count) 2717 if (num_samples > devpriv->ai_count)
2808 num_samples = priv(dev)->ai_count; 2718 num_samples = devpriv->ai_count;
2809 2719
2810 priv(dev)->ai_count -= num_samples; 2720 devpriv->ai_count -= num_samples;
2811 } 2721 }
2812 2722
2813 if (num_samples < 0) { 2723 if (num_samples < 0) {
@@ -2820,20 +2730,21 @@ static void pio_drain_ai_fifo_16(struct comedi_device *dev)
2820 2730
2821 for (i = 0; i < num_samples; i++) { 2731 for (i = 0; i < num_samples; i++) {
2822 cfc_write_to_buffer(s, 2732 cfc_write_to_buffer(s,
2823 readw(priv(dev)->main_iobase + 2733 readw(devpriv->main_iobase +
2824 ADC_FIFO_REG)); 2734 ADC_FIFO_REG));
2825 } 2735 }
2826 2736
2827 } while (read_segment != write_segment); 2737 } while (read_segment != write_segment);
2828} 2738}
2829 2739
2830/* Read from 32 bit wide ai fifo of 4020 - deal with insane grey coding of pointers. 2740/* Read from 32 bit wide ai fifo of 4020 - deal with insane grey coding of
2831 * The pci-4020 hardware only supports 2741 * pointers. The pci-4020 hardware only supports dma transfers (it only
2832 * dma transfers (it only supports the use of pio for draining the last remaining 2742 * supports the use of pio for draining the last remaining points from the
2833 * points from the fifo when a data acquisition operation has completed). 2743 * fifo when a data acquisition operation has completed).
2834 */ 2744 */
2835static void pio_drain_ai_fifo_32(struct comedi_device *dev) 2745static void pio_drain_ai_fifo_32(struct comedi_device *dev)
2836{ 2746{
2747 struct pcidas64_private *devpriv = dev->private;
2837 struct comedi_subdevice *s = dev->read_subdev; 2748 struct comedi_subdevice *s = dev->read_subdev;
2838 struct comedi_async *async = s->async; 2749 struct comedi_async *async = s->async;
2839 struct comedi_cmd *cmd = &async->cmd; 2750 struct comedi_cmd *cmd = &async->cmd;
@@ -2841,33 +2752,35 @@ static void pio_drain_ai_fifo_32(struct comedi_device *dev)
2841 unsigned int max_transfer = 100000; 2752 unsigned int max_transfer = 100000;
2842 uint32_t fifo_data; 2753 uint32_t fifo_data;
2843 int write_code = 2754 int write_code =
2844 readw(priv(dev)->main_iobase + ADC_WRITE_PNTR_REG) & 0x7fff; 2755 readw(devpriv->main_iobase + ADC_WRITE_PNTR_REG) & 0x7fff;
2845 int read_code = 2756 int read_code =
2846 readw(priv(dev)->main_iobase + ADC_READ_PNTR_REG) & 0x7fff; 2757 readw(devpriv->main_iobase + ADC_READ_PNTR_REG) & 0x7fff;
2847 2758
2848 if (cmd->stop_src == TRIG_COUNT) { 2759 if (cmd->stop_src == TRIG_COUNT) {
2849 if (max_transfer > priv(dev)->ai_count) 2760 if (max_transfer > devpriv->ai_count)
2850 max_transfer = priv(dev)->ai_count; 2761 max_transfer = devpriv->ai_count;
2851 2762
2852 } 2763 }
2853 for (i = 0; read_code != write_code && i < max_transfer;) { 2764 for (i = 0; read_code != write_code && i < max_transfer;) {
2854 fifo_data = readl(priv(dev)->dio_counter_iobase + ADC_FIFO_REG); 2765 fifo_data = readl(devpriv->dio_counter_iobase + ADC_FIFO_REG);
2855 cfc_write_to_buffer(s, fifo_data & 0xffff); 2766 cfc_write_to_buffer(s, fifo_data & 0xffff);
2856 i++; 2767 i++;
2857 if (i < max_transfer) { 2768 if (i < max_transfer) {
2858 cfc_write_to_buffer(s, (fifo_data >> 16) & 0xffff); 2769 cfc_write_to_buffer(s, (fifo_data >> 16) & 0xffff);
2859 i++; 2770 i++;
2860 } 2771 }
2861 read_code = 2772 read_code = readw(devpriv->main_iobase + ADC_READ_PNTR_REG) &
2862 readw(priv(dev)->main_iobase + ADC_READ_PNTR_REG) & 0x7fff; 2773 0x7fff;
2863 } 2774 }
2864 priv(dev)->ai_count -= i; 2775 devpriv->ai_count -= i;
2865} 2776}
2866 2777
2867/* empty fifo */ 2778/* empty fifo */
2868static void pio_drain_ai_fifo(struct comedi_device *dev) 2779static void pio_drain_ai_fifo(struct comedi_device *dev)
2869{ 2780{
2870 if (board(dev)->layout == LAYOUT_4020) 2781 const struct pcidas64_board *thisboard = comedi_board(dev);
2782
2783 if (thisboard->layout == LAYOUT_4020)
2871 pio_drain_ai_fifo_32(dev); 2784 pio_drain_ai_fifo_32(dev);
2872 else 2785 else
2873 pio_drain_ai_fifo_16(dev); 2786 pio_drain_ai_fifo_16(dev);
@@ -2875,6 +2788,8 @@ static void pio_drain_ai_fifo(struct comedi_device *dev)
2875 2788
2876static void drain_dma_buffers(struct comedi_device *dev, unsigned int channel) 2789static void drain_dma_buffers(struct comedi_device *dev, unsigned int channel)
2877{ 2790{
2791 const struct pcidas64_board *thisboard = comedi_board(dev);
2792 struct pcidas64_private *devpriv = dev->private;
2878 struct comedi_async *async = dev->read_subdev->async; 2793 struct comedi_async *async = dev->read_subdev->async;
2879 uint32_t next_transfer_addr; 2794 uint32_t next_transfer_addr;
2880 int j; 2795 int j;
@@ -2883,46 +2798,47 @@ static void drain_dma_buffers(struct comedi_device *dev, unsigned int channel)
2883 2798
2884 if (channel) 2799 if (channel)
2885 pci_addr_reg = 2800 pci_addr_reg =
2886 priv(dev)->plx9080_iobase + PLX_DMA1_PCI_ADDRESS_REG; 2801 devpriv->plx9080_iobase + PLX_DMA1_PCI_ADDRESS_REG;
2887 else 2802 else
2888 pci_addr_reg = 2803 pci_addr_reg =
2889 priv(dev)->plx9080_iobase + PLX_DMA0_PCI_ADDRESS_REG; 2804 devpriv->plx9080_iobase + PLX_DMA0_PCI_ADDRESS_REG;
2890 2805
2891 /* loop until we have read all the full buffers */ 2806 /* loop until we have read all the full buffers */
2892 for (j = 0, next_transfer_addr = readl(pci_addr_reg); 2807 for (j = 0, next_transfer_addr = readl(pci_addr_reg);
2893 (next_transfer_addr < 2808 (next_transfer_addr <
2894 priv(dev)->ai_buffer_bus_addr[priv(dev)->ai_dma_index] 2809 devpriv->ai_buffer_bus_addr[devpriv->ai_dma_index] ||
2895 || next_transfer_addr >= 2810 next_transfer_addr >=
2896 priv(dev)->ai_buffer_bus_addr[priv(dev)->ai_dma_index] + 2811 devpriv->ai_buffer_bus_addr[devpriv->ai_dma_index] +
2897 DMA_BUFFER_SIZE) && j < ai_dma_ring_count(board(dev)); j++) { 2812 DMA_BUFFER_SIZE) && j < ai_dma_ring_count(thisboard); j++) {
2898 /* transfer data from dma buffer to comedi buffer */ 2813 /* transfer data from dma buffer to comedi buffer */
2899 num_samples = dma_transfer_size(dev); 2814 num_samples = dma_transfer_size(dev);
2900 if (async->cmd.stop_src == TRIG_COUNT) { 2815 if (async->cmd.stop_src == TRIG_COUNT) {
2901 if (num_samples > priv(dev)->ai_count) 2816 if (num_samples > devpriv->ai_count)
2902 num_samples = priv(dev)->ai_count; 2817 num_samples = devpriv->ai_count;
2903 priv(dev)->ai_count -= num_samples; 2818 devpriv->ai_count -= num_samples;
2904 } 2819 }
2905 cfc_write_array_to_buffer(dev->read_subdev, 2820 cfc_write_array_to_buffer(dev->read_subdev,
2906 priv(dev)->ai_buffer[priv(dev)-> 2821 devpriv->ai_buffer[devpriv->
2907 ai_dma_index], 2822 ai_dma_index],
2908 num_samples * sizeof(uint16_t)); 2823 num_samples * sizeof(uint16_t));
2909 priv(dev)->ai_dma_index = 2824 devpriv->ai_dma_index = (devpriv->ai_dma_index + 1) %
2910 (priv(dev)->ai_dma_index + 2825 ai_dma_ring_count(thisboard);
2911 1) % ai_dma_ring_count(board(dev));
2912 2826
2913 DEBUG_PRINT("next buffer addr 0x%lx\n", 2827 DEBUG_PRINT("next buffer addr 0x%lx\n",
2914 (unsigned long)priv(dev)-> 2828 (unsigned long)devpriv->
2915 ai_buffer_bus_addr[priv(dev)->ai_dma_index]); 2829 ai_buffer_bus_addr[devpriv->ai_dma_index]);
2916 DEBUG_PRINT("pci addr reg 0x%x\n", next_transfer_addr); 2830 DEBUG_PRINT("pci addr reg 0x%x\n", next_transfer_addr);
2917 } 2831 }
2918 /* XXX check for dma ring buffer overrun (use end-of-chain bit to mark last 2832 /* XXX check for dma ring buffer overrun
2919 * unused buffer) */ 2833 * (use end-of-chain bit to mark last unused buffer) */
2920} 2834}
2921 2835
2922static void handle_ai_interrupt(struct comedi_device *dev, 2836static void handle_ai_interrupt(struct comedi_device *dev,
2923 unsigned short status, 2837 unsigned short status,
2924 unsigned int plx_status) 2838 unsigned int plx_status)
2925{ 2839{
2840 const struct pcidas64_board *thisboard = comedi_board(dev);
2841 struct pcidas64_private *devpriv = dev->private;
2926 struct comedi_subdevice *s = dev->read_subdev; 2842 struct comedi_subdevice *s = dev->read_subdev;
2927 struct comedi_async *async = s->async; 2843 struct comedi_async *async = s->async;
2928 struct comedi_cmd *cmd = &async->cmd; 2844 struct comedi_cmd *cmd = &async->cmd;
@@ -2936,10 +2852,10 @@ static void handle_ai_interrupt(struct comedi_device *dev,
2936 } 2852 }
2937 /* spin lock makes sure no one else changes plx dma control reg */ 2853 /* spin lock makes sure no one else changes plx dma control reg */
2938 spin_lock_irqsave(&dev->spinlock, flags); 2854 spin_lock_irqsave(&dev->spinlock, flags);
2939 dma1_status = readb(priv(dev)->plx9080_iobase + PLX_DMA1_CS_REG); 2855 dma1_status = readb(devpriv->plx9080_iobase + PLX_DMA1_CS_REG);
2940 if (plx_status & ICS_DMA1_A) { /* dma chan 1 interrupt */ 2856 if (plx_status & ICS_DMA1_A) { /* dma chan 1 interrupt */
2941 writeb((dma1_status & PLX_DMA_EN_BIT) | PLX_CLEAR_DMA_INTR_BIT, 2857 writeb((dma1_status & PLX_DMA_EN_BIT) | PLX_CLEAR_DMA_INTR_BIT,
2942 priv(dev)->plx9080_iobase + PLX_DMA1_CS_REG); 2858 devpriv->plx9080_iobase + PLX_DMA1_CS_REG);
2943 DEBUG_PRINT("dma1 status 0x%x\n", dma1_status); 2859 DEBUG_PRINT("dma1 status 0x%x\n", dma1_status);
2944 2860
2945 if (dma1_status & PLX_DMA_EN_BIT) 2861 if (dma1_status & PLX_DMA_EN_BIT)
@@ -2956,17 +2872,17 @@ static void handle_ai_interrupt(struct comedi_device *dev,
2956 if ((status & ADC_DONE_BIT) || 2872 if ((status & ADC_DONE_BIT) ||
2957 ((cmd->flags & TRIG_WAKE_EOS) && 2873 ((cmd->flags & TRIG_WAKE_EOS) &&
2958 (status & ADC_INTR_PENDING_BIT) && 2874 (status & ADC_INTR_PENDING_BIT) &&
2959 (board(dev)->layout != LAYOUT_4020))) { 2875 (thisboard->layout != LAYOUT_4020))) {
2960 DEBUG_PRINT("pio fifo drain\n"); 2876 DEBUG_PRINT("pio fifo drain\n");
2961 spin_lock_irqsave(&dev->spinlock, flags); 2877 spin_lock_irqsave(&dev->spinlock, flags);
2962 if (priv(dev)->ai_cmd_running) { 2878 if (devpriv->ai_cmd_running) {
2963 spin_unlock_irqrestore(&dev->spinlock, flags); 2879 spin_unlock_irqrestore(&dev->spinlock, flags);
2964 pio_drain_ai_fifo(dev); 2880 pio_drain_ai_fifo(dev);
2965 } else 2881 } else
2966 spin_unlock_irqrestore(&dev->spinlock, flags); 2882 spin_unlock_irqrestore(&dev->spinlock, flags);
2967 } 2883 }
2968 /* if we are have all the data, then quit */ 2884 /* if we are have all the data, then quit */
2969 if ((cmd->stop_src == TRIG_COUNT && (int)priv(dev)->ai_count <= 0) || 2885 if ((cmd->stop_src == TRIG_COUNT && (int)devpriv->ai_count <= 0) ||
2970 (cmd->stop_src == TRIG_EXT && (status & ADC_STOP_BIT))) { 2886 (cmd->stop_src == TRIG_EXT && (status & ADC_STOP_BIT))) {
2971 async->events |= COMEDI_CB_EOA; 2887 async->events |= COMEDI_CB_EOA;
2972 } 2888 }
@@ -2976,29 +2892,31 @@ static void handle_ai_interrupt(struct comedi_device *dev,
2976 2892
2977static inline unsigned int prev_ao_dma_index(struct comedi_device *dev) 2893static inline unsigned int prev_ao_dma_index(struct comedi_device *dev)
2978{ 2894{
2895 struct pcidas64_private *devpriv = dev->private;
2979 unsigned int buffer_index; 2896 unsigned int buffer_index;
2980 2897
2981 if (priv(dev)->ao_dma_index == 0) 2898 if (devpriv->ao_dma_index == 0)
2982 buffer_index = AO_DMA_RING_COUNT - 1; 2899 buffer_index = AO_DMA_RING_COUNT - 1;
2983 else 2900 else
2984 buffer_index = priv(dev)->ao_dma_index - 1; 2901 buffer_index = devpriv->ao_dma_index - 1;
2985 return buffer_index; 2902 return buffer_index;
2986} 2903}
2987 2904
2988static int last_ao_dma_load_completed(struct comedi_device *dev) 2905static int last_ao_dma_load_completed(struct comedi_device *dev)
2989{ 2906{
2907 struct pcidas64_private *devpriv = dev->private;
2990 unsigned int buffer_index; 2908 unsigned int buffer_index;
2991 unsigned int transfer_address; 2909 unsigned int transfer_address;
2992 unsigned short dma_status; 2910 unsigned short dma_status;
2993 2911
2994 buffer_index = prev_ao_dma_index(dev); 2912 buffer_index = prev_ao_dma_index(dev);
2995 dma_status = readb(priv(dev)->plx9080_iobase + PLX_DMA0_CS_REG); 2913 dma_status = readb(devpriv->plx9080_iobase + PLX_DMA0_CS_REG);
2996 if ((dma_status & PLX_DMA_DONE_BIT) == 0) 2914 if ((dma_status & PLX_DMA_DONE_BIT) == 0)
2997 return 0; 2915 return 0;
2998 2916
2999 transfer_address = 2917 transfer_address =
3000 readl(priv(dev)->plx9080_iobase + PLX_DMA0_PCI_ADDRESS_REG); 2918 readl(devpriv->plx9080_iobase + PLX_DMA0_PCI_ADDRESS_REG);
3001 if (transfer_address != priv(dev)->ao_buffer_bus_addr[buffer_index]) 2919 if (transfer_address != devpriv->ao_buffer_bus_addr[buffer_index])
3002 return 0; 2920 return 0;
3003 2921
3004 return 1; 2922 return 1;
@@ -3007,10 +2925,12 @@ static int last_ao_dma_load_completed(struct comedi_device *dev)
3007static int ao_stopped_by_error(struct comedi_device *dev, 2925static int ao_stopped_by_error(struct comedi_device *dev,
3008 const struct comedi_cmd *cmd) 2926 const struct comedi_cmd *cmd)
3009{ 2927{
2928 struct pcidas64_private *devpriv = dev->private;
2929
3010 if (cmd->stop_src == TRIG_NONE) 2930 if (cmd->stop_src == TRIG_NONE)
3011 return 1; 2931 return 1;
3012 if (cmd->stop_src == TRIG_COUNT) { 2932 if (cmd->stop_src == TRIG_COUNT) {
3013 if (priv(dev)->ao_count) 2933 if (devpriv->ao_count)
3014 return 1; 2934 return 1;
3015 if (last_ao_dma_load_completed(dev) == 0) 2935 if (last_ao_dma_load_completed(dev) == 0)
3016 return 1; 2936 return 1;
@@ -3032,10 +2952,11 @@ static inline int ao_dma_needs_restart(struct comedi_device *dev,
3032 2952
3033static void restart_ao_dma(struct comedi_device *dev) 2953static void restart_ao_dma(struct comedi_device *dev)
3034{ 2954{
2955 struct pcidas64_private *devpriv = dev->private;
3035 unsigned int dma_desc_bits; 2956 unsigned int dma_desc_bits;
3036 2957
3037 dma_desc_bits = 2958 dma_desc_bits =
3038 readl(priv(dev)->plx9080_iobase + PLX_DMA0_DESCRIPTOR_REG); 2959 readl(devpriv->plx9080_iobase + PLX_DMA0_DESCRIPTOR_REG);
3039 dma_desc_bits &= ~PLX_END_OF_CHAIN_BIT; 2960 dma_desc_bits &= ~PLX_END_OF_CHAIN_BIT;
3040 DEBUG_PRINT("restarting ao dma, descriptor reg 0x%x\n", dma_desc_bits); 2961 DEBUG_PRINT("restarting ao dma, descriptor reg 0x%x\n", dma_desc_bits);
3041 load_first_dma_descriptor(dev, 0, dma_desc_bits); 2962 load_first_dma_descriptor(dev, 0, dma_desc_bits);
@@ -3043,9 +2964,81 @@ static void restart_ao_dma(struct comedi_device *dev)
3043 dma_start_sync(dev, 0); 2964 dma_start_sync(dev, 0);
3044} 2965}
3045 2966
2967static unsigned int load_ao_dma_buffer(struct comedi_device *dev,
2968 const struct comedi_cmd *cmd)
2969{
2970 struct pcidas64_private *devpriv = dev->private;
2971 unsigned int num_bytes, buffer_index, prev_buffer_index;
2972 unsigned int next_bits;
2973
2974 buffer_index = devpriv->ao_dma_index;
2975 prev_buffer_index = prev_ao_dma_index(dev);
2976
2977 DEBUG_PRINT("attempting to load ao buffer %i (0x%llx)\n", buffer_index,
2978 (unsigned long long)devpriv->ao_buffer_bus_addr[
2979 buffer_index]);
2980
2981 num_bytes = comedi_buf_read_n_available(dev->write_subdev->async);
2982 if (num_bytes > DMA_BUFFER_SIZE)
2983 num_bytes = DMA_BUFFER_SIZE;
2984 if (cmd->stop_src == TRIG_COUNT && num_bytes > devpriv->ao_count)
2985 num_bytes = devpriv->ao_count;
2986 num_bytes -= num_bytes % bytes_in_sample;
2987
2988 if (num_bytes == 0)
2989 return 0;
2990
2991 DEBUG_PRINT("loading %i bytes\n", num_bytes);
2992
2993 num_bytes = cfc_read_array_from_buffer(dev->write_subdev,
2994 devpriv->
2995 ao_buffer[buffer_index],
2996 num_bytes);
2997 devpriv->ao_dma_desc[buffer_index].transfer_size =
2998 cpu_to_le32(num_bytes);
2999 /* set end of chain bit so we catch underruns */
3000 next_bits = le32_to_cpu(devpriv->ao_dma_desc[buffer_index].next);
3001 next_bits |= PLX_END_OF_CHAIN_BIT;
3002 devpriv->ao_dma_desc[buffer_index].next = cpu_to_le32(next_bits);
3003 /* clear end of chain bit on previous buffer now that we have set it
3004 * for the last buffer */
3005 next_bits = le32_to_cpu(devpriv->ao_dma_desc[prev_buffer_index].next);
3006 next_bits &= ~PLX_END_OF_CHAIN_BIT;
3007 devpriv->ao_dma_desc[prev_buffer_index].next = cpu_to_le32(next_bits);
3008
3009 devpriv->ao_dma_index = (buffer_index + 1) % AO_DMA_RING_COUNT;
3010 devpriv->ao_count -= num_bytes;
3011
3012 return num_bytes;
3013}
3014
3015static void load_ao_dma(struct comedi_device *dev, const struct comedi_cmd *cmd)
3016{
3017 struct pcidas64_private *devpriv = dev->private;
3018 unsigned int num_bytes;
3019 unsigned int next_transfer_addr;
3020 void __iomem *pci_addr_reg =
3021 devpriv->plx9080_iobase + PLX_DMA0_PCI_ADDRESS_REG;
3022 unsigned int buffer_index;
3023
3024 do {
3025 buffer_index = devpriv->ao_dma_index;
3026 /* don't overwrite data that hasn't been transferred yet */
3027 next_transfer_addr = readl(pci_addr_reg);
3028 if (next_transfer_addr >=
3029 devpriv->ao_buffer_bus_addr[buffer_index] &&
3030 next_transfer_addr <
3031 devpriv->ao_buffer_bus_addr[buffer_index] +
3032 DMA_BUFFER_SIZE)
3033 return;
3034 num_bytes = load_ao_dma_buffer(dev, cmd);
3035 } while (num_bytes >= DMA_BUFFER_SIZE);
3036}
3037
3046static void handle_ao_interrupt(struct comedi_device *dev, 3038static void handle_ao_interrupt(struct comedi_device *dev,
3047 unsigned short status, unsigned int plx_status) 3039 unsigned short status, unsigned int plx_status)
3048{ 3040{
3041 struct pcidas64_private *devpriv = dev->private;
3049 struct comedi_subdevice *s = dev->write_subdev; 3042 struct comedi_subdevice *s = dev->write_subdev;
3050 struct comedi_async *async; 3043 struct comedi_async *async;
3051 struct comedi_cmd *cmd; 3044 struct comedi_cmd *cmd;
@@ -3060,15 +3053,15 @@ static void handle_ao_interrupt(struct comedi_device *dev,
3060 3053
3061 /* spin lock makes sure no one else changes plx dma control reg */ 3054 /* spin lock makes sure no one else changes plx dma control reg */
3062 spin_lock_irqsave(&dev->spinlock, flags); 3055 spin_lock_irqsave(&dev->spinlock, flags);
3063 dma0_status = readb(priv(dev)->plx9080_iobase + PLX_DMA0_CS_REG); 3056 dma0_status = readb(devpriv->plx9080_iobase + PLX_DMA0_CS_REG);
3064 if (plx_status & ICS_DMA0_A) { /* dma chan 0 interrupt */ 3057 if (plx_status & ICS_DMA0_A) { /* dma chan 0 interrupt */
3065 if ((dma0_status & PLX_DMA_EN_BIT) 3058 if ((dma0_status & PLX_DMA_EN_BIT) &&
3066 && !(dma0_status & PLX_DMA_DONE_BIT)) 3059 !(dma0_status & PLX_DMA_DONE_BIT))
3067 writeb(PLX_DMA_EN_BIT | PLX_CLEAR_DMA_INTR_BIT, 3060 writeb(PLX_DMA_EN_BIT | PLX_CLEAR_DMA_INTR_BIT,
3068 priv(dev)->plx9080_iobase + PLX_DMA0_CS_REG); 3061 devpriv->plx9080_iobase + PLX_DMA0_CS_REG);
3069 else 3062 else
3070 writeb(PLX_CLEAR_DMA_INTR_BIT, 3063 writeb(PLX_CLEAR_DMA_INTR_BIT,
3071 priv(dev)->plx9080_iobase + PLX_DMA0_CS_REG); 3064 devpriv->plx9080_iobase + PLX_DMA0_CS_REG);
3072 spin_unlock_irqrestore(&dev->spinlock, flags); 3065 spin_unlock_irqrestore(&dev->spinlock, flags);
3073 DEBUG_PRINT("dma0 status 0x%x\n", dma0_status); 3066 DEBUG_PRINT("dma0 status 0x%x\n", dma0_status);
3074 if (dma0_status & PLX_DMA_EN_BIT) { 3067 if (dma0_status & PLX_DMA_EN_BIT) {
@@ -3078,18 +3071,19 @@ static void handle_ao_interrupt(struct comedi_device *dev,
3078 restart_ao_dma(dev); 3071 restart_ao_dma(dev);
3079 } 3072 }
3080 DEBUG_PRINT(" cleared dma ch0 interrupt\n"); 3073 DEBUG_PRINT(" cleared dma ch0 interrupt\n");
3081 } else 3074 } else {
3082 spin_unlock_irqrestore(&dev->spinlock, flags); 3075 spin_unlock_irqrestore(&dev->spinlock, flags);
3076 }
3083 3077
3084 if ((status & DAC_DONE_BIT)) { 3078 if ((status & DAC_DONE_BIT)) {
3085 async->events |= COMEDI_CB_EOA; 3079 async->events |= COMEDI_CB_EOA;
3086 if (ao_stopped_by_error(dev, cmd)) 3080 if (ao_stopped_by_error(dev, cmd))
3087 async->events |= COMEDI_CB_ERROR; 3081 async->events |= COMEDI_CB_ERROR;
3088 DEBUG_PRINT("plx dma0 desc reg 0x%x\n", 3082 DEBUG_PRINT("plx dma0 desc reg 0x%x\n",
3089 readl(priv(dev)->plx9080_iobase + 3083 readl(devpriv->plx9080_iobase +
3090 PLX_DMA0_DESCRIPTOR_REG)); 3084 PLX_DMA0_DESCRIPTOR_REG));
3091 DEBUG_PRINT("plx dma0 address reg 0x%x\n", 3085 DEBUG_PRINT("plx dma0 address reg 0x%x\n",
3092 readl(priv(dev)->plx9080_iobase + 3086 readl(devpriv->plx9080_iobase +
3093 PLX_DMA0_PCI_ADDRESS_REG)); 3087 PLX_DMA0_PCI_ADDRESS_REG));
3094 } 3088 }
3095 cfc_handle_events(dev, s); 3089 cfc_handle_events(dev, s);
@@ -3098,22 +3092,21 @@ static void handle_ao_interrupt(struct comedi_device *dev,
3098static irqreturn_t handle_interrupt(int irq, void *d) 3092static irqreturn_t handle_interrupt(int irq, void *d)
3099{ 3093{
3100 struct comedi_device *dev = d; 3094 struct comedi_device *dev = d;
3095 struct pcidas64_private *devpriv = dev->private;
3101 unsigned short status; 3096 unsigned short status;
3102 uint32_t plx_status; 3097 uint32_t plx_status;
3103 uint32_t plx_bits; 3098 uint32_t plx_bits;
3104 3099
3105 plx_status = readl(priv(dev)->plx9080_iobase + PLX_INTRCS_REG); 3100 plx_status = readl(devpriv->plx9080_iobase + PLX_INTRCS_REG);
3106 status = readw(priv(dev)->main_iobase + HW_STATUS_REG); 3101 status = readw(devpriv->main_iobase + HW_STATUS_REG);
3107 3102
3108 DEBUG_PRINT("cb_pcidas64: hw status 0x%x ", status); 3103 DEBUG_PRINT("hw status 0x%x, plx status 0x%x\n", status, plx_status);
3109 DEBUG_PRINT("plx status 0x%x\n", plx_status);
3110 3104
3111 /* an interrupt before all the postconfig stuff gets done could 3105 /* an interrupt before all the postconfig stuff gets done could
3112 * cause a NULL dereference if we continue through the 3106 * cause a NULL dereference if we continue through the
3113 * interrupt handler */ 3107 * interrupt handler */
3114 if (dev->attached == 0) { 3108 if (dev->attached == 0) {
3115 DEBUG_PRINT("cb_pcidas64: premature interrupt, ignoring", 3109 DEBUG_PRINT("premature interrupt, ignoring\n");
3116 status);
3117 return IRQ_HANDLED; 3110 return IRQ_HANDLED;
3118 } 3111 }
3119 handle_ai_interrupt(dev, status, plx_status); 3112 handle_ai_interrupt(dev, status, plx_status);
@@ -3121,8 +3114,8 @@ static irqreturn_t handle_interrupt(int irq, void *d)
3121 3114
3122 /* clear possible plx9080 interrupt sources */ 3115 /* clear possible plx9080 interrupt sources */
3123 if (plx_status & ICS_LDIA) { /* clear local doorbell interrupt */ 3116 if (plx_status & ICS_LDIA) { /* clear local doorbell interrupt */
3124 plx_bits = readl(priv(dev)->plx9080_iobase + PLX_DBR_OUT_REG); 3117 plx_bits = readl(devpriv->plx9080_iobase + PLX_DBR_OUT_REG);
3125 writel(plx_bits, priv(dev)->plx9080_iobase + PLX_DBR_OUT_REG); 3118 writel(plx_bits, devpriv->plx9080_iobase + PLX_DBR_OUT_REG);
3126 DEBUG_PRINT(" cleared local doorbell bits 0x%x\n", plx_bits); 3119 DEBUG_PRINT(" cleared local doorbell bits 0x%x\n", plx_bits);
3127 } 3120 }
3128 3121
@@ -3131,28 +3124,17 @@ static irqreturn_t handle_interrupt(int irq, void *d)
3131 return IRQ_HANDLED; 3124 return IRQ_HANDLED;
3132} 3125}
3133 3126
3134static void abort_dma(struct comedi_device *dev, unsigned int channel)
3135{
3136 unsigned long flags;
3137
3138 /* spinlock for plx dma control/status reg */
3139 spin_lock_irqsave(&dev->spinlock, flags);
3140
3141 plx9080_abort_dma(priv(dev)->plx9080_iobase, channel);
3142
3143 spin_unlock_irqrestore(&dev->spinlock, flags);
3144}
3145
3146static int ai_cancel(struct comedi_device *dev, struct comedi_subdevice *s) 3127static int ai_cancel(struct comedi_device *dev, struct comedi_subdevice *s)
3147{ 3128{
3129 struct pcidas64_private *devpriv = dev->private;
3148 unsigned long flags; 3130 unsigned long flags;
3149 3131
3150 spin_lock_irqsave(&dev->spinlock, flags); 3132 spin_lock_irqsave(&dev->spinlock, flags);
3151 if (priv(dev)->ai_cmd_running == 0) { 3133 if (devpriv->ai_cmd_running == 0) {
3152 spin_unlock_irqrestore(&dev->spinlock, flags); 3134 spin_unlock_irqrestore(&dev->spinlock, flags);
3153 return 0; 3135 return 0;
3154 } 3136 }
3155 priv(dev)->ai_cmd_running = 0; 3137 devpriv->ai_cmd_running = 0;
3156 spin_unlock_irqrestore(&dev->spinlock, flags); 3138 spin_unlock_irqrestore(&dev->spinlock, flags);
3157 3139
3158 disable_ai_pacing(dev); 3140 disable_ai_pacing(dev);
@@ -3166,29 +3148,31 @@ static int ai_cancel(struct comedi_device *dev, struct comedi_subdevice *s)
3166static int ao_winsn(struct comedi_device *dev, struct comedi_subdevice *s, 3148static int ao_winsn(struct comedi_device *dev, struct comedi_subdevice *s,
3167 struct comedi_insn *insn, unsigned int *data) 3149 struct comedi_insn *insn, unsigned int *data)
3168{ 3150{
3151 const struct pcidas64_board *thisboard = comedi_board(dev);
3152 struct pcidas64_private *devpriv = dev->private;
3169 int chan = CR_CHAN(insn->chanspec); 3153 int chan = CR_CHAN(insn->chanspec);
3170 int range = CR_RANGE(insn->chanspec); 3154 int range = CR_RANGE(insn->chanspec);
3171 3155
3172 /* do some initializing */ 3156 /* do some initializing */
3173 writew(0, priv(dev)->main_iobase + DAC_CONTROL0_REG); 3157 writew(0, devpriv->main_iobase + DAC_CONTROL0_REG);
3174 3158
3175 /* set range */ 3159 /* set range */
3176 set_dac_range_bits(dev, &priv(dev)->dac_control1_bits, chan, range); 3160 set_dac_range_bits(dev, &devpriv->dac_control1_bits, chan, range);
3177 writew(priv(dev)->dac_control1_bits, 3161 writew(devpriv->dac_control1_bits,
3178 priv(dev)->main_iobase + DAC_CONTROL1_REG); 3162 devpriv->main_iobase + DAC_CONTROL1_REG);
3179 3163
3180 /* write to channel */ 3164 /* write to channel */
3181 if (board(dev)->layout == LAYOUT_4020) { 3165 if (thisboard->layout == LAYOUT_4020) {
3182 writew(data[0] & 0xff, 3166 writew(data[0] & 0xff,
3183 priv(dev)->main_iobase + dac_lsb_4020_reg(chan)); 3167 devpriv->main_iobase + dac_lsb_4020_reg(chan));
3184 writew((data[0] >> 8) & 0xf, 3168 writew((data[0] >> 8) & 0xf,
3185 priv(dev)->main_iobase + dac_msb_4020_reg(chan)); 3169 devpriv->main_iobase + dac_msb_4020_reg(chan));
3186 } else { 3170 } else {
3187 writew(data[0], priv(dev)->main_iobase + dac_convert_reg(chan)); 3171 writew(data[0], devpriv->main_iobase + dac_convert_reg(chan));
3188 } 3172 }
3189 3173
3190 /* remember output value */ 3174 /* remember output value */
3191 priv(dev)->ao_value[chan] = data[0]; 3175 devpriv->ao_value[chan] = data[0];
3192 3176
3193 return 1; 3177 return 1;
3194} 3178}
@@ -3197,7 +3181,9 @@ static int ao_readback_insn(struct comedi_device *dev,
3197 struct comedi_subdevice *s, 3181 struct comedi_subdevice *s,
3198 struct comedi_insn *insn, unsigned int *data) 3182 struct comedi_insn *insn, unsigned int *data)
3199{ 3183{
3200 data[0] = priv(dev)->ao_value[CR_CHAN(insn->chanspec)]; 3184 struct pcidas64_private *devpriv = dev->private;
3185
3186 data[0] = devpriv->ao_value[CR_CHAN(insn->chanspec)];
3201 3187
3202 return 1; 3188 return 1;
3203} 3189}
@@ -3205,8 +3191,9 @@ static int ao_readback_insn(struct comedi_device *dev,
3205static void set_dac_control0_reg(struct comedi_device *dev, 3191static void set_dac_control0_reg(struct comedi_device *dev,
3206 const struct comedi_cmd *cmd) 3192 const struct comedi_cmd *cmd)
3207{ 3193{
3194 struct pcidas64_private *devpriv = dev->private;
3208 unsigned int bits = DAC_ENABLE_BIT | WAVEFORM_GATE_LEVEL_BIT | 3195 unsigned int bits = DAC_ENABLE_BIT | WAVEFORM_GATE_LEVEL_BIT |
3209 WAVEFORM_GATE_ENABLE_BIT | WAVEFORM_GATE_SELECT_BIT; 3196 WAVEFORM_GATE_ENABLE_BIT | WAVEFORM_GATE_SELECT_BIT;
3210 3197
3211 if (cmd->start_src == TRIG_EXT) { 3198 if (cmd->start_src == TRIG_EXT) {
3212 bits |= WAVEFORM_TRIG_EXT_BITS; 3199 bits |= WAVEFORM_TRIG_EXT_BITS;
@@ -3220,12 +3207,13 @@ static void set_dac_control0_reg(struct comedi_device *dev,
3220 if (cmd->scan_begin_arg & CR_INVERT) 3207 if (cmd->scan_begin_arg & CR_INVERT)
3221 bits |= DAC_EXT_UPDATE_FALLING_BIT; 3208 bits |= DAC_EXT_UPDATE_FALLING_BIT;
3222 } 3209 }
3223 writew(bits, priv(dev)->main_iobase + DAC_CONTROL0_REG); 3210 writew(bits, devpriv->main_iobase + DAC_CONTROL0_REG);
3224} 3211}
3225 3212
3226static void set_dac_control1_reg(struct comedi_device *dev, 3213static void set_dac_control1_reg(struct comedi_device *dev,
3227 const struct comedi_cmd *cmd) 3214 const struct comedi_cmd *cmd)
3228{ 3215{
3216 struct pcidas64_private *devpriv = dev->private;
3229 int i; 3217 int i;
3230 3218
3231 for (i = 0; i < cmd->chanlist_len; i++) { 3219 for (i = 0; i < cmd->chanlist_len; i++) {
@@ -3233,17 +3221,18 @@ static void set_dac_control1_reg(struct comedi_device *dev,
3233 3221
3234 channel = CR_CHAN(cmd->chanlist[i]); 3222 channel = CR_CHAN(cmd->chanlist[i]);
3235 range = CR_RANGE(cmd->chanlist[i]); 3223 range = CR_RANGE(cmd->chanlist[i]);
3236 set_dac_range_bits(dev, &priv(dev)->dac_control1_bits, channel, 3224 set_dac_range_bits(dev, &devpriv->dac_control1_bits, channel,
3237 range); 3225 range);
3238 } 3226 }
3239 priv(dev)->dac_control1_bits |= DAC_SW_GATE_BIT; 3227 devpriv->dac_control1_bits |= DAC_SW_GATE_BIT;
3240 writew(priv(dev)->dac_control1_bits, 3228 writew(devpriv->dac_control1_bits,
3241 priv(dev)->main_iobase + DAC_CONTROL1_REG); 3229 devpriv->main_iobase + DAC_CONTROL1_REG);
3242} 3230}
3243 3231
3244static void set_dac_select_reg(struct comedi_device *dev, 3232static void set_dac_select_reg(struct comedi_device *dev,
3245 const struct comedi_cmd *cmd) 3233 const struct comedi_cmd *cmd)
3246{ 3234{
3235 struct pcidas64_private *devpriv = dev->private;
3247 uint16_t bits; 3236 uint16_t bits;
3248 unsigned int first_channel, last_channel; 3237 unsigned int first_channel, last_channel;
3249 3238
@@ -3254,12 +3243,18 @@ static void set_dac_select_reg(struct comedi_device *dev,
3254 3243
3255 bits = (first_channel & 0x7) | (last_channel & 0x7) << 3; 3244 bits = (first_channel & 0x7) | (last_channel & 0x7) << 3;
3256 3245
3257 writew(bits, priv(dev)->main_iobase + DAC_SELECT_REG); 3246 writew(bits, devpriv->main_iobase + DAC_SELECT_REG);
3247}
3248
3249static unsigned int get_ao_divisor(unsigned int ns, unsigned int flags)
3250{
3251 return get_divisor(ns, flags) - 2;
3258} 3252}
3259 3253
3260static void set_dac_interval_regs(struct comedi_device *dev, 3254static void set_dac_interval_regs(struct comedi_device *dev,
3261 const struct comedi_cmd *cmd) 3255 const struct comedi_cmd *cmd)
3262{ 3256{
3257 struct pcidas64_private *devpriv = dev->private;
3263 unsigned int divisor; 3258 unsigned int divisor;
3264 3259
3265 if (cmd->scan_begin_src != TRIG_TIMER) 3260 if (cmd->scan_begin_src != TRIG_TIMER)
@@ -3271,102 +3266,35 @@ static void set_dac_interval_regs(struct comedi_device *dev,
3271 divisor = max_counter_value; 3266 divisor = max_counter_value;
3272 } 3267 }
3273 writew(divisor & 0xffff, 3268 writew(divisor & 0xffff,
3274 priv(dev)->main_iobase + DAC_SAMPLE_INTERVAL_LOWER_REG); 3269 devpriv->main_iobase + DAC_SAMPLE_INTERVAL_LOWER_REG);
3275 writew((divisor >> 16) & 0xff, 3270 writew((divisor >> 16) & 0xff,
3276 priv(dev)->main_iobase + DAC_SAMPLE_INTERVAL_UPPER_REG); 3271 devpriv->main_iobase + DAC_SAMPLE_INTERVAL_UPPER_REG);
3277}
3278
3279static unsigned int load_ao_dma_buffer(struct comedi_device *dev,
3280 const struct comedi_cmd *cmd)
3281{
3282 unsigned int num_bytes, buffer_index, prev_buffer_index;
3283 unsigned int next_bits;
3284
3285 buffer_index = priv(dev)->ao_dma_index;
3286 prev_buffer_index = prev_ao_dma_index(dev);
3287
3288 DEBUG_PRINT("attempting to load ao buffer %i (0x%x)\n", buffer_index,
3289 priv(dev)->ao_buffer_bus_addr[buffer_index]);
3290
3291 num_bytes = comedi_buf_read_n_available(dev->write_subdev->async);
3292 if (num_bytes > DMA_BUFFER_SIZE)
3293 num_bytes = DMA_BUFFER_SIZE;
3294 if (cmd->stop_src == TRIG_COUNT && num_bytes > priv(dev)->ao_count)
3295 num_bytes = priv(dev)->ao_count;
3296 num_bytes -= num_bytes % bytes_in_sample;
3297
3298 if (num_bytes == 0)
3299 return 0;
3300
3301 DEBUG_PRINT("loading %i bytes\n", num_bytes);
3302
3303 num_bytes = cfc_read_array_from_buffer(dev->write_subdev,
3304 priv(dev)->
3305 ao_buffer[buffer_index],
3306 num_bytes);
3307 priv(dev)->ao_dma_desc[buffer_index].transfer_size =
3308 cpu_to_le32(num_bytes);
3309 /* set end of chain bit so we catch underruns */
3310 next_bits = le32_to_cpu(priv(dev)->ao_dma_desc[buffer_index].next);
3311 next_bits |= PLX_END_OF_CHAIN_BIT;
3312 priv(dev)->ao_dma_desc[buffer_index].next = cpu_to_le32(next_bits);
3313 /* clear end of chain bit on previous buffer now that we have set it
3314 * for the last buffer */
3315 next_bits = le32_to_cpu(priv(dev)->ao_dma_desc[prev_buffer_index].next);
3316 next_bits &= ~PLX_END_OF_CHAIN_BIT;
3317 priv(dev)->ao_dma_desc[prev_buffer_index].next = cpu_to_le32(next_bits);
3318
3319 priv(dev)->ao_dma_index = (buffer_index + 1) % AO_DMA_RING_COUNT;
3320 priv(dev)->ao_count -= num_bytes;
3321
3322 return num_bytes;
3323}
3324
3325static void load_ao_dma(struct comedi_device *dev, const struct comedi_cmd *cmd)
3326{
3327 unsigned int num_bytes;
3328 unsigned int next_transfer_addr;
3329 void __iomem *pci_addr_reg =
3330 priv(dev)->plx9080_iobase + PLX_DMA0_PCI_ADDRESS_REG;
3331 unsigned int buffer_index;
3332
3333 do {
3334 buffer_index = priv(dev)->ao_dma_index;
3335 /* don't overwrite data that hasn't been transferred yet */
3336 next_transfer_addr = readl(pci_addr_reg);
3337 if (next_transfer_addr >=
3338 priv(dev)->ao_buffer_bus_addr[buffer_index]
3339 && next_transfer_addr <
3340 priv(dev)->ao_buffer_bus_addr[buffer_index] +
3341 DMA_BUFFER_SIZE)
3342 return;
3343 num_bytes = load_ao_dma_buffer(dev, cmd);
3344 } while (num_bytes >= DMA_BUFFER_SIZE);
3345} 3272}
3346 3273
3347static int prep_ao_dma(struct comedi_device *dev, const struct comedi_cmd *cmd) 3274static int prep_ao_dma(struct comedi_device *dev, const struct comedi_cmd *cmd)
3348{ 3275{
3276 struct pcidas64_private *devpriv = dev->private;
3349 unsigned int num_bytes; 3277 unsigned int num_bytes;
3350 int i; 3278 int i;
3351 3279
3352 /* clear queue pointer too, since external queue has 3280 /* clear queue pointer too, since external queue has
3353 * weird interactions with ao fifo */ 3281 * weird interactions with ao fifo */
3354 writew(0, priv(dev)->main_iobase + ADC_QUEUE_CLEAR_REG); 3282 writew(0, devpriv->main_iobase + ADC_QUEUE_CLEAR_REG);
3355 writew(0, priv(dev)->main_iobase + DAC_BUFFER_CLEAR_REG); 3283 writew(0, devpriv->main_iobase + DAC_BUFFER_CLEAR_REG);
3356 3284
3357 num_bytes = (DAC_FIFO_SIZE / 2) * bytes_in_sample; 3285 num_bytes = (DAC_FIFO_SIZE / 2) * bytes_in_sample;
3358 if (cmd->stop_src == TRIG_COUNT && 3286 if (cmd->stop_src == TRIG_COUNT &&
3359 num_bytes / bytes_in_sample > priv(dev)->ao_count) 3287 num_bytes / bytes_in_sample > devpriv->ao_count)
3360 num_bytes = priv(dev)->ao_count * bytes_in_sample; 3288 num_bytes = devpriv->ao_count * bytes_in_sample;
3361 num_bytes = cfc_read_array_from_buffer(dev->write_subdev, 3289 num_bytes = cfc_read_array_from_buffer(dev->write_subdev,
3362 priv(dev)->ao_bounce_buffer, 3290 devpriv->ao_bounce_buffer,
3363 num_bytes); 3291 num_bytes);
3364 for (i = 0; i < num_bytes / bytes_in_sample; i++) { 3292 for (i = 0; i < num_bytes / bytes_in_sample; i++) {
3365 writew(priv(dev)->ao_bounce_buffer[i], 3293 writew(devpriv->ao_bounce_buffer[i],
3366 priv(dev)->main_iobase + DAC_FIFO_REG); 3294 devpriv->main_iobase + DAC_FIFO_REG);
3367 } 3295 }
3368 priv(dev)->ao_count -= num_bytes / bytes_in_sample; 3296 devpriv->ao_count -= num_bytes / bytes_in_sample;
3369 if (cmd->stop_src == TRIG_COUNT && priv(dev)->ao_count == 0) 3297 if (cmd->stop_src == TRIG_COUNT && devpriv->ao_count == 0)
3370 return 0; 3298 return 0;
3371 num_bytes = load_ao_dma_buffer(dev, cmd); 3299 num_bytes = load_ao_dma_buffer(dev, cmd);
3372 if (num_bytes == 0) 3300 if (num_bytes == 0)
@@ -3381,43 +3309,21 @@ static int prep_ao_dma(struct comedi_device *dev, const struct comedi_cmd *cmd)
3381 3309
3382static inline int external_ai_queue_in_use(struct comedi_device *dev) 3310static inline int external_ai_queue_in_use(struct comedi_device *dev)
3383{ 3311{
3312 const struct pcidas64_board *thisboard = comedi_board(dev);
3313
3384 if (dev->read_subdev->busy) 3314 if (dev->read_subdev->busy)
3385 return 0; 3315 return 0;
3386 if (board(dev)->layout == LAYOUT_4020) 3316 if (thisboard->layout == LAYOUT_4020)
3387 return 0; 3317 return 0;
3388 else if (use_internal_queue_6xxx(&dev->read_subdev->async->cmd)) 3318 else if (use_internal_queue_6xxx(&dev->read_subdev->async->cmd))
3389 return 0; 3319 return 0;
3390 return 1; 3320 return 1;
3391} 3321}
3392 3322
3393static int ao_cmd(struct comedi_device *dev, struct comedi_subdevice *s)
3394{
3395 struct comedi_cmd *cmd = &s->async->cmd;
3396
3397 if (external_ai_queue_in_use(dev)) {
3398 warn_external_queue(dev);
3399 return -EBUSY;
3400 }
3401 /* disable analog output system during setup */
3402 writew(0x0, priv(dev)->main_iobase + DAC_CONTROL0_REG);
3403
3404 priv(dev)->ao_dma_index = 0;
3405 priv(dev)->ao_count = cmd->stop_arg * cmd->chanlist_len;
3406
3407 set_dac_select_reg(dev, cmd);
3408 set_dac_interval_regs(dev, cmd);
3409 load_first_dma_descriptor(dev, 0, priv(dev)->ao_dma_desc_bus_addr |
3410 PLX_DESC_IN_PCI_BIT | PLX_INTR_TERM_COUNT);
3411
3412 set_dac_control1_reg(dev, cmd);
3413 s->async->inttrig = ao_inttrig;
3414
3415 return 0;
3416}
3417
3418static int ao_inttrig(struct comedi_device *dev, struct comedi_subdevice *s, 3323static int ao_inttrig(struct comedi_device *dev, struct comedi_subdevice *s,
3419 unsigned int trig_num) 3324 unsigned int trig_num)
3420{ 3325{
3326 struct pcidas64_private *devpriv = dev->private;
3421 struct comedi_cmd *cmd = &s->async->cmd; 3327 struct comedi_cmd *cmd = &s->async->cmd;
3422 int retval; 3328 int retval;
3423 3329
@@ -3431,16 +3337,43 @@ static int ao_inttrig(struct comedi_device *dev, struct comedi_subdevice *s,
3431 set_dac_control0_reg(dev, cmd); 3337 set_dac_control0_reg(dev, cmd);
3432 3338
3433 if (cmd->start_src == TRIG_INT) 3339 if (cmd->start_src == TRIG_INT)
3434 writew(0, priv(dev)->main_iobase + DAC_START_REG); 3340 writew(0, devpriv->main_iobase + DAC_START_REG);
3435 3341
3436 s->async->inttrig = NULL; 3342 s->async->inttrig = NULL;
3437 3343
3438 return 0; 3344 return 0;
3439} 3345}
3440 3346
3347static int ao_cmd(struct comedi_device *dev, struct comedi_subdevice *s)
3348{
3349 struct pcidas64_private *devpriv = dev->private;
3350 struct comedi_cmd *cmd = &s->async->cmd;
3351
3352 if (external_ai_queue_in_use(dev)) {
3353 warn_external_queue(dev);
3354 return -EBUSY;
3355 }
3356 /* disable analog output system during setup */
3357 writew(0x0, devpriv->main_iobase + DAC_CONTROL0_REG);
3358
3359 devpriv->ao_dma_index = 0;
3360 devpriv->ao_count = cmd->stop_arg * cmd->chanlist_len;
3361
3362 set_dac_select_reg(dev, cmd);
3363 set_dac_interval_regs(dev, cmd);
3364 load_first_dma_descriptor(dev, 0, devpriv->ao_dma_desc_bus_addr |
3365 PLX_DESC_IN_PCI_BIT | PLX_INTR_TERM_COUNT);
3366
3367 set_dac_control1_reg(dev, cmd);
3368 s->async->inttrig = ao_inttrig;
3369
3370 return 0;
3371}
3372
3441static int ao_cmdtest(struct comedi_device *dev, struct comedi_subdevice *s, 3373static int ao_cmdtest(struct comedi_device *dev, struct comedi_subdevice *s,
3442 struct comedi_cmd *cmd) 3374 struct comedi_cmd *cmd)
3443{ 3375{
3376 const struct pcidas64_board *thisboard = comedi_board(dev);
3444 int err = 0; 3377 int err = 0;
3445 unsigned int tmp_arg; 3378 unsigned int tmp_arg;
3446 int i; 3379 int i;
@@ -3449,7 +3382,7 @@ static int ao_cmdtest(struct comedi_device *dev, struct comedi_subdevice *s,
3449 3382
3450 err |= cfc_check_trigger_src(&cmd->start_src, TRIG_INT | TRIG_EXT); 3383 err |= cfc_check_trigger_src(&cmd->start_src, TRIG_INT | TRIG_EXT);
3451 err |= cfc_check_trigger_src(&cmd->scan_begin_src, 3384 err |= cfc_check_trigger_src(&cmd->scan_begin_src,
3452 TRIG_TIMER | TRIG_EXT); 3385 TRIG_TIMER | TRIG_EXT);
3453 err |= cfc_check_trigger_src(&cmd->convert_src, TRIG_NOW); 3386 err |= cfc_check_trigger_src(&cmd->convert_src, TRIG_NOW);
3454 err |= cfc_check_trigger_src(&cmd->scan_end_src, TRIG_COUNT); 3387 err |= cfc_check_trigger_src(&cmd->scan_end_src, TRIG_COUNT);
3455 err |= cfc_check_trigger_src(&cmd->stop_src, TRIG_NONE); 3388 err |= cfc_check_trigger_src(&cmd->stop_src, TRIG_NONE);
@@ -3473,29 +3406,21 @@ static int ao_cmdtest(struct comedi_device *dev, struct comedi_subdevice *s,
3473 if (err) 3406 if (err)
3474 return 2; 3407 return 2;
3475 3408
3476 /* step 3: make sure arguments are trivially compatible */ 3409 /* Step 3: check if arguments are trivially valid */
3477 3410
3478 if (cmd->scan_begin_src == TRIG_TIMER) { 3411 if (cmd->scan_begin_src == TRIG_TIMER) {
3479 if (cmd->scan_begin_arg < board(dev)->ao_scan_speed) { 3412 err |= cfc_check_trigger_arg_min(&cmd->scan_begin_arg,
3480 cmd->scan_begin_arg = board(dev)->ao_scan_speed; 3413 thisboard->ao_scan_speed);
3481 err++; 3414 if (get_ao_divisor(cmd->scan_begin_arg, cmd->flags) >
3482 } 3415 max_counter_value) {
3483 if (get_ao_divisor(cmd->scan_begin_arg, 3416 cmd->scan_begin_arg = (max_counter_value + 2) *
3484 cmd->flags) > max_counter_value) { 3417 TIMER_BASE;
3485 cmd->scan_begin_arg = 3418 err |= -EINVAL;
3486 (max_counter_value + 2) * TIMER_BASE;
3487 err++;
3488 } 3419 }
3489 } 3420 }
3490 3421
3491 if (!cmd->chanlist_len) { 3422 err |= cfc_check_trigger_arg_min(&cmd->chanlist_len, 1);
3492 cmd->chanlist_len = 1; 3423 err |= cfc_check_trigger_arg_is(&cmd->scan_end_arg, cmd->chanlist_len);
3493 err++;
3494 }
3495 if (cmd->scan_end_arg != cmd->chanlist_len) {
3496 cmd->scan_end_arg = cmd->chanlist_len;
3497 err++;
3498 }
3499 3424
3500 if (err) 3425 if (err)
3501 return 3; 3426 return 3;
@@ -3504,8 +3429,8 @@ static int ao_cmdtest(struct comedi_device *dev, struct comedi_subdevice *s,
3504 3429
3505 if (cmd->scan_begin_src == TRIG_TIMER) { 3430 if (cmd->scan_begin_src == TRIG_TIMER) {
3506 tmp_arg = cmd->scan_begin_arg; 3431 tmp_arg = cmd->scan_begin_arg;
3507 cmd->scan_begin_arg = 3432 cmd->scan_begin_arg = get_divisor(cmd->scan_begin_arg,
3508 get_divisor(cmd->scan_begin_arg, cmd->flags) * TIMER_BASE; 3433 cmd->flags) * TIMER_BASE;
3509 if (tmp_arg != cmd->scan_begin_arg) 3434 if (tmp_arg != cmd->scan_begin_arg)
3510 err++; 3435 err++;
3511 } 3436 }
@@ -3533,7 +3458,9 @@ static int ao_cmdtest(struct comedi_device *dev, struct comedi_subdevice *s,
3533 3458
3534static int ao_cancel(struct comedi_device *dev, struct comedi_subdevice *s) 3459static int ao_cancel(struct comedi_device *dev, struct comedi_subdevice *s)
3535{ 3460{
3536 writew(0x0, priv(dev)->main_iobase + DAC_CONTROL0_REG); 3461 struct pcidas64_private *devpriv = dev->private;
3462
3463 writew(0x0, devpriv->main_iobase + DAC_CONTROL0_REG);
3537 abort_dma(dev, 0); 3464 abort_dma(dev, 0);
3538 return 0; 3465 return 0;
3539} 3466}
@@ -3564,9 +3491,10 @@ static int dio_callback_4020(int dir, int port, int data, unsigned long arg)
3564static int di_rbits(struct comedi_device *dev, struct comedi_subdevice *s, 3491static int di_rbits(struct comedi_device *dev, struct comedi_subdevice *s,
3565 struct comedi_insn *insn, unsigned int *data) 3492 struct comedi_insn *insn, unsigned int *data)
3566{ 3493{
3494 struct pcidas64_private *devpriv = dev->private;
3567 unsigned int bits; 3495 unsigned int bits;
3568 3496
3569 bits = readb(priv(dev)->dio_counter_iobase + DI_REG); 3497 bits = readb(devpriv->dio_counter_iobase + DI_REG);
3570 bits &= 0xf; 3498 bits &= 0xf;
3571 data[1] = bits; 3499 data[1] = bits;
3572 data[0] = 0; 3500 data[0] = 0;
@@ -3577,13 +3505,15 @@ static int di_rbits(struct comedi_device *dev, struct comedi_subdevice *s,
3577static int do_wbits(struct comedi_device *dev, struct comedi_subdevice *s, 3505static int do_wbits(struct comedi_device *dev, struct comedi_subdevice *s,
3578 struct comedi_insn *insn, unsigned int *data) 3506 struct comedi_insn *insn, unsigned int *data)
3579{ 3507{
3508 struct pcidas64_private *devpriv = dev->private;
3509
3580 data[0] &= 0xf; 3510 data[0] &= 0xf;
3581 /* zero bits we are going to change */ 3511 /* zero bits we are going to change */
3582 s->state &= ~data[0]; 3512 s->state &= ~data[0];
3583 /* set new bits */ 3513 /* set new bits */
3584 s->state |= data[0] & data[1]; 3514 s->state |= data[0] & data[1];
3585 3515
3586 writeb(s->state, priv(dev)->dio_counter_iobase + DO_REG); 3516 writeb(s->state, devpriv->dio_counter_iobase + DO_REG);
3587 3517
3588 data[1] = s->state; 3518 data[1] = s->state;
3589 3519
@@ -3594,6 +3524,7 @@ static int dio_60xx_config_insn(struct comedi_device *dev,
3594 struct comedi_subdevice *s, 3524 struct comedi_subdevice *s,
3595 struct comedi_insn *insn, unsigned int *data) 3525 struct comedi_insn *insn, unsigned int *data)
3596{ 3526{
3527 struct pcidas64_private *devpriv = dev->private;
3597 unsigned int mask; 3528 unsigned int mask;
3598 3529
3599 mask = 1 << CR_CHAN(insn->chanspec); 3530 mask = 1 << CR_CHAN(insn->chanspec);
@@ -3613,7 +3544,7 @@ static int dio_60xx_config_insn(struct comedi_device *dev,
3613 } 3544 }
3614 3545
3615 writeb(s->io_bits, 3546 writeb(s->io_bits,
3616 priv(dev)->dio_counter_iobase + DIO_DIRECTION_60XX_REG); 3547 devpriv->dio_counter_iobase + DIO_DIRECTION_60XX_REG);
3617 3548
3618 return 1; 3549 return 1;
3619} 3550}
@@ -3621,24 +3552,143 @@ static int dio_60xx_config_insn(struct comedi_device *dev,
3621static int dio_60xx_wbits(struct comedi_device *dev, struct comedi_subdevice *s, 3552static int dio_60xx_wbits(struct comedi_device *dev, struct comedi_subdevice *s,
3622 struct comedi_insn *insn, unsigned int *data) 3553 struct comedi_insn *insn, unsigned int *data)
3623{ 3554{
3555 struct pcidas64_private *devpriv = dev->private;
3556
3624 if (data[0]) { 3557 if (data[0]) {
3625 s->state &= ~data[0]; 3558 s->state &= ~data[0];
3626 s->state |= (data[0] & data[1]); 3559 s->state |= (data[0] & data[1]);
3627 writeb(s->state, 3560 writeb(s->state,
3628 priv(dev)->dio_counter_iobase + DIO_DATA_60XX_REG); 3561 devpriv->dio_counter_iobase + DIO_DATA_60XX_REG);
3629 } 3562 }
3630 3563
3631 data[1] = readb(priv(dev)->dio_counter_iobase + DIO_DATA_60XX_REG); 3564 data[1] = readb(devpriv->dio_counter_iobase + DIO_DATA_60XX_REG);
3632 3565
3633 return insn->n; 3566 return insn->n;
3634} 3567}
3635 3568
3569/* pci-6025 8800 caldac:
3570 * address 0 == dac channel 0 offset
3571 * address 1 == dac channel 0 gain
3572 * address 2 == dac channel 1 offset
3573 * address 3 == dac channel 1 gain
3574 * address 4 == fine adc offset
3575 * address 5 == coarse adc offset
3576 * address 6 == coarse adc gain
3577 * address 7 == fine adc gain
3578 */
3579/* pci-6402/16 uses all 8 channels for dac:
3580 * address 0 == dac channel 0 fine gain
3581 * address 1 == dac channel 0 coarse gain
3582 * address 2 == dac channel 0 coarse offset
3583 * address 3 == dac channel 1 coarse offset
3584 * address 4 == dac channel 1 fine gain
3585 * address 5 == dac channel 1 coarse gain
3586 * address 6 == dac channel 0 fine offset
3587 * address 7 == dac channel 1 fine offset
3588*/
3589
3590static int caldac_8800_write(struct comedi_device *dev, unsigned int address,
3591 uint8_t value)
3592{
3593 struct pcidas64_private *devpriv = dev->private;
3594 static const int num_caldac_channels = 8;
3595 static const int bitstream_length = 11;
3596 unsigned int bitstream = ((address & 0x7) << 8) | value;
3597 unsigned int bit, register_bits;
3598 static const int caldac_8800_udelay = 1;
3599
3600 if (address >= num_caldac_channels) {
3601 comedi_error(dev, "illegal caldac channel");
3602 return -1;
3603 }
3604 for (bit = 1 << (bitstream_length - 1); bit; bit >>= 1) {
3605 register_bits = 0;
3606 if (bitstream & bit)
3607 register_bits |= SERIAL_DATA_IN_BIT;
3608 udelay(caldac_8800_udelay);
3609 writew(register_bits, devpriv->main_iobase + CALIBRATION_REG);
3610 register_bits |= SERIAL_CLOCK_BIT;
3611 udelay(caldac_8800_udelay);
3612 writew(register_bits, devpriv->main_iobase + CALIBRATION_REG);
3613 }
3614 udelay(caldac_8800_udelay);
3615 writew(SELECT_8800_BIT, devpriv->main_iobase + CALIBRATION_REG);
3616 udelay(caldac_8800_udelay);
3617 writew(0, devpriv->main_iobase + CALIBRATION_REG);
3618 udelay(caldac_8800_udelay);
3619 return 0;
3620}
3621
3622/* 4020 caldacs */
3623static int caldac_i2c_write(struct comedi_device *dev,
3624 unsigned int caldac_channel, unsigned int value)
3625{
3626 uint8_t serial_bytes[3];
3627 uint8_t i2c_addr;
3628 enum pointer_bits {
3629 /* manual has gain and offset bits switched */
3630 OFFSET_0_2 = 0x1,
3631 GAIN_0_2 = 0x2,
3632 OFFSET_1_3 = 0x4,
3633 GAIN_1_3 = 0x8,
3634 };
3635 enum data_bits {
3636 NOT_CLEAR_REGISTERS = 0x20,
3637 };
3638
3639 switch (caldac_channel) {
3640 case 0: /* chan 0 offset */
3641 i2c_addr = CALDAC0_I2C_ADDR;
3642 serial_bytes[0] = OFFSET_0_2;
3643 break;
3644 case 1: /* chan 1 offset */
3645 i2c_addr = CALDAC0_I2C_ADDR;
3646 serial_bytes[0] = OFFSET_1_3;
3647 break;
3648 case 2: /* chan 2 offset */
3649 i2c_addr = CALDAC1_I2C_ADDR;
3650 serial_bytes[0] = OFFSET_0_2;
3651 break;
3652 case 3: /* chan 3 offset */
3653 i2c_addr = CALDAC1_I2C_ADDR;
3654 serial_bytes[0] = OFFSET_1_3;
3655 break;
3656 case 4: /* chan 0 gain */
3657 i2c_addr = CALDAC0_I2C_ADDR;
3658 serial_bytes[0] = GAIN_0_2;
3659 break;
3660 case 5: /* chan 1 gain */
3661 i2c_addr = CALDAC0_I2C_ADDR;
3662 serial_bytes[0] = GAIN_1_3;
3663 break;
3664 case 6: /* chan 2 gain */
3665 i2c_addr = CALDAC1_I2C_ADDR;
3666 serial_bytes[0] = GAIN_0_2;
3667 break;
3668 case 7: /* chan 3 gain */
3669 i2c_addr = CALDAC1_I2C_ADDR;
3670 serial_bytes[0] = GAIN_1_3;
3671 break;
3672 default:
3673 comedi_error(dev, "invalid caldac channel\n");
3674 return -1;
3675 break;
3676 }
3677 serial_bytes[1] = NOT_CLEAR_REGISTERS | ((value >> 8) & 0xf);
3678 serial_bytes[2] = value & 0xff;
3679 i2c_write(dev, i2c_addr, serial_bytes, 3);
3680 return 0;
3681}
3682
3636static void caldac_write(struct comedi_device *dev, unsigned int channel, 3683static void caldac_write(struct comedi_device *dev, unsigned int channel,
3637 unsigned int value) 3684 unsigned int value)
3638{ 3685{
3639 priv(dev)->caldac_state[channel] = value; 3686 const struct pcidas64_board *thisboard = comedi_board(dev);
3687 struct pcidas64_private *devpriv = dev->private;
3688
3689 devpriv->caldac_state[channel] = value;
3640 3690
3641 switch (board(dev)->layout) { 3691 switch (thisboard->layout) {
3642 case LAYOUT_60XX: 3692 case LAYOUT_60XX:
3643 case LAYOUT_64XX: 3693 case LAYOUT_64XX:
3644 caldac_8800_write(dev, channel, value); 3694 caldac_8800_write(dev, channel, value);
@@ -3655,11 +3705,12 @@ static int calib_write_insn(struct comedi_device *dev,
3655 struct comedi_subdevice *s, 3705 struct comedi_subdevice *s,
3656 struct comedi_insn *insn, unsigned int *data) 3706 struct comedi_insn *insn, unsigned int *data)
3657{ 3707{
3708 struct pcidas64_private *devpriv = dev->private;
3658 int channel = CR_CHAN(insn->chanspec); 3709 int channel = CR_CHAN(insn->chanspec);
3659 3710
3660 /* return immediately if setting hasn't changed, since 3711 /* return immediately if setting hasn't changed, since
3661 * programming these things is slow */ 3712 * programming these things is slow */
3662 if (priv(dev)->caldac_state[channel] == data[0]) 3713 if (devpriv->caldac_state[channel] == data[0])
3663 return 1; 3714 return 1;
3664 3715
3665 caldac_write(dev, channel, data[0]); 3716 caldac_write(dev, channel, data[0]);
@@ -3671,9 +3722,10 @@ static int calib_read_insn(struct comedi_device *dev,
3671 struct comedi_subdevice *s, struct comedi_insn *insn, 3722 struct comedi_subdevice *s, struct comedi_insn *insn,
3672 unsigned int *data) 3723 unsigned int *data)
3673{ 3724{
3725 struct pcidas64_private *devpriv = dev->private;
3674 unsigned int channel = CR_CHAN(insn->chanspec); 3726 unsigned int channel = CR_CHAN(insn->chanspec);
3675 3727
3676 data[0] = priv(dev)->caldac_state[channel]; 3728 data[0] = devpriv->caldac_state[channel];
3677 3729
3678 return 1; 3730 return 1;
3679} 3731}
@@ -3681,16 +3733,17 @@ static int calib_read_insn(struct comedi_device *dev,
3681static void ad8402_write(struct comedi_device *dev, unsigned int channel, 3733static void ad8402_write(struct comedi_device *dev, unsigned int channel,
3682 unsigned int value) 3734 unsigned int value)
3683{ 3735{
3736 struct pcidas64_private *devpriv = dev->private;
3684 static const int bitstream_length = 10; 3737 static const int bitstream_length = 10;
3685 unsigned int bit, register_bits; 3738 unsigned int bit, register_bits;
3686 unsigned int bitstream = ((channel & 0x3) << 8) | (value & 0xff); 3739 unsigned int bitstream = ((channel & 0x3) << 8) | (value & 0xff);
3687 static const int ad8402_udelay = 1; 3740 static const int ad8402_udelay = 1;
3688 3741
3689 priv(dev)->ad8402_state[channel] = value; 3742 devpriv->ad8402_state[channel] = value;
3690 3743
3691 register_bits = SELECT_8402_64XX_BIT; 3744 register_bits = SELECT_8402_64XX_BIT;
3692 udelay(ad8402_udelay); 3745 udelay(ad8402_udelay);
3693 writew(register_bits, priv(dev)->main_iobase + CALIBRATION_REG); 3746 writew(register_bits, devpriv->main_iobase + CALIBRATION_REG);
3694 3747
3695 for (bit = 1 << (bitstream_length - 1); bit; bit >>= 1) { 3748 for (bit = 1 << (bitstream_length - 1); bit; bit >>= 1) {
3696 if (bitstream & bit) 3749 if (bitstream & bit)
@@ -3698,14 +3751,14 @@ static void ad8402_write(struct comedi_device *dev, unsigned int channel,
3698 else 3751 else
3699 register_bits &= ~SERIAL_DATA_IN_BIT; 3752 register_bits &= ~SERIAL_DATA_IN_BIT;
3700 udelay(ad8402_udelay); 3753 udelay(ad8402_udelay);
3701 writew(register_bits, priv(dev)->main_iobase + CALIBRATION_REG); 3754 writew(register_bits, devpriv->main_iobase + CALIBRATION_REG);
3702 udelay(ad8402_udelay); 3755 udelay(ad8402_udelay);
3703 writew(register_bits | SERIAL_CLOCK_BIT, 3756 writew(register_bits | SERIAL_CLOCK_BIT,
3704 priv(dev)->main_iobase + CALIBRATION_REG); 3757 devpriv->main_iobase + CALIBRATION_REG);
3705 } 3758 }
3706 3759
3707 udelay(ad8402_udelay); 3760 udelay(ad8402_udelay);
3708 writew(0, priv(dev)->main_iobase + CALIBRATION_REG); 3761 writew(0, devpriv->main_iobase + CALIBRATION_REG);
3709} 3762}
3710 3763
3711/* for pci-das6402/16, channel 0 is analog input gain and channel 1 is offset */ 3764/* for pci-das6402/16, channel 0 is analog input gain and channel 1 is offset */
@@ -3713,14 +3766,15 @@ static int ad8402_write_insn(struct comedi_device *dev,
3713 struct comedi_subdevice *s, 3766 struct comedi_subdevice *s,
3714 struct comedi_insn *insn, unsigned int *data) 3767 struct comedi_insn *insn, unsigned int *data)
3715{ 3768{
3769 struct pcidas64_private *devpriv = dev->private;
3716 int channel = CR_CHAN(insn->chanspec); 3770 int channel = CR_CHAN(insn->chanspec);
3717 3771
3718 /* return immediately if setting hasn't changed, since 3772 /* return immediately if setting hasn't changed, since
3719 * programming these things is slow */ 3773 * programming these things is slow */
3720 if (priv(dev)->ad8402_state[channel] == data[0]) 3774 if (devpriv->ad8402_state[channel] == data[0])
3721 return 1; 3775 return 1;
3722 3776
3723 priv(dev)->ad8402_state[channel] = data[0]; 3777 devpriv->ad8402_state[channel] = data[0];
3724 3778
3725 ad8402_write(dev, channel, data[0]); 3779 ad8402_write(dev, channel, data[0]);
3726 3780
@@ -3731,62 +3785,64 @@ static int ad8402_read_insn(struct comedi_device *dev,
3731 struct comedi_subdevice *s, 3785 struct comedi_subdevice *s,
3732 struct comedi_insn *insn, unsigned int *data) 3786 struct comedi_insn *insn, unsigned int *data)
3733{ 3787{
3788 struct pcidas64_private *devpriv = dev->private;
3734 unsigned int channel = CR_CHAN(insn->chanspec); 3789 unsigned int channel = CR_CHAN(insn->chanspec);
3735 3790
3736 data[0] = priv(dev)->ad8402_state[channel]; 3791 data[0] = devpriv->ad8402_state[channel];
3737 3792
3738 return 1; 3793 return 1;
3739} 3794}
3740 3795
3741static uint16_t read_eeprom(struct comedi_device *dev, uint8_t address) 3796static uint16_t read_eeprom(struct comedi_device *dev, uint8_t address)
3742{ 3797{
3798 struct pcidas64_private *devpriv = dev->private;
3743 static const int bitstream_length = 11; 3799 static const int bitstream_length = 11;
3744 static const int read_command = 0x6; 3800 static const int read_command = 0x6;
3745 unsigned int bitstream = (read_command << 8) | address; 3801 unsigned int bitstream = (read_command << 8) | address;
3746 unsigned int bit; 3802 unsigned int bit;
3747 void __iomem * const plx_control_addr = 3803 void __iomem * const plx_control_addr =
3748 priv(dev)->plx9080_iobase + PLX_CONTROL_REG; 3804 devpriv->plx9080_iobase + PLX_CONTROL_REG;
3749 uint16_t value; 3805 uint16_t value;
3750 static const int value_length = 16; 3806 static const int value_length = 16;
3751 static const int eeprom_udelay = 1; 3807 static const int eeprom_udelay = 1;
3752 3808
3753 udelay(eeprom_udelay); 3809 udelay(eeprom_udelay);
3754 priv(dev)->plx_control_bits &= ~CTL_EE_CLK & ~CTL_EE_CS; 3810 devpriv->plx_control_bits &= ~CTL_EE_CLK & ~CTL_EE_CS;
3755 /* make sure we don't send anything to the i2c bus on 4020 */ 3811 /* make sure we don't send anything to the i2c bus on 4020 */
3756 priv(dev)->plx_control_bits |= CTL_USERO; 3812 devpriv->plx_control_bits |= CTL_USERO;
3757 writel(priv(dev)->plx_control_bits, plx_control_addr); 3813 writel(devpriv->plx_control_bits, plx_control_addr);
3758 /* activate serial eeprom */ 3814 /* activate serial eeprom */
3759 udelay(eeprom_udelay); 3815 udelay(eeprom_udelay);
3760 priv(dev)->plx_control_bits |= CTL_EE_CS; 3816 devpriv->plx_control_bits |= CTL_EE_CS;
3761 writel(priv(dev)->plx_control_bits, plx_control_addr); 3817 writel(devpriv->plx_control_bits, plx_control_addr);
3762 3818
3763 /* write read command and desired memory address */ 3819 /* write read command and desired memory address */
3764 for (bit = 1 << (bitstream_length - 1); bit; bit >>= 1) { 3820 for (bit = 1 << (bitstream_length - 1); bit; bit >>= 1) {
3765 /* set bit to be written */ 3821 /* set bit to be written */
3766 udelay(eeprom_udelay); 3822 udelay(eeprom_udelay);
3767 if (bitstream & bit) 3823 if (bitstream & bit)
3768 priv(dev)->plx_control_bits |= CTL_EE_W; 3824 devpriv->plx_control_bits |= CTL_EE_W;
3769 else 3825 else
3770 priv(dev)->plx_control_bits &= ~CTL_EE_W; 3826 devpriv->plx_control_bits &= ~CTL_EE_W;
3771 writel(priv(dev)->plx_control_bits, plx_control_addr); 3827 writel(devpriv->plx_control_bits, plx_control_addr);
3772 /* clock in bit */ 3828 /* clock in bit */
3773 udelay(eeprom_udelay); 3829 udelay(eeprom_udelay);
3774 priv(dev)->plx_control_bits |= CTL_EE_CLK; 3830 devpriv->plx_control_bits |= CTL_EE_CLK;
3775 writel(priv(dev)->plx_control_bits, plx_control_addr); 3831 writel(devpriv->plx_control_bits, plx_control_addr);
3776 udelay(eeprom_udelay); 3832 udelay(eeprom_udelay);
3777 priv(dev)->plx_control_bits &= ~CTL_EE_CLK; 3833 devpriv->plx_control_bits &= ~CTL_EE_CLK;
3778 writel(priv(dev)->plx_control_bits, plx_control_addr); 3834 writel(devpriv->plx_control_bits, plx_control_addr);
3779 } 3835 }
3780 /* read back value from eeprom memory location */ 3836 /* read back value from eeprom memory location */
3781 value = 0; 3837 value = 0;
3782 for (bit = 1 << (value_length - 1); bit; bit >>= 1) { 3838 for (bit = 1 << (value_length - 1); bit; bit >>= 1) {
3783 /* clock out bit */ 3839 /* clock out bit */
3784 udelay(eeprom_udelay); 3840 udelay(eeprom_udelay);
3785 priv(dev)->plx_control_bits |= CTL_EE_CLK; 3841 devpriv->plx_control_bits |= CTL_EE_CLK;
3786 writel(priv(dev)->plx_control_bits, plx_control_addr); 3842 writel(devpriv->plx_control_bits, plx_control_addr);
3787 udelay(eeprom_udelay); 3843 udelay(eeprom_udelay);
3788 priv(dev)->plx_control_bits &= ~CTL_EE_CLK; 3844 devpriv->plx_control_bits &= ~CTL_EE_CLK;
3789 writel(priv(dev)->plx_control_bits, plx_control_addr); 3845 writel(devpriv->plx_control_bits, plx_control_addr);
3790 udelay(eeprom_udelay); 3846 udelay(eeprom_udelay);
3791 if (readl(plx_control_addr) & CTL_EE_R) 3847 if (readl(plx_control_addr) & CTL_EE_R)
3792 value |= bit; 3848 value |= bit;
@@ -3794,8 +3850,8 @@ static uint16_t read_eeprom(struct comedi_device *dev, uint8_t address)
3794 3850
3795 /* deactivate eeprom serial input */ 3851 /* deactivate eeprom serial input */
3796 udelay(eeprom_udelay); 3852 udelay(eeprom_udelay);
3797 priv(dev)->plx_control_bits &= ~CTL_EE_CS; 3853 devpriv->plx_control_bits &= ~CTL_EE_CS;
3798 writel(priv(dev)->plx_control_bits, plx_control_addr); 3854 writel(devpriv->plx_control_bits, plx_control_addr);
3799 3855
3800 return value; 3856 return value;
3801} 3857}
@@ -3809,419 +3865,386 @@ static int eeprom_read_insn(struct comedi_device *dev,
3809 return 1; 3865 return 1;
3810} 3866}
3811 3867
3812/* utility function that rounds desired timing to an achievable time, and 3868/* Allocate and initialize the subdevice structures.
3813 * sets cmd members appropriately.
3814 * adc paces conversions from master clock by dividing by (x + 3) where x is 24 bit number
3815 */ 3869 */
3816static void check_adc_timing(struct comedi_device *dev, struct comedi_cmd *cmd) 3870static int setup_subdevices(struct comedi_device *dev)
3817{ 3871{
3818 unsigned int convert_divisor = 0, scan_divisor; 3872 const struct pcidas64_board *thisboard = comedi_board(dev);
3819 static const int min_convert_divisor = 3; 3873 struct pcidas64_private *devpriv = dev->private;
3820 static const int max_convert_divisor = 3874 struct comedi_subdevice *s;
3821 max_counter_value + min_convert_divisor; 3875 void __iomem *dio_8255_iobase;
3822 static const int min_scan_divisor_4020 = 2; 3876 int i;
3823 unsigned long long max_scan_divisor, min_scan_divisor; 3877 int ret;
3824 3878
3825 if (cmd->convert_src == TRIG_TIMER) { 3879 ret = comedi_alloc_subdevices(dev, 10);
3826 if (board(dev)->layout == LAYOUT_4020) { 3880 if (ret)
3827 cmd->convert_arg = 0; 3881 return ret;
3828 } else {
3829 convert_divisor =
3830 get_divisor(cmd->convert_arg, cmd->flags);
3831 if (convert_divisor > max_convert_divisor)
3832 convert_divisor = max_convert_divisor;
3833 if (convert_divisor < min_convert_divisor)
3834 convert_divisor = min_convert_divisor;
3835 cmd->convert_arg = convert_divisor * TIMER_BASE;
3836 }
3837 } else if (cmd->convert_src == TRIG_NOW)
3838 cmd->convert_arg = 0;
3839 3882
3840 if (cmd->scan_begin_src == TRIG_TIMER) { 3883 s = &dev->subdevices[0];
3841 scan_divisor = get_divisor(cmd->scan_begin_arg, cmd->flags); 3884 /* analog input subdevice */
3842 if (cmd->convert_src == TRIG_TIMER) { 3885 dev->read_subdev = s;
3843 /* XXX check for integer overflows */ 3886 s->type = COMEDI_SUBD_AI;
3844 min_scan_divisor = convert_divisor * cmd->chanlist_len; 3887 s->subdev_flags = SDF_READABLE | SDF_GROUND | SDF_DITHER | SDF_CMD_READ;
3845 max_scan_divisor = 3888 if (thisboard->layout == LAYOUT_60XX)
3846 (convert_divisor * cmd->chanlist_len - 1) + 3889 s->subdev_flags |= SDF_COMMON | SDF_DIFF;
3847 max_counter_value; 3890 else if (thisboard->layout == LAYOUT_64XX)
3848 } else { 3891 s->subdev_flags |= SDF_DIFF;
3849 min_scan_divisor = min_scan_divisor_4020; 3892 /* XXX Number of inputs in differential mode is ignored */
3850 max_scan_divisor = max_counter_value + min_scan_divisor; 3893 s->n_chan = thisboard->ai_se_chans;
3851 } 3894 s->len_chanlist = 0x2000;
3852 if (scan_divisor > max_scan_divisor) 3895 s->maxdata = (1 << thisboard->ai_bits) - 1;
3853 scan_divisor = max_scan_divisor; 3896 s->range_table = thisboard->ai_range_table;
3854 if (scan_divisor < min_scan_divisor) 3897 s->insn_read = ai_rinsn;
3855 scan_divisor = min_scan_divisor; 3898 s->insn_config = ai_config_insn;
3856 cmd->scan_begin_arg = scan_divisor * TIMER_BASE; 3899 s->do_cmd = ai_cmd;
3900 s->do_cmdtest = ai_cmdtest;
3901 s->cancel = ai_cancel;
3902 if (thisboard->layout == LAYOUT_4020) {
3903 uint8_t data;
3904 /* set adc to read from inputs
3905 * (not internal calibration sources) */
3906 devpriv->i2c_cal_range_bits = adc_src_4020_bits(4);
3907 /* set channels to +-5 volt input ranges */
3908 for (i = 0; i < s->n_chan; i++)
3909 devpriv->i2c_cal_range_bits |= attenuate_bit(i);
3910 data = devpriv->i2c_cal_range_bits;
3911 i2c_write(dev, RANGE_CAL_I2C_ADDR, &data, sizeof(data));
3857 } 3912 }
3858 3913
3859 return; 3914 /* analog output subdevice */
3860} 3915 s = &dev->subdevices[1];
3861 3916 if (thisboard->ao_nchan) {
3862/* Gets nearest achievable timing given master clock speed, does not 3917 s->type = COMEDI_SUBD_AO;
3863 * take into account possible minimum/maximum divisor values. Used 3918 s->subdev_flags = SDF_READABLE | SDF_WRITABLE |
3864 * by other timing checking functions. */ 3919 SDF_GROUND | SDF_CMD_WRITE;
3865static unsigned int get_divisor(unsigned int ns, unsigned int flags) 3920 s->n_chan = thisboard->ao_nchan;
3866{ 3921 s->maxdata = (1 << thisboard->ao_bits) - 1;
3867 unsigned int divisor; 3922 s->range_table = thisboard->ao_range_table;
3868 3923 s->insn_read = ao_readback_insn;
3869 switch (flags & TRIG_ROUND_MASK) { 3924 s->insn_write = ao_winsn;
3870 case TRIG_ROUND_UP: 3925 if (ao_cmd_is_supported(thisboard)) {
3871 divisor = (ns + TIMER_BASE - 1) / TIMER_BASE; 3926 dev->write_subdev = s;
3872 break; 3927 s->do_cmdtest = ao_cmdtest;
3873 case TRIG_ROUND_DOWN: 3928 s->do_cmd = ao_cmd;
3874 divisor = ns / TIMER_BASE; 3929 s->len_chanlist = thisboard->ao_nchan;
3875 break; 3930 s->cancel = ao_cancel;
3876 case TRIG_ROUND_NEAREST: 3931 }
3877 default: 3932 } else {
3878 divisor = (ns + TIMER_BASE / 2) / TIMER_BASE; 3933 s->type = COMEDI_SUBD_UNUSED;
3879 break;
3880 } 3934 }
3881 return divisor;
3882}
3883 3935
3884static unsigned int get_ao_divisor(unsigned int ns, unsigned int flags) 3936 /* digital input */
3885{ 3937 s = &dev->subdevices[2];
3886 return get_divisor(ns, flags) - 2; 3938 if (thisboard->layout == LAYOUT_64XX) {
3887} 3939 s->type = COMEDI_SUBD_DI;
3940 s->subdev_flags = SDF_READABLE;
3941 s->n_chan = 4;
3942 s->maxdata = 1;
3943 s->range_table = &range_digital;
3944 s->insn_bits = di_rbits;
3945 } else
3946 s->type = COMEDI_SUBD_UNUSED;
3888 3947
3889/* adjusts the size of hardware fifo (which determines block size for dma xfers) */ 3948 /* digital output */
3890static int set_ai_fifo_size(struct comedi_device *dev, unsigned int num_samples) 3949 if (thisboard->layout == LAYOUT_64XX) {
3891{ 3950 s = &dev->subdevices[3];
3892 unsigned int num_fifo_entries; 3951 s->type = COMEDI_SUBD_DO;
3893 int retval; 3952 s->subdev_flags = SDF_WRITABLE | SDF_READABLE;
3894 const struct hw_fifo_info *const fifo = board(dev)->ai_fifo; 3953 s->n_chan = 4;
3954 s->maxdata = 1;
3955 s->range_table = &range_digital;
3956 s->insn_bits = do_wbits;
3957 } else
3958 s->type = COMEDI_SUBD_UNUSED;
3895 3959
3896 num_fifo_entries = num_samples / fifo->sample_packing_ratio; 3960 /* 8255 */
3961 s = &dev->subdevices[4];
3962 if (thisboard->has_8255) {
3963 if (thisboard->layout == LAYOUT_4020) {
3964 dio_8255_iobase = devpriv->main_iobase + I8255_4020_REG;
3965 subdev_8255_init(dev, s, dio_callback_4020,
3966 (unsigned long)dio_8255_iobase);
3967 } else {
3968 dio_8255_iobase =
3969 devpriv->dio_counter_iobase + DIO_8255_OFFSET;
3970 subdev_8255_init(dev, s, dio_callback,
3971 (unsigned long)dio_8255_iobase);
3972 }
3973 } else
3974 s->type = COMEDI_SUBD_UNUSED;
3897 3975
3898 retval = set_ai_fifo_segment_length(dev, 3976 /* 8 channel dio for 60xx */
3899 num_fifo_entries / 3977 s = &dev->subdevices[5];
3900 fifo->num_segments); 3978 if (thisboard->layout == LAYOUT_60XX) {
3901 if (retval < 0) 3979 s->type = COMEDI_SUBD_DIO;
3902 return retval; 3980 s->subdev_flags = SDF_WRITABLE | SDF_READABLE;
3981 s->n_chan = 8;
3982 s->maxdata = 1;
3983 s->range_table = &range_digital;
3984 s->insn_config = dio_60xx_config_insn;
3985 s->insn_bits = dio_60xx_wbits;
3986 } else
3987 s->type = COMEDI_SUBD_UNUSED;
3903 3988
3904 num_samples = retval * fifo->num_segments * fifo->sample_packing_ratio; 3989 /* caldac */
3990 s = &dev->subdevices[6];
3991 s->type = COMEDI_SUBD_CALIB;
3992 s->subdev_flags = SDF_READABLE | SDF_WRITABLE | SDF_INTERNAL;
3993 s->n_chan = 8;
3994 if (thisboard->layout == LAYOUT_4020)
3995 s->maxdata = 0xfff;
3996 else
3997 s->maxdata = 0xff;
3998 s->insn_read = calib_read_insn;
3999 s->insn_write = calib_write_insn;
4000 for (i = 0; i < s->n_chan; i++)
4001 caldac_write(dev, i, s->maxdata / 2);
3905 4002
3906 DEBUG_PRINT("set hardware fifo size to %i\n", num_samples); 4003 /* 2 channel ad8402 potentiometer */
4004 s = &dev->subdevices[7];
4005 if (thisboard->layout == LAYOUT_64XX) {
4006 s->type = COMEDI_SUBD_CALIB;
4007 s->subdev_flags = SDF_READABLE | SDF_WRITABLE | SDF_INTERNAL;
4008 s->n_chan = 2;
4009 s->insn_read = ad8402_read_insn;
4010 s->insn_write = ad8402_write_insn;
4011 s->maxdata = 0xff;
4012 for (i = 0; i < s->n_chan; i++)
4013 ad8402_write(dev, i, s->maxdata / 2);
4014 } else
4015 s->type = COMEDI_SUBD_UNUSED;
3907 4016
3908 return num_samples; 4017 /* serial EEPROM, if present */
3909} 4018 s = &dev->subdevices[8];
4019 if (readl(devpriv->plx9080_iobase + PLX_CONTROL_REG) & CTL_EECHK) {
4020 s->type = COMEDI_SUBD_MEMORY;
4021 s->subdev_flags = SDF_READABLE | SDF_INTERNAL;
4022 s->n_chan = 128;
4023 s->maxdata = 0xffff;
4024 s->insn_read = eeprom_read_insn;
4025 } else
4026 s->type = COMEDI_SUBD_UNUSED;
3910 4027
3911/* query length of fifo */ 4028 /* user counter subd XXX */
3912static unsigned int ai_fifo_size(struct comedi_device *dev) 4029 s = &dev->subdevices[9];
3913{ 4030 s->type = COMEDI_SUBD_UNUSED;
3914 return priv(dev)->ai_fifo_segment_length * 4031
3915 board(dev)->ai_fifo->num_segments * 4032 return 0;
3916 board(dev)->ai_fifo->sample_packing_ratio;
3917} 4033}
3918 4034
3919static int set_ai_fifo_segment_length(struct comedi_device *dev, 4035static const struct pcidas64_board
3920 unsigned int num_entries) 4036*cb_pcidas64_find_pci_board(struct pci_dev *pcidev)
3921{ 4037{
3922 static const int increment_size = 0x100; 4038 unsigned int i;
3923 const struct hw_fifo_info *const fifo = board(dev)->ai_fifo;
3924 unsigned int num_increments;
3925 uint16_t bits;
3926
3927 if (num_entries < increment_size)
3928 num_entries = increment_size;
3929 if (num_entries > fifo->max_segment_length)
3930 num_entries = fifo->max_segment_length;
3931
3932 /* 1 == 256 entries, 2 == 512 entries, etc */
3933 num_increments = (num_entries + increment_size / 2) / increment_size;
3934
3935 bits = (~(num_increments - 1)) & fifo->fifo_size_reg_mask;
3936 priv(dev)->fifo_size_bits &= ~fifo->fifo_size_reg_mask;
3937 priv(dev)->fifo_size_bits |= bits;
3938 writew(priv(dev)->fifo_size_bits,
3939 priv(dev)->main_iobase + FIFO_SIZE_REG);
3940
3941 priv(dev)->ai_fifo_segment_length = num_increments * increment_size;
3942
3943 DEBUG_PRINT("set hardware fifo segment length to %i\n",
3944 priv(dev)->ai_fifo_segment_length);
3945 4039
3946 return priv(dev)->ai_fifo_segment_length; 4040 for (i = 0; i < ARRAY_SIZE(pcidas64_boards); i++)
4041 if (pcidev->device == pcidas64_boards[i].device_id)
4042 return &pcidas64_boards[i];
4043 return NULL;
3947} 4044}
3948 4045
3949/* pci-6025 8800 caldac: 4046static int auto_attach(struct comedi_device *dev,
3950 * address 0 == dac channel 0 offset 4047 unsigned long context_unused)
3951 * address 1 == dac channel 0 gain
3952 * address 2 == dac channel 1 offset
3953 * address 3 == dac channel 1 gain
3954 * address 4 == fine adc offset
3955 * address 5 == coarse adc offset
3956 * address 6 == coarse adc gain
3957 * address 7 == fine adc gain
3958 */
3959/* pci-6402/16 uses all 8 channels for dac:
3960 * address 0 == dac channel 0 fine gain
3961 * address 1 == dac channel 0 coarse gain
3962 * address 2 == dac channel 0 coarse offset
3963 * address 3 == dac channel 1 coarse offset
3964 * address 4 == dac channel 1 fine gain
3965 * address 5 == dac channel 1 coarse gain
3966 * address 6 == dac channel 0 fine offset
3967 * address 7 == dac channel 1 fine offset
3968*/
3969
3970static int caldac_8800_write(struct comedi_device *dev, unsigned int address,
3971 uint8_t value)
3972{ 4048{
3973 static const int num_caldac_channels = 8; 4049 const struct pcidas64_board *thisboard;
3974 static const int bitstream_length = 11; 4050 struct pcidas64_private *devpriv;
3975 unsigned int bitstream = ((address & 0x7) << 8) | value; 4051 struct pci_dev *pcidev = comedi_to_pci_dev(dev);
3976 unsigned int bit, register_bits; 4052 uint32_t local_range, local_decode;
3977 static const int caldac_8800_udelay = 1; 4053 int retval;
3978 4054
3979 if (address >= num_caldac_channels) { 4055 dev->board_ptr = cb_pcidas64_find_pci_board(pcidev);
3980 comedi_error(dev, "illegal caldac channel"); 4056 if (!dev->board_ptr) {
3981 return -1; 4057 dev_err(dev->class_dev,
3982 } 4058 "cb_pcidas64: does not support pci %s\n",
3983 for (bit = 1 << (bitstream_length - 1); bit; bit >>= 1) { 4059 pci_name(pcidev));
3984 register_bits = 0; 4060 return -EINVAL;
3985 if (bitstream & bit)
3986 register_bits |= SERIAL_DATA_IN_BIT;
3987 udelay(caldac_8800_udelay);
3988 writew(register_bits, priv(dev)->main_iobase + CALIBRATION_REG);
3989 register_bits |= SERIAL_CLOCK_BIT;
3990 udelay(caldac_8800_udelay);
3991 writew(register_bits, priv(dev)->main_iobase + CALIBRATION_REG);
3992 } 4061 }
3993 udelay(caldac_8800_udelay); 4062 thisboard = comedi_board(dev);
3994 writew(SELECT_8800_BIT, priv(dev)->main_iobase + CALIBRATION_REG);
3995 udelay(caldac_8800_udelay);
3996 writew(0, priv(dev)->main_iobase + CALIBRATION_REG);
3997 udelay(caldac_8800_udelay);
3998 return 0;
3999}
4000 4063
4001/* 4020 caldacs */ 4064 devpriv = kzalloc(sizeof(*devpriv), GFP_KERNEL);
4002static int caldac_i2c_write(struct comedi_device *dev, 4065 if (!devpriv)
4003 unsigned int caldac_channel, unsigned int value) 4066 return -ENOMEM;
4004{ 4067 dev->private = devpriv;
4005 uint8_t serial_bytes[3];
4006 uint8_t i2c_addr;
4007 enum pointer_bits {
4008 /* manual has gain and offset bits switched */
4009 OFFSET_0_2 = 0x1,
4010 GAIN_0_2 = 0x2,
4011 OFFSET_1_3 = 0x4,
4012 GAIN_1_3 = 0x8,
4013 };
4014 enum data_bits {
4015 NOT_CLEAR_REGISTERS = 0x20,
4016 };
4017 4068
4018 switch (caldac_channel) { 4069 if (comedi_pci_enable(pcidev, dev->driver->driver_name)) {
4019 case 0: /* chan 0 offset */ 4070 dev_warn(dev->class_dev,
4020 i2c_addr = CALDAC0_I2C_ADDR; 4071 "failed to enable PCI device and request regions\n");
4021 serial_bytes[0] = OFFSET_0_2; 4072 return -EIO;
4022 break;
4023 case 1: /* chan 1 offset */
4024 i2c_addr = CALDAC0_I2C_ADDR;
4025 serial_bytes[0] = OFFSET_1_3;
4026 break;
4027 case 2: /* chan 2 offset */
4028 i2c_addr = CALDAC1_I2C_ADDR;
4029 serial_bytes[0] = OFFSET_0_2;
4030 break;
4031 case 3: /* chan 3 offset */
4032 i2c_addr = CALDAC1_I2C_ADDR;
4033 serial_bytes[0] = OFFSET_1_3;
4034 break;
4035 case 4: /* chan 0 gain */
4036 i2c_addr = CALDAC0_I2C_ADDR;
4037 serial_bytes[0] = GAIN_0_2;
4038 break;
4039 case 5: /* chan 1 gain */
4040 i2c_addr = CALDAC0_I2C_ADDR;
4041 serial_bytes[0] = GAIN_1_3;
4042 break;
4043 case 6: /* chan 2 gain */
4044 i2c_addr = CALDAC1_I2C_ADDR;
4045 serial_bytes[0] = GAIN_0_2;
4046 break;
4047 case 7: /* chan 3 gain */
4048 i2c_addr = CALDAC1_I2C_ADDR;
4049 serial_bytes[0] = GAIN_1_3;
4050 break;
4051 default:
4052 comedi_error(dev, "invalid caldac channel\n");
4053 return -1;
4054 break;
4055 } 4073 }
4056 serial_bytes[1] = NOT_CLEAR_REGISTERS | ((value >> 8) & 0xf); 4074 pci_set_master(pcidev);
4057 serial_bytes[2] = value & 0xff;
4058 i2c_write(dev, i2c_addr, serial_bytes, 3);
4059 return 0;
4060}
4061 4075
4062/* Their i2c requires a huge delay on setting clock or data high for some reason */ 4076 /* Initialize dev->board_name */
4063static const int i2c_high_udelay = 1000; 4077 dev->board_name = thisboard->name;
4064static const int i2c_low_udelay = 10;
4065 4078
4066/* set i2c data line high or low */ 4079 dev->iobase = pci_resource_start(pcidev, MAIN_BADDRINDEX);
4067static void i2c_set_sda(struct comedi_device *dev, int state)
4068{
4069 static const int data_bit = CTL_EE_W;
4070 void __iomem *plx_control_addr = priv(dev)->plx9080_iobase +
4071 PLX_CONTROL_REG;
4072 4080
4073 if (state) { 4081 devpriv->plx9080_phys_iobase =
4074 /* set data line high */ 4082 pci_resource_start(pcidev, PLX9080_BADDRINDEX);
4075 priv(dev)->plx_control_bits &= ~data_bit; 4083 devpriv->main_phys_iobase = dev->iobase;
4076 writel(priv(dev)->plx_control_bits, plx_control_addr); 4084 devpriv->dio_counter_phys_iobase =
4077 udelay(i2c_high_udelay); 4085 pci_resource_start(pcidev, DIO_COUNTER_BADDRINDEX);
4078 } else { /* set data line low */
4079 4086
4080 priv(dev)->plx_control_bits |= data_bit; 4087 /* remap, won't work with 2.0 kernels but who cares */
4081 writel(priv(dev)->plx_control_bits, plx_control_addr); 4088 devpriv->plx9080_iobase =
4082 udelay(i2c_low_udelay); 4089 ioremap(devpriv->plx9080_phys_iobase,
4090 pci_resource_len(pcidev, PLX9080_BADDRINDEX));
4091 devpriv->main_iobase =
4092 ioremap(devpriv->main_phys_iobase,
4093 pci_resource_len(pcidev, MAIN_BADDRINDEX));
4094 devpriv->dio_counter_iobase =
4095 ioremap(devpriv->dio_counter_phys_iobase,
4096 pci_resource_len(pcidev, DIO_COUNTER_BADDRINDEX));
4097
4098 if (!devpriv->plx9080_iobase || !devpriv->main_iobase
4099 || !devpriv->dio_counter_iobase) {
4100 dev_warn(dev->class_dev, "failed to remap io memory\n");
4101 return -ENOMEM;
4083 } 4102 }
4084}
4085 4103
4086/* set i2c clock line high or low */ 4104 DEBUG_PRINT(" plx9080 remapped to 0x%p\n", devpriv->plx9080_iobase);
4087static void i2c_set_scl(struct comedi_device *dev, int state) 4105 DEBUG_PRINT(" main remapped to 0x%p\n", devpriv->main_iobase);
4088{ 4106 DEBUG_PRINT(" diocounter remapped to 0x%p\n",
4089 static const int clock_bit = CTL_USERO; 4107 devpriv->dio_counter_iobase);
4090 void __iomem *plx_control_addr = priv(dev)->plx9080_iobase +
4091 PLX_CONTROL_REG;
4092
4093 if (state) {
4094 /* set clock line high */
4095 priv(dev)->plx_control_bits &= ~clock_bit;
4096 writel(priv(dev)->plx_control_bits, plx_control_addr);
4097 udelay(i2c_high_udelay);
4098 } else { /* set clock line low */
4099
4100 priv(dev)->plx_control_bits |= clock_bit;
4101 writel(priv(dev)->plx_control_bits, plx_control_addr);
4102 udelay(i2c_low_udelay);
4103 }
4104}
4105 4108
4106static void i2c_write_byte(struct comedi_device *dev, uint8_t byte) 4109 /* figure out what local addresses are */
4107{ 4110 local_range = readl(devpriv->plx9080_iobase + PLX_LAS0RNG_REG) &
4108 uint8_t bit; 4111 LRNG_MEM_MASK;
4109 unsigned int num_bits = 8; 4112 local_decode = readl(devpriv->plx9080_iobase + PLX_LAS0MAP_REG) &
4113 local_range & LMAP_MEM_MASK;
4114 devpriv->local0_iobase = ((uint32_t)devpriv->main_phys_iobase &
4115 ~local_range) | local_decode;
4116 local_range = readl(devpriv->plx9080_iobase + PLX_LAS1RNG_REG) &
4117 LRNG_MEM_MASK;
4118 local_decode = readl(devpriv->plx9080_iobase + PLX_LAS1MAP_REG) &
4119 local_range & LMAP_MEM_MASK;
4120 devpriv->local1_iobase = ((uint32_t)devpriv->dio_counter_phys_iobase &
4121 ~local_range) | local_decode;
4122
4123 DEBUG_PRINT(" local 0 io addr 0x%x\n", devpriv->local0_iobase);
4124 DEBUG_PRINT(" local 1 io addr 0x%x\n", devpriv->local1_iobase);
4110 4125
4111 DEBUG_PRINT("writing to i2c byte 0x%x\n", byte); 4126 retval = alloc_and_init_dma_members(dev);
4127 if (retval < 0)
4128 return retval;
4112 4129
4113 for (bit = 1 << (num_bits - 1); bit; bit >>= 1) { 4130 devpriv->hw_revision =
4114 i2c_set_scl(dev, 0); 4131 hw_revision(dev, readw(devpriv->main_iobase + HW_STATUS_REG));
4115 if ((byte & bit)) 4132 dev_dbg(dev->class_dev, "stc hardware revision %i\n",
4116 i2c_set_sda(dev, 1); 4133 devpriv->hw_revision);
4117 else 4134 init_plx9080(dev);
4118 i2c_set_sda(dev, 0); 4135 init_stc_registers(dev);
4119 i2c_set_scl(dev, 1); 4136 /* get irq */
4137 if (request_irq(pcidev->irq, handle_interrupt, IRQF_SHARED,
4138 "cb_pcidas64", dev)) {
4139 dev_dbg(dev->class_dev, "unable to allocate irq %u\n",
4140 pcidev->irq);
4141 return -EINVAL;
4120 } 4142 }
4121} 4143 dev->irq = pcidev->irq;
4122 4144 dev_dbg(dev->class_dev, "irq %u\n", dev->irq);
4123/* we can't really read the lines, so fake it */
4124static int i2c_read_ack(struct comedi_device *dev)
4125{
4126 i2c_set_scl(dev, 0);
4127 i2c_set_sda(dev, 1);
4128 i2c_set_scl(dev, 1);
4129
4130 return 0; /* return fake acknowledge bit */
4131}
4132 4145
4133/* send start bit */ 4146 retval = setup_subdevices(dev);
4134static void i2c_start(struct comedi_device *dev) 4147 if (retval < 0)
4135{ 4148 return retval;
4136 i2c_set_scl(dev, 1);
4137 i2c_set_sda(dev, 1);
4138 i2c_set_sda(dev, 0);
4139}
4140 4149
4141/* send stop bit */ 4150 return 0;
4142static void i2c_stop(struct comedi_device *dev)
4143{
4144 i2c_set_scl(dev, 0);
4145 i2c_set_sda(dev, 0);
4146 i2c_set_scl(dev, 1);
4147 i2c_set_sda(dev, 1);
4148} 4151}
4149 4152
4150static void i2c_write(struct comedi_device *dev, unsigned int address, 4153static void detach(struct comedi_device *dev)
4151 const uint8_t *data, unsigned int length)
4152{ 4154{
4155 const struct pcidas64_board *thisboard = comedi_board(dev);
4156 struct pci_dev *pcidev = comedi_to_pci_dev(dev);
4157 struct pcidas64_private *devpriv = dev->private;
4153 unsigned int i; 4158 unsigned int i;
4154 uint8_t bitstream;
4155 static const int read_bit = 0x1;
4156
4157/* XXX need mutex to prevent simultaneous attempts to access eeprom and i2c bus */
4158 4159
4159 /* make sure we dont send anything to eeprom */ 4160 if (dev->irq)
4160 priv(dev)->plx_control_bits &= ~CTL_EE_CS; 4161 free_irq(dev->irq, dev);
4161 4162 if (devpriv) {
4162 i2c_stop(dev); 4163 if (pcidev) {
4163 i2c_start(dev); 4164 if (devpriv->plx9080_iobase) {
4164 4165 disable_plx_interrupts(dev);
4165 /* send address and write bit */ 4166 iounmap(devpriv->plx9080_iobase);
4166 bitstream = (address << 1) & ~read_bit; 4167 }
4167 i2c_write_byte(dev, bitstream); 4168 if (devpriv->main_iobase)
4168 4169 iounmap(devpriv->main_iobase);
4169 /* get acknowledge */ 4170 if (devpriv->dio_counter_iobase)
4170 if (i2c_read_ack(dev) != 0) { 4171 iounmap(devpriv->dio_counter_iobase);
4171 comedi_error(dev, "i2c write failed: no acknowledge"); 4172 /* free pci dma buffers */
4172 i2c_stop(dev); 4173 for (i = 0; i < ai_dma_ring_count(thisboard); i++) {
4173 return; 4174 if (devpriv->ai_buffer[i])
4174 } 4175 pci_free_consistent(pcidev,
4175 /* write data bytes */ 4176 DMA_BUFFER_SIZE,
4176 for (i = 0; i < length; i++) { 4177 devpriv->ai_buffer[i],
4177 i2c_write_byte(dev, data[i]); 4178 devpriv->ai_buffer_bus_addr[i]);
4178 if (i2c_read_ack(dev) != 0) { 4179 }
4179 comedi_error(dev, "i2c write failed: no acknowledge"); 4180 for (i = 0; i < AO_DMA_RING_COUNT; i++) {
4180 i2c_stop(dev); 4181 if (devpriv->ao_buffer[i])
4181 return; 4182 pci_free_consistent(pcidev,
4183 DMA_BUFFER_SIZE,
4184 devpriv->ao_buffer[i],
4185 devpriv->ao_buffer_bus_addr[i]);
4186 }
4187 /* free dma descriptors */
4188 if (devpriv->ai_dma_desc)
4189 pci_free_consistent(pcidev,
4190 sizeof(struct plx_dma_desc) *
4191 ai_dma_ring_count(thisboard),
4192 devpriv->ai_dma_desc,
4193 devpriv->ai_dma_desc_bus_addr);
4194 if (devpriv->ao_dma_desc)
4195 pci_free_consistent(pcidev,
4196 sizeof(struct plx_dma_desc) *
4197 AO_DMA_RING_COUNT,
4198 devpriv->ao_dma_desc,
4199 devpriv->ao_dma_desc_bus_addr);
4182 } 4200 }
4183 } 4201 }
4184 i2c_stop(dev); 4202 if (dev->subdevices)
4203 subdev_8255_cleanup(dev, &dev->subdevices[4]);
4204 if (pcidev) {
4205 if (dev->iobase)
4206 comedi_pci_disable(pcidev);
4207 }
4185} 4208}
4186 4209
4187static struct comedi_driver cb_pcidas64_driver = { 4210static struct comedi_driver cb_pcidas64_driver = {
4188 .driver_name = "cb_pcidas64", 4211 .driver_name = "cb_pcidas64",
4189 .module = THIS_MODULE, 4212 .module = THIS_MODULE,
4190 .attach = attach, 4213 .auto_attach = auto_attach,
4191 .detach = detach, 4214 .detach = detach,
4192}; 4215};
4193 4216
4194static int __devinit cb_pcidas64_pci_probe(struct pci_dev *dev, 4217static int cb_pcidas64_pci_probe(struct pci_dev *dev,
4195 const struct pci_device_id *ent) 4218 const struct pci_device_id *ent)
4196{ 4219{
4197 return comedi_pci_auto_config(dev, &cb_pcidas64_driver); 4220 return comedi_pci_auto_config(dev, &cb_pcidas64_driver);
4198} 4221}
4199 4222
4200static void __devexit cb_pcidas64_pci_remove(struct pci_dev *dev) 4223static void cb_pcidas64_pci_remove(struct pci_dev *dev)
4201{ 4224{
4202 comedi_pci_auto_unconfig(dev); 4225 comedi_pci_auto_unconfig(dev);
4203} 4226}
4204 4227
4205static DEFINE_PCI_DEVICE_TABLE(cb_pcidas64_pci_table) = { 4228static DEFINE_PCI_DEVICE_TABLE(cb_pcidas64_pci_table) = {
4206 { PCI_DEVICE(PCI_VENDOR_ID_COMPUTERBOARDS, 0x001d) }, 4229 { PCI_DEVICE(PCI_VENDOR_ID_CB, 0x001d) },
4207 { PCI_DEVICE(PCI_VENDOR_ID_COMPUTERBOARDS, 0x001e) }, 4230 { PCI_DEVICE(PCI_VENDOR_ID_CB, 0x001e) },
4208 { PCI_DEVICE(PCI_VENDOR_ID_COMPUTERBOARDS, 0x0035) }, 4231 { PCI_DEVICE(PCI_VENDOR_ID_CB, 0x0035) },
4209 { PCI_DEVICE(PCI_VENDOR_ID_COMPUTERBOARDS, 0x0036) }, 4232 { PCI_DEVICE(PCI_VENDOR_ID_CB, 0x0036) },
4210 { PCI_DEVICE(PCI_VENDOR_ID_COMPUTERBOARDS, 0x0037) }, 4233 { PCI_DEVICE(PCI_VENDOR_ID_CB, 0x0037) },
4211 { PCI_DEVICE(PCI_VENDOR_ID_COMPUTERBOARDS, 0x0052) }, 4234 { PCI_DEVICE(PCI_VENDOR_ID_CB, 0x0052) },
4212 { PCI_DEVICE(PCI_VENDOR_ID_COMPUTERBOARDS, 0x005d) }, 4235 { PCI_DEVICE(PCI_VENDOR_ID_CB, 0x005d) },
4213 { PCI_DEVICE(PCI_VENDOR_ID_COMPUTERBOARDS, 0x005e) }, 4236 { PCI_DEVICE(PCI_VENDOR_ID_CB, 0x005e) },
4214 { PCI_DEVICE(PCI_VENDOR_ID_COMPUTERBOARDS, 0x005f) }, 4237 { PCI_DEVICE(PCI_VENDOR_ID_CB, 0x005f) },
4215 { PCI_DEVICE(PCI_VENDOR_ID_COMPUTERBOARDS, 0x0061) }, 4238 { PCI_DEVICE(PCI_VENDOR_ID_CB, 0x0061) },
4216 { PCI_DEVICE(PCI_VENDOR_ID_COMPUTERBOARDS, 0x0062) }, 4239 { PCI_DEVICE(PCI_VENDOR_ID_CB, 0x0062) },
4217 { PCI_DEVICE(PCI_VENDOR_ID_COMPUTERBOARDS, 0x0063) }, 4240 { PCI_DEVICE(PCI_VENDOR_ID_CB, 0x0063) },
4218 { PCI_DEVICE(PCI_VENDOR_ID_COMPUTERBOARDS, 0x0064) }, 4241 { PCI_DEVICE(PCI_VENDOR_ID_CB, 0x0064) },
4219 { PCI_DEVICE(PCI_VENDOR_ID_COMPUTERBOARDS, 0x0066) }, 4242 { PCI_DEVICE(PCI_VENDOR_ID_CB, 0x0066) },
4220 { PCI_DEVICE(PCI_VENDOR_ID_COMPUTERBOARDS, 0x0067) }, 4243 { PCI_DEVICE(PCI_VENDOR_ID_CB, 0x0067) },
4221 { PCI_DEVICE(PCI_VENDOR_ID_COMPUTERBOARDS, 0x0068) }, 4244 { PCI_DEVICE(PCI_VENDOR_ID_CB, 0x0068) },
4222 { PCI_DEVICE(PCI_VENDOR_ID_COMPUTERBOARDS, 0x006f) }, 4245 { PCI_DEVICE(PCI_VENDOR_ID_CB, 0x006f) },
4223 { PCI_DEVICE(PCI_VENDOR_ID_COMPUTERBOARDS, 0x0078) }, 4246 { PCI_DEVICE(PCI_VENDOR_ID_CB, 0x0078) },
4224 { PCI_DEVICE(PCI_VENDOR_ID_COMPUTERBOARDS, 0x0079) }, 4247 { PCI_DEVICE(PCI_VENDOR_ID_CB, 0x0079) },
4225 { 0 } 4248 { 0 }
4226}; 4249};
4227MODULE_DEVICE_TABLE(pci, cb_pcidas64_pci_table); 4250MODULE_DEVICE_TABLE(pci, cb_pcidas64_pci_table);
@@ -4230,7 +4253,7 @@ static struct pci_driver cb_pcidas64_pci_driver = {
4230 .name = "cb_pcidas64", 4253 .name = "cb_pcidas64",
4231 .id_table = cb_pcidas64_pci_table, 4254 .id_table = cb_pcidas64_pci_table,
4232 .probe = cb_pcidas64_pci_probe, 4255 .probe = cb_pcidas64_pci_probe,
4233 .remove = __devexit_p(cb_pcidas64_pci_remove), 4256 .remove = cb_pcidas64_pci_remove,
4234}; 4257};
4235module_comedi_pci_driver(cb_pcidas64_driver, cb_pcidas64_pci_driver); 4258module_comedi_pci_driver(cb_pcidas64_driver, cb_pcidas64_pci_driver);
4236 4259
diff --git a/drivers/staging/comedi/drivers/cb_pcidda.c b/drivers/staging/comedi/drivers/cb_pcidda.c
index aef946df27e2..7c6029a8c3e1 100644
--- a/drivers/staging/comedi/drivers/cb_pcidda.c
+++ b/drivers/staging/comedi/drivers/cb_pcidda.c
@@ -1,90 +1,78 @@
1/* 1/*
2 comedi/drivers/cb_pcidda.c 2 * comedi/drivers/cb_pcidda.c
3 This intends to be a driver for the ComputerBoards / MeasurementComputing 3 * Driver for the ComputerBoards / MeasurementComputing PCI-DDA series.
4 PCI-DDA series. 4 *
5 5 * Copyright (C) 2001 Ivan Martinez <ivanmr@altavista.com>
6 Copyright (C) 2001 Ivan Martinez <ivanmr@altavista.com> 6 * Copyright (C) 2001 Frank Mori Hess <fmhess@users.sourceforge.net>
7 Copyright (C) 2001 Frank Mori Hess <fmhess@users.sourceforge.net> 7 *
8 8 * COMEDI - Linux Control and Measurement Device Interface
9 COMEDI - Linux Control and Measurement Device Interface 9 * Copyright (C) 1997-8 David A. Schleef <ds@schleef.org>
10 Copyright (C) 1997-8 David A. Schleef <ds@schleef.org> 10 *
11 11 * This program is free software; you can redistribute it and/or modify
12 This program is free software; you can redistribute it and/or modify 12 * it under the terms of the GNU General Public License as published by
13 it under the terms of the GNU General Public License as published by 13 * the Free Software Foundation; either version 2 of the License, or
14 the Free Software Foundation; either version 2 of the License, or 14 * (at your option) any later version.
15 (at your option) any later version. 15 *
16 16 * This program is distributed in the hope that it will be useful,
17 This program is distributed in the hope that it will be useful, 17 * but WITHOUT ANY WARRANTY; without even the implied warranty of
18 but WITHOUT ANY WARRANTY; without even the implied warranty of 18 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
19 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 19 * GNU General Public License for more details.
20 GNU General Public License for more details. 20 *
21 21 * You should have received a copy of the GNU General Public License
22 You should have received a copy of the GNU General Public License 22 * along with this program; if not, write to the Free Software
23 along with this program; if not, write to the Free Software 23 * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
24 Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. 24 */
25 25
26*/
27/* 26/*
28Driver: cb_pcidda 27 * Driver: cb_pcidda
29Description: MeasurementComputing PCI-DDA series 28 * Description: MeasurementComputing PCI-DDA series
30Author: Ivan Martinez <ivanmr@altavista.com>, Frank Mori Hess <fmhess@users.sourceforge.net> 29 * Devices: (Measurement Computing) PCI-DDA08/12 [pci-dda08/12]
31Status: Supports 08/16, 04/16, 02/16, 08/12, 04/12, and 02/12 30 * (Measurement Computing) PCI-DDA04/12 [pci-dda04/12]
32Devices: [Measurement Computing] PCI-DDA08/12 (cb_pcidda), PCI-DDA04/12, 31 * (Measurement Computing) PCI-DDA02/12 [pci-dda02/12]
33 PCI-DDA02/12, PCI-DDA08/16, PCI-DDA04/16, PCI-DDA02/16 32 * (Measurement Computing) PCI-DDA08/16 [pci-dda08/16]
34 33 * (Measurement Computing) PCI-DDA04/16 [pci-dda04/16]
35Configuration options: 34 * (Measurement Computing) PCI-DDA02/16 [pci-dda02/16]
36 [0] - PCI bus of device (optional) 35 * Author: Ivan Martinez <ivanmr@altavista.com>
37 [1] - PCI slot of device (optional) 36 * Frank Mori Hess <fmhess@users.sourceforge.net>
38 If bus/slot is not specified, the first available PCI 37 * Status: works
39 device will be used. 38 *
40 39 * Configuration options: not applicable, uses PCI auto config
41Only simple analog output writing is supported. 40 *
42 41 * Only simple analog output writing is supported.
43So far it has only been tested with: 42 */
44 - PCI-DDA08/12
45Please report success/failure with other different cards to
46<comedi@comedi.org>.
47*/
48 43
49#include "../comedidev.h" 44#include "../comedidev.h"
50 45
51#include "comedi_fc.h" 46#include "comedi_fc.h"
52#include "8255.h" 47#include "8255.h"
53 48
54/* PCI vendor number of ComputerBoards */ 49/*
55#define PCI_VENDOR_ID_CB 0x1307 50 * ComputerBoards PCI Device ID's supported by this driver
51 */
52#define PCI_DEVICE_ID_DDA02_12 0x0020
53#define PCI_DEVICE_ID_DDA04_12 0x0021
54#define PCI_DEVICE_ID_DDA08_12 0x0022
55#define PCI_DEVICE_ID_DDA02_16 0x0023
56#define PCI_DEVICE_ID_DDA04_16 0x0024
57#define PCI_DEVICE_ID_DDA08_16 0x0025
58
56#define EEPROM_SIZE 128 /* number of entries in eeprom */ 59#define EEPROM_SIZE 128 /* number of entries in eeprom */
57/* maximum number of ao channels for supported boards */ 60/* maximum number of ao channels for supported boards */
58#define MAX_AO_CHANNELS 8 61#define MAX_AO_CHANNELS 8
59 62
60/* Digital I/O registers */ 63/* Digital I/O registers */
61#define PORT1A 0 /* PORT 1A DATA */ 64#define CB_DDA_DIO0_8255_BASE 0x00
62 65#define CB_DDA_DIO1_8255_BASE 0x04
63#define PORT1B 1 /* PORT 1B DATA */
64
65#define PORT1C 2 /* PORT 1C DATA */
66
67#define CONTROL1 3 /* CONTROL REGISTER 1 */
68
69#define PORT2A 4 /* PORT 2A DATA */
70
71#define PORT2B 5 /* PORT 2B DATA */
72
73#define PORT2C 6 /* PORT 2C DATA */
74
75#define CONTROL2 7 /* CONTROL REGISTER 2 */
76 66
77/* DAC registers */ 67/* DAC registers */
78#define DACONTROL 0 /* D/A CONTROL REGISTER */ 68#define CB_DDA_DA_CTRL_REG 0x00 /* D/A Control Register */
79#define SU 0000001 /* Simultaneous update enabled */ 69#define CB_DDA_DA_CTRL_SU (1 << 0) /* Simultaneous update */
80#define NOSU 0000000 /* Simultaneous update disabled */ 70#define CB_DDA_DA_CTRL_EN (1 << 1) /* Enable specified DAC */
81#define ENABLEDAC 0000002 /* Enable specified DAC */ 71#define CB_DDA_DA_CTRL_DAC(x) ((x) << 2) /* Specify DAC channel */
82#define DISABLEDAC 0000000 /* Disable specified DAC */ 72#define CB_DDA_DA_CTRL_RANGE2V5 (0 << 6) /* 2.5V range */
83#define RANGE2V5 0000000 /* 2.5V */ 73#define CB_DDA_DA_CTRL_RANGE5V (2 << 6) /* 5V range */
84#define RANGE5V 0000200 /* 5V */ 74#define CB_DDA_DA_CTRL_RANGE10V (3 << 6) /* 10V range */
85#define RANGE10V 0000300 /* 10V */ 75#define CB_DDA_DA_CTRL_UNIP (1 << 8) /* Unipolar range */
86#define UNIP 0000400 /* Unipolar outputs */
87#define BIP 0000000 /* Bipolar outputs */
88 76
89#define DACALIBRATION1 4 /* D/A CALIBRATION REGISTER 1 */ 77#define DACALIBRATION1 4 /* D/A CALIBRATION REGISTER 1 */
90/* write bits */ 78/* write bits */
@@ -109,107 +97,67 @@ Please report success/failure with other different cards to
109/* manual says to set this bit with no explanation */ 97/* manual says to set this bit with no explanation */
110#define DUMMY_BIT 0x40 98#define DUMMY_BIT 0x40
111 99
112#define DADATA 8 /* FIRST D/A DATA REGISTER (0) */ 100#define CB_DDA_DA_DATA_REG(x) (0x08 + ((x) * 2))
101
102/* Offsets for the caldac channels */
103#define CB_DDA_CALDAC_FINE_GAIN 0
104#define CB_DDA_CALDAC_COURSE_GAIN 1
105#define CB_DDA_CALDAC_COURSE_OFFSET 2
106#define CB_DDA_CALDAC_FINE_OFFSET 3
113 107
114static const struct comedi_lrange cb_pcidda_ranges = { 108static const struct comedi_lrange cb_pcidda_ranges = {
115 6, 109 6, {
116 { 110 BIP_RANGE(10),
117 BIP_RANGE(10), 111 BIP_RANGE(5),
118 BIP_RANGE(5), 112 BIP_RANGE(2.5),
119 BIP_RANGE(2.5), 113 UNI_RANGE(10),
120 UNI_RANGE(10), 114 UNI_RANGE(5),
121 UNI_RANGE(5), 115 UNI_RANGE(2.5)
122 UNI_RANGE(2.5), 116 }
123 }
124}; 117};
125 118
126/*
127 * Board descriptions for two imaginary boards. Describing the
128 * boards in this way is optional, and completely driver-dependent.
129 * Some drivers use arrays such as this, other do not.
130 */
131struct cb_pcidda_board { 119struct cb_pcidda_board {
132 const char *name; 120 const char *name;
133 char status; /* Driver status: */
134
135 /*
136 * 0 - tested
137 * 1 - manual read, not tested
138 * 2 - manual not read
139 */
140
141 unsigned short device_id; 121 unsigned short device_id;
142 int ao_chans; 122 int ao_chans;
143 int ao_bits; 123 int ao_bits;
144 const struct comedi_lrange *ranges;
145}; 124};
146 125
147static const struct cb_pcidda_board cb_pcidda_boards[] = { 126static const struct cb_pcidda_board cb_pcidda_boards[] = {
148 { 127 {
149 .name = "pci-dda02/12", 128 .name = "pci-dda02/12",
150 .status = 1, 129 .device_id = PCI_DEVICE_ID_DDA02_12,
151 .device_id = 0x20, 130 .ao_chans = 2,
152 .ao_chans = 2, 131 .ao_bits = 12,
153 .ao_bits = 12, 132 }, {
154 .ranges = &cb_pcidda_ranges, 133 .name = "pci-dda04/12",
155 }, 134 .device_id = PCI_DEVICE_ID_DDA04_12,
156 { 135 .ao_chans = 4,
157 .name = "pci-dda04/12", 136 .ao_bits = 12,
158 .status = 1, 137 }, {
159 .device_id = 0x21, 138 .name = "pci-dda08/12",
160 .ao_chans = 4, 139 .device_id = PCI_DEVICE_ID_DDA08_12,
161 .ao_bits = 12, 140 .ao_chans = 8,
162 .ranges = &cb_pcidda_ranges, 141 .ao_bits = 12,
163 }, 142 }, {
164 { 143 .name = "pci-dda02/16",
165 .name = "pci-dda08/12", 144 .device_id = PCI_DEVICE_ID_DDA02_16,
166 .status = 0, 145 .ao_chans = 2,
167 .device_id = 0x22, 146 .ao_bits = 16,
168 .ao_chans = 8, 147 }, {
169 .ao_bits = 12, 148 .name = "pci-dda04/16",
170 .ranges = &cb_pcidda_ranges, 149 .device_id = PCI_DEVICE_ID_DDA04_16,
171 }, 150 .ao_chans = 4,
172 { 151 .ao_bits = 16,
173 .name = "pci-dda02/16", 152 }, {
174 .status = 2, 153 .name = "pci-dda08/16",
175 .device_id = 0x23, 154 .device_id = PCI_DEVICE_ID_DDA08_16,
176 .ao_chans = 2, 155 .ao_chans = 8,
177 .ao_bits = 16, 156 .ao_bits = 16,
178 .ranges = &cb_pcidda_ranges, 157 },
179 },
180 {
181 .name = "pci-dda04/16",
182 .status = 2,
183 .device_id = 0x24,
184 .ao_chans = 4,
185 .ao_bits = 16,
186 .ranges = &cb_pcidda_ranges,
187 },
188 {
189 .name = "pci-dda08/16",
190 .status = 0,
191 .device_id = 0x25,
192 .ao_chans = 8,
193 .ao_bits = 16,
194 .ranges = &cb_pcidda_ranges,
195 },
196}; 158};
197 159
198/*
199 * this structure is for data unique to this hardware driver. If
200 * several hardware drivers keep similar information in this structure,
201 * feel free to suggest moving the variable to the struct comedi_device
202 * struct.
203 */
204struct cb_pcidda_private { 160struct cb_pcidda_private {
205 int data;
206
207 unsigned long digitalio;
208 unsigned long dac;
209
210 /* unsigned long control_status; */
211 /* unsigned long adc_fifo; */
212
213 /* bits last written to da calibration register 1 */ 161 /* bits last written to da calibration register 1 */
214 unsigned int dac_cal1_bits; 162 unsigned int dac_cal1_bits;
215 /* current range settings for output channels */ 163 /* current range settings for output channels */
@@ -217,181 +165,16 @@ struct cb_pcidda_private {
217 u16 eeprom_data[EEPROM_SIZE]; /* software copy of board's eeprom */ 165 u16 eeprom_data[EEPROM_SIZE]; /* software copy of board's eeprom */
218}; 166};
219 167
220/*
221 * I will program this later... ;-)
222 */
223#if 0
224static int cb_pcidda_ai_cmd(struct comedi_device *dev,
225 struct comedi_subdevice *s)
226{
227 printk("cb_pcidda_ai_cmd\n");
228 printk("subdev: %d\n", cmd->subdev);
229 printk("flags: %d\n", cmd->flags);
230 printk("start_src: %d\n", cmd->start_src);
231 printk("start_arg: %d\n", cmd->start_arg);
232 printk("scan_begin_src: %d\n", cmd->scan_begin_src);
233 printk("convert_src: %d\n", cmd->convert_src);
234 printk("convert_arg: %d\n", cmd->convert_arg);
235 printk("scan_end_src: %d\n", cmd->scan_end_src);
236 printk("scan_end_arg: %d\n", cmd->scan_end_arg);
237 printk("stop_src: %d\n", cmd->stop_src);
238 printk("stop_arg: %d\n", cmd->stop_arg);
239 printk("chanlist_len: %d\n", cmd->chanlist_len);
240}
241#endif
242
243#if 0
244static int cb_pcidda_ai_cmdtest(struct comedi_device *dev,
245 struct comedi_subdevice *s,
246 struct comedi_cmd *cmd)
247{
248 int err = 0;
249 int tmp;
250
251 /* Step 1 : check if triggers are trivially valid */
252
253 err |= cfc_check_trigger_src(&cmd->start_src, TRIG_NOW);
254 err |= cfc_check_trigger_src(&cmd->scan_begin_src,
255 TRIG_TIMER | TRIG_EXT);
256 err |= cfc_check_trigger_src(&cmd->convert_src,
257 TRIG_TIMER | TRIG_EXT);
258 err |= cfc_check_trigger_src(&cmd->scan_end_src, TRIG_COUNT);
259 err |= cfc_check_trigger_src(&cmd->stop_src, TRIG_COUNT | TRIG_NONE);
260
261 if (err)
262 return 1;
263
264 /* Step 2a : make sure trigger sources are unique */
265
266 err |= cfc_check_trigger_is_unique(cmd->scan_begin_src);
267 err |= cfc_check_trigger_is_unique(cmd->convert_src);
268 err |= cfc_check_trigger_is_unique(cmd->stop_src);
269
270 /* Step 2b : and mutually compatible */
271
272 if (err)
273 return 2;
274
275 /* step 3: make sure arguments are trivially compatible */
276
277 if (cmd->start_arg != 0) {
278 cmd->start_arg = 0;
279 err++;
280 }
281#define MAX_SPEED 10000 /* in nanoseconds */
282#define MIN_SPEED 1000000000 /* in nanoseconds */
283
284 if (cmd->scan_begin_src == TRIG_TIMER) {
285 if (cmd->scan_begin_arg < MAX_SPEED) {
286 cmd->scan_begin_arg = MAX_SPEED;
287 err++;
288 }
289 if (cmd->scan_begin_arg > MIN_SPEED) {
290 cmd->scan_begin_arg = MIN_SPEED;
291 err++;
292 }
293 } else {
294 /* external trigger */
295 /* should be level/edge, hi/lo specification here */
296 /* should specify multiple external triggers */
297 if (cmd->scan_begin_arg > 9) {
298 cmd->scan_begin_arg = 9;
299 err++;
300 }
301 }
302 if (cmd->convert_src == TRIG_TIMER) {
303 if (cmd->convert_arg < MAX_SPEED) {
304 cmd->convert_arg = MAX_SPEED;
305 err++;
306 }
307 if (cmd->convert_arg > MIN_SPEED) {
308 cmd->convert_arg = MIN_SPEED;
309 err++;
310 }
311 } else {
312 /* external trigger */
313 /* see above */
314 if (cmd->convert_arg > 9) {
315 cmd->convert_arg = 9;
316 err++;
317 }
318 }
319
320 if (cmd->scan_end_arg != cmd->chanlist_len) {
321 cmd->scan_end_arg = cmd->chanlist_len;
322 err++;
323 }
324 if (cmd->stop_src == TRIG_COUNT) {
325 if (cmd->stop_arg > 0x00ffffff) {
326 cmd->stop_arg = 0x00ffffff;
327 err++;
328 }
329 } else {
330 /* TRIG_NONE */
331 if (cmd->stop_arg != 0) {
332 cmd->stop_arg = 0;
333 err++;
334 }
335 }
336
337 if (err)
338 return 3;
339
340 /* step 4: fix up any arguments */
341
342 if (cmd->scan_begin_src == TRIG_TIMER) {
343 tmp = cmd->scan_begin_arg;
344 cb_pcidda_ns_to_timer(&cmd->scan_begin_arg,
345 cmd->flags & TRIG_ROUND_MASK);
346 if (tmp != cmd->scan_begin_arg)
347 err++;
348 }
349 if (cmd->convert_src == TRIG_TIMER) {
350 tmp = cmd->convert_arg;
351 cb_pcidda_ns_to_timer(&cmd->convert_arg,
352 cmd->flags & TRIG_ROUND_MASK);
353 if (tmp != cmd->convert_arg)
354 err++;
355 if (cmd->scan_begin_src == TRIG_TIMER &&
356 cmd->scan_begin_arg <
357 cmd->convert_arg * cmd->scan_end_arg) {
358 cmd->scan_begin_arg =
359 cmd->convert_arg * cmd->scan_end_arg;
360 err++;
361 }
362 }
363
364 if (err)
365 return 4;
366
367 return 0;
368}
369#endif
370
371/* This function doesn't require a particular form, this is just
372 * what happens to be used in some of the drivers. It should
373 * convert ns nanoseconds to a counter value suitable for programming
374 * the device. Also, it should adjust ns so that it cooresponds to
375 * the actual time that the device will use. */
376#if 0
377static int cb_pcidda_ns_to_timer(unsigned int *ns, int round)
378{
379 /* trivial timer */
380 return *ns;
381}
382#endif
383
384/* lowlevel read from eeprom */ 168/* lowlevel read from eeprom */
385static unsigned int cb_pcidda_serial_in(struct comedi_device *dev) 169static unsigned int cb_pcidda_serial_in(struct comedi_device *dev)
386{ 170{
387 struct cb_pcidda_private *devpriv = dev->private;
388 unsigned int value = 0; 171 unsigned int value = 0;
389 int i; 172 int i;
390 const int value_width = 16; /* number of bits wide values are */ 173 const int value_width = 16; /* number of bits wide values are */
391 174
392 for (i = 1; i <= value_width; i++) { 175 for (i = 1; i <= value_width; i++) {
393 /* read bits most significant bit first */ 176 /* read bits most significant bit first */
394 if (inw_p(devpriv->dac + DACALIBRATION1) & SERIAL_OUT_BIT) 177 if (inw_p(dev->iobase + DACALIBRATION1) & SERIAL_OUT_BIT)
395 value |= 1 << (value_width - i); 178 value |= 1 << (value_width - i);
396 } 179 }
397 180
@@ -411,7 +194,7 @@ static void cb_pcidda_serial_out(struct comedi_device *dev, unsigned int value,
411 devpriv->dac_cal1_bits |= SERIAL_IN_BIT; 194 devpriv->dac_cal1_bits |= SERIAL_IN_BIT;
412 else 195 else
413 devpriv->dac_cal1_bits &= ~SERIAL_IN_BIT; 196 devpriv->dac_cal1_bits &= ~SERIAL_IN_BIT;
414 outw_p(devpriv->dac_cal1_bits, devpriv->dac + DACALIBRATION1); 197 outw_p(devpriv->dac_cal1_bits, dev->iobase + DACALIBRATION1);
415 } 198 }
416} 199}
417 200
@@ -419,7 +202,6 @@ static void cb_pcidda_serial_out(struct comedi_device *dev, unsigned int value,
419static unsigned int cb_pcidda_read_eeprom(struct comedi_device *dev, 202static unsigned int cb_pcidda_read_eeprom(struct comedi_device *dev,
420 unsigned int address) 203 unsigned int address)
421{ 204{
422 struct cb_pcidda_private *devpriv = dev->private;
423 unsigned int i; 205 unsigned int i;
424 unsigned int cal2_bits; 206 unsigned int cal2_bits;
425 unsigned int value; 207 unsigned int value;
@@ -435,7 +217,7 @@ static unsigned int cb_pcidda_read_eeprom(struct comedi_device *dev,
435 /* deactivate caldacs (one caldac for every two channels) */ 217 /* deactivate caldacs (one caldac for every two channels) */
436 for (i = 0; i < max_num_caldacs; i++) 218 for (i = 0; i < max_num_caldacs; i++)
437 cal2_bits |= DESELECT_CALDAC_BIT(i); 219 cal2_bits |= DESELECT_CALDAC_BIT(i);
438 outw_p(cal2_bits, devpriv->dac + DACALIBRATION2); 220 outw_p(cal2_bits, dev->iobase + DACALIBRATION2);
439 221
440 /* tell eeprom we want to read */ 222 /* tell eeprom we want to read */
441 cb_pcidda_serial_out(dev, read_instruction, instruction_length); 223 cb_pcidda_serial_out(dev, read_instruction, instruction_length);
@@ -446,7 +228,7 @@ static unsigned int cb_pcidda_read_eeprom(struct comedi_device *dev,
446 228
447 /* deactivate eeprom */ 229 /* deactivate eeprom */
448 cal2_bits &= ~SELECT_EEPROM_BIT; 230 cal2_bits &= ~SELECT_EEPROM_BIT;
449 outw_p(cal2_bits, devpriv->dac + DACALIBRATION2); 231 outw_p(cal2_bits, dev->iobase + DACALIBRATION2);
450 232
451 return value; 233 return value;
452} 234}
@@ -456,7 +238,6 @@ static void cb_pcidda_write_caldac(struct comedi_device *dev,
456 unsigned int caldac, unsigned int channel, 238 unsigned int caldac, unsigned int channel,
457 unsigned int value) 239 unsigned int value)
458{ 240{
459 struct cb_pcidda_private *devpriv = dev->private;
460 unsigned int cal2_bits; 241 unsigned int cal2_bits;
461 unsigned int i; 242 unsigned int i;
462 /* caldacs use 3 bit channel specification */ 243 /* caldacs use 3 bit channel specification */
@@ -479,72 +260,10 @@ static void cb_pcidda_write_caldac(struct comedi_device *dev,
479 cal2_bits |= DESELECT_CALDAC_BIT(i); 260 cal2_bits |= DESELECT_CALDAC_BIT(i);
480 /* activate the caldac we want */ 261 /* activate the caldac we want */
481 cal2_bits &= ~DESELECT_CALDAC_BIT(caldac); 262 cal2_bits &= ~DESELECT_CALDAC_BIT(caldac);
482 outw_p(cal2_bits, devpriv->dac + DACALIBRATION2); 263 outw_p(cal2_bits, dev->iobase + DACALIBRATION2);
483 /* deactivate caldac */ 264 /* deactivate caldac */
484 cal2_bits |= DESELECT_CALDAC_BIT(caldac); 265 cal2_bits |= DESELECT_CALDAC_BIT(caldac);
485 outw_p(cal2_bits, devpriv->dac + DACALIBRATION2); 266 outw_p(cal2_bits, dev->iobase + DACALIBRATION2);
486}
487
488/* returns caldac that calibrates given analog out channel */
489static unsigned int caldac_number(unsigned int channel)
490{
491 return channel / 2;
492}
493
494/* returns caldac channel that provides fine gain for given ao channel */
495static unsigned int fine_gain_channel(unsigned int ao_channel)
496{
497 return 4 * (ao_channel % 2);
498}
499
500/* returns caldac channel that provides coarse gain for given ao channel */
501static unsigned int coarse_gain_channel(unsigned int ao_channel)
502{
503 return 1 + 4 * (ao_channel % 2);
504}
505
506/* returns caldac channel that provides coarse offset for given ao channel */
507static unsigned int coarse_offset_channel(unsigned int ao_channel)
508{
509 return 2 + 4 * (ao_channel % 2);
510}
511
512/* returns caldac channel that provides fine offset for given ao channel */
513static unsigned int fine_offset_channel(unsigned int ao_channel)
514{
515 return 3 + 4 * (ao_channel % 2);
516}
517
518/* returns eeprom address that provides offset for given ao channel and range */
519static unsigned int offset_eeprom_address(unsigned int ao_channel,
520 unsigned int range)
521{
522 return 0x7 + 2 * range + 12 * ao_channel;
523}
524
525/*
526 * returns eeprom address that provides gain calibration for given ao
527 * channel and range
528 */
529static unsigned int gain_eeprom_address(unsigned int ao_channel,
530 unsigned int range)
531{
532 return 0x8 + 2 * range + 12 * ao_channel;
533}
534
535/*
536 * returns upper byte of eeprom entry, which gives the coarse adjustment
537 * values
538 */
539static unsigned int eeprom_coarse_byte(unsigned int word)
540{
541 return (word >> 8) & 0xff;
542}
543
544/* returns lower byte of eeprom entry, which gives the fine adjustment values */
545static unsigned int eeprom_fine_byte(unsigned int word)
546{
547 return word & 0xff;
548} 267}
549 268
550/* set caldacs to eeprom values for given channel and range */ 269/* set caldacs to eeprom values for given channel and range */
@@ -552,85 +271,68 @@ static void cb_pcidda_calibrate(struct comedi_device *dev, unsigned int channel,
552 unsigned int range) 271 unsigned int range)
553{ 272{
554 struct cb_pcidda_private *devpriv = dev->private; 273 struct cb_pcidda_private *devpriv = dev->private;
555 unsigned int coarse_offset, fine_offset, coarse_gain, fine_gain; 274 unsigned int caldac = channel / 2; /* two caldacs per channel */
275 unsigned int chan = 4 * (channel % 2); /* caldac channel base */
276 unsigned int index = 2 * range + 12 * channel;
277 unsigned int offset;
278 unsigned int gain;
556 279
557 /* remember range so we can tell when we need to readjust calibration */ 280 /* save range so we can tell when we need to readjust calibration */
558 devpriv->ao_range[channel] = range; 281 devpriv->ao_range[channel] = range;
559 282
560 /* get values from eeprom data */ 283 /* get values from eeprom data */
561 coarse_offset = 284 offset = devpriv->eeprom_data[0x7 + index];
562 eeprom_coarse_byte(devpriv->eeprom_data 285 gain = devpriv->eeprom_data[0x8 + index];
563 [offset_eeprom_address(channel, range)]); 286
564 fine_offset = 287 /* set caldacs */
565 eeprom_fine_byte(devpriv->eeprom_data 288 cb_pcidda_write_caldac(dev, caldac, chan + CB_DDA_CALDAC_COURSE_OFFSET,
566 [offset_eeprom_address(channel, range)]); 289 (offset >> 8) & 0xff);
567 coarse_gain = 290 cb_pcidda_write_caldac(dev, caldac, chan + CB_DDA_CALDAC_FINE_OFFSET,
568 eeprom_coarse_byte(devpriv->eeprom_data 291 offset & 0xff);
569 [gain_eeprom_address(channel, range)]); 292 cb_pcidda_write_caldac(dev, caldac, chan + CB_DDA_CALDAC_COURSE_GAIN,
570 fine_gain = 293 (gain >> 8) & 0xff);
571 eeprom_fine_byte(devpriv->eeprom_data 294 cb_pcidda_write_caldac(dev, caldac, chan + CB_DDA_CALDAC_FINE_GAIN,
572 [gain_eeprom_address(channel, range)]); 295 gain & 0xff);
573
574 /* set caldacs */
575 cb_pcidda_write_caldac(dev, caldac_number(channel),
576 coarse_offset_channel(channel), coarse_offset);
577 cb_pcidda_write_caldac(dev, caldac_number(channel),
578 fine_offset_channel(channel), fine_offset);
579 cb_pcidda_write_caldac(dev, caldac_number(channel),
580 coarse_gain_channel(channel), coarse_gain);
581 cb_pcidda_write_caldac(dev, caldac_number(channel),
582 fine_gain_channel(channel), fine_gain);
583} 296}
584 297
585static int cb_pcidda_ao_winsn(struct comedi_device *dev, 298static int cb_pcidda_ao_insn_write(struct comedi_device *dev,
586 struct comedi_subdevice *s, 299 struct comedi_subdevice *s,
587 struct comedi_insn *insn, unsigned int *data) 300 struct comedi_insn *insn,
301 unsigned int *data)
588{ 302{
589 struct cb_pcidda_private *devpriv = dev->private; 303 struct cb_pcidda_private *devpriv = dev->private;
590 unsigned int command; 304 unsigned int channel = CR_CHAN(insn->chanspec);
591 unsigned int channel, range; 305 unsigned int range = CR_RANGE(insn->chanspec);
592 306 unsigned int ctrl;
593 channel = CR_CHAN(insn->chanspec);
594 range = CR_RANGE(insn->chanspec);
595 307
596 /* adjust calibration dacs if range has changed */
597 if (range != devpriv->ao_range[channel]) 308 if (range != devpriv->ao_range[channel])
598 cb_pcidda_calibrate(dev, channel, range); 309 cb_pcidda_calibrate(dev, channel, range);
599 310
600 /* output channel configuration */ 311 ctrl = CB_DDA_DA_CTRL_EN | CB_DDA_DA_CTRL_DAC(channel);
601 command = NOSU | ENABLEDAC;
602 312
603 /* output channel range */
604 switch (range) { 313 switch (range) {
605 case 0: 314 case 0:
606 command |= BIP | RANGE10V;
607 break;
608 case 1:
609 command |= BIP | RANGE5V;
610 break;
611 case 2:
612 command |= BIP | RANGE2V5;
613 break;
614 case 3: 315 case 3:
615 command |= UNIP | RANGE10V; 316 ctrl |= CB_DDA_DA_CTRL_RANGE10V;
616 break; 317 break;
318 case 1:
617 case 4: 319 case 4:
618 command |= UNIP | RANGE5V; 320 ctrl |= CB_DDA_DA_CTRL_RANGE5V;
619 break; 321 break;
322 case 2:
620 case 5: 323 case 5:
621 command |= UNIP | RANGE2V5; 324 ctrl |= CB_DDA_DA_CTRL_RANGE2V5;
622 break; 325 break;
623 } 326 }
624 327
625 /* output channel specification */ 328 if (range > 2)
626 command |= channel << 2; 329 ctrl |= CB_DDA_DA_CTRL_UNIP;
627 outw(command, devpriv->dac + DACONTROL);
628 330
629 /* write data */ 331 outw(ctrl, dev->iobase + CB_DDA_DA_CTRL_REG);
630 outw(data[0], devpriv->dac + DADATA + channel * 2);
631 332
632 /* return the number of samples read/written */ 333 outw(data[0], dev->iobase + CB_DDA_DA_DATA_REG(channel));
633 return 1; 334
335 return insn->n;
634} 336}
635 337
636static const void *cb_pcidda_find_boardinfo(struct comedi_device *dev, 338static const void *cb_pcidda_find_boardinfo(struct comedi_device *dev,
@@ -647,41 +349,33 @@ static const void *cb_pcidda_find_boardinfo(struct comedi_device *dev,
647 return NULL; 349 return NULL;
648} 350}
649 351
650static int cb_pcidda_attach_pci(struct comedi_device *dev, 352static int cb_pcidda_auto_attach(struct comedi_device *dev,
651 struct pci_dev *pcidev) 353 unsigned long context_unused)
652{ 354{
355 struct pci_dev *pcidev = comedi_to_pci_dev(dev);
653 const struct cb_pcidda_board *thisboard; 356 const struct cb_pcidda_board *thisboard;
654 struct cb_pcidda_private *devpriv; 357 struct cb_pcidda_private *devpriv;
655 struct comedi_subdevice *s; 358 struct comedi_subdevice *s;
656 int index; 359 unsigned long iobase_8255;
360 int i;
657 int ret; 361 int ret;
658 362
659 comedi_set_hw_dev(dev, &pcidev->dev);
660
661 thisboard = cb_pcidda_find_boardinfo(dev, pcidev); 363 thisboard = cb_pcidda_find_boardinfo(dev, pcidev);
662 if (!pcidev) 364 if (!thisboard)
663 return -ENODEV; 365 return -ENODEV;
664 dev->board_ptr = thisboard; 366 dev->board_ptr = thisboard;
665 dev->board_name = thisboard->name; 367 dev->board_name = thisboard->name;
666 368
667 ret = alloc_private(dev, sizeof(*devpriv)); 369 devpriv = kzalloc(sizeof(*devpriv), GFP_KERNEL);
668 if (ret) 370 if (!devpriv)
669 return ret; 371 return -ENOMEM;
670 devpriv = dev->private; 372 dev->private = devpriv;
671 373
672 ret = comedi_pci_enable(pcidev, dev->board_name); 374 ret = comedi_pci_enable(pcidev, dev->board_name);
673 if (ret) 375 if (ret)
674 return ret; 376 return ret;
675 377 dev->iobase = pci_resource_start(pcidev, 3);
676 devpriv->digitalio = pci_resource_start(pcidev, 2); 378 iobase_8255 = pci_resource_start(pcidev, 2);
677 devpriv->dac = pci_resource_start(pcidev, 3);
678 dev->iobase = devpriv->dac;
679
680 if (thisboard->status == 2)
681 printk
682 ("WARNING: DRIVER FOR THIS BOARD NOT CHECKED WITH MANUAL. "
683 "WORKS ASSUMING FULL COMPATIBILITY WITH PCI-DDA08/12. "
684 "PLEASE REPORT USAGE TO <ivanmr@altavista.com>.\n");
685 379
686 ret = comedi_alloc_subdevices(dev, 3); 380 ret = comedi_alloc_subdevices(dev, 3);
687 if (ret) 381 if (ret)
@@ -693,29 +387,24 @@ static int cb_pcidda_attach_pci(struct comedi_device *dev,
693 s->subdev_flags = SDF_WRITABLE; 387 s->subdev_flags = SDF_WRITABLE;
694 s->n_chan = thisboard->ao_chans; 388 s->n_chan = thisboard->ao_chans;
695 s->maxdata = (1 << thisboard->ao_bits) - 1; 389 s->maxdata = (1 << thisboard->ao_bits) - 1;
696 s->range_table = thisboard->ranges; 390 s->range_table = &cb_pcidda_ranges;
697 s->insn_write = cb_pcidda_ao_winsn; 391 s->insn_write = cb_pcidda_ao_insn_write;
698 392
699 /* s->subdev_flags |= SDF_CMD_READ; */ 393 /* two 8255 digital io subdevices */
700 /* s->do_cmd = cb_pcidda_ai_cmd; */ 394 for (i = 0; i < 2; i++) {
701 /* s->do_cmdtest = cb_pcidda_ai_cmdtest; */ 395 s = &dev->subdevices[1 + i];
702 396 ret = subdev_8255_init(dev, s, NULL, iobase_8255 + (i * 4));
703 /* two 8255 digital io subdevices */ 397 if (ret)
704 s = &dev->subdevices[1]; 398 return ret;
705 subdev_8255_init(dev, s, NULL, devpriv->digitalio);
706 s = &dev->subdevices[2];
707 subdev_8255_init(dev, s, NULL, devpriv->digitalio + PORT2A);
708
709 dev_dbg(dev->class_dev, "eeprom:\n");
710 for (index = 0; index < EEPROM_SIZE; index++) {
711 devpriv->eeprom_data[index] = cb_pcidda_read_eeprom(dev, index);
712 dev_dbg(dev->class_dev, "%i:0x%x\n", index,
713 devpriv->eeprom_data[index]);
714 } 399 }
715 400
401 /* Read the caldac eeprom data */
402 for (i = 0; i < EEPROM_SIZE; i++)
403 devpriv->eeprom_data[i] = cb_pcidda_read_eeprom(dev, i);
404
716 /* set calibrations dacs */ 405 /* set calibrations dacs */
717 for (index = 0; index < thisboard->ao_chans; index++) 406 for (i = 0; i < thisboard->ao_chans; i++)
718 cb_pcidda_calibrate(dev, index, devpriv->ao_range[index]); 407 cb_pcidda_calibrate(dev, i, devpriv->ao_range[i]);
719 408
720 dev_info(dev->class_dev, "%s attached\n", dev->board_name); 409 dev_info(dev->class_dev, "%s attached\n", dev->board_name);
721 410
@@ -739,28 +428,28 @@ static void cb_pcidda_detach(struct comedi_device *dev)
739static struct comedi_driver cb_pcidda_driver = { 428static struct comedi_driver cb_pcidda_driver = {
740 .driver_name = "cb_pcidda", 429 .driver_name = "cb_pcidda",
741 .module = THIS_MODULE, 430 .module = THIS_MODULE,
742 .attach_pci = cb_pcidda_attach_pci, 431 .auto_attach = cb_pcidda_auto_attach,
743 .detach = cb_pcidda_detach, 432 .detach = cb_pcidda_detach,
744}; 433};
745 434
746static int __devinit cb_pcidda_pci_probe(struct pci_dev *dev, 435static int cb_pcidda_pci_probe(struct pci_dev *dev,
747 const struct pci_device_id *ent) 436 const struct pci_device_id *ent)
748{ 437{
749 return comedi_pci_auto_config(dev, &cb_pcidda_driver); 438 return comedi_pci_auto_config(dev, &cb_pcidda_driver);
750} 439}
751 440
752static void __devexit cb_pcidda_pci_remove(struct pci_dev *dev) 441static void cb_pcidda_pci_remove(struct pci_dev *dev)
753{ 442{
754 comedi_pci_auto_unconfig(dev); 443 comedi_pci_auto_unconfig(dev);
755} 444}
756 445
757static DEFINE_PCI_DEVICE_TABLE(cb_pcidda_pci_table) = { 446static DEFINE_PCI_DEVICE_TABLE(cb_pcidda_pci_table) = {
758 { PCI_DEVICE(PCI_VENDOR_ID_CB, 0x0020) }, 447 { PCI_DEVICE(PCI_VENDOR_ID_CB, PCI_DEVICE_ID_DDA02_12) },
759 { PCI_DEVICE(PCI_VENDOR_ID_CB, 0x0021) }, 448 { PCI_DEVICE(PCI_VENDOR_ID_CB, PCI_DEVICE_ID_DDA04_12) },
760 { PCI_DEVICE(PCI_VENDOR_ID_CB, 0x0022) }, 449 { PCI_DEVICE(PCI_VENDOR_ID_CB, PCI_DEVICE_ID_DDA08_12) },
761 { PCI_DEVICE(PCI_VENDOR_ID_CB, 0x0023) }, 450 { PCI_DEVICE(PCI_VENDOR_ID_CB, PCI_DEVICE_ID_DDA02_16) },
762 { PCI_DEVICE(PCI_VENDOR_ID_CB, 0x0024) }, 451 { PCI_DEVICE(PCI_VENDOR_ID_CB, PCI_DEVICE_ID_DDA04_16) },
763 { PCI_DEVICE(PCI_VENDOR_ID_CB, 0x0025) }, 452 { PCI_DEVICE(PCI_VENDOR_ID_CB, PCI_DEVICE_ID_DDA08_16) },
764 { 0 } 453 { 0 }
765}; 454};
766MODULE_DEVICE_TABLE(pci, cb_pcidda_pci_table); 455MODULE_DEVICE_TABLE(pci, cb_pcidda_pci_table);
@@ -769,7 +458,7 @@ static struct pci_driver cb_pcidda_pci_driver = {
769 .name = "cb_pcidda", 458 .name = "cb_pcidda",
770 .id_table = cb_pcidda_pci_table, 459 .id_table = cb_pcidda_pci_table,
771 .probe = cb_pcidda_pci_probe, 460 .probe = cb_pcidda_pci_probe,
772 .remove = __devexit_p(cb_pcidda_pci_remove), 461 .remove = cb_pcidda_pci_remove,
773}; 462};
774module_comedi_pci_driver(cb_pcidda_driver, cb_pcidda_pci_driver); 463module_comedi_pci_driver(cb_pcidda_driver, cb_pcidda_pci_driver);
775 464
diff --git a/drivers/staging/comedi/drivers/cb_pcimdas.c b/drivers/staging/comedi/drivers/cb_pcimdas.c
index 9515b6926662..b43a5f80ac26 100644
--- a/drivers/staging/comedi/drivers/cb_pcimdas.c
+++ b/drivers/staging/comedi/drivers/cb_pcimdas.c
@@ -51,8 +51,6 @@ See http://www.mccdaq.com/PDFs/Manuals/pcim-das1602-16.pdf for more details.
51/* #define CBPCIMDAS_DEBUG */ 51/* #define CBPCIMDAS_DEBUG */
52#undef CBPCIMDAS_DEBUG 52#undef CBPCIMDAS_DEBUG
53 53
54#define PCI_VENDOR_ID_COMPUTERBOARDS 0x1307
55
56/* Registers for the PCIM-DAS1602/16 */ 54/* Registers for the PCIM-DAS1602/16 */
57 55
58/* sizes of io regions (bytes) */ 56/* sizes of io regions (bytes) */
@@ -80,44 +78,6 @@ See http://www.mccdaq.com/PDFs/Manuals/pcim-das1602-16.pdf for more details.
80#define RESID_COUNT_H 13 78#define RESID_COUNT_H 13
81#define RESID_COUNT_L 14 79#define RESID_COUNT_L 14
82 80
83/* Board description */
84struct cb_pcimdas_board {
85 const char *name;
86 unsigned short device_id;
87 int ai_se_chans; /* Inputs in single-ended mode */
88 int ai_diff_chans; /* Inputs in differential mode */
89 int ai_bits; /* analog input resolution */
90 int ai_speed; /* fastest conversion period in ns */
91 int ao_nchan; /* number of analog out channels */
92 int ao_bits; /* analogue output resolution */
93 int has_ao_fifo; /* analog output has fifo */
94 int ao_scan_speed; /* analog output speed for 1602 series (for a scan, not conversion) */
95 int fifo_size; /* number of samples fifo can hold */
96 int dio_bits; /* number of dio bits */
97 int has_dio; /* has DIO */
98 const struct comedi_lrange *ranges;
99};
100
101static const struct cb_pcimdas_board cb_pcimdas_boards[] = {
102 {
103 .name = "PCIM-DAS1602/16",
104 .device_id = 0x56,
105 .ai_se_chans = 16,
106 .ai_diff_chans = 8,
107 .ai_bits = 16,
108 .ai_speed = 10000, /* ?? */
109 .ao_nchan = 2,
110 .ao_bits = 12,
111 .has_ao_fifo = 0, /* ?? */
112 .ao_scan_speed = 10000,
113 /* ?? */
114 .fifo_size = 1024,
115 .dio_bits = 24,
116 .has_dio = 1,
117/* .ranges = &cb_pcimdas_ranges, */
118 },
119};
120
121/* 81/*
122 * this structure is for data unique to this hardware driver. If 82 * this structure is for data unique to this hardware driver. If
123 * several hardware drivers keep similar information in this structure, 83 * several hardware drivers keep similar information in this structure,
@@ -140,7 +100,6 @@ static int cb_pcimdas_ai_rinsn(struct comedi_device *dev,
140 struct comedi_subdevice *s, 100 struct comedi_subdevice *s,
141 struct comedi_insn *insn, unsigned int *data) 101 struct comedi_insn *insn, unsigned int *data)
142{ 102{
143 const struct cb_pcimdas_board *thisboard = comedi_board(dev);
144 struct cb_pcimdas_private *devpriv = dev->private; 103 struct cb_pcimdas_private *devpriv = dev->private;
145 int n, i; 104 int n, i;
146 unsigned int d; 105 unsigned int d;
@@ -153,9 +112,9 @@ static int cb_pcimdas_ai_rinsn(struct comedi_device *dev,
153 112
154 /* check channel number */ 113 /* check channel number */
155 if ((inb(devpriv->BADR3 + 2) & 0x20) == 0) /* differential mode */ 114 if ((inb(devpriv->BADR3 + 2) & 0x20) == 0) /* differential mode */
156 maxchans = thisboard->ai_diff_chans; 115 maxchans = s->n_chan / 2;
157 else 116 else
158 maxchans = thisboard->ai_se_chans; 117 maxchans = s->n_chan;
159 118
160 if (chan > (maxchans - 1)) 119 if (chan > (maxchans - 1))
161 return -ETIMEDOUT; /* *** Wrong error code. Fixme. */ 120 return -ETIMEDOUT; /* *** Wrong error code. Fixme. */
@@ -195,12 +154,7 @@ static int cb_pcimdas_ai_rinsn(struct comedi_device *dev,
195 return -ETIMEDOUT; 154 return -ETIMEDOUT;
196 } 155 }
197 /* read data */ 156 /* read data */
198 d = inw(dev->iobase + 0); 157 data[n] = inw(dev->iobase + 0);
199
200 /* mangle the data as necessary */
201 /* d ^= 1<<(thisboard->ai_bits-1); // 16 bit data from ADC, so no mangle needed. */
202
203 data[n] = d;
204 } 158 }
205 159
206 /* return the number of samples read/written */ 160 /* return the number of samples read/written */
@@ -251,51 +205,21 @@ static int cb_pcimdas_ao_rinsn(struct comedi_device *dev,
251 return i; 205 return i;
252} 206}
253 207
254static const void *cb_pcimdas_find_boardinfo(struct comedi_device *dev, 208static int cb_pcimdas_auto_attach(struct comedi_device *dev,
255 struct pci_dev *pcidev) 209 unsigned long context_unused)
256{ 210{
257 const struct cb_pcimdas_board *thisboard; 211 struct pci_dev *pcidev = comedi_to_pci_dev(dev);
258 int i;
259
260 for (i = 0; i < ARRAY_SIZE(cb_pcimdas_boards); i++) {
261 thisboard = &cb_pcimdas_boards[i];
262 if (thisboard->device_id == pcidev->device)
263 return thisboard;
264 }
265 return NULL;
266}
267
268static int cb_pcimdas_attach_pci(struct comedi_device *dev,
269 struct pci_dev *pcidev)
270{
271 const struct cb_pcimdas_board *thisboard;
272 struct cb_pcimdas_private *devpriv; 212 struct cb_pcimdas_private *devpriv;
273 struct comedi_subdevice *s; 213 struct comedi_subdevice *s;
274 unsigned long iobase_8255; 214 unsigned long iobase_8255;
275 int ret; 215 int ret;
276 216
277 comedi_set_hw_dev(dev, &pcidev->dev); 217 dev->board_name = dev->driver->driver_name;
278 218
279 thisboard = cb_pcimdas_find_boardinfo(dev, pcidev); 219 devpriv = kzalloc(sizeof(*devpriv), GFP_KERNEL);
280 if (!thisboard) 220 if (!devpriv)
281 return -ENODEV; 221 return -ENOMEM;
282 dev->board_ptr = thisboard; 222 dev->private = devpriv;
283 dev->board_name = thisboard->name;
284
285 ret = alloc_private(dev, sizeof(*devpriv));
286 if (ret)
287 return ret;
288 devpriv = dev->private;
289
290 /* Warn about non-tested features */
291 switch (thisboard->device_id) {
292 case 0x56:
293 break;
294 default:
295 dev_dbg(dev->class_dev, "THIS CARD IS UNSUPPORTED.\n");
296 dev_dbg(dev->class_dev,
297 "PLEASE REPORT USAGE TO <mocelet@sucs.org>\n");
298 }
299 223
300 ret = comedi_pci_enable(pcidev, dev->board_name); 224 ret = comedi_pci_enable(pcidev, dev->board_name);
301 if (ret) 225 if (ret)
@@ -323,8 +247,8 @@ static int cb_pcimdas_attach_pci(struct comedi_device *dev,
323 /* analog input subdevice */ 247 /* analog input subdevice */
324 s->type = COMEDI_SUBD_AI; 248 s->type = COMEDI_SUBD_AI;
325 s->subdev_flags = SDF_READABLE | SDF_GROUND; 249 s->subdev_flags = SDF_READABLE | SDF_GROUND;
326 s->n_chan = thisboard->ai_se_chans; 250 s->n_chan = 16;
327 s->maxdata = (1 << thisboard->ai_bits) - 1; 251 s->maxdata = 0xffff;
328 s->range_table = &range_unknown; 252 s->range_table = &range_unknown;
329 s->len_chanlist = 1; /* This is the maximum chanlist length that */ 253 s->len_chanlist = 1; /* This is the maximum chanlist length that */
330 /* the board can handle */ 254 /* the board can handle */
@@ -334,8 +258,8 @@ static int cb_pcimdas_attach_pci(struct comedi_device *dev,
334 /* analog output subdevice */ 258 /* analog output subdevice */
335 s->type = COMEDI_SUBD_AO; 259 s->type = COMEDI_SUBD_AO;
336 s->subdev_flags = SDF_WRITABLE; 260 s->subdev_flags = SDF_WRITABLE;
337 s->n_chan = thisboard->ao_nchan; 261 s->n_chan = 2;
338 s->maxdata = 1 << thisboard->ao_bits; 262 s->maxdata = 0xfff;
339 /* ranges are hardware settable, but not software readable. */ 263 /* ranges are hardware settable, but not software readable. */
340 s->range_table = &range_unknown; 264 s->range_table = &range_unknown;
341 s->insn_write = &cb_pcimdas_ao_winsn; 265 s->insn_write = &cb_pcimdas_ao_winsn;
@@ -343,10 +267,7 @@ static int cb_pcimdas_attach_pci(struct comedi_device *dev,
343 267
344 s = &dev->subdevices[2]; 268 s = &dev->subdevices[2];
345 /* digital i/o subdevice */ 269 /* digital i/o subdevice */
346 if (thisboard->has_dio) 270 subdev_8255_init(dev, s, NULL, iobase_8255);
347 subdev_8255_init(dev, s, NULL, iobase_8255);
348 else
349 s->type = COMEDI_SUBD_UNUSED;
350 271
351 dev_info(dev->class_dev, "%s attached\n", dev->board_name); 272 dev_info(dev->class_dev, "%s attached\n", dev->board_name);
352 273
@@ -368,23 +289,23 @@ static void cb_pcimdas_detach(struct comedi_device *dev)
368static struct comedi_driver cb_pcimdas_driver = { 289static struct comedi_driver cb_pcimdas_driver = {
369 .driver_name = "cb_pcimdas", 290 .driver_name = "cb_pcimdas",
370 .module = THIS_MODULE, 291 .module = THIS_MODULE,
371 .attach_pci = cb_pcimdas_attach_pci, 292 .auto_attach = cb_pcimdas_auto_attach,
372 .detach = cb_pcimdas_detach, 293 .detach = cb_pcimdas_detach,
373}; 294};
374 295
375static int __devinit cb_pcimdas_pci_probe(struct pci_dev *dev, 296static int cb_pcimdas_pci_probe(struct pci_dev *dev,
376 const struct pci_device_id *ent) 297 const struct pci_device_id *ent)
377{ 298{
378 return comedi_pci_auto_config(dev, &cb_pcimdas_driver); 299 return comedi_pci_auto_config(dev, &cb_pcimdas_driver);
379} 300}
380 301
381static void __devexit cb_pcimdas_pci_remove(struct pci_dev *dev) 302static void cb_pcimdas_pci_remove(struct pci_dev *dev)
382{ 303{
383 comedi_pci_auto_unconfig(dev); 304 comedi_pci_auto_unconfig(dev);
384} 305}
385 306
386static DEFINE_PCI_DEVICE_TABLE(cb_pcimdas_pci_table) = { 307static DEFINE_PCI_DEVICE_TABLE(cb_pcimdas_pci_table) = {
387 { PCI_DEVICE(PCI_VENDOR_ID_COMPUTERBOARDS, 0x0056) }, 308 { PCI_DEVICE(PCI_VENDOR_ID_CB, 0x0056) },
388 { 0 } 309 { 0 }
389}; 310};
390MODULE_DEVICE_TABLE(pci, cb_pcimdas_pci_table); 311MODULE_DEVICE_TABLE(pci, cb_pcimdas_pci_table);
@@ -393,7 +314,7 @@ static struct pci_driver cb_pcimdas_pci_driver = {
393 .name = "cb_pcimdas", 314 .name = "cb_pcimdas",
394 .id_table = cb_pcimdas_pci_table, 315 .id_table = cb_pcimdas_pci_table,
395 .probe = cb_pcimdas_pci_probe, 316 .probe = cb_pcimdas_pci_probe,
396 .remove = __devexit_p(cb_pcimdas_pci_remove), 317 .remove = cb_pcimdas_pci_remove,
397}; 318};
398module_comedi_pci_driver(cb_pcimdas_driver, cb_pcimdas_pci_driver); 319module_comedi_pci_driver(cb_pcimdas_driver, cb_pcimdas_pci_driver);
399 320
diff --git a/drivers/staging/comedi/drivers/cb_pcimdda.c b/drivers/staging/comedi/drivers/cb_pcimdda.c
index ba9f0599be28..699b84f54cc7 100644
--- a/drivers/staging/comedi/drivers/cb_pcimdda.c
+++ b/drivers/staging/comedi/drivers/cb_pcimdda.c
@@ -84,7 +84,6 @@ Configuration Options: not applicable, uses PCI auto config
84#include "8255.h" 84#include "8255.h"
85 85
86/* device ids of the cards we support -- currently only 1 card supported */ 86/* device ids of the cards we support -- currently only 1 card supported */
87#define PCI_VENDOR_ID_COMPUTERBOARDS 0x1307
88#define PCI_ID_PCIM_DDA06_16 0x0053 87#define PCI_ID_PCIM_DDA06_16 0x0053
89 88
90/* 89/*
@@ -152,20 +151,20 @@ static int cb_pcimdda_ao_rinsn(struct comedi_device *dev,
152 return insn->n; 151 return insn->n;
153} 152}
154 153
155static int cb_pcimdda_attach_pci(struct comedi_device *dev, 154static int cb_pcimdda_auto_attach(struct comedi_device *dev,
156 struct pci_dev *pcidev) 155 unsigned long context_unused)
157{ 156{
157 struct pci_dev *pcidev = comedi_to_pci_dev(dev);
158 struct cb_pcimdda_private *devpriv; 158 struct cb_pcimdda_private *devpriv;
159 struct comedi_subdevice *s; 159 struct comedi_subdevice *s;
160 int ret; 160 int ret;
161 161
162 comedi_set_hw_dev(dev, &pcidev->dev);
163 dev->board_name = dev->driver->driver_name; 162 dev->board_name = dev->driver->driver_name;
164 163
165 ret = alloc_private(dev, sizeof(*devpriv)); 164 devpriv = kzalloc(sizeof(*devpriv), GFP_KERNEL);
166 if (ret) 165 if (!devpriv)
167 return ret; 166 return -ENOMEM;
168 devpriv = dev->private; 167 dev->private = devpriv;
169 168
170 ret = comedi_pci_enable(pcidev, dev->board_name); 169 ret = comedi_pci_enable(pcidev, dev->board_name);
171 if (ret) 170 if (ret)
@@ -213,23 +212,23 @@ static void cb_pcimdda_detach(struct comedi_device *dev)
213static struct comedi_driver cb_pcimdda_driver = { 212static struct comedi_driver cb_pcimdda_driver = {
214 .driver_name = "cb_pcimdda", 213 .driver_name = "cb_pcimdda",
215 .module = THIS_MODULE, 214 .module = THIS_MODULE,
216 .attach_pci = cb_pcimdda_attach_pci, 215 .auto_attach = cb_pcimdda_auto_attach,
217 .detach = cb_pcimdda_detach, 216 .detach = cb_pcimdda_detach,
218}; 217};
219 218
220static int __devinit cb_pcimdda_pci_probe(struct pci_dev *dev, 219static int cb_pcimdda_pci_probe(struct pci_dev *dev,
221 const struct pci_device_id *ent) 220 const struct pci_device_id *ent)
222{ 221{
223 return comedi_pci_auto_config(dev, &cb_pcimdda_driver); 222 return comedi_pci_auto_config(dev, &cb_pcimdda_driver);
224} 223}
225 224
226static void __devexit cb_pcimdda_pci_remove(struct pci_dev *dev) 225static void cb_pcimdda_pci_remove(struct pci_dev *dev)
227{ 226{
228 comedi_pci_auto_unconfig(dev); 227 comedi_pci_auto_unconfig(dev);
229} 228}
230 229
231static DEFINE_PCI_DEVICE_TABLE(cb_pcimdda_pci_table) = { 230static DEFINE_PCI_DEVICE_TABLE(cb_pcimdda_pci_table) = {
232 { PCI_DEVICE(PCI_VENDOR_ID_COMPUTERBOARDS, PCI_ID_PCIM_DDA06_16) }, 231 { PCI_DEVICE(PCI_VENDOR_ID_CB, PCI_ID_PCIM_DDA06_16) },
233 { 0 } 232 { 0 }
234}; 233};
235MODULE_DEVICE_TABLE(pci, cb_pcimdda_pci_table); 234MODULE_DEVICE_TABLE(pci, cb_pcimdda_pci_table);
@@ -238,7 +237,7 @@ static struct pci_driver cb_pcimdda_driver_pci_driver = {
238 .name = "cb_pcimdda", 237 .name = "cb_pcimdda",
239 .id_table = cb_pcimdda_pci_table, 238 .id_table = cb_pcimdda_pci_table,
240 .probe = cb_pcimdda_pci_probe, 239 .probe = cb_pcimdda_pci_probe,
241 .remove = __devexit_p(cb_pcimdda_pci_remove), 240 .remove = cb_pcimdda_pci_remove,
242}; 241};
243module_comedi_pci_driver(cb_pcimdda_driver, cb_pcimdda_driver_pci_driver); 242module_comedi_pci_driver(cb_pcimdda_driver, cb_pcimdda_driver_pci_driver);
244 243
diff --git a/drivers/staging/comedi/drivers/comedi_bond.c b/drivers/staging/comedi/drivers/comedi_bond.c
index 5c768bc76eb1..31515999bb97 100644
--- a/drivers/staging/comedi/drivers/comedi_bond.c
+++ b/drivers/staging/comedi/drivers/comedi_bond.c
@@ -304,10 +304,10 @@ static int bonding_attach(struct comedi_device *dev,
304 struct comedi_subdevice *s; 304 struct comedi_subdevice *s;
305 int ret; 305 int ret;
306 306
307 ret = alloc_private(dev, sizeof(*devpriv)); 307 devpriv = kzalloc(sizeof(*devpriv), GFP_KERNEL);
308 if (ret) 308 if (!devpriv)
309 return ret; 309 return -ENOMEM;
310 devpriv = dev->private; 310 dev->private = devpriv;
311 311
312 /* 312 /*
313 * Setup our bonding from config params.. sets up our private struct.. 313 * Setup our bonding from config params.. sets up our private struct..
diff --git a/drivers/staging/comedi/drivers/comedi_fc.c b/drivers/staging/comedi/drivers/comedi_fc.c
index 63be619dd606..83728298eefb 100644
--- a/drivers/staging/comedi/drivers/comedi_fc.c
+++ b/drivers/staging/comedi/drivers/comedi_fc.c
@@ -53,7 +53,7 @@ unsigned int cfc_write_array_to_buffer(struct comedi_subdevice *subd,
53 53
54 retval = comedi_buf_write_alloc(async, num_bytes); 54 retval = comedi_buf_write_alloc(async, num_bytes);
55 if (retval != num_bytes) { 55 if (retval != num_bytes) {
56 printk(KERN_WARNING "comedi: buffer overrun\n"); 56 dev_warn(subd->device->class_dev, "comedi: buffer overrun\n");
57 async->events |= COMEDI_CB_OVERFLOW; 57 async->events |= COMEDI_CB_OVERFLOW;
58 return 0; 58 return 0;
59 } 59 }
diff --git a/drivers/staging/comedi/drivers/comedi_fc.h b/drivers/staging/comedi/drivers/comedi_fc.h
index 94481c637a0a..31afab79f39a 100644
--- a/drivers/staging/comedi/drivers/comedi_fc.h
+++ b/drivers/staging/comedi/drivers/comedi_fc.h
@@ -105,4 +105,48 @@ static inline int cfc_check_trigger_is_unique(unsigned int src)
105 return 0; 105 return 0;
106} 106}
107 107
108/**
109 * cfc_check_trigger_arg_is() - trivially validate a trigger argument
110 * @arg: pointer to the trigger arg to validate
111 * @val: the value the argument should be
112 */
113static inline int cfc_check_trigger_arg_is(unsigned int *arg, unsigned int val)
114{
115 if (*arg != val) {
116 *arg = val;
117 return -EINVAL;
118 }
119 return 0;
120}
121
122/**
123 * cfc_check_trigger_arg_min() - trivially validate a trigger argument
124 * @arg: pointer to the trigger arg to validate
125 * @val: the minimum value the argument should be
126 */
127static inline int cfc_check_trigger_arg_min(unsigned int *arg,
128 unsigned int val)
129{
130 if (*arg < val) {
131 *arg = val;
132 return -EINVAL;
133 }
134 return 0;
135}
136
137/**
138 * cfc_check_trigger_arg_max() - trivially validate a trigger argument
139 * @arg: pointer to the trigger arg to validate
140 * @val: the maximum value the argument should be
141 */
142static inline int cfc_check_trigger_arg_max(unsigned int *arg,
143 unsigned int val)
144{
145 if (*arg > val) {
146 *arg = val;
147 return -EINVAL;
148 }
149 return 0;
150}
151
108#endif /* _COMEDI_FC_H */ 152#endif /* _COMEDI_FC_H */
diff --git a/drivers/staging/comedi/drivers/comedi_parport.c b/drivers/staging/comedi/drivers/comedi_parport.c
index 22ef94242590..76d59dcbea07 100644
--- a/drivers/staging/comedi/drivers/comedi_parport.c
+++ b/drivers/staging/comedi/drivers/comedi_parport.c
@@ -196,28 +196,13 @@ static int parport_intr_cmdtest(struct comedi_device *dev,
196 if (err) 196 if (err)
197 return 2; 197 return 2;
198 198
199 /* step 3: */ 199 /* Step 3: check if arguments are trivially valid */
200 200
201 if (cmd->start_arg != 0) { 201 err |= cfc_check_trigger_arg_is(&cmd->start_arg, 0);
202 cmd->start_arg = 0; 202 err |= cfc_check_trigger_arg_is(&cmd->scan_begin_arg, 0);
203 err++; 203 err |= cfc_check_trigger_arg_is(&cmd->convert_arg, 0);
204 } 204 err |= cfc_check_trigger_arg_is(&cmd->scan_end_arg, 1);
205 if (cmd->scan_begin_arg != 0) { 205 err |= cfc_check_trigger_arg_is(&cmd->stop_arg, 0);
206 cmd->scan_begin_arg = 0;
207 err++;
208 }
209 if (cmd->convert_arg != 0) {
210 cmd->convert_arg = 0;
211 err++;
212 }
213 if (cmd->scan_end_arg != 1) {
214 cmd->scan_end_arg = 1;
215 err++;
216 }
217 if (cmd->stop_arg != 0) {
218 cmd->stop_arg = 0;
219 err++;
220 }
221 206
222 if (err) 207 if (err)
223 return 3; 208 return 3;
@@ -305,10 +290,10 @@ static int parport_attach(struct comedi_device *dev,
305 if (ret) 290 if (ret)
306 return ret; 291 return ret;
307 292
308 ret = alloc_private(dev, sizeof(*devpriv)); 293 devpriv = kzalloc(sizeof(*devpriv), GFP_KERNEL);
309 if (ret < 0) 294 if (!devpriv)
310 return ret; 295 return -ENOMEM;
311 devpriv = dev->private; 296 dev->private = devpriv;
312 297
313 s = &dev->subdevices[0]; 298 s = &dev->subdevices[0];
314 s->type = COMEDI_SUBD_DIO; 299 s->type = COMEDI_SUBD_DIO;
diff --git a/drivers/staging/comedi/drivers/comedi_test.c b/drivers/staging/comedi/drivers/comedi_test.c
index 7817def1556c..fb3d09323ba1 100644
--- a/drivers/staging/comedi/drivers/comedi_test.c
+++ b/drivers/staging/comedi/drivers/comedi_test.c
@@ -252,55 +252,28 @@ static int waveform_ai_cmdtest(struct comedi_device *dev,
252 if (err) 252 if (err)
253 return 2; 253 return 2;
254 254
255 /* step 3: make sure arguments are trivially compatible */ 255 /* Step 3: check if arguments are trivially valid */
256
257 err |= cfc_check_trigger_arg_is(&cmd->start_arg, 0);
258
259 if (cmd->convert_src == TRIG_NOW)
260 err |= cfc_check_trigger_arg_is(&cmd->convert_arg, 0);
256 261
257 if (cmd->start_arg != 0) {
258 cmd->start_arg = 0;
259 err++;
260 }
261 if (cmd->convert_src == TRIG_NOW) {
262 if (cmd->convert_arg != 0) {
263 cmd->convert_arg = 0;
264 err++;
265 }
266 }
267 if (cmd->scan_begin_src == TRIG_TIMER) { 262 if (cmd->scan_begin_src == TRIG_TIMER) {
268 if (cmd->scan_begin_arg < nano_per_micro) { 263 err |= cfc_check_trigger_arg_min(&cmd->scan_begin_arg,
269 cmd->scan_begin_arg = nano_per_micro; 264 nano_per_micro);
270 err++; 265 if (cmd->convert_src == TRIG_TIMER)
271 } 266 err |= cfc_check_trigger_arg_min(&cmd->scan_begin_arg,
272 if (cmd->convert_src == TRIG_TIMER && 267 cmd->convert_arg * cmd->chanlist_len);
273 cmd->scan_begin_arg <
274 cmd->convert_arg * cmd->chanlist_len) {
275 cmd->scan_begin_arg =
276 cmd->convert_arg * cmd->chanlist_len;
277 err++;
278 }
279 }
280 /*
281 * XXX these checks are generic and should go in core if not there
282 * already
283 */
284 if (!cmd->chanlist_len) {
285 cmd->chanlist_len = 1;
286 err++;
287 }
288 if (cmd->scan_end_arg != cmd->chanlist_len) {
289 cmd->scan_end_arg = cmd->chanlist_len;
290 err++;
291 } 268 }
292 269
293 if (cmd->stop_src == TRIG_COUNT) { 270 err |= cfc_check_trigger_arg_min(&cmd->chanlist_len, 1);
294 if (!cmd->stop_arg) { 271 err |= cfc_check_trigger_arg_is(&cmd->scan_end_arg, cmd->chanlist_len);
295 cmd->stop_arg = 1; 272
296 err++; 273 if (cmd->stop_src == TRIG_COUNT)
297 } 274 err |= cfc_check_trigger_arg_min(&cmd->stop_arg, 1);
298 } else { /* TRIG_NONE */ 275 else /* TRIG_NONE */
299 if (cmd->stop_arg != 0) { 276 err |= cfc_check_trigger_arg_is(&cmd->stop_arg, 0);
300 cmd->stop_arg = 0;
301 err++;
302 }
303 }
304 277
305 if (err) 278 if (err)
306 return 3; 279 return 3;
@@ -414,10 +387,10 @@ static int waveform_attach(struct comedi_device *dev,
414 387
415 dev->board_name = dev->driver->driver_name; 388 dev->board_name = dev->driver->driver_name;
416 389
417 ret = alloc_private(dev, sizeof(*devpriv)); 390 devpriv = kzalloc(sizeof(*devpriv), GFP_KERNEL);
418 if (ret < 0) 391 if (!devpriv)
419 return ret; 392 return -ENOMEM;
420 devpriv = dev->private; 393 dev->private = devpriv;
421 394
422 /* set default amplitude and period */ 395 /* set default amplitude and period */
423 if (amplitude <= 0) 396 if (amplitude <= 0)
diff --git a/drivers/staging/comedi/drivers/contec_pci_dio.c b/drivers/staging/comedi/drivers/contec_pci_dio.c
index 178a6a4bb7d5..1a18fa37bfd0 100644
--- a/drivers/staging/comedi/drivers/contec_pci_dio.c
+++ b/drivers/staging/comedi/drivers/contec_pci_dio.c
@@ -68,14 +68,13 @@ static int contec_di_insn_bits(struct comedi_device *dev,
68 return insn->n; 68 return insn->n;
69} 69}
70 70
71static int contec_attach_pci(struct comedi_device *dev, 71static int contec_auto_attach(struct comedi_device *dev,
72 struct pci_dev *pcidev) 72 unsigned long context_unused)
73{ 73{
74 struct pci_dev *pcidev = comedi_to_pci_dev(dev);
74 struct comedi_subdevice *s; 75 struct comedi_subdevice *s;
75 int ret; 76 int ret;
76 77
77 comedi_set_hw_dev(dev, &pcidev->dev);
78
79 dev->board_name = dev->driver->driver_name; 78 dev->board_name = dev->driver->driver_name;
80 79
81 ret = comedi_pci_enable(pcidev, dev->board_name); 80 ret = comedi_pci_enable(pcidev, dev->board_name);
@@ -121,17 +120,17 @@ static void contec_detach(struct comedi_device *dev)
121static struct comedi_driver contec_pci_dio_driver = { 120static struct comedi_driver contec_pci_dio_driver = {
122 .driver_name = "contec_pci_dio", 121 .driver_name = "contec_pci_dio",
123 .module = THIS_MODULE, 122 .module = THIS_MODULE,
124 .attach_pci = contec_attach_pci, 123 .auto_attach = contec_auto_attach,
125 .detach = contec_detach, 124 .detach = contec_detach,
126}; 125};
127 126
128static int __devinit contec_pci_dio_pci_probe(struct pci_dev *dev, 127static int contec_pci_dio_pci_probe(struct pci_dev *dev,
129 const struct pci_device_id *ent) 128 const struct pci_device_id *ent)
130{ 129{
131 return comedi_pci_auto_config(dev, &contec_pci_dio_driver); 130 return comedi_pci_auto_config(dev, &contec_pci_dio_driver);
132} 131}
133 132
134static void __devexit contec_pci_dio_pci_remove(struct pci_dev *dev) 133static void contec_pci_dio_pci_remove(struct pci_dev *dev)
135{ 134{
136 comedi_pci_auto_unconfig(dev); 135 comedi_pci_auto_unconfig(dev);
137} 136}
@@ -146,7 +145,7 @@ static struct pci_driver contec_pci_dio_pci_driver = {
146 .name = "contec_pci_dio", 145 .name = "contec_pci_dio",
147 .id_table = contec_pci_dio_pci_table, 146 .id_table = contec_pci_dio_pci_table,
148 .probe = contec_pci_dio_pci_probe, 147 .probe = contec_pci_dio_pci_probe,
149 .remove = __devexit_p(contec_pci_dio_pci_remove), 148 .remove = contec_pci_dio_pci_remove,
150}; 149};
151module_comedi_pci_driver(contec_pci_dio_driver, contec_pci_dio_pci_driver); 150module_comedi_pci_driver(contec_pci_dio_driver, contec_pci_dio_pci_driver);
152 151
diff --git a/drivers/staging/comedi/drivers/daqboard2000.c b/drivers/staging/comedi/drivers/daqboard2000.c
index d13c8c5822bf..992e557e6ae1 100644
--- a/drivers/staging/comedi/drivers/daqboard2000.c
+++ b/drivers/staging/comedi/drivers/daqboard2000.c
@@ -117,8 +117,6 @@ Configuration options: not applicable, uses PCI auto config
117 117
118#define DAQBOARD2000_FIRMWARE "daqboard2000_firmware.bin" 118#define DAQBOARD2000_FIRMWARE "daqboard2000_firmware.bin"
119 119
120#define PCI_VENDOR_ID_IOTECH 0x1616
121
122#define DAQBOARD2000_SUBSYSTEM_IDS2 0x0002 /* Daqboard/2000 - 2 Dacs */ 120#define DAQBOARD2000_SUBSYSTEM_IDS2 0x0002 /* Daqboard/2000 - 2 Dacs */
123#define DAQBOARD2000_SUBSYSTEM_IDS4 0x0004 /* Daqboard/2000 - 4 Dacs */ 121#define DAQBOARD2000_SUBSYSTEM_IDS4 0x0004 /* Daqboard/2000 - 4 Dacs */
124 122
@@ -690,26 +688,25 @@ static const void *daqboard2000_find_boardinfo(struct comedi_device *dev,
690 return NULL; 688 return NULL;
691} 689}
692 690
693static int daqboard2000_attach_pci(struct comedi_device *dev, 691static int daqboard2000_auto_attach(struct comedi_device *dev,
694 struct pci_dev *pcidev) 692 unsigned long context_unused)
695{ 693{
694 struct pci_dev *pcidev = comedi_to_pci_dev(dev);
696 const struct daq200_boardtype *board; 695 const struct daq200_boardtype *board;
697 struct daqboard2000_private *devpriv; 696 struct daqboard2000_private *devpriv;
698 struct comedi_subdevice *s; 697 struct comedi_subdevice *s;
699 int result; 698 int result;
700 699
701 comedi_set_hw_dev(dev, &pcidev->dev);
702
703 board = daqboard2000_find_boardinfo(dev, pcidev); 700 board = daqboard2000_find_boardinfo(dev, pcidev);
704 if (!board) 701 if (!board)
705 return -ENODEV; 702 return -ENODEV;
706 dev->board_ptr = board; 703 dev->board_ptr = board;
707 dev->board_name = board->name; 704 dev->board_name = board->name;
708 705
709 result = alloc_private(dev, sizeof(*devpriv)); 706 devpriv = kzalloc(sizeof(*devpriv), GFP_KERNEL);
710 if (result < 0) 707 if (!devpriv)
711 return -ENOMEM; 708 return -ENOMEM;
712 devpriv = dev->private; 709 dev->private = devpriv;
713 710
714 result = comedi_pci_enable(pcidev, dev->driver->driver_name); 711 result = comedi_pci_enable(pcidev, dev->driver->driver_name);
715 if (result < 0) 712 if (result < 0)
@@ -792,17 +789,17 @@ static void daqboard2000_detach(struct comedi_device *dev)
792static struct comedi_driver daqboard2000_driver = { 789static struct comedi_driver daqboard2000_driver = {
793 .driver_name = "daqboard2000", 790 .driver_name = "daqboard2000",
794 .module = THIS_MODULE, 791 .module = THIS_MODULE,
795 .attach_pci = daqboard2000_attach_pci, 792 .auto_attach = daqboard2000_auto_attach,
796 .detach = daqboard2000_detach, 793 .detach = daqboard2000_detach,
797}; 794};
798 795
799static int __devinit daqboard2000_pci_probe(struct pci_dev *dev, 796static int daqboard2000_pci_probe(struct pci_dev *dev,
800 const struct pci_device_id *ent) 797 const struct pci_device_id *ent)
801{ 798{
802 return comedi_pci_auto_config(dev, &daqboard2000_driver); 799 return comedi_pci_auto_config(dev, &daqboard2000_driver);
803} 800}
804 801
805static void __devexit daqboard2000_pci_remove(struct pci_dev *dev) 802static void daqboard2000_pci_remove(struct pci_dev *dev)
806{ 803{
807 comedi_pci_auto_unconfig(dev); 804 comedi_pci_auto_unconfig(dev);
808} 805}
@@ -817,7 +814,7 @@ static struct pci_driver daqboard2000_pci_driver = {
817 .name = "daqboard2000", 814 .name = "daqboard2000",
818 .id_table = daqboard2000_pci_table, 815 .id_table = daqboard2000_pci_table,
819 .probe = daqboard2000_pci_probe, 816 .probe = daqboard2000_pci_probe,
820 .remove = __devexit_p(daqboard2000_pci_remove), 817 .remove = daqboard2000_pci_remove,
821}; 818};
822module_comedi_pci_driver(daqboard2000_driver, daqboard2000_pci_driver); 819module_comedi_pci_driver(daqboard2000_driver, daqboard2000_pci_driver);
823 820
diff --git a/drivers/staging/comedi/drivers/das08.c b/drivers/staging/comedi/drivers/das08.c
index c304528cfb13..b15e05808cb0 100644
--- a/drivers/staging/comedi/drivers/das08.c
+++ b/drivers/staging/comedi/drivers/das08.c
@@ -65,7 +65,6 @@
65#define DO_PCI IS_ENABLED(CONFIG_COMEDI_DAS08_PCI) 65#define DO_PCI IS_ENABLED(CONFIG_COMEDI_DAS08_PCI)
66#define DO_COMEDI_DRIVER_REGISTER (DO_ISA || DO_PCI) 66#define DO_COMEDI_DRIVER_REGISTER (DO_ISA || DO_PCI)
67 67
68#define PCI_VENDOR_ID_COMPUTERBOARDS 0x1307
69#define PCI_DEVICE_ID_PCIDAS08 0x29 68#define PCI_DEVICE_ID_PCIDAS08 0x29
70#define PCIDAS08_SIZE 0x54 69#define PCIDAS08_SIZE 0x54
71 70
@@ -775,24 +774,29 @@ das08_find_pci_board(struct pci_dev *pdev)
775} 774}
776 775
777/* only called in the PCI probe path, via comedi_pci_auto_config() */ 776/* only called in the PCI probe path, via comedi_pci_auto_config() */
778static int __devinit __maybe_unused 777static int __maybe_unused
779das08_attach_pci(struct comedi_device *dev, struct pci_dev *pdev) 778das08_auto_attach(struct comedi_device *dev, unsigned long context_unused)
780{ 779{
780 struct pci_dev *pdev;
781 struct das08_private_struct *devpriv;
781 unsigned long iobase; 782 unsigned long iobase;
782 int ret;
783 783
784 if (!DO_PCI) 784 if (!DO_PCI)
785 return -EINVAL; 785 return -EINVAL;
786 ret = alloc_private(dev, sizeof(struct das08_private_struct)); 786
787 if (ret < 0) 787 pdev = comedi_to_pci_dev(dev);
788 return ret; 788 devpriv = kzalloc(sizeof(*devpriv), GFP_KERNEL);
789 if (!devpriv)
790 return -ENOMEM;
791 dev->private = devpriv;
792
789 dev_info(dev->class_dev, "attach pci %s\n", pci_name(pdev)); 793 dev_info(dev->class_dev, "attach pci %s\n", pci_name(pdev));
790 dev->board_ptr = das08_find_pci_board(pdev); 794 dev->board_ptr = das08_find_pci_board(pdev);
791 if (dev->board_ptr == NULL) { 795 if (dev->board_ptr == NULL) {
792 dev_err(dev->class_dev, "BUG! cannot determine board type!\n"); 796 dev_err(dev->class_dev, "BUG! cannot determine board type!\n");
793 return -EINVAL; 797 return -EINVAL;
794 } 798 }
795 comedi_set_hw_dev(dev, &pdev->dev); 799
796 /* enable PCI device and reserve I/O spaces */ 800 /* enable PCI device and reserve I/O spaces */
797 if (comedi_pci_enable(pdev, dev->driver->driver_name)) { 801 if (comedi_pci_enable(pdev, dev->driver->driver_name)) {
798 dev_err(dev->class_dev, 802 dev_err(dev->class_dev,
@@ -809,13 +813,12 @@ das08_attach(struct comedi_device *dev, struct comedi_devconfig *it)
809{ 813{
810 const struct das08_board_struct *thisboard = comedi_board(dev); 814 const struct das08_board_struct *thisboard = comedi_board(dev);
811 struct das08_private_struct *devpriv; 815 struct das08_private_struct *devpriv;
812 int ret;
813 unsigned long iobase; 816 unsigned long iobase;
814 817
815 ret = alloc_private(dev, sizeof(struct das08_private_struct)); 818 devpriv = kzalloc(sizeof(*devpriv), GFP_KERNEL);
816 if (ret < 0) 819 if (!devpriv)
817 return ret; 820 return -ENOMEM;
818 devpriv = dev->private; 821 dev->private = devpriv;
819 822
820 dev_info(dev->class_dev, "attach\n"); 823 dev_info(dev->class_dev, "attach\n");
821 if (is_pci_board(thisboard)) { 824 if (is_pci_board(thisboard)) {
@@ -866,7 +869,7 @@ static struct comedi_driver das08_driver = {
866 .driver_name = DRV_NAME, 869 .driver_name = DRV_NAME,
867 .module = THIS_MODULE, 870 .module = THIS_MODULE,
868 .attach = das08_attach, 871 .attach = das08_attach,
869 .attach_pci = das08_attach_pci, 872 .auto_attach = das08_auto_attach,
870 .detach = das08_detach, 873 .detach = das08_detach,
871 .board_name = &das08_boards[0].name, 874 .board_name = &das08_boards[0].name,
872 .num_names = sizeof(das08_boards) / sizeof(struct das08_board_struct), 875 .num_names = sizeof(das08_boards) / sizeof(struct das08_board_struct),
@@ -876,19 +879,19 @@ static struct comedi_driver das08_driver = {
876 879
877#if DO_PCI 880#if DO_PCI
878static DEFINE_PCI_DEVICE_TABLE(das08_pci_table) = { 881static DEFINE_PCI_DEVICE_TABLE(das08_pci_table) = {
879 { PCI_DEVICE(PCI_VENDOR_ID_COMPUTERBOARDS, PCI_DEVICE_ID_PCIDAS08) }, 882 { PCI_DEVICE(PCI_VENDOR_ID_CB, PCI_DEVICE_ID_PCIDAS08) },
880 {0} 883 {0}
881}; 884};
882 885
883MODULE_DEVICE_TABLE(pci, das08_pci_table); 886MODULE_DEVICE_TABLE(pci, das08_pci_table);
884 887
885static int __devinit das08_pci_probe(struct pci_dev *dev, 888static int das08_pci_probe(struct pci_dev *dev,
886 const struct pci_device_id *ent) 889 const struct pci_device_id *ent)
887{ 890{
888 return comedi_pci_auto_config(dev, &das08_driver); 891 return comedi_pci_auto_config(dev, &das08_driver);
889} 892}
890 893
891static void __devexit das08_pci_remove(struct pci_dev *dev) 894static void das08_pci_remove(struct pci_dev *dev)
892{ 895{
893 comedi_pci_auto_unconfig(dev); 896 comedi_pci_auto_unconfig(dev);
894} 897}
@@ -897,7 +900,7 @@ static struct pci_driver das08_pci_driver = {
897 .id_table = das08_pci_table, 900 .id_table = das08_pci_table,
898 .name = DRV_NAME, 901 .name = DRV_NAME,
899 .probe = &das08_pci_probe, 902 .probe = &das08_pci_probe,
900 .remove = __devexit_p(&das08_pci_remove) 903 .remove = &das08_pci_remove
901}; 904};
902#endif /* DO_PCI */ 905#endif /* DO_PCI */
903 906
diff --git a/drivers/staging/comedi/drivers/das08_cs.c b/drivers/staging/comedi/drivers/das08_cs.c
index e4c91e675379..024262375e3c 100644
--- a/drivers/staging/comedi/drivers/das08_cs.c
+++ b/drivers/staging/comedi/drivers/das08_cs.c
@@ -90,13 +90,14 @@ static int das08_cs_attach(struct comedi_device *dev,
90 struct comedi_devconfig *it) 90 struct comedi_devconfig *it)
91{ 91{
92 const struct das08_board_struct *thisboard = comedi_board(dev); 92 const struct das08_board_struct *thisboard = comedi_board(dev);
93 int ret; 93 struct das08_private_struct *devpriv;
94 unsigned long iobase; 94 unsigned long iobase;
95 struct pcmcia_device *link = cur_dev; /* XXX hack */ 95 struct pcmcia_device *link = cur_dev; /* XXX hack */
96 96
97 ret = alloc_private(dev, sizeof(struct das08_private_struct)); 97 devpriv = kzalloc(sizeof(*devpriv), GFP_KERNEL);
98 if (ret < 0) 98 if (!devpriv)
99 return ret; 99 return -ENOMEM;
100 dev->private = devpriv;
100 101
101 dev_info(dev->class_dev, "das08_cs: attach\n"); 102 dev_info(dev->class_dev, "das08_cs: attach\n");
102 /* deal with a pci board */ 103 /* deal with a pci board */
diff --git a/drivers/staging/comedi/drivers/das16.c b/drivers/staging/comedi/drivers/das16.c
index fcb8a32adb2f..b159f44d694f 100644
--- a/drivers/staging/comedi/drivers/das16.c
+++ b/drivers/staging/comedi/drivers/das16.c
@@ -392,12 +392,12 @@ struct das16_private_struct {
392 volatile short timer_running; 392 volatile short timer_running;
393 volatile short timer_mode; /* true if using timer mode */ 393 volatile short timer_mode; /* true if using timer mode */
394}; 394};
395#define devpriv ((struct das16_private_struct *)(dev->private))
396 395
397static int das16_cmd_test(struct comedi_device *dev, struct comedi_subdevice *s, 396static int das16_cmd_test(struct comedi_device *dev, struct comedi_subdevice *s,
398 struct comedi_cmd *cmd) 397 struct comedi_cmd *cmd)
399{ 398{
400 const struct das16_board *board = comedi_board(dev); 399 const struct das16_board *board = comedi_board(dev);
400 struct das16_private_struct *devpriv = dev->private;
401 int err = 0, tmp; 401 int err = 0, tmp;
402 int gain, start_chan, i; 402 int gain, start_chan, i;
403 int mask; 403 int mask;
@@ -442,46 +442,27 @@ static int das16_cmd_test(struct comedi_device *dev, struct comedi_subdevice *s,
442 if (err) 442 if (err)
443 return 2; 443 return 2;
444 444
445 /* step 3: make sure arguments are trivially compatible */ 445 /* Step 3: check if arguments are trivially valid */
446 if (cmd->start_arg != 0) {
447 cmd->start_arg = 0;
448 err++;
449 }
450 446
451 if (cmd->scan_begin_src == TRIG_FOLLOW) { 447 err |= cfc_check_trigger_arg_is(&cmd->start_arg, 0);
452 /* internal trigger */
453 if (cmd->scan_begin_arg != 0) {
454 cmd->scan_begin_arg = 0;
455 err++;
456 }
457 }
458 448
459 if (cmd->scan_end_arg != cmd->chanlist_len) { 449 if (cmd->scan_begin_src == TRIG_FOLLOW) /* internal trigger */
460 cmd->scan_end_arg = cmd->chanlist_len; 450 err |= cfc_check_trigger_arg_is(&cmd->scan_begin_arg, 0);
461 err++; 451
462 } 452 err |= cfc_check_trigger_arg_is(&cmd->scan_end_arg, cmd->chanlist_len);
463 /* check against maximum frequency */ 453
464 if (cmd->scan_begin_src == TRIG_TIMER) { 454 /* check against maximum frequency */
465 if (cmd->scan_begin_arg < 455 if (cmd->scan_begin_src == TRIG_TIMER)
466 board->ai_speed * cmd->chanlist_len) { 456 err |= cfc_check_trigger_arg_min(&cmd->scan_begin_arg,
467 cmd->scan_begin_arg = 457 board->ai_speed * cmd->chanlist_len);
468 board->ai_speed * cmd->chanlist_len; 458
469 err++; 459 if (cmd->convert_src == TRIG_TIMER)
470 } 460 err |= cfc_check_trigger_arg_min(&cmd->convert_arg,
471 } 461 board->ai_speed);
472 if (cmd->convert_src == TRIG_TIMER) { 462
473 if (cmd->convert_arg < board->ai_speed) { 463 if (cmd->stop_src == TRIG_NONE)
474 cmd->convert_arg = board->ai_speed; 464 err |= cfc_check_trigger_arg_is(&cmd->stop_arg, 0);
475 err++;
476 }
477 }
478 465
479 if (cmd->stop_src == TRIG_NONE) {
480 if (cmd->stop_arg != 0) {
481 cmd->stop_arg = 0;
482 err++;
483 }
484 }
485 if (err) 466 if (err)
486 return 3; 467 return 3;
487 468
@@ -540,6 +521,7 @@ static int das16_cmd_test(struct comedi_device *dev, struct comedi_subdevice *s,
540static unsigned int das16_suggest_transfer_size(struct comedi_device *dev, 521static unsigned int das16_suggest_transfer_size(struct comedi_device *dev,
541 const struct comedi_cmd *cmd) 522 const struct comedi_cmd *cmd)
542{ 523{
524 struct das16_private_struct *devpriv = dev->private;
543 unsigned int size; 525 unsigned int size;
544 unsigned int freq; 526 unsigned int freq;
545 527
@@ -581,6 +563,8 @@ static unsigned int das16_suggest_transfer_size(struct comedi_device *dev,
581static unsigned int das16_set_pacer(struct comedi_device *dev, unsigned int ns, 563static unsigned int das16_set_pacer(struct comedi_device *dev, unsigned int ns,
582 int rounding_flags) 564 int rounding_flags)
583{ 565{
566 struct das16_private_struct *devpriv = dev->private;
567
584 i8253_cascade_ns_to_timer_2div(devpriv->clockbase, &(devpriv->divisor1), 568 i8253_cascade_ns_to_timer_2div(devpriv->clockbase, &(devpriv->divisor1),
585 &(devpriv->divisor2), &ns, 569 &(devpriv->divisor2), &ns,
586 rounding_flags & TRIG_ROUND_MASK); 570 rounding_flags & TRIG_ROUND_MASK);
@@ -595,6 +579,7 @@ static unsigned int das16_set_pacer(struct comedi_device *dev, unsigned int ns,
595static int das16_cmd_exec(struct comedi_device *dev, struct comedi_subdevice *s) 579static int das16_cmd_exec(struct comedi_device *dev, struct comedi_subdevice *s)
596{ 580{
597 const struct das16_board *board = comedi_board(dev); 581 const struct das16_board *board = comedi_board(dev);
582 struct das16_private_struct *devpriv = dev->private;
598 struct comedi_async *async = s->async; 583 struct comedi_async *async = s->async;
599 struct comedi_cmd *cmd = &async->cmd; 584 struct comedi_cmd *cmd = &async->cmd;
600 unsigned int byte; 585 unsigned int byte;
@@ -701,6 +686,7 @@ static int das16_cmd_exec(struct comedi_device *dev, struct comedi_subdevice *s)
701static int das16_cancel(struct comedi_device *dev, struct comedi_subdevice *s) 686static int das16_cancel(struct comedi_device *dev, struct comedi_subdevice *s)
702{ 687{
703 const struct das16_board *board = comedi_board(dev); 688 const struct das16_board *board = comedi_board(dev);
689 struct das16_private_struct *devpriv = dev->private;
704 unsigned long flags; 690 unsigned long flags;
705 691
706 spin_lock_irqsave(&dev->spinlock, flags); 692 spin_lock_irqsave(&dev->spinlock, flags);
@@ -738,6 +724,7 @@ static int das16_ai_rinsn(struct comedi_device *dev, struct comedi_subdevice *s,
738 struct comedi_insn *insn, unsigned int *data) 724 struct comedi_insn *insn, unsigned int *data)
739{ 725{
740 const struct das16_board *board = comedi_board(dev); 726 const struct das16_board *board = comedi_board(dev);
727 struct das16_private_struct *devpriv = dev->private;
741 int i, n; 728 int i, n;
742 int range; 729 int range;
743 int chan; 730 int chan;
@@ -848,10 +835,12 @@ static int das16_ao_winsn(struct comedi_device *dev, struct comedi_subdevice *s,
848*/ 835*/
849static int disable_dma_on_even(struct comedi_device *dev) 836static int disable_dma_on_even(struct comedi_device *dev)
850{ 837{
838 struct das16_private_struct *devpriv = dev->private;
851 int residue; 839 int residue;
852 int i; 840 int i;
853 static const int disable_limit = 100; 841 static const int disable_limit = 100;
854 static const int enable_timeout = 100; 842 static const int enable_timeout = 100;
843
855 disable_dma(devpriv->dma_chan); 844 disable_dma(devpriv->dma_chan);
856 residue = get_dma_residue(devpriv->dma_chan); 845 residue = get_dma_residue(devpriv->dma_chan);
857 for (i = 0; i < disable_limit && (residue % 2); ++i) { 846 for (i = 0; i < disable_limit && (residue % 2); ++i) {
@@ -877,6 +866,7 @@ static int disable_dma_on_even(struct comedi_device *dev)
877static void das16_interrupt(struct comedi_device *dev) 866static void das16_interrupt(struct comedi_device *dev)
878{ 867{
879 const struct das16_board *board = comedi_board(dev); 868 const struct das16_board *board = comedi_board(dev);
869 struct das16_private_struct *devpriv = dev->private;
880 unsigned long dma_flags, spin_flags; 870 unsigned long dma_flags, spin_flags;
881 struct comedi_subdevice *s = dev->read_subdev; 871 struct comedi_subdevice *s = dev->read_subdev;
882 struct comedi_async *async; 872 struct comedi_async *async;
@@ -973,6 +963,7 @@ static irqreturn_t das16_dma_interrupt(int irq, void *d)
973static void das16_timer_interrupt(unsigned long arg) 963static void das16_timer_interrupt(unsigned long arg)
974{ 964{
975 struct comedi_device *dev = (struct comedi_device *)arg; 965 struct comedi_device *dev = (struct comedi_device *)arg;
966 struct das16_private_struct *devpriv = dev->private;
976 967
977 das16_interrupt(dev); 968 das16_interrupt(dev);
978 969
@@ -1001,6 +992,7 @@ static void reg_dump(struct comedi_device *dev)
1001static int das16_probe(struct comedi_device *dev, struct comedi_devconfig *it) 992static int das16_probe(struct comedi_device *dev, struct comedi_devconfig *it)
1002{ 993{
1003 const struct das16_board *board = comedi_board(dev); 994 const struct das16_board *board = comedi_board(dev);
995 struct das16_private_struct *devpriv = dev->private;
1004 int status; 996 int status;
1005 int diobits; 997 int diobits;
1006 998
@@ -1035,6 +1027,7 @@ static int das16_probe(struct comedi_device *dev, struct comedi_devconfig *it)
1035 1027
1036static int das1600_mode_detect(struct comedi_device *dev) 1028static int das1600_mode_detect(struct comedi_device *dev)
1037{ 1029{
1030 struct das16_private_struct *devpriv = dev->private;
1038 int status = 0; 1031 int status = 0;
1039 1032
1040 status = inb(dev->iobase + DAS1600_STATUS_B); 1033 status = inb(dev->iobase + DAS1600_STATUS_B);
@@ -1080,6 +1073,7 @@ static void das16_ai_munge(struct comedi_device *dev,
1080static int das16_attach(struct comedi_device *dev, struct comedi_devconfig *it) 1073static int das16_attach(struct comedi_device *dev, struct comedi_devconfig *it)
1081{ 1074{
1082 const struct das16_board *board = comedi_board(dev); 1075 const struct das16_board *board = comedi_board(dev);
1076 struct das16_private_struct *devpriv;
1083 struct comedi_subdevice *s; 1077 struct comedi_subdevice *s;
1084 int ret; 1078 int ret;
1085 unsigned int irq; 1079 unsigned int irq;
@@ -1114,9 +1108,10 @@ static int das16_attach(struct comedi_device *dev, struct comedi_devconfig *it)
1114 } 1108 }
1115 } 1109 }
1116 1110
1117 ret = alloc_private(dev, sizeof(struct das16_private_struct)); 1111 devpriv = kzalloc(sizeof(*devpriv), GFP_KERNEL);
1118 if (ret < 0) 1112 if (!devpriv)
1119 return ret; 1113 return -ENOMEM;
1114 dev->private = devpriv;
1120 1115
1121 if (board->size < 0x400) { 1116 if (board->size < 0x400) {
1122 printk(" 0x%04lx-0x%04lx\n", iobase, iobase + board->size); 1117 printk(" 0x%04lx-0x%04lx\n", iobase, iobase + board->size);
@@ -1353,6 +1348,7 @@ static int das16_attach(struct comedi_device *dev, struct comedi_devconfig *it)
1353static void das16_detach(struct comedi_device *dev) 1348static void das16_detach(struct comedi_device *dev)
1354{ 1349{
1355 const struct das16_board *board = comedi_board(dev); 1350 const struct das16_board *board = comedi_board(dev);
1351 struct das16_private_struct *devpriv = dev->private;
1356 1352
1357 das16_reset(dev); 1353 das16_reset(dev);
1358 if (dev->subdevices) 1354 if (dev->subdevices)
diff --git a/drivers/staging/comedi/drivers/das16m1.c b/drivers/staging/comedi/drivers/das16m1.c
index 3f87d7598e5b..b0a861a779bd 100644
--- a/drivers/staging/comedi/drivers/das16m1.c
+++ b/drivers/staging/comedi/drivers/das16m1.c
@@ -28,7 +28,7 @@
28Driver: das16m1 28Driver: das16m1
29Description: CIO-DAS16/M1 29Description: CIO-DAS16/M1
30Author: Frank Mori Hess <fmhess@users.sourceforge.net> 30Author: Frank Mori Hess <fmhess@users.sourceforge.net>
31Devices: [Measurement Computing] CIO-DAS16/M1 (cio-das16/m1) 31Devices: [Measurement Computing] CIO-DAS16/M1 (das16m1)
32Status: works 32Status: works
33 33
34This driver supports a single board - the CIO-DAS16/M1. 34This driver supports a single board - the CIO-DAS16/M1.
@@ -132,11 +132,6 @@ static const struct comedi_lrange range_das16m1 = { 9,
132 } 132 }
133}; 133};
134 134
135struct das16m1_board {
136 const char *name;
137 unsigned int ai_speed;
138};
139
140struct das16m1_private_struct { 135struct das16m1_private_struct {
141 unsigned int control_state; 136 unsigned int control_state;
142 volatile unsigned int adc_count; /* number of samples completed */ 137 volatile unsigned int adc_count; /* number of samples completed */
@@ -149,7 +144,6 @@ struct das16m1_private_struct {
149 unsigned int divisor1; /* divides master clock to obtain conversion speed */ 144 unsigned int divisor1; /* divides master clock to obtain conversion speed */
150 unsigned int divisor2; /* divides master clock to obtain conversion speed */ 145 unsigned int divisor2; /* divides master clock to obtain conversion speed */
151}; 146};
152#define devpriv ((struct das16m1_private_struct *)(dev->private))
153 147
154static inline short munge_sample(short data) 148static inline short munge_sample(short data)
155{ 149{
@@ -167,7 +161,7 @@ static void munge_sample_array(short *array, unsigned int num_elements)
167static int das16m1_cmd_test(struct comedi_device *dev, 161static int das16m1_cmd_test(struct comedi_device *dev,
168 struct comedi_subdevice *s, struct comedi_cmd *cmd) 162 struct comedi_subdevice *s, struct comedi_cmd *cmd)
169{ 163{
170 const struct das16m1_board *board = comedi_board(dev); 164 struct das16m1_private_struct *devpriv = dev->private;
171 unsigned int err = 0, tmp, i; 165 unsigned int err = 0, tmp, i;
172 166
173 /* Step 1 : check if triggers are trivially valid */ 167 /* Step 1 : check if triggers are trivially valid */
@@ -192,40 +186,23 @@ static int das16m1_cmd_test(struct comedi_device *dev,
192 if (err) 186 if (err)
193 return 2; 187 return 2;
194 188
195 /* step 3: make sure arguments are trivially compatible */ 189 /* Step 3: check if arguments are trivially valid */
196 if (cmd->start_arg != 0) {
197 cmd->start_arg = 0;
198 err++;
199 }
200 190
201 if (cmd->scan_begin_src == TRIG_FOLLOW) { 191 err |= cfc_check_trigger_arg_is(&cmd->start_arg, 0);
202 /* internal trigger */
203 if (cmd->scan_begin_arg != 0) {
204 cmd->scan_begin_arg = 0;
205 err++;
206 }
207 }
208 192
209 if (cmd->convert_src == TRIG_TIMER) { 193 if (cmd->scan_begin_src == TRIG_FOLLOW) /* internal trigger */
210 if (cmd->convert_arg < board->ai_speed) { 194 err |= cfc_check_trigger_arg_is(&cmd->scan_begin_arg, 0);
211 cmd->convert_arg = board->ai_speed;
212 err++;
213 }
214 }
215 195
216 if (cmd->scan_end_arg != cmd->chanlist_len) { 196 if (cmd->convert_src == TRIG_TIMER)
217 cmd->scan_end_arg = cmd->chanlist_len; 197 err |= cfc_check_trigger_arg_min(&cmd->convert_arg, 1000);
218 err++; 198
219 } 199 err |= cfc_check_trigger_arg_is(&cmd->scan_end_arg, cmd->chanlist_len);
220 200
221 if (cmd->stop_src == TRIG_COUNT) { 201 if (cmd->stop_src == TRIG_COUNT) {
222 /* any count is allowed */ 202 /* any count is allowed */
223 } else { 203 } else {
224 /* TRIG_NONE */ 204 /* TRIG_NONE */
225 if (cmd->stop_arg != 0) { 205 err |= cfc_check_trigger_arg_is(&cmd->stop_arg, 0);
226 cmd->stop_arg = 0;
227 err++;
228 }
229 } 206 }
230 207
231 if (err) 208 if (err)
@@ -277,6 +254,8 @@ static int das16m1_cmd_test(struct comedi_device *dev,
277static unsigned int das16m1_set_pacer(struct comedi_device *dev, 254static unsigned int das16m1_set_pacer(struct comedi_device *dev,
278 unsigned int ns, int rounding_flags) 255 unsigned int ns, int rounding_flags)
279{ 256{
257 struct das16m1_private_struct *devpriv = dev->private;
258
280 i8253_cascade_ns_to_timer_2div(DAS16M1_XTAL, &(devpriv->divisor1), 259 i8253_cascade_ns_to_timer_2div(DAS16M1_XTAL, &(devpriv->divisor1),
281 &(devpriv->divisor2), &ns, 260 &(devpriv->divisor2), &ns,
282 rounding_flags & TRIG_ROUND_MASK); 261 rounding_flags & TRIG_ROUND_MASK);
@@ -293,6 +272,7 @@ static unsigned int das16m1_set_pacer(struct comedi_device *dev,
293static int das16m1_cmd_exec(struct comedi_device *dev, 272static int das16m1_cmd_exec(struct comedi_device *dev,
294 struct comedi_subdevice *s) 273 struct comedi_subdevice *s)
295{ 274{
275 struct das16m1_private_struct *devpriv = dev->private;
296 struct comedi_async *async = s->async; 276 struct comedi_async *async = s->async;
297 struct comedi_cmd *cmd = &async->cmd; 277 struct comedi_cmd *cmd = &async->cmd;
298 unsigned int byte, i; 278 unsigned int byte, i;
@@ -356,6 +336,8 @@ static int das16m1_cmd_exec(struct comedi_device *dev,
356 336
357static int das16m1_cancel(struct comedi_device *dev, struct comedi_subdevice *s) 337static int das16m1_cancel(struct comedi_device *dev, struct comedi_subdevice *s)
358{ 338{
339 struct das16m1_private_struct *devpriv = dev->private;
340
359 devpriv->control_state &= ~INTE & ~PACER_MASK; 341 devpriv->control_state &= ~INTE & ~PACER_MASK;
360 outb(devpriv->control_state, dev->iobase + DAS16M1_INTR_CONTROL); 342 outb(devpriv->control_state, dev->iobase + DAS16M1_INTR_CONTROL);
361 343
@@ -366,6 +348,7 @@ static int das16m1_ai_rinsn(struct comedi_device *dev,
366 struct comedi_subdevice *s, 348 struct comedi_subdevice *s,
367 struct comedi_insn *insn, unsigned int *data) 349 struct comedi_insn *insn, unsigned int *data)
368{ 350{
351 struct das16m1_private_struct *devpriv = dev->private;
369 int i, n; 352 int i, n;
370 int byte; 353 int byte;
371 const int timeout = 1000; 354 const int timeout = 1000;
@@ -417,6 +400,7 @@ static int das16m1_do_wbits(struct comedi_device *dev,
417 struct comedi_subdevice *s, 400 struct comedi_subdevice *s,
418 struct comedi_insn *insn, unsigned int *data) 401 struct comedi_insn *insn, unsigned int *data)
419{ 402{
403 struct das16m1_private_struct *devpriv = dev->private;
420 unsigned int wbits; 404 unsigned int wbits;
421 405
422 /* only set bits that have been masked */ 406 /* only set bits that have been masked */
@@ -436,6 +420,7 @@ static int das16m1_do_wbits(struct comedi_device *dev,
436 420
437static void das16m1_handler(struct comedi_device *dev, unsigned int status) 421static void das16m1_handler(struct comedi_device *dev, unsigned int status)
438{ 422{
423 struct das16m1_private_struct *devpriv = dev->private;
439 struct comedi_subdevice *s; 424 struct comedi_subdevice *s;
440 struct comedi_async *async; 425 struct comedi_async *async;
441 struct comedi_cmd *cmd; 426 struct comedi_cmd *cmd;
@@ -582,26 +567,27 @@ static int das16m1_irq_bits(unsigned int irq)
582static int das16m1_attach(struct comedi_device *dev, 567static int das16m1_attach(struct comedi_device *dev,
583 struct comedi_devconfig *it) 568 struct comedi_devconfig *it)
584{ 569{
585 const struct das16m1_board *board = comedi_board(dev); 570 struct das16m1_private_struct *devpriv;
586 struct comedi_subdevice *s; 571 struct comedi_subdevice *s;
587 int ret; 572 int ret;
588 unsigned int irq; 573 unsigned int irq;
589 unsigned long iobase; 574 unsigned long iobase;
590 575
591 iobase = it->options[0]; 576 dev->board_name = dev->driver->driver_name;
592 577
593 ret = alloc_private(dev, sizeof(struct das16m1_private_struct)); 578 iobase = it->options[0];
594 if (ret < 0)
595 return ret;
596 579
597 dev->board_name = board->name; 580 devpriv = kzalloc(sizeof(*devpriv), GFP_KERNEL);
581 if (!devpriv)
582 return -ENOMEM;
583 dev->private = devpriv;
598 584
599 if (!request_region(iobase, DAS16M1_SIZE, dev->driver->driver_name)) { 585 if (!request_region(iobase, DAS16M1_SIZE, dev->board_name)) {
600 comedi_error(dev, "I/O port conflict\n"); 586 comedi_error(dev, "I/O port conflict\n");
601 return -EIO; 587 return -EIO;
602 } 588 }
603 if (!request_region(iobase + DAS16M1_82C55, DAS16M1_SIZE2, 589 if (!request_region(iobase + DAS16M1_82C55, DAS16M1_SIZE2,
604 dev->driver->driver_name)) { 590 dev->board_name)) {
605 release_region(iobase, DAS16M1_SIZE); 591 release_region(iobase, DAS16M1_SIZE);
606 comedi_error(dev, "I/O port conflict\n"); 592 comedi_error(dev, "I/O port conflict\n");
607 return -EIO; 593 return -EIO;
@@ -698,21 +684,11 @@ static void das16m1_detach(struct comedi_device *dev)
698 } 684 }
699} 685}
700 686
701static const struct das16m1_board das16m1_boards[] = {
702 {
703 .name = "cio-das16/m1", /* CIO-DAS16_M1.pdf */
704 .ai_speed = 1000, /* 1MHz max speed */
705 },
706};
707
708static struct comedi_driver das16m1_driver = { 687static struct comedi_driver das16m1_driver = {
709 .driver_name = "das16m1", 688 .driver_name = "das16m1",
710 .module = THIS_MODULE, 689 .module = THIS_MODULE,
711 .attach = das16m1_attach, 690 .attach = das16m1_attach,
712 .detach = das16m1_detach, 691 .detach = das16m1_detach,
713 .board_name = &das16m1_boards[0].name,
714 .num_names = ARRAY_SIZE(das16m1_boards),
715 .offset = sizeof(das16m1_boards[0]),
716}; 692};
717module_comedi_driver(das16m1_driver); 693module_comedi_driver(das16m1_driver);
718 694
diff --git a/drivers/staging/comedi/drivers/das1800.c b/drivers/staging/comedi/drivers/das1800.c
index 2555f3297d7b..7900f959555d 100644
--- a/drivers/staging/comedi/drivers/das1800.c
+++ b/drivers/staging/comedi/drivers/das1800.c
@@ -454,8 +454,6 @@ struct das1800_private {
454 short ao_update_bits; /* remembers the last write to the 'update' dac */ 454 short ao_update_bits; /* remembers the last write to the 'update' dac */
455}; 455};
456 456
457#define devpriv ((struct das1800_private *)dev->private)
458
459/* analog out range for boards with basic analog out */ 457/* analog out range for boards with basic analog out */
460static const struct comedi_lrange range_ao_1 = { 458static const struct comedi_lrange range_ao_1 = {
461 1, 459 1,
@@ -501,6 +499,7 @@ static void munge_data(struct comedi_device *dev, uint16_t * array,
501static void das1800_handle_fifo_half_full(struct comedi_device *dev, 499static void das1800_handle_fifo_half_full(struct comedi_device *dev,
502 struct comedi_subdevice *s) 500 struct comedi_subdevice *s)
503{ 501{
502 struct das1800_private *devpriv = dev->private;
504 int numPoints = 0; /* number of points to read */ 503 int numPoints = 0; /* number of points to read */
505 struct comedi_cmd *cmd = &s->async->cmd; 504 struct comedi_cmd *cmd = &s->async->cmd;
506 505
@@ -520,6 +519,7 @@ static void das1800_handle_fifo_half_full(struct comedi_device *dev,
520static void das1800_handle_fifo_not_empty(struct comedi_device *dev, 519static void das1800_handle_fifo_not_empty(struct comedi_device *dev,
521 struct comedi_subdevice *s) 520 struct comedi_subdevice *s)
522{ 521{
522 struct das1800_private *devpriv = dev->private;
523 short dpnt; 523 short dpnt;
524 int unipolar; 524 int unipolar;
525 struct comedi_cmd *cmd = &s->async->cmd; 525 struct comedi_cmd *cmd = &s->async->cmd;
@@ -548,6 +548,7 @@ static void das1800_flush_dma_channel(struct comedi_device *dev,
548 struct comedi_subdevice *s, 548 struct comedi_subdevice *s,
549 unsigned int channel, uint16_t *buffer) 549 unsigned int channel, uint16_t *buffer)
550{ 550{
551 struct das1800_private *devpriv = dev->private;
551 unsigned int num_bytes, num_samples; 552 unsigned int num_bytes, num_samples;
552 struct comedi_cmd *cmd = &s->async->cmd; 553 struct comedi_cmd *cmd = &s->async->cmd;
553 554
@@ -578,6 +579,7 @@ static void das1800_flush_dma_channel(struct comedi_device *dev,
578static void das1800_flush_dma(struct comedi_device *dev, 579static void das1800_flush_dma(struct comedi_device *dev,
579 struct comedi_subdevice *s) 580 struct comedi_subdevice *s)
580{ 581{
582 struct das1800_private *devpriv = dev->private;
581 unsigned long flags; 583 unsigned long flags;
582 const int dual_dma = devpriv->irq_dma_bits & DMA_DUAL; 584 const int dual_dma = devpriv->irq_dma_bits & DMA_DUAL;
583 585
@@ -609,6 +611,7 @@ static void das1800_flush_dma(struct comedi_device *dev,
609static void das1800_handle_dma(struct comedi_device *dev, 611static void das1800_handle_dma(struct comedi_device *dev,
610 struct comedi_subdevice *s, unsigned int status) 612 struct comedi_subdevice *s, unsigned int status)
611{ 613{
614 struct das1800_private *devpriv = dev->private;
612 unsigned long flags; 615 unsigned long flags;
613 const int dual_dma = devpriv->irq_dma_bits & DMA_DUAL; 616 const int dual_dma = devpriv->irq_dma_bits & DMA_DUAL;
614 617
@@ -643,6 +646,8 @@ static void das1800_handle_dma(struct comedi_device *dev,
643 646
644static int das1800_cancel(struct comedi_device *dev, struct comedi_subdevice *s) 647static int das1800_cancel(struct comedi_device *dev, struct comedi_subdevice *s)
645{ 648{
649 struct das1800_private *devpriv = dev->private;
650
646 outb(0x0, dev->iobase + DAS1800_STATUS); /* disable conversions */ 651 outb(0x0, dev->iobase + DAS1800_STATUS); /* disable conversions */
647 outb(0x0, dev->iobase + DAS1800_CONTROL_B); /* disable interrupts and dma */ 652 outb(0x0, dev->iobase + DAS1800_CONTROL_B); /* disable interrupts and dma */
648 outb(0x0, dev->iobase + DAS1800_CONTROL_A); /* disable and clear fifo and stop triggering */ 653 outb(0x0, dev->iobase + DAS1800_CONTROL_A); /* disable and clear fifo and stop triggering */
@@ -656,6 +661,7 @@ static int das1800_cancel(struct comedi_device *dev, struct comedi_subdevice *s)
656/* the guts of the interrupt handler, that is shared with das1800_ai_poll */ 661/* the guts of the interrupt handler, that is shared with das1800_ai_poll */
657static void das1800_ai_handler(struct comedi_device *dev) 662static void das1800_ai_handler(struct comedi_device *dev)
658{ 663{
664 struct das1800_private *devpriv = dev->private;
659 struct comedi_subdevice *s = &dev->subdevices[0]; 665 struct comedi_subdevice *s = &dev->subdevices[0];
660 struct comedi_async *async = s->async; 666 struct comedi_async *async = s->async;
661 struct comedi_cmd *cmd = &async->cmd; 667 struct comedi_cmd *cmd = &async->cmd;
@@ -783,6 +789,7 @@ static int das1800_ai_do_cmdtest(struct comedi_device *dev,
783 struct comedi_subdevice *s, 789 struct comedi_subdevice *s,
784 struct comedi_cmd *cmd) 790 struct comedi_cmd *cmd)
785{ 791{
792 struct das1800_private *devpriv = dev->private;
786 int err = 0; 793 int err = 0;
787 unsigned int tmp_arg; 794 unsigned int tmp_arg;
788 int i; 795 int i;
@@ -817,39 +824,23 @@ static int das1800_ai_do_cmdtest(struct comedi_device *dev,
817 if (err) 824 if (err)
818 return 2; 825 return 2;
819 826
820 /* step 3: make sure arguments are trivially compatible */ 827 /* Step 3: check if arguments are trivially valid */
821 828
822 if (cmd->start_arg != 0) { 829 err |= cfc_check_trigger_arg_is(&cmd->start_arg, 0);
823 cmd->start_arg = 0; 830
824 err++; 831 if (cmd->convert_src == TRIG_TIMER)
825 } 832 err |= cfc_check_trigger_arg_min(&cmd->convert_arg,
826 if (cmd->convert_src == TRIG_TIMER) { 833 thisboard->ai_speed);
827 if (cmd->convert_arg < thisboard->ai_speed) { 834
828 cmd->convert_arg = thisboard->ai_speed; 835 err |= cfc_check_trigger_arg_min(&cmd->chanlist_len, 1);
829 err++; 836 err |= cfc_check_trigger_arg_is(&cmd->scan_end_arg, cmd->chanlist_len);
830 }
831 }
832 if (!cmd->chanlist_len) {
833 cmd->chanlist_len = 1;
834 err++;
835 }
836 if (cmd->scan_end_arg != cmd->chanlist_len) {
837 cmd->scan_end_arg = cmd->chanlist_len;
838 err++;
839 }
840 837
841 switch (cmd->stop_src) { 838 switch (cmd->stop_src) {
842 case TRIG_COUNT: 839 case TRIG_COUNT:
843 if (!cmd->stop_arg) { 840 err |= cfc_check_trigger_arg_min(&cmd->stop_arg, 1);
844 cmd->stop_arg = 1;
845 err++;
846 }
847 break; 841 break;
848 case TRIG_NONE: 842 case TRIG_NONE:
849 if (cmd->stop_arg != 0) { 843 err |= cfc_check_trigger_arg_is(&cmd->stop_arg, 0);
850 cmd->stop_arg = 0;
851 err++;
852 }
853 break; 844 break;
854 default: 845 default:
855 break; 846 break;
@@ -1006,6 +997,7 @@ static int control_c_bits(const struct comedi_cmd *cmd)
1006/* loads counters with divisor1, divisor2 from private structure */ 997/* loads counters with divisor1, divisor2 from private structure */
1007static int das1800_set_frequency(struct comedi_device *dev) 998static int das1800_set_frequency(struct comedi_device *dev)
1008{ 999{
1000 struct das1800_private *devpriv = dev->private;
1009 int err = 0; 1001 int err = 0;
1010 1002
1011 /* counter 1, mode 2 */ 1003 /* counter 1, mode 2 */
@@ -1026,6 +1018,7 @@ static int das1800_set_frequency(struct comedi_device *dev)
1026static int setup_counters(struct comedi_device *dev, 1018static int setup_counters(struct comedi_device *dev,
1027 const struct comedi_cmd *cmd) 1019 const struct comedi_cmd *cmd)
1028{ 1020{
1021 struct das1800_private *devpriv = dev->private;
1029 unsigned int period; 1022 unsigned int period;
1030 1023
1031 /* setup cascaded counters for conversion/scan frequency */ 1024 /* setup cascaded counters for conversion/scan frequency */
@@ -1107,6 +1100,7 @@ static unsigned int suggest_transfer_size(const struct comedi_cmd *cmd)
1107/* sets up dma */ 1100/* sets up dma */
1108static void setup_dma(struct comedi_device *dev, const struct comedi_cmd *cmd) 1101static void setup_dma(struct comedi_device *dev, const struct comedi_cmd *cmd)
1109{ 1102{
1103 struct das1800_private *devpriv = dev->private;
1110 unsigned long lock_flags; 1104 unsigned long lock_flags;
1111 const int dual_dma = devpriv->irq_dma_bits & DMA_DUAL; 1105 const int dual_dma = devpriv->irq_dma_bits & DMA_DUAL;
1112 1106
@@ -1174,6 +1168,7 @@ static void program_chanlist(struct comedi_device *dev,
1174static int das1800_ai_do_cmd(struct comedi_device *dev, 1168static int das1800_ai_do_cmd(struct comedi_device *dev,
1175 struct comedi_subdevice *s) 1169 struct comedi_subdevice *s)
1176{ 1170{
1171 struct das1800_private *devpriv = dev->private;
1177 int ret; 1172 int ret;
1178 int control_a, control_c; 1173 int control_a, control_c;
1179 struct comedi_async *async = s->async; 1174 struct comedi_async *async = s->async;
@@ -1300,6 +1295,7 @@ static int das1800_ao_winsn(struct comedi_device *dev,
1300 struct comedi_subdevice *s, 1295 struct comedi_subdevice *s,
1301 struct comedi_insn *insn, unsigned int *data) 1296 struct comedi_insn *insn, unsigned int *data)
1302{ 1297{
1298 struct das1800_private *devpriv = dev->private;
1303 int chan = CR_CHAN(insn->chanspec); 1299 int chan = CR_CHAN(insn->chanspec);
1304/* int range = CR_RANGE(insn->chanspec); */ 1300/* int range = CR_RANGE(insn->chanspec); */
1305 int update_chan = thisboard->ao_n_chan - 1; 1301 int update_chan = thisboard->ao_n_chan - 1;
@@ -1342,6 +1338,7 @@ static int das1800_do_wbits(struct comedi_device *dev,
1342 struct comedi_subdevice *s, 1338 struct comedi_subdevice *s,
1343 struct comedi_insn *insn, unsigned int *data) 1339 struct comedi_insn *insn, unsigned int *data)
1344{ 1340{
1341 struct das1800_private *devpriv = dev->private;
1345 unsigned int wbits; 1342 unsigned int wbits;
1346 1343
1347 /* only set bits that have been masked */ 1344 /* only set bits that have been masked */
@@ -1361,6 +1358,7 @@ static int das1800_do_wbits(struct comedi_device *dev,
1361static int das1800_init_dma(struct comedi_device *dev, unsigned int dma0, 1358static int das1800_init_dma(struct comedi_device *dev, unsigned int dma0,
1362 unsigned int dma1) 1359 unsigned int dma1)
1363{ 1360{
1361 struct das1800_private *devpriv = dev->private;
1364 unsigned long flags; 1362 unsigned long flags;
1365 1363
1366 /* need an irq to do dma */ 1364 /* need an irq to do dma */
@@ -1518,6 +1516,7 @@ static int das1800_probe(struct comedi_device *dev)
1518static int das1800_attach(struct comedi_device *dev, 1516static int das1800_attach(struct comedi_device *dev,
1519 struct comedi_devconfig *it) 1517 struct comedi_devconfig *it)
1520{ 1518{
1519 struct das1800_private *devpriv;
1521 struct comedi_subdevice *s; 1520 struct comedi_subdevice *s;
1522 unsigned long iobase = it->options[0]; 1521 unsigned long iobase = it->options[0];
1523 unsigned int irq = it->options[1]; 1522 unsigned int irq = it->options[1];
@@ -1527,9 +1526,10 @@ static int das1800_attach(struct comedi_device *dev,
1527 int board; 1526 int board;
1528 int retval; 1527 int retval;
1529 1528
1530 /* allocate and initialize dev->private */ 1529 devpriv = kzalloc(sizeof(*devpriv), GFP_KERNEL);
1531 if (alloc_private(dev, sizeof(struct das1800_private)) < 0) 1530 if (!devpriv)
1532 return -ENOMEM; 1531 return -ENOMEM;
1532 dev->private = devpriv;
1533 1533
1534 printk(KERN_DEBUG "comedi%d: %s: io 0x%lx", dev->minor, 1534 printk(KERN_DEBUG "comedi%d: %s: io 0x%lx", dev->minor,
1535 dev->driver->driver_name, iobase); 1535 dev->driver->driver_name, iobase);
@@ -1699,11 +1699,13 @@ static int das1800_attach(struct comedi_device *dev,
1699 1699
1700static void das1800_detach(struct comedi_device *dev) 1700static void das1800_detach(struct comedi_device *dev)
1701{ 1701{
1702 struct das1800_private *devpriv = dev->private;
1703
1702 if (dev->iobase) 1704 if (dev->iobase)
1703 release_region(dev->iobase, DAS1800_SIZE); 1705 release_region(dev->iobase, DAS1800_SIZE);
1704 if (dev->irq) 1706 if (dev->irq)
1705 free_irq(dev->irq, dev); 1707 free_irq(dev->irq, dev);
1706 if (dev->private) { 1708 if (devpriv) {
1707 if (devpriv->iobase2) 1709 if (devpriv->iobase2)
1708 release_region(devpriv->iobase2, DAS1800_SIZE); 1710 release_region(devpriv->iobase2, DAS1800_SIZE);
1709 if (devpriv->dma0) 1711 if (devpriv->dma0)
diff --git a/drivers/staging/comedi/drivers/das6402.c b/drivers/staging/comedi/drivers/das6402.c
index e134c46dedff..2efddb89bbcb 100644
--- a/drivers/staging/comedi/drivers/das6402.c
+++ b/drivers/staging/comedi/drivers/das6402.c
@@ -104,7 +104,6 @@ struct das6402_private {
104 104
105 int das6402_ignoreirq; 105 int das6402_ignoreirq;
106}; 106};
107#define devpriv ((struct das6402_private *)dev->private)
108 107
109static void das6402_ai_fifo_dregs(struct comedi_device *dev, 108static void das6402_ai_fifo_dregs(struct comedi_device *dev,
110 struct comedi_subdevice *s) 109 struct comedi_subdevice *s)
@@ -152,6 +151,7 @@ static void das6402_setcounter(struct comedi_device *dev)
152static irqreturn_t intr_handler(int irq, void *d) 151static irqreturn_t intr_handler(int irq, void *d)
153{ 152{
154 struct comedi_device *dev = d; 153 struct comedi_device *dev = d;
154 struct das6402_private *devpriv = dev->private;
155 struct comedi_subdevice *s = &dev->subdevices[0]; 155 struct comedi_subdevice *s = &dev->subdevices[0];
156 156
157 if (!dev->attached || devpriv->das6402_ignoreirq) { 157 if (!dev->attached || devpriv->das6402_ignoreirq) {
@@ -196,6 +196,8 @@ static void das6402_ai_fifo_read(struct comedi_device *dev, short *data, int n)
196static int das6402_ai_cancel(struct comedi_device *dev, 196static int das6402_ai_cancel(struct comedi_device *dev,
197 struct comedi_subdevice *s) 197 struct comedi_subdevice *s)
198{ 198{
199 struct das6402_private *devpriv = dev->private;
200
199 /* 201 /*
200 * This function should reset the board from whatever condition it 202 * This function should reset the board from whatever condition it
201 * is in (i.e., acquiring data), to a non-active state. 203 * is in (i.e., acquiring data), to a non-active state.
@@ -217,6 +219,8 @@ static int das6402_ai_cancel(struct comedi_device *dev,
217static int das6402_ai_mode2(struct comedi_device *dev, 219static int das6402_ai_mode2(struct comedi_device *dev,
218 struct comedi_subdevice *s, comedi_trig * it) 220 struct comedi_subdevice *s, comedi_trig * it)
219{ 221{
222 struct das6402_private *devpriv = dev->private;
223
220 devpriv->das6402_ignoreirq = 1; 224 devpriv->das6402_ignoreirq = 1;
221 dev_dbg(dev->class_dev, "Starting acquisition\n"); 225 dev_dbg(dev->class_dev, "Starting acquisition\n");
222 outb_p(0x03, dev->iobase + 10); /* enable external trigging */ 226 outb_p(0x03, dev->iobase + 10); /* enable external trigging */
@@ -236,6 +240,7 @@ static int das6402_ai_mode2(struct comedi_device *dev,
236 240
237static int board_init(struct comedi_device *dev) 241static int board_init(struct comedi_device *dev)
238{ 242{
243 struct das6402_private *devpriv = dev->private;
239 BYTE b; 244 BYTE b;
240 245
241 devpriv->das6402_ignoreirq = 1; 246 devpriv->das6402_ignoreirq = 1;
@@ -277,6 +282,7 @@ static int board_init(struct comedi_device *dev)
277static int das6402_attach(struct comedi_device *dev, 282static int das6402_attach(struct comedi_device *dev,
278 struct comedi_devconfig *it) 283 struct comedi_devconfig *it)
279{ 284{
285 struct das6402_private *devpriv;
280 unsigned int irq; 286 unsigned int irq;
281 unsigned long iobase; 287 unsigned long iobase;
282 int ret; 288 int ret;
@@ -303,9 +309,11 @@ static int das6402_attach(struct comedi_device *dev,
303 return ret; 309 return ret;
304 310
305 dev->irq = irq; 311 dev->irq = irq;
306 ret = alloc_private(dev, sizeof(struct das6402_private)); 312
307 if (ret < 0) 313 devpriv = kzalloc(sizeof(*devpriv), GFP_KERNEL);
308 return ret; 314 if (!devpriv)
315 return -ENOMEM;
316 dev->private = devpriv;
309 317
310 ret = comedi_alloc_subdevices(dev, 1); 318 ret = comedi_alloc_subdevices(dev, 1);
311 if (ret) 319 if (ret)
diff --git a/drivers/staging/comedi/drivers/das800.c b/drivers/staging/comedi/drivers/das800.c
index 215deac0a396..38f625be812a 100644
--- a/drivers/staging/comedi/drivers/das800.c
+++ b/drivers/staging/comedi/drivers/das800.c
@@ -241,8 +241,6 @@ struct das800_private {
241 volatile int do_bits; /* digital output bits */ 241 volatile int do_bits; /* digital output bits */
242}; 242};
243 243
244#define devpriv ((struct das800_private *)dev->private)
245
246static int das800_attach(struct comedi_device *dev, 244static int das800_attach(struct comedi_device *dev,
247 struct comedi_devconfig *it); 245 struct comedi_devconfig *it);
248static void das800_detach(struct comedi_device *dev); 246static void das800_detach(struct comedi_device *dev);
@@ -344,22 +342,7 @@ static int das800_probe(struct comedi_device *dev)
344 return -1; 342 return -1;
345} 343}
346 344
347/* 345module_comedi_driver(driver_das800);
348 * A convenient macro that defines init_module() and cleanup_module(),
349 * as necessary.
350 */
351static int __init driver_das800_init_module(void)
352{
353 return comedi_driver_register(&driver_das800);
354}
355
356static void __exit driver_das800_cleanup_module(void)
357{
358 comedi_driver_unregister(&driver_das800);
359}
360
361module_init(driver_das800_init_module);
362module_exit(driver_das800_cleanup_module);
363 346
364/* interrupt service routine */ 347/* interrupt service routine */
365static irqreturn_t das800_interrupt(int irq, void *d) 348static irqreturn_t das800_interrupt(int irq, void *d)
@@ -367,6 +350,7 @@ static irqreturn_t das800_interrupt(int irq, void *d)
367 short i; /* loop index */ 350 short i; /* loop index */
368 short dataPoint = 0; 351 short dataPoint = 0;
369 struct comedi_device *dev = d; 352 struct comedi_device *dev = d;
353 struct das800_private *devpriv = dev->private;
370 struct comedi_subdevice *s = dev->read_subdev; /* analog input subdevice */ 354 struct comedi_subdevice *s = dev->read_subdev; /* analog input subdevice */
371 struct comedi_async *async; 355 struct comedi_async *async;
372 int status; 356 int status;
@@ -461,6 +445,7 @@ static irqreturn_t das800_interrupt(int irq, void *d)
461 445
462static int das800_attach(struct comedi_device *dev, struct comedi_devconfig *it) 446static int das800_attach(struct comedi_device *dev, struct comedi_devconfig *it)
463{ 447{
448 struct das800_private *devpriv;
464 struct comedi_subdevice *s; 449 struct comedi_subdevice *s;
465 unsigned long iobase = it->options[0]; 450 unsigned long iobase = it->options[0];
466 unsigned int irq = it->options[1]; 451 unsigned int irq = it->options[1];
@@ -472,9 +457,10 @@ static int das800_attach(struct comedi_device *dev, struct comedi_devconfig *it)
472 if (irq) 457 if (irq)
473 dev_dbg(dev->class_dev, "irq %u\n", irq); 458 dev_dbg(dev->class_dev, "irq %u\n", irq);
474 459
475 /* allocate and initialize dev->private */ 460 devpriv = kzalloc(sizeof(*devpriv), GFP_KERNEL);
476 if (alloc_private(dev, sizeof(struct das800_private)) < 0) 461 if (!devpriv)
477 return -ENOMEM; 462 return -ENOMEM;
463 dev->private = devpriv;
478 464
479 if (iobase == 0) { 465 if (iobase == 0) {
480 dev_err(dev->class_dev, 466 dev_err(dev->class_dev,
@@ -569,6 +555,8 @@ static void das800_detach(struct comedi_device *dev)
569 555
570static int das800_cancel(struct comedi_device *dev, struct comedi_subdevice *s) 556static int das800_cancel(struct comedi_device *dev, struct comedi_subdevice *s)
571{ 557{
558 struct das800_private *devpriv = dev->private;
559
572 devpriv->forever = 0; 560 devpriv->forever = 0;
573 devpriv->count = 0; 561 devpriv->count = 0;
574 disable_das800(dev); 562 disable_das800(dev);
@@ -578,7 +566,9 @@ static int das800_cancel(struct comedi_device *dev, struct comedi_subdevice *s)
578/* enable_das800 makes the card start taking hardware triggered conversions */ 566/* enable_das800 makes the card start taking hardware triggered conversions */
579static void enable_das800(struct comedi_device *dev) 567static void enable_das800(struct comedi_device *dev)
580{ 568{
569 struct das800_private *devpriv = dev->private;
581 unsigned long irq_flags; 570 unsigned long irq_flags;
571
582 spin_lock_irqsave(&dev->spinlock, irq_flags); 572 spin_lock_irqsave(&dev->spinlock, irq_flags);
583 /* enable fifo-half full interrupts for cio-das802/16 */ 573 /* enable fifo-half full interrupts for cio-das802/16 */
584 if (thisboard->resolution == 16) 574 if (thisboard->resolution == 16)
@@ -604,6 +594,7 @@ static int das800_ai_do_cmdtest(struct comedi_device *dev,
604 struct comedi_subdevice *s, 594 struct comedi_subdevice *s,
605 struct comedi_cmd *cmd) 595 struct comedi_cmd *cmd)
606{ 596{
597 struct das800_private *devpriv = dev->private;
607 int err = 0; 598 int err = 0;
608 int tmp; 599 int tmp;
609 int gain, startChan; 600 int gain, startChan;
@@ -631,37 +622,21 @@ static int das800_ai_do_cmdtest(struct comedi_device *dev,
631 if (err) 622 if (err)
632 return 2; 623 return 2;
633 624
634 /* step 3: make sure arguments are trivially compatible */ 625 /* Step 3: check if arguments are trivially valid */
635 626
636 if (cmd->start_arg != 0) { 627 err |= cfc_check_trigger_arg_is(&cmd->start_arg, 0);
637 cmd->start_arg = 0; 628
638 err++; 629 if (cmd->convert_src == TRIG_TIMER)
639 } 630 err |= cfc_check_trigger_arg_min(&cmd->convert_arg,
640 if (cmd->convert_src == TRIG_TIMER) { 631 thisboard->ai_speed);
641 if (cmd->convert_arg < thisboard->ai_speed) { 632
642 cmd->convert_arg = thisboard->ai_speed; 633 err |= cfc_check_trigger_arg_min(&cmd->chanlist_len, 1);
643 err++; 634 err |= cfc_check_trigger_arg_is(&cmd->scan_end_arg, cmd->chanlist_len);
644 } 635
645 } 636 if (cmd->stop_src == TRIG_COUNT)
646 if (!cmd->chanlist_len) { 637 err |= cfc_check_trigger_arg_min(&cmd->stop_arg, 1);
647 cmd->chanlist_len = 1; 638 else /* TRIG_NONE */
648 err++; 639 err |= cfc_check_trigger_arg_is(&cmd->stop_arg, 0);
649 }
650 if (cmd->scan_end_arg != cmd->chanlist_len) {
651 cmd->scan_end_arg = cmd->chanlist_len;
652 err++;
653 }
654 if (cmd->stop_src == TRIG_COUNT) {
655 if (!cmd->stop_arg) {
656 cmd->stop_arg = 1;
657 err++;
658 }
659 } else { /* TRIG_NONE */
660 if (cmd->stop_arg != 0) {
661 cmd->stop_arg = 0;
662 err++;
663 }
664 }
665 640
666 if (err) 641 if (err)
667 return 3; 642 return 3;
@@ -710,6 +685,7 @@ static int das800_ai_do_cmdtest(struct comedi_device *dev,
710static int das800_ai_do_cmd(struct comedi_device *dev, 685static int das800_ai_do_cmd(struct comedi_device *dev,
711 struct comedi_subdevice *s) 686 struct comedi_subdevice *s)
712{ 687{
688 struct das800_private *devpriv = dev->private;
713 int startChan, endChan, scan, gain; 689 int startChan, endChan, scan, gain;
714 int conv_bits; 690 int conv_bits;
715 unsigned long irq_flags; 691 unsigned long irq_flags;
@@ -793,6 +769,7 @@ static int das800_ai_rinsn(struct comedi_device *dev,
793 struct comedi_subdevice *s, struct comedi_insn *insn, 769 struct comedi_subdevice *s, struct comedi_insn *insn,
794 unsigned int *data) 770 unsigned int *data)
795{ 771{
772 struct das800_private *devpriv = dev->private;
796 int i, n; 773 int i, n;
797 int chan; 774 int chan;
798 int range; 775 int range;
@@ -862,6 +839,7 @@ static int das800_do_wbits(struct comedi_device *dev,
862 struct comedi_subdevice *s, struct comedi_insn *insn, 839 struct comedi_subdevice *s, struct comedi_insn *insn,
863 unsigned int *data) 840 unsigned int *data)
864{ 841{
842 struct das800_private *devpriv = dev->private;
865 int wbits; 843 int wbits;
866 unsigned long irq_flags; 844 unsigned long irq_flags;
867 845
@@ -885,6 +863,7 @@ static int das800_do_wbits(struct comedi_device *dev,
885/* loads counters with divisor1, divisor2 from private structure */ 863/* loads counters with divisor1, divisor2 from private structure */
886static int das800_set_frequency(struct comedi_device *dev) 864static int das800_set_frequency(struct comedi_device *dev)
887{ 865{
866 struct das800_private *devpriv = dev->private;
888 int err = 0; 867 int err = 0;
889 868
890 if (i8254_load(dev->iobase + DAS800_8254, 0, 1, devpriv->divisor1, 2)) 869 if (i8254_load(dev->iobase + DAS800_8254, 0, 1, devpriv->divisor1, 2))
diff --git a/drivers/staging/comedi/drivers/dmm32at.c b/drivers/staging/comedi/drivers/dmm32at.c
index 4d5c33c4750f..9e2124179a0c 100644
--- a/drivers/staging/comedi/drivers/dmm32at.c
+++ b/drivers/staging/comedi/drivers/dmm32at.c
@@ -158,10 +158,6 @@ static const struct comedi_lrange dmm32at_aoranges = {
158 } 158 }
159}; 159};
160 160
161struct dmm32at_board {
162 const char *name;
163};
164
165struct dmm32at_private { 161struct dmm32at_private {
166 162
167 int data; 163 int data;
@@ -284,33 +280,25 @@ static int dmm32at_ai_cmdtest(struct comedi_device *dev,
284 if (err) 280 if (err)
285 return 2; 281 return 2;
286 282
287 /* step 3: make sure arguments are trivially compatible */ 283 /* Step 3: check if arguments are trivially valid */
284
285 err |= cfc_check_trigger_arg_is(&cmd->start_arg, 0);
288 286
289 if (cmd->start_arg != 0) {
290 cmd->start_arg = 0;
291 err++;
292 }
293#define MAX_SCAN_SPEED 1000000 /* in nanoseconds */ 287#define MAX_SCAN_SPEED 1000000 /* in nanoseconds */
294#define MIN_SCAN_SPEED 1000000000 /* in nanoseconds */ 288#define MIN_SCAN_SPEED 1000000000 /* in nanoseconds */
295 289
296 if (cmd->scan_begin_src == TRIG_TIMER) { 290 if (cmd->scan_begin_src == TRIG_TIMER) {
297 if (cmd->scan_begin_arg < MAX_SCAN_SPEED) { 291 err |= cfc_check_trigger_arg_min(&cmd->scan_begin_arg,
298 cmd->scan_begin_arg = MAX_SCAN_SPEED; 292 MAX_SCAN_SPEED);
299 err++; 293 err |= cfc_check_trigger_arg_max(&cmd->scan_begin_arg,
300 } 294 MIN_SCAN_SPEED);
301 if (cmd->scan_begin_arg > MIN_SCAN_SPEED) {
302 cmd->scan_begin_arg = MIN_SCAN_SPEED;
303 err++;
304 }
305 } else { 295 } else {
306 /* external trigger */ 296 /* external trigger */
307 /* should be level/edge, hi/lo specification here */ 297 /* should be level/edge, hi/lo specification here */
308 /* should specify multiple external triggers */ 298 /* should specify multiple external triggers */
309 if (cmd->scan_begin_arg > 9) { 299 err |= cfc_check_trigger_arg_max(&cmd->scan_begin_arg, 9);
310 cmd->scan_begin_arg = 9;
311 err++;
312 }
313 } 300 }
301
314 if (cmd->convert_src == TRIG_TIMER) { 302 if (cmd->convert_src == TRIG_TIMER) {
315 if (cmd->convert_arg >= 17500) 303 if (cmd->convert_arg >= 17500)
316 cmd->convert_arg = 20000; 304 cmd->convert_arg = 20000;
@@ -320,35 +308,20 @@ static int dmm32at_ai_cmdtest(struct comedi_device *dev,
320 cmd->convert_arg = 10000; 308 cmd->convert_arg = 10000;
321 else 309 else
322 cmd->convert_arg = 5000; 310 cmd->convert_arg = 5000;
323
324 } else { 311 } else {
325 /* external trigger */ 312 /* external trigger */
326 /* see above */ 313 /* see above */
327 if (cmd->convert_arg > 9) { 314 err |= cfc_check_trigger_arg_max(&cmd->convert_arg, 9);
328 cmd->convert_arg = 9;
329 err++;
330 }
331 } 315 }
332 316
333 if (cmd->scan_end_arg != cmd->chanlist_len) { 317 err |= cfc_check_trigger_arg_is(&cmd->scan_end_arg, cmd->chanlist_len);
334 cmd->scan_end_arg = cmd->chanlist_len; 318
335 err++;
336 }
337 if (cmd->stop_src == TRIG_COUNT) { 319 if (cmd->stop_src == TRIG_COUNT) {
338 if (cmd->stop_arg > 0xfffffff0) { 320 err |= cfc_check_trigger_arg_max(&cmd->stop_arg, 0xfffffff0);
339 cmd->stop_arg = 0xfffffff0; 321 err |= cfc_check_trigger_arg_min(&cmd->stop_arg, 1);
340 err++;
341 }
342 if (cmd->stop_arg == 0) {
343 cmd->stop_arg = 1;
344 err++;
345 }
346 } else { 322 } else {
347 /* TRIG_NONE */ 323 /* TRIG_NONE */
348 if (cmd->stop_arg != 0) { 324 err |= cfc_check_trigger_arg_is(&cmd->stop_arg, 0);
349 cmd->stop_arg = 0;
350 err++;
351 }
352 } 325 }
353 326
354 if (err) 327 if (err)
@@ -718,7 +691,6 @@ static int dmm32at_dio_insn_config(struct comedi_device *dev,
718static int dmm32at_attach(struct comedi_device *dev, 691static int dmm32at_attach(struct comedi_device *dev,
719 struct comedi_devconfig *it) 692 struct comedi_devconfig *it)
720{ 693{
721 const struct dmm32at_board *board = comedi_board(dev);
722 struct dmm32at_private *devpriv; 694 struct dmm32at_private *devpriv;
723 int ret; 695 int ret;
724 struct comedi_subdevice *s; 696 struct comedi_subdevice *s;
@@ -726,6 +698,8 @@ static int dmm32at_attach(struct comedi_device *dev,
726 unsigned long iobase; 698 unsigned long iobase;
727 unsigned int irq; 699 unsigned int irq;
728 700
701 dev->board_name = dev->driver->driver_name;
702
729 iobase = it->options[0]; 703 iobase = it->options[0];
730 irq = it->options[1]; 704 irq = it->options[1];
731 705
@@ -734,7 +708,7 @@ static int dmm32at_attach(struct comedi_device *dev,
734 iobase, irq); 708 iobase, irq);
735 709
736 /* register address space */ 710 /* register address space */
737 if (!request_region(iobase, DMM32AT_MEMSIZE, board->name)) { 711 if (!request_region(iobase, DMM32AT_MEMSIZE, dev->board_name)) {
738 printk(KERN_ERR "comedi%d: dmm32at: I/O port conflict\n", 712 printk(KERN_ERR "comedi%d: dmm32at: I/O port conflict\n",
739 dev->minor); 713 dev->minor);
740 return -EIO; 714 return -EIO;
@@ -788,7 +762,7 @@ static int dmm32at_attach(struct comedi_device *dev,
788 762
789 /* board is there, register interrupt */ 763 /* board is there, register interrupt */
790 if (irq) { 764 if (irq) {
791 ret = request_irq(irq, dmm32at_isr, 0, board->name, dev); 765 ret = request_irq(irq, dmm32at_isr, 0, dev->board_name, dev);
792 if (ret < 0) { 766 if (ret < 0) {
793 printk(KERN_ERR "dmm32at: irq conflict\n"); 767 printk(KERN_ERR "dmm32at: irq conflict\n");
794 return ret; 768 return ret;
@@ -796,11 +770,10 @@ static int dmm32at_attach(struct comedi_device *dev,
796 dev->irq = irq; 770 dev->irq = irq;
797 } 771 }
798 772
799 dev->board_name = board->name; 773 devpriv = kzalloc(sizeof(*devpriv), GFP_KERNEL);
800 774 if (!devpriv)
801 if (alloc_private(dev, sizeof(*devpriv)) < 0)
802 return -ENOMEM; 775 return -ENOMEM;
803 devpriv = dev->private; 776 dev->private = devpriv;
804 777
805 ret = comedi_alloc_subdevices(dev, 3); 778 ret = comedi_alloc_subdevices(dev, 3);
806 if (ret) 779 if (ret)
@@ -867,20 +840,11 @@ static void dmm32at_detach(struct comedi_device *dev)
867 release_region(dev->iobase, DMM32AT_MEMSIZE); 840 release_region(dev->iobase, DMM32AT_MEMSIZE);
868} 841}
869 842
870static const struct dmm32at_board dmm32at_boards[] = {
871 {
872 .name = "dmm32at",
873 },
874};
875
876static struct comedi_driver dmm32at_driver = { 843static struct comedi_driver dmm32at_driver = {
877 .driver_name = "dmm32at", 844 .driver_name = "dmm32at",
878 .module = THIS_MODULE, 845 .module = THIS_MODULE,
879 .attach = dmm32at_attach, 846 .attach = dmm32at_attach,
880 .detach = dmm32at_detach, 847 .detach = dmm32at_detach,
881 .board_name = &dmm32at_boards[0].name,
882 .offset = sizeof(struct dmm32at_board),
883 .num_names = ARRAY_SIZE(dmm32at_boards),
884}; 848};
885module_comedi_driver(dmm32at_driver); 849module_comedi_driver(dmm32at_driver);
886 850
diff --git a/drivers/staging/comedi/drivers/dt2801.c b/drivers/staging/comedi/drivers/dt2801.c
index c59a652a1194..f6942aaf0ecd 100644
--- a/drivers/staging/comedi/drivers/dt2801.c
+++ b/drivers/staging/comedi/drivers/dt2801.c
@@ -233,8 +233,6 @@ struct dt2801_private {
233 unsigned int ao_readback[2]; 233 unsigned int ao_readback[2];
234}; 234};
235 235
236#define devpriv ((struct dt2801_private *)dev->private)
237
238/* These are the low-level routines: 236/* These are the low-level routines:
239 writecommand: write a command to the board 237 writecommand: write a command to the board
240 writedata: write data byte 238 writedata: write data byte
@@ -508,6 +506,8 @@ static int dt2801_ao_insn_read(struct comedi_device *dev,
508 struct comedi_subdevice *s, 506 struct comedi_subdevice *s,
509 struct comedi_insn *insn, unsigned int *data) 507 struct comedi_insn *insn, unsigned int *data)
510{ 508{
509 struct dt2801_private *devpriv = dev->private;
510
511 data[0] = devpriv->ao_readback[CR_CHAN(insn->chanspec)]; 511 data[0] = devpriv->ao_readback[CR_CHAN(insn->chanspec)];
512 512
513 return 1; 513 return 1;
@@ -517,6 +517,8 @@ static int dt2801_ao_insn_write(struct comedi_device *dev,
517 struct comedi_subdevice *s, 517 struct comedi_subdevice *s,
518 struct comedi_insn *insn, unsigned int *data) 518 struct comedi_insn *insn, unsigned int *data)
519{ 519{
520 struct dt2801_private *devpriv = dev->private;
521
520 dt2801_writecmd(dev, DT_C_WRITE_DAIM); 522 dt2801_writecmd(dev, DT_C_WRITE_DAIM);
521 dt2801_writedata(dev, CR_CHAN(insn->chanspec)); 523 dt2801_writedata(dev, CR_CHAN(insn->chanspec));
522 dt2801_writedata2(dev, data[0]); 524 dt2801_writedata2(dev, data[0]);
@@ -590,6 +592,7 @@ static int dt2801_dio_insn_config(struct comedi_device *dev,
590*/ 592*/
591static int dt2801_attach(struct comedi_device *dev, struct comedi_devconfig *it) 593static int dt2801_attach(struct comedi_device *dev, struct comedi_devconfig *it)
592{ 594{
595 struct dt2801_private *devpriv;
593 struct comedi_subdevice *s; 596 struct comedi_subdevice *s;
594 unsigned long iobase; 597 unsigned long iobase;
595 int board_code, type; 598 int board_code, type;
@@ -630,9 +633,10 @@ havetype:
630 if (ret) 633 if (ret)
631 goto out; 634 goto out;
632 635
633 ret = alloc_private(dev, sizeof(struct dt2801_private)); 636 devpriv = kzalloc(sizeof(*devpriv), GFP_KERNEL);
634 if (ret < 0) 637 if (!devpriv)
635 return ret; 638 return -ENOMEM;
639 dev->private = devpriv;
636 640
637 dev->board_name = boardtype.name; 641 dev->board_name = boardtype.name;
638 642
diff --git a/drivers/staging/comedi/drivers/dt2811.c b/drivers/staging/comedi/drivers/dt2811.c
index d3a8c1aec9d6..f90ecf494aaf 100644
--- a/drivers/staging/comedi/drivers/dt2811.c
+++ b/drivers/staging/comedi/drivers/dt2811.c
@@ -226,8 +226,6 @@ struct dt2811_private {
226 unsigned int ao_readback[2]; 226 unsigned int ao_readback[2];
227}; 227};
228 228
229#define devpriv ((struct dt2811_private *)dev->private)
230
231static const struct comedi_lrange *dac_range_types[] = { 229static const struct comedi_lrange *dac_range_types[] = {
232 &range_bipolar5, 230 &range_bipolar5,
233 &range_bipolar2_5, 231 &range_bipolar2_5,
@@ -242,6 +240,7 @@ static irqreturn_t dt2811_interrupt(int irq, void *d)
242 int lo, hi; 240 int lo, hi;
243 int data; 241 int data;
244 struct comedi_device *dev = d; 242 struct comedi_device *dev = d;
243 struct dt2811_private *devpriv = dev->private;
245 244
246 if (!dev->attached) { 245 if (!dev->attached) {
247 comedi_error(dev, "spurious interrupt"); 246 comedi_error(dev, "spurious interrupt");
@@ -318,6 +317,7 @@ int dt2811_adtrig(kdev_t minor, comedi_adtrig *adtrig)
318static int dt2811_ao_insn(struct comedi_device *dev, struct comedi_subdevice *s, 317static int dt2811_ao_insn(struct comedi_device *dev, struct comedi_subdevice *s,
319 struct comedi_insn *insn, unsigned int *data) 318 struct comedi_insn *insn, unsigned int *data)
320{ 319{
320 struct dt2811_private *devpriv = dev->private;
321 int i; 321 int i;
322 int chan; 322 int chan;
323 323
@@ -337,6 +337,7 @@ static int dt2811_ao_insn_read(struct comedi_device *dev,
337 struct comedi_subdevice *s, 337 struct comedi_subdevice *s,
338 struct comedi_insn *insn, unsigned int *data) 338 struct comedi_insn *insn, unsigned int *data)
339{ 339{
340 struct dt2811_private *devpriv = dev->private;
340 int i; 341 int i;
341 int chan; 342 int chan;
342 343
@@ -397,6 +398,7 @@ static int dt2811_attach(struct comedi_device *dev, struct comedi_devconfig *it)
397 /* long flags; */ 398 /* long flags; */
398 399
399 const struct dt2811_board *board = comedi_board(dev); 400 const struct dt2811_board *board = comedi_board(dev);
401 struct dt2811_private *devpriv;
400 int ret; 402 int ret;
401 struct comedi_subdevice *s; 403 struct comedi_subdevice *s;
402 unsigned long iobase; 404 unsigned long iobase;
@@ -463,9 +465,10 @@ static int dt2811_attach(struct comedi_device *dev, struct comedi_devconfig *it)
463 if (ret) 465 if (ret)
464 return ret; 466 return ret;
465 467
466 ret = alloc_private(dev, sizeof(struct dt2811_private)); 468 devpriv = kzalloc(sizeof(*devpriv), GFP_KERNEL);
467 if (ret < 0) 469 if (!devpriv)
468 return ret; 470 return -ENOMEM;
471 dev->private = devpriv;
469 472
470 switch (it->options[2]) { 473 switch (it->options[2]) {
471 case 0: 474 case 0:
diff --git a/drivers/staging/comedi/drivers/dt2814.c b/drivers/staging/comedi/drivers/dt2814.c
index 064a8f215e4d..e520dbaaa194 100644
--- a/drivers/staging/comedi/drivers/dt2814.c
+++ b/drivers/staging/comedi/drivers/dt2814.c
@@ -68,8 +68,6 @@ struct dt2814_private {
68 int curadchan; 68 int curadchan;
69}; 69};
70 70
71#define devpriv ((struct dt2814_private *)dev->private)
72
73#define DT2814_TIMEOUT 10 71#define DT2814_TIMEOUT 10
74#define DT2814_MAX_SPEED 100000 /* Arbitrary 10 khz limit */ 72#define DT2814_MAX_SPEED 100000 /* Arbitrary 10 khz limit */
75 73
@@ -151,36 +149,20 @@ static int dt2814_ai_cmdtest(struct comedi_device *dev,
151 if (err) 149 if (err)
152 return 2; 150 return 2;
153 151
154 /* step 3: make sure arguments are trivially compatible */ 152 /* Step 3: check if arguments are trivially valid */
155 153
156 if (cmd->start_arg != 0) { 154 err |= cfc_check_trigger_arg_is(&cmd->start_arg, 0);
157 cmd->start_arg = 0; 155
158 err++; 156 err |= cfc_check_trigger_arg_max(&cmd->scan_begin_arg, 1000000000);
159 } 157 err |= cfc_check_trigger_arg_min(&cmd->scan_begin_arg,
160 if (cmd->scan_begin_arg > 1000000000) { 158 DT2814_MAX_SPEED);
161 cmd->scan_begin_arg = 1000000000; 159
162 err++; 160 err |= cfc_check_trigger_arg_is(&cmd->scan_end_arg, cmd->chanlist_len);
163 } 161
164 if (cmd->scan_begin_arg < DT2814_MAX_SPEED) { 162 if (cmd->stop_src == TRIG_COUNT)
165 cmd->scan_begin_arg = DT2814_MAX_SPEED; 163 err |= cfc_check_trigger_arg_min(&cmd->stop_arg, 2);
166 err++; 164 else /* TRIG_NONE */
167 } 165 err |= cfc_check_trigger_arg_is(&cmd->stop_arg, 0);
168 if (cmd->scan_end_arg != cmd->chanlist_len) {
169 cmd->scan_end_arg = cmd->chanlist_len;
170 err++;
171 }
172 if (cmd->stop_src == TRIG_COUNT) {
173 if (cmd->stop_arg < 2) {
174 cmd->stop_arg = 2;
175 err++;
176 }
177 } else {
178 /* TRIG_NONE */
179 if (cmd->stop_arg != 0) {
180 cmd->stop_arg = 0;
181 err++;
182 }
183 }
184 166
185 if (err) 167 if (err)
186 return 3; 168 return 3;
@@ -200,6 +182,7 @@ static int dt2814_ai_cmdtest(struct comedi_device *dev,
200 182
201static int dt2814_ai_cmd(struct comedi_device *dev, struct comedi_subdevice *s) 183static int dt2814_ai_cmd(struct comedi_device *dev, struct comedi_subdevice *s)
202{ 184{
185 struct dt2814_private *devpriv = dev->private;
203 struct comedi_cmd *cmd = &s->async->cmd; 186 struct comedi_cmd *cmd = &s->async->cmd;
204 int chan; 187 int chan;
205 int trigvar; 188 int trigvar;
@@ -221,6 +204,7 @@ static irqreturn_t dt2814_interrupt(int irq, void *d)
221{ 204{
222 int lo, hi; 205 int lo, hi;
223 struct comedi_device *dev = d; 206 struct comedi_device *dev = d;
207 struct dt2814_private *devpriv = dev->private;
224 struct comedi_subdevice *s; 208 struct comedi_subdevice *s;
225 int data; 209 int data;
226 210
@@ -258,6 +242,7 @@ static irqreturn_t dt2814_interrupt(int irq, void *d)
258 242
259static int dt2814_attach(struct comedi_device *dev, struct comedi_devconfig *it) 243static int dt2814_attach(struct comedi_device *dev, struct comedi_devconfig *it)
260{ 244{
245 struct dt2814_private *devpriv;
261 int i, irq; 246 int i, irq;
262 int ret; 247 int ret;
263 struct comedi_subdevice *s; 248 struct comedi_subdevice *s;
@@ -324,9 +309,10 @@ static int dt2814_attach(struct comedi_device *dev, struct comedi_devconfig *it)
324 if (ret) 309 if (ret)
325 return ret; 310 return ret;
326 311
327 ret = alloc_private(dev, sizeof(struct dt2814_private)); 312 devpriv = kzalloc(sizeof(*devpriv), GFP_KERNEL);
328 if (ret < 0) 313 if (!devpriv)
329 return ret; 314 return -ENOMEM;
315 dev->private = devpriv;
330 316
331 s = &dev->subdevices[0]; 317 s = &dev->subdevices[0];
332 dev->read_subdev = s; 318 dev->read_subdev = s;
diff --git a/drivers/staging/comedi/drivers/dt2815.c b/drivers/staging/comedi/drivers/dt2815.c
index b9692ef64c41..1e0cfe4972a6 100644
--- a/drivers/staging/comedi/drivers/dt2815.c
+++ b/drivers/staging/comedi/drivers/dt2815.c
@@ -78,8 +78,6 @@ struct dt2815_private {
78 unsigned int ao_readback[8]; 78 unsigned int ao_readback[8];
79}; 79};
80 80
81#define devpriv ((struct dt2815_private *)dev->private)
82
83static int dt2815_wait_for_status(struct comedi_device *dev, int status) 81static int dt2815_wait_for_status(struct comedi_device *dev, int status)
84{ 82{
85 int i; 83 int i;
@@ -95,6 +93,7 @@ static int dt2815_ao_insn_read(struct comedi_device *dev,
95 struct comedi_subdevice *s, 93 struct comedi_subdevice *s,
96 struct comedi_insn *insn, unsigned int *data) 94 struct comedi_insn *insn, unsigned int *data)
97{ 95{
96 struct dt2815_private *devpriv = dev->private;
98 int i; 97 int i;
99 int chan = CR_CHAN(insn->chanspec); 98 int chan = CR_CHAN(insn->chanspec);
100 99
@@ -107,6 +106,7 @@ static int dt2815_ao_insn_read(struct comedi_device *dev,
107static int dt2815_ao_insn(struct comedi_device *dev, struct comedi_subdevice *s, 106static int dt2815_ao_insn(struct comedi_device *dev, struct comedi_subdevice *s,
108 struct comedi_insn *insn, unsigned int *data) 107 struct comedi_insn *insn, unsigned int *data)
109{ 108{
109 struct dt2815_private *devpriv = dev->private;
110 int i; 110 int i;
111 int chan = CR_CHAN(insn->chanspec); 111 int chan = CR_CHAN(insn->chanspec);
112 unsigned int status; 112 unsigned int status;
@@ -162,6 +162,7 @@ static int dt2815_ao_insn(struct comedi_device *dev, struct comedi_subdevice *s,
162 162
163static int dt2815_attach(struct comedi_device *dev, struct comedi_devconfig *it) 163static int dt2815_attach(struct comedi_device *dev, struct comedi_devconfig *it)
164{ 164{
165 struct dt2815_private *devpriv;
165 struct comedi_subdevice *s; 166 struct comedi_subdevice *s;
166 int i; 167 int i;
167 const struct comedi_lrange *current_range_type, *voltage_range_type; 168 const struct comedi_lrange *current_range_type, *voltage_range_type;
@@ -182,8 +183,10 @@ static int dt2815_attach(struct comedi_device *dev, struct comedi_devconfig *it)
182 if (ret) 183 if (ret)
183 return ret; 184 return ret;
184 185
185 if (alloc_private(dev, sizeof(struct dt2815_private)) < 0) 186 devpriv = kzalloc(sizeof(*devpriv), GFP_KERNEL);
187 if (!devpriv)
186 return -ENOMEM; 188 return -ENOMEM;
189 dev->private = devpriv;
187 190
188 s = &dev->subdevices[0]; 191 s = &dev->subdevices[0];
189 /* ao subdevice */ 192 /* ao subdevice */
diff --git a/drivers/staging/comedi/drivers/dt282x.c b/drivers/staging/comedi/drivers/dt282x.c
index 78d340716d1e..122d980a95a0 100644
--- a/drivers/staging/comedi/drivers/dt282x.c
+++ b/drivers/staging/comedi/drivers/dt282x.c
@@ -248,7 +248,6 @@ struct dt282x_private {
248 int dma_dir; 248 int dma_dir;
249}; 249};
250 250
251#define devpriv ((struct dt282x_private *)dev->private)
252#define boardtype (*(const struct dt282x_board *)dev->board_ptr) 251#define boardtype (*(const struct dt282x_board *)dev->board_ptr)
253 252
254/* 253/*
@@ -290,6 +289,7 @@ static int dt282x_grab_dma(struct comedi_device *dev, int dma1, int dma2);
290static void dt282x_munge(struct comedi_device *dev, short *buf, 289static void dt282x_munge(struct comedi_device *dev, short *buf,
291 unsigned int nbytes) 290 unsigned int nbytes)
292{ 291{
292 struct dt282x_private *devpriv = dev->private;
293 unsigned int i; 293 unsigned int i;
294 unsigned short mask = (1 << boardtype.adbits) - 1; 294 unsigned short mask = (1 << boardtype.adbits) - 1;
295 unsigned short sign = 1 << (boardtype.adbits - 1); 295 unsigned short sign = 1 << (boardtype.adbits - 1);
@@ -309,6 +309,7 @@ static void dt282x_munge(struct comedi_device *dev, short *buf,
309 309
310static void dt282x_ao_dma_interrupt(struct comedi_device *dev) 310static void dt282x_ao_dma_interrupt(struct comedi_device *dev)
311{ 311{
312 struct dt282x_private *devpriv = dev->private;
312 void *ptr; 313 void *ptr;
313 int size; 314 int size;
314 int i; 315 int i;
@@ -341,6 +342,7 @@ static void dt282x_ao_dma_interrupt(struct comedi_device *dev)
341 342
342static void dt282x_ai_dma_interrupt(struct comedi_device *dev) 343static void dt282x_ai_dma_interrupt(struct comedi_device *dev)
343{ 344{
345 struct dt282x_private *devpriv = dev->private;
344 void *ptr; 346 void *ptr;
345 int size; 347 int size;
346 int i; 348 int i;
@@ -393,6 +395,7 @@ static void dt282x_ai_dma_interrupt(struct comedi_device *dev)
393 395
394static int prep_ai_dma(struct comedi_device *dev, int dma_index, int n) 396static int prep_ai_dma(struct comedi_device *dev, int dma_index, int n)
395{ 397{
398 struct dt282x_private *devpriv = dev->private;
396 int dma_chan; 399 int dma_chan;
397 unsigned long dma_ptr; 400 unsigned long dma_ptr;
398 unsigned long flags; 401 unsigned long flags;
@@ -424,6 +427,7 @@ static int prep_ai_dma(struct comedi_device *dev, int dma_index, int n)
424 427
425static int prep_ao_dma(struct comedi_device *dev, int dma_index, int n) 428static int prep_ao_dma(struct comedi_device *dev, int dma_index, int n)
426{ 429{
430 struct dt282x_private *devpriv = dev->private;
427 int dma_chan; 431 int dma_chan;
428 unsigned long dma_ptr; 432 unsigned long dma_ptr;
429 unsigned long flags; 433 unsigned long flags;
@@ -447,6 +451,7 @@ static int prep_ao_dma(struct comedi_device *dev, int dma_index, int n)
447static irqreturn_t dt282x_interrupt(int irq, void *d) 451static irqreturn_t dt282x_interrupt(int irq, void *d)
448{ 452{
449 struct comedi_device *dev = d; 453 struct comedi_device *dev = d;
454 struct dt282x_private *devpriv = dev->private;
450 struct comedi_subdevice *s; 455 struct comedi_subdevice *s;
451 struct comedi_subdevice *s_ao; 456 struct comedi_subdevice *s_ao;
452 unsigned int supcsr, adcsr, dacsr; 457 unsigned int supcsr, adcsr, dacsr;
@@ -525,6 +530,7 @@ static irqreturn_t dt282x_interrupt(int irq, void *d)
525static void dt282x_load_changain(struct comedi_device *dev, int n, 530static void dt282x_load_changain(struct comedi_device *dev, int n,
526 unsigned int *chanlist) 531 unsigned int *chanlist)
527{ 532{
533 struct dt282x_private *devpriv = dev->private;
528 unsigned int i; 534 unsigned int i;
529 unsigned int chan, range; 535 unsigned int chan, range;
530 536
@@ -548,6 +554,7 @@ static int dt282x_ai_insn_read(struct comedi_device *dev,
548 struct comedi_subdevice *s, 554 struct comedi_subdevice *s,
549 struct comedi_insn *insn, unsigned int *data) 555 struct comedi_insn *insn, unsigned int *data)
550{ 556{
557 struct dt282x_private *devpriv = dev->private;
551 int i; 558 int i;
552 559
553 /* XXX should we really be enabling the ad clock here? */ 560 /* XXX should we really be enabling the ad clock here? */
@@ -604,52 +611,30 @@ static int dt282x_ai_cmdtest(struct comedi_device *dev,
604 if (err) 611 if (err)
605 return 2; 612 return 2;
606 613
607 /* step 3: make sure arguments are trivially compatible */ 614 /* Step 3: check if arguments are trivially valid */
615
616 err |= cfc_check_trigger_arg_is(&cmd->start_arg, 0);
608 617
609 if (cmd->start_arg != 0) {
610 cmd->start_arg = 0;
611 err++;
612 }
613 if (cmd->scan_begin_src == TRIG_FOLLOW) { 618 if (cmd->scan_begin_src == TRIG_FOLLOW) {
614 /* internal trigger */ 619 /* internal trigger */
615 if (cmd->scan_begin_arg != 0) { 620 err |= cfc_check_trigger_arg_is(&cmd->scan_begin_arg, 0);
616 cmd->scan_begin_arg = 0;
617 err++;
618 }
619 } else { 621 } else {
620 /* external trigger */ 622 /* external trigger */
621 /* should be level/edge, hi/lo specification here */ 623 /* should be level/edge, hi/lo specification here */
622 if (cmd->scan_begin_arg != 0) { 624 err |= cfc_check_trigger_arg_is(&cmd->scan_begin_arg, 0);
623 cmd->scan_begin_arg = 0;
624 err++;
625 }
626 }
627 if (cmd->convert_arg < 4000) {
628 /* XXX board dependent */
629 cmd->convert_arg = 4000;
630 err++;
631 } 625 }
626
627 err |= cfc_check_trigger_arg_min(&cmd->convert_arg, 4000);
628
632#define SLOWEST_TIMER (250*(1<<15)*255) 629#define SLOWEST_TIMER (250*(1<<15)*255)
633 if (cmd->convert_arg > SLOWEST_TIMER) { 630 err |= cfc_check_trigger_arg_max(&cmd->convert_arg, SLOWEST_TIMER);
634 cmd->convert_arg = SLOWEST_TIMER; 631 err |= cfc_check_trigger_arg_min(&cmd->convert_arg, board->ai_speed);
635 err++; 632 err |= cfc_check_trigger_arg_is(&cmd->scan_end_arg, cmd->chanlist_len);
636 } 633
637 if (cmd->convert_arg < board->ai_speed) {
638 cmd->convert_arg = board->ai_speed;
639 err++;
640 }
641 if (cmd->scan_end_arg != cmd->chanlist_len) {
642 cmd->scan_end_arg = cmd->chanlist_len;
643 err++;
644 }
645 if (cmd->stop_src == TRIG_COUNT) { 634 if (cmd->stop_src == TRIG_COUNT) {
646 /* any count is allowed */ 635 /* any count is allowed */
647 } else { 636 } else { /* TRIG_NONE */
648 /* TRIG_NONE */ 637 err |= cfc_check_trigger_arg_is(&cmd->stop_arg, 0);
649 if (cmd->stop_arg != 0) {
650 cmd->stop_arg = 0;
651 err++;
652 }
653 } 638 }
654 639
655 if (err) 640 if (err)
@@ -671,6 +656,7 @@ static int dt282x_ai_cmdtest(struct comedi_device *dev,
671static int dt282x_ai_cmd(struct comedi_device *dev, struct comedi_subdevice *s) 656static int dt282x_ai_cmd(struct comedi_device *dev, struct comedi_subdevice *s)
672{ 657{
673 const struct dt282x_board *board = comedi_board(dev); 658 const struct dt282x_board *board = comedi_board(dev);
659 struct dt282x_private *devpriv = dev->private;
674 struct comedi_cmd *cmd = &s->async->cmd; 660 struct comedi_cmd *cmd = &s->async->cmd;
675 int timer; 661 int timer;
676 662
@@ -733,6 +719,8 @@ static int dt282x_ai_cmd(struct comedi_device *dev, struct comedi_subdevice *s)
733 719
734static void dt282x_disable_dma(struct comedi_device *dev) 720static void dt282x_disable_dma(struct comedi_device *dev)
735{ 721{
722 struct dt282x_private *devpriv = dev->private;
723
736 if (devpriv->usedma) { 724 if (devpriv->usedma) {
737 disable_dma(devpriv->dma[0].chan); 725 disable_dma(devpriv->dma[0].chan);
738 disable_dma(devpriv->dma[1].chan); 726 disable_dma(devpriv->dma[1].chan);
@@ -742,6 +730,8 @@ static void dt282x_disable_dma(struct comedi_device *dev)
742static int dt282x_ai_cancel(struct comedi_device *dev, 730static int dt282x_ai_cancel(struct comedi_device *dev,
743 struct comedi_subdevice *s) 731 struct comedi_subdevice *s)
744{ 732{
733 struct dt282x_private *devpriv = dev->private;
734
745 dt282x_disable_dma(dev); 735 dt282x_disable_dma(dev);
746 736
747 devpriv->adcsr = 0; 737 devpriv->adcsr = 0;
@@ -794,6 +784,8 @@ static int dt282x_ao_insn_read(struct comedi_device *dev,
794 struct comedi_subdevice *s, 784 struct comedi_subdevice *s,
795 struct comedi_insn *insn, unsigned int *data) 785 struct comedi_insn *insn, unsigned int *data)
796{ 786{
787 struct dt282x_private *devpriv = dev->private;
788
797 data[0] = devpriv->ao[CR_CHAN(insn->chanspec)]; 789 data[0] = devpriv->ao[CR_CHAN(insn->chanspec)];
798 790
799 return 1; 791 return 1;
@@ -803,6 +795,7 @@ static int dt282x_ao_insn_write(struct comedi_device *dev,
803 struct comedi_subdevice *s, 795 struct comedi_subdevice *s,
804 struct comedi_insn *insn, unsigned int *data) 796 struct comedi_insn *insn, unsigned int *data)
805{ 797{
798 struct dt282x_private *devpriv = dev->private;
806 short d; 799 short d;
807 unsigned int chan; 800 unsigned int chan;
808 801
@@ -859,33 +852,17 @@ static int dt282x_ao_cmdtest(struct comedi_device *dev,
859 if (err) 852 if (err)
860 return 2; 853 return 2;
861 854
862 /* step 3: make sure arguments are trivially compatible */ 855 /* Step 3: check if arguments are trivially valid */
856
857 err |= cfc_check_trigger_arg_is(&cmd->start_arg, 0);
858 err |= cfc_check_trigger_arg_min(&cmd->scan_begin_arg, 5000);
859 err |= cfc_check_trigger_arg_is(&cmd->convert_arg, 0);
860 err |= cfc_check_trigger_arg_max(&cmd->scan_end_arg, 2);
863 861
864 if (cmd->start_arg != 0) {
865 cmd->start_arg = 0;
866 err++;
867 }
868 if (cmd->scan_begin_arg < 5000 /* XXX unknown */) {
869 cmd->scan_begin_arg = 5000;
870 err++;
871 }
872 if (cmd->convert_arg != 0) {
873 cmd->convert_arg = 0;
874 err++;
875 }
876 if (cmd->scan_end_arg > 2) {
877 /* XXX chanlist stuff? */
878 cmd->scan_end_arg = 2;
879 err++;
880 }
881 if (cmd->stop_src == TRIG_COUNT) { 862 if (cmd->stop_src == TRIG_COUNT) {
882 /* any count is allowed */ 863 /* any count is allowed */
883 } else { 864 } else { /* TRIG_NONE */
884 /* TRIG_NONE */ 865 err |= cfc_check_trigger_arg_is(&cmd->stop_arg, 0);
885 if (cmd->stop_arg != 0) {
886 cmd->stop_arg = 0;
887 err++;
888 }
889 } 866 }
890 867
891 if (err) 868 if (err)
@@ -908,6 +885,7 @@ static int dt282x_ao_cmdtest(struct comedi_device *dev,
908static int dt282x_ao_inttrig(struct comedi_device *dev, 885static int dt282x_ao_inttrig(struct comedi_device *dev,
909 struct comedi_subdevice *s, unsigned int x) 886 struct comedi_subdevice *s, unsigned int x)
910{ 887{
888 struct dt282x_private *devpriv = dev->private;
911 int size; 889 int size;
912 890
913 if (x != 0) 891 if (x != 0)
@@ -937,6 +915,7 @@ static int dt282x_ao_inttrig(struct comedi_device *dev,
937 915
938static int dt282x_ao_cmd(struct comedi_device *dev, struct comedi_subdevice *s) 916static int dt282x_ao_cmd(struct comedi_device *dev, struct comedi_subdevice *s)
939{ 917{
918 struct dt282x_private *devpriv = dev->private;
940 int timer; 919 int timer;
941 struct comedi_cmd *cmd = &s->async->cmd; 920 struct comedi_cmd *cmd = &s->async->cmd;
942 921
@@ -973,6 +952,8 @@ static int dt282x_ao_cmd(struct comedi_device *dev, struct comedi_subdevice *s)
973static int dt282x_ao_cancel(struct comedi_device *dev, 952static int dt282x_ao_cancel(struct comedi_device *dev,
974 struct comedi_subdevice *s) 953 struct comedi_subdevice *s)
975{ 954{
955 struct dt282x_private *devpriv = dev->private;
956
976 dt282x_disable_dma(dev); 957 dt282x_disable_dma(dev);
977 958
978 devpriv->dacsr = 0; 959 devpriv->dacsr = 0;
@@ -1003,6 +984,7 @@ static int dt282x_dio_insn_config(struct comedi_device *dev,
1003 struct comedi_subdevice *s, 984 struct comedi_subdevice *s,
1004 struct comedi_insn *insn, unsigned int *data) 985 struct comedi_insn *insn, unsigned int *data)
1005{ 986{
987 struct dt282x_private *devpriv = dev->private;
1006 int mask; 988 int mask;
1007 989
1008 mask = (CR_CHAN(insn->chanspec) < 8) ? 0x00ff : 0xff00; 990 mask = (CR_CHAN(insn->chanspec) < 8) ? 0x00ff : 0xff00;
@@ -1074,6 +1056,7 @@ enum { /* i/o base, irq, dma channels */
1074 1056
1075static int dt282x_grab_dma(struct comedi_device *dev, int dma1, int dma2) 1057static int dt282x_grab_dma(struct comedi_device *dev, int dma1, int dma2)
1076{ 1058{
1059 struct dt282x_private *devpriv = dev->private;
1077 int ret; 1060 int ret;
1078 1061
1079 devpriv->usedma = 0; 1062 devpriv->usedma = 0;
@@ -1135,6 +1118,7 @@ static int dt282x_grab_dma(struct comedi_device *dev, int dma1, int dma2)
1135static int dt282x_attach(struct comedi_device *dev, struct comedi_devconfig *it) 1118static int dt282x_attach(struct comedi_device *dev, struct comedi_devconfig *it)
1136{ 1119{
1137 const struct dt282x_board *board = comedi_board(dev); 1120 const struct dt282x_board *board = comedi_board(dev);
1121 struct dt282x_private *devpriv;
1138 int i, irq; 1122 int i, irq;
1139 int ret; 1123 int ret;
1140 struct comedi_subdevice *s; 1124 struct comedi_subdevice *s;
@@ -1217,9 +1201,10 @@ static int dt282x_attach(struct comedi_device *dev, struct comedi_devconfig *it)
1217#endif 1201#endif
1218 } 1202 }
1219 1203
1220 ret = alloc_private(dev, sizeof(struct dt282x_private)); 1204 devpriv = kzalloc(sizeof(*devpriv), GFP_KERNEL);
1221 if (ret < 0) 1205 if (!devpriv)
1222 return ret; 1206 return -ENOMEM;
1207 dev->private = devpriv;
1223 1208
1224 ret = dt282x_grab_dma(dev, it->options[opt_dma1], 1209 ret = dt282x_grab_dma(dev, it->options[opt_dma1],
1225 it->options[opt_dma2]); 1210 it->options[opt_dma2]);
@@ -1292,6 +1277,8 @@ static int dt282x_attach(struct comedi_device *dev, struct comedi_devconfig *it)
1292 1277
1293static void dt282x_detach(struct comedi_device *dev) 1278static void dt282x_detach(struct comedi_device *dev)
1294{ 1279{
1280 struct dt282x_private *devpriv = dev->private;
1281
1295 if (dev->irq) 1282 if (dev->irq)
1296 free_irq(dev->irq, dev); 1283 free_irq(dev->irq, dev);
1297 if (dev->iobase) 1284 if (dev->iobase)
diff --git a/drivers/staging/comedi/drivers/dt3000.c b/drivers/staging/comedi/drivers/dt3000.c
index 43d05ef97157..960da8debe17 100644
--- a/drivers/staging/comedi/drivers/dt3000.c
+++ b/drivers/staging/comedi/drivers/dt3000.c
@@ -29,11 +29,7 @@ Devices: [Data Translation] DT3001 (dt3000), DT3001-PGL, DT3002, DT3003,
29Updated: Mon, 14 Apr 2008 15:41:24 +0100 29Updated: Mon, 14 Apr 2008 15:41:24 +0100
30Status: works 30Status: works
31 31
32Configuration Options: 32Configuration Options: not applicable, uses PCI auto config
33 [0] - PCI bus of device (optional)
34 [1] - PCI slot of device (optional)
35 If bus/slot is not specified, the first supported
36 PCI device found will be used.
37 33
38There is code to support AI commands, but it may not work. 34There is code to support AI commands, but it may not work.
39 35
@@ -65,26 +61,36 @@ AO commands are not supported.
65 61
66#include "comedi_fc.h" 62#include "comedi_fc.h"
67 63
68#define PCI_VENDOR_ID_DT 0x1116 64/*
69 65 * PCI device id's supported by this driver
70static const struct comedi_lrange range_dt3000_ai = { 4, { 66 */
71 RANGE(-10, 10), 67#define PCI_DEVICE_ID_DT3001 0x0022
72 RANGE(-5, 5), 68#define PCI_DEVICE_ID_DT3002 0x0023
73 RANGE(-2.5, 2.5), 69#define PCI_DEVICE_ID_DT3003 0x0024
74 RANGE(-1.25, 1.25) 70#define PCI_DEVICE_ID_DT3004 0x0025
75 } 71#define PCI_DEVICE_ID_DT3005 0x0026
72#define PCI_DEVICE_ID_DT3001_PGL 0x0027
73#define PCI_DEVICE_ID_DT3003_PGL 0x0028
74
75static const struct comedi_lrange range_dt3000_ai = {
76 4, {
77 BIP_RANGE(10),
78 BIP_RANGE(5),
79 BIP_RANGE(2.5),
80 BIP_RANGE(1.25)
81 }
76}; 82};
77 83
78static const struct comedi_lrange range_dt3000_ai_pgl = { 4, { 84static const struct comedi_lrange range_dt3000_ai_pgl = {
79 RANGE(-10, 10), 85 4, {
80 RANGE(-1, 1), 86 BIP_RANGE(10),
81 RANGE(-0.1, 0.1), 87 BIP_RANGE(1),
82 RANGE(-0.02, 0.02) 88 BIP_RANGE(0.1),
83 } 89 BIP_RANGE(0.02)
90 }
84}; 91};
85 92
86struct dt3k_boardtype { 93struct dt3k_boardtype {
87
88 const char *name; 94 const char *name;
89 unsigned int device_id; 95 unsigned int device_id;
90 int adchan; 96 int adchan;
@@ -96,73 +102,70 @@ struct dt3k_boardtype {
96}; 102};
97 103
98static const struct dt3k_boardtype dt3k_boardtypes[] = { 104static const struct dt3k_boardtype dt3k_boardtypes[] = {
99 {.name = "dt3001", 105 {
100 .device_id = 0x22, 106 .name = "dt3001",
101 .adchan = 16, 107 .device_id = PCI_DEVICE_ID_DT3001,
102 .adbits = 12, 108 .adchan = 16,
103 .adrange = &range_dt3000_ai, 109 .adbits = 12,
104 .ai_speed = 3000, 110 .adrange = &range_dt3000_ai,
105 .dachan = 2, 111 .ai_speed = 3000,
106 .dabits = 12, 112 .dachan = 2,
107 }, 113 .dabits = 12,
108 {.name = "dt3001-pgl", 114 }, {
109 .device_id = 0x27, 115 .name = "dt3001-pgl",
110 .adchan = 16, 116 .device_id = PCI_DEVICE_ID_DT3001_PGL,
111 .adbits = 12, 117 .adchan = 16,
112 .adrange = &range_dt3000_ai_pgl, 118 .adbits = 12,
113 .ai_speed = 3000, 119 .adrange = &range_dt3000_ai_pgl,
114 .dachan = 2, 120 .ai_speed = 3000,
115 .dabits = 12, 121 .dachan = 2,
116 }, 122 .dabits = 12,
117 {.name = "dt3002", 123 }, {
118 .device_id = 0x23, 124 .name = "dt3002",
119 .adchan = 32, 125 .device_id = PCI_DEVICE_ID_DT3002,
120 .adbits = 12, 126 .adchan = 32,
121 .adrange = &range_dt3000_ai, 127 .adbits = 12,
122 .ai_speed = 3000, 128 .adrange = &range_dt3000_ai,
123 .dachan = 0, 129 .ai_speed = 3000,
124 .dabits = 0, 130 }, {
125 }, 131 .name = "dt3003",
126 {.name = "dt3003", 132 .device_id = PCI_DEVICE_ID_DT3003,
127 .device_id = 0x24, 133 .adchan = 64,
128 .adchan = 64, 134 .adbits = 12,
129 .adbits = 12, 135 .adrange = &range_dt3000_ai,
130 .adrange = &range_dt3000_ai, 136 .ai_speed = 3000,
131 .ai_speed = 3000, 137 .dachan = 2,
132 .dachan = 2, 138 .dabits = 12,
133 .dabits = 12, 139 }, {
134 }, 140 .name = "dt3003-pgl",
135 {.name = "dt3003-pgl", 141 .device_id = PCI_DEVICE_ID_DT3003_PGL,
136 .device_id = 0x28, 142 .adchan = 64,
137 .adchan = 64, 143 .adbits = 12,
138 .adbits = 12, 144 .adrange = &range_dt3000_ai_pgl,
139 .adrange = &range_dt3000_ai_pgl, 145 .ai_speed = 3000,
140 .ai_speed = 3000, 146 .dachan = 2,
141 .dachan = 2, 147 .dabits = 12,
142 .dabits = 12, 148 }, {
143 }, 149 .name = "dt3004",
144 {.name = "dt3004", 150 .device_id = PCI_DEVICE_ID_DT3004,
145 .device_id = 0x25, 151 .adchan = 16,
146 .adchan = 16, 152 .adbits = 16,
147 .adbits = 16, 153 .adrange = &range_dt3000_ai,
148 .adrange = &range_dt3000_ai, 154 .ai_speed = 10000,
149 .ai_speed = 10000, 155 .dachan = 2,
150 .dachan = 2, 156 .dabits = 12,
151 .dabits = 12, 157 }, {
152 }, 158 .name = "dt3005", /* a.k.a. 3004-200 */
153 {.name = "dt3005", /* a.k.a. 3004-200 */ 159 .device_id = PCI_DEVICE_ID_DT3005,
154 .device_id = 0x26, 160 .adchan = 16,
155 .adchan = 16, 161 .adbits = 16,
156 .adbits = 16, 162 .adrange = &range_dt3000_ai,
157 .adrange = &range_dt3000_ai, 163 .ai_speed = 5000,
158 .ai_speed = 5000, 164 .dachan = 2,
159 .dachan = 2, 165 .dabits = 12,
160 .dabits = 12, 166 },
161 },
162}; 167};
163 168
164#define this_board ((const struct dt3k_boardtype *)dev->board_ptr)
165
166#define DT3000_SIZE (4*0x1000) 169#define DT3000_SIZE (4*0x1000)
167 170
168/* dual-ported RAM location definitions */ 171/* dual-ported RAM location definitions */
@@ -257,22 +260,29 @@ struct dt3k_private {
257 unsigned int ai_rear; 260 unsigned int ai_rear;
258}; 261};
259 262
260#define devpriv ((struct dt3k_private *)dev->private)
261
262static void dt3k_ai_empty_fifo(struct comedi_device *dev,
263 struct comedi_subdevice *s);
264static int dt3k_ns_to_timer(unsigned int timer_base, unsigned int *arg,
265 unsigned int round_mode);
266static int dt3k_ai_cancel(struct comedi_device *dev,
267 struct comedi_subdevice *s);
268#ifdef DEBUG 263#ifdef DEBUG
269static void debug_intr_flags(unsigned int flags); 264static char *intr_flags[] = {
265 "AdFull", "AdSwError", "AdHwError", "DaEmpty",
266 "DaSwError", "DaHwError", "CtDone", "CmDone",
267};
268
269static void debug_intr_flags(unsigned int flags)
270{
271 int i;
272 printk(KERN_DEBUG "dt3k: intr_flags:");
273 for (i = 0; i < 8; i++) {
274 if (flags & (1 << i))
275 printk(KERN_CONT " %s", intr_flags[i]);
276 }
277 printk(KERN_CONT "\n");
278}
270#endif 279#endif
271 280
272#define TIMEOUT 100 281#define TIMEOUT 100
273 282
274static int dt3k_send_cmd(struct comedi_device *dev, unsigned int cmd) 283static void dt3k_send_cmd(struct comedi_device *dev, unsigned int cmd)
275{ 284{
285 struct dt3k_private *devpriv = dev->private;
276 int i; 286 int i;
277 unsigned int status = 0; 287 unsigned int status = 0;
278 288
@@ -284,19 +294,18 @@ static int dt3k_send_cmd(struct comedi_device *dev, unsigned int cmd)
284 break; 294 break;
285 udelay(1); 295 udelay(1);
286 } 296 }
287 if ((status & DT3000_COMPLETION_MASK) == DT3000_NOERROR)
288 return 0;
289
290 dev_dbg(dev->class_dev, "dt3k_send_cmd() timeout/error status=0x%04x\n",
291 status);
292 297
293 return -ETIME; 298 if ((status & DT3000_COMPLETION_MASK) != DT3000_NOERROR)
299 dev_dbg(dev->class_dev, "%s: timeout/error status=0x%04x\n",
300 __func__, status);
294} 301}
295 302
296static unsigned int dt3k_readsingle(struct comedi_device *dev, 303static unsigned int dt3k_readsingle(struct comedi_device *dev,
297 unsigned int subsys, unsigned int chan, 304 unsigned int subsys, unsigned int chan,
298 unsigned int gain) 305 unsigned int gain)
299{ 306{
307 struct dt3k_private *devpriv = dev->private;
308
300 writew(subsys, devpriv->io_addr + DPR_SubSys); 309 writew(subsys, devpriv->io_addr + DPR_SubSys);
301 310
302 writew(chan, devpriv->io_addr + DPR_Params(0)); 311 writew(chan, devpriv->io_addr + DPR_Params(0));
@@ -310,6 +319,8 @@ static unsigned int dt3k_readsingle(struct comedi_device *dev,
310static void dt3k_writesingle(struct comedi_device *dev, unsigned int subsys, 319static void dt3k_writesingle(struct comedi_device *dev, unsigned int subsys,
311 unsigned int chan, unsigned int data) 320 unsigned int chan, unsigned int data)
312{ 321{
322 struct dt3k_private *devpriv = dev->private;
323
313 writew(subsys, devpriv->io_addr + DPR_SubSys); 324 writew(subsys, devpriv->io_addr + DPR_SubSys);
314 325
315 writew(chan, devpriv->io_addr + DPR_Params(0)); 326 writew(chan, devpriv->io_addr + DPR_Params(0));
@@ -319,6 +330,47 @@ static void dt3k_writesingle(struct comedi_device *dev, unsigned int subsys,
319 dt3k_send_cmd(dev, CMD_WRITESINGLE); 330 dt3k_send_cmd(dev, CMD_WRITESINGLE);
320} 331}
321 332
333static void dt3k_ai_empty_fifo(struct comedi_device *dev,
334 struct comedi_subdevice *s)
335{
336 struct dt3k_private *devpriv = dev->private;
337 int front;
338 int rear;
339 int count;
340 int i;
341 short data;
342
343 front = readw(devpriv->io_addr + DPR_AD_Buf_Front);
344 count = front - devpriv->ai_front;
345 if (count < 0)
346 count += AI_FIFO_DEPTH;
347
348 rear = devpriv->ai_rear;
349
350 for (i = 0; i < count; i++) {
351 data = readw(devpriv->io_addr + DPR_ADC_buffer + rear);
352 comedi_buf_put(s->async, data);
353 rear++;
354 if (rear >= AI_FIFO_DEPTH)
355 rear = 0;
356 }
357
358 devpriv->ai_rear = rear;
359 writew(rear, devpriv->io_addr + DPR_AD_Buf_Rear);
360}
361
362static int dt3k_ai_cancel(struct comedi_device *dev, struct comedi_subdevice *s)
363{
364 struct dt3k_private *devpriv = dev->private;
365
366 writew(SUBS_AI, devpriv->io_addr + DPR_SubSys);
367 dt3k_send_cmd(dev, CMD_STOP);
368
369 writew(0, devpriv->io_addr + DPR_Int_Mask);
370
371 return 0;
372}
373
322static int debug_n_ints; 374static int debug_n_ints;
323 375
324/* FIXME! Assumes shared interrupt is for this card. */ 376/* FIXME! Assumes shared interrupt is for this card. */
@@ -326,6 +378,7 @@ static int debug_n_ints;
326static irqreturn_t dt3k_interrupt(int irq, void *d) 378static irqreturn_t dt3k_interrupt(int irq, void *d)
327{ 379{
328 struct comedi_device *dev = d; 380 struct comedi_device *dev = d;
381 struct dt3k_private *devpriv = dev->private;
329 struct comedi_subdevice *s; 382 struct comedi_subdevice *s;
330 unsigned int status; 383 unsigned int status;
331 384
@@ -356,57 +409,45 @@ static irqreturn_t dt3k_interrupt(int irq, void *d)
356 return IRQ_HANDLED; 409 return IRQ_HANDLED;
357} 410}
358 411
359#ifdef DEBUG 412static int dt3k_ns_to_timer(unsigned int timer_base, unsigned int *nanosec,
360static char *intr_flags[] = { 413 unsigned int round_mode)
361 "AdFull", "AdSwError", "AdHwError", "DaEmpty",
362 "DaSwError", "DaHwError", "CtDone", "CmDone",
363};
364
365static void debug_intr_flags(unsigned int flags)
366{
367 int i;
368 printk(KERN_DEBUG "dt3k: intr_flags:");
369 for (i = 0; i < 8; i++) {
370 if (flags & (1 << i))
371 printk(KERN_CONT " %s", intr_flags[i]);
372 }
373 printk(KERN_CONT "\n");
374}
375#endif
376
377static void dt3k_ai_empty_fifo(struct comedi_device *dev,
378 struct comedi_subdevice *s)
379{ 414{
380 int front; 415 int divider, base, prescale;
381 int rear;
382 int count;
383 int i;
384 short data;
385
386 front = readw(devpriv->io_addr + DPR_AD_Buf_Front);
387 count = front - devpriv->ai_front;
388 if (count < 0)
389 count += AI_FIFO_DEPTH;
390
391 dev_dbg(dev->class_dev, "reading %d samples\n", count);
392 416
393 rear = devpriv->ai_rear; 417 /* This function needs improvment */
418 /* Don't know if divider==0 works. */
394 419
395 for (i = 0; i < count; i++) { 420 for (prescale = 0; prescale < 16; prescale++) {
396 data = readw(devpriv->io_addr + DPR_ADC_buffer + rear); 421 base = timer_base * (prescale + 1);
397 comedi_buf_put(s->async, data); 422 switch (round_mode) {
398 rear++; 423 case TRIG_ROUND_NEAREST:
399 if (rear >= AI_FIFO_DEPTH) 424 default:
400 rear = 0; 425 divider = (*nanosec + base / 2) / base;
426 break;
427 case TRIG_ROUND_DOWN:
428 divider = (*nanosec) / base;
429 break;
430 case TRIG_ROUND_UP:
431 divider = (*nanosec) / base;
432 break;
433 }
434 if (divider < 65536) {
435 *nanosec = divider * base;
436 return (prescale << 16) | (divider);
437 }
401 } 438 }
402 439
403 devpriv->ai_rear = rear; 440 prescale = 15;
404 writew(rear, devpriv->io_addr + DPR_AD_Buf_Rear); 441 base = timer_base * (1 << prescale);
442 divider = 65535;
443 *nanosec = divider * base;
444 return (prescale << 16) | (divider);
405} 445}
406 446
407static int dt3k_ai_cmdtest(struct comedi_device *dev, 447static int dt3k_ai_cmdtest(struct comedi_device *dev,
408 struct comedi_subdevice *s, struct comedi_cmd *cmd) 448 struct comedi_subdevice *s, struct comedi_cmd *cmd)
409{ 449{
450 const struct dt3k_boardtype *this_board = comedi_board(dev);
410 int err = 0; 451 int err = 0;
411 int tmp; 452 int tmp;
412 453
@@ -427,54 +468,30 @@ static int dt3k_ai_cmdtest(struct comedi_device *dev,
427 if (err) 468 if (err)
428 return 2; 469 return 2;
429 470
430 /* step 3: make sure arguments are trivially compatible */ 471 /* Step 3: check if arguments are trivially valid */
431 472
432 if (cmd->start_arg != 0) { 473 err |= cfc_check_trigger_arg_is(&cmd->start_arg, 0);
433 cmd->start_arg = 0;
434 err++;
435 }
436 474
437 if (cmd->scan_begin_src == TRIG_TIMER) { 475 if (cmd->scan_begin_src == TRIG_TIMER) {
438 if (cmd->scan_begin_arg < this_board->ai_speed) { 476 err |= cfc_check_trigger_arg_min(&cmd->scan_begin_arg,
439 cmd->scan_begin_arg = this_board->ai_speed; 477 this_board->ai_speed);
440 err++; 478 err |= cfc_check_trigger_arg_max(&cmd->scan_begin_arg,
441 } 479 100 * 16 * 65535);
442 if (cmd->scan_begin_arg > 100 * 16 * 65535) {
443 cmd->scan_begin_arg = 100 * 16 * 65535;
444 err++;
445 }
446 } else {
447 /* not supported */
448 } 480 }
481
449 if (cmd->convert_src == TRIG_TIMER) { 482 if (cmd->convert_src == TRIG_TIMER) {
450 if (cmd->convert_arg < this_board->ai_speed) { 483 err |= cfc_check_trigger_arg_min(&cmd->convert_arg,
451 cmd->convert_arg = this_board->ai_speed; 484 this_board->ai_speed);
452 err++; 485 err |= cfc_check_trigger_arg_max(&cmd->convert_arg,
453 } 486 50 * 16 * 65535);
454 if (cmd->convert_arg > 50 * 16 * 65535) {
455 cmd->convert_arg = 50 * 16 * 65535;
456 err++;
457 }
458 } else {
459 /* not supported */
460 } 487 }
461 488
462 if (cmd->scan_end_arg != cmd->chanlist_len) { 489 err |= cfc_check_trigger_arg_is(&cmd->scan_end_arg, cmd->chanlist_len);
463 cmd->scan_end_arg = cmd->chanlist_len; 490
464 err++; 491 if (cmd->stop_src == TRIG_COUNT)
465 } 492 err |= cfc_check_trigger_arg_max(&cmd->stop_arg, 0x00ffffff);
466 if (cmd->stop_src == TRIG_COUNT) { 493 else /* TRIG_NONE */
467 if (cmd->stop_arg > 0x00ffffff) { 494 err |= cfc_check_trigger_arg_is(&cmd->stop_arg, 0);
468 cmd->stop_arg = 0x00ffffff;
469 err++;
470 }
471 } else {
472 /* TRIG_NONE */
473 if (cmd->stop_arg != 0) {
474 cmd->stop_arg = 0;
475 err++;
476 }
477 }
478 495
479 if (err) 496 if (err)
480 return 3; 497 return 3;
@@ -487,9 +504,8 @@ static int dt3k_ai_cmdtest(struct comedi_device *dev,
487 cmd->flags & TRIG_ROUND_MASK); 504 cmd->flags & TRIG_ROUND_MASK);
488 if (tmp != cmd->scan_begin_arg) 505 if (tmp != cmd->scan_begin_arg)
489 err++; 506 err++;
490 } else {
491 /* not supported */
492 } 507 }
508
493 if (cmd->convert_src == TRIG_TIMER) { 509 if (cmd->convert_src == TRIG_TIMER) {
494 tmp = cmd->convert_arg; 510 tmp = cmd->convert_arg;
495 dt3k_ns_to_timer(50, &cmd->convert_arg, 511 dt3k_ns_to_timer(50, &cmd->convert_arg,
@@ -503,8 +519,6 @@ static int dt3k_ai_cmdtest(struct comedi_device *dev,
503 cmd->convert_arg * cmd->scan_end_arg; 519 cmd->convert_arg * cmd->scan_end_arg;
504 err++; 520 err++;
505 } 521 }
506 } else {
507 /* not supported */
508 } 522 }
509 523
510 if (err) 524 if (err)
@@ -513,52 +527,16 @@ static int dt3k_ai_cmdtest(struct comedi_device *dev,
513 return 0; 527 return 0;
514} 528}
515 529
516static int dt3k_ns_to_timer(unsigned int timer_base, unsigned int *nanosec,
517 unsigned int round_mode)
518{
519 int divider, base, prescale;
520
521 /* This function needs improvment */
522 /* Don't know if divider==0 works. */
523
524 for (prescale = 0; prescale < 16; prescale++) {
525 base = timer_base * (prescale + 1);
526 switch (round_mode) {
527 case TRIG_ROUND_NEAREST:
528 default:
529 divider = (*nanosec + base / 2) / base;
530 break;
531 case TRIG_ROUND_DOWN:
532 divider = (*nanosec) / base;
533 break;
534 case TRIG_ROUND_UP:
535 divider = (*nanosec) / base;
536 break;
537 }
538 if (divider < 65536) {
539 *nanosec = divider * base;
540 return (prescale << 16) | (divider);
541 }
542 }
543
544 prescale = 15;
545 base = timer_base * (1 << prescale);
546 divider = 65535;
547 *nanosec = divider * base;
548 return (prescale << 16) | (divider);
549}
550
551static int dt3k_ai_cmd(struct comedi_device *dev, struct comedi_subdevice *s) 530static int dt3k_ai_cmd(struct comedi_device *dev, struct comedi_subdevice *s)
552{ 531{
532 struct dt3k_private *devpriv = dev->private;
553 struct comedi_cmd *cmd = &s->async->cmd; 533 struct comedi_cmd *cmd = &s->async->cmd;
554 int i; 534 int i;
555 unsigned int chan, range, aref; 535 unsigned int chan, range, aref;
556 unsigned int divider; 536 unsigned int divider;
557 unsigned int tscandiv; 537 unsigned int tscandiv;
558 int ret;
559 unsigned int mode; 538 unsigned int mode;
560 539
561 dev_dbg(dev->class_dev, "dt3k_ai_cmd:\n");
562 for (i = 0; i < cmd->chanlist_len; i++) { 540 for (i = 0; i < cmd->chanlist_len; i++) {
563 chan = CR_CHAN(cmd->chanlist[i]); 541 chan = CR_CHAN(cmd->chanlist[i]);
564 range = CR_RANGE(cmd->chanlist[i]); 542 range = CR_RANGE(cmd->chanlist[i]);
@@ -569,41 +547,29 @@ static int dt3k_ai_cmd(struct comedi_device *dev, struct comedi_subdevice *s)
569 aref = CR_AREF(cmd->chanlist[0]); 547 aref = CR_AREF(cmd->chanlist[0]);
570 548
571 writew(cmd->scan_end_arg, devpriv->io_addr + DPR_Params(0)); 549 writew(cmd->scan_end_arg, devpriv->io_addr + DPR_Params(0));
572 dev_dbg(dev->class_dev, "param[0]=0x%04x\n", cmd->scan_end_arg);
573 550
574 if (cmd->convert_src == TRIG_TIMER) { 551 if (cmd->convert_src == TRIG_TIMER) {
575 divider = dt3k_ns_to_timer(50, &cmd->convert_arg, 552 divider = dt3k_ns_to_timer(50, &cmd->convert_arg,
576 cmd->flags & TRIG_ROUND_MASK); 553 cmd->flags & TRIG_ROUND_MASK);
577 writew((divider >> 16), devpriv->io_addr + DPR_Params(1)); 554 writew((divider >> 16), devpriv->io_addr + DPR_Params(1));
578 dev_dbg(dev->class_dev, "param[1]=0x%04x\n", divider >> 16);
579 writew((divider & 0xffff), devpriv->io_addr + DPR_Params(2)); 555 writew((divider & 0xffff), devpriv->io_addr + DPR_Params(2));
580 dev_dbg(dev->class_dev, "param[2]=0x%04x\n", divider & 0xffff);
581 } else {
582 /* not supported */
583 } 556 }
584 557
585 if (cmd->scan_begin_src == TRIG_TIMER) { 558 if (cmd->scan_begin_src == TRIG_TIMER) {
586 tscandiv = dt3k_ns_to_timer(100, &cmd->scan_begin_arg, 559 tscandiv = dt3k_ns_to_timer(100, &cmd->scan_begin_arg,
587 cmd->flags & TRIG_ROUND_MASK); 560 cmd->flags & TRIG_ROUND_MASK);
588 writew((tscandiv >> 16), devpriv->io_addr + DPR_Params(3)); 561 writew((tscandiv >> 16), devpriv->io_addr + DPR_Params(3));
589 dev_dbg(dev->class_dev, "param[3]=0x%04x\n", tscandiv >> 16);
590 writew((tscandiv & 0xffff), devpriv->io_addr + DPR_Params(4)); 562 writew((tscandiv & 0xffff), devpriv->io_addr + DPR_Params(4));
591 dev_dbg(dev->class_dev, "param[4]=0x%04x\n", tscandiv & 0xffff);
592 } else {
593 /* not supported */
594 } 563 }
595 564
596 mode = DT3000_AD_RETRIG_INTERNAL | 0 | 0; 565 mode = DT3000_AD_RETRIG_INTERNAL | 0 | 0;
597 writew(mode, devpriv->io_addr + DPR_Params(5)); 566 writew(mode, devpriv->io_addr + DPR_Params(5));
598 dev_dbg(dev->class_dev, "param[5]=0x%04x\n", mode);
599 writew(aref == AREF_DIFF, devpriv->io_addr + DPR_Params(6)); 567 writew(aref == AREF_DIFF, devpriv->io_addr + DPR_Params(6));
600 dev_dbg(dev->class_dev, "param[6]=0x%04x\n", aref == AREF_DIFF);
601 568
602 writew(AI_FIFO_DEPTH / 2, devpriv->io_addr + DPR_Params(7)); 569 writew(AI_FIFO_DEPTH / 2, devpriv->io_addr + DPR_Params(7));
603 dev_dbg(dev->class_dev, "param[7]=0x%04x\n", AI_FIFO_DEPTH / 2);
604 570
605 writew(SUBS_AI, devpriv->io_addr + DPR_SubSys); 571 writew(SUBS_AI, devpriv->io_addr + DPR_SubSys);
606 ret = dt3k_send_cmd(dev, CMD_CONFIG); 572 dt3k_send_cmd(dev, CMD_CONFIG);
607 573
608 writew(DT3000_ADFULL | DT3000_ADSWERR | DT3000_ADHWERR, 574 writew(DT3000_ADFULL | DT3000_ADSWERR | DT3000_ADHWERR,
609 devpriv->io_addr + DPR_Int_Mask); 575 devpriv->io_addr + DPR_Int_Mask);
@@ -611,19 +577,7 @@ static int dt3k_ai_cmd(struct comedi_device *dev, struct comedi_subdevice *s)
611 debug_n_ints = 0; 577 debug_n_ints = 0;
612 578
613 writew(SUBS_AI, devpriv->io_addr + DPR_SubSys); 579 writew(SUBS_AI, devpriv->io_addr + DPR_SubSys);
614 ret = dt3k_send_cmd(dev, CMD_START); 580 dt3k_send_cmd(dev, CMD_START);
615
616 return 0;
617}
618
619static int dt3k_ai_cancel(struct comedi_device *dev, struct comedi_subdevice *s)
620{
621 int ret;
622
623 writew(SUBS_AI, devpriv->io_addr + DPR_SubSys);
624 ret = dt3k_send_cmd(dev, CMD_STOP);
625
626 writew(0, devpriv->io_addr + DPR_Int_Mask);
627 581
628 return 0; 582 return 0;
629} 583}
@@ -648,6 +602,7 @@ static int dt3k_ai_insn(struct comedi_device *dev, struct comedi_subdevice *s,
648static int dt3k_ao_insn(struct comedi_device *dev, struct comedi_subdevice *s, 602static int dt3k_ao_insn(struct comedi_device *dev, struct comedi_subdevice *s,
649 struct comedi_insn *insn, unsigned int *data) 603 struct comedi_insn *insn, unsigned int *data)
650{ 604{
605 struct dt3k_private *devpriv = dev->private;
651 int i; 606 int i;
652 unsigned int chan; 607 unsigned int chan;
653 608
@@ -664,6 +619,7 @@ static int dt3k_ao_insn_read(struct comedi_device *dev,
664 struct comedi_subdevice *s, 619 struct comedi_subdevice *s,
665 struct comedi_insn *insn, unsigned int *data) 620 struct comedi_insn *insn, unsigned int *data)
666{ 621{
622 struct dt3k_private *devpriv = dev->private;
667 int i; 623 int i;
668 unsigned int chan; 624 unsigned int chan;
669 625
@@ -676,6 +632,8 @@ static int dt3k_ao_insn_read(struct comedi_device *dev,
676 632
677static void dt3k_dio_config(struct comedi_device *dev, int bits) 633static void dt3k_dio_config(struct comedi_device *dev, int bits)
678{ 634{
635 struct dt3k_private *devpriv = dev->private;
636
679 /* XXX */ 637 /* XXX */
680 writew(SUBS_DOUT, devpriv->io_addr + DPR_SubSys); 638 writew(SUBS_DOUT, devpriv->io_addr + DPR_SubSys);
681 639
@@ -739,6 +697,7 @@ static int dt3k_mem_insn_read(struct comedi_device *dev,
739 struct comedi_subdevice *s, 697 struct comedi_subdevice *s,
740 struct comedi_insn *insn, unsigned int *data) 698 struct comedi_insn *insn, unsigned int *data)
741{ 699{
700 struct dt3k_private *devpriv = dev->private;
742 unsigned int addr = CR_CHAN(insn->chanspec); 701 unsigned int addr = CR_CHAN(insn->chanspec);
743 int i; 702 int i;
744 703
@@ -755,54 +714,42 @@ static int dt3k_mem_insn_read(struct comedi_device *dev,
755 return i; 714 return i;
756} 715}
757 716
758static struct pci_dev *dt3000_find_pci_dev(struct comedi_device *dev, 717static const void *dt3000_find_boardinfo(struct comedi_device *dev,
759 struct comedi_devconfig *it) 718 struct pci_dev *pcidev)
760{ 719{
761 struct pci_dev *pcidev = NULL; 720 const struct dt3k_boardtype *this_board;
762 int bus = it->options[0];
763 int slot = it->options[1];
764 int i; 721 int i;
765 722
766 for_each_pci_dev(pcidev) { 723 for (i = 0; i < ARRAY_SIZE(dt3k_boardtypes); i++) {
767 if (bus || slot) { 724 this_board = &dt3k_boardtypes[i];
768 if (bus != pcidev->bus->number || 725 if (this_board->device_id == pcidev->device)
769 slot != PCI_SLOT(pcidev->devfn)) 726 return this_board;
770 continue;
771 }
772 if (pcidev->vendor != PCI_VENDOR_ID_DT)
773 continue;
774 for (i = 0; i < ARRAY_SIZE(dt3k_boardtypes); i++) {
775 if (dt3k_boardtypes[i].device_id != pcidev->device)
776 continue;
777 dev->board_ptr = dt3k_boardtypes + i;
778 return pcidev;
779 }
780 } 727 }
781 dev_err(dev->class_dev,
782 "No supported board found! (req. bus %d, slot %d)\n",
783 bus, slot);
784 return NULL; 728 return NULL;
785} 729}
786 730
787static int dt3000_attach(struct comedi_device *dev, struct comedi_devconfig *it) 731static int dt3000_auto_attach(struct comedi_device *dev,
732 unsigned long context_unused)
788{ 733{
789 struct pci_dev *pcidev; 734 struct pci_dev *pcidev = comedi_to_pci_dev(dev);
735 const struct dt3k_boardtype *this_board;
736 struct dt3k_private *devpriv;
790 struct comedi_subdevice *s; 737 struct comedi_subdevice *s;
791 resource_size_t pci_base; 738 resource_size_t pci_base;
792 int ret = 0; 739 int ret = 0;
793 740
794 dev_dbg(dev->class_dev, "dt3000:\n"); 741 this_board = dt3000_find_boardinfo(dev, pcidev);
795 742 if (!this_board)
796 ret = alloc_private(dev, sizeof(struct dt3k_private)); 743 return -ENODEV;
797 if (ret < 0) 744 dev->board_ptr = this_board;
798 return ret; 745 dev->board_name = this_board->name;
799 746
800 pcidev = dt3000_find_pci_dev(dev, it); 747 devpriv = kzalloc(sizeof(*devpriv), GFP_KERNEL);
801 if (!pcidev) 748 if (!devpriv)
802 return -EIO; 749 return -ENOMEM;
803 comedi_set_hw_dev(dev, &pcidev->dev); 750 dev->private = devpriv;
804 751
805 ret = comedi_pci_enable(pcidev, "dt3000"); 752 ret = comedi_pci_enable(pcidev, dev->board_name);
806 if (ret < 0) 753 if (ret < 0)
807 return ret; 754 return ret;
808 dev->iobase = 1; /* the "detach" needs this */ 755 dev->iobase = 1; /* the "detach" needs this */
@@ -812,14 +759,10 @@ static int dt3000_attach(struct comedi_device *dev, struct comedi_devconfig *it)
812 if (!devpriv->io_addr) 759 if (!devpriv->io_addr)
813 return -ENOMEM; 760 return -ENOMEM;
814 761
815 dev->board_name = this_board->name; 762 ret = request_irq(pcidev->irq, dt3k_interrupt, IRQF_SHARED,
816 763 dev->board_name, dev);
817 if (request_irq(pcidev->irq, dt3k_interrupt, IRQF_SHARED, 764 if (ret)
818 "dt3000", dev)) { 765 return ret;
819 dev_err(dev->class_dev, "unable to allocate IRQ %u\n",
820 pcidev->irq);
821 return -EINVAL;
822 }
823 dev->irq = pcidev->irq; 766 dev->irq = pcidev->irq;
824 767
825 ret = comedi_alloc_subdevices(dev, 4); 768 ret = comedi_alloc_subdevices(dev, 4);
@@ -828,50 +771,49 @@ static int dt3000_attach(struct comedi_device *dev, struct comedi_devconfig *it)
828 771
829 s = &dev->subdevices[0]; 772 s = &dev->subdevices[0];
830 dev->read_subdev = s; 773 dev->read_subdev = s;
831
832 /* ai subdevice */ 774 /* ai subdevice */
833 s->type = COMEDI_SUBD_AI; 775 s->type = COMEDI_SUBD_AI;
834 s->subdev_flags = SDF_READABLE | SDF_GROUND | SDF_DIFF | SDF_CMD_READ; 776 s->subdev_flags = SDF_READABLE | SDF_GROUND | SDF_DIFF | SDF_CMD_READ;
835 s->n_chan = this_board->adchan; 777 s->n_chan = this_board->adchan;
836 s->insn_read = dt3k_ai_insn; 778 s->insn_read = dt3k_ai_insn;
837 s->maxdata = (1 << this_board->adbits) - 1; 779 s->maxdata = (1 << this_board->adbits) - 1;
838 s->len_chanlist = 512; 780 s->len_chanlist = 512;
839 s->range_table = &range_dt3000_ai; /* XXX */ 781 s->range_table = &range_dt3000_ai; /* XXX */
840 s->do_cmd = dt3k_ai_cmd; 782 s->do_cmd = dt3k_ai_cmd;
841 s->do_cmdtest = dt3k_ai_cmdtest; 783 s->do_cmdtest = dt3k_ai_cmdtest;
842 s->cancel = dt3k_ai_cancel; 784 s->cancel = dt3k_ai_cancel;
843 785
844 s = &dev->subdevices[1]; 786 s = &dev->subdevices[1];
845 /* ao subsystem */ 787 /* ao subsystem */
846 s->type = COMEDI_SUBD_AO; 788 s->type = COMEDI_SUBD_AO;
847 s->subdev_flags = SDF_WRITABLE; 789 s->subdev_flags = SDF_WRITABLE;
848 s->n_chan = 2; 790 s->n_chan = 2;
849 s->insn_read = dt3k_ao_insn_read; 791 s->insn_read = dt3k_ao_insn_read;
850 s->insn_write = dt3k_ao_insn; 792 s->insn_write = dt3k_ao_insn;
851 s->maxdata = (1 << this_board->dabits) - 1; 793 s->maxdata = (1 << this_board->dabits) - 1;
852 s->len_chanlist = 1; 794 s->len_chanlist = 1;
853 s->range_table = &range_bipolar10; 795 s->range_table = &range_bipolar10;
854 796
855 s = &dev->subdevices[2]; 797 s = &dev->subdevices[2];
856 /* dio subsystem */ 798 /* dio subsystem */
857 s->type = COMEDI_SUBD_DIO; 799 s->type = COMEDI_SUBD_DIO;
858 s->subdev_flags = SDF_READABLE | SDF_WRITABLE; 800 s->subdev_flags = SDF_READABLE | SDF_WRITABLE;
859 s->n_chan = 8; 801 s->n_chan = 8;
860 s->insn_config = dt3k_dio_insn_config; 802 s->insn_config = dt3k_dio_insn_config;
861 s->insn_bits = dt3k_dio_insn_bits; 803 s->insn_bits = dt3k_dio_insn_bits;
862 s->maxdata = 1; 804 s->maxdata = 1;
863 s->len_chanlist = 8; 805 s->len_chanlist = 8;
864 s->range_table = &range_digital; 806 s->range_table = &range_digital;
865 807
866 s = &dev->subdevices[3]; 808 s = &dev->subdevices[3];
867 /* mem subsystem */ 809 /* mem subsystem */
868 s->type = COMEDI_SUBD_MEMORY; 810 s->type = COMEDI_SUBD_MEMORY;
869 s->subdev_flags = SDF_READABLE; 811 s->subdev_flags = SDF_READABLE;
870 s->n_chan = 0x1000; 812 s->n_chan = 0x1000;
871 s->insn_read = dt3k_mem_insn_read; 813 s->insn_read = dt3k_mem_insn_read;
872 s->maxdata = 0xff; 814 s->maxdata = 0xff;
873 s->len_chanlist = 1; 815 s->len_chanlist = 1;
874 s->range_table = &range_unknown; 816 s->range_table = &range_unknown;
875 817
876#if 0 818#if 0
877 s = &dev->subdevices[4]; 819 s = &dev->subdevices[4];
@@ -879,12 +821,15 @@ static int dt3000_attach(struct comedi_device *dev, struct comedi_devconfig *it)
879 s->type = COMEDI_SUBD_PROC; 821 s->type = COMEDI_SUBD_PROC;
880#endif 822#endif
881 823
824 dev_info(dev->class_dev, "%s attached\n", dev->board_name);
825
882 return 0; 826 return 0;
883} 827}
884 828
885static void dt3000_detach(struct comedi_device *dev) 829static void dt3000_detach(struct comedi_device *dev)
886{ 830{
887 struct pci_dev *pcidev = comedi_to_pci_dev(dev); 831 struct pci_dev *pcidev = comedi_to_pci_dev(dev);
832 struct dt3k_private *devpriv = dev->private;
888 833
889 if (dev->irq) 834 if (dev->irq)
890 free_irq(dev->irq, dev); 835 free_irq(dev->irq, dev);
@@ -895,36 +840,35 @@ static void dt3000_detach(struct comedi_device *dev)
895 if (pcidev) { 840 if (pcidev) {
896 if (dev->iobase) 841 if (dev->iobase)
897 comedi_pci_disable(pcidev); 842 comedi_pci_disable(pcidev);
898 pci_dev_put(pcidev);
899 } 843 }
900} 844}
901 845
902static struct comedi_driver dt3000_driver = { 846static struct comedi_driver dt3000_driver = {
903 .driver_name = "dt3000", 847 .driver_name = "dt3000",
904 .module = THIS_MODULE, 848 .module = THIS_MODULE,
905 .attach = dt3000_attach, 849 .auto_attach = dt3000_auto_attach,
906 .detach = dt3000_detach, 850 .detach = dt3000_detach,
907}; 851};
908 852
909static int __devinit dt3000_pci_probe(struct pci_dev *dev, 853static int dt3000_pci_probe(struct pci_dev *dev,
910 const struct pci_device_id *ent) 854 const struct pci_device_id *ent)
911{ 855{
912 return comedi_pci_auto_config(dev, &dt3000_driver); 856 return comedi_pci_auto_config(dev, &dt3000_driver);
913} 857}
914 858
915static void __devexit dt3000_pci_remove(struct pci_dev *dev) 859static void dt3000_pci_remove(struct pci_dev *dev)
916{ 860{
917 comedi_pci_auto_unconfig(dev); 861 comedi_pci_auto_unconfig(dev);
918} 862}
919 863
920static DEFINE_PCI_DEVICE_TABLE(dt3000_pci_table) = { 864static DEFINE_PCI_DEVICE_TABLE(dt3000_pci_table) = {
921 { PCI_DEVICE(PCI_VENDOR_ID_DT, 0x0022) }, 865 { PCI_DEVICE(PCI_VENDOR_ID_DT, PCI_DEVICE_ID_DT3001) },
922 { PCI_DEVICE(PCI_VENDOR_ID_DT, 0x0027) }, 866 { PCI_DEVICE(PCI_VENDOR_ID_DT, PCI_DEVICE_ID_DT3001_PGL) },
923 { PCI_DEVICE(PCI_VENDOR_ID_DT, 0x0023) }, 867 { PCI_DEVICE(PCI_VENDOR_ID_DT, PCI_DEVICE_ID_DT3002) },
924 { PCI_DEVICE(PCI_VENDOR_ID_DT, 0x0024) }, 868 { PCI_DEVICE(PCI_VENDOR_ID_DT, PCI_DEVICE_ID_DT3003) },
925 { PCI_DEVICE(PCI_VENDOR_ID_DT, 0x0028) }, 869 { PCI_DEVICE(PCI_VENDOR_ID_DT, PCI_DEVICE_ID_DT3003_PGL) },
926 { PCI_DEVICE(PCI_VENDOR_ID_DT, 0x0025) }, 870 { PCI_DEVICE(PCI_VENDOR_ID_DT, PCI_DEVICE_ID_DT3004) },
927 { PCI_DEVICE(PCI_VENDOR_ID_DT, 0x0026) }, 871 { PCI_DEVICE(PCI_VENDOR_ID_DT, PCI_DEVICE_ID_DT3005) },
928 { 0 } 872 { 0 }
929}; 873};
930MODULE_DEVICE_TABLE(pci, dt3000_pci_table); 874MODULE_DEVICE_TABLE(pci, dt3000_pci_table);
@@ -933,7 +877,7 @@ static struct pci_driver dt3000_pci_driver = {
933 .name = "dt3000", 877 .name = "dt3000",
934 .id_table = dt3000_pci_table, 878 .id_table = dt3000_pci_table,
935 .probe = dt3000_pci_probe, 879 .probe = dt3000_pci_probe,
936 .remove = __devexit_p(dt3000_pci_remove), 880 .remove = dt3000_pci_remove,
937}; 881};
938module_comedi_pci_driver(dt3000_driver, dt3000_pci_driver); 882module_comedi_pci_driver(dt3000_driver, dt3000_pci_driver);
939 883
diff --git a/drivers/staging/comedi/drivers/dt9812.c b/drivers/staging/comedi/drivers/dt9812.c
index bc6f409b7e19..176799849d20 100644
--- a/drivers/staging/comedi/drivers/dt9812.c
+++ b/drivers/staging/comedi/drivers/dt9812.c
@@ -43,6 +43,8 @@ for my needs.
43 * says P1). 43 * says P1).
44 */ 44 */
45 45
46#define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
47
46#include <linux/kernel.h> 48#include <linux/kernel.h>
47#include <linux/errno.h> 49#include <linux/errno.h>
48#include <linux/init.h> 50#include <linux/init.h>
@@ -323,9 +325,6 @@ static const struct comedi_lrange dt9812_2pt5_aout_range = { 1, {
323 325
324static struct slot_dt9812 dt9812[DT9812_NUM_SLOTS]; 326static struct slot_dt9812 dt9812[DT9812_NUM_SLOTS];
325 327
326/* Useful shorthand access to private data */
327#define devpriv ((struct comedi_dt9812 *)dev->private)
328
329static inline struct usb_dt9812 *to_dt9812_dev(struct kref *d) 328static inline struct usb_dt9812 *to_dt9812_dev(struct kref *d)
330{ 329{
331 return container_of(d, struct usb_dt9812, kref); 330 return container_of(d, struct usb_dt9812, kref);
@@ -893,6 +892,7 @@ static struct usb_driver dt9812_usb_driver = {
893 892
894static int dt9812_comedi_open(struct comedi_device *dev) 893static int dt9812_comedi_open(struct comedi_device *dev)
895{ 894{
895 struct comedi_dt9812 *devpriv = dev->private;
896 int result = -ENODEV; 896 int result = -ENODEV;
897 897
898 down(&devpriv->slot->mutex); 898 down(&devpriv->slot->mutex);
@@ -947,6 +947,7 @@ static int dt9812_di_rinsn(struct comedi_device *dev,
947 struct comedi_subdevice *s, struct comedi_insn *insn, 947 struct comedi_subdevice *s, struct comedi_insn *insn,
948 unsigned int *data) 948 unsigned int *data)
949{ 949{
950 struct comedi_dt9812 *devpriv = dev->private;
950 int n; 951 int n;
951 u8 bits = 0; 952 u8 bits = 0;
952 953
@@ -960,6 +961,7 @@ static int dt9812_do_winsn(struct comedi_device *dev,
960 struct comedi_subdevice *s, struct comedi_insn *insn, 961 struct comedi_subdevice *s, struct comedi_insn *insn,
961 unsigned int *data) 962 unsigned int *data)
962{ 963{
964 struct comedi_dt9812 *devpriv = dev->private;
963 int n; 965 int n;
964 u8 bits = 0; 966 u8 bits = 0;
965 967
@@ -979,6 +981,7 @@ static int dt9812_ai_rinsn(struct comedi_device *dev,
979 struct comedi_subdevice *s, struct comedi_insn *insn, 981 struct comedi_subdevice *s, struct comedi_insn *insn,
980 unsigned int *data) 982 unsigned int *data)
981{ 983{
984 struct comedi_dt9812 *devpriv = dev->private;
982 int n; 985 int n;
983 986
984 for (n = 0; n < insn->n; n++) { 987 for (n = 0; n < insn->n; n++) {
@@ -995,6 +998,7 @@ static int dt9812_ao_rinsn(struct comedi_device *dev,
995 struct comedi_subdevice *s, struct comedi_insn *insn, 998 struct comedi_subdevice *s, struct comedi_insn *insn,
996 unsigned int *data) 999 unsigned int *data)
997{ 1000{
1001 struct comedi_dt9812 *devpriv = dev->private;
998 int n; 1002 int n;
999 u16 value; 1003 u16 value;
1000 1004
@@ -1010,6 +1014,7 @@ static int dt9812_ao_winsn(struct comedi_device *dev,
1010 struct comedi_subdevice *s, struct comedi_insn *insn, 1014 struct comedi_subdevice *s, struct comedi_insn *insn,
1011 unsigned int *data) 1015 unsigned int *data)
1012{ 1016{
1017 struct comedi_dt9812 *devpriv = dev->private;
1013 int n; 1018 int n;
1014 1019
1015 for (n = 0; n < insn->n; n++) 1020 for (n = 0; n < insn->n; n++)
@@ -1019,14 +1024,17 @@ static int dt9812_ao_winsn(struct comedi_device *dev,
1019 1024
1020static int dt9812_attach(struct comedi_device *dev, struct comedi_devconfig *it) 1025static int dt9812_attach(struct comedi_device *dev, struct comedi_devconfig *it)
1021{ 1026{
1027 struct comedi_dt9812 *devpriv;
1022 int i; 1028 int i;
1023 struct comedi_subdevice *s; 1029 struct comedi_subdevice *s;
1024 int ret; 1030 int ret;
1025 1031
1026 dev->board_name = "dt9812"; 1032 dev->board_name = "dt9812";
1027 1033
1028 if (alloc_private(dev, sizeof(struct comedi_dt9812)) < 0) 1034 devpriv = kzalloc(sizeof(*devpriv), GFP_KERNEL);
1035 if (!devpriv)
1029 return -ENOMEM; 1036 return -ENOMEM;
1037 dev->private = devpriv;
1030 1038
1031 /* 1039 /*
1032 * Special open routine, since USB unit may be unattached at 1040 * Special open routine, since USB unit may be unattached at
@@ -1077,8 +1085,7 @@ static int dt9812_attach(struct comedi_device *dev, struct comedi_devconfig *it)
1077 s->insn_write = &dt9812_ao_winsn; 1085 s->insn_write = &dt9812_ao_winsn;
1078 s->insn_read = &dt9812_ao_rinsn; 1086 s->insn_read = &dt9812_ao_rinsn;
1079 1087
1080 printk(KERN_INFO "comedi%d: successfully attached to dt9812.\n", 1088 dev_info(dev->class_dev, "successfully attached to dt9812.\n");
1081 dev->minor);
1082 1089
1083 down(&dt9812_mutex); 1090 down(&dt9812_mutex);
1084 /* Find a slot for the comedi device */ 1091 /* Find a slot for the comedi device */
@@ -1140,17 +1147,15 @@ static int __init usb_dt9812_init(void)
1140 /* register with the USB subsystem */ 1147 /* register with the USB subsystem */
1141 result = usb_register(&dt9812_usb_driver); 1148 result = usb_register(&dt9812_usb_driver);
1142 if (result) { 1149 if (result) {
1143 printk(KERN_ERR KBUILD_MODNAME 1150 pr_err("usb_register failed. Error number %d\n", result);
1144 ": usb_register failed. Error number %d\n", result);
1145 return result; 1151 return result;
1146 } 1152 }
1147 /* register with comedi */ 1153 /* register with comedi */
1148 result = comedi_driver_register(&dt9812_comedi_driver); 1154 result = comedi_driver_register(&dt9812_comedi_driver);
1149 if (result) { 1155 if (result) {
1150 usb_deregister(&dt9812_usb_driver); 1156 usb_deregister(&dt9812_usb_driver);
1151 printk(KERN_ERR KBUILD_MODNAME 1157 pr_err("comedi_driver_register failed. Error number %d\n",
1152 ": comedi_driver_register failed. Error number %d\n", 1158 result);
1153 result);
1154 } 1159 }
1155 1160
1156 return result; 1161 return result;
diff --git a/drivers/staging/comedi/drivers/dyna_pci10xx.c b/drivers/staging/comedi/drivers/dyna_pci10xx.c
index 6f612be1b0a5..8497a36db7db 100644
--- a/drivers/staging/comedi/drivers/dyna_pci10xx.c
+++ b/drivers/staging/comedi/drivers/dyna_pci10xx.c
@@ -40,8 +40,6 @@
40#include "../comedidev.h" 40#include "../comedidev.h"
41#include <linux/mutex.h> 41#include <linux/mutex.h>
42 42
43#define PCI_VENDOR_ID_DYNALOG 0x10b5
44
45#define READ_TIMEOUT 50 43#define READ_TIMEOUT 50
46 44
47static const struct comedi_lrange range_pci1050_ai = { 3, { 45static const struct comedi_lrange range_pci1050_ai = { 3, {
@@ -179,21 +177,20 @@ static int dyna_pci10xx_do_insn_bits(struct comedi_device *dev,
179 return insn->n; 177 return insn->n;
180} 178}
181 179
182static int dyna_pci10xx_attach_pci(struct comedi_device *dev, 180static int dyna_pci10xx_auto_attach(struct comedi_device *dev,
183 struct pci_dev *pcidev) 181 unsigned long context_unused)
184{ 182{
183 struct pci_dev *pcidev = comedi_to_pci_dev(dev);
185 struct dyna_pci10xx_private *devpriv; 184 struct dyna_pci10xx_private *devpriv;
186 struct comedi_subdevice *s; 185 struct comedi_subdevice *s;
187 int ret; 186 int ret;
188 187
189 comedi_set_hw_dev(dev, &pcidev->dev);
190
191 dev->board_name = dev->driver->driver_name; 188 dev->board_name = dev->driver->driver_name;
192 189
193 ret = alloc_private(dev, sizeof(*devpriv)); 190 devpriv = kzalloc(sizeof(*devpriv), GFP_KERNEL);
194 if (ret) 191 if (!devpriv)
195 return ret; 192 return -ENOMEM;
196 devpriv = dev->private; 193 dev->private = devpriv;
197 194
198 ret = comedi_pci_enable(pcidev, dev->board_name); 195 ret = comedi_pci_enable(pcidev, dev->board_name);
199 if (ret) 196 if (ret)
@@ -269,23 +266,23 @@ static void dyna_pci10xx_detach(struct comedi_device *dev)
269static struct comedi_driver dyna_pci10xx_driver = { 266static struct comedi_driver dyna_pci10xx_driver = {
270 .driver_name = "dyna_pci10xx", 267 .driver_name = "dyna_pci10xx",
271 .module = THIS_MODULE, 268 .module = THIS_MODULE,
272 .attach_pci = dyna_pci10xx_attach_pci, 269 .auto_attach = dyna_pci10xx_auto_attach,
273 .detach = dyna_pci10xx_detach, 270 .detach = dyna_pci10xx_detach,
274}; 271};
275 272
276static int __devinit dyna_pci10xx_pci_probe(struct pci_dev *dev, 273static int dyna_pci10xx_pci_probe(struct pci_dev *dev,
277 const struct pci_device_id *ent) 274 const struct pci_device_id *ent)
278{ 275{
279 return comedi_pci_auto_config(dev, &dyna_pci10xx_driver); 276 return comedi_pci_auto_config(dev, &dyna_pci10xx_driver);
280} 277}
281 278
282static void __devexit dyna_pci10xx_pci_remove(struct pci_dev *dev) 279static void dyna_pci10xx_pci_remove(struct pci_dev *dev)
283{ 280{
284 comedi_pci_auto_unconfig(dev); 281 comedi_pci_auto_unconfig(dev);
285} 282}
286 283
287static DEFINE_PCI_DEVICE_TABLE(dyna_pci10xx_pci_table) = { 284static DEFINE_PCI_DEVICE_TABLE(dyna_pci10xx_pci_table) = {
288 { PCI_DEVICE(PCI_VENDOR_ID_DYNALOG, 0x1050) }, 285 { PCI_DEVICE(PCI_VENDOR_ID_PLX, 0x1050) },
289 { 0 } 286 { 0 }
290}; 287};
291MODULE_DEVICE_TABLE(pci, dyna_pci10xx_pci_table); 288MODULE_DEVICE_TABLE(pci, dyna_pci10xx_pci_table);
@@ -294,7 +291,7 @@ static struct pci_driver dyna_pci10xx_pci_driver = {
294 .name = "dyna_pci10xx", 291 .name = "dyna_pci10xx",
295 .id_table = dyna_pci10xx_pci_table, 292 .id_table = dyna_pci10xx_pci_table,
296 .probe = dyna_pci10xx_pci_probe, 293 .probe = dyna_pci10xx_pci_probe,
297 .remove = __devexit_p(dyna_pci10xx_pci_remove), 294 .remove = dyna_pci10xx_pci_remove,
298}; 295};
299module_comedi_pci_driver(dyna_pci10xx_driver, dyna_pci10xx_pci_driver); 296module_comedi_pci_driver(dyna_pci10xx_driver, dyna_pci10xx_pci_driver);
300 297
diff --git a/drivers/staging/comedi/drivers/fl512.c b/drivers/staging/comedi/drivers/fl512.c
index ae8e8f460295..019c96eda6fd 100644
--- a/drivers/staging/comedi/drivers/fl512.c
+++ b/drivers/staging/comedi/drivers/fl512.c
@@ -29,8 +29,6 @@ struct fl512_private {
29 short ao_readback[2]; 29 short ao_readback[2];
30}; 30};
31 31
32#define devpriv ((struct fl512_private *) dev->private)
33
34static const struct comedi_lrange range_fl512 = { 4, { 32static const struct comedi_lrange range_fl512 = { 4, {
35 BIP_RANGE(0.5), 33 BIP_RANGE(0.5),
36 BIP_RANGE(1), 34 BIP_RANGE(1),
@@ -75,6 +73,7 @@ static int fl512_ao_insn(struct comedi_device *dev,
75 struct comedi_subdevice *s, struct comedi_insn *insn, 73 struct comedi_subdevice *s, struct comedi_insn *insn,
76 unsigned int *data) 74 unsigned int *data)
77{ 75{
76 struct fl512_private *devpriv = dev->private;
78 int n; 77 int n;
79 int chan = CR_CHAN(insn->chanspec); /* get chan to write */ 78 int chan = CR_CHAN(insn->chanspec); /* get chan to write */
80 unsigned long iobase = dev->iobase; /* get base address */ 79 unsigned long iobase = dev->iobase; /* get base address */
@@ -99,6 +98,7 @@ static int fl512_ao_insn_readback(struct comedi_device *dev,
99 struct comedi_subdevice *s, 98 struct comedi_subdevice *s,
100 struct comedi_insn *insn, unsigned int *data) 99 struct comedi_insn *insn, unsigned int *data)
101{ 100{
101 struct fl512_private *devpriv = dev->private;
102 int n; 102 int n;
103 int chan = CR_CHAN(insn->chanspec); 103 int chan = CR_CHAN(insn->chanspec);
104 104
@@ -110,6 +110,7 @@ static int fl512_ao_insn_readback(struct comedi_device *dev,
110 110
111static int fl512_attach(struct comedi_device *dev, struct comedi_devconfig *it) 111static int fl512_attach(struct comedi_device *dev, struct comedi_devconfig *it)
112{ 112{
113 struct fl512_private *devpriv;
113 unsigned long iobase; 114 unsigned long iobase;
114 int ret; 115 int ret;
115 116
@@ -125,8 +126,11 @@ static int fl512_attach(struct comedi_device *dev, struct comedi_devconfig *it)
125 } 126 }
126 dev->iobase = iobase; 127 dev->iobase = iobase;
127 dev->board_name = "fl512"; 128 dev->board_name = "fl512";
128 if (alloc_private(dev, sizeof(struct fl512_private)) < 0) 129
130 devpriv = kzalloc(sizeof(*devpriv), GFP_KERNEL);
131 if (!devpriv)
129 return -ENOMEM; 132 return -ENOMEM;
133 dev->private = devpriv;
130 134
131#if DEBUG 135#if DEBUG
132 printk(KERN_DEBUG "malloc ok\n"); 136 printk(KERN_DEBUG "malloc ok\n");
diff --git a/drivers/staging/comedi/drivers/gsc_hpdi.c b/drivers/staging/comedi/drivers/gsc_hpdi.c
index abff6603952a..154598f6d5e3 100644
--- a/drivers/staging/comedi/drivers/gsc_hpdi.c
+++ b/drivers/staging/comedi/drivers/gsc_hpdi.c
@@ -26,24 +26,26 @@
26************************************************************************/ 26************************************************************************/
27 27
28/* 28/*
29 * Driver: gsc_hpdi
30 * Description: General Standards Corporation High
31 * Speed Parallel Digital Interface rs485 boards
32 * Author: Frank Mori Hess <fmhess@users.sourceforge.net>
33 * Status: only receive mode works, transmit not supported
34 * Updated: Thu, 01 Nov 2012 16:17:38 +0000
35 * Devices: [General Standards Corporation] PCI-HPDI32 (gsc_hpdi),
36 * PMC-HPDI32
37 *
38 * Configuration options:
39 * None.
40 *
41 * Manual configuration of supported devices is not supported; they are
42 * configured automatically.
43 *
44 * There are some additional hpdi models available from GSC for which
45 * support could be added to this driver.
46 */
29 47
30Driver: gsc_hpdi 48#define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
31Description: General Standards Corporation High
32 Speed Parallel Digital Interface rs485 boards
33Author: Frank Mori Hess <fmhess@users.sourceforge.net>
34Status: only receive mode works, transmit not supported
35Updated: 2003-02-20
36Devices: [General Standards Corporation] PCI-HPDI32 (gsc_hpdi),
37 PMC-HPDI32
38
39Configuration options:
40 [0] - PCI bus of device (optional)
41 [1] - PCI slot of device (optional)
42
43There are some additional hpdi models available from GSC for which
44support could be added to this driver.
45
46*/
47 49
48#include <linux/interrupt.h> 50#include <linux/interrupt.h>
49#include "../comedidev.h" 51#include "../comedidev.h"
@@ -64,9 +66,9 @@ static int dio_config_block_size(struct comedi_device *dev, unsigned int *data);
64/* #define HPDI_DEBUG enable debugging code */ 66/* #define HPDI_DEBUG enable debugging code */
65 67
66#ifdef HPDI_DEBUG 68#ifdef HPDI_DEBUG
67#define DEBUG_PRINT(format, args...) printk(format , ## args) 69#define DEBUG_PRINT(format, args...) pr_debug(format , ## args)
68#else 70#else
69#define DEBUG_PRINT(format, args...) 71#define DEBUG_PRINT(format, args...) no_printk(pr_fmt(format), ## args)
70#endif 72#endif
71 73
72#define TIMER_BASE 50 /* 20MHz master clock */ 74#define TIMER_BASE 50 /* 20MHz master clock */
@@ -104,35 +106,11 @@ enum hpdi_registers {
104 INTERRUPT_POLARITY_REG = 0x54, 106 INTERRUPT_POLARITY_REG = 0x54,
105}; 107};
106 108
107int command_channel_valid(unsigned int channel)
108{
109 if (channel == 0 || channel > 6) {
110 printk(KERN_WARNING
111 "gsc_hpdi: bug! invalid cable command channel\n");
112 return 0;
113 }
114 return 1;
115}
116
117/* bit definitions */ 109/* bit definitions */
118 110
119enum firmware_revision_bits { 111enum firmware_revision_bits {
120 FEATURES_REG_PRESENT_BIT = 0x8000, 112 FEATURES_REG_PRESENT_BIT = 0x8000,
121}; 113};
122int firmware_revision(uint32_t fwr_bits)
123{
124 return fwr_bits & 0xff;
125}
126
127int pcb_revision(uint32_t fwr_bits)
128{
129 return (fwr_bits >> 8) & 0xff;
130}
131
132int hpdi_subid(uint32_t fwr_bits)
133{
134 return (fwr_bits >> 16) & 0xff;
135}
136 114
137enum board_control_bits { 115enum board_control_bits {
138 BOARD_RESET_BIT = 0x1, /* wait 10usec before accessing fifos */ 116 BOARD_RESET_BIT = 0x1, /* wait 10usec before accessing fifos */
@@ -147,22 +125,6 @@ enum board_control_bits {
147 CABLE_THROTTLE_ENABLE_BIT = 0x20, 125 CABLE_THROTTLE_ENABLE_BIT = 0x20,
148 TEST_MODE_ENABLE_BIT = 0x80000000, 126 TEST_MODE_ENABLE_BIT = 0x80000000,
149}; 127};
150uint32_t command_discrete_output_bits(unsigned int channel, int output,
151 int output_value)
152{
153 uint32_t bits = 0;
154
155 if (command_channel_valid(channel) == 0)
156 return 0;
157 if (output) {
158 bits |= 0x1 << (16 + channel);
159 if (output_value)
160 bits |= 0x1 << (24 + channel);
161 } else
162 bits |= 0x1 << (24 + channel);
163
164 return bits;
165}
166 128
167enum board_status_bits { 129enum board_status_bits {
168 COMMAND_LINE_STATUS_MASK = 0x7f, 130 COMMAND_LINE_STATUS_MASK = 0x7f,
@@ -182,28 +144,17 @@ enum board_status_bits {
182 RX_OVERRUN_BIT = 0x800000, 144 RX_OVERRUN_BIT = 0x800000,
183}; 145};
184 146
185uint32_t almost_full_bits(unsigned int num_words) 147static uint32_t almost_full_bits(unsigned int num_words)
186{ 148{
187/* XXX need to add or subtract one? */ 149 /* XXX need to add or subtract one? */
188 return (num_words << 16) & 0xff0000; 150 return (num_words << 16) & 0xff0000;
189} 151}
190 152
191uint32_t almost_empty_bits(unsigned int num_words) 153static uint32_t almost_empty_bits(unsigned int num_words)
192{ 154{
193 return num_words & 0xffff; 155 return num_words & 0xffff;
194} 156}
195 157
196unsigned int almost_full_num_words(uint32_t bits)
197{
198/* XXX need to add or subtract one? */
199 return (bits >> 16) & 0xffff;
200}
201
202unsigned int almost_empty_num_words(uint32_t bits)
203{
204 return bits & 0xffff;
205}
206
207enum features_bits { 158enum features_bits {
208 FIFO_SIZE_PRESENT_BIT = 0x1, 159 FIFO_SIZE_PRESENT_BIT = 0x1,
209 FIFO_WORDS_PRESENT_BIT = 0x2, 160 FIFO_WORDS_PRESENT_BIT = 0x2,
@@ -225,46 +176,19 @@ enum interrupt_sources {
225 RX_ALMOST_FULL_INTR = 14, 176 RX_ALMOST_FULL_INTR = 14,
226 RX_FULL_INTR = 15, 177 RX_FULL_INTR = 15,
227}; 178};
228int command_intr_source(unsigned int channel)
229{
230 if (command_channel_valid(channel) == 0)
231 channel = 1;
232 return channel + 1;
233}
234 179
235uint32_t intr_bit(int interrupt_source) 180static uint32_t intr_bit(int interrupt_source)
236{ 181{
237 return 0x1 << interrupt_source; 182 return 0x1 << interrupt_source;
238} 183}
239 184
240uint32_t tx_clock_divisor_bits(unsigned int divisor) 185static unsigned int fifo_size(uint32_t fifo_size_bits)
241{
242 return divisor & 0xff;
243}
244
245unsigned int fifo_size(uint32_t fifo_size_bits)
246{ 186{
247 return fifo_size_bits & 0xfffff; 187 return fifo_size_bits & 0xfffff;
248} 188}
249 189
250unsigned int fifo_words(uint32_t fifo_words_bits)
251{
252 return fifo_words_bits & 0xfffff;
253}
254
255uint32_t intr_edge_bit(int interrupt_source)
256{
257 return 0x1 << interrupt_source;
258}
259
260uint32_t intr_active_high_bit(int interrupt_source)
261{
262 return 0x1 << interrupt_source;
263}
264
265struct hpdi_board { 190struct hpdi_board {
266 191 const char *name; /* board name */
267 char *name;
268 int device_id; /* pci device id */ 192 int device_id; /* pci device id */
269 int subdevice_id; /* pci subdevice id */ 193 int subdevice_id; /* pci subdevice id */
270}; 194};
@@ -284,17 +208,7 @@ static const struct hpdi_board hpdi_boards[] = {
284#endif 208#endif
285}; 209};
286 210
287static inline struct hpdi_board *board(const struct comedi_device *dev)
288{
289 return (struct hpdi_board *)dev->board_ptr;
290}
291
292struct hpdi_private { 211struct hpdi_private {
293
294 struct pci_dev *hw_dev; /* pointer to board's pci_dev struct */
295 /* base addresses (physical) */
296 resource_size_t plx9080_phys_iobase;
297 resource_size_t hpdi_phys_iobase;
298 /* base addresses (ioremapped) */ 212 /* base addresses (ioremapped) */
299 void __iomem *plx9080_iobase; 213 void __iomem *plx9080_iobase;
300 void __iomem *hpdi_iobase; 214 void __iomem *hpdi_iobase;
@@ -321,27 +235,24 @@ struct hpdi_private {
321 unsigned dio_config_output:1; 235 unsigned dio_config_output:1;
322}; 236};
323 237
324static inline struct hpdi_private *priv(struct comedi_device *dev)
325{
326 return dev->private;
327}
328
329static int dio_config_insn(struct comedi_device *dev, 238static int dio_config_insn(struct comedi_device *dev,
330 struct comedi_subdevice *s, struct comedi_insn *insn, 239 struct comedi_subdevice *s, struct comedi_insn *insn,
331 unsigned int *data) 240 unsigned int *data)
332{ 241{
242 struct hpdi_private *devpriv = dev->private;
243
333 switch (data[0]) { 244 switch (data[0]) {
334 case INSN_CONFIG_DIO_OUTPUT: 245 case INSN_CONFIG_DIO_OUTPUT:
335 priv(dev)->dio_config_output = 1; 246 devpriv->dio_config_output = 1;
336 return insn->n; 247 return insn->n;
337 break; 248 break;
338 case INSN_CONFIG_DIO_INPUT: 249 case INSN_CONFIG_DIO_INPUT:
339 priv(dev)->dio_config_output = 0; 250 devpriv->dio_config_output = 0;
340 return insn->n; 251 return insn->n;
341 break; 252 break;
342 case INSN_CONFIG_DIO_QUERY: 253 case INSN_CONFIG_DIO_QUERY:
343 data[1] = 254 data[1] =
344 priv(dev)->dio_config_output ? COMEDI_OUTPUT : COMEDI_INPUT; 255 devpriv->dio_config_output ? COMEDI_OUTPUT : COMEDI_INPUT;
345 return insn->n; 256 return insn->n;
346 break; 257 break;
347 case INSN_CONFIG_BLOCK_SIZE: 258 case INSN_CONFIG_BLOCK_SIZE:
@@ -356,21 +267,24 @@ static int dio_config_insn(struct comedi_device *dev,
356 267
357static void disable_plx_interrupts(struct comedi_device *dev) 268static void disable_plx_interrupts(struct comedi_device *dev)
358{ 269{
359 writel(0, priv(dev)->plx9080_iobase + PLX_INTRCS_REG); 270 struct hpdi_private *devpriv = dev->private;
271
272 writel(0, devpriv->plx9080_iobase + PLX_INTRCS_REG);
360} 273}
361 274
362/* initialize plx9080 chip */ 275/* initialize plx9080 chip */
363static void init_plx9080(struct comedi_device *dev) 276static void init_plx9080(struct comedi_device *dev)
364{ 277{
278 struct hpdi_private *devpriv = dev->private;
365 uint32_t bits; 279 uint32_t bits;
366 void __iomem *plx_iobase = priv(dev)->plx9080_iobase; 280 void __iomem *plx_iobase = devpriv->plx9080_iobase;
367 281
368 /* plx9080 dump */ 282 /* plx9080 dump */
369 DEBUG_PRINT(" plx interrupt status 0x%x\n", 283 DEBUG_PRINT(" plx interrupt status 0x%x\n",
370 readl(plx_iobase + PLX_INTRCS_REG)); 284 readl(plx_iobase + PLX_INTRCS_REG));
371 DEBUG_PRINT(" plx id bits 0x%x\n", readl(plx_iobase + PLX_ID_REG)); 285 DEBUG_PRINT(" plx id bits 0x%x\n", readl(plx_iobase + PLX_ID_REG));
372 DEBUG_PRINT(" plx control reg 0x%x\n", 286 DEBUG_PRINT(" plx control reg 0x%x\n",
373 readl(priv(dev)->plx9080_iobase + PLX_CONTROL_REG)); 287 readl(devpriv->plx9080_iobase + PLX_CONTROL_REG));
374 288
375 DEBUG_PRINT(" plx revision 0x%x\n", 289 DEBUG_PRINT(" plx revision 0x%x\n",
376 readl(plx_iobase + PLX_REVISION_REG)); 290 readl(plx_iobase + PLX_REVISION_REG));
@@ -396,7 +310,7 @@ static void init_plx9080(struct comedi_device *dev)
396#else 310#else
397 bits = 0; 311 bits = 0;
398#endif 312#endif
399 writel(bits, priv(dev)->plx9080_iobase + PLX_BIGEND_REG); 313 writel(bits, devpriv->plx9080_iobase + PLX_BIGEND_REG);
400 314
401 disable_plx_interrupts(dev); 315 disable_plx_interrupts(dev);
402 316
@@ -457,28 +371,29 @@ static int setup_subdevices(struct comedi_device *dev)
457 371
458static int init_hpdi(struct comedi_device *dev) 372static int init_hpdi(struct comedi_device *dev)
459{ 373{
374 struct hpdi_private *devpriv = dev->private;
460 uint32_t plx_intcsr_bits; 375 uint32_t plx_intcsr_bits;
461 376
462 writel(BOARD_RESET_BIT, priv(dev)->hpdi_iobase + BOARD_CONTROL_REG); 377 writel(BOARD_RESET_BIT, devpriv->hpdi_iobase + BOARD_CONTROL_REG);
463 udelay(10); 378 udelay(10);
464 379
465 writel(almost_empty_bits(32) | almost_full_bits(32), 380 writel(almost_empty_bits(32) | almost_full_bits(32),
466 priv(dev)->hpdi_iobase + RX_PROG_ALMOST_REG); 381 devpriv->hpdi_iobase + RX_PROG_ALMOST_REG);
467 writel(almost_empty_bits(32) | almost_full_bits(32), 382 writel(almost_empty_bits(32) | almost_full_bits(32),
468 priv(dev)->hpdi_iobase + TX_PROG_ALMOST_REG); 383 devpriv->hpdi_iobase + TX_PROG_ALMOST_REG);
469 384
470 priv(dev)->tx_fifo_size = fifo_size(readl(priv(dev)->hpdi_iobase + 385 devpriv->tx_fifo_size = fifo_size(readl(devpriv->hpdi_iobase +
471 TX_FIFO_SIZE_REG)); 386 TX_FIFO_SIZE_REG));
472 priv(dev)->rx_fifo_size = fifo_size(readl(priv(dev)->hpdi_iobase + 387 devpriv->rx_fifo_size = fifo_size(readl(devpriv->hpdi_iobase +
473 RX_FIFO_SIZE_REG)); 388 RX_FIFO_SIZE_REG));
474 389
475 writel(0, priv(dev)->hpdi_iobase + INTERRUPT_CONTROL_REG); 390 writel(0, devpriv->hpdi_iobase + INTERRUPT_CONTROL_REG);
476 391
477 /* enable interrupts */ 392 /* enable interrupts */
478 plx_intcsr_bits = 393 plx_intcsr_bits =
479 ICS_AERR | ICS_PERR | ICS_PIE | ICS_PLIE | ICS_PAIE | ICS_LIE | 394 ICS_AERR | ICS_PERR | ICS_PIE | ICS_PLIE | ICS_PAIE | ICS_LIE |
480 ICS_DMA0_E; 395 ICS_DMA0_E;
481 writel(plx_intcsr_bits, priv(dev)->plx9080_iobase + PLX_INTRCS_REG); 396 writel(plx_intcsr_bits, devpriv->plx9080_iobase + PLX_INTRCS_REG);
482 397
483 return 0; 398 return 0;
484} 399}
@@ -487,6 +402,7 @@ static int init_hpdi(struct comedi_device *dev)
487static int setup_dma_descriptors(struct comedi_device *dev, 402static int setup_dma_descriptors(struct comedi_device *dev,
488 unsigned int transfer_size) 403 unsigned int transfer_size)
489{ 404{
405 struct hpdi_private *devpriv = dev->private;
490 unsigned int buffer_index, buffer_offset; 406 unsigned int buffer_index, buffer_offset;
491 uint32_t next_bits = PLX_DESC_IN_PCI_BIT | PLX_INTR_TERM_COUNT | 407 uint32_t next_bits = PLX_DESC_IN_PCI_BIT | PLX_INTR_TERM_COUNT |
492 PLX_XFER_LOCAL_TO_PCI; 408 PLX_XFER_LOCAL_TO_PCI;
@@ -500,25 +416,25 @@ static int setup_dma_descriptors(struct comedi_device *dev,
500 416
501 DEBUG_PRINT(" transfer_size %i\n", transfer_size); 417 DEBUG_PRINT(" transfer_size %i\n", transfer_size);
502 DEBUG_PRINT(" descriptors at 0x%lx\n", 418 DEBUG_PRINT(" descriptors at 0x%lx\n",
503 (unsigned long)priv(dev)->dma_desc_phys_addr); 419 (unsigned long)devpriv->dma_desc_phys_addr);
504 420
505 buffer_offset = 0; 421 buffer_offset = 0;
506 buffer_index = 0; 422 buffer_index = 0;
507 for (i = 0; i < NUM_DMA_DESCRIPTORS && 423 for (i = 0; i < NUM_DMA_DESCRIPTORS &&
508 buffer_index < NUM_DMA_BUFFERS; i++) { 424 buffer_index < NUM_DMA_BUFFERS; i++) {
509 priv(dev)->dma_desc[i].pci_start_addr = 425 devpriv->dma_desc[i].pci_start_addr =
510 cpu_to_le32(priv(dev)->dio_buffer_phys_addr[buffer_index] + 426 cpu_to_le32(devpriv->dio_buffer_phys_addr[buffer_index] +
511 buffer_offset); 427 buffer_offset);
512 priv(dev)->dma_desc[i].local_start_addr = cpu_to_le32(FIFO_REG); 428 devpriv->dma_desc[i].local_start_addr = cpu_to_le32(FIFO_REG);
513 priv(dev)->dma_desc[i].transfer_size = 429 devpriv->dma_desc[i].transfer_size =
514 cpu_to_le32(transfer_size); 430 cpu_to_le32(transfer_size);
515 priv(dev)->dma_desc[i].next = 431 devpriv->dma_desc[i].next =
516 cpu_to_le32((priv(dev)->dma_desc_phys_addr + (i + 432 cpu_to_le32((devpriv->dma_desc_phys_addr + (i +
517 1) * 433 1) *
518 sizeof(priv(dev)->dma_desc[0])) | next_bits); 434 sizeof(devpriv->dma_desc[0])) | next_bits);
519 435
520 priv(dev)->desc_dio_buffer[i] = 436 devpriv->desc_dio_buffer[i] =
521 priv(dev)->dio_buffer[buffer_index] + 437 devpriv->dio_buffer[buffer_index] +
522 (buffer_offset / sizeof(uint32_t)); 438 (buffer_offset / sizeof(uint32_t));
523 439
524 buffer_offset += transfer_size; 440 buffer_offset += transfer_size;
@@ -529,128 +445,110 @@ static int setup_dma_descriptors(struct comedi_device *dev,
529 445
530 DEBUG_PRINT(" desc %i\n", i); 446 DEBUG_PRINT(" desc %i\n", i);
531 DEBUG_PRINT(" start addr virt 0x%p, phys 0x%lx\n", 447 DEBUG_PRINT(" start addr virt 0x%p, phys 0x%lx\n",
532 priv(dev)->desc_dio_buffer[i], 448 devpriv->desc_dio_buffer[i],
533 (unsigned long)priv(dev)->dma_desc[i]. 449 (unsigned long)devpriv->dma_desc[i].
534 pci_start_addr); 450 pci_start_addr);
535 DEBUG_PRINT(" next 0x%lx\n", 451 DEBUG_PRINT(" next 0x%lx\n",
536 (unsigned long)priv(dev)->dma_desc[i].next); 452 (unsigned long)devpriv->dma_desc[i].next);
537 } 453 }
538 priv(dev)->num_dma_descriptors = i; 454 devpriv->num_dma_descriptors = i;
539 /* fix last descriptor to point back to first */ 455 /* fix last descriptor to point back to first */
540 priv(dev)->dma_desc[i - 1].next = 456 devpriv->dma_desc[i - 1].next =
541 cpu_to_le32(priv(dev)->dma_desc_phys_addr | next_bits); 457 cpu_to_le32(devpriv->dma_desc_phys_addr | next_bits);
542 DEBUG_PRINT(" desc %i next fixup 0x%lx\n", i - 1, 458 DEBUG_PRINT(" desc %i next fixup 0x%lx\n", i - 1,
543 (unsigned long)priv(dev)->dma_desc[i - 1].next); 459 (unsigned long)devpriv->dma_desc[i - 1].next);
544 460
545 priv(dev)->block_size = transfer_size; 461 devpriv->block_size = transfer_size;
546 462
547 return transfer_size; 463 return transfer_size;
548} 464}
549 465
550static int hpdi_attach(struct comedi_device *dev, struct comedi_devconfig *it) 466static const struct hpdi_board *hpdi_find_board(struct pci_dev *pcidev)
551{ 467{
552 struct pci_dev *pcidev; 468 unsigned int i;
553 int i;
554 int retval;
555 469
556 printk(KERN_WARNING "comedi%d: gsc_hpdi\n", dev->minor); 470 for (i = 0; i < ARRAY_SIZE(hpdi_boards); i++)
471 if (pcidev->device == hpdi_boards[i].device_id &&
472 pcidev->subsystem_device == hpdi_boards[i].subdevice_id)
473 return &hpdi_boards[i];
474 return NULL;
475}
557 476
558 if (alloc_private(dev, sizeof(struct hpdi_private)) < 0) 477static int hpdi_auto_attach(struct comedi_device *dev,
559 return -ENOMEM; 478 unsigned long context_unused)
479{
480 struct pci_dev *pcidev = comedi_to_pci_dev(dev);
481 const struct hpdi_board *thisboard;
482 struct hpdi_private *devpriv;
483 int i;
484 int retval;
560 485
561 pcidev = NULL; 486 thisboard = hpdi_find_board(pcidev);
562 for (i = 0; i < ARRAY_SIZE(hpdi_boards) && 487 if (!thisboard) {
563 dev->board_ptr == NULL; i++) { 488 dev_err(dev->class_dev, "gsc_hpdi: pci %s not supported\n",
564 do { 489 pci_name(pcidev));
565 pcidev = pci_get_subsys(PCI_VENDOR_ID_PLX, 490 return -EINVAL;
566 hpdi_boards[i].device_id,
567 PCI_VENDOR_ID_PLX,
568 hpdi_boards[i].subdevice_id,
569 pcidev);
570 /* was a particular bus/slot requested? */
571 if (it->options[0] || it->options[1]) {
572 /* are we on the wrong bus/slot? */
573 if (pcidev->bus->number != it->options[0] ||
574 PCI_SLOT(pcidev->devfn) != it->options[1])
575 continue;
576 }
577 if (pcidev) {
578 priv(dev)->hw_dev = pcidev;
579 dev->board_ptr = hpdi_boards + i;
580 break;
581 }
582 } while (pcidev != NULL);
583 }
584 if (dev->board_ptr == NULL) {
585 printk(KERN_WARNING "gsc_hpdi: no hpdi card found\n");
586 return -EIO;
587 } 491 }
492 dev->board_ptr = thisboard;
493 dev->board_name = thisboard->name;
588 494
589 printk(KERN_WARNING 495 devpriv = kzalloc(sizeof(*devpriv), GFP_KERNEL);
590 "gsc_hpdi: found %s on bus %i, slot %i\n", board(dev)->name, 496 if (!devpriv)
591 pcidev->bus->number, PCI_SLOT(pcidev->devfn)); 497 return -ENOMEM;
498 dev->private = devpriv;
592 499
593 if (comedi_pci_enable(pcidev, dev->driver->driver_name)) { 500 if (comedi_pci_enable(pcidev, dev->board_name)) {
594 printk(KERN_WARNING 501 dev_warn(dev->class_dev,
595 " failed enable PCI device and request regions\n"); 502 "failed enable PCI device and request regions\n");
596 return -EIO; 503 return -EIO;
597 } 504 }
505 dev->iobase = 1; /* the "detach" needs this */
598 pci_set_master(pcidev); 506 pci_set_master(pcidev);
599 507
600 /* Initialize dev->board_name */ 508 devpriv->plx9080_iobase =
601 dev->board_name = board(dev)->name; 509 ioremap(pci_resource_start(pcidev, PLX9080_BADDRINDEX),
602 510 pci_resource_len(pcidev, PLX9080_BADDRINDEX));
603 priv(dev)->plx9080_phys_iobase = 511 devpriv->hpdi_iobase =
604 pci_resource_start(pcidev, PLX9080_BADDRINDEX); 512 ioremap(pci_resource_start(pcidev, HPDI_BADDRINDEX),
605 priv(dev)->hpdi_phys_iobase = 513 pci_resource_len(pcidev, HPDI_BADDRINDEX));
606 pci_resource_start(pcidev, HPDI_BADDRINDEX); 514 if (!devpriv->plx9080_iobase || !devpriv->hpdi_iobase) {
607 515 dev_warn(dev->class_dev, "failed to remap io memory\n");
608 /* remap, won't work with 2.0 kernels but who cares */
609 priv(dev)->plx9080_iobase = ioremap(priv(dev)->plx9080_phys_iobase,
610 pci_resource_len(pcidev,
611 PLX9080_BADDRINDEX));
612 priv(dev)->hpdi_iobase =
613 ioremap(priv(dev)->hpdi_phys_iobase,
614 pci_resource_len(pcidev, HPDI_BADDRINDEX));
615 if (!priv(dev)->plx9080_iobase || !priv(dev)->hpdi_iobase) {
616 printk(KERN_WARNING " failed to remap io memory\n");
617 return -ENOMEM; 516 return -ENOMEM;
618 } 517 }
619 518
620 DEBUG_PRINT(" plx9080 remapped to 0x%p\n", priv(dev)->plx9080_iobase); 519 DEBUG_PRINT(" plx9080 remapped to 0x%p\n", devpriv->plx9080_iobase);
621 DEBUG_PRINT(" hpdi remapped to 0x%p\n", priv(dev)->hpdi_iobase); 520 DEBUG_PRINT(" hpdi remapped to 0x%p\n", devpriv->hpdi_iobase);
622 521
623 init_plx9080(dev); 522 init_plx9080(dev);
624 523
625 /* get irq */ 524 /* get irq */
626 if (request_irq(pcidev->irq, handle_interrupt, IRQF_SHARED, 525 if (request_irq(pcidev->irq, handle_interrupt, IRQF_SHARED,
627 dev->driver->driver_name, dev)) { 526 dev->board_name, dev)) {
628 printk(KERN_WARNING 527 dev_warn(dev->class_dev,
629 " unable to allocate irq %u\n", pcidev->irq); 528 "unable to allocate irq %u\n", pcidev->irq);
630 return -EINVAL; 529 return -EINVAL;
631 } 530 }
632 dev->irq = pcidev->irq; 531 dev->irq = pcidev->irq;
633 532
634 printk(KERN_WARNING " irq %u\n", dev->irq); 533 dev_dbg(dev->class_dev, " irq %u\n", dev->irq);
635 534
636 /* allocate pci dma buffers */ 535 /* allocate pci dma buffers */
637 for (i = 0; i < NUM_DMA_BUFFERS; i++) { 536 for (i = 0; i < NUM_DMA_BUFFERS; i++) {
638 priv(dev)->dio_buffer[i] = 537 devpriv->dio_buffer[i] =
639 pci_alloc_consistent(priv(dev)->hw_dev, DMA_BUFFER_SIZE, 538 pci_alloc_consistent(pcidev, DMA_BUFFER_SIZE,
640 &priv(dev)->dio_buffer_phys_addr[i]); 539 &devpriv->dio_buffer_phys_addr[i]);
641 DEBUG_PRINT("dio_buffer at virt 0x%p, phys 0x%lx\n", 540 DEBUG_PRINT("dio_buffer at virt 0x%p, phys 0x%lx\n",
642 priv(dev)->dio_buffer[i], 541 devpriv->dio_buffer[i],
643 (unsigned long)priv(dev)->dio_buffer_phys_addr[i]); 542 (unsigned long)devpriv->dio_buffer_phys_addr[i]);
644 } 543 }
645 /* allocate dma descriptors */ 544 /* allocate dma descriptors */
646 priv(dev)->dma_desc = pci_alloc_consistent(priv(dev)->hw_dev, 545 devpriv->dma_desc = pci_alloc_consistent(pcidev,
647 sizeof(struct plx_dma_desc) * 546 sizeof(struct plx_dma_desc) *
648 NUM_DMA_DESCRIPTORS, 547 NUM_DMA_DESCRIPTORS,
649 &priv(dev)-> 548 &devpriv->dma_desc_phys_addr);
650 dma_desc_phys_addr); 549 if (devpriv->dma_desc_phys_addr & 0xf) {
651 if (priv(dev)->dma_desc_phys_addr & 0xf) { 550 dev_warn(dev->class_dev,
652 printk(KERN_WARNING 551 " dma descriptors not quad-word aligned (bug)\n");
653 " dma descriptors not quad-word aligned (bug)\n");
654 return -EIO; 552 return -EIO;
655 } 553 }
656 554
@@ -667,39 +565,37 @@ static int hpdi_attach(struct comedi_device *dev, struct comedi_devconfig *it)
667 565
668static void hpdi_detach(struct comedi_device *dev) 566static void hpdi_detach(struct comedi_device *dev)
669{ 567{
568 struct pci_dev *pcidev = comedi_to_pci_dev(dev);
569 struct hpdi_private *devpriv = dev->private;
670 unsigned int i; 570 unsigned int i;
671 571
672 if (dev->irq) 572 if (dev->irq)
673 free_irq(dev->irq, dev); 573 free_irq(dev->irq, dev);
674 if ((priv(dev)) && (priv(dev)->hw_dev)) { 574 if (devpriv) {
675 if (priv(dev)->plx9080_iobase) { 575 if (devpriv->plx9080_iobase) {
676 disable_plx_interrupts(dev); 576 disable_plx_interrupts(dev);
677 iounmap(priv(dev)->plx9080_iobase); 577 iounmap(devpriv->plx9080_iobase);
678 } 578 }
679 if (priv(dev)->hpdi_iobase) 579 if (devpriv->hpdi_iobase)
680 iounmap(priv(dev)->hpdi_iobase); 580 iounmap(devpriv->hpdi_iobase);
681 /* free pci dma buffers */ 581 /* free pci dma buffers */
682 for (i = 0; i < NUM_DMA_BUFFERS; i++) { 582 for (i = 0; i < NUM_DMA_BUFFERS; i++) {
683 if (priv(dev)->dio_buffer[i]) 583 if (devpriv->dio_buffer[i])
684 pci_free_consistent(priv(dev)->hw_dev, 584 pci_free_consistent(pcidev,
685 DMA_BUFFER_SIZE, 585 DMA_BUFFER_SIZE,
686 priv(dev)-> 586 devpriv->dio_buffer[i],
687 dio_buffer[i], 587 devpriv->
688 priv 588 dio_buffer_phys_addr[i]);
689 (dev)->dio_buffer_phys_addr
690 [i]);
691 } 589 }
692 /* free dma descriptors */ 590 /* free dma descriptors */
693 if (priv(dev)->dma_desc) 591 if (devpriv->dma_desc)
694 pci_free_consistent(priv(dev)->hw_dev, 592 pci_free_consistent(pcidev,
695 sizeof(struct plx_dma_desc) 593 sizeof(struct plx_dma_desc) *
696 * NUM_DMA_DESCRIPTORS, 594 NUM_DMA_DESCRIPTORS,
697 priv(dev)->dma_desc, 595 devpriv->dma_desc,
698 priv(dev)-> 596 devpriv->dma_desc_phys_addr);
699 dma_desc_phys_addr); 597 if (dev->iobase)
700 if (priv(dev)->hpdi_phys_iobase) 598 comedi_pci_disable(pcidev);
701 comedi_pci_disable(priv(dev)->hw_dev);
702 pci_dev_put(priv(dev)->hw_dev);
703 } 599 }
704} 600}
705 601
@@ -745,29 +641,20 @@ static int di_cmd_test(struct comedi_device *dev, struct comedi_subdevice *s,
745 if (err) 641 if (err)
746 return 2; 642 return 2;
747 643
748 /* step 3: make sure arguments are trivially compatible */ 644 /* Step 3: check if arguments are trivially valid */
749 645
750 if (!cmd->chanlist_len) { 646 if (!cmd->chanlist_len) {
751 cmd->chanlist_len = 32; 647 cmd->chanlist_len = 32;
752 err++; 648 err |= -EINVAL;
753 }
754 if (cmd->scan_end_arg != cmd->chanlist_len) {
755 cmd->scan_end_arg = cmd->chanlist_len;
756 err++;
757 } 649 }
650 err |= cfc_check_trigger_arg_is(&cmd->scan_end_arg, cmd->chanlist_len);
758 651
759 switch (cmd->stop_src) { 652 switch (cmd->stop_src) {
760 case TRIG_COUNT: 653 case TRIG_COUNT:
761 if (!cmd->stop_arg) { 654 err |= cfc_check_trigger_arg_min(&cmd->stop_arg, 1);
762 cmd->stop_arg = 1;
763 err++;
764 }
765 break; 655 break;
766 case TRIG_NONE: 656 case TRIG_NONE:
767 if (cmd->stop_arg != 0) { 657 err |= cfc_check_trigger_arg_is(&cmd->stop_arg, 0);
768 cmd->stop_arg = 0;
769 err++;
770 }
771 break; 658 break;
772 default: 659 default:
773 break; 660 break;
@@ -803,7 +690,9 @@ static int di_cmd_test(struct comedi_device *dev, struct comedi_subdevice *s,
803static int hpdi_cmd_test(struct comedi_device *dev, struct comedi_subdevice *s, 690static int hpdi_cmd_test(struct comedi_device *dev, struct comedi_subdevice *s,
804 struct comedi_cmd *cmd) 691 struct comedi_cmd *cmd)
805{ 692{
806 if (priv(dev)->dio_config_output) 693 struct hpdi_private *devpriv = dev->private;
694
695 if (devpriv->dio_config_output)
807 return -EINVAL; 696 return -EINVAL;
808 else 697 else
809 return di_cmd_test(dev, s, cmd); 698 return di_cmd_test(dev, s, cmd);
@@ -812,12 +701,15 @@ static int hpdi_cmd_test(struct comedi_device *dev, struct comedi_subdevice *s,
812static inline void hpdi_writel(struct comedi_device *dev, uint32_t bits, 701static inline void hpdi_writel(struct comedi_device *dev, uint32_t bits,
813 unsigned int offset) 702 unsigned int offset)
814{ 703{
815 writel(bits | priv(dev)->bits[offset / sizeof(uint32_t)], 704 struct hpdi_private *devpriv = dev->private;
816 priv(dev)->hpdi_iobase + offset); 705
706 writel(bits | devpriv->bits[offset / sizeof(uint32_t)],
707 devpriv->hpdi_iobase + offset);
817} 708}
818 709
819static int di_cmd(struct comedi_device *dev, struct comedi_subdevice *s) 710static int di_cmd(struct comedi_device *dev, struct comedi_subdevice *s)
820{ 711{
712 struct hpdi_private *devpriv = dev->private;
821 uint32_t bits; 713 uint32_t bits;
822 unsigned long flags; 714 unsigned long flags;
823 struct comedi_async *async = s->async; 715 struct comedi_async *async = s->async;
@@ -829,39 +721,39 @@ static int di_cmd(struct comedi_device *dev, struct comedi_subdevice *s)
829 721
830 abort_dma(dev, 0); 722 abort_dma(dev, 0);
831 723
832 priv(dev)->dma_desc_index = 0; 724 devpriv->dma_desc_index = 0;
833 725
834 /* These register are supposedly unused during chained dma, 726 /* These register are supposedly unused during chained dma,
835 * but I have found that left over values from last operation 727 * but I have found that left over values from last operation
836 * occasionally cause problems with transfer of first dma 728 * occasionally cause problems with transfer of first dma
837 * block. Initializing them to zero seems to fix the problem. */ 729 * block. Initializing them to zero seems to fix the problem. */
838 writel(0, priv(dev)->plx9080_iobase + PLX_DMA0_TRANSFER_SIZE_REG); 730 writel(0, devpriv->plx9080_iobase + PLX_DMA0_TRANSFER_SIZE_REG);
839 writel(0, priv(dev)->plx9080_iobase + PLX_DMA0_PCI_ADDRESS_REG); 731 writel(0, devpriv->plx9080_iobase + PLX_DMA0_PCI_ADDRESS_REG);
840 writel(0, priv(dev)->plx9080_iobase + PLX_DMA0_LOCAL_ADDRESS_REG); 732 writel(0, devpriv->plx9080_iobase + PLX_DMA0_LOCAL_ADDRESS_REG);
841 /* give location of first dma descriptor */ 733 /* give location of first dma descriptor */
842 bits = 734 bits =
843 priv(dev)->dma_desc_phys_addr | PLX_DESC_IN_PCI_BIT | 735 devpriv->dma_desc_phys_addr | PLX_DESC_IN_PCI_BIT |
844 PLX_INTR_TERM_COUNT | PLX_XFER_LOCAL_TO_PCI; 736 PLX_INTR_TERM_COUNT | PLX_XFER_LOCAL_TO_PCI;
845 writel(bits, priv(dev)->plx9080_iobase + PLX_DMA0_DESCRIPTOR_REG); 737 writel(bits, devpriv->plx9080_iobase + PLX_DMA0_DESCRIPTOR_REG);
846 738
847 /* spinlock for plx dma control/status reg */ 739 /* spinlock for plx dma control/status reg */
848 spin_lock_irqsave(&dev->spinlock, flags); 740 spin_lock_irqsave(&dev->spinlock, flags);
849 /* enable dma transfer */ 741 /* enable dma transfer */
850 writeb(PLX_DMA_EN_BIT | PLX_DMA_START_BIT | PLX_CLEAR_DMA_INTR_BIT, 742 writeb(PLX_DMA_EN_BIT | PLX_DMA_START_BIT | PLX_CLEAR_DMA_INTR_BIT,
851 priv(dev)->plx9080_iobase + PLX_DMA0_CS_REG); 743 devpriv->plx9080_iobase + PLX_DMA0_CS_REG);
852 spin_unlock_irqrestore(&dev->spinlock, flags); 744 spin_unlock_irqrestore(&dev->spinlock, flags);
853 745
854 if (cmd->stop_src == TRIG_COUNT) 746 if (cmd->stop_src == TRIG_COUNT)
855 priv(dev)->dio_count = cmd->stop_arg; 747 devpriv->dio_count = cmd->stop_arg;
856 else 748 else
857 priv(dev)->dio_count = 1; 749 devpriv->dio_count = 1;
858 750
859 /* clear over/under run status flags */ 751 /* clear over/under run status flags */
860 writel(RX_UNDERRUN_BIT | RX_OVERRUN_BIT, 752 writel(RX_UNDERRUN_BIT | RX_OVERRUN_BIT,
861 priv(dev)->hpdi_iobase + BOARD_STATUS_REG); 753 devpriv->hpdi_iobase + BOARD_STATUS_REG);
862 /* enable interrupts */ 754 /* enable interrupts */
863 writel(intr_bit(RX_FULL_INTR), 755 writel(intr_bit(RX_FULL_INTR),
864 priv(dev)->hpdi_iobase + INTERRUPT_CONTROL_REG); 756 devpriv->hpdi_iobase + INTERRUPT_CONTROL_REG);
865 757
866 DEBUG_PRINT("hpdi: starting rx\n"); 758 DEBUG_PRINT("hpdi: starting rx\n");
867 hpdi_writel(dev, RX_ENABLE_BIT, BOARD_CONTROL_REG); 759 hpdi_writel(dev, RX_ENABLE_BIT, BOARD_CONTROL_REG);
@@ -871,7 +763,9 @@ static int di_cmd(struct comedi_device *dev, struct comedi_subdevice *s)
871 763
872static int hpdi_cmd(struct comedi_device *dev, struct comedi_subdevice *s) 764static int hpdi_cmd(struct comedi_device *dev, struct comedi_subdevice *s)
873{ 765{
874 if (priv(dev)->dio_config_output) 766 struct hpdi_private *devpriv = dev->private;
767
768 if (devpriv->dio_config_output)
875 return -EINVAL; 769 return -EINVAL;
876 else 770 else
877 return di_cmd(dev, s); 771 return di_cmd(dev, s);
@@ -879,6 +773,7 @@ static int hpdi_cmd(struct comedi_device *dev, struct comedi_subdevice *s)
879 773
880static void drain_dma_buffers(struct comedi_device *dev, unsigned int channel) 774static void drain_dma_buffers(struct comedi_device *dev, unsigned int channel)
881{ 775{
776 struct hpdi_private *devpriv = dev->private;
882 struct comedi_async *async = dev->read_subdev->async; 777 struct comedi_async *async = dev->read_subdev->async;
883 uint32_t next_transfer_addr; 778 uint32_t next_transfer_addr;
884 int j; 779 int j;
@@ -887,37 +782,37 @@ static void drain_dma_buffers(struct comedi_device *dev, unsigned int channel)
887 782
888 if (channel) 783 if (channel)
889 pci_addr_reg = 784 pci_addr_reg =
890 priv(dev)->plx9080_iobase + PLX_DMA1_PCI_ADDRESS_REG; 785 devpriv->plx9080_iobase + PLX_DMA1_PCI_ADDRESS_REG;
891 else 786 else
892 pci_addr_reg = 787 pci_addr_reg =
893 priv(dev)->plx9080_iobase + PLX_DMA0_PCI_ADDRESS_REG; 788 devpriv->plx9080_iobase + PLX_DMA0_PCI_ADDRESS_REG;
894 789
895 /* loop until we have read all the full buffers */ 790 /* loop until we have read all the full buffers */
896 j = 0; 791 j = 0;
897 for (next_transfer_addr = readl(pci_addr_reg); 792 for (next_transfer_addr = readl(pci_addr_reg);
898 (next_transfer_addr < 793 (next_transfer_addr <
899 le32_to_cpu(priv(dev)->dma_desc[priv(dev)->dma_desc_index]. 794 le32_to_cpu(devpriv->dma_desc[devpriv->dma_desc_index].
900 pci_start_addr) 795 pci_start_addr)
901 || next_transfer_addr >= 796 || next_transfer_addr >=
902 le32_to_cpu(priv(dev)->dma_desc[priv(dev)->dma_desc_index]. 797 le32_to_cpu(devpriv->dma_desc[devpriv->dma_desc_index].
903 pci_start_addr) + priv(dev)->block_size) 798 pci_start_addr) + devpriv->block_size)
904 && j < priv(dev)->num_dma_descriptors; j++) { 799 && j < devpriv->num_dma_descriptors; j++) {
905 /* transfer data from dma buffer to comedi buffer */ 800 /* transfer data from dma buffer to comedi buffer */
906 num_samples = priv(dev)->block_size / sizeof(uint32_t); 801 num_samples = devpriv->block_size / sizeof(uint32_t);
907 if (async->cmd.stop_src == TRIG_COUNT) { 802 if (async->cmd.stop_src == TRIG_COUNT) {
908 if (num_samples > priv(dev)->dio_count) 803 if (num_samples > devpriv->dio_count)
909 num_samples = priv(dev)->dio_count; 804 num_samples = devpriv->dio_count;
910 priv(dev)->dio_count -= num_samples; 805 devpriv->dio_count -= num_samples;
911 } 806 }
912 cfc_write_array_to_buffer(dev->read_subdev, 807 cfc_write_array_to_buffer(dev->read_subdev,
913 priv(dev)->desc_dio_buffer[priv(dev)-> 808 devpriv->desc_dio_buffer[devpriv->
914 dma_desc_index], 809 dma_desc_index],
915 num_samples * sizeof(uint32_t)); 810 num_samples * sizeof(uint32_t));
916 priv(dev)->dma_desc_index++; 811 devpriv->dma_desc_index++;
917 priv(dev)->dma_desc_index %= priv(dev)->num_dma_descriptors; 812 devpriv->dma_desc_index %= devpriv->num_dma_descriptors;
918 813
919 DEBUG_PRINT("next desc addr 0x%lx\n", (unsigned long) 814 DEBUG_PRINT("next desc addr 0x%lx\n", (unsigned long)
920 priv(dev)->dma_desc[priv(dev)->dma_desc_index]. 815 devpriv->dma_desc[devpriv->dma_desc_index].
921 next); 816 next);
922 DEBUG_PRINT("pci addr reg 0x%x\n", next_transfer_addr); 817 DEBUG_PRINT("pci addr reg 0x%x\n", next_transfer_addr);
923 } 818 }
@@ -927,6 +822,7 @@ static void drain_dma_buffers(struct comedi_device *dev, unsigned int channel)
927static irqreturn_t handle_interrupt(int irq, void *d) 822static irqreturn_t handle_interrupt(int irq, void *d)
928{ 823{
929 struct comedi_device *dev = d; 824 struct comedi_device *dev = d;
825 struct hpdi_private *devpriv = dev->private;
930 struct comedi_subdevice *s = dev->read_subdev; 826 struct comedi_subdevice *s = dev->read_subdev;
931 struct comedi_async *async = s->async; 827 struct comedi_async *async = s->async;
932 uint32_t hpdi_intr_status, hpdi_board_status; 828 uint32_t hpdi_intr_status, hpdi_board_status;
@@ -938,26 +834,26 @@ static irqreturn_t handle_interrupt(int irq, void *d)
938 if (!dev->attached) 834 if (!dev->attached)
939 return IRQ_NONE; 835 return IRQ_NONE;
940 836
941 plx_status = readl(priv(dev)->plx9080_iobase + PLX_INTRCS_REG); 837 plx_status = readl(devpriv->plx9080_iobase + PLX_INTRCS_REG);
942 if ((plx_status & (ICS_DMA0_A | ICS_DMA1_A | ICS_LIA)) == 0) 838 if ((plx_status & (ICS_DMA0_A | ICS_DMA1_A | ICS_LIA)) == 0)
943 return IRQ_NONE; 839 return IRQ_NONE;
944 840
945 hpdi_intr_status = readl(priv(dev)->hpdi_iobase + INTERRUPT_STATUS_REG); 841 hpdi_intr_status = readl(devpriv->hpdi_iobase + INTERRUPT_STATUS_REG);
946 hpdi_board_status = readl(priv(dev)->hpdi_iobase + BOARD_STATUS_REG); 842 hpdi_board_status = readl(devpriv->hpdi_iobase + BOARD_STATUS_REG);
947 843
948 async->events = 0; 844 async->events = 0;
949 845
950 if (hpdi_intr_status) { 846 if (hpdi_intr_status) {
951 DEBUG_PRINT("hpdi: intr status 0x%x, ", hpdi_intr_status); 847 DEBUG_PRINT("hpdi: intr status 0x%x, ", hpdi_intr_status);
952 writel(hpdi_intr_status, 848 writel(hpdi_intr_status,
953 priv(dev)->hpdi_iobase + INTERRUPT_STATUS_REG); 849 devpriv->hpdi_iobase + INTERRUPT_STATUS_REG);
954 } 850 }
955 /* spin lock makes sure no one else changes plx dma control reg */ 851 /* spin lock makes sure no one else changes plx dma control reg */
956 spin_lock_irqsave(&dev->spinlock, flags); 852 spin_lock_irqsave(&dev->spinlock, flags);
957 dma0_status = readb(priv(dev)->plx9080_iobase + PLX_DMA0_CS_REG); 853 dma0_status = readb(devpriv->plx9080_iobase + PLX_DMA0_CS_REG);
958 if (plx_status & ICS_DMA0_A) { /* dma chan 0 interrupt */ 854 if (plx_status & ICS_DMA0_A) { /* dma chan 0 interrupt */
959 writeb((dma0_status & PLX_DMA_EN_BIT) | PLX_CLEAR_DMA_INTR_BIT, 855 writeb((dma0_status & PLX_DMA_EN_BIT) | PLX_CLEAR_DMA_INTR_BIT,
960 priv(dev)->plx9080_iobase + PLX_DMA0_CS_REG); 856 devpriv->plx9080_iobase + PLX_DMA0_CS_REG);
961 857
962 DEBUG_PRINT("dma0 status 0x%x\n", dma0_status); 858 DEBUG_PRINT("dma0 status 0x%x\n", dma0_status);
963 if (dma0_status & PLX_DMA_EN_BIT) 859 if (dma0_status & PLX_DMA_EN_BIT)
@@ -968,10 +864,10 @@ static irqreturn_t handle_interrupt(int irq, void *d)
968 864
969 /* spin lock makes sure no one else changes plx dma control reg */ 865 /* spin lock makes sure no one else changes plx dma control reg */
970 spin_lock_irqsave(&dev->spinlock, flags); 866 spin_lock_irqsave(&dev->spinlock, flags);
971 dma1_status = readb(priv(dev)->plx9080_iobase + PLX_DMA1_CS_REG); 867 dma1_status = readb(devpriv->plx9080_iobase + PLX_DMA1_CS_REG);
972 if (plx_status & ICS_DMA1_A) { /* XXX *//* dma chan 1 interrupt */ 868 if (plx_status & ICS_DMA1_A) { /* XXX *//* dma chan 1 interrupt */
973 writeb((dma1_status & PLX_DMA_EN_BIT) | PLX_CLEAR_DMA_INTR_BIT, 869 writeb((dma1_status & PLX_DMA_EN_BIT) | PLX_CLEAR_DMA_INTR_BIT,
974 priv(dev)->plx9080_iobase + PLX_DMA1_CS_REG); 870 devpriv->plx9080_iobase + PLX_DMA1_CS_REG);
975 DEBUG_PRINT("dma1 status 0x%x\n", dma1_status); 871 DEBUG_PRINT("dma1 status 0x%x\n", dma1_status);
976 872
977 DEBUG_PRINT(" cleared dma ch1 interrupt\n"); 873 DEBUG_PRINT(" cleared dma ch1 interrupt\n");
@@ -980,8 +876,8 @@ static irqreturn_t handle_interrupt(int irq, void *d)
980 876
981 /* clear possible plx9080 interrupt sources */ 877 /* clear possible plx9080 interrupt sources */
982 if (plx_status & ICS_LDIA) { /* clear local doorbell interrupt */ 878 if (plx_status & ICS_LDIA) { /* clear local doorbell interrupt */
983 plx_bits = readl(priv(dev)->plx9080_iobase + PLX_DBR_OUT_REG); 879 plx_bits = readl(devpriv->plx9080_iobase + PLX_DBR_OUT_REG);
984 writel(plx_bits, priv(dev)->plx9080_iobase + PLX_DBR_OUT_REG); 880 writel(plx_bits, devpriv->plx9080_iobase + PLX_DBR_OUT_REG);
985 DEBUG_PRINT(" cleared local doorbell bits 0x%x\n", plx_bits); 881 DEBUG_PRINT(" cleared local doorbell bits 0x%x\n", plx_bits);
986 } 882 }
987 883
@@ -989,7 +885,7 @@ static irqreturn_t handle_interrupt(int irq, void *d)
989 comedi_error(dev, "rx fifo overrun"); 885 comedi_error(dev, "rx fifo overrun");
990 async->events |= COMEDI_CB_EOA | COMEDI_CB_ERROR; 886 async->events |= COMEDI_CB_EOA | COMEDI_CB_ERROR;
991 DEBUG_PRINT("dma0_status 0x%x\n", 887 DEBUG_PRINT("dma0_status 0x%x\n",
992 (int)readb(priv(dev)->plx9080_iobase + 888 (int)readb(devpriv->plx9080_iobase +
993 PLX_DMA0_CS_REG)); 889 PLX_DMA0_CS_REG));
994 } 890 }
995 891
@@ -998,7 +894,7 @@ static irqreturn_t handle_interrupt(int irq, void *d)
998 async->events |= COMEDI_CB_EOA | COMEDI_CB_ERROR; 894 async->events |= COMEDI_CB_EOA | COMEDI_CB_ERROR;
999 } 895 }
1000 896
1001 if (priv(dev)->dio_count == 0) 897 if (devpriv->dio_count == 0)
1002 async->events |= COMEDI_CB_EOA; 898 async->events |= COMEDI_CB_EOA;
1003 899
1004 DEBUG_PRINT("board status 0x%x, ", hpdi_board_status); 900 DEBUG_PRINT("board status 0x%x, ", hpdi_board_status);
@@ -1013,21 +909,24 @@ static irqreturn_t handle_interrupt(int irq, void *d)
1013 909
1014static void abort_dma(struct comedi_device *dev, unsigned int channel) 910static void abort_dma(struct comedi_device *dev, unsigned int channel)
1015{ 911{
912 struct hpdi_private *devpriv = dev->private;
1016 unsigned long flags; 913 unsigned long flags;
1017 914
1018 /* spinlock for plx dma control/status reg */ 915 /* spinlock for plx dma control/status reg */
1019 spin_lock_irqsave(&dev->spinlock, flags); 916 spin_lock_irqsave(&dev->spinlock, flags);
1020 917
1021 plx9080_abort_dma(priv(dev)->plx9080_iobase, channel); 918 plx9080_abort_dma(devpriv->plx9080_iobase, channel);
1022 919
1023 spin_unlock_irqrestore(&dev->spinlock, flags); 920 spin_unlock_irqrestore(&dev->spinlock, flags);
1024} 921}
1025 922
1026static int hpdi_cancel(struct comedi_device *dev, struct comedi_subdevice *s) 923static int hpdi_cancel(struct comedi_device *dev, struct comedi_subdevice *s)
1027{ 924{
925 struct hpdi_private *devpriv = dev->private;
926
1028 hpdi_writel(dev, 0, BOARD_CONTROL_REG); 927 hpdi_writel(dev, 0, BOARD_CONTROL_REG);
1029 928
1030 writel(0, priv(dev)->hpdi_iobase + INTERRUPT_CONTROL_REG); 929 writel(0, devpriv->hpdi_iobase + INTERRUPT_CONTROL_REG);
1031 930
1032 abort_dma(dev, 0); 931 abort_dma(dev, 0);
1033 932
@@ -1037,17 +936,17 @@ static int hpdi_cancel(struct comedi_device *dev, struct comedi_subdevice *s)
1037static struct comedi_driver gsc_hpdi_driver = { 936static struct comedi_driver gsc_hpdi_driver = {
1038 .driver_name = "gsc_hpdi", 937 .driver_name = "gsc_hpdi",
1039 .module = THIS_MODULE, 938 .module = THIS_MODULE,
1040 .attach = hpdi_attach, 939 .auto_attach = hpdi_auto_attach,
1041 .detach = hpdi_detach, 940 .detach = hpdi_detach,
1042}; 941};
1043 942
1044static int __devinit gsc_hpdi_pci_probe(struct pci_dev *dev, 943static int gsc_hpdi_pci_probe(struct pci_dev *dev,
1045 const struct pci_device_id *ent) 944 const struct pci_device_id *ent)
1046{ 945{
1047 return comedi_pci_auto_config(dev, &gsc_hpdi_driver); 946 return comedi_pci_auto_config(dev, &gsc_hpdi_driver);
1048} 947}
1049 948
1050static void __devexit gsc_hpdi_pci_remove(struct pci_dev *dev) 949static void gsc_hpdi_pci_remove(struct pci_dev *dev)
1051{ 950{
1052 comedi_pci_auto_unconfig(dev); 951 comedi_pci_auto_unconfig(dev);
1053} 952}
@@ -1063,7 +962,7 @@ static struct pci_driver gsc_hpdi_pci_driver = {
1063 .name = "gsc_hpdi", 962 .name = "gsc_hpdi",
1064 .id_table = gsc_hpdi_pci_table, 963 .id_table = gsc_hpdi_pci_table,
1065 .probe = gsc_hpdi_pci_probe, 964 .probe = gsc_hpdi_pci_probe,
1066 .remove = __devexit_p(gsc_hpdi_pci_remove) 965 .remove = gsc_hpdi_pci_remove
1067}; 966};
1068module_comedi_pci_driver(gsc_hpdi_driver, gsc_hpdi_pci_driver); 967module_comedi_pci_driver(gsc_hpdi_driver, gsc_hpdi_pci_driver);
1069 968
diff --git a/drivers/staging/comedi/drivers/icp_multi.c b/drivers/staging/comedi/drivers/icp_multi.c
index d696d4d51e28..a91a448ba0f0 100644
--- a/drivers/staging/comedi/drivers/icp_multi.c
+++ b/drivers/staging/comedi/drivers/icp_multi.c
@@ -494,21 +494,21 @@ static int icp_multi_reset(struct comedi_device *dev)
494 return 0; 494 return 0;
495} 495}
496 496
497static int icp_multi_attach_pci(struct comedi_device *dev, 497static int icp_multi_auto_attach(struct comedi_device *dev,
498 struct pci_dev *pcidev) 498 unsigned long context_unused)
499{ 499{
500 struct pci_dev *pcidev = comedi_to_pci_dev(dev);
500 struct icp_multi_private *devpriv; 501 struct icp_multi_private *devpriv;
501 struct comedi_subdevice *s; 502 struct comedi_subdevice *s;
502 resource_size_t iobase; 503 resource_size_t iobase;
503 int ret; 504 int ret;
504 505
505 comedi_set_hw_dev(dev, &pcidev->dev);
506 dev->board_name = dev->driver->driver_name; 506 dev->board_name = dev->driver->driver_name;
507 507
508 ret = alloc_private(dev, sizeof(*devpriv)); 508 devpriv = kzalloc(sizeof(*devpriv), GFP_KERNEL);
509 if (ret < 0) 509 if (!devpriv)
510 return ret; 510 return -ENOMEM;
511 devpriv = dev->private; 511 dev->private = devpriv;
512 512
513 ret = comedi_pci_enable(pcidev, dev->board_name); 513 ret = comedi_pci_enable(pcidev, dev->board_name);
514 if (ret) 514 if (ret)
@@ -613,17 +613,17 @@ static void icp_multi_detach(struct comedi_device *dev)
613static struct comedi_driver icp_multi_driver = { 613static struct comedi_driver icp_multi_driver = {
614 .driver_name = "icp_multi", 614 .driver_name = "icp_multi",
615 .module = THIS_MODULE, 615 .module = THIS_MODULE,
616 .attach_pci = icp_multi_attach_pci, 616 .auto_attach = icp_multi_auto_attach,
617 .detach = icp_multi_detach, 617 .detach = icp_multi_detach,
618}; 618};
619 619
620static int __devinit icp_multi_pci_probe(struct pci_dev *dev, 620static int icp_multi_pci_probe(struct pci_dev *dev,
621 const struct pci_device_id *ent) 621 const struct pci_device_id *ent)
622{ 622{
623 return comedi_pci_auto_config(dev, &icp_multi_driver); 623 return comedi_pci_auto_config(dev, &icp_multi_driver);
624} 624}
625 625
626static void __devexit icp_multi_pci_remove(struct pci_dev *dev) 626static void icp_multi_pci_remove(struct pci_dev *dev)
627{ 627{
628 comedi_pci_auto_unconfig(dev); 628 comedi_pci_auto_unconfig(dev);
629} 629}
@@ -638,7 +638,7 @@ static struct pci_driver icp_multi_pci_driver = {
638 .name = "icp_multi", 638 .name = "icp_multi",
639 .id_table = icp_multi_pci_table, 639 .id_table = icp_multi_pci_table,
640 .probe = icp_multi_pci_probe, 640 .probe = icp_multi_pci_probe,
641 .remove = __devexit_p(icp_multi_pci_remove), 641 .remove = icp_multi_pci_remove,
642}; 642};
643module_comedi_pci_driver(icp_multi_driver, icp_multi_pci_driver); 643module_comedi_pci_driver(icp_multi_driver, icp_multi_pci_driver);
644 644
diff --git a/drivers/staging/comedi/drivers/ii_pci20kc.c b/drivers/staging/comedi/drivers/ii_pci20kc.c
index 65ff1c9b973c..93584e2be35a 100644
--- a/drivers/staging/comedi/drivers/ii_pci20kc.c
+++ b/drivers/staging/comedi/drivers/ii_pci20kc.c
@@ -156,7 +156,6 @@ struct pci20xxx_private {
156 union pci20xxx_subdev_private subdev_private[PCI20000_MODULES]; 156 union pci20xxx_subdev_private subdev_private[PCI20000_MODULES];
157}; 157};
158 158
159#define devpriv ((struct pci20xxx_private *)dev->private)
160#define CHAN (CR_CHAN(it->chanlist[0])) 159#define CHAN (CR_CHAN(it->chanlist[0]))
161 160
162static int pci20006_init(struct comedi_device *dev, struct comedi_subdevice *s, 161static int pci20006_init(struct comedi_device *dev, struct comedi_subdevice *s,
@@ -196,6 +195,7 @@ static int pci20xxx_dio_init(struct comedi_device *dev,
196static int pci20xxx_attach(struct comedi_device *dev, 195static int pci20xxx_attach(struct comedi_device *dev,
197 struct comedi_devconfig *it) 196 struct comedi_devconfig *it)
198{ 197{
198 struct pci20xxx_private *devpriv;
199 unsigned char i; 199 unsigned char i;
200 int ret; 200 int ret;
201 int id; 201 int id;
@@ -206,22 +206,23 @@ static int pci20xxx_attach(struct comedi_device *dev,
206 if (ret) 206 if (ret)
207 return ret; 207 return ret;
208 208
209 ret = alloc_private(dev, sizeof(struct pci20xxx_private)); 209 devpriv = kzalloc(sizeof(*devpriv), GFP_KERNEL);
210 if (ret < 0) 210 if (!devpriv)
211 return ret; 211 return -ENOMEM;
212 dev->private = devpriv;
212 213
213 devpriv->ioaddr = (void __iomem *)(unsigned long)it->options[0]; 214 devpriv->ioaddr = (void __iomem *)(unsigned long)it->options[0];
214 dev->board_name = "pci20kc"; 215 dev->board_name = "pci20kc";
215 216
216 /* Check PCI-20001 C-2A Carrier Board ID */ 217 /* Check PCI-20001 C-2A Carrier Board ID */
217 if ((readb(devpriv->ioaddr) & PCI20000_ID) != PCI20000_ID) { 218 if ((readb(devpriv->ioaddr) & PCI20000_ID) != PCI20000_ID) {
218 printk(KERN_WARNING "comedi%d: ii_pci20kc PCI-20001" 219 dev_warn(dev->class_dev,
219 " C-2A Carrier Board at base=0x%p not found !\n", 220 "PCI-20001 C-2A Carrier Board at base=0x%p not found !\n",
220 dev->minor, devpriv->ioaddr); 221 devpriv->ioaddr);
221 return -EINVAL; 222 return -EINVAL;
222 } 223 }
223 printk(KERN_INFO "comedi%d: ii_pci20kc: PCI-20001 C-2A at base=0x%p\n", 224 dev_info(dev->class_dev, "PCI-20001 C-2A at base=0x%p\n",
224 dev->minor, devpriv->ioaddr); 225 devpriv->ioaddr);
225 226
226 for (i = 0; i < PCI20000_MODULES; i++) { 227 for (i = 0; i < PCI20000_MODULES; i++) {
227 s = &dev->subdevices[i]; 228 s = &dev->subdevices[i];
@@ -234,23 +235,21 @@ static int pci20xxx_attach(struct comedi_device *dev,
234 devpriv->ioaddr + (i + 1) * PCI20000_OFFSET; 235 devpriv->ioaddr + (i + 1) * PCI20000_OFFSET;
235 pci20006_init(dev, s, it->options[2 * i + 2], 236 pci20006_init(dev, s, it->options[2 * i + 2],
236 it->options[2 * i + 3]); 237 it->options[2 * i + 3]);
237 printk(KERN_INFO "comedi%d: " 238 dev_info(dev->class_dev,
238 "ii_pci20kc PCI-20006 module in slot %d\n", 239 "PCI-20006 module in slot %d\n", i + 1);
239 dev->minor, i + 1);
240 break; 240 break;
241 case PCI20341_ID: 241 case PCI20341_ID:
242 sdp->pci20341.iobase = 242 sdp->pci20341.iobase =
243 devpriv->ioaddr + (i + 1) * PCI20000_OFFSET; 243 devpriv->ioaddr + (i + 1) * PCI20000_OFFSET;
244 pci20341_init(dev, s, it->options[2 * i + 2], 244 pci20341_init(dev, s, it->options[2 * i + 2],
245 it->options[2 * i + 3]); 245 it->options[2 * i + 3]);
246 printk(KERN_INFO "comedi%d: " 246 dev_info(dev->class_dev,
247 "ii_pci20kc PCI-20341 module in slot %d\n", 247 "PCI-20341 module in slot %d\n", i + 1);
248 dev->minor, i + 1);
249 break; 248 break;
250 default: 249 default:
251 printk(KERN_WARNING "ii_pci20kc: unknown module " 250 dev_warn(dev->class_dev,
252 "code 0x%02x in slot %d: module disabled\n", 251 "unknown module code 0x%02x in slot %d: module disabled\n",
253 id, i); /* XXX this looks like a bug! i + 1 ?? */ 252 id, i); /* XXX this looks like a bug! i + 1 ?? */
254 /* fall through */ 253 /* fall through */
255 case PCI20xxx_EMPTY_ID: 254 case PCI20xxx_EMPTY_ID:
256 s->type = COMEDI_SUBD_UNUSED; 255 s->type = COMEDI_SUBD_UNUSED;
@@ -346,8 +345,7 @@ static int pci20006_insn_write(struct comedi_device *dev,
346 writeb(0x00, sdp->iobase + PCI20006_STROBE1); 345 writeb(0x00, sdp->iobase + PCI20006_STROBE1);
347 break; 346 break;
348 default: 347 default:
349 printk(KERN_WARNING 348 dev_warn(dev->class_dev, "ao channel Error!\n");
350 " comedi%d: pci20xxx: ao channel Error!\n", dev->minor);
351 return -EINVAL; 349 return -EINVAL;
352 } 350 }
353 351
@@ -462,10 +460,8 @@ static int pci20341_insn_read(struct comedi_device *dev,
462 eoc = readb(sdp->iobase + PCI20341_STATUS_REG); 460 eoc = readb(sdp->iobase + PCI20341_STATUS_REG);
463 } 461 }
464 if (j >= 100) { 462 if (j >= 100) {
465 printk(KERN_WARNING 463 dev_warn(dev->class_dev,
466 "comedi%d: pci20xxx: " 464 "AI interrupt channel %i polling exit !\n", i);
467 "AI interrupt channel %i polling exit !\n",
468 dev->minor, i);
469 return -EINVAL; 465 return -EINVAL;
470 } 466 }
471 lo = readb(sdp->iobase + PCI20341_LDATA); 467 lo = readb(sdp->iobase + PCI20341_LDATA);
@@ -541,6 +537,7 @@ static int pci20xxx_dio_insn_bits(struct comedi_device *dev,
541 struct comedi_subdevice *s, 537 struct comedi_subdevice *s,
542 struct comedi_insn *insn, unsigned int *data) 538 struct comedi_insn *insn, unsigned int *data)
543{ 539{
540 struct pci20xxx_private *devpriv = dev->private;
544 unsigned int mask = data[0]; 541 unsigned int mask = data[0];
545 542
546 s->state &= ~mask; 543 s->state &= ~mask;
@@ -571,6 +568,7 @@ static int pci20xxx_dio_insn_bits(struct comedi_device *dev,
571static void pci20xxx_dio_config(struct comedi_device *dev, 568static void pci20xxx_dio_config(struct comedi_device *dev,
572 struct comedi_subdevice *s) 569 struct comedi_subdevice *s)
573{ 570{
571 struct pci20xxx_private *devpriv = dev->private;
574 unsigned char control_01; 572 unsigned char control_01;
575 unsigned char control_23; 573 unsigned char control_23;
576 unsigned char buffer; 574 unsigned char buffer;
@@ -627,6 +625,8 @@ static void pci20xxx_dio_config(struct comedi_device *dev,
627#if 0 625#if 0
628static void pci20xxx_do(struct comedi_device *dev, struct comedi_subdevice *s) 626static void pci20xxx_do(struct comedi_device *dev, struct comedi_subdevice *s)
629{ 627{
628 struct pci20xxx_private *devpriv = dev->private;
629
630 /* XXX if the channel is configured for input, does this 630 /* XXX if the channel is configured for input, does this
631 do bad things? */ 631 do bad things? */
632 /* XXX it would be a good idea to only update the registers 632 /* XXX it would be a good idea to only update the registers
@@ -641,9 +641,10 @@ static void pci20xxx_do(struct comedi_device *dev, struct comedi_subdevice *s)
641static unsigned int pci20xxx_di(struct comedi_device *dev, 641static unsigned int pci20xxx_di(struct comedi_device *dev,
642 struct comedi_subdevice *s) 642 struct comedi_subdevice *s)
643{ 643{
644 /* XXX same note as above */ 644 struct pci20xxx_private *devpriv = dev->private;
645 unsigned int bits; 645 unsigned int bits;
646 646
647 /* XXX same note as above */
647 bits = readb(devpriv->ioaddr + PCI20000_DIO_0); 648 bits = readb(devpriv->ioaddr + PCI20000_DIO_0);
648 bits |= readb(devpriv->ioaddr + PCI20000_DIO_1) << 8; 649 bits |= readb(devpriv->ioaddr + PCI20000_DIO_1) << 8;
649 bits |= readb(devpriv->ioaddr + PCI20000_DIO_2) << 16; 650 bits |= readb(devpriv->ioaddr + PCI20000_DIO_2) << 16;
diff --git a/drivers/staging/comedi/drivers/jr3_pci.c b/drivers/staging/comedi/drivers/jr3_pci.c
index 4a108ea8a9aa..c756a35ce31a 100644
--- a/drivers/staging/comedi/drivers/jr3_pci.c
+++ b/drivers/staging/comedi/drivers/jr3_pci.c
@@ -21,24 +21,26 @@
21 21
22*/ 22*/
23/* 23/*
24Driver: jr3_pci 24 * Driver: jr3_pci
25Description: JR3/PCI force sensor board 25 * Description: JR3/PCI force sensor board
26Author: Anders Blomdell <anders.blomdell@control.lth.se> 26 * Author: Anders Blomdell <anders.blomdell@control.lth.se>
27Status: works 27 * Updated: Thu, 01 Nov 2012 17:34:55 +0000
28Devices: [JR3] PCI force sensor board (jr3_pci) 28 * Status: works
29 29 * Devices: [JR3] PCI force sensor board (jr3_pci)
30 The DSP on the board requires initialization code, which can 30 *
31 be loaded by placing it in /lib/firmware/comedi. 31 * Configuration options:
32 The initialization code should be somewhere on the media you got 32 * None
33 with your card. One version is available from http://www.comedi.org 33 *
34 in the comedi_nonfree_firmware tarball. 34 * Manual configuration of comedi devices is not supported by this
35 35 * driver; supported PCI devices are configured as comedi devices
36 Configuration options: 36 * automatically.
37 [0] - PCI bus number - if bus number and slot number are 0, 37 *
38 then driver search for first unused card 38 * The DSP on the board requires initialization code, which can be
39 [1] - PCI slot number 39 * loaded by placing it in /lib/firmware/comedi. The initialization
40 40 * code should be somewhere on the media you got with your card. One
41*/ 41 * version is available from http://www.comedi.org in the
42 * comedi_nonfree_firmware tarball. The file is called "jr3pci.idm".
43 */
42 44
43#include "../comedidev.h" 45#include "../comedidev.h"
44 46
@@ -59,22 +61,18 @@ Devices: [JR3] PCI force sensor board (jr3_pci)
59#define PCI_DEVICE_ID_JR3_4_CHANNEL 0x3114 61#define PCI_DEVICE_ID_JR3_4_CHANNEL 0x3114
60 62
61struct jr3_pci_dev_private { 63struct jr3_pci_dev_private {
62 64 struct jr3_t __iomem *iobase;
63 struct pci_dev *pci_dev;
64 int pci_enabled;
65 volatile struct jr3_t *iobase;
66 int n_channels; 65 int n_channels;
67 struct timer_list timer; 66 struct timer_list timer;
68}; 67};
69 68
70struct poll_delay_t { 69struct poll_delay_t {
71
72 int min; 70 int min;
73 int max; 71 int max;
74}; 72};
75 73
76struct jr3_pci_subdev_private { 74struct jr3_pci_subdev_private {
77 volatile struct jr3_channel *channel; 75 struct jr3_channel __iomem *channel;
78 unsigned long next_time_min; 76 unsigned long next_time_min;
79 unsigned long next_time_max; 77 unsigned long next_time_max;
80 enum { state_jr3_poll, 78 enum { state_jr3_poll,
@@ -98,15 +96,15 @@ struct jr3_pci_subdev_private {
98}; 96};
99 97
100/* Hotplug firmware loading stuff */ 98/* Hotplug firmware loading stuff */
101static int comedi_load_firmware(struct comedi_device *dev, char *name, 99static int comedi_load_firmware(struct comedi_device *dev, const char *name,
102 int (*cb)(struct comedi_device *dev, 100 int (*cb)(struct comedi_device *dev,
103 const u8 *data, size_t size)) 101 const u8 *data, size_t size))
104{ 102{
103 struct pci_dev *pcidev = comedi_to_pci_dev(dev);
105 int result = 0; 104 int result = 0;
106 const struct firmware *fw; 105 const struct firmware *fw;
107 char *firmware_path; 106 char *firmware_path;
108 static const char *prefix = "comedi/"; 107 static const char *prefix = "comedi/";
109 struct jr3_pci_dev_private *devpriv = dev->private;
110 108
111 firmware_path = kmalloc(strlen(prefix) + strlen(name) + 1, GFP_KERNEL); 109 firmware_path = kmalloc(strlen(prefix) + strlen(name) + 1, GFP_KERNEL);
112 if (!firmware_path) { 110 if (!firmware_path) {
@@ -115,8 +113,7 @@ static int comedi_load_firmware(struct comedi_device *dev, char *name,
115 firmware_path[0] = '\0'; 113 firmware_path[0] = '\0';
116 strcat(firmware_path, prefix); 114 strcat(firmware_path, prefix);
117 strcat(firmware_path, name); 115 strcat(firmware_path, name);
118 result = request_firmware(&fw, firmware_path, 116 result = request_firmware(&fw, firmware_path, &pcidev->dev);
119 &devpriv->pci_dev->dev);
120 if (result == 0) { 117 if (result == 0) {
121 if (!cb) 118 if (!cb)
122 result = -EINVAL; 119 result = -EINVAL;
@@ -138,7 +135,7 @@ static struct poll_delay_t poll_delay_min_max(int min, int max)
138 return result; 135 return result;
139} 136}
140 137
141static int is_complete(volatile struct jr3_channel *channel) 138static int is_complete(struct jr3_channel __iomem *channel)
142{ 139{
143 return get_s16(&channel->command_word0) == 0; 140 return get_s16(&channel->command_word0) == 0;
144} 141}
@@ -150,14 +147,13 @@ struct transform_t {
150 } link[8]; 147 } link[8];
151}; 148};
152 149
153static void set_transforms(volatile struct jr3_channel *channel, 150static void set_transforms(struct jr3_channel __iomem *channel,
154 struct transform_t transf, short num) 151 struct transform_t transf, short num)
155{ 152{
156 int i; 153 int i;
157 154
158 num &= 0x000f; /* Make sure that 0 <= num <= 15 */ 155 num &= 0x000f; /* Make sure that 0 <= num <= 15 */
159 for (i = 0; i < 8; i++) { 156 for (i = 0; i < 8; i++) {
160
161 set_u16(&channel->transforms[num].link[i].link_type, 157 set_u16(&channel->transforms[num].link[i].link_type,
162 transf.link[i].link_type); 158 transf.link[i].link_type);
163 udelay(1); 159 udelay(1);
@@ -169,18 +165,18 @@ static void set_transforms(volatile struct jr3_channel *channel,
169 } 165 }
170} 166}
171 167
172static void use_transform(volatile struct jr3_channel *channel, 168static void use_transform(struct jr3_channel __iomem *channel,
173 short transf_num) 169 short transf_num)
174{ 170{
175 set_s16(&channel->command_word0, 0x0500 + (transf_num & 0x000f)); 171 set_s16(&channel->command_word0, 0x0500 + (transf_num & 0x000f));
176} 172}
177 173
178static void use_offset(volatile struct jr3_channel *channel, short offset_num) 174static void use_offset(struct jr3_channel __iomem *channel, short offset_num)
179{ 175{
180 set_s16(&channel->command_word0, 0x0600 + (offset_num & 0x000f)); 176 set_s16(&channel->command_word0, 0x0600 + (offset_num & 0x000f));
181} 177}
182 178
183static void set_offset(volatile struct jr3_channel *channel) 179static void set_offset(struct jr3_channel __iomem *channel)
184{ 180{
185 set_s16(&channel->command_word0, 0x0700); 181 set_s16(&channel->command_word0, 0x0700);
186} 182}
@@ -194,13 +190,9 @@ struct six_axis_t {
194 s16 mz; 190 s16 mz;
195}; 191};
196 192
197static void set_full_scales(volatile struct jr3_channel *channel, 193static void set_full_scales(struct jr3_channel __iomem *channel,
198 struct six_axis_t full_scale) 194 struct six_axis_t full_scale)
199{ 195{
200 printk("%d %d %d %d %d %d\n",
201 full_scale.fx,
202 full_scale.fy,
203 full_scale.fz, full_scale.mx, full_scale.my, full_scale.mz);
204 set_s16(&channel->full_scale.fx, full_scale.fx); 196 set_s16(&channel->full_scale.fx, full_scale.fx);
205 set_s16(&channel->full_scale.fy, full_scale.fy); 197 set_s16(&channel->full_scale.fy, full_scale.fy);
206 set_s16(&channel->full_scale.fz, full_scale.fz); 198 set_s16(&channel->full_scale.fz, full_scale.fz);
@@ -210,7 +202,7 @@ static void set_full_scales(volatile struct jr3_channel *channel,
210 set_s16(&channel->command_word0, 0x0a00); 202 set_s16(&channel->command_word0, 0x0a00);
211} 203}
212 204
213static struct six_axis_t get_min_full_scales(volatile struct jr3_channel 205static struct six_axis_t get_min_full_scales(struct jr3_channel __iomem
214 *channel) 206 *channel)
215{ 207{
216 struct six_axis_t result; 208 struct six_axis_t result;
@@ -223,7 +215,7 @@ static struct six_axis_t get_min_full_scales(volatile struct jr3_channel
223 return result; 215 return result;
224} 216}
225 217
226static struct six_axis_t get_max_full_scales(volatile struct jr3_channel 218static struct six_axis_t get_max_full_scales(struct jr3_channel __iomem
227 *channel) 219 *channel)
228{ 220{
229 struct six_axis_t result; 221 struct six_axis_t result;
@@ -273,71 +265,53 @@ static int jr3_pci_ai_insn_read(struct comedi_device *dev,
273 } else { 265 } else {
274 int F = 0; 266 int F = 0;
275 switch (axis) { 267 switch (axis) {
276 case 0:{ 268 case 0:
277 F = get_s16 269 F = get_s16(&p->channel->
278 (&p->channel->filter 270 filter[filter].fx);
279 [filter].fx);
280 }
281 break; 271 break;
282 case 1:{ 272 case 1:
283 F = get_s16 273 F = get_s16(&p->channel->
284 (&p->channel->filter 274 filter[filter].fy);
285 [filter].fy);
286 }
287 break; 275 break;
288 case 2:{ 276 case 2:
289 F = get_s16 277 F = get_s16(&p->channel->
290 (&p->channel->filter 278 filter[filter].fz);
291 [filter].fz);
292 }
293 break; 279 break;
294 case 3:{ 280 case 3:
295 F = get_s16 281 F = get_s16(&p->channel->
296 (&p->channel->filter 282 filter[filter].mx);
297 [filter].mx);
298 }
299 break; 283 break;
300 case 4:{ 284 case 4:
301 F = get_s16 285 F = get_s16(&p->channel->
302 (&p->channel->filter 286 filter[filter].my);
303 [filter].my);
304 }
305 break; 287 break;
306 case 5:{ 288 case 5:
307 F = get_s16 289 F = get_s16(&p->channel->
308 (&p->channel->filter 290 filter[filter].mz);
309 [filter].mz);
310 }
311 break; 291 break;
312 case 6:{ 292 case 6:
313 F = get_s16 293 F = get_s16(&p->channel->
314 (&p->channel->filter 294 filter[filter].v1);
315 [filter].v1);
316 }
317 break; 295 break;
318 case 7:{ 296 case 7:
319 F = get_s16 297 F = get_s16(&p->channel->
320 (&p->channel->filter 298 filter[filter].v2);
321 [filter].v2);
322 }
323 break; 299 break;
324 } 300 }
325 data[i] = F + 0x4000; 301 data[i] = F + 0x4000;
326 } 302 }
327 } else if (channel == 56) { 303 } else if (channel == 56) {
328 if (p->state != state_jr3_done) { 304 if (p->state != state_jr3_done)
329 data[i] = 0; 305 data[i] = 0;
330 } else { 306 else
331 data[i] = 307 data[i] =
332 get_u16(&p->channel->model_no); 308 get_u16(&p->channel->model_no);
333 }
334 } else if (channel == 57) { 309 } else if (channel == 57) {
335 if (p->state != state_jr3_done) { 310 if (p->state != state_jr3_done)
336 data[i] = 0; 311 data[i] = 0;
337 } else { 312 else
338 data[i] = 313 data[i] =
339 get_u16(&p->channel->serial_no); 314 get_u16(&p->channel->serial_no);
340 }
341 } 315 }
342 } 316 }
343 } 317 }
@@ -368,8 +342,8 @@ static int read_idm_word(const u8 *data, size_t size, int *pos,
368 int result = 0; 342 int result = 0;
369 if (pos && val) { 343 if (pos && val) {
370 /* Skip over non hex */ 344 /* Skip over non hex */
371 for (; *pos < size && !isxdigit(data[*pos]); (*pos)++) { 345 for (; *pos < size && !isxdigit(data[*pos]); (*pos)++)
372 } 346 ;
373 /* Collect value */ 347 /* Collect value */
374 *val = 0; 348 *val = 0;
375 for (; *pos < size; (*pos)++) { 349 for (; *pos < size; (*pos)++) {
@@ -378,14 +352,15 @@ static int read_idm_word(const u8 *data, size_t size, int *pos,
378 if (value >= 0) { 352 if (value >= 0) {
379 result = 1; 353 result = 1;
380 *val = (*val << 4) + value; 354 *val = (*val << 4) + value;
381 } else 355 } else {
382 break; 356 break;
357 }
383 } 358 }
384 } 359 }
385 return result; 360 return result;
386} 361}
387 362
388static int jr3_download_firmware(struct comedi_device *dev, const u8 * data, 363static int jr3_download_firmware(struct comedi_device *dev, const u8 *data,
389 size_t size) 364 size_t size)
390{ 365{
391 /* 366 /*
@@ -429,37 +404,38 @@ static int jr3_download_firmware(struct comedi_device *dev, const u8 * data,
429 pos = 0; 404 pos = 0;
430 while (more) { 405 while (more) {
431 unsigned int count, addr; 406 unsigned int count, addr;
432 more = more 407 more = more &&
433 && read_idm_word(data, size, &pos, &count); 408 read_idm_word(data, size, &pos, &count);
434 if (more && count == 0xffff) 409 if (more && count == 0xffff)
435 break; 410 break;
436 more = more 411 more = more &&
437 && read_idm_word(data, size, &pos, &addr); 412 read_idm_word(data, size, &pos, &addr);
438 dev_dbg(dev->class_dev, 413 dev_dbg(dev->class_dev,
439 "Loading#%d %4.4x bytes at %4.4x\n", 414 "Loading#%d %4.4x bytes at %4.4x\n",
440 i, count, addr); 415 i, count, addr);
441 while (more && count > 0) { 416 while (more && count > 0) {
442 if (addr & 0x4000) { 417 if (addr & 0x4000) {
443 /* 16 bit data, never seen in real life!! */ 418 /* 16 bit data, never seen
419 * in real life!! */
444 unsigned int data1; 420 unsigned int data1;
445 421
446 more = more 422 more = more &&
447 && read_idm_word(data, 423 read_idm_word(data,
448 size, &pos, 424 size, &pos,
449 &data1); 425 &data1);
450 count--; 426 count--;
451 /* printk("jr3_data, not tested\n"); */ 427 /* jr3[addr + 0x20000 * pnum] =
452 /* jr3[addr + 0x20000 * pnum] = data1; */ 428 data1; */
453 } else { 429 } else {
454 /* Download 24 bit program */ 430 /* Download 24 bit program */
455 unsigned int data1, data2; 431 unsigned int data1, data2;
456 432
457 more = more 433 more = more &&
458 && read_idm_word(data, 434 read_idm_word(data,
459 size, &pos, 435 size, &pos,
460 &data1); 436 &data1);
461 more = more 437 more = more &&
462 && read_idm_word(data, size, 438 read_idm_word(data, size,
463 &pos, 439 &pos,
464 &data2); 440 &data2);
465 count -= 2; 441 count -= 2;
@@ -474,7 +450,6 @@ static int jr3_download_firmware(struct comedi_device *dev, const u8 * data,
474 [i].program_high 450 [i].program_high
475 [addr], data2); 451 [addr], data2);
476 udelay(1); 452 udelay(1);
477
478 } 453 }
479 } 454 }
480 addr++; 455 addr++;
@@ -492,213 +467,152 @@ static struct poll_delay_t jr3_pci_poll_subdevice(struct comedi_subdevice *s)
492 int i; 467 int i;
493 468
494 if (p) { 469 if (p) {
495 volatile struct jr3_channel *channel = p->channel; 470 struct jr3_channel __iomem *channel = p->channel;
496 int errors = get_u16(&channel->errors); 471 int errors = get_u16(&channel->errors);
497 472
498 if (errors != p->errors) { 473 if (errors != p->errors)
499 printk("Errors: %x -> %x\n", p->errors, errors);
500 p->errors = errors; 474 p->errors = errors;
501 } 475
502 if (errors & (watch_dog | watch_dog2 | sensor_change)) { 476 if (errors & (watch_dog | watch_dog2 | sensor_change))
503 /* Sensor communication lost, force poll mode */ 477 /* Sensor communication lost, force poll mode */
504 p->state = state_jr3_poll; 478 p->state = state_jr3_poll;
505 479
506 }
507 switch (p->state) { 480 switch (p->state) {
508 case state_jr3_poll:{ 481 case state_jr3_poll: {
509 u16 model_no = get_u16(&channel->model_no); 482 u16 model_no = get_u16(&channel->model_no);
510 u16 serial_no = get_u16(&channel->serial_no); 483 u16 serial_no = get_u16(&channel->serial_no);
511 if ((errors & (watch_dog | watch_dog2)) || 484 if ((errors & (watch_dog | watch_dog2)) ||
512 model_no == 0 || serial_no == 0) { 485 model_no == 0 || serial_no == 0) {
513/* 486 /*
514 * Still no sensor, keep on polling. Since it takes up to 10 seconds 487 * Still no sensor, keep on polling.
515 * for offsets to stabilize, polling each second should suffice. 488 * Since it takes up to 10 seconds
516 */ 489 * for offsets to stabilize, polling
490 * each second should suffice.
491 */
517 result = poll_delay_min_max(1000, 2000); 492 result = poll_delay_min_max(1000, 2000);
518 } else { 493 } else {
519 p->retries = 0; 494 p->retries = 0;
520 p->state = 495 p->state =
521 state_jr3_init_wait_for_offset; 496 state_jr3_init_wait_for_offset;
522 result = poll_delay_min_max(1000, 2000); 497 result = poll_delay_min_max(1000, 2000);
523 } 498 }
524 } 499 }
525 break; 500 break;
526 case state_jr3_init_wait_for_offset:{ 501 case state_jr3_init_wait_for_offset:
527 p->retries++; 502 p->retries++;
528 if (p->retries < 10) { 503 if (p->retries < 10) {
529 /* Wait for offeset to stabilize (< 10 s according to manual) */ 504 /* Wait for offeset to stabilize
530 result = poll_delay_min_max(1000, 2000); 505 * (< 10 s according to manual) */
531 } else { 506 result = poll_delay_min_max(1000, 2000);
532 struct transform_t transf; 507 } else {
533 508 struct transform_t transf;
534 p->model_no = 509
535 get_u16(&channel->model_no); 510 p->model_no = get_u16(&channel->model_no);
536 p->serial_no = 511 p->serial_no = get_u16(&channel->serial_no);
537 get_u16(&channel->serial_no); 512
538 513 /* Transformation all zeros */
539 printk 514 for (i = 0; i < ARRAY_SIZE(transf.link); i++) {
540 ("Setting transform for channel %d\n", 515 transf.link[i].link_type =
541 p->channel_no); 516 (enum link_types)0;
542 printk("Sensor Model = %i\n", 517 transf.link[i].link_amount = 0;
543 p->model_no);
544 printk("Sensor Serial = %i\n",
545 p->serial_no);
546
547 /* Transformation all zeros */
548 for (i = 0; i < ARRAY_SIZE(transf.link); i++) {
549 transf.link[i].link_type =
550 (enum link_types)0;
551 transf.link[i].link_amount = 0;
552 }
553
554 set_transforms(channel, transf, 0);
555 use_transform(channel, 0);
556 p->state =
557 state_jr3_init_transform_complete;
558 result = poll_delay_min_max(20, 100); /* Allow 20 ms for completion */
559 } 518 }
560 } break;
561 case state_jr3_init_transform_complete:{
562 if (!is_complete(channel)) {
563 printk
564 ("state_jr3_init_transform_complete complete = %d\n",
565 is_complete(channel));
566 result = poll_delay_min_max(20, 100);
567 } else {
568 /* Set full scale */
569 struct six_axis_t min_full_scale;
570 struct six_axis_t max_full_scale;
571
572 min_full_scale =
573 get_min_full_scales(channel);
574 printk("Obtained Min. Full Scales:\n");
575 printk(KERN_DEBUG "%i ", (min_full_scale).fx);
576 printk(KERN_CONT "%i ", (min_full_scale).fy);
577 printk(KERN_CONT "%i ", (min_full_scale).fz);
578 printk(KERN_CONT "%i ", (min_full_scale).mx);
579 printk(KERN_CONT "%i ", (min_full_scale).my);
580 printk(KERN_CONT "%i ", (min_full_scale).mz);
581 printk(KERN_CONT "\n");
582
583 max_full_scale =
584 get_max_full_scales(channel);
585 printk("Obtained Max. Full Scales:\n");
586 printk(KERN_DEBUG "%i ", (max_full_scale).fx);
587 printk(KERN_CONT "%i ", (max_full_scale).fy);
588 printk(KERN_CONT "%i ", (max_full_scale).fz);
589 printk(KERN_CONT "%i ", (max_full_scale).mx);
590 printk(KERN_CONT "%i ", (max_full_scale).my);
591 printk(KERN_CONT "%i ", (max_full_scale).mz);
592 printk(KERN_CONT "\n");
593
594 set_full_scales(channel,
595 max_full_scale);
596 519
597 p->state = 520 set_transforms(channel, transf, 0);
598 state_jr3_init_set_full_scale_complete; 521 use_transform(channel, 0);
599 result = poll_delay_min_max(20, 100); /* Allow 20 ms for completion */ 522 p->state = state_jr3_init_transform_complete;
600 } 523 /* Allow 20 ms for completion */
524 result = poll_delay_min_max(20, 100);
601 } 525 }
602 break; 526 break;
603 case state_jr3_init_set_full_scale_complete:{ 527 case state_jr3_init_transform_complete:
604 if (!is_complete(channel)) { 528 if (!is_complete(channel)) {
605 printk 529 result = poll_delay_min_max(20, 100);
606 ("state_jr3_init_set_full_scale_complete complete = %d\n", 530 } else {
607 is_complete(channel)); 531 /* Set full scale */
608 result = poll_delay_min_max(20, 100); 532 struct six_axis_t min_full_scale;
609 } else { 533 struct six_axis_t max_full_scale;
610 volatile struct force_array *full_scale; 534
611 535 min_full_scale = get_min_full_scales(channel);
612 /* Use ranges in kN or we will overflow arount 2000N! */ 536 max_full_scale = get_max_full_scales(channel);
613 full_scale = &channel->full_scale; 537 set_full_scales(channel, max_full_scale);
614 p->range[0].range.min = 538
615 -get_s16(&full_scale->fx) * 1000; 539 p->state =
616 p->range[0].range.max = 540 state_jr3_init_set_full_scale_complete;
617 get_s16(&full_scale->fx) * 1000; 541 /* Allow 20 ms for completion */
618 p->range[1].range.min = 542 result = poll_delay_min_max(20, 100);
619 -get_s16(&full_scale->fy) * 1000;
620 p->range[1].range.max =
621 get_s16(&full_scale->fy) * 1000;
622 p->range[2].range.min =
623 -get_s16(&full_scale->fz) * 1000;
624 p->range[2].range.max =
625 get_s16(&full_scale->fz) * 1000;
626 p->range[3].range.min =
627 -get_s16(&full_scale->mx) * 100;
628 p->range[3].range.max =
629 get_s16(&full_scale->mx) * 100;
630 p->range[4].range.min =
631 -get_s16(&full_scale->my) * 100;
632 p->range[4].range.max =
633 get_s16(&full_scale->my) * 100;
634 p->range[5].range.min =
635 -get_s16(&full_scale->mz) * 100;
636 p->range[5].range.max =
637 get_s16(&full_scale->mz) * 100;
638 p->range[6].range.min = -get_s16(&full_scale->v1) * 100; /* ?? */
639 p->range[6].range.max = get_s16(&full_scale->v1) * 100; /* ?? */
640 p->range[7].range.min = -get_s16(&full_scale->v2) * 100; /* ?? */
641 p->range[7].range.max = get_s16(&full_scale->v2) * 100; /* ?? */
642 p->range[8].range.min = 0;
643 p->range[8].range.max = 65535;
644
645 {
646 int i;
647 for (i = 0; i < 9; i++) {
648 printk("%d %d - %d\n",
649 i,
650 p->
651 range[i].range.
652 min,
653 p->
654 range[i].range.
655 max);
656 }
657 }
658
659 use_offset(channel, 0);
660 p->state =
661 state_jr3_init_use_offset_complete;
662 result = poll_delay_min_max(40, 100); /* Allow 40 ms for completion */
663 }
664 } 543 }
665 break; 544 break;
666 case state_jr3_init_use_offset_complete:{ 545 case state_jr3_init_set_full_scale_complete:
667 if (!is_complete(channel)) { 546 if (!is_complete(channel)) {
668 printk 547 result = poll_delay_min_max(20, 100);
669 ("state_jr3_init_use_offset_complete complete = %d\n", 548 } else {
670 is_complete(channel)); 549 struct force_array __iomem *full_scale;
671 result = poll_delay_min_max(20, 100); 550
672 } else { 551 /* Use ranges in kN or we will
673 printk 552 * overflow around 2000N! */
674 ("Default offsets %d %d %d %d %d %d\n", 553 full_scale = &channel->full_scale;
675 get_s16(&channel->offsets.fx), 554 p->range[0].range.min =
676 get_s16(&channel->offsets.fy), 555 -get_s16(&full_scale->fx) * 1000;
677 get_s16(&channel->offsets.fz), 556 p->range[0].range.max =
678 get_s16(&channel->offsets.mx), 557 get_s16(&full_scale->fx) * 1000;
679 get_s16(&channel->offsets.my), 558 p->range[1].range.min =
680 get_s16(&channel->offsets.mz)); 559 -get_s16(&full_scale->fy) * 1000;
681 560 p->range[1].range.max =
682 set_s16(&channel->offsets.fx, 0); 561 get_s16(&full_scale->fy) * 1000;
683 set_s16(&channel->offsets.fy, 0); 562 p->range[2].range.min =
684 set_s16(&channel->offsets.fz, 0); 563 -get_s16(&full_scale->fz) * 1000;
685 set_s16(&channel->offsets.mx, 0); 564 p->range[2].range.max =
686 set_s16(&channel->offsets.my, 0); 565 get_s16(&full_scale->fz) * 1000;
687 set_s16(&channel->offsets.mz, 0); 566 p->range[3].range.min =
688 567 -get_s16(&full_scale->mx) * 100;
689 set_offset(channel); 568 p->range[3].range.max =
690 569 get_s16(&full_scale->mx) * 100;
691 p->state = state_jr3_done; 570 p->range[4].range.min =
692 } 571 -get_s16(&full_scale->my) * 100;
572 p->range[4].range.max =
573 get_s16(&full_scale->my) * 100;
574 p->range[5].range.min =
575 -get_s16(&full_scale->mz) * 100;
576 p->range[5].range.max =
577 get_s16(&full_scale->mz) * 100; /* ?? */
578 p->range[6].range.min =
579 -get_s16(&full_scale->v1) * 100;/* ?? */
580 p->range[6].range.max =
581 get_s16(&full_scale->v1) * 100; /* ?? */
582 p->range[7].range.min =
583 -get_s16(&full_scale->v2) * 100;/* ?? */
584 p->range[7].range.max =
585 get_s16(&full_scale->v2) * 100; /* ?? */
586 p->range[8].range.min = 0;
587 p->range[8].range.max = 65535;
588
589 use_offset(channel, 0);
590 p->state = state_jr3_init_use_offset_complete;
591 /* Allow 40 ms for completion */
592 result = poll_delay_min_max(40, 100);
693 } 593 }
694 break; 594 break;
695 case state_jr3_done:{ 595 case state_jr3_init_use_offset_complete:
696 poll_delay_min_max(10000, 20000); 596 if (!is_complete(channel)) {
597 result = poll_delay_min_max(20, 100);
598 } else {
599 set_s16(&channel->offsets.fx, 0);
600 set_s16(&channel->offsets.fy, 0);
601 set_s16(&channel->offsets.fz, 0);
602 set_s16(&channel->offsets.mx, 0);
603 set_s16(&channel->offsets.my, 0);
604 set_s16(&channel->offsets.mz, 0);
605
606 set_offset(channel);
607
608 p->state = state_jr3_done;
697 } 609 }
698 break; 610 break;
699 default:{ 611 case state_jr3_done:
700 poll_delay_min_max(1000, 2000); 612 poll_delay_min_max(10000, 20000);
701 } 613 break;
614 default:
615 poll_delay_min_max(1000, 2000);
702 break; 616 break;
703 } 617 }
704 } 618 }
@@ -720,22 +634,21 @@ static void jr3_pci_poll_dev(unsigned long data)
720 /* Poll all channels that are ready to be polled */ 634 /* Poll all channels that are ready to be polled */
721 for (i = 0; i < devpriv->n_channels; i++) { 635 for (i = 0; i < devpriv->n_channels; i++) {
722 struct jr3_pci_subdev_private *subdevpriv = 636 struct jr3_pci_subdev_private *subdevpriv =
723 dev->subdevices[i].private; 637 dev->subdevices[i].private;
724 if (now > subdevpriv->next_time_min) { 638 if (now > subdevpriv->next_time_min) {
725 struct poll_delay_t sub_delay; 639 struct poll_delay_t sub_delay;
726 640
727 sub_delay = jr3_pci_poll_subdevice(&dev->subdevices[i]); 641 sub_delay = jr3_pci_poll_subdevice(&dev->subdevices[i]);
728 subdevpriv->next_time_min = 642 subdevpriv->next_time_min =
729 jiffies + msecs_to_jiffies(sub_delay.min); 643 jiffies + msecs_to_jiffies(sub_delay.min);
730 subdevpriv->next_time_max = 644 subdevpriv->next_time_max =
731 jiffies + msecs_to_jiffies(sub_delay.max); 645 jiffies + msecs_to_jiffies(sub_delay.max);
732 if (sub_delay.max && sub_delay.max < delay) { 646 if (sub_delay.max && sub_delay.max < delay)
733/* 647 /*
734* Wake up as late as possible -> poll as many channels as possible 648 * Wake up as late as possible ->
735* at once 649 * poll as many channels as possible at once.
736*/ 650 */
737 delay = sub_delay.max; 651 delay = sub_delay.max;
738 }
739 } 652 }
740 } 653 }
741 spin_unlock_irqrestore(&dev->spinlock, flags); 654 spin_unlock_irqrestore(&dev->spinlock, flags);
@@ -744,17 +657,14 @@ static void jr3_pci_poll_dev(unsigned long data)
744 add_timer(&devpriv->timer); 657 add_timer(&devpriv->timer);
745} 658}
746 659
747static int jr3_pci_attach(struct comedi_device *dev, 660static int jr3_pci_auto_attach(struct comedi_device *dev,
748 struct comedi_devconfig *it) 661 unsigned long context_unused)
749{ 662{
750 int result = 0; 663 int result;
751 struct pci_dev *card = NULL; 664 struct pci_dev *pcidev = comedi_to_pci_dev(dev);
752 int opt_bus, opt_slot, i; 665 int i;
753 struct jr3_pci_dev_private *devpriv; 666 struct jr3_pci_dev_private *devpriv;
754 667
755 opt_bus = it->options[0];
756 opt_slot = it->options[1];
757
758 if (sizeof(struct jr3_channel) != 0xc00) { 668 if (sizeof(struct jr3_channel) != 0xc00) {
759 dev_err(dev->class_dev, 669 dev_err(dev->class_dev,
760 "sizeof(struct jr3_channel) = %x [expected %x]\n", 670 "sizeof(struct jr3_channel) = %x [expected %x]\n",
@@ -762,70 +672,42 @@ static int jr3_pci_attach(struct comedi_device *dev,
762 return -EINVAL; 672 return -EINVAL;
763 } 673 }
764 674
765 result = alloc_private(dev, sizeof(struct jr3_pci_dev_private)); 675 devpriv = kzalloc(sizeof(*devpriv), GFP_KERNEL);
766 if (result < 0) 676 if (!devpriv)
767 return -ENOMEM; 677 return -ENOMEM;
768 card = NULL; 678 dev->private = devpriv;
769 devpriv = dev->private; 679
770 init_timer(&devpriv->timer); 680 init_timer(&devpriv->timer);
771 while (1) { 681 switch (pcidev->device) {
772 card = pci_get_device(PCI_VENDOR_ID_JR3, PCI_ANY_ID, card); 682 case PCI_DEVICE_ID_JR3_1_CHANNEL:
773 if (card == NULL) { 683 case PCI_DEVICE_ID_JR3_1_CHANNEL_NEW:
774 /* No card found */ 684 devpriv->n_channels = 1;
775 break; 685 break;
776 } else { 686 case PCI_DEVICE_ID_JR3_2_CHANNEL:
777 switch (card->device) { 687 devpriv->n_channels = 2;
778 case PCI_DEVICE_ID_JR3_1_CHANNEL:{ 688 break;
779 devpriv->n_channels = 1; 689 case PCI_DEVICE_ID_JR3_3_CHANNEL:
780 } 690 devpriv->n_channels = 3;
781 break; 691 break;
782 case PCI_DEVICE_ID_JR3_1_CHANNEL_NEW:{ 692 case PCI_DEVICE_ID_JR3_4_CHANNEL:
783 devpriv->n_channels = 1; 693 devpriv->n_channels = 4;
784 } 694 break;
785 break; 695 default:
786 case PCI_DEVICE_ID_JR3_2_CHANNEL:{ 696 dev_err(dev->class_dev, "jr3_pci: pci %s not supported\n",
787 devpriv->n_channels = 2; 697 pci_name(pcidev));
788 } 698 return -EINVAL;
789 break; 699 break;
790 case PCI_DEVICE_ID_JR3_3_CHANNEL:{
791 devpriv->n_channels = 3;
792 }
793 break;
794 case PCI_DEVICE_ID_JR3_4_CHANNEL:{
795 devpriv->n_channels = 4;
796 }
797 break;
798 default:{
799 devpriv->n_channels = 0;
800 }
801 }
802 if (devpriv->n_channels >= 1) {
803 if (opt_bus == 0 && opt_slot == 0) {
804 /* Take first available card */
805 break;
806 } else if (opt_bus == card->bus->number &&
807 opt_slot == PCI_SLOT(card->devfn)) {
808 /* Take requested card */
809 break;
810 }
811 }
812 }
813 }
814 if (!card) {
815 dev_err(dev->class_dev, "no jr3_pci found\n");
816 return -EIO;
817 } else {
818 devpriv->pci_dev = card;
819 dev->board_name = "jr3_pci";
820 } 700 }
701 dev->board_name = "jr3_pci";
821 702
822 result = comedi_pci_enable(card, "jr3_pci"); 703 result = comedi_pci_enable(pcidev, "jr3_pci");
823 if (result < 0) 704 if (result < 0)
824 return -EIO; 705 return result;
825 706
826 devpriv->pci_enabled = 1; 707 dev->iobase = 1; /* the "detach" needs this */
827 devpriv->iobase = ioremap(pci_resource_start(card, 0), 708 devpriv->iobase = ioremap(pci_resource_start(pcidev, 0),
828 offsetof(struct jr3_t, channel[devpriv->n_channels])); 709 offsetof(struct jr3_t,
710 channel[devpriv->n_channels]));
829 if (!devpriv->iobase) 711 if (!devpriv->iobase)
830 return -ENOMEM; 712 return -ENOMEM;
831 713
@@ -840,7 +722,8 @@ static int jr3_pci_attach(struct comedi_device *dev,
840 dev->subdevices[i].n_chan = 8 * 7 + 2; 722 dev->subdevices[i].n_chan = 8 * 7 + 2;
841 dev->subdevices[i].insn_read = jr3_pci_ai_insn_read; 723 dev->subdevices[i].insn_read = jr3_pci_ai_insn_read;
842 dev->subdevices[i].private = 724 dev->subdevices[i].private =
843 kzalloc(sizeof(struct jr3_pci_subdev_private), GFP_KERNEL); 725 kzalloc(sizeof(struct jr3_pci_subdev_private),
726 GFP_KERNEL);
844 if (dev->subdevices[i].private) { 727 if (dev->subdevices[i].private) {
845 struct jr3_pci_subdev_private *p; 728 struct jr3_pci_subdev_private *p;
846 int j; 729 int j;
@@ -849,8 +732,8 @@ static int jr3_pci_attach(struct comedi_device *dev,
849 p->channel = &devpriv->iobase->channel[i].data; 732 p->channel = &devpriv->iobase->channel[i].data;
850 dev_dbg(dev->class_dev, "p->channel %p %p (%tx)\n", 733 dev_dbg(dev->class_dev, "p->channel %p %p (%tx)\n",
851 p->channel, devpriv->iobase, 734 p->channel, devpriv->iobase,
852 ((char *)(p->channel) - 735 ((char __iomem *)p->channel -
853 (char *)(devpriv->iobase))); 736 (char __iomem *)devpriv->iobase));
854 p->channel_no = i; 737 p->channel_no = i;
855 for (j = 0; j < 8; j++) { 738 for (j = 0; j < 8; j++) {
856 int k; 739 int k;
@@ -870,15 +753,15 @@ static int jr3_pci_attach(struct comedi_device *dev,
870 p->range[8].range.max = 65536; 753 p->range[8].range.max = 65536;
871 754
872 p->range_table_list[56] = 755 p->range_table_list[56] =
873 (struct comedi_lrange *)&p->range[8]; 756 (struct comedi_lrange *)&p->range[8];
874 p->range_table_list[57] = 757 p->range_table_list[57] =
875 (struct comedi_lrange *)&p->range[8]; 758 (struct comedi_lrange *)&p->range[8];
876 p->maxdata_list[56] = 0xffff; 759 p->maxdata_list[56] = 0xffff;
877 p->maxdata_list[57] = 0xffff; 760 p->maxdata_list[57] = 0xffff;
878 /* Channel specific range and maxdata */ 761 /* Channel specific range and maxdata */
879 dev->subdevices[i].range_table = NULL; 762 dev->subdevices[i].range_table = NULL;
880 dev->subdevices[i].range_table_list = 763 dev->subdevices[i].range_table_list =
881 p->range_table_list; 764 p->range_table_list;
882 dev->subdevices[i].maxdata = 0; 765 dev->subdevices[i].maxdata = 0;
883 dev->subdevices[i].maxdata_list = p->maxdata_list; 766 dev->subdevices[i].maxdata_list = p->maxdata_list;
884 } 767 }
@@ -891,19 +774,20 @@ static int jr3_pci_attach(struct comedi_device *dev,
891 dev_dbg(dev->class_dev, "Firmare load %d\n", result); 774 dev_dbg(dev->class_dev, "Firmare load %d\n", result);
892 775
893 if (result < 0) 776 if (result < 0)
894 goto out; 777 return result;
895/* 778 /*
896 * TODO: use firmware to load preferred offset tables. Suggested 779 * TODO: use firmware to load preferred offset tables. Suggested
897 * format: 780 * format:
898 * model serial Fx Fy Fz Mx My Mz\n 781 * model serial Fx Fy Fz Mx My Mz\n
899 * 782 *
900 * comedi_load_firmware(dev, "jr3_offsets_table", jr3_download_firmware); 783 * comedi_load_firmware(dev, "jr3_offsets_table",
901 */ 784 * jr3_download_firmware);
785 */
902 786
903/* 787 /*
904 * It takes a few milliseconds for software to settle as much as we 788 * It takes a few milliseconds for software to settle as much as we
905 * can read firmware version 789 * can read firmware version
906 */ 790 */
907 msleep_interruptible(25); 791 msleep_interruptible(25);
908 for (i = 0; i < 0x18; i++) { 792 for (i = 0; i < 0x18; i++) {
909 dev_dbg(dev->class_dev, "%c\n", 793 dev_dbg(dev->class_dev, "%c\n",
@@ -924,13 +808,13 @@ static int jr3_pci_attach(struct comedi_device *dev,
924 devpriv->timer.expires = jiffies + msecs_to_jiffies(1000); 808 devpriv->timer.expires = jiffies + msecs_to_jiffies(1000);
925 add_timer(&devpriv->timer); 809 add_timer(&devpriv->timer);
926 810
927out:
928 return result; 811 return result;
929} 812}
930 813
931static void jr3_pci_detach(struct comedi_device *dev) 814static void jr3_pci_detach(struct comedi_device *dev)
932{ 815{
933 int i; 816 int i;
817 struct pci_dev *pcidev = comedi_to_pci_dev(dev);
934 struct jr3_pci_dev_private *devpriv = dev->private; 818 struct jr3_pci_dev_private *devpriv = dev->private;
935 819
936 if (devpriv) { 820 if (devpriv) {
@@ -941,28 +825,26 @@ static void jr3_pci_detach(struct comedi_device *dev)
941 kfree(dev->subdevices[i].private); 825 kfree(dev->subdevices[i].private);
942 } 826 }
943 if (devpriv->iobase) 827 if (devpriv->iobase)
944 iounmap((void *)devpriv->iobase); 828 iounmap(devpriv->iobase);
945 if (devpriv->pci_enabled) 829 if (dev->iobase)
946 comedi_pci_disable(devpriv->pci_dev); 830 comedi_pci_disable(pcidev);
947 if (devpriv->pci_dev)
948 pci_dev_put(devpriv->pci_dev);
949 } 831 }
950} 832}
951 833
952static struct comedi_driver jr3_pci_driver = { 834static struct comedi_driver jr3_pci_driver = {
953 .driver_name = "jr3_pci", 835 .driver_name = "jr3_pci",
954 .module = THIS_MODULE, 836 .module = THIS_MODULE,
955 .attach = jr3_pci_attach, 837 .auto_attach = jr3_pci_auto_attach,
956 .detach = jr3_pci_detach, 838 .detach = jr3_pci_detach,
957}; 839};
958 840
959static int __devinit jr3_pci_pci_probe(struct pci_dev *dev, 841static int jr3_pci_pci_probe(struct pci_dev *dev,
960 const struct pci_device_id *ent) 842 const struct pci_device_id *ent)
961{ 843{
962 return comedi_pci_auto_config(dev, &jr3_pci_driver); 844 return comedi_pci_auto_config(dev, &jr3_pci_driver);
963} 845}
964 846
965static void __devexit jr3_pci_pci_remove(struct pci_dev *dev) 847static void jr3_pci_pci_remove(struct pci_dev *dev)
966{ 848{
967 comedi_pci_auto_unconfig(dev); 849 comedi_pci_auto_unconfig(dev);
968} 850}
@@ -981,7 +863,7 @@ static struct pci_driver jr3_pci_pci_driver = {
981 .name = "jr3_pci", 863 .name = "jr3_pci",
982 .id_table = jr3_pci_pci_table, 864 .id_table = jr3_pci_pci_table,
983 .probe = jr3_pci_pci_probe, 865 .probe = jr3_pci_pci_probe,
984 .remove = __devexit_p(jr3_pci_pci_remove), 866 .remove = jr3_pci_pci_remove,
985}; 867};
986module_comedi_pci_driver(jr3_pci_driver, jr3_pci_pci_driver); 868module_comedi_pci_driver(jr3_pci_driver, jr3_pci_pci_driver);
987 869
diff --git a/drivers/staging/comedi/drivers/jr3_pci.h b/drivers/staging/comedi/drivers/jr3_pci.h
index 9c42653d8f18..3317f7a04c48 100644
--- a/drivers/staging/comedi/drivers/jr3_pci.h
+++ b/drivers/staging/comedi/drivers/jr3_pci.h
@@ -2,22 +2,22 @@
2 * is 16 bits, but aligned on a 32 bit PCI boundary 2 * is 16 bits, but aligned on a 32 bit PCI boundary
3 */ 3 */
4 4
5static inline u16 get_u16(volatile const u32 * p) 5static inline u16 get_u16(const u32 __iomem *p)
6{ 6{
7 return (u16) readl(p); 7 return (u16)readl(p);
8} 8}
9 9
10static inline void set_u16(volatile u32 * p, u16 val) 10static inline void set_u16(u32 __iomem *p, u16 val)
11{ 11{
12 writel(val, p); 12 writel(val, p);
13} 13}
14 14
15static inline s16 get_s16(volatile const s32 * p) 15static inline s16 get_s16(const s32 __iomem *p)
16{ 16{
17 return (s16) readl(p); 17 return (s16)readl(p);
18} 18}
19 19
20static inline void set_s16(volatile s32 * p, s16 val) 20static inline void set_s16(s32 __iomem *p, s16 val)
21{ 21{
22 writel(val, p); 22 writel(val, p);
23} 23}
diff --git a/drivers/staging/comedi/drivers/ke_counter.c b/drivers/staging/comedi/drivers/ke_counter.c
index e867b720f666..19c94282ac3f 100644
--- a/drivers/staging/comedi/drivers/ke_counter.c
+++ b/drivers/staging/comedi/drivers/ke_counter.c
@@ -36,28 +36,8 @@ Kolter Electronic PCI Counter Card.
36 36
37#include "../comedidev.h" 37#include "../comedidev.h"
38 38
39#define CNT_DRIVER_NAME "ke_counter"
40#define PCI_VENDOR_ID_KOLTER 0x1001
41#define CNT_CARD_DEVICE_ID 0x0014 39#define CNT_CARD_DEVICE_ID 0x0014
42 40
43/*-- board specification structure ------------------------------------------*/
44
45struct cnt_board_struct {
46
47 const char *name;
48 int device_id;
49 int cnt_channel_nbr;
50 int cnt_bits;
51};
52
53static const struct cnt_board_struct cnt_boards[] = {
54 {
55 .name = CNT_DRIVER_NAME,
56 .device_id = CNT_CARD_DEVICE_ID,
57 .cnt_channel_nbr = 3,
58 .cnt_bits = 24}
59};
60
61/*-- counter write ----------------------------------------------------------*/ 41/*-- counter write ----------------------------------------------------------*/
62 42
63/* This should be used only for resetting the counters; maybe it is better 43/* This should be used only for resetting the counters; maybe it is better
@@ -107,34 +87,14 @@ static int cnt_rinsn(struct comedi_device *dev,
107 return 1; 87 return 1;
108} 88}
109 89
110static const void *cnt_find_boardinfo(struct comedi_device *dev, 90static int cnt_auto_attach(struct comedi_device *dev,
111 struct pci_dev *pcidev) 91 unsigned long context_unused)
112{ 92{
113 const struct cnt_board_struct *board; 93 struct pci_dev *pcidev = comedi_to_pci_dev(dev);
114 int i;
115
116 for (i = 0; i < ARRAY_SIZE(cnt_boards); i++) {
117 board = &cnt_boards[i];
118 if (board->device_id == pcidev->device)
119 return board;
120 }
121 return NULL;
122}
123
124static int cnt_attach_pci(struct comedi_device *dev,
125 struct pci_dev *pcidev)
126{
127 const struct cnt_board_struct *board;
128 struct comedi_subdevice *s; 94 struct comedi_subdevice *s;
129 int ret; 95 int ret;
130 96
131 comedi_set_hw_dev(dev, &pcidev->dev); 97 dev->board_name = dev->driver->driver_name;
132
133 board = cnt_find_boardinfo(dev, pcidev);
134 if (!board)
135 return -ENODEV;
136 dev->board_ptr = board;
137 dev->board_name = board->name;
138 98
139 ret = comedi_pci_enable(pcidev, dev->board_name); 99 ret = comedi_pci_enable(pcidev, dev->board_name);
140 if (ret) 100 if (ret)
@@ -150,8 +110,8 @@ static int cnt_attach_pci(struct comedi_device *dev,
150 110
151 s->type = COMEDI_SUBD_COUNTER; 111 s->type = COMEDI_SUBD_COUNTER;
152 s->subdev_flags = SDF_READABLE /* | SDF_COMMON */ ; 112 s->subdev_flags = SDF_READABLE /* | SDF_COMMON */ ;
153 s->n_chan = board->cnt_channel_nbr; 113 s->n_chan = 3;
154 s->maxdata = (1 << board->cnt_bits) - 1; 114 s->maxdata = 0x00ffffff;
155 s->insn_read = cnt_rinsn; 115 s->insn_read = cnt_rinsn;
156 s->insn_write = cnt_winsn; 116 s->insn_write = cnt_winsn;
157 117
@@ -182,17 +142,17 @@ static void cnt_detach(struct comedi_device *dev)
182static struct comedi_driver ke_counter_driver = { 142static struct comedi_driver ke_counter_driver = {
183 .driver_name = "ke_counter", 143 .driver_name = "ke_counter",
184 .module = THIS_MODULE, 144 .module = THIS_MODULE,
185 .attach_pci = cnt_attach_pci, 145 .auto_attach = cnt_auto_attach,
186 .detach = cnt_detach, 146 .detach = cnt_detach,
187}; 147};
188 148
189static int __devinit ke_counter_pci_probe(struct pci_dev *dev, 149static int ke_counter_pci_probe(struct pci_dev *dev,
190 const struct pci_device_id *ent) 150 const struct pci_device_id *ent)
191{ 151{
192 return comedi_pci_auto_config(dev, &ke_counter_driver); 152 return comedi_pci_auto_config(dev, &ke_counter_driver);
193} 153}
194 154
195static void __devexit ke_counter_pci_remove(struct pci_dev *dev) 155static void ke_counter_pci_remove(struct pci_dev *dev)
196{ 156{
197 comedi_pci_auto_unconfig(dev); 157 comedi_pci_auto_unconfig(dev);
198} 158}
@@ -207,7 +167,7 @@ static struct pci_driver ke_counter_pci_driver = {
207 .name = "ke_counter", 167 .name = "ke_counter",
208 .id_table = ke_counter_pci_table, 168 .id_table = ke_counter_pci_table,
209 .probe = ke_counter_pci_probe, 169 .probe = ke_counter_pci_probe,
210 .remove = __devexit_p(ke_counter_pci_remove), 170 .remove = ke_counter_pci_remove,
211}; 171};
212module_comedi_pci_driver(ke_counter_driver, ke_counter_pci_driver); 172module_comedi_pci_driver(ke_counter_driver, ke_counter_pci_driver);
213 173
diff --git a/drivers/staging/comedi/drivers/me4000.c b/drivers/staging/comedi/drivers/me4000.c
index 22db35d091f8..3c4b0228e8dc 100644
--- a/drivers/staging/comedi/drivers/me4000.c
+++ b/drivers/staging/comedi/drivers/me4000.c
@@ -60,8 +60,6 @@ broken.
60#include "me4000_fw.h" 60#include "me4000_fw.h"
61#endif 61#endif
62 62
63#define PCI_VENDOR_ID_MEILHAUS 0x1402
64
65#define PCI_DEVICE_ID_MEILHAUS_ME4650 0x4650 63#define PCI_DEVICE_ID_MEILHAUS_ME4650 0x4650
66#define PCI_DEVICE_ID_MEILHAUS_ME4660 0x4660 64#define PCI_DEVICE_ID_MEILHAUS_ME4660 0x4660
67#define PCI_DEVICE_ID_MEILHAUS_ME4660I 0x4661 65#define PCI_DEVICE_ID_MEILHAUS_ME4660I 0x4661
@@ -971,28 +969,23 @@ static int me4000_ai_do_cmd_test(struct comedi_device *dev,
971 if (err) 969 if (err)
972 return 2; 970 return 2;
973 971
974 /* 972 /* Step 3: check if arguments are trivially valid */
975 * Stage 3. Check if arguments are generally valid. 973
976 */
977 if (cmd->chanlist_len < 1) { 974 if (cmd->chanlist_len < 1) {
978 dev_err(dev->class_dev, "No channel list\n");
979 cmd->chanlist_len = 1; 975 cmd->chanlist_len = 1;
980 err++; 976 err |= -EINVAL;
981 } 977 }
982 if (init_ticks < 66) { 978 if (init_ticks < 66) {
983 dev_err(dev->class_dev, "Start arg to low\n");
984 cmd->start_arg = 2000; 979 cmd->start_arg = 2000;
985 err++; 980 err |= -EINVAL;
986 } 981 }
987 if (scan_ticks && scan_ticks < 67) { 982 if (scan_ticks && scan_ticks < 67) {
988 dev_err(dev->class_dev, "Scan begin arg to low\n");
989 cmd->scan_begin_arg = 2031; 983 cmd->scan_begin_arg = 2031;
990 err++; 984 err |= -EINVAL;
991 } 985 }
992 if (chan_ticks < 66) { 986 if (chan_ticks < 66) {
993 dev_err(dev->class_dev, "Convert arg to low\n");
994 cmd->convert_arg = 2000; 987 cmd->convert_arg = 2000;
995 err++; 988 err |= -EINVAL;
996 } 989 }
997 990
998 if (err) 991 if (err)
@@ -1570,26 +1563,25 @@ static const void *me4000_find_boardinfo(struct comedi_device *dev,
1570 return NULL; 1563 return NULL;
1571} 1564}
1572 1565
1573static int me4000_attach_pci(struct comedi_device *dev, 1566static int me4000_auto_attach(struct comedi_device *dev,
1574 struct pci_dev *pcidev) 1567 unsigned long context_unused)
1575{ 1568{
1569 struct pci_dev *pcidev = comedi_to_pci_dev(dev);
1576 const struct me4000_board *thisboard; 1570 const struct me4000_board *thisboard;
1577 struct me4000_info *info; 1571 struct me4000_info *info;
1578 struct comedi_subdevice *s; 1572 struct comedi_subdevice *s;
1579 int result; 1573 int result;
1580 1574
1581 comedi_set_hw_dev(dev, &pcidev->dev);
1582
1583 thisboard = me4000_find_boardinfo(dev, pcidev); 1575 thisboard = me4000_find_boardinfo(dev, pcidev);
1584 if (!thisboard) 1576 if (!thisboard)
1585 return -ENODEV; 1577 return -ENODEV;
1586 dev->board_ptr = thisboard; 1578 dev->board_ptr = thisboard;
1587 dev->board_name = thisboard->name; 1579 dev->board_name = thisboard->name;
1588 1580
1589 result = alloc_private(dev, sizeof(*info)); 1581 info = kzalloc(sizeof(*info), GFP_KERNEL);
1590 if (result) 1582 if (!info)
1591 return result; 1583 return -ENOMEM;
1592 info = dev->private; 1584 dev->private = info;
1593 1585
1594 result = comedi_pci_enable(pcidev, dev->board_name); 1586 result = comedi_pci_enable(pcidev, dev->board_name);
1595 if (result) 1587 if (result)
@@ -1732,17 +1724,17 @@ static void me4000_detach(struct comedi_device *dev)
1732static struct comedi_driver me4000_driver = { 1724static struct comedi_driver me4000_driver = {
1733 .driver_name = "me4000", 1725 .driver_name = "me4000",
1734 .module = THIS_MODULE, 1726 .module = THIS_MODULE,
1735 .attach_pci = me4000_attach_pci, 1727 .auto_attach = me4000_auto_attach,
1736 .detach = me4000_detach, 1728 .detach = me4000_detach,
1737}; 1729};
1738 1730
1739static int __devinit me4000_pci_probe(struct pci_dev *dev, 1731static int me4000_pci_probe(struct pci_dev *dev,
1740 const struct pci_device_id *ent) 1732 const struct pci_device_id *ent)
1741{ 1733{
1742 return comedi_pci_auto_config(dev, &me4000_driver); 1734 return comedi_pci_auto_config(dev, &me4000_driver);
1743} 1735}
1744 1736
1745static void __devexit me4000_pci_remove(struct pci_dev *dev) 1737static void me4000_pci_remove(struct pci_dev *dev)
1746{ 1738{
1747 comedi_pci_auto_unconfig(dev); 1739 comedi_pci_auto_unconfig(dev);
1748} 1740}
@@ -1769,7 +1761,7 @@ static struct pci_driver me4000_pci_driver = {
1769 .name = "me4000", 1761 .name = "me4000",
1770 .id_table = me4000_pci_table, 1762 .id_table = me4000_pci_table,
1771 .probe = me4000_pci_probe, 1763 .probe = me4000_pci_probe,
1772 .remove = __devexit_p(me4000_pci_remove), 1764 .remove = me4000_pci_remove,
1773}; 1765};
1774module_comedi_pci_driver(me4000_driver, me4000_pci_driver); 1766module_comedi_pci_driver(me4000_driver, me4000_pci_driver);
1775 1767
diff --git a/drivers/staging/comedi/drivers/me_daq.c b/drivers/staging/comedi/drivers/me_daq.c
index 2ce0b14af589..ce8e3d3f135c 100644
--- a/drivers/staging/comedi/drivers/me_daq.c
+++ b/drivers/staging/comedi/drivers/me_daq.c
@@ -1,47 +1,38 @@
1/* 1/*
2 2 * comedi/drivers/me_daq.c
3 comedi/drivers/me_daq.c 3 * Hardware driver for Meilhaus data acquisition cards:
4 4 * ME-2000i, ME-2600i, ME-3000vm1
5 Hardware driver for Meilhaus data acquisition cards: 5 *
6 6 * Copyright (C) 2002 Michael Hillmann <hillmann@syscongroup.de>
7 ME-2000i, ME-2600i, ME-3000vm1 7 *
8 8 * This program is free software; you can redistribute it and/or modify
9 Copyright (C) 2002 Michael Hillmann <hillmann@syscongroup.de> 9 * it under the terms of the GNU General Public License as published by
10 10 * the Free Software Foundation; either version 2 of the License, or
11 This program is free software; you can redistribute it and/or modify 11 * (at your option) any later version.
12 it under the terms of the GNU General Public License as published by 12 *
13 the Free Software Foundation; either version 2 of the License, or 13 * This program is distributed in the hope that it will be useful,
14 (at your option) any later version. 14 * but WITHOUT ANY WARRANTY; without even the implied warranty of
15 15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 This program is distributed in the hope that it will be useful, 16 * GNU General Public License for more details.
17 but WITHOUT ANY WARRANTY; without even the implied warranty of 17 *
18 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 18 * You should have received a copy of the GNU General Public License
19 GNU General Public License for more details. 19 * along with this program; if not, write to the Free Software
20 20 * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
21 You should have received a copy of the GNU General Public License 21 */
22 along with this program; if not, write to the Free Software
23 Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
24*/
25 22
26/* 23/*
27Driver: me_daq 24 * Driver: me_daq
28Description: Meilhaus PCI data acquisition cards 25 * Description: Meilhaus PCI data acquisition cards
29Author: Michael Hillmann <hillmann@syscongroup.de> 26 * Devices: (Meilhaus) ME-2600i [me-2600i]
30Devices: [Meilhaus] ME-2600i (me_daq), ME-2000i 27 * (Meilhaus) ME-2000i [me-2000i]
31Status: experimental 28 * Author: Michael Hillmann <hillmann@syscongroup.de>
32 29 * Status: experimental
33Supports: 30 *
34 31 * Configuration options: not applicable, uses PCI auto config
35 Analog Output 32 *
36 33 * Supports:
37Configuration options: 34 * Analog Input, Analog Output, Digital I/O
38 35 */
39 [0] - PCI bus number (optional)
40 [1] - PCI slot number (optional)
41
42 If bus/slot is not specified, the first available PCI
43 device will be used.
44*/
45 36
46#include <linux/interrupt.h> 37#include <linux/interrupt.h>
47#include <linux/sched.h> 38#include <linux/sched.h>
@@ -50,7 +41,6 @@ Configuration options:
50 41
51#define ME2600_FIRMWARE "me2600_firmware.bin" 42#define ME2600_FIRMWARE "me2600_firmware.bin"
52 43
53#define PCI_VENDOR_ID_MEILHAUS 0x1402
54#define ME2000_DEVICE_ID 0x2000 44#define ME2000_DEVICE_ID 0x2000
55#define ME2600_DEVICE_ID 0x2600 45#define ME2600_DEVICE_ID 0x2600
56 46
@@ -136,97 +126,47 @@ Configuration options:
136#define ME_COUNTER_STARTDATA_B 0x0022 /* - | W */ 126#define ME_COUNTER_STARTDATA_B 0x0022 /* - | W */
137#define ME_COUNTER_VALUE_B 0x0022 /* R | - */ 127#define ME_COUNTER_VALUE_B 0x0022 /* R | - */
138 128
139static const struct comedi_lrange me2000_ai_range = { 129static const struct comedi_lrange me_ai_range = {
140 8, 130 8, {
141 { 131 BIP_RANGE(10),
142 BIP_RANGE(10), 132 BIP_RANGE(5),
143 BIP_RANGE(5), 133 BIP_RANGE(2.5),
144 BIP_RANGE(2.5), 134 BIP_RANGE(1.25),
145 BIP_RANGE(1.25), 135 UNI_RANGE(10),
146 UNI_RANGE(10), 136 UNI_RANGE(5),
147 UNI_RANGE(5), 137 UNI_RANGE(2.5),
148 UNI_RANGE(2.5), 138 UNI_RANGE(1.25)
149 UNI_RANGE(1.25) 139 }
150 }
151};
152
153static const struct comedi_lrange me2600_ai_range = {
154 8,
155 {
156 BIP_RANGE(10),
157 BIP_RANGE(5),
158 BIP_RANGE(2.5),
159 BIP_RANGE(1.25),
160 UNI_RANGE(10),
161 UNI_RANGE(5),
162 UNI_RANGE(2.5),
163 UNI_RANGE(1.25)
164 }
165}; 140};
166 141
167static const struct comedi_lrange me2600_ao_range = { 142static const struct comedi_lrange me_ao_range = {
168 3, 143 3, {
169 { 144 BIP_RANGE(10),
170 BIP_RANGE(10), 145 BIP_RANGE(5),
171 BIP_RANGE(5), 146 UNI_RANGE(10)
172 UNI_RANGE(10) 147 }
173 }
174}; 148};
175 149
176/* Board specification structure */
177struct me_board { 150struct me_board {
178 const char *name; /* driver name */ 151 const char *name;
179 int device_id; 152 int device_id;
180 int ao_channel_nbr; /* DA config */ 153 int has_ao;
181 int ao_resolution;
182 int ao_resolution_mask;
183 const struct comedi_lrange *ao_range_list;
184 int ai_channel_nbr; /* AD config */
185 int ai_resolution;
186 int ai_resolution_mask;
187 const struct comedi_lrange *ai_range_list;
188 int dio_channel_nbr; /* DIO config */
189}; 154};
190 155
191static const struct me_board me_boards[] = { 156static const struct me_board me_boards[] = {
192 { 157 {
193 .name = "me-2600i", 158 .name = "me-2600i",
194 .device_id = ME2600_DEVICE_ID, 159 .device_id = ME2600_DEVICE_ID,
195 /* Analog Output */ 160 .has_ao = 1,
196 .ao_channel_nbr = 4, 161 }, {
197 .ao_resolution = 12, 162 .name = "me-2000i",
198 .ao_resolution_mask = 0x0fff, 163 .device_id = ME2000_DEVICE_ID,
199 .ao_range_list = &me2600_ao_range, 164 }
200 .ai_channel_nbr = 16,
201 /* Analog Input */
202 .ai_resolution = 12,
203 .ai_resolution_mask = 0x0fff,
204 .ai_range_list = &me2600_ai_range,
205 .dio_channel_nbr = 32,
206 },
207 {
208 .name = "me-2000i",
209 .device_id = ME2000_DEVICE_ID,
210 /* Analog Output */
211 .ao_channel_nbr = 0,
212 .ao_resolution = 0,
213 .ao_resolution_mask = 0,
214 .ao_range_list = NULL,
215 .ai_channel_nbr = 16,
216 /* Analog Input */
217 .ai_resolution = 12,
218 .ai_resolution_mask = 0x0fff,
219 .ai_range_list = &me2000_ai_range,
220 .dio_channel_nbr = 32,
221 }
222}; 165};
223 166
224/* Private data structure */
225struct me_private_data { 167struct me_private_data {
226 void __iomem *plx_regbase; /* PLX configuration base address */ 168 void __iomem *plx_regbase; /* PLX configuration base address */
227 void __iomem *me_regbase; /* Base address of the Meilhaus card */ 169 void __iomem *me_regbase; /* Base address of the Meilhaus card */
228 unsigned long plx_regbase_size; /* Size of PLX configuration space */
229 unsigned long me_regbase_size; /* Size of Meilhaus space */
230 170
231 unsigned short control_1; /* Mirror of CONTROL_1 register */ 171 unsigned short control_1; /* Mirror of CONTROL_1 register */
232 unsigned short control_2; /* Mirror of CONTROL_2 register */ 172 unsigned short control_2; /* Mirror of CONTROL_2 register */
@@ -234,110 +174,101 @@ struct me_private_data {
234 int ao_readback[4]; /* Mirror of analog output data */ 174 int ao_readback[4]; /* Mirror of analog output data */
235}; 175};
236 176
237#define dev_private ((struct me_private_data *)dev->private)
238
239/*
240 * ------------------------------------------------------------------
241 *
242 * Helpful functions
243 *
244 * ------------------------------------------------------------------
245 */
246static inline void sleep(unsigned sec) 177static inline void sleep(unsigned sec)
247{ 178{
248 current->state = TASK_INTERRUPTIBLE; 179 current->state = TASK_INTERRUPTIBLE;
249 schedule_timeout(sec * HZ); 180 schedule_timeout(sec * HZ);
250} 181}
251 182
252/*
253 * ------------------------------------------------------------------
254 *
255 * DIGITAL INPUT/OUTPUT SECTION
256 *
257 * ------------------------------------------------------------------
258 */
259static int me_dio_insn_config(struct comedi_device *dev, 183static int me_dio_insn_config(struct comedi_device *dev,
260 struct comedi_subdevice *s, 184 struct comedi_subdevice *s,
261 struct comedi_insn *insn, unsigned int *data) 185 struct comedi_insn *insn,
186 unsigned int *data)
262{ 187{
263 int bits; 188 struct me_private_data *dev_private = dev->private;
264 int mask = 1 << CR_CHAN(insn->chanspec); 189 unsigned int mask = 1 << CR_CHAN(insn->chanspec);
190 unsigned int bits;
191 unsigned int port;
265 192
266 /* calculate port */ 193 if (mask & 0x0000ffff) {
267 if (mask & 0x0000ffff) { /* Port A in use */
268 bits = 0x0000ffff; 194 bits = 0x0000ffff;
269 195 port = ENABLE_PORT_A;
270 /* Enable Port A */ 196 } else {
271 dev_private->control_2 |= ENABLE_PORT_A;
272 writew(dev_private->control_2,
273 dev_private->me_regbase + ME_CONTROL_2);
274 } else { /* Port B in use */
275
276 bits = 0xffff0000; 197 bits = 0xffff0000;
277 198 port = ENABLE_PORT_B;
278 /* Enable Port B */
279 dev_private->control_2 |= ENABLE_PORT_B;
280 writew(dev_private->control_2,
281 dev_private->me_regbase + ME_CONTROL_2);
282 } 199 }
283 200
284 if (data[0]) { 201 switch (data[0]) {
285 /* Config port as output */ 202 case INSN_CONFIG_DIO_INPUT:
286 s->io_bits |= bits;
287 } else {
288 /* Config port as input */
289 s->io_bits &= ~bits; 203 s->io_bits &= ~bits;
204 dev_private->control_2 &= ~port;
205 break;
206 case INSN_CONFIG_DIO_OUTPUT:
207 s->io_bits |= bits;
208 dev_private->control_2 |= port;
209 break;
210 case INSN_CONFIG_DIO_QUERY:
211 data[1] = (s->io_bits & bits) ? COMEDI_OUTPUT : COMEDI_INPUT;
212 return insn->n;
213 break;
214 default:
215 return -EINVAL;
290 } 216 }
291 217
292 return 1; 218 /* Update the port configuration */
219 writew(dev_private->control_2, dev_private->me_regbase + ME_CONTROL_2);
220
221 return insn->n;
293} 222}
294 223
295/* Digital instant input/outputs */
296static int me_dio_insn_bits(struct comedi_device *dev, 224static int me_dio_insn_bits(struct comedi_device *dev,
297 struct comedi_subdevice *s, 225 struct comedi_subdevice *s,
298 struct comedi_insn *insn, unsigned int *data) 226 struct comedi_insn *insn,
227 unsigned int *data)
299{ 228{
229 struct me_private_data *dev_private = dev->private;
230 void __iomem *mmio_porta = dev_private->me_regbase + ME_DIO_PORT_A;
231 void __iomem *mmio_portb = dev_private->me_regbase + ME_DIO_PORT_B;
300 unsigned int mask = data[0]; 232 unsigned int mask = data[0];
301 s->state &= ~mask; 233 unsigned int bits = data[1];
302 s->state |= (mask & data[1]); 234 unsigned int val;
303 235
304 mask &= s->io_bits; 236 mask &= s->io_bits; /* only update the COMEDI_OUTPUT channels */
305 if (mask & 0x0000ffff) { /* Port A */ 237 if (mask) {
306 writew((s->state & 0xffff), 238 s->state &= ~mask;
307 dev_private->me_regbase + ME_DIO_PORT_A); 239 s->state |= (bits & mask);
308 } else { 240
309 data[1] &= ~0x0000ffff; 241 if (mask & 0x0000ffff)
310 data[1] |= readw(dev_private->me_regbase + ME_DIO_PORT_A); 242 writew((s->state & 0xffff), mmio_porta);
243 if (mask & 0xffff0000)
244 writew(((s->state >> 16) & 0xffff), mmio_portb);
311 } 245 }
312 246
313 if (mask & 0xffff0000) { /* Port B */ 247 if (s->io_bits & 0x0000ffff)
314 writew(((s->state >> 16) & 0xffff), 248 val = s->state & 0xffff;
315 dev_private->me_regbase + ME_DIO_PORT_B); 249 else
316 } else { 250 val = readw(mmio_porta);
317 data[1] &= ~0xffff0000; 251
318 data[1] |= readw(dev_private->me_regbase + ME_DIO_PORT_B) << 16; 252 if (s->io_bits & 0xffff0000)
319 } 253 val |= (s->state & 0xffff0000);
254 else
255 val |= (readw(mmio_portb) << 16);
256
257 data[1] = val;
320 258
321 return insn->n; 259 return insn->n;
322} 260}
323 261
324/*
325 * ------------------------------------------------------------------
326 *
327 * ANALOG INPUT SECTION
328 *
329 * ------------------------------------------------------------------
330 */
331
332/* Analog instant input */
333static int me_ai_insn_read(struct comedi_device *dev, 262static int me_ai_insn_read(struct comedi_device *dev,
334 struct comedi_subdevice *s, 263 struct comedi_subdevice *s,
335 struct comedi_insn *insn, unsigned int *data) 264 struct comedi_insn *insn,
265 unsigned int *data)
336{ 266{
337 unsigned short value; 267 struct me_private_data *dev_private = dev->private;
338 int chan = CR_CHAN((&insn->chanspec)[0]); 268 unsigned int chan = CR_CHAN(insn->chanspec);
339 int rang = CR_RANGE((&insn->chanspec)[0]); 269 unsigned int rang = CR_RANGE(insn->chanspec);
340 int aref = CR_AREF((&insn->chanspec)[0]); 270 unsigned int aref = CR_AREF(insn->chanspec);
271 unsigned short val;
341 int i; 272 int i;
342 273
343 /* stop any running conversion */ 274 /* stop any running conversion */
@@ -356,15 +287,11 @@ static int me_ai_insn_read(struct comedi_device *dev,
356 writew(dev_private->control_2, dev_private->me_regbase + ME_CONTROL_2); 287 writew(dev_private->control_2, dev_private->me_regbase + ME_CONTROL_2);
357 288
358 /* write to channel list fifo */ 289 /* write to channel list fifo */
359 /* b3:b0 are the channel number */ 290 val = chan & 0x0f; /* b3:b0 channel */
360 value = chan & 0x0f; 291 val |= (rang & 0x03) << 4; /* b5:b4 gain */
361 /* b5:b4 are the channel gain */ 292 val |= (rang & 0x04) << 4; /* b6 polarity */
362 value |= (rang & 0x03) << 4; 293 val |= ((aref & AREF_DIFF) ? 0x80 : 0); /* b7 differential */
363 /* b6 channel polarity */ 294 writew(val & 0xff, dev_private->me_regbase + ME_CHANNEL_LIST);
364 value |= (rang & 0x04) << 4;
365 /* b7 single or differential */
366 value |= ((aref & AREF_DIFF) ? 0x80 : 0);
367 writew(value & 0xff, dev_private->me_regbase + ME_CHANNEL_LIST);
368 295
369 /* set ADC mode to software trigger */ 296 /* set ADC mode to software trigger */
370 dev_private->control_1 |= SOFTWARE_TRIGGERED_ADC; 297 dev_private->control_1 |= SOFTWARE_TRIGGERED_ADC;
@@ -380,12 +307,11 @@ static int me_ai_insn_read(struct comedi_device *dev,
380 307
381 /* get value from ADC fifo */ 308 /* get value from ADC fifo */
382 if (i) { 309 if (i) {
383 data[0] = 310 val = readw(dev_private->me_regbase + ME_READ_AD_FIFO);
384 (readw(dev_private->me_regbase + 311 val = (val ^ 0x800) & 0x0fff;
385 ME_READ_AD_FIFO) ^ 0x800) & 0x0FFF; 312 data[0] = val;
386 } else { 313 } else {
387 printk(KERN_ERR "comedi%d: Cannot get single value\n", 314 dev_err(dev->class_dev, "Cannot get single value\n");
388 dev->minor);
389 return -EIO; 315 return -EIO;
390 } 316 }
391 317
@@ -396,55 +322,14 @@ static int me_ai_insn_read(struct comedi_device *dev,
396 return 1; 322 return 1;
397} 323}
398 324
399/*
400 * ------------------------------------------------------------------
401 *
402 * HARDWARE TRIGGERED ANALOG INPUT SECTION
403 *
404 * ------------------------------------------------------------------
405 */
406
407/* Cancel analog input autoscan */
408static int me_ai_cancel(struct comedi_device *dev, struct comedi_subdevice *s)
409{
410 /* disable interrupts */
411
412 /* stop any running conversion */
413 dev_private->control_1 &= 0xFFFC;
414 writew(dev_private->control_1, dev_private->me_regbase + ME_CONTROL_1);
415
416 return 0;
417}
418
419/* Test analog input command */
420static int me_ai_do_cmd_test(struct comedi_device *dev,
421 struct comedi_subdevice *s, struct comedi_cmd *cmd)
422{
423 return 0;
424}
425
426/* Analog input command */
427static int me_ai_do_cmd(struct comedi_device *dev,
428 struct comedi_subdevice *s)
429{
430 return 0;
431}
432
433/*
434 * ------------------------------------------------------------------
435 *
436 * ANALOG OUTPUT SECTION
437 *
438 * ------------------------------------------------------------------
439 */
440
441/* Analog instant output */
442static int me_ao_insn_write(struct comedi_device *dev, 325static int me_ao_insn_write(struct comedi_device *dev,
443 struct comedi_subdevice *s, 326 struct comedi_subdevice *s,
444 struct comedi_insn *insn, unsigned int *data) 327 struct comedi_insn *insn,
328 unsigned int *data)
445{ 329{
446 int chan; 330 struct me_private_data *dev_private = dev->private;
447 int rang; 331 unsigned int chan = CR_CHAN(insn->chanspec);
332 unsigned int rang = CR_RANGE(insn->chanspec);
448 int i; 333 int i;
449 334
450 /* Enable all DAC */ 335 /* Enable all DAC */
@@ -457,9 +342,6 @@ static int me_ao_insn_write(struct comedi_device *dev,
457 342
458 /* Set dac-control register */ 343 /* Set dac-control register */
459 for (i = 0; i < insn->n; i++) { 344 for (i = 0; i < insn->n; i++) {
460 chan = CR_CHAN((&insn->chanspec)[i]);
461 rang = CR_RANGE((&insn->chanspec)[i]);
462
463 /* clear bits for this channel */ 345 /* clear bits for this channel */
464 dev_private->dac_control &= ~(0x0880 >> chan); 346 dev_private->dac_control &= ~(0x0880 >> chan);
465 if (rang == 0) 347 if (rang == 0)
@@ -477,7 +359,6 @@ static int me_ao_insn_write(struct comedi_device *dev,
477 359
478 /* Set data register */ 360 /* Set data register */
479 for (i = 0; i < insn->n; i++) { 361 for (i = 0; i < insn->n; i++) {
480 chan = CR_CHAN((&insn->chanspec)[i]);
481 writew((data[0] & s->maxdata), 362 writew((data[0] & s->maxdata),
482 dev_private->me_regbase + ME_DAC_DATA_A + (chan << 1)); 363 dev_private->me_regbase + ME_DAC_DATA_A + (chan << 1));
483 dev_private->ao_readback[chan] = (data[0] & s->maxdata); 364 dev_private->ao_readback[chan] = (data[0] & s->maxdata);
@@ -486,36 +367,28 @@ static int me_ao_insn_write(struct comedi_device *dev,
486 /* Update dac with data registers */ 367 /* Update dac with data registers */
487 readw(dev_private->me_regbase + ME_DAC_UPDATE); 368 readw(dev_private->me_regbase + ME_DAC_UPDATE);
488 369
489 return i; 370 return insn->n;
490} 371}
491 372
492/* Analog output readback */
493static int me_ao_insn_read(struct comedi_device *dev, 373static int me_ao_insn_read(struct comedi_device *dev,
494 struct comedi_subdevice *s, struct comedi_insn *insn, 374 struct comedi_subdevice *s,
375 struct comedi_insn *insn,
495 unsigned int *data) 376 unsigned int *data)
496{ 377{
378 struct me_private_data *dev_private = dev->private;
379 unsigned int chan = CR_CHAN(insn->chanspec);
497 int i; 380 int i;
498 381
499 for (i = 0; i < insn->n; i++) { 382 for (i = 0; i < insn->n; i++)
500 data[i] = 383 data[i] = dev_private->ao_readback[chan];
501 dev_private->ao_readback[CR_CHAN((&insn->chanspec)[i])];
502 }
503 384
504 return 1; 385 return insn->n;
505} 386}
506 387
507/*
508 * ------------------------------------------------------------------
509 *
510 * INITIALISATION SECTION
511 *
512 * ------------------------------------------------------------------
513 */
514
515/* Xilinx firmware download for card: ME-2600i */
516static int me2600_xilinx_download(struct comedi_device *dev, 388static int me2600_xilinx_download(struct comedi_device *dev,
517 const u8 *data, size_t size) 389 const u8 *data, size_t size)
518{ 390{
391 struct me_private_data *dev_private = dev->private;
519 unsigned int value; 392 unsigned int value;
520 unsigned int file_length; 393 unsigned int file_length;
521 unsigned int i; 394 unsigned int i;
@@ -566,8 +439,7 @@ static int me2600_xilinx_download(struct comedi_device *dev,
566 if (value & 0x20) { 439 if (value & 0x20) {
567 /* Disable interrupt */ 440 /* Disable interrupt */
568 writel(0x00, dev_private->plx_regbase + PLX_INTCSR); 441 writel(0x00, dev_private->plx_regbase + PLX_INTCSR);
569 printk(KERN_ERR "comedi%d: Xilinx download failed\n", 442 dev_err(dev->class_dev, "Xilinx download failed\n");
570 dev->minor);
571 return -EIO; 443 return -EIO;
572 } 444 }
573 445
@@ -596,9 +468,10 @@ static int me2600_upload_firmware(struct comedi_device *dev)
596 return ret; 468 return ret;
597} 469}
598 470
599/* Reset device */
600static int me_reset(struct comedi_device *dev) 471static int me_reset(struct comedi_device *dev)
601{ 472{
473 struct me_private_data *dev_private = dev->private;
474
602 /* Reset board */ 475 /* Reset board */
603 writew(0x00, dev_private->me_regbase + ME_CONTROL_1); 476 writew(0x00, dev_private->me_regbase + ME_CONTROL_1);
604 writew(0x00, dev_private->me_regbase + ME_CONTROL_2); 477 writew(0x00, dev_private->me_regbase + ME_CONTROL_2);
@@ -627,20 +500,14 @@ static const void *me_find_boardinfo(struct comedi_device *dev,
627 return NULL; 500 return NULL;
628} 501}
629 502
630static int me_attach_pci(struct comedi_device *dev, struct pci_dev *pcidev) 503static int me_auto_attach(struct comedi_device *dev,
504 unsigned long context_unused)
631{ 505{
506 struct pci_dev *pcidev = comedi_to_pci_dev(dev);
632 const struct me_board *board; 507 const struct me_board *board;
508 struct me_private_data *dev_private;
633 struct comedi_subdevice *s; 509 struct comedi_subdevice *s;
634 resource_size_t plx_regbase_tmp; 510 int ret;
635 unsigned long plx_regbase_size_tmp;
636 resource_size_t me_regbase_tmp;
637 unsigned long me_regbase_size_tmp;
638 resource_size_t swap_regbase_tmp;
639 unsigned long swap_regbase_size_tmp;
640 resource_size_t regbase_tmp;
641 int result, error;
642
643 comedi_set_hw_dev(dev, &pcidev->dev);
644 511
645 board = me_find_boardinfo(dev, pcidev); 512 board = me_find_boardinfo(dev, pcidev);
646 if (!board) 513 if (!board)
@@ -648,123 +515,71 @@ static int me_attach_pci(struct comedi_device *dev, struct pci_dev *pcidev)
648 dev->board_ptr = board; 515 dev->board_ptr = board;
649 dev->board_name = board->name; 516 dev->board_name = board->name;
650 517
651 /* Allocate private memory */ 518 dev_private = kzalloc(sizeof(*dev_private), GFP_KERNEL);
652 if (alloc_private(dev, sizeof(struct me_private_data)) < 0) 519 if (!dev_private)
653 return -ENOMEM; 520 return -ENOMEM;
521 dev->private = dev_private;
654 522
655 /* Enable PCI device and request PCI regions */ 523 ret = comedi_pci_enable(pcidev, dev->board_name);
656 if (comedi_pci_enable(pcidev, dev->board_name) < 0) { 524 if (ret)
657 printk(KERN_ERR "comedi%d: Failed to enable PCI device and " 525 return ret;
658 "request regions\n", dev->minor); 526 dev->iobase = 1; /* detach needs this */
659 return -EIO;
660 }
661 527
662 /* Read PLX register base address [PCI_BASE_ADDRESS #0]. */ 528 dev_private->plx_regbase = ioremap(pci_resource_start(pcidev, 0),
663 plx_regbase_tmp = pci_resource_start(pcidev, 0); 529 pci_resource_len(pcidev, 0));
664 plx_regbase_size_tmp = pci_resource_len(pcidev, 0); 530 if (!dev_private->plx_regbase)
665 dev_private->plx_regbase =
666 ioremap(plx_regbase_tmp, plx_regbase_size_tmp);
667 dev_private->plx_regbase_size = plx_regbase_size_tmp;
668 if (!dev_private->plx_regbase) {
669 printk("comedi%d: Failed to remap I/O memory\n", dev->minor);
670 return -ENOMEM; 531 return -ENOMEM;
671 }
672
673 /* Read Swap base address [PCI_BASE_ADDRESS #5]. */
674
675 swap_regbase_tmp = pci_resource_start(pcidev, 5);
676 swap_regbase_size_tmp = pci_resource_len(pcidev, 5);
677
678 if (!swap_regbase_tmp)
679 printk(KERN_ERR "comedi%d: Swap not present\n", dev->minor);
680
681 /*---------------------------------------------- Workaround start ---*/
682 if (plx_regbase_tmp & 0x0080) {
683 printk(KERN_ERR "comedi%d: PLX-Bug detected\n", dev->minor);
684
685 if (swap_regbase_tmp) {
686 regbase_tmp = plx_regbase_tmp;
687 plx_regbase_tmp = swap_regbase_tmp;
688 swap_regbase_tmp = regbase_tmp;
689
690 result = pci_write_config_dword(pcidev,
691 PCI_BASE_ADDRESS_0,
692 plx_regbase_tmp);
693 if (result != PCIBIOS_SUCCESSFUL)
694 return -EIO;
695
696 result = pci_write_config_dword(pcidev,
697 PCI_BASE_ADDRESS_5,
698 swap_regbase_tmp);
699 if (result != PCIBIOS_SUCCESSFUL)
700 return -EIO;
701 } else {
702 plx_regbase_tmp -= 0x80;
703 result = pci_write_config_dword(pcidev,
704 PCI_BASE_ADDRESS_0,
705 plx_regbase_tmp);
706 if (result != PCIBIOS_SUCCESSFUL)
707 return -EIO;
708 }
709 }
710 /*--------------------------------------------- Workaround end -----*/
711
712 /* Read Meilhaus register base address [PCI_BASE_ADDRESS #2]. */
713 532
714 me_regbase_tmp = pci_resource_start(pcidev, 2); 533 dev_private->me_regbase = ioremap(pci_resource_start(pcidev, 2),
715 me_regbase_size_tmp = pci_resource_len(pcidev, 2); 534 pci_resource_len(pcidev, 2));
716 dev_private->me_regbase_size = me_regbase_size_tmp; 535 if (!dev_private->me_regbase)
717 dev_private->me_regbase = ioremap(me_regbase_tmp, me_regbase_size_tmp);
718 if (!dev_private->me_regbase) {
719 printk(KERN_ERR "comedi%d: Failed to remap I/O memory\n",
720 dev->minor);
721 return -ENOMEM; 536 return -ENOMEM;
722 }
723 537
724 /* Download firmware and reset card */ 538 /* Download firmware and reset card */
725 if (board->device_id == ME2600_DEVICE_ID) { 539 if (board->device_id == ME2600_DEVICE_ID) {
726 result = me2600_upload_firmware(dev); 540 ret = me2600_upload_firmware(dev);
727 if (result < 0) 541 if (ret < 0)
728 return result; 542 return ret;
729 } 543 }
730 me_reset(dev); 544 me_reset(dev);
731 545
732 error = comedi_alloc_subdevices(dev, 3); 546 ret = comedi_alloc_subdevices(dev, 3);
733 if (error) 547 if (ret)
734 return error; 548 return ret;
735 549
736 s = &dev->subdevices[0]; 550 s = &dev->subdevices[0];
737 s->type = COMEDI_SUBD_AI; 551 s->type = COMEDI_SUBD_AI;
738 s->subdev_flags = SDF_READABLE | SDF_COMMON | SDF_CMD_READ; 552 s->subdev_flags = SDF_READABLE | SDF_COMMON;
739 s->n_chan = board->ai_channel_nbr; 553 s->n_chan = 16;
740 s->maxdata = board->ai_resolution_mask; 554 s->maxdata = 0x0fff;
741 s->len_chanlist = board->ai_channel_nbr; 555 s->len_chanlist = 16;
742 s->range_table = board->ai_range_list; 556 s->range_table = &me_ai_range;
743 s->cancel = me_ai_cancel; 557 s->insn_read = me_ai_insn_read;
744 s->insn_read = me_ai_insn_read;
745 s->do_cmdtest = me_ai_do_cmd_test;
746 s->do_cmd = me_ai_do_cmd;
747 558
748 s = &dev->subdevices[1]; 559 s = &dev->subdevices[1];
749 s->type = COMEDI_SUBD_AO; 560 if (board->has_ao) {
750 s->subdev_flags = SDF_WRITEABLE | SDF_COMMON; 561 s->type = COMEDI_SUBD_AO;
751 s->n_chan = board->ao_channel_nbr; 562 s->subdev_flags = SDF_WRITEABLE | SDF_COMMON;
752 s->maxdata = board->ao_resolution_mask; 563 s->n_chan = 4;
753 s->len_chanlist = board->ao_channel_nbr; 564 s->maxdata = 0x0fff;
754 s->range_table = board->ao_range_list; 565 s->len_chanlist = 4;
755 s->insn_read = me_ao_insn_read; 566 s->range_table = &me_ao_range;
756 s->insn_write = me_ao_insn_write; 567 s->insn_read = me_ao_insn_read;
568 s->insn_write = me_ao_insn_write;
569 } else {
570 s->type = COMEDI_SUBD_UNUSED;
571 }
757 572
758 s = &dev->subdevices[2]; 573 s = &dev->subdevices[2];
759 s->type = COMEDI_SUBD_DIO; 574 s->type = COMEDI_SUBD_DIO;
760 s->subdev_flags = SDF_READABLE | SDF_WRITEABLE; 575 s->subdev_flags = SDF_READABLE | SDF_WRITEABLE;
761 s->n_chan = board->dio_channel_nbr; 576 s->n_chan = 32;
762 s->maxdata = 1; 577 s->maxdata = 1;
763 s->len_chanlist = board->dio_channel_nbr; 578 s->len_chanlist = 32;
764 s->range_table = &range_digital; 579 s->range_table = &range_digital;
765 s->insn_bits = me_dio_insn_bits; 580 s->insn_bits = me_dio_insn_bits;
766 s->insn_config = me_dio_insn_config; 581 s->insn_config = me_dio_insn_config;
767 s->io_bits = 0; 582 s->io_bits = 0;
768 583
769 dev_info(dev->class_dev, "%s: %s attached\n", 584 dev_info(dev->class_dev, "%s: %s attached\n",
770 dev->driver->driver_name, dev->board_name); 585 dev->driver->driver_name, dev->board_name);
@@ -775,6 +590,7 @@ static int me_attach_pci(struct comedi_device *dev, struct pci_dev *pcidev)
775static void me_detach(struct comedi_device *dev) 590static void me_detach(struct comedi_device *dev)
776{ 591{
777 struct pci_dev *pcidev = comedi_to_pci_dev(dev); 592 struct pci_dev *pcidev = comedi_to_pci_dev(dev);
593 struct me_private_data *dev_private = dev->private;
778 594
779 if (dev_private) { 595 if (dev_private) {
780 if (dev_private->me_regbase) { 596 if (dev_private->me_regbase) {
@@ -785,26 +601,25 @@ static void me_detach(struct comedi_device *dev)
785 iounmap(dev_private->plx_regbase); 601 iounmap(dev_private->plx_regbase);
786 } 602 }
787 if (pcidev) { 603 if (pcidev) {
788 if (dev_private->plx_regbase_size) 604 if (dev->iobase)
789 comedi_pci_disable(pcidev); 605 comedi_pci_disable(pcidev);
790 pci_dev_put(pcidev);
791 } 606 }
792} 607}
793 608
794static struct comedi_driver me_daq_driver = { 609static struct comedi_driver me_daq_driver = {
795 .driver_name = "me_daq", 610 .driver_name = "me_daq",
796 .module = THIS_MODULE, 611 .module = THIS_MODULE,
797 .attach_pci = me_attach_pci, 612 .auto_attach = me_auto_attach,
798 .detach = me_detach, 613 .detach = me_detach,
799}; 614};
800 615
801static int __devinit me_daq_pci_probe(struct pci_dev *dev, 616static int me_daq_pci_probe(struct pci_dev *dev,
802 const struct pci_device_id *ent) 617 const struct pci_device_id *ent)
803{ 618{
804 return comedi_pci_auto_config(dev, &me_daq_driver); 619 return comedi_pci_auto_config(dev, &me_daq_driver);
805} 620}
806 621
807static void __devexit me_daq_pci_remove(struct pci_dev *dev) 622static void me_daq_pci_remove(struct pci_dev *dev)
808{ 623{
809 comedi_pci_auto_unconfig(dev); 624 comedi_pci_auto_unconfig(dev);
810} 625}
@@ -820,7 +635,7 @@ static struct pci_driver me_daq_pci_driver = {
820 .name = "me_daq", 635 .name = "me_daq",
821 .id_table = me_daq_pci_table, 636 .id_table = me_daq_pci_table,
822 .probe = me_daq_pci_probe, 637 .probe = me_daq_pci_probe,
823 .remove = __devexit_p(me_daq_pci_remove), 638 .remove = me_daq_pci_remove,
824}; 639};
825module_comedi_pci_driver(me_daq_driver, me_daq_pci_driver); 640module_comedi_pci_driver(me_daq_driver, me_daq_pci_driver);
826 641
diff --git a/drivers/staging/comedi/drivers/mpc624.c b/drivers/staging/comedi/drivers/mpc624.c
index f8b7faefc961..67dc5ad81b0d 100644
--- a/drivers/staging/comedi/drivers/mpc624.c
+++ b/drivers/staging/comedi/drivers/mpc624.c
@@ -122,13 +122,12 @@ Configuration Options:
122#define MPC624_SPEED_6_875_Hz \ 122#define MPC624_SPEED_6_875_Hz \
123 (MPC624_OSR4 | MPC624_OSR3 | MPC624_OSR2 | MPC624_OSR1 | MPC624_OSR0) 123 (MPC624_OSR4 | MPC624_OSR3 | MPC624_OSR2 | MPC624_OSR1 | MPC624_OSR0)
124/* -------------------------------------------------------------------------- */ 124/* -------------------------------------------------------------------------- */
125struct skel_private { 125struct mpc624_private {
126 126
127 /* set by mpc624_attach() from driver's parameters */ 127 /* set by mpc624_attach() from driver's parameters */
128 unsigned long int ulConvertionRate; 128 unsigned long int ulConvertionRate;
129}; 129};
130 130
131#define devpriv ((struct skel_private *)dev->private)
132/* -------------------------------------------------------------------------- */ 131/* -------------------------------------------------------------------------- */
133static const struct comedi_lrange range_mpc624_bipolar1 = { 132static const struct comedi_lrange range_mpc624_bipolar1 = {
134 1, 133 1,
@@ -155,6 +154,7 @@ static int mpc624_ai_rinsn(struct comedi_device *dev,
155 struct comedi_subdevice *s, struct comedi_insn *insn, 154 struct comedi_subdevice *s, struct comedi_insn *insn,
156 unsigned int *data) 155 unsigned int *data)
157{ 156{
157 struct mpc624_private *devpriv = dev->private;
158 int n, i; 158 int n, i;
159 unsigned long int data_in, data_out; 159 unsigned long int data_in, data_out;
160 unsigned char ucPort; 160 unsigned char ucPort;
@@ -283,6 +283,7 @@ static int mpc624_ai_rinsn(struct comedi_device *dev,
283 283
284static int mpc624_attach(struct comedi_device *dev, struct comedi_devconfig *it) 284static int mpc624_attach(struct comedi_device *dev, struct comedi_devconfig *it)
285{ 285{
286 struct mpc624_private *devpriv;
286 struct comedi_subdevice *s; 287 struct comedi_subdevice *s;
287 unsigned long iobase; 288 unsigned long iobase;
288 int ret; 289 int ret;
@@ -297,9 +298,10 @@ static int mpc624_attach(struct comedi_device *dev, struct comedi_devconfig *it)
297 dev->iobase = iobase; 298 dev->iobase = iobase;
298 dev->board_name = "mpc624"; 299 dev->board_name = "mpc624";
299 300
300 /* Private structure initialization */ 301 devpriv = kzalloc(sizeof(*devpriv), GFP_KERNEL);
301 if (alloc_private(dev, sizeof(struct skel_private)) < 0) 302 if (!devpriv)
302 return -ENOMEM; 303 return -ENOMEM;
304 dev->private = devpriv;
303 305
304 switch (it->options[1]) { 306 switch (it->options[1]) {
305 case 0: 307 case 0:
diff --git a/drivers/staging/comedi/drivers/mpc8260cpm.c b/drivers/staging/comedi/drivers/mpc8260cpm.c
deleted file mode 100644
index c0c33299b7f1..000000000000
--- a/drivers/staging/comedi/drivers/mpc8260cpm.c
+++ /dev/null
@@ -1,164 +0,0 @@
1/*
2 comedi/drivers/mpc8260.c
3 driver for digital I/O pins on the MPC 8260 CPM module
4
5 COMEDI - Linux Control and Measurement Device Interface
6 Copyright (C) 2000,2001 David A. Schleef <ds@schleef.org>
7
8 This program is free software; you can redistribute it and/or modify
9 it under the terms of the GNU General Public License as published by
10 the Free Software Foundation; either version 2 of the License, or
11 (at your option) any later version.
12
13 This program is distributed in the hope that it will be useful,
14 but WITHOUT ANY WARRANTY; without even the implied warranty of
15 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 GNU General Public License for more details.
17
18 You should have received a copy of the GNU General Public License
19 along with this program; if not, write to the Free Software
20 Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
21
22*/
23/*
24Driver: mpc8260cpm
25Description: MPC8260 CPM module generic digital I/O lines
26Devices: [Motorola] MPC8260 CPM (mpc8260cpm)
27Author: ds
28Status: experimental
29Updated: Sat, 16 Mar 2002 17:34:48 -0800
30
31This driver is specific to the Motorola MPC8260 processor, allowing
32you to access the processor's generic digital I/O lines.
33
34It is apparently missing some code.
35*/
36
37#include "../comedidev.h"
38
39extern unsigned long mpc8260_dio_reserved[4];
40
41struct mpc8260cpm_private {
42
43 int data;
44
45};
46
47#define devpriv ((struct mpc8260cpm_private *)dev->private)
48
49static unsigned long *cpm_pdat(int port)
50{
51 switch (port) {
52 case 0:
53 return &io->iop_pdata;
54 case 1:
55 return &io->iop_pdatb;
56 case 2:
57 return &io->iop_pdatc;
58 case 3:
59 return &io->iop_pdatd;
60 }
61}
62
63static int mpc8260cpm_dio_config(struct comedi_device *dev,
64 struct comedi_subdevice *s,
65 struct comedi_insn *insn, unsigned int *data)
66{
67 int n;
68 unsigned int d;
69 unsigned int mask;
70 int port;
71
72 port = (int)s->private;
73 mask = 1 << CR_CHAN(insn->chanspec);
74 if (mask & cpm_reserved_bits[port]) {
75 return -EINVAL;
76 }
77
78 switch (data[0]) {
79 case INSN_CONFIG_DIO_OUTPUT:
80 s->io_bits |= mask;
81 break;
82 case INSN_CONFIG_DIO_INPUT:
83 s->io_bits &= ~mask;
84 break;
85 case INSN_CONFIG_DIO_QUERY:
86 data[1] = (s->io_bits & mask) ? COMEDI_OUTPUT : COMEDI_INPUT;
87 return insn->n;
88 break;
89 default:
90 return -EINVAL;
91 }
92
93 switch (port) {
94 case 0:
95 return &io->iop_pdira;
96 case 1:
97 return &io->iop_pdirb;
98 case 2:
99 return &io->iop_pdirc;
100 case 3:
101 return &io->iop_pdird;
102 }
103
104 return 1;
105}
106
107static int mpc8260cpm_dio_bits(struct comedi_device *dev,
108 struct comedi_subdevice *s,
109 struct comedi_insn *insn, unsigned int *data)
110{
111 int port;
112 unsigned long *p;
113
114 p = cpm_pdat((int)s->private);
115
116 return insn->n;
117}
118
119static int mpc8260cpm_attach(struct comedi_device *dev,
120 struct comedi_devconfig *it)
121{
122 struct comedi_subdevice *s;
123 int i;
124 int ret;
125
126 printk("comedi%d: mpc8260cpm: ", dev->minor);
127
128 dev->board_ptr = mpc8260cpm_boards + dev->board;
129
130 dev->board_name = thisboard->name;
131
132 if (alloc_private(dev, sizeof(struct mpc8260cpm_private)) < 0)
133 return -ENOMEM;
134
135 ret =comedi_alloc_subdevices(dev, 4);
136 if (ret)
137 return ret;
138
139 for (i = 0; i < 4; i++) {
140 s = &dev->subdevices[i];
141 s->type = COMEDI_SUBD_DIO;
142 s->subdev_flags = SDF_READABLE | SDF_WRITABLE;
143 s->n_chan = 32;
144 s->maxdata = 1;
145 s->range_table = &range_digital;
146 s->insn_config = mpc8260cpm_dio_config;
147 s->insn_bits = mpc8260cpm_dio_bits;
148 }
149
150 return 1;
151}
152
153static void mpc8260cpm_detach(struct comedi_device *dev)
154{
155 /* Nothing to cleanup */
156}
157
158static struct comedi_driver mpc8260cpm_driver = {
159 .driver_name = "mpc8260cpm",
160 .module = THIS_MODULE,
161 .attach = mpc8260cpm_attach,
162 .detach = mpc8260cpm_detach,
163};
164module_comedi_driver(mpc8260cpm_driver);
diff --git a/drivers/staging/comedi/drivers/multiq3.c b/drivers/staging/comedi/drivers/multiq3.c
index 4625cb4d07c6..1f5f402f3d17 100644
--- a/drivers/staging/comedi/drivers/multiq3.c
+++ b/drivers/staging/comedi/drivers/multiq3.c
@@ -86,7 +86,6 @@ Devices: [Quanser Consulting] MultiQ-3 (multiq3)
86struct multiq3_private { 86struct multiq3_private {
87 unsigned int ao_readback[2]; 87 unsigned int ao_readback[2];
88}; 88};
89#define devpriv ((struct multiq3_private *)dev->private)
90 89
91static int multiq3_ai_insn_read(struct comedi_device *dev, 90static int multiq3_ai_insn_read(struct comedi_device *dev,
92 struct comedi_subdevice *s, 91 struct comedi_subdevice *s,
@@ -129,6 +128,7 @@ static int multiq3_ao_insn_read(struct comedi_device *dev,
129 struct comedi_subdevice *s, 128 struct comedi_subdevice *s,
130 struct comedi_insn *insn, unsigned int *data) 129 struct comedi_insn *insn, unsigned int *data)
131{ 130{
131 struct multiq3_private *devpriv = dev->private;
132 int i; 132 int i;
133 int chan = CR_CHAN(insn->chanspec); 133 int chan = CR_CHAN(insn->chanspec);
134 134
@@ -142,6 +142,7 @@ static int multiq3_ao_insn_write(struct comedi_device *dev,
142 struct comedi_subdevice *s, 142 struct comedi_subdevice *s,
143 struct comedi_insn *insn, unsigned int *data) 143 struct comedi_insn *insn, unsigned int *data)
144{ 144{
145 struct multiq3_private *devpriv = dev->private;
145 int i; 146 int i;
146 int chan = CR_CHAN(insn->chanspec); 147 int chan = CR_CHAN(insn->chanspec);
147 148
@@ -230,6 +231,7 @@ static void encoder_reset(struct comedi_device *dev)
230static int multiq3_attach(struct comedi_device *dev, 231static int multiq3_attach(struct comedi_device *dev,
231 struct comedi_devconfig *it) 232 struct comedi_devconfig *it)
232{ 233{
234 struct multiq3_private *devpriv;
233 int result = 0; 235 int result = 0;
234 unsigned long iobase; 236 unsigned long iobase;
235 unsigned int irq; 237 unsigned int irq;
@@ -256,9 +258,10 @@ static int multiq3_attach(struct comedi_device *dev,
256 if (result) 258 if (result)
257 return result; 259 return result;
258 260
259 result = alloc_private(dev, sizeof(struct multiq3_private)); 261 devpriv = kzalloc(sizeof(*devpriv), GFP_KERNEL);
260 if (result < 0) 262 if (!devpriv)
261 return result; 263 return -ENOMEM;
264 dev->private = devpriv;
262 265
263 s = &dev->subdevices[0]; 266 s = &dev->subdevices[0];
264 /* ai subdevice */ 267 /* ai subdevice */
diff --git a/drivers/staging/comedi/drivers/ni_6527.c b/drivers/staging/comedi/drivers/ni_6527.c
index 51295f32ee89..5196b460ce11 100644
--- a/drivers/staging/comedi/drivers/ni_6527.c
+++ b/drivers/staging/comedi/drivers/ni_6527.c
@@ -112,12 +112,11 @@ struct ni6527_private {
112 unsigned int filter_enable; 112 unsigned int filter_enable;
113}; 113};
114 114
115#define devpriv ((struct ni6527_private *)dev->private)
116
117static int ni6527_di_insn_config(struct comedi_device *dev, 115static int ni6527_di_insn_config(struct comedi_device *dev,
118 struct comedi_subdevice *s, 116 struct comedi_subdevice *s,
119 struct comedi_insn *insn, unsigned int *data) 117 struct comedi_insn *insn, unsigned int *data)
120{ 118{
119 struct ni6527_private *devpriv = dev->private;
121 int chan = CR_CHAN(insn->chanspec); 120 int chan = CR_CHAN(insn->chanspec);
122 unsigned int interval; 121 unsigned int interval;
123 122
@@ -164,6 +163,8 @@ static int ni6527_di_insn_bits(struct comedi_device *dev,
164 struct comedi_subdevice *s, 163 struct comedi_subdevice *s,
165 struct comedi_insn *insn, unsigned int *data) 164 struct comedi_insn *insn, unsigned int *data)
166{ 165{
166 struct ni6527_private *devpriv = dev->private;
167
167 data[1] = readb(devpriv->mite->daq_io_addr + Port_Register(0)); 168 data[1] = readb(devpriv->mite->daq_io_addr + Port_Register(0));
168 data[1] |= readb(devpriv->mite->daq_io_addr + Port_Register(1)) << 8; 169 data[1] |= readb(devpriv->mite->daq_io_addr + Port_Register(1)) << 8;
169 data[1] |= readb(devpriv->mite->daq_io_addr + Port_Register(2)) << 16; 170 data[1] |= readb(devpriv->mite->daq_io_addr + Port_Register(2)) << 16;
@@ -175,6 +176,8 @@ static int ni6527_do_insn_bits(struct comedi_device *dev,
175 struct comedi_subdevice *s, 176 struct comedi_subdevice *s,
176 struct comedi_insn *insn, unsigned int *data) 177 struct comedi_insn *insn, unsigned int *data)
177{ 178{
179 struct ni6527_private *devpriv = dev->private;
180
178 if (data[0]) { 181 if (data[0]) {
179 s->state &= ~data[0]; 182 s->state &= ~data[0];
180 s->state |= (data[0] & data[1]); 183 s->state |= (data[0] & data[1]);
@@ -202,6 +205,7 @@ static int ni6527_do_insn_bits(struct comedi_device *dev,
202static irqreturn_t ni6527_interrupt(int irq, void *d) 205static irqreturn_t ni6527_interrupt(int irq, void *d)
203{ 206{
204 struct comedi_device *dev = d; 207 struct comedi_device *dev = d;
208 struct ni6527_private *devpriv = dev->private;
205 struct comedi_subdevice *s = &dev->subdevices[2]; 209 struct comedi_subdevice *s = &dev->subdevices[2];
206 unsigned int status; 210 unsigned int status;
207 211
@@ -243,29 +247,13 @@ static int ni6527_intr_cmdtest(struct comedi_device *dev,
243 if (err) 247 if (err)
244 return 2; 248 return 2;
245 249
246 /* step 3: make sure arguments are trivially compatible */ 250 /* Step 3: check if arguments are trivially valid */
247 251
248 if (cmd->start_arg != 0) { 252 err |= cfc_check_trigger_arg_is(&cmd->start_arg, 0);
249 cmd->start_arg = 0; 253 err |= cfc_check_trigger_arg_is(&cmd->scan_begin_arg, 0);
250 err++; 254 err |= cfc_check_trigger_arg_is(&cmd->convert_arg, 0);
251 } 255 err |= cfc_check_trigger_arg_is(&cmd->scan_end_arg, 1);
252 if (cmd->scan_begin_arg != 0) { 256 err |= cfc_check_trigger_arg_is(&cmd->stop_arg, 0);
253 cmd->scan_begin_arg = 0;
254 err++;
255 }
256 if (cmd->convert_arg != 0) {
257 cmd->convert_arg = 0;
258 err++;
259 }
260
261 if (cmd->scan_end_arg != 1) {
262 cmd->scan_end_arg = 1;
263 err++;
264 }
265 if (cmd->stop_arg != 0) {
266 cmd->stop_arg = 0;
267 err++;
268 }
269 257
270 if (err) 258 if (err)
271 return 3; 259 return 3;
@@ -281,6 +269,7 @@ static int ni6527_intr_cmdtest(struct comedi_device *dev,
281static int ni6527_intr_cmd(struct comedi_device *dev, 269static int ni6527_intr_cmd(struct comedi_device *dev,
282 struct comedi_subdevice *s) 270 struct comedi_subdevice *s)
283{ 271{
272 struct ni6527_private *devpriv = dev->private;
284 /* struct comedi_cmd *cmd = &s->async->cmd; */ 273 /* struct comedi_cmd *cmd = &s->async->cmd; */
285 274
286 writeb(ClrEdge | ClrOverflow, 275 writeb(ClrEdge | ClrOverflow,
@@ -295,6 +284,8 @@ static int ni6527_intr_cmd(struct comedi_device *dev,
295static int ni6527_intr_cancel(struct comedi_device *dev, 284static int ni6527_intr_cancel(struct comedi_device *dev,
296 struct comedi_subdevice *s) 285 struct comedi_subdevice *s)
297{ 286{
287 struct ni6527_private *devpriv = dev->private;
288
298 writeb(0x00, devpriv->mite->daq_io_addr + Master_Interrupt_Control); 289 writeb(0x00, devpriv->mite->daq_io_addr + Master_Interrupt_Control);
299 290
300 return 0; 291 return 0;
@@ -312,6 +303,8 @@ static int ni6527_intr_insn_config(struct comedi_device *dev,
312 struct comedi_subdevice *s, 303 struct comedi_subdevice *s,
313 struct comedi_insn *insn, unsigned int *data) 304 struct comedi_insn *insn, unsigned int *data)
314{ 305{
306 struct ni6527_private *devpriv = dev->private;
307
315 if (insn->n < 1) 308 if (insn->n < 1)
316 return -EINVAL; 309 return -EINVAL;
317 if (data[0] != INSN_CONFIG_CHANGE_NOTIFY) 310 if (data[0] != INSN_CONFIG_CHANGE_NOTIFY)
@@ -348,15 +341,18 @@ ni6527_find_boardinfo(struct pci_dev *pcidev)
348 return NULL; 341 return NULL;
349} 342}
350 343
351static int __devinit ni6527_attach_pci(struct comedi_device *dev, 344static int ni6527_auto_attach(struct comedi_device *dev,
352 struct pci_dev *pcidev) 345 unsigned long context_unused)
353{ 346{
347 struct pci_dev *pcidev = comedi_to_pci_dev(dev);
348 struct ni6527_private *devpriv;
354 struct comedi_subdevice *s; 349 struct comedi_subdevice *s;
355 int ret; 350 int ret;
356 351
357 ret = alloc_private(dev, sizeof(struct ni6527_private)); 352 devpriv = kzalloc(sizeof(*devpriv), GFP_KERNEL);
358 if (ret < 0) 353 if (!devpriv)
359 return ret; 354 return -ENOMEM;
355 dev->private = devpriv;
360 356
361 dev->board_ptr = ni6527_find_boardinfo(pcidev); 357 dev->board_ptr = ni6527_find_boardinfo(pcidev);
362 if (!dev->board_ptr) 358 if (!dev->board_ptr)
@@ -430,6 +426,8 @@ static int __devinit ni6527_attach_pci(struct comedi_device *dev,
430 426
431static void ni6527_detach(struct comedi_device *dev) 427static void ni6527_detach(struct comedi_device *dev)
432{ 428{
429 struct ni6527_private *devpriv = dev->private;
430
433 if (devpriv && devpriv->mite && devpriv->mite->daq_io_addr) 431 if (devpriv && devpriv->mite && devpriv->mite->daq_io_addr)
434 writeb(0x00, 432 writeb(0x00,
435 devpriv->mite->daq_io_addr + Master_Interrupt_Control); 433 devpriv->mite->daq_io_addr + Master_Interrupt_Control);
@@ -444,17 +442,17 @@ static void ni6527_detach(struct comedi_device *dev)
444static struct comedi_driver ni6527_driver = { 442static struct comedi_driver ni6527_driver = {
445 .driver_name = DRIVER_NAME, 443 .driver_name = DRIVER_NAME,
446 .module = THIS_MODULE, 444 .module = THIS_MODULE,
447 .attach_pci = ni6527_attach_pci, 445 .auto_attach = ni6527_auto_attach,
448 .detach = ni6527_detach, 446 .detach = ni6527_detach,
449}; 447};
450 448
451static int __devinit ni6527_pci_probe(struct pci_dev *dev, 449static int ni6527_pci_probe(struct pci_dev *dev,
452 const struct pci_device_id *ent) 450 const struct pci_device_id *ent)
453{ 451{
454 return comedi_pci_auto_config(dev, &ni6527_driver); 452 return comedi_pci_auto_config(dev, &ni6527_driver);
455} 453}
456 454
457static void __devexit ni6527_pci_remove(struct pci_dev *dev) 455static void ni6527_pci_remove(struct pci_dev *dev)
458{ 456{
459 comedi_pci_auto_unconfig(dev); 457 comedi_pci_auto_unconfig(dev);
460} 458}
@@ -463,7 +461,7 @@ static struct pci_driver ni6527_pci_driver = {
463 .name = DRIVER_NAME, 461 .name = DRIVER_NAME,
464 .id_table = ni6527_pci_table, 462 .id_table = ni6527_pci_table,
465 .probe = ni6527_pci_probe, 463 .probe = ni6527_pci_probe,
466 .remove = __devexit_p(ni6527_pci_remove) 464 .remove = ni6527_pci_remove
467}; 465};
468module_comedi_pci_driver(ni6527_driver, ni6527_pci_driver); 466module_comedi_pci_driver(ni6527_driver, ni6527_pci_driver);
469 467
diff --git a/drivers/staging/comedi/drivers/ni_65xx.c b/drivers/staging/comedi/drivers/ni_65xx.c
index 2a73ff57a2fb..2fb4b7790aeb 100644
--- a/drivers/staging/comedi/drivers/ni_65xx.c
+++ b/drivers/staging/comedi/drivers/ni_65xx.c
@@ -48,7 +48,6 @@ except maybe the 6514.
48 48
49 */ 49 */
50 50
51#define _GNU_SOURCE
52#define DEBUG 1 51#define DEBUG 1
53#define DEBUG_FLAGS 52#define DEBUG_FLAGS
54#include <linux/interrupt.h> 53#include <linux/interrupt.h>
@@ -291,11 +290,6 @@ struct ni_65xx_private {
291 unsigned short dio_direction[NI_65XX_MAX_NUM_PORTS]; 290 unsigned short dio_direction[NI_65XX_MAX_NUM_PORTS];
292}; 291};
293 292
294static inline struct ni_65xx_private *private(struct comedi_device *dev)
295{
296 return dev->private;
297}
298
299struct ni_65xx_subdevice_private { 293struct ni_65xx_subdevice_private {
300 unsigned base_port; 294 unsigned base_port;
301}; 295};
@@ -319,6 +313,7 @@ static int ni_65xx_config_filter(struct comedi_device *dev,
319 struct comedi_subdevice *s, 313 struct comedi_subdevice *s,
320 struct comedi_insn *insn, unsigned int *data) 314 struct comedi_insn *insn, unsigned int *data)
321{ 315{
316 struct ni_65xx_private *devpriv = dev->private;
322 const unsigned chan = CR_CHAN(insn->chanspec); 317 const unsigned chan = CR_CHAN(insn->chanspec);
323 const unsigned port = 318 const unsigned port =
324 sprivate(s)->base_port + ni_65xx_port_by_channel(chan); 319 sprivate(s)->base_port + ni_65xx_port_by_channel(chan);
@@ -335,22 +330,22 @@ static int ni_65xx_config_filter(struct comedi_device *dev,
335 interval = max_filter_interval; 330 interval = max_filter_interval;
336 data[1] = interval * filter_resolution_ns; 331 data[1] = interval * filter_resolution_ns;
337 332
338 if (interval != private(dev)->filter_interval) { 333 if (interval != devpriv->filter_interval) {
339 writeb(interval, 334 writeb(interval,
340 private(dev)->mite->daq_io_addr + 335 devpriv->mite->daq_io_addr +
341 Filter_Interval); 336 Filter_Interval);
342 private(dev)->filter_interval = interval; 337 devpriv->filter_interval = interval;
343 } 338 }
344 339
345 private(dev)->filter_enable[port] |= 340 devpriv->filter_enable[port] |=
346 1 << (chan % ni_65xx_channels_per_port); 341 1 << (chan % ni_65xx_channels_per_port);
347 } else { 342 } else {
348 private(dev)->filter_enable[port] &= 343 devpriv->filter_enable[port] &=
349 ~(1 << (chan % ni_65xx_channels_per_port)); 344 ~(1 << (chan % ni_65xx_channels_per_port));
350 } 345 }
351 346
352 writeb(private(dev)->filter_enable[port], 347 writeb(devpriv->filter_enable[port],
353 private(dev)->mite->daq_io_addr + Filter_Enable(port)); 348 devpriv->mite->daq_io_addr + Filter_Enable(port));
354 349
355 return 2; 350 return 2;
356} 351}
@@ -359,6 +354,7 @@ static int ni_65xx_dio_insn_config(struct comedi_device *dev,
359 struct comedi_subdevice *s, 354 struct comedi_subdevice *s,
360 struct comedi_insn *insn, unsigned int *data) 355 struct comedi_insn *insn, unsigned int *data)
361{ 356{
357 struct ni_65xx_private *devpriv = dev->private;
362 unsigned port; 358 unsigned port;
363 359
364 if (insn->n < 1) 360 if (insn->n < 1)
@@ -372,21 +368,21 @@ static int ni_65xx_dio_insn_config(struct comedi_device *dev,
372 case INSN_CONFIG_DIO_OUTPUT: 368 case INSN_CONFIG_DIO_OUTPUT:
373 if (s->type != COMEDI_SUBD_DIO) 369 if (s->type != COMEDI_SUBD_DIO)
374 return -EINVAL; 370 return -EINVAL;
375 private(dev)->dio_direction[port] = COMEDI_OUTPUT; 371 devpriv->dio_direction[port] = COMEDI_OUTPUT;
376 writeb(0, private(dev)->mite->daq_io_addr + Port_Select(port)); 372 writeb(0, devpriv->mite->daq_io_addr + Port_Select(port));
377 return 1; 373 return 1;
378 break; 374 break;
379 case INSN_CONFIG_DIO_INPUT: 375 case INSN_CONFIG_DIO_INPUT:
380 if (s->type != COMEDI_SUBD_DIO) 376 if (s->type != COMEDI_SUBD_DIO)
381 return -EINVAL; 377 return -EINVAL;
382 private(dev)->dio_direction[port] = COMEDI_INPUT; 378 devpriv->dio_direction[port] = COMEDI_INPUT;
383 writeb(1, private(dev)->mite->daq_io_addr + Port_Select(port)); 379 writeb(1, devpriv->mite->daq_io_addr + Port_Select(port));
384 return 1; 380 return 1;
385 break; 381 break;
386 case INSN_CONFIG_DIO_QUERY: 382 case INSN_CONFIG_DIO_QUERY:
387 if (s->type != COMEDI_SUBD_DIO) 383 if (s->type != COMEDI_SUBD_DIO)
388 return -EINVAL; 384 return -EINVAL;
389 data[1] = private(dev)->dio_direction[port]; 385 data[1] = devpriv->dio_direction[port];
390 return insn->n; 386 return insn->n;
391 break; 387 break;
392 default: 388 default:
@@ -399,6 +395,7 @@ static int ni_65xx_dio_insn_bits(struct comedi_device *dev,
399 struct comedi_subdevice *s, 395 struct comedi_subdevice *s,
400 struct comedi_insn *insn, unsigned int *data) 396 struct comedi_insn *insn, unsigned int *data)
401{ 397{
398 struct ni_65xx_private *devpriv = dev->private;
402 unsigned base_bitfield_channel; 399 unsigned base_bitfield_channel;
403 const unsigned max_ports_per_bitfield = 5; 400 const unsigned max_ports_per_bitfield = 5;
404 unsigned read_bits = 0; 401 unsigned read_bits = 0;
@@ -432,18 +429,18 @@ static int ni_65xx_dio_insn_bits(struct comedi_device *dev,
432 port_data &= 0xff; 429 port_data &= 0xff;
433 if (port_mask) { 430 if (port_mask) {
434 unsigned bits; 431 unsigned bits;
435 private(dev)->output_bits[port] &= ~port_mask; 432 devpriv->output_bits[port] &= ~port_mask;
436 private(dev)->output_bits[port] |= 433 devpriv->output_bits[port] |=
437 port_data & port_mask; 434 port_data & port_mask;
438 bits = private(dev)->output_bits[port]; 435 bits = devpriv->output_bits[port];
439 if (board(dev)->invert_outputs) 436 if (board(dev)->invert_outputs)
440 bits = ~bits; 437 bits = ~bits;
441 writeb(bits, 438 writeb(bits,
442 private(dev)->mite->daq_io_addr + 439 devpriv->mite->daq_io_addr +
443 Port_Data(port)); 440 Port_Data(port));
444 } 441 }
445 port_read_bits = 442 port_read_bits =
446 readb(private(dev)->mite->daq_io_addr + Port_Data(port)); 443 readb(devpriv->mite->daq_io_addr + Port_Data(port));
447 if (s->type == COMEDI_SUBD_DO && board(dev)->invert_outputs) { 444 if (s->type == COMEDI_SUBD_DO && board(dev)->invert_outputs) {
448 /* Outputs inverted, so invert value read back from 445 /* Outputs inverted, so invert value read back from
449 * DO subdevice. (Does not apply to boards with DIO 446 * DO subdevice. (Does not apply to boards with DIO
@@ -464,17 +461,18 @@ static int ni_65xx_dio_insn_bits(struct comedi_device *dev,
464static irqreturn_t ni_65xx_interrupt(int irq, void *d) 461static irqreturn_t ni_65xx_interrupt(int irq, void *d)
465{ 462{
466 struct comedi_device *dev = d; 463 struct comedi_device *dev = d;
464 struct ni_65xx_private *devpriv = dev->private;
467 struct comedi_subdevice *s = &dev->subdevices[2]; 465 struct comedi_subdevice *s = &dev->subdevices[2];
468 unsigned int status; 466 unsigned int status;
469 467
470 status = readb(private(dev)->mite->daq_io_addr + Change_Status); 468 status = readb(devpriv->mite->daq_io_addr + Change_Status);
471 if ((status & MasterInterruptStatus) == 0) 469 if ((status & MasterInterruptStatus) == 0)
472 return IRQ_NONE; 470 return IRQ_NONE;
473 if ((status & EdgeStatus) == 0) 471 if ((status & EdgeStatus) == 0)
474 return IRQ_NONE; 472 return IRQ_NONE;
475 473
476 writeb(ClrEdge | ClrOverflow, 474 writeb(ClrEdge | ClrOverflow,
477 private(dev)->mite->daq_io_addr + Clear_Register); 475 devpriv->mite->daq_io_addr + Clear_Register);
478 476
479 comedi_buf_put(s->async, 0); 477 comedi_buf_put(s->async, 0);
480 s->async->events |= COMEDI_CB_EOS; 478 s->async->events |= COMEDI_CB_EOS;
@@ -505,29 +503,13 @@ static int ni_65xx_intr_cmdtest(struct comedi_device *dev,
505 if (err) 503 if (err)
506 return 2; 504 return 2;
507 505
508 /* step 3: make sure arguments are trivially compatible */ 506 /* Step 3: check if arguments are trivially valid */
509 507
510 if (cmd->start_arg != 0) { 508 err |= cfc_check_trigger_arg_is(&cmd->start_arg, 0);
511 cmd->start_arg = 0; 509 err |= cfc_check_trigger_arg_is(&cmd->scan_begin_arg, 0);
512 err++; 510 err |= cfc_check_trigger_arg_is(&cmd->convert_arg, 0);
513 } 511 err |= cfc_check_trigger_arg_is(&cmd->scan_end_arg, 1);
514 if (cmd->scan_begin_arg != 0) { 512 err |= cfc_check_trigger_arg_is(&cmd->stop_arg, 0);
515 cmd->scan_begin_arg = 0;
516 err++;
517 }
518 if (cmd->convert_arg != 0) {
519 cmd->convert_arg = 0;
520 err++;
521 }
522
523 if (cmd->scan_end_arg != 1) {
524 cmd->scan_end_arg = 1;
525 err++;
526 }
527 if (cmd->stop_arg != 0) {
528 cmd->stop_arg = 0;
529 err++;
530 }
531 513
532 if (err) 514 if (err)
533 return 3; 515 return 3;
@@ -543,13 +525,14 @@ static int ni_65xx_intr_cmdtest(struct comedi_device *dev,
543static int ni_65xx_intr_cmd(struct comedi_device *dev, 525static int ni_65xx_intr_cmd(struct comedi_device *dev,
544 struct comedi_subdevice *s) 526 struct comedi_subdevice *s)
545{ 527{
528 struct ni_65xx_private *devpriv = dev->private;
546 /* struct comedi_cmd *cmd = &s->async->cmd; */ 529 /* struct comedi_cmd *cmd = &s->async->cmd; */
547 530
548 writeb(ClrEdge | ClrOverflow, 531 writeb(ClrEdge | ClrOverflow,
549 private(dev)->mite->daq_io_addr + Clear_Register); 532 devpriv->mite->daq_io_addr + Clear_Register);
550 writeb(FallingEdgeIntEnable | RisingEdgeIntEnable | 533 writeb(FallingEdgeIntEnable | RisingEdgeIntEnable |
551 MasterInterruptEnable | EdgeIntEnable, 534 MasterInterruptEnable | EdgeIntEnable,
552 private(dev)->mite->daq_io_addr + Master_Interrupt_Control); 535 devpriv->mite->daq_io_addr + Master_Interrupt_Control);
553 536
554 return 0; 537 return 0;
555} 538}
@@ -557,8 +540,9 @@ static int ni_65xx_intr_cmd(struct comedi_device *dev,
557static int ni_65xx_intr_cancel(struct comedi_device *dev, 540static int ni_65xx_intr_cancel(struct comedi_device *dev,
558 struct comedi_subdevice *s) 541 struct comedi_subdevice *s)
559{ 542{
560 writeb(0x00, 543 struct ni_65xx_private *devpriv = dev->private;
561 private(dev)->mite->daq_io_addr + Master_Interrupt_Control); 544
545 writeb(0x00, devpriv->mite->daq_io_addr + Master_Interrupt_Control);
562 546
563 return 0; 547 return 0;
564} 548}
@@ -576,35 +560,37 @@ static int ni_65xx_intr_insn_config(struct comedi_device *dev,
576 struct comedi_insn *insn, 560 struct comedi_insn *insn,
577 unsigned int *data) 561 unsigned int *data)
578{ 562{
563 struct ni_65xx_private *devpriv = dev->private;
564
579 if (insn->n < 1) 565 if (insn->n < 1)
580 return -EINVAL; 566 return -EINVAL;
581 if (data[0] != INSN_CONFIG_CHANGE_NOTIFY) 567 if (data[0] != INSN_CONFIG_CHANGE_NOTIFY)
582 return -EINVAL; 568 return -EINVAL;
583 569
584 writeb(data[1], 570 writeb(data[1],
585 private(dev)->mite->daq_io_addr + 571 devpriv->mite->daq_io_addr +
586 Rising_Edge_Detection_Enable(0)); 572 Rising_Edge_Detection_Enable(0));
587 writeb(data[1] >> 8, 573 writeb(data[1] >> 8,
588 private(dev)->mite->daq_io_addr + 574 devpriv->mite->daq_io_addr +
589 Rising_Edge_Detection_Enable(0x10)); 575 Rising_Edge_Detection_Enable(0x10));
590 writeb(data[1] >> 16, 576 writeb(data[1] >> 16,
591 private(dev)->mite->daq_io_addr + 577 devpriv->mite->daq_io_addr +
592 Rising_Edge_Detection_Enable(0x20)); 578 Rising_Edge_Detection_Enable(0x20));
593 writeb(data[1] >> 24, 579 writeb(data[1] >> 24,
594 private(dev)->mite->daq_io_addr + 580 devpriv->mite->daq_io_addr +
595 Rising_Edge_Detection_Enable(0x30)); 581 Rising_Edge_Detection_Enable(0x30));
596 582
597 writeb(data[2], 583 writeb(data[2],
598 private(dev)->mite->daq_io_addr + 584 devpriv->mite->daq_io_addr +
599 Falling_Edge_Detection_Enable(0)); 585 Falling_Edge_Detection_Enable(0));
600 writeb(data[2] >> 8, 586 writeb(data[2] >> 8,
601 private(dev)->mite->daq_io_addr + 587 devpriv->mite->daq_io_addr +
602 Falling_Edge_Detection_Enable(0x10)); 588 Falling_Edge_Detection_Enable(0x10));
603 writeb(data[2] >> 16, 589 writeb(data[2] >> 16,
604 private(dev)->mite->daq_io_addr + 590 devpriv->mite->daq_io_addr +
605 Falling_Edge_Detection_Enable(0x20)); 591 Falling_Edge_Detection_Enable(0x20));
606 writeb(data[2] >> 24, 592 writeb(data[2] >> 24,
607 private(dev)->mite->daq_io_addr + 593 devpriv->mite->daq_io_addr +
608 Falling_Edge_Detection_Enable(0x30)); 594 Falling_Edge_Detection_Enable(0x30));
609 595
610 return 2; 596 return 2;
@@ -624,35 +610,38 @@ ni_65xx_find_boardinfo(struct pci_dev *pcidev)
624 return NULL; 610 return NULL;
625} 611}
626 612
627static int __devinit ni_65xx_attach_pci(struct comedi_device *dev, 613static int ni_65xx_auto_attach(struct comedi_device *dev,
628 struct pci_dev *pcidev) 614 unsigned long context_unused)
629{ 615{
616 struct pci_dev *pcidev = comedi_to_pci_dev(dev);
617 struct ni_65xx_private *devpriv;
630 struct comedi_subdevice *s; 618 struct comedi_subdevice *s;
631 unsigned i; 619 unsigned i;
632 int ret; 620 int ret;
633 621
634 ret = alloc_private(dev, sizeof(struct ni_65xx_private)); 622 devpriv = kzalloc(sizeof(*devpriv), GFP_KERNEL);
635 if (ret < 0) 623 if (!devpriv)
636 return ret; 624 return -ENOMEM;
625 dev->private = devpriv;
637 626
638 dev->board_ptr = ni_65xx_find_boardinfo(pcidev); 627 dev->board_ptr = ni_65xx_find_boardinfo(pcidev);
639 if (!dev->board_ptr) 628 if (!dev->board_ptr)
640 return -ENODEV; 629 return -ENODEV;
641 630
642 private(dev)->mite = mite_alloc(pcidev); 631 devpriv->mite = mite_alloc(pcidev);
643 if (!private(dev)->mite) 632 if (!devpriv->mite)
644 return -ENOMEM; 633 return -ENOMEM;
645 634
646 ret = mite_setup(private(dev)->mite); 635 ret = mite_setup(devpriv->mite);
647 if (ret < 0) { 636 if (ret < 0) {
648 dev_warn(dev->class_dev, "error setting up mite\n"); 637 dev_warn(dev->class_dev, "error setting up mite\n");
649 return ret; 638 return ret;
650 } 639 }
651 640
652 dev->board_name = board(dev)->name; 641 dev->board_name = board(dev)->name;
653 dev->irq = mite_irq(private(dev)->mite); 642 dev->irq = mite_irq(devpriv->mite);
654 dev_info(dev->class_dev, "board: %s, ID=0x%02x", dev->board_name, 643 dev_info(dev->class_dev, "board: %s, ID=0x%02x", dev->board_name,
655 readb(private(dev)->mite->daq_io_addr + ID_Register)); 644 readb(devpriv->mite->daq_io_addr + ID_Register));
656 645
657 ret = comedi_alloc_subdevices(dev, 4); 646 ret = comedi_alloc_subdevices(dev, 4);
658 if (ret) 647 if (ret)
@@ -710,7 +699,7 @@ static int __devinit ni_65xx_attach_pci(struct comedi_device *dev,
710 for (i = 0; i < board(dev)->num_dio_ports; ++i) { 699 for (i = 0; i < board(dev)->num_dio_ports; ++i) {
711 /* configure all ports for input */ 700 /* configure all ports for input */
712 writeb(0x1, 701 writeb(0x1,
713 private(dev)->mite->daq_io_addr + 702 devpriv->mite->daq_io_addr +
714 Port_Select(i)); 703 Port_Select(i));
715 } 704 }
716 } else { 705 } else {
@@ -732,21 +721,21 @@ static int __devinit ni_65xx_attach_pci(struct comedi_device *dev,
732 721
733 for (i = 0; i < ni_65xx_total_num_ports(board(dev)); ++i) { 722 for (i = 0; i < ni_65xx_total_num_ports(board(dev)); ++i) {
734 writeb(0x00, 723 writeb(0x00,
735 private(dev)->mite->daq_io_addr + Filter_Enable(i)); 724 devpriv->mite->daq_io_addr + Filter_Enable(i));
736 if (board(dev)->invert_outputs) 725 if (board(dev)->invert_outputs)
737 writeb(0x01, 726 writeb(0x01,
738 private(dev)->mite->daq_io_addr + Port_Data(i)); 727 devpriv->mite->daq_io_addr + Port_Data(i));
739 else 728 else
740 writeb(0x00, 729 writeb(0x00,
741 private(dev)->mite->daq_io_addr + Port_Data(i)); 730 devpriv->mite->daq_io_addr + Port_Data(i));
742 } 731 }
743 writeb(ClrEdge | ClrOverflow, 732 writeb(ClrEdge | ClrOverflow,
744 private(dev)->mite->daq_io_addr + Clear_Register); 733 devpriv->mite->daq_io_addr + Clear_Register);
745 writeb(0x00, 734 writeb(0x00,
746 private(dev)->mite->daq_io_addr + Master_Interrupt_Control); 735 devpriv->mite->daq_io_addr + Master_Interrupt_Control);
747 736
748 /* Set filter interval to 0 (32bit reg) */ 737 /* Set filter interval to 0 (32bit reg) */
749 writeb(0x00000000, private(dev)->mite->daq_io_addr + Filter_Interval); 738 writeb(0x00000000, devpriv->mite->daq_io_addr + Filter_Interval);
750 739
751 ret = request_irq(dev->irq, ni_65xx_interrupt, IRQF_SHARED, 740 ret = request_irq(dev->irq, ni_65xx_interrupt, IRQF_SHARED,
752 "ni_65xx", dev); 741 "ni_65xx", dev);
@@ -760,15 +749,16 @@ static int __devinit ni_65xx_attach_pci(struct comedi_device *dev,
760 749
761static void ni_65xx_detach(struct comedi_device *dev) 750static void ni_65xx_detach(struct comedi_device *dev)
762{ 751{
763 if (private(dev) && private(dev)->mite 752 struct ni_65xx_private *devpriv = dev->private;
764 && private(dev)->mite->daq_io_addr) { 753
754 if (devpriv && devpriv->mite && devpriv->mite->daq_io_addr) {
765 writeb(0x00, 755 writeb(0x00,
766 private(dev)->mite->daq_io_addr + 756 devpriv->mite->daq_io_addr +
767 Master_Interrupt_Control); 757 Master_Interrupt_Control);
768 } 758 }
769 if (dev->irq) 759 if (dev->irq)
770 free_irq(dev->irq, dev); 760 free_irq(dev->irq, dev);
771 if (private(dev)) { 761 if (devpriv) {
772 struct comedi_subdevice *s; 762 struct comedi_subdevice *s;
773 unsigned i; 763 unsigned i;
774 764
@@ -777,9 +767,9 @@ static void ni_65xx_detach(struct comedi_device *dev)
777 kfree(s->private); 767 kfree(s->private);
778 s->private = NULL; 768 s->private = NULL;
779 } 769 }
780 if (private(dev)->mite) { 770 if (devpriv->mite) {
781 mite_unsetup(private(dev)->mite); 771 mite_unsetup(devpriv->mite);
782 mite_free(private(dev)->mite); 772 mite_free(devpriv->mite);
783 } 773 }
784 } 774 }
785} 775}
@@ -787,17 +777,17 @@ static void ni_65xx_detach(struct comedi_device *dev)
787static struct comedi_driver ni_65xx_driver = { 777static struct comedi_driver ni_65xx_driver = {
788 .driver_name = "ni_65xx", 778 .driver_name = "ni_65xx",
789 .module = THIS_MODULE, 779 .module = THIS_MODULE,
790 .attach_pci = ni_65xx_attach_pci, 780 .auto_attach = ni_65xx_auto_attach,
791 .detach = ni_65xx_detach, 781 .detach = ni_65xx_detach,
792}; 782};
793 783
794static int __devinit ni_65xx_pci_probe(struct pci_dev *dev, 784static int ni_65xx_pci_probe(struct pci_dev *dev,
795 const struct pci_device_id *ent) 785 const struct pci_device_id *ent)
796{ 786{
797 return comedi_pci_auto_config(dev, &ni_65xx_driver); 787 return comedi_pci_auto_config(dev, &ni_65xx_driver);
798} 788}
799 789
800static void __devexit ni_65xx_pci_remove(struct pci_dev *dev) 790static void ni_65xx_pci_remove(struct pci_dev *dev)
801{ 791{
802 comedi_pci_auto_unconfig(dev); 792 comedi_pci_auto_unconfig(dev);
803} 793}
@@ -806,7 +796,7 @@ static struct pci_driver ni_65xx_pci_driver = {
806 .name = "ni_65xx", 796 .name = "ni_65xx",
807 .id_table = ni_65xx_pci_table, 797 .id_table = ni_65xx_pci_table,
808 .probe = ni_65xx_pci_probe, 798 .probe = ni_65xx_pci_probe,
809 .remove = __devexit_p(ni_65xx_pci_remove) 799 .remove = ni_65xx_pci_remove
810}; 800};
811module_comedi_pci_driver(ni_65xx_driver, ni_65xx_pci_driver); 801module_comedi_pci_driver(ni_65xx_driver, ni_65xx_pci_driver);
812 802
diff --git a/drivers/staging/comedi/drivers/ni_660x.c b/drivers/staging/comedi/drivers/ni_660x.c
index df2f3b0bab48..26baf9c96fff 100644
--- a/drivers/staging/comedi/drivers/ni_660x.c
+++ b/drivers/staging/comedi/drivers/ni_660x.c
@@ -419,16 +419,6 @@ static const struct ni_660x_board ni_660x_boards[] = {
419#define NI_660X_MAX_NUM_CHIPS 2 419#define NI_660X_MAX_NUM_CHIPS 2
420#define NI_660X_MAX_NUM_COUNTERS (NI_660X_MAX_NUM_CHIPS * counters_per_chip) 420#define NI_660X_MAX_NUM_COUNTERS (NI_660X_MAX_NUM_CHIPS * counters_per_chip)
421 421
422static DEFINE_PCI_DEVICE_TABLE(ni_660x_pci_table) = {
423 {PCI_DEVICE(PCI_VENDOR_ID_NI, 0x2c60)},
424 {PCI_DEVICE(PCI_VENDOR_ID_NI, 0x1310)},
425 {PCI_DEVICE(PCI_VENDOR_ID_NI, 0x1360)},
426 {PCI_DEVICE(PCI_VENDOR_ID_NI, 0x2cc0)},
427 {0}
428};
429
430MODULE_DEVICE_TABLE(pci, ni_660x_pci_table);
431
432struct ni_660x_private { 422struct ni_660x_private {
433 struct mite_struct *mite; 423 struct mite_struct *mite;
434 struct ni_gpct_device *counter_dev; 424 struct ni_gpct_device *counter_dev;
@@ -443,78 +433,11 @@ struct ni_660x_private {
443 unsigned short pfi_output_selects[NUM_PFI_CHANNELS]; 433 unsigned short pfi_output_selects[NUM_PFI_CHANNELS];
444}; 434};
445 435
446static inline struct ni_660x_private *private(struct comedi_device *dev)
447{
448 return dev->private;
449}
450
451/* initialized in ni_660x_attach_pci() */
452static inline const struct ni_660x_board *board(struct comedi_device *dev)
453{
454 return dev->board_ptr;
455}
456
457static int ni_660x_attach_pci(struct comedi_device *dev,
458 struct pci_dev *pcidev);
459static void ni_660x_detach(struct comedi_device *dev);
460static void init_tio_chip(struct comedi_device *dev, int chipset);
461static void ni_660x_select_pfi_output(struct comedi_device *dev,
462 unsigned pfi_channel,
463 unsigned output_select);
464
465static struct comedi_driver ni_660x_driver = {
466 .driver_name = "ni_660x",
467 .module = THIS_MODULE,
468 .attach_pci = ni_660x_attach_pci,
469 .detach = ni_660x_detach,
470};
471
472static int __devinit ni_660x_pci_probe(struct pci_dev *dev,
473 const struct pci_device_id *ent)
474{
475 return comedi_pci_auto_config(dev, &ni_660x_driver);
476}
477
478static void __devexit ni_660x_pci_remove(struct pci_dev *dev)
479{
480 comedi_pci_auto_unconfig(dev);
481}
482
483static struct pci_driver ni_660x_pci_driver = {
484 .name = "ni_660x",
485 .id_table = ni_660x_pci_table,
486 .probe = ni_660x_pci_probe,
487 .remove = __devexit_p(ni_660x_pci_remove)
488};
489module_comedi_pci_driver(ni_660x_driver, ni_660x_pci_driver);
490
491static int ni_660x_set_pfi_routing(struct comedi_device *dev, unsigned chan,
492 unsigned source);
493
494/* Possible instructions for a GPCT */
495static int ni_660x_GPCT_rinsn(struct comedi_device *dev,
496 struct comedi_subdevice *s,
497 struct comedi_insn *insn, unsigned int *data);
498static int ni_660x_GPCT_insn_config(struct comedi_device *dev,
499 struct comedi_subdevice *s,
500 struct comedi_insn *insn,
501 unsigned int *data);
502static int ni_660x_GPCT_winsn(struct comedi_device *dev,
503 struct comedi_subdevice *s,
504 struct comedi_insn *insn, unsigned int *data);
505
506/* Possible instructions for Digital IO */
507static int ni_660x_dio_insn_config(struct comedi_device *dev,
508 struct comedi_subdevice *s,
509 struct comedi_insn *insn,
510 unsigned int *data);
511static int ni_660x_dio_insn_bits(struct comedi_device *dev,
512 struct comedi_subdevice *s,
513 struct comedi_insn *insn, unsigned int *data);
514
515static inline unsigned ni_660x_num_counters(struct comedi_device *dev) 436static inline unsigned ni_660x_num_counters(struct comedi_device *dev)
516{ 437{
517 return board(dev)->n_chips * counters_per_chip; 438 const struct ni_660x_board *board = comedi_board(dev);
439
440 return board->n_chips * counters_per_chip;
518} 441}
519 442
520static enum NI_660x_Register ni_gpct_to_660x_register(enum ni_gpct_register reg) 443static enum NI_660x_Register ni_gpct_to_660x_register(enum ni_gpct_register reg)
@@ -737,8 +660,9 @@ static inline void ni_660x_write_register(struct comedi_device *dev,
737 unsigned chip_index, unsigned bits, 660 unsigned chip_index, unsigned bits,
738 enum NI_660x_Register reg) 661 enum NI_660x_Register reg)
739{ 662{
663 struct ni_660x_private *devpriv = dev->private;
740 void __iomem *write_address = 664 void __iomem *write_address =
741 private(dev)->mite->daq_io_addr + GPCT_OFFSET[chip_index] + 665 devpriv->mite->daq_io_addr + GPCT_OFFSET[chip_index] +
742 registerData[reg].offset; 666 registerData[reg].offset;
743 667
744 switch (registerData[reg].size) { 668 switch (registerData[reg].size) {
@@ -758,8 +682,9 @@ static inline unsigned ni_660x_read_register(struct comedi_device *dev,
758 unsigned chip_index, 682 unsigned chip_index,
759 enum NI_660x_Register reg) 683 enum NI_660x_Register reg)
760{ 684{
685 struct ni_660x_private *devpriv = dev->private;
761 void __iomem *read_address = 686 void __iomem *read_address =
762 private(dev)->mite->daq_io_addr + GPCT_OFFSET[chip_index] + 687 devpriv->mite->daq_io_addr + GPCT_OFFSET[chip_index] +
763 registerData[reg].offset; 688 registerData[reg].offset;
764 689
765 switch (registerData[reg].size) { 690 switch (registerData[reg].size) {
@@ -806,54 +731,56 @@ static inline void ni_660x_set_dma_channel(struct comedi_device *dev,
806 unsigned mite_channel, 731 unsigned mite_channel,
807 struct ni_gpct *counter) 732 struct ni_gpct *counter)
808{ 733{
734 struct ni_660x_private *devpriv = dev->private;
809 unsigned long flags; 735 unsigned long flags;
810 spin_lock_irqsave(&private(dev)->soft_reg_copy_lock, flags); 736
811 private(dev)->dma_configuration_soft_copies[counter->chip_index] &= 737 spin_lock_irqsave(&devpriv->soft_reg_copy_lock, flags);
738 devpriv->dma_configuration_soft_copies[counter->chip_index] &=
812 ~dma_select_mask(mite_channel); 739 ~dma_select_mask(mite_channel);
813 private(dev)->dma_configuration_soft_copies[counter->chip_index] |= 740 devpriv->dma_configuration_soft_copies[counter->chip_index] |=
814 dma_select_bits(mite_channel, 741 dma_select_bits(mite_channel,
815 dma_selection_counter(counter->counter_index)); 742 dma_selection_counter(counter->counter_index));
816 ni_660x_write_register(dev, counter->chip_index, 743 ni_660x_write_register(dev, counter->chip_index,
817 private(dev)-> 744 devpriv->dma_configuration_soft_copies
818 dma_configuration_soft_copies
819 [counter->chip_index] | 745 [counter->chip_index] |
820 dma_reset_bit(mite_channel), DMAConfigRegister); 746 dma_reset_bit(mite_channel), DMAConfigRegister);
821 mmiowb(); 747 mmiowb();
822 spin_unlock_irqrestore(&private(dev)->soft_reg_copy_lock, flags); 748 spin_unlock_irqrestore(&devpriv->soft_reg_copy_lock, flags);
823} 749}
824 750
825static inline void ni_660x_unset_dma_channel(struct comedi_device *dev, 751static inline void ni_660x_unset_dma_channel(struct comedi_device *dev,
826 unsigned mite_channel, 752 unsigned mite_channel,
827 struct ni_gpct *counter) 753 struct ni_gpct *counter)
828{ 754{
755 struct ni_660x_private *devpriv = dev->private;
829 unsigned long flags; 756 unsigned long flags;
830 spin_lock_irqsave(&private(dev)->soft_reg_copy_lock, flags); 757
831 private(dev)->dma_configuration_soft_copies[counter->chip_index] &= 758 spin_lock_irqsave(&devpriv->soft_reg_copy_lock, flags);
759 devpriv->dma_configuration_soft_copies[counter->chip_index] &=
832 ~dma_select_mask(mite_channel); 760 ~dma_select_mask(mite_channel);
833 private(dev)->dma_configuration_soft_copies[counter->chip_index] |= 761 devpriv->dma_configuration_soft_copies[counter->chip_index] |=
834 dma_select_bits(mite_channel, dma_selection_none); 762 dma_select_bits(mite_channel, dma_selection_none);
835 ni_660x_write_register(dev, counter->chip_index, 763 ni_660x_write_register(dev, counter->chip_index,
836 private(dev)-> 764 devpriv->dma_configuration_soft_copies
837 dma_configuration_soft_copies
838 [counter->chip_index], DMAConfigRegister); 765 [counter->chip_index], DMAConfigRegister);
839 mmiowb(); 766 mmiowb();
840 spin_unlock_irqrestore(&private(dev)->soft_reg_copy_lock, flags); 767 spin_unlock_irqrestore(&devpriv->soft_reg_copy_lock, flags);
841} 768}
842 769
843static int ni_660x_request_mite_channel(struct comedi_device *dev, 770static int ni_660x_request_mite_channel(struct comedi_device *dev,
844 struct ni_gpct *counter, 771 struct ni_gpct *counter,
845 enum comedi_io_direction direction) 772 enum comedi_io_direction direction)
846{ 773{
774 struct ni_660x_private *devpriv = dev->private;
847 unsigned long flags; 775 unsigned long flags;
848 struct mite_channel *mite_chan; 776 struct mite_channel *mite_chan;
849 777
850 spin_lock_irqsave(&private(dev)->mite_channel_lock, flags); 778 spin_lock_irqsave(&devpriv->mite_channel_lock, flags);
851 BUG_ON(counter->mite_chan); 779 BUG_ON(counter->mite_chan);
852 mite_chan = 780 mite_chan = mite_request_channel(devpriv->mite,
853 mite_request_channel(private(dev)->mite, mite_ring(private(dev), 781 mite_ring(devpriv, counter));
854 counter));
855 if (mite_chan == NULL) { 782 if (mite_chan == NULL) {
856 spin_unlock_irqrestore(&private(dev)->mite_channel_lock, flags); 783 spin_unlock_irqrestore(&devpriv->mite_channel_lock, flags);
857 comedi_error(dev, 784 comedi_error(dev,
858 "failed to reserve mite dma channel for counter."); 785 "failed to reserve mite dma channel for counter.");
859 return -EBUSY; 786 return -EBUSY;
@@ -861,16 +788,17 @@ static int ni_660x_request_mite_channel(struct comedi_device *dev,
861 mite_chan->dir = direction; 788 mite_chan->dir = direction;
862 ni_tio_set_mite_channel(counter, mite_chan); 789 ni_tio_set_mite_channel(counter, mite_chan);
863 ni_660x_set_dma_channel(dev, mite_chan->channel, counter); 790 ni_660x_set_dma_channel(dev, mite_chan->channel, counter);
864 spin_unlock_irqrestore(&private(dev)->mite_channel_lock, flags); 791 spin_unlock_irqrestore(&devpriv->mite_channel_lock, flags);
865 return 0; 792 return 0;
866} 793}
867 794
868static void ni_660x_release_mite_channel(struct comedi_device *dev, 795static void ni_660x_release_mite_channel(struct comedi_device *dev,
869 struct ni_gpct *counter) 796 struct ni_gpct *counter)
870{ 797{
798 struct ni_660x_private *devpriv = dev->private;
871 unsigned long flags; 799 unsigned long flags;
872 800
873 spin_lock_irqsave(&private(dev)->mite_channel_lock, flags); 801 spin_lock_irqsave(&devpriv->mite_channel_lock, flags);
874 if (counter->mite_chan) { 802 if (counter->mite_chan) {
875 struct mite_channel *mite_chan = counter->mite_chan; 803 struct mite_channel *mite_chan = counter->mite_chan;
876 804
@@ -878,7 +806,7 @@ static void ni_660x_release_mite_channel(struct comedi_device *dev,
878 ni_tio_set_mite_channel(counter, NULL); 806 ni_tio_set_mite_channel(counter, NULL);
879 mite_release_channel(mite_chan); 807 mite_release_channel(mite_chan);
880 } 808 }
881 spin_unlock_irqrestore(&private(dev)->mite_channel_lock, flags); 809 spin_unlock_irqrestore(&devpriv->mite_channel_lock, flags);
882} 810}
883 811
884static int ni_660x_cmd(struct comedi_device *dev, struct comedi_subdevice *s) 812static int ni_660x_cmd(struct comedi_device *dev, struct comedi_subdevice *s)
@@ -947,6 +875,7 @@ static void ni_660x_handle_gpct_interrupt(struct comedi_device *dev,
947static irqreturn_t ni_660x_interrupt(int irq, void *d) 875static irqreturn_t ni_660x_interrupt(int irq, void *d)
948{ 876{
949 struct comedi_device *dev = d; 877 struct comedi_device *dev = d;
878 struct ni_660x_private *devpriv = dev->private;
950 struct comedi_subdevice *s; 879 struct comedi_subdevice *s;
951 unsigned i; 880 unsigned i;
952 unsigned long flags; 881 unsigned long flags;
@@ -954,24 +883,26 @@ static irqreturn_t ni_660x_interrupt(int irq, void *d)
954 if (dev->attached == 0) 883 if (dev->attached == 0)
955 return IRQ_NONE; 884 return IRQ_NONE;
956 /* lock to avoid race with comedi_poll */ 885 /* lock to avoid race with comedi_poll */
957 spin_lock_irqsave(&private(dev)->interrupt_lock, flags); 886 spin_lock_irqsave(&devpriv->interrupt_lock, flags);
958 smp_mb(); 887 smp_mb();
959 for (i = 0; i < ni_660x_num_counters(dev); ++i) { 888 for (i = 0; i < ni_660x_num_counters(dev); ++i) {
960 s = &dev->subdevices[NI_660X_GPCT_SUBDEV(i)]; 889 s = &dev->subdevices[NI_660X_GPCT_SUBDEV(i)];
961 ni_660x_handle_gpct_interrupt(dev, s); 890 ni_660x_handle_gpct_interrupt(dev, s);
962 } 891 }
963 spin_unlock_irqrestore(&private(dev)->interrupt_lock, flags); 892 spin_unlock_irqrestore(&devpriv->interrupt_lock, flags);
964 return IRQ_HANDLED; 893 return IRQ_HANDLED;
965} 894}
966 895
967static int ni_660x_input_poll(struct comedi_device *dev, 896static int ni_660x_input_poll(struct comedi_device *dev,
968 struct comedi_subdevice *s) 897 struct comedi_subdevice *s)
969{ 898{
899 struct ni_660x_private *devpriv = dev->private;
970 unsigned long flags; 900 unsigned long flags;
901
971 /* lock to avoid race with comedi_poll */ 902 /* lock to avoid race with comedi_poll */
972 spin_lock_irqsave(&private(dev)->interrupt_lock, flags); 903 spin_lock_irqsave(&devpriv->interrupt_lock, flags);
973 mite_sync_input_dma(subdev_to_counter(s)->mite_chan, s->async); 904 mite_sync_input_dma(subdev_to_counter(s)->mite_chan, s->async);
974 spin_unlock_irqrestore(&private(dev)->interrupt_lock, flags); 905 spin_unlock_irqrestore(&devpriv->interrupt_lock, flags);
975 return comedi_buf_read_n_available(s->async); 906 return comedi_buf_read_n_available(s->async);
976} 907}
977 908
@@ -979,9 +910,10 @@ static int ni_660x_buf_change(struct comedi_device *dev,
979 struct comedi_subdevice *s, 910 struct comedi_subdevice *s,
980 unsigned long new_size) 911 unsigned long new_size)
981{ 912{
913 struct ni_660x_private *devpriv = dev->private;
982 int ret; 914 int ret;
983 915
984 ret = mite_buf_change(mite_ring(private(dev), subdev_to_counter(s)), 916 ret = mite_buf_change(mite_ring(devpriv, subdev_to_counter(s)),
985 s->async); 917 s->async);
986 if (ret < 0) 918 if (ret < 0)
987 return ret; 919 return ret;
@@ -991,32 +923,35 @@ static int ni_660x_buf_change(struct comedi_device *dev,
991 923
992static int ni_660x_allocate_private(struct comedi_device *dev) 924static int ni_660x_allocate_private(struct comedi_device *dev)
993{ 925{
994 int retval; 926 struct ni_660x_private *devpriv;
995 unsigned i; 927 unsigned i;
996 928
997 retval = alloc_private(dev, sizeof(struct ni_660x_private)); 929 devpriv = kzalloc(sizeof(*devpriv), GFP_KERNEL);
998 if (retval < 0) 930 if (!devpriv)
999 return retval; 931 return -ENOMEM;
932 dev->private = devpriv;
1000 933
1001 spin_lock_init(&private(dev)->mite_channel_lock); 934 spin_lock_init(&devpriv->mite_channel_lock);
1002 spin_lock_init(&private(dev)->interrupt_lock); 935 spin_lock_init(&devpriv->interrupt_lock);
1003 spin_lock_init(&private(dev)->soft_reg_copy_lock); 936 spin_lock_init(&devpriv->soft_reg_copy_lock);
1004 for (i = 0; i < NUM_PFI_CHANNELS; ++i) 937 for (i = 0; i < NUM_PFI_CHANNELS; ++i)
1005 private(dev)->pfi_output_selects[i] = pfi_output_select_counter; 938 devpriv->pfi_output_selects[i] = pfi_output_select_counter;
1006 939
1007 return 0; 940 return 0;
1008} 941}
1009 942
1010static int ni_660x_alloc_mite_rings(struct comedi_device *dev) 943static int ni_660x_alloc_mite_rings(struct comedi_device *dev)
1011{ 944{
945 const struct ni_660x_board *board = comedi_board(dev);
946 struct ni_660x_private *devpriv = dev->private;
1012 unsigned i; 947 unsigned i;
1013 unsigned j; 948 unsigned j;
1014 949
1015 for (i = 0; i < board(dev)->n_chips; ++i) { 950 for (i = 0; i < board->n_chips; ++i) {
1016 for (j = 0; j < counters_per_chip; ++j) { 951 for (j = 0; j < counters_per_chip; ++j) {
1017 private(dev)->mite_rings[i][j] = 952 devpriv->mite_rings[i][j] =
1018 mite_alloc_ring(private(dev)->mite); 953 mite_alloc_ring(devpriv->mite);
1019 if (private(dev)->mite_rings[i][j] == NULL) 954 if (devpriv->mite_rings[i][j] == NULL)
1020 return -ENOMEM; 955 return -ENOMEM;
1021 } 956 }
1022 } 957 }
@@ -1025,12 +960,14 @@ static int ni_660x_alloc_mite_rings(struct comedi_device *dev)
1025 960
1026static void ni_660x_free_mite_rings(struct comedi_device *dev) 961static void ni_660x_free_mite_rings(struct comedi_device *dev)
1027{ 962{
963 const struct ni_660x_board *board = comedi_board(dev);
964 struct ni_660x_private *devpriv = dev->private;
1028 unsigned i; 965 unsigned i;
1029 unsigned j; 966 unsigned j;
1030 967
1031 for (i = 0; i < board(dev)->n_chips; ++i) { 968 for (i = 0; i < board->n_chips; ++i) {
1032 for (j = 0; j < counters_per_chip; ++j) 969 for (j = 0; j < counters_per_chip; ++j)
1033 mite_free_ring(private(dev)->mite_rings[i][j]); 970 mite_free_ring(devpriv->mite_rings[i][j]);
1034 } 971 }
1035} 972}
1036 973
@@ -1048,145 +985,6 @@ ni_660x_find_boardinfo(struct pci_dev *pcidev)
1048 return NULL; 985 return NULL;
1049} 986}
1050 987
1051static int __devinit ni_660x_attach_pci(struct comedi_device *dev,
1052 struct pci_dev *pcidev)
1053{
1054 struct comedi_subdevice *s;
1055 int ret;
1056 unsigned i;
1057 unsigned global_interrupt_config_bits;
1058
1059 ret = ni_660x_allocate_private(dev);
1060 if (ret < 0)
1061 return ret;
1062 dev->board_ptr = ni_660x_find_boardinfo(pcidev);
1063 if (!dev->board_ptr)
1064 return -ENODEV;
1065 private(dev)->mite = mite_alloc(pcidev);
1066 if (!private(dev)->mite)
1067 return -ENOMEM;
1068
1069 dev->board_name = board(dev)->name;
1070
1071 ret = mite_setup2(private(dev)->mite, 1);
1072 if (ret < 0) {
1073 dev_warn(dev->class_dev, "error setting up mite\n");
1074 return ret;
1075 }
1076 comedi_set_hw_dev(dev, &private(dev)->mite->pcidev->dev);
1077 ret = ni_660x_alloc_mite_rings(dev);
1078 if (ret < 0)
1079 return ret;
1080
1081 ret = comedi_alloc_subdevices(dev, 2 + NI_660X_MAX_NUM_COUNTERS);
1082 if (ret)
1083 return ret;
1084
1085 s = &dev->subdevices[0];
1086 /* Old GENERAL-PURPOSE COUNTER/TIME (GPCT) subdevice, no longer used */
1087 s->type = COMEDI_SUBD_UNUSED;
1088
1089 s = &dev->subdevices[NI_660X_DIO_SUBDEV];
1090 /* DIGITAL I/O SUBDEVICE */
1091 s->type = COMEDI_SUBD_DIO;
1092 s->subdev_flags = SDF_READABLE | SDF_WRITABLE;
1093 s->n_chan = NUM_PFI_CHANNELS;
1094 s->maxdata = 1;
1095 s->range_table = &range_digital;
1096 s->insn_bits = ni_660x_dio_insn_bits;
1097 s->insn_config = ni_660x_dio_insn_config;
1098 s->io_bits = 0; /* all bits default to input */
1099 /* we use the ioconfig registers to control dio direction, so zero
1100 output enables in stc dio control reg */
1101 ni_660x_write_register(dev, 0, 0, STCDIOControl);
1102
1103 private(dev)->counter_dev = ni_gpct_device_construct(dev,
1104 &ni_gpct_write_register,
1105 &ni_gpct_read_register,
1106 ni_gpct_variant_660x,
1107 ni_660x_num_counters
1108 (dev));
1109 if (private(dev)->counter_dev == NULL)
1110 return -ENOMEM;
1111 for (i = 0; i < NI_660X_MAX_NUM_COUNTERS; ++i) {
1112 s = &dev->subdevices[NI_660X_GPCT_SUBDEV(i)];
1113 if (i < ni_660x_num_counters(dev)) {
1114 s->type = COMEDI_SUBD_COUNTER;
1115 s->subdev_flags =
1116 SDF_READABLE | SDF_WRITABLE | SDF_LSAMPL |
1117 SDF_CMD_READ /* | SDF_CMD_WRITE */ ;
1118 s->n_chan = 3;
1119 s->maxdata = 0xffffffff;
1120 s->insn_read = ni_660x_GPCT_rinsn;
1121 s->insn_write = ni_660x_GPCT_winsn;
1122 s->insn_config = ni_660x_GPCT_insn_config;
1123 s->do_cmd = &ni_660x_cmd;
1124 s->len_chanlist = 1;
1125 s->do_cmdtest = &ni_660x_cmdtest;
1126 s->cancel = &ni_660x_cancel;
1127 s->poll = &ni_660x_input_poll;
1128 s->async_dma_dir = DMA_BIDIRECTIONAL;
1129 s->buf_change = &ni_660x_buf_change;
1130 s->private = &private(dev)->counter_dev->counters[i];
1131
1132 private(dev)->counter_dev->counters[i].chip_index =
1133 i / counters_per_chip;
1134 private(dev)->counter_dev->counters[i].counter_index =
1135 i % counters_per_chip;
1136 } else {
1137 s->type = COMEDI_SUBD_UNUSED;
1138 }
1139 }
1140 for (i = 0; i < board(dev)->n_chips; ++i)
1141 init_tio_chip(dev, i);
1142
1143 for (i = 0; i < ni_660x_num_counters(dev); ++i)
1144 ni_tio_init_counter(&private(dev)->counter_dev->counters[i]);
1145
1146 for (i = 0; i < NUM_PFI_CHANNELS; ++i) {
1147 if (i < min_counter_pfi_chan)
1148 ni_660x_set_pfi_routing(dev, i, pfi_output_select_do);
1149 else
1150 ni_660x_set_pfi_routing(dev, i,
1151 pfi_output_select_counter);
1152 ni_660x_select_pfi_output(dev, i, pfi_output_select_high_Z);
1153 }
1154 /* to be safe, set counterswap bits on tio chips after all the counter
1155 outputs have been set to high impedance mode */
1156 for (i = 0; i < board(dev)->n_chips; ++i)
1157 set_tio_counterswap(dev, i);
1158
1159 ret = request_irq(mite_irq(private(dev)->mite), ni_660x_interrupt,
1160 IRQF_SHARED, "ni_660x", dev);
1161 if (ret < 0) {
1162 dev_warn(dev->class_dev, " irq not available\n");
1163 return ret;
1164 }
1165 dev->irq = mite_irq(private(dev)->mite);
1166 global_interrupt_config_bits = Global_Int_Enable_Bit;
1167 if (board(dev)->n_chips > 1)
1168 global_interrupt_config_bits |= Cascade_Int_Enable_Bit;
1169 ni_660x_write_register(dev, 0, global_interrupt_config_bits,
1170 GlobalInterruptConfigRegister);
1171 dev_info(dev->class_dev, "ni_660x: %s attached\n", dev->board_name);
1172 return 0;
1173}
1174
1175static void ni_660x_detach(struct comedi_device *dev)
1176{
1177 if (dev->irq)
1178 free_irq(dev->irq, dev);
1179 if (dev->private) {
1180 if (private(dev)->counter_dev)
1181 ni_gpct_device_destroy(private(dev)->counter_dev);
1182 if (private(dev)->mite) {
1183 ni_660x_free_mite_rings(dev);
1184 mite_unsetup(private(dev)->mite);
1185 mite_free(private(dev)->mite);
1186 }
1187 }
1188}
1189
1190static int 988static int
1191ni_660x_GPCT_rinsn(struct comedi_device *dev, struct comedi_subdevice *s, 989ni_660x_GPCT_rinsn(struct comedi_device *dev, struct comedi_subdevice *s,
1192 struct comedi_insn *insn, unsigned int *data) 990 struct comedi_insn *insn, unsigned int *data)
@@ -1196,17 +994,17 @@ ni_660x_GPCT_rinsn(struct comedi_device *dev, struct comedi_subdevice *s,
1196 994
1197static void init_tio_chip(struct comedi_device *dev, int chipset) 995static void init_tio_chip(struct comedi_device *dev, int chipset)
1198{ 996{
997 struct ni_660x_private *devpriv = dev->private;
1199 unsigned i; 998 unsigned i;
1200 999
1201 /* init dma configuration register */ 1000 /* init dma configuration register */
1202 private(dev)->dma_configuration_soft_copies[chipset] = 0; 1001 devpriv->dma_configuration_soft_copies[chipset] = 0;
1203 for (i = 0; i < MAX_DMA_CHANNEL; ++i) { 1002 for (i = 0; i < MAX_DMA_CHANNEL; ++i) {
1204 private(dev)->dma_configuration_soft_copies[chipset] |= 1003 devpriv->dma_configuration_soft_copies[chipset] |=
1205 dma_select_bits(i, dma_selection_none) & dma_select_mask(i); 1004 dma_select_bits(i, dma_selection_none) & dma_select_mask(i);
1206 } 1005 }
1207 ni_660x_write_register(dev, chipset, 1006 ni_660x_write_register(dev, chipset,
1208 private(dev)-> 1007 devpriv->dma_configuration_soft_copies[chipset],
1209 dma_configuration_soft_copies[chipset],
1210 DMAConfigRegister); 1008 DMAConfigRegister);
1211 for (i = 0; i < NUM_PFI_CHANNELS; ++i) 1009 for (i = 0; i < NUM_PFI_CHANNELS; ++i)
1212 ni_660x_write_register(dev, chipset, 0, IOConfigReg(i)); 1010 ni_660x_write_register(dev, chipset, 0, IOConfigReg(i));
@@ -1251,6 +1049,7 @@ static void ni_660x_select_pfi_output(struct comedi_device *dev,
1251 unsigned pfi_channel, 1049 unsigned pfi_channel,
1252 unsigned output_select) 1050 unsigned output_select)
1253{ 1051{
1052 const struct ni_660x_board *board = comedi_board(dev);
1254 static const unsigned counter_4_7_first_pfi = 8; 1053 static const unsigned counter_4_7_first_pfi = 8;
1255 static const unsigned counter_4_7_last_pfi = 23; 1054 static const unsigned counter_4_7_last_pfi = 23;
1256 unsigned active_chipset = 0; 1055 unsigned active_chipset = 0;
@@ -1258,7 +1057,7 @@ static void ni_660x_select_pfi_output(struct comedi_device *dev,
1258 unsigned active_bits; 1057 unsigned active_bits;
1259 unsigned idle_bits; 1058 unsigned idle_bits;
1260 1059
1261 if (board(dev)->n_chips > 1) { 1060 if (board->n_chips > 1) {
1262 if (output_select == pfi_output_select_counter && 1061 if (output_select == pfi_output_select_counter &&
1263 pfi_channel >= counter_4_7_first_pfi && 1062 pfi_channel >= counter_4_7_first_pfi &&
1264 pfi_channel <= counter_4_7_last_pfi) { 1063 pfi_channel <= counter_4_7_last_pfi) {
@@ -1294,6 +1093,8 @@ static void ni_660x_select_pfi_output(struct comedi_device *dev,
1294static int ni_660x_set_pfi_routing(struct comedi_device *dev, unsigned chan, 1093static int ni_660x_set_pfi_routing(struct comedi_device *dev, unsigned chan,
1295 unsigned source) 1094 unsigned source)
1296{ 1095{
1096 struct ni_660x_private *devpriv = dev->private;
1097
1297 if (source > num_pfi_output_selects) 1098 if (source > num_pfi_output_selects)
1298 return -EINVAL; 1099 return -EINVAL;
1299 if (source == pfi_output_select_high_Z) 1100 if (source == pfi_output_select_high_Z)
@@ -1305,76 +1106,249 @@ static int ni_660x_set_pfi_routing(struct comedi_device *dev, unsigned chan,
1305 if (source == pfi_output_select_do) 1106 if (source == pfi_output_select_do)
1306 return -EINVAL; 1107 return -EINVAL;
1307 } 1108 }
1308 BUG_ON(chan >= NUM_PFI_CHANNELS);
1309 1109
1310 private(dev)->pfi_output_selects[chan] = source; 1110 devpriv->pfi_output_selects[chan] = source;
1311 if (private(dev)->pfi_direction_bits & (((uint64_t) 1) << chan)) 1111 if (devpriv->pfi_direction_bits & (((uint64_t) 1) << chan))
1312 ni_660x_select_pfi_output(dev, chan, 1112 ni_660x_select_pfi_output(dev, chan,
1313 private(dev)-> 1113 devpriv->pfi_output_selects[chan]);
1314 pfi_output_selects[chan]);
1315 return 0; 1114 return 0;
1316} 1115}
1317 1116
1318static unsigned ni_660x_get_pfi_routing(struct comedi_device *dev,
1319 unsigned chan)
1320{
1321 BUG_ON(chan >= NUM_PFI_CHANNELS);
1322 return private(dev)->pfi_output_selects[chan];
1323}
1324
1325static void ni660x_config_filter(struct comedi_device *dev,
1326 unsigned pfi_channel,
1327 enum ni_gpct_filter_select filter)
1328{
1329 unsigned bits = ni_660x_read_register(dev, 0, IOConfigReg(pfi_channel));
1330 bits &= ~pfi_input_select_mask(pfi_channel);
1331 bits |= pfi_input_select_bits(pfi_channel, filter);
1332 ni_660x_write_register(dev, 0, bits, IOConfigReg(pfi_channel));
1333}
1334
1335static int ni_660x_dio_insn_config(struct comedi_device *dev, 1117static int ni_660x_dio_insn_config(struct comedi_device *dev,
1336 struct comedi_subdevice *s, 1118 struct comedi_subdevice *s,
1337 struct comedi_insn *insn, unsigned int *data) 1119 struct comedi_insn *insn,
1120 unsigned int *data)
1338{ 1121{
1339 int chan = CR_CHAN(insn->chanspec); 1122 struct ni_660x_private *devpriv = dev->private;
1340 1123 unsigned int chan = CR_CHAN(insn->chanspec);
1341 /* The input or output configuration of each digital line is 1124 uint64_t bit = 1ULL << chan;
1342 * configured by a special insn_config instruction. chanspec 1125 unsigned int val;
1343 * contains the channel to be changed, and data[0] contains the 1126 int ret;
1344 * value COMEDI_INPUT or COMEDI_OUTPUT. */
1345 1127
1346 switch (data[0]) { 1128 switch (data[0]) {
1347 case INSN_CONFIG_DIO_OUTPUT: 1129 case INSN_CONFIG_DIO_OUTPUT:
1348 private(dev)->pfi_direction_bits |= ((uint64_t) 1) << chan; 1130 devpriv->pfi_direction_bits |= bit;
1349 ni_660x_select_pfi_output(dev, chan, 1131 ni_660x_select_pfi_output(dev, chan,
1350 private(dev)-> 1132 devpriv->pfi_output_selects[chan]);
1351 pfi_output_selects[chan]);
1352 break; 1133 break;
1134
1353 case INSN_CONFIG_DIO_INPUT: 1135 case INSN_CONFIG_DIO_INPUT:
1354 private(dev)->pfi_direction_bits &= ~(((uint64_t) 1) << chan); 1136 devpriv->pfi_direction_bits &= ~bit;
1355 ni_660x_select_pfi_output(dev, chan, pfi_output_select_high_Z); 1137 ni_660x_select_pfi_output(dev, chan, pfi_output_select_high_Z);
1356 break; 1138 break;
1139
1357 case INSN_CONFIG_DIO_QUERY: 1140 case INSN_CONFIG_DIO_QUERY:
1358 data[1] = 1141 data[1] = (devpriv->pfi_direction_bits & bit) ? COMEDI_OUTPUT
1359 (private(dev)->pfi_direction_bits & 1142 : COMEDI_INPUT;
1360 (((uint64_t) 1) << chan)) ? COMEDI_OUTPUT : COMEDI_INPUT; 1143 break;
1361 return 0; 1144
1362 case INSN_CONFIG_SET_ROUTING: 1145 case INSN_CONFIG_SET_ROUTING:
1363 return ni_660x_set_pfi_routing(dev, chan, data[1]); 1146 ret = ni_660x_set_pfi_routing(dev, chan, data[1]);
1147 if (ret)
1148 return ret;
1364 break; 1149 break;
1150
1365 case INSN_CONFIG_GET_ROUTING: 1151 case INSN_CONFIG_GET_ROUTING:
1366 data[1] = ni_660x_get_pfi_routing(dev, chan); 1152 data[1] = devpriv->pfi_output_selects[chan];
1367 break; 1153 break;
1154
1368 case INSN_CONFIG_FILTER: 1155 case INSN_CONFIG_FILTER:
1369 ni660x_config_filter(dev, chan, data[1]); 1156 val = ni_660x_read_register(dev, 0, IOConfigReg(chan));
1157 val &= ~pfi_input_select_mask(chan);
1158 val |= pfi_input_select_bits(chan, data[1]);
1159 ni_660x_write_register(dev, 0, val, IOConfigReg(chan));
1370 break; 1160 break;
1161
1371 default: 1162 default:
1372 return -EINVAL; 1163 return -EINVAL;
1373 break;
1374 } 1164 }
1165
1166 return insn->n;
1167}
1168
1169static int ni_660x_auto_attach(struct comedi_device *dev,
1170 unsigned long context_unused)
1171{
1172 struct pci_dev *pcidev = comedi_to_pci_dev(dev);
1173 const struct ni_660x_board *board;
1174 struct ni_660x_private *devpriv;
1175 struct comedi_subdevice *s;
1176 int ret;
1177 unsigned i;
1178 unsigned global_interrupt_config_bits;
1179
1180 ret = ni_660x_allocate_private(dev);
1181 if (ret < 0)
1182 return ret;
1183 devpriv = dev->private;
1184
1185 dev->board_ptr = ni_660x_find_boardinfo(pcidev);
1186 if (!dev->board_ptr)
1187 return -ENODEV;
1188 board = comedi_board(dev);
1189
1190 devpriv->mite = mite_alloc(pcidev);
1191 if (!devpriv->mite)
1192 return -ENOMEM;
1193
1194 dev->board_name = board->name;
1195
1196 ret = mite_setup2(devpriv->mite, 1);
1197 if (ret < 0) {
1198 dev_warn(dev->class_dev, "error setting up mite\n");
1199 return ret;
1200 }
1201
1202 ret = ni_660x_alloc_mite_rings(dev);
1203 if (ret < 0)
1204 return ret;
1205
1206 ret = comedi_alloc_subdevices(dev, 2 + NI_660X_MAX_NUM_COUNTERS);
1207 if (ret)
1208 return ret;
1209
1210 s = &dev->subdevices[0];
1211 /* Old GENERAL-PURPOSE COUNTER/TIME (GPCT) subdevice, no longer used */
1212 s->type = COMEDI_SUBD_UNUSED;
1213
1214 s = &dev->subdevices[NI_660X_DIO_SUBDEV];
1215 /* DIGITAL I/O SUBDEVICE */
1216 s->type = COMEDI_SUBD_DIO;
1217 s->subdev_flags = SDF_READABLE | SDF_WRITABLE;
1218 s->n_chan = NUM_PFI_CHANNELS;
1219 s->maxdata = 1;
1220 s->range_table = &range_digital;
1221 s->insn_bits = ni_660x_dio_insn_bits;
1222 s->insn_config = ni_660x_dio_insn_config;
1223 s->io_bits = 0; /* all bits default to input */
1224 /* we use the ioconfig registers to control dio direction, so zero
1225 output enables in stc dio control reg */
1226 ni_660x_write_register(dev, 0, 0, STCDIOControl);
1227
1228 devpriv->counter_dev = ni_gpct_device_construct(dev,
1229 &ni_gpct_write_register,
1230 &ni_gpct_read_register,
1231 ni_gpct_variant_660x,
1232 ni_660x_num_counters
1233 (dev));
1234 if (devpriv->counter_dev == NULL)
1235 return -ENOMEM;
1236 for (i = 0; i < NI_660X_MAX_NUM_COUNTERS; ++i) {
1237 s = &dev->subdevices[NI_660X_GPCT_SUBDEV(i)];
1238 if (i < ni_660x_num_counters(dev)) {
1239 s->type = COMEDI_SUBD_COUNTER;
1240 s->subdev_flags =
1241 SDF_READABLE | SDF_WRITABLE | SDF_LSAMPL |
1242 SDF_CMD_READ /* | SDF_CMD_WRITE */ ;
1243 s->n_chan = 3;
1244 s->maxdata = 0xffffffff;
1245 s->insn_read = ni_660x_GPCT_rinsn;
1246 s->insn_write = ni_660x_GPCT_winsn;
1247 s->insn_config = ni_660x_GPCT_insn_config;
1248 s->do_cmd = &ni_660x_cmd;
1249 s->len_chanlist = 1;
1250 s->do_cmdtest = &ni_660x_cmdtest;
1251 s->cancel = &ni_660x_cancel;
1252 s->poll = &ni_660x_input_poll;
1253 s->async_dma_dir = DMA_BIDIRECTIONAL;
1254 s->buf_change = &ni_660x_buf_change;
1255 s->private = &devpriv->counter_dev->counters[i];
1256
1257 devpriv->counter_dev->counters[i].chip_index =
1258 i / counters_per_chip;
1259 devpriv->counter_dev->counters[i].counter_index =
1260 i % counters_per_chip;
1261 } else {
1262 s->type = COMEDI_SUBD_UNUSED;
1263 }
1264 }
1265 for (i = 0; i < board->n_chips; ++i)
1266 init_tio_chip(dev, i);
1267
1268 for (i = 0; i < ni_660x_num_counters(dev); ++i)
1269 ni_tio_init_counter(&devpriv->counter_dev->counters[i]);
1270
1271 for (i = 0; i < NUM_PFI_CHANNELS; ++i) {
1272 if (i < min_counter_pfi_chan)
1273 ni_660x_set_pfi_routing(dev, i, pfi_output_select_do);
1274 else
1275 ni_660x_set_pfi_routing(dev, i,
1276 pfi_output_select_counter);
1277 ni_660x_select_pfi_output(dev, i, pfi_output_select_high_Z);
1278 }
1279 /* to be safe, set counterswap bits on tio chips after all the counter
1280 outputs have been set to high impedance mode */
1281 for (i = 0; i < board->n_chips; ++i)
1282 set_tio_counterswap(dev, i);
1283
1284 ret = request_irq(mite_irq(devpriv->mite), ni_660x_interrupt,
1285 IRQF_SHARED, "ni_660x", dev);
1286 if (ret < 0) {
1287 dev_warn(dev->class_dev, " irq not available\n");
1288 return ret;
1289 }
1290 dev->irq = mite_irq(devpriv->mite);
1291 global_interrupt_config_bits = Global_Int_Enable_Bit;
1292 if (board->n_chips > 1)
1293 global_interrupt_config_bits |= Cascade_Int_Enable_Bit;
1294 ni_660x_write_register(dev, 0, global_interrupt_config_bits,
1295 GlobalInterruptConfigRegister);
1296 dev_info(dev->class_dev, "ni_660x: %s attached\n", dev->board_name);
1375 return 0; 1297 return 0;
1376} 1298}
1377 1299
1300static void ni_660x_detach(struct comedi_device *dev)
1301{
1302 struct ni_660x_private *devpriv = dev->private;
1303
1304 if (dev->irq)
1305 free_irq(dev->irq, dev);
1306 if (devpriv) {
1307 if (devpriv->counter_dev)
1308 ni_gpct_device_destroy(devpriv->counter_dev);
1309 if (devpriv->mite) {
1310 ni_660x_free_mite_rings(dev);
1311 mite_unsetup(devpriv->mite);
1312 mite_free(devpriv->mite);
1313 }
1314 }
1315}
1316
1317static struct comedi_driver ni_660x_driver = {
1318 .driver_name = "ni_660x",
1319 .module = THIS_MODULE,
1320 .auto_attach = ni_660x_auto_attach,
1321 .detach = ni_660x_detach,
1322};
1323
1324static int ni_660x_pci_probe(struct pci_dev *dev,
1325 const struct pci_device_id *ent)
1326{
1327 return comedi_pci_auto_config(dev, &ni_660x_driver);
1328}
1329
1330static void ni_660x_pci_remove(struct pci_dev *dev)
1331{
1332 comedi_pci_auto_unconfig(dev);
1333}
1334
1335static DEFINE_PCI_DEVICE_TABLE(ni_660x_pci_table) = {
1336 {PCI_DEVICE(PCI_VENDOR_ID_NI, 0x2c60)},
1337 {PCI_DEVICE(PCI_VENDOR_ID_NI, 0x1310)},
1338 {PCI_DEVICE(PCI_VENDOR_ID_NI, 0x1360)},
1339 {PCI_DEVICE(PCI_VENDOR_ID_NI, 0x2cc0)},
1340 {0}
1341};
1342MODULE_DEVICE_TABLE(pci, ni_660x_pci_table);
1343
1344static struct pci_driver ni_660x_pci_driver = {
1345 .name = "ni_660x",
1346 .id_table = ni_660x_pci_table,
1347 .probe = ni_660x_pci_probe,
1348 .remove = ni_660x_pci_remove,
1349};
1350module_comedi_pci_driver(ni_660x_driver, ni_660x_pci_driver);
1351
1378MODULE_AUTHOR("Comedi http://www.comedi.org"); 1352MODULE_AUTHOR("Comedi http://www.comedi.org");
1379MODULE_DESCRIPTION("Comedi low-level driver"); 1353MODULE_DESCRIPTION("Comedi low-level driver");
1380MODULE_LICENSE("GPL"); 1354MODULE_LICENSE("GPL");
diff --git a/drivers/staging/comedi/drivers/ni_670x.c b/drivers/staging/comedi/drivers/ni_670x.c
index eac6dc047bb0..272caeb6ecee 100644
--- a/drivers/staging/comedi/drivers/ni_670x.c
+++ b/drivers/staging/comedi/drivers/ni_670x.c
@@ -201,19 +201,21 @@ ni_670x_find_boardinfo(struct pci_dev *pcidev)
201 return NULL; 201 return NULL;
202} 202}
203 203
204static int __devinit ni_670x_attach_pci(struct comedi_device *dev, 204static int ni_670x_auto_attach(struct comedi_device *dev,
205 struct pci_dev *pcidev) 205 unsigned long context_unused)
206{ 206{
207 struct pci_dev *pcidev = comedi_to_pci_dev(dev);
207 const struct ni_670x_board *thisboard; 208 const struct ni_670x_board *thisboard;
208 struct ni_670x_private *devpriv; 209 struct ni_670x_private *devpriv;
209 struct comedi_subdevice *s; 210 struct comedi_subdevice *s;
210 int ret; 211 int ret;
211 int i; 212 int i;
212 213
213 ret = alloc_private(dev, sizeof(*devpriv)); 214 devpriv = kzalloc(sizeof(*devpriv), GFP_KERNEL);
214 if (ret < 0) 215 if (!devpriv)
215 return ret; 216 return -ENOMEM;
216 devpriv = dev->private; 217 dev->private = devpriv;
218
217 dev->board_ptr = ni_670x_find_boardinfo(pcidev); 219 dev->board_ptr = ni_670x_find_boardinfo(pcidev);
218 if (!dev->board_ptr) 220 if (!dev->board_ptr)
219 return -ENODEV; 221 return -ENODEV;
@@ -297,17 +299,17 @@ static void ni_670x_detach(struct comedi_device *dev)
297static struct comedi_driver ni_670x_driver = { 299static struct comedi_driver ni_670x_driver = {
298 .driver_name = "ni_670x", 300 .driver_name = "ni_670x",
299 .module = THIS_MODULE, 301 .module = THIS_MODULE,
300 .attach_pci = ni_670x_attach_pci, 302 .auto_attach = ni_670x_auto_attach,
301 .detach = ni_670x_detach, 303 .detach = ni_670x_detach,
302}; 304};
303 305
304static int __devinit ni_670x_pci_probe(struct pci_dev *dev, 306static int ni_670x_pci_probe(struct pci_dev *dev,
305 const struct pci_device_id *ent) 307 const struct pci_device_id *ent)
306{ 308{
307 return comedi_pci_auto_config(dev, &ni_670x_driver); 309 return comedi_pci_auto_config(dev, &ni_670x_driver);
308} 310}
309 311
310static void __devexit ni_670x_pci_remove(struct pci_dev *dev) 312static void ni_670x_pci_remove(struct pci_dev *dev)
311{ 313{
312 comedi_pci_auto_unconfig(dev); 314 comedi_pci_auto_unconfig(dev);
313} 315}
@@ -320,10 +322,10 @@ static DEFINE_PCI_DEVICE_TABLE(ni_670x_pci_table) = {
320MODULE_DEVICE_TABLE(pci, ni_670x_pci_table); 322MODULE_DEVICE_TABLE(pci, ni_670x_pci_table);
321 323
322static struct pci_driver ni_670x_pci_driver = { 324static struct pci_driver ni_670x_pci_driver = {
323 .name ="ni_670x", 325 .name = "ni_670x",
324 .id_table = ni_670x_pci_table, 326 .id_table = ni_670x_pci_table,
325 .probe = ni_670x_pci_probe, 327 .probe = ni_670x_pci_probe,
326 .remove = __devexit_p(ni_670x_pci_remove), 328 .remove = ni_670x_pci_remove,
327}; 329};
328module_comedi_pci_driver(ni_670x_driver, ni_670x_pci_driver); 330module_comedi_pci_driver(ni_670x_driver, ni_670x_pci_driver);
329 331
diff --git a/drivers/staging/comedi/drivers/ni_at_a2150.c b/drivers/staging/comedi/drivers/ni_at_a2150.c
index 83950807b672..06de25bb2f56 100644
--- a/drivers/staging/comedi/drivers/ni_at_a2150.c
+++ b/drivers/staging/comedi/drivers/ni_at_a2150.c
@@ -169,8 +169,6 @@ struct a2150_private {
169 int config_bits; /* config register bits */ 169 int config_bits; /* config register bits */
170}; 170};
171 171
172#define devpriv ((struct a2150_private *)dev->private)
173
174static int a2150_cancel(struct comedi_device *dev, struct comedi_subdevice *s); 172static int a2150_cancel(struct comedi_device *dev, struct comedi_subdevice *s);
175 173
176static int a2150_get_timing(struct comedi_device *dev, unsigned int *period, 174static int a2150_get_timing(struct comedi_device *dev, unsigned int *period,
@@ -182,6 +180,8 @@ static int a2150_set_chanlist(struct comedi_device *dev,
182 180
183static void ni_dump_regs(struct comedi_device *dev) 181static void ni_dump_regs(struct comedi_device *dev)
184{ 182{
183 struct a2150_private *devpriv = dev->private;
184
185 printk("config bits 0x%x\n", devpriv->config_bits); 185 printk("config bits 0x%x\n", devpriv->config_bits);
186 printk("irq dma bits 0x%x\n", devpriv->irq_dma_bits); 186 printk("irq dma bits 0x%x\n", devpriv->irq_dma_bits);
187 printk("status bits 0x%x\n", inw(dev->iobase + STATUS_REG)); 187 printk("status bits 0x%x\n", inw(dev->iobase + STATUS_REG));
@@ -196,6 +196,7 @@ static irqreturn_t a2150_interrupt(int irq, void *d)
196 int status; 196 int status;
197 unsigned long flags; 197 unsigned long flags;
198 struct comedi_device *dev = d; 198 struct comedi_device *dev = d;
199 struct a2150_private *devpriv = dev->private;
199 struct comedi_subdevice *s = dev->read_subdev; 200 struct comedi_subdevice *s = dev->read_subdev;
200 struct comedi_async *async; 201 struct comedi_async *async;
201 struct comedi_cmd *cmd; 202 struct comedi_cmd *cmd;
@@ -300,6 +301,8 @@ static irqreturn_t a2150_interrupt(int irq, void *d)
300 301
301static int a2150_cancel(struct comedi_device *dev, struct comedi_subdevice *s) 302static int a2150_cancel(struct comedi_device *dev, struct comedi_subdevice *s)
302{ 303{
304 struct a2150_private *devpriv = dev->private;
305
303 /* disable dma on card */ 306 /* disable dma on card */
304 devpriv->irq_dma_bits &= ~DMA_INTR_EN_BIT & ~DMA_EN_BIT; 307 devpriv->irq_dma_bits &= ~DMA_INTR_EN_BIT & ~DMA_EN_BIT;
305 outw(devpriv->irq_dma_bits, dev->iobase + IRQ_DMA_CNTRL_REG); 308 outw(devpriv->irq_dma_bits, dev->iobase + IRQ_DMA_CNTRL_REG);
@@ -342,37 +345,21 @@ static int a2150_ai_cmdtest(struct comedi_device *dev,
342 if (err) 345 if (err)
343 return 2; 346 return 2;
344 347
345 /* step 3: make sure arguments are trivially compatible */ 348 /* Step 3: check if arguments are trivially valid */
346 349
347 if (cmd->start_arg != 0) { 350 err |= cfc_check_trigger_arg_is(&cmd->start_arg, 0);
348 cmd->start_arg = 0; 351
349 err++; 352 if (cmd->convert_src == TRIG_TIMER)
350 } 353 err |= cfc_check_trigger_arg_min(&cmd->convert_arg,
351 if (cmd->convert_src == TRIG_TIMER) { 354 thisboard->ai_speed);
352 if (cmd->convert_arg < thisboard->ai_speed) { 355
353 cmd->convert_arg = thisboard->ai_speed; 356 err |= cfc_check_trigger_arg_min(&cmd->chanlist_len, 1);
354 err++; 357 err |= cfc_check_trigger_arg_is(&cmd->scan_end_arg, cmd->chanlist_len);
355 } 358
356 } 359 if (cmd->stop_src == TRIG_COUNT)
357 if (!cmd->chanlist_len) { 360 err |= cfc_check_trigger_arg_min(&cmd->stop_arg, 1);
358 cmd->chanlist_len = 1; 361 else /* TRIG_NONE */
359 err++; 362 err |= cfc_check_trigger_arg_is(&cmd->stop_arg, 0);
360 }
361 if (cmd->scan_end_arg != cmd->chanlist_len) {
362 cmd->scan_end_arg = cmd->chanlist_len;
363 err++;
364 }
365 if (cmd->stop_src == TRIG_COUNT) {
366 if (!cmd->stop_arg) {
367 cmd->stop_arg = 1;
368 err++;
369 }
370 } else { /* TRIG_NONE */
371 if (cmd->stop_arg != 0) {
372 cmd->stop_arg = 0;
373 err++;
374 }
375 }
376 363
377 if (err) 364 if (err)
378 return 3; 365 return 3;
@@ -425,6 +412,7 @@ static int a2150_ai_cmdtest(struct comedi_device *dev,
425 412
426static int a2150_ai_cmd(struct comedi_device *dev, struct comedi_subdevice *s) 413static int a2150_ai_cmd(struct comedi_device *dev, struct comedi_subdevice *s)
427{ 414{
415 struct a2150_private *devpriv = dev->private;
428 struct comedi_async *async = s->async; 416 struct comedi_async *async = s->async;
429 struct comedi_cmd *cmd = &async->cmd; 417 struct comedi_cmd *cmd = &async->cmd;
430 unsigned long lock_flags; 418 unsigned long lock_flags;
@@ -536,6 +524,7 @@ static int a2150_ai_cmd(struct comedi_device *dev, struct comedi_subdevice *s)
536static int a2150_ai_rinsn(struct comedi_device *dev, struct comedi_subdevice *s, 524static int a2150_ai_rinsn(struct comedi_device *dev, struct comedi_subdevice *s,
537 struct comedi_insn *insn, unsigned int *data) 525 struct comedi_insn *insn, unsigned int *data)
538{ 526{
527 struct a2150_private *devpriv = dev->private;
539 unsigned int i, n; 528 unsigned int i, n;
540 static const int timeout = 100000; 529 static const int timeout = 100000;
541 static const int filter_delay = 36; 530 static const int filter_delay = 36;
@@ -615,6 +604,7 @@ static int a2150_ai_rinsn(struct comedi_device *dev, struct comedi_subdevice *s,
615static int a2150_get_timing(struct comedi_device *dev, unsigned int *period, 604static int a2150_get_timing(struct comedi_device *dev, unsigned int *period,
616 int flags) 605 int flags)
617{ 606{
607 struct a2150_private *devpriv = dev->private;
618 int lub, glb, temp; 608 int lub, glb, temp;
619 int lub_divisor_shift, lub_index, glb_divisor_shift, glb_index; 609 int lub_divisor_shift, lub_index, glb_divisor_shift, glb_index;
620 int i, j; 610 int i, j;
@@ -689,6 +679,8 @@ static int a2150_set_chanlist(struct comedi_device *dev,
689 unsigned int start_channel, 679 unsigned int start_channel,
690 unsigned int num_channels) 680 unsigned int num_channels)
691{ 681{
682 struct a2150_private *devpriv = dev->private;
683
692 if (start_channel + num_channels > 4) 684 if (start_channel + num_channels > 4)
693 return -1; 685 return -1;
694 686
@@ -727,6 +719,7 @@ static int a2150_probe(struct comedi_device *dev)
727 719
728static int a2150_attach(struct comedi_device *dev, struct comedi_devconfig *it) 720static int a2150_attach(struct comedi_device *dev, struct comedi_devconfig *it)
729{ 721{
722 struct a2150_private *devpriv;
730 struct comedi_subdevice *s; 723 struct comedi_subdevice *s;
731 unsigned long iobase = it->options[0]; 724 unsigned long iobase = it->options[0];
732 unsigned int irq = it->options[1]; 725 unsigned int irq = it->options[1];
@@ -749,9 +742,10 @@ static int a2150_attach(struct comedi_device *dev, struct comedi_devconfig *it)
749 } 742 }
750 printk("\n"); 743 printk("\n");
751 744
752 /* allocate and initialize dev->private */ 745 devpriv = kzalloc(sizeof(*devpriv), GFP_KERNEL);
753 if (alloc_private(dev, sizeof(struct a2150_private)) < 0) 746 if (!devpriv)
754 return -ENOMEM; 747 return -ENOMEM;
748 dev->private = devpriv;
755 749
756 if (iobase == 0) { 750 if (iobase == 0) {
757 printk(" io base address required\n"); 751 printk(" io base address required\n");
@@ -855,6 +849,8 @@ static int a2150_attach(struct comedi_device *dev, struct comedi_devconfig *it)
855 849
856static void a2150_detach(struct comedi_device *dev) 850static void a2150_detach(struct comedi_device *dev)
857{ 851{
852 struct a2150_private *devpriv = dev->private;
853
858 if (dev->iobase) { 854 if (dev->iobase) {
859 outw(APD_BIT | DPD_BIT, dev->iobase + CONFIG_REG); 855 outw(APD_BIT | DPD_BIT, dev->iobase + CONFIG_REG);
860 release_region(dev->iobase, A2150_SIZE); 856 release_region(dev->iobase, A2150_SIZE);
diff --git a/drivers/staging/comedi/drivers/ni_at_ao.c b/drivers/staging/comedi/drivers/ni_at_ao.c
index 93938cec93e7..907f65cdbdc0 100644
--- a/drivers/staging/comedi/drivers/ni_at_ao.c
+++ b/drivers/staging/comedi/drivers/ni_at_ao.c
@@ -167,10 +167,10 @@ struct atao_private {
167 unsigned int ao_readback[10]; 167 unsigned int ao_readback[10];
168}; 168};
169 169
170#define devpriv ((struct atao_private *)dev->private)
171
172static void atao_reset(struct comedi_device *dev) 170static void atao_reset(struct comedi_device *dev)
173{ 171{
172 struct atao_private *devpriv = dev->private;
173
174 /* This is the reset sequence described in the manual */ 174 /* This is the reset sequence described in the manual */
175 175
176 devpriv->cfg1 = 0; 176 devpriv->cfg1 = 0;
@@ -202,6 +202,7 @@ static void atao_reset(struct comedi_device *dev)
202static int atao_ao_winsn(struct comedi_device *dev, struct comedi_subdevice *s, 202static int atao_ao_winsn(struct comedi_device *dev, struct comedi_subdevice *s,
203 struct comedi_insn *insn, unsigned int *data) 203 struct comedi_insn *insn, unsigned int *data)
204{ 204{
205 struct atao_private *devpriv = dev->private;
205 int i; 206 int i;
206 int chan = CR_CHAN(insn->chanspec); 207 int chan = CR_CHAN(insn->chanspec);
207 short bits; 208 short bits;
@@ -226,6 +227,7 @@ static int atao_ao_winsn(struct comedi_device *dev, struct comedi_subdevice *s,
226static int atao_ao_rinsn(struct comedi_device *dev, struct comedi_subdevice *s, 227static int atao_ao_rinsn(struct comedi_device *dev, struct comedi_subdevice *s,
227 struct comedi_insn *insn, unsigned int *data) 228 struct comedi_insn *insn, unsigned int *data)
228{ 229{
230 struct atao_private *devpriv = dev->private;
229 int i; 231 int i;
230 int chan = CR_CHAN(insn->chanspec); 232 int chan = CR_CHAN(insn->chanspec);
231 233
@@ -254,6 +256,7 @@ static int atao_dio_insn_config(struct comedi_device *dev,
254 struct comedi_subdevice *s, 256 struct comedi_subdevice *s,
255 struct comedi_insn *insn, unsigned int *data) 257 struct comedi_insn *insn, unsigned int *data)
256{ 258{
259 struct atao_private *devpriv = dev->private;
257 int chan = CR_CHAN(insn->chanspec); 260 int chan = CR_CHAN(insn->chanspec);
258 unsigned int mask, bit; 261 unsigned int mask, bit;
259 262
@@ -309,6 +312,7 @@ static int atao_calib_insn_write(struct comedi_device *dev,
309 struct comedi_subdevice *s, 312 struct comedi_subdevice *s,
310 struct comedi_insn *insn, unsigned int *data) 313 struct comedi_insn *insn, unsigned int *data)
311{ 314{
315 struct atao_private *devpriv = dev->private;
312 unsigned int bitstring, bit; 316 unsigned int bitstring, bit;
313 unsigned int chan = CR_CHAN(insn->chanspec); 317 unsigned int chan = CR_CHAN(insn->chanspec);
314 318
@@ -331,6 +335,7 @@ static int atao_calib_insn_write(struct comedi_device *dev,
331static int atao_attach(struct comedi_device *dev, struct comedi_devconfig *it) 335static int atao_attach(struct comedi_device *dev, struct comedi_devconfig *it)
332{ 336{
333 const struct atao_board *board = comedi_board(dev); 337 const struct atao_board *board = comedi_board(dev);
338 struct atao_private *devpriv;
334 struct comedi_subdevice *s; 339 struct comedi_subdevice *s;
335 unsigned long iobase; 340 unsigned long iobase;
336 int ao_unipolar; 341 int ao_unipolar;
@@ -351,8 +356,10 @@ static int atao_attach(struct comedi_device *dev, struct comedi_devconfig *it)
351 356
352 dev->board_name = board->name; 357 dev->board_name = board->name;
353 358
354 if (alloc_private(dev, sizeof(struct atao_private)) < 0) 359 devpriv = kzalloc(sizeof(*devpriv), GFP_KERNEL);
360 if (!devpriv)
355 return -ENOMEM; 361 return -ENOMEM;
362 dev->private = devpriv;
356 363
357 ret = comedi_alloc_subdevices(dev, 4); 364 ret = comedi_alloc_subdevices(dev, 4);
358 if (ret) 365 if (ret)
diff --git a/drivers/staging/comedi/drivers/ni_atmio.c b/drivers/staging/comedi/drivers/ni_atmio.c
index cac25572f6bb..2cc29965e157 100644
--- a/drivers/staging/comedi/drivers/ni_atmio.c
+++ b/drivers/staging/comedi/drivers/ni_atmio.c
@@ -284,8 +284,6 @@ struct ni_private {
284 284
285}; 285};
286 286
287#define devpriv ((struct ni_private *)dev->private)
288
289/* How we access registers */ 287/* How we access registers */
290 288
291#define ni_writel(a, b) (outl((a), (b)+dev->iobase)) 289#define ni_writel(a, b) (outl((a), (b)+dev->iobase))
@@ -303,6 +301,7 @@ struct ni_private {
303 301
304static void ni_atmio_win_out(struct comedi_device *dev, uint16_t data, int addr) 302static void ni_atmio_win_out(struct comedi_device *dev, uint16_t data, int addr)
305{ 303{
304 struct ni_private *devpriv = dev->private;
306 unsigned long flags; 305 unsigned long flags;
307 306
308 spin_lock_irqsave(&devpriv->window_lock, flags); 307 spin_lock_irqsave(&devpriv->window_lock, flags);
@@ -317,6 +316,7 @@ static void ni_atmio_win_out(struct comedi_device *dev, uint16_t data, int addr)
317 316
318static uint16_t ni_atmio_win_in(struct comedi_device *dev, int addr) 317static uint16_t ni_atmio_win_in(struct comedi_device *dev, int addr)
319{ 318{
319 struct ni_private *devpriv = dev->private;
320 unsigned long flags; 320 unsigned long flags;
321 uint16_t ret; 321 uint16_t ret;
322 322
@@ -406,16 +406,17 @@ static int ni_getboardtype(struct comedi_device *dev)
406static int ni_atmio_attach(struct comedi_device *dev, 406static int ni_atmio_attach(struct comedi_device *dev,
407 struct comedi_devconfig *it) 407 struct comedi_devconfig *it)
408{ 408{
409 struct ni_private *devpriv;
409 struct pnp_dev *isapnp_dev; 410 struct pnp_dev *isapnp_dev;
410 int ret; 411 int ret;
411 unsigned long iobase; 412 unsigned long iobase;
412 int board; 413 int board;
413 unsigned int irq; 414 unsigned int irq;
414 415
415 /* allocate private area */
416 ret = ni_alloc_private(dev); 416 ret = ni_alloc_private(dev);
417 if (ret < 0) 417 if (ret)
418 return ret; 418 return ret;
419 devpriv = dev->private;
419 420
420 devpriv->stc_writew = &ni_atmio_win_out; 421 devpriv->stc_writew = &ni_atmio_win_out;
421 devpriv->stc_readw = &ni_atmio_win_in; 422 devpriv->stc_readw = &ni_atmio_win_in;
@@ -499,6 +500,8 @@ static int ni_atmio_attach(struct comedi_device *dev,
499 500
500static void ni_atmio_detach(struct comedi_device *dev) 501static void ni_atmio_detach(struct comedi_device *dev)
501{ 502{
503 struct ni_private *devpriv = dev->private;
504
502 mio_common_detach(dev); 505 mio_common_detach(dev);
503 if (dev->iobase) 506 if (dev->iobase)
504 release_region(dev->iobase, NI_SIZE); 507 release_region(dev->iobase, NI_SIZE);
diff --git a/drivers/staging/comedi/drivers/ni_atmio16d.c b/drivers/staging/comedi/drivers/ni_atmio16d.c
index e91a620f9db3..4a17494f55ed 100644
--- a/drivers/staging/comedi/drivers/ni_atmio16d.c
+++ b/drivers/staging/comedi/drivers/ni_atmio16d.c
@@ -102,7 +102,6 @@ Devices: [National Instruments] AT-MIO-16 (atmio16), AT-MIO-16D (atmio16d)
102#define CLOCK_100_HZ 0x8F25 102#define CLOCK_100_HZ 0x8F25
103/* Other miscellaneous defines */ 103/* Other miscellaneous defines */
104#define ATMIO16D_SIZE 32 /* bus address range */ 104#define ATMIO16D_SIZE 32 /* bus address range */
105#define devpriv ((struct atmio16d_private *)dev->private)
106#define ATMIO16D_TIMEOUT 10 105#define ATMIO16D_TIMEOUT 10
107 106
108struct atmio16_board_t { 107struct atmio16_board_t {
@@ -202,6 +201,7 @@ static void reset_counters(struct comedi_device *dev)
202 201
203static void reset_atmio16d(struct comedi_device *dev) 202static void reset_atmio16d(struct comedi_device *dev)
204{ 203{
204 struct atmio16d_private *devpriv = dev->private;
205 int i; 205 int i;
206 206
207 /* now we need to initialize the board */ 207 /* now we need to initialize the board */
@@ -271,51 +271,32 @@ static int atmio16d_ai_cmdtest(struct comedi_device *dev,
271 if (err) 271 if (err)
272 return 2; 272 return 2;
273 273
274 /* step 3: make sure arguments are trivially compatible */ 274 /* Step 3: check if arguments are trivially valid */
275
276 err |= cfc_check_trigger_arg_is(&cmd->start_arg, 0);
275 277
276 if (cmd->start_arg != 0) {
277 cmd->start_arg = 0;
278 err++;
279 }
280 if (cmd->scan_begin_src == TRIG_FOLLOW) { 278 if (cmd->scan_begin_src == TRIG_FOLLOW) {
281 /* internal trigger */ 279 /* internal trigger */
282 if (cmd->scan_begin_arg != 0) { 280 err |= cfc_check_trigger_arg_is(&cmd->scan_begin_arg, 0);
283 cmd->scan_begin_arg = 0;
284 err++;
285 }
286 } else { 281 } else {
287#if 0 282#if 0
288 /* external trigger */ 283 /* external trigger */
289 /* should be level/edge, hi/lo specification here */ 284 /* should be level/edge, hi/lo specification here */
290 if (cmd->scan_begin_arg != 0) { 285 err |= cfc_check_trigger_arg_is(&cmd->scan_begin_arg, 0);
291 cmd->scan_begin_arg = 0;
292 err++;
293 }
294#endif 286#endif
295 } 287 }
296 288
297 if (cmd->convert_arg < 10000) { 289 err |= cfc_check_trigger_arg_min(&cmd->convert_arg, 10000);
298 cmd->convert_arg = 10000;
299 err++;
300 }
301#if 0 290#if 0
302 if (cmd->convert_arg > SLOWEST_TIMER) { 291 err |= cfc_check_trigger_arg_max(&cmd->convert_arg, SLOWEST_TIMER);
303 cmd->convert_arg = SLOWEST_TIMER;
304 err++;
305 }
306#endif 292#endif
307 if (cmd->scan_end_arg != cmd->chanlist_len) { 293
308 cmd->scan_end_arg = cmd->chanlist_len; 294 err |= cfc_check_trigger_arg_is(&cmd->scan_end_arg, cmd->chanlist_len);
309 err++; 295
310 }
311 if (cmd->stop_src == TRIG_COUNT) { 296 if (cmd->stop_src == TRIG_COUNT) {
312 /* any count is allowed */ 297 /* any count is allowed */
313 } else { 298 } else { /* TRIG_NONE */
314 /* TRIG_NONE */ 299 err |= cfc_check_trigger_arg_is(&cmd->stop_arg, 0);
315 if (cmd->stop_arg != 0) {
316 cmd->stop_arg = 0;
317 err++;
318 }
319 } 300 }
320 301
321 if (err) 302 if (err)
@@ -327,6 +308,7 @@ static int atmio16d_ai_cmdtest(struct comedi_device *dev,
327static int atmio16d_ai_cmd(struct comedi_device *dev, 308static int atmio16d_ai_cmd(struct comedi_device *dev,
328 struct comedi_subdevice *s) 309 struct comedi_subdevice *s)
329{ 310{
311 struct atmio16d_private *devpriv = dev->private;
330 struct comedi_cmd *cmd = &s->async->cmd; 312 struct comedi_cmd *cmd = &s->async->cmd;
331 unsigned int timer, base_clock; 313 unsigned int timer, base_clock;
332 unsigned int sample_count, tmp, chan, gain; 314 unsigned int sample_count, tmp, chan, gain;
@@ -486,6 +468,7 @@ static int atmio16d_ai_insn_read(struct comedi_device *dev,
486 struct comedi_subdevice *s, 468 struct comedi_subdevice *s,
487 struct comedi_insn *insn, unsigned int *data) 469 struct comedi_insn *insn, unsigned int *data)
488{ 470{
471 struct atmio16d_private *devpriv = dev->private;
489 int i, t; 472 int i, t;
490 int chan; 473 int chan;
491 int gain; 474 int gain;
@@ -539,6 +522,7 @@ static int atmio16d_ao_insn_read(struct comedi_device *dev,
539 struct comedi_subdevice *s, 522 struct comedi_subdevice *s,
540 struct comedi_insn *insn, unsigned int *data) 523 struct comedi_insn *insn, unsigned int *data)
541{ 524{
525 struct atmio16d_private *devpriv = dev->private;
542 int i; 526 int i;
543 527
544 for (i = 0; i < insn->n; i++) 528 for (i = 0; i < insn->n; i++)
@@ -550,6 +534,7 @@ static int atmio16d_ao_insn_write(struct comedi_device *dev,
550 struct comedi_subdevice *s, 534 struct comedi_subdevice *s,
551 struct comedi_insn *insn, unsigned int *data) 535 struct comedi_insn *insn, unsigned int *data)
552{ 536{
537 struct atmio16d_private *devpriv = dev->private;
553 int i; 538 int i;
554 int chan; 539 int chan;
555 int d; 540 int d;
@@ -596,6 +581,7 @@ static int atmio16d_dio_insn_config(struct comedi_device *dev,
596 struct comedi_insn *insn, 581 struct comedi_insn *insn,
597 unsigned int *data) 582 unsigned int *data)
598{ 583{
584 struct atmio16d_private *devpriv = dev->private;
599 int i; 585 int i;
600 int mask; 586 int mask;
601 587
@@ -651,6 +637,7 @@ static int atmio16d_attach(struct comedi_device *dev,
651 struct comedi_devconfig *it) 637 struct comedi_devconfig *it)
652{ 638{
653 const struct atmio16_board_t *board = comedi_board(dev); 639 const struct atmio16_board_t *board = comedi_board(dev);
640 struct atmio16d_private *devpriv;
654 unsigned int irq; 641 unsigned int irq;
655 unsigned long iobase; 642 unsigned long iobase;
656 int ret; 643 int ret;
@@ -672,9 +659,10 @@ static int atmio16d_attach(struct comedi_device *dev,
672 if (ret) 659 if (ret)
673 return ret; 660 return ret;
674 661
675 ret = alloc_private(dev, sizeof(struct atmio16d_private)); 662 devpriv = kzalloc(sizeof(*devpriv), GFP_KERNEL);
676 if (ret < 0) 663 if (!devpriv)
677 return ret; 664 return -ENOMEM;
665 dev->private = devpriv;
678 666
679 /* reset the atmio16d hardware */ 667 /* reset the atmio16d hardware */
680 reset_atmio16d(dev); 668 reset_atmio16d(dev);
diff --git a/drivers/staging/comedi/drivers/ni_daq_dio24.c b/drivers/staging/comedi/drivers/ni_daq_dio24.c
index 0ca222bbcbe6..7b333353c5d9 100644
--- a/drivers/staging/comedi/drivers/ni_daq_dio24.c
+++ b/drivers/staging/comedi/drivers/ni_daq_dio24.c
@@ -96,8 +96,6 @@ struct dio24_private {
96 int data; /* number of data points left to be taken */ 96 int data; /* number of data points left to be taken */
97}; 97};
98 98
99#define devpriv ((struct dio24_private *)dev->private)
100
101static struct comedi_driver driver_dio24 = { 99static struct comedi_driver driver_dio24 = {
102 .driver_name = "ni_daq_dio24", 100 .driver_name = "ni_daq_dio24",
103 .module = THIS_MODULE, 101 .module = THIS_MODULE,
@@ -110,6 +108,7 @@ static struct comedi_driver driver_dio24 = {
110 108
111static int dio24_attach(struct comedi_device *dev, struct comedi_devconfig *it) 109static int dio24_attach(struct comedi_device *dev, struct comedi_devconfig *it)
112{ 110{
111 struct dio24_private *devpriv;
113 struct comedi_subdevice *s; 112 struct comedi_subdevice *s;
114 unsigned long iobase = 0; 113 unsigned long iobase = 0;
115#ifdef incomplete 114#ifdef incomplete
@@ -118,9 +117,10 @@ static int dio24_attach(struct comedi_device *dev, struct comedi_devconfig *it)
118 struct pcmcia_device *link; 117 struct pcmcia_device *link;
119 int ret; 118 int ret;
120 119
121 /* allocate and initialize dev->private */ 120 devpriv = kzalloc(sizeof(*devpriv), GFP_KERNEL);
122 if (alloc_private(dev, sizeof(struct dio24_private)) < 0) 121 if (!devpriv)
123 return -ENOMEM; 122 return -ENOMEM;
123 dev->private = devpriv;
124 124
125 /* get base address, irq etc. based on bustype */ 125 /* get base address, irq etc. based on bustype */
126 switch (thisboard->bustype) { 126 switch (thisboard->bustype) {
@@ -202,7 +202,7 @@ static int dio24_cs_attach(struct pcmcia_device *link)
202{ 202{
203 struct local_info_t *local; 203 struct local_info_t *local;
204 204
205 printk(KERN_INFO "ni_daq_dio24: HOLA SOY YO - CS-attach!\n"); 205 dev_info(&link->dev, "ni_daq_dio24: HOLA SOY YO - CS-attach!\n");
206 206
207 dev_dbg(&link->dev, "dio24_cs_attach()\n"); 207 dev_dbg(&link->dev, "dio24_cs_attach()\n");
208 208
@@ -242,7 +242,7 @@ static void dio24_config(struct pcmcia_device *link)
242{ 242{
243 int ret; 243 int ret;
244 244
245 printk(KERN_INFO "ni_daq_dio24: HOLA SOY YO! - config\n"); 245 dev_info(&link->dev, "ni_daq_dio24: HOLA SOY YO! - config\n");
246 246
247 dev_dbg(&link->dev, "dio24_config\n"); 247 dev_dbg(&link->dev, "dio24_config\n");
248 248
@@ -265,7 +265,7 @@ static void dio24_config(struct pcmcia_device *link)
265 return; 265 return;
266 266
267failed: 267failed:
268 printk(KERN_INFO "Fallo"); 268 dev_info(&link->dev, "Fallo");
269 dio24_release(link); 269 dio24_release(link);
270 270
271} /* dio24_config */ 271} /* dio24_config */
diff --git a/drivers/staging/comedi/drivers/ni_labpc.c b/drivers/staging/comedi/drivers/ni_labpc.c
index b5a19a0863fb..d29c4d761bac 100644
--- a/drivers/staging/comedi/drivers/ni_labpc.c
+++ b/drivers/staging/comedi/drivers/ni_labpc.c
@@ -487,8 +487,6 @@ static const int dma_buffer_size = 0xff00;
487/* 2 bytes per sample */ 487/* 2 bytes per sample */
488static const int sample_size = 2; 488static const int sample_size = 2;
489 489
490#define devpriv ((struct labpc_private *)dev->private)
491
492static inline int labpc_counter_load(struct comedi_device *dev, 490static inline int labpc_counter_load(struct comedi_device *dev,
493 unsigned long base_address, 491 unsigned long base_address,
494 unsigned int counter_number, 492 unsigned int counter_number,
@@ -504,6 +502,7 @@ static inline int labpc_counter_load(struct comedi_device *dev,
504int labpc_common_attach(struct comedi_device *dev, unsigned long iobase, 502int labpc_common_attach(struct comedi_device *dev, unsigned long iobase,
505 unsigned int irq, unsigned int dma_chan) 503 unsigned int irq, unsigned int dma_chan)
506{ 504{
505 struct labpc_private *devpriv = dev->private;
507 struct comedi_subdevice *s; 506 struct comedi_subdevice *s;
508 int i; 507 int i;
509 unsigned long isr_flags; 508 unsigned long isr_flags;
@@ -697,18 +696,23 @@ labpc_pci_find_boardinfo(struct pci_dev *pcidev)
697 return NULL; 696 return NULL;
698} 697}
699 698
700static int __devinit labpc_attach_pci(struct comedi_device *dev, 699static int labpc_auto_attach(struct comedi_device *dev,
701 struct pci_dev *pcidev) 700 unsigned long context_unused)
702{ 701{
702 struct pci_dev *pcidev = comedi_to_pci_dev(dev);
703 struct labpc_private *devpriv;
703 unsigned long iobase; 704 unsigned long iobase;
704 unsigned int irq; 705 unsigned int irq;
705 int ret; 706 int ret;
706 707
707 if (!IS_ENABLED(CONFIG_COMEDI_PCI_DRIVERS)) 708 if (!IS_ENABLED(CONFIG_COMEDI_PCI_DRIVERS))
708 return -ENODEV; 709 return -ENODEV;
709 ret = alloc_private(dev, sizeof(struct labpc_private)); 710
710 if (ret < 0) 711 devpriv = kzalloc(sizeof(*devpriv), GFP_KERNEL);
711 return ret; 712 if (!devpriv)
713 return -ENOMEM;
714 dev->private = devpriv;
715
712 dev->board_ptr = labpc_pci_find_boardinfo(pcidev); 716 dev->board_ptr = labpc_pci_find_boardinfo(pcidev);
713 if (!dev->board_ptr) 717 if (!dev->board_ptr)
714 return -ENODEV; 718 return -ENODEV;
@@ -725,13 +729,15 @@ static int __devinit labpc_attach_pci(struct comedi_device *dev,
725 729
726static int labpc_attach(struct comedi_device *dev, struct comedi_devconfig *it) 730static int labpc_attach(struct comedi_device *dev, struct comedi_devconfig *it)
727{ 731{
732 struct labpc_private *devpriv;
728 unsigned long iobase = 0; 733 unsigned long iobase = 0;
729 unsigned int irq = 0; 734 unsigned int irq = 0;
730 unsigned int dma_chan = 0; 735 unsigned int dma_chan = 0;
731 736
732 /* allocate and initialize dev->private */ 737 devpriv = kzalloc(sizeof(*devpriv), GFP_KERNEL);
733 if (alloc_private(dev, sizeof(struct labpc_private)) < 0) 738 if (!devpriv)
734 return -ENOMEM; 739 return -ENOMEM;
740 dev->private = devpriv;
735 741
736 /* get base address, irq etc. based on bustype */ 742 /* get base address, irq etc. based on bustype */
737 switch (thisboard->bustype) { 743 switch (thisboard->bustype) {
@@ -770,6 +776,7 @@ static int labpc_attach(struct comedi_device *dev, struct comedi_devconfig *it)
770 776
771void labpc_common_detach(struct comedi_device *dev) 777void labpc_common_detach(struct comedi_device *dev)
772{ 778{
779 struct labpc_private *devpriv = dev->private;
773 struct comedi_subdevice *s; 780 struct comedi_subdevice *s;
774 781
775 if (!thisboard) 782 if (!thisboard)
@@ -799,6 +806,8 @@ EXPORT_SYMBOL_GPL(labpc_common_detach);
799 806
800static void labpc_clear_adc_fifo(const struct comedi_device *dev) 807static void labpc_clear_adc_fifo(const struct comedi_device *dev)
801{ 808{
809 struct labpc_private *devpriv = dev->private;
810
802 devpriv->write_byte(0x1, dev->iobase + ADC_CLEAR_REG); 811 devpriv->write_byte(0x1, dev->iobase + ADC_CLEAR_REG);
803 devpriv->read_byte(dev->iobase + ADC_FIFO_REG); 812 devpriv->read_byte(dev->iobase + ADC_FIFO_REG);
804 devpriv->read_byte(dev->iobase + ADC_FIFO_REG); 813 devpriv->read_byte(dev->iobase + ADC_FIFO_REG);
@@ -806,6 +815,7 @@ static void labpc_clear_adc_fifo(const struct comedi_device *dev)
806 815
807static int labpc_cancel(struct comedi_device *dev, struct comedi_subdevice *s) 816static int labpc_cancel(struct comedi_device *dev, struct comedi_subdevice *s)
808{ 817{
818 struct labpc_private *devpriv = dev->private;
809 unsigned long flags; 819 unsigned long flags;
810 820
811 spin_lock_irqsave(&dev->spinlock, flags); 821 spin_lock_irqsave(&dev->spinlock, flags);
@@ -1016,56 +1026,34 @@ static int labpc_ai_cmdtest(struct comedi_device *dev,
1016 if (err) 1026 if (err)
1017 return 2; 1027 return 2;
1018 1028
1019 /* step 3: make sure arguments are trivially compatible */ 1029 /* Step 3: check if arguments are trivially valid */
1020 1030
1021 if (cmd->start_arg == TRIG_NOW && cmd->start_arg != 0) { 1031 if (cmd->start_arg == TRIG_NOW)
1022 cmd->start_arg = 0; 1032 err |= cfc_check_trigger_arg_is(&cmd->start_arg, 0);
1023 err++;
1024 }
1025 1033
1026 if (!cmd->chanlist_len) 1034 if (!cmd->chanlist_len)
1027 err++; 1035 err |= -EINVAL;
1036 err |= cfc_check_trigger_arg_is(&cmd->scan_end_arg, cmd->chanlist_len);
1028 1037
1029 if (cmd->scan_end_arg != cmd->chanlist_len) { 1038 if (cmd->convert_src == TRIG_TIMER)
1030 cmd->scan_end_arg = cmd->chanlist_len; 1039 err |= cfc_check_trigger_arg_min(&cmd->convert_arg,
1031 err++; 1040 thisboard->ai_speed);
1032 }
1033 1041
1034 if (cmd->convert_src == TRIG_TIMER) {
1035 if (cmd->convert_arg < thisboard->ai_speed) {
1036 cmd->convert_arg = thisboard->ai_speed;
1037 err++;
1038 }
1039 }
1040 /* make sure scan timing is not too fast */ 1042 /* make sure scan timing is not too fast */
1041 if (cmd->scan_begin_src == TRIG_TIMER) { 1043 if (cmd->scan_begin_src == TRIG_TIMER) {
1042 if (cmd->convert_src == TRIG_TIMER && 1044 if (cmd->convert_src == TRIG_TIMER)
1043 cmd->scan_begin_arg < 1045 err |= cfc_check_trigger_arg_min(&cmd->scan_begin_arg,
1044 cmd->convert_arg * cmd->chanlist_len) { 1046 cmd->convert_arg * cmd->chanlist_len);
1045 cmd->scan_begin_arg = 1047 err |= cfc_check_trigger_arg_min(&cmd->scan_begin_arg,
1046 cmd->convert_arg * cmd->chanlist_len; 1048 thisboard->ai_speed * cmd->chanlist_len);
1047 err++;
1048 }
1049 if (cmd->scan_begin_arg <
1050 thisboard->ai_speed * cmd->chanlist_len) {
1051 cmd->scan_begin_arg =
1052 thisboard->ai_speed * cmd->chanlist_len;
1053 err++;
1054 }
1055 } 1049 }
1056 /* stop source */ 1050
1057 switch (cmd->stop_src) { 1051 switch (cmd->stop_src) {
1058 case TRIG_COUNT: 1052 case TRIG_COUNT:
1059 if (!cmd->stop_arg) { 1053 err |= cfc_check_trigger_arg_min(&cmd->stop_arg, 1);
1060 cmd->stop_arg = 1;
1061 err++;
1062 }
1063 break; 1054 break;
1064 case TRIG_NONE: 1055 case TRIG_NONE:
1065 if (cmd->stop_arg != 0) { 1056 err |= cfc_check_trigger_arg_is(&cmd->stop_arg, 0);
1066 cmd->stop_arg = 0;
1067 err++;
1068 }
1069 break; 1057 break;
1070 /* 1058 /*
1071 * TRIG_EXT doesn't care since it doesn't 1059 * TRIG_EXT doesn't care since it doesn't
@@ -1098,6 +1086,7 @@ static int labpc_ai_cmdtest(struct comedi_device *dev,
1098 1086
1099static int labpc_ai_cmd(struct comedi_device *dev, struct comedi_subdevice *s) 1087static int labpc_ai_cmd(struct comedi_device *dev, struct comedi_subdevice *s)
1100{ 1088{
1089 struct labpc_private *devpriv = dev->private;
1101 int channel, range, aref; 1090 int channel, range, aref;
1102#ifdef CONFIG_ISA_DMA_API 1091#ifdef CONFIG_ISA_DMA_API
1103 unsigned long irq_flags; 1092 unsigned long irq_flags;
@@ -1365,6 +1354,7 @@ static int labpc_ai_cmd(struct comedi_device *dev, struct comedi_subdevice *s)
1365static irqreturn_t labpc_interrupt(int irq, void *d) 1354static irqreturn_t labpc_interrupt(int irq, void *d)
1366{ 1355{
1367 struct comedi_device *dev = d; 1356 struct comedi_device *dev = d;
1357 struct labpc_private *devpriv = dev->private;
1368 struct comedi_subdevice *s = dev->read_subdev; 1358 struct comedi_subdevice *s = dev->read_subdev;
1369 struct comedi_async *async; 1359 struct comedi_async *async;
1370 struct comedi_cmd *cmd; 1360 struct comedi_cmd *cmd;
@@ -1453,6 +1443,7 @@ static irqreturn_t labpc_interrupt(int irq, void *d)
1453/* read all available samples from ai fifo */ 1443/* read all available samples from ai fifo */
1454static int labpc_drain_fifo(struct comedi_device *dev) 1444static int labpc_drain_fifo(struct comedi_device *dev)
1455{ 1445{
1446 struct labpc_private *devpriv = dev->private;
1456 unsigned int lsb, msb; 1447 unsigned int lsb, msb;
1457 short data; 1448 short data;
1458 struct comedi_async *async = dev->read_subdev->async; 1449 struct comedi_async *async = dev->read_subdev->async;
@@ -1488,6 +1479,7 @@ static int labpc_drain_fifo(struct comedi_device *dev)
1488#ifdef CONFIG_ISA_DMA_API 1479#ifdef CONFIG_ISA_DMA_API
1489static void labpc_drain_dma(struct comedi_device *dev) 1480static void labpc_drain_dma(struct comedi_device *dev)
1490{ 1481{
1482 struct labpc_private *devpriv = dev->private;
1491 struct comedi_subdevice *s = dev->read_subdev; 1483 struct comedi_subdevice *s = dev->read_subdev;
1492 struct comedi_async *async = s->async; 1484 struct comedi_async *async = s->async;
1493 int status; 1485 int status;
@@ -1541,6 +1533,8 @@ static void labpc_drain_dma(struct comedi_device *dev)
1541 1533
1542static void handle_isa_dma(struct comedi_device *dev) 1534static void handle_isa_dma(struct comedi_device *dev)
1543{ 1535{
1536 struct labpc_private *devpriv = dev->private;
1537
1544 labpc_drain_dma(dev); 1538 labpc_drain_dma(dev);
1545 1539
1546 enable_dma(devpriv->dma_chan); 1540 enable_dma(devpriv->dma_chan);
@@ -1555,6 +1549,8 @@ static void handle_isa_dma(struct comedi_device *dev)
1555static void labpc_drain_dregs(struct comedi_device *dev) 1549static void labpc_drain_dregs(struct comedi_device *dev)
1556{ 1550{
1557#ifdef CONFIG_ISA_DMA_API 1551#ifdef CONFIG_ISA_DMA_API
1552 struct labpc_private *devpriv = dev->private;
1553
1558 if (devpriv->current_transfer == isa_dma_transfer) 1554 if (devpriv->current_transfer == isa_dma_transfer)
1559 labpc_drain_dma(dev); 1555 labpc_drain_dma(dev);
1560#endif 1556#endif
@@ -1565,6 +1561,7 @@ static void labpc_drain_dregs(struct comedi_device *dev)
1565static int labpc_ai_rinsn(struct comedi_device *dev, struct comedi_subdevice *s, 1561static int labpc_ai_rinsn(struct comedi_device *dev, struct comedi_subdevice *s,
1566 struct comedi_insn *insn, unsigned int *data) 1562 struct comedi_insn *insn, unsigned int *data)
1567{ 1563{
1564 struct labpc_private *devpriv = dev->private;
1568 int i, n; 1565 int i, n;
1569 int chan, range; 1566 int chan, range;
1570 int lsb, msb; 1567 int lsb, msb;
@@ -1654,6 +1651,7 @@ static int labpc_ai_rinsn(struct comedi_device *dev, struct comedi_subdevice *s,
1654static int labpc_ao_winsn(struct comedi_device *dev, struct comedi_subdevice *s, 1651static int labpc_ao_winsn(struct comedi_device *dev, struct comedi_subdevice *s,
1655 struct comedi_insn *insn, unsigned int *data) 1652 struct comedi_insn *insn, unsigned int *data)
1656{ 1653{
1654 struct labpc_private *devpriv = dev->private;
1657 int channel, range; 1655 int channel, range;
1658 unsigned long flags; 1656 unsigned long flags;
1659 int lsb, msb; 1657 int lsb, msb;
@@ -1695,6 +1693,8 @@ static int labpc_ao_winsn(struct comedi_device *dev, struct comedi_subdevice *s,
1695static int labpc_ao_rinsn(struct comedi_device *dev, struct comedi_subdevice *s, 1693static int labpc_ao_rinsn(struct comedi_device *dev, struct comedi_subdevice *s,
1696 struct comedi_insn *insn, unsigned int *data) 1694 struct comedi_insn *insn, unsigned int *data)
1697{ 1695{
1696 struct labpc_private *devpriv = dev->private;
1697
1698 data[0] = devpriv->ao_value[CR_CHAN(insn->chanspec)]; 1698 data[0] = devpriv->ao_value[CR_CHAN(insn->chanspec)];
1699 1699
1700 return 1; 1700 return 1;
@@ -1704,6 +1704,8 @@ static int labpc_calib_read_insn(struct comedi_device *dev,
1704 struct comedi_subdevice *s, 1704 struct comedi_subdevice *s,
1705 struct comedi_insn *insn, unsigned int *data) 1705 struct comedi_insn *insn, unsigned int *data)
1706{ 1706{
1707 struct labpc_private *devpriv = dev->private;
1708
1707 data[0] = devpriv->caldac[CR_CHAN(insn->chanspec)]; 1709 data[0] = devpriv->caldac[CR_CHAN(insn->chanspec)];
1708 1710
1709 return 1; 1711 return 1;
@@ -1723,6 +1725,8 @@ static int labpc_eeprom_read_insn(struct comedi_device *dev,
1723 struct comedi_subdevice *s, 1725 struct comedi_subdevice *s,
1724 struct comedi_insn *insn, unsigned int *data) 1726 struct comedi_insn *insn, unsigned int *data)
1725{ 1727{
1728 struct labpc_private *devpriv = dev->private;
1729
1726 data[0] = devpriv->eeprom_data[CR_CHAN(insn->chanspec)]; 1730 data[0] = devpriv->eeprom_data[CR_CHAN(insn->chanspec)];
1727 1731
1728 return 1; 1732 return 1;
@@ -1779,6 +1783,7 @@ static unsigned int labpc_suggest_transfer_size(const struct comedi_cmd *cmd)
1779static void labpc_adc_timing(struct comedi_device *dev, struct comedi_cmd *cmd, 1783static void labpc_adc_timing(struct comedi_device *dev, struct comedi_cmd *cmd,
1780 enum scan_mode mode) 1784 enum scan_mode mode)
1781{ 1785{
1786 struct labpc_private *devpriv = dev->private;
1782 /* max value for 16 bit counter in mode 2 */ 1787 /* max value for 16 bit counter in mode 2 */
1783 const int max_counter_value = 0x10000; 1788 const int max_counter_value = 0x10000;
1784 /* min value for 16 bit counter in mode 2 */ 1789 /* min value for 16 bit counter in mode 2 */
@@ -1885,6 +1890,7 @@ static int labpc_dio_mem_callback(int dir, int port, int data,
1885static void labpc_serial_out(struct comedi_device *dev, unsigned int value, 1890static void labpc_serial_out(struct comedi_device *dev, unsigned int value,
1886 unsigned int value_width) 1891 unsigned int value_width)
1887{ 1892{
1893 struct labpc_private *devpriv = dev->private;
1888 int i; 1894 int i;
1889 1895
1890 for (i = 1; i <= value_width; i++) { 1896 for (i = 1; i <= value_width; i++) {
@@ -1909,6 +1915,7 @@ static void labpc_serial_out(struct comedi_device *dev, unsigned int value,
1909/* lowlevel read from eeprom */ 1915/* lowlevel read from eeprom */
1910static unsigned int labpc_serial_in(struct comedi_device *dev) 1916static unsigned int labpc_serial_in(struct comedi_device *dev)
1911{ 1917{
1918 struct labpc_private *devpriv = dev->private;
1912 unsigned int value = 0; 1919 unsigned int value = 0;
1913 int i; 1920 int i;
1914 const int value_width = 8; /* number of bits wide values are */ 1921 const int value_width = 8; /* number of bits wide values are */
@@ -1938,6 +1945,7 @@ static unsigned int labpc_serial_in(struct comedi_device *dev)
1938static unsigned int labpc_eeprom_read(struct comedi_device *dev, 1945static unsigned int labpc_eeprom_read(struct comedi_device *dev,
1939 unsigned int address) 1946 unsigned int address)
1940{ 1947{
1948 struct labpc_private *devpriv = dev->private;
1941 unsigned int value; 1949 unsigned int value;
1942 /* bits to tell eeprom to expect a read */ 1950 /* bits to tell eeprom to expect a read */
1943 const int read_instruction = 0x3; 1951 const int read_instruction = 0x3;
@@ -1970,6 +1978,7 @@ static unsigned int labpc_eeprom_read(struct comedi_device *dev,
1970static int labpc_eeprom_write(struct comedi_device *dev, 1978static int labpc_eeprom_write(struct comedi_device *dev,
1971 unsigned int address, unsigned int value) 1979 unsigned int address, unsigned int value)
1972{ 1980{
1981 struct labpc_private *devpriv = dev->private;
1973 const int write_enable_instruction = 0x6; 1982 const int write_enable_instruction = 0x6;
1974 const int write_instruction = 0x2; 1983 const int write_instruction = 0x2;
1975 const int write_length = 8; /* 8 bit write lengths to eeprom */ 1984 const int write_length = 8; /* 8 bit write lengths to eeprom */
@@ -2027,6 +2036,7 @@ static int labpc_eeprom_write(struct comedi_device *dev,
2027 2036
2028static unsigned int labpc_eeprom_read_status(struct comedi_device *dev) 2037static unsigned int labpc_eeprom_read_status(struct comedi_device *dev)
2029{ 2038{
2039 struct labpc_private *devpriv = dev->private;
2030 unsigned int value; 2040 unsigned int value;
2031 const int read_status_instruction = 0x5; 2041 const int read_status_instruction = 0x5;
2032 const int write_length = 8; /* 8 bit write lengths to eeprom */ 2042 const int write_length = 8; /* 8 bit write lengths to eeprom */
@@ -2056,6 +2066,8 @@ static unsigned int labpc_eeprom_read_status(struct comedi_device *dev)
2056static void write_caldac(struct comedi_device *dev, unsigned int channel, 2066static void write_caldac(struct comedi_device *dev, unsigned int channel,
2057 unsigned int value) 2067 unsigned int value)
2058{ 2068{
2069 struct labpc_private *devpriv = dev->private;
2070
2059 if (value == devpriv->caldac[channel]) 2071 if (value == devpriv->caldac[channel])
2060 return; 2072 return;
2061 devpriv->caldac[channel] = value; 2073 devpriv->caldac[channel] = value;
@@ -2084,7 +2096,7 @@ static struct comedi_driver labpc_driver = {
2084 .driver_name = DRV_NAME, 2096 .driver_name = DRV_NAME,
2085 .module = THIS_MODULE, 2097 .module = THIS_MODULE,
2086 .attach = labpc_attach, 2098 .attach = labpc_attach,
2087 .attach_pci = labpc_attach_pci, 2099 .auto_attach = labpc_auto_attach,
2088 .detach = labpc_common_detach, 2100 .detach = labpc_common_detach,
2089 .num_names = ARRAY_SIZE(labpc_boards), 2101 .num_names = ARRAY_SIZE(labpc_boards),
2090 .board_name = &labpc_boards[0].name, 2102 .board_name = &labpc_boards[0].name,
@@ -2098,13 +2110,13 @@ static DEFINE_PCI_DEVICE_TABLE(labpc_pci_table) = {
2098}; 2110};
2099MODULE_DEVICE_TABLE(pci, labpc_pci_table); 2111MODULE_DEVICE_TABLE(pci, labpc_pci_table);
2100 2112
2101static int __devinit labpc_pci_probe(struct pci_dev *dev, 2113static int labpc_pci_probe(struct pci_dev *dev,
2102 const struct pci_device_id *ent) 2114 const struct pci_device_id *ent)
2103{ 2115{
2104 return comedi_pci_auto_config(dev, &labpc_driver); 2116 return comedi_pci_auto_config(dev, &labpc_driver);
2105} 2117}
2106 2118
2107static void __devexit labpc_pci_remove(struct pci_dev *dev) 2119static void labpc_pci_remove(struct pci_dev *dev)
2108{ 2120{
2109 comedi_pci_auto_unconfig(dev); 2121 comedi_pci_auto_unconfig(dev);
2110} 2122}
@@ -2113,7 +2125,7 @@ static struct pci_driver labpc_pci_driver = {
2113 .name = DRV_NAME, 2125 .name = DRV_NAME,
2114 .id_table = labpc_pci_table, 2126 .id_table = labpc_pci_table,
2115 .probe = labpc_pci_probe, 2127 .probe = labpc_pci_probe,
2116 .remove = __devexit_p(labpc_pci_remove) 2128 .remove = labpc_pci_remove
2117}; 2129};
2118module_comedi_pci_driver(labpc_driver, labpc_pci_driver); 2130module_comedi_pci_driver(labpc_driver, labpc_pci_driver);
2119#else 2131#else
diff --git a/drivers/staging/comedi/drivers/ni_labpc_cs.c b/drivers/staging/comedi/drivers/ni_labpc_cs.c
index eb0417eb6d7d..bfe19fa7d66f 100644
--- a/drivers/staging/comedi/drivers/ni_labpc_cs.c
+++ b/drivers/staging/comedi/drivers/ni_labpc_cs.c
@@ -127,13 +127,15 @@ static struct comedi_driver driver_labpc_cs = {
127 127
128static int labpc_attach(struct comedi_device *dev, struct comedi_devconfig *it) 128static int labpc_attach(struct comedi_device *dev, struct comedi_devconfig *it)
129{ 129{
130 struct labpc_private *devpriv;
130 unsigned long iobase = 0; 131 unsigned long iobase = 0;
131 unsigned int irq = 0; 132 unsigned int irq = 0;
132 struct pcmcia_device *link; 133 struct pcmcia_device *link;
133 134
134 /* allocate and initialize dev->private */ 135 devpriv = kzalloc(sizeof(*devpriv), GFP_KERNEL);
135 if (alloc_private(dev, sizeof(struct labpc_private)) < 0) 136 if (!devpriv)
136 return -ENOMEM; 137 return -ENOMEM;
138 dev->private = devpriv;
137 139
138 /* get base address, irq etc. based on bustype */ 140 /* get base address, irq etc. based on bustype */
139 switch (thisboard->bustype) { 141 switch (thisboard->bustype) {
diff --git a/drivers/staging/comedi/drivers/ni_mio_common.c b/drivers/staging/comedi/drivers/ni_mio_common.c
index 3e5fdae93163..56dc59908d36 100644
--- a/drivers/staging/comedi/drivers/ni_mio_common.c
+++ b/drivers/staging/comedi/drivers/ni_mio_common.c
@@ -410,6 +410,7 @@ static void get_last_sample_6143(struct comedi_device *dev);
410static inline void ni_set_bitfield(struct comedi_device *dev, int reg, 410static inline void ni_set_bitfield(struct comedi_device *dev, int reg,
411 unsigned bit_mask, unsigned bit_values) 411 unsigned bit_mask, unsigned bit_values)
412{ 412{
413 struct ni_private *devpriv = dev->private;
413 unsigned long flags; 414 unsigned long flags;
414 415
415 spin_lock_irqsave(&devpriv->soft_reg_copy_lock, flags); 416 spin_lock_irqsave(&devpriv->soft_reg_copy_lock, flags);
@@ -506,6 +507,7 @@ static inline void ni_set_gpct_dma_channel(struct comedi_device *dev,
506static inline void ni_set_cdo_dma_channel(struct comedi_device *dev, 507static inline void ni_set_cdo_dma_channel(struct comedi_device *dev,
507 int mite_channel) 508 int mite_channel)
508{ 509{
510 struct ni_private *devpriv = dev->private;
509 unsigned long flags; 511 unsigned long flags;
510 512
511 spin_lock_irqsave(&devpriv->soft_reg_copy_lock, flags); 513 spin_lock_irqsave(&devpriv->soft_reg_copy_lock, flags);
@@ -525,6 +527,7 @@ static inline void ni_set_cdo_dma_channel(struct comedi_device *dev,
525 527
526static int ni_request_ai_mite_channel(struct comedi_device *dev) 528static int ni_request_ai_mite_channel(struct comedi_device *dev)
527{ 529{
530 struct ni_private *devpriv = dev->private;
528 unsigned long flags; 531 unsigned long flags;
529 532
530 spin_lock_irqsave(&devpriv->mite_channel_lock, flags); 533 spin_lock_irqsave(&devpriv->mite_channel_lock, flags);
@@ -545,6 +548,7 @@ static int ni_request_ai_mite_channel(struct comedi_device *dev)
545 548
546static int ni_request_ao_mite_channel(struct comedi_device *dev) 549static int ni_request_ao_mite_channel(struct comedi_device *dev)
547{ 550{
551 struct ni_private *devpriv = dev->private;
548 unsigned long flags; 552 unsigned long flags;
549 553
550 spin_lock_irqsave(&devpriv->mite_channel_lock, flags); 554 spin_lock_irqsave(&devpriv->mite_channel_lock, flags);
@@ -567,6 +571,7 @@ static int ni_request_gpct_mite_channel(struct comedi_device *dev,
567 unsigned gpct_index, 571 unsigned gpct_index,
568 enum comedi_io_direction direction) 572 enum comedi_io_direction direction)
569{ 573{
574 struct ni_private *devpriv = dev->private;
570 unsigned long flags; 575 unsigned long flags;
571 struct mite_channel *mite_chan; 576 struct mite_channel *mite_chan;
572 577
@@ -595,6 +600,7 @@ static int ni_request_gpct_mite_channel(struct comedi_device *dev,
595static int ni_request_cdo_mite_channel(struct comedi_device *dev) 600static int ni_request_cdo_mite_channel(struct comedi_device *dev)
596{ 601{
597#ifdef PCIDMA 602#ifdef PCIDMA
603 struct ni_private *devpriv = dev->private;
598 unsigned long flags; 604 unsigned long flags;
599 605
600 spin_lock_irqsave(&devpriv->mite_channel_lock, flags); 606 spin_lock_irqsave(&devpriv->mite_channel_lock, flags);
@@ -617,6 +623,7 @@ static int ni_request_cdo_mite_channel(struct comedi_device *dev)
617static void ni_release_ai_mite_channel(struct comedi_device *dev) 623static void ni_release_ai_mite_channel(struct comedi_device *dev)
618{ 624{
619#ifdef PCIDMA 625#ifdef PCIDMA
626 struct ni_private *devpriv = dev->private;
620 unsigned long flags; 627 unsigned long flags;
621 628
622 spin_lock_irqsave(&devpriv->mite_channel_lock, flags); 629 spin_lock_irqsave(&devpriv->mite_channel_lock, flags);
@@ -632,6 +639,7 @@ static void ni_release_ai_mite_channel(struct comedi_device *dev)
632static void ni_release_ao_mite_channel(struct comedi_device *dev) 639static void ni_release_ao_mite_channel(struct comedi_device *dev)
633{ 640{
634#ifdef PCIDMA 641#ifdef PCIDMA
642 struct ni_private *devpriv = dev->private;
635 unsigned long flags; 643 unsigned long flags;
636 644
637 spin_lock_irqsave(&devpriv->mite_channel_lock, flags); 645 spin_lock_irqsave(&devpriv->mite_channel_lock, flags);
@@ -648,6 +656,7 @@ static void ni_release_ao_mite_channel(struct comedi_device *dev)
648static void ni_release_gpct_mite_channel(struct comedi_device *dev, 656static void ni_release_gpct_mite_channel(struct comedi_device *dev,
649 unsigned gpct_index) 657 unsigned gpct_index)
650{ 658{
659 struct ni_private *devpriv = dev->private;
651 unsigned long flags; 660 unsigned long flags;
652 661
653 BUG_ON(gpct_index >= NUM_GPCT); 662 BUG_ON(gpct_index >= NUM_GPCT);
@@ -669,6 +678,7 @@ static void ni_release_gpct_mite_channel(struct comedi_device *dev,
669static void ni_release_cdo_mite_channel(struct comedi_device *dev) 678static void ni_release_cdo_mite_channel(struct comedi_device *dev)
670{ 679{
671#ifdef PCIDMA 680#ifdef PCIDMA
681 struct ni_private *devpriv = dev->private;
672 unsigned long flags; 682 unsigned long flags;
673 683
674 spin_lock_irqsave(&devpriv->mite_channel_lock, flags); 684 spin_lock_irqsave(&devpriv->mite_channel_lock, flags);
@@ -686,6 +696,8 @@ static void ni_release_cdo_mite_channel(struct comedi_device *dev)
686static void ni_e_series_enable_second_irq(struct comedi_device *dev, 696static void ni_e_series_enable_second_irq(struct comedi_device *dev,
687 unsigned gpct_index, short enable) 697 unsigned gpct_index, short enable)
688{ 698{
699 struct ni_private *devpriv = dev->private;
700
689 if (boardtype.reg_type & ni_reg_m_series_mask) 701 if (boardtype.reg_type & ni_reg_m_series_mask)
690 return; 702 return;
691 switch (gpct_index) { 703 switch (gpct_index) {
@@ -716,6 +728,8 @@ static void ni_e_series_enable_second_irq(struct comedi_device *dev,
716 728
717static void ni_clear_ai_fifo(struct comedi_device *dev) 729static void ni_clear_ai_fifo(struct comedi_device *dev)
718{ 730{
731 struct ni_private *devpriv = dev->private;
732
719 if (boardtype.reg_type == ni_reg_6143) { 733 if (boardtype.reg_type == ni_reg_6143) {
720 /* Flush the 6143 data FIFO */ 734 /* Flush the 6143 data FIFO */
721 ni_writel(0x10, AIFIFO_Control_6143); /* Flush fifo */ 735 ni_writel(0x10, AIFIFO_Control_6143); /* Flush fifo */
@@ -742,13 +756,17 @@ static void ni_clear_ai_fifo(struct comedi_device *dev)
742 756
743static void win_out2(struct comedi_device *dev, uint32_t data, int reg) 757static void win_out2(struct comedi_device *dev, uint32_t data, int reg)
744{ 758{
759 struct ni_private *devpriv = dev->private;
760
745 devpriv->stc_writew(dev, data >> 16, reg); 761 devpriv->stc_writew(dev, data >> 16, reg);
746 devpriv->stc_writew(dev, data & 0xffff, reg + 1); 762 devpriv->stc_writew(dev, data & 0xffff, reg + 1);
747} 763}
748 764
749static uint32_t win_in2(struct comedi_device *dev, int reg) 765static uint32_t win_in2(struct comedi_device *dev, int reg)
750{ 766{
767 struct ni_private *devpriv = dev->private;
751 uint32_t bits; 768 uint32_t bits;
769
752 bits = devpriv->stc_readw(dev, reg) << 16; 770 bits = devpriv->stc_readw(dev, reg) << 16;
753 bits |= devpriv->stc_readw(dev, reg + 1); 771 bits |= devpriv->stc_readw(dev, reg + 1);
754 return bits; 772 return bits;
@@ -758,6 +776,7 @@ static uint32_t win_in2(struct comedi_device *dev, int reg)
758static inline void ni_ao_win_outw(struct comedi_device *dev, uint16_t data, 776static inline void ni_ao_win_outw(struct comedi_device *dev, uint16_t data,
759 int addr) 777 int addr)
760{ 778{
779 struct ni_private *devpriv = dev->private;
761 unsigned long flags; 780 unsigned long flags;
762 781
763 spin_lock_irqsave(&devpriv->window_lock, flags); 782 spin_lock_irqsave(&devpriv->window_lock, flags);
@@ -769,6 +788,7 @@ static inline void ni_ao_win_outw(struct comedi_device *dev, uint16_t data,
769static inline void ni_ao_win_outl(struct comedi_device *dev, uint32_t data, 788static inline void ni_ao_win_outl(struct comedi_device *dev, uint32_t data,
770 int addr) 789 int addr)
771{ 790{
791 struct ni_private *devpriv = dev->private;
772 unsigned long flags; 792 unsigned long flags;
773 793
774 spin_lock_irqsave(&devpriv->window_lock, flags); 794 spin_lock_irqsave(&devpriv->window_lock, flags);
@@ -779,6 +799,7 @@ static inline void ni_ao_win_outl(struct comedi_device *dev, uint32_t data,
779 799
780static inline unsigned short ni_ao_win_inw(struct comedi_device *dev, int addr) 800static inline unsigned short ni_ao_win_inw(struct comedi_device *dev, int addr)
781{ 801{
802 struct ni_private *devpriv = dev->private;
782 unsigned long flags; 803 unsigned long flags;
783 unsigned short data; 804 unsigned short data;
784 805
@@ -814,6 +835,7 @@ static inline void ni_set_bits(struct comedi_device *dev, int reg,
814static irqreturn_t ni_E_interrupt(int irq, void *d) 835static irqreturn_t ni_E_interrupt(int irq, void *d)
815{ 836{
816 struct comedi_device *dev = d; 837 struct comedi_device *dev = d;
838 struct ni_private *devpriv = dev->private;
817 unsigned short a_status; 839 unsigned short a_status;
818 unsigned short b_status; 840 unsigned short b_status;
819 unsigned int ai_mite_status = 0; 841 unsigned int ai_mite_status = 0;
@@ -872,6 +894,7 @@ static irqreturn_t ni_E_interrupt(int irq, void *d)
872#ifdef PCIDMA 894#ifdef PCIDMA
873static void ni_sync_ai_dma(struct comedi_device *dev) 895static void ni_sync_ai_dma(struct comedi_device *dev)
874{ 896{
897 struct ni_private *devpriv = dev->private;
875 struct comedi_subdevice *s = &dev->subdevices[NI_AI_SUBDEV]; 898 struct comedi_subdevice *s = &dev->subdevices[NI_AI_SUBDEV];
876 unsigned long flags; 899 unsigned long flags;
877 900
@@ -884,6 +907,7 @@ static void ni_sync_ai_dma(struct comedi_device *dev)
884static void mite_handle_b_linkc(struct mite_struct *mite, 907static void mite_handle_b_linkc(struct mite_struct *mite,
885 struct comedi_device *dev) 908 struct comedi_device *dev)
886{ 909{
910 struct ni_private *devpriv = dev->private;
887 struct comedi_subdevice *s = &dev->subdevices[NI_AO_SUBDEV]; 911 struct comedi_subdevice *s = &dev->subdevices[NI_AO_SUBDEV];
888 unsigned long flags; 912 unsigned long flags;
889 913
@@ -896,6 +920,7 @@ static void mite_handle_b_linkc(struct mite_struct *mite,
896 920
897static int ni_ao_wait_for_dma_load(struct comedi_device *dev) 921static int ni_ao_wait_for_dma_load(struct comedi_device *dev)
898{ 922{
923 struct ni_private *devpriv = dev->private;
899 static const int timeout = 10000; 924 static const int timeout = 10000;
900 int i; 925 int i;
901 for (i = 0; i < timeout; i++) { 926 for (i = 0; i < timeout; i++) {
@@ -918,6 +943,8 @@ static int ni_ao_wait_for_dma_load(struct comedi_device *dev)
918#endif /* PCIDMA */ 943#endif /* PCIDMA */
919static void ni_handle_eos(struct comedi_device *dev, struct comedi_subdevice *s) 944static void ni_handle_eos(struct comedi_device *dev, struct comedi_subdevice *s)
920{ 945{
946 struct ni_private *devpriv = dev->private;
947
921 if (devpriv->aimode == AIMODE_SCAN) { 948 if (devpriv->aimode == AIMODE_SCAN) {
922#ifdef PCIDMA 949#ifdef PCIDMA
923 static const int timeout = 10; 950 static const int timeout = 10;
@@ -984,6 +1011,7 @@ static void handle_gpct_interrupt(struct comedi_device *dev,
984 unsigned short counter_index) 1011 unsigned short counter_index)
985{ 1012{
986#ifdef PCIDMA 1013#ifdef PCIDMA
1014 struct ni_private *devpriv = dev->private;
987 struct comedi_subdevice *s; 1015 struct comedi_subdevice *s;
988 1016
989 s = &dev->subdevices[NI_GPCT_SUBDEV(counter_index)]; 1017 s = &dev->subdevices[NI_GPCT_SUBDEV(counter_index)];
@@ -997,6 +1025,7 @@ static void handle_gpct_interrupt(struct comedi_device *dev,
997 1025
998static void ack_a_interrupt(struct comedi_device *dev, unsigned short a_status) 1026static void ack_a_interrupt(struct comedi_device *dev, unsigned short a_status)
999{ 1027{
1028 struct ni_private *devpriv = dev->private;
1000 unsigned short ack = 0; 1029 unsigned short ack = 0;
1001 1030
1002 if (a_status & AI_SC_TC_St) { 1031 if (a_status & AI_SC_TC_St) {
@@ -1019,6 +1048,7 @@ static void ack_a_interrupt(struct comedi_device *dev, unsigned short a_status)
1019static void handle_a_interrupt(struct comedi_device *dev, unsigned short status, 1048static void handle_a_interrupt(struct comedi_device *dev, unsigned short status,
1020 unsigned ai_mite_status) 1049 unsigned ai_mite_status)
1021{ 1050{
1051 struct ni_private *devpriv = dev->private;
1022 struct comedi_subdevice *s = &dev->subdevices[NI_AI_SUBDEV]; 1052 struct comedi_subdevice *s = &dev->subdevices[NI_AI_SUBDEV];
1023 1053
1024 /* 67xx boards don't have ai subdevice, but their gpct0 might generate an a interrupt */ 1054 /* 67xx boards don't have ai subdevice, but their gpct0 might generate an a interrupt */
@@ -1122,7 +1152,9 @@ static void handle_a_interrupt(struct comedi_device *dev, unsigned short status,
1122 1152
1123static void ack_b_interrupt(struct comedi_device *dev, unsigned short b_status) 1153static void ack_b_interrupt(struct comedi_device *dev, unsigned short b_status)
1124{ 1154{
1155 struct ni_private *devpriv = dev->private;
1125 unsigned short ack = 0; 1156 unsigned short ack = 0;
1157
1126 if (b_status & AO_BC_TC_St) { 1158 if (b_status & AO_BC_TC_St) {
1127 ack |= AO_BC_TC_Interrupt_Ack; 1159 ack |= AO_BC_TC_Interrupt_Ack;
1128 } 1160 }
@@ -1151,8 +1183,10 @@ static void ack_b_interrupt(struct comedi_device *dev, unsigned short b_status)
1151static void handle_b_interrupt(struct comedi_device *dev, 1183static void handle_b_interrupt(struct comedi_device *dev,
1152 unsigned short b_status, unsigned ao_mite_status) 1184 unsigned short b_status, unsigned ao_mite_status)
1153{ 1185{
1186 struct ni_private *devpriv = dev->private;
1154 struct comedi_subdevice *s = &dev->subdevices[NI_AO_SUBDEV]; 1187 struct comedi_subdevice *s = &dev->subdevices[NI_AO_SUBDEV];
1155 /* unsigned short ack=0; */ 1188 /* unsigned short ack=0; */
1189
1156#ifdef DEBUG_INTERRUPT 1190#ifdef DEBUG_INTERRUPT
1157 printk("ni_mio_common: interrupt: b_status=%04x m1_status=%08x\n", 1191 printk("ni_mio_common: interrupt: b_status=%04x m1_status=%08x\n",
1158 b_status, ao_mite_status); 1192 b_status, ao_mite_status);
@@ -1340,6 +1374,7 @@ static int ni_ao_fifo_half_empty(struct comedi_device *dev,
1340static int ni_ao_prep_fifo(struct comedi_device *dev, 1374static int ni_ao_prep_fifo(struct comedi_device *dev,
1341 struct comedi_subdevice *s) 1375 struct comedi_subdevice *s)
1342{ 1376{
1377 struct ni_private *devpriv = dev->private;
1343 int n; 1378 int n;
1344 1379
1345 /* reset fifo */ 1380 /* reset fifo */
@@ -1364,6 +1399,7 @@ static int ni_ao_prep_fifo(struct comedi_device *dev,
1364static void ni_ai_fifo_read(struct comedi_device *dev, 1399static void ni_ai_fifo_read(struct comedi_device *dev,
1365 struct comedi_subdevice *s, int n) 1400 struct comedi_subdevice *s, int n)
1366{ 1401{
1402 struct ni_private *devpriv = dev->private;
1367 struct comedi_async *async = s->async; 1403 struct comedi_async *async = s->async;
1368 int i; 1404 int i;
1369 1405
@@ -1434,6 +1470,7 @@ static void ni_handle_fifo_half_full(struct comedi_device *dev)
1434#ifdef PCIDMA 1470#ifdef PCIDMA
1435static int ni_ai_drain_dma(struct comedi_device *dev) 1471static int ni_ai_drain_dma(struct comedi_device *dev)
1436{ 1472{
1473 struct ni_private *devpriv = dev->private;
1437 int i; 1474 int i;
1438 static const int timeout = 10000; 1475 static const int timeout = 10000;
1439 unsigned long flags; 1476 unsigned long flags;
@@ -1471,6 +1508,7 @@ static int ni_ai_drain_dma(struct comedi_device *dev)
1471*/ 1508*/
1472static void ni_handle_fifo_dregs(struct comedi_device *dev) 1509static void ni_handle_fifo_dregs(struct comedi_device *dev)
1473{ 1510{
1511 struct ni_private *devpriv = dev->private;
1474 struct comedi_subdevice *s = &dev->subdevices[NI_AI_SUBDEV]; 1512 struct comedi_subdevice *s = &dev->subdevices[NI_AI_SUBDEV];
1475 short data[2]; 1513 short data[2];
1476 u32 dl; 1514 u32 dl;
@@ -1535,6 +1573,7 @@ static void ni_handle_fifo_dregs(struct comedi_device *dev)
1535 1573
1536static void get_last_sample_611x(struct comedi_device *dev) 1574static void get_last_sample_611x(struct comedi_device *dev)
1537{ 1575{
1576 struct ni_private *devpriv __maybe_unused = dev->private;
1538 struct comedi_subdevice *s = &dev->subdevices[NI_AI_SUBDEV]; 1577 struct comedi_subdevice *s = &dev->subdevices[NI_AI_SUBDEV];
1539 short data; 1578 short data;
1540 u32 dl; 1579 u32 dl;
@@ -1552,6 +1591,7 @@ static void get_last_sample_611x(struct comedi_device *dev)
1552 1591
1553static void get_last_sample_6143(struct comedi_device *dev) 1592static void get_last_sample_6143(struct comedi_device *dev)
1554{ 1593{
1594 struct ni_private *devpriv __maybe_unused = dev->private;
1555 struct comedi_subdevice *s = &dev->subdevices[NI_AI_SUBDEV]; 1595 struct comedi_subdevice *s = &dev->subdevices[NI_AI_SUBDEV];
1556 short data; 1596 short data;
1557 u32 dl; 1597 u32 dl;
@@ -1574,11 +1614,13 @@ static void ni_ai_munge(struct comedi_device *dev, struct comedi_subdevice *s,
1574 void *data, unsigned int num_bytes, 1614 void *data, unsigned int num_bytes,
1575 unsigned int chan_index) 1615 unsigned int chan_index)
1576{ 1616{
1617 struct ni_private *devpriv = dev->private;
1577 struct comedi_async *async = s->async; 1618 struct comedi_async *async = s->async;
1578 unsigned int i; 1619 unsigned int i;
1579 unsigned int length = num_bytes / bytes_per_sample(s); 1620 unsigned int length = num_bytes / bytes_per_sample(s);
1580 short *array = data; 1621 short *array = data;
1581 unsigned int *larray = data; 1622 unsigned int *larray = data;
1623
1582 for (i = 0; i < length; i++) { 1624 for (i = 0; i < length; i++) {
1583#ifdef PCIDMA 1625#ifdef PCIDMA
1584 if (s->subdev_flags & SDF_LSAMPL) 1626 if (s->subdev_flags & SDF_LSAMPL)
@@ -1599,6 +1641,7 @@ static void ni_ai_munge(struct comedi_device *dev, struct comedi_subdevice *s,
1599 1641
1600static int ni_ai_setup_MITE_dma(struct comedi_device *dev) 1642static int ni_ai_setup_MITE_dma(struct comedi_device *dev)
1601{ 1643{
1644 struct ni_private *devpriv = dev->private;
1602 struct comedi_subdevice *s = &dev->subdevices[NI_AI_SUBDEV]; 1645 struct comedi_subdevice *s = &dev->subdevices[NI_AI_SUBDEV];
1603 int retval; 1646 int retval;
1604 unsigned long flags; 1647 unsigned long flags;
@@ -1638,6 +1681,7 @@ static int ni_ai_setup_MITE_dma(struct comedi_device *dev)
1638 1681
1639static int ni_ao_setup_MITE_dma(struct comedi_device *dev) 1682static int ni_ao_setup_MITE_dma(struct comedi_device *dev)
1640{ 1683{
1684 struct ni_private *devpriv = dev->private;
1641 struct comedi_subdevice *s = &dev->subdevices[NI_AO_SUBDEV]; 1685 struct comedi_subdevice *s = &dev->subdevices[NI_AO_SUBDEV];
1642 int retval; 1686 int retval;
1643 unsigned long flags; 1687 unsigned long flags;
@@ -1676,6 +1720,8 @@ static int ni_ao_setup_MITE_dma(struct comedi_device *dev)
1676 1720
1677static int ni_ai_reset(struct comedi_device *dev, struct comedi_subdevice *s) 1721static int ni_ai_reset(struct comedi_device *dev, struct comedi_subdevice *s)
1678{ 1722{
1723 struct ni_private *devpriv = dev->private;
1724
1679 ni_release_ai_mite_channel(dev); 1725 ni_release_ai_mite_channel(dev);
1680 /* ai configuration */ 1726 /* ai configuration */
1681 devpriv->stc_writew(dev, AI_Configuration_Start | AI_Reset, 1727 devpriv->stc_writew(dev, AI_Configuration_Start | AI_Reset,
@@ -1786,6 +1832,7 @@ static int ni_ai_insn_read(struct comedi_device *dev,
1786 struct comedi_subdevice *s, struct comedi_insn *insn, 1832 struct comedi_subdevice *s, struct comedi_insn *insn,
1787 unsigned int *data) 1833 unsigned int *data)
1788{ 1834{
1835 struct ni_private *devpriv = dev->private;
1789 int i, n; 1836 int i, n;
1790 const unsigned int mask = (1 << boardtype.adbits) - 1; 1837 const unsigned int mask = (1 << boardtype.adbits) - 1;
1791 unsigned signbits; 1838 unsigned signbits;
@@ -1881,7 +1928,9 @@ static int ni_ai_insn_read(struct comedi_device *dev,
1881 1928
1882static void ni_prime_channelgain_list(struct comedi_device *dev) 1929static void ni_prime_channelgain_list(struct comedi_device *dev)
1883{ 1930{
1931 struct ni_private *devpriv = dev->private;
1884 int i; 1932 int i;
1933
1885 devpriv->stc_writew(dev, AI_CONVERT_Pulse, AI_Command_1_Register); 1934 devpriv->stc_writew(dev, AI_CONVERT_Pulse, AI_Command_1_Register);
1886 for (i = 0; i < NI_TIMEOUT; ++i) { 1935 for (i = 0; i < NI_TIMEOUT; ++i) {
1887 if (!(devpriv->stc_readw(dev, 1936 if (!(devpriv->stc_readw(dev,
@@ -1899,6 +1948,7 @@ static void ni_m_series_load_channelgain_list(struct comedi_device *dev,
1899 unsigned int n_chan, 1948 unsigned int n_chan,
1900 unsigned int *list) 1949 unsigned int *list)
1901{ 1950{
1951 struct ni_private *devpriv = dev->private;
1902 unsigned int chan, range, aref; 1952 unsigned int chan, range, aref;
1903 unsigned int i; 1953 unsigned int i;
1904 unsigned offset; 1954 unsigned offset;
@@ -2004,6 +2054,7 @@ static void ni_m_series_load_channelgain_list(struct comedi_device *dev,
2004static void ni_load_channelgain_list(struct comedi_device *dev, 2054static void ni_load_channelgain_list(struct comedi_device *dev,
2005 unsigned int n_chan, unsigned int *list) 2055 unsigned int n_chan, unsigned int *list)
2006{ 2056{
2057 struct ni_private *devpriv = dev->private;
2007 unsigned int chan, range, aref; 2058 unsigned int chan, range, aref;
2008 unsigned int i; 2059 unsigned int i;
2009 unsigned int hi, lo; 2060 unsigned int hi, lo;
@@ -2122,7 +2173,9 @@ static void ni_load_channelgain_list(struct comedi_device *dev,
2122static int ni_ns_to_timer(const struct comedi_device *dev, unsigned nanosec, 2173static int ni_ns_to_timer(const struct comedi_device *dev, unsigned nanosec,
2123 int round_mode) 2174 int round_mode)
2124{ 2175{
2176 struct ni_private *devpriv = dev->private;
2125 int divider; 2177 int divider;
2178
2126 switch (round_mode) { 2179 switch (round_mode) {
2127 case TRIG_ROUND_NEAREST: 2180 case TRIG_ROUND_NEAREST:
2128 default: 2181 default:
@@ -2140,6 +2193,8 @@ static int ni_ns_to_timer(const struct comedi_device *dev, unsigned nanosec,
2140 2193
2141static unsigned ni_timer_to_ns(const struct comedi_device *dev, int timer) 2194static unsigned ni_timer_to_ns(const struct comedi_device *dev, int timer)
2142{ 2195{
2196 struct ni_private *devpriv = dev->private;
2197
2143 return devpriv->clock_ns * (timer + 1); 2198 return devpriv->clock_ns * (timer + 1);
2144} 2199}
2145 2200
@@ -2162,6 +2217,7 @@ static unsigned ni_min_ai_scan_period_ns(struct comedi_device *dev,
2162static int ni_ai_cmdtest(struct comedi_device *dev, struct comedi_subdevice *s, 2217static int ni_ai_cmdtest(struct comedi_device *dev, struct comedi_subdevice *s,
2163 struct comedi_cmd *cmd) 2218 struct comedi_cmd *cmd)
2164{ 2219{
2220 struct ni_private *devpriv = dev->private;
2165 int err = 0; 2221 int err = 0;
2166 int tmp; 2222 int tmp;
2167 unsigned int sources; 2223 unsigned int sources;
@@ -2200,7 +2256,7 @@ static int ni_ai_cmdtest(struct comedi_device *dev, struct comedi_subdevice *s,
2200 if (err) 2256 if (err)
2201 return 2; 2257 return 2;
2202 2258
2203 /* step 3: make sure arguments are trivially compatible */ 2259 /* Step 3: check if arguments are trivially valid */
2204 2260
2205 if (cmd->start_src == TRIG_EXT) { 2261 if (cmd->start_src == TRIG_EXT) {
2206 /* external trigger */ 2262 /* external trigger */
@@ -2209,30 +2265,17 @@ static int ni_ai_cmdtest(struct comedi_device *dev, struct comedi_subdevice *s,
2209 if (tmp > 16) 2265 if (tmp > 16)
2210 tmp = 16; 2266 tmp = 16;
2211 tmp |= (cmd->start_arg & (CR_INVERT | CR_EDGE)); 2267 tmp |= (cmd->start_arg & (CR_INVERT | CR_EDGE));
2212 if (cmd->start_arg != tmp) { 2268 err |= cfc_check_trigger_arg_is(&cmd->start_arg, tmp);
2213 cmd->start_arg = tmp;
2214 err++;
2215 }
2216 } else { 2269 } else {
2217 if (cmd->start_arg != 0) { 2270 /* true for both TRIG_NOW and TRIG_INT */
2218 /* true for both TRIG_NOW and TRIG_INT */ 2271 err |= cfc_check_trigger_arg_is(&cmd->start_arg, 0);
2219 cmd->start_arg = 0;
2220 err++;
2221 }
2222 } 2272 }
2273
2223 if (cmd->scan_begin_src == TRIG_TIMER) { 2274 if (cmd->scan_begin_src == TRIG_TIMER) {
2224 if (cmd->scan_begin_arg < ni_min_ai_scan_period_ns(dev, 2275 err |= cfc_check_trigger_arg_min(&cmd->scan_begin_arg,
2225 cmd-> 2276 ni_min_ai_scan_period_ns(dev, cmd->chanlist_len));
2226 chanlist_len)) 2277 err |= cfc_check_trigger_arg_max(&cmd->scan_begin_arg,
2227 { 2278 devpriv->clock_ns * 0xffffff);
2228 cmd->scan_begin_arg =
2229 ni_min_ai_scan_period_ns(dev, cmd->chanlist_len);
2230 err++;
2231 }
2232 if (cmd->scan_begin_arg > devpriv->clock_ns * 0xffffff) {
2233 cmd->scan_begin_arg = devpriv->clock_ns * 0xffffff;
2234 err++;
2235 }
2236 } else if (cmd->scan_begin_src == TRIG_EXT) { 2279 } else if (cmd->scan_begin_src == TRIG_EXT) {
2237 /* external trigger */ 2280 /* external trigger */
2238 unsigned int tmp = CR_CHAN(cmd->scan_begin_arg); 2281 unsigned int tmp = CR_CHAN(cmd->scan_begin_arg);
@@ -2240,32 +2283,20 @@ static int ni_ai_cmdtest(struct comedi_device *dev, struct comedi_subdevice *s,
2240 if (tmp > 16) 2283 if (tmp > 16)
2241 tmp = 16; 2284 tmp = 16;
2242 tmp |= (cmd->scan_begin_arg & (CR_INVERT | CR_EDGE)); 2285 tmp |= (cmd->scan_begin_arg & (CR_INVERT | CR_EDGE));
2243 if (cmd->scan_begin_arg != tmp) { 2286 err |= cfc_check_trigger_arg_is(&cmd->scan_begin_arg, tmp);
2244 cmd->scan_begin_arg = tmp;
2245 err++;
2246 }
2247 } else { /* TRIG_OTHER */ 2287 } else { /* TRIG_OTHER */
2248 if (cmd->scan_begin_arg) { 2288 err |= cfc_check_trigger_arg_is(&cmd->scan_begin_arg, 0);
2249 cmd->scan_begin_arg = 0;
2250 err++;
2251 }
2252 } 2289 }
2290
2253 if (cmd->convert_src == TRIG_TIMER) { 2291 if (cmd->convert_src == TRIG_TIMER) {
2254 if ((boardtype.reg_type == ni_reg_611x) 2292 if ((boardtype.reg_type == ni_reg_611x)
2255 || (boardtype.reg_type == ni_reg_6143)) { 2293 || (boardtype.reg_type == ni_reg_6143)) {
2256 if (cmd->convert_arg != 0) { 2294 err |= cfc_check_trigger_arg_is(&cmd->convert_arg, 0);
2257 cmd->convert_arg = 0;
2258 err++;
2259 }
2260 } else { 2295 } else {
2261 if (cmd->convert_arg < boardtype.ai_speed) { 2296 err |= cfc_check_trigger_arg_min(&cmd->convert_arg,
2262 cmd->convert_arg = boardtype.ai_speed; 2297 boardtype.ai_speed);
2263 err++; 2298 err |= cfc_check_trigger_arg_max(&cmd->convert_arg,
2264 } 2299 devpriv->clock_ns * 0xffff);
2265 if (cmd->convert_arg > devpriv->clock_ns * 0xffff) {
2266 cmd->convert_arg = devpriv->clock_ns * 0xffff;
2267 err++;
2268 }
2269 } 2300 }
2270 } else if (cmd->convert_src == TRIG_EXT) { 2301 } else if (cmd->convert_src == TRIG_EXT) {
2271 /* external trigger */ 2302 /* external trigger */
@@ -2274,40 +2305,23 @@ static int ni_ai_cmdtest(struct comedi_device *dev, struct comedi_subdevice *s,
2274 if (tmp > 16) 2305 if (tmp > 16)
2275 tmp = 16; 2306 tmp = 16;
2276 tmp |= (cmd->convert_arg & (CR_ALT_FILTER | CR_INVERT)); 2307 tmp |= (cmd->convert_arg & (CR_ALT_FILTER | CR_INVERT));
2277 if (cmd->convert_arg != tmp) { 2308 err |= cfc_check_trigger_arg_is(&cmd->convert_arg, tmp);
2278 cmd->convert_arg = tmp;
2279 err++;
2280 }
2281 } else if (cmd->convert_src == TRIG_NOW) { 2309 } else if (cmd->convert_src == TRIG_NOW) {
2282 if (cmd->convert_arg != 0) { 2310 err |= cfc_check_trigger_arg_is(&cmd->convert_arg, 0);
2283 cmd->convert_arg = 0;
2284 err++;
2285 }
2286 } 2311 }
2287 2312
2288 if (cmd->scan_end_arg != cmd->chanlist_len) { 2313 err |= cfc_check_trigger_arg_is(&cmd->scan_end_arg, cmd->chanlist_len);
2289 cmd->scan_end_arg = cmd->chanlist_len; 2314
2290 err++;
2291 }
2292 if (cmd->stop_src == TRIG_COUNT) { 2315 if (cmd->stop_src == TRIG_COUNT) {
2293 unsigned int max_count = 0x01000000; 2316 unsigned int max_count = 0x01000000;
2294 2317
2295 if (boardtype.reg_type == ni_reg_611x) 2318 if (boardtype.reg_type == ni_reg_611x)
2296 max_count -= num_adc_stages_611x; 2319 max_count -= num_adc_stages_611x;
2297 if (cmd->stop_arg > max_count) { 2320 err |= cfc_check_trigger_arg_max(&cmd->stop_arg, max_count);
2298 cmd->stop_arg = max_count; 2321 err |= cfc_check_trigger_arg_min(&cmd->stop_arg, 1);
2299 err++;
2300 }
2301 if (cmd->stop_arg < 1) {
2302 cmd->stop_arg = 1;
2303 err++;
2304 }
2305 } else { 2322 } else {
2306 /* TRIG_NONE */ 2323 /* TRIG_NONE */
2307 if (cmd->stop_arg != 0) { 2324 err |= cfc_check_trigger_arg_is(&cmd->stop_arg, 0);
2308 cmd->stop_arg = 0;
2309 err++;
2310 }
2311 } 2325 }
2312 2326
2313 if (err) 2327 if (err)
@@ -2356,6 +2370,7 @@ static int ni_ai_cmdtest(struct comedi_device *dev, struct comedi_subdevice *s,
2356 2370
2357static int ni_ai_cmd(struct comedi_device *dev, struct comedi_subdevice *s) 2371static int ni_ai_cmd(struct comedi_device *dev, struct comedi_subdevice *s)
2358{ 2372{
2373 struct ni_private *devpriv = dev->private;
2359 const struct comedi_cmd *cmd = &s->async->cmd; 2374 const struct comedi_cmd *cmd = &s->async->cmd;
2360 int timer; 2375 int timer;
2361 int mode1 = 0; /* mode1 is needed for both stop and convert */ 2376 int mode1 = 0; /* mode1 is needed for both stop and convert */
@@ -2662,6 +2677,8 @@ static int ni_ai_cmd(struct comedi_device *dev, struct comedi_subdevice *s)
2662static int ni_ai_inttrig(struct comedi_device *dev, struct comedi_subdevice *s, 2677static int ni_ai_inttrig(struct comedi_device *dev, struct comedi_subdevice *s,
2663 unsigned int trignum) 2678 unsigned int trignum)
2664{ 2679{
2680 struct ni_private *devpriv = dev->private;
2681
2665 if (trignum != 0) 2682 if (trignum != 0)
2666 return -EINVAL; 2683 return -EINVAL;
2667 2684
@@ -2681,6 +2698,8 @@ static int ni_ai_insn_config(struct comedi_device *dev,
2681 struct comedi_subdevice *s, 2698 struct comedi_subdevice *s,
2682 struct comedi_insn *insn, unsigned int *data) 2699 struct comedi_insn *insn, unsigned int *data)
2683{ 2700{
2701 struct ni_private *devpriv = dev->private;
2702
2684 if (insn->n < 1) 2703 if (insn->n < 1)
2685 return -EINVAL; 2704 return -EINVAL;
2686 2705
@@ -2734,6 +2753,7 @@ static int ni_ai_config_analog_trig(struct comedi_device *dev,
2734 struct comedi_insn *insn, 2753 struct comedi_insn *insn,
2735 unsigned int *data) 2754 unsigned int *data)
2736{ 2755{
2756 struct ni_private *devpriv = dev->private;
2737 unsigned int a, b, modebits; 2757 unsigned int a, b, modebits;
2738 int err = 0; 2758 int err = 0;
2739 2759
@@ -2857,6 +2877,7 @@ static int ni_m_series_ao_config_chanlist(struct comedi_device *dev,
2857 unsigned int chanspec[], 2877 unsigned int chanspec[],
2858 unsigned int n_chans, int timed) 2878 unsigned int n_chans, int timed)
2859{ 2879{
2880 struct ni_private *devpriv = dev->private;
2860 unsigned int range; 2881 unsigned int range;
2861 unsigned int chan; 2882 unsigned int chan;
2862 unsigned int conf; 2883 unsigned int conf;
@@ -2928,6 +2949,7 @@ static int ni_old_ao_config_chanlist(struct comedi_device *dev,
2928 unsigned int chanspec[], 2949 unsigned int chanspec[],
2929 unsigned int n_chans) 2950 unsigned int n_chans)
2930{ 2951{
2952 struct ni_private *devpriv = dev->private;
2931 unsigned int range; 2953 unsigned int range;
2932 unsigned int chan; 2954 unsigned int chan;
2933 unsigned int conf; 2955 unsigned int conf;
@@ -2984,6 +3006,8 @@ static int ni_ao_insn_read(struct comedi_device *dev,
2984 struct comedi_subdevice *s, struct comedi_insn *insn, 3006 struct comedi_subdevice *s, struct comedi_insn *insn,
2985 unsigned int *data) 3007 unsigned int *data)
2986{ 3008{
3009 struct ni_private *devpriv = dev->private;
3010
2987 data[0] = devpriv->ao[CR_CHAN(insn->chanspec)]; 3011 data[0] = devpriv->ao[CR_CHAN(insn->chanspec)];
2988 3012
2989 return 1; 3013 return 1;
@@ -2993,6 +3017,7 @@ static int ni_ao_insn_write(struct comedi_device *dev,
2993 struct comedi_subdevice *s, 3017 struct comedi_subdevice *s,
2994 struct comedi_insn *insn, unsigned int *data) 3018 struct comedi_insn *insn, unsigned int *data)
2995{ 3019{
3020 struct ni_private *devpriv = dev->private;
2996 unsigned int chan = CR_CHAN(insn->chanspec); 3021 unsigned int chan = CR_CHAN(insn->chanspec);
2997 unsigned int invert; 3022 unsigned int invert;
2998 3023
@@ -3013,6 +3038,7 @@ static int ni_ao_insn_write_671x(struct comedi_device *dev,
3013 struct comedi_subdevice *s, 3038 struct comedi_subdevice *s,
3014 struct comedi_insn *insn, unsigned int *data) 3039 struct comedi_insn *insn, unsigned int *data)
3015{ 3040{
3041 struct ni_private *devpriv = dev->private;
3016 unsigned int chan = CR_CHAN(insn->chanspec); 3042 unsigned int chan = CR_CHAN(insn->chanspec);
3017 unsigned int invert; 3043 unsigned int invert;
3018 3044
@@ -3031,6 +3057,8 @@ static int ni_ao_insn_config(struct comedi_device *dev,
3031 struct comedi_subdevice *s, 3057 struct comedi_subdevice *s,
3032 struct comedi_insn *insn, unsigned int *data) 3058 struct comedi_insn *insn, unsigned int *data)
3033{ 3059{
3060 struct ni_private *devpriv = dev->private;
3061
3034 switch (data[0]) { 3062 switch (data[0]) {
3035 case INSN_CONFIG_GET_HARDWARE_BUFFER_SIZE: 3063 case INSN_CONFIG_GET_HARDWARE_BUFFER_SIZE:
3036 switch (data[1]) { 3064 switch (data[1]) {
@@ -3057,6 +3085,7 @@ static int ni_ao_insn_config(struct comedi_device *dev,
3057static int ni_ao_inttrig(struct comedi_device *dev, struct comedi_subdevice *s, 3085static int ni_ao_inttrig(struct comedi_device *dev, struct comedi_subdevice *s,
3058 unsigned int trignum) 3086 unsigned int trignum)
3059{ 3087{
3088 struct ni_private *devpriv = dev->private;
3060 int ret; 3089 int ret;
3061 int interrupt_b_bits; 3090 int interrupt_b_bits;
3062 int i; 3091 int i;
@@ -3126,6 +3155,7 @@ static int ni_ao_inttrig(struct comedi_device *dev, struct comedi_subdevice *s,
3126 3155
3127static int ni_ao_cmd(struct comedi_device *dev, struct comedi_subdevice *s) 3156static int ni_ao_cmd(struct comedi_device *dev, struct comedi_subdevice *s)
3128{ 3157{
3158 struct ni_private *devpriv = dev->private;
3129 const struct comedi_cmd *cmd = &s->async->cmd; 3159 const struct comedi_cmd *cmd = &s->async->cmd;
3130 int bits; 3160 int bits;
3131 int i; 3161 int i;
@@ -3330,6 +3360,7 @@ static int ni_ao_cmd(struct comedi_device *dev, struct comedi_subdevice *s)
3330static int ni_ao_cmdtest(struct comedi_device *dev, struct comedi_subdevice *s, 3360static int ni_ao_cmdtest(struct comedi_device *dev, struct comedi_subdevice *s,
3331 struct comedi_cmd *cmd) 3361 struct comedi_cmd *cmd)
3332{ 3362{
3363 struct ni_private *devpriv = dev->private;
3333 int err = 0; 3364 int err = 0;
3334 int tmp; 3365 int tmp;
3335 3366
@@ -3359,7 +3390,7 @@ static int ni_ao_cmdtest(struct comedi_device *dev, struct comedi_subdevice *s,
3359 if (err) 3390 if (err)
3360 return 2; 3391 return 2;
3361 3392
3362 /* step 3: make sure arguments are trivially compatible */ 3393 /* Step 3: check if arguments are trivially valid */
3363 3394
3364 if (cmd->start_src == TRIG_EXT) { 3395 if (cmd->start_src == TRIG_EXT) {
3365 /* external trigger */ 3396 /* external trigger */
@@ -3368,48 +3399,27 @@ static int ni_ao_cmdtest(struct comedi_device *dev, struct comedi_subdevice *s,
3368 if (tmp > 18) 3399 if (tmp > 18)
3369 tmp = 18; 3400 tmp = 18;
3370 tmp |= (cmd->start_arg & (CR_INVERT | CR_EDGE)); 3401 tmp |= (cmd->start_arg & (CR_INVERT | CR_EDGE));
3371 if (cmd->start_arg != tmp) { 3402 err |= cfc_check_trigger_arg_is(&cmd->start_arg, tmp);
3372 cmd->start_arg = tmp;
3373 err++;
3374 }
3375 } else { 3403 } else {
3376 if (cmd->start_arg != 0) { 3404 /* true for both TRIG_NOW and TRIG_INT */
3377 /* true for both TRIG_NOW and TRIG_INT */ 3405 err |= cfc_check_trigger_arg_is(&cmd->start_arg, 0);
3378 cmd->start_arg = 0;
3379 err++;
3380 }
3381 } 3406 }
3407
3382 if (cmd->scan_begin_src == TRIG_TIMER) { 3408 if (cmd->scan_begin_src == TRIG_TIMER) {
3383 if (cmd->scan_begin_arg < boardtype.ao_speed) { 3409 err |= cfc_check_trigger_arg_min(&cmd->scan_begin_arg,
3384 cmd->scan_begin_arg = boardtype.ao_speed; 3410 boardtype.ao_speed);
3385 err++; 3411 err |= cfc_check_trigger_arg_max(&cmd->scan_begin_arg,
3386 } 3412 devpriv->clock_ns * 0xffffff);
3387 if (cmd->scan_begin_arg > devpriv->clock_ns * 0xffffff) { /* XXX check */
3388 cmd->scan_begin_arg = devpriv->clock_ns * 0xffffff;
3389 err++;
3390 }
3391 }
3392 if (cmd->convert_arg != 0) {
3393 cmd->convert_arg = 0;
3394 err++;
3395 }
3396 if (cmd->scan_end_arg != cmd->chanlist_len) {
3397 cmd->scan_end_arg = cmd->chanlist_len;
3398 err++;
3399 }
3400 if (cmd->stop_src == TRIG_COUNT) { /* XXX check */
3401 if (cmd->stop_arg > 0x00ffffff) {
3402 cmd->stop_arg = 0x00ffffff;
3403 err++;
3404 }
3405 } else {
3406 /* TRIG_NONE */
3407 if (cmd->stop_arg != 0) {
3408 cmd->stop_arg = 0;
3409 err++;
3410 }
3411 } 3413 }
3412 3414
3415 err |= cfc_check_trigger_arg_is(&cmd->convert_arg, 0);
3416 err |= cfc_check_trigger_arg_is(&cmd->scan_end_arg, cmd->chanlist_len);
3417
3418 if (cmd->stop_src == TRIG_COUNT)
3419 err |= cfc_check_trigger_arg_max(&cmd->stop_arg, 0x00ffffff);
3420 else /* TRIG_NONE */
3421 err |= cfc_check_trigger_arg_is(&cmd->stop_arg, 0);
3422
3413 if (err) 3423 if (err)
3414 return 3; 3424 return 3;
3415 3425
@@ -3438,6 +3448,8 @@ static int ni_ao_cmdtest(struct comedi_device *dev, struct comedi_subdevice *s,
3438 3448
3439static int ni_ao_reset(struct comedi_device *dev, struct comedi_subdevice *s) 3449static int ni_ao_reset(struct comedi_device *dev, struct comedi_subdevice *s)
3440{ 3450{
3451 struct ni_private *devpriv = dev->private;
3452
3441 /* devpriv->ao0p=0x0000; */ 3453 /* devpriv->ao0p=0x0000; */
3442 /* ni_writew(devpriv->ao0p,AO_Configuration); */ 3454 /* ni_writew(devpriv->ao0p,AO_Configuration); */
3443 3455
@@ -3491,6 +3503,8 @@ static int ni_dio_insn_config(struct comedi_device *dev,
3491 struct comedi_subdevice *s, 3503 struct comedi_subdevice *s,
3492 struct comedi_insn *insn, unsigned int *data) 3504 struct comedi_insn *insn, unsigned int *data)
3493{ 3505{
3506 struct ni_private *devpriv = dev->private;
3507
3494#ifdef DEBUG_DIO 3508#ifdef DEBUG_DIO
3495 printk("ni_dio_insn_config() chan=%d io=%d\n", 3509 printk("ni_dio_insn_config() chan=%d io=%d\n",
3496 CR_CHAN(insn->chanspec), data[0]); 3510 CR_CHAN(insn->chanspec), data[0]);
@@ -3524,6 +3538,8 @@ static int ni_dio_insn_bits(struct comedi_device *dev,
3524 struct comedi_subdevice *s, 3538 struct comedi_subdevice *s,
3525 struct comedi_insn *insn, unsigned int *data) 3539 struct comedi_insn *insn, unsigned int *data)
3526{ 3540{
3541 struct ni_private *devpriv = dev->private;
3542
3527#ifdef DEBUG_DIO 3543#ifdef DEBUG_DIO
3528 printk("ni_dio_insn_bits() mask=0x%x bits=0x%x\n", data[0], data[1]); 3544 printk("ni_dio_insn_bits() mask=0x%x bits=0x%x\n", data[0], data[1]);
3529#endif 3545#endif
@@ -3552,6 +3568,8 @@ static int ni_m_series_dio_insn_config(struct comedi_device *dev,
3552 struct comedi_insn *insn, 3568 struct comedi_insn *insn,
3553 unsigned int *data) 3569 unsigned int *data)
3554{ 3570{
3571 struct ni_private *devpriv __maybe_unused = dev->private;
3572
3555#ifdef DEBUG_DIO 3573#ifdef DEBUG_DIO
3556 printk("ni_m_series_dio_insn_config() chan=%d io=%d\n", 3574 printk("ni_m_series_dio_insn_config() chan=%d io=%d\n",
3557 CR_CHAN(insn->chanspec), data[0]); 3575 CR_CHAN(insn->chanspec), data[0]);
@@ -3584,6 +3602,8 @@ static int ni_m_series_dio_insn_bits(struct comedi_device *dev,
3584 struct comedi_insn *insn, 3602 struct comedi_insn *insn,
3585 unsigned int *data) 3603 unsigned int *data)
3586{ 3604{
3605 struct ni_private *devpriv __maybe_unused = dev->private;
3606
3587#ifdef DEBUG_DIO 3607#ifdef DEBUG_DIO
3588 printk("ni_m_series_dio_insn_bits() mask=0x%x bits=0x%x\n", data[0], 3608 printk("ni_m_series_dio_insn_bits() mask=0x%x bits=0x%x\n", data[0],
3589 data[1]); 3609 data[1]);
@@ -3623,39 +3643,18 @@ static int ni_cdio_cmdtest(struct comedi_device *dev,
3623 if (err) 3643 if (err)
3624 return 2; 3644 return 2;
3625 3645
3626 /* step 3: make sure arguments are trivially compatible */ 3646 /* Step 3: check if arguments are trivially valid */
3627 if (cmd->start_src == TRIG_INT) {
3628 if (cmd->start_arg != 0) {
3629 cmd->start_arg = 0;
3630 err++;
3631 }
3632 }
3633 if (cmd->scan_begin_src == TRIG_EXT) {
3634 tmp = cmd->scan_begin_arg;
3635 tmp &= CR_PACK_FLAGS(CDO_Sample_Source_Select_Mask, 0, 0,
3636 CR_INVERT);
3637 if (tmp != cmd->scan_begin_arg) {
3638 err++;
3639 }
3640 }
3641 if (cmd->convert_src == TRIG_NOW) {
3642 if (cmd->convert_arg) {
3643 cmd->convert_arg = 0;
3644 err++;
3645 }
3646 }
3647 3647
3648 if (cmd->scan_end_arg != cmd->chanlist_len) { 3648 err |= cfc_check_trigger_arg_is(&cmd->start_arg, 0);
3649 cmd->scan_end_arg = cmd->chanlist_len;
3650 err++;
3651 }
3652 3649
3653 if (cmd->stop_src == TRIG_NONE) { 3650 tmp = cmd->scan_begin_arg;
3654 if (cmd->stop_arg != 0) { 3651 tmp &= CR_PACK_FLAGS(CDO_Sample_Source_Select_Mask, 0, 0, CR_INVERT);
3655 cmd->stop_arg = 0; 3652 if (tmp != cmd->scan_begin_arg)
3656 err++; 3653 err |= -EINVAL;
3657 } 3654
3658 } 3655 err |= cfc_check_trigger_arg_is(&cmd->convert_arg, 0);
3656 err |= cfc_check_trigger_arg_is(&cmd->scan_end_arg, cmd->chanlist_len);
3657 err |= cfc_check_trigger_arg_is(&cmd->stop_arg, 0);
3659 3658
3660 if (err) 3659 if (err)
3661 return 3; 3660 return 3;
@@ -3680,6 +3679,7 @@ static int ni_cdio_cmdtest(struct comedi_device *dev,
3680 3679
3681static int ni_cdio_cmd(struct comedi_device *dev, struct comedi_subdevice *s) 3680static int ni_cdio_cmd(struct comedi_device *dev, struct comedi_subdevice *s)
3682{ 3681{
3682 struct ni_private *devpriv __maybe_unused = dev->private;
3683 const struct comedi_cmd *cmd = &s->async->cmd; 3683 const struct comedi_cmd *cmd = &s->async->cmd;
3684 unsigned cdo_mode_bits = CDO_FIFO_Mode_Bit | CDO_Halt_On_Error_Bit; 3684 unsigned cdo_mode_bits = CDO_FIFO_Mode_Bit | CDO_Halt_On_Error_Bit;
3685 int retval; 3685 int retval;
@@ -3719,6 +3719,7 @@ static int ni_cdo_inttrig(struct comedi_device *dev, struct comedi_subdevice *s,
3719 unsigned int trignum) 3719 unsigned int trignum)
3720{ 3720{
3721#ifdef PCIDMA 3721#ifdef PCIDMA
3722 struct ni_private *devpriv = dev->private;
3722 unsigned long flags; 3723 unsigned long flags;
3723#endif 3724#endif
3724 int retval = 0; 3725 int retval = 0;
@@ -3766,6 +3767,8 @@ static int ni_cdo_inttrig(struct comedi_device *dev, struct comedi_subdevice *s,
3766 3767
3767static int ni_cdio_cancel(struct comedi_device *dev, struct comedi_subdevice *s) 3768static int ni_cdio_cancel(struct comedi_device *dev, struct comedi_subdevice *s)
3768{ 3769{
3770 struct ni_private *devpriv __maybe_unused = dev->private;
3771
3769 ni_writel(CDO_Disarm_Bit | CDO_Error_Interrupt_Enable_Clear_Bit | 3772 ni_writel(CDO_Disarm_Bit | CDO_Error_Interrupt_Enable_Clear_Bit |
3770 CDO_Empty_FIFO_Interrupt_Enable_Clear_Bit | 3773 CDO_Empty_FIFO_Interrupt_Enable_Clear_Bit |
3771 CDO_FIFO_Request_Interrupt_Enable_Clear_Bit, 3774 CDO_FIFO_Request_Interrupt_Enable_Clear_Bit,
@@ -3781,6 +3784,7 @@ static int ni_cdio_cancel(struct comedi_device *dev, struct comedi_subdevice *s)
3781 3784
3782static void handle_cdio_interrupt(struct comedi_device *dev) 3785static void handle_cdio_interrupt(struct comedi_device *dev)
3783{ 3786{
3787 struct ni_private *devpriv __maybe_unused = dev->private;
3784 unsigned cdio_status; 3788 unsigned cdio_status;
3785 struct comedi_subdevice *s = &dev->subdevices[NI_DIO_SUBDEV]; 3789 struct comedi_subdevice *s = &dev->subdevices[NI_DIO_SUBDEV];
3786#ifdef PCIDMA 3790#ifdef PCIDMA
@@ -3824,6 +3828,7 @@ static int ni_serial_insn_config(struct comedi_device *dev,
3824 struct comedi_subdevice *s, 3828 struct comedi_subdevice *s,
3825 struct comedi_insn *insn, unsigned int *data) 3829 struct comedi_insn *insn, unsigned int *data)
3826{ 3830{
3831 struct ni_private *devpriv = dev->private;
3827 int err = insn->n; 3832 int err = insn->n;
3828 unsigned char byte_out, byte_in = 0; 3833 unsigned char byte_out, byte_in = 0;
3829 3834
@@ -3920,6 +3925,7 @@ static int ni_serial_hw_readwrite8(struct comedi_device *dev,
3920 unsigned char data_out, 3925 unsigned char data_out,
3921 unsigned char *data_in) 3926 unsigned char *data_in)
3922{ 3927{
3928 struct ni_private *devpriv = dev->private;
3923 unsigned int status1; 3929 unsigned int status1;
3924 int err = 0, count = 20; 3930 int err = 0, count = 20;
3925 3931
@@ -3978,6 +3984,7 @@ static int ni_serial_sw_readwrite8(struct comedi_device *dev,
3978 unsigned char data_out, 3984 unsigned char data_out,
3979 unsigned char *data_in) 3985 unsigned char *data_in)
3980{ 3986{
3987 struct ni_private *devpriv = dev->private;
3981 unsigned char mask, input = 0; 3988 unsigned char mask, input = 0;
3982 3989
3983#ifdef DEBUG_DIO 3990#ifdef DEBUG_DIO
@@ -4031,9 +4038,10 @@ static int ni_serial_sw_readwrite8(struct comedi_device *dev,
4031 4038
4032static void mio_common_detach(struct comedi_device *dev) 4039static void mio_common_detach(struct comedi_device *dev)
4033{ 4040{
4041 struct ni_private *devpriv = dev->private;
4034 struct comedi_subdevice *s; 4042 struct comedi_subdevice *s;
4035 4043
4036 if (dev->private) { 4044 if (devpriv) {
4037 if (devpriv->counter_dev) { 4045 if (devpriv->counter_dev) {
4038 ni_gpct_device_destroy(devpriv->counter_dev); 4046 ni_gpct_device_destroy(devpriv->counter_dev);
4039 } 4047 }
@@ -4151,6 +4159,7 @@ static void ni_gpct_write_register(struct ni_gpct *counter, unsigned bits,
4151 enum ni_gpct_register reg) 4159 enum ni_gpct_register reg)
4152{ 4160{
4153 struct comedi_device *dev = counter->counter_dev->dev; 4161 struct comedi_device *dev = counter->counter_dev->dev;
4162 struct ni_private *devpriv = dev->private;
4154 unsigned stc_register; 4163 unsigned stc_register;
4155 /* bits in the join reset register which are relevant to counters */ 4164 /* bits in the join reset register which are relevant to counters */
4156 static const unsigned gpct_joint_reset_mask = G0_Reset | G1_Reset; 4165 static const unsigned gpct_joint_reset_mask = G0_Reset | G1_Reset;
@@ -4219,7 +4228,9 @@ static unsigned ni_gpct_read_register(struct ni_gpct *counter,
4219 enum ni_gpct_register reg) 4228 enum ni_gpct_register reg)
4220{ 4229{
4221 struct comedi_device *dev = counter->counter_dev->dev; 4230 struct comedi_device *dev = counter->counter_dev->dev;
4231 struct ni_private *devpriv = dev->private;
4222 unsigned stc_register; 4232 unsigned stc_register;
4233
4223 switch (reg) { 4234 switch (reg) {
4224 /* m-series only registers */ 4235 /* m-series only registers */
4225 case NITIO_G0_DMA_Status_Reg: 4236 case NITIO_G0_DMA_Status_Reg:
@@ -4251,6 +4262,8 @@ static int ni_freq_out_insn_read(struct comedi_device *dev,
4251 struct comedi_subdevice *s, 4262 struct comedi_subdevice *s,
4252 struct comedi_insn *insn, unsigned int *data) 4263 struct comedi_insn *insn, unsigned int *data)
4253{ 4264{
4265 struct ni_private *devpriv = dev->private;
4266
4254 data[0] = devpriv->clock_and_fout & FOUT_Divider_mask; 4267 data[0] = devpriv->clock_and_fout & FOUT_Divider_mask;
4255 return 1; 4268 return 1;
4256} 4269}
@@ -4259,6 +4272,8 @@ static int ni_freq_out_insn_write(struct comedi_device *dev,
4259 struct comedi_subdevice *s, 4272 struct comedi_subdevice *s,
4260 struct comedi_insn *insn, unsigned int *data) 4273 struct comedi_insn *insn, unsigned int *data)
4261{ 4274{
4275 struct ni_private *devpriv = dev->private;
4276
4262 devpriv->clock_and_fout &= ~FOUT_Enable; 4277 devpriv->clock_and_fout &= ~FOUT_Enable;
4263 devpriv->stc_writew(dev, devpriv->clock_and_fout, 4278 devpriv->stc_writew(dev, devpriv->clock_and_fout,
4264 Clock_and_FOUT_Register); 4279 Clock_and_FOUT_Register);
@@ -4273,6 +4288,8 @@ static int ni_freq_out_insn_write(struct comedi_device *dev,
4273static int ni_set_freq_out_clock(struct comedi_device *dev, 4288static int ni_set_freq_out_clock(struct comedi_device *dev,
4274 unsigned int clock_source) 4289 unsigned int clock_source)
4275{ 4290{
4291 struct ni_private *devpriv = dev->private;
4292
4276 switch (clock_source) { 4293 switch (clock_source) {
4277 case NI_FREQ_OUT_TIMEBASE_1_DIV_2_CLOCK_SRC: 4294 case NI_FREQ_OUT_TIMEBASE_1_DIV_2_CLOCK_SRC:
4278 devpriv->clock_and_fout &= ~FOUT_Timebase_Select; 4295 devpriv->clock_and_fout &= ~FOUT_Timebase_Select;
@@ -4292,6 +4309,8 @@ static void ni_get_freq_out_clock(struct comedi_device *dev,
4292 unsigned int *clock_source, 4309 unsigned int *clock_source,
4293 unsigned int *clock_period_ns) 4310 unsigned int *clock_period_ns)
4294{ 4311{
4312 struct ni_private *devpriv = dev->private;
4313
4295 if (devpriv->clock_and_fout & FOUT_Timebase_Select) { 4314 if (devpriv->clock_and_fout & FOUT_Timebase_Select) {
4296 *clock_source = NI_FREQ_OUT_TIMEBASE_2_CLOCK_SRC; 4315 *clock_source = NI_FREQ_OUT_TIMEBASE_2_CLOCK_SRC;
4297 *clock_period_ns = TIMEBASE_2_NS; 4316 *clock_period_ns = TIMEBASE_2_NS;
@@ -4320,11 +4339,12 @@ static int ni_freq_out_insn_config(struct comedi_device *dev,
4320 4339
4321static int ni_alloc_private(struct comedi_device *dev) 4340static int ni_alloc_private(struct comedi_device *dev)
4322{ 4341{
4323 int ret; 4342 struct ni_private *devpriv;
4324 4343
4325 ret = alloc_private(dev, sizeof(struct ni_private)); 4344 devpriv = kzalloc(sizeof(*devpriv), GFP_KERNEL);
4326 if (ret < 0) 4345 if (!devpriv)
4327 return ret; 4346 return -ENOMEM;
4347 dev->private = devpriv;
4328 4348
4329 spin_lock_init(&devpriv->window_lock); 4349 spin_lock_init(&devpriv->window_lock);
4330 spin_lock_init(&devpriv->soft_reg_copy_lock); 4350 spin_lock_init(&devpriv->soft_reg_copy_lock);
@@ -4335,6 +4355,7 @@ static int ni_alloc_private(struct comedi_device *dev)
4335 4355
4336static int ni_E_init(struct comedi_device *dev) 4356static int ni_E_init(struct comedi_device *dev)
4337{ 4357{
4358 struct ni_private *devpriv = dev->private;
4338 struct comedi_subdevice *s; 4359 struct comedi_subdevice *s;
4339 unsigned j; 4360 unsigned j;
4340 enum ni_gpct_variant counter_variant; 4361 enum ni_gpct_variant counter_variant;
@@ -4661,6 +4682,7 @@ static int ni_E_init(struct comedi_device *dev)
4661static int ni_8255_callback(int dir, int port, int data, unsigned long arg) 4682static int ni_8255_callback(int dir, int port, int data, unsigned long arg)
4662{ 4683{
4663 struct comedi_device *dev = (struct comedi_device *)arg; 4684 struct comedi_device *dev = (struct comedi_device *)arg;
4685 struct ni_private *devpriv __maybe_unused = dev->private;
4664 4686
4665 if (dir) { 4687 if (dir) {
4666 ni_writeb(data, Port_A + 2 * port); 4688 ni_writeb(data, Port_A + 2 * port);
@@ -4689,6 +4711,7 @@ static int ni_eeprom_insn_read(struct comedi_device *dev,
4689 4711
4690static int ni_read_eeprom(struct comedi_device *dev, int addr) 4712static int ni_read_eeprom(struct comedi_device *dev, int addr)
4691{ 4713{
4714 struct ni_private *devpriv __maybe_unused = dev->private;
4692 int bit; 4715 int bit;
4693 int bitstring; 4716 int bitstring;
4694 4717
@@ -4716,6 +4739,8 @@ static int ni_m_series_eeprom_insn_read(struct comedi_device *dev,
4716 struct comedi_insn *insn, 4739 struct comedi_insn *insn,
4717 unsigned int *data) 4740 unsigned int *data)
4718{ 4741{
4742 struct ni_private *devpriv = dev->private;
4743
4719 data[0] = devpriv->eeprom_buffer[CR_CHAN(insn->chanspec)]; 4744 data[0] = devpriv->eeprom_buffer[CR_CHAN(insn->chanspec)];
4720 4745
4721 return 1; 4746 return 1;
@@ -4723,6 +4748,8 @@ static int ni_m_series_eeprom_insn_read(struct comedi_device *dev,
4723 4748
4724static int ni_get_pwm_config(struct comedi_device *dev, unsigned int *data) 4749static int ni_get_pwm_config(struct comedi_device *dev, unsigned int *data)
4725{ 4750{
4751 struct ni_private *devpriv = dev->private;
4752
4726 data[1] = devpriv->pwm_up_count * devpriv->clock_ns; 4753 data[1] = devpriv->pwm_up_count * devpriv->clock_ns;
4727 data[2] = devpriv->pwm_down_count * devpriv->clock_ns; 4754 data[2] = devpriv->pwm_down_count * devpriv->clock_ns;
4728 return 3; 4755 return 3;
@@ -4732,7 +4759,9 @@ static int ni_m_series_pwm_config(struct comedi_device *dev,
4732 struct comedi_subdevice *s, 4759 struct comedi_subdevice *s,
4733 struct comedi_insn *insn, unsigned int *data) 4760 struct comedi_insn *insn, unsigned int *data)
4734{ 4761{
4762 struct ni_private *devpriv = dev->private;
4735 unsigned up_count, down_count; 4763 unsigned up_count, down_count;
4764
4736 switch (data[0]) { 4765 switch (data[0]) {
4737 case INSN_CONFIG_PWM_OUTPUT: 4766 case INSN_CONFIG_PWM_OUTPUT:
4738 switch (data[1]) { 4767 switch (data[1]) {
@@ -4798,7 +4827,9 @@ static int ni_6143_pwm_config(struct comedi_device *dev,
4798 struct comedi_subdevice *s, 4827 struct comedi_subdevice *s,
4799 struct comedi_insn *insn, unsigned int *data) 4828 struct comedi_insn *insn, unsigned int *data)
4800{ 4829{
4830 struct ni_private *devpriv = dev->private;
4801 unsigned up_count, down_count; 4831 unsigned up_count, down_count;
4832
4802 switch (data[0]) { 4833 switch (data[0]) {
4803 case INSN_CONFIG_PWM_OUTPUT: 4834 case INSN_CONFIG_PWM_OUTPUT:
4804 switch (data[1]) { 4835 switch (data[1]) {
@@ -4875,6 +4906,8 @@ static int ni_calib_insn_read(struct comedi_device *dev,
4875 struct comedi_subdevice *s, 4906 struct comedi_subdevice *s,
4876 struct comedi_insn *insn, unsigned int *data) 4907 struct comedi_insn *insn, unsigned int *data)
4877{ 4908{
4909 struct ni_private *devpriv = dev->private;
4910
4878 data[0] = devpriv->caldacs[CR_CHAN(insn->chanspec)]; 4911 data[0] = devpriv->caldacs[CR_CHAN(insn->chanspec)];
4879 4912
4880 return 1; 4913 return 1;
@@ -4905,6 +4938,7 @@ static struct caldac_struct caldacs[] = {
4905 4938
4906static void caldac_setup(struct comedi_device *dev, struct comedi_subdevice *s) 4939static void caldac_setup(struct comedi_device *dev, struct comedi_subdevice *s)
4907{ 4940{
4941 struct ni_private *devpriv = dev->private;
4908 int i, j; 4942 int i, j;
4909 int n_dacs; 4943 int n_dacs;
4910 int n_chans = 0; 4944 int n_chans = 0;
@@ -4958,6 +4992,7 @@ static void caldac_setup(struct comedi_device *dev, struct comedi_subdevice *s)
4958 4992
4959static void ni_write_caldac(struct comedi_device *dev, int addr, int val) 4993static void ni_write_caldac(struct comedi_device *dev, int addr, int val)
4960{ 4994{
4995 struct ni_private *devpriv = dev->private;
4961 unsigned int loadbit = 0, bits = 0, bit, bitstring = 0; 4996 unsigned int loadbit = 0, bits = 0, bit, bitstring = 0;
4962 int i; 4997 int i;
4963 int type; 4998 int type;
@@ -5211,8 +5246,10 @@ static int ni_gpct_cancel(struct comedi_device *dev, struct comedi_subdevice *s)
5211static int ni_m_series_set_pfi_routing(struct comedi_device *dev, unsigned chan, 5246static int ni_m_series_set_pfi_routing(struct comedi_device *dev, unsigned chan,
5212 unsigned source) 5247 unsigned source)
5213{ 5248{
5249 struct ni_private *devpriv = dev->private;
5214 unsigned pfi_reg_index; 5250 unsigned pfi_reg_index;
5215 unsigned array_offset; 5251 unsigned array_offset;
5252
5216 if ((source & 0x1f) != source) 5253 if ((source & 0x1f) != source)
5217 return -EINVAL; 5254 return -EINVAL;
5218 pfi_reg_index = 1 + chan / 3; 5255 pfi_reg_index = 1 + chan / 3;
@@ -5247,7 +5284,9 @@ static int ni_set_pfi_routing(struct comedi_device *dev, unsigned chan,
5247static unsigned ni_m_series_get_pfi_routing(struct comedi_device *dev, 5284static unsigned ni_m_series_get_pfi_routing(struct comedi_device *dev,
5248 unsigned chan) 5285 unsigned chan)
5249{ 5286{
5287 struct ni_private *devpriv = dev->private;
5250 const unsigned array_offset = chan / 3; 5288 const unsigned array_offset = chan / 3;
5289
5251 return MSeries_PFI_Output_Select_Source(chan, 5290 return MSeries_PFI_Output_Select_Source(chan,
5252 devpriv-> 5291 devpriv->
5253 pfi_output_select_reg 5292 pfi_output_select_reg
@@ -5306,7 +5345,9 @@ static unsigned ni_get_pfi_routing(struct comedi_device *dev, unsigned chan)
5306static int ni_config_filter(struct comedi_device *dev, unsigned pfi_channel, 5345static int ni_config_filter(struct comedi_device *dev, unsigned pfi_channel,
5307 enum ni_pfi_filter_select filter) 5346 enum ni_pfi_filter_select filter)
5308{ 5347{
5348 struct ni_private *devpriv __maybe_unused = dev->private;
5309 unsigned bits; 5349 unsigned bits;
5350
5310 if ((boardtype.reg_type & ni_reg_m_series_mask) == 0) { 5351 if ((boardtype.reg_type & ni_reg_m_series_mask) == 0) {
5311 return -ENOTSUPP; 5352 return -ENOTSUPP;
5312 } 5353 }
@@ -5321,6 +5362,8 @@ static int ni_pfi_insn_bits(struct comedi_device *dev,
5321 struct comedi_subdevice *s, 5362 struct comedi_subdevice *s,
5322 struct comedi_insn *insn, unsigned int *data) 5363 struct comedi_insn *insn, unsigned int *data)
5323{ 5364{
5365 struct ni_private *devpriv __maybe_unused = dev->private;
5366
5324 if ((boardtype.reg_type & ni_reg_m_series_mask) == 0) { 5367 if ((boardtype.reg_type & ni_reg_m_series_mask) == 0) {
5325 return -ENOTSUPP; 5368 return -ENOTSUPP;
5326 } 5369 }
@@ -5337,6 +5380,7 @@ static int ni_pfi_insn_config(struct comedi_device *dev,
5337 struct comedi_subdevice *s, 5380 struct comedi_subdevice *s,
5338 struct comedi_insn *insn, unsigned int *data) 5381 struct comedi_insn *insn, unsigned int *data)
5339{ 5382{
5383 struct ni_private *devpriv = dev->private;
5340 unsigned int chan; 5384 unsigned int chan;
5341 5385
5342 if (insn->n < 1) 5386 if (insn->n < 1)
@@ -5379,6 +5423,8 @@ static int ni_pfi_insn_config(struct comedi_device *dev,
5379 */ 5423 */
5380static void ni_rtsi_init(struct comedi_device *dev) 5424static void ni_rtsi_init(struct comedi_device *dev)
5381{ 5425{
5426 struct ni_private *devpriv = dev->private;
5427
5382 /* Initialises the RTSI bus signal switch to a default state */ 5428 /* Initialises the RTSI bus signal switch to a default state */
5383 5429
5384 /* Set clock mode to internal */ 5430 /* Set clock mode to internal */
@@ -5480,6 +5526,7 @@ static inline unsigned num_configurable_rtsi_channels(struct comedi_device *dev)
5480static int ni_mseries_set_pll_master_clock(struct comedi_device *dev, 5526static int ni_mseries_set_pll_master_clock(struct comedi_device *dev,
5481 unsigned source, unsigned period_ns) 5527 unsigned source, unsigned period_ns)
5482{ 5528{
5529 struct ni_private *devpriv = dev->private;
5483 static const unsigned min_period_ns = 50; 5530 static const unsigned min_period_ns = 50;
5484 static const unsigned max_period_ns = 1000; 5531 static const unsigned max_period_ns = 1000;
5485 static const unsigned timeout = 1000; 5532 static const unsigned timeout = 1000;
@@ -5488,6 +5535,7 @@ static int ni_mseries_set_pll_master_clock(struct comedi_device *dev,
5488 unsigned freq_multiplier; 5535 unsigned freq_multiplier;
5489 unsigned i; 5536 unsigned i;
5490 int retval; 5537 int retval;
5538
5491 if (source == NI_MIO_PLL_PXI10_CLOCK) 5539 if (source == NI_MIO_PLL_PXI10_CLOCK)
5492 period_ns = 100; 5540 period_ns = 100;
5493 /* these limits are somewhat arbitrary, but NI advertises 1 to 20MHz range so we'll use that */ 5541 /* these limits are somewhat arbitrary, but NI advertises 1 to 20MHz range so we'll use that */
@@ -5581,6 +5629,8 @@ static int ni_mseries_set_pll_master_clock(struct comedi_device *dev,
5581static int ni_set_master_clock(struct comedi_device *dev, unsigned source, 5629static int ni_set_master_clock(struct comedi_device *dev, unsigned source,
5582 unsigned period_ns) 5630 unsigned period_ns)
5583{ 5631{
5632 struct ni_private *devpriv = dev->private;
5633
5584 if (source == NI_MIO_INTERNAL_CLOCK) { 5634 if (source == NI_MIO_INTERNAL_CLOCK) {
5585 devpriv->rtsi_trig_direction_reg &= ~Use_RTSI_Clock_Bit; 5635 devpriv->rtsi_trig_direction_reg &= ~Use_RTSI_Clock_Bit;
5586 devpriv->stc_writew(dev, devpriv->rtsi_trig_direction_reg, 5636 devpriv->stc_writew(dev, devpriv->rtsi_trig_direction_reg,
@@ -5666,6 +5716,8 @@ static int ni_valid_rtsi_output_source(struct comedi_device *dev, unsigned chan,
5666static int ni_set_rtsi_routing(struct comedi_device *dev, unsigned chan, 5716static int ni_set_rtsi_routing(struct comedi_device *dev, unsigned chan,
5667 unsigned source) 5717 unsigned source)
5668{ 5718{
5719 struct ni_private *devpriv = dev->private;
5720
5669 if (ni_valid_rtsi_output_source(dev, chan, source) == 0) 5721 if (ni_valid_rtsi_output_source(dev, chan, source) == 0)
5670 return -EINVAL; 5722 return -EINVAL;
5671 if (chan < 4) { 5723 if (chan < 4) {
@@ -5686,6 +5738,8 @@ static int ni_set_rtsi_routing(struct comedi_device *dev, unsigned chan,
5686 5738
5687static unsigned ni_get_rtsi_routing(struct comedi_device *dev, unsigned chan) 5739static unsigned ni_get_rtsi_routing(struct comedi_device *dev, unsigned chan)
5688{ 5740{
5741 struct ni_private *devpriv = dev->private;
5742
5689 if (chan < 4) { 5743 if (chan < 4) {
5690 return RTSI_Trig_Output_Source(chan, 5744 return RTSI_Trig_Output_Source(chan,
5691 devpriv->rtsi_trig_a_output_reg); 5745 devpriv->rtsi_trig_a_output_reg);
@@ -5704,7 +5758,9 @@ static int ni_rtsi_insn_config(struct comedi_device *dev,
5704 struct comedi_subdevice *s, 5758 struct comedi_subdevice *s,
5705 struct comedi_insn *insn, unsigned int *data) 5759 struct comedi_insn *insn, unsigned int *data)
5706{ 5760{
5761 struct ni_private *devpriv = dev->private;
5707 unsigned int chan = CR_CHAN(insn->chanspec); 5762 unsigned int chan = CR_CHAN(insn->chanspec);
5763
5708 switch (data[0]) { 5764 switch (data[0]) {
5709 case INSN_CONFIG_DIO_OUTPUT: 5765 case INSN_CONFIG_DIO_OUTPUT:
5710 if (chan < num_configurable_rtsi_channels(dev)) { 5766 if (chan < num_configurable_rtsi_channels(dev)) {
diff --git a/drivers/staging/comedi/drivers/ni_mio_cs.c b/drivers/staging/comedi/drivers/ni_mio_cs.c
index ca4f8e06e75b..76c6a13ea9d6 100644
--- a/drivers/staging/comedi/drivers/ni_mio_cs.c
+++ b/drivers/staging/comedi/drivers/ni_mio_cs.c
@@ -175,9 +175,7 @@ struct ni_private {
175 175
176 struct pcmcia_device *link; 176 struct pcmcia_device *link;
177 177
178 NI_PRIVATE_COMMON}; 178NI_PRIVATE_COMMON};
179
180#define devpriv ((struct ni_private *)dev->private)
181 179
182/* How we access registers */ 180/* How we access registers */
183 181
@@ -196,6 +194,7 @@ struct ni_private {
196 194
197static void mio_cs_win_out(struct comedi_device *dev, uint16_t data, int addr) 195static void mio_cs_win_out(struct comedi_device *dev, uint16_t data, int addr)
198{ 196{
197 struct ni_private *devpriv = dev->private;
199 unsigned long flags; 198 unsigned long flags;
200 199
201 spin_lock_irqsave(&devpriv->window_lock, flags); 200 spin_lock_irqsave(&devpriv->window_lock, flags);
@@ -210,6 +209,7 @@ static void mio_cs_win_out(struct comedi_device *dev, uint16_t data, int addr)
210 209
211static uint16_t mio_cs_win_in(struct comedi_device *dev, int addr) 210static uint16_t mio_cs_win_in(struct comedi_device *dev, int addr)
212{ 211{
212 struct ni_private *devpriv = dev->private;
213 unsigned long flags; 213 unsigned long flags;
214 uint16_t ret; 214 uint16_t ret;
215 215
@@ -251,7 +251,7 @@ static void mio_cs_config(struct pcmcia_device *link);
251static void cs_release(struct pcmcia_device *link); 251static void cs_release(struct pcmcia_device *link);
252static void cs_detach(struct pcmcia_device *); 252static void cs_detach(struct pcmcia_device *);
253 253
254static struct pcmcia_device *cur_dev = NULL; 254static struct pcmcia_device *cur_dev;
255 255
256static int cs_attach(struct pcmcia_device *link) 256static int cs_attach(struct pcmcia_device *link)
257{ 257{
@@ -324,6 +324,7 @@ static void mio_cs_config(struct pcmcia_device *link)
324 324
325static int mio_cs_attach(struct comedi_device *dev, struct comedi_devconfig *it) 325static int mio_cs_attach(struct comedi_device *dev, struct comedi_devconfig *it)
326{ 326{
327 struct ni_private *devpriv;
327 struct pcmcia_device *link; 328 struct pcmcia_device *link;
328 unsigned int irq; 329 unsigned int irq;
329 int ret; 330 int ret;
@@ -339,13 +340,15 @@ static int mio_cs_attach(struct comedi_device *dev, struct comedi_devconfig *it)
339 340
340 irq = link->irq; 341 irq = link->irq;
341 342
342 printk("comedi%d: %s: DAQCard: io 0x%04lx, irq %u, ", 343 dev->board_ptr = ni_boards + ni_getboardtype(dev, link);
343 dev->minor, dev->driver->driver_name, dev->iobase, irq);
344 344
345#if 0 345#if 0
346 { 346 {
347 int i; 347 int i;
348 348
349 printk("comedi%d: %s: DAQCard: io 0x%04lx, irq %u, ",
350 dev->minor, dev->driver->driver_name, dev->iobase, irq);
351
349 printk(" board fingerprint:"); 352 printk(" board fingerprint:");
350 for (i = 0; i < 32; i += 2) { 353 for (i = 0; i < 32; i += 2) {
351 printk(" %04x %02x", inw(dev->iobase + i), 354 printk(" %04x %02x", inw(dev->iobase + i),
@@ -356,26 +359,25 @@ static int mio_cs_attach(struct comedi_device *dev, struct comedi_devconfig *it)
356 for (i = 0; i < 10; i++) 359 for (i = 0; i < 10; i++)
357 printk(" 0x%04x", win_in(i)); 360 printk(" 0x%04x", win_in(i));
358 printk("\n"); 361 printk("\n");
362
363 printk("boardtype.name: %s\n", boardtype.name);
359 } 364 }
360#endif 365#endif
361 366
362 dev->board_ptr = ni_boards + ni_getboardtype(dev, link);
363
364 printk(" %s", boardtype.name);
365 dev->board_name = boardtype.name; 367 dev->board_name = boardtype.name;
366 368
367 ret = request_irq(irq, ni_E_interrupt, NI_E_IRQ_FLAGS, 369 ret = request_irq(irq, ni_E_interrupt, NI_E_IRQ_FLAGS,
368 "ni_mio_cs", dev); 370 "ni_mio_cs", dev);
369 if (ret < 0) { 371 if (ret < 0) {
370 printk(" irq not available\n"); 372 dev_err(dev->class_dev, "irq not available\n");
371 return -EINVAL; 373 return -EINVAL;
372 } 374 }
373 dev->irq = irq; 375 dev->irq = irq;
374 376
375 /* allocate private area */
376 ret = ni_alloc_private(dev); 377 ret = ni_alloc_private(dev);
377 if (ret < 0) 378 if (ret)
378 return ret; 379 return ret;
380 devpriv = dev->private;
379 381
380 devpriv->stc_writew = &mio_cs_win_out; 382 devpriv->stc_writew = &mio_cs_win_out;
381 devpriv->stc_readw = &mio_cs_win_in; 383 devpriv->stc_readw = &mio_cs_win_in;
@@ -400,7 +402,8 @@ static int ni_getboardtype(struct comedi_device *dev,
400 return i; 402 return i;
401 } 403 }
402 404
403 printk("unknown board 0x%04x -- pretend it is a ", link->card_id); 405 dev_err(dev->class_dev,
406 "unknown board 0x%04x -- pretend it is a ", link->card_id);
404 407
405 return 0; 408 return 0;
406} 409}
diff --git a/drivers/staging/comedi/drivers/ni_pcidio.c b/drivers/staging/comedi/drivers/ni_pcidio.c
index bc9313ec985c..084ebea33ab9 100644
--- a/drivers/staging/comedi/drivers/ni_pcidio.c
+++ b/drivers/staging/comedi/drivers/ni_pcidio.c
@@ -310,7 +310,6 @@ struct nidio96_private {
310 struct mite_dma_descriptor_ring *di_mite_ring; 310 struct mite_dma_descriptor_ring *di_mite_ring;
311 spinlock_t mite_channel_lock; 311 spinlock_t mite_channel_lock;
312}; 312};
313#define devpriv ((struct nidio96_private *)dev->private)
314 313
315static int ni_pcidio_cmdtest(struct comedi_device *dev, 314static int ni_pcidio_cmdtest(struct comedi_device *dev,
316 struct comedi_subdevice *s, 315 struct comedi_subdevice *s,
@@ -332,6 +331,7 @@ static void ni_pcidio_print_status(unsigned int status);
332 331
333static int ni_pcidio_request_di_mite_channel(struct comedi_device *dev) 332static int ni_pcidio_request_di_mite_channel(struct comedi_device *dev)
334{ 333{
334 struct nidio96_private *devpriv = dev->private;
335 unsigned long flags; 335 unsigned long flags;
336 336
337 spin_lock_irqsave(&devpriv->mite_channel_lock, flags); 337 spin_lock_irqsave(&devpriv->mite_channel_lock, flags);
@@ -355,6 +355,7 @@ static int ni_pcidio_request_di_mite_channel(struct comedi_device *dev)
355 355
356static void ni_pcidio_release_di_mite_channel(struct comedi_device *dev) 356static void ni_pcidio_release_di_mite_channel(struct comedi_device *dev)
357{ 357{
358 struct nidio96_private *devpriv = dev->private;
358 unsigned long flags; 359 unsigned long flags;
359 360
360 spin_lock_irqsave(&devpriv->mite_channel_lock, flags); 361 spin_lock_irqsave(&devpriv->mite_channel_lock, flags);
@@ -384,6 +385,7 @@ static void ni_pcidio_event(struct comedi_device *dev,
384 385
385static int ni_pcidio_poll(struct comedi_device *dev, struct comedi_subdevice *s) 386static int ni_pcidio_poll(struct comedi_device *dev, struct comedi_subdevice *s)
386{ 387{
388 struct nidio96_private *devpriv = dev->private;
387 unsigned long irq_flags; 389 unsigned long irq_flags;
388 int count; 390 int count;
389 391
@@ -400,6 +402,7 @@ static int ni_pcidio_poll(struct comedi_device *dev, struct comedi_subdevice *s)
400static irqreturn_t nidio_interrupt(int irq, void *d) 402static irqreturn_t nidio_interrupt(int irq, void *d)
401{ 403{
402 struct comedi_device *dev = d; 404 struct comedi_device *dev = d;
405 struct nidio96_private *devpriv = dev->private;
403 struct comedi_subdevice *s = &dev->subdevices[0]; 406 struct comedi_subdevice *s = &dev->subdevices[0];
404 struct comedi_async *async = s->async; 407 struct comedi_async *async = s->async;
405 struct mite_struct *mite = devpriv->mite; 408 struct mite_struct *mite = devpriv->mite;
@@ -609,6 +612,7 @@ static void ni_pcidio_print_status(unsigned int flags)
609#ifdef unused 612#ifdef unused
610static void debug_int(struct comedi_device *dev) 613static void debug_int(struct comedi_device *dev)
611{ 614{
615 struct nidio96_private *devpriv = dev->private;
612 int a, b; 616 int a, b;
613 static int n_int; 617 static int n_int;
614 struct timeval tv; 618 struct timeval tv;
@@ -640,6 +644,8 @@ static int ni_pcidio_insn_config(struct comedi_device *dev,
640 struct comedi_subdevice *s, 644 struct comedi_subdevice *s,
641 struct comedi_insn *insn, unsigned int *data) 645 struct comedi_insn *insn, unsigned int *data)
642{ 646{
647 struct nidio96_private *devpriv = dev->private;
648
643 if (insn->n != 1) 649 if (insn->n != 1)
644 return -EINVAL; 650 return -EINVAL;
645 switch (data[0]) { 651 switch (data[0]) {
@@ -668,6 +674,8 @@ static int ni_pcidio_insn_bits(struct comedi_device *dev,
668 struct comedi_subdevice *s, 674 struct comedi_subdevice *s,
669 struct comedi_insn *insn, unsigned int *data) 675 struct comedi_insn *insn, unsigned int *data)
670{ 676{
677 struct nidio96_private *devpriv = dev->private;
678
671 if (data[0]) { 679 if (data[0]) {
672 s->state &= ~data[0]; 680 s->state &= ~data[0];
673 s->state |= (data[0] & data[1]); 681 s->state |= (data[0] & data[1]);
@@ -707,46 +715,32 @@ static int ni_pcidio_cmdtest(struct comedi_device *dev,
707 if (err) 715 if (err)
708 return 2; 716 return 2;
709 717
710 /* step 3: make sure arguments are trivially compatible */ 718 /* Step 3: check if arguments are trivially valid */
719
720 err |= cfc_check_trigger_arg_is(&cmd->start_arg, 0);
711 721
712 if (cmd->start_arg != 0) {
713 /* same for both TRIG_INT and TRIG_NOW */
714 cmd->start_arg = 0;
715 err++;
716 }
717#define MAX_SPEED (TIMER_BASE) /* in nanoseconds */ 722#define MAX_SPEED (TIMER_BASE) /* in nanoseconds */
718 723
719 if (cmd->scan_begin_src == TRIG_TIMER) { 724 if (cmd->scan_begin_src == TRIG_TIMER) {
720 if (cmd->scan_begin_arg < MAX_SPEED) { 725 err |= cfc_check_trigger_arg_min(&cmd->scan_begin_arg,
721 cmd->scan_begin_arg = MAX_SPEED; 726 MAX_SPEED);
722 err++;
723 }
724 /* no minimum speed */ 727 /* no minimum speed */
725 } else { 728 } else {
726 /* TRIG_EXT */ 729 /* TRIG_EXT */
727 /* should be level/edge, hi/lo specification here */ 730 /* should be level/edge, hi/lo specification here */
728 if ((cmd->scan_begin_arg & ~(CR_EDGE | CR_INVERT)) != 0) { 731 if ((cmd->scan_begin_arg & ~(CR_EDGE | CR_INVERT)) != 0) {
729 cmd->scan_begin_arg &= (CR_EDGE | CR_INVERT); 732 cmd->scan_begin_arg &= (CR_EDGE | CR_INVERT);
730 err++; 733 err |= -EINVAL;
731 } 734 }
732 } 735 }
733 if (cmd->convert_arg != 0) {
734 cmd->convert_arg = 0;
735 err++;
736 }
737 736
738 if (cmd->scan_end_arg != cmd->chanlist_len) { 737 err |= cfc_check_trigger_arg_is(&cmd->convert_arg, 0);
739 cmd->scan_end_arg = cmd->chanlist_len; 738 err |= cfc_check_trigger_arg_is(&cmd->scan_end_arg, cmd->chanlist_len);
740 err++; 739
741 }
742 if (cmd->stop_src == TRIG_COUNT) { 740 if (cmd->stop_src == TRIG_COUNT) {
743 /* no limit */ 741 /* no limit */
744 } else { 742 } else { /* TRIG_NONE */
745 /* TRIG_NONE */ 743 err |= cfc_check_trigger_arg_is(&cmd->stop_arg, 0);
746 if (cmd->stop_arg != 0) {
747 cmd->stop_arg = 0;
748 err++;
749 }
750 } 744 }
751 745
752 if (err) 746 if (err)
@@ -793,6 +787,7 @@ static int ni_pcidio_ns_to_timer(int *nanosec, int round_mode)
793 787
794static int ni_pcidio_cmd(struct comedi_device *dev, struct comedi_subdevice *s) 788static int ni_pcidio_cmd(struct comedi_device *dev, struct comedi_subdevice *s)
795{ 789{
790 struct nidio96_private *devpriv = dev->private;
796 struct comedi_cmd *cmd = &s->async->cmd; 791 struct comedi_cmd *cmd = &s->async->cmd;
797 792
798 /* XXX configure ports for input */ 793 /* XXX configure ports for input */
@@ -910,6 +905,7 @@ static int ni_pcidio_cmd(struct comedi_device *dev, struct comedi_subdevice *s)
910 905
911static int setup_mite_dma(struct comedi_device *dev, struct comedi_subdevice *s) 906static int setup_mite_dma(struct comedi_device *dev, struct comedi_subdevice *s)
912{ 907{
908 struct nidio96_private *devpriv = dev->private;
913 int retval; 909 int retval;
914 unsigned long flags; 910 unsigned long flags;
915 911
@@ -934,6 +930,8 @@ static int setup_mite_dma(struct comedi_device *dev, struct comedi_subdevice *s)
934static int ni_pcidio_inttrig(struct comedi_device *dev, 930static int ni_pcidio_inttrig(struct comedi_device *dev,
935 struct comedi_subdevice *s, unsigned int trignum) 931 struct comedi_subdevice *s, unsigned int trignum)
936{ 932{
933 struct nidio96_private *devpriv = dev->private;
934
937 if (trignum != 0) 935 if (trignum != 0)
938 return -EINVAL; 936 return -EINVAL;
939 937
@@ -946,6 +944,8 @@ static int ni_pcidio_inttrig(struct comedi_device *dev,
946static int ni_pcidio_cancel(struct comedi_device *dev, 944static int ni_pcidio_cancel(struct comedi_device *dev,
947 struct comedi_subdevice *s) 945 struct comedi_subdevice *s)
948{ 946{
947 struct nidio96_private *devpriv = dev->private;
948
949 writeb(0x00, 949 writeb(0x00,
950 devpriv->mite->daq_io_addr + Master_DMA_And_Interrupt_Control); 950 devpriv->mite->daq_io_addr + Master_DMA_And_Interrupt_Control);
951 ni_pcidio_release_di_mite_channel(dev); 951 ni_pcidio_release_di_mite_channel(dev);
@@ -956,6 +956,7 @@ static int ni_pcidio_cancel(struct comedi_device *dev,
956static int ni_pcidio_change(struct comedi_device *dev, 956static int ni_pcidio_change(struct comedi_device *dev,
957 struct comedi_subdevice *s, unsigned long new_size) 957 struct comedi_subdevice *s, unsigned long new_size)
958{ 958{
959 struct nidio96_private *devpriv = dev->private;
959 int ret; 960 int ret;
960 961
961 ret = mite_buf_change(devpriv->di_mite_ring, s->async); 962 ret = mite_buf_change(devpriv->di_mite_ring, s->async);
@@ -970,6 +971,7 @@ static int ni_pcidio_change(struct comedi_device *dev,
970static int pci_6534_load_fpga(struct comedi_device *dev, int fpga_index, 971static int pci_6534_load_fpga(struct comedi_device *dev, int fpga_index,
971 const u8 *data, size_t data_len) 972 const u8 *data, size_t data_len)
972{ 973{
974 struct nidio96_private *devpriv = dev->private;
973 static const int timeout = 1000; 975 static const int timeout = 1000;
974 int i; 976 int i;
975 size_t j; 977 size_t j;
@@ -1033,8 +1035,10 @@ static int pci_6534_reset_fpga(struct comedi_device *dev, int fpga_index)
1033 1035
1034static int pci_6534_reset_fpgas(struct comedi_device *dev) 1036static int pci_6534_reset_fpgas(struct comedi_device *dev)
1035{ 1037{
1038 struct nidio96_private *devpriv = dev->private;
1036 int ret; 1039 int ret;
1037 int i; 1040 int i;
1041
1038 writew(0x0, devpriv->mite->daq_io_addr + Firmware_Control_Register); 1042 writew(0x0, devpriv->mite->daq_io_addr + Firmware_Control_Register);
1039 for (i = 0; i < 3; ++i) { 1043 for (i = 0; i < 3; ++i) {
1040 ret = pci_6534_reset_fpga(dev, i); 1044 ret = pci_6534_reset_fpga(dev, i);
@@ -1047,6 +1051,8 @@ static int pci_6534_reset_fpgas(struct comedi_device *dev)
1047 1051
1048static void pci_6534_init_main_fpga(struct comedi_device *dev) 1052static void pci_6534_init_main_fpga(struct comedi_device *dev)
1049{ 1053{
1054 struct nidio96_private *devpriv = dev->private;
1055
1050 writel(0, devpriv->mite->daq_io_addr + FPGA_Control1_Register); 1056 writel(0, devpriv->mite->daq_io_addr + FPGA_Control1_Register);
1051 writel(0, devpriv->mite->daq_io_addr + FPGA_Control2_Register); 1057 writel(0, devpriv->mite->daq_io_addr + FPGA_Control2_Register);
1052 writel(0, devpriv->mite->daq_io_addr + FPGA_SCALS_Counter_Register); 1058 writel(0, devpriv->mite->daq_io_addr + FPGA_SCALS_Counter_Register);
@@ -1057,6 +1063,7 @@ static void pci_6534_init_main_fpga(struct comedi_device *dev)
1057 1063
1058static int pci_6534_upload_firmware(struct comedi_device *dev) 1064static int pci_6534_upload_firmware(struct comedi_device *dev)
1059{ 1065{
1066 struct nidio96_private *devpriv = dev->private;
1060 int ret; 1067 int ret;
1061 const struct firmware *fw; 1068 const struct firmware *fw;
1062 static const char *const fw_file[3] = { 1069 static const char *const fw_file[3] = {
@@ -1099,16 +1106,20 @@ nidio_find_boardinfo(struct pci_dev *pcidev)
1099 return NULL; 1106 return NULL;
1100} 1107}
1101 1108
1102static int __devinit nidio_attach_pci(struct comedi_device *dev, 1109static int nidio_auto_attach(struct comedi_device *dev,
1103 struct pci_dev *pcidev) 1110 unsigned long context_unused)
1104{ 1111{
1112 struct pci_dev *pcidev = comedi_to_pci_dev(dev);
1113 struct nidio96_private *devpriv;
1105 struct comedi_subdevice *s; 1114 struct comedi_subdevice *s;
1106 int ret; 1115 int ret;
1107 unsigned int irq; 1116 unsigned int irq;
1108 1117
1109 ret = alloc_private(dev, sizeof(struct nidio96_private)); 1118 devpriv = kzalloc(sizeof(*devpriv), GFP_KERNEL);
1110 if (ret < 0) 1119 if (!devpriv)
1111 return ret; 1120 return -ENOMEM;
1121 dev->private = devpriv;
1122
1112 spin_lock_init(&devpriv->mite_channel_lock); 1123 spin_lock_init(&devpriv->mite_channel_lock);
1113 1124
1114 dev->board_ptr = nidio_find_boardinfo(pcidev); 1125 dev->board_ptr = nidio_find_boardinfo(pcidev);
@@ -1123,7 +1134,7 @@ static int __devinit nidio_attach_pci(struct comedi_device *dev,
1123 dev_warn(dev->class_dev, "error setting up mite\n"); 1134 dev_warn(dev->class_dev, "error setting up mite\n");
1124 return ret; 1135 return ret;
1125 } 1136 }
1126 comedi_set_hw_dev(dev, &devpriv->mite->pcidev->dev); 1137
1127 devpriv->di_mite_ring = mite_alloc_ring(devpriv->mite); 1138 devpriv->di_mite_ring = mite_alloc_ring(devpriv->mite);
1128 if (devpriv->di_mite_ring == NULL) 1139 if (devpriv->di_mite_ring == NULL)
1129 return -ENOMEM; 1140 return -ENOMEM;
@@ -1184,6 +1195,8 @@ static int __devinit nidio_attach_pci(struct comedi_device *dev,
1184 1195
1185static void nidio_detach(struct comedi_device *dev) 1196static void nidio_detach(struct comedi_device *dev)
1186{ 1197{
1198 struct nidio96_private *devpriv = dev->private;
1199
1187 if (dev->irq) 1200 if (dev->irq)
1188 free_irq(dev->irq, dev); 1201 free_irq(dev->irq, dev);
1189 if (devpriv) { 1202 if (devpriv) {
@@ -1201,17 +1214,17 @@ static void nidio_detach(struct comedi_device *dev)
1201static struct comedi_driver ni_pcidio_driver = { 1214static struct comedi_driver ni_pcidio_driver = {
1202 .driver_name = "ni_pcidio", 1215 .driver_name = "ni_pcidio",
1203 .module = THIS_MODULE, 1216 .module = THIS_MODULE,
1204 .attach_pci = nidio_attach_pci, 1217 .auto_attach = nidio_auto_attach,
1205 .detach = nidio_detach, 1218 .detach = nidio_detach,
1206}; 1219};
1207 1220
1208static int __devinit ni_pcidio_pci_probe(struct pci_dev *dev, 1221static int ni_pcidio_pci_probe(struct pci_dev *dev,
1209 const struct pci_device_id *ent) 1222 const struct pci_device_id *ent)
1210{ 1223{
1211 return comedi_pci_auto_config(dev, &ni_pcidio_driver); 1224 return comedi_pci_auto_config(dev, &ni_pcidio_driver);
1212} 1225}
1213 1226
1214static void __devexit ni_pcidio_pci_remove(struct pci_dev *dev) 1227static void ni_pcidio_pci_remove(struct pci_dev *dev)
1215{ 1228{
1216 comedi_pci_auto_unconfig(dev); 1229 comedi_pci_auto_unconfig(dev);
1217} 1230}
@@ -1228,7 +1241,7 @@ static struct pci_driver ni_pcidio_pci_driver = {
1228 .name = "ni_pcidio", 1241 .name = "ni_pcidio",
1229 .id_table = ni_pcidio_pci_table, 1242 .id_table = ni_pcidio_pci_table,
1230 .probe = ni_pcidio_pci_probe, 1243 .probe = ni_pcidio_pci_probe,
1231 .remove = __devexit_p(ni_pcidio_pci_remove), 1244 .remove = ni_pcidio_pci_remove,
1232}; 1245};
1233module_comedi_pci_driver(ni_pcidio_driver, ni_pcidio_pci_driver); 1246module_comedi_pci_driver(ni_pcidio_driver, ni_pcidio_pci_driver);
1234 1247
diff --git a/drivers/staging/comedi/drivers/ni_pcimio.c b/drivers/staging/comedi/drivers/ni_pcimio.c
index f284a90720ec..aaac0b2cc9eb 100644
--- a/drivers/staging/comedi/drivers/ni_pcimio.c
+++ b/drivers/staging/comedi/drivers/ni_pcimio.c
@@ -1190,7 +1190,6 @@ static const struct ni_board_struct ni_boards[] = {
1190 1190
1191struct ni_private { 1191struct ni_private {
1192NI_PRIVATE_COMMON}; 1192NI_PRIVATE_COMMON};
1193#define devpriv ((struct ni_private *)dev->private)
1194 1193
1195/* How we access registers */ 1194/* How we access registers */
1196 1195
@@ -1213,6 +1212,7 @@ NI_PRIVATE_COMMON};
1213 1212
1214static void e_series_win_out(struct comedi_device *dev, uint16_t data, int reg) 1213static void e_series_win_out(struct comedi_device *dev, uint16_t data, int reg)
1215{ 1214{
1215 struct ni_private *devpriv = dev->private;
1216 unsigned long flags; 1216 unsigned long flags;
1217 1217
1218 spin_lock_irqsave(&devpriv->window_lock, flags); 1218 spin_lock_irqsave(&devpriv->window_lock, flags);
@@ -1223,6 +1223,7 @@ static void e_series_win_out(struct comedi_device *dev, uint16_t data, int reg)
1223 1223
1224static uint16_t e_series_win_in(struct comedi_device *dev, int reg) 1224static uint16_t e_series_win_in(struct comedi_device *dev, int reg)
1225{ 1225{
1226 struct ni_private *devpriv = dev->private;
1226 unsigned long flags; 1227 unsigned long flags;
1227 uint16_t ret; 1228 uint16_t ret;
1228 1229
@@ -1237,7 +1238,9 @@ static uint16_t e_series_win_in(struct comedi_device *dev, int reg)
1237static void m_series_stc_writew(struct comedi_device *dev, uint16_t data, 1238static void m_series_stc_writew(struct comedi_device *dev, uint16_t data,
1238 int reg) 1239 int reg)
1239{ 1240{
1241 struct ni_private *devpriv = dev->private;
1240 unsigned offset; 1242 unsigned offset;
1243
1241 switch (reg) { 1244 switch (reg) {
1242 case ADC_FIFO_Clear: 1245 case ADC_FIFO_Clear:
1243 offset = M_Offset_AI_FIFO_Clear; 1246 offset = M_Offset_AI_FIFO_Clear;
@@ -1381,8 +1384,9 @@ static void m_series_stc_writew(struct comedi_device *dev, uint16_t data,
1381 /* FIXME: DIO_Output_Register (16 bit reg) is replaced by M_Offset_Static_Digital_Output (32 bit) 1384 /* FIXME: DIO_Output_Register (16 bit reg) is replaced by M_Offset_Static_Digital_Output (32 bit)
1382 and M_Offset_SCXI_Serial_Data_Out (8 bit) */ 1385 and M_Offset_SCXI_Serial_Data_Out (8 bit) */
1383 default: 1386 default:
1384 printk(KERN_WARNING "%s: bug! unhandled register=0x%x in switch.\n", 1387 dev_warn(dev->class_dev,
1385 __func__, reg); 1388 "%s: bug! unhandled register=0x%x in switch.\n",
1389 __func__, reg);
1386 BUG(); 1390 BUG();
1387 return; 1391 return;
1388 break; 1392 break;
@@ -1392,7 +1396,9 @@ static void m_series_stc_writew(struct comedi_device *dev, uint16_t data,
1392 1396
1393static uint16_t m_series_stc_readw(struct comedi_device *dev, int reg) 1397static uint16_t m_series_stc_readw(struct comedi_device *dev, int reg)
1394{ 1398{
1399 struct ni_private *devpriv = dev->private;
1395 unsigned offset; 1400 unsigned offset;
1401
1396 switch (reg) { 1402 switch (reg) {
1397 case AI_Status_1_Register: 1403 case AI_Status_1_Register:
1398 offset = M_Offset_AI_Status_1; 1404 offset = M_Offset_AI_Status_1;
@@ -1416,8 +1422,9 @@ static uint16_t m_series_stc_readw(struct comedi_device *dev, int reg)
1416 offset = M_Offset_G01_Status; 1422 offset = M_Offset_G01_Status;
1417 break; 1423 break;
1418 default: 1424 default:
1419 printk(KERN_WARNING "%s: bug! unhandled register=0x%x in switch.\n", 1425 dev_warn(dev->class_dev,
1420 __func__, reg); 1426 "%s: bug! unhandled register=0x%x in switch.\n",
1427 __func__, reg);
1421 BUG(); 1428 BUG();
1422 return 0; 1429 return 0;
1423 break; 1430 break;
@@ -1428,7 +1435,9 @@ static uint16_t m_series_stc_readw(struct comedi_device *dev, int reg)
1428static void m_series_stc_writel(struct comedi_device *dev, uint32_t data, 1435static void m_series_stc_writel(struct comedi_device *dev, uint32_t data,
1429 int reg) 1436 int reg)
1430{ 1437{
1438 struct ni_private *devpriv = dev->private;
1431 unsigned offset; 1439 unsigned offset;
1440
1432 switch (reg) { 1441 switch (reg) {
1433 case AI_SC_Load_A_Registers: 1442 case AI_SC_Load_A_Registers:
1434 offset = M_Offset_AI_SC_Load_A; 1443 offset = M_Offset_AI_SC_Load_A;
@@ -1458,8 +1467,9 @@ static void m_series_stc_writel(struct comedi_device *dev, uint32_t data,
1458 offset = M_Offset_G1_Load_B; 1467 offset = M_Offset_G1_Load_B;
1459 break; 1468 break;
1460 default: 1469 default:
1461 printk(KERN_WARNING "%s: bug! unhandled register=0x%x in switch.\n", 1470 dev_warn(dev->class_dev,
1462 __func__, reg); 1471 "%s: bug! unhandled register=0x%x in switch.\n",
1472 __func__, reg);
1463 BUG(); 1473 BUG();
1464 return; 1474 return;
1465 break; 1475 break;
@@ -1469,7 +1479,9 @@ static void m_series_stc_writel(struct comedi_device *dev, uint32_t data,
1469 1479
1470static uint32_t m_series_stc_readl(struct comedi_device *dev, int reg) 1480static uint32_t m_series_stc_readl(struct comedi_device *dev, int reg)
1471{ 1481{
1482 struct ni_private *devpriv = dev->private;
1472 unsigned offset; 1483 unsigned offset;
1484
1473 switch (reg) { 1485 switch (reg) {
1474 case G_HW_Save_Register(0): 1486 case G_HW_Save_Register(0):
1475 offset = M_Offset_G0_HW_Save; 1487 offset = M_Offset_G0_HW_Save;
@@ -1484,8 +1496,9 @@ static uint32_t m_series_stc_readl(struct comedi_device *dev, int reg)
1484 offset = M_Offset_G1_Save; 1496 offset = M_Offset_G1_Save;
1485 break; 1497 break;
1486 default: 1498 default:
1487 printk(KERN_WARNING "%s: bug! unhandled register=0x%x in switch.\n", 1499 dev_warn(dev->class_dev,
1488 __func__, reg); 1500 "%s: bug! unhandled register=0x%x in switch.\n",
1501 __func__, reg);
1489 BUG(); 1502 BUG();
1490 return 0; 1503 return 0;
1491 break; 1504 break;
@@ -1516,6 +1529,7 @@ static int pcimio_dio_change(struct comedi_device *dev,
1516 1529
1517static void m_series_init_eeprom_buffer(struct comedi_device *dev) 1530static void m_series_init_eeprom_buffer(struct comedi_device *dev)
1518{ 1531{
1532 struct ni_private *devpriv = dev->private;
1519 static const int Start_Cal_EEPROM = 0x400; 1533 static const int Start_Cal_EEPROM = 0x400;
1520 static const unsigned window_size = 10; 1534 static const unsigned window_size = 10;
1521 static const int serial_number_eeprom_offset = 0x4; 1535 static const int serial_number_eeprom_offset = 0x4;
@@ -1553,6 +1567,8 @@ static void m_series_init_eeprom_buffer(struct comedi_device *dev)
1553 1567
1554static void init_6143(struct comedi_device *dev) 1568static void init_6143(struct comedi_device *dev)
1555{ 1569{
1570 struct ni_private *devpriv = dev->private;
1571
1556 /* Disable interrupts */ 1572 /* Disable interrupts */
1557 devpriv->stc_writew(dev, 0, Interrupt_Control_Register); 1573 devpriv->stc_writew(dev, 0, Interrupt_Control_Register);
1558 1574
@@ -1572,10 +1588,12 @@ static void init_6143(struct comedi_device *dev)
1572 1588
1573static void pcimio_detach(struct comedi_device *dev) 1589static void pcimio_detach(struct comedi_device *dev)
1574{ 1590{
1591 struct ni_private *devpriv = dev->private;
1592
1575 mio_common_detach(dev); 1593 mio_common_detach(dev);
1576 if (dev->irq) 1594 if (dev->irq)
1577 free_irq(dev->irq, dev); 1595 free_irq(dev->irq, dev);
1578 if (dev->private) { 1596 if (devpriv) {
1579 mite_free_ring(devpriv->ai_mite_ring); 1597 mite_free_ring(devpriv->ai_mite_ring);
1580 mite_free_ring(devpriv->ao_mite_ring); 1598 mite_free_ring(devpriv->ao_mite_ring);
1581 mite_free_ring(devpriv->cdo_mite_ring); 1599 mite_free_ring(devpriv->cdo_mite_ring);
@@ -1602,16 +1620,19 @@ pcimio_find_boardinfo(struct pci_dev *pcidev)
1602 return NULL; 1620 return NULL;
1603} 1621}
1604 1622
1605static int __devinit pcimio_attach_pci(struct comedi_device *dev, 1623static int pcimio_auto_attach(struct comedi_device *dev,
1606 struct pci_dev *pcidev) 1624 unsigned long context_unused)
1607{ 1625{
1626 struct pci_dev *pcidev = comedi_to_pci_dev(dev);
1627 struct ni_private *devpriv;
1608 int ret; 1628 int ret;
1609 1629
1610 dev_info(dev->class_dev, "ni_pcimio: attach %s\n", pci_name(pcidev)); 1630 dev_info(dev->class_dev, "ni_pcimio: attach %s\n", pci_name(pcidev));
1611 1631
1612 ret = ni_alloc_private(dev); 1632 ret = ni_alloc_private(dev);
1613 if (ret < 0) 1633 if (ret)
1614 return ret; 1634 return ret;
1635 devpriv = dev->private;
1615 1636
1616 dev->board_ptr = pcimio_find_boardinfo(pcidev); 1637 dev->board_ptr = pcimio_find_boardinfo(pcidev);
1617 if (!dev->board_ptr) 1638 if (!dev->board_ptr)
@@ -1641,7 +1662,7 @@ static int __devinit pcimio_attach_pci(struct comedi_device *dev,
1641 pr_warn("error setting up mite\n"); 1662 pr_warn("error setting up mite\n");
1642 return ret; 1663 return ret;
1643 } 1664 }
1644 comedi_set_hw_dev(dev, &devpriv->mite->pcidev->dev); 1665
1645 devpriv->ai_mite_ring = mite_alloc_ring(devpriv->mite); 1666 devpriv->ai_mite_ring = mite_alloc_ring(devpriv->mite);
1646 if (devpriv->ai_mite_ring == NULL) 1667 if (devpriv->ai_mite_ring == NULL)
1647 return -ENOMEM; 1668 return -ENOMEM;
@@ -1693,6 +1714,7 @@ static int __devinit pcimio_attach_pci(struct comedi_device *dev,
1693static int pcimio_ai_change(struct comedi_device *dev, 1714static int pcimio_ai_change(struct comedi_device *dev,
1694 struct comedi_subdevice *s, unsigned long new_size) 1715 struct comedi_subdevice *s, unsigned long new_size)
1695{ 1716{
1717 struct ni_private *devpriv = dev->private;
1696 int ret; 1718 int ret;
1697 1719
1698 ret = mite_buf_change(devpriv->ai_mite_ring, s->async); 1720 ret = mite_buf_change(devpriv->ai_mite_ring, s->async);
@@ -1705,6 +1727,7 @@ static int pcimio_ai_change(struct comedi_device *dev,
1705static int pcimio_ao_change(struct comedi_device *dev, 1727static int pcimio_ao_change(struct comedi_device *dev,
1706 struct comedi_subdevice *s, unsigned long new_size) 1728 struct comedi_subdevice *s, unsigned long new_size)
1707{ 1729{
1730 struct ni_private *devpriv = dev->private;
1708 int ret; 1731 int ret;
1709 1732
1710 ret = mite_buf_change(devpriv->ao_mite_ring, s->async); 1733 ret = mite_buf_change(devpriv->ao_mite_ring, s->async);
@@ -1718,6 +1741,7 @@ static int pcimio_gpct0_change(struct comedi_device *dev,
1718 struct comedi_subdevice *s, 1741 struct comedi_subdevice *s,
1719 unsigned long new_size) 1742 unsigned long new_size)
1720{ 1743{
1744 struct ni_private *devpriv = dev->private;
1721 int ret; 1745 int ret;
1722 1746
1723 ret = mite_buf_change(devpriv->gpct_mite_ring[0], s->async); 1747 ret = mite_buf_change(devpriv->gpct_mite_ring[0], s->async);
@@ -1731,6 +1755,7 @@ static int pcimio_gpct1_change(struct comedi_device *dev,
1731 struct comedi_subdevice *s, 1755 struct comedi_subdevice *s,
1732 unsigned long new_size) 1756 unsigned long new_size)
1733{ 1757{
1758 struct ni_private *devpriv = dev->private;
1734 int ret; 1759 int ret;
1735 1760
1736 ret = mite_buf_change(devpriv->gpct_mite_ring[1], s->async); 1761 ret = mite_buf_change(devpriv->gpct_mite_ring[1], s->async);
@@ -1743,6 +1768,7 @@ static int pcimio_gpct1_change(struct comedi_device *dev,
1743static int pcimio_dio_change(struct comedi_device *dev, 1768static int pcimio_dio_change(struct comedi_device *dev,
1744 struct comedi_subdevice *s, unsigned long new_size) 1769 struct comedi_subdevice *s, unsigned long new_size)
1745{ 1770{
1771 struct ni_private *devpriv = dev->private;
1746 int ret; 1772 int ret;
1747 1773
1748 ret = mite_buf_change(devpriv->cdo_mite_ring, s->async); 1774 ret = mite_buf_change(devpriv->cdo_mite_ring, s->async);
@@ -1755,17 +1781,17 @@ static int pcimio_dio_change(struct comedi_device *dev,
1755static struct comedi_driver ni_pcimio_driver = { 1781static struct comedi_driver ni_pcimio_driver = {
1756 .driver_name = "ni_pcimio", 1782 .driver_name = "ni_pcimio",
1757 .module = THIS_MODULE, 1783 .module = THIS_MODULE,
1758 .attach_pci = pcimio_attach_pci, 1784 .auto_attach = pcimio_auto_attach,
1759 .detach = pcimio_detach, 1785 .detach = pcimio_detach,
1760}; 1786};
1761 1787
1762static int __devinit ni_pcimio_pci_probe(struct pci_dev *dev, 1788static int ni_pcimio_pci_probe(struct pci_dev *dev,
1763 const struct pci_device_id *ent) 1789 const struct pci_device_id *ent)
1764{ 1790{
1765 return comedi_pci_auto_config(dev, &ni_pcimio_driver); 1791 return comedi_pci_auto_config(dev, &ni_pcimio_driver);
1766} 1792}
1767 1793
1768static void __devexit ni_pcimio_pci_remove(struct pci_dev *dev) 1794static void ni_pcimio_pci_remove(struct pci_dev *dev)
1769{ 1795{
1770 comedi_pci_auto_unconfig(dev); 1796 comedi_pci_auto_unconfig(dev);
1771} 1797}
@@ -1832,7 +1858,7 @@ static struct pci_driver ni_pcimio_pci_driver = {
1832 .name = "ni_pcimio", 1858 .name = "ni_pcimio",
1833 .id_table = ni_pcimio_pci_table, 1859 .id_table = ni_pcimio_pci_table,
1834 .probe = ni_pcimio_pci_probe, 1860 .probe = ni_pcimio_pci_probe,
1835 .remove = __devexit_p(ni_pcimio_pci_remove) 1861 .remove = ni_pcimio_pci_remove
1836}; 1862};
1837module_comedi_pci_driver(ni_pcimio_driver, ni_pcimio_pci_driver); 1863module_comedi_pci_driver(ni_pcimio_driver, ni_pcimio_pci_driver);
1838 1864
diff --git a/drivers/staging/comedi/drivers/ni_tio.h b/drivers/staging/comedi/drivers/ni_tio.h
index b0588202e5ac..8572996539fa 100644
--- a/drivers/staging/comedi/drivers/ni_tio.h
+++ b/drivers/staging/comedi/drivers/ni_tio.h
@@ -120,9 +120,9 @@ struct ni_gpct {
120 120
121struct ni_gpct_device { 121struct ni_gpct_device {
122 struct comedi_device *dev; 122 struct comedi_device *dev;
123 void (*write_register) (struct ni_gpct * counter, unsigned bits, 123 void (*write_register) (struct ni_gpct *counter, unsigned bits,
124 enum ni_gpct_register reg); 124 enum ni_gpct_register reg);
125 unsigned (*read_register) (struct ni_gpct * counter, 125 unsigned (*read_register) (struct ni_gpct *counter,
126 enum ni_gpct_register reg); 126 enum ni_gpct_register reg);
127 enum ni_gpct_variant variant; 127 enum ni_gpct_variant variant;
128 struct ni_gpct *counters; 128 struct ni_gpct *counters;
diff --git a/drivers/staging/comedi/drivers/ni_tiocmd.c b/drivers/staging/comedi/drivers/ni_tiocmd.c
index 8ee93d359bed..0c991b99da13 100644
--- a/drivers/staging/comedi/drivers/ni_tiocmd.c
+++ b/drivers/staging/comedi/drivers/ni_tiocmd.c
@@ -173,7 +173,8 @@ static int ni_tio_input_cmd(struct ni_gpct *counter, struct comedi_async *async)
173static int ni_tio_output_cmd(struct ni_gpct *counter, 173static int ni_tio_output_cmd(struct ni_gpct *counter,
174 struct comedi_async *async) 174 struct comedi_async *async)
175{ 175{
176 printk(KERN_ERR "ni_tio: output commands not yet implemented.\n"); 176 dev_err(counter->counter_dev->dev->class_dev,
177 "output commands not yet implemented.\n");
177 return -ENOTSUPP; 178 return -ENOTSUPP;
178 179
179 counter->mite_chan->dir = COMEDI_OUTPUT; 180 counter->mite_chan->dir = COMEDI_OUTPUT;
@@ -219,7 +220,10 @@ int ni_tio_cmd(struct ni_gpct *counter, struct comedi_async *async)
219 220
220 spin_lock_irqsave(&counter->lock, flags); 221 spin_lock_irqsave(&counter->lock, flags);
221 if (counter->mite_chan == NULL) { 222 if (counter->mite_chan == NULL) {
222 printk(KERN_ERR "ni_tio: commands only supported with DMA. Interrupt-driven commands not yet implemented.\n"); 223 dev_err(counter->counter_dev->dev->class_dev,
224 "commands only supported with DMA. ");
225 dev_err(counter->counter_dev->dev->class_dev,
226 "Interrupt-driven commands not yet implemented.\n");
223 retval = -EIO; 227 retval = -EIO;
224 } else { 228 } else {
225 retval = ni_tio_cmd_setup(counter, async); 229 retval = ni_tio_cmd_setup(counter, async);
@@ -271,37 +275,19 @@ int ni_tio_cmdtest(struct ni_gpct *counter, struct comedi_cmd *cmd)
271 if (err) 275 if (err)
272 return 2; 276 return 2;
273 277
274 /* step 3: make sure arguments are trivially compatible */ 278 /* Step 3: check if arguments are trivially valid */
275 if (cmd->start_src != TRIG_EXT) {
276 if (cmd->start_arg != 0) {
277 cmd->start_arg = 0;
278 err++;
279 }
280 }
281 if (cmd->scan_begin_src != TRIG_EXT) {
282 if (cmd->scan_begin_arg) {
283 cmd->scan_begin_arg = 0;
284 err++;
285 }
286 }
287 if (cmd->convert_src != TRIG_EXT) {
288 if (cmd->convert_arg) {
289 cmd->convert_arg = 0;
290 err++;
291 }
292 }
293 279
294 if (cmd->scan_end_arg != cmd->chanlist_len) { 280 if (cmd->start_src != TRIG_EXT)
295 cmd->scan_end_arg = cmd->chanlist_len; 281 err |= cfc_check_trigger_arg_is(&cmd->start_arg, 0);
296 err++;
297 }
298 282
299 if (cmd->stop_src == TRIG_NONE) { 283 if (cmd->scan_begin_src != TRIG_EXT)
300 if (cmd->stop_arg != 0) { 284 err |= cfc_check_trigger_arg_is(&cmd->scan_begin_arg, 0);
301 cmd->stop_arg = 0; 285
302 err++; 286 if (cmd->convert_src != TRIG_EXT)
303 } 287 err |= cfc_check_trigger_arg_is(&cmd->convert_arg, 0);
304 } 288
289 err |= cfc_check_trigger_arg_is(&cmd->scan_end_arg, cmd->chanlist_len);
290 err |= cfc_check_trigger_arg_is(&cmd->stop_arg, 0);
305 291
306 if (err) 292 if (err)
307 return 3; 293 return 3;
@@ -427,8 +413,9 @@ void ni_tio_acknowledge_and_confirm(struct ni_gpct *counter, int *gate_error,
427 NITIO_Gxx_Joint_Status2_Reg 413 NITIO_Gxx_Joint_Status2_Reg
428 (counter->counter_index)) & 414 (counter->counter_index)) &
429 Gi_Permanent_Stale_Bit(counter->counter_index)) { 415 Gi_Permanent_Stale_Bit(counter->counter_index)) {
430 printk(KERN_INFO "%s: Gi_Permanent_Stale_Data detected.\n", 416 dev_info(counter->counter_dev->dev->class_dev,
431 __func__); 417 "%s: Gi_Permanent_Stale_Data detected.\n",
418 __func__);
432 if (perm_stale_data) 419 if (perm_stale_data)
433 *perm_stale_data = 1; 420 *perm_stale_data = 1;
434 } 421 }
@@ -448,7 +435,8 @@ void ni_tio_handle_interrupt(struct ni_gpct *counter,
448 ni_tio_acknowledge_and_confirm(counter, &gate_error, &tc_error, 435 ni_tio_acknowledge_and_confirm(counter, &gate_error, &tc_error,
449 &perm_stale_data, NULL); 436 &perm_stale_data, NULL);
450 if (gate_error) { 437 if (gate_error) {
451 printk(KERN_NOTICE "%s: Gi_Gate_Error detected.\n", __func__); 438 dev_notice(counter->counter_dev->dev->class_dev,
439 "%s: Gi_Gate_Error detected.\n", __func__);
452 s->async->events |= COMEDI_CB_OVERFLOW; 440 s->async->events |= COMEDI_CB_OVERFLOW;
453 } 441 }
454 if (perm_stale_data) 442 if (perm_stale_data)
@@ -459,8 +447,8 @@ void ni_tio_handle_interrupt(struct ni_gpct *counter,
459 if (read_register(counter, 447 if (read_register(counter,
460 NITIO_Gi_DMA_Status_Reg 448 NITIO_Gi_DMA_Status_Reg
461 (counter->counter_index)) & Gi_DRQ_Error_Bit) { 449 (counter->counter_index)) & Gi_DRQ_Error_Bit) {
462 printk(KERN_NOTICE "%s: Gi_DRQ_Error detected.\n", 450 dev_notice(counter->counter_dev->dev->class_dev,
463 __func__); 451 "%s: Gi_DRQ_Error detected.\n", __func__);
464 s->async->events |= COMEDI_CB_OVERFLOW; 452 s->async->events |= COMEDI_CB_OVERFLOW;
465 } 453 }
466 break; 454 break;
diff --git a/drivers/staging/comedi/drivers/pcl711.c b/drivers/staging/comedi/drivers/pcl711.c
index 89305a14eb5c..6ee5da24a961 100644
--- a/drivers/staging/comedi/drivers/pcl711.c
+++ b/drivers/staging/comedi/drivers/pcl711.c
@@ -161,14 +161,13 @@ struct pcl711_private {
161 unsigned int divisor2; 161 unsigned int divisor2;
162}; 162};
163 163
164#define devpriv ((struct pcl711_private *)dev->private)
165
166static irqreturn_t pcl711_interrupt(int irq, void *d) 164static irqreturn_t pcl711_interrupt(int irq, void *d)
167{ 165{
168 int lo, hi; 166 int lo, hi;
169 int data; 167 int data;
170 struct comedi_device *dev = d; 168 struct comedi_device *dev = d;
171 const struct pcl711_board *board = comedi_board(dev); 169 const struct pcl711_board *board = comedi_board(dev);
170 struct pcl711_private *devpriv = dev->private;
172 struct comedi_subdevice *s = &dev->subdevices[0]; 171 struct comedi_subdevice *s = &dev->subdevices[0];
173 172
174 if (!dev->attached) { 173 if (!dev->attached) {
@@ -264,6 +263,7 @@ ok:
264static int pcl711_ai_cmdtest(struct comedi_device *dev, 263static int pcl711_ai_cmdtest(struct comedi_device *dev,
265 struct comedi_subdevice *s, struct comedi_cmd *cmd) 264 struct comedi_subdevice *s, struct comedi_cmd *cmd)
266{ 265{
266 struct pcl711_private *devpriv = dev->private;
267 int tmp; 267 int tmp;
268 int err = 0; 268 int err = 0;
269 269
@@ -289,38 +289,24 @@ static int pcl711_ai_cmdtest(struct comedi_device *dev,
289 if (err) 289 if (err)
290 return 2; 290 return 2;
291 291
292 /* step 3 */ 292 /* Step 3: check if arguments are trivially valid */
293
294 err |= cfc_check_trigger_arg_is(&cmd->start_arg, 0);
293 295
294 if (cmd->start_arg != 0) {
295 cmd->start_arg = 0;
296 err++;
297 }
298 if (cmd->scan_begin_src == TRIG_EXT) { 296 if (cmd->scan_begin_src == TRIG_EXT) {
299 if (cmd->scan_begin_arg != 0) { 297 err |= cfc_check_trigger_arg_is(&cmd->scan_begin_arg, 0);
300 cmd->scan_begin_arg = 0;
301 err++;
302 }
303 } else { 298 } else {
304#define MAX_SPEED 1000 299#define MAX_SPEED 1000
305#define TIMER_BASE 100 300#define TIMER_BASE 100
306 if (cmd->scan_begin_arg < MAX_SPEED) { 301 err |= cfc_check_trigger_arg_min(&cmd->scan_begin_arg,
307 cmd->scan_begin_arg = MAX_SPEED; 302 MAX_SPEED);
308 err++;
309 }
310 }
311 if (cmd->convert_arg != 0) {
312 cmd->convert_arg = 0;
313 err++;
314 }
315 if (cmd->scan_end_arg != cmd->chanlist_len) {
316 cmd->scan_end_arg = cmd->chanlist_len;
317 err++;
318 } 303 }
304
305 err |= cfc_check_trigger_arg_is(&cmd->convert_arg, 0);
306 err |= cfc_check_trigger_arg_is(&cmd->scan_end_arg, cmd->chanlist_len);
307
319 if (cmd->stop_src == TRIG_NONE) { 308 if (cmd->stop_src == TRIG_NONE) {
320 if (cmd->stop_arg != 0) { 309 err |= cfc_check_trigger_arg_is(&cmd->stop_arg, 0);
321 cmd->stop_arg = 0;
322 err++;
323 }
324 } else { 310 } else {
325 /* ignore */ 311 /* ignore */
326 } 312 }
@@ -349,6 +335,7 @@ static int pcl711_ai_cmdtest(struct comedi_device *dev,
349 335
350static int pcl711_ai_cmd(struct comedi_device *dev, struct comedi_subdevice *s) 336static int pcl711_ai_cmd(struct comedi_device *dev, struct comedi_subdevice *s)
351{ 337{
338 struct pcl711_private *devpriv = dev->private;
352 int timer1, timer2; 339 int timer1, timer2;
353 struct comedi_cmd *cmd = &s->async->cmd; 340 struct comedi_cmd *cmd = &s->async->cmd;
354 341
@@ -398,6 +385,7 @@ static int pcl711_ai_cmd(struct comedi_device *dev, struct comedi_subdevice *s)
398static int pcl711_ao_insn(struct comedi_device *dev, struct comedi_subdevice *s, 385static int pcl711_ao_insn(struct comedi_device *dev, struct comedi_subdevice *s,
399 struct comedi_insn *insn, unsigned int *data) 386 struct comedi_insn *insn, unsigned int *data)
400{ 387{
388 struct pcl711_private *devpriv = dev->private;
401 int n; 389 int n;
402 int chan = CR_CHAN(insn->chanspec); 390 int chan = CR_CHAN(insn->chanspec);
403 391
@@ -417,6 +405,7 @@ static int pcl711_ao_insn_read(struct comedi_device *dev,
417 struct comedi_subdevice *s, 405 struct comedi_subdevice *s,
418 struct comedi_insn *insn, unsigned int *data) 406 struct comedi_insn *insn, unsigned int *data)
419{ 407{
408 struct pcl711_private *devpriv = dev->private;
420 int n; 409 int n;
421 int chan = CR_CHAN(insn->chanspec); 410 int chan = CR_CHAN(insn->chanspec);
422 411
@@ -460,6 +449,7 @@ static int pcl711_do_insn_bits(struct comedi_device *dev,
460static int pcl711_attach(struct comedi_device *dev, struct comedi_devconfig *it) 449static int pcl711_attach(struct comedi_device *dev, struct comedi_devconfig *it)
461{ 450{
462 const struct pcl711_board *board = comedi_board(dev); 451 const struct pcl711_board *board = comedi_board(dev);
452 struct pcl711_private *devpriv;
463 int ret; 453 int ret;
464 unsigned long iobase; 454 unsigned long iobase;
465 unsigned int irq; 455 unsigned int irq;
@@ -499,9 +489,10 @@ static int pcl711_attach(struct comedi_device *dev, struct comedi_devconfig *it)
499 if (ret) 489 if (ret)
500 return ret; 490 return ret;
501 491
502 ret = alloc_private(dev, sizeof(struct pcl711_private)); 492 devpriv = kzalloc(sizeof(*devpriv), GFP_KERNEL);
503 if (ret < 0) 493 if (!devpriv)
504 return ret; 494 return -ENOMEM;
495 dev->private = devpriv;
505 496
506 s = &dev->subdevices[0]; 497 s = &dev->subdevices[0];
507 /* AI subdevice */ 498 /* AI subdevice */
diff --git a/drivers/staging/comedi/drivers/pcl726.c b/drivers/staging/comedi/drivers/pcl726.c
index 07e72de982ac..50e01968f19c 100644
--- a/drivers/staging/comedi/drivers/pcl726.c
+++ b/drivers/staging/comedi/drivers/pcl726.c
@@ -152,11 +152,10 @@ struct pcl726_private {
152 unsigned int ao_readback[12]; 152 unsigned int ao_readback[12];
153}; 153};
154 154
155#define devpriv ((struct pcl726_private *)dev->private)
156
157static int pcl726_ao_insn(struct comedi_device *dev, struct comedi_subdevice *s, 155static int pcl726_ao_insn(struct comedi_device *dev, struct comedi_subdevice *s,
158 struct comedi_insn *insn, unsigned int *data) 156 struct comedi_insn *insn, unsigned int *data)
159{ 157{
158 struct pcl726_private *devpriv = dev->private;
160 int hi, lo; 159 int hi, lo;
161 int n; 160 int n;
162 int chan = CR_CHAN(insn->chanspec); 161 int chan = CR_CHAN(insn->chanspec);
@@ -183,6 +182,7 @@ static int pcl726_ao_insn_read(struct comedi_device *dev,
183 struct comedi_subdevice *s, 182 struct comedi_subdevice *s,
184 struct comedi_insn *insn, unsigned int *data) 183 struct comedi_insn *insn, unsigned int *data)
185{ 184{
185 struct pcl726_private *devpriv = dev->private;
186 int chan = CR_CHAN(insn->chanspec); 186 int chan = CR_CHAN(insn->chanspec);
187 int n; 187 int n;
188 188
@@ -226,6 +226,7 @@ static int pcl726_do_insn_bits(struct comedi_device *dev,
226static int pcl726_attach(struct comedi_device *dev, struct comedi_devconfig *it) 226static int pcl726_attach(struct comedi_device *dev, struct comedi_devconfig *it)
227{ 227{
228 const struct pcl726_board *board = comedi_board(dev); 228 const struct pcl726_board *board = comedi_board(dev);
229 struct pcl726_private *devpriv;
229 struct comedi_subdevice *s; 230 struct comedi_subdevice *s;
230 unsigned long iobase; 231 unsigned long iobase;
231 unsigned int iorange; 232 unsigned int iorange;
@@ -247,9 +248,10 @@ static int pcl726_attach(struct comedi_device *dev, struct comedi_devconfig *it)
247 248
248 dev->board_name = board->name; 249 dev->board_name = board->name;
249 250
250 ret = alloc_private(dev, sizeof(struct pcl726_private)); 251 devpriv = kzalloc(sizeof(*devpriv), GFP_KERNEL);
251 if (ret < 0) 252 if (!devpriv)
252 return -ENOMEM; 253 return -ENOMEM;
254 dev->private = devpriv;
253 255
254 for (i = 0; i < 12; i++) { 256 for (i = 0; i < 12; i++) {
255 devpriv->bipolar[i] = 0; 257 devpriv->bipolar[i] = 0;
diff --git a/drivers/staging/comedi/drivers/pcl812.c b/drivers/staging/comedi/drivers/pcl812.c
index 3cf55ff93083..560930e6a8e9 100644
--- a/drivers/staging/comedi/drivers/pcl812.c
+++ b/drivers/staging/comedi/drivers/pcl812.c
@@ -369,8 +369,6 @@ struct pcl812_private {
369 unsigned int ao_readback[2]; /* data for AO readback */ 369 unsigned int ao_readback[2]; /* data for AO readback */
370}; 370};
371 371
372#define devpriv ((struct pcl812_private *)dev->private)
373
374/* 372/*
375============================================================================== 373==============================================================================
376*/ 374*/
@@ -388,6 +386,7 @@ static int pcl812_ai_insn_read(struct comedi_device *dev,
388 struct comedi_subdevice *s, 386 struct comedi_subdevice *s,
389 struct comedi_insn *insn, unsigned int *data) 387 struct comedi_insn *insn, unsigned int *data)
390{ 388{
389 struct pcl812_private *devpriv = dev->private;
391 int n; 390 int n;
392 int timeout, hi; 391 int timeout, hi;
393 392
@@ -465,6 +464,7 @@ static int pcl812_ao_insn_write(struct comedi_device *dev,
465 struct comedi_subdevice *s, 464 struct comedi_subdevice *s,
466 struct comedi_insn *insn, unsigned int *data) 465 struct comedi_insn *insn, unsigned int *data)
467{ 466{
467 struct pcl812_private *devpriv = dev->private;
468 int chan = CR_CHAN(insn->chanspec); 468 int chan = CR_CHAN(insn->chanspec);
469 int i; 469 int i;
470 470
@@ -486,6 +486,7 @@ static int pcl812_ao_insn_read(struct comedi_device *dev,
486 struct comedi_subdevice *s, 486 struct comedi_subdevice *s,
487 struct comedi_insn *insn, unsigned int *data) 487 struct comedi_insn *insn, unsigned int *data)
488{ 488{
489 struct pcl812_private *devpriv = dev->private;
489 int chan = CR_CHAN(insn->chanspec); 490 int chan = CR_CHAN(insn->chanspec);
490 int i; 491 int i;
491 492
@@ -533,6 +534,7 @@ static int pcl812_ai_cmdtest(struct comedi_device *dev,
533 struct comedi_subdevice *s, struct comedi_cmd *cmd) 534 struct comedi_subdevice *s, struct comedi_cmd *cmd)
534{ 535{
535 const struct pcl812_board *board = comedi_board(dev); 536 const struct pcl812_board *board = comedi_board(dev);
537 struct pcl812_private *devpriv = dev->private;
536 int err = 0; 538 int err = 0;
537 unsigned int flags; 539 unsigned int flags;
538 int tmp, divisor1, divisor2; 540 int tmp, divisor1, divisor2;
@@ -563,53 +565,25 @@ static int pcl812_ai_cmdtest(struct comedi_device *dev,
563 if (err) 565 if (err)
564 return 2; 566 return 2;
565 567
566 /* step 3: make sure arguments are trivially compatible */ 568 /* Step 3: check if arguments are trivially valid */
567 569
568 if (cmd->start_arg != 0) { 570 err |= cfc_check_trigger_arg_is(&cmd->start_arg, 0);
569 cmd->start_arg = 0; 571 err |= cfc_check_trigger_arg_is(&cmd->scan_begin_arg, 0);
570 err++;
571 }
572 572
573 if (cmd->scan_begin_arg != 0) { 573 if (cmd->convert_src == TRIG_TIMER)
574 cmd->scan_begin_arg = 0; 574 err |= cfc_check_trigger_arg_min(&cmd->convert_arg,
575 err++; 575 board->ai_ns_min);
576 } 576 else /* TRIG_EXT */
577 err |= cfc_check_trigger_arg_is(&cmd->convert_arg, 0);
577 578
578 if (cmd->convert_src == TRIG_TIMER) { 579 err |= cfc_check_trigger_arg_min(&cmd->chanlist_len, 1);
579 if (cmd->convert_arg < board->ai_ns_min) { 580 err |= cfc_check_trigger_arg_max(&cmd->chanlist_len, MAX_CHANLIST_LEN);
580 cmd->convert_arg = board->ai_ns_min; 581 err |= cfc_check_trigger_arg_is(&cmd->scan_end_arg, cmd->chanlist_len);
581 err++;
582 }
583 } else { /* TRIG_EXT */
584 if (cmd->convert_arg != 0) {
585 cmd->convert_arg = 0;
586 err++;
587 }
588 }
589 582
590 if (!cmd->chanlist_len) { 583 if (cmd->stop_src == TRIG_COUNT)
591 cmd->chanlist_len = 1; 584 err |= cfc_check_trigger_arg_min(&cmd->stop_arg, 1);
592 err++; 585 else /* TRIG_NONE */
593 } 586 err |= cfc_check_trigger_arg_is(&cmd->stop_arg, 0);
594 if (cmd->chanlist_len > MAX_CHANLIST_LEN) {
595 cmd->chanlist_len = board->n_aichan;
596 err++;
597 }
598 if (cmd->scan_end_arg != cmd->chanlist_len) {
599 cmd->scan_end_arg = cmd->chanlist_len;
600 err++;
601 }
602 if (cmd->stop_src == TRIG_COUNT) {
603 if (!cmd->stop_arg) {
604 cmd->stop_arg = 1;
605 err++;
606 }
607 } else { /* TRIG_NONE */
608 if (cmd->stop_arg != 0) {
609 cmd->stop_arg = 0;
610 err++;
611 }
612 }
613 587
614 if (err) 588 if (err)
615 return 3; 589 return 3;
@@ -639,6 +613,7 @@ static int pcl812_ai_cmdtest(struct comedi_device *dev,
639static int pcl812_ai_cmd(struct comedi_device *dev, struct comedi_subdevice *s) 613static int pcl812_ai_cmd(struct comedi_device *dev, struct comedi_subdevice *s)
640{ 614{
641 const struct pcl812_board *board = comedi_board(dev); 615 const struct pcl812_board *board = comedi_board(dev);
616 struct pcl812_private *devpriv = dev->private;
642 unsigned int divisor1 = 0, divisor2 = 0, i, dma_flags, bytes; 617 unsigned int divisor1 = 0, divisor2 = 0, i, dma_flags, bytes;
643 struct comedi_cmd *cmd = &s->async->cmd; 618 struct comedi_cmd *cmd = &s->async->cmd;
644 619
@@ -789,6 +764,7 @@ static irqreturn_t interrupt_pcl812_ai_int(int irq, void *d)
789 char err = 1; 764 char err = 1;
790 unsigned int mask, timeout; 765 unsigned int mask, timeout;
791 struct comedi_device *dev = d; 766 struct comedi_device *dev = d;
767 struct pcl812_private *devpriv = dev->private;
792 struct comedi_subdevice *s = &dev->subdevices[0]; 768 struct comedi_subdevice *s = &dev->subdevices[0];
793 unsigned int next_chan; 769 unsigned int next_chan;
794 770
@@ -862,6 +838,7 @@ static void transfer_from_dma_buf(struct comedi_device *dev,
862 struct comedi_subdevice *s, short *ptr, 838 struct comedi_subdevice *s, short *ptr,
863 unsigned int bufptr, unsigned int len) 839 unsigned int bufptr, unsigned int len)
864{ 840{
841 struct pcl812_private *devpriv = dev->private;
865 unsigned int i; 842 unsigned int i;
866 843
867 s->async->events = 0; 844 s->async->events = 0;
@@ -892,6 +869,7 @@ static void transfer_from_dma_buf(struct comedi_device *dev,
892static irqreturn_t interrupt_pcl812_ai_dma(int irq, void *d) 869static irqreturn_t interrupt_pcl812_ai_dma(int irq, void *d)
893{ 870{
894 struct comedi_device *dev = d; 871 struct comedi_device *dev = d;
872 struct pcl812_private *devpriv = dev->private;
895 struct comedi_subdevice *s = &dev->subdevices[0]; 873 struct comedi_subdevice *s = &dev->subdevices[0];
896 unsigned long dma_flags; 874 unsigned long dma_flags;
897 int len, bufptr; 875 int len, bufptr;
@@ -938,6 +916,7 @@ static irqreturn_t interrupt_pcl812_ai_dma(int irq, void *d)
938static irqreturn_t interrupt_pcl812(int irq, void *d) 916static irqreturn_t interrupt_pcl812(int irq, void *d)
939{ 917{
940 struct comedi_device *dev = d; 918 struct comedi_device *dev = d;
919 struct pcl812_private *devpriv = dev->private;
941 920
942 if (!dev->attached) { 921 if (!dev->attached) {
943 comedi_error(dev, "spurious interrupt"); 922 comedi_error(dev, "spurious interrupt");
@@ -954,6 +933,7 @@ static irqreturn_t interrupt_pcl812(int irq, void *d)
954*/ 933*/
955static int pcl812_ai_poll(struct comedi_device *dev, struct comedi_subdevice *s) 934static int pcl812_ai_poll(struct comedi_device *dev, struct comedi_subdevice *s)
956{ 935{
936 struct pcl812_private *devpriv = dev->private;
957 unsigned long flags; 937 unsigned long flags;
958 unsigned int top1, top2, i; 938 unsigned int top1, top2, i;
959 939
@@ -1002,6 +982,7 @@ static void setup_range_channel(struct comedi_device *dev,
1002 struct comedi_subdevice *s, 982 struct comedi_subdevice *s,
1003 unsigned int rangechan, char wait) 983 unsigned int rangechan, char wait)
1004{ 984{
985 struct pcl812_private *devpriv = dev->private;
1005 unsigned char chan_reg = CR_CHAN(rangechan); /* normal board */ 986 unsigned char chan_reg = CR_CHAN(rangechan); /* normal board */
1006 /* gain index */ 987 /* gain index */
1007 unsigned char gain_reg = CR_RANGE(rangechan) + 988 unsigned char gain_reg = CR_RANGE(rangechan) +
@@ -1063,8 +1044,9 @@ static void start_pacer(struct comedi_device *dev, int mode,
1063static void free_resources(struct comedi_device *dev) 1044static void free_resources(struct comedi_device *dev)
1064{ 1045{
1065 const struct pcl812_board *board = comedi_board(dev); 1046 const struct pcl812_board *board = comedi_board(dev);
1047 struct pcl812_private *devpriv = dev->private;
1066 1048
1067 if (dev->private) { 1049 if (devpriv) {
1068 if (devpriv->dmabuf[0]) 1050 if (devpriv->dmabuf[0])
1069 free_pages(devpriv->dmabuf[0], devpriv->dmapages[0]); 1051 free_pages(devpriv->dmabuf[0], devpriv->dmapages[0]);
1070 if (devpriv->dmabuf[1]) 1052 if (devpriv->dmabuf[1])
@@ -1084,6 +1066,8 @@ static void free_resources(struct comedi_device *dev)
1084static int pcl812_ai_cancel(struct comedi_device *dev, 1066static int pcl812_ai_cancel(struct comedi_device *dev,
1085 struct comedi_subdevice *s) 1067 struct comedi_subdevice *s)
1086{ 1068{
1069 struct pcl812_private *devpriv = dev->private;
1070
1087 if (devpriv->ai_dma) 1071 if (devpriv->ai_dma)
1088 disable_dma(devpriv->dma); 1072 disable_dma(devpriv->dma);
1089 outb(0, dev->iobase + PCL812_CLRINT); /* clear INT request */ 1073 outb(0, dev->iobase + PCL812_CLRINT); /* clear INT request */
@@ -1100,6 +1084,7 @@ static int pcl812_ai_cancel(struct comedi_device *dev,
1100static void pcl812_reset(struct comedi_device *dev) 1084static void pcl812_reset(struct comedi_device *dev)
1101{ 1085{
1102 const struct pcl812_board *board = comedi_board(dev); 1086 const struct pcl812_board *board = comedi_board(dev);
1087 struct pcl812_private *devpriv = dev->private;
1103 1088
1104 outb(0, dev->iobase + PCL812_MUX); 1089 outb(0, dev->iobase + PCL812_MUX);
1105 outb(0 + devpriv->range_correction, dev->iobase + PCL812_GAIN); 1090 outb(0 + devpriv->range_correction, dev->iobase + PCL812_GAIN);
@@ -1135,6 +1120,7 @@ static void pcl812_reset(struct comedi_device *dev)
1135static int pcl812_attach(struct comedi_device *dev, struct comedi_devconfig *it) 1120static int pcl812_attach(struct comedi_device *dev, struct comedi_devconfig *it)
1136{ 1121{
1137 const struct pcl812_board *board = comedi_board(dev); 1122 const struct pcl812_board *board = comedi_board(dev);
1123 struct pcl812_private *devpriv;
1138 int ret, subdev; 1124 int ret, subdev;
1139 unsigned long iobase; 1125 unsigned long iobase;
1140 unsigned int irq; 1126 unsigned int irq;
@@ -1153,11 +1139,12 @@ static int pcl812_attach(struct comedi_device *dev, struct comedi_devconfig *it)
1153 } 1139 }
1154 dev->iobase = iobase; 1140 dev->iobase = iobase;
1155 1141
1156 ret = alloc_private(dev, sizeof(struct pcl812_private)); 1142 devpriv = kzalloc(sizeof(*devpriv), GFP_KERNEL);
1157 if (ret < 0) { 1143 if (!devpriv) {
1158 free_resources(dev); 1144 free_resources(dev);
1159 return ret; /* Can't alloc mem */ 1145 return -ENOMEM;
1160 } 1146 }
1147 dev->private = devpriv;
1161 1148
1162 dev->board_name = board->name; 1149 dev->board_name = board->name;
1163 1150
diff --git a/drivers/staging/comedi/drivers/pcl816.c b/drivers/staging/comedi/drivers/pcl816.c
index 0822de058e4d..f625fdab335c 100644
--- a/drivers/staging/comedi/drivers/pcl816.c
+++ b/drivers/staging/comedi/drivers/pcl816.c
@@ -126,8 +126,6 @@ struct pcl816_board {
126 int i8254_osc_base; /* 1/frequency of on board oscilator in ns */ 126 int i8254_osc_base; /* 1/frequency of on board oscilator in ns */
127}; 127};
128 128
129#define devpriv ((struct pcl816_private *)dev->private)
130
131#ifdef unused 129#ifdef unused
132static int RTC_lock; /* RTC lock */ 130static int RTC_lock; /* RTC lock */
133static int RTC_timer_lock; /* RTC int lock */ 131static int RTC_timer_lock; /* RTC int lock */
@@ -259,6 +257,7 @@ static int pcl816_ai_insn_read(struct comedi_device *dev,
259static irqreturn_t interrupt_pcl816_ai_mode13_int(int irq, void *d) 257static irqreturn_t interrupt_pcl816_ai_mode13_int(int irq, void *d)
260{ 258{
261 struct comedi_device *dev = d; 259 struct comedi_device *dev = d;
260 struct pcl816_private *devpriv = dev->private;
262 struct comedi_subdevice *s = &dev->subdevices[0]; 261 struct comedi_subdevice *s = &dev->subdevices[0];
263 int low, hi; 262 int low, hi;
264 int timeout = 50; /* wait max 50us */ 263 int timeout = 50; /* wait max 50us */
@@ -315,6 +314,7 @@ static void transfer_from_dma_buf(struct comedi_device *dev,
315 struct comedi_subdevice *s, short *ptr, 314 struct comedi_subdevice *s, short *ptr,
316 unsigned int bufptr, unsigned int len) 315 unsigned int bufptr, unsigned int len)
317{ 316{
317 struct pcl816_private *devpriv = dev->private;
318 int i; 318 int i;
319 319
320 s->async->events = 0; 320 s->async->events = 0;
@@ -350,6 +350,7 @@ static void transfer_from_dma_buf(struct comedi_device *dev,
350static irqreturn_t interrupt_pcl816_ai_mode13_dma(int irq, void *d) 350static irqreturn_t interrupt_pcl816_ai_mode13_dma(int irq, void *d)
351{ 351{
352 struct comedi_device *dev = d; 352 struct comedi_device *dev = d;
353 struct pcl816_private *devpriv = dev->private;
353 struct comedi_subdevice *s = &dev->subdevices[0]; 354 struct comedi_subdevice *s = &dev->subdevices[0];
354 int len, bufptr, this_dma_buf; 355 int len, bufptr, this_dma_buf;
355 unsigned long dma_flags; 356 unsigned long dma_flags;
@@ -398,6 +399,8 @@ static irqreturn_t interrupt_pcl816_ai_mode13_dma(int irq, void *d)
398static irqreturn_t interrupt_pcl816(int irq, void *d) 399static irqreturn_t interrupt_pcl816(int irq, void *d)
399{ 400{
400 struct comedi_device *dev = d; 401 struct comedi_device *dev = d;
402 struct pcl816_private *devpriv = dev->private;
403
401 DPRINTK("<I>"); 404 DPRINTK("<I>");
402 405
403 if (!dev->attached) { 406 if (!dev->attached) {
@@ -481,43 +484,23 @@ static int pcl816_ai_cmdtest(struct comedi_device *dev,
481 return 2; 484 return 2;
482 485
483 486
484 /* step 3: make sure arguments are trivially compatible */ 487 /* Step 3: check if arguments are trivially valid */
485 if (cmd->start_arg != 0) {
486 cmd->start_arg = 0;
487 err++;
488 }
489 488
490 if (cmd->scan_begin_arg != 0) { 489 err |= cfc_check_trigger_arg_is(&cmd->start_arg, 0);
491 cmd->scan_begin_arg = 0; 490 err |= cfc_check_trigger_arg_is(&cmd->scan_begin_arg, 0);
492 err++;
493 }
494 if (cmd->convert_src == TRIG_TIMER) {
495 if (cmd->convert_arg < board->ai_ns_min) {
496 cmd->convert_arg = board->ai_ns_min;
497 err++;
498 }
499 } else { /* TRIG_EXT */
500 if (cmd->convert_arg != 0) {
501 cmd->convert_arg = 0;
502 err++;
503 }
504 }
505 491
506 if (cmd->scan_end_arg != cmd->chanlist_len) { 492 if (cmd->convert_src == TRIG_TIMER)
507 cmd->scan_end_arg = cmd->chanlist_len; 493 err |= cfc_check_trigger_arg_min(&cmd->convert_arg,
508 err++; 494 board->ai_ns_min);
509 } 495 else /* TRIG_EXT */
510 if (cmd->stop_src == TRIG_COUNT) { 496 err |= cfc_check_trigger_arg_is(&cmd->convert_arg, 0);
511 if (!cmd->stop_arg) { 497
512 cmd->stop_arg = 1; 498 err |= cfc_check_trigger_arg_is(&cmd->scan_end_arg, cmd->chanlist_len);
513 err++; 499
514 } 500 if (cmd->stop_src == TRIG_COUNT)
515 } else { /* TRIG_NONE */ 501 err |= cfc_check_trigger_arg_min(&cmd->stop_arg, 1);
516 if (cmd->stop_arg != 0) { 502 else /* TRIG_NONE */
517 cmd->stop_arg = 0; 503 err |= cfc_check_trigger_arg_is(&cmd->stop_arg, 0);
518 err++;
519 }
520 }
521 504
522 if (err) 505 if (err)
523 return 3; 506 return 3;
@@ -554,6 +537,7 @@ static int pcl816_ai_cmdtest(struct comedi_device *dev,
554static int pcl816_ai_cmd(struct comedi_device *dev, struct comedi_subdevice *s) 537static int pcl816_ai_cmd(struct comedi_device *dev, struct comedi_subdevice *s)
555{ 538{
556 const struct pcl816_board *board = comedi_board(dev); 539 const struct pcl816_board *board = comedi_board(dev);
540 struct pcl816_private *devpriv = dev->private;
557 unsigned int divisor1 = 0, divisor2 = 0, dma_flags, bytes, dmairq; 541 unsigned int divisor1 = 0, divisor2 = 0, dma_flags, bytes, dmairq;
558 struct comedi_cmd *cmd = &s->async->cmd; 542 struct comedi_cmd *cmd = &s->async->cmd;
559 unsigned int seglen; 543 unsigned int seglen;
@@ -682,6 +666,7 @@ static int pcl816_ai_cmd(struct comedi_device *dev, struct comedi_subdevice *s)
682 666
683static int pcl816_ai_poll(struct comedi_device *dev, struct comedi_subdevice *s) 667static int pcl816_ai_poll(struct comedi_device *dev, struct comedi_subdevice *s)
684{ 668{
669 struct pcl816_private *devpriv = dev->private;
685 unsigned long flags; 670 unsigned long flags;
686 unsigned int top1, top2, i; 671 unsigned int top1, top2, i;
687 672
@@ -727,6 +712,8 @@ static int pcl816_ai_poll(struct comedi_device *dev, struct comedi_subdevice *s)
727static int pcl816_ai_cancel(struct comedi_device *dev, 712static int pcl816_ai_cancel(struct comedi_device *dev,
728 struct comedi_subdevice *s) 713 struct comedi_subdevice *s)
729{ 714{
715 struct pcl816_private *devpriv = dev->private;
716
730/* DEBUG(printk("pcl816_ai_cancel()\n");) */ 717/* DEBUG(printk("pcl816_ai_cancel()\n");) */
731 718
732 if (devpriv->irq_blocked > 0) { 719 if (devpriv->irq_blocked > 0) {
@@ -932,6 +919,7 @@ setup_channel_list(struct comedi_device *dev,
932 struct comedi_subdevice *s, unsigned int *chanlist, 919 struct comedi_subdevice *s, unsigned int *chanlist,
933 unsigned int seglen) 920 unsigned int seglen)
934{ 921{
922 struct pcl816_private *devpriv = dev->private;
935 unsigned int i; 923 unsigned int i;
936 924
937 devpriv->ai_act_chanlist_len = seglen; 925 devpriv->ai_act_chanlist_len = seglen;
@@ -991,6 +979,7 @@ static int set_rtc_irq_bit(unsigned char bit)
991static int pcl816_attach(struct comedi_device *dev, struct comedi_devconfig *it) 979static int pcl816_attach(struct comedi_device *dev, struct comedi_devconfig *it)
992{ 980{
993 const struct pcl816_board *board = comedi_board(dev); 981 const struct pcl816_board *board = comedi_board(dev);
982 struct pcl816_private *devpriv;
994 int ret; 983 int ret;
995 unsigned long iobase; 984 unsigned long iobase;
996 unsigned int irq, dma; 985 unsigned int irq, dma;
@@ -1015,9 +1004,10 @@ static int pcl816_attach(struct comedi_device *dev, struct comedi_devconfig *it)
1015 return -EIO; 1004 return -EIO;
1016 } 1005 }
1017 1006
1018 ret = alloc_private(dev, sizeof(struct pcl816_private)); 1007 devpriv = kzalloc(sizeof(*devpriv), GFP_KERNEL);
1019 if (ret < 0) 1008 if (!devpriv)
1020 return ret; /* Can't alloc mem */ 1009 return -ENOMEM;
1010 dev->private = devpriv;
1021 1011
1022 dev->board_name = board->name; 1012 dev->board_name = board->name;
1023 1013
@@ -1216,6 +1206,7 @@ case COMEDI_SUBD_DO:
1216static void pcl816_detach(struct comedi_device *dev) 1206static void pcl816_detach(struct comedi_device *dev)
1217{ 1207{
1218 const struct pcl816_board *board = comedi_board(dev); 1208 const struct pcl816_board *board = comedi_board(dev);
1209 struct pcl816_private *devpriv = dev->private;
1219 1210
1220 if (dev->private) { 1211 if (dev->private) {
1221 pcl816_ai_cancel(dev, devpriv->sub_ai); 1212 pcl816_ai_cancel(dev, devpriv->sub_ai);
diff --git a/drivers/staging/comedi/drivers/pcl818.c b/drivers/staging/comedi/drivers/pcl818.c
index d4b0859d81f2..06127a5f62a0 100644
--- a/drivers/staging/comedi/drivers/pcl818.c
+++ b/drivers/staging/comedi/drivers/pcl818.c
@@ -326,8 +326,6 @@ static const unsigned int muxonechan[] = { 0x00, 0x11, 0x22, 0x33, 0x44, 0x55, 0
326 0x88, 0x99, 0xaa, 0xbb, 0xcc, 0xdd, 0xee, 0xff 326 0x88, 0x99, 0xaa, 0xbb, 0xcc, 0xdd, 0xee, 0xff
327}; 327};
328 328
329#define devpriv ((struct pcl818_private *)dev->private)
330
331/* 329/*
332============================================================================== 330==============================================================================
333*/ 331*/
@@ -406,6 +404,7 @@ static int pcl818_ao_insn_read(struct comedi_device *dev,
406 struct comedi_subdevice *s, 404 struct comedi_subdevice *s,
407 struct comedi_insn *insn, unsigned int *data) 405 struct comedi_insn *insn, unsigned int *data)
408{ 406{
407 struct pcl818_private *devpriv = dev->private;
409 int n; 408 int n;
410 int chan = CR_CHAN(insn->chanspec); 409 int chan = CR_CHAN(insn->chanspec);
411 410
@@ -419,6 +418,7 @@ static int pcl818_ao_insn_write(struct comedi_device *dev,
419 struct comedi_subdevice *s, 418 struct comedi_subdevice *s,
420 struct comedi_insn *insn, unsigned int *data) 419 struct comedi_insn *insn, unsigned int *data)
421{ 420{
421 struct pcl818_private *devpriv = dev->private;
422 int n; 422 int n;
423 int chan = CR_CHAN(insn->chanspec); 423 int chan = CR_CHAN(insn->chanspec);
424 424
@@ -478,6 +478,7 @@ static int pcl818_do_insn_bits(struct comedi_device *dev,
478static irqreturn_t interrupt_pcl818_ai_mode13_int(int irq, void *d) 478static irqreturn_t interrupt_pcl818_ai_mode13_int(int irq, void *d)
479{ 479{
480 struct comedi_device *dev = d; 480 struct comedi_device *dev = d;
481 struct pcl818_private *devpriv = dev->private;
481 struct comedi_subdevice *s = &dev->subdevices[0]; 482 struct comedi_subdevice *s = &dev->subdevices[0];
482 int low; 483 int low;
483 int timeout = 50; /* wait max 50us */ 484 int timeout = 50; /* wait max 50us */
@@ -537,6 +538,7 @@ conv_finish:
537static irqreturn_t interrupt_pcl818_ai_mode13_dma(int irq, void *d) 538static irqreturn_t interrupt_pcl818_ai_mode13_dma(int irq, void *d)
538{ 539{
539 struct comedi_device *dev = d; 540 struct comedi_device *dev = d;
541 struct pcl818_private *devpriv = dev->private;
540 struct comedi_subdevice *s = &dev->subdevices[0]; 542 struct comedi_subdevice *s = &dev->subdevices[0];
541 int i, len, bufptr; 543 int i, len, bufptr;
542 unsigned long flags; 544 unsigned long flags;
@@ -616,6 +618,7 @@ static irqreturn_t interrupt_pcl818_ai_mode13_dma(int irq, void *d)
616static irqreturn_t interrupt_pcl818_ai_mode13_dma_rtc(int irq, void *d) 618static irqreturn_t interrupt_pcl818_ai_mode13_dma_rtc(int irq, void *d)
617{ 619{
618 struct comedi_device *dev = d; 620 struct comedi_device *dev = d;
621 struct pcl818_private *devpriv = dev->private;
619 struct comedi_subdevice *s = &dev->subdevices[0]; 622 struct comedi_subdevice *s = &dev->subdevices[0];
620 unsigned long tmp; 623 unsigned long tmp;
621 unsigned int top1, top2, i, bufptr; 624 unsigned int top1, top2, i, bufptr;
@@ -721,6 +724,7 @@ static irqreturn_t interrupt_pcl818_ai_mode13_dma_rtc(int irq, void *d)
721static irqreturn_t interrupt_pcl818_ai_mode13_fifo(int irq, void *d) 724static irqreturn_t interrupt_pcl818_ai_mode13_fifo(int irq, void *d)
722{ 725{
723 struct comedi_device *dev = d; 726 struct comedi_device *dev = d;
727 struct pcl818_private *devpriv = dev->private;
724 struct comedi_subdevice *s = &dev->subdevices[0]; 728 struct comedi_subdevice *s = &dev->subdevices[0];
725 int i, len, lo; 729 int i, len, lo;
726 730
@@ -795,6 +799,7 @@ static irqreturn_t interrupt_pcl818_ai_mode13_fifo(int irq, void *d)
795static irqreturn_t interrupt_pcl818(int irq, void *d) 799static irqreturn_t interrupt_pcl818(int irq, void *d)
796{ 800{
797 struct comedi_device *dev = d; 801 struct comedi_device *dev = d;
802 struct pcl818_private *devpriv = dev->private;
798 803
799 if (!dev->attached) { 804 if (!dev->attached) {
800 comedi_error(dev, "premature interrupt"); 805 comedi_error(dev, "premature interrupt");
@@ -861,6 +866,7 @@ static irqreturn_t interrupt_pcl818(int irq, void *d)
861static void pcl818_ai_mode13dma_int(int mode, struct comedi_device *dev, 866static void pcl818_ai_mode13dma_int(int mode, struct comedi_device *dev,
862 struct comedi_subdevice *s) 867 struct comedi_subdevice *s)
863{ 868{
869 struct pcl818_private *devpriv = dev->private;
864 unsigned int flags; 870 unsigned int flags;
865 unsigned int bytes; 871 unsigned int bytes;
866 872
@@ -902,6 +908,7 @@ static void pcl818_ai_mode13dma_int(int mode, struct comedi_device *dev,
902static void pcl818_ai_mode13dma_rtc(int mode, struct comedi_device *dev, 908static void pcl818_ai_mode13dma_rtc(int mode, struct comedi_device *dev,
903 struct comedi_subdevice *s) 909 struct comedi_subdevice *s)
904{ 910{
911 struct pcl818_private *devpriv = dev->private;
905 unsigned int flags; 912 unsigned int flags;
906 short *pole; 913 short *pole;
907 914
@@ -943,6 +950,7 @@ static void pcl818_ai_mode13dma_rtc(int mode, struct comedi_device *dev,
943static int pcl818_ai_cmd_mode(int mode, struct comedi_device *dev, 950static int pcl818_ai_cmd_mode(int mode, struct comedi_device *dev,
944 struct comedi_subdevice *s) 951 struct comedi_subdevice *s)
945{ 952{
953 struct pcl818_private *devpriv = dev->private;
946 struct comedi_cmd *cmd = &s->async->cmd; 954 struct comedi_cmd *cmd = &s->async->cmd;
947 int divisor1 = 0, divisor2 = 0; 955 int divisor1 = 0, divisor2 = 0;
948 unsigned int seglen; 956 unsigned int seglen;
@@ -1063,6 +1071,7 @@ static int pcl818_ai_cmd_mode(int mode, struct comedi_device *dev,
1063static int pcl818_ao_mode13(int mode, struct comedi_device *dev, 1071static int pcl818_ao_mode13(int mode, struct comedi_device *dev,
1064 struct comedi_subdevice *s, comedi_trig * it) 1072 struct comedi_subdevice *s, comedi_trig * it)
1065{ 1073{
1074 struct pcl818_private *devpriv = dev->private;
1066 int divisor1 = 0, divisor2 = 0; 1075 int divisor1 = 0, divisor2 = 0;
1067 1076
1068 if (!dev->irq) { 1077 if (!dev->irq) {
@@ -1222,6 +1231,7 @@ static void setup_channel_list(struct comedi_device *dev,
1222 unsigned int *chanlist, unsigned int n_chan, 1231 unsigned int *chanlist, unsigned int n_chan,
1223 unsigned int seglen) 1232 unsigned int seglen)
1224{ 1233{
1234 struct pcl818_private *devpriv = dev->private;
1225 int i; 1235 int i;
1226 1236
1227 devpriv->act_chanlist_len = seglen; 1237 devpriv->act_chanlist_len = seglen;
@@ -1259,6 +1269,7 @@ static int ai_cmdtest(struct comedi_device *dev, struct comedi_subdevice *s,
1259 struct comedi_cmd *cmd) 1269 struct comedi_cmd *cmd)
1260{ 1270{
1261 const struct pcl818_board *board = comedi_board(dev); 1271 const struct pcl818_board *board = comedi_board(dev);
1272 struct pcl818_private *devpriv = dev->private;
1262 int err = 0; 1273 int err = 0;
1263 int tmp, divisor1 = 0, divisor2 = 0; 1274 int tmp, divisor1 = 0, divisor2 = 0;
1264 1275
@@ -1283,45 +1294,23 @@ static int ai_cmdtest(struct comedi_device *dev, struct comedi_subdevice *s,
1283 if (err) 1294 if (err)
1284 return 2; 1295 return 2;
1285 1296
1286 /* step 3: make sure arguments are trivially compatible */ 1297 /* Step 3: check if arguments are trivially valid */
1287 1298
1288 if (cmd->start_arg != 0) { 1299 err |= cfc_check_trigger_arg_is(&cmd->start_arg, 0);
1289 cmd->start_arg = 0; 1300 err |= cfc_check_trigger_arg_is(&cmd->scan_begin_arg, 0);
1290 err++;
1291 }
1292 1301
1293 if (cmd->scan_begin_arg != 0) { 1302 if (cmd->convert_src == TRIG_TIMER)
1294 cmd->scan_begin_arg = 0; 1303 err |= cfc_check_trigger_arg_min(&cmd->convert_arg,
1295 err++; 1304 board->ns_min);
1296 } 1305 else /* TRIG_EXT */
1306 err |= cfc_check_trigger_arg_is(&cmd->convert_arg, 0);
1297 1307
1298 if (cmd->convert_src == TRIG_TIMER) { 1308 err |= cfc_check_trigger_arg_is(&cmd->scan_end_arg, cmd->chanlist_len);
1299 if (cmd->convert_arg < board->ns_min) {
1300 cmd->convert_arg = board->ns_min;
1301 err++;
1302 }
1303 } else { /* TRIG_EXT */
1304 if (cmd->convert_arg != 0) {
1305 cmd->convert_arg = 0;
1306 err++;
1307 }
1308 }
1309 1309
1310 if (cmd->scan_end_arg != cmd->chanlist_len) { 1310 if (cmd->stop_src == TRIG_COUNT)
1311 cmd->scan_end_arg = cmd->chanlist_len; 1311 err |= cfc_check_trigger_arg_min(&cmd->stop_arg, 1);
1312 err++; 1312 else /* TRIG_NONE */
1313 } 1313 err |= cfc_check_trigger_arg_is(&cmd->stop_arg, 0);
1314 if (cmd->stop_src == TRIG_COUNT) {
1315 if (!cmd->stop_arg) {
1316 cmd->stop_arg = 1;
1317 err++;
1318 }
1319 } else { /* TRIG_NONE */
1320 if (cmd->stop_arg != 0) {
1321 cmd->stop_arg = 0;
1322 err++;
1323 }
1324 }
1325 1314
1326 if (err) 1315 if (err)
1327 return 3; 1316 return 3;
@@ -1358,6 +1347,7 @@ static int ai_cmdtest(struct comedi_device *dev, struct comedi_subdevice *s,
1358*/ 1347*/
1359static int ai_cmd(struct comedi_device *dev, struct comedi_subdevice *s) 1348static int ai_cmd(struct comedi_device *dev, struct comedi_subdevice *s)
1360{ 1349{
1350 struct pcl818_private *devpriv = dev->private;
1361 struct comedi_cmd *cmd = &s->async->cmd; 1351 struct comedi_cmd *cmd = &s->async->cmd;
1362 int retval; 1352 int retval;
1363 1353
@@ -1397,6 +1387,8 @@ static int ai_cmd(struct comedi_device *dev, struct comedi_subdevice *s)
1397static int pcl818_ai_cancel(struct comedi_device *dev, 1387static int pcl818_ai_cancel(struct comedi_device *dev,
1398 struct comedi_subdevice *s) 1388 struct comedi_subdevice *s)
1399{ 1389{
1390 struct pcl818_private *devpriv = dev->private;
1391
1400 if (devpriv->irq_blocked > 0) { 1392 if (devpriv->irq_blocked > 0) {
1401 dev_dbg(dev->class_dev, "pcl818_ai_cancel()\n"); 1393 dev_dbg(dev->class_dev, "pcl818_ai_cancel()\n");
1402 devpriv->irq_was_now_closed = 1; 1394 devpriv->irq_was_now_closed = 1;
@@ -1482,6 +1474,7 @@ static int pcl818_check(unsigned long iobase)
1482static void pcl818_reset(struct comedi_device *dev) 1474static void pcl818_reset(struct comedi_device *dev)
1483{ 1475{
1484 const struct pcl818_board *board = comedi_board(dev); 1476 const struct pcl818_board *board = comedi_board(dev);
1477 struct pcl818_private *devpriv = dev->private;
1485 1478
1486 if (devpriv->usefifo) { /* FIFO shutdown */ 1479 if (devpriv->usefifo) { /* FIFO shutdown */
1487 outb(0, dev->iobase + PCL818_FI_INTCLR); 1480 outb(0, dev->iobase + PCL818_FI_INTCLR);
@@ -1552,6 +1545,7 @@ static int set_rtc_irq_bit(unsigned char bit)
1552static void rtc_dropped_irq(unsigned long data) 1545static void rtc_dropped_irq(unsigned long data)
1553{ 1546{
1554 struct comedi_device *dev = (void *)data; 1547 struct comedi_device *dev = (void *)data;
1548 struct pcl818_private *devpriv = dev->private;
1555 unsigned long flags, tmp; 1549 unsigned long flags, tmp;
1556 1550
1557 switch (devpriv->int818_mode) { 1551 switch (devpriv->int818_mode) {
@@ -1601,6 +1595,7 @@ static int rtc_setfreq_irq(int freq)
1601static int pcl818_attach(struct comedi_device *dev, struct comedi_devconfig *it) 1595static int pcl818_attach(struct comedi_device *dev, struct comedi_devconfig *it)
1602{ 1596{
1603 const struct pcl818_board *board = comedi_board(dev); 1597 const struct pcl818_board *board = comedi_board(dev);
1598 struct pcl818_private *devpriv;
1604 int ret; 1599 int ret;
1605 unsigned long iobase; 1600 unsigned long iobase;
1606 unsigned int irq; 1601 unsigned int irq;
@@ -1608,9 +1603,10 @@ static int pcl818_attach(struct comedi_device *dev, struct comedi_devconfig *it)
1608 unsigned long pages; 1603 unsigned long pages;
1609 struct comedi_subdevice *s; 1604 struct comedi_subdevice *s;
1610 1605
1611 ret = alloc_private(dev, sizeof(struct pcl818_private)); 1606 devpriv = kzalloc(sizeof(*devpriv), GFP_KERNEL);
1612 if (ret < 0) 1607 if (!devpriv)
1613 return ret; /* Can't alloc mem */ 1608 return -ENOMEM;
1609 dev->private = devpriv;
1614 1610
1615 /* claim our I/O space */ 1611 /* claim our I/O space */
1616 iobase = it->options[0]; 1612 iobase = it->options[0];
@@ -1892,7 +1888,9 @@ no_dma:
1892 1888
1893static void pcl818_detach(struct comedi_device *dev) 1889static void pcl818_detach(struct comedi_device *dev)
1894{ 1890{
1895 if (dev->private) { 1891 struct pcl818_private *devpriv = dev->private;
1892
1893 if (devpriv) {
1896 pcl818_ai_cancel(dev, devpriv->sub_ai); 1894 pcl818_ai_cancel(dev, devpriv->sub_ai);
1897 pcl818_reset(dev); 1895 pcl818_reset(dev);
1898 if (devpriv->dma) 1896 if (devpriv->dma)
diff --git a/drivers/staging/comedi/drivers/pcm3724.c b/drivers/staging/comedi/drivers/pcm3724.c
index 4102547dc6a8..5f062df1ead4 100644
--- a/drivers/staging/comedi/drivers/pcm3724.c
+++ b/drivers/staging/comedi/drivers/pcm3724.c
@@ -62,14 +62,6 @@ Copy/pasted/hacked from pcm724.c
62#define CR_A_MODE(a) ((a)<<5) 62#define CR_A_MODE(a) ((a)<<5)
63#define CR_CW 0x80 63#define CR_CW 0x80
64 64
65struct pcm3724_board {
66 const char *name; /* driver name */
67 int dio; /* num of DIO */
68 int numofports; /* num of 8255 subdevices */
69 unsigned int IRQbits; /* allowed interrupts */
70 unsigned int io_range; /* len of IO space */
71};
72
73/* used to track configured dios */ 65/* used to track configured dios */
74struct priv_pcm3724 { 66struct priv_pcm3724 {
75 int dio_1; 67 int dio_1;
@@ -156,13 +148,12 @@ static void do_3724_config(struct comedi_device *dev,
156static void enable_chan(struct comedi_device *dev, struct comedi_subdevice *s, 148static void enable_chan(struct comedi_device *dev, struct comedi_subdevice *s,
157 int chanspec) 149 int chanspec)
158{ 150{
151 struct priv_pcm3724 *priv = dev->private;
159 struct comedi_subdevice *s_dio1 = &dev->subdevices[0]; 152 struct comedi_subdevice *s_dio1 = &dev->subdevices[0];
160 unsigned int mask; 153 unsigned int mask;
161 int gatecfg; 154 int gatecfg;
162 struct priv_pcm3724 *priv;
163 155
164 gatecfg = 0; 156 gatecfg = 0;
165 priv = dev->private;
166 157
167 mask = 1 << CR_CHAN(chanspec); 158 mask = 1 << CR_CHAN(chanspec);
168 if (s == s_dio1) 159 if (s == s_dio1)
@@ -233,36 +224,33 @@ static int subdev_3724_insn_config(struct comedi_device *dev,
233static int pcm3724_attach(struct comedi_device *dev, 224static int pcm3724_attach(struct comedi_device *dev,
234 struct comedi_devconfig *it) 225 struct comedi_devconfig *it)
235{ 226{
236 const struct pcm3724_board *board = comedi_board(dev); 227 struct priv_pcm3724 *priv;
237 struct comedi_subdevice *s; 228 struct comedi_subdevice *s;
238 unsigned long iobase; 229 unsigned long iobase;
239 unsigned int iorange; 230 unsigned int iorange;
240 int ret, i, n_subdevices; 231 int ret, i;
232
233 dev->board_name = dev->driver->driver_name;
241 234
242 iobase = it->options[0]; 235 iobase = it->options[0];
243 iorange = board->io_range; 236 iorange = PCM3724_SIZE;
244 237
245 ret = alloc_private(dev, sizeof(struct priv_pcm3724)); 238 priv = kzalloc(sizeof(*priv), GFP_KERNEL);
246 if (ret < 0) 239 if (!priv)
247 return -ENOMEM; 240 return -ENOMEM;
248 241 dev->private = priv;
249 ((struct priv_pcm3724 *)(dev->private))->dio_1 = 0;
250 ((struct priv_pcm3724 *)(dev->private))->dio_2 = 0;
251 242
252 printk(KERN_INFO "comedi%d: pcm3724: board=%s, 0x%03lx ", dev->minor, 243 printk(KERN_INFO "comedi%d: pcm3724: board=%s, 0x%03lx ", dev->minor,
253 board->name, iobase); 244 dev->board_name, iobase);
254 if (!iobase || !request_region(iobase, iorange, "pcm3724")) { 245 if (!iobase || !request_region(iobase, iorange, "pcm3724")) {
255 printk("I/O port conflict\n"); 246 printk("I/O port conflict\n");
256 return -EIO; 247 return -EIO;
257 } 248 }
258 249
259 dev->iobase = iobase; 250 dev->iobase = iobase;
260 dev->board_name = board->name;
261 printk(KERN_INFO "\n"); 251 printk(KERN_INFO "\n");
262 252
263 n_subdevices = board->numofports; 253 ret = comedi_alloc_subdevices(dev, 2);
264
265 ret = comedi_alloc_subdevices(dev, n_subdevices);
266 if (ret) 254 if (ret)
267 return ret; 255 return ret;
268 256
@@ -277,7 +265,6 @@ static int pcm3724_attach(struct comedi_device *dev,
277 265
278static void pcm3724_detach(struct comedi_device *dev) 266static void pcm3724_detach(struct comedi_device *dev)
279{ 267{
280 const struct pcm3724_board *board = comedi_board(dev);
281 struct comedi_subdevice *s; 268 struct comedi_subdevice *s;
282 int i; 269 int i;
283 270
@@ -288,21 +275,14 @@ static void pcm3724_detach(struct comedi_device *dev)
288 } 275 }
289 } 276 }
290 if (dev->iobase) 277 if (dev->iobase)
291 release_region(dev->iobase, board->io_range); 278 release_region(dev->iobase, PCM3724_SIZE);
292} 279}
293 280
294static const struct pcm3724_board boardtypes[] = {
295 { "pcm3724", 48, 2, 0x00fc, PCM3724_SIZE, },
296};
297
298static struct comedi_driver pcm3724_driver = { 281static struct comedi_driver pcm3724_driver = {
299 .driver_name = "pcm3724", 282 .driver_name = "pcm3724",
300 .module = THIS_MODULE, 283 .module = THIS_MODULE,
301 .attach = pcm3724_attach, 284 .attach = pcm3724_attach,
302 .detach = pcm3724_detach, 285 .detach = pcm3724_detach,
303 .board_name = &boardtypes[0].name,
304 .num_names = ARRAY_SIZE(boardtypes),
305 .offset = sizeof(struct pcm3724_board),
306}; 286};
307module_comedi_driver(pcm3724_driver); 287module_comedi_driver(pcm3724_driver);
308 288
diff --git a/drivers/staging/comedi/drivers/pcm_common.c b/drivers/staging/comedi/drivers/pcm_common.c
index 85ee05ece9c8..8a718aea6f3c 100644
--- a/drivers/staging/comedi/drivers/pcm_common.c
+++ b/drivers/staging/comedi/drivers/pcm_common.c
@@ -29,41 +29,19 @@ int comedi_pcm_cmdtest(struct comedi_device *dev,
29 if (err) 29 if (err)
30 return 2; 30 return 2;
31 31
32 /* step 3: make sure arguments are trivially compatible */ 32 /* Step 3: check if arguments are trivially valid */
33 33
34 /* cmd->start_src == TRIG_NOW || cmd->start_src == TRIG_INT */ 34 err |= cfc_check_trigger_arg_is(&cmd->start_arg, 0);
35 if (cmd->start_arg != 0) { 35 err |= cfc_check_trigger_arg_is(&cmd->scan_begin_arg, 0);
36 cmd->start_arg = 0; 36 err |= cfc_check_trigger_arg_is(&cmd->convert_arg, 0);
37 err++; 37 err |= cfc_check_trigger_arg_is(&cmd->scan_end_arg, cmd->chanlist_len);
38 }
39
40 /* cmd->scan_begin_src == TRIG_EXT */
41 if (cmd->scan_begin_arg != 0) {
42 cmd->scan_begin_arg = 0;
43 err++;
44 }
45
46 /* cmd->convert_src == TRIG_NOW */
47 if (cmd->convert_arg != 0) {
48 cmd->convert_arg = 0;
49 err++;
50 }
51
52 /* cmd->scan_end_src == TRIG_COUNT */
53 if (cmd->scan_end_arg != cmd->chanlist_len) {
54 cmd->scan_end_arg = cmd->chanlist_len;
55 err++;
56 }
57 38
58 switch (cmd->stop_src) { 39 switch (cmd->stop_src) {
59 case TRIG_COUNT: 40 case TRIG_COUNT:
60 /* any count allowed */ 41 /* any count allowed */
61 break; 42 break;
62 case TRIG_NONE: 43 case TRIG_NONE:
63 if (cmd->stop_arg != 0) { 44 err |= cfc_check_trigger_arg_is(&cmd->stop_arg, 0);
64 cmd->stop_arg = 0;
65 err++;
66 }
67 break; 45 break;
68 default: 46 default:
69 break; 47 break;
diff --git a/drivers/staging/comedi/drivers/pcmad.c b/drivers/staging/comedi/drivers/pcmad.c
index 5efeb9205c2e..13e84215fac3 100644
--- a/drivers/staging/comedi/drivers/pcmad.c
+++ b/drivers/staging/comedi/drivers/pcmad.c
@@ -62,7 +62,6 @@ struct pcmad_priv_struct {
62 int differential; 62 int differential;
63 int twos_comp; 63 int twos_comp;
64}; 64};
65#define devpriv ((struct pcmad_priv_struct *)dev->private)
66 65
67#define TIMEOUT 100 66#define TIMEOUT 100
68 67
@@ -71,6 +70,7 @@ static int pcmad_ai_insn_read(struct comedi_device *dev,
71 struct comedi_insn *insn, unsigned int *data) 70 struct comedi_insn *insn, unsigned int *data)
72{ 71{
73 const struct pcmad_board_struct *board = comedi_board(dev); 72 const struct pcmad_board_struct *board = comedi_board(dev);
73 struct pcmad_priv_struct *devpriv = dev->private;
74 int i; 74 int i;
75 int chan; 75 int chan;
76 int n; 76 int n;
@@ -104,6 +104,7 @@ static int pcmad_ai_insn_read(struct comedi_device *dev,
104static int pcmad_attach(struct comedi_device *dev, struct comedi_devconfig *it) 104static int pcmad_attach(struct comedi_device *dev, struct comedi_devconfig *it)
105{ 105{
106 const struct pcmad_board_struct *board = comedi_board(dev); 106 const struct pcmad_board_struct *board = comedi_board(dev);
107 struct pcmad_priv_struct *devpriv;
107 int ret; 108 int ret;
108 struct comedi_subdevice *s; 109 struct comedi_subdevice *s;
109 unsigned long iobase; 110 unsigned long iobase;
@@ -121,9 +122,10 @@ static int pcmad_attach(struct comedi_device *dev, struct comedi_devconfig *it)
121 if (ret) 122 if (ret)
122 return ret; 123 return ret;
123 124
124 ret = alloc_private(dev, sizeof(struct pcmad_priv_struct)); 125 devpriv = kzalloc(sizeof(*devpriv), GFP_KERNEL);
125 if (ret < 0) 126 if (!devpriv)
126 return ret; 127 return -ENOMEM;
128 dev->private = devpriv;
127 129
128 dev->board_name = board->name; 130 dev->board_name = board->name;
129 131
diff --git a/drivers/staging/comedi/drivers/pcmda12.c b/drivers/staging/comedi/drivers/pcmda12.c
index 28af8f6873eb..0882dafaf57b 100644
--- a/drivers/staging/comedi/drivers/pcmda12.c
+++ b/drivers/staging/comedi/drivers/pcmda12.c
@@ -64,13 +64,6 @@ Configuration Options:
64#define MSB_PORT(chan) (LSB_PORT(chan)+1) 64#define MSB_PORT(chan) (LSB_PORT(chan)+1)
65#define BITS 12 65#define BITS 12
66 66
67/*
68 * Bords
69 */
70struct pcmda12_board {
71 const char *name;
72};
73
74/* note these have no effect and are merely here for reference.. 67/* note these have no effect and are merely here for reference..
75 these are configured by jumpering the board! */ 68 these are configured by jumpering the board! */
76static const struct comedi_lrange pcmda12_ranges = { 69static const struct comedi_lrange pcmda12_ranges = {
@@ -86,8 +79,6 @@ struct pcmda12_private {
86 int simultaneous_xfer_mode; 79 int simultaneous_xfer_mode;
87}; 80};
88 81
89#define devpriv ((struct pcmda12_private *)(dev->private))
90
91static void zero_chans(struct comedi_device *dev) 82static void zero_chans(struct comedi_device *dev)
92{ /* sets up an 83{ /* sets up an
93 ASIC chip to defaults */ 84 ASIC chip to defaults */
@@ -104,6 +95,7 @@ static void zero_chans(struct comedi_device *dev)
104static int ao_winsn(struct comedi_device *dev, struct comedi_subdevice *s, 95static int ao_winsn(struct comedi_device *dev, struct comedi_subdevice *s,
105 struct comedi_insn *insn, unsigned int *data) 96 struct comedi_insn *insn, unsigned int *data)
106{ 97{
98 struct pcmda12_private *devpriv = dev->private;
107 int i; 99 int i;
108 int chan = CR_CHAN(insn->chanspec); 100 int chan = CR_CHAN(insn->chanspec);
109 101
@@ -146,6 +138,7 @@ static int ao_winsn(struct comedi_device *dev, struct comedi_subdevice *s,
146static int ao_rinsn(struct comedi_device *dev, struct comedi_subdevice *s, 138static int ao_rinsn(struct comedi_device *dev, struct comedi_subdevice *s,
147 struct comedi_insn *insn, unsigned int *data) 139 struct comedi_insn *insn, unsigned int *data)
148{ 140{
141 struct pcmda12_private *devpriv = dev->private;
149 int i; 142 int i;
150 int chan = CR_CHAN(insn->chanspec); 143 int chan = CR_CHAN(insn->chanspec);
151 144
@@ -162,7 +155,7 @@ static int ao_rinsn(struct comedi_device *dev, struct comedi_subdevice *s,
162static int pcmda12_attach(struct comedi_device *dev, 155static int pcmda12_attach(struct comedi_device *dev,
163 struct comedi_devconfig *it) 156 struct comedi_devconfig *it)
164{ 157{
165 const struct pcmda12_board *board = comedi_board(dev); 158 struct pcmda12_private *devpriv;
166 struct comedi_subdevice *s; 159 struct comedi_subdevice *s;
167 unsigned long iobase; 160 unsigned long iobase;
168 int ret; 161 int ret;
@@ -178,16 +171,12 @@ static int pcmda12_attach(struct comedi_device *dev,
178 } 171 }
179 dev->iobase = iobase; 172 dev->iobase = iobase;
180 173
181 dev->board_name = board->name; 174 dev->board_name = dev->driver->driver_name;
182 175
183/* 176 devpriv = kzalloc(sizeof(*devpriv), GFP_KERNEL);
184 * Allocate the private structure area. alloc_private() is a 177 if (!devpriv)
185 * convenient macro defined in comedidev.h.
186 */
187 if (alloc_private(dev, sizeof(struct pcmda12_private)) < 0) {
188 printk(KERN_ERR "cannot allocate private data structure\n");
189 return -ENOMEM; 178 return -ENOMEM;
190 } 179 dev->private = devpriv;
191 180
192 devpriv->simultaneous_xfer_mode = it->options[1]; 181 devpriv->simultaneous_xfer_mode = it->options[1];
193 182
@@ -218,20 +207,11 @@ static void pcmda12_detach(struct comedi_device *dev)
218 release_region(dev->iobase, IOSIZE); 207 release_region(dev->iobase, IOSIZE);
219} 208}
220 209
221static const struct pcmda12_board pcmda12_boards[] = {
222 {
223 .name = "pcmda12",
224 },
225};
226
227static struct comedi_driver pcmda12_driver = { 210static struct comedi_driver pcmda12_driver = {
228 .driver_name = "pcmda12", 211 .driver_name = "pcmda12",
229 .module = THIS_MODULE, 212 .module = THIS_MODULE,
230 .attach = pcmda12_attach, 213 .attach = pcmda12_attach,
231 .detach = pcmda12_detach, 214 .detach = pcmda12_detach,
232 .board_name = &pcmda12_boards[0].name,
233 .offset = sizeof(struct pcmda12_board),
234 .num_names = ARRAY_SIZE(pcmda12_boards),
235}; 215};
236module_comedi_driver(pcmda12_driver); 216module_comedi_driver(pcmda12_driver);
237 217
diff --git a/drivers/staging/comedi/drivers/pcmmio.c b/drivers/staging/comedi/drivers/pcmmio.c
index a10bf0a2987f..7522bfb6db08 100644
--- a/drivers/staging/comedi/drivers/pcmmio.c
+++ b/drivers/staging/comedi/drivers/pcmmio.c
@@ -145,35 +145,6 @@ Configuration Options:
145#define PAGE_ENAB 2 145#define PAGE_ENAB 2
146#define PAGE_INT_ID 3 146#define PAGE_INT_ID 3
147 147
148/*
149 * Board descriptions for two imaginary boards. Describing the
150 * boards in this way is optional, and completely driver-dependent.
151 * Some drivers use arrays such as this, other do not.
152 */
153struct pcmmio_board {
154 const char *name;
155 const int dio_num_asics;
156 const int dio_num_ports;
157 const int total_iosize;
158 const int ai_bits;
159 const int ao_bits;
160 const int n_ai_chans;
161 const int n_ao_chans;
162 const struct comedi_lrange *ai_range_table, *ao_range_table;
163 int (*ai_rinsn) (struct comedi_device *dev,
164 struct comedi_subdevice *s,
165 struct comedi_insn *insn,
166 unsigned int *data);
167 int (*ao_rinsn) (struct comedi_device *dev,
168 struct comedi_subdevice *s,
169 struct comedi_insn *insn,
170 unsigned int *data);
171 int (*ao_winsn) (struct comedi_device *dev,
172 struct comedi_subdevice *s,
173 struct comedi_insn *insn,
174 unsigned int *data);
175};
176
177static const struct comedi_lrange ranges_ai = { 148static const struct comedi_lrange ranges_ai = {
178 4, {RANGE(-5., 5.), RANGE(-10., 10.), RANGE(0., 5.), RANGE(0., 10.)} 149 4, {RANGE(-5., 5.), RANGE(-10., 10.), RANGE(0., 5.), RANGE(0., 10.)}
179}; 150};
@@ -258,11 +229,6 @@ struct pcmmio_private {
258 struct pcmmio_subdev_private *sprivs; 229 struct pcmmio_subdev_private *sprivs;
259}; 230};
260 231
261/*
262 * most drivers define the following macro to make it easy to
263 * access the private structure.
264 */
265#define devpriv ((struct pcmmio_private *)dev->private)
266#define subpriv ((struct pcmmio_subdev_private *)s->private) 232#define subpriv ((struct pcmmio_subdev_private *)s->private)
267 233
268/* DIO devices are slightly special. Although it is possible to 234/* DIO devices are slightly special. Although it is possible to
@@ -416,9 +382,9 @@ static int pcmmio_dio_insn_config(struct comedi_device *dev,
416 382
417static void switch_page(struct comedi_device *dev, int asic, int page) 383static void switch_page(struct comedi_device *dev, int asic, int page)
418{ 384{
419 const struct pcmmio_board *board = comedi_board(dev); 385 struct pcmmio_private *devpriv = dev->private;
420 386
421 if (asic < 0 || asic >= board->dio_num_asics) 387 if (asic < 0 || asic >= 1)
422 return; /* paranoia */ 388 return; /* paranoia */
423 if (page < 0 || page >= NUM_PAGES) 389 if (page < 0 || page >= NUM_PAGES)
424 return; /* more paranoia */ 390 return; /* more paranoia */
@@ -434,10 +400,10 @@ static void switch_page(struct comedi_device *dev, int asic, int page)
434static void init_asics(struct comedi_device *dev) 400static void init_asics(struct comedi_device *dev)
435{ /* sets up an 401{ /* sets up an
436 ASIC chip to defaults */ 402 ASIC chip to defaults */
437 const struct pcmmio_board *board = comedi_board(dev); 403 struct pcmmio_private *devpriv = dev->private;
438 int asic; 404 int asic;
439 405
440 for (asic = 0; asic < board->dio_num_asics; ++asic) { 406 for (asic = 0; asic < 1; ++asic) {
441 int port, page; 407 int port, page;
442 unsigned long baseaddr = devpriv->asics[asic].iobase; 408 unsigned long baseaddr = devpriv->asics[asic].iobase;
443 409
@@ -472,9 +438,9 @@ static void init_asics(struct comedi_device *dev)
472#ifdef notused 438#ifdef notused
473static void lock_port(struct comedi_device *dev, int asic, int port) 439static void lock_port(struct comedi_device *dev, int asic, int port)
474{ 440{
475 const struct pcmmio_board *board = comedi_board(dev); 441 struct pcmmio_private *devpriv = dev->private;
476 442
477 if (asic < 0 || asic >= board->dio_num_asics) 443 if (asic < 0 || asic >= 1)
478 return; /* paranoia */ 444 return; /* paranoia */
479 if (port < 0 || port >= PORTS_PER_ASIC) 445 if (port < 0 || port >= PORTS_PER_ASIC)
480 return; /* more paranoia */ 446 return; /* more paranoia */
@@ -488,9 +454,9 @@ static void lock_port(struct comedi_device *dev, int asic, int port)
488 454
489static void unlock_port(struct comedi_device *dev, int asic, int port) 455static void unlock_port(struct comedi_device *dev, int asic, int port)
490{ 456{
491 const struct pcmmio_board *board = comedi_board(dev); 457 struct pcmmio_private *devpriv = dev->private;
492 458
493 if (asic < 0 || asic >= board->dio_num_asics) 459 if (asic < 0 || asic >= 1)
494 return; /* paranoia */ 460 return; /* paranoia */
495 if (port < 0 || port >= PORTS_PER_ASIC) 461 if (port < 0 || port >= PORTS_PER_ASIC)
496 return; /* more paranoia */ 462 return; /* more paranoia */
@@ -504,6 +470,7 @@ static void unlock_port(struct comedi_device *dev, int asic, int port)
504static void pcmmio_stop_intr(struct comedi_device *dev, 470static void pcmmio_stop_intr(struct comedi_device *dev,
505 struct comedi_subdevice *s) 471 struct comedi_subdevice *s)
506{ 472{
473 struct pcmmio_private *devpriv = dev->private;
507 int nports, firstport, asic, port; 474 int nports, firstport, asic, port;
508 475
509 asic = subpriv->dio.intr.asic; 476 asic = subpriv->dio.intr.asic;
@@ -526,6 +493,7 @@ static irqreturn_t interrupt_pcmmio(int irq, void *d)
526{ 493{
527 int asic, got1 = 0; 494 int asic, got1 = 0;
528 struct comedi_device *dev = (struct comedi_device *)d; 495 struct comedi_device *dev = (struct comedi_device *)d;
496 struct pcmmio_private *devpriv = dev->private;
529 int i; 497 int i;
530 498
531 for (asic = 0; asic < MAX_ASICS; ++asic) { 499 for (asic = 0; asic < MAX_ASICS; ++asic) {
@@ -685,6 +653,8 @@ static irqreturn_t interrupt_pcmmio(int irq, void *d)
685static int pcmmio_start_intr(struct comedi_device *dev, 653static int pcmmio_start_intr(struct comedi_device *dev,
686 struct comedi_subdevice *s) 654 struct comedi_subdevice *s)
687{ 655{
656 struct pcmmio_private *devpriv = dev->private;
657
688 if (!subpriv->dio.intr.continuous && subpriv->dio.intr.stop_count == 0) { 658 if (!subpriv->dio.intr.continuous && subpriv->dio.intr.stop_count == 0) {
689 /* An empty acquisition! */ 659 /* An empty acquisition! */
690 s->async->events |= COMEDI_CB_EOA; 660 s->async->events |= COMEDI_CB_EOA;
@@ -1012,7 +982,7 @@ static int ao_winsn(struct comedi_device *dev, struct comedi_subdevice *s,
1012 982
1013static int pcmmio_attach(struct comedi_device *dev, struct comedi_devconfig *it) 983static int pcmmio_attach(struct comedi_device *dev, struct comedi_devconfig *it)
1014{ 984{
1015 const struct pcmmio_board *board = comedi_board(dev); 985 struct pcmmio_private *devpriv;
1016 struct comedi_subdevice *s; 986 struct comedi_subdevice *s;
1017 int sdev_no, chans_left, n_dio_subdevs, n_subdevs, port, asic, 987 int sdev_no, chans_left, n_dio_subdevs, n_subdevs, port, asic,
1018 thisasic_chanct = 0; 988 thisasic_chanct = 0;
@@ -1020,32 +990,25 @@ static int pcmmio_attach(struct comedi_device *dev, struct comedi_devconfig *it)
1020 unsigned int irq[MAX_ASICS]; 990 unsigned int irq[MAX_ASICS];
1021 int ret; 991 int ret;
1022 992
993 dev->board_name = dev->driver->driver_name;
994
1023 iobase = it->options[0]; 995 iobase = it->options[0];
1024 irq[0] = it->options[1]; 996 irq[0] = it->options[1];
1025 997
1026 printk(KERN_INFO "comedi%d: %s: io: %lx attaching...\n", dev->minor, 998 printk(KERN_INFO "comedi%d: %s: io: %lx attaching...\n", dev->minor,
1027 dev->driver->driver_name, iobase); 999 dev->board_name, iobase);
1028 1000
1029 dev->iobase = iobase; 1001 dev->iobase = iobase;
1030 1002
1031 if (!iobase || !request_region(iobase, 1003 if (!iobase || !request_region(iobase, 32, dev->board_name)) {
1032 board->total_iosize,
1033 dev->driver->driver_name)) {
1034 printk(KERN_ERR "comedi%d: I/O port conflict\n", dev->minor); 1004 printk(KERN_ERR "comedi%d: I/O port conflict\n", dev->minor);
1035 return -EIO; 1005 return -EIO;
1036 } 1006 }
1037 1007
1038 dev->board_name = board->name; 1008 devpriv = kzalloc(sizeof(*devpriv), GFP_KERNEL);
1039 1009 if (!devpriv)
1040/*
1041 * Allocate the private structure area. alloc_private() is a
1042 * convenient macro defined in comedidev.h.
1043 */
1044 if (alloc_private(dev, sizeof(struct pcmmio_private)) < 0) {
1045 printk(KERN_ERR "comedi%d: cannot allocate private data structure\n",
1046 dev->minor);
1047 return -ENOMEM; 1010 return -ENOMEM;
1048 } 1011 dev->private = devpriv;
1049 1012
1050 for (asic = 0; asic < MAX_ASICS; ++asic) { 1013 for (asic = 0; asic < MAX_ASICS; ++asic) {
1051 devpriv->asics[asic].num = asic; 1014 devpriv->asics[asic].num = asic;
@@ -1059,7 +1022,7 @@ static int pcmmio_attach(struct comedi_device *dev, struct comedi_devconfig *it)
1059 spin_lock_init(&devpriv->asics[asic].spinlock); 1022 spin_lock_init(&devpriv->asics[asic].spinlock);
1060 } 1023 }
1061 1024
1062 chans_left = CHANS_PER_ASIC * board->dio_num_asics; 1025 chans_left = CHANS_PER_ASIC * 1;
1063 n_dio_subdevs = CALC_N_DIO_SUBDEVS(chans_left); 1026 n_dio_subdevs = CALC_N_DIO_SUBDEVS(chans_left);
1064 n_subdevs = n_dio_subdevs + 2; 1027 n_subdevs = n_dio_subdevs + 2;
1065 devpriv->sprivs = 1028 devpriv->sprivs =
@@ -1078,13 +1041,13 @@ static int pcmmio_attach(struct comedi_device *dev, struct comedi_devconfig *it)
1078 /* First, AI */ 1041 /* First, AI */
1079 s = &dev->subdevices[0]; 1042 s = &dev->subdevices[0];
1080 s->private = &devpriv->sprivs[0]; 1043 s->private = &devpriv->sprivs[0];
1081 s->maxdata = (1 << board->ai_bits) - 1; 1044 s->maxdata = 0xffff;
1082 s->range_table = board->ai_range_table; 1045 s->range_table = &ranges_ai;
1083 s->subdev_flags = SDF_READABLE | SDF_GROUND | SDF_DIFF; 1046 s->subdev_flags = SDF_READABLE | SDF_GROUND | SDF_DIFF;
1084 s->type = COMEDI_SUBD_AI; 1047 s->type = COMEDI_SUBD_AI;
1085 s->n_chan = board->n_ai_chans; 1048 s->n_chan = 16;
1086 s->len_chanlist = s->n_chan; 1049 s->len_chanlist = s->n_chan;
1087 s->insn_read = board->ai_rinsn; 1050 s->insn_read = ai_rinsn;
1088 subpriv->iobase = dev->iobase + 0; 1051 subpriv->iobase = dev->iobase + 0;
1089 /* initialize the resource enable register by clearing it */ 1052 /* initialize the resource enable register by clearing it */
1090 outb(0, subpriv->iobase + 3); 1053 outb(0, subpriv->iobase + 3);
@@ -1093,14 +1056,14 @@ static int pcmmio_attach(struct comedi_device *dev, struct comedi_devconfig *it)
1093 /* Next, AO */ 1056 /* Next, AO */
1094 s = &dev->subdevices[1]; 1057 s = &dev->subdevices[1];
1095 s->private = &devpriv->sprivs[1]; 1058 s->private = &devpriv->sprivs[1];
1096 s->maxdata = (1 << board->ao_bits) - 1; 1059 s->maxdata = 0xffff;
1097 s->range_table = board->ao_range_table; 1060 s->range_table = &ranges_ao;
1098 s->subdev_flags = SDF_READABLE; 1061 s->subdev_flags = SDF_READABLE;
1099 s->type = COMEDI_SUBD_AO; 1062 s->type = COMEDI_SUBD_AO;
1100 s->n_chan = board->n_ao_chans; 1063 s->n_chan = 8;
1101 s->len_chanlist = s->n_chan; 1064 s->len_chanlist = s->n_chan;
1102 s->insn_read = board->ao_rinsn; 1065 s->insn_read = ao_rinsn;
1103 s->insn_write = board->ao_winsn; 1066 s->insn_write = ao_winsn;
1104 subpriv->iobase = dev->iobase + 8; 1067 subpriv->iobase = dev->iobase + 8;
1105 /* initialize the resource enable register by clearing it */ 1068 /* initialize the resource enable register by clearing it */
1106 outb(0, subpriv->iobase + 3); 1069 outb(0, subpriv->iobase + 3);
@@ -1180,7 +1143,7 @@ static int pcmmio_attach(struct comedi_device *dev, struct comedi_devconfig *it)
1180 for (asic = 0; irq[0] && asic < MAX_ASICS; ++asic) { 1143 for (asic = 0; irq[0] && asic < MAX_ASICS; ++asic) {
1181 if (irq[asic] 1144 if (irq[asic]
1182 && request_irq(irq[asic], interrupt_pcmmio, 1145 && request_irq(irq[asic], interrupt_pcmmio,
1183 IRQF_SHARED, board->name, dev)) { 1146 IRQF_SHARED, dev->board_name, dev)) {
1184 int i; 1147 int i;
1185 /* unroll the allocated irqs.. */ 1148 /* unroll the allocated irqs.. */
1186 for (i = asic - 1; i >= 0; --i) { 1149 for (i = asic - 1; i >= 0; --i) {
@@ -1204,11 +1167,11 @@ static int pcmmio_attach(struct comedi_device *dev, struct comedi_devconfig *it)
1204 1167
1205static void pcmmio_detach(struct comedi_device *dev) 1168static void pcmmio_detach(struct comedi_device *dev)
1206{ 1169{
1207 const struct pcmmio_board *board = comedi_board(dev); 1170 struct pcmmio_private *devpriv = dev->private;
1208 int i; 1171 int i;
1209 1172
1210 if (dev->iobase) 1173 if (dev->iobase)
1211 release_region(dev->iobase, board->total_iosize); 1174 release_region(dev->iobase, 32);
1212 for (i = 0; i < MAX_ASICS; ++i) { 1175 for (i = 0; i < MAX_ASICS; ++i) {
1213 if (devpriv && devpriv->asics[i].irq) 1176 if (devpriv && devpriv->asics[i].irq)
1214 free_irq(devpriv->asics[i].irq, dev); 1177 free_irq(devpriv->asics[i].irq, dev);
@@ -1217,32 +1180,11 @@ static void pcmmio_detach(struct comedi_device *dev)
1217 kfree(devpriv->sprivs); 1180 kfree(devpriv->sprivs);
1218} 1181}
1219 1182
1220static const struct pcmmio_board pcmmio_boards[] = {
1221 {
1222 .name = "pcmmio",
1223 .dio_num_asics = 1,
1224 .dio_num_ports = 6,
1225 .total_iosize = 32,
1226 .ai_bits = 16,
1227 .ao_bits = 16,
1228 .n_ai_chans = 16,
1229 .n_ao_chans = 8,
1230 .ai_range_table = &ranges_ai,
1231 .ao_range_table = &ranges_ao,
1232 .ai_rinsn = ai_rinsn,
1233 .ao_rinsn = ao_rinsn,
1234 .ao_winsn = ao_winsn
1235 },
1236};
1237
1238static struct comedi_driver pcmmio_driver = { 1183static struct comedi_driver pcmmio_driver = {
1239 .driver_name = "pcmmio", 1184 .driver_name = "pcmmio",
1240 .module = THIS_MODULE, 1185 .module = THIS_MODULE,
1241 .attach = pcmmio_attach, 1186 .attach = pcmmio_attach,
1242 .detach = pcmmio_detach, 1187 .detach = pcmmio_detach,
1243 .board_name = &pcmmio_boards[0].name,
1244 .offset = sizeof(struct pcmmio_board),
1245 .num_names = ARRAY_SIZE(pcmmio_boards),
1246}; 1188};
1247module_comedi_driver(pcmmio_driver); 1189module_comedi_driver(pcmmio_driver);
1248 1190
diff --git a/drivers/staging/comedi/drivers/pcmuio.c b/drivers/staging/comedi/drivers/pcmuio.c
index 0e32119bc3f9..31ea20c2d39e 100644
--- a/drivers/staging/comedi/drivers/pcmuio.c
+++ b/drivers/staging/comedi/drivers/pcmuio.c
@@ -194,11 +194,6 @@ struct pcmuio_private {
194 struct pcmuio_subdev_private *sprivs; 194 struct pcmuio_subdev_private *sprivs;
195}; 195};
196 196
197/*
198 * most drivers define the following macro to make it easy to
199 * access the private structure.
200 */
201#define devpriv ((struct pcmuio_private *)dev->private)
202#define subpriv ((struct pcmuio_subdev_private *)s->private) 197#define subpriv ((struct pcmuio_subdev_private *)s->private)
203 198
204/* DIO devices are slightly special. Although it is possible to 199/* DIO devices are slightly special. Although it is possible to
@@ -348,6 +343,7 @@ static int pcmuio_dio_insn_config(struct comedi_device *dev,
348static void switch_page(struct comedi_device *dev, int asic, int page) 343static void switch_page(struct comedi_device *dev, int asic, int page)
349{ 344{
350 const struct pcmuio_board *board = comedi_board(dev); 345 const struct pcmuio_board *board = comedi_board(dev);
346 struct pcmuio_private *devpriv = dev->private;
351 347
352 if (asic < 0 || asic >= board->num_asics) 348 if (asic < 0 || asic >= board->num_asics)
353 return; /* paranoia */ 349 return; /* paranoia */
@@ -404,6 +400,7 @@ static void init_asics(struct comedi_device *dev)
404static void lock_port(struct comedi_device *dev, int asic, int port) 400static void lock_port(struct comedi_device *dev, int asic, int port)
405{ 401{
406 const struct pcmuio_board *board = comedi_board(dev); 402 const struct pcmuio_board *board = comedi_board(dev);
403 struct pcmuio_private *devpriv = dev->private;
407 404
408 if (asic < 0 || asic >= board->num_asics) 405 if (asic < 0 || asic >= board->num_asics)
409 return; /* paranoia */ 406 return; /* paranoia */
@@ -419,6 +416,7 @@ static void lock_port(struct comedi_device *dev, int asic, int port)
419static void unlock_port(struct comedi_device *dev, int asic, int port) 416static void unlock_port(struct comedi_device *dev, int asic, int port)
420{ 417{
421 const struct pcmuio_board *board = comedi_board(dev); 418 const struct pcmuio_board *board = comedi_board(dev);
419 struct pcmuio_private *devpriv = dev->private;
422 420
423 if (asic < 0 || asic >= board->num_asics) 421 if (asic < 0 || asic >= board->num_asics)
424 return; /* paranoia */ 422 return; /* paranoia */
@@ -435,6 +433,7 @@ static void pcmuio_stop_intr(struct comedi_device *dev,
435 struct comedi_subdevice *s) 433 struct comedi_subdevice *s)
436{ 434{
437 int nports, firstport, asic, port; 435 int nports, firstport, asic, port;
436 struct pcmuio_private *devpriv = dev->private;
438 437
439 asic = subpriv->intr.asic; 438 asic = subpriv->intr.asic;
440 if (asic < 0) 439 if (asic < 0)
@@ -456,6 +455,7 @@ static irqreturn_t interrupt_pcmuio(int irq, void *d)
456{ 455{
457 int asic, got1 = 0; 456 int asic, got1 = 0;
458 struct comedi_device *dev = (struct comedi_device *)d; 457 struct comedi_device *dev = (struct comedi_device *)d;
458 struct pcmuio_private *devpriv = dev->private;
459 int i; 459 int i;
460 460
461 for (asic = 0; asic < MAX_ASICS; ++asic) { 461 for (asic = 0; asic < MAX_ASICS; ++asic) {
@@ -607,6 +607,8 @@ static irqreturn_t interrupt_pcmuio(int irq, void *d)
607static int pcmuio_start_intr(struct comedi_device *dev, 607static int pcmuio_start_intr(struct comedi_device *dev,
608 struct comedi_subdevice *s) 608 struct comedi_subdevice *s)
609{ 609{
610 struct pcmuio_private *devpriv = dev->private;
611
610 if (!subpriv->intr.continuous && subpriv->intr.stop_count == 0) { 612 if (!subpriv->intr.continuous && subpriv->intr.stop_count == 0) {
611 /* An empty acquisition! */ 613 /* An empty acquisition! */
612 s->async->events |= COMEDI_CB_EOA; 614 s->async->events |= COMEDI_CB_EOA;
@@ -748,6 +750,7 @@ pcmuio_cmdtest(struct comedi_device *dev, struct comedi_subdevice *s,
748static int pcmuio_attach(struct comedi_device *dev, struct comedi_devconfig *it) 750static int pcmuio_attach(struct comedi_device *dev, struct comedi_devconfig *it)
749{ 751{
750 const struct pcmuio_board *board = comedi_board(dev); 752 const struct pcmuio_board *board = comedi_board(dev);
753 struct pcmuio_private *devpriv;
751 struct comedi_subdevice *s; 754 struct comedi_subdevice *s;
752 int sdev_no, chans_left, n_subdevs, port, asic, thisasic_chanct = 0; 755 int sdev_no, chans_left, n_subdevs, port, asic, thisasic_chanct = 0;
753 unsigned long iobase; 756 unsigned long iobase;
@@ -772,15 +775,10 @@ static int pcmuio_attach(struct comedi_device *dev, struct comedi_devconfig *it)
772 775
773 dev->board_name = board->name; 776 dev->board_name = board->name;
774 777
775/* 778 devpriv = kzalloc(sizeof(*devpriv), GFP_KERNEL);
776 * Allocate the private structure area. alloc_private() is a 779 if (!devpriv)
777 * convenient macro defined in comedidev.h.
778 */
779 if (alloc_private(dev, sizeof(struct pcmuio_private)) < 0) {
780 dev_warn(dev->class_dev,
781 "cannot allocate private data structure\n");
782 return -ENOMEM; 780 return -ENOMEM;
783 } 781 dev->private = devpriv;
784 782
785 for (asic = 0; asic < MAX_ASICS; ++asic) { 783 for (asic = 0; asic < MAX_ASICS; ++asic) {
786 devpriv->asics[asic].num = asic; 784 devpriv->asics[asic].num = asic;
@@ -905,6 +903,7 @@ static int pcmuio_attach(struct comedi_device *dev, struct comedi_devconfig *it)
905static void pcmuio_detach(struct comedi_device *dev) 903static void pcmuio_detach(struct comedi_device *dev)
906{ 904{
907 const struct pcmuio_board *board = comedi_board(dev); 905 const struct pcmuio_board *board = comedi_board(dev);
906 struct pcmuio_private *devpriv = dev->private;
908 int i; 907 int i;
909 908
910 if (dev->iobase) 909 if (dev->iobase)
diff --git a/drivers/staging/comedi/drivers/poc.c b/drivers/staging/comedi/drivers/poc.c
index 78dfe167b147..d7842c95d982 100644
--- a/drivers/staging/comedi/drivers/poc.c
+++ b/drivers/staging/comedi/drivers/poc.c
@@ -57,13 +57,18 @@ struct boarddef_struct {
57 const struct comedi_lrange *range; 57 const struct comedi_lrange *range;
58}; 58};
59 59
60struct poc_private {
61 unsigned int ao_readback[32];
62};
63
60static int readback_insn(struct comedi_device *dev, struct comedi_subdevice *s, 64static int readback_insn(struct comedi_device *dev, struct comedi_subdevice *s,
61 struct comedi_insn *insn, unsigned int *data) 65 struct comedi_insn *insn, unsigned int *data)
62{ 66{
67 struct poc_private *devpriv = dev->private;
63 int chan; 68 int chan;
64 69
65 chan = CR_CHAN(insn->chanspec); 70 chan = CR_CHAN(insn->chanspec);
66 data[0] = ((unsigned int *)dev->private)[chan]; 71 data[0] = devpriv->ao_readback[chan];
67 72
68 return 1; 73 return 1;
69} 74}
@@ -75,12 +80,13 @@ static int readback_insn(struct comedi_device *dev, struct comedi_subdevice *s,
75static int dac02_ao_winsn(struct comedi_device *dev, struct comedi_subdevice *s, 80static int dac02_ao_winsn(struct comedi_device *dev, struct comedi_subdevice *s,
76 struct comedi_insn *insn, unsigned int *data) 81 struct comedi_insn *insn, unsigned int *data)
77{ 82{
83 struct poc_private *devpriv = dev->private;
78 int temp; 84 int temp;
79 int chan; 85 int chan;
80 int output; 86 int output;
81 87
82 chan = CR_CHAN(insn->chanspec); 88 chan = CR_CHAN(insn->chanspec);
83 ((unsigned int *)dev->private)[chan] = data[0]; 89 devpriv->ao_readback[chan] = data[0];
84 output = data[0]; 90 output = data[0];
85#ifdef wrong 91#ifdef wrong
86 /* convert to complementary binary if range is bipolar */ 92 /* convert to complementary binary if range is bipolar */
@@ -131,6 +137,7 @@ static int pcl734_insn_bits(struct comedi_device *dev,
131static int poc_attach(struct comedi_device *dev, struct comedi_devconfig *it) 137static int poc_attach(struct comedi_device *dev, struct comedi_devconfig *it)
132{ 138{
133 const struct boarddef_struct *board = comedi_board(dev); 139 const struct boarddef_struct *board = comedi_board(dev);
140 struct poc_private *devpriv;
134 struct comedi_subdevice *s; 141 struct comedi_subdevice *s;
135 unsigned long iobase; 142 unsigned long iobase;
136 unsigned int iosize; 143 unsigned int iosize;
@@ -160,8 +167,10 @@ static int poc_attach(struct comedi_device *dev, struct comedi_devconfig *it)
160 if (ret) 167 if (ret)
161 return ret; 168 return ret;
162 169
163 if (alloc_private(dev, sizeof(unsigned int) * board->n_chan) < 0) 170 devpriv = kzalloc(sizeof(*devpriv), GFP_KERNEL);
171 if (!devpriv)
164 return -ENOMEM; 172 return -ENOMEM;
173 dev->private = devpriv;
165 174
166 /* analog output subdevice */ 175 /* analog output subdevice */
167 s = &dev->subdevices[0]; 176 s = &dev->subdevices[0];
diff --git a/drivers/staging/comedi/drivers/quatech_daqp_cs.c b/drivers/staging/comedi/drivers/quatech_daqp_cs.c
index 3e276f7a3380..ef0cdaa7f02e 100644
--- a/drivers/staging/comedi/drivers/quatech_daqp_cs.c
+++ b/drivers/staging/comedi/drivers/quatech_daqp_cs.c
@@ -47,6 +47,8 @@ Status: works
47Devices: [Quatech] DAQP-208 (daqp), DAQP-308 47Devices: [Quatech] DAQP-208 (daqp), DAQP-308
48*/ 48*/
49 49
50#define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
51
50#include "../comedidev.h" 52#include "../comedidev.h"
51#include <linux/semaphore.h> 53#include <linux/semaphore.h>
52 54
@@ -195,8 +197,8 @@ static struct comedi_driver driver_daqp = {
195 197
196static void daqp_dump(struct comedi_device *dev) 198static void daqp_dump(struct comedi_device *dev)
197{ 199{
198 printk(KERN_INFO "DAQP: status %02x; aux status %02x\n", 200 dev_info(dev->class_dev, "status %02x; aux status %02x\n",
199 inb(dev->iobase + DAQP_STATUS), inb(dev->iobase + DAQP_AUX)); 201 inb(dev->iobase + DAQP_STATUS), inb(dev->iobase + DAQP_AUX));
200} 202}
201 203
202static void hex_dump(char *str, void *ptr, int len) 204static void hex_dump(char *str, void *ptr, int len)
@@ -255,33 +257,29 @@ static enum irqreturn daqp_interrupt(int irq, void *dev_id)
255 int status; 257 int status;
256 258
257 if (local == NULL) { 259 if (local == NULL) {
258 printk(KERN_WARNING 260 pr_warn("irq %d for unknown device.\n", irq);
259 "daqp_interrupt(): irq %d for unknown device.\n", irq);
260 return IRQ_NONE; 261 return IRQ_NONE;
261 } 262 }
262 263
263 dev = local->dev; 264 dev = local->dev;
264 if (dev == NULL) { 265 if (dev == NULL) {
265 printk(KERN_WARNING "daqp_interrupt(): NULL comedi_device.\n"); 266 pr_warn("NULL comedi_device.\n");
266 return IRQ_NONE; 267 return IRQ_NONE;
267 } 268 }
268 269
269 if (!dev->attached) { 270 if (!dev->attached) {
270 printk(KERN_WARNING 271 pr_warn("struct comedi_device not yet attached.\n");
271 "daqp_interrupt(): struct comedi_device not yet attached.\n");
272 return IRQ_NONE; 272 return IRQ_NONE;
273 } 273 }
274 274
275 s = local->s; 275 s = local->s;
276 if (s == NULL) { 276 if (s == NULL) {
277 printk(KERN_WARNING 277 pr_warn("NULL comedi_subdevice.\n");
278 "daqp_interrupt(): NULL comedi_subdevice.\n");
279 return IRQ_NONE; 278 return IRQ_NONE;
280 } 279 }
281 280
282 if ((struct local_info_t *)s->private != local) { 281 if ((struct local_info_t *)s->private != local) {
283 printk(KERN_WARNING 282 pr_warn("invalid comedi_subdevice.\n");
284 "daqp_interrupt(): invalid comedi_subdevice.\n");
285 return IRQ_NONE; 283 return IRQ_NONE;
286 } 284 }
287 285
@@ -302,7 +300,7 @@ static enum irqreturn daqp_interrupt(int irq, void *dev_id)
302 if (status & DAQP_STATUS_DATA_LOST) { 300 if (status & DAQP_STATUS_DATA_LOST) {
303 s->async->events |= 301 s->async->events |=
304 COMEDI_CB_EOA | COMEDI_CB_OVERFLOW; 302 COMEDI_CB_EOA | COMEDI_CB_OVERFLOW;
305 printk("daqp: data lost\n"); 303 dev_warn(dev->class_dev, "data lost\n");
306 daqp_ai_cancel(dev, s); 304 daqp_ai_cancel(dev, s);
307 break; 305 break;
308 } 306 }
@@ -331,8 +329,8 @@ static enum irqreturn daqp_interrupt(int irq, void *dev_id)
331 } 329 }
332 330
333 if (loop_limit <= 0) { 331 if (loop_limit <= 0) {
334 printk(KERN_WARNING 332 dev_warn(dev->class_dev,
335 "loop_limit reached in daqp_interrupt()\n"); 333 "loop_limit reached in daqp_interrupt()\n");
336 daqp_ai_cancel(dev, s); 334 daqp_ai_cancel(dev, s);
337 s->async->events |= COMEDI_CB_EOA | COMEDI_CB_ERROR; 335 s->async->events |= COMEDI_CB_EOA | COMEDI_CB_ERROR;
338 } 336 }
@@ -397,9 +395,11 @@ static int daqp_ai_insn_read(struct comedi_device *dev,
397 */ 395 */
398 396
399 while (--counter 397 while (--counter
400 && (inb(dev->iobase + DAQP_STATUS) & DAQP_STATUS_EVENTS)) ; 398 && (inb(dev->iobase + DAQP_STATUS) & DAQP_STATUS_EVENTS))
399 ;
401 if (!counter) { 400 if (!counter) {
402 printk("daqp: couldn't clear interrupts in status register\n"); 401 dev_err(dev->class_dev,
402 "couldn't clear interrupts in status register\n");
403 return -1; 403 return -1;
404 } 404 }
405 405
@@ -482,19 +482,15 @@ static int daqp_ai_cmdtest(struct comedi_device *dev,
482 if (err) 482 if (err)
483 return 2; 483 return 2;
484 484
485 /* step 3: make sure arguments are trivially compatible */ 485 /* Step 3: check if arguments are trivially valid */
486
487 err |= cfc_check_trigger_arg_is(&cmd->start_arg, 0);
486 488
487 if (cmd->start_arg != 0) {
488 cmd->start_arg = 0;
489 err++;
490 }
491#define MAX_SPEED 10000 /* 100 kHz - in nanoseconds */ 489#define MAX_SPEED 10000 /* 100 kHz - in nanoseconds */
492 490
493 if (cmd->scan_begin_src == TRIG_TIMER 491 if (cmd->scan_begin_src == TRIG_TIMER)
494 && cmd->scan_begin_arg < MAX_SPEED) { 492 err |= cfc_check_trigger_arg_min(&cmd->scan_begin_arg,
495 cmd->scan_begin_arg = MAX_SPEED; 493 MAX_SPEED);
496 err++;
497 }
498 494
499 /* If both scan_begin and convert are both timer values, the only 495 /* If both scan_begin and convert are both timer values, the only
500 * way that can make sense is if the scan time is the number of 496 * way that can make sense is if the scan time is the number of
@@ -503,30 +499,18 @@ static int daqp_ai_cmdtest(struct comedi_device *dev,
503 499
504 if (cmd->scan_begin_src == TRIG_TIMER && cmd->convert_src == TRIG_TIMER 500 if (cmd->scan_begin_src == TRIG_TIMER && cmd->convert_src == TRIG_TIMER
505 && cmd->scan_begin_arg != cmd->convert_arg * cmd->scan_end_arg) { 501 && cmd->scan_begin_arg != cmd->convert_arg * cmd->scan_end_arg) {
506 err++; 502 err |= -EINVAL;
507 } 503 }
508 504
509 if (cmd->convert_src == TRIG_TIMER && cmd->convert_arg < MAX_SPEED) { 505 if (cmd->convert_src == TRIG_TIMER)
510 cmd->convert_arg = MAX_SPEED; 506 err |= cfc_check_trigger_arg_min(&cmd->convert_arg, MAX_SPEED);
511 err++;
512 }
513 507
514 if (cmd->scan_end_arg != cmd->chanlist_len) { 508 err |= cfc_check_trigger_arg_is(&cmd->scan_end_arg, cmd->chanlist_len);
515 cmd->scan_end_arg = cmd->chanlist_len; 509
516 err++; 510 if (cmd->stop_src == TRIG_COUNT)
517 } 511 err |= cfc_check_trigger_arg_max(&cmd->stop_arg, 0x00ffffff);
518 if (cmd->stop_src == TRIG_COUNT) { 512 else /* TRIG_NONE */
519 if (cmd->stop_arg > 0x00ffffff) { 513 err |= cfc_check_trigger_arg_is(&cmd->stop_arg, 0);
520 cmd->stop_arg = 0x00ffffff;
521 err++;
522 }
523 } else {
524 /* TRIG_NONE */
525 if (cmd->stop_arg != 0) {
526 cmd->stop_arg = 0;
527 err++;
528 }
529 }
530 514
531 if (err) 515 if (err)
532 return 3; 516 return 3;
@@ -734,10 +718,11 @@ static int daqp_ai_cmd(struct comedi_device *dev, struct comedi_subdevice *s)
734 */ 718 */
735 counter = 100; 719 counter = 100;
736 while (--counter 720 while (--counter
737 && (inb(dev->iobase + DAQP_STATUS) & DAQP_STATUS_EVENTS)) ; 721 && (inb(dev->iobase + DAQP_STATUS) & DAQP_STATUS_EVENTS))
722 ;
738 if (!counter) { 723 if (!counter) {
739 printk(KERN_ERR 724 dev_err(dev->class_dev,
740 "daqp: couldn't clear interrupts in status register\n"); 725 "couldn't clear interrupts in status register\n");
741 return -1; 726 return -1;
742 } 727 }
743 728
@@ -824,8 +809,8 @@ static int daqp_attach(struct comedi_device *dev, struct comedi_devconfig *it)
824 struct comedi_subdevice *s; 809 struct comedi_subdevice *s;
825 810
826 if (it->options[0] < 0 || it->options[0] >= MAX_DEV || !local) { 811 if (it->options[0] < 0 || it->options[0] >= MAX_DEV || !local) {
827 printk("comedi%d: No such daqp device %d\n", 812 dev_err(dev->class_dev, "No such daqp device %d\n",
828 dev->minor, it->options[0]); 813 it->options[0]);
829 return -EIO; 814 return -EIO;
830 } 815 }
831 816
@@ -852,8 +837,8 @@ static int daqp_attach(struct comedi_device *dev, struct comedi_devconfig *it)
852 if (ret) 837 if (ret)
853 return ret; 838 return ret;
854 839
855 printk(KERN_INFO "comedi%d: attaching daqp%d (io 0x%04lx)\n", 840 dev_info(dev->class_dev, "attaching daqp%d (io 0x%04lx)\n",
856 dev->minor, it->options[0], dev->iobase); 841 it->options[0], dev->iobase);
857 842
858 s = &dev->subdevices[0]; 843 s = &dev->subdevices[0];
859 dev->read_subdev = s; 844 dev->read_subdev = s;
@@ -958,7 +943,7 @@ static int daqp_cs_attach(struct pcmcia_device *link)
958 if (dev_table[i] == NULL) 943 if (dev_table[i] == NULL)
959 break; 944 break;
960 if (i == MAX_DEV) { 945 if (i == MAX_DEV) {
961 printk(KERN_NOTICE "daqp_cs: no devices available\n"); 946 dev_notice(&link->dev, "no devices available\n");
962 return -ENODEV; 947 return -ENODEV;
963 } 948 }
964 949
diff --git a/drivers/staging/comedi/drivers/rtd520.c b/drivers/staging/comedi/drivers/rtd520.c
index 41d24b08913b..8d7c948a919c 100644
--- a/drivers/staging/comedi/drivers/rtd520.c
+++ b/drivers/staging/comedi/drivers/rtd520.c
@@ -107,14 +107,12 @@ Configuration options:
107#include "../comedidev.h" 107#include "../comedidev.h"
108 108
109#include "comedi_fc.h" 109#include "comedi_fc.h"
110 110#include "rtd520.h"
111#define DRV_NAME "rtd520" 111#include "plx9080.h"
112 112
113/*====================================================================== 113/*======================================================================
114 Driver specific stuff (tunable) 114 Driver specific stuff (tunable)
115======================================================================*/ 115======================================================================*/
116/* Enable this to test the new DMA support. You may get hard lock ups */
117/*#define USE_DMA*/
118 116
119/* We really only need 2 buffers. More than that means being much 117/* We really only need 2 buffers. More than that means being much
120 smarter about knowing which ones are full. */ 118 smarter about knowing which ones are full. */
@@ -147,20 +145,6 @@ Configuration options:
147 Board specific stuff 145 Board specific stuff
148======================================================================*/ 146======================================================================*/
149 147
150/* registers */
151#define PCI_VENDOR_ID_RTD 0x1435
152/*
153 The board has three memory windows: las0, las1, and lcfg (the PCI chip)
154 Las1 has the data and can be burst DMAed 32bits at a time.
155*/
156#define LCFG_PCIINDEX 0
157/* PCI region 1 is a 256 byte IO space mapping. Use??? */
158#define LAS0_PCIINDEX 2 /* PCI memory resources */
159#define LAS1_PCIINDEX 3
160#define LCFG_PCISIZE 0x100
161#define LAS0_PCISIZE 0x200
162#define LAS1_PCISIZE 0x10
163
164#define RTD_CLOCK_RATE 8000000 /* 8Mhz onboard clock */ 148#define RTD_CLOCK_RATE 8000000 /* 8Mhz onboard clock */
165#define RTD_CLOCK_BASE 125 /* clock period in ns */ 149#define RTD_CLOCK_BASE 125 /* clock period in ns */
166 150
@@ -173,9 +157,6 @@ Configuration options:
173/* min speed when only 1 channel (no burst counter) */ 157/* min speed when only 1 channel (no burst counter) */
174#define RTD_MIN_SPEED_1 5000000 /* 200Hz, in nanoseconds */ 158#define RTD_MIN_SPEED_1 5000000 /* 200Hz, in nanoseconds */
175 159
176#include "rtd520.h"
177#include "plx9080.h"
178
179/* Setup continuous ring of 1/2 FIFO transfers. See RTD manual p91 */ 160/* Setup continuous ring of 1/2 FIFO transfers. See RTD manual p91 */
180#define DMA_MODE_BITS (\ 161#define DMA_MODE_BITS (\
181 PLX_LOCAL_BUS_16_WIDE_BITS \ 162 PLX_LOCAL_BUS_16_WIDE_BITS \
@@ -270,30 +251,24 @@ static const struct comedi_lrange rtd_ao_range = {
270struct rtdBoard { 251struct rtdBoard {
271 const char *name; 252 const char *name;
272 int device_id; 253 int device_id;
273 int aiChans;
274 int aiBits;
275 int aiMaxGain;
276 int range10Start; /* start of +-10V range */ 254 int range10Start; /* start of +-10V range */
277 int rangeUniStart; /* start of +10V range */ 255 int rangeUniStart; /* start of +10V range */
256 const struct comedi_lrange *ai_range;
278}; 257};
279 258
280static const struct rtdBoard rtd520Boards[] = { 259static const struct rtdBoard rtd520Boards[] = {
281 { 260 {
282 .name = "DM7520", 261 .name = "DM7520",
283 .device_id = 0x7520, 262 .device_id = 0x7520,
284 .aiChans = 16,
285 .aiBits = 12,
286 .aiMaxGain = 32,
287 .range10Start = 6, 263 .range10Start = 6,
288 .rangeUniStart = 12, 264 .rangeUniStart = 12,
265 .ai_range = &rtd_ai_7520_range,
289 }, { 266 }, {
290 .name = "PCI4520", 267 .name = "PCI4520",
291 .device_id = 0x4520, 268 .device_id = 0x4520,
292 .aiChans = 16,
293 .aiBits = 12,
294 .aiMaxGain = 128,
295 .range10Start = 8, 269 .range10Start = 8,
296 .rangeUniStart = 16, 270 .rangeUniStart = 16,
271 .ai_range = &rtd_ai_4520_range,
297 }, 272 },
298}; 273};
299 274
@@ -307,7 +282,6 @@ struct rtdPrivate {
307 void __iomem *las1; 282 void __iomem *las1;
308 void __iomem *lcfg; 283 void __iomem *lcfg;
309 284
310 unsigned long intCount; /* interrupt count */
311 long aiCount; /* total transfer size (samples) */ 285 long aiCount; /* total transfer size (samples) */
312 int transCount; /* # to transfer data. 0->1/2FIFO */ 286 int transCount; /* # to transfer data. 0->1/2FIFO */
313 int flags; /* flag event modes */ 287 int flags; /* flag event modes */
@@ -328,21 +302,6 @@ struct rtdPrivate {
328 u16 intClearMask; /* interrupt clear mask */ 302 u16 intClearMask; /* interrupt clear mask */
329 u8 utcCtrl[4]; /* crtl mode for 3 utc + read back */ 303 u8 utcCtrl[4]; /* crtl mode for 3 utc + read back */
330 u8 dioStatus; /* could be read back (dio0Ctrl) */ 304 u8 dioStatus; /* could be read back (dio0Ctrl) */
331#ifdef USE_DMA
332 /*
333 * Always DMA 1/2 FIFO. Buffer (dmaBuff?) is (at least) twice that
334 * size. After transferring, interrupt processes 1/2 FIFO and
335 * passes to comedi
336 */
337 s16 dma0Offset; /* current processing offset (0, 1/2) */
338 uint16_t *dma0Buff[DMA_CHAIN_COUNT]; /* DMA buffers (for ADC) */
339 dma_addr_t dma0BuffPhysAddr[DMA_CHAIN_COUNT]; /* physical addresses */
340 struct plx_dma_desc *dma0Chain; /* DMA descriptor ring for dmaBuff */
341 dma_addr_t dma0ChainPhysAddr; /* physical addresses */
342 /* shadow registers */
343 u8 dma0Control;
344 u8 dma1Control;
345#endif /* USE_DMA */
346 unsigned fifoLen; 305 unsigned fifoLen;
347}; 306};
348 307
@@ -365,9 +324,9 @@ struct rtdPrivate {
365 Sets the original period to be the true value. 324 Sets the original period to be the true value.
366 Note: you have to check if the value is larger than the counter range! 325 Note: you have to check if the value is larger than the counter range!
367*/ 326*/
368static int rtd_ns_to_timer_base(unsigned int *nanosec, /* desired period (in ns) */ 327static int rtd_ns_to_timer_base(unsigned int *nanosec,
369 int round_mode, int base) 328 int round_mode, int base)
370{ /* clock period (in ns) */ 329{
371 int divider; 330 int divider;
372 331
373 switch (round_mode) { 332 switch (round_mode) {
@@ -420,18 +379,19 @@ static unsigned short rtdConvertChanGain(struct comedi_device *dev,
420 r |= chan & 0xf; 379 r |= chan & 0xf;
421 380
422 /* Note: we also setup the channel list bipolar flag array */ 381 /* Note: we also setup the channel list bipolar flag array */
423 if (range < thisboard->range10Start) { /* first batch are +-5 */ 382 if (range < thisboard->range10Start) {
424 r |= 0x000; /* +-5 range */ 383 /* +-5 range */
425 r |= (range & 0x7) << 4; /* gain */ 384 r |= 0x000;
385 r |= (range & 0x7) << 4;
426 CHAN_ARRAY_SET(devpriv->chanBipolar, chanIndex); 386 CHAN_ARRAY_SET(devpriv->chanBipolar, chanIndex);
427 } else if (range < thisboard->rangeUniStart) { /* second batch are +-10 */ 387 } else if (range < thisboard->rangeUniStart) {
428 r |= 0x100; /* +-10 range */ 388 /* +-10 range */
429 /* gain */ 389 r |= 0x100;
430 r |= ((range - thisboard->range10Start) & 0x7) << 4; 390 r |= ((range - thisboard->range10Start) & 0x7) << 4;
431 CHAN_ARRAY_SET(devpriv->chanBipolar, chanIndex); 391 CHAN_ARRAY_SET(devpriv->chanBipolar, chanIndex);
432 } else { /* last batch is +10 */ 392 } else {
433 r |= 0x200; /* +10 range */ 393 /* +10 range */
434 /* gain */ 394 r |= 0x200;
435 r |= ((range - thisboard->rangeUniStart) & 0x7) << 4; 395 r |= ((range - thisboard->rangeUniStart) & 0x7) << 4;
436 CHAN_ARRAY_CLEAR(devpriv->chanBipolar, chanIndex); 396 CHAN_ARRAY_CLEAR(devpriv->chanBipolar, chanIndex);
437 } 397 }
@@ -507,15 +467,14 @@ static int rtd520_probe_fifo_depth(struct comedi_device *dev)
507 } 467 }
508 } 468 }
509 if (i == limit) { 469 if (i == limit) {
510 printk(KERN_INFO "\ncomedi: %s: failed to probe fifo size.\n", 470 dev_info(dev->class_dev, "failed to probe fifo size.\n");
511 DRV_NAME);
512 return -EIO; 471 return -EIO;
513 } 472 }
514 writel(0, devpriv->las0 + LAS0_ADC_FIFO_CLEAR); 473 writel(0, devpriv->las0 + LAS0_ADC_FIFO_CLEAR);
515 if (fifo_size != 0x400 && fifo_size != 0x2000) { 474 if (fifo_size != 0x400 && fifo_size != 0x2000) {
516 printk 475 dev_info(dev->class_dev,
517 (KERN_INFO "\ncomedi: %s: unexpected fifo size of %i, expected 1024 or 8192.\n", 476 "unexpected fifo size of %i, expected 1024 or 8192.\n",
518 DRV_NAME, fifo_size); 477 fifo_size);
519 return -EIO; 478 return -EIO;
520 } 479 }
521 return fifo_size; 480 return fifo_size;
@@ -558,12 +517,8 @@ static int rtd_ai_rinsn(struct comedi_device *dev,
558 break; 517 break;
559 WAIT_QUIETLY; 518 WAIT_QUIETLY;
560 } 519 }
561 if (ii >= RTD_ADC_TIMEOUT) { 520 if (ii >= RTD_ADC_TIMEOUT)
562 DPRINTK
563 ("rtd520: Error: ADC never finished! FifoStatus=0x%x\n",
564 stat ^ 0x6666);
565 return -ETIMEDOUT; 521 return -ETIMEDOUT;
566 }
567 522
568 /* read data */ 523 /* read data */
569 d = readw(devpriv->las1 + LAS1_ADC_FIFO); 524 d = readw(devpriv->las1 + LAS1_ADC_FIFO);
@@ -600,15 +555,8 @@ static int ai_read_n(struct comedi_device *dev, struct comedi_subdevice *s,
600 d = readw(devpriv->las1 + LAS1_ADC_FIFO); 555 d = readw(devpriv->las1 + LAS1_ADC_FIFO);
601 continue; 556 continue;
602 } 557 }
603#if 0
604 if (!(readl(devpriv->las0 + LAS0_ADC) & FS_ADC_NOT_EMPTY)) {
605 DPRINTK("comedi: READ OOPS on %d of %d\n", ii + 1,
606 count);
607 break;
608 }
609#endif
610 d = readw(devpriv->las1 + LAS1_ADC_FIFO);
611 558
559 d = readw(devpriv->las1 + LAS1_ADC_FIFO);
612 d = d >> 3; /* low 3 bits are marker lines */ 560 d = d >> 3; /* low 3 bits are marker lines */
613 if (CHAN_ARRAY_TEST(devpriv->chanBipolar, s->async->cur_chan)) { 561 if (CHAN_ARRAY_TEST(devpriv->chanBipolar, s->async->cur_chan)) {
614 /* convert to comedi unsigned data */ 562 /* convert to comedi unsigned data */
@@ -656,125 +604,6 @@ static int ai_read_dregs(struct comedi_device *dev, struct comedi_subdevice *s)
656 return 0; 604 return 0;
657} 605}
658 606
659#ifdef USE_DMA
660/*
661 Terminate a DMA transfer and wait for everything to quiet down
662*/
663void abort_dma(struct comedi_device *dev, unsigned int channel)
664{ /* DMA channel 0, 1 */
665 struct rtdPrivate *devpriv = dev->private;
666 unsigned long dma_cs_addr; /* the control/status register */
667 uint8_t status;
668 unsigned int ii;
669 /* unsigned long flags; */
670
671 dma_cs_addr = (unsigned long)devpriv->lcfg
672 + ((channel == 0) ? LCFG_DMACSR0 : LCFG_DMACSR1);
673
674 /* spinlock for plx dma control/status reg */
675 /* spin_lock_irqsave( &dev->spinlock, flags ); */
676
677 /* abort dma transfer if necessary */
678 status = readb(dma_cs_addr);
679 if ((status & PLX_DMA_EN_BIT) == 0) { /* not enabled (Error?) */
680 DPRINTK("rtd520: AbortDma on non-active channel %d (0x%x)\n",
681 channel, status);
682 goto abortDmaExit;
683 }
684
685 /* wait to make sure done bit is zero (needed?) */
686 for (ii = 0; (status & PLX_DMA_DONE_BIT) && ii < RTD_DMA_TIMEOUT; ii++) {
687 WAIT_QUIETLY;
688 status = readb(dma_cs_addr);
689 }
690 if (status & PLX_DMA_DONE_BIT) {
691 printk("rtd520: Timeout waiting for dma %i done clear\n",
692 channel);
693 goto abortDmaExit;
694 }
695
696 /* disable channel (required) */
697 writeb(0, dma_cs_addr);
698 udelay(1); /* needed?? */
699 /* set abort bit for channel */
700 writeb(PLX_DMA_ABORT_BIT, dma_cs_addr);
701
702 /* wait for dma done bit to be set */
703 status = readb(dma_cs_addr);
704 for (ii = 0;
705 (status & PLX_DMA_DONE_BIT) == 0 && ii < RTD_DMA_TIMEOUT; ii++) {
706 status = readb(dma_cs_addr);
707 WAIT_QUIETLY;
708 }
709 if ((status & PLX_DMA_DONE_BIT) == 0) {
710 printk("rtd520: Timeout waiting for dma %i done set\n",
711 channel);
712 }
713
714abortDmaExit:
715 /* spin_unlock_irqrestore( &dev->spinlock, flags ); */
716}
717
718/*
719 Process what is in the DMA transfer buffer and pass to comedi
720 Note: this is not re-entrant
721*/
722static int ai_process_dma(struct comedi_device *dev, struct comedi_subdevice *s)
723{
724 struct rtdPrivate *devpriv = dev->private;
725 int ii, n;
726 s16 *dp;
727
728 if (devpriv->aiCount == 0) /* transfer already complete */
729 return 0;
730
731 dp = devpriv->dma0Buff[devpriv->dma0Offset];
732 for (ii = 0; ii < devpriv->fifoLen / 2;) { /* convert samples */
733 short sample;
734
735 if (CHAN_ARRAY_TEST(devpriv->chanBipolar, s->async->cur_chan)) {
736 sample = (*dp >> 3) + 2048; /* convert to comedi unsigned data */
737 else
738 sample = *dp >> 3; /* low 3 bits are marker lines */
739
740 *dp++ = sample; /* put processed value back */
741
742 if (++s->async->cur_chan >= s->async->cmd.chanlist_len)
743 s->async->cur_chan = 0;
744
745 ++ii; /* number ready to transfer */
746 if (devpriv->aiCount > 0) { /* < 0, means read forever */
747 if (--devpriv->aiCount == 0) { /* done */
748 /*DPRINTK ("rtd520: Final %d samples\n", ii); */
749 break;
750 }
751 }
752 }
753
754 /* now pass the whole array to the comedi buffer */
755 dp = devpriv->dma0Buff[devpriv->dma0Offset];
756 n = comedi_buf_write_alloc(s->async, ii * sizeof(s16));
757 if (n < (ii * sizeof(s16))) { /* any residual is an error */
758 DPRINTK("rtd520:ai_process_dma buffer overflow %d samples!\n",
759 ii - (n / sizeof(s16)));
760 s->async->events |= COMEDI_CB_ERROR;
761 return -1;
762 }
763 comedi_buf_memcpy_to(s->async, 0, dp, n);
764 comedi_buf_write_free(s->async, n);
765
766 /*
767 * always at least 1 scan -- 1/2 FIFO is larger than our max scan list
768 */
769 s->async->events |= COMEDI_CB_BLOCK | COMEDI_CB_EOS;
770
771 if (++devpriv->dma0Offset >= DMA_CHAIN_COUNT) { /* next buffer */
772 devpriv->dma0Offset = 0;
773 }
774 return 0;
775}
776#endif /* USE_DMA */
777
778/* 607/*
779 Handle all rtd520 interrupts. 608 Handle all rtd520 interrupts.
780 Runs atomically and is never re-entered. 609 Runs atomically and is never re-entered.
@@ -794,47 +623,10 @@ static irqreturn_t rtd_interrupt(int irq, /* interrupt number (ignored) */
794 if (!dev->attached) 623 if (!dev->attached)
795 return IRQ_NONE; 624 return IRQ_NONE;
796 625
797 devpriv->intCount++; /* DEBUG statistics */
798
799 fifoStatus = readl(devpriv->las0 + LAS0_ADC); 626 fifoStatus = readl(devpriv->las0 + LAS0_ADC);
800 /* check for FIFO full, this automatically halts the ADC! */ 627 /* check for FIFO full, this automatically halts the ADC! */
801 if (!(fifoStatus & FS_ADC_NOT_FULL)) { /* 0 -> full */ 628 if (!(fifoStatus & FS_ADC_NOT_FULL)) /* 0 -> full */
802 DPRINTK("rtd520: FIFO full! fifo_status=0x%x\n", (fifoStatus ^ 0x6666) & 0x7777); /* should be all 0s */
803 goto abortTransfer; 629 goto abortTransfer;
804 }
805#ifdef USE_DMA
806 if (devpriv->flags & DMA0_ACTIVE) { /* Check DMA */
807 u32 istatus = readl(devpriv->lcfg + LCFG_ITCSR);
808
809 if (istatus & ICS_DMA0_A) {
810 if (ai_process_dma(dev, s) < 0) {
811 DPRINTK
812 ("rtd520: comedi read buffer overflow (DMA) with %ld to go!\n",
813 devpriv->aiCount);
814 devpriv->dma0Control &= ~PLX_DMA_START_BIT;
815 devpriv->dma0Control |= PLX_CLEAR_DMA_INTR_BIT;
816 writeb(devpriv->dma0Control,
817 devpriv->lcfg + LCFG_DMACSR0);
818 goto abortTransfer;
819 }
820
821 /*DPRINTK ("rtd520: DMA transfer: %ld to go, istatus %x\n",
822 devpriv->aiCount, istatus); */
823 devpriv->dma0Control &= ~PLX_DMA_START_BIT;
824 devpriv->dma0Control |= PLX_CLEAR_DMA_INTR_BIT;
825 writeb(devpriv->dma0Control,
826 devpriv->lcfg + LCFG_DMACSR0);
827 if (0 == devpriv->aiCount) { /* counted down */
828 DPRINTK("rtd520: Samples Done (DMA).\n");
829 goto transferDone;
830 }
831 comedi_event(dev, s);
832 } else {
833 /*DPRINTK ("rtd520: No DMA ready: istatus %x\n", istatus); */
834 }
835 }
836 /* Fall through and check for other interrupt sources */
837#endif /* USE_DMA */
838 630
839 status = readw(devpriv->las0 + LAS0_IT); 631 status = readw(devpriv->las0 + LAS0_IT);
840 /* if interrupt was not caused by our board, or handled above */ 632 /* if interrupt was not caused by our board, or handled above */
@@ -842,57 +634,38 @@ static irqreturn_t rtd_interrupt(int irq, /* interrupt number (ignored) */
842 return IRQ_HANDLED; 634 return IRQ_HANDLED;
843 635
844 if (status & IRQM_ADC_ABOUT_CNT) { /* sample count -> read FIFO */ 636 if (status & IRQM_ADC_ABOUT_CNT) { /* sample count -> read FIFO */
845 /* since the priority interrupt controller may have queued a sample 637 /*
846 counter interrupt, even though we have already finished, 638 * since the priority interrupt controller may have queued
847 we must handle the possibility that there is no data here */ 639 * a sample counter interrupt, even though we have already
848 if (!(fifoStatus & FS_ADC_HEMPTY)) { /* 0 -> 1/2 full */ 640 * finished, we must handle the possibility that there is
849 /*DPRINTK("rtd520: Sample int, reading 1/2FIFO. fifo_status 0x%x\n", 641 * no data here
850 (fifoStatus ^ 0x6666) & 0x7777); */ 642 */
851 if (ai_read_n(dev, s, devpriv->fifoLen / 2) < 0) { 643 if (!(fifoStatus & FS_ADC_HEMPTY)) {
852 DPRINTK 644 /* FIFO half full */
853 ("rtd520: comedi read buffer overflow (1/2FIFO) with %ld to go!\n", 645 if (ai_read_n(dev, s, devpriv->fifoLen / 2) < 0)
854 devpriv->aiCount);
855 goto abortTransfer; 646 goto abortTransfer;
856 } 647
857 if (0 == devpriv->aiCount) { /* counted down */ 648 if (0 == devpriv->aiCount)
858 DPRINTK("rtd520: Samples Done (1/2). fifo_status was 0x%x\n", (fifoStatus ^ 0x6666) & 0x7777); /* should be all 0s */
859 goto transferDone; 649 goto transferDone;
860 } 650
861 comedi_event(dev, s); 651 comedi_event(dev, s);
862 } else if (devpriv->transCount > 0) { /* read often */ 652 } else if (devpriv->transCount > 0) {
863 /*DPRINTK("rtd520: Sample int, reading %d fifo_status 0x%x\n", 653 if (fifoStatus & FS_ADC_NOT_EMPTY) {
864 devpriv->transCount, (fifoStatus ^ 0x6666) & 0x7777); */ 654 /* FIFO not empty */
865 if (fifoStatus & FS_ADC_NOT_EMPTY) { /* 1 -> not empty */ 655 if (ai_read_n(dev, s, devpriv->transCount) < 0)
866 if (ai_read_n(dev, s, devpriv->transCount) < 0) {
867 DPRINTK
868 ("rtd520: comedi read buffer overflow (N) with %ld to go!\n",
869 devpriv->aiCount);
870 goto abortTransfer; 656 goto abortTransfer;
871 } 657
872 if (0 == devpriv->aiCount) { /* counted down */ 658 if (0 == devpriv->aiCount)
873 DPRINTK
874 ("rtd520: Samples Done (N). fifo_status was 0x%x\n",
875 (fifoStatus ^ 0x6666) & 0x7777);
876 goto transferDone; 659 goto transferDone;
877 } 660
878 comedi_event(dev, s); 661 comedi_event(dev, s);
879 } 662 }
880 } else { /* wait for 1/2 FIFO (old) */
881 DPRINTK
882 ("rtd520: Sample int. Wait for 1/2. fifo_status 0x%x\n",
883 (fifoStatus ^ 0x6666) & 0x7777);
884 } 663 }
885 } else {
886 DPRINTK("rtd520: unknown interrupt source!\n");
887 } 664 }
888 665
889 overrun = readl(devpriv->las0 + LAS0_OVERRUN) & 0xffff; 666 overrun = readl(devpriv->las0 + LAS0_OVERRUN) & 0xffff;
890 if (overrun) { 667 if (overrun)
891 DPRINTK
892 ("rtd520: Interrupt overrun with %ld to go! over_status=0x%x\n",
893 devpriv->aiCount, overrun);
894 goto abortTransfer; 668 goto abortTransfer;
895 }
896 669
897 /* clear the interrupt */ 670 /* clear the interrupt */
898 devpriv->intClearMask = status; 671 devpriv->intClearMask = status;
@@ -913,23 +686,9 @@ transferDone:
913 writel(0, devpriv->las0 + LAS0_ADC_CONVERSION); 686 writel(0, devpriv->las0 + LAS0_ADC_CONVERSION);
914 devpriv->intMask = 0; 687 devpriv->intMask = 0;
915 writew(devpriv->intMask, devpriv->las0 + LAS0_IT); 688 writew(devpriv->intMask, devpriv->las0 + LAS0_IT);
916#ifdef USE_DMA
917 if (devpriv->flags & DMA0_ACTIVE) {
918 writel(readl(devpriv->lcfg + LCFG_ITCSR) & ~ICS_DMA0_E,
919 devpriv->lcfg + LCFG_ITCSR);
920 abort_dma(dev, 0);
921 devpriv->flags &= ~DMA0_ACTIVE;
922 /* if Using DMA, then we should have read everything by now */
923 if (devpriv->aiCount > 0) {
924 DPRINTK("rtd520: Lost DMA data! %ld remain\n",
925 devpriv->aiCount);
926 }
927 }
928#endif /* USE_DMA */
929 689
930 if (devpriv->aiCount > 0) { /* there shouldn't be anything left */ 690 if (devpriv->aiCount > 0) { /* there shouldn't be anything left */
931 fifoStatus = readl(devpriv->las0 + LAS0_ADC); 691 fifoStatus = readl(devpriv->las0 + LAS0_ADC);
932 DPRINTK("rtd520: Finishing up. %ld remain, fifoStat=%x\n", devpriv->aiCount, (fifoStatus ^ 0x6666) & 0x7777); /* should read all 0s */
933 ai_read_dregs(dev, s); /* read anything left in FIFO */ 692 ai_read_dregs(dev, s); /* read anything left in FIFO */
934 } 693 }
935 694
@@ -944,25 +703,10 @@ transferDone:
944 703
945 fifoStatus = readl(devpriv->las0 + LAS0_ADC); 704 fifoStatus = readl(devpriv->las0 + LAS0_ADC);
946 overrun = readl(devpriv->las0 + LAS0_OVERRUN) & 0xffff; 705 overrun = readl(devpriv->las0 + LAS0_OVERRUN) & 0xffff;
947 DPRINTK
948 ("rtd520: Acquisition complete. %ld ints, intStat=%x, overStat=%x\n",
949 devpriv->intCount, status, overrun);
950 706
951 return IRQ_HANDLED; 707 return IRQ_HANDLED;
952} 708}
953 709
954#if 0
955/*
956 return the number of samples available
957*/
958static int rtd_ai_poll(struct comedi_device *dev, struct comedi_subdevice *s)
959{
960 /* TODO: This needs to mask interrupts, read_dregs, and then re-enable */
961 /* Not sure what to do if DMA is active */
962 return s->async->buf_write_count - s->async->buf_read_count;
963}
964#endif
965
966/* 710/*
967 cmdtest tests a particular command to see if it is valid. 711 cmdtest tests a particular command to see if it is valid.
968 Using the cmdtest ioctl, a user can create a valid cmd 712 Using the cmdtest ioctl, a user can create a valid cmd
@@ -1001,103 +745,85 @@ static int rtd_ai_cmdtest(struct comedi_device *dev,
1001 if (err) 745 if (err)
1002 return 2; 746 return 2;
1003 747
1004 /* step 3: make sure arguments are trivially compatible */ 748 /* Step 3: check if arguments are trivially valid */
1005 749
1006 if (cmd->start_arg != 0) { 750 err |= cfc_check_trigger_arg_is(&cmd->start_arg, 0);
1007 cmd->start_arg = 0;
1008 err++;
1009 }
1010 751
1011 if (cmd->scan_begin_src == TRIG_TIMER) { 752 if (cmd->scan_begin_src == TRIG_TIMER) {
1012 /* Note: these are time periods, not actual rates */ 753 /* Note: these are time periods, not actual rates */
1013 if (1 == cmd->chanlist_len) { /* no scanning */ 754 if (1 == cmd->chanlist_len) { /* no scanning */
1014 if (cmd->scan_begin_arg < RTD_MAX_SPEED_1) { 755 if (cfc_check_trigger_arg_min(&cmd->scan_begin_arg,
1015 cmd->scan_begin_arg = RTD_MAX_SPEED_1; 756 RTD_MAX_SPEED_1)) {
1016 rtd_ns_to_timer(&cmd->scan_begin_arg, 757 rtd_ns_to_timer(&cmd->scan_begin_arg,
1017 TRIG_ROUND_UP); 758 TRIG_ROUND_UP);
1018 err++; 759 err |= -EINVAL;
1019 } 760 }
1020 if (cmd->scan_begin_arg > RTD_MIN_SPEED_1) { 761 if (cfc_check_trigger_arg_max(&cmd->scan_begin_arg,
1021 cmd->scan_begin_arg = RTD_MIN_SPEED_1; 762 RTD_MIN_SPEED_1)) {
1022 rtd_ns_to_timer(&cmd->scan_begin_arg, 763 rtd_ns_to_timer(&cmd->scan_begin_arg,
1023 TRIG_ROUND_DOWN); 764 TRIG_ROUND_DOWN);
1024 err++; 765 err |= -EINVAL;
1025 } 766 }
1026 } else { 767 } else {
1027 if (cmd->scan_begin_arg < RTD_MAX_SPEED) { 768 if (cfc_check_trigger_arg_min(&cmd->scan_begin_arg,
1028 cmd->scan_begin_arg = RTD_MAX_SPEED; 769 RTD_MAX_SPEED)) {
1029 rtd_ns_to_timer(&cmd->scan_begin_arg, 770 rtd_ns_to_timer(&cmd->scan_begin_arg,
1030 TRIG_ROUND_UP); 771 TRIG_ROUND_UP);
1031 err++; 772 err |= -EINVAL;
1032 } 773 }
1033 if (cmd->scan_begin_arg > RTD_MIN_SPEED) { 774 if (cfc_check_trigger_arg_max(&cmd->scan_begin_arg,
1034 cmd->scan_begin_arg = RTD_MIN_SPEED; 775 RTD_MIN_SPEED)) {
1035 rtd_ns_to_timer(&cmd->scan_begin_arg, 776 rtd_ns_to_timer(&cmd->scan_begin_arg,
1036 TRIG_ROUND_DOWN); 777 TRIG_ROUND_DOWN);
1037 err++; 778 err |= -EINVAL;
1038 } 779 }
1039 } 780 }
1040 } else { 781 } else {
1041 /* external trigger */ 782 /* external trigger */
1042 /* should be level/edge, hi/lo specification here */ 783 /* should be level/edge, hi/lo specification here */
1043 /* should specify multiple external triggers */ 784 /* should specify multiple external triggers */
1044 if (cmd->scan_begin_arg > 9) { 785 err |= cfc_check_trigger_arg_max(&cmd->scan_begin_arg, 9);
1045 cmd->scan_begin_arg = 9;
1046 err++;
1047 }
1048 } 786 }
787
1049 if (cmd->convert_src == TRIG_TIMER) { 788 if (cmd->convert_src == TRIG_TIMER) {
1050 if (1 == cmd->chanlist_len) { /* no scanning */ 789 if (1 == cmd->chanlist_len) { /* no scanning */
1051 if (cmd->convert_arg < RTD_MAX_SPEED_1) { 790 if (cfc_check_trigger_arg_min(&cmd->convert_arg,
1052 cmd->convert_arg = RTD_MAX_SPEED_1; 791 RTD_MAX_SPEED_1)) {
1053 rtd_ns_to_timer(&cmd->convert_arg, 792 rtd_ns_to_timer(&cmd->convert_arg,
1054 TRIG_ROUND_UP); 793 TRIG_ROUND_UP);
1055 err++; 794 err |= -EINVAL;
1056 } 795 }
1057 if (cmd->convert_arg > RTD_MIN_SPEED_1) { 796 if (cfc_check_trigger_arg_max(&cmd->convert_arg,
1058 cmd->convert_arg = RTD_MIN_SPEED_1; 797 RTD_MIN_SPEED_1)) {
1059 rtd_ns_to_timer(&cmd->convert_arg, 798 rtd_ns_to_timer(&cmd->convert_arg,
1060 TRIG_ROUND_DOWN); 799 TRIG_ROUND_DOWN);
1061 err++; 800 err |= -EINVAL;
1062 } 801 }
1063 } else { 802 } else {
1064 if (cmd->convert_arg < RTD_MAX_SPEED) { 803 if (cfc_check_trigger_arg_min(&cmd->convert_arg,
1065 cmd->convert_arg = RTD_MAX_SPEED; 804 RTD_MAX_SPEED)) {
1066 rtd_ns_to_timer(&cmd->convert_arg, 805 rtd_ns_to_timer(&cmd->convert_arg,
1067 TRIG_ROUND_UP); 806 TRIG_ROUND_UP);
1068 err++; 807 err |= -EINVAL;
1069 } 808 }
1070 if (cmd->convert_arg > RTD_MIN_SPEED) { 809 if (cfc_check_trigger_arg_max(&cmd->convert_arg,
1071 cmd->convert_arg = RTD_MIN_SPEED; 810 RTD_MIN_SPEED)) {
1072 rtd_ns_to_timer(&cmd->convert_arg, 811 rtd_ns_to_timer(&cmd->convert_arg,
1073 TRIG_ROUND_DOWN); 812 TRIG_ROUND_DOWN);
1074 err++; 813 err |= -EINVAL;
1075 } 814 }
1076 } 815 }
1077 } else { 816 } else {
1078 /* external trigger */ 817 /* external trigger */
1079 /* see above */ 818 /* see above */
1080 if (cmd->convert_arg > 9) { 819 err |= cfc_check_trigger_arg_max(&cmd->convert_arg, 9);
1081 cmd->convert_arg = 9;
1082 err++;
1083 }
1084 } 820 }
1085 821
1086#if 0
1087 if (cmd->scan_end_arg != cmd->chanlist_len) {
1088 cmd->scan_end_arg = cmd->chanlist_len;
1089 err++;
1090 }
1091#endif
1092 if (cmd->stop_src == TRIG_COUNT) { 822 if (cmd->stop_src == TRIG_COUNT) {
1093 /* TODO check for rounding error due to counter wrap */ 823 /* TODO check for rounding error due to counter wrap */
1094
1095 } else { 824 } else {
1096 /* TRIG_NONE */ 825 /* TRIG_NONE */
1097 if (cmd->stop_arg != 0) { 826 err |= cfc_check_trigger_arg_is(&cmd->stop_arg, 0);
1098 cmd->stop_arg = 0;
1099 err++;
1100 }
1101 } 827 }
1102 828
1103 if (err) 829 if (err)
@@ -1159,28 +885,8 @@ static int rtd_ai_cmd(struct comedi_device *dev, struct comedi_subdevice *s)
1159 writel(0, devpriv->las0 + LAS0_ADC_CONVERSION); 885 writel(0, devpriv->las0 + LAS0_ADC_CONVERSION);
1160 devpriv->intMask = 0; 886 devpriv->intMask = 0;
1161 writew(devpriv->intMask, devpriv->las0 + LAS0_IT); 887 writew(devpriv->intMask, devpriv->las0 + LAS0_IT);
1162#ifdef USE_DMA
1163 if (devpriv->flags & DMA0_ACTIVE) { /* cancel anything running */
1164 writel(readl(devpriv->lcfg + LCFG_ITCSR) & ~ICS_DMA0_E,
1165 devpriv->lcfg + LCFG_ITCSR);
1166 abort_dma(dev, 0);
1167 devpriv->flags &= ~DMA0_ACTIVE;
1168 if (readl(devpriv->lcfg + LCFG_ITCSR) & ICS_DMA0_A) {
1169 devpriv->dma0Control = PLX_CLEAR_DMA_INTR_BIT;
1170 writeb(devpriv->dma0Control,
1171 devpriv->lcfg + LCFG_DMACSR0);
1172 }
1173 }
1174 writel(0, devpriv->las0 + LAS0_DMA0_RESET);
1175#endif /* USE_DMA */
1176 writel(0, devpriv->las0 + LAS0_ADC_FIFO_CLEAR); 888 writel(0, devpriv->las0 + LAS0_ADC_FIFO_CLEAR);
1177 writel(0, devpriv->las0 + LAS0_OVERRUN); 889 writel(0, devpriv->las0 + LAS0_OVERRUN);
1178 devpriv->intCount = 0;
1179
1180 if (!dev->irq) { /* we need interrupts for this */
1181 DPRINTK("rtd520: ERROR! No interrupt available!\n");
1182 return -ENXIO;
1183 }
1184 890
1185 /* start configuration */ 891 /* start configuration */
1186 /* load channel list and reset CGT */ 892 /* load channel list and reset CGT */
@@ -1188,7 +894,6 @@ static int rtd_ai_cmd(struct comedi_device *dev, struct comedi_subdevice *s)
1188 894
1189 /* setup the common case and override if needed */ 895 /* setup the common case and override if needed */
1190 if (cmd->chanlist_len > 1) { 896 if (cmd->chanlist_len > 1) {
1191 /*DPRINTK ("rtd520: Multi channel setup\n"); */
1192 /* pacer start source: SOFTWARE */ 897 /* pacer start source: SOFTWARE */
1193 writel(0, devpriv->las0 + LAS0_PACER_START); 898 writel(0, devpriv->las0 + LAS0_PACER_START);
1194 /* burst trigger source: PACER */ 899 /* burst trigger source: PACER */
@@ -1196,7 +901,6 @@ static int rtd_ai_cmd(struct comedi_device *dev, struct comedi_subdevice *s)
1196 /* ADC conversion trigger source: BURST */ 901 /* ADC conversion trigger source: BURST */
1197 writel(2, devpriv->las0 + LAS0_ADC_CONVERSION); 902 writel(2, devpriv->las0 + LAS0_ADC_CONVERSION);
1198 } else { /* single channel */ 903 } else { /* single channel */
1199 /*DPRINTK ("rtd520: single channel setup\n"); */
1200 /* pacer start source: SOFTWARE */ 904 /* pacer start source: SOFTWARE */
1201 writel(0, devpriv->las0 + LAS0_PACER_START); 905 writel(0, devpriv->las0 + LAS0_PACER_START);
1202 /* ADC conversion trigger source: PACER */ 906 /* ADC conversion trigger source: PACER */
@@ -1208,8 +912,11 @@ static int rtd_ai_cmd(struct comedi_device *dev, struct comedi_subdevice *s)
1208 /* scan_begin_arg is in nanoseconds */ 912 /* scan_begin_arg is in nanoseconds */
1209 /* find out how many samples to wait before transferring */ 913 /* find out how many samples to wait before transferring */
1210 if (cmd->flags & TRIG_WAKE_EOS) { 914 if (cmd->flags & TRIG_WAKE_EOS) {
1211 /* this may generate un-sustainable interrupt rates */ 915 /*
1212 /* the application is responsible for doing the right thing */ 916 * this may generate un-sustainable interrupt rates
917 * the application is responsible for doing the
918 * right thing
919 */
1213 devpriv->transCount = cmd->chanlist_len; 920 devpriv->transCount = cmd->chanlist_len;
1214 devpriv->flags |= SEND_EOS; 921 devpriv->flags |= SEND_EOS;
1215 } else { 922 } else {
@@ -1239,11 +946,6 @@ static int rtd_ai_cmd(struct comedi_device *dev, struct comedi_subdevice *s)
1239 writel((devpriv->transCount - 1) & 0xffff, 946 writel((devpriv->transCount - 1) & 0xffff,
1240 devpriv->las0 + LAS0_ACNT); 947 devpriv->las0 + LAS0_ACNT);
1241 } 948 }
1242
1243 DPRINTK
1244 ("rtd520: scanLen=%d transferCount=%d fifoLen=%d\n scanTime(ns)=%d flags=0x%x\n",
1245 cmd->chanlist_len, devpriv->transCount, devpriv->fifoLen,
1246 cmd->scan_begin_arg, devpriv->flags);
1247 } else { /* unknown timing, just use 1/2 FIFO */ 949 } else { /* unknown timing, just use 1/2 FIFO */
1248 devpriv->transCount = 0; 950 devpriv->transCount = 0;
1249 devpriv->flags &= ~SEND_EOS; 951 devpriv->flags &= ~SEND_EOS;
@@ -1268,10 +970,6 @@ static int rtd_ai_cmd(struct comedi_device *dev, struct comedi_subdevice *s)
1268 case TRIG_NONE: /* stop when cancel is called */ 970 case TRIG_NONE: /* stop when cancel is called */
1269 devpriv->aiCount = -1; /* read forever */ 971 devpriv->aiCount = -1; /* read forever */
1270 break; 972 break;
1271
1272 default:
1273 DPRINTK("rtd520: Warning! ignoring stop_src mode %d\n",
1274 cmd->stop_src);
1275 } 973 }
1276 974
1277 /* Scan timing */ 975 /* Scan timing */
@@ -1280,7 +978,6 @@ static int rtd_ai_cmd(struct comedi_device *dev, struct comedi_subdevice *s)
1280 timer = rtd_ns_to_timer(&cmd->scan_begin_arg, 978 timer = rtd_ns_to_timer(&cmd->scan_begin_arg,
1281 TRIG_ROUND_NEAREST); 979 TRIG_ROUND_NEAREST);
1282 /* set PACER clock */ 980 /* set PACER clock */
1283 /*DPRINTK ("rtd520: loading %d into pacer\n", timer); */
1284 writel(timer & 0xffffff, devpriv->las0 + LAS0_PCLK); 981 writel(timer & 0xffffff, devpriv->las0 + LAS0_PCLK);
1285 982
1286 break; 983 break;
@@ -1289,20 +986,16 @@ static int rtd_ai_cmd(struct comedi_device *dev, struct comedi_subdevice *s)
1289 /* pacer start source: EXTERNAL */ 986 /* pacer start source: EXTERNAL */
1290 writel(1, devpriv->las0 + LAS0_PACER_START); 987 writel(1, devpriv->las0 + LAS0_PACER_START);
1291 break; 988 break;
1292
1293 default:
1294 DPRINTK("rtd520: Warning! ignoring scan_begin_src mode %d\n",
1295 cmd->scan_begin_src);
1296 } 989 }
1297 990
1298 /* Sample timing within a scan */ 991 /* Sample timing within a scan */
1299 switch (cmd->convert_src) { 992 switch (cmd->convert_src) {
1300 case TRIG_TIMER: /* periodic */ 993 case TRIG_TIMER: /* periodic */
1301 if (cmd->chanlist_len > 1) { /* only needed for multi-channel */ 994 if (cmd->chanlist_len > 1) {
995 /* only needed for multi-channel */
1302 timer = rtd_ns_to_timer(&cmd->convert_arg, 996 timer = rtd_ns_to_timer(&cmd->convert_arg,
1303 TRIG_ROUND_NEAREST); 997 TRIG_ROUND_NEAREST);
1304 /* setup BURST clock */ 998 /* setup BURST clock */
1305 /*DPRINTK ("rtd520: loading %d into burst\n", timer); */
1306 writel(timer & 0x3ff, devpriv->las0 + LAS0_BCLK); 999 writel(timer & 0x3ff, devpriv->las0 + LAS0_BCLK);
1307 } 1000 }
1308 1001
@@ -1312,10 +1005,6 @@ static int rtd_ai_cmd(struct comedi_device *dev, struct comedi_subdevice *s)
1312 /* burst trigger source: EXTERNAL */ 1005 /* burst trigger source: EXTERNAL */
1313 writel(2, devpriv->las0 + LAS0_BURST_START); 1006 writel(2, devpriv->las0 + LAS0_BURST_START);
1314 break; 1007 break;
1315
1316 default:
1317 DPRINTK("rtd520: Warning! ignoring convert_src mode %d\n",
1318 cmd->convert_src);
1319 } 1008 }
1320 /* end configuration */ 1009 /* end configuration */
1321 1010
@@ -1329,34 +1018,9 @@ static int rtd_ai_cmd(struct comedi_device *dev, struct comedi_subdevice *s)
1329 if (devpriv->transCount > 0) { /* transfer every N samples */ 1018 if (devpriv->transCount > 0) { /* transfer every N samples */
1330 devpriv->intMask = IRQM_ADC_ABOUT_CNT; 1019 devpriv->intMask = IRQM_ADC_ABOUT_CNT;
1331 writew(devpriv->intMask, devpriv->las0 + LAS0_IT); 1020 writew(devpriv->intMask, devpriv->las0 + LAS0_IT);
1332 DPRINTK("rtd520: Transferring every %d\n", devpriv->transCount);
1333 } else { /* 1/2 FIFO transfers */ 1021 } else { /* 1/2 FIFO transfers */
1334#ifdef USE_DMA
1335 devpriv->flags |= DMA0_ACTIVE;
1336
1337 /* point to first transfer in ring */
1338 devpriv->dma0Offset = 0;
1339 writel(DMA_MODE_BITS, devpriv->lcfg + LCFG_DMAMODE0);
1340 /* point to first block */
1341 writel(devpriv->dma0Chain[DMA_CHAIN_COUNT - 1].next,
1342 devpriv->lcfg + LCFG_DMADPR0);
1343 writel(DMAS_ADFIFO_HALF_FULL, devpriv->las0 + LAS0_DMA0_SRC);
1344 writel(readl(devpriv->lcfg + LCFG_ITCSR) | ICS_DMA0_E,
1345 devpriv->lcfg + LCFG_ITCSR);
1346 /* Must be 2 steps. See PLX app note about "Starting a DMA transfer" */
1347 devpriv->dma0Control = PLX_DMA_EN_BIT;
1348 writeb(devpriv->dma0Control,
1349 devpriv->lcfg + LCFG_DMACSR0);
1350 devpriv->dma0Control |= PLX_DMA_START_BIT;
1351 writeb(devpriv->dma0Control,
1352 devpriv->lcfg + LCFG_DMACSR0);
1353 DPRINTK("rtd520: Using DMA0 transfers. plxInt %x RtdInt %x\n",
1354 readl(devpriv->lcfg + LCFG_ITCSR), devpriv->intMask);
1355#else /* USE_DMA */
1356 devpriv->intMask = IRQM_ADC_ABOUT_CNT; 1022 devpriv->intMask = IRQM_ADC_ABOUT_CNT;
1357 writew(devpriv->intMask, devpriv->las0 + LAS0_IT); 1023 writew(devpriv->intMask, devpriv->las0 + LAS0_IT);
1358 DPRINTK("rtd520: Transferring every 1/2 FIFO\n");
1359#endif /* USE_DMA */
1360 } 1024 }
1361 1025
1362 /* BUG: start_src is ASSUMED to be TRIG_NOW */ 1026 /* BUG: start_src is ASSUMED to be TRIG_NOW */
@@ -1381,19 +1045,8 @@ static int rtd_ai_cancel(struct comedi_device *dev, struct comedi_subdevice *s)
1381 devpriv->intMask = 0; 1045 devpriv->intMask = 0;
1382 writew(devpriv->intMask, devpriv->las0 + LAS0_IT); 1046 writew(devpriv->intMask, devpriv->las0 + LAS0_IT);
1383 devpriv->aiCount = 0; /* stop and don't transfer any more */ 1047 devpriv->aiCount = 0; /* stop and don't transfer any more */
1384#ifdef USE_DMA
1385 if (devpriv->flags & DMA0_ACTIVE) {
1386 writel(readl(devpriv->lcfg + LCFG_ITCSR) & ~ICS_DMA0_E,
1387 devpriv->lcfg + LCFG_ITCSR);
1388 abort_dma(dev, 0);
1389 devpriv->flags &= ~DMA0_ACTIVE;
1390 }
1391#endif /* USE_DMA */
1392 status = readw(devpriv->las0 + LAS0_IT); 1048 status = readw(devpriv->las0 + LAS0_IT);
1393 overrun = readl(devpriv->las0 + LAS0_OVERRUN) & 0xffff; 1049 overrun = readl(devpriv->las0 + LAS0_OVERRUN) & 0xffff;
1394 DPRINTK
1395 ("rtd520: Acquisition canceled. %ld ints, intStat=%x, overStat=%x\n",
1396 devpriv->intCount, status, overrun);
1397 return 0; 1050 return 0;
1398} 1051}
1399 1052
@@ -1430,14 +1083,11 @@ static int rtd_ao_winsn(struct comedi_device *dev,
1430 val = data[i] << 3; 1083 val = data[i] << 3;
1431 } 1084 }
1432 1085
1433 DPRINTK
1434 ("comedi: rtd520 DAC chan=%d range=%d writing %d as 0x%x\n",
1435 chan, range, data[i], val);
1436
1437 /* a typical programming sequence */ 1086 /* a typical programming sequence */
1438 writew(val, devpriv->las1 + 1087 writew(val, devpriv->las1 +
1439 ((chan == 0) ? LAS1_DAC1_FIFO : LAS1_DAC2_FIFO)); 1088 ((chan == 0) ? LAS1_DAC1_FIFO : LAS1_DAC2_FIFO));
1440 writew(0, devpriv->las0 + ((chan == 0) ? LAS0_DAC1 : LAS0_DAC2)); 1089 writew(0, devpriv->las0 +
1090 ((chan == 0) ? LAS0_DAC1 : LAS0_DAC2));
1441 1091
1442 devpriv->aoValue[chan] = data[i]; /* save for read back */ 1092 devpriv->aoValue[chan] = data[i]; /* save for read back */
1443 1093
@@ -1449,12 +1099,8 @@ static int rtd_ao_winsn(struct comedi_device *dev,
1449 break; 1099 break;
1450 WAIT_QUIETLY; 1100 WAIT_QUIETLY;
1451 } 1101 }
1452 if (ii >= RTD_DAC_TIMEOUT) { 1102 if (ii >= RTD_DAC_TIMEOUT)
1453 DPRINTK
1454 ("rtd520: Error: DAC never finished! FifoStatus=0x%x\n",
1455 stat ^ 0x6666);
1456 return -ETIMEDOUT; 1103 return -ETIMEDOUT;
1457 }
1458 } 1104 }
1459 1105
1460 /* return the number of samples read/written */ 1106 /* return the number of samples read/written */
@@ -1507,8 +1153,6 @@ static int rtd_dio_insn_bits(struct comedi_device *dev,
1507 * input lines. */ 1153 * input lines. */
1508 data[1] = readw(devpriv->las0 + LAS0_DIO0) & 0xff; 1154 data[1] = readw(devpriv->las0 + LAS0_DIO0) & 0xff;
1509 1155
1510 /*DPRINTK("rtd520:port_0 wrote: 0x%x read: 0x%x\n", s->state, data[1]); */
1511
1512 return insn->n; 1156 return insn->n;
1513} 1157}
1514 1158
@@ -1542,7 +1186,6 @@ static int rtd_dio_insn_config(struct comedi_device *dev,
1542 return -EINVAL; 1186 return -EINVAL;
1543 } 1187 }
1544 1188
1545 DPRINTK("rtd520: port_0_direction=0x%x (1 means out)\n", s->io_bits);
1546 /* TODO support digital match interrupts and strobes */ 1189 /* TODO support digital match interrupts and strobes */
1547 devpriv->dioStatus = 0x01; /* set direction */ 1190 devpriv->dioStatus = 0x01; /* set direction */
1548 writew(devpriv->dioStatus, devpriv->las0 + LAS0_DIO_STATUS); 1191 writew(devpriv->dioStatus, devpriv->las0 + LAS0_DIO_STATUS);
@@ -1557,356 +1200,194 @@ static int rtd_dio_insn_config(struct comedi_device *dev,
1557 return 1; 1200 return 1;
1558} 1201}
1559 1202
1560static struct pci_dev *rtd_find_pci(struct comedi_device *dev, 1203static void rtd_reset(struct comedi_device *dev)
1561 struct comedi_devconfig *it) 1204{
1205 struct rtdPrivate *devpriv = dev->private;
1206
1207 writel(0, devpriv->las0 + LAS0_BOARD_RESET);
1208 udelay(100); /* needed? */
1209 writel(0, devpriv->lcfg + LCFG_ITCSR);
1210 devpriv->intMask = 0;
1211 writew(devpriv->intMask, devpriv->las0 + LAS0_IT);
1212 devpriv->intClearMask = ~0;
1213 writew(devpriv->intClearMask, devpriv->las0 + LAS0_CLEAR);
1214 readw(devpriv->las0 + LAS0_CLEAR);
1215}
1216
1217/*
1218 * initialize board, per RTD spec
1219 * also, initialize shadow registers
1220 */
1221static void rtd_init_board(struct comedi_device *dev)
1222{
1223 struct rtdPrivate *devpriv = dev->private;
1224
1225 rtd_reset(dev);
1226
1227 writel(0, devpriv->las0 + LAS0_OVERRUN);
1228 writel(0, devpriv->las0 + LAS0_CGT_CLEAR);
1229 writel(0, devpriv->las0 + LAS0_ADC_FIFO_CLEAR);
1230 writel(0, devpriv->las0 + LAS0_DAC1_RESET);
1231 writel(0, devpriv->las0 + LAS0_DAC2_RESET);
1232 /* clear digital IO fifo */
1233 devpriv->dioStatus = 0;
1234 writew(devpriv->dioStatus, devpriv->las0 + LAS0_DIO_STATUS);
1235 devpriv->utcCtrl[0] = (0 << 6) | 0x30;
1236 devpriv->utcCtrl[1] = (1 << 6) | 0x30;
1237 devpriv->utcCtrl[2] = (2 << 6) | 0x30;
1238 devpriv->utcCtrl[3] = (3 << 6) | 0x00;
1239 writeb(devpriv->utcCtrl[0], devpriv->las0 + LAS0_UTC_CTRL);
1240 writeb(devpriv->utcCtrl[1], devpriv->las0 + LAS0_UTC_CTRL);
1241 writeb(devpriv->utcCtrl[2], devpriv->las0 + LAS0_UTC_CTRL);
1242 writeb(devpriv->utcCtrl[3], devpriv->las0 + LAS0_UTC_CTRL);
1243 /* TODO: set user out source ??? */
1244}
1245
1246/* The RTD driver does this */
1247static void rtd_pci_latency_quirk(struct comedi_device *dev,
1248 struct pci_dev *pcidev)
1249{
1250 unsigned char pci_latency;
1251
1252 pci_read_config_byte(pcidev, PCI_LATENCY_TIMER, &pci_latency);
1253 if (pci_latency < 32) {
1254 dev_info(dev->class_dev,
1255 "PCI latency changed from %d to %d\n",
1256 pci_latency, 32);
1257 pci_write_config_byte(pcidev, PCI_LATENCY_TIMER, 32);
1258 }
1259}
1260
1261static const void *rtd_find_boardinfo(struct comedi_device *dev,
1262 struct pci_dev *pcidev)
1562{ 1263{
1563 const struct rtdBoard *thisboard; 1264 const struct rtdBoard *thisboard;
1564 struct pci_dev *pcidev = NULL;
1565 int bus = it->options[0];
1566 int slot = it->options[1];
1567 int i; 1265 int i;
1568 1266
1569 for_each_pci_dev(pcidev) { 1267 for (i = 0; i < ARRAY_SIZE(rtd520Boards); i++) {
1570 if (pcidev->vendor != PCI_VENDOR_ID_RTD) 1268 thisboard = &rtd520Boards[i];
1571 continue; 1269 if (pcidev->device == thisboard->device_id)
1572 if (bus || slot) { 1270 return thisboard;
1573 if (pcidev->bus->number != bus ||
1574 PCI_SLOT(pcidev->devfn) != slot)
1575 continue;
1576 }
1577 for (i = 0; i < ARRAY_SIZE(rtd520Boards); i++) {
1578 thisboard = &rtd520Boards[i];
1579 if (pcidev->device == thisboard->device_id) {
1580 dev->board_ptr = thisboard;
1581 return pcidev;
1582 }
1583 }
1584 } 1271 }
1585 dev_warn(dev->class_dev,
1586 "no supported board found! (req. bus/slot: %d/%d)\n",
1587 bus, slot);
1588 return NULL; 1272 return NULL;
1589} 1273}
1590 1274
1591static int rtd_attach(struct comedi_device *dev, struct comedi_devconfig *it) 1275static int rtd_auto_attach(struct comedi_device *dev,
1592{ /* board name and options flags */ 1276 unsigned long context_unused)
1277{
1278 struct pci_dev *pcidev = comedi_to_pci_dev(dev);
1593 const struct rtdBoard *thisboard; 1279 const struct rtdBoard *thisboard;
1594 struct rtdPrivate *devpriv; 1280 struct rtdPrivate *devpriv;
1595 struct pci_dev *pcidev;
1596 struct comedi_subdevice *s; 1281 struct comedi_subdevice *s;
1597 resource_size_t pci_base;
1598 int ret; 1282 int ret;
1599#ifdef USE_DMA
1600 int index;
1601#endif
1602 1283
1603 printk(KERN_INFO "comedi%d: rtd520 attaching.\n", dev->minor); 1284 thisboard = rtd_find_boardinfo(dev, pcidev);
1604 1285 if (!thisboard)
1605#if defined(CONFIG_COMEDI_DEBUG) && defined(USE_DMA) 1286 return -ENODEV;
1606 /* You can set this a load time: modprobe comedi comedi_debug=1 */ 1287 dev->board_ptr = thisboard;
1607 if (0 == comedi_debug) /* force DMA debug printks */ 1288 dev->board_name = thisboard->name;
1608 comedi_debug = 1;
1609#endif
1610 1289
1611 /* 1290 devpriv = kzalloc(sizeof(*devpriv), GFP_KERNEL);
1612 * Allocate the private structure area. alloc_private() is a 1291 if (!devpriv)
1613 * convenient macro defined in comedidev.h.
1614 */
1615 if (alloc_private(dev, sizeof(struct rtdPrivate)) < 0)
1616 return -ENOMEM; 1292 return -ENOMEM;
1617 devpriv = dev->private; 1293 dev->private = devpriv;
1618 1294
1619 pcidev = rtd_find_pci(dev, it); 1295 ret = comedi_pci_enable(pcidev, dev->board_name);
1620 if (!pcidev) 1296 if (ret)
1621 return -EIO;
1622 comedi_set_hw_dev(dev, &pcidev->dev);
1623 thisboard = comedi_board(dev);
1624
1625 dev->board_name = thisboard->name;
1626
1627 ret = comedi_pci_enable(pcidev, DRV_NAME);
1628 if (ret < 0) {
1629 printk(KERN_INFO "Failed to enable PCI device and request regions.\n");
1630 return ret; 1297 return ret;
1631 }
1632 dev->iobase = 1; /* the "detach" needs this */ 1298 dev->iobase = 1; /* the "detach" needs this */
1633 1299
1634 /* Initialize the base addresses */ 1300 devpriv->las0 = ioremap_nocache(pci_resource_start(pcidev, 2),
1635 pci_base = pci_resource_start(pcidev, LAS0_PCIINDEX); 1301 pci_resource_len(pcidev, 2));
1636 devpriv->las0 = ioremap_nocache(pci_base, LAS0_PCISIZE); 1302 devpriv->las1 = ioremap_nocache(pci_resource_start(pcidev, 3),
1637 pci_base = pci_resource_start(pcidev, LAS1_PCIINDEX); 1303 pci_resource_len(pcidev, 3));
1638 devpriv->las1 = ioremap_nocache(pci_base, LAS1_PCISIZE); 1304 devpriv->lcfg = ioremap_nocache(pci_resource_start(pcidev, 0),
1639 pci_base = pci_resource_start(pcidev, LCFG_PCIINDEX); 1305 pci_resource_len(pcidev, 0));
1640 devpriv->lcfg = ioremap_nocache(pci_base, LCFG_PCISIZE);
1641 if (!devpriv->las0 || !devpriv->las1 || !devpriv->lcfg) 1306 if (!devpriv->las0 || !devpriv->las1 || !devpriv->lcfg)
1642 return -ENOMEM; 1307 return -ENOMEM;
1643 1308
1644 { /* The RTD driver does this */ 1309 rtd_pci_latency_quirk(dev, pcidev);
1645 unsigned char pci_latency;
1646 u16 revision;
1647 /*uint32_t epld_version; */
1648
1649 pci_read_config_word(pcidev, PCI_REVISION_ID,
1650 &revision);
1651 DPRINTK("%s: PCI revision %d.\n", dev->board_name, revision);
1652
1653 pci_read_config_byte(pcidev,
1654 PCI_LATENCY_TIMER, &pci_latency);
1655 if (pci_latency < 32) {
1656 printk(KERN_INFO "%s: PCI latency changed from %d to %d\n",
1657 dev->board_name, pci_latency, 32);
1658 pci_write_config_byte(pcidev,
1659 PCI_LATENCY_TIMER, 32);
1660 } else {
1661 DPRINTK("rtd520: PCI latency = %d\n", pci_latency);
1662 }
1663 1310
1664 /* 1311 if (pcidev->irq) {
1665 * Undocumented EPLD version (doesn't match RTD driver results) 1312 ret = request_irq(pcidev->irq, rtd_interrupt, IRQF_SHARED,
1666 */ 1313 dev->board_name, dev);
1667 /*DPRINTK ("rtd520: Reading epld from %p\n", 1314 if (ret == 0)
1668 devpriv->las0+0); 1315 dev->irq = pcidev->irq;
1669 epld_version = readl (devpriv->las0+0);
1670 if ((epld_version & 0xF0) >> 4 == 0x0F) {
1671 DPRINTK("rtd520: pre-v8 EPLD. (%x)\n", epld_version);
1672 } else {
1673 DPRINTK("rtd520: EPLD version %x.\n", epld_version >> 4);
1674 } */
1675 } 1316 }
1676 1317
1677 /* Show board configuration */
1678 printk(KERN_INFO "%s:", dev->board_name);
1679
1680 ret = comedi_alloc_subdevices(dev, 4); 1318 ret = comedi_alloc_subdevices(dev, 4);
1681 if (ret) 1319 if (ret)
1682 return ret; 1320 return ret;
1683 1321
1684 s = &dev->subdevices[0]; 1322 s = &dev->subdevices[0];
1685 dev->read_subdev = s;
1686 /* analog input subdevice */ 1323 /* analog input subdevice */
1687 s->type = COMEDI_SUBD_AI; 1324 s->type = COMEDI_SUBD_AI;
1688 s->subdev_flags = 1325 s->subdev_flags = SDF_READABLE | SDF_GROUND | SDF_COMMON | SDF_DIFF;
1689 SDF_READABLE | SDF_GROUND | SDF_COMMON | SDF_DIFF | SDF_CMD_READ; 1326 s->n_chan = 16;
1690 s->n_chan = thisboard->aiChans; 1327 s->maxdata = 0x0fff;
1691 s->maxdata = (1 << thisboard->aiBits) - 1; 1328 s->range_table = thisboard->ai_range;
1692 if (thisboard->aiMaxGain <= 32) 1329 s->len_chanlist = RTD_MAX_CHANLIST;
1693 s->range_table = &rtd_ai_7520_range; 1330 s->insn_read = rtd_ai_rinsn;
1694 else 1331 if (dev->irq) {
1695 s->range_table = &rtd_ai_4520_range; 1332 dev->read_subdev = s;
1696 1333 s->subdev_flags |= SDF_CMD_READ;
1697 s->len_chanlist = RTD_MAX_CHANLIST; /* devpriv->fifoLen */ 1334 s->do_cmd = rtd_ai_cmd;
1698 s->insn_read = rtd_ai_rinsn; 1335 s->do_cmdtest = rtd_ai_cmdtest;
1699 s->do_cmd = rtd_ai_cmd; 1336 s->cancel = rtd_ai_cancel;
1700 s->do_cmdtest = rtd_ai_cmdtest; 1337 }
1701 s->cancel = rtd_ai_cancel;
1702 /* s->poll = rtd_ai_poll; *//* not ready yet */
1703 1338
1704 s = &dev->subdevices[1]; 1339 s = &dev->subdevices[1];
1705 /* analog output subdevice */ 1340 /* analog output subdevice */
1706 s->type = COMEDI_SUBD_AO; 1341 s->type = COMEDI_SUBD_AO;
1707 s->subdev_flags = SDF_WRITABLE; 1342 s->subdev_flags = SDF_WRITABLE;
1708 s->n_chan = 2; 1343 s->n_chan = 2;
1709 s->maxdata = (1 << thisboard->aiBits) - 1; 1344 s->maxdata = 0x0fff;
1710 s->range_table = &rtd_ao_range; 1345 s->range_table = &rtd_ao_range;
1711 s->insn_write = rtd_ao_winsn; 1346 s->insn_write = rtd_ao_winsn;
1712 s->insn_read = rtd_ao_rinsn; 1347 s->insn_read = rtd_ao_rinsn;
1713 1348
1714 s = &dev->subdevices[2]; 1349 s = &dev->subdevices[2];
1715 /* digital i/o subdevice */ 1350 /* digital i/o subdevice */
1716 s->type = COMEDI_SUBD_DIO; 1351 s->type = COMEDI_SUBD_DIO;
1717 s->subdev_flags = SDF_READABLE | SDF_WRITABLE; 1352 s->subdev_flags = SDF_READABLE | SDF_WRITABLE;
1718 /* we only support port 0 right now. Ignoring port 1 and user IO */ 1353 /* we only support port 0 right now. Ignoring port 1 and user IO */
1719 s->n_chan = 8; 1354 s->n_chan = 8;
1720 s->maxdata = 1; 1355 s->maxdata = 1;
1721 s->range_table = &range_digital; 1356 s->range_table = &range_digital;
1722 s->insn_bits = rtd_dio_insn_bits; 1357 s->insn_bits = rtd_dio_insn_bits;
1723 s->insn_config = rtd_dio_insn_config; 1358 s->insn_config = rtd_dio_insn_config;
1724 1359
1725 /* timer/counter subdevices (not currently supported) */ 1360 /* timer/counter subdevices (not currently supported) */
1726 s = &dev->subdevices[3]; 1361 s = &dev->subdevices[3];
1727 s->type = COMEDI_SUBD_COUNTER; 1362 s->type = COMEDI_SUBD_COUNTER;
1728 s->subdev_flags = SDF_READABLE | SDF_WRITABLE; 1363 s->subdev_flags = SDF_READABLE | SDF_WRITABLE;
1729 s->n_chan = 3; 1364 s->n_chan = 3;
1730 s->maxdata = 0xffff; 1365 s->maxdata = 0xffff;
1731 1366
1732 /* initialize board, per RTD spec */ 1367 rtd_init_board(dev);
1733 /* also, initialize shadow registers */
1734 writel(0, devpriv->las0 + LAS0_BOARD_RESET);
1735 udelay(100); /* needed? */
1736 writel(0, devpriv->lcfg + LCFG_ITCSR);
1737 devpriv->intMask = 0;
1738 writew(devpriv->intMask, devpriv->las0 + LAS0_IT);
1739 devpriv->intClearMask = ~0;
1740 writew(devpriv->intClearMask, devpriv->las0 + LAS0_CLEAR);
1741 readw(devpriv->las0 + LAS0_CLEAR);
1742 writel(0, devpriv->las0 + LAS0_OVERRUN);
1743 writel(0, devpriv->las0 + LAS0_CGT_CLEAR);
1744 writel(0, devpriv->las0 + LAS0_ADC_FIFO_CLEAR);
1745 writel(0, devpriv->las0 + LAS0_DAC1_RESET);
1746 writel(0, devpriv->las0 + LAS0_DAC2_RESET);
1747 /* clear digital IO fifo */
1748 devpriv->dioStatus = 0;
1749 writew(devpriv->dioStatus, devpriv->las0 + LAS0_DIO_STATUS);
1750 devpriv->utcCtrl[0] = (0 << 6) | 0x30;
1751 devpriv->utcCtrl[1] = (1 << 6) | 0x30;
1752 devpriv->utcCtrl[2] = (2 << 6) | 0x30;
1753 devpriv->utcCtrl[3] = (3 << 6) | 0x00;
1754 writeb(devpriv->utcCtrl[0], devpriv->las0 + LAS0_UTC_CTRL);
1755 writeb(devpriv->utcCtrl[1], devpriv->las0 + LAS0_UTC_CTRL);
1756 writeb(devpriv->utcCtrl[2], devpriv->las0 + LAS0_UTC_CTRL);
1757 writeb(devpriv->utcCtrl[3], devpriv->las0 + LAS0_UTC_CTRL);
1758 /* TODO: set user out source ??? */
1759
1760 /* check if our interrupt is available and get it */
1761 ret = request_irq(pcidev->irq, rtd_interrupt,
1762 IRQF_SHARED, DRV_NAME, dev);
1763
1764 if (ret < 0) {
1765 printk("Could not get interrupt! (%u)\n",
1766 pcidev->irq);
1767 return ret;
1768 }
1769 dev->irq = pcidev->irq;
1770 printk(KERN_INFO "( irq=%u )", dev->irq);
1771 1368
1772 ret = rtd520_probe_fifo_depth(dev); 1369 ret = rtd520_probe_fifo_depth(dev);
1773 if (ret < 0) 1370 if (ret < 0)
1774 return ret; 1371 return ret;
1775
1776 devpriv->fifoLen = ret; 1372 devpriv->fifoLen = ret;
1777 printk("( fifoLen=%d )", devpriv->fifoLen);
1778
1779#ifdef USE_DMA
1780 if (dev->irq > 0) {
1781 printk("( DMA buff=%d )\n", DMA_CHAIN_COUNT);
1782 /*
1783 * The PLX9080 has 2 DMA controllers, but there could be
1784 * 4 sources: ADC, digital, DAC1, and DAC2. Since only the
1785 * ADC supports cmd mode right now, this isn't an issue (yet)
1786 */
1787 devpriv->dma0Offset = 0;
1788
1789 for (index = 0; index < DMA_CHAIN_COUNT; index++) {
1790 devpriv->dma0Buff[index] =
1791 pci_alloc_consistent(pcidev,
1792 sizeof(u16) *
1793 devpriv->fifoLen / 2,
1794 &devpriv->
1795 dma0BuffPhysAddr[index]);
1796 if (devpriv->dma0Buff[index] == NULL) {
1797 ret = -ENOMEM;
1798 goto rtd_attach_die_error;
1799 }
1800 /*DPRINTK ("buff[%d] @ %p virtual, %x PCI\n",
1801 index,
1802 devpriv->dma0Buff[index],
1803 devpriv->dma0BuffPhysAddr[index]); */
1804 }
1805
1806 /*
1807 * setup DMA descriptor ring (use cpu_to_le32 for byte
1808 * ordering?)
1809 */
1810 devpriv->dma0Chain =
1811 pci_alloc_consistent(pcidev,
1812 sizeof(struct plx_dma_desc) *
1813 DMA_CHAIN_COUNT,
1814 &devpriv->dma0ChainPhysAddr);
1815 for (index = 0; index < DMA_CHAIN_COUNT; index++) {
1816 devpriv->dma0Chain[index].pci_start_addr =
1817 devpriv->dma0BuffPhysAddr[index];
1818 devpriv->dma0Chain[index].local_start_addr =
1819 DMALADDR_ADC;
1820 devpriv->dma0Chain[index].transfer_size =
1821 sizeof(u16) * devpriv->fifoLen / 2;
1822 devpriv->dma0Chain[index].next =
1823 (devpriv->dma0ChainPhysAddr + ((index +
1824 1) %
1825 (DMA_CHAIN_COUNT))
1826 * sizeof(devpriv->dma0Chain[0]))
1827 | DMA_TRANSFER_BITS;
1828 /*DPRINTK ("ring[%d] @%lx PCI: %x, local: %x, N: 0x%x, next: %x\n",
1829 index,
1830 ((long)devpriv->dma0ChainPhysAddr
1831 + (index * sizeof(devpriv->dma0Chain[0]))),
1832 devpriv->dma0Chain[index].pci_start_addr,
1833 devpriv->dma0Chain[index].local_start_addr,
1834 devpriv->dma0Chain[index].transfer_size,
1835 devpriv->dma0Chain[index].next); */
1836 }
1837
1838 if (devpriv->dma0Chain == NULL) {
1839 ret = -ENOMEM;
1840 goto rtd_attach_die_error;
1841 }
1842
1843 writel(DMA_MODE_BITS, devpriv->lcfg + LCFG_DMAMODE0);
1844 /* set DMA trigger source */
1845 writel(DMAS_ADFIFO_HALF_FULL, devpriv->las0 + LAS0_DMA0_SRC);
1846 } else {
1847 printk(KERN_INFO "( no IRQ->no DMA )");
1848 }
1849#endif /* USE_DMA */
1850 1373
1851 if (dev->irq) 1374 if (dev->irq)
1852 writel(ICS_PIE | ICS_PLIE, devpriv->lcfg + LCFG_ITCSR); 1375 writel(ICS_PIE | ICS_PLIE, devpriv->lcfg + LCFG_ITCSR);
1853 1376
1854 printk("\ncomedi%d: rtd520 driver attached.\n", dev->minor); 1377 dev_info(dev->class_dev, "%s attached\n", dev->board_name);
1855 1378
1856 return 1; 1379 return 0;
1857} 1380}
1858 1381
1859static void rtd_detach(struct comedi_device *dev) 1382static void rtd_detach(struct comedi_device *dev)
1860{ 1383{
1861 struct rtdPrivate *devpriv = dev->private; 1384 struct rtdPrivate *devpriv = dev->private;
1862 struct pci_dev *pcidev = comedi_to_pci_dev(dev); 1385 struct pci_dev *pcidev = comedi_to_pci_dev(dev);
1863#ifdef USE_DMA
1864 int index;
1865#endif
1866 1386
1867 if (devpriv) { 1387 if (devpriv) {
1868 /* Shut down any board ops by resetting it */ 1388 /* Shut down any board ops by resetting it */
1869#ifdef USE_DMA 1389 if (devpriv->las0 && devpriv->lcfg)
1870 if (devpriv->lcfg) { 1390 rtd_reset(dev);
1871 devpriv->dma0Control = 0;
1872 devpriv->dma1Control = 0;
1873 writeb(devpriv->dma0Control,
1874 devpriv->lcfg + LCFG_DMACSR0);
1875 writeb(devpriv->dma1Control,
1876 devpriv->lcfg + LCFG_DMACSR1);
1877 writel(ICS_PIE | ICS_PLIE, devpriv->lcfg + LCFG_ITCSR);
1878 }
1879#endif /* USE_DMA */
1880 if (devpriv->las0) {
1881 writel(0, devpriv->las0 + LAS0_BOARD_RESET);
1882 devpriv->intMask = 0;
1883 writew(devpriv->intMask, devpriv->las0 + LAS0_IT);
1884 devpriv->intClearMask = ~0;
1885 writew(devpriv->intClearMask,
1886 devpriv->las0 + LAS0_CLEAR);
1887 readw(devpriv->las0 + LAS0_CLEAR);
1888 }
1889#ifdef USE_DMA
1890 /* release DMA */
1891 for (index = 0; index < DMA_CHAIN_COUNT; index++) {
1892 if (NULL != devpriv->dma0Buff[index]) {
1893 pci_free_consistent(pcidev,
1894 sizeof(u16) *
1895 devpriv->fifoLen / 2,
1896 devpriv->dma0Buff[index],
1897 devpriv->
1898 dma0BuffPhysAddr[index]);
1899 devpriv->dma0Buff[index] = NULL;
1900 }
1901 }
1902 if (NULL != devpriv->dma0Chain) {
1903 pci_free_consistent(pcidev,
1904 sizeof(struct plx_dma_desc) *
1905 DMA_CHAIN_COUNT, devpriv->dma0Chain,
1906 devpriv->dma0ChainPhysAddr);
1907 devpriv->dma0Chain = NULL;
1908 }
1909#endif /* USE_DMA */
1910 if (dev->irq) { 1391 if (dev->irq) {
1911 writel(readl(devpriv->lcfg + LCFG_ITCSR) & 1392 writel(readl(devpriv->lcfg + LCFG_ITCSR) &
1912 ~(ICS_PLIE | ICS_DMA0_E | ICS_DMA1_E), 1393 ~(ICS_PLIE | ICS_DMA0_E | ICS_DMA1_E),
@@ -1923,24 +1404,23 @@ static void rtd_detach(struct comedi_device *dev)
1923 if (pcidev) { 1404 if (pcidev) {
1924 if (dev->iobase) 1405 if (dev->iobase)
1925 comedi_pci_disable(pcidev); 1406 comedi_pci_disable(pcidev);
1926 pci_dev_put(pcidev);
1927 } 1407 }
1928} 1408}
1929 1409
1930static struct comedi_driver rtd520_driver = { 1410static struct comedi_driver rtd520_driver = {
1931 .driver_name = "rtd520", 1411 .driver_name = "rtd520",
1932 .module = THIS_MODULE, 1412 .module = THIS_MODULE,
1933 .attach = rtd_attach, 1413 .auto_attach = rtd_auto_attach,
1934 .detach = rtd_detach, 1414 .detach = rtd_detach,
1935}; 1415};
1936 1416
1937static int __devinit rtd520_pci_probe(struct pci_dev *dev, 1417static int rtd520_pci_probe(struct pci_dev *dev,
1938 const struct pci_device_id *ent) 1418 const struct pci_device_id *ent)
1939{ 1419{
1940 return comedi_pci_auto_config(dev, &rtd520_driver); 1420 return comedi_pci_auto_config(dev, &rtd520_driver);
1941} 1421}
1942 1422
1943static void __devexit rtd520_pci_remove(struct pci_dev *dev) 1423static void rtd520_pci_remove(struct pci_dev *dev)
1944{ 1424{
1945 comedi_pci_auto_unconfig(dev); 1425 comedi_pci_auto_unconfig(dev);
1946} 1426}
@@ -1956,7 +1436,7 @@ static struct pci_driver rtd520_pci_driver = {
1956 .name = "rtd520", 1436 .name = "rtd520",
1957 .id_table = rtd520_pci_table, 1437 .id_table = rtd520_pci_table,
1958 .probe = rtd520_pci_probe, 1438 .probe = rtd520_pci_probe,
1959 .remove = __devexit_p(rtd520_pci_remove), 1439 .remove = rtd520_pci_remove,
1960}; 1440};
1961module_comedi_pci_driver(rtd520_driver, rtd520_pci_driver); 1441module_comedi_pci_driver(rtd520_driver, rtd520_pci_driver);
1962 1442
diff --git a/drivers/staging/comedi/drivers/rtd520.h b/drivers/staging/comedi/drivers/rtd520.h
index a3ec2599c4b8..25188a581455 100644
--- a/drivers/staging/comedi/drivers/rtd520.h
+++ b/drivers/staging/comedi/drivers/rtd520.h
@@ -26,163 +26,132 @@
26*/ 26*/
27 27
28/* 28/*
29 LAS0 Runtime Area 29 * Local Address Space 0 Offsets
30 Local Address Space 0 Offset Read Function Write Function 30 */
31*/ 31#define LAS0_USER_IO 0x0008 /* User I/O */
32#define LAS0_SPARE_00 0x0000 /* - - */ 32#define LAS0_ADC 0x0010 /* FIFO Status/Software A/D Start */
33#define LAS0_SPARE_04 0x0004 /* - - */ 33#define LAS0_DAC1 0x0014 /* Software D/A1 Update (w) */
34#define LAS0_USER_IO 0x0008 /* Read User Inputs Write User Outputs */ 34#define LAS0_DAC2 0x0018 /* Software D/A2 Update (w) */
35#define LAS0_SPARE_0C 0x000C /* - - */ 35#define LAS0_DAC 0x0024 /* Software Simultaneous Update (w) */
36#define LAS0_ADC 0x0010 /* Read FIFO Status Software A/D Start */ 36#define LAS0_PACER 0x0028 /* Software Pacer Start/Stop */
37#define LAS0_DAC1 0x0014 /* - Software D/A1 Update */ 37#define LAS0_TIMER 0x002c /* Timer Status/HDIN Software Trig. */
38#define LAS0_DAC2 0x0018 /* - Software D/A2 Update */ 38#define LAS0_IT 0x0030 /* Interrupt Status/Enable */
39#define LAS0_SPARE_1C 0x001C /* - - */ 39#define LAS0_CLEAR 0x0034 /* Clear/Set Interrupt Clear Mask */
40#define LAS0_SPARE_20 0x0020 /* - - */ 40#define LAS0_OVERRUN 0x0038 /* Pending interrupts/Clear Overrun */
41#define LAS0_DAC 0x0024 /* - Software Simultaneous D/A1 and D/A2 Update */ 41#define LAS0_PCLK 0x0040 /* Pacer Clock (24bit) */
42#define LAS0_PACER 0x0028 /* Software Pacer Start Software Pacer Stop */ 42#define LAS0_BCLK 0x0044 /* Burst Clock (10bit) */
43#define LAS0_TIMER 0x002C /* Read Timer Counters Status HDIN Software Trigger */ 43#define LAS0_ADC_SCNT 0x0048 /* A/D Sample counter (10bit) */
44#define LAS0_IT 0x0030 /* Read Interrupt Status Write Interrupt Enable Mask Register */ 44#define LAS0_DAC1_UCNT 0x004c /* D/A1 Update counter (10 bit) */
45#define LAS0_CLEAR 0x0034 /* Clear ITs set by Clear Mask Set Interrupt Clear Mask */ 45#define LAS0_DAC2_UCNT 0x0050 /* D/A2 Update counter (10 bit) */
46#define LAS0_OVERRUN 0x0038 /* Read pending interrupts Clear Overrun Register */ 46#define LAS0_DCNT 0x0054 /* Delay counter (16 bit) */
47#define LAS0_SPARE_3C 0x003C /* - - */ 47#define LAS0_ACNT 0x0058 /* About counter (16 bit) */
48#define LAS0_DAC_CLK 0x005c /* DAC clock (16bit) */
49#define LAS0_UTC0 0x0060 /* 8254 TC Counter 0 */
50#define LAS0_UTC1 0x0064 /* 8254 TC Counter 1 */
51#define LAS0_UTC2 0x0068 /* 8254 TC Counter 2 */
52#define LAS0_UTC_CTRL 0x006c /* 8254 TC Control */
53#define LAS0_DIO0 0x0070 /* Digital I/O Port 0 */
54#define LAS0_DIO1 0x0074 /* Digital I/O Port 1 */
55#define LAS0_DIO0_CTRL 0x0078 /* Digital I/O Control */
56#define LAS0_DIO_STATUS 0x007c /* Digital I/O Status */
57#define LAS0_BOARD_RESET 0x0100 /* Board reset */
58#define LAS0_DMA0_SRC 0x0104 /* DMA 0 Sources select */
59#define LAS0_DMA1_SRC 0x0108 /* DMA 1 Sources select */
60#define LAS0_ADC_CONVERSION 0x010c /* A/D Conversion Signal select */
61#define LAS0_BURST_START 0x0110 /* Burst Clock Start Trigger select */
62#define LAS0_PACER_START 0x0114 /* Pacer Clock Start Trigger select */
63#define LAS0_PACER_STOP 0x0118 /* Pacer Clock Stop Trigger select */
64#define LAS0_ACNT_STOP_ENABLE 0x011c /* About Counter Stop Enable */
65#define LAS0_PACER_REPEAT 0x0120 /* Pacer Start Trigger Mode select */
66#define LAS0_DIN_START 0x0124 /* HiSpd DI Sampling Signal select */
67#define LAS0_DIN_FIFO_CLEAR 0x0128 /* Digital Input FIFO Clear */
68#define LAS0_ADC_FIFO_CLEAR 0x012c /* A/D FIFO Clear */
69#define LAS0_CGT_WRITE 0x0130 /* Channel Gain Table Write */
70#define LAS0_CGL_WRITE 0x0134 /* Channel Gain Latch Write */
71#define LAS0_CG_DATA 0x0138 /* Digital Table Write */
72#define LAS0_CGT_ENABLE 0x013c /* Channel Gain Table Enable */
73#define LAS0_CG_ENABLE 0x0140 /* Digital Table Enable */
74#define LAS0_CGT_PAUSE 0x0144 /* Table Pause Enable */
75#define LAS0_CGT_RESET 0x0148 /* Reset Channel Gain Table */
76#define LAS0_CGT_CLEAR 0x014c /* Clear Channel Gain Table */
77#define LAS0_DAC1_CTRL 0x0150 /* D/A1 output type/range */
78#define LAS0_DAC1_SRC 0x0154 /* D/A1 update source */
79#define LAS0_DAC1_CYCLE 0x0158 /* D/A1 cycle mode */
80#define LAS0_DAC1_RESET 0x015c /* D/A1 FIFO reset */
81#define LAS0_DAC1_FIFO_CLEAR 0x0160 /* D/A1 FIFO clear */
82#define LAS0_DAC2_CTRL 0x0164 /* D/A2 output type/range */
83#define LAS0_DAC2_SRC 0x0168 /* D/A2 update source */
84#define LAS0_DAC2_CYCLE 0x016c /* D/A2 cycle mode */
85#define LAS0_DAC2_RESET 0x0170 /* D/A2 FIFO reset */
86#define LAS0_DAC2_FIFO_CLEAR 0x0174 /* D/A2 FIFO clear */
87#define LAS0_ADC_SCNT_SRC 0x0178 /* A/D Sample Counter Source select */
88#define LAS0_PACER_SELECT 0x0180 /* Pacer Clock select */
89#define LAS0_SBUS0_SRC 0x0184 /* SyncBus 0 Source select */
90#define LAS0_SBUS0_ENABLE 0x0188 /* SyncBus 0 enable */
91#define LAS0_SBUS1_SRC 0x018c /* SyncBus 1 Source select */
92#define LAS0_SBUS1_ENABLE 0x0190 /* SyncBus 1 enable */
93#define LAS0_SBUS2_SRC 0x0198 /* SyncBus 2 Source select */
94#define LAS0_SBUS2_ENABLE 0x019c /* SyncBus 2 enable */
95#define LAS0_ETRG_POLARITY 0x01a4 /* Ext. Trigger polarity select */
96#define LAS0_EINT_POLARITY 0x01a8 /* Ext. Interrupt polarity select */
97#define LAS0_UTC0_CLOCK 0x01ac /* UTC0 Clock select */
98#define LAS0_UTC0_GATE 0x01b0 /* UTC0 Gate select */
99#define LAS0_UTC1_CLOCK 0x01b4 /* UTC1 Clock select */
100#define LAS0_UTC1_GATE 0x01b8 /* UTC1 Gate select */
101#define LAS0_UTC2_CLOCK 0x01bc /* UTC2 Clock select */
102#define LAS0_UTC2_GATE 0x01c0 /* UTC2 Gate select */
103#define LAS0_UOUT0_SELECT 0x01c4 /* User Output 0 source select */
104#define LAS0_UOUT1_SELECT 0x01c8 /* User Output 1 source select */
105#define LAS0_DMA0_RESET 0x01cc /* DMA0 Request state machine reset */
106#define LAS0_DMA1_RESET 0x01d0 /* DMA1 Request state machine reset */
48 107
49/* 108/*
50 LAS0 Runtime Area Timer/Counter,Dig.IO 109 * Local Address Space 1 Offsets
51 Name Local Address Function 110 */
52*/ 111#define LAS1_ADC_FIFO 0x0000 /* A/D FIFO (16bit) */
53#define LAS0_PCLK 0x0040 /* Pacer Clock value (24bit) Pacer Clock load (24bit) */ 112#define LAS1_HDIO_FIFO 0x0004 /* HiSpd DI FIFO (16bit) */
54#define LAS0_BCLK 0x0044 /* Burst Clock value (10bit) Burst Clock load (10bit) */ 113#define LAS1_DAC1_FIFO 0x0008 /* D/A1 FIFO (16bit) */
55#define LAS0_ADC_SCNT 0x0048 /* A/D Sample counter value (10bit) A/D Sample counter load (10bit) */ 114#define LAS1_DAC2_FIFO 0x000c /* D/A2 FIFO (16bit) */
56#define LAS0_DAC1_UCNT 0x004C /* D/A1 Update counter value (10 bit) D/A1 Update counter load (10bit) */
57#define LAS0_DAC2_UCNT 0x0050 /* D/A2 Update counter value (10 bit) D/A2 Update counter load (10bit) */
58#define LAS0_DCNT 0x0054 /* Delay counter value (16 bit) Delay counter load (16bit) */
59#define LAS0_ACNT 0x0058 /* About counter value (16 bit) About counter load (16bit) */
60#define LAS0_DAC_CLK 0x005C /* DAC clock value (16bit) DAC clock load (16bit) */
61#define LAS0_UTC0 0x0060 /* 8254 TC Counter 0 User TC 0 value Load count in TC Counter 0 */
62#define LAS0_UTC1 0x0064 /* 8254 TC Counter 1 User TC 1 value Load count in TC Counter 1 */
63#define LAS0_UTC2 0x0068 /* 8254 TC Counter 2 User TC 2 value Load count in TC Counter 2 */
64#define LAS0_UTC_CTRL 0x006C /* 8254 TC Control Word Program counter mode for TC */
65#define LAS0_DIO0 0x0070 /* Digital I/O Port 0 Read Port Digital I/O Port 0 Write Port */
66#define LAS0_DIO1 0x0074 /* Digital I/O Port 1 Read Port Digital I/O Port 1 Write Port */
67#define LAS0_DIO0_CTRL 0x0078 /* Clear digital IRQ status flag/read Clear digital chip/program Port 0 */
68#define LAS0_DIO_STATUS 0x007C /* Read Digital I/O Status word Program digital control register & */
69
70/*
71 LAS0 Setup Area
72 Name Local Address Function
73*/
74#define LAS0_BOARD_RESET 0x0100 /* Board reset */
75#define LAS0_DMA0_SRC 0x0104 /* DMA 0 Sources select */
76#define LAS0_DMA1_SRC 0x0108 /* DMA 1 Sources select */
77#define LAS0_ADC_CONVERSION 0x010C /* A/D Conversion Signal select */
78#define LAS0_BURST_START 0x0110 /* Burst Clock Start Trigger select */
79#define LAS0_PACER_START 0x0114 /* Pacer Clock Start Trigger select */
80#define LAS0_PACER_STOP 0x0118 /* Pacer Clock Stop Trigger select */
81#define LAS0_ACNT_STOP_ENABLE 0x011C /* About Counter Stop Enable */
82#define LAS0_PACER_REPEAT 0x0120 /* Pacer Start Trigger Mode select */
83#define LAS0_DIN_START 0x0124 /* High Speed Digital Input Sampling Signal select */
84#define LAS0_DIN_FIFO_CLEAR 0x0128 /* Digital Input FIFO Clear */
85#define LAS0_ADC_FIFO_CLEAR 0x012C /* A/D FIFO Clear */
86#define LAS0_CGT_WRITE 0x0130 /* Channel Gain Table Write */
87#define LAS0_CGL_WRITE 0x0134 /* Channel Gain Latch Write */
88#define LAS0_CG_DATA 0x0138 /* Digital Table Write */
89#define LAS0_CGT_ENABLE 0x013C /* Channel Gain Table Enable */
90#define LAS0_CG_ENABLE 0x0140 /* Digital Table Enable */
91#define LAS0_CGT_PAUSE 0x0144 /* Table Pause Enable */
92#define LAS0_CGT_RESET 0x0148 /* Reset Channel Gain Table */
93#define LAS0_CGT_CLEAR 0x014C /* Clear Channel Gain Table */
94#define LAS0_DAC1_CTRL 0x0150 /* D/A1 output type/range */
95#define LAS0_DAC1_SRC 0x0154 /* D/A1 update source */
96#define LAS0_DAC1_CYCLE 0x0158 /* D/A1 cycle mode */
97#define LAS0_DAC1_RESET 0x015C /* D/A1 FIFO reset */
98#define LAS0_DAC1_FIFO_CLEAR 0x0160 /* D/A1 FIFO clear */
99#define LAS0_DAC2_CTRL 0x0164 /* D/A2 output type/range */
100#define LAS0_DAC2_SRC 0x0168 /* D/A2 update source */
101#define LAS0_DAC2_CYCLE 0x016C /* D/A2 cycle mode */
102#define LAS0_DAC2_RESET 0x0170 /* D/A2 FIFO reset */
103#define LAS0_DAC2_FIFO_CLEAR 0x0174 /* D/A2 FIFO clear */
104#define LAS0_ADC_SCNT_SRC 0x0178 /* A/D Sample Counter Source select */
105#define LAS0_PACER_SELECT 0x0180 /* Pacer Clock select */
106#define LAS0_SBUS0_SRC 0x0184 /* SyncBus 0 Source select */
107#define LAS0_SBUS0_ENABLE 0x0188 /* SyncBus 0 enable */
108#define LAS0_SBUS1_SRC 0x018C /* SyncBus 1 Source select */
109#define LAS0_SBUS1_ENABLE 0x0190 /* SyncBus 1 enable */
110#define LAS0_SBUS2_SRC 0x0198 /* SyncBus 2 Source select */
111#define LAS0_SBUS2_ENABLE 0x019C /* SyncBus 2 enable */
112#define LAS0_ETRG_POLARITY 0x01A4 /* External Trigger polarity select */
113#define LAS0_EINT_POLARITY 0x01A8 /* External Interrupt polarity select */
114#define LAS0_UTC0_CLOCK 0x01AC /* UTC0 Clock select */
115#define LAS0_UTC0_GATE 0x01B0 /* UTC0 Gate select */
116#define LAS0_UTC1_CLOCK 0x01B4 /* UTC1 Clock select */
117#define LAS0_UTC1_GATE 0x01B8 /* UTC1 Gate select */
118#define LAS0_UTC2_CLOCK 0x01BC /* UTC2 Clock select */
119#define LAS0_UTC2_GATE 0x01C0 /* UTC2 Gate select */
120#define LAS0_UOUT0_SELECT 0x01C4 /* User Output 0 source select */
121#define LAS0_UOUT1_SELECT 0x01C8 /* User Output 1 source select */
122#define LAS0_DMA0_RESET 0x01CC /* DMA0 Request state machine reset */
123#define LAS0_DMA1_RESET 0x01D0 /* DMA1 Request state machine reset */
124 115
125/* 116/*
126 LAS1 117 * PLX 9080 local config & runtime registers
127 Name Local Address Function 118 */
128*/ 119#define LCFG_ITCSR 0x0068 /* Interrupt Control/Status */
129#define LAS1_ADC_FIFO 0x0000 /* Read A/D FIFO (16bit) - */ 120#define LCFG_DMAMODE0 0x0080 /* DMA0 Mode */
130#define LAS1_HDIO_FIFO 0x0004 /* Read High Speed Digital Input FIFO (16bit) - */ 121#define LCFG_DMAPADR0 0x0084 /* DMA0 PCI Address */
131#define LAS1_DAC1_FIFO 0x0008 /* - Write D/A1 FIFO (16bit) */ 122#define LCFG_DMALADR0 0x0088 /* DMA0 Local Address */
132#define LAS1_DAC2_FIFO 0x000C /* - Write D/A2 FIFO (16bit) */ 123#define LCFG_DMASIZ0 0x008c /* DMA0 Transfer Size (Bytes) */
133 124#define LCFG_DMADPR0 0x0090 /* DMA0 Descriptor Pointer */
134/* 125#define LCFG_DMAMODE1 0x0094 /* DMA1 Mode */
135 LCFG: PLX 9080 local config & runtime registers 126#define LCFG_DMAPADR1 0x0098 /* DMA1 PCI Address */
136 Name Local Address Function 127#define LCFG_DMALADR1 0x009c /* DMA1 Local Address */
137*/ 128#define LCFG_DMASIZ1 0x00a0 /* DMA1 Transfer Size (Bytes) */
138#define LCFG_ITCSR 0x0068 /* INTCSR, Interrupt Control/Status Register */ 129#define LCFG_DMADPR1 0x00a4 /* DMA1 Descriptor Pointer */
139#define LCFG_DMAMODE0 0x0080 /* DMA Channel 0 Mode Register */ 130#define LCFG_DMACSR0 0x00a8 /* DMA0 Command/Status */
140#define LCFG_DMAPADR0 0x0084 /* DMA Channel 0 PCI Address Register */ 131#define LCFG_DMACSR1 0x00a9 /* DMA0 Command/Status */
141#define LCFG_DMALADR0 0x0088 /* DMA Channel 0 Local Address Reg */ 132#define LCFG_DMAARB 0x00ac /* DMA Arbitration */
142#define LCFG_DMASIZ0 0x008C /* DMA Channel 0 Transfer Size (Bytes) Register */ 133#define LCFG_DMATHR 0x00b0 /* DMA Threshold */
143#define LCFG_DMADPR0 0x0090 /* DMA Channel 0 Descriptor Pointer Register */
144#define LCFG_DMAMODE1 0x0094 /* DMA Channel 1 Mode Register */
145#define LCFG_DMAPADR1 0x0098 /* DMA Channel 1 PCI Address Register */
146#define LCFG_DMALADR1 0x009C /* DMA Channel 1 Local Address Register */
147#define LCFG_DMASIZ1 0x00A0 /* DMA Channel 1 Transfer Size (Bytes) Register */
148#define LCFG_DMADPR1 0x00A4 /* DMA Channel 1 Descriptor Pointer Register */
149#define LCFG_DMACSR0 0x00A8 /* DMA Channel 0 Command/Status Register */
150#define LCFG_DMACSR1 0x00A9 /* DMA Channel 0 Command/Status Register */
151#define LCFG_DMAARB 0x00AC /* DMA Arbitration Register */
152#define LCFG_DMATHR 0x00B0 /* DMA Threshold Register */
153
154/*======================================================================
155 Resister bit definitions
156======================================================================*/
157 134
158/* FIFO Status Word Bits (RtdFifoStatus) */ 135/* FIFO Status Word Bits (RtdFifoStatus) */
159#define FS_DAC1_NOT_EMPTY 0x0001 /* D0 - DAC1 FIFO not empty */ 136#define FS_DAC1_NOT_EMPTY (1 << 0) /* DAC1 FIFO not empty */
160#define FS_DAC1_HEMPTY 0x0002 /* D1 - DAC1 FIFO half empty */ 137#define FS_DAC1_HEMPTY (1 << 1) /* DAC1 FIFO half empty */
161#define FS_DAC1_NOT_FULL 0x0004 /* D2 - DAC1 FIFO not full */ 138#define FS_DAC1_NOT_FULL (1 << 2) /* DAC1 FIFO not full */
162#define FS_DAC2_NOT_EMPTY 0x0010 /* D4 - DAC2 FIFO not empty */ 139#define FS_DAC2_NOT_EMPTY (1 << 4) /* DAC2 FIFO not empty */
163#define FS_DAC2_HEMPTY 0x0020 /* D5 - DAC2 FIFO half empty */ 140#define FS_DAC2_HEMPTY (1 << 5) /* DAC2 FIFO half empty */
164#define FS_DAC2_NOT_FULL 0x0040 /* D6 - DAC2 FIFO not full */ 141#define FS_DAC2_NOT_FULL (1 << 6) /* DAC2 FIFO not full */
165#define FS_ADC_NOT_EMPTY 0x0100 /* D8 - ADC FIFO not empty */ 142#define FS_ADC_NOT_EMPTY (1 << 8) /* ADC FIFO not empty */
166#define FS_ADC_HEMPTY 0x0200 /* D9 - ADC FIFO half empty */ 143#define FS_ADC_HEMPTY (1 << 9) /* ADC FIFO half empty */
167#define FS_ADC_NOT_FULL 0x0400 /* D10 - ADC FIFO not full */ 144#define FS_ADC_NOT_FULL (1 << 10) /* ADC FIFO not full */
168#define FS_DIN_NOT_EMPTY 0x1000 /* D12 - DIN FIFO not empty */ 145#define FS_DIN_NOT_EMPTY (1 << 12) /* DIN FIFO not empty */
169#define FS_DIN_HEMPTY 0x2000 /* D13 - DIN FIFO half empty */ 146#define FS_DIN_HEMPTY (1 << 13) /* DIN FIFO half empty */
170#define FS_DIN_NOT_FULL 0x4000 /* D14 - DIN FIFO not full */ 147#define FS_DIN_NOT_FULL (1 << 14) /* DIN FIFO not full */
171 148
172/* Timer Status Word Bits (GetTimerStatus) */ 149/* Timer Status Word Bits (GetTimerStatus) */
173#define TS_PCLK_GATE 0x0001 150#define TS_PCLK_GATE (1 << 0) /* Pacer Clock Gate enabled */
174/* D0 - Pacer Clock Gate [0 - gated, 1 - enabled] */ 151#define TS_BCLK_GATE (1 << 1) /* Burst Clock Gate running */
175#define TS_BCLK_GATE 0x0002 152#define TS_DCNT_GATE (1 << 2) /* Pacer Clock Delayed Start Trig. */
176/* D1 - Burst Clock Gate [0 - disabled, 1 - running] */ 153#define TS_ACNT_GATE (1 << 3) /* Pacer Clock About Trig. */
177#define TS_DCNT_GATE 0x0004 154#define TS_PCLK_RUN (1 << 4) /* Pacer Clock Shutdown Flag */
178/* D2 - Pacer Clock Delayed Start Trigger [0 - delay over, 1 - delay in */
179/* progress] */
180#define TS_ACNT_GATE 0x0008
181/* D3 - Pacer Clock About Trigger [0 - completed, 1 - in progress] */
182#define TS_PCLK_RUN 0x0010
183/* D4 - Pacer Clock Shutdown Flag [0 - Pacer Clock cannot be start */
184/* triggered only by Software Pacer Start Command, 1 - Pacer Clock can */
185/* be start triggered] */
186 155
187/* External Trigger polarity select */ 156/* External Trigger polarity select */
188/* External Interrupt polarity select */ 157/* External Interrupt polarity select */
diff --git a/drivers/staging/comedi/drivers/rti800.c b/drivers/staging/comedi/drivers/rti800.c
index 137885b1681a..7e577e444909 100644
--- a/drivers/staging/comedi/drivers/rti800.c
+++ b/drivers/staging/comedi/drivers/rti800.c
@@ -161,8 +161,6 @@ struct rti800_private {
161 int muxgain_bits; 161 int muxgain_bits;
162}; 162};
163 163
164#define devpriv ((struct rti800_private *)dev->private)
165
166#define RTI800_TIMEOUT 100 164#define RTI800_TIMEOUT 100
167 165
168static irqreturn_t rti800_interrupt(int irq, void *dev) 166static irqreturn_t rti800_interrupt(int irq, void *dev)
@@ -177,6 +175,7 @@ static int rti800_ai_insn_read(struct comedi_device *dev,
177 struct comedi_subdevice *s, 175 struct comedi_subdevice *s,
178 struct comedi_insn *insn, unsigned int *data) 176 struct comedi_insn *insn, unsigned int *data)
179{ 177{
178 struct rti800_private *devpriv = dev->private;
180 int i, t; 179 int i, t;
181 int status; 180 int status;
182 int chan = CR_CHAN(insn->chanspec); 181 int chan = CR_CHAN(insn->chanspec);
@@ -229,6 +228,7 @@ static int rti800_ao_insn_read(struct comedi_device *dev,
229 struct comedi_subdevice *s, 228 struct comedi_subdevice *s,
230 struct comedi_insn *insn, unsigned int *data) 229 struct comedi_insn *insn, unsigned int *data)
231{ 230{
231 struct rti800_private *devpriv = dev->private;
232 int i; 232 int i;
233 int chan = CR_CHAN(insn->chanspec); 233 int chan = CR_CHAN(insn->chanspec);
234 234
@@ -242,6 +242,7 @@ static int rti800_ao_insn_write(struct comedi_device *dev,
242 struct comedi_subdevice *s, 242 struct comedi_subdevice *s,
243 struct comedi_insn *insn, unsigned int *data) 243 struct comedi_insn *insn, unsigned int *data)
244{ 244{
245 struct rti800_private *devpriv = dev->private;
245 int chan = CR_CHAN(insn->chanspec); 246 int chan = CR_CHAN(insn->chanspec);
246 int d; 247 int d;
247 int i; 248 int i;
@@ -303,6 +304,7 @@ static int rti800_do_insn_bits(struct comedi_device *dev,
303static int rti800_attach(struct comedi_device *dev, struct comedi_devconfig *it) 304static int rti800_attach(struct comedi_device *dev, struct comedi_devconfig *it)
304{ 305{
305 const struct rti800_board *board = comedi_board(dev); 306 const struct rti800_board *board = comedi_board(dev);
307 struct rti800_private *devpriv;
306 unsigned int irq; 308 unsigned int irq;
307 unsigned long iobase; 309 unsigned long iobase;
308 int ret; 310 int ret;
@@ -347,9 +349,10 @@ static int rti800_attach(struct comedi_device *dev, struct comedi_devconfig *it)
347 if (ret) 349 if (ret)
348 return ret; 350 return ret;
349 351
350 ret = alloc_private(dev, sizeof(struct rti800_private)); 352 devpriv = kzalloc(sizeof(*devpriv), GFP_KERNEL);
351 if (ret < 0) 353 if (!devpriv)
352 return ret; 354 return -ENOMEM;
355 dev->private = devpriv;
353 356
354 devpriv->adc_mux = it->options[2]; 357 devpriv->adc_mux = it->options[2];
355 devpriv->adc_range = it->options[3]; 358 devpriv->adc_range = it->options[3];
diff --git a/drivers/staging/comedi/drivers/rti802.c b/drivers/staging/comedi/drivers/rti802.c
index 3f9d0278be50..2185ca1bcf02 100644
--- a/drivers/staging/comedi/drivers/rti802.c
+++ b/drivers/staging/comedi/drivers/rti802.c
@@ -55,12 +55,11 @@ struct rti802_private {
55 unsigned int ao_readback[8]; 55 unsigned int ao_readback[8];
56}; 56};
57 57
58#define devpriv ((struct rti802_private *)dev->private)
59
60static int rti802_ao_insn_read(struct comedi_device *dev, 58static int rti802_ao_insn_read(struct comedi_device *dev,
61 struct comedi_subdevice *s, 59 struct comedi_subdevice *s,
62 struct comedi_insn *insn, unsigned int *data) 60 struct comedi_insn *insn, unsigned int *data)
63{ 61{
62 struct rti802_private *devpriv = dev->private;
64 int i; 63 int i;
65 64
66 for (i = 0; i < insn->n; i++) 65 for (i = 0; i < insn->n; i++)
@@ -73,6 +72,7 @@ static int rti802_ao_insn_write(struct comedi_device *dev,
73 struct comedi_subdevice *s, 72 struct comedi_subdevice *s,
74 struct comedi_insn *insn, unsigned int *data) 73 struct comedi_insn *insn, unsigned int *data)
75{ 74{
75 struct rti802_private *devpriv = dev->private;
76 int i, d; 76 int i, d;
77 int chan = CR_CHAN(insn->chanspec); 77 int chan = CR_CHAN(insn->chanspec);
78 78
@@ -89,6 +89,7 @@ static int rti802_ao_insn_write(struct comedi_device *dev,
89 89
90static int rti802_attach(struct comedi_device *dev, struct comedi_devconfig *it) 90static int rti802_attach(struct comedi_device *dev, struct comedi_devconfig *it)
91{ 91{
92 struct rti802_private *devpriv;
92 struct comedi_subdevice *s; 93 struct comedi_subdevice *s;
93 int i; 94 int i;
94 unsigned long iobase; 95 unsigned long iobase;
@@ -104,8 +105,10 @@ static int rti802_attach(struct comedi_device *dev, struct comedi_devconfig *it)
104 105
105 dev->board_name = "rti802"; 106 dev->board_name = "rti802";
106 107
107 if (alloc_private(dev, sizeof(struct rti802_private))) 108 devpriv = kzalloc(sizeof(*devpriv), GFP_KERNEL);
109 if (!devpriv)
108 return -ENOMEM; 110 return -ENOMEM;
111 dev->private = devpriv;
109 112
110 ret = comedi_alloc_subdevices(dev, 1); 113 ret = comedi_alloc_subdevices(dev, 1);
111 if (ret) 114 if (ret)
diff --git a/drivers/staging/comedi/drivers/s526.c b/drivers/staging/comedi/drivers/s526.c
index a1e256293bd6..39232b359453 100644
--- a/drivers/staging/comedi/drivers/s526.c
+++ b/drivers/staging/comedi/drivers/s526.c
@@ -564,10 +564,10 @@ static int s526_attach(struct comedi_device *dev, struct comedi_devconfig *it)
564 } 564 }
565 dev->iobase = iobase; 565 dev->iobase = iobase;
566 566
567 ret = alloc_private(dev, sizeof(*devpriv)); 567 devpriv = kzalloc(sizeof(*devpriv), GFP_KERNEL);
568 if (ret) 568 if (!devpriv)
569 return ret; 569 return -ENOMEM;
570 devpriv = dev->private; 570 dev->private = devpriv;
571 571
572 ret = comedi_alloc_subdevices(dev, 4); 572 ret = comedi_alloc_subdevices(dev, 4);
573 if (ret) 573 if (ret)
diff --git a/drivers/staging/comedi/drivers/s626.c b/drivers/staging/comedi/drivers/s626.c
index 551d68b7837c..6dc1d2812865 100644
--- a/drivers/staging/comedi/drivers/s626.c
+++ b/drivers/staging/comedi/drivers/s626.c
@@ -161,7 +161,6 @@ static struct dio_private *dio_private_word[]={
161}; 161};
162*/ 162*/
163 163
164#define devpriv ((struct s626_private *)dev->private)
165#define diopriv ((struct dio_private *)s->private) 164#define diopriv ((struct dio_private *)s->private)
166 165
167/* COUNTER OBJECT ------------------------------------------------ */ 166/* COUNTER OBJECT ------------------------------------------------ */
@@ -232,6 +231,8 @@ static const struct comedi_lrange s626_range_table = { 2, {
232/* critical section. */ 231/* critical section. */
233static void DEBItransfer(struct comedi_device *dev) 232static void DEBItransfer(struct comedi_device *dev)
234{ 233{
234 struct s626_private *devpriv = dev->private;
235
235 /* Initiate upload of shadow RAM to DEBI control register. */ 236 /* Initiate upload of shadow RAM to DEBI control register. */
236 MC_ENABLE(P_MC2, MC2_UPLD_DEBI); 237 MC_ENABLE(P_MC2, MC2_UPLD_DEBI);
237 238
@@ -249,6 +250,7 @@ static void DEBItransfer(struct comedi_device *dev)
249 250
250static uint16_t DEBIread(struct comedi_device *dev, uint16_t addr) 251static uint16_t DEBIread(struct comedi_device *dev, uint16_t addr)
251{ 252{
253 struct s626_private *devpriv = dev->private;
252 uint16_t retval; 254 uint16_t retval;
253 255
254 /* Set up DEBI control register value in shadow RAM. */ 256 /* Set up DEBI control register value in shadow RAM. */
@@ -267,6 +269,7 @@ static uint16_t DEBIread(struct comedi_device *dev, uint16_t addr)
267/* Write a value to a gate array register. */ 269/* Write a value to a gate array register. */
268static void DEBIwrite(struct comedi_device *dev, uint16_t addr, uint16_t wdata) 270static void DEBIwrite(struct comedi_device *dev, uint16_t addr, uint16_t wdata)
269{ 271{
272 struct s626_private *devpriv = dev->private;
270 273
271 /* Set up DEBI control register value in shadow RAM. */ 274 /* Set up DEBI control register value in shadow RAM. */
272 WR7146(P_DEBICMD, DEBI_CMD_WRWORD | addr); 275 WR7146(P_DEBICMD, DEBI_CMD_WRWORD | addr);
@@ -283,6 +286,7 @@ static void DEBIwrite(struct comedi_device *dev, uint16_t addr, uint16_t wdata)
283static void DEBIreplace(struct comedi_device *dev, uint16_t addr, uint16_t mask, 286static void DEBIreplace(struct comedi_device *dev, uint16_t addr, uint16_t mask,
284 uint16_t wdata) 287 uint16_t wdata)
285{ 288{
289 struct s626_private *devpriv = dev->private;
286 290
287 /* Copy target gate array register into P_DEBIAD register. */ 291 /* Copy target gate array register into P_DEBIAD register. */
288 WR7146(P_DEBICMD, DEBI_CMD_RDWORD | addr); 292 WR7146(P_DEBICMD, DEBI_CMD_RDWORD | addr);
@@ -302,6 +306,8 @@ static void DEBIreplace(struct comedi_device *dev, uint16_t addr, uint16_t mask,
302 306
303static uint32_t I2Chandshake(struct comedi_device *dev, uint32_t val) 307static uint32_t I2Chandshake(struct comedi_device *dev, uint32_t val)
304{ 308{
309 struct s626_private *devpriv = dev->private;
310
305 /* Write I2C command to I2C Transfer Control shadow register. */ 311 /* Write I2C command to I2C Transfer Control shadow register. */
306 WR7146(P_I2CCTRL, val); 312 WR7146(P_I2CCTRL, val);
307 313
@@ -324,6 +330,7 @@ static uint32_t I2Chandshake(struct comedi_device *dev, uint32_t val)
324/* Read uint8_t from EEPROM. */ 330/* Read uint8_t from EEPROM. */
325static uint8_t I2Cread(struct comedi_device *dev, uint8_t addr) 331static uint8_t I2Cread(struct comedi_device *dev, uint8_t addr)
326{ 332{
333 struct s626_private *devpriv = dev->private;
327 uint8_t rtnval; 334 uint8_t rtnval;
328 335
329 /* Send EEPROM target address. */ 336 /* Send EEPROM target address. */
@@ -375,6 +382,7 @@ static uint8_t trimadrs[] = { 0x40, 0x41, 0x42, 0x50, 0x51, 0x52, 0x53, 0x60, 0x
375 */ 382 */
376static void SendDAC(struct comedi_device *dev, uint32_t val) 383static void SendDAC(struct comedi_device *dev, uint32_t val)
377{ 384{
385 struct s626_private *devpriv = dev->private;
378 386
379 /* START THE SERIAL CLOCK RUNNING ------------- */ 387 /* START THE SERIAL CLOCK RUNNING ------------- */
380 388
@@ -496,6 +504,7 @@ static void SendDAC(struct comedi_device *dev, uint32_t val)
496/* Private helper function: Write setpoint to an application DAC channel. */ 504/* Private helper function: Write setpoint to an application DAC channel. */
497static void SetDAC(struct comedi_device *dev, uint16_t chan, short dacdata) 505static void SetDAC(struct comedi_device *dev, uint16_t chan, short dacdata)
498{ 506{
507 struct s626_private *devpriv = dev->private;
499 register uint16_t signmask; 508 register uint16_t signmask;
500 register uint32_t WSImage; 509 register uint32_t WSImage;
501 510
@@ -553,6 +562,7 @@ static void SetDAC(struct comedi_device *dev, uint16_t chan, short dacdata)
553static void WriteTrimDAC(struct comedi_device *dev, uint8_t LogicalChan, 562static void WriteTrimDAC(struct comedi_device *dev, uint8_t LogicalChan,
554 uint8_t DacData) 563 uint8_t DacData)
555{ 564{
565 struct s626_private *devpriv = dev->private;
556 uint32_t chan; 566 uint32_t chan;
557 567
558 /* Save the new setpoint in case the application needs to read it back later. */ 568 /* Save the new setpoint in case the application needs to read it back later. */
@@ -735,6 +745,7 @@ static int s626_dio_clear_irq(struct comedi_device *dev)
735static irqreturn_t s626_irq_handler(int irq, void *d) 745static irqreturn_t s626_irq_handler(int irq, void *d)
736{ 746{
737 struct comedi_device *dev = d; 747 struct comedi_device *dev = d;
748 struct s626_private *devpriv = dev->private;
738 struct comedi_subdevice *s; 749 struct comedi_subdevice *s;
739 struct comedi_cmd *cmd; 750 struct comedi_cmd *cmd;
740 struct enc_private *k; 751 struct enc_private *k;
@@ -968,6 +979,7 @@ static irqreturn_t s626_irq_handler(int irq, void *d)
968 */ 979 */
969static void ResetADC(struct comedi_device *dev, uint8_t *ppl) 980static void ResetADC(struct comedi_device *dev, uint8_t *ppl)
970{ 981{
982 struct s626_private *devpriv = dev->private;
971 register uint32_t *pRPS; 983 register uint32_t *pRPS;
972 uint32_t JmpAdrs; 984 uint32_t JmpAdrs;
973 uint16_t i; 985 uint16_t i;
@@ -1163,6 +1175,7 @@ static int s626_ai_insn_config(struct comedi_device *dev,
1163 1175
1164/* static int s626_ai_rinsn(struct comedi_device *dev,struct comedi_subdevice *s,struct comedi_insn *insn,unsigned int *data) */ 1176/* static int s626_ai_rinsn(struct comedi_device *dev,struct comedi_subdevice *s,struct comedi_insn *insn,unsigned int *data) */
1165/* { */ 1177/* { */
1178/* struct s626_private *devpriv = dev->private; */
1166/* register uint8_t i; */ 1179/* register uint8_t i; */
1167/* register int32_t *readaddr; */ 1180/* register int32_t *readaddr; */
1168 1181
@@ -1191,6 +1204,7 @@ static int s626_ai_insn_read(struct comedi_device *dev,
1191 struct comedi_subdevice *s, 1204 struct comedi_subdevice *s,
1192 struct comedi_insn *insn, unsigned int *data) 1205 struct comedi_insn *insn, unsigned int *data)
1193{ 1206{
1207 struct s626_private *devpriv = dev->private;
1194 uint16_t chan = CR_CHAN(insn->chanspec); 1208 uint16_t chan = CR_CHAN(insn->chanspec);
1195 uint16_t range = CR_RANGE(insn->chanspec); 1209 uint16_t range = CR_RANGE(insn->chanspec);
1196 uint16_t AdcSpec = 0; 1210 uint16_t AdcSpec = 0;
@@ -1302,6 +1316,8 @@ static int s626_ai_load_polllist(uint8_t *ppl, struct comedi_cmd *cmd)
1302static int s626_ai_inttrig(struct comedi_device *dev, 1316static int s626_ai_inttrig(struct comedi_device *dev,
1303 struct comedi_subdevice *s, unsigned int trignum) 1317 struct comedi_subdevice *s, unsigned int trignum)
1304{ 1318{
1319 struct s626_private *devpriv = dev->private;
1320
1305 if (trignum != 0) 1321 if (trignum != 0)
1306 return -EINVAL; 1322 return -EINVAL;
1307 1323
@@ -1378,7 +1394,7 @@ static void s626_timer_load(struct comedi_device *dev, struct enc_private *k,
1378/* TO COMPLETE */ 1394/* TO COMPLETE */
1379static int s626_ai_cmd(struct comedi_device *dev, struct comedi_subdevice *s) 1395static int s626_ai_cmd(struct comedi_device *dev, struct comedi_subdevice *s)
1380{ 1396{
1381 1397 struct s626_private *devpriv = dev->private;
1382 uint8_t ppl[16]; 1398 uint8_t ppl[16];
1383 struct comedi_cmd *cmd = &s->async->cmd; 1399 struct comedi_cmd *cmd = &s->async->cmd;
1384 struct enc_private *k; 1400 struct enc_private *k;
@@ -1533,80 +1549,46 @@ static int s626_ai_cmdtest(struct comedi_device *dev,
1533 1549
1534 /* step 3: make sure arguments are trivially compatible */ 1550 /* step 3: make sure arguments are trivially compatible */
1535 1551
1536 if (cmd->start_src != TRIG_EXT && cmd->start_arg != 0) { 1552 if (cmd->start_src != TRIG_EXT)
1537 cmd->start_arg = 0; 1553 err |= cfc_check_trigger_arg_is(&cmd->start_arg, 0);
1538 err++; 1554 if (cmd->start_src == TRIG_EXT)
1539 } 1555 err |= cfc_check_trigger_arg_max(&cmd->start_arg, 39);
1540 1556
1541 if (cmd->start_src == TRIG_EXT && cmd->start_arg > 39) { 1557 if (cmd->scan_begin_src == TRIG_EXT)
1542 cmd->start_arg = 39; 1558 err |= cfc_check_trigger_arg_max(&cmd->scan_begin_arg, 39);
1543 err++;
1544 }
1545 1559
1546 if (cmd->scan_begin_src == TRIG_EXT && cmd->scan_begin_arg > 39) { 1560 if (cmd->convert_src == TRIG_EXT)
1547 cmd->scan_begin_arg = 39; 1561 err |= cfc_check_trigger_arg_max(&cmd->convert_arg, 39);
1548 err++;
1549 }
1550 1562
1551 if (cmd->convert_src == TRIG_EXT && cmd->convert_arg > 39) {
1552 cmd->convert_arg = 39;
1553 err++;
1554 }
1555#define MAX_SPEED 200000 /* in nanoseconds */ 1563#define MAX_SPEED 200000 /* in nanoseconds */
1556#define MIN_SPEED 2000000000 /* in nanoseconds */ 1564#define MIN_SPEED 2000000000 /* in nanoseconds */
1557 1565
1558 if (cmd->scan_begin_src == TRIG_TIMER) { 1566 if (cmd->scan_begin_src == TRIG_TIMER) {
1559 if (cmd->scan_begin_arg < MAX_SPEED) { 1567 err |= cfc_check_trigger_arg_min(&cmd->scan_begin_arg,
1560 cmd->scan_begin_arg = MAX_SPEED; 1568 MAX_SPEED);
1561 err++; 1569 err |= cfc_check_trigger_arg_max(&cmd->scan_begin_arg,
1562 } 1570 MIN_SPEED);
1563 if (cmd->scan_begin_arg > MIN_SPEED) {
1564 cmd->scan_begin_arg = MIN_SPEED;
1565 err++;
1566 }
1567 } else { 1571 } else {
1568 /* external trigger */ 1572 /* external trigger */
1569 /* should be level/edge, hi/lo specification here */ 1573 /* should be level/edge, hi/lo specification here */
1570 /* should specify multiple external triggers */ 1574 /* should specify multiple external triggers */
1571/* if(cmd->scan_begin_arg>9){ */ 1575/* err |= cfc_check_trigger_arg_max(&cmd->scan_begin_arg, 9); */
1572/* cmd->scan_begin_arg=9; */
1573/* err++; */
1574/* } */
1575 } 1576 }
1576 if (cmd->convert_src == TRIG_TIMER) { 1577 if (cmd->convert_src == TRIG_TIMER) {
1577 if (cmd->convert_arg < MAX_SPEED) { 1578 err |= cfc_check_trigger_arg_min(&cmd->convert_arg, MAX_SPEED);
1578 cmd->convert_arg = MAX_SPEED; 1579 err |= cfc_check_trigger_arg_max(&cmd->convert_arg, MIN_SPEED);
1579 err++;
1580 }
1581 if (cmd->convert_arg > MIN_SPEED) {
1582 cmd->convert_arg = MIN_SPEED;
1583 err++;
1584 }
1585 } else { 1580 } else {
1586 /* external trigger */ 1581 /* external trigger */
1587 /* see above */ 1582 /* see above */
1588/* if(cmd->convert_arg>9){ */ 1583/* err |= cfc_check_trigger_arg_max(&cmd->scan_begin_arg, 9); */
1589/* cmd->convert_arg=9; */
1590/* err++; */
1591/* } */
1592 } 1584 }
1593 1585
1594 if (cmd->scan_end_arg != cmd->chanlist_len) { 1586 err |= cfc_check_trigger_arg_is(&cmd->scan_end_arg, cmd->chanlist_len);
1595 cmd->scan_end_arg = cmd->chanlist_len; 1587
1596 err++; 1588 if (cmd->stop_src == TRIG_COUNT)
1597 } 1589 err |= cfc_check_trigger_arg_max(&cmd->stop_arg, 0x00ffffff);
1598 if (cmd->stop_src == TRIG_COUNT) { 1590 else /* TRIG_NONE */
1599 if (cmd->stop_arg > 0x00ffffff) { 1591 err |= cfc_check_trigger_arg_is(&cmd->stop_arg, 0);
1600 cmd->stop_arg = 0x00ffffff;
1601 err++;
1602 }
1603 } else {
1604 /* TRIG_NONE */
1605 if (cmd->stop_arg != 0) {
1606 cmd->stop_arg = 0;
1607 err++;
1608 }
1609 }
1610 1592
1611 if (err) 1593 if (err)
1612 return 3; 1594 return 3;
@@ -1643,6 +1625,8 @@ static int s626_ai_cmdtest(struct comedi_device *dev,
1643 1625
1644static int s626_ai_cancel(struct comedi_device *dev, struct comedi_subdevice *s) 1626static int s626_ai_cancel(struct comedi_device *dev, struct comedi_subdevice *s)
1645{ 1627{
1628 struct s626_private *devpriv = dev->private;
1629
1646 /* Stop RPS program in case it is currently running. */ 1630 /* Stop RPS program in case it is currently running. */
1647 MC_DISABLE(P_MC1, MC1_ERPS1); 1631 MC_DISABLE(P_MC1, MC1_ERPS1);
1648 1632
@@ -1657,7 +1641,7 @@ static int s626_ai_cancel(struct comedi_device *dev, struct comedi_subdevice *s)
1657static int s626_ao_winsn(struct comedi_device *dev, struct comedi_subdevice *s, 1641static int s626_ao_winsn(struct comedi_device *dev, struct comedi_subdevice *s,
1658 struct comedi_insn *insn, unsigned int *data) 1642 struct comedi_insn *insn, unsigned int *data)
1659{ 1643{
1660 1644 struct s626_private *devpriv = dev->private;
1661 int i; 1645 int i;
1662 uint16_t chan = CR_CHAN(insn->chanspec); 1646 uint16_t chan = CR_CHAN(insn->chanspec);
1663 int16_t dacdata; 1647 int16_t dacdata;
@@ -1676,6 +1660,7 @@ static int s626_ao_winsn(struct comedi_device *dev, struct comedi_subdevice *s,
1676static int s626_ao_rinsn(struct comedi_device *dev, struct comedi_subdevice *s, 1660static int s626_ao_rinsn(struct comedi_device *dev, struct comedi_subdevice *s,
1677 struct comedi_insn *insn, unsigned int *data) 1661 struct comedi_insn *insn, unsigned int *data)
1678{ 1662{
1663 struct s626_private *devpriv = dev->private;
1679 int i; 1664 int i;
1680 1665
1681 for (i = 0; i < insn->n; i++) 1666 for (i = 0; i < insn->n; i++)
@@ -1974,6 +1959,7 @@ static uint16_t GetMode_B(struct comedi_device *dev, struct enc_private *k)
1974static void SetMode_A(struct comedi_device *dev, struct enc_private *k, 1959static void SetMode_A(struct comedi_device *dev, struct enc_private *k,
1975 uint16_t Setup, uint16_t DisableIntSrc) 1960 uint16_t Setup, uint16_t DisableIntSrc)
1976{ 1961{
1962 struct s626_private *devpriv = dev->private;
1977 register uint16_t cra; 1963 register uint16_t cra;
1978 register uint16_t crb; 1964 register uint16_t crb;
1979 register uint16_t setup = Setup; /* Cache the Standard Setup. */ 1965 register uint16_t setup = Setup; /* Cache the Standard Setup. */
@@ -2032,6 +2018,7 @@ static void SetMode_A(struct comedi_device *dev, struct enc_private *k,
2032static void SetMode_B(struct comedi_device *dev, struct enc_private *k, 2018static void SetMode_B(struct comedi_device *dev, struct enc_private *k,
2033 uint16_t Setup, uint16_t DisableIntSrc) 2019 uint16_t Setup, uint16_t DisableIntSrc)
2034{ 2020{
2021 struct s626_private *devpriv = dev->private;
2035 register uint16_t cra; 2022 register uint16_t cra;
2036 register uint16_t crb; 2023 register uint16_t crb;
2037 register uint16_t setup = Setup; /* Cache the Standard Setup. */ 2024 register uint16_t setup = Setup; /* Cache the Standard Setup. */
@@ -2165,6 +2152,8 @@ static uint16_t GetLoadTrig_B(struct comedi_device *dev, struct enc_private *k)
2165static void SetIntSrc_A(struct comedi_device *dev, struct enc_private *k, 2152static void SetIntSrc_A(struct comedi_device *dev, struct enc_private *k,
2166 uint16_t IntSource) 2153 uint16_t IntSource)
2167{ 2154{
2155 struct s626_private *devpriv = dev->private;
2156
2168 /* Reset any pending counter overflow or index captures. */ 2157 /* Reset any pending counter overflow or index captures. */
2169 DEBIreplace(dev, k->MyCRB, (uint16_t) (~CRBMSK_INTCTRL), 2158 DEBIreplace(dev, k->MyCRB, (uint16_t) (~CRBMSK_INTCTRL),
2170 CRBMSK_INTRESETCMD | CRBMSK_INTRESET_A); 2159 CRBMSK_INTRESETCMD | CRBMSK_INTRESET_A);
@@ -2182,6 +2171,7 @@ static void SetIntSrc_A(struct comedi_device *dev, struct enc_private *k,
2182static void SetIntSrc_B(struct comedi_device *dev, struct enc_private *k, 2171static void SetIntSrc_B(struct comedi_device *dev, struct enc_private *k,
2183 uint16_t IntSource) 2172 uint16_t IntSource)
2184{ 2173{
2174 struct s626_private *devpriv = dev->private;
2185 uint16_t crb; 2175 uint16_t crb;
2186 2176
2187 /* Cache writeable CRB register image. */ 2177 /* Cache writeable CRB register image. */
@@ -2412,6 +2402,7 @@ static void CountersInit(struct comedi_device *dev)
2412static int s626_allocate_dma_buffers(struct comedi_device *dev) 2402static int s626_allocate_dma_buffers(struct comedi_device *dev)
2413{ 2403{
2414 struct pci_dev *pcidev = comedi_to_pci_dev(dev); 2404 struct pci_dev *pcidev = comedi_to_pci_dev(dev);
2405 struct s626_private *devpriv = dev->private;
2415 void *addr; 2406 void *addr;
2416 dma_addr_t appdma; 2407 dma_addr_t appdma;
2417 2408
@@ -2432,6 +2423,7 @@ static int s626_allocate_dma_buffers(struct comedi_device *dev)
2432 2423
2433static void s626_initialize(struct comedi_device *dev) 2424static void s626_initialize(struct comedi_device *dev)
2434{ 2425{
2426 struct s626_private *devpriv = dev->private;
2435 dma_addr_t pPhysBuf; 2427 dma_addr_t pPhysBuf;
2436 uint16_t chan; 2428 uint16_t chan;
2437 int i; 2429 int i;
@@ -2665,16 +2657,20 @@ static void s626_initialize(struct comedi_device *dev)
2665 /* writel(IRQ_GPIO3 | IRQ_RPS1, devpriv->base_addr + P_IER); */ 2657 /* writel(IRQ_GPIO3 | IRQ_RPS1, devpriv->base_addr + P_IER); */
2666} 2658}
2667 2659
2668static int s626_attach_pci(struct comedi_device *dev, struct pci_dev *pcidev) 2660static int s626_auto_attach(struct comedi_device *dev,
2661 unsigned long context_unused)
2669{ 2662{
2663 struct pci_dev *pcidev = comedi_to_pci_dev(dev);
2664 struct s626_private *devpriv;
2670 struct comedi_subdevice *s; 2665 struct comedi_subdevice *s;
2671 int ret; 2666 int ret;
2672 2667
2673 comedi_set_hw_dev(dev, &pcidev->dev);
2674 dev->board_name = dev->driver->driver_name; 2668 dev->board_name = dev->driver->driver_name;
2675 2669
2676 if (alloc_private(dev, sizeof(struct s626_private)) < 0) 2670 devpriv = kzalloc(sizeof(*devpriv), GFP_KERNEL);
2671 if (!devpriv)
2677 return -ENOMEM; 2672 return -ENOMEM;
2673 dev->private = devpriv;
2678 2674
2679 ret = comedi_pci_enable(pcidev, dev->board_name); 2675 ret = comedi_pci_enable(pcidev, dev->board_name);
2680 if (ret) 2676 if (ret)
@@ -2794,6 +2790,7 @@ static int s626_attach_pci(struct comedi_device *dev, struct pci_dev *pcidev)
2794static void s626_detach(struct comedi_device *dev) 2790static void s626_detach(struct comedi_device *dev)
2795{ 2791{
2796 struct pci_dev *pcidev = comedi_to_pci_dev(dev); 2792 struct pci_dev *pcidev = comedi_to_pci_dev(dev);
2793 struct s626_private *devpriv = dev->private;
2797 2794
2798 if (devpriv) { 2795 if (devpriv) {
2799 /* stop ai_command */ 2796 /* stop ai_command */
@@ -2829,17 +2826,17 @@ static void s626_detach(struct comedi_device *dev)
2829static struct comedi_driver s626_driver = { 2826static struct comedi_driver s626_driver = {
2830 .driver_name = "s626", 2827 .driver_name = "s626",
2831 .module = THIS_MODULE, 2828 .module = THIS_MODULE,
2832 .attach_pci = s626_attach_pci, 2829 .auto_attach = s626_auto_attach,
2833 .detach = s626_detach, 2830 .detach = s626_detach,
2834}; 2831};
2835 2832
2836static int __devinit s626_pci_probe(struct pci_dev *dev, 2833static int s626_pci_probe(struct pci_dev *dev,
2837 const struct pci_device_id *ent) 2834 const struct pci_device_id *ent)
2838{ 2835{
2839 return comedi_pci_auto_config(dev, &s626_driver); 2836 return comedi_pci_auto_config(dev, &s626_driver);
2840} 2837}
2841 2838
2842static void __devexit s626_pci_remove(struct pci_dev *dev) 2839static void s626_pci_remove(struct pci_dev *dev)
2843{ 2840{
2844 comedi_pci_auto_unconfig(dev); 2841 comedi_pci_auto_unconfig(dev);
2845} 2842}
@@ -2860,7 +2857,7 @@ static struct pci_driver s626_pci_driver = {
2860 .name = "s626", 2857 .name = "s626",
2861 .id_table = s626_pci_table, 2858 .id_table = s626_pci_table,
2862 .probe = s626_pci_probe, 2859 .probe = s626_pci_probe,
2863 .remove = __devexit_p(s626_pci_remove), 2860 .remove = s626_pci_remove,
2864}; 2861};
2865module_comedi_pci_driver(s626_driver, s626_pci_driver); 2862module_comedi_pci_driver(s626_driver, s626_pci_driver);
2866 2863
diff --git a/drivers/staging/comedi/drivers/serial2002.c b/drivers/staging/comedi/drivers/serial2002.c
index 5bf84cfbdceb..e6177b48ccaf 100644
--- a/drivers/staging/comedi/drivers/serial2002.c
+++ b/drivers/staging/comedi/drivers/serial2002.c
@@ -31,6 +31,8 @@ Status: in development
31 31
32*/ 32*/
33 33
34#define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
35
34#include "../comedidev.h" 36#include "../comedidev.h"
35 37
36#include <linux/delay.h> 38#include <linux/delay.h>
@@ -43,10 +45,6 @@ Status: in development
43#include <linux/serial.h> 45#include <linux/serial.h>
44#include <linux/poll.h> 46#include <linux/poll.h>
45 47
46struct serial2002_board {
47 const char *name;
48};
49
50struct serial2002_range_table_t { 48struct serial2002_range_table_t {
51 49
52 /* HACK... */ 50 /* HACK... */
@@ -68,12 +66,6 @@ struct serial2002_private {
68 struct serial2002_range_table_t in_range[32], out_range[32]; 66 struct serial2002_range_table_t in_range[32], out_range[32];
69}; 67};
70 68
71/*
72 * most drivers define the following macro to make it easy to
73 * access the private structure.
74 */
75#define devpriv ((struct serial2002_private *)dev->private)
76
77struct serial_data { 69struct serial_data {
78 enum { is_invalid, is_digital, is_channel } kind; 70 enum { is_invalid, is_digital, is_channel } kind;
79 int index; 71 int index;
@@ -282,7 +274,7 @@ static struct serial_data serial_read(struct file *f, int timeout)
282 274
283 length++; 275 length++;
284 if (data < 0) { 276 if (data < 0) {
285 printk(KERN_ERR "serial2002 error\n"); 277 pr_err("Failed to read serial.\n");
286 break; 278 break;
287 } else if (data & 0x80) { 279 } else if (data & 0x80) {
288 result.value = (result.value << 7) | (data & 0x7f); 280 result.value = (result.value << 7) | (data & 0x7f);
@@ -348,6 +340,7 @@ static void serial_write(struct file *f, struct serial_data data)
348 340
349static int serial_2002_open(struct comedi_device *dev) 341static int serial_2002_open(struct comedi_device *dev)
350{ 342{
343 struct serial2002_private *devpriv = dev->private;
351 int result; 344 int result;
352 char port[20]; 345 char port[20];
353 346
@@ -355,7 +348,7 @@ static int serial_2002_open(struct comedi_device *dev)
355 devpriv->tty = filp_open(port, O_RDWR, 0); 348 devpriv->tty = filp_open(port, O_RDWR, 0);
356 if (IS_ERR(devpriv->tty)) { 349 if (IS_ERR(devpriv->tty)) {
357 result = (int)PTR_ERR(devpriv->tty); 350 result = (int)PTR_ERR(devpriv->tty);
358 printk(KERN_ERR "serial_2002: file open error = %d\n", result); 351 dev_err(dev->class_dev, "file open error = %d\n", result);
359 } else { 352 } else {
360 struct config_t { 353 struct config_t {
361 354
@@ -655,6 +648,8 @@ err_alloc_configs:
655 648
656static void serial_2002_close(struct comedi_device *dev) 649static void serial_2002_close(struct comedi_device *dev)
657{ 650{
651 struct serial2002_private *devpriv = dev->private;
652
658 if (!IS_ERR(devpriv->tty) && devpriv->tty) 653 if (!IS_ERR(devpriv->tty) && devpriv->tty)
659 filp_close(devpriv->tty, NULL); 654 filp_close(devpriv->tty, NULL);
660} 655}
@@ -663,6 +658,7 @@ static int serial2002_di_rinsn(struct comedi_device *dev,
663 struct comedi_subdevice *s, 658 struct comedi_subdevice *s,
664 struct comedi_insn *insn, unsigned int *data) 659 struct comedi_insn *insn, unsigned int *data)
665{ 660{
661 struct serial2002_private *devpriv = dev->private;
666 int n; 662 int n;
667 int chan; 663 int chan;
668 664
@@ -685,6 +681,7 @@ static int serial2002_do_winsn(struct comedi_device *dev,
685 struct comedi_subdevice *s, 681 struct comedi_subdevice *s,
686 struct comedi_insn *insn, unsigned int *data) 682 struct comedi_insn *insn, unsigned int *data)
687{ 683{
684 struct serial2002_private *devpriv = dev->private;
688 int n; 685 int n;
689 int chan; 686 int chan;
690 687
@@ -704,6 +701,7 @@ static int serial2002_ai_rinsn(struct comedi_device *dev,
704 struct comedi_subdevice *s, 701 struct comedi_subdevice *s,
705 struct comedi_insn *insn, unsigned int *data) 702 struct comedi_insn *insn, unsigned int *data)
706{ 703{
704 struct serial2002_private *devpriv = dev->private;
707 int n; 705 int n;
708 int chan; 706 int chan;
709 707
@@ -726,6 +724,7 @@ static int serial2002_ao_winsn(struct comedi_device *dev,
726 struct comedi_subdevice *s, 724 struct comedi_subdevice *s,
727 struct comedi_insn *insn, unsigned int *data) 725 struct comedi_insn *insn, unsigned int *data)
728{ 726{
727 struct serial2002_private *devpriv = dev->private;
729 int n; 728 int n;
730 int chan; 729 int chan;
731 730
@@ -746,6 +745,7 @@ static int serial2002_ao_rinsn(struct comedi_device *dev,
746 struct comedi_subdevice *s, 745 struct comedi_subdevice *s,
747 struct comedi_insn *insn, unsigned int *data) 746 struct comedi_insn *insn, unsigned int *data)
748{ 747{
748 struct serial2002_private *devpriv = dev->private;
749 int n; 749 int n;
750 int chan = CR_CHAN(insn->chanspec); 750 int chan = CR_CHAN(insn->chanspec);
751 751
@@ -759,6 +759,7 @@ static int serial2002_ei_rinsn(struct comedi_device *dev,
759 struct comedi_subdevice *s, 759 struct comedi_subdevice *s,
760 struct comedi_insn *insn, unsigned int *data) 760 struct comedi_insn *insn, unsigned int *data)
761{ 761{
762 struct serial2002_private *devpriv = dev->private;
762 int n; 763 int n;
763 int chan; 764 int chan;
764 765
@@ -780,14 +781,18 @@ static int serial2002_ei_rinsn(struct comedi_device *dev,
780static int serial2002_attach(struct comedi_device *dev, 781static int serial2002_attach(struct comedi_device *dev,
781 struct comedi_devconfig *it) 782 struct comedi_devconfig *it)
782{ 783{
783 const struct serial2002_board *board = comedi_board(dev); 784 struct serial2002_private *devpriv;
784 struct comedi_subdevice *s; 785 struct comedi_subdevice *s;
785 int ret; 786 int ret;
786 787
787 dev_dbg(dev->class_dev, "serial2002: attach\n"); 788 dev_dbg(dev->class_dev, "serial2002: attach\n");
788 dev->board_name = board->name; 789 dev->board_name = dev->driver->driver_name;
789 if (alloc_private(dev, sizeof(struct serial2002_private)) < 0) 790
791 devpriv = kzalloc(sizeof(*devpriv), GFP_KERNEL);
792 if (!devpriv)
790 return -ENOMEM; 793 return -ENOMEM;
794 dev->private = devpriv;
795
791 dev->open = serial_2002_open; 796 dev->open = serial_2002_open;
792 dev->close = serial_2002_close; 797 dev->close = serial_2002_close;
793 devpriv->port = it->options[0]; 798 devpriv->port = it->options[0];
@@ -860,20 +865,11 @@ static void serial2002_detach(struct comedi_device *dev)
860 } 865 }
861} 866}
862 867
863static const struct serial2002_board serial2002_boards[] = {
864 {
865 .name = "serial2002"
866 },
867};
868
869static struct comedi_driver serial2002_driver = { 868static struct comedi_driver serial2002_driver = {
870 .driver_name = "serial2002", 869 .driver_name = "serial2002",
871 .module = THIS_MODULE, 870 .module = THIS_MODULE,
872 .attach = serial2002_attach, 871 .attach = serial2002_attach,
873 .detach = serial2002_detach, 872 .detach = serial2002_detach,
874 .board_name = &serial2002_boards[0].name,
875 .offset = sizeof(struct serial2002_board),
876 .num_names = ARRAY_SIZE(serial2002_boards),
877}; 873};
878module_comedi_driver(serial2002_driver); 874module_comedi_driver(serial2002_driver);
879 875
diff --git a/drivers/staging/comedi/drivers/skel.c b/drivers/staging/comedi/drivers/skel.c
index b70cdf300bbd..e2d79700a615 100644
--- a/drivers/staging/comedi/drivers/skel.c
+++ b/drivers/staging/comedi/drivers/skel.c
@@ -92,6 +92,7 @@ Configuration Options:
92 */ 92 */
93struct skel_board { 93struct skel_board {
94 const char *name; 94 const char *name;
95 unsigned int devid;
95 int ai_chans; 96 int ai_chans;
96 int ai_bits; 97 int ai_bits;
97 int have_dio; 98 int have_dio;
@@ -100,36 +101,20 @@ struct skel_board {
100static const struct skel_board skel_boards[] = { 101static const struct skel_board skel_boards[] = {
101 { 102 {
102 .name = "skel-100", 103 .name = "skel-100",
104 .devid = 0x100,
103 .ai_chans = 16, 105 .ai_chans = 16,
104 .ai_bits = 12, 106 .ai_bits = 12,
105 .have_dio = 1, 107 .have_dio = 1,
106 }, 108 },
107 { 109 {
108 .name = "skel-200", 110 .name = "skel-200",
111 .devid = 0x200,
109 .ai_chans = 8, 112 .ai_chans = 8,
110 .ai_bits = 16, 113 .ai_bits = 16,
111 .have_dio = 0, 114 .have_dio = 0,
112 }, 115 },
113}; 116};
114 117
115/* This is used by modprobe to translate PCI IDs to drivers. Should
116 * only be used for PCI and ISA-PnP devices */
117/* Please add your PCI vendor ID to comedidev.h, and it will be forwarded
118 * upstream. */
119#define PCI_VENDOR_ID_SKEL 0xdafe
120static DEFINE_PCI_DEVICE_TABLE(skel_pci_table) = {
121 { PCI_DEVICE(PCI_VENDOR_ID_SKEL, 0x0100) },
122 { PCI_DEVICE(PCI_VENDOR_ID_SKEL, 0x0200) },
123 { 0 }
124};
125
126MODULE_DEVICE_TABLE(pci, skel_pci_table);
127
128/*
129 * Useful for shorthand access to the particular board structure
130 */
131#define thisboard ((const struct skel_board *)dev->board_ptr)
132
133/* this structure is for data unique to this hardware driver. If 118/* this structure is for data unique to this hardware driver. If
134 several hardware drivers keep similar information in this structure, 119 several hardware drivers keep similar information in this structure,
135 feel free to suggest moving the variable to the struct comedi_device struct. 120 feel free to suggest moving the variable to the struct comedi_device struct.
@@ -138,165 +123,25 @@ struct skel_private {
138 123
139 int data; 124 int data;
140 125
141 /* would be useful for a PCI device */
142 struct pci_dev *pci_dev;
143
144 /* Used for AO readback */ 126 /* Used for AO readback */
145 unsigned int ao_readback[2]; 127 unsigned int ao_readback[2];
146}; 128};
147 129
148/* 130/* This function doesn't require a particular form, this is just
149 * most drivers define the following macro to make it easy to 131 * what happens to be used in some of the drivers. It should
150 * access the private structure. 132 * convert ns nanoseconds to a counter value suitable for programming
151 */ 133 * the device. Also, it should adjust ns so that it cooresponds to
152#define devpriv ((struct skel_private *)dev->private) 134 * the actual time that the device will use. */
153 135static int skel_ns_to_timer(unsigned int *ns, int round)
154/*
155 * The struct comedi_driver structure tells the Comedi core module
156 * which functions to call to configure/deconfigure (attach/detach)
157 * the board, and also about the kernel module that contains
158 * the device code.
159 */
160static int skel_attach(struct comedi_device *dev, struct comedi_devconfig *it);
161static void skel_detach(struct comedi_device *dev);
162static struct comedi_driver driver_skel = {
163 .driver_name = "dummy",
164 .module = THIS_MODULE,
165 .attach = skel_attach,
166 .detach = skel_detach,
167/* It is not necessary to implement the following members if you are
168 * writing a driver for a ISA PnP or PCI card */
169 /* Most drivers will support multiple types of boards by
170 * having an array of board structures. These were defined
171 * in skel_boards[] above. Note that the element 'name'
172 * was first in the structure -- Comedi uses this fact to
173 * extract the name of the board without knowing any details
174 * about the structure except for its length.
175 * When a device is attached (by comedi_config), the name
176 * of the device is given to Comedi, and Comedi tries to
177 * match it by going through the list of board names. If
178 * there is a match, the address of the pointer is put
179 * into dev->board_ptr and driver->attach() is called.
180 *
181 * Note that these are not necessary if you can determine
182 * the type of board in software. ISA PnP, PCI, and PCMCIA
183 * devices are such boards.
184 */
185 .board_name = &skel_boards[0].name,
186 .offset = sizeof(struct skel_board),
187 .num_names = ARRAY_SIZE(skel_boards),
188};
189
190static int skel_ai_rinsn(struct comedi_device *dev, struct comedi_subdevice *s,
191 struct comedi_insn *insn, unsigned int *data);
192static int skel_ao_winsn(struct comedi_device *dev, struct comedi_subdevice *s,
193 struct comedi_insn *insn, unsigned int *data);
194static int skel_ao_rinsn(struct comedi_device *dev, struct comedi_subdevice *s,
195 struct comedi_insn *insn, unsigned int *data);
196static int skel_dio_insn_bits(struct comedi_device *dev,
197 struct comedi_subdevice *s,
198 struct comedi_insn *insn, unsigned int *data);
199static int skel_dio_insn_config(struct comedi_device *dev,
200 struct comedi_subdevice *s,
201 struct comedi_insn *insn, unsigned int *data);
202static int skel_ai_cmdtest(struct comedi_device *dev,
203 struct comedi_subdevice *s, struct comedi_cmd *cmd);
204static int skel_ns_to_timer(unsigned int *ns, int round);
205
206/*
207 * Attach is called by the Comedi core to configure the driver
208 * for a particular board. If you specified a board_name array
209 * in the driver structure, dev->board_ptr contains that
210 * address.
211 */
212static int skel_attach(struct comedi_device *dev, struct comedi_devconfig *it)
213{ 136{
214 struct comedi_subdevice *s; 137 /* trivial timer */
215 int ret; 138 /* if your timing is done through two cascaded timers, the
216 139 * i8253_cascade_ns_to_timer() function in 8253.h can be
217 pr_info("comedi%d: skel: ", dev->minor); 140 * very helpful. There are also i8254_load() and i8254_mm_load()
218 141 * which can be used to load values into the ubiquitous 8254 counters
219/* 142 */
220 * If you can probe the device to determine what device in a series
221 * it is, this is the place to do it. Otherwise, dev->board_ptr
222 * should already be initialized.
223 */
224 /* dev->board_ptr = skel_probe(dev, it); */
225
226/*
227 * Initialize dev->board_name. Note that we can use the "thisboard"
228 * macro now, since we just initialized it in the last line.
229 */
230 dev->board_name = thisboard->name;
231
232/*
233 * Allocate the private structure area. alloc_private() is a
234 * convenient macro defined in comedidev.h.
235 */
236 if (alloc_private(dev, sizeof(struct skel_private)) < 0)
237 return -ENOMEM;
238
239 ret = comedi_alloc_subdevices(dev, 3);
240 if (ret)
241 return ret;
242
243 s = &dev->subdevices[0];
244 /* dev->read_subdev=s; */
245 /* analog input subdevice */
246 s->type = COMEDI_SUBD_AI;
247 /* we support single-ended (ground) and differential */
248 s->subdev_flags = SDF_READABLE | SDF_GROUND | SDF_DIFF;
249 s->n_chan = thisboard->ai_chans;
250 s->maxdata = (1 << thisboard->ai_bits) - 1;
251 s->range_table = &range_bipolar10;
252 s->len_chanlist = 16; /* This is the maximum chanlist length that
253 the board can handle */
254 s->insn_read = skel_ai_rinsn;
255/*
256* s->subdev_flags |= SDF_CMD_READ;
257* s->do_cmd = skel_ai_cmd;
258*/
259 s->do_cmdtest = skel_ai_cmdtest;
260
261 s = &dev->subdevices[1];
262 /* analog output subdevice */
263 s->type = COMEDI_SUBD_AO;
264 s->subdev_flags = SDF_WRITABLE;
265 s->n_chan = 1;
266 s->maxdata = 0xffff;
267 s->range_table = &range_bipolar5;
268 s->insn_write = skel_ao_winsn;
269 s->insn_read = skel_ao_rinsn;
270
271 s = &dev->subdevices[2];
272 /* digital i/o subdevice */
273 if (thisboard->have_dio) {
274 s->type = COMEDI_SUBD_DIO;
275 s->subdev_flags = SDF_READABLE | SDF_WRITABLE;
276 s->n_chan = 16;
277 s->maxdata = 1;
278 s->range_table = &range_digital;
279 s->insn_bits = skel_dio_insn_bits;
280 s->insn_config = skel_dio_insn_config;
281 } else {
282 s->type = COMEDI_SUBD_UNUSED;
283 }
284
285 pr_info("attached\n");
286
287 return 0;
288}
289 143
290/* 144 return *ns;
291 * _detach is called to deconfigure a device. It should deallocate
292 * resources.
293 * This function is also called when _attach() fails, so it should be
294 * careful not to release resources that were not necessarily
295 * allocated by _attach(). dev->private and dev->subdevices are
296 * deallocated automatically by the core.
297 */
298static void skel_detach(struct comedi_device *dev)
299{
300} 145}
301 146
302/* 147/*
@@ -306,6 +151,7 @@ static void skel_detach(struct comedi_device *dev)
306static int skel_ai_rinsn(struct comedi_device *dev, struct comedi_subdevice *s, 151static int skel_ai_rinsn(struct comedi_device *dev, struct comedi_subdevice *s,
307 struct comedi_insn *insn, unsigned int *data) 152 struct comedi_insn *insn, unsigned int *data)
308{ 153{
154 const struct skel_board *thisboard = comedi_board(dev);
309 int n, i; 155 int n, i;
310 unsigned int d; 156 unsigned int d;
311 unsigned int status; 157 unsigned int status;
@@ -331,9 +177,7 @@ static int skel_ai_rinsn(struct comedi_device *dev, struct comedi_subdevice *s,
331 break; 177 break;
332 } 178 }
333 if (i == TIMEOUT) { 179 if (i == TIMEOUT) {
334 /* printk() should be used instead of printk() 180 dev_warn(dev->class_dev, "ai timeout\n");
335 * whenever the code can be called from real-time. */
336 pr_info("timeout\n");
337 return -ETIMEDOUT; 181 return -ETIMEDOUT;
338 } 182 }
339 183
@@ -389,67 +233,40 @@ static int skel_ai_cmdtest(struct comedi_device *dev,
389 if (err) 233 if (err)
390 return 2; 234 return 2;
391 235
392 /* step 3: make sure arguments are trivially compatible */ 236 /* Step 3: check if arguments are trivially valid */
237
238 err |= cfc_check_trigger_arg_is(&cmd->start_arg, 0);
393 239
394 if (cmd->start_arg != 0) {
395 cmd->start_arg = 0;
396 err++;
397 }
398#define MAX_SPEED 10000 /* in nanoseconds */ 240#define MAX_SPEED 10000 /* in nanoseconds */
399#define MIN_SPEED 1000000000 /* in nanoseconds */ 241#define MIN_SPEED 1000000000 /* in nanoseconds */
400 242
401 if (cmd->scan_begin_src == TRIG_TIMER) { 243 if (cmd->scan_begin_src == TRIG_TIMER) {
402 if (cmd->scan_begin_arg < MAX_SPEED) { 244 err |= cfc_check_trigger_arg_min(&cmd->scan_begin_arg,
403 cmd->scan_begin_arg = MAX_SPEED; 245 MAX_SPEED);
404 err++; 246 err |= cfc_check_trigger_arg_max(&cmd->scan_begin_arg,
405 } 247 MIN_SPEED);
406 if (cmd->scan_begin_arg > MIN_SPEED) {
407 cmd->scan_begin_arg = MIN_SPEED;
408 err++;
409 }
410 } else { 248 } else {
411 /* external trigger */ 249 /* external trigger */
412 /* should be level/edge, hi/lo specification here */ 250 /* should be level/edge, hi/lo specification here */
413 /* should specify multiple external triggers */ 251 /* should specify multiple external triggers */
414 if (cmd->scan_begin_arg > 9) { 252 err |= cfc_check_trigger_arg_max(&cmd->scan_begin_arg, 9);
415 cmd->scan_begin_arg = 9;
416 err++;
417 }
418 } 253 }
254
419 if (cmd->convert_src == TRIG_TIMER) { 255 if (cmd->convert_src == TRIG_TIMER) {
420 if (cmd->convert_arg < MAX_SPEED) { 256 err |= cfc_check_trigger_arg_min(&cmd->convert_arg, MAX_SPEED);
421 cmd->convert_arg = MAX_SPEED; 257 err |= cfc_check_trigger_arg_max(&cmd->convert_arg, MIN_SPEED);
422 err++;
423 }
424 if (cmd->convert_arg > MIN_SPEED) {
425 cmd->convert_arg = MIN_SPEED;
426 err++;
427 }
428 } else { 258 } else {
429 /* external trigger */ 259 /* external trigger */
430 /* see above */ 260 /* see above */
431 if (cmd->convert_arg > 9) { 261 err |= cfc_check_trigger_arg_max(&cmd->scan_begin_arg, 9);
432 cmd->convert_arg = 9;
433 err++;
434 }
435 } 262 }
436 263
437 if (cmd->scan_end_arg != cmd->chanlist_len) { 264 err |= cfc_check_trigger_arg_is(&cmd->scan_end_arg, cmd->chanlist_len);
438 cmd->scan_end_arg = cmd->chanlist_len; 265
439 err++; 266 if (cmd->stop_src == TRIG_COUNT)
440 } 267 err |= cfc_check_trigger_arg_max(&cmd->stop_arg, 0x00ffffff);
441 if (cmd->stop_src == TRIG_COUNT) { 268 else /* TRIG_NONE */
442 if (cmd->stop_arg > 0x00ffffff) { 269 err |= cfc_check_trigger_arg_is(&cmd->stop_arg, 0);
443 cmd->stop_arg = 0x00ffffff;
444 err++;
445 }
446 } else {
447 /* TRIG_NONE */
448 if (cmd->stop_arg != 0) {
449 cmd->stop_arg = 0;
450 err++;
451 }
452 }
453 270
454 if (err) 271 if (err)
455 return 3; 272 return 3;
@@ -484,30 +301,13 @@ static int skel_ai_cmdtest(struct comedi_device *dev,
484 return 0; 301 return 0;
485} 302}
486 303
487/* This function doesn't require a particular form, this is just
488 * what happens to be used in some of the drivers. It should
489 * convert ns nanoseconds to a counter value suitable for programming
490 * the device. Also, it should adjust ns so that it cooresponds to
491 * the actual time that the device will use. */
492static int skel_ns_to_timer(unsigned int *ns, int round)
493{
494 /* trivial timer */
495 /* if your timing is done through two cascaded timers, the
496 * i8253_cascade_ns_to_timer() function in 8253.h can be
497 * very helpful. There are also i8254_load() and i8254_mm_load()
498 * which can be used to load values into the ubiquitous 8254 counters
499 */
500
501 return *ns;
502}
503
504static int skel_ao_winsn(struct comedi_device *dev, struct comedi_subdevice *s, 304static int skel_ao_winsn(struct comedi_device *dev, struct comedi_subdevice *s,
505 struct comedi_insn *insn, unsigned int *data) 305 struct comedi_insn *insn, unsigned int *data)
506{ 306{
307 struct skel_private *devpriv = dev->private;
507 int i; 308 int i;
508 int chan = CR_CHAN(insn->chanspec); 309 int chan = CR_CHAN(insn->chanspec);
509 310
510 pr_info("skel_ao_winsn\n");
511 /* Writing a list of values to an AO channel is probably not 311 /* Writing a list of values to an AO channel is probably not
512 * very useful, but that's how the interface is defined. */ 312 * very useful, but that's how the interface is defined. */
513 for (i = 0; i < insn->n; i++) { 313 for (i = 0; i < insn->n; i++) {
@@ -525,6 +325,7 @@ static int skel_ao_winsn(struct comedi_device *dev, struct comedi_subdevice *s,
525static int skel_ao_rinsn(struct comedi_device *dev, struct comedi_subdevice *s, 325static int skel_ao_rinsn(struct comedi_device *dev, struct comedi_subdevice *s,
526 struct comedi_insn *insn, unsigned int *data) 326 struct comedi_insn *insn, unsigned int *data)
527{ 327{
328 struct skel_private *devpriv = dev->private;
528 int i; 329 int i;
529 int chan = CR_CHAN(insn->chanspec); 330 int chan = CR_CHAN(insn->chanspec);
530 331
@@ -593,57 +394,332 @@ static int skel_dio_insn_config(struct comedi_device *dev,
593 return insn->n; 394 return insn->n;
594} 395}
595 396
596#ifdef CONFIG_COMEDI_PCI_DRIVERS 397static const struct skel_board *skel_find_pci_board(struct pci_dev *pcidev)
597static int __devinit driver_skel_pci_probe(struct pci_dev *dev,
598 const struct pci_device_id *ent)
599{ 398{
600 return comedi_pci_auto_config(dev, &driver_skel); 399 unsigned int i;
400
401/*
402 * This example code assumes all the entries in skel_boards[] are PCI boards
403 * and all use the same PCI vendor ID. If skel_boards[] contains a mixture
404 * of PCI and non-PCI boards, this loop should skip over the non-PCI boards.
405 */
406 for (i = 0; i < ARRAY_SIZE(skel_boards); i++)
407 if (/* skel_boards[i].bustype == pci_bustype && */
408 pcidev->device == skel_boards[i].devid)
409 return &skel_boards[i];
410 return NULL;
601} 411}
602 412
603static void __devexit driver_skel_pci_remove(struct pci_dev *dev) 413/*
414 * Handle common part of skel_attach() and skel_auto_attach().
415 */
416static int skel_common_attach(struct comedi_device *dev)
604{ 417{
605 comedi_pci_auto_unconfig(dev); 418 const struct skel_board *thisboard = comedi_board(dev);
419 struct comedi_subdevice *s;
420 int ret;
421
422 ret = comedi_alloc_subdevices(dev, 3);
423 if (ret)
424 return ret;
425
426 s = &dev->subdevices[0];
427 /* dev->read_subdev=s; */
428 /* analog input subdevice */
429 s->type = COMEDI_SUBD_AI;
430 /* we support single-ended (ground) and differential */
431 s->subdev_flags = SDF_READABLE | SDF_GROUND | SDF_DIFF;
432 s->n_chan = thisboard->ai_chans;
433 s->maxdata = (1 << thisboard->ai_bits) - 1;
434 s->range_table = &range_bipolar10;
435 s->len_chanlist = 16; /* This is the maximum chanlist length that
436 the board can handle */
437 s->insn_read = skel_ai_rinsn;
438/*
439* s->subdev_flags |= SDF_CMD_READ;
440* s->do_cmd = skel_ai_cmd;
441*/
442 s->do_cmdtest = skel_ai_cmdtest;
443
444 s = &dev->subdevices[1];
445 /* analog output subdevice */
446 s->type = COMEDI_SUBD_AO;
447 s->subdev_flags = SDF_WRITABLE;
448 s->n_chan = 1;
449 s->maxdata = 0xffff;
450 s->range_table = &range_bipolar5;
451 s->insn_write = skel_ao_winsn;
452 s->insn_read = skel_ao_rinsn;
453
454 s = &dev->subdevices[2];
455 /* digital i/o subdevice */
456 if (thisboard->have_dio) {
457 s->type = COMEDI_SUBD_DIO;
458 s->subdev_flags = SDF_READABLE | SDF_WRITABLE;
459 s->n_chan = 16;
460 s->maxdata = 1;
461 s->range_table = &range_digital;
462 s->insn_bits = skel_dio_insn_bits;
463 s->insn_config = skel_dio_insn_config;
464 } else {
465 s->type = COMEDI_SUBD_UNUSED;
466 }
467
468 dev_info(dev->class_dev, "skel: attached\n");
469
470 return 0;
606} 471}
607 472
608static struct pci_driver driver_skel_pci_driver = { 473/*
609 .id_table = skel_pci_table, 474 * _attach is called by the Comedi core to configure the driver
610 .probe = &driver_skel_pci_probe, 475 * for a particular board in response to the COMEDI_DEVCONFIG ioctl for
611 .remove = __devexit_p(&driver_skel_pci_remove) 476 * a matching board or driver name. If you specified a board_name array
612}; 477 * in the driver structure, dev->board_ptr contains that address.
478 *
479 * Drivers that handle only PCI or USB devices do not usually support
480 * manual attachment of those devices via the COMEDI_DEVCONFIG ioctl, so
481 * those drivers do not have an _attach function; they just have an
482 * _auto_attach function instead. (See skel_auto_attach() for an example
483 * of such a function.)
484 */
485static int skel_attach(struct comedi_device *dev, struct comedi_devconfig *it)
486{
487 const struct skel_board *thisboard;
488 struct skel_private *devpriv;
489
490/*
491 * If you can probe the device to determine what device in a series
492 * it is, this is the place to do it. Otherwise, dev->board_ptr
493 * should already be initialized.
494 */
495 /* dev->board_ptr = skel_probe(dev, it); */
496
497 thisboard = comedi_board(dev);
498
499/*
500 * Initialize dev->board_name.
501 */
502 dev->board_name = thisboard->name;
503
504 /* Allocate the private data */
505 devpriv = kzalloc(sizeof(*devpriv), GFP_KERNEL);
506 if (!devpriv)
507 return -ENOMEM;
508 dev->private = devpriv;
509
510/*
511 * Supported boards are usually either auto-attached via the
512 * Comedi driver's _auto_attach routine, or manually attached via the
513 * Comedi driver's _attach routine. In most cases, attempts to
514 * manual attach boards that are usually auto-attached should be
515 * rejected by this function.
516 */
517/*
518 * if (thisboard->bustype == pci_bustype) {
519 * dev_err(dev->class_dev,
520 * "Manual attachment of PCI board '%s' not supported\n",
521 * thisboard->name);
522 * }
523 */
524
525/*
526 * For ISA boards, get the i/o base address from it->options[],
527 * request the i/o region and set dev->iobase * from it->options[].
528 * If using interrupts, get the IRQ number from it->options[].
529 */
530
531 /*
532 * Call a common function to handle the remaining things to do for
533 * attaching ISA or PCI boards. (Extra parameters could be added
534 * to pass additional information such as IRQ number.)
535 */
536 return skel_common_attach(dev);
537}
613 538
614static int __init driver_skel_init_module(void) 539/*
540 * _auto_attach is called via comedi_pci_auto_config() (or
541 * comedi_usb_auto_config(), etc.) to handle devices that can be attached
542 * to the Comedi core automatically without the COMEDI_DEVCONFIG ioctl.
543 *
544 * The context parameter is usually unused, but if the driver called
545 * comedi_auto_config() directly instead of the comedi_pci_auto_config()
546 * wrapper function, this will be a copy of the context passed to
547 * comedi_auto_config().
548 */
549static int skel_auto_attach(struct comedi_device *dev,
550 unsigned long context)
615{ 551{
616 int retval; 552 struct pci_dev *pcidev = comedi_to_pci_dev(dev);
553 const struct skel_board *thisboard;
554 struct skel_private *devpriv;
555 int ret;
556
557 /* Hack to allow unused code to be optimized out. */
558 if (!IS_ENABLED(CONFIG_COMEDI_PCI_DRIVERS))
559 return -EINVAL;
560
561 /* Find a matching board in skel_boards[]. */
562 thisboard = skel_find_pci_board(pcidev);
563 if (!thisboard) {
564 dev_err(dev->class_dev, "BUG! cannot determine board type!\n");
565 return -EINVAL;
566 }
567
568 /*
569 * Point the struct comedi_device to the matching board info
570 * and set the board name.
571 */
572 dev->board_ptr = thisboard;
573 dev->board_name = thisboard->name;
574
575 /* Allocate the private data */
576 devpriv = kzalloc(sizeof(*devpriv), GFP_KERNEL);
577 if (!devpriv)
578 return -ENOMEM;
579 dev->private = devpriv;
617 580
618 retval = comedi_driver_register(&driver_skel); 581 /* Enable the PCI device. */
619 if (retval < 0) 582 ret = comedi_pci_enable(pcidev, dev->board_name);
620 return retval; 583 if (ret)
584 return ret;
585
586 /*
587 * Record the fact that the PCI device is enabled so that it can
588 * be disabled during _detach().
589 *
590 * For this example driver, we assume PCI BAR 0 is the main I/O
591 * region for the board registers and use dev->iobase to hold the
592 * I/O base address and to indicate that the PCI device has been
593 * enabled.
594 *
595 * (For boards with memory-mapped registers, dev->iobase is not
596 * usually needed for register access, so can just be set to 1
597 * to indicate that the PCI device has been enabled.)
598 */
599 dev->iobase = pci_resource_start(pcidev, 0);
621 600
622 driver_skel_pci_driver.name = (char *)driver_skel.driver_name; 601 /*
623 return pci_register_driver(&driver_skel_pci_driver); 602 * Call a common function to handle the remaining things to do for
603 * attaching ISA or PCI boards. (Extra parameters could be added
604 * to pass additional information such as IRQ number.)
605 */
606 return skel_common_attach(dev);
624} 607}
625 608
626static void __exit driver_skel_cleanup_module(void) 609/*
610 * _detach is called to deconfigure a device. It should deallocate
611 * resources.
612 * This function is also called when _attach() fails, so it should be
613 * careful not to release resources that were not necessarily
614 * allocated by _attach(). dev->private and dev->subdevices are
615 * deallocated automatically by the core.
616 */
617static void skel_detach(struct comedi_device *dev)
627{ 618{
628 pci_unregister_driver(&driver_skel_pci_driver); 619 const struct skel_board *thisboard = comedi_board(dev);
629 comedi_driver_unregister(&driver_skel); 620 struct skel_private *devpriv = dev->private;
621 struct pci_dev *pcidev = comedi_to_pci_dev(dev);
622
623 if (!thisboard || !devpriv)
624 return;
625
626/*
627 * Do common stuff such as freeing IRQ, unmapping remapped memory
628 * regions, etc., being careful to check that the stuff is valid given
629 * that _detach() is called even when _attach() or _auto_attach() return
630 * an error.
631 */
632
633 if (IS_ENABLED(CONFIG_COMEDI_PCI_DRIVERS) /* &&
634 thisboard->bustype == pci_bustype */) {
635 /*
636 * PCI board
637 *
638 * If PCI device enabled by _auto_attach() (or _attach()),
639 * disable it here.
640 */
641 if (pcidev && dev->iobase)
642 comedi_pci_disable(pcidev);
643 } else {
644 /*
645 * ISA board
646 *
647 * If I/O regions successfully requested by _attach(),
648 * release them here.
649 */
650 if (dev->iobase)
651 release_region(dev->iobase, SKEL_SIZE);
652 }
630} 653}
631 654
632module_init(driver_skel_init_module); 655/*
633module_exit(driver_skel_cleanup_module); 656 * The struct comedi_driver structure tells the Comedi core module
634#else 657 * which functions to call to configure/deconfigure (attach/detach)
635static int __init driver_skel_init_module(void) 658 * the board, and also about the kernel module that contains
659 * the device code.
660 */
661static struct comedi_driver skel_driver = {
662 .driver_name = "dummy",
663 .module = THIS_MODULE,
664 .attach = skel_attach,
665 .auto_attach = skel_auto_attach,
666 .detach = skel_detach,
667/* It is not necessary to implement the following members if you are
668 * writing a driver for a ISA PnP or PCI card */
669 /* Most drivers will support multiple types of boards by
670 * having an array of board structures. These were defined
671 * in skel_boards[] above. Note that the element 'name'
672 * was first in the structure -- Comedi uses this fact to
673 * extract the name of the board without knowing any details
674 * about the structure except for its length.
675 * When a device is attached (by comedi_config), the name
676 * of the device is given to Comedi, and Comedi tries to
677 * match it by going through the list of board names. If
678 * there is a match, the address of the pointer is put
679 * into dev->board_ptr and driver->attach() is called.
680 *
681 * Note that these are not necessary if you can determine
682 * the type of board in software. ISA PnP, PCI, and PCMCIA
683 * devices are such boards.
684 */
685 .board_name = &skel_boards[0].name,
686 .offset = sizeof(struct skel_board),
687 .num_names = ARRAY_SIZE(skel_boards),
688};
689
690#ifdef CONFIG_COMEDI_PCI_DRIVERS
691
692/* This is used by modprobe to translate PCI IDs to drivers. Should
693 * only be used for PCI and ISA-PnP devices */
694/* Please add your PCI vendor ID to comedidev.h, and it will be forwarded
695 * upstream. */
696#define PCI_VENDOR_ID_SKEL 0xdafe
697static DEFINE_PCI_DEVICE_TABLE(skel_pci_table) = {
698 { PCI_DEVICE(PCI_VENDOR_ID_SKEL, 0x0100) },
699 { PCI_DEVICE(PCI_VENDOR_ID_SKEL, 0x0200) },
700 { 0 }
701};
702MODULE_DEVICE_TABLE(pci, skel_pci_table);
703
704static int skel_pci_probe(struct pci_dev *dev,
705 const struct pci_device_id *ent)
636{ 706{
637 return comedi_driver_register(&driver_skel); 707 return comedi_pci_auto_config(dev, &skel_driver);
638} 708}
639 709
640static void __exit driver_skel_cleanup_module(void) 710static void skel_pci_remove(struct pci_dev *dev)
641{ 711{
642 comedi_driver_unregister(&driver_skel); 712 comedi_pci_auto_unconfig(dev);
643} 713}
644 714
645module_init(driver_skel_init_module); 715static struct pci_driver skel_pci_driver = {
646module_exit(driver_skel_cleanup_module); 716 .id_table = skel_pci_table,
717 .probe = &skel_pci_probe,
718 .remove = &skel_pci_remove
719};
720module_comedi_pci_driver(skel_driver, skel_pci_driver);
721#else
722module_comedi_driver(skel_driver);
647#endif 723#endif
648 724
649MODULE_AUTHOR("Comedi http://www.comedi.org"); 725MODULE_AUTHOR("Comedi http://www.comedi.org");
diff --git a/drivers/staging/comedi/drivers/ssv_dnp.c b/drivers/staging/comedi/drivers/ssv_dnp.c
index ae3aa1c5caef..afa4016f906a 100644
--- a/drivers/staging/comedi/drivers/ssv_dnp.c
+++ b/drivers/staging/comedi/drivers/ssv_dnp.c
@@ -50,15 +50,6 @@ Status: unknown
50#define PCMR 0xa3 /* Port C Mode Register */ 50#define PCMR 0xa3 /* Port C Mode Register */
51#define PCDR 0xa7 /* Port C Data Register */ 51#define PCDR 0xa7 /* Port C Data Register */
52 52
53/* This data structure holds information about the supported boards -------- */
54
55struct dnp_board {
56 const char *name;
57 int ai_chans;
58 int ai_bits;
59 int have_dio;
60};
61
62/* ------------------------------------------------------------------------- */ 53/* ------------------------------------------------------------------------- */
63/* The insn_bits interface allows packed reading/writing of DIO channels. */ 54/* The insn_bits interface allows packed reading/writing of DIO channels. */
64/* The comedi core can convert between insn_bits and insn_read/write, so you */ 55/* The comedi core can convert between insn_bits and insn_read/write, so you */
@@ -173,11 +164,10 @@ static int dnp_dio_insn_config(struct comedi_device *dev,
173 164
174static int dnp_attach(struct comedi_device *dev, struct comedi_devconfig *it) 165static int dnp_attach(struct comedi_device *dev, struct comedi_devconfig *it)
175{ 166{
176 const struct dnp_board *board = comedi_board(dev);
177 struct comedi_subdevice *s; 167 struct comedi_subdevice *s;
178 int ret; 168 int ret;
179 169
180 dev->board_name = board->name; 170 dev->board_name = dev->driver->driver_name;
181 171
182 ret = comedi_alloc_subdevices(dev, 1); 172 ret = comedi_alloc_subdevices(dev, 1);
183 if (ret) 173 if (ret)
@@ -219,23 +209,11 @@ static void dnp_detach(struct comedi_device *dev)
219 outb((inb(CSCDR) & 0xAA), CSCDR); 209 outb((inb(CSCDR) & 0xAA), CSCDR);
220} 210}
221 211
222static const struct dnp_board dnp_boards[] = {
223 {
224 .name = "dnp-1486",
225 .ai_chans = 16,
226 .ai_bits = 12,
227 .have_dio = 1,
228 },
229};
230
231static struct comedi_driver dnp_driver = { 212static struct comedi_driver dnp_driver = {
232 .driver_name = "ssv_dnp", 213 .driver_name = "dnp-1486",
233 .module = THIS_MODULE, 214 .module = THIS_MODULE,
234 .attach = dnp_attach, 215 .attach = dnp_attach,
235 .detach = dnp_detach, 216 .detach = dnp_detach,
236 .board_name = &dnp_boards[0].name,
237 .offset = sizeof(struct dnp_board),
238 .num_names = ARRAY_SIZE(dnp_boards),
239}; 217};
240module_comedi_driver(dnp_driver); 218module_comedi_driver(dnp_driver);
241 219
diff --git a/drivers/staging/comedi/drivers/unioxx5.c b/drivers/staging/comedi/drivers/unioxx5.c
index 9f1fdec62dcb..c9ded938314f 100644
--- a/drivers/staging/comedi/drivers/unioxx5.c
+++ b/drivers/staging/comedi/drivers/unioxx5.c
@@ -42,6 +42,8 @@ Devices: [Fastwel] UNIOxx-5 (unioxx5),
42 42
43*/ 43*/
44 44
45#define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
46
45#include "../comedidev.h" 47#include "../comedidev.h"
46#include <linux/ioport.h> 48#include <linux/ioport.h>
47#include <linux/slab.h> 49#include <linux/slab.h>
@@ -144,8 +146,7 @@ static int __unioxx5_digital_read(struct unioxx5_subd_priv *usp,
144 146
145 channel_offset = __unioxx5_define_chan_offset(channel); 147 channel_offset = __unioxx5_define_chan_offset(channel);
146 if (channel_offset < 0) { 148 if (channel_offset < 0) {
147 printk(KERN_ERR 149 pr_err("comedi%d: undefined channel %d. channel range is 0 .. 23\n",
148 "comedi%d: undefined channel %d. channel range is 0 .. 23\n",
149 minor, channel); 150 minor, channel);
150 return 0; 151 return 0;
151 } 152 }
@@ -171,8 +172,7 @@ static int __unioxx5_analog_read(struct unioxx5_subd_priv *usp,
171 172
172 /* defining if given module can work on input */ 173 /* defining if given module can work on input */
173 if (usp->usp_module_type[module_no] & MODULE_OUTPUT_MASK) { 174 if (usp->usp_module_type[module_no] & MODULE_OUTPUT_MASK) {
174 printk(KERN_ERR 175 pr_err("comedi%d: module in position %d with id 0x%02x is for output only",
175 "comedi%d: module in position %d with id 0x%02x is for output only",
176 minor, module_no, usp->usp_module_type[module_no]); 176 minor, module_no, usp->usp_module_type[module_no]);
177 return 0; 177 return 0;
178 } 178 }
@@ -209,8 +209,7 @@ static int __unioxx5_digital_write(struct unioxx5_subd_priv *usp,
209 209
210 channel_offset = __unioxx5_define_chan_offset(channel); 210 channel_offset = __unioxx5_define_chan_offset(channel);
211 if (channel_offset < 0) { 211 if (channel_offset < 0) {
212 printk(KERN_ERR 212 pr_err("comedi%d: undefined channel %d. channel range is 0 .. 23\n",
213 "comedi%d: undefined channel %d. channel range is 0 .. 23\n",
214 minor, channel); 213 minor, channel);
215 return 0; 214 return 0;
216 } 215 }
@@ -240,8 +239,7 @@ static int __unioxx5_analog_write(struct unioxx5_subd_priv *usp,
240 239
241 /* defining if given module can work on output */ 240 /* defining if given module can work on output */
242 if (!(usp->usp_module_type[module] & MODULE_OUTPUT_MASK)) { 241 if (!(usp->usp_module_type[module] & MODULE_OUTPUT_MASK)) {
243 printk(KERN_ERR 242 pr_err("comedi%d: module in position %d with id 0x%0x is for input only!\n",
244 "comedi%d: module in position %d with id 0x%0x is for input only!\n",
245 minor, module, usp->usp_module_type[module]); 243 minor, module, usp->usp_module_type[module]);
246 return 0; 244 return 0;
247 } 245 }
@@ -323,17 +321,17 @@ static int unioxx5_insn_config(struct comedi_device *dev,
323 type = usp->usp_module_type[channel / 2]; 321 type = usp->usp_module_type[channel / 2];
324 322
325 if (type != MODULE_DIGITAL) { 323 if (type != MODULE_DIGITAL) {
326 printk(KERN_ERR 324 dev_err(dev->class_dev,
327 "comedi%d: channel configuration accessible only for digital modules\n", 325 "comedi%d: channel configuration accessible only for digital modules\n",
328 dev->minor); 326 dev->minor);
329 return -1; 327 return -1;
330 } 328 }
331 329
332 channel_offset = __unioxx5_define_chan_offset(channel); 330 channel_offset = __unioxx5_define_chan_offset(channel);
333 if (channel_offset < 0) { 331 if (channel_offset < 0) {
334 printk(KERN_ERR 332 dev_err(dev->class_dev,
335 "comedi%d: undefined channel %d. channel range is 0 .. 23\n", 333 "comedi%d: undefined channel %d. channel range is 0 .. 23\n",
336 dev->minor, channel); 334 dev->minor, channel);
337 return -1; 335 return -1;
338 } 336 }
339 337
@@ -348,7 +346,8 @@ static int unioxx5_insn_config(struct comedi_device *dev,
348 flags |= mask; 346 flags |= mask;
349 break; 347 break;
350 default: 348 default:
351 printk(KERN_ERR "comedi%d: unknown flag\n", dev->minor); 349 dev_err(dev->class_dev,
350 "comedi%d: unknown flag\n", dev->minor);
352 return -1; 351 return -1;
353 } 352 }
354 353
@@ -375,19 +374,21 @@ static int __unioxx5_subdev_init(struct comedi_subdevice *subdev,
375 int i, to, ndef_flag = 0; 374 int i, to, ndef_flag = 0;
376 375
377 if (!request_region(subdev_iobase, UNIOXX5_SIZE, DRIVER_NAME)) { 376 if (!request_region(subdev_iobase, UNIOXX5_SIZE, DRIVER_NAME)) {
378 printk(KERN_ERR "comedi%d: I/O port conflict\n", minor); 377 dev_err(subdev->class_dev,
378 "comedi%d: I/O port conflict\n", minor);
379 return -EIO; 379 return -EIO;
380 } 380 }
381 381
382 usp = kzalloc(sizeof(*usp), GFP_KERNEL); 382 usp = kzalloc(sizeof(*usp), GFP_KERNEL);
383 383
384 if (usp == NULL) { 384 if (usp == NULL) {
385 printk(KERN_ERR "comedi%d: error! --> out of memory!\n", minor); 385 dev_err(subdev->class_dev,
386 "comedi%d: error! --> out of memory!\n", minor);
386 return -1; 387 return -1;
387 } 388 }
388 389
389 usp->usp_iobase = subdev_iobase; 390 usp->usp_iobase = subdev_iobase;
390 printk(KERN_INFO "comedi%d: |", minor); 391 dev_info(subdev->class_dev, "comedi%d: |", minor);
391 392
392 /* defining modules types */ 393 /* defining modules types */
393 for (i = 0; i < 12; i++) { 394 for (i = 0; i < 12; i++) {
@@ -433,8 +434,6 @@ static int __unioxx5_subdev_init(struct comedi_subdevice *subdev,
433 /* for digital modules only!!! */ 434 /* for digital modules only!!! */
434 subdev->insn_config = unioxx5_insn_config; 435 subdev->insn_config = unioxx5_insn_config;
435 436
436 printk(KERN_INFO "subdevice configured\n");
437
438 return 0; 437 return 0;
439} 438}
440 439
@@ -464,8 +463,8 @@ static int unioxx5_attach(struct comedi_device *dev,
464 463
465 /* unioxx5 can has from two to four subdevices */ 464 /* unioxx5 can has from two to four subdevices */
466 if (n_subd < 2) { 465 if (n_subd < 2) {
467 printk(KERN_ERR 466 dev_err(dev->class_dev,
468 "your card must has at least 2 'g01' subdevices\n"); 467 "your card must has at least 2 'g01' subdevices\n");
469 return -1; 468 return -1;
470 } 469 }
471 470
@@ -480,7 +479,6 @@ static int unioxx5_attach(struct comedi_device *dev,
480 return -1; 479 return -1;
481 } 480 }
482 481
483 printk(KERN_INFO "attached\n");
484 return 0; 482 return 0;
485} 483}
486 484
diff --git a/drivers/staging/comedi/drivers/usbdux.c b/drivers/staging/comedi/drivers/usbdux.c
index b536bba74351..78f3a2e013c4 100644
--- a/drivers/staging/comedi/drivers/usbdux.c
+++ b/drivers/staging/comedi/drivers/usbdux.c
@@ -938,9 +938,6 @@ static int usbdux_ai_cmdtest(struct comedi_device *dev,
938 if (!(this_usbduxsub->probed)) 938 if (!(this_usbduxsub->probed))
939 return -ENODEV; 939 return -ENODEV;
940 940
941 dev_dbg(&this_usbduxsub->interface->dev,
942 "comedi%d: usbdux_ai_cmdtest\n", dev->minor);
943
944 /* Step 1 : check if triggers are trivially valid */ 941 /* Step 1 : check if triggers are trivially valid */
945 942
946 err |= cfc_check_trigger_src(&cmd->start_src, TRIG_NOW | TRIG_INT); 943 err |= cfc_check_trigger_src(&cmd->start_src, TRIG_NOW | TRIG_INT);
@@ -962,19 +959,12 @@ static int usbdux_ai_cmdtest(struct comedi_device *dev,
962 if (err) 959 if (err)
963 return 2; 960 return 2;
964 961
965 /* step 3: make sure arguments are trivially compatible */ 962 /* Step 3: check if arguments are trivially valid */
966 if (cmd->start_arg != 0) {
967 cmd->start_arg = 0;
968 err++;
969 }
970 963
971 if (cmd->scan_begin_src == TRIG_FOLLOW) { 964 err |= cfc_check_trigger_arg_is(&cmd->start_arg, 0);
972 /* internal trigger */ 965
973 if (cmd->scan_begin_arg != 0) { 966 if (cmd->scan_begin_src == TRIG_FOLLOW) /* internal trigger */
974 cmd->scan_begin_arg = 0; 967 err |= cfc_check_trigger_arg_is(&cmd->scan_begin_arg, 0);
975 err++;
976 }
977 }
978 968
979 if (cmd->scan_begin_src == TRIG_TIMER) { 969 if (cmd->scan_begin_src == TRIG_TIMER) {
980 if (this_usbduxsub->high_speed) { 970 if (this_usbduxsub->high_speed) {
@@ -989,51 +979,35 @@ static int usbdux_ai_cmdtest(struct comedi_device *dev,
989 while (i < (cmd->chanlist_len)) 979 while (i < (cmd->chanlist_len))
990 i = i * 2; 980 i = i * 2;
991 981
992 if (cmd->scan_begin_arg < (1000000 / 8 * i)) { 982 err |= cfc_check_trigger_arg_min(&cmd->scan_begin_arg,
993 cmd->scan_begin_arg = 1000000 / 8 * i; 983 1000000 / 8 * i);
994 err++;
995 }
996 /* now calc the real sampling rate with all the 984 /* now calc the real sampling rate with all the
997 * rounding errors */ 985 * rounding errors */
998 tmpTimer = 986 tmpTimer =
999 ((unsigned int)(cmd->scan_begin_arg / 125000)) * 987 ((unsigned int)(cmd->scan_begin_arg / 125000)) *
1000 125000; 988 125000;
1001 if (cmd->scan_begin_arg != tmpTimer) {
1002 cmd->scan_begin_arg = tmpTimer;
1003 err++;
1004 }
1005 } else { 989 } else {
1006 /* full speed */ 990 /* full speed */
1007 /* 1kHz scans every USB frame */ 991 /* 1kHz scans every USB frame */
1008 if (cmd->scan_begin_arg < 1000000) { 992 err |= cfc_check_trigger_arg_min(&cmd->scan_begin_arg,
1009 cmd->scan_begin_arg = 1000000; 993 1000000);
1010 err++;
1011 }
1012 /* 994 /*
1013 * calc the real sampling rate with the rounding errors 995 * calc the real sampling rate with the rounding errors
1014 */ 996 */
1015 tmpTimer = ((unsigned int)(cmd->scan_begin_arg / 997 tmpTimer = ((unsigned int)(cmd->scan_begin_arg /
1016 1000000)) * 1000000; 998 1000000)) * 1000000;
1017 if (cmd->scan_begin_arg != tmpTimer) {
1018 cmd->scan_begin_arg = tmpTimer;
1019 err++;
1020 }
1021 } 999 }
1022 } 1000 err |= cfc_check_trigger_arg_is(&cmd->scan_begin_arg,
1023 /* the same argument */ 1001 tmpTimer);
1024 if (cmd->scan_end_arg != cmd->chanlist_len) {
1025 cmd->scan_end_arg = cmd->chanlist_len;
1026 err++;
1027 } 1002 }
1028 1003
1004 err |= cfc_check_trigger_arg_is(&cmd->scan_end_arg, cmd->chanlist_len);
1005
1029 if (cmd->stop_src == TRIG_COUNT) { 1006 if (cmd->stop_src == TRIG_COUNT) {
1030 /* any count is allowed */ 1007 /* any count is allowed */
1031 } else { 1008 } else {
1032 /* TRIG_NONE */ 1009 /* TRIG_NONE */
1033 if (cmd->stop_arg != 0) { 1010 err |= cfc_check_trigger_arg_is(&cmd->stop_arg, 0);
1034 cmd->stop_arg = 0;
1035 err++;
1036 }
1037 } 1011 }
1038 1012
1039 if (err) 1013 if (err)
@@ -1472,9 +1446,6 @@ static int usbdux_ao_cmdtest(struct comedi_device *dev,
1472 if (!(this_usbduxsub->probed)) 1446 if (!(this_usbduxsub->probed))
1473 return -ENODEV; 1447 return -ENODEV;
1474 1448
1475 dev_dbg(&this_usbduxsub->interface->dev,
1476 "comedi%d: usbdux_ao_cmdtest\n", dev->minor);
1477
1478 /* Step 1 : check if triggers are trivially valid */ 1449 /* Step 1 : check if triggers are trivially valid */
1479 1450
1480 err |= cfc_check_trigger_src(&cmd->start_src, TRIG_NOW | TRIG_INT); 1451 err |= cfc_check_trigger_src(&cmd->start_src, TRIG_NOW | TRIG_INT);
@@ -1519,57 +1490,30 @@ static int usbdux_ao_cmdtest(struct comedi_device *dev,
1519 if (err) 1490 if (err)
1520 return 2; 1491 return 2;
1521 1492
1522 /* step 3: make sure arguments are trivially compatible */ 1493 /* Step 3: check if arguments are trivially valid */
1523 1494
1524 if (cmd->start_arg != 0) { 1495 err |= cfc_check_trigger_arg_is(&cmd->start_arg, 0);
1525 cmd->start_arg = 0;
1526 err++;
1527 }
1528 1496
1529 if (cmd->scan_begin_src == TRIG_FOLLOW) { 1497 if (cmd->scan_begin_src == TRIG_FOLLOW) /* internal trigger */
1530 /* internal trigger */ 1498 err |= cfc_check_trigger_arg_is(&cmd->scan_begin_arg, 0);
1531 if (cmd->scan_begin_arg != 0) { 1499
1532 cmd->scan_begin_arg = 0; 1500 if (cmd->scan_begin_src == TRIG_TIMER)
1533 err++; 1501 err |= cfc_check_trigger_arg_min(&cmd->scan_begin_arg,
1534 } 1502 1000000);
1535 }
1536 1503
1537 if (cmd->scan_begin_src == TRIG_TIMER) {
1538 /* timer */
1539 if (cmd->scan_begin_arg < 1000000) {
1540 cmd->scan_begin_arg = 1000000;
1541 err++;
1542 }
1543 }
1544 /* not used now, is for later use */ 1504 /* not used now, is for later use */
1545 if (cmd->convert_src == TRIG_TIMER) { 1505 if (cmd->convert_src == TRIG_TIMER)
1546 if (cmd->convert_arg < 125000) { 1506 err |= cfc_check_trigger_arg_min(&cmd->convert_arg, 125000);
1547 cmd->convert_arg = 125000;
1548 err++;
1549 }
1550 }
1551 1507
1552 /* the same argument */ 1508 err |= cfc_check_trigger_arg_is(&cmd->scan_end_arg, cmd->chanlist_len);
1553 if (cmd->scan_end_arg != cmd->chanlist_len) {
1554 cmd->scan_end_arg = cmd->chanlist_len;
1555 err++;
1556 }
1557 1509
1558 if (cmd->stop_src == TRIG_COUNT) { 1510 if (cmd->stop_src == TRIG_COUNT) {
1559 /* any count is allowed */ 1511 /* any count is allowed */
1560 } else { 1512 } else {
1561 /* TRIG_NONE */ 1513 /* TRIG_NONE */
1562 if (cmd->stop_arg != 0) { 1514 err |= cfc_check_trigger_arg_is(&cmd->stop_arg, 0);
1563 cmd->stop_arg = 0;
1564 err++;
1565 }
1566 } 1515 }
1567 1516
1568 dev_dbg(&this_usbduxsub->interface->dev, "comedi%d: err=%d, "
1569 "scan_begin_src=%d, scan_begin_arg=%d, convert_src=%d, "
1570 "convert_arg=%d\n", dev->minor, err, cmd->scan_begin_src,
1571 cmd->scan_begin_arg, cmd->convert_src, cmd->convert_arg);
1572
1573 if (err) 1517 if (err)
1574 return 3; 1518 return 3;
1575 1519
@@ -2375,9 +2319,10 @@ static int usbdux_attach_common(struct comedi_device *dev,
2375 return 0; 2319 return 0;
2376} 2320}
2377 2321
2378static int usbdux_attach_usb(struct comedi_device *dev, 2322static int usbdux_auto_attach(struct comedi_device *dev,
2379 struct usb_interface *uinterf) 2323 unsigned long context_unused)
2380{ 2324{
2325 struct usb_interface *uinterf = comedi_to_usb_interface(dev);
2381 int ret; 2326 int ret;
2382 struct usbduxsub *this_usbduxsub; 2327 struct usbduxsub *this_usbduxsub;
2383 2328
@@ -2386,14 +2331,12 @@ static int usbdux_attach_usb(struct comedi_device *dev,
2386 down(&start_stop_sem); 2331 down(&start_stop_sem);
2387 this_usbduxsub = usb_get_intfdata(uinterf); 2332 this_usbduxsub = usb_get_intfdata(uinterf);
2388 if (!this_usbduxsub || !this_usbduxsub->probed) { 2333 if (!this_usbduxsub || !this_usbduxsub->probed) {
2389 printk(KERN_ERR 2334 dev_err(dev->class_dev,
2390 "comedi%d: usbdux: error: attach_usb failed, not connected\n", 2335 "usbdux: error: auto_attach failed, not connected\n");
2391 dev->minor);
2392 ret = -ENODEV; 2336 ret = -ENODEV;
2393 } else if (this_usbduxsub->attached) { 2337 } else if (this_usbduxsub->attached) {
2394 printk(KERN_ERR 2338 dev_err(dev->class_dev,
2395 "comedi%d: usbdux: error: attach_usb failed, already attached\n", 2339 "error: auto_attach failed, already attached\n");
2396 dev->minor);
2397 ret = -ENODEV; 2340 ret = -ENODEV;
2398 } else 2341 } else
2399 ret = usbdux_attach_common(dev, this_usbduxsub); 2342 ret = usbdux_attach_common(dev, this_usbduxsub);
@@ -2417,7 +2360,7 @@ static void usbdux_detach(struct comedi_device *dev)
2417static struct comedi_driver usbdux_driver = { 2360static struct comedi_driver usbdux_driver = {
2418 .driver_name = "usbdux", 2361 .driver_name = "usbdux",
2419 .module = THIS_MODULE, 2362 .module = THIS_MODULE,
2420 .attach_usb = usbdux_attach_usb, 2363 .auto_attach = usbdux_auto_attach,
2421 .detach = usbdux_detach, 2364 .detach = usbdux_detach,
2422}; 2365};
2423 2366
diff --git a/drivers/staging/comedi/drivers/usbduxfast.c b/drivers/staging/comedi/drivers/usbduxfast.c
index 1154a7e2895d..4e19f6186f28 100644
--- a/drivers/staging/comedi/drivers/usbduxfast.c
+++ b/drivers/staging/comedi/drivers/usbduxfast.c
@@ -37,6 +37,8 @@
37 * udev coldplug problem 37 * udev coldplug problem
38 */ 38 */
39 39
40#define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
41
40#include <linux/kernel.h> 42#include <linux/kernel.h>
41#include <linux/firmware.h> 43#include <linux/firmware.h>
42#include <linux/module.h> 44#include <linux/module.h>
@@ -216,8 +218,9 @@ static int send_dux_commands(struct usbduxfastsub_s *udfs, int cmd_type)
216 usb_sndbulkpipe(udfs->usbdev, CHANNELLISTEP), 218 usb_sndbulkpipe(udfs->usbdev, CHANNELLISTEP),
217 udfs->dux_commands, SIZEOFDUXBUFFER, &nsent, 10000); 219 udfs->dux_commands, SIZEOFDUXBUFFER, &nsent, 10000);
218 if (tmp < 0) 220 if (tmp < 0)
219 printk(KERN_ERR "comedi%d: could not transmit dux_commands to" 221 dev_err(&udfs->interface->dev,
220 "the usb-device, err=%d\n", udfs->comedidev->minor, tmp); 222 "could not transmit dux_commands to the usb-device, err=%d\n",
223 tmp);
221 return tmp; 224 return tmp;
222} 225}
223 226
@@ -252,7 +255,7 @@ static int usbduxfast_ai_stop(struct usbduxfastsub_s *udfs, int do_unlink)
252 int ret = 0; 255 int ret = 0;
253 256
254 if (!udfs) { 257 if (!udfs) {
255 printk(KERN_ERR "comedi?: usbduxfast_ai_stop: udfs=NULL!\n"); 258 pr_err("%s: udfs=NULL!\n", __func__);
256 return -EFAULT; 259 return -EFAULT;
257 } 260 }
258#ifdef CONFIG_COMEDI_DEBUG 261#ifdef CONFIG_COMEDI_DEBUG
@@ -284,7 +287,7 @@ static int usbduxfast_ai_cancel(struct comedi_device *dev,
284#endif 287#endif
285 udfs = dev->private; 288 udfs = dev->private;
286 if (!udfs) { 289 if (!udfs) {
287 printk(KERN_ERR "comedi: usbduxfast_ai_cancel: udfs=NULL\n"); 290 dev_err(dev->class_dev, "%s: udfs=NULL\n", __func__);
288 return -EFAULT; 291 return -EFAULT;
289 } 292 }
290 down(&udfs->sem); 293 down(&udfs->sem);
@@ -309,26 +312,22 @@ static void usbduxfastsub_ai_Irq(struct urb *urb)
309 struct usbduxfastsub_s *udfs; 312 struct usbduxfastsub_s *udfs;
310 struct comedi_device *this_comedidev; 313 struct comedi_device *this_comedidev;
311 struct comedi_subdevice *s; 314 struct comedi_subdevice *s;
312 uint16_t *p;
313 315
314 /* sanity checks - is the urb there? */ 316 /* sanity checks - is the urb there? */
315 if (!urb) { 317 if (!urb) {
316 printk(KERN_ERR "comedi_: usbduxfast_: ao int-handler called " 318 pr_err("ao int-handler called with urb=NULL!\n");
317 "with urb=NULL!\n");
318 return; 319 return;
319 } 320 }
320 /* the context variable points to the subdevice */ 321 /* the context variable points to the subdevice */
321 this_comedidev = urb->context; 322 this_comedidev = urb->context;
322 if (!this_comedidev) { 323 if (!this_comedidev) {
323 printk(KERN_ERR "comedi_: usbduxfast_: urb context is a NULL " 324 pr_err("urb context is a NULL pointer!\n");
324 "pointer!\n");
325 return; 325 return;
326 } 326 }
327 /* the private structure of the subdevice is usbduxfastsub_s */ 327 /* the private structure of the subdevice is usbduxfastsub_s */
328 udfs = this_comedidev->private; 328 udfs = this_comedidev->private;
329 if (!udfs) { 329 if (!udfs) {
330 printk(KERN_ERR "comedi_: usbduxfast_: private of comedi " 330 pr_err("private of comedi subdev is a NULL pointer!\n");
331 "subdev is a NULL pointer!\n");
332 return; 331 return;
333 } 332 }
334 /* are we running a command? */ 333 /* are we running a command? */
@@ -370,9 +369,8 @@ static void usbduxfastsub_ai_Irq(struct urb *urb)
370 return; 369 return;
371 370
372 default: 371 default:
373 printk("comedi%d: usbduxfast: non-zero urb status received in " 372 pr_err("non-zero urb status received in ai intr context: %d\n",
374 "ai intr context: %d\n", 373 urb->status);
375 udfs->comedidev->minor, urb->status);
376 s->async->events |= COMEDI_CB_EOA; 374 s->async->events |= COMEDI_CB_EOA;
377 s->async->events |= COMEDI_CB_ERROR; 375 s->async->events |= COMEDI_CB_ERROR;
378 comedi_event(udfs->comedidev, s); 376 comedi_event(udfs->comedidev, s);
@@ -380,7 +378,6 @@ static void usbduxfastsub_ai_Irq(struct urb *urb)
380 return; 378 return;
381 } 379 }
382 380
383 p = urb->transfer_buffer;
384 if (!udfs->ignore) { 381 if (!udfs->ignore) {
385 if (!udfs->ai_continous) { 382 if (!udfs->ai_continous) {
386 /* not continuous, fixed number of samples */ 383 /* not continuous, fixed number of samples */
@@ -427,8 +424,8 @@ static void usbduxfastsub_ai_Irq(struct urb *urb)
427 urb->status = 0; 424 urb->status = 0;
428 err = usb_submit_urb(urb, GFP_ATOMIC); 425 err = usb_submit_urb(urb, GFP_ATOMIC);
429 if (err < 0) { 426 if (err < 0) {
430 printk(KERN_ERR "comedi%d: usbduxfast: urb resubm failed: %d", 427 dev_err(&urb->dev->dev,
431 udfs->comedidev->minor, err); 428 "urb resubm failed: %d", err);
432 s->async->events |= COMEDI_CB_EOA; 429 s->async->events |= COMEDI_CB_EOA;
433 s->async->events |= COMEDI_CB_ERROR; 430 s->async->events |= COMEDI_CB_ERROR;
434 comedi_event(udfs->comedidev, s); 431 comedi_event(udfs->comedidev, s);
@@ -454,7 +451,8 @@ static int usbduxfastsub_start(struct usbduxfastsub_s *udfs)
454 1, /* Length */ 451 1, /* Length */
455 EZTIMEOUT); /* Timeout */ 452 EZTIMEOUT); /* Timeout */
456 if (ret < 0) { 453 if (ret < 0) {
457 printk("comedi_: usbduxfast_: control msg failed (start)\n"); 454 dev_err(&udfs->interface->dev,
455 "control msg failed (start)\n");
458 return ret; 456 return ret;
459 } 457 }
460 458
@@ -477,8 +475,8 @@ static int usbduxfastsub_stop(struct usbduxfastsub_s *udfs)
477 local_transfer_buffer, 1, /* Length */ 475 local_transfer_buffer, 1, /* Length */
478 EZTIMEOUT); /* Timeout */ 476 EZTIMEOUT); /* Timeout */
479 if (ret < 0) { 477 if (ret < 0) {
480 printk(KERN_ERR "comedi_: usbduxfast: control msg failed " 478 dev_err(&udfs->interface->dev,
481 "(stop)\n"); 479 "control msg failed (stop)\n");
482 return ret; 480 return ret;
483 } 481 }
484 482
@@ -512,7 +510,7 @@ static int usbduxfastsub_upload(struct usbduxfastsub_s *udfs,
512#endif 510#endif
513 511
514 if (ret < 0) { 512 if (ret < 0) {
515 printk(KERN_ERR "comedi_: usbduxfast: uppload failed\n"); 513 dev_err(&udfs->interface->dev, "uppload failed\n");
516 return ret; 514 return ret;
517 } 515 }
518 516
@@ -538,8 +536,8 @@ static int usbduxfastsub_submit_InURBs(struct usbduxfastsub_s *udfs)
538#endif 536#endif
539 ret = usb_submit_urb(udfs->urbIn, GFP_ATOMIC); 537 ret = usb_submit_urb(udfs->urbIn, GFP_ATOMIC);
540 if (ret) { 538 if (ret) {
541 printk(KERN_ERR "comedi_: usbduxfast: ai: usb_submit_urb error" 539 dev_err(&udfs->interface->dev,
542 " %d\n", ret); 540 "ai: usb_submit_urb error %d\n", ret);
543 return ret; 541 return ret;
544 } 542 }
545 return 0; 543 return 0;
@@ -557,12 +555,6 @@ static int usbduxfast_ai_cmdtest(struct comedi_device *dev,
557 if (!udfs->probed) 555 if (!udfs->probed)
558 return -ENODEV; 556 return -ENODEV;
559 557
560#ifdef CONFIG_COMEDI_DEBUG
561 printk(KERN_DEBUG "comedi%d: usbduxfast_ai_cmdtest\n", dev->minor);
562 printk(KERN_DEBUG "comedi%d: usbduxfast: convert_arg=%u "
563 "scan_begin_arg=%u\n",
564 dev->minor, cmd->convert_arg, cmd->scan_begin_arg);
565#endif
566 /* Step 1 : check if triggers are trivially valid */ 558 /* Step 1 : check if triggers are trivially valid */
567 559
568 err |= cfc_check_trigger_src(&cmd->start_src, 560 err |= cfc_check_trigger_src(&cmd->start_src,
@@ -592,20 +584,15 @@ static int usbduxfast_ai_cmdtest(struct comedi_device *dev,
592 if (err) 584 if (err)
593 return 2; 585 return 2;
594 586
595 /* step 3: make sure arguments are trivially compatible */ 587 /* Step 3: check if arguments are trivially valid */
596 588
597 if (cmd->start_src == TRIG_NOW && cmd->start_arg != 0) { 589 if (cmd->start_src == TRIG_NOW)
598 cmd->start_arg = 0; 590 err |= cfc_check_trigger_arg_is(&cmd->start_arg, 0);
599 err++;
600 }
601 591
602 if (!cmd->chanlist_len) 592 if (!cmd->chanlist_len)
603 err++; 593 err |= -EINVAL;
604 594
605 if (cmd->scan_end_arg != cmd->chanlist_len) { 595 err |= cfc_check_trigger_arg_is(&cmd->scan_end_arg, cmd->chanlist_len);
606 cmd->scan_end_arg = cmd->chanlist_len;
607 err++;
608 }
609 596
610 if (cmd->chanlist_len == 1) 597 if (cmd->chanlist_len == 1)
611 minSamplPer = 1; 598 minSamplPer = 1;
@@ -622,28 +609,19 @@ static int usbduxfast_ai_cmdtest(struct comedi_device *dev,
622 609
623 /* calc arg again */ 610 /* calc arg again */
624 tmp = steps / 30; 611 tmp = steps / 30;
625 if (cmd->convert_arg != tmp) { 612 err |= cfc_check_trigger_arg_is(&cmd->convert_arg, tmp);
626 cmd->convert_arg = tmp;
627 err++;
628 }
629 } 613 }
630 614
631 if (cmd->scan_begin_src == TRIG_TIMER) 615 if (cmd->scan_begin_src == TRIG_TIMER)
632 err++; 616 err |= -EINVAL;
633 617
634 /* stop source */ 618 /* stop source */
635 switch (cmd->stop_src) { 619 switch (cmd->stop_src) {
636 case TRIG_COUNT: 620 case TRIG_COUNT:
637 if (!cmd->stop_arg) { 621 err |= cfc_check_trigger_arg_min(&cmd->stop_arg, 1);
638 cmd->stop_arg = 1;
639 err++;
640 }
641 break; 622 break;
642 case TRIG_NONE: 623 case TRIG_NONE:
643 if (cmd->stop_arg != 0) { 624 err |= cfc_check_trigger_arg_is(&cmd->stop_arg, 0);
644 cmd->stop_arg = 0;
645 err++;
646 }
647 break; 625 break;
648 /* 626 /*
649 * TRIG_EXT doesn't care since it doesn't trigger 627 * TRIG_EXT doesn't care since it doesn't trigger
@@ -682,8 +660,7 @@ static int usbduxfast_ai_inttrig(struct comedi_device *dev,
682#endif 660#endif
683 661
684 if (trignum != 0) { 662 if (trignum != 0) {
685 printk(KERN_ERR "comedi%d: usbduxfast_ai_inttrig: invalid" 663 dev_err(dev->class_dev, "%s: invalid trignum\n", __func__);
686 " trignum\n", dev->minor);
687 up(&udfs->sem); 664 up(&udfs->sem);
688 return -EINVAL; 665 return -EINVAL;
689 } 666 }
@@ -691,16 +668,16 @@ static int usbduxfast_ai_inttrig(struct comedi_device *dev,
691 udfs->ai_cmd_running = 1; 668 udfs->ai_cmd_running = 1;
692 ret = usbduxfastsub_submit_InURBs(udfs); 669 ret = usbduxfastsub_submit_InURBs(udfs);
693 if (ret < 0) { 670 if (ret < 0) {
694 printk(KERN_ERR "comedi%d: usbduxfast_ai_inttrig: " 671 dev_err(dev->class_dev,
695 "urbSubmit: err=%d\n", dev->minor, ret); 672 "%s: urbSubmit: err=%d\n", __func__, ret);
696 udfs->ai_cmd_running = 0; 673 udfs->ai_cmd_running = 0;
697 up(&udfs->sem); 674 up(&udfs->sem);
698 return ret; 675 return ret;
699 } 676 }
700 s->async->inttrig = NULL; 677 s->async->inttrig = NULL;
701 } else { 678 } else {
702 printk(KERN_ERR "comedi%d: ai_inttrig but acqu is already" 679 dev_err(dev->class_dev,
703 " running\n", dev->minor); 680 "ai_inttrig but acqu is already running\n");
704 } 681 }
705 up(&udfs->sem); 682 up(&udfs->sem);
706 return 1; 683 return 1;
@@ -738,8 +715,8 @@ static int usbduxfast_ai_cmd(struct comedi_device *dev,
738 return -ENODEV; 715 return -ENODEV;
739 } 716 }
740 if (udfs->ai_cmd_running) { 717 if (udfs->ai_cmd_running) {
741 printk(KERN_ERR "comedi%d: ai_cmd not possible. Another ai_cmd" 718 dev_err(dev->class_dev,
742 " is running.\n", dev->minor); 719 "ai_cmd not possible. Another ai_cmd is running.\n");
743 up(&udfs->sem); 720 up(&udfs->sem);
744 return -EBUSY; 721 return -EBUSY;
745 } 722 }
@@ -757,31 +734,29 @@ static int usbduxfast_ai_cmd(struct comedi_device *dev,
757 for (i = 0; i < cmd->chanlist_len; ++i) { 734 for (i = 0; i < cmd->chanlist_len; ++i) {
758 chan = CR_CHAN(cmd->chanlist[i]); 735 chan = CR_CHAN(cmd->chanlist[i]);
759 if (chan != i) { 736 if (chan != i) {
760 printk(KERN_ERR "comedi%d: cmd is accepting " 737 dev_err(dev->class_dev,
761 "only consecutive channels.\n", 738 "cmd is accepting only consecutive channels.\n");
762 dev->minor);
763 up(&udfs->sem); 739 up(&udfs->sem);
764 return -EINVAL; 740 return -EINVAL;
765 } 741 }
766 if ((gain != CR_RANGE(cmd->chanlist[i])) 742 if ((gain != CR_RANGE(cmd->chanlist[i]))
767 && (cmd->chanlist_len > 3)) { 743 && (cmd->chanlist_len > 3)) {
768 printk(KERN_ERR "comedi%d: the gain must be" 744 dev_err(dev->class_dev,
769 " the same for all channels.\n", 745 "the gain must be the same for all channels.\n");
770 dev->minor);
771 up(&udfs->sem); 746 up(&udfs->sem);
772 return -EINVAL; 747 return -EINVAL;
773 } 748 }
774 if (i >= NUMCHANNELS) { 749 if (i >= NUMCHANNELS) {
775 printk(KERN_ERR "comedi%d: channel list too" 750 dev_err(dev->class_dev,
776 " long\n", dev->minor); 751 "channel list too long\n");
777 break; 752 break;
778 } 753 }
779 } 754 }
780 } 755 }
781 steps = 0; 756 steps = 0;
782 if (cmd->scan_begin_src == TRIG_TIMER) { 757 if (cmd->scan_begin_src == TRIG_TIMER) {
783 printk(KERN_ERR "comedi%d: usbduxfast: " 758 dev_err(dev->class_dev,
784 "scan_begin_src==TRIG_TIMER not valid.\n", dev->minor); 759 "scan_begin_src==TRIG_TIMER not valid.\n");
785 up(&udfs->sem); 760 up(&udfs->sem);
786 return -EINVAL; 761 return -EINVAL;
787 } 762 }
@@ -789,22 +764,21 @@ static int usbduxfast_ai_cmd(struct comedi_device *dev,
789 steps = (cmd->convert_arg * 30) / 1000; 764 steps = (cmd->convert_arg * 30) / 1000;
790 765
791 if ((steps < MIN_SAMPLING_PERIOD) && (cmd->chanlist_len != 1)) { 766 if ((steps < MIN_SAMPLING_PERIOD) && (cmd->chanlist_len != 1)) {
792 printk(KERN_ERR "comedi%d: usbduxfast: ai_cmd: steps=%ld, " 767 dev_err(dev->class_dev,
793 "scan_begin_arg=%d. Not properly tested by cmdtest?\n", 768 "ai_cmd: steps=%ld, scan_begin_arg=%d. Not properly tested by cmdtest?\n",
794 dev->minor, steps, cmd->scan_begin_arg); 769 steps, cmd->scan_begin_arg);
795 up(&udfs->sem); 770 up(&udfs->sem);
796 return -EINVAL; 771 return -EINVAL;
797 } 772 }
798 if (steps > MAX_SAMPLING_PERIOD) { 773 if (steps > MAX_SAMPLING_PERIOD) {
799 printk(KERN_ERR "comedi%d: usbduxfast: ai_cmd: sampling rate " 774 dev_err(dev->class_dev, "ai_cmd: sampling rate too low.\n");
800 "too low.\n", dev->minor);
801 up(&udfs->sem); 775 up(&udfs->sem);
802 return -EINVAL; 776 return -EINVAL;
803 } 777 }
804 if ((cmd->start_src == TRIG_EXT) && (cmd->chanlist_len != 1) 778 if ((cmd->start_src == TRIG_EXT) && (cmd->chanlist_len != 1)
805 && (cmd->chanlist_len != 16)) { 779 && (cmd->chanlist_len != 16)) {
806 printk(KERN_ERR "comedi%d: usbduxfast: ai_cmd: TRIG_EXT only" 780 dev_err(dev->class_dev,
807 " with 1 or 16 channels possible.\n", dev->minor); 781 "ai_cmd: TRIG_EXT only with 1 or 16 channels possible.\n");
808 up(&udfs->sem); 782 up(&udfs->sem);
809 return -EINVAL; 783 return -EINVAL;
810 } 784 }
@@ -1121,8 +1095,7 @@ static int usbduxfast_ai_cmd(struct comedi_device *dev,
1121 break; 1095 break;
1122 1096
1123 default: 1097 default:
1124 printk(KERN_ERR "comedi %d: unsupported combination of " 1098 dev_err(dev->class_dev, "unsupported combination of channels\n");
1125 "channels\n", dev->minor);
1126 up(&udfs->sem); 1099 up(&udfs->sem);
1127 return -EFAULT; 1100 return -EFAULT;
1128 } 1101 }
@@ -1134,17 +1107,16 @@ static int usbduxfast_ai_cmd(struct comedi_device *dev,
1134 /* 0 means that the AD commands are sent */ 1107 /* 0 means that the AD commands are sent */
1135 result = send_dux_commands(udfs, SENDADCOMMANDS); 1108 result = send_dux_commands(udfs, SENDADCOMMANDS);
1136 if (result < 0) { 1109 if (result < 0) {
1137 printk(KERN_ERR "comedi%d: adc command could not be submitted." 1110 dev_err(dev->class_dev,
1138 "Aborting...\n", dev->minor); 1111 "adc command could not be submitted. Aborting...\n");
1139 up(&udfs->sem); 1112 up(&udfs->sem);
1140 return result; 1113 return result;
1141 } 1114 }
1142 if (cmd->stop_src == TRIG_COUNT) { 1115 if (cmd->stop_src == TRIG_COUNT) {
1143 udfs->ai_sample_count = cmd->stop_arg * cmd->scan_end_arg; 1116 udfs->ai_sample_count = cmd->stop_arg * cmd->scan_end_arg;
1144 if (udfs->ai_sample_count < 1) { 1117 if (udfs->ai_sample_count < 1) {
1145 printk(KERN_ERR "comedi%d: " 1118 dev_err(dev->class_dev,
1146 "(cmd->stop_arg)*(cmd->scan_end_arg)<1, " 1119 "(cmd->stop_arg)*(cmd->scan_end_arg)<1, aborting.\n");
1147 "aborting.\n", dev->minor);
1148 up(&udfs->sem); 1120 up(&udfs->sem);
1149 return -EFAULT; 1121 return -EFAULT;
1150 } 1122 }
@@ -1193,8 +1165,7 @@ static int usbduxfast_ai_insn_read(struct comedi_device *dev,
1193 1165
1194 udfs = dev->private; 1166 udfs = dev->private;
1195 if (!udfs) { 1167 if (!udfs) {
1196 printk(KERN_ERR "comedi%d: ai_insn_read: no usb dev.\n", 1168 dev_err(dev->class_dev, "%s: no usb dev.\n", __func__);
1197 dev->minor);
1198 return -ENODEV; 1169 return -ENODEV;
1199 } 1170 }
1200#ifdef CONFIG_COMEDI_DEBUG 1171#ifdef CONFIG_COMEDI_DEBUG
@@ -1207,8 +1178,8 @@ static int usbduxfast_ai_insn_read(struct comedi_device *dev,
1207 return -ENODEV; 1178 return -ENODEV;
1208 } 1179 }
1209 if (udfs->ai_cmd_running) { 1180 if (udfs->ai_cmd_running) {
1210 printk(KERN_ERR "comedi%d: ai_insn_read not possible. Async " 1181 dev_err(dev->class_dev,
1211 "Command is running.\n", dev->minor); 1182 "ai_insn_read not possible. Async Command is running.\n");
1212 up(&udfs->sem); 1183 up(&udfs->sem);
1213 return -EBUSY; 1184 return -EBUSY;
1214 } 1185 }
@@ -1268,8 +1239,8 @@ static int usbduxfast_ai_insn_read(struct comedi_device *dev,
1268 /* 0 means that the AD commands are sent */ 1239 /* 0 means that the AD commands are sent */
1269 err = send_dux_commands(udfs, SENDADCOMMANDS); 1240 err = send_dux_commands(udfs, SENDADCOMMANDS);
1270 if (err < 0) { 1241 if (err < 0) {
1271 printk(KERN_ERR "comedi%d: adc command could not be submitted." 1242 dev_err(dev->class_dev,
1272 "Aborting...\n", dev->minor); 1243 "adc command could not be submitted. Aborting...\n");
1273 up(&udfs->sem); 1244 up(&udfs->sem);
1274 return err; 1245 return err;
1275 } 1246 }
@@ -1284,8 +1255,7 @@ static int usbduxfast_ai_insn_read(struct comedi_device *dev,
1284 udfs->transfer_buffer, SIZEINBUF, 1255 udfs->transfer_buffer, SIZEINBUF,
1285 &actual_length, 10000); 1256 &actual_length, 10000);
1286 if (err < 0) { 1257 if (err < 0) {
1287 printk(KERN_ERR "comedi%d: insn timeout. No data.\n", 1258 dev_err(dev->class_dev, "insn timeout. No data.\n");
1288 dev->minor);
1289 up(&udfs->sem); 1259 up(&udfs->sem);
1290 return err; 1260 return err;
1291 } 1261 }
@@ -1297,15 +1267,13 @@ static int usbduxfast_ai_insn_read(struct comedi_device *dev,
1297 udfs->transfer_buffer, SIZEINBUF, 1267 udfs->transfer_buffer, SIZEINBUF,
1298 &actual_length, 10000); 1268 &actual_length, 10000);
1299 if (err < 0) { 1269 if (err < 0) {
1300 printk(KERN_ERR "comedi%d: insn data error: %d\n", 1270 dev_err(dev->class_dev, "insn data error: %d\n", err);
1301 dev->minor, err);
1302 up(&udfs->sem); 1271 up(&udfs->sem);
1303 return err; 1272 return err;
1304 } 1273 }
1305 n = actual_length / sizeof(uint16_t); 1274 n = actual_length / sizeof(uint16_t);
1306 if ((n % 16) != 0) { 1275 if ((n % 16) != 0) {
1307 printk(KERN_ERR "comedi%d: insn data packet " 1276 dev_err(dev->class_dev, "insn data packet corrupted.\n");
1308 "corrupted.\n", dev->minor);
1309 up(&udfs->sem); 1277 up(&udfs->sem);
1310 return -EINVAL; 1278 return -EINVAL;
1311 } 1279 }
@@ -1454,9 +1422,10 @@ static int usbduxfast_attach_common(struct comedi_device *dev,
1454 return 0; 1422 return 0;
1455} 1423}
1456 1424
1457static int usbduxfast_attach_usb(struct comedi_device *dev, 1425static int usbduxfast_auto_attach(struct comedi_device *dev,
1458 struct usb_interface *uinterf) 1426 unsigned long context_unused)
1459{ 1427{
1428 struct usb_interface *uinterf = comedi_to_usb_interface(dev);
1460 int ret; 1429 int ret;
1461 struct usbduxfastsub_s *udfs; 1430 struct usbduxfastsub_s *udfs;
1462 1431
@@ -1465,11 +1434,11 @@ static int usbduxfast_attach_usb(struct comedi_device *dev,
1465 udfs = usb_get_intfdata(uinterf); 1434 udfs = usb_get_intfdata(uinterf);
1466 if (!udfs || !udfs->probed) { 1435 if (!udfs || !udfs->probed) {
1467 dev_err(dev->class_dev, 1436 dev_err(dev->class_dev,
1468 "usbduxfast: error: attach_usb failed, not connected\n"); 1437 "usbduxfast: error: auto_attach failed, not connected\n");
1469 ret = -ENODEV; 1438 ret = -ENODEV;
1470 } else if (udfs->attached) { 1439 } else if (udfs->attached) {
1471 dev_err(dev->class_dev, 1440 dev_err(dev->class_dev,
1472 "usbduxfast: error: attach_usb failed, already attached\n"); 1441 "usbduxfast: error: auto_attach failed, already attached\n");
1473 ret = -ENODEV; 1442 ret = -ENODEV;
1474 } else 1443 } else
1475 ret = usbduxfast_attach_common(dev, udfs); 1444 ret = usbduxfast_attach_common(dev, udfs);
@@ -1495,7 +1464,7 @@ static void usbduxfast_detach(struct comedi_device *dev)
1495static struct comedi_driver usbduxfast_driver = { 1464static struct comedi_driver usbduxfast_driver = {
1496 .driver_name = "usbduxfast", 1465 .driver_name = "usbduxfast",
1497 .module = THIS_MODULE, 1466 .module = THIS_MODULE,
1498 .attach_usb = usbduxfast_attach_usb, 1467 .auto_attach = usbduxfast_auto_attach,
1499 .detach = usbduxfast_detach, 1468 .detach = usbduxfast_detach,
1500}; 1469};
1501 1470
@@ -1535,8 +1504,8 @@ static int usbduxfast_usb_probe(struct usb_interface *uinterf,
1535 int ret; 1504 int ret;
1536 1505
1537 if (udev->speed != USB_SPEED_HIGH) { 1506 if (udev->speed != USB_SPEED_HIGH) {
1538 printk(KERN_ERR "comedi_: usbduxfast_: This driver needs" 1507 dev_err(&uinterf->dev,
1539 "USB 2.0 to operate. Aborting...\n"); 1508 "This driver needs USB 2.0 to operate. Aborting...\n");
1540 return -ENODEV; 1509 return -ENODEV;
1541 } 1510 }
1542#ifdef CONFIG_COMEDI_DEBUG 1511#ifdef CONFIG_COMEDI_DEBUG
@@ -1555,7 +1524,8 @@ static int usbduxfast_usb_probe(struct usb_interface *uinterf,
1555 1524
1556 /* no more space */ 1525 /* no more space */
1557 if (index == -1) { 1526 if (index == -1) {
1558 printk(KERN_ERR "Too many usbduxfast-devices connected.\n"); 1527 dev_err(&uinterf->dev,
1528 "Too many usbduxfast-devices connected.\n");
1559 up(&start_stop_sem); 1529 up(&start_stop_sem);
1560 return -EMFILE; 1530 return -EMFILE;
1561 } 1531 }
@@ -1586,8 +1556,8 @@ static int usbduxfast_usb_probe(struct usb_interface *uinterf,
1586 usbduxfastsub[index].dux_commands = kmalloc(SIZEOFDUXBUFFER, 1556 usbduxfastsub[index].dux_commands = kmalloc(SIZEOFDUXBUFFER,
1587 GFP_KERNEL); 1557 GFP_KERNEL);
1588 if (!usbduxfastsub[index].dux_commands) { 1558 if (!usbduxfastsub[index].dux_commands) {
1589 printk(KERN_ERR "comedi_: usbduxfast: error alloc space for " 1559 dev_err(&uinterf->dev,
1590 "dac commands\n"); 1560 "error alloc space for dac commands\n");
1591 tidy_up(&(usbduxfastsub[index])); 1561 tidy_up(&(usbduxfastsub[index]));
1592 up(&start_stop_sem); 1562 up(&start_stop_sem);
1593 return -ENOMEM; 1563 return -ENOMEM;
@@ -1595,8 +1565,8 @@ static int usbduxfast_usb_probe(struct usb_interface *uinterf,
1595 /* create space of the instruction buffer */ 1565 /* create space of the instruction buffer */
1596 usbduxfastsub[index].insnBuffer = kmalloc(SIZEINSNBUF, GFP_KERNEL); 1566 usbduxfastsub[index].insnBuffer = kmalloc(SIZEINSNBUF, GFP_KERNEL);
1597 if (!usbduxfastsub[index].insnBuffer) { 1567 if (!usbduxfastsub[index].insnBuffer) {
1598 printk(KERN_ERR "comedi_: usbduxfast: could not alloc space " 1568 dev_err(&uinterf->dev,
1599 "for insnBuffer\n"); 1569 "could not alloc space for insnBuffer\n");
1600 tidy_up(&(usbduxfastsub[index])); 1570 tidy_up(&(usbduxfastsub[index]));
1601 up(&start_stop_sem); 1571 up(&start_stop_sem);
1602 return -ENOMEM; 1572 return -ENOMEM;
@@ -1605,24 +1575,25 @@ static int usbduxfast_usb_probe(struct usb_interface *uinterf,
1605 i = usb_set_interface(usbduxfastsub[index].usbdev, 1575 i = usb_set_interface(usbduxfastsub[index].usbdev,
1606 usbduxfastsub[index].ifnum, 1); 1576 usbduxfastsub[index].ifnum, 1);
1607 if (i < 0) { 1577 if (i < 0) {
1608 printk(KERN_ERR "comedi_: usbduxfast%d: could not switch to " 1578 dev_err(&uinterf->dev,
1609 "alternate setting 1.\n", index); 1579 "usbduxfast%d: could not switch to alternate setting 1.\n",
1580 index);
1610 tidy_up(&(usbduxfastsub[index])); 1581 tidy_up(&(usbduxfastsub[index]));
1611 up(&start_stop_sem); 1582 up(&start_stop_sem);
1612 return -ENODEV; 1583 return -ENODEV;
1613 } 1584 }
1614 usbduxfastsub[index].urbIn = usb_alloc_urb(0, GFP_KERNEL); 1585 usbduxfastsub[index].urbIn = usb_alloc_urb(0, GFP_KERNEL);
1615 if (!usbduxfastsub[index].urbIn) { 1586 if (!usbduxfastsub[index].urbIn) {
1616 printk(KERN_ERR "comedi_: usbduxfast%d: Could not alloc." 1587 dev_err(&uinterf->dev,
1617 "urb\n", index); 1588 "usbduxfast%d: Could not alloc. urb\n", index);
1618 tidy_up(&(usbduxfastsub[index])); 1589 tidy_up(&(usbduxfastsub[index]));
1619 up(&start_stop_sem); 1590 up(&start_stop_sem);
1620 return -ENOMEM; 1591 return -ENOMEM;
1621 } 1592 }
1622 usbduxfastsub[index].transfer_buffer = kmalloc(SIZEINBUF, GFP_KERNEL); 1593 usbduxfastsub[index].transfer_buffer = kmalloc(SIZEINBUF, GFP_KERNEL);
1623 if (!usbduxfastsub[index].transfer_buffer) { 1594 if (!usbduxfastsub[index].transfer_buffer) {
1624 printk(KERN_ERR "comedi_: usbduxfast%d: could not alloc. " 1595 dev_err(&uinterf->dev,
1625 "transb.\n", index); 1596 "usbduxfast%d: could not alloc. transb.\n", index);
1626 tidy_up(&(usbduxfastsub[index])); 1597 tidy_up(&(usbduxfastsub[index]));
1627 up(&start_stop_sem); 1598 up(&start_stop_sem);
1628 return -ENOMEM; 1599 return -ENOMEM;
@@ -1640,12 +1611,12 @@ static int usbduxfast_usb_probe(struct usb_interface *uinterf,
1640 usbduxfast_firmware_request_complete_handler); 1611 usbduxfast_firmware_request_complete_handler);
1641 1612
1642 if (ret) { 1613 if (ret) {
1643 dev_err(&udev->dev, "could not load firmware (err=%d)\n", ret); 1614 dev_err(&uinterf->dev, "could not load firmware (err=%d)\n", ret);
1644 return ret; 1615 return ret;
1645 } 1616 }
1646 1617
1647 printk(KERN_INFO "comedi_: usbduxfast%d has been successfully " 1618 dev_info(&uinterf->dev,
1648 "initialized.\n", index); 1619 "usbduxfast%d has been successfully initialized.\n", index);
1649 /* success */ 1620 /* success */
1650 return 0; 1621 return 0;
1651} 1622}
@@ -1656,13 +1627,11 @@ static void usbduxfast_usb_disconnect(struct usb_interface *intf)
1656 struct usb_device *udev = interface_to_usbdev(intf); 1627 struct usb_device *udev = interface_to_usbdev(intf);
1657 1628
1658 if (!udfs) { 1629 if (!udfs) {
1659 printk(KERN_ERR "comedi_: usbduxfast: disconnect called with " 1630 dev_err(&intf->dev, "disconnect called with null pointer.\n");
1660 "null pointer.\n");
1661 return; 1631 return;
1662 } 1632 }
1663 if (udfs->usbdev != udev) { 1633 if (udfs->usbdev != udev) {
1664 printk(KERN_ERR "comedi_: usbduxfast: BUG! called with wrong " 1634 dev_err(&intf->dev, "BUG! called with wrong ptr!!!\n");
1665 "ptr!!!\n");
1666 return; 1635 return;
1667 } 1636 }
1668 1637
diff --git a/drivers/staging/comedi/drivers/usbduxsigma.c b/drivers/staging/comedi/drivers/usbduxsigma.c
index b1694121f845..cdd279b1f61e 100644
--- a/drivers/staging/comedi/drivers/usbduxsigma.c
+++ b/drivers/staging/comedi/drivers/usbduxsigma.c
@@ -904,9 +904,6 @@ static int usbdux_ai_cmdtest(struct comedi_device *dev,
904 if (!(this_usbduxsub->probed)) 904 if (!(this_usbduxsub->probed))
905 return -ENODEV; 905 return -ENODEV;
906 906
907 dev_dbg(&this_usbduxsub->interface->dev,
908 "comedi%d: usbdux_ai_cmdtest\n", dev->minor);
909
910 /* Step 1 : check if triggers are trivially valid */ 907 /* Step 1 : check if triggers are trivially valid */
911 908
912 err |= cfc_check_trigger_src(&cmd->start_src, TRIG_NOW | TRIG_INT); 909 err |= cfc_check_trigger_src(&cmd->start_src, TRIG_NOW | TRIG_INT);
@@ -928,19 +925,12 @@ static int usbdux_ai_cmdtest(struct comedi_device *dev,
928 if (err) 925 if (err)
929 return 2; 926 return 2;
930 927
931 /* step 3: make sure arguments are trivially compatible */ 928 /* Step 3: check if arguments are trivially valid */
932 if (cmd->start_arg != 0) {
933 cmd->start_arg = 0;
934 err++;
935 }
936 929
937 if (cmd->scan_begin_src == TRIG_FOLLOW) { 930 err |= cfc_check_trigger_arg_is(&cmd->start_arg, 0);
938 /* internal trigger */ 931
939 if (cmd->scan_begin_arg != 0) { 932 if (cmd->scan_begin_src == TRIG_FOLLOW) /* internal trigger */
940 cmd->scan_begin_arg = 0; 933 err |= cfc_check_trigger_arg_is(&cmd->scan_begin_arg, 0);
941 err++;
942 }
943 }
944 934
945 if (cmd->scan_begin_src == TRIG_TIMER) { 935 if (cmd->scan_begin_src == TRIG_TIMER) {
946 if (this_usbduxsub->high_speed) { 936 if (this_usbduxsub->high_speed) {
@@ -951,51 +941,35 @@ static int usbdux_ai_cmdtest(struct comedi_device *dev,
951 * are in the channel list the more time we need. 941 * are in the channel list the more time we need.
952 */ 942 */
953 i = chanToInterval(cmd->chanlist_len); 943 i = chanToInterval(cmd->chanlist_len);
954 if (cmd->scan_begin_arg < (1000000 / 8 * i)) { 944 err |= cfc_check_trigger_arg_min(&cmd->scan_begin_arg,
955 cmd->scan_begin_arg = 1000000 / 8 * i; 945 (1000000 / 8 * i));
956 err++;
957 }
958 /* now calc the real sampling rate with all the 946 /* now calc the real sampling rate with all the
959 * rounding errors */ 947 * rounding errors */
960 tmpTimer = 948 tmpTimer =
961 ((unsigned int)(cmd->scan_begin_arg / 125000)) * 949 ((unsigned int)(cmd->scan_begin_arg / 125000)) *
962 125000; 950 125000;
963 if (cmd->scan_begin_arg != tmpTimer) {
964 cmd->scan_begin_arg = tmpTimer;
965 err++;
966 }
967 } else { 951 } else {
968 /* full speed */ 952 /* full speed */
969 /* 1kHz scans every USB frame */ 953 /* 1kHz scans every USB frame */
970 if (cmd->scan_begin_arg < 1000000) { 954 err |= cfc_check_trigger_arg_min(&cmd->scan_begin_arg,
971 cmd->scan_begin_arg = 1000000; 955 1000000);
972 err++;
973 }
974 /* 956 /*
975 * calc the real sampling rate with the rounding errors 957 * calc the real sampling rate with the rounding errors
976 */ 958 */
977 tmpTimer = ((unsigned int)(cmd->scan_begin_arg / 959 tmpTimer = ((unsigned int)(cmd->scan_begin_arg /
978 1000000)) * 1000000; 960 1000000)) * 1000000;
979 if (cmd->scan_begin_arg != tmpTimer) {
980 cmd->scan_begin_arg = tmpTimer;
981 err++;
982 }
983 } 961 }
962 err |= cfc_check_trigger_arg_is(&cmd->scan_begin_arg,
963 tmpTimer);
984 } 964 }
985 /* the same argument */ 965
986 if (cmd->scan_end_arg != cmd->chanlist_len) { 966 err |= cfc_check_trigger_arg_is(&cmd->scan_end_arg, cmd->chanlist_len);
987 cmd->scan_end_arg = cmd->chanlist_len;
988 err++;
989 }
990 967
991 if (cmd->stop_src == TRIG_COUNT) { 968 if (cmd->stop_src == TRIG_COUNT) {
992 /* any count is allowed */ 969 /* any count is allowed */
993 } else { 970 } else {
994 /* TRIG_NONE */ 971 /* TRIG_NONE */
995 if (cmd->stop_arg != 0) { 972 err |= cfc_check_trigger_arg_is(&cmd->stop_arg, 0);
996 cmd->stop_arg = 0;
997 err++;
998 }
999 } 973 }
1000 974
1001 if (err) 975 if (err)
@@ -1576,57 +1550,30 @@ static int usbdux_ao_cmdtest(struct comedi_device *dev,
1576 if (err) 1550 if (err)
1577 return 2; 1551 return 2;
1578 1552
1579 /* step 3: make sure arguments are trivially compatible */ 1553 /* Step 3: check if arguments are trivially valid */
1580 1554
1581 if (cmd->start_arg != 0) { 1555 err |= cfc_check_trigger_arg_is(&cmd->start_arg, 0);
1582 cmd->start_arg = 0;
1583 err++;
1584 }
1585 1556
1586 if (cmd->scan_begin_src == TRIG_FOLLOW) { 1557 if (cmd->scan_begin_src == TRIG_FOLLOW) /* internal trigger */
1587 /* internal trigger */ 1558 err |= cfc_check_trigger_arg_is(&cmd->scan_begin_arg, 0);
1588 if (cmd->scan_begin_arg != 0) { 1559
1589 cmd->scan_begin_arg = 0; 1560 if (cmd->scan_begin_src == TRIG_TIMER)
1590 err++; 1561 err |= cfc_check_trigger_arg_min(&cmd->scan_begin_arg,
1591 } 1562 1000000);
1592 }
1593 1563
1594 if (cmd->scan_begin_src == TRIG_TIMER) {
1595 /* timer */
1596 if (cmd->scan_begin_arg < 1000000) {
1597 cmd->scan_begin_arg = 1000000;
1598 err++;
1599 }
1600 }
1601 /* not used now, is for later use */ 1564 /* not used now, is for later use */
1602 if (cmd->convert_src == TRIG_TIMER) { 1565 if (cmd->convert_src == TRIG_TIMER)
1603 if (cmd->convert_arg < 125000) { 1566 err |= cfc_check_trigger_arg_min(&cmd->convert_arg, 125000);
1604 cmd->convert_arg = 125000;
1605 err++;
1606 }
1607 }
1608 1567
1609 /* the same argument */ 1568 err |= cfc_check_trigger_arg_is(&cmd->scan_end_arg, cmd->chanlist_len);
1610 if (cmd->scan_end_arg != cmd->chanlist_len) {
1611 cmd->scan_end_arg = cmd->chanlist_len;
1612 err++;
1613 }
1614 1569
1615 if (cmd->stop_src == TRIG_COUNT) { 1570 if (cmd->stop_src == TRIG_COUNT) {
1616 /* any count is allowed */ 1571 /* any count is allowed */
1617 } else { 1572 } else {
1618 /* TRIG_NONE */ 1573 /* TRIG_NONE */
1619 if (cmd->stop_arg != 0) { 1574 err |= cfc_check_trigger_arg_is(&cmd->stop_arg, 0);
1620 cmd->stop_arg = 0;
1621 err++;
1622 }
1623 } 1575 }
1624 1576
1625 dev_dbg(&this_usbduxsub->interface->dev, "comedi%d: err=%d, "
1626 "scan_begin_src=%d, scan_begin_arg=%d, convert_src=%d, "
1627 "convert_arg=%d\n", dev->minor, err, cmd->scan_begin_src,
1628 cmd->scan_begin_arg, cmd->convert_src, cmd->convert_arg);
1629
1630 if (err) 1577 if (err)
1631 return 3; 1578 return 3;
1632 1579
@@ -2359,9 +2306,10 @@ static int usbduxsigma_attach_common(struct comedi_device *dev,
2359 return 0; 2306 return 0;
2360} 2307}
2361 2308
2362static int usbduxsigma_attach_usb(struct comedi_device *dev, 2309static int usbduxsigma_auto_attach(struct comedi_device *dev,
2363 struct usb_interface *uinterf) 2310 unsigned long context_unused)
2364{ 2311{
2312 struct usb_interface *uinterf = comedi_to_usb_interface(dev);
2365 int ret; 2313 int ret;
2366 struct usbduxsub *uds; 2314 struct usbduxsub *uds;
2367 2315
@@ -2370,11 +2318,11 @@ static int usbduxsigma_attach_usb(struct comedi_device *dev,
2370 uds = usb_get_intfdata(uinterf); 2318 uds = usb_get_intfdata(uinterf);
2371 if (!uds || !uds->probed) { 2319 if (!uds || !uds->probed) {
2372 dev_err(dev->class_dev, 2320 dev_err(dev->class_dev,
2373 "usbduxsigma: error: attach_usb failed, not connected\n"); 2321 "usbduxsigma: error: auto_attach failed, not connected\n");
2374 ret = -ENODEV; 2322 ret = -ENODEV;
2375 } else if (uds->attached) { 2323 } else if (uds->attached) {
2376 dev_err(dev->class_dev, 2324 dev_err(dev->class_dev,
2377 "usbduxsigma: error: attach_usb failed, already attached\n"); 2325 "usbduxsigma: error: auto_attach failed, already attached\n");
2378 ret = -ENODEV; 2326 ret = -ENODEV;
2379 } else 2327 } else
2380 ret = usbduxsigma_attach_common(dev, uds); 2328 ret = usbduxsigma_attach_common(dev, uds);
@@ -2398,7 +2346,7 @@ static void usbduxsigma_detach(struct comedi_device *dev)
2398static struct comedi_driver usbduxsigma_driver = { 2346static struct comedi_driver usbduxsigma_driver = {
2399 .driver_name = "usbduxsigma", 2347 .driver_name = "usbduxsigma",
2400 .module = THIS_MODULE, 2348 .module = THIS_MODULE,
2401 .attach_usb = usbduxsigma_attach_usb, 2349 .auto_attach = usbduxsigma_auto_attach,
2402 .detach = usbduxsigma_detach, 2350 .detach = usbduxsigma_detach,
2403}; 2351};
2404 2352
diff --git a/drivers/staging/comedi/drivers/vmk80xx.c b/drivers/staging/comedi/drivers/vmk80xx.c
index df277aa591bb..609dc6915997 100644
--- a/drivers/staging/comedi/drivers/vmk80xx.c
+++ b/drivers/staging/comedi/drivers/vmk80xx.c
@@ -1209,9 +1209,10 @@ static int vmk80xx_attach(struct comedi_device *cdev,
1209} 1209}
1210 1210
1211/* called via comedi_usb_auto_config() */ 1211/* called via comedi_usb_auto_config() */
1212static int vmk80xx_attach_usb(struct comedi_device *cdev, 1212static int vmk80xx_auto_attach(struct comedi_device *cdev,
1213 struct usb_interface *intf) 1213 unsigned long context_unused)
1214{ 1214{
1215 struct usb_interface *intf = comedi_to_usb_interface(cdev);
1215 int i; 1216 int i;
1216 int ret; 1217 int ret;
1217 1218
@@ -1246,7 +1247,7 @@ static struct comedi_driver vmk80xx_driver = {
1246 .driver_name = "vmk80xx", 1247 .driver_name = "vmk80xx",
1247 .attach = vmk80xx_attach, 1248 .attach = vmk80xx_attach,
1248 .detach = vmk80xx_detach, 1249 .detach = vmk80xx_detach,
1249 .attach_usb = vmk80xx_attach_usb, 1250 .auto_attach = vmk80xx_auto_attach,
1250}; 1251};
1251 1252
1252static int vmk80xx_usb_probe(struct usb_interface *intf, 1253static int vmk80xx_usb_probe(struct usb_interface *intf,
@@ -1371,12 +1372,11 @@ static int vmk80xx_usb_probe(struct usb_interface *intf,
1371 1372
1372 if (dev->board.model == VMK8061_MODEL) { 1373 if (dev->board.model == VMK8061_MODEL) {
1373 vmk80xx_read_eeprom(dev, IC3_VERSION); 1374 vmk80xx_read_eeprom(dev, IC3_VERSION);
1374 printk(KERN_INFO "comedi#: vmk80xx: %s\n", dev->fw.ic3_vers); 1375 dev_info(&intf->dev, "%s\n", dev->fw.ic3_vers);
1375 1376
1376 if (vmk80xx_check_data_link(dev)) { 1377 if (vmk80xx_check_data_link(dev)) {
1377 vmk80xx_read_eeprom(dev, IC6_VERSION); 1378 vmk80xx_read_eeprom(dev, IC6_VERSION);
1378 printk(KERN_INFO "comedi#: vmk80xx: %s\n", 1379 dev_info(&intf->dev, "%s\n", dev->fw.ic6_vers);
1379 dev->fw.ic6_vers);
1380 } else { 1380 } else {
1381 dbgcm("comedi#: vmk80xx: no conn. to CPU\n"); 1381 dbgcm("comedi#: vmk80xx: no conn. to CPU\n");
1382 } 1382 }
@@ -1387,8 +1387,8 @@ static int vmk80xx_usb_probe(struct usb_interface *intf,
1387 1387
1388 dev->probed = 1; 1388 dev->probed = 1;
1389 1389
1390 printk(KERN_INFO "comedi#: vmk80xx: board #%d [%s] now attached\n", 1390 dev_info(&intf->dev, "board #%d [%s] now attached\n",
1391 dev->count, dev->board.name); 1391 dev->count, dev->board.name);
1392 1392
1393 mutex_unlock(&glb_mutex); 1393 mutex_unlock(&glb_mutex);
1394 1394
@@ -1422,8 +1422,8 @@ static void vmk80xx_usb_disconnect(struct usb_interface *intf)
1422 kfree(dev->usb_rx_buf); 1422 kfree(dev->usb_rx_buf);
1423 kfree(dev->usb_tx_buf); 1423 kfree(dev->usb_tx_buf);
1424 1424
1425 printk(KERN_INFO "comedi#: vmk80xx: board #%d [%s] now detached\n", 1425 dev_info(&intf->dev, "board #%d [%s] now detached\n",
1426 dev->count, dev->board.name); 1426 dev->count, dev->board.name);
1427 1427
1428 up(&dev->limit_sem); 1428 up(&dev->limit_sem);
1429 mutex_unlock(&glb_mutex); 1429 mutex_unlock(&glb_mutex);
diff --git a/drivers/staging/comedi/kcomedilib/kcomedilib_main.c b/drivers/staging/comedi/kcomedilib/kcomedilib_main.c
index 3f20ea55b8d0..4dc09a210883 100644
--- a/drivers/staging/comedi/kcomedilib/kcomedilib_main.c
+++ b/drivers/staging/comedi/kcomedilib/kcomedilib_main.c
@@ -21,7 +21,6 @@
21 21
22*/ 22*/
23 23
24#define __NO_VERSION__
25#include <linux/module.h> 24#include <linux/module.h>
26 25
27#include <linux/errno.h> 26#include <linux/errno.h>
@@ -95,7 +94,8 @@ static int comedi_do_insn(struct comedi_device *dev,
95 s = &dev->subdevices[insn->subdev]; 94 s = &dev->subdevices[insn->subdev];
96 95
97 if (s->type == COMEDI_SUBD_UNUSED) { 96 if (s->type == COMEDI_SUBD_UNUSED) {
98 printk(KERN_ERR "%d not useable subdevice\n", insn->subdev); 97 dev_err(dev->class_dev,
98 "%d not useable subdevice\n", insn->subdev);
99 ret = -EIO; 99 ret = -EIO;
100 goto error; 100 goto error;
101 } 101 }
@@ -104,7 +104,7 @@ static int comedi_do_insn(struct comedi_device *dev,
104 104
105 ret = comedi_check_chanlist(s, 1, &insn->chanspec); 105 ret = comedi_check_chanlist(s, 1, &insn->chanspec);
106 if (ret < 0) { 106 if (ret < 0) {
107 printk(KERN_ERR "bad chanspec\n"); 107 dev_err(dev->class_dev, "bad chanspec\n");
108 ret = -EINVAL; 108 ret = -EINVAL;
109 goto error; 109 goto error;
110 } 110 }
diff --git a/drivers/staging/comedi/proc.c b/drivers/staging/comedi/proc.c
index bb7e70e3e94a..01acbe97653c 100644
--- a/drivers/staging/comedi/proc.c
+++ b/drivers/staging/comedi/proc.c
@@ -28,7 +28,6 @@
28 was cool. 28 was cool.
29*/ 29*/
30 30
31#define __NO_VERSION__
32#include "comedidev.h" 31#include "comedidev.h"
33#include "comedi_internal.h" 32#include "comedi_internal.h"
34#include <linux/proc_fs.h> 33#include <linux/proc_fs.h>
diff --git a/drivers/staging/crystalhd/crystalhd_cmds.c b/drivers/staging/crystalhd/crystalhd_cmds.c
index 05fe78748dfc..ed99daa6ef46 100644
--- a/drivers/staging/crystalhd/crystalhd_cmds.c
+++ b/drivers/staging/crystalhd/crystalhd_cmds.c
@@ -308,9 +308,9 @@ static enum BC_STATUS bc_cproc_download_fw(struct crystalhd_cmd *ctx,
308 sts = crystalhd_download_fw(ctx->adp, (uint8_t *)idata->add_cdata, 308 sts = crystalhd_download_fw(ctx->adp, (uint8_t *)idata->add_cdata,
309 idata->add_cdata_sz); 309 idata->add_cdata_sz);
310 310
311 if (sts != BC_STS_SUCCESS) { 311 if (sts != BC_STS_SUCCESS)
312 BCMLOG_ERR("Firmware Download Failure!! - %d\n", sts); 312 BCMLOG_ERR("Firmware Download Failure!! - %d\n", sts);
313 } else 313 else
314 ctx->state |= BC_LINK_INIT; 314 ctx->state |= BC_LINK_INIT;
315 315
316 return sts; 316 return sts;
@@ -951,7 +951,7 @@ enum BC_STATUS crystalhd_user_close(struct crystalhd_cmd *ctx, struct crystalhd_
951 * 951 *
952 * Called at the time of driver load. 952 * Called at the time of driver load.
953 */ 953 */
954enum BC_STATUS __devinit crystalhd_setup_cmd_context(struct crystalhd_cmd *ctx, 954enum BC_STATUS crystalhd_setup_cmd_context(struct crystalhd_cmd *ctx,
955 struct crystalhd_adp *adp) 955 struct crystalhd_adp *adp)
956{ 956{
957 int i = 0; 957 int i = 0;
@@ -986,7 +986,7 @@ enum BC_STATUS __devinit crystalhd_setup_cmd_context(struct crystalhd_cmd *ctx,
986 * 986 *
987 * Called at the time of driver un-load. 987 * Called at the time of driver un-load.
988 */ 988 */
989enum BC_STATUS __devexit crystalhd_delete_cmd_context(struct crystalhd_cmd *ctx) 989enum BC_STATUS crystalhd_delete_cmd_context(struct crystalhd_cmd *ctx)
990{ 990{
991 BCMLOG(BCMLOG_DBG, "Deleting Command context..\n"); 991 BCMLOG(BCMLOG_DBG, "Deleting Command context..\n");
992 992
diff --git a/drivers/staging/crystalhd/crystalhd_lnx.c b/drivers/staging/crystalhd/crystalhd_lnx.c
index 166203aeb7b4..85f51fb18425 100644
--- a/drivers/staging/crystalhd/crystalhd_lnx.c
+++ b/drivers/staging/crystalhd/crystalhd_lnx.c
@@ -353,7 +353,7 @@ static const struct file_operations chd_dec_fops = {
353 .llseek = noop_llseek, 353 .llseek = noop_llseek,
354}; 354};
355 355
356static int __devinit chd_dec_init_chdev(struct crystalhd_adp *adp) 356static int chd_dec_init_chdev(struct crystalhd_adp *adp)
357{ 357{
358 struct crystalhd_ioctl_data *temp; 358 struct crystalhd_ioctl_data *temp;
359 struct device *dev; 359 struct device *dev;
@@ -418,7 +418,7 @@ fail:
418 return rc; 418 return rc;
419} 419}
420 420
421static void __devexit chd_dec_release_chdev(struct crystalhd_adp *adp) 421static void chd_dec_release_chdev(struct crystalhd_adp *adp)
422{ 422{
423 struct crystalhd_ioctl_data *temp = NULL; 423 struct crystalhd_ioctl_data *temp = NULL;
424 if (!adp) 424 if (!adp)
@@ -443,7 +443,7 @@ static void __devexit chd_dec_release_chdev(struct crystalhd_adp *adp)
443 crystalhd_delete_elem_pool(adp); 443 crystalhd_delete_elem_pool(adp);
444} 444}
445 445
446static int __devinit chd_pci_reserve_mem(struct crystalhd_adp *pinfo) 446static int chd_pci_reserve_mem(struct crystalhd_adp *pinfo)
447{ 447{
448 int rc; 448 int rc;
449 unsigned long bar2 = pci_resource_start(pinfo->pdev, 2); 449 unsigned long bar2 = pci_resource_start(pinfo->pdev, 2);
@@ -496,7 +496,7 @@ static int __devinit chd_pci_reserve_mem(struct crystalhd_adp *pinfo)
496 return 0; 496 return 0;
497} 497}
498 498
499static void __devexit chd_pci_release_mem(struct crystalhd_adp *pinfo) 499static void chd_pci_release_mem(struct crystalhd_adp *pinfo)
500{ 500{
501 if (!pinfo) 501 if (!pinfo)
502 return; 502 return;
@@ -511,7 +511,7 @@ static void __devexit chd_pci_release_mem(struct crystalhd_adp *pinfo)
511} 511}
512 512
513 513
514static void __devexit chd_dec_pci_remove(struct pci_dev *pdev) 514static void chd_dec_pci_remove(struct pci_dev *pdev)
515{ 515{
516 struct crystalhd_adp *pinfo; 516 struct crystalhd_adp *pinfo;
517 enum BC_STATUS sts = BC_STS_SUCCESS; 517 enum BC_STATUS sts = BC_STS_SUCCESS;
@@ -537,7 +537,7 @@ static void __devexit chd_dec_pci_remove(struct pci_dev *pdev)
537 g_adp_info = NULL; 537 g_adp_info = NULL;
538} 538}
539 539
540static int __devinit chd_dec_pci_probe(struct pci_dev *pdev, 540static int chd_dec_pci_probe(struct pci_dev *pdev,
541 const struct pci_device_id *entry) 541 const struct pci_device_id *entry)
542{ 542{
543 struct crystalhd_adp *pinfo; 543 struct crystalhd_adp *pinfo;
@@ -711,7 +711,7 @@ MODULE_DEVICE_TABLE(pci, chd_dec_pci_id_table);
711static struct pci_driver bc_chd_70012_driver = { 711static struct pci_driver bc_chd_70012_driver = {
712 .name = "Broadcom 70012 Decoder", 712 .name = "Broadcom 70012 Decoder",
713 .probe = chd_dec_pci_probe, 713 .probe = chd_dec_pci_probe,
714 .remove = __devexit_p(chd_dec_pci_remove), 714 .remove = chd_dec_pci_remove,
715 .id_table = chd_dec_pci_id_table, 715 .id_table = chd_dec_pci_id_table,
716#ifdef CONFIG_PM 716#ifdef CONFIG_PM
717 .suspend = chd_dec_pci_suspend, 717 .suspend = chd_dec_pci_suspend,
diff --git a/drivers/staging/crystalhd/crystalhd_misc.c b/drivers/staging/crystalhd/crystalhd_misc.c
index b3a637814a16..a5f109c632dc 100644
--- a/drivers/staging/crystalhd/crystalhd_misc.c
+++ b/drivers/staging/crystalhd/crystalhd_misc.c
@@ -960,7 +960,7 @@ void crystalhd_destroy_dio_pool(struct crystalhd_adp *adp)
960 * Create general purpose list element pool to hold pending, 960 * Create general purpose list element pool to hold pending,
961 * and active requests. 961 * and active requests.
962 */ 962 */
963int __devinit crystalhd_create_elem_pool(struct crystalhd_adp *adp, 963int crystalhd_create_elem_pool(struct crystalhd_adp *adp,
964 uint32_t pool_size) 964 uint32_t pool_size)
965{ 965{
966 uint32_t i; 966 uint32_t i;
diff --git a/drivers/staging/csr/Makefile b/drivers/staging/csr/Makefile
index ab626edc5ba4..dbd135a8b177 100644
--- a/drivers/staging/csr/Makefile
+++ b/drivers/staging/csr/Makefile
@@ -70,5 +70,4 @@ csr_helper-y := csr_time.o \
70 csr_framework_ext.o \ 70 csr_framework_ext.o \
71 csr_wifi_serialize_primitive_types.o \ 71 csr_wifi_serialize_primitive_types.o \
72 csr_serialize_primitive_types.o \ 72 csr_serialize_primitive_types.o \
73 csr_msgconv.o \ 73 csr_msgconv.o
74 csr_panic.o
diff --git a/drivers/staging/csr/bh.c b/drivers/staging/csr/bh.c
index addee05a4516..1a1f5c79822a 100644
--- a/drivers/staging/csr/bh.c
+++ b/drivers/staging/csr/bh.c
@@ -228,20 +228,19 @@ handle_bh_error(unifi_priv_t *priv)
228 * 228 *
229 * --------------------------------------------------------------------------- 229 * ---------------------------------------------------------------------------
230 */ 230 */
231static int 231static int bh_thread_function(void *arg)
232bh_thread_function(void *arg)
233{ 232{
234 unifi_priv_t *priv = (unifi_priv_t*)arg; 233 unifi_priv_t *priv = (unifi_priv_t *)arg;
235 CsrResult csrResult; 234 CsrResult csrResult;
236 long ret; 235 long ret;
237 u32 timeout, t; 236 u32 timeout, t;
238 struct uf_thread *this_thread; 237 struct uf_thread *this_thread;
239 238
240 unifi_trace(priv, UDBG2, "bh_thread_function starting\n"); 239 unifi_trace(priv, UDBG2, "bh_thread_function starting\n");
241 240
242 this_thread = &priv->bh_thread; 241 this_thread = &priv->bh_thread;
243 242
244 t = timeout = 0; 243 t = timeout = 0;
245 while (!kthread_should_stop()) { 244 while (!kthread_should_stop()) {
246 /* wait until an error occurs, or we need to process something. */ 245 /* wait until an error occurs, or we need to process something. */
247 unifi_trace(priv, UDBG3, "bh_thread goes to sleep.\n"); 246 unifi_trace(priv, UDBG3, "bh_thread goes to sleep.\n");
diff --git a/drivers/staging/csr/csr_framework_ext.c b/drivers/staging/csr/csr_framework_ext.c
index f91a4bf4e68f..2aabb6c6b0af 100644
--- a/drivers/staging/csr/csr_framework_ext.c
+++ b/drivers/staging/csr/csr_framework_ext.c
@@ -9,7 +9,6 @@
9*****************************************************************************/ 9*****************************************************************************/
10 10
11#include <linux/kernel.h> 11#include <linux/kernel.h>
12#include <linux/version.h>
13#include <linux/kthread.h> 12#include <linux/kthread.h>
14#include <linux/module.h> 13#include <linux/module.h>
15#include <linux/freezer.h> 14#include <linux/freezer.h>
@@ -18,102 +17,6 @@
18#include <linux/bitops.h> 17#include <linux/bitops.h>
19 18
20#include "csr_framework_ext.h" 19#include "csr_framework_ext.h"
21#include "csr_panic.h"
22
23/*----------------------------------------------------------------------------*
24 * NAME
25 * CsrMutexCreate
26 *
27 * DESCRIPTION
28 * Create a mutex and return a handle to the created mutex.
29 *
30 * RETURNS
31 * Possible values:
32 * CSR_RESULT_SUCCESS in case of success
33 * CSR_FE_RESULT_NO_MORE_MUTEXES in case of out of mutex resources
34 * CSR_FE_RESULT_INVALID_POINTER in case the mutexHandle pointer is invalid
35 *
36 *----------------------------------------------------------------------------*/
37CsrResult CsrMutexCreate(CsrMutexHandle *mutexHandle)
38{
39 if (mutexHandle == NULL)
40 {
41 return CSR_FE_RESULT_INVALID_POINTER;
42 }
43
44 sema_init(mutexHandle, 1);
45
46 return CSR_RESULT_SUCCESS;
47}
48
49/*----------------------------------------------------------------------------*
50 * NAME
51 * CsrMutexDestroy
52 *
53 * DESCRIPTION
54 * Destroy the previously created mutex.
55 *
56 * RETURNS
57 * void
58 *
59 *----------------------------------------------------------------------------*/
60void CsrMutexDestroy(CsrMutexHandle *mutexHandle)
61{
62}
63
64/*----------------------------------------------------------------------------*
65 * NAME
66 * CsrMutexLock
67 *
68 * DESCRIPTION
69 * Lock the mutex refered to by the provided handle.
70 *
71 * RETURNS
72 * Possible values:
73 * CSR_RESULT_SUCCESS in case of success
74 * CSR_FE_RESULT_INVALID_HANDLE in case the mutexHandle is invalid
75 *
76 *----------------------------------------------------------------------------*/
77CsrResult CsrMutexLock(CsrMutexHandle *mutexHandle)
78{
79 if (mutexHandle == NULL)
80 {
81 return CSR_FE_RESULT_INVALID_POINTER;
82 }
83
84 if (down_interruptible(mutexHandle))
85 {
86 CsrPanic(CSR_TECH_FW, CSR_PANIC_FW_UNEXPECTED_VALUE, "CsrMutexLock Failed");
87 return CSR_FE_RESULT_INVALID_POINTER;
88 }
89
90 return CSR_RESULT_SUCCESS;
91}
92
93/*----------------------------------------------------------------------------*
94 * NAME
95 * CsrMutexUnlock
96 *
97 * DESCRIPTION
98 * Unlock the mutex refered to by the provided handle.
99 *
100 * RETURNS
101 * Possible values:
102 * CSR_RESULT_SUCCESS in case of success
103 * CSR_FE_RESULT_INVALID_HANDLE in case the mutexHandle is invalid
104 *
105 *----------------------------------------------------------------------------*/
106CsrResult CsrMutexUnlock(CsrMutexHandle *mutexHandle)
107{
108 if (mutexHandle == NULL)
109 {
110 return CSR_FE_RESULT_INVALID_POINTER;
111 }
112
113 up(mutexHandle);
114
115 return CSR_RESULT_SUCCESS;
116}
117 20
118/*----------------------------------------------------------------------------* 21/*----------------------------------------------------------------------------*
119 * NAME 22 * NAME
diff --git a/drivers/staging/csr/csr_framework_ext.h b/drivers/staging/csr/csr_framework_ext.h
index 66973e93a6bc..e8ae490c09d6 100644
--- a/drivers/staging/csr/csr_framework_ext.h
+++ b/drivers/staging/csr/csr_framework_ext.h
@@ -13,10 +13,6 @@
13#include "csr_result.h" 13#include "csr_result.h"
14#include "csr_framework_ext_types.h" 14#include "csr_framework_ext_types.h"
15 15
16#ifdef __cplusplus
17extern "C" {
18#endif
19
20/* Result codes */ 16/* Result codes */
21#define CSR_FE_RESULT_NO_MORE_EVENTS ((CsrResult) 0x0001) 17#define CSR_FE_RESULT_NO_MORE_EVENTS ((CsrResult) 0x0001)
22#define CSR_FE_RESULT_INVALID_POINTER ((CsrResult) 0x0002) 18#define CSR_FE_RESULT_INVALID_POINTER ((CsrResult) 0x0002)
@@ -34,215 +30,6 @@ extern "C" {
34 30
35#define CSR_EVENT_WAIT_INFINITE ((u16) 0xFFFF) 31#define CSR_EVENT_WAIT_INFINITE ((u16) 0xFFFF)
36 32
37/*----------------------------------------------------------------------------*
38 * NAME
39 * CsrEventCreate
40 *
41 * DESCRIPTION
42 * Creates an event and returns a handle to the created event.
43 *
44 * RETURNS
45 * Possible values:
46 * CSR_RESULT_SUCCESS in case of success
47 * CSR_FE_RESULT_NO_MORE_EVENTS in case of out of event resources
48 * CSR_FE_RESULT_INVALID_POINTER in case the eventHandle pointer is invalid
49 *
50 *----------------------------------------------------------------------------*/
51CsrResult CsrEventCreate(CsrEventHandle *eventHandle);
52
53/*----------------------------------------------------------------------------*
54 * NAME
55 * CsrEventWait
56 *
57 * DESCRIPTION
58 * Wait fore one or more of the event bits to be set.
59 *
60 * RETURNS
61 * Possible values:
62 * CSR_RESULT_SUCCESS in case of success
63 * CSR_FE_RESULT_TIMEOUT in case of timeout
64 * CSR_FE_RESULT_INVALID_HANDLE in case the eventHandle is invalid
65 * CSR_FE_RESULT_INVALID_POINTER in case the eventBits pointer is invalid
66 *
67 *----------------------------------------------------------------------------*/
68CsrResult CsrEventWait(CsrEventHandle *eventHandle, u16 timeoutInMs, u32 *eventBits);
69
70/*----------------------------------------------------------------------------*
71 * NAME
72 * CsrEventSet
73 *
74 * DESCRIPTION
75 * Set an event.
76 *
77 * RETURNS
78 * Possible values:
79 * CSR_RESULT_SUCCESS in case of success
80 * CSR_FE_RESULT_INVALID_HANDLE in case the eventHandle is invalid
81 *
82 *----------------------------------------------------------------------------*/
83CsrResult CsrEventSet(CsrEventHandle *eventHandle, u32 eventBits);
84
85/*----------------------------------------------------------------------------*
86 * NAME
87 * CsrEventDestroy
88 *
89 * DESCRIPTION
90 * Destroy the event associated.
91 *
92 * RETURNS
93 * void
94 *
95 *----------------------------------------------------------------------------*/
96void CsrEventDestroy(CsrEventHandle *eventHandle);
97
98/*----------------------------------------------------------------------------*
99 * NAME
100 * CsrMutexCreate
101 *
102 * DESCRIPTION
103 * Create a mutex and return a handle to the created mutex.
104 *
105 * RETURNS
106 * Possible values:
107 * CSR_RESULT_SUCCESS in case of success
108 * CSR_FE_RESULT_NO_MORE_MUTEXES in case of out of mutex resources
109 * CSR_FE_RESULT_INVALID_POINTER in case the mutexHandle pointer is invalid
110 *
111 *----------------------------------------------------------------------------*/
112CsrResult CsrMutexCreate(CsrMutexHandle *mutexHandle);
113
114/*----------------------------------------------------------------------------*
115 * NAME
116 * CsrMutexLock
117 *
118 * DESCRIPTION
119 * Lock the mutex refered to by the provided handle.
120 *
121 * RETURNS
122 * Possible values:
123 * CSR_RESULT_SUCCESS in case of success
124 * CSR_FE_RESULT_INVALID_HANDLE in case the mutexHandle is invalid
125 *
126 *----------------------------------------------------------------------------*/
127CsrResult CsrMutexLock(CsrMutexHandle *mutexHandle);
128
129/*----------------------------------------------------------------------------*
130 * NAME
131 * CsrMutexUnlock
132 *
133 * DESCRIPTION
134 * Unlock the mutex refered to by the provided handle.
135 *
136 * RETURNS
137 * Possible values:
138 * CSR_RESULT_SUCCESS in case of success
139 * CSR_FE_RESULT_INVALID_HANDLE in case the mutexHandle is invalid
140 *
141 *----------------------------------------------------------------------------*/
142CsrResult CsrMutexUnlock(CsrMutexHandle *mutexHandle);
143
144/*----------------------------------------------------------------------------*
145 * NAME
146 * CsrMutexDestroy
147 *
148 * DESCRIPTION
149 * Destroy the previously created mutex.
150 *
151 * RETURNS
152 * void
153 *
154 *----------------------------------------------------------------------------*/
155void CsrMutexDestroy(CsrMutexHandle *mutexHandle);
156
157/*----------------------------------------------------------------------------*
158 * NAME
159 * CsrGlobalMutexLock
160 *
161 * DESCRIPTION
162 * Lock the global mutex. The global mutex is a single pre-initialised
163 * shared mutex, spinlock or similar that does not need to be created prior
164 * to use. The limitation is that there is only one single lock shared
165 * between all code. Consequently, it must only be used very briefly to
166 * either protect simple one-time initialisation or to protect the creation
167 * of a dedicated mutex by calling CsrMutexCreate.
168 *
169 *----------------------------------------------------------------------------*/
170void CsrGlobalMutexLock(void);
171
172/*----------------------------------------------------------------------------*
173 * NAME
174 * CsrGlobalMutexUnlock
175 *
176 * DESCRIPTION
177 * Unlock the global mutex.
178 *
179 *----------------------------------------------------------------------------*/
180void CsrGlobalMutexUnlock(void);
181
182/*----------------------------------------------------------------------------*
183 * NAME
184 * CsrThreadCreate
185 *
186 * DESCRIPTION
187 * Create thread function and return a handle to the created thread.
188 *
189 * RETURNS
190 * Possible values:
191 * CSR_RESULT_SUCCESS in case of success
192 * CSR_FE_RESULT_NO_MORE_THREADS in case of out of thread resources
193 * CSR_FE_RESULT_INVALID_POINTER in case one of the supplied pointers is invalid
194 *
195 *----------------------------------------------------------------------------*/
196CsrResult CsrThreadCreate(void (*threadFunction)(void *pointer), void *pointer,
197 u32 stackSize, u16 priority,
198 const char *threadName, CsrThreadHandle *threadHandle);
199
200/*----------------------------------------------------------------------------*
201 * NAME
202 * CsrThreadGetHandle
203 *
204 * DESCRIPTION
205 * Return thread handle of calling thread.
206 *
207 * RETURNS
208 * Possible values:
209 * CSR_RESULT_SUCCESS in case of success
210 * CSR_FE_RESULT_INVALID_POINTER in case the threadHandle pointer is invalid
211 *
212 *----------------------------------------------------------------------------*/
213CsrResult CsrThreadGetHandle(CsrThreadHandle *threadHandle);
214
215/*----------------------------------------------------------------------------*
216 * NAME
217 * CsrThreadEqual
218 *
219 * DESCRIPTION
220 * Compare thread handles
221 *
222 * RETURNS
223 * Possible values:
224 * CSR_RESULT_SUCCESS in case thread handles are identical
225 * CSR_FE_RESULT_INVALID_POINTER in case either threadHandle pointer is invalid
226 * CSR_RESULT_FAILURE otherwise
227 *
228 *----------------------------------------------------------------------------*/
229CsrResult CsrThreadEqual(CsrThreadHandle *threadHandle1, CsrThreadHandle *threadHandle2);
230
231/*----------------------------------------------------------------------------*
232 * NAME
233 * CsrThreadSleep
234 *
235 * DESCRIPTION
236 * Sleep for a given period.
237 *
238 * RETURNS
239 * void
240 *
241 *----------------------------------------------------------------------------*/
242void CsrThreadSleep(u16 sleepTimeInMs); 33void CsrThreadSleep(u16 sleepTimeInMs);
243 34
244#ifdef __cplusplus
245}
246#endif
247
248#endif 35#endif
diff --git a/drivers/staging/csr/csr_framework_ext_types.h b/drivers/staging/csr/csr_framework_ext_types.h
index 57194ee911ea..575598cf69b2 100644
--- a/drivers/staging/csr/csr_framework_ext_types.h
+++ b/drivers/staging/csr/csr_framework_ext_types.h
@@ -2,11 +2,11 @@
2#define CSR_FRAMEWORK_EXT_TYPES_H__ 2#define CSR_FRAMEWORK_EXT_TYPES_H__
3/***************************************************************************** 3/*****************************************************************************
4 4
5 (c) Cambridge Silicon Radio Limited 2010 5 (c) Cambridge Silicon Radio Limited 2010
6 All rights reserved and confidential information of CSR 6 All rights reserved and confidential information of CSR
7 7
8 Refer to LICENSE.txt included with this source for details 8 Refer to LICENSE.txt included with this source for details
9 on the license terms. 9 on the license terms.
10 10
11*****************************************************************************/ 11*****************************************************************************/
12 12
@@ -17,47 +17,14 @@
17#include <pthread.h> 17#include <pthread.h>
18#endif 18#endif
19 19
20#ifdef __cplusplus
21extern "C" {
22#endif
23
24
25#ifdef __KERNEL__ 20#ifdef __KERNEL__
26 21
27struct CsrThread
28{
29 struct task_struct *thread_task;
30 char name[16];
31};
32
33struct CsrEvent
34{
35 /* wait_queue for waking the kernel thread */
36 wait_queue_head_t wakeup_q;
37 unsigned int wakeup_flag;
38};
39
40typedef struct CsrEvent CsrEventHandle;
41typedef struct semaphore CsrMutexHandle; 22typedef struct semaphore CsrMutexHandle;
42typedef struct CsrThread CsrThreadHandle;
43 23
44#else /* __KERNEL __ */ 24#else /* __KERNEL __ */
45 25
46struct CsrEvent
47{
48 pthread_cond_t event;
49 pthread_mutex_t mutex;
50 u32 eventBits;
51};
52
53typedef struct CsrEvent CsrEventHandle;
54typedef pthread_mutex_t CsrMutexHandle; 26typedef pthread_mutex_t CsrMutexHandle;
55typedef pthread_t CsrThreadHandle;
56 27
57#endif /* __KERNEL__ */ 28#endif /* __KERNEL__ */
58 29
59#ifdef __cplusplus
60}
61#endif
62
63#endif 30#endif
diff --git a/drivers/staging/csr/csr_lib.h b/drivers/staging/csr/csr_lib.h
deleted file mode 100644
index b1a57d5d06f9..000000000000
--- a/drivers/staging/csr/csr_lib.h
+++ /dev/null
@@ -1,188 +0,0 @@
1#ifndef CSR_LIB_H__
2#define CSR_LIB_H__
3/*****************************************************************************
4
5 (c) Cambridge Silicon Radio Limited 2010
6 All rights reserved and confidential information of CSR
7
8 Refer to LICENSE.txt included with this source for details
9 on the license terms.
10
11*****************************************************************************/
12
13#include "csr_prim_defs.h"
14
15#ifdef __cplusplus
16extern "C" {
17#endif
18
19typedef struct
20{
21 CsrPrim type;
22} CsrEvent;
23
24/*----------------------------------------------------------------------------*
25 * CsrEvent_struct
26 *
27 * DESCRIPTION
28 * Generic message creator.
29 * Allocates and fills in a message with the signature CsrEvent
30 *
31 *----------------------------------------------------------------------------*/
32CsrEvent *CsrEvent_struct(u16 primtype, u16 msgtype);
33
34typedef struct
35{
36 CsrPrim type;
37 u8 value;
38} CsrEventCsrUint8;
39
40/*----------------------------------------------------------------------------*
41 * CsrEventCsrUint8_struct
42 *
43 * DESCRIPTION
44 * Generic message creator.
45 * Allocates and fills in a message with the signature CsrEventCsrUint8
46 *
47 *----------------------------------------------------------------------------*/
48CsrEventCsrUint8 *CsrEventCsrUint8_struct(u16 primtype, u16 msgtype, u8 value);
49
50typedef struct
51{
52 CsrPrim type;
53 u16 value;
54} CsrEventCsrUint16;
55
56/*----------------------------------------------------------------------------*
57 * CsrEventCsrUint16_struct
58 *
59 * DESCRIPTION
60 * Generic message creator.
61 * Allocates and fills in a message with the signature CsrEventCsrUint16
62 *
63 *----------------------------------------------------------------------------*/
64CsrEventCsrUint16 *CsrEventCsrUint16_struct(u16 primtype, u16 msgtype, u16 value);
65
66typedef struct
67{
68 CsrPrim type;
69 u16 value1;
70 u8 value2;
71} CsrEventCsrUint16CsrUint8;
72
73/*----------------------------------------------------------------------------*
74 * CsrEventCsrUint16CsrUint8_struct
75 *
76 * DESCRIPTION
77 * Generic message creator.
78 * Allocates and fills in a message with the signature CsrEventCsrUint16CsrUint8
79 *
80 *----------------------------------------------------------------------------*/
81CsrEventCsrUint16CsrUint8 *CsrEventCsrUint16CsrUint8_struct(u16 primtype, u16 msgtype, u16 value1, u8 value2);
82
83typedef struct
84{
85 CsrPrim type;
86 u16 value1;
87 u16 value2;
88} CsrEventCsrUint16CsrUint16;
89
90/*----------------------------------------------------------------------------*
91 * CsrEventCsrUint16CsrUint16_struct
92 *
93 * DESCRIPTION
94 * Generic message creator.
95 * Allocates and fills in a message with the signature CsrEventCsrUint16CsrUint16
96 *
97 *----------------------------------------------------------------------------*/
98CsrEventCsrUint16CsrUint16 *CsrEventCsrUint16CsrUint16_struct(u16 primtype, u16 msgtype, u16 value1, u16 value2);
99
100typedef struct
101{
102 CsrPrim type;
103 u16 value1;
104 u32 value2;
105} CsrEventCsrUint16CsrUint32;
106
107/*----------------------------------------------------------------------------*
108 * CsrEventCsrUint16_struct
109 *
110 * DESCRIPTION
111 * Generic message creator.
112 * Allocates and fills in a message with the signature CsrEventCsrUint16
113 *
114 *----------------------------------------------------------------------------*/
115CsrEventCsrUint16CsrUint32 *CsrEventCsrUint16CsrUint32_struct(u16 primtype, u16 msgtype, u16 value1, u32 value2);
116
117typedef struct
118{
119 CsrPrim type;
120 u16 value1;
121 char *value2;
122} CsrEventCsrUint16CsrCharString;
123
124/*----------------------------------------------------------------------------*
125 * CsrEventCsrUint16CsrCharString_struct
126 *
127 * DESCRIPTION
128 * Generic message creator.
129 * Allocates and fills in a message with the signature CsrEventCsrUint16CsrCharString
130 *
131 *----------------------------------------------------------------------------*/
132CsrEventCsrUint16CsrCharString *CsrEventCsrUint16CsrCharString_struct(u16 primtype, u16 msgtype, u16 value1, char *value2);
133
134typedef struct
135{
136 CsrPrim type;
137 u32 value;
138} CsrEventCsrUint32;
139
140/*----------------------------------------------------------------------------*
141 * CsrEventCsrUint32_struct
142 *
143 * DESCRIPTION
144 * Generic message creator.
145 * Allocates and fills in a message with the signature CsrEventCsrUint32
146 *
147 *----------------------------------------------------------------------------*/
148CsrEventCsrUint32 *CsrEventCsrUint32_struct(u16 primtype, u16 msgtype, u32 value);
149
150typedef struct
151{
152 CsrPrim type;
153 u32 value1;
154 u16 value2;
155} CsrEventCsrUint32CsrUint16;
156
157/*----------------------------------------------------------------------------*
158 * CsrEventCsrUint32CsrUint16_struct
159 *
160 * DESCRIPTION
161 * Generic message creator.
162 * Allocates and fills in a message with the signature CsrEventCsrUint32CsrUint16
163 *
164 *----------------------------------------------------------------------------*/
165CsrEventCsrUint32CsrUint16 *CsrEventCsrUint32CsrUint16_struct(u16 primtype, u16 msgtype, u32 value1, u32 value2);
166
167typedef struct
168{
169 CsrPrim type;
170 u32 value1;
171 char *value2;
172} CsrEventCsrUint32CsrCharString;
173
174/*----------------------------------------------------------------------------*
175 * CsrEventCsrUint32CsrCharString_struct
176 *
177 * DESCRIPTION
178 * Generic message creator.
179 * Allocates and fills in a message with the signature CsrEventCsrUint32CsrCharString
180 *
181 *----------------------------------------------------------------------------*/
182CsrEventCsrUint32CsrCharString *CsrEventCsrUint32CsrCharString_struct(u16 primtype, u16 msgtype, u32 value1, char *value2);
183
184#ifdef __cplusplus
185}
186#endif
187
188#endif /* CSR_LIB_H__ */
diff --git a/drivers/staging/csr/csr_log.h b/drivers/staging/csr/csr_log.h
index b2808569f8de..5de5650767de 100644
--- a/drivers/staging/csr/csr_log.h
+++ b/drivers/staging/csr/csr_log.h
@@ -2,23 +2,18 @@
2#define CSR_LOG_H__ 2#define CSR_LOG_H__
3/***************************************************************************** 3/*****************************************************************************
4 4
5 (c) Cambridge Silicon Radio Limited 2010 5 (c) Cambridge Silicon Radio Limited 2010
6 All rights reserved and confidential information of CSR 6 All rights reserved and confidential information of CSR
7 7
8 Refer to LICENSE.txt included with this source for details 8 Refer to LICENSE.txt included with this source for details
9 on the license terms. 9 on the license terms.
10 10
11*****************************************************************************/ 11*****************************************************************************/
12 12
13#include "csr_sched.h" 13#include "csr_sched.h"
14#include "csr_panic.h"
15#include "csr_prim_defs.h" 14#include "csr_prim_defs.h"
16#include "csr_msgconv.h" 15#include "csr_msgconv.h"
17 16
18#ifdef __cplusplus
19extern "C" {
20#endif
21
22/* 17/*
23 * Log filtering 18 * Log filtering
24 */ 19 */
@@ -77,34 +72,19 @@ u8 CsrLogTaskIsFiltered(CsrSchedQid taskId, CsrLogLevelTask level);
77/* 72/*
78 * Logging stuff 73 * Logging stuff
79 */ 74 */
80#define CSR_LOG_STRINGIFY_REAL(a) #a 75#define CSR_LOG_STRINGIFY_REAL(a) (#a)
81#define CSR_LOG_STRINGIFY(a) CSR_LOG_STRINGIFY_REAL(a) 76#define CSR_LOG_STRINGIFY(a) CSR_LOG_STRINGIFY_REAL(a)
82 77
83#ifdef CSR_LOG_ASSERT_ENABLE 78typedef struct {
84#define CSR_LOG_ASSERT(cond) \ 79 u16 primitiveType;
85 do { \ 80 const char *primitiveName;
86 if (!(cond)) \ 81 CsrMsgConvMsgEntry *messageConv; /* Private - do not use */
87 { \
88 char *panic_arg = "[" __FILE__ ":" CSR_LOG_STRINGIFY(__LINE__) "] - " CSR_LOG_STRINGIFY(cond); \
89 CsrPanic(CSR_TECH_FW, CSR_PANIC_FW_ASSERTION_FAIL, panic_arg); \
90 } \
91 } while (0)
92#else
93#define CSR_LOG_ASSERT(cond)
94#endif
95
96typedef struct
97{
98 u16 primitiveType;
99 const char *primitiveName;
100 CsrMsgConvMsgEntry *messageConv; /* Private - do not use */
101} CsrLogPrimitiveInformation; 82} CsrLogPrimitiveInformation;
102 83
103typedef struct 84typedef struct {
104{ 85 const char *techVer;
105 const char *techVer; 86 u32 primitiveInfoCount;
106 u32 primitiveInfoCount; 87 CsrLogPrimitiveInformation *primitiveInfo;
107 CsrLogPrimitiveInformation *primitiveInfo;
108} CsrLogTechInformation; 88} CsrLogTechInformation;
109 89
110/*---------------------------------*/ 90/*---------------------------------*/
@@ -118,21 +98,19 @@ typedef u32 bitmask32_t;
118#ifdef CSR_LOG_INCLUDE_FILE_NAME_AND_LINE_NUMBER 98#ifdef CSR_LOG_INCLUDE_FILE_NAME_AND_LINE_NUMBER
119/* DEPRECATED - replaced by csr_log_text.h */ 99/* DEPRECATED - replaced by csr_log_text.h */
120#define CSR_LOG_TEXT(text) \ 100#define CSR_LOG_TEXT(text) \
121 do { \ 101 do { \
122 if (!CsrLogTaskIsFiltered(CsrSchedTaskQueueGet(), CSR_LOG_LEVEL_TASK_TEXT)) \ 102 if (!CsrLogTaskIsFiltered(CsrSchedTaskQueueGet(), CSR_LOG_LEVEL_TASK_TEXT)) { \
123 { \ 103 CsrLogTaskText(text, __LINE__, __FILE__); \
124 CsrLogTaskText(text, __LINE__, __FILE__); \ 104 } \
125 } \ 105 } while (0)
126 } while (0)
127#else 106#else
128/* DEPRECATED - replaced by csr_log_text.h */ 107/* DEPRECATED - replaced by csr_log_text.h */
129#define CSR_LOG_TEXT(text) \ 108#define CSR_LOG_TEXT(text) \
130 do { \ 109 do { \
131 if (!CsrLogTaskIsFiltered(CsrSchedTaskQueueGet(), CSR_LOG_LEVEL_TASK_TEXT)) \ 110 if (!CsrLogTaskIsFiltered(CsrSchedTaskQueueGet(), CSR_LOG_LEVEL_TASK_TEXT)) { \
132 { \ 111 CsrLogTaskText(text, 0, NULL); \
133 CsrLogTaskText(text, 0, NULL); \ 112 } \
134 } \ 113 } while (0)
135 } while (0)
136#endif 114#endif
137#else 115#else
138#define CSR_LOG_TEXT(text) 116#define CSR_LOG_TEXT(text)
@@ -140,8 +118,8 @@ typedef u32 bitmask32_t;
140 118
141/* DEPRECATED - replaced by csr_log_text.h */ 119/* DEPRECATED - replaced by csr_log_text.h */
142void CsrLogTaskText(const char *text, 120void CsrLogTaskText(const char *text,
143 u32 line, 121 u32 line,
144 const char *file); 122 const char *file);
145 123
146#define CSR_LOG_STATE_TRANSITION_MASK_FSM_NAME (0x001) 124#define CSR_LOG_STATE_TRANSITION_MASK_FSM_NAME (0x001)
147#define CSR_LOG_STATE_TRANSITION_MASK_NEXT_STATE (0x002) 125#define CSR_LOG_STATE_TRANSITION_MASK_NEXT_STATE (0x002)
@@ -153,16 +131,16 @@ void CsrLogTaskText(const char *text,
153 131
154/* DEPRECATED - replaced by csr_log_text.h */ 132/* DEPRECATED - replaced by csr_log_text.h */
155void CsrLogStateTransition(bitmask16_t mask, 133void CsrLogStateTransition(bitmask16_t mask,
156 u32 identifier, 134 u32 identifier,
157 const char *fsm_name, 135 const char *fsm_name,
158 u32 prev_state, 136 u32 prev_state,
159 const char *prev_state_str, 137 const char *prev_state_str,
160 u32 in_event, 138 u32 in_event,
161 const char *in_event_str, 139 const char *in_event_str,
162 u32 next_state, 140 u32 next_state,
163 const char *next_state_str, 141 const char *next_state_str,
164 u32 line, 142 u32 line,
165 const char *file); 143 const char *file);
166 144
167/*---------------------------------*/ 145/*---------------------------------*/
168/* BSP logging */ 146/* BSP logging */
@@ -183,67 +161,63 @@ void CsrLogDeactivate(CsrSchedQid tskid);
183#define SYNERGY_SERIALIZER_TYPE_SER (0x001) 161#define SYNERGY_SERIALIZER_TYPE_SER (0x001)
184 162
185void CsrLogMessagePut(u32 line, 163void CsrLogMessagePut(u32 line,
186 const char *file, 164 const char *file,
187 CsrSchedQid src_task_id, 165 CsrSchedQid src_task_id,
188 CsrSchedQid dst_taskid, 166 CsrSchedQid dst_taskid,
189 CsrSchedMsgId msg_id, 167 CsrSchedMsgId msg_id,
190 u16 prim_type, 168 u16 prim_type,
191 const void *msg); 169 const void *msg);
192 170
193void CsrLogMessageGet(CsrSchedQid src_task_id, 171void CsrLogMessageGet(CsrSchedQid src_task_id,
194 CsrSchedQid dst_taskid, 172 CsrSchedQid dst_taskid,
195 u8 get_res, 173 u8 get_res,
196 CsrSchedMsgId msg_id, 174 CsrSchedMsgId msg_id,
197 u16 prim_type, 175 u16 prim_type,
198 const void *msg); 176 const void *msg);
199 177
200void CsrLogTimedEventIn(u32 line, 178void CsrLogTimedEventIn(u32 line,
201 const char *file, 179 const char *file,
202 CsrSchedQid task_id, 180 CsrSchedQid task_id,
203 CsrSchedTid tid, 181 CsrSchedTid tid,
204 CsrTime requested_delay, 182 u32 requested_delay,
205 u16 fniarg, 183 u16 fniarg,
206 const void *fnvarg); 184 const void *fnvarg);
207 185
208void CsrLogTimedEventFire(CsrSchedQid task_id, 186void CsrLogTimedEventFire(CsrSchedQid task_id,
209 CsrSchedTid tid); 187 CsrSchedTid tid);
210 188
211void CsrLogTimedEventDone(CsrSchedQid task_id, 189void CsrLogTimedEventDone(CsrSchedQid task_id,
212 CsrSchedTid tid); 190 CsrSchedTid tid);
213 191
214void CsrLogTimedEventCancel(u32 line, 192void CsrLogTimedEventCancel(u32 line,
215 const char *file, 193 const char *file,
216 CsrSchedQid task_id, 194 CsrSchedQid task_id,
217 CsrSchedTid tid, 195 CsrSchedTid tid,
218 u8 cancel_res); 196 u8 cancel_res);
219 197
220void CsrLogBgintRegister(u8 thread_id, 198void CsrLogBgintRegister(u8 thread_id,
221 CsrSchedBgint irq, 199 CsrSchedBgint irq,
222 const char *callback, 200 const char *callback,
223 const void *ptr); 201 const void *ptr);
224void CsrLogBgintUnregister(CsrSchedBgint irq); 202void CsrLogBgintUnregister(CsrSchedBgint irq);
225void CsrLogBgintSet(CsrSchedBgint irq); 203void CsrLogBgintSet(CsrSchedBgint irq);
226void CsrLogBgintServiceStart(CsrSchedBgint irq); 204void CsrLogBgintServiceStart(CsrSchedBgint irq);
227void CsrLogBgintServiceDone(CsrSchedBgint irq); 205void CsrLogBgintServiceDone(CsrSchedBgint irq);
228 206
229void CsrLogExceptionStateEvent(u16 prim_type, 207void CsrLogExceptionStateEvent(u16 prim_type,
230 CsrPrim msg_type, 208 CsrPrim msg_type,
231 u16 state, 209 u16 state,
232 u32 line, 210 u32 line,
233 const char *file); 211 const char *file);
234void CsrLogExceptionGeneral(u16 prim_type, 212void CsrLogExceptionGeneral(u16 prim_type,
235 u16 state, 213 u16 state,
236 const char *text, 214 const char *text,
237 u32 line, 215 u32 line,
238 const char *file); 216 const char *file);
239void CsrLogExceptionWarning(u16 prim_type, 217void CsrLogExceptionWarning(u16 prim_type,
240 u16 state, 218 u16 state,
241 const char *text, 219 const char *text,
242 u32 line, 220 u32 line,
243 const char *file); 221 const char *file);
244
245#ifdef __cplusplus
246}
247#endif
248 222
249#endif 223#endif
diff --git a/drivers/staging/csr/csr_log_configure.h b/drivers/staging/csr/csr_log_configure.h
index 8842e4bf4611..283647cf9702 100644
--- a/drivers/staging/csr/csr_log_configure.h
+++ b/drivers/staging/csr/csr_log_configure.h
@@ -2,45 +2,16 @@
2#define CSR_LOG_CONFIGURE_H__ 2#define CSR_LOG_CONFIGURE_H__
3/***************************************************************************** 3/*****************************************************************************
4 4
5 (c) Cambridge Silicon Radio Limited 2010 5 (c) Cambridge Silicon Radio Limited 2010
6 All rights reserved and confidential information of CSR 6 All rights reserved and confidential information of CSR
7 7
8 Refer to LICENSE.txt included with this source for details 8 Refer to LICENSE.txt included with this source for details
9 on the license terms. 9 on the license terms.
10 10
11*****************************************************************************/ 11 *****************************************************************************/
12 12
13#include "csr_log.h" 13#include "csr_log.h"
14 14
15#ifdef __cplusplus
16extern "C" {
17#endif
18
19/*---------------------------------*/
20/* Log init/deinit */
21/*---------------------------------*/
22void CsrLogInit(u8 size);
23void CsrLogDeinit(void);
24
25/*---------------------------------*/
26/* Log Framework Tech info */
27/*---------------------------------*/
28void CsrLogTechInfoRegister(void);
29
30/* Set the logging level for the environment outside the scheduler context */
31void CsrLogLevelEnvironmentSet(CsrLogLevelEnvironment environmentLogLevel);
32
33
34/* Set the logging level for all scheduler tasks */
35/* This function call takes precedence over all previous calls to CsrLogLevelTaskSetSpecific() */
36void CsrLogLevelTaskSetAll(CsrLogLevelTask tasksLogLevelMask);
37
38/* Set the logging level for a given Task */
39/* This function can be used as a complement to CsrLogLevelTaskSetAll() to add more _or_ less log from a given task than what is set
40generally with CsrLogLevelTaskSetAll(). */
41void CsrLogLevelTaskSetSpecific(CsrSchedQid taskId, CsrLogLevelTask taskLogLevelMask);
42
43
44/*--------------------------------------------*/ 15/*--------------------------------------------*/
45/* Filtering on log text warning levels */ 16/* Filtering on log text warning levels */
46/*--------------------------------------------*/ 17/*--------------------------------------------*/
@@ -65,70 +36,4 @@ typedef u32 CsrLogLevelText;
65 * taskId's in the range 0x0600xxxx to 0x06FFxxxx. And so on for other technologies. */ 36 * taskId's in the range 0x0600xxxx to 0x06FFxxxx. And so on for other technologies. */
66typedef u32 CsrLogTextTaskId; 37typedef u32 CsrLogTextTaskId;
67 38
68/* Set the text logging level for all Tasks */
69/* This function call takes precedence over all previous calls to CsrLogLevelTextSetTask() and CsrLogLevelTextSetTaskSubOrigin() */
70void CsrLogLevelTextSetAll(CsrLogLevelText warningLevelMask);
71
72/* Set the text logging level for a given Task */
73/* This function call takes precedence over all previous calls to CsrLogLevelTextSetTaskSubOrigin(), but it can be used as a complement to
74 * CsrLogLevelTextSetAll() to add more _or_ less log from a given task than what is set generally with CsrLogLevelTextSetAll(). */
75void CsrLogLevelTextSetTask(CsrLogTextTaskId taskId, CsrLogLevelText warningLevelMask);
76
77/* Set the text logging level for a given tasks subOrigin */
78/* This function can be used as a complement to CsrLogLevelTextSetAll() and CsrLogLevelTextSetTask() to add more _or_ less log from a given
79 * subOrigin within a task than what is set generally with CsrLogLevelTextSetAll() _or_ CsrLogLevelTextSetTask(). */
80void CsrLogLevelTextSetTaskSubOrigin(CsrLogTextTaskId taskId, u16 subOrigin, CsrLogLevelText warningLevelMask);
81
82/*******************************************************************************
83
84 NAME
85 CsrLogLevelTextSet
86
87 DESCRIPTION
88 Set the text logging level for a given origin and optionally sub origin
89 by name. If either string is NULL or zero length, it is interpreted as
90 all origins and/or all sub origins respectively. If originName is NULL
91 or zero length, subOriginName is ignored.
92
93 Passing NULL or zero length strings in both originName and subOriginName
94 is equivalent to calling CsrLogLevelTextSetAll, and overrides all
95 previous filter configurations for all origins and sub origins.
96
97 Passing NULL or a zero length string in subOriginName overrides all
98 previous filter configurations for all sub origins of the specified
99 origin.
100
101 Note: the supplied strings may be accessed after the function returns
102 and must remain valid and constant until CsrLogDeinit is called.
103
104 Note: when specifying an origin (originName is not NULL and not zero
105 length), this function can only be used for origins that use the
106 csr_log_text_2.h interface for registration and logging. Filtering for
107 origins that use the legacy csr_log_text.h interface must be be
108 configured using the legacy filter configuration functions that accept
109 a CsrLogTextTaskId as origin specifier. However, when not specifying an
110 origin this function also affects origins that have been registered with
111 the legacy csr_log_text.h interface. Furthermore, using this function
112 and the legacy filter configuration functions on the same origin is not
113 allowed.
114
115 PARAMETERS
116 originName - a string containing the name of the origin. Can be NULL or
117 zero length to set the log level for all origins. In this case, the
118 subOriginName parameter will be ignored.
119 subOriginName - a string containing the name of the sub origin. Can be
120 NULL or zero length to set the log level for all sub origins of the
121 specified origin.
122 warningLevelMask - The desired log level for the specified origin(s) and
123 sub origin(s).
124
125*******************************************************************************/
126void CsrLogLevelTextSet(const char *originName,
127 const char *subOriginName,
128 CsrLogLevelText warningLevelMask);
129
130#ifdef __cplusplus
131}
132#endif
133
134#endif 39#endif
diff --git a/drivers/staging/csr/csr_log_text.h b/drivers/staging/csr/csr_log_text.h
index 9fe6c90244c4..cfcf64aa6225 100644
--- a/drivers/staging/csr/csr_log_text.h
+++ b/drivers/staging/csr/csr_log_text.h
@@ -12,10 +12,6 @@
12 12
13#include "csr_log_configure.h" 13#include "csr_log_configure.h"
14 14
15#ifdef __cplusplus
16extern "C" {
17#endif
18
19typedef struct CsrLogSubOrigin 15typedef struct CsrLogSubOrigin
20{ 16{
21 u16 subOriginNumber; /* Id of the given SubOrigin */ 17 u16 subOriginNumber; /* Id of the given SubOrigin */
@@ -125,8 +121,4 @@ void CsrLogTextBufferDebug(CsrLogTextTaskId taskId, u16 subOrigin, size_t buffer
125#define CSR_LOG_TEXT_UNHANDLED_PRIMITIVE(origin, suborigin, primClass, primType) 121#define CSR_LOG_TEXT_UNHANDLED_PRIMITIVE(origin, suborigin, primClass, primType)
126#endif 122#endif
127 123
128#ifdef __cplusplus
129}
130#endif
131
132#endif 124#endif
diff --git a/drivers/staging/csr/csr_macro.h b/drivers/staging/csr/csr_macro.h
index 57cbfcb0619b..c47f1d91b6fa 100644
--- a/drivers/staging/csr/csr_macro.h
+++ b/drivers/staging/csr/csr_macro.h
@@ -12,26 +12,10 @@
12 12
13#include <linux/types.h> 13#include <linux/types.h>
14 14
15#ifdef __cplusplus
16extern "C" {
17#endif
18
19#define FALSE (0) 15#define FALSE (0)
20#define TRUE (1) 16#define TRUE (1)
21 17
22/*------------------------------------------------------------------*/ 18/*------------------------------------------------------------------*/
23/* Bits - intended to operate on u32 values */
24/*------------------------------------------------------------------*/
25#define CSR_MASK_IS_SET(val, mask) (((val) & (mask)) == (mask))
26#define CSR_MASK_IS_UNSET(val, mask) ((((val) & (mask)) ^ mask) == (mask))
27#define CSR_MASK_SET(val, mask) ((val) |= (mask))
28#define CSR_MASK_UNSET(val, mask) ((val) = ((val) ^ (mask)) & (val)) /* Unsets the bits in val that are set in mask */
29#define CSR_BIT_IS_SET(val, bit) ((u8) ((((val) & (1UL << (bit))) != 0)))
30#define CSR_BIT_SET(val, bit) ((val) |= (1UL << (bit)))
31#define CSR_BIT_UNSET(val, bit) ((val) &= ~(1UL << (bit)))
32#define CSR_BIT_TOGGLE(val, bit) ((val) ^= (1UL << (bit)))
33
34/*------------------------------------------------------------------*/
35/* Endian conversion */ 19/* Endian conversion */
36/*------------------------------------------------------------------*/ 20/*------------------------------------------------------------------*/
37#define CSR_GET_UINT16_FROM_LITTLE_ENDIAN(ptr) (((u16) ((u8 *) (ptr))[0]) | ((u16) ((u8 *) (ptr))[1]) << 8) 21#define CSR_GET_UINT16_FROM_LITTLE_ENDIAN(ptr) (((u16) ((u8 *) (ptr))[0]) | ((u16) ((u8 *) (ptr))[1]) << 8)
@@ -43,72 +27,13 @@ extern "C" {
43 ((u8 *) (ptr))[1] = ((u8) (((uint) >> 8) & 0x000000FF)); \ 27 ((u8 *) (ptr))[1] = ((u8) (((uint) >> 8) & 0x000000FF)); \
44 ((u8 *) (ptr))[2] = ((u8) (((uint) >> 16) & 0x000000FF)); \ 28 ((u8 *) (ptr))[2] = ((u8) (((uint) >> 16) & 0x000000FF)); \
45 ((u8 *) (ptr))[3] = ((u8) (((uint) >> 24) & 0x000000FF)) 29 ((u8 *) (ptr))[3] = ((u8) (((uint) >> 24) & 0x000000FF))
46#define CSR_GET_UINT16_FROM_BIG_ENDIAN(ptr) (((u16) ((u8 *) (ptr))[1]) | ((u16) ((u8 *) (ptr))[0]) << 8)
47#define CSR_GET_UINT24_FROM_BIG_ENDIAN(ptr) (((u32) ((u8 *) (ptr))[2]) | \
48 ((u32) ((u8 *) (ptr))[1]) << 8 | ((u32) ((u8 *) (ptr))[0]) << 16)
49#define CSR_GET_UINT32_FROM_BIG_ENDIAN(ptr) (((u32) ((u8 *) (ptr))[3]) | ((u32) ((u8 *) (ptr))[2]) << 8 | \
50 ((u32) ((u8 *) (ptr))[1]) << 16 | ((u32) ((u8 *) (ptr))[0]) << 24)
51#define CSR_COPY_UINT16_TO_BIG_ENDIAN(uint, ptr) ((u8 *) (ptr))[1] = ((u8) ((uint) & 0x00FF)); \
52 ((u8 *) (ptr))[0] = ((u8) ((uint) >> 8))
53#define CSR_COPY_UINT24_TO_BIG_ENDIAN(uint, ptr) ((u8 *) (ptr))[2] = ((u8) ((uint) & 0x000000FF)); \
54 ((u8 *) (ptr))[1] = ((u8) (((uint) >> 8) & 0x000000FF)); \
55 ((u8 *) (ptr))[0] = ((u8) (((uint) >> 16) & 0x000000FF))
56#define CSR_COPY_UINT32_TO_BIG_ENDIAN(uint, ptr) ((u8 *) (ptr))[3] = ((u8) ((uint) & 0x000000FF)); \
57 ((u8 *) (ptr))[2] = ((u8) (((uint) >> 8) & 0x000000FF)); \
58 ((u8 *) (ptr))[1] = ((u8) (((uint) >> 16) & 0x000000FF)); \
59 ((u8 *) (ptr))[0] = ((u8) (((uint) >> 24) & 0x000000FF))
60
61/*------------------------------------------------------------------*/
62/* XAP conversion macros */
63/*------------------------------------------------------------------*/
64
65#define CSR_LSB16(a) ((u8) ((a) & 0x00ff))
66#define CSR_MSB16(b) ((u8) ((b) >> 8))
67
68#define CSR_CONVERT_8_FROM_XAP(output, input) \
69 (output) = ((u8) (input));(input) += 2
70
71#define CSR_CONVERT_16_FROM_XAP(output, input) \
72 (output) = (u16) ((((u16) (input)[1]) << 8) | \
73 ((u16) (input)[0]));(input) += 2
74
75#define CSR_CONVERT_32_FROM_XAP(output, input) \
76 (output) = (((u32) (input)[1]) << 24) | \
77 (((u32) (input)[0]) << 16) | \
78 (((u32) (input)[3]) << 8) | \
79 ((u32) (input)[2]);input += 4
80
81#define CSR_ADD_UINT8_TO_XAP(output, input) \
82 (output)[0] = (input); \
83 (output)[1] = 0;(output) += 2
84
85#define CSR_ADD_UINT16_TO_XAP(output, input) \
86 (output)[0] = ((u8) ((input) & 0x00FF)); \
87 (output)[1] = ((u8) ((input) >> 8));(output) += 2
88
89#define CSR_ADD_UINT32_TO_XAP(output, input) \
90 (output)[0] = ((u8) (((input) >> 16) & 0x00FF)); \
91 (output)[1] = ((u8) ((input) >> 24)); \
92 (output)[2] = ((u8) ((input) & 0x00FF)); \
93 (output)[3] = ((u8) (((input) >> 8) & 0x00FF));(output) += 4
94 30
95/*------------------------------------------------------------------*/ 31/*------------------------------------------------------------------*/
96/* Misc */ 32/* Misc */
97/*------------------------------------------------------------------*/ 33/*------------------------------------------------------------------*/
98#define CSRMAX(a, b) (((a) > (b)) ? (a) : (b))
99#define CSRMIN(a, b) (((a) < (b)) ? (a) : (b))
100
101/* Use this macro on unused local variables that cannot be removed (such as 34/* Use this macro on unused local variables that cannot be removed (such as
102 unused function parameters). This will quell warnings from certain compilers 35 unused function parameters). This will quell warnings from certain compilers
103 and static code analysis tools like Lint and Valgrind. */ 36 and static code analysis tools like Lint and Valgrind. */
104#define CSR_UNUSED(x) ((void) (x)) 37#define CSR_UNUSED(x) ((void) (x))
105 38
106#define CSR_TOUPPER(character) (((character) >= 'a') && ((character) <= 'z') ? ((character) - 0x20) : (character))
107#define CSR_TOLOWER(character) (((character) >= 'A') && ((character) <= 'Z') ? ((character) + 0x20) : (character))
108#define CSR_ARRAY_SIZE(x) (sizeof(x) / sizeof(*(x)))
109
110#ifdef __cplusplus
111}
112#endif
113
114#endif 39#endif
diff --git a/drivers/staging/csr/csr_msg_transport.h b/drivers/staging/csr/csr_msg_transport.h
index b0095b023817..8d88e7836567 100644
--- a/drivers/staging/csr/csr_msg_transport.h
+++ b/drivers/staging/csr/csr_msg_transport.h
@@ -10,16 +10,8 @@
10 10
11*****************************************************************************/ 11*****************************************************************************/
12 12
13#ifdef __cplusplus
14extern "C" {
15#endif
16
17#ifndef CsrMsgTransport 13#ifndef CsrMsgTransport
18#define CsrMsgTransport CsrSchedMessagePut 14#define CsrMsgTransport CsrSchedMessagePut
19#endif 15#endif
20 16
21#ifdef __cplusplus
22}
23#endif
24
25#endif /* CSR_MSG_TRANSPORT */ 17#endif /* CSR_MSG_TRANSPORT */
diff --git a/drivers/staging/csr/csr_msgconv.c b/drivers/staging/csr/csr_msgconv.c
index 0081a255e91c..db5e845e60f5 100644
--- a/drivers/staging/csr/csr_msgconv.c
+++ b/drivers/staging/csr/csr_msgconv.c
@@ -11,7 +11,6 @@
11#include <linux/module.h> 11#include <linux/module.h>
12#include <linux/types.h> 12#include <linux/types.h>
13#include <linux/slab.h> 13#include <linux/slab.h>
14#include "csr_panic.h"
15#include "csr_sched.h" 14#include "csr_sched.h"
16#include "csr_msgconv.h" 15#include "csr_msgconv.h"
17#include "csr_macro.h" 16#include "csr_macro.h"
diff --git a/drivers/staging/csr/csr_msgconv.h b/drivers/staging/csr/csr_msgconv.h
index 09489f38e52d..7e4dd388ae37 100644
--- a/drivers/staging/csr/csr_msgconv.h
+++ b/drivers/staging/csr/csr_msgconv.h
@@ -15,10 +15,6 @@
15#include "csr_prim_defs.h" 15#include "csr_prim_defs.h"
16#include "csr_sched.h" 16#include "csr_sched.h"
17 17
18#ifdef __cplusplus
19extern "C" {
20#endif
21
22typedef size_t (CsrMsgSizeofFunc)(void *msg); 18typedef size_t (CsrMsgSizeofFunc)(void *msg);
23typedef u8 *(CsrMsgSerializeFunc)(u8 *buffer, size_t *length, void *msg); 19typedef u8 *(CsrMsgSerializeFunc)(u8 *buffer, size_t *length, void *msg);
24typedef void (CsrMsgFreeFunc)(void *msg); 20typedef void (CsrMsgFreeFunc)(void *msg);
@@ -79,9 +75,4 @@ void CsrUint32Des(u32 *value, u8 *buffer, size_t *offset);
79void CsrMemCpyDes(void *value, u8 *buffer, size_t *offset, size_t length); 75void CsrMemCpyDes(void *value, u8 *buffer, size_t *offset, size_t length);
80void CsrCharStringDes(char **value, u8 *buffer, size_t *offset); 76void CsrCharStringDes(char **value, u8 *buffer, size_t *offset);
81 77
82
83#ifdef __cplusplus
84}
85#endif
86
87#endif 78#endif
diff --git a/drivers/staging/csr/csr_panic.c b/drivers/staging/csr/csr_panic.c
deleted file mode 100644
index 095f7fa3ae2c..000000000000
--- a/drivers/staging/csr/csr_panic.c
+++ /dev/null
@@ -1,20 +0,0 @@
1/*****************************************************************************
2
3 (c) Cambridge Silicon Radio Limited 2010
4 All rights reserved and confidential information of CSR
5
6 Refer to LICENSE.txt included with this source for details
7 on the license terms.
8
9*****************************************************************************/
10
11#include <linux/kernel.h>
12#include <linux/module.h>
13
14#include "csr_panic.h"
15
16void CsrPanic(u8 tech, u16 reason, const char *p)
17{
18 BUG_ON(1);
19}
20EXPORT_SYMBOL_GPL(CsrPanic);
diff --git a/drivers/staging/csr/csr_panic.h b/drivers/staging/csr/csr_panic.h
deleted file mode 100644
index 37989fc15bbe..000000000000
--- a/drivers/staging/csr/csr_panic.h
+++ /dev/null
@@ -1,53 +0,0 @@
1#ifndef CSR_PANIC_H__
2#define CSR_PANIC_H__
3/*****************************************************************************
4
5 (c) Cambridge Silicon Radio Limited 2010
6 All rights reserved and confidential information of CSR
7
8 Refer to LICENSE.txt included with this source for details
9 on the license terms.
10
11*****************************************************************************/
12#ifdef __cplusplus
13extern "C" {
14#endif
15
16/* Synergy techonology ID definitions */
17#define CSR_TECH_FW 0
18#define CSR_TECH_BT 1
19#define CSR_TECH_WIFI 2
20#define CSR_TECH_GPS 3
21#define CSR_TECH_NFC 4
22
23/* Panic type ID definitions for technology type CSR_TECH_FW */
24#define CSR_PANIC_FW_UNEXPECTED_VALUE 0
25#define CSR_PANIC_FW_HEAP_EXHAUSTION 1
26#define CSR_PANIC_FW_INVALID_PFREE_POINTER 2
27#define CSR_PANIC_FW_EXCEPTION 3
28#define CSR_PANIC_FW_ASSERTION_FAIL 4
29#define CSR_PANIC_FW_NULL_TASK_HANDLER 5
30#define CSR_PANIC_FW_UNKNOWN_TASK 6
31#define CSR_PANIC_FW_QUEUE_ACCESS_VIOLATION 7
32#define CSR_PANIC_FW_TOO_MANY_MESSAGES 8
33#define CSR_PANIC_FW_TOO_MANY_TIMED_EVENTS 9
34#define CSR_PANIC_FW_ABCSP_SYNC_LOST 10
35#define CSR_PANIC_FW_OVERSIZE_ABCSP_PRIM 11
36#define CSR_PANIC_FW_H4_CORRUPTION 12
37#define CSR_PANIC_FW_H4_SYNC_LOST 13
38#define CSR_PANIC_FW_H4_RX_OVERRUN 14
39#define CSR_PANIC_FW_H4_TX_OVERRUN 15
40#define CSR_PANIC_FW_TM_BC_RESTART_FAIL 16
41#define CSR_PANIC_FW_TM_BC_START_FAIL 17
42#define CSR_PANIC_FW_TM_BC_BAD_STATE 18
43#define CSR_PANIC_FW_TM_BC_TRANSPORT_LOST 19
44
45/* Panic interface used by technologies */
46/* DEPRECATED - replaced by csr_log_text.h */
47void CsrPanic(u8 tech, u16 reason, const char *p);
48
49#ifdef __cplusplus
50}
51#endif
52
53#endif /* CSR_PANIC_H__ */
diff --git a/drivers/staging/csr/csr_prim_defs.h b/drivers/staging/csr/csr_prim_defs.h
index 6a7f73dbb706..81a1eaac30d9 100644
--- a/drivers/staging/csr/csr_prim_defs.h
+++ b/drivers/staging/csr/csr_prim_defs.h
@@ -9,9 +9,6 @@
9 on the license terms. 9 on the license terms.
10 10
11*****************************************************************************/ 11*****************************************************************************/
12#ifdef __cplusplus
13extern "C" {
14#endif
15 12
16/************************************************************************************ 13/************************************************************************************
17 * Segmentation of primitives in upstream and downstream segment 14 * Segmentation of primitives in upstream and downstream segment
@@ -55,8 +52,4 @@ typedef u16 CsrPrim;
55 52
56#define CSR_ENV_PRIM ((u16) (0x00FF | CSR_SYNERGY_EVENT_CLASS_MISC_BASE)) 53#define CSR_ENV_PRIM ((u16) (0x00FF | CSR_SYNERGY_EVENT_CLASS_MISC_BASE))
57 54
58#ifdef __cplusplus
59}
60#endif
61
62#endif /* CSR_PRIM_DEFS_H__ */ 55#endif /* CSR_PRIM_DEFS_H__ */
diff --git a/drivers/staging/csr/csr_result.h b/drivers/staging/csr/csr_result.h
index c7c36d6b59ef..cbb607d943c7 100644
--- a/drivers/staging/csr/csr_result.h
+++ b/drivers/staging/csr/csr_result.h
@@ -10,16 +10,8 @@
10 10
11*****************************************************************************/ 11*****************************************************************************/
12 12
13#ifdef __cplusplus
14extern "C" {
15#endif
16
17typedef u16 CsrResult; 13typedef u16 CsrResult;
18#define CSR_RESULT_SUCCESS ((CsrResult) 0x0000) 14#define CSR_RESULT_SUCCESS ((CsrResult) 0x0000)
19#define CSR_RESULT_FAILURE ((CsrResult) 0xFFFF) 15#define CSR_RESULT_FAILURE ((CsrResult) 0xFFFF)
20 16
21#ifdef __cplusplus
22}
23#endif
24
25#endif 17#endif
diff --git a/drivers/staging/csr/csr_sched.h b/drivers/staging/csr/csr_sched.h
index cc1b8bf66079..c7d672c59f5b 100644
--- a/drivers/staging/csr/csr_sched.h
+++ b/drivers/staging/csr/csr_sched.h
@@ -12,10 +12,6 @@
12#include <linux/types.h> 12#include <linux/types.h>
13#include "csr_time.h" 13#include "csr_time.h"
14 14
15#ifdef __cplusplus
16extern "C" {
17#endif
18
19/* An identifier issued by the scheduler. */ 15/* An identifier issued by the scheduler. */
20typedef u32 CsrSchedIdentifier; 16typedef u32 CsrSchedIdentifier;
21 17
@@ -24,7 +20,6 @@ typedef u16 CsrSchedTaskId;
24 20
25/* A queue identifier */ 21/* A queue identifier */
26typedef u16 CsrSchedQid; 22typedef u16 CsrSchedQid;
27#define CSR_SCHED_QID_INVALID ((CsrSchedQid) 0xFFFF)
28 23
29/* A message identifier */ 24/* A message identifier */
30typedef CsrSchedIdentifier CsrSchedMsgId; 25typedef CsrSchedIdentifier CsrSchedMsgId;
@@ -33,14 +28,11 @@ typedef CsrSchedIdentifier CsrSchedMsgId;
33typedef CsrSchedIdentifier CsrSchedTid; 28typedef CsrSchedIdentifier CsrSchedTid;
34#define CSR_SCHED_TID_INVALID ((CsrSchedTid) 0) 29#define CSR_SCHED_TID_INVALID ((CsrSchedTid) 0)
35 30
36/* Scheduler entry functions share this structure */
37typedef void (*schedEntryFunction_t)(void **inst);
38
39/* Time constants. */ 31/* Time constants. */
40#define CSR_SCHED_TIME_MAX ((CsrTime) 0xFFFFFFFF) 32#define CSR_SCHED_TIME_MAX (0xFFFFFFFF)
41#define CSR_SCHED_MILLISECOND ((CsrTime) (1000)) 33#define CSR_SCHED_MILLISECOND (1000)
42#define CSR_SCHED_SECOND ((CsrTime) (1000 * CSR_SCHED_MILLISECOND)) 34#define CSR_SCHED_SECOND (1000 * CSR_SCHED_MILLISECOND)
43#define CSR_SCHED_MINUTE ((CsrTime) (60 * CSR_SCHED_SECOND)) 35#define CSR_SCHED_MINUTE (60 * CSR_SCHED_SECOND)
44 36
45/* Queue and primitive that identifies the environment */ 37/* Queue and primitive that identifies the environment */
46#define CSR_SCHED_TASK_ID 0xFFFF 38#define CSR_SCHED_TASK_ID 0xFFFF
@@ -53,60 +45,6 @@ typedef void (*schedEntryFunction_t)(void **inst);
53typedef u16 CsrSchedBgint; 45typedef u16 CsrSchedBgint;
54#define CSR_SCHED_BGINT_INVALID ((CsrSchedBgint) 0xFFFF) 46#define CSR_SCHED_BGINT_INVALID ((CsrSchedBgint) 0xFFFF)
55 47
56typedef void (*CsrSchedBgintHandler)(void *);
57
58/*----------------------------------------------------------------------------*
59 * NAME
60 * CsrSchedBgintReg
61 *
62 * DESCRIPTION
63 * Register a background interrupt handler function with the scheduler.
64 * When CsrSchedBgint() is called from the foreground (e.g. an interrupt
65 * routine) the registered function is called.
66 *
67 * If "cb" is null then the interrupt is effectively disabled. If a
68 * no bgints are available, CSR_SCHED_BGINT_INVALID is returned, otherwise
69 * a CsrSchedBgint value is returned to be used in subsequent calls to
70 * CsrSchedBgint(). id is a possibly NULL identifier used for logging
71 * purposes only.
72 *
73 * RETURNS
74 * CsrSchedBgint -- CSR_SCHED_BGINT_INVALID denotes failure to obtain a CsrSchedBgintSet.
75 *
76 *----------------------------------------------------------------------------*/
77CsrSchedBgint CsrSchedBgintReg(CsrSchedBgintHandler cb,
78 void *context,
79 const char *id);
80
81/*----------------------------------------------------------------------------*
82 * NAME
83 * CsrSchedBgintUnreg
84 *
85 * DESCRIPTION
86 * Unregister a background interrupt handler function.
87 *
88 * ``irq'' is a background interrupt handle previously obtained
89 * from a call to CsrSchedBgintReg().
90 *
91 * RETURNS
92 * void.
93 *
94 *----------------------------------------------------------------------------*/
95void CsrSchedBgintUnreg(CsrSchedBgint bgint);
96
97/*----------------------------------------------------------------------------*
98 * NAME
99 * CsrSchedBgintSet
100 *
101 * DESCRIPTION
102 * Set background interrupt.
103 *
104 * RETURNS
105 * void.
106 *
107 *----------------------------------------------------------------------------*/
108void CsrSchedBgintSet(CsrSchedBgint bgint);
109
110/*----------------------------------------------------------------------------* 48/*----------------------------------------------------------------------------*
111 * NAME 49 * NAME
112 * CsrSchedMessagePut 50 * CsrSchedMessagePut
@@ -144,149 +82,4 @@ void CsrSchedMessagePut(CsrSchedQid q,
144 void *mv); 82 void *mv);
145#endif 83#endif
146 84
147/*----------------------------------------------------------------------------*
148 * NAME
149 * CsrSchedMessageBroadcast
150 *
151 * DESCRIPTION
152 * Sends a message to all tasks.
153 *
154 * The user must supply a "factory function" that is called once
155 * for every task that exists. The "factory function", msg_build_func,
156 * must allocate and initialise the message and set the msg_build_ptr
157 * to point to the message when done.
158 *
159 * NOTE
160 * N/A
161 *
162 * RETURNS
163 * void
164 *
165 *----------------------------------------------------------------------------*/
166#if defined(CSR_LOG_ENABLE) && defined(CSR_LOG_INCLUDE_FILE_NAME_AND_LINE_NUMBER)
167void CsrSchedMessageBroadcastStringLog(u16 mi,
168 void *(*msg_build_func)(void *),
169 void *msg_build_ptr,
170 u32 line,
171 const char *file);
172#define CsrSchedMessageBroadcast(mi, fn, ptr) CsrSchedMessageBroadcastStringLog((mi), (fn), (ptr), __LINE__, __FILE__)
173#else
174void CsrSchedMessageBroadcast(u16 mi,
175 void *(*msg_build_func)(void *),
176 void *msg_build_ptr);
177#endif
178
179/*----------------------------------------------------------------------------*
180 * NAME
181 * CsrSchedMessageGet
182 *
183 * DESCRIPTION
184 * Obtains a message from the message queue belonging to the calling task.
185 * The message consists of one or both of a u16 and a void *.
186 *
187 * RETURNS
188 * u8 - TRUE if a message has been obtained from the queue, else FALSE.
189 * If a message is taken from the queue, then "*pmi" and "*pmv" are set to
190 * the "mi" and "mv" passed to CsrSchedMessagePut() respectively.
191 *
192 * "pmi" and "pmv" can be null, in which case the corresponding value from
193 * them message is discarded.
194 *
195 *----------------------------------------------------------------------------*/
196u8 CsrSchedMessageGet(u16 *pmi, void **pmv);
197
198/*----------------------------------------------------------------------------*
199 * NAME
200 * CsrSchedTimerSet
201 *
202 * DESCRIPTION
203 * Causes the void function "fn" to be called with the arguments
204 * "fniarg" and "fnvarg" after "delay" has elapsed.
205 *
206 * "delay" must be less than half the range of a CsrTime.
207 *
208 * CsrSchedTimerSet() does nothing with "fniarg" and "fnvarg" except
209 * deliver them via a call to "fn()". (Unless CsrSchedTimerCancel()
210 * is used to prevent delivery.)
211 *
212 * NOTE
213 * The function will be called at or after "delay"; the actual delay will
214 * depend on the timing behaviour of the scheduler's tasks.
215 *
216 * RETURNS
217 * CsrSchedTid - A timed event identifier, can be used in CsrSchedTimerCancel().
218 *
219 *----------------------------------------------------------------------------*/
220#if defined(CSR_LOG_ENABLE) && defined(CSR_LOG_INCLUDE_FILE_NAME_AND_LINE_NUMBER)
221CsrSchedTid CsrSchedTimerSetStringLog(CsrTime delay,
222 void (*fn)(u16 mi, void *mv),
223 u16 fniarg,
224 void *fnvarg,
225 u32 line,
226 const char *file);
227#define CsrSchedTimerSet(d, fn, fni, fnv) CsrSchedTimerSetStringLog((d), (fn), (fni), (fnv), __LINE__, __FILE__)
228#else
229CsrSchedTid CsrSchedTimerSet(CsrTime delay,
230 void (*fn)(u16 mi, void *mv),
231 u16 fniarg,
232 void *fnvarg);
233#endif
234
235/*----------------------------------------------------------------------------*
236 * NAME
237 * CsrSchedTimerCancel
238 *
239 * DESCRIPTION
240 * Attempts to prevent the timed event with identifier "eventid" from
241 * occurring.
242 *
243 * RETURNS
244 * u8 - TRUE if cancelled, FALSE if the event has already occurred.
245 *
246 *----------------------------------------------------------------------------*/
247#if defined(CSR_LOG_ENABLE) && defined(CSR_LOG_INCLUDE_FILE_NAME_AND_LINE_NUMBER)
248u8 CsrSchedTimerCancelStringLog(CsrSchedTid eventid,
249 u16 *pmi,
250 void **pmv,
251 u32 line,
252 const char *file);
253#define CsrSchedTimerCancel(e, pmi, pmv) CsrSchedTimerCancelStringLog((e), (pmi), (pmv), __LINE__, __FILE__)
254#else
255u8 CsrSchedTimerCancel(CsrSchedTid eventid,
256 u16 *pmi,
257 void **pmv);
258#endif
259
260/*----------------------------------------------------------------------------*
261 * NAME
262 * CsrSchedTaskQueueGet
263 *
264 * DESCRIPTION
265 * Return the queue identifier for the currently running queue
266 *
267 * RETURNS
268 * CsrSchedQid - The current task queue identifier, or 0xFFFF if not available.
269 *
270 *----------------------------------------------------------------------------*/
271CsrSchedQid CsrSchedTaskQueueGet(void);
272
273
274/*----------------------------------------------------------------------------*
275 * NAME
276 * CsrSchedTaskQueueGet
277 *
278 * DESCRIPTION
279 * Return the queue identifier for the currently running queue
280 *
281 * RETURNS
282 * char - The current task queue identifier, or 0xFFFF if not available.
283 *
284 *----------------------------------------------------------------------------*/
285char* CsrSchedTaskNameGet(CsrSchedQid );
286
287
288#ifdef __cplusplus
289}
290#endif
291
292#endif 85#endif
diff --git a/drivers/staging/csr/csr_sdio.h b/drivers/staging/csr/csr_sdio.h
index f0cda84f6a00..624a53fa1d7e 100644
--- a/drivers/staging/csr/csr_sdio.h
+++ b/drivers/staging/csr/csr_sdio.h
@@ -12,10 +12,6 @@
12 12
13#include "csr_result.h" 13#include "csr_result.h"
14 14
15#ifdef __cplusplus
16extern "C" {
17#endif
18
19/* Result Codes */ 15/* Result Codes */
20#define CSR_SDIO_RESULT_INVALID_VALUE ((CsrResult) 1) /* Invalid argument value */ 16#define CSR_SDIO_RESULT_INVALID_VALUE ((CsrResult) 1) /* Invalid argument value */
21#define CSR_SDIO_RESULT_NO_DEVICE ((CsrResult) 2) /* The specified device is no longer present */ 17#define CSR_SDIO_RESULT_NO_DEVICE ((CsrResult) 2) /* The specified device is no longer present */
@@ -724,8 +720,4 @@ CsrResult CsrSdioHardReset(CsrSdioFunction *function);
724void CsrSdioFunctionActive(CsrSdioFunction *function); 720void CsrSdioFunctionActive(CsrSdioFunction *function);
725void CsrSdioFunctionIdle(CsrSdioFunction *function); 721void CsrSdioFunctionIdle(CsrSdioFunction *function);
726 722
727#ifdef __cplusplus
728}
729#endif
730
731#endif 723#endif
diff --git a/drivers/staging/csr/csr_serialize_primitive_types.c b/drivers/staging/csr/csr_serialize_primitive_types.c
index bf5e4ab9f959..9713b9afef64 100644
--- a/drivers/staging/csr/csr_serialize_primitive_types.c
+++ b/drivers/staging/csr/csr_serialize_primitive_types.c
@@ -13,7 +13,6 @@
13#include "csr_prim_defs.h" 13#include "csr_prim_defs.h"
14#include "csr_msgconv.h" 14#include "csr_msgconv.h"
15#include "csr_macro.h" 15#include "csr_macro.h"
16#include "csr_lib.h"
17 16
18void CsrUint8Des(u8 *value, u8 *buffer, size_t *offset) 17void CsrUint8Des(u8 *value, u8 *buffer, size_t *offset)
19{ 18{
diff --git a/drivers/staging/csr/csr_time.c b/drivers/staging/csr/csr_time.c
index 7b597f7622a2..f3f4a9c9c67a 100644
--- a/drivers/staging/csr/csr_time.c
+++ b/drivers/staging/csr/csr_time.c
@@ -9,25 +9,24 @@
9*****************************************************************************/ 9*****************************************************************************/
10 10
11#include <linux/kernel.h> 11#include <linux/kernel.h>
12#include <linux/version.h>
13#include <linux/time.h> 12#include <linux/time.h>
14#include <linux/module.h> 13#include <linux/module.h>
15 14
16#include "csr_time.h" 15#include "csr_time.h"
17 16
18CsrTime CsrTimeGet(CsrTime *high) 17u32 CsrTimeGet(u32 *high)
19{ 18{
20 struct timespec ts; 19 struct timespec ts;
21 u64 time; 20 u64 time;
22 CsrTime low; 21 u32 low;
23 22
24 ts = current_kernel_time(); 23 ts = current_kernel_time();
25 time = (u64) ts.tv_sec * 1000000 + ts.tv_nsec / 1000; 24 time = (u64) ts.tv_sec * 1000000 + ts.tv_nsec / 1000;
26 25
27 if (high != NULL) 26 if (high != NULL)
28 *high = (CsrTime) ((time >> 32) & 0xFFFFFFFF); 27 *high = (u32) ((time >> 32) & 0xFFFFFFFF);
29 28
30 low = (CsrTime) (time & 0xFFFFFFFF); 29 low = (u32) (time & 0xFFFFFFFF);
31 30
32 return low; 31 return low;
33} 32}
diff --git a/drivers/staging/csr/csr_time.h b/drivers/staging/csr/csr_time.h
index 2a45f3e4024d..fc29e8e5e478 100644
--- a/drivers/staging/csr/csr_time.h
+++ b/drivers/staging/csr/csr_time.h
@@ -2,77 +2,43 @@
2#define CSR_TIME_H__ 2#define CSR_TIME_H__
3/***************************************************************************** 3/*****************************************************************************
4 4
5 (c) Cambridge Silicon Radio Limited 2010 5(c) Cambridge Silicon Radio Limited 2010
6 All rights reserved and confidential information of CSR 6All rights reserved and confidential information of CSR
7 7
8 Refer to LICENSE.txt included with this source for details 8Refer to LICENSE.txt included with this source for details
9 on the license terms. 9on the license terms.
10 10
11*****************************************************************************/ 11*****************************************************************************/
12 12
13#include <linux/types.h> 13#include <linux/types.h>
14 14
15#ifdef __cplusplus
16extern "C" {
17#endif
18
19/*******************************************************************************
20
21 NAME
22 CsrTime
23
24 DESCRIPTION
25 Type to hold a value describing the current system time, which is a
26 measure of time elapsed since some arbitrarily defined fixed time
27 reference, usually associated with system startup.
28
29*******************************************************************************/
30typedef u32 CsrTime;
31
32
33/******************************************************************************* 15/*******************************************************************************
34 16
35 NAME 17NAME
36 CsrTimeUtc 18 CsrTimeGet
37 19
38 DESCRIPTION 20DESCRIPTION
39 Type to hold a value describing a UTC wallclock time expressed in 21 Returns the current system time in a low and a high part. The low part
40 seconds and milliseconds elapsed since midnight January 1st 1970. 22 is expressed in microseconds. The high part is incremented when the low
23 part wraps to provide an extended range.
41 24
42*******************************************************************************/ 25 The caller may provide a NULL pointer as the high parameter.
43typedef struct 26 In this case the function just returns the low part and ignores the
44{ 27 high parameter.
45 u32 sec;
46 u16 msec;
47} CsrTimeUtc;
48
49
50/*******************************************************************************
51
52 NAME
53 CsrTimeGet
54 28
55 DESCRIPTION 29 Although the time is expressed in microseconds the actual resolution is
56 Returns the current system time in a low and a high part. The low part 30 platform dependent and can be less. It is recommended that the
57 is expressed in microseconds. The high part is incremented when the low 31 resolution is at least 10 milliseconds.
58 part wraps to provide an extended range.
59 32
60 The caller may provide a NULL pointer as the high parameter. In this case 33PARAMETERS
61 the function just returns the low part and ignores the high parameter. 34 high - Pointer to variable that will receive the high part of the
35 current system time. Passing NULL is valid.
62 36
63 Although the time is expressed in microseconds the actual resolution is 37RETURNS
64 platform dependent and can be less. It is recommended that the 38 Low part of current system time in microseconds.
65 resolution is at least 10 milliseconds.
66
67 PARAMETERS
68 high - Pointer to variable that will receive the high part of the
69 current system time. Passing NULL is valid.
70
71 RETURNS
72 Low part of current system time in microseconds.
73 39
74*******************************************************************************/ 40*******************************************************************************/
75CsrTime CsrTimeGet(CsrTime *high); 41u32 CsrTimeGet(u32 *high);
76 42
77 43
78/*------------------------------------------------------------------*/ 44/*------------------------------------------------------------------*/
@@ -107,8 +73,4 @@ CsrTime CsrTimeGet(CsrTime *high);
107 *----------------------------------------------------------------------------*/ 73 *----------------------------------------------------------------------------*/
108#define CsrTimeSub(t1, t2) ((s32) (t1) - (s32) (t2)) 74#define CsrTimeSub(t1, t2) ((s32) (t1) - (s32) (t2))
109 75
110#ifdef __cplusplus
111}
112#endif
113
114#endif 76#endif
diff --git a/drivers/staging/csr/csr_wifi_common.h b/drivers/staging/csr/csr_wifi_common.h
index cc41a94b8f25..efc43a525a3d 100644
--- a/drivers/staging/csr/csr_wifi_common.h
+++ b/drivers/staging/csr/csr_wifi_common.h
@@ -14,10 +14,6 @@
14#include <linux/types.h> 14#include <linux/types.h>
15#include "csr_result.h" 15#include "csr_result.h"
16 16
17#ifdef __cplusplus
18extern "C" {
19#endif
20
21/* MAC address */ 17/* MAC address */
22typedef struct 18typedef struct
23{ 19{
@@ -101,9 +97,5 @@ typedef struct
101 97
102#define CSR_WIFI_VERSION "5.1.0.0" 98#define CSR_WIFI_VERSION "5.1.0.0"
103 99
104#ifdef __cplusplus
105}
106#endif
107
108#endif 100#endif
109 101
diff --git a/drivers/staging/csr/csr_wifi_fsm.h b/drivers/staging/csr/csr_wifi_fsm.h
index 073e2f8b5532..fde1508c1eae 100644
--- a/drivers/staging/csr/csr_wifi_fsm.h
+++ b/drivers/staging/csr/csr_wifi_fsm.h
@@ -11,10 +11,6 @@
11#ifndef CSR_WIFI_FSM_H 11#ifndef CSR_WIFI_FSM_H
12#define CSR_WIFI_FSM_H 12#define CSR_WIFI_FSM_H
13 13
14#ifdef __cplusplus
15extern "C" {
16#endif
17
18#include "csr_prim_defs.h" 14#include "csr_prim_defs.h"
19#include "csr_log_text.h" 15#include "csr_log_text.h"
20#include "csr_wifi_fsm_event.h" 16#include "csr_wifi_fsm_event.h"
@@ -240,9 +236,5 @@ extern u8 CsrWifiFsmHasEvents(CsrWifiFsmContext *context);
240 */ 236 */
241extern void CsrWifiFsmInstallWakeupCallback(CsrWifiFsmContext *context, CsrWifiFsmExternalWakupCallbackPtr callback); 237extern void CsrWifiFsmInstallWakeupCallback(CsrWifiFsmContext *context, CsrWifiFsmExternalWakupCallbackPtr callback);
242 238
243#ifdef __cplusplus
244}
245#endif
246
247#endif /* CSR_WIFI_FSM_H */ 239#endif /* CSR_WIFI_FSM_H */
248 240
diff --git a/drivers/staging/csr/csr_wifi_fsm_event.h b/drivers/staging/csr/csr_wifi_fsm_event.h
index 57a5cafd40bd..0690ca955ef5 100644
--- a/drivers/staging/csr/csr_wifi_fsm_event.h
+++ b/drivers/staging/csr/csr_wifi_fsm_event.h
@@ -11,10 +11,6 @@
11#ifndef CSR_WIFI_FSM_EVENT_H 11#ifndef CSR_WIFI_FSM_EVENT_H
12#define CSR_WIFI_FSM_EVENT_H 12#define CSR_WIFI_FSM_EVENT_H
13 13
14#ifdef __cplusplus
15extern "C" {
16#endif
17
18#include "csr_prim_defs.h" 14#include "csr_prim_defs.h"
19#include "csr_sched.h" 15#include "csr_sched.h"
20 16
@@ -42,9 +38,5 @@ typedef struct CsrWifiFsmEvent
42 struct CsrWifiFsmEvent *next; 38 struct CsrWifiFsmEvent *next;
43} CsrWifiFsmEvent; 39} CsrWifiFsmEvent;
44 40
45#ifdef __cplusplus
46}
47#endif
48
49#endif /* CSR_WIFI_FSM_EVENT_H */ 41#endif /* CSR_WIFI_FSM_EVENT_H */
50 42
diff --git a/drivers/staging/csr/csr_wifi_fsm_types.h b/drivers/staging/csr/csr_wifi_fsm_types.h
index 26752bf316e0..d21c60a81fcf 100644
--- a/drivers/staging/csr/csr_wifi_fsm_types.h
+++ b/drivers/staging/csr/csr_wifi_fsm_types.h
@@ -11,13 +11,8 @@
11#ifndef CSR_WIFI_FSM_TYPES_H 11#ifndef CSR_WIFI_FSM_TYPES_H
12#define CSR_WIFI_FSM_TYPES_H 12#define CSR_WIFI_FSM_TYPES_H
13 13
14#ifdef __cplusplus
15extern "C" {
16#endif
17
18#include <linux/types.h> 14#include <linux/types.h>
19#include "csr_macro.h" 15#include "csr_macro.h"
20#include "csr_panic.h"
21#include "csr_sched.h" 16#include "csr_sched.h"
22 17
23#ifdef CSR_WIFI_FSM_MUTEX_ENABLE 18#ifdef CSR_WIFI_FSM_MUTEX_ENABLE
@@ -432,9 +427,4 @@ struct CsrWifiFsmContext
432#endif 427#endif
433}; 428};
434 429
435
436#ifdef __cplusplus
437}
438#endif
439
440#endif /* CSR_WIFI_FSM_TYPES_H */ 430#endif /* CSR_WIFI_FSM_TYPES_H */
diff --git a/drivers/staging/csr/csr_wifi_hip_card.h b/drivers/staging/csr/csr_wifi_hip_card.h
index 9caf88c7887d..bd47f606e0de 100644
--- a/drivers/staging/csr/csr_wifi_hip_card.h
+++ b/drivers/staging/csr/csr_wifi_hip_card.h
@@ -21,10 +21,6 @@
21#ifndef __CARD_H__ 21#ifndef __CARD_H__
22#define __CARD_H__ 22#define __CARD_H__
23 23
24#ifdef __cplusplus
25extern "C" {
26#endif
27
28#include "csr_wifi_hip_card_sdio.h" 24#include "csr_wifi_hip_card_sdio.h"
29#include "csr_wifi_hip_signals.h" 25#include "csr_wifi_hip_signals.h"
30#include "csr_wifi_hip_unifi_udi.h" 26#include "csr_wifi_hip_unifi_udi.h"
@@ -115,9 +111,4 @@ void unifi_debug_string_to_buf(const char *str);
115void unifi_debug_hex_to_buf(const char *buff, u16 length); 111void unifi_debug_hex_to_buf(const char *buff, u16 length);
116#endif 112#endif
117 113
118
119#ifdef __cplusplus
120}
121#endif
122
123#endif /* __CARD_H__ */ 114#endif /* __CARD_H__ */
diff --git a/drivers/staging/csr/csr_wifi_hip_card_sdio.c b/drivers/staging/csr/csr_wifi_hip_card_sdio.c
index cf148a0fec6a..25cabf3234c2 100644
--- a/drivers/staging/csr/csr_wifi_hip_card_sdio.c
+++ b/drivers/staging/csr/csr_wifi_hip_card_sdio.c
@@ -70,8 +70,6 @@ card_t* unifi_alloc_card(CsrSdioFunction *sdio, void *ospriv)
70 card_t *card; 70 card_t *card;
71 u32 i; 71 u32 i;
72 72
73 func_enter();
74
75 73
76 card = kzalloc(sizeof(card_t), GFP_KERNEL); 74 card = kzalloc(sizeof(card_t), GFP_KERNEL);
77 if (card == NULL) 75 if (card == NULL)
@@ -148,7 +146,6 @@ card_t* unifi_alloc_card(CsrSdioFunction *sdio, void *ospriv)
148 } 146 }
149 } 147 }
150#endif 148#endif
151 func_exit();
152 return card; 149 return card;
153} /* unifi_alloc_card() */ 150} /* unifi_alloc_card() */
154 151
@@ -171,35 +168,29 @@ CsrResult unifi_init_card(card_t *card, s32 led_mask)
171{ 168{
172 CsrResult r; 169 CsrResult r;
173 170
174 func_enter();
175 171
176 if (card == NULL) 172 if (card == NULL)
177 { 173 {
178 func_exit_r(CSR_WIFI_HIP_RESULT_INVALID_VALUE);
179 return CSR_WIFI_HIP_RESULT_INVALID_VALUE; 174 return CSR_WIFI_HIP_RESULT_INVALID_VALUE;
180 } 175 }
181 176
182 r = unifi_init(card); 177 r = unifi_init(card);
183 if (r != CSR_RESULT_SUCCESS) 178 if (r != CSR_RESULT_SUCCESS)
184 { 179 {
185 func_exit_r(r);
186 return r; 180 return r;
187 } 181 }
188 182
189 r = unifi_hip_init(card); 183 r = unifi_hip_init(card);
190 if (r == CSR_WIFI_HIP_RESULT_NO_DEVICE) 184 if (r == CSR_WIFI_HIP_RESULT_NO_DEVICE)
191 { 185 {
192 func_exit_r(r);
193 return r; 186 return r;
194 } 187 }
195 if (r != CSR_RESULT_SUCCESS) 188 if (r != CSR_RESULT_SUCCESS)
196 { 189 {
197 unifi_error(card->ospriv, "Failed to start host protocol.\n"); 190 unifi_error(card->ospriv, "Failed to start host protocol.\n");
198 func_exit_r(r);
199 return r; 191 return r;
200 } 192 }
201 193
202 func_exit();
203 return CSR_RESULT_SUCCESS; 194 return CSR_RESULT_SUCCESS;
204} 195}
205 196
@@ -223,11 +214,8 @@ CsrResult unifi_init(card_t *card)
223 CsrResult r; 214 CsrResult r;
224 CsrResult csrResult; 215 CsrResult csrResult;
225 216
226 func_enter();
227
228 if (card == NULL) 217 if (card == NULL)
229 { 218 {
230 func_exit_r(CSR_WIFI_HIP_RESULT_INVALID_VALUE);
231 return CSR_WIFI_HIP_RESULT_INVALID_VALUE; 219 return CSR_WIFI_HIP_RESULT_INVALID_VALUE;
232 } 220 }
233 221
@@ -250,7 +238,6 @@ CsrResult unifi_init(card_t *card)
250 if (csrResult != CSR_RESULT_SUCCESS) 238 if (csrResult != CSR_RESULT_SUCCESS)
251 { 239 {
252 r = ConvertCsrSdioToCsrHipResult(card, csrResult); 240 r = ConvertCsrSdioToCsrHipResult(card, csrResult);
253 func_exit_r(r);
254 return r; 241 return r;
255 } 242 }
256 card->sdio_clock_speed = UNIFI_SDIO_CLOCK_SAFE_HZ; 243 card->sdio_clock_speed = UNIFI_SDIO_CLOCK_SAFE_HZ;
@@ -268,7 +255,6 @@ CsrResult unifi_init(card_t *card)
268 if (r != CSR_RESULT_SUCCESS) 255 if (r != CSR_RESULT_SUCCESS)
269 { 256 {
270 unifi_error(card->ospriv, "Failed to reset UniFi\n"); 257 unifi_error(card->ospriv, "Failed to reset UniFi\n");
271 func_exit_r(r);
272 return r; 258 return r;
273 } 259 }
274 260
@@ -278,7 +264,6 @@ CsrResult unifi_init(card_t *card)
278 if (r != CSR_RESULT_SUCCESS) 264 if (r != CSR_RESULT_SUCCESS)
279 { 265 {
280 unifi_error(card->ospriv, "Failed to set power save mode\n"); 266 unifi_error(card->ospriv, "Failed to set power save mode\n");
281 func_exit_r(r);
282 return r; 267 return r;
283 } 268 }
284 269
@@ -298,7 +283,6 @@ CsrResult unifi_init(card_t *card)
298 if (r != CSR_RESULT_SUCCESS) 283 if (r != CSR_RESULT_SUCCESS)
299 { 284 {
300 unifi_error(card->ospriv, "Failed to write SHARED_DMEM_PAGE\n"); 285 unifi_error(card->ospriv, "Failed to write SHARED_DMEM_PAGE\n");
301 func_exit_r(r);
302 return r; 286 return r;
303 } 287 }
304 r = unifi_write_direct16(card, ChipHelper_HOST_WINDOW2_PAGE(card->helper) * 2, 0); 288 r = unifi_write_direct16(card, ChipHelper_HOST_WINDOW2_PAGE(card->helper) * 2, 0);
@@ -309,7 +293,6 @@ CsrResult unifi_init(card_t *card)
309 if (r != CSR_RESULT_SUCCESS) 293 if (r != CSR_RESULT_SUCCESS)
310 { 294 {
311 unifi_error(card->ospriv, "Failed to write PROG_MEM2_PAGE\n"); 295 unifi_error(card->ospriv, "Failed to write PROG_MEM2_PAGE\n");
312 func_exit_r(r);
313 return r; 296 return r;
314 } 297 }
315 298
@@ -338,7 +321,6 @@ CsrResult unifi_init(card_t *card)
338 unifi_error(card->ospriv, "Probe for Flash failed\n"); 321 unifi_error(card->ospriv, "Probe for Flash failed\n");
339 } 322 }
340 323
341 func_exit_r(r);
342 return r; 324 return r;
343} /* unifi_init() */ 325} /* unifi_init() */
344 326
@@ -363,11 +345,8 @@ CsrResult unifi_download(card_t *card, s32 led_mask)
363 CsrResult r; 345 CsrResult r;
364 void *dlpriv; 346 void *dlpriv;
365 347
366 func_enter();
367
368 if (card == NULL) 348 if (card == NULL)
369 { 349 {
370 func_exit_r(CSR_WIFI_HIP_RESULT_INVALID_VALUE);
371 return CSR_WIFI_HIP_RESULT_INVALID_VALUE; 350 return CSR_WIFI_HIP_RESULT_INVALID_VALUE;
372 } 351 }
373 352
@@ -380,7 +359,6 @@ CsrResult unifi_download(card_t *card, s32 led_mask)
380 dlpriv = unifi_dl_fw_read_start(card, UNIFI_FW_STA); 359 dlpriv = unifi_dl_fw_read_start(card, UNIFI_FW_STA);
381 if (dlpriv == NULL) 360 if (dlpriv == NULL)
382 { 361 {
383 func_exit_r(CSR_WIFI_HIP_RESULT_NOT_FOUND);
384 return CSR_WIFI_HIP_RESULT_NOT_FOUND; 362 return CSR_WIFI_HIP_RESULT_NOT_FOUND;
385 } 363 }
386 364
@@ -389,15 +367,12 @@ CsrResult unifi_download(card_t *card, s32 led_mask)
389 if (r != CSR_RESULT_SUCCESS) 367 if (r != CSR_RESULT_SUCCESS)
390 { 368 {
391 unifi_error(card->ospriv, "Failed to download firmware\n"); 369 unifi_error(card->ospriv, "Failed to download firmware\n");
392 func_exit_r(r);
393 return r; 370 return r;
394 } 371 }
395 372
396 /* Free the firmware file information. */ 373 /* Free the firmware file information. */
397 unifi_fw_read_stop(card->ospriv, dlpriv); 374 unifi_fw_read_stop(card->ospriv, dlpriv);
398 375
399 func_exit();
400
401 return CSR_RESULT_SUCCESS; 376 return CSR_RESULT_SUCCESS;
402} /* unifi_download() */ 377} /* unifi_download() */
403 378
@@ -425,8 +400,6 @@ static CsrResult unifi_hip_init(card_t *card)
425 CsrResult r; 400 CsrResult r;
426 CsrResult csrResult; 401 CsrResult csrResult;
427 402
428 func_enter();
429
430 r = card_hw_init(card); 403 r = card_hw_init(card);
431 if (r == CSR_WIFI_HIP_RESULT_NO_DEVICE) 404 if (r == CSR_WIFI_HIP_RESULT_NO_DEVICE)
432 { 405 {
@@ -435,7 +408,6 @@ static CsrResult unifi_hip_init(card_t *card)
435 if (r != CSR_RESULT_SUCCESS) 408 if (r != CSR_RESULT_SUCCESS)
436 { 409 {
437 unifi_error(card->ospriv, "Failed to establish communication with UniFi\n"); 410 unifi_error(card->ospriv, "Failed to establish communication with UniFi\n");
438 func_exit_r(r);
439 return r; 411 return r;
440 } 412 }
441#ifdef CSR_PRE_ALLOC_NET_DATA 413#ifdef CSR_PRE_ALLOC_NET_DATA
@@ -455,7 +427,6 @@ static CsrResult unifi_hip_init(card_t *card)
455 if (r != CSR_RESULT_SUCCESS) 427 if (r != CSR_RESULT_SUCCESS)
456 { 428 {
457 unifi_error(card->ospriv, "Init slots failed: %d\n", r); 429 unifi_error(card->ospriv, "Init slots failed: %d\n", r);
458 func_exit_r(r);
459 return r; 430 return r;
460 } 431 }
461 432
@@ -464,7 +435,6 @@ static CsrResult unifi_hip_init(card_t *card)
464 r = unifi_set_host_state(card, UNIFI_HOST_STATE_AWAKE); 435 r = unifi_set_host_state(card, UNIFI_HOST_STATE_AWAKE);
465 if (r != CSR_RESULT_SUCCESS) 436 if (r != CSR_RESULT_SUCCESS)
466 { 437 {
467 func_exit_r(r);
468 return r; 438 return r;
469 } 439 }
470 440
@@ -479,12 +449,9 @@ static CsrResult unifi_hip_init(card_t *card)
479 r = CardGenInt(card); 449 r = CardGenInt(card);
480 if (r != CSR_RESULT_SUCCESS) 450 if (r != CSR_RESULT_SUCCESS)
481 { 451 {
482 func_exit_r(r);
483 return r; 452 return r;
484 } 453 }
485 454
486 func_exit();
487
488 return CSR_RESULT_SUCCESS; 455 return CSR_RESULT_SUCCESS;
489} /* unifi_hip_init() */ 456} /* unifi_hip_init() */
490 457
@@ -609,8 +576,6 @@ static CsrResult card_hw_init(card_t *card)
609 s16 search_4slut_again; 576 s16 search_4slut_again;
610 CsrResult csrResult; 577 CsrResult csrResult;
611 578
612 func_enter();
613
614 /* 579 /*
615 * The device revision from the TPLMID_MANF and TPLMID_CARD fields 580 * The device revision from the TPLMID_MANF and TPLMID_CARD fields
616 * of the CIS are available as 581 * of the CIS are available as
@@ -635,7 +600,6 @@ static CsrResult card_hw_init(card_t *card)
635 if (r != CSR_RESULT_SUCCESS) 600 if (r != CSR_RESULT_SUCCESS)
636 { 601 {
637 unifi_error(card->ospriv, "Firmware hasn't started\n"); 602 unifi_error(card->ospriv, "Firmware hasn't started\n");
638 func_exit_r(r);
639 return r; 603 return r;
640 } 604 }
641 unifi_trace(card->ospriv, UDBG4, "SLUT addr 0x%lX\n", slut_address); 605 unifi_trace(card->ospriv, UDBG4, "SLUT addr 0x%lX\n", slut_address);
@@ -652,7 +616,6 @@ static CsrResult card_hw_init(card_t *card)
652 if (csrResult != CSR_RESULT_SUCCESS) 616 if (csrResult != CSR_RESULT_SUCCESS)
653 { 617 {
654 r = ConvertCsrSdioToCsrHipResult(card, csrResult); 618 r = ConvertCsrSdioToCsrHipResult(card, csrResult);
655 func_exit_r(r);
656 return r; 619 return r;
657 } 620 }
658 card->sdio_clock_speed = UNIFI_SDIO_CLOCK_INIT_HZ; 621 card->sdio_clock_speed = UNIFI_SDIO_CLOCK_INIT_HZ;
@@ -671,14 +634,12 @@ static CsrResult card_hw_init(card_t *card)
671 if (r != CSR_RESULT_SUCCESS) 634 if (r != CSR_RESULT_SUCCESS)
672 { 635 {
673 unifi_error(card->ospriv, "Failed to read SLUT finger print\n"); 636 unifi_error(card->ospriv, "Failed to read SLUT finger print\n");
674 func_exit_r(r);
675 return r; 637 return r;
676 } 638 }
677 639
678 if (finger_print != SLUT_FINGERPRINT) 640 if (finger_print != SLUT_FINGERPRINT)
679 { 641 {
680 unifi_error(card->ospriv, "Failed to find Symbol lookup table fingerprint\n"); 642 unifi_error(card->ospriv, "Failed to find Symbol lookup table fingerprint\n");
681 func_exit_r(CSR_RESULT_FAILURE);
682 return CSR_RESULT_FAILURE; 643 return CSR_RESULT_FAILURE;
683 } 644 }
684 645
@@ -696,7 +657,6 @@ static CsrResult card_hw_init(card_t *card)
696 r = unifi_card_read16(card, slut_address, &s); 657 r = unifi_card_read16(card, slut_address, &s);
697 if (r != CSR_RESULT_SUCCESS) 658 if (r != CSR_RESULT_SUCCESS)
698 { 659 {
699 func_exit_r(r);
700 return r; 660 return r;
701 } 661 }
702 slut_address += 2; 662 slut_address += 2;
@@ -710,7 +670,6 @@ static CsrResult card_hw_init(card_t *card)
710 r = unifi_read32(card, slut_address, &l); 670 r = unifi_read32(card, slut_address, &l);
711 if (r != CSR_RESULT_SUCCESS) 671 if (r != CSR_RESULT_SUCCESS)
712 { 672 {
713 func_exit_r(r);
714 return r; 673 return r;
715 } 674 }
716 slut_address += 4; 675 slut_address += 4;
@@ -739,7 +698,6 @@ static CsrResult card_hw_init(card_t *card)
739 if (r != CSR_RESULT_SUCCESS) 698 if (r != CSR_RESULT_SUCCESS)
740 { 699 {
741 unifi_error(card->ospriv, "Failed to read config data\n"); 700 unifi_error(card->ospriv, "Failed to read config data\n");
742 func_exit_r(r);
743 return r; 701 return r;
744 } 702 }
745 /* .. and then we copy the data to the host structure */ 703 /* .. and then we copy the data to the host structure */
@@ -753,7 +711,6 @@ static CsrResult card_hw_init(card_t *card)
753 { 711 {
754 unifi_error(card->ospriv, "From host data slots %d\n", cfg_data->num_fromhost_data_slots); 712 unifi_error(card->ospriv, "From host data slots %d\n", cfg_data->num_fromhost_data_slots);
755 unifi_error(card->ospriv, "need to be (queues * x + 2) (UNIFI_RESERVED_COMMAND_SLOTS for commands)\n"); 713 unifi_error(card->ospriv, "need to be (queues * x + 2) (UNIFI_RESERVED_COMMAND_SLOTS for commands)\n");
756 func_exit_r(CSR_RESULT_FAILURE);
757 return CSR_RESULT_FAILURE; 714 return CSR_RESULT_FAILURE;
758 } 715 }
759 716
@@ -781,7 +738,6 @@ static CsrResult card_hw_init(card_t *card)
781 if ((card->sdio_io_block_size % cfg_data->sig_frag_size) != 0) 738 if ((card->sdio_io_block_size % cfg_data->sig_frag_size) != 0)
782 { 739 {
783 unifi_error(card->ospriv, "Configuration error: Can not pad to-host signals.\n"); 740 unifi_error(card->ospriv, "Configuration error: Can not pad to-host signals.\n");
784 func_exit_r(CSR_WIFI_HIP_RESULT_INVALID_VALUE);
785 return CSR_WIFI_HIP_RESULT_INVALID_VALUE; 741 return CSR_WIFI_HIP_RESULT_INVALID_VALUE;
786 } 742 }
787 cfg_data->tohost_signal_padding = (u16) (card->sdio_io_block_size / cfg_data->sig_frag_size); 743 cfg_data->tohost_signal_padding = (u16) (card->sdio_io_block_size / cfg_data->sig_frag_size);
@@ -795,7 +751,6 @@ static CsrResult card_hw_init(card_t *card)
795 if (r != CSR_RESULT_SUCCESS) 751 if (r != CSR_RESULT_SUCCESS)
796 { 752 {
797 unifi_error(card->ospriv, "Failed to write To-Host Signal Padding Fragments\n"); 753 unifi_error(card->ospriv, "Failed to write To-Host Signal Padding Fragments\n");
798 func_exit_r(r);
799 return r; 754 return r;
800 } 755 }
801 } 756 }
@@ -818,7 +773,6 @@ static CsrResult card_hw_init(card_t *card)
818 if (r != CSR_RESULT_SUCCESS) 773 if (r != CSR_RESULT_SUCCESS)
819 { 774 {
820 unifi_error(card->ospriv, "Failed to read build id\n"); 775 unifi_error(card->ospriv, "Failed to read build id\n");
821 func_exit_r(r);
822 return r; 776 return r;
823 } 777 }
824 card->build_id = n; 778 card->build_id = n;
@@ -835,7 +789,6 @@ static CsrResult card_hw_init(card_t *card)
835 if (r != CSR_RESULT_SUCCESS) 789 if (r != CSR_RESULT_SUCCESS)
836 { 790 {
837 unifi_error(card->ospriv, "Failed to read build string\n"); 791 unifi_error(card->ospriv, "Failed to read build string\n");
838 func_exit_r(r);
839 return r; 792 return r;
840 } 793 }
841 break; 794 break;
@@ -853,7 +806,6 @@ static CsrResult card_hw_init(card_t *card)
853 if (r != CSR_RESULT_SUCCESS) 806 if (r != CSR_RESULT_SUCCESS)
854 { 807 {
855 unifi_error(card->ospriv, "Failed to write loader load image command\n"); 808 unifi_error(card->ospriv, "Failed to write loader load image command\n");
856 func_exit_r(r);
857 return r; 809 return r;
858 } 810 }
859 811
@@ -871,7 +823,6 @@ static CsrResult card_hw_init(card_t *card)
871 if (r != CSR_RESULT_SUCCESS) 823 if (r != CSR_RESULT_SUCCESS)
872 { 824 {
873 unifi_error(card->ospriv, "Failed to patch firmware\n"); 825 unifi_error(card->ospriv, "Failed to patch firmware\n");
874 func_exit_r(r);
875 return r; 826 return r;
876 } 827 }
877 } 828 }
@@ -882,7 +833,6 @@ static CsrResult card_hw_init(card_t *card)
882 if (r != CSR_RESULT_SUCCESS) 833 if (r != CSR_RESULT_SUCCESS)
883 { 834 {
884 unifi_error(card->ospriv, "Failed to write loader restart command\n"); 835 unifi_error(card->ospriv, "Failed to write loader restart command\n");
885 func_exit_r(r);
886 return r; 836 return r;
887 } 837 }
888 838
@@ -913,7 +863,6 @@ static CsrResult card_hw_init(card_t *card)
913 if (cfg_data == NULL) 863 if (cfg_data == NULL)
914 { 864 {
915 unifi_error(card->ospriv, "Failed to find SDIO_SLOT_CONFIG Symbol\n"); 865 unifi_error(card->ospriv, "Failed to find SDIO_SLOT_CONFIG Symbol\n");
916 func_exit_r(CSR_RESULT_FAILURE);
917 return CSR_RESULT_FAILURE; 866 return CSR_RESULT_FAILURE;
918 } 867 }
919 868
@@ -930,12 +879,10 @@ static CsrResult card_hw_init(card_t *card)
930 { 879 {
931 unifi_error(card->ospriv, "Failed to read init flag at %08lx\n", 880 unifi_error(card->ospriv, "Failed to read init flag at %08lx\n",
932 card->init_flag_addr); 881 card->init_flag_addr);
933 func_exit_r(r);
934 return r; 882 return r;
935 } 883 }
936 if (initialised != 0) 884 if (initialised != 0)
937 { 885 {
938 func_exit_r(CSR_RESULT_FAILURE);
939 return CSR_RESULT_FAILURE; 886 return CSR_RESULT_FAILURE;
940 } 887 }
941 888
@@ -957,7 +904,6 @@ static CsrResult card_hw_init(card_t *card)
957 unifi_error(card->ospriv, "UniFi f/w protocol major version (%d) is different from driver (v%d.%d)\n", 904 unifi_error(card->ospriv, "UniFi f/w protocol major version (%d) is different from driver (v%d.%d)\n",
958 major, UNIFI_HIP_MAJOR_VERSION, UNIFI_HIP_MINOR_VERSION); 905 major, UNIFI_HIP_MAJOR_VERSION, UNIFI_HIP_MINOR_VERSION);
959#ifndef CSR_WIFI_DISABLE_HIP_VERSION_CHECK 906#ifndef CSR_WIFI_DISABLE_HIP_VERSION_CHECK
960 func_exit_r(CSR_RESULT_FAILURE);
961 return CSR_RESULT_FAILURE; 907 return CSR_RESULT_FAILURE;
962#endif 908#endif
963 } 909 }
@@ -967,7 +913,6 @@ static CsrResult card_hw_init(card_t *card)
967 major, minor, 913 major, minor,
968 UNIFI_HIP_MAJOR_VERSION, UNIFI_HIP_MINOR_VERSION); 914 UNIFI_HIP_MAJOR_VERSION, UNIFI_HIP_MINOR_VERSION);
969#ifndef CSR_WIFI_DISABLE_HIP_VERSION_CHECK 915#ifndef CSR_WIFI_DISABLE_HIP_VERSION_CHECK
970 func_exit_r(CSR_RESULT_FAILURE);
971 return CSR_RESULT_FAILURE; 916 return CSR_RESULT_FAILURE;
972#endif 917#endif
973 } 918 }
@@ -978,7 +923,6 @@ static CsrResult card_hw_init(card_t *card)
978 */ 923 */
979 unifi_read_panic(card); 924 unifi_read_panic(card);
980 925
981 func_exit();
982 return CSR_RESULT_SUCCESS; 926 return CSR_RESULT_SUCCESS;
983} /* card_hw_init() */ 927} /* card_hw_init() */
984 928
@@ -1004,8 +948,6 @@ static CsrResult card_wait_for_unifi_to_reset(card_t *card)
1004 u8 io_enable; 948 u8 io_enable;
1005 CsrResult csrResult; 949 CsrResult csrResult;
1006 950
1007 func_enter();
1008
1009 r = CSR_RESULT_SUCCESS; 951 r = CSR_RESULT_SUCCESS;
1010 for (i = 0; i < MAILBOX2_ATTEMPTS; i++) 952 for (i = 0; i < MAILBOX2_ATTEMPTS; i++)
1011 { 953 {
@@ -1107,7 +1049,6 @@ static CsrResult card_wait_for_unifi_to_reset(card_t *card)
1107 r = CSR_RESULT_FAILURE; 1049 r = CSR_RESULT_FAILURE;
1108 } 1050 }
1109 1051
1110 func_exit();
1111 return r; 1052 return r;
1112} /* card_wait_for_unifi_to_reset() */ 1053} /* card_wait_for_unifi_to_reset() */
1113 1054
@@ -1136,14 +1077,11 @@ static CsrResult card_wait_for_unifi_to_disable(card_t *card)
1136 u8 io_enable; 1077 u8 io_enable;
1137 CsrResult csrResult; 1078 CsrResult csrResult;
1138 1079
1139 func_enter();
1140
1141 if (card->chip_id <= SDIO_CARD_ID_UNIFI_2) 1080 if (card->chip_id <= SDIO_CARD_ID_UNIFI_2)
1142 { 1081 {
1143 unifi_error(card->ospriv, 1082 unifi_error(card->ospriv,
1144 "Function reset method not supported for chip_id=%d\n", 1083 "Function reset method not supported for chip_id=%d\n",
1145 card->chip_id); 1084 card->chip_id);
1146 func_exit();
1147 return CSR_RESULT_FAILURE; 1085 return CSR_RESULT_FAILURE;
1148 } 1086 }
1149 1087
@@ -1210,7 +1148,6 @@ static CsrResult card_wait_for_unifi_to_disable(card_t *card)
1210 r = CSR_RESULT_FAILURE; 1148 r = CSR_RESULT_FAILURE;
1211 } 1149 }
1212 1150
1213 func_exit();
1214 return r; 1151 return r;
1215} /* card_wait_for_unifi_to_reset() */ 1152} /* card_wait_for_unifi_to_reset() */
1216 1153
@@ -1238,8 +1175,6 @@ CsrResult card_wait_for_firmware_to_start(card_t *card, u32 *paddr)
1238 u16 mbox0, mbox1; 1175 u16 mbox0, mbox1;
1239 CsrResult r; 1176 CsrResult r;
1240 1177
1241 func_enter();
1242
1243 /* 1178 /*
1244 * Wait for UniFi to initialise its data structures by polling 1179 * Wait for UniFi to initialise its data structures by polling
1245 * the SHARED_MAILBOX1 register. 1180 * the SHARED_MAILBOX1 register.
@@ -1277,7 +1212,6 @@ CsrResult card_wait_for_firmware_to_start(card_t *card, u32 *paddr)
1277 if (r != CSR_RESULT_SUCCESS) 1212 if (r != CSR_RESULT_SUCCESS)
1278 { 1213 {
1279 unifi_error(card->ospriv, "Failed to read UniFi Mailbox1 register for second time\n"); 1214 unifi_error(card->ospriv, "Failed to read UniFi Mailbox1 register for second time\n");
1280 func_exit_r(r);
1281 return r; 1215 return r;
1282 } 1216 }
1283 unifi_trace(card->ospriv, UDBG1, "MAILBOX1 value=0x%04X\n", mbox1); 1217 unifi_trace(card->ospriv, UDBG1, "MAILBOX1 value=0x%04X\n", mbox1);
@@ -1296,7 +1230,6 @@ CsrResult card_wait_for_firmware_to_start(card_t *card, u32 *paddr)
1296 { 1230 {
1297 unifi_trace(card->ospriv, UDBG1, "Timeout waiting for firmware to start, Mailbox1 still 0 after %d ms\n", 1231 unifi_trace(card->ospriv, UDBG1, "Timeout waiting for firmware to start, Mailbox1 still 0 after %d ms\n",
1298 MAILBOX1_ATTEMPTS * MAILBOX1_TIMEOUT); 1232 MAILBOX1_ATTEMPTS * MAILBOX1_TIMEOUT);
1299 func_exit_r(CSR_RESULT_FAILURE);
1300 return CSR_RESULT_FAILURE; 1233 return CSR_RESULT_FAILURE;
1301 } 1234 }
1302 1235
@@ -1312,7 +1245,6 @@ CsrResult card_wait_for_firmware_to_start(card_t *card, u32 *paddr)
1312 if (r != CSR_RESULT_SUCCESS) 1245 if (r != CSR_RESULT_SUCCESS)
1313 { 1246 {
1314 unifi_error(card->ospriv, "Failed to write f/w startup handshake to MAILBOX2\n"); 1247 unifi_error(card->ospriv, "Failed to write f/w startup handshake to MAILBOX2\n");
1315 func_exit_r(r);
1316 return r; 1248 return r;
1317 } 1249 }
1318 1250
@@ -1330,13 +1262,11 @@ CsrResult card_wait_for_firmware_to_start(card_t *card, u32 *paddr)
1330 if (r != CSR_RESULT_SUCCESS) 1262 if (r != CSR_RESULT_SUCCESS)
1331 { 1263 {
1332 unifi_error(card->ospriv, "Failed to read UniFi Mailbox0 register\n"); 1264 unifi_error(card->ospriv, "Failed to read UniFi Mailbox0 register\n");
1333 func_exit_r(r);
1334 return r; 1265 return r;
1335 } 1266 }
1336 1267
1337 *paddr = (((u32)mbox1 << 16) | mbox0); 1268 *paddr = (((u32)mbox1 << 16) | mbox0);
1338 1269
1339 func_exit();
1340 return CSR_RESULT_SUCCESS; 1270 return CSR_RESULT_SUCCESS;
1341} /* card_wait_for_firmware_to_start() */ 1271} /* card_wait_for_firmware_to_start() */
1342 1272
@@ -1358,14 +1288,12 @@ CsrResult card_wait_for_firmware_to_start(card_t *card, u32 *paddr)
1358 */ 1288 */
1359CsrResult unifi_capture_panic(card_t *card) 1289CsrResult unifi_capture_panic(card_t *card)
1360{ 1290{
1361 func_enter();
1362 1291
1363 /* The firmware must have previously initialised to read the panic addresses 1292 /* The firmware must have previously initialised to read the panic addresses
1364 * from the SLUT 1293 * from the SLUT
1365 */ 1294 */
1366 if (!card->panic_data_phy_addr || !card->panic_data_mac_addr) 1295 if (!card->panic_data_phy_addr || !card->panic_data_mac_addr)
1367 { 1296 {
1368 func_exit();
1369 return CSR_RESULT_SUCCESS; 1297 return CSR_RESULT_SUCCESS;
1370 } 1298 }
1371 1299
@@ -1380,7 +1308,6 @@ CsrResult unifi_capture_panic(card_t *card)
1380 unifi_info(card->ospriv, "Unable to read panic codes"); 1308 unifi_info(card->ospriv, "Unable to read panic codes");
1381 } 1309 }
1382 1310
1383 func_exit();
1384 return CSR_RESULT_SUCCESS; 1311 return CSR_RESULT_SUCCESS;
1385} 1312}
1386 1313
@@ -1405,8 +1332,6 @@ static CsrResult card_access_panic(card_t *card)
1405 s32 i; 1332 s32 i;
1406 CsrResult r, sr; 1333 CsrResult r, sr;
1407 1334
1408 func_enter();
1409
1410 /* A chip version of zero means that the version never got succesfully read 1335 /* A chip version of zero means that the version never got succesfully read
1411 * during reset. In this case give up because it will not be possible to 1336 * during reset. In this case give up because it will not be possible to
1412 * verify the chip version. 1337 * verify the chip version.
@@ -1513,7 +1438,6 @@ static CsrResult card_access_panic(card_t *card)
1513 } 1438 }
1514 1439
1515 r = ConvertCsrSdioToCsrHipResult(card, sr); 1440 r = ConvertCsrSdioToCsrHipResult(card, sr);
1516 func_exit_r(r);
1517 return r; 1441 return r;
1518} 1442}
1519 1443
@@ -1536,8 +1460,6 @@ void unifi_read_panic(card_t *card)
1536 CsrResult r; 1460 CsrResult r;
1537 u16 p_code, p_arg; 1461 u16 p_code, p_arg;
1538 1462
1539 func_enter();
1540
1541 /* The firmware must have previously initialised to read the panic addresses 1463 /* The firmware must have previously initialised to read the panic addresses
1542 * from the SLUT 1464 * from the SLUT
1543 */ 1465 */
@@ -1584,7 +1506,6 @@ void unifi_read_panic(card_t *card)
1584 card->last_mac_panic_arg = p_arg; 1506 card->last_mac_panic_arg = p_arg;
1585 } 1507 }
1586 1508
1587 func_exit();
1588} 1509}
1589 1510
1590 1511
@@ -1607,8 +1528,6 @@ static CsrResult card_allocate_memory_resources(card_t *card)
1607 s16 n, i, k, r; 1528 s16 n, i, k, r;
1608 sdio_config_data_t *cfg_data; 1529 sdio_config_data_t *cfg_data;
1609 1530
1610 func_enter();
1611
1612 /* Reset any state carried forward from a previous life */ 1531 /* Reset any state carried forward from a previous life */
1613 card->fh_command_queue.q_rd_ptr = 0; 1532 card->fh_command_queue.q_rd_ptr = 0;
1614 card->fh_command_queue.q_wr_ptr = 0; 1533 card->fh_command_queue.q_wr_ptr = 0;
@@ -1634,7 +1553,6 @@ static CsrResult card_allocate_memory_resources(card_t *card)
1634 if (card->fh_buffer.buf == NULL) 1553 if (card->fh_buffer.buf == NULL)
1635 { 1554 {
1636 unifi_error(card->ospriv, "Failed to allocate memory for F-H signals\n"); 1555 unifi_error(card->ospriv, "Failed to allocate memory for F-H signals\n");
1637 func_exit_r(CSR_WIFI_HIP_RESULT_NO_MEMORY);
1638 return CSR_WIFI_HIP_RESULT_NO_MEMORY; 1556 return CSR_WIFI_HIP_RESULT_NO_MEMORY;
1639 } 1557 }
1640 card->fh_buffer.bufsize = UNIFI_FH_BUF_SIZE; 1558 card->fh_buffer.bufsize = UNIFI_FH_BUF_SIZE;
@@ -1645,7 +1563,6 @@ static CsrResult card_allocate_memory_resources(card_t *card)
1645 if (card->th_buffer.buf == NULL) 1563 if (card->th_buffer.buf == NULL)
1646 { 1564 {
1647 unifi_error(card->ospriv, "Failed to allocate memory for T-H signals\n"); 1565 unifi_error(card->ospriv, "Failed to allocate memory for T-H signals\n");
1648 func_exit_r(CSR_WIFI_HIP_RESULT_NO_MEMORY);
1649 return CSR_WIFI_HIP_RESULT_NO_MEMORY; 1566 return CSR_WIFI_HIP_RESULT_NO_MEMORY;
1650 } 1567 }
1651 card->th_buffer.bufsize = UNIFI_FH_BUF_SIZE; 1568 card->th_buffer.bufsize = UNIFI_FH_BUF_SIZE;
@@ -1667,7 +1584,6 @@ static CsrResult card_allocate_memory_resources(card_t *card)
1667 if (card->from_host_data == NULL) 1584 if (card->from_host_data == NULL)
1668 { 1585 {
1669 unifi_error(card->ospriv, "Failed to allocate memory for F-H bulk data array\n"); 1586 unifi_error(card->ospriv, "Failed to allocate memory for F-H bulk data array\n");
1670 func_exit_r(CSR_WIFI_HIP_RESULT_NO_MEMORY);
1671 return CSR_WIFI_HIP_RESULT_NO_MEMORY; 1587 return CSR_WIFI_HIP_RESULT_NO_MEMORY;
1672 } 1588 }
1673 1589
@@ -1683,7 +1599,6 @@ static CsrResult card_allocate_memory_resources(card_t *card)
1683 if (card->fh_slot_host_tag_record == NULL) 1599 if (card->fh_slot_host_tag_record == NULL)
1684 { 1600 {
1685 unifi_error(card->ospriv, "Failed to allocate memory for F-H slot host tag mapping array\n"); 1601 unifi_error(card->ospriv, "Failed to allocate memory for F-H slot host tag mapping array\n");
1686 func_exit_r(CSR_WIFI_HIP_RESULT_NO_MEMORY);
1687 return CSR_WIFI_HIP_RESULT_NO_MEMORY; 1602 return CSR_WIFI_HIP_RESULT_NO_MEMORY;
1688 } 1603 }
1689 1604
@@ -1702,7 +1617,6 @@ static CsrResult card_allocate_memory_resources(card_t *card)
1702 if (card->to_host_data == NULL) 1617 if (card->to_host_data == NULL)
1703 { 1618 {
1704 unifi_error(card->ospriv, "Failed to allocate memory for T-H bulk data array\n"); 1619 unifi_error(card->ospriv, "Failed to allocate memory for T-H bulk data array\n");
1705 func_exit_r(CSR_WIFI_HIP_RESULT_NO_MEMORY);
1706 return CSR_WIFI_HIP_RESULT_NO_MEMORY; 1620 return CSR_WIFI_HIP_RESULT_NO_MEMORY;
1707 } 1621 }
1708 1622
@@ -1736,7 +1650,6 @@ static CsrResult card_allocate_memory_resources(card_t *card)
1736 1650
1737 card->memory_resources_allocated = 1; 1651 card->memory_resources_allocated = 1;
1738 1652
1739 func_exit();
1740 return CSR_RESULT_SUCCESS; 1653 return CSR_RESULT_SUCCESS;
1741} /* card_allocate_memory_resources() */ 1654} /* card_allocate_memory_resources() */
1742 1655
@@ -1781,7 +1694,6 @@ static void unifi_free_bulk_data(card_t *card, bulk_data_desc_t *bulk_data_slot)
1781 */ 1694 */
1782static void card_free_memory_resources(card_t *card) 1695static void card_free_memory_resources(card_t *card)
1783{ 1696{
1784 func_enter();
1785 1697
1786 unifi_trace(card->ospriv, UDBG1, "Freeing card memory resources.\n"); 1698 unifi_trace(card->ospriv, UDBG1, "Freeing card memory resources.\n");
1787 1699
@@ -1812,7 +1724,6 @@ static void card_free_memory_resources(card_t *card)
1812 1724
1813 card->memory_resources_allocated = 0; 1725 card->memory_resources_allocated = 0;
1814 1726
1815 func_exit();
1816} /* card_free_memory_resources() */ 1727} /* card_free_memory_resources() */
1817 1728
1818 1729
@@ -1820,8 +1731,6 @@ static void card_init_soft_queues(card_t *card)
1820{ 1731{
1821 s16 i; 1732 s16 i;
1822 1733
1823 func_enter();
1824
1825 unifi_trace(card->ospriv, UDBG1, "Initialising internal signal queues.\n"); 1734 unifi_trace(card->ospriv, UDBG1, "Initialising internal signal queues.\n");
1826 /* Reset any state carried forward from a previous life */ 1735 /* Reset any state carried forward from a previous life */
1827 card->fh_command_queue.q_rd_ptr = 0; 1736 card->fh_command_queue.q_rd_ptr = 0;
@@ -1838,7 +1747,6 @@ static void card_init_soft_queues(card_t *card)
1838#ifndef CSR_WIFI_HIP_TA_DISABLE 1747#ifndef CSR_WIFI_HIP_TA_DISABLE
1839 unifi_ta_sampling_init(card); 1748 unifi_ta_sampling_init(card);
1840#endif 1749#endif
1841 func_exit();
1842} 1750}
1843 1751
1844 1752
@@ -1858,7 +1766,6 @@ static void card_init_soft_queues(card_t *card)
1858void unifi_cancel_pending_signals(card_t *card) 1766void unifi_cancel_pending_signals(card_t *card)
1859{ 1767{
1860 s16 i, n, r; 1768 s16 i, n, r;
1861 func_enter();
1862 1769
1863 unifi_trace(card->ospriv, UDBG1, "Canceling pending signals.\n"); 1770 unifi_trace(card->ospriv, UDBG1, "Canceling pending signals.\n");
1864 1771
@@ -1927,7 +1834,6 @@ void unifi_cancel_pending_signals(card_t *card)
1927 1834
1928 card_init_soft_queues(card); 1835 card_init_soft_queues(card);
1929 1836
1930 func_exit();
1931} /* unifi_cancel_pending_signals() */ 1837} /* unifi_cancel_pending_signals() */
1932 1838
1933 1839
@@ -1951,7 +1857,6 @@ void unifi_cancel_pending_signals(card_t *card)
1951 */ 1857 */
1952void unifi_free_card(card_t *card) 1858void unifi_free_card(card_t *card)
1953{ 1859{
1954 func_enter();
1955#ifdef CSR_PRE_ALLOC_NET_DATA 1860#ifdef CSR_PRE_ALLOC_NET_DATA
1956 prealloc_netdata_free(card); 1861 prealloc_netdata_free(card);
1957#endif 1862#endif
@@ -1967,7 +1872,6 @@ void unifi_free_card(card_t *card)
1967 1872
1968 kfree(card); 1873 kfree(card);
1969 1874
1970 func_exit();
1971} /* unifi_free_card() */ 1875} /* unifi_free_card() */
1972 1876
1973 1877
@@ -1989,8 +1893,6 @@ static CsrResult card_init_slots(card_t *card)
1989 CsrResult r; 1893 CsrResult r;
1990 u8 i; 1894 u8 i;
1991 1895
1992 func_enter();
1993
1994 /* Allocate the buffers we need, only once. */ 1896 /* Allocate the buffers we need, only once. */
1995 if (card->memory_resources_allocated == 1) 1897 if (card->memory_resources_allocated == 1)
1996 { 1898 {
@@ -2007,14 +1909,12 @@ static CsrResult card_init_slots(card_t *card)
2007 { 1909 {
2008 unifi_error(card->ospriv, "Failed to allocate card memory resources.\n"); 1910 unifi_error(card->ospriv, "Failed to allocate card memory resources.\n");
2009 card_free_memory_resources(card); 1911 card_free_memory_resources(card);
2010 func_exit_r(r);
2011 return r; 1912 return r;
2012 } 1913 }
2013 1914
2014 if (card->sdio_ctrl_addr == 0) 1915 if (card->sdio_ctrl_addr == 0)
2015 { 1916 {
2016 unifi_error(card->ospriv, "Failed to find config struct!\n"); 1917 unifi_error(card->ospriv, "Failed to find config struct!\n");
2017 func_exit_r(CSR_WIFI_HIP_RESULT_INVALID_VALUE);
2018 return CSR_WIFI_HIP_RESULT_INVALID_VALUE; 1918 return CSR_WIFI_HIP_RESULT_INVALID_VALUE;
2019 } 1919 }
2020 1920
@@ -2037,7 +1937,6 @@ static CsrResult card_init_slots(card_t *card)
2037 if (r != CSR_RESULT_SUCCESS) 1937 if (r != CSR_RESULT_SUCCESS)
2038 { 1938 {
2039 unifi_error(card->ospriv, "Failed to read from-host sig written count\n"); 1939 unifi_error(card->ospriv, "Failed to read from-host sig written count\n");
2040 func_exit_r(r);
2041 return r; 1940 return r;
2042 } 1941 }
2043 card->from_host_signals_w = (s16)s; 1942 card->from_host_signals_w = (s16)s;
@@ -2051,7 +1950,6 @@ static CsrResult card_init_slots(card_t *card)
2051 if (r != CSR_RESULT_SUCCESS) 1950 if (r != CSR_RESULT_SUCCESS)
2052 { 1951 {
2053 unifi_error(card->ospriv, "Failed to read to-host sig read count\n"); 1952 unifi_error(card->ospriv, "Failed to read to-host sig read count\n");
2054 func_exit_r(r);
2055 return r; 1953 return r;
2056 } 1954 }
2057 card->to_host_signals_r = (s16)s; 1955 card->to_host_signals_r = (s16)s;
@@ -2066,7 +1964,6 @@ static CsrResult card_init_slots(card_t *card)
2066 if (r != CSR_RESULT_SUCCESS) 1964 if (r != CSR_RESULT_SUCCESS)
2067 { 1965 {
2068 unifi_error(card->ospriv, "Failed to write initialised flag\n"); 1966 unifi_error(card->ospriv, "Failed to write initialised flag\n");
2069 func_exit_r(r);
2070 return r; 1967 return r;
2071 } 1968 }
2072 1969
@@ -2082,7 +1979,6 @@ static CsrResult card_init_slots(card_t *card)
2082 1979
2083 card->dynamic_slot_data.packets_interval = UNIFI_PACKETS_INTERVAL; 1980 card->dynamic_slot_data.packets_interval = UNIFI_PACKETS_INTERVAL;
2084 1981
2085 func_exit();
2086 return CSR_RESULT_SUCCESS; 1982 return CSR_RESULT_SUCCESS;
2087} /* card_init_slots() */ 1983} /* card_init_slots() */
2088 1984
@@ -2153,8 +2049,6 @@ static void CardReassignDynamicReservation(card_t *card)
2153{ 2049{
2154 u8 i; 2050 u8 i;
2155 2051
2156 func_enter();
2157
2158 unifi_trace(card->ospriv, UDBG5, "Packets Txed %d %d %d %d\n", 2052 unifi_trace(card->ospriv, UDBG5, "Packets Txed %d %d %d %d\n",
2159 card->dynamic_slot_data.packets_txed[0], 2053 card->dynamic_slot_data.packets_txed[0],
2160 card->dynamic_slot_data.packets_txed[1], 2054 card->dynamic_slot_data.packets_txed[1],
@@ -2176,7 +2070,6 @@ static void CardReassignDynamicReservation(card_t *card)
2176 } 2070 }
2177 2071
2178 card->dynamic_slot_data.total_packets_txed = 0; 2072 card->dynamic_slot_data.total_packets_txed = 0;
2179 func_exit();
2180} 2073}
2181 2074
2182 2075
@@ -2206,8 +2099,6 @@ static void CardCheckDynamicReservation(card_t *card, unifi_TrafficQueue queue)
2206 q_t *sigq; 2099 q_t *sigq;
2207 u16 num_data_slots = card->config_data.num_fromhost_data_slots - UNIFI_RESERVED_COMMAND_SLOTS; 2100 u16 num_data_slots = card->config_data.num_fromhost_data_slots - UNIFI_RESERVED_COMMAND_SLOTS;
2208 2101
2209 func_enter();
2210
2211 /* Calculate the pending queue length */ 2102 /* Calculate the pending queue length */
2212 sigq = &card->fh_traffic_queue[queue]; 2103 sigq = &card->fh_traffic_queue[queue];
2213 q_len = CSR_WIFI_HIP_Q_SLOTS_USED(sigq); 2104 q_len = CSR_WIFI_HIP_Q_SLOTS_USED(sigq);
@@ -2215,7 +2106,6 @@ static void CardCheckDynamicReservation(card_t *card, unifi_TrafficQueue queue)
2215 if (q_len <= card->dynamic_slot_data.from_host_reserved_slots[queue]) 2106 if (q_len <= card->dynamic_slot_data.from_host_reserved_slots[queue])
2216 { 2107 {
2217 unifi_trace(card->ospriv, UDBG5, "queue %d q_len %d already has that many reserved slots, exiting\n", queue, q_len); 2108 unifi_trace(card->ospriv, UDBG5, "queue %d q_len %d already has that many reserved slots, exiting\n", queue, q_len);
2218 func_exit();
2219 return; 2109 return;
2220 } 2110 }
2221 2111
@@ -2313,7 +2203,6 @@ static void CardCheckDynamicReservation(card_t *card, unifi_TrafficQueue queue)
2313 card->dynamic_slot_data.from_host_max_slots[i]); 2203 card->dynamic_slot_data.from_host_max_slots[i]);
2314 } 2204 }
2315 2205
2316 func_exit();
2317} 2206}
2318 2207
2319 2208
@@ -2336,14 +2225,11 @@ void CardClearFromHostDataSlot(card_t *card, const s16 slot)
2336 u8 queue = card->from_host_data[slot].queue; 2225 u8 queue = card->from_host_data[slot].queue;
2337 const void *os_data_ptr = card->from_host_data[slot].bd.os_data_ptr; 2226 const void *os_data_ptr = card->from_host_data[slot].bd.os_data_ptr;
2338 2227
2339 func_enter();
2340
2341 if (card->from_host_data[slot].bd.data_length == 0) 2228 if (card->from_host_data[slot].bd.data_length == 0)
2342 { 2229 {
2343 unifi_warning(card->ospriv, 2230 unifi_warning(card->ospriv,
2344 "Surprise: request to clear an already free FH data slot: %d\n", 2231 "Surprise: request to clear an already free FH data slot: %d\n",
2345 slot); 2232 slot);
2346 func_exit();
2347 return; 2233 return;
2348 } 2234 }
2349 2235
@@ -2379,7 +2265,6 @@ void CardClearFromHostDataSlot(card_t *card, const s16 slot)
2379 2265
2380 unifi_trace(card->ospriv, UDBG4, "CardClearFromHostDataSlot: slot %d recycled %p\n", slot, os_data_ptr); 2266 unifi_trace(card->ospriv, UDBG4, "CardClearFromHostDataSlot: slot %d recycled %p\n", slot, os_data_ptr);
2381 2267
2382 func_exit();
2383} /* CardClearFromHostDataSlot() */ 2268} /* CardClearFromHostDataSlot() */
2384 2269
2385 2270
@@ -2457,8 +2342,6 @@ u16 CardGetFreeFromHostDataSlots(card_t *card)
2457{ 2342{
2458 u16 i, n = 0; 2343 u16 i, n = 0;
2459 2344
2460 func_enter();
2461
2462 /* First two slots reserved for MLME */ 2345 /* First two slots reserved for MLME */
2463 for (i = 0; i < card->config_data.num_fromhost_data_slots; i++) 2346 for (i = 0; i < card->config_data.num_fromhost_data_slots; i++)
2464 { 2347 {
@@ -2469,7 +2352,6 @@ u16 CardGetFreeFromHostDataSlots(card_t *card)
2469 } 2352 }
2470 } 2353 }
2471 2354
2472 func_exit();
2473 return n; 2355 return n;
2474} /* CardGetFreeFromHostDataSlots() */ 2356} /* CardGetFreeFromHostDataSlots() */
2475 2357
@@ -2506,7 +2388,6 @@ u16 CardAreAllFromHostDataSlotsEmpty(card_t *card)
2506 2388
2507static CsrResult unifi_identify_hw(card_t *card) 2389static CsrResult unifi_identify_hw(card_t *card)
2508{ 2390{
2509 func_enter();
2510 2391
2511 card->chip_id = card->sdio_if->sdioId.cardId; 2392 card->chip_id = card->sdio_if->sdioId.cardId;
2512 card->function = card->sdio_if->sdioId.sdioFunction; 2393 card->function = card->sdio_if->sdioId.sdioFunction;
@@ -2530,7 +2411,6 @@ static CsrResult unifi_identify_hw(card_t *card)
2530 ChipHelper_MarketingName(card->helper), 2411 ChipHelper_MarketingName(card->helper),
2531 ChipHelper_FriendlyName(card->helper)); 2412 ChipHelper_FriendlyName(card->helper));
2532 2413
2533 func_exit();
2534 return CSR_RESULT_SUCCESS; 2414 return CSR_RESULT_SUCCESS;
2535} /* unifi_identify_hw() */ 2415} /* unifi_identify_hw() */
2536 2416
@@ -2541,8 +2421,6 @@ static CsrResult unifi_prepare_hw(card_t *card)
2541 CsrResult csrResult; 2421 CsrResult csrResult;
2542 enum unifi_host_state old_state = card->host_state; 2422 enum unifi_host_state old_state = card->host_state;
2543 2423
2544 func_enter();
2545
2546 r = unifi_identify_hw(card); 2424 r = unifi_identify_hw(card);
2547 if (r == CSR_WIFI_HIP_RESULT_NO_DEVICE) 2425 if (r == CSR_WIFI_HIP_RESULT_NO_DEVICE)
2548 { 2426 {
@@ -2551,7 +2429,6 @@ static CsrResult unifi_prepare_hw(card_t *card)
2551 if (r != CSR_RESULT_SUCCESS) 2429 if (r != CSR_RESULT_SUCCESS)
2552 { 2430 {
2553 unifi_error(card->ospriv, "Failed to identify hw\n"); 2431 unifi_error(card->ospriv, "Failed to identify hw\n");
2554 func_exit_r(r);
2555 return r; 2432 return r;
2556 } 2433 }
2557 2434
@@ -2576,7 +2453,6 @@ static CsrResult unifi_prepare_hw(card_t *card)
2576 if (csrResult != CSR_RESULT_SUCCESS) 2453 if (csrResult != CSR_RESULT_SUCCESS)
2577 { 2454 {
2578 r = ConvertCsrSdioToCsrHipResult(card, csrResult); 2455 r = ConvertCsrSdioToCsrHipResult(card, csrResult);
2579 func_exit_r(r);
2580 return r; 2456 return r;
2581 } 2457 }
2582 card->sdio_clock_speed = UNIFI_SDIO_CLOCK_INIT_HZ; 2458 card->sdio_clock_speed = UNIFI_SDIO_CLOCK_INIT_HZ;
@@ -2596,7 +2472,6 @@ static CsrResult unifi_prepare_hw(card_t *card)
2596 r = ConvertCsrSdioToCsrHipResult(card, csrResult); 2472 r = ConvertCsrSdioToCsrHipResult(card, csrResult);
2597 /* Can't enable WLAN function. Try resetting the SDIO block. */ 2473 /* Can't enable WLAN function. Try resetting the SDIO block. */
2598 unifi_error(card->ospriv, "Failed to re-enable function %d.\n", card->function); 2474 unifi_error(card->ospriv, "Failed to re-enable function %d.\n", card->function);
2599 func_exit_r(r);
2600 return r; 2475 return r;
2601 } 2476 }
2602 2477
@@ -2610,11 +2485,9 @@ static CsrResult unifi_prepare_hw(card_t *card)
2610 r = unifi_read_chip_version(card); 2485 r = unifi_read_chip_version(card);
2611 if (r != CSR_RESULT_SUCCESS) 2486 if (r != CSR_RESULT_SUCCESS)
2612 { 2487 {
2613 func_exit_r(r);
2614 return r; 2488 return r;
2615 } 2489 }
2616 2490
2617 func_exit();
2618 return CSR_RESULT_SUCCESS; 2491 return CSR_RESULT_SUCCESS;
2619} /* unifi_prepare_hw() */ 2492} /* unifi_prepare_hw() */
2620 2493
@@ -2625,8 +2498,6 @@ static CsrResult unifi_read_chip_version(card_t *card)
2625 CsrResult r; 2498 CsrResult r;
2626 u16 ver; 2499 u16 ver;
2627 2500
2628 func_enter();
2629
2630 gbl_chip_version = ChipHelper_GBL_CHIP_VERSION(card->helper); 2501 gbl_chip_version = ChipHelper_GBL_CHIP_VERSION(card->helper);
2631 2502
2632 /* Try to read the chip version from register. */ 2503 /* Try to read the chip version from register. */
@@ -2640,7 +2511,6 @@ static CsrResult unifi_read_chip_version(card_t *card)
2640 if (r != CSR_RESULT_SUCCESS) 2511 if (r != CSR_RESULT_SUCCESS)
2641 { 2512 {
2642 unifi_error(card->ospriv, "Failed to read GBL_CHIP_VERSION\n"); 2513 unifi_error(card->ospriv, "Failed to read GBL_CHIP_VERSION\n");
2643 func_exit_r(r);
2644 return r; 2514 return r;
2645 } 2515 }
2646 card->chip_version = ver; 2516 card->chip_version = ver;
@@ -2653,7 +2523,6 @@ static CsrResult unifi_read_chip_version(card_t *card)
2653 2523
2654 unifi_info(card->ospriv, "Chip Version 0x%04X\n", card->chip_version); 2524 unifi_info(card->ospriv, "Chip Version 0x%04X\n", card->chip_version);
2655 2525
2656 func_exit_r(r);
2657 return r; 2526 return r;
2658} /* unifi_read_chip_version() */ 2527} /* unifi_read_chip_version() */
2659 2528
@@ -2684,8 +2553,6 @@ static CsrResult unifi_reset_hardware(card_t *card)
2684 u16 new_block_size = UNIFI_IO_BLOCK_SIZE; 2553 u16 new_block_size = UNIFI_IO_BLOCK_SIZE;
2685 CsrResult csrResult; 2554 CsrResult csrResult;
2686 2555
2687 func_enter();
2688
2689 /* Errors returned by unifi_prepare_hw() are not critical at this point */ 2556 /* Errors returned by unifi_prepare_hw() are not critical at this point */
2690 r = unifi_prepare_hw(card); 2557 r = unifi_prepare_hw(card);
2691 if (r == CSR_WIFI_HIP_RESULT_NO_DEVICE) 2558 if (r == CSR_WIFI_HIP_RESULT_NO_DEVICE)
@@ -2709,7 +2576,6 @@ static CsrResult unifi_reset_hardware(card_t *card)
2709 if (r != CSR_RESULT_SUCCESS) 2576 if (r != CSR_RESULT_SUCCESS)
2710 { 2577 {
2711 unifi_error(card->ospriv, "unifi_prepare_hw failed after hard reset\n"); 2578 unifi_error(card->ospriv, "unifi_prepare_hw failed after hard reset\n");
2712 func_exit_r(r);
2713 return r; 2579 return r;
2714 } 2580 }
2715 } 2581 }
@@ -2729,7 +2595,6 @@ static CsrResult unifi_reset_hardware(card_t *card)
2729 if (r != CSR_RESULT_SUCCESS) 2595 if (r != CSR_RESULT_SUCCESS)
2730 { 2596 {
2731 unifi_error(card->ospriv, "software hard reset failed\n"); 2597 unifi_error(card->ospriv, "software hard reset failed\n");
2732 func_exit_r(r);
2733 return r; 2598 return r;
2734 } 2599 }
2735 2600
@@ -2742,7 +2607,6 @@ static CsrResult unifi_reset_hardware(card_t *card)
2742 r = unifi_read_chip_version(card); 2607 r = unifi_read_chip_version(card);
2743 if (r != CSR_RESULT_SUCCESS) 2608 if (r != CSR_RESULT_SUCCESS)
2744 { 2609 {
2745 func_exit_r(r);
2746 return r; 2610 return r;
2747 } 2611 }
2748 } 2612 }
@@ -2792,7 +2656,6 @@ static CsrResult unifi_reset_hardware(card_t *card)
2792 } 2656 }
2793 2657
2794 2658
2795 func_exit_r(r);
2796 return r; 2659 return r;
2797} /* unifi_reset_hardware() */ 2660} /* unifi_reset_hardware() */
2798 2661
@@ -2818,8 +2681,6 @@ static CsrResult card_reset_method_io_enable(card_t *card)
2818 CsrResult r; 2681 CsrResult r;
2819 CsrResult csrResult; 2682 CsrResult csrResult;
2820 2683
2821 func_enter();
2822
2823 /* 2684 /*
2824 * This resets only function 1, so should be used in 2685 * This resets only function 1, so should be used in
2825 * preference to the method below (CSR_FUNC_EN) 2686 * preference to the method below (CSR_FUNC_EN)
@@ -2869,7 +2730,6 @@ static CsrResult card_reset_method_io_enable(card_t *card)
2869 if (r != CSR_RESULT_SUCCESS) 2730 if (r != CSR_RESULT_SUCCESS)
2870 { 2731 {
2871 unifi_warning(card->ospriv, "SDIO error writing SDIO_CSR_FUNC_EN: %d\n", r); 2732 unifi_warning(card->ospriv, "SDIO error writing SDIO_CSR_FUNC_EN: %d\n", r);
2872 func_exit_r(r);
2873 return r; 2733 return r;
2874 } 2734 }
2875 else 2735 else
@@ -2890,7 +2750,6 @@ static CsrResult card_reset_method_io_enable(card_t *card)
2890 unifi_warning(card->ospriv, "card_reset_method_io_enable failed to reset UniFi\n"); 2750 unifi_warning(card->ospriv, "card_reset_method_io_enable failed to reset UniFi\n");
2891 } 2751 }
2892 2752
2893 func_exit();
2894 return r; 2753 return r;
2895} /* card_reset_method_io_enable() */ 2754} /* card_reset_method_io_enable() */
2896 2755
@@ -2915,8 +2774,6 @@ static CsrResult card_reset_method_dbg_reset(card_t *card)
2915{ 2774{
2916 CsrResult r; 2775 CsrResult r;
2917 2776
2918 func_enter();
2919
2920 /* 2777 /*
2921 * Prepare UniFi for h/w reset 2778 * Prepare UniFi for h/w reset
2922 */ 2779 */
@@ -2930,7 +2787,6 @@ static CsrResult card_reset_method_dbg_reset(card_t *card)
2930 if (r != CSR_RESULT_SUCCESS) 2787 if (r != CSR_RESULT_SUCCESS)
2931 { 2788 {
2932 unifi_error(card->ospriv, "Failed to set UNIFI_HOST_STATE_DROWSY\n"); 2789 unifi_error(card->ospriv, "Failed to set UNIFI_HOST_STATE_DROWSY\n");
2933 func_exit_r(r);
2934 return r; 2790 return r;
2935 } 2791 }
2936 CsrThreadSleep(5); 2792 CsrThreadSleep(5);
@@ -2944,7 +2800,6 @@ static CsrResult card_reset_method_dbg_reset(card_t *card)
2944 if (r != CSR_RESULT_SUCCESS) 2800 if (r != CSR_RESULT_SUCCESS)
2945 { 2801 {
2946 unifi_error(card->ospriv, "Can't stop processors\n"); 2802 unifi_error(card->ospriv, "Can't stop processors\n");
2947 func_exit();
2948 return r; 2803 return r;
2949 } 2804 }
2950 2805
@@ -2963,7 +2818,6 @@ static CsrResult card_reset_method_dbg_reset(card_t *card)
2963 if (r != CSR_RESULT_SUCCESS) 2818 if (r != CSR_RESULT_SUCCESS)
2964 { 2819 {
2965 unifi_warning(card->ospriv, "SDIO error writing DBG_RESET: %d\n", r); 2820 unifi_warning(card->ospriv, "SDIO error writing DBG_RESET: %d\n", r);
2966 func_exit_r(r);
2967 return r; 2821 return r;
2968 } 2822 }
2969 2823
@@ -2980,7 +2834,6 @@ static CsrResult card_reset_method_dbg_reset(card_t *card)
2980 unifi_warning(card->ospriv, "card_reset_method_dbg_reset failed to reset UniFi\n"); 2834 unifi_warning(card->ospriv, "card_reset_method_dbg_reset failed to reset UniFi\n");
2981 } 2835 }
2982 2836
2983 func_exit();
2984 return r; 2837 return r;
2985} /* card_reset_method_dbg_reset() */ 2838} /* card_reset_method_dbg_reset() */
2986 2839
@@ -3008,8 +2861,6 @@ CsrResult unifi_card_hard_reset(card_t *card)
3008 const struct chip_helper_reset_values *init_data; 2861 const struct chip_helper_reset_values *init_data;
3009 u32 chunks; 2862 u32 chunks;
3010 2863
3011 func_enter();
3012
3013 /* Clear cache of page registers */ 2864 /* Clear cache of page registers */
3014 card->proc_select = (u32)(-1); 2865 card->proc_select = (u32)(-1);
3015 card->dmem_page = (u32)(-1); 2866 card->dmem_page = (u32)(-1);
@@ -3028,7 +2879,6 @@ CsrResult unifi_card_hard_reset(card_t *card)
3028 if (r != CSR_RESULT_SUCCESS) 2879 if (r != CSR_RESULT_SUCCESS)
3029 { 2880 {
3030 unifi_error(card->ospriv, "unifi_card_hard_reset failed to identify h/w\n"); 2881 unifi_error(card->ospriv, "unifi_card_hard_reset failed to identify h/w\n");
3031 func_exit();
3032 return r; 2882 return r;
3033 } 2883 }
3034 2884
@@ -3039,7 +2889,6 @@ CsrResult unifi_card_hard_reset(card_t *card)
3039 unifi_error(card->ospriv, 2889 unifi_error(card->ospriv,
3040 "Hard reset (Code download) is unsupported\n"); 2890 "Hard reset (Code download) is unsupported\n");
3041 2891
3042 func_exit_r(CSR_RESULT_FAILURE);
3043 return CSR_RESULT_FAILURE; 2892 return CSR_RESULT_FAILURE;
3044 } 2893 }
3045 2894
@@ -3058,7 +2907,6 @@ CsrResult unifi_card_hard_reset(card_t *card)
3058 } 2907 }
3059 if (r == CSR_RESULT_SUCCESS) 2908 if (r == CSR_RESULT_SUCCESS)
3060 { 2909 {
3061 func_exit();
3062 return r; 2910 return r;
3063 } 2911 }
3064 } 2912 }
@@ -3066,7 +2914,6 @@ CsrResult unifi_card_hard_reset(card_t *card)
3066 /* Software hard reset */ 2914 /* Software hard reset */
3067 r = card_reset_method_dbg_reset(card); 2915 r = card_reset_method_dbg_reset(card);
3068 2916
3069 func_exit_r(r);
3070 return r; 2917 return r;
3071} /* unifi_card_hard_reset() */ 2918} /* unifi_card_hard_reset() */
3072 2919
@@ -3097,8 +2944,6 @@ CsrResult CardGenInt(card_t *card)
3097{ 2944{
3098 CsrResult r; 2945 CsrResult r;
3099 2946
3100 func_enter();
3101
3102 if (card->chip_id > SDIO_CARD_ID_UNIFI_2) 2947 if (card->chip_id > SDIO_CARD_ID_UNIFI_2)
3103 { 2948 {
3104 r = sdio_write_f0(card, SDIO_CSR_FROM_HOST_SCRATCH0, 2949 r = sdio_write_f0(card, SDIO_CSR_FROM_HOST_SCRATCH0,
@@ -3117,13 +2962,11 @@ CsrResult CardGenInt(card_t *card)
3117 if (r != CSR_RESULT_SUCCESS) 2962 if (r != CSR_RESULT_SUCCESS)
3118 { 2963 {
3119 unifi_error(card->ospriv, "SDIO error writing UNIFI_SHARED_IO_INTERRUPT: %d\n", r); 2964 unifi_error(card->ospriv, "SDIO error writing UNIFI_SHARED_IO_INTERRUPT: %d\n", r);
3120 func_exit_r(r);
3121 return r; 2965 return r;
3122 } 2966 }
3123 2967
3124 card->unifi_interrupt_seq++; 2968 card->unifi_interrupt_seq++;
3125 2969
3126 func_exit();
3127 return CSR_RESULT_SUCCESS; 2970 return CSR_RESULT_SUCCESS;
3128} /* CardGenInt() */ 2971} /* CardGenInt() */
3129 2972
@@ -3388,8 +3231,6 @@ CsrResult CardWriteBulkData(card_t *card, card_signal_t *csptr, unifi_TrafficQue
3388 bulk_data_desc_t *bulkdata = csptr->bulkdata; 3231 bulk_data_desc_t *bulkdata = csptr->bulkdata;
3389 s16 h, nslots; 3232 s16 h, nslots;
3390 3233
3391 func_enter();
3392
3393 /* Count the number of slots required */ 3234 /* Count the number of slots required */
3394 for (i = 0; i < UNIFI_MAX_DATA_REFERENCES; i++) 3235 for (i = 0; i < UNIFI_MAX_DATA_REFERENCES; i++)
3395 { 3236 {
@@ -3470,7 +3311,6 @@ CsrResult CardWriteBulkData(card_t *card, card_signal_t *csptr, unifi_TrafficQue
3470 { 3311 {
3471 unifi_trace(card->ospriv, UDBG5, "fh data slot %d: %d\n", i, card->from_host_data[i].bd.data_length); 3312 unifi_trace(card->ospriv, UDBG5, "fh data slot %d: %d\n", i, card->from_host_data[i].bd.data_length);
3472 } 3313 }
3473 func_exit();
3474 return CSR_RESULT_FAILURE; 3314 return CSR_RESULT_FAILURE;
3475 } 3315 }
3476 } 3316 }
@@ -3523,8 +3363,6 @@ CsrResult CardWriteBulkData(card_t *card, card_signal_t *csptr, unifi_TrafficQue
3523 } 3363 }
3524 } 3364 }
3525 3365
3526 func_exit();
3527
3528 return CSR_RESULT_SUCCESS; 3366 return CSR_RESULT_SUCCESS;
3529} /* CardWriteBulkData() */ 3367} /* CardWriteBulkData() */
3530 3368
diff --git a/drivers/staging/csr/csr_wifi_hip_card_sdio.h b/drivers/staging/csr/csr_wifi_hip_card_sdio.h
index dc2ed70f7edd..a9b9ec427320 100644
--- a/drivers/staging/csr/csr_wifi_hip_card_sdio.h
+++ b/drivers/staging/csr/csr_wifi_hip_card_sdio.h
@@ -20,10 +20,6 @@
20#ifndef __CARD_SDIO_H__ 20#ifndef __CARD_SDIO_H__
21#define __CARD_SDIO_H__ 21#define __CARD_SDIO_H__
22 22
23#ifdef __cplusplus
24extern "C" {
25#endif
26
27#include "csr_wifi_hip_unifi.h" 23#include "csr_wifi_hip_unifi.h"
28#include "csr_wifi_hip_unifi_udi.h" 24#include "csr_wifi_hip_unifi_udi.h"
29#include "csr_wifi_hip_unifihw.h" 25#include "csr_wifi_hip_unifihw.h"
@@ -695,8 +691,4 @@ CsrResult prealloc_netdata_alloc(card_t *card);
695void dump(void *mem, u16 len); 691void dump(void *mem, u16 len);
696void dump16(void *mem, u16 len); 692void dump16(void *mem, u16 len);
697 693
698#ifdef __cplusplus
699}
700#endif
701
702#endif /* __CARD_SDIO_H__ */ 694#endif /* __CARD_SDIO_H__ */
diff --git a/drivers/staging/csr/csr_wifi_hip_chiphelper.h b/drivers/staging/csr/csr_wifi_hip_chiphelper.h
index 24737ae8a2de..b6b67ee11db8 100644
--- a/drivers/staging/csr/csr_wifi_hip_chiphelper.h
+++ b/drivers/staging/csr/csr_wifi_hip_chiphelper.h
@@ -14,10 +14,6 @@
14 14
15#include <linux/types.h> 15#include <linux/types.h>
16 16
17#ifdef __cplusplus
18extern "C" {
19#endif
20
21/* The age of the BlueCore chip. This is probably not useful, if 17/* The age of the BlueCore chip. This is probably not useful, if
22 you know the age then you can probably work out the version directly. */ 18 you know the age then you can probably work out the version directly. */
23enum chip_helper_bluecore_age 19enum chip_helper_bluecore_age
@@ -408,64 +404,4 @@ s32 ChipHelper_DecodeWindow(ChipDescript *chip_help,
408 u32 offset, 404 u32 offset,
409 u16 *page, u16 *addr, u32 *len); 405 u16 *page, u16 *addr, u32 *len);
410 406
411#ifdef __cplusplus
412/* Close the extern "C" */
413}
414
415/*
416 * This is the C++ API.
417 */
418
419class ChipHelper
420{
421public:
422 /* If this constructor is used then a GetVersionXXX function
423 should be called next. */
424 ChipHelper();
425
426 /* copy constructor */
427 ChipHelper(ChipDescript * desc);
428
429 /* The default constructor assume a BC7 / UF105x series chip
430 and that the number given is the value of UNIFI_GBL_CHIP_VERSION
431 (0xFE81) */
432 ChipHelper(u16 version);
433
434 /* This returns the C interface magic token from a C++ instance. */
435 ChipDescript* GetDescript() const
436 {
437 return m_desc;
438 }
439
440
441 /* Clear out theis class (set it to the null token). */
442 void ClearVersion();
443
444 /* Load this class with data for a specific chip. */
445 void GetVersionAny(u16 from_FF9A, u16 from_FE81);
446 void GetVersionUniFi(u16 version);
447 void GetVersionBlueCore(chip_helper_bluecore_age age, u16 version);
448 void GetVersionSdio(u8 sdio_version);
449
450 /* Helpers to build the definitions of the member functions. */
451#define CHIP_HELPER_DEF0_CPP_DEC(ret_type, name, info) \
452 ret_type name() const;
453#define CHIP_HELPER_DEF1_CPP_DEC(ret_type, name, type1, name1) \
454 ret_type name(type1 name1) const;
455
456 CHIP_HELPER_LIST(CPP_DEC)
457
458
459 /* The DecodeWindow function, see the description of the C version. */
460 s32 DecodeWindow(chip_helper_window_index window,
461 chip_helper_window_type type,
462 u32 offset,
463 u16 &page, u16 &addr, u32 &len) const;
464
465private:
466 ChipDescript *m_desc;
467};
468
469#endif /* __cplusplus */
470
471#endif 407#endif
diff --git a/drivers/staging/csr/csr_wifi_hip_chiphelper_private.h b/drivers/staging/csr/csr_wifi_hip_chiphelper_private.h
index cb0ea4b63e65..e5e579912550 100644
--- a/drivers/staging/csr/csr_wifi_hip_chiphelper_private.h
+++ b/drivers/staging/csr/csr_wifi_hip_chiphelper_private.h
@@ -14,10 +14,6 @@
14 14
15#include "csr_wifi_hip_chiphelper.h" 15#include "csr_wifi_hip_chiphelper.h"
16 16
17#ifdef __cplusplus
18extern "C" {
19#endif /* __cplusplus */
20
21/* This GP stuff should be somewhere else? */ 17/* This GP stuff should be somewhere else? */
22 18
23/* Memory spaces encoded in top byte of Generic Pointer type */ 19/* Memory spaces encoded in top byte of Generic Pointer type */
@@ -201,8 +197,4 @@ struct chip_device_desc_t
201 const struct window_info_t *windows[CHIP_HELPER_WINDOW_COUNT]; 197 const struct window_info_t *windows[CHIP_HELPER_WINDOW_COUNT];
202}; 198};
203 199
204#ifdef __cplusplus
205}
206#endif /* __cplusplus */
207
208#endif /* CSR_WIFI_HIP_CHIPHELPER_PRIVATE_H__ */ 200#endif /* CSR_WIFI_HIP_CHIPHELPER_PRIVATE_H__ */
diff --git a/drivers/staging/csr/csr_wifi_hip_conversions.h b/drivers/staging/csr/csr_wifi_hip_conversions.h
index 7d045c069362..bf7a52e82995 100644
--- a/drivers/staging/csr/csr_wifi_hip_conversions.h
+++ b/drivers/staging/csr/csr_wifi_hip_conversions.h
@@ -23,10 +23,6 @@
23#ifndef __CSR_WIFI_HIP_CONVERSIONS_H__ 23#ifndef __CSR_WIFI_HIP_CONVERSIONS_H__
24#define __CSR_WIFI_HIP_CONVERSIONS_H__ 24#define __CSR_WIFI_HIP_CONVERSIONS_H__
25 25
26#ifdef __cplusplus
27extern "C" {
28#endif
29
30#define SIZEOF_UINT16 2 26#define SIZEOF_UINT16 2
31#define SIZEOF_UINT32 4 27#define SIZEOF_UINT32 4
32#define SIZEOF_UINT64 8 28#define SIZEOF_UINT64 8
@@ -73,9 +69,5 @@ s32 get_packed_struct_size(const u8 *buf);
73CsrResult read_unpack_signal(const u8 *ptr, CSR_SIGNAL *sig); 69CsrResult read_unpack_signal(const u8 *ptr, CSR_SIGNAL *sig);
74CsrResult write_pack(const CSR_SIGNAL *sig, u8 *ptr, u16 *sig_len); 70CsrResult write_pack(const CSR_SIGNAL *sig, u8 *ptr, u16 *sig_len);
75 71
76#ifdef __cplusplus
77}
78#endif
79
80#endif /* __CSR_WIFI_HIP_CONVERSIONS_H__ */ 72#endif /* __CSR_WIFI_HIP_CONVERSIONS_H__ */
81 73
diff --git a/drivers/staging/csr/csr_wifi_hip_download.c b/drivers/staging/csr/csr_wifi_hip_download.c
index 6db672caaa02..2f44a383d2cf 100644
--- a/drivers/staging/csr/csr_wifi_hip_download.c
+++ b/drivers/staging/csr/csr_wifi_hip_download.c
@@ -68,7 +68,6 @@ static CsrResult _find_in_slut(card_t *card, symbol_t *psym, u32 *pslut)
68 if (r != CSR_RESULT_SUCCESS) 68 if (r != CSR_RESULT_SUCCESS)
69 { 69 {
70 unifi_error(card->ospriv, "Firmware hasn't started\n"); 70 unifi_error(card->ospriv, "Firmware hasn't started\n");
71 func_exit_r(r);
72 return r; 71 return r;
73 } 72 }
74 *pslut = slut_address; 73 *pslut = slut_address;
@@ -81,7 +80,6 @@ static CsrResult _find_in_slut(card_t *card, symbol_t *psym, u32 *pslut)
81 if (csrResult != CSR_RESULT_SUCCESS) 80 if (csrResult != CSR_RESULT_SUCCESS)
82 { 81 {
83 r = ConvertCsrSdioToCsrHipResult(card, csrResult); 82 r = ConvertCsrSdioToCsrHipResult(card, csrResult);
84 func_exit_r(r);
85 return r; 83 return r;
86 } 84 }
87 card->sdio_clock_speed = UNIFI_SDIO_CLOCK_INIT_HZ; 85 card->sdio_clock_speed = UNIFI_SDIO_CLOCK_INIT_HZ;
@@ -106,14 +104,12 @@ static CsrResult _find_in_slut(card_t *card, symbol_t *psym, u32 *pslut)
106 if (r != CSR_RESULT_SUCCESS) 104 if (r != CSR_RESULT_SUCCESS)
107 { 105 {
108 unifi_error(card->ospriv, "Failed to read SLUT finger print\n"); 106 unifi_error(card->ospriv, "Failed to read SLUT finger print\n");
109 func_exit_r(r);
110 return r; 107 return r;
111 } 108 }
112 109
113 if (finger_print != SLUT_FINGERPRINT) 110 if (finger_print != SLUT_FINGERPRINT)
114 { 111 {
115 unifi_error(card->ospriv, "Failed to find SLUT fingerprint\n"); 112 unifi_error(card->ospriv, "Failed to find SLUT fingerprint\n");
116 func_exit_r(CSR_RESULT_FAILURE);
117 return CSR_RESULT_FAILURE; 113 return CSR_RESULT_FAILURE;
118 } 114 }
119 115
@@ -128,7 +124,6 @@ static CsrResult _find_in_slut(card_t *card, symbol_t *psym, u32 *pslut)
128 r = unifi_card_read16(card, slut_address, &id); 124 r = unifi_card_read16(card, slut_address, &id);
129 if (r != CSR_RESULT_SUCCESS) 125 if (r != CSR_RESULT_SUCCESS)
130 { 126 {
131 func_exit_r(r);
132 return r; 127 return r;
133 } 128 }
134 slut_address += 2; 129 slut_address += 2;
@@ -143,7 +138,6 @@ static CsrResult _find_in_slut(card_t *card, symbol_t *psym, u32 *pslut)
143 r = unifi_read32(card, slut_address, &obj); 138 r = unifi_read32(card, slut_address, &obj);
144 if (r != CSR_RESULT_SUCCESS) 139 if (r != CSR_RESULT_SUCCESS)
145 { 140 {
146 func_exit_r(r);
147 return r; 141 return r;
148 } 142 }
149 slut_address += 4; 143 slut_address += 4;
@@ -161,7 +155,6 @@ static CsrResult _find_in_slut(card_t *card, symbol_t *psym, u32 *pslut)
161 } 155 }
162 } 156 }
163 157
164 func_exit_r(r);
165 return r; 158 return r;
166} 159}
167 160
@@ -279,7 +272,6 @@ static CsrResult do_patch_convert_download(card_t *card, void *dlpriv, xbv1_t *p
279 if (r != CSR_RESULT_SUCCESS) 272 if (r != CSR_RESULT_SUCCESS)
280 { 273 {
281 unifi_error(card->ospriv, "Converted patch download failed\n"); 274 unifi_error(card->ospriv, "Converted patch download failed\n");
282 func_exit_r(r);
283 return r; 275 return r;
284 } 276 }
285 else 277 else
@@ -294,7 +286,6 @@ static CsrResult do_patch_convert_download(card_t *card, void *dlpriv, xbv1_t *p
294 unifi_error(card->ospriv, "Failed to write loader restart cmd\n"); 286 unifi_error(card->ospriv, "Failed to write loader restart cmd\n");
295 } 287 }
296 288
297 func_exit_r(r);
298 return r; 289 return r;
299 } 290 }
300} 291}
@@ -327,8 +318,6 @@ CsrResult unifi_dl_firmware(card_t *card, void *dlpriv)
327 xbv1_t *fwinfo; 318 xbv1_t *fwinfo;
328 CsrResult r; 319 CsrResult r;
329 320
330 func_enter();
331
332 fwinfo = kmalloc(sizeof(xbv1_t), GFP_KERNEL); 321 fwinfo = kmalloc(sizeof(xbv1_t), GFP_KERNEL);
333 if (fwinfo == NULL) 322 if (fwinfo == NULL)
334 { 323 {
@@ -376,7 +365,6 @@ CsrResult unifi_dl_firmware(card_t *card, void *dlpriv)
376 } 365 }
377 366
378 kfree(fwinfo); 367 kfree(fwinfo);
379 func_exit_r(r);
380 return r; 368 return r;
381} /* unifi_dl_firmware() */ 369} /* unifi_dl_firmware() */
382 370
@@ -407,15 +395,12 @@ CsrResult unifi_dl_patch(card_t *card, void *dlpriv, u32 boot_ctrl)
407 xbv1_t *fwinfo; 395 xbv1_t *fwinfo;
408 CsrResult r; 396 CsrResult r;
409 397
410 func_enter();
411
412 unifi_info(card->ospriv, "unifi_dl_patch %p %08x\n", dlpriv, boot_ctrl); 398 unifi_info(card->ospriv, "unifi_dl_patch %p %08x\n", dlpriv, boot_ctrl);
413 399
414 fwinfo = kmalloc(sizeof(xbv1_t), GFP_KERNEL); 400 fwinfo = kmalloc(sizeof(xbv1_t), GFP_KERNEL);
415 if (fwinfo == NULL) 401 if (fwinfo == NULL)
416 { 402 {
417 unifi_error(card->ospriv, "Failed to allocate memory for patches\n"); 403 unifi_error(card->ospriv, "Failed to allocate memory for patches\n");
418 func_exit();
419 return CSR_WIFI_HIP_RESULT_NO_MEMORY; 404 return CSR_WIFI_HIP_RESULT_NO_MEMORY;
420 } 405 }
421 406
@@ -431,7 +416,6 @@ CsrResult unifi_dl_patch(card_t *card, void *dlpriv, u32 boot_ctrl)
431 { 416 {
432 kfree(fwinfo); 417 kfree(fwinfo);
433 unifi_error(card->ospriv, "Failed to read in patch file\n"); 418 unifi_error(card->ospriv, "Failed to read in patch file\n");
434 func_exit();
435 return CSR_WIFI_HIP_RESULT_INVALID_VALUE; 419 return CSR_WIFI_HIP_RESULT_INVALID_VALUE;
436 } 420 }
437 421
@@ -446,7 +430,6 @@ CsrResult unifi_dl_patch(card_t *card, void *dlpriv, u32 boot_ctrl)
446 card->build_id, fwinfo->build_id); 430 card->build_id, fwinfo->build_id);
447 kfree(fwinfo); 431 kfree(fwinfo);
448#ifndef CSR_WIFI_IGNORE_PATCH_VERSION_MISMATCH 432#ifndef CSR_WIFI_IGNORE_PATCH_VERSION_MISMATCH
449 func_exit();
450 return CSR_WIFI_HIP_RESULT_INVALID_VALUE; 433 return CSR_WIFI_HIP_RESULT_INVALID_VALUE;
451#else 434#else
452 fwinfo = NULL; 435 fwinfo = NULL;
@@ -463,7 +446,6 @@ CsrResult unifi_dl_patch(card_t *card, void *dlpriv, u32 boot_ctrl)
463 446
464 kfree(fwinfo); 447 kfree(fwinfo);
465 448
466 func_exit_r(r);
467 return r; 449 return r;
468} /* unifi_dl_patch() */ 450} /* unifi_dl_patch() */
469 451
diff --git a/drivers/staging/csr/csr_wifi_hip_dump.c b/drivers/staging/csr/csr_wifi_hip_dump.c
index d67b460e7a85..7b7eec49d028 100644
--- a/drivers/staging/csr/csr_wifi_hip_dump.c
+++ b/drivers/staging/csr/csr_wifi_hip_dump.c
@@ -40,7 +40,7 @@
40typedef struct coredump_buf 40typedef struct coredump_buf
41{ 41{
42 u16 count; /* serial number of dump */ 42 u16 count; /* serial number of dump */
43 CsrTime timestamp; /* host's system time at capture */ 43 u32 timestamp; /* host's system time at capture */
44 s16 requestor; /* request: 0=auto dump, 1=manual */ 44 s16 requestor; /* request: 0=auto dump, 1=manual */
45 u16 chip_ver; 45 u16 chip_ver;
46 u32 fw_ver; 46 u32 fw_ver;
@@ -104,8 +104,6 @@ CsrResult unifi_coredump_request_at_next_reset(card_t *card, s8 enable)
104{ 104{
105 CsrResult r; 105 CsrResult r;
106 106
107 func_enter();
108
109 if (enable) 107 if (enable)
110 { 108 {
111 unifi_trace(card->ospriv, UDBG2, "Mini-coredump requested after reset\n"); 109 unifi_trace(card->ospriv, UDBG2, "Mini-coredump requested after reset\n");
@@ -121,7 +119,6 @@ CsrResult unifi_coredump_request_at_next_reset(card_t *card, s8 enable)
121 r = CSR_RESULT_SUCCESS; 119 r = CSR_RESULT_SUCCESS;
122 } 120 }
123 121
124 func_exit_r(r);
125 return r; 122 return r;
126} 123}
127 124
@@ -145,8 +142,6 @@ CsrResult unifi_coredump_handle_request(card_t *card)
145{ 142{
146 CsrResult r = CSR_RESULT_SUCCESS; 143 CsrResult r = CSR_RESULT_SUCCESS;
147 144
148 func_enter();
149
150 if (card == NULL) 145 if (card == NULL)
151 { 146 {
152 r = CSR_WIFI_HIP_RESULT_INVALID_VALUE; 147 r = CSR_WIFI_HIP_RESULT_INVALID_VALUE;
@@ -160,7 +155,6 @@ CsrResult unifi_coredump_handle_request(card_t *card)
160 } 155 }
161 } 156 }
162 157
163 func_exit_r(r);
164 return r; 158 return r;
165} 159}
166 160
@@ -192,9 +186,7 @@ CsrResult unifi_coredump_capture(card_t *card, struct unifi_coredump_req *req)
192{ 186{
193 CsrResult r = CSR_RESULT_SUCCESS; 187 CsrResult r = CSR_RESULT_SUCCESS;
194 static u16 dump_seq_no = 1; 188 static u16 dump_seq_no = 1;
195 CsrTime time_of_capture; 189 u32 time_of_capture;
196
197 func_enter();
198 190
199 if (card->dump_next_write == NULL) 191 if (card->dump_next_write == NULL)
200 { 192 {
@@ -269,7 +261,6 @@ CsrResult unifi_coredump_capture(card_t *card, struct unifi_coredump_req *req)
269 } 261 }
270 262
271done: 263done:
272 func_exit_r(r);
273 return r; 264 return r;
274} /* unifi_coredump_capture() */ 265} /* unifi_coredump_capture() */
275 266
@@ -358,8 +349,6 @@ CsrResult unifi_coredump_get_value(card_t *card, struct unifi_coredump_req *req)
358 s32 i = 0; 349 s32 i = 0;
359 coredump_buffer *find_dump = NULL; 350 coredump_buffer *find_dump = NULL;
360 351
361 func_enter();
362
363 if (req == NULL || card == NULL) 352 if (req == NULL || card == NULL)
364 { 353 {
365 r = CSR_WIFI_HIP_RESULT_INVALID_VALUE; 354 r = CSR_WIFI_HIP_RESULT_INVALID_VALUE;
@@ -452,7 +441,6 @@ CsrResult unifi_coredump_get_value(card_t *card, struct unifi_coredump_req *req)
452 req->serial = find_dump->count; 441 req->serial = find_dump->count;
453 442
454done: 443done:
455 func_exit_r(r);
456 return r; 444 return r;
457} /* unifi_coredump_get_value() */ 445} /* unifi_coredump_get_value() */
458 446
@@ -481,8 +469,6 @@ static CsrResult unifi_coredump_read_zone(card_t *card, u16 *zonebuf, const stru
481{ 469{
482 CsrResult r; 470 CsrResult r;
483 471
484 func_enter();
485
486 if (zonebuf == NULL || def == NULL) 472 if (zonebuf == NULL || def == NULL)
487 { 473 {
488 r = CSR_WIFI_HIP_RESULT_INVALID_VALUE; 474 r = CSR_WIFI_HIP_RESULT_INVALID_VALUE;
@@ -521,7 +507,6 @@ static CsrResult unifi_coredump_read_zone(card_t *card, u16 *zonebuf, const stru
521 } 507 }
522 508
523done: 509done:
524 func_exit_r(r);
525 return r; 510 return r;
526} 511}
527 512
@@ -551,8 +536,6 @@ static CsrResult unifi_coredump_read_zones(card_t *card, coredump_buffer *dump_b
551 CsrResult r = CSR_RESULT_SUCCESS; 536 CsrResult r = CSR_RESULT_SUCCESS;
552 s32 i; 537 s32 i;
553 538
554 func_enter();
555
556 /* Walk the table of coredump zone definitions and read them from the chip */ 539 /* Walk the table of coredump zone definitions and read them from the chip */
557 for (i = 0; 540 for (i = 0;
558 (i < HIP_CDUMP_NUM_ZONES) && (r == 0); 541 (i < HIP_CDUMP_NUM_ZONES) && (r == 0);
@@ -561,7 +544,6 @@ static CsrResult unifi_coredump_read_zones(card_t *card, coredump_buffer *dump_b
561 r = unifi_coredump_read_zone(card, dump_buf->zone[i], &zonedef_table[i]); 544 r = unifi_coredump_read_zone(card, dump_buf->zone[i], &zonedef_table[i]);
562 } 545 }
563 546
564 func_exit_r(r);
565 return r; 547 return r;
566} 548}
567 549
@@ -590,8 +572,6 @@ static CsrResult unifi_coredump_from_sdio(card_t *card, coredump_buffer *dump_bu
590 CsrResult r; 572 CsrResult r;
591 u32 sdio_addr; 573 u32 sdio_addr;
592 574
593 func_enter();
594
595 if (dump_buf == NULL) 575 if (dump_buf == NULL)
596 { 576 {
597 r = CSR_WIFI_HIP_RESULT_INVALID_VALUE; 577 r = CSR_WIFI_HIP_RESULT_INVALID_VALUE;
@@ -634,7 +614,6 @@ static CsrResult unifi_coredump_from_sdio(card_t *card, coredump_buffer *dump_bu
634 } 614 }
635 615
636done: 616done:
637 func_exit_r(r);
638 return r; 617 return r;
639} /* unifi_coredump_from_sdio() */ 618} /* unifi_coredump_from_sdio() */
640 619
@@ -743,8 +722,6 @@ CsrResult unifi_coredump_init(card_t *card, u16 num_dump_buffers)
743 u32 i = 0; 722 u32 i = 0;
744#endif 723#endif
745 724
746 func_enter();
747
748 card->request_coredump_on_reset = 0; 725 card->request_coredump_on_reset = 0;
749 card->dump_next_write = NULL; 726 card->dump_next_write = NULL;
750 card->dump_cur_read = NULL; 727 card->dump_cur_read = NULL;
@@ -790,7 +767,6 @@ CsrResult unifi_coredump_init(card_t *card, u16 num_dump_buffers)
790 767
791done: 768done:
792#endif 769#endif
793 func_exit();
794 return CSR_RESULT_SUCCESS; 770 return CSR_RESULT_SUCCESS;
795 771
796#ifndef UNIFI_DISABLE_COREDUMP 772#ifndef UNIFI_DISABLE_COREDUMP
@@ -798,7 +774,6 @@ fail:
798 /* Unwind what we allocated so far */ 774 /* Unwind what we allocated so far */
799 unifi_error(ospriv, "Out of memory allocating core dump node %d\n", i); 775 unifi_error(ospriv, "Out of memory allocating core dump node %d\n", i);
800 unifi_coredump_free(card); 776 unifi_coredump_free(card);
801 func_exit();
802 return CSR_WIFI_HIP_RESULT_NO_MEMORY; 777 return CSR_WIFI_HIP_RESULT_NO_MEMORY;
803#endif 778#endif
804} /* unifi_coreump_init() */ 779} /* unifi_coreump_init() */
@@ -826,7 +801,6 @@ void unifi_coredump_free(card_t *card)
826 s16 i = 0; 801 s16 i = 0;
827 s16 j; 802 s16 j;
828 803
829 func_enter();
830 unifi_trace(ospriv, UDBG2, "Core dump de-configured\n"); 804 unifi_trace(ospriv, UDBG2, "Core dump de-configured\n");
831 805
832 if (card->dump_buf == NULL) 806 if (card->dump_buf == NULL)
@@ -858,8 +832,6 @@ void unifi_coredump_free(card_t *card)
858 card->dump_buf = NULL; 832 card->dump_buf = NULL;
859 card->dump_next_write = NULL; 833 card->dump_next_write = NULL;
860 card->dump_cur_read = NULL; 834 card->dump_cur_read = NULL;
861
862 func_exit();
863} /* unifi_coredump_free() */ 835} /* unifi_coredump_free() */
864 836
865 837
diff --git a/drivers/staging/csr/csr_wifi_hip_send.c b/drivers/staging/csr/csr_wifi_hip_send.c
index 86aa23cefe30..76429e5e77cf 100644
--- a/drivers/staging/csr/csr_wifi_hip_send.c
+++ b/drivers/staging/csr/csr_wifi_hip_send.c
@@ -270,8 +270,6 @@ static CsrResult send_signal(card_t *card, const u8 *sigptr, u32 siglen,
270 } 270 }
271 } 271 }
272 272
273 func_exit();
274
275 return CSR_RESULT_SUCCESS; 273 return CSR_RESULT_SUCCESS;
276} /* send_signal() */ 274} /* send_signal() */
277 275
diff --git a/drivers/staging/csr/csr_wifi_hip_signals.h b/drivers/staging/csr/csr_wifi_hip_signals.h
index 5f841556bbef..ca4d0774195c 100644
--- a/drivers/staging/csr/csr_wifi_hip_signals.h
+++ b/drivers/staging/csr/csr_wifi_hip_signals.h
@@ -1,10 +1,10 @@
1/***************************************************************************** 1/*****************************************************************************
2 2
3 (c) Cambridge Silicon Radio Limited 2011 3 (c) Cambridge Silicon Radio Limited 2011
4 All rights reserved and confidential information of CSR 4 All rights reserved and confidential information of CSR
5 5
6 Refer to LICENSE.txt included with this source for details 6 Refer to LICENSE.txt included with this source for details
7 on the license terms. 7 on the license terms.
8 8
9*****************************************************************************/ 9*****************************************************************************/
10 10
@@ -101,10 +101,6 @@
101/* FUNCTION DECLARATIONS */ 101/* FUNCTION DECLARATIONS */
102/******************************************************************************/ 102/******************************************************************************/
103 103
104#ifdef __cplusplus
105extern "C" {
106#endif /* __cplusplus */
107
108/****************************************************************************** 104/******************************************************************************
109 * SigGetNumDataRefs - Retrieve pointers to data-refs from a signal. 105 * SigGetNumDataRefs - Retrieve pointers to data-refs from a signal.
110 * 106 *
@@ -129,9 +125,4 @@ s32 SigGetDataRefs(CSR_SIGNAL *aSignal, CSR_DATAREF **aDataRef);
129 */ 125 */
130s32 SigGetSize(const CSR_SIGNAL *aSignal); 126s32 SigGetSize(const CSR_SIGNAL *aSignal);
131 127
132#ifdef __cplusplus
133}
134#endif /* __cplusplus */
135
136
137#endif /* __CSR_WIFI_HIP_SIGNALS_H__ */ 128#endif /* __CSR_WIFI_HIP_SIGNALS_H__ */
diff --git a/drivers/staging/csr/csr_wifi_hip_sigs.h b/drivers/staging/csr/csr_wifi_hip_sigs.h
index 2b9f51d7f296..6112cc3e87fa 100644
--- a/drivers/staging/csr/csr_wifi_hip_sigs.h
+++ b/drivers/staging/csr/csr_wifi_hip_sigs.h
@@ -16,10 +16,6 @@
16#ifndef CSR_WIFI_HIP_SIGS_H 16#ifndef CSR_WIFI_HIP_SIGS_H
17#define CSR_WIFI_HIP_SIGS_H 17#define CSR_WIFI_HIP_SIGS_H
18 18
19#ifdef __cplusplus
20extern "C" {
21#endif
22
23typedef s16 csr_place_holding_type; 19typedef s16 csr_place_holding_type;
24 20
25typedef u16 CSR_ASSOCIATION_ID; 21typedef u16 CSR_ASSOCIATION_ID;
@@ -1418,8 +1414,4 @@ typedef struct CSR_SIGNAL_PRIMITIVE
1418 1414
1419u32 SigGetFilterPos(u16 aSigID); 1415u32 SigGetFilterPos(u16 aSigID);
1420 1416
1421#ifdef __cplusplus
1422}
1423#endif
1424
1425#endif 1417#endif
diff --git a/drivers/staging/csr/csr_wifi_hip_ta_sampling.h b/drivers/staging/csr/csr_wifi_hip_ta_sampling.h
index 46c630b4beea..aa684c654d06 100644
--- a/drivers/staging/csr/csr_wifi_hip_ta_sampling.h
+++ b/drivers/staging/csr/csr_wifi_hip_ta_sampling.h
@@ -21,10 +21,6 @@
21#ifndef __TA_SAMPLING_H__ 21#ifndef __TA_SAMPLING_H__
22#define __TA_SAMPLING_H__ 22#define __TA_SAMPLING_H__
23 23
24#ifdef __cplusplus
25extern "C" {
26#endif
27
28#include "csr_wifi_hip_unifi.h" 24#include "csr_wifi_hip_unifi.h"
29 25
30typedef struct ta_l4stats 26typedef struct ta_l4stats
@@ -67,9 +63,4 @@ typedef struct ta_data
67 63
68void unifi_ta_sampling_init(card_t *card); 64void unifi_ta_sampling_init(card_t *card);
69 65
70
71#ifdef __cplusplus
72}
73#endif
74
75#endif /* __TA_SAMPLING_H__ */ 66#endif /* __TA_SAMPLING_H__ */
diff --git a/drivers/staging/csr/csr_wifi_hip_unifi.h b/drivers/staging/csr/csr_wifi_hip_unifi.h
index 2923e2ef12f2..c2a2231680f5 100644
--- a/drivers/staging/csr/csr_wifi_hip_unifi.h
+++ b/drivers/staging/csr/csr_wifi_hip_unifi.h
@@ -20,10 +20,6 @@
20#ifndef __CSR_WIFI_HIP_UNIFI_H__ 20#ifndef __CSR_WIFI_HIP_UNIFI_H__
21#define __CSR_WIFI_HIP_UNIFI_H__ 1 21#define __CSR_WIFI_HIP_UNIFI_H__ 1
22 22
23#ifdef __cplusplus
24extern "C" {
25#endif
26
27#ifndef CSR_WIFI_HIP_TA_DISABLE 23#ifndef CSR_WIFI_HIP_TA_DISABLE
28#include "csr_wifi_router_ctrl_prim.h" 24#include "csr_wifi_router_ctrl_prim.h"
29#include "csr_wifi_router_prim.h" 25#include "csr_wifi_router_prim.h"
@@ -228,7 +224,7 @@ typedef struct unifi_coredump_req
228 u32 chip_ver; /* Chip version */ 224 u32 chip_ver; /* Chip version */
229 u32 fw_ver; /* Firmware version */ 225 u32 fw_ver; /* Firmware version */
230 s32 requestor; /* Requestor: 0=auto dump, 1=manual */ 226 s32 requestor; /* Requestor: 0=auto dump, 1=manual */
231 CsrTime timestamp; /* time of capture by driver */ 227 u32 timestamp; /* time of capture by driver */
232 u32 serial; /* capture serial number */ 228 u32 serial; /* capture serial number */
233 s32 value; /* register value */ 229 s32 value; /* register value */
234} unifi_coredump_req_t; /* mini-coredumped reg value request */ 230} unifi_coredump_req_t; /* mini-coredumped reg value request */
@@ -872,8 +868,4 @@ CsrResult unifi_coredump_request_at_next_reset(card_t *card, s8 enable);
872CsrResult unifi_coredump_init(card_t *card, u16 num_dump_buffers); 868CsrResult unifi_coredump_init(card_t *card, u16 num_dump_buffers);
873void unifi_coredump_free(card_t *card); 869void unifi_coredump_free(card_t *card);
874 870
875#ifdef __cplusplus
876}
877#endif
878
879#endif /* __CSR_WIFI_HIP_UNIFI_H__ */ 871#endif /* __CSR_WIFI_HIP_UNIFI_H__ */
diff --git a/drivers/staging/csr/csr_wifi_hip_unifi_signal_names.c b/drivers/staging/csr/csr_wifi_hip_unifi_signal_names.c
index 7c13df295c11..9a3528599f3c 100644
--- a/drivers/staging/csr/csr_wifi_hip_unifi_signal_names.c
+++ b/drivers/staging/csr/csr_wifi_hip_unifi_signal_names.c
@@ -10,37 +10,32 @@
10 10
11#include "csr_wifi_hip_unifi.h" 11#include "csr_wifi_hip_unifi.h"
12 12
13struct sig_name 13struct sig_name {
14{ 14 s16 id;
15 s16 id; 15 const char *name;
16 const char *name;
17}; 16};
18 17
19static const struct sig_name Unifi_bulkcmd_names[] = { 18static const struct sig_name Unifi_bulkcmd_names[] = {
20 { 0, "SignalCmd" }, 19 { 0, "SignalCmd" },
21 { 1, "CopyToHost" }, 20 { 1, "CopyToHost" },
22 { 2, "CopyToHostAck" }, 21 { 2, "CopyToHostAck" },
23 { 3, "CopyFromHost" }, 22 { 3, "CopyFromHost" },
24 { 4, "CopyFromHostAck" }, 23 { 4, "CopyFromHostAck" },
25 { 5, "ClearSlot" }, 24 { 5, "ClearSlot" },
26 { 6, "CopyOverlay" }, 25 { 6, "CopyOverlay" },
27 { 7, "CopyOverlayAck" }, 26 { 7, "CopyOverlayAck" },
28 { 8, "CopyFromHostAndClearSlot" }, 27 { 8, "CopyFromHostAndClearSlot" },
29 { 15, "Padding" } 28 { 15, "Padding" }
30}; 29};
31 30
32const char* lookup_bulkcmd_name(u16 id) 31const char *lookup_bulkcmd_name(u16 id)
33{ 32{
34 if (id < 9) 33 if (id < 9)
35 { 34 return Unifi_bulkcmd_names[id].name;
36 return Unifi_bulkcmd_names[id].name; 35 if (id == 15)
37 } 36 return "Padding";
38 if (id == 15) 37
39 { 38 return "UNKNOWN";
40 return "Padding";
41 }
42
43 return "UNKNOWN";
44} 39}
45 40
46 41
diff --git a/drivers/staging/csr/csr_wifi_hip_unifi_udi.h b/drivers/staging/csr/csr_wifi_hip_unifi_udi.h
index 83032d0b4ec9..9d85cfd57616 100644
--- a/drivers/staging/csr/csr_wifi_hip_unifi_udi.h
+++ b/drivers/staging/csr/csr_wifi_hip_unifi_udi.h
@@ -20,10 +20,6 @@
20#ifndef __CSR_WIFI_HIP_UNIFI_UDI_H__ 20#ifndef __CSR_WIFI_HIP_UNIFI_UDI_H__
21#define __CSR_WIFI_HIP_UNIFI_UDI_H__ 21#define __CSR_WIFI_HIP_UNIFI_UDI_H__
22 22
23#ifdef __cplusplus
24extern "C" {
25#endif
26
27#include "csr_wifi_hip_unifi.h" 23#include "csr_wifi_hip_unifi.h"
28#include "csr_wifi_hip_signals.h" 24#include "csr_wifi_hip_signals.h"
29 25
@@ -68,9 +64,4 @@ s32 unifi_print_status(card_t *card, char *str, s32 *remain);
68 } \ 64 } \
69 } while (0) 65 } while (0)
70 66
71
72#ifdef __cplusplus
73}
74#endif
75
76#endif /* __CSR_WIFI_HIP_UNIFI_UDI_H__ */ 67#endif /* __CSR_WIFI_HIP_UNIFI_UDI_H__ */
diff --git a/drivers/staging/csr/csr_wifi_hip_unifihw.h b/drivers/staging/csr/csr_wifi_hip_unifihw.h
index 5ffd6ba38d3b..3f9fcbd55b55 100644
--- a/drivers/staging/csr/csr_wifi_hip_unifihw.h
+++ b/drivers/staging/csr/csr_wifi_hip_unifihw.h
@@ -20,10 +20,6 @@
20#ifndef __UNIFIHW_H__ 20#ifndef __UNIFIHW_H__
21#define __UNIFIHW_H__ 1 21#define __UNIFIHW_H__ 1
22 22
23#ifdef __cplusplus
24extern "C" {
25#endif
26
27/* Symbol Look Up Table fingerprint. IDs are in sigs.h */ 23/* Symbol Look Up Table fingerprint. IDs are in sigs.h */
28#define SLUT_FINGERPRINT 0xD397 24#define SLUT_FINGERPRINT 0xD397
29 25
@@ -60,8 +56,4 @@ extern "C" {
60#define UNIFI_GP_OFFSET(GP) ((GP) & 0xFFFFFF) 56#define UNIFI_GP_OFFSET(GP) ((GP) & 0xFFFFFF)
61#define UNIFI_GP_SPACE(GP) (((GP) >> 24) & 0xFF) 57#define UNIFI_GP_SPACE(GP) (((GP) >> 24) & 0xFF)
62 58
63#ifdef __cplusplus
64}
65#endif
66
67#endif /* __UNIFIHW_H__ */ 59#endif /* __UNIFIHW_H__ */
diff --git a/drivers/staging/csr/csr_wifi_hip_unifiversion.h b/drivers/staging/csr/csr_wifi_hip_unifiversion.h
index e1fdbb27a463..d1c66783f32c 100644
--- a/drivers/staging/csr/csr_wifi_hip_unifiversion.h
+++ b/drivers/staging/csr/csr_wifi_hip_unifiversion.h
@@ -21,18 +21,10 @@
21#ifndef __UNIFIVERSION_H__ 21#ifndef __UNIFIVERSION_H__
22#define __UNIFIVERSION_H__ 22#define __UNIFIVERSION_H__
23 23
24#ifdef __cplusplus
25extern "C" {
26#endif
27
28/* 24/*
29 * The minimum version of Host Interface Protocol required by the driver. 25 * The minimum version of Host Interface Protocol required by the driver.
30 */ 26 */
31#define UNIFI_HIP_MAJOR_VERSION 9 27#define UNIFI_HIP_MAJOR_VERSION 9
32#define UNIFI_HIP_MINOR_VERSION 1 28#define UNIFI_HIP_MINOR_VERSION 1
33 29
34#ifdef __cplusplus
35}
36#endif
37
38#endif /* __UNIFIVERSION_H__ */ 30#endif /* __UNIFIVERSION_H__ */
diff --git a/drivers/staging/csr/csr_wifi_hip_xbv.c b/drivers/staging/csr/csr_wifi_hip_xbv.c
index 071f80a49f19..050a15fbadf9 100644
--- a/drivers/staging/csr/csr_wifi_hip_xbv.c
+++ b/drivers/staging/csr/csr_wifi_hip_xbv.c
@@ -758,7 +758,7 @@ static u32 write_fwdl_to_ptdl(void *buf, const u32 offset, fwreadfn_t readfn,
758 while (left) 758 while (left)
759 { 759 {
760 /* Calculate amount to be transferred */ 760 /* Calculate amount to be transferred */
761 sec_data_len = CSRMIN(left, PTDL_MAX_SIZE - PTDL_HDR_SIZE); 761 sec_data_len = min_t(u32, left, PTDL_MAX_SIZE - PTDL_HDR_SIZE);
762 sec_len = sec_data_len + PTDL_HDR_SIZE; 762 sec_len = sec_data_len + PTDL_HDR_SIZE;
763 763
764 /* Write PTDL header + entire PTDL size */ 764 /* Write PTDL header + entire PTDL size */
diff --git a/drivers/staging/csr/csr_wifi_hip_xbv.h b/drivers/staging/csr/csr_wifi_hip_xbv.h
index 9b60a7e2dc78..3c507235323d 100644
--- a/drivers/staging/csr/csr_wifi_hip_xbv.h
+++ b/drivers/staging/csr/csr_wifi_hip_xbv.h
@@ -21,10 +21,6 @@
21#ifndef __XBV_H__ 21#ifndef __XBV_H__
22#define __XBV_H__ 22#define __XBV_H__
23 23
24#ifdef __cplusplus
25extern "C" {
26#endif
27
28#ifndef CSR_WIFI_XBV_TEST 24#ifndef CSR_WIFI_XBV_TEST
29/* Driver includes */ 25/* Driver includes */
30#include "csr_wifi_hip_unifi.h" 26#include "csr_wifi_hip_unifi.h"
@@ -120,8 +116,4 @@ s32 xbv1_read_slut(card_t *card, fwreadfn_t readfn, void *dlpriv, xbv1_t *fwinfo
120void* xbv_to_patch(card_t *card, fwreadfn_t readfn, const void *fw_buf, const xbv1_t *fwinfo, 116void* xbv_to_patch(card_t *card, fwreadfn_t readfn, const void *fw_buf, const xbv1_t *fwinfo,
121 u32 *size); 117 u32 *size);
122 118
123#ifdef __cplusplus
124}
125#endif
126
127#endif /* __XBV_H__ */ 119#endif /* __XBV_H__ */
diff --git a/drivers/staging/csr/csr_wifi_hostio_prim.h b/drivers/staging/csr/csr_wifi_hostio_prim.h
index bf7c55c6e84b..cfb3e272e359 100644
--- a/drivers/staging/csr/csr_wifi_hostio_prim.h
+++ b/drivers/staging/csr/csr_wifi_hostio_prim.h
@@ -12,16 +12,7 @@
12#ifndef CSR_WIFI_HOSTIO_H 12#ifndef CSR_WIFI_HOSTIO_H
13#define CSR_WIFI_HOSTIO_H 13#define CSR_WIFI_HOSTIO_H
14 14
15#ifdef __cplusplus
16extern "C" {
17#endif
18
19
20#define CSR_WIFI_HOSTIO_PRIM 0x0453 15#define CSR_WIFI_HOSTIO_PRIM 0x0453
21 16
22#ifdef __cplusplus
23}
24#endif
25
26#endif /* CSR_WIFI_HOSTIO_H */ 17#endif /* CSR_WIFI_HOSTIO_H */
27 18
diff --git a/drivers/staging/csr/csr_wifi_lib.h b/drivers/staging/csr/csr_wifi_lib.h
index eb56f6208871..5fde0efb5dca 100644
--- a/drivers/staging/csr/csr_wifi_lib.h
+++ b/drivers/staging/csr/csr_wifi_lib.h
@@ -12,11 +12,6 @@
12 12
13#include "csr_wifi_fsm_event.h" 13#include "csr_wifi_fsm_event.h"
14 14
15
16#ifdef __cplusplus
17extern "C" {
18#endif
19
20/*----------------------------------------------------------------------------* 15/*----------------------------------------------------------------------------*
21 * CsrWifiFsmEventInit 16 * CsrWifiFsmEventInit
22 * 17 *
@@ -105,8 +100,4 @@ typedef struct
105 *----------------------------------------------------------------------------*/ 100 *----------------------------------------------------------------------------*/
106CsrWifiEventCsrUint16CsrUint8* CsrWifiEventCsrUint16CsrUint8_struct(u16 primtype, u16 msgtype, CsrSchedQid dst, CsrSchedQid src, u16 value16, u8 value8); 101CsrWifiEventCsrUint16CsrUint8* CsrWifiEventCsrUint16CsrUint8_struct(u16 primtype, u16 msgtype, CsrSchedQid dst, CsrSchedQid src, u16 value16, u8 value8);
107 102
108#ifdef __cplusplus
109}
110#endif
111
112#endif /* CSR_WIFI_LIB_H__ */ 103#endif /* CSR_WIFI_LIB_H__ */
diff --git a/drivers/staging/csr/csr_wifi_msgconv.h b/drivers/staging/csr/csr_wifi_msgconv.h
index 7ec35d70e14a..f8b402947a09 100644
--- a/drivers/staging/csr/csr_wifi_msgconv.h
+++ b/drivers/staging/csr/csr_wifi_msgconv.h
@@ -14,11 +14,6 @@
14#include "csr_prim_defs.h" 14#include "csr_prim_defs.h"
15#include "csr_sched.h" 15#include "csr_sched.h"
16 16
17#ifdef __cplusplus
18extern "C" {
19#endif
20
21
22void CsrUint16SerBigEndian(u8 *ptr, size_t *len, u16 v); 17void CsrUint16SerBigEndian(u8 *ptr, size_t *len, u16 v);
23void CsrUint24SerBigEndian(u8 *ptr, size_t *len, u32 v); 18void CsrUint24SerBigEndian(u8 *ptr, size_t *len, u32 v);
24void CsrUint32SerBigEndian(u8 *ptr, size_t *len, u32 v); 19void CsrUint32SerBigEndian(u8 *ptr, size_t *len, u32 v);
@@ -51,8 +46,4 @@ size_t CsrWifiEventCsrUint16CsrUint8Sizeof(void *msg);
51u8* CsrWifiEventCsrUint16CsrUint8Ser(u8 *ptr, size_t *len, void *msg); 46u8* CsrWifiEventCsrUint16CsrUint8Ser(u8 *ptr, size_t *len, void *msg);
52void* CsrWifiEventCsrUint16CsrUint8Des(u8 *buffer, size_t length); 47void* CsrWifiEventCsrUint16CsrUint8Des(u8 *buffer, size_t length);
53 48
54#ifdef __cplusplus
55}
56#endif
57
58#endif /* CSR_WIFI_MSGCONV_H__ */ 49#endif /* CSR_WIFI_MSGCONV_H__ */
diff --git a/drivers/staging/csr/csr_wifi_nme_ap_converter_init.h b/drivers/staging/csr/csr_wifi_nme_ap_converter_init.h
index 4072c06a152d..b89d7c7f8e21 100644
--- a/drivers/staging/csr/csr_wifi_nme_ap_converter_init.h
+++ b/drivers/staging/csr/csr_wifi_nme_ap_converter_init.h
@@ -13,10 +13,6 @@
13#ifndef CSR_WIFI_NME_AP_CONVERTER_INIT_H__ 13#ifndef CSR_WIFI_NME_AP_CONVERTER_INIT_H__
14#define CSR_WIFI_NME_AP_CONVERTER_INIT_H__ 14#define CSR_WIFI_NME_AP_CONVERTER_INIT_H__
15 15
16#ifdef __cplusplus
17extern "C" {
18#endif
19
20#ifndef CSR_WIFI_NME_ENABLE 16#ifndef CSR_WIFI_NME_ENABLE
21#error CSR_WIFI_NME_ENABLE MUST be defined inorder to use csr_wifi_nme_ap_converter_init.h 17#error CSR_WIFI_NME_ENABLE MUST be defined inorder to use csr_wifi_nme_ap_converter_init.h
22#endif 18#endif
@@ -42,8 +38,4 @@ extern void CsrWifiNmeApConverterInit(void);
42 38
43#endif /* EXCLUDE_CSR_WIFI_NME_AP_MODULE */ 39#endif /* EXCLUDE_CSR_WIFI_NME_AP_MODULE */
44 40
45#ifdef __cplusplus
46}
47#endif
48
49#endif /* CSR_WIFI_NME_AP_CONVERTER_INIT_H__ */ 41#endif /* CSR_WIFI_NME_AP_CONVERTER_INIT_H__ */
diff --git a/drivers/staging/csr/csr_wifi_nme_ap_lib.h b/drivers/staging/csr/csr_wifi_nme_ap_lib.h
index d4014709112b..6d8df8366817 100644
--- a/drivers/staging/csr/csr_wifi_nme_ap_lib.h
+++ b/drivers/staging/csr/csr_wifi_nme_ap_lib.h
@@ -22,11 +22,6 @@
22#include "csr_wifi_nme_ap_prim.h" 22#include "csr_wifi_nme_ap_prim.h"
23#include "csr_wifi_nme_task.h" 23#include "csr_wifi_nme_task.h"
24 24
25
26#ifdef __cplusplus
27extern "C" {
28#endif
29
30#ifndef CSR_WIFI_NME_ENABLE 25#ifndef CSR_WIFI_NME_ENABLE
31#error CSR_WIFI_NME_ENABLE MUST be defined inorder to use csr_wifi_nme_ap_lib.h 26#error CSR_WIFI_NME_ENABLE MUST be defined inorder to use csr_wifi_nme_ap_lib.h
32#endif 27#endif
@@ -58,24 +53,6 @@ void CsrWifiNmeApFreeUpstreamMessageContents(u16 eventClass, void *message);
58 *----------------------------------------------------------------------------*/ 53 *----------------------------------------------------------------------------*/
59void CsrWifiNmeApFreeDownstreamMessageContents(u16 eventClass, void *message); 54void CsrWifiNmeApFreeDownstreamMessageContents(u16 eventClass, void *message);
60 55
61/*----------------------------------------------------------------------------*
62 * Enum to string functions
63 *----------------------------------------------------------------------------*/
64const char* CsrWifiNmeApPersCredentialTypeToString(CsrWifiNmeApPersCredentialType value);
65
66
67/*----------------------------------------------------------------------------*
68 * CsrPrim Type toString function.
69 * Converts a message type to the String name of the Message
70 *----------------------------------------------------------------------------*/
71const char* CsrWifiNmeApPrimTypeToString(CsrPrim msgType);
72
73/*----------------------------------------------------------------------------*
74 * Lookup arrays for PrimType name Strings
75 *----------------------------------------------------------------------------*/
76extern const char *CsrWifiNmeApUpstreamPrimNames[CSR_WIFI_NME_AP_PRIM_UPSTREAM_COUNT];
77extern const char *CsrWifiNmeApDownstreamPrimNames[CSR_WIFI_NME_AP_PRIM_DOWNSTREAM_COUNT];
78
79/******************************************************************************* 56/*******************************************************************************
80 57
81 NAME 58 NAME
@@ -515,9 +492,4 @@ extern const char *CsrWifiNmeApDownstreamPrimNames[CSR_WIFI_NME_AP_PRIM_DOWNSTRE
515#define CsrWifiNmeApWpsRegisterCfmSend(dst__, interfaceTag__, status__) \ 492#define CsrWifiNmeApWpsRegisterCfmSend(dst__, interfaceTag__, status__) \
516 CsrWifiNmeApWpsRegisterCfmSendTo(dst__, CSR_WIFI_NME_IFACEQUEUE, interfaceTag__, status__) 493 CsrWifiNmeApWpsRegisterCfmSendTo(dst__, CSR_WIFI_NME_IFACEQUEUE, interfaceTag__, status__)
517 494
518
519#ifdef __cplusplus
520}
521#endif
522
523#endif /* CSR_WIFI_NME_AP_LIB_H__ */ 495#endif /* CSR_WIFI_NME_AP_LIB_H__ */
diff --git a/drivers/staging/csr/csr_wifi_nme_ap_prim.h b/drivers/staging/csr/csr_wifi_nme_ap_prim.h
index fc44560b28b8..b32bdbc7e22f 100644
--- a/drivers/staging/csr/csr_wifi_nme_ap_prim.h
+++ b/drivers/staging/csr/csr_wifi_nme_ap_prim.h
@@ -22,10 +22,6 @@
22#include "csr_wifi_sme_ap_prim.h" 22#include "csr_wifi_sme_ap_prim.h"
23#include "csr_wifi_nme_prim.h" 23#include "csr_wifi_nme_prim.h"
24 24
25#ifdef __cplusplus
26extern "C" {
27#endif
28
29#ifndef CSR_WIFI_NME_ENABLE 25#ifndef CSR_WIFI_NME_ENABLE
30#error CSR_WIFI_NME_ENABLE MUST be defined inorder to use csr_wifi_nme_ap_prim.h 26#error CSR_WIFI_NME_ENABLE MUST be defined inorder to use csr_wifi_nme_ap_prim.h
31#endif 27#endif
@@ -494,10 +490,5 @@ typedef struct
494 CsrWifiMacAddress peerDeviceAddress; 490 CsrWifiMacAddress peerDeviceAddress;
495} CsrWifiNmeApStationInd; 491} CsrWifiNmeApStationInd;
496 492
497
498#ifdef __cplusplus
499}
500#endif
501
502#endif /* CSR_WIFI_NME_AP_PRIM_H__ */ 493#endif /* CSR_WIFI_NME_AP_PRIM_H__ */
503 494
diff --git a/drivers/staging/csr/csr_wifi_nme_ap_sef.h b/drivers/staging/csr/csr_wifi_nme_ap_sef.h
index 3f353633fa5e..3daaa0944dba 100644
--- a/drivers/staging/csr/csr_wifi_nme_ap_sef.h
+++ b/drivers/staging/csr/csr_wifi_nme_ap_sef.h
@@ -11,11 +11,6 @@
11 11
12#include "csr_wifi_nme_prim.h" 12#include "csr_wifi_nme_prim.h"
13 13
14
15#ifdef __cplusplus
16extern "C" {
17#endif
18
19void CsrWifiNmeApUpstreamStateHandlers(void* drvpriv, CsrWifiFsmEvent* msg); 14void CsrWifiNmeApUpstreamStateHandlers(void* drvpriv, CsrWifiFsmEvent* msg);
20 15
21 16
@@ -23,9 +18,4 @@ extern void CsrWifiNmeApConfigSetCfmHandler(void* drvpriv, CsrWifiFsmEvent* msg)
23extern void CsrWifiNmeApStartCfmHandler(void* drvpriv, CsrWifiFsmEvent* msg); 18extern void CsrWifiNmeApStartCfmHandler(void* drvpriv, CsrWifiFsmEvent* msg);
24extern void CsrWifiNmeApStopCfmHandler(void* drvpriv, CsrWifiFsmEvent* msg); 19extern void CsrWifiNmeApStopCfmHandler(void* drvpriv, CsrWifiFsmEvent* msg);
25 20
26
27#ifdef __cplusplus
28}
29#endif
30
31#endif /* CSR_WIFI_ROUTER_SEF_CSR_WIFI_NME_H__ */ 21#endif /* CSR_WIFI_ROUTER_SEF_CSR_WIFI_NME_H__ */
diff --git a/drivers/staging/csr/csr_wifi_nme_ap_serialize.h b/drivers/staging/csr/csr_wifi_nme_ap_serialize.h
index 0f5782947223..c04585e72460 100644
--- a/drivers/staging/csr/csr_wifi_nme_ap_serialize.h
+++ b/drivers/staging/csr/csr_wifi_nme_ap_serialize.h
@@ -17,10 +17,6 @@
17 17
18#include "csr_wifi_nme_ap_prim.h" 18#include "csr_wifi_nme_ap_prim.h"
19 19
20#ifdef __cplusplus
21extern "C" {
22#endif
23
24#ifndef CSR_WIFI_NME_ENABLE 20#ifndef CSR_WIFI_NME_ENABLE
25#error CSR_WIFI_NME_ENABLE MUST be defined inorder to use csr_wifi_nme_ap_serialize.h 21#error CSR_WIFI_NME_ENABLE MUST be defined inorder to use csr_wifi_nme_ap_serialize.h
26#endif 22#endif
@@ -95,9 +91,4 @@ extern void* CsrWifiNmeApStationIndDes(u8 *buffer, size_t len);
95extern size_t CsrWifiNmeApStationIndSizeof(void *msg); 91extern size_t CsrWifiNmeApStationIndSizeof(void *msg);
96#define CsrWifiNmeApStationIndSerFree CsrWifiNmeApPfree 92#define CsrWifiNmeApStationIndSerFree CsrWifiNmeApPfree
97 93
98
99#ifdef __cplusplus
100}
101#endif
102#endif /* CSR_WIFI_NME_AP_SERIALIZE_H__ */ 94#endif /* CSR_WIFI_NME_AP_SERIALIZE_H__ */
103
diff --git a/drivers/staging/csr/csr_wifi_nme_converter_init.h b/drivers/staging/csr/csr_wifi_nme_converter_init.h
index 6661914fb403..85e6f5f57130 100644
--- a/drivers/staging/csr/csr_wifi_nme_converter_init.h
+++ b/drivers/staging/csr/csr_wifi_nme_converter_init.h
@@ -13,10 +13,6 @@
13#ifndef CSR_WIFI_NME_CONVERTER_INIT_H__ 13#ifndef CSR_WIFI_NME_CONVERTER_INIT_H__
14#define CSR_WIFI_NME_CONVERTER_INIT_H__ 14#define CSR_WIFI_NME_CONVERTER_INIT_H__
15 15
16#ifdef __cplusplus
17extern "C" {
18#endif
19
20#ifndef CSR_WIFI_NME_ENABLE 16#ifndef CSR_WIFI_NME_ENABLE
21#error CSR_WIFI_NME_ENABLE MUST be defined inorder to use csr_wifi_nme_converter_init.h 17#error CSR_WIFI_NME_ENABLE MUST be defined inorder to use csr_wifi_nme_converter_init.h
22#endif 18#endif
@@ -39,8 +35,4 @@ extern void CsrWifiNmeConverterInit(void);
39 35
40#endif /* EXCLUDE_CSR_WIFI_NME_MODULE */ 36#endif /* EXCLUDE_CSR_WIFI_NME_MODULE */
41 37
42#ifdef __cplusplus
43}
44#endif
45
46#endif /* CSR_WIFI_NME_CONVERTER_INIT_H__ */ 38#endif /* CSR_WIFI_NME_CONVERTER_INIT_H__ */
diff --git a/drivers/staging/csr/csr_wifi_nme_lib.h b/drivers/staging/csr/csr_wifi_nme_lib.h
index 709ece464977..5a1f132009bf 100644
--- a/drivers/staging/csr/csr_wifi_nme_lib.h
+++ b/drivers/staging/csr/csr_wifi_nme_lib.h
@@ -23,68 +23,10 @@
23#include "csr_wifi_nme_task.h" 23#include "csr_wifi_nme_task.h"
24 24
25 25
26#ifdef __cplusplus
27extern "C" {
28#endif
29
30#ifndef CSR_WIFI_NME_ENABLE 26#ifndef CSR_WIFI_NME_ENABLE
31#error CSR_WIFI_NME_ENABLE MUST be defined inorder to use csr_wifi_nme_lib.h 27#error CSR_WIFI_NME_ENABLE MUST be defined inorder to use csr_wifi_nme_lib.h
32#endif 28#endif
33 29
34/*----------------------------------------------------------------------------*
35 * CsrWifiNmeFreeUpstreamMessageContents
36 *
37 * DESCRIPTION
38 * Free the allocated memory in a CSR_WIFI_NME upstream message. Does not
39 * free the message itself, and can only be used for upstream messages.
40 *
41 * PARAMETERS
42 * Deallocates the resources in a CSR_WIFI_NME upstream message
43 *----------------------------------------------------------------------------*/
44void CsrWifiNmeFreeUpstreamMessageContents(u16 eventClass, void *message);
45
46/*----------------------------------------------------------------------------*
47 * CsrWifiNmeFreeDownstreamMessageContents
48 *
49 * DESCRIPTION
50 * Free the allocated memory in a CSR_WIFI_NME downstream message. Does not
51 * free the message itself, and can only be used for downstream messages.
52 *
53 * PARAMETERS
54 * Deallocates the resources in a CSR_WIFI_NME downstream message
55 *----------------------------------------------------------------------------*/
56void CsrWifiNmeFreeDownstreamMessageContents(u16 eventClass, void *message);
57
58/*----------------------------------------------------------------------------*
59 * Enum to string functions
60 *----------------------------------------------------------------------------*/
61const char* CsrWifiNmeAuthModeToString(CsrWifiNmeAuthMode value);
62const char* CsrWifiNmeBssTypeToString(CsrWifiNmeBssType value);
63const char* CsrWifiNmeCcxOptionsMaskToString(CsrWifiNmeCcxOptionsMask value);
64const char* CsrWifiNmeConfigActionToString(CsrWifiNmeConfigAction value);
65const char* CsrWifiNmeConnectionStatusToString(CsrWifiNmeConnectionStatus value);
66const char* CsrWifiNmeCredentialTypeToString(CsrWifiNmeCredentialType value);
67const char* CsrWifiNmeEapMethodToString(CsrWifiNmeEapMethod value);
68const char* CsrWifiNmeEncryptionToString(CsrWifiNmeEncryption value);
69const char* CsrWifiNmeIndicationsToString(CsrWifiNmeIndications value);
70const char* CsrWifiNmeSecErrorToString(CsrWifiNmeSecError value);
71const char* CsrWifiNmeSimCardTypeToString(CsrWifiNmeSimCardType value);
72const char* CsrWifiNmeUmtsAuthResultToString(CsrWifiNmeUmtsAuthResult value);
73const char* CsrWifiNmeWmmQosInfoToString(CsrWifiNmeWmmQosInfo value);
74
75
76/*----------------------------------------------------------------------------*
77 * CsrPrim Type toString function.
78 * Converts a message type to the String name of the Message
79 *----------------------------------------------------------------------------*/
80const char* CsrWifiNmePrimTypeToString(CsrPrim msgType);
81
82/*----------------------------------------------------------------------------*
83 * Lookup arrays for PrimType name Strings
84 *----------------------------------------------------------------------------*/
85extern const char *CsrWifiNmeUpstreamPrimNames[CSR_WIFI_NME_PRIM_UPSTREAM_COUNT];
86extern const char *CsrWifiNmeDownstreamPrimNames[CSR_WIFI_NME_PRIM_DOWNSTREAM_COUNT];
87
88/******************************************************************************* 30/*******************************************************************************
89 31
90 NAME 32 NAME
@@ -1046,9 +988,4 @@ extern const char *CsrWifiNmeDownstreamPrimNames[CSR_WIFI_NME_PRIM_DOWNSTREAM_CO
1046#define CsrWifiNmeWpsReqSend(src__, interfaceTag__, pin__, ssid__, bssid__) \ 988#define CsrWifiNmeWpsReqSend(src__, interfaceTag__, pin__, ssid__, bssid__) \
1047 CsrWifiNmeWpsReqSendTo(CSR_WIFI_NME_IFACEQUEUE, src__, interfaceTag__, pin__, ssid__, bssid__) 989 CsrWifiNmeWpsReqSendTo(CSR_WIFI_NME_IFACEQUEUE, src__, interfaceTag__, pin__, ssid__, bssid__)
1048 990
1049
1050#ifdef __cplusplus
1051}
1052#endif
1053
1054#endif /* CSR_WIFI_NME_LIB_H__ */ 991#endif /* CSR_WIFI_NME_LIB_H__ */
diff --git a/drivers/staging/csr/csr_wifi_nme_prim.h b/drivers/staging/csr/csr_wifi_nme_prim.h
index 20dc77971f94..9a7927a117ea 100644
--- a/drivers/staging/csr/csr_wifi_nme_prim.h
+++ b/drivers/staging/csr/csr_wifi_nme_prim.h
@@ -21,10 +21,6 @@
21#include "csr_wifi_fsm_event.h" 21#include "csr_wifi_fsm_event.h"
22#include "csr_wifi_sme_prim.h" 22#include "csr_wifi_sme_prim.h"
23 23
24#ifdef __cplusplus
25extern "C" {
26#endif
27
28#ifndef CSR_WIFI_NME_ENABLE 24#ifndef CSR_WIFI_NME_ENABLE
29#error CSR_WIFI_NME_ENABLE MUST be defined inorder to use csr_wifi_nme_prim.h 25#error CSR_WIFI_NME_ENABLE MUST be defined inorder to use csr_wifi_nme_prim.h
30#endif 26#endif
@@ -1657,10 +1653,5 @@ typedef struct
1657 CsrResult status; 1653 CsrResult status;
1658} CsrWifiNmeEventMaskSetCfm; 1654} CsrWifiNmeEventMaskSetCfm;
1659 1655
1660
1661#ifdef __cplusplus
1662}
1663#endif
1664
1665#endif /* CSR_WIFI_NME_PRIM_H__ */ 1656#endif /* CSR_WIFI_NME_PRIM_H__ */
1666 1657
diff --git a/drivers/staging/csr/csr_wifi_nme_serialize.h b/drivers/staging/csr/csr_wifi_nme_serialize.h
index c6b163660a3e..ebac484419cf 100644
--- a/drivers/staging/csr/csr_wifi_nme_serialize.h
+++ b/drivers/staging/csr/csr_wifi_nme_serialize.h
@@ -16,10 +16,6 @@
16#include "csr_wifi_msgconv.h" 16#include "csr_wifi_msgconv.h"
17#include "csr_wifi_nme_prim.h" 17#include "csr_wifi_nme_prim.h"
18 18
19#ifdef __cplusplus
20extern "C" {
21#endif
22
23#ifndef CSR_WIFI_NME_ENABLE 19#ifndef CSR_WIFI_NME_ENABLE
24#error CSR_WIFI_NME_ENABLE MUST be defined inorder to use csr_wifi_nme_serialize.h 20#error CSR_WIFI_NME_ENABLE MUST be defined inorder to use csr_wifi_nme_serialize.h
25#endif 21#endif
@@ -166,9 +162,5 @@ extern size_t CsrWifiNmeSimUmtsAuthIndSizeof(void *msg);
166#define CsrWifiNmeEventMaskSetCfmSizeof CsrWifiEventCsrUint16Sizeof 162#define CsrWifiNmeEventMaskSetCfmSizeof CsrWifiEventCsrUint16Sizeof
167#define CsrWifiNmeEventMaskSetCfmSerFree CsrWifiNmePfree 163#define CsrWifiNmeEventMaskSetCfmSerFree CsrWifiNmePfree
168 164
169
170#ifdef __cplusplus
171}
172#endif
173#endif /* CSR_WIFI_NME_SERIALIZE_H__ */ 165#endif /* CSR_WIFI_NME_SERIALIZE_H__ */
174 166
diff --git a/drivers/staging/csr/csr_wifi_nme_task.h b/drivers/staging/csr/csr_wifi_nme_task.h
index 76f44dbe26a9..84e973a59bb2 100644
--- a/drivers/staging/csr/csr_wifi_nme_task.h
+++ b/drivers/staging/csr/csr_wifi_nme_task.h
@@ -16,23 +16,12 @@
16#include <linux/types.h> 16#include <linux/types.h>
17#include "csr_sched.h" 17#include "csr_sched.h"
18 18
19#ifdef __cplusplus
20extern "C" {
21#endif
22
23#ifndef CSR_WIFI_NME_ENABLE 19#ifndef CSR_WIFI_NME_ENABLE
24#error CSR_WIFI_NME_ENABLE MUST be defined inorder to use csr_wifi_nme_task.h 20#error CSR_WIFI_NME_ENABLE MUST be defined inorder to use csr_wifi_nme_task.h
25#endif 21#endif
26 22
27#define CSR_WIFI_NME_LOG_ID 0x1203FFFF 23#define CSR_WIFI_NME_LOG_ID 0x1203FFFF
28extern CsrSchedQid CSR_WIFI_NME_IFACEQUEUE; 24extern CsrSchedQid CSR_WIFI_NME_IFACEQUEUE;
29void CsrWifiNmeInit(void **gash);
30void CsrWifiNmeDeinit(void **gash);
31void CsrWifiNmeHandler(void **gash);
32
33#ifdef __cplusplus
34}
35#endif
36 25
37#endif /* CSR_WIFI_NME_TASK_H__ */ 26#endif /* CSR_WIFI_NME_TASK_H__ */
38 27
diff --git a/drivers/staging/csr/csr_wifi_private_common.h b/drivers/staging/csr/csr_wifi_private_common.h
index 47309984e2a7..ee3bd51b934a 100644
--- a/drivers/staging/csr/csr_wifi_private_common.h
+++ b/drivers/staging/csr/csr_wifi_private_common.h
@@ -11,10 +11,6 @@
11#ifndef CSR_WIFI_PRIVATE_COMMON_H__ 11#ifndef CSR_WIFI_PRIVATE_COMMON_H__
12#define CSR_WIFI_PRIVATE_COMMON_H__ 12#define CSR_WIFI_PRIVATE_COMMON_H__
13 13
14#ifdef __cplusplus
15extern "C" {
16#endif
17
18/** 14/**
19 * @brief maximum number of STAs allowed to be connected 15 * @brief maximum number of STAs allowed to be connected
20 * 16 *
@@ -81,9 +77,5 @@ typedef u8 CsrWifiInterfaceMode;
81#define CSR_WIFI_MODE_WPS_ENROLLEE ((CsrWifiInterfaceMode) 0x06) 77#define CSR_WIFI_MODE_WPS_ENROLLEE ((CsrWifiInterfaceMode) 0x06)
82#define CSR_WIFI_MODE_IBSS ((CsrWifiInterfaceMode) 0x07) 78#define CSR_WIFI_MODE_IBSS ((CsrWifiInterfaceMode) 0x07)
83 79
84#ifdef __cplusplus
85}
86#endif
87
88#endif 80#endif
89 81
diff --git a/drivers/staging/csr/csr_wifi_result.h b/drivers/staging/csr/csr_wifi_result.h
index 2f87cda9003e..3c394c7e5fa9 100644
--- a/drivers/staging/csr/csr_wifi_result.h
+++ b/drivers/staging/csr/csr_wifi_result.h
@@ -13,10 +13,6 @@
13 13
14#include "csr_result.h" 14#include "csr_result.h"
15 15
16#ifdef __cplusplus
17extern "C" {
18#endif
19
20/* THIS FILE SHOULD CONTAIN ONLY RESULT CODES */ 16/* THIS FILE SHOULD CONTAIN ONLY RESULT CODES */
21 17
22/* Result Codes */ 18/* Result Codes */
@@ -27,9 +23,5 @@ extern "C" {
27#define CSR_WIFI_HIP_RESULT_RANGE ((CsrResult) 5) /* Request exceeds the range of a file or a buffer */ 23#define CSR_WIFI_HIP_RESULT_RANGE ((CsrResult) 5) /* Request exceeds the range of a file or a buffer */
28#define CSR_WIFI_HIP_RESULT_NOT_FOUND ((CsrResult) 6) /* A file (typically a f/w patch) is not found */ 24#define CSR_WIFI_HIP_RESULT_NOT_FOUND ((CsrResult) 6) /* A file (typically a f/w patch) is not found */
29 25
30#ifdef __cplusplus
31}
32#endif
33
34#endif /* CSR_WIFI_RESULT_H__ */ 26#endif /* CSR_WIFI_RESULT_H__ */
35 27
diff --git a/drivers/staging/csr/csr_wifi_router_converter_init.h b/drivers/staging/csr/csr_wifi_router_converter_init.h
index 2a293e457ffb..478327b75c18 100644
--- a/drivers/staging/csr/csr_wifi_router_converter_init.h
+++ b/drivers/staging/csr/csr_wifi_router_converter_init.h
@@ -13,10 +13,6 @@
13#ifndef CSR_WIFI_ROUTER_CONVERTER_INIT_H__ 13#ifndef CSR_WIFI_ROUTER_CONVERTER_INIT_H__
14#define CSR_WIFI_ROUTER_CONVERTER_INIT_H__ 14#define CSR_WIFI_ROUTER_CONVERTER_INIT_H__
15 15
16#ifdef __cplusplus
17extern "C" {
18#endif
19
20#ifndef EXCLUDE_CSR_WIFI_ROUTER_MODULE 16#ifndef EXCLUDE_CSR_WIFI_ROUTER_MODULE
21 17
22#include "csr_msgconv.h" 18#include "csr_msgconv.h"
@@ -35,8 +31,4 @@ extern void CsrWifiRouterConverterInit(void);
35 31
36#endif /* EXCLUDE_CSR_WIFI_ROUTER_MODULE */ 32#endif /* EXCLUDE_CSR_WIFI_ROUTER_MODULE */
37 33
38#ifdef __cplusplus
39}
40#endif
41
42#endif /* CSR_WIFI_ROUTER_CONVERTER_INIT_H__ */ 34#endif /* CSR_WIFI_ROUTER_CONVERTER_INIT_H__ */
diff --git a/drivers/staging/csr/csr_wifi_router_ctrl_converter_init.h b/drivers/staging/csr/csr_wifi_router_ctrl_converter_init.h
index 0c9d26b7a0b4..c98458912825 100644
--- a/drivers/staging/csr/csr_wifi_router_ctrl_converter_init.h
+++ b/drivers/staging/csr/csr_wifi_router_ctrl_converter_init.h
@@ -13,10 +13,6 @@
13#ifndef CSR_WIFI_ROUTER_CTRL_CONVERTER_INIT_H__ 13#ifndef CSR_WIFI_ROUTER_CTRL_CONVERTER_INIT_H__
14#define CSR_WIFI_ROUTER_CTRL_CONVERTER_INIT_H__ 14#define CSR_WIFI_ROUTER_CTRL_CONVERTER_INIT_H__
15 15
16#ifdef __cplusplus
17extern "C" {
18#endif
19
20#ifndef EXCLUDE_CSR_WIFI_ROUTER_CTRL_MODULE 16#ifndef EXCLUDE_CSR_WIFI_ROUTER_CTRL_MODULE
21 17
22#include "csr_msgconv.h" 18#include "csr_msgconv.h"
@@ -35,8 +31,4 @@ extern void CsrWifiRouterCtrlConverterInit(void);
35 31
36#endif /* EXCLUDE_CSR_WIFI_ROUTER_CTRL_MODULE */ 32#endif /* EXCLUDE_CSR_WIFI_ROUTER_CTRL_MODULE */
37 33
38#ifdef __cplusplus
39}
40#endif
41
42#endif /* CSR_WIFI_ROUTER_CTRL_CONVERTER_INIT_H__ */ 34#endif /* CSR_WIFI_ROUTER_CTRL_CONVERTER_INIT_H__ */
diff --git a/drivers/staging/csr/csr_wifi_router_ctrl_lib.h b/drivers/staging/csr/csr_wifi_router_ctrl_lib.h
index 93d0fadf5e6f..f235153c42af 100644
--- a/drivers/staging/csr/csr_wifi_router_ctrl_lib.h
+++ b/drivers/staging/csr/csr_wifi_router_ctrl_lib.h
@@ -22,11 +22,6 @@
22#include "csr_wifi_router_ctrl_prim.h" 22#include "csr_wifi_router_ctrl_prim.h"
23#include "csr_wifi_router_task.h" 23#include "csr_wifi_router_task.h"
24 24
25
26#ifdef __cplusplus
27extern "C" {
28#endif
29
30/*----------------------------------------------------------------------------* 25/*----------------------------------------------------------------------------*
31 * CsrWifiRouterCtrlFreeUpstreamMessageContents 26 * CsrWifiRouterCtrlFreeUpstreamMessageContents
32 * 27 *
@@ -2084,9 +2079,4 @@ extern const char *CsrWifiRouterCtrlDownstreamPrimNames[CSR_WIFI_ROUTER_CTRL_PRI
2084#define CsrWifiRouterCtrlWifiOnCfmSend(dst__, clientData__, status__) \ 2079#define CsrWifiRouterCtrlWifiOnCfmSend(dst__, clientData__, status__) \
2085 CsrWifiRouterCtrlWifiOnCfmSendTo(dst__, CSR_WIFI_ROUTER_IFACEQUEUE, clientData__, status__) 2080 CsrWifiRouterCtrlWifiOnCfmSendTo(dst__, CSR_WIFI_ROUTER_IFACEQUEUE, clientData__, status__)
2086 2081
2087
2088#ifdef __cplusplus
2089}
2090#endif
2091
2092#endif /* CSR_WIFI_ROUTER_CTRL_LIB_H__ */ 2082#endif /* CSR_WIFI_ROUTER_CTRL_LIB_H__ */
diff --git a/drivers/staging/csr/csr_wifi_router_ctrl_prim.h b/drivers/staging/csr/csr_wifi_router_ctrl_prim.h
index ec972ac0b5aa..1312a335dd76 100644
--- a/drivers/staging/csr/csr_wifi_router_ctrl_prim.h
+++ b/drivers/staging/csr/csr_wifi_router_ctrl_prim.h
@@ -20,10 +20,6 @@
20#include "csr_result.h" 20#include "csr_result.h"
21#include "csr_wifi_fsm_event.h" 21#include "csr_wifi_fsm_event.h"
22 22
23#ifdef __cplusplus
24extern "C" {
25#endif
26
27#define CSR_WIFI_ROUTER_CTRL_PRIM (0x0401) 23#define CSR_WIFI_ROUTER_CTRL_PRIM (0x0401)
28 24
29typedef CsrPrim CsrWifiRouterCtrlPrim; 25typedef CsrPrim CsrWifiRouterCtrlPrim;
@@ -2113,10 +2109,5 @@ typedef struct
2113 u8 *data; 2109 u8 *data;
2114} CsrWifiRouterCtrlWapiUnicastTxEncryptInd; 2110} CsrWifiRouterCtrlWapiUnicastTxEncryptInd;
2115 2111
2116
2117#ifdef __cplusplus
2118}
2119#endif
2120
2121#endif /* CSR_WIFI_ROUTER_CTRL_PRIM_H__ */ 2112#endif /* CSR_WIFI_ROUTER_CTRL_PRIM_H__ */
2122 2113
diff --git a/drivers/staging/csr/csr_wifi_router_ctrl_sef.c b/drivers/staging/csr/csr_wifi_router_ctrl_sef.c
index 33d92b698c59..99cf93061d1b 100644
--- a/drivers/staging/csr/csr_wifi_router_ctrl_sef.c
+++ b/drivers/staging/csr/csr_wifi_router_ctrl_sef.c
@@ -9,37 +9,38 @@
9 *****************************************************************************/ 9 *****************************************************************************/
10#include "csr_wifi_router_ctrl_sef.h" 10#include "csr_wifi_router_ctrl_sef.h"
11 11
12const CsrWifiRouterCtrlStateHandlerType CsrWifiRouterCtrlDownstreamStateHandlers[CSR_WIFI_ROUTER_CTRL_PRIM_DOWNSTREAM_COUNT] = 12const CsrWifiRouterCtrlStateHandlerType
13{ 13 CsrWifiRouterCtrlDownstreamStateHandlers
14 /* 0x0000 */ CsrWifiRouterCtrlConfigurePowerModeReqHandler, 14 [CSR_WIFI_ROUTER_CTRL_PRIM_DOWNSTREAM_COUNT] = {
15 /* 0x0001 */ CsrWifiRouterCtrlHipReqHandler, 15 /* 0x0000 */ CsrWifiRouterCtrlConfigurePowerModeReqHandler,
16 /* 0x0002 */ CsrWifiRouterCtrlMediaStatusReqHandler, 16 /* 0x0001 */ CsrWifiRouterCtrlHipReqHandler,
17 /* 0x0003 */ CsrWifiRouterCtrlMulticastAddressResHandler, 17 /* 0x0002 */ CsrWifiRouterCtrlMediaStatusReqHandler,
18 /* 0x0004 */ CsrWifiRouterCtrlPortConfigureReqHandler, 18 /* 0x0003 */ CsrWifiRouterCtrlMulticastAddressResHandler,
19 /* 0x0005 */ CsrWifiRouterCtrlQosControlReqHandler, 19 /* 0x0004 */ CsrWifiRouterCtrlPortConfigureReqHandler,
20 /* 0x0006 */ CsrWifiRouterCtrlSuspendResHandler, 20 /* 0x0005 */ CsrWifiRouterCtrlQosControlReqHandler,
21 /* 0x0007 */ CsrWifiRouterCtrlTclasAddReqHandler, 21 /* 0x0006 */ CsrWifiRouterCtrlSuspendResHandler,
22 /* 0x0008 */ CsrWifiRouterCtrlResumeResHandler, 22 /* 0x0007 */ CsrWifiRouterCtrlTclasAddReqHandler,
23 /* 0x0009 */ CsrWifiRouterCtrlRawSdioDeinitialiseReqHandler, 23 /* 0x0008 */ CsrWifiRouterCtrlResumeResHandler,
24 /* 0x000A */ CsrWifiRouterCtrlRawSdioInitialiseReqHandler, 24 /* 0x0009 */ CsrWifiRouterCtrlRawSdioDeinitialiseReqHandler,
25 /* 0x000B */ CsrWifiRouterCtrlTclasDelReqHandler, 25 /* 0x000A */ CsrWifiRouterCtrlRawSdioInitialiseReqHandler,
26 /* 0x000C */ CsrWifiRouterCtrlTrafficClassificationReqHandler, 26 /* 0x000B */ CsrWifiRouterCtrlTclasDelReqHandler,
27 /* 0x000D */ CsrWifiRouterCtrlTrafficConfigReqHandler, 27 /* 0x000C */ CsrWifiRouterCtrlTrafficClassificationReqHandler,
28 /* 0x000E */ CsrWifiRouterCtrlWifiOffReqHandler, 28 /* 0x000D */ CsrWifiRouterCtrlTrafficConfigReqHandler,
29 /* 0x000F */ CsrWifiRouterCtrlWifiOffResHandler, 29 /* 0x000E */ CsrWifiRouterCtrlWifiOffReqHandler,
30 /* 0x0010 */ CsrWifiRouterCtrlWifiOnReqHandler, 30 /* 0x000F */ CsrWifiRouterCtrlWifiOffResHandler,
31 /* 0x0011 */ CsrWifiRouterCtrlWifiOnResHandler, 31 /* 0x0010 */ CsrWifiRouterCtrlWifiOnReqHandler,
32 /* 0x0012 */ CsrWifiRouterCtrlM4TransmitReqHandler, 32 /* 0x0011 */ CsrWifiRouterCtrlWifiOnResHandler,
33 /* 0x0013 */ CsrWifiRouterCtrlModeSetReqHandler, 33 /* 0x0012 */ CsrWifiRouterCtrlM4TransmitReqHandler,
34 /* 0x0014 */ CsrWifiRouterCtrlPeerAddReqHandler, 34 /* 0x0013 */ CsrWifiRouterCtrlModeSetReqHandler,
35 /* 0x0015 */ CsrWifiRouterCtrlPeerDelReqHandler, 35 /* 0x0014 */ CsrWifiRouterCtrlPeerAddReqHandler,
36 /* 0x0016 */ CsrWifiRouterCtrlPeerUpdateReqHandler, 36 /* 0x0015 */ CsrWifiRouterCtrlPeerDelReqHandler,
37 /* 0x0017 */ CsrWifiRouterCtrlCapabilitiesReqHandler, 37 /* 0x0016 */ CsrWifiRouterCtrlPeerUpdateReqHandler,
38 /* 0x0018 */ CsrWifiRouterCtrlBlockAckEnableReqHandler, 38 /* 0x0017 */ CsrWifiRouterCtrlCapabilitiesReqHandler,
39 /* 0x0019 */ CsrWifiRouterCtrlBlockAckDisableReqHandler, 39 /* 0x0018 */ CsrWifiRouterCtrlBlockAckEnableReqHandler,
40 /* 0x001A */ CsrWifiRouterCtrlWapiRxPktReqHandler, 40 /* 0x0019 */ CsrWifiRouterCtrlBlockAckDisableReqHandler,
41 /* 0x001B */ CsrWifiRouterCtrlWapiMulticastFilterReqHandler, 41 /* 0x001A */ CsrWifiRouterCtrlWapiRxPktReqHandler,
42 /* 0x001C */ CsrWifiRouterCtrlWapiUnicastFilterReqHandler, 42 /* 0x001B */ CsrWifiRouterCtrlWapiMulticastFilterReqHandler,
43 /* 0x001D */ CsrWifiRouterCtrlWapiUnicastTxPktReqHandler, 43 /* 0x001C */ CsrWifiRouterCtrlWapiUnicastFilterReqHandler,
44 /* 0x001E */ CsrWifiRouterCtrlWapiFilterReqHandler, 44 /* 0x001D */ CsrWifiRouterCtrlWapiUnicastTxPktReqHandler,
45 /* 0x001E */ CsrWifiRouterCtrlWapiFilterReqHandler,
45}; 46};
diff --git a/drivers/staging/csr/csr_wifi_router_ctrl_sef.h b/drivers/staging/csr/csr_wifi_router_ctrl_sef.h
index e0ee5cf45f9e..2fb4937bc909 100644
--- a/drivers/staging/csr/csr_wifi_router_ctrl_sef.h
+++ b/drivers/staging/csr/csr_wifi_router_ctrl_sef.h
@@ -12,10 +12,6 @@
12 12
13#include "csr_wifi_router_ctrl_prim.h" 13#include "csr_wifi_router_ctrl_prim.h"
14 14
15#ifdef __cplusplus
16extern "C" {
17#endif
18
19 typedef void (*CsrWifiRouterCtrlStateHandlerType)(void* drvpriv, CsrWifiFsmEvent* msg); 15 typedef void (*CsrWifiRouterCtrlStateHandlerType)(void* drvpriv, CsrWifiFsmEvent* msg);
20 16
21 extern const CsrWifiRouterCtrlStateHandlerType CsrWifiRouterCtrlDownstreamStateHandlers[CSR_WIFI_ROUTER_CTRL_PRIM_DOWNSTREAM_COUNT]; 17 extern const CsrWifiRouterCtrlStateHandlerType CsrWifiRouterCtrlDownstreamStateHandlers[CSR_WIFI_ROUTER_CTRL_PRIM_DOWNSTREAM_COUNT];
@@ -51,8 +47,5 @@ extern "C" {
51 extern void CsrWifiRouterCtrlWapiUnicastTxPktReqHandler(void* drvpriv, CsrWifiFsmEvent* msg); 47 extern void CsrWifiRouterCtrlWapiUnicastTxPktReqHandler(void* drvpriv, CsrWifiFsmEvent* msg);
52 extern void CsrWifiRouterCtrlWapiUnicastFilterReqHandler(void* drvpriv, CsrWifiFsmEvent* msg); 48 extern void CsrWifiRouterCtrlWapiUnicastFilterReqHandler(void* drvpriv, CsrWifiFsmEvent* msg);
53 extern void CsrWifiRouterCtrlWapiFilterReqHandler(void* drvpriv, CsrWifiFsmEvent* msg); 49 extern void CsrWifiRouterCtrlWapiFilterReqHandler(void* drvpriv, CsrWifiFsmEvent* msg);
54#ifdef __cplusplus
55}
56#endif
57 50
58#endif /* CSR_WIFI_ROUTER_SEF_CSR_WIFI_ROUTER_CTRL_H__ */ 51#endif /* CSR_WIFI_ROUTER_SEF_CSR_WIFI_ROUTER_CTRL_H__ */
diff --git a/drivers/staging/csr/csr_wifi_router_ctrl_serialize.h b/drivers/staging/csr/csr_wifi_router_ctrl_serialize.h
index 2c2a229f4bf1..c9048386cfcb 100644
--- a/drivers/staging/csr/csr_wifi_router_ctrl_serialize.h
+++ b/drivers/staging/csr/csr_wifi_router_ctrl_serialize.h
@@ -17,10 +17,6 @@
17 17
18#include "csr_wifi_router_ctrl_prim.h" 18#include "csr_wifi_router_ctrl_prim.h"
19 19
20#ifdef __cplusplus
21extern "C" {
22#endif
23
24extern void CsrWifiRouterCtrlPfree(void *ptr); 20extern void CsrWifiRouterCtrlPfree(void *ptr);
25 21
26extern u8* CsrWifiRouterCtrlConfigurePowerModeReqSer(u8 *ptr, size_t *len, void *msg); 22extern u8* CsrWifiRouterCtrlConfigurePowerModeReqSer(u8 *ptr, size_t *len, void *msg);
@@ -333,9 +329,5 @@ extern void* CsrWifiRouterCtrlWapiUnicastTxEncryptIndDes(u8 *buffer, size_t len)
333extern size_t CsrWifiRouterCtrlWapiUnicastTxEncryptIndSizeof(void *msg); 329extern size_t CsrWifiRouterCtrlWapiUnicastTxEncryptIndSizeof(void *msg);
334extern void CsrWifiRouterCtrlWapiUnicastTxEncryptIndSerFree(void *msg); 330extern void CsrWifiRouterCtrlWapiUnicastTxEncryptIndSerFree(void *msg);
335 331
336
337#ifdef __cplusplus
338}
339#endif
340#endif /* CSR_WIFI_ROUTER_CTRL_SERIALIZE_H__ */ 332#endif /* CSR_WIFI_ROUTER_CTRL_SERIALIZE_H__ */
341 333
diff --git a/drivers/staging/csr/csr_wifi_router_free_upstream_contents.c b/drivers/staging/csr/csr_wifi_router_free_upstream_contents.c
index de1086d7158d..4cd126338e27 100644
--- a/drivers/staging/csr/csr_wifi_router_free_upstream_contents.c
+++ b/drivers/staging/csr/csr_wifi_router_free_upstream_contents.c
@@ -1,10 +1,10 @@
1/***************************************************************************** 1/*****************************************************************************
2 2
3 (c) Cambridge Silicon Radio Limited 2011 3 (c) Cambridge Silicon Radio Limited 2011
4 All rights reserved and confidential information of CSR 4 All rights reserved and confidential information of CSR
5 5
6 Refer to LICENSE.txt included with this source for details 6 Refer to LICENSE.txt included with this source for details
7 on the license terms. 7 on the license terms.
8 8
9*****************************************************************************/ 9*****************************************************************************/
10 10
@@ -26,28 +26,22 @@
26 *----------------------------------------------------------------------------*/ 26 *----------------------------------------------------------------------------*/
27void CsrWifiRouterFreeUpstreamMessageContents(u16 eventClass, void *message) 27void CsrWifiRouterFreeUpstreamMessageContents(u16 eventClass, void *message)
28{ 28{
29 if (eventClass != CSR_WIFI_ROUTER_PRIM) 29 if (eventClass != CSR_WIFI_ROUTER_PRIM)
30 { 30 return;
31 return; 31 if (NULL == message)
32 } 32 return;
33 if (NULL == message) 33 switch (*((CsrWifiRouterPrim *) message)) {
34 { 34 case CSR_WIFI_ROUTER_MA_PACKET_IND:
35 return; 35 {
36 } 36 CsrWifiRouterMaPacketInd *p =
37 37 (CsrWifiRouterMaPacketInd *) message;
38 switch (*((CsrWifiRouterPrim *) message)) 38 kfree(p->frame);
39 { 39 p->frame = NULL;
40 case CSR_WIFI_ROUTER_MA_PACKET_IND: 40 break;
41 { 41 }
42 CsrWifiRouterMaPacketInd *p = (CsrWifiRouterMaPacketInd *)message; 42 default:
43 kfree(p->frame); 43 break;
44 p->frame = NULL; 44 }
45 break;
46 }
47
48 default:
49 break;
50 }
51} 45}
52 46
53 47
diff --git a/drivers/staging/csr/csr_wifi_router_lib.h b/drivers/staging/csr/csr_wifi_router_lib.h
index 06a2214714b7..b0477c413aae 100644
--- a/drivers/staging/csr/csr_wifi_router_lib.h
+++ b/drivers/staging/csr/csr_wifi_router_lib.h
@@ -22,11 +22,6 @@
22#include "csr_wifi_router_prim.h" 22#include "csr_wifi_router_prim.h"
23#include "csr_wifi_router_task.h" 23#include "csr_wifi_router_task.h"
24 24
25
26#ifdef __cplusplus
27extern "C" {
28#endif
29
30/*----------------------------------------------------------------------------* 25/*----------------------------------------------------------------------------*
31 * CsrWifiRouterFreeUpstreamMessageContents 26 * CsrWifiRouterFreeUpstreamMessageContents
32 * 27 *
@@ -419,9 +414,4 @@ extern const char *CsrWifiRouterDownstreamPrimNames[CSR_WIFI_ROUTER_PRIM_DOWNSTR
419#define CsrWifiRouterMaPacketUnsubscribeCfmSend(dst__, interfaceTag__, status__) \ 414#define CsrWifiRouterMaPacketUnsubscribeCfmSend(dst__, interfaceTag__, status__) \
420 CsrWifiRouterMaPacketUnsubscribeCfmSendTo(dst__, CSR_WIFI_ROUTER_IFACEQUEUE, interfaceTag__, status__) 415 CsrWifiRouterMaPacketUnsubscribeCfmSendTo(dst__, CSR_WIFI_ROUTER_IFACEQUEUE, interfaceTag__, status__)
421 416
422
423#ifdef __cplusplus
424}
425#endif
426
427#endif /* CSR_WIFI_ROUTER_LIB_H__ */ 417#endif /* CSR_WIFI_ROUTER_LIB_H__ */
diff --git a/drivers/staging/csr/csr_wifi_router_prim.h b/drivers/staging/csr/csr_wifi_router_prim.h
index c61486fbb6d6..c52344b51f2f 100644
--- a/drivers/staging/csr/csr_wifi_router_prim.h
+++ b/drivers/staging/csr/csr_wifi_router_prim.h
@@ -20,10 +20,6 @@
20#include "csr_result.h" 20#include "csr_result.h"
21#include "csr_wifi_fsm_event.h" 21#include "csr_wifi_fsm_event.h"
22 22
23#ifdef __cplusplus
24extern "C" {
25#endif
26
27#define CSR_WIFI_ROUTER_PRIM (0x0400) 23#define CSR_WIFI_ROUTER_PRIM (0x0400)
28 24
29typedef CsrPrim CsrWifiRouterPrim; 25typedef CsrPrim CsrWifiRouterPrim;
@@ -421,10 +417,5 @@ typedef struct
421 u16 rate; 417 u16 rate;
422} CsrWifiRouterMaPacketInd; 418} CsrWifiRouterMaPacketInd;
423 419
424
425#ifdef __cplusplus
426}
427#endif
428
429#endif /* CSR_WIFI_ROUTER_PRIM_H__ */ 420#endif /* CSR_WIFI_ROUTER_PRIM_H__ */
430 421
diff --git a/drivers/staging/csr/csr_wifi_router_sef.h b/drivers/staging/csr/csr_wifi_router_sef.h
index 49dd158fa98d..86692c7780c9 100644
--- a/drivers/staging/csr/csr_wifi_router_sef.h
+++ b/drivers/staging/csr/csr_wifi_router_sef.h
@@ -12,10 +12,6 @@
12 12
13#include "csr_wifi_router_prim.h" 13#include "csr_wifi_router_prim.h"
14 14
15#ifdef __cplusplus
16extern "C" {
17#endif
18
19 typedef void (*CsrWifiRouterStateHandlerType)(void* drvpriv, CsrWifiFsmEvent* msg); 15 typedef void (*CsrWifiRouterStateHandlerType)(void* drvpriv, CsrWifiFsmEvent* msg);
20 16
21 extern const CsrWifiRouterStateHandlerType CsrWifiRouterDownstreamStateHandlers[CSR_WIFI_ROUTER_PRIM_DOWNSTREAM_COUNT]; 17 extern const CsrWifiRouterStateHandlerType CsrWifiRouterDownstreamStateHandlers[CSR_WIFI_ROUTER_PRIM_DOWNSTREAM_COUNT];
@@ -26,8 +22,4 @@ extern "C" {
26 extern void CsrWifiRouterMaPacketResHandler(void* drvpriv, CsrWifiFsmEvent* msg); 22 extern void CsrWifiRouterMaPacketResHandler(void* drvpriv, CsrWifiFsmEvent* msg);
27 extern void CsrWifiRouterMaPacketCancelReqHandler(void* drvpriv, CsrWifiFsmEvent* msg); 23 extern void CsrWifiRouterMaPacketCancelReqHandler(void* drvpriv, CsrWifiFsmEvent* msg);
28 24
29#ifdef __cplusplus
30}
31#endif
32
33#endif /* CSR_WIFI_ROUTER_SEF_CSR_WIFI_ROUTER_H__ */ 25#endif /* CSR_WIFI_ROUTER_SEF_CSR_WIFI_ROUTER_H__ */
diff --git a/drivers/staging/csr/csr_wifi_router_serialize.h b/drivers/staging/csr/csr_wifi_router_serialize.h
index 07e21b2b4363..94ccdac5606f 100644
--- a/drivers/staging/csr/csr_wifi_router_serialize.h
+++ b/drivers/staging/csr/csr_wifi_router_serialize.h
@@ -16,10 +16,6 @@
16#include "csr_wifi_msgconv.h" 16#include "csr_wifi_msgconv.h"
17#include "csr_wifi_router_prim.h" 17#include "csr_wifi_router_prim.h"
18 18
19#ifdef __cplusplus
20extern "C" {
21#endif
22
23extern void CsrWifiRouterPfree(void *ptr); 19extern void CsrWifiRouterPfree(void *ptr);
24 20
25extern u8* CsrWifiRouterMaPacketSubscribeReqSer(u8 *ptr, size_t *len, void *msg); 21extern u8* CsrWifiRouterMaPacketSubscribeReqSer(u8 *ptr, size_t *len, void *msg);
@@ -67,9 +63,5 @@ extern void* CsrWifiRouterMaPacketIndDes(u8 *buffer, size_t len);
67extern size_t CsrWifiRouterMaPacketIndSizeof(void *msg); 63extern size_t CsrWifiRouterMaPacketIndSizeof(void *msg);
68extern void CsrWifiRouterMaPacketIndSerFree(void *msg); 64extern void CsrWifiRouterMaPacketIndSerFree(void *msg);
69 65
70
71#ifdef __cplusplus
72}
73#endif
74#endif /* CSR_WIFI_ROUTER_SERIALIZE_H__ */ 66#endif /* CSR_WIFI_ROUTER_SERIALIZE_H__ */
75 67
diff --git a/drivers/staging/csr/csr_wifi_router_task.h b/drivers/staging/csr/csr_wifi_router_task.h
index 4e51fae4cda0..9ba892f34e6d 100644
--- a/drivers/staging/csr/csr_wifi_router_task.h
+++ b/drivers/staging/csr/csr_wifi_router_task.h
@@ -15,19 +15,11 @@
15 15
16#include "csr_sched.h" 16#include "csr_sched.h"
17 17
18#ifdef __cplusplus
19extern "C" {
20#endif
21
22#define CSR_WIFI_ROUTER_LOG_ID 0x1201FFFF 18#define CSR_WIFI_ROUTER_LOG_ID 0x1201FFFF
23extern CsrSchedQid CSR_WIFI_ROUTER_IFACEQUEUE; 19extern CsrSchedQid CSR_WIFI_ROUTER_IFACEQUEUE;
24void CsrWifiRouterInit(void **gash); 20void CsrWifiRouterInit(void **gash);
25void CsrWifiRouterDeinit(void **gash); 21void CsrWifiRouterDeinit(void **gash);
26void CsrWifiRouterHandler(void **gash); 22void CsrWifiRouterHandler(void **gash);
27 23
28#ifdef __cplusplus
29}
30#endif
31
32#endif /* CSR_WIFI_ROUTER_TASK_H__ */ 24#endif /* CSR_WIFI_ROUTER_TASK_H__ */
33 25
diff --git a/drivers/staging/csr/csr_wifi_sme_ap_lib.h b/drivers/staging/csr/csr_wifi_sme_ap_lib.h
index 350cb9ec3012..48ea9143f591 100644
--- a/drivers/staging/csr/csr_wifi_sme_ap_lib.h
+++ b/drivers/staging/csr/csr_wifi_sme_ap_lib.h
@@ -22,11 +22,6 @@
22#include "csr_wifi_sme_ap_prim.h" 22#include "csr_wifi_sme_ap_prim.h"
23#include "csr_wifi_sme_task.h" 23#include "csr_wifi_sme_task.h"
24 24
25
26#ifdef __cplusplus
27extern "C" {
28#endif
29
30#ifndef CSR_WIFI_AP_ENABLE 25#ifndef CSR_WIFI_AP_ENABLE
31#error CSR_WIFI_AP_ENABLE MUST be defined inorder to use csr_wifi_sme_ap_lib.h 26#error CSR_WIFI_AP_ENABLE MUST be defined inorder to use csr_wifi_sme_ap_lib.h
32#endif 27#endif
@@ -776,8 +771,4 @@ extern const char *CsrWifiSmeApDownstreamPrimNames[CSR_WIFI_SME_AP_PRIM_DOWNSTRE
776 CsrWifiSmeApWpsRegistrationStartedCfmSendTo(dst__, CSR_WIFI_SME_IFACEQUEUE, interfaceTag__, status__) 771 CsrWifiSmeApWpsRegistrationStartedCfmSendTo(dst__, CSR_WIFI_SME_IFACEQUEUE, interfaceTag__, status__)
777 772
778 773
779#ifdef __cplusplus
780}
781#endif
782
783#endif /* CSR_WIFI_SME_AP_LIB_H__ */ 774#endif /* CSR_WIFI_SME_AP_LIB_H__ */
diff --git a/drivers/staging/csr/csr_wifi_sme_ap_prim.h b/drivers/staging/csr/csr_wifi_sme_ap_prim.h
index 93b64e9154c8..3c4bcbc16126 100644
--- a/drivers/staging/csr/csr_wifi_sme_ap_prim.h
+++ b/drivers/staging/csr/csr_wifi_sme_ap_prim.h
@@ -20,10 +20,6 @@
20#include "csr_wifi_fsm_event.h" 20#include "csr_wifi_fsm_event.h"
21#include "csr_wifi_sme_prim.h" 21#include "csr_wifi_sme_prim.h"
22 22
23#ifdef __cplusplus
24extern "C" {
25#endif
26
27#ifndef CSR_WIFI_AP_ENABLE 23#ifndef CSR_WIFI_AP_ENABLE
28#error CSR_WIFI_AP_ENABLE MUST be defined inorder to use csr_wifi_sme_ap_prim.h 24#error CSR_WIFI_AP_ENABLE MUST be defined inorder to use csr_wifi_sme_ap_prim.h
29#endif 25#endif
@@ -1030,9 +1026,5 @@ typedef struct
1030} CsrWifiSmeApBaDeleteCfm; 1026} CsrWifiSmeApBaDeleteCfm;
1031 1027
1032 1028
1033#ifdef __cplusplus
1034}
1035#endif
1036
1037#endif /* CSR_WIFI_SME_AP_PRIM_H__ */ 1029#endif /* CSR_WIFI_SME_AP_PRIM_H__ */
1038 1030
diff --git a/drivers/staging/csr/csr_wifi_sme_converter_init.h b/drivers/staging/csr/csr_wifi_sme_converter_init.h
index fb895dec7688..ba5e4b44bb6b 100644
--- a/drivers/staging/csr/csr_wifi_sme_converter_init.h
+++ b/drivers/staging/csr/csr_wifi_sme_converter_init.h
@@ -13,10 +13,6 @@
13#ifndef CSR_WIFI_SME_CONVERTER_INIT_H__ 13#ifndef CSR_WIFI_SME_CONVERTER_INIT_H__
14#define CSR_WIFI_SME_CONVERTER_INIT_H__ 14#define CSR_WIFI_SME_CONVERTER_INIT_H__
15 15
16#ifdef __cplusplus
17extern "C" {
18#endif
19
20#ifndef EXCLUDE_CSR_WIFI_SME_MODULE 16#ifndef EXCLUDE_CSR_WIFI_SME_MODULE
21 17
22#include "csr_msgconv.h" 18#include "csr_msgconv.h"
@@ -35,8 +31,4 @@ extern void CsrWifiSmeConverterInit(void);
35 31
36#endif /* EXCLUDE_CSR_WIFI_SME_MODULE */ 32#endif /* EXCLUDE_CSR_WIFI_SME_MODULE */
37 33
38#ifdef __cplusplus
39}
40#endif
41
42#endif /* CSR_WIFI_SME_CONVERTER_INIT_H__ */ 34#endif /* CSR_WIFI_SME_CONVERTER_INIT_H__ */
diff --git a/drivers/staging/csr/csr_wifi_sme_lib.h b/drivers/staging/csr/csr_wifi_sme_lib.h
index 3ca745608252..53cf1268286e 100644
--- a/drivers/staging/csr/csr_wifi_sme_lib.h
+++ b/drivers/staging/csr/csr_wifi_sme_lib.h
@@ -32,11 +32,6 @@
32# endif 32# endif
33#endif 33#endif
34 34
35
36#ifdef __cplusplus
37extern "C" {
38#endif
39
40/*----------------------------------------------------------------------------* 35/*----------------------------------------------------------------------------*
41 * CsrWifiSmeFreeUpstreamMessageContents 36 * CsrWifiSmeFreeUpstreamMessageContents
42 * 37 *
@@ -4305,9 +4300,4 @@ extern const char *CsrWifiSmeDownstreamPrimNames[CSR_WIFI_SME_PRIM_DOWNSTREAM_CO
4305#define CsrWifiSmeWpsConfigurationCfmSend(dst__, status__) \ 4300#define CsrWifiSmeWpsConfigurationCfmSend(dst__, status__) \
4306 CsrWifiSmeWpsConfigurationCfmSendTo(dst__, CSR_WIFI_SME_IFACEQUEUE, status__) 4301 CsrWifiSmeWpsConfigurationCfmSendTo(dst__, CSR_WIFI_SME_IFACEQUEUE, status__)
4307 4302
4308
4309#ifdef __cplusplus
4310}
4311#endif
4312
4313#endif /* CSR_WIFI_SME_LIB_H__ */ 4303#endif /* CSR_WIFI_SME_LIB_H__ */
diff --git a/drivers/staging/csr/csr_wifi_sme_prim.h b/drivers/staging/csr/csr_wifi_sme_prim.h
index 55cac5059bf7..17ec79c77e54 100644
--- a/drivers/staging/csr/csr_wifi_sme_prim.h
+++ b/drivers/staging/csr/csr_wifi_sme_prim.h
@@ -20,10 +20,6 @@
20#include "csr_result.h" 20#include "csr_result.h"
21#include "csr_wifi_fsm_event.h" 21#include "csr_wifi_fsm_event.h"
22 22
23#ifdef __cplusplus
24extern "C" {
25#endif
26
27#define CSR_WIFI_SME_PRIM (0x0404) 23#define CSR_WIFI_SME_PRIM (0x0404)
28 24
29typedef CsrPrim CsrWifiSmePrim; 25typedef CsrPrim CsrWifiSmePrim;
@@ -6510,10 +6506,5 @@ typedef struct
6510 CsrResult status; 6506 CsrResult status;
6511} CsrWifiSmeWpsConfigurationCfm; 6507} CsrWifiSmeWpsConfigurationCfm;
6512 6508
6513
6514#ifdef __cplusplus
6515}
6516#endif
6517
6518#endif /* CSR_WIFI_SME_PRIM_H__ */ 6509#endif /* CSR_WIFI_SME_PRIM_H__ */
6519 6510
diff --git a/drivers/staging/csr/csr_wifi_sme_sef.h b/drivers/staging/csr/csr_wifi_sme_sef.h
index c8741811b2e4..78b88c067236 100644
--- a/drivers/staging/csr/csr_wifi_sme_sef.h
+++ b/drivers/staging/csr/csr_wifi_sme_sef.h
@@ -1,10 +1,10 @@
1/***************************************************************************** 1/*****************************************************************************
2 2
3 (c) Cambridge Silicon Radio Limited 2010 3 (c) Cambridge Silicon Radio Limited 2010
4 Confidential information of CSR 4 Confidential information of CSR
5 5
6 Refer to LICENSE.txt included with this source for details 6 Refer to LICENSE.txt included with this source for details
7 on the license terms. 7 on the license terms.
8 8
9*****************************************************************************/ 9*****************************************************************************/
10#ifndef CSR_WIFI_ROUTER_SEF_CSR_WIFI_SME_H__ 10#ifndef CSR_WIFI_ROUTER_SEF_CSR_WIFI_SME_H__
@@ -12,90 +12,131 @@
12 12
13#include "csr_wifi_sme_prim.h" 13#include "csr_wifi_sme_prim.h"
14 14
15typedef void (*CsrWifiSmeStateHandlerType)(void *drvpriv, CsrWifiFsmEvent *msg);
15 16
16#ifdef __cplusplus 17extern const CsrWifiSmeStateHandlerType
17extern "C" { 18 CsrWifiSmeUpstreamStateHandlers[CSR_WIFI_SME_PRIM_UPSTREAM_COUNT];
18#endif
19 19
20typedef void (*CsrWifiSmeStateHandlerType)(void* drvpriv, CsrWifiFsmEvent* msg);
21 20
22extern const CsrWifiSmeStateHandlerType CsrWifiSmeUpstreamStateHandlers[CSR_WIFI_SME_PRIM_UPSTREAM_COUNT]; 21extern void CsrWifiSmeActivateCfmHandler(void *drvpriv, CsrWifiFsmEvent *msg);
23 22extern void CsrWifiSmeAdhocConfigGetCfmHandler(void *drvpriv,
24 23 CsrWifiFsmEvent *msg);
25extern void CsrWifiSmeActivateCfmHandler(void* drvpriv, CsrWifiFsmEvent* msg); 24extern void CsrWifiSmeAdhocConfigSetCfmHandler(void *drvpriv,
26extern void CsrWifiSmeAdhocConfigGetCfmHandler(void* drvpriv, CsrWifiFsmEvent* msg); 25 CsrWifiFsmEvent *msg);
27extern void CsrWifiSmeAdhocConfigSetCfmHandler(void* drvpriv, CsrWifiFsmEvent* msg); 26extern void CsrWifiSmeAssociationCompleteIndHandler(void *drvpriv,
28extern void CsrWifiSmeAssociationCompleteIndHandler(void* drvpriv, CsrWifiFsmEvent* msg); 27 CsrWifiFsmEvent *msg);
29extern void CsrWifiSmeAssociationStartIndHandler(void* drvpriv, CsrWifiFsmEvent* msg); 28extern void CsrWifiSmeAssociationStartIndHandler(void *drvpriv,
30extern void CsrWifiSmeBlacklistCfmHandler(void* drvpriv, CsrWifiFsmEvent* msg); 29 CsrWifiFsmEvent *msg);
31extern void CsrWifiSmeCalibrationDataGetCfmHandler(void* drvpriv, CsrWifiFsmEvent* msg); 30extern void CsrWifiSmeBlacklistCfmHandler(void *drvpriv,
32extern void CsrWifiSmeCalibrationDataSetCfmHandler(void* drvpriv, CsrWifiFsmEvent* msg); 31 CsrWifiFsmEvent *msg);
33extern void CsrWifiSmeCcxConfigGetCfmHandler(void* drvpriv, CsrWifiFsmEvent* msg); 32extern void CsrWifiSmeCalibrationDataGetCfmHandler(void *drvpriv,
34extern void CsrWifiSmeCcxConfigSetCfmHandler(void* drvpriv, CsrWifiFsmEvent* msg); 33 CsrWifiFsmEvent *msg);
35extern void CsrWifiSmeCoexConfigGetCfmHandler(void* drvpriv, CsrWifiFsmEvent* msg); 34extern void CsrWifiSmeCalibrationDataSetCfmHandler(void *drvpriv,
36extern void CsrWifiSmeCoexConfigSetCfmHandler(void* drvpriv, CsrWifiFsmEvent* msg); 35 CsrWifiFsmEvent *msg);
37extern void CsrWifiSmeCoexInfoGetCfmHandler(void* drvpriv, CsrWifiFsmEvent* msg); 36extern void CsrWifiSmeCcxConfigGetCfmHandler(void *drvpriv,
38extern void CsrWifiSmeConnectCfmHandler(void* drvpriv, CsrWifiFsmEvent* msg); 37 CsrWifiFsmEvent *msg);
39extern void CsrWifiSmeConnectionConfigGetCfmHandler(void* drvpriv, CsrWifiFsmEvent* msg); 38extern void CsrWifiSmeCcxConfigSetCfmHandler(void *drvpriv,
40extern void CsrWifiSmeConnectionInfoGetCfmHandler(void* drvpriv, CsrWifiFsmEvent* msg); 39 CsrWifiFsmEvent *msg);
41extern void CsrWifiSmeConnectionQualityIndHandler(void* drvpriv, CsrWifiFsmEvent* msg); 40extern void CsrWifiSmeCoexConfigGetCfmHandler(void *drvpriv,
42extern void CsrWifiSmeConnectionStatsGetCfmHandler(void* drvpriv, CsrWifiFsmEvent* msg); 41 CsrWifiFsmEvent *msg);
43extern void CsrWifiSmeDeactivateCfmHandler(void* drvpriv, CsrWifiFsmEvent* msg); 42extern void CsrWifiSmeCoexConfigSetCfmHandler(void *drvpriv,
44extern void CsrWifiSmeDisconnectCfmHandler(void* drvpriv, CsrWifiFsmEvent* msg); 43 CsrWifiFsmEvent *msg);
45extern void CsrWifiSmeEventMaskSetCfmHandler(void* drvpriv, CsrWifiFsmEvent* msg); 44extern void CsrWifiSmeCoexInfoGetCfmHandler(void *drvpriv,
46extern void CsrWifiSmeHostConfigGetCfmHandler(void* drvpriv, CsrWifiFsmEvent* msg); 45 CsrWifiFsmEvent *msg);
47extern void CsrWifiSmeHostConfigSetCfmHandler(void* drvpriv, CsrWifiFsmEvent* msg); 46extern void CsrWifiSmeConnectCfmHandler(void *drvpriv, CsrWifiFsmEvent *msg);
48extern void CsrWifiSmeIbssStationIndHandler(void* drvpriv, CsrWifiFsmEvent* msg); 47extern void CsrWifiSmeConnectionConfigGetCfmHandler(void *drvpriv,
49extern void CsrWifiSmeKeyCfmHandler(void* drvpriv, CsrWifiFsmEvent* msg); 48 CsrWifiFsmEvent *msg);
50extern void CsrWifiSmeLinkQualityGetCfmHandler(void* drvpriv, CsrWifiFsmEvent* msg); 49extern void CsrWifiSmeConnectionInfoGetCfmHandler(void *drvpriv,
51extern void CsrWifiSmeMediaStatusIndHandler(void* drvpriv, CsrWifiFsmEvent* msg); 50 CsrWifiFsmEvent *msg);
52extern void CsrWifiSmeMibConfigGetCfmHandler(void* drvpriv, CsrWifiFsmEvent* msg); 51extern void CsrWifiSmeConnectionQualityIndHandler(void *drvpriv,
53extern void CsrWifiSmeMibConfigSetCfmHandler(void* drvpriv, CsrWifiFsmEvent* msg); 52 CsrWifiFsmEvent *msg);
54extern void CsrWifiSmeMibGetCfmHandler(void* drvpriv, CsrWifiFsmEvent* msg); 53extern void CsrWifiSmeConnectionStatsGetCfmHandler(void *drvpriv,
55extern void CsrWifiSmeMibGetNextCfmHandler(void* drvpriv, CsrWifiFsmEvent* msg); 54 CsrWifiFsmEvent *msg);
56extern void CsrWifiSmeMibSetCfmHandler(void* drvpriv, CsrWifiFsmEvent* msg); 55extern void CsrWifiSmeDeactivateCfmHandler(void *drvpriv, CsrWifiFsmEvent *msg);
57extern void CsrWifiSmeMicFailureIndHandler(void* drvpriv, CsrWifiFsmEvent* msg); 56extern void CsrWifiSmeDisconnectCfmHandler(void *drvpriv, CsrWifiFsmEvent *msg);
58extern void CsrWifiSmeMulticastAddressCfmHandler(void* drvpriv, CsrWifiFsmEvent* msg); 57extern void CsrWifiSmeEventMaskSetCfmHandler(void *drvpriv,
59extern void CsrWifiSmePacketFilterSetCfmHandler(void* drvpriv, CsrWifiFsmEvent* msg); 58 CsrWifiFsmEvent *msg);
60extern void CsrWifiSmePermanentMacAddressGetCfmHandler(void* drvpriv, CsrWifiFsmEvent* msg); 59extern void CsrWifiSmeHostConfigGetCfmHandler(void *drvpriv,
61extern void CsrWifiSmePmkidCandidateListIndHandler(void* drvpriv, CsrWifiFsmEvent* msg); 60 CsrWifiFsmEvent *msg);
62extern void CsrWifiSmePmkidCfmHandler(void* drvpriv, CsrWifiFsmEvent* msg); 61extern void CsrWifiSmeHostConfigSetCfmHandler(void *drvpriv,
63extern void CsrWifiSmePowerConfigGetCfmHandler(void* drvpriv, CsrWifiFsmEvent* msg); 62 CsrWifiFsmEvent *msg);
64extern void CsrWifiSmePowerConfigSetCfmHandler(void* drvpriv, CsrWifiFsmEvent* msg); 63extern void CsrWifiSmeIbssStationIndHandler(void *drvpriv,
65extern void CsrWifiSmeRegulatoryDomainInfoGetCfmHandler(void* drvpriv, CsrWifiFsmEvent* msg); 64 CsrWifiFsmEvent *msg);
66extern void CsrWifiSmeRoamCompleteIndHandler(void* drvpriv, CsrWifiFsmEvent* msg); 65extern void CsrWifiSmeKeyCfmHandler(void *drvpriv, CsrWifiFsmEvent *msg);
67extern void CsrWifiSmeRoamStartIndHandler(void* drvpriv, CsrWifiFsmEvent* msg); 66extern void CsrWifiSmeLinkQualityGetCfmHandler(void *drvpriv,
68extern void CsrWifiSmeRoamingConfigGetCfmHandler(void* drvpriv, CsrWifiFsmEvent* msg); 67 CsrWifiFsmEvent *msg);
69extern void CsrWifiSmeRoamingConfigSetCfmHandler(void* drvpriv, CsrWifiFsmEvent* msg); 68extern void CsrWifiSmeMediaStatusIndHandler(void *drvpriv,
70extern void CsrWifiSmeScanConfigGetCfmHandler(void* drvpriv, CsrWifiFsmEvent* msg); 69 CsrWifiFsmEvent *msg);
71extern void CsrWifiSmeScanConfigSetCfmHandler(void* drvpriv, CsrWifiFsmEvent* msg); 70extern void CsrWifiSmeMibConfigGetCfmHandler(void *drvpriv,
72extern void CsrWifiSmeScanFullCfmHandler(void* drvpriv, CsrWifiFsmEvent* msg); 71 CsrWifiFsmEvent *msg);
73extern void CsrWifiSmeScanResultIndHandler(void* drvpriv, CsrWifiFsmEvent* msg); 72extern void CsrWifiSmeMibConfigSetCfmHandler(void *drvpriv,
74extern void CsrWifiSmeScanResultsFlushCfmHandler(void* drvpriv, CsrWifiFsmEvent* msg); 73 CsrWifiFsmEvent *msg);
75extern void CsrWifiSmeScanResultsGetCfmHandler(void* drvpriv, CsrWifiFsmEvent* msg); 74extern void CsrWifiSmeMibGetCfmHandler(void *drvpriv, CsrWifiFsmEvent *msg);
76extern void CsrWifiSmeSmeStaConfigGetCfmHandler(void* drvpriv, CsrWifiFsmEvent* msg); 75extern void CsrWifiSmeMibGetNextCfmHandler(void *drvpriv, CsrWifiFsmEvent *msg);
77extern void CsrWifiSmeSmeStaConfigSetCfmHandler(void* drvpriv, CsrWifiFsmEvent* msg); 76extern void CsrWifiSmeMibSetCfmHandler(void *drvpriv, CsrWifiFsmEvent *msg);
78extern void CsrWifiSmeStationMacAddressGetCfmHandler(void* drvpriv, CsrWifiFsmEvent* msg); 77extern void CsrWifiSmeMicFailureIndHandler(void *drvpriv, CsrWifiFsmEvent *msg);
79extern void CsrWifiSmeTspecIndHandler(void* drvpriv, CsrWifiFsmEvent* msg); 78extern void CsrWifiSmeMulticastAddressCfmHandler(void *drvpriv,
80extern void CsrWifiSmeTspecCfmHandler(void* drvpriv, CsrWifiFsmEvent* msg); 79 CsrWifiFsmEvent *msg);
81extern void CsrWifiSmeVersionsGetCfmHandler(void* drvpriv, CsrWifiFsmEvent* msg); 80extern void CsrWifiSmePacketFilterSetCfmHandler(void *drvpriv,
82extern void CsrWifiSmeWifiFlightmodeCfmHandler(void* drvpriv, CsrWifiFsmEvent* msg); 81 CsrWifiFsmEvent *msg);
83extern void CsrWifiSmeWifiOffIndHandler(void* drvpriv, CsrWifiFsmEvent* msg); 82extern void CsrWifiSmePermanentMacAddressGetCfmHandler(void *drvpriv,
84extern void CsrWifiSmeWifiOffCfmHandler(void* drvpriv, CsrWifiFsmEvent* msg); 83 CsrWifiFsmEvent *msg);
85extern void CsrWifiSmeWifiOnCfmHandler(void* drvpriv, CsrWifiFsmEvent* msg); 84extern void CsrWifiSmePmkidCandidateListIndHandler(void *drvpriv,
86extern void CsrWifiSmeCloakedSsidsSetCfmHandler(void* drvpriv, CsrWifiFsmEvent* msg); 85 CsrWifiFsmEvent *msg);
87extern void CsrWifiSmeCloakedSsidsGetCfmHandler(void* drvpriv, CsrWifiFsmEvent* msg); 86extern void CsrWifiSmePmkidCfmHandler(void *drvpriv, CsrWifiFsmEvent *msg);
88extern void CsrWifiSmeWifiOnIndHandler(void* drvpriv, CsrWifiFsmEvent* msg); 87extern void CsrWifiSmePowerConfigGetCfmHandler(void *drvpriv,
89extern void CsrWifiSmeSmeCommonConfigGetCfmHandler(void* drvpriv, CsrWifiFsmEvent* msg); 88 CsrWifiFsmEvent *msg);
90extern void CsrWifiSmeSmeCommonConfigSetCfmHandler(void* drvpriv, CsrWifiFsmEvent* msg); 89extern void CsrWifiSmePowerConfigSetCfmHandler(void *drvpriv,
91extern void CsrWifiSmeGetInterfaceCapabilityCfmHandler(void* drvpriv, CsrWifiFsmEvent* msg); 90 CsrWifiFsmEvent *msg);
92extern void CsrWifiSmeErrorIndHandler(void* drvpriv, CsrWifiFsmEvent* msg); 91extern void CsrWifiSmeRegulatoryDomainInfoGetCfmHandler(void *drvpriv,
93extern void CsrWifiSmeInfoIndHandler(void* drvpriv, CsrWifiFsmEvent* msg); 92 CsrWifiFsmEvent *msg);
94extern void CsrWifiSmeCoreDumpIndHandler(void* drvpriv, CsrWifiFsmEvent* msg); 93extern void CsrWifiSmeRoamCompleteIndHandler(void *drvpriv,
95extern void CsrWifiSmeAmpStatusChangeIndHandler(void* drvpriv, CsrWifiFsmEvent* msg); 94 CsrWifiFsmEvent *msg);
96 95extern void CsrWifiSmeRoamStartIndHandler(void *drvpriv, CsrWifiFsmEvent *msg);
97#ifdef __cplusplus 96extern void CsrWifiSmeRoamingConfigGetCfmHandler(void *drvpriv,
98} 97 CsrWifiFsmEvent *msg);
99#endif 98extern void CsrWifiSmeRoamingConfigSetCfmHandler(void *drvpriv,
99 CsrWifiFsmEvent *msg);
100extern void CsrWifiSmeScanConfigGetCfmHandler(void *drvpriv,
101 CsrWifiFsmEvent *msg);
102extern void CsrWifiSmeScanConfigSetCfmHandler(void *drvpriv,
103 CsrWifiFsmEvent *msg);
104extern void CsrWifiSmeScanFullCfmHandler(void *drvpriv, CsrWifiFsmEvent *msg);
105extern void CsrWifiSmeScanResultIndHandler(void *drvpriv, CsrWifiFsmEvent *msg);
106extern void CsrWifiSmeScanResultsFlushCfmHandler(void *drvpriv,
107 CsrWifiFsmEvent *msg);
108extern void CsrWifiSmeScanResultsGetCfmHandler(void *drvpriv,
109 CsrWifiFsmEvent *msg);
110extern void CsrWifiSmeSmeStaConfigGetCfmHandler(void *drvpriv,
111 CsrWifiFsmEvent *msg);
112extern void CsrWifiSmeSmeStaConfigSetCfmHandler(void *drvpriv,
113 CsrWifiFsmEvent *msg);
114extern void CsrWifiSmeStationMacAddressGetCfmHandler(void *drvpriv,
115 CsrWifiFsmEvent *msg);
116extern void CsrWifiSmeTspecIndHandler(void *drvpriv, CsrWifiFsmEvent *msg);
117extern void CsrWifiSmeTspecCfmHandler(void *drvpriv, CsrWifiFsmEvent *msg);
118extern void CsrWifiSmeVersionsGetCfmHandler(void *drvpriv,
119 CsrWifiFsmEvent *msg);
120extern void CsrWifiSmeWifiFlightmodeCfmHandler(void *drvpriv,
121 CsrWifiFsmEvent *msg);
122extern void CsrWifiSmeWifiOffIndHandler(void *drvpriv, CsrWifiFsmEvent *msg);
123extern void CsrWifiSmeWifiOffCfmHandler(void *drvpriv, CsrWifiFsmEvent *msg);
124extern void CsrWifiSmeWifiOnCfmHandler(void *drvpriv, CsrWifiFsmEvent *msg);
125extern void CsrWifiSmeCloakedSsidsSetCfmHandler(void *drvpriv,
126 CsrWifiFsmEvent *msg);
127extern void CsrWifiSmeCloakedSsidsGetCfmHandler(void *drvpriv,
128 CsrWifiFsmEvent *msg);
129extern void CsrWifiSmeWifiOnIndHandler(void *drvpriv, CsrWifiFsmEvent *msg);
130extern void CsrWifiSmeSmeCommonConfigGetCfmHandler(void *drvpriv,
131 CsrWifiFsmEvent *msg);
132extern void CsrWifiSmeSmeCommonConfigSetCfmHandler(void *drvpriv,
133 CsrWifiFsmEvent *msg);
134extern void CsrWifiSmeGetInterfaceCapabilityCfmHandler(void *drvpriv,
135 CsrWifiFsmEvent *msg);
136extern void CsrWifiSmeErrorIndHandler(void *drvpriv, CsrWifiFsmEvent *msg);
137extern void CsrWifiSmeInfoIndHandler(void *drvpriv, CsrWifiFsmEvent *msg);
138extern void CsrWifiSmeCoreDumpIndHandler(void *drvpriv, CsrWifiFsmEvent *msg);
139extern void CsrWifiSmeAmpStatusChangeIndHandler(void *drvpriv,
140 CsrWifiFsmEvent *msg);
100 141
101#endif /* CSR_WIFI_ROUTER_SEF_CSR_WIFI_SME_H__ */ 142#endif /* CSR_WIFI_ROUTER_SEF_CSR_WIFI_SME_H__ */
diff --git a/drivers/staging/csr/csr_wifi_sme_serialize.h b/drivers/staging/csr/csr_wifi_sme_serialize.h
index 4f3af0a6be7c..f8526269b203 100644
--- a/drivers/staging/csr/csr_wifi_sme_serialize.h
+++ b/drivers/staging/csr/csr_wifi_sme_serialize.h
@@ -1,10 +1,10 @@
1/***************************************************************************** 1/*****************************************************************************
2 2
3 (c) Cambridge Silicon Radio Limited 2012 3 (c) Cambridge Silicon Radio Limited 2012
4 All rights reserved and confidential information of CSR 4 All rights reserved and confidential information of CSR
5 5
6 Refer to LICENSE.txt included with this source for details 6 Refer to LICENSE.txt included with this source for details
7 on the license terms. 7 on the license terms.
8 8
9*****************************************************************************/ 9*****************************************************************************/
10 10
@@ -16,10 +16,6 @@
16#include "csr_wifi_msgconv.h" 16#include "csr_wifi_msgconv.h"
17#include "csr_wifi_sme_prim.h" 17#include "csr_wifi_sme_prim.h"
18 18
19#ifdef __cplusplus
20extern "C" {
21#endif
22
23extern void CsrWifiSmePfree(void *ptr); 19extern void CsrWifiSmePfree(void *ptr);
24 20
25#define CsrWifiSmeActivateReqSer CsrWifiEventSer 21#define CsrWifiSmeActivateReqSer CsrWifiEventSer
@@ -32,13 +28,13 @@ extern void CsrWifiSmePfree(void *ptr);
32#define CsrWifiSmeAdhocConfigGetReqSizeof CsrWifiEventSizeof 28#define CsrWifiSmeAdhocConfigGetReqSizeof CsrWifiEventSizeof
33#define CsrWifiSmeAdhocConfigGetReqSerFree CsrWifiSmePfree 29#define CsrWifiSmeAdhocConfigGetReqSerFree CsrWifiSmePfree
34 30
35extern u8* CsrWifiSmeAdhocConfigSetReqSer(u8 *ptr, size_t *len, void *msg); 31extern u8 *CsrWifiSmeAdhocConfigSetReqSer(u8 *ptr, size_t *len, void *msg);
36extern void* CsrWifiSmeAdhocConfigSetReqDes(u8 *buffer, size_t len); 32extern void *CsrWifiSmeAdhocConfigSetReqDes(u8 *buffer, size_t len);
37extern size_t CsrWifiSmeAdhocConfigSetReqSizeof(void *msg); 33extern size_t CsrWifiSmeAdhocConfigSetReqSizeof(void *msg);
38#define CsrWifiSmeAdhocConfigSetReqSerFree CsrWifiSmePfree 34#define CsrWifiSmeAdhocConfigSetReqSerFree CsrWifiSmePfree
39 35
40extern u8* CsrWifiSmeBlacklistReqSer(u8 *ptr, size_t *len, void *msg); 36extern u8 *CsrWifiSmeBlacklistReqSer(u8 *ptr, size_t *len, void *msg);
41extern void* CsrWifiSmeBlacklistReqDes(u8 *buffer, size_t len); 37extern void *CsrWifiSmeBlacklistReqDes(u8 *buffer, size_t len);
42extern size_t CsrWifiSmeBlacklistReqSizeof(void *msg); 38extern size_t CsrWifiSmeBlacklistReqSizeof(void *msg);
43extern void CsrWifiSmeBlacklistReqSerFree(void *msg); 39extern void CsrWifiSmeBlacklistReqSerFree(void *msg);
44 40
@@ -47,8 +43,8 @@ extern void CsrWifiSmeBlacklistReqSerFree(void *msg);
47#define CsrWifiSmeCalibrationDataGetReqSizeof CsrWifiEventSizeof 43#define CsrWifiSmeCalibrationDataGetReqSizeof CsrWifiEventSizeof
48#define CsrWifiSmeCalibrationDataGetReqSerFree CsrWifiSmePfree 44#define CsrWifiSmeCalibrationDataGetReqSerFree CsrWifiSmePfree
49 45
50extern u8* CsrWifiSmeCalibrationDataSetReqSer(u8 *ptr, size_t *len, void *msg); 46extern u8 *CsrWifiSmeCalibrationDataSetReqSer(u8 *ptr, size_t *len, void *msg);
51extern void* CsrWifiSmeCalibrationDataSetReqDes(u8 *buffer, size_t len); 47extern void *CsrWifiSmeCalibrationDataSetReqDes(u8 *buffer, size_t len);
52extern size_t CsrWifiSmeCalibrationDataSetReqSizeof(void *msg); 48extern size_t CsrWifiSmeCalibrationDataSetReqSizeof(void *msg);
53extern void CsrWifiSmeCalibrationDataSetReqSerFree(void *msg); 49extern void CsrWifiSmeCalibrationDataSetReqSerFree(void *msg);
54 50
@@ -57,8 +53,8 @@ extern void CsrWifiSmeCalibrationDataSetReqSerFree(void *msg);
57#define CsrWifiSmeCcxConfigGetReqSizeof CsrWifiEventCsrUint16Sizeof 53#define CsrWifiSmeCcxConfigGetReqSizeof CsrWifiEventCsrUint16Sizeof
58#define CsrWifiSmeCcxConfigGetReqSerFree CsrWifiSmePfree 54#define CsrWifiSmeCcxConfigGetReqSerFree CsrWifiSmePfree
59 55
60extern u8* CsrWifiSmeCcxConfigSetReqSer(u8 *ptr, size_t *len, void *msg); 56extern u8 *CsrWifiSmeCcxConfigSetReqSer(u8 *ptr, size_t *len, void *msg);
61extern void* CsrWifiSmeCcxConfigSetReqDes(u8 *buffer, size_t len); 57extern void *CsrWifiSmeCcxConfigSetReqDes(u8 *buffer, size_t len);
62extern size_t CsrWifiSmeCcxConfigSetReqSizeof(void *msg); 58extern size_t CsrWifiSmeCcxConfigSetReqSizeof(void *msg);
63#define CsrWifiSmeCcxConfigSetReqSerFree CsrWifiSmePfree 59#define CsrWifiSmeCcxConfigSetReqSerFree CsrWifiSmePfree
64 60
@@ -67,8 +63,8 @@ extern size_t CsrWifiSmeCcxConfigSetReqSizeof(void *msg);
67#define CsrWifiSmeCoexConfigGetReqSizeof CsrWifiEventSizeof 63#define CsrWifiSmeCoexConfigGetReqSizeof CsrWifiEventSizeof
68#define CsrWifiSmeCoexConfigGetReqSerFree CsrWifiSmePfree 64#define CsrWifiSmeCoexConfigGetReqSerFree CsrWifiSmePfree
69 65
70extern u8* CsrWifiSmeCoexConfigSetReqSer(u8 *ptr, size_t *len, void *msg); 66extern u8 *CsrWifiSmeCoexConfigSetReqSer(u8 *ptr, size_t *len, void *msg);
71extern void* CsrWifiSmeCoexConfigSetReqDes(u8 *buffer, size_t len); 67extern void *CsrWifiSmeCoexConfigSetReqDes(u8 *buffer, size_t len);
72extern size_t CsrWifiSmeCoexConfigSetReqSizeof(void *msg); 68extern size_t CsrWifiSmeCoexConfigSetReqSizeof(void *msg);
73#define CsrWifiSmeCoexConfigSetReqSerFree CsrWifiSmePfree 69#define CsrWifiSmeCoexConfigSetReqSerFree CsrWifiSmePfree
74 70
@@ -77,8 +73,8 @@ extern size_t CsrWifiSmeCoexConfigSetReqSizeof(void *msg);
77#define CsrWifiSmeCoexInfoGetReqSizeof CsrWifiEventSizeof 73#define CsrWifiSmeCoexInfoGetReqSizeof CsrWifiEventSizeof
78#define CsrWifiSmeCoexInfoGetReqSerFree CsrWifiSmePfree 74#define CsrWifiSmeCoexInfoGetReqSerFree CsrWifiSmePfree
79 75
80extern u8* CsrWifiSmeConnectReqSer(u8 *ptr, size_t *len, void *msg); 76extern u8 *CsrWifiSmeConnectReqSer(u8 *ptr, size_t *len, void *msg);
81extern void* CsrWifiSmeConnectReqDes(u8 *buffer, size_t len); 77extern void *CsrWifiSmeConnectReqDes(u8 *buffer, size_t len);
82extern size_t CsrWifiSmeConnectReqSizeof(void *msg); 78extern size_t CsrWifiSmeConnectReqSizeof(void *msg);
83extern void CsrWifiSmeConnectReqSerFree(void *msg); 79extern void CsrWifiSmeConnectReqSerFree(void *msg);
84 80
@@ -117,13 +113,13 @@ extern void CsrWifiSmeConnectReqSerFree(void *msg);
117#define CsrWifiSmeHostConfigGetReqSizeof CsrWifiEventCsrUint16Sizeof 113#define CsrWifiSmeHostConfigGetReqSizeof CsrWifiEventCsrUint16Sizeof
118#define CsrWifiSmeHostConfigGetReqSerFree CsrWifiSmePfree 114#define CsrWifiSmeHostConfigGetReqSerFree CsrWifiSmePfree
119 115
120extern u8* CsrWifiSmeHostConfigSetReqSer(u8 *ptr, size_t *len, void *msg); 116extern u8 *CsrWifiSmeHostConfigSetReqSer(u8 *ptr, size_t *len, void *msg);
121extern void* CsrWifiSmeHostConfigSetReqDes(u8 *buffer, size_t len); 117extern void *CsrWifiSmeHostConfigSetReqDes(u8 *buffer, size_t len);
122extern size_t CsrWifiSmeHostConfigSetReqSizeof(void *msg); 118extern size_t CsrWifiSmeHostConfigSetReqSizeof(void *msg);
123#define CsrWifiSmeHostConfigSetReqSerFree CsrWifiSmePfree 119#define CsrWifiSmeHostConfigSetReqSerFree CsrWifiSmePfree
124 120
125extern u8* CsrWifiSmeKeyReqSer(u8 *ptr, size_t *len, void *msg); 121extern u8 *CsrWifiSmeKeyReqSer(u8 *ptr, size_t *len, void *msg);
126extern void* CsrWifiSmeKeyReqDes(u8 *buffer, size_t len); 122extern void *CsrWifiSmeKeyReqDes(u8 *buffer, size_t len);
127extern size_t CsrWifiSmeKeyReqSizeof(void *msg); 123extern size_t CsrWifiSmeKeyReqSizeof(void *msg);
128#define CsrWifiSmeKeyReqSerFree CsrWifiSmePfree 124#define CsrWifiSmeKeyReqSerFree CsrWifiSmePfree
129 125
@@ -137,33 +133,33 @@ extern size_t CsrWifiSmeKeyReqSizeof(void *msg);
137#define CsrWifiSmeMibConfigGetReqSizeof CsrWifiEventSizeof 133#define CsrWifiSmeMibConfigGetReqSizeof CsrWifiEventSizeof
138#define CsrWifiSmeMibConfigGetReqSerFree CsrWifiSmePfree 134#define CsrWifiSmeMibConfigGetReqSerFree CsrWifiSmePfree
139 135
140extern u8* CsrWifiSmeMibConfigSetReqSer(u8 *ptr, size_t *len, void *msg); 136extern u8 *CsrWifiSmeMibConfigSetReqSer(u8 *ptr, size_t *len, void *msg);
141extern void* CsrWifiSmeMibConfigSetReqDes(u8 *buffer, size_t len); 137extern void *CsrWifiSmeMibConfigSetReqDes(u8 *buffer, size_t len);
142extern size_t CsrWifiSmeMibConfigSetReqSizeof(void *msg); 138extern size_t CsrWifiSmeMibConfigSetReqSizeof(void *msg);
143#define CsrWifiSmeMibConfigSetReqSerFree CsrWifiSmePfree 139#define CsrWifiSmeMibConfigSetReqSerFree CsrWifiSmePfree
144 140
145extern u8* CsrWifiSmeMibGetNextReqSer(u8 *ptr, size_t *len, void *msg); 141extern u8 *CsrWifiSmeMibGetNextReqSer(u8 *ptr, size_t *len, void *msg);
146extern void* CsrWifiSmeMibGetNextReqDes(u8 *buffer, size_t len); 142extern void *CsrWifiSmeMibGetNextReqDes(u8 *buffer, size_t len);
147extern size_t CsrWifiSmeMibGetNextReqSizeof(void *msg); 143extern size_t CsrWifiSmeMibGetNextReqSizeof(void *msg);
148extern void CsrWifiSmeMibGetNextReqSerFree(void *msg); 144extern void CsrWifiSmeMibGetNextReqSerFree(void *msg);
149 145
150extern u8* CsrWifiSmeMibGetReqSer(u8 *ptr, size_t *len, void *msg); 146extern u8 *CsrWifiSmeMibGetReqSer(u8 *ptr, size_t *len, void *msg);
151extern void* CsrWifiSmeMibGetReqDes(u8 *buffer, size_t len); 147extern void *CsrWifiSmeMibGetReqDes(u8 *buffer, size_t len);
152extern size_t CsrWifiSmeMibGetReqSizeof(void *msg); 148extern size_t CsrWifiSmeMibGetReqSizeof(void *msg);
153extern void CsrWifiSmeMibGetReqSerFree(void *msg); 149extern void CsrWifiSmeMibGetReqSerFree(void *msg);
154 150
155extern u8* CsrWifiSmeMibSetReqSer(u8 *ptr, size_t *len, void *msg); 151extern u8 *CsrWifiSmeMibSetReqSer(u8 *ptr, size_t *len, void *msg);
156extern void* CsrWifiSmeMibSetReqDes(u8 *buffer, size_t len); 152extern void *CsrWifiSmeMibSetReqDes(u8 *buffer, size_t len);
157extern size_t CsrWifiSmeMibSetReqSizeof(void *msg); 153extern size_t CsrWifiSmeMibSetReqSizeof(void *msg);
158extern void CsrWifiSmeMibSetReqSerFree(void *msg); 154extern void CsrWifiSmeMibSetReqSerFree(void *msg);
159 155
160extern u8* CsrWifiSmeMulticastAddressReqSer(u8 *ptr, size_t *len, void *msg); 156extern u8 *CsrWifiSmeMulticastAddressReqSer(u8 *ptr, size_t *len, void *msg);
161extern void* CsrWifiSmeMulticastAddressReqDes(u8 *buffer, size_t len); 157extern void *CsrWifiSmeMulticastAddressReqDes(u8 *buffer, size_t len);
162extern size_t CsrWifiSmeMulticastAddressReqSizeof(void *msg); 158extern size_t CsrWifiSmeMulticastAddressReqSizeof(void *msg);
163extern void CsrWifiSmeMulticastAddressReqSerFree(void *msg); 159extern void CsrWifiSmeMulticastAddressReqSerFree(void *msg);
164 160
165extern u8* CsrWifiSmePacketFilterSetReqSer(u8 *ptr, size_t *len, void *msg); 161extern u8 *CsrWifiSmePacketFilterSetReqSer(u8 *ptr, size_t *len, void *msg);
166extern void* CsrWifiSmePacketFilterSetReqDes(u8 *buffer, size_t len); 162extern void *CsrWifiSmePacketFilterSetReqDes(u8 *buffer, size_t len);
167extern size_t CsrWifiSmePacketFilterSetReqSizeof(void *msg); 163extern size_t CsrWifiSmePacketFilterSetReqSizeof(void *msg);
168extern void CsrWifiSmePacketFilterSetReqSerFree(void *msg); 164extern void CsrWifiSmePacketFilterSetReqSerFree(void *msg);
169 165
@@ -172,8 +168,8 @@ extern void CsrWifiSmePacketFilterSetReqSerFree(void *msg);
172#define CsrWifiSmePermanentMacAddressGetReqSizeof CsrWifiEventSizeof 168#define CsrWifiSmePermanentMacAddressGetReqSizeof CsrWifiEventSizeof
173#define CsrWifiSmePermanentMacAddressGetReqSerFree CsrWifiSmePfree 169#define CsrWifiSmePermanentMacAddressGetReqSerFree CsrWifiSmePfree
174 170
175extern u8* CsrWifiSmePmkidReqSer(u8 *ptr, size_t *len, void *msg); 171extern u8 *CsrWifiSmePmkidReqSer(u8 *ptr, size_t *len, void *msg);
176extern void* CsrWifiSmePmkidReqDes(u8 *buffer, size_t len); 172extern void *CsrWifiSmePmkidReqDes(u8 *buffer, size_t len);
177extern size_t CsrWifiSmePmkidReqSizeof(void *msg); 173extern size_t CsrWifiSmePmkidReqSizeof(void *msg);
178extern void CsrWifiSmePmkidReqSerFree(void *msg); 174extern void CsrWifiSmePmkidReqSerFree(void *msg);
179 175
@@ -182,8 +178,8 @@ extern void CsrWifiSmePmkidReqSerFree(void *msg);
182#define CsrWifiSmePowerConfigGetReqSizeof CsrWifiEventSizeof 178#define CsrWifiSmePowerConfigGetReqSizeof CsrWifiEventSizeof
183#define CsrWifiSmePowerConfigGetReqSerFree CsrWifiSmePfree 179#define CsrWifiSmePowerConfigGetReqSerFree CsrWifiSmePfree
184 180
185extern u8* CsrWifiSmePowerConfigSetReqSer(u8 *ptr, size_t *len, void *msg); 181extern u8 *CsrWifiSmePowerConfigSetReqSer(u8 *ptr, size_t *len, void *msg);
186extern void* CsrWifiSmePowerConfigSetReqDes(u8 *buffer, size_t len); 182extern void *CsrWifiSmePowerConfigSetReqDes(u8 *buffer, size_t len);
187extern size_t CsrWifiSmePowerConfigSetReqSizeof(void *msg); 183extern size_t CsrWifiSmePowerConfigSetReqSizeof(void *msg);
188#define CsrWifiSmePowerConfigSetReqSerFree CsrWifiSmePfree 184#define CsrWifiSmePowerConfigSetReqSerFree CsrWifiSmePfree
189 185
@@ -197,8 +193,8 @@ extern size_t CsrWifiSmePowerConfigSetReqSizeof(void *msg);
197#define CsrWifiSmeRoamingConfigGetReqSizeof CsrWifiEventCsrUint16Sizeof 193#define CsrWifiSmeRoamingConfigGetReqSizeof CsrWifiEventCsrUint16Sizeof
198#define CsrWifiSmeRoamingConfigGetReqSerFree CsrWifiSmePfree 194#define CsrWifiSmeRoamingConfigGetReqSerFree CsrWifiSmePfree
199 195
200extern u8* CsrWifiSmeRoamingConfigSetReqSer(u8 *ptr, size_t *len, void *msg); 196extern u8 *CsrWifiSmeRoamingConfigSetReqSer(u8 *ptr, size_t *len, void *msg);
201extern void* CsrWifiSmeRoamingConfigSetReqDes(u8 *buffer, size_t len); 197extern void *CsrWifiSmeRoamingConfigSetReqDes(u8 *buffer, size_t len);
202extern size_t CsrWifiSmeRoamingConfigSetReqSizeof(void *msg); 198extern size_t CsrWifiSmeRoamingConfigSetReqSizeof(void *msg);
203#define CsrWifiSmeRoamingConfigSetReqSerFree CsrWifiSmePfree 199#define CsrWifiSmeRoamingConfigSetReqSerFree CsrWifiSmePfree
204 200
@@ -207,13 +203,13 @@ extern size_t CsrWifiSmeRoamingConfigSetReqSizeof(void *msg);
207#define CsrWifiSmeScanConfigGetReqSizeof CsrWifiEventSizeof 203#define CsrWifiSmeScanConfigGetReqSizeof CsrWifiEventSizeof
208#define CsrWifiSmeScanConfigGetReqSerFree CsrWifiSmePfree 204#define CsrWifiSmeScanConfigGetReqSerFree CsrWifiSmePfree
209 205
210extern u8* CsrWifiSmeScanConfigSetReqSer(u8 *ptr, size_t *len, void *msg); 206extern u8 *CsrWifiSmeScanConfigSetReqSer(u8 *ptr, size_t *len, void *msg);
211extern void* CsrWifiSmeScanConfigSetReqDes(u8 *buffer, size_t len); 207extern void *CsrWifiSmeScanConfigSetReqDes(u8 *buffer, size_t len);
212extern size_t CsrWifiSmeScanConfigSetReqSizeof(void *msg); 208extern size_t CsrWifiSmeScanConfigSetReqSizeof(void *msg);
213extern void CsrWifiSmeScanConfigSetReqSerFree(void *msg); 209extern void CsrWifiSmeScanConfigSetReqSerFree(void *msg);
214 210
215extern u8* CsrWifiSmeScanFullReqSer(u8 *ptr, size_t *len, void *msg); 211extern u8 *CsrWifiSmeScanFullReqSer(u8 *ptr, size_t *len, void *msg);
216extern void* CsrWifiSmeScanFullReqDes(u8 *buffer, size_t len); 212extern void *CsrWifiSmeScanFullReqDes(u8 *buffer, size_t len);
217extern size_t CsrWifiSmeScanFullReqSizeof(void *msg); 213extern size_t CsrWifiSmeScanFullReqSizeof(void *msg);
218extern void CsrWifiSmeScanFullReqSerFree(void *msg); 214extern void CsrWifiSmeScanFullReqSerFree(void *msg);
219 215
@@ -232,8 +228,8 @@ extern void CsrWifiSmeScanFullReqSerFree(void *msg);
232#define CsrWifiSmeSmeStaConfigGetReqSizeof CsrWifiEventCsrUint16Sizeof 228#define CsrWifiSmeSmeStaConfigGetReqSizeof CsrWifiEventCsrUint16Sizeof
233#define CsrWifiSmeSmeStaConfigGetReqSerFree CsrWifiSmePfree 229#define CsrWifiSmeSmeStaConfigGetReqSerFree CsrWifiSmePfree
234 230
235extern u8* CsrWifiSmeSmeStaConfigSetReqSer(u8 *ptr, size_t *len, void *msg); 231extern u8 *CsrWifiSmeSmeStaConfigSetReqSer(u8 *ptr, size_t *len, void *msg);
236extern void* CsrWifiSmeSmeStaConfigSetReqDes(u8 *buffer, size_t len); 232extern void *CsrWifiSmeSmeStaConfigSetReqDes(u8 *buffer, size_t len);
237extern size_t CsrWifiSmeSmeStaConfigSetReqSizeof(void *msg); 233extern size_t CsrWifiSmeSmeStaConfigSetReqSizeof(void *msg);
238#define CsrWifiSmeSmeStaConfigSetReqSerFree CsrWifiSmePfree 234#define CsrWifiSmeSmeStaConfigSetReqSerFree CsrWifiSmePfree
239 235
@@ -242,8 +238,8 @@ extern size_t CsrWifiSmeSmeStaConfigSetReqSizeof(void *msg);
242#define CsrWifiSmeStationMacAddressGetReqSizeof CsrWifiEventSizeof 238#define CsrWifiSmeStationMacAddressGetReqSizeof CsrWifiEventSizeof
243#define CsrWifiSmeStationMacAddressGetReqSerFree CsrWifiSmePfree 239#define CsrWifiSmeStationMacAddressGetReqSerFree CsrWifiSmePfree
244 240
245extern u8* CsrWifiSmeTspecReqSer(u8 *ptr, size_t *len, void *msg); 241extern u8 *CsrWifiSmeTspecReqSer(u8 *ptr, size_t *len, void *msg);
246extern void* CsrWifiSmeTspecReqDes(u8 *buffer, size_t len); 242extern void *CsrWifiSmeTspecReqDes(u8 *buffer, size_t len);
247extern size_t CsrWifiSmeTspecReqSizeof(void *msg); 243extern size_t CsrWifiSmeTspecReqSizeof(void *msg);
248extern void CsrWifiSmeTspecReqSerFree(void *msg); 244extern void CsrWifiSmeTspecReqSerFree(void *msg);
249 245
@@ -252,8 +248,8 @@ extern void CsrWifiSmeTspecReqSerFree(void *msg);
252#define CsrWifiSmeVersionsGetReqSizeof CsrWifiEventSizeof 248#define CsrWifiSmeVersionsGetReqSizeof CsrWifiEventSizeof
253#define CsrWifiSmeVersionsGetReqSerFree CsrWifiSmePfree 249#define CsrWifiSmeVersionsGetReqSerFree CsrWifiSmePfree
254 250
255extern u8* CsrWifiSmeWifiFlightmodeReqSer(u8 *ptr, size_t *len, void *msg); 251extern u8 *CsrWifiSmeWifiFlightmodeReqSer(u8 *ptr, size_t *len, void *msg);
256extern void* CsrWifiSmeWifiFlightmodeReqDes(u8 *buffer, size_t len); 252extern void *CsrWifiSmeWifiFlightmodeReqDes(u8 *buffer, size_t len);
257extern size_t CsrWifiSmeWifiFlightmodeReqSizeof(void *msg); 253extern size_t CsrWifiSmeWifiFlightmodeReqSizeof(void *msg);
258extern void CsrWifiSmeWifiFlightmodeReqSerFree(void *msg); 254extern void CsrWifiSmeWifiFlightmodeReqSerFree(void *msg);
259 255
@@ -262,13 +258,13 @@ extern void CsrWifiSmeWifiFlightmodeReqSerFree(void *msg);
262#define CsrWifiSmeWifiOffReqSizeof CsrWifiEventSizeof 258#define CsrWifiSmeWifiOffReqSizeof CsrWifiEventSizeof
263#define CsrWifiSmeWifiOffReqSerFree CsrWifiSmePfree 259#define CsrWifiSmeWifiOffReqSerFree CsrWifiSmePfree
264 260
265extern u8* CsrWifiSmeWifiOnReqSer(u8 *ptr, size_t *len, void *msg); 261extern u8 *CsrWifiSmeWifiOnReqSer(u8 *ptr, size_t *len, void *msg);
266extern void* CsrWifiSmeWifiOnReqDes(u8 *buffer, size_t len); 262extern void *CsrWifiSmeWifiOnReqDes(u8 *buffer, size_t len);
267extern size_t CsrWifiSmeWifiOnReqSizeof(void *msg); 263extern size_t CsrWifiSmeWifiOnReqSizeof(void *msg);
268extern void CsrWifiSmeWifiOnReqSerFree(void *msg); 264extern void CsrWifiSmeWifiOnReqSerFree(void *msg);
269 265
270extern u8* CsrWifiSmeCloakedSsidsSetReqSer(u8 *ptr, size_t *len, void *msg); 266extern u8 *CsrWifiSmeCloakedSsidsSetReqSer(u8 *ptr, size_t *len, void *msg);
271extern void* CsrWifiSmeCloakedSsidsSetReqDes(u8 *buffer, size_t len); 267extern void *CsrWifiSmeCloakedSsidsSetReqDes(u8 *buffer, size_t len);
272extern size_t CsrWifiSmeCloakedSsidsSetReqSizeof(void *msg); 268extern size_t CsrWifiSmeCloakedSsidsSetReqSizeof(void *msg);
273extern void CsrWifiSmeCloakedSsidsSetReqSerFree(void *msg); 269extern void CsrWifiSmeCloakedSsidsSetReqSerFree(void *msg);
274 270
@@ -282,8 +278,8 @@ extern void CsrWifiSmeCloakedSsidsSetReqSerFree(void *msg);
282#define CsrWifiSmeSmeCommonConfigGetReqSizeof CsrWifiEventSizeof 278#define CsrWifiSmeSmeCommonConfigGetReqSizeof CsrWifiEventSizeof
283#define CsrWifiSmeSmeCommonConfigGetReqSerFree CsrWifiSmePfree 279#define CsrWifiSmeSmeCommonConfigGetReqSerFree CsrWifiSmePfree
284 280
285extern u8* CsrWifiSmeSmeCommonConfigSetReqSer(u8 *ptr, size_t *len, void *msg); 281extern u8 *CsrWifiSmeSmeCommonConfigSetReqSer(u8 *ptr, size_t *len, void *msg);
286extern void* CsrWifiSmeSmeCommonConfigSetReqDes(u8 *buffer, size_t len); 282extern void *CsrWifiSmeSmeCommonConfigSetReqDes(u8 *buffer, size_t len);
287extern size_t CsrWifiSmeSmeCommonConfigSetReqSizeof(void *msg); 283extern size_t CsrWifiSmeSmeCommonConfigSetReqSizeof(void *msg);
288#define CsrWifiSmeSmeCommonConfigSetReqSerFree CsrWifiSmePfree 284#define CsrWifiSmeSmeCommonConfigSetReqSerFree CsrWifiSmePfree
289 285
@@ -292,13 +288,13 @@ extern size_t CsrWifiSmeSmeCommonConfigSetReqSizeof(void *msg);
292#define CsrWifiSmeInterfaceCapabilityGetReqSizeof CsrWifiEventSizeof 288#define CsrWifiSmeInterfaceCapabilityGetReqSizeof CsrWifiEventSizeof
293#define CsrWifiSmeInterfaceCapabilityGetReqSerFree CsrWifiSmePfree 289#define CsrWifiSmeInterfaceCapabilityGetReqSerFree CsrWifiSmePfree
294 290
295extern u8* CsrWifiSmeWpsConfigurationReqSer(u8 *ptr, size_t *len, void *msg); 291extern u8 *CsrWifiSmeWpsConfigurationReqSer(u8 *ptr, size_t *len, void *msg);
296extern void* CsrWifiSmeWpsConfigurationReqDes(u8 *buffer, size_t len); 292extern void *CsrWifiSmeWpsConfigurationReqDes(u8 *buffer, size_t len);
297extern size_t CsrWifiSmeWpsConfigurationReqSizeof(void *msg); 293extern size_t CsrWifiSmeWpsConfigurationReqSizeof(void *msg);
298extern void CsrWifiSmeWpsConfigurationReqSerFree(void *msg); 294extern void CsrWifiSmeWpsConfigurationReqSerFree(void *msg);
299 295
300extern u8* CsrWifiSmeSetReqSer(u8 *ptr, size_t *len, void *msg); 296extern u8 *CsrWifiSmeSetReqSer(u8 *ptr, size_t *len, void *msg);
301extern void* CsrWifiSmeSetReqDes(u8 *buffer, size_t len); 297extern void *CsrWifiSmeSetReqDes(u8 *buffer, size_t len);
302extern size_t CsrWifiSmeSetReqSizeof(void *msg); 298extern size_t CsrWifiSmeSetReqSizeof(void *msg);
303extern void CsrWifiSmeSetReqSerFree(void *msg); 299extern void CsrWifiSmeSetReqSerFree(void *msg);
304 300
@@ -307,8 +303,8 @@ extern void CsrWifiSmeSetReqSerFree(void *msg);
307#define CsrWifiSmeActivateCfmSizeof CsrWifiEventCsrUint16Sizeof 303#define CsrWifiSmeActivateCfmSizeof CsrWifiEventCsrUint16Sizeof
308#define CsrWifiSmeActivateCfmSerFree CsrWifiSmePfree 304#define CsrWifiSmeActivateCfmSerFree CsrWifiSmePfree
309 305
310extern u8* CsrWifiSmeAdhocConfigGetCfmSer(u8 *ptr, size_t *len, void *msg); 306extern u8 *CsrWifiSmeAdhocConfigGetCfmSer(u8 *ptr, size_t *len, void *msg);
311extern void* CsrWifiSmeAdhocConfigGetCfmDes(u8 *buffer, size_t len); 307extern void *CsrWifiSmeAdhocConfigGetCfmDes(u8 *buffer, size_t len);
312extern size_t CsrWifiSmeAdhocConfigGetCfmSizeof(void *msg); 308extern size_t CsrWifiSmeAdhocConfigGetCfmSizeof(void *msg);
313#define CsrWifiSmeAdhocConfigGetCfmSerFree CsrWifiSmePfree 309#define CsrWifiSmeAdhocConfigGetCfmSerFree CsrWifiSmePfree
314 310
@@ -317,23 +313,23 @@ extern size_t CsrWifiSmeAdhocConfigGetCfmSizeof(void *msg);
317#define CsrWifiSmeAdhocConfigSetCfmSizeof CsrWifiEventCsrUint16Sizeof 313#define CsrWifiSmeAdhocConfigSetCfmSizeof CsrWifiEventCsrUint16Sizeof
318#define CsrWifiSmeAdhocConfigSetCfmSerFree CsrWifiSmePfree 314#define CsrWifiSmeAdhocConfigSetCfmSerFree CsrWifiSmePfree
319 315
320extern u8* CsrWifiSmeAssociationCompleteIndSer(u8 *ptr, size_t *len, void *msg); 316extern u8 *CsrWifiSmeAssociationCompleteIndSer(u8 *ptr, size_t *len, void *msg);
321extern void* CsrWifiSmeAssociationCompleteIndDes(u8 *buffer, size_t len); 317extern void *CsrWifiSmeAssociationCompleteIndDes(u8 *buffer, size_t len);
322extern size_t CsrWifiSmeAssociationCompleteIndSizeof(void *msg); 318extern size_t CsrWifiSmeAssociationCompleteIndSizeof(void *msg);
323extern void CsrWifiSmeAssociationCompleteIndSerFree(void *msg); 319extern void CsrWifiSmeAssociationCompleteIndSerFree(void *msg);
324 320
325extern u8* CsrWifiSmeAssociationStartIndSer(u8 *ptr, size_t *len, void *msg); 321extern u8 *CsrWifiSmeAssociationStartIndSer(u8 *ptr, size_t *len, void *msg);
326extern void* CsrWifiSmeAssociationStartIndDes(u8 *buffer, size_t len); 322extern void *CsrWifiSmeAssociationStartIndDes(u8 *buffer, size_t len);
327extern size_t CsrWifiSmeAssociationStartIndSizeof(void *msg); 323extern size_t CsrWifiSmeAssociationStartIndSizeof(void *msg);
328#define CsrWifiSmeAssociationStartIndSerFree CsrWifiSmePfree 324#define CsrWifiSmeAssociationStartIndSerFree CsrWifiSmePfree
329 325
330extern u8* CsrWifiSmeBlacklistCfmSer(u8 *ptr, size_t *len, void *msg); 326extern u8 *CsrWifiSmeBlacklistCfmSer(u8 *ptr, size_t *len, void *msg);
331extern void* CsrWifiSmeBlacklistCfmDes(u8 *buffer, size_t len); 327extern void *CsrWifiSmeBlacklistCfmDes(u8 *buffer, size_t len);
332extern size_t CsrWifiSmeBlacklistCfmSizeof(void *msg); 328extern size_t CsrWifiSmeBlacklistCfmSizeof(void *msg);
333extern void CsrWifiSmeBlacklistCfmSerFree(void *msg); 329extern void CsrWifiSmeBlacklistCfmSerFree(void *msg);
334 330
335extern u8* CsrWifiSmeCalibrationDataGetCfmSer(u8 *ptr, size_t *len, void *msg); 331extern u8 *CsrWifiSmeCalibrationDataGetCfmSer(u8 *ptr, size_t *len, void *msg);
336extern void* CsrWifiSmeCalibrationDataGetCfmDes(u8 *buffer, size_t len); 332extern void *CsrWifiSmeCalibrationDataGetCfmDes(u8 *buffer, size_t len);
337extern size_t CsrWifiSmeCalibrationDataGetCfmSizeof(void *msg); 333extern size_t CsrWifiSmeCalibrationDataGetCfmSizeof(void *msg);
338extern void CsrWifiSmeCalibrationDataGetCfmSerFree(void *msg); 334extern void CsrWifiSmeCalibrationDataGetCfmSerFree(void *msg);
339 335
@@ -342,18 +338,18 @@ extern void CsrWifiSmeCalibrationDataGetCfmSerFree(void *msg);
342#define CsrWifiSmeCalibrationDataSetCfmSizeof CsrWifiEventCsrUint16Sizeof 338#define CsrWifiSmeCalibrationDataSetCfmSizeof CsrWifiEventCsrUint16Sizeof
343#define CsrWifiSmeCalibrationDataSetCfmSerFree CsrWifiSmePfree 339#define CsrWifiSmeCalibrationDataSetCfmSerFree CsrWifiSmePfree
344 340
345extern u8* CsrWifiSmeCcxConfigGetCfmSer(u8 *ptr, size_t *len, void *msg); 341extern u8 *CsrWifiSmeCcxConfigGetCfmSer(u8 *ptr, size_t *len, void *msg);
346extern void* CsrWifiSmeCcxConfigGetCfmDes(u8 *buffer, size_t len); 342extern void *CsrWifiSmeCcxConfigGetCfmDes(u8 *buffer, size_t len);
347extern size_t CsrWifiSmeCcxConfigGetCfmSizeof(void *msg); 343extern size_t CsrWifiSmeCcxConfigGetCfmSizeof(void *msg);
348#define CsrWifiSmeCcxConfigGetCfmSerFree CsrWifiSmePfree 344#define CsrWifiSmeCcxConfigGetCfmSerFree CsrWifiSmePfree
349 345
350extern u8* CsrWifiSmeCcxConfigSetCfmSer(u8 *ptr, size_t *len, void *msg); 346extern u8 *CsrWifiSmeCcxConfigSetCfmSer(u8 *ptr, size_t *len, void *msg);
351extern void* CsrWifiSmeCcxConfigSetCfmDes(u8 *buffer, size_t len); 347extern void *CsrWifiSmeCcxConfigSetCfmDes(u8 *buffer, size_t len);
352extern size_t CsrWifiSmeCcxConfigSetCfmSizeof(void *msg); 348extern size_t CsrWifiSmeCcxConfigSetCfmSizeof(void *msg);
353#define CsrWifiSmeCcxConfigSetCfmSerFree CsrWifiSmePfree 349#define CsrWifiSmeCcxConfigSetCfmSerFree CsrWifiSmePfree
354 350
355extern u8* CsrWifiSmeCoexConfigGetCfmSer(u8 *ptr, size_t *len, void *msg); 351extern u8 *CsrWifiSmeCoexConfigGetCfmSer(u8 *ptr, size_t *len, void *msg);
356extern void* CsrWifiSmeCoexConfigGetCfmDes(u8 *buffer, size_t len); 352extern void *CsrWifiSmeCoexConfigGetCfmDes(u8 *buffer, size_t len);
357extern size_t CsrWifiSmeCoexConfigGetCfmSizeof(void *msg); 353extern size_t CsrWifiSmeCoexConfigGetCfmSizeof(void *msg);
358#define CsrWifiSmeCoexConfigGetCfmSerFree CsrWifiSmePfree 354#define CsrWifiSmeCoexConfigGetCfmSerFree CsrWifiSmePfree
359 355
@@ -362,33 +358,33 @@ extern size_t CsrWifiSmeCoexConfigGetCfmSizeof(void *msg);
362#define CsrWifiSmeCoexConfigSetCfmSizeof CsrWifiEventCsrUint16Sizeof 358#define CsrWifiSmeCoexConfigSetCfmSizeof CsrWifiEventCsrUint16Sizeof
363#define CsrWifiSmeCoexConfigSetCfmSerFree CsrWifiSmePfree 359#define CsrWifiSmeCoexConfigSetCfmSerFree CsrWifiSmePfree
364 360
365extern u8* CsrWifiSmeCoexInfoGetCfmSer(u8 *ptr, size_t *len, void *msg); 361extern u8 *CsrWifiSmeCoexInfoGetCfmSer(u8 *ptr, size_t *len, void *msg);
366extern void* CsrWifiSmeCoexInfoGetCfmDes(u8 *buffer, size_t len); 362extern void *CsrWifiSmeCoexInfoGetCfmDes(u8 *buffer, size_t len);
367extern size_t CsrWifiSmeCoexInfoGetCfmSizeof(void *msg); 363extern size_t CsrWifiSmeCoexInfoGetCfmSizeof(void *msg);
368#define CsrWifiSmeCoexInfoGetCfmSerFree CsrWifiSmePfree 364#define CsrWifiSmeCoexInfoGetCfmSerFree CsrWifiSmePfree
369 365
370extern u8* CsrWifiSmeConnectCfmSer(u8 *ptr, size_t *len, void *msg); 366extern u8 *CsrWifiSmeConnectCfmSer(u8 *ptr, size_t *len, void *msg);
371extern void* CsrWifiSmeConnectCfmDes(u8 *buffer, size_t len); 367extern void *CsrWifiSmeConnectCfmDes(u8 *buffer, size_t len);
372extern size_t CsrWifiSmeConnectCfmSizeof(void *msg); 368extern size_t CsrWifiSmeConnectCfmSizeof(void *msg);
373#define CsrWifiSmeConnectCfmSerFree CsrWifiSmePfree 369#define CsrWifiSmeConnectCfmSerFree CsrWifiSmePfree
374 370
375extern u8* CsrWifiSmeConnectionConfigGetCfmSer(u8 *ptr, size_t *len, void *msg); 371extern u8 *CsrWifiSmeConnectionConfigGetCfmSer(u8 *ptr, size_t *len, void *msg);
376extern void* CsrWifiSmeConnectionConfigGetCfmDes(u8 *buffer, size_t len); 372extern void *CsrWifiSmeConnectionConfigGetCfmDes(u8 *buffer, size_t len);
377extern size_t CsrWifiSmeConnectionConfigGetCfmSizeof(void *msg); 373extern size_t CsrWifiSmeConnectionConfigGetCfmSizeof(void *msg);
378extern void CsrWifiSmeConnectionConfigGetCfmSerFree(void *msg); 374extern void CsrWifiSmeConnectionConfigGetCfmSerFree(void *msg);
379 375
380extern u8* CsrWifiSmeConnectionInfoGetCfmSer(u8 *ptr, size_t *len, void *msg); 376extern u8 *CsrWifiSmeConnectionInfoGetCfmSer(u8 *ptr, size_t *len, void *msg);
381extern void* CsrWifiSmeConnectionInfoGetCfmDes(u8 *buffer, size_t len); 377extern void *CsrWifiSmeConnectionInfoGetCfmDes(u8 *buffer, size_t len);
382extern size_t CsrWifiSmeConnectionInfoGetCfmSizeof(void *msg); 378extern size_t CsrWifiSmeConnectionInfoGetCfmSizeof(void *msg);
383extern void CsrWifiSmeConnectionInfoGetCfmSerFree(void *msg); 379extern void CsrWifiSmeConnectionInfoGetCfmSerFree(void *msg);
384 380
385extern u8* CsrWifiSmeConnectionQualityIndSer(u8 *ptr, size_t *len, void *msg); 381extern u8 *CsrWifiSmeConnectionQualityIndSer(u8 *ptr, size_t *len, void *msg);
386extern void* CsrWifiSmeConnectionQualityIndDes(u8 *buffer, size_t len); 382extern void *CsrWifiSmeConnectionQualityIndDes(u8 *buffer, size_t len);
387extern size_t CsrWifiSmeConnectionQualityIndSizeof(void *msg); 383extern size_t CsrWifiSmeConnectionQualityIndSizeof(void *msg);
388#define CsrWifiSmeConnectionQualityIndSerFree CsrWifiSmePfree 384#define CsrWifiSmeConnectionQualityIndSerFree CsrWifiSmePfree
389 385
390extern u8* CsrWifiSmeConnectionStatsGetCfmSer(u8 *ptr, size_t *len, void *msg); 386extern u8 *CsrWifiSmeConnectionStatsGetCfmSer(u8 *ptr, size_t *len, void *msg);
391extern void* CsrWifiSmeConnectionStatsGetCfmDes(u8 *buffer, size_t len); 387extern void *CsrWifiSmeConnectionStatsGetCfmDes(u8 *buffer, size_t len);
392extern size_t CsrWifiSmeConnectionStatsGetCfmSizeof(void *msg); 388extern size_t CsrWifiSmeConnectionStatsGetCfmSizeof(void *msg);
393#define CsrWifiSmeConnectionStatsGetCfmSerFree CsrWifiSmePfree 389#define CsrWifiSmeConnectionStatsGetCfmSerFree CsrWifiSmePfree
394 390
@@ -397,8 +393,8 @@ extern size_t CsrWifiSmeConnectionStatsGetCfmSizeof(void *msg);
397#define CsrWifiSmeDeactivateCfmSizeof CsrWifiEventCsrUint16Sizeof 393#define CsrWifiSmeDeactivateCfmSizeof CsrWifiEventCsrUint16Sizeof
398#define CsrWifiSmeDeactivateCfmSerFree CsrWifiSmePfree 394#define CsrWifiSmeDeactivateCfmSerFree CsrWifiSmePfree
399 395
400extern u8* CsrWifiSmeDisconnectCfmSer(u8 *ptr, size_t *len, void *msg); 396extern u8 *CsrWifiSmeDisconnectCfmSer(u8 *ptr, size_t *len, void *msg);
401extern void* CsrWifiSmeDisconnectCfmDes(u8 *buffer, size_t len); 397extern void *CsrWifiSmeDisconnectCfmDes(u8 *buffer, size_t len);
402extern size_t CsrWifiSmeDisconnectCfmSizeof(void *msg); 398extern size_t CsrWifiSmeDisconnectCfmSizeof(void *msg);
403#define CsrWifiSmeDisconnectCfmSerFree CsrWifiSmePfree 399#define CsrWifiSmeDisconnectCfmSerFree CsrWifiSmePfree
404 400
@@ -407,38 +403,38 @@ extern size_t CsrWifiSmeDisconnectCfmSizeof(void *msg);
407#define CsrWifiSmeEventMaskSetCfmSizeof CsrWifiEventCsrUint16Sizeof 403#define CsrWifiSmeEventMaskSetCfmSizeof CsrWifiEventCsrUint16Sizeof
408#define CsrWifiSmeEventMaskSetCfmSerFree CsrWifiSmePfree 404#define CsrWifiSmeEventMaskSetCfmSerFree CsrWifiSmePfree
409 405
410extern u8* CsrWifiSmeHostConfigGetCfmSer(u8 *ptr, size_t *len, void *msg); 406extern u8 *CsrWifiSmeHostConfigGetCfmSer(u8 *ptr, size_t *len, void *msg);
411extern void* CsrWifiSmeHostConfigGetCfmDes(u8 *buffer, size_t len); 407extern void *CsrWifiSmeHostConfigGetCfmDes(u8 *buffer, size_t len);
412extern size_t CsrWifiSmeHostConfigGetCfmSizeof(void *msg); 408extern size_t CsrWifiSmeHostConfigGetCfmSizeof(void *msg);
413#define CsrWifiSmeHostConfigGetCfmSerFree CsrWifiSmePfree 409#define CsrWifiSmeHostConfigGetCfmSerFree CsrWifiSmePfree
414 410
415extern u8* CsrWifiSmeHostConfigSetCfmSer(u8 *ptr, size_t *len, void *msg); 411extern u8 *CsrWifiSmeHostConfigSetCfmSer(u8 *ptr, size_t *len, void *msg);
416extern void* CsrWifiSmeHostConfigSetCfmDes(u8 *buffer, size_t len); 412extern void *CsrWifiSmeHostConfigSetCfmDes(u8 *buffer, size_t len);
417extern size_t CsrWifiSmeHostConfigSetCfmSizeof(void *msg); 413extern size_t CsrWifiSmeHostConfigSetCfmSizeof(void *msg);
418#define CsrWifiSmeHostConfigSetCfmSerFree CsrWifiSmePfree 414#define CsrWifiSmeHostConfigSetCfmSerFree CsrWifiSmePfree
419 415
420extern u8* CsrWifiSmeIbssStationIndSer(u8 *ptr, size_t *len, void *msg); 416extern u8 *CsrWifiSmeIbssStationIndSer(u8 *ptr, size_t *len, void *msg);
421extern void* CsrWifiSmeIbssStationIndDes(u8 *buffer, size_t len); 417extern void *CsrWifiSmeIbssStationIndDes(u8 *buffer, size_t len);
422extern size_t CsrWifiSmeIbssStationIndSizeof(void *msg); 418extern size_t CsrWifiSmeIbssStationIndSizeof(void *msg);
423#define CsrWifiSmeIbssStationIndSerFree CsrWifiSmePfree 419#define CsrWifiSmeIbssStationIndSerFree CsrWifiSmePfree
424 420
425extern u8* CsrWifiSmeKeyCfmSer(u8 *ptr, size_t *len, void *msg); 421extern u8 *CsrWifiSmeKeyCfmSer(u8 *ptr, size_t *len, void *msg);
426extern void* CsrWifiSmeKeyCfmDes(u8 *buffer, size_t len); 422extern void *CsrWifiSmeKeyCfmDes(u8 *buffer, size_t len);
427extern size_t CsrWifiSmeKeyCfmSizeof(void *msg); 423extern size_t CsrWifiSmeKeyCfmSizeof(void *msg);
428#define CsrWifiSmeKeyCfmSerFree CsrWifiSmePfree 424#define CsrWifiSmeKeyCfmSerFree CsrWifiSmePfree
429 425
430extern u8* CsrWifiSmeLinkQualityGetCfmSer(u8 *ptr, size_t *len, void *msg); 426extern u8 *CsrWifiSmeLinkQualityGetCfmSer(u8 *ptr, size_t *len, void *msg);
431extern void* CsrWifiSmeLinkQualityGetCfmDes(u8 *buffer, size_t len); 427extern void *CsrWifiSmeLinkQualityGetCfmDes(u8 *buffer, size_t len);
432extern size_t CsrWifiSmeLinkQualityGetCfmSizeof(void *msg); 428extern size_t CsrWifiSmeLinkQualityGetCfmSizeof(void *msg);
433#define CsrWifiSmeLinkQualityGetCfmSerFree CsrWifiSmePfree 429#define CsrWifiSmeLinkQualityGetCfmSerFree CsrWifiSmePfree
434 430
435extern u8* CsrWifiSmeMediaStatusIndSer(u8 *ptr, size_t *len, void *msg); 431extern u8 *CsrWifiSmeMediaStatusIndSer(u8 *ptr, size_t *len, void *msg);
436extern void* CsrWifiSmeMediaStatusIndDes(u8 *buffer, size_t len); 432extern void *CsrWifiSmeMediaStatusIndDes(u8 *buffer, size_t len);
437extern size_t CsrWifiSmeMediaStatusIndSizeof(void *msg); 433extern size_t CsrWifiSmeMediaStatusIndSizeof(void *msg);
438extern void CsrWifiSmeMediaStatusIndSerFree(void *msg); 434extern void CsrWifiSmeMediaStatusIndSerFree(void *msg);
439 435
440extern u8* CsrWifiSmeMibConfigGetCfmSer(u8 *ptr, size_t *len, void *msg); 436extern u8 *CsrWifiSmeMibConfigGetCfmSer(u8 *ptr, size_t *len, void *msg);
441extern void* CsrWifiSmeMibConfigGetCfmDes(u8 *buffer, size_t len); 437extern void *CsrWifiSmeMibConfigGetCfmDes(u8 *buffer, size_t len);
442extern size_t CsrWifiSmeMibConfigGetCfmSizeof(void *msg); 438extern size_t CsrWifiSmeMibConfigGetCfmSizeof(void *msg);
443#define CsrWifiSmeMibConfigGetCfmSerFree CsrWifiSmePfree 439#define CsrWifiSmeMibConfigGetCfmSerFree CsrWifiSmePfree
444 440
@@ -447,13 +443,13 @@ extern size_t CsrWifiSmeMibConfigGetCfmSizeof(void *msg);
447#define CsrWifiSmeMibConfigSetCfmSizeof CsrWifiEventCsrUint16Sizeof 443#define CsrWifiSmeMibConfigSetCfmSizeof CsrWifiEventCsrUint16Sizeof
448#define CsrWifiSmeMibConfigSetCfmSerFree CsrWifiSmePfree 444#define CsrWifiSmeMibConfigSetCfmSerFree CsrWifiSmePfree
449 445
450extern u8* CsrWifiSmeMibGetCfmSer(u8 *ptr, size_t *len, void *msg); 446extern u8 *CsrWifiSmeMibGetCfmSer(u8 *ptr, size_t *len, void *msg);
451extern void* CsrWifiSmeMibGetCfmDes(u8 *buffer, size_t len); 447extern void *CsrWifiSmeMibGetCfmDes(u8 *buffer, size_t len);
452extern size_t CsrWifiSmeMibGetCfmSizeof(void *msg); 448extern size_t CsrWifiSmeMibGetCfmSizeof(void *msg);
453extern void CsrWifiSmeMibGetCfmSerFree(void *msg); 449extern void CsrWifiSmeMibGetCfmSerFree(void *msg);
454 450
455extern u8* CsrWifiSmeMibGetNextCfmSer(u8 *ptr, size_t *len, void *msg); 451extern u8 *CsrWifiSmeMibGetNextCfmSer(u8 *ptr, size_t *len, void *msg);
456extern void* CsrWifiSmeMibGetNextCfmDes(u8 *buffer, size_t len); 452extern void *CsrWifiSmeMibGetNextCfmDes(u8 *buffer, size_t len);
457extern size_t CsrWifiSmeMibGetNextCfmSizeof(void *msg); 453extern size_t CsrWifiSmeMibGetNextCfmSizeof(void *msg);
458extern void CsrWifiSmeMibGetNextCfmSerFree(void *msg); 454extern void CsrWifiSmeMibGetNextCfmSerFree(void *msg);
459 455
@@ -462,38 +458,39 @@ extern void CsrWifiSmeMibGetNextCfmSerFree(void *msg);
462#define CsrWifiSmeMibSetCfmSizeof CsrWifiEventCsrUint16Sizeof 458#define CsrWifiSmeMibSetCfmSizeof CsrWifiEventCsrUint16Sizeof
463#define CsrWifiSmeMibSetCfmSerFree CsrWifiSmePfree 459#define CsrWifiSmeMibSetCfmSerFree CsrWifiSmePfree
464 460
465extern u8* CsrWifiSmeMicFailureIndSer(u8 *ptr, size_t *len, void *msg); 461extern u8 *CsrWifiSmeMicFailureIndSer(u8 *ptr, size_t *len, void *msg);
466extern void* CsrWifiSmeMicFailureIndDes(u8 *buffer, size_t len); 462extern void *CsrWifiSmeMicFailureIndDes(u8 *buffer, size_t len);
467extern size_t CsrWifiSmeMicFailureIndSizeof(void *msg); 463extern size_t CsrWifiSmeMicFailureIndSizeof(void *msg);
468#define CsrWifiSmeMicFailureIndSerFree CsrWifiSmePfree 464#define CsrWifiSmeMicFailureIndSerFree CsrWifiSmePfree
469 465
470extern u8* CsrWifiSmeMulticastAddressCfmSer(u8 *ptr, size_t *len, void *msg); 466extern u8 *CsrWifiSmeMulticastAddressCfmSer(u8 *ptr, size_t *len, void *msg);
471extern void* CsrWifiSmeMulticastAddressCfmDes(u8 *buffer, size_t len); 467extern void *CsrWifiSmeMulticastAddressCfmDes(u8 *buffer, size_t len);
472extern size_t CsrWifiSmeMulticastAddressCfmSizeof(void *msg); 468extern size_t CsrWifiSmeMulticastAddressCfmSizeof(void *msg);
473extern void CsrWifiSmeMulticastAddressCfmSerFree(void *msg); 469extern void CsrWifiSmeMulticastAddressCfmSerFree(void *msg);
474 470
475extern u8* CsrWifiSmePacketFilterSetCfmSer(u8 *ptr, size_t *len, void *msg); 471extern u8 *CsrWifiSmePacketFilterSetCfmSer(u8 *ptr, size_t *len, void *msg);
476extern void* CsrWifiSmePacketFilterSetCfmDes(u8 *buffer, size_t len); 472extern void *CsrWifiSmePacketFilterSetCfmDes(u8 *buffer, size_t len);
477extern size_t CsrWifiSmePacketFilterSetCfmSizeof(void *msg); 473extern size_t CsrWifiSmePacketFilterSetCfmSizeof(void *msg);
478#define CsrWifiSmePacketFilterSetCfmSerFree CsrWifiSmePfree 474#define CsrWifiSmePacketFilterSetCfmSerFree CsrWifiSmePfree
479 475
480extern u8* CsrWifiSmePermanentMacAddressGetCfmSer(u8 *ptr, size_t *len, void *msg); 476extern u8 *CsrWifiSmePermanentMacAddressGetCfmSer(u8 *ptr, size_t *len,
481extern void* CsrWifiSmePermanentMacAddressGetCfmDes(u8 *buffer, size_t len); 477 void *msg);
478extern void *CsrWifiSmePermanentMacAddressGetCfmDes(u8 *buffer, size_t len);
482extern size_t CsrWifiSmePermanentMacAddressGetCfmSizeof(void *msg); 479extern size_t CsrWifiSmePermanentMacAddressGetCfmSizeof(void *msg);
483#define CsrWifiSmePermanentMacAddressGetCfmSerFree CsrWifiSmePfree 480#define CsrWifiSmePermanentMacAddressGetCfmSerFree CsrWifiSmePfree
484 481
485extern u8* CsrWifiSmePmkidCandidateListIndSer(u8 *ptr, size_t *len, void *msg); 482extern u8 *CsrWifiSmePmkidCandidateListIndSer(u8 *ptr, size_t *len, void *msg);
486extern void* CsrWifiSmePmkidCandidateListIndDes(u8 *buffer, size_t len); 483extern void *CsrWifiSmePmkidCandidateListIndDes(u8 *buffer, size_t len);
487extern size_t CsrWifiSmePmkidCandidateListIndSizeof(void *msg); 484extern size_t CsrWifiSmePmkidCandidateListIndSizeof(void *msg);
488extern void CsrWifiSmePmkidCandidateListIndSerFree(void *msg); 485extern void CsrWifiSmePmkidCandidateListIndSerFree(void *msg);
489 486
490extern u8* CsrWifiSmePmkidCfmSer(u8 *ptr, size_t *len, void *msg); 487extern u8 *CsrWifiSmePmkidCfmSer(u8 *ptr, size_t *len, void *msg);
491extern void* CsrWifiSmePmkidCfmDes(u8 *buffer, size_t len); 488extern void *CsrWifiSmePmkidCfmDes(u8 *buffer, size_t len);
492extern size_t CsrWifiSmePmkidCfmSizeof(void *msg); 489extern size_t CsrWifiSmePmkidCfmSizeof(void *msg);
493extern void CsrWifiSmePmkidCfmSerFree(void *msg); 490extern void CsrWifiSmePmkidCfmSerFree(void *msg);
494 491
495extern u8* CsrWifiSmePowerConfigGetCfmSer(u8 *ptr, size_t *len, void *msg); 492extern u8 *CsrWifiSmePowerConfigGetCfmSer(u8 *ptr, size_t *len, void *msg);
496extern void* CsrWifiSmePowerConfigGetCfmDes(u8 *buffer, size_t len); 493extern void *CsrWifiSmePowerConfigGetCfmDes(u8 *buffer, size_t len);
497extern size_t CsrWifiSmePowerConfigGetCfmSizeof(void *msg); 494extern size_t CsrWifiSmePowerConfigGetCfmSizeof(void *msg);
498#define CsrWifiSmePowerConfigGetCfmSerFree CsrWifiSmePfree 495#define CsrWifiSmePowerConfigGetCfmSerFree CsrWifiSmePfree
499 496
@@ -502,33 +499,34 @@ extern size_t CsrWifiSmePowerConfigGetCfmSizeof(void *msg);
502#define CsrWifiSmePowerConfigSetCfmSizeof CsrWifiEventCsrUint16Sizeof 499#define CsrWifiSmePowerConfigSetCfmSizeof CsrWifiEventCsrUint16Sizeof
503#define CsrWifiSmePowerConfigSetCfmSerFree CsrWifiSmePfree 500#define CsrWifiSmePowerConfigSetCfmSerFree CsrWifiSmePfree
504 501
505extern u8* CsrWifiSmeRegulatoryDomainInfoGetCfmSer(u8 *ptr, size_t *len, void *msg); 502extern u8 *CsrWifiSmeRegulatoryDomainInfoGetCfmSer(u8 *ptr, size_t *len,
506extern void* CsrWifiSmeRegulatoryDomainInfoGetCfmDes(u8 *buffer, size_t len); 503 void *msg);
504extern void *CsrWifiSmeRegulatoryDomainInfoGetCfmDes(u8 *buffer, size_t len);
507extern size_t CsrWifiSmeRegulatoryDomainInfoGetCfmSizeof(void *msg); 505extern size_t CsrWifiSmeRegulatoryDomainInfoGetCfmSizeof(void *msg);
508#define CsrWifiSmeRegulatoryDomainInfoGetCfmSerFree CsrWifiSmePfree 506#define CsrWifiSmeRegulatoryDomainInfoGetCfmSerFree CsrWifiSmePfree
509 507
510extern u8* CsrWifiSmeRoamCompleteIndSer(u8 *ptr, size_t *len, void *msg); 508extern u8 *CsrWifiSmeRoamCompleteIndSer(u8 *ptr, size_t *len, void *msg);
511extern void* CsrWifiSmeRoamCompleteIndDes(u8 *buffer, size_t len); 509extern void *CsrWifiSmeRoamCompleteIndDes(u8 *buffer, size_t len);
512extern size_t CsrWifiSmeRoamCompleteIndSizeof(void *msg); 510extern size_t CsrWifiSmeRoamCompleteIndSizeof(void *msg);
513#define CsrWifiSmeRoamCompleteIndSerFree CsrWifiSmePfree 511#define CsrWifiSmeRoamCompleteIndSerFree CsrWifiSmePfree
514 512
515extern u8* CsrWifiSmeRoamStartIndSer(u8 *ptr, size_t *len, void *msg); 513extern u8 *CsrWifiSmeRoamStartIndSer(u8 *ptr, size_t *len, void *msg);
516extern void* CsrWifiSmeRoamStartIndDes(u8 *buffer, size_t len); 514extern void *CsrWifiSmeRoamStartIndDes(u8 *buffer, size_t len);
517extern size_t CsrWifiSmeRoamStartIndSizeof(void *msg); 515extern size_t CsrWifiSmeRoamStartIndSizeof(void *msg);
518#define CsrWifiSmeRoamStartIndSerFree CsrWifiSmePfree 516#define CsrWifiSmeRoamStartIndSerFree CsrWifiSmePfree
519 517
520extern u8* CsrWifiSmeRoamingConfigGetCfmSer(u8 *ptr, size_t *len, void *msg); 518extern u8 *CsrWifiSmeRoamingConfigGetCfmSer(u8 *ptr, size_t *len, void *msg);
521extern void* CsrWifiSmeRoamingConfigGetCfmDes(u8 *buffer, size_t len); 519extern void *CsrWifiSmeRoamingConfigGetCfmDes(u8 *buffer, size_t len);
522extern size_t CsrWifiSmeRoamingConfigGetCfmSizeof(void *msg); 520extern size_t CsrWifiSmeRoamingConfigGetCfmSizeof(void *msg);
523#define CsrWifiSmeRoamingConfigGetCfmSerFree CsrWifiSmePfree 521#define CsrWifiSmeRoamingConfigGetCfmSerFree CsrWifiSmePfree
524 522
525extern u8* CsrWifiSmeRoamingConfigSetCfmSer(u8 *ptr, size_t *len, void *msg); 523extern u8 *CsrWifiSmeRoamingConfigSetCfmSer(u8 *ptr, size_t *len, void *msg);
526extern void* CsrWifiSmeRoamingConfigSetCfmDes(u8 *buffer, size_t len); 524extern void *CsrWifiSmeRoamingConfigSetCfmDes(u8 *buffer, size_t len);
527extern size_t CsrWifiSmeRoamingConfigSetCfmSizeof(void *msg); 525extern size_t CsrWifiSmeRoamingConfigSetCfmSizeof(void *msg);
528#define CsrWifiSmeRoamingConfigSetCfmSerFree CsrWifiSmePfree 526#define CsrWifiSmeRoamingConfigSetCfmSerFree CsrWifiSmePfree
529 527
530extern u8* CsrWifiSmeScanConfigGetCfmSer(u8 *ptr, size_t *len, void *msg); 528extern u8 *CsrWifiSmeScanConfigGetCfmSer(u8 *ptr, size_t *len, void *msg);
531extern void* CsrWifiSmeScanConfigGetCfmDes(u8 *buffer, size_t len); 529extern void *CsrWifiSmeScanConfigGetCfmDes(u8 *buffer, size_t len);
532extern size_t CsrWifiSmeScanConfigGetCfmSizeof(void *msg); 530extern size_t CsrWifiSmeScanConfigGetCfmSizeof(void *msg);
533extern void CsrWifiSmeScanConfigGetCfmSerFree(void *msg); 531extern void CsrWifiSmeScanConfigGetCfmSerFree(void *msg);
534 532
@@ -542,8 +540,8 @@ extern void CsrWifiSmeScanConfigGetCfmSerFree(void *msg);
542#define CsrWifiSmeScanFullCfmSizeof CsrWifiEventCsrUint16Sizeof 540#define CsrWifiSmeScanFullCfmSizeof CsrWifiEventCsrUint16Sizeof
543#define CsrWifiSmeScanFullCfmSerFree CsrWifiSmePfree 541#define CsrWifiSmeScanFullCfmSerFree CsrWifiSmePfree
544 542
545extern u8* CsrWifiSmeScanResultIndSer(u8 *ptr, size_t *len, void *msg); 543extern u8 *CsrWifiSmeScanResultIndSer(u8 *ptr, size_t *len, void *msg);
546extern void* CsrWifiSmeScanResultIndDes(u8 *buffer, size_t len); 544extern void *CsrWifiSmeScanResultIndDes(u8 *buffer, size_t len);
547extern size_t CsrWifiSmeScanResultIndSizeof(void *msg); 545extern size_t CsrWifiSmeScanResultIndSizeof(void *msg);
548extern void CsrWifiSmeScanResultIndSerFree(void *msg); 546extern void CsrWifiSmeScanResultIndSerFree(void *msg);
549 547
@@ -552,38 +550,39 @@ extern void CsrWifiSmeScanResultIndSerFree(void *msg);
552#define CsrWifiSmeScanResultsFlushCfmSizeof CsrWifiEventCsrUint16Sizeof 550#define CsrWifiSmeScanResultsFlushCfmSizeof CsrWifiEventCsrUint16Sizeof
553#define CsrWifiSmeScanResultsFlushCfmSerFree CsrWifiSmePfree 551#define CsrWifiSmeScanResultsFlushCfmSerFree CsrWifiSmePfree
554 552
555extern u8* CsrWifiSmeScanResultsGetCfmSer(u8 *ptr, size_t *len, void *msg); 553extern u8 *CsrWifiSmeScanResultsGetCfmSer(u8 *ptr, size_t *len, void *msg);
556extern void* CsrWifiSmeScanResultsGetCfmDes(u8 *buffer, size_t len); 554extern void *CsrWifiSmeScanResultsGetCfmDes(u8 *buffer, size_t len);
557extern size_t CsrWifiSmeScanResultsGetCfmSizeof(void *msg); 555extern size_t CsrWifiSmeScanResultsGetCfmSizeof(void *msg);
558extern void CsrWifiSmeScanResultsGetCfmSerFree(void *msg); 556extern void CsrWifiSmeScanResultsGetCfmSerFree(void *msg);
559 557
560extern u8* CsrWifiSmeSmeStaConfigGetCfmSer(u8 *ptr, size_t *len, void *msg); 558extern u8 *CsrWifiSmeSmeStaConfigGetCfmSer(u8 *ptr, size_t *len, void *msg);
561extern void* CsrWifiSmeSmeStaConfigGetCfmDes(u8 *buffer, size_t len); 559extern void *CsrWifiSmeSmeStaConfigGetCfmDes(u8 *buffer, size_t len);
562extern size_t CsrWifiSmeSmeStaConfigGetCfmSizeof(void *msg); 560extern size_t CsrWifiSmeSmeStaConfigGetCfmSizeof(void *msg);
563#define CsrWifiSmeSmeStaConfigGetCfmSerFree CsrWifiSmePfree 561#define CsrWifiSmeSmeStaConfigGetCfmSerFree CsrWifiSmePfree
564 562
565extern u8* CsrWifiSmeSmeStaConfigSetCfmSer(u8 *ptr, size_t *len, void *msg); 563extern u8 *CsrWifiSmeSmeStaConfigSetCfmSer(u8 *ptr, size_t *len, void *msg);
566extern void* CsrWifiSmeSmeStaConfigSetCfmDes(u8 *buffer, size_t len); 564extern void *CsrWifiSmeSmeStaConfigSetCfmDes(u8 *buffer, size_t len);
567extern size_t CsrWifiSmeSmeStaConfigSetCfmSizeof(void *msg); 565extern size_t CsrWifiSmeSmeStaConfigSetCfmSizeof(void *msg);
568#define CsrWifiSmeSmeStaConfigSetCfmSerFree CsrWifiSmePfree 566#define CsrWifiSmeSmeStaConfigSetCfmSerFree CsrWifiSmePfree
569 567
570extern u8* CsrWifiSmeStationMacAddressGetCfmSer(u8 *ptr, size_t *len, void *msg); 568extern u8 *CsrWifiSmeStationMacAddressGetCfmSer(u8 *ptr, size_t *len,
571extern void* CsrWifiSmeStationMacAddressGetCfmDes(u8 *buffer, size_t len); 569 void *msg);
570extern void *CsrWifiSmeStationMacAddressGetCfmDes(u8 *buffer, size_t len);
572extern size_t CsrWifiSmeStationMacAddressGetCfmSizeof(void *msg); 571extern size_t CsrWifiSmeStationMacAddressGetCfmSizeof(void *msg);
573#define CsrWifiSmeStationMacAddressGetCfmSerFree CsrWifiSmePfree 572#define CsrWifiSmeStationMacAddressGetCfmSerFree CsrWifiSmePfree
574 573
575extern u8* CsrWifiSmeTspecIndSer(u8 *ptr, size_t *len, void *msg); 574extern u8 *CsrWifiSmeTspecIndSer(u8 *ptr, size_t *len, void *msg);
576extern void* CsrWifiSmeTspecIndDes(u8 *buffer, size_t len); 575extern void *CsrWifiSmeTspecIndDes(u8 *buffer, size_t len);
577extern size_t CsrWifiSmeTspecIndSizeof(void *msg); 576extern size_t CsrWifiSmeTspecIndSizeof(void *msg);
578extern void CsrWifiSmeTspecIndSerFree(void *msg); 577extern void CsrWifiSmeTspecIndSerFree(void *msg);
579 578
580extern u8* CsrWifiSmeTspecCfmSer(u8 *ptr, size_t *len, void *msg); 579extern u8 *CsrWifiSmeTspecCfmSer(u8 *ptr, size_t *len, void *msg);
581extern void* CsrWifiSmeTspecCfmDes(u8 *buffer, size_t len); 580extern void *CsrWifiSmeTspecCfmDes(u8 *buffer, size_t len);
582extern size_t CsrWifiSmeTspecCfmSizeof(void *msg); 581extern size_t CsrWifiSmeTspecCfmSizeof(void *msg);
583extern void CsrWifiSmeTspecCfmSerFree(void *msg); 582extern void CsrWifiSmeTspecCfmSerFree(void *msg);
584 583
585extern u8* CsrWifiSmeVersionsGetCfmSer(u8 *ptr, size_t *len, void *msg); 584extern u8 *CsrWifiSmeVersionsGetCfmSer(u8 *ptr, size_t *len, void *msg);
586extern void* CsrWifiSmeVersionsGetCfmDes(u8 *buffer, size_t len); 585extern void *CsrWifiSmeVersionsGetCfmDes(u8 *buffer, size_t len);
587extern size_t CsrWifiSmeVersionsGetCfmSizeof(void *msg); 586extern size_t CsrWifiSmeVersionsGetCfmSizeof(void *msg);
588extern void CsrWifiSmeVersionsGetCfmSerFree(void *msg); 587extern void CsrWifiSmeVersionsGetCfmSerFree(void *msg);
589 588
@@ -612,18 +611,18 @@ extern void CsrWifiSmeVersionsGetCfmSerFree(void *msg);
612#define CsrWifiSmeCloakedSsidsSetCfmSizeof CsrWifiEventCsrUint16Sizeof 611#define CsrWifiSmeCloakedSsidsSetCfmSizeof CsrWifiEventCsrUint16Sizeof
613#define CsrWifiSmeCloakedSsidsSetCfmSerFree CsrWifiSmePfree 612#define CsrWifiSmeCloakedSsidsSetCfmSerFree CsrWifiSmePfree
614 613
615extern u8* CsrWifiSmeCloakedSsidsGetCfmSer(u8 *ptr, size_t *len, void *msg); 614extern u8 *CsrWifiSmeCloakedSsidsGetCfmSer(u8 *ptr, size_t *len, void *msg);
616extern void* CsrWifiSmeCloakedSsidsGetCfmDes(u8 *buffer, size_t len); 615extern void *CsrWifiSmeCloakedSsidsGetCfmDes(u8 *buffer, size_t len);
617extern size_t CsrWifiSmeCloakedSsidsGetCfmSizeof(void *msg); 616extern size_t CsrWifiSmeCloakedSsidsGetCfmSizeof(void *msg);
618extern void CsrWifiSmeCloakedSsidsGetCfmSerFree(void *msg); 617extern void CsrWifiSmeCloakedSsidsGetCfmSerFree(void *msg);
619 618
620extern u8* CsrWifiSmeWifiOnIndSer(u8 *ptr, size_t *len, void *msg); 619extern u8 *CsrWifiSmeWifiOnIndSer(u8 *ptr, size_t *len, void *msg);
621extern void* CsrWifiSmeWifiOnIndDes(u8 *buffer, size_t len); 620extern void *CsrWifiSmeWifiOnIndDes(u8 *buffer, size_t len);
622extern size_t CsrWifiSmeWifiOnIndSizeof(void *msg); 621extern size_t CsrWifiSmeWifiOnIndSizeof(void *msg);
623#define CsrWifiSmeWifiOnIndSerFree CsrWifiSmePfree 622#define CsrWifiSmeWifiOnIndSerFree CsrWifiSmePfree
624 623
625extern u8* CsrWifiSmeSmeCommonConfigGetCfmSer(u8 *ptr, size_t *len, void *msg); 624extern u8 *CsrWifiSmeSmeCommonConfigGetCfmSer(u8 *ptr, size_t *len, void *msg);
626extern void* CsrWifiSmeSmeCommonConfigGetCfmDes(u8 *buffer, size_t len); 625extern void *CsrWifiSmeSmeCommonConfigGetCfmDes(u8 *buffer, size_t len);
627extern size_t CsrWifiSmeSmeCommonConfigGetCfmSizeof(void *msg); 626extern size_t CsrWifiSmeSmeCommonConfigGetCfmSizeof(void *msg);
628#define CsrWifiSmeSmeCommonConfigGetCfmSerFree CsrWifiSmePfree 627#define CsrWifiSmeSmeCommonConfigGetCfmSerFree CsrWifiSmePfree
629 628
@@ -632,23 +631,24 @@ extern size_t CsrWifiSmeSmeCommonConfigGetCfmSizeof(void *msg);
632#define CsrWifiSmeSmeCommonConfigSetCfmSizeof CsrWifiEventCsrUint16Sizeof 631#define CsrWifiSmeSmeCommonConfigSetCfmSizeof CsrWifiEventCsrUint16Sizeof
633#define CsrWifiSmeSmeCommonConfigSetCfmSerFree CsrWifiSmePfree 632#define CsrWifiSmeSmeCommonConfigSetCfmSerFree CsrWifiSmePfree
634 633
635extern u8* CsrWifiSmeInterfaceCapabilityGetCfmSer(u8 *ptr, size_t *len, void *msg); 634extern u8 *CsrWifiSmeInterfaceCapabilityGetCfmSer(u8 *ptr, size_t *len,
636extern void* CsrWifiSmeInterfaceCapabilityGetCfmDes(u8 *buffer, size_t len); 635 void *msg);
636extern void *CsrWifiSmeInterfaceCapabilityGetCfmDes(u8 *buffer, size_t len);
637extern size_t CsrWifiSmeInterfaceCapabilityGetCfmSizeof(void *msg); 637extern size_t CsrWifiSmeInterfaceCapabilityGetCfmSizeof(void *msg);
638#define CsrWifiSmeInterfaceCapabilityGetCfmSerFree CsrWifiSmePfree 638#define CsrWifiSmeInterfaceCapabilityGetCfmSerFree CsrWifiSmePfree
639 639
640extern u8* CsrWifiSmeErrorIndSer(u8 *ptr, size_t *len, void *msg); 640extern u8 *CsrWifiSmeErrorIndSer(u8 *ptr, size_t *len, void *msg);
641extern void* CsrWifiSmeErrorIndDes(u8 *buffer, size_t len); 641extern void *CsrWifiSmeErrorIndDes(u8 *buffer, size_t len);
642extern size_t CsrWifiSmeErrorIndSizeof(void *msg); 642extern size_t CsrWifiSmeErrorIndSizeof(void *msg);
643extern void CsrWifiSmeErrorIndSerFree(void *msg); 643extern void CsrWifiSmeErrorIndSerFree(void *msg);
644 644
645extern u8* CsrWifiSmeInfoIndSer(u8 *ptr, size_t *len, void *msg); 645extern u8 *CsrWifiSmeInfoIndSer(u8 *ptr, size_t *len, void *msg);
646extern void* CsrWifiSmeInfoIndDes(u8 *buffer, size_t len); 646extern void *CsrWifiSmeInfoIndDes(u8 *buffer, size_t len);
647extern size_t CsrWifiSmeInfoIndSizeof(void *msg); 647extern size_t CsrWifiSmeInfoIndSizeof(void *msg);
648extern void CsrWifiSmeInfoIndSerFree(void *msg); 648extern void CsrWifiSmeInfoIndSerFree(void *msg);
649 649
650extern u8* CsrWifiSmeCoreDumpIndSer(u8 *ptr, size_t *len, void *msg); 650extern u8 *CsrWifiSmeCoreDumpIndSer(u8 *ptr, size_t *len, void *msg);
651extern void* CsrWifiSmeCoreDumpIndDes(u8 *buffer, size_t len); 651extern void *CsrWifiSmeCoreDumpIndDes(u8 *buffer, size_t len);
652extern size_t CsrWifiSmeCoreDumpIndSizeof(void *msg); 652extern size_t CsrWifiSmeCoreDumpIndSizeof(void *msg);
653extern void CsrWifiSmeCoreDumpIndSerFree(void *msg); 653extern void CsrWifiSmeCoreDumpIndSerFree(void *msg);
654 654
@@ -662,9 +662,5 @@ extern void CsrWifiSmeCoreDumpIndSerFree(void *msg);
662#define CsrWifiSmeWpsConfigurationCfmSizeof CsrWifiEventCsrUint16Sizeof 662#define CsrWifiSmeWpsConfigurationCfmSizeof CsrWifiEventCsrUint16Sizeof
663#define CsrWifiSmeWpsConfigurationCfmSerFree CsrWifiSmePfree 663#define CsrWifiSmeWpsConfigurationCfmSerFree CsrWifiSmePfree
664 664
665
666#ifdef __cplusplus
667}
668#endif
669#endif /* CSR_WIFI_SME_SERIALIZE_H__ */ 665#endif /* CSR_WIFI_SME_SERIALIZE_H__ */
670 666
diff --git a/drivers/staging/csr/csr_wifi_sme_task.h b/drivers/staging/csr/csr_wifi_sme_task.h
index 0f725e454939..1e938c1fa964 100644
--- a/drivers/staging/csr/csr_wifi_sme_task.h
+++ b/drivers/staging/csr/csr_wifi_sme_task.h
@@ -1,10 +1,10 @@
1/***************************************************************************** 1/*****************************************************************************
2 2
3 (c) Cambridge Silicon Radio Limited 2011 3 (c) Cambridge Silicon Radio Limited 2011
4 All rights reserved and confidential information of CSR 4 All rights reserved and confidential information of CSR
5 5
6 Refer to LICENSE.txt included with this source for details 6 Refer to LICENSE.txt included with this source for details
7 on the license terms. 7 on the license terms.
8 8
9*****************************************************************************/ 9*****************************************************************************/
10 10
@@ -15,19 +15,11 @@
15 15
16#include "csr_sched.h" 16#include "csr_sched.h"
17 17
18#ifdef __cplusplus
19extern "C" {
20#endif
21
22#define CSR_WIFI_SME_LOG_ID 0x1202FFFF 18#define CSR_WIFI_SME_LOG_ID 0x1202FFFF
23extern CsrSchedQid CSR_WIFI_SME_IFACEQUEUE; 19extern CsrSchedQid CSR_WIFI_SME_IFACEQUEUE;
24void CsrWifiSmeInit(void **gash); 20void CsrWifiSmeInit(void **gash);
25void CsrWifiSmeDeinit(void **gash); 21void CsrWifiSmeDeinit(void **gash);
26void CsrWifiSmeHandler(void **gash); 22void CsrWifiSmeHandler(void **gash);
27 23
28#ifdef __cplusplus
29}
30#endif
31
32#endif /* CSR_WIFI_SME_TASK_H__ */ 24#endif /* CSR_WIFI_SME_TASK_H__ */
33 25
diff --git a/drivers/staging/csr/csr_wifi_vif_utils.h b/drivers/staging/csr/csr_wifi_vif_utils.h
index 523172d1ac92..8ff97888996d 100644
--- a/drivers/staging/csr/csr_wifi_vif_utils.h
+++ b/drivers/staging/csr/csr_wifi_vif_utils.h
@@ -11,10 +11,6 @@
11#ifndef CSR_WIFI_VIF_UTILS_H 11#ifndef CSR_WIFI_VIF_UTILS_H
12#define CSR_WIFI_VIF_UTILS_H 12#define CSR_WIFI_VIF_UTILS_H
13 13
14#ifdef __cplusplus
15extern "C" {
16#endif
17
18/* STANDARD INCLUDES ********************************************************/ 14/* STANDARD INCLUDES ********************************************************/
19 15
20/* PROJECT INCLUDES *********************************************************/ 16/* PROJECT INCLUDES *********************************************************/
@@ -27,82 +23,5 @@ extern "C" {
27#define CSR_WIFI_NUM_INTERFACES (u8)0x1 23#define CSR_WIFI_NUM_INTERFACES (u8)0x1
28#define CSR_WIFI_INTERFACE_IN_USE (u16)0x0 24#define CSR_WIFI_INTERFACE_IN_USE (u16)0x0
29 25
30/* This is used at places where interface Id isn't available*/
31#define CSR_WIFI_INTERFACE_ZERO 0
32#define CSR_WIFI_INTERFACE_STA 0
33#define CSR_WIFI_INTERFACE_AMP 0
34
35
36#define CSR_WIFI_VIF_UTILS_UNDEFINED_TAG 0xFFFF
37
38/* Extract the Interface Id from the event */
39#define CsrWifiVifUtilsGetVifTagFromEvent(msg) \
40 ((u16) * ((u16 *) ((u8 *) (msg) + sizeof(CsrWifiFsmEvent))))
41
42/* The HPI Vif combines the type and the interface id */
43#define CsrWifiVifUtilsGetVifTagFromHipEvent(msg) \
44 ((msg)->virtualInterfaceIdentifier & 0x00FF)
45
46#define CsrWifiVifUtilsPackHipEventVif(type, interfaceId) \
47 ((u16)((interfaceId) | ((type) << 8)))
48
49
50/* TYPES DEFINITIONS ********************************************************/
51
52/* GLOBAL VARIABLE DECLARATIONS *********************************************/
53
54/* PUBLIC FUNCTION PROTOTYPES ***********************************************/
55
56/**
57 * @brief
58 * First checks if the mode is supported capability bitmap of the interface.
59 * If this succeeds, then checks if running this mode on this interface is allowed.
60 *
61 * @param[in] u8 : interface capability bitmap
62 * @param[in] u8* : pointer to the array of current interface modes
63 * @param[in] u16 : interfaceTag
64 * @param[in] CsrWifiInterfaceMode : mode
65 *
66 * @return
67 * u8 : returns true if the interface is allowed to operate in the mode otherwise false.
68 */
69extern u8 CsrWifiVifUtilsCheckCompatibility(u8 interfaceCapability,
70 u8 *currentInterfaceModes,
71 u16 interfaceTag,
72 CsrWifiInterfaceMode mode);
73
74/**
75 * @brief
76 * Checks if the specified interface is supported.
77 * NOTE: Only checks that the interface is supported, no checks are made to
78 * determine whether a supported interface may be made active.
79 *
80 * @param[in] u16 : interfaceTag
81 *
82 * @return
83 * u8 : returns true if the interface is supported, otherwise false.
84 */
85extern u8 CsrWifiVifUtilsIsSupported(u16 interfaceTag);
86
87#ifdef CSR_LOG_ENABLE
88/**
89 * @brief
90 * Registers the virtual interface utils logging details.
91 * Should only be called once at initialisation.
92 *
93 * @param[in/out] None
94 *
95 * @return
96 * None
97 */
98void CsrWifiVifUtilsLogTextRegister(void);
99#else
100#define CsrWifiVifUtilsLogTextRegister()
101#endif
102
103#ifdef __cplusplus
104}
105#endif
106
107#endif /* CSR_WIFI_VIF_UTILS_H */ 26#endif /* CSR_WIFI_VIF_UTILS_H */
108 27
diff --git a/drivers/staging/csr/data_tx.c b/drivers/staging/csr/data_tx.c
index 8ed7a7845cc6..9e3d8b8ab02c 100644
--- a/drivers/staging/csr/data_tx.c
+++ b/drivers/staging/csr/data_tx.c
@@ -18,33 +18,30 @@
18int 18int
19uf_verify_m4(unifi_priv_t *priv, const unsigned char *packet, unsigned int length) 19uf_verify_m4(unifi_priv_t *priv, const unsigned char *packet, unsigned int length)
20{ 20{
21 const unsigned char *p = packet; 21 const unsigned char *p = packet;
22 u16 keyinfo; 22 u16 keyinfo;
23 23
24 24
25 if (length < (4 + 5 + 8 + 32 + 16 + 8 + 8 + 16 + 1 + 8)) { 25 if (length < (4 + 5 + 8 + 32 + 16 + 8 + 8 + 16 + 1 + 8))
26 return 1; 26 return 1;
27 }
28 27
29 p += 8; 28 p += 8;
30 keyinfo = p[5] << 8 | p[6]; /* big-endian */ 29 keyinfo = p[5] << 8 | p[6]; /* big-endian */
31 if ( 30 if (
32 (p[0] == 1 || p[0] == 2) /* protocol version 802.1X-2001 (WPA) or -2004 (WPA2) */ && 31 (p[0] == 1 || p[0] == 2) /* protocol version 802.1X-2001 (WPA) or -2004 (WPA2) */ &&
33 p[1] == 3 /* EAPOL-Key */ && 32 p[1] == 3 /* EAPOL-Key */ &&
34 /* don't bother checking p[2] p[3] (hh ll, packet body length) */ 33 /* don't bother checking p[2] p[3] (hh ll, packet body length) */
35 (p[4] == 254 || p[4] == 2) /* descriptor type P802.1i-D3.0 (WPA) or 802.11i-2004 (WPA2) */ && 34 (p[4] == 254 || p[4] == 2) /* descriptor type P802.1i-D3.0 (WPA) or 802.11i-2004 (WPA2) */ &&
36 ((keyinfo & 0x0007) == 1 || (keyinfo & 0x0007) == 2) /* key descriptor version */ && 35 ((keyinfo & 0x0007) == 1 || (keyinfo & 0x0007) == 2) /* key descriptor version */ &&
37 (keyinfo & ~0x0207U) == 0x0108 && /* key info for 4/4 or 4/2 -- ignore key desc version and sec bit (since varies in WPA 4/4) */ 36 (keyinfo & ~0x0207U) == 0x0108 && /* key info for 4/4 or 4/2 -- ignore key desc version and sec bit (since varies in WPA 4/4) */
38 (p[4 + 5 + 8 + 32 + 16 + 8 + 8 + 16 + 0] == 0 && /* key data length (2 octets) 0 for 4/4 only */ 37 (p[4 + 5 + 8 + 32 + 16 + 8 + 8 + 16 + 0] == 0 && /* key data length (2 octets) 0 for 4/4 only */
39 p[4 + 5 + 8 + 32 + 16 + 8 + 8 + 16 + 1] == 0) 38 p[4 + 5 + 8 + 32 + 16 + 8 + 8 + 16 + 1] == 0)
40 ) { 39 ) {
41 unifi_trace(priv, UDBG1, "uf_verify_m4: M4 detected \n"); 40 unifi_trace(priv, UDBG1, "uf_verify_m4: M4 detected\n");
42 return 0; 41 return 0;
43 } 42 } else {
44 else 43 return 1;
45 { 44 }
46 return 1;
47 }
48} 45}
49 46
50/* 47/*
diff --git a/drivers/staging/csr/drv.c b/drivers/staging/csr/drv.c
index 249758076a75..4780c32c2fe3 100644
--- a/drivers/staging/csr/drv.c
+++ b/drivers/staging/csr/drv.c
@@ -166,33 +166,32 @@ s32 CsrHipResultToStatus(CsrResult csrResult)
166static const char* 166static const char*
167trace_putest_cmdid(unifi_putest_command_t putest_cmd) 167trace_putest_cmdid(unifi_putest_command_t putest_cmd)
168{ 168{
169 switch (putest_cmd) 169 switch (putest_cmd) {
170 { 170 case UNIFI_PUTEST_START:
171 case UNIFI_PUTEST_START: 171 return "START";
172 return "START"; 172 case UNIFI_PUTEST_STOP:
173 case UNIFI_PUTEST_STOP: 173 return "STOP";
174 return "STOP"; 174 case UNIFI_PUTEST_SET_SDIO_CLOCK:
175 case UNIFI_PUTEST_SET_SDIO_CLOCK: 175 return "SET CLOCK";
176 return "SET CLOCK"; 176 case UNIFI_PUTEST_CMD52_READ:
177 case UNIFI_PUTEST_CMD52_READ: 177 return "CMD52R";
178 return "CMD52R"; 178 case UNIFI_PUTEST_CMD52_BLOCK_READ:
179 case UNIFI_PUTEST_CMD52_BLOCK_READ: 179 return "CMD52BR";
180 return "CMD52BR"; 180 case UNIFI_PUTEST_CMD52_WRITE:
181 case UNIFI_PUTEST_CMD52_WRITE: 181 return "CMD52W";
182 return "CMD52W"; 182 case UNIFI_PUTEST_DL_FW:
183 case UNIFI_PUTEST_DL_FW: 183 return "D/L FW";
184 return "D/L FW"; 184 case UNIFI_PUTEST_DL_FW_BUFF:
185 case UNIFI_PUTEST_DL_FW_BUFF: 185 return "D/L FW BUFFER";
186 return "D/L FW BUFFER"; 186 case UNIFI_PUTEST_COREDUMP_PREPARE:
187 case UNIFI_PUTEST_COREDUMP_PREPARE: 187 return "PREPARE COREDUMP";
188 return "PREPARE COREDUMP"; 188 case UNIFI_PUTEST_GP_READ16:
189 case UNIFI_PUTEST_GP_READ16: 189 return "GP16R";
190 return "GP16R"; 190 case UNIFI_PUTEST_GP_WRITE16:
191 case UNIFI_PUTEST_GP_WRITE16: 191 return "GP16W";
192 return "GP16W"; 192 default:
193 default: 193 return "ERROR: unrecognised command";
194 return "ERROR: unrecognised command"; 194 }
195 }
196 } 195 }
197 196
198#ifdef CSR_WIFI_HIP_DEBUG_OFFLINE 197#ifdef CSR_WIFI_HIP_DEBUG_OFFLINE
@@ -266,8 +265,6 @@ unifi_open(struct inode *inode, struct file *file)
266 unifi_priv_t *priv; 265 unifi_priv_t *priv;
267 ul_client_t *udi_cli; 266 ul_client_t *udi_cli;
268 267
269 func_enter();
270
271 devno = MINOR(inode->i_rdev) >> 1; 268 devno = MINOR(inode->i_rdev) >> 1;
272 269
273 /* 270 /*
@@ -278,7 +275,6 @@ unifi_open(struct inode *inode, struct file *file)
278 priv = uf_get_instance(devno); 275 priv = uf_get_instance(devno);
279 if (priv == NULL) { 276 if (priv == NULL) {
280 unifi_error(NULL, "unifi_open: No device present\n"); 277 unifi_error(NULL, "unifi_open: No device present\n");
281 func_exit();
282 return -ENODEV; 278 return -ENODEV;
283 } 279 }
284 280
@@ -290,7 +286,6 @@ unifi_open(struct inode *inode, struct file *file)
290 /* Too many clients already using this device */ 286 /* Too many clients already using this device */
291 unifi_error(priv, "Too many clients already open\n"); 287 unifi_error(priv, "Too many clients already open\n");
292 uf_put_instance(devno); 288 uf_put_instance(devno);
293 func_exit();
294 return -ENOSPC; 289 return -ENOSPC;
295 } 290 }
296 unifi_trace(priv, UDBG1, "Client is registered to /dev/unifiudi%d\n", devno); 291 unifi_trace(priv, UDBG1, "Client is registered to /dev/unifiudi%d\n", devno);
@@ -310,7 +305,6 @@ unifi_open(struct inode *inode, struct file *file)
310 uf_put_instance(devno); 305 uf_put_instance(devno);
311 306
312 unifi_info(priv, "There is already a configuration client using the character device\n"); 307 unifi_info(priv, "There is already a configuration client using the character device\n");
313 func_exit();
314 return -EBUSY; 308 return -EBUSY;
315 } 309 }
316#endif /* CSR_SME_USERSPACE */ 310#endif /* CSR_SME_USERSPACE */
@@ -331,7 +325,6 @@ unifi_open(struct inode *inode, struct file *file)
331 uf_put_instance(devno); 325 uf_put_instance(devno);
332 326
333 unifi_error(priv, "Too many clients already open\n"); 327 unifi_error(priv, "Too many clients already open\n");
334 func_exit();
335 return -ENOSPC; 328 return -ENOSPC;
336 } 329 }
337 330
@@ -357,7 +350,6 @@ unifi_open(struct inode *inode, struct file *file)
357 */ 350 */
358 file->private_data = udi_cli; 351 file->private_data = udi_cli;
359 352
360 func_exit();
361 return 0; 353 return 0;
362} /* unifi_open() */ 354} /* unifi_open() */
363 355
@@ -369,8 +361,6 @@ unifi_release(struct inode *inode, struct file *filp)
369 int devno; 361 int devno;
370 unifi_priv_t *priv; 362 unifi_priv_t *priv;
371 363
372 func_enter();
373
374 priv = uf_find_instance(udi_cli->instance); 364 priv = uf_find_instance(udi_cli->instance);
375 if (!priv) { 365 if (!priv) {
376 unifi_error(priv, "unifi_close: instance for device not found\n"); 366 unifi_error(priv, "unifi_close: instance for device not found\n");
@@ -465,8 +455,6 @@ unifi_read(struct file *filp, char *p, size_t len, loff_t *poff)
465 struct list_head *l; 455 struct list_head *l;
466 int msglen; 456 int msglen;
467 457
468 func_enter();
469
470 priv = uf_find_instance(pcli->instance); 458 priv = uf_find_instance(pcli->instance);
471 if (!priv) { 459 if (!priv) {
472 unifi_error(priv, "invalid priv\n"); 460 unifi_error(priv, "invalid priv\n");
@@ -527,7 +515,6 @@ unifi_read(struct file *filp, char *p, size_t len, loff_t *poff)
527 /* It is our resposibility to free the message buffer. */ 515 /* It is our resposibility to free the message buffer. */
528 kfree(logptr); 516 kfree(logptr);
529 517
530 func_exit_r(msglen);
531 return msglen; 518 return msglen;
532 519
533} /* unifi_read() */ 520} /* unifi_read() */
@@ -615,7 +602,6 @@ udi_send_signal_unpacked(unifi_priv_t *priv, unsigned char* data, uint data_len)
615 unifi_net_data_free(priv, &bulk_data.d[i]); 602 unifi_net_data_free(priv, &bulk_data.d[i]);
616 } 603 }
617 } 604 }
618 func_exit();
619 return -EIO; 605 return -EIO;
620 } 606 }
621 607
@@ -654,8 +640,6 @@ udi_send_signal_raw(unifi_priv_t *priv, unsigned char *buf, int buflen)
654 int bytecount; 640 int bytecount;
655 CsrResult csrResult; 641 CsrResult csrResult;
656 642
657 func_enter();
658
659 /* 643 /*
660 * The signal is the first thing in buf, the signal id is the 644 * The signal is the first thing in buf, the signal id is the
661 * first 16 bits of the signal. 645 * first 16 bits of the signal.
@@ -668,7 +652,6 @@ udi_send_signal_raw(unifi_priv_t *priv, unsigned char *buf, int buflen)
668 if ((signal_size <= 0) || (signal_size > buflen)) { 652 if ((signal_size <= 0) || (signal_size > buflen)) {
669 unifi_error(priv, "udi_send_signal_raw - Couldn't find length of signal 0x%x\n", 653 unifi_error(priv, "udi_send_signal_raw - Couldn't find length of signal 0x%x\n",
670 sig_id); 654 sig_id);
671 func_exit();
672 return -EINVAL; 655 return -EINVAL;
673 } 656 }
674 unifi_trace(priv, UDBG2, "udi_send_signal_raw: signal 0x%.4X len:%d\n", 657 unifi_trace(priv, UDBG2, "udi_send_signal_raw: signal 0x%.4X len:%d\n",
@@ -713,7 +696,6 @@ udi_send_signal_raw(unifi_priv_t *priv, unsigned char *buf, int buflen)
713 696
714 if (bytecount > buflen) { 697 if (bytecount > buflen) {
715 unifi_error(priv, "udi_send_signal_raw: Not enough data (%d instead of %d)\n", buflen, bytecount); 698 unifi_error(priv, "udi_send_signal_raw: Not enough data (%d instead of %d)\n", buflen, bytecount);
716 func_exit();
717 return -EINVAL; 699 return -EINVAL;
718 } 700 }
719 701
@@ -721,7 +703,6 @@ udi_send_signal_raw(unifi_priv_t *priv, unsigned char *buf, int buflen)
721 r = ul_send_signal_raw(priv, buf, signal_size, &data_ptrs); 703 r = ul_send_signal_raw(priv, buf, signal_size, &data_ptrs);
722 if (r < 0) { 704 if (r < 0) {
723 unifi_error(priv, "udi_send_signal_raw: send failed (%d)\n", r); 705 unifi_error(priv, "udi_send_signal_raw: send failed (%d)\n", r);
724 func_exit();
725 return -EIO; 706 return -EIO;
726 } 707 }
727 708
@@ -746,8 +727,6 @@ udi_send_signal_raw(unifi_priv_t *priv, unsigned char *buf, int buflen)
746 } 727 }
747#endif 728#endif
748 729
749 func_exit_r(bytecount);
750
751 return bytecount; 730 return bytecount;
752} /* udi_send_signal_raw */ 731} /* udi_send_signal_raw */
753 732
@@ -784,8 +763,6 @@ unifi_write(struct file *filp, const char *p, size_t len, loff_t *poff)
784 bulk_data_param_t bulkdata; 763 bulk_data_param_t bulkdata;
785 CsrResult csrResult; 764 CsrResult csrResult;
786 765
787 func_enter();
788
789 priv = uf_find_instance(pcli->instance); 766 priv = uf_find_instance(pcli->instance);
790 if (!priv) { 767 if (!priv) {
791 unifi_error(priv, "invalid priv\n"); 768 unifi_error(priv, "invalid priv\n");
@@ -812,7 +789,6 @@ unifi_write(struct file *filp, const char *p, size_t len, loff_t *poff)
812 csrResult = unifi_net_data_malloc(priv, &bulkdata.d[0], len); 789 csrResult = unifi_net_data_malloc(priv, &bulkdata.d[0], len);
813 if (csrResult != CSR_RESULT_SUCCESS) { 790 if (csrResult != CSR_RESULT_SUCCESS) {
814 unifi_error(priv, "unifi_write: failed to allocate request_data.\n"); 791 unifi_error(priv, "unifi_write: failed to allocate request_data.\n");
815 func_exit();
816 return -ENOMEM; 792 return -ENOMEM;
817 } 793 }
818 794
@@ -822,7 +798,6 @@ unifi_write(struct file *filp, const char *p, size_t len, loff_t *poff)
822 if (copy_from_user((void*)user_data_buf, p, len)) { 798 if (copy_from_user((void*)user_data_buf, p, len)) {
823 unifi_error(priv, "unifi_write: copy from user failed\n"); 799 unifi_error(priv, "unifi_write: copy from user failed\n");
824 unifi_net_data_free(priv, &bulkdata.d[0]); 800 unifi_net_data_free(priv, &bulkdata.d[0]);
825 func_exit();
826 return -EFAULT; 801 return -EFAULT;
827 } 802 }
828 803
@@ -838,7 +813,6 @@ unifi_write(struct file *filp, const char *p, size_t len, loff_t *poff)
838 unifi_error(priv, "unifi_write - Couldn't find length of signal 0x%x\n", 813 unifi_error(priv, "unifi_write - Couldn't find length of signal 0x%x\n",
839 sig_id); 814 sig_id);
840 unifi_net_data_free(priv, &bulkdata.d[0]); 815 unifi_net_data_free(priv, &bulkdata.d[0]);
841 func_exit();
842 return -EINVAL; 816 return -EINVAL;
843 } 817 }
844 818
@@ -849,7 +823,6 @@ unifi_write(struct file *filp, const char *p, size_t len, loff_t *poff)
849 signal_buf = kmalloc(signal_size, GFP_KERNEL); 823 signal_buf = kmalloc(signal_size, GFP_KERNEL);
850 if (!signal_buf) { 824 if (!signal_buf) {
851 unifi_net_data_free(priv, &bulkdata.d[0]); 825 unifi_net_data_free(priv, &bulkdata.d[0]);
852 func_exit();
853 return -ENOMEM; 826 return -ENOMEM;
854 } 827 }
855 828
@@ -948,8 +921,6 @@ unifi_write(struct file *filp, const char *p, size_t len, loff_t *poff)
948 921
949 kfree(buf); 922 kfree(buf);
950 923
951 func_exit_r(bytes_written);
952
953 return bytes_written; 924 return bytes_written;
954} /* unifi_write() */ 925} /* unifi_write() */
955 926
@@ -1657,8 +1628,6 @@ unifi_poll(struct file *filp, poll_table *wait)
1657 unsigned int mask = 0; 1628 unsigned int mask = 0;
1658 int ready; 1629 int ready;
1659 1630
1660 func_enter();
1661
1662 ready = !list_empty(&pcli->udi_log); 1631 ready = !list_empty(&pcli->udi_log);
1663 1632
1664 poll_wait(filp, &pcli->udi_wq, wait); 1633 poll_wait(filp, &pcli->udi_wq, wait);
@@ -1667,8 +1636,6 @@ unifi_poll(struct file *filp, poll_table *wait)
1667 mask |= POLLIN | POLLRDNORM; /* readable */ 1636 mask |= POLLIN | POLLRDNORM; /* readable */
1668 } 1637 }
1669 1638
1670 func_exit();
1671
1672 return mask; 1639 return mask;
1673} /* unifi_poll() */ 1640} /* unifi_poll() */
1674 1641
@@ -1784,8 +1751,6 @@ udi_log_event(ul_client_t *pcli,
1784 unsigned long n_1000; 1751 unsigned long n_1000;
1785#endif 1752#endif
1786 1753
1787 func_enter();
1788
1789 /* Just a sanity check */ 1754 /* Just a sanity check */
1790 if ((signal == NULL) || (signal_len <= 0)) { 1755 if ((signal == NULL) || (signal_len <= 0)) {
1791 return; 1756 return;
@@ -1901,7 +1866,6 @@ udi_log_event(ul_client_t *pcli,
1901 if (down_interruptible(&pcli->udi_sem)) { 1866 if (down_interruptible(&pcli->udi_sem)) {
1902 printk(KERN_WARNING "udi_log_event_q: Failed to get udi sem\n"); 1867 printk(KERN_WARNING "udi_log_event_q: Failed to get udi sem\n");
1903 kfree(logptr); 1868 kfree(logptr);
1904 func_exit();
1905 return; 1869 return;
1906 } 1870 }
1907 list_add_tail(&logptr->q, &pcli->udi_log); 1871 list_add_tail(&logptr->q, &pcli->udi_log);
@@ -1910,7 +1874,6 @@ udi_log_event(ul_client_t *pcli,
1910 /* Wake any waiting user process */ 1874 /* Wake any waiting user process */
1911 wake_up_interruptible(&pcli->udi_wq); 1875 wake_up_interruptible(&pcli->udi_wq);
1912 1876
1913 func_exit();
1914} /* udi_log_event() */ 1877} /* udi_log_event() */
1915 1878
1916#ifdef CSR_SME_USERSPACE 1879#ifdef CSR_SME_USERSPACE
@@ -1921,8 +1884,6 @@ uf_sme_queue_message(unifi_priv_t *priv, u8 *buffer, int length)
1921 udi_msg_t *msgptr; 1884 udi_msg_t *msgptr;
1922 u8 *p; 1885 u8 *p;
1923 1886
1924 func_enter();
1925
1926 /* Just a sanity check */ 1887 /* Just a sanity check */
1927 if ((buffer == NULL) || (length <= 0)) { 1888 if ((buffer == NULL) || (length <= 0)) {
1928 return -EINVAL; 1889 return -EINVAL;
@@ -1968,8 +1929,6 @@ uf_sme_queue_message(unifi_priv_t *priv, u8 *buffer, int length)
1968 /* It is our responsibility to free the buffer allocated in build_packed_*() */ 1929 /* It is our responsibility to free the buffer allocated in build_packed_*() */
1969 kfree(buffer); 1930 kfree(buffer);
1970 1931
1971 func_exit();
1972
1973 return 0; 1932 return 0;
1974 1933
1975} /* uf_sme_queue_message() */ 1934} /* uf_sme_queue_message() */
@@ -2059,10 +2018,10 @@ int uf_create_device_nodes(unifi_priv_t *priv, int bus_id)
2059 2018
2060void uf_destroy_device_nodes(unifi_priv_t *priv) 2019void uf_destroy_device_nodes(unifi_priv_t *priv)
2061{ 2020{
2062 device_destroy(unifi_class, priv->unifiudi_cdev.dev); 2021 device_destroy(unifi_class, priv->unifiudi_cdev.dev);
2063 device_destroy(unifi_class, priv->unifi_cdev.dev); 2022 device_destroy(unifi_class, priv->unifi_cdev.dev);
2064 cdev_del(&priv->unifiudi_cdev); 2023 cdev_del(&priv->unifiudi_cdev);
2065 cdev_del(&priv->unifi_cdev); 2024 cdev_del(&priv->unifi_cdev);
2066} 2025}
2067 2026
2068 2027
diff --git a/drivers/staging/csr/firmware.c b/drivers/staging/csr/firmware.c
index b6d8a6e52915..b42a4d6a0c36 100644
--- a/drivers/staging/csr/firmware.c
+++ b/drivers/staging/csr/firmware.c
@@ -62,8 +62,6 @@ unifi_fw_read_start(void *ospriv, s8 is_fw, const card_info_t *info)
62 unifi_priv_t *priv = (unifi_priv_t*)ospriv; 62 unifi_priv_t *priv = (unifi_priv_t*)ospriv;
63 CSR_UNUSED(info); 63 CSR_UNUSED(info);
64 64
65 func_enter();
66
67 if (is_fw == UNIFI_FW_STA) { 65 if (is_fw == UNIFI_FW_STA) {
68 /* F/w may have been released after a previous successful download. */ 66 /* F/w may have been released after a previous successful download. */
69 if (priv->fw_sta.dl_data == NULL) { 67 if (priv->fw_sta.dl_data == NULL) {
@@ -72,7 +70,6 @@ unifi_fw_read_start(void *ospriv, s8 is_fw, const card_info_t *info)
72 } 70 }
73 /* Set up callback struct for readfunc() */ 71 /* Set up callback struct for readfunc() */
74 if (priv->fw_sta.dl_data != NULL) { 72 if (priv->fw_sta.dl_data != NULL) {
75 func_exit();
76 return &priv->fw_sta; 73 return &priv->fw_sta;
77 } 74 }
78 75
@@ -80,7 +77,6 @@ unifi_fw_read_start(void *ospriv, s8 is_fw, const card_info_t *info)
80 unifi_error(priv, "downloading firmware... unknown request: %d\n", is_fw); 77 unifi_error(priv, "downloading firmware... unknown request: %d\n", is_fw);
81 } 78 }
82 79
83 func_exit();
84 return NULL; 80 return NULL;
85} /* unifi_fw_read_start() */ 81} /* unifi_fw_read_start() */
86 82
@@ -105,7 +101,6 @@ unifi_fw_read_stop(void *ospriv, void *dlpriv)
105{ 101{
106 unifi_priv_t *priv = (unifi_priv_t*)ospriv; 102 unifi_priv_t *priv = (unifi_priv_t*)ospriv;
107 struct dlpriv *dl_struct = (struct dlpriv *)dlpriv; 103 struct dlpriv *dl_struct = (struct dlpriv *)dlpriv;
108 func_enter();
109 104
110 if (dl_struct != NULL) { 105 if (dl_struct != NULL) {
111 if (dl_struct->dl_data != NULL) { 106 if (dl_struct->dl_data != NULL) {
@@ -115,7 +110,6 @@ unifi_fw_read_stop(void *ospriv, void *dlpriv)
115 uf_release_firmware(priv, dl_struct); 110 uf_release_firmware(priv, dl_struct);
116 } 111 }
117 112
118 func_exit();
119} /* unifi_fw_read_stop() */ 113} /* unifi_fw_read_stop() */
120 114
121 115
@@ -143,17 +137,14 @@ void *
143unifi_fw_open_buffer(void *ospriv, void *fwbuf, u32 len) 137unifi_fw_open_buffer(void *ospriv, void *fwbuf, u32 len)
144{ 138{
145 unifi_priv_t *priv = (unifi_priv_t*)ospriv; 139 unifi_priv_t *priv = (unifi_priv_t*)ospriv;
146 func_enter();
147 140
148 if (fwbuf == NULL) { 141 if (fwbuf == NULL) {
149 func_exit();
150 return NULL; 142 return NULL;
151 } 143 }
152 priv->fw_conv.dl_data = fwbuf; 144 priv->fw_conv.dl_data = fwbuf;
153 priv->fw_conv.dl_len = len; 145 priv->fw_conv.dl_len = len;
154 priv->fw_conv.fw_desc = NULL; /* No OS f/w resource is associated */ 146 priv->fw_conv.fw_desc = NULL; /* No OS f/w resource is associated */
155 147
156 func_exit();
157 return &priv->fw_conv; 148 return &priv->fw_conv;
158} 149}
159 150
@@ -242,8 +233,6 @@ unifi_fw_read(void *ospriv, void *arg, u32 offset, void *buf, u32 len)
242int 233int
243uf_run_unifihelper(unifi_priv_t *priv) 234uf_run_unifihelper(unifi_priv_t *priv)
244{ 235{
245#ifdef CONFIG_HOTPLUG
246
247#ifdef ANDROID_BUILD 236#ifdef ANDROID_BUILD
248 char *prog = "/system/bin/unififw"; 237 char *prog = "/system/bin/unififw";
249#else 238#else
@@ -289,10 +278,6 @@ uf_run_unifihelper(unifi_priv_t *priv)
289 r = call_usermodehelper(argv[0], argv, envp, UMH_WAIT_EXEC); 278 r = call_usermodehelper(argv[0], argv, envp, UMH_WAIT_EXEC);
290 279
291 return r; 280 return r;
292#else
293 unifi_trace(priv, UDBG1, "Can't automatically download firmware because kernel does not have HOTPLUG\n");
294 return -1;
295#endif
296} /* uf_run_unifihelper() */ 281} /* uf_run_unifihelper() */
297 282
298#ifdef CSR_WIFI_SPLIT_PATCH 283#ifdef CSR_WIFI_SPLIT_PATCH
diff --git a/drivers/staging/csr/inet.c b/drivers/staging/csr/inet.c
index b4acb54ecc62..b3ef818fef35 100644
--- a/drivers/staging/csr/inet.c
+++ b/drivers/staging/csr/inet.c
@@ -93,14 +93,12 @@ static struct notifier_block uf_inetaddr_notifier = {
93 93
94void uf_register_inet_notifier(void) 94void uf_register_inet_notifier(void)
95{ 95{
96 if (atomic_inc_return(&inet_notif_refs) == 1) { 96 if (atomic_inc_return(&inet_notif_refs) == 1)
97 register_inetaddr_notifier(&uf_inetaddr_notifier); 97 register_inetaddr_notifier(&uf_inetaddr_notifier);
98 }
99} 98}
100 99
101void uf_unregister_inet_notifier(void) 100void uf_unregister_inet_notifier(void)
102{ 101{
103 if (atomic_dec_return(&inet_notif_refs) == 0) { 102 if (atomic_dec_return(&inet_notif_refs) == 0)
104 unregister_inetaddr_notifier(&uf_inetaddr_notifier); 103 unregister_inetaddr_notifier(&uf_inetaddr_notifier);
105 }
106} 104}
diff --git a/drivers/staging/csr/io.c b/drivers/staging/csr/io.c
index caf48e3120ca..af9c28f073b9 100644
--- a/drivers/staging/csr/io.c
+++ b/drivers/staging/csr/io.c
@@ -31,7 +31,6 @@
31 * --------------------------------------------------------------------------- 31 * ---------------------------------------------------------------------------
32 */ 32 */
33#include <linux/proc_fs.h> 33#include <linux/proc_fs.h>
34#include <linux/version.h>
35 34
36#include "csr_wifi_hip_unifi.h" 35#include "csr_wifi_hip_unifi.h"
37#include "csr_wifi_hip_unifiversion.h" 36#include "csr_wifi_hip_unifiversion.h"
@@ -86,7 +85,6 @@ static int uf_read_proc(char *page, char **start, off_t offset, int count,
86static CsrResult signal_buffer_init(unifi_priv_t * priv, int size) 85static CsrResult signal_buffer_init(unifi_priv_t * priv, int size)
87{ 86{
88 int i; 87 int i;
89 func_enter();
90 88
91 priv->rxSignalBuffer.writePointer = 89 priv->rxSignalBuffer.writePointer =
92 priv->rxSignalBuffer.readPointer = 0; 90 priv->rxSignalBuffer.readPointer = 0;
@@ -106,11 +104,9 @@ static CsrResult signal_buffer_init(unifi_priv_t * priv, int size)
106 kfree(priv->rxSignalBuffer.rx_buff[j].bufptr); 104 kfree(priv->rxSignalBuffer.rx_buff[j].bufptr);
107 priv->rxSignalBuffer.rx_buff[j].bufptr = NULL; 105 priv->rxSignalBuffer.rx_buff[j].bufptr = NULL;
108 } 106 }
109 func_exit();
110 return -1; 107 return -1;
111 } 108 }
112 } 109 }
113 func_exit();
114 return 0; 110 return 0;
115} 111}
116 112
@@ -265,8 +261,6 @@ register_unifi_sdio(CsrSdioFunction *sdio_dev, int bus_id, struct device *dev)
265 int r = -1; 261 int r = -1;
266 CsrResult csrResult; 262 CsrResult csrResult;
267 263
268 func_enter();
269
270 if ((bus_id < 0) || (bus_id >= MAX_UNIFI_DEVS)) { 264 if ((bus_id < 0) || (bus_id >= MAX_UNIFI_DEVS)) {
271 unifi_error(priv, "register_unifi_sdio: invalid device %d\n", 265 unifi_error(priv, "register_unifi_sdio: invalid device %d\n",
272 bus_id); 266 bus_id);
@@ -415,7 +409,6 @@ register_unifi_sdio(CsrSdioFunction *sdio_dev, int bus_id, struct device *dev)
415 409
416 up(&Unifi_instance_mutex); 410 up(&Unifi_instance_mutex);
417 411
418 func_exit();
419 return priv; 412 return priv;
420 413
421failed4: 414failed4:
@@ -449,7 +442,6 @@ failed0:
449 442
450 up(&Unifi_instance_mutex); 443 up(&Unifi_instance_mutex);
451 444
452 func_exit();
453 return NULL; 445 return NULL;
454} /* register_unifi_sdio() */ 446} /* register_unifi_sdio() */
455 447
@@ -473,7 +465,6 @@ failed0:
473static void 465static void
474ask_unifi_sdio_cleanup(unifi_priv_t *priv) 466ask_unifi_sdio_cleanup(unifi_priv_t *priv)
475{ 467{
476 func_enter();
477 468
478 /* 469 /*
479 * Now clear the flag that says the old instance is in use. 470 * Now clear the flag that says the old instance is in use.
@@ -486,8 +477,6 @@ ask_unifi_sdio_cleanup(unifi_priv_t *priv)
486 unifi_trace(NULL, UDBG5, "ask_unifi_sdio_cleanup: wake up cleanup workqueue.\n"); 477 unifi_trace(NULL, UDBG5, "ask_unifi_sdio_cleanup: wake up cleanup workqueue.\n");
487 wake_up(&Unifi_cleanup_wq); 478 wake_up(&Unifi_cleanup_wq);
488 479
489 func_exit();
490
491} /* ask_unifi_sdio_cleanup() */ 480} /* ask_unifi_sdio_cleanup() */
492 481
493 482
@@ -511,8 +500,6 @@ cleanup_unifi_sdio(unifi_priv_t *priv)
511 int i; 500 int i;
512 static const CsrWifiMacAddress broadcast_address = {{0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF}}; 501 static const CsrWifiMacAddress broadcast_address = {{0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF}};
513 502
514 func_enter();
515
516 /* Remove the device nodes */ 503 /* Remove the device nodes */
517 uf_destroy_device_nodes(priv); 504 uf_destroy_device_nodes(priv);
518 505
@@ -604,8 +591,6 @@ cleanup_unifi_sdio(unifi_priv_t *priv)
604 591
605 unifi_trace(NULL, UDBG5, "cleanup_unifi_sdio: DONE.\n"); 592 unifi_trace(NULL, UDBG5, "cleanup_unifi_sdio: DONE.\n");
606 593
607 func_exit();
608
609} /* cleanup_unifi_sdio() */ 594} /* cleanup_unifi_sdio() */
610 595
611 596
@@ -639,7 +624,6 @@ unregister_unifi_sdio(int bus_id)
639 if (priv == NULL) { 624 if (priv == NULL) {
640 unifi_error(priv, "unregister_unifi_sdio: device %d is not registered\n", 625 unifi_error(priv, "unregister_unifi_sdio: device %d is not registered\n",
641 bus_id); 626 bus_id);
642 func_exit();
643 return; 627 return;
644 } 628 }
645 629
@@ -1016,37 +1000,37 @@ uf_remove_os_device(int bus_id)
1016static void 1000static void
1017uf_sdio_inserted(CsrSdioFunction *sdio_ctx) 1001uf_sdio_inserted(CsrSdioFunction *sdio_ctx)
1018{ 1002{
1019 unifi_priv_t *priv; 1003 unifi_priv_t *priv;
1020 1004
1021 unifi_trace(NULL, UDBG5, "uf_sdio_inserted(0x%p), slot_id=%d, dev=%p\n", 1005 unifi_trace(NULL, UDBG5, "uf_sdio_inserted(0x%p), slot_id=%d, dev=%p\n",
1022 sdio_ctx, active_slot, os_devices[active_slot]); 1006 sdio_ctx, active_slot, os_devices[active_slot]);
1023 1007
1024 priv = register_unifi_sdio(sdio_ctx, active_slot, os_devices[active_slot]); 1008 priv = register_unifi_sdio(sdio_ctx, active_slot, os_devices[active_slot]);
1025 if (priv == NULL) { 1009 if (priv == NULL) {
1026 CsrSdioInsertedAcknowledge(sdio_ctx, CSR_RESULT_FAILURE); 1010 CsrSdioInsertedAcknowledge(sdio_ctx, CSR_RESULT_FAILURE);
1027 return; 1011 return;
1028 } 1012 }
1029 1013
1030 sdio_ctx->driverData = priv; 1014 sdio_ctx->driverData = priv;
1031 1015
1032 CsrSdioInsertedAcknowledge(sdio_ctx, CSR_RESULT_SUCCESS); 1016 CsrSdioInsertedAcknowledge(sdio_ctx, CSR_RESULT_SUCCESS);
1033} /* uf_sdio_inserted() */ 1017} /* uf_sdio_inserted() */
1034 1018
1035 1019
1036static void 1020static void
1037uf_sdio_removed(CsrSdioFunction *sdio_ctx) 1021uf_sdio_removed(CsrSdioFunction *sdio_ctx)
1038{ 1022{
1039 unregister_unifi_sdio(active_slot); 1023 unregister_unifi_sdio(active_slot);
1040 CsrSdioRemovedAcknowledge(sdio_ctx); 1024 CsrSdioRemovedAcknowledge(sdio_ctx);
1041} /* uf_sdio_removed() */ 1025} /* uf_sdio_removed() */
1042 1026
1043 1027
1044static void 1028static void
1045uf_sdio_dsr_handler(CsrSdioFunction *sdio_ctx) 1029uf_sdio_dsr_handler(CsrSdioFunction *sdio_ctx)
1046{ 1030{
1047 unifi_priv_t *priv = sdio_ctx->driverData; 1031 unifi_priv_t *priv = sdio_ctx->driverData;
1048 1032
1049 unifi_sdio_interrupt_handler(priv->card); 1033 unifi_sdio_interrupt_handler(priv->card);
1050} /* uf_sdio_dsr_handler() */ 1034} /* uf_sdio_dsr_handler() */
1051 1035
1052/* 1036/*
@@ -1068,7 +1052,7 @@ uf_sdio_dsr_handler(CsrSdioFunction *sdio_ctx)
1068static CsrSdioInterruptDsrCallback 1052static CsrSdioInterruptDsrCallback
1069uf_sdio_int_handler(CsrSdioFunction *sdio_ctx) 1053uf_sdio_int_handler(CsrSdioFunction *sdio_ctx)
1070{ 1054{
1071 return uf_sdio_dsr_handler; 1055 return uf_sdio_dsr_handler;
1072} /* uf_sdio_int_handler() */ 1056} /* uf_sdio_int_handler() */
1073 1057
1074 1058
@@ -1076,18 +1060,18 @@ uf_sdio_int_handler(CsrSdioFunction *sdio_ctx)
1076 1060
1077static CsrSdioFunctionId unifi_ids[] = 1061static CsrSdioFunctionId unifi_ids[] =
1078{ 1062{
1079 { 1063 {
1080 .manfId = SDIO_MANF_ID_CSR, 1064 .manfId = SDIO_MANF_ID_CSR,
1081 .cardId = SDIO_CARD_ID_UNIFI_3, 1065 .cardId = SDIO_CARD_ID_UNIFI_3,
1082 .sdioFunction = SDIO_WLAN_FUNC_ID_UNIFI_3, 1066 .sdioFunction = SDIO_WLAN_FUNC_ID_UNIFI_3,
1083 .sdioInterface = CSR_SDIO_ANY_SDIO_INTERFACE, 1067 .sdioInterface = CSR_SDIO_ANY_SDIO_INTERFACE,
1084 }, 1068 },
1085 { 1069 {
1086 .manfId = SDIO_MANF_ID_CSR, 1070 .manfId = SDIO_MANF_ID_CSR,
1087 .cardId = SDIO_CARD_ID_UNIFI_4, 1071 .cardId = SDIO_CARD_ID_UNIFI_4,
1088 .sdioFunction = SDIO_WLAN_FUNC_ID_UNIFI_4, 1072 .sdioFunction = SDIO_WLAN_FUNC_ID_UNIFI_4,
1089 .sdioInterface = CSR_SDIO_ANY_SDIO_INTERFACE, 1073 .sdioInterface = CSR_SDIO_ANY_SDIO_INTERFACE,
1090 } 1074 }
1091}; 1075};
1092 1076
1093 1077
@@ -1096,14 +1080,14 @@ static CsrSdioFunctionId unifi_ids[] =
1096 */ 1080 */
1097static CsrSdioFunctionDriver unifi_sdioFunction_drv = 1081static CsrSdioFunctionDriver unifi_sdioFunction_drv =
1098{ 1082{
1099 .inserted = uf_sdio_inserted, 1083 .inserted = uf_sdio_inserted,
1100 .removed = uf_sdio_removed, 1084 .removed = uf_sdio_removed,
1101 .intr = uf_sdio_int_handler, 1085 .intr = uf_sdio_int_handler,
1102 .suspend = uf_lx_suspend, 1086 .suspend = uf_lx_suspend,
1103 .resume = uf_lx_resume, 1087 .resume = uf_lx_resume,
1104 1088
1105 .ids = unifi_ids, 1089 .ids = unifi_ids,
1106 .idsCount = sizeof(unifi_ids) / sizeof(unifi_ids[0]) 1090 .idsCount = sizeof(unifi_ids) / sizeof(unifi_ids[0])
1107}; 1091};
1108 1092
1109 1093
@@ -1126,15 +1110,15 @@ static CsrSdioFunctionDriver unifi_sdioFunction_drv =
1126int __init 1110int __init
1127uf_sdio_load(void) 1111uf_sdio_load(void)
1128{ 1112{
1129 CsrResult csrResult; 1113 CsrResult csrResult;
1130 1114
1131 csrResult = CsrSdioFunctionDriverRegister(&unifi_sdioFunction_drv); 1115 csrResult = CsrSdioFunctionDriverRegister(&unifi_sdioFunction_drv);
1132 if (csrResult != CSR_RESULT_SUCCESS) { 1116 if (csrResult != CSR_RESULT_SUCCESS) {
1133 unifi_error(NULL, "Failed to register UniFi SDIO driver: csrResult=%d\n", csrResult); 1117 unifi_error(NULL, "Failed to register UniFi SDIO driver: csrResult=%d\n", csrResult);
1134 return -EIO; 1118 return -EIO;
1135 } 1119 }
1136 1120
1137 return 0; 1121 return 0;
1138} /* uf_sdio_load() */ 1122} /* uf_sdio_load() */
1139 1123
1140 1124
@@ -1142,6 +1126,6 @@ uf_sdio_load(void)
1142void __exit 1126void __exit
1143uf_sdio_unload(void) 1127uf_sdio_unload(void)
1144{ 1128{
1145 CsrSdioFunctionDriverUnregister(&unifi_sdioFunction_drv); 1129 CsrSdioFunctionDriverUnregister(&unifi_sdioFunction_drv);
1146} /* uf_sdio_unload() */ 1130} /* uf_sdio_unload() */
1147 1131
diff --git a/drivers/staging/csr/mlme.c b/drivers/staging/csr/mlme.c
index ed767eccbb32..861d6b7687c7 100644
--- a/drivers/staging/csr/mlme.c
+++ b/drivers/staging/csr/mlme.c
@@ -154,8 +154,6 @@ unifi_mlme_blocking_request(unifi_priv_t *priv, ul_client_t *pcli,
154{ 154{
155 int r; 155 int r;
156 156
157 func_enter();
158
159 if (sig->SignalPrimitiveHeader.SignalId == 0) { 157 if (sig->SignalPrimitiveHeader.SignalId == 0) {
160 unifi_error(priv, "unifi_mlme_blocking_request: Invalid Signal Id (0x%x)\n", 158 unifi_error(priv, "unifi_mlme_blocking_request: Invalid Signal Id (0x%x)\n",
161 sig->SignalPrimitiveHeader.SignalId); 159 sig->SignalPrimitiveHeader.SignalId);
@@ -199,7 +197,6 @@ unifi_mlme_blocking_request(unifi_priv_t *priv, ul_client_t *pcli,
199 return r; 197 return r;
200 } 198 }
201 199
202 func_exit();
203 return 0; 200 return 0;
204} /* unifi_mlme_blocking_request() */ 201} /* unifi_mlme_blocking_request() */
205 202
diff --git a/drivers/staging/csr/monitor.c b/drivers/staging/csr/monitor.c
index 7c524a18958e..c8e20e4c6111 100644
--- a/drivers/staging/csr/monitor.c
+++ b/drivers/staging/csr/monitor.c
@@ -10,7 +10,6 @@
10 * --------------------------------------------------------------------------- 10 * ---------------------------------------------------------------------------
11 */ 11 */
12 12
13#include <linux/version.h>
14#include "unifi_priv.h" 13#include "unifi_priv.h"
15 14
16#ifdef UNIFI_SNIFF_ARPHRD 15#ifdef UNIFI_SNIFF_ARPHRD
@@ -122,8 +121,6 @@ netrx_radiotap(unifi_priv_t *priv,
122 struct unifi_rx_radiotap_header *unifi_rt; 121 struct unifi_rx_radiotap_header *unifi_rt;
123 int signal, noise, snr; 122 int signal, noise, snr;
124 123
125 func_enter();
126
127 if (ind_data_len <= 0) { 124 if (ind_data_len <= 0) {
128 unifi_error(priv, "Invalid length in CSR_MA_SNIFFDATA_INDICATION.\n"); 125 unifi_error(priv, "Invalid length in CSR_MA_SNIFFDATA_INDICATION.\n");
129 return; 126 return;
@@ -205,7 +202,6 @@ netrx_radiotap(unifi_priv_t *priv,
205 priv->stats.rx_packets++; 202 priv->stats.rx_packets++;
206 priv->stats.rx_bytes += ind_data_len; 203 priv->stats.rx_bytes += ind_data_len;
207 204
208 func_exit();
209} /* netrx_radiotap() */ 205} /* netrx_radiotap() */
210#endif /* RADIOTAP */ 206#endif /* RADIOTAP */
211 207
@@ -256,8 +252,6 @@ netrx_prism(unifi_priv_t *priv,
256 } *avs; 252 } *avs;
257 int signal, noise, snr; 253 int signal, noise, snr;
258 254
259 func_enter();
260
261 if (ind_data_len <= 0) { 255 if (ind_data_len <= 0) {
262 unifi_error(priv, "Invalid length in CSR_MA_SNIFFDATA_INDICATION.\n"); 256 unifi_error(priv, "Invalid length in CSR_MA_SNIFFDATA_INDICATION.\n");
263 return; 257 return;
@@ -319,7 +313,6 @@ netrx_prism(unifi_priv_t *priv,
319 priv->stats.rx_packets++; 313 priv->stats.rx_packets++;
320 priv->stats.rx_bytes += ind_data_len; 314 priv->stats.rx_bytes += ind_data_len;
321 315
322 func_exit();
323} /* netrx_prism() */ 316} /* netrx_prism() */
324#endif /* PRISM */ 317#endif /* PRISM */
325 318
@@ -351,11 +344,8 @@ ma_sniffdata_ind(void *ospriv,
351 struct net_device *dev = priv->netdev; 344 struct net_device *dev = priv->netdev;
352 struct sk_buff *skb = (struct sk_buff*)bulkdata->d[0].os_net_buf_ptr; 345 struct sk_buff *skb = (struct sk_buff*)bulkdata->d[0].os_net_buf_ptr;
353 346
354 func_enter();
355
356 if (bulkdata->d[0].data_length == 0) { 347 if (bulkdata->d[0].data_length == 0) {
357 unifi_warning(priv, "rx: MA-SNIFFDATA indication with zero bulk data\n"); 348 unifi_warning(priv, "rx: MA-SNIFFDATA indication with zero bulk data\n");
358 func_exit();
359 return; 349 return;
360 } 350 }
361 351
diff --git a/drivers/staging/csr/netdev.c b/drivers/staging/csr/netdev.c
index 9a52ab408e1a..7dad26f70175 100644
--- a/drivers/staging/csr/netdev.c
+++ b/drivers/staging/csr/netdev.c
@@ -47,7 +47,6 @@
47#include <linux/etherdevice.h> 47#include <linux/etherdevice.h>
48#include <linux/mutex.h> 48#include <linux/mutex.h>
49#include <linux/semaphore.h> 49#include <linux/semaphore.h>
50#include <linux/version.h>
51#include <linux/vmalloc.h> 50#include <linux/vmalloc.h>
52#include "csr_wifi_hip_unifi.h" 51#include "csr_wifi_hip_unifi.h"
53#include "csr_wifi_hip_conversions.h" 52#include "csr_wifi_hip_conversions.h"
@@ -55,7 +54,7 @@
55#include <net/pkt_sched.h> 54#include <net/pkt_sched.h>
56 55
57 56
58/* Wext handler is suported only if CSR_SUPPORT_WEXT is defined */ 57/* Wext handler is supported only if CSR_SUPPORT_WEXT is defined */
59#ifdef CSR_SUPPORT_WEXT 58#ifdef CSR_SUPPORT_WEXT
60extern struct iw_handler_def unifi_iw_handler_def; 59extern struct iw_handler_def unifi_iw_handler_def;
61#endif /* CSR_SUPPORT_WEXT */ 60#endif /* CSR_SUPPORT_WEXT */
@@ -89,7 +88,7 @@ typedef int (*tx_signal_handler)(unifi_priv_t *priv, struct sk_buff *skb, const
89/* 88/*
90 * The driver uses the qdisc interface to buffer and control all 89 * The driver uses the qdisc interface to buffer and control all
91 * outgoing traffic. We create a root qdisc, register our qdisc operations 90 * outgoing traffic. We create a root qdisc, register our qdisc operations
92 * and later we create two subsiduary pfifo queues for the uncontrolled 91 * and later we create two subsidiary pfifo queues for the uncontrolled
93 * and controlled ports. 92 * and controlled ports.
94 * 93 *
95 * The network stack delivers all outgoing packets in our enqueue handler. 94 * The network stack delivers all outgoing packets in our enqueue handler.
@@ -478,8 +477,6 @@ uf_free_netdevice(unifi_priv_t *priv)
478 int i; 477 int i;
479 unsigned long flags; 478 unsigned long flags;
480 479
481 func_enter();
482
483 unifi_trace(priv, UDBG1, "uf_free_netdevice\n"); 480 unifi_trace(priv, UDBG1, "uf_free_netdevice\n");
484 481
485 if (!priv) { 482 if (!priv) {
@@ -554,7 +551,6 @@ uf_free_netdevice(unifi_priv_t *priv)
554 } 551 }
555 } 552 }
556 553
557 func_exit();
558 return 0; 554 return 0;
559} /* uf_free_netdevice() */ 555} /* uf_free_netdevice() */
560 556
@@ -578,8 +574,6 @@ uf_net_open(struct net_device *dev)
578 netInterface_priv_t *interfacePriv = (netInterface_priv_t *)netdev_priv(dev); 574 netInterface_priv_t *interfacePriv = (netInterface_priv_t *)netdev_priv(dev);
579 unifi_priv_t *priv = interfacePriv->privPtr; 575 unifi_priv_t *priv = interfacePriv->privPtr;
580 576
581 func_enter();
582
583 /* If we haven't finished UniFi initialisation, we can't start */ 577 /* If we haven't finished UniFi initialisation, we can't start */
584 if (priv->init_progress != UNIFI_INIT_COMPLETED) { 578 if (priv->init_progress != UNIFI_INIT_COMPLETED) {
585 unifi_warning(priv, "%s: unifi not ready, failing net_open\n", __FUNCTION__); 579 unifi_warning(priv, "%s: unifi not ready, failing net_open\n", __FUNCTION__);
@@ -615,7 +609,6 @@ uf_net_open(struct net_device *dev)
615 609
616 netif_tx_start_all_queues(dev); 610 netif_tx_start_all_queues(dev);
617 611
618 func_exit();
619 return 0; 612 return 0;
620} /* uf_net_open() */ 613} /* uf_net_open() */
621 614
@@ -627,8 +620,6 @@ uf_net_stop(struct net_device *dev)
627 netInterface_priv_t *interfacePriv = (netInterface_priv_t*)netdev_priv(dev); 620 netInterface_priv_t *interfacePriv = (netInterface_priv_t*)netdev_priv(dev);
628 unifi_priv_t *priv = interfacePriv->privPtr; 621 unifi_priv_t *priv = interfacePriv->privPtr;
629 622
630 func_enter();
631
632 /* Stop sniffing if in Monitor mode */ 623 /* Stop sniffing if in Monitor mode */
633 if (priv->wext_conf.mode == IW_MODE_MONITOR) { 624 if (priv->wext_conf.mode == IW_MODE_MONITOR) {
634 if (priv->card) { 625 if (priv->card) {
@@ -639,13 +630,10 @@ uf_net_stop(struct net_device *dev)
639 } 630 }
640 } 631 }
641 } 632 }
642#else
643 func_enter();
644#endif 633#endif
645 634
646 netif_tx_stop_all_queues(dev); 635 netif_tx_stop_all_queues(dev);
647 636
648 func_exit();
649 return 0; 637 return 0;
650} /* uf_net_stop() */ 638} /* uf_net_stop() */
651 639
@@ -675,7 +663,6 @@ static CSR_PRIORITY uf_get_packet_priority(unifi_priv_t *priv, netInterface_priv
675{ 663{
676 CSR_PRIORITY priority = CSR_CONTENTION; 664 CSR_PRIORITY priority = CSR_CONTENTION;
677 665
678 func_enter();
679 priority = (CSR_PRIORITY) (skb->priority >> 5); 666 priority = (CSR_PRIORITY) (skb->priority >> 5);
680 667
681 if (priority == CSR_QOS_UP0) { /* 0 */ 668 if (priority == CSR_QOS_UP0) { /* 0 */
@@ -721,7 +708,6 @@ static CSR_PRIORITY uf_get_packet_priority(unifi_priv_t *priv, netInterface_priv
721 708
722 unifi_trace(priv, UDBG5, "Packet priority = %d\n", priority); 709 unifi_trace(priv, UDBG5, "Packet priority = %d\n", priority);
723 710
724 func_exit();
725 return priority; 711 return priority;
726} 712}
727 713
@@ -750,8 +736,6 @@ get_packet_priority(unifi_priv_t *priv, struct sk_buff *skb, const struct ethhdr
750 736
751 u8 interfaceMode = interfacePriv->interfaceMode; 737 u8 interfaceMode = interfacePriv->interfaceMode;
752 738
753 func_enter();
754
755 /* Priority Mapping for all the Modes */ 739 /* Priority Mapping for all the Modes */
756 switch(interfaceMode) 740 switch(interfaceMode)
757 { 741 {
@@ -788,7 +772,6 @@ get_packet_priority(unifi_priv_t *priv, struct sk_buff *skb, const struct ethhdr
788 } 772 }
789 unifi_trace(priv, UDBG5, "priority = %x\n", priority); 773 unifi_trace(priv, UDBG5, "priority = %x\n", priority);
790 774
791 func_exit();
792 return priority; 775 return priority;
793} 776}
794 777
@@ -816,8 +799,6 @@ uf_net_select_queue(struct net_device *dev, struct sk_buff *skb)
816 int proto; 799 int proto;
817 CSR_PRIORITY priority; 800 CSR_PRIORITY priority;
818 801
819 func_enter();
820
821 memcpy(&ehdr, skb->data, ETH_HLEN); 802 memcpy(&ehdr, skb->data, ETH_HLEN);
822 proto = ntohs(ehdr.h_proto); 803 proto = ntohs(ehdr.h_proto);
823 804
@@ -836,7 +817,6 @@ uf_net_select_queue(struct net_device *dev, struct sk_buff *skb)
836 } 817 }
837 818
838 819
839 func_exit();
840 return (u16)queue; 820 return (u16)queue;
841} /* uf_net_select_queue() */ 821} /* uf_net_select_queue() */
842 822
@@ -1582,7 +1562,7 @@ send_ma_pkt_request(unifi_priv_t *priv, struct sk_buff *skb, const struct ethhdr
1582 return -1; 1562 return -1;
1583 } 1563 }
1584 1564
1585 /* RA adrress must contain the immediate destination MAC address that is similiar to 1565 /* RA address must contain the immediate destination MAC address that is similar to
1586 * the Address 1 field of 802.11 Mac header here 4 is: (sizeof(framecontrol) + sizeof (durationID)) 1566 * the Address 1 field of 802.11 Mac header here 4 is: (sizeof(framecontrol) + sizeof (durationID))
1587 * which is address 1 field 1567 * which is address 1 field
1588 */ 1568 */
@@ -1760,8 +1740,6 @@ uf_net_xmit(struct sk_buff *skb, struct net_device *dev)
1760 CSR_PRIORITY priority; 1740 CSR_PRIORITY priority;
1761 CsrWifiRouterCtrlPortAction port_action; 1741 CsrWifiRouterCtrlPortAction port_action;
1762 1742
1763 func_enter();
1764
1765 unifi_trace(priv, UDBG5, "unifi_net_xmit: skb = %x\n", skb); 1743 unifi_trace(priv, UDBG5, "unifi_net_xmit: skb = %x\n", skb);
1766 1744
1767 memcpy(&ehdr, skb->data, ETH_HLEN); 1745 memcpy(&ehdr, skb->data, ETH_HLEN);
@@ -1805,7 +1783,6 @@ uf_net_xmit(struct sk_buff *skb, struct net_device *dev)
1805 interfacePriv->stats.tx_dropped++; 1783 interfacePriv->stats.tx_dropped++;
1806 kfree_skb(skb); 1784 kfree_skb(skb);
1807 1785
1808 func_exit();
1809 return NETDEV_TX_OK; 1786 return NETDEV_TX_OK;
1810 } 1787 }
1811 1788
@@ -1848,7 +1825,6 @@ uf_net_xmit(struct sk_buff *skb, struct net_device *dev)
1848 1825
1849 /* The skb will have been freed by send_XXX_request() */ 1826 /* The skb will have been freed by send_XXX_request() */
1850 1827
1851 func_exit();
1852 return result; 1828 return result;
1853} /* uf_net_xmit() */ 1829} /* uf_net_xmit() */
1854 1830
@@ -1877,7 +1853,6 @@ unifi_pause_xmit(void *ospriv, unifi_TrafficQueue queue)
1877 unifi_priv_t *priv = ospriv; 1853 unifi_priv_t *priv = ospriv;
1878 int i; /* used as a loop counter */ 1854 int i; /* used as a loop counter */
1879 1855
1880 func_enter();
1881 unifi_trace(priv, UDBG2, "Stopping queue %d\n", queue); 1856 unifi_trace(priv, UDBG2, "Stopping queue %d\n", queue);
1882 1857
1883 for(i=0;i<CSR_WIFI_NUM_INTERFACES;i++) 1858 for(i=0;i<CSR_WIFI_NUM_INTERFACES;i++)
@@ -1897,7 +1872,6 @@ unifi_pause_xmit(void *ospriv, unifi_TrafficQueue queue)
1897 unifi_error(priv, "Start buffering %d defaulting to 0\n", queue); 1872 unifi_error(priv, "Start buffering %d defaulting to 0\n", queue);
1898 } 1873 }
1899#endif 1874#endif
1900 func_exit();
1901 1875
1902} /* unifi_pause_xmit() */ 1876} /* unifi_pause_xmit() */
1903 1877
@@ -1907,7 +1881,6 @@ unifi_restart_xmit(void *ospriv, unifi_TrafficQueue queue)
1907 unifi_priv_t *priv = ospriv; 1881 unifi_priv_t *priv = ospriv;
1908 int i=0; /* used as a loop counter */ 1882 int i=0; /* used as a loop counter */
1909 1883
1910 func_enter();
1911 unifi_trace(priv, UDBG2, "Waking queue %d\n", queue); 1884 unifi_trace(priv, UDBG2, "Waking queue %d\n", queue);
1912 1885
1913 for(i=0;i<CSR_WIFI_NUM_INTERFACES;i++) 1886 for(i=0;i<CSR_WIFI_NUM_INTERFACES;i++)
@@ -1927,7 +1900,6 @@ unifi_restart_xmit(void *ospriv, unifi_TrafficQueue queue)
1927 uf_send_buffered_frames(priv,0); 1900 uf_send_buffered_frames(priv,0);
1928 } 1901 }
1929#endif 1902#endif
1930 func_exit();
1931} /* unifi_restart_xmit() */ 1903} /* unifi_restart_xmit() */
1932 1904
1933 1905
@@ -1963,7 +1935,6 @@ indicate_rx_skb(unifi_priv_t *priv, u16 ifTag, u8* dst_a, u8* src_a, struct sk_b
1963 priv->interfacePriv[ifTag]->stats.rx_frame_errors++; 1935 priv->interfacePriv[ifTag]->stats.rx_frame_errors++;
1964 unifi_net_data_free(priv, &bulkdata->d[0]); 1936 unifi_net_data_free(priv, &bulkdata->d[0]);
1965 unifi_notice(priv, "indicate_rx_skb: Discard unknown frame.\n"); 1937 unifi_notice(priv, "indicate_rx_skb: Discard unknown frame.\n");
1966 func_exit();
1967 return; 1938 return;
1968 } 1939 }
1969 1940
@@ -1975,7 +1946,6 @@ indicate_rx_skb(unifi_priv_t *priv, u16 ifTag, u8* dst_a, u8* src_a, struct sk_b
1975 unifi_net_data_free(priv, &bulkdata->d[0]); 1946 unifi_net_data_free(priv, &bulkdata->d[0]);
1976 unifi_trace(priv, UDBG5, "indicate_rx_skb: Data given to subscription" 1947 unifi_trace(priv, UDBG5, "indicate_rx_skb: Data given to subscription"
1977 "API, not being given to kernel\n"); 1948 "API, not being given to kernel\n");
1978 func_exit();
1979 return; 1949 return;
1980 } 1950 }
1981 1951
@@ -1998,7 +1968,6 @@ indicate_rx_skb(unifi_priv_t *priv, u16 ifTag, u8* dst_a, u8* src_a, struct sk_b
1998 priv->interfacePriv[ifTag]->stats.rx_errors++; 1968 priv->interfacePriv[ifTag]->stats.rx_errors++;
1999 priv->interfacePriv[ifTag]->stats.rx_length_errors++; 1969 priv->interfacePriv[ifTag]->stats.rx_length_errors++;
2000 unifi_net_data_free(priv, &bulkdata->d[0]); 1970 unifi_net_data_free(priv, &bulkdata->d[0]);
2001 func_exit();
2002 return; 1971 return;
2003 } 1972 }
2004 1973
@@ -2025,7 +1994,6 @@ indicate_rx_skb(unifi_priv_t *priv, u16 ifTag, u8* dst_a, u8* src_a, struct sk_b
2025 priv->interfacePriv[ifTag]->stats.rx_packets++; 1994 priv->interfacePriv[ifTag]->stats.rx_packets++;
2026 priv->interfacePriv[ifTag]->stats.rx_bytes += bulkdata->d[0].data_length; 1995 priv->interfacePriv[ifTag]->stats.rx_bytes += bulkdata->d[0].data_length;
2027 1996
2028 func_exit();
2029 return; 1997 return;
2030} 1998}
2031 1999
@@ -2178,8 +2146,6 @@ unifi_rx(unifi_priv_t *priv, CSR_SIGNAL *signal, bulk_data_param_t *bulkdata)
2178 netInterface_priv_t *interfacePriv; 2146 netInterface_priv_t *interfacePriv;
2179 struct ethhdr ehdr; 2147 struct ethhdr ehdr;
2180 2148
2181 func_enter();
2182
2183 interfaceTag = (pkt_ind->VirtualInterfaceIdentifier & 0xff); 2149 interfaceTag = (pkt_ind->VirtualInterfaceIdentifier & 0xff);
2184 interfacePriv = priv->interfacePriv[interfaceTag]; 2150 interfacePriv = priv->interfacePriv[interfaceTag];
2185 2151
@@ -2188,7 +2154,6 @@ unifi_rx(unifi_priv_t *priv, CSR_SIGNAL *signal, bulk_data_param_t *bulkdata)
2188 { 2154 {
2189 unifi_error(priv, "%s: MA-PACKET indication with bad interfaceTag %d\n", __FUNCTION__, interfaceTag); 2155 unifi_error(priv, "%s: MA-PACKET indication with bad interfaceTag %d\n", __FUNCTION__, interfaceTag);
2190 unifi_net_data_free(priv,&bulkdata->d[0]); 2156 unifi_net_data_free(priv,&bulkdata->d[0]);
2191 func_exit();
2192 return; 2157 return;
2193 } 2158 }
2194 2159
@@ -2197,14 +2162,12 @@ unifi_rx(unifi_priv_t *priv, CSR_SIGNAL *signal, bulk_data_param_t *bulkdata)
2197 { 2162 {
2198 unifi_error(priv, "%s: MA-PACKET indication with unallocated interfaceTag %d\n", __FUNCTION__, interfaceTag); 2163 unifi_error(priv, "%s: MA-PACKET indication with unallocated interfaceTag %d\n", __FUNCTION__, interfaceTag);
2199 unifi_net_data_free(priv, &bulkdata->d[0]); 2164 unifi_net_data_free(priv, &bulkdata->d[0]);
2200 func_exit();
2201 return; 2165 return;
2202 } 2166 }
2203 2167
2204 if (bulkdata->d[0].data_length == 0) { 2168 if (bulkdata->d[0].data_length == 0) {
2205 unifi_warning(priv, "%s: MA-PACKET indication with zero bulk data\n", __FUNCTION__); 2169 unifi_warning(priv, "%s: MA-PACKET indication with zero bulk data\n", __FUNCTION__);
2206 unifi_net_data_free(priv,&bulkdata->d[0]); 2170 unifi_net_data_free(priv,&bulkdata->d[0]);
2207 func_exit();
2208 return; 2171 return;
2209 } 2172 }
2210 2173
@@ -2326,7 +2289,6 @@ unifi_rx(unifi_priv_t *priv, CSR_SIGNAL *signal, bulk_data_param_t *bulkdata)
2326 sa[0], sa[1],sa[2], sa[3], sa[4],sa[5]); 2289 sa[0], sa[1],sa[2], sa[3], sa[4],sa[5]);
2327 CsrWifiRouterCtrlUnexpectedFrameIndSend(priv->CSR_WIFI_SME_IFACEQUEUE,0,interfaceTag,peerMacAddress); 2290 CsrWifiRouterCtrlUnexpectedFrameIndSend(priv->CSR_WIFI_SME_IFACEQUEUE,0,interfaceTag,peerMacAddress);
2328 unifi_net_data_free(priv, &bulkdata->d[0]); 2291 unifi_net_data_free(priv, &bulkdata->d[0]);
2329 func_exit();
2330 return; 2292 return;
2331 } 2293 }
2332 2294
@@ -2343,7 +2305,6 @@ unifi_rx(unifi_priv_t *priv, CSR_SIGNAL *signal, bulk_data_param_t *bulkdata)
2343 unifi_net_data_free(priv, &bulkdata->d[0]); 2305 unifi_net_data_free(priv, &bulkdata->d[0]);
2344 unifi_notice(priv, "%s: Dropping packet, proto=0x%04x, %s port\n", __FUNCTION__, 2306 unifi_notice(priv, "%s: Dropping packet, proto=0x%04x, %s port\n", __FUNCTION__,
2345 proto, queue ? "Controlled" : "Un-controlled"); 2307 proto, queue ? "Controlled" : "Un-controlled");
2346 func_exit();
2347 return; 2308 return;
2348 } 2309 }
2349 2310
@@ -2351,7 +2312,6 @@ unifi_rx(unifi_priv_t *priv, CSR_SIGNAL *signal, bulk_data_param_t *bulkdata)
2351 if((dataFrameType == QOS_DATA_NULL) || (dataFrameType == DATA_NULL)){ 2312 if((dataFrameType == QOS_DATA_NULL) || (dataFrameType == DATA_NULL)){
2352 unifi_trace(priv, UDBG5, "%s: Null Frame Received and Freed\n", __FUNCTION__); 2313 unifi_trace(priv, UDBG5, "%s: Null Frame Received and Freed\n", __FUNCTION__);
2353 unifi_net_data_free(priv, &bulkdata->d[0]); 2314 unifi_net_data_free(priv, &bulkdata->d[0]);
2354 func_exit();
2355 return; 2315 return;
2356 } 2316 }
2357 2317
@@ -2366,7 +2326,6 @@ unifi_rx(unifi_priv_t *priv, CSR_SIGNAL *signal, bulk_data_param_t *bulkdata)
2366 bulkdata, 2326 bulkdata,
2367 macHeaderLengthInBytes))) 2327 macHeaderLengthInBytes)))
2368 { 2328 {
2369 func_exit();
2370 return; 2329 return;
2371 } 2330 }
2372 unifi_trace(priv, UDBG5, "unifi_rx: no specific AP handling process as normal frame, MAC Header len %d\n",macHeaderLengthInBytes); 2331 unifi_trace(priv, UDBG5, "unifi_rx: no specific AP handling process as normal frame, MAC Header len %d\n",macHeaderLengthInBytes);
@@ -2389,7 +2348,6 @@ unifi_rx(unifi_priv_t *priv, CSR_SIGNAL *signal, bulk_data_param_t *bulkdata)
2389 unifi_trace(priv, UDBG1, "Zero length frame, but not null-data %04x\n", frameControl); 2348 unifi_trace(priv, UDBG1, "Zero length frame, but not null-data %04x\n", frameControl);
2390 } 2349 }
2391 unifi_net_data_free(priv, &bulkdata->d[0]); 2350 unifi_net_data_free(priv, &bulkdata->d[0]);
2392 func_exit();
2393 return; 2351 return;
2394 } 2352 }
2395 2353
@@ -2399,7 +2357,6 @@ unifi_rx(unifi_priv_t *priv, CSR_SIGNAL *signal, bulk_data_param_t *bulkdata)
2399 unifi_net_data_free(priv, &bulkdata->d[0]); 2357 unifi_net_data_free(priv, &bulkdata->d[0]);
2400 unifi_notice(priv, "%s: Dropping packet, proto=0x%04x, %s port\n", 2358 unifi_notice(priv, "%s: Dropping packet, proto=0x%04x, %s port\n",
2401 __FUNCTION__, proto, queue ? "controlled" : "uncontrolled"); 2359 __FUNCTION__, proto, queue ? "controlled" : "uncontrolled");
2402 func_exit();
2403 return; 2360 return;
2404 } else if ( (port_action == CSR_WIFI_ROUTER_CTRL_PORT_ACTION_8021X_PORT_CLOSED_BLOCK) || 2361 } else if ( (port_action == CSR_WIFI_ROUTER_CTRL_PORT_ACTION_8021X_PORT_CLOSED_BLOCK) ||
2405 (interfacePriv->connected != UnifiConnected) ) { 2362 (interfacePriv->connected != UnifiConnected) ) {
@@ -2415,7 +2372,6 @@ unifi_rx(unifi_priv_t *priv, CSR_SIGNAL *signal, bulk_data_param_t *bulkdata)
2415 __FUNCTION__, sizeof(rx_buffered_packets_t)); 2372 __FUNCTION__, sizeof(rx_buffered_packets_t));
2416 interfacePriv->stats.rx_dropped++; 2373 interfacePriv->stats.rx_dropped++;
2417 unifi_net_data_free(priv, &bulkdata->d[0]); 2374 unifi_net_data_free(priv, &bulkdata->d[0]);
2418 func_exit();
2419 return; 2375 return;
2420 } 2376 }
2421 2377
@@ -2439,15 +2395,12 @@ unifi_rx(unifi_priv_t *priv, CSR_SIGNAL *signal, bulk_data_param_t *bulkdata)
2439 list_add_tail(&rx_q_item->q, rx_list); 2395 list_add_tail(&rx_q_item->q, rx_list);
2440 up(&priv->rx_q_sem); 2396 up(&priv->rx_q_sem);
2441 2397
2442 func_exit();
2443 return; 2398 return;
2444 2399
2445 } 2400 }
2446 2401
2447 indicate_rx_skb(priv, interfaceTag, da, sa, skb, signal, bulkdata); 2402 indicate_rx_skb(priv, interfaceTag, da, sa, skb, signal, bulkdata);
2448 2403
2449 func_exit();
2450
2451} /* unifi_rx() */ 2404} /* unifi_rx() */
2452 2405
2453static void process_ma_packet_cfm(unifi_priv_t *priv, CSR_SIGNAL *signal, bulk_data_param_t *bulkdata) 2406static void process_ma_packet_cfm(unifi_priv_t *priv, CSR_SIGNAL *signal, bulk_data_param_t *bulkdata)
@@ -2456,7 +2409,6 @@ static void process_ma_packet_cfm(unifi_priv_t *priv, CSR_SIGNAL *signal, bulk_d
2456 const CSR_MA_PACKET_CONFIRM *pkt_cfm = &signal->u.MaPacketConfirm; 2409 const CSR_MA_PACKET_CONFIRM *pkt_cfm = &signal->u.MaPacketConfirm;
2457 netInterface_priv_t *interfacePriv; 2410 netInterface_priv_t *interfacePriv;
2458 2411
2459 func_enter();
2460 interfaceTag = (pkt_cfm->VirtualInterfaceIdentifier & 0xff); 2412 interfaceTag = (pkt_cfm->VirtualInterfaceIdentifier & 0xff);
2461 interfacePriv = priv->interfacePriv[interfaceTag]; 2413 interfacePriv = priv->interfacePriv[interfaceTag];
2462 2414
@@ -2464,7 +2416,6 @@ static void process_ma_packet_cfm(unifi_priv_t *priv, CSR_SIGNAL *signal, bulk_d
2464 if (interfaceTag >= CSR_WIFI_NUM_INTERFACES) 2416 if (interfaceTag >= CSR_WIFI_NUM_INTERFACES)
2465 { 2417 {
2466 unifi_error(priv, "%s: MA-PACKET confirm with bad interfaceTag %d\n", __FUNCTION__, interfaceTag); 2418 unifi_error(priv, "%s: MA-PACKET confirm with bad interfaceTag %d\n", __FUNCTION__, interfaceTag);
2467 func_exit();
2468 return; 2419 return;
2469 } 2420 }
2470#ifdef CSR_SUPPORT_SME 2421#ifdef CSR_SUPPORT_SME
@@ -2487,7 +2438,6 @@ static void process_ma_packet_cfm(unifi_priv_t *priv, CSR_SIGNAL *signal, bulk_d
2487 interfacePriv->m4_hostTag = 0xffffffff; 2438 interfacePriv->m4_hostTag = 0xffffffff;
2488 } 2439 }
2489#endif 2440#endif
2490 func_exit();
2491 return; 2441 return;
2492} 2442}
2493 2443
@@ -2528,8 +2478,6 @@ static void process_ma_packet_ind(unifi_priv_t *priv, CSR_SIGNAL *signal, bulk_d
2528 2478
2529#endif 2479#endif
2530 2480
2531 func_enter();
2532
2533 interfaceTag = (pkt_ind->VirtualInterfaceIdentifier & 0xff); 2481 interfaceTag = (pkt_ind->VirtualInterfaceIdentifier & 0xff);
2534 interfacePriv = priv->interfacePriv[interfaceTag]; 2482 interfacePriv = priv->interfacePriv[interfaceTag];
2535 2483
@@ -2539,7 +2487,6 @@ static void process_ma_packet_ind(unifi_priv_t *priv, CSR_SIGNAL *signal, bulk_d
2539 { 2487 {
2540 unifi_error(priv, "%s: MA-PACKET indication with bad interfaceTag %d\n", __FUNCTION__, interfaceTag); 2488 unifi_error(priv, "%s: MA-PACKET indication with bad interfaceTag %d\n", __FUNCTION__, interfaceTag);
2541 unifi_net_data_free(priv,&bulkdata->d[0]); 2489 unifi_net_data_free(priv,&bulkdata->d[0]);
2542 func_exit();
2543 return; 2490 return;
2544 } 2491 }
2545 2492
@@ -2548,24 +2495,21 @@ static void process_ma_packet_ind(unifi_priv_t *priv, CSR_SIGNAL *signal, bulk_d
2548 { 2495 {
2549 unifi_error(priv, "%s: MA-PACKET indication with unallocated interfaceTag %d\n", __FUNCTION__, interfaceTag); 2496 unifi_error(priv, "%s: MA-PACKET indication with unallocated interfaceTag %d\n", __FUNCTION__, interfaceTag);
2550 unifi_net_data_free(priv, &bulkdata->d[0]); 2497 unifi_net_data_free(priv, &bulkdata->d[0]);
2551 func_exit();
2552 return; 2498 return;
2553 } 2499 }
2554 2500
2555 if (bulkdata->d[0].data_length == 0) { 2501 if (bulkdata->d[0].data_length == 0) {
2556 unifi_warning(priv, "%s: MA-PACKET indication with zero bulk data\n", __FUNCTION__); 2502 unifi_warning(priv, "%s: MA-PACKET indication with zero bulk data\n", __FUNCTION__);
2557 unifi_net_data_free(priv,&bulkdata->d[0]); 2503 unifi_net_data_free(priv,&bulkdata->d[0]);
2558 func_exit();
2559 return; 2504 return;
2560 } 2505 }
2561 /* For monitor mode we need to pass this indication to the registered application 2506 /* For monitor mode we need to pass this indication to the registered application
2562 handle this seperately*/ 2507 handle this separately*/
2563 /* MIC failure is already taken care of so no need to send the PDUs which are not successfully received in non-monitor mode*/ 2508 /* MIC failure is already taken care of so no need to send the PDUs which are not successfully received in non-monitor mode*/
2564 if(pkt_ind->ReceptionStatus != CSR_RX_SUCCESS) 2509 if(pkt_ind->ReceptionStatus != CSR_RX_SUCCESS)
2565 { 2510 {
2566 unifi_warning(priv, "%s: MA-PACKET indication with status = %d\n",__FUNCTION__, pkt_ind->ReceptionStatus); 2511 unifi_warning(priv, "%s: MA-PACKET indication with status = %d\n",__FUNCTION__, pkt_ind->ReceptionStatus);
2567 unifi_net_data_free(priv,&bulkdata->d[0]); 2512 unifi_net_data_free(priv,&bulkdata->d[0]);
2568 func_exit();
2569 return; 2513 return;
2570 } 2514 }
2571 2515
@@ -2613,13 +2557,11 @@ static void process_ma_packet_ind(unifi_priv_t *priv, CSR_SIGNAL *signal, bulk_d
2613 } 2557 }
2614#endif 2558#endif
2615 unifi_net_data_free(priv,&bulkdata->d[0]); 2559 unifi_net_data_free(priv,&bulkdata->d[0]);
2616 func_exit();
2617 return; 2560 return;
2618 } 2561 }
2619 if(frameType != IEEE802_11_FRAMETYPE_DATA) { 2562 if(frameType != IEEE802_11_FRAMETYPE_DATA) {
2620 unifi_warning(priv, "%s: Non control Non Data frame is received\n",__FUNCTION__); 2563 unifi_warning(priv, "%s: Non control Non Data frame is received\n",__FUNCTION__);
2621 unifi_net_data_free(priv,&bulkdata->d[0]); 2564 unifi_net_data_free(priv,&bulkdata->d[0]);
2622 func_exit();
2623 return; 2565 return;
2624 } 2566 }
2625 2567
@@ -2637,7 +2579,6 @@ static void process_ma_packet_ind(unifi_priv_t *priv, CSR_SIGNAL *signal, bulk_d
2637 sa[0], sa[1],sa[2], sa[3], sa[4],sa[5]); 2579 sa[0], sa[1],sa[2], sa[3], sa[4],sa[5]);
2638 CsrWifiRouterCtrlUnexpectedFrameIndSend(priv->CSR_WIFI_SME_IFACEQUEUE,0,interfaceTag,peerMacAddress); 2580 CsrWifiRouterCtrlUnexpectedFrameIndSend(priv->CSR_WIFI_SME_IFACEQUEUE,0,interfaceTag,peerMacAddress);
2639 unifi_net_data_free(priv, &bulkdata->d[0]); 2581 unifi_net_data_free(priv, &bulkdata->d[0]);
2640 func_exit();
2641 return; 2582 return;
2642 } 2583 }
2643 2584
@@ -2743,7 +2684,6 @@ static void process_ma_packet_ind(unifi_priv_t *priv, CSR_SIGNAL *signal, bulk_d
2743 up(&priv->ba_mutex); 2684 up(&priv->ba_mutex);
2744 process_ba_complete(priv, interfacePriv); 2685 process_ba_complete(priv, interfacePriv);
2745 2686
2746 func_exit();
2747} 2687}
2748/* 2688/*
2749 * --------------------------------------------------------------------------- 2689 * ---------------------------------------------------------------------------
@@ -2836,8 +2776,6 @@ netdev_mlme_event_handler(ul_client_t *pcli, const u8 *sig_packed, int sig_len,
2836 int id, r; 2776 int id, r;
2837 bulk_data_param_t bulkdata; 2777 bulk_data_param_t bulkdata;
2838 2778
2839 func_enter();
2840
2841 /* Just a sanity check */ 2779 /* Just a sanity check */
2842 if (sig_packed == NULL) { 2780 if (sig_packed == NULL) {
2843 return; 2781 return;
@@ -2902,7 +2840,6 @@ netdev_mlme_event_handler(ul_client_t *pcli, const u8 *sig_packed, int sig_len,
2902 break; 2840 break;
2903 } 2841 }
2904 2842
2905 func_exit();
2906} /* netdev_mlme_event_handler() */ 2843} /* netdev_mlme_event_handler() */
2907 2844
2908 2845
@@ -3100,13 +3037,13 @@ static void update_expected_sn(unifi_priv_t *priv,
3100 u16 gap; 3037 u16 gap;
3101 3038
3102 gap = (sn - ba_session->expected_sn) & 0xFFF; 3039 gap = (sn - ba_session->expected_sn) & 0xFFF;
3103 unifi_trace(priv, UDBG6, "%s: proccess the frames up to new_expected_sn = %d gap = %d\n", __FUNCTION__, sn, gap); 3040 unifi_trace(priv, UDBG6, "%s: process the frames up to new_expected_sn = %d gap = %d\n", __FUNCTION__, sn, gap);
3104 for(j = 0; j < gap && j < ba_session->wind_size; j++) { 3041 for(j = 0; j < gap && j < ba_session->wind_size; j++) {
3105 i = SN_TO_INDEX(ba_session, ba_session->expected_sn); 3042 i = SN_TO_INDEX(ba_session, ba_session->expected_sn);
3106 unifi_trace(priv, UDBG6, "%s: proccess the slot index = %d\n", __FUNCTION__, i); 3043 unifi_trace(priv, UDBG6, "%s: process the slot index = %d\n", __FUNCTION__, i);
3107 if(ba_session->buffer[i].active) { 3044 if(ba_session->buffer[i].active) {
3108 add_frame_to_ba_complete(priv, interfacePriv, &ba_session->buffer[i]); 3045 add_frame_to_ba_complete(priv, interfacePriv, &ba_session->buffer[i]);
3109 unifi_trace(priv, UDBG6, "%s: proccess the frame at index = %d expected_sn = %d\n", __FUNCTION__, i, ba_session->expected_sn); 3046 unifi_trace(priv, UDBG6, "%s: process the frame at index = %d expected_sn = %d\n", __FUNCTION__, i, ba_session->expected_sn);
3110 FREE_BUFFER_SLOT(ba_session, i); 3047 FREE_BUFFER_SLOT(ba_session, i);
3111 } else { 3048 } else {
3112 unifi_trace(priv, UDBG6, "%s: empty slot at index = %d\n", __FUNCTION__, i); 3049 unifi_trace(priv, UDBG6, "%s: empty slot at index = %d\n", __FUNCTION__, i);
@@ -3247,8 +3184,8 @@ static void check_ba_frame_age_timeout( unifi_priv_t *priv,
3247 netInterface_priv_t *interfacePriv, 3184 netInterface_priv_t *interfacePriv,
3248 ba_session_rx_struct *ba_session) 3185 ba_session_rx_struct *ba_session)
3249{ 3186{
3250 CsrTime now; 3187 u32 now;
3251 CsrTime age; 3188 u32 age;
3252 u8 i, j; 3189 u8 i, j;
3253 u16 sn_temp; 3190 u16 sn_temp;
3254 3191
@@ -3283,11 +3220,11 @@ static void check_ba_frame_age_timeout( unifi_priv_t *priv,
3283 if (ba_session->buffer[i].recv_time > now) 3220 if (ba_session->buffer[i].recv_time > now)
3284 { 3221 {
3285 /* timer wrap */ 3222 /* timer wrap */
3286 age = CsrTimeAdd((CsrTime)CsrTimeSub(CSR_SCHED_TIME_MAX, ba_session->buffer[i].recv_time), now); 3223 age = CsrTimeAdd((u32)CsrTimeSub(CSR_SCHED_TIME_MAX, ba_session->buffer[i].recv_time), now);
3287 } 3224 }
3288 else 3225 else
3289 { 3226 {
3290 age = (CsrTime)CsrTimeSub(now, ba_session->buffer[i].recv_time); 3227 age = (u32)CsrTimeSub(now, ba_session->buffer[i].recv_time);
3291 } 3228 }
3292 3229
3293 if (age >= CSR_WIFI_BA_MPDU_FRAME_AGE_TIMEOUT) 3230 if (age >= CSR_WIFI_BA_MPDU_FRAME_AGE_TIMEOUT)
@@ -3331,8 +3268,6 @@ static void process_ma_packet_error_ind(unifi_priv_t *priv, CSR_SIGNAL *signal,
3331 CSR_PRIORITY UserPriority; 3268 CSR_PRIORITY UserPriority;
3332 CSR_SEQUENCE_NUMBER sn; 3269 CSR_SEQUENCE_NUMBER sn;
3333 3270
3334 func_enter();
3335
3336 interfaceTag = (pkt_err_ind->VirtualInterfaceIdentifier & 0xff); 3271 interfaceTag = (pkt_err_ind->VirtualInterfaceIdentifier & 0xff);
3337 3272
3338 3273
@@ -3340,7 +3275,6 @@ static void process_ma_packet_error_ind(unifi_priv_t *priv, CSR_SIGNAL *signal,
3340 if (interfaceTag >= CSR_WIFI_NUM_INTERFACES) 3275 if (interfaceTag >= CSR_WIFI_NUM_INTERFACES)
3341 { 3276 {
3342 unifi_error(priv, "%s: MaPacketErrorIndication indication with bad interfaceTag %d\n", __FUNCTION__, interfaceTag); 3277 unifi_error(priv, "%s: MaPacketErrorIndication indication with bad interfaceTag %d\n", __FUNCTION__, interfaceTag);
3343 func_exit();
3344 return; 3278 return;
3345 } 3279 }
3346 3280
@@ -3348,7 +3282,6 @@ static void process_ma_packet_error_ind(unifi_priv_t *priv, CSR_SIGNAL *signal,
3348 UserPriority = pkt_err_ind->UserPriority; 3282 UserPriority = pkt_err_ind->UserPriority;
3349 if(UserPriority > 15) { 3283 if(UserPriority > 15) {
3350 unifi_error(priv, "%s: MaPacketErrorIndication indication with bad UserPriority=%d\n", __FUNCTION__, UserPriority); 3284 unifi_error(priv, "%s: MaPacketErrorIndication indication with bad UserPriority=%d\n", __FUNCTION__, UserPriority);
3351 func_exit();
3352 } 3285 }
3353 sn = pkt_err_ind->SequenceNumber; 3286 sn = pkt_err_ind->SequenceNumber;
3354 3287
@@ -3369,7 +3302,6 @@ static void process_ma_packet_error_ind(unifi_priv_t *priv, CSR_SIGNAL *signal,
3369 3302
3370 up(&priv->ba_mutex); 3303 up(&priv->ba_mutex);
3371 process_ba_complete(priv, interfacePriv); 3304 process_ba_complete(priv, interfacePriv);
3372 func_exit();
3373} 3305}
3374 3306
3375 3307
diff --git a/drivers/staging/csr/os.c b/drivers/staging/csr/os.c
index 35dc9087d79f..37ec59df3581 100644
--- a/drivers/staging/csr/os.c
+++ b/drivers/staging/csr/os.c
@@ -412,9 +412,8 @@ dump(void *mem, u16 len)
412 return; 412 return;
413 } 413 }
414 for (i = 0; i < len; i++) { 414 for (i = 0; i < len; i++) {
415 if (col == 0) { 415 if (col == 0)
416 printk("0x%02X: ", i); 416 printk("0x%02X: ", i);
417 }
418 417
419 printk(" %02X", pdata[i]); 418 printk(" %02X", pdata[i]);
420 419
@@ -423,9 +422,8 @@ dump(void *mem, u16 len)
423 col = 0; 422 col = 0;
424 } 423 }
425 } 424 }
426 if (col) { 425 if (col)
427 printk("\n"); 426 printk("\n");
428 }
429} /* dump() */ 427} /* dump() */
430 428
431 429
@@ -438,9 +436,8 @@ dump16(void *mem, u16 len)
438 printk("timestamp %s \n", print_time()); 436 printk("timestamp %s \n", print_time());
439#endif /* ANDROID_TIMESTAMP */ 437#endif /* ANDROID_TIMESTAMP */
440 for (i = 0; i < len; i+=2) { 438 for (i = 0; i < len; i+=2) {
441 if (col == 0) { 439 if (col == 0)
442 printk("0x%02X: ", i); 440 printk("0x%02X: ", i);
443 }
444 441
445 printk(" %04X", *p++); 442 printk(" %04X", *p++);
446 443
@@ -449,9 +446,8 @@ dump16(void *mem, u16 len)
449 col = 0; 446 col = 0;
450 } 447 }
451 } 448 }
452 if (col) { 449 if (col)
453 printk("\n"); 450 printk("\n");
454 }
455} 451}
456 452
457 453
@@ -459,7 +455,7 @@ dump16(void *mem, u16 len)
459void 455void
460dump_str(void *mem, u16 len) 456dump_str(void *mem, u16 len)
461{ 457{
462 int i, col = 0; 458 int i;
463 unsigned char *pdata = (unsigned char *)mem; 459 unsigned char *pdata = (unsigned char *)mem;
464#ifdef ANDROID_TIMESTAMP 460#ifdef ANDROID_TIMESTAMP
465 printk("timestamp %s \n", print_time()); 461 printk("timestamp %s \n", print_time());
@@ -467,9 +463,7 @@ dump_str(void *mem, u16 len)
467 for (i = 0; i < len; i++) { 463 for (i = 0; i < len; i++) {
468 printk("%c", pdata[i]); 464 printk("%c", pdata[i]);
469 } 465 }
470 if (col) { 466 printk("\n");
471 printk("\n");
472 }
473 467
474} /* dump_str() */ 468} /* dump_str() */
475#endif /* CSR_ONLY_NOTES */ 469#endif /* CSR_ONLY_NOTES */
diff --git a/drivers/staging/csr/sdio_mmc.c b/drivers/staging/csr/sdio_mmc.c
index af3e40bb5010..b6a16de08f4e 100644
--- a/drivers/staging/csr/sdio_mmc.c
+++ b/drivers/staging/csr/sdio_mmc.c
@@ -14,7 +14,6 @@
14#include <linux/kernel.h> 14#include <linux/kernel.h>
15#include <linux/mutex.h> 15#include <linux/mutex.h>
16#include <linux/gfp.h> 16#include <linux/gfp.h>
17#include <linux/version.h>
18#include <linux/mmc/core.h> 17#include <linux/mmc/core.h>
19#include <linux/mmc/card.h> 18#include <linux/mmc/card.h>
20#include <linux/mmc/host.h> 19#include <linux/mmc/host.h>
@@ -152,7 +151,6 @@ CsrSdioRead8(CsrSdioFunction *function, u32 address, u8 *data)
152 _sdio_release_host(func); 151 _sdio_release_host(func);
153 152
154 if (err) { 153 if (err) {
155 func_exit_r(err);
156 return ConvertSdioToCsrSdioResult(err); 154 return ConvertSdioToCsrSdioResult(err);
157 } 155 }
158 156
@@ -170,7 +168,6 @@ CsrSdioWrite8(CsrSdioFunction *function, u32 address, u8 data)
170 _sdio_release_host(func); 168 _sdio_release_host(func);
171 169
172 if (err) { 170 if (err) {
173 func_exit_r(err);
174 return ConvertSdioToCsrSdioResult(err); 171 return ConvertSdioToCsrSdioResult(err);
175 } 172 }
176 173
@@ -246,7 +243,6 @@ CsrSdioF0Read8(CsrSdioFunction *function, u32 address, u8 *data)
246 _sdio_release_host(func); 243 _sdio_release_host(func);
247 244
248 if (err) { 245 if (err) {
249 func_exit_r(err);
250 return ConvertSdioToCsrSdioResult(err); 246 return ConvertSdioToCsrSdioResult(err);
251 } 247 }
252 248
@@ -268,7 +264,6 @@ CsrSdioF0Write8(CsrSdioFunction *function, u32 address, u8 data)
268 _sdio_release_host(func); 264 _sdio_release_host(func);
269 265
270 if (err) { 266 if (err) {
271 func_exit_r(err);
272 return ConvertSdioToCsrSdioResult(err); 267 return ConvertSdioToCsrSdioResult(err);
273 } 268 }
274 269
@@ -287,7 +282,6 @@ CsrSdioRead(CsrSdioFunction *function, u32 address, void *data, u32 length)
287 _sdio_release_host(func); 282 _sdio_release_host(func);
288 283
289 if (err) { 284 if (err) {
290 func_exit_r(err);
291 return ConvertSdioToCsrSdioResult(err); 285 return ConvertSdioToCsrSdioResult(err);
292 } 286 }
293 287
@@ -305,7 +299,6 @@ CsrSdioWrite(CsrSdioFunction *function, u32 address, const void *data, u32 lengt
305 _sdio_release_host(func); 299 _sdio_release_host(func);
306 300
307 if (err) { 301 if (err) {
308 func_exit_r(err);
309 return ConvertSdioToCsrSdioResult(err); 302 return ConvertSdioToCsrSdioResult(err);
310 } 303 }
311 304
@@ -480,7 +473,6 @@ CsrSdioInterruptEnable(CsrSdioFunction *function)
480#endif 473#endif
481 _sdio_release_host(func); 474 _sdio_release_host(func);
482 475
483 func_exit();
484 if (err) { 476 if (err) {
485 printk(KERN_ERR "unifi: %s: error %d writing IENx\n", __FUNCTION__, err); 477 printk(KERN_ERR "unifi: %s: error %d writing IENx\n", __FUNCTION__, err);
486 return ConvertSdioToCsrSdioResult(err); 478 return ConvertSdioToCsrSdioResult(err);
@@ -507,7 +499,6 @@ CsrSdioInterruptDisable(CsrSdioFunction *function)
507#endif 499#endif
508 _sdio_release_host(func); 500 _sdio_release_host(func);
509 501
510 func_exit();
511 if (err) { 502 if (err) {
512 printk(KERN_ERR "unifi: %s: error %d writing IENx\n", __FUNCTION__, err); 503 printk(KERN_ERR "unifi: %s: error %d writing IENx\n", __FUNCTION__, err);
513 return ConvertSdioToCsrSdioResult(err); 504 return ConvertSdioToCsrSdioResult(err);
@@ -541,8 +532,6 @@ CsrSdioFunctionEnable(CsrSdioFunction *function)
541 struct sdio_func *func = (struct sdio_func *)function->priv; 532 struct sdio_func *func = (struct sdio_func *)function->priv;
542 int err; 533 int err;
543 534
544 func_enter();
545
546 /* Enable UniFi function 1 (the 802.11 part). */ 535 /* Enable UniFi function 1 (the 802.11 part). */
547 _sdio_claim_host(func); 536 _sdio_claim_host(func);
548 err = sdio_enable_func(func); 537 err = sdio_enable_func(func);
@@ -551,7 +540,6 @@ CsrSdioFunctionEnable(CsrSdioFunction *function)
551 unifi_error(NULL, "Failed to enable SDIO function %d\n", func->num); 540 unifi_error(NULL, "Failed to enable SDIO function %d\n", func->num);
552 } 541 }
553 542
554 func_exit();
555 return ConvertSdioToCsrSdioResult(err); 543 return ConvertSdioToCsrSdioResult(err);
556} /* CsrSdioFunctionEnable() */ 544} /* CsrSdioFunctionEnable() */
557 545
@@ -575,8 +563,6 @@ CsrSdioFunctionDisable(CsrSdioFunction *function)
575 struct sdio_func *func = (struct sdio_func *)function->priv; 563 struct sdio_func *func = (struct sdio_func *)function->priv;
576 int err; 564 int err;
577 565
578 func_enter();
579
580 /* Disable UniFi function 1 (the 802.11 part). */ 566 /* Disable UniFi function 1 (the 802.11 part). */
581 _sdio_claim_host(func); 567 _sdio_claim_host(func);
582 err = sdio_disable_func(func); 568 err = sdio_disable_func(func);
@@ -585,7 +571,6 @@ CsrSdioFunctionDisable(CsrSdioFunction *function)
585 unifi_error(NULL, "Failed to disable SDIO function %d\n", func->num); 571 unifi_error(NULL, "Failed to disable SDIO function %d\n", func->num);
586 } 572 }
587 573
588 func_exit();
589 return ConvertSdioToCsrSdioResult(err); 574 return ConvertSdioToCsrSdioResult(err);
590} /* CsrSdioFunctionDisable() */ 575} /* CsrSdioFunctionDisable() */
591 576
@@ -1034,8 +1019,6 @@ uf_glue_sdio_probe(struct sdio_func *func,
1034 int instance; 1019 int instance;
1035 CsrSdioFunction *sdio_ctx; 1020 CsrSdioFunction *sdio_ctx;
1036 1021
1037 func_enter();
1038
1039 /* First of all claim the SDIO driver */ 1022 /* First of all claim the SDIO driver */
1040 sdio_claim_host(func); 1023 sdio_claim_host(func);
1041 1024
@@ -1103,7 +1086,6 @@ uf_glue_sdio_probe(struct sdio_func *func,
1103 wake_lock(&unifi_sdio_wake_lock); 1086 wake_lock(&unifi_sdio_wake_lock);
1104#endif 1087#endif
1105 1088
1106 func_exit();
1107 return 0; 1089 return 0;
1108} /* uf_glue_sdio_probe() */ 1090} /* uf_glue_sdio_probe() */
1109 1091
@@ -1131,8 +1113,6 @@ uf_glue_sdio_remove(struct sdio_func *func)
1131 return; 1113 return;
1132 } 1114 }
1133 1115
1134 func_enter();
1135
1136 unifi_info(NULL, "UniFi card removed\n"); 1116 unifi_info(NULL, "UniFi card removed\n");
1137 1117
1138 /* Clean up the SDIO function driver */ 1118 /* Clean up the SDIO function driver */
@@ -1148,8 +1128,6 @@ uf_glue_sdio_remove(struct sdio_func *func)
1148 1128
1149 kfree(sdio_ctx); 1129 kfree(sdio_ctx);
1150 1130
1151 func_exit();
1152
1153} /* uf_glue_sdio_remove */ 1131} /* uf_glue_sdio_remove */
1154 1132
1155 1133
@@ -1183,11 +1161,8 @@ MODULE_DEVICE_TABLE(sdio, unifi_ids);
1183static int 1161static int
1184uf_glue_sdio_suspend(struct device *dev) 1162uf_glue_sdio_suspend(struct device *dev)
1185{ 1163{
1186 func_enter();
1187
1188 unifi_trace(NULL, UDBG1, "uf_glue_sdio_suspend"); 1164 unifi_trace(NULL, UDBG1, "uf_glue_sdio_suspend");
1189 1165
1190 func_exit();
1191 return 0; 1166 return 0;
1192} /* uf_glue_sdio_suspend */ 1167} /* uf_glue_sdio_suspend */
1193 1168
@@ -1208,8 +1183,6 @@ uf_glue_sdio_suspend(struct device *dev)
1208static int 1183static int
1209uf_glue_sdio_resume(struct device *dev) 1184uf_glue_sdio_resume(struct device *dev)
1210{ 1185{
1211 func_enter();
1212
1213 unifi_trace(NULL, UDBG1, "uf_glue_sdio_resume"); 1186 unifi_trace(NULL, UDBG1, "uf_glue_sdio_resume");
1214 1187
1215#ifdef ANDROID_BUILD 1188#ifdef ANDROID_BUILD
@@ -1217,7 +1190,6 @@ uf_glue_sdio_resume(struct device *dev)
1217 wake_lock(&unifi_sdio_wake_lock); 1190 wake_lock(&unifi_sdio_wake_lock);
1218#endif 1191#endif
1219 1192
1220 func_exit();
1221 return 0; 1193 return 0;
1222 1194
1223} /* uf_glue_sdio_resume */ 1195} /* uf_glue_sdio_resume */
diff --git a/drivers/staging/csr/sme_blocking.c b/drivers/staging/csr/sme_blocking.c
index 543e8f2c407a..d88ccd5bd428 100644
--- a/drivers/staging/csr/sme_blocking.c
+++ b/drivers/staging/csr/sme_blocking.c
@@ -270,17 +270,15 @@ int sme_mgt_wifi_off(unifi_priv_t *priv)
270 } 270 }
271 271
272 r = sme_init_request(priv); 272 r = sme_init_request(priv);
273 if (r) { 273 if (r)
274 return -EIO; 274 return -EIO;
275 }
276 275
277 /* Stop the SME */ 276 /* Stop the SME */
278 CsrWifiSmeWifiOffReqSend(0); 277 CsrWifiSmeWifiOffReqSend(0);
279 278
280 r = sme_wait_for_reply(priv, UNIFI_SME_MGT_LONG_TIMEOUT); 279 r = sme_wait_for_reply(priv, UNIFI_SME_MGT_LONG_TIMEOUT);
281 if (r) { 280 if (r)
282 return r; 281 return r;
283 }
284 282
285 unifi_trace(priv, UDBG4, 283 unifi_trace(priv, UDBG4,
286 "sme_mgt_wifi_off: unifi_mgt_wifi_off_req <-- (r=%d, status=%d)\n", 284 "sme_mgt_wifi_off: unifi_mgt_wifi_off_req <-- (r=%d, status=%d)\n",
@@ -300,16 +298,14 @@ int sme_mgt_key(unifi_priv_t *priv, CsrWifiSmeKey *sme_key,
300 } 298 }
301 299
302 r = sme_init_request(priv); 300 r = sme_init_request(priv);
303 if (r) { 301 if (r)
304 return -EIO; 302 return -EIO;
305 }
306 303
307 CsrWifiSmeKeyReqSend(0, CSR_WIFI_INTERFACE_IN_USE, action, *sme_key); 304 CsrWifiSmeKeyReqSend(0, CSR_WIFI_INTERFACE_IN_USE, action, *sme_key);
308 305
309 r = sme_wait_for_reply(priv, UNIFI_SME_MGT_SHORT_TIMEOUT); 306 r = sme_wait_for_reply(priv, UNIFI_SME_MGT_SHORT_TIMEOUT);
310 if (r) { 307 if (r)
311 return r; 308 return r;
312 }
313 309
314 return convert_sme_error(priv->sme_reply.reply_status); 310 return convert_sme_error(priv->sme_reply.reply_status);
315} 311}
@@ -332,9 +328,8 @@ int sme_mgt_scan_full(unifi_priv_t *priv,
332 unifi_trace(priv, UDBG4, "sme_mgt_scan_full: -->\n"); 328 unifi_trace(priv, UDBG4, "sme_mgt_scan_full: -->\n");
333 329
334 r = sme_init_request(priv); 330 r = sme_init_request(priv);
335 if (r) { 331 if (r)
336 return -EIO; 332 return -EIO;
337 }
338 333
339 /* If a channel list is provided, do an active scan */ 334 /* If a channel list is provided, do an active scan */
340 if (is_active) { 335 if (is_active) {
@@ -354,16 +349,14 @@ int sme_mgt_scan_full(unifi_priv_t *priv,
354 0, NULL); 349 0, NULL);
355 350
356 r = sme_wait_for_reply(priv, UNIFI_SME_MGT_LONG_TIMEOUT); 351 r = sme_wait_for_reply(priv, UNIFI_SME_MGT_LONG_TIMEOUT);
357 if (r) { 352 if (r)
358 return r; 353 return r;
359 }
360 354
361 unifi_trace(priv, UDBG4, "sme_mgt_scan_full: <-- (status=%d)\n", priv->sme_reply.reply_status); 355 unifi_trace(priv, UDBG4, "sme_mgt_scan_full: <-- (status=%d)\n", priv->sme_reply.reply_status);
362 if (priv->sme_reply.reply_status == CSR_WIFI_RESULT_UNAVAILABLE) { 356 if (priv->sme_reply.reply_status == CSR_WIFI_RESULT_UNAVAILABLE)
363 return 0; /* initial scan already underway */ 357 return 0; /* initial scan already underway */
364 } else { 358 else
365 return convert_sme_error(priv->sme_reply.reply_status); 359 return convert_sme_error(priv->sme_reply.reply_status);
366 }
367} 360}
368 361
369 362
@@ -385,15 +378,13 @@ int sme_mgt_scan_results_get_async(unifi_priv_t *priv,
385 } 378 }
386 379
387 r = sme_init_request(priv); 380 r = sme_init_request(priv);
388 if (r) { 381 if (r)
389 return -EIO; 382 return -EIO;
390 }
391 383
392 CsrWifiSmeScanResultsGetReqSend(0); 384 CsrWifiSmeScanResultsGetReqSend(0);
393 r = sme_wait_for_reply(priv, UNIFI_SME_MGT_LONG_TIMEOUT); 385 r = sme_wait_for_reply(priv, UNIFI_SME_MGT_LONG_TIMEOUT);
394 if (r) { 386 if (r)
395 return r; 387 return r;
396 }
397 388
398 scan_result_list_count = priv->sme_reply.reply_scan_results_count; 389 scan_result_list_count = priv->sme_reply.reply_scan_results_count;
399 scan_result_list = priv->sme_reply.reply_scan_results; 390 scan_result_list = priv->sme_reply.reply_scan_results;
@@ -454,20 +445,17 @@ int sme_mgt_connect(unifi_priv_t *priv)
454 priv->connection_config.ssid.ssid); 445 priv->connection_config.ssid.ssid);
455 446
456 r = sme_init_request(priv); 447 r = sme_init_request(priv);
457 if (r) { 448 if (r)
458 return -EIO; 449 return -EIO;
459 }
460 450
461 CsrWifiSmeConnectReqSend(0, CSR_WIFI_INTERFACE_IN_USE, priv->connection_config); 451 CsrWifiSmeConnectReqSend(0, CSR_WIFI_INTERFACE_IN_USE, priv->connection_config);
462 r = sme_wait_for_reply(priv, UNIFI_SME_MGT_SHORT_TIMEOUT); 452 r = sme_wait_for_reply(priv, UNIFI_SME_MGT_SHORT_TIMEOUT);
463 if (r) { 453 if (r)
464 return r; 454 return r;
465 }
466 455
467 if (priv->sme_reply.reply_status) { 456 if (priv->sme_reply.reply_status)
468 unifi_trace(priv, UDBG1, "sme_mgt_connect: failed with SME status %d\n", 457 unifi_trace(priv, UDBG1, "sme_mgt_connect: failed with SME status %d\n",
469 priv->sme_reply.reply_status); 458 priv->sme_reply.reply_status);
470 }
471 459
472 return convert_sme_error(priv->sme_reply.reply_status); 460 return convert_sme_error(priv->sme_reply.reply_status);
473} 461}
@@ -483,15 +471,13 @@ int sme_mgt_disconnect(unifi_priv_t *priv)
483 } 471 }
484 472
485 r = sme_init_request(priv); 473 r = sme_init_request(priv);
486 if (r) { 474 if (r)
487 return -EIO; 475 return -EIO;
488 }
489 476
490 CsrWifiSmeDisconnectReqSend(0, CSR_WIFI_INTERFACE_IN_USE); 477 CsrWifiSmeDisconnectReqSend(0, CSR_WIFI_INTERFACE_IN_USE);
491 r = sme_wait_for_reply(priv, UNIFI_SME_MGT_SHORT_TIMEOUT); 478 r = sme_wait_for_reply(priv, UNIFI_SME_MGT_SHORT_TIMEOUT);
492 if (r) { 479 if (r)
493 return r; 480 return r;
494 }
495 481
496 unifi_trace(priv, UDBG4, "sme_mgt_disconnect: <-- (status=%d)\n", priv->sme_reply.reply_status); 482 unifi_trace(priv, UDBG4, "sme_mgt_disconnect: <-- (status=%d)\n", priv->sme_reply.reply_status);
497 return convert_sme_error(priv->sme_reply.reply_status); 483 return convert_sme_error(priv->sme_reply.reply_status);
@@ -510,16 +496,14 @@ int sme_mgt_pmkid(unifi_priv_t *priv,
510 } 496 }
511 497
512 r = sme_init_request(priv); 498 r = sme_init_request(priv);
513 if (r) { 499 if (r)
514 return -EIO; 500 return -EIO;
515 }
516 501
517 CsrWifiSmePmkidReqSend(0, CSR_WIFI_INTERFACE_IN_USE, action, 502 CsrWifiSmePmkidReqSend(0, CSR_WIFI_INTERFACE_IN_USE, action,
518 pmkid_list->pmkidsCount, pmkid_list->pmkids); 503 pmkid_list->pmkidsCount, pmkid_list->pmkids);
519 r = sme_wait_for_reply(priv, UNIFI_SME_MGT_SHORT_TIMEOUT); 504 r = sme_wait_for_reply(priv, UNIFI_SME_MGT_SHORT_TIMEOUT);
520 if (r) { 505 if (r)
521 return r; 506 return r;
522 }
523 507
524 unifi_trace(priv, UDBG4, "sme_mgt_pmkid: <-- (status=%d)\n", priv->sme_reply.reply_status); 508 unifi_trace(priv, UDBG4, "sme_mgt_pmkid: <-- (status=%d)\n", priv->sme_reply.reply_status);
525 return convert_sme_error(priv->sme_reply.reply_status); 509 return convert_sme_error(priv->sme_reply.reply_status);
@@ -537,9 +521,8 @@ int sme_mgt_mib_get(unifi_priv_t *priv,
537 } 521 }
538 522
539 r = sme_init_request(priv); 523 r = sme_init_request(priv);
540 if (r) { 524 if (r)
541 return -EIO; 525 return -EIO;
542 }
543 526
544 priv->mib_cfm_buffer = varbind; 527 priv->mib_cfm_buffer = varbind;
545 priv->mib_cfm_buffer_length = MAX_VARBIND_LENGTH; 528 priv->mib_cfm_buffer_length = MAX_VARBIND_LENGTH;
@@ -571,15 +554,13 @@ int sme_mgt_mib_set(unifi_priv_t *priv,
571 } 554 }
572 555
573 r = sme_init_request(priv); 556 r = sme_init_request(priv);
574 if (r) { 557 if (r)
575 return -EIO; 558 return -EIO;
576 }
577 559
578 CsrWifiSmeMibSetReqSend(0, length, varbind); 560 CsrWifiSmeMibSetReqSend(0, length, varbind);
579 r = sme_wait_for_reply(priv, UNIFI_SME_MGT_SHORT_TIMEOUT); 561 r = sme_wait_for_reply(priv, UNIFI_SME_MGT_SHORT_TIMEOUT);
580 if (r) { 562 if (r)
581 return r; 563 return r;
582 }
583 564
584 unifi_trace(priv, UDBG4, "sme_mgt_mib_set: <-- (status=%d)\n", priv->sme_reply.reply_status); 565 unifi_trace(priv, UDBG4, "sme_mgt_mib_set: <-- (status=%d)\n", priv->sme_reply.reply_status);
585 return convert_sme_error(priv->sme_reply.reply_status); 566 return convert_sme_error(priv->sme_reply.reply_status);
@@ -598,16 +579,14 @@ int sme_mgt_power_config_set(unifi_priv_t *priv, CsrWifiSmePowerConfig *powerCon
598 } 579 }
599 580
600 r = sme_init_request(priv); 581 r = sme_init_request(priv);
601 if (r) { 582 if (r)
602 return -EIO; 583 return -EIO;
603 }
604 584
605 CsrWifiSmePowerConfigSetReqSend(0, *powerConfig); 585 CsrWifiSmePowerConfigSetReqSend(0, *powerConfig);
606 586
607 r = sme_wait_for_reply(priv, UNIFI_SME_MGT_SHORT_TIMEOUT); 587 r = sme_wait_for_reply(priv, UNIFI_SME_MGT_SHORT_TIMEOUT);
608 if (r) { 588 if (r)
609 return r; 589 return r;
610 }
611 590
612 unifi_trace(priv, UDBG4, 591 unifi_trace(priv, UDBG4,
613 "sme_mgt_set_value_async: unifi_mgt_set_value_req <-- (r=%d status=%d)\n", 592 "sme_mgt_set_value_async: unifi_mgt_set_value_req <-- (r=%d status=%d)\n",
@@ -637,29 +616,26 @@ int sme_mgt_sme_config_set(unifi_priv_t *priv, CsrWifiSmeStaConfig *staConfig, C
637 } 616 }
638 617
639 r = sme_init_request(priv); 618 r = sme_init_request(priv);
640 if (r) { 619 if (r)
641 return -EIO; 620 return -EIO;
642 }
643 621
644 CsrWifiSmeSmeStaConfigSetReqSend(0, CSR_WIFI_INTERFACE_IN_USE, *staConfig); 622 CsrWifiSmeSmeStaConfigSetReqSend(0, CSR_WIFI_INTERFACE_IN_USE, *staConfig);
645 r = sme_wait_for_reply(priv, UNIFI_SME_MGT_SHORT_TIMEOUT); 623 r = sme_wait_for_reply(priv, UNIFI_SME_MGT_SHORT_TIMEOUT);
646 if (r) { 624 if (r)
647 return r; 625 return r;
648 } 626
649 unifi_trace(priv, UDBG4, 627 unifi_trace(priv, UDBG4,
650 "sme_mgt_sme_config_set: CsrWifiSmeSmeStaConfigSetReq <-- (r=%d status=%d)\n", 628 "sme_mgt_sme_config_set: CsrWifiSmeSmeStaConfigSetReq <-- (r=%d status=%d)\n",
651 r, priv->sme_reply.reply_status); 629 r, priv->sme_reply.reply_status);
652 630
653 r = sme_init_request(priv); 631 r = sme_init_request(priv);
654 if (r) { 632 if (r)
655 return -EIO; 633 return -EIO;
656 }
657 634
658 CsrWifiSmeSmeCommonConfigSetReqSend(0, *deviceConfig); 635 CsrWifiSmeSmeCommonConfigSetReqSend(0, *deviceConfig);
659 r = sme_wait_for_reply(priv, UNIFI_SME_MGT_SHORT_TIMEOUT); 636 r = sme_wait_for_reply(priv, UNIFI_SME_MGT_SHORT_TIMEOUT);
660 if (r) { 637 if (r)
661 return r; 638 return r;
662 }
663 639
664 unifi_trace(priv, UDBG4, 640 unifi_trace(priv, UDBG4,
665 "sme_mgt_sme_config_set: CsrWifiSmeSmeCommonConfigSetReq <-- (r=%d status=%d)\n", 641 "sme_mgt_sme_config_set: CsrWifiSmeSmeCommonConfigSetReq <-- (r=%d status=%d)\n",
@@ -693,16 +669,14 @@ int sme_mgt_mib_config_set(unifi_priv_t *priv, CsrWifiSmeMibConfig *mibConfig)
693 } 669 }
694 670
695 r = sme_init_request(priv); 671 r = sme_init_request(priv);
696 if (r) { 672 if (r)
697 return -EIO; 673 return -EIO;
698 }
699 674
700 CsrWifiSmeMibConfigSetReqSend(0, *mibConfig); 675 CsrWifiSmeMibConfigSetReqSend(0, *mibConfig);
701 676
702 r = sme_wait_for_reply(priv, UNIFI_SME_MGT_SHORT_TIMEOUT); 677 r = sme_wait_for_reply(priv, UNIFI_SME_MGT_SHORT_TIMEOUT);
703 if (r) { 678 if (r)
704 return r; 679 return r;
705 }
706 680
707 unifi_trace(priv, UDBG4, 681 unifi_trace(priv, UDBG4,
708 "sme_mgt_mib_config_set: unifi_mgt_set_mib_config_req <-- (r=%d status=%d)\n", 682 "sme_mgt_mib_config_set: unifi_mgt_set_mib_config_req <-- (r=%d status=%d)\n",
@@ -732,16 +706,14 @@ int sme_mgt_coex_config_set(unifi_priv_t *priv, CsrWifiSmeCoexConfig *coexConfig
732 } 706 }
733 707
734 r = sme_init_request(priv); 708 r = sme_init_request(priv);
735 if (r) { 709 if (r)
736 return -EIO; 710 return -EIO;
737 }
738 711
739 CsrWifiSmeCoexConfigSetReqSend(0, *coexConfig); 712 CsrWifiSmeCoexConfigSetReqSend(0, *coexConfig);
740 713
741 r = sme_wait_for_reply(priv, UNIFI_SME_MGT_SHORT_TIMEOUT); 714 r = sme_wait_for_reply(priv, UNIFI_SME_MGT_SHORT_TIMEOUT);
742 if (r) { 715 if (r)
743 return r; 716 return r;
744 }
745 717
746 unifi_trace(priv, UDBG4, 718 unifi_trace(priv, UDBG4,
747 "sme_mgt_coex_config_set: unifi_mgt_set_mib_config_req <-- (r=%d status=%d)\n", 719 "sme_mgt_coex_config_set: unifi_mgt_set_mib_config_req <-- (r=%d status=%d)\n",
@@ -773,16 +745,14 @@ int sme_mgt_host_config_set(unifi_priv_t *priv, CsrWifiSmeHostConfig *hostConfig
773 } 745 }
774 746
775 r = sme_init_request(priv); 747 r = sme_init_request(priv);
776 if (r) { 748 if (r)
777 return -EIO; 749 return -EIO;
778 }
779 750
780 CsrWifiSmeHostConfigSetReqSend(0, CSR_WIFI_INTERFACE_IN_USE, *hostConfig); 751 CsrWifiSmeHostConfigSetReqSend(0, CSR_WIFI_INTERFACE_IN_USE, *hostConfig);
781 752
782 r = sme_wait_for_reply(priv, UNIFI_SME_MGT_SHORT_TIMEOUT); 753 r = sme_wait_for_reply(priv, UNIFI_SME_MGT_SHORT_TIMEOUT);
783 if (r) { 754 if (r)
784 return r; 755 return r;
785 }
786 756
787 unifi_trace(priv, UDBG4, 757 unifi_trace(priv, UDBG4,
788 "sme_mgt_host_config_set: unifi_mgt_set_host_config_req <-- (r=%d status=%d)\n", 758 "sme_mgt_host_config_set: unifi_mgt_set_host_config_req <-- (r=%d status=%d)\n",
@@ -815,16 +785,14 @@ int sme_mgt_versions_get(unifi_priv_t *priv, CsrWifiSmeVersions *versions)
815 785
816 unifi_trace(priv, UDBG4, "sme_mgt_versions_get: unifi_mgt_versions_get_req -->\n"); 786 unifi_trace(priv, UDBG4, "sme_mgt_versions_get: unifi_mgt_versions_get_req -->\n");
817 r = sme_init_request(priv); 787 r = sme_init_request(priv);
818 if (r) { 788 if (r)
819 return -EIO; 789 return -EIO;
820 }
821 790
822 CsrWifiSmeVersionsGetReqSend(0); 791 CsrWifiSmeVersionsGetReqSend(0);
823 792
824 r = sme_wait_for_reply(priv, UNIFI_SME_MGT_SHORT_TIMEOUT); 793 r = sme_wait_for_reply(priv, UNIFI_SME_MGT_SHORT_TIMEOUT);
825 if (r) { 794 if (r)
826 return r; 795 return r;
827 }
828 796
829 /* store the reply */ 797 /* store the reply */
830 if (versions != NULL) { 798 if (versions != NULL) {
@@ -861,16 +829,14 @@ int sme_mgt_power_config_get(unifi_priv_t *priv, CsrWifiSmePowerConfig *powerCon
861 829
862 unifi_trace(priv, UDBG4, "sme_mgt_power_config_get: unifi_mgt_power_config_req -->\n"); 830 unifi_trace(priv, UDBG4, "sme_mgt_power_config_get: unifi_mgt_power_config_req -->\n");
863 r = sme_init_request(priv); 831 r = sme_init_request(priv);
864 if (r) { 832 if (r)
865 return -EIO; 833 return -EIO;
866 }
867 834
868 CsrWifiSmePowerConfigGetReqSend(0); 835 CsrWifiSmePowerConfigGetReqSend(0);
869 836
870 r = sme_wait_for_reply(priv, UNIFI_SME_MGT_SHORT_TIMEOUT); 837 r = sme_wait_for_reply(priv, UNIFI_SME_MGT_SHORT_TIMEOUT);
871 if (r) { 838 if (r)
872 return r; 839 return r;
873 }
874 840
875 /* store the reply */ 841 /* store the reply */
876 if (powerConfig != NULL) { 842 if (powerConfig != NULL) {
@@ -905,23 +871,20 @@ int sme_mgt_host_config_get(unifi_priv_t *priv, CsrWifiSmeHostConfig *hostConfig
905 871
906 unifi_trace(priv, UDBG4, "sme_mgt_host_config_get: unifi_mgt_host_config_get_req -->\n"); 872 unifi_trace(priv, UDBG4, "sme_mgt_host_config_get: unifi_mgt_host_config_get_req -->\n");
907 r = sme_init_request(priv); 873 r = sme_init_request(priv);
908 if (r) { 874 if (r)
909 return -EIO; 875 return -EIO;
910 }
911 876
912 CsrWifiSmeHostConfigGetReqSend(0, CSR_WIFI_INTERFACE_IN_USE); 877 CsrWifiSmeHostConfigGetReqSend(0, CSR_WIFI_INTERFACE_IN_USE);
913 878
914 r = sme_wait_for_reply(priv, UNIFI_SME_MGT_SHORT_TIMEOUT); 879 r = sme_wait_for_reply(priv, UNIFI_SME_MGT_SHORT_TIMEOUT);
915 if (r) { 880 if (r)
916 return r; 881 return r;
917 }
918 882
919 /* store the reply */ 883 /* store the reply */
920 if (hostConfig != NULL) { 884 if (hostConfig != NULL)
921 memcpy((unsigned char*)hostConfig, 885 memcpy((unsigned char*)hostConfig,
922 (unsigned char*)&priv->sme_reply.hostConfig, 886 (unsigned char*)&priv->sme_reply.hostConfig,
923 sizeof(CsrWifiSmeHostConfig)); 887 sizeof(CsrWifiSmeHostConfig));
924 }
925 888
926 unifi_trace(priv, UDBG4, 889 unifi_trace(priv, UDBG4,
927 "sme_mgt_host_config_get: unifi_mgt_host_config_get_req <-- (r=%d status=%d)\n", 890 "sme_mgt_host_config_get: unifi_mgt_host_config_get_req <-- (r=%d status=%d)\n",
@@ -951,41 +914,35 @@ int sme_mgt_sme_config_get(unifi_priv_t *priv, CsrWifiSmeStaConfig *staConfig, C
951 914
952 /* Common device config */ 915 /* Common device config */
953 r = sme_init_request(priv); 916 r = sme_init_request(priv);
954 if (r) { 917 if (r)
955 return -EIO; 918 return -EIO;
956 }
957 919
958 CsrWifiSmeSmeCommonConfigGetReqSend(0); 920 CsrWifiSmeSmeCommonConfigGetReqSend(0);
959 r = sme_wait_for_reply(priv, UNIFI_SME_MGT_SHORT_TIMEOUT); 921 r = sme_wait_for_reply(priv, UNIFI_SME_MGT_SHORT_TIMEOUT);
960 if (r) { 922 if (r)
961 return r; 923 return r;
962 }
963 924
964 /* store the reply */ 925 /* store the reply */
965 if (deviceConfig != NULL) { 926 if (deviceConfig != NULL)
966 memcpy((unsigned char*)deviceConfig, 927 memcpy((unsigned char*)deviceConfig,
967 (unsigned char*)&priv->sme_reply.deviceConfig, 928 (unsigned char*)&priv->sme_reply.deviceConfig,
968 sizeof(CsrWifiSmeDeviceConfig)); 929 sizeof(CsrWifiSmeDeviceConfig));
969 }
970 930
971 /* STA config */ 931 /* STA config */
972 r = sme_init_request(priv); 932 r = sme_init_request(priv);
973 if (r) { 933 if (r)
974 return -EIO; 934 return -EIO;
975 }
976 935
977 CsrWifiSmeSmeStaConfigGetReqSend(0, CSR_WIFI_INTERFACE_IN_USE); 936 CsrWifiSmeSmeStaConfigGetReqSend(0, CSR_WIFI_INTERFACE_IN_USE);
978 r = sme_wait_for_reply(priv, UNIFI_SME_MGT_SHORT_TIMEOUT); 937 r = sme_wait_for_reply(priv, UNIFI_SME_MGT_SHORT_TIMEOUT);
979 if (r) { 938 if (r)
980 return r; 939 return r;
981 }
982 940
983 /* store the reply */ 941 /* store the reply */
984 if (staConfig != NULL) { 942 if (staConfig != NULL)
985 memcpy((unsigned char*)staConfig, 943 memcpy((unsigned char*)staConfig,
986 (unsigned char*)&priv->sme_reply.staConfig, 944 (unsigned char*)&priv->sme_reply.staConfig,
987 sizeof(CsrWifiSmeStaConfig)); 945 sizeof(CsrWifiSmeStaConfig));
988 }
989 946
990 unifi_trace(priv, UDBG4, 947 unifi_trace(priv, UDBG4,
991 "sme_mgt_sme_config_get: unifi_mgt_sme_config_get_req <-- (r=%d status=%d)\n", 948 "sme_mgt_sme_config_get: unifi_mgt_sme_config_get_req <-- (r=%d status=%d)\n",
@@ -1014,23 +971,20 @@ int sme_mgt_coex_info_get(unifi_priv_t *priv, CsrWifiSmeCoexInfo *coexInfo)
1014 971
1015 unifi_trace(priv, UDBG4, "sme_mgt_coex_info_get: unifi_mgt_coex_info_get_req -->\n"); 972 unifi_trace(priv, UDBG4, "sme_mgt_coex_info_get: unifi_mgt_coex_info_get_req -->\n");
1016 r = sme_init_request(priv); 973 r = sme_init_request(priv);
1017 if (r) { 974 if (r)
1018 return -EIO; 975 return -EIO;
1019 }
1020 976
1021 CsrWifiSmeCoexInfoGetReqSend(0); 977 CsrWifiSmeCoexInfoGetReqSend(0);
1022 978
1023 r = sme_wait_for_reply(priv, UNIFI_SME_MGT_SHORT_TIMEOUT); 979 r = sme_wait_for_reply(priv, UNIFI_SME_MGT_SHORT_TIMEOUT);
1024 if (r) { 980 if (r)
1025 return r; 981 return r;
1026 }
1027 982
1028 /* store the reply */ 983 /* store the reply */
1029 if (coexInfo != NULL) { 984 if (coexInfo != NULL)
1030 memcpy((unsigned char*)coexInfo, 985 memcpy((unsigned char*)coexInfo,
1031 (unsigned char*)&priv->sme_reply.coexInfo, 986 (unsigned char*)&priv->sme_reply.coexInfo,
1032 sizeof(CsrWifiSmeCoexInfo)); 987 sizeof(CsrWifiSmeCoexInfo));
1033 }
1034 988
1035 unifi_trace(priv, UDBG4, 989 unifi_trace(priv, UDBG4,
1036 "sme_mgt_coex_info_get: unifi_mgt_coex_info_get_req <-- (r=%d status=%d)\n", 990 "sme_mgt_coex_info_get: unifi_mgt_coex_info_get_req <-- (r=%d status=%d)\n",
@@ -1060,23 +1014,20 @@ int sme_mgt_coex_config_get(unifi_priv_t *priv, CsrWifiSmeCoexConfig *coexConfig
1060 1014
1061 unifi_trace(priv, UDBG4, "sme_mgt_coex_config_get: unifi_mgt_coex_config_get_req -->\n"); 1015 unifi_trace(priv, UDBG4, "sme_mgt_coex_config_get: unifi_mgt_coex_config_get_req -->\n");
1062 r = sme_init_request(priv); 1016 r = sme_init_request(priv);
1063 if (r) { 1017 if (r)
1064 return -EIO; 1018 return -EIO;
1065 }
1066 1019
1067 CsrWifiSmeCoexConfigGetReqSend(0); 1020 CsrWifiSmeCoexConfigGetReqSend(0);
1068 1021
1069 r = sme_wait_for_reply(priv, UNIFI_SME_MGT_SHORT_TIMEOUT); 1022 r = sme_wait_for_reply(priv, UNIFI_SME_MGT_SHORT_TIMEOUT);
1070 if (r) { 1023 if (r)
1071 return r; 1024 return r;
1072 }
1073 1025
1074 /* store the reply */ 1026 /* store the reply */
1075 if (coexConfig != NULL) { 1027 if (coexConfig != NULL)
1076 memcpy((unsigned char*)coexConfig, 1028 memcpy((unsigned char*)coexConfig,
1077 (unsigned char*)&priv->sme_reply.coexConfig, 1029 (unsigned char*)&priv->sme_reply.coexConfig,
1078 sizeof(CsrWifiSmeCoexConfig)); 1030 sizeof(CsrWifiSmeCoexConfig));
1079 }
1080 1031
1081 unifi_trace(priv, UDBG4, 1032 unifi_trace(priv, UDBG4,
1082 "sme_mgt_coex_config_get: unifi_mgt_coex_config_get_req <-- (r=%d status=%d)\n", 1033 "sme_mgt_coex_config_get: unifi_mgt_coex_config_get_req <-- (r=%d status=%d)\n",
@@ -1104,23 +1055,20 @@ int sme_mgt_mib_config_get(unifi_priv_t *priv, CsrWifiSmeMibConfig *mibConfig)
1104 1055
1105 unifi_trace(priv, UDBG4, "sme_mgt_mib_config_get: unifi_mgt_mib_config_get_req -->\n"); 1056 unifi_trace(priv, UDBG4, "sme_mgt_mib_config_get: unifi_mgt_mib_config_get_req -->\n");
1106 r = sme_init_request(priv); 1057 r = sme_init_request(priv);
1107 if (r) { 1058 if (r)
1108 return -EIO; 1059 return -EIO;
1109 }
1110 1060
1111 CsrWifiSmeMibConfigGetReqSend(0); 1061 CsrWifiSmeMibConfigGetReqSend(0);
1112 1062
1113 r = sme_wait_for_reply(priv, UNIFI_SME_MGT_SHORT_TIMEOUT); 1063 r = sme_wait_for_reply(priv, UNIFI_SME_MGT_SHORT_TIMEOUT);
1114 if (r) { 1064 if (r)
1115 return r; 1065 return r;
1116 }
1117 1066
1118 /* store the reply */ 1067 /* store the reply */
1119 if (mibConfig != NULL) { 1068 if (mibConfig != NULL)
1120 memcpy((unsigned char*)mibConfig, 1069 memcpy((unsigned char*)mibConfig,
1121 (unsigned char*)&priv->sme_reply.mibConfig, 1070 (unsigned char*)&priv->sme_reply.mibConfig,
1122 sizeof(CsrWifiSmeMibConfig)); 1071 sizeof(CsrWifiSmeMibConfig));
1123 }
1124 1072
1125 unifi_trace(priv, UDBG4, 1073 unifi_trace(priv, UDBG4,
1126 "sme_mgt_mib_config_get: unifi_mgt_mib_config_get_req <-- (r=%d status=%d)\n", 1074 "sme_mgt_mib_config_get: unifi_mgt_mib_config_get_req <-- (r=%d status=%d)\n",
@@ -1148,23 +1096,20 @@ int sme_mgt_connection_info_get(unifi_priv_t *priv, CsrWifiSmeConnectionInfo *co
1148 1096
1149 unifi_trace(priv, UDBG4, "sme_mgt_connection_info_get: unifi_mgt_connection_info_get_req -->\n"); 1097 unifi_trace(priv, UDBG4, "sme_mgt_connection_info_get: unifi_mgt_connection_info_get_req -->\n");
1150 r = sme_init_request(priv); 1098 r = sme_init_request(priv);
1151 if (r) { 1099 if (r)
1152 return -EIO; 1100 return -EIO;
1153 }
1154 1101
1155 CsrWifiSmeConnectionInfoGetReqSend(0, CSR_WIFI_INTERFACE_IN_USE); 1102 CsrWifiSmeConnectionInfoGetReqSend(0, CSR_WIFI_INTERFACE_IN_USE);
1156 1103
1157 r = sme_wait_for_reply(priv, UNIFI_SME_MGT_SHORT_TIMEOUT); 1104 r = sme_wait_for_reply(priv, UNIFI_SME_MGT_SHORT_TIMEOUT);
1158 if (r) { 1105 if (r)
1159 return r; 1106 return r;
1160 }
1161 1107
1162 /* store the reply */ 1108 /* store the reply */
1163 if (connectionInfo != NULL) { 1109 if (connectionInfo != NULL)
1164 memcpy((unsigned char*)connectionInfo, 1110 memcpy((unsigned char*)connectionInfo,
1165 (unsigned char*)&priv->sme_reply.connectionInfo, 1111 (unsigned char*)&priv->sme_reply.connectionInfo,
1166 sizeof(CsrWifiSmeConnectionInfo)); 1112 sizeof(CsrWifiSmeConnectionInfo));
1167 }
1168 1113
1169 unifi_trace(priv, UDBG4, 1114 unifi_trace(priv, UDBG4,
1170 "sme_mgt_connection_info_get: unifi_mgt_connection_info_get_req <-- (r=%d status=%d)\n", 1115 "sme_mgt_connection_info_get: unifi_mgt_connection_info_get_req <-- (r=%d status=%d)\n",
@@ -1192,23 +1137,20 @@ int sme_mgt_connection_config_get(unifi_priv_t *priv, CsrWifiSmeConnectionConfig
1192 1137
1193 unifi_trace(priv, UDBG4, "sme_mgt_connection_config_get: unifi_mgt_connection_config_get_req -->\n"); 1138 unifi_trace(priv, UDBG4, "sme_mgt_connection_config_get: unifi_mgt_connection_config_get_req -->\n");
1194 r = sme_init_request(priv); 1139 r = sme_init_request(priv);
1195 if (r) { 1140 if (r)
1196 return -EIO; 1141 return -EIO;
1197 }
1198 1142
1199 CsrWifiSmeConnectionConfigGetReqSend(0, CSR_WIFI_INTERFACE_IN_USE); 1143 CsrWifiSmeConnectionConfigGetReqSend(0, CSR_WIFI_INTERFACE_IN_USE);
1200 1144
1201 r = sme_wait_for_reply(priv, UNIFI_SME_MGT_SHORT_TIMEOUT); 1145 r = sme_wait_for_reply(priv, UNIFI_SME_MGT_SHORT_TIMEOUT);
1202 if (r) { 1146 if (r)
1203 return r; 1147 return r;
1204 }
1205 1148
1206 /* store the reply */ 1149 /* store the reply */
1207 if (connectionConfig != NULL) { 1150 if (connectionConfig != NULL)
1208 memcpy((unsigned char*)connectionConfig, 1151 memcpy((unsigned char*)connectionConfig,
1209 (unsigned char*)&priv->sme_reply.connectionConfig, 1152 (unsigned char*)&priv->sme_reply.connectionConfig,
1210 sizeof(CsrWifiSmeConnectionConfig)); 1153 sizeof(CsrWifiSmeConnectionConfig));
1211 }
1212 1154
1213 unifi_trace(priv, UDBG4, 1155 unifi_trace(priv, UDBG4,
1214 "sme_mgt_connection_config_get: unifi_mgt_connection_config_get_req <-- (r=%d status=%d)\n", 1156 "sme_mgt_connection_config_get: unifi_mgt_connection_config_get_req <-- (r=%d status=%d)\n",
@@ -1236,23 +1178,20 @@ int sme_mgt_connection_stats_get(unifi_priv_t *priv, CsrWifiSmeConnectionStats *
1236 1178
1237 unifi_trace(priv, UDBG4, "sme_mgt_connection_stats_get: unifi_mgt_connection_stats_get_req -->\n"); 1179 unifi_trace(priv, UDBG4, "sme_mgt_connection_stats_get: unifi_mgt_connection_stats_get_req -->\n");
1238 r = sme_init_request(priv); 1180 r = sme_init_request(priv);
1239 if (r) { 1181 if (r)
1240 return -EIO; 1182 return -EIO;
1241 }
1242 1183
1243 CsrWifiSmeConnectionStatsGetReqSend(0, CSR_WIFI_INTERFACE_IN_USE); 1184 CsrWifiSmeConnectionStatsGetReqSend(0, CSR_WIFI_INTERFACE_IN_USE);
1244 1185
1245 r = sme_wait_for_reply(priv, UNIFI_SME_MGT_SHORT_TIMEOUT); 1186 r = sme_wait_for_reply(priv, UNIFI_SME_MGT_SHORT_TIMEOUT);
1246 if (r) { 1187 if (r)
1247 return r; 1188 return r;
1248 }
1249 1189
1250 /* store the reply */ 1190 /* store the reply */
1251 if (connectionStats != NULL) { 1191 if (connectionStats != NULL)
1252 memcpy((unsigned char*)connectionStats, 1192 memcpy((unsigned char*)connectionStats,
1253 (unsigned char*)&priv->sme_reply.connectionStats, 1193 (unsigned char*)&priv->sme_reply.connectionStats,
1254 sizeof(CsrWifiSmeConnectionStats)); 1194 sizeof(CsrWifiSmeConnectionStats));
1255 }
1256 1195
1257 unifi_trace(priv, UDBG4, 1196 unifi_trace(priv, UDBG4,
1258 "sme_mgt_connection_stats_get: unifi_mgt_connection_stats_get_req <-- (r=%d status=%d)\n", 1197 "sme_mgt_connection_stats_get: unifi_mgt_connection_stats_get_req <-- (r=%d status=%d)\n",
@@ -1272,58 +1211,56 @@ int sme_mgt_connection_stats_get(unifi_priv_t *priv, CsrWifiSmeConnectionStats *
1272 1211
1273int sme_mgt_packet_filter_set(unifi_priv_t *priv) 1212int sme_mgt_packet_filter_set(unifi_priv_t *priv)
1274{ 1213{
1275 CsrWifiIp4Address ipAddress = {{0xFF, 0xFF, 0xFF, 0xFF }}; 1214 CsrWifiIp4Address ipAddress = {{0xFF, 0xFF, 0xFF, 0xFF }};
1276 if (priv->smepriv == NULL) { 1215 if (priv->smepriv == NULL) {
1277 unifi_error(priv, "sme_mgt_packet_filter_set: invalid smepriv\n"); 1216 unifi_error(priv, "sme_mgt_packet_filter_set: invalid smepriv\n");
1278 return -EIO; 1217 return -EIO;
1279 } 1218 }
1280 if (priv->packet_filters.arp_filter) { 1219 if (priv->packet_filters.arp_filter) {
1281 ipAddress.a[0] = (priv->sta_ip_address ) & 0xFF; 1220 ipAddress.a[0] = (priv->sta_ip_address ) & 0xFF;
1282 ipAddress.a[1] = (priv->sta_ip_address >> 8) & 0xFF; 1221 ipAddress.a[1] = (priv->sta_ip_address >> 8) & 0xFF;
1283 ipAddress.a[2] = (priv->sta_ip_address >> 16) & 0xFF; 1222 ipAddress.a[2] = (priv->sta_ip_address >> 16) & 0xFF;
1284 ipAddress.a[3] = (priv->sta_ip_address >> 24) & 0xFF; 1223 ipAddress.a[3] = (priv->sta_ip_address >> 24) & 0xFF;
1285 } 1224 }
1286 1225
1287 unifi_trace(priv, UDBG5, 1226 unifi_trace(priv, UDBG5,
1288 "sme_mgt_packet_filter_set: IP address %d.%d.%d.%d\n", 1227 "sme_mgt_packet_filter_set: IP address %d.%d.%d.%d\n",
1289 ipAddress.a[0], ipAddress.a[1], 1228 ipAddress.a[0], ipAddress.a[1],
1290 ipAddress.a[2], ipAddress.a[3]); 1229 ipAddress.a[2], ipAddress.a[3]);
1291 1230
1292 /* Doesn't block for a confirm */ 1231 /* Doesn't block for a confirm */
1293 CsrWifiSmePacketFilterSetReqSend(0, CSR_WIFI_INTERFACE_IN_USE, 1232 CsrWifiSmePacketFilterSetReqSend(0, CSR_WIFI_INTERFACE_IN_USE,
1294 priv->packet_filters.tclas_ies_length, 1233 priv->packet_filters.tclas_ies_length,
1295 priv->filter_tclas_ies, 1234 priv->filter_tclas_ies,
1296 priv->packet_filters.filter_mode, 1235 priv->packet_filters.filter_mode,
1297 ipAddress); 1236 ipAddress);
1298 return 0; 1237 return 0;
1299} 1238}
1300 1239
1301int sme_mgt_tspec(unifi_priv_t *priv, CsrWifiSmeListAction action, 1240int sme_mgt_tspec(unifi_priv_t *priv, CsrWifiSmeListAction action,
1302 u32 tid, CsrWifiSmeDataBlock *tspec, CsrWifiSmeDataBlock *tclas) 1241 u32 tid, CsrWifiSmeDataBlock *tspec, CsrWifiSmeDataBlock *tclas)
1303{ 1242{
1304 int r; 1243 int r;
1305 1244
1306 if (priv->smepriv == NULL) { 1245 if (priv->smepriv == NULL) {
1307 unifi_error(priv, "sme_mgt_tspec: invalid smepriv\n"); 1246 unifi_error(priv, "sme_mgt_tspec: invalid smepriv\n");
1308 return -EIO; 1247 return -EIO;
1309 } 1248 }
1310 1249
1311 r = sme_init_request(priv); 1250 r = sme_init_request(priv);
1312 if (r) { 1251 if (r)
1313 return -EIO; 1252 return -EIO;
1314 } 1253
1315 1254 CsrWifiSmeTspecReqSend(0, CSR_WIFI_INTERFACE_IN_USE,
1316 CsrWifiSmeTspecReqSend(0, CSR_WIFI_INTERFACE_IN_USE, 1255 action, tid, TRUE, 0,
1317 action, tid, TRUE, 0, 1256 tspec->length, tspec->data,
1318 tspec->length, tspec->data, 1257 tclas->length, tclas->data);
1319 tclas->length, tclas->data); 1258 r = sme_wait_for_reply(priv, UNIFI_SME_MGT_SHORT_TIMEOUT);
1320 r = sme_wait_for_reply(priv, UNIFI_SME_MGT_SHORT_TIMEOUT); 1259 if (r)
1321 if (r) { 1260 return r;
1322 return r; 1261
1323 } 1262 unifi_trace(priv, UDBG4, "sme_mgt_tspec: <-- (status=%d)\n", priv->sme_reply.reply_status);
1324 1263 return convert_sme_error(priv->sme_reply.reply_status);
1325 unifi_trace(priv, UDBG4, "sme_mgt_tspec: <-- (status=%d)\n", priv->sme_reply.reply_status);
1326 return convert_sme_error(priv->sme_reply.reply_status);
1327} 1264}
1328 1265
1329 1266
@@ -1339,9 +1276,8 @@ int sme_sys_suspend(unifi_priv_t *priv)
1339 } 1276 }
1340 1277
1341 r = sme_init_request(priv); 1278 r = sme_init_request(priv);
1342 if (r) { 1279 if (r)
1343 return -EIO; 1280 return -EIO;
1344 }
1345 1281
1346 /* Suspend the SME, which MAY cause it to power down UniFi */ 1282 /* Suspend the SME, which MAY cause it to power down UniFi */
1347 CsrWifiRouterCtrlSuspendIndSend(priv->CSR_WIFI_SME_IFACEQUEUE,0, 0, priv->wol_suspend); 1283 CsrWifiRouterCtrlSuspendIndSend(priv->CSR_WIFI_SME_IFACEQUEUE,0, 0, priv->wol_suspend);
@@ -1427,17 +1363,15 @@ int sme_sys_resume(unifi_priv_t *priv)
1427 } 1363 }
1428 1364
1429 r = sme_init_request(priv); 1365 r = sme_init_request(priv);
1430 if (r) { 1366 if (r)
1431 return -EIO; 1367 return -EIO;
1432 }
1433 1368
1434 CsrWifiRouterCtrlResumeIndSend(priv->CSR_WIFI_SME_IFACEQUEUE,0, priv->wol_suspend); 1369 CsrWifiRouterCtrlResumeIndSend(priv->CSR_WIFI_SME_IFACEQUEUE,0, priv->wol_suspend);
1435 1370
1436 r = sme_wait_for_reply(priv, UNIFI_SME_SYS_LONG_TIMEOUT); 1371 r = sme_wait_for_reply(priv, UNIFI_SME_SYS_LONG_TIMEOUT);
1437 if (r) { 1372 if (r)
1438 unifi_notice(priv, 1373 unifi_notice(priv,
1439 "resume: SME did not reply, return success anyway\n"); 1374 "resume: SME did not reply, return success anyway\n");
1440 }
1441 1375
1442 return 0; 1376 return 0;
1443} 1377}
@@ -1453,16 +1387,14 @@ int sme_ap_stop(unifi_priv_t *priv,u16 interface_tag)
1453 } 1387 }
1454 1388
1455 r = sme_init_request(priv); 1389 r = sme_init_request(priv);
1456 if (r) { 1390 if (r)
1457 return -EIO; 1391 return -EIO;
1458 }
1459 1392
1460 CsrWifiNmeApStopReqSend(0,interface_tag); 1393 CsrWifiNmeApStopReqSend(0,interface_tag);
1461 1394
1462 r = sme_wait_for_reply(priv, UNIFI_SME_MGT_SHORT_TIMEOUT); 1395 r = sme_wait_for_reply(priv, UNIFI_SME_MGT_SHORT_TIMEOUT);
1463 if (r) { 1396 if (r)
1464 return r; 1397 return r;
1465 }
1466 1398
1467 unifi_trace(priv, UDBG4, 1399 unifi_trace(priv, UDBG4,
1468 "sme_ap_stop <-- (r=%d status=%d)\n", 1400 "sme_ap_stop <-- (r=%d status=%d)\n",
@@ -1484,9 +1416,8 @@ int sme_ap_start(unifi_priv_t *priv,u16 interface_tag,
1484 } 1416 }
1485 1417
1486 r = sme_init_request(priv); 1418 r = sme_init_request(priv);
1487 if (r) { 1419 if (r)
1488 return -EIO; 1420 return -EIO;
1489 }
1490 1421
1491 CsrWifiNmeApStartReqSend(0,interface_tag,CSR_WIFI_AP_TYPE_LEGACY,FALSE, 1422 CsrWifiNmeApStartReqSend(0,interface_tag,CSR_WIFI_AP_TYPE_LEGACY,FALSE,
1492 ap_config->ssid,1,ap_config->channel, 1423 ap_config->ssid,1,ap_config->channel,
@@ -1494,9 +1425,8 @@ int sme_ap_start(unifi_priv_t *priv,u16 interface_tag,
1494 p2p_go_param,FALSE); 1425 p2p_go_param,FALSE);
1495 1426
1496 r = sme_wait_for_reply(priv, UNIFI_SME_MGT_SHORT_TIMEOUT); 1427 r = sme_wait_for_reply(priv, UNIFI_SME_MGT_SHORT_TIMEOUT);
1497 if (r) { 1428 if (r)
1498 return r; 1429 return r;
1499 }
1500 1430
1501 unifi_trace(priv, UDBG4, 1431 unifi_trace(priv, UDBG4,
1502 "sme_ap_start <-- (r=%d status=%d)\n", 1432 "sme_ap_start <-- (r=%d status=%d)\n",
@@ -1518,14 +1448,15 @@ int sme_ap_config(unifi_priv_t *priv,
1518 } 1448 }
1519 1449
1520 r = sme_init_request(priv); 1450 r = sme_init_request(priv);
1521 if (r) { 1451 if (r)
1522 return -EIO; 1452 return -EIO;
1523 }
1524 1453
1525 CsrWifiNmeApConfigSetReqSend(0,*group_security_config, 1454 CsrWifiNmeApConfigSetReqSend(0,*group_security_config,
1526 *ap_mac_config); 1455 *ap_mac_config);
1527 1456
1528 r = sme_wait_for_reply(priv, UNIFI_SME_MGT_SHORT_TIMEOUT); 1457 r = sme_wait_for_reply(priv, UNIFI_SME_MGT_SHORT_TIMEOUT);
1458 if (r)
1459 return r;
1529 1460
1530 unifi_trace(priv, UDBG4, 1461 unifi_trace(priv, UDBG4,
1531 "sme_ap_config <-- (r=%d status=%d)\n", 1462 "sme_ap_config <-- (r=%d status=%d)\n",
diff --git a/drivers/staging/csr/sme_native.c b/drivers/staging/csr/sme_native.c
index d7a5125d9a8e..525fe1bce0e6 100644
--- a/drivers/staging/csr/sme_native.c
+++ b/drivers/staging/csr/sme_native.c
@@ -12,7 +12,6 @@
12 */ 12 */
13 13
14#include <linux/netdevice.h> 14#include <linux/netdevice.h>
15#include <linux/version.h>
16#include "unifi_priv.h" 15#include "unifi_priv.h"
17#include "csr_wifi_hip_unifi.h" 16#include "csr_wifi_hip_unifi.h"
18#include "csr_wifi_hip_conversions.h" 17#include "csr_wifi_hip_conversions.h"
@@ -22,23 +21,17 @@ static const unsigned char wildcard_address[ETH_ALEN] = {0x00, 0x00, 0x00, 0x00,
22int 21int
23uf_sme_init(unifi_priv_t *priv) 22uf_sme_init(unifi_priv_t *priv)
24{ 23{
25 func_enter();
26
27 sema_init(&priv->mlme_blocking_mutex, 1); 24 sema_init(&priv->mlme_blocking_mutex, 1);
28 25
29#ifdef CSR_SUPPORT_WEXT 26#ifdef CSR_SUPPORT_WEXT
30 { 27 {
31 int r = uf_init_wext_interface(priv); 28 int r = uf_init_wext_interface(priv);
32 if (r != 0) { 29 if (r != 0) {
33 func_exit();
34 return r; 30 return r;
35 } 31 }
36 } 32 }
37#endif 33#endif
38 34
39
40
41 func_exit();
42 return 0; 35 return 0;
43} /* uf_sme_init() */ 36} /* uf_sme_init() */
44 37
@@ -47,8 +40,6 @@ void
47uf_sme_deinit(unifi_priv_t *priv) 40uf_sme_deinit(unifi_priv_t *priv)
48{ 41{
49 42
50 func_enter();
51
52 /* Free memory allocated for the scan table */ 43 /* Free memory allocated for the scan table */
53/* unifi_clear_scan_table(priv); */ 44/* unifi_clear_scan_table(priv); */
54 45
@@ -59,8 +50,6 @@ uf_sme_deinit(unifi_priv_t *priv)
59 uf_deinit_wext_interface(priv); 50 uf_deinit_wext_interface(priv);
60#endif 51#endif
61 52
62
63 func_exit();
64} /* uf_sme_deinit() */ 53} /* uf_sme_deinit() */
65 54
66 55
@@ -222,8 +211,6 @@ sme_native_log_event(ul_client_t *pcli,
222 CSR_SIGNAL signal; 211 CSR_SIGNAL signal;
223 ul_client_t *client = pcli; 212 ul_client_t *client = pcli;
224 213
225 func_enter();
226
227 if (client == NULL) { 214 if (client == NULL) {
228 unifi_error(NULL, "sme_native_log_event: client has exited\n"); 215 unifi_error(NULL, "sme_native_log_event: client has exited\n");
229 return; 216 return;
@@ -334,8 +321,6 @@ sme_native_log_event(ul_client_t *pcli,
334 /* Wake any waiting user process */ 321 /* Wake any waiting user process */
335 wake_up_interruptible(&client->udi_wq); 322 wake_up_interruptible(&client->udi_wq);
336 323
337 func_exit();
338
339} /* sme_native_log_event() */ 324} /* sme_native_log_event() */
340 325
341 326
@@ -461,8 +446,6 @@ sme_native_mlme_event_handler(ul_client_t *pcli,
461 unifi_priv_t *priv = uf_find_instance(pcli->instance); 446 unifi_priv_t *priv = uf_find_instance(pcli->instance);
462 int id, r; 447 int id, r;
463 448
464 func_enter();
465
466 /* Just a sanity check */ 449 /* Just a sanity check */
467 if ((sig_packed == NULL) || (sig_len <= 0)) { 450 if ((sig_packed == NULL) || (sig_len <= 0)) {
468 return; 451 return;
@@ -542,7 +525,6 @@ sme_native_mlme_event_handler(ul_client_t *pcli,
542 break; 525 break;
543 } 526 }
544 527
545 func_exit();
546} /* sme_native_mlme_event_handler() */ 528} /* sme_native_mlme_event_handler() */
547 529
548 530
@@ -574,14 +556,11 @@ unifi_reset_state(unifi_priv_t *priv, unsigned char *macaddr,
574{ 556{
575 int r = 0; 557 int r = 0;
576 558
577 func_enter();
578
579#ifdef CSR_SUPPORT_WEXT 559#ifdef CSR_SUPPORT_WEXT
580 /* The reset clears any 802.11 association. */ 560 /* The reset clears any 802.11 association. */
581 priv->wext_conf.flag_associated = 0; 561 priv->wext_conf.flag_associated = 0;
582#endif 562#endif
583 563
584 func_exit();
585 return r; 564 return r;
586} /* unifi_reset_state() */ 565} /* unifi_reset_state() */
587 566
diff --git a/drivers/staging/csr/sme_sys.c b/drivers/staging/csr/sme_sys.c
index 5b26c41c01f6..2b068197ed44 100644
--- a/drivers/staging/csr/sme_sys.c
+++ b/drivers/staging/csr/sme_sys.c
@@ -14,7 +14,6 @@
14 * --------------------------------------------------------------------------- 14 * ---------------------------------------------------------------------------
15 */ 15 */
16 16
17#include <linux/version.h>
18#include "csr_wifi_hip_unifiversion.h" 17#include "csr_wifi_hip_unifiversion.h"
19#include "unifi_priv.h" 18#include "unifi_priv.h"
20#include "csr_wifi_hip_conversions.h" 19#include "csr_wifi_hip_conversions.h"
@@ -413,8 +412,6 @@ uf_send_gratuitous_arp(unifi_priv_t *priv, u16 interfaceTag)
413 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 412 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
414 0xc0, 0xa8, 0x00, 0x02}; 413 0xc0, 0xa8, 0x00, 0x02};
415 414
416 func_enter();
417
418 csrResult = unifi_net_data_malloc(priv, &bulkdata.d[0], sizeof(arp_req)); 415 csrResult = unifi_net_data_malloc(priv, &bulkdata.d[0], sizeof(arp_req));
419 if (csrResult != CSR_RESULT_SUCCESS) 416 if (csrResult != CSR_RESULT_SUCCESS)
420 { 417 {
@@ -480,8 +477,6 @@ uf_send_gratuitous_arp(unifi_priv_t *priv, u16 interfaceTag)
480 return; 477 return;
481 } 478 }
482 479
483 func_exit();
484
485} 480}
486#endif /* CSR_WIFI_SEND_GRATUITOUS_ARP */ 481#endif /* CSR_WIFI_SEND_GRATUITOUS_ARP */
487 482
@@ -2102,7 +2097,7 @@ static int peer_add_new_record(unifi_priv_t *priv,CsrWifiRouterCtrlPeerAddReq *r
2102 u8 freeSlotFound = FALSE; 2097 u8 freeSlotFound = FALSE;
2103 CsrWifiRouterCtrlStaInfo_t *newRecord = NULL; 2098 CsrWifiRouterCtrlStaInfo_t *newRecord = NULL;
2104 netInterface_priv_t *interfacePriv = priv->interfacePriv[req->interfaceTag]; 2099 netInterface_priv_t *interfacePriv = priv->interfacePriv[req->interfaceTag];
2105 CsrTime currentTime, currentTimeHi; 2100 u32 currentTime, currentTimeHi;
2106 unsigned long lock_flags; 2101 unsigned long lock_flags;
2107 2102
2108 if (req->interfaceTag >= CSR_WIFI_NUM_INTERFACES) { 2103 if (req->interfaceTag >= CSR_WIFI_NUM_INTERFACES) {
@@ -2296,8 +2291,8 @@ static void check_inactivity_timer_expire_func(unsigned long data)
2296 struct unifi_priv *priv; 2291 struct unifi_priv *priv;
2297 CsrWifiRouterCtrlStaInfo_t *sta_record = NULL; 2292 CsrWifiRouterCtrlStaInfo_t *sta_record = NULL;
2298 u8 i = 0; 2293 u8 i = 0;
2299 CsrTime now; 2294 u32 now;
2300 CsrTime inactive_time; 2295 u32 inactive_time;
2301 netInterface_priv_t *interfacePriv = (netInterface_priv_t *) data; 2296 netInterface_priv_t *interfacePriv = (netInterface_priv_t *) data;
2302 2297
2303 if (!interfacePriv) 2298 if (!interfacePriv)
@@ -2329,11 +2324,11 @@ static void check_inactivity_timer_expire_func(unsigned long data)
2329 if (sta_record->lastActivity > now) 2324 if (sta_record->lastActivity > now)
2330 { 2325 {
2331 /* simple timer wrap (for 1 wrap) */ 2326 /* simple timer wrap (for 1 wrap) */
2332 inactive_time = CsrTimeAdd((CsrTime)CsrTimeSub(CSR_SCHED_TIME_MAX, sta_record->lastActivity), now); 2327 inactive_time = CsrTimeAdd((u32)CsrTimeSub(CSR_SCHED_TIME_MAX, sta_record->lastActivity), now);
2333 } 2328 }
2334 else 2329 else
2335 { 2330 {
2336 inactive_time = (CsrTime)CsrTimeSub(now, sta_record->lastActivity); 2331 inactive_time = (u32)CsrTimeSub(now, sta_record->lastActivity);
2337 } 2332 }
2338 2333
2339 if (inactive_time >= STA_INACTIVE_TIMEOUT_VAL) 2334 if (inactive_time >= STA_INACTIVE_TIMEOUT_VAL)
@@ -2411,8 +2406,6 @@ void uf_send_disconnected_ind_wq(struct work_struct *work)
2411 struct list_head send_cfm_list; 2406 struct list_head send_cfm_list;
2412 u8 j; 2407 u8 j;
2413 2408
2414 func_enter();
2415
2416 if(!staInfo) { 2409 if(!staInfo) {
2417 return; 2410 return;
2418 } 2411 }
diff --git a/drivers/staging/csr/sme_userspace.h b/drivers/staging/csr/sme_userspace.h
index 7816b15b4b5d..ebe371c732b2 100644
--- a/drivers/staging/csr/sme_userspace.h
+++ b/drivers/staging/csr/sme_userspace.h
@@ -32,7 +32,7 @@ int uf_sme_queue_message(unifi_priv_t *priv, u8 *buffer, int length);
32#include "csr_wifi_sme_lib.h" 32#include "csr_wifi_sme_lib.h"
33 33
34void CsrWifiRouterTransportInit(unifi_priv_t *priv); 34void CsrWifiRouterTransportInit(unifi_priv_t *priv);
35void CsrWifiRouterTransportRecv(unifi_priv_t *priv, u8* buffer, size_t bufferLength); 35void CsrWifiRouterTransportRecv(unifi_priv_t *priv, u8 *buffer, size_t bufferLength);
36void CsrWifiRouterTransportDeInit(unifi_priv_t *priv); 36void CsrWifiRouterTransportDeInit(unifi_priv_t *priv);
37 37
38#endif /* __LINUX_SME_USERSPACE_H__ */ 38#endif /* __LINUX_SME_USERSPACE_H__ */
diff --git a/drivers/staging/csr/sme_wext.c b/drivers/staging/csr/sme_wext.c
index b58c0c6b171c..5e06a380b40a 100644
--- a/drivers/staging/csr/sme_wext.c
+++ b/drivers/staging/csr/sme_wext.c
@@ -800,7 +800,6 @@ iwprivsconfwapi(struct net_device *dev, struct iw_request_info *info,
800 u8 enable; 800 u8 enable;
801 netInterface_priv_t *interfacePriv = (netInterface_priv_t *)netdev_priv(dev); 801 netInterface_priv_t *interfacePriv = (netInterface_priv_t *)netdev_priv(dev);
802 unifi_priv_t *priv = interfacePriv->privPtr; 802 unifi_priv_t *priv = interfacePriv->privPtr;
803 func_enter();
804 803
805 unifi_trace(priv, UDBG1, "iwprivsconfwapi\n" ); 804 unifi_trace(priv, UDBG1, "iwprivsconfwapi\n" );
806 805
@@ -824,7 +823,6 @@ iwprivsconfwapi(struct net_device *dev, struct iw_request_info *info,
824 ~(CSR_WIFI_SME_ENCRYPTION_CIPHER_PAIRWISE_SMS4 | CSR_WIFI_SME_ENCRYPTION_CIPHER_GROUP_SMS4); 823 ~(CSR_WIFI_SME_ENCRYPTION_CIPHER_PAIRWISE_SMS4 | CSR_WIFI_SME_ENCRYPTION_CIPHER_GROUP_SMS4);
825 } 824 }
826 825
827 func_exit();
828 return 0; 826 return 0;
829} 827}
830 828
@@ -837,7 +835,6 @@ iwprivswpikey(struct net_device *dev, struct iw_request_info *info,
837 unifiio_wapi_key_t inKey; 835 unifiio_wapi_key_t inKey;
838 netInterface_priv_t *interfacePriv = (netInterface_priv_t *)netdev_priv(dev); 836 netInterface_priv_t *interfacePriv = (netInterface_priv_t *)netdev_priv(dev);
839 unifi_priv_t *priv = interfacePriv->privPtr; 837 unifi_priv_t *priv = interfacePriv->privPtr;
840 func_enter();
841 838
842 unifi_trace(priv, UDBG1, "iwprivswpikey\n" ); 839 unifi_trace(priv, UDBG1, "iwprivswpikey\n" );
843 840
@@ -882,7 +879,6 @@ iwprivswpikey(struct net_device *dev, struct iw_request_info *info,
882 return convert_sme_error(r); 879 return convert_sme_error(r);
883 } 880 }
884 881
885 func_exit();
886 return r; 882 return r;
887} 883}
888#endif 884#endif
@@ -914,7 +910,6 @@ unifi_siwfreq(struct net_device *dev, struct iw_request_info *info,
914 unifi_priv_t *priv = interfacePriv->privPtr; 910 unifi_priv_t *priv = interfacePriv->privPtr;
915 struct iw_freq *freq = (struct iw_freq *)wrqu; 911 struct iw_freq *freq = (struct iw_freq *)wrqu;
916 912
917 func_enter();
918 unifi_trace(priv, UDBG2, "unifi_siwfreq\n"); 913 unifi_trace(priv, UDBG2, "unifi_siwfreq\n");
919 914
920 if(interfacePriv->interfaceMode == CSR_WIFI_ROUTER_CTRL_MODE_AP || 915 if(interfacePriv->interfaceMode == CSR_WIFI_ROUTER_CTRL_MODE_AP ||
@@ -935,7 +930,6 @@ unifi_siwfreq(struct net_device *dev, struct iw_request_info *info,
935 priv->connection_config.adhocChannel = wext_freq_to_channel(freq->m, freq->e); 930 priv->connection_config.adhocChannel = wext_freq_to_channel(freq->m, freq->e);
936 } 931 }
937 932
938 func_exit();
939 return 0; 933 return 0;
940} /* unifi_siwfreq() */ 934} /* unifi_siwfreq() */
941 935
@@ -950,7 +944,6 @@ unifi_giwfreq(struct net_device *dev, struct iw_request_info *info,
950 int err = 0; 944 int err = 0;
951 CsrWifiSmeConnectionInfo connectionInfo; 945 CsrWifiSmeConnectionInfo connectionInfo;
952 946
953 func_enter();
954 unifi_trace(priv, UDBG2, "unifi_giwfreq\n"); 947 unifi_trace(priv, UDBG2, "unifi_giwfreq\n");
955 CHECK_INITED(priv); 948 CHECK_INITED(priv);
956 949
@@ -970,7 +963,6 @@ unifi_giwfreq(struct net_device *dev, struct iw_request_info *info,
970 (connectionInfo.networkType80211 == CSR_WIFI_SME_RADIO_IF_GHZ_5_0)); 963 (connectionInfo.networkType80211 == CSR_WIFI_SME_RADIO_IF_GHZ_5_0));
971 freq->e = 6; 964 freq->e = 6;
972 965
973 func_exit();
974 return convert_sme_error(err); 966 return convert_sme_error(err);
975} /* unifi_giwfreq() */ 967} /* unifi_giwfreq() */
976 968
@@ -982,7 +974,6 @@ unifi_siwmode(struct net_device *dev, struct iw_request_info *info,
982 netInterface_priv_t *interfacePriv = (netInterface_priv_t *)netdev_priv(dev); 974 netInterface_priv_t *interfacePriv = (netInterface_priv_t *)netdev_priv(dev);
983 unifi_priv_t *priv = interfacePriv->privPtr; 975 unifi_priv_t *priv = interfacePriv->privPtr;
984 976
985 func_enter();
986 unifi_trace(priv, UDBG2, "unifi_siwmode\n"); 977 unifi_trace(priv, UDBG2, "unifi_siwmode\n");
987 978
988 if(interfacePriv->interfaceMode == CSR_WIFI_ROUTER_CTRL_MODE_AP || 979 if(interfacePriv->interfaceMode == CSR_WIFI_ROUTER_CTRL_MODE_AP ||
@@ -1011,7 +1002,6 @@ unifi_siwmode(struct net_device *dev, struct iw_request_info *info,
1011 priv->connection_config.ssid.length = 0; 1002 priv->connection_config.ssid.length = 0;
1012 memset(priv->connection_config.bssid.a, 0xFF, ETH_ALEN); 1003 memset(priv->connection_config.bssid.a, 0xFF, ETH_ALEN);
1013 1004
1014 func_exit();
1015 return 0; 1005 return 0;
1016} /* unifi_siwmode() */ 1006} /* unifi_siwmode() */
1017 1007
@@ -1026,7 +1016,6 @@ unifi_giwmode(struct net_device *dev, struct iw_request_info *info,
1026 unifi_priv_t *priv = interfacePriv->privPtr; 1016 unifi_priv_t *priv = interfacePriv->privPtr;
1027 CsrWifiSmeConnectionConfig connectionConfig; 1017 CsrWifiSmeConnectionConfig connectionConfig;
1028 1018
1029 func_enter();
1030 unifi_trace(priv, UDBG2, "unifi_giwmode\n"); 1019 unifi_trace(priv, UDBG2, "unifi_giwmode\n");
1031 CHECK_INITED(priv); 1020 CHECK_INITED(priv);
1032 1021
@@ -1069,7 +1058,6 @@ unifi_giwmode(struct net_device *dev, struct iw_request_info *info,
1069 1058
1070 } 1059 }
1071 unifi_trace(priv, UDBG4, "unifi_giwmode: mode = 0x%x\n", wrqu->mode); 1060 unifi_trace(priv, UDBG4, "unifi_giwmode: mode = 0x%x\n", wrqu->mode);
1072 func_exit();
1073 return r; 1061 return r;
1074} /* unifi_giwmode() */ 1062} /* unifi_giwmode() */
1075 1063
@@ -1192,8 +1180,6 @@ unifi_siwap(struct net_device *dev, struct iw_request_info *info,
1192 unifi_priv_t *priv = interfacePriv->privPtr; 1180 unifi_priv_t *priv = interfacePriv->privPtr;
1193 int err = 0; 1181 int err = 0;
1194 1182
1195 func_enter();
1196
1197 CHECK_INITED(priv); 1183 CHECK_INITED(priv);
1198 1184
1199 if(interfacePriv->interfaceMode == CSR_WIFI_ROUTER_CTRL_MODE_AP || 1185 if(interfacePriv->interfaceMode == CSR_WIFI_ROUTER_CTRL_MODE_AP ||
@@ -1235,11 +1221,9 @@ unifi_siwap(struct net_device *dev, struct iw_request_info *info,
1235 err = sme_mgt_connect(priv); 1221 err = sme_mgt_connect(priv);
1236 if (err) { 1222 if (err) {
1237 unifi_error(priv, "unifi_siwap: Join failed, status %d\n", err); 1223 unifi_error(priv, "unifi_siwap: Join failed, status %d\n", err);
1238 func_exit();
1239 return convert_sme_error(err); 1224 return convert_sme_error(err);
1240 } 1225 }
1241 } 1226 }
1242 func_exit();
1243 1227
1244 return 0; 1228 return 0;
1245} /* unifi_siwap() */ 1229} /* unifi_siwap() */
@@ -1255,8 +1239,6 @@ unifi_giwap(struct net_device *dev, struct iw_request_info *info,
1255 int r = 0; 1239 int r = 0;
1256 u8 *bssid; 1240 u8 *bssid;
1257 1241
1258 func_enter();
1259
1260 CHECK_INITED(priv); 1242 CHECK_INITED(priv);
1261 unifi_trace(priv, UDBG2, "unifi_giwap\n"); 1243 unifi_trace(priv, UDBG2, "unifi_giwap\n");
1262 1244
@@ -1281,7 +1263,6 @@ unifi_giwap(struct net_device *dev, struct iw_request_info *info,
1281 memset(wrqu->ap_addr.sa_data, 0, ETH_ALEN); 1263 memset(wrqu->ap_addr.sa_data, 0, ETH_ALEN);
1282 } 1264 }
1283 1265
1284 func_exit();
1285 return 0; 1266 return 0;
1286} /* unifi_giwap() */ 1267} /* unifi_giwap() */
1287 1268
@@ -1302,8 +1283,6 @@ unifi_siwscan(struct net_device *dev, struct iw_request_info *info,
1302 struct iw_scan_req *req = (struct iw_scan_req *) extra; 1283 struct iw_scan_req *req = (struct iw_scan_req *) extra;
1303#endif 1284#endif
1304 1285
1305 func_enter();
1306
1307 CHECK_INITED(priv); 1286 CHECK_INITED(priv);
1308 1287
1309 if(interfacePriv->interfaceMode == CSR_WIFI_ROUTER_CTRL_MODE_AP || 1288 if(interfacePriv->interfaceMode == CSR_WIFI_ROUTER_CTRL_MODE_AP ||
@@ -1366,7 +1345,6 @@ unifi_siwscan(struct net_device *dev, struct iw_request_info *info,
1366 kfree(channel_list); 1345 kfree(channel_list);
1367 } 1346 }
1368 1347
1369 func_exit();
1370 return r; 1348 return r;
1371 1349
1372} /* unifi_siwscan() */ 1350} /* unifi_siwscan() */
@@ -1707,7 +1685,6 @@ unifi_siwessid(struct net_device *dev, struct iw_request_info *info,
1707 int len; 1685 int len;
1708 int err = 0; 1686 int err = 0;
1709 1687
1710 func_enter();
1711 CHECK_INITED(priv); 1688 CHECK_INITED(priv);
1712 1689
1713 if(interfacePriv->interfaceMode == CSR_WIFI_ROUTER_CTRL_MODE_AP || 1690 if(interfacePriv->interfaceMode == CSR_WIFI_ROUTER_CTRL_MODE_AP ||
@@ -1760,11 +1737,9 @@ unifi_siwessid(struct net_device *dev, struct iw_request_info *info,
1760 UF_RTNL_LOCK(); 1737 UF_RTNL_LOCK();
1761 if (err) { 1738 if (err) {
1762 unifi_error(priv, "unifi_siwessid: Join failed, status %d\n", err); 1739 unifi_error(priv, "unifi_siwessid: Join failed, status %d\n", err);
1763 func_exit();
1764 return convert_sme_error(err); 1740 return convert_sme_error(err);
1765 } 1741 }
1766 1742
1767 func_exit();
1768 return 0; 1743 return 0;
1769} /* unifi_siwessid() */ 1744} /* unifi_siwessid() */
1770 1745
@@ -1779,7 +1754,6 @@ unifi_giwessid(struct net_device *dev, struct iw_request_info *info,
1779 CsrWifiSmeConnectionInfo connectionInfo; 1754 CsrWifiSmeConnectionInfo connectionInfo;
1780 int r = 0; 1755 int r = 0;
1781 1756
1782 func_enter();
1783 unifi_trace(priv, UDBG2, "unifi_giwessid\n"); 1757 unifi_trace(priv, UDBG2, "unifi_giwessid\n");
1784 CHECK_INITED(priv); 1758 CHECK_INITED(priv);
1785 1759
@@ -1805,7 +1779,6 @@ unifi_giwessid(struct net_device *dev, struct iw_request_info *info,
1805 data->length, essid); 1779 data->length, essid);
1806 } 1780 }
1807 1781
1808 func_exit();
1809 1782
1810 return 0; 1783 return 0;
1811} /* unifi_giwessid() */ 1784} /* unifi_giwessid() */
@@ -1821,8 +1794,6 @@ unifi_siwrate(struct net_device *dev, struct iw_request_info *info,
1821 CsrWifiSmeMibConfig mibConfig; 1794 CsrWifiSmeMibConfig mibConfig;
1822 int r; 1795 int r;
1823 1796
1824 func_enter();
1825
1826 CHECK_INITED(priv); 1797 CHECK_INITED(priv);
1827 unifi_trace(priv, UDBG2, "unifi_siwrate\n"); 1798 unifi_trace(priv, UDBG2, "unifi_siwrate\n");
1828 1799
@@ -1863,7 +1834,6 @@ unifi_siwrate(struct net_device *dev, struct iw_request_info *info,
1863 return r; 1834 return r;
1864 } 1835 }
1865 1836
1866 func_exit();
1867 1837
1868 return 0; 1838 return 0;
1869} /* unifi_siwrate() */ 1839} /* unifi_siwrate() */
@@ -1882,7 +1852,6 @@ unifi_giwrate(struct net_device *dev, struct iw_request_info *info,
1882 CsrWifiSmeMibConfig mibConfig; 1852 CsrWifiSmeMibConfig mibConfig;
1883 CsrWifiSmeConnectionStats connectionStats; 1853 CsrWifiSmeConnectionStats connectionStats;
1884 1854
1885 func_enter();
1886 unifi_trace(priv, UDBG2, "unifi_giwrate\n"); 1855 unifi_trace(priv, UDBG2, "unifi_giwrate\n");
1887 CHECK_INITED(priv); 1856 CHECK_INITED(priv);
1888 1857
@@ -1913,8 +1882,6 @@ unifi_giwrate(struct net_device *dev, struct iw_request_info *info,
1913 args->value = bitrate * 500000; 1882 args->value = bitrate * 500000;
1914 args->fixed = !flag; 1883 args->fixed = !flag;
1915 1884
1916 func_exit();
1917
1918 return 0; 1885 return 0;
1919} /* unifi_giwrate() */ 1886} /* unifi_giwrate() */
1920 1887
@@ -2081,7 +2048,6 @@ unifi_siwencode(struct net_device *dev, struct iw_request_info *info,
2081 int privacy = -1; 2048 int privacy = -1;
2082 CsrWifiSmeKey sme_key; 2049 CsrWifiSmeKey sme_key;
2083 2050
2084 func_enter();
2085 unifi_trace(priv, UDBG2, "unifi_siwencode\n"); 2051 unifi_trace(priv, UDBG2, "unifi_siwencode\n");
2086 2052
2087 CHECK_INITED(priv); 2053 CHECK_INITED(priv);
@@ -2236,7 +2202,6 @@ unifi_siwencode(struct net_device *dev, struct iw_request_info *info,
2236 CSR_WIFI_SME_ENCRYPTION_CIPHER_NONE; 2202 CSR_WIFI_SME_ENCRYPTION_CIPHER_NONE;
2237 } 2203 }
2238 2204
2239 func_exit_r(rc);
2240 return convert_sme_error(rc); 2205 return convert_sme_error(rc);
2241 2206
2242} /* unifi_siwencode() */ 2207} /* unifi_siwencode() */
@@ -2467,7 +2432,6 @@ unifi_siwmlme(struct net_device *dev, struct iw_request_info *info,
2467 netInterface_priv_t *interfacePriv = (netInterface_priv_t *)netdev_priv(dev); 2432 netInterface_priv_t *interfacePriv = (netInterface_priv_t *)netdev_priv(dev);
2468 unifi_priv_t *priv = interfacePriv->privPtr; 2433 unifi_priv_t *priv = interfacePriv->privPtr;
2469 struct iw_mlme *mlme = (struct iw_mlme *)extra; 2434 struct iw_mlme *mlme = (struct iw_mlme *)extra;
2470 func_enter();
2471 2435
2472 unifi_trace(priv, UDBG2, "unifi_siwmlme\n"); 2436 unifi_trace(priv, UDBG2, "unifi_siwmlme\n");
2473 CHECK_INITED(priv); 2437 CHECK_INITED(priv);
@@ -2488,11 +2452,9 @@ unifi_siwmlme(struct net_device *dev, struct iw_request_info *info,
2488 UF_RTNL_LOCK(); 2452 UF_RTNL_LOCK();
2489 break; 2453 break;
2490 default: 2454 default:
2491 func_exit_r(-EOPNOTSUPP);
2492 return -EOPNOTSUPP; 2455 return -EOPNOTSUPP;
2493 } 2456 }
2494 2457
2495 func_exit();
2496 return 0; 2458 return 0;
2497} /* unifi_siwmlme() */ 2459} /* unifi_siwmlme() */
2498 2460
@@ -2529,7 +2491,6 @@ unifi_siwgenie(struct net_device *dev, struct iw_request_info *info,
2529 unifi_priv_t *priv = interfacePriv->privPtr; 2491 unifi_priv_t *priv = interfacePriv->privPtr;
2530 int len; 2492 int len;
2531 2493
2532 func_enter();
2533 unifi_trace(priv, UDBG2, "unifi_siwgenie\n"); 2494 unifi_trace(priv, UDBG2, "unifi_siwgenie\n");
2534 2495
2535 if(interfacePriv->interfaceMode == CSR_WIFI_ROUTER_CTRL_MODE_AP || 2496 if(interfacePriv->interfaceMode == CSR_WIFI_ROUTER_CTRL_MODE_AP ||
@@ -2548,20 +2509,17 @@ unifi_siwgenie(struct net_device *dev, struct iw_request_info *info,
2548 2509
2549 len = wrqu->data.length; 2510 len = wrqu->data.length;
2550 if (len == 0) { 2511 if (len == 0) {
2551 func_exit();
2552 return 0; 2512 return 0;
2553 } 2513 }
2554 2514
2555 priv->connection_config.mlmeAssociateReqInformationElements = kmalloc(len, GFP_KERNEL); 2515 priv->connection_config.mlmeAssociateReqInformationElements = kmalloc(len, GFP_KERNEL);
2556 if (priv->connection_config.mlmeAssociateReqInformationElements == NULL) { 2516 if (priv->connection_config.mlmeAssociateReqInformationElements == NULL) {
2557 func_exit();
2558 return -ENOMEM; 2517 return -ENOMEM;
2559 } 2518 }
2560 2519
2561 priv->connection_config.mlmeAssociateReqInformationElementsLength = len; 2520 priv->connection_config.mlmeAssociateReqInformationElementsLength = len;
2562 memcpy( priv->connection_config.mlmeAssociateReqInformationElements, extra, len); 2521 memcpy( priv->connection_config.mlmeAssociateReqInformationElements, extra, len);
2563 2522
2564 func_exit();
2565 return 0; 2523 return 0;
2566} /* unifi_siwgenie() */ 2524} /* unifi_siwgenie() */
2567 2525
@@ -2574,7 +2532,6 @@ unifi_giwgenie(struct net_device *dev, struct iw_request_info *info,
2574 unifi_priv_t *priv = interfacePriv->privPtr; 2532 unifi_priv_t *priv = interfacePriv->privPtr;
2575 int len; 2533 int len;
2576 2534
2577 func_enter();
2578 unifi_trace(priv, UDBG2, "unifi_giwgenie\n"); 2535 unifi_trace(priv, UDBG2, "unifi_giwgenie\n");
2579 2536
2580 if(interfacePriv->interfaceMode == CSR_WIFI_ROUTER_CTRL_MODE_AP || 2537 if(interfacePriv->interfaceMode == CSR_WIFI_ROUTER_CTRL_MODE_AP ||
@@ -2599,7 +2556,6 @@ unifi_giwgenie(struct net_device *dev, struct iw_request_info *info,
2599 wrqu->data.length = len; 2556 wrqu->data.length = len;
2600 memcpy(extra, priv->connection_config.mlmeAssociateReqInformationElements, len); 2557 memcpy(extra, priv->connection_config.mlmeAssociateReqInformationElements, len);
2601 2558
2602 func_exit();
2603 return 0; 2559 return 0;
2604} /* unifi_giwgenie() */ 2560} /* unifi_giwgenie() */
2605 2561
@@ -2627,7 +2583,6 @@ _unifi_siwauth(struct net_device *dev, struct iw_request_info *info,
2627 unifi_priv_t *priv = interfacePriv->privPtr; 2583 unifi_priv_t *priv = interfacePriv->privPtr;
2628 CsrWifiSmeAuthModeMask new_auth; 2584 CsrWifiSmeAuthModeMask new_auth;
2629 2585
2630 func_enter();
2631 unifi_trace(priv, UDBG2, "unifi_siwauth\n"); 2586 unifi_trace(priv, UDBG2, "unifi_siwauth\n");
2632 2587
2633 if(interfacePriv->interfaceMode == CSR_WIFI_ROUTER_CTRL_MODE_AP || 2588 if(interfacePriv->interfaceMode == CSR_WIFI_ROUTER_CTRL_MODE_AP ||
@@ -2848,7 +2803,6 @@ _unifi_siwauth(struct net_device *dev, struct iw_request_info *info,
2848 } 2803 }
2849 2804
2850 unifi_trace(priv, UDBG2, "authModeMask = %d", priv->connection_config.authModeMask); 2805 unifi_trace(priv, UDBG2, "authModeMask = %d", priv->connection_config.authModeMask);
2851 func_exit();
2852 2806
2853 return 0; 2807 return 0;
2854} /* _unifi_siwauth() */ 2808} /* _unifi_siwauth() */
@@ -2911,8 +2865,6 @@ _unifi_siwencodeext(struct net_device *dev, struct iw_request_info *info,
2911 CsrWifiSmeKey sme_key; 2865 CsrWifiSmeKey sme_key;
2912 CsrWifiSmeKeyType key_type; 2866 CsrWifiSmeKeyType key_type;
2913 2867
2914 func_enter();
2915
2916 CHECK_INITED(priv); 2868 CHECK_INITED(priv);
2917 2869
2918 if(interfacePriv->interfaceMode == CSR_WIFI_ROUTER_CTRL_MODE_AP || 2870 if(interfacePriv->interfaceMode == CSR_WIFI_ROUTER_CTRL_MODE_AP ||
@@ -3061,7 +3013,6 @@ _unifi_siwencodeext(struct net_device *dev, struct iw_request_info *info,
3061 return convert_sme_error(r); 3013 return convert_sme_error(r);
3062 } 3014 }
3063 3015
3064 func_exit();
3065 return r; 3016 return r;
3066} /* _unifi_siwencodeext() */ 3017} /* _unifi_siwencodeext() */
3067 3018
diff --git a/drivers/staging/csr/ul_int.c b/drivers/staging/csr/ul_int.c
index 4013d021ebbf..0fae6f48f79b 100644
--- a/drivers/staging/csr/ul_int.c
+++ b/drivers/staging/csr/ul_int.c
@@ -12,7 +12,6 @@
12 * 12 *
13 * *************************************************************************** 13 * ***************************************************************************
14 */ 14 */
15#include <linux/version.h>
16#include "csr_wifi_hip_unifi.h" 15#include "csr_wifi_hip_unifi.h"
17#include "csr_wifi_hip_conversions.h" 16#include "csr_wifi_hip_conversions.h"
18#include "unifi_priv.h" 17#include "unifi_priv.h"
diff --git a/drivers/staging/csr/unifi_event.c b/drivers/staging/csr/unifi_event.c
index c27b23daf399..e81a99878272 100644
--- a/drivers/staging/csr/unifi_event.c
+++ b/drivers/staging/csr/unifi_event.c
@@ -376,8 +376,6 @@ unifi_process_receive_event(void *ospriv,
376 s16 signal_id; 376 s16 signal_id;
377 u8 pktIndToSme = FALSE, freeBulkData = FALSE; 377 u8 pktIndToSme = FALSE, freeBulkData = FALSE;
378 378
379 func_enter();
380
381 unifi_trace(priv, UDBG5, "unifi_process_receive_event: " 379 unifi_trace(priv, UDBG5, "unifi_process_receive_event: "
382 "%04x %04x %04x %04x %04x %04x %04x %04x (%d)\n", 380 "%04x %04x %04x %04x %04x %04x %04x %04x (%d)\n",
383 CSR_GET_UINT16_FROM_LITTLE_ENDIAN((sigdata) + sizeof(s16)*0) & 0xFFFF, 381 CSR_GET_UINT16_FROM_LITTLE_ENDIAN((sigdata) + sizeof(s16)*0) & 0xFFFF,
@@ -523,7 +521,6 @@ unifi_process_receive_event(void *ospriv,
523 unifi_net_data_free(priv, (void *)&bulkdata->d[i]); 521 unifi_net_data_free(priv, (void *)&bulkdata->d[i]);
524 } 522 }
525 } 523 }
526 func_exit();
527 return; 524 return;
528 } 525 }
529 } /* CSR_MA_PACKET_INDICATION_ID */ 526 } /* CSR_MA_PACKET_INDICATION_ID */
@@ -573,7 +570,6 @@ unifi_process_receive_event(void *ospriv,
573 } 570 }
574 } 571 }
575 572
576 func_exit();
577} /* unifi_process_receive_event() */ 573} /* unifi_process_receive_event() */
578 574
579 575
@@ -587,7 +583,6 @@ void unifi_rx_queue_flush(void *ospriv)
587{ 583{
588 unifi_priv_t *priv = (unifi_priv_t*)ospriv; 584 unifi_priv_t *priv = (unifi_priv_t*)ospriv;
589 585
590 func_enter();
591 unifi_trace(priv, UDBG4, "rx_wq_handler: RdPtr = %d WritePtr = %d\n", 586 unifi_trace(priv, UDBG4, "rx_wq_handler: RdPtr = %d WritePtr = %d\n",
592 priv->rxSignalBuffer.readPointer,priv->rxSignalBuffer.writePointer); 587 priv->rxSignalBuffer.readPointer,priv->rxSignalBuffer.writePointer);
593 if(priv != NULL) { 588 if(priv != NULL) {
@@ -605,7 +600,6 @@ void unifi_rx_queue_flush(void *ospriv)
605 } 600 }
606 priv->rxSignalBuffer.readPointer = readPointer; 601 priv->rxSignalBuffer.readPointer = readPointer;
607 } 602 }
608 func_exit();
609} 603}
610 604
611void rx_wq_handler(struct work_struct *work) 605void rx_wq_handler(struct work_struct *work)
@@ -655,7 +649,6 @@ unifi_receive_event(void *ospriv,
655 u8 writePointer; 649 u8 writePointer;
656 int i; 650 int i;
657 rx_buff_struct_t * rx_buff; 651 rx_buff_struct_t * rx_buff;
658 func_enter();
659 652
660 unifi_trace(priv, UDBG5, "unifi_receive_event: " 653 unifi_trace(priv, UDBG5, "unifi_receive_event: "
661 "%04x %04x %04x %04x %04x %04x %04x %04x (%d)\n", 654 "%04x %04x %04x %04x %04x %04x %04x %04x (%d)\n",
@@ -695,6 +688,5 @@ unifi_receive_event(void *ospriv,
695#else 688#else
696 unifi_process_receive_event(ospriv, sigdata, siglen, bulkdata); 689 unifi_process_receive_event(ospriv, sigdata, siglen, bulkdata);
697#endif 690#endif
698 func_exit();
699} /* unifi_receive_event() */ 691} /* unifi_receive_event() */
700 692
diff --git a/drivers/staging/csr/unifi_os.h b/drivers/staging/csr/unifi_os.h
index 4e63a942f1a2..56a26982070e 100644
--- a/drivers/staging/csr/unifi_os.h
+++ b/drivers/staging/csr/unifi_os.h
@@ -61,26 +61,6 @@ extern int unifi_debug;
61 * etc. 61 * etc.
62 */ 62 */
63 63
64#define func_enter() \
65 do { \
66 if (unifi_debug >= 5) { \
67 printk("unifi: => %s\n", __FUNCTION__); \
68 } \
69 } while (0)
70#define func_exit() \
71 do { \
72 if (unifi_debug >= 5) { \
73 printk("unifi: <= %s\n", __FUNCTION__); \
74 } \
75 } while (0)
76#define func_exit_r(_rc) \
77 do { \
78 if (unifi_debug >= 5) { \
79 printk("unifi: <= %s %d\n", __FUNCTION__, (int)(_rc)); \
80 } \
81 } while (0)
82
83
84#define ASSERT(cond) \ 64#define ASSERT(cond) \
85 do { \ 65 do { \
86 if (!(cond)) { \ 66 if (!(cond)) { \
@@ -107,9 +87,6 @@ void unifi_trace(void* ospriv, int level, const char *fmt, ...);
107#else 87#else
108 88
109/* Stubs */ 89/* Stubs */
110#define func_enter()
111#define func_exit()
112#define func_exit_r(_rc)
113 90
114#define ASSERT(cond) 91#define ASSERT(cond)
115 92
diff --git a/drivers/staging/csr/unifi_pdu_processing.c b/drivers/staging/csr/unifi_pdu_processing.c
index ae7c8fc94092..95efc360cc2d 100644
--- a/drivers/staging/csr/unifi_pdu_processing.c
+++ b/drivers/staging/csr/unifi_pdu_processing.c
@@ -14,7 +14,6 @@
14 * --------------------------------------------------------------------------- 14 * ---------------------------------------------------------------------------
15 */ 15 */
16 16
17#include <linux/version.h>
18#include <linux/types.h> 17#include <linux/types.h>
19#include <linux/etherdevice.h> 18#include <linux/etherdevice.h>
20#include <linux/vmalloc.h> 19#include <linux/vmalloc.h>
@@ -409,7 +408,6 @@ CsrResult enque_tx_data_pdu(unifi_priv_t *priv, bulk_data_param_t *bulkdata,
409 unifi_error(priv, 408 unifi_error(priv,
410 "Failed to allocate %d bytes for tx packet record\n", 409 "Failed to allocate %d bytes for tx packet record\n",
411 sizeof(tx_buffered_packets_t)); 410 sizeof(tx_buffered_packets_t));
412 func_exit();
413 return CSR_RESULT_FAILURE; 411 return CSR_RESULT_FAILURE;
414 } 412 }
415 413
@@ -1117,8 +1115,8 @@ void uf_process_ma_pkt_cfm_for_ap(unifi_priv_t *priv,u16 interfaceTag, const CSR
1117 staRecord->nullDataHostTag = INVALID_HOST_TAG; 1115 staRecord->nullDataHostTag = INVALID_HOST_TAG;
1118 1116
1119 if(pkt_cfm->TransmissionStatus == CSR_TX_RETRY_LIMIT){ 1117 if(pkt_cfm->TransmissionStatus == CSR_TX_RETRY_LIMIT){
1120 CsrTime now; 1118 u32 now;
1121 CsrTime inactive_time; 1119 u32 inactive_time;
1122 1120
1123 unifi_trace(priv, UDBG1, "Nulldata to probe STA ALIVE Failed with retry limit\n"); 1121 unifi_trace(priv, UDBG1, "Nulldata to probe STA ALIVE Failed with retry limit\n");
1124 /* Recheck if there is some activity after null data is sent. 1122 /* Recheck if there is some activity after null data is sent.
@@ -1134,12 +1132,12 @@ void uf_process_ma_pkt_cfm_for_ap(unifi_priv_t *priv,u16 interfaceTag, const CSR
1134 if (staRecord->lastActivity > now) 1132 if (staRecord->lastActivity > now)
1135 { 1133 {
1136 /* simple timer wrap (for 1 wrap) */ 1134 /* simple timer wrap (for 1 wrap) */
1137 inactive_time = CsrTimeAdd((CsrTime)CsrTimeSub(CSR_SCHED_TIME_MAX, staRecord->lastActivity), 1135 inactive_time = CsrTimeAdd((u32)CsrTimeSub(CSR_SCHED_TIME_MAX, staRecord->lastActivity),
1138 now); 1136 now);
1139 } 1137 }
1140 else 1138 else
1141 { 1139 {
1142 inactive_time = (CsrTime)CsrTimeSub(now, staRecord->lastActivity); 1140 inactive_time = (u32)CsrTimeSub(now, staRecord->lastActivity);
1143 } 1141 }
1144 1142
1145 if (inactive_time >= STA_INACTIVE_TIMEOUT_VAL) 1143 if (inactive_time >= STA_INACTIVE_TIMEOUT_VAL)
@@ -2024,7 +2022,6 @@ u8 send_multicast_frames(unifi_priv_t *priv, u16 interfaceTag)
2024 netInterface_priv_t *interfacePriv = priv->interfacePriv[interfaceTag]; 2022 netInterface_priv_t *interfacePriv = priv->interfacePriv[interfaceTag];
2025 u32 hostTag = 0xffffffff; 2023 u32 hostTag = 0xffffffff;
2026 2024
2027 func_enter();
2028 if(!isRouterBufferEnabled(priv,UNIFI_TRAFFIC_Q_VO)) { 2025 if(!isRouterBufferEnabled(priv,UNIFI_TRAFFIC_Q_VO)) {
2029 while((interfacePriv->dtimActive)&& (buffered_pkt=dequeue_tx_data_pdu(priv,&interfacePriv->genericMulticastOrBroadCastMgtFrames))) { 2026 while((interfacePriv->dtimActive)&& (buffered_pkt=dequeue_tx_data_pdu(priv,&interfacePriv->genericMulticastOrBroadCastMgtFrames))) {
2030 buffered_pkt->transmissionControl |= (TRANSMISSION_CONTROL_TRIGGER_MASK); 2027 buffered_pkt->transmissionControl |= (TRANSMISSION_CONTROL_TRIGGER_MASK);
@@ -2124,7 +2121,6 @@ void uf_process_ma_vif_availibility_ind(unifi_priv_t *priv,u8 *sigdata,
2124 CSR_RESULT_CODE resultCode = CSR_RC_SUCCESS; 2121 CSR_RESULT_CODE resultCode = CSR_RC_SUCCESS;
2125 netInterface_priv_t *interfacePriv; 2122 netInterface_priv_t *interfacePriv;
2126 2123
2127 func_enter();
2128 unifi_trace(priv, UDBG3, 2124 unifi_trace(priv, UDBG3,
2129 "uf_process_ma_vif_availibility_ind: Process signal 0x%.4X\n", 2125 "uf_process_ma_vif_availibility_ind: Process signal 0x%.4X\n",
2130 *((u16*)sigdata)); 2126 *((u16*)sigdata));
@@ -2134,7 +2130,6 @@ void uf_process_ma_vif_availibility_ind(unifi_priv_t *priv,u8 *sigdata,
2134 unifi_error(priv, 2130 unifi_error(priv,
2135 "uf_process_ma_vif_availibility_ind: Received unknown signal 0x%.4X.\n", 2131 "uf_process_ma_vif_availibility_ind: Received unknown signal 0x%.4X.\n",
2136 CSR_GET_UINT16_FROM_LITTLE_ENDIAN(sigdata)); 2132 CSR_GET_UINT16_FROM_LITTLE_ENDIAN(sigdata));
2137 func_exit();
2138 return; 2133 return;
2139 } 2134 }
2140 ind = &signal.u.MaVifAvailabilityIndication; 2135 ind = &signal.u.MaVifAvailabilityIndication;
@@ -2369,8 +2364,6 @@ void uf_send_buffered_data_from_ac(unifi_priv_t *priv,
2369 u8 moreData = FALSE; 2364 u8 moreData = FALSE;
2370 s8 r =0; 2365 s8 r =0;
2371 2366
2372 func_enter();
2373
2374 unifi_trace(priv,UDBG2,"uf_send_buffered_data_from_ac :\n"); 2367 unifi_trace(priv,UDBG2,"uf_send_buffered_data_from_ac :\n");
2375 2368
2376 while(!isRouterBufferEnabled(priv,queue) && 2369 while(!isRouterBufferEnabled(priv,queue) &&
@@ -2399,8 +2392,6 @@ void uf_send_buffered_data_from_ac(unifi_priv_t *priv,
2399 } 2392 }
2400 } 2393 }
2401 2394
2402 func_exit();
2403
2404} 2395}
2405 2396
2406void uf_send_buffered_frames(unifi_priv_t *priv,unifi_TrafficQueue q) 2397void uf_send_buffered_frames(unifi_priv_t *priv,unifi_TrafficQueue q)
@@ -2416,7 +2407,6 @@ void uf_send_buffered_frames(unifi_priv_t *priv,unifi_TrafficQueue q)
2416 if(!((interfacePriv->interfaceMode == CSR_WIFI_ROUTER_CTRL_MODE_AP) || 2407 if(!((interfacePriv->interfaceMode == CSR_WIFI_ROUTER_CTRL_MODE_AP) ||
2417 (interfacePriv->interfaceMode == CSR_WIFI_ROUTER_CTRL_MODE_P2PGO))) 2408 (interfacePriv->interfaceMode == CSR_WIFI_ROUTER_CTRL_MODE_P2PGO)))
2418 return; 2409 return;
2419 func_enter();
2420 2410
2421 queue = (q<=3)?q:0; 2411 queue = (q<=3)?q:0;
2422 2412
@@ -2451,7 +2441,6 @@ void uf_send_buffered_frames(unifi_priv_t *priv,unifi_TrafficQueue q)
2451 interfacePriv->dtimActive = FALSE; 2441 interfacePriv->dtimActive = FALSE;
2452 } 2442 }
2453 } 2443 }
2454 func_exit();
2455 return; 2444 return;
2456 } 2445 }
2457 if(priv->pausedStaHandle[queue] > 7) { 2446 if(priv->pausedStaHandle[queue] > 7) {
@@ -2542,7 +2531,6 @@ void uf_send_buffered_frames(unifi_priv_t *priv,unifi_TrafficQueue q)
2542 */ 2531 */
2543 unifi_trace(priv, UDBG4, "csrWifiHipSendBufferedFrames: UAPSD Resume Q=%x\n", queue); 2532 unifi_trace(priv, UDBG4, "csrWifiHipSendBufferedFrames: UAPSD Resume Q=%x\n", queue);
2544 resume_suspended_uapsd(priv, interfaceTag); 2533 resume_suspended_uapsd(priv, interfaceTag);
2545 func_exit();
2546} 2534}
2547 2535
2548 2536
@@ -2770,7 +2758,6 @@ void uf_send_qos_null(unifi_priv_t * priv,u16 interfaceTag, const u8 *da,CSR_PRI
2770 CSR_RATE transmitRate = 0; 2758 CSR_RATE transmitRate = 0;
2771 2759
2772 2760
2773 func_enter();
2774 /* Send a Null Frame to Peer, 2761 /* Send a Null Frame to Peer,
2775 * 32= size of mac header */ 2762 * 32= size of mac header */
2776 csrResult = unifi_net_data_malloc(priv, &bulkdata.d[0], MAC_HEADER_SIZE + QOS_CONTROL_HEADER_SIZE); 2763 csrResult = unifi_net_data_malloc(priv, &bulkdata.d[0], MAC_HEADER_SIZE + QOS_CONTROL_HEADER_SIZE);
@@ -2823,7 +2810,6 @@ void uf_send_qos_null(unifi_priv_t * priv,u16 interfaceTag, const u8 *da,CSR_PRI
2823 unifi_net_data_free(priv, &bulkdata.d[0]); 2810 unifi_net_data_free(priv, &bulkdata.d[0]);
2824 } 2811 }
2825 2812
2826 func_exit();
2827 return; 2813 return;
2828 2814
2829} 2815}
@@ -2842,7 +2828,6 @@ void uf_send_nulldata(unifi_priv_t * priv,u16 interfaceTag, const u8 *da,CSR_PRI
2842 CSR_MA_PACKET_REQUEST *req = &signal.u.MaPacketRequest; 2828 CSR_MA_PACKET_REQUEST *req = &signal.u.MaPacketRequest;
2843 unsigned long lock_flags; 2829 unsigned long lock_flags;
2844 2830
2845 func_enter();
2846 /* Send a Null Frame to Peer, size = 24 for MAC header */ 2831 /* Send a Null Frame to Peer, size = 24 for MAC header */
2847 csrResult = unifi_net_data_malloc(priv, &bulkdata.d[0], MAC_HEADER_SIZE); 2832 csrResult = unifi_net_data_malloc(priv, &bulkdata.d[0], MAC_HEADER_SIZE);
2848 2833
@@ -2909,7 +2894,6 @@ void uf_send_nulldata(unifi_priv_t * priv,u16 interfaceTag, const u8 *da,CSR_PRI
2909 srcStaInfo->nullDataHostTag = INVALID_HOST_TAG; 2894 srcStaInfo->nullDataHostTag = INVALID_HOST_TAG;
2910 } 2895 }
2911 2896
2912 func_exit();
2913 return; 2897 return;
2914} 2898}
2915 2899
@@ -3327,8 +3311,6 @@ void uf_prepare_send_cfm_list_for_queued_pkts(unifi_priv_t * priv,
3327 struct list_head *placeHolder; 3311 struct list_head *placeHolder;
3328 unsigned long lock_flags; 3312 unsigned long lock_flags;
3329 3313
3330 func_enter();
3331
3332 spin_lock_irqsave(&priv->tx_q_lock,lock_flags); 3314 spin_lock_irqsave(&priv->tx_q_lock,lock_flags);
3333 3315
3334 /* Search through the list and if confirmation required for any frames, 3316 /* Search through the list and if confirmation required for any frames,
@@ -3357,7 +3339,6 @@ void uf_prepare_send_cfm_list_for_queued_pkts(unifi_priv_t * priv,
3357 3339
3358 spin_unlock_irqrestore(&priv->tx_q_lock,lock_flags); 3340 spin_unlock_irqrestore(&priv->tx_q_lock,lock_flags);
3359 3341
3360 func_exit();
3361} 3342}
3362 3343
3363 3344
@@ -3492,11 +3473,11 @@ CsrWifiRouterCtrlStaInfo_t * CsrWifiRouterCtrlGetStationRecordFromHandle(unifi_p
3492} 3473}
3493 3474
3494/* Function to do inactivity */ 3475/* Function to do inactivity */
3495void uf_check_inactivity(unifi_priv_t *priv, u16 interfaceTag, CsrTime currentTime) 3476void uf_check_inactivity(unifi_priv_t *priv, u16 interfaceTag, u32 currentTime)
3496{ 3477{
3497 u32 i; 3478 u32 i;
3498 CsrWifiRouterCtrlStaInfo_t *staInfo; 3479 CsrWifiRouterCtrlStaInfo_t *staInfo;
3499 CsrTime elapsedTime; /* Time in microseconds */ 3480 u32 elapsedTime; /* Time in microseconds */
3500 netInterface_priv_t *interfacePriv = priv->interfacePriv[interfaceTag]; 3481 netInterface_priv_t *interfacePriv = priv->interfacePriv[interfaceTag];
3501 CsrWifiMacAddress peerMacAddress; 3482 CsrWifiMacAddress peerMacAddress;
3502 unsigned long lock_flags; 3483 unsigned long lock_flags;
@@ -3543,8 +3524,8 @@ void uf_check_inactivity(unifi_priv_t *priv, u16 interfaceTag, CsrTime currentTi
3543/* Function to update activity of a station */ 3524/* Function to update activity of a station */
3544void uf_update_sta_activity(unifi_priv_t *priv, u16 interfaceTag, const u8 *peerMacAddress) 3525void uf_update_sta_activity(unifi_priv_t *priv, u16 interfaceTag, const u8 *peerMacAddress)
3545{ 3526{
3546 CsrTime elapsedTime, currentTime; /* Time in microseconds */ 3527 u32 elapsedTime, currentTime; /* Time in microseconds */
3547 CsrTime timeHi; /* Not used - Time in microseconds */ 3528 u32 timeHi; /* Not used - Time in microseconds */
3548 CsrWifiRouterCtrlStaInfo_t *staInfo; 3529 CsrWifiRouterCtrlStaInfo_t *staInfo;
3549 netInterface_priv_t *interfacePriv = priv->interfacePriv[interfaceTag]; 3530 netInterface_priv_t *interfacePriv = priv->interfacePriv[interfaceTag];
3550 unsigned long lock_flags; 3531 unsigned long lock_flags;
@@ -3595,7 +3576,6 @@ void resume_unicast_buffered_frames(unifi_priv_t *priv, u16 interfaceTag)
3595 int r; 3576 int r;
3596 unsigned long lock_flags; 3577 unsigned long lock_flags;
3597 3578
3598 func_enter();
3599 while(!isRouterBufferEnabled(priv,3) && 3579 while(!isRouterBufferEnabled(priv,3) &&
3600 ((buffered_pkt=dequeue_tx_data_pdu(priv,&interfacePriv->genericMgtFrames))!=NULL)) { 3580 ((buffered_pkt=dequeue_tx_data_pdu(priv,&interfacePriv->genericMgtFrames))!=NULL)) {
3601 buffered_pkt->transmissionControl &= 3581 buffered_pkt->transmissionControl &=
@@ -3672,7 +3652,6 @@ void resume_unicast_buffered_frames(unifi_priv_t *priv, u16 interfaceTag)
3672 } 3652 }
3673 } 3653 }
3674 } 3654 }
3675 func_exit();
3676} 3655}
3677void update_eosp_to_head_of_broadcast_list_head(unifi_priv_t *priv,u16 interfaceTag) 3656void update_eosp_to_head_of_broadcast_list_head(unifi_priv_t *priv,u16 interfaceTag)
3678{ 3657{
@@ -3683,7 +3662,6 @@ void update_eosp_to_head_of_broadcast_list_head(unifi_priv_t *priv,u16 interface
3683 struct list_head *placeHolder; 3662 struct list_head *placeHolder;
3684 tx_buffered_packets_t *tx_q_item; 3663 tx_buffered_packets_t *tx_q_item;
3685 3664
3686 func_enter();
3687 if (interfacePriv->noOfbroadcastPktQueued) { 3665 if (interfacePriv->noOfbroadcastPktQueued) {
3688 3666
3689 /* Update the EOSP to the HEAD of b/c list 3667 /* Update the EOSP to the HEAD of b/c list
@@ -3700,7 +3678,6 @@ void update_eosp_to_head_of_broadcast_list_head(unifi_priv_t *priv,u16 interface
3700 } 3678 }
3701 spin_unlock_irqrestore(&priv->tx_q_lock,lock_flags); 3679 spin_unlock_irqrestore(&priv->tx_q_lock,lock_flags);
3702 } 3680 }
3703 func_exit();
3704} 3681}
3705 3682
3706/* 3683/*
diff --git a/drivers/staging/csr/unifi_priv.h b/drivers/staging/csr/unifi_priv.h
index aec8e28fb60d..d20d74ce56cb 100644
--- a/drivers/staging/csr/unifi_priv.h
+++ b/drivers/staging/csr/unifi_priv.h
@@ -17,7 +17,6 @@
17#ifndef __LINUX_UNIFI_PRIV_H__ 17#ifndef __LINUX_UNIFI_PRIV_H__
18#define __LINUX_UNIFI_PRIV_H__ 1 18#define __LINUX_UNIFI_PRIV_H__ 1
19 19
20#include <linux/version.h>
21#include <linux/module.h> 20#include <linux/module.h>
22#include <linux/string.h> 21#include <linux/string.h>
23#include <linux/errno.h> 22#include <linux/errno.h>
@@ -313,7 +312,7 @@ typedef struct CsrWifiRouterCtrlStaInfo_t {
313 CSR_CLIENT_TAG nullDataHostTag; 312 CSR_CLIENT_TAG nullDataHostTag;
314 313
315 /* Activity timestamps for the station */ 314 /* Activity timestamps for the station */
316 CsrTime lastActivity; 315 u32 lastActivity;
317 316
318 /* during m/c transmission sp suspended */ 317 /* during m/c transmission sp suspended */
319 u8 uspSuspend; 318 u8 uspSuspend;
@@ -653,7 +652,7 @@ typedef struct {
653 bulk_data_param_t bulkdata; 652 bulk_data_param_t bulkdata;
654 CSR_SIGNAL signal; 653 CSR_SIGNAL signal;
655 u16 sn; 654 u16 sn;
656 CsrTime recv_time; 655 u32 recv_time;
657} frame_desc_struct; 656} frame_desc_struct;
658 657
659typedef struct { 658typedef struct {
@@ -736,7 +735,7 @@ typedef struct netInterface_priv
736 u8 sta_activity_check_enabled; 735 u8 sta_activity_check_enabled;
737 736
738 /* Timestamp when the last inactivity check was done */ 737 /* Timestamp when the last inactivity check was done */
739 CsrTime last_inactivity_check; 738 u32 last_inactivity_check;
740 739
741 /*number of multicast or borad cast packets queued*/ 740 /*number of multicast or borad cast packets queued*/
742 u16 noOfbroadcastPktQueued; 741 u16 noOfbroadcastPktQueued;
diff --git a/drivers/staging/csr/unifi_sme.c b/drivers/staging/csr/unifi_sme.c
index ff639d47d07b..7c6c4138fc76 100644
--- a/drivers/staging/csr/unifi_sme.c
+++ b/drivers/staging/csr/unifi_sme.c
@@ -78,23 +78,19 @@ sme_log_event(ul_client_t *pcli,
78 CsrResult result = CSR_RESULT_SUCCESS; 78 CsrResult result = CSR_RESULT_SUCCESS;
79 int r; 79 int r;
80 80
81 func_enter();
82 /* Just a sanity check */ 81 /* Just a sanity check */
83 if ((signal == NULL) || (signal_len <= 0)) { 82 if ((signal == NULL) || (signal_len <= 0)) {
84 func_exit();
85 return; 83 return;
86 } 84 }
87 85
88 priv = uf_find_instance(pcli->instance); 86 priv = uf_find_instance(pcli->instance);
89 if (!priv) { 87 if (!priv) {
90 unifi_error(priv, "sme_log_event: invalid priv\n"); 88 unifi_error(priv, "sme_log_event: invalid priv\n");
91 func_exit();
92 return; 89 return;
93 } 90 }
94 91
95 if (priv->smepriv == NULL) { 92 if (priv->smepriv == NULL) {
96 unifi_error(priv, "sme_log_event: invalid smepriv\n"); 93 unifi_error(priv, "sme_log_event: invalid smepriv\n");
97 func_exit();
98 return; 94 return;
99 } 95 }
100 96
@@ -109,7 +105,6 @@ sme_log_event(ul_client_t *pcli,
109 if ((unpacked_signal.SignalPrimitiveHeader.SignalId == CSR_DEBUG_STRING_INDICATION_ID) || 105 if ((unpacked_signal.SignalPrimitiveHeader.SignalId == CSR_DEBUG_STRING_INDICATION_ID) ||
110 (unpacked_signal.SignalPrimitiveHeader.SignalId == CSR_DEBUG_WORD16_INDICATION_ID)) 106 (unpacked_signal.SignalPrimitiveHeader.SignalId == CSR_DEBUG_WORD16_INDICATION_ID))
111 { 107 {
112 func_exit();
113 return; 108 return;
114 } 109 }
115 if (unpacked_signal.SignalPrimitiveHeader.SignalId == CSR_MA_PACKET_INDICATION_ID) 110 if (unpacked_signal.SignalPrimitiveHeader.SignalId == CSR_MA_PACKET_INDICATION_ID)
@@ -171,7 +166,6 @@ sme_log_event(ul_client_t *pcli,
171 if (interfaceTag >= CSR_WIFI_NUM_INTERFACES) 166 if (interfaceTag >= CSR_WIFI_NUM_INTERFACES)
172 { 167 {
173 unifi_error(priv, "Bad MA_PACKET_CONFIRM interfaceTag %d\n", interfaceTag); 168 unifi_error(priv, "Bad MA_PACKET_CONFIRM interfaceTag %d\n", interfaceTag);
174 func_exit();
175 return; 169 return;
176 } 170 }
177 171
@@ -219,7 +213,6 @@ sme_log_event(ul_client_t *pcli,
219 } else { 213 } else {
220 unifi_trace(priv, UDBG1, "%s: M4 received from netdevice\n", __FUNCTION__); 214 unifi_trace(priv, UDBG1, "%s: M4 received from netdevice\n", __FUNCTION__);
221 } 215 }
222 func_exit();
223 return; 216 return;
224 } 217 }
225 } 218 }
@@ -248,7 +241,6 @@ sme_log_event(ul_client_t *pcli,
248 dataref1.length, dataref1.data, 241 dataref1.length, dataref1.data,
249 dataref2.length, dataref2.data); 242 dataref2.length, dataref2.data);
250 243
251 func_exit();
252} /* sme_log_event() */ 244} /* sme_log_event() */
253 245
254 246
@@ -1158,8 +1150,6 @@ uf_send_m4_ready_wq(struct work_struct *work)
1158 CsrWifiMacAddress peer; 1150 CsrWifiMacAddress peer;
1159 unsigned long flags; 1151 unsigned long flags;
1160 1152
1161 func_enter();
1162
1163 /* The peer address was stored in the signal */ 1153 /* The peer address was stored in the signal */
1164 spin_lock_irqsave(&priv->m4_lock, flags); 1154 spin_lock_irqsave(&priv->m4_lock, flags);
1165 memcpy(peer.a, req->Ra.x, sizeof(peer.a)); 1155 memcpy(peer.a, req->Ra.x, sizeof(peer.a));
@@ -1171,8 +1161,6 @@ uf_send_m4_ready_wq(struct work_struct *work)
1171 unifi_trace(priv, UDBG1, "M4ReadyToSendInd sent for peer %pMF\n", 1161 unifi_trace(priv, UDBG1, "M4ReadyToSendInd sent for peer %pMF\n",
1172 peer.a); 1162 peer.a);
1173 1163
1174 func_exit();
1175
1176} /* uf_send_m4_ready_wq() */ 1164} /* uf_send_m4_ready_wq() */
1177 1165
1178#if (defined(CSR_WIFI_SECURITY_WAPI_ENABLE) && defined(CSR_WIFI_SECURITY_WAPI_SW_ENCRYPTION)) 1166#if (defined(CSR_WIFI_SECURITY_WAPI_ENABLE) && defined(CSR_WIFI_SECURITY_WAPI_SW_ENCRYPTION))
@@ -1204,8 +1192,6 @@ void uf_send_pkt_to_encrypt(struct work_struct *work)
1204 1192
1205 if (interfacePriv->interfaceMode == CSR_WIFI_ROUTER_CTRL_MODE_STA) { 1193 if (interfacePriv->interfaceMode == CSR_WIFI_ROUTER_CTRL_MODE_STA) {
1206 1194
1207 func_enter();
1208
1209 pktBulkDataLength = interfacePriv->wapi_unicast_bulk_data.data_length; 1195 pktBulkDataLength = interfacePriv->wapi_unicast_bulk_data.data_length;
1210 1196
1211 if (pktBulkDataLength > 0) { 1197 if (pktBulkDataLength > 0) {
@@ -1231,7 +1217,6 @@ void uf_send_pkt_to_encrypt(struct work_struct *work)
1231 1217
1232 kfree(pktBulkData); /* Would have been copied over by the SME Handler */ 1218 kfree(pktBulkData); /* Would have been copied over by the SME Handler */
1233 1219
1234 func_exit();
1235 } else { 1220 } else {
1236 unifi_warning(priv, "uf_send_pkt_to_encrypt() is NOT applicable for interface mode - %d\n",interfacePriv->interfaceMode); 1221 unifi_warning(priv, "uf_send_pkt_to_encrypt() is NOT applicable for interface mode - %d\n",interfacePriv->interfaceMode);
1237 } 1222 }
diff --git a/drivers/staging/csr/unifi_wext.h b/drivers/staging/csr/unifi_wext.h
index 6834c43abfbb..beba089e2e35 100644
--- a/drivers/staging/csr/unifi_wext.h
+++ b/drivers/staging/csr/unifi_wext.h
@@ -16,7 +16,6 @@
16#define __LINUX_UNIFI_WEXT_H__ 1 16#define __LINUX_UNIFI_WEXT_H__ 1
17 17
18#include <linux/kernel.h> 18#include <linux/kernel.h>
19#include <linux/version.h>
20#include <net/iw_handler.h> 19#include <net/iw_handler.h>
21#include "csr_wifi_sme_prim.h" 20#include "csr_wifi_sme_prim.h"
22 21
diff --git a/drivers/staging/cxt1e1/musycc.c b/drivers/staging/cxt1e1/musycc.c
index ba721c604061..b2cc68a1fe87 100644
--- a/drivers/staging/cxt1e1/musycc.c
+++ b/drivers/staging/cxt1e1/musycc.c
@@ -55,26 +55,26 @@ extern int cxt1e1_max_mtu;
55extern int max_rxdesc_used; 55extern int max_rxdesc_used;
56extern int max_txdesc_used; 56extern int max_txdesc_used;
57extern ci_t *CI; /* dummy pointr to board ZEROE's data - DEBUG 57extern ci_t *CI; /* dummy pointr to board ZEROE's data - DEBUG
58 * USAGE */ 58 * USAGE */
59 59
60 60
61/*******************************************************************/ 61/*******************************************************************/
62/* forward references */ 62/* forward references */
63void c4_fifo_free (mpi_t *, int); 63void c4_fifo_free(mpi_t *, int);
64void c4_wk_chan_restart (mch_t *); 64void c4_wk_chan_restart(mch_t *);
65void musycc_bh_tx_eom (mpi_t *, int); 65void musycc_bh_tx_eom(mpi_t *, int);
66int musycc_chan_up (ci_t *, int); 66int musycc_chan_up(ci_t *, int);
67status_t __init musycc_init (ci_t *); 67status_t __init musycc_init(ci_t *);
68STATIC void __init musycc_init_port (mpi_t *); 68STATIC void __init musycc_init_port(mpi_t *);
69void musycc_intr_bh_tasklet (ci_t *); 69void musycc_intr_bh_tasklet(ci_t *);
70void musycc_serv_req (mpi_t *, u_int32_t); 70void musycc_serv_req(mpi_t *, u_int32_t);
71void musycc_update_timeslots (mpi_t *); 71void musycc_update_timeslots(mpi_t *);
72 72
73/*******************************************************************/ 73/*******************************************************************/
74 74
75#if 1 75#if 1
76STATIC int 76STATIC int
77musycc_dump_rxbuffer_ring (mch_t * ch, int lockit) 77musycc_dump_rxbuffer_ring(mch_t * ch, int lockit)
78{ 78{
79 struct mdesc *m; 79 struct mdesc *m;
80 unsigned long flags = 0; 80 unsigned long flags = 0;
@@ -83,71 +83,64 @@ musycc_dump_rxbuffer_ring (mch_t * ch, int lockit)
83 int n; 83 int n;
84 84
85 if (lockit) 85 if (lockit)
86 { 86 spin_lock_irqsave(&ch->ch_rxlock, flags);
87 spin_lock_irqsave (&ch->ch_rxlock, flags);
88 }
89 if (ch->rxd_num == 0) 87 if (ch->rxd_num == 0)
90 { 88 pr_info(" ZERO receive buffers allocated for this channel.");
91 pr_info(" ZERO receive buffers allocated for this channel."); 89 else {
92 } else 90 FLUSH_MEM_READ();
93 { 91 m = &ch->mdr[ch->rxix_irq_srv];
94 FLUSH_MEM_READ (); 92 for (n = ch->rxd_num; n; n--) {
95 m = &ch->mdr[ch->rxix_irq_srv]; 93 status = le32_to_cpu(m->status);
96 for (n = ch->rxd_num; n; n--) 94 {
97 { 95 pr_info("%c %08lx[%2d]: sts %08x (%c%c%c%c:%d.) Data [%08x] Next [%08x]\n",
98 status = le32_to_cpu (m->status); 96 (m == &ch->mdr[ch->rxix_irq_srv]) ? 'F' : ' ',
99 { 97 (unsigned long) m, n,
100 pr_info("%c %08lx[%2d]: sts %08x (%c%c%c%c:%d.) Data [%08x] Next [%08x]\n", 98 status,
101 (m == &ch->mdr[ch->rxix_irq_srv]) ? 'F' : ' ', 99 m->data ? (status & HOST_RX_OWNED ? 'H' : 'M') : '-',
102 (unsigned long) m, n, 100 status & POLL_DISABLED ? 'P' : '-',
103 status, 101 status & EOBIRQ_ENABLE ? 'b' : '-',
104 m->data ? (status & HOST_RX_OWNED ? 'H' : 'M') : '-', 102 status & EOMIRQ_ENABLE ? 'm' : '-',
105 status & POLL_DISABLED ? 'P' : '-', 103 status & LENGTH_MASK,
106 status & EOBIRQ_ENABLE ? 'b' : '-', 104 le32_to_cpu(m->data), le32_to_cpu(m->next));
107 status & EOMIRQ_ENABLE ? 'm' : '-',
108 status & LENGTH_MASK,
109 le32_to_cpu (m->data), le32_to_cpu (m->next));
110#ifdef RLD_DUMP_BUFDATA 105#ifdef RLD_DUMP_BUFDATA
111 { 106 {
112 u_int32_t *dp; 107 u_int32_t *dp;
113 int len = status & LENGTH_MASK; 108 int len = status & LENGTH_MASK;
114 109
115#if 1 110#if 1
116 if (m->data && (status & HOST_RX_OWNED)) 111 if (m->data && (status & HOST_RX_OWNED))
117#else 112#else
118 if (m->data) /* always dump regardless of valid RX 113 if (m->data) /* always dump regardless of valid RX
119 * data */ 114 * data */
120#endif 115#endif
121 { 116 {
122 dp = (u_int32_t *) OS_phystov ((void *) (le32_to_cpu (m->data))); 117 dp = (u_int32_t *) OS_phystov((void *) (le32_to_cpu(m->data)));
123 if (len >= 0x10) 118 if (len >= 0x10)
124 pr_info(" %x[%x]: %08X %08X %08X %08x\n", (u_int32_t) dp, len, 119 pr_info(" %x[%x]: %08X %08X %08X %08x\n", (u_int32_t) dp, len,
125 *dp, *(dp + 1), *(dp + 2), *(dp + 3)); 120 *dp, *(dp + 1), *(dp + 2), *(dp + 3));
126 else if (len >= 0x08) 121 else if (len >= 0x08)
127 pr_info(" %x[%x]: %08X %08X\n", (u_int32_t) dp, len, 122 pr_info(" %x[%x]: %08X %08X\n", (u_int32_t) dp, len,
128 *dp, *(dp + 1)); 123 *dp, *(dp + 1));
129 else 124 else
130 pr_info(" %x[%x]: %08X\n", (u_int32_t) dp, len, *dp); 125 pr_info(" %x[%x]: %08X\n", (u_int32_t) dp, len, *dp);
131 } 126 }
132 } 127 }
133#endif 128#endif
134 } 129 }
135 m = m->snext; 130 m = m->snext;
136 } 131 }
137 } /* -for- */ 132 } /* -for- */
138 pr_info("\n"); 133 pr_info("\n");
139 134
140 if (lockit) 135 if (lockit)
141 { 136 spin_unlock_irqrestore(&ch->ch_rxlock, flags);
142 spin_unlock_irqrestore (&ch->ch_rxlock, flags);
143 }
144 return 0; 137 return 0;
145} 138}
146#endif 139#endif
147 140
148#if 1 141#if 1
149STATIC int 142STATIC int
150musycc_dump_txbuffer_ring (mch_t * ch, int lockit) 143musycc_dump_txbuffer_ring(mch_t * ch, int lockit)
151{ 144{
152 struct mdesc *m; 145 struct mdesc *m;
153 unsigned long flags = 0; 146 unsigned long flags = 0;
@@ -155,60 +148,52 @@ musycc_dump_txbuffer_ring (mch_t * ch, int lockit)
155 int n; 148 int n;
156 149
157 if (lockit) 150 if (lockit)
158 { 151 spin_lock_irqsave(&ch->ch_txlock, flags);
159 spin_lock_irqsave (&ch->ch_txlock, flags);
160 }
161 if (ch->txd_num == 0) 152 if (ch->txd_num == 0)
162 { 153 pr_info(" ZERO transmit buffers allocated for this channel.");
163 pr_info(" ZERO transmit buffers allocated for this channel."); 154 else {
164 } else 155 FLUSH_MEM_READ();
165 { 156 m = ch->txd_irq_srv;
166 FLUSH_MEM_READ (); 157 for (n = ch->txd_num; n; n--) {
167 m = ch->txd_irq_srv; 158 status = le32_to_cpu(m->status);
168 for (n = ch->txd_num; n; n--) 159 {
169 { 160 pr_info("%c%c %08lx[%2d]: sts %08x (%c%c%c%c:%d.) Data [%08x] Next [%08x]\n",
170 status = le32_to_cpu (m->status); 161 (m == ch->txd_usr_add) ? 'F' : ' ',
171 { 162 (m == ch->txd_irq_srv) ? 'L' : ' ',
172 pr_info("%c%c %08lx[%2d]: sts %08x (%c%c%c%c:%d.) Data [%08x] Next [%08x]\n", 163 (unsigned long) m, n,
173 (m == ch->txd_usr_add) ? 'F' : ' ', 164 status,
174 (m == ch->txd_irq_srv) ? 'L' : ' ', 165 m->data ? (status & MUSYCC_TX_OWNED ? 'M' : 'H') : '-',
175 (unsigned long) m, n, 166 status & POLL_DISABLED ? 'P' : '-',
176 status, 167 status & EOBIRQ_ENABLE ? 'b' : '-',
177 m->data ? (status & MUSYCC_TX_OWNED ? 'M' : 'H') : '-', 168 status & EOMIRQ_ENABLE ? 'm' : '-',
178 status & POLL_DISABLED ? 'P' : '-', 169 status & LENGTH_MASK,
179 status & EOBIRQ_ENABLE ? 'b' : '-', 170 le32_to_cpu(m->data), le32_to_cpu(m->next));
180 status & EOMIRQ_ENABLE ? 'm' : '-',
181 status & LENGTH_MASK,
182 le32_to_cpu (m->data), le32_to_cpu (m->next));
183#ifdef RLD_DUMP_BUFDATA 171#ifdef RLD_DUMP_BUFDATA
184 { 172 {
185 u_int32_t *dp; 173 u_int32_t *dp;
186 int len = status & LENGTH_MASK; 174 int len = status & LENGTH_MASK;
187 175
188 if (m->data) 176 if (m->data) {
189 { 177 dp = (u_int32_t *) OS_phystov((void *) (le32_to_cpu(m->data)));
190 dp = (u_int32_t *) OS_phystov ((void *) (le32_to_cpu (m->data))); 178 if (len >= 0x10)
191 if (len >= 0x10) 179 pr_info(" %x[%x]: %08X %08X %08X %08x\n", (u_int32_t) dp, len,
192 pr_info(" %x[%x]: %08X %08X %08X %08x\n", (u_int32_t) dp, len, 180 *dp, *(dp + 1), *(dp + 2), *(dp + 3));
193 *dp, *(dp + 1), *(dp + 2), *(dp + 3)); 181 else if (len >= 0x08)
194 else if (len >= 0x08) 182 pr_info(" %x[%x]: %08X %08X\n", (u_int32_t) dp, len,
195 pr_info(" %x[%x]: %08X %08X\n", (u_int32_t) dp, len, 183 *dp, *(dp + 1));
196 *dp, *(dp + 1)); 184 else
197 else 185 pr_info(" %x[%x]: %08X\n", (u_int32_t) dp, len, *dp);
198 pr_info(" %x[%x]: %08X\n", (u_int32_t) dp, len, *dp); 186 }
199 } 187 }
200 }
201#endif 188#endif
202 } 189 }
203 m = m->snext; 190 m = m->snext;
204 } 191 }
205 } /* -for- */ 192 } /* -for- */
206 pr_info("\n"); 193 pr_info("\n");
207 194
208 if (lockit) 195 if (lockit)
209 { 196 spin_unlock_irqrestore(&ch->ch_txlock, flags);
210 spin_unlock_irqrestore (&ch->ch_txlock, flags);
211 }
212 return 0; 197 return 0;
213} 198}
214#endif 199#endif
@@ -220,58 +205,55 @@ musycc_dump_txbuffer_ring (mch_t * ch, int lockit)
220 */ 205 */
221 206
222status_t 207status_t
223musycc_dump_ring (ci_t * ci, unsigned int chan) 208musycc_dump_ring(ci_t * ci, unsigned int chan)
224{ 209{
225 mch_t *ch; 210 mch_t *ch;
226 211
227 if (chan >= MAX_CHANS_USED) 212 if (chan >= MAX_CHANS_USED)
213 return SBE_DRVR_FAIL; /* E2BIG */
228 { 214 {
229 return SBE_DRVR_FAIL; /* E2BIG */ 215 int bh;
230 } 216
231 { 217 bh = atomic_read(&ci->bh_pending);
232 int bh; 218 pr_info(">> bh_pend %d [%d] ihead %d itail %d [%d] th_cnt %d bh_cnt %d wdcnt %d note %d\n",
233 219 bh, max_bh, ci->iqp_headx, ci->iqp_tailx, max_intcnt,
234 bh = atomic_read (&ci->bh_pending); 220 ci->intlog.drvr_intr_thcount,
235 pr_info(">> bh_pend %d [%d] ihead %d itail %d [%d] th_cnt %d bh_cnt %d wdcnt %d note %d\n", 221 ci->intlog.drvr_intr_bhcount,
236 bh, max_bh, ci->iqp_headx, ci->iqp_tailx, max_intcnt, 222 ci->wdcount, ci->wd_notify);
237 ci->intlog.drvr_intr_thcount, 223 max_bh = 0; /* reset counter */
238 ci->intlog.drvr_intr_bhcount, 224 max_intcnt = 0; /* reset counter */
239 ci->wdcount, ci->wd_notify);
240 max_bh = 0; /* reset counter */
241 max_intcnt = 0; /* reset counter */
242 } 225 }
243 226
244 if (!(ch = sd_find_chan (dummy, chan))) 227 if (!(ch = sd_find_chan(dummy, chan))) {
245 { 228 pr_info(">> musycc_dump_ring: channel %d not up.\n", chan);
246 pr_info(">> musycc_dump_ring: channel %d not up.\n", chan); 229 return ENOENT;
247 return ENOENT;
248 } 230 }
249 pr_info(">> CI %p CHANNEL %3d @ %p: state %x status/p %x/%x\n", ci, chan, ch, ch->state, 231 pr_info(">> CI %p CHANNEL %3d @ %p: state %x status/p %x/%x\n", ci, chan, ch, ch->state,
250 ch->status, ch->p.status); 232 ch->status, ch->p.status);
251 pr_info("--------------------------------\nTX Buffer Ring - Channel %d, txd_num %d. (bd/ch pend %d %d), TXD required %d, txpkt %lu\n", 233 pr_info("--------------------------------\nTX Buffer Ring - Channel %d, txd_num %d. (bd/ch pend %d %d), TXD required %d, txpkt %lu\n",
252 chan, ch->txd_num, 234 chan, ch->txd_num,
253 (u_int32_t) atomic_read (&ci->tx_pending), (u_int32_t) atomic_read (&ch->tx_pending), ch->txd_required, ch->s.tx_packets); 235 (u_int32_t) atomic_read(&ci->tx_pending), (u_int32_t) atomic_read(&ch->tx_pending), ch->txd_required, ch->s.tx_packets);
254 pr_info("++ User 0x%p IRQ_SRV 0x%p USR_ADD 0x%p QStopped %x, start_tx %x tx_full %d txd_free %d mode %x\n", 236 pr_info("++ User 0x%p IRQ_SRV 0x%p USR_ADD 0x%p QStopped %x, start_tx %x tx_full %d txd_free %d mode %x\n",
255 ch->user, ch->txd_irq_srv, ch->txd_usr_add, 237 ch->user, ch->txd_irq_srv, ch->txd_usr_add,
256 sd_queue_stopped (ch->user), 238 sd_queue_stopped(ch->user),
257 ch->ch_start_tx, ch->tx_full, ch->txd_free, ch->p.chan_mode); 239 ch->ch_start_tx, ch->tx_full, ch->txd_free, ch->p.chan_mode);
258 musycc_dump_txbuffer_ring (ch, 1); 240 musycc_dump_txbuffer_ring(ch, 1);
259 pr_info("RX Buffer Ring - Channel %d, rxd_num %d. IRQ_SRV[%d] 0x%p, start_rx %x rxpkt %lu\n", 241 pr_info("RX Buffer Ring - Channel %d, rxd_num %d. IRQ_SRV[%d] 0x%p, start_rx %x rxpkt %lu\n",
260 chan, ch->rxd_num, ch->rxix_irq_srv, 242 chan, ch->rxd_num, ch->rxix_irq_srv,
261 &ch->mdr[ch->rxix_irq_srv], ch->ch_start_rx, ch->s.rx_packets); 243 &ch->mdr[ch->rxix_irq_srv], ch->ch_start_rx, ch->s.rx_packets);
262 musycc_dump_rxbuffer_ring (ch, 1); 244 musycc_dump_rxbuffer_ring(ch, 1);
263 245
264 return SBE_DRVR_SUCCESS; 246 return SBE_DRVR_SUCCESS;
265} 247}
266 248
267 249
268status_t 250status_t
269musycc_dump_rings (ci_t * ci, unsigned int start_chan) 251musycc_dump_rings(ci_t * ci, unsigned int start_chan)
270{ 252{
271 unsigned int chan; 253 unsigned int chan;
272 254
273 for (chan = start_chan; chan < (start_chan + 5); chan++) 255 for (chan = start_chan; chan < (start_chan + 5); chan++)
274 musycc_dump_ring (ci, chan); 256 musycc_dump_ring(ci, chan);
275 return SBE_DRVR_SUCCESS; 257 return SBE_DRVR_SUCCESS;
276} 258}
277 259
@@ -282,7 +264,7 @@ musycc_dump_rings (ci_t * ci, unsigned int start_chan)
282 */ 264 */
283 265
284void 266void
285musycc_init_mdt (mpi_t * pi) 267musycc_init_mdt(mpi_t * pi)
286{ 268{
287 u_int32_t *addr, cfg; 269 u_int32_t *addr, cfg;
288 int i; 270 int i;
@@ -299,56 +281,50 @@ musycc_init_mdt (mpi_t * pi)
299 cfg = CFG_CH_FLAG_7E << IDLE_CODE; 281 cfg = CFG_CH_FLAG_7E << IDLE_CODE;
300 282
301 for (i = 0; i < 32; addr++, i++) 283 for (i = 0; i < 32; addr++, i++)
302 { 284 pci_write_32(addr, cfg);
303 pci_write_32 (addr, cfg);
304 }
305} 285}
306 286
307 287
308/* Set TX thp to the next unprocessed md */ 288/* Set TX thp to the next unprocessed md */
309 289
310void 290void
311musycc_update_tx_thp (mch_t * ch) 291musycc_update_tx_thp(mch_t * ch)
312{ 292{
313 struct mdesc *md; 293 struct mdesc *md;
314 unsigned long flags; 294 unsigned long flags;
315 295
316 spin_lock_irqsave (&ch->ch_txlock, flags); 296 spin_lock_irqsave(&ch->ch_txlock, flags);
317 while (1) 297 while (1) {
318 { 298 md = ch->txd_irq_srv;
319 md = ch->txd_irq_srv; 299 FLUSH_MEM_READ();
320 FLUSH_MEM_READ (); 300 if (!md->data) {
321 if (!md->data) 301 /* No MDs with buffers to process */
322 { 302 spin_unlock_irqrestore(&ch->ch_txlock, flags);
323 /* No MDs with buffers to process */ 303 return;
324 spin_unlock_irqrestore (&ch->ch_txlock, flags); 304 }
325 return; 305 if ((le32_to_cpu(md->status)) & MUSYCC_TX_OWNED) {
326 } 306 /* this is the MD to restart TX with */
327 if ((le32_to_cpu (md->status)) & MUSYCC_TX_OWNED) 307 break;
328 { 308 }
329 /* this is the MD to restart TX with */ 309 /*
330 break; 310 * Otherwise, we have a valid, host-owned message descriptor which
331 } 311 * has been successfully transmitted and whose buffer can be freed,
332 /* 312 * so... process this MD, it's owned by the host. (This might give
333 * Otherwise, we have a valid, host-owned message descriptor which 313 * as a new, updated txd_irq_srv.)
334 * has been successfully transmitted and whose buffer can be freed, 314 */
335 * so... process this MD, it's owned by the host. (This might give 315 musycc_bh_tx_eom(ch->up, ch->gchan);
336 * as a new, updated txd_irq_srv.)
337 */
338 musycc_bh_tx_eom (ch->up, ch->gchan);
339 } 316 }
340 md = ch->txd_irq_srv; 317 md = ch->txd_irq_srv;
341 ch->up->regram->thp[ch->gchan] = cpu_to_le32 (OS_vtophys (md)); 318 ch->up->regram->thp[ch->gchan] = cpu_to_le32(OS_vtophys(md));
342 FLUSH_MEM_WRITE (); 319 FLUSH_MEM_WRITE();
343 320
344 if (ch->tx_full) 321 if (ch->tx_full) {
345 { 322 ch->tx_full = 0;
346 ch->tx_full = 0; 323 ch->txd_required = 0;
347 ch->txd_required = 0; 324 sd_enable_xmit(ch->user); /* re-enable to catch flow controlled
348 sd_enable_xmit (ch->user); /* re-enable to catch flow controlled 325 * channel */
349 * channel */
350 } 326 }
351 spin_unlock_irqrestore (&ch->ch_txlock, flags); 327 spin_unlock_irqrestore(&ch->ch_txlock, flags);
352 328
353#ifdef RLD_TRANS_DEBUG 329#ifdef RLD_TRANS_DEBUG
354 pr_info("++ musycc_update_tx_thp[%d]: setting thp = %p, sts %x\n", ch->channum, md, md->status); 330 pr_info("++ musycc_update_tx_thp[%d]: setting thp = %p, sts %x\n", ch->channum, md, md->status);
@@ -366,7 +342,7 @@ musycc_update_tx_thp (mch_t * ch)
366 */ 342 */
367 343
368void 344void
369musycc_wq_chan_restart (void *arg) /* channel private structure */ 345musycc_wq_chan_restart(void *arg) /* channel private structure */
370{ 346{
371 mch_t *ch; 347 mch_t *ch;
372 mpi_t *pi; 348 mpi_t *pi;
@@ -380,7 +356,7 @@ musycc_wq_chan_restart (void *arg) /* channel private structure */
380 356
381#ifdef RLD_TRANS_DEBUG 357#ifdef RLD_TRANS_DEBUG
382 pr_info("wq_chan_restart[%d]: start_RT[%d/%d] status %x\n", 358 pr_info("wq_chan_restart[%d]: start_RT[%d/%d] status %x\n",
383 ch->channum, ch->ch_start_rx, ch->ch_start_tx, ch->status); 359 ch->channum, ch->ch_start_rx, ch->ch_start_tx, ch->status);
384 360
385#endif 361#endif
386 362
@@ -388,80 +364,74 @@ musycc_wq_chan_restart (void *arg) /* channel private structure */
388 /** check for RX restart request **/ 364 /** check for RX restart request **/
389 /**********************************/ 365 /**********************************/
390 366
391 if ((ch->ch_start_rx) && (ch->status & RX_ENABLED)) 367 if ((ch->ch_start_rx) && (ch->status & RX_ENABLED)) {
392 {
393 368
394 ch->ch_start_rx = 0; 369 ch->ch_start_rx = 0;
395#if defined(RLD_TRANS_DEBUG) || defined(RLD_RXACT_DEBUG) 370#if defined(RLD_TRANS_DEBUG) || defined(RLD_RXACT_DEBUG)
396 { 371 {
397 static int hereb4 = 7; 372 static int hereb4 = 7;
398 373
399 if (hereb4) /* RLD DEBUG */ 374 if (hereb4) { /* RLD DEBUG */
400 { 375 hereb4--;
401 hereb4--;
402#ifdef RLD_TRANS_DEBUG 376#ifdef RLD_TRANS_DEBUG
403 md = &ch->mdr[ch->rxix_irq_srv]; 377 md = &ch->mdr[ch->rxix_irq_srv];
404 pr_info("++ musycc_wq_chan_restart[%d] CHAN RX ACTIVATE: rxix_irq_srv %d, md %p sts %x, rxpkt %lu\n", 378 pr_info("++ musycc_wq_chan_restart[%d] CHAN RX ACTIVATE: rxix_irq_srv %d, md %p sts %x, rxpkt %lu\n",
405 ch->channum, ch->rxix_irq_srv, md, le32_to_cpu (md->status), 379 ch->channum, ch->rxix_irq_srv, md, le32_to_cpu(md->status),
406 ch->s.rx_packets); 380 ch->s.rx_packets);
407#elif defined(RLD_RXACT_DEBUG) 381#elif defined(RLD_RXACT_DEBUG)
408 md = &ch->mdr[ch->rxix_irq_srv]; 382 md = &ch->mdr[ch->rxix_irq_srv];
409 pr_info("++ musycc_wq_chan_restart[%d] CHAN RX ACTIVATE: rxix_irq_srv %d, md %p sts %x, rxpkt %lu\n", 383 pr_info("++ musycc_wq_chan_restart[%d] CHAN RX ACTIVATE: rxix_irq_srv %d, md %p sts %x, rxpkt %lu\n",
410 ch->channum, ch->rxix_irq_srv, md, le32_to_cpu (md->status), 384 ch->channum, ch->rxix_irq_srv, md, le32_to_cpu(md->status),
411 ch->s.rx_packets); 385 ch->s.rx_packets);
412 musycc_dump_rxbuffer_ring (ch, 1); /* RLD DEBUG */ 386 musycc_dump_rxbuffer_ring(ch, 1); /* RLD DEBUG */
413#endif 387#endif
414 } 388 }
415 } 389 }
416#endif 390#endif
417 musycc_serv_req (pi, SR_CHANNEL_ACTIVATE | SR_RX_DIRECTION | ch->gchan); 391 musycc_serv_req(pi, SR_CHANNEL_ACTIVATE | SR_RX_DIRECTION | ch->gchan);
418 } 392 }
419 /**********************************/ 393 /**********************************/
420 /** check for TX restart request **/ 394 /** check for TX restart request **/
421 /**********************************/ 395 /**********************************/
422 396
423 if ((ch->ch_start_tx) && (ch->status & TX_ENABLED)) 397 if ((ch->ch_start_tx) && (ch->status & TX_ENABLED)) {
424 { 398 /* find next unprocessed message, then set TX thp to it */
425 /* find next unprocessed message, then set TX thp to it */ 399 musycc_update_tx_thp(ch);
426 musycc_update_tx_thp (ch);
427 400
428#if 0 401#if 0
429 spin_lock_irqsave (&ch->ch_txlock, flags); 402 spin_lock_irqsave(&ch->ch_txlock, flags);
430#endif 403#endif
431 md = ch->txd_irq_srv; 404 md = ch->txd_irq_srv;
432 if (!md) 405 if (!md) {
433 {
434#ifdef RLD_TRANS_DEBUG 406#ifdef RLD_TRANS_DEBUG
435 pr_info("-- musycc_wq_chan_restart[%d]: WARNING, starting NULL md\n", ch->channum); 407 pr_info("-- musycc_wq_chan_restart[%d]: WARNING, starting NULL md\n", ch->channum);
436#endif 408#endif
437#if 0 409#if 0
438 spin_unlock_irqrestore (&ch->ch_txlock, flags); 410 spin_unlock_irqrestore(&ch->ch_txlock, flags);
439#endif 411#endif
440 } else if (md->data && ((le32_to_cpu (md->status)) & MUSYCC_TX_OWNED)) 412 } else if (md->data && ((le32_to_cpu(md->status)) & MUSYCC_TX_OWNED)) {
441 { 413 ch->ch_start_tx = 0;
442 ch->ch_start_tx = 0;
443#if 0 414#if 0
444 spin_unlock_irqrestore (&ch->ch_txlock, flags); /* allow interrupts for service request */ 415 spin_unlock_irqrestore(&ch->ch_txlock, flags); /* allow interrupts for service request */
445#endif 416#endif
446#ifdef RLD_TRANS_DEBUG 417#ifdef RLD_TRANS_DEBUG
447 pr_info("++ musycc_wq_chan_restart() CHAN TX ACTIVATE: chan %d txd_irq_srv %p = sts %x, txpkt %lu\n", 418 pr_info("++ musycc_wq_chan_restart() CHAN TX ACTIVATE: chan %d txd_irq_srv %p = sts %x, txpkt %lu\n",
448 ch->channum, ch->txd_irq_srv, ch->txd_irq_srv->status, ch->s.tx_packets); 419 ch->channum, ch->txd_irq_srv, ch->txd_irq_srv->status, ch->s.tx_packets);
449#endif 420#endif
450 musycc_serv_req (pi, SR_CHANNEL_ACTIVATE | SR_TX_DIRECTION | ch->gchan); 421 musycc_serv_req(pi, SR_CHANNEL_ACTIVATE | SR_TX_DIRECTION | ch->gchan);
451 } 422 }
452#ifdef RLD_RESTART_DEBUG 423#ifdef RLD_RESTART_DEBUG
453 else 424 else {
454 { 425 /* retain request to start until retried and we have data to xmit */
455 /* retain request to start until retried and we have data to xmit */ 426 pr_info("-- musycc_wq_chan_restart[%d]: DELAYED due to md %p sts %x data %x, start_tx %x\n",
456 pr_info("-- musycc_wq_chan_restart[%d]: DELAYED due to md %p sts %x data %x, start_tx %x\n", 427 ch->channum, md,
457 ch->channum, md, 428 le32_to_cpu(md->status),
458 le32_to_cpu (md->status), 429 le32_to_cpu(md->data), ch->ch_start_tx);
459 le32_to_cpu (md->data), ch->ch_start_tx); 430 musycc_dump_txbuffer_ring(ch, 0);
460 musycc_dump_txbuffer_ring (ch, 0);
461#if 0 431#if 0
462 spin_unlock_irqrestore (&ch->ch_txlock, flags); /* allow interrupts for service request */ 432 spin_unlock_irqrestore(&ch->ch_txlock, flags); /* allow interrupts for service request */
463#endif 433#endif
464 } 434 }
465#endif 435#endif
466 } 436 }
467} 437}
@@ -473,41 +443,41 @@ musycc_wq_chan_restart (void *arg) /* channel private structure */
473 */ 443 */
474 444
475void 445void
476musycc_chan_restart (mch_t * ch) 446musycc_chan_restart(mch_t * ch)
477{ 447{
478#ifdef RLD_RESTART_DEBUG 448#ifdef RLD_RESTART_DEBUG
479 pr_info("++ musycc_chan_restart[%d]: txd_irq_srv @ %p = sts %x\n", 449 pr_info("++ musycc_chan_restart[%d]: txd_irq_srv @ %p = sts %x\n",
480 ch->channum, ch->txd_irq_srv, ch->txd_irq_srv->status); 450 ch->channum, ch->txd_irq_srv, ch->txd_irq_srv->status);
481#endif 451#endif
482 452
483 /* 2.6 - find next unprocessed message, then set TX thp to it */ 453 /* 2.6 - find next unprocessed message, then set TX thp to it */
484#ifdef RLD_RESTART_DEBUG 454#ifdef RLD_RESTART_DEBUG
485 pr_info(">> musycc_chan_restart: scheduling Chan %x workQ @ %p\n", ch->channum, &ch->ch_work); 455 pr_info(">> musycc_chan_restart: scheduling Chan %x workQ @ %p\n", ch->channum, &ch->ch_work);
486#endif 456#endif
487 c4_wk_chan_restart (ch); /* work queue mechanism fires off: Ref: 457 c4_wk_chan_restart(ch); /* work queue mechanism fires off: Ref:
488 * musycc_wq_chan_restart () */ 458 * musycc_wq_chan_restart () */
489 459
490} 460}
491 461
492 462
493void 463void
494rld_put_led (mpi_t * pi, u_int32_t ledval) 464rld_put_led(mpi_t * pi, u_int32_t ledval)
495{ 465{
496 static u_int32_t led = 0; 466 static u_int32_t led = 0;
497 467
498 if (ledval == 0) 468 if (ledval == 0)
499 led = 0; 469 led = 0;
500 else 470 else
501 led |= ledval; 471 led |= ledval;
502 472
503 pci_write_32 ((u_int32_t *) &pi->up->cpldbase->leds, led); /* RLD DEBUG TRANHANG */ 473 pci_write_32((u_int32_t *) &pi->up->cpldbase->leds, led); /* RLD DEBUG TRANHANG */
504} 474}
505 475
506 476
507#define MUSYCC_SR_RETRY_CNT 9 477#define MUSYCC_SR_RETRY_CNT 9
508 478
509void 479void
510musycc_serv_req (mpi_t * pi, u_int32_t req) 480musycc_serv_req(mpi_t * pi, u_int32_t req)
511{ 481{
512 volatile u_int32_t r; 482 volatile u_int32_t r;
513 int rcnt; 483 int rcnt;
@@ -520,49 +490,46 @@ musycc_serv_req (mpi_t * pi, u_int32_t req)
520 * acknowledged." 490 * acknowledged."
521 */ 491 */
522 492
523 SD_SEM_TAKE (&pi->sr_sem_busy, "serv"); /* only 1 thru here, per 493 SD_SEM_TAKE(&pi->sr_sem_busy, "serv"); /* only 1 thru here, per
524 * group */ 494 * group */
525 495
526 if (pi->sr_last == req) 496 if (pi->sr_last == req) {
527 {
528#ifdef RLD_TRANS_DEBUG 497#ifdef RLD_TRANS_DEBUG
529 pr_info(">> same SR, Port %d Req %x\n", pi->portnum, req); 498 pr_info(">> same SR, Port %d Req %x\n", pi->portnum, req);
530#endif 499#endif
531 500
532 /* 501 /*
533 * The most likely repeated request is the channel activation command 502 * The most likely repeated request is the channel activation command
534 * which follows the occurrence of a Transparent mode TX ONR or a 503 * which follows the occurrence of a Transparent mode TX ONR or a
535 * BUFF error. If the previous command was a CHANNEL ACTIVATE, 504 * BUFF error. If the previous command was a CHANNEL ACTIVATE,
536 * precede it with a NOOP command in order maintain coherent control 505 * precede it with a NOOP command in order maintain coherent control
537 * of this current (re)ACTIVATE. 506 * of this current (re)ACTIVATE.
538 */ 507 */
539 508
540 r = (pi->sr_last & ~SR_GCHANNEL_MASK); 509 r = (pi->sr_last & ~SR_GCHANNEL_MASK);
541 if ((r == (SR_CHANNEL_ACTIVATE | SR_TX_DIRECTION)) || 510 if ((r == (SR_CHANNEL_ACTIVATE | SR_TX_DIRECTION)) ||
542 (r == (SR_CHANNEL_ACTIVATE | SR_RX_DIRECTION))) 511 (r == (SR_CHANNEL_ACTIVATE | SR_RX_DIRECTION))) {
543 {
544#ifdef RLD_TRANS_DEBUG 512#ifdef RLD_TRANS_DEBUG
545 pr_info(">> same CHAN ACT SR, Port %d Req %x => issue SR_NOOP CMD\n", pi->portnum, req); 513 pr_info(">> same CHAN ACT SR, Port %d Req %x => issue SR_NOOP CMD\n", pi->portnum, req);
546#endif 514#endif
547 SD_SEM_GIVE (&pi->sr_sem_busy); /* allow this next request */ 515 SD_SEM_GIVE(&pi->sr_sem_busy); /* allow this next request */
548 musycc_serv_req (pi, SR_NOOP); 516 musycc_serv_req(pi, SR_NOOP);
549 SD_SEM_TAKE (&pi->sr_sem_busy, "serv"); /* relock & continue w/ 517 SD_SEM_TAKE(&pi->sr_sem_busy, "serv"); /* relock & continue w/
550 * original req */ 518 * original req */
551 } else if (req == SR_NOOP) 519 } else if (req == SR_NOOP) {
552 { 520 /* no need to issue back-to-back SR_NOOP commands at this time */
553 /* no need to issue back-to-back SR_NOOP commands at this time */
554#ifdef RLD_TRANS_DEBUG 521#ifdef RLD_TRANS_DEBUG
555 pr_info(">> same Port SR_NOOP skipped, Port %d\n", pi->portnum); 522 pr_info(">> same Port SR_NOOP skipped, Port %d\n", pi->portnum);
556#endif 523#endif
557 SD_SEM_GIVE (&pi->sr_sem_busy); /* allow this next request */ 524 SD_SEM_GIVE(&pi->sr_sem_busy); /* allow this next request */
558 return; 525 return;
559 } 526 }
560 } 527 }
561 rcnt = 0; 528 rcnt = 0;
562 pi->sr_last = req; 529 pi->sr_last = req;
563rewrite: 530rewrite:
564 pci_write_32 ((u_int32_t *) &pi->reg->srd, req); 531 pci_write_32((u_int32_t *) &pi->reg->srd, req);
565 FLUSH_MEM_WRITE (); 532 FLUSH_MEM_WRITE();
566 533
567 /* 534 /*
568 * Per MUSYCC Manual, Section 6.1,2 - "When writing an SCR service 535 * Per MUSYCC Manual, Section 6.1,2 - "When writing an SCR service
@@ -572,120 +539,108 @@ rewrite:
572 * the host follow any SCR write with another operation which reads from 539 * the host follow any SCR write with another operation which reads from
573 * the same address." 540 * the same address."
574 */ 541 */
575 r = pci_read_32 ((u_int32_t *) &pi->reg->srd); /* adhere to write 542 r = pci_read_32((u_int32_t *) &pi->reg->srd); /* adhere to write
576 * timing imposition */ 543 * timing imposition */
577 544
578 545
579 if ((r != req) && (req != SR_CHIP_RESET) && (++rcnt <= MUSYCC_SR_RETRY_CNT)) 546 if ((r != req) && (req != SR_CHIP_RESET) && (++rcnt <= MUSYCC_SR_RETRY_CNT)) {
580 { 547 if (cxt1e1_log_level >= LOG_MONITOR)
581 if (cxt1e1_log_level >= LOG_MONITOR) 548 pr_info("%s: %d - reissue srv req/last %x/%x (hdw reads %x), Chan %d.\n",
582 pr_info("%s: %d - reissue srv req/last %x/%x (hdw reads %x), Chan %d.\n", 549 pi->up->devname, rcnt, req, pi->sr_last, r,
583 pi->up->devname, rcnt, req, pi->sr_last, r, 550 (pi->portnum * MUSYCC_NCHANS) + (req & 0x1f));
584 (pi->portnum * MUSYCC_NCHANS) + (req & 0x1f)); 551 OS_uwait_dummy(); /* this delay helps reduce reissue counts
585 OS_uwait_dummy (); /* this delay helps reduce reissue counts 552 * (reason not yet researched) */
586 * (reason not yet researched) */ 553 goto rewrite;
587 goto rewrite;
588 } 554 }
589 if (rcnt > MUSYCC_SR_RETRY_CNT) 555 if (rcnt > MUSYCC_SR_RETRY_CNT) {
590 { 556 pr_warning("%s: failed service request (#%d)= %x, group %d.\n",
591 pr_warning("%s: failed service request (#%d)= %x, group %d.\n", 557 pi->up->devname, MUSYCC_SR_RETRY_CNT, req, pi->portnum);
592 pi->up->devname, MUSYCC_SR_RETRY_CNT, req, pi->portnum); 558 SD_SEM_GIVE(&pi->sr_sem_busy); /* allow any next request */
593 SD_SEM_GIVE (&pi->sr_sem_busy); /* allow any next request */ 559 return;
594 return;
595 } 560 }
596 if (req == SR_CHIP_RESET) 561 if (req == SR_CHIP_RESET) {
597 { 562 /*
598 /* 563 * PORT NOTE: the CHIP_RESET command is NOT ack'd by the MUSYCC, thus
599 * PORT NOTE: the CHIP_RESET command is NOT ack'd by the MUSYCC, thus 564 * the upcoming delay is used. Though the MUSYCC documentation
600 * the upcoming delay is used. Though the MUSYCC documentation 565 * suggests a read-after-write would supply the required delay, it's
601 * suggests a read-after-write would supply the required delay, it's 566 * unclear what CPU/BUS clock speeds might have been assumed when
602 * unclear what CPU/BUS clock speeds might have been assumed when 567 * suggesting this 'lack of ACK' workaround. Thus the use of uwait.
603 * suggesting this 'lack of ACK' workaround. Thus the use of uwait. 568 */
604 */ 569 OS_uwait(100000, "icard"); /* 100ms */
605 OS_uwait (100000, "icard"); /* 100ms */ 570 } else {
606 } else 571 FLUSH_MEM_READ();
607 { 572 SD_SEM_TAKE(&pi->sr_sem_wait, "sakack"); /* sleep until SACK
608 FLUSH_MEM_READ (); 573 * interrupt occurs */
609 SD_SEM_TAKE (&pi->sr_sem_wait, "sakack"); /* sleep until SACK
610 * interrupt occurs */
611 } 574 }
612 SD_SEM_GIVE (&pi->sr_sem_busy); /* allow any next request */ 575 SD_SEM_GIVE(&pi->sr_sem_busy); /* allow any next request */
613} 576}
614 577
615 578
616#ifdef SBE_PMCC4_ENABLE 579#ifdef SBE_PMCC4_ENABLE
617void 580void
618musycc_update_timeslots (mpi_t * pi) 581musycc_update_timeslots(mpi_t * pi)
619{ 582{
620 int i, ch; 583 int i, ch;
621 char e1mode = IS_FRAME_ANY_E1 (pi->p.port_mode); 584 char e1mode = IS_FRAME_ANY_E1(pi->p.port_mode);
622 585
623 for (i = 0; i < 32; i++) 586 for (i = 0; i < 32; i++) {
624 { 587 int usedby = 0, last = 0, ts, j, bits[8];
625 int usedby = 0, last = 0, ts, j, bits[8]; 588
626 589 u_int8_t lastval = 0;
627 u_int8_t lastval = 0; 590
628 591 if (((i == 0) && e1mode) || /* disable if E1 mode */
629 if (((i == 0) && e1mode) || /* disable if E1 mode */ 592 ((i == 16) && ((pi->p.port_mode == CFG_FRAME_E1CRC_CAS) || (pi->p.port_mode == CFG_FRAME_E1CRC_CAS_AMI)))
630 ((i == 16) && ((pi->p.port_mode == CFG_FRAME_E1CRC_CAS) || (pi->p.port_mode == CFG_FRAME_E1CRC_CAS_AMI))) 593 || ((i > 23) && (!e1mode))) /* disable if T1 mode */
631 || ((i > 23) && (!e1mode))) /* disable if T1 mode */ 594 pi->tsm[i] = 0xff; /* make tslot unavailable for this mode */
632 { 595 else
633 pi->tsm[i] = 0xff; /* make tslot unavailable for this mode */ 596 pi->tsm[i] = 0x00; /* make tslot available for assignment */
634 } else 597 for (j = 0; j < 8; j++)
635 { 598 bits[j] = -1;
636 pi->tsm[i] = 0x00; /* make tslot available for assignment */ 599 for (ch = 0; ch < MUSYCC_NCHANS; ch++) {
637 } 600 if ((pi->chan[ch]->state == UP) && (pi->chan[ch]->p.bitmask[i])) {
638 for (j = 0; j < 8; j++) 601 usedby++;
639 bits[j] = -1; 602 last = ch;
640 for (ch = 0; ch < MUSYCC_NCHANS; ch++) 603 lastval = pi->chan[ch]->p.bitmask[i];
641 { 604 for (j = 0; j < 8; j++)
642 if ((pi->chan[ch]->state == UP) && (pi->chan[ch]->p.bitmask[i])) 605 if (lastval & (1 << j))
643 { 606 bits[j] = ch;
644 usedby++; 607 pi->tsm[i] |= lastval;
645 last = ch; 608 }
646 lastval = pi->chan[ch]->p.bitmask[i]; 609 }
647 for (j = 0; j < 8; j++) 610 if (!usedby)
648 if (lastval & (1 << j)) 611 ts = 0;
649 bits[j] = ch; 612 else if ((usedby == 1) && (lastval == 0xff))
650 pi->tsm[i] |= lastval; 613 ts = (4 << 5) | last;
651 } 614 else if ((usedby == 1) && (lastval == 0x7f))
652 } 615 ts = (5 << 5) | last;
653 if (!usedby) 616 else {
654 ts = 0; 617 int idx;
655 else if ((usedby == 1) && (lastval == 0xff)) 618
656 ts = (4 << 5) | last; 619 if (bits[0] < 0)
657 else if ((usedby == 1) && (lastval == 0x7f)) 620 ts = (6 << 5) | (idx = last);
658 ts = (5 << 5) | last; 621 else
659 else 622 ts = (7 << 5) | (idx = bits[0]);
660 { 623 for (j = 1; j < 8; j++) {
661 int idx; 624 pi->regram->rscm[idx * 8 + j] = (bits[j] < 0) ? 0 : (0x80 | bits[j]);
662 625 pi->regram->tscm[idx * 8 + j] = (bits[j] < 0) ? 0 : (0x80 | bits[j]);
663 if (bits[0] < 0) 626 }
664 ts = (6 << 5) | (idx = last); 627 }
665 else 628 pi->regram->rtsm[i] = ts;
666 ts = (7 << 5) | (idx = bits[0]); 629 pi->regram->ttsm[i] = ts;
667 for (j = 1; j < 8; j++)
668 {
669 pi->regram->rscm[idx * 8 + j] = (bits[j] < 0) ? 0 : (0x80 | bits[j]);
670 pi->regram->tscm[idx * 8 + j] = (bits[j] < 0) ? 0 : (0x80 | bits[j]);
671 }
672 }
673 pi->regram->rtsm[i] = ts;
674 pi->regram->ttsm[i] = ts;
675 } 630 }
676 FLUSH_MEM_WRITE (); 631 FLUSH_MEM_WRITE();
677 632
678 musycc_serv_req (pi, SR_TIMESLOT_MAP | SR_RX_DIRECTION); 633 musycc_serv_req(pi, SR_TIMESLOT_MAP | SR_RX_DIRECTION);
679 musycc_serv_req (pi, SR_TIMESLOT_MAP | SR_TX_DIRECTION); 634 musycc_serv_req(pi, SR_TIMESLOT_MAP | SR_TX_DIRECTION);
680 musycc_serv_req (pi, SR_SUBCHANNEL_MAP | SR_RX_DIRECTION); 635 musycc_serv_req(pi, SR_SUBCHANNEL_MAP | SR_RX_DIRECTION);
681 musycc_serv_req (pi, SR_SUBCHANNEL_MAP | SR_TX_DIRECTION); 636 musycc_serv_req(pi, SR_SUBCHANNEL_MAP | SR_TX_DIRECTION);
682} 637}
683#endif 638#endif
684 639
685 640
686#ifdef SBE_WAN256T3_ENABLE 641#ifdef SBE_WAN256T3_ENABLE
687void 642void
688musycc_update_timeslots (mpi_t * pi) 643musycc_update_timeslots(mpi_t * pi)
689{ 644{
690 mch_t *ch; 645 mch_t *ch;
691 646
@@ -699,21 +654,20 @@ musycc_update_timeslots (mpi_t * pi)
699#ifdef SBE_WAN256T3_ENABLE 654#ifdef SBE_WAN256T3_ENABLE
700 hmask = (0x1f << hyperdummy) & 0x1f; 655 hmask = (0x1f << hyperdummy) & 0x1f;
701#endif 656#endif
702 for (i = 0; i < 128; i++) 657 for (i = 0; i < 128; i++) {
703 { 658 gchan = ((pi->portnum * MUSYCC_NCHANS) + (i & hmask)) % MUSYCC_NCHANS;
704 gchan = ((pi->portnum * MUSYCC_NCHANS) + (i & hmask)) % MUSYCC_NCHANS; 659 ch = pi->chan[gchan];
705 ch = pi->chan[gchan]; 660 if (ch->p.mode_56k)
706 if (ch->p.mode_56k) 661 tsen = MODE_56KBPS;
707 tsen = MODE_56KBPS; 662 else
708 else 663 tsen = MODE_64KBPS; /* also the default */
709 tsen = MODE_64KBPS; /* also the default */ 664 ts = ((pi->portnum % 4) == (i / 32)) ? (tsen << 5) | (i & hmask) : 0;
710 ts = ((pi->portnum % 4) == (i / 32)) ? (tsen << 5) | (i & hmask) : 0; 665 pi->regram->rtsm[i] = ts;
711 pi->regram->rtsm[i] = ts; 666 pi->regram->ttsm[i] = ts;
712 pi->regram->ttsm[i] = ts;
713 } 667 }
714 FLUSH_MEM_WRITE (); 668 FLUSH_MEM_WRITE();
715 musycc_serv_req (pi, SR_TIMESLOT_MAP | SR_RX_DIRECTION); 669 musycc_serv_req(pi, SR_TIMESLOT_MAP | SR_RX_DIRECTION);
716 musycc_serv_req (pi, SR_TIMESLOT_MAP | SR_TX_DIRECTION); 670 musycc_serv_req(pi, SR_TIMESLOT_MAP | SR_TX_DIRECTION);
717} 671}
718#endif 672#endif
719 673
@@ -723,26 +677,25 @@ musycc_update_timeslots (mpi_t * pi)
723 * into a hardware specific register value (IE. MUSYCC CCD Register). 677 * into a hardware specific register value (IE. MUSYCC CCD Register).
724 */ 678 */
725u_int32_t 679u_int32_t
726musycc_chan_proto (int proto) 680musycc_chan_proto(int proto)
727{ 681{
728 int reg; 682 int reg;
729 683
730 switch (proto) 684 switch (proto) {
731 {
732 case CFG_CH_PROTO_TRANS: /* 0 */ 685 case CFG_CH_PROTO_TRANS: /* 0 */
733 reg = MUSYCC_CCD_TRANS; 686 reg = MUSYCC_CCD_TRANS;
734 break; 687 break;
735 case CFG_CH_PROTO_SS7: /* 1 */ 688 case CFG_CH_PROTO_SS7: /* 1 */
736 reg = MUSYCC_CCD_SS7; 689 reg = MUSYCC_CCD_SS7;
737 break; 690 break;
738 default: 691 default:
739 case CFG_CH_PROTO_ISLP_MODE: /* 4 */ 692 case CFG_CH_PROTO_ISLP_MODE: /* 4 */
740 case CFG_CH_PROTO_HDLC_FCS16: /* 2 */ 693 case CFG_CH_PROTO_HDLC_FCS16: /* 2 */
741 reg = MUSYCC_CCD_HDLC_FCS16; 694 reg = MUSYCC_CCD_HDLC_FCS16;
742 break; 695 break;
743 case CFG_CH_PROTO_HDLC_FCS32: /* 3 */ 696 case CFG_CH_PROTO_HDLC_FCS32: /* 3 */
744 reg = MUSYCC_CCD_HDLC_FCS32; 697 reg = MUSYCC_CCD_HDLC_FCS32;
745 break; 698 break;
746 } 699 }
747 700
748 return reg; 701 return reg;
@@ -750,46 +703,46 @@ musycc_chan_proto (int proto)
750 703
751#ifdef SBE_WAN256T3_ENABLE 704#ifdef SBE_WAN256T3_ENABLE
752STATIC void __init 705STATIC void __init
753musycc_init_port (mpi_t * pi) 706musycc_init_port(mpi_t * pi)
754{ 707{
755 pci_write_32 ((u_int32_t *) &pi->reg->gbp, OS_vtophys (pi->regram)); 708 pci_write_32((u_int32_t *) &pi->reg->gbp, OS_vtophys(pi->regram));
756 709
757 pi->regram->grcd = 710 pi->regram->grcd =
758 __constant_cpu_to_le32 (MUSYCC_GRCD_RX_ENABLE | 711 __constant_cpu_to_le32(MUSYCC_GRCD_RX_ENABLE |
759 MUSYCC_GRCD_TX_ENABLE | 712 MUSYCC_GRCD_TX_ENABLE |
760 MUSYCC_GRCD_SF_ALIGN | 713 MUSYCC_GRCD_SF_ALIGN |
761 MUSYCC_GRCD_SUBCHAN_DISABLE | 714 MUSYCC_GRCD_SUBCHAN_DISABLE |
762 MUSYCC_GRCD_OOFMP_DISABLE | 715 MUSYCC_GRCD_OOFMP_DISABLE |
763 MUSYCC_GRCD_COFAIRQ_DISABLE | 716 MUSYCC_GRCD_COFAIRQ_DISABLE |
764 MUSYCC_GRCD_MC_ENABLE | 717 MUSYCC_GRCD_MC_ENABLE |
765 (MUSYCC_GRCD_POLLTH_32 << MUSYCC_GRCD_POLLTH_SHIFT)); 718 (MUSYCC_GRCD_POLLTH_32 << MUSYCC_GRCD_POLLTH_SHIFT));
766 719
767 pi->regram->pcd = 720 pi->regram->pcd =
768 __constant_cpu_to_le32 (MUSYCC_PCD_E1X4_MODE | 721 __constant_cpu_to_le32(MUSYCC_PCD_E1X4_MODE |
769 MUSYCC_PCD_TXDATA_RISING | 722 MUSYCC_PCD_TXDATA_RISING |
770 MUSYCC_PCD_TX_DRIVEN); 723 MUSYCC_PCD_TX_DRIVEN);
771 724
772 /* Message length descriptor */ 725 /* Message length descriptor */
773 pi->regram->mld = __constant_cpu_to_le32 (cxt1e1_max_mru | (cxt1e1_max_mru << 16)); 726 pi->regram->mld = __constant_cpu_to_le32(cxt1e1_max_mru | (cxt1e1_max_mru << 16));
774 FLUSH_MEM_WRITE (); 727 FLUSH_MEM_WRITE();
775 728
776 musycc_serv_req (pi, SR_GROUP_INIT | SR_RX_DIRECTION); 729 musycc_serv_req(pi, SR_GROUP_INIT | SR_RX_DIRECTION);
777 musycc_serv_req (pi, SR_GROUP_INIT | SR_TX_DIRECTION); 730 musycc_serv_req(pi, SR_GROUP_INIT | SR_TX_DIRECTION);
778 731
779 musycc_init_mdt (pi); 732 musycc_init_mdt(pi);
780 733
781 musycc_update_timeslots (pi); 734 musycc_update_timeslots(pi);
782} 735}
783#endif 736#endif
784 737
785 738
786status_t __init 739status_t __init
787musycc_init (ci_t * ci) 740musycc_init(ci_t * ci)
788{ 741{
789 char *regaddr; /* temp for address boundary calculations */ 742 char *regaddr; /* temp for address boundary calculations */
790 int i, gchan; 743 int i, gchan;
791 744
792 OS_sem_init (&ci->sem_wdbusy, SEM_AVAILABLE); /* watchdog exclusion */ 745 OS_sem_init(&ci->sem_wdbusy, SEM_AVAILABLE); /* watchdog exclusion */
793 746
794 /* 747 /*
795 * Per MUSYCC manual, Section 6.3.4 - "The host must allocate a dword 748 * Per MUSYCC manual, Section 6.3.4 - "The host must allocate a dword
@@ -798,87 +751,80 @@ musycc_init (ci_t * ci)
798 751
799#define INT_QUEUE_BOUNDARY 4 752#define INT_QUEUE_BOUNDARY 4
800 753
801 regaddr = OS_kmalloc ((INT_QUEUE_SIZE + 1) * sizeof (u_int32_t)); 754 regaddr = OS_kmalloc((INT_QUEUE_SIZE + 1) * sizeof(u_int32_t));
802 if (regaddr == 0) 755 if (regaddr == 0)
803 return ENOMEM; 756 return ENOMEM;
804 ci->iqd_p_saved = regaddr; /* save orig value for free's usage */ 757 ci->iqd_p_saved = regaddr; /* save orig value for free's usage */
805 ci->iqd_p = (u_int32_t *) ((unsigned long) (regaddr + INT_QUEUE_BOUNDARY - 1) & 758 ci->iqd_p = (u_int32_t *) ((unsigned long) (regaddr + INT_QUEUE_BOUNDARY - 1) &
806 (~(INT_QUEUE_BOUNDARY - 1))); /* this calculates 759 (~(INT_QUEUE_BOUNDARY - 1))); /* this calculates
807 * closest boundary */ 760 * closest boundary */
808 761
809 for (i = 0; i < INT_QUEUE_SIZE; i++) 762 for (i = 0; i < INT_QUEUE_SIZE; i++)
810 { 763 ci->iqd_p[i] = __constant_cpu_to_le32(INT_EMPTY_ENTRY);
811 ci->iqd_p[i] = __constant_cpu_to_le32 (INT_EMPTY_ENTRY);
812 }
813 764
814 for (i = 0; i < ci->max_port; i++) 765 for (i = 0; i < ci->max_port; i++) {
815 { 766 mpi_t *pi = &ci->port[i];
816 mpi_t *pi = &ci->port[i];
817 767
818 /* 768 /*
819 * Per MUSYCC manual, Section 6.3.2 - "The host must allocate a 2KB 769 * Per MUSYCC manual, Section 6.3.2 - "The host must allocate a 2KB
820 * bound memory segment for Channel Group 0." 770 * bound memory segment for Channel Group 0."
821 */ 771 */
822 772
823#define GROUP_BOUNDARY 0x800 773#define GROUP_BOUNDARY 0x800
824 774
825 regaddr = OS_kmalloc (sizeof (struct musycc_groupr) + GROUP_BOUNDARY); 775 regaddr = OS_kmalloc(sizeof(struct musycc_groupr) + GROUP_BOUNDARY);
826 if (regaddr == 0) 776 if (regaddr == 0) {
827 { 777 for (gchan = 0; gchan < i; gchan++) {
828 for (gchan = 0; gchan < i; gchan++) 778 pi = &ci->port[gchan];
829 { 779 OS_kfree(pi->reg);
830 pi = &ci->port[gchan]; 780 pi->reg = 0;
831 OS_kfree (pi->reg); 781 }
832 pi->reg = 0; 782 return ENOMEM;
833 } 783 }
834 return ENOMEM; 784 pi->regram_saved = regaddr; /* save orig value for free's usage */
835 } 785 pi->regram = (struct musycc_groupr *) ((unsigned long) (regaddr + GROUP_BOUNDARY - 1) &
836 pi->regram_saved = regaddr; /* save orig value for free's usage */ 786 (~(GROUP_BOUNDARY - 1))); /* this calculates
837 pi->regram = (struct musycc_groupr *) ((unsigned long) (regaddr + GROUP_BOUNDARY - 1) & 787 * closest boundary */
838 (~(GROUP_BOUNDARY - 1))); /* this calculates
839 * closest boundary */
840 } 788 }
841 789
842 /* any board centric MUSYCC commands will use group ZERO as its "home" */ 790 /* any board centric MUSYCC commands will use group ZERO as its "home" */
843 ci->regram = ci->port[0].regram; 791 ci->regram = ci->port[0].regram;
844 musycc_serv_req (&ci->port[0], SR_CHIP_RESET); 792 musycc_serv_req(&ci->port[0], SR_CHIP_RESET);
845 793
846 pci_write_32 ((u_int32_t *) &ci->reg->gbp, OS_vtophys (ci->regram)); 794 pci_write_32((u_int32_t *) &ci->reg->gbp, OS_vtophys(ci->regram));
847 pci_flush_write (ci); 795 pci_flush_write(ci);
848#ifdef CONFIG_SBE_PMCC4_NCOMM 796#ifdef CONFIG_SBE_PMCC4_NCOMM
849 ci->regram->__glcd = __constant_cpu_to_le32 (GCD_MAGIC); 797 ci->regram->__glcd = __constant_cpu_to_le32(GCD_MAGIC);
850#else 798#else
851 /* standard driver POLLS for INTB via CPLD register */ 799 /* standard driver POLLS for INTB via CPLD register */
852 ci->regram->__glcd = __constant_cpu_to_le32 (GCD_MAGIC | MUSYCC_GCD_INTB_DISABLE); 800 ci->regram->__glcd = __constant_cpu_to_le32(GCD_MAGIC | MUSYCC_GCD_INTB_DISABLE);
853#endif 801#endif
854 802
855 ci->regram->__iqp = cpu_to_le32 (OS_vtophys (&ci->iqd_p[0])); 803 ci->regram->__iqp = cpu_to_le32(OS_vtophys(&ci->iqd_p[0]));
856 ci->regram->__iql = __constant_cpu_to_le32 (INT_QUEUE_SIZE - 1); 804 ci->regram->__iql = __constant_cpu_to_le32(INT_QUEUE_SIZE - 1);
857 pci_write_32 ((u_int32_t *) &ci->reg->dacbp, 0); 805 pci_write_32((u_int32_t *) &ci->reg->dacbp, 0);
858 FLUSH_MEM_WRITE (); 806 FLUSH_MEM_WRITE();
859 807
860 ci->state = C_RUNNING; /* mark as full interrupt processing 808 ci->state = C_RUNNING; /* mark as full interrupt processing
861 * available */ 809 * available */
862 810
863 musycc_serv_req (&ci->port[0], SR_GLOBAL_INIT); /* FIRST INTERRUPT ! */ 811 musycc_serv_req(&ci->port[0], SR_GLOBAL_INIT); /* FIRST INTERRUPT ! */
864 812
865 /* sanity check settable parameters */ 813 /* sanity check settable parameters */
866 814
867 if (cxt1e1_max_mru > 0xffe) 815 if (cxt1e1_max_mru > 0xffe) {
868 { 816 pr_warning("Maximum allowed MRU exceeded, resetting %d to %d.\n",
869 pr_warning("Maximum allowed MRU exceeded, resetting %d to %d.\n", 817 cxt1e1_max_mru, 0xffe);
870 cxt1e1_max_mru, 0xffe); 818 cxt1e1_max_mru = 0xffe;
871 cxt1e1_max_mru = 0xffe;
872 } 819 }
873 if (cxt1e1_max_mtu > 0xffe) 820 if (cxt1e1_max_mtu > 0xffe) {
874 { 821 pr_warning("Maximum allowed MTU exceeded, resetting %d to %d.\n",
875 pr_warning("Maximum allowed MTU exceeded, resetting %d to %d.\n", 822 cxt1e1_max_mtu, 0xffe);
876 cxt1e1_max_mtu, 0xffe); 823 cxt1e1_max_mtu = 0xffe;
877 cxt1e1_max_mtu = 0xffe;
878 } 824 }
879#ifdef SBE_WAN256T3_ENABLE 825#ifdef SBE_WAN256T3_ENABLE
880 for (i = 0; i < MUSYCC_NPORTS; i++) 826 for (i = 0; i < MUSYCC_NPORTS; i++)
881 musycc_init_port (&ci->port[i]); 827 musycc_init_port(&ci->port[i]);
882#endif 828#endif
883 829
884 return SBE_DRVR_SUCCESS; /* no error */ 830 return SBE_DRVR_SUCCESS; /* no error */
@@ -886,7 +832,7 @@ musycc_init (ci_t * ci)
886 832
887 833
888void 834void
889musycc_bh_tx_eom (mpi_t * pi, int gchan) 835musycc_bh_tx_eom(mpi_t * pi, int gchan)
890{ 836{
891 mch_t *ch; 837 mch_t *ch;
892 struct mdesc *md; 838 struct mdesc *md;
@@ -900,128 +846,117 @@ musycc_bh_tx_eom (mpi_t * pi, int gchan)
900 volatile u_int32_t status; 846 volatile u_int32_t status;
901 847
902 ch = pi->chan[gchan]; 848 ch = pi->chan[gchan];
903 if (ch == 0 || ch->state != UP) 849 if (ch == 0 || ch->state != UP) {
904 { 850 if (cxt1e1_log_level >= LOG_ERROR)
905 if (cxt1e1_log_level >= LOG_ERROR) 851 pr_info("%s: intr: xmit EOM on uninitialized channel %d\n",
906 pr_info("%s: intr: xmit EOM on uninitialized channel %d\n", 852 pi->up->devname, gchan);
907 pi->up->devname, gchan);
908 } 853 }
909 if (ch == 0 || ch->mdt == 0) 854 if (ch == 0 || ch->mdt == 0)
910 return; /* note: mdt==0 implies a malloc() 855 return; /* note: mdt==0 implies a malloc()
911 * failure w/in chan_up() routine */ 856 * failure w/in chan_up() routine */
912 857
913#if 0 858#if 0
914#ifdef SBE_ISR_INLINE 859#ifdef SBE_ISR_INLINE
915 spin_lock_irq (&ch->ch_txlock); 860 spin_lock_irq(&ch->ch_txlock);
916#else 861#else
917 spin_lock_irqsave (&ch->ch_txlock, flags); 862 spin_lock_irqsave(&ch->ch_txlock, flags);
918#endif 863#endif
919#endif 864#endif
920 do 865 do {
921 { 866 FLUSH_MEM_READ();
922 FLUSH_MEM_READ (); 867 md = ch->txd_irq_srv;
923 md = ch->txd_irq_srv; 868 status = le32_to_cpu(md->status);
924 status = le32_to_cpu (md->status); 869
925 870 /*
926 /* 871 * Note: Per MUSYCC Ref 6.4.9, the host does not poll a host-owned
927 * Note: Per MUSYCC Ref 6.4.9, the host does not poll a host-owned 872 * Transmit Buffer Descriptor during Transparent Mode.
928 * Transmit Buffer Descriptor during Transparent Mode. 873 */
929 */ 874 if (status & MUSYCC_TX_OWNED) {
930 if (status & MUSYCC_TX_OWNED) 875 int readCount, loopCount;
931 { 876
932 int readCount, loopCount; 877 /***********************************************************/
933 878 /* HW Bug Fix */
934 /***********************************************************/ 879 /* ---------- */
935 /* HW Bug Fix */ 880 /* Under certain PCI Bus loading conditions, the data */
936 /* ---------- */ 881 /* associated with an update of Shared Memory is delayed */
937 /* Under certain PCI Bus loading conditions, the data */ 882 /* relative to its PCI Interrupt. This is caught when */
938 /* associated with an update of Shared Memory is delayed */ 883 /* the host determines it does not yet OWN the descriptor. */
939 /* relative to its PCI Interrupt. This is caught when */ 884 /***********************************************************/
940 /* the host determines it does not yet OWN the descriptor. */ 885
941 /***********************************************************/ 886 readCount = 0;
942 887 while (status & MUSYCC_TX_OWNED) {
943 readCount = 0; 888 for (loopCount = 0; loopCount < 0x30; loopCount++)
944 while (status & MUSYCC_TX_OWNED) 889 OS_uwait_dummy(); /* use call to avoid optimization
945 { 890 * removal of dummy delay */
946 for (loopCount = 0; loopCount < 0x30; loopCount++) 891 FLUSH_MEM_READ();
947 OS_uwait_dummy (); /* use call to avoid optimization 892 status = le32_to_cpu(md->status);
948 * removal of dummy delay */ 893 if (readCount++ > 40)
949 FLUSH_MEM_READ (); 894 break; /* don't wait any longer */
950 status = le32_to_cpu (md->status); 895 }
951 if (readCount++ > 40) 896 if (status & MUSYCC_TX_OWNED) {
952 break; /* don't wait any longer */ 897 if (cxt1e1_log_level >= LOG_MONITOR) {
953 } 898 pr_info("%s: Port %d Chan %2d - unexpected TX msg ownership intr (md %p sts %x)\n",
954 if (status & MUSYCC_TX_OWNED) 899 pi->up->devname, pi->portnum, ch->channum,
955 { 900 md, status);
956 if (cxt1e1_log_level >= LOG_MONITOR) 901 pr_info("++ User 0x%p IRQ_SRV 0x%p USR_ADD 0x%p QStopped %x, start_tx %x tx_full %d txd_free %d mode %x\n",
957 { 902 ch->user, ch->txd_irq_srv, ch->txd_usr_add,
958 pr_info("%s: Port %d Chan %2d - unexpected TX msg ownership intr (md %p sts %x)\n", 903 sd_queue_stopped(ch->user),
959 pi->up->devname, pi->portnum, ch->channum, 904 ch->ch_start_tx, ch->tx_full, ch->txd_free, ch->p.chan_mode);
960 md, status); 905 musycc_dump_txbuffer_ring(ch, 0);
961 pr_info("++ User 0x%p IRQ_SRV 0x%p USR_ADD 0x%p QStopped %x, start_tx %x tx_full %d txd_free %d mode %x\n", 906 }
962 ch->user, ch->txd_irq_srv, ch->txd_usr_add, 907 break; /* Not our mdesc, done */
963 sd_queue_stopped (ch->user), 908 } else {
964 ch->ch_start_tx, ch->tx_full, ch->txd_free, ch->p.chan_mode); 909 if (cxt1e1_log_level >= LOG_MONITOR)
965 musycc_dump_txbuffer_ring (ch, 0); 910 pr_info("%s: Port %d Chan %2d - recovered TX msg ownership [%d] (md %p sts %x)\n",
966 } 911 pi->up->devname, pi->portnum, ch->channum, readCount, md, status);
967 break; /* Not our mdesc, done */ 912 }
968 } else 913 }
969 { 914 ch->txd_irq_srv = md->snext;
970 if (cxt1e1_log_level >= LOG_MONITOR) 915
971 pr_info("%s: Port %d Chan %2d - recovered TX msg ownership [%d] (md %p sts %x)\n", 916 md->data = 0;
972 pi->up->devname, pi->portnum, ch->channum, readCount, md, status); 917 if (md->mem_token != 0) {
973 } 918 /* upcount channel */
974 } 919 atomic_sub(OS_mem_token_tlen(md->mem_token), &ch->tx_pending);
975 ch->txd_irq_srv = md->snext; 920 /* upcount card */
976 921 atomic_sub(OS_mem_token_tlen(md->mem_token), &pi->up->tx_pending);
977 md->data = 0;
978 if (md->mem_token != 0)
979 {
980 /* upcount channel */
981 atomic_sub (OS_mem_token_tlen (md->mem_token), &ch->tx_pending);
982 /* upcount card */
983 atomic_sub (OS_mem_token_tlen (md->mem_token), &pi->up->tx_pending);
984#ifdef SBE_WAN256T3_ENABLE 922#ifdef SBE_WAN256T3_ENABLE
985 if (!atomic_read (&pi->up->tx_pending)) 923 if (!atomic_read(&pi->up->tx_pending))
986 wan256t3_led (pi->up, LED_TX, 0); 924 wan256t3_led(pi->up, LED_TX, 0);
987#endif 925#endif
988 926
989#ifdef CONFIG_SBE_WAN256T3_NCOMM 927#ifdef CONFIG_SBE_WAN256T3_NCOMM
990 /* callback that our packet was sent */ 928 /* callback that our packet was sent */
991 { 929 {
992 int hdlcnum = (pi->portnum * 32 + gchan); 930 int hdlcnum = (pi->portnum * 32 + gchan);
993 931
994 if (hdlcnum >= 228) 932 if (hdlcnum >= 228) {
995 { 933 if (nciProcess_TX_complete)
996 if (nciProcess_TX_complete) 934 (*nciProcess_TX_complete) (hdlcnum,
997 (*nciProcess_TX_complete) (hdlcnum, 935 getuserbychan(gchan));
998 getuserbychan (gchan)); 936 }
999 } 937 }
1000 }
1001#endif /*** CONFIG_SBE_WAN256T3_NCOMM ***/ 938#endif /*** CONFIG_SBE_WAN256T3_NCOMM ***/
1002 939
1003 OS_mem_token_free_irq (md->mem_token); 940 OS_mem_token_free_irq(md->mem_token);
1004 md->mem_token = 0; 941 md->mem_token = 0;
1005 } 942 }
1006 md->status = 0; 943 md->status = 0;
1007#ifdef RLD_TXFULL_DEBUG 944#ifdef RLD_TXFULL_DEBUG
1008 if (cxt1e1_log_level >= LOG_MONITOR2) 945 if (cxt1e1_log_level >= LOG_MONITOR2)
1009 pr_info("~~ tx_eom: tx_full %x txd_free %d -> %d\n", 946 pr_info("~~ tx_eom: tx_full %x txd_free %d -> %d\n",
1010 ch->tx_full, ch->txd_free, ch->txd_free + 1); 947 ch->tx_full, ch->txd_free, ch->txd_free + 1);
1011#endif 948#endif
1012 ++ch->txd_free; 949 ++ch->txd_free;
1013 FLUSH_MEM_WRITE (); 950 FLUSH_MEM_WRITE();
1014 951
1015 if ((ch->p.chan_mode != CFG_CH_PROTO_TRANS) && (status & EOBIRQ_ENABLE)) 952 if ((ch->p.chan_mode != CFG_CH_PROTO_TRANS) && (status & EOBIRQ_ENABLE)) {
1016 { 953 if (cxt1e1_log_level >= LOG_MONITOR)
1017 if (cxt1e1_log_level >= LOG_MONITOR) 954 pr_info("%s: Mode (%x) incorrect EOB status (%x)\n",
1018 pr_info("%s: Mode (%x) incorrect EOB status (%x)\n", 955 pi->up->devname, ch->p.chan_mode, status);
1019 pi->up->devname, ch->p.chan_mode, status); 956 if ((status & EOMIRQ_ENABLE) == 0)
1020 if ((status & EOMIRQ_ENABLE) == 0) 957 break;
1021 break; 958 }
1022 } 959 } while ((ch->p.chan_mode != CFG_CH_PROTO_TRANS) && ((status & EOMIRQ_ENABLE) == 0));
1023 }
1024 while ((ch->p.chan_mode != CFG_CH_PROTO_TRANS) && ((status & EOMIRQ_ENABLE) == 0));
1025 /* 960 /*
1026 * NOTE: (The above 'while' is coupled w/ previous 'do', way above.) Each 961 * NOTE: (The above 'while' is coupled w/ previous 'do', way above.) Each
1027 * Transparent data buffer has the EOB bit, and NOT the EOM bit, set and 962 * Transparent data buffer has the EOB bit, and NOT the EOM bit, set and
@@ -1029,56 +964,53 @@ musycc_bh_tx_eom (mpi_t * pi, int gchan)
1029 * buffer. 964 * buffer.
1030 */ 965 */
1031 966
1032 FLUSH_MEM_READ (); 967 FLUSH_MEM_READ();
1033 /* 968 /*
1034 * Smooth flow control hysterisis by maintaining task stoppage until half 969 * Smooth flow control hysterisis by maintaining task stoppage until half
1035 * the available write buffers are available. 970 * the available write buffers are available.
1036 */ 971 */
1037 if (ch->tx_full && (ch->txd_free >= (ch->txd_num / 2))) 972 if (ch->tx_full && (ch->txd_free >= (ch->txd_num / 2))) {
1038 { 973 /*
1039 /* 974 * Then, only releave task stoppage if we actually have enough
1040 * Then, only releave task stoppage if we actually have enough 975 * buffers to service the last requested packet. It may require MORE
1041 * buffers to service the last requested packet. It may require MORE 976 * than half the available!
1042 * than half the available! 977 */
1043 */ 978 if (ch->txd_free >= ch->txd_required) {
1044 if (ch->txd_free >= ch->txd_required)
1045 {
1046 979
1047#ifdef RLD_TXFULL_DEBUG 980#ifdef RLD_TXFULL_DEBUG
1048 if (cxt1e1_log_level >= LOG_MONITOR2) 981 if (cxt1e1_log_level >= LOG_MONITOR2)
1049 pr_info("tx_eom[%d]: enable xmit tx_full no more, txd_free %d txd_num/2 %d\n", 982 pr_info("tx_eom[%d]: enable xmit tx_full no more, txd_free %d txd_num/2 %d\n",
1050 ch->channum, 983 ch->channum,
1051 ch->txd_free, ch->txd_num / 2); 984 ch->txd_free, ch->txd_num / 2);
1052#endif 985#endif
1053 ch->tx_full = 0; 986 ch->tx_full = 0;
1054 ch->txd_required = 0; 987 ch->txd_required = 0;
1055 sd_enable_xmit (ch->user); /* re-enable to catch flow controlled 988 sd_enable_xmit(ch->user); /* re-enable to catch flow controlled
1056 * channel */ 989 * channel */
1057 } 990 }
1058 } 991 }
1059#ifdef RLD_TXFULL_DEBUG 992#ifdef RLD_TXFULL_DEBUG
1060 else if (ch->tx_full) 993 else if (ch->tx_full) {
1061 { 994 if (cxt1e1_log_level >= LOG_MONITOR2)
1062 if (cxt1e1_log_level >= LOG_MONITOR2) 995 pr_info("tx_eom[%d]: bypass TX enable though room available? (txd_free %d txd_num/2 %d)\n",
1063 pr_info("tx_eom[%d]: bypass TX enable though room available? (txd_free %d txd_num/2 %d)\n", 996 ch->channum,
1064 ch->channum, 997 ch->txd_free, ch->txd_num / 2);
1065 ch->txd_free, ch->txd_num / 2);
1066 } 998 }
1067#endif 999#endif
1068 1000
1069 FLUSH_MEM_WRITE (); 1001 FLUSH_MEM_WRITE();
1070#if 0 1002#if 0
1071#ifdef SBE_ISR_INLINE 1003#ifdef SBE_ISR_INLINE
1072 spin_unlock_irq (&ch->ch_txlock); 1004 spin_unlock_irq(&ch->ch_txlock);
1073#else 1005#else
1074 spin_unlock_irqrestore (&ch->ch_txlock, flags); 1006 spin_unlock_irqrestore(&ch->ch_txlock, flags);
1075#endif 1007#endif
1076#endif 1008#endif
1077} 1009}
1078 1010
1079 1011
1080STATIC void 1012STATIC void
1081musycc_bh_rx_eom (mpi_t * pi, int gchan) 1013musycc_bh_rx_eom(mpi_t * pi, int gchan)
1082{ 1014{
1083 mch_t *ch; 1015 mch_t *ch;
1084 void *m, *m2; 1016 void *m, *m2;
@@ -1087,89 +1019,76 @@ musycc_bh_rx_eom (mpi_t * pi, int gchan)
1087 u_int32_t error; 1019 u_int32_t error;
1088 1020
1089 ch = pi->chan[gchan]; 1021 ch = pi->chan[gchan];
1090 if (ch == 0 || ch->state != UP) 1022 if (ch == 0 || ch->state != UP) {
1091 { 1023 if (cxt1e1_log_level > LOG_ERROR)
1092 if (cxt1e1_log_level > LOG_ERROR) 1024 pr_info("%s: intr: receive EOM on uninitialized channel %d\n",
1093 pr_info("%s: intr: receive EOM on uninitialized channel %d\n", 1025 pi->up->devname, gchan);
1094 pi->up->devname, gchan); 1026 return;
1095 return;
1096 } 1027 }
1097 if (ch->mdr == 0) 1028 if (ch->mdr == 0)
1098 return; /* can this happen ? */ 1029 return; /* can this happen ? */
1099 1030
1100 for (;;) 1031 for (;;) {
1101 { 1032 FLUSH_MEM_READ();
1102 FLUSH_MEM_READ (); 1033 md = &ch->mdr[ch->rxix_irq_srv];
1103 md = &ch->mdr[ch->rxix_irq_srv]; 1034 status = le32_to_cpu(md->status);
1104 status = le32_to_cpu (md->status); 1035 if (!(status & HOST_RX_OWNED))
1105 if (!(status & HOST_RX_OWNED)) 1036 break; /* Not our mdesc, done */
1106 break; /* Not our mdesc, done */ 1037 m = md->mem_token;
1107 m = md->mem_token; 1038 error = (status >> 16) & 0xf;
1108 error = (status >> 16) & 0xf; 1039 if (error == 0) {
1109 if (error == 0)
1110 {
1111#ifdef CONFIG_SBE_WAN256T3_NCOMM 1040#ifdef CONFIG_SBE_WAN256T3_NCOMM
1112 int hdlcnum = (pi->portnum * 32 + gchan); 1041 int hdlcnum = (pi->portnum * 32 + gchan);
1113 1042
1114 /* 1043 /*
1115 * if the packet number belongs to NCOMM, then send it to the TMS 1044 * if the packet number belongs to NCOMM, then send it to the TMS
1116 * driver 1045 * driver
1117 */ 1046 */
1118 if (hdlcnum >= 228) 1047 if (hdlcnum >= 228) {
1119 { 1048 if (nciProcess_RX_packet)
1120 if (nciProcess_RX_packet) 1049 (*nciProcess_RX_packet) (hdlcnum, status & 0x3fff, m, ch->user);
1121 (*nciProcess_RX_packet) (hdlcnum, status & 0x3fff, m, ch->user); 1050 } else
1122 } else
1123#endif /*** CONFIG_SBE_WAN256T3_NCOMM ***/ 1051#endif /*** CONFIG_SBE_WAN256T3_NCOMM ***/
1124 1052
1125 { 1053 {
1126 if ((m2 = OS_mem_token_alloc (cxt1e1_max_mru))) 1054 if ((m2 = OS_mem_token_alloc(cxt1e1_max_mru))) {
1127 { 1055 /* substitute the mbuf+cluster */
1128 /* substitute the mbuf+cluster */ 1056 md->mem_token = m2;
1129 md->mem_token = m2; 1057 md->data = cpu_to_le32(OS_vtophys(OS_mem_token_data(m2)));
1130 md->data = cpu_to_le32 (OS_vtophys (OS_mem_token_data (m2))); 1058
1131 1059 /* pass the received mbuf upward */
1132 /* pass the received mbuf upward */ 1060 sd_recv_consume(m, status & LENGTH_MASK, ch->user);
1133 sd_recv_consume (m, status & LENGTH_MASK, ch->user); 1061 ch->s.rx_packets++;
1134 ch->s.rx_packets++; 1062 ch->s.rx_bytes += status & LENGTH_MASK;
1135 ch->s.rx_bytes += status & LENGTH_MASK; 1063 } else
1136 } else 1064 ch->s.rx_dropped++;
1137 { 1065 }
1138 ch->s.rx_dropped++; 1066 } else if (error == ERR_FCS)
1139 } 1067 ch->s.rx_crc_errors++;
1140 } 1068 else if (error == ERR_ALIGN)
1141 } else if (error == ERR_FCS) 1069 ch->s.rx_missed_errors++;
1142 { 1070 else if (error == ERR_ABT)
1143 ch->s.rx_crc_errors++; 1071 ch->s.rx_missed_errors++;
1144 } else if (error == ERR_ALIGN) 1072 else if (error == ERR_LNG)
1145 { 1073 ch->s.rx_length_errors++;
1146 ch->s.rx_missed_errors++; 1074 else if (error == ERR_SHT)
1147 } else if (error == ERR_ABT) 1075 ch->s.rx_length_errors++;
1148 { 1076 FLUSH_MEM_WRITE();
1149 ch->s.rx_missed_errors++; 1077 status = cxt1e1_max_mru;
1150 } else if (error == ERR_LNG) 1078 if (ch->p.chan_mode == CFG_CH_PROTO_TRANS)
1151 { 1079 status |= EOBIRQ_ENABLE;
1152 ch->s.rx_length_errors++; 1080 md->status = cpu_to_le32(status);
1153 } else if (error == ERR_SHT) 1081
1154 { 1082 /* Check next mdesc in the ring */
1155 ch->s.rx_length_errors++; 1083 if (++ch->rxix_irq_srv >= ch->rxd_num)
1156 } 1084 ch->rxix_irq_srv = 0;
1157 FLUSH_MEM_WRITE (); 1085 FLUSH_MEM_WRITE();
1158 status = cxt1e1_max_mru;
1159 if (ch->p.chan_mode == CFG_CH_PROTO_TRANS)
1160 status |= EOBIRQ_ENABLE;
1161 md->status = cpu_to_le32 (status);
1162
1163 /* Check next mdesc in the ring */
1164 if (++ch->rxix_irq_srv >= ch->rxd_num)
1165 ch->rxix_irq_srv = 0;
1166 FLUSH_MEM_WRITE ();
1167 } 1086 }
1168} 1087}
1169 1088
1170 1089
1171irqreturn_t 1090irqreturn_t
1172musycc_intr_th_handler (void *devp) 1091musycc_intr_th_handler(void *devp)
1173{ 1092{
1174 ci_t *ci = (ci_t *) devp; 1093 ci_t *ci = (ci_t *) devp;
1175 volatile u_int32_t status, currInt = 0; 1094 volatile u_int32_t status, currInt = 0;
@@ -1180,28 +1099,25 @@ musycc_intr_th_handler (void *devp)
1180 * might be shared, just return. 1099 * might be shared, just return.
1181 */ 1100 */
1182 if (ci->state == C_INIT) 1101 if (ci->state == C_INIT)
1183 { 1102 return IRQ_NONE;
1184 return IRQ_NONE;
1185 }
1186 /* 1103 /*
1187 * Marked as hardware available. Don't service interrupts, just clear the 1104 * Marked as hardware available. Don't service interrupts, just clear the
1188 * event. 1105 * event.
1189 */ 1106 */
1190 1107
1191 if (ci->state == C_IDLE) 1108 if (ci->state == C_IDLE) {
1192 { 1109 status = pci_read_32((u_int32_t *) &ci->reg->isd);
1193 status = pci_read_32 ((u_int32_t *) &ci->reg->isd);
1194 1110
1195 /* clear the interrupt but process nothing else */ 1111 /* clear the interrupt but process nothing else */
1196 pci_write_32 ((u_int32_t *) &ci->reg->isd, status); 1112 pci_write_32((u_int32_t *) &ci->reg->isd, status);
1197 return IRQ_HANDLED; 1113 return IRQ_HANDLED;
1198 } 1114 }
1199 FLUSH_PCI_READ (); 1115 FLUSH_PCI_READ();
1200 FLUSH_MEM_READ (); 1116 FLUSH_MEM_READ();
1201 1117
1202 status = pci_read_32 ((u_int32_t *) &ci->reg->isd); 1118 status = pci_read_32((u_int32_t *) &ci->reg->isd);
1203 nextInt = INTRPTS_NEXTINT (status); 1119 nextInt = INTRPTS_NEXTINT(status);
1204 intCnt = INTRPTS_INTCNT (status); 1120 intCnt = INTRPTS_INTCNT(status);
1205 ci->intlog.drvr_intr_thcount++; 1121 ci->intlog.drvr_intr_thcount++;
1206 1122
1207 /*********************************************************/ 1123 /*********************************************************/
@@ -1218,22 +1134,20 @@ musycc_intr_th_handler (void *devp)
1218 /* incorrect ISD's are encountered. */ 1134 /* incorrect ISD's are encountered. */
1219 /*********************************************************/ 1135 /*********************************************************/
1220 1136
1221 if (nextInt != INTRPTS_NEXTINT (ci->intlog.this_status_new)) 1137 if (nextInt != INTRPTS_NEXTINT(ci->intlog.this_status_new)) {
1222 { 1138 if (cxt1e1_log_level >= LOG_MONITOR) {
1223 if (cxt1e1_log_level >= LOG_MONITOR) 1139 pr_info("%s: note - updated ISD from %08x to %08x\n",
1224 { 1140 ci->devname, status,
1225 pr_info("%s: note - updated ISD from %08x to %08x\n", 1141 (status & (~INTRPTS_NEXTINT_M)) | ci->intlog.this_status_new);
1226 ci->devname, status, 1142 }
1227 (status & (~INTRPTS_NEXTINT_M)) | ci->intlog.this_status_new); 1143 /*
1228 } 1144 * Replace bogus status with software corrected value.
1229 /* 1145 *
1230 * Replace bogus status with software corrected value. 1146 * It's not known whether, during this problem occurrence, if the
1231 * 1147 * INTFULL bit is correctly reported or not.
1232 * It's not known whether, during this problem occurrence, if the 1148 */
1233 * INTFULL bit is correctly reported or not. 1149 status = (status & (~INTRPTS_NEXTINT_M)) | (ci->intlog.this_status_new);
1234 */ 1150 nextInt = INTRPTS_NEXTINT(status);
1235 status = (status & (~INTRPTS_NEXTINT_M)) | (ci->intlog.this_status_new);
1236 nextInt = INTRPTS_NEXTINT (status);
1237 } 1151 }
1238 /**********************************************/ 1152 /**********************************************/
1239 /* Cn847x Bug Fix */ 1153 /* Cn847x Bug Fix */
@@ -1243,43 +1157,40 @@ musycc_intr_th_handler (void *devp)
1243 /**********************************************/ 1157 /**********************************************/
1244 1158
1245 if (intCnt == INT_QUEUE_SIZE) 1159 if (intCnt == INT_QUEUE_SIZE)
1246 { 1160 currInt = ((intCnt - 1) + nextInt) & (INT_QUEUE_SIZE - 1);
1247 currInt = ((intCnt - 1) + nextInt) & (INT_QUEUE_SIZE - 1); 1161 else
1248 } else 1162 /************************************************/
1249 /************************************************/ 1163 /* Interrupt Write Location Issues */
1250 /* Interrupt Write Location Issues */ 1164 /* ------------------------------- */
1251 /* ------------------------------- */ 1165 /* When the interrupt status descriptor is */
1252 /* When the interrupt status descriptor is */ 1166 /* written, the interrupt line is de-asserted */
1253 /* written, the interrupt line is de-asserted */ 1167 /* by the Cn847x. In the case of MIPS */
1254 /* by the Cn847x. In the case of MIPS */ 1168 /* microprocessors, this must occur at the */
1255 /* microprocessors, this must occur at the */ 1169 /* beginning of the interrupt handler so that */
1256 /* beginning of the interrupt handler so that */ 1170 /* the interrupt handle is not re-entered due */
1257 /* the interrupt handle is not re-entered due */ 1171 /* to interrupt dis-assertion latency. */
1258 /* to interrupt dis-assertion latency. */ 1172 /* In the case of all other processors, this */
1259 /* In the case of all other processors, this */ 1173 /* action should occur at the end of the */
1260 /* action should occur at the end of the */ 1174 /* interrupt handler to avoid overwriting the */
1261 /* interrupt handler to avoid overwriting the */ 1175 /* interrupt queue. */
1262 /* interrupt queue. */ 1176 /************************************************/
1263 /************************************************/
1264 1177
1265 if (intCnt) 1178 if (intCnt)
1266 { 1179 currInt = (intCnt + nextInt) & (INT_QUEUE_SIZE - 1);
1267 currInt = (intCnt + nextInt) & (INT_QUEUE_SIZE - 1); 1180 else {
1268 } else 1181 /*
1269 { 1182 * NOTE: Servicing an interrupt whose ISD contains a count of ZERO
1270 /* 1183 * can be indicative of a Shared Interrupt chain. Our driver can be
1271 * NOTE: Servicing an interrupt whose ISD contains a count of ZERO 1184 * called from the system's interrupt handler as a matter of the OS
1272 * can be indicative of a Shared Interrupt chain. Our driver can be 1185 * walking the chain. As the chain is walked, the interrupt will
1273 * called from the system's interrupt handler as a matter of the OS 1186 * eventually be serviced by the correct driver/handler.
1274 * walking the chain. As the chain is walked, the interrupt will 1187 */
1275 * eventually be serviced by the correct driver/handler.
1276 */
1277#if 0 1188#if 0
1278 /* chained interrupt = not ours */ 1189 /* chained interrupt = not ours */
1279 pr_info(">> %s: intCnt NULL, sts %x, possibly a chained interrupt!\n", 1190 pr_info(">> %s: intCnt NULL, sts %x, possibly a chained interrupt!\n",
1280 ci->devname, status); 1191 ci->devname, status);
1281#endif 1192#endif
1282 return IRQ_NONE; 1193 return IRQ_NONE;
1283 } 1194 }
1284 1195
1285 ci->iqp_tailx = currInt; 1196 ci->iqp_tailx = currInt;
@@ -1289,27 +1200,25 @@ musycc_intr_th_handler (void *devp)
1289 ci->intlog.this_status_new = currInt; 1200 ci->intlog.this_status_new = currInt;
1290 1201
1291 if ((cxt1e1_log_level >= LOG_WARN) && (status & INTRPTS_INTFULL_M)) 1202 if ((cxt1e1_log_level >= LOG_WARN) && (status & INTRPTS_INTFULL_M))
1292 { 1203 pr_info("%s: Interrupt queue full condition occurred\n", ci->devname);
1293 pr_info("%s: Interrupt queue full condition occurred\n", ci->devname);
1294 }
1295 if (cxt1e1_log_level >= LOG_DEBUG) 1204 if (cxt1e1_log_level >= LOG_DEBUG)
1296 pr_info("%s: interrupts pending, isd @ 0x%p: %x curr %d cnt %d NEXT %d\n", 1205 pr_info("%s: interrupts pending, isd @ 0x%p: %x curr %d cnt %d NEXT %d\n",
1297 ci->devname, &ci->reg->isd, 1206 ci->devname, &ci->reg->isd,
1298 status, nextInt, intCnt, (intCnt + nextInt) & (INT_QUEUE_SIZE - 1)); 1207 status, nextInt, intCnt, (intCnt + nextInt) & (INT_QUEUE_SIZE - 1));
1299 1208
1300 FLUSH_MEM_WRITE (); 1209 FLUSH_MEM_WRITE();
1301#if defined(SBE_ISR_TASKLET) 1210#if defined(SBE_ISR_TASKLET)
1302 pci_write_32 ((u_int32_t *) &ci->reg->isd, currInt); 1211 pci_write_32((u_int32_t *) &ci->reg->isd, currInt);
1303 atomic_inc (&ci->bh_pending); 1212 atomic_inc(&ci->bh_pending);
1304 tasklet_schedule (&ci->ci_musycc_isr_tasklet); 1213 tasklet_schedule(&ci->ci_musycc_isr_tasklet);
1305#elif defined(SBE_ISR_IMMEDIATE) 1214#elif defined(SBE_ISR_IMMEDIATE)
1306 pci_write_32 ((u_int32_t *) &ci->reg->isd, currInt); 1215 pci_write_32((u_int32_t *) &ci->reg->isd, currInt);
1307 atomic_inc (&ci->bh_pending); 1216 atomic_inc(&ci->bh_pending);
1308 queue_task (&ci->ci_musycc_isr_tq, &tq_immediate); 1217 queue_task(&ci->ci_musycc_isr_tq, &tq_immediate);
1309 mark_bh (IMMEDIATE_BH); 1218 mark_bh(IMMEDIATE_BH);
1310#elif defined(SBE_ISR_INLINE) 1219#elif defined(SBE_ISR_INLINE)
1311 (void) musycc_intr_bh_tasklet (ci); 1220 (void) musycc_intr_bh_tasklet(ci);
1312 pci_write_32 ((u_int32_t *) &ci->reg->isd, currInt); 1221 pci_write_32((u_int32_t *) &ci->reg->isd, currInt);
1313#endif 1222#endif
1314 return IRQ_HANDLED; 1223 return IRQ_HANDLED;
1315} 1224}
@@ -1320,7 +1229,7 @@ unsigned long
1320#else 1229#else
1321void 1230void
1322#endif 1231#endif
1323musycc_intr_bh_tasklet (ci_t * ci) 1232musycc_intr_bh_tasklet(ci_t * ci)
1324{ 1233{
1325 mpi_t *pi; 1234 mpi_t *pi;
1326 mch_t *ch; 1235 mch_t *ch;
@@ -1336,21 +1245,19 @@ musycc_intr_bh_tasklet (ci_t * ci)
1336 * Hardware not available, potential interrupt hang. But since interrupt 1245 * Hardware not available, potential interrupt hang. But since interrupt
1337 * might be shared, just return. 1246 * might be shared, just return.
1338 */ 1247 */
1339 if ((drvr_state != SBE_DRVR_AVAILABLE) || (ci->state == C_INIT)) 1248 if ((drvr_state != SBE_DRVR_AVAILABLE) || (ci->state == C_INIT)) {
1340 {
1341#if defined(SBE_ISR_IMMEDIATE) 1249#if defined(SBE_ISR_IMMEDIATE)
1342 return 0L; 1250 return 0L;
1343#else 1251#else
1344 return; 1252 return;
1345#endif 1253#endif
1346 } 1254 }
1347#if defined(SBE_ISR_TASKLET) || defined(SBE_ISR_IMMEDIATE) 1255#if defined(SBE_ISR_TASKLET) || defined(SBE_ISR_IMMEDIATE)
1348 if (drvr_state != SBE_DRVR_AVAILABLE) 1256 if (drvr_state != SBE_DRVR_AVAILABLE) {
1349 {
1350#if defined(SBE_ISR_TASKLET) 1257#if defined(SBE_ISR_TASKLET)
1351 return; 1258 return;
1352#elif defined(SBE_ISR_IMMEDIATE) 1259#elif defined(SBE_ISR_IMMEDIATE)
1353 return 0L; 1260 return 0L;
1354#endif 1261#endif
1355 } 1262 }
1356#elif defined(SBE_ISR_INLINE) 1263#elif defined(SBE_ISR_INLINE)
@@ -1358,273 +1265,249 @@ musycc_intr_bh_tasklet (ci_t * ci)
1358#endif 1265#endif
1359 1266
1360 ci->intlog.drvr_intr_bhcount++; 1267 ci->intlog.drvr_intr_bhcount++;
1361 FLUSH_MEM_READ (); 1268 FLUSH_MEM_READ();
1362 { 1269 {
1363 unsigned int bh = atomic_read (&ci->bh_pending); 1270 unsigned int bh = atomic_read(&ci->bh_pending);
1364 1271
1365 max_bh = max (bh, max_bh); 1272 max_bh = max(bh, max_bh);
1366 } 1273 }
1367 atomic_set (&ci->bh_pending, 0);/* if here, no longer pending */ 1274 atomic_set(&ci->bh_pending, 0);/* if here, no longer pending */
1368 while ((headx = ci->iqp_headx) != (tailx = ci->iqp_tailx)) 1275 while ((headx = ci->iqp_headx) != (tailx = ci->iqp_tailx)) {
1369 { 1276 intCnt = (tailx >= headx) ? (tailx - headx) : (tailx - headx + INT_QUEUE_SIZE);
1370 intCnt = (tailx >= headx) ? (tailx - headx) : (tailx - headx + INT_QUEUE_SIZE); 1277 currInt = le32_to_cpu(ci->iqd_p[headx]);
1371 currInt = le32_to_cpu (ci->iqd_p[headx]); 1278
1372 1279 max_intcnt = max(intCnt, max_intcnt); /* RLD DEBUG */
1373 max_intcnt = max (intCnt, max_intcnt); /* RLD DEBUG */ 1280
1374 1281 /**************************************************/
1375 /**************************************************/ 1282 /* HW Bug Fix */
1376 /* HW Bug Fix */ 1283 /* ---------- */
1377 /* ---------- */ 1284 /* The following code checks for the condition */
1378 /* The following code checks for the condition */ 1285 /* of interrupt assertion before interrupt */
1379 /* of interrupt assertion before interrupt */ 1286 /* queue update. This is a problem on several */
1380 /* queue update. This is a problem on several */ 1287 /* PCI-Local bridge chips found on some products. */
1381 /* PCI-Local bridge chips found on some products. */ 1288 /**************************************************/
1382 /**************************************************/ 1289
1383 1290 readCount = 0;
1384 readCount = 0; 1291 if ((currInt == badInt) || (currInt == badInt2))
1385 if ((currInt == badInt) || (currInt == badInt2)) 1292 ci->intlog.drvr_int_failure++;
1386 ci->intlog.drvr_int_failure++; 1293
1387 1294 while ((currInt == badInt) || (currInt == badInt2)) {
1388 while ((currInt == badInt) || (currInt == badInt2)) 1295 for (loopCount = 0; loopCount < 0x30; loopCount++)
1389 { 1296 OS_uwait_dummy(); /* use call to avoid optimization removal
1390 for (loopCount = 0; loopCount < 0x30; loopCount++) 1297 * of dummy delay */
1391 OS_uwait_dummy (); /* use call to avoid optimization removal 1298 FLUSH_MEM_READ();
1392 * of dummy delay */ 1299 currInt = le32_to_cpu(ci->iqd_p[headx]);
1393 FLUSH_MEM_READ (); 1300 if (readCount++ > 20)
1394 currInt = le32_to_cpu (ci->iqd_p[headx]); 1301 break;
1395 if (readCount++ > 20) 1302 }
1396 break; 1303
1397 } 1304 if ((currInt == badInt) || (currInt == badInt2)) { /* catch failure of Bug
1398 1305 * Fix checking */
1399 if ((currInt == badInt) || (currInt == badInt2)) /* catch failure of Bug 1306 if (cxt1e1_log_level >= LOG_WARN)
1400 * Fix checking */ 1307 pr_info("%s: Illegal Interrupt Detected @ 0x%p, mod %d.)\n",
1401 { 1308 ci->devname, &ci->iqd_p[headx], headx);
1402 if (cxt1e1_log_level >= LOG_WARN) 1309
1403 pr_info("%s: Illegal Interrupt Detected @ 0x%p, mod %d.)\n", 1310 /*
1404 ci->devname, &ci->iqd_p[headx], headx); 1311 * If the descriptor has not recovered, then leaving the EMPTY
1405 1312 * entry set will not signal to the MUSYCC that this descriptor
1406 /* 1313 * has been serviced. The Interrupt Queue can then start losing
1407 * If the descriptor has not recovered, then leaving the EMPTY 1314 * available descriptors and MUSYCC eventually encounters and
1408 * entry set will not signal to the MUSYCC that this descriptor 1315 * reports the INTFULL condition. Per manual, changing any bit
1409 * has been serviced. The Interrupt Queue can then start losing 1316 * marks descriptor as available, thus the use of different
1410 * available descriptors and MUSYCC eventually encounters and 1317 * EMPTY_ENTRY values.
1411 * reports the INTFULL condition. Per manual, changing any bit 1318 */
1412 * marks descriptor as available, thus the use of different 1319
1413 * EMPTY_ENTRY values. 1320 if (currInt == badInt)
1414 */ 1321 ci->iqd_p[headx] = __constant_cpu_to_le32(INT_EMPTY_ENTRY2);
1415 1322 else
1416 if (currInt == badInt) 1323 ci->iqd_p[headx] = __constant_cpu_to_le32(INT_EMPTY_ENTRY);
1417 { 1324 ci->iqp_headx = (headx + 1) & (INT_QUEUE_SIZE - 1); /* insure wrapness */
1418 ci->iqd_p[headx] = __constant_cpu_to_le32 (INT_EMPTY_ENTRY2); 1325 FLUSH_MEM_WRITE();
1419 } else 1326 FLUSH_MEM_READ();
1420 { 1327 continue;
1421 ci->iqd_p[headx] = __constant_cpu_to_le32 (INT_EMPTY_ENTRY); 1328 }
1422 } 1329 group = INTRPT_GRP(currInt);
1423 ci->iqp_headx = (headx + 1) & (INT_QUEUE_SIZE - 1); /* insure wrapness */ 1330 gchan = INTRPT_CH(currInt);
1424 FLUSH_MEM_WRITE (); 1331 event = INTRPT_EVENT(currInt);
1425 FLUSH_MEM_READ (); 1332 err = INTRPT_ERROR(currInt);
1426 continue; 1333 tx = currInt & INTRPT_DIR_M;
1427 } 1334
1428 group = INTRPT_GRP (currInt); 1335 ci->iqd_p[headx] = __constant_cpu_to_le32(INT_EMPTY_ENTRY);
1429 gchan = INTRPT_CH (currInt); 1336 FLUSH_MEM_WRITE();
1430 event = INTRPT_EVENT (currInt); 1337
1431 err = INTRPT_ERROR (currInt); 1338 if (cxt1e1_log_level >= LOG_DEBUG) {
1432 tx = currInt & INTRPT_DIR_M; 1339 if (err != 0)
1433 1340 pr_info(" %08x -> err: %2d,", currInt, err);
1434 ci->iqd_p[headx] = __constant_cpu_to_le32 (INT_EMPTY_ENTRY); 1341
1435 FLUSH_MEM_WRITE (); 1342 pr_info("+ interrupt event: %d, grp: %d, chan: %2d, side: %cX\n",
1436 1343 event, group, gchan, tx ? 'T' : 'R');
1437 if (cxt1e1_log_level >= LOG_DEBUG) 1344 }
1438 { 1345 pi = &ci->port[group]; /* notice that here we assume 1-1 group -
1439 if (err != 0) 1346 * port mapping */
1440 pr_info(" %08x -> err: %2d,", currInt, err); 1347 ch = pi->chan[gchan];
1441 1348 switch (event) {
1442 pr_info("+ interrupt event: %d, grp: %d, chan: %2d, side: %cX\n", 1349 case EVE_SACK: /* Service Request Acknowledge */
1443 event, group, gchan, tx ? 'T' : 'R'); 1350 if (cxt1e1_log_level >= LOG_DEBUG) {
1444 } 1351 volatile u_int32_t r;
1445 pi = &ci->port[group]; /* notice that here we assume 1-1 group - 1352
1446 * port mapping */ 1353 r = pci_read_32((u_int32_t *) &pi->reg->srd);
1447 ch = pi->chan[gchan]; 1354 pr_info("- SACK cmd: %08x (hdw= %08x)\n", pi->sr_last, r);
1448 switch (event) 1355 }
1449 { 1356 SD_SEM_GIVE(&pi->sr_sem_wait); /* wake up waiting process */
1450 case EVE_SACK: /* Service Request Acknowledge */ 1357 break;
1451 if (cxt1e1_log_level >= LOG_DEBUG) 1358 case EVE_CHABT: /* Change To Abort Code (0x7e -> 0xff) */
1452 { 1359 case EVE_CHIC: /* Change To Idle Code (0xff -> 0x7e) */
1453 volatile u_int32_t r; 1360 break;
1454 1361 case EVE_EOM: /* End Of Message */
1455 r = pci_read_32 ((u_int32_t *) &pi->reg->srd); 1362 case EVE_EOB: /* End Of Buffer (Transparent mode) */
1456 pr_info("- SACK cmd: %08x (hdw= %08x)\n", pi->sr_last, r); 1363 if (tx)
1457 } 1364 musycc_bh_tx_eom(pi, gchan);
1458 SD_SEM_GIVE (&pi->sr_sem_wait); /* wake up waiting process */ 1365 else
1459 break; 1366 musycc_bh_rx_eom(pi, gchan);
1460 case EVE_CHABT: /* Change To Abort Code (0x7e -> 0xff) */
1461 case EVE_CHIC: /* Change To Idle Code (0xff -> 0x7e) */
1462 break;
1463 case EVE_EOM: /* End Of Message */
1464 case EVE_EOB: /* End Of Buffer (Transparent mode) */
1465 if (tx)
1466 {
1467 musycc_bh_tx_eom (pi, gchan);
1468 } else
1469 {
1470 musycc_bh_rx_eom (pi, gchan);
1471 }
1472#if 0 1367#if 0
1473 break; 1368 break;
1474#else 1369#else
1475 /* 1370 /*
1476 * MUSYCC Interrupt Descriptor section states that EOB and EOM 1371 * MUSYCC Interrupt Descriptor section states that EOB and EOM
1477 * can be combined with the NONE error (as well as others). So 1372 * can be combined with the NONE error (as well as others). So
1478 * drop thru to catch this... 1373 * drop thru to catch this...
1479 */ 1374 */
1480#endif 1375#endif
1481 case EVE_NONE: 1376 case EVE_NONE:
1482 if (err == ERR_SHT) 1377 if (err == ERR_SHT)
1483 { 1378 ch->s.rx_length_errors++;
1484 ch->s.rx_length_errors++; 1379 break;
1485 } 1380 default:
1486 break; 1381 if (cxt1e1_log_level >= LOG_WARN)
1487 default: 1382 pr_info("%s: unexpected interrupt event: %d, iqd[%d]: %08x, port: %d\n", ci->devname,
1488 if (cxt1e1_log_level >= LOG_WARN) 1383 event, headx, currInt, group);
1489 pr_info("%s: unexpected interrupt event: %d, iqd[%d]: %08x, port: %d\n", ci->devname, 1384 break;
1490 event, headx, currInt, group); 1385 } /* switch on event */
1491 break; 1386
1492 } /* switch on event */ 1387
1493 1388 /*
1494 1389 * Per MUSYCC Manual, Section 6.4.8.3 [Transmit Errors], TX errors
1495 /* 1390 * are service-affecting and require action to resume normal
1496 * Per MUSYCC Manual, Section 6.4.8.3 [Transmit Errors], TX errors 1391 * bit-level processing.
1497 * are service-affecting and require action to resume normal 1392 */
1498 * bit-level processing. 1393
1499 */ 1394 switch (err) {
1500 1395 case ERR_ONR:
1501 switch (err) 1396 /*
1502 { 1397 * Per MUSYCC manual, Section 6.4.8.3 [Transmit Errors], this
1503 case ERR_ONR: 1398 * error requires Transmit channel reactivation.
1504 /* 1399 *
1505 * Per MUSYCC manual, Section 6.4.8.3 [Transmit Errors], this 1400 * Per MUSYCC manual, Section 6.4.8.4 [Receive Errors], this error
1506 * error requires Transmit channel reactivation. 1401 * requires Receive channel reactivation.
1507 * 1402 */
1508 * Per MUSYCC manual, Section 6.4.8.4 [Receive Errors], this error 1403 if (tx) {
1509 * requires Receive channel reactivation. 1404
1510 */ 1405 /*
1511 if (tx) 1406 * TX ONR Error only occurs when channel is configured for
1512 { 1407 * Transparent Mode. However, this code will catch and
1513 1408 * re-activate on ANY TX ONR error.
1514 /* 1409 */
1515 * TX ONR Error only occurs when channel is configured for 1410
1516 * Transparent Mode. However, this code will catch and 1411 /*
1517 * re-activate on ANY TX ONR error. 1412 * Set flag to re-enable on any next transmit attempt.
1518 */ 1413 */
1519 1414 ch->ch_start_tx = CH_START_TX_ONR;
1520 /* 1415
1521 * Set flag to re-enable on any next transmit attempt. 1416 {
1522 */
1523 ch->ch_start_tx = CH_START_TX_ONR;
1524
1525 {
1526#ifdef RLD_TRANS_DEBUG 1417#ifdef RLD_TRANS_DEBUG
1527 if (1 || cxt1e1_log_level >= LOG_MONITOR) 1418 if (1 || cxt1e1_log_level >= LOG_MONITOR)
1528#else 1419#else
1529 if (cxt1e1_log_level >= LOG_MONITOR) 1420 if (cxt1e1_log_level >= LOG_MONITOR)
1530#endif 1421#endif
1531 { 1422 {
1532 pr_info("%s: TX buffer underflow [ONR] on channel %d, mode %x QStopped %x free %d\n", 1423 pr_info("%s: TX buffer underflow [ONR] on channel %d, mode %x QStopped %x free %d\n",
1533 ci->devname, ch->channum, ch->p.chan_mode, sd_queue_stopped (ch->user), ch->txd_free); 1424 ci->devname, ch->channum, ch->p.chan_mode, sd_queue_stopped(ch->user), ch->txd_free);
1534#ifdef RLD_DEBUG 1425#ifdef RLD_DEBUG
1535 if (ch->p.chan_mode == 2) /* problem = ONR on HDLC 1426 if (ch->p.chan_mode == 2) { /* problem = ONR on HDLC
1536 * mode */ 1427 * mode */
1537 { 1428 pr_info("++ Failed Last %x Next %x QStopped %x, start_tx %x tx_full %d txd_free %d mode %x\n",
1538 pr_info("++ Failed Last %x Next %x QStopped %x, start_tx %x tx_full %d txd_free %d mode %x\n", 1429 (u_int32_t) ch->txd_irq_srv, (u_int32_t) ch->txd_usr_add,
1539 (u_int32_t) ch->txd_irq_srv, (u_int32_t) ch->txd_usr_add, 1430 sd_queue_stopped(ch->user),
1540 sd_queue_stopped (ch->user), 1431 ch->ch_start_tx, ch->tx_full, ch->txd_free, ch->p.chan_mode);
1541 ch->ch_start_tx, ch->tx_full, ch->txd_free, ch->p.chan_mode); 1432 musycc_dump_txbuffer_ring(ch, 0);
1542 musycc_dump_txbuffer_ring (ch, 0); 1433 }
1543 }
1544#endif 1434#endif
1545 } 1435 }
1546 } 1436 }
1547 } else /* RX buffer overrun */ 1437 } else { /* RX buffer overrun */
1548 { 1438 /*
1549 /* 1439 * Per MUSYCC manual, Section 6.4.8.4 [Receive Errors],
1550 * Per MUSYCC manual, Section 6.4.8.4 [Receive Errors], 1440 * channel recovery for this RX ONR error IS required. It is
1551 * channel recovery for this RX ONR error IS required. It is 1441 * also suggested to increase the number of receive buffers
1552 * also suggested to increase the number of receive buffers 1442 * for this channel. Receive channel reactivation IS
1553 * for this channel. Receive channel reactivation IS 1443 * required, and data has been lost.
1554 * required, and data has been lost. 1444 */
1555 */ 1445 ch->s.rx_over_errors++;
1556 ch->s.rx_over_errors++; 1446 ch->ch_start_rx = CH_START_RX_ONR;
1557 ch->ch_start_rx = CH_START_RX_ONR; 1447
1558 1448 if (cxt1e1_log_level >= LOG_WARN) {
1559 if (cxt1e1_log_level >= LOG_WARN) 1449 pr_info("%s: RX buffer overflow [ONR] on channel %d, mode %x\n",
1560 { 1450 ci->devname, ch->channum, ch->p.chan_mode);
1561 pr_info("%s: RX buffer overflow [ONR] on channel %d, mode %x\n", 1451 //musycc_dump_rxbuffer_ring (ch, 0); /* RLD DEBUG */
1562 ci->devname, ch->channum, ch->p.chan_mode); 1452 }
1563 //musycc_dump_rxbuffer_ring (ch, 0); /* RLD DEBUG */ 1453 }
1564 } 1454 musycc_chan_restart(ch);
1565 } 1455 break;
1566 musycc_chan_restart (ch); 1456 case ERR_BUF:
1567 break; 1457 if (tx) {
1568 case ERR_BUF: 1458 ch->s.tx_fifo_errors++;
1569 if (tx) 1459 ch->ch_start_tx = CH_START_TX_BUF;
1570 { 1460 /*
1571 ch->s.tx_fifo_errors++; 1461 * Per MUSYCC manual, Section 6.4.8.3 [Transmit Errors],
1572 ch->ch_start_tx = CH_START_TX_BUF; 1462 * this BUFF error requires Transmit channel reactivation.
1573 /* 1463 */
1574 * Per MUSYCC manual, Section 6.4.8.3 [Transmit Errors], 1464 if (cxt1e1_log_level >= LOG_MONITOR)
1575 * this BUFF error requires Transmit channel reactivation. 1465 pr_info("%s: TX buffer underrun [BUFF] on channel %d, mode %x\n",
1576 */ 1466 ci->devname, ch->channum, ch->p.chan_mode);
1577 if (cxt1e1_log_level >= LOG_MONITOR) 1467 } else { /* RX buffer overrun */
1578 pr_info("%s: TX buffer underrun [BUFF] on channel %d, mode %x\n", 1468 ch->s.rx_over_errors++;
1579 ci->devname, ch->channum, ch->p.chan_mode); 1469 /*
1580 } else /* RX buffer overrun */ 1470 * Per MUSYCC manual, Section 6.4.8.4 [Receive Errors], HDLC
1581 { 1471 * mode requires NO recovery for this RX BUFF error is
1582 ch->s.rx_over_errors++; 1472 * required. It is suggested to increase the FIFO buffer
1583 /* 1473 * space for this channel. Receive channel reactivation is
1584 * Per MUSYCC manual, Section 6.4.8.4 [Receive Errors], HDLC 1474 * not required, but data has been lost.
1585 * mode requires NO recovery for this RX BUFF error is 1475 */
1586 * required. It is suggested to increase the FIFO buffer 1476 if (cxt1e1_log_level >= LOG_WARN)
1587 * space for this channel. Receive channel reactivation is 1477 pr_info("%s: RX buffer overrun [BUFF] on channel %d, mode %x\n",
1588 * not required, but data has been lost. 1478 ci->devname, ch->channum, ch->p.chan_mode);
1589 */ 1479 /*
1590 if (cxt1e1_log_level >= LOG_WARN) 1480 * Per MUSYCC manual, Section 6.4.9.4 [Receive Errors],
1591 pr_info("%s: RX buffer overrun [BUFF] on channel %d, mode %x\n", 1481 * Transparent mode DOES require recovery for the RX BUFF
1592 ci->devname, ch->channum, ch->p.chan_mode); 1482 * error. It is suggested to increase the FIFO buffer space
1593 /* 1483 * for this channel. Receive channel reactivation IS
1594 * Per MUSYCC manual, Section 6.4.9.4 [Receive Errors], 1484 * required and data has been lost.
1595 * Transparent mode DOES require recovery for the RX BUFF 1485 */
1596 * error. It is suggested to increase the FIFO buffer space 1486 if (ch->p.chan_mode == CFG_CH_PROTO_TRANS)
1597 * for this channel. Receive channel reactivation IS 1487 ch->ch_start_rx = CH_START_RX_BUF;
1598 * required and data has been lost. 1488 }
1599 */ 1489
1600 if (ch->p.chan_mode == CFG_CH_PROTO_TRANS) 1490 if (tx || (ch->p.chan_mode == CFG_CH_PROTO_TRANS))
1601 ch->ch_start_rx = CH_START_RX_BUF; 1491 musycc_chan_restart(ch);
1602 } 1492 break;
1603 1493 default:
1604 if (tx || (ch->p.chan_mode == CFG_CH_PROTO_TRANS)) 1494 break;
1605 musycc_chan_restart (ch); 1495 } /* switch on err */
1606 break; 1496
1607 default: 1497 /* Check for interrupt lost condition */
1608 break; 1498 if ((currInt & INTRPT_ILOST_M) && (cxt1e1_log_level >= LOG_ERROR))
1609 } /* switch on err */ 1499 pr_info("%s: Interrupt queue overflow - ILOST asserted\n",
1610 1500 ci->devname);
1611 /* Check for interrupt lost condition */ 1501 ci->iqp_headx = (headx + 1) & (INT_QUEUE_SIZE - 1); /* insure wrapness */
1612 if ((currInt & INTRPT_ILOST_M) && (cxt1e1_log_level >= LOG_ERROR)) 1502 FLUSH_MEM_WRITE();
1613 { 1503 FLUSH_MEM_READ();
1614 pr_info("%s: Interrupt queue overflow - ILOST asserted\n",
1615 ci->devname);
1616 }
1617 ci->iqp_headx = (headx + 1) & (INT_QUEUE_SIZE - 1); /* insure wrapness */
1618 FLUSH_MEM_WRITE ();
1619 FLUSH_MEM_READ ();
1620 } /* while */ 1504 } /* while */
1621 if ((cxt1e1_log_level >= LOG_MONITOR2) && (ci->iqp_headx != ci->iqp_tailx)) 1505 if ((cxt1e1_log_level >= LOG_MONITOR2) && (ci->iqp_headx != ci->iqp_tailx)) {
1622 { 1506 int bh;
1623 int bh;
1624 1507
1625 bh = atomic_read (&CI->bh_pending); 1508 bh = atomic_read(&CI->bh_pending);
1626 pr_info("_bh_: late arrivals, head %d != tail %d, pending %d\n", 1509 pr_info("_bh_: late arrivals, head %d != tail %d, pending %d\n",
1627 ci->iqp_headx, ci->iqp_tailx, bh); 1510 ci->iqp_headx, ci->iqp_tailx, bh);
1628 } 1511 }
1629#if defined(SBE_ISR_IMMEDIATE) 1512#if defined(SBE_ISR_IMMEDIATE)
1630 return 0L; 1513 return 0L;
@@ -1634,14 +1517,14 @@ musycc_intr_bh_tasklet (ci_t * ci)
1634 1517
1635#if 0 1518#if 0
1636int __init 1519int __init
1637musycc_new_chan (ci_t * ci, int channum, void *user) 1520musycc_new_chan(ci_t * ci, int channum, void *user)
1638{ 1521{
1639 mch_t *ch; 1522 mch_t *ch;
1640 1523
1641 ch = ci->port[channum / MUSYCC_NCHANS].chan[channum % MUSYCC_NCHANS]; 1524 ch = ci->port[channum / MUSYCC_NCHANS].chan[channum % MUSYCC_NCHANS];
1642 1525
1643 if (ch->state != UNASSIGNED) 1526 if (ch->state != UNASSIGNED)
1644 return EEXIST; 1527 return EEXIST;
1645 /* NOTE: mch_t already cleared during OS_kmalloc() */ 1528 /* NOTE: mch_t already cleared during OS_kmalloc() */
1646 ch->state = DOWN; 1529 ch->state = DOWN;
1647 ch->user = user; 1530 ch->user = user;
@@ -1653,8 +1536,8 @@ musycc_new_chan (ci_t * ci, int channum, void *user)
1653 ch->p.chan_mode = CFG_CH_PROTO_HDLC_FCS16; 1536 ch->p.chan_mode = CFG_CH_PROTO_HDLC_FCS16;
1654 ch->p.idlecode = CFG_CH_FLAG_7E; 1537 ch->p.idlecode = CFG_CH_FLAG_7E;
1655 ch->p.pad_fill_count = 2; 1538 ch->p.pad_fill_count = 2;
1656 spin_lock_init (&ch->ch_rxlock); 1539 spin_lock_init(&ch->ch_rxlock);
1657 spin_lock_init (&ch->ch_txlock); 1540 spin_lock_init(&ch->ch_txlock);
1658 1541
1659 return 0; 1542 return 0;
1660} 1543}
@@ -1663,53 +1546,49 @@ musycc_new_chan (ci_t * ci, int channum, void *user)
1663 1546
1664#ifdef SBE_PMCC4_ENABLE 1547#ifdef SBE_PMCC4_ENABLE
1665status_t 1548status_t
1666musycc_chan_down (ci_t * dummy, int channum) 1549musycc_chan_down(ci_t * dummy, int channum)
1667{ 1550{
1668 mpi_t *pi; 1551 mpi_t *pi;
1669 mch_t *ch; 1552 mch_t *ch;
1670 int i, gchan; 1553 int i, gchan;
1671 1554
1672 if (!(ch = sd_find_chan (dummy, channum))) 1555 if (!(ch = sd_find_chan(dummy, channum)))
1673 return EINVAL; 1556 return EINVAL;
1674 pi = ch->up; 1557 pi = ch->up;
1675 gchan = ch->gchan; 1558 gchan = ch->gchan;
1676 1559
1677 /* Deactivate the channel */ 1560 /* Deactivate the channel */
1678 musycc_serv_req (pi, SR_CHANNEL_DEACTIVATE | SR_RX_DIRECTION | gchan); 1561 musycc_serv_req(pi, SR_CHANNEL_DEACTIVATE | SR_RX_DIRECTION | gchan);
1679 ch->ch_start_rx = 0; 1562 ch->ch_start_rx = 0;
1680 musycc_serv_req (pi, SR_CHANNEL_DEACTIVATE | SR_TX_DIRECTION | gchan); 1563 musycc_serv_req(pi, SR_CHANNEL_DEACTIVATE | SR_TX_DIRECTION | gchan);
1681 ch->ch_start_tx = 0; 1564 ch->ch_start_tx = 0;
1682 1565
1683 if (ch->state == DOWN) 1566 if (ch->state == DOWN)
1684 return 0; 1567 return 0;
1685 ch->state = DOWN; 1568 ch->state = DOWN;
1686 1569
1687 pi->regram->thp[gchan] = 0; 1570 pi->regram->thp[gchan] = 0;
1688 pi->regram->tmp[gchan] = 0; 1571 pi->regram->tmp[gchan] = 0;
1689 pi->regram->rhp[gchan] = 0; 1572 pi->regram->rhp[gchan] = 0;
1690 pi->regram->rmp[gchan] = 0; 1573 pi->regram->rmp[gchan] = 0;
1691 FLUSH_MEM_WRITE (); 1574 FLUSH_MEM_WRITE();
1692 for (i = 0; i < ch->txd_num; i++) 1575 for (i = 0; i < ch->txd_num; i++)
1693 { 1576 if (ch->mdt[i].mem_token != 0)
1694 if (ch->mdt[i].mem_token != 0) 1577 OS_mem_token_free(ch->mdt[i].mem_token);
1695 OS_mem_token_free (ch->mdt[i].mem_token);
1696 }
1697 1578
1698 for (i = 0; i < ch->rxd_num; i++) 1579 for (i = 0; i < ch->rxd_num; i++)
1699 { 1580 if (ch->mdr[i].mem_token != 0)
1700 if (ch->mdr[i].mem_token != 0) 1581 OS_mem_token_free(ch->mdr[i].mem_token);
1701 OS_mem_token_free (ch->mdr[i].mem_token);
1702 }
1703 1582
1704 OS_kfree (ch->mdr); 1583 OS_kfree(ch->mdr);
1705 ch->mdr = 0; 1584 ch->mdr = 0;
1706 ch->rxd_num = 0; 1585 ch->rxd_num = 0;
1707 OS_kfree (ch->mdt); 1586 OS_kfree(ch->mdt);
1708 ch->mdt = 0; 1587 ch->mdt = 0;
1709 ch->txd_num = 0; 1588 ch->txd_num = 0;
1710 1589
1711 musycc_update_timeslots (pi); 1590 musycc_update_timeslots(pi);
1712 c4_fifo_free (pi, ch->gchan); 1591 c4_fifo_free(pi, ch->gchan);
1713 1592
1714 pi->openchans--; 1593 pi->openchans--;
1715 return 0; 1594 return 0;
@@ -1718,38 +1597,38 @@ musycc_chan_down (ci_t * dummy, int channum)
1718 1597
1719 1598
1720int 1599int
1721musycc_del_chan (ci_t * ci, int channum) 1600musycc_del_chan(ci_t * ci, int channum)
1722{ 1601{
1723 mch_t *ch; 1602 mch_t *ch;
1724 1603
1725 if ((channum < 0) || (channum >= (MUSYCC_NPORTS * MUSYCC_NCHANS))) /* sanity chk param */ 1604 if ((channum < 0) || (channum >= (MUSYCC_NPORTS * MUSYCC_NCHANS))) /* sanity chk param */
1726 return ECHRNG; 1605 return ECHRNG;
1727 if (!(ch = sd_find_chan (ci, channum))) 1606 if (!(ch = sd_find_chan(ci, channum)))
1728 return ENOENT; 1607 return ENOENT;
1729 if (ch->state == UP) 1608 if (ch->state == UP)
1730 musycc_chan_down (ci, channum); 1609 musycc_chan_down(ci, channum);
1731 ch->state = UNASSIGNED; 1610 ch->state = UNASSIGNED;
1732 return 0; 1611 return 0;
1733} 1612}
1734 1613
1735 1614
1736int 1615int
1737musycc_del_chan_stats (ci_t * ci, int channum) 1616musycc_del_chan_stats(ci_t * ci, int channum)
1738{ 1617{
1739 mch_t *ch; 1618 mch_t *ch;
1740 1619
1741 if (channum < 0 || channum >= (MUSYCC_NPORTS * MUSYCC_NCHANS)) /* sanity chk param */ 1620 if (channum < 0 || channum >= (MUSYCC_NPORTS * MUSYCC_NCHANS)) /* sanity chk param */
1742 return ECHRNG; 1621 return ECHRNG;
1743 if (!(ch = sd_find_chan (ci, channum))) 1622 if (!(ch = sd_find_chan(ci, channum)))
1744 return ENOENT; 1623 return ENOENT;
1745 1624
1746 memset (&ch->s, 0, sizeof (struct sbecom_chan_stats)); 1625 memset(&ch->s, 0, sizeof(struct sbecom_chan_stats));
1747 return 0; 1626 return 0;
1748} 1627}
1749 1628
1750 1629
1751int 1630int
1752musycc_start_xmit (ci_t * ci, int channum, void *mem_token) 1631musycc_start_xmit(ci_t * ci, int channum, void *mem_token)
1753{ 1632{
1754 mch_t *ch; 1633 mch_t *ch;
1755 struct mdesc *md; 1634 struct mdesc *md;
@@ -1760,16 +1639,16 @@ musycc_start_xmit (ci_t * ci, int channum, void *mem_token)
1760 int txd_need_cnt; 1639 int txd_need_cnt;
1761 u_int32_t len; 1640 u_int32_t len;
1762 1641
1763 if (!(ch = sd_find_chan (ci, channum))) 1642 if (!(ch = sd_find_chan(ci, channum)))
1764 return -ENOENT; 1643 return -ENOENT;
1765 1644
1766 if (ci->state != C_RUNNING) /* full interrupt processing available */ 1645 if (ci->state != C_RUNNING) /* full interrupt processing available */
1767 return -EINVAL; 1646 return -EINVAL;
1768 if (ch->state != UP) 1647 if (ch->state != UP)
1769 return -EINVAL; 1648 return -EINVAL;
1770 1649
1771 if (!(ch->status & TX_ENABLED)) 1650 if (!(ch->status & TX_ENABLED))
1772 return -EROFS; /* how else to flag unwritable state ? */ 1651 return -EROFS; /* how else to flag unwritable state ? */
1773 1652
1774#ifdef RLD_TRANS_DEBUGx 1653#ifdef RLD_TRANS_DEBUGx
1775 if (1 || cxt1e1_log_level >= LOG_MONITOR2) 1654 if (1 || cxt1e1_log_level >= LOG_MONITOR2)
@@ -1777,66 +1656,58 @@ musycc_start_xmit (ci_t * ci, int channum, void *mem_token)
1777 if (cxt1e1_log_level >= LOG_MONITOR2) 1656 if (cxt1e1_log_level >= LOG_MONITOR2)
1778#endif 1657#endif
1779 { 1658 {
1780 pr_info("++ start_xmt[%d]: state %x start %x full %d free %d required %d stopped %x\n", 1659 pr_info("++ start_xmt[%d]: state %x start %x full %d free %d required %d stopped %x\n",
1781 channum, ch->state, ch->ch_start_tx, ch->tx_full, 1660 channum, ch->state, ch->ch_start_tx, ch->tx_full,
1782 ch->txd_free, ch->txd_required, sd_queue_stopped (ch->user)); 1661 ch->txd_free, ch->txd_required, sd_queue_stopped(ch->user));
1783 } 1662 }
1784 /***********************************************/ 1663 /***********************************************/
1785 /** Determine total amount of data to be sent **/ 1664 /** Determine total amount of data to be sent **/
1786 /***********************************************/ 1665 /***********************************************/
1787 m2 = mem_token; 1666 m2 = mem_token;
1788 txd_need_cnt = 0; 1667 txd_need_cnt = 0;
1789 for (len = OS_mem_token_tlen (m2); len > 0; 1668 for (len = OS_mem_token_tlen(m2); len > 0;
1790 m2 = (void *) OS_mem_token_next (m2)) 1669 m2 = (void *) OS_mem_token_next(m2)) {
1791 { 1670 if (!OS_mem_token_len(m2))
1792 if (!OS_mem_token_len (m2)) 1671 continue;
1793 continue; 1672 txd_need_cnt++;
1794 txd_need_cnt++; 1673 len -= OS_mem_token_len(m2);
1795 len -= OS_mem_token_len (m2);
1796 } 1674 }
1797 1675
1798 if (txd_need_cnt == 0) 1676 if (txd_need_cnt == 0) {
1799 { 1677 if (cxt1e1_log_level >= LOG_MONITOR2)
1800 if (cxt1e1_log_level >= LOG_MONITOR2) 1678 pr_info("%s channel %d: no TX data in User buffer\n", ci->devname, channum);
1801 pr_info("%s channel %d: no TX data in User buffer\n", ci->devname, channum); 1679 OS_mem_token_free(mem_token);
1802 OS_mem_token_free (mem_token); 1680 return 0; /* no data to send */
1803 return 0; /* no data to send */
1804 } 1681 }
1805 /*************************************************/ 1682 /*************************************************/
1806 /** Are there sufficient descriptors available? **/ 1683 /** Are there sufficient descriptors available? **/
1807 /*************************************************/ 1684 /*************************************************/
1808 if (txd_need_cnt > ch->txd_num) /* never enough descriptors for this 1685 if (txd_need_cnt > ch->txd_num) { /* never enough descriptors for this
1809 * large a buffer */ 1686 * large a buffer */
1810 { 1687 if (cxt1e1_log_level >= LOG_DEBUG)
1811 if (cxt1e1_log_level >= LOG_DEBUG) 1688 pr_info("start_xmit: discarding buffer, insufficient descriptor cnt %d, need %d.\n",
1812 { 1689 ch->txd_num, txd_need_cnt + 1);
1813 pr_info("start_xmit: discarding buffer, insufficient descriptor cnt %d, need %d.\n", 1690 ch->s.tx_dropped++;
1814 ch->txd_num, txd_need_cnt + 1); 1691 OS_mem_token_free(mem_token);
1815 } 1692 return 0;
1816 ch->s.tx_dropped++;
1817 OS_mem_token_free (mem_token);
1818 return 0;
1819 } 1693 }
1820#if 0 1694#if 0
1821 spin_lock_irqsave (&ch->ch_txlock, flags); 1695 spin_lock_irqsave(&ch->ch_txlock, flags);
1822#endif 1696#endif
1823 /************************************************************/ 1697 /************************************************************/
1824 /** flow control the line if not enough descriptors remain **/ 1698 /** flow control the line if not enough descriptors remain **/
1825 /************************************************************/ 1699 /************************************************************/
1826 if (txd_need_cnt > ch->txd_free) 1700 if (txd_need_cnt > ch->txd_free) {
1827 { 1701 if (cxt1e1_log_level >= LOG_MONITOR2)
1828 if (cxt1e1_log_level >= LOG_MONITOR2) 1702 pr_info("start_xmit[%d]: EBUSY - need more descriptors, have %d of %d need %d\n",
1829 { 1703 channum, ch->txd_free, ch->txd_num, txd_need_cnt);
1830 pr_info("start_xmit[%d]: EBUSY - need more descriptors, have %d of %d need %d\n", 1704 ch->tx_full = 1;
1831 channum, ch->txd_free, ch->txd_num, txd_need_cnt); 1705 ch->txd_required = txd_need_cnt;
1832 } 1706 sd_disable_xmit(ch->user);
1833 ch->tx_full = 1;
1834 ch->txd_required = txd_need_cnt;
1835 sd_disable_xmit (ch->user);
1836#if 0 1707#if 0
1837 spin_unlock_irqrestore (&ch->ch_txlock, flags); 1708 spin_unlock_irqrestore(&ch->ch_txlock, flags);
1838#endif 1709#endif
1839 return -EBUSY; /* tell user to try again later */ 1710 return -EBUSY; /* tell user to try again later */
1840 } 1711 }
1841 /**************************************************/ 1712 /**************************************************/
1842 /** Put the user data into MUSYCC data buffer(s) **/ 1713 /** Put the user data into MUSYCC data buffer(s) **/
@@ -1844,74 +1715,71 @@ musycc_start_xmit (ci_t * ci, int channum, void *mem_token)
1844 m2 = mem_token; 1715 m2 = mem_token;
1845 md = ch->txd_usr_add; /* get current available descriptor */ 1716 md = ch->txd_usr_add; /* get current available descriptor */
1846 1717
1847 for (len = OS_mem_token_tlen (m2); len > 0; m2 = OS_mem_token_next (m2)) 1718 for (len = OS_mem_token_tlen(m2); len > 0; m2 = OS_mem_token_next(m2)) {
1848 { 1719 int u = OS_mem_token_len(m2);
1849 int u = OS_mem_token_len (m2); 1720
1850 1721 if (!u)
1851 if (!u) 1722 continue;
1852 continue; 1723 len -= u;
1853 len -= u; 1724
1854 1725 /*
1855 /* 1726 * Enable following chunks, yet wait to enable the FIRST chunk until
1856 * Enable following chunks, yet wait to enable the FIRST chunk until 1727 * after ALL subsequent chunks are setup.
1857 * after ALL subsequent chunks are setup. 1728 */
1858 */ 1729 if (md != ch->txd_usr_add) /* not first chunk */
1859 if (md != ch->txd_usr_add) /* not first chunk */ 1730 u |= MUSYCC_TX_OWNED; /* transfer ownership from HOST to MUSYCC */
1860 u |= MUSYCC_TX_OWNED; /* transfer ownership from HOST to MUSYCC */ 1731
1861 1732 if (len) /* not last chunk */
1862 if (len) /* not last chunk */ 1733 u |= EOBIRQ_ENABLE;
1863 u |= EOBIRQ_ENABLE; 1734 else if (ch->p.chan_mode == CFG_CH_PROTO_TRANS) {
1864 else if (ch->p.chan_mode == CFG_CH_PROTO_TRANS) 1735 /*
1865 { 1736 * Per MUSYCC Ref 6.4.9 for Transparent Mode, the host must
1866 /* 1737 * always clear EOMIRQ_ENABLE in every Transmit Buffer Descriptor
1867 * Per MUSYCC Ref 6.4.9 for Transparent Mode, the host must 1738 * (IE. don't set herein).
1868 * always clear EOMIRQ_ENABLE in every Transmit Buffer Descriptor 1739 */
1869 * (IE. don't set herein). 1740 u |= EOBIRQ_ENABLE;
1870 */ 1741 } else
1871 u |= EOBIRQ_ENABLE; 1742 u |= EOMIRQ_ENABLE; /* EOM, last HDLC chunk */
1872 } else 1743
1873 u |= EOMIRQ_ENABLE; /* EOM, last HDLC chunk */ 1744
1874 1745 /* last chunk in hdlc mode */
1875 1746 u |= (ch->p.idlecode << IDLE_CODE);
1876 /* last chunk in hdlc mode */ 1747 if (ch->p.pad_fill_count) {
1877 u |= (ch->p.idlecode << IDLE_CODE);
1878 if (ch->p.pad_fill_count)
1879 {
1880#if 0 1748#if 0
1881 /* NOOP NOTE: u_int8_t cannot be > 0xFF */ 1749 /* NOOP NOTE: u_int8_t cannot be > 0xFF */
1882 /* sanitize pad_fill_count for maximums allowed by hardware */ 1750 /* sanitize pad_fill_count for maximums allowed by hardware */
1883 if (ch->p.pad_fill_count > EXTRA_FLAGS_MASK) 1751 if (ch->p.pad_fill_count > EXTRA_FLAGS_MASK)
1884 ch->p.pad_fill_count = EXTRA_FLAGS_MASK; 1752 ch->p.pad_fill_count = EXTRA_FLAGS_MASK;
1885#endif 1753#endif
1886 u |= (PADFILL_ENABLE | (ch->p.pad_fill_count << EXTRA_FLAGS)); 1754 u |= (PADFILL_ENABLE | (ch->p.pad_fill_count << EXTRA_FLAGS));
1887 } 1755 }
1888 md->mem_token = len ? 0 : mem_token; /* Fill in mds on last 1756 md->mem_token = len ? 0 : mem_token; /* Fill in mds on last
1889 * segment, others set ZERO 1757 * segment, others set ZERO
1890 * so that entire token is 1758 * so that entire token is
1891 * removed ONLY when ALL 1759 * removed ONLY when ALL
1892 * segments have been 1760 * segments have been
1893 * transmitted. */ 1761 * transmitted. */
1894 1762
1895 md->data = cpu_to_le32 (OS_vtophys (OS_mem_token_data (m2))); 1763 md->data = cpu_to_le32(OS_vtophys(OS_mem_token_data(m2)));
1896 FLUSH_MEM_WRITE (); 1764 FLUSH_MEM_WRITE();
1897 md->status = cpu_to_le32 (u); 1765 md->status = cpu_to_le32(u);
1898 --ch->txd_free; 1766 --ch->txd_free;
1899 md = md->snext; 1767 md = md->snext;
1900 } 1768 }
1901 FLUSH_MEM_WRITE (); 1769 FLUSH_MEM_WRITE();
1902 1770
1903 1771
1904 /* 1772 /*
1905 * Now transfer ownership of first chunk from HOST to MUSYCC in order to 1773 * Now transfer ownership of first chunk from HOST to MUSYCC in order to
1906 * fire-off this XMIT. 1774 * fire-off this XMIT.
1907 */ 1775 */
1908 ch->txd_usr_add->status |= __constant_cpu_to_le32 (MUSYCC_TX_OWNED); 1776 ch->txd_usr_add->status |= __constant_cpu_to_le32(MUSYCC_TX_OWNED);
1909 FLUSH_MEM_WRITE (); 1777 FLUSH_MEM_WRITE();
1910 ch->txd_usr_add = md; 1778 ch->txd_usr_add = md;
1911 1779
1912 len = OS_mem_token_tlen (mem_token); 1780 len = OS_mem_token_tlen(mem_token);
1913 atomic_add (len, &ch->tx_pending); 1781 atomic_add(len, &ch->tx_pending);
1914 atomic_add (len, &ci->tx_pending); 1782 atomic_add(len, &ci->tx_pending);
1915 ch->s.tx_packets++; 1783 ch->s.tx_packets++;
1916 ch->s.tx_bytes += len; 1784 ch->s.tx_bytes += len;
1917 /* 1785 /*
@@ -1919,11 +1787,9 @@ musycc_start_xmit (ci_t * ci, int channum, void *mem_token)
1919 * transmission. 1787 * transmission.
1920 */ 1788 */
1921 if (ch->ch_start_tx) 1789 if (ch->ch_start_tx)
1922 { 1790 musycc_chan_restart(ch);
1923 musycc_chan_restart (ch);
1924 }
1925#ifdef SBE_WAN256T3_ENABLE 1791#ifdef SBE_WAN256T3_ENABLE
1926 wan256t3_led (ci, LED_TX, LEDV_G); 1792 wan256t3_led(ci, LED_TX, LEDV_G);
1927#endif 1793#endif
1928 return 0; 1794 return 0;
1929} 1795}
diff --git a/drivers/staging/cxt1e1/musycc.h b/drivers/staging/cxt1e1/musycc.h
index cf6b54e15689..56fb42f0f64e 100644
--- a/drivers/staging/cxt1e1/musycc.h
+++ b/drivers/staging/cxt1e1/musycc.h
@@ -48,59 +48,57 @@
48#define INT_QUEUE_SIZE MUSYCC_NIQD 48#define INT_QUEUE_SIZE MUSYCC_NIQD
49 49
50/* RAM image of MUSYCC registers laid out as a C structure */ 50/* RAM image of MUSYCC registers laid out as a C structure */
51 struct musycc_groupr 51struct musycc_groupr {
52 { 52 VINT32 thp[32]; /* Transmit Head Pointer [5-29] */
53 VINT32 thp[32]; /* Transmit Head Pointer [5-29] */ 53 VINT32 tmp[32]; /* Transmit Message Pointer [5-30] */
54 VINT32 tmp[32]; /* Transmit Message Pointer [5-30] */ 54 VINT32 rhp[32]; /* Receive Head Pointer [5-29] */
55 VINT32 rhp[32]; /* Receive Head Pointer [5-29] */ 55 VINT32 rmp[32]; /* Receive Message Pointer [5-30] */
56 VINT32 rmp[32]; /* Receive Message Pointer [5-30] */ 56 VINT8 ttsm[128]; /* Time Slot Map [5-22] */
57 VINT8 ttsm[128]; /* Time Slot Map [5-22] */ 57 VINT8 tscm[256]; /* Subchannel Map [5-24] */
58 VINT8 tscm[256]; /* Subchannel Map [5-24] */ 58 VINT32 tcct[32]; /* Channel Configuration [5-26] */
59 VINT32 tcct[32]; /* Channel Configuration [5-26] */ 59 VINT8 rtsm[128]; /* Time Slot Map [5-22] */
60 VINT8 rtsm[128]; /* Time Slot Map [5-22] */ 60 VINT8 rscm[256]; /* Subchannel Map [5-24] */
61 VINT8 rscm[256]; /* Subchannel Map [5-24] */ 61 VINT32 rcct[32]; /* Channel Configuration [5-26] */
62 VINT32 rcct[32]; /* Channel Configuration [5-26] */ 62 VINT32 __glcd; /* Global Configuration Descriptor [5-10] */
63 VINT32 __glcd; /* Global Configuration Descriptor [5-10] */ 63 VINT32 __iqp; /* Interrupt Queue Pointer [5-36] */
64 VINT32 __iqp; /* Interrupt Queue Pointer [5-36] */ 64 VINT32 __iql; /* Interrupt Queue Length [5-36] */
65 VINT32 __iql; /* Interrupt Queue Length [5-36] */ 65 VINT32 grcd; /* Group Configuration Descriptor [5-16] */
66 VINT32 grcd; /* Group Configuration Descriptor [5-16] */ 66 VINT32 mpd; /* Memory Protection Descriptor [5-18] */
67 VINT32 mpd; /* Memory Protection Descriptor [5-18] */ 67 VINT32 mld; /* Message Length Descriptor [5-20] */
68 VINT32 mld; /* Message Length Descriptor [5-20] */ 68 VINT32 pcd; /* Port Configuration Descriptor [5-19] */
69 VINT32 pcd; /* Port Configuration Descriptor [5-19] */ 69};
70 };
71 70
72/* hardware MUSYCC registers laid out as a C structure */ 71/* hardware MUSYCC registers laid out as a C structure */
73 struct musycc_globalr 72struct musycc_globalr {
74 { 73 VINT32 gbp; /* Group Base Pointer */
75 VINT32 gbp; /* Group Base Pointer */ 74 VINT32 dacbp; /* Dual Address Cycle Base Pointer */
76 VINT32 dacbp; /* Dual Address Cycle Base Pointer */ 75 VINT32 srd; /* Service Request Descriptor */
77 VINT32 srd; /* Service Request Descriptor */ 76 VINT32 isd; /* Interrupt Service Descriptor */
78 VINT32 isd; /* Interrupt Service Descriptor */ 77 /*
79 /* 78 * adjust __thp due to above 4 registers, which are not contained
80 * adjust __thp due to above 4 registers, which are not contained 79 * within musycc_groupr[]. All __XXX[] are just place holders,
81 * within musycc_groupr[]. All __XXX[] are just place holders, 80 * anyhow.
82 * anyhow. 81 */
83 */ 82 VINT32 __thp[32 - 4]; /* Transmit Head Pointer [5-29] */
84 VINT32 __thp[32 - 4]; /* Transmit Head Pointer [5-29] */ 83 VINT32 __tmp[32]; /* Transmit Message Pointer [5-30] */
85 VINT32 __tmp[32]; /* Transmit Message Pointer [5-30] */ 84 VINT32 __rhp[32]; /* Receive Head Pointer [5-29] */
86 VINT32 __rhp[32]; /* Receive Head Pointer [5-29] */ 85 VINT32 __rmp[32]; /* Receive Message Pointer [5-30] */
87 VINT32 __rmp[32]; /* Receive Message Pointer [5-30] */ 86 VINT8 ttsm[128]; /* Time Slot Map [5-22] */
88 VINT8 ttsm[128]; /* Time Slot Map [5-22] */ 87 VINT8 tscm[256]; /* Subchannel Map [5-24] */
89 VINT8 tscm[256]; /* Subchannel Map [5-24] */ 88 VINT32 tcct[32]; /* Channel Configuration [5-26] */
90 VINT32 tcct[32]; /* Channel Configuration [5-26] */ 89 VINT8 rtsm[128]; /* Time Slot Map [5-22] */
91 VINT8 rtsm[128]; /* Time Slot Map [5-22] */ 90 VINT8 rscm[256]; /* Subchannel Map [5-24] */
92 VINT8 rscm[256]; /* Subchannel Map [5-24] */ 91 VINT32 rcct[32]; /* Channel Configuration [5-26] */
93 VINT32 rcct[32]; /* Channel Configuration [5-26] */ 92 VINT32 glcd; /* Global Configuration Descriptor [5-10] */
94 VINT32 glcd; /* Global Configuration Descriptor [5-10] */ 93 VINT32 iqp; /* Interrupt Queue Pointer [5-36] */
95 VINT32 iqp; /* Interrupt Queue Pointer [5-36] */ 94 VINT32 iql; /* Interrupt Queue Length [5-36] */
96 VINT32 iql; /* Interrupt Queue Length [5-36] */ 95 VINT32 grcd; /* Group Configuration Descriptor [5-16] */
97 VINT32 grcd; /* Group Configuration Descriptor [5-16] */ 96 VINT32 mpd; /* Memory Protection Descriptor [5-18] */
98 VINT32 mpd; /* Memory Protection Descriptor [5-18] */ 97 VINT32 mld; /* Message Length Descriptor [5-20] */
99 VINT32 mld; /* Message Length Descriptor [5-20] */ 98 VINT32 pcd; /* Port Configuration Descriptor [5-19] */
100 VINT32 pcd; /* Port Configuration Descriptor [5-19] */ 99 VINT32 rbist; /* Receive BIST status [5-4] */
101 VINT32 rbist; /* Receive BIST status [5-4] */ 100 VINT32 tbist; /* Receive BIST status [5-4] */
102 VINT32 tbist; /* Receive BIST status [5-4] */ 101};
103 };
104 102
105/* Global Config Descriptor bit macros */ 103/* Global Config Descriptor bit macros */
106#define MUSYCC_GCD_ECLK_ENABLE 0x00000800 /* EBUS clock enable */ 104#define MUSYCC_GCD_ECLK_ENABLE 0x00000800 /* EBUS clock enable */
@@ -108,18 +106,18 @@
108#define MUSYCC_GCD_INTA_DISABLE 0x00000008 /* PCI INTA disable */ 106#define MUSYCC_GCD_INTA_DISABLE 0x00000008 /* PCI INTA disable */
109#define MUSYCC_GCD_INTB_DISABLE 0x00000004 /* PCI INTB disable */ 107#define MUSYCC_GCD_INTB_DISABLE 0x00000004 /* PCI INTB disable */
110#define MUSYCC_GCD_BLAPSE 12 /* Position index for BLAPSE bit 108#define MUSYCC_GCD_BLAPSE 12 /* Position index for BLAPSE bit
111 * field */ 109 * field */
112#define MUSYCC_GCD_ALAPSE 8 /* Position index for ALAPSE bit 110#define MUSYCC_GCD_ALAPSE 8 /* Position index for ALAPSE bit
113 * field */ 111 * field */
114#define MUSYCC_GCD_ELAPSE 4 /* Position index for ELAPSE bit 112#define MUSYCC_GCD_ELAPSE 4 /* Position index for ELAPSE bit
115 * field */ 113 * field */
116#define MUSYCC_GCD_PORTMAP_3 3 /* Reserved */ 114#define MUSYCC_GCD_PORTMAP_3 3 /* Reserved */
117#define MUSYCC_GCD_PORTMAP_2 2 /* Port 0=>Grp 0,1,2,3; Port 1=>Grp 115#define MUSYCC_GCD_PORTMAP_2 2 /* Port 0=>Grp 0,1,2,3; Port 1=>Grp
118 * 4,5,6,7 */ 116 * 4,5,6,7 */
119#define MUSYCC_GCD_PORTMAP_1 1 /* Port 0=>Grp 0,1; Port 1=>Grp 2,3, 117#define MUSYCC_GCD_PORTMAP_1 1 /* Port 0=>Grp 0,1; Port 1=>Grp 2,3,
120 * etc... */ 118 * etc... */
121#define MUSYCC_GCD_PORTMAP_0 0 /* Port 0=>Grp 0; Port 1=>Grp 2, 119#define MUSYCC_GCD_PORTMAP_0 0 /* Port 0=>Grp 0; Port 1=>Grp 2,
122 * etc... */ 120 * etc... */
123 121
124/* and board specific assignments... */ 122/* and board specific assignments... */
125#ifdef SBE_WAN256T3_ENABLE 123#ifdef SBE_WAN256T3_ENABLE
@@ -137,57 +135,57 @@
137#endif 135#endif
138 136
139#define GCD_MAGIC (((BLAPSE_VAL)<<(MUSYCC_GCD_BLAPSE)) | \ 137#define GCD_MAGIC (((BLAPSE_VAL)<<(MUSYCC_GCD_BLAPSE)) | \
140 ((ALAPSE_VAL)<<(MUSYCC_GCD_ALAPSE)) | \ 138 ((ALAPSE_VAL)<<(MUSYCC_GCD_ALAPSE)) | \
141 ((ELAPSE_VAL)<<(MUSYCC_GCD_ELAPSE)) | \ 139 ((ELAPSE_VAL)<<(MUSYCC_GCD_ELAPSE)) | \
142 (MUSYCC_GCD_ECLK_ENABLE) | PORTMAP_VAL) 140 (MUSYCC_GCD_ECLK_ENABLE) | PORTMAP_VAL)
143 141
144/* Group Config Descriptor bit macros */ 142/* Group Config Descriptor bit macros */
145#define MUSYCC_GRCD_RX_ENABLE 0x00000001 /* Enable receive processing */ 143#define MUSYCC_GRCD_RX_ENABLE 0x00000001 /* Enable receive processing */
146#define MUSYCC_GRCD_TX_ENABLE 0x00000002 /* Enable transmit processing */ 144#define MUSYCC_GRCD_TX_ENABLE 0x00000002 /* Enable transmit processing */
147#define MUSYCC_GRCD_SUBCHAN_DISABLE 0x00000004 /* Master disable for 145#define MUSYCC_GRCD_SUBCHAN_DISABLE 0x00000004 /* Master disable for
148 * subchanneling */ 146 * subchanneling */
149#define MUSYCC_GRCD_OOFMP_DISABLE 0x00000008 /* Out of Frame message 147#define MUSYCC_GRCD_OOFMP_DISABLE 0x00000008 /* Out of Frame message
150 * processing disabled all 148 * processing disabled all
151 * channels */ 149 * channels */
152#define MUSYCC_GRCD_OOFIRQ_DISABLE 0x00000010 /* Out of Frame/In Frame irqs 150#define MUSYCC_GRCD_OOFIRQ_DISABLE 0x00000010 /* Out of Frame/In Frame irqs
153 * disabled */ 151 * disabled */
154#define MUSYCC_GRCD_COFAIRQ_DISABLE 0x00000020 /* Change of Frame Alignment 152#define MUSYCC_GRCD_COFAIRQ_DISABLE 0x00000020 /* Change of Frame Alignment
155 * irq disabled */ 153 * irq disabled */
156#define MUSYCC_GRCD_INHRBSD 0x00000100 /* Receive Buffer Status 154#define MUSYCC_GRCD_INHRBSD 0x00000100 /* Receive Buffer Status
157 * overwrite disabled */ 155 * overwrite disabled */
158#define MUSYCC_GRCD_INHTBSD 0x00000200 /* Transmit Buffer Status 156#define MUSYCC_GRCD_INHTBSD 0x00000200 /* Transmit Buffer Status
159 * overwrite disabled */ 157 * overwrite disabled */
160#define MUSYCC_GRCD_SF_ALIGN 0x00008000 /* External frame sync */ 158#define MUSYCC_GRCD_SF_ALIGN 0x00008000 /* External frame sync */
161#define MUSYCC_GRCD_MC_ENABLE 0x00000040 /* Message configuration bits 159#define MUSYCC_GRCD_MC_ENABLE 0x00000040 /* Message configuration bits
162 * copy enable. Conexant sez 160 * copy enable. Conexant sez
163 * turn this on */ 161 * turn this on */
164#define MUSYCC_GRCD_POLLTH_16 0x00000001 /* Poll every 16th frame */ 162#define MUSYCC_GRCD_POLLTH_16 0x00000001 /* Poll every 16th frame */
165#define MUSYCC_GRCD_POLLTH_32 0x00000002 /* Poll every 32nd frame */ 163#define MUSYCC_GRCD_POLLTH_32 0x00000002 /* Poll every 32nd frame */
166#define MUSYCC_GRCD_POLLTH_64 0x00000003 /* Poll every 64th frame */ 164#define MUSYCC_GRCD_POLLTH_64 0x00000003 /* Poll every 64th frame */
167#define MUSYCC_GRCD_POLLTH_SHIFT 10 /* Position index for poll throttle 165#define MUSYCC_GRCD_POLLTH_SHIFT 10 /* Position index for poll throttle
168 * bit field */ 166 * bit field */
169#define MUSYCC_GRCD_SUERM_THRESH_SHIFT 16 /* Position index for SUERM 167#define MUSYCC_GRCD_SUERM_THRESH_SHIFT 16 /* Position index for SUERM
170 * count threshold */ 168 * count threshold */
171 169
172/* Port Config Descriptor bit macros */ 170/* Port Config Descriptor bit macros */
173#define MUSYCC_PCD_E1X2_MODE 2 /* Port mode in bits 0-2. T1 and E1 */ 171#define MUSYCC_PCD_E1X2_MODE 2 /* Port mode in bits 0-2. T1 and E1 */
174#define MUSYCC_PCD_E1X4_MODE 3 /* are defined in cn847x.h */ 172#define MUSYCC_PCD_E1X4_MODE 3 /* are defined in cn847x.h */
175#define MUSYCC_PCD_NX64_MODE 4 173#define MUSYCC_PCD_NX64_MODE 4
176#define MUSYCC_PCD_TXDATA_RISING 0x00000010 /* Sample Tx data on TCLK 174#define MUSYCC_PCD_TXDATA_RISING 0x00000010 /* Sample Tx data on TCLK
177 * rising edge */ 175 * rising edge */
178#define MUSYCC_PCD_TXSYNC_RISING 0x00000020 /* Sample Tx frame sync on 176#define MUSYCC_PCD_TXSYNC_RISING 0x00000020 /* Sample Tx frame sync on
179 * TCLK rising edge */ 177 * TCLK rising edge */
180#define MUSYCC_PCD_RXDATA_RISING 0x00000040 /* Sample Rx data on RCLK 178#define MUSYCC_PCD_RXDATA_RISING 0x00000040 /* Sample Rx data on RCLK
181 * rising edge */ 179 * rising edge */
182#define MUSYCC_PCD_RXSYNC_RISING 0x00000080 /* Sample Rx frame sync on 180#define MUSYCC_PCD_RXSYNC_RISING 0x00000080 /* Sample Rx frame sync on
183 * RCLK rising edge */ 181 * RCLK rising edge */
184#define MUSYCC_PCD_ROOF_RISING 0x00000100 /* Sample Rx Out Of Frame 182#define MUSYCC_PCD_ROOF_RISING 0x00000100 /* Sample Rx Out Of Frame
185 * signal on RCLK rising edge */ 183 * signal on RCLK rising edge */
186#define MUSYCC_PCD_TX_DRIVEN 0x00000200 /* No mapped timeslots causes 184#define MUSYCC_PCD_TX_DRIVEN 0x00000200 /* No mapped timeslots causes
187 * logic 1 on output, else 185 * logic 1 on output, else
188 * tristate */ 186 * tristate */
189#define MUSYCC_PCD_PORTMODE_MASK 0xfffffff8 /* For changing the port mode 187#define MUSYCC_PCD_PORTMODE_MASK 0xfffffff8 /* For changing the port mode
190 * between E1 and T1 */ 188 * between E1 and T1 */
191 189
192/* Time Slot Descriptor bit macros */ 190/* Time Slot Descriptor bit macros */
193#define MUSYCC_TSD_MODE_64KBPS 4 191#define MUSYCC_TSD_MODE_64KBPS 4
@@ -202,17 +200,17 @@
202#define MUSYCC_CCD_BUFIRQ_DISABLE 0x00000002 /* BUFF and ONR irqs disabled */ 200#define MUSYCC_CCD_BUFIRQ_DISABLE 0x00000002 /* BUFF and ONR irqs disabled */
203#define MUSYCC_CCD_EOMIRQ_DISABLE 0x00000004 /* EOM irq disabled */ 201#define MUSYCC_CCD_EOMIRQ_DISABLE 0x00000004 /* EOM irq disabled */
204#define MUSYCC_CCD_MSGIRQ_DISABLE 0x00000008 /* LNG, FCS, ALIGN, and ABT 202#define MUSYCC_CCD_MSGIRQ_DISABLE 0x00000008 /* LNG, FCS, ALIGN, and ABT
205 * irqs disabled */ 203 * irqs disabled */
206#define MUSYCC_CCD_IDLEIRQ_DISABLE 0x00000010 /* CHABT, CHIC, and SHT irqs 204#define MUSYCC_CCD_IDLEIRQ_DISABLE 0x00000010 /* CHABT, CHIC, and SHT irqs
207 * disabled */ 205 * disabled */
208#define MUSYCC_CCD_FILTIRQ_DISABLE 0x00000020 /* SFILT irq disabled */ 206#define MUSYCC_CCD_FILTIRQ_DISABLE 0x00000020 /* SFILT irq disabled */
209#define MUSYCC_CCD_SDECIRQ_DISABLE 0x00000040 /* SDEC irq disabled */ 207#define MUSYCC_CCD_SDECIRQ_DISABLE 0x00000040 /* SDEC irq disabled */
210#define MUSYCC_CCD_SINCIRQ_DISABLE 0x00000080 /* SINC irq disabled */ 208#define MUSYCC_CCD_SINCIRQ_DISABLE 0x00000080 /* SINC irq disabled */
211#define MUSYCC_CCD_SUERIRQ_DISABLE 0x00000100 /* SUERR irq disabled */ 209#define MUSYCC_CCD_SUERIRQ_DISABLE 0x00000100 /* SUERR irq disabled */
212#define MUSYCC_CCD_FCS_XFER 0x00000200 /* Propagate FCS along with 210#define MUSYCC_CCD_FCS_XFER 0x00000200 /* Propagate FCS along with
213 * received data */ 211 * received data */
214#define MUSYCC_CCD_PROTO_SHIFT 12 /* Position index for protocol bit 212#define MUSYCC_CCD_PROTO_SHIFT 12 /* Position index for protocol bit
215 * field */ 213 * field */
216#define MUSYCC_CCD_TRANS 0 /* Protocol mode in bits 12-14 */ 214#define MUSYCC_CCD_TRANS 0 /* Protocol mode in bits 12-14 */
217#define MUSYCC_CCD_SS7 1 215#define MUSYCC_CCD_SS7 1
218#define MUSYCC_CCD_HDLC_FCS16 2 216#define MUSYCC_CCD_HDLC_FCS16 2
@@ -220,11 +218,11 @@
220#define MUSYCC_CCD_EOPIRQ_DISABLE 0x00008000 /* EOP irq disabled */ 218#define MUSYCC_CCD_EOPIRQ_DISABLE 0x00008000 /* EOP irq disabled */
221#define MUSYCC_CCD_INVERT_DATA 0x00800000 /* Invert data */ 219#define MUSYCC_CCD_INVERT_DATA 0x00800000 /* Invert data */
222#define MUSYCC_CCD_MAX_LENGTH 10 /* Position index for max length bit 220#define MUSYCC_CCD_MAX_LENGTH 10 /* Position index for max length bit
223 * field */ 221 * field */
224#define MUSYCC_CCD_BUFFER_LENGTH 16 /* Position index for internal data 222#define MUSYCC_CCD_BUFFER_LENGTH 16 /* Position index for internal data
225 * buffer length */ 223 * buffer length */
226#define MUSYCC_CCD_BUFFER_LOC 24 /* Position index for internal data 224#define MUSYCC_CCD_BUFFER_LOC 24 /* Position index for internal data
227 * buffer starting location */ 225 * buffer starting location */
228 226
229/**************************************************************************** 227/****************************************************************************
230 * Interrupt Descriptor Information */ 228 * Interrupt Descriptor Information */
@@ -266,7 +264,7 @@
266#define INTRPT_GRP_S 29 264#define INTRPT_GRP_S 29
267#define INTRPT_GRP_MSB_S 12 265#define INTRPT_GRP_MSB_S 12
268#define INTRPT_GRP(x) (((x & INTRPT_GRP_M) >> INTRPT_GRP_S) | \ 266#define INTRPT_GRP(x) (((x & INTRPT_GRP_M) >> INTRPT_GRP_S) | \
269 ((x & INTRPT_GRP_MSB_M) >> INTRPT_GRP_MSB_S)) 267 ((x & INTRPT_GRP_MSB_M) >> INTRPT_GRP_MSB_S))
270 268
271#define INTRPT_CH_M 0x1F000000 269#define INTRPT_CH_M 0x1F000000
272#define INTRPT_CH_S 24 270#define INTRPT_CH_S 24
@@ -295,82 +293,82 @@
295 293
296/* Buffer Descriptor bit macros */ 294/* Buffer Descriptor bit macros */
297#define OWNER_BIT 0x80000000 /* Set for MUSYCC owner on xmit, host 295#define OWNER_BIT 0x80000000 /* Set for MUSYCC owner on xmit, host
298 * owner on receive */ 296 * owner on receive */
299#define HOST_TX_OWNED 0x00000000 /* Host owns descriptor */ 297#define HOST_TX_OWNED 0x00000000 /* Host owns descriptor */
300#define MUSYCC_TX_OWNED 0x80000000 /* MUSYCC owns descriptor */ 298#define MUSYCC_TX_OWNED 0x80000000 /* MUSYCC owns descriptor */
301#define HOST_RX_OWNED 0x80000000 /* Host owns descriptor */ 299#define HOST_RX_OWNED 0x80000000 /* Host owns descriptor */
302#define MUSYCC_RX_OWNED 0x00000000 /* MUSYCC owns descriptor */ 300#define MUSYCC_RX_OWNED 0x00000000 /* MUSYCC owns descriptor */
303 301
304#define POLL_DISABLED 0x40000000 /* MUSYCC not allowed to poll buffer 302#define POLL_DISABLED 0x40000000 /* MUSYCC not allowed to poll buffer
305 * for ownership */ 303 * for ownership */
306#define EOMIRQ_ENABLE 0x20000000 /* This buffer contains the end of 304#define EOMIRQ_ENABLE 0x20000000 /* This buffer contains the end of
307 * the message */ 305 * the message */
308#define EOBIRQ_ENABLE 0x10000000 /* EOB irq enabled */ 306#define EOBIRQ_ENABLE 0x10000000 /* EOB irq enabled */
309#define PADFILL_ENABLE 0x01000000 /* Enable padfill */ 307#define PADFILL_ENABLE 0x01000000 /* Enable padfill */
310#define REPEAT_BIT 0x00008000 /* Bit on for FISU descriptor */ 308#define REPEAT_BIT 0x00008000 /* Bit on for FISU descriptor */
311#define LENGTH_MASK 0X3fff /* This part of status descriptor is 309#define LENGTH_MASK 0X3fff /* This part of status descriptor is
312 * length */ 310 * length */
313#define IDLE_CODE 25 /* Position index for idle code (2 311#define IDLE_CODE 25 /* Position index for idle code (2
314 * bits) */ 312 * bits) */
315#define EXTRA_FLAGS 16 /* Position index for minimum flags 313#define EXTRA_FLAGS 16 /* Position index for minimum flags
316 * between messages (8 bits) */ 314 * between messages (8 bits) */
317#define IDLE_CODE_MASK 0x03 /* Gets rid of garbage before the 315#define IDLE_CODE_MASK 0x03 /* Gets rid of garbage before the
318 * pattern is OR'd in */ 316 * pattern is OR'd in */
319#define EXTRA_FLAGS_MASK 0xff /* Gets rid of garbage before the 317#define EXTRA_FLAGS_MASK 0xff /* Gets rid of garbage before the
320 * pattern is OR'd in */ 318 * pattern is OR'd in */
321#define PCI_PERMUTED_OWNER_BIT 0x00000080 /* For flipping the bit on 319#define PCI_PERMUTED_OWNER_BIT 0x00000080 /* For flipping the bit on
322 * the polled mode descriptor */ 320 * the polled mode descriptor */
323 321
324/* Service Request Descriptor bit macros */ 322/* Service Request Descriptor bit macros */
325#define SREQ 8 /* Position index for service request bit 323#define SREQ 8 /* Position index for service request bit
326 * field */ 324 * field */
327#define SR_NOOP (0<<(SREQ)) /* No Operation. Generates SACK */ 325#define SR_NOOP (0<<(SREQ)) /* No Operation. Generates SACK */
328#define SR_CHIP_RESET (1<<(SREQ)) /* Soft chip reset */ 326#define SR_CHIP_RESET (1<<(SREQ)) /* Soft chip reset */
329#define SR_GROUP_RESET (2<<(SREQ)) /* Group reset */ 327#define SR_GROUP_RESET (2<<(SREQ)) /* Group reset */
330#define SR_GLOBAL_INIT (4<<(SREQ)) /* Global init: read global 328#define SR_GLOBAL_INIT (4<<(SREQ)) /* Global init: read global
331 * config deswc and interrupt 329 * config deswc and interrupt
332 * queue desc */ 330 * queue desc */
333#define SR_GROUP_INIT (5<<(SREQ)) /* Group init: read Timeslot 331#define SR_GROUP_INIT (5<<(SREQ)) /* Group init: read Timeslot
334 * and Subchannel maps, 332 * and Subchannel maps,
335 * Channel Config, */ 333 * Channel Config, */
336 /* 334 /*
337 * Group Config, Memory Protect, Message Length, and Port Config 335 * Group Config, Memory Protect, Message Length, and Port Config
338 * Descriptors 336 * Descriptors
339 */ 337 */
340#define SR_CHANNEL_ACTIVATE (8<<(SREQ)) /* Init channel, read Head 338#define SR_CHANNEL_ACTIVATE (8<<(SREQ)) /* Init channel, read Head
341 * Pointer, process first 339 * Pointer, process first
342 * Message Descriptor */ 340 * Message Descriptor */
343#define SR_GCHANNEL_MASK 0x001F /* channel portion (gchan) */ 341#define SR_GCHANNEL_MASK 0x001F /* channel portion (gchan) */
344#define SR_CHANNEL_DEACTIVATE (9<<(SREQ)) /* Stop channel processing */ 342#define SR_CHANNEL_DEACTIVATE (9<<(SREQ)) /* Stop channel processing */
345#define SR_JUMP (10<<(SREQ)) /* a: Process new Message 343#define SR_JUMP (10<<(SREQ)) /* a: Process new Message
346 * List */ 344 * List */
347#define SR_CHANNEL_CONFIG (11<<(SREQ)) /* b: Read channel 345#define SR_CHANNEL_CONFIG (11<<(SREQ)) /* b: Read channel
348 * Configuration Descriptor */ 346 * Configuration Descriptor */
349#define SR_GLOBAL_CONFIG (16<<(SREQ)) /* 10: Read Global 347#define SR_GLOBAL_CONFIG (16<<(SREQ)) /* 10: Read Global
350 * Configuration Descriptor */ 348 * Configuration Descriptor */
351#define SR_INTERRUPT_Q (17<<(SREQ)) /* 11: Read Interrupt Queue 349#define SR_INTERRUPT_Q (17<<(SREQ)) /* 11: Read Interrupt Queue
352 * Descriptor */ 350 * Descriptor */
353#define SR_GROUP_CONFIG (18<<(SREQ)) /* 12: Read Group 351#define SR_GROUP_CONFIG (18<<(SREQ)) /* 12: Read Group
354 * Configuration Descriptor */ 352 * Configuration Descriptor */
355#define SR_MEMORY_PROTECT (19<<(SREQ)) /* 13: Read Memory Protection 353#define SR_MEMORY_PROTECT (19<<(SREQ)) /* 13: Read Memory Protection
356 * Descriptor */ 354 * Descriptor */
357#define SR_MESSAGE_LENGTH (20<<(SREQ)) /* 14: Read Message Length 355#define SR_MESSAGE_LENGTH (20<<(SREQ)) /* 14: Read Message Length
358 * Descriptor */ 356 * Descriptor */
359#define SR_PORT_CONFIG (21<<(SREQ)) /* 15: Read Port 357#define SR_PORT_CONFIG (21<<(SREQ)) /* 15: Read Port
360 * Configuration Descriptor */ 358 * Configuration Descriptor */
361#define SR_TIMESLOT_MAP (24<<(SREQ)) /* 18: Read Timeslot Map */ 359#define SR_TIMESLOT_MAP (24<<(SREQ)) /* 18: Read Timeslot Map */
362#define SR_SUBCHANNEL_MAP (25<<(SREQ)) /* 19: Read Subchannel Map */ 360#define SR_SUBCHANNEL_MAP (25<<(SREQ)) /* 19: Read Subchannel Map */
363#define SR_CHAN_CONFIG_TABLE (26<<(SREQ)) /* 20: Read Channel 361#define SR_CHAN_CONFIG_TABLE (26<<(SREQ)) /* 20: Read Channel
364 * Configuration Table for 362 * Configuration Table for
365 * the group */ 363 * the group */
366#define SR_TX_DIRECTION 0x00000020 /* Transmit direction bit. 364#define SR_TX_DIRECTION 0x00000020 /* Transmit direction bit.
367 * Bit off indicates receive 365 * Bit off indicates receive
368 * direction */ 366 * direction */
369#define SR_RX_DIRECTION 0x00000000 367#define SR_RX_DIRECTION 0x00000000
370 368
371/* Interrupt Descriptor bit macros */ 369/* Interrupt Descriptor bit macros */
372#define GROUP10 29 /* Position index for the 2 LS group 370#define GROUP10 29 /* Position index for the 2 LS group
373 * bits */ 371 * bits */
374#define CHANNEL 24 /* Position index for channel bits */ 372#define CHANNEL 24 /* Position index for channel bits */
375#define INT_IQD_TX 0x80000000 373#define INT_IQD_TX 0x80000000
376#define INT_IQD_GRP 0x60000000 374#define INT_IQD_GRP 0x60000000
@@ -384,7 +382,7 @@
384/* Interrupt Descriptor Events */ 382/* Interrupt Descriptor Events */
385#define EVE_EVENT 20 /* Position index for event bits */ 383#define EVE_EVENT 20 /* Position index for event bits */
386#define EVE_NONE 0 /* No event to report in this 384#define EVE_NONE 0 /* No event to report in this
387 * interrupt */ 385 * interrupt */
388#define EVE_SACK 1 /* Service Request acknowledge */ 386#define EVE_SACK 1 /* Service Request acknowledge */
389#define EVE_EOB 2 /* End of Buffer */ 387#define EVE_EOB 2 /* End of Buffer */
390#define EVE_EOM 3 /* End of Message */ 388#define EVE_EOM 3 /* End of Message */
@@ -411,12 +409,12 @@
411#define ERR_PERR 15 /* PCI Parity Error */ 409#define ERR_PERR 15 /* PCI Parity Error */
412/* Other Stuff */ 410/* Other Stuff */
413#define TRANSMIT_DIRECTION 0x80000000 /* Transmit direction bit. Bit off 411#define TRANSMIT_DIRECTION 0x80000000 /* Transmit direction bit. Bit off
414 * indicates receive direction */ 412 * indicates receive direction */
415#define ILOST 0x00008000 /* Interrupt Lost */ 413#define ILOST 0x00008000 /* Interrupt Lost */
416#define GROUPMSB 0x00004000 /* Group number MSB */ 414#define GROUPMSB 0x00004000 /* Group number MSB */
417#define SACK_IMAGE 0x00100000 /* Used in IRQ for semaphore test */ 415#define SACK_IMAGE 0x00100000 /* Used in IRQ for semaphore test */
418#define INITIAL_STATUS 0x10000 /* IRQ status should be this after 416#define INITIAL_STATUS 0x10000 /* IRQ status should be this after
419 * reset */ 417 * reset */
420 418
421/* This must be defined on an entire channel group (Port) basis */ 419/* This must be defined on an entire channel group (Port) basis */
422#define SUERM_THRESHOLD 0x1f 420#define SUERM_THRESHOLD 0x1f
diff --git a/drivers/staging/cxt1e1/sbecrc.c b/drivers/staging/cxt1e1/sbecrc.c
index 3f3cd60ac367..87512a53f720 100644
--- a/drivers/staging/cxt1e1/sbecrc.c
+++ b/drivers/staging/cxt1e1/sbecrc.c
@@ -44,25 +44,23 @@ static u_int32_t CRCTable[CRC_TABLE_ENTRIES];
44***************************************************************************/ 44***************************************************************************/
45 45
46static void 46static void
47genCrcTable (u_int32_t *CRCTable) 47genCrcTable(u_int32_t *CRCTable)
48{ 48{
49 int ii, jj; 49 int ii, jj;
50 u_int32_t crc; 50 u_int32_t crc;
51 51
52 for (ii = 0; ii < CRC_TABLE_ENTRIES; ii++) 52 for (ii = 0; ii < CRC_TABLE_ENTRIES; ii++) {
53 { 53 crc = ii;
54 crc = ii; 54 for (jj = 8; jj > 0; jj--) {
55 for (jj = 8; jj > 0; jj--) 55 if (crc & 1)
56 { 56 crc = (crc >> 1) ^ CRC32_POLYNOMIAL;
57 if (crc & 1) 57 else
58 crc = (crc >> 1) ^ CRC32_POLYNOMIAL; 58 crc >>= 1;
59 else 59 }
60 crc >>= 1; 60 CRCTable[ii] = crc;
61 } 61 }
62 CRCTable[ii] = crc; 62
63 } 63 crcTableInit++;
64
65 crcTableInit++;
66} 64}
67 65
68 66
@@ -85,52 +83,49 @@ genCrcTable (u_int32_t *CRCTable)
85*/ 83*/
86 84
87void 85void
88sbeCrc (u_int8_t *buffer, /* data buffer to crc */ 86sbeCrc(u_int8_t *buffer, /* data buffer to crc */
89 u_int32_t count, /* length of block in bytes */ 87 u_int32_t count, /* length of block in bytes */
90 u_int32_t initialCrc, /* starting CRC */ 88 u_int32_t initialCrc, /* starting CRC */
91 u_int32_t *result) 89 u_int32_t *result)
92{ 90{
93 u_int32_t *tbl = 0; 91 u_int32_t *tbl = 0;
94 u_int32_t temp1, temp2, crc; 92 u_int32_t temp1, temp2, crc;
95 93
96 /* 94 /*
97 * if table not yet created, do so. Don't care about "extra" time 95 * if table not yet created, do so. Don't care about "extra" time
98 * checking this every time sbeCrc() is called, since CRC calculations are 96 * checking this every time sbeCrc() is called, since CRC calculations
99 * already time consuming 97 * are already time consuming
100 */ 98 */
101 if (!crcTableInit) 99 if (!crcTableInit) {
102 {
103#ifdef STATIC_CRC_TABLE 100#ifdef STATIC_CRC_TABLE
104 tbl = &CRCTable; 101 tbl = &CRCTable;
105 genCrcTable (tbl); 102 genCrcTable(tbl);
106#else 103#else
107 tbl = (u_int32_t *) OS_kmalloc (CRC_TABLE_ENTRIES * sizeof (u_int32_t)); 104 tbl = (u_int32_t *) OS_kmalloc(CRC_TABLE_ENTRIES * sizeof(u_int32_t));
108 if (tbl == 0) 105 if (tbl == 0) {
109 { 106 *result = 0; /* dummy up return value due to malloc
110 *result = 0; /* dummy up return value due to malloc 107 * failure */
111 * failure */ 108 return;
112 return; 109 }
113 } 110 genCrcTable(tbl);
114 genCrcTable (tbl);
115#endif 111#endif
116 } 112 }
117 /* inverting bits makes ZMODEM & PKZIP compatible */ 113 /* inverting bits makes ZMODEM & PKZIP compatible */
118 crc = initialCrc ^ 0xFFFFFFFFL; 114 crc = initialCrc ^ 0xFFFFFFFFL;
119 115
120 while (count-- != 0) 116 while (count-- != 0) {
121 { 117 temp1 = (crc >> 8) & 0x00FFFFFFL;
122 temp1 = (crc >> 8) & 0x00FFFFFFL; 118 temp2 = tbl[((int) crc ^ *buffer++) & 0xff];
123 temp2 = tbl[((int) crc ^ *buffer++) & 0xff]; 119 crc = temp1 ^ temp2;
124 crc = temp1 ^ temp2; 120 }
125 }
126 121
127 crc ^= 0xFFFFFFFFL; 122 crc ^= 0xFFFFFFFFL;
128 123
129 *result = crc; 124 *result = crc;
130 125
131#ifndef STATIC_CRC_TABLE 126#ifndef STATIC_CRC_TABLE
132 crcTableInit = 0; 127 crcTableInit = 0;
133 OS_kfree (tbl); 128 OS_kfree(tbl);
134#endif 129#endif
135} 130}
136 131
diff --git a/drivers/staging/dgrp/dgrp_dpa_ops.c b/drivers/staging/dgrp/dgrp_dpa_ops.c
index 49e670915e5c..021cca498f2c 100644
--- a/drivers/staging/dgrp/dgrp_dpa_ops.c
+++ b/drivers/staging/dgrp/dgrp_dpa_ops.c
@@ -387,7 +387,7 @@ static long dgrp_dpa_ioctl(struct file *file, unsigned int cmd,
387 387
388 port = getchan.ch_port; 388 port = getchan.ch_port;
389 389
390 if (port < 0 || port > nd->nd_chan_count) 390 if (port > nd->nd_chan_count)
391 return -EINVAL; 391 return -EINVAL;
392 392
393 ch = nd->nd_chan + port; 393 ch = nd->nd_chan + port;
diff --git a/drivers/staging/dgrp/dgrp_net_ops.c b/drivers/staging/dgrp/dgrp_net_ops.c
index ab839ea3b44c..c409cd03e8c1 100644
--- a/drivers/staging/dgrp/dgrp_net_ops.c
+++ b/drivers/staging/dgrp/dgrp_net_ops.c
@@ -1057,13 +1057,13 @@ static int dgrp_net_release(struct inode *inode, struct file *file)
1057 1057
1058 spin_unlock_irqrestore(&dgrp_poll_data.poll_lock, lock_flags); 1058 spin_unlock_irqrestore(&dgrp_poll_data.poll_lock, lock_flags);
1059 1059
1060done:
1061 down(&nd->nd_net_semaphore); 1060 down(&nd->nd_net_semaphore);
1062 1061
1063 dgrp_monitor_message(nd, "Net Close"); 1062 dgrp_monitor_message(nd, "Net Close");
1064 1063
1065 up(&nd->nd_net_semaphore); 1064 up(&nd->nd_net_semaphore);
1066 1065
1066done:
1067 module_put(THIS_MODULE); 1067 module_put(THIS_MODULE);
1068 file->private_data = NULL; 1068 file->private_data = NULL;
1069 return 0; 1069 return 0;
@@ -1671,6 +1671,9 @@ static int dgrp_send(struct nd_struct *nd, long tmax)
1671 * do the job. 1671 * do the job.
1672 */ 1672 */
1673 1673
1674 /* FIXME: jiffies - ch->ch_waketime can never
1675 be < 0. Someone needs to work out what is
1676 actually intended here */
1674 if (ch->ch_pun.un_open_count && 1677 if (ch->ch_pun.un_open_count &&
1675 (ch->ch_pun.un_flag & 1678 (ch->ch_pun.un_flag &
1676 (UN_EMPTY|UN_TIME|UN_LOW|UN_PWAIT)) != 0) { 1679 (UN_EMPTY|UN_TIME|UN_LOW|UN_PWAIT)) != 0) {
diff --git a/drivers/staging/dgrp/dgrp_sysfs.c b/drivers/staging/dgrp/dgrp_sysfs.c
index e5a3c88d016e..43ab9f4d9349 100644
--- a/drivers/staging/dgrp/dgrp_sysfs.c
+++ b/drivers/staging/dgrp/dgrp_sysfs.c
@@ -17,7 +17,6 @@
17#include "dgrp_common.h" 17#include "dgrp_common.h"
18 18
19#include <linux/kernel.h> 19#include <linux/kernel.h>
20#include <linux/version.h>
21#include <linux/module.h> 20#include <linux/module.h>
22#include <linux/ctype.h> 21#include <linux/ctype.h>
23#include <linux/string.h> 22#include <linux/string.h>
@@ -177,7 +176,7 @@ static ssize_t dgrp_node_description_show(struct device *c,
177 if (!nd) 176 if (!nd)
178 return 0; 177 return 0;
179 178
180 if (nd->nd_state == NS_READY && nd->nd_ps_desc) 179 if (nd->nd_state == NS_READY)
181 return snprintf(buf, PAGE_SIZE, "%s\n", nd->nd_ps_desc); 180 return snprintf(buf, PAGE_SIZE, "%s\n", nd->nd_ps_desc);
182 return 0; 181 return 0;
183} 182}
diff --git a/drivers/staging/dgrp/dgrp_tty.c b/drivers/staging/dgrp/dgrp_tty.c
index e125b03598d7..efa62ced7c8a 100644
--- a/drivers/staging/dgrp/dgrp_tty.c
+++ b/drivers/staging/dgrp/dgrp_tty.c
@@ -2615,21 +2615,6 @@ static int dgrp_tty_ioctl(struct tty_struct *tty, unsigned int cmd,
2615 */ 2615 */
2616 return 0; 2616 return 0;
2617 2617
2618 case TIOCGSOFTCAR:
2619 rc = access_ok(VERIFY_WRITE, (void __user *) arg,
2620 sizeof(long));
2621 if (rc == 0)
2622 return -EFAULT;
2623 put_user(C_CLOCAL(tty) ? 1 : 0, (unsigned long __user *) arg);
2624 return 0;
2625
2626 case TIOCSSOFTCAR:
2627 get_user(arg, (unsigned long __user *) arg);
2628 tty->termios.c_cflag =
2629 ((tty->termios.c_cflag & ~CLOCAL) |
2630 (arg ? CLOCAL : 0));
2631 return 0;
2632
2633 case TIOCMGET: 2618 case TIOCMGET:
2634 rc = access_ok(VERIFY_WRITE, (void __user *) arg, 2619 rc = access_ok(VERIFY_WRITE, (void __user *) arg,
2635 sizeof(unsigned int)); 2620 sizeof(unsigned int));
diff --git a/drivers/staging/et131x/README b/drivers/staging/et131x/README
index 82657233c8b6..38537d4c4e14 100644
--- a/drivers/staging/et131x/README
+++ b/drivers/staging/et131x/README
@@ -8,7 +8,7 @@ Note, the powermanagement options were removed from the vendor provided
8driver as they did not build properly at the time. 8driver as they did not build properly at the time.
9 9
10TODO: 10TODO:
11 - Use of kmem_cache seems a bit unusual 11 - some rx packets have CRC/code/frame errors
12 12
13Please send patches to: 13Please send patches to:
14 Greg Kroah-Hartman <gregkh@linuxfoundation.org> 14 Greg Kroah-Hartman <gregkh@linuxfoundation.org>
diff --git a/drivers/staging/et131x/et131x.c b/drivers/staging/et131x/et131x.c
index 413da0d6b9f6..84bbcd48e264 100644
--- a/drivers/staging/et131x/et131x.c
+++ b/drivers/staging/et131x/et131x.c
@@ -143,7 +143,6 @@ MODULE_DESCRIPTION("10/100/1000 Base-T Ethernet Driver for the ET1310 by Agere S
143#define fMP_DEST_BROAD 0x00000002 143#define fMP_DEST_BROAD 0x00000002
144 144
145/* MP_ADAPTER flags */ 145/* MP_ADAPTER flags */
146#define fMP_ADAPTER_RECV_LOOKASIDE 0x00000004
147#define fMP_ADAPTER_INTERRUPT_IN_USE 0x00000008 146#define fMP_ADAPTER_INTERRUPT_IN_USE 0x00000008
148 147
149/* MP_SHARED flags */ 148/* MP_SHARED flags */
@@ -176,22 +175,14 @@ MODULE_DESCRIPTION("10/100/1000 Base-T Ethernet Driver for the ET1310 by Agere S
176#define PARM_DMA_CACHE_DEF 0 175#define PARM_DMA_CACHE_DEF 0
177 176
178/* RX defines */ 177/* RX defines */
179#define USE_FBR0 1 178#define FBR_CHUNKS 32
180#define FBR_CHUNKS 32 179#define MAX_DESC_PER_RING_RX 1024
181#define MAX_DESC_PER_RING_RX 1024
182 180
183/* number of RFDs - default and min */ 181/* number of RFDs - default and min */
184#ifdef USE_FBR0
185#define RFD_LOW_WATER_MARK 40 182#define RFD_LOW_WATER_MARK 40
186#define NIC_DEFAULT_NUM_RFD 1024 183#define NIC_DEFAULT_NUM_RFD 1024
187#define NUM_FBRS 2 184#define NUM_FBRS 2
188#else
189#define RFD_LOW_WATER_MARK 20
190#define NIC_DEFAULT_NUM_RFD 256
191#define NUM_FBRS 1
192#endif
193 185
194#define NIC_MIN_NUM_RFD 64
195#define NUM_PACKETS_HANDLED 256 186#define NUM_PACKETS_HANDLED 256
196 187
197#define ALCATEL_MULTICAST_PKT 0x01000000 188#define ALCATEL_MULTICAST_PKT 0x01000000
@@ -291,29 +282,20 @@ struct rx_status_block {
291 */ 282 */
292struct fbr_lookup { 283struct fbr_lookup {
293 void *virt[MAX_DESC_PER_RING_RX]; 284 void *virt[MAX_DESC_PER_RING_RX];
294 void *buffer1[MAX_DESC_PER_RING_RX];
295 void *buffer2[MAX_DESC_PER_RING_RX];
296 u32 bus_high[MAX_DESC_PER_RING_RX]; 285 u32 bus_high[MAX_DESC_PER_RING_RX];
297 u32 bus_low[MAX_DESC_PER_RING_RX]; 286 u32 bus_low[MAX_DESC_PER_RING_RX];
298 void *ring_virtaddr; 287 void *ring_virtaddr;
299 dma_addr_t ring_physaddr; 288 dma_addr_t ring_physaddr;
300 void *mem_virtaddrs[MAX_DESC_PER_RING_RX / FBR_CHUNKS]; 289 void *mem_virtaddrs[MAX_DESC_PER_RING_RX / FBR_CHUNKS];
301 dma_addr_t mem_physaddrs[MAX_DESC_PER_RING_RX / FBR_CHUNKS]; 290 dma_addr_t mem_physaddrs[MAX_DESC_PER_RING_RX / FBR_CHUNKS];
302 u64 real_physaddr;
303 u64 offset;
304 u32 local_full; 291 u32 local_full;
305 u32 num_entries; 292 u32 num_entries;
306 u32 buffsize; 293 dma_addr_t buffsize;
307}; 294};
308 295
309/* 296/*
310 * struct rx_ring is the sructure representing the adaptor's local 297 * struct rx_ring is the sructure representing the adaptor's local
311 * reference(s) to the rings 298 * reference(s) to the rings
312 *
313 ******************************************************************************
314 * IMPORTANT NOTE :- fbr_lookup *fbr[NUM_FBRS] uses index 0 to refer to FBR1
315 * and index 1 to refer to FRB0
316 ******************************************************************************
317 */ 299 */
318struct rx_ring { 300struct rx_ring {
319 struct fbr_lookup *fbr[NUM_FBRS]; 301 struct fbr_lookup *fbr[NUM_FBRS];
@@ -332,9 +314,6 @@ struct rx_ring {
332 u32 num_rfd; 314 u32 num_rfd;
333 315
334 bool unfinished_receives; 316 bool unfinished_receives;
335
336 /* lookaside lists */
337 struct kmem_cache *recv_lookaside;
338}; 317};
339 318
340/* TX defines */ 319/* TX defines */
@@ -866,28 +845,27 @@ static void et131x_rx_dma_enable(struct et131x_adapter *adapter)
866 /* Setup the receive dma configuration register for normal operation */ 845 /* Setup the receive dma configuration register for normal operation */
867 u32 csr = 0x2000; /* FBR1 enable */ 846 u32 csr = 0x2000; /* FBR1 enable */
868 847
869 if (adapter->rx_ring.fbr[0]->buffsize == 4096) 848 if (adapter->rx_ring.fbr[1]->buffsize == 4096)
870 csr |= 0x0800; 849 csr |= 0x0800;
871 else if (adapter->rx_ring.fbr[0]->buffsize == 8192) 850 else if (adapter->rx_ring.fbr[1]->buffsize == 8192)
872 csr |= 0x1000; 851 csr |= 0x1000;
873 else if (adapter->rx_ring.fbr[0]->buffsize == 16384) 852 else if (adapter->rx_ring.fbr[1]->buffsize == 16384)
874 csr |= 0x1800; 853 csr |= 0x1800;
875#ifdef USE_FBR0 854
876 csr |= 0x0400; /* FBR0 enable */ 855 csr |= 0x0400; /* FBR0 enable */
877 if (adapter->rx_ring.fbr[1]->buffsize == 256) 856 if (adapter->rx_ring.fbr[0]->buffsize == 256)
878 csr |= 0x0100; 857 csr |= 0x0100;
879 else if (adapter->rx_ring.fbr[1]->buffsize == 512) 858 else if (adapter->rx_ring.fbr[0]->buffsize == 512)
880 csr |= 0x0200; 859 csr |= 0x0200;
881 else if (adapter->rx_ring.fbr[1]->buffsize == 1024) 860 else if (adapter->rx_ring.fbr[0]->buffsize == 1024)
882 csr |= 0x0300; 861 csr |= 0x0300;
883#endif
884 writel(csr, &adapter->regs->rxdma.csr); 862 writel(csr, &adapter->regs->rxdma.csr);
885 863
886 csr = readl(&adapter->regs->rxdma.csr); 864 csr = readl(&adapter->regs->rxdma.csr);
887 if ((csr & 0x00020000) != 0) { 865 if (csr & 0x00020000) {
888 udelay(5); 866 udelay(5);
889 csr = readl(&adapter->regs->rxdma.csr); 867 csr = readl(&adapter->regs->rxdma.csr);
890 if ((csr & 0x00020000) != 0) { 868 if (csr & 0x00020000) {
891 dev_err(&adapter->pdev->dev, 869 dev_err(&adapter->pdev->dev,
892 "RX Dma failed to exit halt state. CSR 0x%08x\n", 870 "RX Dma failed to exit halt state. CSR 0x%08x\n",
893 csr); 871 csr);
@@ -1758,22 +1736,8 @@ static void et1310_phy_power_down(struct et131x_adapter *adapter, bool down)
1758 */ 1736 */
1759static void et131x_xcvr_init(struct et131x_adapter *adapter) 1737static void et131x_xcvr_init(struct et131x_adapter *adapter)
1760{ 1738{
1761 u16 imr;
1762 u16 isr;
1763 u16 lcr2; 1739 u16 lcr2;
1764 1740
1765 et131x_mii_read(adapter, PHY_INTERRUPT_STATUS, &isr);
1766 et131x_mii_read(adapter, PHY_INTERRUPT_MASK, &imr);
1767
1768 /* Set the link status interrupt only. Bad behavior when link status
1769 * and auto neg are set, we run into a nested interrupt problem
1770 */
1771 imr |= (ET_PHY_INT_MASK_AUTONEGSTAT |
1772 ET_PHY_INT_MASK_LINKSTAT |
1773 ET_PHY_INT_MASK_ENABLE);
1774
1775 et131x_mii_write(adapter, PHY_INTERRUPT_MASK, imr);
1776
1777 /* Set the LED behavior such that LED 1 indicates speed (off = 1741 /* Set the LED behavior such that LED 1 indicates speed (off =
1778 * 10Mbits, blink = 100Mbits, on = 1000Mbits) and LED 2 indicates 1742 * 10Mbits, blink = 100Mbits, on = 1000Mbits) and LED 2 indicates
1779 * link and activity (on for link, blink off for activity). 1743 * link and activity (on for link, blink off for activity).
@@ -1798,7 +1762,7 @@ static void et131x_xcvr_init(struct et131x_adapter *adapter)
1798} 1762}
1799 1763
1800/** 1764/**
1801 * et131x_configure_global_regs - configure JAGCore global regs 1765 * et131x_configure_global_regs - configure JAGCore global regs
1802 * @adapter: pointer to our adapter structure 1766 * @adapter: pointer to our adapter structure
1803 * 1767 *
1804 * Used to configure the global registers on the JAGCore 1768 * Used to configure the global registers on the JAGCore
@@ -1856,29 +1820,22 @@ static void et131x_config_rx_dma_regs(struct et131x_adapter *adapter)
1856 u32 entry; 1820 u32 entry;
1857 u32 psr_num_des; 1821 u32 psr_num_des;
1858 unsigned long flags; 1822 unsigned long flags;
1823 u8 id;
1859 1824
1860 /* Halt RXDMA to perform the reconfigure. */ 1825 /* Halt RXDMA to perform the reconfigure. */
1861 et131x_rx_dma_disable(adapter); 1826 et131x_rx_dma_disable(adapter);
1862 1827
1863 /* Load the completion writeback physical address 1828 /* Load the completion writeback physical address */
1864 * 1829 writel(upper_32_bits(rx_local->rx_status_bus), &rx_dma->dma_wb_base_hi);
1865 * NOTE : dma_alloc_coherent(), used above to alloc DMA regions, 1830 writel(lower_32_bits(rx_local->rx_status_bus), &rx_dma->dma_wb_base_lo);
1866 * ALWAYS returns SAC (32-bit) addresses. If DAC (64-bit) addresses
1867 * are ever returned, make sure the high part is retrieved here
1868 * before storing the adjusted address.
1869 */
1870 writel((u32) ((u64)rx_local->rx_status_bus >> 32),
1871 &rx_dma->dma_wb_base_hi);
1872 writel((u32) rx_local->rx_status_bus, &rx_dma->dma_wb_base_lo);
1873 1831
1874 memset(rx_local->rx_status_block, 0, sizeof(struct rx_status_block)); 1832 memset(rx_local->rx_status_block, 0, sizeof(struct rx_status_block));
1875 1833
1876 /* Set the address and parameters of the packet status ring into the 1834 /* Set the address and parameters of the packet status ring into the
1877 * 1310's registers 1835 * 1310's registers
1878 */ 1836 */
1879 writel((u32) ((u64)rx_local->ps_ring_physaddr >> 32), 1837 writel(upper_32_bits(rx_local->ps_ring_physaddr), &rx_dma->psr_base_hi);
1880 &rx_dma->psr_base_hi); 1838 writel(lower_32_bits(rx_local->ps_ring_physaddr), &rx_dma->psr_base_lo);
1881 writel((u32) rx_local->ps_ring_physaddr, &rx_dma->psr_base_lo);
1882 writel(rx_local->psr_num_entries - 1, &rx_dma->psr_num_des); 1839 writel(rx_local->psr_num_entries - 1, &rx_dma->psr_num_des);
1883 writel(0, &rx_dma->psr_full_offset); 1840 writel(0, &rx_dma->psr_full_offset);
1884 1841
@@ -1891,56 +1848,56 @@ static void et131x_config_rx_dma_regs(struct et131x_adapter *adapter)
1891 /* These local variables track the PSR in the adapter structure */ 1848 /* These local variables track the PSR in the adapter structure */
1892 rx_local->local_psr_full = 0; 1849 rx_local->local_psr_full = 0;
1893 1850
1894 /* Now's the best time to initialize FBR1 contents */ 1851 for (id = 0; id < NUM_FBRS; id++) {
1895 fbr_entry = (struct fbr_desc *) rx_local->fbr[0]->ring_virtaddr; 1852 u32 *num_des;
1896 for (entry = 0; entry < rx_local->fbr[0]->num_entries; entry++) { 1853 u32 *full_offset;
1897 fbr_entry->addr_hi = rx_local->fbr[0]->bus_high[entry]; 1854 u32 *min_des;
1898 fbr_entry->addr_lo = rx_local->fbr[0]->bus_low[entry]; 1855 u32 *base_hi;
1899 fbr_entry->word2 = entry; 1856 u32 *base_lo;
1900 fbr_entry++; 1857
1901 } 1858 if (id == 0) {
1902 1859 num_des = &rx_dma->fbr0_num_des;
1903 /* Set the address and parameters of Free buffer ring 1 (and 0 if 1860 full_offset = &rx_dma->fbr0_full_offset;
1904 * required) into the 1310's registers 1861 min_des = &rx_dma->fbr0_min_des;
1905 */ 1862 base_hi = &rx_dma->fbr0_base_hi;
1906 writel((u32) (rx_local->fbr[0]->real_physaddr >> 32), 1863 base_lo = &rx_dma->fbr0_base_lo;
1907 &rx_dma->fbr1_base_hi); 1864 } else {
1908 writel((u32) rx_local->fbr[0]->real_physaddr, &rx_dma->fbr1_base_lo); 1865 num_des = &rx_dma->fbr1_num_des;
1909 writel(rx_local->fbr[0]->num_entries - 1, &rx_dma->fbr1_num_des); 1866 full_offset = &rx_dma->fbr1_full_offset;
1910 writel(ET_DMA10_WRAP, &rx_dma->fbr1_full_offset); 1867 min_des = &rx_dma->fbr1_min_des;
1911 1868 base_hi = &rx_dma->fbr1_base_hi;
1912 /* This variable tracks the free buffer ring 1 full position, so it 1869 base_lo = &rx_dma->fbr1_base_lo;
1913 * has to match the above. 1870 }
1914 */
1915 rx_local->fbr[0]->local_full = ET_DMA10_WRAP;
1916 writel(
1917 ((rx_local->fbr[0]->num_entries * LO_MARK_PERCENT_FOR_RX) / 100) - 1,
1918 &rx_dma->fbr1_min_des);
1919
1920#ifdef USE_FBR0
1921 /* Now's the best time to initialize FBR0 contents */
1922 fbr_entry = (struct fbr_desc *) rx_local->fbr[1]->ring_virtaddr;
1923 for (entry = 0; entry < rx_local->fbr[1]->num_entries; entry++) {
1924 fbr_entry->addr_hi = rx_local->fbr[1]->bus_high[entry];
1925 fbr_entry->addr_lo = rx_local->fbr[1]->bus_low[entry];
1926 fbr_entry->word2 = entry;
1927 fbr_entry++;
1928 }
1929 1871
1930 writel((u32) (rx_local->fbr[1]->real_physaddr >> 32), 1872 /* Now's the best time to initialize FBR contents */
1931 &rx_dma->fbr0_base_hi); 1873 fbr_entry =
1932 writel((u32) rx_local->fbr[1]->real_physaddr, &rx_dma->fbr0_base_lo); 1874 (struct fbr_desc *) rx_local->fbr[id]->ring_virtaddr;
1933 writel(rx_local->fbr[1]->num_entries - 1, &rx_dma->fbr0_num_des); 1875 for (entry = 0;
1934 writel(ET_DMA10_WRAP, &rx_dma->fbr0_full_offset); 1876 entry < rx_local->fbr[id]->num_entries; entry++) {
1877 fbr_entry->addr_hi = rx_local->fbr[id]->bus_high[entry];
1878 fbr_entry->addr_lo = rx_local->fbr[id]->bus_low[entry];
1879 fbr_entry->word2 = entry;
1880 fbr_entry++;
1881 }
1935 1882
1936 /* This variable tracks the free buffer ring 0 full position, so it 1883 /* Set the address and parameters of Free buffer ring 1 and 0
1937 * has to match the above. 1884 * into the 1310's registers
1938 */ 1885 */
1939 rx_local->fbr[1]->local_full = ET_DMA10_WRAP; 1886 writel(upper_32_bits(rx_local->fbr[id]->ring_physaddr),
1940 writel( 1887 base_hi);
1941 ((rx_local->fbr[1]->num_entries * LO_MARK_PERCENT_FOR_RX) / 100) - 1, 1888 writel(lower_32_bits(rx_local->fbr[id]->ring_physaddr),
1942 &rx_dma->fbr0_min_des); 1889 base_lo);
1943#endif 1890 writel(rx_local->fbr[id]->num_entries - 1, num_des);
1891 writel(ET_DMA10_WRAP, full_offset);
1892
1893 /* This variable tracks the free buffer ring 1 full position,
1894 * so it has to match the above.
1895 */
1896 rx_local->fbr[id]->local_full = ET_DMA10_WRAP;
1897 writel(((rx_local->fbr[id]->num_entries *
1898 LO_MARK_PERCENT_FOR_RX) / 100) - 1,
1899 min_des);
1900 }
1944 1901
1945 /* Program the number of packets we will receive before generating an 1902 /* Program the number of packets we will receive before generating an
1946 * interrupt. 1903 * interrupt.
@@ -1971,18 +1928,19 @@ static void et131x_config_tx_dma_regs(struct et131x_adapter *adapter)
1971 struct txdma_regs __iomem *txdma = &adapter->regs->txdma; 1928 struct txdma_regs __iomem *txdma = &adapter->regs->txdma;
1972 1929
1973 /* Load the hardware with the start of the transmit descriptor ring. */ 1930 /* Load the hardware with the start of the transmit descriptor ring. */
1974 writel((u32) ((u64)adapter->tx_ring.tx_desc_ring_pa >> 32), 1931 writel(upper_32_bits(adapter->tx_ring.tx_desc_ring_pa),
1975 &txdma->pr_base_hi); 1932 &txdma->pr_base_hi);
1976 writel((u32) adapter->tx_ring.tx_desc_ring_pa, 1933 writel(lower_32_bits(adapter->tx_ring.tx_desc_ring_pa),
1977 &txdma->pr_base_lo); 1934 &txdma->pr_base_lo);
1978 1935
1979 /* Initialise the transmit DMA engine */ 1936 /* Initialise the transmit DMA engine */
1980 writel(NUM_DESC_PER_RING_TX - 1, &txdma->pr_num_des); 1937 writel(NUM_DESC_PER_RING_TX - 1, &txdma->pr_num_des);
1981 1938
1982 /* Load the completion writeback physical address */ 1939 /* Load the completion writeback physical address */
1983 writel((u32)((u64)adapter->tx_ring.tx_status_pa >> 32), 1940 writel(upper_32_bits(adapter->tx_ring.tx_status_pa),
1984 &txdma->dma_wb_base_hi); 1941 &txdma->dma_wb_base_hi);
1985 writel((u32)adapter->tx_ring.tx_status_pa, &txdma->dma_wb_base_lo); 1942 writel(lower_32_bits(adapter->tx_ring.tx_status_pa),
1943 &txdma->dma_wb_base_lo);
1986 1944
1987 *adapter->tx_ring.tx_status = 0; 1945 *adapter->tx_ring.tx_status = 0;
1988 1946
@@ -2267,31 +2225,6 @@ static inline u32 bump_free_buff_ring(u32 *free_buff_ring, u32 limit)
2267} 2225}
2268 2226
2269/** 2227/**
2270 * et131x_align_allocated_memory - Align allocated memory on a given boundary
2271 * @adapter: pointer to our adapter structure
2272 * @phys_addr: pointer to Physical address
2273 * @offset: pointer to the offset variable
2274 * @mask: correct mask
2275 */
2276static void et131x_align_allocated_memory(struct et131x_adapter *adapter,
2277 u64 *phys_addr, u64 *offset,
2278 u64 mask)
2279{
2280 u64 new_addr = *phys_addr & ~mask;
2281
2282 *offset = 0;
2283
2284 if (new_addr != *phys_addr) {
2285 /* Move to next aligned block */
2286 new_addr += mask + 1;
2287 /* Return offset for adjusting virt addr */
2288 *offset = new_addr - *phys_addr;
2289 /* Return new physical address */
2290 *phys_addr = new_addr;
2291 }
2292}
2293
2294/**
2295 * et131x_rx_dma_memory_alloc 2228 * et131x_rx_dma_memory_alloc
2296 * @adapter: pointer to our private adapter structure 2229 * @adapter: pointer to our private adapter structure
2297 * 2230 *
@@ -2302,19 +2235,19 @@ static void et131x_align_allocated_memory(struct et131x_adapter *adapter,
2302 */ 2235 */
2303static int et131x_rx_dma_memory_alloc(struct et131x_adapter *adapter) 2236static int et131x_rx_dma_memory_alloc(struct et131x_adapter *adapter)
2304{ 2237{
2238 u8 id;
2305 u32 i, j; 2239 u32 i, j;
2306 u32 bufsize; 2240 u32 bufsize;
2307 u32 pktstat_ringsize, fbr_chunksize; 2241 u32 pktstat_ringsize;
2242 u32 fbr_chunksize;
2308 struct rx_ring *rx_ring; 2243 struct rx_ring *rx_ring;
2309 2244
2310 /* Setup some convenience pointers */ 2245 /* Setup some convenience pointers */
2311 rx_ring = &adapter->rx_ring; 2246 rx_ring = &adapter->rx_ring;
2312 2247
2313 /* Alloc memory for the lookup table */ 2248 /* Alloc memory for the lookup table */
2314#ifdef USE_FBR0
2315 rx_ring->fbr[1] = kmalloc(sizeof(struct fbr_lookup), GFP_KERNEL);
2316#endif
2317 rx_ring->fbr[0] = kmalloc(sizeof(struct fbr_lookup), GFP_KERNEL); 2249 rx_ring->fbr[0] = kmalloc(sizeof(struct fbr_lookup), GFP_KERNEL);
2250 rx_ring->fbr[1] = kmalloc(sizeof(struct fbr_lookup), GFP_KERNEL);
2318 2251
2319 /* The first thing we will do is configure the sizes of the buffer 2252 /* The first thing we will do is configure the sizes of the buffer
2320 * rings. These will change based on jumbo packet support. Larger 2253 * rings. These will change based on jumbo packet support. Larger
@@ -2335,211 +2268,85 @@ static int et131x_rx_dma_memory_alloc(struct et131x_adapter *adapter)
2335 */ 2268 */
2336 2269
2337 if (adapter->registry_jumbo_packet < 2048) { 2270 if (adapter->registry_jumbo_packet < 2048) {
2338#ifdef USE_FBR0 2271 rx_ring->fbr[0]->buffsize = 256;
2339 rx_ring->fbr[1]->buffsize = 256;
2340 rx_ring->fbr[1]->num_entries = 512;
2341#endif
2342 rx_ring->fbr[0]->buffsize = 2048;
2343 rx_ring->fbr[0]->num_entries = 512; 2272 rx_ring->fbr[0]->num_entries = 512;
2273 rx_ring->fbr[1]->buffsize = 2048;
2274 rx_ring->fbr[1]->num_entries = 512;
2344 } else if (adapter->registry_jumbo_packet < 4096) { 2275 } else if (adapter->registry_jumbo_packet < 4096) {
2345#ifdef USE_FBR0 2276 rx_ring->fbr[0]->buffsize = 512;
2346 rx_ring->fbr[1]->buffsize = 512; 2277 rx_ring->fbr[0]->num_entries = 1024;
2347 rx_ring->fbr[1]->num_entries = 1024; 2278 rx_ring->fbr[1]->buffsize = 4096;
2348#endif 2279 rx_ring->fbr[1]->num_entries = 512;
2349 rx_ring->fbr[0]->buffsize = 4096;
2350 rx_ring->fbr[0]->num_entries = 512;
2351 } else { 2280 } else {
2352#ifdef USE_FBR0 2281 rx_ring->fbr[0]->buffsize = 1024;
2353 rx_ring->fbr[1]->buffsize = 1024; 2282 rx_ring->fbr[0]->num_entries = 768;
2354 rx_ring->fbr[1]->num_entries = 768; 2283 rx_ring->fbr[1]->buffsize = 16384;
2355#endif 2284 rx_ring->fbr[1]->num_entries = 128;
2356 rx_ring->fbr[0]->buffsize = 16384;
2357 rx_ring->fbr[0]->num_entries = 128;
2358 } 2285 }
2359 2286
2360#ifdef USE_FBR0
2361 adapter->rx_ring.psr_num_entries = 2287 adapter->rx_ring.psr_num_entries =
2362 adapter->rx_ring.fbr[1]->num_entries + 2288 adapter->rx_ring.fbr[0]->num_entries +
2363 adapter->rx_ring.fbr[0]->num_entries; 2289 adapter->rx_ring.fbr[1]->num_entries;
2364#else
2365 adapter->rx_ring.psr_num_entries = adapter->rx_ring.fbr[0]->num_entries;
2366#endif
2367 2290
2368 /* Allocate an area of memory for Free Buffer Ring 1 */ 2291 for (id = 0; id < NUM_FBRS; id++) {
2369 bufsize = (sizeof(struct fbr_desc) * rx_ring->fbr[0]->num_entries) + 2292 /* Allocate an area of memory for Free Buffer Ring */
2370 0xfff; 2293 bufsize =
2371 rx_ring->fbr[0]->ring_virtaddr = dma_alloc_coherent(&adapter->pdev->dev, 2294 (sizeof(struct fbr_desc) * rx_ring->fbr[id]->num_entries);
2295 rx_ring->fbr[id]->ring_virtaddr =
2296 dma_alloc_coherent(&adapter->pdev->dev,
2372 bufsize, 2297 bufsize,
2373 &rx_ring->fbr[0]->ring_physaddr, 2298 &rx_ring->fbr[id]->ring_physaddr,
2374 GFP_KERNEL); 2299 GFP_KERNEL);
2375 if (!rx_ring->fbr[0]->ring_virtaddr) { 2300 if (!rx_ring->fbr[id]->ring_virtaddr) {
2376 dev_err(&adapter->pdev->dev,
2377 "Cannot alloc memory for Free Buffer Ring 1\n");
2378 return -ENOMEM;
2379 }
2380
2381 /* Save physical address
2382 *
2383 * NOTE: dma_alloc_coherent(), used above to alloc DMA regions,
2384 * ALWAYS returns SAC (32-bit) addresses. If DAC (64-bit) addresses
2385 * are ever returned, make sure the high part is retrieved here
2386 * before storing the adjusted address.
2387 */
2388 rx_ring->fbr[0]->real_physaddr = rx_ring->fbr[0]->ring_physaddr;
2389
2390 /* Align Free Buffer Ring 1 on a 4K boundary */
2391 et131x_align_allocated_memory(adapter,
2392 &rx_ring->fbr[0]->real_physaddr,
2393 &rx_ring->fbr[0]->offset, 0x0FFF);
2394
2395 rx_ring->fbr[0]->ring_virtaddr =
2396 (void *)((u8 *) rx_ring->fbr[0]->ring_virtaddr +
2397 rx_ring->fbr[0]->offset);
2398
2399#ifdef USE_FBR0
2400 /* Allocate an area of memory for Free Buffer Ring 0 */
2401 bufsize = (sizeof(struct fbr_desc) * rx_ring->fbr[1]->num_entries) +
2402 0xfff;
2403 rx_ring->fbr[1]->ring_virtaddr = dma_alloc_coherent(&adapter->pdev->dev,
2404 bufsize,
2405 &rx_ring->fbr[1]->ring_physaddr,
2406 GFP_KERNEL);
2407 if (!rx_ring->fbr[1]->ring_virtaddr) {
2408 dev_err(&adapter->pdev->dev,
2409 "Cannot alloc memory for Free Buffer Ring 0\n");
2410 return -ENOMEM;
2411 }
2412
2413 /* Save physical address
2414 *
2415 * NOTE: dma_alloc_coherent(), used above to alloc DMA regions,
2416 * ALWAYS returns SAC (32-bit) addresses. If DAC (64-bit) addresses
2417 * are ever returned, make sure the high part is retrieved here before
2418 * storing the adjusted address.
2419 */
2420 rx_ring->fbr[1]->real_physaddr = rx_ring->fbr[1]->ring_physaddr;
2421
2422 /* Align Free Buffer Ring 0 on a 4K boundary */
2423 et131x_align_allocated_memory(adapter,
2424 &rx_ring->fbr[1]->real_physaddr,
2425 &rx_ring->fbr[1]->offset, 0x0FFF);
2426
2427 rx_ring->fbr[1]->ring_virtaddr =
2428 (void *)((u8 *) rx_ring->fbr[1]->ring_virtaddr +
2429 rx_ring->fbr[1]->offset);
2430#endif
2431 for (i = 0; i < (rx_ring->fbr[0]->num_entries / FBR_CHUNKS); i++) {
2432 u64 fbr1_tmp_physaddr;
2433 u64 fbr1_offset;
2434 u32 fbr1_align;
2435
2436 /* This code allocates an area of memory big enough for N
2437 * free buffers + (buffer_size - 1) so that the buffers can
2438 * be aligned on 4k boundaries. If each buffer were aligned
2439 * to a buffer_size boundary, the effect would be to double
2440 * the size of FBR0. By allocating N buffers at once, we
2441 * reduce this overhead.
2442 */
2443 if (rx_ring->fbr[0]->buffsize > 4096)
2444 fbr1_align = 4096;
2445 else
2446 fbr1_align = rx_ring->fbr[0]->buffsize;
2447
2448 fbr_chunksize =
2449 (FBR_CHUNKS * rx_ring->fbr[0]->buffsize) + fbr1_align - 1;
2450 rx_ring->fbr[0]->mem_virtaddrs[i] =
2451 dma_alloc_coherent(&adapter->pdev->dev, fbr_chunksize,
2452 &rx_ring->fbr[0]->mem_physaddrs[i],
2453 GFP_KERNEL);
2454
2455 if (!rx_ring->fbr[0]->mem_virtaddrs[i]) {
2456 dev_err(&adapter->pdev->dev, 2301 dev_err(&adapter->pdev->dev,
2457 "Could not alloc memory\n"); 2302 "Cannot alloc memory for Free Buffer Ring %d\n", id);
2458 return -ENOMEM; 2303 return -ENOMEM;
2459 } 2304 }
2460
2461 /* See NOTE in "Save Physical Address" comment above */
2462 fbr1_tmp_physaddr = rx_ring->fbr[0]->mem_physaddrs[i];
2463
2464 et131x_align_allocated_memory(adapter,
2465 &fbr1_tmp_physaddr,
2466 &fbr1_offset, (fbr1_align - 1));
2467
2468 for (j = 0; j < FBR_CHUNKS; j++) {
2469 u32 index = (i * FBR_CHUNKS) + j;
2470
2471 /* Save the Virtual address of this index for quick
2472 * access later
2473 */
2474 rx_ring->fbr[0]->virt[index] =
2475 (u8 *) rx_ring->fbr[0]->mem_virtaddrs[i] +
2476 (j * rx_ring->fbr[0]->buffsize) + fbr1_offset;
2477
2478 /* now store the physical address in the descriptor
2479 * so the device can access it
2480 */
2481 rx_ring->fbr[0]->bus_high[index] =
2482 (u32) (fbr1_tmp_physaddr >> 32);
2483 rx_ring->fbr[0]->bus_low[index] =
2484 (u32) fbr1_tmp_physaddr;
2485
2486 fbr1_tmp_physaddr += rx_ring->fbr[0]->buffsize;
2487
2488 rx_ring->fbr[0]->buffer1[index] =
2489 rx_ring->fbr[0]->virt[index];
2490 rx_ring->fbr[0]->buffer2[index] =
2491 rx_ring->fbr[0]->virt[index] - 4;
2492 }
2493 } 2305 }
2494 2306
2495#ifdef USE_FBR0 2307 for (id = 0; id < NUM_FBRS; id++) {
2496 /* Same for FBR0 (if in use) */ 2308 fbr_chunksize = (FBR_CHUNKS * rx_ring->fbr[id]->buffsize);
2497 for (i = 0; i < (rx_ring->fbr[1]->num_entries / FBR_CHUNKS); i++) {
2498 u64 fbr0_tmp_physaddr;
2499 u64 fbr0_offset;
2500 2309
2501 fbr_chunksize = 2310 for (i = 0;
2502 ((FBR_CHUNKS + 1) * rx_ring->fbr[1]->buffsize) - 1; 2311 i < (rx_ring->fbr[id]->num_entries / FBR_CHUNKS); i++) {
2503 rx_ring->fbr[1]->mem_virtaddrs[i] = 2312 dma_addr_t fbr_tmp_physaddr;
2504 dma_alloc_coherent(&adapter->pdev->dev, fbr_chunksize,
2505 &rx_ring->fbr[1]->mem_physaddrs[i],
2506 GFP_KERNEL);
2507 2313
2508 if (!rx_ring->fbr[1]->mem_virtaddrs[i]) { 2314 rx_ring->fbr[id]->mem_virtaddrs[i] = dma_alloc_coherent(
2509 dev_err(&adapter->pdev->dev, 2315 &adapter->pdev->dev, fbr_chunksize,
2510 "Could not alloc memory\n"); 2316 &rx_ring->fbr[id]->mem_physaddrs[i],
2511 return -ENOMEM; 2317 GFP_KERNEL);
2512 }
2513
2514 /* See NOTE in "Save Physical Address" comment above */
2515 fbr0_tmp_physaddr = rx_ring->fbr[1]->mem_physaddrs[i];
2516 2318
2517 et131x_align_allocated_memory(adapter, 2319 if (!rx_ring->fbr[id]->mem_virtaddrs[i]) {
2518 &fbr0_tmp_physaddr, 2320 dev_err(&adapter->pdev->dev,
2519 &fbr0_offset, 2321 "Could not alloc memory\n");
2520 rx_ring->fbr[1]->buffsize - 1); 2322 return -ENOMEM;
2323 }
2521 2324
2522 for (j = 0; j < FBR_CHUNKS; j++) { 2325 /* See NOTE in "Save Physical Address" comment above */
2523 u32 index = (i * FBR_CHUNKS) + j; 2326 fbr_tmp_physaddr = rx_ring->fbr[id]->mem_physaddrs[i];
2524 2327
2525 rx_ring->fbr[1]->virt[index] = 2328 for (j = 0; j < FBR_CHUNKS; j++) {
2526 (u8 *) rx_ring->fbr[1]->mem_virtaddrs[i] + 2329 u32 index = (i * FBR_CHUNKS) + j;
2527 (j * rx_ring->fbr[1]->buffsize) + fbr0_offset;
2528 2330
2529 rx_ring->fbr[1]->bus_high[index] = 2331 /* Save the Virtual address of this index for
2530 (u32) (fbr0_tmp_physaddr >> 32); 2332 * quick access later
2531 rx_ring->fbr[1]->bus_low[index] = 2333 */
2532 (u32) fbr0_tmp_physaddr; 2334 rx_ring->fbr[id]->virt[index] =
2335 (u8 *) rx_ring->fbr[id]->mem_virtaddrs[i] +
2336 (j * rx_ring->fbr[id]->buffsize);
2533 2337
2534 fbr0_tmp_physaddr += rx_ring->fbr[1]->buffsize; 2338 /* now store the physical address in the
2339 * descriptor so the device can access it
2340 */
2341 rx_ring->fbr[id]->bus_high[index] =
2342 upper_32_bits(fbr_tmp_physaddr);
2343 rx_ring->fbr[id]->bus_low[index] =
2344 lower_32_bits(fbr_tmp_physaddr);
2535 2345
2536 rx_ring->fbr[1]->buffer1[index] = 2346 fbr_tmp_physaddr += rx_ring->fbr[id]->buffsize;
2537 rx_ring->fbr[1]->virt[index]; 2347 }
2538 rx_ring->fbr[1]->buffer2[index] =
2539 rx_ring->fbr[1]->virt[index] - 4;
2540 } 2348 }
2541 } 2349 }
2542#endif
2543 2350
2544 /* Allocate an area of memory for FIFO of Packet Status ring entries */ 2351 /* Allocate an area of memory for FIFO of Packet Status ring entries */
2545 pktstat_ringsize = 2352 pktstat_ringsize =
@@ -2578,21 +2385,6 @@ static int et131x_rx_dma_memory_alloc(struct et131x_adapter *adapter)
2578 rx_ring->num_rfd = NIC_DEFAULT_NUM_RFD; 2385 rx_ring->num_rfd = NIC_DEFAULT_NUM_RFD;
2579 pr_info("PRS %llx\n", (unsigned long long)rx_ring->rx_status_bus); 2386 pr_info("PRS %llx\n", (unsigned long long)rx_ring->rx_status_bus);
2580 2387
2581 /* Recv
2582 * kmem_cache_create initializes a lookaside list. After successful
2583 * creation, nonpaged fixed-size blocks can be allocated from and
2584 * freed to the lookaside list.
2585 * RFDs will be allocated from this pool.
2586 */
2587 rx_ring->recv_lookaside = kmem_cache_create(adapter->netdev->name,
2588 sizeof(struct rfd),
2589 0,
2590 SLAB_CACHE_DMA |
2591 SLAB_HWCACHE_ALIGN,
2592 NULL);
2593
2594 adapter->flags |= fMP_ADAPTER_RECV_LOOKASIDE;
2595
2596 /* The RFDs are going to be put on lists later on, so initialize the 2388 /* The RFDs are going to be put on lists later on, so initialize the
2597 * lists now. 2389 * lists now.
2598 */ 2390 */
@@ -2606,6 +2398,7 @@ static int et131x_rx_dma_memory_alloc(struct et131x_adapter *adapter)
2606 */ 2398 */
2607static void et131x_rx_dma_memory_free(struct et131x_adapter *adapter) 2399static void et131x_rx_dma_memory_free(struct et131x_adapter *adapter)
2608{ 2400{
2401 u8 id;
2609 u32 index; 2402 u32 index;
2610 u32 bufsize; 2403 u32 bufsize;
2611 u32 pktstat_ringsize; 2404 u32 pktstat_ringsize;
@@ -2624,92 +2417,45 @@ static void et131x_rx_dma_memory_free(struct et131x_adapter *adapter)
2624 2417
2625 list_del(&rfd->list_node); 2418 list_del(&rfd->list_node);
2626 rfd->skb = NULL; 2419 rfd->skb = NULL;
2627 kmem_cache_free(adapter->rx_ring.recv_lookaside, rfd); 2420 kfree(rfd);
2628 } 2421 }
2629 2422
2630 /* Free Free Buffer Ring 1 */ 2423 /* Free Free Buffer Rings */
2631 if (rx_ring->fbr[0]->ring_virtaddr) { 2424 for (id = 0; id < NUM_FBRS; id++) {
2632 /* First the packet memory */ 2425 if (!rx_ring->fbr[id]->ring_virtaddr)
2633 for (index = 0; index < 2426 continue;
2634 (rx_ring->fbr[0]->num_entries / FBR_CHUNKS); index++) {
2635 if (rx_ring->fbr[0]->mem_virtaddrs[index]) {
2636 u32 fbr1_align;
2637
2638 if (rx_ring->fbr[0]->buffsize > 4096)
2639 fbr1_align = 4096;
2640 else
2641 fbr1_align = rx_ring->fbr[0]->buffsize;
2642
2643 bufsize =
2644 (rx_ring->fbr[0]->buffsize * FBR_CHUNKS) +
2645 fbr1_align - 1;
2646
2647 dma_free_coherent(&adapter->pdev->dev,
2648 bufsize,
2649 rx_ring->fbr[0]->mem_virtaddrs[index],
2650 rx_ring->fbr[0]->mem_physaddrs[index]);
2651
2652 rx_ring->fbr[0]->mem_virtaddrs[index] = NULL;
2653 }
2654 }
2655
2656 /* Now the FIFO itself */
2657 rx_ring->fbr[0]->ring_virtaddr = (void *)((u8 *)
2658 rx_ring->fbr[0]->ring_virtaddr - rx_ring->fbr[0]->offset);
2659
2660 bufsize =
2661 (sizeof(struct fbr_desc) * rx_ring->fbr[0]->num_entries) +
2662 0xfff;
2663
2664 dma_free_coherent(&adapter->pdev->dev, bufsize,
2665 rx_ring->fbr[0]->ring_virtaddr,
2666 rx_ring->fbr[0]->ring_physaddr);
2667
2668 rx_ring->fbr[0]->ring_virtaddr = NULL;
2669 }
2670 2427
2671#ifdef USE_FBR0
2672 /* Now the same for Free Buffer Ring 0 */
2673 if (rx_ring->fbr[1]->ring_virtaddr) {
2674 /* First the packet memory */ 2428 /* First the packet memory */
2675 for (index = 0; index < 2429 for (index = 0;
2676 (rx_ring->fbr[1]->num_entries / FBR_CHUNKS); index++) { 2430 index < (rx_ring->fbr[id]->num_entries / FBR_CHUNKS);
2677 if (rx_ring->fbr[1]->mem_virtaddrs[index]) { 2431 index++) {
2432 if (rx_ring->fbr[id]->mem_virtaddrs[index]) {
2678 bufsize = 2433 bufsize =
2679 (rx_ring->fbr[1]->buffsize * 2434 rx_ring->fbr[id]->buffsize * FBR_CHUNKS;
2680 (FBR_CHUNKS + 1)) - 1;
2681 2435
2682 dma_free_coherent(&adapter->pdev->dev, 2436 dma_free_coherent(&adapter->pdev->dev,
2683 bufsize, 2437 bufsize,
2684 rx_ring->fbr[1]->mem_virtaddrs[index], 2438 rx_ring->fbr[id]->mem_virtaddrs[index],
2685 rx_ring->fbr[1]->mem_physaddrs[index]); 2439 rx_ring->fbr[id]->mem_physaddrs[index]);
2686 2440
2687 rx_ring->fbr[1]->mem_virtaddrs[index] = NULL; 2441 rx_ring->fbr[id]->mem_virtaddrs[index] = NULL;
2688 } 2442 }
2689 } 2443 }
2690 2444
2691 /* Now the FIFO itself */
2692 rx_ring->fbr[1]->ring_virtaddr = (void *)((u8 *)
2693 rx_ring->fbr[1]->ring_virtaddr - rx_ring->fbr[1]->offset);
2694
2695 bufsize = 2445 bufsize =
2696 (sizeof(struct fbr_desc) * rx_ring->fbr[1]->num_entries) + 2446 sizeof(struct fbr_desc) * rx_ring->fbr[id]->num_entries;
2697 0xfff;
2698 2447
2699 dma_free_coherent(&adapter->pdev->dev, 2448 dma_free_coherent(&adapter->pdev->dev, bufsize,
2700 bufsize, 2449 rx_ring->fbr[id]->ring_virtaddr,
2701 rx_ring->fbr[1]->ring_virtaddr, 2450 rx_ring->fbr[id]->ring_physaddr);
2702 rx_ring->fbr[1]->ring_physaddr);
2703 2451
2704 rx_ring->fbr[1]->ring_virtaddr = NULL; 2452 rx_ring->fbr[id]->ring_virtaddr = NULL;
2705 } 2453 }
2706#endif
2707 2454
2708 /* Free Packet Status Ring */ 2455 /* Free Packet Status Ring */
2709 if (rx_ring->ps_ring_virtaddr) { 2456 if (rx_ring->ps_ring_virtaddr) {
2710 pktstat_ringsize = 2457 pktstat_ringsize = sizeof(struct pkt_stat_desc) *
2711 sizeof(struct pkt_stat_desc) * 2458 adapter->rx_ring.psr_num_entries;
2712 adapter->rx_ring.psr_num_entries;
2713 2459
2714 dma_free_coherent(&adapter->pdev->dev, pktstat_ringsize, 2460 dma_free_coherent(&adapter->pdev->dev, pktstat_ringsize,
2715 rx_ring->ps_ring_virtaddr, 2461 rx_ring->ps_ring_virtaddr,
@@ -2726,18 +2472,9 @@ static void et131x_rx_dma_memory_free(struct et131x_adapter *adapter)
2726 rx_ring->rx_status_block = NULL; 2472 rx_ring->rx_status_block = NULL;
2727 } 2473 }
2728 2474
2729 /* Destroy the lookaside (RFD) pool */
2730 if (adapter->flags & fMP_ADAPTER_RECV_LOOKASIDE) {
2731 kmem_cache_destroy(rx_ring->recv_lookaside);
2732 adapter->flags &= ~fMP_ADAPTER_RECV_LOOKASIDE;
2733 }
2734
2735 /* Free the FBR Lookup Table */ 2475 /* Free the FBR Lookup Table */
2736#ifdef USE_FBR0
2737 kfree(rx_ring->fbr[1]);
2738#endif
2739
2740 kfree(rx_ring->fbr[0]); 2476 kfree(rx_ring->fbr[0]);
2477 kfree(rx_ring->fbr[1]);
2741 2478
2742 /* Reset Counters */ 2479 /* Reset Counters */
2743 rx_ring->num_ready_recv = 0; 2480 rx_ring->num_ready_recv = 0;
@@ -2751,8 +2488,7 @@ static void et131x_rx_dma_memory_free(struct et131x_adapter *adapter)
2751 */ 2488 */
2752static int et131x_init_recv(struct et131x_adapter *adapter) 2489static int et131x_init_recv(struct et131x_adapter *adapter)
2753{ 2490{
2754 int status = -ENOMEM; 2491 struct rfd *rfd;
2755 struct rfd *rfd = NULL;
2756 u32 rfdct; 2492 u32 rfdct;
2757 u32 numrfd = 0; 2493 u32 numrfd = 0;
2758 struct rx_ring *rx_ring; 2494 struct rx_ring *rx_ring;
@@ -2762,14 +2498,11 @@ static int et131x_init_recv(struct et131x_adapter *adapter)
2762 2498
2763 /* Setup each RFD */ 2499 /* Setup each RFD */
2764 for (rfdct = 0; rfdct < rx_ring->num_rfd; rfdct++) { 2500 for (rfdct = 0; rfdct < rx_ring->num_rfd; rfdct++) {
2765 rfd = kmem_cache_alloc(rx_ring->recv_lookaside, 2501 rfd = kzalloc(sizeof(struct rfd), GFP_ATOMIC | GFP_DMA);
2766 GFP_ATOMIC | GFP_DMA);
2767 2502
2768 if (!rfd) { 2503 if (!rfd) {
2769 dev_err(&adapter->pdev->dev, 2504 dev_err(&adapter->pdev->dev, "Couldn't alloc RFD\n");
2770 "Couldn't alloc RFD out of kmem_cache\n"); 2505 return -ENOMEM;
2771 status = -ENOMEM;
2772 continue;
2773 } 2506 }
2774 2507
2775 rfd->skb = NULL; 2508 rfd->skb = NULL;
@@ -2782,17 +2515,7 @@ static int et131x_init_recv(struct et131x_adapter *adapter)
2782 numrfd++; 2515 numrfd++;
2783 } 2516 }
2784 2517
2785 if (numrfd > NIC_MIN_NUM_RFD) 2518 return 0;
2786 status = 0;
2787
2788 rx_ring->num_rfd = numrfd;
2789
2790 if (status != 0) {
2791 kmem_cache_free(rx_ring->recv_lookaside, rfd);
2792 dev_err(&adapter->pdev->dev,
2793 "Allocation problems in et131x_init_recv\n");
2794 }
2795 return status;
2796} 2519}
2797 2520
2798/** 2521/**
@@ -2831,51 +2554,34 @@ static void nic_return_rfd(struct et131x_adapter *adapter, struct rfd *rfd)
2831 /* We don't use any of the OOB data besides status. Otherwise, we 2554 /* We don't use any of the OOB data besides status. Otherwise, we
2832 * need to clean up OOB data 2555 * need to clean up OOB data
2833 */ 2556 */
2834 if ( 2557 if (buff_index < rx_local->fbr[ring_index]->num_entries) {
2835#ifdef USE_FBR0 2558 u32 *offset;
2836 (ring_index == 0 && buff_index < rx_local->fbr[1]->num_entries) || 2559 struct fbr_desc *next;
2837#endif 2560
2838 (ring_index == 1 && buff_index < rx_local->fbr[0]->num_entries)) {
2839 spin_lock_irqsave(&adapter->fbr_lock, flags); 2561 spin_lock_irqsave(&adapter->fbr_lock, flags);
2840 2562
2841 if (ring_index == 1) { 2563 if (ring_index == 0)
2842 struct fbr_desc *next = (struct fbr_desc *) 2564 offset = &rx_dma->fbr0_full_offset;
2843 (rx_local->fbr[0]->ring_virtaddr) + 2565 else
2844 INDEX10(rx_local->fbr[0]->local_full); 2566 offset = &rx_dma->fbr1_full_offset;
2845 2567
2846 /* Handle the Free Buffer Ring advancement here. Write 2568 next = (struct fbr_desc *)
2847 * the PA / Buffer Index for the returned buffer into 2569 (rx_local->fbr[ring_index]->ring_virtaddr) +
2848 * the oldest (next to be freed)FBR entry 2570 INDEX10(rx_local->fbr[ring_index]->local_full);
2849 */ 2571
2850 next->addr_hi = rx_local->fbr[0]->bus_high[buff_index]; 2572 /* Handle the Free Buffer Ring advancement here. Write
2851 next->addr_lo = rx_local->fbr[0]->bus_low[buff_index]; 2573 * the PA / Buffer Index for the returned buffer into
2852 next->word2 = buff_index; 2574 * the oldest (next to be freed)FBR entry
2853 2575 */
2854 writel(bump_free_buff_ring( 2576 next->addr_hi = rx_local->fbr[ring_index]->bus_high[buff_index];
2855 &rx_local->fbr[0]->local_full, 2577 next->addr_lo = rx_local->fbr[ring_index]->bus_low[buff_index];
2856 rx_local->fbr[0]->num_entries - 1), 2578 next->word2 = buff_index;
2857 &rx_dma->fbr1_full_offset); 2579
2858 } 2580 writel(bump_free_buff_ring(
2859#ifdef USE_FBR0 2581 &rx_local->fbr[ring_index]->local_full,
2860 else { 2582 rx_local->fbr[ring_index]->num_entries - 1),
2861 struct fbr_desc *next = (struct fbr_desc *) 2583 offset);
2862 rx_local->fbr[1]->ring_virtaddr +
2863 INDEX10(rx_local->fbr[1]->local_full);
2864 2584
2865 /* Handle the Free Buffer Ring advancement here. Write
2866 * the PA / Buffer Index for the returned buffer into
2867 * the oldest (next to be freed) FBR entry
2868 */
2869 next->addr_hi = rx_local->fbr[1]->bus_high[buff_index];
2870 next->addr_lo = rx_local->fbr[1]->bus_low[buff_index];
2871 next->word2 = buff_index;
2872
2873 writel(bump_free_buff_ring(
2874 &rx_local->fbr[1]->local_full,
2875 rx_local->fbr[1]->num_entries - 1),
2876 &rx_dma->fbr0_full_offset);
2877 }
2878#endif
2879 spin_unlock_irqrestore(&adapter->fbr_lock, flags); 2585 spin_unlock_irqrestore(&adapter->fbr_lock, flags);
2880 } else { 2586 } else {
2881 dev_err(&adapter->pdev->dev, 2587 dev_err(&adapter->pdev->dev,
@@ -2919,6 +2625,7 @@ static struct rfd *nic_rx_pkts(struct et131x_adapter *adapter)
2919 u32 len; 2625 u32 len;
2920 u32 word0; 2626 u32 word0;
2921 u32 word1; 2627 u32 word1;
2628 struct sk_buff *skb;
2922 2629
2923 /* RX Status block is written by the DMA engine prior to every 2630 /* RX Status block is written by the DMA engine prior to every
2924 * interrupt. It contains the next to be used entry in the Packet 2631 * interrupt. It contains the next to be used entry in the Packet
@@ -2929,16 +2636,14 @@ static struct rfd *nic_rx_pkts(struct et131x_adapter *adapter)
2929 2636
2930 /* Check the PSR and wrap bits do not match */ 2637 /* Check the PSR and wrap bits do not match */
2931 if ((word1 & 0x1FFF) == (rx_local->local_psr_full & 0x1FFF)) 2638 if ((word1 & 0x1FFF) == (rx_local->local_psr_full & 0x1FFF))
2932 /* Looks like this ring is not updated yet */ 2639 return NULL; /* Looks like this ring is not updated yet */
2933 return NULL;
2934 2640
2935 /* The packet status ring indicates that data is available. */ 2641 /* The packet status ring indicates that data is available. */
2936 psr = (struct pkt_stat_desc *) (rx_local->ps_ring_virtaddr) + 2642 psr = (struct pkt_stat_desc *) (rx_local->ps_ring_virtaddr) +
2937 (rx_local->local_psr_full & 0xFFF); 2643 (rx_local->local_psr_full & 0xFFF);
2938 2644
2939 /* Grab any information that is required once the PSR is 2645 /* Grab any information that is required once the PSR is advanced,
2940 * advanced, since we can no longer rely on the memory being 2646 * since we can no longer rely on the memory being accurate
2941 * accurate
2942 */ 2647 */
2943 len = psr->word1 & 0xFFFF; 2648 len = psr->word1 & 0xFFFF;
2944 ring_index = (psr->word1 >> 26) & 0x03; 2649 ring_index = (psr->word1 >> 26) & 0x03;
@@ -2955,40 +2660,24 @@ static struct rfd *nic_rx_pkts(struct et131x_adapter *adapter)
2955 rx_local->local_psr_full ^= 0x1000; 2660 rx_local->local_psr_full ^= 0x1000;
2956 } 2661 }
2957 2662
2958 writel(rx_local->local_psr_full, 2663 writel(rx_local->local_psr_full, &adapter->regs->rxdma.psr_full_offset);
2959 &adapter->regs->rxdma.psr_full_offset);
2960
2961#ifndef USE_FBR0
2962 if (ring_index != 1)
2963 return NULL;
2964#endif
2965 2664
2966#ifdef USE_FBR0
2967 if (ring_index > 1 || 2665 if (ring_index > 1 ||
2968 (ring_index == 0 && 2666 buff_index > rx_local->fbr[ring_index]->num_entries - 1) {
2969 buff_index > rx_local->fbr[1]->num_entries - 1) ||
2970 (ring_index == 1 &&
2971 buff_index > rx_local->fbr[0]->num_entries - 1)) {
2972#else
2973 if (ring_index != 1 || buff_index > rx_local->fbr[0]->num_entries - 1) {
2974#endif
2975 /* Illegal buffer or ring index cannot be used by S/W*/ 2667 /* Illegal buffer or ring index cannot be used by S/W*/
2976 dev_err(&adapter->pdev->dev, 2668 dev_err(&adapter->pdev->dev,
2977 "NICRxPkts PSR Entry %d indicates " 2669 "NICRxPkts PSR Entry %d indicates length of %d and/or bad bi(%d)\n",
2978 "length of %d and/or bad bi(%d)\n", 2670 rx_local->local_psr_full & 0xFFF, len, buff_index);
2979 rx_local->local_psr_full & 0xFFF,
2980 len, buff_index);
2981 return NULL; 2671 return NULL;
2982 } 2672 }
2983 2673
2984 /* Get and fill the RFD. */ 2674 /* Get and fill the RFD. */
2985 spin_lock_irqsave(&adapter->rcv_lock, flags); 2675 spin_lock_irqsave(&adapter->rcv_lock, flags);
2986 2676
2987 rfd = NULL;
2988 element = rx_local->recv_list.next; 2677 element = rx_local->recv_list.next;
2989 rfd = (struct rfd *) list_entry(element, struct rfd, list_node); 2678 rfd = (struct rfd *) list_entry(element, struct rfd, list_node);
2990 2679
2991 if (rfd == NULL) { 2680 if (!rfd) {
2992 spin_unlock_irqrestore(&adapter->rcv_lock, flags); 2681 spin_unlock_irqrestore(&adapter->rcv_lock, flags);
2993 return NULL; 2682 return NULL;
2994 } 2683 }
@@ -3001,119 +2690,95 @@ static struct rfd *nic_rx_pkts(struct et131x_adapter *adapter)
3001 rfd->bufferindex = buff_index; 2690 rfd->bufferindex = buff_index;
3002 rfd->ringindex = ring_index; 2691 rfd->ringindex = ring_index;
3003 2692
3004 /* In V1 silicon, there is a bug which screws up filtering of 2693 /* In V1 silicon, there is a bug which screws up filtering of runt
3005 * runt packets. Therefore runt packet filtering is disabled 2694 * packets. Therefore runt packet filtering is disabled in the MAC and
3006 * in the MAC and the packets are dropped here. They are 2695 * the packets are dropped here. They are also counted here.
3007 * also counted here.
3008 */ 2696 */
3009 if (len < (NIC_MIN_PACKET_SIZE + 4)) { 2697 if (len < (NIC_MIN_PACKET_SIZE + 4)) {
3010 adapter->stats.rx_other_errs++; 2698 adapter->stats.rx_other_errs++;
3011 len = 0; 2699 len = 0;
3012 } 2700 }
3013 2701
3014 if (len) { 2702 if (len == 0) {
3015 /* Determine if this is a multicast packet coming in */ 2703 rfd->len = 0;
3016 if ((word0 & ALCATEL_MULTICAST_PKT) && 2704 goto out;
3017 !(word0 & ALCATEL_BROADCAST_PKT)) { 2705 }
3018 /* Promiscuous mode and Multicast mode are 2706
3019 * not mutually exclusive as was first 2707 /* Determine if this is a multicast packet coming in */
3020 * thought. I guess Promiscuous is just 2708 if ((word0 & ALCATEL_MULTICAST_PKT) &&
3021 * considered a super-set of the other 2709 !(word0 & ALCATEL_BROADCAST_PKT)) {
3022 * filters. Generally filter is 0x2b when in 2710 /* Promiscuous mode and Multicast mode are not mutually
3023 * promiscuous mode. 2711 * exclusive as was first thought. I guess Promiscuous is just
3024 */ 2712 * considered a super-set of the other filters. Generally filter
3025 if ((adapter->packet_filter & 2713 * is 0x2b when in promiscuous mode.
3026 ET131X_PACKET_TYPE_MULTICAST) 2714 */
3027 && !(adapter->packet_filter & 2715 if ((adapter->packet_filter & ET131X_PACKET_TYPE_MULTICAST)
3028 ET131X_PACKET_TYPE_PROMISCUOUS) 2716 && !(adapter->packet_filter & ET131X_PACKET_TYPE_PROMISCUOUS)
3029 && !(adapter->packet_filter & 2717 && !(adapter->packet_filter &
3030 ET131X_PACKET_TYPE_ALL_MULTICAST)) { 2718 ET131X_PACKET_TYPE_ALL_MULTICAST)) {
3031 /* 2719 buf = rx_local->fbr[ring_index]->virt[buff_index];
3032 * Note - ring_index for fbr[] array is reversed
3033 * 1 for FBR0 etc
3034 */
3035 buf = rx_local->fbr[(ring_index == 0 ? 1 : 0)]->
3036 virt[buff_index];
3037 2720
3038 /* Loop through our list to see if the 2721 /* Loop through our list to see if the destination
3039 * destination address of this packet 2722 * address of this packet matches one in our list.
3040 * matches one in our list. 2723 */
3041 */ 2724 for (i = 0; i < adapter->multicast_addr_count; i++) {
3042 for (i = 0; i < adapter->multicast_addr_count; 2725 if (buf[0] == adapter->multicast_list[i][0]
3043 i++) { 2726 && buf[1] == adapter->multicast_list[i][1]
3044 if (buf[0] == 2727 && buf[2] == adapter->multicast_list[i][2]
3045 adapter->multicast_list[i][0] 2728 && buf[3] == adapter->multicast_list[i][3]
3046 && buf[1] == 2729 && buf[4] == adapter->multicast_list[i][4]
3047 adapter->multicast_list[i][1] 2730 && buf[5] == adapter->multicast_list[i][5]) {
3048 && buf[2] == 2731 break;
3049 adapter->multicast_list[i][2]
3050 && buf[3] ==
3051 adapter->multicast_list[i][3]
3052 && buf[4] ==
3053 adapter->multicast_list[i][4]
3054 && buf[5] ==
3055 adapter->multicast_list[i][5]) {
3056 break;
3057 }
3058 } 2732 }
3059
3060 /* If our index is equal to the number
3061 * of Multicast address we have, then
3062 * this means we did not find this
3063 * packet's matching address in our
3064 * list. Set the len to zero,
3065 * so we free our RFD when we return
3066 * from this function.
3067 */
3068 if (i == adapter->multicast_addr_count)
3069 len = 0;
3070 } 2733 }
3071 2734
3072 if (len > 0) 2735 /* If our index is equal to the number of Multicast
3073 adapter->stats.multicast_pkts_rcvd++; 2736 * address we have, then this means we did not find this
3074 } else if (word0 & ALCATEL_BROADCAST_PKT) 2737 * packet's matching address in our list. Set the len to
3075 adapter->stats.broadcast_pkts_rcvd++; 2738 * zero, so we free our RFD when we return from this
3076 else 2739 * function.
3077 /* Not sure what this counter measures in
3078 * promiscuous mode. Perhaps we should check
3079 * the MAC address to see if it is directed
3080 * to us in promiscuous mode.
3081 */ 2740 */
3082 adapter->stats.unicast_pkts_rcvd++; 2741 if (i == adapter->multicast_addr_count)
3083 } 2742 len = 0;
2743 }
3084 2744
3085 if (len > 0) { 2745 if (len > 0)
3086 struct sk_buff *skb = NULL; 2746 adapter->stats.multicast_pkts_rcvd++;
2747 } else if (word0 & ALCATEL_BROADCAST_PKT) {
2748 adapter->stats.broadcast_pkts_rcvd++;
2749 } else {
2750 /* Not sure what this counter measures in promiscuous mode.
2751 * Perhaps we should check the MAC address to see if it is
2752 * directed to us in promiscuous mode.
2753 */
2754 adapter->stats.unicast_pkts_rcvd++;
2755 }
3087 2756
3088 /*rfd->len = len - 4; */ 2757 if (len == 0) {
3089 rfd->len = len; 2758 rfd->len = 0;
2759 goto out;
2760 }
3090 2761
3091 skb = dev_alloc_skb(rfd->len + 2); 2762 rfd->len = len;
3092 if (!skb) {
3093 dev_err(&adapter->pdev->dev,
3094 "Couldn't alloc an SKB for Rx\n");
3095 return NULL;
3096 }
3097 2763
3098 adapter->net_stats.rx_bytes += rfd->len; 2764 skb = dev_alloc_skb(rfd->len + 2);
2765 if (!skb) {
2766 dev_err(&adapter->pdev->dev, "Couldn't alloc an SKB for Rx\n");
2767 return NULL;
2768 }
3099 2769
3100 /* 2770 adapter->net_stats.rx_bytes += rfd->len;
3101 * Note - ring_index for fbr[] array is reversed,
3102 * 1 for FBR0 etc
3103 */
3104 memcpy(skb_put(skb, rfd->len),
3105 rx_local->fbr[(ring_index == 0 ? 1 : 0)]->virt[buff_index],
3106 rfd->len);
3107 2771
3108 skb->dev = adapter->netdev; 2772 memcpy(skb_put(skb, rfd->len),
3109 skb->protocol = eth_type_trans(skb, adapter->netdev); 2773 rx_local->fbr[ring_index]->virt[buff_index],
3110 skb->ip_summed = CHECKSUM_NONE; 2774 rfd->len);
3111 2775
3112 netif_rx_ni(skb); 2776 skb->dev = adapter->netdev;
3113 } else { 2777 skb->protocol = eth_type_trans(skb, adapter->netdev);
3114 rfd->len = 0; 2778 skb->ip_summed = CHECKSUM_NONE;
3115 } 2779 netif_rx_ni(skb);
3116 2780
2781out:
3117 nic_return_rfd(adapter, rfd); 2782 nic_return_rfd(adapter, rfd);
3118 return rfd; 2783 return rfd;
3119} 2784}
@@ -3198,10 +2863,7 @@ static int et131x_tx_dma_memory_alloc(struct et131x_adapter *adapter)
3198 return -ENOMEM; 2863 return -ENOMEM;
3199 } 2864 }
3200 2865
3201 /* Allocate enough memory for the Tx descriptor ring, and allocate 2866 desc_size = (sizeof(struct tx_desc) * NUM_DESC_PER_RING_TX);
3202 * some extra so that the ring can be aligned on a 4k boundary.
3203 */
3204 desc_size = (sizeof(struct tx_desc) * NUM_DESC_PER_RING_TX) + 4096 - 1;
3205 tx_ring->tx_desc_ring = 2867 tx_ring->tx_desc_ring =
3206 (struct tx_desc *) dma_alloc_coherent(&adapter->pdev->dev, 2868 (struct tx_desc *) dma_alloc_coherent(&adapter->pdev->dev,
3207 desc_size, 2869 desc_size,
@@ -3245,8 +2907,7 @@ static void et131x_tx_dma_memory_free(struct et131x_adapter *adapter)
3245 2907
3246 if (adapter->tx_ring.tx_desc_ring) { 2908 if (adapter->tx_ring.tx_desc_ring) {
3247 /* Free memory relating to Tx rings here */ 2909 /* Free memory relating to Tx rings here */
3248 desc_size = (sizeof(struct tx_desc) * NUM_DESC_PER_RING_TX) 2910 desc_size = (sizeof(struct tx_desc) * NUM_DESC_PER_RING_TX);
3249 + 4096 - 1;
3250 dma_free_coherent(&adapter->pdev->dev, 2911 dma_free_coherent(&adapter->pdev->dev,
3251 desc_size, 2912 desc_size,
3252 adapter->tx_ring.tx_desc_ring, 2913 adapter->tx_ring.tx_desc_ring,
@@ -3285,6 +2946,7 @@ static int nic_send_packet(struct et131x_adapter *adapter, struct tcb *tcb)
3285 struct skb_frag_struct *frags = &skb_shinfo(skb)->frags[0]; 2946 struct skb_frag_struct *frags = &skb_shinfo(skb)->frags[0];
3286 unsigned long flags; 2947 unsigned long flags;
3287 struct phy_device *phydev = adapter->phydev; 2948 struct phy_device *phydev = adapter->phydev;
2949 dma_addr_t dma_addr;
3288 2950
3289 /* Part of the optimizations of this send routine restrict us to 2951 /* Part of the optimizations of this send routine restrict us to
3290 * sending 24 fragments at a pass. In practice we should never see 2952 * sending 24 fragments at a pass. In practice we should never see
@@ -3313,85 +2975,47 @@ static int nic_send_packet(struct et131x_adapter *adapter, struct tcb *tcb)
3313 * This will work until we determine why the hardware 2975 * This will work until we determine why the hardware
3314 * doesn't seem to like large fragments. 2976 * doesn't seem to like large fragments.
3315 */ 2977 */
3316 if ((skb->len - skb->data_len) <= 1514) { 2978 if (skb_headlen(skb) <= 1514) {
3317 desc[frag].addr_hi = 0;
3318 /* Low 16bits are length, high is vlan and 2979 /* Low 16bits are length, high is vlan and
3319 unused currently so zero */ 2980 unused currently so zero */
3320 desc[frag].len_vlan = 2981 desc[frag].len_vlan = skb_headlen(skb);
3321 skb->len - skb->data_len; 2982 dma_addr = dma_map_single(&adapter->pdev->dev,
3322 2983 skb->data,
3323 /* NOTE: Here, the dma_addr_t returned from 2984 skb_headlen(skb),
3324 * dma_map_single() is implicitly cast as a 2985 DMA_TO_DEVICE);
3325 * u32. Although dma_addr_t can be 2986 desc[frag].addr_lo = lower_32_bits(dma_addr);
3326 * 64-bit, the address returned by 2987 desc[frag].addr_hi = upper_32_bits(dma_addr);
3327 * dma_map_single() is always 32-bit 2988 frag++;
3328 * addressable (as defined by the pci/dma
3329 * subsystem)
3330 */
3331 desc[frag++].addr_lo =
3332 dma_map_single(&adapter->pdev->dev,
3333 skb->data,
3334 skb->len -
3335 skb->data_len,
3336 DMA_TO_DEVICE);
3337 } else { 2989 } else {
3338 desc[frag].addr_hi = 0; 2990 desc[frag].len_vlan = skb_headlen(skb) / 2;
3339 desc[frag].len_vlan = 2991 dma_addr = dma_map_single(&adapter->pdev->dev,
3340 (skb->len - skb->data_len) / 2; 2992 skb->data,
3341 2993 (skb_headlen(skb) / 2),
3342 /* NOTE: Here, the dma_addr_t returned from 2994 DMA_TO_DEVICE);
3343 * dma_map_single() is implicitly cast as a 2995 desc[frag].addr_lo = lower_32_bits(dma_addr);
3344 * u32. Although dma_addr_t can be 2996 desc[frag].addr_hi = upper_32_bits(dma_addr);
3345 * 64-bit, the address returned by 2997 frag++;
3346 * dma_map_single() is always 32-bit 2998
3347 * addressable (as defined by the pci/dma 2999 desc[frag].len_vlan = skb_headlen(skb) / 2;
3348 * subsystem) 3000 dma_addr = dma_map_single(&adapter->pdev->dev,
3349 */ 3001 skb->data +
3350 desc[frag++].addr_lo = 3002 (skb_headlen(skb) / 2),
3351 dma_map_single(&adapter->pdev->dev, 3003 (skb_headlen(skb) / 2),
3352 skb->data, 3004 DMA_TO_DEVICE);
3353 ((skb->len - 3005 desc[frag].addr_lo = lower_32_bits(dma_addr);
3354 skb->data_len) / 2), 3006 desc[frag].addr_hi = upper_32_bits(dma_addr);
3355 DMA_TO_DEVICE); 3007 frag++;
3356 desc[frag].addr_hi = 0;
3357
3358 desc[frag].len_vlan =
3359 (skb->len - skb->data_len) / 2;
3360
3361 /* NOTE: Here, the dma_addr_t returned from
3362 * dma_map_single() is implicitly cast as a
3363 * u32. Although dma_addr_t can be
3364 * 64-bit, the address returned by
3365 * dma_map_single() is always 32-bit
3366 * addressable (as defined by the pci/dma
3367 * subsystem)
3368 */
3369 desc[frag++].addr_lo =
3370 dma_map_single(&adapter->pdev->dev,
3371 skb->data +
3372 ((skb->len -
3373 skb->data_len) / 2),
3374 ((skb->len -
3375 skb->data_len) / 2),
3376 DMA_TO_DEVICE);
3377 } 3008 }
3378 } else { 3009 } else {
3379 desc[frag].addr_hi = 0; 3010 desc[frag].len_vlan = frags[i - 1].size;
3380 desc[frag].len_vlan = 3011 dma_addr = skb_frag_dma_map(&adapter->pdev->dev,
3381 frags[i - 1].size; 3012 &frags[i - 1],
3382 3013 0,
3383 /* NOTE: Here, the dma_addr_t returned from 3014 frags[i - 1].size,
3384 * dma_map_page() is implicitly cast as a u32. 3015 DMA_TO_DEVICE);
3385 * Although dma_addr_t can be 64-bit, the address 3016 desc[frag].addr_lo = lower_32_bits(dma_addr);
3386 * returned by dma_map_page() is always 32-bit 3017 desc[frag].addr_hi = upper_32_bits(dma_addr);
3387 * addressable (as defined by the pci/dma subsystem) 3018 frag++;
3388 */
3389 desc[frag++].addr_lo = skb_frag_dma_map(
3390 &adapter->pdev->dev,
3391 &frags[i - 1],
3392 0,
3393 frags[i - 1].size,
3394 DMA_TO_DEVICE);
3395 } 3019 }
3396 } 3020 }
3397 3021
@@ -3521,7 +3145,7 @@ static int send_packet(struct sk_buff *skb, struct et131x_adapter *adapter)
3521 3145
3522 tcb->skb = skb; 3146 tcb->skb = skb;
3523 3147
3524 if (skb->data != NULL && skb->len - skb->data_len >= 6) { 3148 if (skb->data != NULL && skb_headlen(skb) >= 6) {
3525 shbufva = (u16 *) skb->data; 3149 shbufva = (u16 *) skb->data;
3526 3150
3527 if ((shbufva[0] == 0xffff) && 3151 if ((shbufva[0] == 0xffff) &&
@@ -3618,6 +3242,7 @@ static inline void free_send_packet(struct et131x_adapter *adapter,
3618 unsigned long flags; 3242 unsigned long flags;
3619 struct tx_desc *desc = NULL; 3243 struct tx_desc *desc = NULL;
3620 struct net_device_stats *stats = &adapter->net_stats; 3244 struct net_device_stats *stats = &adapter->net_stats;
3245 u64 dma_addr;
3621 3246
3622 if (tcb->flags & fMP_DEST_BROAD) 3247 if (tcb->flags & fMP_DEST_BROAD)
3623 atomic_inc(&adapter->stats.broadcast_pkts_xmtd); 3248 atomic_inc(&adapter->stats.broadcast_pkts_xmtd);
@@ -3638,8 +3263,11 @@ static inline void free_send_packet(struct et131x_adapter *adapter,
3638 (adapter->tx_ring.tx_desc_ring + 3263 (adapter->tx_ring.tx_desc_ring +
3639 INDEX10(tcb->index_start)); 3264 INDEX10(tcb->index_start));
3640 3265
3266 dma_addr = desc->addr_lo;
3267 dma_addr |= (u64)desc->addr_hi << 32;
3268
3641 dma_unmap_single(&adapter->pdev->dev, 3269 dma_unmap_single(&adapter->pdev->dev,
3642 desc->addr_lo, 3270 dma_addr,
3643 desc->len_vlan, DMA_TO_DEVICE); 3271 desc->len_vlan, DMA_TO_DEVICE);
3644 3272
3645 add_10bit(&tcb->index_start, 1); 3273 add_10bit(&tcb->index_start, 1);
@@ -3830,7 +3458,12 @@ static void et131x_get_regs(struct net_device *netdev,
3830 et131x_mii_read(adapter, 0x08, (u16 *)&regs_buff[num++]); 3458 et131x_mii_read(adapter, 0x08, (u16 *)&regs_buff[num++]);
3831 et131x_mii_read(adapter, MII_CTRL1000, (u16 *)&regs_buff[num++]); 3459 et131x_mii_read(adapter, MII_CTRL1000, (u16 *)&regs_buff[num++]);
3832 et131x_mii_read(adapter, MII_STAT1000, (u16 *)&regs_buff[num++]); 3460 et131x_mii_read(adapter, MII_STAT1000, (u16 *)&regs_buff[num++]);
3461 et131x_mii_read(adapter, 0x0b, (u16 *)&regs_buff[num++]);
3462 et131x_mii_read(adapter, 0x0c, (u16 *)&regs_buff[num++]);
3463 et131x_mii_read(adapter, MII_MMD_CTRL, (u16 *)&regs_buff[num++]);
3464 et131x_mii_read(adapter, MII_MMD_DATA, (u16 *)&regs_buff[num++]);
3833 et131x_mii_read(adapter, MII_ESTATUS, (u16 *)&regs_buff[num++]); 3465 et131x_mii_read(adapter, MII_ESTATUS, (u16 *)&regs_buff[num++]);
3466
3834 et131x_mii_read(adapter, PHY_INDEX_REG, (u16 *)&regs_buff[num++]); 3467 et131x_mii_read(adapter, PHY_INDEX_REG, (u16 *)&regs_buff[num++]);
3835 et131x_mii_read(adapter, PHY_DATA_REG, (u16 *)&regs_buff[num++]); 3468 et131x_mii_read(adapter, PHY_DATA_REG, (u16 *)&regs_buff[num++]);
3836 et131x_mii_read(adapter, PHY_MPHY_CONTROL_REG, 3469 et131x_mii_read(adapter, PHY_MPHY_CONTROL_REG,
@@ -3839,6 +3472,7 @@ static void et131x_get_regs(struct net_device *netdev,
3839 (u16 *)&regs_buff[num++]); 3472 (u16 *)&regs_buff[num++]);
3840 et131x_mii_read(adapter, PHY_LOOPBACK_CONTROL+1, 3473 et131x_mii_read(adapter, PHY_LOOPBACK_CONTROL+1,
3841 (u16 *)&regs_buff[num++]); 3474 (u16 *)&regs_buff[num++]);
3475
3842 et131x_mii_read(adapter, PHY_REGISTER_MGMT_CONTROL, 3476 et131x_mii_read(adapter, PHY_REGISTER_MGMT_CONTROL,
3843 (u16 *)&regs_buff[num++]); 3477 (u16 *)&regs_buff[num++]);
3844 et131x_mii_read(adapter, PHY_CONFIG, (u16 *)&regs_buff[num++]); 3478 et131x_mii_read(adapter, PHY_CONFIG, (u16 *)&regs_buff[num++]);
@@ -3943,7 +3577,7 @@ static struct ethtool_ops et131x_ethtool_ops = {
3943 .get_drvinfo = et131x_get_drvinfo, 3577 .get_drvinfo = et131x_get_drvinfo,
3944 .get_regs_len = et131x_get_regs_len, 3578 .get_regs_len = et131x_get_regs_len,
3945 .get_regs = et131x_get_regs, 3579 .get_regs = et131x_get_regs,
3946 .get_link = ethtool_op_get_link, 3580 .get_link = ethtool_op_get_link,
3947}; 3581};
3948/** 3582/**
3949 * et131x_hwaddr_init - set up the MAC Address on the ET1310 3583 * et131x_hwaddr_init - set up the MAC Address on the ET1310
@@ -4110,8 +3744,18 @@ static void et131x_error_timer_handler(unsigned long data)
4110 } 3744 }
4111 3745
4112 /* This is a periodic timer, so reschedule */ 3746 /* This is a periodic timer, so reschedule */
4113 mod_timer(&adapter->error_timer, jiffies + 3747 mod_timer(&adapter->error_timer, jiffies + TX_ERROR_PERIOD * HZ / 1000);
4114 TX_ERROR_PERIOD * HZ / 1000); 3748}
3749
3750/**
3751 * et131x_adapter_memory_free - Free all memory allocated for use by Tx & Rx
3752 * @adapter: pointer to our private adapter structure
3753 */
3754static void et131x_adapter_memory_free(struct et131x_adapter *adapter)
3755{
3756 /* Free DMA memory */
3757 et131x_tx_dma_memory_free(adapter);
3758 et131x_rx_dma_memory_free(adapter);
4115} 3759}
4116 3760
4117/** 3761/**
@@ -4144,26 +3788,14 @@ static int et131x_adapter_memory_alloc(struct et131x_adapter *adapter)
4144 3788
4145 /* Init receive data structures */ 3789 /* Init receive data structures */
4146 status = et131x_init_recv(adapter); 3790 status = et131x_init_recv(adapter);
4147 if (status != 0) { 3791 if (status) {
4148 dev_err(&adapter->pdev->dev, 3792 dev_err(&adapter->pdev->dev,
4149 "et131x_init_recv FAILED\n"); 3793 "et131x_init_recv FAILED\n");
4150 et131x_tx_dma_memory_free(adapter); 3794 et131x_adapter_memory_free(adapter);
4151 et131x_rx_dma_memory_free(adapter);
4152 } 3795 }
4153 return status; 3796 return status;
4154} 3797}
4155 3798
4156/**
4157 * et131x_adapter_memory_free - Free all memory allocated for use by Tx & Rx
4158 * @adapter: pointer to our private adapter structure
4159 */
4160static void et131x_adapter_memory_free(struct et131x_adapter *adapter)
4161{
4162 /* Free DMA memory */
4163 et131x_tx_dma_memory_free(adapter);
4164 et131x_rx_dma_memory_free(adapter);
4165}
4166
4167static void et131x_adjust_link(struct net_device *netdev) 3799static void et131x_adjust_link(struct net_device *netdev)
4168{ 3800{
4169 struct et131x_adapter *adapter = netdev_priv(netdev); 3801 struct et131x_adapter *adapter = netdev_priv(netdev);
@@ -4358,7 +3990,7 @@ static struct et131x_adapter *et131x_adapter_init(struct net_device *netdev,
4358 * PCI subsystem detects that a PCI device which matches the information 3990 * PCI subsystem detects that a PCI device which matches the information
4359 * contained in the pci_device_id table has been removed. 3991 * contained in the pci_device_id table has been removed.
4360 */ 3992 */
4361static void __devexit et131x_pci_remove(struct pci_dev *pdev) 3993static void et131x_pci_remove(struct pci_dev *pdev)
4362{ 3994{
4363 struct net_device *netdev = pci_get_drvdata(pdev); 3995 struct net_device *netdev = pci_get_drvdata(pdev);
4364 struct et131x_adapter *adapter = netdev_priv(netdev); 3996 struct et131x_adapter *adapter = netdev_priv(netdev);
@@ -4558,182 +4190,169 @@ static void et131x_isr_handler(struct work_struct *work)
4558 4190
4559 status &= 0xffffffd7; 4191 status &= 0xffffffd7;
4560 4192
4561 if (status) { 4193 if (!status)
4562 /* Handle the TXDMA Error interrupt */ 4194 goto out;
4563 if (status & ET_INTR_TXDMA_ERR) {
4564 u32 txdma_err;
4565
4566 /* Following read also clears the register (COR) */
4567 txdma_err = readl(&iomem->txdma.tx_dma_error);
4568 4195
4569 dev_warn(&adapter->pdev->dev, 4196 /* Handle the TXDMA Error interrupt */
4570 "TXDMA_ERR interrupt, error = %d\n", 4197 if (status & ET_INTR_TXDMA_ERR) {
4571 txdma_err); 4198 u32 txdma_err;
4572 }
4573 4199
4574 /* Handle Free Buffer Ring 0 and 1 Low interrupt */ 4200 /* Following read also clears the register (COR) */
4575 if (status & 4201 txdma_err = readl(&iomem->txdma.tx_dma_error);
4576 (ET_INTR_RXDMA_FB_R0_LOW | ET_INTR_RXDMA_FB_R1_LOW)) {
4577 /*
4578 * This indicates the number of unused buffers in
4579 * RXDMA free buffer ring 0 is <= the limit you
4580 * programmed. Free buffer resources need to be
4581 * returned. Free buffers are consumed as packets
4582 * are passed from the network to the host. The host
4583 * becomes aware of the packets from the contents of
4584 * the packet status ring. This ring is queried when
4585 * the packet done interrupt occurs. Packets are then
4586 * passed to the OS. When the OS is done with the
4587 * packets the resources can be returned to the
4588 * ET1310 for re-use. This interrupt is one method of
4589 * returning resources.
4590 */
4591 4202
4592 /* If the user has flow control on, then we will 4203 dev_warn(&adapter->pdev->dev,
4593 * send a pause packet, otherwise just exit 4204 "TXDMA_ERR interrupt, error = %d\n",
4594 */ 4205 txdma_err);
4595 if (adapter->flowcontrol == FLOW_TXONLY || 4206 }
4596 adapter->flowcontrol == FLOW_BOTH) {
4597 u32 pm_csr;
4598 4207
4599 /* Tell the device to send a pause packet via 4208 /* Handle Free Buffer Ring 0 and 1 Low interrupt */
4600 * the back pressure register (bp req and 4209 if (status & (ET_INTR_RXDMA_FB_R0_LOW | ET_INTR_RXDMA_FB_R1_LOW)) {
4601 * bp xon/xoff) 4210 /*
4602 */ 4211 * This indicates the number of unused buffers in RXDMA free
4603 pm_csr = readl(&iomem->global.pm_csr); 4212 * buffer ring 0 is <= the limit you programmed. Free buffer
4604 if (!et1310_in_phy_coma(adapter)) 4213 * resources need to be returned. Free buffers are consumed as
4605 writel(3, &iomem->txmac.bp_ctrl); 4214 * packets are passed from the network to the host. The host
4606 } 4215 * becomes aware of the packets from the contents of the packet
4607 } 4216 * status ring. This ring is queried when the packet done
4217 * interrupt occurs. Packets are then passed to the OS. When
4218 * the OS is done with the packets the resources can be
4219 * returned to the ET1310 for re-use. This interrupt is one
4220 * method of returning resources.
4221 */
4608 4222
4609 /* Handle Packet Status Ring Low Interrupt */ 4223 /*
4610 if (status & ET_INTR_RXDMA_STAT_LOW) { 4224 * If the user has flow control on, then we will
4225 * send a pause packet, otherwise just exit
4226 */
4227 if (adapter->flowcontrol == FLOW_TXONLY ||
4228 adapter->flowcontrol == FLOW_BOTH) {
4229 u32 pm_csr;
4611 4230
4612 /* 4231 /*
4613 * Same idea as with the two Free Buffer Rings. 4232 * Tell the device to send a pause packet via the back
4614 * Packets going from the network to the host each 4233 * pressure register (bp req and bp xon/xoff)
4615 * consume a free buffer resource and a packet status
4616 * resource. These resoures are passed to the OS.
4617 * When the OS is done with the resources, they need
4618 * to be returned to the ET1310. This is one method
4619 * of returning the resources.
4620 */ 4234 */
4235 pm_csr = readl(&iomem->global.pm_csr);
4236 if (!et1310_in_phy_coma(adapter))
4237 writel(3, &iomem->txmac.bp_ctrl);
4621 } 4238 }
4239 }
4622 4240
4623 /* Handle RXDMA Error Interrupt */ 4241 /* Handle Packet Status Ring Low Interrupt */
4624 if (status & ET_INTR_RXDMA_ERR) { 4242 if (status & ET_INTR_RXDMA_STAT_LOW) {
4625 /* 4243 /*
4626 * The rxdma_error interrupt is sent when a time-out 4244 * Same idea as with the two Free Buffer Rings. Packets going
4627 * on a request issued by the JAGCore has occurred or 4245 * from the network to the host each consume a free buffer
4628 * a completion is returned with an un-successful 4246 * resource and a packet status resource. These resoures are
4629 * status. In both cases the request is considered 4247 * passed to the OS. When the OS is done with the resources,
4630 * complete. The JAGCore will automatically re-try the 4248 * they need to be returned to the ET1310. This is one method
4631 * request in question. Normally information on events 4249 * of returning the resources.
4632 * like these are sent to the host using the "Advanced 4250 */
4633 * Error Reporting" capability. This interrupt is 4251 }
4634 * another way of getting similar information. The
4635 * only thing required is to clear the interrupt by
4636 * reading the ISR in the global resources. The
4637 * JAGCore will do a re-try on the request. Normally
4638 * you should never see this interrupt. If you start
4639 * to see this interrupt occurring frequently then
4640 * something bad has occurred. A reset might be the
4641 * thing to do.
4642 */
4643 /* TRAP();*/
4644 4252
4645 dev_warn(&adapter->pdev->dev, 4253 /* Handle RXDMA Error Interrupt */
4646 "RxDMA_ERR interrupt, error %x\n", 4254 if (status & ET_INTR_RXDMA_ERR) {
4647 readl(&iomem->txmac.tx_test)); 4255 /*
4648 } 4256 * The rxdma_error interrupt is sent when a time-out on a
4257 * request issued by the JAGCore has occurred or a completion is
4258 * returned with an un-successful status. In both cases the
4259 * request is considered complete. The JAGCore will
4260 * automatically re-try the request in question. Normally
4261 * information on events like these are sent to the host using
4262 * the "Advanced Error Reporting" capability. This interrupt is
4263 * another way of getting similar information. The only thing
4264 * required is to clear the interrupt by reading the ISR in the
4265 * global resources. The JAGCore will do a re-try on the
4266 * request. Normally you should never see this interrupt. If
4267 * you start to see this interrupt occurring frequently then
4268 * something bad has occurred. A reset might be the thing to do.
4269 */
4270 /* TRAP();*/
4649 4271
4650 /* Handle the Wake on LAN Event */ 4272 dev_warn(&adapter->pdev->dev,
4651 if (status & ET_INTR_WOL) { 4273 "RxDMA_ERR interrupt, error %x\n",
4652 /* 4274 readl(&iomem->txmac.tx_test));
4653 * This is a secondary interrupt for wake on LAN. 4275 }
4654 * The driver should never see this, if it does,
4655 * something serious is wrong. We will TRAP the
4656 * message when we are in DBG mode, otherwise we
4657 * will ignore it.
4658 */
4659 dev_err(&adapter->pdev->dev, "WAKE_ON_LAN interrupt\n");
4660 }
4661 4276
4662 /* Let's move on to the TxMac */ 4277 /* Handle the Wake on LAN Event */
4663 if (status & ET_INTR_TXMAC) { 4278 if (status & ET_INTR_WOL) {
4664 u32 err = readl(&iomem->txmac.err); 4279 /*
4280 * This is a secondary interrupt for wake on LAN. The driver
4281 * should never see this, if it does, something serious is
4282 * wrong. We will TRAP the message when we are in DBG mode,
4283 * otherwise we will ignore it.
4284 */
4285 dev_err(&adapter->pdev->dev, "WAKE_ON_LAN interrupt\n");
4286 }
4665 4287
4666 /* 4288 /* Let's move on to the TxMac */
4667 * When any of the errors occur and TXMAC generates 4289 if (status & ET_INTR_TXMAC) {
4668 * an interrupt to report these errors, it usually 4290 u32 err = readl(&iomem->txmac.err);
4669 * means that TXMAC has detected an error in the data
4670 * stream retrieved from the on-chip Tx Q. All of
4671 * these errors are catastrophic and TXMAC won't be
4672 * able to recover data when these errors occur. In
4673 * a nutshell, the whole Tx path will have to be reset
4674 * and re-configured afterwards.
4675 */
4676 dev_warn(&adapter->pdev->dev,
4677 "TXMAC interrupt, error 0x%08x\n",
4678 err);
4679 4291
4680 /* If we are debugging, we want to see this error, 4292 /*
4681 * otherwise we just want the device to be reset and 4293 * When any of the errors occur and TXMAC generates an
4682 * continue 4294 * interrupt to report these errors, it usually means that
4683 */ 4295 * TXMAC has detected an error in the data stream retrieved
4684 } 4296 * from the on-chip Tx Q. All of these errors are catastrophic
4297 * and TXMAC won't be able to recover data when these errors
4298 * occur. In a nutshell, the whole Tx path will have to be reset
4299 * and re-configured afterwards.
4300 */
4301 dev_warn(&adapter->pdev->dev,
4302 "TXMAC interrupt, error 0x%08x\n",
4303 err);
4685 4304
4686 /* Handle RXMAC Interrupt */ 4305 /*
4687 if (status & ET_INTR_RXMAC) { 4306 * If we are debugging, we want to see this error, otherwise we
4688 /* 4307 * just want the device to be reset and continue
4689 * These interrupts are catastrophic to the device, 4308 */
4690 * what we need to do is disable the interrupts and 4309 }
4691 * set the flag to cause us to reset so we can solve
4692 * this issue.
4693 */
4694 /* MP_SET_FLAG( adapter,
4695 fMP_ADAPTER_HARDWARE_ERROR); */
4696 4310
4697 dev_warn(&adapter->pdev->dev, 4311 /* Handle RXMAC Interrupt */
4698 "RXMAC interrupt, error 0x%08x. Requesting reset\n", 4312 if (status & ET_INTR_RXMAC) {
4699 readl(&iomem->rxmac.err_reg)); 4313 /*
4314 * These interrupts are catastrophic to the device, what we need
4315 * to do is disable the interrupts and set the flag to cause us
4316 * to reset so we can solve this issue.
4317 */
4318 /* MP_SET_FLAG( adapter, fMP_ADAPTER_HARDWARE_ERROR); */
4700 4319
4701 dev_warn(&adapter->pdev->dev, 4320 dev_warn(&adapter->pdev->dev,
4702 "Enable 0x%08x, Diag 0x%08x\n", 4321 "RXMAC interrupt, error 0x%08x. Requesting reset\n",
4703 readl(&iomem->rxmac.ctrl), 4322 readl(&iomem->rxmac.err_reg));
4704 readl(&iomem->rxmac.rxq_diag));
4705 4323
4706 /* 4324 dev_warn(&adapter->pdev->dev,
4707 * If we are debugging, we want to see this error, 4325 "Enable 0x%08x, Diag 0x%08x\n",
4708 * otherwise we just want the device to be reset and 4326 readl(&iomem->rxmac.ctrl),
4709 * continue 4327 readl(&iomem->rxmac.rxq_diag));
4710 */
4711 }
4712 4328
4713 /* Handle MAC_STAT Interrupt */ 4329 /*
4714 if (status & ET_INTR_MAC_STAT) { 4330 * If we are debugging, we want to see this error, otherwise we
4715 /* 4331 * just want the device to be reset and continue
4716 * This means at least one of the un-masked counters 4332 */
4717 * in the MAC_STAT block has rolled over. Use this 4333 }
4718 * to maintain the top, software managed bits of the
4719 * counter(s).
4720 */
4721 et1310_handle_macstat_interrupt(adapter);
4722 }
4723 4334
4724 /* Handle SLV Timeout Interrupt */ 4335 /* Handle MAC_STAT Interrupt */
4725 if (status & ET_INTR_SLV_TIMEOUT) { 4336 if (status & ET_INTR_MAC_STAT) {
4726 /* 4337 /*
4727 * This means a timeout has occurred on a read or 4338 * This means at least one of the un-masked counters in the
4728 * write request to one of the JAGCore registers. The 4339 * MAC_STAT block has rolled over. Use this to maintain the top,
4729 * Global Resources block has terminated the request 4340 * software managed bits of the counter(s).
4730 * and on a read request, returned a "fake" value. 4341 */
4731 * The most likely reasons are: Bad Address or the 4342 et1310_handle_macstat_interrupt(adapter);
4732 * addressed module is in a power-down state and
4733 * can't respond.
4734 */
4735 }
4736 } 4343 }
4344
4345 /* Handle SLV Timeout Interrupt */
4346 if (status & ET_INTR_SLV_TIMEOUT) {
4347 /*
4348 * This means a timeout has occurred on a read or write request
4349 * to one of the JAGCore registers. The Global Resources block
4350 * has terminated the request and on a read request, returned a
4351 * "fake" value. The most likely reasons are: Bad Address or the
4352 * addressed module is in a power-down state and can't respond.
4353 */
4354 }
4355out:
4737 et131x_enable_interrupts(adapter); 4356 et131x_enable_interrupts(adapter);
4738} 4357}
4739 4358
@@ -5221,7 +4840,7 @@ static const struct net_device_ops et131x_netdev_ops = {
5221 * contained in the pci_device_id table. This routine is the equivalent to 4840 * contained in the pci_device_id table. This routine is the equivalent to
5222 * a device insertion routine. 4841 * a device insertion routine.
5223 */ 4842 */
5224static int __devinit et131x_pci_setup(struct pci_dev *pdev, 4843static int et131x_pci_setup(struct pci_dev *pdev,
5225 const struct pci_device_id *ent) 4844 const struct pci_device_id *ent)
5226{ 4845{
5227 struct net_device *netdev; 4846 struct net_device *netdev;
@@ -5423,7 +5042,7 @@ static struct pci_driver et131x_driver = {
5423 .name = DRIVER_NAME, 5042 .name = DRIVER_NAME,
5424 .id_table = et131x_pci_table, 5043 .id_table = et131x_pci_table,
5425 .probe = et131x_pci_setup, 5044 .probe = et131x_pci_setup,
5426 .remove = __devexit_p(et131x_pci_remove), 5045 .remove = et131x_pci_remove,
5427 .driver.pm = ET131X_PM_OPS, 5046 .driver.pm = ET131X_PM_OPS,
5428}; 5047};
5429 5048
diff --git a/drivers/staging/et131x/et131x.h b/drivers/staging/et131x/et131x.h
index 864379b4e8df..347e63ddde1f 100644
--- a/drivers/staging/et131x/et131x.h
+++ b/drivers/staging/et131x/et131x.h
@@ -1538,10 +1538,6 @@ struct address_map {
1538 * 0: int_en 1538 * 0: int_en
1539 */ 1539 */
1540 1540
1541#define ET_PHY_INT_MASK_AUTONEGSTAT 0x0100
1542#define ET_PHY_INT_MASK_LINKSTAT 0x0004
1543#define ET_PHY_INT_MASK_ENABLE 0x0001
1544
1545/* MI Register 25: Interrupt Status Reg(0x19) 1541/* MI Register 25: Interrupt Status Reg(0x19)
1546 * 15-10: reserved 1542 * 15-10: reserved
1547 * 9: mdio_sync_lost 1543 * 9: mdio_sync_lost
diff --git a/drivers/staging/ft1000/ft1000-usb/ft1000_proc.c b/drivers/staging/ft1000/ft1000-usb/ft1000_proc.c
index 5ae396716136..1edaddba816f 100644
--- a/drivers/staging/ft1000/ft1000-usb/ft1000_proc.c
+++ b/drivers/staging/ft1000/ft1000-usb/ft1000_proc.c
@@ -205,7 +205,7 @@ int ft1000_init_proc(struct net_device *dev)
205{ 205{
206 struct ft1000_info *info; 206 struct ft1000_info *info;
207 struct proc_dir_entry *ft1000_proc_file; 207 struct proc_dir_entry *ft1000_proc_file;
208 int ret = 0; 208 int ret = -EINVAL;
209 209
210 info = netdev_priv(dev); 210 info = netdev_priv(dev);
211 211
@@ -213,7 +213,6 @@ int ft1000_init_proc(struct net_device *dev)
213 if (info->ft1000_proc_dir == NULL) { 213 if (info->ft1000_proc_dir == NULL) {
214 printk(KERN_WARNING "Unable to create %s dir.\n", 214 printk(KERN_WARNING "Unable to create %s dir.\n",
215 FT1000_PROC_DIR); 215 FT1000_PROC_DIR);
216 ret = -EINVAL;
217 goto fail; 216 goto fail;
218 } 217 }
219 218
@@ -223,7 +222,6 @@ int ft1000_init_proc(struct net_device *dev)
223 222
224 if (ft1000_proc_file == NULL) { 223 if (ft1000_proc_file == NULL) {
225 printk(KERN_WARNING "Unable to create /proc entry.\n"); 224 printk(KERN_WARNING "Unable to create /proc entry.\n");
226 ret = -EINVAL;
227 goto fail_entry; 225 goto fail_entry;
228 } 226 }
229 227
diff --git a/drivers/staging/fwserial/Kconfig b/drivers/staging/fwserial/Kconfig
new file mode 100644
index 000000000000..580406cb1808
--- /dev/null
+++ b/drivers/staging/fwserial/Kconfig
@@ -0,0 +1,9 @@
1config FIREWIRE_SERIAL
2 tristate "TTY over Firewire"
3 depends on FIREWIRE
4 help
5 This enables TTY over IEEE 1394, providing high-speed serial
6 connectivity to cabled peers.
7
8 To compile this driver as a module, say M here: the module will
9 be called firewire-serial.
diff --git a/drivers/staging/fwserial/Makefile b/drivers/staging/fwserial/Makefile
new file mode 100644
index 000000000000..2170869a19b1
--- /dev/null
+++ b/drivers/staging/fwserial/Makefile
@@ -0,0 +1,2 @@
1obj-$(CONFIG_FIREWIRE_SERIAL) += firewire-serial.o
2firewire-serial-objs := fwserial.o dma_fifo.o
diff --git a/drivers/staging/fwserial/TODO b/drivers/staging/fwserial/TODO
new file mode 100644
index 000000000000..726900548eae
--- /dev/null
+++ b/drivers/staging/fwserial/TODO
@@ -0,0 +1,37 @@
1TODOs
2-----
31. Implement retries for RCODE_BUSY, RCODE_NO_ACK and RCODE_SEND_ERROR
4 - I/O is handled asynchronously which presents some issues when error
5 conditions occur.
62. Implement _robust_ console on top of this. The existing prototype console
7 driver is not ready for the big leagues yet.
83. Expose means of controlling attach/detach of peers via sysfs. Include
9 GUID-to-port matching/whitelist/blacklist.
10
11-- Issues with firewire stack --
121. This driver uses the same unregistered vendor id that the firewire core does
13 (0xd00d1e). Perhaps this could be exposed as a define in
14 firewire-constants.h?
152. MAX_ASYNC_PAYLOAD needs to be publicly exposed by core/ohci
16 - otherwise how will this driver know the max size of address window to
17 open for one packet write?
183. Maybe device_max_receive() and link_speed_to_max_payload() should be
19 taken up by the firewire core?
204. To avoid dropping rx data while still limiting the maximum buffering,
21 the size of the AR context must be known. How to expose this to drivers?
225. Explore if bigger AR context will reduce RCODE_BUSY responses
23 (or auto-grow to certain max size -- but this would require major surgery
24 as the current AR is contiguously mapped)
25
26-- Issues with TTY core --
27 1. Hack for alternate device name scheme
28 - because udev no longer allows device renaming, devices should have
29 their proper names on creation. This is an issue for creating the
30 fwloop<n> device with the fwtty<n> devices because although duplicating
31 roughly the same operations as tty_port_register_device() isn't difficult,
32 access to the tty_class & tty_fops is restricted in scope.
33
34 This is currently being worked around in create_loop_device() by
35 extracting the tty_class ptr and tty_fops ptr from the previously created
36 tty devices. Perhaps an add'l api can be added -- eg.,
37 tty_{port_}register_named_device().
diff --git a/drivers/staging/fwserial/dma_fifo.c b/drivers/staging/fwserial/dma_fifo.c
new file mode 100644
index 000000000000..5e8463445504
--- /dev/null
+++ b/drivers/staging/fwserial/dma_fifo.c
@@ -0,0 +1,307 @@
1/*
2 * DMA-able FIFO implementation
3 *
4 * Copyright (C) 2012 Peter Hurley <peter@hurleysoftware.com>
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; either version 2 of the License, or
9 * (at your option) any later version.
10 *
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
15 *
16 * You should have received a copy of the GNU General Public License
17 * along with this program; if not, write to the Free Software Foundation,
18 * Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
19 */
20
21#include <linux/kernel.h>
22#include <linux/slab.h>
23#include <linux/list.h>
24#include <linux/bug.h>
25
26#include "dma_fifo.h"
27
28#ifdef DEBUG_TRACING
29#define df_trace(s, args...) pr_debug(s, ##args)
30#else
31#define df_trace(s, args...)
32#endif
33
34#define FAIL(fifo, condition, format...) ({ \
35 fifo->corrupt = !!(condition); \
36 WARN(fifo->corrupt, format); \
37})
38
39/*
40 * private helper fn to determine if check is in open interval (lo,hi)
41 */
42static bool addr_check(unsigned check, unsigned lo, unsigned hi)
43{
44 return check - (lo + 1) < (hi - 1) - lo;
45}
46
47/**
48 * dma_fifo_init: initialize the fifo to a valid but inoperative state
49 * @fifo: address of in-place "struct dma_fifo" object
50 */
51void dma_fifo_init(struct dma_fifo *fifo)
52{
53 memset(fifo, 0, sizeof(*fifo));
54 INIT_LIST_HEAD(&fifo->pending);
55}
56
57/**
58 * dma_fifo_alloc - initialize and allocate dma_fifo
59 * @fifo: address of in-place "struct dma_fifo" object
60 * @size: 'apparent' size, in bytes, of fifo
61 * @align: dma alignment to maintain (should be at least cpu cache alignment),
62 * must be power of 2
63 * @tx_limit: maximum # of bytes transmissable per dma (rounded down to
64 * multiple of alignment, but at least align size)
65 * @open_limit: maximum # of outstanding dma transactions allowed
66 * @gfp_mask: get_free_pages mask, passed to kmalloc()
67 *
68 * The 'apparent' size will be rounded up to next greater aligned size.
69 * Returns 0 if no error, otherwise an error code
70 */
71int dma_fifo_alloc(struct dma_fifo *fifo, int size, unsigned align,
72 int tx_limit, int open_limit, gfp_t gfp_mask)
73{
74 int capacity;
75
76 if (!is_power_of_2(align) || size < 0)
77 return -EINVAL;
78
79 size = round_up(size, align);
80 capacity = size + align * open_limit + align * DMA_FIFO_GUARD;
81 fifo->data = kmalloc(capacity, gfp_mask);
82 if (!fifo->data)
83 return -ENOMEM;
84
85 fifo->in = 0;
86 fifo->out = 0;
87 fifo->done = 0;
88 fifo->size = size;
89 fifo->avail = size;
90 fifo->align = align;
91 fifo->tx_limit = max_t(int, round_down(tx_limit, align), align);
92 fifo->open = 0;
93 fifo->open_limit = open_limit;
94 fifo->guard = size + align * open_limit;
95 fifo->capacity = capacity;
96 fifo->corrupt = 0;
97
98 return 0;
99}
100
101/**
102 * dma_fifo_free - frees the fifo
103 * @fifo: address of in-place "struct dma_fifo" to free
104 *
105 * Also reinits the fifo to a valid but inoperative state. This
106 * allows the fifo to be reused with a different target requiring
107 * different fifo parameters.
108 */
109void dma_fifo_free(struct dma_fifo *fifo)
110{
111 struct dma_pending *pending, *next;
112
113 if (fifo->data == NULL)
114 return;
115
116 list_for_each_entry_safe(pending, next, &fifo->pending, link)
117 list_del_init(&pending->link);
118 kfree(fifo->data);
119 fifo->data = NULL;
120}
121
122/**
123 * dma_fifo_reset - dumps the fifo contents and reinits for reuse
124 * @fifo: address of in-place "struct dma_fifo" to reset
125 */
126void dma_fifo_reset(struct dma_fifo *fifo)
127{
128 struct dma_pending *pending, *next;
129
130 if (fifo->data == NULL)
131 return;
132
133 list_for_each_entry_safe(pending, next, &fifo->pending, link)
134 list_del_init(&pending->link);
135 fifo->in = 0;
136 fifo->out = 0;
137 fifo->done = 0;
138 fifo->avail = fifo->size;
139 fifo->open = 0;
140 fifo->corrupt = 0;
141}
142
143/**
144 * dma_fifo_in - copies data into the fifo
145 * @fifo: address of in-place "struct dma_fifo" to write to
146 * @src: buffer to copy from
147 * @n: # of bytes to copy
148 *
149 * Returns the # of bytes actually copied, which can be less than requested if
150 * the fifo becomes full. If < 0, return is error code.
151 */
152int dma_fifo_in(struct dma_fifo *fifo, const void *src, int n)
153{
154 int ofs, l;
155
156 if (fifo->data == NULL)
157 return -ENOENT;
158 if (fifo->corrupt)
159 return -ENXIO;
160
161 if (n > fifo->avail)
162 n = fifo->avail;
163 if (n <= 0)
164 return 0;
165
166 ofs = fifo->in % fifo->capacity;
167 l = min(n, fifo->capacity - ofs);
168 memcpy(fifo->data + ofs, src, l);
169 memcpy(fifo->data, src + l, n - l);
170
171 if (FAIL(fifo, addr_check(fifo->done, fifo->in, fifo->in + n) ||
172 fifo->avail < n,
173 "fifo corrupt: in:%u out:%u done:%u n:%d avail:%d",
174 fifo->in, fifo->out, fifo->done, n, fifo->avail))
175 return -ENXIO;
176
177 fifo->in += n;
178 fifo->avail -= n;
179
180 df_trace("in:%u out:%u done:%u n:%d avail:%d", fifo->in, fifo->out,
181 fifo->done, n, fifo->avail);
182
183 return n;
184}
185
186/**
187 * dma_fifo_out_pend - gets address/len of next avail read and marks as pended
188 * @fifo: address of in-place "struct dma_fifo" to read from
189 * @pended: address of structure to fill with read address/len
190 * The data/len fields will be NULL/0 if no dma is pended.
191 *
192 * Returns the # of used bytes remaining in fifo (ie, if > 0, more data
193 * remains in the fifo that was not pended). If < 0, return is error code.
194 */
195int dma_fifo_out_pend(struct dma_fifo *fifo, struct dma_pending *pended)
196{
197 unsigned len, n, ofs, l, limit;
198
199 if (fifo->data == NULL)
200 return -ENOENT;
201 if (fifo->corrupt)
202 return -ENXIO;
203
204 pended->len = 0;
205 pended->data = NULL;
206 pended->out = fifo->out;
207
208 len = fifo->in - fifo->out;
209 if (!len)
210 return -ENODATA;
211 if (fifo->open == fifo->open_limit)
212 return -EAGAIN;
213
214 n = len;
215 ofs = fifo->out % fifo->capacity;
216 l = fifo->capacity - ofs;
217 limit = min_t(unsigned, l, fifo->tx_limit);
218 if (n > limit) {
219 n = limit;
220 fifo->out += limit;
221 } else if (ofs + n > fifo->guard) {
222 fifo->out += l;
223 fifo->in = fifo->out;
224 } else {
225 fifo->out += round_up(n, fifo->align);
226 fifo->in = fifo->out;
227 }
228
229 df_trace("in: %u out: %u done: %u n: %d len: %u avail: %d", fifo->in,
230 fifo->out, fifo->done, n, len, fifo->avail);
231
232 pended->len = n;
233 pended->data = fifo->data + ofs;
234 pended->next = fifo->out;
235 list_add_tail(&pended->link, &fifo->pending);
236 ++fifo->open;
237
238 if (FAIL(fifo, fifo->open > fifo->open_limit,
239 "past open limit:%d (limit:%d)",
240 fifo->open, fifo->open_limit))
241 return -ENXIO;
242 if (FAIL(fifo, fifo->out & (fifo->align - 1),
243 "fifo out unaligned:%u (align:%u)",
244 fifo->out, fifo->align))
245 return -ENXIO;
246
247 return len - n;
248}
249
250/**
251 * dma_fifo_out_complete - marks pended dma as completed
252 * @fifo: address of in-place "struct dma_fifo" which was read from
253 * @complete: address of structure for previously pended dma to mark completed
254 */
255int dma_fifo_out_complete(struct dma_fifo *fifo, struct dma_pending *complete)
256{
257 struct dma_pending *pending, *next, *tmp;
258
259 if (fifo->data == NULL)
260 return -ENOENT;
261 if (fifo->corrupt)
262 return -ENXIO;
263 if (list_empty(&fifo->pending) && fifo->open == 0)
264 return -EINVAL;
265
266 if (FAIL(fifo, list_empty(&fifo->pending) != (fifo->open == 0),
267 "pending list disagrees with open count:%d",
268 fifo->open))
269 return -ENXIO;
270
271 tmp = complete->data;
272 *tmp = *complete;
273 list_replace(&complete->link, &tmp->link);
274 dp_mark_completed(tmp);
275
276 /* Only update the fifo in the original pended order */
277 list_for_each_entry_safe(pending, next, &fifo->pending, link) {
278 if (!dp_is_completed(pending)) {
279 df_trace("still pending: saved out: %u len: %d",
280 pending->out, pending->len);
281 break;
282 }
283
284 if (FAIL(fifo, pending->out != fifo->done ||
285 addr_check(fifo->in, fifo->done, pending->next),
286 "in:%u out:%u done:%u saved:%u next:%u",
287 fifo->in, fifo->out, fifo->done, pending->out,
288 pending->next))
289 return -ENXIO;
290
291 list_del_init(&pending->link);
292 fifo->done = pending->next;
293 fifo->avail += pending->len;
294 --fifo->open;
295
296 df_trace("in: %u out: %u done: %u len: %u avail: %d", fifo->in,
297 fifo->out, fifo->done, pending->len, fifo->avail);
298 }
299
300 if (FAIL(fifo, fifo->open < 0, "open dma:%d < 0", fifo->open))
301 return -ENXIO;
302 if (FAIL(fifo, fifo->avail > fifo->size, "fifo avail:%d > size:%d",
303 fifo->avail, fifo->size))
304 return -ENXIO;
305
306 return 0;
307}
diff --git a/drivers/staging/fwserial/dma_fifo.h b/drivers/staging/fwserial/dma_fifo.h
new file mode 100644
index 000000000000..a113fe1e6f19
--- /dev/null
+++ b/drivers/staging/fwserial/dma_fifo.h
@@ -0,0 +1,130 @@
1/*
2 * DMA-able FIFO interface
3 *
4 * Copyright (C) 2012 Peter Hurley <peter@hurleysoftware.com>
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; either version 2 of the License, or
9 * (at your option) any later version.
10 *
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
15 *
16 * You should have received a copy of the GNU General Public License
17 * along with this program; if not, write to the Free Software Foundation,
18 * Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
19 */
20
21#ifndef _DMA_FIFO_H_
22#define _DMA_FIFO_H_
23
24/**
25 * The design basis for the DMA FIFO is to provide an output side that
26 * complies with the streaming DMA API design that can be DMA'd from directly
27 * (without additional copying), coupled with an input side that maintains a
28 * logically consistent 'apparent' size (ie, bytes in + bytes avail is static
29 * for the lifetime of the FIFO).
30 *
31 * DMA output transactions originate on a cache line boundary and can be
32 * variably-sized. DMA output transactions can be retired out-of-order but
33 * the FIFO will only advance the output in the original input sequence.
34 * This means the FIFO will eventually stall if a transaction is never retired.
35 *
36 * Chunking the output side into cache line multiples means that some FIFO
37 * memory is unused. For example, if all the avail input has been pended out,
38 * then the in and out markers are re-aligned to the next cache line.
39 * The maximum possible waste is
40 * (cache line alignment - 1) * (max outstanding dma transactions)
41 * This potential waste requires additional hidden capacity within the FIFO
42 * to be able to accept input while the 'apparent' size has not been reached.
43 *
44 * Additional cache lines (ie, guard area) are used to minimize DMA
45 * fragmentation when wrapping at the end of the FIFO. Input is allowed into the
46 * guard area, but the in and out FIFO markers are wrapped when DMA is pended.
47 */
48
49#define DMA_FIFO_GUARD 3 /* # of cache lines to reserve for the guard area */
50
51struct dma_fifo {
52 unsigned in;
53 unsigned out; /* updated when dma is pended */
54 unsigned done; /* updated upon dma completion */
55 struct {
56 unsigned corrupt:1;
57 };
58 int size; /* 'apparent' size of fifo */
59 int guard; /* ofs of guard area */
60 int capacity; /* size + reserved */
61 int avail; /* # of unused bytes in fifo */
62 unsigned align; /* must be power of 2 */
63 int tx_limit; /* max # of bytes per dma transaction */
64 int open_limit; /* max # of outstanding allowed */
65 int open; /* # of outstanding dma transactions */
66 struct list_head pending; /* fifo markers for outstanding dma */
67 void *data;
68};
69
70struct dma_pending {
71 struct list_head link;
72 void *data;
73 unsigned len;
74 unsigned next;
75 unsigned out;
76};
77
78static inline void dp_mark_completed(struct dma_pending *dp)
79{
80 dp->data += 1;
81}
82
83static inline bool dp_is_completed(struct dma_pending *dp)
84{
85 return (unsigned long)dp->data & 1UL;
86}
87
88extern void dma_fifo_init(struct dma_fifo *fifo);
89extern int dma_fifo_alloc(struct dma_fifo *fifo, int size, unsigned align,
90 int tx_limit, int open_limit, gfp_t gfp_mask);
91extern void dma_fifo_free(struct dma_fifo *fifo);
92extern void dma_fifo_reset(struct dma_fifo *fifo);
93extern int dma_fifo_in(struct dma_fifo *fifo, const void *src, int n);
94extern int dma_fifo_out_pend(struct dma_fifo *fifo, struct dma_pending *pended);
95extern int dma_fifo_out_complete(struct dma_fifo *fifo,
96 struct dma_pending *complete);
97
98/* returns the # of used bytes in the fifo */
99static inline int dma_fifo_level(struct dma_fifo *fifo)
100{
101 return fifo->size - fifo->avail;
102}
103
104/* returns the # of bytes ready for output in the fifo */
105static inline int dma_fifo_out_level(struct dma_fifo *fifo)
106{
107 return fifo->in - fifo->out;
108}
109
110/* returns the # of unused bytes in the fifo */
111static inline int dma_fifo_avail(struct dma_fifo *fifo)
112{
113 return fifo->avail;
114}
115
116/* returns true if fifo has max # of outstanding dmas */
117static inline bool dma_fifo_busy(struct dma_fifo *fifo)
118{
119 return fifo->open == fifo->open_limit;
120}
121
122/* changes the max size of dma returned from dma_fifo_out_pend() */
123static inline int dma_fifo_change_tx_limit(struct dma_fifo *fifo, int tx_limit)
124{
125 tx_limit = round_down(tx_limit, fifo->align);
126 fifo->tx_limit = max_t(int, tx_limit, fifo->align);
127 return 0;
128}
129
130#endif /* _DMA_FIFO_H_ */
diff --git a/drivers/staging/fwserial/fwserial.c b/drivers/staging/fwserial/fwserial.c
new file mode 100644
index 000000000000..5d4d64a3ea81
--- /dev/null
+++ b/drivers/staging/fwserial/fwserial.c
@@ -0,0 +1,2946 @@
1/*
2 * FireWire Serial driver
3 *
4 * Copyright (C) 2012 Peter Hurley <peter@hurleysoftware.com>
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; either version 2 of the License, or
9 * (at your option) any later version.
10 *
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
15 *
16 * You should have received a copy of the GNU General Public License
17 * along with this program; if not, write to the Free Software Foundation,
18 * Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
19 */
20
21#include <linux/sched.h>
22#include <linux/slab.h>
23#include <linux/device.h>
24#include <linux/mod_devicetable.h>
25#include <linux/rculist.h>
26#include <linux/workqueue.h>
27#include <linux/ratelimit.h>
28#include <linux/bug.h>
29#include <linux/uaccess.h>
30
31#include "fwserial.h"
32
33#define be32_to_u64(hi, lo) ((u64)be32_to_cpu(hi) << 32 | be32_to_cpu(lo))
34
35#define LINUX_VENDOR_ID 0xd00d1eU /* same id used in card root directory */
36#define FWSERIAL_VERSION 0x00e81cU /* must be unique within LINUX_VENDOR_ID */
37
38/* configurable options */
39static int num_ttys = 4; /* # of std ttys to create per fw_card */
40 /* - doubles as loopback port index */
41static bool auto_connect = true; /* try to VIRT_CABLE to every peer */
42static bool create_loop_dev = true; /* create a loopback device for each card */
43bool limit_bw; /* limit async bandwidth to 20% of max */
44
45module_param_named(ttys, num_ttys, int, S_IRUGO | S_IWUSR);
46module_param_named(auto, auto_connect, bool, S_IRUGO | S_IWUSR);
47module_param_named(loop, create_loop_dev, bool, S_IRUGO | S_IWUSR);
48module_param(limit_bw, bool, S_IRUGO | S_IWUSR);
49
50/*
51 * Threshold below which the tty is woken for writing
52 * - should be equal to WAKEUP_CHARS in drivers/tty/n_tty.c because
53 * even if the writer is woken, n_tty_poll() won't set POLLOUT until
54 * our fifo is below this level
55 */
56#define WAKEUP_CHARS 256
57
58/**
59 * fwserial_list: list of every fw_serial created for each fw_card
60 * See discussion in fwserial_probe.
61 */
62static LIST_HEAD(fwserial_list);
63static DEFINE_MUTEX(fwserial_list_mutex);
64
65/**
66 * port_table: array of tty ports allocated to each fw_card
67 *
68 * tty ports are allocated during probe when an fw_serial is first
69 * created for a given fw_card. Ports are allocated in a contiguous block,
70 * each block consisting of 'num_ports' ports.
71 */
72static struct fwtty_port *port_table[MAX_TOTAL_PORTS];
73static DEFINE_MUTEX(port_table_lock);
74static bool port_table_corrupt;
75#define FWTTY_INVALID_INDEX MAX_TOTAL_PORTS
76
77/* total # of tty ports created per fw_card */
78static int num_ports;
79
80/* slab used as pool for struct fwtty_transactions */
81static struct kmem_cache *fwtty_txn_cache;
82
83struct fwtty_transaction;
84typedef void (*fwtty_transaction_cb)(struct fw_card *card, int rcode,
85 void *data, size_t length,
86 struct fwtty_transaction *txn);
87
88struct fwtty_transaction {
89 struct fw_transaction fw_txn;
90 fwtty_transaction_cb callback;
91 struct fwtty_port *port;
92 union {
93 struct dma_pending dma_pended;
94 };
95};
96
97#define to_device(a, b) (a->b)
98#define fwtty_err(p, s, v...) dev_err(to_device(p, device), s, ##v)
99#define fwtty_info(p, s, v...) dev_info(to_device(p, device), s, ##v)
100#define fwtty_notice(p, s, v...) dev_notice(to_device(p, device), s, ##v)
101#define fwtty_dbg(p, s, v...) \
102 dev_dbg(to_device(p, device), "%s: " s, __func__, ##v)
103#define fwtty_err_ratelimited(p, s, v...) \
104 dev_err_ratelimited(to_device(p, device), s, ##v)
105
106#ifdef DEBUG
107static inline void debug_short_write(struct fwtty_port *port, int c, int n)
108{
109 int avail;
110
111 if (n < c) {
112 spin_lock_bh(&port->lock);
113 avail = dma_fifo_avail(&port->tx_fifo);
114 spin_unlock_bh(&port->lock);
115 fwtty_dbg(port, "short write: avail:%d req:%d wrote:%d",
116 avail, c, n);
117 }
118}
119#else
120#define debug_short_write(port, c, n)
121#endif
122
123static struct fwtty_peer *__fwserial_peer_by_node_id(struct fw_card *card,
124 int generation, int id);
125
126#ifdef FWTTY_PROFILING
127
128static void profile_fifo_avail(struct fwtty_port *port, unsigned *stat)
129{
130 spin_lock_bh(&port->lock);
131 profile_size_distrib(stat, dma_fifo_avail(&port->tx_fifo));
132 spin_unlock_bh(&port->lock);
133}
134
135static void dump_profile(struct seq_file *m, struct stats *stats)
136{
137 /* for each stat, print sum of 0 to 2^k, then individually */
138 int k = 4;
139 unsigned sum;
140 int j;
141 char t[10];
142
143 snprintf(t, 10, "< %d", 1 << k);
144 seq_printf(m, "\n%14s %6s", " ", t);
145 for (j = k + 1; j < DISTRIBUTION_MAX_INDEX; ++j)
146 seq_printf(m, "%6d", 1 << j);
147
148 ++k;
149 for (j = 0, sum = 0; j <= k; ++j)
150 sum += stats->reads[j];
151 seq_printf(m, "\n%14s: %6d", "reads", sum);
152 for (j = k + 1; j <= DISTRIBUTION_MAX_INDEX; ++j)
153 seq_printf(m, "%6d", stats->reads[j]);
154
155 for (j = 0, sum = 0; j <= k; ++j)
156 sum += stats->writes[j];
157 seq_printf(m, "\n%14s: %6d", "writes", sum);
158 for (j = k + 1; j <= DISTRIBUTION_MAX_INDEX; ++j)
159 seq_printf(m, "%6d", stats->writes[j]);
160
161 for (j = 0, sum = 0; j <= k; ++j)
162 sum += stats->txns[j];
163 seq_printf(m, "\n%14s: %6d", "txns", sum);
164 for (j = k + 1; j <= DISTRIBUTION_MAX_INDEX; ++j)
165 seq_printf(m, "%6d", stats->txns[j]);
166
167 for (j = 0, sum = 0; j <= k; ++j)
168 sum += stats->unthrottle[j];
169 seq_printf(m, "\n%14s: %6d", "avail @ unthr", sum);
170 for (j = k + 1; j <= DISTRIBUTION_MAX_INDEX; ++j)
171 seq_printf(m, "%6d", stats->unthrottle[j]);
172}
173
174#else
175#define profile_fifo_avail(port, stat)
176#define dump_profile(m, stats)
177#endif
178
179/* Returns the max receive packet size for the given card */
180static inline int device_max_receive(struct fw_device *fw_device)
181{
182 return 1 << (clamp_t(int, fw_device->max_rec, 8U, 13U) + 1);
183}
184
185static void fwtty_log_tx_error(struct fwtty_port *port, int rcode)
186{
187 switch (rcode) {
188 case RCODE_SEND_ERROR:
189 fwtty_err_ratelimited(port, "card busy");
190 break;
191 case RCODE_ADDRESS_ERROR:
192 fwtty_err_ratelimited(port, "bad unit addr or write length");
193 break;
194 case RCODE_DATA_ERROR:
195 fwtty_err_ratelimited(port, "failed rx");
196 break;
197 case RCODE_NO_ACK:
198 fwtty_err_ratelimited(port, "missing ack");
199 break;
200 case RCODE_BUSY:
201 fwtty_err_ratelimited(port, "remote busy");
202 break;
203 default:
204 fwtty_err_ratelimited(port, "failed tx: %d", rcode);
205 }
206}
207
208static void fwtty_txn_constructor(void *this)
209{
210 struct fwtty_transaction *txn = this;
211
212 init_timer(&txn->fw_txn.split_timeout_timer);
213}
214
215static void fwtty_common_callback(struct fw_card *card, int rcode,
216 void *payload, size_t len, void *cb_data)
217{
218 struct fwtty_transaction *txn = cb_data;
219 struct fwtty_port *port = txn->port;
220
221 if (port && rcode != RCODE_COMPLETE)
222 fwtty_log_tx_error(port, rcode);
223 if (txn->callback)
224 txn->callback(card, rcode, payload, len, txn);
225 kmem_cache_free(fwtty_txn_cache, txn);
226}
227
228static int fwtty_send_data_async(struct fwtty_peer *peer, int tcode,
229 unsigned long long addr, void *payload,
230 size_t len, fwtty_transaction_cb callback,
231 struct fwtty_port *port)
232{
233 struct fwtty_transaction *txn;
234 int generation;
235
236 txn = kmem_cache_alloc(fwtty_txn_cache, GFP_ATOMIC);
237 if (!txn)
238 return -ENOMEM;
239
240 txn->callback = callback;
241 txn->port = port;
242
243 generation = peer->generation;
244 smp_rmb();
245 fw_send_request(peer->serial->card, &txn->fw_txn, tcode,
246 peer->node_id, generation, peer->speed, addr, payload,
247 len, fwtty_common_callback, txn);
248 return 0;
249}
250
251static void fwtty_send_txn_async(struct fwtty_peer *peer,
252 struct fwtty_transaction *txn, int tcode,
253 unsigned long long addr, void *payload,
254 size_t len, fwtty_transaction_cb callback,
255 struct fwtty_port *port)
256{
257 int generation;
258
259 txn->callback = callback;
260 txn->port = port;
261
262 generation = peer->generation;
263 smp_rmb();
264 fw_send_request(peer->serial->card, &txn->fw_txn, tcode,
265 peer->node_id, generation, peer->speed, addr, payload,
266 len, fwtty_common_callback, txn);
267}
268
269
270static void __fwtty_restart_tx(struct fwtty_port *port)
271{
272 int len, avail;
273
274 len = dma_fifo_out_level(&port->tx_fifo);
275 if (len)
276 schedule_delayed_work(&port->drain, 0);
277 avail = dma_fifo_avail(&port->tx_fifo);
278
279 fwtty_dbg(port, "fifo len: %d avail: %d", len, avail);
280}
281
282static void fwtty_restart_tx(struct fwtty_port *port)
283{
284 spin_lock_bh(&port->lock);
285 __fwtty_restart_tx(port);
286 spin_unlock_bh(&port->lock);
287}
288
289/**
290 * fwtty_update_port_status - decodes & dispatches line status changes
291 *
292 * Note: in loopback, the port->lock is being held. Only use functions that
293 * don't attempt to reclaim the port->lock.
294 */
295static void fwtty_update_port_status(struct fwtty_port *port, unsigned status)
296{
297 unsigned delta;
298 struct tty_struct *tty;
299
300 /* simulated LSR/MSR status from remote */
301 status &= ~MCTRL_MASK;
302 delta = (port->mstatus ^ status) & ~MCTRL_MASK;
303 delta &= ~(status & TIOCM_RNG);
304 port->mstatus = status;
305
306 if (delta & TIOCM_RNG)
307 ++port->icount.rng;
308 if (delta & TIOCM_DSR)
309 ++port->icount.dsr;
310 if (delta & TIOCM_CAR)
311 ++port->icount.dcd;
312 if (delta & TIOCM_CTS)
313 ++port->icount.cts;
314
315 fwtty_dbg(port, "status: %x delta: %x", status, delta);
316
317 if (delta & TIOCM_CAR) {
318 tty = tty_port_tty_get(&port->port);
319 if (tty && !C_CLOCAL(tty)) {
320 if (status & TIOCM_CAR)
321 wake_up_interruptible(&port->port.open_wait);
322 else
323 schedule_work(&port->hangup);
324 }
325 tty_kref_put(tty);
326 }
327
328 if (delta & TIOCM_CTS) {
329 tty = tty_port_tty_get(&port->port);
330 if (tty && C_CRTSCTS(tty)) {
331 if (tty->hw_stopped) {
332 if (status & TIOCM_CTS) {
333 tty->hw_stopped = 0;
334 if (port->loopback)
335 __fwtty_restart_tx(port);
336 else
337 fwtty_restart_tx(port);
338 }
339 } else {
340 if (~status & TIOCM_CTS)
341 tty->hw_stopped = 1;
342 }
343 }
344 tty_kref_put(tty);
345
346 } else if (delta & OOB_TX_THROTTLE) {
347 tty = tty_port_tty_get(&port->port);
348 if (tty) {
349 if (tty->hw_stopped) {
350 if (~status & OOB_TX_THROTTLE) {
351 tty->hw_stopped = 0;
352 if (port->loopback)
353 __fwtty_restart_tx(port);
354 else
355 fwtty_restart_tx(port);
356 }
357 } else {
358 if (status & OOB_TX_THROTTLE)
359 tty->hw_stopped = 1;
360 }
361 }
362 tty_kref_put(tty);
363 }
364
365 if (delta & (UART_LSR_BI << 24)) {
366 if (status & (UART_LSR_BI << 24)) {
367 port->break_last = jiffies;
368 schedule_delayed_work(&port->emit_breaks, 0);
369 } else {
370 /* run emit_breaks one last time (if pending) */
371 mod_delayed_work(system_wq, &port->emit_breaks, 0);
372 }
373 }
374
375 if (delta & (TIOCM_DSR | TIOCM_CAR | TIOCM_CTS | TIOCM_RNG))
376 wake_up_interruptible(&port->port.delta_msr_wait);
377}
378
379/**
380 * __fwtty_port_line_status - generate 'line status' for indicated port
381 *
382 * This function returns a remote 'MSR' state based on the local 'MCR' state,
383 * as if a null modem cable was attached. The actual status is a mangling
384 * of TIOCM_* bits suitable for sending to a peer's status_addr.
385 *
386 * Note: caller must be holding port lock
387 */
388static unsigned __fwtty_port_line_status(struct fwtty_port *port)
389{
390 unsigned status = 0;
391
392 /* TODO: add module param to tie RNG to DTR as well */
393
394 if (port->mctrl & TIOCM_DTR)
395 status |= TIOCM_DSR | TIOCM_CAR;
396 if (port->mctrl & TIOCM_RTS)
397 status |= TIOCM_CTS;
398 if (port->mctrl & OOB_RX_THROTTLE)
399 status |= OOB_TX_THROTTLE;
400 /* emulate BRK as add'l line status */
401 if (port->break_ctl)
402 status |= UART_LSR_BI << 24;
403
404 return status;
405}
406
407/**
408 * __fwtty_write_port_status - send the port line status to peer
409 *
410 * Note: caller must be holding the port lock.
411 */
412static int __fwtty_write_port_status(struct fwtty_port *port)
413{
414 struct fwtty_peer *peer;
415 int err = -ENOENT;
416 unsigned status = __fwtty_port_line_status(port);
417
418 rcu_read_lock();
419 peer = rcu_dereference(port->peer);
420 if (peer) {
421 err = fwtty_send_data_async(peer, TCODE_WRITE_QUADLET_REQUEST,
422 peer->status_addr, &status,
423 sizeof(status), NULL, port);
424 }
425 rcu_read_unlock();
426
427 return err;
428}
429
430/**
431 * fwtty_write_port_status - same as above but locked by port lock
432 */
433static int fwtty_write_port_status(struct fwtty_port *port)
434{
435 int err;
436
437 spin_lock_bh(&port->lock);
438 err = __fwtty_write_port_status(port);
439 spin_unlock_bh(&port->lock);
440 return err;
441}
442
443static void __fwtty_throttle(struct fwtty_port *port, struct tty_struct *tty)
444{
445 unsigned old;
446
447 old = port->mctrl;
448 port->mctrl |= OOB_RX_THROTTLE;
449 if (C_CRTSCTS(tty))
450 port->mctrl &= ~TIOCM_RTS;
451 if (~old & OOB_RX_THROTTLE)
452 __fwtty_write_port_status(port);
453}
454
455/**
456 * fwtty_do_hangup - wait for ldisc to deliver all pending rx; only then hangup
457 *
458 * When the remote has finished tx, and all in-flight rx has been received and
459 * and pushed to the flip buffer, the remote may close its device. This will
460 * drop DTR on the remote which will drop carrier here. Typically, the tty is
461 * hung up when carrier is dropped or lost.
462 *
463 * However, there is a race between the hang up and the line discipline
464 * delivering its data to the reader. A hangup will cause the ldisc to flush
465 * (ie., clear) the read buffer and flip buffer. Because of firewire's
466 * relatively high throughput, the ldisc frequently lags well behind the driver,
467 * resulting in lost data (which has already been received and written to
468 * the flip buffer) when the remote closes its end.
469 *
470 * Unfortunately, since the flip buffer offers no direct method for determining
471 * if it holds data, ensuring the ldisc has delivered all data is problematic.
472 */
473
474/* FIXME: drop this workaround when __tty_hangup waits for ldisc completion */
475static void fwtty_do_hangup(struct work_struct *work)
476{
477 struct fwtty_port *port = to_port(work, hangup);
478 struct tty_struct *tty;
479
480 schedule_timeout_uninterruptible(msecs_to_jiffies(50));
481
482 tty = tty_port_tty_get(&port->port);
483 if (tty)
484 tty_vhangup(tty);
485 tty_kref_put(tty);
486}
487
488
489static void fwtty_emit_breaks(struct work_struct *work)
490{
491 struct fwtty_port *port = to_port(to_delayed_work(work), emit_breaks);
492 struct tty_struct *tty;
493 static const char buf[16];
494 unsigned long now = jiffies;
495 unsigned long elapsed = now - port->break_last;
496 int n, t, c, brk = 0;
497
498 tty = tty_port_tty_get(&port->port);
499 if (!tty)
500 return;
501
502 /* generate breaks at the line rate (but at least 1) */
503 n = (elapsed * port->cps) / HZ + 1;
504 port->break_last = now;
505
506 fwtty_dbg(port, "sending %d brks", n);
507
508 while (n) {
509 t = min(n, 16);
510 c = tty_insert_flip_string_fixed_flag(tty, buf, TTY_BREAK, t);
511 n -= c;
512 brk += c;
513 if (c < t)
514 break;
515 }
516 tty_flip_buffer_push(tty);
517
518 tty_kref_put(tty);
519
520 if (port->mstatus & (UART_LSR_BI << 24))
521 schedule_delayed_work(&port->emit_breaks, FREQ_BREAKS);
522 port->icount.brk += brk;
523}
524
525static void fwtty_pushrx(struct work_struct *work)
526{
527 struct fwtty_port *port = to_port(work, push);
528 struct tty_struct *tty;
529 struct buffered_rx *buf, *next;
530 int n, c = 0;
531
532 tty = tty_port_tty_get(&port->port);
533 if (!tty)
534 return;
535
536 spin_lock_bh(&port->lock);
537 list_for_each_entry_safe(buf, next, &port->buf_list, list) {
538 n = tty_insert_flip_string_fixed_flag(tty, buf->data,
539 TTY_NORMAL, buf->n);
540 c += n;
541 port->buffered -= n;
542 if (n < buf->n) {
543 if (n > 0) {
544 memmove(buf->data, buf->data + n, buf->n - n);
545 buf->n -= n;
546 }
547 __fwtty_throttle(port, tty);
548 break;
549 } else {
550 list_del(&buf->list);
551 kfree(buf);
552 }
553 }
554 if (c > 0)
555 tty_flip_buffer_push(tty);
556
557 if (list_empty(&port->buf_list))
558 clear_bit(BUFFERING_RX, &port->flags);
559 spin_unlock_bh(&port->lock);
560
561 tty_kref_put(tty);
562}
563
564static int fwtty_buffer_rx(struct fwtty_port *port, unsigned char *d, size_t n)
565{
566 struct buffered_rx *buf;
567 size_t size = (n + sizeof(struct buffered_rx) + 0xFF) & ~0xFF;
568
569 if (port->buffered + n > HIGH_WATERMARK)
570 return 0;
571 buf = kmalloc(size, GFP_ATOMIC);
572 if (!buf)
573 return 0;
574 INIT_LIST_HEAD(&buf->list);
575 buf->n = n;
576 memcpy(buf->data, d, n);
577
578 spin_lock_bh(&port->lock);
579 list_add_tail(&buf->list, &port->buf_list);
580 port->buffered += n;
581 if (port->buffered > port->stats.watermark)
582 port->stats.watermark = port->buffered;
583 set_bit(BUFFERING_RX, &port->flags);
584 spin_unlock_bh(&port->lock);
585
586 return n;
587}
588
589static int fwtty_rx(struct fwtty_port *port, unsigned char *data, size_t len)
590{
591 struct tty_struct *tty;
592 int c, n = len;
593 unsigned lsr;
594 int err = 0;
595
596 tty = tty_port_tty_get(&port->port);
597 if (!tty)
598 return -ENOENT;
599
600 fwtty_dbg(port, "%d", n);
601 profile_size_distrib(port->stats.reads, n);
602
603 if (port->write_only) {
604 n = 0;
605 goto out;
606 }
607
608 /* disregard break status; breaks are generated by emit_breaks work */
609 lsr = (port->mstatus >> 24) & ~UART_LSR_BI;
610
611 if (port->overrun)
612 lsr |= UART_LSR_OE;
613
614 if (lsr & UART_LSR_OE)
615 ++port->icount.overrun;
616
617 lsr &= port->status_mask;
618 if (lsr & ~port->ignore_mask & UART_LSR_OE) {
619 if (!tty_insert_flip_char(tty, 0, TTY_OVERRUN)) {
620 err = -EIO;
621 goto out;
622 }
623 }
624 port->overrun = false;
625
626 if (lsr & port->ignore_mask & ~UART_LSR_OE) {
627 /* TODO: don't drop SAK and Magic SysRq here */
628 n = 0;
629 goto out;
630 }
631
632 if (!test_bit(BUFFERING_RX, &port->flags)) {
633 c = tty_insert_flip_string_fixed_flag(tty, data, TTY_NORMAL, n);
634 if (c > 0)
635 tty_flip_buffer_push(tty);
636 n -= c;
637
638 if (n) {
639 /* start buffering and throttling */
640 n -= fwtty_buffer_rx(port, &data[c], n);
641
642 spin_lock_bh(&port->lock);
643 __fwtty_throttle(port, tty);
644 spin_unlock_bh(&port->lock);
645 }
646 } else
647 n -= fwtty_buffer_rx(port, data, n);
648
649 if (n) {
650 port->overrun = true;
651 err = -EIO;
652 }
653
654out:
655 tty_kref_put(tty);
656
657 port->icount.rx += len;
658 port->stats.lost += n;
659 return err;
660}
661
662/**
663 * fwtty_port_handler - bus address handler for port reads/writes
664 * @parameters: fw_address_callback_t as specified by firewire core interface
665 *
666 * This handler is responsible for handling inbound read/write dma from remotes.
667 */
668static void fwtty_port_handler(struct fw_card *card,
669 struct fw_request *request,
670 int tcode, int destination, int source,
671 int generation,
672 unsigned long long addr,
673 void *data, size_t len,
674 void *callback_data)
675{
676 struct fwtty_port *port = callback_data;
677 struct fwtty_peer *peer;
678 int err;
679 int rcode;
680
681 /* Only accept rx from the peer virtual-cabled to this port */
682 rcu_read_lock();
683 peer = __fwserial_peer_by_node_id(card, generation, source);
684 rcu_read_unlock();
685 if (!peer || peer != rcu_access_pointer(port->peer)) {
686 rcode = RCODE_ADDRESS_ERROR;
687 fwtty_err_ratelimited(port, "ignoring unauthenticated data");
688 goto respond;
689 }
690
691 switch (tcode) {
692 case TCODE_WRITE_QUADLET_REQUEST:
693 if (addr != port->rx_handler.offset || len != 4)
694 rcode = RCODE_ADDRESS_ERROR;
695 else {
696 fwtty_update_port_status(port, *(unsigned *)data);
697 rcode = RCODE_COMPLETE;
698 }
699 break;
700
701 case TCODE_WRITE_BLOCK_REQUEST:
702 if (addr != port->rx_handler.offset + 4 ||
703 len > port->rx_handler.length - 4) {
704 rcode = RCODE_ADDRESS_ERROR;
705 } else {
706 err = fwtty_rx(port, data, len);
707 switch (err) {
708 case 0:
709 rcode = RCODE_COMPLETE;
710 break;
711 case -EIO:
712 rcode = RCODE_DATA_ERROR;
713 break;
714 default:
715 rcode = RCODE_CONFLICT_ERROR;
716 break;
717 }
718 }
719 break;
720
721 default:
722 rcode = RCODE_TYPE_ERROR;
723 }
724
725respond:
726 fw_send_response(card, request, rcode);
727}
728
729/**
730 * fwtty_tx_complete - callback for tx dma
731 * @data: ignored, has no meaning for write txns
732 * @length: ignored, has no meaning for write txns
733 *
734 * The writer must be woken here if the fifo has been emptied because it
735 * may have slept if chars_in_buffer was != 0
736 */
737static void fwtty_tx_complete(struct fw_card *card, int rcode,
738 void *data, size_t length,
739 struct fwtty_transaction *txn)
740{
741 struct fwtty_port *port = txn->port;
742 struct tty_struct *tty;
743 int len;
744
745 fwtty_dbg(port, "rcode: %d", rcode);
746
747 switch (rcode) {
748 case RCODE_COMPLETE:
749 spin_lock_bh(&port->lock);
750 dma_fifo_out_complete(&port->tx_fifo, &txn->dma_pended);
751 len = dma_fifo_level(&port->tx_fifo);
752 spin_unlock_bh(&port->lock);
753
754 port->icount.tx += txn->dma_pended.len;
755 break;
756
757 default:
758 /* TODO: implement retries */
759 spin_lock_bh(&port->lock);
760 dma_fifo_out_complete(&port->tx_fifo, &txn->dma_pended);
761 len = dma_fifo_level(&port->tx_fifo);
762 spin_unlock_bh(&port->lock);
763
764 port->stats.dropped += txn->dma_pended.len;
765 }
766
767 if (len < WAKEUP_CHARS) {
768 tty = tty_port_tty_get(&port->port);
769 if (tty) {
770 tty_wakeup(tty);
771 tty_kref_put(tty);
772 }
773 }
774}
775
776static int fwtty_tx(struct fwtty_port *port, bool drain)
777{
778 struct fwtty_peer *peer;
779 struct fwtty_transaction *txn;
780 struct tty_struct *tty;
781 int n, len;
782
783 tty = tty_port_tty_get(&port->port);
784 if (!tty)
785 return -ENOENT;
786
787 rcu_read_lock();
788 peer = rcu_dereference(port->peer);
789 if (!peer) {
790 n = -EIO;
791 goto out;
792 }
793
794 if (test_and_set_bit(IN_TX, &port->flags)) {
795 n = -EALREADY;
796 goto out;
797 }
798
799 /* try to write as many dma transactions out as possible */
800 n = -EAGAIN;
801 while (!tty->stopped && !tty->hw_stopped &&
802 !test_bit(STOP_TX, &port->flags)) {
803 txn = kmem_cache_alloc(fwtty_txn_cache, GFP_ATOMIC);
804 if (!txn) {
805 n = -ENOMEM;
806 break;
807 }
808
809 spin_lock_bh(&port->lock);
810 n = dma_fifo_out_pend(&port->tx_fifo, &txn->dma_pended);
811 spin_unlock_bh(&port->lock);
812
813 fwtty_dbg(port, "out: %u rem: %d", txn->dma_pended.len, n);
814
815 if (n < 0) {
816 kmem_cache_free(fwtty_txn_cache, txn);
817 if (n == -EAGAIN)
818 ++port->stats.tx_stall;
819 else if (n == -ENODATA)
820 profile_size_distrib(port->stats.txns, 0);
821 else {
822 ++port->stats.fifo_errs;
823 fwtty_err_ratelimited(port, "fifo err: %d", n);
824 }
825 break;
826 }
827
828 profile_size_distrib(port->stats.txns, txn->dma_pended.len);
829
830 fwtty_send_txn_async(peer, txn, TCODE_WRITE_BLOCK_REQUEST,
831 peer->fifo_addr, txn->dma_pended.data,
832 txn->dma_pended.len, fwtty_tx_complete,
833 port);
834 ++port->stats.sent;
835
836 /*
837 * Stop tx if the 'last view' of the fifo is empty or if
838 * this is the writer and there's not enough data to bother
839 */
840 if (n == 0 || (!drain && n < WRITER_MINIMUM))
841 break;
842 }
843
844 if (n >= 0 || n == -EAGAIN || n == -ENOMEM || n == -ENODATA) {
845 spin_lock_bh(&port->lock);
846 len = dma_fifo_out_level(&port->tx_fifo);
847 if (len) {
848 unsigned long delay = (n == -ENOMEM) ? HZ : 1;
849 schedule_delayed_work(&port->drain, delay);
850 }
851 len = dma_fifo_level(&port->tx_fifo);
852 spin_unlock_bh(&port->lock);
853
854 /* wakeup the writer */
855 if (drain && len < WAKEUP_CHARS)
856 tty_wakeup(tty);
857 }
858
859 clear_bit(IN_TX, &port->flags);
860 wake_up_interruptible(&port->wait_tx);
861
862out:
863 rcu_read_unlock();
864 tty_kref_put(tty);
865 return n;
866}
867
868static void fwtty_drain_tx(struct work_struct *work)
869{
870 struct fwtty_port *port = to_port(to_delayed_work(work), drain);
871
872 fwtty_tx(port, true);
873}
874
875static void fwtty_write_xchar(struct fwtty_port *port, char ch)
876{
877 struct fwtty_peer *peer;
878
879 ++port->stats.xchars;
880
881 fwtty_dbg(port, "%02x", ch);
882
883 rcu_read_lock();
884 peer = rcu_dereference(port->peer);
885 if (peer) {
886 fwtty_send_data_async(peer, TCODE_WRITE_BLOCK_REQUEST,
887 peer->fifo_addr, &ch, sizeof(ch),
888 NULL, port);
889 }
890 rcu_read_unlock();
891}
892
893struct fwtty_port *fwtty_port_get(unsigned index)
894{
895 struct fwtty_port *port;
896
897 if (index >= MAX_TOTAL_PORTS)
898 return NULL;
899
900 mutex_lock(&port_table_lock);
901 port = port_table[index];
902 if (port)
903 kref_get(&port->serial->kref);
904 mutex_unlock(&port_table_lock);
905 return port;
906}
907EXPORT_SYMBOL(fwtty_port_get);
908
909static int fwtty_ports_add(struct fw_serial *serial)
910{
911 int err = -EBUSY;
912 int i, j;
913
914 if (port_table_corrupt)
915 return err;
916
917 mutex_lock(&port_table_lock);
918 for (i = 0; i + num_ports <= MAX_TOTAL_PORTS; i += num_ports) {
919 if (!port_table[i]) {
920 for (j = 0; j < num_ports; ++i, ++j) {
921 serial->ports[j]->index = i;
922 port_table[i] = serial->ports[j];
923 }
924 err = 0;
925 break;
926 }
927 }
928 mutex_unlock(&port_table_lock);
929 return err;
930}
931
932static void fwserial_destroy(struct kref *kref)
933{
934 struct fw_serial *serial = to_serial(kref, kref);
935 struct fwtty_port **ports = serial->ports;
936 int j, i = ports[0]->index;
937
938 synchronize_rcu();
939
940 mutex_lock(&port_table_lock);
941 for (j = 0; j < num_ports; ++i, ++j) {
942 static bool once;
943 int corrupt = port_table[i] != ports[j];
944 if (corrupt && !once) {
945 WARN(corrupt, "port_table[%d]: %p != ports[%d]: %p",
946 i, port_table[i], j, ports[j]);
947 once = true;
948 port_table_corrupt = true;
949 }
950
951 port_table[i] = NULL;
952 }
953 mutex_unlock(&port_table_lock);
954
955 for (j = 0; j < num_ports; ++j) {
956 fw_core_remove_address_handler(&ports[j]->rx_handler);
957 dma_fifo_free(&ports[j]->tx_fifo);
958 kfree(ports[j]);
959 }
960 kfree(serial);
961}
962
963void fwtty_port_put(struct fwtty_port *port)
964{
965 kref_put(&port->serial->kref, fwserial_destroy);
966}
967EXPORT_SYMBOL(fwtty_port_put);
968
969static void fwtty_port_dtr_rts(struct tty_port *tty_port, int on)
970{
971 struct fwtty_port *port = to_port(tty_port, port);
972
973 fwtty_dbg(port, "on/off: %d", on);
974
975 spin_lock_bh(&port->lock);
976 /* Don't change carrier state if this is a console */
977 if (!port->port.console) {
978 if (on)
979 port->mctrl |= TIOCM_DTR | TIOCM_RTS;
980 else
981 port->mctrl &= ~(TIOCM_DTR | TIOCM_RTS);
982 }
983
984 __fwtty_write_port_status(port);
985 spin_unlock_bh(&port->lock);
986}
987
988/**
989 * fwtty_port_carrier_raised: required tty_port operation
990 *
991 * This port operation is polled after a tty has been opened and is waiting for
992 * carrier detect -- see drivers/tty/tty_port:tty_port_block_til_ready().
993 */
994static int fwtty_port_carrier_raised(struct tty_port *tty_port)
995{
996 struct fwtty_port *port = to_port(tty_port, port);
997 int rc;
998
999 rc = (port->mstatus & TIOCM_CAR);
1000
1001 fwtty_dbg(port, "%d", rc);
1002
1003 return rc;
1004}
1005
1006static unsigned set_termios(struct fwtty_port *port, struct tty_struct *tty)
1007{
1008 unsigned baud, frame;
1009
1010 baud = tty_termios_baud_rate(&tty->termios);
1011 tty_termios_encode_baud_rate(&tty->termios, baud, baud);
1012
1013 /* compute bit count of 2 frames */
1014 frame = 12 + ((C_CSTOPB(tty)) ? 4 : 2) + ((C_PARENB(tty)) ? 2 : 0);
1015
1016 switch (C_CSIZE(tty)) {
1017 case CS5:
1018 frame -= (C_CSTOPB(tty)) ? 1 : 0;
1019 break;
1020 case CS6:
1021 frame += 2;
1022 break;
1023 case CS7:
1024 frame += 4;
1025 break;
1026 case CS8:
1027 frame += 6;
1028 break;
1029 }
1030
1031 port->cps = (baud << 1) / frame;
1032
1033 port->status_mask = UART_LSR_OE;
1034 if (_I_FLAG(tty, BRKINT | PARMRK))
1035 port->status_mask |= UART_LSR_BI;
1036
1037 port->ignore_mask = 0;
1038 if (I_IGNBRK(tty)) {
1039 port->ignore_mask |= UART_LSR_BI;
1040 if (I_IGNPAR(tty))
1041 port->ignore_mask |= UART_LSR_OE;
1042 }
1043
1044 port->write_only = !C_CREAD(tty);
1045
1046 /* turn off echo and newline xlat if loopback */
1047 if (port->loopback) {
1048 tty->termios.c_lflag &= ~(ECHO | ECHOE | ECHOK | ECHOKE |
1049 ECHONL | ECHOPRT | ECHOCTL);
1050 tty->termios.c_oflag &= ~ONLCR;
1051 }
1052
1053 return baud;
1054}
1055
1056static int fwtty_port_activate(struct tty_port *tty_port,
1057 struct tty_struct *tty)
1058{
1059 struct fwtty_port *port = to_port(tty_port, port);
1060 unsigned baud;
1061 int err;
1062
1063 set_bit(TTY_IO_ERROR, &tty->flags);
1064
1065 err = dma_fifo_alloc(&port->tx_fifo, FWTTY_PORT_TXFIFO_LEN,
1066 cache_line_size(),
1067 port->max_payload,
1068 FWTTY_PORT_MAX_PEND_DMA,
1069 GFP_KERNEL);
1070 if (err)
1071 return err;
1072
1073 spin_lock_bh(&port->lock);
1074
1075 baud = set_termios(port, tty);
1076
1077 /* if console, don't change carrier state */
1078 if (!port->port.console) {
1079 port->mctrl = 0;
1080 if (baud != 0)
1081 port->mctrl = TIOCM_DTR | TIOCM_RTS;
1082 }
1083
1084 if (C_CRTSCTS(tty) && ~port->mstatus & TIOCM_CTS)
1085 tty->hw_stopped = 1;
1086
1087 __fwtty_write_port_status(port);
1088 spin_unlock_bh(&port->lock);
1089
1090 clear_bit(TTY_IO_ERROR, &tty->flags);
1091
1092 return 0;
1093}
1094
1095/**
1096 * fwtty_port_shutdown
1097 *
1098 * Note: the tty port core ensures this is not the console and
1099 * manages TTY_IO_ERROR properly
1100 */
1101static void fwtty_port_shutdown(struct tty_port *tty_port)
1102{
1103 struct fwtty_port *port = to_port(tty_port, port);
1104 struct buffered_rx *buf, *next;
1105
1106 /* TODO: cancel outstanding transactions */
1107
1108 cancel_delayed_work_sync(&port->emit_breaks);
1109 cancel_delayed_work_sync(&port->drain);
1110 cancel_work_sync(&port->push);
1111
1112 spin_lock_bh(&port->lock);
1113 list_for_each_entry_safe(buf, next, &port->buf_list, list) {
1114 list_del(&buf->list);
1115 kfree(buf);
1116 }
1117 port->buffered = 0;
1118 port->flags = 0;
1119 port->break_ctl = 0;
1120 port->overrun = 0;
1121 __fwtty_write_port_status(port);
1122 dma_fifo_free(&port->tx_fifo);
1123 spin_unlock_bh(&port->lock);
1124}
1125
1126static int fwtty_open(struct tty_struct *tty, struct file *fp)
1127{
1128 struct fwtty_port *port = tty->driver_data;
1129
1130 return tty_port_open(&port->port, tty, fp);
1131}
1132
1133static void fwtty_close(struct tty_struct *tty, struct file *fp)
1134{
1135 struct fwtty_port *port = tty->driver_data;
1136
1137 tty_port_close(&port->port, tty, fp);
1138}
1139
1140static void fwtty_hangup(struct tty_struct *tty)
1141{
1142 struct fwtty_port *port = tty->driver_data;
1143
1144 tty_port_hangup(&port->port);
1145}
1146
1147static void fwtty_cleanup(struct tty_struct *tty)
1148{
1149 struct fwtty_port *port = tty->driver_data;
1150
1151 tty->driver_data = NULL;
1152 fwtty_port_put(port);
1153}
1154
1155static int fwtty_install(struct tty_driver *driver, struct tty_struct *tty)
1156{
1157 struct fwtty_port *port = fwtty_port_get(tty->index);
1158 int err;
1159
1160 err = tty_standard_install(driver, tty);
1161 if (!err)
1162 tty->driver_data = port;
1163 else
1164 fwtty_port_put(port);
1165 return err;
1166}
1167
1168static int fwtty_write(struct tty_struct *tty, const unsigned char *buf, int c)
1169{
1170 struct fwtty_port *port = tty->driver_data;
1171 int n, len;
1172
1173 fwtty_dbg(port, "%d", c);
1174 profile_size_distrib(port->stats.writes, c);
1175
1176 spin_lock_bh(&port->lock);
1177 n = dma_fifo_in(&port->tx_fifo, buf, c);
1178 len = dma_fifo_out_level(&port->tx_fifo);
1179 if (len < DRAIN_THRESHOLD)
1180 schedule_delayed_work(&port->drain, 1);
1181 spin_unlock_bh(&port->lock);
1182
1183 if (len >= DRAIN_THRESHOLD)
1184 fwtty_tx(port, false);
1185
1186 debug_short_write(port, c, n);
1187
1188 return (n < 0) ? 0 : n;
1189}
1190
1191static int fwtty_write_room(struct tty_struct *tty)
1192{
1193 struct fwtty_port *port = tty->driver_data;
1194 int n;
1195
1196 spin_lock_bh(&port->lock);
1197 n = dma_fifo_avail(&port->tx_fifo);
1198 spin_unlock_bh(&port->lock);
1199
1200 fwtty_dbg(port, "%d", n);
1201
1202 return n;
1203}
1204
1205static int fwtty_chars_in_buffer(struct tty_struct *tty)
1206{
1207 struct fwtty_port *port = tty->driver_data;
1208 int n;
1209
1210 spin_lock_bh(&port->lock);
1211 n = dma_fifo_level(&port->tx_fifo);
1212 spin_unlock_bh(&port->lock);
1213
1214 fwtty_dbg(port, "%d", n);
1215
1216 return n;
1217}
1218
1219static void fwtty_send_xchar(struct tty_struct *tty, char ch)
1220{
1221 struct fwtty_port *port = tty->driver_data;
1222
1223 fwtty_dbg(port, "%02x", ch);
1224
1225 fwtty_write_xchar(port, ch);
1226}
1227
1228static void fwtty_throttle(struct tty_struct *tty)
1229{
1230 struct fwtty_port *port = tty->driver_data;
1231
1232 /*
1233 * Ignore throttling (but not unthrottling).
1234 * It only makes sense to throttle when data will no longer be
1235 * accepted by the tty flip buffer. For example, it is
1236 * possible for received data to overflow the tty buffer long
1237 * before the line discipline ever has a chance to throttle the driver.
1238 * Additionally, the driver may have already completed the I/O
1239 * but the tty buffer is still emptying, so the line discipline is
1240 * throttling and unthrottling nothing.
1241 */
1242
1243 ++port->stats.throttled;
1244}
1245
1246static void fwtty_unthrottle(struct tty_struct *tty)
1247{
1248 struct fwtty_port *port = tty->driver_data;
1249
1250 fwtty_dbg(port, "CRTSCTS: %d", (C_CRTSCTS(tty) != 0));
1251
1252 profile_fifo_avail(port, port->stats.unthrottle);
1253
1254 schedule_work(&port->push);
1255
1256 spin_lock_bh(&port->lock);
1257 port->mctrl &= ~OOB_RX_THROTTLE;
1258 if (C_CRTSCTS(tty))
1259 port->mctrl |= TIOCM_RTS;
1260 __fwtty_write_port_status(port);
1261 spin_unlock_bh(&port->lock);
1262}
1263
1264static int check_msr_delta(struct fwtty_port *port, unsigned long mask,
1265 struct async_icount *prev)
1266{
1267 struct async_icount now;
1268 int delta;
1269
1270 now = port->icount;
1271
1272 delta = ((mask & TIOCM_RNG && prev->rng != now.rng) ||
1273 (mask & TIOCM_DSR && prev->dsr != now.dsr) ||
1274 (mask & TIOCM_CAR && prev->dcd != now.dcd) ||
1275 (mask & TIOCM_CTS && prev->cts != now.cts));
1276
1277 *prev = now;
1278
1279 return delta;
1280}
1281
1282static int wait_msr_change(struct fwtty_port *port, unsigned long mask)
1283{
1284 struct async_icount prev;
1285
1286 prev = port->icount;
1287
1288 return wait_event_interruptible(port->port.delta_msr_wait,
1289 check_msr_delta(port, mask, &prev));
1290}
1291
1292static int get_serial_info(struct fwtty_port *port,
1293 struct serial_struct __user *info)
1294{
1295 struct serial_struct tmp;
1296
1297 memset(&tmp, 0, sizeof(tmp));
1298
1299 tmp.type = PORT_UNKNOWN;
1300 tmp.line = port->port.tty->index;
1301 tmp.flags = port->port.flags;
1302 tmp.xmit_fifo_size = FWTTY_PORT_TXFIFO_LEN;
1303 tmp.baud_base = 400000000;
1304 tmp.close_delay = port->port.close_delay;
1305
1306 return (copy_to_user(info, &tmp, sizeof(*info))) ? -EFAULT : 0;
1307}
1308
1309static int set_serial_info(struct fwtty_port *port,
1310 struct serial_struct __user *info)
1311{
1312 struct serial_struct tmp;
1313
1314 if (copy_from_user(&tmp, info, sizeof(tmp)))
1315 return -EFAULT;
1316
1317 if (tmp.irq != 0 || tmp.port != 0 || tmp.custom_divisor != 0 ||
1318 tmp.baud_base != 400000000)
1319 return -EPERM;
1320
1321 if (!capable(CAP_SYS_ADMIN)) {
1322 if (((tmp.flags & ~ASYNC_USR_MASK) !=
1323 (port->port.flags & ~ASYNC_USR_MASK)))
1324 return -EPERM;
1325 } else
1326 port->port.close_delay = tmp.close_delay * HZ / 100;
1327
1328 return 0;
1329}
1330
1331static int fwtty_ioctl(struct tty_struct *tty, unsigned cmd,
1332 unsigned long arg)
1333{
1334 struct fwtty_port *port = tty->driver_data;
1335 int err;
1336
1337 switch (cmd) {
1338 case TIOCGSERIAL:
1339 mutex_lock(&port->port.mutex);
1340 err = get_serial_info(port, (void __user *)arg);
1341 mutex_unlock(&port->port.mutex);
1342 break;
1343
1344 case TIOCSSERIAL:
1345 mutex_lock(&port->port.mutex);
1346 err = set_serial_info(port, (void __user *)arg);
1347 mutex_unlock(&port->port.mutex);
1348 break;
1349
1350 case TIOCMIWAIT:
1351 err = wait_msr_change(port, arg);
1352 break;
1353
1354 default:
1355 err = -ENOIOCTLCMD;
1356 }
1357
1358 return err;
1359}
1360
1361static void fwtty_set_termios(struct tty_struct *tty, struct ktermios *old)
1362{
1363 struct fwtty_port *port = tty->driver_data;
1364 unsigned baud;
1365
1366 spin_lock_bh(&port->lock);
1367 baud = set_termios(port, tty);
1368
1369 if ((baud == 0) && (old->c_cflag & CBAUD))
1370 port->mctrl &= ~(TIOCM_DTR | TIOCM_RTS);
1371 else if ((baud != 0) && !(old->c_cflag & CBAUD)) {
1372 if (C_CRTSCTS(tty) || !test_bit(TTY_THROTTLED, &tty->flags))
1373 port->mctrl |= TIOCM_DTR | TIOCM_RTS;
1374 else
1375 port->mctrl |= TIOCM_DTR;
1376 }
1377 __fwtty_write_port_status(port);
1378 spin_unlock_bh(&port->lock);
1379
1380 if (old->c_cflag & CRTSCTS) {
1381 if (!C_CRTSCTS(tty)) {
1382 tty->hw_stopped = 0;
1383 fwtty_restart_tx(port);
1384 }
1385 } else if (C_CRTSCTS(tty) && ~port->mstatus & TIOCM_CTS) {
1386 tty->hw_stopped = 1;
1387 }
1388}
1389
1390/**
1391 * fwtty_break_ctl - start/stop sending breaks
1392 *
1393 * Signals the remote to start or stop generating simulated breaks.
1394 * First, stop dequeueing from the fifo and wait for writer/drain to leave tx
1395 * before signalling the break line status. This guarantees any pending rx will
1396 * be queued to the line discipline before break is simulated on the remote.
1397 * Conversely, turning off break_ctl requires signalling the line status change,
1398 * then enabling tx.
1399 */
1400static int fwtty_break_ctl(struct tty_struct *tty, int state)
1401{
1402 struct fwtty_port *port = tty->driver_data;
1403 long ret;
1404
1405 fwtty_dbg(port, "%d", state);
1406
1407 if (state == -1) {
1408 set_bit(STOP_TX, &port->flags);
1409 ret = wait_event_interruptible_timeout(port->wait_tx,
1410 !test_bit(IN_TX, &port->flags),
1411 10);
1412 if (ret == 0 || ret == -ERESTARTSYS) {
1413 clear_bit(STOP_TX, &port->flags);
1414 fwtty_restart_tx(port);
1415 return -EINTR;
1416 }
1417 }
1418
1419 spin_lock_bh(&port->lock);
1420 port->break_ctl = (state == -1);
1421 __fwtty_write_port_status(port);
1422 spin_unlock_bh(&port->lock);
1423
1424 if (state == 0) {
1425 spin_lock_bh(&port->lock);
1426 dma_fifo_reset(&port->tx_fifo);
1427 clear_bit(STOP_TX, &port->flags);
1428 spin_unlock_bh(&port->lock);
1429 }
1430 return 0;
1431}
1432
1433static int fwtty_tiocmget(struct tty_struct *tty)
1434{
1435 struct fwtty_port *port = tty->driver_data;
1436 unsigned tiocm;
1437
1438 spin_lock_bh(&port->lock);
1439 tiocm = (port->mctrl & MCTRL_MASK) | (port->mstatus & ~MCTRL_MASK);
1440 spin_unlock_bh(&port->lock);
1441
1442 fwtty_dbg(port, "%x", tiocm);
1443
1444 return tiocm;
1445}
1446
1447static int fwtty_tiocmset(struct tty_struct *tty, unsigned set, unsigned clear)
1448{
1449 struct fwtty_port *port = tty->driver_data;
1450
1451 fwtty_dbg(port, "set: %x clear: %x", set, clear);
1452
1453 /* TODO: simulate loopback if TIOCM_LOOP set */
1454
1455 spin_lock_bh(&port->lock);
1456 port->mctrl &= ~(clear & MCTRL_MASK & 0xffff);
1457 port->mctrl |= set & MCTRL_MASK & 0xffff;
1458 __fwtty_write_port_status(port);
1459 spin_unlock_bh(&port->lock);
1460 return 0;
1461}
1462
1463static int fwtty_get_icount(struct tty_struct *tty,
1464 struct serial_icounter_struct *icount)
1465{
1466 struct fwtty_port *port = tty->driver_data;
1467 struct stats stats;
1468
1469 memcpy(&stats, &port->stats, sizeof(stats));
1470 if (port->port.console)
1471 (*port->fwcon_ops->stats)(&stats, port->con_data);
1472
1473 icount->cts = port->icount.cts;
1474 icount->dsr = port->icount.dsr;
1475 icount->rng = port->icount.rng;
1476 icount->dcd = port->icount.dcd;
1477 icount->rx = port->icount.rx;
1478 icount->tx = port->icount.tx + stats.xchars;
1479 icount->frame = port->icount.frame;
1480 icount->overrun = port->icount.overrun;
1481 icount->parity = port->icount.parity;
1482 icount->brk = port->icount.brk;
1483 icount->buf_overrun = port->icount.overrun;
1484 return 0;
1485}
1486
1487static void fwtty_proc_show_port(struct seq_file *m, struct fwtty_port *port)
1488{
1489 struct stats stats;
1490
1491 memcpy(&stats, &port->stats, sizeof(stats));
1492 if (port->port.console)
1493 (*port->fwcon_ops->stats)(&stats, port->con_data);
1494
1495 seq_printf(m, " tx:%d rx:%d", port->icount.tx + stats.xchars,
1496 port->icount.rx);
1497 seq_printf(m, " cts:%d dsr:%d rng:%d dcd:%d", port->icount.cts,
1498 port->icount.dsr, port->icount.rng, port->icount.dcd);
1499 seq_printf(m, " fe:%d oe:%d pe:%d brk:%d", port->icount.frame,
1500 port->icount.overrun, port->icount.parity, port->icount.brk);
1501 seq_printf(m, " dr:%d st:%d err:%d lost:%d", stats.dropped,
1502 stats.tx_stall, stats.fifo_errs, stats.lost);
1503 seq_printf(m, " pkts:%d thr:%d wtrmk:%d", stats.sent, stats.throttled,
1504 stats.watermark);
1505 seq_printf(m, " addr:%012llx", port->rx_handler.offset);
1506
1507 if (port->port.console) {
1508 seq_printf(m, "\n ");
1509 (*port->fwcon_ops->proc_show)(m, port->con_data);
1510 }
1511
1512 dump_profile(m, &port->stats);
1513}
1514
1515static void fwtty_proc_show_peer(struct seq_file *m, struct fwtty_peer *peer)
1516{
1517 int generation = peer->generation;
1518
1519 smp_rmb();
1520 seq_printf(m, " %s:", dev_name(&peer->unit->device));
1521 seq_printf(m, " node:%04x gen:%d", peer->node_id, generation);
1522 seq_printf(m, " sp:%d max:%d guid:%016llx", peer->speed,
1523 peer->max_payload, (unsigned long long) peer->guid);
1524
1525 if (capable(CAP_SYS_ADMIN)) {
1526 seq_printf(m, " mgmt:%012llx",
1527 (unsigned long long) peer->mgmt_addr);
1528 seq_printf(m, " addr:%012llx",
1529 (unsigned long long) peer->status_addr);
1530 }
1531 seq_putc(m, '\n');
1532}
1533
1534static int fwtty_proc_show(struct seq_file *m, void *v)
1535{
1536 struct fwtty_port *port;
1537 struct fw_serial *serial;
1538 struct fwtty_peer *peer;
1539 int i;
1540
1541 seq_puts(m, "fwserinfo: 1.0 driver: 1.0\n");
1542 for (i = 0; i < MAX_TOTAL_PORTS && (port = fwtty_port_get(i)); ++i) {
1543 seq_printf(m, "%2d:", i);
1544 if (capable(CAP_SYS_ADMIN))
1545 fwtty_proc_show_port(m, port);
1546 fwtty_port_put(port);
1547 seq_printf(m, "\n");
1548 }
1549 seq_putc(m, '\n');
1550
1551 rcu_read_lock();
1552 list_for_each_entry_rcu(serial, &fwserial_list, list) {
1553 seq_printf(m, "card: %s guid: %016llx\n",
1554 dev_name(serial->card->device),
1555 (unsigned long long) serial->card->guid);
1556 list_for_each_entry_rcu(peer, &serial->peer_list, list)
1557 fwtty_proc_show_peer(m, peer);
1558 }
1559 rcu_read_unlock();
1560 return 0;
1561}
1562
1563static int fwtty_proc_open(struct inode *inode, struct file *fp)
1564{
1565 return single_open(fp, fwtty_proc_show, NULL);
1566}
1567
1568static const struct file_operations fwtty_proc_fops = {
1569 .owner = THIS_MODULE,
1570 .open = fwtty_proc_open,
1571 .read = seq_read,
1572 .llseek = seq_lseek,
1573 .release = single_release,
1574};
1575
1576static const struct tty_port_operations fwtty_port_ops = {
1577 .dtr_rts = fwtty_port_dtr_rts,
1578 .carrier_raised = fwtty_port_carrier_raised,
1579 .shutdown = fwtty_port_shutdown,
1580 .activate = fwtty_port_activate,
1581};
1582
1583static const struct tty_operations fwtty_ops = {
1584 .open = fwtty_open,
1585 .close = fwtty_close,
1586 .hangup = fwtty_hangup,
1587 .cleanup = fwtty_cleanup,
1588 .install = fwtty_install,
1589 .write = fwtty_write,
1590 .write_room = fwtty_write_room,
1591 .chars_in_buffer = fwtty_chars_in_buffer,
1592 .send_xchar = fwtty_send_xchar,
1593 .throttle = fwtty_throttle,
1594 .unthrottle = fwtty_unthrottle,
1595 .ioctl = fwtty_ioctl,
1596 .set_termios = fwtty_set_termios,
1597 .break_ctl = fwtty_break_ctl,
1598 .tiocmget = fwtty_tiocmget,
1599 .tiocmset = fwtty_tiocmset,
1600 .get_icount = fwtty_get_icount,
1601 .proc_fops = &fwtty_proc_fops,
1602};
1603
1604static inline int mgmt_pkt_expected_len(__be16 code)
1605{
1606 static const struct fwserial_mgmt_pkt pkt;
1607
1608 switch (be16_to_cpu(code)) {
1609 case FWSC_VIRT_CABLE_PLUG:
1610 return sizeof(pkt.hdr) + sizeof(pkt.plug_req);
1611
1612 case FWSC_VIRT_CABLE_PLUG_RSP: /* | FWSC_RSP_OK */
1613 return sizeof(pkt.hdr) + sizeof(pkt.plug_rsp);
1614
1615
1616 case FWSC_VIRT_CABLE_UNPLUG:
1617 case FWSC_VIRT_CABLE_UNPLUG_RSP:
1618 case FWSC_VIRT_CABLE_PLUG_RSP | FWSC_RSP_NACK:
1619 case FWSC_VIRT_CABLE_UNPLUG_RSP | FWSC_RSP_NACK:
1620 return sizeof(pkt.hdr);
1621
1622 default:
1623 return -1;
1624 }
1625}
1626
1627static inline void fill_plug_params(struct virt_plug_params *params,
1628 struct fwtty_port *port)
1629{
1630 u64 status_addr = port->rx_handler.offset;
1631 u64 fifo_addr = port->rx_handler.offset + 4;
1632 size_t fifo_len = port->rx_handler.length - 4;
1633
1634 params->status_hi = cpu_to_be32(status_addr >> 32);
1635 params->status_lo = cpu_to_be32(status_addr);
1636 params->fifo_hi = cpu_to_be32(fifo_addr >> 32);
1637 params->fifo_lo = cpu_to_be32(fifo_addr);
1638 params->fifo_len = cpu_to_be32(fifo_len);
1639}
1640
1641static inline void fill_plug_req(struct fwserial_mgmt_pkt *pkt,
1642 struct fwtty_port *port)
1643{
1644 pkt->hdr.code = cpu_to_be16(FWSC_VIRT_CABLE_PLUG);
1645 pkt->hdr.len = cpu_to_be16(mgmt_pkt_expected_len(pkt->hdr.code));
1646 fill_plug_params(&pkt->plug_req, port);
1647}
1648
1649static inline void fill_plug_rsp_ok(struct fwserial_mgmt_pkt *pkt,
1650 struct fwtty_port *port)
1651{
1652 pkt->hdr.code = cpu_to_be16(FWSC_VIRT_CABLE_PLUG_RSP);
1653 pkt->hdr.len = cpu_to_be16(mgmt_pkt_expected_len(pkt->hdr.code));
1654 fill_plug_params(&pkt->plug_rsp, port);
1655}
1656
1657static inline void fill_plug_rsp_nack(struct fwserial_mgmt_pkt *pkt)
1658{
1659 pkt->hdr.code = cpu_to_be16(FWSC_VIRT_CABLE_PLUG_RSP | FWSC_RSP_NACK);
1660 pkt->hdr.len = cpu_to_be16(mgmt_pkt_expected_len(pkt->hdr.code));
1661}
1662
1663static inline void fill_unplug_req(struct fwserial_mgmt_pkt *pkt)
1664{
1665 pkt->hdr.code = cpu_to_be16(FWSC_VIRT_CABLE_UNPLUG);
1666 pkt->hdr.len = cpu_to_be16(mgmt_pkt_expected_len(pkt->hdr.code));
1667}
1668
1669static inline void fill_unplug_rsp_nack(struct fwserial_mgmt_pkt *pkt)
1670{
1671 pkt->hdr.code = cpu_to_be16(FWSC_VIRT_CABLE_UNPLUG_RSP | FWSC_RSP_NACK);
1672 pkt->hdr.len = cpu_to_be16(mgmt_pkt_expected_len(pkt->hdr.code));
1673}
1674
1675static inline void fill_unplug_rsp_ok(struct fwserial_mgmt_pkt *pkt)
1676{
1677 pkt->hdr.code = cpu_to_be16(FWSC_VIRT_CABLE_UNPLUG_RSP);
1678 pkt->hdr.len = cpu_to_be16(mgmt_pkt_expected_len(pkt->hdr.code));
1679}
1680
1681static void fwserial_virt_plug_complete(struct fwtty_peer *peer,
1682 struct virt_plug_params *params)
1683{
1684 struct fwtty_port *port = peer->port;
1685
1686 peer->status_addr = be32_to_u64(params->status_hi, params->status_lo);
1687 peer->fifo_addr = be32_to_u64(params->fifo_hi, params->fifo_lo);
1688 peer->fifo_len = be32_to_cpu(params->fifo_len);
1689 peer_set_state(peer, FWPS_ATTACHED);
1690
1691 /* reconfigure tx_fifo optimally for this peer */
1692 spin_lock_bh(&port->lock);
1693 port->max_payload = min3(peer->max_payload, peer->fifo_len,
1694 MAX_ASYNC_PAYLOAD);
1695 dma_fifo_change_tx_limit(&port->tx_fifo, port->max_payload);
1696 spin_unlock_bh(&peer->port->lock);
1697
1698 if (port->port.console && port->fwcon_ops->notify != NULL)
1699 (*port->fwcon_ops->notify)(FWCON_NOTIFY_ATTACH, port->con_data);
1700
1701 fwtty_info(&peer->unit, "peer (guid:%016llx) connected on %s",
1702 (unsigned long long)peer->guid, dev_name(port->device));
1703}
1704
1705static inline int fwserial_send_mgmt_sync(struct fwtty_peer *peer,
1706 struct fwserial_mgmt_pkt *pkt)
1707{
1708 int generation;
1709 int rcode, tries = 5;
1710
1711 do {
1712 generation = peer->generation;
1713 smp_rmb();
1714
1715 rcode = fw_run_transaction(peer->serial->card,
1716 TCODE_WRITE_BLOCK_REQUEST,
1717 peer->node_id,
1718 generation, peer->speed,
1719 peer->mgmt_addr,
1720 pkt, be16_to_cpu(pkt->hdr.len));
1721 if (rcode == RCODE_BUSY || rcode == RCODE_SEND_ERROR ||
1722 rcode == RCODE_GENERATION) {
1723 fwtty_dbg(&peer->unit, "mgmt write error: %d", rcode);
1724 continue;
1725 } else
1726 break;
1727 } while (--tries > 0);
1728 return rcode;
1729}
1730
1731/**
1732 * fwserial_claim_port - attempt to claim port @ index for peer
1733 *
1734 * Returns ptr to claimed port or error code (as ERR_PTR())
1735 * Can sleep - must be called from process context
1736 */
1737static struct fwtty_port *fwserial_claim_port(struct fwtty_peer *peer,
1738 int index)
1739{
1740 struct fwtty_port *port;
1741
1742 if (index < 0 || index >= num_ports)
1743 return ERR_PTR(-EINVAL);
1744
1745 /* must guarantee that previous port releases have completed */
1746 synchronize_rcu();
1747
1748 port = peer->serial->ports[index];
1749 spin_lock_bh(&port->lock);
1750 if (!rcu_access_pointer(port->peer))
1751 rcu_assign_pointer(port->peer, peer);
1752 else
1753 port = ERR_PTR(-EBUSY);
1754 spin_unlock_bh(&port->lock);
1755
1756 return port;
1757}
1758
1759/**
1760 * fwserial_find_port - find avail port and claim for peer
1761 *
1762 * Returns ptr to claimed port or NULL if none avail
1763 * Can sleep - must be called from process context
1764 */
1765static struct fwtty_port *fwserial_find_port(struct fwtty_peer *peer)
1766{
1767 struct fwtty_port **ports = peer->serial->ports;
1768 int i;
1769
1770 /* must guarantee that previous port releases have completed */
1771 synchronize_rcu();
1772
1773 /* TODO: implement optional GUID-to-specific port # matching */
1774
1775 /* find an unattached port (but not the loopback port, if present) */
1776 for (i = 0; i < num_ttys; ++i) {
1777 spin_lock_bh(&ports[i]->lock);
1778 if (!ports[i]->peer) {
1779 /* claim port */
1780 rcu_assign_pointer(ports[i]->peer, peer);
1781 spin_unlock_bh(&ports[i]->lock);
1782 return ports[i];
1783 }
1784 spin_unlock_bh(&ports[i]->lock);
1785 }
1786 return NULL;
1787}
1788
1789static void fwserial_release_port(struct fwtty_port *port)
1790{
1791 /* drop carrier (and all other line status) */
1792 fwtty_update_port_status(port, 0);
1793
1794 spin_lock_bh(&port->lock);
1795
1796 /* reset dma fifo max transmission size back to S100 */
1797 port->max_payload = link_speed_to_max_payload(SCODE_100);
1798 dma_fifo_change_tx_limit(&port->tx_fifo, port->max_payload);
1799
1800 rcu_assign_pointer(port->peer, NULL);
1801 spin_unlock_bh(&port->lock);
1802
1803 if (port->port.console && port->fwcon_ops->notify != NULL)
1804 (*port->fwcon_ops->notify)(FWCON_NOTIFY_DETACH, port->con_data);
1805}
1806
1807static void fwserial_plug_timeout(unsigned long data)
1808{
1809 struct fwtty_peer *peer = (struct fwtty_peer *) data;
1810 struct fwtty_port *port;
1811
1812 spin_lock_bh(&peer->lock);
1813 if (peer->state != FWPS_PLUG_PENDING) {
1814 spin_unlock_bh(&peer->lock);
1815 return;
1816 }
1817
1818 port = peer_revert_state(peer);
1819 spin_unlock_bh(&peer->lock);
1820
1821 if (port)
1822 fwserial_release_port(port);
1823}
1824
1825/**
1826 * fwserial_connect_peer - initiate virtual cable with peer
1827 *
1828 * Returns 0 if VIRT_CABLE_PLUG request was successfully sent,
1829 * otherwise error code. Must be called from process context.
1830 */
1831static int fwserial_connect_peer(struct fwtty_peer *peer)
1832{
1833 struct fwtty_port *port;
1834 struct fwserial_mgmt_pkt *pkt;
1835 int err, rcode;
1836
1837 pkt = kmalloc(sizeof(*pkt), GFP_KERNEL);
1838 if (!pkt)
1839 return -ENOMEM;
1840
1841 port = fwserial_find_port(peer);
1842 if (!port) {
1843 fwtty_err(&peer->unit, "avail ports in use");
1844 err = -EBUSY;
1845 goto free_pkt;
1846 }
1847
1848 spin_lock_bh(&peer->lock);
1849
1850 /* only initiate VIRT_CABLE_PLUG if peer is currently not attached */
1851 if (peer->state != FWPS_NOT_ATTACHED) {
1852 err = -EBUSY;
1853 goto release_port;
1854 }
1855
1856 peer->port = port;
1857 peer_set_state(peer, FWPS_PLUG_PENDING);
1858
1859 fill_plug_req(pkt, peer->port);
1860
1861 setup_timer(&peer->timer, fwserial_plug_timeout, (unsigned long)peer);
1862 mod_timer(&peer->timer, jiffies + VIRT_CABLE_PLUG_TIMEOUT);
1863 spin_unlock_bh(&peer->lock);
1864
1865 rcode = fwserial_send_mgmt_sync(peer, pkt);
1866
1867 spin_lock_bh(&peer->lock);
1868 if (peer->state == FWPS_PLUG_PENDING && rcode != RCODE_COMPLETE) {
1869 if (rcode == RCODE_CONFLICT_ERROR)
1870 err = -EAGAIN;
1871 else
1872 err = -EIO;
1873 goto cancel_timer;
1874 }
1875 spin_unlock_bh(&peer->lock);
1876
1877 kfree(pkt);
1878 return 0;
1879
1880cancel_timer:
1881 del_timer(&peer->timer);
1882 peer_revert_state(peer);
1883release_port:
1884 spin_unlock_bh(&peer->lock);
1885 fwserial_release_port(port);
1886free_pkt:
1887 kfree(pkt);
1888 return err;
1889}
1890
1891/**
1892 * fwserial_close_port -
1893 * HUP the tty (if the tty exists) and unregister the tty device.
1894 * Only used by the unit driver upon unit removal to disconnect and
1895 * cleanup all attached ports
1896 *
1897 * The port reference is put by fwtty_cleanup (if a reference was
1898 * ever taken).
1899 */
1900static void fwserial_close_port(struct fwtty_port *port)
1901{
1902 struct tty_struct *tty;
1903
1904 mutex_lock(&port->port.mutex);
1905 tty = tty_port_tty_get(&port->port);
1906 if (tty) {
1907 tty_vhangup(tty);
1908 tty_kref_put(tty);
1909 }
1910 mutex_unlock(&port->port.mutex);
1911
1912 tty_unregister_device(fwtty_driver, port->index);
1913}
1914
1915/**
1916 * fwserial_lookup - finds first fw_serial associated with card
1917 * @card: fw_card to match
1918 *
1919 * NB: caller must be holding fwserial_list_mutex
1920 */
1921static struct fw_serial *fwserial_lookup(struct fw_card *card)
1922{
1923 struct fw_serial *serial;
1924
1925 list_for_each_entry(serial, &fwserial_list, list) {
1926 if (card == serial->card)
1927 return serial;
1928 }
1929
1930 return NULL;
1931}
1932
1933/**
1934 * __fwserial_lookup_rcu - finds first fw_serial associated with card
1935 * @card: fw_card to match
1936 *
1937 * NB: caller must be inside rcu_read_lock() section
1938 */
1939static struct fw_serial *__fwserial_lookup_rcu(struct fw_card *card)
1940{
1941 struct fw_serial *serial;
1942
1943 list_for_each_entry_rcu(serial, &fwserial_list, list) {
1944 if (card == serial->card)
1945 return serial;
1946 }
1947
1948 return NULL;
1949}
1950
1951/**
1952 * __fwserial_peer_by_node_id - finds a peer matching the given generation + id
1953 *
1954 * If a matching peer could not be found for the specified generation/node id,
1955 * this could be because:
1956 * a) the generation has changed and one of the nodes hasn't updated yet
1957 * b) the remote node has created its remote unit device before this
1958 * local node has created its corresponding remote unit device
1959 * In either case, the remote node should retry
1960 *
1961 * Note: caller must be in rcu_read_lock() section
1962 */
1963static struct fwtty_peer *__fwserial_peer_by_node_id(struct fw_card *card,
1964 int generation, int id)
1965{
1966 struct fw_serial *serial;
1967 struct fwtty_peer *peer;
1968
1969 serial = __fwserial_lookup_rcu(card);
1970 if (!serial) {
1971 /*
1972 * Something is very wrong - there should be a matching
1973 * fw_serial structure for every fw_card. Maybe the remote node
1974 * has created its remote unit device before this driver has
1975 * been probed for any unit devices...
1976 */
1977 fwtty_err(card, "unknown card (guid %016llx)",
1978 (unsigned long long) card->guid);
1979 return NULL;
1980 }
1981
1982 list_for_each_entry_rcu(peer, &serial->peer_list, list) {
1983 int g = peer->generation;
1984 smp_rmb();
1985 if (generation == g && id == peer->node_id)
1986 return peer;
1987 }
1988
1989 return NULL;
1990}
1991
1992#ifdef DEBUG
1993static void __dump_peer_list(struct fw_card *card)
1994{
1995 struct fw_serial *serial;
1996 struct fwtty_peer *peer;
1997
1998 serial = __fwserial_lookup_rcu(card);
1999 if (!serial)
2000 return;
2001
2002 list_for_each_entry_rcu(peer, &serial->peer_list, list) {
2003 int g = peer->generation;
2004 smp_rmb();
2005 fwtty_dbg(card, "peer(%d:%x) guid: %016llx\n", g,
2006 peer->node_id, (unsigned long long) peer->guid);
2007 }
2008}
2009#else
2010#define __dump_peer_list(s)
2011#endif
2012
2013static void fwserial_auto_connect(struct work_struct *work)
2014{
2015 struct fwtty_peer *peer = to_peer(to_delayed_work(work), connect);
2016 int err;
2017
2018 err = fwserial_connect_peer(peer);
2019 if (err == -EAGAIN && ++peer->connect_retries < MAX_CONNECT_RETRIES)
2020 schedule_delayed_work(&peer->connect, CONNECT_RETRY_DELAY);
2021}
2022
2023/**
2024 * fwserial_add_peer - add a newly probed 'serial' unit device as a 'peer'
2025 * @serial: aggregate representing the specific fw_card to add the peer to
2026 * @unit: 'peer' to create and add to peer_list of serial
2027 *
2028 * Adds a 'peer' (ie, a local or remote 'serial' unit device) to the list of
2029 * peers for a specific fw_card. Optionally, auto-attach this peer to an
2030 * available tty port. This function is called either directly or indirectly
2031 * as a result of a 'serial' unit device being created & probed.
2032 *
2033 * Note: this function is serialized with fwserial_remove_peer() by the
2034 * fwserial_list_mutex held in fwserial_probe().
2035 *
2036 * A 1:1 correspondence between an fw_unit and an fwtty_peer is maintained
2037 * via the dev_set_drvdata() for the device of the fw_unit.
2038 */
2039static int fwserial_add_peer(struct fw_serial *serial, struct fw_unit *unit)
2040{
2041 struct device *dev = &unit->device;
2042 struct fw_device *parent = fw_parent_device(unit);
2043 struct fwtty_peer *peer;
2044 struct fw_csr_iterator ci;
2045 int key, val;
2046 int generation;
2047
2048 peer = kzalloc(sizeof(*peer), GFP_KERNEL);
2049 if (!peer)
2050 return -ENOMEM;
2051
2052 peer_set_state(peer, FWPS_NOT_ATTACHED);
2053
2054 dev_set_drvdata(dev, peer);
2055 peer->unit = unit;
2056 peer->guid = (u64)parent->config_rom[3] << 32 | parent->config_rom[4];
2057 peer->speed = parent->max_speed;
2058 peer->max_payload = min(device_max_receive(parent),
2059 link_speed_to_max_payload(peer->speed));
2060
2061 generation = parent->generation;
2062 smp_rmb();
2063 peer->node_id = parent->node_id;
2064 smp_wmb();
2065 peer->generation = generation;
2066
2067 /* retrieve the mgmt bus addr from the unit directory */
2068 fw_csr_iterator_init(&ci, unit->directory);
2069 while (fw_csr_iterator_next(&ci, &key, &val)) {
2070 if (key == (CSR_OFFSET | CSR_DEPENDENT_INFO)) {
2071 peer->mgmt_addr = CSR_REGISTER_BASE + 4 * val;
2072 break;
2073 }
2074 }
2075 if (peer->mgmt_addr == 0ULL) {
2076 /*
2077 * No mgmt address effectively disables VIRT_CABLE_PLUG -
2078 * this peer will not be able to attach to a remote
2079 */
2080 peer_set_state(peer, FWPS_NO_MGMT_ADDR);
2081 }
2082
2083 spin_lock_init(&peer->lock);
2084 peer->port = NULL;
2085
2086 init_timer(&peer->timer);
2087 INIT_WORK(&peer->work, NULL);
2088 INIT_DELAYED_WORK(&peer->connect, fwserial_auto_connect);
2089
2090 /* associate peer with specific fw_card */
2091 peer->serial = serial;
2092 list_add_rcu(&peer->list, &serial->peer_list);
2093
2094 fwtty_info(&peer->unit, "peer added (guid:%016llx)",
2095 (unsigned long long)peer->guid);
2096
2097 /* identify the local unit & virt cable to loopback port */
2098 if (parent->is_local) {
2099 serial->self = peer;
2100 if (create_loop_dev) {
2101 struct fwtty_port *port;
2102 port = fwserial_claim_port(peer, num_ttys);
2103 if (!IS_ERR(port)) {
2104 struct virt_plug_params params;
2105
2106 spin_lock_bh(&peer->lock);
2107 peer->port = port;
2108 fill_plug_params(&params, port);
2109 fwserial_virt_plug_complete(peer, &params);
2110 spin_unlock_bh(&peer->lock);
2111
2112 fwtty_write_port_status(port);
2113 }
2114 }
2115
2116 } else if (auto_connect) {
2117 /* auto-attach to remote units only (if policy allows) */
2118 schedule_delayed_work(&peer->connect, 1);
2119 }
2120
2121 return 0;
2122}
2123
2124/**
2125 * fwserial_remove_peer - remove a 'serial' unit device as a 'peer'
2126 *
2127 * Remove a 'peer' from its list of peers. This function is only
2128 * called by fwserial_remove() on bus removal of the unit device.
2129 *
2130 * Note: this function is serialized with fwserial_add_peer() by the
2131 * fwserial_list_mutex held in fwserial_remove().
2132 */
2133static void fwserial_remove_peer(struct fwtty_peer *peer)
2134{
2135 struct fwtty_port *port;
2136
2137 spin_lock_bh(&peer->lock);
2138 peer_set_state(peer, FWPS_GONE);
2139 spin_unlock_bh(&peer->lock);
2140
2141 cancel_delayed_work_sync(&peer->connect);
2142 cancel_work_sync(&peer->work);
2143
2144 spin_lock_bh(&peer->lock);
2145 /* if this unit is the local unit, clear link */
2146 if (peer == peer->serial->self)
2147 peer->serial->self = NULL;
2148
2149 /* cancel the request timeout timer (if running) */
2150 del_timer(&peer->timer);
2151
2152 port = peer->port;
2153 peer->port = NULL;
2154
2155 list_del_rcu(&peer->list);
2156
2157 fwtty_info(&peer->unit, "peer removed (guid:%016llx)",
2158 (unsigned long long)peer->guid);
2159
2160 spin_unlock_bh(&peer->lock);
2161
2162 if (port)
2163 fwserial_release_port(port);
2164
2165 synchronize_rcu();
2166 kfree(peer);
2167}
2168
2169/**
2170 * create_loop_device - create a loopback tty device
2171 * @tty_driver: tty_driver to own loopback device
2172 * @prototype: ptr to already-assigned 'prototype' tty port
2173 * @index: index to associate this device with the tty port
2174 * @parent: device to child to
2175 *
2176 * HACK - this is basically tty_port_register_device() with an
2177 * alternate naming scheme. Suggest tty_port_register_named_device()
2178 * helper api.
2179 *
2180 * Creates a loopback tty device named 'fwloop<n>' which is attached to
2181 * the local unit in fwserial_add_peer(). Note that <n> in the device
2182 * name advances in increments of port allocation blocks, ie., for port
2183 * indices 0..3, the device name will be 'fwloop0'; for 4..7, 'fwloop1',
2184 * and so on.
2185 *
2186 * Only one loopback device should be created per fw_card.
2187 */
2188static void release_loop_device(struct device *dev)
2189{
2190 kfree(dev);
2191}
2192
2193static struct device *create_loop_device(struct tty_driver *driver,
2194 struct fwtty_port *prototype,
2195 struct fwtty_port *port,
2196 struct device *parent)
2197{
2198 char name[64];
2199 int index = port->index;
2200 dev_t devt = MKDEV(driver->major, driver->minor_start) + index;
2201 struct device *dev = NULL;
2202 int err;
2203
2204 if (index >= fwtty_driver->num)
2205 return ERR_PTR(-EINVAL);
2206
2207 snprintf(name, 64, "%s%d", loop_dev_name, index / num_ports);
2208
2209 tty_port_link_device(&port->port, driver, index);
2210
2211 cdev_init(&driver->cdevs[index], driver->cdevs[prototype->index].ops);
2212 driver->cdevs[index].owner = driver->owner;
2213 err = cdev_add(&driver->cdevs[index], devt, 1);
2214 if (err)
2215 return ERR_PTR(err);
2216
2217 dev = kzalloc(sizeof(*dev), GFP_KERNEL);
2218 if (!dev) {
2219 cdev_del(&driver->cdevs[index]);
2220 return ERR_PTR(-ENOMEM);
2221 }
2222
2223 dev->devt = devt;
2224 dev->class = prototype->device->class;
2225 dev->parent = parent;
2226 dev->release = release_loop_device;
2227 dev_set_name(dev, "%s", name);
2228 dev->groups = NULL;
2229 dev_set_drvdata(dev, NULL);
2230
2231 err = device_register(dev);
2232 if (err) {
2233 put_device(dev);
2234 cdev_del(&driver->cdevs[index]);
2235 return ERR_PTR(err);
2236 }
2237
2238 return dev;
2239}
2240
2241/**
2242 * fwserial_create - init everything to create TTYs for a specific fw_card
2243 * @unit: fw_unit for first 'serial' unit device probed for this fw_card
2244 *
2245 * This function inits the aggregate structure (an fw_serial instance)
2246 * used to manage the TTY ports registered by a specific fw_card. Also, the
2247 * unit device is added as the first 'peer'.
2248 *
2249 * This unit device may represent a local unit device (as specified by the
2250 * config ROM unit directory) or it may represent a remote unit device
2251 * (as specified by the reading of the remote node's config ROM).
2252 *
2253 * Returns 0 to indicate "ownership" of the unit device, or a negative errno
2254 * value to indicate which error.
2255 */
2256static int fwserial_create(struct fw_unit *unit)
2257{
2258 struct fw_device *parent = fw_parent_device(unit);
2259 struct fw_card *card = parent->card;
2260 struct fw_serial *serial;
2261 struct fwtty_port *port;
2262 struct device *tty_dev;
2263 int i, j;
2264 int err;
2265
2266 serial = kzalloc(sizeof(*serial), GFP_KERNEL);
2267 if (!serial)
2268 return -ENOMEM;
2269
2270 kref_init(&serial->kref);
2271 serial->card = card;
2272 INIT_LIST_HEAD(&serial->peer_list);
2273
2274 for (i = 0; i < num_ports; ++i) {
2275 port = kzalloc(sizeof(*port), GFP_KERNEL);
2276 if (!port) {
2277 err = -ENOMEM;
2278 goto free_ports;
2279 }
2280 tty_port_init(&port->port);
2281 port->index = FWTTY_INVALID_INDEX;
2282 port->port.ops = &fwtty_port_ops;
2283 port->serial = serial;
2284
2285 spin_lock_init(&port->lock);
2286 INIT_DELAYED_WORK(&port->drain, fwtty_drain_tx);
2287 INIT_DELAYED_WORK(&port->emit_breaks, fwtty_emit_breaks);
2288 INIT_WORK(&port->hangup, fwtty_do_hangup);
2289 INIT_WORK(&port->push, fwtty_pushrx);
2290 INIT_LIST_HEAD(&port->buf_list);
2291 init_waitqueue_head(&port->wait_tx);
2292 port->max_payload = link_speed_to_max_payload(SCODE_100);
2293 dma_fifo_init(&port->tx_fifo);
2294
2295 rcu_assign_pointer(port->peer, NULL);
2296 serial->ports[i] = port;
2297
2298 /* get unique bus addr region for port's status & recv fifo */
2299 port->rx_handler.length = FWTTY_PORT_RXFIFO_LEN + 4;
2300 port->rx_handler.address_callback = fwtty_port_handler;
2301 port->rx_handler.callback_data = port;
2302 /*
2303 * XXX: use custom memory region above cpu physical memory addrs
2304 * this will ease porting to 64-bit firewire adapters
2305 */
2306 err = fw_core_add_address_handler(&port->rx_handler,
2307 &fw_high_memory_region);
2308 if (err) {
2309 kfree(port);
2310 goto free_ports;
2311 }
2312 }
2313 /* preserve i for error cleanup */
2314
2315 err = fwtty_ports_add(serial);
2316 if (err) {
2317 fwtty_err(&unit, "no space in port table");
2318 goto free_ports;
2319 }
2320
2321 for (j = 0; j < num_ttys; ++j) {
2322 tty_dev = tty_port_register_device(&serial->ports[j]->port,
2323 fwtty_driver,
2324 serial->ports[j]->index,
2325 card->device);
2326 if (IS_ERR(tty_dev)) {
2327 err = PTR_ERR(tty_dev);
2328 fwtty_err(&unit, "register tty device error (%d)", err);
2329 goto unregister_ttys;
2330 }
2331
2332 serial->ports[j]->device = tty_dev;
2333 }
2334 /* preserve j for error cleanup */
2335
2336 if (create_loop_dev) {
2337 struct device *loop_dev;
2338
2339 loop_dev = create_loop_device(fwtty_driver,
2340 serial->ports[0],
2341 serial->ports[num_ttys],
2342 card->device);
2343 if (IS_ERR(loop_dev)) {
2344 err = PTR_ERR(loop_dev);
2345 fwtty_err(&unit, "create loop device failed (%d)", err);
2346 goto unregister_ttys;
2347 }
2348 serial->ports[num_ttys]->device = loop_dev;
2349 serial->ports[num_ttys]->loopback = true;
2350 }
2351
2352 list_add_rcu(&serial->list, &fwserial_list);
2353
2354 fwtty_notice(&unit, "TTY over FireWire on device %s (guid %016llx)",
2355 dev_name(card->device), (unsigned long long) card->guid);
2356
2357 err = fwserial_add_peer(serial, unit);
2358 if (!err)
2359 return 0;
2360
2361 fwtty_err(&unit, "unable to add peer unit device (%d)", err);
2362
2363 /* fall-through to error processing */
2364 list_del_rcu(&serial->list);
2365unregister_ttys:
2366 for (--j; j >= 0; --j)
2367 tty_unregister_device(fwtty_driver, serial->ports[j]->index);
2368 kref_put(&serial->kref, fwserial_destroy);
2369 return err;
2370
2371free_ports:
2372 for (--i; i >= 0; --i)
2373 kfree(serial->ports[i]);
2374 kfree(serial);
2375 return err;
2376}
2377
2378/**
2379 * fwserial_probe: bus probe function for firewire 'serial' unit devices
2380 *
2381 * A 'serial' unit device is created and probed as a result of:
2382 * - declaring a ieee1394 bus id table for 'devices' matching a fabricated
2383 * 'serial' unit specifier id
2384 * - adding a unit directory to the config ROM(s) for a 'serial' unit
2385 *
2386 * The firewire core registers unit devices by enumerating unit directories
2387 * of a node's config ROM after reading the config ROM when a new node is
2388 * added to the bus topology after a bus reset.
2389 *
2390 * The practical implications of this are:
2391 * - this probe is called for both local and remote nodes that have a 'serial'
2392 * unit directory in their config ROM (that matches the specifiers in
2393 * fwserial_id_table).
2394 * - no specific order is enforced for local vs. remote unit devices
2395 *
2396 * This unit driver copes with the lack of specific order in the same way the
2397 * firewire net driver does -- each probe, for either a local or remote unit
2398 * device, is treated as a 'peer' (has a struct fwtty_peer instance) and the
2399 * first peer created for a given fw_card (tracked by the global fwserial_list)
2400 * creates the underlying TTYs (aggregated in a fw_serial instance).
2401 *
2402 * NB: an early attempt to differentiate local & remote unit devices by creating
2403 * peers only for remote units and fw_serial instances (with their
2404 * associated TTY devices) only for local units was discarded. Managing
2405 * the peer lifetimes on device removal proved too complicated.
2406 *
2407 * fwserial_probe/fwserial_remove are effectively serialized by the
2408 * fwserial_list_mutex. This is necessary because the addition of the first peer
2409 * for a given fw_card will trigger the creation of the fw_serial for that
2410 * fw_card, which must not simultaneously contend with the removal of the
2411 * last peer for a given fw_card triggering the destruction of the same
2412 * fw_serial for the same fw_card.
2413 */
2414static int fwserial_probe(struct device *dev)
2415{
2416 struct fw_unit *unit = fw_unit(dev);
2417 struct fw_serial *serial;
2418 int err;
2419
2420 mutex_lock(&fwserial_list_mutex);
2421 serial = fwserial_lookup(fw_parent_device(unit)->card);
2422 if (!serial)
2423 err = fwserial_create(unit);
2424 else
2425 err = fwserial_add_peer(serial, unit);
2426 mutex_unlock(&fwserial_list_mutex);
2427 return err;
2428}
2429
2430/**
2431 * fwserial_remove: bus removal function for firewire 'serial' unit devices
2432 *
2433 * The corresponding 'peer' for this unit device is removed from the list of
2434 * peers for the associated fw_serial (which has a 1:1 correspondence with a
2435 * specific fw_card). If this is the last peer being removed, then trigger
2436 * the destruction of the underlying TTYs.
2437 */
2438static int fwserial_remove(struct device *dev)
2439{
2440 struct fwtty_peer *peer = dev_get_drvdata(dev);
2441 struct fw_serial *serial = peer->serial;
2442 int i;
2443
2444 mutex_lock(&fwserial_list_mutex);
2445 fwserial_remove_peer(peer);
2446
2447 if (list_empty(&serial->peer_list)) {
2448 /* unlink from the fwserial_list here */
2449 list_del_rcu(&serial->list);
2450
2451 for (i = 0; i < num_ports; ++i)
2452 fwserial_close_port(serial->ports[i]);
2453 kref_put(&serial->kref, fwserial_destroy);
2454 }
2455 mutex_unlock(&fwserial_list_mutex);
2456
2457 return 0;
2458}
2459
2460/**
2461 * fwserial_update: bus update function for 'firewire' serial unit devices
2462 *
2463 * Updates the new node_id and bus generation for this peer. Note that locking
2464 * is unnecessary; but careful memory barrier usage is important to enforce the
2465 * load and store order of generation & node_id.
2466 *
2467 * The fw-core orders the write of node_id before generation in the parent
2468 * fw_device to ensure that a stale node_id cannot be used with a current
2469 * bus generation. So the generation value must be read before the node_id.
2470 *
2471 * In turn, this orders the write of node_id before generation in the peer to
2472 * also ensure a stale node_id cannot be used with a current bus generation.
2473 */
2474static void fwserial_update(struct fw_unit *unit)
2475{
2476 struct fw_device *parent = fw_parent_device(unit);
2477 struct fwtty_peer *peer = dev_get_drvdata(&unit->device);
2478 int generation;
2479
2480 generation = parent->generation;
2481 smp_rmb();
2482 peer->node_id = parent->node_id;
2483 smp_wmb();
2484 peer->generation = generation;
2485}
2486
2487static const struct ieee1394_device_id fwserial_id_table[] = {
2488 {
2489 .match_flags = IEEE1394_MATCH_SPECIFIER_ID |
2490 IEEE1394_MATCH_VERSION,
2491 .specifier_id = LINUX_VENDOR_ID,
2492 .version = FWSERIAL_VERSION,
2493 },
2494 { }
2495};
2496
2497static struct fw_driver fwserial_driver = {
2498 .driver = {
2499 .owner = THIS_MODULE,
2500 .name = KBUILD_MODNAME,
2501 .bus = &fw_bus_type,
2502 .probe = fwserial_probe,
2503 .remove = fwserial_remove,
2504 },
2505 .update = fwserial_update,
2506 .id_table = fwserial_id_table,
2507};
2508
2509#define FW_UNIT_SPECIFIER(id) ((CSR_SPECIFIER_ID << 24) | (id))
2510#define FW_UNIT_VERSION(ver) ((CSR_VERSION << 24) | (ver))
2511#define FW_UNIT_ADDRESS(ofs) (((CSR_OFFSET | CSR_DEPENDENT_INFO) << 24) \
2512 | (((ofs) - CSR_REGISTER_BASE) >> 2))
2513/* XXX: config ROM definitons could be improved with semi-automated offset
2514 * and length calculation
2515 */
2516#define FW_ROM_DESCRIPTOR(ofs) (((CSR_LEAF | CSR_DESCRIPTOR) << 24) | (ofs))
2517
2518struct fwserial_unit_directory_data {
2519 u16 crc;
2520 u16 len;
2521 u32 unit_specifier;
2522 u32 unit_sw_version;
2523 u32 unit_addr_offset;
2524 u32 desc1_ofs;
2525 u16 desc1_crc;
2526 u16 desc1_len;
2527 u32 desc1_data[5];
2528} __packed;
2529
2530static struct fwserial_unit_directory_data fwserial_unit_directory_data = {
2531 .len = 4,
2532 .unit_specifier = FW_UNIT_SPECIFIER(LINUX_VENDOR_ID),
2533 .unit_sw_version = FW_UNIT_VERSION(FWSERIAL_VERSION),
2534 .desc1_ofs = FW_ROM_DESCRIPTOR(1),
2535 .desc1_len = 5,
2536 .desc1_data = {
2537 0x00000000, /* type = text */
2538 0x00000000, /* enc = ASCII, lang EN */
2539 0x4c696e75, /* 'Linux TTY' */
2540 0x78205454,
2541 0x59000000,
2542 },
2543};
2544
2545static struct fw_descriptor fwserial_unit_directory = {
2546 .length = sizeof(fwserial_unit_directory_data) / sizeof(u32),
2547 .key = (CSR_DIRECTORY | CSR_UNIT) << 24,
2548 .data = (u32 *)&fwserial_unit_directory_data,
2549};
2550
2551/*
2552 * The management address is in the unit space region but above other known
2553 * address users (to keep wild writes from causing havoc)
2554 */
2555const struct fw_address_region fwserial_mgmt_addr_region = {
2556 .start = CSR_REGISTER_BASE + 0x1e0000ULL,
2557 .end = 0x1000000000000ULL,
2558};
2559
2560static struct fw_address_handler fwserial_mgmt_addr_handler;
2561
2562/**
2563 * fwserial_handle_plug_req - handle VIRT_CABLE_PLUG request work
2564 * @work: ptr to peer->work
2565 *
2566 * Attempts to complete the VIRT_CABLE_PLUG handshake sequence for this peer.
2567 *
2568 * This checks for a collided request-- ie, that a VIRT_CABLE_PLUG request was
2569 * already sent to this peer. If so, the collision is resolved by comparing
2570 * guid values; the loser sends the plug response.
2571 *
2572 * Note: if an error prevents a response, don't do anything -- the
2573 * remote will timeout its request.
2574 */
2575static void fwserial_handle_plug_req(struct work_struct *work)
2576{
2577 struct fwtty_peer *peer = to_peer(work, work);
2578 struct virt_plug_params *plug_req = &peer->work_params.plug_req;
2579 struct fwtty_port *port;
2580 struct fwserial_mgmt_pkt *pkt;
2581 int rcode;
2582
2583 pkt = kmalloc(sizeof(*pkt), GFP_KERNEL);
2584 if (!pkt)
2585 return;
2586
2587 port = fwserial_find_port(peer);
2588
2589 spin_lock_bh(&peer->lock);
2590
2591 switch (peer->state) {
2592 case FWPS_NOT_ATTACHED:
2593 if (!port) {
2594 fwtty_err(&peer->unit, "no more ports avail");
2595 fill_plug_rsp_nack(pkt);
2596 } else {
2597 peer->port = port;
2598 fill_plug_rsp_ok(pkt, peer->port);
2599 peer_set_state(peer, FWPS_PLUG_RESPONDING);
2600 /* don't release claimed port */
2601 port = NULL;
2602 }
2603 break;
2604
2605 case FWPS_PLUG_PENDING:
2606 if (peer->serial->card->guid > peer->guid)
2607 goto cleanup;
2608
2609 /* We lost - hijack the already-claimed port and send ok */
2610 del_timer(&peer->timer);
2611 fill_plug_rsp_ok(pkt, peer->port);
2612 peer_set_state(peer, FWPS_PLUG_RESPONDING);
2613 break;
2614
2615 default:
2616 fill_plug_rsp_nack(pkt);
2617 }
2618
2619 spin_unlock_bh(&peer->lock);
2620 if (port)
2621 fwserial_release_port(port);
2622
2623 rcode = fwserial_send_mgmt_sync(peer, pkt);
2624
2625 spin_lock_bh(&peer->lock);
2626 if (peer->state == FWPS_PLUG_RESPONDING) {
2627 if (rcode == RCODE_COMPLETE) {
2628 struct fwtty_port *tmp = peer->port;
2629
2630 fwserial_virt_plug_complete(peer, plug_req);
2631 spin_unlock_bh(&peer->lock);
2632
2633 fwtty_write_port_status(tmp);
2634 spin_lock_bh(&peer->lock);
2635 } else {
2636 fwtty_err(&peer->unit, "PLUG_RSP error (%d)", rcode);
2637 port = peer_revert_state(peer);
2638 }
2639 }
2640cleanup:
2641 spin_unlock_bh(&peer->lock);
2642 if (port)
2643 fwserial_release_port(port);
2644 kfree(pkt);
2645 return;
2646}
2647
2648static void fwserial_handle_unplug_req(struct work_struct *work)
2649{
2650 struct fwtty_peer *peer = to_peer(work, work);
2651 struct fwtty_port *port = NULL;
2652 struct fwserial_mgmt_pkt *pkt;
2653 int rcode;
2654
2655 pkt = kmalloc(sizeof(*pkt), GFP_KERNEL);
2656 if (!pkt)
2657 return;
2658
2659 spin_lock_bh(&peer->lock);
2660
2661 switch (peer->state) {
2662 case FWPS_ATTACHED:
2663 fill_unplug_rsp_ok(pkt);
2664 peer_set_state(peer, FWPS_UNPLUG_RESPONDING);
2665 break;
2666
2667 case FWPS_UNPLUG_PENDING:
2668 if (peer->serial->card->guid > peer->guid)
2669 goto cleanup;
2670
2671 /* We lost - send unplug rsp */
2672 del_timer(&peer->timer);
2673 fill_unplug_rsp_ok(pkt);
2674 peer_set_state(peer, FWPS_UNPLUG_RESPONDING);
2675 break;
2676
2677 default:
2678 fill_unplug_rsp_nack(pkt);
2679 }
2680
2681 spin_unlock_bh(&peer->lock);
2682
2683 rcode = fwserial_send_mgmt_sync(peer, pkt);
2684
2685 spin_lock_bh(&peer->lock);
2686 if (peer->state == FWPS_UNPLUG_RESPONDING) {
2687 if (rcode == RCODE_COMPLETE)
2688 port = peer_revert_state(peer);
2689 else
2690 fwtty_err(&peer->unit, "UNPLUG_RSP error (%d)", rcode);
2691 }
2692cleanup:
2693 spin_unlock_bh(&peer->lock);
2694 if (port)
2695 fwserial_release_port(port);
2696 kfree(pkt);
2697 return;
2698}
2699
2700static int fwserial_parse_mgmt_write(struct fwtty_peer *peer,
2701 struct fwserial_mgmt_pkt *pkt,
2702 unsigned long long addr,
2703 size_t len)
2704{
2705 struct fwtty_port *port = NULL;
2706 int rcode;
2707
2708 if (addr != fwserial_mgmt_addr_handler.offset || len < sizeof(pkt->hdr))
2709 return RCODE_ADDRESS_ERROR;
2710
2711 if (len != be16_to_cpu(pkt->hdr.len) ||
2712 len != mgmt_pkt_expected_len(pkt->hdr.code))
2713 return RCODE_DATA_ERROR;
2714
2715 spin_lock_bh(&peer->lock);
2716 if (peer->state == FWPS_GONE) {
2717 /*
2718 * This should never happen - it would mean that the
2719 * remote unit that just wrote this transaction was
2720 * already removed from the bus -- and the removal was
2721 * processed before we rec'd this transaction
2722 */
2723 fwtty_err(&peer->unit, "peer already removed");
2724 spin_unlock_bh(&peer->lock);
2725 return RCODE_ADDRESS_ERROR;
2726 }
2727
2728 rcode = RCODE_COMPLETE;
2729
2730 fwtty_dbg(&peer->unit, "mgmt: hdr.code: %04hx", pkt->hdr.code);
2731
2732 switch (be16_to_cpu(pkt->hdr.code) & FWSC_CODE_MASK) {
2733 case FWSC_VIRT_CABLE_PLUG:
2734 if (work_pending(&peer->work)) {
2735 fwtty_err(&peer->unit, "plug req: busy");
2736 rcode = RCODE_CONFLICT_ERROR;
2737
2738 } else {
2739 peer->work_params.plug_req = pkt->plug_req;
2740 PREPARE_WORK(&peer->work, fwserial_handle_plug_req);
2741 queue_work(system_unbound_wq, &peer->work);
2742 }
2743 break;
2744
2745 case FWSC_VIRT_CABLE_PLUG_RSP:
2746 if (peer->state != FWPS_PLUG_PENDING) {
2747 rcode = RCODE_CONFLICT_ERROR;
2748
2749 } else if (be16_to_cpu(pkt->hdr.code) & FWSC_RSP_NACK) {
2750 fwtty_notice(&peer->unit, "NACK plug rsp");
2751 port = peer_revert_state(peer);
2752
2753 } else {
2754 struct fwtty_port *tmp = peer->port;
2755
2756 fwserial_virt_plug_complete(peer, &pkt->plug_rsp);
2757 spin_unlock_bh(&peer->lock);
2758
2759 fwtty_write_port_status(tmp);
2760 spin_lock_bh(&peer->lock);
2761 }
2762 break;
2763
2764 case FWSC_VIRT_CABLE_UNPLUG:
2765 if (work_pending(&peer->work)) {
2766 fwtty_err(&peer->unit, "unplug req: busy");
2767 rcode = RCODE_CONFLICT_ERROR;
2768 } else {
2769 PREPARE_WORK(&peer->work, fwserial_handle_unplug_req);
2770 queue_work(system_unbound_wq, &peer->work);
2771 }
2772 break;
2773
2774 case FWSC_VIRT_CABLE_UNPLUG_RSP:
2775 if (peer->state != FWPS_UNPLUG_PENDING)
2776 rcode = RCODE_CONFLICT_ERROR;
2777 else {
2778 if (be16_to_cpu(pkt->hdr.code) & FWSC_RSP_NACK)
2779 fwtty_notice(&peer->unit, "NACK unplug?");
2780 port = peer_revert_state(peer);
2781 }
2782 break;
2783
2784 default:
2785 fwtty_err(&peer->unit, "unknown mgmt code %d",
2786 be16_to_cpu(pkt->hdr.code));
2787 rcode = RCODE_DATA_ERROR;
2788 }
2789 spin_unlock_bh(&peer->lock);
2790
2791 if (port)
2792 fwserial_release_port(port);
2793
2794 return rcode;
2795}
2796
2797/**
2798 * fwserial_mgmt_handler: bus address handler for mgmt requests
2799 * @parameters: fw_address_callback_t as specified by firewire core interface
2800 *
2801 * This handler is responsible for handling virtual cable requests from remotes
2802 * for all cards.
2803 */
2804static void fwserial_mgmt_handler(struct fw_card *card,
2805 struct fw_request *request,
2806 int tcode, int destination, int source,
2807 int generation,
2808 unsigned long long addr,
2809 void *data, size_t len,
2810 void *callback_data)
2811{
2812 struct fwserial_mgmt_pkt *pkt = data;
2813 struct fwtty_peer *peer;
2814 int rcode;
2815
2816 rcu_read_lock();
2817 peer = __fwserial_peer_by_node_id(card, generation, source);
2818 if (!peer) {
2819 fwtty_dbg(card, "peer(%d:%x) not found", generation, source);
2820 __dump_peer_list(card);
2821 rcode = RCODE_CONFLICT_ERROR;
2822
2823 } else {
2824 switch (tcode) {
2825 case TCODE_WRITE_BLOCK_REQUEST:
2826 rcode = fwserial_parse_mgmt_write(peer, pkt, addr, len);
2827 break;
2828
2829 default:
2830 rcode = RCODE_TYPE_ERROR;
2831 }
2832 }
2833
2834 rcu_read_unlock();
2835 fw_send_response(card, request, rcode);
2836}
2837
2838static int __init fwserial_init(void)
2839{
2840 int err, num_loops = !!(create_loop_dev);
2841
2842 /* num_ttys/num_ports must not be set above the static alloc avail */
2843 if (num_ttys + num_loops > MAX_CARD_PORTS)
2844 num_ttys = MAX_CARD_PORTS - num_loops;
2845 num_ports = num_ttys + num_loops;
2846
2847 fwtty_driver = alloc_tty_driver(MAX_TOTAL_PORTS);
2848 if (!fwtty_driver) {
2849 err = -ENOMEM;
2850 return err;
2851 }
2852
2853 fwtty_driver->driver_name = KBUILD_MODNAME;
2854 fwtty_driver->name = tty_dev_name;
2855 fwtty_driver->major = 0;
2856 fwtty_driver->minor_start = 0;
2857 fwtty_driver->type = TTY_DRIVER_TYPE_SERIAL;
2858 fwtty_driver->subtype = SERIAL_TYPE_NORMAL;
2859 fwtty_driver->flags = TTY_DRIVER_REAL_RAW |
2860 TTY_DRIVER_DYNAMIC_DEV;
2861
2862 fwtty_driver->init_termios = tty_std_termios;
2863 fwtty_driver->init_termios.c_cflag |= CLOCAL;
2864 tty_set_operations(fwtty_driver, &fwtty_ops);
2865
2866 err = tty_register_driver(fwtty_driver);
2867 if (err) {
2868 driver_err("register tty driver failed (%d)", err);
2869 goto put_tty;
2870 }
2871
2872 fwtty_txn_cache = kmem_cache_create("fwtty_txn_cache",
2873 sizeof(struct fwtty_transaction),
2874 0, 0, fwtty_txn_constructor);
2875 if (!fwtty_txn_cache) {
2876 err = -ENOMEM;
2877 goto unregister_driver;
2878 }
2879
2880 /*
2881 * Ideally, this address handler would be registered per local node
2882 * (rather than the same handler for all local nodes). However,
2883 * since the firewire core requires the config rom descriptor *before*
2884 * the local unit device(s) are created, a single management handler
2885 * must suffice for all local serial units.
2886 */
2887 fwserial_mgmt_addr_handler.length = sizeof(struct fwserial_mgmt_pkt);
2888 fwserial_mgmt_addr_handler.address_callback = fwserial_mgmt_handler;
2889
2890 err = fw_core_add_address_handler(&fwserial_mgmt_addr_handler,
2891 &fwserial_mgmt_addr_region);
2892 if (err) {
2893 driver_err("add management handler failed (%d)", err);
2894 goto destroy_cache;
2895 }
2896
2897 fwserial_unit_directory_data.unit_addr_offset =
2898 FW_UNIT_ADDRESS(fwserial_mgmt_addr_handler.offset);
2899 err = fw_core_add_descriptor(&fwserial_unit_directory);
2900 if (err) {
2901 driver_err("add unit descriptor failed (%d)", err);
2902 goto remove_handler;
2903 }
2904
2905 err = driver_register(&fwserial_driver.driver);
2906 if (err) {
2907 driver_err("register fwserial driver failed (%d)", err);
2908 goto remove_descriptor;
2909 }
2910
2911 return 0;
2912
2913remove_descriptor:
2914 fw_core_remove_descriptor(&fwserial_unit_directory);
2915remove_handler:
2916 fw_core_remove_address_handler(&fwserial_mgmt_addr_handler);
2917destroy_cache:
2918 kmem_cache_destroy(fwtty_txn_cache);
2919unregister_driver:
2920 tty_unregister_driver(fwtty_driver);
2921put_tty:
2922 put_tty_driver(fwtty_driver);
2923 return err;
2924}
2925
2926static void __exit fwserial_exit(void)
2927{
2928 driver_unregister(&fwserial_driver.driver);
2929 fw_core_remove_descriptor(&fwserial_unit_directory);
2930 fw_core_remove_address_handler(&fwserial_mgmt_addr_handler);
2931 kmem_cache_destroy(fwtty_txn_cache);
2932 tty_unregister_driver(fwtty_driver);
2933 put_tty_driver(fwtty_driver);
2934}
2935
2936module_init(fwserial_init);
2937module_exit(fwserial_exit);
2938
2939MODULE_AUTHOR("Peter Hurley (peter@hurleysoftware.com)");
2940MODULE_DESCRIPTION("FireWire Serial TTY Driver");
2941MODULE_LICENSE("GPL");
2942MODULE_DEVICE_TABLE(ieee1394, fwserial_id_table);
2943MODULE_PARM_DESC(ttys, "Number of ttys to create for each local firewire node");
2944MODULE_PARM_DESC(auto, "Auto-connect a tty to each firewire node discovered");
2945MODULE_PARM_DESC(loop, "Create a loopback device, fwloop<n>, with ttys");
2946MODULE_PARM_DESC(limit_bw, "Limit bandwidth utilization to 20%.");
diff --git a/drivers/staging/fwserial/fwserial.h b/drivers/staging/fwserial/fwserial.h
new file mode 100644
index 000000000000..8b572edf9563
--- /dev/null
+++ b/drivers/staging/fwserial/fwserial.h
@@ -0,0 +1,387 @@
1#ifndef _FIREWIRE_FWSERIAL_H
2#define _FIREWIRE_FWSERIAL_H
3
4#include <linux/kernel.h>
5#include <linux/tty.h>
6#include <linux/tty_driver.h>
7#include <linux/tty_flip.h>
8#include <linux/list.h>
9#include <linux/firewire.h>
10#include <linux/firewire-constants.h>
11#include <linux/spinlock.h>
12#include <linux/rcupdate.h>
13#include <linux/mutex.h>
14#include <linux/serial.h>
15#include <linux/serial_reg.h>
16#include <linux/module.h>
17#include <linux/seq_file.h>
18
19#include "dma_fifo.h"
20
21#ifdef FWTTY_PROFILING
22#define DISTRIBUTION_MAX_SIZE 8192
23#define DISTRIBUTION_MAX_INDEX (ilog2(DISTRIBUTION_MAX_SIZE) + 1)
24static inline void profile_size_distrib(unsigned stat[], unsigned val)
25{
26 int n = (val) ? min(ilog2(val) + 1, DISTRIBUTION_MAX_INDEX) : 0;
27 ++stat[n];
28}
29#else
30#define DISTRIBUTION_MAX_INDEX 0
31#define profile_size_distrib(st, n)
32#endif
33
34/* Parameters for both VIRT_CABLE_PLUG & VIRT_CABLE_PLUG_RSP mgmt codes */
35struct virt_plug_params {
36 __be32 status_hi;
37 __be32 status_lo;
38 __be32 fifo_hi;
39 __be32 fifo_lo;
40 __be32 fifo_len;
41};
42
43struct peer_work_params {
44 union {
45 struct virt_plug_params plug_req;
46 };
47};
48
49/**
50 * fwtty_peer: structure representing local & remote unit devices
51 * @unit: unit child device of fw_device node
52 * @serial: back pointer to associated fw_serial aggregate
53 * @guid: unique 64-bit guid for this unit device
54 * @generation: most recent bus generation
55 * @node_id: most recent node_id
56 * @speed: link speed of peer (0 = S100, 2 = S400, ... 5 = S3200)
57 * @mgmt_addr: bus addr region to write mgmt packets to
58 * @status_addr: bus addr register to write line status to
59 * @fifo_addr: bus addr region to write serial output to
60 * @fifo_len: max length for single write to fifo_addr
61 * @list: link for insertion into fw_serial's peer_list
62 * @rcu: for deferring peer reclamation
63 * @lock: spinlock to synchonize changes to state & port fields
64 * @work: only one work item can be queued at any one time
65 * Note: pending work is canceled prior to removal, so this
66 * peer is valid for at least the lifetime of the work function
67 * @work_params: parameter block for work functions
68 * @timer: timer for resetting peer state if remote request times out
69 * @state: current state
70 * @connect: work item for auto-connecting
71 * @connect_retries: # of connections already attempted
72 * @port: associated tty_port (usable if state == FWSC_ATTACHED)
73 */
74struct fwtty_peer {
75 struct fw_unit *unit;
76 struct fw_serial *serial;
77 u64 guid;
78 int generation;
79 int node_id;
80 unsigned speed;
81 int max_payload;
82 u64 mgmt_addr;
83
84 /* these are usable only if state == FWSC_ATTACHED */
85 u64 status_addr;
86 u64 fifo_addr;
87 int fifo_len;
88
89 struct list_head list;
90 struct rcu_head rcu;
91
92 spinlock_t lock;
93 struct work_struct work;
94 struct peer_work_params work_params;
95 struct timer_list timer;
96 int state;
97 struct delayed_work connect;
98 int connect_retries;
99
100 struct fwtty_port *port;
101};
102
103#define to_peer(ptr, field) (container_of(ptr, struct fwtty_peer, field))
104
105/* state values for fwtty_peer.state field */
106enum fwtty_peer_state {
107 FWPS_GONE,
108 FWPS_NOT_ATTACHED,
109 FWPS_ATTACHED,
110 FWPS_PLUG_PENDING,
111 FWPS_PLUG_RESPONDING,
112 FWPS_UNPLUG_PENDING,
113 FWPS_UNPLUG_RESPONDING,
114
115 FWPS_NO_MGMT_ADDR = -1,
116};
117
118#define CONNECT_RETRY_DELAY HZ
119#define MAX_CONNECT_RETRIES 10
120
121/* must be holding peer lock for these state funclets */
122static inline void peer_set_state(struct fwtty_peer *peer, int new)
123{
124 peer->state = new;
125}
126
127static inline struct fwtty_port *peer_revert_state(struct fwtty_peer *peer)
128{
129 struct fwtty_port *port = peer->port;
130
131 peer->port = NULL;
132 peer_set_state(peer, FWPS_NOT_ATTACHED);
133 return port;
134}
135
136struct fwserial_mgmt_pkt {
137 struct {
138 __be16 len;
139 __be16 code;
140 } hdr;
141 union {
142 struct virt_plug_params plug_req;
143 struct virt_plug_params plug_rsp;
144 };
145} __packed;
146
147/* fwserial_mgmt_packet codes */
148#define FWSC_RSP_OK 0x0000
149#define FWSC_RSP_NACK 0x8000
150#define FWSC_CODE_MASK 0x0fff
151
152#define FWSC_VIRT_CABLE_PLUG 1
153#define FWSC_VIRT_CABLE_UNPLUG 2
154#define FWSC_VIRT_CABLE_PLUG_RSP 3
155#define FWSC_VIRT_CABLE_UNPLUG_RSP 4
156
157/* 1 min. plug timeout -- suitable for userland authorization */
158#define VIRT_CABLE_PLUG_TIMEOUT (60 * HZ)
159
160struct stats {
161 unsigned xchars;
162 unsigned dropped;
163 unsigned tx_stall;
164 unsigned fifo_errs;
165 unsigned sent;
166 unsigned lost;
167 unsigned throttled;
168 unsigned watermark;
169 unsigned reads[DISTRIBUTION_MAX_INDEX + 1];
170 unsigned writes[DISTRIBUTION_MAX_INDEX + 1];
171 unsigned txns[DISTRIBUTION_MAX_INDEX + 1];
172 unsigned unthrottle[DISTRIBUTION_MAX_INDEX + 1];
173};
174
175struct fwconsole_ops {
176 void (*notify)(int code, void *data);
177 void (*stats)(struct stats *stats, void *data);
178 void (*proc_show)(struct seq_file *m, void *data);
179};
180
181/* codes for console ops notify */
182#define FWCON_NOTIFY_ATTACH 1
183#define FWCON_NOTIFY_DETACH 2
184
185struct buffered_rx {
186 struct list_head list;
187 size_t n;
188 unsigned char data[0];
189};
190
191/**
192 * fwtty_port: structure used to track/represent underlying tty_port
193 * @port: underlying tty_port
194 * @device: tty device
195 * @index: index into port_table for this particular port
196 * note: minor = index + FWSERIAL_TTY_START_MINOR
197 * @serial: back pointer to the containing fw_serial
198 * @rx_handler: bus address handler for unique addr region used by remotes
199 * to communicate with this port. Every port uses
200 * fwtty_port_handler() for per port transactions.
201 * @fwcon_ops: ops for attached fw_console (if any)
202 * @con_data: private data for fw_console
203 * @wait_tx: waitqueue for sleeping until writer/drain completes tx
204 * @emit_breaks: delayed work responsible for generating breaks when the
205 * break line status is active
206 * @cps : characters per second computed from the termios settings
207 * @break_last: timestamp in jiffies from last emit_breaks
208 * @hangup: work responsible for HUPing when carrier is dropped/lost
209 * @mstatus: loose virtualization of LSR/MSR
210 * bits 15..0 correspond to TIOCM_* bits
211 * bits 19..16 reserved for mctrl
212 * bit 20 OOB_TX_THROTTLE
213 * bits 23..21 reserved
214 * bits 31..24 correspond to UART_LSR_* bits
215 * @lock: spinlock for protecting concurrent access to fields below it
216 * @mctrl: loose virtualization of MCR
217 * bits 15..0 correspond to TIOCM_* bits
218 * bit 16 OOB_RX_THROTTLE
219 * bits 19..17 reserved
220 * bits 31..20 reserved for mstatus
221 * @drain: delayed work scheduled to ensure that writes are flushed.
222 * The work can race with the writer but concurrent sending is
223 * prevented with the IN_TX flag. Scheduled under lock to
224 * limit scheduling when fifo has just been drained.
225 * @push: work responsible for pushing buffered rx to the ldisc.
226 * rx can become buffered if the tty buffer is filled before the
227 * ldisc throttles the sender.
228 * @buf_list: list of buffered rx yet to be sent to ldisc
229 * @buffered: byte count of buffered rx
230 * @tx_fifo: fifo used to store & block-up writes for dma to remote
231 * @max_payload: max bytes transmissable per dma (based on peer's max_payload)
232 * @status_mask: UART_LSR_* bitmask significant to rx (based on termios)
233 * @ignore_mask: UART_LSR_* bitmask of states to ignore (also based on termios)
234 * @break_ctl: if set, port is 'sending break' to remote
235 * @write_only: self-explanatory
236 * @overrun: previous rx was lost (partially or completely)
237 * @loopback: if set, port is in loopback mode
238 * @flags: atomic bit flags
239 * bit 0: IN_TX - gate to allow only one cpu to send from the dma fifo
240 * at a time.
241 * bit 1: STOP_TX - force tx to exit while sending
242 * @peer: rcu-pointer to associated fwtty_peer (if attached)
243 * NULL if no peer attached
244 * @icount: predefined statistics reported by the TIOCGICOUNT ioctl
245 * @stats: additional statistics reported in /proc/tty/driver/firewire_serial
246 */
247struct fwtty_port {
248 struct tty_port port;
249 struct device *device;
250 unsigned index;
251 struct fw_serial *serial;
252 struct fw_address_handler rx_handler;
253
254 struct fwconsole_ops *fwcon_ops;
255 void *con_data;
256
257 wait_queue_head_t wait_tx;
258 struct delayed_work emit_breaks;
259 unsigned cps;
260 unsigned long break_last;
261
262 struct work_struct hangup;
263
264 unsigned mstatus;
265
266 spinlock_t lock;
267 unsigned mctrl;
268 struct delayed_work drain;
269 struct work_struct push;
270 struct list_head buf_list;
271 int buffered;
272 struct dma_fifo tx_fifo;
273 int max_payload;
274 unsigned status_mask;
275 unsigned ignore_mask;
276 unsigned break_ctl:1,
277 write_only:1,
278 overrun:1,
279 loopback:1;
280 unsigned long flags;
281
282 struct fwtty_peer *peer;
283
284 struct async_icount icount;
285 struct stats stats;
286};
287
288#define to_port(ptr, field) (container_of(ptr, struct fwtty_port, field))
289
290/* bit #s for flags field */
291#define IN_TX 0
292#define STOP_TX 1
293#define BUFFERING_RX 2
294
295/* bitmasks for special mctrl/mstatus bits */
296#define OOB_RX_THROTTLE 0x00010000
297#define MCTRL_RSRVD 0x000e0000
298#define OOB_TX_THROTTLE 0x00100000
299#define MSTATUS_RSRVD 0x00e00000
300
301#define MCTRL_MASK (TIOCM_DTR | TIOCM_RTS | TIOCM_OUT1 | TIOCM_OUT2 | \
302 TIOCM_LOOP | OOB_RX_THROTTLE | MCTRL_RSRVD)
303
304/* XXX even every 1/50th secs. may be unnecessarily accurate */
305/* delay in jiffies between brk emits */
306#define FREQ_BREAKS (HZ / 50)
307
308/* Ports are allocated in blocks of num_ports for each fw_card */
309#define MAX_CARD_PORTS 32 /* max # of ports per card */
310#define MAX_TOTAL_PORTS 64 /* max # of ports total */
311
312/* tuning parameters */
313#define FWTTY_PORT_TXFIFO_LEN 4096
314#define FWTTY_PORT_MAX_PEND_DMA 8 /* costs a cache line per pend */
315#define DRAIN_THRESHOLD 1024
316#define MAX_ASYNC_PAYLOAD 4096 /* ohci-defined limit */
317#define WRITER_MINIMUM 128
318/* TODO: how to set watermark to AR context size? see fwtty_rx() */
319#define HIGH_WATERMARK 32768 /* AR context is 32K */
320
321/*
322 * Size of bus addr region above 4GB used per port as the recv addr
323 * - must be at least as big as the MAX_ASYNC_PAYLOAD
324 */
325#define FWTTY_PORT_RXFIFO_LEN MAX_ASYNC_PAYLOAD
326
327/**
328 * fw_serial: aggregate used to associate tty ports with specific fw_card
329 * @card: fw_card associated with this fw_serial device (1:1 association)
330 * @kref: reference-counted multi-port management allows delayed destroy
331 * @self: local unit device as 'peer'. Not valid until local unit device
332 * is enumerated.
333 * @list: link for insertion into fwserial_list
334 * @peer_list: list of local & remote unit devices attached to this card
335 * @ports: fixed array of tty_ports provided by this serial device
336 */
337struct fw_serial {
338 struct fw_card *card;
339 struct kref kref;
340
341 struct fwtty_peer *self;
342
343 struct list_head list;
344 struct list_head peer_list;
345
346 struct fwtty_port *ports[MAX_CARD_PORTS];
347};
348
349#define to_serial(ptr, field) (container_of(ptr, struct fw_serial, field))
350
351#define TTY_DEV_NAME "fwtty" /* ttyFW was taken */
352static const char tty_dev_name[] = TTY_DEV_NAME;
353static const char loop_dev_name[] = "fwloop";
354extern bool limit_bw;
355
356struct tty_driver *fwtty_driver;
357
358#define driver_err(s, v...) pr_err(KBUILD_MODNAME ": " s, ##v)
359
360struct fwtty_port *fwtty_port_get(unsigned index);
361void fwtty_port_put(struct fwtty_port *port);
362
363static inline void fwtty_bind_console(struct fwtty_port *port,
364 struct fwconsole_ops *fwcon_ops,
365 void *data)
366{
367 port->con_data = data;
368 port->fwcon_ops = fwcon_ops;
369}
370
371/*
372 * Returns the max send async payload size in bytes based on the unit device
373 * link speed - if set to limit bandwidth to max 20%, use lookup table
374 */
375static inline int link_speed_to_max_payload(unsigned speed)
376{
377 static const int max_async[] = { 307, 614, 1229, 2458, 4916, 9832, };
378 BUILD_BUG_ON(ARRAY_SIZE(max_async) - 1 != SCODE_3200);
379
380 speed = clamp(speed, (unsigned) SCODE_100, (unsigned) SCODE_3200);
381 if (limit_bw)
382 return max_async[speed];
383 else
384 return 1 << (speed + 9);
385}
386
387#endif /* _FIREWIRE_FWSERIAL_H */
diff --git a/drivers/staging/gdm72xx/gdm_qos.c b/drivers/staging/gdm72xx/gdm_qos.c
index e26c6a8b2627..1e6303123722 100644
--- a/drivers/staging/gdm72xx/gdm_qos.c
+++ b/drivers/staging/gdm72xx/gdm_qos.c
@@ -11,6 +11,8 @@
11 * GNU General Public License for more details. 11 * GNU General Public License for more details.
12 */ 12 */
13 13
14#define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
15
14#include <linux/etherdevice.h> 16#include <linux/etherdevice.h>
15#include <asm/byteorder.h> 17#include <asm/byteorder.h>
16 18
@@ -24,15 +26,6 @@
24 26
25#define B2H(x) __be16_to_cpu(x) 27#define B2H(x) __be16_to_cpu(x)
26 28
27#undef dprintk
28#define dprintk(fmt, args ...) printk(KERN_DEBUG "[QoS] " fmt, ## args)
29#undef wprintk
30#define wprintk(fmt, args ...) \
31 printk(KERN_WARNING "[QoS WARNING] " fmt, ## args)
32#undef eprintk
33#define eprintk(fmt, args ...) printk(KERN_ERR "[QoS ERROR] " fmt, ## args)
34
35
36#define MAX_FREE_LIST_CNT 32 29#define MAX_FREE_LIST_CNT 32
37static struct { 30static struct {
38 struct list_head head; 31 struct list_head head;
@@ -95,7 +88,7 @@ static void free_qos_entry_list(struct list_head *free_list)
95 total_free++; 88 total_free++;
96 } 89 }
97 90
98 dprintk("%s: total_free_cnt=%d\n", __func__, total_free); 91 pr_debug("%s: total_free_cnt=%d\n", __func__, total_free);
99} 92}
100 93
101void gdm_qos_init(void *nic_ptr) 94void gdm_qos_init(void *nic_ptr)
@@ -240,7 +233,9 @@ static u32 extract_qos_list(struct nic *nic, struct list_head *head)
240 qcb->csr[i].qos_buf_count++; 233 qcb->csr[i].qos_buf_count++;
241 234
242 if (!list_empty(&qcb->qos_list[i])) 235 if (!list_empty(&qcb->qos_list[i]))
243 wprintk("QoS Index(%d) is piled!!\n", i); 236 netdev_warn(nic->netdev,
237 "Index(%d) is piled!!\n",
238 i);
244 } 239 }
245 } 240 }
246 } 241 }
@@ -280,7 +275,8 @@ int gdm_qos_send_hci_pkt(struct sk_buff *skb, struct net_device *dev)
280 entry = alloc_qos_entry(); 275 entry = alloc_qos_entry();
281 entry->skb = skb; 276 entry->skb = skb;
282 entry->dev = dev; 277 entry->dev = dev;
283 dprintk("qcb->qos_list_cnt=%d\n", qcb->qos_list_cnt); 278 netdev_dbg(dev, "qcb->qos_list_cnt=%d\n",
279 qcb->qos_list_cnt);
284 } 280 }
285 281
286 spin_lock_irqsave(&qcb->qos_lock, flags); 282 spin_lock_irqsave(&qcb->qos_lock, flags);
@@ -362,7 +358,7 @@ void gdm_recv_qos_hci_packet(void *nic_ptr, u8 *buf, int size)
362 index = get_csr(qcb, SFID, 0); 358 index = get_csr(qcb, SFID, 0);
363 if (index == -1) { 359 if (index == -1) {
364 spin_unlock_irqrestore(&qcb->qos_lock, flags); 360 spin_unlock_irqrestore(&qcb->qos_lock, flags);
365 eprintk("QoS ERROR: No SF\n"); 361 netdev_err(nic->netdev, "QoS ERROR: No SF\n");
366 return; 362 return;
367 } 363 }
368 qcb->csr[index].qos_buf_count = buf[(i*5)+10]; 364 qcb->csr[index].qos_buf_count = buf[(i*5)+10];
@@ -383,11 +379,12 @@ void gdm_recv_qos_hci_packet(void *nic_ptr, u8 *buf, int size)
383 379
384 index = get_csr(qcb, SFID, 1); 380 index = get_csr(qcb, SFID, 1);
385 if (index == -1) { 381 if (index == -1) {
386 eprintk("QoS ERROR: csr Update Error\n"); 382 netdev_err(nic->netdev, "QoS ERROR: csr Update Error\n");
387 return; 383 return;
388 } 384 }
389 385
390 dprintk("QOS_ADD SFID = 0x%x, index=%d\n", SFID, index); 386 netdev_dbg(nic->netdev, "QOS_ADD SFID = 0x%x, index=%d\n",
387 SFID, index);
391 388
392 spin_lock_irqsave(&qcb->qos_lock, flags); 389 spin_lock_irqsave(&qcb->qos_lock, flags);
393 qcb->csr[index].SFID = SFID; 390 qcb->csr[index].SFID = SFID;
@@ -435,11 +432,13 @@ void gdm_recv_qos_hci_packet(void *nic_ptr, u8 *buf, int size)
435 SFID += (buf[pos++]); 432 SFID += (buf[pos++]);
436 index = get_csr(qcb, SFID, 1); 433 index = get_csr(qcb, SFID, 1);
437 if (index == -1) { 434 if (index == -1) {
438 eprintk("QoS ERROR: Wrong index(%d)\n", index); 435 netdev_err(nic->netdev, "QoS ERROR: Wrong index(%d)\n",
436 index);
439 return; 437 return;
440 } 438 }
441 439
442 dprintk("QOS_CHANGE_DEL SFID = 0x%x, index=%d\n", SFID, index); 440 netdev_dbg(nic->netdev, "QOS_CHANGE_DEL SFID = 0x%x, index=%d\n",
441 SFID, index);
443 442
444 INIT_LIST_HEAD(&free_list); 443 INIT_LIST_HEAD(&free_list);
445 444
diff --git a/drivers/staging/gdm72xx/gdm_sdio.c b/drivers/staging/gdm72xx/gdm_sdio.c
index ca38d719a1f8..8b8ed981d102 100644
--- a/drivers/staging/gdm72xx/gdm_sdio.c
+++ b/drivers/staging/gdm72xx/gdm_sdio.c
@@ -157,7 +157,7 @@ static int init_sdio(struct sdiowm_dev *sdev)
157 157
158 tx->sdu_buf = kmalloc(SDU_TX_BUF_SIZE, GFP_KERNEL); 158 tx->sdu_buf = kmalloc(SDU_TX_BUF_SIZE, GFP_KERNEL);
159 if (tx->sdu_buf == NULL) { 159 if (tx->sdu_buf == NULL) {
160 printk(KERN_ERR "Failed to allocate SDU tx buffer.\n"); 160 dev_err(&sdev->func->dev, "Failed to allocate SDU tx buffer.\n");
161 goto fail; 161 goto fail;
162 } 162 }
163 163
@@ -186,7 +186,7 @@ static int init_sdio(struct sdiowm_dev *sdev)
186 186
187 rx->rx_buf = kmalloc(RX_BUF_SIZE, GFP_KERNEL); 187 rx->rx_buf = kmalloc(RX_BUF_SIZE, GFP_KERNEL);
188 if (rx->rx_buf == NULL) { 188 if (rx->rx_buf == NULL) {
189 printk(KERN_ERR "Failed to allocate rx buffer.\n"); 189 dev_err(&sdev->func->dev, "Failed to allocate rx buffer.\n");
190 goto fail; 190 goto fail;
191 } 191 }
192 192
@@ -246,7 +246,8 @@ static void send_sdio_pkt(struct sdio_func *func, u8 *data, int len)
246 ret = sdio_memcpy_toio(func, 0, data, n); 246 ret = sdio_memcpy_toio(func, 0, data, n);
247 if (ret < 0) { 247 if (ret < 0) {
248 if (ret != -ENOMEDIUM) 248 if (ret != -ENOMEDIUM)
249 printk(KERN_ERR "gdmwms: %s error: ret = %d\n", 249 dev_err(&func->dev,
250 "gdmwms: %s error: ret = %d\n",
250 __func__, ret); 251 __func__, ret);
251 goto end_io; 252 goto end_io;
252 } 253 }
@@ -259,7 +260,8 @@ static void send_sdio_pkt(struct sdio_func *func, u8 *data, int len)
259 ret = sdio_memcpy_toio(func, 0, data + n, remain); 260 ret = sdio_memcpy_toio(func, 0, data + n, remain);
260 if (ret < 0) { 261 if (ret < 0) {
261 if (ret != -ENOMEDIUM) 262 if (ret != -ENOMEDIUM)
262 printk(KERN_ERR "gdmwms: %s error: ret = %d\n", 263 dev_err(&func->dev,
264 "gdmwms: %s error: ret = %d\n",
263 __func__, ret); 265 __func__, ret);
264 goto end_io; 266 goto end_io;
265 } 267 }
@@ -522,13 +524,14 @@ static void gdm_sdio_irq(struct sdio_func *func)
522 524
523 ret = sdio_memcpy_fromio(func, hdr, 0x0, TYPE_A_LOOKAHEAD_SIZE); 525 ret = sdio_memcpy_fromio(func, hdr, 0x0, TYPE_A_LOOKAHEAD_SIZE);
524 if (ret) { 526 if (ret) {
525 printk(KERN_ERR "Cannot read from function %d\n", func->num); 527 dev_err(&func->dev,
528 "Cannot read from function %d\n", func->num);
526 goto done; 529 goto done;
527 } 530 }
528 531
529 len = (hdr[2] << 16) | (hdr[1] << 8) | hdr[0]; 532 len = (hdr[2] << 16) | (hdr[1] << 8) | hdr[0];
530 if (len > (RX_BUF_SIZE - TYPE_A_HEADER_SIZE)) { 533 if (len > (RX_BUF_SIZE - TYPE_A_HEADER_SIZE)) {
531 printk(KERN_ERR "Too big Type-A size: %d\n", len); 534 dev_err(&func->dev, "Too big Type-A size: %d\n", len);
532 goto done; 535 goto done;
533 } 536 }
534 537
@@ -562,8 +565,8 @@ static void gdm_sdio_irq(struct sdio_func *func)
562 n = blocks * func->cur_blksize; 565 n = blocks * func->cur_blksize;
563 ret = sdio_memcpy_fromio(func, buf, 0x0, n); 566 ret = sdio_memcpy_fromio(func, buf, 0x0, n);
564 if (ret) { 567 if (ret) {
565 printk(KERN_ERR "Cannot read from function %d\n", 568 dev_err(&func->dev,
566 func->num); 569 "Cannot read from function %d\n", func->num);
567 goto done; 570 goto done;
568 } 571 }
569 buf += n; 572 buf += n;
@@ -573,8 +576,8 @@ static void gdm_sdio_irq(struct sdio_func *func)
573 if (remain) { 576 if (remain) {
574 ret = sdio_memcpy_fromio(func, buf, 0x0, remain); 577 ret = sdio_memcpy_fromio(func, buf, 0x0, remain);
575 if (ret) { 578 if (ret) {
576 printk(KERN_ERR "Cannot read from function %d\n", 579 dev_err(&func->dev,
577 func->num); 580 "Cannot read from function %d\n", func->num);
578 goto done; 581 goto done;
579 } 582 }
580 } 583 }
@@ -637,9 +640,9 @@ static int sdio_wimax_probe(struct sdio_func *func,
637 struct phy_dev *phy_dev = NULL; 640 struct phy_dev *phy_dev = NULL;
638 struct sdiowm_dev *sdev = NULL; 641 struct sdiowm_dev *sdev = NULL;
639 642
640 printk(KERN_INFO "Found GDM SDIO VID = 0x%04x PID = 0x%04x...\n", 643 dev_info(&func->dev, "Found GDM SDIO VID = 0x%04x PID = 0x%04x...\n",
641 func->vendor, func->device); 644 func->vendor, func->device);
642 printk(KERN_INFO "GCT WiMax driver version %s\n", DRIVER_VERSION); 645 dev_info(&func->dev, "GCT WiMax driver version %s\n", DRIVER_VERSION);
643 646
644 sdio_claim_host(func); 647 sdio_claim_host(func);
645 sdio_enable_func(func); 648 sdio_enable_func(func);
diff --git a/drivers/staging/gdm72xx/gdm_usb.c b/drivers/staging/gdm72xx/gdm_usb.c
index 0c9e8958009b..bce6104bbab8 100644
--- a/drivers/staging/gdm72xx/gdm_usb.c
+++ b/drivers/staging/gdm72xx/gdm_usb.c
@@ -186,6 +186,7 @@ static int init_usb(struct usbwm_dev *udev)
186 struct rx_cxt *rx = &udev->rx; 186 struct rx_cxt *rx = &udev->rx;
187 struct usb_tx *t; 187 struct usb_tx *t;
188 struct usb_rx *r; 188 struct usb_rx *r;
189 unsigned long flags;
189 190
190 INIT_LIST_HEAD(&tx->free_list); 191 INIT_LIST_HEAD(&tx->free_list);
191 INIT_LIST_HEAD(&tx->sdu_list); 192 INIT_LIST_HEAD(&tx->sdu_list);
@@ -200,14 +201,17 @@ static int init_usb(struct usbwm_dev *udev)
200 spin_lock_init(&tx->lock); 201 spin_lock_init(&tx->lock);
201 spin_lock_init(&rx->lock); 202 spin_lock_init(&rx->lock);
202 203
204 spin_lock_irqsave(&tx->lock, flags);
203 for (i = 0; i < MAX_NR_SDU_BUF; i++) { 205 for (i = 0; i < MAX_NR_SDU_BUF; i++) {
204 t = alloc_tx_struct(tx); 206 t = alloc_tx_struct(tx);
205 if (t == NULL) { 207 if (t == NULL) {
208 spin_unlock_irqrestore(&tx->lock, flags);
206 ret = -ENOMEM; 209 ret = -ENOMEM;
207 goto fail; 210 goto fail;
208 } 211 }
209 list_add(&t->list, &tx->free_list); 212 list_add(&t->list, &tx->free_list);
210 } 213 }
214 spin_unlock_irqrestore(&tx->lock, flags);
211 215
212 r = alloc_rx_struct(rx); 216 r = alloc_rx_struct(rx);
213 if (r == NULL) { 217 if (r == NULL) {
@@ -215,7 +219,9 @@ static int init_usb(struct usbwm_dev *udev)
215 goto fail; 219 goto fail;
216 } 220 }
217 221
222 spin_lock_irqsave(&rx->lock, flags);
218 list_add(&r->list, &rx->free_list); 223 list_add(&r->list, &rx->free_list);
224 spin_unlock_irqrestore(&rx->lock, flags);
219 return ret; 225 return ret;
220 226
221fail: 227fail:
@@ -229,6 +235,9 @@ static void release_usb(struct usbwm_dev *udev)
229 struct rx_cxt *rx = &udev->rx; 235 struct rx_cxt *rx = &udev->rx;
230 struct usb_tx *t, *t_next; 236 struct usb_tx *t, *t_next;
231 struct usb_rx *r, *r_next; 237 struct usb_rx *r, *r_next;
238 unsigned long flags;
239
240 spin_lock_irqsave(&tx->lock, flags);
232 241
233 list_for_each_entry_safe(t, t_next, &tx->sdu_list, list) { 242 list_for_each_entry_safe(t, t_next, &tx->sdu_list, list) {
234 list_del(&t->list); 243 list_del(&t->list);
@@ -245,6 +254,10 @@ static void release_usb(struct usbwm_dev *udev)
245 free_tx_struct(t); 254 free_tx_struct(t);
246 } 255 }
247 256
257 spin_unlock_irqrestore(&tx->lock, flags);
258
259 spin_lock_irqsave(&rx->lock, flags);
260
248 list_for_each_entry_safe(r, r_next, &rx->free_list, list) { 261 list_for_each_entry_safe(r, r_next, &rx->free_list, list) {
249 list_del(&r->list); 262 list_del(&r->list);
250 free_rx_struct(r); 263 free_rx_struct(r);
@@ -254,6 +267,8 @@ static void release_usb(struct usbwm_dev *udev)
254 list_del(&r->list); 267 list_del(&r->list);
255 free_rx_struct(r); 268 free_rx_struct(r);
256 } 269 }
270
271 spin_unlock_irqrestore(&rx->lock, flags);
257} 272}
258 273
259static void __gdm_usb_send_complete(struct urb *urb) 274static void __gdm_usb_send_complete(struct urb *urb)
@@ -303,9 +318,12 @@ static int gdm_usb_send(void *priv_dev, void *data, int len,
303 u8 *pkt = data; 318 u8 *pkt = data;
304 u16 cmd_evt; 319 u16 cmd_evt;
305 unsigned long flags; 320 unsigned long flags;
321#ifdef CONFIG_WIMAX_GDM72XX_K_MODE
322 unsigned long flags2;
323#endif /* CONFIG_WIMAX_GDM72XX_K_MODE */
306 324
307 if (!udev->usbdev) { 325 if (!udev->usbdev) {
308 printk(KERN_ERR "%s: No such device\n", __func__); 326 dev_err(&usbdev->dev, "%s: No such device\n", __func__);
309 return -ENODEV; 327 return -ENODEV;
310 } 328 }
311 329
@@ -371,13 +389,16 @@ static int gdm_usb_send(void *priv_dev, void *data, int len,
371 389
372 rx = &udev->rx; 390 rx = &udev->rx;
373 391
392 spin_lock_irqsave(&rx->lock, flags2);
374 list_for_each_entry(r, &rx->used_list, list) 393 list_for_each_entry(r, &rx->used_list, list)
375 usb_unlink_urb(r->urb); 394 usb_unlink_urb(r->urb);
395 spin_unlock_irqrestore(&rx->lock, flags2);
396
376 udev->bw_switch = 1; 397 udev->bw_switch = 1;
377 398
378 spin_lock(&k_lock); 399 spin_lock_irqsave(&k_lock, flags2);
379 list_add_tail(&udev->list, &k_list); 400 list_add_tail(&udev->list, &k_list);
380 spin_unlock(&k_lock); 401 spin_unlock_irqrestore(&k_lock, flags2);
381 402
382 wake_up(&k_wait); 403 wake_up(&k_wait);
383 } 404 }
@@ -416,7 +437,7 @@ static void gdm_usb_rcv_complete(struct urb *urb)
416 struct tx_cxt *tx = &udev->tx; 437 struct tx_cxt *tx = &udev->tx;
417 struct usb_tx *t; 438 struct usb_tx *t;
418 u16 cmd_evt; 439 u16 cmd_evt;
419 unsigned long flags; 440 unsigned long flags, flags2;
420 441
421#ifdef CONFIG_WIMAX_GDM72XX_USB_PM 442#ifdef CONFIG_WIMAX_GDM72XX_USB_PM
422 struct usb_device *dev = urb->dev; 443 struct usb_device *dev = urb->dev;
@@ -462,9 +483,9 @@ static void gdm_usb_rcv_complete(struct urb *urb)
462 if (!urb->status && r->callback) 483 if (!urb->status && r->callback)
463 r->callback(r->cb_data, r->buf, urb->actual_length); 484 r->callback(r->cb_data, r->buf, urb->actual_length);
464 485
465 spin_lock(&rx->lock); 486 spin_lock_irqsave(&rx->lock, flags2);
466 put_rx_struct(rx, r); 487 put_rx_struct(rx, r);
467 spin_unlock(&rx->lock); 488 spin_unlock_irqrestore(&rx->lock, flags2);
468 489
469 spin_unlock_irqrestore(&tx->lock, flags); 490 spin_unlock_irqrestore(&tx->lock, flags);
470 491
@@ -484,7 +505,7 @@ static int gdm_usb_receive(void *priv_dev,
484 unsigned long flags; 505 unsigned long flags;
485 506
486 if (!udev->usbdev) { 507 if (!udev->usbdev) {
487 printk(KERN_ERR "%s: No such device\n", __func__); 508 dev_err(&usbdev->dev, "%s: No such device\n", __func__);
488 return -ENODEV; 509 return -ENODEV;
489 } 510 }
490 511
@@ -559,9 +580,9 @@ static int gdm_usb_probe(struct usb_interface *intf,
559 idProduct = L2H(usbdev->descriptor.idProduct); 580 idProduct = L2H(usbdev->descriptor.idProduct);
560 bcdDevice = L2H(usbdev->descriptor.bcdDevice); 581 bcdDevice = L2H(usbdev->descriptor.bcdDevice);
561 582
562 printk(KERN_INFO "Found GDM USB VID = 0x%04x PID = 0x%04x...\n", 583 dev_info(&intf->dev, "Found GDM USB VID = 0x%04x PID = 0x%04x...\n",
563 idVendor, idProduct); 584 idVendor, idProduct);
564 printk(KERN_INFO "GCT WiMax driver version %s\n", DRIVER_VERSION); 585 dev_info(&intf->dev, "GCT WiMax driver version %s\n", DRIVER_VERSION);
565 586
566 587
567 if (idProduct == EMERGENCY_PID) { 588 if (idProduct == EMERGENCY_PID) {
@@ -619,8 +640,9 @@ out:
619 if (ret) { 640 if (ret) {
620 kfree(phy_dev); 641 kfree(phy_dev);
621 kfree(udev); 642 kfree(udev);
643 } else {
644 usb_set_intfdata(intf, phy_dev);
622 } 645 }
623 usb_set_intfdata(intf, phy_dev);
624 return ret; 646 return ret;
625} 647}
626 648
@@ -660,14 +682,22 @@ static int gdm_suspend(struct usb_interface *intf, pm_message_t pm_msg)
660 struct usbwm_dev *udev; 682 struct usbwm_dev *udev;
661 struct rx_cxt *rx; 683 struct rx_cxt *rx;
662 struct usb_rx *r; 684 struct usb_rx *r;
685 unsigned long flags;
663 686
664 phy_dev = usb_get_intfdata(intf); 687 phy_dev = usb_get_intfdata(intf);
688 if (!phy_dev)
689 return 0;
690
665 udev = phy_dev->priv_dev; 691 udev = phy_dev->priv_dev;
666 rx = &udev->rx; 692 rx = &udev->rx;
667 693
694 spin_lock_irqsave(&rx->lock, flags);
695
668 list_for_each_entry(r, &rx->used_list, list) 696 list_for_each_entry(r, &rx->used_list, list)
669 usb_unlink_urb(r->urb); 697 usb_unlink_urb(r->urb);
670 698
699 spin_unlock_irqrestore(&rx->lock, flags);
700
671 return 0; 701 return 0;
672} 702}
673 703
@@ -677,14 +707,22 @@ static int gdm_resume(struct usb_interface *intf)
677 struct usbwm_dev *udev; 707 struct usbwm_dev *udev;
678 struct rx_cxt *rx; 708 struct rx_cxt *rx;
679 struct usb_rx *r; 709 struct usb_rx *r;
710 unsigned long flags;
680 711
681 phy_dev = usb_get_intfdata(intf); 712 phy_dev = usb_get_intfdata(intf);
713 if (!phy_dev)
714 return 0;
715
682 udev = phy_dev->priv_dev; 716 udev = phy_dev->priv_dev;
683 rx = &udev->rx; 717 rx = &udev->rx;
684 718
719 spin_lock_irqsave(&rx->lock, flags);
720
685 list_for_each_entry(r, &rx->used_list, list) 721 list_for_each_entry(r, &rx->used_list, list)
686 usb_submit_urb(r->urb, GFP_ATOMIC); 722 usb_submit_urb(r->urb, GFP_ATOMIC);
687 723
724 spin_unlock_irqrestore(&rx->lock, flags);
725
688 return 0; 726 return 0;
689} 727}
690 728
@@ -719,9 +757,13 @@ static int k_mode_thread(void *arg)
719 while (jiffies < expire) 757 while (jiffies < expire)
720 schedule_timeout(K_WAIT_TIME); 758 schedule_timeout(K_WAIT_TIME);
721 759
760 spin_lock_irqsave(&rx->lock, flags);
761
722 list_for_each_entry(r, &rx->used_list, list) 762 list_for_each_entry(r, &rx->used_list, list)
723 usb_submit_urb(r->urb, GFP_ATOMIC); 763 usb_submit_urb(r->urb, GFP_ATOMIC);
724 764
765 spin_unlock_irqrestore(&rx->lock, flags);
766
725 spin_lock_irqsave(&tx->lock, flags); 767 spin_lock_irqsave(&tx->lock, flags);
726 768
727 list_for_each_entry_safe(t, temp, &tx->pending_list, 769 list_for_each_entry_safe(t, temp, &tx->pending_list,
diff --git a/drivers/staging/gdm72xx/gdm_wimax.c b/drivers/staging/gdm72xx/gdm_wimax.c
index 6cb810701a3e..41efbeeb62f1 100644
--- a/drivers/staging/gdm72xx/gdm_wimax.c
+++ b/drivers/staging/gdm72xx/gdm_wimax.c
@@ -11,6 +11,8 @@
11 * GNU General Public License for more details. 11 * GNU General Public License for more details.
12 */ 12 */
13 13
14#define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
15
14#include <linux/etherdevice.h> 16#include <linux/etherdevice.h>
15#include <asm/byteorder.h> 17#include <asm/byteorder.h>
16#include <linux/ip.h> 18#include <linux/ip.h>
@@ -166,21 +168,13 @@ static void dump_eth_packet(const char *title, u8 *data, int len)
166 get_ip_protocol_name(ip_protocol), 168 get_ip_protocol_name(ip_protocol),
167 get_port_name(port)); 169 get_port_name(port));
168 170
169 #if 1
170 if (!(data[0] == 0xff && data[1] == 0xff)) { 171 if (!(data[0] == 0xff && data[1] == 0xff)) {
171 if (protocol == ETH_P_IP) { 172 if (protocol == ETH_P_IP) {
172 printk(KERN_DEBUG " src=%u.%u.%u.%u\n", 173 printk(KERN_DEBUG " src=%pI4\n", &ih->saddr);
173 NIPQUAD(ih->saddr));
174 } else if (protocol == ETH_P_IPV6) { 174 } else if (protocol == ETH_P_IPV6) {
175 #ifdef NIP6
176 printk(KERN_DEBUG " src=%x:%x:%x:%x:%x:%x:%x:%x\n",
177 NIP6(ih->saddr));
178 #else
179 printk(KERN_DEBUG " src=%pI6\n", &ih->saddr); 175 printk(KERN_DEBUG " src=%pI6\n", &ih->saddr);
180 #endif
181 } 176 }
182 } 177 }
183 #endif
184 178
185 #if (DUMP_PACKET & DUMP_SDU_ALL) 179 #if (DUMP_PACKET & DUMP_SDU_ALL)
186 printk_hex(data, len); 180 printk_hex(data, len);
@@ -271,7 +265,7 @@ static int gdm_wimax_event_init(void)
271 return 0; 265 return 0;
272 } 266 }
273 267
274 printk(KERN_ERR "Creating WiMax Event netlink is failed\n"); 268 pr_err("Creating WiMax Event netlink is failed\n");
275 return -1; 269 return -1;
276} 270}
277 271
@@ -367,7 +361,7 @@ static int gdm_wimax_event_send(struct net_device *dev, char *buf, int size)
367 361
368 e = get_event_entry(); 362 e = get_event_entry();
369 if (!e) { 363 if (!e) {
370 printk(KERN_ERR "%s: No memory for event\n", __func__); 364 netdev_err(dev, "%s: No memory for event\n", __func__);
371 spin_unlock_irqrestore(&wm_event.evt_lock, flags); 365 spin_unlock_irqrestore(&wm_event.evt_lock, flags);
372 return -ENOMEM; 366 return -ENOMEM;
373 } 367 }
@@ -433,10 +427,10 @@ static int gdm_wimax_tx(struct sk_buff *skb, struct net_device *dev)
433 427
434 #if !defined(LOOPBACK_TEST) 428 #if !defined(LOOPBACK_TEST)
435 if (!fsm) 429 if (!fsm)
436 printk(KERN_ERR "ASSERTION ERROR: fsm is NULL!!\n"); 430 netdev_err(dev, "ASSERTION ERROR: fsm is NULL!!\n");
437 else if (fsm->m_status != M_CONNECTED) { 431 else if (fsm->m_status != M_CONNECTED) {
438 printk(KERN_EMERG "ASSERTION ERROR: Device is NOT ready. status=%d\n", 432 netdev_emerg(dev, "ASSERTION ERROR: Device is NOT ready. status=%d\n",
439 fsm->m_status); 433 fsm->m_status);
440 kfree_skb(skb); 434 kfree_skb(skb);
441 return 0; 435 return 0;
442 } 436 }
@@ -622,9 +616,8 @@ static int gdm_wimax_ioctl(struct net_device *dev, struct ifreq *ifr, int cmd)
622 case SIOCG_DATA: 616 case SIOCG_DATA:
623 case SIOCS_DATA: 617 case SIOCS_DATA:
624 if (req->data_id >= SIOC_DATA_MAX) { 618 if (req->data_id >= SIOC_DATA_MAX) {
625 printk(KERN_ERR 619 netdev_err(dev, "%s error: data-index(%d) is invalid!!\n",
626 "%s error: data-index(%d) is invalid!!\n", 620 __func__, req->data_id);
627 __func__, req->data_id);
628 return -EOPNOTSUPP; 621 return -EOPNOTSUPP;
629 } 622 }
630 if (req->cmd == SIOCG_DATA) { 623 if (req->cmd == SIOCG_DATA) {
@@ -646,7 +639,7 @@ static int gdm_wimax_ioctl(struct net_device *dev, struct ifreq *ifr, int cmd)
646 } 639 }
647 break; 640 break;
648 default: 641 default:
649 printk(KERN_ERR "%s: %x unknown ioctl\n", __func__, cmd); 642 netdev_err(dev, "%s: %x unknown ioctl\n", __func__, cmd);
650 return -EOPNOTSUPP; 643 return -EOPNOTSUPP;
651 } 644 }
652 645
@@ -692,7 +685,7 @@ static void gdm_wimax_prepare_device(struct net_device *dev)
692 hci->length = H2B(len); 685 hci->length = H2B(len);
693 gdm_wimax_send(nic, hci, HCI_HEADER_SIZE+len); 686 gdm_wimax_send(nic, hci, HCI_HEADER_SIZE+len);
694 687
695 printk(KERN_INFO "GDM WiMax Set CAPABILITY: 0x%08X\n", DB2H(val)); 688 netdev_info(dev, "GDM WiMax Set CAPABILITY: 0x%08X\n", DB2H(val));
696} 689}
697 690
698static int gdm_wimax_hci_get_tlv(u8 *buf, u8 *T, u16 *L, u8 **V) 691static int gdm_wimax_hci_get_tlv(u8 *buf, u8 *T, u16 *L, u8 **V)
@@ -726,28 +719,28 @@ static int gdm_wimax_get_prepared_info(struct net_device *dev, char *buf,
726 cmd_len = B2H(*(u16 *)&buf[2]); 719 cmd_len = B2H(*(u16 *)&buf[2]);
727 720
728 if (len < cmd_len + HCI_HEADER_SIZE) { 721 if (len < cmd_len + HCI_HEADER_SIZE) {
729 printk(KERN_ERR "%s: invalid length [%d/%d]\n", __func__, 722 netdev_err(dev, "%s: invalid length [%d/%d]\n", __func__,
730 cmd_len + HCI_HEADER_SIZE, len); 723 cmd_len + HCI_HEADER_SIZE, len);
731 return -1; 724 return -1;
732 } 725 }
733 726
734 if (cmd_evt == WIMAX_GET_INFO_RESULT) { 727 if (cmd_evt == WIMAX_GET_INFO_RESULT) {
735 if (cmd_len < 2) { 728 if (cmd_len < 2) {
736 printk(KERN_ERR "%s: len is too short [%x/%d]\n", 729 netdev_err(dev, "%s: len is too short [%x/%d]\n",
737 __func__, cmd_evt, len); 730 __func__, cmd_evt, len);
738 return -1; 731 return -1;
739 } 732 }
740 733
741 pos += gdm_wimax_hci_get_tlv(&buf[pos], &T, &L, &V); 734 pos += gdm_wimax_hci_get_tlv(&buf[pos], &T, &L, &V);
742 if (T == TLV_T(T_MAC_ADDRESS)) { 735 if (T == TLV_T(T_MAC_ADDRESS)) {
743 if (L != dev->addr_len) { 736 if (L != dev->addr_len) {
744 printk(KERN_ERR 737 netdev_err(dev,
745 "%s Invalid inofrmation result T/L " 738 "%s Invalid inofrmation result T/L [%x/%d]\n",
746 "[%x/%d]\n", __func__, T, L); 739 __func__, T, L);
747 return -1; 740 return -1;
748 } 741 }
749 printk(KERN_INFO "MAC change [%pM]->[%pM]\n", 742 netdev_info(dev, "MAC change [%pM]->[%pM]\n",
750 dev->dev_addr, V); 743 dev->dev_addr, V);
751 memcpy(dev->dev_addr, V, dev->addr_len); 744 memcpy(dev->dev_addr, V, dev->addr_len);
752 return 1; 745 return 1;
753 } 746 }
@@ -769,7 +762,7 @@ static void gdm_wimax_netif_rx(struct net_device *dev, char *buf, int len)
769 762
770 skb = dev_alloc_skb(len + 2); 763 skb = dev_alloc_skb(len + 2);
771 if (!skb) { 764 if (!skb) {
772 printk(KERN_ERR "%s: dev_alloc_skb failed!\n", __func__); 765 netdev_err(dev, "%s: dev_alloc_skb failed!\n", __func__);
773 return; 766 return;
774 } 767 }
775 skb_reserve(skb, 2); 768 skb_reserve(skb, 2);
@@ -784,7 +777,7 @@ static void gdm_wimax_netif_rx(struct net_device *dev, char *buf, int len)
784 777
785 ret = in_interrupt() ? netif_rx(skb) : netif_rx_ni(skb); 778 ret = in_interrupt() ? netif_rx(skb) : netif_rx_ni(skb);
786 if (ret == NET_RX_DROP) 779 if (ret == NET_RX_DROP)
787 printk(KERN_ERR "%s skb dropped\n", __func__); 780 netdev_err(dev, "%s skb dropped\n", __func__);
788} 781}
789 782
790static void gdm_wimax_transmit_aggr_pkt(struct net_device *dev, char *buf, 783static void gdm_wimax_transmit_aggr_pkt(struct net_device *dev, char *buf,
@@ -799,8 +792,8 @@ static void gdm_wimax_transmit_aggr_pkt(struct net_device *dev, char *buf,
799 hci = (struct hci_s *) buf; 792 hci = (struct hci_s *) buf;
800 793
801 if (B2H(hci->cmd_evt) != WIMAX_RX_SDU) { 794 if (B2H(hci->cmd_evt) != WIMAX_RX_SDU) {
802 printk(KERN_ERR "Wrong cmd_evt(0x%04X)\n", 795 netdev_err(dev, "Wrong cmd_evt(0x%04X)\n",
803 B2H(hci->cmd_evt)); 796 B2H(hci->cmd_evt));
804 break; 797 break;
805 } 798 }
806 799
@@ -834,8 +827,8 @@ static void gdm_wimax_transmit_pkt(struct net_device *dev, char *buf, int len)
834 827
835 if (len < cmd_len + HCI_HEADER_SIZE) { 828 if (len < cmd_len + HCI_HEADER_SIZE) {
836 if (len) 829 if (len)
837 printk(KERN_ERR "%s: invalid length [%d/%d]\n", 830 netdev_err(dev, "%s: invalid length [%d/%d]\n",
838 __func__, cmd_len + HCI_HEADER_SIZE, len); 831 __func__, cmd_len + HCI_HEADER_SIZE, len);
839 return; 832 return;
840 } 833 }
841 834
@@ -915,7 +908,8 @@ static void prepare_rx_complete(void *arg, void *data, int len)
915 gdm_wimax_rcv_with_cb(nic, rx_complete, nic); 908 gdm_wimax_rcv_with_cb(nic, rx_complete, nic);
916 else { 909 else {
917 if (ret < 0) 910 if (ret < 0)
918 printk(KERN_ERR "get_prepared_info failed(%d)\n", ret); 911 netdev_err(nic->netdev,
912 "get_prepared_info failed(%d)\n", ret);
919 gdm_wimax_rcv_with_cb(nic, prepare_rx_complete, nic); 913 gdm_wimax_rcv_with_cb(nic, prepare_rx_complete, nic);
920 #if 0 914 #if 0
921 /* Re-prepare WiMax device */ 915 /* Re-prepare WiMax device */
@@ -949,7 +943,7 @@ int register_wimax_device(struct phy_dev *phy_dev, struct device *pdev)
949 "wm%d", ether_setup); 943 "wm%d", ether_setup);
950 944
951 if (dev == NULL) { 945 if (dev == NULL) {
952 printk(KERN_ERR "alloc_etherdev failed\n"); 946 pr_err("alloc_etherdev failed\n");
953 return -ENOMEM; 947 return -ENOMEM;
954 } 948 }
955 949
@@ -969,7 +963,7 @@ int register_wimax_device(struct phy_dev *phy_dev, struct device *pdev)
969 /* event socket init */ 963 /* event socket init */
970 ret = gdm_wimax_event_init(); 964 ret = gdm_wimax_event_init();
971 if (ret < 0) { 965 if (ret < 0) {
972 printk(KERN_ERR "Cannot create event.\n"); 966 pr_err("Cannot create event.\n");
973 goto cleanup; 967 goto cleanup;
974 } 968 }
975 969
@@ -996,7 +990,7 @@ int register_wimax_device(struct phy_dev *phy_dev, struct device *pdev)
996 return 0; 990 return 0;
997 991
998cleanup: 992cleanup:
999 printk(KERN_ERR "register_netdev failed\n"); 993 pr_err("register_netdev failed\n");
1000 free_netdev(dev); 994 free_netdev(dev);
1001 return ret; 995 return ret;
1002} 996}
diff --git a/drivers/staging/gdm72xx/netlink_k.c b/drivers/staging/gdm72xx/netlink_k.c
index 20d0aec52e72..52c25ba5831d 100644
--- a/drivers/staging/gdm72xx/netlink_k.c
+++ b/drivers/staging/gdm72xx/netlink_k.c
@@ -11,6 +11,8 @@
11 * GNU General Public License for more details. 11 * GNU General Public License for more details.
12 */ 12 */
13 13
14#define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
15
14#include <linux/module.h> 16#include <linux/module.h>
15#include <linux/etherdevice.h> 17#include <linux/etherdevice.h>
16#include <linux/netlink.h> 18#include <linux/netlink.h>
@@ -54,8 +56,8 @@ static void netlink_rcv_cb(struct sk_buff *skb)
54 56
55 if (skb->len < nlh->nlmsg_len || 57 if (skb->len < nlh->nlmsg_len ||
56 nlh->nlmsg_len > ND_MAX_MSG_LEN) { 58 nlh->nlmsg_len > ND_MAX_MSG_LEN) {
57 printk(KERN_ERR "Invalid length (%d,%d)\n", skb->len, 59 netdev_err(skb->dev, "Invalid length (%d,%d)\n",
58 nlh->nlmsg_len); 60 skb->len, nlh->nlmsg_len);
59 return; 61 return;
60 } 62 }
61 63
@@ -69,10 +71,11 @@ static void netlink_rcv_cb(struct sk_buff *skb)
69 rcv_cb(dev, nlh->nlmsg_type, msg, mlen); 71 rcv_cb(dev, nlh->nlmsg_type, msg, mlen);
70 dev_put(dev); 72 dev_put(dev);
71 } else 73 } else
72 printk(KERN_ERR "dev_get_by_index(%d) " 74 netdev_err(skb->dev,
73 "is not found.\n", ifindex); 75 "dev_get_by_index(%d) is not found.\n",
76 ifindex);
74 } else 77 } else
75 printk(KERN_ERR "Unregistered Callback\n"); 78 netdev_err(skb->dev, "Unregistered Callback\n");
76 } 79 }
77} 80}
78 81
@@ -116,14 +119,14 @@ int netlink_send(struct sock *sock, int group, u16 type, void *msg, int len)
116 int ret = 0; 119 int ret = 0;
117 120
118 if (group > ND_MAX_GROUP) { 121 if (group > ND_MAX_GROUP) {
119 printk(KERN_ERR "Group %d is invalied.\n", group); 122 pr_err("Group %d is invalied.\n", group);
120 printk(KERN_ERR "Valid group is 0 ~ %d.\n", ND_MAX_GROUP); 123 pr_err("Valid group is 0 ~ %d.\n", ND_MAX_GROUP);
121 return -EINVAL; 124 return -EINVAL;
122 } 125 }
123 126
124 skb = alloc_skb(NLMSG_SPACE(len), GFP_ATOMIC); 127 skb = alloc_skb(NLMSG_SPACE(len), GFP_ATOMIC);
125 if (!skb) { 128 if (!skb) {
126 printk(KERN_ERR "netlink_broadcast ret=%d\n", ret); 129 pr_err("netlink_broadcast ret=%d\n", ret);
127 return -ENOMEM; 130 return -ENOMEM;
128 } 131 }
129 132
@@ -144,8 +147,8 @@ int netlink_send(struct sock *sock, int group, u16 type, void *msg, int len)
144 return len; 147 return len;
145 else { 148 else {
146 if (ret != -ESRCH) { 149 if (ret != -ESRCH) {
147 printk(KERN_ERR "netlink_broadcast g=%d, t=%d, l=%d, r=%d\n", 150 pr_err("netlink_broadcast g=%d, t=%d, l=%d, r=%d\n",
148 group, type, len, ret); 151 group, type, len, ret);
149 } 152 }
150 ret = 0; 153 ret = 0;
151 } 154 }
diff --git a/drivers/staging/gdm72xx/sdio_boot.c b/drivers/staging/gdm72xx/sdio_boot.c
index 65624bca8b3a..6291829dcdcc 100644
--- a/drivers/staging/gdm72xx/sdio_boot.c
+++ b/drivers/staging/gdm72xx/sdio_boot.c
@@ -24,15 +24,18 @@
24#include <linux/mmc/card.h> 24#include <linux/mmc/card.h>
25#include <linux/mmc/sdio_func.h> 25#include <linux/mmc/sdio_func.h>
26 26
27#include <linux/firmware.h>
28
27#include "gdm_sdio.h" 29#include "gdm_sdio.h"
28 30
29#define TYPE_A_HEADER_SIZE 4 31#define TYPE_A_HEADER_SIZE 4
30#define TYPE_A_LOOKAHEAD_SIZE 16 32#define TYPE_A_LOOKAHEAD_SIZE 16
31#define YMEM0_SIZE 0x8000 /* 32kbytes */ 33#define YMEM0_SIZE 0x8000 /* 32kbytes */
32#define DOWNLOAD_SIZE (YMEM0_SIZE - TYPE_A_HEADER_SIZE) 34#define DOWNLOAD_SIZE (YMEM0_SIZE - TYPE_A_HEADER_SIZE)
33 35
34#define KRN_PATH "/lib/firmware/gdm72xx/gdmskrn.bin" 36#define FW_DIR "gdm72xx/"
35#define RFS_PATH "/lib/firmware/gdm72xx/gdmsrfs.bin" 37#define FW_KRN "gdmskrn.bin"
38#define FW_RFS "gdmsrfs.bin"
36 39
37static u8 *tx_buf; 40static u8 *tx_buf;
38 41
@@ -52,106 +55,109 @@ static int ack_ready(struct sdio_func *func)
52 return 0; 55 return 0;
53} 56}
54 57
55static int download_image(struct sdio_func *func, char *img_name) 58static int download_image(struct sdio_func *func, const char *img_name)
56{ 59{
57 int ret = 0, len, size, pno; 60 int ret = 0, len, pno;
58 struct file *filp = NULL;
59 struct inode *inode = NULL;
60 u8 *buf = tx_buf; 61 u8 *buf = tx_buf;
61 loff_t pos = 0; 62 loff_t pos = 0;
62 63 int img_len;
63 filp = filp_open(img_name, O_RDONLY | O_LARGEFILE, 0); 64 const struct firmware *firm;
64 if (IS_ERR(filp)) { 65
65 printk(KERN_ERR "Can't find %s.\n", img_name); 66 ret = request_firmware(&firm, img_name, &func->dev);
66 return -ENOENT; 67 if (ret < 0) {
68 dev_err(&func->dev,
69 "requesting firmware %s failed with error %d\n",
70 img_name, ret);
71 return ret;
67 } 72 }
68 73
69 inode = filp->f_dentry->d_inode; 74 buf = kmalloc(DOWNLOAD_SIZE + TYPE_A_HEADER_SIZE, GFP_KERNEL);
70 if (!S_ISREG(inode->i_mode)) { 75 if (buf == NULL) {
71 printk(KERN_ERR "Invalid file type: %s\n", img_name); 76 dev_err(&func->dev, "Error: kmalloc\n");
72 ret = -EINVAL; 77 return -ENOMEM;
73 goto out;
74 } 78 }
75 79
76 size = i_size_read(inode->i_mapping->host); 80 img_len = firm->size;
77 if (size <= 0) { 81
78 printk(KERN_ERR "Unable to find file size: %s\n", img_name); 82 if (img_len <= 0) {
79 ret = size; 83 ret = -1;
80 goto out; 84 goto out;
81 } 85 }
82 86
83 pno = 0; 87 pno = 0;
84 while ((len = filp->f_op->read(filp, buf + TYPE_A_HEADER_SIZE, 88 while (img_len > 0) {
85 DOWNLOAD_SIZE, &pos))) { 89 if (img_len > DOWNLOAD_SIZE) {
86 if (len < 0) { 90 len = DOWNLOAD_SIZE;
87 ret = -1; 91 buf[3] = 0;
88 goto out; 92 } else {
93 len = img_len; /* the last packet */
94 buf[3] = 2;
89 } 95 }
90 96
91 buf[0] = len & 0xff; 97 buf[0] = len & 0xff;
92 buf[1] = (len >> 8) & 0xff; 98 buf[1] = (len >> 8) & 0xff;
93 buf[2] = (len >> 16) & 0xff; 99 buf[2] = (len >> 16) & 0xff;
94 100
95 if (pos >= size) /* The last packet */ 101 memcpy(buf+TYPE_A_HEADER_SIZE, firm->data + pos, len);
96 buf[3] = 2;
97 else
98 buf[3] = 0;
99
100 ret = sdio_memcpy_toio(func, 0, buf, len + TYPE_A_HEADER_SIZE); 102 ret = sdio_memcpy_toio(func, 0, buf, len + TYPE_A_HEADER_SIZE);
101 if (ret < 0) { 103 if (ret < 0) {
102 printk(KERN_ERR "gdmwm: send image error: " 104 dev_err(&func->dev,
103 "packet number = %d ret = %d\n", pno, ret); 105 "send image error: packet number = %d ret = %d\n",
106 pno, ret);
104 goto out; 107 goto out;
105 } 108 }
109
106 if (buf[3] == 2) /* The last packet */ 110 if (buf[3] == 2) /* The last packet */
107 break; 111 break;
108 if (!ack_ready(func)) { 112 if (!ack_ready(func)) {
109 ret = -EIO; 113 ret = -EIO;
110 printk(KERN_ERR "gdmwm: Ack is not ready.\n"); 114 dev_err(&func->dev, "Ack is not ready.\n");
111 goto out; 115 goto out;
112 } 116 }
113 ret = sdio_memcpy_fromio(func, buf, 0, TYPE_A_LOOKAHEAD_SIZE); 117 ret = sdio_memcpy_fromio(func, buf, 0, TYPE_A_LOOKAHEAD_SIZE);
114 if (ret < 0) { 118 if (ret < 0) {
115 printk(KERN_ERR "gdmwm: receive ack error: " 119 dev_err(&func->dev,
116 "packet number = %d ret = %d\n", pno, ret); 120 "receive ack error: packet number = %d ret = %d\n",
121 pno, ret);
117 goto out; 122 goto out;
118 } 123 }
119 sdio_writeb(func, 0x01, 0x13, &ret); 124 sdio_writeb(func, 0x01, 0x13, &ret);
120 sdio_writeb(func, 0x00, 0x10, &ret); /* PCRRT */ 125 sdio_writeb(func, 0x00, 0x10, &ret); /* PCRRT */
121 126
127 img_len -= DOWNLOAD_SIZE;
128 pos += DOWNLOAD_SIZE;
122 pno++; 129 pno++;
123 } 130 }
131
124out: 132out:
125 filp_close(filp, NULL); 133 kfree(buf);
126 return ret; 134 return ret;
127} 135}
128 136
129int sdio_boot(struct sdio_func *func) 137int sdio_boot(struct sdio_func *func)
130{ 138{
131 static mm_segment_t fs;
132 int ret; 139 int ret;
140 const char *krn_name = FW_DIR FW_KRN;
141 const char *rfs_name = FW_DIR FW_RFS;
133 142
134 tx_buf = kmalloc(YMEM0_SIZE, GFP_KERNEL); 143 tx_buf = kmalloc(YMEM0_SIZE, GFP_KERNEL);
135 if (tx_buf == NULL) { 144 if (tx_buf == NULL) {
136 printk(KERN_ERR "Error: kmalloc: %s %d\n", __func__, __LINE__); 145 dev_err(&func->dev, "Error: kmalloc: %s %d\n",
146 __func__, __LINE__);
137 return -ENOMEM; 147 return -ENOMEM;
138 } 148 }
139 149
140 fs = get_fs(); 150 ret = download_image(func, krn_name);
141 set_fs(get_ds());
142
143 ret = download_image(func, KRN_PATH);
144 if (ret) 151 if (ret)
145 goto restore_fs; 152 goto restore_fs;
146 printk(KERN_INFO "GCT: Kernel download success.\n"); 153 dev_info(&func->dev, "GCT: Kernel download success.\n");
147 154
148 ret = download_image(func, RFS_PATH); 155 ret = download_image(func, rfs_name);
149 if (ret) 156 if (ret)
150 goto restore_fs; 157 goto restore_fs;
151 printk(KERN_INFO "GCT: Filesystem download success.\n"); 158 dev_info(&func->dev, "GCT: Filesystem download success.\n");
152 159
153restore_fs: 160restore_fs:
154 set_fs(fs);
155 kfree(tx_buf); 161 kfree(tx_buf);
156 return ret; 162 return ret;
157} 163}
diff --git a/drivers/staging/gdm72xx/usb_boot.c b/drivers/staging/gdm72xx/usb_boot.c
index 0787188728aa..3e2103ae4eae 100644
--- a/drivers/staging/gdm72xx/usb_boot.c
+++ b/drivers/staging/gdm72xx/usb_boot.c
@@ -82,7 +82,8 @@ static int gdm_wibro_send(struct usb_device *usbdev, void *data, int len)
82 &actual, 1000); 82 &actual, 1000);
83 83
84 if (ret < 0) { 84 if (ret < 0) {
85 printk(KERN_ERR "Error : usb_bulk_msg ( result = %d )\n", ret); 85 dev_err(&usbdev->dev, "Error : usb_bulk_msg ( result = %d )\n",
86 ret);
86 return ret; 87 return ret;
87 } 88 }
88 return 0; 89 return 0;
@@ -97,8 +98,8 @@ static int gdm_wibro_recv(struct usb_device *usbdev, void *data, int len)
97 &actual, 5000); 98 &actual, 5000);
98 99
99 if (ret < 0) { 100 if (ret < 0) {
100 printk(KERN_ERR "Error : usb_bulk_msg(recv) ( result = %d )\n", 101 dev_err(&usbdev->dev,
101 ret); 102 "Error : usb_bulk_msg(recv) ( result = %d )\n", ret);
102 return ret; 103 return ret;
103 } 104 }
104 return 0; 105 return 0;
@@ -150,20 +151,20 @@ int usb_boot(struct usb_device *usbdev, u16 pid)
150 151
151 ret = request_firmware(&firm, img_name, &usbdev->dev); 152 ret = request_firmware(&firm, img_name, &usbdev->dev);
152 if (ret < 0) { 153 if (ret < 0) {
153 printk(KERN_ERR 154 dev_err(&usbdev->dev,
154 "requesting firmware %s failed with error %d\n", 155 "requesting firmware %s failed with error %d\n",
155 img_name, ret); 156 img_name, ret);
156 return ret; 157 return ret;
157 } 158 }
158 159
159 tx_buf = kmalloc(DOWNLOAD_SIZE, GFP_KERNEL); 160 tx_buf = kmalloc(DOWNLOAD_SIZE, GFP_KERNEL);
160 if (tx_buf == NULL) { 161 if (tx_buf == NULL) {
161 printk(KERN_ERR "Error: kmalloc\n"); 162 dev_err(&usbdev->dev, "Error: kmalloc\n");
162 return -ENOMEM; 163 return -ENOMEM;
163 } 164 }
164 165
165 if (firm->size < sizeof(hdr)) { 166 if (firm->size < sizeof(hdr)) {
166 printk(KERN_ERR "gdmwm: Cannot read the image info.\n"); 167 dev_err(&usbdev->dev, "Cannot read the image info.\n");
167 ret = -EIO; 168 ret = -EIO;
168 goto out; 169 goto out;
169 } 170 }
@@ -172,23 +173,22 @@ int usb_boot(struct usb_device *usbdev, u16 pid)
172 array_le32_to_cpu((u32 *)&hdr, 19); 173 array_le32_to_cpu((u32 *)&hdr, 19);
173#if 0 174#if 0
174 if (hdr.magic_code != 0x10767fff) { 175 if (hdr.magic_code != 0x10767fff) {
175 printk(KERN_ERR "gdmwm: Invalid magic code 0x%08x\n", 176 dev_err(&usbdev->dev, "Invalid magic code 0x%08x\n",
176 hdr.magic_code); 177 hdr.magic_code);
177 ret = -EINVAL; 178 ret = -EINVAL;
178 goto out; 179 goto out;
179 } 180 }
180#endif 181#endif
181 if (hdr.count > MAX_IMG_CNT) { 182 if (hdr.count > MAX_IMG_CNT) {
182 printk(KERN_ERR "gdmwm: Too many images. %d\n", hdr.count); 183 dev_err(&usbdev->dev, "Too many images. %d\n", hdr.count);
183 ret = -EINVAL; 184 ret = -EINVAL;
184 goto out; 185 goto out;
185 } 186 }
186 187
187 for (i = 0; i < hdr.count; i++) { 188 for (i = 0; i < hdr.count; i++) {
188 if (hdr.offset[i] > hdr.len) { 189 if (hdr.offset[i] > hdr.len) {
189 printk(KERN_ERR "gdmwm: Invalid offset. " 190 dev_err(&usbdev->dev,
190 "Entry = %d Offset = 0x%08x " 191 "Invalid offset. Entry = %d Offset = 0x%08x Image length = 0x%08x\n",
191 "Image length = 0x%08x\n",
192 i, hdr.offset[i], hdr.len); 192 i, hdr.offset[i], hdr.len);
193 ret = -EINVAL; 193 ret = -EINVAL;
194 goto out; 194 goto out;
@@ -196,7 +196,7 @@ int usb_boot(struct usb_device *usbdev, u16 pid)
196 196
197 pos = hdr.offset[i]; 197 pos = hdr.offset[i];
198 if (firm->size < sizeof(fw_info) + pos) { 198 if (firm->size < sizeof(fw_info) + pos) {
199 printk(KERN_ERR "gdmwm: Cannot read the FW info.\n"); 199 dev_err(&usbdev->dev, "Cannot read the FW info.\n");
200 ret = -EIO; 200 ret = -EIO;
201 goto out; 201 goto out;
202 } 202 }
@@ -205,7 +205,7 @@ int usb_boot(struct usb_device *usbdev, u16 pid)
205 array_le32_to_cpu((u32 *)&fw_info, 8); 205 array_le32_to_cpu((u32 *)&fw_info, 8);
206#if 0 206#if 0
207 if ((fw_info.id & 0xfffff000) != 0x10767000) { 207 if ((fw_info.id & 0xfffff000) != 0x10767000) {
208 printk(KERN_ERR "gdmwm: Invalid FW id. 0x%08x\n", 208 dev_err(&usbdev->dev, "Invalid FW id. 0x%08x\n",
209 fw_info.id); 209 fw_info.id);
210 ret = -EIO; 210 ret = -EIO;
211 goto out; 211 goto out;
@@ -217,7 +217,7 @@ int usb_boot(struct usb_device *usbdev, u16 pid)
217 217
218 pos = hdr.offset[i] + fw_info.kernel_offset; 218 pos = hdr.offset[i] + fw_info.kernel_offset;
219 if (firm->size < fw_info.kernel_len + pos) { 219 if (firm->size < fw_info.kernel_len + pos) {
220 printk(KERN_ERR "gdmwm: Kernel FW is too small.\n"); 220 dev_err(&usbdev->dev, "Kernel FW is too small.\n");
221 goto out; 221 goto out;
222 } 222 }
223 223
@@ -225,24 +225,25 @@ int usb_boot(struct usb_device *usbdev, u16 pid)
225 fw_info.kernel_len, DN_KERNEL_MAGIC_NUMBER); 225 fw_info.kernel_len, DN_KERNEL_MAGIC_NUMBER);
226 if (ret < 0) 226 if (ret < 0)
227 goto out; 227 goto out;
228 printk(KERN_INFO "GCT: Kernel download success.\n"); 228 dev_info(&usbdev->dev, "GCT: Kernel download success.\n");
229 229
230 pos = hdr.offset[i] + fw_info.rootfs_offset; 230 pos = hdr.offset[i] + fw_info.rootfs_offset;
231 if (firm->size < fw_info.rootfs_len + pos) { 231 if (firm->size < fw_info.rootfs_len + pos) {
232 printk(KERN_ERR "gdmwm: Filesystem FW is too small.\n"); 232 dev_err(&usbdev->dev, "Filesystem FW is too small.\n");
233 goto out; 233 goto out;
234 } 234 }
235 ret = download_image(usbdev, firm, pos, fw_info.rootfs_len, 235 ret = download_image(usbdev, firm, pos, fw_info.rootfs_len,
236 DN_ROOTFS_MAGIC_NUMBER); 236 DN_ROOTFS_MAGIC_NUMBER);
237 if (ret < 0) 237 if (ret < 0)
238 goto out; 238 goto out;
239 printk(KERN_INFO "GCT: Filesystem download success.\n"); 239 dev_info(&usbdev->dev, "GCT: Filesystem download success.\n");
240 240
241 break; 241 break;
242 } 242 }
243 243
244 if (i == hdr.count) { 244 if (i == hdr.count) {
245 printk(KERN_ERR "Firmware for gsk%x is not installed.\n", pid); 245 dev_err(&usbdev->dev, "Firmware for gsk%x is not installed.\n",
246 pid);
246 ret = -EINVAL; 247 ret = -EINVAL;
247 } 248 }
248out: 249out:
@@ -293,15 +294,15 @@ static int em_download_image(struct usb_device *usbdev, const char *img_name,
293 294
294 ret = request_firmware(&firm, img_name, &usbdev->dev); 295 ret = request_firmware(&firm, img_name, &usbdev->dev);
295 if (ret < 0) { 296 if (ret < 0) {
296 printk(KERN_ERR 297 dev_err(&usbdev->dev,
297 "requesting firmware %s failed with error %d\n", 298 "requesting firmware %s failed with error %d\n",
298 img_name, ret); 299 img_name, ret);
299 return ret; 300 return ret;
300 } 301 }
301 302
302 buf = kmalloc(DOWNLOAD_CHUCK + pad_size, GFP_KERNEL); 303 buf = kmalloc(DOWNLOAD_CHUCK + pad_size, GFP_KERNEL);
303 if (buf == NULL) { 304 if (buf == NULL) {
304 printk(KERN_ERR "Error: kmalloc\n"); 305 dev_err(&usbdev->dev, "Error: kmalloc\n");
305 return -ENOMEM; 306 return -ENOMEM;
306 } 307 }
307 308
@@ -366,12 +367,12 @@ int usb_emergency(struct usb_device *usbdev)
366 ret = em_download_image(usbdev, kern_name, KERNEL_TYPE_STRING); 367 ret = em_download_image(usbdev, kern_name, KERNEL_TYPE_STRING);
367 if (ret < 0) 368 if (ret < 0)
368 return ret; 369 return ret;
369 printk(KERN_INFO "GCT Emergency: Kernel download success.\n"); 370 dev_err(&usbdev->dev, "GCT Emergency: Kernel download success.\n");
370 371
371 ret = em_download_image(usbdev, fs_name, FS_TYPE_STRING); 372 ret = em_download_image(usbdev, fs_name, FS_TYPE_STRING);
372 if (ret < 0) 373 if (ret < 0)
373 return ret; 374 return ret;
374 printk(KERN_INFO "GCT Emergency: Filesystem download success.\n"); 375 dev_info(&usbdev->dev, "GCT Emergency: Filesystem download success.\n");
375 376
376 ret = em_fw_reset(usbdev); 377 ret = em_fw_reset(usbdev);
377 378
diff --git a/drivers/staging/iio/accel/Kconfig b/drivers/staging/iio/accel/Kconfig
index 5ab71670b70f..2b54430f2d99 100644
--- a/drivers/staging/iio/accel/Kconfig
+++ b/drivers/staging/iio/accel/Kconfig
@@ -6,8 +6,8 @@ menu "Accelerometers"
6config ADIS16201 6config ADIS16201
7 tristate "Analog Devices ADIS16201 Dual-Axis Digital Inclinometer and Accelerometer" 7 tristate "Analog Devices ADIS16201 Dual-Axis Digital Inclinometer and Accelerometer"
8 depends on SPI 8 depends on SPI
9 select IIO_TRIGGER if IIO_BUFFER 9 select IIO_ADIS_LIB
10 select IIO_SW_RING if IIO_BUFFER 10 select IIO_ADIS_LIB_BUFFER if IIO_BUFFER
11 help 11 help
12 Say yes here to build support for Analog Devices adis16201 dual-axis 12 Say yes here to build support for Analog Devices adis16201 dual-axis
13 digital inclinometer and accelerometer. 13 digital inclinometer and accelerometer.
@@ -15,8 +15,8 @@ config ADIS16201
15config ADIS16203 15config ADIS16203
16 tristate "Analog Devices ADIS16203 Programmable 360 Degrees Inclinometer" 16 tristate "Analog Devices ADIS16203 Programmable 360 Degrees Inclinometer"
17 depends on SPI 17 depends on SPI
18 select IIO_TRIGGER if IIO_BUFFER 18 select IIO_ADIS_LIB
19 select IIO_SW_RING if IIO_BUFFER 19 select IIO_ADIS_LIB_BUFFER if IIO_BUFFER
20 help 20 help
21 Say yes here to build support for Analog Devices adis16203 Programmable 21 Say yes here to build support for Analog Devices adis16203 Programmable
22 360 Degrees Inclinometer. 22 360 Degrees Inclinometer.
@@ -24,8 +24,8 @@ config ADIS16203
24config ADIS16204 24config ADIS16204
25 tristate "Analog Devices ADIS16204 Programmable High-g Digital Impact Sensor and Recorder" 25 tristate "Analog Devices ADIS16204 Programmable High-g Digital Impact Sensor and Recorder"
26 depends on SPI 26 depends on SPI
27 select IIO_TRIGGER if IIO_BUFFER 27 select IIO_ADIS_LIB
28 select IIO_SW_RING if IIO_BUFFER 28 select IIO_ADIS_LIB_BUFFER if IIO_BUFFER
29 help 29 help
30 Say yes here to build support for Analog Devices adis16204 Programmable 30 Say yes here to build support for Analog Devices adis16204 Programmable
31 High-g Digital Impact Sensor and Recorder. 31 High-g Digital Impact Sensor and Recorder.
@@ -33,8 +33,8 @@ config ADIS16204
33config ADIS16209 33config ADIS16209
34 tristate "Analog Devices ADIS16209 Dual-Axis Digital Inclinometer and Accelerometer" 34 tristate "Analog Devices ADIS16209 Dual-Axis Digital Inclinometer and Accelerometer"
35 depends on SPI 35 depends on SPI
36 select IIO_TRIGGER if IIO_BUFFER 36 select IIO_ADIS_LIB
37 select IIO_SW_RING if IIO_BUFFER 37 select IIO_ADIS_LIB_BUFFER if IIO_BUFFER
38 help 38 help
39 Say yes here to build support for Analog Devices adis16209 dual-axis digital inclinometer 39 Say yes here to build support for Analog Devices adis16209 dual-axis digital inclinometer
40 and accelerometer. 40 and accelerometer.
@@ -42,6 +42,7 @@ config ADIS16209
42config ADIS16220 42config ADIS16220
43 tristate "Analog Devices ADIS16220 Programmable Digital Vibration Sensor" 43 tristate "Analog Devices ADIS16220 Programmable Digital Vibration Sensor"
44 depends on SPI 44 depends on SPI
45 select IIO_ADIS_LIB
45 help 46 help
46 Say yes here to build support for Analog Devices adis16220 programmable 47 Say yes here to build support for Analog Devices adis16220 programmable
47 digital vibration sensor. 48 digital vibration sensor.
@@ -49,8 +50,8 @@ config ADIS16220
49config ADIS16240 50config ADIS16240
50 tristate "Analog Devices ADIS16240 Programmable Impact Sensor and Recorder" 51 tristate "Analog Devices ADIS16240 Programmable Impact Sensor and Recorder"
51 depends on SPI 52 depends on SPI
52 select IIO_TRIGGER if IIO_BUFFER 53 select IIO_ADIS_LIB
53 select IIO_SW_RING if IIO_BUFFER 54 select IIO_ADIS_LIB_BUFFER if IIO_BUFFER
54 help 55 help
55 Say yes here to build support for Analog Devices adis16240 programmable 56 Say yes here to build support for Analog Devices adis16240 programmable
56 impact Sensor and recorder. 57 impact Sensor and recorder.
diff --git a/drivers/staging/iio/accel/Makefile b/drivers/staging/iio/accel/Makefile
index 95c66661e702..8e7ee0368519 100644
--- a/drivers/staging/iio/accel/Makefile
+++ b/drivers/staging/iio/accel/Makefile
@@ -3,26 +3,21 @@
3# 3#
4 4
5adis16201-y := adis16201_core.o 5adis16201-y := adis16201_core.o
6adis16201-$(CONFIG_IIO_BUFFER) += adis16201_ring.o adis16201_trigger.o
7obj-$(CONFIG_ADIS16201) += adis16201.o 6obj-$(CONFIG_ADIS16201) += adis16201.o
8 7
9adis16203-y := adis16203_core.o 8adis16203-y := adis16203_core.o
10adis16203-$(CONFIG_IIO_BUFFER) += adis16203_ring.o adis16203_trigger.o
11obj-$(CONFIG_ADIS16203) += adis16203.o 9obj-$(CONFIG_ADIS16203) += adis16203.o
12 10
13adis16204-y := adis16204_core.o 11adis16204-y := adis16204_core.o
14adis16204-$(CONFIG_IIO_BUFFER) += adis16204_ring.o adis16204_trigger.o
15obj-$(CONFIG_ADIS16204) += adis16204.o 12obj-$(CONFIG_ADIS16204) += adis16204.o
16 13
17adis16209-y := adis16209_core.o 14adis16209-y := adis16209_core.o
18adis16209-$(CONFIG_IIO_BUFFER) += adis16209_ring.o adis16209_trigger.o
19obj-$(CONFIG_ADIS16209) += adis16209.o 15obj-$(CONFIG_ADIS16209) += adis16209.o
20 16
21adis16220-y := adis16220_core.o 17adis16220-y := adis16220_core.o
22obj-$(CONFIG_ADIS16220) += adis16220.o 18obj-$(CONFIG_ADIS16220) += adis16220.o
23 19
24adis16240-y := adis16240_core.o 20adis16240-y := adis16240_core.o
25adis16240-$(CONFIG_IIO_BUFFER) += adis16240_ring.o adis16240_trigger.o
26obj-$(CONFIG_ADIS16240) += adis16240.o 21obj-$(CONFIG_ADIS16240) += adis16240.o
27 22
28obj-$(CONFIG_KXSD9) += kxsd9.o 23obj-$(CONFIG_KXSD9) += kxsd9.o
diff --git a/drivers/staging/iio/accel/adis16201.h b/drivers/staging/iio/accel/adis16201.h
index 72750f7f3a81..8747de5a9805 100644
--- a/drivers/staging/iio/accel/adis16201.h
+++ b/drivers/staging/iio/accel/adis16201.h
@@ -3,9 +3,6 @@
3 3
4#define ADIS16201_STARTUP_DELAY 220 /* ms */ 4#define ADIS16201_STARTUP_DELAY 220 /* ms */
5 5
6#define ADIS16201_READ_REG(a) a
7#define ADIS16201_WRITE_REG(a) ((a) | 0x80)
8
9#define ADIS16201_FLASH_CNT 0x00 /* Flash memory write count */ 6#define ADIS16201_FLASH_CNT 0x00 /* Flash memory write count */
10#define ADIS16201_SUPPLY_OUT 0x02 /* Output, power supply */ 7#define ADIS16201_SUPPLY_OUT 0x02 /* Output, power supply */
11#define ADIS16201_XACCL_OUT 0x04 /* Output, x-axis accelerometer */ 8#define ADIS16201_XACCL_OUT 0x04 /* Output, x-axis accelerometer */
@@ -36,8 +33,6 @@
36#define ADIS16201_DIAG_STAT 0x3C /* Diagnostics, system status register */ 33#define ADIS16201_DIAG_STAT 0x3C /* Diagnostics, system status register */
37#define ADIS16201_GLOB_CMD 0x3E /* Operation, system command register */ 34#define ADIS16201_GLOB_CMD 0x3E /* Operation, system command register */
38 35
39#define ADIS16201_OUTPUTS 7
40
41/* MSC_CTRL */ 36/* MSC_CTRL */
42#define ADIS16201_MSC_CTRL_SELF_TEST_EN (1 << 8) /* Self-test enable */ 37#define ADIS16201_MSC_CTRL_SELF_TEST_EN (1 << 8) /* Self-test enable */
43#define ADIS16201_MSC_CTRL_DATA_RDY_EN (1 << 2) /* Data-ready enable: 1 = enabled, 0 = disabled */ 38#define ADIS16201_MSC_CTRL_DATA_RDY_EN (1 << 2) /* Data-ready enable: 1 = enabled, 0 = disabled */
@@ -47,95 +42,25 @@
47/* DIAG_STAT */ 42/* DIAG_STAT */
48#define ADIS16201_DIAG_STAT_ALARM2 (1<<9) /* Alarm 2 status: 1 = alarm active, 0 = alarm inactive */ 43#define ADIS16201_DIAG_STAT_ALARM2 (1<<9) /* Alarm 2 status: 1 = alarm active, 0 = alarm inactive */
49#define ADIS16201_DIAG_STAT_ALARM1 (1<<8) /* Alarm 1 status: 1 = alarm active, 0 = alarm inactive */ 44#define ADIS16201_DIAG_STAT_ALARM1 (1<<8) /* Alarm 1 status: 1 = alarm active, 0 = alarm inactive */
50#define ADIS16201_DIAG_STAT_SPI_FAIL (1<<3) /* SPI communications failure */ 45#define ADIS16201_DIAG_STAT_SPI_FAIL_BIT 3 /* SPI communications failure */
51#define ADIS16201_DIAG_STAT_FLASH_UPT (1<<2) /* Flash update failure */ 46#define ADIS16201_DIAG_STAT_FLASH_UPT_BIT 2 /* Flash update failure */
52#define ADIS16201_DIAG_STAT_POWER_HIGH (1<<1) /* Power supply above 3.625 V */ 47#define ADIS16201_DIAG_STAT_POWER_HIGH_BIT 1 /* Power supply above 3.625 V */
53#define ADIS16201_DIAG_STAT_POWER_LOW (1<<0) /* Power supply below 3.15 V */ 48#define ADIS16201_DIAG_STAT_POWER_LOW_BIT 0 /* Power supply below 3.15 V */
54 49
55/* GLOB_CMD */ 50/* GLOB_CMD */
56#define ADIS16201_GLOB_CMD_SW_RESET (1<<7) 51#define ADIS16201_GLOB_CMD_SW_RESET (1<<7)
57#define ADIS16201_GLOB_CMD_FACTORY_CAL (1<<1) 52#define ADIS16201_GLOB_CMD_FACTORY_CAL (1<<1)
58 53
59#define ADIS16201_MAX_TX 14
60#define ADIS16201_MAX_RX 14
61
62#define ADIS16201_ERROR_ACTIVE (1<<14) 54#define ADIS16201_ERROR_ACTIVE (1<<14)
63 55
64/**
65 * struct adis16201_state - device instance specific data
66 * @us: actual spi_device
67 * @trig: data ready trigger registered with iio
68 * @tx: transmit buffer
69 * @rx: receive buffer
70 * @buf_lock: mutex to protect tx and rx
71 **/
72struct adis16201_state {
73 struct spi_device *us;
74 struct iio_trigger *trig;
75 struct mutex buf_lock;
76 u8 tx[14] ____cacheline_aligned;
77 u8 rx[14];
78};
79
80int adis16201_set_irq(struct iio_dev *indio_dev, bool enable);
81
82enum adis16201_scan { 56enum adis16201_scan {
83 ADIS16201_SCAN_SUPPLY,
84 ADIS16201_SCAN_ACC_X, 57 ADIS16201_SCAN_ACC_X,
85 ADIS16201_SCAN_ACC_Y, 58 ADIS16201_SCAN_ACC_Y,
86 ADIS16201_SCAN_AUX_ADC,
87 ADIS16201_SCAN_TEMP,
88 ADIS16201_SCAN_INCLI_X, 59 ADIS16201_SCAN_INCLI_X,
89 ADIS16201_SCAN_INCLI_Y, 60 ADIS16201_SCAN_INCLI_Y,
61 ADIS16201_SCAN_SUPPLY,
62 ADIS16201_SCAN_AUX_ADC,
63 ADIS16201_SCAN_TEMP,
90}; 64};
91 65
92#ifdef CONFIG_IIO_BUFFER
93void adis16201_remove_trigger(struct iio_dev *indio_dev);
94int adis16201_probe_trigger(struct iio_dev *indio_dev);
95
96ssize_t adis16201_read_data_from_ring(struct device *dev,
97 struct device_attribute *attr,
98 char *buf);
99
100int adis16201_configure_ring(struct iio_dev *indio_dev);
101void adis16201_unconfigure_ring(struct iio_dev *indio_dev);
102
103#else /* CONFIG_IIO_BUFFER */
104
105static inline void adis16201_remove_trigger(struct iio_dev *indio_dev)
106{
107}
108
109static inline int adis16201_probe_trigger(struct iio_dev *indio_dev)
110{
111 return 0;
112}
113
114static inline ssize_t
115adis16201_read_data_from_ring(struct device *dev,
116 struct device_attribute *attr,
117 char *buf)
118{
119 return 0;
120}
121
122static int adis16201_configure_ring(struct iio_dev *indio_dev)
123{
124 return 0;
125}
126
127static inline void adis16201_unconfigure_ring(struct iio_dev *indio_dev)
128{
129}
130
131static inline int adis16201_initialize_ring(struct iio_ring_buffer *ring)
132{
133 return 0;
134}
135
136static inline void adis16201_uninitialize_ring(struct iio_ring_buffer *ring)
137{
138}
139
140#endif /* CONFIG_IIO_BUFFER */
141#endif /* SPI_ADIS16201_H_ */ 66#endif /* SPI_ADIS16201_H_ */
diff --git a/drivers/staging/iio/accel/adis16201_core.c b/drivers/staging/iio/accel/adis16201_core.c
index b12ca68cd9e4..9e5791ff2a04 100644
--- a/drivers/staging/iio/accel/adis16201_core.c
+++ b/drivers/staging/iio/accel/adis16201_core.c
@@ -18,258 +18,15 @@
18#include <linux/iio/iio.h> 18#include <linux/iio/iio.h>
19#include <linux/iio/sysfs.h> 19#include <linux/iio/sysfs.h>
20#include <linux/iio/buffer.h> 20#include <linux/iio/buffer.h>
21#include <linux/iio/imu/adis.h>
21 22
22#include "adis16201.h" 23#include "adis16201.h"
23 24
24enum adis16201_chan { 25static const u8 adis16201_addresses[] = {
25 in_supply, 26 [ADIS16201_SCAN_ACC_X] = ADIS16201_XACCL_OFFS,
26 temp, 27 [ADIS16201_SCAN_ACC_Y] = ADIS16201_YACCL_OFFS,
27 accel_x, 28 [ADIS16201_SCAN_INCLI_X] = ADIS16201_XINCL_OFFS,
28 accel_y, 29 [ADIS16201_SCAN_INCLI_Y] = ADIS16201_YINCL_OFFS,
29 incli_x,
30 incli_y,
31 in_aux,
32};
33
34/**
35 * adis16201_spi_write_reg_8() - write single byte to a register
36 * @dev: device associated with child of actual device (iio_dev or iio_trig)
37 * @reg_address: the address of the register to be written
38 * @val: the value to write
39 **/
40static int adis16201_spi_write_reg_8(struct iio_dev *indio_dev,
41 u8 reg_address,
42 u8 val)
43{
44 int ret;
45 struct adis16201_state *st = iio_priv(indio_dev);
46
47 mutex_lock(&st->buf_lock);
48 st->tx[0] = ADIS16201_WRITE_REG(reg_address);
49 st->tx[1] = val;
50
51 ret = spi_write(st->us, st->tx, 2);
52 mutex_unlock(&st->buf_lock);
53
54 return ret;
55}
56
57/**
58 * adis16201_spi_write_reg_16() - write 2 bytes to a pair of registers
59 * @indio_dev: iio device associated with child of actual device
60 * @reg_address: the address of the lower of the two registers. Second register
61 * is assumed to have address one greater.
62 * @val: value to be written
63 **/
64static int adis16201_spi_write_reg_16(struct iio_dev *indio_dev,
65 u8 lower_reg_address,
66 u16 value)
67{
68 int ret;
69 struct spi_message msg;
70 struct adis16201_state *st = iio_priv(indio_dev);
71 struct spi_transfer xfers[] = {
72 {
73 .tx_buf = st->tx,
74 .bits_per_word = 8,
75 .len = 2,
76 .cs_change = 1,
77 }, {
78 .tx_buf = st->tx + 2,
79 .bits_per_word = 8,
80 .len = 2,
81 },
82 };
83
84 mutex_lock(&st->buf_lock);
85 st->tx[0] = ADIS16201_WRITE_REG(lower_reg_address);
86 st->tx[1] = value & 0xFF;
87 st->tx[2] = ADIS16201_WRITE_REG(lower_reg_address + 1);
88 st->tx[3] = (value >> 8) & 0xFF;
89
90 spi_message_init(&msg);
91 spi_message_add_tail(&xfers[0], &msg);
92 spi_message_add_tail(&xfers[1], &msg);
93 ret = spi_sync(st->us, &msg);
94 mutex_unlock(&st->buf_lock);
95
96 return ret;
97}
98
99/**
100 * adis16201_spi_read_reg_16() - read 2 bytes from a 16-bit register
101 * @indio_dev: iio device associated with child of actual device
102 * @reg_address: the address of the lower of the two registers. Second register
103 * is assumed to have address one greater.
104 * @val: somewhere to pass back the value read
105 **/
106static int adis16201_spi_read_reg_16(struct iio_dev *indio_dev,
107 u8 lower_reg_address,
108 u16 *val)
109{
110 struct spi_message msg;
111 struct adis16201_state *st = iio_priv(indio_dev);
112 int ret;
113 struct spi_transfer xfers[] = {
114 {
115 .tx_buf = st->tx,
116 .bits_per_word = 8,
117 .len = 2,
118 .cs_change = 1,
119 .delay_usecs = 20,
120 }, {
121 .rx_buf = st->rx,
122 .bits_per_word = 8,
123 .len = 2,
124 .delay_usecs = 20,
125 },
126 };
127
128 mutex_lock(&st->buf_lock);
129 st->tx[0] = ADIS16201_READ_REG(lower_reg_address);
130 st->tx[1] = 0;
131
132 spi_message_init(&msg);
133 spi_message_add_tail(&xfers[0], &msg);
134 spi_message_add_tail(&xfers[1], &msg);
135 ret = spi_sync(st->us, &msg);
136 if (ret) {
137 dev_err(&st->us->dev, "problem when reading 16 bit register 0x%02X",
138 lower_reg_address);
139 goto error_ret;
140 }
141 *val = (st->rx[0] << 8) | st->rx[1];
142
143error_ret:
144 mutex_unlock(&st->buf_lock);
145 return ret;
146}
147
148static int adis16201_reset(struct iio_dev *indio_dev)
149{
150 int ret;
151 struct adis16201_state *st = iio_priv(indio_dev);
152
153 ret = adis16201_spi_write_reg_8(indio_dev,
154 ADIS16201_GLOB_CMD,
155 ADIS16201_GLOB_CMD_SW_RESET);
156 if (ret)
157 dev_err(&st->us->dev, "problem resetting device");
158
159 return ret;
160}
161
162int adis16201_set_irq(struct iio_dev *indio_dev, bool enable)
163{
164 int ret = 0;
165 u16 msc;
166
167 ret = adis16201_spi_read_reg_16(indio_dev, ADIS16201_MSC_CTRL, &msc);
168 if (ret)
169 goto error_ret;
170
171 msc |= ADIS16201_MSC_CTRL_ACTIVE_HIGH;
172 msc &= ~ADIS16201_MSC_CTRL_DATA_RDY_DIO1;
173 if (enable)
174 msc |= ADIS16201_MSC_CTRL_DATA_RDY_EN;
175 else
176 msc &= ~ADIS16201_MSC_CTRL_DATA_RDY_EN;
177
178 ret = adis16201_spi_write_reg_16(indio_dev, ADIS16201_MSC_CTRL, msc);
179
180error_ret:
181 return ret;
182}
183
184static int adis16201_check_status(struct iio_dev *indio_dev)
185{
186 u16 status;
187 int ret;
188
189 ret = adis16201_spi_read_reg_16(indio_dev,
190 ADIS16201_DIAG_STAT, &status);
191 if (ret < 0) {
192 dev_err(&indio_dev->dev, "Reading status failed\n");
193 goto error_ret;
194 }
195 ret = status & 0xF;
196 if (ret)
197 ret = -EFAULT;
198
199 if (status & ADIS16201_DIAG_STAT_SPI_FAIL)
200 dev_err(&indio_dev->dev, "SPI failure\n");
201 if (status & ADIS16201_DIAG_STAT_FLASH_UPT)
202 dev_err(&indio_dev->dev, "Flash update failed\n");
203 if (status & ADIS16201_DIAG_STAT_POWER_HIGH)
204 dev_err(&indio_dev->dev, "Power supply above 3.625V\n");
205 if (status & ADIS16201_DIAG_STAT_POWER_LOW)
206 dev_err(&indio_dev->dev, "Power supply below 3.15V\n");
207
208error_ret:
209 return ret;
210}
211
212static int adis16201_self_test(struct iio_dev *indio_dev)
213{
214 int ret;
215 ret = adis16201_spi_write_reg_16(indio_dev,
216 ADIS16201_MSC_CTRL,
217 ADIS16201_MSC_CTRL_SELF_TEST_EN);
218 if (ret) {
219 dev_err(&indio_dev->dev, "problem starting self test");
220 goto err_ret;
221 }
222
223 ret = adis16201_check_status(indio_dev);
224
225err_ret:
226 return ret;
227}
228
229static int adis16201_initial_setup(struct iio_dev *indio_dev)
230{
231 int ret;
232 struct device *dev = &indio_dev->dev;
233
234 /* Disable IRQ */
235 ret = adis16201_set_irq(indio_dev, false);
236 if (ret) {
237 dev_err(dev, "disable irq failed");
238 goto err_ret;
239 }
240
241 /* Do self test */
242 ret = adis16201_self_test(indio_dev);
243 if (ret) {
244 dev_err(dev, "self test failure");
245 goto err_ret;
246 }
247
248 /* Read status register to check the result */
249 ret = adis16201_check_status(indio_dev);
250 if (ret) {
251 adis16201_reset(indio_dev);
252 dev_err(dev, "device not playing ball -> reset");
253 msleep(ADIS16201_STARTUP_DELAY);
254 ret = adis16201_check_status(indio_dev);
255 if (ret) {
256 dev_err(dev, "giving up");
257 goto err_ret;
258 }
259 }
260
261err_ret:
262 return ret;
263}
264
265static u8 adis16201_addresses[7][2] = {
266 [in_supply] = { ADIS16201_SUPPLY_OUT, },
267 [temp] = { ADIS16201_TEMP_OUT },
268 [accel_x] = { ADIS16201_XACCL_OUT, ADIS16201_XACCL_OFFS },
269 [accel_y] = { ADIS16201_YACCL_OUT, ADIS16201_YACCL_OFFS },
270 [in_aux] = { ADIS16201_AUX_ADC },
271 [incli_x] = { ADIS16201_XINCL_OUT },
272 [incli_y] = { ADIS16201_YINCL_OUT },
273}; 30};
274 31
275static int adis16201_read_raw(struct iio_dev *indio_dev, 32static int adis16201_read_raw(struct iio_dev *indio_dev,
@@ -277,6 +34,7 @@ static int adis16201_read_raw(struct iio_dev *indio_dev,
277 int *val, int *val2, 34 int *val, int *val2,
278 long mask) 35 long mask)
279{ 36{
37 struct adis *st = iio_priv(indio_dev);
280 int ret; 38 int ret;
281 int bits; 39 int bits;
282 u8 addr; 40 u8 addr;
@@ -284,29 +42,8 @@ static int adis16201_read_raw(struct iio_dev *indio_dev,
284 42
285 switch (mask) { 43 switch (mask) {
286 case IIO_CHAN_INFO_RAW: 44 case IIO_CHAN_INFO_RAW:
287 mutex_lock(&indio_dev->mlock); 45 return adis_single_conversion(indio_dev, chan,
288 addr = adis16201_addresses[chan->address][0]; 46 ADIS16201_ERROR_ACTIVE, val);
289 ret = adis16201_spi_read_reg_16(indio_dev, addr, &val16);
290 if (ret) {
291 mutex_unlock(&indio_dev->mlock);
292 return ret;
293 }
294
295 if (val16 & ADIS16201_ERROR_ACTIVE) {
296 ret = adis16201_check_status(indio_dev);
297 if (ret) {
298 mutex_unlock(&indio_dev->mlock);
299 return ret;
300 }
301 }
302 val16 = val16 & ((1 << chan->scan_type.realbits) - 1);
303 if (chan->scan_type.sign == 's')
304 val16 = (s16)(val16 <<
305 (16 - chan->scan_type.realbits)) >>
306 (16 - chan->scan_type.realbits);
307 *val = val16;
308 mutex_unlock(&indio_dev->mlock);
309 return IIO_VAL_INT;
310 case IIO_CHAN_INFO_SCALE: 47 case IIO_CHAN_INFO_SCALE:
311 switch (chan->type) { 48 switch (chan->type) {
312 case IIO_VOLTAGE: 49 case IIO_VOLTAGE:
@@ -347,10 +84,10 @@ static int adis16201_read_raw(struct iio_dev *indio_dev,
347 break; 84 break;
348 default: 85 default:
349 return -EINVAL; 86 return -EINVAL;
350 }; 87 }
351 mutex_lock(&indio_dev->mlock); 88 mutex_lock(&indio_dev->mlock);
352 addr = adis16201_addresses[chan->address][1]; 89 addr = adis16201_addresses[chan->scan_index];
353 ret = adis16201_spi_read_reg_16(indio_dev, addr, &val16); 90 ret = adis_read_reg_16(st, addr, &val16);
354 if (ret) { 91 if (ret) {
355 mutex_unlock(&indio_dev->mlock); 92 mutex_unlock(&indio_dev->mlock);
356 return ret; 93 return ret;
@@ -370,6 +107,7 @@ static int adis16201_write_raw(struct iio_dev *indio_dev,
370 int val2, 107 int val2,
371 long mask) 108 long mask)
372{ 109{
110 struct adis *st = iio_priv(indio_dev);
373 int bits; 111 int bits;
374 s16 val16; 112 s16 val16;
375 u8 addr; 113 u8 addr;
@@ -384,126 +122,63 @@ static int adis16201_write_raw(struct iio_dev *indio_dev,
384 break; 122 break;
385 default: 123 default:
386 return -EINVAL; 124 return -EINVAL;
387 }; 125 }
388 val16 = val & ((1 << bits) - 1); 126 val16 = val & ((1 << bits) - 1);
389 addr = adis16201_addresses[chan->address][1]; 127 addr = adis16201_addresses[chan->scan_index];
390 return adis16201_spi_write_reg_16(indio_dev, addr, val16); 128 return adis_write_reg_16(st, addr, val16);
391 } 129 }
392 return -EINVAL; 130 return -EINVAL;
393} 131}
394 132
395static const struct iio_chan_spec adis16201_channels[] = { 133static const struct iio_chan_spec adis16201_channels[] = {
396 { 134 ADIS_SUPPLY_CHAN(ADIS16201_SUPPLY_OUT, ADIS16201_SCAN_SUPPLY, 12),
397 .type = IIO_VOLTAGE, 135 ADIS_TEMP_CHAN(ADIS16201_TEMP_OUT, ADIS16201_SCAN_TEMP, 12),
398 .indexed = 1, 136 ADIS_ACCEL_CHAN(X, ADIS16201_XACCL_OUT, ADIS16201_SCAN_ACC_X,
399 .channel = 0, 137 IIO_CHAN_INFO_CALIBBIAS_SEPARATE_BIT, 14),
400 .extend_name = "supply", 138 ADIS_ACCEL_CHAN(Y, ADIS16201_YACCL_OUT, ADIS16201_SCAN_ACC_Y,
401 .info_mask = IIO_CHAN_INFO_RAW_SEPARATE_BIT | 139 IIO_CHAN_INFO_CALIBBIAS_SEPARATE_BIT, 14),
402 IIO_CHAN_INFO_SCALE_SEPARATE_BIT, 140 ADIS_AUX_ADC_CHAN(ADIS16201_AUX_ADC, ADIS16201_SCAN_AUX_ADC, 12),
403 .address = in_supply, 141 ADIS_INCLI_CHAN(X, ADIS16201_XINCL_OUT, ADIS16201_SCAN_INCLI_X,
404 .scan_index = ADIS16201_SCAN_SUPPLY, 142 IIO_CHAN_INFO_CALIBBIAS_SEPARATE_BIT, 14),
405 .scan_type = { 143 ADIS_INCLI_CHAN(X, ADIS16201_YINCL_OUT, ADIS16201_SCAN_INCLI_Y,
406 .sign = 'u', 144 IIO_CHAN_INFO_CALIBBIAS_SEPARATE_BIT, 14),
407 .realbits = 12,
408 .storagebits = 16,
409 },
410 }, {
411 .type = IIO_TEMP,
412 .indexed = 1,
413 .channel = 0,
414 .info_mask = IIO_CHAN_INFO_RAW_SEPARATE_BIT |
415 IIO_CHAN_INFO_SCALE_SEPARATE_BIT |
416 IIO_CHAN_INFO_OFFSET_SEPARATE_BIT,
417 .address = temp,
418 .scan_index = ADIS16201_SCAN_TEMP,
419 .scan_type = {
420 .sign = 'u',
421 .realbits = 12,
422 .storagebits = 16,
423 },
424 }, {
425 .type = IIO_ACCEL,
426 .modified = 1,
427 .channel2 = IIO_MOD_X,
428 .info_mask = IIO_CHAN_INFO_RAW_SEPARATE_BIT |
429 IIO_CHAN_INFO_SCALE_SHARED_BIT |
430 IIO_CHAN_INFO_CALIBBIAS_SEPARATE_BIT,
431 .address = accel_x,
432 .scan_index = ADIS16201_SCAN_ACC_X,
433 .scan_type = {
434 .sign = 's',
435 .realbits = 14,
436 .storagebits = 16,
437 },
438 }, {
439 .type = IIO_ACCEL,
440 .modified = 1,
441 .channel2 = IIO_MOD_Y,
442 .info_mask = IIO_CHAN_INFO_RAW_SEPARATE_BIT |
443 IIO_CHAN_INFO_SCALE_SHARED_BIT |
444 IIO_CHAN_INFO_CALIBBIAS_SEPARATE_BIT,
445 .address = accel_y,
446 .scan_index = ADIS16201_SCAN_ACC_Y,
447 .scan_type = {
448 .sign = 's',
449 .realbits = 14,
450 .storagebits = 16,
451 },
452 }, {
453 .type = IIO_VOLTAGE,
454 .indexed = 1,
455 .channel = 1,
456 .info_mask = IIO_CHAN_INFO_RAW_SEPARATE_BIT |
457 IIO_CHAN_INFO_SCALE_SEPARATE_BIT,
458 .address = in_aux,
459 .scan_index = ADIS16201_SCAN_AUX_ADC,
460 .scan_type = {
461 .sign = 'u',
462 .realbits = 12,
463 .storagebits = 16,
464 },
465 }, {
466 .type = IIO_INCLI,
467 .modified = 1,
468 .channel2 = IIO_MOD_X,
469 .info_mask = IIO_CHAN_INFO_RAW_SEPARATE_BIT |
470 IIO_CHAN_INFO_SCALE_SHARED_BIT |
471 IIO_CHAN_INFO_CALIBBIAS_SEPARATE_BIT,
472 .address = incli_x,
473 .scan_index = ADIS16201_SCAN_INCLI_X,
474 .scan_type = {
475 .sign = 's',
476 .realbits = 14,
477 .storagebits = 16,
478 },
479 }, {
480 .type = IIO_INCLI,
481 .modified = 1,
482 .channel2 = IIO_MOD_Y,
483 .info_mask = IIO_CHAN_INFO_RAW_SEPARATE_BIT |
484 IIO_CHAN_INFO_SCALE_SHARED_BIT |
485 IIO_CHAN_INFO_CALIBBIAS_SEPARATE_BIT,
486 .address = incli_y,
487 .scan_index = ADIS16201_SCAN_INCLI_Y,
488 .scan_type = {
489 .sign = 's',
490 .realbits = 14,
491 .storagebits = 16,
492 },
493 },
494 IIO_CHAN_SOFT_TIMESTAMP(7) 145 IIO_CHAN_SOFT_TIMESTAMP(7)
495}; 146};
496 147
497static const struct iio_info adis16201_info = { 148static const struct iio_info adis16201_info = {
498 .read_raw = &adis16201_read_raw, 149 .read_raw = &adis16201_read_raw,
499 .write_raw = &adis16201_write_raw, 150 .write_raw = &adis16201_write_raw,
151 .update_scan_mode = adis_update_scan_mode,
500 .driver_module = THIS_MODULE, 152 .driver_module = THIS_MODULE,
501}; 153};
502 154
503static int __devinit adis16201_probe(struct spi_device *spi) 155static const char * const adis16201_status_error_msgs[] = {
156 [ADIS16201_DIAG_STAT_SPI_FAIL_BIT] = "SPI failure",
157 [ADIS16201_DIAG_STAT_FLASH_UPT_BIT] = "Flash update failed",
158 [ADIS16201_DIAG_STAT_POWER_HIGH_BIT] = "Power supply above 3.625V",
159 [ADIS16201_DIAG_STAT_POWER_LOW_BIT] = "Power supply below 3.15V",
160};
161
162static const struct adis_data adis16201_data = {
163 .read_delay = 20,
164 .msc_ctrl_reg = ADIS16201_MSC_CTRL,
165 .glob_cmd_reg = ADIS16201_GLOB_CMD,
166 .diag_stat_reg = ADIS16201_DIAG_STAT,
167
168 .self_test_mask = ADIS16201_MSC_CTRL_SELF_TEST_EN,
169 .startup_delay = ADIS16201_STARTUP_DELAY,
170
171 .status_error_msgs = adis16201_status_error_msgs,
172 .status_error_mask = BIT(ADIS16201_DIAG_STAT_SPI_FAIL_BIT) |
173 BIT(ADIS16201_DIAG_STAT_FLASH_UPT_BIT) |
174 BIT(ADIS16201_DIAG_STAT_POWER_HIGH_BIT) |
175 BIT(ADIS16201_DIAG_STAT_POWER_LOW_BIT),
176};
177
178static int adis16201_probe(struct spi_device *spi)
504{ 179{
505 int ret; 180 int ret;
506 struct adis16201_state *st; 181 struct adis *st;
507 struct iio_dev *indio_dev; 182 struct iio_dev *indio_dev;
508 183
509 /* setup the industrialio driver allocated elements */ 184 /* setup the industrialio driver allocated elements */
@@ -516,9 +191,6 @@ static int __devinit adis16201_probe(struct spi_device *spi)
516 /* this is only used for removal purposes */ 191 /* this is only used for removal purposes */
517 spi_set_drvdata(spi, indio_dev); 192 spi_set_drvdata(spi, indio_dev);
518 193
519 st->us = spi;
520 mutex_init(&st->buf_lock);
521
522 indio_dev->name = spi->dev.driver->name; 194 indio_dev->name = spi->dev.driver->name;
523 indio_dev->dev.parent = &spi->dev; 195 indio_dev->dev.parent = &spi->dev;
524 indio_dev->info = &adis16201_info; 196 indio_dev->info = &adis16201_info;
@@ -527,54 +199,38 @@ static int __devinit adis16201_probe(struct spi_device *spi)
527 indio_dev->num_channels = ARRAY_SIZE(adis16201_channels); 199 indio_dev->num_channels = ARRAY_SIZE(adis16201_channels);
528 indio_dev->modes = INDIO_DIRECT_MODE; 200 indio_dev->modes = INDIO_DIRECT_MODE;
529 201
530 ret = adis16201_configure_ring(indio_dev); 202 ret = adis_init(st, indio_dev, spi, &adis16201_data);
203 if (ret)
204 goto error_free_dev;
205 ret = adis_setup_buffer_and_trigger(st, indio_dev, NULL);
531 if (ret) 206 if (ret)
532 goto error_free_dev; 207 goto error_free_dev;
533
534 ret = iio_buffer_register(indio_dev,
535 adis16201_channels,
536 ARRAY_SIZE(adis16201_channels));
537 if (ret) {
538 printk(KERN_ERR "failed to initialize the ring\n");
539 goto error_unreg_ring_funcs;
540 }
541
542 if (spi->irq) {
543 ret = adis16201_probe_trigger(indio_dev);
544 if (ret)
545 goto error_uninitialize_ring;
546 }
547 208
548 /* Get the device into a sane initial state */ 209 /* Get the device into a sane initial state */
549 ret = adis16201_initial_setup(indio_dev); 210 ret = adis_initial_startup(st);
550 if (ret) 211 if (ret)
551 goto error_remove_trigger; 212 goto error_cleanup_buffer_trigger;
552 213
553 ret = iio_device_register(indio_dev); 214 ret = iio_device_register(indio_dev);
554 if (ret < 0) 215 if (ret < 0)
555 goto error_remove_trigger; 216 goto error_cleanup_buffer_trigger;
556 return 0; 217 return 0;
557 218
558error_remove_trigger: 219error_cleanup_buffer_trigger:
559 adis16201_remove_trigger(indio_dev); 220 adis_cleanup_buffer_and_trigger(st, indio_dev);
560error_uninitialize_ring:
561 iio_buffer_unregister(indio_dev);
562error_unreg_ring_funcs:
563 adis16201_unconfigure_ring(indio_dev);
564error_free_dev: 221error_free_dev:
565 iio_device_free(indio_dev); 222 iio_device_free(indio_dev);
566error_ret: 223error_ret:
567 return ret; 224 return ret;
568} 225}
569 226
570static int __devexit adis16201_remove(struct spi_device *spi) 227static int adis16201_remove(struct spi_device *spi)
571{ 228{
572 struct iio_dev *indio_dev = spi_get_drvdata(spi); 229 struct iio_dev *indio_dev = spi_get_drvdata(spi);
230 struct adis *st = iio_priv(indio_dev);
573 231
574 iio_device_unregister(indio_dev); 232 iio_device_unregister(indio_dev);
575 adis16201_remove_trigger(indio_dev); 233 adis_cleanup_buffer_and_trigger(st, indio_dev);
576 iio_buffer_unregister(indio_dev);
577 adis16201_unconfigure_ring(indio_dev);
578 iio_device_free(indio_dev); 234 iio_device_free(indio_dev);
579 235
580 return 0; 236 return 0;
@@ -586,7 +242,7 @@ static struct spi_driver adis16201_driver = {
586 .owner = THIS_MODULE, 242 .owner = THIS_MODULE,
587 }, 243 },
588 .probe = adis16201_probe, 244 .probe = adis16201_probe,
589 .remove = __devexit_p(adis16201_remove), 245 .remove = adis16201_remove,
590}; 246};
591module_spi_driver(adis16201_driver); 247module_spi_driver(adis16201_driver);
592 248
diff --git a/drivers/staging/iio/accel/adis16201_ring.c b/drivers/staging/iio/accel/adis16201_ring.c
deleted file mode 100644
index 97c09f0c26ae..000000000000
--- a/drivers/staging/iio/accel/adis16201_ring.c
+++ /dev/null
@@ -1,136 +0,0 @@
1#include <linux/export.h>
2#include <linux/interrupt.h>
3#include <linux/mutex.h>
4#include <linux/kernel.h>
5#include <linux/spi/spi.h>
6#include <linux/slab.h>
7
8#include <linux/iio/iio.h>
9#include "../ring_sw.h"
10#include <linux/iio/trigger_consumer.h>
11#include "adis16201.h"
12
13
14/**
15 * adis16201_read_ring_data() read data registers which will be placed into ring
16 * @dev: device associated with child of actual device (iio_dev or iio_trig)
17 * @rx: somewhere to pass back the value read
18 **/
19static int adis16201_read_ring_data(struct iio_dev *indio_dev, u8 *rx)
20{
21 struct spi_message msg;
22 struct adis16201_state *st = iio_priv(indio_dev);
23 struct spi_transfer xfers[ADIS16201_OUTPUTS + 1];
24 int ret;
25 int i;
26
27 mutex_lock(&st->buf_lock);
28
29 spi_message_init(&msg);
30
31 memset(xfers, 0, sizeof(xfers));
32 for (i = 0; i <= ADIS16201_OUTPUTS; i++) {
33 xfers[i].bits_per_word = 8;
34 xfers[i].cs_change = 1;
35 xfers[i].len = 2;
36 xfers[i].delay_usecs = 20;
37 if (i < ADIS16201_OUTPUTS) {
38 xfers[i].tx_buf = st->tx + 2 * i;
39 st->tx[2 * i] = ADIS16201_READ_REG(ADIS16201_SUPPLY_OUT +
40 2 * i);
41 st->tx[2 * i + 1] = 0;
42 }
43 if (i >= 1)
44 xfers[i].rx_buf = rx + 2 * (i - 1);
45 spi_message_add_tail(&xfers[i], &msg);
46 }
47
48 ret = spi_sync(st->us, &msg);
49 if (ret)
50 dev_err(&st->us->dev, "problem when burst reading");
51
52 mutex_unlock(&st->buf_lock);
53
54 return ret;
55}
56
57/* Whilst this makes a lot of calls to iio_sw_ring functions - it is to device
58 * specific to be rolled into the core.
59 */
60static irqreturn_t adis16201_trigger_handler(int irq, void *p)
61{
62 struct iio_poll_func *pf = p;
63 struct iio_dev *indio_dev = pf->indio_dev;
64 struct adis16201_state *st = iio_priv(indio_dev);
65
66 int i = 0;
67 s16 *data;
68
69 data = kmalloc(indio_dev->scan_bytes, GFP_KERNEL);
70 if (data == NULL) {
71 dev_err(&st->us->dev, "memory alloc failed in ring bh");
72 goto done;
73 }
74
75 if (!bitmap_empty(indio_dev->active_scan_mask, indio_dev->masklength)
76 && adis16201_read_ring_data(indio_dev, st->rx) >= 0)
77 for (; i < bitmap_weight(indio_dev->active_scan_mask,
78 indio_dev->masklength); i++)
79 data[i] = be16_to_cpup((__be16 *)&(st->rx[i*2]));
80
81 /* Guaranteed to be aligned with 8 byte boundary */
82 if (indio_dev->scan_timestamp)
83 *((s64 *)(data + ((i + 3)/4)*4)) = pf->timestamp;
84
85 iio_push_to_buffer(indio_dev->buffer, (u8 *)data);
86
87 kfree(data);
88done:
89 iio_trigger_notify_done(indio_dev->trig);
90
91 return IRQ_HANDLED;
92}
93
94void adis16201_unconfigure_ring(struct iio_dev *indio_dev)
95{
96 iio_dealloc_pollfunc(indio_dev->pollfunc);
97 iio_sw_rb_free(indio_dev->buffer);
98}
99
100static const struct iio_buffer_setup_ops adis16201_ring_setup_ops = {
101 .preenable = &iio_sw_buffer_preenable,
102 .postenable = &iio_triggered_buffer_postenable,
103 .predisable = &iio_triggered_buffer_predisable,
104};
105
106int adis16201_configure_ring(struct iio_dev *indio_dev)
107{
108 int ret = 0;
109 struct iio_buffer *ring;
110
111 ring = iio_sw_rb_allocate(indio_dev);
112 if (!ring) {
113 ret = -ENOMEM;
114 return ret;
115 }
116 indio_dev->buffer = ring;
117 ring->scan_timestamp = true;
118 indio_dev->setup_ops = &adis16201_ring_setup_ops;
119
120 indio_dev->pollfunc = iio_alloc_pollfunc(&iio_pollfunc_store_time,
121 &adis16201_trigger_handler,
122 IRQF_ONESHOT,
123 indio_dev,
124 "adis16201_consumer%d",
125 indio_dev->id);
126 if (indio_dev->pollfunc == NULL) {
127 ret = -ENOMEM;
128 goto error_iio_sw_rb_free;
129 }
130
131 indio_dev->modes |= INDIO_BUFFER_TRIGGERED;
132 return 0;
133error_iio_sw_rb_free:
134 iio_sw_rb_free(indio_dev->buffer);
135 return ret;
136}
diff --git a/drivers/staging/iio/accel/adis16201_trigger.c b/drivers/staging/iio/accel/adis16201_trigger.c
deleted file mode 100644
index 96fdabbac201..000000000000
--- a/drivers/staging/iio/accel/adis16201_trigger.c
+++ /dev/null
@@ -1,71 +0,0 @@
1#include <linux/interrupt.h>
2#include <linux/kernel.h>
3#include <linux/spi/spi.h>
4#include <linux/export.h>
5
6#include <linux/iio/iio.h>
7#include <linux/iio/trigger.h>
8#include "adis16201.h"
9
10/**
11 * adis16201_data_rdy_trigger_set_state() set datardy interrupt state
12 **/
13static int adis16201_data_rdy_trigger_set_state(struct iio_trigger *trig,
14 bool state)
15{
16 struct iio_dev *indio_dev = trig->private_data;
17
18 dev_dbg(&indio_dev->dev, "%s (%d)\n", __func__, state);
19 return adis16201_set_irq(indio_dev, state);
20}
21
22static const struct iio_trigger_ops adis16201_trigger_ops = {
23 .owner = THIS_MODULE,
24 .set_trigger_state = &adis16201_data_rdy_trigger_set_state,
25};
26
27int adis16201_probe_trigger(struct iio_dev *indio_dev)
28{
29 int ret;
30 struct adis16201_state *st = iio_priv(indio_dev);
31
32 st->trig = iio_trigger_alloc("adis16201-dev%d", indio_dev->id);
33 if (st->trig == NULL) {
34 ret = -ENOMEM;
35 goto error_ret;
36 }
37 ret = request_irq(st->us->irq,
38 &iio_trigger_generic_data_rdy_poll,
39 IRQF_TRIGGER_RISING,
40 "adis16201",
41 st->trig);
42 if (ret)
43 goto error_free_trig;
44 st->trig->dev.parent = &st->us->dev;
45 st->trig->ops = &adis16201_trigger_ops;
46 st->trig->private_data = indio_dev;
47 ret = iio_trigger_register(st->trig);
48
49 /* select default trigger */
50 indio_dev->trig = st->trig;
51 if (ret)
52 goto error_free_irq;
53
54 return 0;
55
56error_free_irq:
57 free_irq(st->us->irq, st->trig);
58error_free_trig:
59 iio_trigger_free(st->trig);
60error_ret:
61 return ret;
62}
63
64void adis16201_remove_trigger(struct iio_dev *indio_dev)
65{
66 struct adis16201_state *state = iio_priv(indio_dev);
67
68 iio_trigger_unregister(state->trig);
69 free_irq(state->us->irq, state->trig);
70 iio_trigger_free(state->trig);
71}
diff --git a/drivers/staging/iio/accel/adis16203.h b/drivers/staging/iio/accel/adis16203.h
index 3f96ad3bbd66..acc688d7ea9e 100644
--- a/drivers/staging/iio/accel/adis16203.h
+++ b/drivers/staging/iio/accel/adis16203.h
@@ -3,9 +3,6 @@
3 3
4#define ADIS16203_STARTUP_DELAY 220 /* ms */ 4#define ADIS16203_STARTUP_DELAY 220 /* ms */
5 5
6#define ADIS16203_READ_REG(a) a
7#define ADIS16203_WRITE_REG(a) ((a) | 0x80)
8
9#define ADIS16203_FLASH_CNT 0x00 /* Flash memory write count */ 6#define ADIS16203_FLASH_CNT 0x00 /* Flash memory write count */
10#define ADIS16203_SUPPLY_OUT 0x02 /* Output, power supply */ 7#define ADIS16203_SUPPLY_OUT 0x02 /* Output, power supply */
11#define ADIS16203_AUX_ADC 0x08 /* Output, auxiliary ADC input */ 8#define ADIS16203_AUX_ADC 0x08 /* Output, auxiliary ADC input */
@@ -27,8 +24,6 @@
27#define ADIS16203_DIAG_STAT 0x3C /* Diagnostics, system status register */ 24#define ADIS16203_DIAG_STAT 0x3C /* Diagnostics, system status register */
28#define ADIS16203_GLOB_CMD 0x3E /* Operation, system command register */ 25#define ADIS16203_GLOB_CMD 0x3E /* Operation, system command register */
29 26
30#define ADIS16203_OUTPUTS 5
31
32/* MSC_CTRL */ 27/* MSC_CTRL */
33#define ADIS16203_MSC_CTRL_PWRUP_SELF_TEST (1 << 10) /* Self-test at power-on: 1 = disabled, 0 = enabled */ 28#define ADIS16203_MSC_CTRL_PWRUP_SELF_TEST (1 << 10) /* Self-test at power-on: 1 = disabled, 0 = enabled */
34#define ADIS16203_MSC_CTRL_REVERSE_ROT_EN (1 << 9) /* Reverses rotation of both inclination outputs */ 29#define ADIS16203_MSC_CTRL_REVERSE_ROT_EN (1 << 9) /* Reverses rotation of both inclination outputs */
@@ -40,86 +35,25 @@
40/* DIAG_STAT */ 35/* DIAG_STAT */
41#define ADIS16203_DIAG_STAT_ALARM2 (1<<9) /* Alarm 2 status: 1 = alarm active, 0 = alarm inactive */ 36#define ADIS16203_DIAG_STAT_ALARM2 (1<<9) /* Alarm 2 status: 1 = alarm active, 0 = alarm inactive */
42#define ADIS16203_DIAG_STAT_ALARM1 (1<<8) /* Alarm 1 status: 1 = alarm active, 0 = alarm inactive */ 37#define ADIS16203_DIAG_STAT_ALARM1 (1<<8) /* Alarm 1 status: 1 = alarm active, 0 = alarm inactive */
43#define ADIS16203_DIAG_STAT_SELFTEST_FAIL (1<<5) /* Self-test diagnostic error flag */ 38#define ADIS16203_DIAG_STAT_SELFTEST_FAIL_BIT 5 /* Self-test diagnostic error flag */
44#define ADIS16203_DIAG_STAT_SPI_FAIL (1<<3) /* SPI communications failure */ 39#define ADIS16203_DIAG_STAT_SPI_FAIL_BIT 3 /* SPI communications failure */
45#define ADIS16203_DIAG_STAT_FLASH_UPT (1<<2) /* Flash update failure */ 40#define ADIS16203_DIAG_STAT_FLASH_UPT_BIT 2 /* Flash update failure */
46#define ADIS16203_DIAG_STAT_POWER_HIGH (1<<1) /* Power supply above 3.625 V */ 41#define ADIS16203_DIAG_STAT_POWER_HIGH_BIT 1 /* Power supply above 3.625 V */
47#define ADIS16203_DIAG_STAT_POWER_LOW (1<<0) /* Power supply below 3.15 V */ 42#define ADIS16203_DIAG_STAT_POWER_LOW_BIT 0 /* Power supply below 3.15 V */
48 43
49/* GLOB_CMD */ 44/* GLOB_CMD */
50#define ADIS16203_GLOB_CMD_SW_RESET (1<<7) 45#define ADIS16203_GLOB_CMD_SW_RESET (1<<7)
51#define ADIS16203_GLOB_CMD_CLEAR_STAT (1<<4) 46#define ADIS16203_GLOB_CMD_CLEAR_STAT (1<<4)
52#define ADIS16203_GLOB_CMD_FACTORY_CAL (1<<1) 47#define ADIS16203_GLOB_CMD_FACTORY_CAL (1<<1)
53 48
54#define ADIS16203_MAX_TX 12
55#define ADIS16203_MAX_RX 10
56
57#define ADIS16203_ERROR_ACTIVE (1<<14) 49#define ADIS16203_ERROR_ACTIVE (1<<14)
58 50
59/**
60 * struct adis16203_state - device instance specific data
61 * @us: actual spi_device
62 * @trig: data ready trigger registered with iio
63 * @tx: transmit buffer
64 * @rx: receive buffer
65 * @buf_lock: mutex to protect tx and rx
66 **/
67struct adis16203_state {
68 struct spi_device *us;
69 struct iio_trigger *trig;
70 struct mutex buf_lock;
71 u8 tx[ADIS16203_MAX_TX] ____cacheline_aligned;
72 u8 rx[ADIS16203_MAX_RX];
73};
74
75int adis16203_set_irq(struct iio_dev *indio_dev, bool enable);
76
77enum adis16203_scan { 51enum adis16203_scan {
52 ADIS16203_SCAN_INCLI_X,
53 ADIS16203_SCAN_INCLI_Y,
78 ADIS16203_SCAN_SUPPLY, 54 ADIS16203_SCAN_SUPPLY,
79 ADIS16203_SCAN_AUX_ADC, 55 ADIS16203_SCAN_AUX_ADC,
80 ADIS16203_SCAN_TEMP, 56 ADIS16203_SCAN_TEMP,
81 ADIS16203_SCAN_INCLI_X,
82 ADIS16203_SCAN_INCLI_Y,
83}; 57};
84 58
85#ifdef CONFIG_IIO_BUFFER
86void adis16203_remove_trigger(struct iio_dev *indio_dev);
87int adis16203_probe_trigger(struct iio_dev *indio_dev);
88
89ssize_t adis16203_read_data_from_ring(struct device *dev,
90 struct device_attribute *attr,
91 char *buf);
92
93int adis16203_configure_ring(struct iio_dev *indio_dev);
94void adis16203_unconfigure_ring(struct iio_dev *indio_dev);
95
96#else /* CONFIG_IIO_BUFFER */
97
98static inline void adis16203_remove_trigger(struct iio_dev *indio_dev)
99{
100}
101
102static inline int adis16203_probe_trigger(struct iio_dev *indio_dev)
103{
104 return 0;
105}
106
107static inline ssize_t
108adis16203_read_data_from_ring(struct device *dev,
109 struct device_attribute *attr,
110 char *buf)
111{
112 return 0;
113}
114
115static int adis16203_configure_ring(struct iio_dev *indio_dev)
116{
117 return 0;
118}
119
120static inline void adis16203_unconfigure_ring(struct iio_dev *indio_dev)
121{
122}
123
124#endif /* CONFIG_IIO_BUFFER */
125#endif /* SPI_ADIS16203_H_ */ 59#endif /* SPI_ADIS16203_H_ */
diff --git a/drivers/staging/iio/accel/adis16203_core.c b/drivers/staging/iio/accel/adis16203_core.c
index e7b3441115ae..8c235273ff13 100644
--- a/drivers/staging/iio/accel/adis16203_core.c
+++ b/drivers/staging/iio/accel/adis16203_core.c
@@ -1,7 +1,7 @@
1/* 1/*
2 * ADIS16203 Programmable Digital Vibration Sensor driver 2 * ADIS16203 Programmable Digital Vibration Sensor driver
3 * 3 *
4 * Copyright 2010 Analog Devices Inc. 4 * Copyright 2030 Analog Devices Inc.
5 * 5 *
6 * Licensed under the GPL-2 or later. 6 * Licensed under the GPL-2 or later.
7 */ 7 */
@@ -18,254 +18,14 @@
18#include <linux/iio/iio.h> 18#include <linux/iio/iio.h>
19#include <linux/iio/sysfs.h> 19#include <linux/iio/sysfs.h>
20#include <linux/iio/buffer.h> 20#include <linux/iio/buffer.h>
21#include <linux/iio/imu/adis.h>
21 22
22#include "adis16203.h" 23#include "adis16203.h"
23 24
24#define DRIVER_NAME "adis16203" 25#define DRIVER_NAME "adis16203"
25 26
26/** 27static const u8 adis16203_addresses[] = {
27 * adis16203_spi_write_reg_8() - write single byte to a register 28 [ADIS16203_SCAN_INCLI_X] = ADIS16203_INCL_NULL,
28 * @indio_dev: iio device associated with child of actual device
29 * @reg_address: the address of the register to be written
30 * @val: the value to write
31 **/
32static int adis16203_spi_write_reg_8(struct iio_dev *indio_dev,
33 u8 reg_address,
34 u8 val)
35{
36 int ret;
37 struct adis16203_state *st = iio_priv(indio_dev);
38
39 mutex_lock(&st->buf_lock);
40 st->tx[0] = ADIS16203_WRITE_REG(reg_address);
41 st->tx[1] = val;
42
43 ret = spi_write(st->us, st->tx, 2);
44 mutex_unlock(&st->buf_lock);
45
46 return ret;
47}
48
49/**
50 * adis16203_spi_write_reg_16() - write 2 bytes to a pair of registers
51 * @indio_dev: iio device associated with child of actual device
52 * @reg_address: the address of the lower of the two registers. Second register
53 * is assumed to have address one greater.
54 * @val: value to be written
55 **/
56static int adis16203_spi_write_reg_16(struct iio_dev *indio_dev,
57 u8 lower_reg_address,
58 u16 value)
59{
60 int ret;
61 struct spi_message msg;
62 struct adis16203_state *st = iio_priv(indio_dev);
63 struct spi_transfer xfers[] = {
64 {
65 .tx_buf = st->tx,
66 .bits_per_word = 8,
67 .len = 2,
68 .cs_change = 1,
69 }, {
70 .tx_buf = st->tx + 2,
71 .bits_per_word = 8,
72 .len = 2,
73 },
74 };
75
76 mutex_lock(&st->buf_lock);
77 st->tx[0] = ADIS16203_WRITE_REG(lower_reg_address);
78 st->tx[1] = value & 0xFF;
79 st->tx[2] = ADIS16203_WRITE_REG(lower_reg_address + 1);
80 st->tx[3] = (value >> 8) & 0xFF;
81
82 spi_message_init(&msg);
83 spi_message_add_tail(&xfers[0], &msg);
84 spi_message_add_tail(&xfers[1], &msg);
85 ret = spi_sync(st->us, &msg);
86 mutex_unlock(&st->buf_lock);
87
88 return ret;
89}
90
91/**
92 * adis16203_spi_read_reg_16() - read 2 bytes from a 16-bit register
93 * @indio_dev: iio device associated with child of actual device
94 * @reg_address: the address of the lower of the two registers. Second register
95 * is assumed to have address one greater.
96 * @val: somewhere to pass back the value read
97 **/
98static int adis16203_spi_read_reg_16(struct iio_dev *indio_dev,
99 u8 lower_reg_address,
100 u16 *val)
101{
102 struct spi_message msg;
103 struct adis16203_state *st = iio_priv(indio_dev);
104 int ret;
105 struct spi_transfer xfers[] = {
106 {
107 .tx_buf = st->tx,
108 .bits_per_word = 8,
109 .len = 2,
110 .cs_change = 1,
111 .delay_usecs = 20,
112 }, {
113 .rx_buf = st->rx,
114 .bits_per_word = 8,
115 .len = 2,
116 .delay_usecs = 20,
117 },
118 };
119
120 mutex_lock(&st->buf_lock);
121 st->tx[0] = ADIS16203_READ_REG(lower_reg_address);
122 st->tx[1] = 0;
123
124 spi_message_init(&msg);
125 spi_message_add_tail(&xfers[0], &msg);
126 spi_message_add_tail(&xfers[1], &msg);
127 ret = spi_sync(st->us, &msg);
128 if (ret) {
129 dev_err(&st->us->dev, "problem when reading 16 bit register 0x%02X",
130 lower_reg_address);
131 goto error_ret;
132 }
133 *val = (st->rx[0] << 8) | st->rx[1];
134
135error_ret:
136 mutex_unlock(&st->buf_lock);
137 return ret;
138}
139
140static int adis16203_check_status(struct iio_dev *indio_dev)
141{
142 u16 status;
143 int ret;
144
145 ret = adis16203_spi_read_reg_16(indio_dev,
146 ADIS16203_DIAG_STAT,
147 &status);
148 if (ret < 0) {
149 dev_err(&indio_dev->dev, "Reading status failed\n");
150 goto error_ret;
151 }
152 ret = status & 0x1F;
153
154 if (status & ADIS16203_DIAG_STAT_SELFTEST_FAIL)
155 dev_err(&indio_dev->dev, "Self test failure\n");
156 if (status & ADIS16203_DIAG_STAT_SPI_FAIL)
157 dev_err(&indio_dev->dev, "SPI failure\n");
158 if (status & ADIS16203_DIAG_STAT_FLASH_UPT)
159 dev_err(&indio_dev->dev, "Flash update failed\n");
160 if (status & ADIS16203_DIAG_STAT_POWER_HIGH)
161 dev_err(&indio_dev->dev, "Power supply above 3.625V\n");
162 if (status & ADIS16203_DIAG_STAT_POWER_LOW)
163 dev_err(&indio_dev->dev, "Power supply below 3.15V\n");
164
165error_ret:
166 return ret;
167}
168
169static int adis16203_reset(struct iio_dev *indio_dev)
170{
171 int ret;
172 ret = adis16203_spi_write_reg_8(indio_dev,
173 ADIS16203_GLOB_CMD,
174 ADIS16203_GLOB_CMD_SW_RESET);
175 if (ret)
176 dev_err(&indio_dev->dev, "problem resetting device");
177
178 return ret;
179}
180
181int adis16203_set_irq(struct iio_dev *indio_dev, bool enable)
182{
183 int ret = 0;
184 u16 msc;
185
186 ret = adis16203_spi_read_reg_16(indio_dev, ADIS16203_MSC_CTRL, &msc);
187 if (ret)
188 goto error_ret;
189
190 msc |= ADIS16203_MSC_CTRL_ACTIVE_HIGH;
191 msc &= ~ADIS16203_MSC_CTRL_DATA_RDY_DIO1;
192 if (enable)
193 msc |= ADIS16203_MSC_CTRL_DATA_RDY_EN;
194 else
195 msc &= ~ADIS16203_MSC_CTRL_DATA_RDY_EN;
196
197 ret = adis16203_spi_write_reg_16(indio_dev, ADIS16203_MSC_CTRL, msc);
198
199error_ret:
200 return ret;
201}
202
203static int adis16203_self_test(struct iio_dev *indio_dev)
204{
205 int ret;
206 ret = adis16203_spi_write_reg_16(indio_dev,
207 ADIS16203_MSC_CTRL,
208 ADIS16203_MSC_CTRL_SELF_TEST_EN);
209 if (ret) {
210 dev_err(&indio_dev->dev, "problem starting self test");
211 goto err_ret;
212 }
213
214 adis16203_check_status(indio_dev);
215
216err_ret:
217 return ret;
218}
219
220static int adis16203_initial_setup(struct iio_dev *indio_dev)
221{
222 int ret;
223
224 /* Disable IRQ */
225 ret = adis16203_set_irq(indio_dev, false);
226 if (ret) {
227 dev_err(&indio_dev->dev, "disable irq failed");
228 goto err_ret;
229 }
230
231 /* Do self test */
232 ret = adis16203_self_test(indio_dev);
233 if (ret) {
234 dev_err(&indio_dev->dev, "self test failure");
235 goto err_ret;
236 }
237
238 /* Read status register to check the result */
239 ret = adis16203_check_status(indio_dev);
240 if (ret) {
241 adis16203_reset(indio_dev);
242 dev_err(&indio_dev->dev, "device not playing ball -> reset");
243 msleep(ADIS16203_STARTUP_DELAY);
244 ret = adis16203_check_status(indio_dev);
245 if (ret) {
246 dev_err(&indio_dev->dev, "giving up");
247 goto err_ret;
248 }
249 }
250
251err_ret:
252 return ret;
253}
254
255enum adis16203_chan {
256 in_supply,
257 in_aux,
258 incli_x,
259 incli_y,
260 temp,
261};
262
263static u8 adis16203_addresses[5][2] = {
264 [in_supply] = { ADIS16203_SUPPLY_OUT },
265 [in_aux] = { ADIS16203_AUX_ADC },
266 [incli_x] = { ADIS16203_XINCL_OUT, ADIS16203_INCL_NULL},
267 [incli_y] = { ADIS16203_YINCL_OUT },
268 [temp] = { ADIS16203_TEMP_OUT }
269}; 29};
270 30
271static int adis16203_write_raw(struct iio_dev *indio_dev, 31static int adis16203_write_raw(struct iio_dev *indio_dev,
@@ -274,9 +34,10 @@ static int adis16203_write_raw(struct iio_dev *indio_dev,
274 int val2, 34 int val2,
275 long mask) 35 long mask)
276{ 36{
37 struct adis *st = iio_priv(indio_dev);
277 /* currently only one writable parameter which keeps this simple */ 38 /* currently only one writable parameter which keeps this simple */
278 u8 addr = adis16203_addresses[chan->address][1]; 39 u8 addr = adis16203_addresses[chan->scan_index];
279 return adis16203_spi_write_reg_16(indio_dev, addr, val & 0x3FFF); 40 return adis_write_reg_16(st, addr, val & 0x3FFF);
280} 41}
281 42
282static int adis16203_read_raw(struct iio_dev *indio_dev, 43static int adis16203_read_raw(struct iio_dev *indio_dev,
@@ -284,35 +45,15 @@ static int adis16203_read_raw(struct iio_dev *indio_dev,
284 int *val, int *val2, 45 int *val, int *val2,
285 long mask) 46 long mask)
286{ 47{
48 struct adis *st = iio_priv(indio_dev);
287 int ret; 49 int ret;
288 int bits; 50 int bits;
289 u8 addr; 51 u8 addr;
290 s16 val16; 52 s16 val16;
291 switch (mask) { 53 switch (mask) {
292 case IIO_CHAN_INFO_RAW: 54 case IIO_CHAN_INFO_RAW:
293 mutex_lock(&indio_dev->mlock); 55 return adis_single_conversion(indio_dev, chan,
294 addr = adis16203_addresses[chan->address][0]; 56 ADIS16203_ERROR_ACTIVE, val);
295 ret = adis16203_spi_read_reg_16(indio_dev, addr, &val16);
296 if (ret) {
297 mutex_unlock(&indio_dev->mlock);
298 return ret;
299 }
300
301 if (val16 & ADIS16203_ERROR_ACTIVE) {
302 ret = adis16203_check_status(indio_dev);
303 if (ret) {
304 mutex_unlock(&indio_dev->mlock);
305 return ret;
306 }
307 }
308 val16 = val16 & ((1 << chan->scan_type.realbits) - 1);
309 if (chan->scan_type.sign == 's')
310 val16 = (s16)(val16 <<
311 (16 - chan->scan_type.realbits)) >>
312 (16 - chan->scan_type.realbits);
313 *val = val16;
314 mutex_unlock(&indio_dev->mlock);
315 return IIO_VAL_INT;
316 case IIO_CHAN_INFO_SCALE: 57 case IIO_CHAN_INFO_SCALE:
317 switch (chan->type) { 58 switch (chan->type) {
318 case IIO_VOLTAGE: 59 case IIO_VOLTAGE:
@@ -341,8 +82,8 @@ static int adis16203_read_raw(struct iio_dev *indio_dev,
341 case IIO_CHAN_INFO_CALIBBIAS: 82 case IIO_CHAN_INFO_CALIBBIAS:
342 bits = 14; 83 bits = 14;
343 mutex_lock(&indio_dev->mlock); 84 mutex_lock(&indio_dev->mlock);
344 addr = adis16203_addresses[chan->address][1]; 85 addr = adis16203_addresses[chan->scan_index];
345 ret = adis16203_spi_read_reg_16(indio_dev, addr, &val16); 86 ret = adis_read_reg_16(st, addr, &val16);
346 if (ret) { 87 if (ret) {
347 mutex_unlock(&indio_dev->mlock); 88 mutex_unlock(&indio_dev->mlock);
348 return ret; 89 return ret;
@@ -358,89 +99,53 @@ static int adis16203_read_raw(struct iio_dev *indio_dev,
358} 99}
359 100
360static const struct iio_chan_spec adis16203_channels[] = { 101static const struct iio_chan_spec adis16203_channels[] = {
361 { 102 ADIS_SUPPLY_CHAN(ADIS16203_SUPPLY_OUT, ADIS16203_SCAN_SUPPLY, 12),
362 .type = IIO_VOLTAGE, 103 ADIS_AUX_ADC_CHAN(ADIS16203_AUX_ADC, ADIS16203_SCAN_AUX_ADC, 12),
363 .indexed = 1, 104 ADIS_INCLI_CHAN(X, ADIS16203_XINCL_OUT, ADIS16203_SCAN_INCLI_X,
364 .channel = 0, 105 IIO_CHAN_INFO_CALIBBIAS_SEPARATE_BIT, 14),
365 .extend_name = "supply", 106 /* Fixme: Not what it appears to be - see data sheet */
366 .info_mask = IIO_CHAN_INFO_RAW_SEPARATE_BIT | 107 ADIS_INCLI_CHAN(Y, ADIS16203_YINCL_OUT, ADIS16203_SCAN_INCLI_Y, 0, 14),
367 IIO_CHAN_INFO_SCALE_SEPARATE_BIT, 108 ADIS_TEMP_CHAN(ADIS16203_TEMP_OUT, ADIS16203_SCAN_TEMP, 12),
368 .address = in_supply,
369 .scan_index = ADIS16203_SCAN_SUPPLY,
370 .scan_type = {
371 .sign = 'u',
372 .realbits = 12,
373 .storagebits = 16,
374 },
375 }, {
376 .type = IIO_VOLTAGE,
377 .indexed = 1,
378 .channel = 1,
379 .info_mask = IIO_CHAN_INFO_RAW_SEPARATE_BIT |
380 IIO_CHAN_INFO_SCALE_SEPARATE_BIT,
381 .address = in_aux,
382 .scan_index = ADIS16203_SCAN_AUX_ADC,
383 .scan_type = {
384 .sign = 'u',
385 .realbits = 12,
386 .storagebits = 16,
387 },
388 }, {
389 .type = IIO_INCLI,
390 .modified = 1,
391 .channel2 = IIO_MOD_X,
392 .info_mask = IIO_CHAN_INFO_RAW_SEPARATE_BIT |
393 IIO_CHAN_INFO_SCALE_SHARED_BIT |
394 IIO_CHAN_INFO_CALIBBIAS_SEPARATE_BIT,
395 .address = incli_x,
396 .scan_index = ADIS16203_SCAN_INCLI_X,
397 .scan_type = {
398 .sign = 's',
399 .realbits = 14,
400 .storagebits = 16,
401 },
402 }, { /* Fixme: Not what it appears to be - see data sheet */
403 .type = IIO_INCLI,
404 .modified = 1,
405 .channel2 = IIO_MOD_Y,
406 .info_mask = IIO_CHAN_INFO_RAW_SEPARATE_BIT |
407 IIO_CHAN_INFO_SCALE_SHARED_BIT,
408 .address = incli_y,
409 .scan_index = ADIS16203_SCAN_INCLI_Y,
410 .scan_type = {
411 .sign = 's',
412 .realbits = 14,
413 .storagebits = 16,
414 },
415 }, {
416 .type = IIO_TEMP,
417 .indexed = 1,
418 .channel = 0,
419 .info_mask = IIO_CHAN_INFO_RAW_SEPARATE_BIT |
420 IIO_CHAN_INFO_SCALE_SEPARATE_BIT |
421 IIO_CHAN_INFO_OFFSET_SEPARATE_BIT,
422 .address = temp,
423 .scan_index = ADIS16203_SCAN_TEMP,
424 .scan_type = {
425 .sign = 'u',
426 .realbits = 12,
427 .storagebits = 16,
428 },
429 },
430 IIO_CHAN_SOFT_TIMESTAMP(5), 109 IIO_CHAN_SOFT_TIMESTAMP(5),
431}; 110};
432 111
433static const struct iio_info adis16203_info = { 112static const struct iio_info adis16203_info = {
434 .read_raw = &adis16203_read_raw, 113 .read_raw = &adis16203_read_raw,
435 .write_raw = &adis16203_write_raw, 114 .write_raw = &adis16203_write_raw,
115 .update_scan_mode = adis_update_scan_mode,
436 .driver_module = THIS_MODULE, 116 .driver_module = THIS_MODULE,
437}; 117};
438 118
439static int __devinit adis16203_probe(struct spi_device *spi) 119static const char * const adis16203_status_error_msgs[] = {
120 [ADIS16203_DIAG_STAT_SELFTEST_FAIL_BIT] = "Self test failure",
121 [ADIS16203_DIAG_STAT_SPI_FAIL_BIT] = "SPI failure",
122 [ADIS16203_DIAG_STAT_FLASH_UPT_BIT] = "Flash update failed",
123 [ADIS16203_DIAG_STAT_POWER_HIGH_BIT] = "Power supply above 3.625V",
124 [ADIS16203_DIAG_STAT_POWER_LOW_BIT] = "Power supply below 3.15V",
125};
126
127static const struct adis_data adis16203_data = {
128 .read_delay = 20,
129 .msc_ctrl_reg = ADIS16203_MSC_CTRL,
130 .glob_cmd_reg = ADIS16203_GLOB_CMD,
131 .diag_stat_reg = ADIS16203_DIAG_STAT,
132
133 .self_test_mask = ADIS16203_MSC_CTRL_SELF_TEST_EN,
134 .startup_delay = ADIS16203_STARTUP_DELAY,
135
136 .status_error_msgs = adis16203_status_error_msgs,
137 .status_error_mask = BIT(ADIS16203_DIAG_STAT_SELFTEST_FAIL_BIT) |
138 BIT(ADIS16203_DIAG_STAT_SPI_FAIL_BIT) |
139 BIT(ADIS16203_DIAG_STAT_FLASH_UPT_BIT) |
140 BIT(ADIS16203_DIAG_STAT_POWER_HIGH_BIT) |
141 BIT(ADIS16203_DIAG_STAT_POWER_LOW_BIT),
142};
143
144static int adis16203_probe(struct spi_device *spi)
440{ 145{
441 int ret; 146 int ret;
442 struct iio_dev *indio_dev; 147 struct iio_dev *indio_dev;
443 struct adis16203_state *st; 148 struct adis *st;
444 149
445 /* setup the industrialio driver allocated elements */ 150 /* setup the industrialio driver allocated elements */
446 indio_dev = iio_device_alloc(sizeof(*st)); 151 indio_dev = iio_device_alloc(sizeof(*st));
@@ -451,8 +156,6 @@ static int __devinit adis16203_probe(struct spi_device *spi)
451 st = iio_priv(indio_dev); 156 st = iio_priv(indio_dev);
452 /* this is only used for removal purposes */ 157 /* this is only used for removal purposes */
453 spi_set_drvdata(spi, indio_dev); 158 spi_set_drvdata(spi, indio_dev);
454 st->us = spi;
455 mutex_init(&st->buf_lock);
456 159
457 indio_dev->name = spi->dev.driver->name; 160 indio_dev->name = spi->dev.driver->name;
458 indio_dev->dev.parent = &spi->dev; 161 indio_dev->dev.parent = &spi->dev;
@@ -461,55 +164,40 @@ static int __devinit adis16203_probe(struct spi_device *spi)
461 indio_dev->info = &adis16203_info; 164 indio_dev->info = &adis16203_info;
462 indio_dev->modes = INDIO_DIRECT_MODE; 165 indio_dev->modes = INDIO_DIRECT_MODE;
463 166
464 ret = adis16203_configure_ring(indio_dev); 167 ret = adis_init(st, indio_dev, spi, &adis16203_data);
465 if (ret) 168 if (ret)
466 goto error_free_dev; 169 goto error_free_dev;
467 170
468 ret = iio_buffer_register(indio_dev, 171 ret = adis_setup_buffer_and_trigger(st, indio_dev, NULL);
469 adis16203_channels, 172 if (ret)
470 ARRAY_SIZE(adis16203_channels)); 173 goto error_free_dev;
471 if (ret) {
472 printk(KERN_ERR "failed to initialize the ring\n");
473 goto error_unreg_ring_funcs;
474 }
475
476 if (spi->irq) {
477 ret = adis16203_probe_trigger(indio_dev);
478 if (ret)
479 goto error_uninitialize_ring;
480 }
481 174
482 /* Get the device into a sane initial state */ 175 /* Get the device into a sane initial state */
483 ret = adis16203_initial_setup(indio_dev); 176 ret = adis_initial_startup(st);
484 if (ret) 177 if (ret)
485 goto error_remove_trigger; 178 goto error_cleanup_buffer_trigger;
486 179
487 ret = iio_device_register(indio_dev); 180 ret = iio_device_register(indio_dev);
488 if (ret) 181 if (ret)
489 goto error_remove_trigger; 182 goto error_cleanup_buffer_trigger;
490 183
491 return 0; 184 return 0;
492 185
493error_remove_trigger: 186error_cleanup_buffer_trigger:
494 adis16203_remove_trigger(indio_dev); 187 adis_cleanup_buffer_and_trigger(st, indio_dev);
495error_uninitialize_ring:
496 iio_buffer_unregister(indio_dev);
497error_unreg_ring_funcs:
498 adis16203_unconfigure_ring(indio_dev);
499error_free_dev: 188error_free_dev:
500 iio_device_free(indio_dev); 189 iio_device_free(indio_dev);
501error_ret: 190error_ret:
502 return ret; 191 return ret;
503} 192}
504 193
505static int __devexit adis16203_remove(struct spi_device *spi) 194static int adis16203_remove(struct spi_device *spi)
506{ 195{
507 struct iio_dev *indio_dev = spi_get_drvdata(spi); 196 struct iio_dev *indio_dev = spi_get_drvdata(spi);
197 struct adis *st = iio_priv(indio_dev);
508 198
509 iio_device_unregister(indio_dev); 199 iio_device_unregister(indio_dev);
510 adis16203_remove_trigger(indio_dev); 200 adis_cleanup_buffer_and_trigger(st, indio_dev);
511 iio_buffer_unregister(indio_dev);
512 adis16203_unconfigure_ring(indio_dev);
513 iio_device_free(indio_dev); 201 iio_device_free(indio_dev);
514 202
515 return 0; 203 return 0;
@@ -521,7 +209,7 @@ static struct spi_driver adis16203_driver = {
521 .owner = THIS_MODULE, 209 .owner = THIS_MODULE,
522 }, 210 },
523 .probe = adis16203_probe, 211 .probe = adis16203_probe,
524 .remove = __devexit_p(adis16203_remove), 212 .remove = adis16203_remove,
525}; 213};
526module_spi_driver(adis16203_driver); 214module_spi_driver(adis16203_driver);
527 215
diff --git a/drivers/staging/iio/accel/adis16203_ring.c b/drivers/staging/iio/accel/adis16203_ring.c
deleted file mode 100644
index 7507e1a04591..000000000000
--- a/drivers/staging/iio/accel/adis16203_ring.c
+++ /dev/null
@@ -1,136 +0,0 @@
1#include <linux/export.h>
2#include <linux/interrupt.h>
3#include <linux/mutex.h>
4#include <linux/kernel.h>
5#include <linux/spi/spi.h>
6#include <linux/slab.h>
7
8#include <linux/iio/iio.h>
9#include "../ring_sw.h"
10#include <linux/iio/trigger_consumer.h>
11#include "adis16203.h"
12
13/**
14 * adis16203_read_ring_data() read data registers which will be placed into ring
15 * @indio_dev: the IIO device
16 * @rx: somewhere to pass back the value read
17 **/
18static int adis16203_read_ring_data(struct iio_dev *indio_dev, u8 *rx)
19{
20 struct spi_message msg;
21 struct adis16203_state *st = iio_priv(indio_dev);
22 struct spi_transfer xfers[ADIS16203_OUTPUTS + 1];
23 int ret;
24 int i;
25
26 mutex_lock(&st->buf_lock);
27
28 spi_message_init(&msg);
29
30 memset(xfers, 0, sizeof(xfers));
31 for (i = 0; i <= ADIS16203_OUTPUTS; i++) {
32 xfers[i].bits_per_word = 8;
33 xfers[i].cs_change = 1;
34 xfers[i].len = 2;
35 xfers[i].delay_usecs = 20;
36 xfers[i].tx_buf = st->tx + 2 * i;
37 if (i < 1) /* SUPPLY_OUT: 0x02, AUX_ADC: 0x08 */
38 st->tx[2 * i] = ADIS16203_READ_REG(ADIS16203_SUPPLY_OUT + 2 * i);
39 else
40 st->tx[2 * i] = ADIS16203_READ_REG(ADIS16203_SUPPLY_OUT + 2 * i + 6);
41 st->tx[2 * i + 1] = 0;
42 if (i >= 1)
43 xfers[i].rx_buf = rx + 2 * (i - 1);
44 spi_message_add_tail(&xfers[i], &msg);
45 }
46
47 ret = spi_sync(st->us, &msg);
48 if (ret)
49 dev_err(&st->us->dev, "problem when burst reading");
50
51 mutex_unlock(&st->buf_lock);
52
53 return ret;
54}
55
56/* Whilst this makes a lot of calls to iio_sw_ring functions - it is to device
57 * specific to be rolled into the core.
58 */
59static irqreturn_t adis16203_trigger_handler(int irq, void *p)
60{
61 struct iio_poll_func *pf = p;
62 struct iio_dev *indio_dev = pf->indio_dev;
63 struct adis16203_state *st = iio_priv(indio_dev);
64
65 int i = 0;
66 s16 *data;
67
68 data = kmalloc(indio_dev->scan_bytes, GFP_KERNEL);
69 if (data == NULL) {
70 dev_err(&st->us->dev, "memory alloc failed in ring bh");
71 goto done;
72 }
73
74 if (!bitmap_empty(indio_dev->active_scan_mask, indio_dev->masklength) &&
75 adis16203_read_ring_data(indio_dev, st->rx) >= 0)
76 for (; i < bitmap_weight(indio_dev->active_scan_mask,
77 indio_dev->masklength); i++)
78 data[i] = be16_to_cpup((__be16 *)&(st->rx[i*2]));
79
80 /* Guaranteed to be aligned with 8 byte boundary */
81 if (indio_dev->scan_timestamp)
82 *((s64 *)(data + ((i + 3)/4)*4)) = pf->timestamp;
83
84 iio_push_to_buffer(indio_dev->buffer, (u8 *)data);
85
86 kfree(data);
87done:
88 iio_trigger_notify_done(indio_dev->trig);
89
90 return IRQ_HANDLED;
91}
92
93void adis16203_unconfigure_ring(struct iio_dev *indio_dev)
94{
95 iio_dealloc_pollfunc(indio_dev->pollfunc);
96 iio_sw_rb_free(indio_dev->buffer);
97}
98
99static const struct iio_buffer_setup_ops adis16203_ring_setup_ops = {
100 .preenable = &iio_sw_buffer_preenable,
101 .postenable = &iio_triggered_buffer_postenable,
102 .predisable = &iio_triggered_buffer_predisable,
103};
104
105int adis16203_configure_ring(struct iio_dev *indio_dev)
106{
107 int ret = 0;
108 struct iio_buffer *ring;
109
110 ring = iio_sw_rb_allocate(indio_dev);
111 if (!ring) {
112 ret = -ENOMEM;
113 return ret;
114 }
115 indio_dev->buffer = ring;
116 ring->scan_timestamp = true;
117 indio_dev->setup_ops = &adis16203_ring_setup_ops;
118
119 indio_dev->pollfunc = iio_alloc_pollfunc(&iio_pollfunc_store_time,
120 &adis16203_trigger_handler,
121 IRQF_ONESHOT,
122 indio_dev,
123 "adis16203_consumer%d",
124 indio_dev->id);
125 if (indio_dev->pollfunc == NULL) {
126 ret = -ENOMEM;
127 goto error_iio_sw_rb_free;
128 }
129
130 indio_dev->modes |= INDIO_BUFFER_TRIGGERED;
131 return 0;
132
133error_iio_sw_rb_free:
134 iio_sw_rb_free(indio_dev->buffer);
135 return ret;
136}
diff --git a/drivers/staging/iio/accel/adis16203_trigger.c b/drivers/staging/iio/accel/adis16203_trigger.c
deleted file mode 100644
index b8a04073d6d7..000000000000
--- a/drivers/staging/iio/accel/adis16203_trigger.c
+++ /dev/null
@@ -1,73 +0,0 @@
1#include <linux/interrupt.h>
2#include <linux/kernel.h>
3#include <linux/spi/spi.h>
4#include <linux/export.h>
5
6#include <linux/iio/iio.h>
7#include <linux/iio/trigger.h>
8#include "adis16203.h"
9
10/**
11 * adis16203_data_rdy_trigger_set_state() set datardy interrupt state
12 **/
13static int adis16203_data_rdy_trigger_set_state(struct iio_trigger *trig,
14 bool state)
15{
16 struct iio_dev *indio_dev = trig->private_data;
17
18 dev_dbg(&indio_dev->dev, "%s (%d)\n", __func__, state);
19 return adis16203_set_irq(indio_dev, state);
20}
21
22static const struct iio_trigger_ops adis16203_trigger_ops = {
23 .owner = THIS_MODULE,
24 .set_trigger_state = &adis16203_data_rdy_trigger_set_state,
25};
26
27int adis16203_probe_trigger(struct iio_dev *indio_dev)
28{
29 int ret;
30 struct adis16203_state *st = iio_priv(indio_dev);
31
32 st->trig = iio_trigger_alloc("adis16203-dev%d", indio_dev->id);
33 if (st->trig == NULL) {
34 ret = -ENOMEM;
35 goto error_ret;
36 }
37
38 ret = request_irq(st->us->irq,
39 &iio_trigger_generic_data_rdy_poll,
40 IRQF_TRIGGER_RISING,
41 "adis16203",
42 st->trig);
43 if (ret)
44 goto error_free_trig;
45
46 st->trig->dev.parent = &st->us->dev;
47 st->trig->ops = &adis16203_trigger_ops;
48 st->trig->private_data = indio_dev;
49 ret = iio_trigger_register(st->trig);
50
51 /* select default trigger */
52 indio_dev->trig = st->trig;
53 if (ret)
54 goto error_free_irq;
55
56 return 0;
57
58error_free_irq:
59 free_irq(st->us->irq, st->trig);
60error_free_trig:
61 iio_trigger_free(st->trig);
62error_ret:
63 return ret;
64}
65
66void adis16203_remove_trigger(struct iio_dev *indio_dev)
67{
68 struct adis16203_state *st = iio_priv(indio_dev);
69
70 iio_trigger_unregister(st->trig);
71 free_irq(st->us->irq, st->trig);
72 iio_trigger_free(st->trig);
73}
diff --git a/drivers/staging/iio/accel/adis16204.h b/drivers/staging/iio/accel/adis16204.h
index 7cf4e91f83ad..9ff950c1e8db 100644
--- a/drivers/staging/iio/accel/adis16204.h
+++ b/drivers/staging/iio/accel/adis16204.h
@@ -3,9 +3,6 @@
3 3
4#define ADIS16204_STARTUP_DELAY 220 /* ms */ 4#define ADIS16204_STARTUP_DELAY 220 /* ms */
5 5
6#define ADIS16204_READ_REG(a) a
7#define ADIS16204_WRITE_REG(a) ((a) | 0x80)
8
9#define ADIS16204_FLASH_CNT 0x00 /* Flash memory write count */ 6#define ADIS16204_FLASH_CNT 0x00 /* Flash memory write count */
10#define ADIS16204_SUPPLY_OUT 0x02 /* Output, power supply */ 7#define ADIS16204_SUPPLY_OUT 0x02 /* Output, power supply */
11#define ADIS16204_XACCL_OUT 0x04 /* Output, x-axis accelerometer */ 8#define ADIS16204_XACCL_OUT 0x04 /* Output, x-axis accelerometer */
@@ -35,8 +32,6 @@
35#define ADIS16204_DIAG_STAT 0x3C /* Diagnostics, system status register */ 32#define ADIS16204_DIAG_STAT 0x3C /* Diagnostics, system status register */
36#define ADIS16204_GLOB_CMD 0x3E /* Operation, system command register */ 33#define ADIS16204_GLOB_CMD 0x3E /* Operation, system command register */
37 34
38#define ADIS16204_OUTPUTS 5
39
40/* MSC_CTRL */ 35/* MSC_CTRL */
41#define ADIS16204_MSC_CTRL_PWRUP_SELF_TEST (1 << 10) /* Self-test at power-on: 1 = disabled, 0 = enabled */ 36#define ADIS16204_MSC_CTRL_PWRUP_SELF_TEST (1 << 10) /* Self-test at power-on: 1 = disabled, 0 = enabled */
42#define ADIS16204_MSC_CTRL_SELF_TEST_EN (1 << 8) /* Self-test enable */ 37#define ADIS16204_MSC_CTRL_SELF_TEST_EN (1 << 8) /* Self-test enable */
@@ -47,87 +42,27 @@
47/* DIAG_STAT */ 42/* DIAG_STAT */
48#define ADIS16204_DIAG_STAT_ALARM2 (1<<9) /* Alarm 2 status: 1 = alarm active, 0 = alarm inactive */ 43#define ADIS16204_DIAG_STAT_ALARM2 (1<<9) /* Alarm 2 status: 1 = alarm active, 0 = alarm inactive */
49#define ADIS16204_DIAG_STAT_ALARM1 (1<<8) /* Alarm 1 status: 1 = alarm active, 0 = alarm inactive */ 44#define ADIS16204_DIAG_STAT_ALARM1 (1<<8) /* Alarm 1 status: 1 = alarm active, 0 = alarm inactive */
50#define ADIS16204_DIAG_STAT_SELFTEST_FAIL (1<<5) /* Self-test diagnostic error flag: 1 = error condition, 45#define ADIS16204_DIAG_STAT_SELFTEST_FAIL_BIT 5 /* Self-test diagnostic error flag: 1 = error condition,
51 0 = normal operation */ 46 0 = normal operation */
52#define ADIS16204_DIAG_STAT_SPI_FAIL (1<<3) /* SPI communications failure */ 47#define ADIS16204_DIAG_STAT_SPI_FAIL_BIT 3 /* SPI communications failure */
53#define ADIS16204_DIAG_STAT_FLASH_UPT (1<<2) /* Flash update failure */ 48#define ADIS16204_DIAG_STAT_FLASH_UPT_BIT 2 /* Flash update failure */
54#define ADIS16204_DIAG_STAT_POWER_HIGH (1<<1) /* Power supply above 3.625 V */ 49#define ADIS16204_DIAG_STAT_POWER_HIGH_BIT 1 /* Power supply above 3.625 V */
55#define ADIS16204_DIAG_STAT_POWER_LOW (1<<0) /* Power supply below 2.975 V */ 50#define ADIS16204_DIAG_STAT_POWER_LOW_BIT 0 /* Power supply below 2.975 V */
56 51
57/* GLOB_CMD */ 52/* GLOB_CMD */
58#define ADIS16204_GLOB_CMD_SW_RESET (1<<7) 53#define ADIS16204_GLOB_CMD_SW_RESET (1<<7)
59#define ADIS16204_GLOB_CMD_CLEAR_STAT (1<<4) 54#define ADIS16204_GLOB_CMD_CLEAR_STAT (1<<4)
60#define ADIS16204_GLOB_CMD_FACTORY_CAL (1<<1) 55#define ADIS16204_GLOB_CMD_FACTORY_CAL (1<<1)
61 56
62#define ADIS16204_MAX_TX 24
63#define ADIS16204_MAX_RX 24
64
65#define ADIS16204_ERROR_ACTIVE (1<<14) 57#define ADIS16204_ERROR_ACTIVE (1<<14)
66 58
67/**
68 * struct adis16204_state - device instance specific data
69 * @us: actual spi_device
70 * @trig: data ready trigger registered with iio
71 * @tx: transmit buffer
72 * @rx: receive buffer
73 * @buf_lock: mutex to protect tx and rx
74 **/
75struct adis16204_state {
76 struct spi_device *us;
77 struct iio_trigger *trig;
78 struct mutex buf_lock;
79 u8 tx[ADIS16204_MAX_TX] ____cacheline_aligned;
80 u8 rx[ADIS16204_MAX_RX];
81};
82
83int adis16204_set_irq(struct iio_dev *indio_dev, bool enable);
84
85enum adis16204_scan { 59enum adis16204_scan {
86 ADIS16204_SCAN_SUPPLY,
87 ADIS16204_SCAN_ACC_X, 60 ADIS16204_SCAN_ACC_X,
88 ADIS16204_SCAN_ACC_Y, 61 ADIS16204_SCAN_ACC_Y,
62 ADIS16204_SCAN_ACC_XY,
63 ADIS16204_SCAN_SUPPLY,
89 ADIS16204_SCAN_AUX_ADC, 64 ADIS16204_SCAN_AUX_ADC,
90 ADIS16204_SCAN_TEMP, 65 ADIS16204_SCAN_TEMP,
91}; 66};
92 67
93#ifdef CONFIG_IIO_BUFFER
94void adis16204_remove_trigger(struct iio_dev *indio_dev);
95int adis16204_probe_trigger(struct iio_dev *indio_dev);
96
97ssize_t adis16204_read_data_from_ring(struct device *dev,
98 struct device_attribute *attr,
99 char *buf);
100
101int adis16204_configure_ring(struct iio_dev *indio_dev);
102void adis16204_unconfigure_ring(struct iio_dev *indio_dev);
103
104#else /* CONFIG_IIO_BUFFER */
105
106static inline void adis16204_remove_trigger(struct iio_dev *indio_dev)
107{
108}
109
110static inline int adis16204_probe_trigger(struct iio_dev *indio_dev)
111{
112 return 0;
113}
114
115static inline ssize_t
116adis16204_read_data_from_ring(struct device *dev,
117 struct device_attribute *attr,
118 char *buf)
119{
120 return 0;
121}
122
123static int adis16204_configure_ring(struct iio_dev *indio_dev)
124{
125 return 0;
126}
127
128static inline void adis16204_unconfigure_ring(struct iio_dev *indio_dev)
129{
130}
131
132#endif /* CONFIG_IIO_BUFFER */
133#endif /* SPI_ADIS16204_H_ */ 68#endif /* SPI_ADIS16204_H_ */
diff --git a/drivers/staging/iio/accel/adis16204_core.c b/drivers/staging/iio/accel/adis16204_core.c
index c6234c2f46aa..f3592668e066 100644
--- a/drivers/staging/iio/accel/adis16204_core.c
+++ b/drivers/staging/iio/accel/adis16204_core.c
@@ -21,261 +21,16 @@
21#include <linux/iio/iio.h> 21#include <linux/iio/iio.h>
22#include <linux/iio/sysfs.h> 22#include <linux/iio/sysfs.h>
23#include <linux/iio/buffer.h> 23#include <linux/iio/buffer.h>
24#include <linux/iio/imu/adis.h>
24 25
25#include "adis16204.h" 26#include "adis16204.h"
26 27
27#define DRIVER_NAME "adis16204"
28
29/**
30 * adis16204_spi_write_reg_8() - write single byte to a register
31 * @dev: device associated with child of actual device (iio_dev or iio_trig)
32 * @reg_address: the address of the register to be written
33 * @val: the value to write
34 **/
35static int adis16204_spi_write_reg_8(struct iio_dev *indio_dev,
36 u8 reg_address,
37 u8 val)
38{
39 int ret;
40 struct adis16204_state *st = iio_priv(indio_dev);
41
42 mutex_lock(&st->buf_lock);
43 st->tx[0] = ADIS16204_WRITE_REG(reg_address);
44 st->tx[1] = val;
45
46 ret = spi_write(st->us, st->tx, 2);
47 mutex_unlock(&st->buf_lock);
48
49 return ret;
50}
51
52/**
53 * adis16204_spi_write_reg_16() - write 2 bytes to a pair of registers
54 * @indio_dev: iio device associated with child of actual device
55 * @reg_address: the address of the lower of the two registers. Second register
56 * is assumed to have address one greater.
57 * @val: value to be written
58 **/
59static int adis16204_spi_write_reg_16(struct iio_dev *indio_dev,
60 u8 lower_reg_address,
61 u16 value)
62{
63 int ret;
64 struct spi_message msg;
65 struct adis16204_state *st = iio_priv(indio_dev);
66 struct spi_transfer xfers[] = {
67 {
68 .tx_buf = st->tx,
69 .bits_per_word = 8,
70 .len = 2,
71 .cs_change = 1,
72 }, {
73 .tx_buf = st->tx + 2,
74 .bits_per_word = 8,
75 .len = 2,
76 .cs_change = 1,
77 },
78 };
79
80 mutex_lock(&st->buf_lock);
81 st->tx[0] = ADIS16204_WRITE_REG(lower_reg_address);
82 st->tx[1] = value & 0xFF;
83 st->tx[2] = ADIS16204_WRITE_REG(lower_reg_address + 1);
84 st->tx[3] = (value >> 8) & 0xFF;
85
86 spi_message_init(&msg);
87 spi_message_add_tail(&xfers[0], &msg);
88 spi_message_add_tail(&xfers[1], &msg);
89 ret = spi_sync(st->us, &msg);
90 mutex_unlock(&st->buf_lock);
91
92 return ret;
93}
94
95/**
96 * adis16204_spi_read_reg_16() - read 2 bytes from a 16-bit register
97 * @indio_dev: iio device associated with child of actual device
98 * @reg_address: the address of the lower of the two registers. Second register
99 * is assumed to have address one greater.
100 * @val: somewhere to pass back the value read
101 **/
102static int adis16204_spi_read_reg_16(struct iio_dev *indio_dev,
103 u8 lower_reg_address,
104 u16 *val)
105{
106 struct spi_message msg;
107 struct adis16204_state *st = iio_priv(indio_dev);
108 int ret;
109 struct spi_transfer xfers[] = {
110 {
111 .tx_buf = st->tx,
112 .bits_per_word = 8,
113 .len = 2,
114 .cs_change = 1,
115 .delay_usecs = 20,
116 }, {
117 .rx_buf = st->rx,
118 .bits_per_word = 8,
119 .len = 2,
120 .delay_usecs = 20,
121 },
122 };
123
124 mutex_lock(&st->buf_lock);
125 st->tx[0] = ADIS16204_READ_REG(lower_reg_address);
126 st->tx[1] = 0;
127
128 spi_message_init(&msg);
129 spi_message_add_tail(&xfers[0], &msg);
130 spi_message_add_tail(&xfers[1], &msg);
131 ret = spi_sync(st->us, &msg);
132 if (ret) {
133 dev_err(&st->us->dev, "problem when reading 16 bit register 0x%02X",
134 lower_reg_address);
135 goto error_ret;
136 }
137 *val = (st->rx[0] << 8) | st->rx[1];
138
139error_ret:
140 mutex_unlock(&st->buf_lock);
141 return ret;
142}
143
144static int adis16204_check_status(struct iio_dev *indio_dev)
145{
146 u16 status;
147 int ret;
148
149 ret = adis16204_spi_read_reg_16(indio_dev,
150 ADIS16204_DIAG_STAT, &status);
151 if (ret < 0) {
152 dev_err(&indio_dev->dev, "Reading status failed\n");
153 goto error_ret;
154 }
155 ret = status & 0x1F;
156
157 if (status & ADIS16204_DIAG_STAT_SELFTEST_FAIL)
158 dev_err(&indio_dev->dev, "Self test failure\n");
159 if (status & ADIS16204_DIAG_STAT_SPI_FAIL)
160 dev_err(&indio_dev->dev, "SPI failure\n");
161 if (status & ADIS16204_DIAG_STAT_FLASH_UPT)
162 dev_err(&indio_dev->dev, "Flash update failed\n");
163 if (status & ADIS16204_DIAG_STAT_POWER_HIGH)
164 dev_err(&indio_dev->dev, "Power supply above 3.625V\n");
165 if (status & ADIS16204_DIAG_STAT_POWER_LOW)
166 dev_err(&indio_dev->dev, "Power supply below 2.975V\n");
167
168error_ret:
169 return ret;
170}
171
172static int adis16204_reset(struct iio_dev *indio_dev)
173{
174 int ret;
175 ret = adis16204_spi_write_reg_8(indio_dev,
176 ADIS16204_GLOB_CMD,
177 ADIS16204_GLOB_CMD_SW_RESET);
178 if (ret)
179 dev_err(&indio_dev->dev, "problem resetting device");
180
181 return ret;
182}
183
184int adis16204_set_irq(struct iio_dev *indio_dev, bool enable)
185{
186 int ret = 0;
187 u16 msc;
188
189 ret = adis16204_spi_read_reg_16(indio_dev, ADIS16204_MSC_CTRL, &msc);
190 if (ret)
191 goto error_ret;
192
193 msc |= ADIS16204_MSC_CTRL_ACTIVE_HIGH;
194 msc &= ~ADIS16204_MSC_CTRL_DATA_RDY_DIO2;
195 if (enable)
196 msc |= ADIS16204_MSC_CTRL_DATA_RDY_EN;
197 else
198 msc &= ~ADIS16204_MSC_CTRL_DATA_RDY_EN;
199
200 ret = adis16204_spi_write_reg_16(indio_dev, ADIS16204_MSC_CTRL, msc);
201
202error_ret:
203 return ret;
204}
205
206static int adis16204_self_test(struct iio_dev *indio_dev)
207{
208 int ret;
209 ret = adis16204_spi_write_reg_16(indio_dev,
210 ADIS16204_MSC_CTRL,
211 ADIS16204_MSC_CTRL_SELF_TEST_EN);
212 if (ret) {
213 dev_err(&indio_dev->dev, "problem starting self test");
214 goto err_ret;
215 }
216
217 adis16204_check_status(indio_dev);
218
219err_ret:
220 return ret;
221}
222
223static int adis16204_initial_setup(struct iio_dev *indio_dev)
224{
225 int ret;
226
227 /* Disable IRQ */
228 ret = adis16204_set_irq(indio_dev, false);
229 if (ret) {
230 dev_err(&indio_dev->dev, "disable irq failed");
231 goto err_ret;
232 }
233
234 /* Do self test */
235 ret = adis16204_self_test(indio_dev);
236 if (ret) {
237 dev_err(&indio_dev->dev, "self test failure");
238 goto err_ret;
239 }
240
241 /* Read status register to check the result */
242 ret = adis16204_check_status(indio_dev);
243 if (ret) {
244 adis16204_reset(indio_dev);
245 dev_err(&indio_dev->dev, "device not playing ball -> reset");
246 msleep(ADIS16204_STARTUP_DELAY);
247 ret = adis16204_check_status(indio_dev);
248 if (ret) {
249 dev_err(&indio_dev->dev, "giving up");
250 goto err_ret;
251 }
252 }
253
254err_ret:
255 return ret;
256}
257
258/* Unique to this driver currently */ 28/* Unique to this driver currently */
259 29
260enum adis16204_channel { 30static const u8 adis16204_addresses[][2] = {
261 in_supply, 31 [ADIS16204_SCAN_ACC_X] = { ADIS16204_XACCL_NULL, ADIS16204_X_PEAK_OUT },
262 in_aux, 32 [ADIS16204_SCAN_ACC_Y] = { ADIS16204_YACCL_NULL, ADIS16204_Y_PEAK_OUT },
263 temp, 33 [ADIS16204_SCAN_ACC_XY] = { 0, ADIS16204_XY_PEAK_OUT },
264 accel_x,
265 accel_y,
266 accel_xy,
267};
268
269static u8 adis16204_addresses[6][3] = {
270 [in_supply] = { ADIS16204_SUPPLY_OUT },
271 [in_aux] = { ADIS16204_AUX_ADC },
272 [temp] = { ADIS16204_TEMP_OUT },
273 [accel_x] = { ADIS16204_XACCL_OUT, ADIS16204_XACCL_NULL,
274 ADIS16204_X_PEAK_OUT },
275 [accel_y] = { ADIS16204_XACCL_OUT, ADIS16204_YACCL_NULL,
276 ADIS16204_Y_PEAK_OUT },
277 [accel_xy] = { ADIS16204_XY_RSS_OUT, 0,
278 ADIS16204_XY_PEAK_OUT },
279}; 34};
280 35
281static int adis16204_read_raw(struct iio_dev *indio_dev, 36static int adis16204_read_raw(struct iio_dev *indio_dev,
@@ -283,6 +38,7 @@ static int adis16204_read_raw(struct iio_dev *indio_dev,
283 int *val, int *val2, 38 int *val, int *val2,
284 long mask) 39 long mask)
285{ 40{
41 struct adis *st = iio_priv(indio_dev);
286 int ret; 42 int ret;
287 int bits; 43 int bits;
288 u8 addr; 44 u8 addr;
@@ -291,29 +47,8 @@ static int adis16204_read_raw(struct iio_dev *indio_dev,
291 47
292 switch (mask) { 48 switch (mask) {
293 case IIO_CHAN_INFO_RAW: 49 case IIO_CHAN_INFO_RAW:
294 mutex_lock(&indio_dev->mlock); 50 return adis_single_conversion(indio_dev, chan,
295 addr = adis16204_addresses[chan->address][0]; 51 ADIS16204_ERROR_ACTIVE, val);
296 ret = adis16204_spi_read_reg_16(indio_dev, addr, &val16);
297 if (ret) {
298 mutex_unlock(&indio_dev->mlock);
299 return ret;
300 }
301
302 if (val16 & ADIS16204_ERROR_ACTIVE) {
303 ret = adis16204_check_status(indio_dev);
304 if (ret) {
305 mutex_unlock(&indio_dev->mlock);
306 return ret;
307 }
308 }
309 val16 = val16 & ((1 << chan->scan_type.realbits) - 1);
310 if (chan->scan_type.sign == 's')
311 val16 = (s16)(val16 <<
312 (16 - chan->scan_type.realbits)) >>
313 (16 - chan->scan_type.realbits);
314 *val = val16;
315 mutex_unlock(&indio_dev->mlock);
316 return IIO_VAL_INT;
317 case IIO_CHAN_INFO_SCALE: 52 case IIO_CHAN_INFO_SCALE:
318 switch (chan->type) { 53 switch (chan->type) {
319 case IIO_VOLTAGE: 54 case IIO_VOLTAGE:
@@ -353,14 +88,14 @@ static int adis16204_read_raw(struct iio_dev *indio_dev,
353 case IIO_CHAN_INFO_PEAK: 88 case IIO_CHAN_INFO_PEAK:
354 if (mask == IIO_CHAN_INFO_CALIBBIAS) { 89 if (mask == IIO_CHAN_INFO_CALIBBIAS) {
355 bits = 12; 90 bits = 12;
356 addrind = 1; 91 addrind = 0;
357 } else { /* PEAK_SEPARATE */ 92 } else { /* PEAK_SEPARATE */
358 bits = 14; 93 bits = 14;
359 addrind = 2; 94 addrind = 1;
360 } 95 }
361 mutex_lock(&indio_dev->mlock); 96 mutex_lock(&indio_dev->mlock);
362 addr = adis16204_addresses[chan->address][addrind]; 97 addr = adis16204_addresses[chan->scan_index][addrind];
363 ret = adis16204_spi_read_reg_16(indio_dev, addr, &val16); 98 ret = adis_read_reg_16(st, addr, &val16);
364 if (ret) { 99 if (ret) {
365 mutex_unlock(&indio_dev->mlock); 100 mutex_unlock(&indio_dev->mlock);
366 return ret; 101 return ret;
@@ -380,6 +115,7 @@ static int adis16204_write_raw(struct iio_dev *indio_dev,
380 int val2, 115 int val2,
381 long mask) 116 long mask)
382{ 117{
118 struct adis *st = iio_priv(indio_dev);
383 int bits; 119 int bits;
384 s16 val16; 120 s16 val16;
385 u8 addr; 121 u8 addr;
@@ -391,114 +127,65 @@ static int adis16204_write_raw(struct iio_dev *indio_dev,
391 break; 127 break;
392 default: 128 default:
393 return -EINVAL; 129 return -EINVAL;
394 }; 130 }
395 val16 = val & ((1 << bits) - 1); 131 val16 = val & ((1 << bits) - 1);
396 addr = adis16204_addresses[chan->address][1]; 132 addr = adis16204_addresses[chan->scan_index][1];
397 return adis16204_spi_write_reg_16(indio_dev, addr, val16); 133 return adis_write_reg_16(st, addr, val16);
398 } 134 }
399 return -EINVAL; 135 return -EINVAL;
400} 136}
401 137
402static const struct iio_chan_spec adis16204_channels[] = { 138static const struct iio_chan_spec adis16204_channels[] = {
403 { 139 ADIS_SUPPLY_CHAN(ADIS16204_SUPPLY_OUT, ADIS16204_SCAN_SUPPLY, 12),
404 .type = IIO_VOLTAGE, 140 ADIS_AUX_ADC_CHAN(ADIS16204_AUX_ADC, ADIS16204_SCAN_AUX_ADC, 12),
405 .indexed = 1, /* Note was not previously indexed */ 141 ADIS_TEMP_CHAN(ADIS16204_TEMP_OUT, ADIS16204_SCAN_TEMP, 12),
406 .channel = 0, 142 ADIS_ACCEL_CHAN(X, ADIS16204_XACCL_OUT, ADIS16204_SCAN_ACC_X,
407 .extend_name = "supply",
408 .info_mask = IIO_CHAN_INFO_RAW_SEPARATE_BIT |
409 IIO_CHAN_INFO_SCALE_SEPARATE_BIT,
410 .address = in_supply,
411 .scan_index = ADIS16204_SCAN_SUPPLY,
412 .scan_type = {
413 .sign = 'u',
414 .realbits = 12,
415 .storagebits = 16,
416 },
417 }, {
418 .type = IIO_VOLTAGE,
419 .indexed = 1,
420 .channel = 1,
421 .info_mask = IIO_CHAN_INFO_RAW_SEPARATE_BIT |
422 IIO_CHAN_INFO_SCALE_SEPARATE_BIT,
423 .address = in_aux,
424 .scan_index = ADIS16204_SCAN_AUX_ADC,
425 .scan_type = {
426 .sign = 'u',
427 .realbits = 12,
428 .storagebits = 16,
429 },
430 }, {
431 .type = IIO_TEMP,
432 .indexed = 1,
433 .channel = 0,
434 .info_mask = IIO_CHAN_INFO_RAW_SEPARATE_BIT |
435 IIO_CHAN_INFO_SCALE_SEPARATE_BIT |
436 IIO_CHAN_INFO_OFFSET_SEPARATE_BIT,
437 .address = temp,
438 .scan_index = ADIS16204_SCAN_TEMP,
439 .scan_type = {
440 .sign = 'u',
441 .realbits = 12,
442 .storagebits = 16,
443 },
444 }, {
445 .type = IIO_ACCEL,
446 .modified = 1,
447 .channel2 = IIO_MOD_X,
448 .info_mask = IIO_CHAN_INFO_RAW_SEPARATE_BIT |
449 IIO_CHAN_INFO_SCALE_SEPARATE_BIT |
450 IIO_CHAN_INFO_CALIBBIAS_SEPARATE_BIT | 143 IIO_CHAN_INFO_CALIBBIAS_SEPARATE_BIT |
451 IIO_CHAN_INFO_PEAK_SEPARATE_BIT, 144 IIO_CHAN_INFO_PEAK_SEPARATE_BIT, 14),
452 .address = accel_x, 145 ADIS_ACCEL_CHAN(Y, ADIS16204_YACCL_OUT, ADIS16204_SCAN_ACC_Y,
453 .scan_index = ADIS16204_SCAN_ACC_X,
454 .scan_type = {
455 .sign = 's',
456 .realbits = 14,
457 .storagebits = 16,
458 },
459 }, {
460 .type = IIO_ACCEL,
461 .modified = 1,
462 .channel2 = IIO_MOD_Y,
463 .info_mask = IIO_CHAN_INFO_RAW_SEPARATE_BIT |
464 IIO_CHAN_INFO_SCALE_SEPARATE_BIT |
465 IIO_CHAN_INFO_CALIBBIAS_SEPARATE_BIT | 146 IIO_CHAN_INFO_CALIBBIAS_SEPARATE_BIT |
466 IIO_CHAN_INFO_PEAK_SEPARATE_BIT, 147 IIO_CHAN_INFO_PEAK_SEPARATE_BIT, 14),
467 .address = accel_y, 148 ADIS_ACCEL_CHAN(ROOT_SUM_SQUARED_X_Y, ADIS16204_XY_RSS_OUT,
468 .scan_index = ADIS16204_SCAN_ACC_Y, 149 ADIS16204_SCAN_ACC_XY, IIO_CHAN_INFO_PEAK_SEPARATE_BIT, 14),
469 .scan_type = {
470 .sign = 's',
471 .realbits = 14,
472 .storagebits = 16,
473 },
474 },
475 IIO_CHAN_SOFT_TIMESTAMP(5), 150 IIO_CHAN_SOFT_TIMESTAMP(5),
476 {
477 .type = IIO_ACCEL,
478 .modified = 1,
479 .channel2 = IIO_MOD_ROOT_SUM_SQUARED_X_Y,
480 .info_mask = IIO_CHAN_INFO_RAW_SEPARATE_BIT |
481 IIO_CHAN_INFO_SCALE_SEPARATE_BIT |
482 IIO_CHAN_INFO_PEAK_SEPARATE_BIT,
483 .address = accel_xy,
484 .scan_type = {
485 .sign = 'u',
486 .realbits = 14,
487 .storagebits = 16,
488 },
489 }
490}; 151};
491 152
492static const struct iio_info adis16204_info = { 153static const struct iio_info adis16204_info = {
493 .read_raw = &adis16204_read_raw, 154 .read_raw = &adis16204_read_raw,
494 .write_raw = &adis16204_write_raw, 155 .write_raw = &adis16204_write_raw,
156 .update_scan_mode = adis_update_scan_mode,
495 .driver_module = THIS_MODULE, 157 .driver_module = THIS_MODULE,
496}; 158};
497 159
498static int __devinit adis16204_probe(struct spi_device *spi) 160static const char * const adis16204_status_error_msgs[] = {
161 [ADIS16204_DIAG_STAT_SELFTEST_FAIL_BIT] = "Self test failure",
162 [ADIS16204_DIAG_STAT_SPI_FAIL_BIT] = "SPI failure",
163 [ADIS16204_DIAG_STAT_FLASH_UPT_BIT] = "Flash update failed",
164 [ADIS16204_DIAG_STAT_POWER_HIGH_BIT] = "Power supply above 3.625V",
165 [ADIS16204_DIAG_STAT_POWER_LOW_BIT] = "Power supply below 2.975V",
166};
167
168static const struct adis_data adis16204_data = {
169 .read_delay = 20,
170 .msc_ctrl_reg = ADIS16204_MSC_CTRL,
171 .glob_cmd_reg = ADIS16204_GLOB_CMD,
172 .diag_stat_reg = ADIS16204_DIAG_STAT,
173
174 .self_test_mask = ADIS16204_MSC_CTRL_SELF_TEST_EN,
175 .startup_delay = ADIS16204_STARTUP_DELAY,
176
177 .status_error_msgs = adis16204_status_error_msgs,
178 .status_error_mask = BIT(ADIS16204_DIAG_STAT_SELFTEST_FAIL_BIT) |
179 BIT(ADIS16204_DIAG_STAT_SPI_FAIL_BIT) |
180 BIT(ADIS16204_DIAG_STAT_FLASH_UPT_BIT) |
181 BIT(ADIS16204_DIAG_STAT_POWER_HIGH_BIT) |
182 BIT(ADIS16204_DIAG_STAT_POWER_LOW_BIT),
183};
184
185static int adis16204_probe(struct spi_device *spi)
499{ 186{
500 int ret; 187 int ret;
501 struct adis16204_state *st; 188 struct adis *st;
502 struct iio_dev *indio_dev; 189 struct iio_dev *indio_dev;
503 190
504 /* setup the industrialio driver allocated elements */ 191 /* setup the industrialio driver allocated elements */
@@ -510,8 +197,6 @@ static int __devinit adis16204_probe(struct spi_device *spi)
510 st = iio_priv(indio_dev); 197 st = iio_priv(indio_dev);
511 /* this is only used for removal purposes */ 198 /* this is only used for removal purposes */
512 spi_set_drvdata(spi, indio_dev); 199 spi_set_drvdata(spi, indio_dev);
513 st->us = spi;
514 mutex_init(&st->buf_lock);
515 200
516 indio_dev->name = spi->dev.driver->name; 201 indio_dev->name = spi->dev.driver->name;
517 indio_dev->dev.parent = &spi->dev; 202 indio_dev->dev.parent = &spi->dev;
@@ -520,54 +205,39 @@ static int __devinit adis16204_probe(struct spi_device *spi)
520 indio_dev->num_channels = ARRAY_SIZE(adis16204_channels); 205 indio_dev->num_channels = ARRAY_SIZE(adis16204_channels);
521 indio_dev->modes = INDIO_DIRECT_MODE; 206 indio_dev->modes = INDIO_DIRECT_MODE;
522 207
523 ret = adis16204_configure_ring(indio_dev); 208 ret = adis_init(st, indio_dev, spi, &adis16204_data);
524 if (ret) 209 if (ret)
525 goto error_free_dev; 210 goto error_free_dev;
526 211
527 ret = iio_buffer_register(indio_dev, 212 ret = adis_setup_buffer_and_trigger(st, indio_dev, NULL);
528 adis16204_channels, 213 if (ret)
529 6); 214 goto error_free_dev;
530 if (ret) {
531 printk(KERN_ERR "failed to initialize the ring\n");
532 goto error_unreg_ring_funcs;
533 }
534
535 if (spi->irq) {
536 ret = adis16204_probe_trigger(indio_dev);
537 if (ret)
538 goto error_uninitialize_ring;
539 }
540 215
541 /* Get the device into a sane initial state */ 216 /* Get the device into a sane initial state */
542 ret = adis16204_initial_setup(indio_dev); 217 ret = adis_initial_startup(st);
543 if (ret) 218 if (ret)
544 goto error_remove_trigger; 219 goto error_cleanup_buffer_trigger;
545 ret = iio_device_register(indio_dev); 220 ret = iio_device_register(indio_dev);
546 if (ret) 221 if (ret)
547 goto error_remove_trigger; 222 goto error_cleanup_buffer_trigger;
548 223
549 return 0; 224 return 0;
550 225
551error_remove_trigger: 226error_cleanup_buffer_trigger:
552 adis16204_remove_trigger(indio_dev); 227 adis_cleanup_buffer_and_trigger(st, indio_dev);
553error_uninitialize_ring:
554 iio_buffer_unregister(indio_dev);
555error_unreg_ring_funcs:
556 adis16204_unconfigure_ring(indio_dev);
557error_free_dev: 228error_free_dev:
558 iio_device_free(indio_dev); 229 iio_device_free(indio_dev);
559error_ret: 230error_ret:
560 return ret; 231 return ret;
561} 232}
562 233
563static int __devexit adis16204_remove(struct spi_device *spi) 234static int adis16204_remove(struct spi_device *spi)
564{ 235{
565 struct iio_dev *indio_dev = spi_get_drvdata(spi); 236 struct iio_dev *indio_dev = spi_get_drvdata(spi);
237 struct adis *st = iio_priv(indio_dev);
566 238
567 iio_device_unregister(indio_dev); 239 iio_device_unregister(indio_dev);
568 adis16204_remove_trigger(indio_dev); 240 adis_cleanup_buffer_and_trigger(st, indio_dev);
569 iio_buffer_unregister(indio_dev);
570 adis16204_unconfigure_ring(indio_dev);
571 iio_device_free(indio_dev); 241 iio_device_free(indio_dev);
572 242
573 return 0; 243 return 0;
@@ -579,7 +249,7 @@ static struct spi_driver adis16204_driver = {
579 .owner = THIS_MODULE, 249 .owner = THIS_MODULE,
580 }, 250 },
581 .probe = adis16204_probe, 251 .probe = adis16204_probe,
582 .remove = __devexit_p(adis16204_remove), 252 .remove = adis16204_remove,
583}; 253};
584module_spi_driver(adis16204_driver); 254module_spi_driver(adis16204_driver);
585 255
diff --git a/drivers/staging/iio/accel/adis16204_ring.c b/drivers/staging/iio/accel/adis16204_ring.c
deleted file mode 100644
index 4c976bec986b..000000000000
--- a/drivers/staging/iio/accel/adis16204_ring.c
+++ /dev/null
@@ -1,134 +0,0 @@
1#include <linux/export.h>
2#include <linux/interrupt.h>
3#include <linux/mutex.h>
4#include <linux/kernel.h>
5#include <linux/spi/spi.h>
6#include <linux/slab.h>
7
8#include <linux/iio/iio.h>
9#include "../ring_sw.h"
10#include <linux/iio/trigger_consumer.h>
11#include "adis16204.h"
12
13/**
14 * adis16204_read_ring_data() read data registers which will be placed into ring
15 * @indio_dev: the IIO device
16 * @rx: somewhere to pass back the value read
17 **/
18static int adis16204_read_ring_data(struct iio_dev *indio_dev, u8 *rx)
19{
20 struct spi_message msg;
21 struct adis16204_state *st = iio_priv(indio_dev);
22 struct spi_transfer xfers[ADIS16204_OUTPUTS + 1];
23 int ret;
24 int i;
25
26 mutex_lock(&st->buf_lock);
27
28 spi_message_init(&msg);
29
30 memset(xfers, 0, sizeof(xfers));
31 for (i = 0; i <= ADIS16204_OUTPUTS; i++) {
32 xfers[i].bits_per_word = 8;
33 xfers[i].cs_change = 1;
34 xfers[i].len = 2;
35 xfers[i].delay_usecs = 20;
36 xfers[i].tx_buf = st->tx + 2 * i;
37 st->tx[2 * i]
38 = ADIS16204_READ_REG(ADIS16204_SUPPLY_OUT + 2 * i);
39 st->tx[2 * i + 1] = 0;
40 if (i >= 1)
41 xfers[i].rx_buf = rx + 2 * (i - 1);
42 spi_message_add_tail(&xfers[i], &msg);
43 }
44
45 ret = spi_sync(st->us, &msg);
46 if (ret)
47 dev_err(&st->us->dev, "problem when burst reading");
48
49 mutex_unlock(&st->buf_lock);
50
51 return ret;
52}
53
54/* Whilst this makes a lot of calls to iio_sw_ring functions - it is to device
55 * specific to be rolled into the core.
56 */
57static irqreturn_t adis16204_trigger_handler(int irq, void *p)
58{
59 struct iio_poll_func *pf = p;
60 struct iio_dev *indio_dev = pf->indio_dev;
61 struct adis16204_state *st = iio_priv(indio_dev);
62 int i = 0;
63 s16 *data;
64
65 data = kmalloc(indio_dev->scan_bytes, GFP_KERNEL);
66 if (data == NULL) {
67 dev_err(&st->us->dev, "memory alloc failed in ring bh");
68 goto done;
69 }
70
71 if (!bitmap_empty(indio_dev->active_scan_mask, indio_dev->masklength) &&
72 adis16204_read_ring_data(indio_dev, st->rx) >= 0)
73 for (; i < bitmap_weight(indio_dev->active_scan_mask,
74 indio_dev->masklength); i++)
75 data[i] = be16_to_cpup((__be16 *)&(st->rx[i*2]));
76
77 /* Guaranteed to be aligned with 8 byte boundary */
78 if (indio_dev->scan_timestamp)
79 *((s64 *)(data + ((i + 3)/4)*4)) = pf->timestamp;
80
81 iio_push_to_buffer(indio_dev->buffer, (u8 *)data);
82
83 kfree(data);
84done:
85 iio_trigger_notify_done(indio_dev->trig);
86
87 return IRQ_HANDLED;
88}
89
90void adis16204_unconfigure_ring(struct iio_dev *indio_dev)
91{
92 iio_dealloc_pollfunc(indio_dev->pollfunc);
93 iio_sw_rb_free(indio_dev->buffer);
94}
95
96static const struct iio_buffer_setup_ops adis16204_ring_setup_ops = {
97 .preenable = &iio_sw_buffer_preenable,
98 .postenable = &iio_triggered_buffer_postenable,
99 .predisable = &iio_triggered_buffer_predisable,
100};
101
102int adis16204_configure_ring(struct iio_dev *indio_dev)
103{
104 int ret = 0;
105 struct iio_buffer *ring;
106
107 ring = iio_sw_rb_allocate(indio_dev);
108 if (!ring) {
109 ret = -ENOMEM;
110 return ret;
111 }
112 indio_dev->buffer = ring;
113 ring->scan_timestamp = true;
114 indio_dev->setup_ops = &adis16204_ring_setup_ops;
115
116 indio_dev->pollfunc = iio_alloc_pollfunc(&iio_pollfunc_store_time,
117 &adis16204_trigger_handler,
118 IRQF_ONESHOT,
119 indio_dev,
120 "%s_consumer%d",
121 indio_dev->name,
122 indio_dev->id);
123 if (indio_dev->pollfunc == NULL) {
124 ret = -ENOMEM;
125 goto error_iio_sw_rb_free;
126 }
127
128 indio_dev->modes |= INDIO_BUFFER_TRIGGERED;
129 return 0;
130
131error_iio_sw_rb_free:
132 iio_sw_rb_free(indio_dev->buffer);
133 return ret;
134}
diff --git a/drivers/staging/iio/accel/adis16204_trigger.c b/drivers/staging/iio/accel/adis16204_trigger.c
deleted file mode 100644
index 408a1682368e..000000000000
--- a/drivers/staging/iio/accel/adis16204_trigger.c
+++ /dev/null
@@ -1,73 +0,0 @@
1#include <linux/interrupt.h>
2#include <linux/kernel.h>
3#include <linux/spi/spi.h>
4#include <linux/export.h>
5
6#include <linux/iio/iio.h>
7#include <linux/iio/trigger.h>
8#include "adis16204.h"
9
10/**
11 * adis16204_data_rdy_trigger_set_state() set datardy interrupt state
12 **/
13static int adis16204_data_rdy_trigger_set_state(struct iio_trigger *trig,
14 bool state)
15{
16 struct iio_dev *indio_dev = trig->private_data;
17
18 dev_dbg(&indio_dev->dev, "%s (%d)\n", __func__, state);
19 return adis16204_set_irq(indio_dev, state);
20}
21
22static const struct iio_trigger_ops adis16204_trigger_ops = {
23 .owner = THIS_MODULE,
24 .set_trigger_state = &adis16204_data_rdy_trigger_set_state,
25};
26
27int adis16204_probe_trigger(struct iio_dev *indio_dev)
28{
29 int ret;
30 struct adis16204_state *st = iio_priv(indio_dev);
31
32 st->trig = iio_trigger_alloc("adis16204-dev%d", indio_dev->id);
33 if (st->trig == NULL) {
34 ret = -ENOMEM;
35 goto error_ret;
36 }
37
38 ret = request_irq(st->us->irq,
39 &iio_trigger_generic_data_rdy_poll,
40 IRQF_TRIGGER_RISING,
41 "adis16204",
42 st->trig);
43 if (ret)
44 goto error_free_trig;
45
46 st->trig->dev.parent = &st->us->dev;
47 st->trig->ops = &adis16204_trigger_ops;
48 st->trig->private_data = indio_dev;
49 ret = iio_trigger_register(st->trig);
50
51 /* select default trigger */
52 indio_dev->trig = st->trig;
53 if (ret)
54 goto error_free_irq;
55
56 return 0;
57
58error_free_irq:
59 free_irq(st->us->irq, st->trig);
60error_free_trig:
61 iio_trigger_free(st->trig);
62error_ret:
63 return ret;
64}
65
66void adis16204_remove_trigger(struct iio_dev *indio_dev)
67{
68 struct adis16204_state *state = iio_priv(indio_dev);
69
70 iio_trigger_unregister(state->trig);
71 free_irq(state->us->irq, state->trig);
72 iio_trigger_free(state->trig);
73}
diff --git a/drivers/staging/iio/accel/adis16209.h b/drivers/staging/iio/accel/adis16209.h
index 3c88b86e7b81..ad3945a06292 100644
--- a/drivers/staging/iio/accel/adis16209.h
+++ b/drivers/staging/iio/accel/adis16209.h
@@ -3,9 +3,6 @@
3 3
4#define ADIS16209_STARTUP_DELAY 220 /* ms */ 4#define ADIS16209_STARTUP_DELAY 220 /* ms */
5 5
6#define ADIS16209_READ_REG(a) a
7#define ADIS16209_WRITE_REG(a) ((a) | 0x80)
8
9/* Flash memory write count */ 6/* Flash memory write count */
10#define ADIS16209_FLASH_CNT 0x00 7#define ADIS16209_FLASH_CNT 0x00
11/* Output, power supply */ 8/* Output, power supply */
@@ -61,8 +58,6 @@
61/* Operation, system command register */ 58/* Operation, system command register */
62#define ADIS16209_GLOB_CMD 0x3E 59#define ADIS16209_GLOB_CMD 0x3E
63 60
64#define ADIS16209_OUTPUTS 8
65
66/* MSC_CTRL */ 61/* MSC_CTRL */
67/* Self-test at power-on: 1 = disabled, 0 = enabled */ 62/* Self-test at power-on: 1 = disabled, 0 = enabled */
68#define ADIS16209_MSC_CTRL_PWRUP_SELF_TEST (1 << 10) 63#define ADIS16209_MSC_CTRL_PWRUP_SELF_TEST (1 << 10)
@@ -81,44 +76,23 @@
81/* Alarm 1 status: 1 = alarm active, 0 = alarm inactive */ 76/* Alarm 1 status: 1 = alarm active, 0 = alarm inactive */
82#define ADIS16209_DIAG_STAT_ALARM1 (1<<8) 77#define ADIS16209_DIAG_STAT_ALARM1 (1<<8)
83/* Self-test diagnostic error flag: 1 = error condition, 0 = normal operation */ 78/* Self-test diagnostic error flag: 1 = error condition, 0 = normal operation */
84#define ADIS16209_DIAG_STAT_SELFTEST_FAIL (1<<5) 79#define ADIS16209_DIAG_STAT_SELFTEST_FAIL_BIT 5
85/* SPI communications failure */ 80/* SPI communications failure */
86#define ADIS16209_DIAG_STAT_SPI_FAIL (1<<3) 81#define ADIS16209_DIAG_STAT_SPI_FAIL_BIT 3
87/* Flash update failure */ 82/* Flash update failure */
88#define ADIS16209_DIAG_STAT_FLASH_UPT (1<<2) 83#define ADIS16209_DIAG_STAT_FLASH_UPT_BIT 2
89/* Power supply above 3.625 V */ 84/* Power supply above 3.625 V */
90#define ADIS16209_DIAG_STAT_POWER_HIGH (1<<1) 85#define ADIS16209_DIAG_STAT_POWER_HIGH_BIT 1
91/* Power supply below 3.15 V */ 86/* Power supply below 3.15 V */
92#define ADIS16209_DIAG_STAT_POWER_LOW (1<<0) 87#define ADIS16209_DIAG_STAT_POWER_LOW_BIT 0
93 88
94/* GLOB_CMD */ 89/* GLOB_CMD */
95#define ADIS16209_GLOB_CMD_SW_RESET (1<<7) 90#define ADIS16209_GLOB_CMD_SW_RESET (1<<7)
96#define ADIS16209_GLOB_CMD_CLEAR_STAT (1<<4) 91#define ADIS16209_GLOB_CMD_CLEAR_STAT (1<<4)
97#define ADIS16209_GLOB_CMD_FACTORY_CAL (1<<1) 92#define ADIS16209_GLOB_CMD_FACTORY_CAL (1<<1)
98 93
99#define ADIS16209_MAX_TX 24
100#define ADIS16209_MAX_RX 24
101
102#define ADIS16209_ERROR_ACTIVE (1<<14) 94#define ADIS16209_ERROR_ACTIVE (1<<14)
103 95
104/**
105 * struct adis16209_state - device instance specific data
106 * @us: actual spi_device
107 * @trig: data ready trigger registered with iio
108 * @tx: transmit buffer
109 * @rx: receive buffer
110 * @buf_lock: mutex to protect tx and rx
111 **/
112struct adis16209_state {
113 struct spi_device *us;
114 struct iio_trigger *trig;
115 struct mutex buf_lock;
116 u8 tx[ADIS16209_MAX_TX] ____cacheline_aligned;
117 u8 rx[ADIS16209_MAX_RX];
118};
119
120int adis16209_set_irq(struct iio_dev *indio_dev, bool enable);
121
122#define ADIS16209_SCAN_SUPPLY 0 96#define ADIS16209_SCAN_SUPPLY 0
123#define ADIS16209_SCAN_ACC_X 1 97#define ADIS16209_SCAN_ACC_X 1
124#define ADIS16209_SCAN_ACC_Y 2 98#define ADIS16209_SCAN_ACC_Y 2
@@ -128,45 +102,4 @@ int adis16209_set_irq(struct iio_dev *indio_dev, bool enable);
128#define ADIS16209_SCAN_INCLI_Y 6 102#define ADIS16209_SCAN_INCLI_Y 6
129#define ADIS16209_SCAN_ROT 7 103#define ADIS16209_SCAN_ROT 7
130 104
131#ifdef CONFIG_IIO_BUFFER
132
133void adis16209_remove_trigger(struct iio_dev *indio_dev);
134int adis16209_probe_trigger(struct iio_dev *indio_dev);
135
136ssize_t adis16209_read_data_from_ring(struct device *dev,
137 struct device_attribute *attr,
138 char *buf);
139
140int adis16209_configure_ring(struct iio_dev *indio_dev);
141void adis16209_unconfigure_ring(struct iio_dev *indio_dev);
142
143#else /* CONFIG_IIO_BUFFER */
144
145static inline void adis16209_remove_trigger(struct iio_dev *indio_dev)
146{
147}
148
149static inline int adis16209_probe_trigger(struct iio_dev *indio_dev)
150{
151 return 0;
152}
153
154static inline ssize_t
155adis16209_read_data_from_ring(struct device *dev,
156 struct device_attribute *attr,
157 char *buf)
158{
159 return 0;
160}
161
162static int adis16209_configure_ring(struct iio_dev *indio_dev)
163{
164 return 0;
165}
166
167static inline void adis16209_unconfigure_ring(struct iio_dev *indio_dev)
168{
169}
170
171#endif /* CONFIG_IIO_BUFFER */
172#endif /* SPI_ADIS16209_H_ */ 105#endif /* SPI_ADIS16209_H_ */
diff --git a/drivers/staging/iio/accel/adis16209_core.c b/drivers/staging/iio/accel/adis16209_core.c
index 7ee974b45d7d..69c50ee44ce3 100644
--- a/drivers/staging/iio/accel/adis16209_core.c
+++ b/drivers/staging/iio/accel/adis16209_core.c
@@ -19,262 +19,19 @@
19#include <linux/iio/iio.h> 19#include <linux/iio/iio.h>
20#include <linux/iio/sysfs.h> 20#include <linux/iio/sysfs.h>
21#include <linux/iio/buffer.h> 21#include <linux/iio/buffer.h>
22#include <linux/iio/imu/adis.h>
22 23
23#include "adis16209.h" 24#include "adis16209.h"
24 25
25#define DRIVER_NAME "adis16209" 26static const u8 adis16209_addresses[8][1] = {
26 27 [ADIS16209_SCAN_SUPPLY] = { },
27/** 28 [ADIS16209_SCAN_AUX_ADC] = { },
28 * adis16209_spi_write_reg_8() - write single byte to a register 29 [ADIS16209_SCAN_ACC_X] = { ADIS16209_XACCL_NULL },
29 * @indio_dev: iio device associated with actual device 30 [ADIS16209_SCAN_ACC_Y] = { ADIS16209_YACCL_NULL },
30 * @reg_address: the address of the register to be written 31 [ADIS16209_SCAN_INCLI_X] = { ADIS16209_XINCL_NULL },
31 * @val: the value to write 32 [ADIS16209_SCAN_INCLI_Y] = { ADIS16209_YINCL_NULL },
32 **/ 33 [ADIS16209_SCAN_ROT] = { },
33static int adis16209_spi_write_reg_8(struct iio_dev *indio_dev, 34 [ADIS16209_SCAN_TEMP] = { },
34 u8 reg_address,
35 u8 val)
36{
37 int ret;
38 struct adis16209_state *st = iio_priv(indio_dev);
39
40 mutex_lock(&st->buf_lock);
41 st->tx[0] = ADIS16209_WRITE_REG(reg_address);
42 st->tx[1] = val;
43
44 ret = spi_write(st->us, st->tx, 2);
45 mutex_unlock(&st->buf_lock);
46
47 return ret;
48}
49
50/**
51 * adis16209_spi_write_reg_16() - write 2 bytes to a pair of registers
52 * @indio_dev: iio device associated actual device
53 * @reg_address: the address of the lower of the two registers. Second register
54 * is assumed to have address one greater.
55 * @val: value to be written
56 **/
57static int adis16209_spi_write_reg_16(struct iio_dev *indio_dev,
58 u8 lower_reg_address,
59 u16 value)
60{
61 int ret;
62 struct spi_message msg;
63 struct adis16209_state *st = iio_priv(indio_dev);
64 struct spi_transfer xfers[] = {
65 {
66 .tx_buf = st->tx,
67 .bits_per_word = 8,
68 .len = 2,
69 .cs_change = 1,
70 .delay_usecs = 30,
71 }, {
72 .tx_buf = st->tx + 2,
73 .bits_per_word = 8,
74 .len = 2,
75 .delay_usecs = 30,
76 },
77 };
78
79 mutex_lock(&st->buf_lock);
80 st->tx[0] = ADIS16209_WRITE_REG(lower_reg_address);
81 st->tx[1] = value & 0xFF;
82 st->tx[2] = ADIS16209_WRITE_REG(lower_reg_address + 1);
83 st->tx[3] = (value >> 8) & 0xFF;
84
85 spi_message_init(&msg);
86 spi_message_add_tail(&xfers[0], &msg);
87 spi_message_add_tail(&xfers[1], &msg);
88 ret = spi_sync(st->us, &msg);
89 mutex_unlock(&st->buf_lock);
90
91 return ret;
92}
93
94/**
95 * adis16209_spi_read_reg_16() - read 2 bytes from a 16-bit register
96 * @indio_dev: iio device associated with device
97 * @reg_address: the address of the lower of the two registers. Second register
98 * is assumed to have address one greater.
99 * @val: somewhere to pass back the value read
100 **/
101static int adis16209_spi_read_reg_16(struct iio_dev *indio_dev,
102 u8 lower_reg_address,
103 u16 *val)
104{
105 struct spi_message msg;
106 struct adis16209_state *st = iio_priv(indio_dev);
107 int ret;
108 struct spi_transfer xfers[] = {
109 {
110 .tx_buf = st->tx,
111 .bits_per_word = 8,
112 .len = 2,
113 .cs_change = 1,
114 .delay_usecs = 30,
115 }, {
116 .rx_buf = st->rx,
117 .bits_per_word = 8,
118 .len = 2,
119 .delay_usecs = 30,
120 },
121 };
122
123 mutex_lock(&st->buf_lock);
124 st->tx[0] = ADIS16209_READ_REG(lower_reg_address);
125 st->tx[1] = 0;
126
127 spi_message_init(&msg);
128 spi_message_add_tail(&xfers[0], &msg);
129 spi_message_add_tail(&xfers[1], &msg);
130 ret = spi_sync(st->us, &msg);
131 if (ret) {
132 dev_err(&st->us->dev,
133 "problem when reading 16 bit register 0x%02X",
134 lower_reg_address);
135 goto error_ret;
136 }
137 *val = (st->rx[0] << 8) | st->rx[1];
138
139error_ret:
140 mutex_unlock(&st->buf_lock);
141 return ret;
142}
143
144static int adis16209_reset(struct iio_dev *indio_dev)
145{
146 int ret;
147 ret = adis16209_spi_write_reg_8(indio_dev,
148 ADIS16209_GLOB_CMD,
149 ADIS16209_GLOB_CMD_SW_RESET);
150 if (ret)
151 dev_err(&indio_dev->dev, "problem resetting device");
152
153 return ret;
154}
155
156int adis16209_set_irq(struct iio_dev *indio_dev, bool enable)
157{
158 int ret = 0;
159 u16 msc;
160
161 ret = adis16209_spi_read_reg_16(indio_dev, ADIS16209_MSC_CTRL, &msc);
162 if (ret)
163 goto error_ret;
164
165 msc |= ADIS16209_MSC_CTRL_ACTIVE_HIGH;
166 msc &= ~ADIS16209_MSC_CTRL_DATA_RDY_DIO2;
167 if (enable)
168 msc |= ADIS16209_MSC_CTRL_DATA_RDY_EN;
169 else
170 msc &= ~ADIS16209_MSC_CTRL_DATA_RDY_EN;
171
172 ret = adis16209_spi_write_reg_16(indio_dev, ADIS16209_MSC_CTRL, msc);
173
174error_ret:
175 return ret;
176}
177
178static int adis16209_check_status(struct iio_dev *indio_dev)
179{
180 u16 status;
181 int ret;
182
183 ret = adis16209_spi_read_reg_16(indio_dev,
184 ADIS16209_DIAG_STAT, &status);
185 if (ret < 0) {
186 dev_err(&indio_dev->dev, "Reading status failed\n");
187 goto error_ret;
188 }
189 ret = status & 0x1F;
190
191 if (status & ADIS16209_DIAG_STAT_SELFTEST_FAIL)
192 dev_err(&indio_dev->dev, "Self test failure\n");
193 if (status & ADIS16209_DIAG_STAT_SPI_FAIL)
194 dev_err(&indio_dev->dev, "SPI failure\n");
195 if (status & ADIS16209_DIAG_STAT_FLASH_UPT)
196 dev_err(&indio_dev->dev, "Flash update failed\n");
197 if (status & ADIS16209_DIAG_STAT_POWER_HIGH)
198 dev_err(&indio_dev->dev, "Power supply above 3.625V\n");
199 if (status & ADIS16209_DIAG_STAT_POWER_LOW)
200 dev_err(&indio_dev->dev, "Power supply below 3.15V\n");
201
202error_ret:
203 return ret;
204}
205
206static int adis16209_self_test(struct iio_dev *indio_dev)
207{
208 int ret;
209 ret = adis16209_spi_write_reg_16(indio_dev,
210 ADIS16209_MSC_CTRL,
211 ADIS16209_MSC_CTRL_SELF_TEST_EN);
212 if (ret) {
213 dev_err(&indio_dev->dev, "problem starting self test");
214 goto err_ret;
215 }
216
217 adis16209_check_status(indio_dev);
218
219err_ret:
220 return ret;
221}
222
223static int adis16209_initial_setup(struct iio_dev *indio_dev)
224{
225 int ret;
226
227 /* Disable IRQ */
228 ret = adis16209_set_irq(indio_dev, false);
229 if (ret) {
230 dev_err(&indio_dev->dev, "disable irq failed");
231 goto err_ret;
232 }
233
234 /* Do self test */
235 ret = adis16209_self_test(indio_dev);
236 if (ret) {
237 dev_err(&indio_dev->dev, "self test failure");
238 goto err_ret;
239 }
240
241 /* Read status register to check the result */
242 ret = adis16209_check_status(indio_dev);
243 if (ret) {
244 adis16209_reset(indio_dev);
245 dev_err(&indio_dev->dev, "device not playing ball -> reset");
246 msleep(ADIS16209_STARTUP_DELAY);
247 ret = adis16209_check_status(indio_dev);
248 if (ret) {
249 dev_err(&indio_dev->dev, "giving up");
250 goto err_ret;
251 }
252 }
253
254err_ret:
255 return ret;
256}
257
258enum adis16209_chan {
259 in_supply,
260 temp,
261 accel_x,
262 accel_y,
263 incli_x,
264 incli_y,
265 in_aux,
266 rot,
267};
268
269static const u8 adis16209_addresses[8][2] = {
270 [in_supply] = { ADIS16209_SUPPLY_OUT },
271 [in_aux] = { ADIS16209_AUX_ADC },
272 [accel_x] = { ADIS16209_XACCL_OUT, ADIS16209_XACCL_NULL },
273 [accel_y] = { ADIS16209_YACCL_OUT, ADIS16209_YACCL_NULL },
274 [incli_x] = { ADIS16209_XINCL_OUT, ADIS16209_XINCL_NULL },
275 [incli_y] = { ADIS16209_YINCL_OUT, ADIS16209_YINCL_NULL },
276 [rot] = { ADIS16209_ROT_OUT },
277 [temp] = { ADIS16209_TEMP_OUT },
278}; 35};
279 36
280static int adis16209_write_raw(struct iio_dev *indio_dev, 37static int adis16209_write_raw(struct iio_dev *indio_dev,
@@ -283,6 +40,7 @@ static int adis16209_write_raw(struct iio_dev *indio_dev,
283 int val2, 40 int val2,
284 long mask) 41 long mask)
285{ 42{
43 struct adis *st = iio_priv(indio_dev);
286 int bits; 44 int bits;
287 s16 val16; 45 s16 val16;
288 u8 addr; 46 u8 addr;
@@ -295,10 +53,10 @@ static int adis16209_write_raw(struct iio_dev *indio_dev,
295 break; 53 break;
296 default: 54 default:
297 return -EINVAL; 55 return -EINVAL;
298 }; 56 }
299 val16 = val & ((1 << bits) - 1); 57 val16 = val & ((1 << bits) - 1);
300 addr = adis16209_addresses[chan->address][1]; 58 addr = adis16209_addresses[chan->scan_index][0];
301 return adis16209_spi_write_reg_16(indio_dev, addr, val16); 59 return adis_write_reg_16(st, addr, val16);
302 } 60 }
303 return -EINVAL; 61 return -EINVAL;
304} 62}
@@ -308,6 +66,7 @@ static int adis16209_read_raw(struct iio_dev *indio_dev,
308 int *val, int *val2, 66 int *val, int *val2,
309 long mask) 67 long mask)
310{ 68{
69 struct adis *st = iio_priv(indio_dev);
311 int ret; 70 int ret;
312 int bits; 71 int bits;
313 u8 addr; 72 u8 addr;
@@ -315,29 +74,8 @@ static int adis16209_read_raw(struct iio_dev *indio_dev,
315 74
316 switch (mask) { 75 switch (mask) {
317 case IIO_CHAN_INFO_RAW: 76 case IIO_CHAN_INFO_RAW:
318 mutex_lock(&indio_dev->mlock); 77 return adis_single_conversion(indio_dev, chan,
319 addr = adis16209_addresses[chan->address][0]; 78 ADIS16209_ERROR_ACTIVE, val);
320 ret = adis16209_spi_read_reg_16(indio_dev, addr, &val16);
321 if (ret) {
322 mutex_unlock(&indio_dev->mlock);
323 return ret;
324 }
325
326 if (val16 & ADIS16209_ERROR_ACTIVE) {
327 ret = adis16209_check_status(indio_dev);
328 if (ret) {
329 mutex_unlock(&indio_dev->mlock);
330 return ret;
331 }
332 }
333 val16 = val16 & ((1 << chan->scan_type.realbits) - 1);
334 if (chan->scan_type.sign == 's')
335 val16 = (s16)(val16 <<
336 (16 - chan->scan_type.realbits)) >>
337 (16 - chan->scan_type.realbits);
338 *val = val16;
339 mutex_unlock(&indio_dev->mlock);
340 return IIO_VAL_INT;
341 case IIO_CHAN_INFO_SCALE: 79 case IIO_CHAN_INFO_SCALE:
342 switch (chan->type) { 80 switch (chan->type) {
343 case IIO_VOLTAGE: 81 case IIO_VOLTAGE:
@@ -374,10 +112,10 @@ static int adis16209_read_raw(struct iio_dev *indio_dev,
374 break; 112 break;
375 default: 113 default:
376 return -EINVAL; 114 return -EINVAL;
377 }; 115 }
378 mutex_lock(&indio_dev->mlock); 116 mutex_lock(&indio_dev->mlock);
379 addr = adis16209_addresses[chan->address][1]; 117 addr = adis16209_addresses[chan->scan_index][0];
380 ret = adis16209_spi_read_reg_16(indio_dev, addr, &val16); 118 ret = adis_read_reg_16(st, addr, &val16);
381 if (ret) { 119 if (ret) {
382 mutex_unlock(&indio_dev->mlock); 120 mutex_unlock(&indio_dev->mlock);
383 return ret; 121 return ret;
@@ -392,128 +130,56 @@ static int adis16209_read_raw(struct iio_dev *indio_dev,
392} 130}
393 131
394static const struct iio_chan_spec adis16209_channels[] = { 132static const struct iio_chan_spec adis16209_channels[] = {
395 { 133 ADIS_SUPPLY_CHAN(ADIS16209_SUPPLY_OUT, ADIS16209_SCAN_SUPPLY, 14),
396 .type = IIO_VOLTAGE, 134 ADIS_TEMP_CHAN(ADIS16209_TEMP_OUT, ADIS16209_SCAN_TEMP, 12),
397 .indexed = 1, 135 ADIS_ACCEL_CHAN(X, ADIS16209_XACCL_OUT, ADIS16209_SCAN_ACC_X,
398 .channel = 0, 136 IIO_CHAN_INFO_CALIBBIAS_SEPARATE_BIT, 14),
399 .extend_name = "supply", 137 ADIS_ACCEL_CHAN(Y, ADIS16209_YACCL_OUT, ADIS16209_SCAN_ACC_Y,
400 .info_mask = IIO_CHAN_INFO_RAW_SEPARATE_BIT | 138 IIO_CHAN_INFO_CALIBBIAS_SEPARATE_BIT, 14),
401 IIO_CHAN_INFO_SCALE_SEPARATE_BIT, 139 ADIS_AUX_ADC_CHAN(ADIS16209_AUX_ADC, ADIS16209_SCAN_AUX_ADC, 12),
402 .address = in_supply, 140 ADIS_INCLI_CHAN(X, ADIS16209_XINCL_OUT, ADIS16209_SCAN_INCLI_X, 0, 14),
403 .scan_index = ADIS16209_SCAN_SUPPLY, 141 ADIS_INCLI_CHAN(Y, ADIS16209_YINCL_OUT, ADIS16209_SCAN_INCLI_Y, 0, 14),
404 .scan_type = { 142 ADIS_ROT_CHAN(X, ADIS16209_ROT_OUT, ADIS16209_SCAN_ROT, 0, 14),
405 .sign = 'u',
406 .realbits = 14,
407 .storagebits = 16,
408 },
409 }, {
410 .type = IIO_TEMP,
411 .indexed = 0,
412 .channel = 0,
413 .info_mask = IIO_CHAN_INFO_RAW_SEPARATE_BIT |
414 IIO_CHAN_INFO_SCALE_SEPARATE_BIT |
415 IIO_CHAN_INFO_OFFSET_SEPARATE_BIT,
416 .address = temp,
417 .scan_index = ADIS16209_SCAN_TEMP,
418 .scan_type = {
419 .sign = 'u',
420 .realbits = 12,
421 .storagebits = 16,
422 },
423 }, {
424 .type = IIO_ACCEL,
425 .modified = 1,
426 .channel2 = IIO_MOD_X,
427 .info_mask = IIO_CHAN_INFO_RAW_SEPARATE_BIT |
428 IIO_CHAN_INFO_SCALE_SHARED_BIT |
429 IIO_CHAN_INFO_CALIBBIAS_SEPARATE_BIT,
430 .address = accel_x,
431 .scan_index = ADIS16209_SCAN_ACC_X,
432 .scan_type = {
433 .sign = 's',
434 .realbits = 14,
435 .storagebits = 16,
436 },
437 }, {
438 .type = IIO_ACCEL,
439 .modified = 1,
440 .channel2 = IIO_MOD_Y,
441 .info_mask = IIO_CHAN_INFO_RAW_SEPARATE_BIT |
442 IIO_CHAN_INFO_SCALE_SHARED_BIT |
443 IIO_CHAN_INFO_CALIBBIAS_SEPARATE_BIT,
444 .address = accel_y,
445 .scan_index = ADIS16209_SCAN_ACC_Y,
446 .scan_type = {
447 .sign = 's',
448 .realbits = 14,
449 .storagebits = 16,
450 },
451 }, {
452 .type = IIO_VOLTAGE,
453 .indexed = 1,
454 .channel = 1,
455 .info_mask = IIO_CHAN_INFO_RAW_SEPARATE_BIT |
456 IIO_CHAN_INFO_SCALE_SEPARATE_BIT,
457 .address = in_aux,
458 .scan_index = ADIS16209_SCAN_AUX_ADC,
459 .scan_type = {
460 .sign = 'u',
461 .realbits = 12,
462 .storagebits = 16,
463 },
464 }, {
465 .type = IIO_INCLI,
466 .modified = 1,
467 .channel2 = IIO_MOD_X,
468 .info_mask = IIO_CHAN_INFO_RAW_SEPARATE_BIT |
469 IIO_CHAN_INFO_SCALE_SHARED_BIT,
470 .address = incli_x,
471 .scan_index = ADIS16209_SCAN_INCLI_X,
472 .scan_type = {
473 .sign = 's',
474 .realbits = 14,
475 .storagebits = 16,
476 },
477 }, {
478 .type = IIO_INCLI,
479 .modified = 1,
480 .channel2 = IIO_MOD_Y,
481 .info_mask = IIO_CHAN_INFO_RAW_SEPARATE_BIT |
482 IIO_CHAN_INFO_SCALE_SHARED_BIT,
483 .address = incli_y,
484 .scan_index = ADIS16209_SCAN_INCLI_Y,
485 .scan_type = {
486 .sign = 's',
487 .realbits = 14,
488 .storagebits = 16,
489 },
490 }, {
491 .type = IIO_ROT,
492 .modified = 1,
493 .channel2 = IIO_MOD_X,
494 .info_mask = IIO_CHAN_INFO_RAW_SEPARATE_BIT,
495 IIO_CHAN_INFO_SCALE_SHARED_BIT,
496 .address = rot,
497 .scan_index = ADIS16209_SCAN_ROT,
498 .scan_type = {
499 .sign = 's',
500 .realbits = 14,
501 .storagebits = 16,
502 },
503 },
504 IIO_CHAN_SOFT_TIMESTAMP(8) 143 IIO_CHAN_SOFT_TIMESTAMP(8)
505}; 144};
506 145
507static const struct iio_info adis16209_info = { 146static const struct iio_info adis16209_info = {
508 .read_raw = &adis16209_read_raw, 147 .read_raw = &adis16209_read_raw,
509 .write_raw = &adis16209_write_raw, 148 .write_raw = &adis16209_write_raw,
149 .update_scan_mode = adis_update_scan_mode,
510 .driver_module = THIS_MODULE, 150 .driver_module = THIS_MODULE,
511}; 151};
512 152
513static int __devinit adis16209_probe(struct spi_device *spi) 153static const char * const adis16209_status_error_msgs[] = {
154 [ADIS16209_DIAG_STAT_SELFTEST_FAIL_BIT] = "Self test failure",
155 [ADIS16209_DIAG_STAT_SPI_FAIL_BIT] = "SPI failure",
156 [ADIS16209_DIAG_STAT_FLASH_UPT_BIT] = "Flash update failed",
157 [ADIS16209_DIAG_STAT_POWER_HIGH_BIT] = "Power supply above 3.625V",
158 [ADIS16209_DIAG_STAT_POWER_LOW_BIT] = "Power supply below 3.15V",
159};
160
161static const struct adis_data adis16209_data = {
162 .read_delay = 30,
163 .msc_ctrl_reg = ADIS16209_MSC_CTRL,
164 .glob_cmd_reg = ADIS16209_GLOB_CMD,
165 .diag_stat_reg = ADIS16209_DIAG_STAT,
166
167 .self_test_mask = ADIS16209_MSC_CTRL_SELF_TEST_EN,
168 .startup_delay = ADIS16209_STARTUP_DELAY,
169
170 .status_error_msgs = adis16209_status_error_msgs,
171 .status_error_mask = BIT(ADIS16209_DIAG_STAT_SELFTEST_FAIL_BIT) |
172 BIT(ADIS16209_DIAG_STAT_SPI_FAIL_BIT) |
173 BIT(ADIS16209_DIAG_STAT_FLASH_UPT_BIT) |
174 BIT(ADIS16209_DIAG_STAT_POWER_HIGH_BIT) |
175 BIT(ADIS16209_DIAG_STAT_POWER_LOW_BIT),
176};
177
178
179static int adis16209_probe(struct spi_device *spi)
514{ 180{
515 int ret; 181 int ret;
516 struct adis16209_state *st; 182 struct adis *st;
517 struct iio_dev *indio_dev; 183 struct iio_dev *indio_dev;
518 184
519 /* setup the industrialio driver allocated elements */ 185 /* setup the industrialio driver allocated elements */
@@ -525,8 +191,6 @@ static int __devinit adis16209_probe(struct spi_device *spi)
525 st = iio_priv(indio_dev); 191 st = iio_priv(indio_dev);
526 /* this is only used for removal purposes */ 192 /* this is only used for removal purposes */
527 spi_set_drvdata(spi, indio_dev); 193 spi_set_drvdata(spi, indio_dev);
528 st->us = spi;
529 mutex_init(&st->buf_lock);
530 194
531 indio_dev->name = spi->dev.driver->name; 195 indio_dev->name = spi->dev.driver->name;
532 indio_dev->dev.parent = &spi->dev; 196 indio_dev->dev.parent = &spi->dev;
@@ -535,54 +199,38 @@ static int __devinit adis16209_probe(struct spi_device *spi)
535 indio_dev->num_channels = ARRAY_SIZE(adis16209_channels); 199 indio_dev->num_channels = ARRAY_SIZE(adis16209_channels);
536 indio_dev->modes = INDIO_DIRECT_MODE; 200 indio_dev->modes = INDIO_DIRECT_MODE;
537 201
538 ret = adis16209_configure_ring(indio_dev); 202 ret = adis_init(st, indio_dev, spi, &adis16209_data);
203 if (ret)
204 goto error_free_dev;
205 ret = adis_setup_buffer_and_trigger(st, indio_dev, NULL);
539 if (ret) 206 if (ret)
540 goto error_free_dev; 207 goto error_free_dev;
541
542 ret = iio_buffer_register(indio_dev,
543 adis16209_channels,
544 ARRAY_SIZE(adis16209_channels));
545 if (ret) {
546 printk(KERN_ERR "failed to initialize the ring\n");
547 goto error_unreg_ring_funcs;
548 }
549
550 if (spi->irq) {
551 ret = adis16209_probe_trigger(indio_dev);
552 if (ret)
553 goto error_uninitialize_ring;
554 }
555 208
556 /* Get the device into a sane initial state */ 209 /* Get the device into a sane initial state */
557 ret = adis16209_initial_setup(indio_dev); 210 ret = adis_initial_startup(st);
558 if (ret) 211 if (ret)
559 goto error_remove_trigger; 212 goto error_cleanup_buffer_trigger;
560 ret = iio_device_register(indio_dev); 213 ret = iio_device_register(indio_dev);
561 if (ret) 214 if (ret)
562 goto error_remove_trigger; 215 goto error_cleanup_buffer_trigger;
563 216
564 return 0; 217 return 0;
565 218
566error_remove_trigger: 219error_cleanup_buffer_trigger:
567 adis16209_remove_trigger(indio_dev); 220 adis_cleanup_buffer_and_trigger(st, indio_dev);
568error_uninitialize_ring:
569 iio_buffer_unregister(indio_dev);
570error_unreg_ring_funcs:
571 adis16209_unconfigure_ring(indio_dev);
572error_free_dev: 221error_free_dev:
573 iio_device_free(indio_dev); 222 iio_device_free(indio_dev);
574error_ret: 223error_ret:
575 return ret; 224 return ret;
576} 225}
577 226
578static int __devexit adis16209_remove(struct spi_device *spi) 227static int adis16209_remove(struct spi_device *spi)
579{ 228{
580 struct iio_dev *indio_dev = spi_get_drvdata(spi); 229 struct iio_dev *indio_dev = spi_get_drvdata(spi);
230 struct adis *st = iio_priv(indio_dev);
581 231
582 iio_device_unregister(indio_dev); 232 iio_device_unregister(indio_dev);
583 adis16209_remove_trigger(indio_dev); 233 adis_cleanup_buffer_and_trigger(st, indio_dev);
584 iio_buffer_unregister(indio_dev);
585 adis16209_unconfigure_ring(indio_dev);
586 iio_device_free(indio_dev); 234 iio_device_free(indio_dev);
587 235
588 return 0; 236 return 0;
@@ -594,7 +242,7 @@ static struct spi_driver adis16209_driver = {
594 .owner = THIS_MODULE, 242 .owner = THIS_MODULE,
595 }, 243 },
596 .probe = adis16209_probe, 244 .probe = adis16209_probe,
597 .remove = __devexit_p(adis16209_remove), 245 .remove = adis16209_remove,
598}; 246};
599module_spi_driver(adis16209_driver); 247module_spi_driver(adis16209_driver);
600 248
diff --git a/drivers/staging/iio/accel/adis16209_ring.c b/drivers/staging/iio/accel/adis16209_ring.c
deleted file mode 100644
index f939e29d6c82..000000000000
--- a/drivers/staging/iio/accel/adis16209_ring.c
+++ /dev/null
@@ -1,134 +0,0 @@
1#include <linux/export.h>
2#include <linux/interrupt.h>
3#include <linux/mutex.h>
4#include <linux/kernel.h>
5#include <linux/spi/spi.h>
6#include <linux/slab.h>
7
8#include <linux/iio/iio.h>
9#include "../ring_sw.h"
10#include <linux/iio/trigger_consumer.h>
11#include "adis16209.h"
12
13/**
14 * adis16209_read_ring_data() read data registers which will be placed into ring
15 * @indio_dev: the IIO device
16 * @rx: somewhere to pass back the value read
17 **/
18static int adis16209_read_ring_data(struct iio_dev *indio_dev, u8 *rx)
19{
20 struct spi_message msg;
21 struct adis16209_state *st = iio_priv(indio_dev);
22 struct spi_transfer xfers[ADIS16209_OUTPUTS + 1];
23 int ret;
24 int i;
25
26 mutex_lock(&st->buf_lock);
27
28 spi_message_init(&msg);
29
30 memset(xfers, 0, sizeof(xfers));
31 for (i = 0; i <= ADIS16209_OUTPUTS; i++) {
32 xfers[i].bits_per_word = 8;
33 xfers[i].cs_change = 1;
34 xfers[i].len = 2;
35 xfers[i].delay_usecs = 30;
36 xfers[i].tx_buf = st->tx + 2 * i;
37 st->tx[2 * i]
38 = ADIS16209_READ_REG(ADIS16209_SUPPLY_OUT + 2 * i);
39 st->tx[2 * i + 1] = 0;
40 if (i >= 1)
41 xfers[i].rx_buf = rx + 2 * (i - 1);
42 spi_message_add_tail(&xfers[i], &msg);
43 }
44
45 ret = spi_sync(st->us, &msg);
46 if (ret)
47 dev_err(&st->us->dev, "problem when burst reading");
48
49 mutex_unlock(&st->buf_lock);
50
51 return ret;
52}
53
54/* Whilst this makes a lot of calls to iio_sw_ring functions - it is to device
55 * specific to be rolled into the core.
56 */
57static irqreturn_t adis16209_trigger_handler(int irq, void *p)
58{
59 struct iio_poll_func *pf = p;
60 struct iio_dev *indio_dev = pf->indio_dev;
61 struct adis16209_state *st = iio_priv(indio_dev);
62 int i = 0;
63 s16 *data;
64
65 data = kmalloc(indio_dev->scan_bytes, GFP_KERNEL);
66 if (data == NULL) {
67 dev_err(&st->us->dev, "memory alloc failed in ring bh");
68 goto done;
69 }
70
71 if (!bitmap_empty(indio_dev->active_scan_mask, indio_dev->masklength) &&
72 adis16209_read_ring_data(indio_dev, st->rx) >= 0)
73 for (; i < bitmap_weight(indio_dev->active_scan_mask,
74 indio_dev->masklength); i++)
75 data[i] = be16_to_cpup((__be16 *)&(st->rx[i*2]));
76
77 /* Guaranteed to be aligned with 8 byte boundary */
78 if (indio_dev->scan_timestamp)
79 *((s64 *)(data + ((i + 3)/4)*4)) = pf->timestamp;
80
81 iio_push_to_buffer(indio_dev->buffer, (u8 *)data);
82
83 kfree(data);
84done:
85 iio_trigger_notify_done(indio_dev->trig);
86
87 return IRQ_HANDLED;
88}
89
90void adis16209_unconfigure_ring(struct iio_dev *indio_dev)
91{
92 iio_dealloc_pollfunc(indio_dev->pollfunc);
93 iio_sw_rb_free(indio_dev->buffer);
94}
95
96static const struct iio_buffer_setup_ops adis16209_ring_setup_ops = {
97 .preenable = &iio_sw_buffer_preenable,
98 .postenable = &iio_triggered_buffer_postenable,
99 .predisable = &iio_triggered_buffer_predisable,
100};
101
102int adis16209_configure_ring(struct iio_dev *indio_dev)
103{
104 int ret = 0;
105 struct iio_buffer *ring;
106
107 ring = iio_sw_rb_allocate(indio_dev);
108 if (!ring) {
109 ret = -ENOMEM;
110 return ret;
111 }
112 indio_dev->buffer = ring;
113 ring->scan_timestamp = true;
114 indio_dev->setup_ops = &adis16209_ring_setup_ops;
115
116 indio_dev->pollfunc = iio_alloc_pollfunc(&iio_pollfunc_store_time,
117 &adis16209_trigger_handler,
118 IRQF_ONESHOT,
119 indio_dev,
120 "%s_consumer%d",
121 indio_dev->name,
122 indio_dev->id);
123 if (indio_dev->pollfunc == NULL) {
124 ret = -ENOMEM;
125 goto error_iio_sw_rb_free;
126 }
127
128 indio_dev->modes |= INDIO_BUFFER_TRIGGERED;
129 return 0;
130
131error_iio_sw_rb_free:
132 iio_sw_rb_free(indio_dev->buffer);
133 return ret;
134}
diff --git a/drivers/staging/iio/accel/adis16209_trigger.c b/drivers/staging/iio/accel/adis16209_trigger.c
deleted file mode 100644
index 2ad93dcaf40d..000000000000
--- a/drivers/staging/iio/accel/adis16209_trigger.c
+++ /dev/null
@@ -1,81 +0,0 @@
1#include <linux/interrupt.h>
2#include <linux/kernel.h>
3#include <linux/spi/spi.h>
4#include <linux/export.h>
5
6#include <linux/iio/iio.h>
7#include <linux/iio/trigger.h>
8#include "adis16209.h"
9
10/**
11 * adis16209_data_rdy_trig_poll() the event handler for the data rdy trig
12 **/
13static irqreturn_t adis16209_data_rdy_trig_poll(int irq, void *trig)
14{
15 iio_trigger_poll(trig, iio_get_time_ns());
16 return IRQ_HANDLED;
17}
18
19/**
20 * adis16209_data_rdy_trigger_set_state() set datardy interrupt state
21 **/
22static int adis16209_data_rdy_trigger_set_state(struct iio_trigger *trig,
23 bool state)
24{
25 struct iio_dev *indio_dev = trig->private_data;
26
27 dev_dbg(&indio_dev->dev, "%s (%d)\n", __func__, state);
28 return adis16209_set_irq(indio_dev, state);
29}
30
31static const struct iio_trigger_ops adis16209_trigger_ops = {
32 .owner = THIS_MODULE,
33 .set_trigger_state = &adis16209_data_rdy_trigger_set_state,
34};
35
36int adis16209_probe_trigger(struct iio_dev *indio_dev)
37{
38 int ret;
39 struct adis16209_state *st = iio_priv(indio_dev);
40
41 st->trig = iio_trigger_alloc("adis16209-dev%d", indio_dev->id);
42 if (st->trig == NULL) {
43 ret = -ENOMEM;
44 goto error_ret;
45 }
46
47 ret = request_irq(st->us->irq,
48 adis16209_data_rdy_trig_poll,
49 IRQF_TRIGGER_RISING,
50 "adis16209",
51 st->trig);
52 if (ret)
53 goto error_free_trig;
54 st->trig->dev.parent = &st->us->dev;
55 st->trig->ops = &adis16209_trigger_ops;
56 st->trig->private_data = indio_dev;
57 ret = iio_trigger_register(st->trig);
58
59 /* select default trigger */
60 indio_dev->trig = st->trig;
61 if (ret)
62 goto error_free_irq;
63
64 return 0;
65
66error_free_irq:
67 free_irq(st->us->irq, st->trig);
68error_free_trig:
69 iio_trigger_free(st->trig);
70error_ret:
71 return ret;
72}
73
74void adis16209_remove_trigger(struct iio_dev *indio_dev)
75{
76 struct adis16209_state *st = iio_priv(indio_dev);
77
78 iio_trigger_unregister(st->trig);
79 free_irq(st->us->irq, st->trig);
80 iio_trigger_free(st->trig);
81}
diff --git a/drivers/staging/iio/accel/adis16220.h b/drivers/staging/iio/accel/adis16220.h
index 024313cf5cf0..a894ad7fb26d 100644
--- a/drivers/staging/iio/accel/adis16220.h
+++ b/drivers/staging/iio/accel/adis16220.h
@@ -1,10 +1,9 @@
1#ifndef SPI_ADIS16220_H_ 1#ifndef SPI_ADIS16220_H_
2#define SPI_ADIS16220_H_ 2#define SPI_ADIS16220_H_
3 3
4#define ADIS16220_STARTUP_DELAY 220 /* ms */ 4#include <linux/iio/imu/adis.h>
5 5
6#define ADIS16220_READ_REG(a) a 6#define ADIS16220_STARTUP_DELAY 220 /* ms */
7#define ADIS16220_WRITE_REG(a) ((a) | 0x80)
8 7
9/* Flash memory write count */ 8/* Flash memory write count */
10#define ADIS16220_FLASH_CNT 0x00 9#define ADIS16220_FLASH_CNT 0x00
@@ -102,15 +101,15 @@
102#define ADIS16220_DIAG_STAT_FLASH_CHK (1<<6) 101#define ADIS16220_DIAG_STAT_FLASH_CHK (1<<6)
103#define ADIS16220_DIAG_STAT_SELF_TEST (1<<5) 102#define ADIS16220_DIAG_STAT_SELF_TEST (1<<5)
104/* Capture period violation/interruption */ 103/* Capture period violation/interruption */
105#define ADIS16220_DIAG_STAT_VIOLATION (1<<4) 104#define ADIS16220_DIAG_STAT_VIOLATION_BIT 4
106/* SPI communications failure */ 105/* SPI communications failure */
107#define ADIS16220_DIAG_STAT_SPI_FAIL (1<<3) 106#define ADIS16220_DIAG_STAT_SPI_FAIL_BIT 3
108/* Flash update failure */ 107/* Flash update failure */
109#define ADIS16220_DIAG_STAT_FLASH_UPT (1<<2) 108#define ADIS16220_DIAG_STAT_FLASH_UPT_BIT 2
110/* Power supply above 3.625 V */ 109/* Power supply above 3.625 V */
111#define ADIS16220_DIAG_STAT_POWER_HIGH (1<<1) 110#define ADIS16220_DIAG_STAT_POWER_HIGH_BIT 1
112/* Power supply below 3.15 V */ 111/* Power supply below 3.15 V */
113#define ADIS16220_DIAG_STAT_POWER_LOW (1<<0) 112#define ADIS16220_DIAG_STAT_POWER_LOW_BIT 0
114 113
115/* GLOB_CMD */ 114/* GLOB_CMD */
116#define ADIS16220_GLOB_CMD_SW_RESET (1<<7) 115#define ADIS16220_GLOB_CMD_SW_RESET (1<<7)
@@ -125,13 +124,14 @@
125 124
126/** 125/**
127 * struct adis16220_state - device instance specific data 126 * struct adis16220_state - device instance specific data
128 * @us: actual spi_device 127 * @adis: adis device
129 * @tx: transmit buffer 128 * @tx: transmit buffer
130 * @rx: receive buffer 129 * @rx: receive buffer
131 * @buf_lock: mutex to protect tx and rx 130 * @buf_lock: mutex to protect tx and rx
132 **/ 131 **/
133struct adis16220_state { 132struct adis16220_state {
134 struct spi_device *us; 133 struct adis adis;
134
135 struct mutex buf_lock; 135 struct mutex buf_lock;
136 u8 tx[ADIS16220_MAX_TX] ____cacheline_aligned; 136 u8 tx[ADIS16220_MAX_TX] ____cacheline_aligned;
137 u8 rx[ADIS16220_MAX_RX]; 137 u8 rx[ADIS16220_MAX_RX];
diff --git a/drivers/staging/iio/accel/adis16220_core.c b/drivers/staging/iio/accel/adis16220_core.c
index eaadd9df3f78..370b01aa767a 100644
--- a/drivers/staging/iio/accel/adis16220_core.c
+++ b/drivers/staging/iio/accel/adis16220_core.c
@@ -20,138 +20,19 @@
20 20
21#include "adis16220.h" 21#include "adis16220.h"
22 22
23#define DRIVER_NAME "adis16220"
24
25/**
26 * adis16220_spi_write_reg_8() - write single byte to a register
27 * @indio_dev: iio device associated with child of actual device
28 * @reg_address: the address of the register to be written
29 * @val: the value to write
30 **/
31static int adis16220_spi_write_reg_8(struct iio_dev *indio_dev,
32 u8 reg_address,
33 u8 val)
34{
35 int ret;
36 struct adis16220_state *st = iio_priv(indio_dev);
37
38 mutex_lock(&st->buf_lock);
39 st->tx[0] = ADIS16220_WRITE_REG(reg_address);
40 st->tx[1] = val;
41
42 ret = spi_write(st->us, st->tx, 2);
43 mutex_unlock(&st->buf_lock);
44
45 return ret;
46}
47
48/**
49 * adis16220_spi_write_reg_16() - write 2 bytes to a pair of registers
50 * @indio_dev: iio device associated with child of actual device
51 * @reg_address: the address of the lower of the two registers. Second register
52 * is assumed to have address one greater.
53 * @val: value to be written
54 **/
55static int adis16220_spi_write_reg_16(struct iio_dev *indio_dev,
56 u8 lower_reg_address,
57 u16 value)
58{
59 int ret;
60 struct spi_message msg;
61 struct adis16220_state *st = iio_priv(indio_dev);
62 struct spi_transfer xfers[] = {
63 {
64 .tx_buf = st->tx,
65 .bits_per_word = 8,
66 .len = 2,
67 .cs_change = 1,
68 .delay_usecs = 35,
69 }, {
70 .tx_buf = st->tx + 2,
71 .bits_per_word = 8,
72 .len = 2,
73 .delay_usecs = 35,
74 },
75 };
76
77 mutex_lock(&st->buf_lock);
78 st->tx[0] = ADIS16220_WRITE_REG(lower_reg_address);
79 st->tx[1] = value & 0xFF;
80 st->tx[2] = ADIS16220_WRITE_REG(lower_reg_address + 1);
81 st->tx[3] = (value >> 8) & 0xFF;
82
83 spi_message_init(&msg);
84 spi_message_add_tail(&xfers[0], &msg);
85 spi_message_add_tail(&xfers[1], &msg);
86 ret = spi_sync(st->us, &msg);
87 mutex_unlock(&st->buf_lock);
88
89 return ret;
90}
91
92/**
93 * adis16220_spi_read_reg_16() - read 2 bytes from a 16-bit register
94 * @indio_dev: iio device associated with child of actual device
95 * @reg_address: the address of the lower of the two registers. Second register
96 * is assumed to have address one greater.
97 * @val: somewhere to pass back the value read
98 **/
99static int adis16220_spi_read_reg_16(struct iio_dev *indio_dev,
100 u8 lower_reg_address,
101 u16 *val)
102{
103 struct spi_message msg;
104 struct adis16220_state *st = iio_priv(indio_dev);
105 int ret;
106 struct spi_transfer xfers[] = {
107 {
108 .tx_buf = st->tx,
109 .bits_per_word = 8,
110 .len = 2,
111 .cs_change = 1,
112 .delay_usecs = 35,
113 }, {
114 .rx_buf = st->rx,
115 .bits_per_word = 8,
116 .len = 2,
117 .cs_change = 1,
118 .delay_usecs = 35,
119 },
120 };
121
122 mutex_lock(&st->buf_lock);
123 st->tx[0] = ADIS16220_READ_REG(lower_reg_address);
124 st->tx[1] = 0;
125
126 spi_message_init(&msg);
127 spi_message_add_tail(&xfers[0], &msg);
128 spi_message_add_tail(&xfers[1], &msg);
129 ret = spi_sync(st->us, &msg);
130 if (ret) {
131 dev_err(&st->us->dev,
132 "problem when reading 16 bit register 0x%02X",
133 lower_reg_address);
134 goto error_ret;
135 }
136 *val = (st->rx[0] << 8) | st->rx[1];
137
138error_ret:
139 mutex_unlock(&st->buf_lock);
140 return ret;
141}
142
143static ssize_t adis16220_read_16bit(struct device *dev, 23static ssize_t adis16220_read_16bit(struct device *dev,
144 struct device_attribute *attr, 24 struct device_attribute *attr,
145 char *buf) 25 char *buf)
146{ 26{
147 struct iio_dev_attr *this_attr = to_iio_dev_attr(attr); 27 struct iio_dev_attr *this_attr = to_iio_dev_attr(attr);
148 struct iio_dev *indio_dev = dev_to_iio_dev(dev); 28 struct iio_dev *indio_dev = dev_to_iio_dev(dev);
29 struct adis16220_state *st = iio_priv(indio_dev);
149 ssize_t ret; 30 ssize_t ret;
150 s16 val = 0; 31 s16 val = 0;
151 32
152 /* Take the iio_dev status lock */ 33 /* Take the iio_dev status lock */
153 mutex_lock(&indio_dev->mlock); 34 mutex_lock(&indio_dev->mlock);
154 ret = adis16220_spi_read_reg_16(indio_dev, this_attr->address, 35 ret = adis_read_reg_16(&st->adis, this_attr->address,
155 (u16 *)&val); 36 (u16 *)&val);
156 mutex_unlock(&indio_dev->mlock); 37 mutex_unlock(&indio_dev->mlock);
157 if (ret) 38 if (ret)
@@ -166,13 +47,14 @@ static ssize_t adis16220_write_16bit(struct device *dev,
166{ 47{
167 struct iio_dev *indio_dev = dev_to_iio_dev(dev); 48 struct iio_dev *indio_dev = dev_to_iio_dev(dev);
168 struct iio_dev_attr *this_attr = to_iio_dev_attr(attr); 49 struct iio_dev_attr *this_attr = to_iio_dev_attr(attr);
50 struct adis16220_state *st = iio_priv(indio_dev);
169 int ret; 51 int ret;
170 u16 val; 52 u16 val;
171 53
172 ret = kstrtou16(buf, 10, &val); 54 ret = kstrtou16(buf, 10, &val);
173 if (ret) 55 if (ret)
174 goto error_ret; 56 goto error_ret;
175 ret = adis16220_spi_write_reg_16(indio_dev, this_attr->address, val); 57 ret = adis_write_reg_16(&st->adis, this_attr->address, val);
176 58
177error_ret: 59error_ret:
178 return ret ? ret : len; 60 return ret ? ret : len;
@@ -180,10 +62,11 @@ error_ret:
180 62
181static int adis16220_capture(struct iio_dev *indio_dev) 63static int adis16220_capture(struct iio_dev *indio_dev)
182{ 64{
65 struct adis16220_state *st = iio_priv(indio_dev);
183 int ret; 66 int ret;
184 ret = adis16220_spi_write_reg_16(indio_dev, 67
185 ADIS16220_GLOB_CMD, 68 /* initiates a manual data capture */
186 0xBF08); /* initiates a manual data capture */ 69 ret = adis_write_reg_16(&st->adis, ADIS16220_GLOB_CMD, 0xBF08);
187 if (ret) 70 if (ret)
188 dev_err(&indio_dev->dev, "problem beginning capture"); 71 dev_err(&indio_dev->dev, "problem beginning capture");
189 72
@@ -192,18 +75,6 @@ static int adis16220_capture(struct iio_dev *indio_dev)
192 return ret; 75 return ret;
193} 76}
194 77
195static int adis16220_reset(struct iio_dev *indio_dev)
196{
197 int ret;
198 ret = adis16220_spi_write_reg_8(indio_dev,
199 ADIS16220_GLOB_CMD,
200 ADIS16220_GLOB_CMD_SW_RESET);
201 if (ret)
202 dev_err(&indio_dev->dev, "problem resetting device");
203
204 return ret;
205}
206
207static ssize_t adis16220_write_capture(struct device *dev, 78static ssize_t adis16220_write_capture(struct device *dev,
208 struct device_attribute *attr, 79 struct device_attribute *attr,
209 const char *buf, size_t len) 80 const char *buf, size_t len)
@@ -224,81 +95,6 @@ static ssize_t adis16220_write_capture(struct device *dev,
224 return len; 95 return len;
225} 96}
226 97
227static int adis16220_check_status(struct iio_dev *indio_dev)
228{
229 u16 status;
230 int ret;
231
232 ret = adis16220_spi_read_reg_16(indio_dev, ADIS16220_DIAG_STAT,
233 &status);
234
235 if (ret < 0) {
236 dev_err(&indio_dev->dev, "Reading status failed\n");
237 goto error_ret;
238 }
239 ret = status & 0x7F;
240
241 if (status & ADIS16220_DIAG_STAT_VIOLATION)
242 dev_err(&indio_dev->dev,
243 "Capture period violation/interruption\n");
244 if (status & ADIS16220_DIAG_STAT_SPI_FAIL)
245 dev_err(&indio_dev->dev, "SPI failure\n");
246 if (status & ADIS16220_DIAG_STAT_FLASH_UPT)
247 dev_err(&indio_dev->dev, "Flash update failed\n");
248 if (status & ADIS16220_DIAG_STAT_POWER_HIGH)
249 dev_err(&indio_dev->dev, "Power supply above 3.625V\n");
250 if (status & ADIS16220_DIAG_STAT_POWER_LOW)
251 dev_err(&indio_dev->dev, "Power supply below 3.15V\n");
252
253error_ret:
254 return ret;
255}
256
257static int adis16220_self_test(struct iio_dev *indio_dev)
258{
259 int ret;
260 ret = adis16220_spi_write_reg_16(indio_dev,
261 ADIS16220_MSC_CTRL,
262 ADIS16220_MSC_CTRL_SELF_TEST_EN);
263 if (ret) {
264 dev_err(&indio_dev->dev, "problem starting self test");
265 goto err_ret;
266 }
267
268 adis16220_check_status(indio_dev);
269
270err_ret:
271 return ret;
272}
273
274static int adis16220_initial_setup(struct iio_dev *indio_dev)
275{
276 int ret;
277
278 /* Do self test */
279 ret = adis16220_self_test(indio_dev);
280 if (ret) {
281 dev_err(&indio_dev->dev, "self test failure");
282 goto err_ret;
283 }
284
285 /* Read status register to check the result */
286 ret = adis16220_check_status(indio_dev);
287 if (ret) {
288 adis16220_reset(indio_dev);
289 dev_err(&indio_dev->dev, "device not playing ball -> reset");
290 msleep(ADIS16220_STARTUP_DELAY);
291 ret = adis16220_check_status(indio_dev);
292 if (ret) {
293 dev_err(&indio_dev->dev, "giving up");
294 goto err_ret;
295 }
296 }
297
298err_ret:
299 return ret;
300}
301
302static ssize_t adis16220_capture_buffer_read(struct iio_dev *indio_dev, 98static ssize_t adis16220_capture_buffer_read(struct iio_dev *indio_dev,
303 char *buf, 99 char *buf,
304 loff_t off, 100 loff_t off,
@@ -335,7 +131,7 @@ static ssize_t adis16220_capture_buffer_read(struct iio_dev *indio_dev,
335 count = ADIS16220_CAPTURE_SIZE - off; 131 count = ADIS16220_CAPTURE_SIZE - off;
336 132
337 /* write the begin position of capture buffer */ 133 /* write the begin position of capture buffer */
338 ret = adis16220_spi_write_reg_16(indio_dev, 134 ret = adis_write_reg_16(&st->adis,
339 ADIS16220_CAPT_PNTR, 135 ADIS16220_CAPT_PNTR,
340 off > 1); 136 off > 1);
341 if (ret) 137 if (ret)
@@ -344,8 +140,9 @@ static ssize_t adis16220_capture_buffer_read(struct iio_dev *indio_dev,
344 /* read count/2 values from capture buffer */ 140 /* read count/2 values from capture buffer */
345 mutex_lock(&st->buf_lock); 141 mutex_lock(&st->buf_lock);
346 142
143
347 for (i = 0; i < count; i += 2) { 144 for (i = 0; i < count; i += 2) {
348 st->tx[i] = ADIS16220_READ_REG(addr); 145 st->tx[i] = ADIS_READ_REG(addr);
349 st->tx[i + 1] = 0; 146 st->tx[i + 1] = 0;
350 } 147 }
351 xfers[1].len = count; 148 xfers[1].len = count;
@@ -353,7 +150,7 @@ static ssize_t adis16220_capture_buffer_read(struct iio_dev *indio_dev,
353 spi_message_init(&msg); 150 spi_message_init(&msg);
354 spi_message_add_tail(&xfers[0], &msg); 151 spi_message_add_tail(&xfers[0], &msg);
355 spi_message_add_tail(&xfers[1], &msg); 152 spi_message_add_tail(&xfers[1], &msg);
356 ret = spi_sync(st->us, &msg); 153 ret = spi_sync(st->adis.spi, &msg);
357 if (ret) { 154 if (ret) {
358 155
359 mutex_unlock(&st->buf_lock); 156 mutex_unlock(&st->buf_lock);
@@ -474,6 +271,8 @@ static int adis16220_read_raw(struct iio_dev *indio_dev,
474 int *val, int *val2, 271 int *val, int *val2,
475 long mask) 272 long mask)
476{ 273{
274 struct adis16220_state *st = iio_priv(indio_dev);
275 const struct adis16220_address_spec *addr;
477 int ret = -EINVAL; 276 int ret = -EINVAL;
478 int addrind = 0; 277 int addrind = 0;
479 u16 uval; 278 u16 uval;
@@ -518,28 +317,21 @@ static int adis16220_read_raw(struct iio_dev *indio_dev,
518 default: 317 default:
519 return -EINVAL; 318 return -EINVAL;
520 } 319 }
521 if (adis16220_addresses[chan->address][addrind].sign) { 320 addr = &adis16220_addresses[chan->address][addrind];
522 ret = adis16220_spi_read_reg_16(indio_dev, 321 if (addr->sign) {
523 adis16220_addresses[chan 322 ret = adis_read_reg_16(&st->adis, addr->addr, &sval);
524 ->address]
525 [addrind].addr,
526 &sval);
527 if (ret) 323 if (ret)
528 return ret; 324 return ret;
529 bits = adis16220_addresses[chan->address][addrind].bits; 325 bits = addr->bits;
530 sval &= (1 << bits) - 1; 326 sval &= (1 << bits) - 1;
531 sval = (s16)(sval << (16 - bits)) >> (16 - bits); 327 sval = (s16)(sval << (16 - bits)) >> (16 - bits);
532 *val = sval; 328 *val = sval;
533 return IIO_VAL_INT; 329 return IIO_VAL_INT;
534 } else { 330 } else {
535 ret = adis16220_spi_read_reg_16(indio_dev, 331 ret = adis_read_reg_16(&st->adis, addr->addr, &uval);
536 adis16220_addresses[chan
537 ->address]
538 [addrind].addr,
539 &uval);
540 if (ret) 332 if (ret)
541 return ret; 333 return ret;
542 bits = adis16220_addresses[chan->address][addrind].bits; 334 bits = addr->bits;
543 uval &= (1 << bits) - 1; 335 uval &= (1 << bits) - 1;
544 *val = uval; 336 *val = uval;
545 return IIO_VAL_INT; 337 return IIO_VAL_INT;
@@ -603,7 +395,33 @@ static const struct iio_info adis16220_info = {
603 .read_raw = &adis16220_read_raw, 395 .read_raw = &adis16220_read_raw,
604}; 396};
605 397
606static int __devinit adis16220_probe(struct spi_device *spi) 398static const char * const adis16220_status_error_msgs[] = {
399 [ADIS16220_DIAG_STAT_VIOLATION_BIT] = "Capture period violation/interruption",
400 [ADIS16220_DIAG_STAT_SPI_FAIL_BIT] = "SPI failure",
401 [ADIS16220_DIAG_STAT_FLASH_UPT_BIT] = "Flash update failed",
402 [ADIS16220_DIAG_STAT_POWER_HIGH_BIT] = "Power supply above 3.625V",
403 [ADIS16220_DIAG_STAT_POWER_LOW_BIT] = "Power supply below 3.15V",
404};
405
406static const struct adis_data adis16220_data = {
407 .read_delay = 35,
408 .write_delay = 35,
409 .msc_ctrl_reg = ADIS16220_MSC_CTRL,
410 .glob_cmd_reg = ADIS16220_GLOB_CMD,
411 .diag_stat_reg = ADIS16220_DIAG_STAT,
412
413 .self_test_mask = ADIS16220_MSC_CTRL_SELF_TEST_EN,
414 .startup_delay = ADIS16220_STARTUP_DELAY,
415
416 .status_error_msgs = adis16220_status_error_msgs,
417 .status_error_mask = BIT(ADIS16220_DIAG_STAT_VIOLATION_BIT) |
418 BIT(ADIS16220_DIAG_STAT_SPI_FAIL_BIT) |
419 BIT(ADIS16220_DIAG_STAT_FLASH_UPT_BIT) |
420 BIT(ADIS16220_DIAG_STAT_POWER_HIGH_BIT) |
421 BIT(ADIS16220_DIAG_STAT_POWER_LOW_BIT),
422};
423
424static int adis16220_probe(struct spi_device *spi)
607{ 425{
608 int ret; 426 int ret;
609 struct adis16220_state *st; 427 struct adis16220_state *st;
@@ -620,9 +438,6 @@ static int __devinit adis16220_probe(struct spi_device *spi)
620 /* this is only used for removal purposes */ 438 /* this is only used for removal purposes */
621 spi_set_drvdata(spi, indio_dev); 439 spi_set_drvdata(spi, indio_dev);
622 440
623 st->us = spi;
624 mutex_init(&st->buf_lock);
625
626 indio_dev->name = spi->dev.driver->name; 441 indio_dev->name = spi->dev.driver->name;
627 indio_dev->dev.parent = &spi->dev; 442 indio_dev->dev.parent = &spi->dev;
628 indio_dev->info = &adis16220_info; 443 indio_dev->info = &adis16220_info;
@@ -646,8 +461,11 @@ static int __devinit adis16220_probe(struct spi_device *spi)
646 if (ret) 461 if (ret)
647 goto error_rm_adc1_bin; 462 goto error_rm_adc1_bin;
648 463
464 ret = adis_init(&st->adis, indio_dev, spi, &adis16220_data);
465 if (ret)
466 goto error_rm_adc2_bin;
649 /* Get the device into a sane initial state */ 467 /* Get the device into a sane initial state */
650 ret = adis16220_initial_setup(indio_dev); 468 ret = adis_initial_startup(&st->adis);
651 if (ret) 469 if (ret)
652 goto error_rm_adc2_bin; 470 goto error_rm_adc2_bin;
653 return 0; 471 return 0;
@@ -666,7 +484,7 @@ error_ret:
666 return ret; 484 return ret;
667} 485}
668 486
669static int __devexit adis16220_remove(struct spi_device *spi) 487static int adis16220_remove(struct spi_device *spi)
670{ 488{
671 struct iio_dev *indio_dev = spi_get_drvdata(spi); 489 struct iio_dev *indio_dev = spi_get_drvdata(spi);
672 490
@@ -685,7 +503,7 @@ static struct spi_driver adis16220_driver = {
685 .owner = THIS_MODULE, 503 .owner = THIS_MODULE,
686 }, 504 },
687 .probe = adis16220_probe, 505 .probe = adis16220_probe,
688 .remove = __devexit_p(adis16220_remove), 506 .remove = adis16220_remove,
689}; 507};
690module_spi_driver(adis16220_driver); 508module_spi_driver(adis16220_driver);
691 509
diff --git a/drivers/staging/iio/accel/adis16240.h b/drivers/staging/iio/accel/adis16240.h
index 3fabcc0b3471..d442d49f51f4 100644
--- a/drivers/staging/iio/accel/adis16240.h
+++ b/drivers/staging/iio/accel/adis16240.h
@@ -3,9 +3,6 @@
3 3
4#define ADIS16240_STARTUP_DELAY 220 /* ms */ 4#define ADIS16240_STARTUP_DELAY 220 /* ms */
5 5
6#define ADIS16240_READ_REG(a) a
7#define ADIS16240_WRITE_REG(a) ((a) | 0x80)
8
9/* Flash memory write count */ 6/* Flash memory write count */
10#define ADIS16240_FLASH_CNT 0x00 7#define ADIS16240_FLASH_CNT 0x00
11/* Output, power supply */ 8/* Output, power supply */
@@ -75,8 +72,6 @@
75/* System command */ 72/* System command */
76#define ADIS16240_GLOB_CMD 0x4A 73#define ADIS16240_GLOB_CMD 0x4A
77 74
78#define ADIS16240_OUTPUTS 6
79
80/* MSC_CTRL */ 75/* MSC_CTRL */
81/* Enables sum-of-squares output (XYZPEAK_OUT) */ 76/* Enables sum-of-squares output (XYZPEAK_OUT) */
82#define ADIS16240_MSC_CTRL_XYZPEAK_OUT_EN (1 << 15) 77#define ADIS16240_MSC_CTRL_XYZPEAK_OUT_EN (1 << 15)
@@ -101,17 +96,17 @@
101/* Flash test, checksum flag: 1 = mismatch, 0 = match */ 96/* Flash test, checksum flag: 1 = mismatch, 0 = match */
102#define ADIS16240_DIAG_STAT_CHKSUM (1<<6) 97#define ADIS16240_DIAG_STAT_CHKSUM (1<<6)
103/* Power-on, self-test flag: 1 = failure, 0 = pass */ 98/* Power-on, self-test flag: 1 = failure, 0 = pass */
104#define ADIS16240_DIAG_STAT_PWRON_FAIL (1<<5) 99#define ADIS16240_DIAG_STAT_PWRON_FAIL_BIT 5
105/* Power-on self-test: 1 = in-progress, 0 = complete */ 100/* Power-on self-test: 1 = in-progress, 0 = complete */
106#define ADIS16240_DIAG_STAT_PWRON_BUSY (1<<4) 101#define ADIS16240_DIAG_STAT_PWRON_BUSY (1<<4)
107/* SPI communications failure */ 102/* SPI communications failure */
108#define ADIS16240_DIAG_STAT_SPI_FAIL (1<<3) 103#define ADIS16240_DIAG_STAT_SPI_FAIL_BIT 3
109/* Flash update failure */ 104/* Flash update failure */
110#define ADIS16240_DIAG_STAT_FLASH_UPT (1<<2) 105#define ADIS16240_DIAG_STAT_FLASH_UPT_BIT 2
111/* Power supply above 3.625 V */ 106/* Power supply above 3.625 V */
112#define ADIS16240_DIAG_STAT_POWER_HIGH (1<<1) 107#define ADIS16240_DIAG_STAT_POWER_HIGH_BIT 1
113 /* Power supply below 3.15 V */ 108 /* Power supply below 3.15 V */
114#define ADIS16240_DIAG_STAT_POWER_LOW (1<<0) 109#define ADIS16240_DIAG_STAT_POWER_LOW_BIT 0
115 110
116/* GLOB_CMD */ 111/* GLOB_CMD */
117#define ADIS16240_GLOB_CMD_RESUME (1<<8) 112#define ADIS16240_GLOB_CMD_RESUME (1<<8)
@@ -120,77 +115,15 @@
120 115
121#define ADIS16240_ERROR_ACTIVE (1<<14) 116#define ADIS16240_ERROR_ACTIVE (1<<14)
122 117
123#define ADIS16240_MAX_TX 24
124#define ADIS16240_MAX_RX 24
125
126/**
127 * struct adis16240_state - device instance specific data
128 * @us: actual spi_device
129 * @trig: data ready trigger registered with iio
130 * @tx: transmit buffer
131 * @rx: receive buffer
132 * @buf_lock: mutex to protect tx and rx
133 **/
134struct adis16240_state {
135 struct spi_device *us;
136 struct iio_trigger *trig;
137 struct mutex buf_lock;
138 u8 tx[ADIS16240_MAX_TX] ____cacheline_aligned;
139 u8 rx[ADIS16240_MAX_RX];
140};
141
142int adis16240_set_irq(struct iio_dev *indio_dev, bool enable);
143
144/* At the moment triggers are only used for ring buffer 118/* At the moment triggers are only used for ring buffer
145 * filling. This may change! 119 * filling. This may change!
146 */ 120 */
147 121
148#define ADIS16240_SCAN_SUPPLY 0 122#define ADIS16240_SCAN_ACC_X 0
149#define ADIS16240_SCAN_ACC_X 1 123#define ADIS16240_SCAN_ACC_Y 1
150#define ADIS16240_SCAN_ACC_Y 2 124#define ADIS16240_SCAN_ACC_Z 2
151#define ADIS16240_SCAN_ACC_Z 3 125#define ADIS16240_SCAN_SUPPLY 3
152#define ADIS16240_SCAN_AUX_ADC 4 126#define ADIS16240_SCAN_AUX_ADC 4
153#define ADIS16240_SCAN_TEMP 5 127#define ADIS16240_SCAN_TEMP 5
154 128
155#ifdef CONFIG_IIO_BUFFER
156void adis16240_remove_trigger(struct iio_dev *indio_dev);
157int adis16240_probe_trigger(struct iio_dev *indio_dev);
158
159ssize_t adis16240_read_data_from_ring(struct device *dev,
160 struct device_attribute *attr,
161 char *buf);
162
163
164int adis16240_configure_ring(struct iio_dev *indio_dev);
165void adis16240_unconfigure_ring(struct iio_dev *indio_dev);
166
167#else /* CONFIG_IIO_BUFFER */
168
169static inline void adis16240_remove_trigger(struct iio_dev *indio_dev)
170{
171}
172
173static inline int adis16240_probe_trigger(struct iio_dev *indio_dev)
174{
175 return 0;
176}
177
178static inline ssize_t
179adis16240_read_data_from_ring(struct device *dev,
180 struct device_attribute *attr,
181 char *buf)
182{
183 return 0;
184}
185
186static int adis16240_configure_ring(struct iio_dev *indio_dev)
187{
188 return 0;
189}
190
191static inline void adis16240_unconfigure_ring(struct iio_dev *indio_dev)
192{
193}
194
195#endif /* CONFIG_IIO_BUFFER */
196#endif /* SPI_ADIS16240_H_ */ 129#endif /* SPI_ADIS16240_H_ */
diff --git a/drivers/staging/iio/accel/adis16240_core.c b/drivers/staging/iio/accel/adis16240_core.c
index 35e093973d5c..e97fa0b0233d 100644
--- a/drivers/staging/iio/accel/adis16240_core.c
+++ b/drivers/staging/iio/accel/adis16240_core.c
@@ -22,151 +22,29 @@
22#include <linux/iio/iio.h> 22#include <linux/iio/iio.h>
23#include <linux/iio/sysfs.h> 23#include <linux/iio/sysfs.h>
24#include <linux/iio/buffer.h> 24#include <linux/iio/buffer.h>
25#include <linux/iio/imu/adis.h>
25 26
26#include "adis16240.h" 27#include "adis16240.h"
27 28
28#define DRIVER_NAME "adis16240"
29
30static int adis16240_check_status(struct iio_dev *indio_dev);
31
32/**
33 * adis16240_spi_write_reg_8() - write single byte to a register
34 * @indio_dev: iio_dev associated with device
35 * @reg_address: the address of the register to be written
36 * @val: the value to write
37 **/
38static int adis16240_spi_write_reg_8(struct iio_dev *indio_dev,
39 u8 reg_address,
40 u8 val)
41{
42 int ret;
43 struct adis16240_state *st = iio_priv(indio_dev);
44
45 mutex_lock(&st->buf_lock);
46 st->tx[0] = ADIS16240_WRITE_REG(reg_address);
47 st->tx[1] = val;
48
49 ret = spi_write(st->us, st->tx, 2);
50 mutex_unlock(&st->buf_lock);
51
52 return ret;
53}
54
55/**
56 * adis16240_spi_write_reg_16() - write 2 bytes to a pair of registers
57 * @indio_dev: iio_dev for this device
58 * @reg_address: the address of the lower of the two registers. Second register
59 * is assumed to have address one greater.
60 * @val: value to be written
61 **/
62static int adis16240_spi_write_reg_16(struct iio_dev *indio_dev,
63 u8 lower_reg_address,
64 u16 value)
65{
66 int ret;
67 struct spi_message msg;
68 struct adis16240_state *st = iio_priv(indio_dev);
69 struct spi_transfer xfers[] = {
70 {
71 .tx_buf = st->tx,
72 .bits_per_word = 8,
73 .len = 2,
74 .cs_change = 1,
75 .delay_usecs = 35,
76 }, {
77 .tx_buf = st->tx + 2,
78 .bits_per_word = 8,
79 .len = 2,
80 .delay_usecs = 35,
81 },
82 };
83
84 mutex_lock(&st->buf_lock);
85 st->tx[0] = ADIS16240_WRITE_REG(lower_reg_address);
86 st->tx[1] = value & 0xFF;
87 st->tx[2] = ADIS16240_WRITE_REG(lower_reg_address + 1);
88 st->tx[3] = (value >> 8) & 0xFF;
89
90 spi_message_init(&msg);
91 spi_message_add_tail(&xfers[0], &msg);
92 spi_message_add_tail(&xfers[1], &msg);
93 ret = spi_sync(st->us, &msg);
94 mutex_unlock(&st->buf_lock);
95
96 return ret;
97}
98
99/**
100 * adis16240_spi_read_reg_16() - read 2 bytes from a 16-bit register
101 * @indio_dev: iio_dev for this device
102 * @reg_address: the address of the lower of the two registers. Second register
103 * is assumed to have address one greater.
104 * @val: somewhere to pass back the value read
105 **/
106static int adis16240_spi_read_reg_16(struct iio_dev *indio_dev,
107 u8 lower_reg_address,
108 u16 *val)
109{
110 struct spi_message msg;
111 struct adis16240_state *st = iio_priv(indio_dev);
112 int ret;
113 struct spi_transfer xfers[] = {
114 {
115 .tx_buf = st->tx,
116 .bits_per_word = 8,
117 .len = 2,
118 .cs_change = 1,
119 .delay_usecs = 35,
120 }, {
121 .rx_buf = st->rx,
122 .bits_per_word = 8,
123 .len = 2,
124 .cs_change = 1,
125 .delay_usecs = 35,
126 },
127 };
128
129 mutex_lock(&st->buf_lock);
130 st->tx[0] = ADIS16240_READ_REG(lower_reg_address);
131 st->tx[1] = 0;
132 st->tx[2] = 0;
133 st->tx[3] = 0;
134
135 spi_message_init(&msg);
136 spi_message_add_tail(&xfers[0], &msg);
137 spi_message_add_tail(&xfers[1], &msg);
138 ret = spi_sync(st->us, &msg);
139 if (ret) {
140 dev_err(&st->us->dev,
141 "problem when reading 16 bit register 0x%02X",
142 lower_reg_address);
143 goto error_ret;
144 }
145 *val = (st->rx[0] << 8) | st->rx[1];
146
147error_ret:
148 mutex_unlock(&st->buf_lock);
149 return ret;
150}
151
152static ssize_t adis16240_spi_read_signed(struct device *dev, 29static ssize_t adis16240_spi_read_signed(struct device *dev,
153 struct device_attribute *attr, 30 struct device_attribute *attr,
154 char *buf, 31 char *buf,
155 unsigned bits) 32 unsigned bits)
156{ 33{
157 struct iio_dev *indio_dev = dev_to_iio_dev(dev); 34 struct iio_dev *indio_dev = dev_to_iio_dev(dev);
35 struct adis *st = iio_priv(indio_dev);
158 int ret; 36 int ret;
159 s16 val = 0; 37 s16 val = 0;
160 unsigned shift = 16 - bits; 38 unsigned shift = 16 - bits;
161 struct iio_dev_attr *this_attr = to_iio_dev_attr(attr); 39 struct iio_dev_attr *this_attr = to_iio_dev_attr(attr);
162 40
163 ret = adis16240_spi_read_reg_16(indio_dev, 41 ret = adis_read_reg_16(st,
164 this_attr->address, (u16 *)&val); 42 this_attr->address, (u16 *)&val);
165 if (ret) 43 if (ret)
166 return ret; 44 return ret;
167 45
168 if (val & ADIS16240_ERROR_ACTIVE) 46 if (val & ADIS16240_ERROR_ACTIVE)
169 adis16240_check_status(indio_dev); 47 adis_check_status(st);
170 48
171 val = ((s16)(val << shift) >> shift); 49 val = ((s16)(val << shift) >> shift);
172 return sprintf(buf, "%d\n", val); 50 return sprintf(buf, "%d\n", val);
@@ -187,152 +65,16 @@ static ssize_t adis16240_read_12bit_signed(struct device *dev,
187 return ret; 65 return ret;
188} 66}
189 67
190static int adis16240_reset(struct iio_dev *indio_dev)
191{
192 int ret;
193 ret = adis16240_spi_write_reg_8(indio_dev,
194 ADIS16240_GLOB_CMD,
195 ADIS16240_GLOB_CMD_SW_RESET);
196 if (ret)
197 dev_err(&indio_dev->dev, "problem resetting device");
198
199 return ret;
200}
201
202int adis16240_set_irq(struct iio_dev *indio_dev, bool enable)
203{
204 int ret = 0;
205 u16 msc;
206
207 ret = adis16240_spi_read_reg_16(indio_dev,
208 ADIS16240_MSC_CTRL, &msc);
209 if (ret)
210 goto error_ret;
211
212 msc |= ADIS16240_MSC_CTRL_ACTIVE_HIGH;
213 msc &= ~ADIS16240_MSC_CTRL_DATA_RDY_DIO2;
214 if (enable)
215 msc |= ADIS16240_MSC_CTRL_DATA_RDY_EN;
216 else
217 msc &= ~ADIS16240_MSC_CTRL_DATA_RDY_EN;
218
219 ret = adis16240_spi_write_reg_16(indio_dev,
220 ADIS16240_MSC_CTRL, msc);
221
222error_ret:
223 return ret;
224}
225
226static int adis16240_self_test(struct iio_dev *indio_dev)
227{
228 int ret;
229 ret = adis16240_spi_write_reg_16(indio_dev,
230 ADIS16240_MSC_CTRL,
231 ADIS16240_MSC_CTRL_SELF_TEST_EN);
232 if (ret) {
233 dev_err(&indio_dev->dev, "problem starting self test");
234 goto err_ret;
235 }
236
237 msleep(ADIS16240_STARTUP_DELAY);
238
239 adis16240_check_status(indio_dev);
240
241err_ret:
242 return ret;
243}
244
245static int adis16240_check_status(struct iio_dev *indio_dev)
246{
247 u16 status;
248 int ret;
249 struct device *dev = &indio_dev->dev;
250
251 ret = adis16240_spi_read_reg_16(indio_dev,
252 ADIS16240_DIAG_STAT, &status);
253
254 if (ret < 0) {
255 dev_err(dev, "Reading status failed\n");
256 goto error_ret;
257 }
258
259 ret = status & 0x2F;
260 if (status & ADIS16240_DIAG_STAT_PWRON_FAIL)
261 dev_err(dev, "Power-on, self-test fail\n");
262 if (status & ADIS16240_DIAG_STAT_SPI_FAIL)
263 dev_err(dev, "SPI failure\n");
264 if (status & ADIS16240_DIAG_STAT_FLASH_UPT)
265 dev_err(dev, "Flash update failed\n");
266 if (status & ADIS16240_DIAG_STAT_POWER_HIGH)
267 dev_err(dev, "Power supply above 3.625V\n");
268 if (status & ADIS16240_DIAG_STAT_POWER_LOW)
269 dev_err(dev, "Power supply below 2.225V\n");
270
271error_ret:
272 return ret;
273}
274
275static int adis16240_initial_setup(struct iio_dev *indio_dev)
276{
277 int ret;
278 struct device *dev = &indio_dev->dev;
279
280 /* Disable IRQ */
281 ret = adis16240_set_irq(indio_dev, false);
282 if (ret) {
283 dev_err(dev, "disable irq failed");
284 goto err_ret;
285 }
286
287 /* Do self test */
288 ret = adis16240_self_test(indio_dev);
289 if (ret) {
290 dev_err(dev, "self test failure");
291 goto err_ret;
292 }
293
294 /* Read status register to check the result */
295 ret = adis16240_check_status(indio_dev);
296 if (ret) {
297 adis16240_reset(indio_dev);
298 dev_err(dev, "device not playing ball -> reset");
299 msleep(ADIS16240_STARTUP_DELAY);
300 ret = adis16240_check_status(indio_dev);
301 if (ret) {
302 dev_err(dev, "giving up");
303 goto err_ret;
304 }
305 }
306
307err_ret:
308 return ret;
309}
310
311static IIO_DEVICE_ATTR(in_accel_xyz_squared_peak_raw, S_IRUGO, 68static IIO_DEVICE_ATTR(in_accel_xyz_squared_peak_raw, S_IRUGO,
312 adis16240_read_12bit_signed, NULL, 69 adis16240_read_12bit_signed, NULL,
313 ADIS16240_XYZPEAK_OUT); 70 ADIS16240_XYZPEAK_OUT);
314 71
315static IIO_CONST_ATTR_SAMP_FREQ_AVAIL("4096"); 72static IIO_CONST_ATTR_SAMP_FREQ_AVAIL("4096");
316 73
317enum adis16240_chan { 74static const u8 adis16240_addresses[][2] = {
318 in_supply, 75 [ADIS16240_SCAN_ACC_X] = { ADIS16240_XACCL_OFF, ADIS16240_XPEAK_OUT },
319 in_aux, 76 [ADIS16240_SCAN_ACC_Y] = { ADIS16240_YACCL_OFF, ADIS16240_YPEAK_OUT },
320 accel_x, 77 [ADIS16240_SCAN_ACC_Z] = { ADIS16240_ZACCL_OFF, ADIS16240_ZPEAK_OUT },
321 accel_y,
322 accel_z,
323 temp,
324};
325
326static const u8 adis16240_addresses[6][3] = {
327 [in_supply] = { ADIS16240_SUPPLY_OUT },
328 [in_aux] = { ADIS16240_AUX_ADC },
329 [accel_x] = { ADIS16240_XACCL_OUT, ADIS16240_XACCL_OFF,
330 ADIS16240_XPEAK_OUT },
331 [accel_y] = { ADIS16240_YACCL_OUT, ADIS16240_YACCL_OFF,
332 ADIS16240_YPEAK_OUT },
333 [accel_z] = { ADIS16240_ZACCL_OUT, ADIS16240_ZACCL_OFF,
334 ADIS16240_ZPEAK_OUT },
335 [temp] = { ADIS16240_TEMP_OUT },
336}; 78};
337 79
338static int adis16240_read_raw(struct iio_dev *indio_dev, 80static int adis16240_read_raw(struct iio_dev *indio_dev,
@@ -340,6 +82,7 @@ static int adis16240_read_raw(struct iio_dev *indio_dev,
340 int *val, int *val2, 82 int *val, int *val2,
341 long mask) 83 long mask)
342{ 84{
85 struct adis *st = iio_priv(indio_dev);
343 int ret; 86 int ret;
344 int bits; 87 int bits;
345 u8 addr; 88 u8 addr;
@@ -347,29 +90,8 @@ static int adis16240_read_raw(struct iio_dev *indio_dev,
347 90
348 switch (mask) { 91 switch (mask) {
349 case IIO_CHAN_INFO_RAW: 92 case IIO_CHAN_INFO_RAW:
350 mutex_lock(&indio_dev->mlock); 93 return adis_single_conversion(indio_dev, chan,
351 addr = adis16240_addresses[chan->address][0]; 94 ADIS16240_ERROR_ACTIVE, val);
352 ret = adis16240_spi_read_reg_16(indio_dev, addr, &val16);
353 if (ret) {
354 mutex_unlock(&indio_dev->mlock);
355 return ret;
356 }
357
358 if (val16 & ADIS16240_ERROR_ACTIVE) {
359 ret = adis16240_check_status(indio_dev);
360 if (ret) {
361 mutex_unlock(&indio_dev->mlock);
362 return ret;
363 }
364 }
365 val16 = val16 & ((1 << chan->scan_type.realbits) - 1);
366 if (chan->scan_type.sign == 's')
367 val16 = (s16)(val16 <<
368 (16 - chan->scan_type.realbits)) >>
369 (16 - chan->scan_type.realbits);
370 *val = val16;
371 mutex_unlock(&indio_dev->mlock);
372 return IIO_VAL_INT;
373 case IIO_CHAN_INFO_SCALE: 95 case IIO_CHAN_INFO_SCALE:
374 switch (chan->type) { 96 switch (chan->type) {
375 case IIO_VOLTAGE: 97 case IIO_VOLTAGE:
@@ -402,8 +124,8 @@ static int adis16240_read_raw(struct iio_dev *indio_dev,
402 case IIO_CHAN_INFO_CALIBBIAS: 124 case IIO_CHAN_INFO_CALIBBIAS:
403 bits = 10; 125 bits = 10;
404 mutex_lock(&indio_dev->mlock); 126 mutex_lock(&indio_dev->mlock);
405 addr = adis16240_addresses[chan->address][1]; 127 addr = adis16240_addresses[chan->scan_index][0];
406 ret = adis16240_spi_read_reg_16(indio_dev, addr, &val16); 128 ret = adis_read_reg_16(st, addr, &val16);
407 if (ret) { 129 if (ret) {
408 mutex_unlock(&indio_dev->mlock); 130 mutex_unlock(&indio_dev->mlock);
409 return ret; 131 return ret;
@@ -416,8 +138,8 @@ static int adis16240_read_raw(struct iio_dev *indio_dev,
416 case IIO_CHAN_INFO_PEAK: 138 case IIO_CHAN_INFO_PEAK:
417 bits = 10; 139 bits = 10;
418 mutex_lock(&indio_dev->mlock); 140 mutex_lock(&indio_dev->mlock);
419 addr = adis16240_addresses[chan->address][2]; 141 addr = adis16240_addresses[chan->scan_index][1];
420 ret = adis16240_spi_read_reg_16(indio_dev, addr, &val16); 142 ret = adis_read_reg_16(st, addr, &val16);
421 if (ret) { 143 if (ret) {
422 mutex_unlock(&indio_dev->mlock); 144 mutex_unlock(&indio_dev->mlock);
423 return ret; 145 return ret;
@@ -437,104 +159,32 @@ static int adis16240_write_raw(struct iio_dev *indio_dev,
437 int val2, 159 int val2,
438 long mask) 160 long mask)
439{ 161{
162 struct adis *st = iio_priv(indio_dev);
440 int bits = 10; 163 int bits = 10;
441 s16 val16; 164 s16 val16;
442 u8 addr; 165 u8 addr;
443 switch (mask) { 166 switch (mask) {
444 case IIO_CHAN_INFO_CALIBBIAS: 167 case IIO_CHAN_INFO_CALIBBIAS:
445 val16 = val & ((1 << bits) - 1); 168 val16 = val & ((1 << bits) - 1);
446 addr = adis16240_addresses[chan->address][1]; 169 addr = adis16240_addresses[chan->scan_index][0];
447 return adis16240_spi_write_reg_16(indio_dev, addr, val16); 170 return adis_write_reg_16(st, addr, val16);
448 } 171 }
449 return -EINVAL; 172 return -EINVAL;
450} 173}
451 174
452static const struct iio_chan_spec adis16240_channels[] = { 175static const struct iio_chan_spec adis16240_channels[] = {
453 { 176 ADIS_SUPPLY_CHAN(ADIS16240_SUPPLY_OUT, ADIS16240_SCAN_SUPPLY, 10),
454 .type = IIO_VOLTAGE, 177 ADIS_AUX_ADC_CHAN(ADIS16240_AUX_ADC, ADIS16240_SCAN_AUX_ADC, 10),
455 .indexed = 1, 178 ADIS_ACCEL_CHAN(X, ADIS16240_XACCL_OUT, ADIS16240_SCAN_ACC_X,
456 .channel = 0,
457 .extend_name = "supply",
458 .info_mask = IIO_CHAN_INFO_RAW_SEPARATE_BIT |
459 IIO_CHAN_INFO_SCALE_SEPARATE_BIT,
460 .address = in_supply,
461 .scan_index = ADIS16240_SCAN_SUPPLY,
462 .scan_type = {
463 .sign = 'u',
464 .realbits = 10,
465 .storagebits = 16,
466 },
467 }, {
468 .type = IIO_VOLTAGE,
469 .indexed = 1,
470 .channel = 1,
471 .info_mask = IIO_CHAN_INFO_RAW_SEPARATE_BIT,
472 .address = in_aux,
473 .scan_index = ADIS16240_SCAN_AUX_ADC,
474 .scan_type = {
475 .sign = 'u',
476 .realbits = 10,
477 .storagebits = 16,
478 },
479 }, {
480 .type = IIO_ACCEL,
481 .modified = 1,
482 .channel2 = IIO_MOD_X,
483 .info_mask = IIO_CHAN_INFO_RAW_SEPARATE_BIT |
484 IIO_CHAN_INFO_SCALE_SHARED_BIT |
485 IIO_CHAN_INFO_CALIBBIAS_SEPARATE_BIT | 179 IIO_CHAN_INFO_CALIBBIAS_SEPARATE_BIT |
486 IIO_CHAN_INFO_PEAK_SEPARATE_BIT, 180 IIO_CHAN_INFO_PEAK_SEPARATE_BIT, 10),
487 .address = accel_x, 181 ADIS_ACCEL_CHAN(Y, ADIS16240_YACCL_OUT, ADIS16240_SCAN_ACC_Y,
488 .scan_index = ADIS16240_SCAN_ACC_X,
489 .scan_type = {
490 .sign = 's',
491 .realbits = 10,
492 .storagebits = 16,
493 },
494 }, {
495 .type = IIO_ACCEL,
496 .modified = 1,
497 .channel2 = IIO_MOD_Y,
498 .info_mask = IIO_CHAN_INFO_RAW_SEPARATE_BIT |
499 IIO_CHAN_INFO_SCALE_SHARED_BIT |
500 IIO_CHAN_INFO_CALIBBIAS_SEPARATE_BIT | 182 IIO_CHAN_INFO_CALIBBIAS_SEPARATE_BIT |
501 IIO_CHAN_INFO_PEAK_SEPARATE_BIT, 183 IIO_CHAN_INFO_PEAK_SEPARATE_BIT, 10),
502 .address = accel_y, 184 ADIS_ACCEL_CHAN(Z, ADIS16240_ZACCL_OUT, ADIS16240_SCAN_ACC_Z,
503 .scan_index = ADIS16240_SCAN_ACC_Y,
504 .scan_type = {
505 .sign = 's',
506 .realbits = 10,
507 .storagebits = 16,
508 },
509 }, {
510 .type = IIO_ACCEL,
511 .modified = 1,
512 .channel2 = IIO_MOD_Z,
513 .info_mask = IIO_CHAN_INFO_RAW_SEPARATE_BIT |
514 IIO_CHAN_INFO_SCALE_SHARED_BIT |
515 IIO_CHAN_INFO_CALIBBIAS_SEPARATE_BIT | 185 IIO_CHAN_INFO_CALIBBIAS_SEPARATE_BIT |
516 IIO_CHAN_INFO_PEAK_SEPARATE_BIT, 186 IIO_CHAN_INFO_PEAK_SEPARATE_BIT, 10),
517 .address = accel_z, 187 ADIS_TEMP_CHAN(ADIS16240_TEMP_OUT, ADIS16240_SCAN_TEMP, 10),
518 .scan_index = ADIS16240_SCAN_ACC_Z,
519 .scan_type = {
520 .sign = 's',
521 .realbits = 10,
522 .storagebits = 16,
523 },
524 }, {
525 .type = IIO_TEMP,
526 .indexed = 1,
527 .channel = 0,
528 .info_mask = IIO_CHAN_INFO_RAW_SEPARATE_BIT |
529 IIO_CHAN_INFO_SCALE_SEPARATE_BIT,
530 .address = temp,
531 .scan_index = ADIS16240_SCAN_TEMP,
532 .scan_type = {
533 .sign = 'u',
534 .realbits = 10,
535 .storagebits = 16,
536 },
537 },
538 IIO_CHAN_SOFT_TIMESTAMP(6) 188 IIO_CHAN_SOFT_TIMESTAMP(6)
539}; 189};
540 190
@@ -552,13 +202,40 @@ static const struct iio_info adis16240_info = {
552 .attrs = &adis16240_attribute_group, 202 .attrs = &adis16240_attribute_group,
553 .read_raw = &adis16240_read_raw, 203 .read_raw = &adis16240_read_raw,
554 .write_raw = &adis16240_write_raw, 204 .write_raw = &adis16240_write_raw,
205 .update_scan_mode = adis_update_scan_mode,
555 .driver_module = THIS_MODULE, 206 .driver_module = THIS_MODULE,
556}; 207};
557 208
558static int __devinit adis16240_probe(struct spi_device *spi) 209static const char * const adis16240_status_error_msgs[] = {
210 [ADIS16240_DIAG_STAT_PWRON_FAIL_BIT] = "Power on, self-test failed",
211 [ADIS16240_DIAG_STAT_SPI_FAIL_BIT] = "SPI failure",
212 [ADIS16240_DIAG_STAT_FLASH_UPT_BIT] = "Flash update failed",
213 [ADIS16240_DIAG_STAT_POWER_HIGH_BIT] = "Power supply above 3.625V",
214 [ADIS16240_DIAG_STAT_POWER_LOW_BIT] = "Power supply below 2.225V",
215};
216
217static const struct adis_data adis16240_data = {
218 .write_delay = 35,
219 .read_delay = 35,
220 .msc_ctrl_reg = ADIS16240_MSC_CTRL,
221 .glob_cmd_reg = ADIS16240_GLOB_CMD,
222 .diag_stat_reg = ADIS16240_DIAG_STAT,
223
224 .self_test_mask = ADIS16240_MSC_CTRL_SELF_TEST_EN,
225 .startup_delay = ADIS16240_STARTUP_DELAY,
226
227 .status_error_msgs = adis16240_status_error_msgs,
228 .status_error_mask = BIT(ADIS16240_DIAG_STAT_PWRON_FAIL_BIT) |
229 BIT(ADIS16240_DIAG_STAT_SPI_FAIL_BIT) |
230 BIT(ADIS16240_DIAG_STAT_FLASH_UPT_BIT) |
231 BIT(ADIS16240_DIAG_STAT_POWER_HIGH_BIT) |
232 BIT(ADIS16240_DIAG_STAT_POWER_LOW_BIT),
233};
234
235static int adis16240_probe(struct spi_device *spi)
559{ 236{
560 int ret; 237 int ret;
561 struct adis16240_state *st; 238 struct adis *st;
562 struct iio_dev *indio_dev; 239 struct iio_dev *indio_dev;
563 240
564 /* setup the industrialio driver allocated elements */ 241 /* setup the industrialio driver allocated elements */
@@ -571,9 +248,6 @@ static int __devinit adis16240_probe(struct spi_device *spi)
571 /* this is only used for removal purposes */ 248 /* this is only used for removal purposes */
572 spi_set_drvdata(spi, indio_dev); 249 spi_set_drvdata(spi, indio_dev);
573 250
574 st->us = spi;
575 mutex_init(&st->buf_lock);
576
577 indio_dev->name = spi->dev.driver->name; 251 indio_dev->name = spi->dev.driver->name;
578 indio_dev->dev.parent = &spi->dev; 252 indio_dev->dev.parent = &spi->dev;
579 indio_dev->info = &adis16240_info; 253 indio_dev->info = &adis16240_info;
@@ -581,54 +255,37 @@ static int __devinit adis16240_probe(struct spi_device *spi)
581 indio_dev->num_channels = ARRAY_SIZE(adis16240_channels); 255 indio_dev->num_channels = ARRAY_SIZE(adis16240_channels);
582 indio_dev->modes = INDIO_DIRECT_MODE; 256 indio_dev->modes = INDIO_DIRECT_MODE;
583 257
584 ret = adis16240_configure_ring(indio_dev); 258 ret = adis_init(st, indio_dev, spi, &adis16240_data);
259 if (ret)
260 goto error_free_dev;
261 ret = adis_setup_buffer_and_trigger(st, indio_dev, NULL);
585 if (ret) 262 if (ret)
586 goto error_free_dev; 263 goto error_free_dev;
587
588 ret = iio_buffer_register(indio_dev,
589 adis16240_channels,
590 ARRAY_SIZE(adis16240_channels));
591 if (ret) {
592 printk(KERN_ERR "failed to initialize the ring\n");
593 goto error_unreg_ring_funcs;
594 }
595
596 if (spi->irq) {
597 ret = adis16240_probe_trigger(indio_dev);
598 if (ret)
599 goto error_uninitialize_ring;
600 }
601 264
602 /* Get the device into a sane initial state */ 265 /* Get the device into a sane initial state */
603 ret = adis16240_initial_setup(indio_dev); 266 ret = adis_initial_startup(st);
604 if (ret) 267 if (ret)
605 goto error_remove_trigger; 268 goto error_cleanup_buffer_trigger;
606 ret = iio_device_register(indio_dev); 269 ret = iio_device_register(indio_dev);
607 if (ret) 270 if (ret)
608 goto error_remove_trigger; 271 goto error_cleanup_buffer_trigger;
609 return 0; 272 return 0;
610 273
611error_remove_trigger: 274error_cleanup_buffer_trigger:
612 adis16240_remove_trigger(indio_dev); 275 adis_cleanup_buffer_and_trigger(st, indio_dev);
613error_uninitialize_ring:
614 iio_buffer_unregister(indio_dev);
615error_unreg_ring_funcs:
616 adis16240_unconfigure_ring(indio_dev);
617error_free_dev: 276error_free_dev:
618 iio_device_free(indio_dev); 277 iio_device_free(indio_dev);
619error_ret: 278error_ret:
620 return ret; 279 return ret;
621} 280}
622 281
623static int __devexit adis16240_remove(struct spi_device *spi) 282static int adis16240_remove(struct spi_device *spi)
624{ 283{
625
626 struct iio_dev *indio_dev = spi_get_drvdata(spi); 284 struct iio_dev *indio_dev = spi_get_drvdata(spi);
285 struct adis *st = iio_priv(indio_dev);
627 286
628 iio_device_unregister(indio_dev); 287 iio_device_unregister(indio_dev);
629 adis16240_remove_trigger(indio_dev); 288 adis_cleanup_buffer_and_trigger(st, indio_dev);
630 iio_buffer_unregister(indio_dev);
631 adis16240_unconfigure_ring(indio_dev);
632 iio_device_free(indio_dev); 289 iio_device_free(indio_dev);
633 290
634 return 0; 291 return 0;
@@ -640,7 +297,7 @@ static struct spi_driver adis16240_driver = {
640 .owner = THIS_MODULE, 297 .owner = THIS_MODULE,
641 }, 298 },
642 .probe = adis16240_probe, 299 .probe = adis16240_probe,
643 .remove = __devexit_p(adis16240_remove), 300 .remove = adis16240_remove,
644}; 301};
645module_spi_driver(adis16240_driver); 302module_spi_driver(adis16240_driver);
646 303
diff --git a/drivers/staging/iio/accel/adis16240_ring.c b/drivers/staging/iio/accel/adis16240_ring.c
deleted file mode 100644
index caff8e25e0a2..000000000000
--- a/drivers/staging/iio/accel/adis16240_ring.c
+++ /dev/null
@@ -1,132 +0,0 @@
1#include <linux/export.h>
2#include <linux/interrupt.h>
3#include <linux/mutex.h>
4#include <linux/kernel.h>
5#include <linux/spi/spi.h>
6#include <linux/slab.h>
7
8#include <linux/iio/iio.h>
9#include "../ring_sw.h"
10#include <linux/iio/trigger_consumer.h>
11#include "adis16240.h"
12
13/**
14 * adis16240_read_ring_data() read data registers which will be placed into ring
15 * @indio_dev: the IIO device
16 * @rx: somewhere to pass back the value read
17 **/
18static int adis16240_read_ring_data(struct iio_dev *indio_dev, u8 *rx)
19{
20 struct spi_message msg;
21 struct adis16240_state *st = iio_priv(indio_dev);
22 struct spi_transfer xfers[ADIS16240_OUTPUTS + 1];
23 int ret;
24 int i;
25
26 mutex_lock(&st->buf_lock);
27
28 spi_message_init(&msg);
29
30 memset(xfers, 0, sizeof(xfers));
31 for (i = 0; i <= ADIS16240_OUTPUTS; i++) {
32 xfers[i].bits_per_word = 8;
33 xfers[i].cs_change = 1;
34 xfers[i].len = 2;
35 xfers[i].delay_usecs = 30;
36 xfers[i].tx_buf = st->tx + 2 * i;
37 st->tx[2 * i]
38 = ADIS16240_READ_REG(ADIS16240_SUPPLY_OUT + 2 * i);
39 st->tx[2 * i + 1] = 0;
40 if (i >= 1)
41 xfers[i].rx_buf = rx + 2 * (i - 1);
42 spi_message_add_tail(&xfers[i], &msg);
43 }
44
45 ret = spi_sync(st->us, &msg);
46 if (ret)
47 dev_err(&st->us->dev, "problem when burst reading");
48
49 mutex_unlock(&st->buf_lock);
50
51 return ret;
52}
53
54static irqreturn_t adis16240_trigger_handler(int irq, void *p)
55{
56 struct iio_poll_func *pf = p;
57 struct iio_dev *indio_dev = pf->indio_dev;
58 struct adis16240_state *st = iio_priv(indio_dev);
59
60 int i = 0;
61 s16 *data;
62
63 data = kmalloc(indio_dev->scan_bytes, GFP_KERNEL);
64 if (data == NULL) {
65 dev_err(&st->us->dev, "memory alloc failed in ring bh");
66 goto done;
67 }
68
69 if (!bitmap_empty(indio_dev->active_scan_mask, indio_dev->masklength) &&
70 adis16240_read_ring_data(indio_dev, st->rx) >= 0)
71 for (; i < bitmap_weight(indio_dev->active_scan_mask,
72 indio_dev->masklength); i++)
73 data[i] = be16_to_cpup((__be16 *)&(st->rx[i*2]));
74
75 /* Guaranteed to be aligned with 8 byte boundary */
76 if (indio_dev->scan_timestamp)
77 *((s64 *)(data + ((i + 3)/4)*4)) = pf->timestamp;
78
79 iio_push_to_buffer(indio_dev->buffer, (u8 *)data);
80
81 kfree(data);
82done:
83 iio_trigger_notify_done(indio_dev->trig);
84
85 return IRQ_HANDLED;
86}
87
88void adis16240_unconfigure_ring(struct iio_dev *indio_dev)
89{
90 iio_dealloc_pollfunc(indio_dev->pollfunc);
91 iio_sw_rb_free(indio_dev->buffer);
92}
93
94static const struct iio_buffer_setup_ops adis16240_ring_setup_ops = {
95 .preenable = &iio_sw_buffer_preenable,
96 .postenable = &iio_triggered_buffer_postenable,
97 .predisable = &iio_triggered_buffer_predisable,
98};
99
100int adis16240_configure_ring(struct iio_dev *indio_dev)
101{
102 int ret = 0;
103 struct iio_buffer *ring;
104
105 ring = iio_sw_rb_allocate(indio_dev);
106 if (!ring) {
107 ret = -ENOMEM;
108 return ret;
109 }
110 indio_dev->buffer = ring;
111 ring->scan_timestamp = true;
112 indio_dev->setup_ops = &adis16240_ring_setup_ops;
113
114 indio_dev->pollfunc = iio_alloc_pollfunc(&iio_pollfunc_store_time,
115 &adis16240_trigger_handler,
116 IRQF_ONESHOT,
117 indio_dev,
118 "%s_consumer%d",
119 indio_dev->name,
120 indio_dev->id);
121 if (indio_dev->pollfunc == NULL) {
122 ret = -ENOMEM;
123 goto error_iio_sw_rb_free;
124 }
125
126 indio_dev->modes |= INDIO_BUFFER_TRIGGERED;
127 return 0;
128
129error_iio_sw_rb_free:
130 iio_sw_rb_free(indio_dev->buffer);
131 return ret;
132}
diff --git a/drivers/staging/iio/accel/adis16240_trigger.c b/drivers/staging/iio/accel/adis16240_trigger.c
deleted file mode 100644
index fa90a22b143e..000000000000
--- a/drivers/staging/iio/accel/adis16240_trigger.c
+++ /dev/null
@@ -1,82 +0,0 @@
1#include <linux/interrupt.h>
2#include <linux/kernel.h>
3#include <linux/spi/spi.h>
4#include <linux/export.h>
5
6#include <linux/iio/iio.h>
7#include <linux/iio/trigger.h>
8#include "adis16240.h"
9
10/**
11 * adis16240_data_rdy_trig_poll() the event handler for the data rdy trig
12 **/
13static irqreturn_t adis16240_data_rdy_trig_poll(int irq, void *trig)
14{
15 iio_trigger_poll(trig, iio_get_time_ns());
16 return IRQ_HANDLED;
17}
18
19/**
20 * adis16240_data_rdy_trigger_set_state() set datardy interrupt state
21 **/
22static int adis16240_data_rdy_trigger_set_state(struct iio_trigger *trig,
23 bool state)
24{
25 struct iio_dev *indio_dev = trig->private_data;
26
27 dev_dbg(&indio_dev->dev, "%s (%d)\n", __func__, state);
28 return adis16240_set_irq(indio_dev, state);
29}
30
31static const struct iio_trigger_ops adis16240_trigger_ops = {
32 .owner = THIS_MODULE,
33 .set_trigger_state = &adis16240_data_rdy_trigger_set_state,
34};
35
36int adis16240_probe_trigger(struct iio_dev *indio_dev)
37{
38 int ret;
39 struct adis16240_state *st = iio_priv(indio_dev);
40
41 st->trig = iio_trigger_alloc("adis16240-dev%d", indio_dev->id);
42 if (st->trig == NULL) {
43 ret = -ENOMEM;
44 goto error_ret;
45 }
46
47 ret = request_irq(st->us->irq,
48 adis16240_data_rdy_trig_poll,
49 IRQF_TRIGGER_RISING,
50 "adis16240",
51 st->trig);
52 if (ret)
53 goto error_free_trig;
54
55 st->trig->dev.parent = &st->us->dev;
56 st->trig->ops = &adis16240_trigger_ops;
57 st->trig->private_data = indio_dev;
58 ret = iio_trigger_register(st->trig);
59
60 /* select default trigger */
61 indio_dev->trig = st->trig;
62 if (ret)
63 goto error_free_irq;
64
65 return 0;
66
67error_free_irq:
68 free_irq(st->us->irq, st->trig);
69error_free_trig:
70 iio_trigger_free(st->trig);
71error_ret:
72 return ret;
73}
74
75void adis16240_remove_trigger(struct iio_dev *indio_dev)
76{
77 struct adis16240_state *st = iio_priv(indio_dev);
78
79 iio_trigger_unregister(st->trig);
80 free_irq(st->us->irq, st->trig);
81 iio_trigger_free(st->trig);
82}
diff --git a/drivers/staging/iio/accel/kxsd9.c b/drivers/staging/iio/accel/kxsd9.c
index fdd5fbded660..318331f08d9c 100644
--- a/drivers/staging/iio/accel/kxsd9.c
+++ b/drivers/staging/iio/accel/kxsd9.c
@@ -171,7 +171,7 @@ static int kxsd9_read_raw(struct iio_dev *indio_dev,
171 *val2 = kxsd9_micro_scales[ret & KXSD9_FS_MASK]; 171 *val2 = kxsd9_micro_scales[ret & KXSD9_FS_MASK];
172 ret = IIO_VAL_INT_PLUS_MICRO; 172 ret = IIO_VAL_INT_PLUS_MICRO;
173 break; 173 break;
174 }; 174 }
175 175
176error_ret: 176error_ret:
177 return ret; 177 return ret;
@@ -200,7 +200,7 @@ static const struct attribute_group kxsd9_attribute_group = {
200 .attrs = kxsd9_attributes, 200 .attrs = kxsd9_attributes,
201}; 201};
202 202
203static int __devinit kxsd9_power_up(struct kxsd9_state *st) 203static int kxsd9_power_up(struct kxsd9_state *st)
204{ 204{
205 int ret; 205 int ret;
206 206
@@ -222,7 +222,7 @@ static const struct iio_info kxsd9_info = {
222 .driver_module = THIS_MODULE, 222 .driver_module = THIS_MODULE,
223}; 223};
224 224
225static int __devinit kxsd9_probe(struct spi_device *spi) 225static int kxsd9_probe(struct spi_device *spi)
226{ 226{
227 struct iio_dev *indio_dev; 227 struct iio_dev *indio_dev;
228 struct kxsd9_state *st; 228 struct kxsd9_state *st;
@@ -261,7 +261,7 @@ error_ret:
261 return ret; 261 return ret;
262} 262}
263 263
264static int __devexit kxsd9_remove(struct spi_device *spi) 264static int kxsd9_remove(struct spi_device *spi)
265{ 265{
266 iio_device_unregister(spi_get_drvdata(spi)); 266 iio_device_unregister(spi_get_drvdata(spi));
267 iio_device_free(spi_get_drvdata(spi)); 267 iio_device_free(spi_get_drvdata(spi));
@@ -281,7 +281,7 @@ static struct spi_driver kxsd9_driver = {
281 .owner = THIS_MODULE, 281 .owner = THIS_MODULE,
282 }, 282 },
283 .probe = kxsd9_probe, 283 .probe = kxsd9_probe,
284 .remove = __devexit_p(kxsd9_remove), 284 .remove = kxsd9_remove,
285 .id_table = kxsd9_id, 285 .id_table = kxsd9_id,
286}; 286};
287module_spi_driver(kxsd9_driver); 287module_spi_driver(kxsd9_driver);
diff --git a/drivers/staging/iio/accel/lis3l02dq.h b/drivers/staging/iio/accel/lis3l02dq.h
index f9bcd41f7188..2bac7221837c 100644
--- a/drivers/staging/iio/accel/lis3l02dq.h
+++ b/drivers/staging/iio/accel/lis3l02dq.h
@@ -158,6 +158,7 @@ struct lis3l02dq_state {
158 struct spi_device *us; 158 struct spi_device *us;
159 struct iio_trigger *trig; 159 struct iio_trigger *trig;
160 struct mutex buf_lock; 160 struct mutex buf_lock;
161 int gpio;
161 bool trigger_on; 162 bool trigger_on;
162 163
163 u8 tx[LIS3L02DQ_MAX_RX] ____cacheline_aligned; 164 u8 tx[LIS3L02DQ_MAX_RX] ____cacheline_aligned;
diff --git a/drivers/staging/iio/accel/lis3l02dq_core.c b/drivers/staging/iio/accel/lis3l02dq_core.c
index 21b0469f8bc2..37ed1b8ebb6f 100644
--- a/drivers/staging/iio/accel/lis3l02dq_core.c
+++ b/drivers/staging/iio/accel/lis3l02dq_core.c
@@ -15,6 +15,7 @@
15#include <linux/interrupt.h> 15#include <linux/interrupt.h>
16#include <linux/irq.h> 16#include <linux/irq.h>
17#include <linux/gpio.h> 17#include <linux/gpio.h>
18#include <linux/of_gpio.h>
18#include <linux/mutex.h> 19#include <linux/mutex.h>
19#include <linux/device.h> 20#include <linux/device.h>
20#include <linux/kernel.h> 21#include <linux/kernel.h>
@@ -674,7 +675,7 @@ static const struct iio_info lis3l02dq_info = {
674 .attrs = &lis3l02dq_attribute_group, 675 .attrs = &lis3l02dq_attribute_group,
675}; 676};
676 677
677static int __devinit lis3l02dq_probe(struct spi_device *spi) 678static int lis3l02dq_probe(struct spi_device *spi)
678{ 679{
679 int ret; 680 int ret;
680 struct lis3l02dq_state *st; 681 struct lis3l02dq_state *st;
@@ -690,6 +691,7 @@ static int __devinit lis3l02dq_probe(struct spi_device *spi)
690 spi_set_drvdata(spi, indio_dev); 691 spi_set_drvdata(spi, indio_dev);
691 692
692 st->us = spi; 693 st->us = spi;
694 st->gpio = of_get_gpio(spi->dev.of_node, 0);
693 mutex_init(&st->buf_lock); 695 mutex_init(&st->buf_lock);
694 indio_dev->name = spi->dev.driver->name; 696 indio_dev->name = spi->dev.driver->name;
695 indio_dev->dev.parent = &spi->dev; 697 indio_dev->dev.parent = &spi->dev;
@@ -711,7 +713,7 @@ static int __devinit lis3l02dq_probe(struct spi_device *spi)
711 goto error_unreg_buffer_funcs; 713 goto error_unreg_buffer_funcs;
712 } 714 }
713 715
714 if (spi->irq && gpio_is_valid(irq_to_gpio(spi->irq)) > 0) { 716 if (spi->irq) {
715 ret = request_threaded_irq(st->us->irq, 717 ret = request_threaded_irq(st->us->irq,
716 &lis3l02dq_th, 718 &lis3l02dq_th,
717 &lis3l02dq_event_handler, 719 &lis3l02dq_event_handler,
@@ -738,10 +740,10 @@ static int __devinit lis3l02dq_probe(struct spi_device *spi)
738 return 0; 740 return 0;
739 741
740error_remove_trigger: 742error_remove_trigger:
741 if (spi->irq && gpio_is_valid(irq_to_gpio(spi->irq))) 743 if (spi->irq)
742 lis3l02dq_remove_trigger(indio_dev); 744 lis3l02dq_remove_trigger(indio_dev);
743error_free_interrupt: 745error_free_interrupt:
744 if (spi->irq && gpio_is_valid(irq_to_gpio(spi->irq)) > 0) 746 if (spi->irq)
745 free_irq(st->us->irq, indio_dev); 747 free_irq(st->us->irq, indio_dev);
746error_uninitialize_buffer: 748error_uninitialize_buffer:
747 iio_buffer_unregister(indio_dev); 749 iio_buffer_unregister(indio_dev);
@@ -780,7 +782,7 @@ err_ret:
780} 782}
781 783
782/* fixme, confirm ordering in this function */ 784/* fixme, confirm ordering in this function */
783static int __devexit lis3l02dq_remove(struct spi_device *spi) 785static int lis3l02dq_remove(struct spi_device *spi)
784{ 786{
785 struct iio_dev *indio_dev = spi_get_drvdata(spi); 787 struct iio_dev *indio_dev = spi_get_drvdata(spi);
786 struct lis3l02dq_state *st = iio_priv(indio_dev); 788 struct lis3l02dq_state *st = iio_priv(indio_dev);
@@ -790,7 +792,7 @@ static int __devexit lis3l02dq_remove(struct spi_device *spi)
790 lis3l02dq_disable_all_events(indio_dev); 792 lis3l02dq_disable_all_events(indio_dev);
791 lis3l02dq_stop_device(indio_dev); 793 lis3l02dq_stop_device(indio_dev);
792 794
793 if (spi->irq && gpio_is_valid(irq_to_gpio(spi->irq)) > 0) 795 if (spi->irq)
794 free_irq(st->us->irq, indio_dev); 796 free_irq(st->us->irq, indio_dev);
795 797
796 lis3l02dq_remove_trigger(indio_dev); 798 lis3l02dq_remove_trigger(indio_dev);
@@ -808,7 +810,7 @@ static struct spi_driver lis3l02dq_driver = {
808 .owner = THIS_MODULE, 810 .owner = THIS_MODULE,
809 }, 811 },
810 .probe = lis3l02dq_probe, 812 .probe = lis3l02dq_probe,
811 .remove = __devexit_p(lis3l02dq_remove), 813 .remove = lis3l02dq_remove,
812}; 814};
813module_spi_driver(lis3l02dq_driver); 815module_spi_driver(lis3l02dq_driver);
814 816
diff --git a/drivers/staging/iio/accel/lis3l02dq_ring.c b/drivers/staging/iio/accel/lis3l02dq_ring.c
index fa4190d96247..bc38651c315e 100644
--- a/drivers/staging/iio/accel/lis3l02dq_ring.c
+++ b/drivers/staging/iio/accel/lis3l02dq_ring.c
@@ -154,7 +154,7 @@ static irqreturn_t lis3l02dq_trigger_handler(int irq, void *p)
154 if (indio_dev->scan_timestamp) 154 if (indio_dev->scan_timestamp)
155 *(s64 *)((u8 *)data + ALIGN(len, sizeof(s64))) 155 *(s64 *)((u8 *)data + ALIGN(len, sizeof(s64)))
156 = pf->timestamp; 156 = pf->timestamp;
157 iio_push_to_buffer(indio_dev->buffer, (u8 *)data); 157 iio_push_to_buffers(indio_dev, (u8 *)data);
158 158
159 kfree(data); 159 kfree(data);
160done: 160done:
@@ -237,7 +237,7 @@ static int lis3l02dq_data_rdy_trigger_set_state(struct iio_trigger *trig,
237 u8 t; 237 u8 t;
238 238
239 __lis3l02dq_write_data_ready_config(indio_dev, state); 239 __lis3l02dq_write_data_ready_config(indio_dev, state);
240 if (state == false) { 240 if (!state) {
241 /* 241 /*
242 * A possible quirk with the handler is currently worked around 242 * A possible quirk with the handler is currently worked around
243 * by ensuring outstanding read events are cleared. 243 * by ensuring outstanding read events are cleared.
@@ -263,7 +263,7 @@ static int lis3l02dq_trig_try_reen(struct iio_trigger *trig)
263 /* If gpio still high (or high again) 263 /* If gpio still high (or high again)
264 * In theory possible we will need to do this several times */ 264 * In theory possible we will need to do this several times */
265 for (i = 0; i < 5; i++) 265 for (i = 0; i < 5; i++)
266 if (gpio_get_value(irq_to_gpio(st->us->irq))) 266 if (gpio_get_value(st->gpio))
267 lis3l02dq_read_all(indio_dev, NULL); 267 lis3l02dq_read_all(indio_dev, NULL);
268 else 268 else
269 break; 269 break;
diff --git a/drivers/staging/iio/accel/sca3000_core.c b/drivers/staging/iio/accel/sca3000_core.c
index ffd1697a9db0..414d3cad55a7 100644
--- a/drivers/staging/iio/accel/sca3000_core.c
+++ b/drivers/staging/iio/accel/sca3000_core.c
@@ -1139,7 +1139,7 @@ static const struct iio_info sca3000_info_with_temp = {
1139 .driver_module = THIS_MODULE, 1139 .driver_module = THIS_MODULE,
1140}; 1140};
1141 1141
1142static int __devinit sca3000_probe(struct spi_device *spi) 1142static int sca3000_probe(struct spi_device *spi)
1143{ 1143{
1144 int ret; 1144 int ret;
1145 struct sca3000_state *st; 1145 struct sca3000_state *st;
@@ -1233,7 +1233,7 @@ error_ret:
1233 return ret; 1233 return ret;
1234} 1234}
1235 1235
1236static int __devexit sca3000_remove(struct spi_device *spi) 1236static int sca3000_remove(struct spi_device *spi)
1237{ 1237{
1238 struct iio_dev *indio_dev = spi_get_drvdata(spi); 1238 struct iio_dev *indio_dev = spi_get_drvdata(spi);
1239 struct sca3000_state *st = iio_priv(indio_dev); 1239 struct sca3000_state *st = iio_priv(indio_dev);
@@ -1265,7 +1265,7 @@ static struct spi_driver sca3000_driver = {
1265 .owner = THIS_MODULE, 1265 .owner = THIS_MODULE,
1266 }, 1266 },
1267 .probe = sca3000_probe, 1267 .probe = sca3000_probe,
1268 .remove = __devexit_p(sca3000_remove), 1268 .remove = sca3000_remove,
1269 .id_table = sca3000_id, 1269 .id_table = sca3000_id,
1270}; 1270};
1271module_spi_driver(sca3000_driver); 1271module_spi_driver(sca3000_driver);
diff --git a/drivers/staging/iio/adc/Kconfig b/drivers/staging/iio/adc/Kconfig
index a525143ecbea..fb8c239b0c88 100644
--- a/drivers/staging/iio/adc/Kconfig
+++ b/drivers/staging/iio/adc/Kconfig
@@ -10,17 +10,6 @@ config AD7291
10 Say yes here to build support for Analog Devices AD7291 10 Say yes here to build support for Analog Devices AD7291
11 8 Channel ADC with temperature sensor. 11 8 Channel ADC with temperature sensor.
12 12
13config AD7298
14 tristate "Analog Devices AD7298 ADC driver"
15 depends on SPI
16 select IIO_TRIGGERED_BUFFER if IIO_BUFFER
17 help
18 Say yes here to build support for Analog Devices AD7298
19 8 Channel ADC with temperature sensor.
20
21 To compile this driver as a module, choose M here: the
22 module will be called ad7298.
23
24config AD7606 13config AD7606
25 tristate "Analog Devices AD7606 ADC driver" 14 tristate "Analog Devices AD7606 ADC driver"
26 depends on GPIOLIB 15 depends on GPIOLIB
@@ -68,19 +57,6 @@ config AD799X_RING_BUFFER
68 Say yes here to include ring buffer support in the AD799X 57 Say yes here to include ring buffer support in the AD799X
69 ADC driver. 58 ADC driver.
70 59
71config AD7887
72 tristate "Analog Devices AD7887 ADC driver"
73 depends on SPI
74 select IIO_BUFFER
75 select IIO_TRIGGERED_BUFFER
76 help
77 Say yes here to build support for Analog Devices
78 AD7887 SPI analog to digital converter (ADC).
79 If unsure, say N (but it's safe to say "Y").
80
81 To compile this driver as a module, choose M here: the
82 module will be called ad7887.
83
84config AD7780 60config AD7780
85 tristate "Analog Devices AD7780 and similar ADCs driver" 61 tristate "Analog Devices AD7780 and similar ADCs driver"
86 depends on SPI 62 depends on SPI
@@ -94,18 +70,6 @@ config AD7780
94 To compile this driver as a module, choose M here: the 70 To compile this driver as a module, choose M here: the
95 module will be called ad7780. 71 module will be called ad7780.
96 72
97config AD7793
98 tristate "Analog Devices AD7793 and similar ADCs driver"
99 depends on SPI
100 select AD_SIGMA_DELTA
101 help
102 Say yes here to build support for Analog Devices AD7785, AD7792, AD7793,
103 AD7794 and AD7795 SPI analog to digital converters (ADC).
104 If unsure, say N (but it's safe to say "Y").
105
106 To compile this driver as a module, choose M here: the
107 module will be called AD7793.
108
109config AD7816 73config AD7816
110 tristate "Analog Devices AD7816/7/8 temperature sensor and ADC driver" 74 tristate "Analog Devices AD7816/7/8 temperature sensor and ADC driver"
111 depends on SPI 75 depends on SPI
@@ -126,18 +90,11 @@ config AD7192
126 To compile this driver as a module, choose M here: the 90 To compile this driver as a module, choose M here: the
127 module will be called ad7192. 91 module will be called ad7192.
128 92
129config ADT7310
130 tristate "Analog Devices ADT7310 temperature sensor driver"
131 depends on SPI
132 help
133 Say yes here to build support for Analog Devices ADT7310
134 temperature sensors.
135
136config ADT7410 93config ADT7410
137 tristate "Analog Devices ADT7410 temperature sensor driver" 94 tristate "Analog Devices ADT7310/ADT7410 temperature sensor driver"
138 depends on I2C 95 depends on I2C || SPI_MASTER
139 help 96 help
140 Say yes here to build support for Analog Devices ADT7410 97 Say yes here to build support for Analog Devices ADT7310/ADT7410
141 temperature sensors. 98 temperature sensors.
142 99
143config AD7280 100config AD7280
@@ -150,30 +107,6 @@ config AD7280
150 To compile this driver as a module, choose M here: the 107 To compile this driver as a module, choose M here: the
151 module will be called ad7280a 108 module will be called ad7280a
152 109
153config MAX1363
154 tristate "Maxim max1363 ADC driver"
155 depends on I2C
156 select IIO_TRIGGER if IIO_BUFFER
157 select MAX1363_RING_BUFFER
158 help
159 Say yes here to build support for many Maxim i2c analog to digital
160 converters (ADC). (max1361, max1362, max1363, max1364, max1036,
161 max1037, max1038, max1039, max1136, max1136, max1137, max1138,
162 max1139, max1236, max1237, max11238, max1239, max11600, max11601,
163 max11602, max11603, max11604, max11605, max11606, max11607,
164 max11608, max11609, max11610, max11611, max11612, max11613,
165 max11614, max11615, max11616, max11617, max11644, max11645,
166 max11646, max11647) Provides direct access via sysfs.
167
168config MAX1363_RING_BUFFER
169 bool "Maxim max1363: use ring buffer"
170 depends on MAX1363
171 select IIO_BUFFER
172 select IIO_SW_RING
173 help
174 Say yes here to include ring buffer support in the MAX1363
175 ADC driver.
176
177config LPC32XX_ADC 110config LPC32XX_ADC
178 tristate "NXP LPC32XX ADC" 111 tristate "NXP LPC32XX ADC"
179 depends on ARCH_LPC32XX 112 depends on ARCH_LPC32XX
diff --git a/drivers/staging/iio/adc/Makefile b/drivers/staging/iio/adc/Makefile
index 62ee02e80cf9..d285596272a0 100644
--- a/drivers/staging/iio/adc/Makefile
+++ b/drivers/staging/iio/adc/Makefile
@@ -2,11 +2,6 @@
2# Makefile for industrial I/O ADC drivers 2# Makefile for industrial I/O ADC drivers
3# 3#
4 4
5max1363-y := max1363_core.o
6max1363-y += max1363_ring.o
7
8obj-$(CONFIG_MAX1363) += max1363.o
9
10ad7606-y := ad7606_core.o 5ad7606-y := ad7606_core.o
11ad7606-$(CONFIG_IIO_BUFFER) += ad7606_ring.o 6ad7606-$(CONFIG_IIO_BUFFER) += ad7606_ring.o
12ad7606-$(CONFIG_AD7606_IFACE_PARALLEL) += ad7606_par.o 7ad7606-$(CONFIG_AD7606_IFACE_PARALLEL) += ad7606_par.o
@@ -17,20 +12,10 @@ ad799x-y := ad799x_core.o
17ad799x-$(CONFIG_AD799X_RING_BUFFER) += ad799x_ring.o 12ad799x-$(CONFIG_AD799X_RING_BUFFER) += ad799x_ring.o
18obj-$(CONFIG_AD799X) += ad799x.o 13obj-$(CONFIG_AD799X) += ad799x.o
19 14
20ad7887-y := ad7887_core.o
21ad7887-$(CONFIG_IIO_BUFFER) += ad7887_ring.o
22obj-$(CONFIG_AD7887) += ad7887.o
23
24ad7298-y := ad7298_core.o
25ad7298-$(CONFIG_IIO_BUFFER) += ad7298_ring.o
26obj-$(CONFIG_AD7298) += ad7298.o
27
28obj-$(CONFIG_AD7291) += ad7291.o 15obj-$(CONFIG_AD7291) += ad7291.o
29obj-$(CONFIG_AD7780) += ad7780.o 16obj-$(CONFIG_AD7780) += ad7780.o
30obj-$(CONFIG_AD7793) += ad7793.o
31obj-$(CONFIG_AD7816) += ad7816.o 17obj-$(CONFIG_AD7816) += ad7816.o
32obj-$(CONFIG_AD7192) += ad7192.o 18obj-$(CONFIG_AD7192) += ad7192.o
33obj-$(CONFIG_ADT7310) += adt7310.o
34obj-$(CONFIG_ADT7410) += adt7410.o 19obj-$(CONFIG_ADT7410) += adt7410.o
35obj-$(CONFIG_AD7280) += ad7280a.o 20obj-$(CONFIG_AD7280) += ad7280a.o
36obj-$(CONFIG_LPC32XX_ADC) += lpc32xx_adc.o 21obj-$(CONFIG_LPC32XX_ADC) += lpc32xx_adc.o
diff --git a/drivers/staging/iio/adc/ad7192.c b/drivers/staging/iio/adc/ad7192.c
index aeaa61d49f51..504701940585 100644
--- a/drivers/staging/iio/adc/ad7192.c
+++ b/drivers/staging/iio/adc/ad7192.c
@@ -606,7 +606,7 @@ static const struct iio_chan_spec ad7192_channels[] = {
606 IIO_CHAN_SOFT_TIMESTAMP(8), 606 IIO_CHAN_SOFT_TIMESTAMP(8),
607}; 607};
608 608
609static int __devinit ad7192_probe(struct spi_device *spi) 609static int ad7192_probe(struct spi_device *spi)
610{ 610{
611 const struct ad7192_platform_data *pdata = spi->dev.platform_data; 611 const struct ad7192_platform_data *pdata = spi->dev.platform_data;
612 struct ad7192_state *st; 612 struct ad7192_state *st;
@@ -686,7 +686,7 @@ error_put_reg:
686 return ret; 686 return ret;
687} 687}
688 688
689static int __devexit ad7192_remove(struct spi_device *spi) 689static int ad7192_remove(struct spi_device *spi)
690{ 690{
691 struct iio_dev *indio_dev = spi_get_drvdata(spi); 691 struct iio_dev *indio_dev = spi_get_drvdata(spi);
692 struct ad7192_state *st = iio_priv(indio_dev); 692 struct ad7192_state *st = iio_priv(indio_dev);
@@ -716,7 +716,7 @@ static struct spi_driver ad7192_driver = {
716 .owner = THIS_MODULE, 716 .owner = THIS_MODULE,
717 }, 717 },
718 .probe = ad7192_probe, 718 .probe = ad7192_probe,
719 .remove = __devexit_p(ad7192_remove), 719 .remove = ad7192_remove,
720 .id_table = ad7192_id, 720 .id_table = ad7192_id,
721}; 721};
722module_spi_driver(ad7192_driver); 722module_spi_driver(ad7192_driver);
diff --git a/drivers/staging/iio/adc/ad7280a.c b/drivers/staging/iio/adc/ad7280a.c
index cfc39a703126..fa81a491e790 100644
--- a/drivers/staging/iio/adc/ad7280a.c
+++ b/drivers/staging/iio/adc/ad7280a.c
@@ -117,7 +117,7 @@
117 */ 117 */
118#define POLYNOM 0x2F 118#define POLYNOM 0x2F
119#define POLYNOM_ORDER 8 119#define POLYNOM_ORDER 8
120#define HIGHBIT 1 << (POLYNOM_ORDER - 1); 120#define HIGHBIT (1 << (POLYNOM_ORDER - 1))
121 121
122struct ad7280_state { 122struct ad7280_state {
123 struct spi_device *spi; 123 struct spi_device *spi;
@@ -832,7 +832,7 @@ static const struct ad7280_platform_data ad7793_default_pdata = {
832 .thermistor_term_en = true, 832 .thermistor_term_en = true,
833}; 833};
834 834
835static int __devinit ad7280_probe(struct spi_device *spi) 835static int ad7280_probe(struct spi_device *spi)
836{ 836{
837 const struct ad7280_platform_data *pdata = spi->dev.platform_data; 837 const struct ad7280_platform_data *pdata = spi->dev.platform_data;
838 struct ad7280_state *st; 838 struct ad7280_state *st;
@@ -950,7 +950,7 @@ error_free_device:
950 return ret; 950 return ret;
951} 951}
952 952
953static int __devexit ad7280_remove(struct spi_device *spi) 953static int ad7280_remove(struct spi_device *spi)
954{ 954{
955 struct iio_dev *indio_dev = spi_get_drvdata(spi); 955 struct iio_dev *indio_dev = spi_get_drvdata(spi);
956 struct ad7280_state *st = iio_priv(indio_dev); 956 struct ad7280_state *st = iio_priv(indio_dev);
@@ -981,7 +981,7 @@ static struct spi_driver ad7280_driver = {
981 .owner = THIS_MODULE, 981 .owner = THIS_MODULE,
982 }, 982 },
983 .probe = ad7280_probe, 983 .probe = ad7280_probe,
984 .remove = __devexit_p(ad7280_remove), 984 .remove = ad7280_remove,
985 .id_table = ad7280_id, 985 .id_table = ad7280_id,
986}; 986};
987module_spi_driver(ad7280_driver); 987module_spi_driver(ad7280_driver);
diff --git a/drivers/staging/iio/adc/ad7291.c b/drivers/staging/iio/adc/ad7291.c
index 029b39c0ba60..6e58e36d242c 100644
--- a/drivers/staging/iio/adc/ad7291.c
+++ b/drivers/staging/iio/adc/ad7291.c
@@ -580,7 +580,7 @@ static const struct iio_info ad7291_info = {
580 .event_attrs = &ad7291_event_attribute_group, 580 .event_attrs = &ad7291_event_attribute_group,
581}; 581};
582 582
583static int __devinit ad7291_probe(struct i2c_client *client, 583static int ad7291_probe(struct i2c_client *client,
584 const struct i2c_device_id *id) 584 const struct i2c_device_id *id)
585{ 585{
586 struct ad7291_chip_info *chip; 586 struct ad7291_chip_info *chip;
@@ -674,7 +674,7 @@ error_ret:
674 return ret; 674 return ret;
675} 675}
676 676
677static int __devexit ad7291_remove(struct i2c_client *client) 677static int ad7291_remove(struct i2c_client *client)
678{ 678{
679 struct iio_dev *indio_dev = i2c_get_clientdata(client); 679 struct iio_dev *indio_dev = i2c_get_clientdata(client);
680 struct ad7291_chip_info *chip = iio_priv(indio_dev); 680 struct ad7291_chip_info *chip = iio_priv(indio_dev);
@@ -706,7 +706,7 @@ static struct i2c_driver ad7291_driver = {
706 .name = KBUILD_MODNAME, 706 .name = KBUILD_MODNAME,
707 }, 707 },
708 .probe = ad7291_probe, 708 .probe = ad7291_probe,
709 .remove = __devexit_p(ad7291_remove), 709 .remove = ad7291_remove,
710 .id_table = ad7291_id, 710 .id_table = ad7291_id,
711}; 711};
712module_i2c_driver(ad7291_driver); 712module_i2c_driver(ad7291_driver);
diff --git a/drivers/staging/iio/adc/ad7298.h b/drivers/staging/iio/adc/ad7298.h
deleted file mode 100644
index 18f278723002..000000000000
--- a/drivers/staging/iio/adc/ad7298.h
+++ /dev/null
@@ -1,75 +0,0 @@
1/*
2 * AD7298 SPI ADC driver
3 *
4 * Copyright 2011 Analog Devices Inc.
5 *
6 * Licensed under the GPL-2.
7 */
8
9#ifndef IIO_ADC_AD7298_H_
10#define IIO_ADC_AD7298_H_
11
12#define AD7298_WRITE (1 << 15) /* write to the control register */
13#define AD7298_REPEAT (1 << 14) /* repeated conversion enable */
14#define AD7298_CH(x) (1 << (13 - (x))) /* channel select */
15#define AD7298_TSENSE (1 << 5) /* temperature conversion enable */
16#define AD7298_EXTREF (1 << 2) /* external reference enable */
17#define AD7298_TAVG (1 << 1) /* temperature sensor averaging enable */
18#define AD7298_PDD (1 << 0) /* partial power down enable */
19
20#define AD7298_MAX_CHAN 8
21#define AD7298_BITS 12
22#define AD7298_STORAGE_BITS 16
23#define AD7298_INTREF_mV 2500
24
25#define AD7298_CH_TEMP 9
26
27#define RES_MASK(bits) ((1 << (bits)) - 1)
28
29/*
30 * TODO: struct ad7298_platform_data needs to go into include/linux/iio
31 */
32
33struct ad7298_platform_data {
34 /* External Vref voltage applied */
35 u16 vref_mv;
36};
37
38struct ad7298_state {
39 struct spi_device *spi;
40 struct regulator *reg;
41 u16 int_vref_mv;
42 unsigned ext_ref;
43 struct spi_transfer ring_xfer[10];
44 struct spi_transfer scan_single_xfer[3];
45 struct spi_message ring_msg;
46 struct spi_message scan_single_msg;
47 /*
48 * DMA (thus cache coherency maintenance) requires the
49 * transfer buffers to live in their own cache lines.
50 */
51 unsigned short rx_buf[8] ____cacheline_aligned;
52 unsigned short tx_buf[2];
53};
54
55#ifdef CONFIG_IIO_BUFFER
56int ad7298_register_ring_funcs_and_init(struct iio_dev *indio_dev);
57void ad7298_ring_cleanup(struct iio_dev *indio_dev);
58int ad7298_update_scan_mode(struct iio_dev *indio_dev,
59 const unsigned long *active_scan_mask);
60#else /* CONFIG_IIO_BUFFER */
61
62static inline int
63ad7298_register_ring_funcs_and_init(struct iio_dev *indio_dev)
64{
65 return 0;
66}
67
68static inline void ad7298_ring_cleanup(struct iio_dev *indio_dev)
69{
70}
71
72#define ad7298_update_scan_mode NULL
73
74#endif /* CONFIG_IIO_BUFFER */
75#endif /* IIO_ADC_AD7298_H_ */
diff --git a/drivers/staging/iio/adc/ad7298_ring.c b/drivers/staging/iio/adc/ad7298_ring.c
deleted file mode 100644
index c2906a85fedb..000000000000
--- a/drivers/staging/iio/adc/ad7298_ring.c
+++ /dev/null
@@ -1,113 +0,0 @@
1/*
2 * AD7298 SPI ADC driver
3 *
4 * Copyright 2011-2012 Analog Devices Inc.
5 *
6 * Licensed under the GPL-2.
7 */
8
9#include <linux/interrupt.h>
10#include <linux/kernel.h>
11#include <linux/slab.h>
12#include <linux/spi/spi.h>
13
14#include <linux/iio/iio.h>
15#include <linux/iio/buffer.h>
16#include <linux/iio/trigger_consumer.h>
17#include <linux/iio/triggered_buffer.h>
18
19#include "ad7298.h"
20
21/**
22 * ad7298_update_scan_mode() setup the spi transfer buffer for the new scan mask
23 **/
24int ad7298_update_scan_mode(struct iio_dev *indio_dev,
25 const unsigned long *active_scan_mask)
26{
27 struct ad7298_state *st = iio_priv(indio_dev);
28 int i, m;
29 unsigned short command;
30 int scan_count;
31
32 /* Now compute overall size */
33 scan_count = bitmap_weight(active_scan_mask, indio_dev->masklength);
34
35 command = AD7298_WRITE | st->ext_ref;
36
37 for (i = 0, m = AD7298_CH(0); i < AD7298_MAX_CHAN; i++, m >>= 1)
38 if (test_bit(i, active_scan_mask))
39 command |= m;
40
41 st->tx_buf[0] = cpu_to_be16(command);
42
43 /* build spi ring message */
44 st->ring_xfer[0].tx_buf = &st->tx_buf[0];
45 st->ring_xfer[0].len = 2;
46 st->ring_xfer[0].cs_change = 1;
47 st->ring_xfer[1].tx_buf = &st->tx_buf[1];
48 st->ring_xfer[1].len = 2;
49 st->ring_xfer[1].cs_change = 1;
50
51 spi_message_init(&st->ring_msg);
52 spi_message_add_tail(&st->ring_xfer[0], &st->ring_msg);
53 spi_message_add_tail(&st->ring_xfer[1], &st->ring_msg);
54
55 for (i = 0; i < scan_count; i++) {
56 st->ring_xfer[i + 2].rx_buf = &st->rx_buf[i];
57 st->ring_xfer[i + 2].len = 2;
58 st->ring_xfer[i + 2].cs_change = 1;
59 spi_message_add_tail(&st->ring_xfer[i + 2], &st->ring_msg);
60 }
61 /* make sure last transfer cs_change is not set */
62 st->ring_xfer[i + 1].cs_change = 0;
63
64 return 0;
65}
66
67/**
68 * ad7298_trigger_handler() bh of trigger launched polling to ring buffer
69 *
70 * Currently there is no option in this driver to disable the saving of
71 * timestamps within the ring.
72 **/
73static irqreturn_t ad7298_trigger_handler(int irq, void *p)
74{
75 struct iio_poll_func *pf = p;
76 struct iio_dev *indio_dev = pf->indio_dev;
77 struct ad7298_state *st = iio_priv(indio_dev);
78 s64 time_ns = 0;
79 __u16 buf[16];
80 int b_sent, i;
81
82 b_sent = spi_sync(st->spi, &st->ring_msg);
83 if (b_sent)
84 goto done;
85
86 if (indio_dev->scan_timestamp) {
87 time_ns = iio_get_time_ns();
88 memcpy((u8 *)buf + indio_dev->scan_bytes - sizeof(s64),
89 &time_ns, sizeof(time_ns));
90 }
91
92 for (i = 0; i < bitmap_weight(indio_dev->active_scan_mask,
93 indio_dev->masklength); i++)
94 buf[i] = be16_to_cpu(st->rx_buf[i]);
95
96 iio_push_to_buffer(indio_dev->buffer, (u8 *)buf);
97
98done:
99 iio_trigger_notify_done(indio_dev->trig);
100
101 return IRQ_HANDLED;
102}
103
104int ad7298_register_ring_funcs_and_init(struct iio_dev *indio_dev)
105{
106 return iio_triggered_buffer_setup(indio_dev, NULL,
107 &ad7298_trigger_handler, NULL);
108}
109
110void ad7298_ring_cleanup(struct iio_dev *indio_dev)
111{
112 iio_triggered_buffer_cleanup(indio_dev);
113}
diff --git a/drivers/staging/iio/adc/ad7606_par.c b/drivers/staging/iio/adc/ad7606_par.c
index a53faafec070..58cfddea9637 100644
--- a/drivers/staging/iio/adc/ad7606_par.c
+++ b/drivers/staging/iio/adc/ad7606_par.c
@@ -47,7 +47,7 @@ static const struct ad7606_bus_ops ad7606_par8_bops = {
47 .read_block = ad7606_par8_read_block, 47 .read_block = ad7606_par8_read_block,
48}; 48};
49 49
50static int __devinit ad7606_par_probe(struct platform_device *pdev) 50static int ad7606_par_probe(struct platform_device *pdev)
51{ 51{
52 struct resource *res; 52 struct resource *res;
53 struct iio_dev *indio_dev; 53 struct iio_dev *indio_dev;
@@ -100,7 +100,7 @@ out1:
100 return ret; 100 return ret;
101} 101}
102 102
103static int __devexit ad7606_par_remove(struct platform_device *pdev) 103static int ad7606_par_remove(struct platform_device *pdev)
104{ 104{
105 struct iio_dev *indio_dev = platform_get_drvdata(pdev); 105 struct iio_dev *indio_dev = platform_get_drvdata(pdev);
106 struct resource *res; 106 struct resource *res;
@@ -164,7 +164,7 @@ MODULE_DEVICE_TABLE(platform, ad7606_driver_ids);
164 164
165static struct platform_driver ad7606_driver = { 165static struct platform_driver ad7606_driver = {
166 .probe = ad7606_par_probe, 166 .probe = ad7606_par_probe,
167 .remove = __devexit_p(ad7606_par_remove), 167 .remove = ad7606_par_remove,
168 .id_table = ad7606_driver_ids, 168 .id_table = ad7606_driver_ids,
169 .driver = { 169 .driver = {
170 .name = "ad7606", 170 .name = "ad7606",
diff --git a/drivers/staging/iio/adc/ad7606_ring.c b/drivers/staging/iio/adc/ad7606_ring.c
index ba04d0ffd4f4..2b25cb07fe41 100644
--- a/drivers/staging/iio/adc/ad7606_ring.c
+++ b/drivers/staging/iio/adc/ad7606_ring.c
@@ -83,7 +83,7 @@ static void ad7606_poll_bh_to_ring(struct work_struct *work_s)
83 if (indio_dev->scan_timestamp) 83 if (indio_dev->scan_timestamp)
84 *((s64 *)(buf + indio_dev->scan_bytes - sizeof(s64))) = time_ns; 84 *((s64 *)(buf + indio_dev->scan_bytes - sizeof(s64))) = time_ns;
85 85
86 iio_push_to_buffer(indio_dev->buffer, buf); 86 iio_push_to_buffers(indio_dev, buf);
87done: 87done:
88 gpio_set_value(st->pdata->gpio_convst, 0); 88 gpio_set_value(st->pdata->gpio_convst, 0);
89 iio_trigger_notify_done(indio_dev->trig); 89 iio_trigger_notify_done(indio_dev->trig);
diff --git a/drivers/staging/iio/adc/ad7606_spi.c b/drivers/staging/iio/adc/ad7606_spi.c
index 099d347da52d..6a8ecd73a1a7 100644
--- a/drivers/staging/iio/adc/ad7606_spi.c
+++ b/drivers/staging/iio/adc/ad7606_spi.c
@@ -39,7 +39,7 @@ static const struct ad7606_bus_ops ad7606_spi_bops = {
39 .read_block = ad7606_spi_read_block, 39 .read_block = ad7606_spi_read_block,
40}; 40};
41 41
42static int __devinit ad7606_spi_probe(struct spi_device *spi) 42static int ad7606_spi_probe(struct spi_device *spi)
43{ 43{
44 struct iio_dev *indio_dev; 44 struct iio_dev *indio_dev;
45 45
@@ -55,7 +55,7 @@ static int __devinit ad7606_spi_probe(struct spi_device *spi)
55 return 0; 55 return 0;
56} 56}
57 57
58static int __devexit ad7606_spi_remove(struct spi_device *spi) 58static int ad7606_spi_remove(struct spi_device *spi)
59{ 59{
60 struct iio_dev *indio_dev = dev_get_drvdata(&spi->dev); 60 struct iio_dev *indio_dev = dev_get_drvdata(&spi->dev);
61 61
@@ -106,7 +106,7 @@ static struct spi_driver ad7606_driver = {
106 .pm = AD7606_SPI_PM_OPS, 106 .pm = AD7606_SPI_PM_OPS,
107 }, 107 },
108 .probe = ad7606_spi_probe, 108 .probe = ad7606_spi_probe,
109 .remove = __devexit_p(ad7606_spi_remove), 109 .remove = ad7606_spi_remove,
110 .id_table = ad7606_id, 110 .id_table = ad7606_id,
111}; 111};
112module_spi_driver(ad7606_driver); 112module_spi_driver(ad7606_driver);
diff --git a/drivers/staging/iio/adc/ad7780.c b/drivers/staging/iio/adc/ad7780.c
index 0a1328b8657f..e1f88603d7e0 100644
--- a/drivers/staging/iio/adc/ad7780.c
+++ b/drivers/staging/iio/adc/ad7780.c
@@ -164,7 +164,7 @@ static const struct iio_info ad7780_info = {
164 .driver_module = THIS_MODULE, 164 .driver_module = THIS_MODULE,
165}; 165};
166 166
167static int __devinit ad7780_probe(struct spi_device *spi) 167static int ad7780_probe(struct spi_device *spi)
168{ 168{
169 struct ad7780_platform_data *pdata = spi->dev.platform_data; 169 struct ad7780_platform_data *pdata = spi->dev.platform_data;
170 struct ad7780_state *st; 170 struct ad7780_state *st;
@@ -248,7 +248,7 @@ error_put_reg:
248 return ret; 248 return ret;
249} 249}
250 250
251static int __devexit ad7780_remove(struct spi_device *spi) 251static int ad7780_remove(struct spi_device *spi)
252{ 252{
253 struct iio_dev *indio_dev = spi_get_drvdata(spi); 253 struct iio_dev *indio_dev = spi_get_drvdata(spi);
254 struct ad7780_state *st = iio_priv(indio_dev); 254 struct ad7780_state *st = iio_priv(indio_dev);
@@ -283,7 +283,7 @@ static struct spi_driver ad7780_driver = {
283 .owner = THIS_MODULE, 283 .owner = THIS_MODULE,
284 }, 284 },
285 .probe = ad7780_probe, 285 .probe = ad7780_probe,
286 .remove = __devexit_p(ad7780_remove), 286 .remove = ad7780_remove,
287 .id_table = ad7780_id, 287 .id_table = ad7780_id,
288}; 288};
289module_spi_driver(ad7780_driver); 289module_spi_driver(ad7780_driver);
diff --git a/drivers/staging/iio/adc/ad7793.h b/drivers/staging/iio/adc/ad7793.h
deleted file mode 100644
index 8fdd450a2cd9..000000000000
--- a/drivers/staging/iio/adc/ad7793.h
+++ /dev/null
@@ -1,115 +0,0 @@
1/*
2 * AD7792/AD7793 SPI ADC driver
3 *
4 * Copyright 2011 Analog Devices Inc.
5 *
6 * Licensed under the GPL-2.
7 */
8#ifndef IIO_ADC_AD7793_H_
9#define IIO_ADC_AD7793_H_
10
11/*
12 * TODO: struct ad7793_platform_data needs to go into include/linux/iio
13 */
14
15/* Registers */
16#define AD7793_REG_COMM 0 /* Communications Register (WO, 8-bit) */
17#define AD7793_REG_STAT 0 /* Status Register (RO, 8-bit) */
18#define AD7793_REG_MODE 1 /* Mode Register (RW, 16-bit */
19#define AD7793_REG_CONF 2 /* Configuration Register (RW, 16-bit) */
20#define AD7793_REG_DATA 3 /* Data Register (RO, 16-/24-bit) */
21#define AD7793_REG_ID 4 /* ID Register (RO, 8-bit) */
22#define AD7793_REG_IO 5 /* IO Register (RO, 8-bit) */
23#define AD7793_REG_OFFSET 6 /* Offset Register (RW, 16-bit
24 * (AD7792)/24-bit (AD7793)) */
25#define AD7793_REG_FULLSALE 7 /* Full-Scale Register
26 * (RW, 16-bit (AD7792)/24-bit (AD7793)) */
27
28/* Communications Register Bit Designations (AD7793_REG_COMM) */
29#define AD7793_COMM_WEN (1 << 7) /* Write Enable */
30#define AD7793_COMM_WRITE (0 << 6) /* Write Operation */
31#define AD7793_COMM_READ (1 << 6) /* Read Operation */
32#define AD7793_COMM_ADDR(x) (((x) & 0x7) << 3) /* Register Address */
33#define AD7793_COMM_CREAD (1 << 2) /* Continuous Read of Data Register */
34
35/* Status Register Bit Designations (AD7793_REG_STAT) */
36#define AD7793_STAT_RDY (1 << 7) /* Ready */
37#define AD7793_STAT_ERR (1 << 6) /* Error (Overrange, Underrange) */
38#define AD7793_STAT_CH3 (1 << 2) /* Channel 3 */
39#define AD7793_STAT_CH2 (1 << 1) /* Channel 2 */
40#define AD7793_STAT_CH1 (1 << 0) /* Channel 1 */
41
42/* Mode Register Bit Designations (AD7793_REG_MODE) */
43#define AD7793_MODE_SEL(x) (((x) & 0x7) << 13) /* Operation Mode Select */
44#define AD7793_MODE_SEL_MASK (0x7 << 13) /* Operation Mode Select mask */
45#define AD7793_MODE_CLKSRC(x) (((x) & 0x3) << 6) /* ADC Clock Source Select */
46#define AD7793_MODE_RATE(x) ((x) & 0xF) /* Filter Update Rate Select */
47
48#define AD7793_MODE_CONT 0 /* Continuous Conversion Mode */
49#define AD7793_MODE_SINGLE 1 /* Single Conversion Mode */
50#define AD7793_MODE_IDLE 2 /* Idle Mode */
51#define AD7793_MODE_PWRDN 3 /* Power-Down Mode */
52#define AD7793_MODE_CAL_INT_ZERO 4 /* Internal Zero-Scale Calibration */
53#define AD7793_MODE_CAL_INT_FULL 5 /* Internal Full-Scale Calibration */
54#define AD7793_MODE_CAL_SYS_ZERO 6 /* System Zero-Scale Calibration */
55#define AD7793_MODE_CAL_SYS_FULL 7 /* System Full-Scale Calibration */
56
57#define AD7793_CLK_INT 0 /* Internal 64 kHz Clock not
58 * available at the CLK pin */
59#define AD7793_CLK_INT_CO 1 /* Internal 64 kHz Clock available
60 * at the CLK pin */
61#define AD7793_CLK_EXT 2 /* External 64 kHz Clock */
62#define AD7793_CLK_EXT_DIV2 3 /* External Clock divided by 2 */
63
64/* Configuration Register Bit Designations (AD7793_REG_CONF) */
65#define AD7793_CONF_VBIAS(x) (((x) & 0x3) << 14) /* Bias Voltage
66 * Generator Enable */
67#define AD7793_CONF_BO_EN (1 << 13) /* Burnout Current Enable */
68#define AD7793_CONF_UNIPOLAR (1 << 12) /* Unipolar/Bipolar Enable */
69#define AD7793_CONF_BOOST (1 << 11) /* Boost Enable */
70#define AD7793_CONF_GAIN(x) (((x) & 0x7) << 8) /* Gain Select */
71#define AD7793_CONF_REFSEL (1 << 7) /* INT/EXT Reference Select */
72#define AD7793_CONF_BUF (1 << 4) /* Buffered Mode Enable */
73#define AD7793_CONF_CHAN(x) ((x) & 0xf) /* Channel select */
74#define AD7793_CONF_CHAN_MASK 0xf /* Channel select mask */
75
76#define AD7793_CH_AIN1P_AIN1M 0 /* AIN1(+) - AIN1(-) */
77#define AD7793_CH_AIN2P_AIN2M 1 /* AIN2(+) - AIN2(-) */
78#define AD7793_CH_AIN3P_AIN3M 2 /* AIN3(+) - AIN3(-) */
79#define AD7793_CH_AIN1M_AIN1M 3 /* AIN1(-) - AIN1(-) */
80#define AD7793_CH_TEMP 6 /* Temp Sensor */
81#define AD7793_CH_AVDD_MONITOR 7 /* AVDD Monitor */
82
83#define AD7795_CH_AIN4P_AIN4M 4 /* AIN4(+) - AIN4(-) */
84#define AD7795_CH_AIN5P_AIN5M 5 /* AIN5(+) - AIN5(-) */
85#define AD7795_CH_AIN6P_AIN6M 6 /* AIN6(+) - AIN6(-) */
86#define AD7795_CH_AIN1M_AIN1M 8 /* AIN1(-) - AIN1(-) */
87
88/* ID Register Bit Designations (AD7793_REG_ID) */
89#define AD7792_ID 0xA
90#define AD7793_ID 0xB
91#define AD7795_ID 0xF
92#define AD7793_ID_MASK 0xF
93
94/* IO (Excitation Current Sources) Register Bit Designations (AD7793_REG_IO) */
95#define AD7793_IO_IEXC1_IOUT1_IEXC2_IOUT2 0 /* IEXC1 connect to IOUT1,
96 * IEXC2 connect to IOUT2 */
97#define AD7793_IO_IEXC1_IOUT2_IEXC2_IOUT1 1 /* IEXC1 connect to IOUT2,
98 * IEXC2 connect to IOUT1 */
99#define AD7793_IO_IEXC1_IEXC2_IOUT1 2 /* Both current sources
100 * IEXC1,2 connect to IOUT1 */
101#define AD7793_IO_IEXC1_IEXC2_IOUT2 3 /* Both current sources
102 * IEXC1,2 connect to IOUT2 */
103
104#define AD7793_IO_IXCEN_10uA (1 << 0) /* Excitation Current 10uA */
105#define AD7793_IO_IXCEN_210uA (2 << 0) /* Excitation Current 210uA */
106#define AD7793_IO_IXCEN_1mA (3 << 0) /* Excitation Current 1mA */
107
108struct ad7793_platform_data {
109 u16 vref_mv;
110 u16 mode;
111 u16 conf;
112 u8 io;
113};
114
115#endif /* IIO_ADC_AD7793_H_ */
diff --git a/drivers/staging/iio/adc/ad7816.c b/drivers/staging/iio/adc/ad7816.c
index c5fb9476a2d1..928477146c2f 100644
--- a/drivers/staging/iio/adc/ad7816.c
+++ b/drivers/staging/iio/adc/ad7816.c
@@ -341,7 +341,7 @@ static const struct iio_info ad7816_info = {
341 * device probe and remove 341 * device probe and remove
342 */ 342 */
343 343
344static int __devinit ad7816_probe(struct spi_device *spi_dev) 344static int ad7816_probe(struct spi_device *spi_dev)
345{ 345{
346 struct ad7816_chip_info *chip; 346 struct ad7816_chip_info *chip;
347 struct iio_dev *indio_dev; 347 struct iio_dev *indio_dev;
@@ -431,7 +431,7 @@ error_ret:
431 return ret; 431 return ret;
432} 432}
433 433
434static int __devexit ad7816_remove(struct spi_device *spi_dev) 434static int ad7816_remove(struct spi_device *spi_dev)
435{ 435{
436 struct iio_dev *indio_dev = dev_get_drvdata(&spi_dev->dev); 436 struct iio_dev *indio_dev = dev_get_drvdata(&spi_dev->dev);
437 struct ad7816_chip_info *chip = iio_priv(indio_dev); 437 struct ad7816_chip_info *chip = iio_priv(indio_dev);
@@ -463,7 +463,7 @@ static struct spi_driver ad7816_driver = {
463 .owner = THIS_MODULE, 463 .owner = THIS_MODULE,
464 }, 464 },
465 .probe = ad7816_probe, 465 .probe = ad7816_probe,
466 .remove = __devexit_p(ad7816_remove), 466 .remove = ad7816_remove,
467 .id_table = ad7816_id, 467 .id_table = ad7816_id,
468}; 468};
469module_spi_driver(ad7816_driver); 469module_spi_driver(ad7816_driver);
diff --git a/drivers/staging/iio/adc/ad7887.h b/drivers/staging/iio/adc/ad7887.h
deleted file mode 100644
index 2e09e54fc9c5..000000000000
--- a/drivers/staging/iio/adc/ad7887.h
+++ /dev/null
@@ -1,99 +0,0 @@
1/*
2 * AD7887 SPI ADC driver
3 *
4 * Copyright 2010 Analog Devices Inc.
5 *
6 * Licensed under the GPL-2 or later.
7 */
8#ifndef IIO_ADC_AD7887_H_
9#define IIO_ADC_AD7887_H_
10
11#define AD7887_REF_DIS (1 << 5) /* on-chip reference disable */
12#define AD7887_DUAL (1 << 4) /* dual-channel mode */
13#define AD7887_CH_AIN1 (1 << 3) /* convert on channel 1, DUAL=1 */
14#define AD7887_CH_AIN0 (0 << 3) /* convert on channel 0, DUAL=0,1 */
15#define AD7887_PM_MODE1 (0) /* CS based shutdown */
16#define AD7887_PM_MODE2 (1) /* full on */
17#define AD7887_PM_MODE3 (2) /* auto shutdown after conversion */
18#define AD7887_PM_MODE4 (3) /* standby mode */
19
20enum ad7887_channels {
21 AD7887_CH0,
22 AD7887_CH0_CH1,
23 AD7887_CH1,
24};
25
26#define RES_MASK(bits) ((1 << (bits)) - 1) /* TODO: move this into a common header */
27
28/*
29 * TODO: struct ad7887_platform_data needs to go into include/linux/iio
30 */
31
32struct ad7887_platform_data {
33 /* External Vref voltage applied */
34 u16 vref_mv;
35 /*
36 * AD7887:
37 * In single channel mode en_dual = flase, AIN1/Vref pins assumes its
38 * Vref function. In dual channel mode en_dual = true, AIN1 becomes the
39 * second input channel, and Vref is internally connected to Vdd.
40 */
41 bool en_dual;
42 /*
43 * AD7887:
44 * use_onchip_ref = true, the Vref is internally connected to the 2.500V
45 * Voltage reference. If use_onchip_ref = false, the reference voltage
46 * is supplied by AIN1/Vref
47 */
48 bool use_onchip_ref;
49};
50
51/**
52 * struct ad7887_chip_info - chip specifc information
53 * @int_vref_mv: the internal reference voltage
54 * @channel: channel specification
55 */
56
57struct ad7887_chip_info {
58 u16 int_vref_mv;
59 struct iio_chan_spec channel[3];
60};
61
62struct ad7887_state {
63 struct spi_device *spi;
64 const struct ad7887_chip_info *chip_info;
65 struct regulator *reg;
66 u16 int_vref_mv;
67 struct spi_transfer xfer[4];
68 struct spi_message msg[3];
69 struct spi_message *ring_msg;
70 unsigned char tx_cmd_buf[8];
71
72 /*
73 * DMA (thus cache coherency maintenance) requires the
74 * transfer buffers to live in their own cache lines.
75 */
76
77 unsigned char data[4] ____cacheline_aligned;
78};
79
80enum ad7887_supported_device_ids {
81 ID_AD7887
82};
83
84#ifdef CONFIG_IIO_BUFFER
85int ad7887_register_ring_funcs_and_init(struct iio_dev *indio_dev);
86void ad7887_ring_cleanup(struct iio_dev *indio_dev);
87#else /* CONFIG_IIO_BUFFER */
88
89static inline int
90ad7887_register_ring_funcs_and_init(struct iio_dev *indio_dev)
91{
92 return 0;
93}
94
95static inline void ad7887_ring_cleanup(struct iio_dev *indio_dev)
96{
97}
98#endif /* CONFIG_IIO_BUFFER */
99#endif /* IIO_ADC_AD7887_H_ */
diff --git a/drivers/staging/iio/adc/ad7887_ring.c b/drivers/staging/iio/adc/ad7887_ring.c
deleted file mode 100644
index b39923bbeedc..000000000000
--- a/drivers/staging/iio/adc/ad7887_ring.c
+++ /dev/null
@@ -1,122 +0,0 @@
1/*
2 * Copyright 2010-2012 Analog Devices Inc.
3 * Copyright (C) 2008 Jonathan Cameron
4 *
5 * Licensed under the GPL-2.
6 *
7 * ad7887_ring.c
8 */
9
10#include <linux/interrupt.h>
11#include <linux/kernel.h>
12#include <linux/slab.h>
13#include <linux/spi/spi.h>
14
15#include <linux/iio/iio.h>
16#include <linux/iio/buffer.h>
17#include <linux/iio/trigger_consumer.h>
18#include <linux/iio/triggered_buffer.h>
19
20#include "ad7887.h"
21
22/**
23 * ad7887_ring_preenable() setup the parameters of the ring before enabling
24 *
25 * The complex nature of the setting of the nuber of bytes per datum is due
26 * to this driver currently ensuring that the timestamp is stored at an 8
27 * byte boundary.
28 **/
29static int ad7887_ring_preenable(struct iio_dev *indio_dev)
30{
31 struct ad7887_state *st = iio_priv(indio_dev);
32 int ret;
33
34 ret = iio_sw_buffer_preenable(indio_dev);
35 if (ret < 0)
36 return ret;
37
38 /* We know this is a single long so can 'cheat' */
39 switch (*indio_dev->active_scan_mask) {
40 case (1 << 0):
41 st->ring_msg = &st->msg[AD7887_CH0];
42 break;
43 case (1 << 1):
44 st->ring_msg = &st->msg[AD7887_CH1];
45 /* Dummy read: push CH1 setting down to hardware */
46 spi_sync(st->spi, st->ring_msg);
47 break;
48 case ((1 << 1) | (1 << 0)):
49 st->ring_msg = &st->msg[AD7887_CH0_CH1];
50 break;
51 }
52
53 return 0;
54}
55
56static int ad7887_ring_postdisable(struct iio_dev *indio_dev)
57{
58 struct ad7887_state *st = iio_priv(indio_dev);
59
60 /* dummy read: restore default CH0 settin */
61 return spi_sync(st->spi, &st->msg[AD7887_CH0]);
62}
63
64/**
65 * ad7887_trigger_handler() bh of trigger launched polling to ring buffer
66 *
67 * Currently there is no option in this driver to disable the saving of
68 * timestamps within the ring.
69 **/
70static irqreturn_t ad7887_trigger_handler(int irq, void *p)
71{
72 struct iio_poll_func *pf = p;
73 struct iio_dev *indio_dev = pf->indio_dev;
74 struct ad7887_state *st = iio_priv(indio_dev);
75 s64 time_ns;
76 __u8 *buf;
77 int b_sent;
78
79 unsigned int bytes = bitmap_weight(indio_dev->active_scan_mask,
80 indio_dev->masklength) *
81 st->chip_info->channel[0].scan_type.storagebits / 8;
82
83 buf = kzalloc(indio_dev->scan_bytes, GFP_KERNEL);
84 if (buf == NULL)
85 goto done;
86
87 b_sent = spi_sync(st->spi, st->ring_msg);
88 if (b_sent)
89 goto done;
90
91 time_ns = iio_get_time_ns();
92
93 memcpy(buf, st->data, bytes);
94 if (indio_dev->scan_timestamp)
95 memcpy(buf + indio_dev->scan_bytes - sizeof(s64),
96 &time_ns, sizeof(time_ns));
97
98 iio_push_to_buffer(indio_dev->buffer, buf);
99done:
100 kfree(buf);
101 iio_trigger_notify_done(indio_dev->trig);
102
103 return IRQ_HANDLED;
104}
105
106static const struct iio_buffer_setup_ops ad7887_ring_setup_ops = {
107 .preenable = &ad7887_ring_preenable,
108 .postenable = &iio_triggered_buffer_postenable,
109 .predisable = &iio_triggered_buffer_predisable,
110 .postdisable = &ad7887_ring_postdisable,
111};
112
113int ad7887_register_ring_funcs_and_init(struct iio_dev *indio_dev)
114{
115 return iio_triggered_buffer_setup(indio_dev, &iio_pollfunc_store_time,
116 &ad7887_trigger_handler, &ad7887_ring_setup_ops);
117}
118
119void ad7887_ring_cleanup(struct iio_dev *indio_dev)
120{
121 iio_triggered_buffer_cleanup(indio_dev);
122}
diff --git a/drivers/staging/iio/adc/ad799x_core.c b/drivers/staging/iio/adc/ad799x_core.c
index 990050700afc..077eedbd0a0c 100644
--- a/drivers/staging/iio/adc/ad799x_core.c
+++ b/drivers/staging/iio/adc/ad799x_core.c
@@ -854,7 +854,7 @@ static const struct ad799x_chip_info ad799x_chip_info_tbl[] = {
854 }, 854 },
855}; 855};
856 856
857static int __devinit ad799x_probe(struct i2c_client *client, 857static int ad799x_probe(struct i2c_client *client,
858 const struct i2c_device_id *id) 858 const struct i2c_device_id *id)
859{ 859{
860 int ret; 860 int ret;
@@ -932,7 +932,7 @@ error_put_reg:
932 return ret; 932 return ret;
933} 933}
934 934
935static __devexit int ad799x_remove(struct i2c_client *client) 935static int ad799x_remove(struct i2c_client *client)
936{ 936{
937 struct iio_dev *indio_dev = i2c_get_clientdata(client); 937 struct iio_dev *indio_dev = i2c_get_clientdata(client);
938 struct ad799x_state *st = iio_priv(indio_dev); 938 struct ad799x_state *st = iio_priv(indio_dev);
@@ -970,7 +970,7 @@ static struct i2c_driver ad799x_driver = {
970 .name = "ad799x", 970 .name = "ad799x",
971 }, 971 },
972 .probe = ad799x_probe, 972 .probe = ad799x_probe,
973 .remove = __devexit_p(ad799x_remove), 973 .remove = ad799x_remove,
974 .id_table = ad799x_id, 974 .id_table = ad799x_id,
975}; 975};
976module_i2c_driver(ad799x_driver); 976module_i2c_driver(ad799x_driver);
diff --git a/drivers/staging/iio/adc/ad799x_ring.c b/drivers/staging/iio/adc/ad799x_ring.c
index 86026d9b20bc..2c5f38475a8e 100644
--- a/drivers/staging/iio/adc/ad799x_ring.c
+++ b/drivers/staging/iio/adc/ad799x_ring.c
@@ -77,7 +77,7 @@ static irqreturn_t ad799x_trigger_handler(int irq, void *p)
77 memcpy(rxbuf + indio_dev->scan_bytes - sizeof(s64), 77 memcpy(rxbuf + indio_dev->scan_bytes - sizeof(s64),
78 &time_ns, sizeof(time_ns)); 78 &time_ns, sizeof(time_ns));
79 79
80 iio_push_to_buffer(indio_dev->buffer, rxbuf); 80 iio_push_to_buffers(indio_dev, rxbuf);
81done: 81done:
82 kfree(rxbuf); 82 kfree(rxbuf);
83out: 83out:
diff --git a/drivers/staging/iio/adc/adt7310.c b/drivers/staging/iio/adc/adt7310.c
deleted file mode 100644
index 72460b6dc2f4..000000000000
--- a/drivers/staging/iio/adc/adt7310.c
+++ /dev/null
@@ -1,881 +0,0 @@
1/*
2 * ADT7310 digital temperature sensor driver supporting ADT7310
3 *
4 * Copyright 2010 Analog Devices Inc.
5 *
6 * Licensed under the GPL-2 or later.
7 */
8
9#include <linux/interrupt.h>
10#include <linux/device.h>
11#include <linux/kernel.h>
12#include <linux/slab.h>
13#include <linux/sysfs.h>
14#include <linux/list.h>
15#include <linux/spi/spi.h>
16#include <linux/module.h>
17
18#include <linux/iio/iio.h>
19#include <linux/iio/sysfs.h>
20#include <linux/iio/events.h>
21/*
22 * ADT7310 registers definition
23 */
24
25#define ADT7310_STATUS 0
26#define ADT7310_CONFIG 1
27#define ADT7310_TEMPERATURE 2
28#define ADT7310_ID 3
29#define ADT7310_T_CRIT 4
30#define ADT7310_T_HYST 5
31#define ADT7310_T_ALARM_HIGH 6
32#define ADT7310_T_ALARM_LOW 7
33
34/*
35 * ADT7310 status
36 */
37#define ADT7310_STAT_T_LOW 0x10
38#define ADT7310_STAT_T_HIGH 0x20
39#define ADT7310_STAT_T_CRIT 0x40
40#define ADT7310_STAT_NOT_RDY 0x80
41
42/*
43 * ADT7310 config
44 */
45#define ADT7310_FAULT_QUEUE_MASK 0x3
46#define ADT7310_CT_POLARITY 0x4
47#define ADT7310_INT_POLARITY 0x8
48#define ADT7310_EVENT_MODE 0x10
49#define ADT7310_MODE_MASK 0x60
50#define ADT7310_ONESHOT 0x20
51#define ADT7310_SPS 0x40
52#define ADT7310_PD 0x60
53#define ADT7310_RESOLUTION 0x80
54
55/*
56 * ADT7310 masks
57 */
58#define ADT7310_T16_VALUE_SIGN 0x8000
59#define ADT7310_T16_VALUE_FLOAT_OFFSET 7
60#define ADT7310_T16_VALUE_FLOAT_MASK 0x7F
61#define ADT7310_T13_VALUE_SIGN 0x1000
62#define ADT7310_T13_VALUE_OFFSET 3
63#define ADT7310_T13_VALUE_FLOAT_OFFSET 4
64#define ADT7310_T13_VALUE_FLOAT_MASK 0xF
65#define ADT7310_T_HYST_MASK 0xF
66#define ADT7310_DEVICE_ID_MASK 0x7
67#define ADT7310_MANUFACTORY_ID_MASK 0xF8
68#define ADT7310_MANUFACTORY_ID_OFFSET 3
69
70
71#define ADT7310_CMD_REG_MASK 0x28
72#define ADT7310_CMD_REG_OFFSET 3
73#define ADT7310_CMD_READ 0x40
74#define ADT7310_CMD_CON_READ 0x4
75
76#define ADT7310_IRQS 2
77
78/*
79 * struct adt7310_chip_info - chip specifc information
80 */
81
82struct adt7310_chip_info {
83 struct spi_device *spi_dev;
84 u8 config;
85};
86
87/*
88 * adt7310 register access by SPI
89 */
90
91static int adt7310_spi_read_word(struct adt7310_chip_info *chip, u8 reg, u16 *data)
92{
93 struct spi_device *spi_dev = chip->spi_dev;
94 u8 command = (reg << ADT7310_CMD_REG_OFFSET) & ADT7310_CMD_REG_MASK;
95 int ret = 0;
96
97 command |= ADT7310_CMD_READ;
98 ret = spi_write(spi_dev, &command, sizeof(command));
99 if (ret < 0) {
100 dev_err(&spi_dev->dev, "SPI write command error\n");
101 return ret;
102 }
103
104 ret = spi_read(spi_dev, (u8 *)data, sizeof(*data));
105 if (ret < 0) {
106 dev_err(&spi_dev->dev, "SPI read word error\n");
107 return ret;
108 }
109
110 *data = be16_to_cpu(*data);
111
112 return 0;
113}
114
115static int adt7310_spi_write_word(struct adt7310_chip_info *chip, u8 reg, u16 data)
116{
117 struct spi_device *spi_dev = chip->spi_dev;
118 u8 buf[3];
119 int ret = 0;
120
121 buf[0] = (reg << ADT7310_CMD_REG_OFFSET) & ADT7310_CMD_REG_MASK;
122 buf[1] = (u8)(data >> 8);
123 buf[2] = (u8)(data & 0xFF);
124
125 ret = spi_write(spi_dev, buf, 3);
126 if (ret < 0) {
127 dev_err(&spi_dev->dev, "SPI write word error\n");
128 return ret;
129 }
130
131 return ret;
132}
133
134static int adt7310_spi_read_byte(struct adt7310_chip_info *chip, u8 reg, u8 *data)
135{
136 struct spi_device *spi_dev = chip->spi_dev;
137 u8 command = (reg << ADT7310_CMD_REG_OFFSET) & ADT7310_CMD_REG_MASK;
138 int ret = 0;
139
140 command |= ADT7310_CMD_READ;
141 ret = spi_write(spi_dev, &command, sizeof(command));
142 if (ret < 0) {
143 dev_err(&spi_dev->dev, "SPI write command error\n");
144 return ret;
145 }
146
147 ret = spi_read(spi_dev, data, sizeof(*data));
148 if (ret < 0) {
149 dev_err(&spi_dev->dev, "SPI read byte error\n");
150 return ret;
151 }
152
153 return 0;
154}
155
156static int adt7310_spi_write_byte(struct adt7310_chip_info *chip, u8 reg, u8 data)
157{
158 struct spi_device *spi_dev = chip->spi_dev;
159 u8 buf[2];
160 int ret = 0;
161
162 buf[0] = (reg << ADT7310_CMD_REG_OFFSET) & ADT7310_CMD_REG_MASK;
163 buf[1] = data;
164
165 ret = spi_write(spi_dev, buf, 2);
166 if (ret < 0) {
167 dev_err(&spi_dev->dev, "SPI write byte error\n");
168 return ret;
169 }
170
171 return ret;
172}
173
174static ssize_t adt7310_show_mode(struct device *dev,
175 struct device_attribute *attr,
176 char *buf)
177{
178 struct iio_dev *dev_info = dev_to_iio_dev(dev);
179 struct adt7310_chip_info *chip = iio_priv(dev_info);
180 u8 config;
181
182 config = chip->config & ADT7310_MODE_MASK;
183
184 switch (config) {
185 case ADT7310_PD:
186 return sprintf(buf, "power-down\n");
187 case ADT7310_ONESHOT:
188 return sprintf(buf, "one-shot\n");
189 case ADT7310_SPS:
190 return sprintf(buf, "sps\n");
191 default:
192 return sprintf(buf, "full\n");
193 }
194}
195
196static ssize_t adt7310_store_mode(struct device *dev,
197 struct device_attribute *attr,
198 const char *buf,
199 size_t len)
200{
201 struct iio_dev *dev_info = dev_to_iio_dev(dev);
202 struct adt7310_chip_info *chip = iio_priv(dev_info);
203 u16 config;
204 int ret;
205
206 ret = adt7310_spi_read_byte(chip, ADT7310_CONFIG, &chip->config);
207 if (ret)
208 return -EIO;
209
210 config = chip->config & (~ADT7310_MODE_MASK);
211 if (strcmp(buf, "power-down"))
212 config |= ADT7310_PD;
213 else if (strcmp(buf, "one-shot"))
214 config |= ADT7310_ONESHOT;
215 else if (strcmp(buf, "sps"))
216 config |= ADT7310_SPS;
217
218 ret = adt7310_spi_write_byte(chip, ADT7310_CONFIG, config);
219 if (ret)
220 return -EIO;
221
222 chip->config = config;
223
224 return len;
225}
226
227static IIO_DEVICE_ATTR(mode, S_IRUGO | S_IWUSR,
228 adt7310_show_mode,
229 adt7310_store_mode,
230 0);
231
232static ssize_t adt7310_show_available_modes(struct device *dev,
233 struct device_attribute *attr,
234 char *buf)
235{
236 return sprintf(buf, "full\none-shot\nsps\npower-down\n");
237}
238
239static IIO_DEVICE_ATTR(available_modes, S_IRUGO, adt7310_show_available_modes, NULL, 0);
240
241static ssize_t adt7310_show_resolution(struct device *dev,
242 struct device_attribute *attr,
243 char *buf)
244{
245 struct iio_dev *dev_info = dev_to_iio_dev(dev);
246 struct adt7310_chip_info *chip = iio_priv(dev_info);
247 int ret;
248 int bits;
249
250 ret = adt7310_spi_read_byte(chip, ADT7310_CONFIG, &chip->config);
251 if (ret)
252 return -EIO;
253
254 if (chip->config & ADT7310_RESOLUTION)
255 bits = 16;
256 else
257 bits = 13;
258
259 return sprintf(buf, "%d bits\n", bits);
260}
261
262static ssize_t adt7310_store_resolution(struct device *dev,
263 struct device_attribute *attr,
264 const char *buf,
265 size_t len)
266{
267 struct iio_dev *dev_info = dev_to_iio_dev(dev);
268 struct adt7310_chip_info *chip = iio_priv(dev_info);
269 unsigned long data;
270 u16 config;
271 int ret;
272
273 ret = strict_strtoul(buf, 10, &data);
274 if (ret)
275 return -EINVAL;
276
277 ret = adt7310_spi_read_byte(chip, ADT7310_CONFIG, &chip->config);
278 if (ret)
279 return -EIO;
280
281 config = chip->config & (~ADT7310_RESOLUTION);
282 if (data)
283 config |= ADT7310_RESOLUTION;
284
285 ret = adt7310_spi_write_byte(chip, ADT7310_CONFIG, config);
286 if (ret)
287 return -EIO;
288
289 chip->config = config;
290
291 return len;
292}
293
294static IIO_DEVICE_ATTR(resolution, S_IRUGO | S_IWUSR,
295 adt7310_show_resolution,
296 adt7310_store_resolution,
297 0);
298
299static ssize_t adt7310_show_id(struct device *dev,
300 struct device_attribute *attr,
301 char *buf)
302{
303 struct iio_dev *dev_info = dev_to_iio_dev(dev);
304 struct adt7310_chip_info *chip = iio_priv(dev_info);
305 u8 id;
306 int ret;
307
308 ret = adt7310_spi_read_byte(chip, ADT7310_ID, &id);
309 if (ret)
310 return -EIO;
311
312 return sprintf(buf, "device id: 0x%x\nmanufactory id: 0x%x\n",
313 id & ADT7310_DEVICE_ID_MASK,
314 (id & ADT7310_MANUFACTORY_ID_MASK) >> ADT7310_MANUFACTORY_ID_OFFSET);
315}
316
317static IIO_DEVICE_ATTR(id, S_IRUGO | S_IWUSR,
318 adt7310_show_id,
319 NULL,
320 0);
321
322static ssize_t adt7310_convert_temperature(struct adt7310_chip_info *chip,
323 u16 data, char *buf)
324{
325 char sign = ' ';
326
327 if (chip->config & ADT7310_RESOLUTION) {
328 if (data & ADT7310_T16_VALUE_SIGN) {
329 /* convert supplement to positive value */
330 data = (u16)((ADT7310_T16_VALUE_SIGN << 1) - (u32)data);
331 sign = '-';
332 }
333 return sprintf(buf, "%c%d.%.7d\n", sign,
334 (data >> ADT7310_T16_VALUE_FLOAT_OFFSET),
335 (data & ADT7310_T16_VALUE_FLOAT_MASK) * 78125);
336 } else {
337 if (data & ADT7310_T13_VALUE_SIGN) {
338 /* convert supplement to positive value */
339 data >>= ADT7310_T13_VALUE_OFFSET;
340 data = (ADT7310_T13_VALUE_SIGN << 1) - data;
341 sign = '-';
342 }
343 return sprintf(buf, "%c%d.%.4d\n", sign,
344 (data >> ADT7310_T13_VALUE_FLOAT_OFFSET),
345 (data & ADT7310_T13_VALUE_FLOAT_MASK) * 625);
346 }
347}
348
349static ssize_t adt7310_show_value(struct device *dev,
350 struct device_attribute *attr,
351 char *buf)
352{
353 struct iio_dev *dev_info = dev_to_iio_dev(dev);
354 struct adt7310_chip_info *chip = iio_priv(dev_info);
355 u8 status;
356 u16 data;
357 int ret, i = 0;
358
359 do {
360 ret = adt7310_spi_read_byte(chip, ADT7310_STATUS, &status);
361 if (ret)
362 return -EIO;
363 i++;
364 if (i == 10000)
365 return -EIO;
366 } while (status & ADT7310_STAT_NOT_RDY);
367
368 ret = adt7310_spi_read_word(chip, ADT7310_TEMPERATURE, &data);
369 if (ret)
370 return -EIO;
371
372 return adt7310_convert_temperature(chip, data, buf);
373}
374
375static IIO_DEVICE_ATTR(value, S_IRUGO, adt7310_show_value, NULL, 0);
376
377static struct attribute *adt7310_attributes[] = {
378 &iio_dev_attr_available_modes.dev_attr.attr,
379 &iio_dev_attr_mode.dev_attr.attr,
380 &iio_dev_attr_resolution.dev_attr.attr,
381 &iio_dev_attr_id.dev_attr.attr,
382 &iio_dev_attr_value.dev_attr.attr,
383 NULL,
384};
385
386static const struct attribute_group adt7310_attribute_group = {
387 .attrs = adt7310_attributes,
388};
389
390static irqreturn_t adt7310_event_handler(int irq, void *private)
391{
392 struct iio_dev *indio_dev = private;
393 struct adt7310_chip_info *chip = iio_priv(indio_dev);
394 s64 timestamp = iio_get_time_ns();
395 u8 status;
396 int ret;
397
398 ret = adt7310_spi_read_byte(chip, ADT7310_STATUS, &status);
399 if (ret)
400 goto done;
401
402 if (status & ADT7310_STAT_T_HIGH)
403 iio_push_event(indio_dev,
404 IIO_UNMOD_EVENT_CODE(IIO_TEMP, 0,
405 IIO_EV_TYPE_THRESH,
406 IIO_EV_DIR_RISING),
407 timestamp);
408 if (status & ADT7310_STAT_T_LOW)
409 iio_push_event(indio_dev,
410 IIO_UNMOD_EVENT_CODE(IIO_TEMP, 0,
411 IIO_EV_TYPE_THRESH,
412 IIO_EV_DIR_FALLING),
413 timestamp);
414 if (status & ADT7310_STAT_T_CRIT)
415 iio_push_event(indio_dev,
416 IIO_UNMOD_EVENT_CODE(IIO_TEMP, 0,
417 IIO_EV_TYPE_THRESH,
418 IIO_EV_DIR_RISING),
419 timestamp);
420
421done:
422 return IRQ_HANDLED;
423}
424
425static ssize_t adt7310_show_event_mode(struct device *dev,
426 struct device_attribute *attr,
427 char *buf)
428{
429 struct iio_dev *dev_info = dev_to_iio_dev(dev);
430 struct adt7310_chip_info *chip = iio_priv(dev_info);
431 int ret;
432
433 ret = adt7310_spi_read_byte(chip, ADT7310_CONFIG, &chip->config);
434 if (ret)
435 return -EIO;
436
437 if (chip->config & ADT7310_EVENT_MODE)
438 return sprintf(buf, "interrupt\n");
439 else
440 return sprintf(buf, "comparator\n");
441}
442
443static ssize_t adt7310_set_event_mode(struct device *dev,
444 struct device_attribute *attr,
445 const char *buf,
446 size_t len)
447{
448 struct iio_dev *dev_info = dev_to_iio_dev(dev);
449 struct adt7310_chip_info *chip = iio_priv(dev_info);
450 u16 config;
451 int ret;
452
453 ret = adt7310_spi_read_byte(chip, ADT7310_CONFIG, &chip->config);
454 if (ret)
455 return -EIO;
456
457 config = chip->config &= ~ADT7310_EVENT_MODE;
458 if (strcmp(buf, "comparator") != 0)
459 config |= ADT7310_EVENT_MODE;
460
461 ret = adt7310_spi_write_byte(chip, ADT7310_CONFIG, config);
462 if (ret)
463 return -EIO;
464
465 chip->config = config;
466
467 return len;
468}
469
470static ssize_t adt7310_show_available_event_modes(struct device *dev,
471 struct device_attribute *attr,
472 char *buf)
473{
474 return sprintf(buf, "comparator\ninterrupt\n");
475}
476
477static ssize_t adt7310_show_fault_queue(struct device *dev,
478 struct device_attribute *attr,
479 char *buf)
480{
481 struct iio_dev *dev_info = dev_to_iio_dev(dev);
482 struct adt7310_chip_info *chip = iio_priv(dev_info);
483 int ret;
484
485 ret = adt7310_spi_read_byte(chip, ADT7310_CONFIG, &chip->config);
486 if (ret)
487 return -EIO;
488
489 return sprintf(buf, "%d\n", chip->config & ADT7310_FAULT_QUEUE_MASK);
490}
491
492static ssize_t adt7310_set_fault_queue(struct device *dev,
493 struct device_attribute *attr,
494 const char *buf,
495 size_t len)
496{
497 struct iio_dev *dev_info = dev_to_iio_dev(dev);
498 struct adt7310_chip_info *chip = iio_priv(dev_info);
499 unsigned long data;
500 int ret;
501 u8 config;
502
503 ret = strict_strtoul(buf, 10, &data);
504 if (ret || data > 3)
505 return -EINVAL;
506
507 ret = adt7310_spi_read_byte(chip, ADT7310_CONFIG, &chip->config);
508 if (ret)
509 return -EIO;
510
511 config = chip->config & ~ADT7310_FAULT_QUEUE_MASK;
512 config |= data;
513 ret = adt7310_spi_write_byte(chip, ADT7310_CONFIG, config);
514 if (ret)
515 return -EIO;
516
517 chip->config = config;
518
519 return len;
520}
521
522static inline ssize_t adt7310_show_t_bound(struct device *dev,
523 struct device_attribute *attr,
524 u8 bound_reg,
525 char *buf)
526{
527 struct iio_dev *dev_info = dev_to_iio_dev(dev);
528 struct adt7310_chip_info *chip = iio_priv(dev_info);
529 u16 data;
530 int ret;
531
532 ret = adt7310_spi_read_word(chip, bound_reg, &data);
533 if (ret)
534 return -EIO;
535
536 return adt7310_convert_temperature(chip, data, buf);
537}
538
539static inline ssize_t adt7310_set_t_bound(struct device *dev,
540 struct device_attribute *attr,
541 u8 bound_reg,
542 const char *buf,
543 size_t len)
544{
545 struct iio_dev *dev_info = dev_to_iio_dev(dev);
546 struct adt7310_chip_info *chip = iio_priv(dev_info);
547 long tmp1, tmp2;
548 u16 data;
549 char *pos;
550 int ret;
551
552 pos = strchr(buf, '.');
553
554 ret = strict_strtol(buf, 10, &tmp1);
555
556 if (ret || tmp1 > 127 || tmp1 < -128)
557 return -EINVAL;
558
559 if (pos) {
560 len = strlen(pos);
561
562 if (chip->config & ADT7310_RESOLUTION) {
563 if (len > ADT7310_T16_VALUE_FLOAT_OFFSET)
564 len = ADT7310_T16_VALUE_FLOAT_OFFSET;
565 pos[len] = 0;
566 ret = strict_strtol(pos, 10, &tmp2);
567
568 if (!ret)
569 tmp2 = (tmp2 / 78125) * 78125;
570 } else {
571 if (len > ADT7310_T13_VALUE_FLOAT_OFFSET)
572 len = ADT7310_T13_VALUE_FLOAT_OFFSET;
573 pos[len] = 0;
574 ret = strict_strtol(pos, 10, &tmp2);
575
576 if (!ret)
577 tmp2 = (tmp2 / 625) * 625;
578 }
579 }
580
581 if (tmp1 < 0)
582 data = (u16)(-tmp1);
583 else
584 data = (u16)tmp1;
585
586 if (chip->config & ADT7310_RESOLUTION) {
587 data = (data << ADT7310_T16_VALUE_FLOAT_OFFSET) |
588 (tmp2 & ADT7310_T16_VALUE_FLOAT_MASK);
589
590 if (tmp1 < 0)
591 /* convert positive value to supplyment */
592 data = (u16)((ADT7310_T16_VALUE_SIGN << 1) - (u32)data);
593 } else {
594 data = (data << ADT7310_T13_VALUE_FLOAT_OFFSET) |
595 (tmp2 & ADT7310_T13_VALUE_FLOAT_MASK);
596
597 if (tmp1 < 0)
598 /* convert positive value to supplyment */
599 data = (ADT7310_T13_VALUE_SIGN << 1) - data;
600 data <<= ADT7310_T13_VALUE_OFFSET;
601 }
602
603 ret = adt7310_spi_write_word(chip, bound_reg, data);
604 if (ret)
605 return -EIO;
606
607 return len;
608}
609
610static ssize_t adt7310_show_t_alarm_high(struct device *dev,
611 struct device_attribute *attr,
612 char *buf)
613{
614 return adt7310_show_t_bound(dev, attr,
615 ADT7310_T_ALARM_HIGH, buf);
616}
617
618static inline ssize_t adt7310_set_t_alarm_high(struct device *dev,
619 struct device_attribute *attr,
620 const char *buf,
621 size_t len)
622{
623 return adt7310_set_t_bound(dev, attr,
624 ADT7310_T_ALARM_HIGH, buf, len);
625}
626
627static ssize_t adt7310_show_t_alarm_low(struct device *dev,
628 struct device_attribute *attr,
629 char *buf)
630{
631 return adt7310_show_t_bound(dev, attr,
632 ADT7310_T_ALARM_LOW, buf);
633}
634
635static inline ssize_t adt7310_set_t_alarm_low(struct device *dev,
636 struct device_attribute *attr,
637 const char *buf,
638 size_t len)
639{
640 return adt7310_set_t_bound(dev, attr,
641 ADT7310_T_ALARM_LOW, buf, len);
642}
643
644static ssize_t adt7310_show_t_crit(struct device *dev,
645 struct device_attribute *attr,
646 char *buf)
647{
648 return adt7310_show_t_bound(dev, attr,
649 ADT7310_T_CRIT, buf);
650}
651
652static inline ssize_t adt7310_set_t_crit(struct device *dev,
653 struct device_attribute *attr,
654 const char *buf,
655 size_t len)
656{
657 return adt7310_set_t_bound(dev, attr,
658 ADT7310_T_CRIT, buf, len);
659}
660
661static ssize_t adt7310_show_t_hyst(struct device *dev,
662 struct device_attribute *attr,
663 char *buf)
664{
665 struct iio_dev *dev_info = dev_to_iio_dev(dev);
666 struct adt7310_chip_info *chip = iio_priv(dev_info);
667 int ret;
668 u8 t_hyst;
669
670 ret = adt7310_spi_read_byte(chip, ADT7310_T_HYST, &t_hyst);
671 if (ret)
672 return -EIO;
673
674 return sprintf(buf, "%d\n", t_hyst & ADT7310_T_HYST_MASK);
675}
676
677static inline ssize_t adt7310_set_t_hyst(struct device *dev,
678 struct device_attribute *attr,
679 const char *buf,
680 size_t len)
681{
682 struct iio_dev *dev_info = dev_to_iio_dev(dev);
683 struct adt7310_chip_info *chip = iio_priv(dev_info);
684 int ret;
685 unsigned long data;
686 u8 t_hyst;
687
688 ret = strict_strtol(buf, 10, &data);
689
690 if (ret || data > ADT7310_T_HYST_MASK)
691 return -EINVAL;
692
693 t_hyst = (u8)data;
694
695 ret = adt7310_spi_write_byte(chip, ADT7310_T_HYST, t_hyst);
696 if (ret)
697 return -EIO;
698
699 return len;
700}
701
702static IIO_DEVICE_ATTR(event_mode,
703 S_IRUGO | S_IWUSR,
704 adt7310_show_event_mode, adt7310_set_event_mode, 0);
705static IIO_DEVICE_ATTR(available_event_modes,
706 S_IRUGO | S_IWUSR,
707 adt7310_show_available_event_modes, NULL, 0);
708static IIO_DEVICE_ATTR(fault_queue,
709 S_IRUGO | S_IWUSR,
710 adt7310_show_fault_queue, adt7310_set_fault_queue, 0);
711static IIO_DEVICE_ATTR(t_alarm_high,
712 S_IRUGO | S_IWUSR,
713 adt7310_show_t_alarm_high, adt7310_set_t_alarm_high, 0);
714static IIO_DEVICE_ATTR(t_alarm_low,
715 S_IRUGO | S_IWUSR,
716 adt7310_show_t_alarm_low, adt7310_set_t_alarm_low, 0);
717static IIO_DEVICE_ATTR(t_crit,
718 S_IRUGO | S_IWUSR,
719 adt7310_show_t_crit, adt7310_set_t_crit, 0);
720static IIO_DEVICE_ATTR(t_hyst,
721 S_IRUGO | S_IWUSR,
722 adt7310_show_t_hyst, adt7310_set_t_hyst, 0);
723
724static struct attribute *adt7310_event_int_attributes[] = {
725 &iio_dev_attr_event_mode.dev_attr.attr,
726 &iio_dev_attr_available_event_modes.dev_attr.attr,
727 &iio_dev_attr_fault_queue.dev_attr.attr,
728 &iio_dev_attr_t_alarm_high.dev_attr.attr,
729 &iio_dev_attr_t_alarm_low.dev_attr.attr,
730 &iio_dev_attr_t_crit.dev_attr.attr,
731 &iio_dev_attr_t_hyst.dev_attr.attr,
732 NULL,
733};
734
735static struct attribute_group adt7310_event_attribute_group = {
736 .attrs = adt7310_event_int_attributes,
737 .name = "events",
738};
739
740static const struct iio_info adt7310_info = {
741 .attrs = &adt7310_attribute_group,
742 .event_attrs = &adt7310_event_attribute_group,
743 .driver_module = THIS_MODULE,
744};
745
746/*
747 * device probe and remove
748 */
749
750static int __devinit adt7310_probe(struct spi_device *spi_dev)
751{
752 struct adt7310_chip_info *chip;
753 struct iio_dev *indio_dev;
754 int ret = 0;
755 unsigned long *adt7310_platform_data = spi_dev->dev.platform_data;
756 unsigned long irq_flags;
757
758 indio_dev = iio_device_alloc(sizeof(*chip));
759 if (indio_dev == NULL) {
760 ret = -ENOMEM;
761 goto error_ret;
762 }
763 chip = iio_priv(indio_dev);
764 /* this is only used for device removal purposes */
765 dev_set_drvdata(&spi_dev->dev, indio_dev);
766
767 chip->spi_dev = spi_dev;
768
769 indio_dev->dev.parent = &spi_dev->dev;
770 indio_dev->name = spi_get_device_id(spi_dev)->name;
771 indio_dev->info = &adt7310_info;
772 indio_dev->modes = INDIO_DIRECT_MODE;
773
774 /* CT critcal temperature event. line 0 */
775 if (spi_dev->irq) {
776 if (adt7310_platform_data[2])
777 irq_flags = adt7310_platform_data[2];
778 else
779 irq_flags = IRQF_TRIGGER_LOW;
780 ret = request_threaded_irq(spi_dev->irq,
781 NULL,
782 &adt7310_event_handler,
783 irq_flags | IRQF_ONESHOT,
784 indio_dev->name,
785 indio_dev);
786 if (ret)
787 goto error_free_dev;
788 }
789
790 /* INT bound temperature alarm event. line 1 */
791 if (adt7310_platform_data[0]) {
792 ret = request_threaded_irq(adt7310_platform_data[0],
793 NULL,
794 &adt7310_event_handler,
795 adt7310_platform_data[1] |
796 IRQF_ONESHOT,
797 indio_dev->name,
798 indio_dev);
799 if (ret)
800 goto error_unreg_ct_irq;
801 }
802
803 if (spi_dev->irq && adt7310_platform_data[0]) {
804 ret = adt7310_spi_read_byte(chip, ADT7310_CONFIG, &chip->config);
805 if (ret) {
806 ret = -EIO;
807 goto error_unreg_int_irq;
808 }
809
810 /* set irq polarity low level */
811 chip->config &= ~ADT7310_CT_POLARITY;
812
813 if (adt7310_platform_data[1] & IRQF_TRIGGER_HIGH)
814 chip->config |= ADT7310_INT_POLARITY;
815 else
816 chip->config &= ~ADT7310_INT_POLARITY;
817
818 ret = adt7310_spi_write_byte(chip, ADT7310_CONFIG, chip->config);
819 if (ret) {
820 ret = -EIO;
821 goto error_unreg_int_irq;
822 }
823 }
824
825 ret = iio_device_register(indio_dev);
826 if (ret)
827 goto error_unreg_int_irq;
828
829 dev_info(&spi_dev->dev, "%s temperature sensor registered.\n",
830 indio_dev->name);
831
832 return 0;
833
834error_unreg_int_irq:
835 free_irq(adt7310_platform_data[0], indio_dev);
836error_unreg_ct_irq:
837 free_irq(spi_dev->irq, indio_dev);
838error_free_dev:
839 iio_device_free(indio_dev);
840error_ret:
841 return ret;
842}
843
844static int __devexit adt7310_remove(struct spi_device *spi_dev)
845{
846 struct iio_dev *indio_dev = dev_get_drvdata(&spi_dev->dev);
847 unsigned long *adt7310_platform_data = spi_dev->dev.platform_data;
848
849 iio_device_unregister(indio_dev);
850 dev_set_drvdata(&spi_dev->dev, NULL);
851 if (adt7310_platform_data[0])
852 free_irq(adt7310_platform_data[0], indio_dev);
853 if (spi_dev->irq)
854 free_irq(spi_dev->irq, indio_dev);
855 iio_device_free(indio_dev);
856
857 return 0;
858}
859
860static const struct spi_device_id adt7310_id[] = {
861 { "adt7310", 0 },
862 {}
863};
864
865MODULE_DEVICE_TABLE(spi, adt7310_id);
866
867static struct spi_driver adt7310_driver = {
868 .driver = {
869 .name = "adt7310",
870 .owner = THIS_MODULE,
871 },
872 .probe = adt7310_probe,
873 .remove = __devexit_p(adt7310_remove),
874 .id_table = adt7310_id,
875};
876module_spi_driver(adt7310_driver);
877
878MODULE_AUTHOR("Sonic Zhang <sonic.zhang@analog.com>");
879MODULE_DESCRIPTION("Analog Devices ADT7310 digital"
880 " temperature sensor driver");
881MODULE_LICENSE("GPL v2");
diff --git a/drivers/staging/iio/adc/adt7410.c b/drivers/staging/iio/adc/adt7410.c
index 4157596ea3b0..35455e160945 100644
--- a/drivers/staging/iio/adc/adt7410.c
+++ b/drivers/staging/iio/adc/adt7410.c
@@ -1,5 +1,5 @@
1/* 1/*
2 * ADT7410 digital temperature sensor driver supporting ADT7410 2 * ADT7410 digital temperature sensor driver supporting ADT7310/ADT7410
3 * 3 *
4 * Copyright 2010 Analog Devices Inc. 4 * Copyright 2010 Analog Devices Inc.
5 * 5 *
@@ -13,6 +13,7 @@
13#include <linux/sysfs.h> 13#include <linux/sysfs.h>
14#include <linux/list.h> 14#include <linux/list.h>
15#include <linux/i2c.h> 15#include <linux/i2c.h>
16#include <linux/spi/spi.h>
16#include <linux/module.h> 17#include <linux/module.h>
17 18
18#include <linux/iio/iio.h> 19#include <linux/iio/iio.h>
@@ -34,6 +35,19 @@
34#define ADT7410_RESET 0x2F 35#define ADT7410_RESET 0x2F
35 36
36/* 37/*
38 * ADT7310 registers definition
39 */
40
41#define ADT7310_STATUS 0
42#define ADT7310_CONFIG 1
43#define ADT7310_TEMPERATURE 2
44#define ADT7310_ID 3
45#define ADT7310_T_CRIT 4
46#define ADT7310_T_HYST 5
47#define ADT7310_T_ALARM_HIGH 6
48#define ADT7310_T_ALARM_LOW 7
49
50/*
37 * ADT7410 status 51 * ADT7410 status
38 */ 52 */
39#define ADT7410_STAT_T_LOW 0x10 53#define ADT7410_STAT_T_LOW 0x10
@@ -69,75 +83,52 @@
69#define ADT7410_MANUFACTORY_ID_MASK 0xF0 83#define ADT7410_MANUFACTORY_ID_MASK 0xF0
70#define ADT7410_MANUFACTORY_ID_OFFSET 4 84#define ADT7410_MANUFACTORY_ID_OFFSET 4
71 85
86
87#define ADT7310_CMD_REG_MASK 0x28
88#define ADT7310_CMD_REG_OFFSET 3
89#define ADT7310_CMD_READ 0x40
90#define ADT7310_CMD_CON_READ 0x4
91
72#define ADT7410_IRQS 2 92#define ADT7410_IRQS 2
73 93
74/* 94/*
75 * struct adt7410_chip_info - chip specifc information 95 * struct adt7410_chip_info - chip specifc information
76 */ 96 */
77 97
98struct adt7410_chip_info;
99
100struct adt7410_ops {
101 int (*read_word)(struct adt7410_chip_info *, u8 reg, u16 *data);
102 int (*write_word)(struct adt7410_chip_info *, u8 reg, u16 data);
103 int (*read_byte)(struct adt7410_chip_info *, u8 reg, u8 *data);
104 int (*write_byte)(struct adt7410_chip_info *, u8 reg, u8 data);
105};
106
78struct adt7410_chip_info { 107struct adt7410_chip_info {
79 struct i2c_client *client; 108 struct device *dev;
80 u8 config; 109 u8 config;
81};
82 110
83/* 111 const struct adt7410_ops *ops;
84 * adt7410 register access by I2C 112};
85 */
86 113
87static int adt7410_i2c_read_word(struct adt7410_chip_info *chip, u8 reg, u16 *data) 114static int adt7410_read_word(struct adt7410_chip_info *chip, u8 reg, u16 *data)
88{ 115{
89 struct i2c_client *client = chip->client; 116 return chip->ops->read_word(chip, reg, data);
90 int ret = 0;
91
92 ret = i2c_smbus_read_word_data(client, reg);
93 if (ret < 0) {
94 dev_err(&client->dev, "I2C read error\n");
95 return ret;
96 }
97
98 *data = swab16((u16)ret);
99
100 return 0;
101} 117}
102 118
103static int adt7410_i2c_write_word(struct adt7410_chip_info *chip, u8 reg, u16 data) 119static int adt7410_write_word(struct adt7410_chip_info *chip, u8 reg, u16 data)
104{ 120{
105 struct i2c_client *client = chip->client; 121 return chip->ops->write_word(chip, reg, data);
106 int ret = 0;
107
108 ret = i2c_smbus_write_word_data(client, reg, swab16(data));
109 if (ret < 0)
110 dev_err(&client->dev, "I2C write error\n");
111
112 return ret;
113} 122}
114 123
115static int adt7410_i2c_read_byte(struct adt7410_chip_info *chip, u8 reg, u8 *data) 124static int adt7410_read_byte(struct adt7410_chip_info *chip, u8 reg, u8 *data)
116{ 125{
117 struct i2c_client *client = chip->client; 126 return chip->ops->read_byte(chip, reg, data);
118 int ret = 0;
119
120 ret = i2c_smbus_read_byte_data(client, reg);
121 if (ret < 0) {
122 dev_err(&client->dev, "I2C read error\n");
123 return ret;
124 }
125
126 *data = (u8)ret;
127
128 return 0;
129} 127}
130 128
131static int adt7410_i2c_write_byte(struct adt7410_chip_info *chip, u8 reg, u8 data) 129static int adt7410_write_byte(struct adt7410_chip_info *chip, u8 reg, u8 data)
132{ 130{
133 struct i2c_client *client = chip->client; 131 return chip->ops->write_byte(chip, reg, data);
134 int ret = 0;
135
136 ret = i2c_smbus_write_byte_data(client, reg, data);
137 if (ret < 0)
138 dev_err(&client->dev, "I2C write error\n");
139
140 return ret;
141} 132}
142 133
143static ssize_t adt7410_show_mode(struct device *dev, 134static ssize_t adt7410_show_mode(struct device *dev,
@@ -172,7 +163,7 @@ static ssize_t adt7410_store_mode(struct device *dev,
172 u16 config; 163 u16 config;
173 int ret; 164 int ret;
174 165
175 ret = adt7410_i2c_read_byte(chip, ADT7410_CONFIG, &chip->config); 166 ret = adt7410_read_byte(chip, ADT7410_CONFIG, &chip->config);
176 if (ret) 167 if (ret)
177 return -EIO; 168 return -EIO;
178 169
@@ -184,13 +175,13 @@ static ssize_t adt7410_store_mode(struct device *dev,
184 else if (strcmp(buf, "sps")) 175 else if (strcmp(buf, "sps"))
185 config |= ADT7410_SPS; 176 config |= ADT7410_SPS;
186 177
187 ret = adt7410_i2c_write_byte(chip, ADT7410_CONFIG, config); 178 ret = adt7410_write_byte(chip, ADT7410_CONFIG, config);
188 if (ret) 179 if (ret)
189 return -EIO; 180 return -EIO;
190 181
191 chip->config = config; 182 chip->config = config;
192 183
193 return ret; 184 return len;
194} 185}
195 186
196static IIO_DEVICE_ATTR(mode, S_IRUGO | S_IWUSR, 187static IIO_DEVICE_ATTR(mode, S_IRUGO | S_IWUSR,
@@ -216,7 +207,7 @@ static ssize_t adt7410_show_resolution(struct device *dev,
216 int ret; 207 int ret;
217 int bits; 208 int bits;
218 209
219 ret = adt7410_i2c_read_byte(chip, ADT7410_CONFIG, &chip->config); 210 ret = adt7410_read_byte(chip, ADT7410_CONFIG, &chip->config);
220 if (ret) 211 if (ret)
221 return -EIO; 212 return -EIO;
222 213
@@ -243,7 +234,7 @@ static ssize_t adt7410_store_resolution(struct device *dev,
243 if (ret) 234 if (ret)
244 return -EINVAL; 235 return -EINVAL;
245 236
246 ret = adt7410_i2c_read_byte(chip, ADT7410_CONFIG, &chip->config); 237 ret = adt7410_read_byte(chip, ADT7410_CONFIG, &chip->config);
247 if (ret) 238 if (ret)
248 return -EIO; 239 return -EIO;
249 240
@@ -251,7 +242,7 @@ static ssize_t adt7410_store_resolution(struct device *dev,
251 if (data) 242 if (data)
252 config |= ADT7410_RESOLUTION; 243 config |= ADT7410_RESOLUTION;
253 244
254 ret = adt7410_i2c_write_byte(chip, ADT7410_CONFIG, config); 245 ret = adt7410_write_byte(chip, ADT7410_CONFIG, config);
255 if (ret) 246 if (ret)
256 return -EIO; 247 return -EIO;
257 248
@@ -274,7 +265,7 @@ static ssize_t adt7410_show_id(struct device *dev,
274 u8 id; 265 u8 id;
275 int ret; 266 int ret;
276 267
277 ret = adt7410_i2c_read_byte(chip, ADT7410_ID, &id); 268 ret = adt7410_read_byte(chip, ADT7410_ID, &id);
278 if (ret) 269 if (ret)
279 return -EIO; 270 return -EIO;
280 271
@@ -317,7 +308,7 @@ static ssize_t adt7410_show_value(struct device *dev,
317 int ret, i = 0; 308 int ret, i = 0;
318 309
319 do { 310 do {
320 ret = adt7410_i2c_read_byte(chip, ADT7410_STATUS, &status); 311 ret = adt7410_read_byte(chip, ADT7410_STATUS, &status);
321 if (ret) 312 if (ret)
322 return -EIO; 313 return -EIO;
323 i++; 314 i++;
@@ -325,7 +316,7 @@ static ssize_t adt7410_show_value(struct device *dev,
325 return -EIO; 316 return -EIO;
326 } while (status & ADT7410_STAT_NOT_RDY); 317 } while (status & ADT7410_STAT_NOT_RDY);
327 318
328 ret = adt7410_i2c_read_word(chip, ADT7410_TEMPERATURE, &data); 319 ret = adt7410_read_word(chip, ADT7410_TEMPERATURE, &data);
329 if (ret) 320 if (ret)
330 return -EIO; 321 return -EIO;
331 322
@@ -354,7 +345,7 @@ static irqreturn_t adt7410_event_handler(int irq, void *private)
354 s64 timestamp = iio_get_time_ns(); 345 s64 timestamp = iio_get_time_ns();
355 u8 status; 346 u8 status;
356 347
357 if (adt7410_i2c_read_byte(chip, ADT7410_STATUS, &status)) 348 if (adt7410_read_byte(chip, ADT7410_STATUS, &status))
358 return IRQ_HANDLED; 349 return IRQ_HANDLED;
359 350
360 if (status & ADT7410_STAT_T_HIGH) 351 if (status & ADT7410_STAT_T_HIGH)
@@ -387,7 +378,7 @@ static ssize_t adt7410_show_event_mode(struct device *dev,
387 struct adt7410_chip_info *chip = iio_priv(dev_info); 378 struct adt7410_chip_info *chip = iio_priv(dev_info);
388 int ret; 379 int ret;
389 380
390 ret = adt7410_i2c_read_byte(chip, ADT7410_CONFIG, &chip->config); 381 ret = adt7410_read_byte(chip, ADT7410_CONFIG, &chip->config);
391 if (ret) 382 if (ret)
392 return -EIO; 383 return -EIO;
393 384
@@ -407,7 +398,7 @@ static ssize_t adt7410_set_event_mode(struct device *dev,
407 u16 config; 398 u16 config;
408 int ret; 399 int ret;
409 400
410 ret = adt7410_i2c_read_byte(chip, ADT7410_CONFIG, &chip->config); 401 ret = adt7410_read_byte(chip, ADT7410_CONFIG, &chip->config);
411 if (ret) 402 if (ret)
412 return -EIO; 403 return -EIO;
413 404
@@ -415,7 +406,7 @@ static ssize_t adt7410_set_event_mode(struct device *dev,
415 if (strcmp(buf, "comparator") != 0) 406 if (strcmp(buf, "comparator") != 0)
416 config |= ADT7410_EVENT_MODE; 407 config |= ADT7410_EVENT_MODE;
417 408
418 ret = adt7410_i2c_write_byte(chip, ADT7410_CONFIG, config); 409 ret = adt7410_write_byte(chip, ADT7410_CONFIG, config);
419 if (ret) 410 if (ret)
420 return -EIO; 411 return -EIO;
421 412
@@ -439,7 +430,7 @@ static ssize_t adt7410_show_fault_queue(struct device *dev,
439 struct adt7410_chip_info *chip = iio_priv(dev_info); 430 struct adt7410_chip_info *chip = iio_priv(dev_info);
440 int ret; 431 int ret;
441 432
442 ret = adt7410_i2c_read_byte(chip, ADT7410_CONFIG, &chip->config); 433 ret = adt7410_read_byte(chip, ADT7410_CONFIG, &chip->config);
443 if (ret) 434 if (ret)
444 return -EIO; 435 return -EIO;
445 436
@@ -461,13 +452,13 @@ static ssize_t adt7410_set_fault_queue(struct device *dev,
461 if (ret || data > 3) 452 if (ret || data > 3)
462 return -EINVAL; 453 return -EINVAL;
463 454
464 ret = adt7410_i2c_read_byte(chip, ADT7410_CONFIG, &chip->config); 455 ret = adt7410_read_byte(chip, ADT7410_CONFIG, &chip->config);
465 if (ret) 456 if (ret)
466 return -EIO; 457 return -EIO;
467 458
468 config = chip->config & ~ADT7410_FAULT_QUEUE_MASK; 459 config = chip->config & ~ADT7410_FAULT_QUEUE_MASK;
469 config |= data; 460 config |= data;
470 ret = adt7410_i2c_write_byte(chip, ADT7410_CONFIG, config); 461 ret = adt7410_write_byte(chip, ADT7410_CONFIG, config);
471 if (ret) 462 if (ret)
472 return -EIO; 463 return -EIO;
473 464
@@ -486,7 +477,7 @@ static inline ssize_t adt7410_show_t_bound(struct device *dev,
486 u16 data; 477 u16 data;
487 int ret; 478 int ret;
488 479
489 ret = adt7410_i2c_read_word(chip, bound_reg, &data); 480 ret = adt7410_read_word(chip, bound_reg, &data);
490 if (ret) 481 if (ret)
491 return -EIO; 482 return -EIO;
492 483
@@ -557,7 +548,7 @@ static inline ssize_t adt7410_set_t_bound(struct device *dev,
557 data <<= ADT7410_T13_VALUE_OFFSET; 548 data <<= ADT7410_T13_VALUE_OFFSET;
558 } 549 }
559 550
560 ret = adt7410_i2c_write_word(chip, bound_reg, data); 551 ret = adt7410_write_word(chip, bound_reg, data);
561 if (ret) 552 if (ret)
562 return -EIO; 553 return -EIO;
563 554
@@ -624,7 +615,7 @@ static ssize_t adt7410_show_t_hyst(struct device *dev,
624 int ret; 615 int ret;
625 u8 t_hyst; 616 u8 t_hyst;
626 617
627 ret = adt7410_i2c_read_byte(chip, ADT7410_T_HYST, &t_hyst); 618 ret = adt7410_read_byte(chip, ADT7410_T_HYST, &t_hyst);
628 if (ret) 619 if (ret)
629 return -EIO; 620 return -EIO;
630 621
@@ -649,7 +640,7 @@ static inline ssize_t adt7410_set_t_hyst(struct device *dev,
649 640
650 t_hyst = (u8)data; 641 t_hyst = (u8)data;
651 642
652 ret = adt7410_i2c_write_byte(chip, ADT7410_T_HYST, t_hyst); 643 ret = adt7410_write_byte(chip, ADT7410_T_HYST, t_hyst);
653 if (ret) 644 if (ret)
654 return -EIO; 645 return -EIO;
655 646
@@ -704,14 +695,14 @@ static const struct iio_info adt7410_info = {
704 * device probe and remove 695 * device probe and remove
705 */ 696 */
706 697
707static int __devinit adt7410_probe(struct i2c_client *client, 698static int adt7410_probe(struct device *dev, int irq,
708 const struct i2c_device_id *id) 699 const char *name, const struct adt7410_ops *ops)
709{ 700{
701 unsigned long *adt7410_platform_data = dev->platform_data;
702 unsigned long local_pdata[] = {0, 0};
710 struct adt7410_chip_info *chip; 703 struct adt7410_chip_info *chip;
711 struct iio_dev *indio_dev; 704 struct iio_dev *indio_dev;
712 int ret = 0; 705 int ret = 0;
713 unsigned long *adt7410_platform_data = client->dev.platform_data;
714 unsigned long local_pdata[] = {0, 0};
715 706
716 indio_dev = iio_device_alloc(sizeof(*chip)); 707 indio_dev = iio_device_alloc(sizeof(*chip));
717 if (indio_dev == NULL) { 708 if (indio_dev == NULL) {
@@ -720,12 +711,13 @@ static int __devinit adt7410_probe(struct i2c_client *client,
720 } 711 }
721 chip = iio_priv(indio_dev); 712 chip = iio_priv(indio_dev);
722 /* this is only used for device removal purposes */ 713 /* this is only used for device removal purposes */
723 i2c_set_clientdata(client, indio_dev); 714 dev_set_drvdata(dev, indio_dev);
724 715
725 chip->client = client; 716 chip->dev = dev;
717 chip->ops = ops;
726 718
727 indio_dev->name = id->name; 719 indio_dev->name = name;
728 indio_dev->dev.parent = &client->dev; 720 indio_dev->dev.parent = dev;
729 indio_dev->info = &adt7410_info; 721 indio_dev->info = &adt7410_info;
730 indio_dev->modes = INDIO_DIRECT_MODE; 722 indio_dev->modes = INDIO_DIRECT_MODE;
731 723
@@ -733,12 +725,12 @@ static int __devinit adt7410_probe(struct i2c_client *client,
733 adt7410_platform_data = local_pdata; 725 adt7410_platform_data = local_pdata;
734 726
735 /* CT critcal temperature event. line 0 */ 727 /* CT critcal temperature event. line 0 */
736 if (client->irq) { 728 if (irq) {
737 ret = request_threaded_irq(client->irq, 729 ret = request_threaded_irq(irq,
738 NULL, 730 NULL,
739 &adt7410_event_handler, 731 &adt7410_event_handler,
740 IRQF_TRIGGER_LOW | IRQF_ONESHOT, 732 IRQF_TRIGGER_LOW | IRQF_ONESHOT,
741 id->name, 733 name,
742 indio_dev); 734 indio_dev);
743 if (ret) 735 if (ret)
744 goto error_free_dev; 736 goto error_free_dev;
@@ -751,13 +743,13 @@ static int __devinit adt7410_probe(struct i2c_client *client,
751 &adt7410_event_handler, 743 &adt7410_event_handler,
752 adt7410_platform_data[1] | 744 adt7410_platform_data[1] |
753 IRQF_ONESHOT, 745 IRQF_ONESHOT,
754 id->name, 746 name,
755 indio_dev); 747 indio_dev);
756 if (ret) 748 if (ret)
757 goto error_unreg_ct_irq; 749 goto error_unreg_ct_irq;
758 } 750 }
759 751
760 ret = adt7410_i2c_read_byte(chip, ADT7410_CONFIG, &chip->config); 752 ret = adt7410_read_byte(chip, ADT7410_CONFIG, &chip->config);
761 if (ret) { 753 if (ret) {
762 ret = -EIO; 754 ret = -EIO;
763 goto error_unreg_int_irq; 755 goto error_unreg_int_irq;
@@ -765,7 +757,7 @@ static int __devinit adt7410_probe(struct i2c_client *client,
765 757
766 chip->config |= ADT7410_RESOLUTION; 758 chip->config |= ADT7410_RESOLUTION;
767 759
768 if (client->irq && adt7410_platform_data[0]) { 760 if (irq && adt7410_platform_data[0]) {
769 761
770 /* set irq polarity low level */ 762 /* set irq polarity low level */
771 chip->config &= ~ADT7410_CT_POLARITY; 763 chip->config &= ~ADT7410_CT_POLARITY;
@@ -776,7 +768,7 @@ static int __devinit adt7410_probe(struct i2c_client *client,
776 chip->config &= ~ADT7410_INT_POLARITY; 768 chip->config &= ~ADT7410_INT_POLARITY;
777 } 769 }
778 770
779 ret = adt7410_i2c_write_byte(chip, ADT7410_CONFIG, chip->config); 771 ret = adt7410_write_byte(chip, ADT7410_CONFIG, chip->config);
780 if (ret) { 772 if (ret) {
781 ret = -EIO; 773 ret = -EIO;
782 goto error_unreg_int_irq; 774 goto error_unreg_int_irq;
@@ -785,36 +777,117 @@ static int __devinit adt7410_probe(struct i2c_client *client,
785 if (ret) 777 if (ret)
786 goto error_unreg_int_irq; 778 goto error_unreg_int_irq;
787 779
788 dev_info(&client->dev, "%s temperature sensor registered.\n", 780 dev_info(dev, "%s temperature sensor registered.\n",
789 id->name); 781 name);
790 782
791 return 0; 783 return 0;
792 784
793error_unreg_int_irq: 785error_unreg_int_irq:
794 free_irq(adt7410_platform_data[0], indio_dev); 786 free_irq(adt7410_platform_data[0], indio_dev);
795error_unreg_ct_irq: 787error_unreg_ct_irq:
796 free_irq(client->irq, indio_dev); 788 free_irq(irq, indio_dev);
797error_free_dev: 789error_free_dev:
798 iio_device_free(indio_dev); 790 iio_device_free(indio_dev);
799error_ret: 791error_ret:
800 return ret; 792 return ret;
801} 793}
802 794
803static int __devexit adt7410_remove(struct i2c_client *client) 795static int adt7410_remove(struct device *dev, int irq)
804{ 796{
805 struct iio_dev *indio_dev = i2c_get_clientdata(client); 797 struct iio_dev *indio_dev = dev_get_drvdata(dev);
806 unsigned long *adt7410_platform_data = client->dev.platform_data; 798 unsigned long *adt7410_platform_data = dev->platform_data;
807 799
808 iio_device_unregister(indio_dev); 800 iio_device_unregister(indio_dev);
809 if (adt7410_platform_data[0]) 801 if (adt7410_platform_data[0])
810 free_irq(adt7410_platform_data[0], indio_dev); 802 free_irq(adt7410_platform_data[0], indio_dev);
811 if (client->irq) 803 if (irq)
812 free_irq(client->irq, indio_dev); 804 free_irq(irq, indio_dev);
813 iio_device_free(indio_dev); 805 iio_device_free(indio_dev);
814 806
815 return 0; 807 return 0;
816} 808}
817 809
810#if IS_ENABLED(CONFIG_I2C)
811
812static int adt7410_i2c_read_word(struct adt7410_chip_info *chip, u8 reg,
813 u16 *data)
814{
815 struct i2c_client *client = to_i2c_client(chip->dev);
816 int ret = 0;
817
818 ret = i2c_smbus_read_word_data(client, reg);
819 if (ret < 0) {
820 dev_err(&client->dev, "I2C read error\n");
821 return ret;
822 }
823
824 *data = swab16((u16)ret);
825
826 return 0;
827}
828
829static int adt7410_i2c_write_word(struct adt7410_chip_info *chip, u8 reg,
830 u16 data)
831{
832 struct i2c_client *client = to_i2c_client(chip->dev);
833 int ret = 0;
834
835 ret = i2c_smbus_write_word_data(client, reg, swab16(data));
836 if (ret < 0)
837 dev_err(&client->dev, "I2C write error\n");
838
839 return ret;
840}
841
842static int adt7410_i2c_read_byte(struct adt7410_chip_info *chip, u8 reg,
843 u8 *data)
844{
845 struct i2c_client *client = to_i2c_client(chip->dev);
846 int ret = 0;
847
848 ret = i2c_smbus_read_byte_data(client, reg);
849 if (ret < 0) {
850 dev_err(&client->dev, "I2C read error\n");
851 return ret;
852 }
853
854 *data = (u8)ret;
855
856 return 0;
857}
858
859static int adt7410_i2c_write_byte(struct adt7410_chip_info *chip, u8 reg,
860 u8 data)
861{
862 struct i2c_client *client = to_i2c_client(chip->dev);
863 int ret = 0;
864
865 ret = i2c_smbus_write_byte_data(client, reg, data);
866 if (ret < 0)
867 dev_err(&client->dev, "I2C write error\n");
868
869 return ret;
870}
871
872static const struct adt7410_ops adt7410_i2c_ops = {
873 .read_word = adt7410_i2c_read_word,
874 .write_word = adt7410_i2c_write_word,
875 .read_byte = adt7410_i2c_read_byte,
876 .write_byte = adt7410_i2c_write_byte,
877};
878
879static int adt7410_i2c_probe(struct i2c_client *client,
880 const struct i2c_device_id *id)
881{
882 return adt7410_probe(&client->dev, client->irq, id->name,
883 &adt7410_i2c_ops);
884}
885
886static int adt7410_i2c_remove(struct i2c_client *client)
887{
888 return adt7410_remove(&client->dev, client->irq);
889}
890
818static const struct i2c_device_id adt7410_id[] = { 891static const struct i2c_device_id adt7410_id[] = {
819 { "adt7410", 0 }, 892 { "adt7410", 0 },
820 {} 893 {}
@@ -826,13 +899,204 @@ static struct i2c_driver adt7410_driver = {
826 .driver = { 899 .driver = {
827 .name = "adt7410", 900 .name = "adt7410",
828 }, 901 },
829 .probe = adt7410_probe, 902 .probe = adt7410_i2c_probe,
830 .remove = __devexit_p(adt7410_remove), 903 .remove = adt7410_i2c_remove,
831 .id_table = adt7410_id, 904 .id_table = adt7410_id,
832}; 905};
833module_i2c_driver(adt7410_driver); 906
907static int __init adt7410_i2c_init(void)
908{
909 return i2c_add_driver(&adt7410_driver);
910}
911
912static void __exit adt7410_i2c_exit(void)
913{
914 i2c_del_driver(&adt7410_driver);
915}
916
917#else
918
919static int __init adt7410_i2c_init(void) { return 0; };
920static void __exit adt7410_i2c_exit(void) {};
921
922#endif
923
924#if IS_ENABLED(CONFIG_SPI_MASTER)
925
926static const u8 adt7371_reg_table[] = {
927 [ADT7410_TEMPERATURE] = ADT7310_TEMPERATURE,
928 [ADT7410_STATUS] = ADT7310_STATUS,
929 [ADT7410_CONFIG] = ADT7310_CONFIG,
930 [ADT7410_T_ALARM_HIGH] = ADT7310_T_ALARM_HIGH,
931 [ADT7410_T_ALARM_LOW] = ADT7310_T_ALARM_LOW,
932 [ADT7410_T_CRIT] = ADT7310_T_CRIT,
933 [ADT7410_T_HYST] = ADT7310_T_HYST,
934 [ADT7410_ID] = ADT7310_ID,
935};
936
937#define AD7310_COMMAND(reg) (adt7371_reg_table[(reg)] << ADT7310_CMD_REG_OFFSET)
938
939static int adt7310_spi_read_word(struct adt7410_chip_info *chip,
940 u8 reg, u16 *data)
941{
942 struct spi_device *spi = to_spi_device(chip->dev);
943 u8 command = AD7310_COMMAND(reg);
944 int ret = 0;
945
946 command |= ADT7310_CMD_READ;
947 ret = spi_write(spi, &command, sizeof(command));
948 if (ret < 0) {
949 dev_err(&spi->dev, "SPI write command error\n");
950 return ret;
951 }
952
953 ret = spi_read(spi, (u8 *)data, sizeof(*data));
954 if (ret < 0) {
955 dev_err(&spi->dev, "SPI read word error\n");
956 return ret;
957 }
958
959 *data = be16_to_cpu(*data);
960
961 return 0;
962}
963
964static int adt7310_spi_write_word(struct adt7410_chip_info *chip, u8 reg,
965 u16 data)
966{
967 struct spi_device *spi = to_spi_device(chip->dev);
968 u8 buf[3];
969 int ret = 0;
970
971 buf[0] = AD7310_COMMAND(reg);
972 buf[1] = (u8)(data >> 8);
973 buf[2] = (u8)(data & 0xFF);
974
975 ret = spi_write(spi, buf, 3);
976 if (ret < 0) {
977 dev_err(&spi->dev, "SPI write word error\n");
978 return ret;
979 }
980
981 return ret;
982}
983
984static int adt7310_spi_read_byte(struct adt7410_chip_info *chip, u8 reg,
985 u8 *data)
986{
987 struct spi_device *spi = to_spi_device(chip->dev);
988 u8 command = AD7310_COMMAND(reg);
989 int ret = 0;
990
991 command |= ADT7310_CMD_READ;
992 ret = spi_write(spi, &command, sizeof(command));
993 if (ret < 0) {
994 dev_err(&spi->dev, "SPI write command error\n");
995 return ret;
996 }
997
998 ret = spi_read(spi, data, sizeof(*data));
999 if (ret < 0) {
1000 dev_err(&spi->dev, "SPI read byte error\n");
1001 return ret;
1002 }
1003
1004 return 0;
1005}
1006
1007static int adt7310_spi_write_byte(struct adt7410_chip_info *chip, u8 reg,
1008 u8 data)
1009{
1010 struct spi_device *spi = to_spi_device(chip->dev);
1011 u8 buf[2];
1012 int ret = 0;
1013
1014 buf[0] = AD7310_COMMAND(reg);
1015 buf[1] = data;
1016
1017 ret = spi_write(spi, buf, 2);
1018 if (ret < 0) {
1019 dev_err(&spi->dev, "SPI write byte error\n");
1020 return ret;
1021 }
1022
1023 return ret;
1024}
1025
1026static const struct adt7410_ops adt7310_spi_ops = {
1027 .read_word = adt7310_spi_read_word,
1028 .write_word = adt7310_spi_write_word,
1029 .read_byte = adt7310_spi_read_byte,
1030 .write_byte = adt7310_spi_write_byte,
1031};
1032
1033static int adt7310_spi_probe(struct spi_device *spi)
1034{
1035 return adt7410_probe(&spi->dev, spi->irq,
1036 spi_get_device_id(spi)->name, &adt7310_spi_ops);
1037}
1038
1039static int adt7310_spi_remove(struct spi_device *spi)
1040{
1041 return adt7410_remove(&spi->dev, spi->irq);
1042}
1043
1044static const struct spi_device_id adt7310_id[] = {
1045 { "adt7310", 0 },
1046 {}
1047};
1048MODULE_DEVICE_TABLE(spi, adt7310_id);
1049
1050static struct spi_driver adt7310_driver = {
1051 .driver = {
1052 .name = "adt7310",
1053 .owner = THIS_MODULE,
1054 },
1055 .probe = adt7310_spi_probe,
1056 .remove = adt7310_spi_remove,
1057 .id_table = adt7310_id,
1058};
1059
1060static int __init adt7310_spi_init(void)
1061{
1062 return spi_register_driver(&adt7310_driver);
1063}
1064
1065static void adt7310_spi_exit(void)
1066{
1067 spi_unregister_driver(&adt7310_driver);
1068}
1069
1070#else
1071
1072static int __init adt7310_spi_init(void) { return 0; };
1073static void adt7310_spi_exit(void) {};
1074
1075#endif
1076
1077static int __init adt7410_init(void)
1078{
1079 int ret;
1080
1081 ret = adt7310_spi_init();
1082 if (ret)
1083 return ret;
1084
1085 ret = adt7410_i2c_init();
1086 if (ret)
1087 adt7310_spi_exit();
1088
1089 return ret;
1090}
1091module_init(adt7410_init);
1092
1093static void __exit adt7410_exit(void)
1094{
1095 adt7410_i2c_exit();
1096 adt7310_spi_exit();
1097}
1098module_exit(adt7410_exit);
834 1099
835MODULE_AUTHOR("Sonic Zhang <sonic.zhang@analog.com>"); 1100MODULE_AUTHOR("Sonic Zhang <sonic.zhang@analog.com>");
836MODULE_DESCRIPTION("Analog Devices ADT7410 digital" 1101MODULE_DESCRIPTION("Analog Devices ADT7310/ADT7410 digital temperature sensor driver");
837 " temperature sensor driver");
838MODULE_LICENSE("GPL v2"); 1102MODULE_LICENSE("GPL v2");
diff --git a/drivers/staging/iio/adc/lpc32xx_adc.c b/drivers/staging/iio/adc/lpc32xx_adc.c
index 7e9bd0001cc7..0bf2a6cc79e0 100644
--- a/drivers/staging/iio/adc/lpc32xx_adc.c
+++ b/drivers/staging/iio/adc/lpc32xx_adc.c
@@ -126,7 +126,7 @@ static irqreturn_t lpc32xx_adc_isr(int irq, void *dev_id)
126 return IRQ_HANDLED; 126 return IRQ_HANDLED;
127} 127}
128 128
129static int __devinit lpc32xx_adc_probe(struct platform_device *pdev) 129static int lpc32xx_adc_probe(struct platform_device *pdev)
130{ 130{
131 struct lpc32xx_adc_info *info = NULL; 131 struct lpc32xx_adc_info *info = NULL;
132 struct resource *res; 132 struct resource *res;
@@ -150,7 +150,7 @@ static int __devinit lpc32xx_adc_probe(struct platform_device *pdev)
150 150
151 info = iio_priv(iodev); 151 info = iio_priv(iodev);
152 152
153 info->adc_base = ioremap(res->start, res->end - res->start + 1); 153 info->adc_base = ioremap(res->start, resource_size(res));
154 if (!info->adc_base) { 154 if (!info->adc_base) {
155 dev_err(&pdev->dev, "failed mapping memory\n"); 155 dev_err(&pdev->dev, "failed mapping memory\n");
156 retval = -EBUSY; 156 retval = -EBUSY;
@@ -207,7 +207,7 @@ errout1:
207 return retval; 207 return retval;
208} 208}
209 209
210static int __devexit lpc32xx_adc_remove(struct platform_device *pdev) 210static int lpc32xx_adc_remove(struct platform_device *pdev)
211{ 211{
212 struct iio_dev *iodev = platform_get_drvdata(pdev); 212 struct iio_dev *iodev = platform_get_drvdata(pdev);
213 struct lpc32xx_adc_info *info = iio_priv(iodev); 213 struct lpc32xx_adc_info *info = iio_priv(iodev);
@@ -233,7 +233,7 @@ MODULE_DEVICE_TABLE(of, lpc32xx_adc_match);
233 233
234static struct platform_driver lpc32xx_adc_driver = { 234static struct platform_driver lpc32xx_adc_driver = {
235 .probe = lpc32xx_adc_probe, 235 .probe = lpc32xx_adc_probe,
236 .remove = __devexit_p(lpc32xx_adc_remove), 236 .remove = lpc32xx_adc_remove,
237 .driver = { 237 .driver = {
238 .name = MOD_NAME, 238 .name = MOD_NAME,
239 .owner = THIS_MODULE, 239 .owner = THIS_MODULE,
diff --git a/drivers/staging/iio/adc/max1363.h b/drivers/staging/iio/adc/max1363.h
deleted file mode 100644
index c746918683f1..000000000000
--- a/drivers/staging/iio/adc/max1363.h
+++ /dev/null
@@ -1,177 +0,0 @@
1#ifndef _MAX1363_H_
2#define _MAX1363_H_
3
4#define MAX1363_SETUP_BYTE(a) ((a) | 0x80)
5
6/* There is a fair bit more defined here than currently
7 * used, but the intention is to support everything these
8 * chips do in the long run */
9
10/* see data sheets */
11/* max1363 and max1236, max1237, max1238, max1239 */
12#define MAX1363_SETUP_AIN3_IS_AIN3_REF_IS_VDD 0x00
13#define MAX1363_SETUP_AIN3_IS_REF_EXT_TO_REF 0x20
14#define MAX1363_SETUP_AIN3_IS_AIN3_REF_IS_INT 0x40
15#define MAX1363_SETUP_AIN3_IS_REF_REF_IS_INT 0x60
16#define MAX1363_SETUP_POWER_UP_INT_REF 0x10
17#define MAX1363_SETUP_POWER_DOWN_INT_REF 0x00
18
19/* think about includeing max11600 etc - more settings */
20#define MAX1363_SETUP_EXT_CLOCK 0x08
21#define MAX1363_SETUP_INT_CLOCK 0x00
22#define MAX1363_SETUP_UNIPOLAR 0x00
23#define MAX1363_SETUP_BIPOLAR 0x04
24#define MAX1363_SETUP_RESET 0x00
25#define MAX1363_SETUP_NORESET 0x02
26/* max1363 only - though don't care on others.
27 * For now monitor modes are not implemented as the relevant
28 * line is not connected on my test board.
29 * The definitions are here as I intend to add this soon.
30 */
31#define MAX1363_SETUP_MONITOR_SETUP 0x01
32
33/* Specific to the max1363 */
34#define MAX1363_MON_RESET_CHAN(a) (1 << ((a) + 4))
35#define MAX1363_MON_INT_ENABLE 0x01
36
37/* defined for readability reasons */
38/* All chips */
39#define MAX1363_CONFIG_BYTE(a) ((a))
40
41#define MAX1363_CONFIG_SE 0x01
42#define MAX1363_CONFIG_DE 0x00
43#define MAX1363_CONFIG_SCAN_TO_CS 0x00
44#define MAX1363_CONFIG_SCAN_SINGLE_8 0x20
45#define MAX1363_CONFIG_SCAN_MONITOR_MODE 0x40
46#define MAX1363_CONFIG_SCAN_SINGLE_1 0x60
47/* max123{6-9} only */
48#define MAX1236_SCAN_MID_TO_CHANNEL 0x40
49
50/* max1363 only - merely part of channel selects or don't care for others*/
51#define MAX1363_CONFIG_EN_MON_MODE_READ 0x18
52
53#define MAX1363_CHANNEL_SEL(a) ((a) << 1)
54
55/* max1363 strictly 0x06 - but doesn't matter */
56#define MAX1363_CHANNEL_SEL_MASK 0x1E
57#define MAX1363_SCAN_MASK 0x60
58#define MAX1363_SE_DE_MASK 0x01
59
60#define MAX1363_MAX_CHANNELS 25
61/**
62 * struct max1363_mode - scan mode information
63 * @conf: The corresponding value of the configuration register
64 * @modemask: Bit mask corresponding to channels enabled in this mode
65 */
66struct max1363_mode {
67 int8_t conf;
68 DECLARE_BITMAP(modemask, MAX1363_MAX_CHANNELS);
69};
70
71/* This must be maintained along side the max1363_mode_table in max1363_core */
72enum max1363_modes {
73 /* Single read of a single channel */
74 _s0, _s1, _s2, _s3, _s4, _s5, _s6, _s7, _s8, _s9, _s10, _s11,
75 /* Differential single read */
76 d0m1, d2m3, d4m5, d6m7, d8m9, d10m11,
77 d1m0, d3m2, d5m4, d7m6, d9m8, d11m10,
78 /* Scan to channel and mid to channel where overlapping */
79 s0to1, s0to2, s2to3, s0to3, s0to4, s0to5, s0to6,
80 s6to7, s0to7, s6to8, s0to8, s6to9,
81 s0to9, s6to10, s0to10, s6to11, s0to11,
82 /* Differential scan to channel and mid to channel where overlapping */
83 d0m1to2m3, d0m1to4m5, d0m1to6m7, d6m7to8m9,
84 d0m1to8m9, d6m7to10m11, d0m1to10m11, d1m0to3m2,
85 d1m0to5m4, d1m0to7m6, d7m6to9m8, d1m0to9m8,
86 d7m6to11m10, d1m0to11m10,
87};
88
89/**
90 * struct max1363_chip_info - chip specifc information
91 * @name: indentification string for chip
92 * @bits: accuracy of the adc in bits
93 * @int_vref_mv: the internal reference voltage
94 * @info: iio core function callbacks structure
95 * @mode_list: array of available scan modes
96 * @num_modes: the number of scan modes available
97 * @default_mode: the scan mode in which the chip starts up
98 * @channel: channel specification
99 * @num_channels: number of channels
100 */
101struct max1363_chip_info {
102 const struct iio_info *info;
103 const struct iio_chan_spec *channels;
104 int num_channels;
105 const enum max1363_modes *mode_list;
106 enum max1363_modes default_mode;
107 u16 int_vref_mv;
108 u8 num_modes;
109 u8 bits;
110};
111
112/**
113 * struct max1363_state - driver instance specific data
114 * @client: i2c_client
115 * @setupbyte: cache of current device setup byte
116 * @configbyte: cache of current device config byte
117 * @chip_info: chip model specific constants, available modes etc
118 * @current_mode: the scan mode of this chip
119 * @requestedmask: a valid requested set of channels
120 * @reg: supply regulator
121 * @monitor_on: whether monitor mode is enabled
122 * @monitor_speed: parameter corresponding to device monitor speed setting
123 * @mask_high: bitmask for enabled high thresholds
124 * @mask_low: bitmask for enabled low thresholds
125 * @thresh_high: high threshold values
126 * @thresh_low: low threshold values
127 */
128struct max1363_state {
129 struct i2c_client *client;
130 u8 setupbyte;
131 u8 configbyte;
132 const struct max1363_chip_info *chip_info;
133 const struct max1363_mode *current_mode;
134 u32 requestedmask;
135 struct regulator *reg;
136
137 /* Using monitor modes and buffer at the same time is
138 currently not supported */
139 bool monitor_on;
140 unsigned int monitor_speed:3;
141 u8 mask_high;
142 u8 mask_low;
143 /* 4x unipolar first then the fours bipolar ones */
144 s16 thresh_high[8];
145 s16 thresh_low[8];
146};
147
148const struct max1363_mode
149*max1363_match_mode(const unsigned long *mask,
150 const struct max1363_chip_info *ci);
151
152int max1363_set_scan_mode(struct max1363_state *st);
153
154#ifdef CONFIG_MAX1363_RING_BUFFER
155int max1363_update_scan_mode(struct iio_dev *indio_dev,
156 const unsigned long *scan_mask);
157int max1363_register_ring_funcs_and_init(struct iio_dev *indio_dev);
158void max1363_ring_cleanup(struct iio_dev *indio_dev);
159
160#else /* CONFIG_MAX1363_RING_BUFFER */
161int max1363_update_scan_mode(struct iio_dev *indio_dev,
162 const long *scan_mask)
163{
164 return 0;
165}
166
167static inline int
168max1363_register_ring_funcs_and_init(struct iio_dev *indio_dev)
169{
170 return 0;
171}
172
173static inline void max1363_ring_cleanup(struct iio_dev *indio_dev)
174{
175}
176#endif /* CONFIG_MAX1363_RING_BUFFER */
177#endif /* _MAX1363_H_ */
diff --git a/drivers/staging/iio/adc/max1363_ring.c b/drivers/staging/iio/adc/max1363_ring.c
deleted file mode 100644
index 5f74f3b7671a..000000000000
--- a/drivers/staging/iio/adc/max1363_ring.c
+++ /dev/null
@@ -1,139 +0,0 @@
1/*
2 * Copyright (C) 2008 Jonathan Cameron
3 *
4 * This program is free software; you can redistribute it and/or modify
5 * it under the terms of the GNU General Public License version 2 as
6 * published by the Free Software Foundation.
7 *
8 * max1363_ring.c
9 */
10
11#include <linux/interrupt.h>
12#include <linux/slab.h>
13#include <linux/kernel.h>
14#include <linux/i2c.h>
15#include <linux/bitops.h>
16
17#include <linux/iio/iio.h>
18#include <linux/iio/buffer.h>
19#include "../ring_sw.h"
20#include <linux/iio/trigger_consumer.h>
21
22#include "max1363.h"
23
24int max1363_update_scan_mode(struct iio_dev *indio_dev,
25 const unsigned long *scan_mask)
26{
27 struct max1363_state *st = iio_priv(indio_dev);
28
29 /*
30 * Need to figure out the current mode based upon the requested
31 * scan mask in iio_dev
32 */
33 st->current_mode = max1363_match_mode(scan_mask, st->chip_info);
34 if (!st->current_mode)
35 return -EINVAL;
36 max1363_set_scan_mode(st);
37 return 0;
38}
39
40static irqreturn_t max1363_trigger_handler(int irq, void *p)
41{
42 struct iio_poll_func *pf = p;
43 struct iio_dev *indio_dev = pf->indio_dev;
44 struct max1363_state *st = iio_priv(indio_dev);
45 s64 time_ns;
46 __u8 *rxbuf;
47 int b_sent;
48 size_t d_size;
49 unsigned long numvals = bitmap_weight(st->current_mode->modemask,
50 MAX1363_MAX_CHANNELS);
51
52 /* Ensure the timestamp is 8 byte aligned */
53 if (st->chip_info->bits != 8)
54 d_size = numvals*2;
55 else
56 d_size = numvals;
57 if (indio_dev->scan_timestamp) {
58 d_size += sizeof(s64);
59 if (d_size % sizeof(s64))
60 d_size += sizeof(s64) - (d_size % sizeof(s64));
61 }
62 /* Monitor mode prevents reading. Whilst not currently implemented
63 * might as well have this test in here in the meantime as it does
64 * no harm.
65 */
66 if (numvals == 0)
67 goto done;
68
69 rxbuf = kmalloc(d_size, GFP_KERNEL);
70 if (rxbuf == NULL)
71 goto done;
72 if (st->chip_info->bits != 8)
73 b_sent = i2c_master_recv(st->client, rxbuf, numvals*2);
74 else
75 b_sent = i2c_master_recv(st->client, rxbuf, numvals);
76 if (b_sent < 0)
77 goto done_free;
78
79 time_ns = iio_get_time_ns();
80
81 if (indio_dev->scan_timestamp)
82 memcpy(rxbuf + d_size - sizeof(s64), &time_ns, sizeof(time_ns));
83 iio_push_to_buffer(indio_dev->buffer, rxbuf);
84
85done_free:
86 kfree(rxbuf);
87done:
88 iio_trigger_notify_done(indio_dev->trig);
89
90 return IRQ_HANDLED;
91}
92
93static const struct iio_buffer_setup_ops max1363_ring_setup_ops = {
94 .postenable = &iio_triggered_buffer_postenable,
95 .preenable = &iio_sw_buffer_preenable,
96 .predisable = &iio_triggered_buffer_predisable,
97};
98
99int max1363_register_ring_funcs_and_init(struct iio_dev *indio_dev)
100{
101 struct max1363_state *st = iio_priv(indio_dev);
102 int ret = 0;
103
104 indio_dev->buffer = iio_sw_rb_allocate(indio_dev);
105 if (!indio_dev->buffer) {
106 ret = -ENOMEM;
107 goto error_ret;
108 }
109 indio_dev->pollfunc = iio_alloc_pollfunc(NULL,
110 &max1363_trigger_handler,
111 IRQF_ONESHOT,
112 indio_dev,
113 "%s_consumer%d",
114 st->client->name,
115 indio_dev->id);
116 if (indio_dev->pollfunc == NULL) {
117 ret = -ENOMEM;
118 goto error_deallocate_sw_rb;
119 }
120 /* Ring buffer functions - here trigger setup related */
121 indio_dev->setup_ops = &max1363_ring_setup_ops;
122
123 /* Flag that polled ring buffering is possible */
124 indio_dev->modes |= INDIO_BUFFER_TRIGGERED;
125
126 return 0;
127
128error_deallocate_sw_rb:
129 iio_sw_rb_free(indio_dev->buffer);
130error_ret:
131 return ret;
132}
133
134void max1363_ring_cleanup(struct iio_dev *indio_dev)
135{
136 /* ensure that the trigger has been detached */
137 iio_dealloc_pollfunc(indio_dev->pollfunc);
138 iio_sw_rb_free(indio_dev->buffer);
139}
diff --git a/drivers/staging/iio/adc/mxs-lradc.c b/drivers/staging/iio/adc/mxs-lradc.c
index ca7c1fa88e71..fb31b457a56a 100644
--- a/drivers/staging/iio/adc/mxs-lradc.c
+++ b/drivers/staging/iio/adc/mxs-lradc.c
@@ -237,7 +237,6 @@ static irqreturn_t mxs_lradc_trigger_handler(int irq, void *p)
237 struct iio_poll_func *pf = p; 237 struct iio_poll_func *pf = p;
238 struct iio_dev *iio = pf->indio_dev; 238 struct iio_dev *iio = pf->indio_dev;
239 struct mxs_lradc *lradc = iio_priv(iio); 239 struct mxs_lradc *lradc = iio_priv(iio);
240 struct iio_buffer *buffer = iio->buffer;
241 const uint32_t chan_value = LRADC_CH_ACCUMULATE | 240 const uint32_t chan_value = LRADC_CH_ACCUMULATE |
242 ((LRADC_DELAY_TIMER_LOOP - 1) << LRADC_CH_NUM_SAMPLES_OFFSET); 241 ((LRADC_DELAY_TIMER_LOOP - 1) << LRADC_CH_NUM_SAMPLES_OFFSET);
243 int i, j = 0; 242 int i, j = 0;
@@ -256,7 +255,7 @@ static irqreturn_t mxs_lradc_trigger_handler(int irq, void *p)
256 *timestamp = pf->timestamp; 255 *timestamp = pf->timestamp;
257 } 256 }
258 257
259 iio_push_to_buffer(buffer, (u8 *)lradc->buffer); 258 iio_push_to_buffers(iio, (u8 *)lradc->buffer);
260 259
261 iio_trigger_notify_done(iio->trig); 260 iio_trigger_notify_done(iio->trig);
262 261
@@ -351,7 +350,7 @@ static int mxs_lradc_buffer_preenable(struct iio_dev *iio)
351 writel(chan_value, lradc->base + LRADC_CH(ofs)); 350 writel(chan_value, lradc->base + LRADC_CH(ofs));
352 enable |= 1 << ofs; 351 enable |= 1 << ofs;
353 ofs++; 352 ofs++;
354 }; 353 }
355 354
356 writel(LRADC_DELAY_TRIGGER_LRADCS_MASK | LRADC_DELAY_KICK, 355 writel(LRADC_DELAY_TRIGGER_LRADCS_MASK | LRADC_DELAY_KICK,
357 lradc->base + LRADC_DELAY(0) + STMP_OFFSET_REG_CLR); 356 lradc->base + LRADC_DELAY(0) + STMP_OFFSET_REG_CLR);
@@ -467,7 +466,7 @@ static void mxs_lradc_hw_stop(struct mxs_lradc *lradc)
467 writel(0, lradc->base + LRADC_DELAY(i)); 466 writel(0, lradc->base + LRADC_DELAY(i));
468} 467}
469 468
470static int __devinit mxs_lradc_probe(struct platform_device *pdev) 469static int mxs_lradc_probe(struct platform_device *pdev)
471{ 470{
472 struct device *dev = &pdev->dev; 471 struct device *dev = &pdev->dev;
473 struct mxs_lradc *lradc; 472 struct mxs_lradc *lradc;
@@ -552,7 +551,7 @@ err_addr:
552 return ret; 551 return ret;
553} 552}
554 553
555static int __devexit mxs_lradc_remove(struct platform_device *pdev) 554static int mxs_lradc_remove(struct platform_device *pdev)
556{ 555{
557 struct iio_dev *iio = platform_get_drvdata(pdev); 556 struct iio_dev *iio = platform_get_drvdata(pdev);
558 struct mxs_lradc *lradc = iio_priv(iio); 557 struct mxs_lradc *lradc = iio_priv(iio);
@@ -580,7 +579,7 @@ static struct platform_driver mxs_lradc_driver = {
580 .of_match_table = mxs_lradc_dt_ids, 579 .of_match_table = mxs_lradc_dt_ids,
581 }, 580 },
582 .probe = mxs_lradc_probe, 581 .probe = mxs_lradc_probe,
583 .remove = __devexit_p(mxs_lradc_remove), 582 .remove = mxs_lradc_remove,
584}; 583};
585 584
586module_platform_driver(mxs_lradc_driver); 585module_platform_driver(mxs_lradc_driver);
diff --git a/drivers/staging/iio/adc/spear_adc.c b/drivers/staging/iio/adc/spear_adc.c
index 0b83e2e1f410..13052ceb2f2b 100644
--- a/drivers/staging/iio/adc/spear_adc.c
+++ b/drivers/staging/iio/adc/spear_adc.c
@@ -291,7 +291,7 @@ static const struct iio_info spear_adc_iio_info = {
291 .driver_module = THIS_MODULE, 291 .driver_module = THIS_MODULE,
292}; 292};
293 293
294static int __devinit spear_adc_probe(struct platform_device *pdev) 294static int spear_adc_probe(struct platform_device *pdev)
295{ 295{
296 struct device_node *np = pdev->dev.of_node; 296 struct device_node *np = pdev->dev.of_node;
297 struct device *dev = &pdev->dev; 297 struct device *dev = &pdev->dev;
@@ -401,7 +401,7 @@ errout1:
401 return ret; 401 return ret;
402} 402}
403 403
404static int __devexit spear_adc_remove(struct platform_device *pdev) 404static int spear_adc_remove(struct platform_device *pdev)
405{ 405{
406 struct iio_dev *iodev = platform_get_drvdata(pdev); 406 struct iio_dev *iodev = platform_get_drvdata(pdev);
407 struct spear_adc_info *info = iio_priv(iodev); 407 struct spear_adc_info *info = iio_priv(iodev);
@@ -424,7 +424,7 @@ MODULE_DEVICE_TABLE(of, spear_adc_dt_ids);
424 424
425static struct platform_driver spear_adc_driver = { 425static struct platform_driver spear_adc_driver = {
426 .probe = spear_adc_probe, 426 .probe = spear_adc_probe,
427 .remove = __devexit_p(spear_adc_remove), 427 .remove = spear_adc_remove,
428 .driver = { 428 .driver = {
429 .name = MOD_NAME, 429 .name = MOD_NAME,
430 .owner = THIS_MODULE, 430 .owner = THIS_MODULE,
diff --git a/drivers/staging/iio/addac/adt7316-i2c.c b/drivers/staging/iio/addac/adt7316-i2c.c
index 9e128dd7d457..ce7d91cb331c 100644
--- a/drivers/staging/iio/addac/adt7316-i2c.c
+++ b/drivers/staging/iio/addac/adt7316-i2c.c
@@ -92,7 +92,7 @@ static int adt7316_i2c_multi_write(void *client, u8 reg, u8 count, u8 *data)
92 * device probe and remove 92 * device probe and remove
93 */ 93 */
94 94
95static int __devinit adt7316_i2c_probe(struct i2c_client *client, 95static int adt7316_i2c_probe(struct i2c_client *client,
96 const struct i2c_device_id *id) 96 const struct i2c_device_id *id)
97{ 97{
98 struct adt7316_bus bus = { 98 struct adt7316_bus bus = {
@@ -108,7 +108,7 @@ static int __devinit adt7316_i2c_probe(struct i2c_client *client,
108 return adt7316_probe(&client->dev, &bus, id->name); 108 return adt7316_probe(&client->dev, &bus, id->name);
109} 109}
110 110
111static int __devexit adt7316_i2c_remove(struct i2c_client *client) 111static int adt7316_i2c_remove(struct i2c_client *client)
112{ 112{
113 return adt7316_remove(&client->dev); 113 return adt7316_remove(&client->dev);
114} 114}
@@ -132,7 +132,7 @@ static struct i2c_driver adt7316_driver = {
132 .owner = THIS_MODULE, 132 .owner = THIS_MODULE,
133 }, 133 },
134 .probe = adt7316_i2c_probe, 134 .probe = adt7316_i2c_probe,
135 .remove = __devexit_p(adt7316_i2c_remove), 135 .remove = adt7316_i2c_remove,
136 .id_table = adt7316_i2c_id, 136 .id_table = adt7316_i2c_id,
137}; 137};
138module_i2c_driver(adt7316_driver); 138module_i2c_driver(adt7316_driver);
diff --git a/drivers/staging/iio/addac/adt7316-spi.c b/drivers/staging/iio/addac/adt7316-spi.c
index 985f7d8a6eb2..0db8ef5835a0 100644
--- a/drivers/staging/iio/addac/adt7316-spi.c
+++ b/drivers/staging/iio/addac/adt7316-spi.c
@@ -89,7 +89,7 @@ static int adt7316_spi_write(void *client, u8 reg, u8 val)
89 * device probe and remove 89 * device probe and remove
90 */ 90 */
91 91
92static int __devinit adt7316_spi_probe(struct spi_device *spi_dev) 92static int adt7316_spi_probe(struct spi_device *spi_dev)
93{ 93{
94 struct adt7316_bus bus = { 94 struct adt7316_bus bus = {
95 .client = spi_dev, 95 .client = spi_dev,
@@ -116,7 +116,7 @@ static int __devinit adt7316_spi_probe(struct spi_device *spi_dev)
116 return adt7316_probe(&spi_dev->dev, &bus, spi_dev->modalias); 116 return adt7316_probe(&spi_dev->dev, &bus, spi_dev->modalias);
117} 117}
118 118
119static int __devexit adt7316_spi_remove(struct spi_device *spi_dev) 119static int adt7316_spi_remove(struct spi_device *spi_dev)
120{ 120{
121 return adt7316_remove(&spi_dev->dev); 121 return adt7316_remove(&spi_dev->dev);
122} 122}
@@ -140,7 +140,7 @@ static struct spi_driver adt7316_driver = {
140 .owner = THIS_MODULE, 140 .owner = THIS_MODULE,
141 }, 141 },
142 .probe = adt7316_spi_probe, 142 .probe = adt7316_spi_probe,
143 .remove = __devexit_p(adt7316_spi_remove), 143 .remove = adt7316_spi_remove,
144 .id_table = adt7316_spi_id, 144 .id_table = adt7316_spi_id,
145}; 145};
146module_spi_driver(adt7316_driver); 146module_spi_driver(adt7316_driver);
diff --git a/drivers/staging/iio/addac/adt7316.c b/drivers/staging/iio/addac/adt7316.c
index 8fb014a046a2..0b431bc4f627 100644
--- a/drivers/staging/iio/addac/adt7316.c
+++ b/drivers/staging/iio/addac/adt7316.c
@@ -2125,7 +2125,7 @@ static const struct iio_info adt7516_info = {
2125/* 2125/*
2126 * device probe and remove 2126 * device probe and remove
2127 */ 2127 */
2128int __devinit adt7316_probe(struct device *dev, struct adt7316_bus *bus, 2128int adt7316_probe(struct device *dev, struct adt7316_bus *bus,
2129 const char *name) 2129 const char *name)
2130{ 2130{
2131 struct adt7316_chip_info *chip; 2131 struct adt7316_chip_info *chip;
@@ -2216,7 +2216,7 @@ error_ret:
2216} 2216}
2217EXPORT_SYMBOL(adt7316_probe); 2217EXPORT_SYMBOL(adt7316_probe);
2218 2218
2219int __devexit adt7316_remove(struct device *dev) 2219int adt7316_remove(struct device *dev)
2220{ 2220{
2221 struct iio_dev *indio_dev = dev_get_drvdata(dev); 2221 struct iio_dev *indio_dev = dev_get_drvdata(dev);
2222 struct adt7316_chip_info *chip = iio_priv(indio_dev); 2222 struct adt7316_chip_info *chip = iio_priv(indio_dev);
diff --git a/drivers/staging/iio/cdc/ad7150.c b/drivers/staging/iio/cdc/ad7150.c
index 6a4041417d4e..3c608c14dd99 100644
--- a/drivers/staging/iio/cdc/ad7150.c
+++ b/drivers/staging/iio/cdc/ad7150.c
@@ -156,7 +156,7 @@ static int ad7150_read_event_config(struct iio_dev *indio_dev, u64 event_code)
156 return !adaptive && (threshtype == 0x1); 156 return !adaptive && (threshtype == 0x1);
157 else 157 else
158 return !adaptive && (threshtype == 0x0); 158 return !adaptive && (threshtype == 0x0);
159 }; 159 }
160 return -EINVAL; 160 return -EINVAL;
161} 161}
162 162
@@ -194,7 +194,7 @@ static int ad7150_write_event_params(struct iio_dev *indio_dev, u64 event_code)
194 break; 194 break;
195 default: 195 default:
196 return -EINVAL; 196 return -EINVAL;
197 }; 197 }
198 ret = i2c_smbus_write_byte_data(chip->client, 198 ret = i2c_smbus_write_byte_data(chip->client,
199 ad7150_addresses[chan][4], 199 ad7150_addresses[chan][4],
200 sens); 200 sens);
@@ -257,7 +257,7 @@ static int ad7150_write_event_config(struct iio_dev *indio_dev,
257 default: 257 default:
258 ret = -EINVAL; 258 ret = -EINVAL;
259 goto error_ret; 259 goto error_ret;
260 }; 260 }
261 261
262 cfg |= (!adaptive << 7) | (thresh_type << 5); 262 cfg |= (!adaptive << 7) | (thresh_type << 5);
263 263
@@ -327,7 +327,7 @@ static int ad7150_write_event_value(struct iio_dev *indio_dev,
327 default: 327 default:
328 ret = -EINVAL; 328 ret = -EINVAL;
329 goto error_ret; 329 goto error_ret;
330 }; 330 }
331 331
332 /* write back if active */ 332 /* write back if active */
333 ret = ad7150_write_event_params(indio_dev, event_code); 333 ret = ad7150_write_event_params(indio_dev, event_code);
@@ -360,7 +360,7 @@ static ssize_t ad7150_show_timeout(struct device *dev,
360 break; 360 break;
361 default: 361 default:
362 return -EINVAL; 362 return -EINVAL;
363 }; 363 }
364 364
365 return sprintf(buf, "%d\n", value); 365 return sprintf(buf, "%d\n", value);
366} 366}
@@ -394,7 +394,7 @@ static ssize_t ad7150_store_timeout(struct device *dev,
394 default: 394 default:
395 ret = -EINVAL; 395 ret = -EINVAL;
396 goto error_ret; 396 goto error_ret;
397 }; 397 }
398 398
399 ret = ad7150_write_event_params(indio_dev, this_attr->address); 399 ret = ad7150_write_event_params(indio_dev, this_attr->address);
400error_ret: 400error_ret:
@@ -551,7 +551,7 @@ static const struct iio_info ad7150_info = {
551 * device probe and remove 551 * device probe and remove
552 */ 552 */
553 553
554static int __devinit ad7150_probe(struct i2c_client *client, 554static int ad7150_probe(struct i2c_client *client,
555 const struct i2c_device_id *id) 555 const struct i2c_device_id *id)
556{ 556{
557 int ret; 557 int ret;
@@ -628,7 +628,7 @@ error_ret:
628 return ret; 628 return ret;
629} 629}
630 630
631static int __devexit ad7150_remove(struct i2c_client *client) 631static int ad7150_remove(struct i2c_client *client)
632{ 632{
633 struct iio_dev *indio_dev = i2c_get_clientdata(client); 633 struct iio_dev *indio_dev = i2c_get_clientdata(client);
634 634
@@ -658,7 +658,7 @@ static struct i2c_driver ad7150_driver = {
658 .name = "ad7150", 658 .name = "ad7150",
659 }, 659 },
660 .probe = ad7150_probe, 660 .probe = ad7150_probe,
661 .remove = __devexit_p(ad7150_remove), 661 .remove = ad7150_remove,
662 .id_table = ad7150_id, 662 .id_table = ad7150_id,
663}; 663};
664module_i2c_driver(ad7150_driver); 664module_i2c_driver(ad7150_driver);
diff --git a/drivers/staging/iio/cdc/ad7152.c b/drivers/staging/iio/cdc/ad7152.c
index 98c3015116aa..3c92ba3722a8 100644
--- a/drivers/staging/iio/cdc/ad7152.c
+++ b/drivers/staging/iio/cdc/ad7152.c
@@ -405,7 +405,7 @@ static int ad7152_read_raw(struct iio_dev *indio_dev,
405 break; 405 break;
406 default: 406 default:
407 ret = -EINVAL; 407 ret = -EINVAL;
408 }; 408 }
409out: 409out:
410 mutex_unlock(&indio_dev->mlock); 410 mutex_unlock(&indio_dev->mlock);
411 return ret; 411 return ret;
@@ -474,7 +474,7 @@ static const struct iio_chan_spec ad7152_channels[] = {
474 * device probe and remove 474 * device probe and remove
475 */ 475 */
476 476
477static int __devinit ad7152_probe(struct i2c_client *client, 477static int ad7152_probe(struct i2c_client *client,
478 const struct i2c_device_id *id) 478 const struct i2c_device_id *id)
479{ 479{
480 int ret = 0; 480 int ret = 0;
@@ -518,7 +518,7 @@ error_ret:
518 return ret; 518 return ret;
519} 519}
520 520
521static int __devexit ad7152_remove(struct i2c_client *client) 521static int ad7152_remove(struct i2c_client *client)
522{ 522{
523 struct iio_dev *indio_dev = i2c_get_clientdata(client); 523 struct iio_dev *indio_dev = i2c_get_clientdata(client);
524 524
@@ -541,7 +541,7 @@ static struct i2c_driver ad7152_driver = {
541 .name = KBUILD_MODNAME, 541 .name = KBUILD_MODNAME,
542 }, 542 },
543 .probe = ad7152_probe, 543 .probe = ad7152_probe,
544 .remove = __devexit_p(ad7152_remove), 544 .remove = ad7152_remove,
545 .id_table = ad7152_id, 545 .id_table = ad7152_id,
546}; 546};
547module_i2c_driver(ad7152_driver); 547module_i2c_driver(ad7152_driver);
diff --git a/drivers/staging/iio/cdc/ad7746.c b/drivers/staging/iio/cdc/ad7746.c
index 754e11e87193..466b82ecfbe0 100644
--- a/drivers/staging/iio/cdc/ad7746.c
+++ b/drivers/staging/iio/cdc/ad7746.c
@@ -677,7 +677,7 @@ static int ad7746_read_raw(struct iio_dev *indio_dev,
677 break; 677 break;
678 default: 678 default:
679 ret = -EINVAL; 679 ret = -EINVAL;
680 }; 680 }
681out: 681out:
682 mutex_unlock(&indio_dev->mlock); 682 mutex_unlock(&indio_dev->mlock);
683 return ret; 683 return ret;
@@ -694,7 +694,7 @@ static const struct iio_info ad7746_info = {
694 * device probe and remove 694 * device probe and remove
695 */ 695 */
696 696
697static int __devinit ad7746_probe(struct i2c_client *client, 697static int ad7746_probe(struct i2c_client *client,
698 const struct i2c_device_id *id) 698 const struct i2c_device_id *id)
699{ 699{
700 struct ad7746_platform_data *pdata = client->dev.platform_data; 700 struct ad7746_platform_data *pdata = client->dev.platform_data;
@@ -768,7 +768,7 @@ error_ret:
768 return ret; 768 return ret;
769} 769}
770 770
771static int __devexit ad7746_remove(struct i2c_client *client) 771static int ad7746_remove(struct i2c_client *client)
772{ 772{
773 struct iio_dev *indio_dev = i2c_get_clientdata(client); 773 struct iio_dev *indio_dev = i2c_get_clientdata(client);
774 774
@@ -792,7 +792,7 @@ static struct i2c_driver ad7746_driver = {
792 .name = KBUILD_MODNAME, 792 .name = KBUILD_MODNAME,
793 }, 793 },
794 .probe = ad7746_probe, 794 .probe = ad7746_probe,
795 .remove = __devexit_p(ad7746_remove), 795 .remove = ad7746_remove,
796 .id_table = ad7746_id, 796 .id_table = ad7746_id,
797}; 797};
798module_i2c_driver(ad7746_driver); 798module_i2c_driver(ad7746_driver);
diff --git a/drivers/staging/iio/frequency/ad5930.c b/drivers/staging/iio/frequency/ad5930.c
index 2d541d0eebef..23777be38b18 100644
--- a/drivers/staging/iio/frequency/ad5930.c
+++ b/drivers/staging/iio/frequency/ad5930.c
@@ -91,7 +91,7 @@ static const struct iio_info ad5930_info = {
91 .driver_module = THIS_MODULE, 91 .driver_module = THIS_MODULE,
92}; 92};
93 93
94static int __devinit ad5930_probe(struct spi_device *spi) 94static int ad5930_probe(struct spi_device *spi)
95{ 95{
96 struct ad5930_state *st; 96 struct ad5930_state *st;
97 struct iio_dev *idev; 97 struct iio_dev *idev;
@@ -127,7 +127,7 @@ error_ret:
127 return ret; 127 return ret;
128} 128}
129 129
130static int __devexit ad5930_remove(struct spi_device *spi) 130static int ad5930_remove(struct spi_device *spi)
131{ 131{
132 iio_device_unregister(spi_get_drvdata(spi)); 132 iio_device_unregister(spi_get_drvdata(spi));
133 iio_device_free(spi_get_drvdata(spi)); 133 iio_device_free(spi_get_drvdata(spi));
@@ -141,7 +141,7 @@ static struct spi_driver ad5930_driver = {
141 .owner = THIS_MODULE, 141 .owner = THIS_MODULE,
142 }, 142 },
143 .probe = ad5930_probe, 143 .probe = ad5930_probe,
144 .remove = __devexit_p(ad5930_remove), 144 .remove = ad5930_remove,
145}; 145};
146module_spi_driver(ad5930_driver); 146module_spi_driver(ad5930_driver);
147 147
diff --git a/drivers/staging/iio/frequency/ad9832.c b/drivers/staging/iio/frequency/ad9832.c
index fed39404e34a..4e18380c5141 100644
--- a/drivers/staging/iio/frequency/ad9832.c
+++ b/drivers/staging/iio/frequency/ad9832.c
@@ -201,7 +201,7 @@ static const struct iio_info ad9832_info = {
201 .driver_module = THIS_MODULE, 201 .driver_module = THIS_MODULE,
202}; 202};
203 203
204static int __devinit ad9832_probe(struct spi_device *spi) 204static int ad9832_probe(struct spi_device *spi)
205{ 205{
206 struct ad9832_platform_data *pdata = spi->dev.platform_data; 206 struct ad9832_platform_data *pdata = spi->dev.platform_data;
207 struct iio_dev *indio_dev; 207 struct iio_dev *indio_dev;
@@ -324,7 +324,7 @@ error_put_reg:
324 return ret; 324 return ret;
325} 325}
326 326
327static int __devexit ad9832_remove(struct spi_device *spi) 327static int ad9832_remove(struct spi_device *spi)
328{ 328{
329 struct iio_dev *indio_dev = spi_get_drvdata(spi); 329 struct iio_dev *indio_dev = spi_get_drvdata(spi);
330 struct ad9832_state *st = iio_priv(indio_dev); 330 struct ad9832_state *st = iio_priv(indio_dev);
@@ -352,7 +352,7 @@ static struct spi_driver ad9832_driver = {
352 .owner = THIS_MODULE, 352 .owner = THIS_MODULE,
353 }, 353 },
354 .probe = ad9832_probe, 354 .probe = ad9832_probe,
355 .remove = __devexit_p(ad9832_remove), 355 .remove = ad9832_remove,
356 .id_table = ad9832_id, 356 .id_table = ad9832_id,
357}; 357};
358module_spi_driver(ad9832_driver); 358module_spi_driver(ad9832_driver);
diff --git a/drivers/staging/iio/frequency/ad9834.c b/drivers/staging/iio/frequency/ad9834.c
index 1b2dc741d2ce..5cba3c01f417 100644
--- a/drivers/staging/iio/frequency/ad9834.c
+++ b/drivers/staging/iio/frequency/ad9834.c
@@ -314,7 +314,7 @@ static const struct iio_info ad9833_info = {
314 .driver_module = THIS_MODULE, 314 .driver_module = THIS_MODULE,
315}; 315};
316 316
317static int __devinit ad9834_probe(struct spi_device *spi) 317static int ad9834_probe(struct spi_device *spi)
318{ 318{
319 struct ad9834_platform_data *pdata = spi->dev.platform_data; 319 struct ad9834_platform_data *pdata = spi->dev.platform_data;
320 struct ad9834_state *st; 320 struct ad9834_state *st;
@@ -424,7 +424,7 @@ error_put_reg:
424 return ret; 424 return ret;
425} 425}
426 426
427static int __devexit ad9834_remove(struct spi_device *spi) 427static int ad9834_remove(struct spi_device *spi)
428{ 428{
429 struct iio_dev *indio_dev = spi_get_drvdata(spi); 429 struct iio_dev *indio_dev = spi_get_drvdata(spi);
430 struct ad9834_state *st = iio_priv(indio_dev); 430 struct ad9834_state *st = iio_priv(indio_dev);
@@ -454,7 +454,7 @@ static struct spi_driver ad9834_driver = {
454 .owner = THIS_MODULE, 454 .owner = THIS_MODULE,
455 }, 455 },
456 .probe = ad9834_probe, 456 .probe = ad9834_probe,
457 .remove = __devexit_p(ad9834_remove), 457 .remove = ad9834_remove,
458 .id_table = ad9834_id, 458 .id_table = ad9834_id,
459}; 459};
460module_spi_driver(ad9834_driver); 460module_spi_driver(ad9834_driver);
diff --git a/drivers/staging/iio/frequency/ad9850.c b/drivers/staging/iio/frequency/ad9850.c
index 74abee054ac0..104f7a4905a3 100644
--- a/drivers/staging/iio/frequency/ad9850.c
+++ b/drivers/staging/iio/frequency/ad9850.c
@@ -77,7 +77,7 @@ static const struct iio_info ad9850_info = {
77 .driver_module = THIS_MODULE, 77 .driver_module = THIS_MODULE,
78}; 78};
79 79
80static int __devinit ad9850_probe(struct spi_device *spi) 80static int ad9850_probe(struct spi_device *spi)
81{ 81{
82 struct ad9850_state *st; 82 struct ad9850_state *st;
83 struct iio_dev *idev; 83 struct iio_dev *idev;
@@ -113,7 +113,7 @@ error_ret:
113 return ret; 113 return ret;
114} 114}
115 115
116static int __devexit ad9850_remove(struct spi_device *spi) 116static int ad9850_remove(struct spi_device *spi)
117{ 117{
118 iio_device_unregister(spi_get_drvdata(spi)); 118 iio_device_unregister(spi_get_drvdata(spi));
119 iio_device_free(spi_get_drvdata(spi)); 119 iio_device_free(spi_get_drvdata(spi));
@@ -127,7 +127,7 @@ static struct spi_driver ad9850_driver = {
127 .owner = THIS_MODULE, 127 .owner = THIS_MODULE,
128 }, 128 },
129 .probe = ad9850_probe, 129 .probe = ad9850_probe,
130 .remove = __devexit_p(ad9850_remove), 130 .remove = ad9850_remove,
131}; 131};
132module_spi_driver(ad9850_driver); 132module_spi_driver(ad9850_driver);
133 133
diff --git a/drivers/staging/iio/frequency/ad9852.c b/drivers/staging/iio/frequency/ad9852.c
index fd9d14a413a5..17ac825b3d26 100644
--- a/drivers/staging/iio/frequency/ad9852.c
+++ b/drivers/staging/iio/frequency/ad9852.c
@@ -226,7 +226,7 @@ static const struct iio_info ad9852_info = {
226 .driver_module = THIS_MODULE, 226 .driver_module = THIS_MODULE,
227}; 227};
228 228
229static int __devinit ad9852_probe(struct spi_device *spi) 229static int ad9852_probe(struct spi_device *spi)
230{ 230{
231 struct ad9852_state *st; 231 struct ad9852_state *st;
232 struct iio_dev *idev; 232 struct iio_dev *idev;
@@ -264,7 +264,7 @@ error_ret:
264 return ret; 264 return ret;
265} 265}
266 266
267static int __devexit ad9852_remove(struct spi_device *spi) 267static int ad9852_remove(struct spi_device *spi)
268{ 268{
269 iio_device_unregister(spi_get_drvdata(spi)); 269 iio_device_unregister(spi_get_drvdata(spi));
270 iio_device_free(spi_get_drvdata(spi)); 270 iio_device_free(spi_get_drvdata(spi));
@@ -278,7 +278,7 @@ static struct spi_driver ad9852_driver = {
278 .owner = THIS_MODULE, 278 .owner = THIS_MODULE,
279 }, 279 },
280 .probe = ad9852_probe, 280 .probe = ad9852_probe,
281 .remove = __devexit_p(ad9852_remove), 281 .remove = ad9852_remove,
282}; 282};
283module_spi_driver(ad9852_driver); 283module_spi_driver(ad9852_driver);
284 284
diff --git a/drivers/staging/iio/frequency/ad9910.c b/drivers/staging/iio/frequency/ad9910.c
index 5a7ba305b75a..e48f874c1fc2 100644
--- a/drivers/staging/iio/frequency/ad9910.c
+++ b/drivers/staging/iio/frequency/ad9910.c
@@ -361,7 +361,7 @@ static const struct iio_info ad9910_info = {
361 .driver_module = THIS_MODULE, 361 .driver_module = THIS_MODULE,
362}; 362};
363 363
364static int __devinit ad9910_probe(struct spi_device *spi) 364static int ad9910_probe(struct spi_device *spi)
365{ 365{
366 struct ad9910_state *st; 366 struct ad9910_state *st;
367 struct iio_dev *idev; 367 struct iio_dev *idev;
@@ -397,7 +397,7 @@ error_ret:
397 return ret; 397 return ret;
398} 398}
399 399
400static int __devexit ad9910_remove(struct spi_device *spi) 400static int ad9910_remove(struct spi_device *spi)
401{ 401{
402 iio_device_unregister(spi_get_drvdata(spi)); 402 iio_device_unregister(spi_get_drvdata(spi));
403 iio_device_free(spi_get_drvdata(spi)); 403 iio_device_free(spi_get_drvdata(spi));
@@ -411,7 +411,7 @@ static struct spi_driver ad9910_driver = {
411 .owner = THIS_MODULE, 411 .owner = THIS_MODULE,
412 }, 412 },
413 .probe = ad9910_probe, 413 .probe = ad9910_probe,
414 .remove = __devexit_p(ad9910_remove), 414 .remove = ad9910_remove,
415}; 415};
416module_spi_driver(ad9910_driver); 416module_spi_driver(ad9910_driver);
417 417
diff --git a/drivers/staging/iio/frequency/ad9951.c b/drivers/staging/iio/frequency/ad9951.c
index ba6f49ff09ae..8234e3c915c4 100644
--- a/drivers/staging/iio/frequency/ad9951.c
+++ b/drivers/staging/iio/frequency/ad9951.c
@@ -170,7 +170,7 @@ static const struct iio_info ad9951_info = {
170 .driver_module = THIS_MODULE, 170 .driver_module = THIS_MODULE,
171}; 171};
172 172
173static int __devinit ad9951_probe(struct spi_device *spi) 173static int ad9951_probe(struct spi_device *spi)
174{ 174{
175 struct ad9951_state *st; 175 struct ad9951_state *st;
176 struct iio_dev *idev; 176 struct iio_dev *idev;
@@ -208,7 +208,7 @@ error_ret:
208 return ret; 208 return ret;
209} 209}
210 210
211static int __devexit ad9951_remove(struct spi_device *spi) 211static int ad9951_remove(struct spi_device *spi)
212{ 212{
213 iio_device_unregister(spi_get_drvdata(spi)); 213 iio_device_unregister(spi_get_drvdata(spi));
214 iio_device_free(spi_get_drvdata(spi)); 214 iio_device_free(spi_get_drvdata(spi));
@@ -222,7 +222,7 @@ static struct spi_driver ad9951_driver = {
222 .owner = THIS_MODULE, 222 .owner = THIS_MODULE,
223 }, 223 },
224 .probe = ad9951_probe, 224 .probe = ad9951_probe,
225 .remove = __devexit_p(ad9951_remove), 225 .remove = ad9951_remove,
226}; 226};
227module_spi_driver(ad9951_driver); 227module_spi_driver(ad9951_driver);
228 228
diff --git a/drivers/staging/iio/gyro/Makefile b/drivers/staging/iio/gyro/Makefile
index 9ba5ec151705..1303569e5c8a 100644
--- a/drivers/staging/iio/gyro/Makefile
+++ b/drivers/staging/iio/gyro/Makefile
@@ -12,7 +12,6 @@ adis16130-y := adis16130_core.o
12obj-$(CONFIG_ADIS16130) += adis16130.o 12obj-$(CONFIG_ADIS16130) += adis16130.o
13 13
14adis16260-y := adis16260_core.o 14adis16260-y := adis16260_core.o
15adis16260-$(CONFIG_IIO_BUFFER) += adis16260_ring.o adis16260_trigger.o
16obj-$(CONFIG_ADIS16260) += adis16260.o 15obj-$(CONFIG_ADIS16260) += adis16260.o
17 16
18adis16251-y := adis16251_core.o 17adis16251-y := adis16251_core.o
diff --git a/drivers/staging/iio/gyro/adis16060_core.c b/drivers/staging/iio/gyro/adis16060_core.c
index 87151a7cff04..687c151f9847 100644
--- a/drivers/staging/iio/gyro/adis16060_core.c
+++ b/drivers/staging/iio/gyro/adis16060_core.c
@@ -145,7 +145,7 @@ static const struct iio_chan_spec adis16060_channels[] = {
145 } 145 }
146}; 146};
147 147
148static int __devinit adis16060_r_probe(struct spi_device *spi) 148static int adis16060_r_probe(struct spi_device *spi)
149{ 149{
150 int ret; 150 int ret;
151 struct adis16060_state *st; 151 struct adis16060_state *st;
@@ -184,7 +184,7 @@ error_ret:
184} 184}
185 185
186/* fixme, confirm ordering in this function */ 186/* fixme, confirm ordering in this function */
187static int __devexit adis16060_r_remove(struct spi_device *spi) 187static int adis16060_r_remove(struct spi_device *spi)
188{ 188{
189 iio_device_unregister(spi_get_drvdata(spi)); 189 iio_device_unregister(spi_get_drvdata(spi));
190 iio_device_free(spi_get_drvdata(spi)); 190 iio_device_free(spi_get_drvdata(spi));
@@ -192,7 +192,7 @@ static int __devexit adis16060_r_remove(struct spi_device *spi)
192 return 0; 192 return 0;
193} 193}
194 194
195static int __devinit adis16060_w_probe(struct spi_device *spi) 195static int adis16060_w_probe(struct spi_device *spi)
196{ 196{
197 int ret; 197 int ret;
198 struct iio_dev *indio_dev = adis16060_iio_dev; 198 struct iio_dev *indio_dev = adis16060_iio_dev;
@@ -210,7 +210,7 @@ error_ret:
210 return ret; 210 return ret;
211} 211}
212 212
213static int __devexit adis16060_w_remove(struct spi_device *spi) 213static int adis16060_w_remove(struct spi_device *spi)
214{ 214{
215 return 0; 215 return 0;
216} 216}
@@ -221,7 +221,7 @@ static struct spi_driver adis16060_r_driver = {
221 .owner = THIS_MODULE, 221 .owner = THIS_MODULE,
222 }, 222 },
223 .probe = adis16060_r_probe, 223 .probe = adis16060_r_probe,
224 .remove = __devexit_p(adis16060_r_remove), 224 .remove = adis16060_r_remove,
225}; 225};
226 226
227static struct spi_driver adis16060_w_driver = { 227static struct spi_driver adis16060_w_driver = {
@@ -230,7 +230,7 @@ static struct spi_driver adis16060_w_driver = {
230 .owner = THIS_MODULE, 230 .owner = THIS_MODULE,
231 }, 231 },
232 .probe = adis16060_w_probe, 232 .probe = adis16060_w_probe,
233 .remove = __devexit_p(adis16060_w_remove), 233 .remove = adis16060_w_remove,
234}; 234};
235 235
236static __init int adis16060_init(void) 236static __init int adis16060_init(void)
diff --git a/drivers/staging/iio/gyro/adis16080_core.c b/drivers/staging/iio/gyro/adis16080_core.c
index a73902573f79..3525a68d6a75 100644
--- a/drivers/staging/iio/gyro/adis16080_core.c
+++ b/drivers/staging/iio/gyro/adis16080_core.c
@@ -138,7 +138,7 @@ static const struct iio_info adis16080_info = {
138 .driver_module = THIS_MODULE, 138 .driver_module = THIS_MODULE,
139}; 139};
140 140
141static int __devinit adis16080_probe(struct spi_device *spi) 141static int adis16080_probe(struct spi_device *spi)
142{ 142{
143 int ret; 143 int ret;
144 struct adis16080_state *st; 144 struct adis16080_state *st;
@@ -177,7 +177,7 @@ error_ret:
177} 177}
178 178
179/* fixme, confirm ordering in this function */ 179/* fixme, confirm ordering in this function */
180static int __devexit adis16080_remove(struct spi_device *spi) 180static int adis16080_remove(struct spi_device *spi)
181{ 181{
182 iio_device_unregister(spi_get_drvdata(spi)); 182 iio_device_unregister(spi_get_drvdata(spi));
183 iio_device_free(spi_get_drvdata(spi)); 183 iio_device_free(spi_get_drvdata(spi));
@@ -191,7 +191,7 @@ static struct spi_driver adis16080_driver = {
191 .owner = THIS_MODULE, 191 .owner = THIS_MODULE,
192 }, 192 },
193 .probe = adis16080_probe, 193 .probe = adis16080_probe,
194 .remove = __devexit_p(adis16080_remove), 194 .remove = adis16080_remove,
195}; 195};
196module_spi_driver(adis16080_driver); 196module_spi_driver(adis16080_driver);
197 197
diff --git a/drivers/staging/iio/gyro/adis16130_core.c b/drivers/staging/iio/gyro/adis16130_core.c
index fbf96b0b6ee8..835801ee7e80 100644
--- a/drivers/staging/iio/gyro/adis16130_core.c
+++ b/drivers/staging/iio/gyro/adis16130_core.c
@@ -116,7 +116,7 @@ static const struct iio_info adis16130_info = {
116 .driver_module = THIS_MODULE, 116 .driver_module = THIS_MODULE,
117}; 117};
118 118
119static int __devinit adis16130_probe(struct spi_device *spi) 119static int adis16130_probe(struct spi_device *spi)
120{ 120{
121 int ret; 121 int ret;
122 struct adis16130_state *st; 122 struct adis16130_state *st;
@@ -154,7 +154,7 @@ error_ret:
154} 154}
155 155
156/* fixme, confirm ordering in this function */ 156/* fixme, confirm ordering in this function */
157static int __devexit adis16130_remove(struct spi_device *spi) 157static int adis16130_remove(struct spi_device *spi)
158{ 158{
159 iio_device_unregister(spi_get_drvdata(spi)); 159 iio_device_unregister(spi_get_drvdata(spi));
160 iio_device_free(spi_get_drvdata(spi)); 160 iio_device_free(spi_get_drvdata(spi));
@@ -168,7 +168,7 @@ static struct spi_driver adis16130_driver = {
168 .owner = THIS_MODULE, 168 .owner = THIS_MODULE,
169 }, 169 },
170 .probe = adis16130_probe, 170 .probe = adis16130_probe,
171 .remove = __devexit_p(adis16130_remove), 171 .remove = adis16130_remove,
172}; 172};
173module_spi_driver(adis16130_driver); 173module_spi_driver(adis16130_driver);
174 174
diff --git a/drivers/staging/iio/gyro/adis16260.h b/drivers/staging/iio/gyro/adis16260.h
index 4c4b25129c6c..df3c0b7e954a 100644
--- a/drivers/staging/iio/gyro/adis16260.h
+++ b/drivers/staging/iio/gyro/adis16260.h
@@ -1,12 +1,11 @@
1#ifndef SPI_ADIS16260_H_ 1#ifndef SPI_ADIS16260_H_
2#define SPI_ADIS16260_H_ 2#define SPI_ADIS16260_H_
3
3#include "adis16260_platform_data.h" 4#include "adis16260_platform_data.h"
5#include <linux/iio/imu/adis.h>
4 6
5#define ADIS16260_STARTUP_DELAY 220 /* ms */ 7#define ADIS16260_STARTUP_DELAY 220 /* ms */
6 8
7#define ADIS16260_READ_REG(a) a
8#define ADIS16260_WRITE_REG(a) ((a) | 0x80)
9
10#define ADIS16260_FLASH_CNT 0x00 /* Flash memory write count */ 9#define ADIS16260_FLASH_CNT 0x00 /* Flash memory write count */
11#define ADIS16260_SUPPLY_OUT 0x02 /* Power supply measurement */ 10#define ADIS16260_SUPPLY_OUT 0x02 /* Power supply measurement */
12#define ADIS16260_GYRO_OUT 0x04 /* X-axis gyroscope output */ 11#define ADIS16260_GYRO_OUT 0x04 /* X-axis gyroscope output */
@@ -34,8 +33,6 @@
34 * convert to decimal = 16,265/16,260 */ 33 * convert to decimal = 16,265/16,260 */
35#define ADIS16260_SERIAL_NUM 0x58 /* Serial number */ 34#define ADIS16260_SERIAL_NUM 0x58 /* Serial number */
36 35
37#define ADIS16260_OUTPUTS 5
38
39#define ADIS16260_ERROR_ACTIVE (1<<14) 36#define ADIS16260_ERROR_ACTIVE (1<<14)
40#define ADIS16260_NEW_DATA (1<<15) 37#define ADIS16260_NEW_DATA (1<<15)
41 38
@@ -60,13 +57,13 @@
60/* DIAG_STAT */ 57/* DIAG_STAT */
61#define ADIS16260_DIAG_STAT_ALARM2 (1<<9) 58#define ADIS16260_DIAG_STAT_ALARM2 (1<<9)
62#define ADIS16260_DIAG_STAT_ALARM1 (1<<8) 59#define ADIS16260_DIAG_STAT_ALARM1 (1<<8)
63#define ADIS16260_DIAG_STAT_FLASH_CHK (1<<6) 60#define ADIS16260_DIAG_STAT_FLASH_CHK_BIT 6
64#define ADIS16260_DIAG_STAT_SELF_TEST (1<<5) 61#define ADIS16260_DIAG_STAT_SELF_TEST_BIT 5
65#define ADIS16260_DIAG_STAT_OVERFLOW (1<<4) 62#define ADIS16260_DIAG_STAT_OVERFLOW_BIT 4
66#define ADIS16260_DIAG_STAT_SPI_FAIL (1<<3) 63#define ADIS16260_DIAG_STAT_SPI_FAIL_BIT 3
67#define ADIS16260_DIAG_STAT_FLASH_UPT (1<<2) 64#define ADIS16260_DIAG_STAT_FLASH_UPT_BIT 2
68#define ADIS16260_DIAG_STAT_POWER_HIGH (1<<1) 65#define ADIS16260_DIAG_STAT_POWER_HIGH_BIT 1
69#define ADIS16260_DIAG_STAT_POWER_LOW (1<<0) 66#define ADIS16260_DIAG_STAT_POWER_LOW_BIT 0
70 67
71/* GLOB_CMD */ 68/* GLOB_CMD */
72#define ADIS16260_GLOB_CMD_SW_RESET (1<<7) 69#define ADIS16260_GLOB_CMD_SW_RESET (1<<7)
@@ -75,82 +72,27 @@
75#define ADIS16260_GLOB_CMD_FAC_CALIB (1<<1) 72#define ADIS16260_GLOB_CMD_FAC_CALIB (1<<1)
76#define ADIS16260_GLOB_CMD_AUTO_NULL (1<<0) 73#define ADIS16260_GLOB_CMD_AUTO_NULL (1<<0)
77 74
78#define ADIS16260_MAX_TX 24
79#define ADIS16260_MAX_RX 24
80
81#define ADIS16260_SPI_SLOW (u32)(300 * 1000) 75#define ADIS16260_SPI_SLOW (u32)(300 * 1000)
82#define ADIS16260_SPI_BURST (u32)(1000 * 1000) 76#define ADIS16260_SPI_BURST (u32)(1000 * 1000)
83#define ADIS16260_SPI_FAST (u32)(2000 * 1000) 77#define ADIS16260_SPI_FAST (u32)(2000 * 1000)
84 78
85/** 79/**
86 * struct adis16260_state - device instance specific data 80 * struct adis16260_state - device instance specific data
87 * @us: actual spi_device
88 * @trig: data ready trigger registered with iio
89 * @buf_lock: mutex to protect tx and rx
90 * @negate: negate the scale parameter 81 * @negate: negate the scale parameter
91 * @tx: transmit buffer
92 * @rx: receive buffer
93 **/ 82 **/
94struct adis16260_state { 83struct adis16260_state {
95 struct spi_device *us; 84 unsigned negate:1;
96 struct iio_trigger *trig; 85 struct adis adis;
97 struct mutex buf_lock;
98 unsigned negate:1;
99 u8 tx[ADIS16260_MAX_TX] ____cacheline_aligned;
100 u8 rx[ADIS16260_MAX_RX];
101}; 86};
102 87
103int adis16260_set_irq(struct iio_dev *indio_dev, bool enable);
104
105/* At the moment triggers are only used for ring buffer 88/* At the moment triggers are only used for ring buffer
106 * filling. This may change! 89 * filling. This may change!
107 */ 90 */
108 91
109#define ADIS16260_SCAN_SUPPLY 0 92#define ADIS16260_SCAN_GYRO 0
110#define ADIS16260_SCAN_GYRO 1 93#define ADIS16260_SCAN_SUPPLY 1
111#define ADIS16260_SCAN_AUX_ADC 2 94#define ADIS16260_SCAN_AUX_ADC 2
112#define ADIS16260_SCAN_TEMP 3 95#define ADIS16260_SCAN_TEMP 3
113#define ADIS16260_SCAN_ANGL 4 96#define ADIS16260_SCAN_ANGL 4
114 97
115#ifdef CONFIG_IIO_BUFFER
116void adis16260_remove_trigger(struct iio_dev *indio_dev);
117int adis16260_probe_trigger(struct iio_dev *indio_dev);
118
119ssize_t adis16260_read_data_from_ring(struct device *dev,
120 struct device_attribute *attr,
121 char *buf);
122
123
124int adis16260_configure_ring(struct iio_dev *indio_dev);
125void adis16260_unconfigure_ring(struct iio_dev *indio_dev);
126
127#else /* CONFIG_IIO_BUFFER */
128
129static inline void adis16260_remove_trigger(struct iio_dev *indio_dev)
130{
131}
132
133static inline int adis16260_probe_trigger(struct iio_dev *indio_dev)
134{
135 return 0;
136}
137
138static inline ssize_t
139adis16260_read_data_from_ring(struct device *dev,
140 struct device_attribute *attr,
141 char *buf)
142{
143 return 0;
144}
145
146static int adis16260_configure_ring(struct iio_dev *indio_dev)
147{
148 return 0;
149}
150
151static inline void adis16260_unconfigure_ring(struct iio_dev *indio_dev)
152{
153}
154
155#endif /* CONFIG_IIO_BUFFER */
156#endif /* SPI_ADIS16260_H_ */ 98#endif /* SPI_ADIS16260_H_ */
diff --git a/drivers/staging/iio/gyro/adis16260_core.c b/drivers/staging/iio/gyro/adis16260_core.c
index aa964a2d8290..6e80b8c768ae 100644
--- a/drivers/staging/iio/gyro/adis16260_core.c
+++ b/drivers/staging/iio/gyro/adis16260_core.c
@@ -24,134 +24,13 @@
24 24
25#include "adis16260.h" 25#include "adis16260.h"
26 26
27#define DRIVER_NAME "adis16260"
28
29static int adis16260_check_status(struct iio_dev *indio_dev);
30
31/**
32 * adis16260_spi_write_reg_8() - write single byte to a register
33 * @indio_dev: iio_dev for the device
34 * @reg_address: the address of the register to be written
35 * @val: the value to write
36 **/
37static int adis16260_spi_write_reg_8(struct iio_dev *indio_dev,
38 u8 reg_address,
39 u8 val)
40{
41 int ret;
42 struct adis16260_state *st = iio_priv(indio_dev);
43
44 mutex_lock(&st->buf_lock);
45 st->tx[0] = ADIS16260_WRITE_REG(reg_address);
46 st->tx[1] = val;
47
48 ret = spi_write(st->us, st->tx, 2);
49 mutex_unlock(&st->buf_lock);
50
51 return ret;
52}
53
54/**
55 * adis16260_spi_write_reg_16() - write 2 bytes to a pair of registers
56 * @indio_dev: iio_dev for the device
57 * @reg_address: the address of the lower of the two registers. Second register
58 * is assumed to have address one greater.
59 * @val: value to be written
60 **/
61static int adis16260_spi_write_reg_16(struct iio_dev *indio_dev,
62 u8 lower_reg_address,
63 u16 value)
64{
65 int ret;
66 struct spi_message msg;
67 struct adis16260_state *st = iio_priv(indio_dev);
68 struct spi_transfer xfers[] = {
69 {
70 .tx_buf = st->tx,
71 .bits_per_word = 8,
72 .len = 2,
73 .cs_change = 1,
74 .delay_usecs = 20,
75 }, {
76 .tx_buf = st->tx + 2,
77 .bits_per_word = 8,
78 .len = 2,
79 .delay_usecs = 20,
80 },
81 };
82
83 mutex_lock(&st->buf_lock);
84 st->tx[0] = ADIS16260_WRITE_REG(lower_reg_address);
85 st->tx[1] = value & 0xFF;
86 st->tx[2] = ADIS16260_WRITE_REG(lower_reg_address + 1);
87 st->tx[3] = (value >> 8) & 0xFF;
88
89 spi_message_init(&msg);
90 spi_message_add_tail(&xfers[0], &msg);
91 spi_message_add_tail(&xfers[1], &msg);
92 ret = spi_sync(st->us, &msg);
93 mutex_unlock(&st->buf_lock);
94
95 return ret;
96}
97
98/**
99 * adis16260_spi_read_reg_16() - read 2 bytes from a 16-bit register
100 * @indio_dev: iio_dev for the device
101 * @reg_address: the address of the lower of the two registers. Second register
102 * is assumed to have address one greater.
103 * @val: somewhere to pass back the value read
104 **/
105static int adis16260_spi_read_reg_16(struct iio_dev *indio_dev,
106 u8 lower_reg_address,
107 u16 *val)
108{
109 struct spi_message msg;
110 struct adis16260_state *st = iio_priv(indio_dev);
111 int ret;
112 struct spi_transfer xfers[] = {
113 {
114 .tx_buf = st->tx,
115 .bits_per_word = 8,
116 .len = 2,
117 .cs_change = 1,
118 .delay_usecs = 30,
119 }, {
120 .rx_buf = st->rx,
121 .bits_per_word = 8,
122 .len = 2,
123 .delay_usecs = 30,
124 },
125 };
126
127 mutex_lock(&st->buf_lock);
128 st->tx[0] = ADIS16260_READ_REG(lower_reg_address);
129 st->tx[1] = 0;
130
131 spi_message_init(&msg);
132 spi_message_add_tail(&xfers[0], &msg);
133 spi_message_add_tail(&xfers[1], &msg);
134 ret = spi_sync(st->us, &msg);
135 if (ret) {
136 dev_err(&st->us->dev,
137 "problem when reading 16 bit register 0x%02X",
138 lower_reg_address);
139 goto error_ret;
140 }
141 *val = (st->rx[0] << 8) | st->rx[1];
142
143error_ret:
144 mutex_unlock(&st->buf_lock);
145 return ret;
146}
147
148static ssize_t adis16260_read_frequency_available(struct device *dev, 27static ssize_t adis16260_read_frequency_available(struct device *dev,
149 struct device_attribute *attr, 28 struct device_attribute *attr,
150 char *buf) 29 char *buf)
151{ 30{
152 struct iio_dev *indio_dev = dev_to_iio_dev(dev); 31 struct iio_dev *indio_dev = dev_to_iio_dev(dev);
153 struct adis16260_state *st = iio_priv(indio_dev); 32 struct adis16260_state *st = iio_priv(indio_dev);
154 if (spi_get_device_id(st->us)->driver_data) 33 if (spi_get_device_id(st->adis.spi)->driver_data)
155 return sprintf(buf, "%s\n", "0.129 ~ 256"); 34 return sprintf(buf, "%s\n", "0.129 ~ 256");
156 else 35 else
157 return sprintf(buf, "%s\n", "256 2048"); 36 return sprintf(buf, "%s\n", "256 2048");
@@ -166,13 +45,11 @@ static ssize_t adis16260_read_frequency(struct device *dev,
166 int ret, len = 0; 45 int ret, len = 0;
167 u16 t; 46 u16 t;
168 int sps; 47 int sps;
169 ret = adis16260_spi_read_reg_16(indio_dev, 48 ret = adis_read_reg_16(&st->adis, ADIS16260_SMPL_PRD, &t);
170 ADIS16260_SMPL_PRD,
171 &t);
172 if (ret) 49 if (ret)
173 return ret; 50 return ret;
174 51
175 if (spi_get_device_id(st->us)->driver_data) /* If an adis16251 */ 52 if (spi_get_device_id(st->adis.spi)->driver_data) /* If an adis16251 */
176 sps = (t & ADIS16260_SMPL_PRD_TIME_BASE) ? 8 : 256; 53 sps = (t & ADIS16260_SMPL_PRD_TIME_BASE) ? 8 : 256;
177 else 54 else
178 sps = (t & ADIS16260_SMPL_PRD_TIME_BASE) ? 66 : 2048; 55 sps = (t & ADIS16260_SMPL_PRD_TIME_BASE) ? 66 : 2048;
@@ -199,7 +76,7 @@ static ssize_t adis16260_write_frequency(struct device *dev,
199 return -EINVAL; 76 return -EINVAL;
200 77
201 mutex_lock(&indio_dev->mlock); 78 mutex_lock(&indio_dev->mlock);
202 if (spi_get_device_id(st->us)) { 79 if (spi_get_device_id(st->adis.spi)->driver_data) {
203 t = (256 / val); 80 t = (256 / val);
204 if (t > 0) 81 if (t > 0)
205 t--; 82 t--;
@@ -211,10 +88,10 @@ static ssize_t adis16260_write_frequency(struct device *dev,
211 t &= ADIS16260_SMPL_PRD_DIV_MASK; 88 t &= ADIS16260_SMPL_PRD_DIV_MASK;
212 } 89 }
213 if ((t & ADIS16260_SMPL_PRD_DIV_MASK) >= 0x0A) 90 if ((t & ADIS16260_SMPL_PRD_DIV_MASK) >= 0x0A)
214 st->us->max_speed_hz = ADIS16260_SPI_SLOW; 91 st->adis.spi->max_speed_hz = ADIS16260_SPI_SLOW;
215 else 92 else
216 st->us->max_speed_hz = ADIS16260_SPI_FAST; 93 st->adis.spi->max_speed_hz = ADIS16260_SPI_FAST;
217 ret = adis16260_spi_write_reg_8(indio_dev, 94 ret = adis_write_reg_8(&st->adis,
218 ADIS16260_SMPL_PRD, 95 ADIS16260_SMPL_PRD,
219 t); 96 t);
220 97
@@ -223,140 +100,20 @@ static ssize_t adis16260_write_frequency(struct device *dev,
223 return ret ? ret : len; 100 return ret ? ret : len;
224} 101}
225 102
226static int adis16260_reset(struct iio_dev *indio_dev)
227{
228 int ret;
229 ret = adis16260_spi_write_reg_8(indio_dev,
230 ADIS16260_GLOB_CMD,
231 ADIS16260_GLOB_CMD_SW_RESET);
232 if (ret)
233 dev_err(&indio_dev->dev, "problem resetting device");
234
235 return ret;
236}
237
238int adis16260_set_irq(struct iio_dev *indio_dev, bool enable)
239{
240 int ret;
241 u16 msc;
242 ret = adis16260_spi_read_reg_16(indio_dev, ADIS16260_MSC_CTRL, &msc);
243 if (ret)
244 goto error_ret;
245
246 msc |= ADIS16260_MSC_CTRL_DATA_RDY_POL_HIGH;
247 if (enable)
248 msc |= ADIS16260_MSC_CTRL_DATA_RDY_EN;
249 else
250 msc &= ~ADIS16260_MSC_CTRL_DATA_RDY_EN;
251
252 ret = adis16260_spi_write_reg_16(indio_dev, ADIS16260_MSC_CTRL, msc);
253 if (ret)
254 goto error_ret;
255
256error_ret:
257 return ret;
258}
259
260/* Power down the device */ 103/* Power down the device */
261static int adis16260_stop_device(struct iio_dev *indio_dev) 104static int adis16260_stop_device(struct iio_dev *indio_dev)
262{ 105{
106 struct adis16260_state *st = iio_priv(indio_dev);
263 int ret; 107 int ret;
264 u16 val = ADIS16260_SLP_CNT_POWER_OFF; 108 u16 val = ADIS16260_SLP_CNT_POWER_OFF;
265 109
266 ret = adis16260_spi_write_reg_16(indio_dev, ADIS16260_SLP_CNT, val); 110 ret = adis_write_reg_16(&st->adis, ADIS16260_SLP_CNT, val);
267 if (ret) 111 if (ret)
268 dev_err(&indio_dev->dev, "problem with turning device off: SLP_CNT"); 112 dev_err(&indio_dev->dev, "problem with turning device off: SLP_CNT");
269 113
270 return ret; 114 return ret;
271} 115}
272 116
273static int adis16260_self_test(struct iio_dev *indio_dev)
274{
275 int ret;
276 ret = adis16260_spi_write_reg_16(indio_dev,
277 ADIS16260_MSC_CTRL,
278 ADIS16260_MSC_CTRL_MEM_TEST);
279 if (ret) {
280 dev_err(&indio_dev->dev, "problem starting self test");
281 goto err_ret;
282 }
283
284 adis16260_check_status(indio_dev);
285
286err_ret:
287 return ret;
288}
289
290static int adis16260_check_status(struct iio_dev *indio_dev)
291{
292 u16 status;
293 int ret;
294 struct device *dev = &indio_dev->dev;
295
296 ret = adis16260_spi_read_reg_16(indio_dev,
297 ADIS16260_DIAG_STAT,
298 &status);
299
300 if (ret < 0) {
301 dev_err(dev, "Reading status failed\n");
302 goto error_ret;
303 }
304 ret = status & 0x7F;
305 if (status & ADIS16260_DIAG_STAT_FLASH_CHK)
306 dev_err(dev, "Flash checksum error\n");
307 if (status & ADIS16260_DIAG_STAT_SELF_TEST)
308 dev_err(dev, "Self test error\n");
309 if (status & ADIS16260_DIAG_STAT_OVERFLOW)
310 dev_err(dev, "Sensor overrange\n");
311 if (status & ADIS16260_DIAG_STAT_SPI_FAIL)
312 dev_err(dev, "SPI failure\n");
313 if (status & ADIS16260_DIAG_STAT_FLASH_UPT)
314 dev_err(dev, "Flash update failed\n");
315 if (status & ADIS16260_DIAG_STAT_POWER_HIGH)
316 dev_err(dev, "Power supply above 5.25V\n");
317 if (status & ADIS16260_DIAG_STAT_POWER_LOW)
318 dev_err(dev, "Power supply below 4.75V\n");
319
320error_ret:
321 return ret;
322}
323
324static int adis16260_initial_setup(struct iio_dev *indio_dev)
325{
326 int ret;
327 struct device *dev = &indio_dev->dev;
328
329 /* Disable IRQ */
330 ret = adis16260_set_irq(indio_dev, false);
331 if (ret) {
332 dev_err(dev, "disable irq failed");
333 goto err_ret;
334 }
335
336 /* Do self test */
337 ret = adis16260_self_test(indio_dev);
338 if (ret) {
339 dev_err(dev, "self test failure");
340 goto err_ret;
341 }
342
343 /* Read status register to check the result */
344 ret = adis16260_check_status(indio_dev);
345 if (ret) {
346 adis16260_reset(indio_dev);
347 dev_err(dev, "device not playing ball -> reset");
348 msleep(ADIS16260_STARTUP_DELAY);
349 ret = adis16260_check_status(indio_dev);
350 if (ret) {
351 dev_err(dev, "giving up");
352 goto err_ret;
353 }
354 }
355
356err_ret:
357 return ret;
358}
359
360static IIO_DEV_ATTR_SAMP_FREQ(S_IWUSR | S_IRUGO, 117static IIO_DEV_ATTR_SAMP_FREQ(S_IWUSR | S_IRUGO,
361 adis16260_read_frequency, 118 adis16260_read_frequency,
362 adis16260_write_frequency); 119 adis16260_write_frequency);
@@ -364,100 +121,26 @@ static IIO_DEV_ATTR_SAMP_FREQ(S_IWUSR | S_IRUGO,
364static IIO_DEVICE_ATTR(sampling_frequency_available, 121static IIO_DEVICE_ATTR(sampling_frequency_available,
365 S_IRUGO, adis16260_read_frequency_available, NULL, 0); 122 S_IRUGO, adis16260_read_frequency_available, NULL, 0);
366 123
367enum adis16260_channel {
368 gyro,
369 temp,
370 in_supply,
371 in_aux,
372 angle,
373};
374#define ADIS16260_GYRO_CHANNEL_SET(axis, mod) \ 124#define ADIS16260_GYRO_CHANNEL_SET(axis, mod) \
375 struct iio_chan_spec adis16260_channels_##axis[] = { \ 125struct iio_chan_spec adis16260_channels_##axis[] = { \
376 { \ 126 ADIS_GYRO_CHAN(mod, ADIS16260_GYRO_OUT, ADIS16260_SCAN_GYRO, \
377 .type = IIO_ANGL_VEL, \ 127 IIO_CHAN_INFO_CALIBBIAS_SEPARATE_BIT | \
378 .modified = 1, \ 128 IIO_CHAN_INFO_CALIBSCALE_SEPARATE_BIT, 14), \
379 .channel2 = mod, \ 129 ADIS_INCLI_CHAN(mod, ADIS16260_ANGL_OUT, ADIS16260_SCAN_ANGL, 0, 14), \
380 .info_mask = IIO_CHAN_INFO_RAW_SEPARATE_BIT | \ 130 ADIS_TEMP_CHAN(ADIS16260_TEMP_OUT, ADIS16260_SCAN_TEMP, 12), \
381 IIO_CHAN_INFO_CALIBBIAS_SEPARATE_BIT | \ 131 ADIS_SUPPLY_CHAN(ADIS16260_SUPPLY_OUT, ADIS16260_SCAN_SUPPLY, 12), \
382 IIO_CHAN_INFO_CALIBSCALE_SEPARATE_BIT | \ 132 ADIS_AUX_ADC_CHAN(ADIS16260_AUX_ADC, ADIS16260_SCAN_AUX_ADC, 12), \
383 IIO_CHAN_INFO_SCALE_SEPARATE_BIT, \ 133 IIO_CHAN_SOFT_TIMESTAMP(5), \
384 .address = gyro, \ 134}
385 .scan_index = ADIS16260_SCAN_GYRO, \ 135
386 .scan_type = { \ 136static const ADIS16260_GYRO_CHANNEL_SET(x, X);
387 .sign = 's', \ 137static const ADIS16260_GYRO_CHANNEL_SET(y, Y);
388 .realbits = 14, \ 138static const ADIS16260_GYRO_CHANNEL_SET(z, Z);
389 .storagebits = 16, \
390 }, \
391 }, { \
392 .type = IIO_ANGL, \
393 .modified = 1, \
394 .channel2 = mod, \
395 .info_mask = IIO_CHAN_INFO_RAW_SEPARATE_BIT, \
396 .address = angle, \
397 .scan_index = ADIS16260_SCAN_ANGL, \
398 .scan_type = { \
399 .sign = 'u', \
400 .realbits = 14, \
401 .storagebits = 16, \
402 }, \
403 }, { \
404 .type = IIO_TEMP, \
405 .indexed = 1, \
406 .channel = 0, \
407 .info_mask = IIO_CHAN_INFO_RAW_SEPARATE_BIT | \
408 IIO_CHAN_INFO_OFFSET_SEPARATE_BIT | \
409 IIO_CHAN_INFO_SCALE_SEPARATE_BIT, \
410 .address = temp, \
411 .scan_index = ADIS16260_SCAN_TEMP, \
412 .scan_type = { \
413 .sign = 'u', \
414 .realbits = 12, \
415 .storagebits = 16, \
416 }, \
417 }, { \
418 .type = IIO_VOLTAGE, \
419 .indexed = 1, \
420 .channel = 0, \
421 .extend_name = "supply", \
422 .info_mask = IIO_CHAN_INFO_RAW_SEPARATE_BIT | \
423 IIO_CHAN_INFO_SCALE_SEPARATE_BIT, \
424 .address = in_supply, \
425 .scan_index = ADIS16260_SCAN_SUPPLY, \
426 .scan_type = { \
427 .sign = 'u', \
428 .realbits = 12, \
429 .storagebits = 16, \
430 }, \
431 }, { \
432 .type = IIO_VOLTAGE, \
433 .indexed = 1, \
434 .channel = 1, \
435 .info_mask = IIO_CHAN_INFO_RAW_SEPARATE_BIT | \
436 IIO_CHAN_INFO_SCALE_SEPARATE_BIT, \
437 .address = in_aux, \
438 .scan_index = ADIS16260_SCAN_AUX_ADC, \
439 .scan_type = { \
440 .sign = 'u', \
441 .realbits = 12, \
442 .storagebits = 16, \
443 }, \
444 }, \
445 IIO_CHAN_SOFT_TIMESTAMP(5), \
446 }
447 139
448static const ADIS16260_GYRO_CHANNEL_SET(x, IIO_MOD_X); 140static const u8 adis16260_addresses[][2] = {
449static const ADIS16260_GYRO_CHANNEL_SET(y, IIO_MOD_Y); 141 [ADIS16260_SCAN_GYRO] = { ADIS16260_GYRO_OFF, ADIS16260_GYRO_SCALE },
450static const ADIS16260_GYRO_CHANNEL_SET(z, IIO_MOD_Z);
451
452static const u8 adis16260_addresses[5][3] = {
453 [gyro] = { ADIS16260_GYRO_OUT,
454 ADIS16260_GYRO_OFF,
455 ADIS16260_GYRO_SCALE },
456 [angle] = { ADIS16260_ANGL_OUT },
457 [in_supply] = { ADIS16260_SUPPLY_OUT },
458 [in_aux] = { ADIS16260_AUX_ADC },
459 [temp] = { ADIS16260_TEMP_OUT },
460}; 142};
143
461static int adis16260_read_raw(struct iio_dev *indio_dev, 144static int adis16260_read_raw(struct iio_dev *indio_dev,
462 struct iio_chan_spec const *chan, 145 struct iio_chan_spec const *chan,
463 int *val, int *val2, 146 int *val, int *val2,
@@ -471,34 +154,13 @@ static int adis16260_read_raw(struct iio_dev *indio_dev,
471 154
472 switch (mask) { 155 switch (mask) {
473 case IIO_CHAN_INFO_RAW: 156 case IIO_CHAN_INFO_RAW:
474 mutex_lock(&indio_dev->mlock); 157 return adis_single_conversion(indio_dev, chan,
475 addr = adis16260_addresses[chan->address][0]; 158 ADIS16260_ERROR_ACTIVE, val);
476 ret = adis16260_spi_read_reg_16(indio_dev, addr, &val16);
477 if (ret) {
478 mutex_unlock(&indio_dev->mlock);
479 return ret;
480 }
481
482 if (val16 & ADIS16260_ERROR_ACTIVE) {
483 ret = adis16260_check_status(indio_dev);
484 if (ret) {
485 mutex_unlock(&indio_dev->mlock);
486 return ret;
487 }
488 }
489 val16 = val16 & ((1 << chan->scan_type.realbits) - 1);
490 if (chan->scan_type.sign == 's')
491 val16 = (s16)(val16 <<
492 (16 - chan->scan_type.realbits)) >>
493 (16 - chan->scan_type.realbits);
494 *val = val16;
495 mutex_unlock(&indio_dev->mlock);
496 return IIO_VAL_INT;
497 case IIO_CHAN_INFO_SCALE: 159 case IIO_CHAN_INFO_SCALE:
498 switch (chan->type) { 160 switch (chan->type) {
499 case IIO_ANGL_VEL: 161 case IIO_ANGL_VEL:
500 *val = 0; 162 *val = 0;
501 if (spi_get_device_id(st->us)->driver_data) { 163 if (spi_get_device_id(st->adis.spi)->driver_data) {
502 /* 0.01832 degree / sec */ 164 /* 0.01832 degree / sec */
503 *val2 = IIO_DEGREE_TO_RAD(18320); 165 *val2 = IIO_DEGREE_TO_RAD(18320);
504 } else { 166 } else {
@@ -533,10 +195,10 @@ static int adis16260_read_raw(struct iio_dev *indio_dev,
533 break; 195 break;
534 default: 196 default:
535 return -EINVAL; 197 return -EINVAL;
536 }; 198 }
537 mutex_lock(&indio_dev->mlock); 199 mutex_lock(&indio_dev->mlock);
538 addr = adis16260_addresses[chan->address][1]; 200 addr = adis16260_addresses[chan->scan_index][0];
539 ret = adis16260_spi_read_reg_16(indio_dev, addr, &val16); 201 ret = adis_read_reg_16(&st->adis, addr, &val16);
540 if (ret) { 202 if (ret) {
541 mutex_unlock(&indio_dev->mlock); 203 mutex_unlock(&indio_dev->mlock);
542 return ret; 204 return ret;
@@ -553,10 +215,10 @@ static int adis16260_read_raw(struct iio_dev *indio_dev,
553 break; 215 break;
554 default: 216 default:
555 return -EINVAL; 217 return -EINVAL;
556 }; 218 }
557 mutex_lock(&indio_dev->mlock); 219 mutex_lock(&indio_dev->mlock);
558 addr = adis16260_addresses[chan->address][2]; 220 addr = adis16260_addresses[chan->scan_index][1];
559 ret = adis16260_spi_read_reg_16(indio_dev, addr, &val16); 221 ret = adis_read_reg_16(&st->adis, addr, &val16);
560 if (ret) { 222 if (ret) {
561 mutex_unlock(&indio_dev->mlock); 223 mutex_unlock(&indio_dev->mlock);
562 return ret; 224 return ret;
@@ -574,18 +236,19 @@ static int adis16260_write_raw(struct iio_dev *indio_dev,
574 int val2, 236 int val2,
575 long mask) 237 long mask)
576{ 238{
239 struct adis16260_state *st = iio_priv(indio_dev);
577 int bits = 12; 240 int bits = 12;
578 s16 val16; 241 s16 val16;
579 u8 addr; 242 u8 addr;
580 switch (mask) { 243 switch (mask) {
581 case IIO_CHAN_INFO_CALIBBIAS: 244 case IIO_CHAN_INFO_CALIBBIAS:
582 val16 = val & ((1 << bits) - 1); 245 val16 = val & ((1 << bits) - 1);
583 addr = adis16260_addresses[chan->address][1]; 246 addr = adis16260_addresses[chan->scan_index][0];
584 return adis16260_spi_write_reg_16(indio_dev, addr, val16); 247 return adis_write_reg_16(&st->adis, addr, val16);
585 case IIO_CHAN_INFO_CALIBSCALE: 248 case IIO_CHAN_INFO_CALIBSCALE:
586 val16 = val & ((1 << bits) - 1); 249 val16 = val & ((1 << bits) - 1);
587 addr = adis16260_addresses[chan->address][2]; 250 addr = adis16260_addresses[chan->scan_index][1];
588 return adis16260_spi_write_reg_16(indio_dev, addr, val16); 251 return adis_write_reg_16(&st->adis, addr, val16);
589 } 252 }
590 return -EINVAL; 253 return -EINVAL;
591} 254}
@@ -604,10 +267,41 @@ static const struct iio_info adis16260_info = {
604 .attrs = &adis16260_attribute_group, 267 .attrs = &adis16260_attribute_group,
605 .read_raw = &adis16260_read_raw, 268 .read_raw = &adis16260_read_raw,
606 .write_raw = &adis16260_write_raw, 269 .write_raw = &adis16260_write_raw,
270 .update_scan_mode = adis_update_scan_mode,
607 .driver_module = THIS_MODULE, 271 .driver_module = THIS_MODULE,
608}; 272};
609 273
610static int __devinit adis16260_probe(struct spi_device *spi) 274static const char * const adis1620_status_error_msgs[] = {
275 [ADIS16260_DIAG_STAT_FLASH_CHK_BIT] = "Flash checksum error",
276 [ADIS16260_DIAG_STAT_SELF_TEST_BIT] = "Self test error",
277 [ADIS16260_DIAG_STAT_OVERFLOW_BIT] = "Sensor overrange",
278 [ADIS16260_DIAG_STAT_SPI_FAIL_BIT] = "SPI failure",
279 [ADIS16260_DIAG_STAT_FLASH_UPT_BIT] = "Flash update failed",
280 [ADIS16260_DIAG_STAT_POWER_HIGH_BIT] = "Power supply above 5.25",
281 [ADIS16260_DIAG_STAT_POWER_LOW_BIT] = "Power supply below 4.75",
282};
283
284static const struct adis_data adis16260_data = {
285 .write_delay = 30,
286 .read_delay = 30,
287 .msc_ctrl_reg = ADIS16260_MSC_CTRL,
288 .glob_cmd_reg = ADIS16260_GLOB_CMD,
289 .diag_stat_reg = ADIS16260_DIAG_STAT,
290
291 .self_test_mask = ADIS16260_MSC_CTRL_MEM_TEST,
292 .startup_delay = ADIS16260_STARTUP_DELAY,
293
294 .status_error_msgs = adis1620_status_error_msgs,
295 .status_error_mask = BIT(ADIS16260_DIAG_STAT_FLASH_CHK_BIT) |
296 BIT(ADIS16260_DIAG_STAT_SELF_TEST_BIT) |
297 BIT(ADIS16260_DIAG_STAT_OVERFLOW_BIT) |
298 BIT(ADIS16260_DIAG_STAT_SPI_FAIL_BIT) |
299 BIT(ADIS16260_DIAG_STAT_FLASH_UPT_BIT) |
300 BIT(ADIS16260_DIAG_STAT_POWER_HIGH_BIT) |
301 BIT(ADIS16260_DIAG_STAT_POWER_LOW_BIT),
302};
303
304static int adis16260_probe(struct spi_device *spi)
611{ 305{
612 int ret; 306 int ret;
613 struct adis16260_platform_data *pd = spi->dev.platform_data; 307 struct adis16260_platform_data *pd = spi->dev.platform_data;
@@ -626,10 +320,7 @@ static int __devinit adis16260_probe(struct spi_device *spi)
626 /* this is only used for removal purposes */ 320 /* this is only used for removal purposes */
627 spi_set_drvdata(spi, indio_dev); 321 spi_set_drvdata(spi, indio_dev);
628 322
629 st->us = spi; 323 indio_dev->name = spi_get_device_id(spi)->name;
630 mutex_init(&st->buf_lock);
631
632 indio_dev->name = spi_get_device_id(st->us)->name;
633 indio_dev->dev.parent = &spi->dev; 324 indio_dev->dev.parent = &spi->dev;
634 indio_dev->info = &adis16260_info; 325 indio_dev->info = &adis16260_info;
635 indio_dev->num_channels 326 indio_dev->num_channels
@@ -653,17 +344,14 @@ static int __devinit adis16260_probe(struct spi_device *spi)
653 indio_dev->num_channels = ARRAY_SIZE(adis16260_channels_x); 344 indio_dev->num_channels = ARRAY_SIZE(adis16260_channels_x);
654 indio_dev->modes = INDIO_DIRECT_MODE; 345 indio_dev->modes = INDIO_DIRECT_MODE;
655 346
656 ret = adis16260_configure_ring(indio_dev); 347 ret = adis_init(&st->adis, indio_dev, spi, &adis16260_data);
348 if (ret)
349 goto error_free_dev;
350
351 ret = adis_setup_buffer_and_trigger(&st->adis, indio_dev, NULL);
657 if (ret) 352 if (ret)
658 goto error_free_dev; 353 goto error_free_dev;
659 354
660 ret = iio_buffer_register(indio_dev,
661 indio_dev->channels,
662 ARRAY_SIZE(adis16260_channels_x));
663 if (ret) {
664 printk(KERN_ERR "failed to initialize the ring\n");
665 goto error_unreg_ring_funcs;
666 }
667 if (indio_dev->buffer) { 355 if (indio_dev->buffer) {
668 /* Set default scan mode */ 356 /* Set default scan mode */
669 iio_scan_mask_set(indio_dev, indio_dev->buffer, 357 iio_scan_mask_set(indio_dev, indio_dev->buffer,
@@ -677,43 +365,33 @@ static int __devinit adis16260_probe(struct spi_device *spi)
677 iio_scan_mask_set(indio_dev, indio_dev->buffer, 365 iio_scan_mask_set(indio_dev, indio_dev->buffer,
678 ADIS16260_SCAN_ANGL); 366 ADIS16260_SCAN_ANGL);
679 } 367 }
680 if (spi->irq) {
681 ret = adis16260_probe_trigger(indio_dev);
682 if (ret)
683 goto error_uninitialize_ring;
684 }
685 368
686 /* Get the device into a sane initial state */ 369 /* Get the device into a sane initial state */
687 ret = adis16260_initial_setup(indio_dev); 370 ret = adis_initial_startup(&st->adis);
688 if (ret) 371 if (ret)
689 goto error_remove_trigger; 372 goto error_cleanup_buffer_trigger;
690 ret = iio_device_register(indio_dev); 373 ret = iio_device_register(indio_dev);
691 if (ret) 374 if (ret)
692 goto error_remove_trigger; 375 goto error_cleanup_buffer_trigger;
693 376
694 return 0; 377 return 0;
695 378
696error_remove_trigger: 379error_cleanup_buffer_trigger:
697 adis16260_remove_trigger(indio_dev); 380 adis_cleanup_buffer_and_trigger(&st->adis, indio_dev);
698error_uninitialize_ring:
699 iio_buffer_unregister(indio_dev);
700error_unreg_ring_funcs:
701 adis16260_unconfigure_ring(indio_dev);
702error_free_dev: 381error_free_dev:
703 iio_device_free(indio_dev); 382 iio_device_free(indio_dev);
704error_ret: 383error_ret:
705 return ret; 384 return ret;
706} 385}
707 386
708static int __devexit adis16260_remove(struct spi_device *spi) 387static int adis16260_remove(struct spi_device *spi)
709{ 388{
710 struct iio_dev *indio_dev = spi_get_drvdata(spi); 389 struct iio_dev *indio_dev = spi_get_drvdata(spi);
390 struct adis16260_state *st = iio_priv(indio_dev);
711 391
712 iio_device_unregister(indio_dev); 392 iio_device_unregister(indio_dev);
713 adis16260_stop_device(indio_dev); 393 adis16260_stop_device(indio_dev);
714 adis16260_remove_trigger(indio_dev); 394 adis_cleanup_buffer_and_trigger(&st->adis, indio_dev);
715 iio_buffer_unregister(indio_dev);
716 adis16260_unconfigure_ring(indio_dev);
717 iio_device_free(indio_dev); 395 iio_device_free(indio_dev);
718 396
719 return 0; 397 return 0;
@@ -739,7 +417,7 @@ static struct spi_driver adis16260_driver = {
739 .owner = THIS_MODULE, 417 .owner = THIS_MODULE,
740 }, 418 },
741 .probe = adis16260_probe, 419 .probe = adis16260_probe,
742 .remove = __devexit_p(adis16260_remove), 420 .remove = adis16260_remove,
743 .id_table = adis16260_id, 421 .id_table = adis16260_id,
744}; 422};
745module_spi_driver(adis16260_driver); 423module_spi_driver(adis16260_driver);
diff --git a/drivers/staging/iio/gyro/adis16260_ring.c b/drivers/staging/iio/gyro/adis16260_ring.c
deleted file mode 100644
index e294cb49736d..000000000000
--- a/drivers/staging/iio/gyro/adis16260_ring.c
+++ /dev/null
@@ -1,136 +0,0 @@
1#include <linux/export.h>
2#include <linux/interrupt.h>
3#include <linux/mutex.h>
4#include <linux/kernel.h>
5#include <linux/spi/spi.h>
6#include <linux/slab.h>
7
8#include <linux/iio/iio.h>
9#include "../ring_sw.h"
10#include <linux/iio/trigger_consumer.h>
11#include "adis16260.h"
12
13/**
14 * adis16260_read_ring_data() read data registers which will be placed into ring
15 * @indio_dev: the IIO device
16 * @rx: somewhere to pass back the value read
17 **/
18static int adis16260_read_ring_data(struct iio_dev *indio_dev, u8 *rx)
19{
20 struct spi_message msg;
21 struct adis16260_state *st = iio_priv(indio_dev);
22 struct spi_transfer xfers[ADIS16260_OUTPUTS + 1];
23 int ret;
24 int i;
25
26 mutex_lock(&st->buf_lock);
27
28 spi_message_init(&msg);
29
30 memset(xfers, 0, sizeof(xfers));
31 for (i = 0; i <= ADIS16260_OUTPUTS; i++) {
32 xfers[i].bits_per_word = 8;
33 xfers[i].cs_change = 1;
34 xfers[i].len = 2;
35 xfers[i].delay_usecs = 30;
36 xfers[i].tx_buf = st->tx + 2 * i;
37 if (i < 2) /* SUPPLY_OUT:0x02 GYRO_OUT:0x04 */
38 st->tx[2 * i]
39 = ADIS16260_READ_REG(ADIS16260_SUPPLY_OUT
40 + 2 * i);
41 else /* 0x06 to 0x09 is reserved */
42 st->tx[2 * i]
43 = ADIS16260_READ_REG(ADIS16260_SUPPLY_OUT
44 + 2 * i + 4);
45 st->tx[2 * i + 1] = 0;
46 if (i >= 1)
47 xfers[i].rx_buf = rx + 2 * (i - 1);
48 spi_message_add_tail(&xfers[i], &msg);
49 }
50
51 ret = spi_sync(st->us, &msg);
52 if (ret)
53 dev_err(&st->us->dev, "problem when burst reading");
54
55 mutex_unlock(&st->buf_lock);
56
57 return ret;
58}
59
60static irqreturn_t adis16260_trigger_handler(int irq, void *p)
61{
62 struct iio_poll_func *pf = p;
63 struct iio_dev *indio_dev = pf->indio_dev;
64 struct adis16260_state *st = iio_priv(indio_dev);
65 int i = 0;
66 s16 *data;
67
68 data = kmalloc(indio_dev->scan_bytes, GFP_KERNEL);
69 if (data == NULL) {
70 dev_err(&st->us->dev, "memory alloc failed in ring bh");
71 goto done;
72 }
73
74 if (!bitmap_empty(indio_dev->active_scan_mask, indio_dev->masklength) &&
75 adis16260_read_ring_data(indio_dev, st->rx) >= 0)
76 for (; i < bitmap_weight(indio_dev->active_scan_mask,
77 indio_dev->masklength); i++)
78 data[i] = be16_to_cpup((__be16 *)&(st->rx[i*2]));
79
80 /* Guaranteed to be aligned with 8 byte boundary */
81 if (indio_dev->scan_timestamp)
82 *((s64 *)(data + ((i + 3)/4)*4)) = pf->timestamp;
83
84 iio_push_to_buffer(indio_dev->buffer, (u8 *)data);
85
86 kfree(data);
87done:
88 iio_trigger_notify_done(indio_dev->trig);
89
90 return IRQ_HANDLED;
91}
92
93void adis16260_unconfigure_ring(struct iio_dev *indio_dev)
94{
95 iio_dealloc_pollfunc(indio_dev->pollfunc);
96 iio_sw_rb_free(indio_dev->buffer);
97}
98
99static const struct iio_buffer_setup_ops adis16260_ring_setup_ops = {
100 .preenable = &iio_sw_buffer_preenable,
101 .postenable = &iio_triggered_buffer_postenable,
102 .predisable = &iio_triggered_buffer_predisable,
103};
104
105int adis16260_configure_ring(struct iio_dev *indio_dev)
106{
107 int ret = 0;
108 struct iio_buffer *ring;
109
110 ring = iio_sw_rb_allocate(indio_dev);
111 if (!ring) {
112 ret = -ENOMEM;
113 return ret;
114 }
115 indio_dev->buffer = ring;
116 ring->scan_timestamp = true;
117 indio_dev->setup_ops = &adis16260_ring_setup_ops;
118
119 indio_dev->pollfunc = iio_alloc_pollfunc(&iio_pollfunc_store_time,
120 &adis16260_trigger_handler,
121 IRQF_ONESHOT,
122 indio_dev,
123 "adis16260_consumer%d",
124 indio_dev->id);
125 if (indio_dev->pollfunc == NULL) {
126 ret = -ENOMEM;
127 goto error_iio_sw_rb_free;
128 }
129
130 indio_dev->modes |= INDIO_BUFFER_TRIGGERED;
131 return 0;
132
133error_iio_sw_rb_free:
134 iio_sw_rb_free(indio_dev->buffer);
135 return ret;
136}
diff --git a/drivers/staging/iio/gyro/adis16260_trigger.c b/drivers/staging/iio/gyro/adis16260_trigger.c
deleted file mode 100644
index 034559e4d5b9..000000000000
--- a/drivers/staging/iio/gyro/adis16260_trigger.c
+++ /dev/null
@@ -1,75 +0,0 @@
1#include <linux/interrupt.h>
2#include <linux/kernel.h>
3#include <linux/spi/spi.h>
4#include <linux/export.h>
5
6#include <linux/iio/iio.h>
7#include <linux/iio/trigger.h>
8#include "adis16260.h"
9
10/**
11 * adis16260_data_rdy_trigger_set_state() set datardy interrupt state
12 **/
13static int adis16260_data_rdy_trigger_set_state(struct iio_trigger *trig,
14 bool state)
15{
16 struct iio_dev *indio_dev = trig->private_data;
17
18 dev_dbg(&indio_dev->dev, "%s (%d)\n", __func__, state);
19 return adis16260_set_irq(indio_dev, state);
20}
21
22static const struct iio_trigger_ops adis16260_trigger_ops = {
23 .owner = THIS_MODULE,
24 .set_trigger_state = &adis16260_data_rdy_trigger_set_state,
25};
26
27int adis16260_probe_trigger(struct iio_dev *indio_dev)
28{
29 int ret;
30 struct adis16260_state *st = iio_priv(indio_dev);
31
32 st->trig = iio_trigger_alloc("%s-dev%d",
33 spi_get_device_id(st->us)->name,
34 indio_dev->id);
35 if (st->trig == NULL) {
36 ret = -ENOMEM;
37 goto error_ret;
38 }
39
40 ret = request_irq(st->us->irq,
41 &iio_trigger_generic_data_rdy_poll,
42 IRQF_TRIGGER_RISING,
43 "adis16260",
44 st->trig);
45 if (ret)
46 goto error_free_trig;
47
48 st->trig->dev.parent = &st->us->dev;
49 st->trig->ops = &adis16260_trigger_ops;
50 st->trig->private_data = indio_dev;
51 ret = iio_trigger_register(st->trig);
52
53 /* select default trigger */
54 indio_dev->trig = st->trig;
55 if (ret)
56 goto error_free_irq;
57
58 return 0;
59
60error_free_irq:
61 free_irq(st->us->irq, st->trig);
62error_free_trig:
63 iio_trigger_free(st->trig);
64error_ret:
65 return ret;
66}
67
68void adis16260_remove_trigger(struct iio_dev *indio_dev)
69{
70 struct adis16260_state *st = iio_priv(indio_dev);
71
72 iio_trigger_unregister(st->trig);
73 free_irq(st->us->irq, st->trig);
74 iio_trigger_free(st->trig);
75}
diff --git a/drivers/staging/iio/gyro/adxrs450_core.c b/drivers/staging/iio/gyro/adxrs450_core.c
index d93527d15917..f0ce81da8aca 100644
--- a/drivers/staging/iio/gyro/adxrs450_core.c
+++ b/drivers/staging/iio/gyro/adxrs450_core.c
@@ -365,7 +365,7 @@ static const struct iio_info adxrs450_info = {
365 .write_raw = &adxrs450_write_raw, 365 .write_raw = &adxrs450_write_raw,
366}; 366};
367 367
368static int __devinit adxrs450_probe(struct spi_device *spi) 368static int adxrs450_probe(struct spi_device *spi)
369{ 369{
370 int ret; 370 int ret;
371 struct adxrs450_state *st; 371 struct adxrs450_state *st;
@@ -409,7 +409,7 @@ error_ret:
409 return ret; 409 return ret;
410} 410}
411 411
412static int __devexit adxrs450_remove(struct spi_device *spi) 412static int adxrs450_remove(struct spi_device *spi)
413{ 413{
414 iio_device_unregister(spi_get_drvdata(spi)); 414 iio_device_unregister(spi_get_drvdata(spi));
415 iio_device_free(spi_get_drvdata(spi)); 415 iio_device_free(spi_get_drvdata(spi));
@@ -430,7 +430,7 @@ static struct spi_driver adxrs450_driver = {
430 .owner = THIS_MODULE, 430 .owner = THIS_MODULE,
431 }, 431 },
432 .probe = adxrs450_probe, 432 .probe = adxrs450_probe,
433 .remove = __devexit_p(adxrs450_remove), 433 .remove = adxrs450_remove,
434 .id_table = adxrs450_id, 434 .id_table = adxrs450_id,
435}; 435};
436module_spi_driver(adxrs450_driver); 436module_spi_driver(adxrs450_driver);
diff --git a/drivers/staging/iio/iio_dummy_evgen.c b/drivers/staging/iio/iio_dummy_evgen.c
index 74e24e8aa876..132d278c5010 100644
--- a/drivers/staging/iio/iio_dummy_evgen.c
+++ b/drivers/staging/iio/iio_dummy_evgen.c
@@ -108,7 +108,7 @@ int iio_dummy_evgen_get_irq(void)
108 108
109 mutex_lock(&iio_evgen->lock); 109 mutex_lock(&iio_evgen->lock);
110 for (i = 0; i < IIO_EVENTGEN_NO; i++) 110 for (i = 0; i < IIO_EVENTGEN_NO; i++)
111 if (iio_evgen->inuse[i] == false) { 111 if (!iio_evgen->inuse[i]) {
112 ret = iio_evgen->base + i; 112 ret = iio_evgen->base + i;
113 iio_evgen->inuse[i] = true; 113 iio_evgen->inuse[i] = true;
114 break; 114 break;
diff --git a/drivers/staging/iio/iio_hwmon.c b/drivers/staging/iio/iio_hwmon.c
index 5d491227e01b..c7a5f97576c7 100644
--- a/drivers/staging/iio/iio_hwmon.c
+++ b/drivers/staging/iio/iio_hwmon.c
@@ -69,7 +69,7 @@ static void iio_hwmon_free_attrs(struct iio_hwmon_state *st)
69 } 69 }
70} 70}
71 71
72static int __devinit iio_hwmon_probe(struct platform_device *pdev) 72static int iio_hwmon_probe(struct platform_device *pdev)
73{ 73{
74 struct iio_hwmon_state *st; 74 struct iio_hwmon_state *st;
75 struct sensor_device_attribute *a; 75 struct sensor_device_attribute *a;
@@ -170,7 +170,7 @@ error_ret:
170 return ret; 170 return ret;
171} 171}
172 172
173static int __devexit iio_hwmon_remove(struct platform_device *pdev) 173static int iio_hwmon_remove(struct platform_device *pdev)
174{ 174{
175 struct iio_hwmon_state *st = platform_get_drvdata(pdev); 175 struct iio_hwmon_state *st = platform_get_drvdata(pdev);
176 176
@@ -189,7 +189,7 @@ static struct platform_driver __refdata iio_hwmon_driver = {
189 .owner = THIS_MODULE, 189 .owner = THIS_MODULE,
190 }, 190 },
191 .probe = iio_hwmon_probe, 191 .probe = iio_hwmon_probe,
192 .remove = __devexit_p(iio_hwmon_remove), 192 .remove = iio_hwmon_remove,
193}; 193};
194 194
195module_platform_driver(iio_hwmon_driver); 195module_platform_driver(iio_hwmon_driver);
diff --git a/drivers/staging/iio/iio_simple_dummy.c b/drivers/staging/iio/iio_simple_dummy.c
index dc6c728ea47a..a865adf81938 100644
--- a/drivers/staging/iio/iio_simple_dummy.c
+++ b/drivers/staging/iio/iio_simple_dummy.c
@@ -378,7 +378,7 @@ static int iio_dummy_init_device(struct iio_dev *indio_dev)
378 * const struct i2c_device_id *id) 378 * const struct i2c_device_id *id)
379 * SPI: iio_dummy_probe(struct spi_device *spi) 379 * SPI: iio_dummy_probe(struct spi_device *spi)
380 */ 380 */
381static int __devinit iio_dummy_probe(int index) 381static int iio_dummy_probe(int index)
382{ 382{
383 int ret; 383 int ret;
384 struct iio_dev *indio_dev; 384 struct iio_dev *indio_dev;
diff --git a/drivers/staging/iio/iio_simple_dummy_buffer.c b/drivers/staging/iio/iio_simple_dummy_buffer.c
index 697d9700db2f..dee16f0e7570 100644
--- a/drivers/staging/iio/iio_simple_dummy_buffer.c
+++ b/drivers/staging/iio/iio_simple_dummy_buffer.c
@@ -46,7 +46,6 @@ static irqreturn_t iio_simple_dummy_trigger_h(int irq, void *p)
46{ 46{
47 struct iio_poll_func *pf = p; 47 struct iio_poll_func *pf = p;
48 struct iio_dev *indio_dev = pf->indio_dev; 48 struct iio_dev *indio_dev = pf->indio_dev;
49 struct iio_buffer *buffer = indio_dev->buffer;
50 int len = 0; 49 int len = 0;
51 u16 *data; 50 u16 *data;
52 51
@@ -76,7 +75,7 @@ static irqreturn_t iio_simple_dummy_trigger_h(int irq, void *p)
76 i < bitmap_weight(indio_dev->active_scan_mask, 75 i < bitmap_weight(indio_dev->active_scan_mask,
77 indio_dev->masklength); 76 indio_dev->masklength);
78 i++, j++) { 77 i++, j++) {
79 j = find_next_bit(buffer->scan_mask, 78 j = find_next_bit(indio_dev->active_scan_mask,
80 indio_dev->masklength, j); 79 indio_dev->masklength, j);
81 /* random access read from the 'device' */ 80 /* random access read from the 'device' */
82 data[i] = fakedata[j]; 81 data[i] = fakedata[j];
@@ -87,7 +86,7 @@ static irqreturn_t iio_simple_dummy_trigger_h(int irq, void *p)
87 if (indio_dev->scan_timestamp) 86 if (indio_dev->scan_timestamp)
88 *(s64 *)((u8 *)data + ALIGN(len, sizeof(s64))) 87 *(s64 *)((u8 *)data + ALIGN(len, sizeof(s64)))
89 = iio_get_time_ns(); 88 = iio_get_time_ns();
90 iio_push_to_buffer(buffer, (u8 *)data); 89 iio_push_to_buffers(indio_dev, (u8 *)data);
91 90
92 kfree(data); 91 kfree(data);
93 92
diff --git a/drivers/staging/iio/impedance-analyzer/ad5933.c b/drivers/staging/iio/impedance-analyzer/ad5933.c
index de21d47f33e9..779243d24dec 100644
--- a/drivers/staging/iio/impedance-analyzer/ad5933.c
+++ b/drivers/staging/iio/impedance-analyzer/ad5933.c
@@ -647,7 +647,6 @@ static void ad5933_work(struct work_struct *work)
647 struct ad5933_state *st = container_of(work, 647 struct ad5933_state *st = container_of(work,
648 struct ad5933_state, work.work); 648 struct ad5933_state, work.work);
649 struct iio_dev *indio_dev = i2c_get_clientdata(st->client); 649 struct iio_dev *indio_dev = i2c_get_clientdata(st->client);
650 struct iio_buffer *ring = indio_dev->buffer;
651 signed short buf[2]; 650 signed short buf[2];
652 unsigned char status; 651 unsigned char status;
653 652
@@ -677,8 +676,7 @@ static void ad5933_work(struct work_struct *work)
677 } else { 676 } else {
678 buf[0] = be16_to_cpu(buf[0]); 677 buf[0] = be16_to_cpu(buf[0]);
679 } 678 }
680 /* save datum to the ring */ 679 iio_push_to_buffers(indio_dev, (u8 *)buf);
681 iio_push_to_buffer(ring, (u8 *)buf);
682 } else { 680 } else {
683 /* no data available - try again later */ 681 /* no data available - try again later */
684 schedule_delayed_work(&st->work, st->poll_time_jiffies); 682 schedule_delayed_work(&st->work, st->poll_time_jiffies);
@@ -699,7 +697,7 @@ static void ad5933_work(struct work_struct *work)
699 mutex_unlock(&indio_dev->mlock); 697 mutex_unlock(&indio_dev->mlock);
700} 698}
701 699
702static int __devinit ad5933_probe(struct i2c_client *client, 700static int ad5933_probe(struct i2c_client *client,
703 const struct i2c_device_id *id) 701 const struct i2c_device_id *id)
704{ 702{
705 int ret, voltage_uv = 0; 703 int ret, voltage_uv = 0;
@@ -789,7 +787,7 @@ error_put_reg:
789 return ret; 787 return ret;
790} 788}
791 789
792static __devexit int ad5933_remove(struct i2c_client *client) 790static int ad5933_remove(struct i2c_client *client)
793{ 791{
794 struct iio_dev *indio_dev = i2c_get_clientdata(client); 792 struct iio_dev *indio_dev = i2c_get_clientdata(client);
795 struct ad5933_state *st = iio_priv(indio_dev); 793 struct ad5933_state *st = iio_priv(indio_dev);
@@ -819,7 +817,7 @@ static struct i2c_driver ad5933_driver = {
819 .name = "ad5933", 817 .name = "ad5933",
820 }, 818 },
821 .probe = ad5933_probe, 819 .probe = ad5933_probe,
822 .remove = __devexit_p(ad5933_remove), 820 .remove = ad5933_remove,
823 .id_table = ad5933_id, 821 .id_table = ad5933_id,
824}; 822};
825module_i2c_driver(ad5933_driver); 823module_i2c_driver(ad5933_driver);
diff --git a/drivers/staging/iio/imu/adis16400.h b/drivers/staging/iio/imu/adis16400.h
index 77c601da1846..7a105e966464 100644
--- a/drivers/staging/iio/imu/adis16400.h
+++ b/drivers/staging/iio/imu/adis16400.h
@@ -123,6 +123,9 @@
123/* SLP_CNT */ 123/* SLP_CNT */
124#define ADIS16400_SLP_CNT_POWER_OFF (1<<8) 124#define ADIS16400_SLP_CNT_POWER_OFF (1<<8)
125 125
126#define ADIS16334_RATE_DIV_SHIFT 8
127#define ADIS16334_RATE_INT_CLK BIT(0)
128
126#define ADIS16400_MAX_TX 24 129#define ADIS16400_MAX_TX 24
127#define ADIS16400_MAX_RX 24 130#define ADIS16400_MAX_RX 24
128 131
@@ -130,18 +133,21 @@
130#define ADIS16400_SPI_BURST (u32)(1000 * 1000) 133#define ADIS16400_SPI_BURST (u32)(1000 * 1000)
131#define ADIS16400_SPI_FAST (u32)(2000 * 1000) 134#define ADIS16400_SPI_FAST (u32)(2000 * 1000)
132 135
133#define ADIS16400_HAS_PROD_ID 1 136#define ADIS16400_HAS_PROD_ID BIT(0)
134#define ADIS16400_NO_BURST 2 137#define ADIS16400_NO_BURST BIT(1)
138#define ADIS16400_HAS_SLOW_MODE BIT(2)
139
135struct adis16400_chip_info { 140struct adis16400_chip_info {
136 const struct iio_chan_spec *channels; 141 const struct iio_chan_spec *channels;
137 const int num_channels; 142 const int num_channels;
138 const int product_id;
139 const long flags; 143 const long flags;
140 unsigned int gyro_scale_micro; 144 unsigned int gyro_scale_micro;
141 unsigned int accel_scale_micro; 145 unsigned int accel_scale_micro;
142 int temp_scale_nano; 146 int temp_scale_nano;
143 int temp_offset; 147 int temp_offset;
144 unsigned long default_scan_mask; 148 unsigned long default_scan_mask;
149 int (*set_freq)(struct iio_dev *indio_dev, unsigned int freq);
150 int (*get_freq)(struct iio_dev *indio_dev);
145}; 151};
146 152
147/** 153/**
diff --git a/drivers/staging/iio/imu/adis16400_core.c b/drivers/staging/iio/imu/adis16400_core.c
index 3144a7b1e1c4..9c8f5ab7e13b 100644
--- a/drivers/staging/iio/imu/adis16400_core.c
+++ b/drivers/staging/iio/imu/adis16400_core.c
@@ -38,7 +38,6 @@ enum adis16400_chip_variant {
38 ADIS16360, 38 ADIS16360,
39 ADIS16362, 39 ADIS16362,
40 ADIS16364, 40 ADIS16364,
41 ADIS16365,
42 ADIS16400, 41 ADIS16400,
43}; 42};
44 43
@@ -161,10 +160,39 @@ error_ret:
161 return ret; 160 return ret;
162} 161}
163 162
164static int adis16400_get_freq(struct iio_dev *indio_dev) 163static int adis16334_get_freq(struct iio_dev *indio_dev)
165{ 164{
165 int ret;
166 u16 t; 166 u16 t;
167
168 ret = adis16400_spi_read_reg_16(indio_dev, ADIS16400_SMPL_PRD, &t);
169 if (ret < 0)
170 return ret;
171
172 t >>= ADIS16334_RATE_DIV_SHIFT;
173
174 return (8192 >> t) / 10;
175}
176
177static int adis16334_set_freq(struct iio_dev *indio_dev, unsigned int freq)
178{
179 unsigned int t;
180
181 t = ilog2(8192 / (freq * 10));
182
183 if (t > 0x31)
184 t = 0x31;
185
186 t <<= ADIS16334_RATE_DIV_SHIFT;
187 t |= ADIS16334_RATE_INT_CLK;
188
189 return adis16400_spi_write_reg_16(indio_dev, ADIS16400_SMPL_PRD, t);
190}
191
192static int adis16400_get_freq(struct iio_dev *indio_dev)
193{
167 int sps, ret; 194 int sps, ret;
195 u16 t;
168 196
169 ret = adis16400_spi_read_reg_16(indio_dev, ADIS16400_SMPL_PRD, &t); 197 ret = adis16400_spi_read_reg_16(indio_dev, ADIS16400_SMPL_PRD, &t);
170 if (ret < 0) 198 if (ret < 0)
@@ -175,13 +203,33 @@ static int adis16400_get_freq(struct iio_dev *indio_dev)
175 return sps; 203 return sps;
176} 204}
177 205
206static int adis16400_set_freq(struct iio_dev *indio_dev, unsigned int freq)
207{
208 struct adis16400_state *st = iio_priv(indio_dev);
209 unsigned int t;
210
211 t = 1638 / freq;
212 if (t > 0)
213 t--;
214 t &= ADIS16400_SMPL_PRD_DIV_MASK;
215 if ((t & ADIS16400_SMPL_PRD_DIV_MASK) >= 0x0A)
216 st->us->max_speed_hz = ADIS16400_SPI_SLOW;
217 else
218 st->us->max_speed_hz = ADIS16400_SPI_FAST;
219
220 return adis16400_spi_write_reg_8(indio_dev,
221 ADIS16400_SMPL_PRD, t);
222}
223
178static ssize_t adis16400_read_frequency(struct device *dev, 224static ssize_t adis16400_read_frequency(struct device *dev,
179 struct device_attribute *attr, 225 struct device_attribute *attr,
180 char *buf) 226 char *buf)
181{ 227{
182 struct iio_dev *indio_dev = dev_to_iio_dev(dev); 228 struct iio_dev *indio_dev = dev_to_iio_dev(dev);
229 struct adis16400_state *st = iio_priv(indio_dev);
183 int ret, len = 0; 230 int ret, len = 0;
184 ret = adis16400_get_freq(indio_dev); 231
232 ret = st->variant->get_freq(indio_dev);
185 if (ret < 0) 233 if (ret < 0)
186 return ret; 234 return ret;
187 len = sprintf(buf, "%d SPS\n", ret); 235 len = sprintf(buf, "%d SPS\n", ret);
@@ -229,7 +277,6 @@ static ssize_t adis16400_write_frequency(struct device *dev,
229 struct adis16400_state *st = iio_priv(indio_dev); 277 struct adis16400_state *st = iio_priv(indio_dev);
230 long val; 278 long val;
231 int ret; 279 int ret;
232 u8 t;
233 280
234 ret = strict_strtol(buf, 10, &val); 281 ret = strict_strtol(buf, 10, &val);
235 if (ret) 282 if (ret)
@@ -239,18 +286,7 @@ static ssize_t adis16400_write_frequency(struct device *dev,
239 286
240 mutex_lock(&indio_dev->mlock); 287 mutex_lock(&indio_dev->mlock);
241 288
242 t = (1638 / val); 289 st->variant->set_freq(indio_dev, val);
243 if (t > 0)
244 t--;
245 t &= ADIS16400_SMPL_PRD_DIV_MASK;
246 if ((t & ADIS16400_SMPL_PRD_DIV_MASK) >= 0x0A)
247 st->us->max_speed_hz = ADIS16400_SPI_SLOW;
248 else
249 st->us->max_speed_hz = ADIS16400_SPI_FAST;
250
251 ret = adis16400_spi_write_reg_8(indio_dev,
252 ADIS16400_SMPL_PRD,
253 t);
254 290
255 /* Also update the filter */ 291 /* Also update the filter */
256 mutex_unlock(&indio_dev->mlock); 292 mutex_unlock(&indio_dev->mlock);
@@ -378,10 +414,14 @@ static int adis16400_initial_setup(struct iio_dev *indio_dev)
378{ 414{
379 int ret; 415 int ret;
380 u16 prod_id, smp_prd; 416 u16 prod_id, smp_prd;
417 unsigned int device_id;
381 struct adis16400_state *st = iio_priv(indio_dev); 418 struct adis16400_state *st = iio_priv(indio_dev);
382 419
383 /* use low spi speed for init */ 420 /* use low spi speed for init if the device has a slow mode */
384 st->us->max_speed_hz = ADIS16400_SPI_SLOW; 421 if (st->variant->flags & ADIS16400_HAS_SLOW_MODE)
422 st->us->max_speed_hz = ADIS16400_SPI_SLOW;
423 else
424 st->us->max_speed_hz = ADIS16400_SPI_FAST;
385 st->us->mode = SPI_MODE_3; 425 st->us->mode = SPI_MODE_3;
386 spi_setup(st->us); 426 spi_setup(st->us);
387 427
@@ -414,19 +454,27 @@ static int adis16400_initial_setup(struct iio_dev *indio_dev)
414 if (ret) 454 if (ret)
415 goto err_ret; 455 goto err_ret;
416 456
417 if ((prod_id & 0xF000) != st->variant->product_id) 457 sscanf(indio_dev->name, "adis%u\n", &device_id);
418 dev_warn(&indio_dev->dev, "incorrect id"); 458
459 if (prod_id != device_id)
460 dev_warn(&indio_dev->dev, "Device ID(%u) and product ID(%u) do not match.",
461 device_id, prod_id);
419 462
420 dev_info(&indio_dev->dev, "%s: prod_id 0x%04x at CS%d (irq %d)\n", 463 dev_info(&indio_dev->dev, "%s: prod_id 0x%04x at CS%d (irq %d)\n",
421 indio_dev->name, prod_id, 464 indio_dev->name, prod_id,
422 st->us->chip_select, st->us->irq); 465 st->us->chip_select, st->us->irq);
423 } 466 }
424 /* use high spi speed if possible */ 467 /* use high spi speed if possible */
425 ret = adis16400_spi_read_reg_16(indio_dev, 468 if (st->variant->flags & ADIS16400_HAS_SLOW_MODE) {
426 ADIS16400_SMPL_PRD, &smp_prd); 469 ret = adis16400_spi_read_reg_16(indio_dev,
427 if (!ret && (smp_prd & ADIS16400_SMPL_PRD_DIV_MASK) < 0x0A) { 470 ADIS16400_SMPL_PRD, &smp_prd);
428 st->us->max_speed_hz = ADIS16400_SPI_SLOW; 471 if (ret)
429 spi_setup(st->us); 472 goto err_ret;
473
474 if ((smp_prd & ADIS16400_SMPL_PRD_DIV_MASK) < 0x0A) {
475 st->us->max_speed_hz = ADIS16400_SPI_FAST;
476 spi_setup(st->us);
477 }
430 } 478 }
431 479
432err_ret: 480err_ret:
@@ -503,7 +551,7 @@ static int adis16400_write_raw(struct iio_dev *indio_dev,
503 mutex_lock(&indio_dev->mlock); 551 mutex_lock(&indio_dev->mlock);
504 st->filt_int = val; 552 st->filt_int = val;
505 /* Work out update to current value */ 553 /* Work out update to current value */
506 sps = adis16400_get_freq(indio_dev); 554 sps = st->variant->get_freq(indio_dev);
507 if (sps < 0) { 555 if (sps < 0) {
508 mutex_unlock(&indio_dev->mlock); 556 mutex_unlock(&indio_dev->mlock);
509 return sps; 557 return sps;
@@ -601,7 +649,7 @@ static int adis16400_read_raw(struct iio_dev *indio_dev,
601 mutex_unlock(&indio_dev->mlock); 649 mutex_unlock(&indio_dev->mlock);
602 return ret; 650 return ret;
603 } 651 }
604 ret = adis16400_get_freq(indio_dev); 652 val16 = st->variant->get_freq(indio_dev);
605 if (ret > 0) 653 if (ret > 0)
606 *val = ret/adis16400_3db_divisors[val16 & 0x03]; 654 *val = ret/adis16400_3db_divisors[val16 & 0x03];
607 *val2 = 0; 655 *val2 = 0;
@@ -624,7 +672,7 @@ static const struct iio_chan_spec adis16400_channels[] = {
624 IIO_CHAN_INFO_SCALE_SEPARATE_BIT, 672 IIO_CHAN_INFO_SCALE_SEPARATE_BIT,
625 .address = in_supply, 673 .address = in_supply,
626 .scan_index = ADIS16400_SCAN_SUPPLY, 674 .scan_index = ADIS16400_SCAN_SUPPLY,
627 .scan_type = IIO_ST('u', 14, 16, 0) 675 .scan_type = IIO_ST('u', 14, 16, 0),
628 }, { 676 }, {
629 .type = IIO_ANGL_VEL, 677 .type = IIO_ANGL_VEL,
630 .modified = 1, 678 .modified = 1,
@@ -635,7 +683,7 @@ static const struct iio_chan_spec adis16400_channels[] = {
635 IIO_CHAN_INFO_LOW_PASS_FILTER_3DB_FREQUENCY_SHARED_BIT, 683 IIO_CHAN_INFO_LOW_PASS_FILTER_3DB_FREQUENCY_SHARED_BIT,
636 .address = gyro_x, 684 .address = gyro_x,
637 .scan_index = ADIS16400_SCAN_GYRO_X, 685 .scan_index = ADIS16400_SCAN_GYRO_X,
638 .scan_type = IIO_ST('s', 14, 16, 0) 686 .scan_type = IIO_ST('s', 14, 16, 0),
639 }, { 687 }, {
640 .type = IIO_ANGL_VEL, 688 .type = IIO_ANGL_VEL,
641 .modified = 1, 689 .modified = 1,
@@ -754,7 +802,7 @@ static const struct iio_chan_spec adis16350_channels[] = {
754 IIO_CHAN_INFO_SCALE_SEPARATE_BIT, 802 IIO_CHAN_INFO_SCALE_SEPARATE_BIT,
755 .address = in_supply, 803 .address = in_supply,
756 .scan_index = ADIS16400_SCAN_SUPPLY, 804 .scan_index = ADIS16400_SCAN_SUPPLY,
757 .scan_type = IIO_ST('u', 12, 16, 0) 805 .scan_type = IIO_ST('u', 12, 16, 0),
758 }, { 806 }, {
759 .type = IIO_ANGL_VEL, 807 .type = IIO_ANGL_VEL,
760 .modified = 1, 808 .modified = 1,
@@ -765,7 +813,7 @@ static const struct iio_chan_spec adis16350_channels[] = {
765 IIO_CHAN_INFO_LOW_PASS_FILTER_3DB_FREQUENCY_SHARED_BIT, 813 IIO_CHAN_INFO_LOW_PASS_FILTER_3DB_FREQUENCY_SHARED_BIT,
766 .address = gyro_x, 814 .address = gyro_x,
767 .scan_index = ADIS16400_SCAN_GYRO_X, 815 .scan_index = ADIS16400_SCAN_GYRO_X,
768 .scan_type = IIO_ST('s', 14, 16, 0) 816 .scan_type = IIO_ST('s', 14, 16, 0),
769 }, { 817 }, {
770 .type = IIO_ANGL_VEL, 818 .type = IIO_ANGL_VEL,
771 .modified = 1, 819 .modified = 1,
@@ -879,7 +927,7 @@ static const struct iio_chan_spec adis16300_channels[] = {
879 IIO_CHAN_INFO_SCALE_SEPARATE_BIT, 927 IIO_CHAN_INFO_SCALE_SEPARATE_BIT,
880 .address = in_supply, 928 .address = in_supply,
881 .scan_index = ADIS16400_SCAN_SUPPLY, 929 .scan_index = ADIS16400_SCAN_SUPPLY,
882 .scan_type = IIO_ST('u', 12, 16, 0) 930 .scan_type = IIO_ST('u', 12, 16, 0),
883 }, { 931 }, {
884 .type = IIO_ANGL_VEL, 932 .type = IIO_ANGL_VEL,
885 .modified = 1, 933 .modified = 1,
@@ -1060,6 +1108,7 @@ static struct adis16400_chip_info adis16400_chips[] = {
1060 [ADIS16300] = { 1108 [ADIS16300] = {
1061 .channels = adis16300_channels, 1109 .channels = adis16300_channels,
1062 .num_channels = ARRAY_SIZE(adis16300_channels), 1110 .num_channels = ARRAY_SIZE(adis16300_channels),
1111 .flags = ADIS16400_HAS_SLOW_MODE,
1063 .gyro_scale_micro = IIO_DEGREE_TO_RAD(50000), /* 0.05 deg/s */ 1112 .gyro_scale_micro = IIO_DEGREE_TO_RAD(50000), /* 0.05 deg/s */
1064 .accel_scale_micro = 5884, 1113 .accel_scale_micro = 5884,
1065 .temp_scale_nano = 140000000, /* 0.14 C */ 1114 .temp_scale_nano = 140000000, /* 0.14 C */
@@ -1070,10 +1119,13 @@ static struct adis16400_chip_info adis16400_chips[] = {
1070 (1 << ADIS16400_SCAN_TEMP) | (1 << ADIS16400_SCAN_ADC_0) | 1119 (1 << ADIS16400_SCAN_TEMP) | (1 << ADIS16400_SCAN_ADC_0) |
1071 (1 << ADIS16300_SCAN_INCLI_X) | (1 << ADIS16300_SCAN_INCLI_Y) | 1120 (1 << ADIS16300_SCAN_INCLI_X) | (1 << ADIS16300_SCAN_INCLI_Y) |
1072 (1 << 14), 1121 (1 << 14),
1122 .set_freq = adis16400_set_freq,
1123 .get_freq = adis16400_get_freq,
1073 }, 1124 },
1074 [ADIS16334] = { 1125 [ADIS16334] = {
1075 .channels = adis16334_channels, 1126 .channels = adis16334_channels,
1076 .num_channels = ARRAY_SIZE(adis16334_channels), 1127 .num_channels = ARRAY_SIZE(adis16334_channels),
1128 .flags = ADIS16400_HAS_PROD_ID,
1077 .gyro_scale_micro = IIO_DEGREE_TO_RAD(50000), /* 0.05 deg/s */ 1129 .gyro_scale_micro = IIO_DEGREE_TO_RAD(50000), /* 0.05 deg/s */
1078 .accel_scale_micro = IIO_G_TO_M_S_2(1000), /* 1 mg */ 1130 .accel_scale_micro = IIO_G_TO_M_S_2(1000), /* 1 mg */
1079 .temp_scale_nano = 67850000, /* 0.06785 C */ 1131 .temp_scale_nano = 67850000, /* 0.06785 C */
@@ -1082,6 +1134,8 @@ static struct adis16400_chip_info adis16400_chips[] = {
1082 (1 << ADIS16400_SCAN_GYRO_Y) | (1 << ADIS16400_SCAN_GYRO_Z) | 1134 (1 << ADIS16400_SCAN_GYRO_Y) | (1 << ADIS16400_SCAN_GYRO_Z) |
1083 (1 << ADIS16400_SCAN_ACC_X) | (1 << ADIS16400_SCAN_ACC_Y) | 1135 (1 << ADIS16400_SCAN_ACC_X) | (1 << ADIS16400_SCAN_ACC_Y) |
1084 (1 << ADIS16400_SCAN_ACC_Z), 1136 (1 << ADIS16400_SCAN_ACC_Z),
1137 .set_freq = adis16334_set_freq,
1138 .get_freq = adis16334_get_freq,
1085 }, 1139 },
1086 [ADIS16350] = { 1140 [ADIS16350] = {
1087 .channels = adis16350_channels, 1141 .channels = adis16350_channels,
@@ -1091,62 +1145,57 @@ static struct adis16400_chip_info adis16400_chips[] = {
1091 .temp_scale_nano = 145300000, /* 0.1453 C */ 1145 .temp_scale_nano = 145300000, /* 0.1453 C */
1092 .temp_offset = 25000000 / 145300, /* 25 C = 0x00 */ 1146 .temp_offset = 25000000 / 145300, /* 25 C = 0x00 */
1093 .default_scan_mask = 0x7FF, 1147 .default_scan_mask = 0x7FF,
1094 .flags = ADIS16400_NO_BURST, 1148 .flags = ADIS16400_NO_BURST | ADIS16400_HAS_SLOW_MODE,
1149 .set_freq = adis16400_set_freq,
1150 .get_freq = adis16400_get_freq,
1095 }, 1151 },
1096 [ADIS16360] = { 1152 [ADIS16360] = {
1097 .channels = adis16350_channels, 1153 .channels = adis16350_channels,
1098 .num_channels = ARRAY_SIZE(adis16350_channels), 1154 .num_channels = ARRAY_SIZE(adis16350_channels),
1099 .flags = ADIS16400_HAS_PROD_ID, 1155 .flags = ADIS16400_HAS_PROD_ID | ADIS16400_HAS_SLOW_MODE,
1100 .product_id = 0x3FE8,
1101 .gyro_scale_micro = IIO_DEGREE_TO_RAD(50000), /* 0.05 deg/s */ 1156 .gyro_scale_micro = IIO_DEGREE_TO_RAD(50000), /* 0.05 deg/s */
1102 .accel_scale_micro = IIO_G_TO_M_S_2(3333), /* 3.333 mg */ 1157 .accel_scale_micro = IIO_G_TO_M_S_2(3333), /* 3.333 mg */
1103 .temp_scale_nano = 136000000, /* 0.136 C */ 1158 .temp_scale_nano = 136000000, /* 0.136 C */
1104 .temp_offset = 25000000 / 136000, /* 25 C = 0x00 */ 1159 .temp_offset = 25000000 / 136000, /* 25 C = 0x00 */
1105 .default_scan_mask = 0x7FF, 1160 .default_scan_mask = 0x7FF,
1161 .set_freq = adis16400_set_freq,
1162 .get_freq = adis16400_get_freq,
1106 }, 1163 },
1107 [ADIS16362] = { 1164 [ADIS16362] = {
1108 .channels = adis16350_channels, 1165 .channels = adis16350_channels,
1109 .num_channels = ARRAY_SIZE(adis16350_channels), 1166 .num_channels = ARRAY_SIZE(adis16350_channels),
1110 .flags = ADIS16400_HAS_PROD_ID, 1167 .flags = ADIS16400_HAS_PROD_ID | ADIS16400_HAS_SLOW_MODE,
1111 .product_id = 0x3FEA,
1112 .gyro_scale_micro = IIO_DEGREE_TO_RAD(50000), /* 0.05 deg/s */ 1168 .gyro_scale_micro = IIO_DEGREE_TO_RAD(50000), /* 0.05 deg/s */
1113 .accel_scale_micro = IIO_G_TO_M_S_2(333), /* 0.333 mg */ 1169 .accel_scale_micro = IIO_G_TO_M_S_2(333), /* 0.333 mg */
1114 .temp_scale_nano = 136000000, /* 0.136 C */ 1170 .temp_scale_nano = 136000000, /* 0.136 C */
1115 .temp_offset = 25000000 / 136000, /* 25 C = 0x00 */ 1171 .temp_offset = 25000000 / 136000, /* 25 C = 0x00 */
1116 .default_scan_mask = 0x7FF, 1172 .default_scan_mask = 0x7FF,
1173 .set_freq = adis16400_set_freq,
1174 .get_freq = adis16400_get_freq,
1117 }, 1175 },
1118 [ADIS16364] = { 1176 [ADIS16364] = {
1119 .channels = adis16350_channels, 1177 .channels = adis16350_channels,
1120 .num_channels = ARRAY_SIZE(adis16350_channels), 1178 .num_channels = ARRAY_SIZE(adis16350_channels),
1121 .flags = ADIS16400_HAS_PROD_ID, 1179 .flags = ADIS16400_HAS_PROD_ID | ADIS16400_HAS_SLOW_MODE,
1122 .product_id = 0x3FEC,
1123 .gyro_scale_micro = IIO_DEGREE_TO_RAD(50000), /* 0.05 deg/s */
1124 .accel_scale_micro = IIO_G_TO_M_S_2(1000), /* 1 mg */
1125 .temp_scale_nano = 136000000, /* 0.136 C */
1126 .temp_offset = 25000000 / 136000, /* 25 C = 0x00 */
1127 .default_scan_mask = 0x7FF,
1128 },
1129 [ADIS16365] = {
1130 .channels = adis16350_channels,
1131 .num_channels = ARRAY_SIZE(adis16350_channels),
1132 .flags = ADIS16400_HAS_PROD_ID,
1133 .product_id = 0x3FED,
1134 .gyro_scale_micro = IIO_DEGREE_TO_RAD(50000), /* 0.05 deg/s */ 1180 .gyro_scale_micro = IIO_DEGREE_TO_RAD(50000), /* 0.05 deg/s */
1135 .accel_scale_micro = IIO_G_TO_M_S_2(1000), /* 1 mg */ 1181 .accel_scale_micro = IIO_G_TO_M_S_2(1000), /* 1 mg */
1136 .temp_scale_nano = 136000000, /* 0.136 C */ 1182 .temp_scale_nano = 136000000, /* 0.136 C */
1137 .temp_offset = 25000000 / 136000, /* 25 C = 0x00 */ 1183 .temp_offset = 25000000 / 136000, /* 25 C = 0x00 */
1138 .default_scan_mask = 0x7FF, 1184 .default_scan_mask = 0x7FF,
1185 .set_freq = adis16400_set_freq,
1186 .get_freq = adis16400_get_freq,
1139 }, 1187 },
1140 [ADIS16400] = { 1188 [ADIS16400] = {
1141 .channels = adis16400_channels, 1189 .channels = adis16400_channels,
1142 .num_channels = ARRAY_SIZE(adis16400_channels), 1190 .num_channels = ARRAY_SIZE(adis16400_channels),
1143 .flags = ADIS16400_HAS_PROD_ID, 1191 .flags = ADIS16400_HAS_PROD_ID | ADIS16400_HAS_SLOW_MODE,
1144 .product_id = 0x4015,
1145 .gyro_scale_micro = IIO_DEGREE_TO_RAD(50000), /* 0.05 deg/s */ 1192 .gyro_scale_micro = IIO_DEGREE_TO_RAD(50000), /* 0.05 deg/s */
1146 .accel_scale_micro = IIO_G_TO_M_S_2(3333), /* 3.333 mg */ 1193 .accel_scale_micro = IIO_G_TO_M_S_2(3333), /* 3.333 mg */
1147 .default_scan_mask = 0xFFF, 1194 .default_scan_mask = 0xFFF,
1148 .temp_scale_nano = 140000000, /* 0.14 C */ 1195 .temp_scale_nano = 140000000, /* 0.14 C */
1149 .temp_offset = 25000000 / 140000, /* 25 C = 0x00 */ 1196 .temp_offset = 25000000 / 140000, /* 25 C = 0x00 */
1197 .set_freq = adis16400_set_freq,
1198 .get_freq = adis16400_get_freq,
1150 } 1199 }
1151}; 1200};
1152 1201
@@ -1157,7 +1206,7 @@ static const struct iio_info adis16400_info = {
1157 .attrs = &adis16400_attribute_group, 1206 .attrs = &adis16400_attribute_group,
1158}; 1207};
1159 1208
1160static int __devinit adis16400_probe(struct spi_device *spi) 1209static int adis16400_probe(struct spi_device *spi)
1161{ 1210{
1162 int ret; 1211 int ret;
1163 struct adis16400_state *st; 1212 struct adis16400_state *st;
@@ -1224,7 +1273,7 @@ error_ret:
1224} 1273}
1225 1274
1226/* fixme, confirm ordering in this function */ 1275/* fixme, confirm ordering in this function */
1227static int __devexit adis16400_remove(struct spi_device *spi) 1276static int adis16400_remove(struct spi_device *spi)
1228{ 1277{
1229 struct iio_dev *indio_dev = spi_get_drvdata(spi); 1278 struct iio_dev *indio_dev = spi_get_drvdata(spi);
1230 1279
@@ -1248,7 +1297,7 @@ static const struct spi_device_id adis16400_id[] = {
1248 {"adis16360", ADIS16360}, 1297 {"adis16360", ADIS16360},
1249 {"adis16362", ADIS16362}, 1298 {"adis16362", ADIS16362},
1250 {"adis16364", ADIS16364}, 1299 {"adis16364", ADIS16364},
1251 {"adis16365", ADIS16365}, 1300 {"adis16365", ADIS16360},
1252 {"adis16400", ADIS16400}, 1301 {"adis16400", ADIS16400},
1253 {"adis16405", ADIS16400}, 1302 {"adis16405", ADIS16400},
1254 {} 1303 {}
@@ -1262,7 +1311,7 @@ static struct spi_driver adis16400_driver = {
1262 }, 1311 },
1263 .id_table = adis16400_id, 1312 .id_table = adis16400_id,
1264 .probe = adis16400_probe, 1313 .probe = adis16400_probe,
1265 .remove = __devexit_p(adis16400_remove), 1314 .remove = adis16400_remove,
1266}; 1315};
1267module_spi_driver(adis16400_driver); 1316module_spi_driver(adis16400_driver);
1268 1317
diff --git a/drivers/staging/iio/imu/adis16400_ring.c b/drivers/staging/iio/imu/adis16400_ring.c
index 260bdd1a4681..d46c1e38cf7b 100644
--- a/drivers/staging/iio/imu/adis16400_ring.c
+++ b/drivers/staging/iio/imu/adis16400_ring.c
@@ -114,7 +114,6 @@ static irqreturn_t adis16400_trigger_handler(int irq, void *p)
114 struct iio_poll_func *pf = p; 114 struct iio_poll_func *pf = p;
115 struct iio_dev *indio_dev = pf->indio_dev; 115 struct iio_dev *indio_dev = pf->indio_dev;
116 struct adis16400_state *st = iio_priv(indio_dev); 116 struct adis16400_state *st = iio_priv(indio_dev);
117 struct iio_buffer *ring = indio_dev->buffer;
118 int i = 0, j, ret = 0; 117 int i = 0, j, ret = 0;
119 s16 *data; 118 s16 *data;
120 119
@@ -148,9 +147,9 @@ static irqreturn_t adis16400_trigger_handler(int irq, void *p)
148 } 147 }
149 } 148 }
150 /* Guaranteed to be aligned with 8 byte boundary */ 149 /* Guaranteed to be aligned with 8 byte boundary */
151 if (ring->scan_timestamp) 150 if (indio_dev->scan_timestamp)
152 *((s64 *)(data + ((i + 3)/4)*4)) = pf->timestamp; 151 *((s64 *)(data + ((i + 3)/4)*4)) = pf->timestamp;
153 iio_push_to_buffer(ring, (u8 *) data); 152 iio_push_to_buffers(indio_dev, (u8 *) data);
154 153
155done: 154done:
156 kfree(data); 155 kfree(data);
diff --git a/drivers/staging/iio/light/isl29018.c b/drivers/staging/iio/light/isl29018.c
index 6ee5567d9813..b0adac0bf5d5 100644
--- a/drivers/staging/iio/light/isl29018.c
+++ b/drivers/staging/iio/light/isl29018.c
@@ -67,6 +67,7 @@ struct isl29018_chip {
67 unsigned int range; 67 unsigned int range;
68 unsigned int adc_bit; 68 unsigned int adc_bit;
69 int prox_scheme; 69 int prox_scheme;
70 bool suspended;
70}; 71};
71 72
72static int isl29018_set_range(struct isl29018_chip *chip, unsigned long range, 73static int isl29018_set_range(struct isl29018_chip *chip, unsigned long range,
@@ -355,7 +356,7 @@ static int isl29018_write_raw(struct iio_dev *indio_dev,
355 } 356 }
356 mutex_unlock(&chip->lock); 357 mutex_unlock(&chip->lock);
357 358
358 return 0; 359 return ret;
359} 360}
360 361
361static int isl29018_read_raw(struct iio_dev *indio_dev, 362static int isl29018_read_raw(struct iio_dev *indio_dev,
@@ -368,6 +369,10 @@ static int isl29018_read_raw(struct iio_dev *indio_dev,
368 struct isl29018_chip *chip = iio_priv(indio_dev); 369 struct isl29018_chip *chip = iio_priv(indio_dev);
369 370
370 mutex_lock(&chip->lock); 371 mutex_lock(&chip->lock);
372 if (chip->suspended) {
373 mutex_unlock(&chip->lock);
374 return -EBUSY;
375 }
371 switch (mask) { 376 switch (mask) {
372 case IIO_CHAN_INFO_RAW: 377 case IIO_CHAN_INFO_RAW:
373 case IIO_CHAN_INFO_PROCESSED: 378 case IIO_CHAN_INFO_PROCESSED:
@@ -538,7 +543,7 @@ static const struct regmap_config isl29018_regmap_config = {
538 .cache_type = REGCACHE_RBTREE, 543 .cache_type = REGCACHE_RBTREE,
539}; 544};
540 545
541static int __devinit isl29018_probe(struct i2c_client *client, 546static int isl29018_probe(struct i2c_client *client,
542 const struct i2c_device_id *id) 547 const struct i2c_device_id *id)
543{ 548{
544 struct isl29018_chip *chip; 549 struct isl29018_chip *chip;
@@ -561,6 +566,7 @@ static int __devinit isl29018_probe(struct i2c_client *client,
561 chip->lux_scale = 1; 566 chip->lux_scale = 1;
562 chip->range = 1000; 567 chip->range = 1000;
563 chip->adc_bit = 16; 568 chip->adc_bit = 16;
569 chip->suspended = false;
564 570
565 chip->regmap = devm_regmap_init_i2c(client, &isl29018_regmap_config); 571 chip->regmap = devm_regmap_init_i2c(client, &isl29018_regmap_config);
566 if (IS_ERR(chip->regmap)) { 572 if (IS_ERR(chip->regmap)) {
@@ -592,7 +598,7 @@ exit:
592 return err; 598 return err;
593} 599}
594 600
595static int __devexit isl29018_remove(struct i2c_client *client) 601static int isl29018_remove(struct i2c_client *client)
596{ 602{
597 struct iio_dev *indio_dev = i2c_get_clientdata(client); 603 struct iio_dev *indio_dev = i2c_get_clientdata(client);
598 604
@@ -603,6 +609,44 @@ static int __devexit isl29018_remove(struct i2c_client *client)
603 return 0; 609 return 0;
604} 610}
605 611
612#ifdef CONFIG_PM_SLEEP
613static int isl29018_suspend(struct device *dev)
614{
615 struct isl29018_chip *chip = iio_priv(dev_get_drvdata(dev));
616
617 mutex_lock(&chip->lock);
618
619 /* Since this driver uses only polling commands, we are by default in
620 * auto shutdown (ie, power-down) mode.
621 * So we do not have much to do here.
622 */
623 chip->suspended = true;
624
625 mutex_unlock(&chip->lock);
626 return 0;
627}
628
629static int isl29018_resume(struct device *dev)
630{
631 struct isl29018_chip *chip = iio_priv(dev_get_drvdata(dev));
632 int err;
633
634 mutex_lock(&chip->lock);
635
636 err = isl29018_chip_init(chip);
637 if (!err)
638 chip->suspended = false;
639
640 mutex_unlock(&chip->lock);
641 return err;
642}
643
644static SIMPLE_DEV_PM_OPS(isl29018_pm_ops, isl29018_suspend, isl29018_resume);
645#define ISL29018_PM_OPS (&isl29018_pm_ops)
646#else
647#define ISL29018_PM_OPS NULL
648#endif
649
606static const struct i2c_device_id isl29018_id[] = { 650static const struct i2c_device_id isl29018_id[] = {
607 {"isl29018", 0}, 651 {"isl29018", 0},
608 {} 652 {}
@@ -620,11 +664,12 @@ static struct i2c_driver isl29018_driver = {
620 .class = I2C_CLASS_HWMON, 664 .class = I2C_CLASS_HWMON,
621 .driver = { 665 .driver = {
622 .name = "isl29018", 666 .name = "isl29018",
667 .pm = ISL29018_PM_OPS,
623 .owner = THIS_MODULE, 668 .owner = THIS_MODULE,
624 .of_match_table = isl29018_of_match, 669 .of_match_table = isl29018_of_match,
625 }, 670 },
626 .probe = isl29018_probe, 671 .probe = isl29018_probe,
627 .remove = __devexit_p(isl29018_remove), 672 .remove = isl29018_remove,
628 .id_table = isl29018_id, 673 .id_table = isl29018_id,
629}; 674};
630module_i2c_driver(isl29018_driver); 675module_i2c_driver(isl29018_driver);
diff --git a/drivers/staging/iio/light/isl29028.c b/drivers/staging/iio/light/isl29028.c
index 33a4c3f94a14..e52af77f7782 100644
--- a/drivers/staging/iio/light/isl29028.c
+++ b/drivers/staging/iio/light/isl29028.c
@@ -475,7 +475,7 @@ static const struct regmap_config isl29028_regmap_config = {
475 .cache_type = REGCACHE_RBTREE, 475 .cache_type = REGCACHE_RBTREE,
476}; 476};
477 477
478static int __devinit isl29028_probe(struct i2c_client *client, 478static int isl29028_probe(struct i2c_client *client,
479 const struct i2c_device_id *id) 479 const struct i2c_device_id *id)
480{ 480{
481 struct isl29028_chip *chip; 481 struct isl29028_chip *chip;
@@ -526,7 +526,7 @@ exit_iio_free:
526 return ret; 526 return ret;
527} 527}
528 528
529static int __devexit isl29028_remove(struct i2c_client *client) 529static int isl29028_remove(struct i2c_client *client)
530{ 530{
531 struct iio_dev *indio_dev = i2c_get_clientdata(client); 531 struct iio_dev *indio_dev = i2c_get_clientdata(client);
532 532
@@ -555,7 +555,7 @@ static struct i2c_driver isl29028_driver = {
555 .of_match_table = isl29028_of_match, 555 .of_match_table = isl29028_of_match,
556 }, 556 },
557 .probe = isl29028_probe, 557 .probe = isl29028_probe,
558 .remove = __devexit_p(isl29028_remove), 558 .remove = isl29028_remove,
559 .id_table = isl29028_id, 559 .id_table = isl29028_id,
560}; 560};
561 561
diff --git a/drivers/staging/iio/light/tsl2563.c b/drivers/staging/iio/light/tsl2563.c
index 954ca2c172c6..1a9adc020f64 100644
--- a/drivers/staging/iio/light/tsl2563.c
+++ b/drivers/staging/iio/light/tsl2563.c
@@ -652,7 +652,7 @@ static int tsl2563_write_interrupt_config(struct iio_dev *indio_dev,
652 } 652 }
653 653
654 if (!state && (chip->intr & 0x30)) { 654 if (!state && (chip->intr & 0x30)) {
655 chip->intr |= ~0x30; 655 chip->intr &= ~0x30;
656 ret = i2c_smbus_write_byte_data(chip->client, 656 ret = i2c_smbus_write_byte_data(chip->client,
657 TSL2563_CMD | TSL2563_REG_INT, 657 TSL2563_CMD | TSL2563_REG_INT,
658 chip->intr); 658 chip->intr);
@@ -705,7 +705,7 @@ static const struct iio_info tsl2563_info = {
705 .write_event_config = &tsl2563_write_interrupt_config, 705 .write_event_config = &tsl2563_write_interrupt_config,
706}; 706};
707 707
708static int __devinit tsl2563_probe(struct i2c_client *client, 708static int tsl2563_probe(struct i2c_client *client,
709 const struct i2c_device_id *device_id) 709 const struct i2c_device_id *device_id)
710{ 710{
711 struct iio_dev *indio_dev; 711 struct iio_dev *indio_dev;
@@ -805,7 +805,7 @@ fail1:
805 return err; 805 return err;
806} 806}
807 807
808static int __devexit tsl2563_remove(struct i2c_client *client) 808static int tsl2563_remove(struct i2c_client *client)
809{ 809{
810 struct tsl2563_chip *chip = i2c_get_clientdata(client); 810 struct tsl2563_chip *chip = i2c_get_clientdata(client);
811 struct iio_dev *indio_dev = iio_priv_to_dev(chip); 811 struct iio_dev *indio_dev = iio_priv_to_dev(chip);
@@ -814,7 +814,7 @@ static int __devexit tsl2563_remove(struct i2c_client *client)
814 if (!chip->int_enabled) 814 if (!chip->int_enabled)
815 cancel_delayed_work(&chip->poweroff_work); 815 cancel_delayed_work(&chip->poweroff_work);
816 /* Ensure that interrupts are disabled - then flush any bottom halves */ 816 /* Ensure that interrupts are disabled - then flush any bottom halves */
817 chip->intr |= ~0x30; 817 chip->intr &= ~0x30;
818 i2c_smbus_write_byte_data(chip->client, TSL2563_CMD | TSL2563_REG_INT, 818 i2c_smbus_write_byte_data(chip->client, TSL2563_CMD | TSL2563_REG_INT,
819 chip->intr); 819 chip->intr);
820 flush_scheduled_work(); 820 flush_scheduled_work();
@@ -889,7 +889,7 @@ static struct i2c_driver tsl2563_i2c_driver = {
889 .pm = TSL2563_PM_OPS, 889 .pm = TSL2563_PM_OPS,
890 }, 890 },
891 .probe = tsl2563_probe, 891 .probe = tsl2563_probe,
892 .remove = __devexit_p(tsl2563_remove), 892 .remove = tsl2563_remove,
893 .id_table = tsl2563_id, 893 .id_table = tsl2563_id,
894}; 894};
895module_i2c_driver(tsl2563_i2c_driver); 895module_i2c_driver(tsl2563_i2c_driver);
diff --git a/drivers/staging/iio/light/tsl2583.c b/drivers/staging/iio/light/tsl2583.c
index 6d2f4c659e56..b377dd3b76ad 100644
--- a/drivers/staging/iio/light/tsl2583.c
+++ b/drivers/staging/iio/light/tsl2583.c
@@ -799,7 +799,7 @@ static const struct iio_info tsl2583_info = {
799 * Client probe function - When a valid device is found, the driver's device 799 * Client probe function - When a valid device is found, the driver's device
800 * data structure is updated, and initialization completes successfully. 800 * data structure is updated, and initialization completes successfully.
801 */ 801 */
802static int __devinit taos_probe(struct i2c_client *clientp, 802static int taos_probe(struct i2c_client *clientp,
803 const struct i2c_device_id *idp) 803 const struct i2c_device_id *idp)
804{ 804{
805 int i, ret; 805 int i, ret;
@@ -923,7 +923,7 @@ static SIMPLE_DEV_PM_OPS(taos_pm_ops, taos_suspend, taos_resume);
923#define TAOS_PM_OPS NULL 923#define TAOS_PM_OPS NULL
924#endif 924#endif
925 925
926static int __devexit taos_remove(struct i2c_client *client) 926static int taos_remove(struct i2c_client *client)
927{ 927{
928 iio_device_unregister(i2c_get_clientdata(client)); 928 iio_device_unregister(i2c_get_clientdata(client));
929 iio_device_free(i2c_get_clientdata(client)); 929 iio_device_free(i2c_get_clientdata(client));
@@ -947,7 +947,7 @@ static struct i2c_driver taos_driver = {
947 }, 947 },
948 .id_table = taos_idtable, 948 .id_table = taos_idtable,
949 .probe = taos_probe, 949 .probe = taos_probe,
950 .remove = __devexit_p(taos_remove), 950 .remove = taos_remove,
951}; 951};
952module_i2c_driver(taos_driver); 952module_i2c_driver(taos_driver);
953 953
diff --git a/drivers/staging/iio/light/tsl2x7x_core.c b/drivers/staging/iio/light/tsl2x7x_core.c
index 497a977ae411..9e50fbbadf9d 100644
--- a/drivers/staging/iio/light/tsl2x7x_core.c
+++ b/drivers/staging/iio/light/tsl2x7x_core.c
@@ -1897,7 +1897,7 @@ static const struct tsl2x7x_chip_info tsl2x7x_chip_info_tbl[] = {
1897 }, 1897 },
1898}; 1898};
1899 1899
1900static int __devinit tsl2x7x_probe(struct i2c_client *clientp, 1900static int tsl2x7x_probe(struct i2c_client *clientp,
1901 const struct i2c_device_id *id) 1901 const struct i2c_device_id *id)
1902{ 1902{
1903 int ret; 1903 int ret;
@@ -2026,7 +2026,7 @@ static int tsl2x7x_resume(struct device *dev)
2026 return ret; 2026 return ret;
2027} 2027}
2028 2028
2029static int __devexit tsl2x7x_remove(struct i2c_client *client) 2029static int tsl2x7x_remove(struct i2c_client *client)
2030{ 2030{
2031 struct iio_dev *indio_dev = i2c_get_clientdata(client); 2031 struct iio_dev *indio_dev = i2c_get_clientdata(client);
2032 2032
@@ -2070,7 +2070,7 @@ static struct i2c_driver tsl2x7x_driver = {
2070 }, 2070 },
2071 .id_table = tsl2x7x_idtable, 2071 .id_table = tsl2x7x_idtable,
2072 .probe = tsl2x7x_probe, 2072 .probe = tsl2x7x_probe,
2073 .remove = __devexit_p(tsl2x7x_remove), 2073 .remove = tsl2x7x_remove,
2074}; 2074};
2075 2075
2076module_i2c_driver(tsl2x7x_driver); 2076module_i2c_driver(tsl2x7x_driver);
diff --git a/drivers/staging/iio/magnetometer/ak8975.c b/drivers/staging/iio/magnetometer/ak8975.c
index 01b4b07c227b..28f080e9eeee 100644
--- a/drivers/staging/iio/magnetometer/ak8975.c
+++ b/drivers/staging/iio/magnetometer/ak8975.c
@@ -409,7 +409,7 @@ static const struct iio_info ak8975_info = {
409 .driver_module = THIS_MODULE, 409 .driver_module = THIS_MODULE,
410}; 410};
411 411
412static int __devinit ak8975_probe(struct i2c_client *client, 412static int ak8975_probe(struct i2c_client *client,
413 const struct i2c_device_id *id) 413 const struct i2c_device_id *id)
414{ 414{
415 struct ak8975_data *data; 415 struct ak8975_data *data;
@@ -475,7 +475,7 @@ exit:
475 return err; 475 return err;
476} 476}
477 477
478static int __devexit ak8975_remove(struct i2c_client *client) 478static int ak8975_remove(struct i2c_client *client)
479{ 479{
480 struct iio_dev *indio_dev = i2c_get_clientdata(client); 480 struct iio_dev *indio_dev = i2c_get_clientdata(client);
481 struct ak8975_data *data = iio_priv(indio_dev); 481 struct ak8975_data *data = iio_priv(indio_dev);
@@ -510,7 +510,7 @@ static struct i2c_driver ak8975_driver = {
510 .of_match_table = ak8975_of_match, 510 .of_match_table = ak8975_of_match,
511 }, 511 },
512 .probe = ak8975_probe, 512 .probe = ak8975_probe,
513 .remove = __devexit_p(ak8975_remove), 513 .remove = ak8975_remove,
514 .id_table = ak8975_id, 514 .id_table = ak8975_id,
515}; 515};
516module_i2c_driver(ak8975_driver); 516module_i2c_driver(ak8975_driver);
diff --git a/drivers/staging/iio/magnetometer/hmc5843.c b/drivers/staging/iio/magnetometer/hmc5843.c
index 10e095486e54..1a520ecfa3e2 100644
--- a/drivers/staging/iio/magnetometer/hmc5843.c
+++ b/drivers/staging/iio/magnetometer/hmc5843.c
@@ -555,7 +555,7 @@ static int hmc5843_read_raw(struct iio_dev *indio_dev,
555 *val = 0; 555 *val = 0;
556 *val2 = data->variant->regval_to_nanoscale[data->range]; 556 *val2 = data->variant->regval_to_nanoscale[data->range];
557 return IIO_VAL_INT_PLUS_NANO; 557 return IIO_VAL_INT_PLUS_NANO;
558 }; 558 }
559 return -EINVAL; 559 return -EINVAL;
560} 560}
561 561
@@ -665,7 +665,7 @@ static const struct iio_info hmc5843_info = {
665 .driver_module = THIS_MODULE, 665 .driver_module = THIS_MODULE,
666}; 666};
667 667
668static int __devinit hmc5843_probe(struct i2c_client *client, 668static int hmc5843_probe(struct i2c_client *client,
669 const struct i2c_device_id *id) 669 const struct i2c_device_id *id)
670{ 670{
671 struct hmc5843_data *data; 671 struct hmc5843_data *data;
@@ -704,7 +704,7 @@ exit:
704 return err; 704 return err;
705} 705}
706 706
707static int __devexit hmc5843_remove(struct i2c_client *client) 707static int hmc5843_remove(struct i2c_client *client)
708{ 708{
709 struct iio_dev *indio_dev = i2c_get_clientdata(client); 709 struct iio_dev *indio_dev = i2c_get_clientdata(client);
710 710
@@ -755,7 +755,7 @@ static struct i2c_driver hmc5843_driver = {
755 }, 755 },
756 .id_table = hmc5843_id, 756 .id_table = hmc5843_id,
757 .probe = hmc5843_probe, 757 .probe = hmc5843_probe,
758 .remove = __devexit_p(hmc5843_remove), 758 .remove = hmc5843_remove,
759 .detect = hmc5843_detect, 759 .detect = hmc5843_detect,
760 .address_list = normal_i2c, 760 .address_list = normal_i2c,
761}; 761};
diff --git a/drivers/staging/iio/meter/ade7753.c b/drivers/staging/iio/meter/ade7753.c
index 8b9eceb66b37..51c3bdece785 100644
--- a/drivers/staging/iio/meter/ade7753.c
+++ b/drivers/staging/iio/meter/ade7753.c
@@ -512,7 +512,7 @@ static const struct iio_info ade7753_info = {
512 .driver_module = THIS_MODULE, 512 .driver_module = THIS_MODULE,
513}; 513};
514 514
515static int __devinit ade7753_probe(struct spi_device *spi) 515static int ade7753_probe(struct spi_device *spi)
516{ 516{
517 int ret; 517 int ret;
518 struct ade7753_state *st; 518 struct ade7753_state *st;
@@ -555,7 +555,7 @@ error_ret:
555} 555}
556 556
557/* fixme, confirm ordering in this function */ 557/* fixme, confirm ordering in this function */
558static int __devexit ade7753_remove(struct spi_device *spi) 558static int ade7753_remove(struct spi_device *spi)
559{ 559{
560 struct iio_dev *indio_dev = spi_get_drvdata(spi); 560 struct iio_dev *indio_dev = spi_get_drvdata(spi);
561 561
@@ -572,7 +572,7 @@ static struct spi_driver ade7753_driver = {
572 .owner = THIS_MODULE, 572 .owner = THIS_MODULE,
573 }, 573 },
574 .probe = ade7753_probe, 574 .probe = ade7753_probe,
575 .remove = __devexit_p(ade7753_remove), 575 .remove = ade7753_remove,
576}; 576};
577module_spi_driver(ade7753_driver); 577module_spi_driver(ade7753_driver);
578 578
diff --git a/drivers/staging/iio/meter/ade7753.h b/drivers/staging/iio/meter/ade7753.h
index 3f059d3d9392..a9d93cc1c414 100644
--- a/drivers/staging/iio/meter/ade7753.h
+++ b/drivers/staging/iio/meter/ade7753.h
@@ -55,8 +55,6 @@
55#define ADE7753_SPI_BURST (u32)(1000 * 1000) 55#define ADE7753_SPI_BURST (u32)(1000 * 1000)
56#define ADE7753_SPI_FAST (u32)(2000 * 1000) 56#define ADE7753_SPI_FAST (u32)(2000 * 1000)
57 57
58#define DRIVER_NAME "ade7753"
59
60/** 58/**
61 * struct ade7753_state - device instance specific data 59 * struct ade7753_state - device instance specific data
62 * @us: actual spi_device 60 * @us: actual spi_device
diff --git a/drivers/staging/iio/meter/ade7754.c b/drivers/staging/iio/meter/ade7754.c
index 76e0adee96ea..b50c89e93993 100644
--- a/drivers/staging/iio/meter/ade7754.c
+++ b/drivers/staging/iio/meter/ade7754.c
@@ -535,7 +535,7 @@ static const struct iio_info ade7754_info = {
535 .driver_module = THIS_MODULE, 535 .driver_module = THIS_MODULE,
536}; 536};
537 537
538static int __devinit ade7754_probe(struct spi_device *spi) 538static int ade7754_probe(struct spi_device *spi)
539{ 539{
540 int ret; 540 int ret;
541 struct ade7754_state *st; 541 struct ade7754_state *st;
@@ -577,7 +577,7 @@ error_ret:
577} 577}
578 578
579/* fixme, confirm ordering in this function */ 579/* fixme, confirm ordering in this function */
580static int __devexit ade7754_remove(struct spi_device *spi) 580static int ade7754_remove(struct spi_device *spi)
581{ 581{
582 struct iio_dev *indio_dev = spi_get_drvdata(spi); 582 struct iio_dev *indio_dev = spi_get_drvdata(spi);
583 583
@@ -594,7 +594,7 @@ static struct spi_driver ade7754_driver = {
594 .owner = THIS_MODULE, 594 .owner = THIS_MODULE,
595 }, 595 },
596 .probe = ade7754_probe, 596 .probe = ade7754_probe,
597 .remove = __devexit_p(ade7754_remove), 597 .remove = ade7754_remove,
598}; 598};
599module_spi_driver(ade7754_driver); 599module_spi_driver(ade7754_driver);
600 600
diff --git a/drivers/staging/iio/meter/ade7754.h b/drivers/staging/iio/meter/ade7754.h
index 6121125520f6..e42ffc387a14 100644
--- a/drivers/staging/iio/meter/ade7754.h
+++ b/drivers/staging/iio/meter/ade7754.h
@@ -73,8 +73,6 @@
73#define ADE7754_SPI_BURST (u32)(1000 * 1000) 73#define ADE7754_SPI_BURST (u32)(1000 * 1000)
74#define ADE7754_SPI_FAST (u32)(2000 * 1000) 74#define ADE7754_SPI_FAST (u32)(2000 * 1000)
75 75
76#define DRIVER_NAME "ade7754"
77
78/** 76/**
79 * struct ade7754_state - device instance specific data 77 * struct ade7754_state - device instance specific data
80 * @us: actual spi_device 78 * @us: actual spi_device
diff --git a/drivers/staging/iio/meter/ade7758.h b/drivers/staging/iio/meter/ade7758.h
index 1e11ad5ae5a4..07318203a836 100644
--- a/drivers/staging/iio/meter/ade7758.h
+++ b/drivers/staging/iio/meter/ade7758.h
@@ -105,9 +105,6 @@
105#define AD7758_APP_PWR 4 105#define AD7758_APP_PWR 4
106#define AD7758_WT(p, w) (((w) << 2) | (p)) 106#define AD7758_WT(p, w) (((w) << 2) | (p))
107 107
108#define DRIVER_NAME "ade7758"
109
110
111/** 108/**
112 * struct ade7758_state - device instance specific data 109 * struct ade7758_state - device instance specific data
113 * @us: actual spi_device 110 * @us: actual spi_device
diff --git a/drivers/staging/iio/meter/ade7758_core.c b/drivers/staging/iio/meter/ade7758_core.c
index a0fef77d8e5e..3454e5154ed2 100644
--- a/drivers/staging/iio/meter/ade7758_core.c
+++ b/drivers/staging/iio/meter/ade7758_core.c
@@ -881,7 +881,7 @@ static const struct iio_info ade7758_info = {
881 .driver_module = THIS_MODULE, 881 .driver_module = THIS_MODULE,
882}; 882};
883 883
884static int __devinit ade7758_probe(struct spi_device *spi) 884static int ade7758_probe(struct spi_device *spi)
885{ 885{
886 int ret; 886 int ret;
887 struct ade7758_state *st; 887 struct ade7758_state *st;
@@ -962,7 +962,7 @@ error_ret:
962 return ret; 962 return ret;
963} 963}
964 964
965static int __devexit ade7758_remove(struct spi_device *spi) 965static int ade7758_remove(struct spi_device *spi)
966{ 966{
967 struct iio_dev *indio_dev = spi_get_drvdata(spi); 967 struct iio_dev *indio_dev = spi_get_drvdata(spi);
968 struct ade7758_state *st = iio_priv(indio_dev); 968 struct ade7758_state *st = iio_priv(indio_dev);
@@ -992,7 +992,7 @@ static struct spi_driver ade7758_driver = {
992 .owner = THIS_MODULE, 992 .owner = THIS_MODULE,
993 }, 993 },
994 .probe = ade7758_probe, 994 .probe = ade7758_probe,
995 .remove = __devexit_p(ade7758_remove), 995 .remove = ade7758_remove,
996 .id_table = ade7758_id, 996 .id_table = ade7758_id,
997}; 997};
998module_spi_driver(ade7758_driver); 998module_spi_driver(ade7758_driver);
diff --git a/drivers/staging/iio/meter/ade7758_ring.c b/drivers/staging/iio/meter/ade7758_ring.c
index 9e49baccf660..4552a4c7fe33 100644
--- a/drivers/staging/iio/meter/ade7758_ring.c
+++ b/drivers/staging/iio/meter/ade7758_ring.c
@@ -73,7 +73,7 @@ static irqreturn_t ade7758_trigger_handler(int irq, void *p)
73 if (indio_dev->scan_timestamp) 73 if (indio_dev->scan_timestamp)
74 dat64[1] = pf->timestamp; 74 dat64[1] = pf->timestamp;
75 75
76 iio_push_to_buffer(indio_dev->buffer, (u8 *)dat64); 76 iio_push_to_buffers(indio_dev, (u8 *)dat64);
77 77
78 iio_trigger_notify_done(indio_dev->trig); 78 iio_trigger_notify_done(indio_dev->trig);
79 79
diff --git a/drivers/staging/iio/meter/ade7759.c b/drivers/staging/iio/meter/ade7759.c
index cb0707cbc347..10b911bd3853 100644
--- a/drivers/staging/iio/meter/ade7759.c
+++ b/drivers/staging/iio/meter/ade7759.c
@@ -458,7 +458,7 @@ static const struct iio_info ade7759_info = {
458 .driver_module = THIS_MODULE, 458 .driver_module = THIS_MODULE,
459}; 459};
460 460
461static int __devinit ade7759_probe(struct spi_device *spi) 461static int ade7759_probe(struct spi_device *spi)
462{ 462{
463 int ret; 463 int ret;
464 struct ade7759_state *st; 464 struct ade7759_state *st;
@@ -499,7 +499,7 @@ error_ret:
499} 499}
500 500
501/* fixme, confirm ordering in this function */ 501/* fixme, confirm ordering in this function */
502static int __devexit ade7759_remove(struct spi_device *spi) 502static int ade7759_remove(struct spi_device *spi)
503{ 503{
504 struct iio_dev *indio_dev = spi_get_drvdata(spi); 504 struct iio_dev *indio_dev = spi_get_drvdata(spi);
505 505
@@ -516,7 +516,7 @@ static struct spi_driver ade7759_driver = {
516 .owner = THIS_MODULE, 516 .owner = THIS_MODULE,
517 }, 517 },
518 .probe = ade7759_probe, 518 .probe = ade7759_probe,
519 .remove = __devexit_p(ade7759_remove), 519 .remove = ade7759_remove,
520}; 520};
521module_spi_driver(ade7759_driver); 521module_spi_driver(ade7759_driver);
522 522
diff --git a/drivers/staging/iio/meter/ade7759.h b/drivers/staging/iio/meter/ade7759.h
index c81d23d730d2..f9ff1f8e7372 100644
--- a/drivers/staging/iio/meter/ade7759.h
+++ b/drivers/staging/iio/meter/ade7759.h
@@ -36,8 +36,6 @@
36#define ADE7759_SPI_BURST (u32)(1000 * 1000) 36#define ADE7759_SPI_BURST (u32)(1000 * 1000)
37#define ADE7759_SPI_FAST (u32)(2000 * 1000) 37#define ADE7759_SPI_FAST (u32)(2000 * 1000)
38 38
39#define DRIVER_NAME "ade7759"
40
41/** 39/**
42 * struct ade7759_state - device instance specific data 40 * struct ade7759_state - device instance specific data
43 * @us: actual spi_device 41 * @us: actual spi_device
diff --git a/drivers/staging/iio/meter/ade7854-i2c.c b/drivers/staging/iio/meter/ade7854-i2c.c
index 06090465fa5f..db9ef6c86c1e 100644
--- a/drivers/staging/iio/meter/ade7854-i2c.c
+++ b/drivers/staging/iio/meter/ade7854-i2c.c
@@ -201,7 +201,7 @@ out:
201 return ret; 201 return ret;
202} 202}
203 203
204static int __devinit ade7854_i2c_probe(struct i2c_client *client, 204static int ade7854_i2c_probe(struct i2c_client *client,
205 const struct i2c_device_id *id) 205 const struct i2c_device_id *id)
206{ 206{
207 int ret; 207 int ret;
@@ -231,7 +231,7 @@ static int __devinit ade7854_i2c_probe(struct i2c_client *client,
231 return ret; 231 return ret;
232} 232}
233 233
234static int __devexit ade7854_i2c_remove(struct i2c_client *client) 234static int ade7854_i2c_remove(struct i2c_client *client)
235{ 235{
236 return ade7854_remove(i2c_get_clientdata(client)); 236 return ade7854_remove(i2c_get_clientdata(client));
237} 237}
@@ -250,7 +250,7 @@ static struct i2c_driver ade7854_i2c_driver = {
250 .name = "ade7854", 250 .name = "ade7854",
251 }, 251 },
252 .probe = ade7854_i2c_probe, 252 .probe = ade7854_i2c_probe,
253 .remove = __devexit_p(ade7854_i2c_remove), 253 .remove = ade7854_i2c_remove,
254 .id_table = ade7854_id, 254 .id_table = ade7854_id,
255}; 255};
256module_i2c_driver(ade7854_i2c_driver); 256module_i2c_driver(ade7854_i2c_driver);
diff --git a/drivers/staging/iio/meter/ade7854-spi.c b/drivers/staging/iio/meter/ade7854-spi.c
index 7dae03573428..f0984fa1cbb9 100644
--- a/drivers/staging/iio/meter/ade7854-spi.c
+++ b/drivers/staging/iio/meter/ade7854-spi.c
@@ -300,7 +300,7 @@ error_ret:
300 return ret; 300 return ret;
301} 301}
302 302
303static int __devinit ade7854_spi_probe(struct spi_device *spi) 303static int ade7854_spi_probe(struct spi_device *spi)
304{ 304{
305 int ret; 305 int ret;
306 struct ade7854_state *st; 306 struct ade7854_state *st;
@@ -330,7 +330,7 @@ static int __devinit ade7854_spi_probe(struct spi_device *spi)
330 return 0; 330 return 0;
331} 331}
332 332
333static int __devexit ade7854_spi_remove(struct spi_device *spi) 333static int ade7854_spi_remove(struct spi_device *spi)
334{ 334{
335 ade7854_remove(spi_get_drvdata(spi)); 335 ade7854_remove(spi_get_drvdata(spi));
336 336
@@ -351,7 +351,7 @@ static struct spi_driver ade7854_driver = {
351 .owner = THIS_MODULE, 351 .owner = THIS_MODULE,
352 }, 352 },
353 .probe = ade7854_spi_probe, 353 .probe = ade7854_spi_probe,
354 .remove = __devexit_p(ade7854_spi_remove), 354 .remove = ade7854_spi_remove,
355 .id_table = ade7854_id, 355 .id_table = ade7854_id,
356}; 356};
357module_spi_driver(ade7854_driver); 357module_spi_driver(ade7854_driver);
diff --git a/drivers/staging/iio/meter/ade7854.h b/drivers/staging/iio/meter/ade7854.h
index 2c96e8695d57..06534577f6c3 100644
--- a/drivers/staging/iio/meter/ade7854.h
+++ b/drivers/staging/iio/meter/ade7854.h
@@ -142,8 +142,6 @@
142#define ADE7854_SPI_BURST (u32)(1000 * 1000) 142#define ADE7854_SPI_BURST (u32)(1000 * 1000)
143#define ADE7854_SPI_FAST (u32)(2000 * 1000) 143#define ADE7854_SPI_FAST (u32)(2000 * 1000)
144 144
145#define DRIVER_NAME "ade7854"
146
147/** 145/**
148 * struct ade7854_state - device instance specific data 146 * struct ade7854_state - device instance specific data
149 * @spi: actual spi_device 147 * @spi: actual spi_device
diff --git a/drivers/staging/iio/resolver/ad2s1200.c b/drivers/staging/iio/resolver/ad2s1200.c
index 8b71eb0e16f5..4fe349914f9a 100644
--- a/drivers/staging/iio/resolver/ad2s1200.c
+++ b/drivers/staging/iio/resolver/ad2s1200.c
@@ -99,7 +99,7 @@ static const struct iio_info ad2s1200_info = {
99 .driver_module = THIS_MODULE, 99 .driver_module = THIS_MODULE,
100}; 100};
101 101
102static int __devinit ad2s1200_probe(struct spi_device *spi) 102static int ad2s1200_probe(struct spi_device *spi)
103{ 103{
104 struct ad2s1200_state *st; 104 struct ad2s1200_state *st;
105 struct iio_dev *indio_dev; 105 struct iio_dev *indio_dev;
@@ -149,7 +149,7 @@ error_ret:
149 return ret; 149 return ret;
150} 150}
151 151
152static int __devexit ad2s1200_remove(struct spi_device *spi) 152static int ad2s1200_remove(struct spi_device *spi)
153{ 153{
154 iio_device_unregister(spi_get_drvdata(spi)); 154 iio_device_unregister(spi_get_drvdata(spi));
155 iio_device_free(spi_get_drvdata(spi)); 155 iio_device_free(spi_get_drvdata(spi));
@@ -170,7 +170,7 @@ static struct spi_driver ad2s1200_driver = {
170 .owner = THIS_MODULE, 170 .owner = THIS_MODULE,
171 }, 171 },
172 .probe = ad2s1200_probe, 172 .probe = ad2s1200_probe,
173 .remove = __devexit_p(ad2s1200_remove), 173 .remove = ad2s1200_remove,
174 .id_table = ad2s1200_id, 174 .id_table = ad2s1200_id,
175}; 175};
176module_spi_driver(ad2s1200_driver); 176module_spi_driver(ad2s1200_driver);
diff --git a/drivers/staging/iio/resolver/ad2s1210.c b/drivers/staging/iio/resolver/ad2s1210.c
index 4ba4d05ed423..ed07a348eb55 100644
--- a/drivers/staging/iio/resolver/ad2s1210.c
+++ b/drivers/staging/iio/resolver/ad2s1210.c
@@ -610,7 +610,7 @@ static const struct attribute_group ad2s1210_attribute_group = {
610 .attrs = ad2s1210_attributes, 610 .attrs = ad2s1210_attributes,
611}; 611};
612 612
613static int __devinit ad2s1210_initial(struct ad2s1210_state *st) 613static int ad2s1210_initial(struct ad2s1210_state *st)
614{ 614{
615 unsigned char data; 615 unsigned char data;
616 int ret; 616 int ret;
@@ -681,7 +681,7 @@ static void ad2s1210_free_gpios(struct ad2s1210_state *st)
681 gpio_free_array(ad2s1210_gpios, ARRAY_SIZE(ad2s1210_gpios)); 681 gpio_free_array(ad2s1210_gpios, ARRAY_SIZE(ad2s1210_gpios));
682} 682}
683 683
684static int __devinit ad2s1210_probe(struct spi_device *spi) 684static int ad2s1210_probe(struct spi_device *spi)
685{ 685{
686 struct iio_dev *indio_dev; 686 struct iio_dev *indio_dev;
687 struct ad2s1210_state *st; 687 struct ad2s1210_state *st;
@@ -736,7 +736,7 @@ error_ret:
736 return ret; 736 return ret;
737} 737}
738 738
739static int __devexit ad2s1210_remove(struct spi_device *spi) 739static int ad2s1210_remove(struct spi_device *spi)
740{ 740{
741 struct iio_dev *indio_dev = spi_get_drvdata(spi); 741 struct iio_dev *indio_dev = spi_get_drvdata(spi);
742 742
@@ -759,7 +759,7 @@ static struct spi_driver ad2s1210_driver = {
759 .owner = THIS_MODULE, 759 .owner = THIS_MODULE,
760 }, 760 },
761 .probe = ad2s1210_probe, 761 .probe = ad2s1210_probe,
762 .remove = __devexit_p(ad2s1210_remove), 762 .remove = ad2s1210_remove,
763 .id_table = ad2s1210_id, 763 .id_table = ad2s1210_id,
764}; 764};
765module_spi_driver(ad2s1210_driver); 765module_spi_driver(ad2s1210_driver);
diff --git a/drivers/staging/iio/resolver/ad2s90.c b/drivers/staging/iio/resolver/ad2s90.c
index a8057228dca1..0aecfbcdb992 100644
--- a/drivers/staging/iio/resolver/ad2s90.c
+++ b/drivers/staging/iio/resolver/ad2s90.c
@@ -58,7 +58,7 @@ static const struct iio_chan_spec ad2s90_chan = {
58 .info_mask = IIO_CHAN_INFO_RAW_SEPARATE_BIT, 58 .info_mask = IIO_CHAN_INFO_RAW_SEPARATE_BIT,
59}; 59};
60 60
61static int __devinit ad2s90_probe(struct spi_device *spi) 61static int ad2s90_probe(struct spi_device *spi)
62{ 62{
63 struct iio_dev *indio_dev; 63 struct iio_dev *indio_dev;
64 struct ad2s90_state *st; 64 struct ad2s90_state *st;
@@ -98,7 +98,7 @@ error_ret:
98 return ret; 98 return ret;
99} 99}
100 100
101static int __devexit ad2s90_remove(struct spi_device *spi) 101static int ad2s90_remove(struct spi_device *spi)
102{ 102{
103 iio_device_unregister(spi_get_drvdata(spi)); 103 iio_device_unregister(spi_get_drvdata(spi));
104 iio_device_free(spi_get_drvdata(spi)); 104 iio_device_free(spi_get_drvdata(spi));
@@ -118,7 +118,7 @@ static struct spi_driver ad2s90_driver = {
118 .owner = THIS_MODULE, 118 .owner = THIS_MODULE,
119 }, 119 },
120 .probe = ad2s90_probe, 120 .probe = ad2s90_probe,
121 .remove = __devexit_p(ad2s90_remove), 121 .remove = ad2s90_remove,
122 .id_table = ad2s90_id, 122 .id_table = ad2s90_id,
123}; 123};
124module_spi_driver(ad2s90_driver); 124module_spi_driver(ad2s90_driver);
diff --git a/drivers/staging/iio/trigger/iio-trig-bfin-timer.c b/drivers/staging/iio/trigger/iio-trig-bfin-timer.c
index 52062d786f84..42798da575c0 100644
--- a/drivers/staging/iio/trigger/iio-trig-bfin-timer.c
+++ b/drivers/staging/iio/trigger/iio-trig-bfin-timer.c
@@ -180,7 +180,7 @@ static const struct iio_trigger_ops iio_bfin_tmr_trigger_ops = {
180 .set_trigger_state = iio_bfin_tmr_set_state, 180 .set_trigger_state = iio_bfin_tmr_set_state,
181}; 181};
182 182
183static int __devinit iio_bfin_tmr_trigger_probe(struct platform_device *pdev) 183static int iio_bfin_tmr_trigger_probe(struct platform_device *pdev)
184{ 184{
185 struct iio_bfin_timer_trigger_pdata *pdata = pdev->dev.platform_data; 185 struct iio_bfin_timer_trigger_pdata *pdata = pdev->dev.platform_data;
186 struct bfin_tmr_state *st; 186 struct bfin_tmr_state *st;
@@ -275,7 +275,7 @@ out:
275 return ret; 275 return ret;
276} 276}
277 277
278static int __devexit iio_bfin_tmr_trigger_remove(struct platform_device *pdev) 278static int iio_bfin_tmr_trigger_remove(struct platform_device *pdev)
279{ 279{
280 struct bfin_tmr_state *st = platform_get_drvdata(pdev); 280 struct bfin_tmr_state *st = platform_get_drvdata(pdev);
281 281
@@ -296,7 +296,7 @@ static struct platform_driver iio_bfin_tmr_trigger_driver = {
296 .owner = THIS_MODULE, 296 .owner = THIS_MODULE,
297 }, 297 },
298 .probe = iio_bfin_tmr_trigger_probe, 298 .probe = iio_bfin_tmr_trigger_probe,
299 .remove = __devexit_p(iio_bfin_tmr_trigger_remove), 299 .remove = iio_bfin_tmr_trigger_remove,
300}; 300};
301 301
302module_platform_driver(iio_bfin_tmr_trigger_driver); 302module_platform_driver(iio_bfin_tmr_trigger_driver);
diff --git a/drivers/staging/iio/trigger/iio-trig-gpio.c b/drivers/staging/iio/trigger/iio-trig-gpio.c
index 5ff4d7fa20fa..fcc4cb048c9a 100644
--- a/drivers/staging/iio/trigger/iio-trig-gpio.c
+++ b/drivers/staging/iio/trigger/iio-trig-gpio.c
@@ -51,7 +51,7 @@ static const struct iio_trigger_ops iio_gpio_trigger_ops = {
51 .owner = THIS_MODULE, 51 .owner = THIS_MODULE,
52}; 52};
53 53
54static int __devinit iio_gpio_trigger_probe(struct platform_device *pdev) 54static int iio_gpio_trigger_probe(struct platform_device *pdev)
55{ 55{
56 struct iio_gpio_trigger_info *trig_info; 56 struct iio_gpio_trigger_info *trig_info;
57 struct iio_trigger *trig, *trig2; 57 struct iio_trigger *trig, *trig2;
@@ -130,7 +130,7 @@ error_free_completed_registrations:
130 return ret; 130 return ret;
131} 131}
132 132
133static int __devexit iio_gpio_trigger_remove(struct platform_device *pdev) 133static int iio_gpio_trigger_remove(struct platform_device *pdev)
134{ 134{
135 struct iio_trigger *trig, *trig2; 135 struct iio_trigger *trig, *trig2;
136 struct iio_gpio_trigger_info *trig_info; 136 struct iio_gpio_trigger_info *trig_info;
@@ -153,7 +153,7 @@ static int __devexit iio_gpio_trigger_remove(struct platform_device *pdev)
153 153
154static struct platform_driver iio_gpio_trigger_driver = { 154static struct platform_driver iio_gpio_trigger_driver = {
155 .probe = iio_gpio_trigger_probe, 155 .probe = iio_gpio_trigger_probe,
156 .remove = __devexit_p(iio_gpio_trigger_remove), 156 .remove = iio_gpio_trigger_remove,
157 .driver = { 157 .driver = {
158 .name = "iio_gpio_trigger", 158 .name = "iio_gpio_trigger",
159 .owner = THIS_MODULE, 159 .owner = THIS_MODULE,
diff --git a/drivers/staging/iio/trigger/iio-trig-periodic-rtc.c b/drivers/staging/iio/trigger/iio-trig-periodic-rtc.c
index a3de76d70cdc..9102b1ba2530 100644
--- a/drivers/staging/iio/trigger/iio-trig-periodic-rtc.c
+++ b/drivers/staging/iio/trigger/iio-trig-periodic-rtc.c
@@ -101,7 +101,7 @@ static const struct iio_trigger_ops iio_prtc_trigger_ops = {
101 .set_trigger_state = &iio_trig_periodic_rtc_set_state, 101 .set_trigger_state = &iio_trig_periodic_rtc_set_state,
102}; 102};
103 103
104static int __devinit iio_trig_periodic_rtc_probe(struct platform_device *dev) 104static int iio_trig_periodic_rtc_probe(struct platform_device *dev)
105{ 105{
106 char **pdata = dev->dev.platform_data; 106 char **pdata = dev->dev.platform_data;
107 struct iio_prtc_trigger_info *trig_info; 107 struct iio_prtc_trigger_info *trig_info;
@@ -167,7 +167,7 @@ error_free_completed_registrations:
167 return ret; 167 return ret;
168} 168}
169 169
170static int __devexit iio_trig_periodic_rtc_remove(struct platform_device *dev) 170static int iio_trig_periodic_rtc_remove(struct platform_device *dev)
171{ 171{
172 struct iio_trigger *trig, *trig2; 172 struct iio_trigger *trig, *trig2;
173 struct iio_prtc_trigger_info *trig_info; 173 struct iio_prtc_trigger_info *trig_info;
@@ -188,7 +188,7 @@ static int __devexit iio_trig_periodic_rtc_remove(struct platform_device *dev)
188 188
189static struct platform_driver iio_trig_periodic_rtc_driver = { 189static struct platform_driver iio_trig_periodic_rtc_driver = {
190 .probe = iio_trig_periodic_rtc_probe, 190 .probe = iio_trig_periodic_rtc_probe,
191 .remove = __devexit_p(iio_trig_periodic_rtc_remove), 191 .remove = iio_trig_periodic_rtc_remove,
192 .driver = { 192 .driver = {
193 .name = "iio_prtc_trigger", 193 .name = "iio_prtc_trigger",
194 .owner = THIS_MODULE, 194 .owner = THIS_MODULE,
diff --git a/drivers/staging/imx-drm/Kconfig b/drivers/staging/imx-drm/Kconfig
index 14b4449df234..be7e2e30ac14 100644
--- a/drivers/staging/imx-drm/Kconfig
+++ b/drivers/staging/imx-drm/Kconfig
@@ -3,7 +3,7 @@ config DRM_IMX
3 select DRM_KMS_HELPER 3 select DRM_KMS_HELPER
4 select DRM_GEM_CMA_HELPER 4 select DRM_GEM_CMA_HELPER
5 select DRM_KMS_CMA_HELPER 5 select DRM_KMS_CMA_HELPER
6 depends on DRM && ARCH_MXC 6 depends on DRM && (ARCH_MXC || ARCH_MULTIPLATFORM)
7 help 7 help
8 enable i.MX graphics support 8 enable i.MX graphics support
9 9
diff --git a/drivers/staging/imx-drm/imx-drm-core.c b/drivers/staging/imx-drm/imx-drm-core.c
index 1913199ba16e..ecf0f44bc70e 100644
--- a/drivers/staging/imx-drm/imx-drm-core.c
+++ b/drivers/staging/imx-drm/imx-drm-core.c
@@ -824,7 +824,7 @@ static int imx_drm_platform_remove(struct platform_device *pdev)
824 824
825static struct platform_driver imx_drm_pdrv = { 825static struct platform_driver imx_drm_pdrv = {
826 .probe = imx_drm_platform_probe, 826 .probe = imx_drm_platform_probe,
827 .remove = __devexit_p(imx_drm_platform_remove), 827 .remove = imx_drm_platform_remove,
828 .driver = { 828 .driver = {
829 .owner = THIS_MODULE, 829 .owner = THIS_MODULE,
830 .name = "imx-drm", 830 .name = "imx-drm",
diff --git a/drivers/staging/imx-drm/ipu-v3/imx-ipu-v3.h b/drivers/staging/imx-drm/ipu-v3/imx-ipu-v3.h
index 74158dd73758..99d1cceaa3de 100644
--- a/drivers/staging/imx-drm/ipu-v3/imx-ipu-v3.h
+++ b/drivers/staging/imx-drm/ipu-v3/imx-ipu-v3.h
@@ -16,7 +16,6 @@
16#include <linux/videodev2.h> 16#include <linux/videodev2.h>
17#include <linux/bitmap.h> 17#include <linux/bitmap.h>
18#include <linux/fb.h> 18#include <linux/fb.h>
19#include <linux/videodev2.h>
20 19
21struct ipu_soc; 20struct ipu_soc;
22 21
@@ -293,6 +292,7 @@ static inline void ipu_cpmem_interlaced_scan(struct ipu_ch_param *p,
293 292
294void ipu_cpmem_set_yuv_planar(struct ipu_ch_param __iomem *p, u32 pixel_format, 293void ipu_cpmem_set_yuv_planar(struct ipu_ch_param __iomem *p, u32 pixel_format,
295 int stride, int height); 294 int stride, int height);
295void ipu_cpmem_set_yuv_interleaved(struct ipu_ch_param *p, u32 pixel_format);
296void ipu_cpmem_set_yuv_planar_full(struct ipu_ch_param __iomem *p, 296void ipu_cpmem_set_yuv_planar_full(struct ipu_ch_param __iomem *p,
297 u32 pixel_format, int stride, int u_offset, int v_offset); 297 u32 pixel_format, int stride, int u_offset, int v_offset);
298int ipu_cpmem_set_fmt(struct ipu_ch_param __iomem *cpmem, u32 pixelformat); 298int ipu_cpmem_set_fmt(struct ipu_ch_param __iomem *cpmem, u32 pixelformat);
diff --git a/drivers/staging/imx-drm/ipu-v3/ipu-common.c b/drivers/staging/imx-drm/ipu-v3/ipu-common.c
index f381960f42b0..677e665ca86d 100644
--- a/drivers/staging/imx-drm/ipu-v3/ipu-common.c
+++ b/drivers/staging/imx-drm/ipu-v3/ipu-common.c
@@ -225,6 +225,23 @@ int ipu_cpmem_set_format_passthrough(struct ipu_ch_param __iomem *p,
225} 225}
226EXPORT_SYMBOL_GPL(ipu_cpmem_set_format_passthrough); 226EXPORT_SYMBOL_GPL(ipu_cpmem_set_format_passthrough);
227 227
228void ipu_cpmem_set_yuv_interleaved(struct ipu_ch_param *p, u32 pixel_format)
229{
230 switch (pixel_format) {
231 case V4L2_PIX_FMT_UYVY:
232 ipu_ch_param_write_field(p, IPU_FIELD_BPP, 3); /* bits/pixel */
233 ipu_ch_param_write_field(p, IPU_FIELD_PFS, 0xA); /* pix format */
234 ipu_ch_param_write_field(p, IPU_FIELD_NPB, 31); /* burst size */
235 break;
236 case V4L2_PIX_FMT_YUYV:
237 ipu_ch_param_write_field(p, IPU_FIELD_BPP, 3); /* bits/pixel */
238 ipu_ch_param_write_field(p, IPU_FIELD_PFS, 0x8); /* pix format */
239 ipu_ch_param_write_field(p, IPU_FIELD_NPB, 31); /* burst size */
240 break;
241 }
242}
243EXPORT_SYMBOL_GPL(ipu_cpmem_set_yuv_interleaved);
244
228void ipu_cpmem_set_yuv_planar_full(struct ipu_ch_param __iomem *p, 245void ipu_cpmem_set_yuv_planar_full(struct ipu_ch_param __iomem *p,
229 u32 pixel_format, int stride, int u_offset, int v_offset) 246 u32 pixel_format, int stride, int u_offset, int v_offset)
230{ 247{
@@ -234,6 +251,11 @@ void ipu_cpmem_set_yuv_planar_full(struct ipu_ch_param __iomem *p,
234 ipu_ch_param_write_field(p, IPU_FIELD_UBO, u_offset / 8); 251 ipu_ch_param_write_field(p, IPU_FIELD_UBO, u_offset / 8);
235 ipu_ch_param_write_field(p, IPU_FIELD_VBO, v_offset / 8); 252 ipu_ch_param_write_field(p, IPU_FIELD_VBO, v_offset / 8);
236 break; 253 break;
254 case V4L2_PIX_FMT_YVU420:
255 ipu_ch_param_write_field(p, IPU_FIELD_SLUV, (stride / 2) - 1);
256 ipu_ch_param_write_field(p, IPU_FIELD_UBO, v_offset / 8);
257 ipu_ch_param_write_field(p, IPU_FIELD_VBO, u_offset / 8);
258 break;
237 } 259 }
238} 260}
239EXPORT_SYMBOL_GPL(ipu_cpmem_set_yuv_planar_full); 261EXPORT_SYMBOL_GPL(ipu_cpmem_set_yuv_planar_full);
@@ -246,10 +268,11 @@ void ipu_cpmem_set_yuv_planar(struct ipu_ch_param __iomem *p, u32 pixel_format,
246 268
247 switch (pixel_format) { 269 switch (pixel_format) {
248 case V4L2_PIX_FMT_YUV420: 270 case V4L2_PIX_FMT_YUV420:
271 case V4L2_PIX_FMT_YVU420:
249 uv_stride = stride / 2; 272 uv_stride = stride / 2;
250 u_offset = stride * height; 273 u_offset = stride * height;
251 v_offset = u_offset + (uv_stride * height / 2); 274 v_offset = u_offset + (uv_stride * height / 2);
252 ipu_cpmem_set_yuv_planar_full(p, V4L2_PIX_FMT_YUV420, stride, 275 ipu_cpmem_set_yuv_planar_full(p, pixel_format, stride,
253 u_offset, v_offset); 276 u_offset, v_offset);
254 break; 277 break;
255 } 278 }
@@ -307,6 +330,7 @@ int ipu_cpmem_set_fmt(struct ipu_ch_param __iomem *cpmem, u32 pixelformat)
307{ 330{
308 switch (pixelformat) { 331 switch (pixelformat) {
309 case V4L2_PIX_FMT_YUV420: 332 case V4L2_PIX_FMT_YUV420:
333 case V4L2_PIX_FMT_YVU420:
310 /* pix format */ 334 /* pix format */
311 ipu_ch_param_write_field(cpmem, IPU_FIELD_PFS, 2); 335 ipu_ch_param_write_field(cpmem, IPU_FIELD_PFS, 2);
312 /* burst size */ 336 /* burst size */
@@ -369,6 +393,7 @@ int ipu_cpmem_set_image(struct ipu_ch_param __iomem *cpmem,
369 393
370 switch (pix->pixelformat) { 394 switch (pix->pixelformat) {
371 case V4L2_PIX_FMT_YUV420: 395 case V4L2_PIX_FMT_YUV420:
396 case V4L2_PIX_FMT_YVU420:
372 y_offset = Y_OFFSET(pix, image->rect.left, image->rect.top); 397 y_offset = Y_OFFSET(pix, image->rect.left, image->rect.top);
373 u_offset = U_OFFSET(pix, image->rect.left, 398 u_offset = U_OFFSET(pix, image->rect.left,
374 image->rect.top) - y_offset; 399 image->rect.top) - y_offset;
@@ -380,6 +405,7 @@ int ipu_cpmem_set_image(struct ipu_ch_param __iomem *cpmem,
380 ipu_cpmem_set_buffer(cpmem, 0, image->phys + y_offset); 405 ipu_cpmem_set_buffer(cpmem, 0, image->phys + y_offset);
381 break; 406 break;
382 case V4L2_PIX_FMT_UYVY: 407 case V4L2_PIX_FMT_UYVY:
408 case V4L2_PIX_FMT_YUYV:
383 ipu_cpmem_set_buffer(cpmem, 0, image->phys + 409 ipu_cpmem_set_buffer(cpmem, 0, image->phys +
384 image->rect.left * 2 + 410 image->rect.left * 2 +
385 image->rect.top * image->pix.bytesperline); 411 image->rect.top * image->pix.bytesperline);
@@ -413,8 +439,9 @@ enum ipu_color_space ipu_pixelformat_to_colorspace(u32 pixelformat)
413{ 439{
414 switch (pixelformat) { 440 switch (pixelformat) {
415 case V4L2_PIX_FMT_YUV420: 441 case V4L2_PIX_FMT_YUV420:
442 case V4L2_PIX_FMT_YVU420:
416 case V4L2_PIX_FMT_UYVY: 443 case V4L2_PIX_FMT_UYVY:
417 case V4L2_PIX_FMT_YVYU: 444 case V4L2_PIX_FMT_YUYV:
418 return IPUV3_COLORSPACE_YUV; 445 return IPUV3_COLORSPACE_YUV;
419 case V4L2_PIX_FMT_RGB32: 446 case V4L2_PIX_FMT_RGB32:
420 case V4L2_PIX_FMT_BGR32: 447 case V4L2_PIX_FMT_BGR32:
@@ -646,8 +673,6 @@ static int ipu_reset(struct ipu_soc *ipu)
646 cpu_relax(); 673 cpu_relax();
647 } 674 }
648 675
649 mdelay(300);
650
651 return 0; 676 return 0;
652} 677}
653 678
@@ -988,7 +1013,7 @@ static void ipu_irq_exit(struct ipu_soc *ipu)
988 irq_free_descs(ipu->irq_start, IPU_NUM_IRQS); 1013 irq_free_descs(ipu->irq_start, IPU_NUM_IRQS);
989} 1014}
990 1015
991static int __devinit ipu_probe(struct platform_device *pdev) 1016static int ipu_probe(struct platform_device *pdev)
992{ 1017{
993 const struct of_device_id *of_id = 1018 const struct of_device_id *of_id =
994 of_match_device(imx_ipu_dt_ids, &pdev->dev); 1019 of_match_device(imx_ipu_dt_ids, &pdev->dev);
@@ -1000,13 +1025,11 @@ static int __devinit ipu_probe(struct platform_device *pdev)
1000 1025
1001 devtype = of_id->data; 1026 devtype = of_id->data;
1002 1027
1003 dev_info(&pdev->dev, "Initializing %s\n", devtype->name);
1004
1005 irq_sync = platform_get_irq(pdev, 0); 1028 irq_sync = platform_get_irq(pdev, 0);
1006 irq_err = platform_get_irq(pdev, 1); 1029 irq_err = platform_get_irq(pdev, 1);
1007 res = platform_get_resource(pdev, IORESOURCE_MEM, 0); 1030 res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
1008 1031
1009 dev_info(&pdev->dev, "irq_sync: %d irq_err: %d\n", 1032 dev_dbg(&pdev->dev, "irq_sync: %d irq_err: %d\n",
1010 irq_sync, irq_err); 1033 irq_sync, irq_err);
1011 1034
1012 if (!res || irq_sync < 0 || irq_err < 0) 1035 if (!res || irq_sync < 0 || irq_err < 0)
@@ -1026,27 +1049,27 @@ static int __devinit ipu_probe(struct platform_device *pdev)
1026 spin_lock_init(&ipu->lock); 1049 spin_lock_init(&ipu->lock);
1027 mutex_init(&ipu->channel_lock); 1050 mutex_init(&ipu->channel_lock);
1028 1051
1029 dev_info(&pdev->dev, "cm_reg: 0x%08lx\n", 1052 dev_dbg(&pdev->dev, "cm_reg: 0x%08lx\n",
1030 ipu_base + devtype->cm_ofs); 1053 ipu_base + devtype->cm_ofs);
1031 dev_info(&pdev->dev, "idmac: 0x%08lx\n", 1054 dev_dbg(&pdev->dev, "idmac: 0x%08lx\n",
1032 ipu_base + devtype->cm_ofs + IPU_CM_IDMAC_REG_OFS); 1055 ipu_base + devtype->cm_ofs + IPU_CM_IDMAC_REG_OFS);
1033 dev_info(&pdev->dev, "cpmem: 0x%08lx\n", 1056 dev_dbg(&pdev->dev, "cpmem: 0x%08lx\n",
1034 ipu_base + devtype->cpmem_ofs); 1057 ipu_base + devtype->cpmem_ofs);
1035 dev_info(&pdev->dev, "disp0: 0x%08lx\n", 1058 dev_dbg(&pdev->dev, "disp0: 0x%08lx\n",
1036 ipu_base + devtype->disp0_ofs); 1059 ipu_base + devtype->disp0_ofs);
1037 dev_info(&pdev->dev, "disp1: 0x%08lx\n", 1060 dev_dbg(&pdev->dev, "disp1: 0x%08lx\n",
1038 ipu_base + devtype->disp1_ofs); 1061 ipu_base + devtype->disp1_ofs);
1039 dev_info(&pdev->dev, "srm: 0x%08lx\n", 1062 dev_dbg(&pdev->dev, "srm: 0x%08lx\n",
1040 ipu_base + devtype->srm_ofs); 1063 ipu_base + devtype->srm_ofs);
1041 dev_info(&pdev->dev, "tpm: 0x%08lx\n", 1064 dev_dbg(&pdev->dev, "tpm: 0x%08lx\n",
1042 ipu_base + devtype->tpm_ofs); 1065 ipu_base + devtype->tpm_ofs);
1043 dev_info(&pdev->dev, "dc: 0x%08lx\n", 1066 dev_dbg(&pdev->dev, "dc: 0x%08lx\n",
1044 ipu_base + devtype->cm_ofs + IPU_CM_DC_REG_OFS); 1067 ipu_base + devtype->cm_ofs + IPU_CM_DC_REG_OFS);
1045 dev_info(&pdev->dev, "ic: 0x%08lx\n", 1068 dev_dbg(&pdev->dev, "ic: 0x%08lx\n",
1046 ipu_base + devtype->cm_ofs + IPU_CM_IC_REG_OFS); 1069 ipu_base + devtype->cm_ofs + IPU_CM_IC_REG_OFS);
1047 dev_info(&pdev->dev, "dmfc: 0x%08lx\n", 1070 dev_dbg(&pdev->dev, "dmfc: 0x%08lx\n",
1048 ipu_base + devtype->cm_ofs + IPU_CM_DMFC_REG_OFS); 1071 ipu_base + devtype->cm_ofs + IPU_CM_DMFC_REG_OFS);
1049 dev_info(&pdev->dev, "vdi: 0x%08lx\n", 1072 dev_dbg(&pdev->dev, "vdi: 0x%08lx\n",
1050 ipu_base + devtype->vdi_ofs); 1073 ipu_base + devtype->vdi_ofs);
1051 1074
1052 ipu->cm_reg = devm_ioremap(&pdev->dev, 1075 ipu->cm_reg = devm_ioremap(&pdev->dev,
@@ -1098,6 +1121,8 @@ static int __devinit ipu_probe(struct platform_device *pdev)
1098 goto failed_add_clients; 1121 goto failed_add_clients;
1099 } 1122 }
1100 1123
1124 dev_info(&pdev->dev, "%s probed\n", devtype->name);
1125
1101 return 0; 1126 return 0;
1102 1127
1103failed_add_clients: 1128failed_add_clients:
@@ -1111,7 +1136,7 @@ failed_ioremap:
1111 return ret; 1136 return ret;
1112} 1137}
1113 1138
1114static int __devexit ipu_remove(struct platform_device *pdev) 1139static int ipu_remove(struct platform_device *pdev)
1115{ 1140{
1116 struct ipu_soc *ipu = platform_get_drvdata(pdev); 1141 struct ipu_soc *ipu = platform_get_drvdata(pdev);
1117 struct resource *res; 1142 struct resource *res;
@@ -1133,7 +1158,7 @@ static struct platform_driver imx_ipu_driver = {
1133 .of_match_table = imx_ipu_dt_ids, 1158 .of_match_table = imx_ipu_dt_ids,
1134 }, 1159 },
1135 .probe = ipu_probe, 1160 .probe = ipu_probe,
1136 .remove = __devexit_p(ipu_remove), 1161 .remove = ipu_remove,
1137}; 1162};
1138 1163
1139module_platform_driver(imx_ipu_driver); 1164module_platform_driver(imx_ipu_driver);
diff --git a/drivers/staging/imx-drm/ipuv3-crtc.c b/drivers/staging/imx-drm/ipuv3-crtc.c
index 78d3edac75c1..1892006526b5 100644
--- a/drivers/staging/imx-drm/ipuv3-crtc.c
+++ b/drivers/staging/imx-drm/ipuv3-crtc.c
@@ -116,7 +116,7 @@ static void ipu_crtc_dpms(struct drm_crtc *crtc, int mode)
116{ 116{
117 struct ipu_crtc *ipu_crtc = to_ipu_crtc(crtc); 117 struct ipu_crtc *ipu_crtc = to_ipu_crtc(crtc);
118 118
119 dev_info(ipu_crtc->dev, "%s mode: %d\n", __func__, mode); 119 dev_dbg(ipu_crtc->dev, "%s mode: %d\n", __func__, mode);
120 120
121 switch (mode) { 121 switch (mode) {
122 case DRM_MODE_DPMS_ON: 122 case DRM_MODE_DPMS_ON:
@@ -530,7 +530,7 @@ err_put_resources:
530 return ret; 530 return ret;
531} 531}
532 532
533static int __devinit ipu_drm_probe(struct platform_device *pdev) 533static int ipu_drm_probe(struct platform_device *pdev)
534{ 534{
535 struct ipu_client_platformdata *pdata = pdev->dev.platform_data; 535 struct ipu_client_platformdata *pdata = pdev->dev.platform_data;
536 struct ipu_crtc *ipu_crtc; 536 struct ipu_crtc *ipu_crtc;
@@ -554,7 +554,7 @@ static int __devinit ipu_drm_probe(struct platform_device *pdev)
554 return 0; 554 return 0;
555} 555}
556 556
557static int __devexit ipu_drm_remove(struct platform_device *pdev) 557static int ipu_drm_remove(struct platform_device *pdev)
558{ 558{
559 struct ipu_crtc *ipu_crtc = platform_get_drvdata(pdev); 559 struct ipu_crtc *ipu_crtc = platform_get_drvdata(pdev);
560 560
@@ -570,7 +570,7 @@ static struct platform_driver ipu_drm_driver = {
570 .name = "imx-ipuv3-crtc", 570 .name = "imx-ipuv3-crtc",
571 }, 571 },
572 .probe = ipu_drm_probe, 572 .probe = ipu_drm_probe,
573 .remove = __devexit_p(ipu_drm_remove), 573 .remove = ipu_drm_remove,
574}; 574};
575module_platform_driver(ipu_drm_driver); 575module_platform_driver(ipu_drm_driver);
576 576
diff --git a/drivers/staging/imx-drm/parallel-display.c b/drivers/staging/imx-drm/parallel-display.c
index 9b51d732eefa..a8064fcc03d1 100644
--- a/drivers/staging/imx-drm/parallel-display.c
+++ b/drivers/staging/imx-drm/parallel-display.c
@@ -23,6 +23,7 @@
23#include <drm/drm_fb_helper.h> 23#include <drm/drm_fb_helper.h>
24#include <drm/drm_crtc_helper.h> 24#include <drm/drm_crtc_helper.h>
25#include <linux/videodev2.h> 25#include <linux/videodev2.h>
26#include <linux/pinctrl/consumer.h>
26 27
27#include "imx-drm.h" 28#include "imx-drm.h"
28 29
@@ -188,18 +189,27 @@ static int imx_pd_register(struct imx_parallel_display *imxpd)
188 return 0; 189 return 0;
189} 190}
190 191
191static int __devinit imx_pd_probe(struct platform_device *pdev) 192static int imx_pd_probe(struct platform_device *pdev)
192{ 193{
193 struct device_node *np = pdev->dev.of_node; 194 struct device_node *np = pdev->dev.of_node;
194 const u8 *edidp; 195 const u8 *edidp;
195 struct imx_parallel_display *imxpd; 196 struct imx_parallel_display *imxpd;
196 int ret; 197 int ret;
197 const char *fmt; 198 const char *fmt;
199 struct pinctrl *pinctrl;
198 200
199 imxpd = devm_kzalloc(&pdev->dev, sizeof(*imxpd), GFP_KERNEL); 201 imxpd = devm_kzalloc(&pdev->dev, sizeof(*imxpd), GFP_KERNEL);
200 if (!imxpd) 202 if (!imxpd)
201 return -ENOMEM; 203 return -ENOMEM;
202 204
205 pinctrl = devm_pinctrl_get_select_default(&pdev->dev);
206 if (IS_ERR(pinctrl)) {
207 ret = PTR_ERR(pinctrl);
208 dev_warn(&pdev->dev, "pinctrl_get_select_default failed with %d",
209 ret);
210 return ret;
211 }
212
203 edidp = of_get_property(np, "edid", &imxpd->edid_len); 213 edidp = of_get_property(np, "edid", &imxpd->edid_len);
204 if (edidp) 214 if (edidp)
205 imxpd->edid = kmemdup(edidp, imxpd->edid_len, GFP_KERNEL); 215 imxpd->edid = kmemdup(edidp, imxpd->edid_len, GFP_KERNEL);
@@ -225,7 +235,7 @@ static int __devinit imx_pd_probe(struct platform_device *pdev)
225 return 0; 235 return 0;
226} 236}
227 237
228static int __devexit imx_pd_remove(struct platform_device *pdev) 238static int imx_pd_remove(struct platform_device *pdev)
229{ 239{
230 struct imx_parallel_display *imxpd = platform_get_drvdata(pdev); 240 struct imx_parallel_display *imxpd = platform_get_drvdata(pdev);
231 struct drm_connector *connector = &imxpd->connector; 241 struct drm_connector *connector = &imxpd->connector;
@@ -246,7 +256,7 @@ static const struct of_device_id imx_pd_dt_ids[] = {
246 256
247static struct platform_driver imx_pd_driver = { 257static struct platform_driver imx_pd_driver = {
248 .probe = imx_pd_probe, 258 .probe = imx_pd_probe,
249 .remove = __devexit_p(imx_pd_remove), 259 .remove = imx_pd_remove,
250 .driver = { 260 .driver = {
251 .of_match_table = imx_pd_dt_ids, 261 .of_match_table = imx_pd_dt_ids,
252 .name = "imx-parallel-display", 262 .name = "imx-parallel-display",
diff --git a/drivers/staging/ipack/Kconfig b/drivers/staging/ipack/Kconfig
deleted file mode 100644
index 4cf47066140c..000000000000
--- a/drivers/staging/ipack/Kconfig
+++ /dev/null
@@ -1,21 +0,0 @@
1#
2# IPACK configuration.
3#
4
5menuconfig IPACK_BUS
6 tristate "IndustryPack bus support"
7 depends on HAS_IOMEM
8 ---help---
9 If you say Y here you get support for the IndustryPack Framework
10 for drivers for many types of boards that support this industrial
11 bus. The IndustryPack Framework is a virtual bus allowing to
12 communicate between carrier and mezzanine cards connected through
13 this bus.
14
15if IPACK_BUS
16
17source "drivers/staging/ipack/bridges/Kconfig"
18
19source "drivers/staging/ipack/devices/Kconfig"
20
21endif # IPACK
diff --git a/drivers/staging/ipack/TODO b/drivers/staging/ipack/TODO
deleted file mode 100644
index ffafe6911a77..000000000000
--- a/drivers/staging/ipack/TODO
+++ /dev/null
@@ -1,22 +0,0 @@
1 TODO
2 ====
3Introduction
4============
5
6These drivers add support for IndustryPack devices: carrier and IP module
7boards.
8
9The ipack driver is just an abstraction of the bus providing the common
10operations between the two kind of boards.
11
12TODO
13====
14
15checkpatch.pl warnings
16cleanup
17
18Contact
19=======
20
21Contact: Samuel Iglesias Gonsalvez <siglesias@igalia.com>
22Mailing List: industrypack-devel@lists.sourceforge.net
diff --git a/drivers/staging/ipack/bridges/Kconfig b/drivers/staging/ipack/bridges/Kconfig
deleted file mode 100644
index 97c837ea7a03..000000000000
--- a/drivers/staging/ipack/bridges/Kconfig
+++ /dev/null
@@ -1,8 +0,0 @@
1config BOARD_TPCI200
2 tristate "TEWS TPCI-200 support for IndustryPack bus"
3 depends on IPACK_BUS
4 depends on PCI
5 help
6 This driver supports the TEWS TPCI200 device for the IndustryPack bus.
7 default n
8
diff --git a/drivers/staging/ipack/ipack.h b/drivers/staging/ipack/ipack.h
deleted file mode 100644
index d8e3bb6feac8..000000000000
--- a/drivers/staging/ipack/ipack.h
+++ /dev/null
@@ -1,217 +0,0 @@
1/*
2 * Industry-pack bus.
3 *
4 * (C) 2011 Samuel Iglesias Gonsalvez <siglesia@cern.ch>, CERN
5 * (C) 2012 Samuel Iglesias Gonsalvez <siglesias@igalia.com>, Igalia
6 *
7 * This program is free software; you can redistribute it and/or modify it
8 * under the terms of the GNU General Public License as published by the Free
9 * Software Foundation; version 2 of the License.
10 */
11
12#include <linux/mod_devicetable.h>
13#include <linux/device.h>
14#include <linux/interrupt.h>
15
16#include "ipack_ids.h"
17
18#define IPACK_IDPROM_OFFSET_I 0x01
19#define IPACK_IDPROM_OFFSET_P 0x03
20#define IPACK_IDPROM_OFFSET_A 0x05
21#define IPACK_IDPROM_OFFSET_C 0x07
22#define IPACK_IDPROM_OFFSET_MANUFACTURER_ID 0x09
23#define IPACK_IDPROM_OFFSET_MODEL 0x0B
24#define IPACK_IDPROM_OFFSET_REVISION 0x0D
25#define IPACK_IDPROM_OFFSET_RESERVED 0x0F
26#define IPACK_IDPROM_OFFSET_DRIVER_ID_L 0x11
27#define IPACK_IDPROM_OFFSET_DRIVER_ID_H 0x13
28#define IPACK_IDPROM_OFFSET_NUM_BYTES 0x15
29#define IPACK_IDPROM_OFFSET_CRC 0x17
30
31struct ipack_bus_ops;
32struct ipack_driver;
33
34enum ipack_space {
35 IPACK_IO_SPACE = 0,
36 IPACK_ID_SPACE = 1,
37 IPACK_MEM_SPACE = 2,
38 IPACK_INT_SPACE,
39};
40
41/**
42 * struct ipack_addr_space - Virtual address space mapped for a specified type.
43 *
44 * @address: virtual address
45 * @size: size of the mapped space
46 */
47struct ipack_addr_space {
48 void __iomem *address;
49 unsigned int size;
50};
51
52/**
53 * struct ipack_device
54 *
55 * @bus_nr: IP bus number where the device is plugged
56 * @slot: Slot where the device is plugged in the carrier board
57 * @bus: ipack_bus_device where the device is plugged to.
58 * @id_space: Virtual address to ID space.
59 * @io_space: Virtual address to IO space.
60 * @mem_space: Virtual address to MEM space.
61 * @dev: device in kernel representation.
62 *
63 * Warning: Direct access to mapped memory is possible but the endianness
64 * is not the same with PCI carrier or VME carrier. The endianness is managed
65 * by the carrier board throught bus->ops.
66 */
67struct ipack_device {
68 unsigned int bus_nr;
69 unsigned int slot;
70 struct ipack_bus_device *bus;
71 struct ipack_addr_space id_space;
72 struct ipack_addr_space io_space;
73 struct ipack_addr_space int_space;
74 struct ipack_addr_space mem_space;
75 struct device dev;
76 u8 *id;
77 size_t id_avail;
78 u32 id_vendor;
79 u32 id_device;
80 u8 id_format;
81 unsigned int id_crc_correct:1;
82 unsigned int speed_8mhz:1;
83 unsigned int speed_32mhz:1;
84};
85
86/**
87 * struct ipack_driver_ops -- callbacks to mezzanine driver for installing/removing one device
88 *
89 * @probe: Probe function
90 * @remove: tell the driver that the carrier board wants to remove one device
91 */
92
93struct ipack_driver_ops {
94 int (*probe) (struct ipack_device *dev);
95 void (*remove) (struct ipack_device *dev);
96};
97
98/**
99 * struct ipack_driver -- Specific data to each ipack board driver
100 *
101 * @driver: Device driver kernel representation
102 * @ops: Mezzanine driver operations specific for the ipack bus.
103 */
104struct ipack_driver {
105 struct device_driver driver;
106 const struct ipack_device_id *id_table;
107 const struct ipack_driver_ops *ops;
108};
109
110/**
111 * struct ipack_bus_ops - available operations on a bridge module
112 *
113 * @map_space: map IP address space
114 * @unmap_space: unmap IP address space
115 * @request_irq: request IRQ
116 * @free_irq: free IRQ
117 * @get_clockrate: Returns the clockrate the carrier is currently
118 * communicating with the device at.
119 * @set_clockrate: Sets the clock-rate for carrier / module communication.
120 * Should return -EINVAL if the requested speed is not supported.
121 * @get_error: Returns the error state for the slot the device is attached
122 * to.
123 * @get_timeout: Returns 1 if the communication with the device has
124 * previously timed out.
125 * @reset_timeout: Resets the state returned by get_timeout.
126 */
127struct ipack_bus_ops {
128 int (*map_space) (struct ipack_device *dev, unsigned int memory_size, int space);
129 int (*unmap_space) (struct ipack_device *dev, int space);
130 int (*request_irq) (struct ipack_device *dev,
131 irqreturn_t (*handler)(void *), void *arg);
132 int (*free_irq) (struct ipack_device *dev);
133 int (*get_clockrate) (struct ipack_device *dev);
134 int (*set_clockrate) (struct ipack_device *dev, int mherz);
135 int (*get_error) (struct ipack_device *dev);
136 int (*get_timeout) (struct ipack_device *dev);
137 int (*reset_timeout) (struct ipack_device *dev);
138};
139
140/**
141 * struct ipack_bus_device
142 *
143 * @dev: pointer to carrier device
144 * @slots: number of slots available
145 * @bus_nr: ipack bus number
146 * @ops: bus operations for the mezzanine drivers
147 */
148struct ipack_bus_device {
149 struct device *parent;
150 int slots;
151 int bus_nr;
152 const struct ipack_bus_ops *ops;
153};
154
155/**
156 * ipack_bus_register -- register a new ipack bus
157 *
158 * @parent: pointer to the parent device, if any.
159 * @slots: number of slots available in the bus device.
160 * @ops: bus operations for the mezzanine drivers.
161 *
162 * The carrier board device should call this function to register itself as
163 * available bus device in ipack.
164 */
165struct ipack_bus_device *ipack_bus_register(struct device *parent, int slots,
166 const struct ipack_bus_ops *ops);
167
168/**
169 * ipack_bus_unregister -- unregister an ipack bus
170 */
171int ipack_bus_unregister(struct ipack_bus_device *bus);
172
173/**
174 * ipack_driver_register -- Register a new driver
175 *
176 * Called by a ipack driver to register itself as a driver
177 * that can manage ipack devices.
178 */
179int ipack_driver_register(struct ipack_driver *edrv, struct module *owner,
180 const char *name);
181void ipack_driver_unregister(struct ipack_driver *edrv);
182
183/**
184 * ipack_device_register -- register a new mezzanine device
185 *
186 * @bus: ipack bus device it is plugged to.
187 * @slot: slot position in the bus device.
188 *
189 * Register a new ipack device (mezzanine device). The call is done by
190 * the carrier device driver.
191 */
192struct ipack_device *ipack_device_register(struct ipack_bus_device *bus, int slot);
193void ipack_device_unregister(struct ipack_device *dev);
194
195/**
196 * DEFINE_IPACK_DEVICE_TABLE - macro used to describe a IndustryPack table
197 * @_table: device table name
198 *
199 * This macro is used to create a struct ipack_device_id array (a device table)
200 * in a generic manner.
201 */
202#define DEFINE_IPACK_DEVICE_TABLE(_table) \
203 const struct ipack_device_id _table[] __devinitconst
204
205/**
206 * IPACK_DEVICE - macro used to describe a specific IndustryPack device
207 * @_format: the format version (currently either 1 or 2, 8 bit value)
208 * @vend: the 8 or 24 bit IndustryPack Vendor ID
209 * @dev: the 8 or 16 bit IndustryPack Device ID
210 *
211 * This macro is used to create a struct ipack_device_id that matches a specific
212 * device.
213 */
214#define IPACK_DEVICE(_format, vend, dev) \
215 .format = (_format), \
216 .vendor = (vend), \
217 .device = (dev)
diff --git a/drivers/staging/ipack/ipack_ids.h b/drivers/staging/ipack/ipack_ids.h
deleted file mode 100644
index 8153fee3f2f7..000000000000
--- a/drivers/staging/ipack/ipack_ids.h
+++ /dev/null
@@ -1,32 +0,0 @@
1/*
2 * IndustryPack Fromat, Vendor and Device IDs.
3 */
4
5/* ID section format versions */
6#define IPACK_ID_VERSION_INVALID 0x00
7#define IPACK_ID_VERSION_1 0x01
8#define IPACK_ID_VERSION_2 0x02
9
10/* Vendors and devices. Sort key: vendor first, device next. */
11#define IPACK1_VENDOR_ID_RESERVED1 0x00
12#define IPACK1_VENDOR_ID_RESERVED2 0xFF
13#define IPACK1_VENDOR_ID_UNREGISTRED01 0x01
14#define IPACK1_VENDOR_ID_UNREGISTRED02 0x02
15#define IPACK1_VENDOR_ID_UNREGISTRED03 0x03
16#define IPACK1_VENDOR_ID_UNREGISTRED04 0x04
17#define IPACK1_VENDOR_ID_UNREGISTRED05 0x05
18#define IPACK1_VENDOR_ID_UNREGISTRED06 0x06
19#define IPACK1_VENDOR_ID_UNREGISTRED07 0x07
20#define IPACK1_VENDOR_ID_UNREGISTRED08 0x08
21#define IPACK1_VENDOR_ID_UNREGISTRED09 0x09
22#define IPACK1_VENDOR_ID_UNREGISTRED10 0x0A
23#define IPACK1_VENDOR_ID_UNREGISTRED11 0x0B
24#define IPACK1_VENDOR_ID_UNREGISTRED12 0x0C
25#define IPACK1_VENDOR_ID_UNREGISTRED13 0x0D
26#define IPACK1_VENDOR_ID_UNREGISTRED14 0x0E
27#define IPACK1_VENDOR_ID_UNREGISTRED15 0x0F
28
29#define IPACK1_VENDOR_ID_SBS 0xF0
30#define IPACK1_DEVICE_ID_SBS_OCTAL_232 0x22
31#define IPACK1_DEVICE_ID_SBS_OCTAL_422 0x2A
32#define IPACK1_DEVICE_ID_SBS_OCTAL_485 0x48
diff --git a/drivers/staging/line6/Kconfig b/drivers/staging/line6/Kconfig
index 43120ff2ab78..b63543658b2e 100644
--- a/drivers/staging/line6/Kconfig
+++ b/drivers/staging/line6/Kconfig
@@ -23,32 +23,6 @@ menuconfig LINE6_USB
23 23
24if LINE6_USB 24if LINE6_USB
25 25
26config LINE6_USB_DEBUG
27 bool "print debug messages"
28 default n
29 help
30 Say Y here to write debug messages to the syslog.
31
32 If unsure, say N.
33
34config LINE6_USB_DUMP_CTRL
35 bool "dump control messages"
36 default n
37 help
38 Say Y here to write control messages sent to and received from
39 Line6 devices to the syslog.
40
41 If unsure, say N.
42
43config LINE6_USB_DUMP_MIDI
44 bool "dump MIDI messages"
45 default n
46 help
47 Say Y here to write MIDI messages sent to and received from
48 Line6 devices to the syslog.
49
50 If unsure, say N.
51
52config LINE6_USB_DUMP_PCM 26config LINE6_USB_DUMP_PCM
53 bool "dump PCM data" 27 bool "dump PCM data"
54 default n 28 default n
@@ -59,17 +33,6 @@ config LINE6_USB_DUMP_PCM
59 33
60 If unsure, say N. 34 If unsure, say N.
61 35
62config LINE6_USB_RAW
63 bool "raw data communication"
64 default n
65 help
66 Say Y here to create special files which allow to send raw data
67 to the device. This bypasses any sanity checks, so if you discover
68 the code to erase the firmware, feel free to render your device
69 useless, but only after reading the GPL section "NO WARRANTY".
70
71 If unsure, say N.
72
73config LINE6_USB_IMPULSE_RESPONSE 36config LINE6_USB_IMPULSE_RESPONSE
74 bool "measure impulse response" 37 bool "measure impulse response"
75 default n 38 default n
diff --git a/drivers/staging/line6/Makefile b/drivers/staging/line6/Makefile
index 34a2ddacc7e9..ae5c374b0f87 100644
--- a/drivers/staging/line6/Makefile
+++ b/drivers/staging/line6/Makefile
@@ -3,9 +3,7 @@ obj-$(CONFIG_LINE6_USB) += line6usb.o
3line6usb-y := \ 3line6usb-y := \
4 audio.o \ 4 audio.o \
5 capture.o \ 5 capture.o \
6 control.o \
7 driver.o \ 6 driver.o \
8 dumprequest.o \
9 midi.o \ 7 midi.o \
10 midibuf.o \ 8 midibuf.o \
11 pcm.o \ 9 pcm.o \
diff --git a/drivers/staging/line6/audio.c b/drivers/staging/line6/audio.c
index 8e7398393a59..a92e21f7d55b 100644
--- a/drivers/staging/line6/audio.c
+++ b/drivers/staging/line6/audio.c
@@ -16,20 +16,16 @@
16#include "driver.h" 16#include "driver.h"
17#include "audio.h" 17#include "audio.h"
18 18
19static int line6_index[SNDRV_CARDS] = SNDRV_DEFAULT_IDX;
20static char *line6_id[SNDRV_CARDS] = SNDRV_DEFAULT_STR;
21
22/* 19/*
23 Initialize the Line6 USB audio system. 20 Initialize the Line6 USB audio system.
24*/ 21*/
25int line6_init_audio(struct usb_line6 *line6) 22int line6_init_audio(struct usb_line6 *line6)
26{ 23{
27 static int dev;
28 struct snd_card *card; 24 struct snd_card *card;
29 int err; 25 int err;
30 26
31 err = snd_card_create(line6_index[dev], line6_id[dev], THIS_MODULE, 0, 27 err = snd_card_create(SNDRV_DEFAULT_IDX1, SNDRV_DEFAULT_STR1,
32 &card); 28 THIS_MODULE, 0, &card);
33 if (err < 0) 29 if (err < 0)
34 return err; 30 return err;
35 31
diff --git a/drivers/staging/line6/capture.c b/drivers/staging/line6/capture.c
index c85c5b6bffb7..389c41fd1b74 100644
--- a/drivers/staging/line6/capture.c
+++ b/drivers/staging/line6/capture.c
@@ -256,8 +256,8 @@ static void audio_in_callback(struct urb *urb)
256#ifdef CONFIG_LINE6_USB_IMPULSE_RESPONSE 256#ifdef CONFIG_LINE6_USB_IMPULSE_RESPONSE
257 if (!(line6pcm->flags & LINE6_BITS_PCM_IMPULSE)) 257 if (!(line6pcm->flags & LINE6_BITS_PCM_IMPULSE))
258#endif 258#endif
259 if (test_bit(LINE6_INDEX_PCM_ALSA_CAPTURE_STREAM, &line6pcm->flags) 259 if (test_bit(LINE6_INDEX_PCM_ALSA_CAPTURE_STREAM,
260 && (fsize > 0)) 260 &line6pcm->flags) && (fsize > 0))
261 line6_capture_copy(line6pcm, fbuf, fsize); 261 line6_capture_copy(line6pcm, fbuf, fsize);
262 } 262 }
263 263
@@ -274,7 +274,8 @@ static void audio_in_callback(struct urb *urb)
274#ifdef CONFIG_LINE6_USB_IMPULSE_RESPONSE 274#ifdef CONFIG_LINE6_USB_IMPULSE_RESPONSE
275 if (!(line6pcm->flags & LINE6_BITS_PCM_IMPULSE)) 275 if (!(line6pcm->flags & LINE6_BITS_PCM_IMPULSE))
276#endif 276#endif
277 if (test_bit(LINE6_INDEX_PCM_ALSA_CAPTURE_STREAM, &line6pcm->flags)) 277 if (test_bit(LINE6_INDEX_PCM_ALSA_CAPTURE_STREAM,
278 &line6pcm->flags))
278 line6_capture_check_period(line6pcm, length); 279 line6_capture_check_period(line6pcm, length);
279 } 280 }
280} 281}
@@ -356,7 +357,8 @@ int snd_line6_capture_trigger(struct snd_line6_pcm *line6pcm, int cmd)
356#ifdef CONFIG_PM 357#ifdef CONFIG_PM
357 case SNDRV_PCM_TRIGGER_RESUME: 358 case SNDRV_PCM_TRIGGER_RESUME:
358#endif 359#endif
359 err = line6_pcm_acquire(line6pcm, LINE6_BIT_PCM_ALSA_CAPTURE_STREAM); 360 err = line6_pcm_acquire(line6pcm,
361 LINE6_BIT_PCM_ALSA_CAPTURE_STREAM);
360 362
361 if (err < 0) 363 if (err < 0)
362 return err; 364 return err;
@@ -367,7 +369,8 @@ int snd_line6_capture_trigger(struct snd_line6_pcm *line6pcm, int cmd)
367#ifdef CONFIG_PM 369#ifdef CONFIG_PM
368 case SNDRV_PCM_TRIGGER_SUSPEND: 370 case SNDRV_PCM_TRIGGER_SUSPEND:
369#endif 371#endif
370 err = line6_pcm_release(line6pcm, LINE6_BIT_PCM_ALSA_CAPTURE_STREAM); 372 err = line6_pcm_release(line6pcm,
373 LINE6_BIT_PCM_ALSA_CAPTURE_STREAM);
371 374
372 if (err < 0) 375 if (err < 0)
373 return err; 376 return err;
diff --git a/drivers/staging/line6/control.c b/drivers/staging/line6/control.c
deleted file mode 100644
index f8326f587e38..000000000000
--- a/drivers/staging/line6/control.c
+++ /dev/null
@@ -1,995 +0,0 @@
1/*
2 * Line6 Linux USB driver - 0.9.1beta
3 *
4 * Copyright (C) 2004-2010 Markus Grabner (grabner@icg.tugraz.at)
5 *
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public License as
8 * published by the Free Software Foundation, version 2.
9 *
10 */
11
12#include <linux/usb.h>
13
14#include "control.h"
15#include "driver.h"
16#include "pod.h"
17#include "usbdefs.h"
18#include "variax.h"
19
20#define DEVICE_ATTR2(_name1, _name2, _mode, _show, _store) \
21struct device_attribute dev_attr_##_name1 = __ATTR(_name2, _mode, _show, _store)
22
23#define LINE6_PARAM_R(PREFIX, prefix, type, param) \
24static ssize_t prefix##_get_##param(struct device *dev, \
25 struct device_attribute *attr, char *buf) \
26{ \
27 return prefix##_get_param_##type(dev, buf, PREFIX##_##param); \
28}
29
30#define LINE6_PARAM_RW(PREFIX, prefix, type, param) \
31LINE6_PARAM_R(PREFIX, prefix, type, param); \
32static ssize_t prefix##_set_##param(struct device *dev, \
33 struct device_attribute *attr, const char *buf, size_t count) \
34{ \
35 return prefix##_set_param_##type(dev, buf, count, PREFIX##_##param); \
36}
37
38#define POD_PARAM_R(type, param) LINE6_PARAM_R(POD, pod, type, param)
39#define POD_PARAM_RW(type, param) LINE6_PARAM_RW(POD, pod, type, param)
40#define VARIAX_PARAM_R(type, param) LINE6_PARAM_R(VARIAX, variax, type, param)
41#define VARIAX_PARAM_RW(type, param) LINE6_PARAM_RW(VARIAX, variax, type, param)
42
43static ssize_t pod_get_param_int(struct device *dev, char *buf, int param)
44{
45 struct usb_interface *interface = to_usb_interface(dev);
46 struct usb_line6_pod *pod = usb_get_intfdata(interface);
47 int retval = line6_dump_wait_interruptible(&pod->dumpreq);
48 if (retval < 0)
49 return retval;
50 return sprintf(buf, "%d\n", pod->prog_data.control[param]);
51}
52
53static ssize_t pod_set_param_int(struct device *dev, const char *buf,
54 size_t count, int param)
55{
56 struct usb_interface *interface = to_usb_interface(dev);
57 struct usb_line6_pod *pod = usb_get_intfdata(interface);
58 u8 value;
59 int retval;
60
61 retval = kstrtou8(buf, 10, &value);
62 if (retval)
63 return retval;
64
65 line6_pod_transmit_parameter(pod, param, value);
66 return count;
67}
68
69static ssize_t variax_get_param_int(struct device *dev, char *buf, int param)
70{
71 struct usb_interface *interface = to_usb_interface(dev);
72 struct usb_line6_variax *variax = usb_get_intfdata(interface);
73 int retval = line6_dump_wait_interruptible(&variax->dumpreq);
74 if (retval < 0)
75 return retval;
76 return sprintf(buf, "%d\n", variax->model_data.control[param]);
77}
78
79static ssize_t variax_get_param_float(struct device *dev, char *buf, int param)
80{
81 /*
82 We do our own floating point handling here since at the time
83 this code was written (Jan 2006) it was highly discouraged to
84 use floating point arithmetic in the kernel. If you think that
85 this no longer applies, feel free to replace this by generic
86 floating point code.
87 */
88
89 static const int BIAS = 0x7f;
90 static const int OFFSET = 0xf;
91 static const int PRECISION = 1000;
92
93 int len = 0;
94 unsigned part_int, part_frac;
95 struct usb_interface *interface = to_usb_interface(dev);
96 struct usb_line6_variax *variax = usb_get_intfdata(interface);
97 const unsigned char *p = variax->model_data.control + param;
98 int retval = line6_dump_wait_interruptible(&variax->dumpreq);
99 if (retval < 0)
100 return retval;
101
102 if ((p[0] == 0) && (p[1] == 0) && (p[2] == 0))
103 part_int = part_frac = 0;
104 else {
105 int exponent = (((p[0] & 0x7f) << 1) | (p[1] >> 7)) - BIAS;
106 unsigned mantissa = (p[1] << 8) | p[2] | 0x8000;
107 exponent -= OFFSET;
108
109 if (exponent >= 0) {
110 part_int = mantissa << exponent;
111 part_frac = 0;
112 } else {
113 part_int = mantissa >> -exponent;
114 part_frac = (mantissa << (32 + exponent)) & 0xffffffff;
115 }
116
117 part_frac =
118 (part_frac / ((1UL << 31) / (PRECISION / 2 * 10)) + 5) / 10;
119 }
120
121 len +=
122 sprintf(buf + len, "%s%d.%03d\n", ((p[0] & 0x80) ? "-" : ""),
123 part_int, part_frac);
124 return len;
125}
126
127POD_PARAM_RW(int, tweak);
128POD_PARAM_RW(int, wah_position);
129POD_PARAM_RW(int, compression_gain);
130POD_PARAM_RW(int, vol_pedal_position);
131POD_PARAM_RW(int, compression_threshold);
132POD_PARAM_RW(int, pan);
133POD_PARAM_RW(int, amp_model_setup);
134POD_PARAM_RW(int, amp_model);
135POD_PARAM_RW(int, drive);
136POD_PARAM_RW(int, bass);
137POD_PARAM_RW(int, mid);
138POD_PARAM_RW(int, lowmid);
139POD_PARAM_RW(int, treble);
140POD_PARAM_RW(int, highmid);
141POD_PARAM_RW(int, chan_vol);
142POD_PARAM_RW(int, reverb_mix);
143POD_PARAM_RW(int, effect_setup);
144POD_PARAM_RW(int, band_1_frequency);
145POD_PARAM_RW(int, presence);
146POD_PARAM_RW(int, treble__bass);
147POD_PARAM_RW(int, noise_gate_enable);
148POD_PARAM_RW(int, gate_threshold);
149POD_PARAM_RW(int, gate_decay_time);
150POD_PARAM_RW(int, stomp_enable);
151POD_PARAM_RW(int, comp_enable);
152POD_PARAM_RW(int, stomp_time);
153POD_PARAM_RW(int, delay_enable);
154POD_PARAM_RW(int, mod_param_1);
155POD_PARAM_RW(int, delay_param_1);
156POD_PARAM_RW(int, delay_param_1_note_value);
157POD_PARAM_RW(int, band_2_frequency__bass);
158POD_PARAM_RW(int, delay_param_2);
159POD_PARAM_RW(int, delay_volume_mix);
160POD_PARAM_RW(int, delay_param_3);
161POD_PARAM_RW(int, reverb_enable);
162POD_PARAM_RW(int, reverb_type);
163POD_PARAM_RW(int, reverb_decay);
164POD_PARAM_RW(int, reverb_tone);
165POD_PARAM_RW(int, reverb_pre_delay);
166POD_PARAM_RW(int, reverb_pre_post);
167POD_PARAM_RW(int, band_2_frequency);
168POD_PARAM_RW(int, band_3_frequency__bass);
169POD_PARAM_RW(int, wah_enable);
170POD_PARAM_RW(int, modulation_lo_cut);
171POD_PARAM_RW(int, delay_reverb_lo_cut);
172POD_PARAM_RW(int, volume_pedal_minimum);
173POD_PARAM_RW(int, eq_pre_post);
174POD_PARAM_RW(int, volume_pre_post);
175POD_PARAM_RW(int, di_model);
176POD_PARAM_RW(int, di_delay);
177POD_PARAM_RW(int, mod_enable);
178POD_PARAM_RW(int, mod_param_1_note_value);
179POD_PARAM_RW(int, mod_param_2);
180POD_PARAM_RW(int, mod_param_3);
181POD_PARAM_RW(int, mod_param_4);
182POD_PARAM_RW(int, mod_param_5);
183POD_PARAM_RW(int, mod_volume_mix);
184POD_PARAM_RW(int, mod_pre_post);
185POD_PARAM_RW(int, modulation_model);
186POD_PARAM_RW(int, band_3_frequency);
187POD_PARAM_RW(int, band_4_frequency__bass);
188POD_PARAM_RW(int, mod_param_1_double_precision);
189POD_PARAM_RW(int, delay_param_1_double_precision);
190POD_PARAM_RW(int, eq_enable);
191POD_PARAM_RW(int, tap);
192POD_PARAM_RW(int, volume_tweak_pedal_assign);
193POD_PARAM_RW(int, band_5_frequency);
194POD_PARAM_RW(int, tuner);
195POD_PARAM_RW(int, mic_selection);
196POD_PARAM_RW(int, cabinet_model);
197POD_PARAM_RW(int, stomp_model);
198POD_PARAM_RW(int, roomlevel);
199POD_PARAM_RW(int, band_4_frequency);
200POD_PARAM_RW(int, band_6_frequency);
201POD_PARAM_RW(int, stomp_param_1_note_value);
202POD_PARAM_RW(int, stomp_param_2);
203POD_PARAM_RW(int, stomp_param_3);
204POD_PARAM_RW(int, stomp_param_4);
205POD_PARAM_RW(int, stomp_param_5);
206POD_PARAM_RW(int, stomp_param_6);
207POD_PARAM_RW(int, amp_switch_select);
208POD_PARAM_RW(int, delay_param_4);
209POD_PARAM_RW(int, delay_param_5);
210POD_PARAM_RW(int, delay_pre_post);
211POD_PARAM_RW(int, delay_model);
212POD_PARAM_RW(int, delay_verb_model);
213POD_PARAM_RW(int, tempo_msb);
214POD_PARAM_RW(int, tempo_lsb);
215POD_PARAM_RW(int, wah_model);
216POD_PARAM_RW(int, bypass_volume);
217POD_PARAM_RW(int, fx_loop_on_off);
218POD_PARAM_RW(int, tweak_param_select);
219POD_PARAM_RW(int, amp1_engage);
220POD_PARAM_RW(int, band_1_gain);
221POD_PARAM_RW(int, band_2_gain__bass);
222POD_PARAM_RW(int, band_2_gain);
223POD_PARAM_RW(int, band_3_gain__bass);
224POD_PARAM_RW(int, band_3_gain);
225POD_PARAM_RW(int, band_4_gain__bass);
226POD_PARAM_RW(int, band_5_gain__bass);
227POD_PARAM_RW(int, band_4_gain);
228POD_PARAM_RW(int, band_6_gain__bass);
229VARIAX_PARAM_R(int, body);
230VARIAX_PARAM_R(int, pickup1_enable);
231VARIAX_PARAM_R(int, pickup1_type);
232VARIAX_PARAM_R(float, pickup1_position);
233VARIAX_PARAM_R(float, pickup1_angle);
234VARIAX_PARAM_R(float, pickup1_level);
235VARIAX_PARAM_R(int, pickup2_enable);
236VARIAX_PARAM_R(int, pickup2_type);
237VARIAX_PARAM_R(float, pickup2_position);
238VARIAX_PARAM_R(float, pickup2_angle);
239VARIAX_PARAM_R(float, pickup2_level);
240VARIAX_PARAM_R(int, pickup_phase);
241VARIAX_PARAM_R(float, capacitance);
242VARIAX_PARAM_R(float, tone_resistance);
243VARIAX_PARAM_R(float, volume_resistance);
244VARIAX_PARAM_R(int, taper);
245VARIAX_PARAM_R(float, tone_dump);
246VARIAX_PARAM_R(int, save_tone);
247VARIAX_PARAM_R(float, volume_dump);
248VARIAX_PARAM_R(int, tuning_enable);
249VARIAX_PARAM_R(int, tuning6);
250VARIAX_PARAM_R(int, tuning5);
251VARIAX_PARAM_R(int, tuning4);
252VARIAX_PARAM_R(int, tuning3);
253VARIAX_PARAM_R(int, tuning2);
254VARIAX_PARAM_R(int, tuning1);
255VARIAX_PARAM_R(float, detune6);
256VARIAX_PARAM_R(float, detune5);
257VARIAX_PARAM_R(float, detune4);
258VARIAX_PARAM_R(float, detune3);
259VARIAX_PARAM_R(float, detune2);
260VARIAX_PARAM_R(float, detune1);
261VARIAX_PARAM_R(float, mix6);
262VARIAX_PARAM_R(float, mix5);
263VARIAX_PARAM_R(float, mix4);
264VARIAX_PARAM_R(float, mix3);
265VARIAX_PARAM_R(float, mix2);
266VARIAX_PARAM_R(float, mix1);
267VARIAX_PARAM_R(int, pickup_wiring);
268
269static DEVICE_ATTR(tweak, S_IWUSR | S_IRUGO, pod_get_tweak, pod_set_tweak);
270static DEVICE_ATTR(wah_position, S_IWUSR | S_IRUGO, pod_get_wah_position,
271 pod_set_wah_position);
272static DEVICE_ATTR(compression_gain, S_IWUSR | S_IRUGO,
273 pod_get_compression_gain, pod_set_compression_gain);
274static DEVICE_ATTR(vol_pedal_position, S_IWUSR | S_IRUGO,
275 pod_get_vol_pedal_position, pod_set_vol_pedal_position);
276static DEVICE_ATTR(compression_threshold, S_IWUSR | S_IRUGO,
277 pod_get_compression_threshold,
278 pod_set_compression_threshold);
279static DEVICE_ATTR(pan, S_IWUSR | S_IRUGO, pod_get_pan, pod_set_pan);
280static DEVICE_ATTR(amp_model_setup, S_IWUSR | S_IRUGO, pod_get_amp_model_setup,
281 pod_set_amp_model_setup);
282static DEVICE_ATTR(amp_model, S_IWUSR | S_IRUGO, pod_get_amp_model,
283 pod_set_amp_model);
284static DEVICE_ATTR(drive, S_IWUSR | S_IRUGO, pod_get_drive, pod_set_drive);
285static DEVICE_ATTR(bass, S_IWUSR | S_IRUGO, pod_get_bass, pod_set_bass);
286static DEVICE_ATTR(mid, S_IWUSR | S_IRUGO, pod_get_mid, pod_set_mid);
287static DEVICE_ATTR(lowmid, S_IWUSR | S_IRUGO, pod_get_lowmid, pod_set_lowmid);
288static DEVICE_ATTR(treble, S_IWUSR | S_IRUGO, pod_get_treble, pod_set_treble);
289static DEVICE_ATTR(highmid, S_IWUSR | S_IRUGO, pod_get_highmid,
290 pod_set_highmid);
291static DEVICE_ATTR(chan_vol, S_IWUSR | S_IRUGO, pod_get_chan_vol,
292 pod_set_chan_vol);
293static DEVICE_ATTR(reverb_mix, S_IWUSR | S_IRUGO, pod_get_reverb_mix,
294 pod_set_reverb_mix);
295static DEVICE_ATTR(effect_setup, S_IWUSR | S_IRUGO, pod_get_effect_setup,
296 pod_set_effect_setup);
297static DEVICE_ATTR(band_1_frequency, S_IWUSR | S_IRUGO,
298 pod_get_band_1_frequency, pod_set_band_1_frequency);
299static DEVICE_ATTR(presence, S_IWUSR | S_IRUGO, pod_get_presence,
300 pod_set_presence);
301static DEVICE_ATTR2(treble__bass, treble, S_IWUSR | S_IRUGO,
302 pod_get_treble__bass, pod_set_treble__bass);
303static DEVICE_ATTR(noise_gate_enable, S_IWUSR | S_IRUGO,
304 pod_get_noise_gate_enable, pod_set_noise_gate_enable);
305static DEVICE_ATTR(gate_threshold, S_IWUSR | S_IRUGO, pod_get_gate_threshold,
306 pod_set_gate_threshold);
307static DEVICE_ATTR(gate_decay_time, S_IWUSR | S_IRUGO, pod_get_gate_decay_time,
308 pod_set_gate_decay_time);
309static DEVICE_ATTR(stomp_enable, S_IWUSR | S_IRUGO, pod_get_stomp_enable,
310 pod_set_stomp_enable);
311static DEVICE_ATTR(comp_enable, S_IWUSR | S_IRUGO, pod_get_comp_enable,
312 pod_set_comp_enable);
313static DEVICE_ATTR(stomp_time, S_IWUSR | S_IRUGO, pod_get_stomp_time,
314 pod_set_stomp_time);
315static DEVICE_ATTR(delay_enable, S_IWUSR | S_IRUGO, pod_get_delay_enable,
316 pod_set_delay_enable);
317static DEVICE_ATTR(mod_param_1, S_IWUSR | S_IRUGO, pod_get_mod_param_1,
318 pod_set_mod_param_1);
319static DEVICE_ATTR(delay_param_1, S_IWUSR | S_IRUGO, pod_get_delay_param_1,
320 pod_set_delay_param_1);
321static DEVICE_ATTR(delay_param_1_note_value, S_IWUSR | S_IRUGO,
322 pod_get_delay_param_1_note_value,
323 pod_set_delay_param_1_note_value);
324static DEVICE_ATTR2(band_2_frequency__bass, band_2_frequency, S_IWUSR | S_IRUGO,
325 pod_get_band_2_frequency__bass,
326 pod_set_band_2_frequency__bass);
327static DEVICE_ATTR(delay_param_2, S_IWUSR | S_IRUGO, pod_get_delay_param_2,
328 pod_set_delay_param_2);
329static DEVICE_ATTR(delay_volume_mix, S_IWUSR | S_IRUGO,
330 pod_get_delay_volume_mix, pod_set_delay_volume_mix);
331static DEVICE_ATTR(delay_param_3, S_IWUSR | S_IRUGO, pod_get_delay_param_3,
332 pod_set_delay_param_3);
333static DEVICE_ATTR(reverb_enable, S_IWUSR | S_IRUGO, pod_get_reverb_enable,
334 pod_set_reverb_enable);
335static DEVICE_ATTR(reverb_type, S_IWUSR | S_IRUGO, pod_get_reverb_type,
336 pod_set_reverb_type);
337static DEVICE_ATTR(reverb_decay, S_IWUSR | S_IRUGO, pod_get_reverb_decay,
338 pod_set_reverb_decay);
339static DEVICE_ATTR(reverb_tone, S_IWUSR | S_IRUGO, pod_get_reverb_tone,
340 pod_set_reverb_tone);
341static DEVICE_ATTR(reverb_pre_delay, S_IWUSR | S_IRUGO,
342 pod_get_reverb_pre_delay, pod_set_reverb_pre_delay);
343static DEVICE_ATTR(reverb_pre_post, S_IWUSR | S_IRUGO, pod_get_reverb_pre_post,
344 pod_set_reverb_pre_post);
345static DEVICE_ATTR(band_2_frequency, S_IWUSR | S_IRUGO,
346 pod_get_band_2_frequency, pod_set_band_2_frequency);
347static DEVICE_ATTR2(band_3_frequency__bass, band_3_frequency, S_IWUSR | S_IRUGO,
348 pod_get_band_3_frequency__bass,
349 pod_set_band_3_frequency__bass);
350static DEVICE_ATTR(wah_enable, S_IWUSR | S_IRUGO, pod_get_wah_enable,
351 pod_set_wah_enable);
352static DEVICE_ATTR(modulation_lo_cut, S_IWUSR | S_IRUGO,
353 pod_get_modulation_lo_cut, pod_set_modulation_lo_cut);
354static DEVICE_ATTR(delay_reverb_lo_cut, S_IWUSR | S_IRUGO,
355 pod_get_delay_reverb_lo_cut, pod_set_delay_reverb_lo_cut);
356static DEVICE_ATTR(volume_pedal_minimum, S_IWUSR | S_IRUGO,
357 pod_get_volume_pedal_minimum, pod_set_volume_pedal_minimum);
358static DEVICE_ATTR(eq_pre_post, S_IWUSR | S_IRUGO, pod_get_eq_pre_post,
359 pod_set_eq_pre_post);
360static DEVICE_ATTR(volume_pre_post, S_IWUSR | S_IRUGO, pod_get_volume_pre_post,
361 pod_set_volume_pre_post);
362static DEVICE_ATTR(di_model, S_IWUSR | S_IRUGO, pod_get_di_model,
363 pod_set_di_model);
364static DEVICE_ATTR(di_delay, S_IWUSR | S_IRUGO, pod_get_di_delay,
365 pod_set_di_delay);
366static DEVICE_ATTR(mod_enable, S_IWUSR | S_IRUGO, pod_get_mod_enable,
367 pod_set_mod_enable);
368static DEVICE_ATTR(mod_param_1_note_value, S_IWUSR | S_IRUGO,
369 pod_get_mod_param_1_note_value,
370 pod_set_mod_param_1_note_value);
371static DEVICE_ATTR(mod_param_2, S_IWUSR | S_IRUGO, pod_get_mod_param_2,
372 pod_set_mod_param_2);
373static DEVICE_ATTR(mod_param_3, S_IWUSR | S_IRUGO, pod_get_mod_param_3,
374 pod_set_mod_param_3);
375static DEVICE_ATTR(mod_param_4, S_IWUSR | S_IRUGO, pod_get_mod_param_4,
376 pod_set_mod_param_4);
377static DEVICE_ATTR(mod_param_5, S_IWUSR | S_IRUGO, pod_get_mod_param_5,
378 pod_set_mod_param_5);
379static DEVICE_ATTR(mod_volume_mix, S_IWUSR | S_IRUGO, pod_get_mod_volume_mix,
380 pod_set_mod_volume_mix);
381static DEVICE_ATTR(mod_pre_post, S_IWUSR | S_IRUGO, pod_get_mod_pre_post,
382 pod_set_mod_pre_post);
383static DEVICE_ATTR(modulation_model, S_IWUSR | S_IRUGO,
384 pod_get_modulation_model, pod_set_modulation_model);
385static DEVICE_ATTR(band_3_frequency, S_IWUSR | S_IRUGO,
386 pod_get_band_3_frequency, pod_set_band_3_frequency);
387static DEVICE_ATTR2(band_4_frequency__bass, band_4_frequency, S_IWUSR | S_IRUGO,
388 pod_get_band_4_frequency__bass,
389 pod_set_band_4_frequency__bass);
390static DEVICE_ATTR(mod_param_1_double_precision, S_IWUSR | S_IRUGO,
391 pod_get_mod_param_1_double_precision,
392 pod_set_mod_param_1_double_precision);
393static DEVICE_ATTR(delay_param_1_double_precision, S_IWUSR | S_IRUGO,
394 pod_get_delay_param_1_double_precision,
395 pod_set_delay_param_1_double_precision);
396static DEVICE_ATTR(eq_enable, S_IWUSR | S_IRUGO, pod_get_eq_enable,
397 pod_set_eq_enable);
398static DEVICE_ATTR(tap, S_IWUSR | S_IRUGO, pod_get_tap, pod_set_tap);
399static DEVICE_ATTR(volume_tweak_pedal_assign, S_IWUSR | S_IRUGO,
400 pod_get_volume_tweak_pedal_assign,
401 pod_set_volume_tweak_pedal_assign);
402static DEVICE_ATTR(band_5_frequency, S_IWUSR | S_IRUGO,
403 pod_get_band_5_frequency, pod_set_band_5_frequency);
404static DEVICE_ATTR(tuner, S_IWUSR | S_IRUGO, pod_get_tuner, pod_set_tuner);
405static DEVICE_ATTR(mic_selection, S_IWUSR | S_IRUGO, pod_get_mic_selection,
406 pod_set_mic_selection);
407static DEVICE_ATTR(cabinet_model, S_IWUSR | S_IRUGO, pod_get_cabinet_model,
408 pod_set_cabinet_model);
409static DEVICE_ATTR(stomp_model, S_IWUSR | S_IRUGO, pod_get_stomp_model,
410 pod_set_stomp_model);
411static DEVICE_ATTR(roomlevel, S_IWUSR | S_IRUGO, pod_get_roomlevel,
412 pod_set_roomlevel);
413static DEVICE_ATTR(band_4_frequency, S_IWUSR | S_IRUGO,
414 pod_get_band_4_frequency, pod_set_band_4_frequency);
415static DEVICE_ATTR(band_6_frequency, S_IWUSR | S_IRUGO,
416 pod_get_band_6_frequency, pod_set_band_6_frequency);
417static DEVICE_ATTR(stomp_param_1_note_value, S_IWUSR | S_IRUGO,
418 pod_get_stomp_param_1_note_value,
419 pod_set_stomp_param_1_note_value);
420static DEVICE_ATTR(stomp_param_2, S_IWUSR | S_IRUGO, pod_get_stomp_param_2,
421 pod_set_stomp_param_2);
422static DEVICE_ATTR(stomp_param_3, S_IWUSR | S_IRUGO, pod_get_stomp_param_3,
423 pod_set_stomp_param_3);
424static DEVICE_ATTR(stomp_param_4, S_IWUSR | S_IRUGO, pod_get_stomp_param_4,
425 pod_set_stomp_param_4);
426static DEVICE_ATTR(stomp_param_5, S_IWUSR | S_IRUGO, pod_get_stomp_param_5,
427 pod_set_stomp_param_5);
428static DEVICE_ATTR(stomp_param_6, S_IWUSR | S_IRUGO, pod_get_stomp_param_6,
429 pod_set_stomp_param_6);
430static DEVICE_ATTR(amp_switch_select, S_IWUSR | S_IRUGO,
431 pod_get_amp_switch_select, pod_set_amp_switch_select);
432static DEVICE_ATTR(delay_param_4, S_IWUSR | S_IRUGO, pod_get_delay_param_4,
433 pod_set_delay_param_4);
434static DEVICE_ATTR(delay_param_5, S_IWUSR | S_IRUGO, pod_get_delay_param_5,
435 pod_set_delay_param_5);
436static DEVICE_ATTR(delay_pre_post, S_IWUSR | S_IRUGO, pod_get_delay_pre_post,
437 pod_set_delay_pre_post);
438static DEVICE_ATTR(delay_model, S_IWUSR | S_IRUGO, pod_get_delay_model,
439 pod_set_delay_model);
440static DEVICE_ATTR(delay_verb_model, S_IWUSR | S_IRUGO,
441 pod_get_delay_verb_model, pod_set_delay_verb_model);
442static DEVICE_ATTR(tempo_msb, S_IWUSR | S_IRUGO, pod_get_tempo_msb,
443 pod_set_tempo_msb);
444static DEVICE_ATTR(tempo_lsb, S_IWUSR | S_IRUGO, pod_get_tempo_lsb,
445 pod_set_tempo_lsb);
446static DEVICE_ATTR(wah_model, S_IWUSR | S_IRUGO, pod_get_wah_model,
447 pod_set_wah_model);
448static DEVICE_ATTR(bypass_volume, S_IWUSR | S_IRUGO, pod_get_bypass_volume,
449 pod_set_bypass_volume);
450static DEVICE_ATTR(fx_loop_on_off, S_IWUSR | S_IRUGO, pod_get_fx_loop_on_off,
451 pod_set_fx_loop_on_off);
452static DEVICE_ATTR(tweak_param_select, S_IWUSR | S_IRUGO,
453 pod_get_tweak_param_select, pod_set_tweak_param_select);
454static DEVICE_ATTR(amp1_engage, S_IWUSR | S_IRUGO, pod_get_amp1_engage,
455 pod_set_amp1_engage);
456static DEVICE_ATTR(band_1_gain, S_IWUSR | S_IRUGO, pod_get_band_1_gain,
457 pod_set_band_1_gain);
458static DEVICE_ATTR2(band_2_gain__bass, band_2_gain, S_IWUSR | S_IRUGO,
459 pod_get_band_2_gain__bass, pod_set_band_2_gain__bass);
460static DEVICE_ATTR(band_2_gain, S_IWUSR | S_IRUGO, pod_get_band_2_gain,
461 pod_set_band_2_gain);
462static DEVICE_ATTR2(band_3_gain__bass, band_3_gain, S_IWUSR | S_IRUGO,
463 pod_get_band_3_gain__bass, pod_set_band_3_gain__bass);
464static DEVICE_ATTR(band_3_gain, S_IWUSR | S_IRUGO, pod_get_band_3_gain,
465 pod_set_band_3_gain);
466static DEVICE_ATTR2(band_4_gain__bass, band_4_gain, S_IWUSR | S_IRUGO,
467 pod_get_band_4_gain__bass, pod_set_band_4_gain__bass);
468static DEVICE_ATTR2(band_5_gain__bass, band_5_gain, S_IWUSR | S_IRUGO,
469 pod_get_band_5_gain__bass, pod_set_band_5_gain__bass);
470static DEVICE_ATTR(band_4_gain, S_IWUSR | S_IRUGO, pod_get_band_4_gain,
471 pod_set_band_4_gain);
472static DEVICE_ATTR2(band_6_gain__bass, band_6_gain, S_IWUSR | S_IRUGO,
473 pod_get_band_6_gain__bass, pod_set_band_6_gain__bass);
474static DEVICE_ATTR(body, S_IRUGO, variax_get_body, line6_nop_write);
475static DEVICE_ATTR(pickup1_enable, S_IRUGO, variax_get_pickup1_enable,
476 line6_nop_write);
477static DEVICE_ATTR(pickup1_type, S_IRUGO, variax_get_pickup1_type,
478 line6_nop_write);
479static DEVICE_ATTR(pickup1_position, S_IRUGO, variax_get_pickup1_position,
480 line6_nop_write);
481static DEVICE_ATTR(pickup1_angle, S_IRUGO, variax_get_pickup1_angle,
482 line6_nop_write);
483static DEVICE_ATTR(pickup1_level, S_IRUGO, variax_get_pickup1_level,
484 line6_nop_write);
485static DEVICE_ATTR(pickup2_enable, S_IRUGO, variax_get_pickup2_enable,
486 line6_nop_write);
487static DEVICE_ATTR(pickup2_type, S_IRUGO, variax_get_pickup2_type,
488 line6_nop_write);
489static DEVICE_ATTR(pickup2_position, S_IRUGO, variax_get_pickup2_position,
490 line6_nop_write);
491static DEVICE_ATTR(pickup2_angle, S_IRUGO, variax_get_pickup2_angle,
492 line6_nop_write);
493static DEVICE_ATTR(pickup2_level, S_IRUGO, variax_get_pickup2_level,
494 line6_nop_write);
495static DEVICE_ATTR(pickup_phase, S_IRUGO, variax_get_pickup_phase,
496 line6_nop_write);
497static DEVICE_ATTR(capacitance, S_IRUGO, variax_get_capacitance,
498 line6_nop_write);
499static DEVICE_ATTR(tone_resistance, S_IRUGO, variax_get_tone_resistance,
500 line6_nop_write);
501static DEVICE_ATTR(volume_resistance, S_IRUGO, variax_get_volume_resistance,
502 line6_nop_write);
503static DEVICE_ATTR(taper, S_IRUGO, variax_get_taper, line6_nop_write);
504static DEVICE_ATTR(tone_dump, S_IRUGO, variax_get_tone_dump, line6_nop_write);
505static DEVICE_ATTR(save_tone, S_IRUGO, variax_get_save_tone, line6_nop_write);
506static DEVICE_ATTR(volume_dump, S_IRUGO, variax_get_volume_dump,
507 line6_nop_write);
508static DEVICE_ATTR(tuning_enable, S_IRUGO, variax_get_tuning_enable,
509 line6_nop_write);
510static DEVICE_ATTR(tuning6, S_IRUGO, variax_get_tuning6, line6_nop_write);
511static DEVICE_ATTR(tuning5, S_IRUGO, variax_get_tuning5, line6_nop_write);
512static DEVICE_ATTR(tuning4, S_IRUGO, variax_get_tuning4, line6_nop_write);
513static DEVICE_ATTR(tuning3, S_IRUGO, variax_get_tuning3, line6_nop_write);
514static DEVICE_ATTR(tuning2, S_IRUGO, variax_get_tuning2, line6_nop_write);
515static DEVICE_ATTR(tuning1, S_IRUGO, variax_get_tuning1, line6_nop_write);
516static DEVICE_ATTR(detune6, S_IRUGO, variax_get_detune6, line6_nop_write);
517static DEVICE_ATTR(detune5, S_IRUGO, variax_get_detune5, line6_nop_write);
518static DEVICE_ATTR(detune4, S_IRUGO, variax_get_detune4, line6_nop_write);
519static DEVICE_ATTR(detune3, S_IRUGO, variax_get_detune3, line6_nop_write);
520static DEVICE_ATTR(detune2, S_IRUGO, variax_get_detune2, line6_nop_write);
521static DEVICE_ATTR(detune1, S_IRUGO, variax_get_detune1, line6_nop_write);
522static DEVICE_ATTR(mix6, S_IRUGO, variax_get_mix6, line6_nop_write);
523static DEVICE_ATTR(mix5, S_IRUGO, variax_get_mix5, line6_nop_write);
524static DEVICE_ATTR(mix4, S_IRUGO, variax_get_mix4, line6_nop_write);
525static DEVICE_ATTR(mix3, S_IRUGO, variax_get_mix3, line6_nop_write);
526static DEVICE_ATTR(mix2, S_IRUGO, variax_get_mix2, line6_nop_write);
527static DEVICE_ATTR(mix1, S_IRUGO, variax_get_mix1, line6_nop_write);
528static DEVICE_ATTR(pickup_wiring, S_IRUGO, variax_get_pickup_wiring,
529 line6_nop_write);
530
531int line6_pod_create_files(int firmware, int type, struct device *dev)
532{
533 int err;
534 CHECK_RETURN(device_create_file(dev, &dev_attr_tweak));
535 CHECK_RETURN(device_create_file(dev, &dev_attr_wah_position));
536 if ((type & (LINE6_BITS_PODXTALL)) != 0)
537 CHECK_RETURN(device_create_file
538 (dev, &dev_attr_compression_gain));
539 CHECK_RETURN(device_create_file(dev, &dev_attr_vol_pedal_position));
540 CHECK_RETURN(device_create_file(dev, &dev_attr_compression_threshold));
541 CHECK_RETURN(device_create_file(dev, &dev_attr_pan));
542 CHECK_RETURN(device_create_file(dev, &dev_attr_amp_model_setup));
543 if (firmware >= 200)
544 CHECK_RETURN(device_create_file(dev, &dev_attr_amp_model));
545 CHECK_RETURN(device_create_file(dev, &dev_attr_drive));
546 CHECK_RETURN(device_create_file(dev, &dev_attr_bass));
547 if ((type & (LINE6_BITS_PODXTALL)) != 0)
548 CHECK_RETURN(device_create_file(dev, &dev_attr_mid));
549 if ((type & (LINE6_BITS_BASSPODXTALL)) != 0)
550 CHECK_RETURN(device_create_file(dev, &dev_attr_lowmid));
551 if ((type & (LINE6_BITS_PODXTALL)) != 0)
552 CHECK_RETURN(device_create_file(dev, &dev_attr_treble));
553 if ((type & (LINE6_BITS_BASSPODXTALL)) != 0)
554 CHECK_RETURN(device_create_file(dev, &dev_attr_highmid));
555 CHECK_RETURN(device_create_file(dev, &dev_attr_chan_vol));
556 if ((type & (LINE6_BITS_PODXTALL)) != 0)
557 CHECK_RETURN(device_create_file(dev, &dev_attr_reverb_mix));
558 CHECK_RETURN(device_create_file(dev, &dev_attr_effect_setup));
559 if (firmware >= 200)
560 CHECK_RETURN(device_create_file
561 (dev, &dev_attr_band_1_frequency));
562 if ((type & (LINE6_BITS_PODXTALL)) != 0)
563 CHECK_RETURN(device_create_file(dev, &dev_attr_presence));
564 if ((type & (LINE6_BITS_BASSPODXTALL)) != 0)
565 CHECK_RETURN(device_create_file(dev, &dev_attr_treble__bass));
566 CHECK_RETURN(device_create_file(dev, &dev_attr_noise_gate_enable));
567 CHECK_RETURN(device_create_file(dev, &dev_attr_gate_threshold));
568 CHECK_RETURN(device_create_file(dev, &dev_attr_gate_decay_time));
569 CHECK_RETURN(device_create_file(dev, &dev_attr_stomp_enable));
570 CHECK_RETURN(device_create_file(dev, &dev_attr_comp_enable));
571 CHECK_RETURN(device_create_file(dev, &dev_attr_stomp_time));
572 CHECK_RETURN(device_create_file(dev, &dev_attr_delay_enable));
573 CHECK_RETURN(device_create_file(dev, &dev_attr_mod_param_1));
574 CHECK_RETURN(device_create_file(dev, &dev_attr_delay_param_1));
575 CHECK_RETURN(device_create_file
576 (dev, &dev_attr_delay_param_1_note_value));
577 if ((type & (LINE6_BITS_BASSPODXTALL)) != 0)
578 if (firmware >= 200)
579 CHECK_RETURN(device_create_file
580 (dev, &dev_attr_band_2_frequency__bass));
581 CHECK_RETURN(device_create_file(dev, &dev_attr_delay_param_2));
582 CHECK_RETURN(device_create_file(dev, &dev_attr_delay_volume_mix));
583 CHECK_RETURN(device_create_file(dev, &dev_attr_delay_param_3));
584 if ((type & (LINE6_BITS_PODXTALL)) != 0)
585 CHECK_RETURN(device_create_file(dev, &dev_attr_reverb_enable));
586 if ((type & (LINE6_BITS_PODXTALL)) != 0)
587 CHECK_RETURN(device_create_file(dev, &dev_attr_reverb_type));
588 if ((type & (LINE6_BITS_PODXTALL)) != 0)
589 CHECK_RETURN(device_create_file(dev, &dev_attr_reverb_decay));
590 if ((type & (LINE6_BITS_PODXTALL)) != 0)
591 CHECK_RETURN(device_create_file(dev, &dev_attr_reverb_tone));
592 if ((type & (LINE6_BITS_PODXTALL)) != 0)
593 CHECK_RETURN(device_create_file
594 (dev, &dev_attr_reverb_pre_delay));
595 if ((type & (LINE6_BITS_PODXTALL)) != 0)
596 CHECK_RETURN(device_create_file
597 (dev, &dev_attr_reverb_pre_post));
598 if ((type & (LINE6_BITS_PODXTALL)) != 0)
599 if (firmware >= 200)
600 CHECK_RETURN(device_create_file
601 (dev, &dev_attr_band_2_frequency));
602 if ((type & (LINE6_BITS_BASSPODXTALL)) != 0)
603 if (firmware >= 200)
604 CHECK_RETURN(device_create_file
605 (dev, &dev_attr_band_3_frequency__bass));
606 CHECK_RETURN(device_create_file(dev, &dev_attr_wah_enable));
607 if ((type & (LINE6_BITS_BASSPODXTALL)) != 0)
608 CHECK_RETURN(device_create_file
609 (dev, &dev_attr_modulation_lo_cut));
610 if ((type & (LINE6_BITS_BASSPODXTALL)) != 0)
611 CHECK_RETURN(device_create_file
612 (dev, &dev_attr_delay_reverb_lo_cut));
613 if ((type & (LINE6_BITS_PODXTALL)) != 0)
614 if (firmware >= 200)
615 CHECK_RETURN(device_create_file
616 (dev, &dev_attr_volume_pedal_minimum));
617 if ((type & (LINE6_BITS_BASSPODXTALL)) != 0)
618 if (firmware >= 200)
619 CHECK_RETURN(device_create_file
620 (dev, &dev_attr_eq_pre_post));
621 CHECK_RETURN(device_create_file(dev, &dev_attr_volume_pre_post));
622 if ((type & (LINE6_BITS_BASSPODXTALL)) != 0)
623 CHECK_RETURN(device_create_file(dev, &dev_attr_di_model));
624 if ((type & (LINE6_BITS_BASSPODXTALL)) != 0)
625 CHECK_RETURN(device_create_file(dev, &dev_attr_di_delay));
626 CHECK_RETURN(device_create_file(dev, &dev_attr_mod_enable));
627 CHECK_RETURN(device_create_file(dev, &dev_attr_mod_param_1_note_value));
628 CHECK_RETURN(device_create_file(dev, &dev_attr_mod_param_2));
629 CHECK_RETURN(device_create_file(dev, &dev_attr_mod_param_3));
630 CHECK_RETURN(device_create_file(dev, &dev_attr_mod_param_4));
631 if ((type & (LINE6_BITS_BASSPODXTALL)) != 0)
632 CHECK_RETURN(device_create_file(dev, &dev_attr_mod_param_5));
633 CHECK_RETURN(device_create_file(dev, &dev_attr_mod_volume_mix));
634 CHECK_RETURN(device_create_file(dev, &dev_attr_mod_pre_post));
635 CHECK_RETURN(device_create_file(dev, &dev_attr_modulation_model));
636 if ((type & (LINE6_BITS_PODXTALL)) != 0)
637 if (firmware >= 200)
638 CHECK_RETURN(device_create_file
639 (dev, &dev_attr_band_3_frequency));
640 if ((type & (LINE6_BITS_BASSPODXTALL)) != 0)
641 if (firmware >= 200)
642 CHECK_RETURN(device_create_file
643 (dev, &dev_attr_band_4_frequency__bass));
644 CHECK_RETURN(device_create_file
645 (dev, &dev_attr_mod_param_1_double_precision));
646 CHECK_RETURN(device_create_file
647 (dev, &dev_attr_delay_param_1_double_precision));
648 if (firmware >= 200)
649 CHECK_RETURN(device_create_file(dev, &dev_attr_eq_enable));
650 CHECK_RETURN(device_create_file(dev, &dev_attr_tap));
651 CHECK_RETURN(device_create_file
652 (dev, &dev_attr_volume_tweak_pedal_assign));
653 if ((type & (LINE6_BITS_BASSPODXTALL)) != 0)
654 if (firmware >= 200)
655 CHECK_RETURN(device_create_file
656 (dev, &dev_attr_band_5_frequency));
657 CHECK_RETURN(device_create_file(dev, &dev_attr_tuner));
658 CHECK_RETURN(device_create_file(dev, &dev_attr_mic_selection));
659 CHECK_RETURN(device_create_file(dev, &dev_attr_cabinet_model));
660 CHECK_RETURN(device_create_file(dev, &dev_attr_stomp_model));
661 CHECK_RETURN(device_create_file(dev, &dev_attr_roomlevel));
662 if ((type & (LINE6_BITS_PODXTALL)) != 0)
663 if (firmware >= 200)
664 CHECK_RETURN(device_create_file
665 (dev, &dev_attr_band_4_frequency));
666 if ((type & (LINE6_BITS_BASSPODXTALL)) != 0)
667 if (firmware >= 200)
668 CHECK_RETURN(device_create_file
669 (dev, &dev_attr_band_6_frequency));
670 CHECK_RETURN(device_create_file
671 (dev, &dev_attr_stomp_param_1_note_value));
672 CHECK_RETURN(device_create_file(dev, &dev_attr_stomp_param_2));
673 CHECK_RETURN(device_create_file(dev, &dev_attr_stomp_param_3));
674 CHECK_RETURN(device_create_file(dev, &dev_attr_stomp_param_4));
675 CHECK_RETURN(device_create_file(dev, &dev_attr_stomp_param_5));
676 CHECK_RETURN(device_create_file(dev, &dev_attr_stomp_param_6));
677 if ((type & (LINE6_BITS_LIVE)) != 0)
678 CHECK_RETURN(device_create_file
679 (dev, &dev_attr_amp_switch_select));
680 CHECK_RETURN(device_create_file(dev, &dev_attr_delay_param_4));
681 CHECK_RETURN(device_create_file(dev, &dev_attr_delay_param_5));
682 CHECK_RETURN(device_create_file(dev, &dev_attr_delay_pre_post));
683 if ((type & (LINE6_BITS_PODXTALL)) != 0)
684 CHECK_RETURN(device_create_file(dev, &dev_attr_delay_model));
685 if ((type & (LINE6_BITS_BASSPODXTALL)) != 0)
686 CHECK_RETURN(device_create_file
687 (dev, &dev_attr_delay_verb_model));
688 CHECK_RETURN(device_create_file(dev, &dev_attr_tempo_msb));
689 CHECK_RETURN(device_create_file(dev, &dev_attr_tempo_lsb));
690 if (firmware >= 300)
691 CHECK_RETURN(device_create_file(dev, &dev_attr_wah_model));
692 if (firmware >= 214)
693 CHECK_RETURN(device_create_file(dev, &dev_attr_bypass_volume));
694 if ((type & (LINE6_BITS_PRO)) != 0)
695 CHECK_RETURN(device_create_file(dev, &dev_attr_fx_loop_on_off));
696 CHECK_RETURN(device_create_file(dev, &dev_attr_tweak_param_select));
697 CHECK_RETURN(device_create_file(dev, &dev_attr_amp1_engage));
698 if (firmware >= 200)
699 CHECK_RETURN(device_create_file(dev, &dev_attr_band_1_gain));
700 if ((type & (LINE6_BITS_BASSPODXTALL)) != 0)
701 if (firmware >= 200)
702 CHECK_RETURN(device_create_file
703 (dev, &dev_attr_band_2_gain__bass));
704 if ((type & (LINE6_BITS_PODXTALL)) != 0)
705 if (firmware >= 200)
706 CHECK_RETURN(device_create_file
707 (dev, &dev_attr_band_2_gain));
708 if ((type & (LINE6_BITS_BASSPODXTALL)) != 0)
709 if (firmware >= 200)
710 CHECK_RETURN(device_create_file
711 (dev, &dev_attr_band_3_gain__bass));
712 if ((type & (LINE6_BITS_PODXTALL)) != 0)
713 if (firmware >= 200)
714 CHECK_RETURN(device_create_file
715 (dev, &dev_attr_band_3_gain));
716 if ((type & (LINE6_BITS_BASSPODXTALL)) != 0)
717 if (firmware >= 200)
718 CHECK_RETURN(device_create_file
719 (dev, &dev_attr_band_4_gain__bass));
720 if ((type & (LINE6_BITS_BASSPODXTALL)) != 0)
721 if (firmware >= 200)
722 CHECK_RETURN(device_create_file
723 (dev, &dev_attr_band_5_gain__bass));
724 if ((type & (LINE6_BITS_PODXTALL)) != 0)
725 if (firmware >= 200)
726 CHECK_RETURN(device_create_file
727 (dev, &dev_attr_band_4_gain));
728 if ((type & (LINE6_BITS_BASSPODXTALL)) != 0)
729 if (firmware >= 200)
730 CHECK_RETURN(device_create_file
731 (dev, &dev_attr_band_6_gain__bass));
732 return 0;
733}
734
735void line6_pod_remove_files(int firmware, int type, struct device *dev)
736{
737 device_remove_file(dev, &dev_attr_tweak);
738 device_remove_file(dev, &dev_attr_wah_position);
739 if ((type & (LINE6_BITS_PODXTALL)) != 0)
740 device_remove_file(dev, &dev_attr_compression_gain);
741 device_remove_file(dev, &dev_attr_vol_pedal_position);
742 device_remove_file(dev, &dev_attr_compression_threshold);
743 device_remove_file(dev, &dev_attr_pan);
744 device_remove_file(dev, &dev_attr_amp_model_setup);
745 if (firmware >= 200)
746 device_remove_file(dev, &dev_attr_amp_model);
747 device_remove_file(dev, &dev_attr_drive);
748 device_remove_file(dev, &dev_attr_bass);
749 if ((type & (LINE6_BITS_PODXTALL)) != 0)
750 device_remove_file(dev, &dev_attr_mid);
751 if ((type & (LINE6_BITS_BASSPODXTALL)) != 0)
752 device_remove_file(dev, &dev_attr_lowmid);
753 if ((type & (LINE6_BITS_PODXTALL)) != 0)
754 device_remove_file(dev, &dev_attr_treble);
755 if ((type & (LINE6_BITS_BASSPODXTALL)) != 0)
756 device_remove_file(dev, &dev_attr_highmid);
757 device_remove_file(dev, &dev_attr_chan_vol);
758 if ((type & (LINE6_BITS_PODXTALL)) != 0)
759 device_remove_file(dev, &dev_attr_reverb_mix);
760 device_remove_file(dev, &dev_attr_effect_setup);
761 if (firmware >= 200)
762 device_remove_file(dev, &dev_attr_band_1_frequency);
763 if ((type & (LINE6_BITS_PODXTALL)) != 0)
764 device_remove_file(dev, &dev_attr_presence);
765 if ((type & (LINE6_BITS_BASSPODXTALL)) != 0)
766 device_remove_file(dev, &dev_attr_treble__bass);
767 device_remove_file(dev, &dev_attr_noise_gate_enable);
768 device_remove_file(dev, &dev_attr_gate_threshold);
769 device_remove_file(dev, &dev_attr_gate_decay_time);
770 device_remove_file(dev, &dev_attr_stomp_enable);
771 device_remove_file(dev, &dev_attr_comp_enable);
772 device_remove_file(dev, &dev_attr_stomp_time);
773 device_remove_file(dev, &dev_attr_delay_enable);
774 device_remove_file(dev, &dev_attr_mod_param_1);
775 device_remove_file(dev, &dev_attr_delay_param_1);
776 device_remove_file(dev, &dev_attr_delay_param_1_note_value);
777 if ((type & (LINE6_BITS_BASSPODXTALL)) != 0)
778 if (firmware >= 200)
779 device_remove_file(dev,
780 &dev_attr_band_2_frequency__bass);
781 device_remove_file(dev, &dev_attr_delay_param_2);
782 device_remove_file(dev, &dev_attr_delay_volume_mix);
783 device_remove_file(dev, &dev_attr_delay_param_3);
784 if ((type & (LINE6_BITS_PODXTALL)) != 0)
785 device_remove_file(dev, &dev_attr_reverb_enable);
786 if ((type & (LINE6_BITS_PODXTALL)) != 0)
787 device_remove_file(dev, &dev_attr_reverb_type);
788 if ((type & (LINE6_BITS_PODXTALL)) != 0)
789 device_remove_file(dev, &dev_attr_reverb_decay);
790 if ((type & (LINE6_BITS_PODXTALL)) != 0)
791 device_remove_file(dev, &dev_attr_reverb_tone);
792 if ((type & (LINE6_BITS_PODXTALL)) != 0)
793 device_remove_file(dev, &dev_attr_reverb_pre_delay);
794 if ((type & (LINE6_BITS_PODXTALL)) != 0)
795 device_remove_file(dev, &dev_attr_reverb_pre_post);
796 if ((type & (LINE6_BITS_PODXTALL)) != 0)
797 if (firmware >= 200)
798 device_remove_file(dev, &dev_attr_band_2_frequency);
799 if ((type & (LINE6_BITS_BASSPODXTALL)) != 0)
800 if (firmware >= 200)
801 device_remove_file(dev,
802 &dev_attr_band_3_frequency__bass);
803 device_remove_file(dev, &dev_attr_wah_enable);
804 if ((type & (LINE6_BITS_BASSPODXTALL)) != 0)
805 device_remove_file(dev, &dev_attr_modulation_lo_cut);
806 if ((type & (LINE6_BITS_BASSPODXTALL)) != 0)
807 device_remove_file(dev, &dev_attr_delay_reverb_lo_cut);
808 if ((type & (LINE6_BITS_PODXTALL)) != 0)
809 if (firmware >= 200)
810 device_remove_file(dev, &dev_attr_volume_pedal_minimum);
811 if ((type & (LINE6_BITS_BASSPODXTALL)) != 0)
812 if (firmware >= 200)
813 device_remove_file(dev, &dev_attr_eq_pre_post);
814 device_remove_file(dev, &dev_attr_volume_pre_post);
815 if ((type & (LINE6_BITS_BASSPODXTALL)) != 0)
816 device_remove_file(dev, &dev_attr_di_model);
817 if ((type & (LINE6_BITS_BASSPODXTALL)) != 0)
818 device_remove_file(dev, &dev_attr_di_delay);
819 device_remove_file(dev, &dev_attr_mod_enable);
820 device_remove_file(dev, &dev_attr_mod_param_1_note_value);
821 device_remove_file(dev, &dev_attr_mod_param_2);
822 device_remove_file(dev, &dev_attr_mod_param_3);
823 device_remove_file(dev, &dev_attr_mod_param_4);
824 if ((type & (LINE6_BITS_BASSPODXTALL)) != 0)
825 device_remove_file(dev, &dev_attr_mod_param_5);
826 device_remove_file(dev, &dev_attr_mod_volume_mix);
827 device_remove_file(dev, &dev_attr_mod_pre_post);
828 device_remove_file(dev, &dev_attr_modulation_model);
829 if ((type & (LINE6_BITS_PODXTALL)) != 0)
830 if (firmware >= 200)
831 device_remove_file(dev, &dev_attr_band_3_frequency);
832 if ((type & (LINE6_BITS_BASSPODXTALL)) != 0)
833 if (firmware >= 200)
834 device_remove_file(dev,
835 &dev_attr_band_4_frequency__bass);
836 device_remove_file(dev, &dev_attr_mod_param_1_double_precision);
837 device_remove_file(dev, &dev_attr_delay_param_1_double_precision);
838 if (firmware >= 200)
839 device_remove_file(dev, &dev_attr_eq_enable);
840 device_remove_file(dev, &dev_attr_tap);
841 device_remove_file(dev, &dev_attr_volume_tweak_pedal_assign);
842 if ((type & (LINE6_BITS_BASSPODXTALL)) != 0)
843 if (firmware >= 200)
844 device_remove_file(dev, &dev_attr_band_5_frequency);
845 device_remove_file(dev, &dev_attr_tuner);
846 device_remove_file(dev, &dev_attr_mic_selection);
847 device_remove_file(dev, &dev_attr_cabinet_model);
848 device_remove_file(dev, &dev_attr_stomp_model);
849 device_remove_file(dev, &dev_attr_roomlevel);
850 if ((type & (LINE6_BITS_PODXTALL)) != 0)
851 if (firmware >= 200)
852 device_remove_file(dev, &dev_attr_band_4_frequency);
853 if ((type & (LINE6_BITS_BASSPODXTALL)) != 0)
854 if (firmware >= 200)
855 device_remove_file(dev, &dev_attr_band_6_frequency);
856 device_remove_file(dev, &dev_attr_stomp_param_1_note_value);
857 device_remove_file(dev, &dev_attr_stomp_param_2);
858 device_remove_file(dev, &dev_attr_stomp_param_3);
859 device_remove_file(dev, &dev_attr_stomp_param_4);
860 device_remove_file(dev, &dev_attr_stomp_param_5);
861 device_remove_file(dev, &dev_attr_stomp_param_6);
862 if ((type & (LINE6_BITS_LIVE)) != 0)
863 device_remove_file(dev, &dev_attr_amp_switch_select);
864 device_remove_file(dev, &dev_attr_delay_param_4);
865 device_remove_file(dev, &dev_attr_delay_param_5);
866 device_remove_file(dev, &dev_attr_delay_pre_post);
867 if ((type & (LINE6_BITS_PODXTALL)) != 0)
868 device_remove_file(dev, &dev_attr_delay_model);
869 if ((type & (LINE6_BITS_BASSPODXTALL)) != 0)
870 device_remove_file(dev, &dev_attr_delay_verb_model);
871 device_remove_file(dev, &dev_attr_tempo_msb);
872 device_remove_file(dev, &dev_attr_tempo_lsb);
873 if (firmware >= 300)
874 device_remove_file(dev, &dev_attr_wah_model);
875 if (firmware >= 214)
876 device_remove_file(dev, &dev_attr_bypass_volume);
877 if ((type & (LINE6_BITS_PRO)) != 0)
878 device_remove_file(dev, &dev_attr_fx_loop_on_off);
879 device_remove_file(dev, &dev_attr_tweak_param_select);
880 device_remove_file(dev, &dev_attr_amp1_engage);
881 if (firmware >= 200)
882 device_remove_file(dev, &dev_attr_band_1_gain);
883 if ((type & (LINE6_BITS_BASSPODXTALL)) != 0)
884 if (firmware >= 200)
885 device_remove_file(dev, &dev_attr_band_2_gain__bass);
886 if ((type & (LINE6_BITS_PODXTALL)) != 0)
887 if (firmware >= 200)
888 device_remove_file(dev, &dev_attr_band_2_gain);
889 if ((type & (LINE6_BITS_BASSPODXTALL)) != 0)
890 if (firmware >= 200)
891 device_remove_file(dev, &dev_attr_band_3_gain__bass);
892 if ((type & (LINE6_BITS_PODXTALL)) != 0)
893 if (firmware >= 200)
894 device_remove_file(dev, &dev_attr_band_3_gain);
895 if ((type & (LINE6_BITS_BASSPODXTALL)) != 0)
896 if (firmware >= 200)
897 device_remove_file(dev, &dev_attr_band_4_gain__bass);
898 if ((type & (LINE6_BITS_BASSPODXTALL)) != 0)
899 if (firmware >= 200)
900 device_remove_file(dev, &dev_attr_band_5_gain__bass);
901 if ((type & (LINE6_BITS_PODXTALL)) != 0)
902 if (firmware >= 200)
903 device_remove_file(dev, &dev_attr_band_4_gain);
904 if ((type & (LINE6_BITS_BASSPODXTALL)) != 0)
905 if (firmware >= 200)
906 device_remove_file(dev, &dev_attr_band_6_gain__bass);
907}
908
909int line6_variax_create_files(int firmware, int type, struct device *dev)
910{
911 int err;
912 CHECK_RETURN(device_create_file(dev, &dev_attr_body));
913 CHECK_RETURN(device_create_file(dev, &dev_attr_pickup1_enable));
914 CHECK_RETURN(device_create_file(dev, &dev_attr_pickup1_type));
915 CHECK_RETURN(device_create_file(dev, &dev_attr_pickup1_position));
916 CHECK_RETURN(device_create_file(dev, &dev_attr_pickup1_angle));
917 CHECK_RETURN(device_create_file(dev, &dev_attr_pickup1_level));
918 CHECK_RETURN(device_create_file(dev, &dev_attr_pickup2_enable));
919 CHECK_RETURN(device_create_file(dev, &dev_attr_pickup2_type));
920 CHECK_RETURN(device_create_file(dev, &dev_attr_pickup2_position));
921 CHECK_RETURN(device_create_file(dev, &dev_attr_pickup2_angle));
922 CHECK_RETURN(device_create_file(dev, &dev_attr_pickup2_level));
923 CHECK_RETURN(device_create_file(dev, &dev_attr_pickup_phase));
924 CHECK_RETURN(device_create_file(dev, &dev_attr_capacitance));
925 CHECK_RETURN(device_create_file(dev, &dev_attr_tone_resistance));
926 CHECK_RETURN(device_create_file(dev, &dev_attr_volume_resistance));
927 CHECK_RETURN(device_create_file(dev, &dev_attr_taper));
928 CHECK_RETURN(device_create_file(dev, &dev_attr_tone_dump));
929 CHECK_RETURN(device_create_file(dev, &dev_attr_save_tone));
930 CHECK_RETURN(device_create_file(dev, &dev_attr_volume_dump));
931 CHECK_RETURN(device_create_file(dev, &dev_attr_tuning_enable));
932 CHECK_RETURN(device_create_file(dev, &dev_attr_tuning6));
933 CHECK_RETURN(device_create_file(dev, &dev_attr_tuning5));
934 CHECK_RETURN(device_create_file(dev, &dev_attr_tuning4));
935 CHECK_RETURN(device_create_file(dev, &dev_attr_tuning3));
936 CHECK_RETURN(device_create_file(dev, &dev_attr_tuning2));
937 CHECK_RETURN(device_create_file(dev, &dev_attr_tuning1));
938 CHECK_RETURN(device_create_file(dev, &dev_attr_detune6));
939 CHECK_RETURN(device_create_file(dev, &dev_attr_detune5));
940 CHECK_RETURN(device_create_file(dev, &dev_attr_detune4));
941 CHECK_RETURN(device_create_file(dev, &dev_attr_detune3));
942 CHECK_RETURN(device_create_file(dev, &dev_attr_detune2));
943 CHECK_RETURN(device_create_file(dev, &dev_attr_detune1));
944 CHECK_RETURN(device_create_file(dev, &dev_attr_mix6));
945 CHECK_RETURN(device_create_file(dev, &dev_attr_mix5));
946 CHECK_RETURN(device_create_file(dev, &dev_attr_mix4));
947 CHECK_RETURN(device_create_file(dev, &dev_attr_mix3));
948 CHECK_RETURN(device_create_file(dev, &dev_attr_mix2));
949 CHECK_RETURN(device_create_file(dev, &dev_attr_mix1));
950 CHECK_RETURN(device_create_file(dev, &dev_attr_pickup_wiring));
951 return 0;
952}
953
954void line6_variax_remove_files(int firmware, int type, struct device *dev)
955{
956 device_remove_file(dev, &dev_attr_body);
957 device_remove_file(dev, &dev_attr_pickup1_enable);
958 device_remove_file(dev, &dev_attr_pickup1_type);
959 device_remove_file(dev, &dev_attr_pickup1_position);
960 device_remove_file(dev, &dev_attr_pickup1_angle);
961 device_remove_file(dev, &dev_attr_pickup1_level);
962 device_remove_file(dev, &dev_attr_pickup2_enable);
963 device_remove_file(dev, &dev_attr_pickup2_type);
964 device_remove_file(dev, &dev_attr_pickup2_position);
965 device_remove_file(dev, &dev_attr_pickup2_angle);
966 device_remove_file(dev, &dev_attr_pickup2_level);
967 device_remove_file(dev, &dev_attr_pickup_phase);
968 device_remove_file(dev, &dev_attr_capacitance);
969 device_remove_file(dev, &dev_attr_tone_resistance);
970 device_remove_file(dev, &dev_attr_volume_resistance);
971 device_remove_file(dev, &dev_attr_taper);
972 device_remove_file(dev, &dev_attr_tone_dump);
973 device_remove_file(dev, &dev_attr_save_tone);
974 device_remove_file(dev, &dev_attr_volume_dump);
975 device_remove_file(dev, &dev_attr_tuning_enable);
976 device_remove_file(dev, &dev_attr_tuning6);
977 device_remove_file(dev, &dev_attr_tuning5);
978 device_remove_file(dev, &dev_attr_tuning4);
979 device_remove_file(dev, &dev_attr_tuning3);
980 device_remove_file(dev, &dev_attr_tuning2);
981 device_remove_file(dev, &dev_attr_tuning1);
982 device_remove_file(dev, &dev_attr_detune6);
983 device_remove_file(dev, &dev_attr_detune5);
984 device_remove_file(dev, &dev_attr_detune4);
985 device_remove_file(dev, &dev_attr_detune3);
986 device_remove_file(dev, &dev_attr_detune2);
987 device_remove_file(dev, &dev_attr_detune1);
988 device_remove_file(dev, &dev_attr_mix6);
989 device_remove_file(dev, &dev_attr_mix5);
990 device_remove_file(dev, &dev_attr_mix4);
991 device_remove_file(dev, &dev_attr_mix3);
992 device_remove_file(dev, &dev_attr_mix2);
993 device_remove_file(dev, &dev_attr_mix1);
994 device_remove_file(dev, &dev_attr_pickup_wiring);
995}
diff --git a/drivers/staging/line6/control.h b/drivers/staging/line6/control.h
deleted file mode 100644
index e4c5d2ce2aae..000000000000
--- a/drivers/staging/line6/control.h
+++ /dev/null
@@ -1,195 +0,0 @@
1/*
2 * Line6 Linux USB driver - 0.9.1beta
3 *
4 * Copyright (C) 2004-2010 Markus Grabner (grabner@icg.tugraz.at)
5 *
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public License as
8 * published by the Free Software Foundation, version 2.
9 *
10 */
11
12#ifndef LINE6_CONTROL_H
13#define LINE6_CONTROL_H
14
15/**
16 List of PODxt Pro controls.
17 See Appendix C of the "PODxt (Pro) Pilot's Handbook" by Line6.
18 Comments after the number refer to the PODxt Pro firmware version required
19 for this feature.
20
21 Please *don't* reformat this file since "control.c" is created automatically
22 from "control.h", and this process depends on the exact formatting of the
23 code and the comments below!
24*/
25
26/* *INDENT-OFF* */
27
28enum {
29 POD_tweak = 1,
30 POD_wah_position = 4,
31 POD_compression_gain = 5, /* device: LINE6_BITS_PODXTALL */
32 POD_vol_pedal_position = 7,
33 POD_compression_threshold = 9,
34 POD_pan = 10,
35 POD_amp_model_setup = 11,
36 POD_amp_model = 12, /* firmware: 2.0 */
37 POD_drive = 13,
38 POD_bass = 14,
39 POD_mid = 15, /* device: LINE6_BITS_PODXTALL */
40 POD_lowmid = 15, /* device: LINE6_BITS_BASSPODXTALL */
41 POD_treble = 16, /* device: LINE6_BITS_PODXTALL */
42 POD_highmid = 16, /* device: LINE6_BITS_BASSPODXTALL */
43 POD_chan_vol = 17,
44 POD_reverb_mix = 18, /* device: LINE6_BITS_PODXTALL */
45 POD_effect_setup = 19,
46 POD_band_1_frequency = 20, /* firmware: 2.0 */
47 POD_presence = 21, /* device: LINE6_BITS_PODXTALL */
48 POD_treble__bass = 21, /* device: LINE6_BITS_BASSPODXTALL */
49 POD_noise_gate_enable = 22,
50 POD_gate_threshold = 23,
51 POD_gate_decay_time = 24,
52 POD_stomp_enable = 25,
53 POD_comp_enable = 26,
54 POD_stomp_time = 27,
55 POD_delay_enable = 28,
56 POD_mod_param_1 = 29,
57 POD_delay_param_1 = 30,
58 POD_delay_param_1_note_value = 31,
59 POD_band_2_frequency__bass = 32, /* device: LINE6_BITS_BASSPODXTALL */ /* firmware: 2.0 */
60 POD_delay_param_2 = 33,
61 POD_delay_volume_mix = 34,
62 POD_delay_param_3 = 35,
63 POD_reverb_enable = 36, /* device: LINE6_BITS_PODXTALL */
64 POD_reverb_type = 37, /* device: LINE6_BITS_PODXTALL */
65 POD_reverb_decay = 38, /* device: LINE6_BITS_PODXTALL */
66 POD_reverb_tone = 39, /* device: LINE6_BITS_PODXTALL */
67 POD_reverb_pre_delay = 40, /* device: LINE6_BITS_PODXTALL */
68 POD_reverb_pre_post = 41, /* device: LINE6_BITS_PODXTALL */
69 POD_band_2_frequency = 42, /* device: LINE6_BITS_PODXTALL */ /* firmware: 2.0 */
70 POD_band_3_frequency__bass = 42, /* device: LINE6_BITS_BASSPODXTALL */ /* firmware: 2.0 */
71 POD_wah_enable = 43,
72 POD_modulation_lo_cut = 44, /* device: LINE6_BITS_BASSPODXTALL */
73 POD_delay_reverb_lo_cut = 45, /* device: LINE6_BITS_BASSPODXTALL */
74 POD_volume_pedal_minimum = 46, /* device: LINE6_BITS_PODXTALL */ /* firmware: 2.0 */
75 POD_eq_pre_post = 46, /* device: LINE6_BITS_BASSPODXTALL */ /* firmware: 2.0 */
76 POD_volume_pre_post = 47,
77 POD_di_model = 48, /* device: LINE6_BITS_BASSPODXTALL */
78 POD_di_delay = 49, /* device: LINE6_BITS_BASSPODXTALL */
79 POD_mod_enable = 50,
80 POD_mod_param_1_note_value = 51,
81 POD_mod_param_2 = 52,
82 POD_mod_param_3 = 53,
83 POD_mod_param_4 = 54,
84 POD_mod_param_5 = 55, /* device: LINE6_BITS_BASSPODXTALL */
85 POD_mod_volume_mix = 56,
86 POD_mod_pre_post = 57,
87 POD_modulation_model = 58,
88 POD_band_3_frequency = 60, /* device: LINE6_BITS_PODXTALL */ /* firmware: 2.0 */
89 POD_band_4_frequency__bass = 60, /* device: LINE6_BITS_BASSPODXTALL */ /* firmware: 2.0 */
90 POD_mod_param_1_double_precision = 61,
91 POD_delay_param_1_double_precision = 62,
92 POD_eq_enable = 63, /* firmware: 2.0 */
93 POD_tap = 64,
94 POD_volume_tweak_pedal_assign = 65,
95 POD_band_5_frequency = 68, /* device: LINE6_BITS_BASSPODXTALL */ /* firmware: 2.0 */
96 POD_tuner = 69,
97 POD_mic_selection = 70,
98 POD_cabinet_model = 71,
99 POD_stomp_model = 75,
100 POD_roomlevel = 76,
101 POD_band_4_frequency = 77, /* device: LINE6_BITS_PODXTALL */ /* firmware: 2.0 */
102 POD_band_6_frequency = 77, /* device: LINE6_BITS_BASSPODXTALL */ /* firmware: 2.0 */
103 POD_stomp_param_1_note_value = 78,
104 POD_stomp_param_2 = 79,
105 POD_stomp_param_3 = 80,
106 POD_stomp_param_4 = 81,
107 POD_stomp_param_5 = 82,
108 POD_stomp_param_6 = 83,
109 POD_amp_switch_select = 84, /* device: LINE6_BITS_LIVE */
110 POD_delay_param_4 = 85,
111 POD_delay_param_5 = 86,
112 POD_delay_pre_post = 87,
113 POD_delay_model = 88, /* device: LINE6_BITS_PODXTALL */
114 POD_delay_verb_model = 88, /* device: LINE6_BITS_BASSPODXTALL */
115 POD_tempo_msb = 89,
116 POD_tempo_lsb = 90,
117 POD_wah_model = 91, /* firmware: 3.0 */
118 POD_bypass_volume = 105, /* firmware: 2.14 */
119 POD_fx_loop_on_off = 107, /* device: LINE6_BITS_PRO */
120 POD_tweak_param_select = 108,
121 POD_amp1_engage = 111,
122 POD_band_1_gain = 114, /* firmware: 2.0 */
123 POD_band_2_gain__bass = 115, /* device: LINE6_BITS_BASSPODXTALL */ /* firmware: 2.0 */
124 POD_band_2_gain = 116, /* device: LINE6_BITS_PODXTALL */ /* firmware: 2.0 */
125 POD_band_3_gain__bass = 116, /* device: LINE6_BITS_BASSPODXTALL */ /* firmware: 2.0 */
126 POD_band_3_gain = 117, /* device: LINE6_BITS_PODXTALL */ /* firmware: 2.0 */
127 POD_band_4_gain__bass = 117, /* device: LINE6_BITS_BASSPODXTALL */ /* firmware: 2.0 */
128 POD_band_5_gain__bass = 118, /* device: LINE6_BITS_BASSPODXTALL */ /* firmware: 2.0 */
129 POD_band_4_gain = 119, /* device: LINE6_BITS_PODXTALL */ /* firmware: 2.0 */
130 POD_band_6_gain__bass = 119 /* device: LINE6_BITS_BASSPODXTALL */ /* firmware: 2.0 */
131};
132
133/**
134 List of Variax workbench controls (dump).
135*/
136enum {
137 VARIAX_body = 3,
138 VARIAX_pickup1_enable = 4, /* 0: enabled, 1: disabled */
139 VARIAX_pickup1_type = 8,
140 VARIAX_pickup1_position = 9, /* type: 24 bit float */
141 VARIAX_pickup1_angle = 12, /* type: 24 bit float */
142 VARIAX_pickup1_level = 15, /* type: 24 bit float */
143 VARIAX_pickup2_enable = 18, /* 0: enabled, 1: disabled */
144 VARIAX_pickup2_type = 22,
145 VARIAX_pickup2_position = 23, /* type: 24 bit float */
146 VARIAX_pickup2_angle = 26, /* type: 24 bit float */
147 VARIAX_pickup2_level = 29, /* type: 24 bit float */
148 VARIAX_pickup_phase = 32, /* 0: in phase, 1: out of phase */
149 VARIAX_capacitance = 33, /* type: 24 bit float */
150 VARIAX_tone_resistance = 36, /* type: 24 bit float */
151 VARIAX_volume_resistance = 39, /* type: 24 bit float */
152 VARIAX_taper = 42, /* 0: Linear, 1: Audio */
153 VARIAX_tone_dump = 43, /* type: 24 bit float */
154 VARIAX_save_tone = 46,
155 VARIAX_volume_dump = 47, /* type: 24 bit float */
156 VARIAX_tuning_enable = 50,
157 VARIAX_tuning6 = 51,
158 VARIAX_tuning5 = 52,
159 VARIAX_tuning4 = 53,
160 VARIAX_tuning3 = 54,
161 VARIAX_tuning2 = 55,
162 VARIAX_tuning1 = 56,
163 VARIAX_detune6 = 57, /* type: 24 bit float */
164 VARIAX_detune5 = 60, /* type: 24 bit float */
165 VARIAX_detune4 = 63, /* type: 24 bit float */
166 VARIAX_detune3 = 66, /* type: 24 bit float */
167 VARIAX_detune2 = 69, /* type: 24 bit float */
168 VARIAX_detune1 = 72, /* type: 24 bit float */
169 VARIAX_mix6 = 75, /* type: 24 bit float */
170 VARIAX_mix5 = 78, /* type: 24 bit float */
171 VARIAX_mix4 = 81, /* type: 24 bit float */
172 VARIAX_mix3 = 84, /* type: 24 bit float */
173 VARIAX_mix2 = 87, /* type: 24 bit float */
174 VARIAX_mix1 = 90, /* type: 24 bit float */
175 VARIAX_pickup_wiring = 96 /* 0: parallel, 1: series */
176};
177
178/**
179 List of Variax workbench controls (MIDI).
180*/
181enum {
182 VARIAXMIDI_volume = 7,
183 VARIAXMIDI_tone = 79,
184};
185
186/* *INDENT-ON* */
187
188extern int line6_pod_create_files(int firmware, int type, struct device *dev);
189extern void line6_pod_remove_files(int firmware, int type, struct device *dev);
190extern int line6_variax_create_files(int firmware, int type,
191 struct device *dev);
192extern void line6_variax_remove_files(int firmware, int type,
193 struct device *dev);
194
195#endif
diff --git a/drivers/staging/line6/driver.c b/drivers/staging/line6/driver.c
index b8358ca71bdd..1e4ce50069a9 100644
--- a/drivers/staging/line6/driver.c
+++ b/drivers/staging/line6/driver.c
@@ -16,7 +16,6 @@
16 16
17#include "audio.h" 17#include "audio.h"
18#include "capture.h" 18#include "capture.h"
19#include "control.h"
20#include "driver.h" 19#include "driver.h"
21#include "midi.h" 20#include "midi.h"
22#include "playback.h" 21#include "playback.h"
@@ -96,8 +95,6 @@ static const char line6_request_version[] = {
96 0xf0, 0x7e, 0x7f, 0x06, 0x01, 0xf7 95 0xf0, 0x7e, 0x7f, 0x06, 0x01, 0xf7
97}; 96};
98 97
99struct usb_line6 *line6_devices[LINE6_MAX_DEVICES];
100
101/** 98/**
102 Class for asynchronous messages. 99 Class for asynchronous messages.
103*/ 100*/
@@ -179,22 +176,6 @@ void line6_write_hexdump(struct usb_line6 *line6, char dir,
179} 176}
180#endif 177#endif
181 178
182#ifdef CONFIG_LINE6_USB_DUMP_CTRL
183/*
184 Dump URB data to syslog.
185*/
186static void line6_dump_urb(struct urb *urb)
187{
188 struct usb_line6 *line6 = (struct usb_line6 *)urb->context;
189
190 if (urb->status < 0)
191 return;
192
193 line6_write_hexdump(line6, 'R', (unsigned char *)urb->transfer_buffer,
194 urb->actual_length);
195}
196#endif
197
198/* 179/*
199 Send raw message in pieces of wMaxPacketSize bytes. 180 Send raw message in pieces of wMaxPacketSize bytes.
200*/ 181*/
@@ -203,10 +184,6 @@ int line6_send_raw_message(struct usb_line6 *line6, const char *buffer,
203{ 184{
204 int i, done = 0; 185 int i, done = 0;
205 186
206#ifdef CONFIG_LINE6_USB_DUMP_CTRL
207 line6_write_hexdump(line6, 'S', buffer, size);
208#endif
209
210 for (i = 0; i < size; i += line6->max_packet_size) { 187 for (i = 0; i < size; i += line6->max_packet_size) {
211 int partial; 188 int partial;
212 const char *frag_buf = buffer + i; 189 const char *frag_buf = buffer + i;
@@ -261,10 +238,6 @@ static int line6_send_raw_message_async_part(struct message *msg,
261 (char *)msg->buffer + done, bytes, 238 (char *)msg->buffer + done, bytes,
262 line6_async_request_sent, msg, line6->interval); 239 line6_async_request_sent, msg, line6->interval);
263 240
264#ifdef CONFIG_LINE6_USB_DUMP_CTRL
265 line6_write_hexdump(line6, 'S', (char *)msg->buffer + done, bytes);
266#endif
267
268 msg->done += bytes; 241 msg->done += bytes;
269 retval = usb_submit_urb(urb, GFP_ATOMIC); 242 retval = usb_submit_urb(urb, GFP_ATOMIC);
270 243
@@ -405,19 +378,13 @@ static void line6_data_received(struct urb *urb)
405 if (urb->status == -ESHUTDOWN) 378 if (urb->status == -ESHUTDOWN)
406 return; 379 return;
407 380
408#ifdef CONFIG_LINE6_USB_DUMP_CTRL
409 line6_dump_urb(urb);
410#endif
411
412 done = 381 done =
413 line6_midibuf_write(mb, urb->transfer_buffer, urb->actual_length); 382 line6_midibuf_write(mb, urb->transfer_buffer, urb->actual_length);
414 383
415 if (done < urb->actual_length) { 384 if (done < urb->actual_length) {
416 line6_midibuf_ignore(mb, done); 385 line6_midibuf_ignore(mb, done);
417 DEBUG_MESSAGES(dev_err 386 dev_dbg(line6->ifcdev, "%d %d buffer overflow - message skipped\n",
418 (line6->ifcdev, 387 done, urb->actual_length);
419 "%d %d buffer overflow - message skipped\n",
420 done, urb->actual_length));
421 } 388 }
422 389
423 for (;;) { 390 for (;;) {
@@ -428,15 +395,7 @@ static void line6_data_received(struct urb *urb)
428 if (done == 0) 395 if (done == 0)
429 break; 396 break;
430 397
431 /* MIDI input filter */
432 if (line6_midibuf_skip_message
433 (mb, line6->line6midi->midi_mask_receive))
434 continue;
435
436 line6->message_length = done; 398 line6->message_length = done;
437#ifdef CONFIG_LINE6_USB_DUMP_MIDI
438 line6_write_hexdump(line6, 'r', line6->buffer_message, done);
439#endif
440 line6_midi_receive(line6, line6->buffer_message, done); 399 line6_midi_receive(line6, line6->buffer_message, done);
441 400
442 switch (line6->usbdev->descriptor.idProduct) { 401 switch (line6->usbdev->descriptor.idProduct) {
@@ -506,10 +465,6 @@ int line6_send_program(struct usb_line6 *line6, u8 value)
506 buffer[0] = LINE6_PROGRAM_CHANGE | LINE6_CHANNEL_HOST; 465 buffer[0] = LINE6_PROGRAM_CHANGE | LINE6_CHANNEL_HOST;
507 buffer[1] = value; 466 buffer[1] = value;
508 467
509#ifdef CONFIG_LINE6_USB_DUMP_CTRL
510 line6_write_hexdump(line6, 'S', buffer, 2);
511#endif
512
513 retval = usb_interrupt_msg(line6->usbdev, 468 retval = usb_interrupt_msg(line6->usbdev,
514 usb_sndintpipe(line6->usbdev, 469 usb_sndintpipe(line6->usbdev,
515 line6->ep_control_write), 470 line6->ep_control_write),
@@ -543,10 +498,6 @@ int line6_transmit_parameter(struct usb_line6 *line6, int param, u8 value)
543 buffer[1] = param; 498 buffer[1] = param;
544 buffer[2] = value; 499 buffer[2] = value;
545 500
546#ifdef CONFIG_LINE6_USB_DUMP_CTRL
547 line6_write_hexdump(line6, 'S', buffer, 3);
548#endif
549
550 retval = usb_interrupt_msg(line6->usbdev, 501 retval = usb_interrupt_msg(line6->usbdev,
551 usb_sndintpipe(line6->usbdev, 502 usb_sndintpipe(line6->usbdev,
552 line6->ep_control_write), 503 line6->ep_control_write),
@@ -690,20 +641,6 @@ ssize_t line6_nop_write(struct device *dev, struct device_attribute *attr,
690} 641}
691 642
692/* 643/*
693 "write" request on "raw" special file.
694*/
695#ifdef CONFIG_LINE6_USB_RAW
696ssize_t line6_set_raw(struct device *dev, struct device_attribute *attr,
697 const char *buf, size_t count)
698{
699 struct usb_interface *interface = to_usb_interface(dev);
700 struct usb_line6 *line6 = usb_get_intfdata(interface);
701 line6_send_raw_message(line6, buf, count);
702 return count;
703}
704#endif
705
706/*
707 Generic destructor. 644 Generic destructor.
708*/ 645*/
709static void line6_destruct(struct usb_interface *interface) 646static void line6_destruct(struct usb_interface *interface)
@@ -740,7 +677,6 @@ static int line6_probe(struct usb_interface *interface,
740 struct usb_device *usbdev; 677 struct usb_device *usbdev;
741 struct usb_line6 *line6; 678 struct usb_line6 *line6;
742 const struct line6_properties *properties; 679 const struct line6_properties *properties;
743 int devnum;
744 int interface_number, alternate = 0; 680 int interface_number, alternate = 0;
745 int product; 681 int product;
746 int size = 0; 682 int size = 0;
@@ -774,16 +710,6 @@ static int line6_probe(struct usb_interface *interface,
774 goto err_put; 710 goto err_put;
775 } 711 }
776 712
777 /* find free slot in device table: */
778 for (devnum = 0; devnum < LINE6_MAX_DEVICES; ++devnum)
779 if (line6_devices[devnum] == NULL)
780 break;
781
782 if (devnum == LINE6_MAX_DEVICES) {
783 ret = -ENODEV;
784 goto err_put;
785 }
786
787 /* initialize device info: */ 713 /* initialize device info: */
788 properties = &line6_properties_table[devtype]; 714 properties = &line6_properties_table[devtype];
789 dev_info(&interface->dev, "Line6 %s found\n", properties->name); 715 dev_info(&interface->dev, "Line6 %s found\n", properties->name);
@@ -1112,7 +1038,6 @@ static int line6_probe(struct usb_interface *interface,
1112 1038
1113 dev_info(&interface->dev, "Line6 %s now attached\n", 1039 dev_info(&interface->dev, "Line6 %s now attached\n",
1114 line6->properties->name); 1040 line6->properties->name);
1115 line6_devices[devnum] = line6;
1116 1041
1117 switch (product) { 1042 switch (product) {
1118 case LINE6_DEVID_PODX3: 1043 case LINE6_DEVID_PODX3:
@@ -1141,7 +1066,7 @@ static void line6_disconnect(struct usb_interface *interface)
1141{ 1066{
1142 struct usb_line6 *line6; 1067 struct usb_line6 *line6;
1143 struct usb_device *usbdev; 1068 struct usb_device *usbdev;
1144 int interface_number, i; 1069 int interface_number;
1145 1070
1146 if (interface == NULL) 1071 if (interface == NULL)
1147 return; 1072 return;
@@ -1214,10 +1139,6 @@ static void line6_disconnect(struct usb_interface *interface)
1214 1139
1215 dev_info(&interface->dev, "Line6 %s now disconnected\n", 1140 dev_info(&interface->dev, "Line6 %s now disconnected\n",
1216 line6->properties->name); 1141 line6->properties->name);
1217
1218 for (i = LINE6_MAX_DEVICES; i--;)
1219 if (line6_devices[i] == line6)
1220 line6_devices[i] = NULL;
1221 } 1142 }
1222 1143
1223 line6_destruct(interface); 1144 line6_destruct(interface);
diff --git a/drivers/staging/line6/driver.h b/drivers/staging/line6/driver.h
index a3029eb223d6..f0be5a2adaba 100644
--- a/drivers/staging/line6/driver.h
+++ b/drivers/staging/line6/driver.h
@@ -20,12 +20,11 @@
20 20
21#define DRIVER_NAME "line6usb" 21#define DRIVER_NAME "line6usb"
22 22
23#if defined(CONFIG_LINE6_USB_DUMP_CTRL) || defined(CONFIG_LINE6_USB_DUMP_MIDI) || defined(CONFIG_LINE6_USB_DUMP_PCM) 23#if defined(CONFIG_LINE6_USB_DUMP_PCM)
24#define CONFIG_LINE6_USB_DUMP_ANY 24#define CONFIG_LINE6_USB_DUMP_ANY
25#endif 25#endif
26 26
27#define LINE6_TIMEOUT 1 27#define LINE6_TIMEOUT 1
28#define LINE6_MAX_DEVICES 8
29#define LINE6_BUFSIZE_LISTEN 32 28#define LINE6_BUFSIZE_LISTEN 32
30#define LINE6_MESSAGE_MAXLEN 256 29#define LINE6_MESSAGE_MAXLEN 256
31 30
@@ -53,12 +52,6 @@
53 52
54#define LINE6_CHANNEL_MASK 0x0f 53#define LINE6_CHANNEL_MASK 0x0f
55 54
56#ifdef CONFIG_LINE6_USB_DEBUG
57#define DEBUG_MESSAGES(x) (x)
58#else
59#define DEBUG_MESSAGES(x)
60#endif
61
62#define MISSING_CASE \ 55#define MISSING_CASE \
63 printk(KERN_ERR "line6usb driver bug: missing case in %s:%d\n", \ 56 printk(KERN_ERR "line6usb driver bug: missing case in %s:%d\n", \
64 __FILE__, __LINE__) 57 __FILE__, __LINE__)
@@ -78,7 +71,6 @@ do { \
78} while (0) 71} while (0)
79 72
80extern const unsigned char line6_midi_id[3]; 73extern const unsigned char line6_midi_id[3];
81extern struct usb_line6 *line6_devices[LINE6_MAX_DEVICES];
82 74
83static const int SYSEX_DATA_OFS = sizeof(line6_midi_id) + 3; 75static const int SYSEX_DATA_OFS = sizeof(line6_midi_id) + 3;
84static const int SYSEX_EXTRA_SIZE = sizeof(line6_midi_id) + 4; 76static const int SYSEX_EXTRA_SIZE = sizeof(line6_midi_id) + 4;
diff --git a/drivers/staging/line6/dumprequest.c b/drivers/staging/line6/dumprequest.c
deleted file mode 100644
index 60c7bae3ad3c..000000000000
--- a/drivers/staging/line6/dumprequest.c
+++ /dev/null
@@ -1,135 +0,0 @@
1/*
2 * Line6 Linux USB driver - 0.9.1beta
3 *
4 * Copyright (C) 2004-2010 Markus Grabner (grabner@icg.tugraz.at)
5 *
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public License as
8 * published by the Free Software Foundation, version 2.
9 *
10 */
11
12#include <linux/slab.h>
13
14#include "driver.h"
15#include "dumprequest.h"
16
17/*
18 Set "dump in progress" flag.
19*/
20void line6_dump_started(struct line6_dump_request *l6dr, int dest)
21{
22 l6dr->in_progress = dest;
23}
24
25/*
26 Invalidate current channel, i.e., set "dump in progress" flag.
27 Reading from the "dump" special file blocks until dump is completed.
28*/
29void line6_invalidate_current(struct line6_dump_request *l6dr)
30{
31 line6_dump_started(l6dr, LINE6_DUMP_CURRENT);
32}
33
34/*
35 Clear "dump in progress" flag and notify waiting processes.
36*/
37void line6_dump_finished(struct line6_dump_request *l6dr)
38{
39 l6dr->in_progress = LINE6_DUMP_NONE;
40 wake_up(&l6dr->wait);
41}
42
43/*
44 Send an asynchronous channel dump request.
45*/
46int line6_dump_request_async(struct line6_dump_request *l6dr,
47 struct usb_line6 *line6, int num, int dest)
48{
49 int ret;
50 line6_dump_started(l6dr, dest);
51 ret = line6_send_raw_message_async(line6, l6dr->reqbufs[num].buffer,
52 l6dr->reqbufs[num].length);
53
54 if (ret < 0)
55 line6_dump_finished(l6dr);
56
57 return ret;
58}
59
60/*
61 Wait for completion (interruptible).
62*/
63int line6_dump_wait_interruptible(struct line6_dump_request *l6dr)
64{
65 return wait_event_interruptible(l6dr->wait,
66 l6dr->in_progress == LINE6_DUMP_NONE);
67}
68
69/*
70 Wait for completion.
71*/
72void line6_dump_wait(struct line6_dump_request *l6dr)
73{
74 wait_event(l6dr->wait, l6dr->in_progress == LINE6_DUMP_NONE);
75}
76
77/*
78 Wait for completion (with timeout).
79*/
80int line6_dump_wait_timeout(struct line6_dump_request *l6dr, long timeout)
81{
82 return wait_event_timeout(l6dr->wait,
83 l6dr->in_progress == LINE6_DUMP_NONE,
84 timeout);
85}
86
87/*
88 Initialize dump request buffer.
89*/
90int line6_dumpreq_initbuf(struct line6_dump_request *l6dr, const void *buf,
91 size_t len, int num)
92{
93 l6dr->reqbufs[num].buffer = kmemdup(buf, len, GFP_KERNEL);
94 if (l6dr->reqbufs[num].buffer == NULL)
95 return -ENOMEM;
96 l6dr->reqbufs[num].length = len;
97 return 0;
98}
99
100/*
101 Initialize dump request data structure (including one buffer).
102*/
103int line6_dumpreq_init(struct line6_dump_request *l6dr, const void *buf,
104 size_t len)
105{
106 int ret;
107 ret = line6_dumpreq_initbuf(l6dr, buf, len, 0);
108 if (ret < 0)
109 return ret;
110 init_waitqueue_head(&l6dr->wait);
111 return 0;
112}
113
114/*
115 Destruct dump request data structure.
116*/
117void line6_dumpreq_destructbuf(struct line6_dump_request *l6dr, int num)
118{
119 if (l6dr == NULL)
120 return;
121 if (l6dr->reqbufs[num].buffer == NULL)
122 return;
123 kfree(l6dr->reqbufs[num].buffer);
124 l6dr->reqbufs[num].buffer = NULL;
125}
126
127/*
128 Destruct dump request data structure.
129*/
130void line6_dumpreq_destruct(struct line6_dump_request *l6dr)
131{
132 if (l6dr->reqbufs[0].buffer == NULL)
133 return;
134 line6_dumpreq_destructbuf(l6dr, 0);
135}
diff --git a/drivers/staging/line6/dumprequest.h b/drivers/staging/line6/dumprequest.h
deleted file mode 100644
index c17a262fad2e..000000000000
--- a/drivers/staging/line6/dumprequest.h
+++ /dev/null
@@ -1,76 +0,0 @@
1/*
2 * Line6 Linux USB driver - 0.9.1beta
3 *
4 * Copyright (C) 2004-2010 Markus Grabner (grabner@icg.tugraz.at)
5 *
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public License as
8 * published by the Free Software Foundation, version 2.
9 *
10 */
11
12#ifndef DUMPREQUEST_H
13#define DUMPREQUEST_H
14
15#include <linux/usb.h>
16#include <linux/wait.h>
17#include <sound/core.h>
18
19enum {
20 LINE6_DUMP_NONE,
21 LINE6_DUMP_CURRENT
22};
23
24struct line6_dump_reqbuf {
25 /**
26 Buffer for dump requests.
27 */
28 unsigned char *buffer;
29
30 /**
31 Size of dump request.
32 */
33 size_t length;
34};
35
36/**
37 Provides the functionality to request channel/model/... dump data from a
38 Line6 device.
39*/
40struct line6_dump_request {
41 /**
42 Wait queue for access to program dump data.
43 */
44 wait_queue_head_t wait;
45
46 /**
47 Indicates an unfinished program dump request.
48 0: no dump
49 1: dump current settings
50 Other device-specific values are also allowed.
51 */
52 int in_progress;
53
54 /**
55 Dump request buffers
56 */
57 struct line6_dump_reqbuf reqbufs[1];
58};
59
60extern void line6_dump_finished(struct line6_dump_request *l6dr);
61extern int line6_dump_request_async(struct line6_dump_request *l6dr,
62 struct usb_line6 *line6, int num, int dest);
63extern void line6_dump_started(struct line6_dump_request *l6dr, int dest);
64extern void line6_dumpreq_destruct(struct line6_dump_request *l6dr);
65extern void line6_dumpreq_destructbuf(struct line6_dump_request *l6dr, int num);
66extern int line6_dumpreq_init(struct line6_dump_request *l6dr, const void *buf,
67 size_t len);
68extern int line6_dumpreq_initbuf(struct line6_dump_request *l6dr,
69 const void *buf, size_t len, int num);
70extern void line6_invalidate_current(struct line6_dump_request *l6dr);
71extern void line6_dump_wait(struct line6_dump_request *l6dr);
72extern int line6_dump_wait_interruptible(struct line6_dump_request *l6dr);
73extern int line6_dump_wait_timeout(struct line6_dump_request *l6dr,
74 long timeout);
75
76#endif
diff --git a/drivers/staging/line6/midi.c b/drivers/staging/line6/midi.c
index 50407294fbd4..6982eca661bd 100644
--- a/drivers/staging/line6/midi.c
+++ b/drivers/staging/line6/midi.c
@@ -59,9 +59,6 @@ static void line6_midi_transmit(struct snd_rawmidi_substream *substream)
59 if (done == 0) 59 if (done == 0)
60 break; 60 break;
61 61
62#ifdef CONFIG_LINE6_USB_DUMP_MIDI
63 line6_write_hexdump(line6, 's', chunk, done);
64#endif
65 line6_midibuf_write(mb, chunk, done); 62 line6_midibuf_write(mb, chunk, done);
66 snd_rawmidi_transmit_ack(substream, done); 63 snd_rawmidi_transmit_ack(substream, done);
67 } 64 }
@@ -72,10 +69,6 @@ static void line6_midi_transmit(struct snd_rawmidi_substream *substream)
72 if (done == 0) 69 if (done == 0)
73 break; 70 break;
74 71
75 if (line6_midibuf_skip_message
76 (mb, line6midi->midi_mask_transmit))
77 continue;
78
79 send_midi_async(line6, chunk, done); 72 send_midi_async(line6, chunk, done);
80 } 73 }
81 74
@@ -131,9 +124,6 @@ static int send_midi_async(struct usb_line6 *line6, unsigned char *data,
131 dev_err(line6->ifcdev, "Out of memory\n"); 124 dev_err(line6->ifcdev, "Out of memory\n");
132 return -ENOMEM; 125 return -ENOMEM;
133 } 126 }
134#ifdef CONFIG_LINE6_USB_DUMP_CTRL
135 line6_write_hexdump(line6, 'S', data, length);
136#endif
137 127
138 transfer_buffer = kmemdup(data, length, GFP_ATOMIC); 128 transfer_buffer = kmemdup(data, length, GFP_ATOMIC);
139 129
@@ -158,28 +148,6 @@ static int send_midi_async(struct usb_line6 *line6, unsigned char *data,
158 } 148 }
159 149
160 ++line6->line6midi->num_active_send_urbs; 150 ++line6->line6midi->num_active_send_urbs;
161
162 switch (line6->usbdev->descriptor.idProduct) {
163 case LINE6_DEVID_BASSPODXT:
164 case LINE6_DEVID_BASSPODXTLIVE:
165 case LINE6_DEVID_BASSPODXTPRO:
166 case LINE6_DEVID_PODXT:
167 case LINE6_DEVID_PODXTLIVE:
168 case LINE6_DEVID_PODXTPRO:
169 case LINE6_DEVID_POCKETPOD:
170 line6_pod_midi_postprocess((struct usb_line6_pod *)line6, data,
171 length);
172 break;
173
174 case LINE6_DEVID_VARIAX:
175 case LINE6_DEVID_PODHD300:
176 case LINE6_DEVID_PODHD500:
177 break;
178
179 default:
180 MISSING_CASE;
181 }
182
183 return 0; 151 return 0;
184} 152}
185 153
@@ -287,83 +255,10 @@ static int snd_line6_new_midi(struct snd_line6_midi *line6midi)
287 return 0; 255 return 0;
288} 256}
289 257
290/*
291 "read" request on "midi_mask_transmit" special file.
292*/
293static ssize_t midi_get_midi_mask_transmit(struct device *dev,
294 struct device_attribute *attr,
295 char *buf)
296{
297 struct usb_interface *interface = to_usb_interface(dev);
298 struct usb_line6 *line6 = usb_get_intfdata(interface);
299 return sprintf(buf, "%d\n", line6->line6midi->midi_mask_transmit);
300}
301
302/*
303 "write" request on "midi_mask" special file.
304*/
305static ssize_t midi_set_midi_mask_transmit(struct device *dev,
306 struct device_attribute *attr,
307 const char *buf, size_t count)
308{
309 struct usb_interface *interface = to_usb_interface(dev);
310 struct usb_line6 *line6 = usb_get_intfdata(interface);
311 unsigned short value;
312 int ret;
313
314 ret = kstrtou16(buf, 10, &value);
315 if (ret)
316 return ret;
317
318 line6->line6midi->midi_mask_transmit = value;
319 return count;
320}
321
322/*
323 "read" request on "midi_mask_receive" special file.
324*/
325static ssize_t midi_get_midi_mask_receive(struct device *dev,
326 struct device_attribute *attr,
327 char *buf)
328{
329 struct usb_interface *interface = to_usb_interface(dev);
330 struct usb_line6 *line6 = usb_get_intfdata(interface);
331 return sprintf(buf, "%d\n", line6->line6midi->midi_mask_receive);
332}
333
334/*
335 "write" request on "midi_mask" special file.
336*/
337static ssize_t midi_set_midi_mask_receive(struct device *dev,
338 struct device_attribute *attr,
339 const char *buf, size_t count)
340{
341 struct usb_interface *interface = to_usb_interface(dev);
342 struct usb_line6 *line6 = usb_get_intfdata(interface);
343 unsigned short value;
344 int ret;
345
346 ret = kstrtou16(buf, 10, &value);
347 if (ret)
348 return ret;
349
350 line6->line6midi->midi_mask_receive = value;
351 return count;
352}
353
354static DEVICE_ATTR(midi_mask_transmit, S_IWUSR | S_IRUGO,
355 midi_get_midi_mask_transmit, midi_set_midi_mask_transmit);
356static DEVICE_ATTR(midi_mask_receive, S_IWUSR | S_IRUGO,
357 midi_get_midi_mask_receive, midi_set_midi_mask_receive);
358
359/* MIDI device destructor */ 258/* MIDI device destructor */
360static int snd_line6_midi_free(struct snd_device *device) 259static int snd_line6_midi_free(struct snd_device *device)
361{ 260{
362 struct snd_line6_midi *line6midi = device->device_data; 261 struct snd_line6_midi *line6midi = device->device_data;
363 device_remove_file(line6midi->line6->ifcdev,
364 &dev_attr_midi_mask_transmit);
365 device_remove_file(line6midi->line6->ifcdev,
366 &dev_attr_midi_mask_receive);
367 line6_midibuf_destroy(&line6midi->midibuf_in); 262 line6_midibuf_destroy(&line6midi->midibuf_in);
368 line6_midibuf_destroy(&line6midi->midibuf_out); 263 line6_midibuf_destroy(&line6midi->midibuf_out);
369 return 0; 264 return 0;
@@ -405,19 +300,6 @@ int line6_init_midi(struct usb_line6 *line6)
405 } 300 }
406 301
407 line6midi->line6 = line6; 302 line6midi->line6 = line6;
408
409 switch (line6->product) {
410 case LINE6_DEVID_PODHD300:
411 case LINE6_DEVID_PODHD500:
412 line6midi->midi_mask_transmit = 1;
413 line6midi->midi_mask_receive = 1;
414 break;
415
416 default:
417 line6midi->midi_mask_transmit = 1;
418 line6midi->midi_mask_receive = 4;
419 }
420
421 line6->line6midi = line6midi; 303 line6->line6midi = line6midi;
422 304
423 err = snd_device_new(line6->card, SNDRV_DEV_RAWMIDI, line6midi, 305 err = snd_device_new(line6->card, SNDRV_DEV_RAWMIDI, line6midi,
@@ -431,14 +313,6 @@ int line6_init_midi(struct usb_line6 *line6)
431 if (err < 0) 313 if (err < 0)
432 return err; 314 return err;
433 315
434 err = device_create_file(line6->ifcdev, &dev_attr_midi_mask_transmit);
435 if (err < 0)
436 return err;
437
438 err = device_create_file(line6->ifcdev, &dev_attr_midi_mask_receive);
439 if (err < 0)
440 return err;
441
442 init_waitqueue_head(&line6midi->send_wait); 316 init_waitqueue_head(&line6midi->send_wait);
443 spin_lock_init(&line6midi->send_urb_lock); 317 spin_lock_init(&line6midi->send_urb_lock);
444 spin_lock_init(&line6midi->midi_transmit_lock); 318 spin_lock_init(&line6midi->midi_transmit_lock);
diff --git a/drivers/staging/line6/midi.h b/drivers/staging/line6/midi.h
index 4a9e9f947297..19dabd54051a 100644
--- a/drivers/staging/line6/midi.h
+++ b/drivers/staging/line6/midi.h
@@ -55,16 +55,6 @@ struct snd_line6_midi {
55 wait_queue_head_t send_wait; 55 wait_queue_head_t send_wait;
56 56
57 /** 57 /**
58 Bit mask for output MIDI channels.
59 */
60 unsigned short midi_mask_transmit;
61
62 /**
63 Bit mask for input MIDI channels.
64 */
65 unsigned short midi_mask_receive;
66
67 /**
68 Buffer for incoming MIDI stream. 58 Buffer for incoming MIDI stream.
69 */ 59 */
70 struct MidiBuffer midibuf_in; 60 struct MidiBuffer midibuf_in;
diff --git a/drivers/staging/line6/midibuf.c b/drivers/staging/line6/midibuf.c
index 836e8c847c52..968e0de83dab 100644
--- a/drivers/staging/line6/midibuf.c
+++ b/drivers/staging/line6/midibuf.c
@@ -64,9 +64,9 @@ int line6_midibuf_init(struct MidiBuffer *this, int size, int split)
64 64
65void line6_midibuf_status(struct MidiBuffer *this) 65void line6_midibuf_status(struct MidiBuffer *this)
66{ 66{
67 pr_debug("midibuf size=%d split=%d pos_read=%d pos_write=%d " 67 pr_debug("midibuf size=%d split=%d pos_read=%d pos_write=%d full=%d command_prev=%02x\n",
68 "full=%d command_prev=%02x\n", this->size, this->split, 68 this->size, this->split, this->pos_read, this->pos_write,
69 this->pos_read, this->pos_write, this->full, this->command_prev); 69 this->full, this->command_prev);
70} 70}
71 71
72int line6_midibuf_bytes_free(struct MidiBuffer *this) 72int line6_midibuf_bytes_free(struct MidiBuffer *this)
diff --git a/drivers/staging/line6/pcm.c b/drivers/staging/line6/pcm.c
index 7fe44a6fd0ed..6c1e31335d19 100644
--- a/drivers/staging/line6/pcm.c
+++ b/drivers/staging/line6/pcm.c
@@ -109,7 +109,7 @@ int line6_pcm_acquire(struct snd_line6_pcm *line6pcm, int channels)
109 line6pcm->prev_fbuf = NULL; 109 line6pcm->prev_fbuf = NULL;
110 110
111 if (test_flags(flags_old, flags_new, LINE6_BITS_CAPTURE_BUFFER)) { 111 if (test_flags(flags_old, flags_new, LINE6_BITS_CAPTURE_BUFFER)) {
112 /* We may be invoked multiple times in a row so allocate once only */ 112 /* Invoked multiple times in a row so allocate once only */
113 if (!line6pcm->buffer_in) { 113 if (!line6pcm->buffer_in) {
114 line6pcm->buffer_in = 114 line6pcm->buffer_in =
115 kmalloc(LINE6_ISO_BUFFERS * LINE6_ISO_PACKETS * 115 kmalloc(LINE6_ISO_BUFFERS * LINE6_ISO_PACKETS *
@@ -148,7 +148,7 @@ int line6_pcm_acquire(struct snd_line6_pcm *line6pcm, int channels)
148 } 148 }
149 149
150 if (test_flags(flags_old, flags_new, LINE6_BITS_PLAYBACK_BUFFER)) { 150 if (test_flags(flags_old, flags_new, LINE6_BITS_PLAYBACK_BUFFER)) {
151 /* We may be invoked multiple times in a row so allocate once only */ 151 /* Invoked multiple times in a row so allocate once only */
152 if (!line6pcm->buffer_out) { 152 if (!line6pcm->buffer_out) {
153 line6pcm->buffer_out = 153 line6pcm->buffer_out =
154 kmalloc(LINE6_ISO_BUFFERS * LINE6_ISO_PACKETS * 154 kmalloc(LINE6_ISO_BUFFERS * LINE6_ISO_PACKETS *
diff --git a/drivers/staging/line6/pcm.h b/drivers/staging/line6/pcm.h
index 5210ec8dbe16..6aa0d46a2890 100644
--- a/drivers/staging/line6/pcm.h
+++ b/drivers/staging/line6/pcm.h
@@ -167,7 +167,7 @@ enum {
167#endif 167#endif
168 LINE6_BIT_PCM_ALSA_CAPTURE_STREAM | 168 LINE6_BIT_PCM_ALSA_CAPTURE_STREAM |
169 LINE6_BIT_PCM_MONITOR_CAPTURE_STREAM, 169 LINE6_BIT_PCM_MONITOR_CAPTURE_STREAM,
170 170
171 LINE6_BITS_STREAM = 171 LINE6_BITS_STREAM =
172 LINE6_BITS_PLAYBACK_STREAM | 172 LINE6_BITS_PLAYBACK_STREAM |
173 LINE6_BITS_CAPTURE_STREAM 173 LINE6_BITS_CAPTURE_STREAM
diff --git a/drivers/staging/line6/playback.c b/drivers/staging/line6/playback.c
index a0ab9d0493fa..4cf23af9c627 100644
--- a/drivers/staging/line6/playback.c
+++ b/drivers/staging/line6/playback.c
@@ -185,7 +185,7 @@ static int submit_audio_out_urb(struct snd_line6_pcm *line6pcm)
185 if (urb_size == 0) { 185 if (urb_size == 0) {
186 /* can't determine URB size */ 186 /* can't determine URB size */
187 spin_unlock_irqrestore(&line6pcm->lock_audio_out, flags); 187 spin_unlock_irqrestore(&line6pcm->lock_audio_out, flags);
188 dev_err(line6pcm->line6->ifcdev, "driver bug: urb_size = 0\n"); /* this is somewhat paranoid */ 188 dev_err(line6pcm->line6->ifcdev, "driver bug: urb_size = 0\n");
189 return -EINVAL; 189 return -EINVAL;
190 } 190 }
191 191
@@ -218,7 +218,8 @@ static int submit_audio_out_urb(struct snd_line6_pcm *line6pcm)
218 len * bytes_per_frame, runtime->dma_area, 218 len * bytes_per_frame, runtime->dma_area,
219 (urb_frames - len) * bytes_per_frame); 219 (urb_frames - len) * bytes_per_frame);
220 } else 220 } else
221 dev_err(line6pcm->line6->ifcdev, "driver bug: len = %d\n", len); /* this is somewhat paranoid */ 221 dev_err(line6pcm->line6->ifcdev, "driver bug: len = %d\n",
222 len);
222 } else { 223 } else {
223 memcpy(urb_out->transfer_buffer, 224 memcpy(urb_out->transfer_buffer,
224 runtime->dma_area + 225 runtime->dma_area +
@@ -319,7 +320,8 @@ void line6_unlink_audio_out_urbs(struct snd_line6_pcm *line6pcm)
319} 320}
320 321
321/* 322/*
322 Wait until unlinking of all currently active playback URBs has been finished. 323 Wait until unlinking of all currently active playback URBs has been
324 finished.
323*/ 325*/
324void line6_wait_clear_audio_out_urbs(struct snd_line6_pcm *line6pcm) 326void line6_wait_clear_audio_out_urbs(struct snd_line6_pcm *line6pcm)
325{ 327{
@@ -413,7 +415,8 @@ static void audio_out_callback(struct urb *urb)
413 if (!shutdown) { 415 if (!shutdown) {
414 submit_audio_out_urb(line6pcm); 416 submit_audio_out_urb(line6pcm);
415 417
416 if (test_bit(LINE6_INDEX_PCM_ALSA_PLAYBACK_STREAM, &line6pcm->flags)) { 418 if (test_bit(LINE6_INDEX_PCM_ALSA_PLAYBACK_STREAM,
419 &line6pcm->flags)) {
417 line6pcm->bytes_out += length; 420 line6pcm->bytes_out += length;
418 if (line6pcm->bytes_out >= line6pcm->period_out) { 421 if (line6pcm->bytes_out >= line6pcm->period_out) {
419 line6pcm->bytes_out %= line6pcm->period_out; 422 line6pcm->bytes_out %= line6pcm->period_out;
@@ -499,7 +502,8 @@ int snd_line6_playback_trigger(struct snd_line6_pcm *line6pcm, int cmd)
499#ifdef CONFIG_PM 502#ifdef CONFIG_PM
500 case SNDRV_PCM_TRIGGER_RESUME: 503 case SNDRV_PCM_TRIGGER_RESUME:
501#endif 504#endif
502 err = line6_pcm_acquire(line6pcm, LINE6_BIT_PCM_ALSA_PLAYBACK_STREAM); 505 err = line6_pcm_acquire(line6pcm,
506 LINE6_BIT_PCM_ALSA_PLAYBACK_STREAM);
503 507
504 if (err < 0) 508 if (err < 0)
505 return err; 509 return err;
@@ -510,7 +514,8 @@ int snd_line6_playback_trigger(struct snd_line6_pcm *line6pcm, int cmd)
510#ifdef CONFIG_PM 514#ifdef CONFIG_PM
511 case SNDRV_PCM_TRIGGER_SUSPEND: 515 case SNDRV_PCM_TRIGGER_SUSPEND:
512#endif 516#endif
513 err = line6_pcm_release(line6pcm, LINE6_BIT_PCM_ALSA_PLAYBACK_STREAM); 517 err = line6_pcm_release(line6pcm,
518 LINE6_BIT_PCM_ALSA_PLAYBACK_STREAM);
514 519
515 if (err < 0) 520 if (err < 0)
516 return err; 521 return err;
diff --git a/drivers/staging/line6/pod.c b/drivers/staging/line6/pod.c
index 9edd053fb9ae..e542540d0db3 100644
--- a/drivers/staging/line6/pod.c
+++ b/drivers/staging/line6/pod.c
@@ -15,7 +15,6 @@
15 15
16#include "audio.h" 16#include "audio.h"
17#include "capture.h" 17#include "capture.h"
18#include "control.h"
19#include "driver.h" 18#include "driver.h"
20#include "playback.h" 19#include "playback.h"
21#include "pod.h" 20#include "pod.h"
@@ -26,7 +25,6 @@
26/* *INDENT-OFF* */ 25/* *INDENT-OFF* */
27 26
28enum { 27enum {
29 POD_SYSEX_CLIP = 0x0f,
30 POD_SYSEX_SAVE = 0x24, 28 POD_SYSEX_SAVE = 0x24,
31 POD_SYSEX_SYSTEM = 0x56, 29 POD_SYSEX_SYSTEM = 0x56,
32 POD_SYSEX_SYSTEMREQ = 0x57, 30 POD_SYSEX_SYSTEMREQ = 0x57,
@@ -41,11 +39,6 @@ enum {
41 39
42enum { 40enum {
43 POD_monitor_level = 0x04, 41 POD_monitor_level = 0x04,
44 POD_routing = 0x05,
45 POD_tuner_mute = 0x13,
46 POD_tuner_freq = 0x15,
47 POD_tuner_note = 0x16,
48 POD_tuner_pitch = 0x17,
49 POD_system_invalid = 0x10000 42 POD_system_invalid = 0x10000
50}; 43};
51 44
@@ -118,10 +111,6 @@ static struct line6_pcm_properties pod_pcm_properties = {
118 .bytes_per_frame = POD_BYTES_PER_FRAME 111 .bytes_per_frame = POD_BYTES_PER_FRAME
119}; 112};
120 113
121static const char pod_request_channel[] = {
122 0xf0, 0x00, 0x01, 0x0c, 0x03, 0x75, 0xf7
123};
124
125static const char pod_version_header[] = { 114static const char pod_version_header[] = {
126 0xf2, 0x7e, 0x7f, 0x06, 0x02 115 0xf2, 0x7e, 0x7f, 0x06, 0x02
127}; 116};
@@ -129,18 +118,6 @@ static const char pod_version_header[] = {
129/* forward declarations: */ 118/* forward declarations: */
130static void pod_startup2(unsigned long data); 119static void pod_startup2(unsigned long data);
131static void pod_startup3(struct usb_line6_pod *pod); 120static void pod_startup3(struct usb_line6_pod *pod);
132static void pod_startup4(struct usb_line6_pod *pod);
133
134/*
135 Mark all parameters as dirty and notify waiting processes.
136*/
137static void pod_mark_batch_all_dirty(struct usb_line6_pod *pod)
138{
139 int i;
140
141 for (i = 0; i < POD_CONTROL_SIZE; i++)
142 set_bit(i, pod->param_dirty);
143}
144 121
145static char *pod_alloc_sysex_buffer(struct usb_line6_pod *pod, int code, 122static char *pod_alloc_sysex_buffer(struct usb_line6_pod *pod, int code,
146 int size) 123 int size)
@@ -150,45 +127,6 @@ static char *pod_alloc_sysex_buffer(struct usb_line6_pod *pod, int code,
150} 127}
151 128
152/* 129/*
153 Send channel dump data to the PODxt Pro.
154*/
155static void pod_dump(struct usb_line6_pod *pod, const unsigned char *data)
156{
157 int size = 1 + sizeof(pod->prog_data);
158 char *sysex = pod_alloc_sysex_buffer(pod, POD_SYSEX_DUMP, size);
159 if (!sysex)
160 return;
161 /* Don't know what this is good for, but PODxt Pro transmits it, so we
162 * also do... */
163 sysex[SYSEX_DATA_OFS] = 5;
164 memcpy(sysex + SYSEX_DATA_OFS + 1, data, sizeof(pod->prog_data));
165 line6_send_sysex_message(&pod->line6, sysex, size);
166 memcpy(&pod->prog_data, data, sizeof(pod->prog_data));
167 pod_mark_batch_all_dirty(pod);
168 kfree(sysex);
169}
170
171/*
172 Store parameter value in driver memory and mark it as dirty.
173*/
174static void pod_store_parameter(struct usb_line6_pod *pod, int param, int value)
175{
176 pod->prog_data.control[param] = value;
177 set_bit(param, pod->param_dirty);
178 pod->dirty = 1;
179}
180
181/*
182 Handle SAVE button.
183*/
184static void pod_save_button_pressed(struct usb_line6_pod *pod, int type,
185 int index)
186{
187 pod->dirty = 0;
188 set_bit(POD_SAVE_PRESSED, &pod->atomic_flags);
189}
190
191/*
192 Process a completely received message. 130 Process a completely received message.
193*/ 131*/
194void line6_pod_process_message(struct usb_line6_pod *pod) 132void line6_pod_process_message(struct usb_line6_pod *pod)
@@ -209,25 +147,11 @@ void line6_pod_process_message(struct usb_line6_pod *pod)
209 /* process all remaining messages */ 147 /* process all remaining messages */
210 switch (buf[0]) { 148 switch (buf[0]) {
211 case LINE6_PARAM_CHANGE | LINE6_CHANNEL_DEVICE: 149 case LINE6_PARAM_CHANGE | LINE6_CHANNEL_DEVICE:
212 pod_store_parameter(pod, buf[1], buf[2]);
213 /* intentionally no break here! */
214
215 case LINE6_PARAM_CHANGE | LINE6_CHANNEL_HOST: 150 case LINE6_PARAM_CHANGE | LINE6_CHANNEL_HOST:
216 if ((buf[1] == POD_amp_model_setup) ||
217 (buf[1] == POD_effect_setup))
218 /* these also affect other settings */
219 line6_dump_request_async(&pod->dumpreq, &pod->line6, 0,
220 LINE6_DUMP_CURRENT);
221
222 break; 151 break;
223 152
224 case LINE6_PROGRAM_CHANGE | LINE6_CHANNEL_DEVICE: 153 case LINE6_PROGRAM_CHANGE | LINE6_CHANNEL_DEVICE:
225 case LINE6_PROGRAM_CHANGE | LINE6_CHANNEL_HOST: 154 case LINE6_PROGRAM_CHANGE | LINE6_CHANNEL_HOST:
226 pod->channel_num = buf[1];
227 pod->dirty = 0;
228 set_bit(POD_CHANNEL_DIRTY, &pod->atomic_flags);
229 line6_dump_request_async(&pod->dumpreq, &pod->line6, 0,
230 LINE6_DUMP_CURRENT);
231 break; 155 break;
232 156
233 case LINE6_SYSEX_BEGIN | LINE6_CHANNEL_DEVICE: 157 case LINE6_SYSEX_BEGIN | LINE6_CHANNEL_DEVICE:
@@ -235,43 +159,6 @@ void line6_pod_process_message(struct usb_line6_pod *pod)
235 if (memcmp(buf + 1, line6_midi_id, sizeof(line6_midi_id)) == 0) { 159 if (memcmp(buf + 1, line6_midi_id, sizeof(line6_midi_id)) == 0) {
236 switch (buf[5]) { 160 switch (buf[5]) {
237 case POD_SYSEX_DUMP: 161 case POD_SYSEX_DUMP:
238 if (pod->line6.message_length ==
239 sizeof(pod->prog_data) + 7) {
240 switch (pod->dumpreq.in_progress) {
241 case LINE6_DUMP_CURRENT:
242 memcpy(&pod->prog_data, buf + 7,
243 sizeof(pod->prog_data));
244 pod_mark_batch_all_dirty(pod);
245 break;
246
247 case POD_DUMP_MEMORY:
248 memcpy(&pod->prog_data_buf,
249 buf + 7,
250 sizeof
251 (pod->prog_data_buf));
252 break;
253
254 default:
255 DEBUG_MESSAGES(dev_err
256 (pod->
257 line6.ifcdev,
258 "unknown dump code %02X\n",
259 pod->
260 dumpreq.in_progress));
261 }
262
263 line6_dump_finished(&pod->dumpreq);
264 pod_startup3(pod);
265 } else
266 DEBUG_MESSAGES(dev_err
267 (pod->line6.ifcdev,
268 "wrong size of channel dump message (%d instead of %d)\n",
269 pod->
270 line6.message_length,
271 (int)
272 sizeof(pod->prog_data) +
273 7));
274
275 break; 162 break;
276 163
277 case POD_SYSEX_SYSTEM:{ 164 case POD_SYSEX_SYSTEM:{
@@ -280,35 +167,8 @@ void line6_pod_process_message(struct usb_line6_pod *pod)
280 << 8) | 167 << 8) |
281 ((int)buf[9] << 4) | (int)buf[10]; 168 ((int)buf[9] << 4) | (int)buf[10];
282 169
283#define PROCESS_SYSTEM_PARAM(x) \ 170 if (buf[6] == POD_monitor_level)
284 case POD_ ## x: \ 171 pod->monitor_level = value;
285 pod->x.value = value; \
286 wake_up(&pod->x.wait); \
287 break;
288
289 switch (buf[6]) {
290 PROCESS_SYSTEM_PARAM
291 (monitor_level);
292 PROCESS_SYSTEM_PARAM(routing);
293 PROCESS_SYSTEM_PARAM
294 (tuner_mute);
295 PROCESS_SYSTEM_PARAM
296 (tuner_freq);
297 PROCESS_SYSTEM_PARAM
298 (tuner_note);
299 PROCESS_SYSTEM_PARAM
300 (tuner_pitch);
301
302#undef PROCESS_SYSTEM_PARAM
303
304 default:
305 DEBUG_MESSAGES(dev_err
306 (pod->
307 line6.ifcdev,
308 "unknown tuner/system response %02X\n",
309 buf[6]));
310 }
311
312 break; 172 break;
313 } 173 }
314 174
@@ -317,29 +177,18 @@ void line6_pod_process_message(struct usb_line6_pod *pod)
317 break; 177 break;
318 178
319 case POD_SYSEX_SAVE: 179 case POD_SYSEX_SAVE:
320 pod_save_button_pressed(pod, buf[6], buf[7]);
321 break;
322
323 case POD_SYSEX_CLIP:
324 DEBUG_MESSAGES(dev_err
325 (pod->line6.ifcdev,
326 "audio clipped\n"));
327 pod->clipping.value = 1;
328 wake_up(&pod->clipping.wait);
329 break; 180 break;
330 181
331 case POD_SYSEX_STORE: 182 case POD_SYSEX_STORE:
332 DEBUG_MESSAGES(dev_err 183 dev_dbg(pod->line6.ifcdev,
333 (pod->line6.ifcdev, 184 "message %02X not yet implemented\n",
334 "message %02X not yet implemented\n", 185 buf[5]);
335 buf[5]));
336 break; 186 break;
337 187
338 default: 188 default:
339 DEBUG_MESSAGES(dev_err 189 dev_dbg(pod->line6.ifcdev,
340 (pod->line6.ifcdev, 190 "unknown sysex message %02X\n",
341 "unknown sysex message %02X\n", 191 buf[5]);
342 buf[5]));
343 } 192 }
344 } else 193 } else
345 if (memcmp 194 if (memcmp
@@ -350,11 +199,9 @@ void line6_pod_process_message(struct usb_line6_pod *pod)
350 pod->device_id = 199 pod->device_id =
351 ((int)buf[8] << 16) | ((int)buf[9] << 8) | (int) 200 ((int)buf[8] << 16) | ((int)buf[9] << 8) | (int)
352 buf[10]; 201 buf[10];
353 pod_startup4(pod); 202 pod_startup3(pod);
354 } else 203 } else
355 DEBUG_MESSAGES(dev_err 204 dev_dbg(pod->line6.ifcdev, "unknown sysex header\n");
356 (pod->line6.ifcdev,
357 "unknown sysex header\n"));
358 205
359 break; 206 break;
360 207
@@ -362,349 +209,22 @@ void line6_pod_process_message(struct usb_line6_pod *pod)
362 break; 209 break;
363 210
364 default: 211 default:
365 DEBUG_MESSAGES(dev_err 212 dev_dbg(pod->line6.ifcdev, "POD: unknown message %02X\n",
366 (pod->line6.ifcdev, 213 buf[0]);
367 "POD: unknown message %02X\n", buf[0]));
368 } 214 }
369} 215}
370 216
371/* 217/*
372 Detect some cases that require a channel dump after sending a command to the
373 device. Important notes:
374 *) The actual dump request can not be sent here since we are not allowed to
375 wait for the completion of the first message in this context, and sending
376 the dump request before completion of the previous message leaves the POD
377 in an undefined state. The dump request will be sent when the echoed
378 commands are received.
379 *) This method fails if a param change message is "chopped" after the first
380 byte.
381*/
382void line6_pod_midi_postprocess(struct usb_line6_pod *pod, unsigned char *data,
383 int length)
384{
385 int i;
386
387 if (!pod->midi_postprocess)
388 return;
389
390 for (i = 0; i < length; ++i) {
391 if (data[i] == (LINE6_PROGRAM_CHANGE | LINE6_CHANNEL_HOST)) {
392 line6_invalidate_current(&pod->dumpreq);
393 break;
394 } else
395 if ((data[i] == (LINE6_PARAM_CHANGE | LINE6_CHANNEL_HOST))
396 && (i < length - 1))
397 if ((data[i + 1] == POD_amp_model_setup)
398 || (data[i + 1] == POD_effect_setup)) {
399 line6_invalidate_current(&pod->dumpreq);
400 break;
401 }
402 }
403}
404
405/*
406 Send channel number (i.e., switch to a different sound).
407*/
408static void pod_send_channel(struct usb_line6_pod *pod, u8 value)
409{
410 line6_invalidate_current(&pod->dumpreq);
411
412 if (line6_send_program(&pod->line6, value) == 0)
413 pod->channel_num = value;
414 else
415 line6_dump_finished(&pod->dumpreq);
416}
417
418/*
419 Transmit PODxt Pro control parameter. 218 Transmit PODxt Pro control parameter.
420*/ 219*/
421void line6_pod_transmit_parameter(struct usb_line6_pod *pod, int param, 220void line6_pod_transmit_parameter(struct usb_line6_pod *pod, int param,
422 u8 value) 221 u8 value)
423{ 222{
424 if (line6_transmit_parameter(&pod->line6, param, value) == 0) 223 line6_transmit_parameter(&pod->line6, param, value);
425 pod_store_parameter(pod, param, value);
426
427 if ((param == POD_amp_model_setup) || (param == POD_effect_setup)) /* these also affect other settings */
428 line6_invalidate_current(&pod->dumpreq);
429}
430
431/*
432 Resolve value to memory location.
433*/
434static int pod_resolve(const char *buf, short block0, short block1,
435 unsigned char *location)
436{
437 u8 value;
438 short block;
439 int ret;
440
441 ret = kstrtou8(buf, 10, &value);
442 if (ret)
443 return ret;
444
445 block = (value < 0x40) ? block0 : block1;
446 value &= 0x3f;
447 location[0] = block >> 7;
448 location[1] = value | (block & 0x7f);
449 return 0;
450}
451
452/*
453 Send command to store channel/effects setup/amp setup to PODxt Pro.
454*/
455static ssize_t pod_send_store_command(struct device *dev, const char *buf,
456 size_t count, short block0, short block1)
457{
458 struct usb_interface *interface = to_usb_interface(dev);
459 struct usb_line6_pod *pod = usb_get_intfdata(interface);
460 int ret;
461 int size = 3 + sizeof(pod->prog_data_buf);
462 char *sysex = pod_alloc_sysex_buffer(pod, POD_SYSEX_STORE, size);
463
464 if (!sysex)
465 return 0;
466
467 sysex[SYSEX_DATA_OFS] = 5; /* see pod_dump() */
468 ret = pod_resolve(buf, block0, block1, sysex + SYSEX_DATA_OFS + 1);
469 if (ret) {
470 kfree(sysex);
471 return ret;
472 }
473
474 memcpy(sysex + SYSEX_DATA_OFS + 3, &pod->prog_data_buf,
475 sizeof(pod->prog_data_buf));
476
477 line6_send_sysex_message(&pod->line6, sysex, size);
478 kfree(sysex);
479 /* needs some delay here on AMD64 platform */
480 return count;
481}
482
483/*
484 Send command to retrieve channel/effects setup/amp setup to PODxt Pro.
485*/
486static ssize_t pod_send_retrieve_command(struct device *dev, const char *buf,
487 size_t count, short block0,
488 short block1)
489{
490 struct usb_interface *interface = to_usb_interface(dev);
491 struct usb_line6_pod *pod = usb_get_intfdata(interface);
492 int ret;
493 int size = 4;
494 char *sysex = pod_alloc_sysex_buffer(pod, POD_SYSEX_DUMPMEM, size);
495
496 if (!sysex)
497 return 0;
498
499 ret = pod_resolve(buf, block0, block1, sysex + SYSEX_DATA_OFS);
500 if (ret) {
501 kfree(sysex);
502 return ret;
503 }
504 sysex[SYSEX_DATA_OFS + 2] = 0;
505 sysex[SYSEX_DATA_OFS + 3] = 0;
506 line6_dump_started(&pod->dumpreq, POD_DUMP_MEMORY);
507
508 if (line6_send_sysex_message(&pod->line6, sysex, size) < size)
509 line6_dump_finished(&pod->dumpreq);
510
511 kfree(sysex);
512 /* needs some delay here on AMD64 platform */
513 return count;
514}
515
516/*
517 Generic get name function.
518*/
519static ssize_t get_name_generic(struct usb_line6_pod *pod, const char *str,
520 char *buf)
521{
522 int length = 0;
523 const char *p1;
524 char *p2;
525 char *last_non_space = buf;
526
527 int retval = line6_dump_wait_interruptible(&pod->dumpreq);
528 if (retval < 0)
529 return retval;
530
531 for (p1 = str, p2 = buf; *p1; ++p1, ++p2) {
532 *p2 = *p1;
533 if (*p2 != ' ')
534 last_non_space = p2;
535 if (++length == POD_NAME_LENGTH)
536 break;
537 }
538
539 *(last_non_space + 1) = '\n';
540 return last_non_space - buf + 2;
541}
542
543/*
544 "read" request on "channel" special file.
545*/
546static ssize_t pod_get_channel(struct device *dev,
547 struct device_attribute *attr, char *buf)
548{
549 struct usb_interface *interface = to_usb_interface(dev);
550 struct usb_line6_pod *pod = usb_get_intfdata(interface);
551 return sprintf(buf, "%d\n", pod->channel_num);
552}
553
554/*
555 "write" request on "channel" special file.
556*/
557static ssize_t pod_set_channel(struct device *dev,
558 struct device_attribute *attr,
559 const char *buf, size_t count)
560{
561 struct usb_interface *interface = to_usb_interface(dev);
562 struct usb_line6_pod *pod = usb_get_intfdata(interface);
563 u8 value;
564 int ret;
565
566 ret = kstrtou8(buf, 10, &value);
567 if (ret)
568 return ret;
569
570 pod_send_channel(pod, value);
571 return count;
572}
573
574/*
575 "read" request on "name" special file.
576*/
577static ssize_t pod_get_name(struct device *dev, struct device_attribute *attr,
578 char *buf)
579{
580 struct usb_interface *interface = to_usb_interface(dev);
581 struct usb_line6_pod *pod = usb_get_intfdata(interface);
582 return get_name_generic(pod, pod->prog_data.header + POD_NAME_OFFSET,
583 buf);
584}
585
586/*
587 "read" request on "name" special file.
588*/
589static ssize_t pod_get_name_buf(struct device *dev,
590 struct device_attribute *attr, char *buf)
591{
592 struct usb_interface *interface = to_usb_interface(dev);
593 struct usb_line6_pod *pod = usb_get_intfdata(interface);
594 return get_name_generic(pod,
595 pod->prog_data_buf.header + POD_NAME_OFFSET,
596 buf);
597}
598
599/*
600 "read" request on "dump" special file.
601*/
602static ssize_t pod_get_dump(struct device *dev, struct device_attribute *attr,
603 char *buf)
604{
605 struct usb_interface *interface = to_usb_interface(dev);
606 struct usb_line6_pod *pod = usb_get_intfdata(interface);
607 int retval = line6_dump_wait_interruptible(&pod->dumpreq);
608 if (retval < 0)
609 return retval;
610 memcpy(buf, &pod->prog_data, sizeof(pod->prog_data));
611 return sizeof(pod->prog_data);
612}
613
614/*
615 "write" request on "dump" special file.
616*/
617static ssize_t pod_set_dump(struct device *dev, struct device_attribute *attr,
618 const char *buf, size_t count)
619{
620 struct usb_interface *interface = to_usb_interface(dev);
621 struct usb_line6_pod *pod = usb_get_intfdata(interface);
622
623 if (count != sizeof(pod->prog_data)) {
624 dev_err(pod->line6.ifcdev,
625 "data block must be exactly %d bytes\n",
626 (int)sizeof(pod->prog_data));
627 return -EINVAL;
628 }
629
630 pod_dump(pod, buf);
631 return sizeof(pod->prog_data);
632}
633
634/*
635 Identify system parameters related to the tuner.
636*/
637static bool pod_is_tuner(int code)
638{
639 return
640 (code == POD_tuner_mute) ||
641 (code == POD_tuner_freq) ||
642 (code == POD_tuner_note) || (code == POD_tuner_pitch);
643}
644
645/*
646 Get system parameter (as integer).
647 @param tuner non-zero, if code refers to a tuner parameter
648*/
649static int pod_get_system_param_int(struct usb_line6_pod *pod, int *value,
650 int code, struct ValueWait *param, int sign)
651{
652 char *sysex;
653 static const int size = 1;
654 int retval = 0;
655
656 if (((pod->prog_data.control[POD_tuner] & 0x40) == 0)
657 && pod_is_tuner(code))
658 return -ENODEV;
659
660 /* send value request to device: */
661 param->value = POD_system_invalid;
662 sysex = pod_alloc_sysex_buffer(pod, POD_SYSEX_SYSTEMREQ, size);
663
664 if (!sysex)
665 return -ENOMEM;
666
667 sysex[SYSEX_DATA_OFS] = code;
668 line6_send_sysex_message(&pod->line6, sysex, size);
669 kfree(sysex);
670
671 /* wait for device to respond: */
672 retval =
673 wait_event_interruptible(param->wait,
674 param->value != POD_system_invalid);
675
676 if (retval < 0)
677 return retval;
678
679 *value = sign ? (int)(signed short)param->value : (int)(unsigned short)
680 param->value;
681
682 if (*value == POD_system_invalid)
683 *value = 0; /* don't report uninitialized values */
684
685 return 0;
686}
687
688/*
689 Get system parameter (as string).
690 @param tuner non-zero, if code refers to a tuner parameter
691*/
692static ssize_t pod_get_system_param_string(struct usb_line6_pod *pod, char *buf,
693 int code, struct ValueWait *param,
694 int sign)
695{
696 int retval, value = 0;
697 retval = pod_get_system_param_int(pod, &value, code, param, sign);
698
699 if (retval < 0)
700 return retval;
701
702 return sprintf(buf, "%d\n", value);
703} 224}
704 225
705/* 226/*
706 Send system parameter (from integer). 227 Send system parameter (from integer).
707 @param tuner non-zero, if code refers to a tuner parameter
708*/ 228*/
709static int pod_set_system_param_int(struct usb_line6_pod *pod, int value, 229static int pod_set_system_param_int(struct usb_line6_pod *pod, int value,
710 int code) 230 int code)
@@ -712,11 +232,6 @@ static int pod_set_system_param_int(struct usb_line6_pod *pod, int value,
712 char *sysex; 232 char *sysex;
713 static const int size = 5; 233 static const int size = 5;
714 234
715 if (((pod->prog_data.control[POD_tuner] & 0x40) == 0)
716 && pod_is_tuner(code))
717 return -EINVAL;
718
719 /* send value to tuner: */
720 sysex = pod_alloc_sysex_buffer(pod, POD_SYSEX_SYSTEM, size); 235 sysex = pod_alloc_sysex_buffer(pod, POD_SYSEX_SYSTEM, size);
721 if (!sysex) 236 if (!sysex)
722 return -ENOMEM; 237 return -ENOMEM;
@@ -731,179 +246,6 @@ static int pod_set_system_param_int(struct usb_line6_pod *pod, int value,
731} 246}
732 247
733/* 248/*
734 Send system parameter (from string).
735 @param tuner non-zero, if code refers to a tuner parameter
736*/
737static ssize_t pod_set_system_param_string(struct usb_line6_pod *pod,
738 const char *buf, int count, int code,
739 unsigned short mask)
740{
741 int retval;
742 unsigned short value = simple_strtoul(buf, NULL, 10) & mask;
743 retval = pod_set_system_param_int(pod, value, code);
744 return (retval < 0) ? retval : count;
745}
746
747/*
748 "read" request on "dump_buf" special file.
749*/
750static ssize_t pod_get_dump_buf(struct device *dev,
751 struct device_attribute *attr, char *buf)
752{
753 struct usb_interface *interface = to_usb_interface(dev);
754 struct usb_line6_pod *pod = usb_get_intfdata(interface);
755 int retval = line6_dump_wait_interruptible(&pod->dumpreq);
756 if (retval < 0)
757 return retval;
758 memcpy(buf, &pod->prog_data_buf, sizeof(pod->prog_data_buf));
759 return sizeof(pod->prog_data_buf);
760}
761
762/*
763 "write" request on "dump_buf" special file.
764*/
765static ssize_t pod_set_dump_buf(struct device *dev,
766 struct device_attribute *attr,
767 const char *buf, size_t count)
768{
769 struct usb_interface *interface = to_usb_interface(dev);
770 struct usb_line6_pod *pod = usb_get_intfdata(interface);
771
772 if (count != sizeof(pod->prog_data)) {
773 dev_err(pod->line6.ifcdev,
774 "data block must be exactly %d bytes\n",
775 (int)sizeof(pod->prog_data));
776 return -EINVAL;
777 }
778
779 memcpy(&pod->prog_data_buf, buf, sizeof(pod->prog_data));
780 return sizeof(pod->prog_data);
781}
782
783/*
784 "write" request on "finish" special file.
785*/
786static ssize_t pod_set_finish(struct device *dev,
787 struct device_attribute *attr,
788 const char *buf, size_t count)
789{
790 struct usb_interface *interface = to_usb_interface(dev);
791 struct usb_line6_pod *pod = usb_get_intfdata(interface);
792 int size = 0;
793 char *sysex = pod_alloc_sysex_buffer(pod, POD_SYSEX_FINISH, size);
794 if (!sysex)
795 return 0;
796 line6_send_sysex_message(&pod->line6, sysex, size);
797 kfree(sysex);
798 return count;
799}
800
801/*
802 "write" request on "store_channel" special file.
803*/
804static ssize_t pod_set_store_channel(struct device *dev,
805 struct device_attribute *attr,
806 const char *buf, size_t count)
807{
808 return pod_send_store_command(dev, buf, count, 0x0000, 0x00c0);
809}
810
811/*
812 "write" request on "store_effects_setup" special file.
813*/
814static ssize_t pod_set_store_effects_setup(struct device *dev,
815 struct device_attribute *attr,
816 const char *buf, size_t count)
817{
818 return pod_send_store_command(dev, buf, count, 0x0080, 0x0080);
819}
820
821/*
822 "write" request on "store_amp_setup" special file.
823*/
824static ssize_t pod_set_store_amp_setup(struct device *dev,
825 struct device_attribute *attr,
826 const char *buf, size_t count)
827{
828 return pod_send_store_command(dev, buf, count, 0x0040, 0x0100);
829}
830
831/*
832 "write" request on "retrieve_channel" special file.
833*/
834static ssize_t pod_set_retrieve_channel(struct device *dev,
835 struct device_attribute *attr,
836 const char *buf, size_t count)
837{
838 return pod_send_retrieve_command(dev, buf, count, 0x0000, 0x00c0);
839}
840
841/*
842 "write" request on "retrieve_effects_setup" special file.
843*/
844static ssize_t pod_set_retrieve_effects_setup(struct device *dev,
845 struct device_attribute *attr,
846 const char *buf, size_t count)
847{
848 return pod_send_retrieve_command(dev, buf, count, 0x0080, 0x0080);
849}
850
851/*
852 "write" request on "retrieve_amp_setup" special file.
853*/
854static ssize_t pod_set_retrieve_amp_setup(struct device *dev,
855 struct device_attribute *attr,
856 const char *buf, size_t count)
857{
858 return pod_send_retrieve_command(dev, buf, count, 0x0040, 0x0100);
859}
860
861/*
862 "read" request on "dirty" special file.
863*/
864static ssize_t pod_get_dirty(struct device *dev, struct device_attribute *attr,
865 char *buf)
866{
867 struct usb_interface *interface = to_usb_interface(dev);
868 struct usb_line6_pod *pod = usb_get_intfdata(interface);
869 buf[0] = pod->dirty ? '1' : '0';
870 buf[1] = '\n';
871 return 2;
872}
873
874/*
875 "read" request on "midi_postprocess" special file.
876*/
877static ssize_t pod_get_midi_postprocess(struct device *dev,
878 struct device_attribute *attr,
879 char *buf)
880{
881 struct usb_interface *interface = to_usb_interface(dev);
882 struct usb_line6_pod *pod = usb_get_intfdata(interface);
883 return sprintf(buf, "%d\n", pod->midi_postprocess);
884}
885
886/*
887 "write" request on "midi_postprocess" special file.
888*/
889static ssize_t pod_set_midi_postprocess(struct device *dev,
890 struct device_attribute *attr,
891 const char *buf, size_t count)
892{
893 struct usb_interface *interface = to_usb_interface(dev);
894 struct usb_line6_pod *pod = usb_get_intfdata(interface);
895 u8 value;
896 int ret;
897
898 ret = kstrtou8(buf, 10, &value);
899 if (ret)
900 return ret;
901
902 pod->midi_postprocess = value ? 1 : 0;
903 return count;
904}
905
906/*
907 "read" request on "serial_number" special file. 249 "read" request on "serial_number" special file.
908*/ 250*/
909static ssize_t pod_get_serial_number(struct device *dev, 251static ssize_t pod_get_serial_number(struct device *dev,
@@ -939,18 +281,6 @@ static ssize_t pod_get_device_id(struct device *dev,
939} 281}
940 282
941/* 283/*
942 "read" request on "clip" special file.
943*/
944static ssize_t pod_wait_for_clip(struct device *dev,
945 struct device_attribute *attr, char *buf)
946{
947 struct usb_interface *interface = to_usb_interface(dev);
948 struct usb_line6_pod *pod = usb_get_intfdata(interface);
949 return wait_event_interruptible(pod->clipping.wait,
950 pod->clipping.value != 0);
951}
952
953/*
954 POD startup procedure. 284 POD startup procedure.
955 This is a sequence of functions with special requirements (e.g., must 285 This is a sequence of functions with special requirements (e.g., must
956 not run immediately after initialization, must not run in interrupt 286 not run immediately after initialization, must not run in interrupt
@@ -969,22 +299,6 @@ static void pod_startup1(struct usb_line6_pod *pod)
969static void pod_startup2(unsigned long data) 299static void pod_startup2(unsigned long data)
970{ 300{
971 struct usb_line6_pod *pod = (struct usb_line6_pod *)data; 301 struct usb_line6_pod *pod = (struct usb_line6_pod *)data;
972
973 /* schedule another startup procedure until startup is complete: */
974 if (pod->startup_progress >= POD_STARTUP_LAST)
975 return;
976
977 pod->startup_progress = POD_STARTUP_DUMPREQ;
978 line6_start_timer(&pod->startup_timer, POD_STARTUP_DELAY, pod_startup2,
979 (unsigned long)pod);
980
981 /* current channel dump: */
982 line6_dump_request_async(&pod->dumpreq, &pod->line6, 0,
983 LINE6_DUMP_CURRENT);
984}
985
986static void pod_startup3(struct usb_line6_pod *pod)
987{
988 struct usb_line6 *line6 = &pod->line6; 302 struct usb_line6 *line6 = &pod->line6;
989 CHECK_STARTUP_PROGRESS(pod->startup_progress, POD_STARTUP_VERSIONREQ); 303 CHECK_STARTUP_PROGRESS(pod->startup_progress, POD_STARTUP_VERSIONREQ);
990 304
@@ -992,7 +306,7 @@ static void pod_startup3(struct usb_line6_pod *pod)
992 line6_version_request_async(line6); 306 line6_version_request_async(line6);
993} 307}
994 308
995static void pod_startup4(struct usb_line6_pod *pod) 309static void pod_startup3(struct usb_line6_pod *pod)
996{ 310{
997 CHECK_STARTUP_PROGRESS(pod->startup_progress, POD_STARTUP_WORKQUEUE); 311 CHECK_STARTUP_PROGRESS(pod->startup_progress, POD_STARTUP_WORKQUEUE);
998 312
@@ -1000,7 +314,7 @@ static void pod_startup4(struct usb_line6_pod *pod)
1000 schedule_work(&pod->startup_work); 314 schedule_work(&pod->startup_work);
1001} 315}
1002 316
1003static void pod_startup5(struct work_struct *work) 317static void pod_startup4(struct work_struct *work)
1004{ 318{
1005 struct usb_line6_pod *pod = 319 struct usb_line6_pod *pod =
1006 container_of(work, struct usb_line6_pod, startup_work); 320 container_of(work, struct usb_line6_pod, startup_work);
@@ -1013,87 +327,14 @@ static void pod_startup5(struct work_struct *work)
1013 327
1014 /* ALSA audio interface: */ 328 /* ALSA audio interface: */
1015 line6_register_audio(line6); 329 line6_register_audio(line6);
1016
1017 /* device files: */
1018 line6_pod_create_files(pod->firmware_version,
1019 line6->properties->device_bit, line6->ifcdev);
1020}
1021
1022#define POD_GET_SYSTEM_PARAM(code, sign) \
1023static ssize_t pod_get_ ## code(struct device *dev, \
1024 struct device_attribute *attr, char *buf) \
1025{ \
1026 struct usb_interface *interface = to_usb_interface(dev); \
1027 struct usb_line6_pod *pod = usb_get_intfdata(interface); \
1028 return pod_get_system_param_string(pod, buf, POD_ ## code, \
1029 &pod->code, sign); \
1030}
1031
1032#define POD_GET_SET_SYSTEM_PARAM(code, mask, sign) \
1033POD_GET_SYSTEM_PARAM(code, sign) \
1034static ssize_t pod_set_ ## code(struct device *dev, \
1035 struct device_attribute *attr, \
1036 const char *buf, size_t count) \
1037{ \
1038 struct usb_interface *interface = to_usb_interface(dev); \
1039 struct usb_line6_pod *pod = usb_get_intfdata(interface); \
1040 return pod_set_system_param_string(pod, buf, count, POD_ ## code, mask); \
1041} 330}
1042 331
1043POD_GET_SET_SYSTEM_PARAM(monitor_level, 0xffff, 0);
1044POD_GET_SET_SYSTEM_PARAM(routing, 0x0003, 0);
1045POD_GET_SET_SYSTEM_PARAM(tuner_mute, 0x0001, 0);
1046POD_GET_SET_SYSTEM_PARAM(tuner_freq, 0xffff, 0);
1047POD_GET_SYSTEM_PARAM(tuner_note, 1);
1048POD_GET_SYSTEM_PARAM(tuner_pitch, 1);
1049
1050#undef GET_SET_SYSTEM_PARAM
1051#undef GET_SYSTEM_PARAM
1052
1053/* POD special files: */ 332/* POD special files: */
1054static DEVICE_ATTR(channel, S_IWUSR | S_IRUGO, pod_get_channel,
1055 pod_set_channel);
1056static DEVICE_ATTR(clip, S_IRUGO, pod_wait_for_clip, line6_nop_write);
1057static DEVICE_ATTR(device_id, S_IRUGO, pod_get_device_id, line6_nop_write); 333static DEVICE_ATTR(device_id, S_IRUGO, pod_get_device_id, line6_nop_write);
1058static DEVICE_ATTR(dirty, S_IRUGO, pod_get_dirty, line6_nop_write);
1059static DEVICE_ATTR(dump, S_IWUSR | S_IRUGO, pod_get_dump, pod_set_dump);
1060static DEVICE_ATTR(dump_buf, S_IWUSR | S_IRUGO, pod_get_dump_buf,
1061 pod_set_dump_buf);
1062static DEVICE_ATTR(finish, S_IWUSR, line6_nop_read, pod_set_finish);
1063static DEVICE_ATTR(firmware_version, S_IRUGO, pod_get_firmware_version, 334static DEVICE_ATTR(firmware_version, S_IRUGO, pod_get_firmware_version,
1064 line6_nop_write); 335 line6_nop_write);
1065static DEVICE_ATTR(midi_postprocess, S_IWUSR | S_IRUGO,
1066 pod_get_midi_postprocess, pod_set_midi_postprocess);
1067static DEVICE_ATTR(monitor_level, S_IWUSR | S_IRUGO, pod_get_monitor_level,
1068 pod_set_monitor_level);
1069static DEVICE_ATTR(name, S_IRUGO, pod_get_name, line6_nop_write);
1070static DEVICE_ATTR(name_buf, S_IRUGO, pod_get_name_buf, line6_nop_write);
1071static DEVICE_ATTR(retrieve_amp_setup, S_IWUSR, line6_nop_read,
1072 pod_set_retrieve_amp_setup);
1073static DEVICE_ATTR(retrieve_channel, S_IWUSR, line6_nop_read,
1074 pod_set_retrieve_channel);
1075static DEVICE_ATTR(retrieve_effects_setup, S_IWUSR, line6_nop_read,
1076 pod_set_retrieve_effects_setup);
1077static DEVICE_ATTR(routing, S_IWUSR | S_IRUGO, pod_get_routing,
1078 pod_set_routing);
1079static DEVICE_ATTR(serial_number, S_IRUGO, pod_get_serial_number, 336static DEVICE_ATTR(serial_number, S_IRUGO, pod_get_serial_number,
1080 line6_nop_write); 337 line6_nop_write);
1081static DEVICE_ATTR(store_amp_setup, S_IWUSR, line6_nop_read,
1082 pod_set_store_amp_setup);
1083static DEVICE_ATTR(store_channel, S_IWUSR, line6_nop_read,
1084 pod_set_store_channel);
1085static DEVICE_ATTR(store_effects_setup, S_IWUSR, line6_nop_read,
1086 pod_set_store_effects_setup);
1087static DEVICE_ATTR(tuner_freq, S_IWUSR | S_IRUGO, pod_get_tuner_freq,
1088 pod_set_tuner_freq);
1089static DEVICE_ATTR(tuner_mute, S_IWUSR | S_IRUGO, pod_get_tuner_mute,
1090 pod_set_tuner_mute);
1091static DEVICE_ATTR(tuner_note, S_IRUGO, pod_get_tuner_note, line6_nop_write);
1092static DEVICE_ATTR(tuner_pitch, S_IRUGO, pod_get_tuner_pitch, line6_nop_write);
1093
1094#ifdef CONFIG_LINE6_USB_RAW
1095static DEVICE_ATTR(raw, S_IWUSR, line6_nop_read, line6_set_raw);
1096#endif
1097 338
1098/* control info callback */ 339/* control info callback */
1099static int snd_pod_control_monitor_info(struct snd_kcontrol *kcontrol, 340static int snd_pod_control_monitor_info(struct snd_kcontrol *kcontrol,
@@ -1112,7 +353,7 @@ static int snd_pod_control_monitor_get(struct snd_kcontrol *kcontrol,
1112{ 353{
1113 struct snd_line6_pcm *line6pcm = snd_kcontrol_chip(kcontrol); 354 struct snd_line6_pcm *line6pcm = snd_kcontrol_chip(kcontrol);
1114 struct usb_line6_pod *pod = (struct usb_line6_pod *)line6pcm->line6; 355 struct usb_line6_pod *pod = (struct usb_line6_pod *)line6pcm->line6;
1115 ucontrol->value.integer.value[0] = pod->monitor_level.value; 356 ucontrol->value.integer.value[0] = pod->monitor_level;
1116 return 0; 357 return 0;
1117} 358}
1118 359
@@ -1123,10 +364,10 @@ static int snd_pod_control_monitor_put(struct snd_kcontrol *kcontrol,
1123 struct snd_line6_pcm *line6pcm = snd_kcontrol_chip(kcontrol); 364 struct snd_line6_pcm *line6pcm = snd_kcontrol_chip(kcontrol);
1124 struct usb_line6_pod *pod = (struct usb_line6_pod *)line6pcm->line6; 365 struct usb_line6_pod *pod = (struct usb_line6_pod *)line6pcm->line6;
1125 366
1126 if (ucontrol->value.integer.value[0] == pod->monitor_level.value) 367 if (ucontrol->value.integer.value[0] == pod->monitor_level)
1127 return 0; 368 return 0;
1128 369
1129 pod->monitor_level.value = ucontrol->value.integer.value[0]; 370 pod->monitor_level = ucontrol->value.integer.value[0];
1130 pod_set_system_param_int(pod, ucontrol->value.integer.value[0], 371 pod_set_system_param_int(pod, ucontrol->value.integer.value[0],
1131 POD_monitor_level); 372 POD_monitor_level);
1132 return 1; 373 return 1;
@@ -1156,9 +397,6 @@ static void pod_destruct(struct usb_interface *interface)
1156 397
1157 del_timer(&pod->startup_timer); 398 del_timer(&pod->startup_timer);
1158 cancel_work_sync(&pod->startup_work); 399 cancel_work_sync(&pod->startup_work);
1159
1160 /* free dump request data: */
1161 line6_dumpreq_destruct(&pod->dumpreq);
1162} 400}
1163 401
1164/* 402/*
@@ -1168,35 +406,9 @@ static int pod_create_files2(struct device *dev)
1168{ 406{
1169 int err; 407 int err;
1170 408
1171 CHECK_RETURN(device_create_file(dev, &dev_attr_channel));
1172 CHECK_RETURN(device_create_file(dev, &dev_attr_clip));
1173 CHECK_RETURN(device_create_file(dev, &dev_attr_device_id)); 409 CHECK_RETURN(device_create_file(dev, &dev_attr_device_id));
1174 CHECK_RETURN(device_create_file(dev, &dev_attr_dirty));
1175 CHECK_RETURN(device_create_file(dev, &dev_attr_dump));
1176 CHECK_RETURN(device_create_file(dev, &dev_attr_dump_buf));
1177 CHECK_RETURN(device_create_file(dev, &dev_attr_finish));
1178 CHECK_RETURN(device_create_file(dev, &dev_attr_firmware_version)); 410 CHECK_RETURN(device_create_file(dev, &dev_attr_firmware_version));
1179 CHECK_RETURN(device_create_file(dev, &dev_attr_midi_postprocess));
1180 CHECK_RETURN(device_create_file(dev, &dev_attr_monitor_level));
1181 CHECK_RETURN(device_create_file(dev, &dev_attr_name));
1182 CHECK_RETURN(device_create_file(dev, &dev_attr_name_buf));
1183 CHECK_RETURN(device_create_file(dev, &dev_attr_retrieve_amp_setup));
1184 CHECK_RETURN(device_create_file(dev, &dev_attr_retrieve_channel));
1185 CHECK_RETURN(device_create_file(dev, &dev_attr_retrieve_effects_setup));
1186 CHECK_RETURN(device_create_file(dev, &dev_attr_routing));
1187 CHECK_RETURN(device_create_file(dev, &dev_attr_serial_number)); 411 CHECK_RETURN(device_create_file(dev, &dev_attr_serial_number));
1188 CHECK_RETURN(device_create_file(dev, &dev_attr_store_amp_setup));
1189 CHECK_RETURN(device_create_file(dev, &dev_attr_store_channel));
1190 CHECK_RETURN(device_create_file(dev, &dev_attr_store_effects_setup));
1191 CHECK_RETURN(device_create_file(dev, &dev_attr_tuner_freq));
1192 CHECK_RETURN(device_create_file(dev, &dev_attr_tuner_mute));
1193 CHECK_RETURN(device_create_file(dev, &dev_attr_tuner_note));
1194 CHECK_RETURN(device_create_file(dev, &dev_attr_tuner_pitch));
1195
1196#ifdef CONFIG_LINE6_USB_RAW
1197 CHECK_RETURN(device_create_file(dev, &dev_attr_raw));
1198#endif
1199
1200 return 0; 412 return 0;
1201} 413}
1202 414
@@ -1210,32 +422,11 @@ static int pod_try_init(struct usb_interface *interface,
1210 struct usb_line6 *line6 = &pod->line6; 422 struct usb_line6 *line6 = &pod->line6;
1211 423
1212 init_timer(&pod->startup_timer); 424 init_timer(&pod->startup_timer);
1213 INIT_WORK(&pod->startup_work, pod_startup5); 425 INIT_WORK(&pod->startup_work, pod_startup4);
1214 426
1215 if ((interface == NULL) || (pod == NULL)) 427 if ((interface == NULL) || (pod == NULL))
1216 return -ENODEV; 428 return -ENODEV;
1217 429
1218 pod->channel_num = 255;
1219
1220 /* initialize wait queues: */
1221 init_waitqueue_head(&pod->monitor_level.wait);
1222 init_waitqueue_head(&pod->routing.wait);
1223 init_waitqueue_head(&pod->tuner_mute.wait);
1224 init_waitqueue_head(&pod->tuner_freq.wait);
1225 init_waitqueue_head(&pod->tuner_note.wait);
1226 init_waitqueue_head(&pod->tuner_pitch.wait);
1227 init_waitqueue_head(&pod->clipping.wait);
1228
1229 memset(pod->param_dirty, 0xff, sizeof(pod->param_dirty));
1230
1231 /* initialize USB buffers: */
1232 err = line6_dumpreq_init(&pod->dumpreq, pod_request_channel,
1233 sizeof(pod_request_channel));
1234 if (err < 0) {
1235 dev_err(&interface->dev, "Out of memory\n");
1236 return -ENOMEM;
1237 }
1238
1239 /* create sysfs entries: */ 430 /* create sysfs entries: */
1240 err = pod_create_files2(&interface->dev); 431 err = pod_create_files2(&interface->dev);
1241 if (err < 0) 432 if (err < 0)
@@ -1269,7 +460,7 @@ static int pod_try_init(struct usb_interface *interface,
1269 */ 460 */
1270 461
1271 if (pod->line6.properties->capabilities & LINE6_BIT_CONTROL) { 462 if (pod->line6.properties->capabilities & LINE6_BIT_CONTROL) {
1272 pod->monitor_level.value = POD_system_invalid; 463 pod->monitor_level = POD_system_invalid;
1273 464
1274 /* initiate startup procedure: */ 465 /* initiate startup procedure: */
1275 pod_startup1(pod); 466 pod_startup1(pod);
@@ -1311,39 +502,9 @@ void line6_pod_disconnect(struct usb_interface *interface)
1311 502
1312 if (dev != NULL) { 503 if (dev != NULL) {
1313 /* remove sysfs entries: */ 504 /* remove sysfs entries: */
1314 line6_pod_remove_files(pod->firmware_version,
1315 pod->line6.
1316 properties->device_bit, dev);
1317
1318 device_remove_file(dev, &dev_attr_channel);
1319 device_remove_file(dev, &dev_attr_clip);
1320 device_remove_file(dev, &dev_attr_device_id); 505 device_remove_file(dev, &dev_attr_device_id);
1321 device_remove_file(dev, &dev_attr_dirty);
1322 device_remove_file(dev, &dev_attr_dump);
1323 device_remove_file(dev, &dev_attr_dump_buf);
1324 device_remove_file(dev, &dev_attr_finish);
1325 device_remove_file(dev, &dev_attr_firmware_version); 506 device_remove_file(dev, &dev_attr_firmware_version);
1326 device_remove_file(dev, &dev_attr_midi_postprocess);
1327 device_remove_file(dev, &dev_attr_monitor_level);
1328 device_remove_file(dev, &dev_attr_name);
1329 device_remove_file(dev, &dev_attr_name_buf);
1330 device_remove_file(dev, &dev_attr_retrieve_amp_setup);
1331 device_remove_file(dev, &dev_attr_retrieve_channel);
1332 device_remove_file(dev,
1333 &dev_attr_retrieve_effects_setup);
1334 device_remove_file(dev, &dev_attr_routing);
1335 device_remove_file(dev, &dev_attr_serial_number); 507 device_remove_file(dev, &dev_attr_serial_number);
1336 device_remove_file(dev, &dev_attr_store_amp_setup);
1337 device_remove_file(dev, &dev_attr_store_channel);
1338 device_remove_file(dev, &dev_attr_store_effects_setup);
1339 device_remove_file(dev, &dev_attr_tuner_freq);
1340 device_remove_file(dev, &dev_attr_tuner_mute);
1341 device_remove_file(dev, &dev_attr_tuner_note);
1342 device_remove_file(dev, &dev_attr_tuner_pitch);
1343
1344#ifdef CONFIG_LINE6_USB_RAW
1345 device_remove_file(dev, &dev_attr_raw);
1346#endif
1347 } 508 }
1348 } 509 }
1349 510
diff --git a/drivers/staging/line6/pod.h b/drivers/staging/line6/pod.h
index 47e0d1a1c4b9..3e3f1671337a 100644
--- a/drivers/staging/line6/pod.h
+++ b/drivers/staging/line6/pod.h
@@ -15,12 +15,10 @@
15#include <linux/interrupt.h> 15#include <linux/interrupt.h>
16#include <linux/spinlock.h> 16#include <linux/spinlock.h>
17#include <linux/usb.h> 17#include <linux/usb.h>
18#include <linux/wait.h>
19 18
20#include <sound/core.h> 19#include <sound/core.h>
21 20
22#include "driver.h" 21#include "driver.h"
23#include "dumprequest.h"
24 22
25/* 23/*
26 PODxt Live interfaces 24 PODxt Live interfaces
@@ -46,37 +44,12 @@
46*/ 44*/
47enum { 45enum {
48 POD_STARTUP_INIT = 1, 46 POD_STARTUP_INIT = 1,
49 POD_STARTUP_DUMPREQ,
50 POD_STARTUP_VERSIONREQ, 47 POD_STARTUP_VERSIONREQ,
51 POD_STARTUP_WORKQUEUE, 48 POD_STARTUP_WORKQUEUE,
52 POD_STARTUP_SETUP, 49 POD_STARTUP_SETUP,
53 POD_STARTUP_LAST = POD_STARTUP_SETUP - 1 50 POD_STARTUP_LAST = POD_STARTUP_SETUP - 1
54}; 51};
55 52
56/**
57 Data structure for values that need to be requested explicitly.
58 This is the case for system and tuner settings.
59*/
60struct ValueWait {
61 int value;
62 wait_queue_head_t wait;
63};
64
65/**
66 Binary PODxt Pro program dump
67*/
68struct pod_program {
69 /**
70 Header information (including program name).
71 */
72 unsigned char header[0x20];
73
74 /**
75 Program parameters.
76 */
77 unsigned char control[POD_CONTROL_SIZE];
78};
79
80struct usb_line6_pod { 53struct usb_line6_pod {
81 /** 54 /**
82 Generic Line6 USB data. 55 Generic Line6 USB data.
@@ -84,63 +57,9 @@ struct usb_line6_pod {
84 struct usb_line6 line6; 57 struct usb_line6 line6;
85 58
86 /** 59 /**
87 Dump request structure.
88 */
89 struct line6_dump_request dumpreq;
90
91 /**
92 Current program number.
93 */
94 unsigned char channel_num;
95
96 /**
97 Current program settings.
98 */
99 struct pod_program prog_data;
100
101 /**
102 Buffer for data retrieved from or to be stored on PODxt Pro.
103 */
104 struct pod_program prog_data_buf;
105
106 /**
107 Tuner mute mode.
108 */
109 struct ValueWait tuner_mute;
110
111 /**
112 Tuner base frequency (typically 440Hz).
113 */
114 struct ValueWait tuner_freq;
115
116 /**
117 Note received from tuner.
118 */
119 struct ValueWait tuner_note;
120
121 /**
122 Pitch value received from tuner.
123 */
124 struct ValueWait tuner_pitch;
125
126 /**
127 Instrument monitor level. 60 Instrument monitor level.
128 */ 61 */
129 struct ValueWait monitor_level; 62 int monitor_level;
130
131 /**
132 Audio routing mode.
133 0: send processed guitar
134 1: send clean guitar
135 2: send clean guitar re-amp playback
136 3: send re-amp playback
137 */
138 struct ValueWait routing;
139
140 /**
141 Wait for audio clipping event.
142 */
143 struct ValueWait clipping;
144 63
145 /** 64 /**
146 Timer for device initializaton. 65 Timer for device initializaton.
@@ -158,16 +77,6 @@ struct usb_line6_pod {
158 int startup_progress; 77 int startup_progress;
159 78
160 /** 79 /**
161 Dirty flags for access to parameter data.
162 */
163 unsigned long param_dirty[POD_CONTROL_SIZE / sizeof(unsigned long)];
164
165 /**
166 Some atomic flags.
167 */
168 unsigned long atomic_flags;
169
170 /**
171 Serial number of device. 80 Serial number of device.
172 */ 81 */
173 int serial_number; 82 int serial_number;
@@ -181,23 +90,11 @@ struct usb_line6_pod {
181 Device ID. 90 Device ID.
182 */ 91 */
183 int device_id; 92 int device_id;
184
185 /**
186 Flag to indicate modification of current program settings.
187 */
188 char dirty;
189
190 /**
191 Flag to enable MIDI postprocessing.
192 */
193 char midi_postprocess;
194}; 93};
195 94
196extern void line6_pod_disconnect(struct usb_interface *interface); 95extern void line6_pod_disconnect(struct usb_interface *interface);
197extern int line6_pod_init(struct usb_interface *interface, 96extern int line6_pod_init(struct usb_interface *interface,
198 struct usb_line6_pod *pod); 97 struct usb_line6_pod *pod);
199extern void line6_pod_midi_postprocess(struct usb_line6_pod *pod,
200 unsigned char *data, int length);
201extern void line6_pod_process_message(struct usb_line6_pod *pod); 98extern void line6_pod_process_message(struct usb_line6_pod *pod);
202extern void line6_pod_transmit_parameter(struct usb_line6_pod *pod, int param, 99extern void line6_pod_transmit_parameter(struct usb_line6_pod *pod, int param,
203 u8 value); 100 u8 value);
diff --git a/drivers/staging/line6/toneport.c b/drivers/staging/line6/toneport.c
index 31b624b63425..a529dd3d604e 100644
--- a/drivers/staging/line6/toneport.c
+++ b/drivers/staging/line6/toneport.c
@@ -127,13 +127,11 @@ static ssize_t toneport_set_led_red(struct device *dev,
127 const char *buf, size_t count) 127 const char *buf, size_t count)
128{ 128{
129 int retval; 129 int retval;
130 long value;
131 130
132 retval = strict_strtol(buf, 10, &value); 131 retval = kstrtoint(buf, 10, &led_red);
133 if (retval) 132 if (retval)
134 return retval; 133 return retval;
135 134
136 led_red = value;
137 toneport_update_led(dev); 135 toneport_update_led(dev);
138 return count; 136 return count;
139} 137}
@@ -143,13 +141,11 @@ static ssize_t toneport_set_led_green(struct device *dev,
143 const char *buf, size_t count) 141 const char *buf, size_t count)
144{ 142{
145 int retval; 143 int retval;
146 long value;
147 144
148 retval = strict_strtol(buf, 10, &value); 145 retval = kstrtoint(buf, 10, &led_green);
149 if (retval) 146 if (retval)
150 return retval; 147 return retval;
151 148
152 led_green = value;
153 toneport_update_led(dev); 149 toneport_update_led(dev);
154 return count; 150 return count;
155} 151}
diff --git a/drivers/staging/line6/usbdefs.h b/drivers/staging/line6/usbdefs.h
index 353d59d77b04..43eb54008a2b 100644
--- a/drivers/staging/line6/usbdefs.h
+++ b/drivers/staging/line6/usbdefs.h
@@ -83,11 +83,15 @@ enum {
83 LINE6_BIT(VARIAX), 83 LINE6_BIT(VARIAX),
84 84
85 LINE6_BITS_PRO = LINE6_BIT_BASSPODXTPRO | LINE6_BIT_PODXTPRO, 85 LINE6_BITS_PRO = LINE6_BIT_BASSPODXTPRO | LINE6_BIT_PODXTPRO,
86 LINE6_BITS_LIVE = LINE6_BIT_BASSPODXTLIVE | LINE6_BIT_PODXTLIVE | LINE6_BIT_PODX3LIVE, 86 LINE6_BITS_LIVE = LINE6_BIT_BASSPODXTLIVE | LINE6_BIT_PODXTLIVE |
87 LINE6_BITS_PODXTALL = LINE6_BIT_PODXT | LINE6_BIT_PODXTLIVE | LINE6_BIT_PODXTPRO, 87 LINE6_BIT_PODX3LIVE,
88 LINE6_BITS_PODXTALL = LINE6_BIT_PODXT | LINE6_BIT_PODXTLIVE |
89 LINE6_BIT_PODXTPRO,
88 LINE6_BITS_PODX3ALL = LINE6_BIT_PODX3 | LINE6_BIT_PODX3LIVE, 90 LINE6_BITS_PODX3ALL = LINE6_BIT_PODX3 | LINE6_BIT_PODX3LIVE,
89 LINE6_BITS_PODHDALL = LINE6_BIT_PODHD300 | LINE6_BIT_PODHD500, 91 LINE6_BITS_PODHDALL = LINE6_BIT_PODHD300 | LINE6_BIT_PODHD500,
90 LINE6_BITS_BASSPODXTALL = LINE6_BIT_BASSPODXT | LINE6_BIT_BASSPODXTLIVE | LINE6_BIT_BASSPODXTPRO 92 LINE6_BITS_BASSPODXTALL = LINE6_BIT_BASSPODXT |
93 LINE6_BIT_BASSPODXTLIVE |
94 LINE6_BIT_BASSPODXTPRO
91}; 95};
92 96
93/* device supports settings parameter via USB */ 97/* device supports settings parameter via USB */
diff --git a/drivers/staging/line6/variax.c b/drivers/staging/line6/variax.c
index f97416b1de54..4fca58f11245 100644
--- a/drivers/staging/line6/variax.c
+++ b/drivers/staging/line6/variax.c
@@ -12,28 +12,13 @@
12#include <linux/slab.h> 12#include <linux/slab.h>
13 13
14#include "audio.h" 14#include "audio.h"
15#include "control.h"
16#include "driver.h" 15#include "driver.h"
17#include "variax.h" 16#include "variax.h"
18 17
19#define VARIAX_SYSEX_CODE 7
20#define VARIAX_SYSEX_PARAM 0x3b
21#define VARIAX_SYSEX_ACTIVATE 0x2a
22#define VARIAX_MODEL_HEADER_LENGTH 7
23#define VARIAX_MODEL_MESSAGE_LENGTH 199
24#define VARIAX_OFFSET_ACTIVATE 7 18#define VARIAX_OFFSET_ACTIVATE 7
25 19
26/* 20/*
27 This message is sent by the device during initialization and identifies 21 This message is sent by the device during initialization and identifies
28 the connected guitar model.
29*/
30static const char variax_init_model[] = {
31 0xf0, 0x00, 0x01, 0x0c, 0x07, 0x00, 0x69, 0x02,
32 0x00
33};
34
35/*
36 This message is sent by the device during initialization and identifies
37 the connected guitar version. 22 the connected guitar version.
38*/ 23*/
39static const char variax_init_version[] = { 24static const char variax_init_version[] = {
@@ -53,43 +38,11 @@ static const char variax_activate[] = {
53 0xf7 38 0xf7
54}; 39};
55 40
56static const char variax_request_bank[] = {
57 0xf0, 0x00, 0x01, 0x0c, 0x07, 0x00, 0x6d, 0xf7
58};
59
60static const char variax_request_model1[] = {
61 0xf0, 0x00, 0x01, 0x0c, 0x07, 0x00, 0x3c, 0x00,
62 0x02, 0x00, 0x00, 0x00, 0x00, 0x03, 0x05, 0x03,
63 0x00, 0x00, 0x00, 0xf7
64};
65
66static const char variax_request_model2[] = {
67 0xf0, 0x00, 0x01, 0x0c, 0x07, 0x00, 0x3c, 0x00,
68 0x02, 0x00, 0x00, 0x00, 0x00, 0x03, 0x07, 0x03,
69 0x00, 0x00, 0x00, 0xf7
70};
71
72/* forward declarations: */ 41/* forward declarations: */
73static int variax_create_files2(struct device *dev);
74static void variax_startup2(unsigned long data); 42static void variax_startup2(unsigned long data);
75static void variax_startup4(unsigned long data); 43static void variax_startup4(unsigned long data);
76static void variax_startup5(unsigned long data); 44static void variax_startup5(unsigned long data);
77 45
78/*
79 Decode data transmitted by workbench.
80*/
81static void variax_decode(const unsigned char *raw_data, unsigned char *data,
82 int raw_size)
83{
84 for (; raw_size > 0; raw_size -= 6) {
85 data[2] = raw_data[0] | (raw_data[1] << 4);
86 data[1] = raw_data[2] | (raw_data[3] << 4);
87 data[0] = raw_data[4] | (raw_data[5] << 4);
88 raw_data += 6;
89 data += 3;
90 }
91}
92
93static void variax_activate_async(struct usb_line6_variax *variax, int a) 46static void variax_activate_async(struct usb_line6_variax *variax, int a)
94{ 47{
95 variax->buffer_activate[VARIAX_OFFSET_ACTIVATE] = a; 48 variax->buffer_activate[VARIAX_OFFSET_ACTIVATE] = a;
@@ -155,37 +108,21 @@ static void variax_startup5(unsigned long data)
155{ 108{
156 struct usb_line6_variax *variax = (struct usb_line6_variax *)data; 109 struct usb_line6_variax *variax = (struct usb_line6_variax *)data;
157 CHECK_STARTUP_PROGRESS(variax->startup_progress, 110 CHECK_STARTUP_PROGRESS(variax->startup_progress,
158 VARIAX_STARTUP_DUMPREQ);
159
160 /* current model dump: */
161 line6_dump_request_async(&variax->dumpreq, &variax->line6, 0,
162 VARIAX_DUMP_PASS1);
163 /* passes 2 and 3 are performed implicitly before entering variax_startup6 */
164}
165
166static void variax_startup6(struct usb_line6_variax *variax)
167{
168 CHECK_STARTUP_PROGRESS(variax->startup_progress,
169 VARIAX_STARTUP_WORKQUEUE); 111 VARIAX_STARTUP_WORKQUEUE);
170 112
171 /* schedule work for global work queue: */ 113 /* schedule work for global work queue: */
172 schedule_work(&variax->startup_work); 114 schedule_work(&variax->startup_work);
173} 115}
174 116
175static void variax_startup7(struct work_struct *work) 117static void variax_startup6(struct work_struct *work)
176{ 118{
177 struct usb_line6_variax *variax = 119 struct usb_line6_variax *variax =
178 container_of(work, struct usb_line6_variax, startup_work); 120 container_of(work, struct usb_line6_variax, startup_work);
179 struct usb_line6 *line6 = &variax->line6;
180 121
181 CHECK_STARTUP_PROGRESS(variax->startup_progress, VARIAX_STARTUP_SETUP); 122 CHECK_STARTUP_PROGRESS(variax->startup_progress, VARIAX_STARTUP_SETUP);
182 123
183 /* ALSA audio interface: */ 124 /* ALSA audio interface: */
184 line6_register_audio(&variax->line6); 125 line6_register_audio(&variax->line6);
185
186 /* device files: */
187 line6_variax_create_files(0, 0, line6->ifcdev);
188 variax_create_files2(line6->ifcdev);
189} 126}
190 127
191/* 128/*
@@ -197,22 +134,10 @@ void line6_variax_process_message(struct usb_line6_variax *variax)
197 134
198 switch (buf[0]) { 135 switch (buf[0]) {
199 case LINE6_PARAM_CHANGE | LINE6_CHANNEL_HOST: 136 case LINE6_PARAM_CHANGE | LINE6_CHANNEL_HOST:
200 switch (buf[1]) {
201 case VARIAXMIDI_volume:
202 variax->volume = buf[2];
203 break;
204
205 case VARIAXMIDI_tone:
206 variax->tone = buf[2];
207 }
208
209 break; 137 break;
210 138
211 case LINE6_PROGRAM_CHANGE | LINE6_CHANNEL_DEVICE: 139 case LINE6_PROGRAM_CHANGE | LINE6_CHANNEL_DEVICE:
212 case LINE6_PROGRAM_CHANGE | LINE6_CHANNEL_HOST: 140 case LINE6_PROGRAM_CHANGE | LINE6_CHANNEL_HOST:
213 variax->model = buf[1];
214 line6_dump_request_async(&variax->dumpreq, &variax->line6, 0,
215 VARIAX_DUMP_PASS1);
216 break; 141 break;
217 142
218 case LINE6_RESET: 143 case LINE6_RESET:
@@ -220,352 +145,25 @@ void line6_variax_process_message(struct usb_line6_variax *variax)
220 break; 145 break;
221 146
222 case LINE6_SYSEX_BEGIN: 147 case LINE6_SYSEX_BEGIN:
223 if (memcmp(buf + 1, variax_request_model1 + 1, 148 if (memcmp(buf + 1, variax_init_version + 1,
224 VARIAX_MODEL_HEADER_LENGTH - 1) == 0) { 149 sizeof(variax_init_version) - 1) == 0) {
225 if (variax->line6.message_length ==
226 VARIAX_MODEL_MESSAGE_LENGTH) {
227 switch (variax->dumpreq.in_progress) {
228 case VARIAX_DUMP_PASS1:
229 variax_decode(buf +
230 VARIAX_MODEL_HEADER_LENGTH,
231 (unsigned char *)
232 &variax->model_data,
233 (sizeof
234 (variax->model_data.
235 name) +
236 sizeof(variax->
237 model_data.
238 control)
239 / 2) * 2);
240 line6_dump_request_async
241 (&variax->dumpreq, &variax->line6,
242 1, VARIAX_DUMP_PASS2);
243 break;
244
245 case VARIAX_DUMP_PASS2:
246 /* model name is transmitted twice, so skip it here: */
247 variax_decode(buf +
248 VARIAX_MODEL_HEADER_LENGTH,
249 (unsigned char *)
250 &variax->
251 model_data.control +
252 sizeof(variax->model_data.
253 control)
254 / 2,
255 sizeof(variax->model_data.
256 control)
257 / 2 * 2);
258 line6_dump_request_async
259 (&variax->dumpreq, &variax->line6,
260 2, VARIAX_DUMP_PASS3);
261 }
262 } else {
263 DEBUG_MESSAGES(dev_err
264 (variax->line6.ifcdev,
265 "illegal length %d of model data\n",
266 variax->line6.message_length));
267 line6_dump_finished(&variax->dumpreq);
268 }
269 } else if (memcmp(buf + 1, variax_request_bank + 1,
270 sizeof(variax_request_bank) - 2) == 0) {
271 memcpy(variax->bank,
272 buf + sizeof(variax_request_bank) - 1,
273 sizeof(variax->bank));
274 line6_dump_finished(&variax->dumpreq);
275 variax_startup6(variax);
276 } else if (memcmp(buf + 1, variax_init_model + 1,
277 sizeof(variax_init_model) - 1) == 0) {
278 memcpy(variax->guitar,
279 buf + sizeof(variax_init_model),
280 sizeof(variax->guitar));
281 } else if (memcmp(buf + 1, variax_init_version + 1,
282 sizeof(variax_init_version) - 1) == 0) {
283 variax_startup3(variax); 150 variax_startup3(variax);
284 } else if (memcmp(buf + 1, variax_init_done + 1, 151 } else if (memcmp(buf + 1, variax_init_done + 1,
285 sizeof(variax_init_done) - 1) == 0) { 152 sizeof(variax_init_done) - 1) == 0) {
286 /* notify of complete initialization: */ 153 /* notify of complete initialization: */
287 variax_startup4((unsigned long)variax); 154 variax_startup4((unsigned long)variax);
288 } 155 }
289
290 break; 156 break;
291 157
292 case LINE6_SYSEX_END: 158 case LINE6_SYSEX_END:
293 break; 159 break;
294 160
295 default: 161 default:
296 DEBUG_MESSAGES(dev_err 162 dev_dbg(variax->line6.ifcdev,
297 (variax->line6.ifcdev, 163 "Variax: unknown message %02X\n", buf[0]);
298 "Variax: unknown message %02X\n", buf[0]));
299 }
300}
301
302/*
303 "read" request on "volume" special file.
304*/
305static ssize_t variax_get_volume(struct device *dev,
306 struct device_attribute *attr, char *buf)
307{
308 struct usb_line6_variax *variax =
309 usb_get_intfdata(to_usb_interface(dev));
310 return sprintf(buf, "%d\n", variax->volume);
311}
312
313/*
314 "write" request on "volume" special file.
315*/
316static ssize_t variax_set_volume(struct device *dev,
317 struct device_attribute *attr,
318 const char *buf, size_t count)
319{
320 struct usb_line6_variax *variax =
321 usb_get_intfdata(to_usb_interface(dev));
322 u8 value;
323 int ret;
324
325 ret = kstrtou8(buf, 10, &value);
326 if (ret)
327 return ret;
328
329 if (line6_transmit_parameter(&variax->line6, VARIAXMIDI_volume,
330 value) == 0)
331 variax->volume = value;
332
333 return count;
334}
335
336/*
337 "read" request on "model" special file.
338*/
339static ssize_t variax_get_model(struct device *dev,
340 struct device_attribute *attr, char *buf)
341{
342 struct usb_line6_variax *variax =
343 usb_get_intfdata(to_usb_interface(dev));
344 return sprintf(buf, "%d\n", variax->model);
345}
346
347/*
348 "write" request on "model" special file.
349*/
350static ssize_t variax_set_model(struct device *dev,
351 struct device_attribute *attr,
352 const char *buf, size_t count)
353{
354 struct usb_line6_variax *variax =
355 usb_get_intfdata(to_usb_interface(dev));
356 u8 value;
357 int ret;
358
359 ret = kstrtou8(buf, 10, &value);
360 if (ret)
361 return ret;
362
363 if (line6_send_program(&variax->line6, value) == 0)
364 variax->model = value;
365
366 return count;
367}
368
369/*
370 "read" request on "active" special file.
371*/
372static ssize_t variax_get_active(struct device *dev,
373 struct device_attribute *attr, char *buf)
374{
375 struct usb_line6_variax *variax =
376 usb_get_intfdata(to_usb_interface(dev));
377 return sprintf(buf, "%d\n",
378 variax->buffer_activate[VARIAX_OFFSET_ACTIVATE]);
379}
380
381/*
382 "write" request on "active" special file.
383*/
384static ssize_t variax_set_active(struct device *dev,
385 struct device_attribute *attr,
386 const char *buf, size_t count)
387{
388 struct usb_line6_variax *variax =
389 usb_get_intfdata(to_usb_interface(dev));
390 u8 value;
391 int ret;
392
393 ret = kstrtou8(buf, 10, &value);
394 if (ret)
395 return ret;
396
397 variax_activate_async(variax, value ? 1 : 0);
398 return count;
399}
400
401/*
402 "read" request on "tone" special file.
403*/
404static ssize_t variax_get_tone(struct device *dev,
405 struct device_attribute *attr, char *buf)
406{
407 struct usb_line6_variax *variax =
408 usb_get_intfdata(to_usb_interface(dev));
409 return sprintf(buf, "%d\n", variax->tone);
410}
411
412/*
413 "write" request on "tone" special file.
414*/
415static ssize_t variax_set_tone(struct device *dev,
416 struct device_attribute *attr,
417 const char *buf, size_t count)
418{
419 struct usb_line6_variax *variax =
420 usb_get_intfdata(to_usb_interface(dev));
421 u8 value;
422 int ret;
423
424 ret = kstrtou8(buf, 10, &value);
425 if (ret)
426 return ret;
427
428 if (line6_transmit_parameter(&variax->line6, VARIAXMIDI_tone,
429 value) == 0)
430 variax->tone = value;
431
432 return count;
433}
434
435static ssize_t get_string(char *buf, const char *data, int length)
436{
437 int i;
438 memcpy(buf, data, length);
439
440 for (i = length; i--;) {
441 char c = buf[i];
442
443 if ((c != 0) && (c != ' '))
444 break;
445 }
446
447 buf[i + 1] = '\n';
448 return i + 2;
449}
450
451/*
452 "read" request on "name" special file.
453*/
454static ssize_t variax_get_name(struct device *dev,
455 struct device_attribute *attr, char *buf)
456{
457 struct usb_line6_variax *variax =
458 usb_get_intfdata(to_usb_interface(dev));
459 line6_dump_wait_interruptible(&variax->dumpreq);
460 return get_string(buf, variax->model_data.name,
461 sizeof(variax->model_data.name));
462}
463
464/*
465 "read" request on "bank" special file.
466*/
467static ssize_t variax_get_bank(struct device *dev,
468 struct device_attribute *attr, char *buf)
469{
470 struct usb_line6_variax *variax =
471 usb_get_intfdata(to_usb_interface(dev));
472 line6_dump_wait_interruptible(&variax->dumpreq);
473 return get_string(buf, variax->bank, sizeof(variax->bank));
474}
475
476/*
477 "read" request on "dump" special file.
478*/
479static ssize_t variax_get_dump(struct device *dev,
480 struct device_attribute *attr, char *buf)
481{
482 struct usb_line6_variax *variax =
483 usb_get_intfdata(to_usb_interface(dev));
484 int retval;
485 retval = line6_dump_wait_interruptible(&variax->dumpreq);
486 if (retval < 0)
487 return retval;
488 memcpy(buf, &variax->model_data.control,
489 sizeof(variax->model_data.control));
490 return sizeof(variax->model_data.control);
491}
492
493/*
494 "read" request on "guitar" special file.
495*/
496static ssize_t variax_get_guitar(struct device *dev,
497 struct device_attribute *attr, char *buf)
498{
499 struct usb_line6_variax *variax =
500 usb_get_intfdata(to_usb_interface(dev));
501 return sprintf(buf, "%s\n", variax->guitar);
502}
503
504#ifdef CONFIG_LINE6_USB_RAW
505
506static char *variax_alloc_sysex_buffer(struct usb_line6_variax *variax,
507 int code, int size)
508{
509 return line6_alloc_sysex_buffer(&variax->line6, VARIAX_SYSEX_CODE, code,
510 size);
511}
512
513/*
514 "write" request on "raw" special file.
515*/
516static ssize_t variax_set_raw2(struct device *dev,
517 struct device_attribute *attr,
518 const char *buf, size_t count)
519{
520 struct usb_line6_variax *variax =
521 usb_get_intfdata(to_usb_interface(dev));
522 int size;
523 int i;
524 char *sysex;
525
526 count -= count % 3;
527 size = count * 2;
528 sysex = variax_alloc_sysex_buffer(variax, VARIAX_SYSEX_PARAM, size);
529
530 if (!sysex)
531 return 0;
532
533 for (i = 0; i < count; i += 3) {
534 const unsigned char *p1 = buf + i;
535 char *p2 = sysex + SYSEX_DATA_OFS + i * 2;
536 p2[0] = p1[2] & 0x0f;
537 p2[1] = p1[2] >> 4;
538 p2[2] = p1[1] & 0x0f;
539 p2[3] = p1[1] >> 4;
540 p2[4] = p1[0] & 0x0f;
541 p2[5] = p1[0] >> 4;
542 } 164 }
543
544 line6_send_sysex_message(&variax->line6, sysex, size);
545 kfree(sysex);
546 return count;
547} 165}
548 166
549#endif
550
551/* Variax workbench special files: */
552static DEVICE_ATTR(model, S_IWUSR | S_IRUGO, variax_get_model,
553 variax_set_model);
554static DEVICE_ATTR(volume, S_IWUSR | S_IRUGO, variax_get_volume,
555 variax_set_volume);
556static DEVICE_ATTR(tone, S_IWUSR | S_IRUGO, variax_get_tone, variax_set_tone);
557static DEVICE_ATTR(name, S_IRUGO, variax_get_name, line6_nop_write);
558static DEVICE_ATTR(bank, S_IRUGO, variax_get_bank, line6_nop_write);
559static DEVICE_ATTR(dump, S_IRUGO, variax_get_dump, line6_nop_write);
560static DEVICE_ATTR(active, S_IWUSR | S_IRUGO, variax_get_active,
561 variax_set_active);
562static DEVICE_ATTR(guitar, S_IRUGO, variax_get_guitar, line6_nop_write);
563
564#ifdef CONFIG_LINE6_USB_RAW
565static DEVICE_ATTR(raw, S_IWUSR, line6_nop_read, line6_set_raw);
566static DEVICE_ATTR(raw2, S_IWUSR, line6_nop_read, variax_set_raw2);
567#endif
568
569/* 167/*
570 Variax destructor. 168 Variax destructor.
571*/ 169*/
@@ -581,36 +179,10 @@ static void variax_destruct(struct usb_interface *interface)
581 del_timer(&variax->startup_timer2); 179 del_timer(&variax->startup_timer2);
582 cancel_work_sync(&variax->startup_work); 180 cancel_work_sync(&variax->startup_work);
583 181
584 /* free dump request data: */
585 line6_dumpreq_destructbuf(&variax->dumpreq, 2);
586 line6_dumpreq_destructbuf(&variax->dumpreq, 1);
587 line6_dumpreq_destruct(&variax->dumpreq);
588
589 kfree(variax->buffer_activate); 182 kfree(variax->buffer_activate);
590} 183}
591 184
592/* 185/*
593 Create sysfs entries.
594*/
595static int variax_create_files2(struct device *dev)
596{
597 int err;
598 CHECK_RETURN(device_create_file(dev, &dev_attr_model));
599 CHECK_RETURN(device_create_file(dev, &dev_attr_volume));
600 CHECK_RETURN(device_create_file(dev, &dev_attr_tone));
601 CHECK_RETURN(device_create_file(dev, &dev_attr_name));
602 CHECK_RETURN(device_create_file(dev, &dev_attr_bank));
603 CHECK_RETURN(device_create_file(dev, &dev_attr_dump));
604 CHECK_RETURN(device_create_file(dev, &dev_attr_active));
605 CHECK_RETURN(device_create_file(dev, &dev_attr_guitar));
606#ifdef CONFIG_LINE6_USB_RAW
607 CHECK_RETURN(device_create_file(dev, &dev_attr_raw));
608 CHECK_RETURN(device_create_file(dev, &dev_attr_raw2));
609#endif
610 return 0;
611}
612
613/*
614 Try to init workbench device. 186 Try to init workbench device.
615*/ 187*/
616static int variax_try_init(struct usb_interface *interface, 188static int variax_try_init(struct usb_interface *interface,
@@ -620,36 +192,12 @@ static int variax_try_init(struct usb_interface *interface,
620 192
621 init_timer(&variax->startup_timer1); 193 init_timer(&variax->startup_timer1);
622 init_timer(&variax->startup_timer2); 194 init_timer(&variax->startup_timer2);
623 INIT_WORK(&variax->startup_work, variax_startup7); 195 INIT_WORK(&variax->startup_work, variax_startup6);
624 196
625 if ((interface == NULL) || (variax == NULL)) 197 if ((interface == NULL) || (variax == NULL))
626 return -ENODEV; 198 return -ENODEV;
627 199
628 /* initialize USB buffers: */ 200 /* initialize USB buffers: */
629 err = line6_dumpreq_init(&variax->dumpreq, variax_request_model1,
630 sizeof(variax_request_model1));
631
632 if (err < 0) {
633 dev_err(&interface->dev, "Out of memory\n");
634 return err;
635 }
636
637 err = line6_dumpreq_initbuf(&variax->dumpreq, variax_request_model2,
638 sizeof(variax_request_model2), 1);
639
640 if (err < 0) {
641 dev_err(&interface->dev, "Out of memory\n");
642 return err;
643 }
644
645 err = line6_dumpreq_initbuf(&variax->dumpreq, variax_request_bank,
646 sizeof(variax_request_bank), 2);
647
648 if (err < 0) {
649 dev_err(&interface->dev, "Out of memory\n");
650 return err;
651 }
652
653 variax->buffer_activate = kmemdup(variax_activate, 201 variax->buffer_activate = kmemdup(variax_activate,
654 sizeof(variax_activate), GFP_KERNEL); 202 sizeof(variax_activate), GFP_KERNEL);
655 203
@@ -692,28 +240,8 @@ int line6_variax_init(struct usb_interface *interface,
692*/ 240*/
693void line6_variax_disconnect(struct usb_interface *interface) 241void line6_variax_disconnect(struct usb_interface *interface)
694{ 242{
695 struct device *dev;
696
697 if (interface == NULL) 243 if (interface == NULL)
698 return; 244 return;
699 dev = &interface->dev;
700
701 if (dev != NULL) {
702 /* remove sysfs entries: */
703 line6_variax_remove_files(0, 0, dev);
704 device_remove_file(dev, &dev_attr_model);
705 device_remove_file(dev, &dev_attr_volume);
706 device_remove_file(dev, &dev_attr_tone);
707 device_remove_file(dev, &dev_attr_name);
708 device_remove_file(dev, &dev_attr_bank);
709 device_remove_file(dev, &dev_attr_dump);
710 device_remove_file(dev, &dev_attr_active);
711 device_remove_file(dev, &dev_attr_guitar);
712#ifdef CONFIG_LINE6_USB_RAW
713 device_remove_file(dev, &dev_attr_raw);
714 device_remove_file(dev, &dev_attr_raw2);
715#endif
716 }
717 245
718 variax_destruct(interface); 246 variax_destruct(interface);
719} 247}
diff --git a/drivers/staging/line6/variax.h b/drivers/staging/line6/variax.h
index e2999ab41b08..24de79620d89 100644
--- a/drivers/staging/line6/variax.h
+++ b/drivers/staging/line6/variax.h
@@ -18,7 +18,6 @@
18#include <sound/core.h> 18#include <sound/core.h>
19 19
20#include "driver.h" 20#include "driver.h"
21#include "dumprequest.h"
22 21
23#define VARIAX_STARTUP_DELAY1 1000 22#define VARIAX_STARTUP_DELAY1 1000
24#define VARIAX_STARTUP_DELAY3 100 23#define VARIAX_STARTUP_DELAY3 100
@@ -32,33 +31,11 @@ enum {
32 VARIAX_STARTUP_VERSIONREQ, 31 VARIAX_STARTUP_VERSIONREQ,
33 VARIAX_STARTUP_WAIT, 32 VARIAX_STARTUP_WAIT,
34 VARIAX_STARTUP_ACTIVATE, 33 VARIAX_STARTUP_ACTIVATE,
35 VARIAX_STARTUP_DUMPREQ,
36 VARIAX_STARTUP_WORKQUEUE, 34 VARIAX_STARTUP_WORKQUEUE,
37 VARIAX_STARTUP_SETUP, 35 VARIAX_STARTUP_SETUP,
38 VARIAX_STARTUP_LAST = VARIAX_STARTUP_SETUP - 1 36 VARIAX_STARTUP_LAST = VARIAX_STARTUP_SETUP - 1
39}; 37};
40 38
41enum {
42 VARIAX_DUMP_PASS1 = LINE6_DUMP_CURRENT,
43 VARIAX_DUMP_PASS2,
44 VARIAX_DUMP_PASS3
45};
46
47/**
48 Binary Variax model dump
49*/
50struct variax_model {
51 /**
52 Header information (including program name).
53 */
54 unsigned char name[18];
55
56 /**
57 Model parameters.
58 */
59 unsigned char control[78 * 2];
60};
61
62struct usb_line6_variax { 39struct usb_line6_variax {
63 /** 40 /**
64 Generic Line6 USB data. 41 Generic Line6 USB data.
@@ -66,48 +43,11 @@ struct usb_line6_variax {
66 struct usb_line6 line6; 43 struct usb_line6 line6;
67 44
68 /** 45 /**
69 Dump request structure.
70 Append two extra buffers for 3-pass data query.
71 */
72 struct line6_dump_request dumpreq;
73 struct line6_dump_reqbuf extrabuf[2];
74
75 /**
76 Buffer for activation code. 46 Buffer for activation code.
77 */ 47 */
78 unsigned char *buffer_activate; 48 unsigned char *buffer_activate;
79 49
80 /** 50 /**
81 Model number.
82 */
83 int model;
84
85 /**
86 Current model settings.
87 */
88 struct variax_model model_data;
89
90 /**
91 Name of connected guitar.
92 */
93 unsigned char guitar[18];
94
95 /**
96 Name of current model bank.
97 */
98 unsigned char bank[18];
99
100 /**
101 Position of volume dial.
102 */
103 int volume;
104
105 /**
106 Position of tone control dial.
107 */
108 int tone;
109
110 /**
111 Handler for device initializaton. 51 Handler for device initializaton.
112 */ 52 */
113 struct work_struct startup_work; 53 struct work_struct startup_work;
diff --git a/drivers/staging/media/dt3155v4l/dt3155v4l.c b/drivers/staging/media/dt3155v4l/dt3155v4l.c
index 2e7b711c8501..238910373f5c 100644
--- a/drivers/staging/media/dt3155v4l/dt3155v4l.c
+++ b/drivers/staging/media/dt3155v4l/dt3155v4l.c
@@ -718,7 +718,7 @@ static const struct v4l2_ioctl_ops dt3155_ioctl_ops = {
718*/ 718*/
719}; 719};
720 720
721static int __devinit 721static int
722dt3155_init_board(struct pci_dev *pdev) 722dt3155_init_board(struct pci_dev *pdev)
723{ 723{
724 struct dt3155_priv *pd = pci_get_drvdata(pdev); 724 struct dt3155_priv *pd = pci_get_drvdata(pdev);
@@ -836,7 +836,7 @@ struct dma_coherent_mem {
836 unsigned long *bitmap; 836 unsigned long *bitmap;
837}; 837};
838 838
839static int __devinit 839static int
840dt3155_alloc_coherent(struct device *dev, size_t size, int flags) 840dt3155_alloc_coherent(struct device *dev, size_t size, int flags)
841{ 841{
842 struct dma_coherent_mem *mem; 842 struct dma_coherent_mem *mem;
@@ -877,7 +877,7 @@ out:
877 return 0; 877 return 0;
878} 878}
879 879
880static void __devexit 880static void
881dt3155_free_coherent(struct device *dev) 881dt3155_free_coherent(struct device *dev)
882{ 882{
883 struct dma_coherent_mem *mem = dev->dma_mem; 883 struct dma_coherent_mem *mem = dev->dma_mem;
@@ -891,7 +891,7 @@ dt3155_free_coherent(struct device *dev)
891 kfree(mem); 891 kfree(mem);
892} 892}
893 893
894static int __devinit 894static int
895dt3155_probe(struct pci_dev *pdev, const struct pci_device_id *id) 895dt3155_probe(struct pci_dev *pdev, const struct pci_device_id *id)
896{ 896{
897 int err; 897 int err;
@@ -956,7 +956,7 @@ err_video_device_alloc:
956 return err; 956 return err;
957} 957}
958 958
959static void __devexit 959static void
960dt3155_remove(struct pci_dev *pdev) 960dt3155_remove(struct pci_dev *pdev)
961{ 961{
962 struct dt3155_priv *pd = pci_get_drvdata(pdev); 962 struct dt3155_priv *pd = pci_get_drvdata(pdev);
@@ -983,7 +983,7 @@ static struct pci_driver pci_driver = {
983 .name = DT3155_NAME, 983 .name = DT3155_NAME,
984 .id_table = pci_ids, 984 .id_table = pci_ids,
985 .probe = dt3155_probe, 985 .probe = dt3155_probe,
986 .remove = __devexit_p(dt3155_remove), 986 .remove = dt3155_remove,
987}; 987};
988 988
989module_pci_driver(pci_driver); 989module_pci_driver(pci_driver);
diff --git a/drivers/staging/media/lirc/lirc_parallel.c b/drivers/staging/media/lirc/lirc_parallel.c
index dd2bca7b56fa..ec14bc81851b 100644
--- a/drivers/staging/media/lirc/lirc_parallel.c
+++ b/drivers/staging/media/lirc/lirc_parallel.c
@@ -583,12 +583,12 @@ static struct lirc_driver driver = {
583 583
584static struct platform_device *lirc_parallel_dev; 584static struct platform_device *lirc_parallel_dev;
585 585
586static int __devinit lirc_parallel_probe(struct platform_device *dev) 586static int lirc_parallel_probe(struct platform_device *dev)
587{ 587{
588 return 0; 588 return 0;
589} 589}
590 590
591static int __devexit lirc_parallel_remove(struct platform_device *dev) 591static int lirc_parallel_remove(struct platform_device *dev)
592{ 592{
593 return 0; 593 return 0;
594} 594}
@@ -606,7 +606,7 @@ static int lirc_parallel_resume(struct platform_device *dev)
606 606
607static struct platform_driver lirc_parallel_driver = { 607static struct platform_driver lirc_parallel_driver = {
608 .probe = lirc_parallel_probe, 608 .probe = lirc_parallel_probe,
609 .remove = __devexit_p(lirc_parallel_remove), 609 .remove = lirc_parallel_remove,
610 .suspend = lirc_parallel_suspend, 610 .suspend = lirc_parallel_suspend,
611 .resume = lirc_parallel_resume, 611 .resume = lirc_parallel_resume,
612 .driver = { 612 .driver = {
diff --git a/drivers/staging/media/lirc/lirc_serial.c b/drivers/staging/media/lirc/lirc_serial.c
index 97ef67036e3f..71e3bf2937f9 100644
--- a/drivers/staging/media/lirc/lirc_serial.c
+++ b/drivers/staging/media/lirc/lirc_serial.c
@@ -841,7 +841,7 @@ static int hardware_init_port(void)
841 return 0; 841 return 0;
842} 842}
843 843
844static int __devinit lirc_serial_probe(struct platform_device *dev) 844static int lirc_serial_probe(struct platform_device *dev)
845{ 845{
846 int i, nlow, nhigh, result; 846 int i, nlow, nhigh, result;
847 847
@@ -927,7 +927,7 @@ exit_free_irq:
927 return result; 927 return result;
928} 928}
929 929
930static int __devexit lirc_serial_remove(struct platform_device *dev) 930static int lirc_serial_remove(struct platform_device *dev)
931{ 931{
932 free_irq(irq, (void *)&hardware); 932 free_irq(irq, (void *)&hardware);
933 933
@@ -1148,7 +1148,7 @@ static int lirc_serial_resume(struct platform_device *dev)
1148 1148
1149static struct platform_driver lirc_serial_driver = { 1149static struct platform_driver lirc_serial_driver = {
1150 .probe = lirc_serial_probe, 1150 .probe = lirc_serial_probe,
1151 .remove = __devexit_p(lirc_serial_remove), 1151 .remove = lirc_serial_remove,
1152 .suspend = lirc_serial_suspend, 1152 .suspend = lirc_serial_suspend,
1153 .resume = lirc_serial_resume, 1153 .resume = lirc_serial_resume,
1154 .driver = { 1154 .driver = {
diff --git a/drivers/staging/media/lirc/lirc_sir.c b/drivers/staging/media/lirc/lirc_sir.c
index 4afc3b419738..a45799874a21 100644
--- a/drivers/staging/media/lirc/lirc_sir.c
+++ b/drivers/staging/media/lirc/lirc_sir.c
@@ -1218,19 +1218,19 @@ static int init_lirc_sir(void)
1218 return 0; 1218 return 0;
1219} 1219}
1220 1220
1221static int __devinit lirc_sir_probe(struct platform_device *dev) 1221static int lirc_sir_probe(struct platform_device *dev)
1222{ 1222{
1223 return 0; 1223 return 0;
1224} 1224}
1225 1225
1226static int __devexit lirc_sir_remove(struct platform_device *dev) 1226static int lirc_sir_remove(struct platform_device *dev)
1227{ 1227{
1228 return 0; 1228 return 0;
1229} 1229}
1230 1230
1231static struct platform_driver lirc_sir_driver = { 1231static struct platform_driver lirc_sir_driver = {
1232 .probe = lirc_sir_probe, 1232 .probe = lirc_sir_probe,
1233 .remove = __devexit_p(lirc_sir_remove), 1233 .remove = lirc_sir_remove,
1234 .driver = { 1234 .driver = {
1235 .name = "lirc_sir", 1235 .name = "lirc_sir",
1236 .owner = THIS_MODULE, 1236 .owner = THIS_MODULE,
diff --git a/drivers/staging/media/solo6x10/core.c b/drivers/staging/media/solo6x10/core.c
index 3ee9b125797f..fd83d6d028bf 100644
--- a/drivers/staging/media/solo6x10/core.c
+++ b/drivers/staging/media/solo6x10/core.c
@@ -129,7 +129,7 @@ static void free_solo_dev(struct solo_dev *solo_dev)
129 kfree(solo_dev); 129 kfree(solo_dev);
130} 130}
131 131
132static int __devinit solo_pci_probe(struct pci_dev *pdev, 132static int solo_pci_probe(struct pci_dev *pdev,
133 const struct pci_device_id *id) 133 const struct pci_device_id *id)
134{ 134{
135 struct solo_dev *solo_dev; 135 struct solo_dev *solo_dev;
@@ -284,7 +284,7 @@ fail_probe:
284 return ret; 284 return ret;
285} 285}
286 286
287static void __devexit solo_pci_remove(struct pci_dev *pdev) 287static void solo_pci_remove(struct pci_dev *pdev)
288{ 288{
289 struct solo_dev *solo_dev = pci_get_drvdata(pdev); 289 struct solo_dev *solo_dev = pci_get_drvdata(pdev);
290 290
diff --git a/drivers/staging/net/pc300_drv.c b/drivers/staging/net/pc300_drv.c
index cb0f8d932b0c..7281797ffe9d 100644
--- a/drivers/staging/net/pc300_drv.c
+++ b/drivers/staging/net/pc300_drv.c
@@ -3409,7 +3409,7 @@ static void cpc_init_card(pc300_t * card)
3409 board_nbr++; 3409 board_nbr++;
3410} 3410}
3411 3411
3412static int __devinit 3412static int
3413cpc_init_one(struct pci_dev *pdev, const struct pci_device_id *ent) 3413cpc_init_one(struct pci_dev *pdev, const struct pci_device_id *ent)
3414{ 3414{
3415 int err, eeprom_outdated = 0; 3415 int err, eeprom_outdated = 0;
@@ -3607,7 +3607,7 @@ err_disable_dev:
3607 return err; 3607 return err;
3608} 3608}
3609 3609
3610static void __devexit cpc_remove_one(struct pci_dev *pdev) 3610static void cpc_remove_one(struct pci_dev *pdev)
3611{ 3611{
3612 pc300_t *card = pci_get_drvdata(pdev); 3612 pc300_t *card = pci_get_drvdata(pdev);
3613 3613
@@ -3646,7 +3646,7 @@ static struct pci_driver cpc_driver = {
3646 .name = "pc300", 3646 .name = "pc300",
3647 .id_table = cpc_pci_dev_id, 3647 .id_table = cpc_pci_dev_id,
3648 .probe = cpc_init_one, 3648 .probe = cpc_init_one,
3649 .remove = __devexit_p(cpc_remove_one), 3649 .remove = cpc_remove_one,
3650}; 3650};
3651 3651
3652static int __init cpc_init(void) 3652static int __init cpc_init(void)
diff --git a/drivers/staging/nvec/Kconfig b/drivers/staging/nvec/Kconfig
index 1235a7897d04..f779fdc34279 100644
--- a/drivers/staging/nvec/Kconfig
+++ b/drivers/staging/nvec/Kconfig
@@ -1,6 +1,7 @@
1config MFD_NVEC 1config MFD_NVEC
2 bool "NV Tegra Embedded Controller SMBus Interface" 2 bool "NV Tegra Embedded Controller SMBus Interface"
3 depends on I2C && GPIOLIB && ARCH_TEGRA 3 depends on I2C && GPIOLIB && ARCH_TEGRA
4 select MFD_CORE
4 help 5 help
5 Say Y here to enable support for a nVidia compliant embedded 6 Say Y here to enable support for a nVidia compliant embedded
6 controller. 7 controller.
diff --git a/drivers/staging/nvec/nvec.c b/drivers/staging/nvec/nvec.c
index 094fdc366f30..c59b7b299d37 100644
--- a/drivers/staging/nvec/nvec.c
+++ b/drivers/staging/nvec/nvec.c
@@ -716,7 +716,7 @@ static void nvec_power_off(void)
716 nvec_write_async(nvec_power_handle, "\x04\x01", 2); 716 nvec_write_async(nvec_power_handle, "\x04\x01", 2);
717} 717}
718 718
719static int __devinit tegra_nvec_probe(struct platform_device *pdev) 719static int tegra_nvec_probe(struct platform_device *pdev)
720{ 720{
721 int err, ret; 721 int err, ret;
722 struct clk *i2c_clk; 722 struct clk *i2c_clk;
@@ -853,7 +853,7 @@ static int __devinit tegra_nvec_probe(struct platform_device *pdev)
853 return 0; 853 return 0;
854} 854}
855 855
856static int __devexit tegra_nvec_remove(struct platform_device *pdev) 856static int tegra_nvec_remove(struct platform_device *pdev)
857{ 857{
858 struct nvec_chip *nvec = platform_get_drvdata(pdev); 858 struct nvec_chip *nvec = platform_get_drvdata(pdev);
859 859
@@ -901,7 +901,7 @@ static int nvec_resume(struct device *dev)
901static const SIMPLE_DEV_PM_OPS(nvec_pm_ops, nvec_suspend, nvec_resume); 901static const SIMPLE_DEV_PM_OPS(nvec_pm_ops, nvec_suspend, nvec_resume);
902 902
903/* Match table for of_platform binding */ 903/* Match table for of_platform binding */
904static const struct of_device_id nvidia_nvec_of_match[] __devinitconst = { 904static const struct of_device_id nvidia_nvec_of_match[] = {
905 { .compatible = "nvidia,nvec", }, 905 { .compatible = "nvidia,nvec", },
906 {}, 906 {},
907}; 907};
@@ -909,7 +909,7 @@ MODULE_DEVICE_TABLE(of, nvidia_nvec_of_match);
909 909
910static struct platform_driver nvec_device_driver = { 910static struct platform_driver nvec_device_driver = {
911 .probe = tegra_nvec_probe, 911 .probe = tegra_nvec_probe,
912 .remove = __devexit_p(tegra_nvec_remove), 912 .remove = tegra_nvec_remove,
913 .driver = { 913 .driver = {
914 .name = "nvec", 914 .name = "nvec",
915 .owner = THIS_MODULE, 915 .owner = THIS_MODULE,
diff --git a/drivers/staging/nvec/nvec_kbd.c b/drivers/staging/nvec/nvec_kbd.c
index 6cc30dcd8306..7cb149bf3d3f 100644
--- a/drivers/staging/nvec/nvec_kbd.c
+++ b/drivers/staging/nvec/nvec_kbd.c
@@ -100,7 +100,7 @@ static int nvec_kbd_event(struct input_dev *dev, unsigned int type,
100 return 0; 100 return 0;
101} 101}
102 102
103static int __devinit nvec_kbd_probe(struct platform_device *pdev) 103static int nvec_kbd_probe(struct platform_device *pdev)
104{ 104{
105 struct nvec_chip *nvec = dev_get_drvdata(pdev->dev.parent); 105 struct nvec_chip *nvec = dev_get_drvdata(pdev->dev.parent);
106 int i, j, err; 106 int i, j, err;
@@ -159,7 +159,7 @@ fail:
159 return err; 159 return err;
160} 160}
161 161
162static int __devexit nvec_kbd_remove(struct platform_device *pdev) 162static int nvec_kbd_remove(struct platform_device *pdev)
163{ 163{
164 input_unregister_device(keys_dev.input); 164 input_unregister_device(keys_dev.input);
165 input_free_device(keys_dev.input); 165 input_free_device(keys_dev.input);
@@ -169,7 +169,7 @@ static int __devexit nvec_kbd_remove(struct platform_device *pdev)
169 169
170static struct platform_driver nvec_kbd_driver = { 170static struct platform_driver nvec_kbd_driver = {
171 .probe = nvec_kbd_probe, 171 .probe = nvec_kbd_probe,
172 .remove = __devexit_p(nvec_kbd_remove), 172 .remove = nvec_kbd_remove,
173 .driver = { 173 .driver = {
174 .name = "nvec-kbd", 174 .name = "nvec-kbd",
175 .owner = THIS_MODULE, 175 .owner = THIS_MODULE,
diff --git a/drivers/staging/nvec/nvec_paz00.c b/drivers/staging/nvec/nvec_paz00.c
index b747e39ff94d..934b796222a2 100644
--- a/drivers/staging/nvec/nvec_paz00.c
+++ b/drivers/staging/nvec/nvec_paz00.c
@@ -43,7 +43,7 @@ static void nvec_led_brightness_set(struct led_classdev *led_cdev,
43 43
44} 44}
45 45
46static int __devinit nvec_paz00_probe(struct platform_device *pdev) 46static int nvec_paz00_probe(struct platform_device *pdev)
47{ 47{
48 struct nvec_chip *nvec = dev_get_drvdata(pdev->dev.parent); 48 struct nvec_chip *nvec = dev_get_drvdata(pdev->dev.parent);
49 struct nvec_led *led; 49 struct nvec_led *led;
@@ -72,7 +72,7 @@ static int __devinit nvec_paz00_probe(struct platform_device *pdev)
72 return 0; 72 return 0;
73} 73}
74 74
75static int __devexit nvec_paz00_remove(struct platform_device *pdev) 75static int nvec_paz00_remove(struct platform_device *pdev)
76{ 76{
77 struct nvec_led *led = platform_get_drvdata(pdev); 77 struct nvec_led *led = platform_get_drvdata(pdev);
78 78
@@ -83,7 +83,7 @@ static int __devexit nvec_paz00_remove(struct platform_device *pdev)
83 83
84static struct platform_driver nvec_paz00_driver = { 84static struct platform_driver nvec_paz00_driver = {
85 .probe = nvec_paz00_probe, 85 .probe = nvec_paz00_probe,
86 .remove = __devexit_p(nvec_paz00_remove), 86 .remove = nvec_paz00_remove,
87 .driver = { 87 .driver = {
88 .name = "nvec-paz00", 88 .name = "nvec-paz00",
89 .owner = THIS_MODULE, 89 .owner = THIS_MODULE,
diff --git a/drivers/staging/nvec/nvec_power.c b/drivers/staging/nvec/nvec_power.c
index cc8ccd75e7f4..b7b6d54f58ec 100644
--- a/drivers/staging/nvec/nvec_power.c
+++ b/drivers/staging/nvec/nvec_power.c
@@ -368,7 +368,7 @@ static void nvec_power_poll(struct work_struct *work)
368 schedule_delayed_work(to_delayed_work(work), msecs_to_jiffies(5000)); 368 schedule_delayed_work(to_delayed_work(work), msecs_to_jiffies(5000));
369}; 369};
370 370
371static int __devinit nvec_power_probe(struct platform_device *pdev) 371static int nvec_power_probe(struct platform_device *pdev)
372{ 372{
373 struct power_supply *psy; 373 struct power_supply *psy;
374 struct nvec_power *power; 374 struct nvec_power *power;
@@ -407,7 +407,7 @@ static int __devinit nvec_power_probe(struct platform_device *pdev)
407 return power_supply_register(&pdev->dev, psy); 407 return power_supply_register(&pdev->dev, psy);
408} 408}
409 409
410static int __devexit nvec_power_remove(struct platform_device *pdev) 410static int nvec_power_remove(struct platform_device *pdev)
411{ 411{
412 struct nvec_power *power = platform_get_drvdata(pdev); 412 struct nvec_power *power = platform_get_drvdata(pdev);
413 413
@@ -425,7 +425,7 @@ static int __devexit nvec_power_remove(struct platform_device *pdev)
425 425
426static struct platform_driver nvec_power_driver = { 426static struct platform_driver nvec_power_driver = {
427 .probe = nvec_power_probe, 427 .probe = nvec_power_probe,
428 .remove = __devexit_p(nvec_power_remove), 428 .remove = nvec_power_remove,
429 .driver = { 429 .driver = {
430 .name = "nvec-power", 430 .name = "nvec-power",
431 .owner = THIS_MODULE, 431 .owner = THIS_MODULE,
diff --git a/drivers/staging/nvec/nvec_ps2.c b/drivers/staging/nvec/nvec_ps2.c
index d7c651102131..88dd288bf3d7 100644
--- a/drivers/staging/nvec/nvec_ps2.c
+++ b/drivers/staging/nvec/nvec_ps2.c
@@ -93,7 +93,7 @@ static int nvec_ps2_notifier(struct notifier_block *nb,
93 return NOTIFY_DONE; 93 return NOTIFY_DONE;
94} 94}
95 95
96static int __devinit nvec_mouse_probe(struct platform_device *pdev) 96static int nvec_mouse_probe(struct platform_device *pdev)
97{ 97{
98 struct nvec_chip *nvec = dev_get_drvdata(pdev->dev.parent); 98 struct nvec_chip *nvec = dev_get_drvdata(pdev->dev.parent);
99 struct serio *ser_dev; 99 struct serio *ser_dev;
@@ -123,7 +123,7 @@ static int __devinit nvec_mouse_probe(struct platform_device *pdev)
123 return 0; 123 return 0;
124} 124}
125 125
126static int __devexit nvec_mouse_remove(struct platform_device *pdev) 126static int nvec_mouse_remove(struct platform_device *pdev)
127{ 127{
128 serio_unregister_port(ps2_dev.ser_dev); 128 serio_unregister_port(ps2_dev.ser_dev);
129 129
@@ -164,7 +164,7 @@ static const SIMPLE_DEV_PM_OPS(nvec_mouse_pm_ops, nvec_mouse_suspend,
164 164
165static struct platform_driver nvec_mouse_driver = { 165static struct platform_driver nvec_mouse_driver = {
166 .probe = nvec_mouse_probe, 166 .probe = nvec_mouse_probe,
167 .remove = __devexit_p(nvec_mouse_remove), 167 .remove = nvec_mouse_remove,
168 .driver = { 168 .driver = {
169 .name = "nvec-mouse", 169 .name = "nvec-mouse",
170 .owner = THIS_MODULE, 170 .owner = THIS_MODULE,
diff --git a/drivers/staging/octeon/ethernet.c b/drivers/staging/octeon/ethernet.c
index 683bedc74dde..ef32dc1bbc80 100644
--- a/drivers/staging/octeon/ethernet.c
+++ b/drivers/staging/octeon/ethernet.c
@@ -169,7 +169,7 @@ static void cvm_oct_periodic_worker(struct work_struct *work)
169 queue_delayed_work(cvm_oct_poll_queue, &priv->port_periodic_work, HZ); 169 queue_delayed_work(cvm_oct_poll_queue, &priv->port_periodic_work, HZ);
170 } 170 }
171 171
172static __devinit void cvm_oct_configure_common_hw(void) 172static void cvm_oct_configure_common_hw(void)
173{ 173{
174 /* Setup the FPA */ 174 /* Setup the FPA */
175 cvmx_fpa_enable(); 175 cvmx_fpa_enable();
@@ -586,7 +586,7 @@ static const struct net_device_ops cvm_oct_pow_netdev_ops = {
586 586
587extern void octeon_mdiobus_force_mod_depencency(void); 587extern void octeon_mdiobus_force_mod_depencency(void);
588 588
589static struct device_node * __devinit cvm_oct_of_get_child(const struct device_node *parent, 589static struct device_node *cvm_oct_of_get_child(const struct device_node *parent,
590 int reg_val) 590 int reg_val)
591{ 591{
592 struct device_node *node = NULL; 592 struct device_node *node = NULL;
@@ -604,7 +604,7 @@ static struct device_node * __devinit cvm_oct_of_get_child(const struct device_n
604 return node; 604 return node;
605} 605}
606 606
607static struct device_node * __devinit cvm_oct_node_for_port(struct device_node *pip, 607static struct device_node *cvm_oct_node_for_port(struct device_node *pip,
608 int interface, int port) 608 int interface, int port)
609{ 609{
610 struct device_node *ni, *np; 610 struct device_node *ni, *np;
@@ -619,7 +619,7 @@ static struct device_node * __devinit cvm_oct_node_for_port(struct device_node *
619 return np; 619 return np;
620} 620}
621 621
622static int __devinit cvm_oct_probe(struct platform_device *pdev) 622static int cvm_oct_probe(struct platform_device *pdev)
623{ 623{
624 int num_interfaces; 624 int num_interfaces;
625 int interface; 625 int interface;
@@ -813,7 +813,7 @@ static int __devinit cvm_oct_probe(struct platform_device *pdev)
813 return 0; 813 return 0;
814} 814}
815 815
816static int __devexit cvm_oct_remove(struct platform_device *pdev) 816static int cvm_oct_remove(struct platform_device *pdev)
817{ 817{
818 int port; 818 int port;
819 819
@@ -874,7 +874,7 @@ MODULE_DEVICE_TABLE(of, cvm_oct_match);
874 874
875static struct platform_driver cvm_oct_driver = { 875static struct platform_driver cvm_oct_driver = {
876 .probe = cvm_oct_probe, 876 .probe = cvm_oct_probe,
877 .remove = __devexit_p(cvm_oct_remove), 877 .remove = cvm_oct_remove,
878 .driver = { 878 .driver = {
879 .owner = THIS_MODULE, 879 .owner = THIS_MODULE,
880 .name = KBUILD_MODNAME, 880 .name = KBUILD_MODNAME,
diff --git a/drivers/staging/olpc_dcon/olpc_dcon.c b/drivers/staging/olpc_dcon/olpc_dcon.c
index d49c32a95690..54ed6f69e3d4 100644
--- a/drivers/staging/olpc_dcon/olpc_dcon.c
+++ b/drivers/staging/olpc_dcon/olpc_dcon.c
@@ -39,10 +39,6 @@
39static ushort resumeline = 898; 39static ushort resumeline = 898;
40module_param(resumeline, ushort, 0444); 40module_param(resumeline, ushort, 0444);
41 41
42/* Default off since it doesn't work on DCON ASIC in B-test OLPC board */
43static int useaa = 1;
44module_param(useaa, int, 0444);
45
46static struct dcon_platform_data *pdata; 42static struct dcon_platform_data *pdata;
47 43
48/* I2C structures */ 44/* I2C structures */
@@ -50,8 +46,6 @@ static struct dcon_platform_data *pdata;
50/* Platform devices */ 46/* Platform devices */
51static struct platform_device *dcon_device; 47static struct platform_device *dcon_device;
52 48
53static DECLARE_WAIT_QUEUE_HEAD(dcon_wait_queue);
54
55static unsigned short normal_i2c[] = { 0x0d, I2C_CLIENT_END }; 49static unsigned short normal_i2c[] = { 0x0d, I2C_CLIENT_END };
56 50
57static s32 dcon_write(struct dcon_priv *dcon, u8 reg, u16 val) 51static s32 dcon_write(struct dcon_priv *dcon, u8 reg, u16 val)
@@ -103,9 +97,7 @@ static int dcon_hw_init(struct dcon_priv *dcon, int is_init)
103 /* Colour swizzle, AA, no passthrough, backlight */ 97 /* Colour swizzle, AA, no passthrough, backlight */
104 if (is_init) { 98 if (is_init) {
105 dcon->disp_mode = MODE_PASSTHRU | MODE_BL_ENABLE | 99 dcon->disp_mode = MODE_PASSTHRU | MODE_BL_ENABLE |
106 MODE_CSWIZZLE; 100 MODE_CSWIZZLE | MODE_COL_AA;
107 if (useaa)
108 dcon->disp_mode |= MODE_COL_AA;
109 } 101 }
110 dcon_write(dcon, DCON_REG_MODE, dcon->disp_mode); 102 dcon_write(dcon, DCON_REG_MODE, dcon->disp_mode);
111 103
@@ -191,9 +183,7 @@ static int dcon_set_mono_mode(struct dcon_priv *dcon, bool enable_mono)
191 dcon->disp_mode |= MODE_MONO_LUMA; 183 dcon->disp_mode |= MODE_MONO_LUMA;
192 } else { 184 } else {
193 dcon->disp_mode &= ~(MODE_MONO_LUMA); 185 dcon->disp_mode &= ~(MODE_MONO_LUMA);
194 dcon->disp_mode |= MODE_CSWIZZLE; 186 dcon->disp_mode |= MODE_CSWIZZLE | MODE_COL_AA;
195 if (useaa)
196 dcon->disp_mode |= MODE_COL_AA;
197 } 187 }
198 188
199 dcon_write(dcon, DCON_REG_MODE, dcon->disp_mode); 189 dcon_write(dcon, DCON_REG_MODE, dcon->disp_mode);
@@ -288,7 +278,6 @@ static void dcon_source_switch(struct work_struct *work)
288{ 278{
289 struct dcon_priv *dcon = container_of(work, struct dcon_priv, 279 struct dcon_priv *dcon = container_of(work, struct dcon_priv,
290 switch_source); 280 switch_source);
291 DECLARE_WAITQUEUE(wait, current);
292 int source = dcon->pending_src; 281 int source = dcon->pending_src;
293 282
294 if (dcon->curr_src == source) 283 if (dcon->curr_src == source)
@@ -305,11 +294,9 @@ static void dcon_source_switch(struct work_struct *work)
305 if (dcon_write(dcon, DCON_REG_MODE, 294 if (dcon_write(dcon, DCON_REG_MODE,
306 dcon->disp_mode | MODE_SCAN_INT)) 295 dcon->disp_mode | MODE_SCAN_INT))
307 pr_err("couldn't enable scanline interrupt!\n"); 296 pr_err("couldn't enable scanline interrupt!\n");
308 else { 297 else
309 /* Wait up to one second for the scanline interrupt */ 298 /* Wait up to one second for the scanline interrupt */
310 wait_event_timeout(dcon_wait_queue, 299 wait_event_timeout(dcon->waitq, dcon->switched, HZ);
311 dcon->switched == true, HZ);
312 }
313 300
314 if (!dcon->switched) 301 if (!dcon->switched)
315 pr_err("Timeout entering CPU mode; expect a screen glitch.\n"); 302 pr_err("Timeout entering CPU mode; expect a screen glitch.\n");
@@ -340,21 +327,15 @@ static void dcon_source_switch(struct work_struct *work)
340 break; 327 break;
341 case DCON_SOURCE_DCON: 328 case DCON_SOURCE_DCON:
342 { 329 {
343 int t;
344 struct timespec delta_t; 330 struct timespec delta_t;
345 331
346 pr_info("dcon_source_switch to DCON\n"); 332 pr_info("dcon_source_switch to DCON\n");
347 333
348 add_wait_queue(&dcon_wait_queue, &wait);
349 set_current_state(TASK_UNINTERRUPTIBLE);
350
351 /* Clear DCONLOAD - this implies that the DCON is in control */ 334 /* Clear DCONLOAD - this implies that the DCON is in control */
352 pdata->set_dconload(0); 335 pdata->set_dconload(0);
353 getnstimeofday(&dcon->load_time); 336 getnstimeofday(&dcon->load_time);
354 337
355 t = schedule_timeout(HZ/2); 338 wait_event_timeout(dcon->waitq, dcon->switched, HZ/2);
356 remove_wait_queue(&dcon_wait_queue, &wait);
357 set_current_state(TASK_RUNNING);
358 339
359 if (!dcon->switched) { 340 if (!dcon->switched) {
360 pr_err("Timeout entering DCON mode; expect a screen glitch.\n"); 341 pr_err("Timeout entering DCON mode; expect a screen glitch.\n");
@@ -539,6 +520,10 @@ static int dcon_bl_update(struct backlight_device *dev)
539 if (level != dcon->bl_val) 520 if (level != dcon->bl_val)
540 dcon_set_backlight(dcon, level); 521 dcon_set_backlight(dcon, level);
541 522
523 /* power down the DCON when the screen is blanked */
524 if (!dcon->ignore_fb_events)
525 dcon_sleep(dcon, !!(dev->props.state & BL_CORE_FBBLANK));
526
542 return 0; 527 return 0;
543} 528}
544 529
@@ -584,24 +569,6 @@ static struct notifier_block dcon_panic_nb = {
584 .notifier_call = unfreeze_on_panic, 569 .notifier_call = unfreeze_on_panic,
585}; 570};
586 571
587/*
588 * When the framebuffer sleeps due to external sources (e.g. user idle), power
589 * down the DCON as well. Power it back up when the fb comes back to life.
590 */
591static int dcon_fb_notifier(struct notifier_block *self,
592 unsigned long event, void *data)
593{
594 struct fb_event *evdata = data;
595 struct dcon_priv *dcon = container_of(self, struct dcon_priv,
596 fbevent_nb);
597 int *blank = (int *)evdata->data;
598 if (((event != FB_EVENT_BLANK) && (event != FB_EVENT_CONBLANK)) ||
599 dcon->ignore_fb_events)
600 return 0;
601 dcon_sleep(dcon, *blank ? true : false);
602 return 0;
603}
604
605static int dcon_detect(struct i2c_client *client, struct i2c_board_info *info) 572static int dcon_detect(struct i2c_client *client, struct i2c_board_info *info)
606{ 573{
607 strlcpy(info->type, "olpc_dcon", I2C_NAME_SIZE); 574 strlcpy(info->type, "olpc_dcon", I2C_NAME_SIZE);
@@ -622,10 +589,10 @@ static int dcon_probe(struct i2c_client *client, const struct i2c_device_id *id)
622 return -ENOMEM; 589 return -ENOMEM;
623 590
624 dcon->client = client; 591 dcon->client = client;
592 init_waitqueue_head(&dcon->waitq);
625 INIT_WORK(&dcon->switch_source, dcon_source_switch); 593 INIT_WORK(&dcon->switch_source, dcon_source_switch);
626 dcon->reboot_nb.notifier_call = dcon_reboot_notify; 594 dcon->reboot_nb.notifier_call = dcon_reboot_notify;
627 dcon->reboot_nb.priority = -1; 595 dcon->reboot_nb.priority = -1;
628 dcon->fbevent_nb.notifier_call = dcon_fb_notifier;
629 596
630 i2c_set_clientdata(client, dcon); 597 i2c_set_clientdata(client, dcon);
631 598
@@ -680,7 +647,6 @@ static int dcon_probe(struct i2c_client *client, const struct i2c_device_id *id)
680 647
681 register_reboot_notifier(&dcon->reboot_nb); 648 register_reboot_notifier(&dcon->reboot_nb);
682 atomic_notifier_chain_register(&panic_notifier_list, &dcon_panic_nb); 649 atomic_notifier_chain_register(&panic_notifier_list, &dcon_panic_nb);
683 fb_register_client(&dcon->fbevent_nb);
684 650
685 return 0; 651 return 0;
686 652
@@ -701,7 +667,6 @@ static int dcon_remove(struct i2c_client *client)
701{ 667{
702 struct dcon_priv *dcon = i2c_get_clientdata(client); 668 struct dcon_priv *dcon = i2c_get_clientdata(client);
703 669
704 fb_unregister_client(&dcon->fbevent_nb);
705 unregister_reboot_notifier(&dcon->reboot_nb); 670 unregister_reboot_notifier(&dcon->reboot_nb);
706 atomic_notifier_chain_unregister(&panic_notifier_list, &dcon_panic_nb); 671 atomic_notifier_chain_unregister(&panic_notifier_list, &dcon_panic_nb);
707 672
@@ -720,8 +685,9 @@ static int dcon_remove(struct i2c_client *client)
720} 685}
721 686
722#ifdef CONFIG_PM 687#ifdef CONFIG_PM
723static int dcon_suspend(struct i2c_client *client, pm_message_t state) 688static int dcon_suspend(struct device *dev)
724{ 689{
690 struct i2c_client *client = to_i2c_client(dev);
725 struct dcon_priv *dcon = i2c_get_clientdata(client); 691 struct dcon_priv *dcon = i2c_get_clientdata(client);
726 692
727 if (!dcon->asleep) { 693 if (!dcon->asleep) {
@@ -732,8 +698,9 @@ static int dcon_suspend(struct i2c_client *client, pm_message_t state)
732 return 0; 698 return 0;
733} 699}
734 700
735static int dcon_resume(struct i2c_client *client) 701static int dcon_resume(struct device *dev)
736{ 702{
703 struct i2c_client *client = to_i2c_client(dev);
737 struct dcon_priv *dcon = i2c_get_clientdata(client); 704 struct dcon_priv *dcon = i2c_get_clientdata(client);
738 705
739 if (!dcon->asleep) { 706 if (!dcon->asleep) {
@@ -744,7 +711,12 @@ static int dcon_resume(struct i2c_client *client)
744 return 0; 711 return 0;
745} 712}
746 713
747#endif 714#else
715
716#define dcon_suspend NULL
717#define dcon_resume NULL
718
719#endif /* CONFIG_PM */
748 720
749 721
750irqreturn_t dcon_interrupt(int irq, void *id) 722irqreturn_t dcon_interrupt(int irq, void *id)
@@ -764,7 +736,7 @@ irqreturn_t dcon_interrupt(int irq, void *id)
764 case 1: /* switch to CPU mode */ 736 case 1: /* switch to CPU mode */
765 dcon->switched = true; 737 dcon->switched = true;
766 getnstimeofday(&dcon->irq_time); 738 getnstimeofday(&dcon->irq_time);
767 wake_up(&dcon_wait_queue); 739 wake_up(&dcon->waitq);
768 break; 740 break;
769 741
770 case 0: 742 case 0:
@@ -778,7 +750,7 @@ irqreturn_t dcon_interrupt(int irq, void *id)
778 if (dcon->curr_src != dcon->pending_src && !dcon->switched) { 750 if (dcon->curr_src != dcon->pending_src && !dcon->switched) {
779 dcon->switched = true; 751 dcon->switched = true;
780 getnstimeofday(&dcon->irq_time); 752 getnstimeofday(&dcon->irq_time);
781 wake_up(&dcon_wait_queue); 753 wake_up(&dcon->waitq);
782 pr_debug("switching w/ status 0/0\n"); 754 pr_debug("switching w/ status 0/0\n");
783 } else { 755 } else {
784 pr_debug("scanline interrupt w/CPU\n"); 756 pr_debug("scanline interrupt w/CPU\n");
@@ -788,27 +760,28 @@ irqreturn_t dcon_interrupt(int irq, void *id)
788 return IRQ_HANDLED; 760 return IRQ_HANDLED;
789} 761}
790 762
763static const struct dev_pm_ops dcon_pm_ops = {
764 .suspend = dcon_suspend,
765 .resume = dcon_resume,
766};
767
791static const struct i2c_device_id dcon_idtable[] = { 768static const struct i2c_device_id dcon_idtable[] = {
792 { "olpc_dcon", 0 }, 769 { "olpc_dcon", 0 },
793 { } 770 { }
794}; 771};
795
796MODULE_DEVICE_TABLE(i2c, dcon_idtable); 772MODULE_DEVICE_TABLE(i2c, dcon_idtable);
797 773
798struct i2c_driver dcon_driver = { 774struct i2c_driver dcon_driver = {
799 .driver = { 775 .driver = {
800 .name = "olpc_dcon", 776 .name = "olpc_dcon",
777 .pm = &dcon_pm_ops,
801 }, 778 },
802 .class = I2C_CLASS_DDC | I2C_CLASS_HWMON, 779 .class = I2C_CLASS_DDC | I2C_CLASS_HWMON,
803 .id_table = dcon_idtable, 780 .id_table = dcon_idtable,
804 .probe = dcon_probe, 781 .probe = dcon_probe,
805 .remove = __devexit_p(dcon_remove), 782 .remove = dcon_remove,
806 .detect = dcon_detect, 783 .detect = dcon_detect,
807 .address_list = normal_i2c, 784 .address_list = normal_i2c,
808#ifdef CONFIG_PM
809 .suspend = dcon_suspend,
810 .resume = dcon_resume,
811#endif
812}; 785};
813 786
814static int __init olpc_dcon_init(void) 787static int __init olpc_dcon_init(void)
diff --git a/drivers/staging/olpc_dcon/olpc_dcon.h b/drivers/staging/olpc_dcon/olpc_dcon.h
index 167a41778be6..997bded2949f 100644
--- a/drivers/staging/olpc_dcon/olpc_dcon.h
+++ b/drivers/staging/olpc_dcon/olpc_dcon.h
@@ -52,9 +52,9 @@ struct dcon_priv {
52 struct fb_info *fbinfo; 52 struct fb_info *fbinfo;
53 struct backlight_device *bl_dev; 53 struct backlight_device *bl_dev;
54 54
55 wait_queue_head_t waitq;
55 struct work_struct switch_source; 56 struct work_struct switch_source;
56 struct notifier_block reboot_nb; 57 struct notifier_block reboot_nb;
57 struct notifier_block fbevent_nb;
58 58
59 /* Shadow register for the DCON_REG_MODE register */ 59 /* Shadow register for the DCON_REG_MODE register */
60 u8 disp_mode; 60 u8 disp_mode;
diff --git a/drivers/staging/olpc_dcon/olpc_dcon_xo_1_5.c b/drivers/staging/olpc_dcon/olpc_dcon_xo_1_5.c
index 352dd3db0132..6a4d379c16a3 100644
--- a/drivers/staging/olpc_dcon/olpc_dcon_xo_1_5.c
+++ b/drivers/staging/olpc_dcon/olpc_dcon_xo_1_5.c
@@ -10,7 +10,6 @@
10 10
11#include <linux/acpi.h> 11#include <linux/acpi.h>
12#include <linux/delay.h> 12#include <linux/delay.h>
13#include <linux/pci.h>
14#include <linux/gpio.h> 13#include <linux/gpio.h>
15#include <asm/olpc.h> 14#include <asm/olpc.h>
16 15
@@ -62,33 +61,6 @@ static int dcon_was_irq(void)
62static int dcon_init_xo_1_5(struct dcon_priv *dcon) 61static int dcon_init_xo_1_5(struct dcon_priv *dcon)
63{ 62{
64 unsigned int irq; 63 unsigned int irq;
65 u_int8_t tmp;
66 struct pci_dev *pdev;
67
68 pdev = pci_get_device(PCI_VENDOR_ID_VIA,
69 PCI_DEVICE_ID_VIA_VX855, NULL);
70 if (!pdev) {
71 pr_err("cannot find VX855 PCI ID\n");
72 return 1;
73 }
74
75 pci_read_config_byte(pdev, 0x95, &tmp);
76 pci_write_config_byte(pdev, 0x95, tmp|0x0c);
77
78 /* Set GPIO8 to GPIO mode, not SSPICLK */
79 pci_read_config_byte(pdev, 0xe3, &tmp);
80 pci_write_config_byte(pdev, 0xe3, tmp | 0x04);
81
82 /* Set GPI10/GPI11 to GPI mode, not SSPISDI/SSPISS */
83 pci_read_config_byte(pdev, 0xe4, &tmp);
84 pci_write_config_byte(pdev, 0xe4, tmp|0x08);
85
86 /* clear PMU_RxE1[6] to select SCI on GPIO12 */
87 /* clear PMU_RxE0[6] to choose falling edge */
88 pci_read_config_byte(pdev, 0xe1, &tmp);
89 pci_write_config_byte(pdev, 0xe1, tmp & ~BIT_GPIO12);
90 pci_read_config_byte(pdev, 0xe0, &tmp);
91 pci_write_config_byte(pdev, 0xe0, tmp & ~BIT_GPIO12);
92 64
93 dcon_clear_irq(); 65 dcon_clear_irq();
94 66
@@ -101,8 +73,6 @@ static int dcon_init_xo_1_5(struct dcon_priv *dcon)
101 DCON_SOURCE_CPU : DCON_SOURCE_DCON; 73 DCON_SOURCE_CPU : DCON_SOURCE_DCON;
102 dcon->pending_src = dcon->curr_src; 74 dcon->pending_src = dcon->curr_src;
103 75
104 pci_dev_put(pdev);
105
106 /* we're sharing the IRQ with ACPI */ 76 /* we're sharing the IRQ with ACPI */
107 irq = acpi_gbl_FADT.sci_interrupt; 77 irq = acpi_gbl_FADT.sci_interrupt;
108 if (request_irq(irq, &dcon_interrupt, IRQF_SHARED, "DCON", dcon)) { 78 if (request_irq(irq, &dcon_interrupt, IRQF_SHARED, "DCON", dcon)) {
diff --git a/drivers/staging/omap-thermal/omap-bandgap.c b/drivers/staging/omap-thermal/omap-bandgap.c
index 368a2e19b2d4..8346e3450f83 100644
--- a/drivers/staging/omap-thermal/omap-bandgap.c
+++ b/drivers/staging/omap-thermal/omap-bandgap.c
@@ -38,6 +38,7 @@
38#include <linux/of_device.h> 38#include <linux/of_device.h>
39#include <linux/of_platform.h> 39#include <linux/of_platform.h>
40#include <linux/of_irq.h> 40#include <linux/of_irq.h>
41#include <linux/io.h>
41 42
42#include "omap-bandgap.h" 43#include "omap-bandgap.h"
43 44
@@ -112,6 +113,11 @@ static irqreturn_t talert_irq_handler(int irq, void *data)
112 113
113 omap_bandgap_writel(bg_ptr, ctrl, tsr->bgap_mask_ctrl); 114 omap_bandgap_writel(bg_ptr, ctrl, tsr->bgap_mask_ctrl);
114 115
116 dev_dbg(bg_ptr->dev,
117 "%s: IRQ from %s sensor: hotevent %d coldevent %d\n",
118 __func__, bg_ptr->conf->sensors[i].domain,
119 t_hot, t_cold);
120
115 /* read temperature */ 121 /* read temperature */
116 temp = omap_bandgap_readl(bg_ptr, tsr->temp_sensor_ctrl); 122 temp = omap_bandgap_readl(bg_ptr, tsr->temp_sensor_ctrl);
117 temp &= tsr->bgap_dtemp_mask; 123 temp &= tsr->bgap_dtemp_mask;
@@ -843,7 +849,7 @@ static struct omap_bandgap *omap_bandgap_build(struct platform_device *pdev)
843} 849}
844 850
845static 851static
846int __devinit omap_bandgap_probe(struct platform_device *pdev) 852int omap_bandgap_probe(struct platform_device *pdev)
847{ 853{
848 struct omap_bandgap *bg_ptr; 854 struct omap_bandgap *bg_ptr;
849 int clk_rate, ret = 0, i; 855 int clk_rate, ret = 0, i;
@@ -992,7 +998,7 @@ free_irqs:
992} 998}
993 999
994static 1000static
995int __devexit omap_bandgap_remove(struct platform_device *pdev) 1001int omap_bandgap_remove(struct platform_device *pdev)
996{ 1002{
997 struct omap_bandgap *bg_ptr = platform_get_drvdata(pdev); 1003 struct omap_bandgap *bg_ptr = platform_get_drvdata(pdev);
998 int i; 1004 int i;
@@ -1059,7 +1065,6 @@ static int omap_bandgap_save_ctxt(struct omap_bandgap *bg_ptr)
1059static int omap_bandgap_restore_ctxt(struct omap_bandgap *bg_ptr) 1065static int omap_bandgap_restore_ctxt(struct omap_bandgap *bg_ptr)
1060{ 1066{
1061 int i; 1067 int i;
1062 u32 temp = 0;
1063 1068
1064 for (i = 0; i < bg_ptr->conf->sensor_count; i++) { 1069 for (i = 0; i < bg_ptr->conf->sensor_count; i++) {
1065 struct temp_sensor_registers *tsr; 1070 struct temp_sensor_registers *tsr;
@@ -1072,41 +1077,27 @@ static int omap_bandgap_restore_ctxt(struct omap_bandgap *bg_ptr)
1072 if (OMAP_BANDGAP_HAS(bg_ptr, COUNTER)) 1077 if (OMAP_BANDGAP_HAS(bg_ptr, COUNTER))
1073 val = omap_bandgap_readl(bg_ptr, tsr->bgap_counter); 1078 val = omap_bandgap_readl(bg_ptr, tsr->bgap_counter);
1074 1079
1075 if (val == 0) { 1080 if (OMAP_BANDGAP_HAS(bg_ptr, TSHUT_CONFIG))
1076 if (OMAP_BANDGAP_HAS(bg_ptr, TSHUT_CONFIG)) 1081 omap_bandgap_writel(bg_ptr,
1077 omap_bandgap_writel(bg_ptr, 1082 rval->tshut_threshold,
1078 rval->tshut_threshold, 1083 tsr->tshut_threshold);
1079 tsr->tshut_threshold); 1084 /* Force immediate temperature measurement and update
1080 /* Force immediate temperature measurement and update 1085 * of the DTEMP field
1081 * of the DTEMP field 1086 */
1082 */ 1087 omap_bandgap_force_single_read(bg_ptr, i);
1083 omap_bandgap_force_single_read(bg_ptr, i); 1088
1084 1089 if (OMAP_BANDGAP_HAS(bg_ptr, COUNTER))
1085 if (OMAP_BANDGAP_HAS(bg_ptr, COUNTER)) 1090 omap_bandgap_writel(bg_ptr, rval->bg_counter,
1086 omap_bandgap_writel(bg_ptr, rval->bg_counter, 1091 tsr->bgap_counter);
1087 tsr->bgap_counter); 1092 if (OMAP_BANDGAP_HAS(bg_ptr, MODE_CONFIG))
1088 if (OMAP_BANDGAP_HAS(bg_ptr, MODE_CONFIG)) 1093 omap_bandgap_writel(bg_ptr, rval->bg_mode_ctrl,
1089 omap_bandgap_writel(bg_ptr, rval->bg_mode_ctrl, 1094 tsr->bgap_mode_ctrl);
1090 tsr->bgap_mode_ctrl); 1095 if (OMAP_BANDGAP_HAS(bg_ptr, TALERT)) {
1091 if (OMAP_BANDGAP_HAS(bg_ptr, TALERT)) { 1096 omap_bandgap_writel(bg_ptr,
1092 omap_bandgap_writel(bg_ptr, 1097 rval->bg_threshold,
1093 rval->bg_threshold, 1098 tsr->bgap_threshold);
1094 tsr->bgap_threshold); 1099 omap_bandgap_writel(bg_ptr, rval->bg_ctrl,
1095 omap_bandgap_writel(bg_ptr, rval->bg_ctrl, 1100 tsr->bgap_mask_ctrl);
1096 tsr->bgap_mask_ctrl);
1097 }
1098 } else {
1099 temp = omap_bandgap_readl(bg_ptr,
1100 tsr->temp_sensor_ctrl);
1101 temp &= (tsr->bgap_dtemp_mask);
1102 omap_bandgap_force_single_read(bg_ptr, i);
1103 if (temp == 0 && OMAP_BANDGAP_HAS(bg_ptr, TALERT)) {
1104 temp = omap_bandgap_readl(bg_ptr,
1105 tsr->bgap_mask_ctrl);
1106 temp |= 1 << __ffs(tsr->mode_ctrl_mask);
1107 omap_bandgap_writel(bg_ptr, temp,
1108 tsr->bgap_mask_ctrl);
1109 }
1110 } 1101 }
1111 } 1102 }
1112 1103
diff --git a/drivers/staging/omap-thermal/omap-bandgap.h b/drivers/staging/omap-thermal/omap-bandgap.h
index 78aed7535f47..2bb14bd7c6d9 100644
--- a/drivers/staging/omap-thermal/omap-bandgap.h
+++ b/drivers/staging/omap-thermal/omap-bandgap.h
@@ -336,14 +336,6 @@ struct temp_sensor_regval {
336}; 336};
337 337
338/** 338/**
339 * struct thermal_cooling_conf - description on how to cool a thermal zone
340 * @freq_clip_count: size of freq_data
341 */
342struct thermal_cooling_conf {
343 int freq_clip_count;
344};
345
346/**
347 * struct omap_temp_sensor - bandgap temperature sensor platform data 339 * struct omap_temp_sensor - bandgap temperature sensor platform data
348 * @ts_data: pointer to struct with thresholds, limits of temperature sensor 340 * @ts_data: pointer to struct with thresholds, limits of temperature sensor
349 * @registers: pointer to the list of register offsets and bitfields 341 * @registers: pointer to the list of register offsets and bitfields
@@ -365,7 +357,6 @@ struct omap_temp_sensor {
365 struct temp_sensor_registers *registers; 357 struct temp_sensor_registers *registers;
366 struct temp_sensor_regval regval; 358 struct temp_sensor_regval regval;
367 char *domain; 359 char *domain;
368 struct thermal_cooling_conf cooling_data;
369 /* for hotspot extrapolation */ 360 /* for hotspot extrapolation */
370 const int slope; 361 const int slope;
371 const int constant; 362 const int constant;
diff --git a/drivers/staging/omap-thermal/omap-thermal-common.c b/drivers/staging/omap-thermal/omap-thermal-common.c
index 5c0c203b887f..15e9723ba4d6 100644
--- a/drivers/staging/omap-thermal/omap-thermal-common.c
+++ b/drivers/staging/omap-thermal/omap-thermal-common.c
@@ -29,6 +29,7 @@
29#include <linux/workqueue.h> 29#include <linux/workqueue.h>
30#include <linux/thermal.h> 30#include <linux/thermal.h>
31#include <linux/cpufreq.h> 31#include <linux/cpufreq.h>
32#include <linux/cpumask.h>
32#include <linux/cpu_cooling.h> 33#include <linux/cpu_cooling.h>
33 34
34#include "omap-thermal.h" 35#include "omap-thermal.h"
@@ -112,7 +113,7 @@ static int omap_thermal_bind(struct thermal_zone_device *thermal,
112 struct thermal_cooling_device *cdev) 113 struct thermal_cooling_device *cdev)
113{ 114{
114 struct omap_thermal_data *data = thermal->devdata; 115 struct omap_thermal_data *data = thermal->devdata;
115 int max, id; 116 int id;
116 117
117 if (IS_ERR_OR_NULL(data)) 118 if (IS_ERR_OR_NULL(data))
118 return -ENODEV; 119 return -ENODEV;
@@ -122,7 +123,6 @@ static int omap_thermal_bind(struct thermal_zone_device *thermal,
122 return 0; 123 return 0;
123 124
124 id = data->sensor_id; 125 id = data->sensor_id;
125 max = data->bg_ptr->conf->sensors[id].cooling_data.freq_clip_count;
126 126
127 /* TODO: bind with min and max states */ 127 /* TODO: bind with min and max states */
128 /* Simple thing, two trips, one passive another critical */ 128 /* Simple thing, two trips, one passive another critical */
@@ -256,12 +256,12 @@ static struct omap_thermal_data
256int omap_thermal_expose_sensor(struct omap_bandgap *bg_ptr, int id, 256int omap_thermal_expose_sensor(struct omap_bandgap *bg_ptr, int id,
257 char *domain) 257 char *domain)
258{ 258{
259 struct omap_thermal_pdata pdata; 259 struct omap_thermal_data *data;
260 260
261 data = omap_bandgap_get_sensor_data(bg_ptr, id); 261 data = omap_bandgap_get_sensor_data(bg_ptr, id);
262 262
263 if (!data) 263 if (!data)
264 data = omap_thermal_build_pdata(bg_ptr, id); 264 data = omap_thermal_build_data(bg_ptr, id);
265 265
266 if (!data) 266 if (!data)
267 return -EINVAL; 267 return -EINVAL;
@@ -304,81 +304,24 @@ int omap_thermal_report_sensor_temperature(struct omap_bandgap *bg_ptr, int id)
304 return 0; 304 return 0;
305} 305}
306 306
307static int omap_thermal_build_cpufreq_clip(struct omap_bandgap *bg_ptr,
308 struct freq_clip_table **tab_ptr,
309 int *tab_size)
310{
311 struct cpufreq_frequency_table *freq_table;
312 struct freq_clip_table *tab;
313 int i, count = 0;
314
315 freq_table = cpufreq_frequency_get_table(0);
316 if (IS_ERR_OR_NULL(freq_table)) {
317 dev_err(bg_ptr->dev,
318 "%s: failed to get cpufreq table (%p)\n",
319 __func__, freq_table);
320 return -EINVAL;
321 }
322
323 for (i = 0; freq_table[i].frequency != CPUFREQ_TABLE_END; i++) {
324 unsigned int freq = freq_table[i].frequency;
325 if (freq == CPUFREQ_ENTRY_INVALID)
326 continue;
327 count++;
328 }
329
330 tab = devm_kzalloc(bg_ptr->dev, sizeof(*tab) * count, GFP_KERNEL);
331 if (!tab) {
332 dev_err(bg_ptr->dev,
333 "%s: no memory available\n", __func__);
334 return -ENOMEM;
335 }
336
337 for (i = 0; freq_table[i].frequency != CPUFREQ_TABLE_END; i++) {
338 unsigned int freq = freq_table[i].frequency;
339
340 if (freq == CPUFREQ_ENTRY_INVALID)
341 continue;
342
343 tab[count - i - 1].freq_clip_max = freq;
344 tab[count - i - 1].temp_level = OMAP_TRIP_HOT;
345 tab[count - i - 1].mask_val = cpumask_of(0);
346 }
347
348 *tab_ptr = tab;
349 *tab_size = count;
350
351 return 0;
352}
353
354int omap_thermal_register_cpu_cooling(struct omap_bandgap *bg_ptr, int id) 307int omap_thermal_register_cpu_cooling(struct omap_bandgap *bg_ptr, int id)
355{ 308{
356 struct omap_thermal_data *data; 309 struct omap_thermal_data *data;
357 struct freq_clip_table *tab_ptr;
358 int tab_size, ret;
359 310
360 data = omap_bandgap_get_sensor_data(bg_ptr, id); 311 data = omap_bandgap_get_sensor_data(bg_ptr, id);
361 if (!data) 312 if (!data)
362 data = omap_thermal_build_pdata(bg_ptr, id); 313 data = omap_thermal_build_data(bg_ptr, id);
363 314
364 if (!data) 315 if (!data)
365 return -EINVAL; 316 return -EINVAL;
366 317
367 ret = omap_thermal_build_cpufreq_clip(bg_ptr, &tab_ptr, &tab_size);
368 if (ret < 0) {
369 dev_err(bg_ptr->dev,
370 "%s: failed to build cpufreq clip table\n", __func__);
371 return ret;
372 }
373
374 /* Register cooling device */ 318 /* Register cooling device */
375 data->cool_dev = cpufreq_cooling_register(tab_ptr, tab_size); 319 data->cool_dev = cpufreq_cooling_register(cpu_present_mask);
376 if (IS_ERR_OR_NULL(data->cool_dev)) { 320 if (IS_ERR_OR_NULL(data->cool_dev)) {
377 dev_err(bg_ptr->dev, 321 dev_err(bg_ptr->dev,
378 "Failed to register cpufreq cooling device\n"); 322 "Failed to register cpufreq cooling device\n");
379 return PTR_ERR(data->cool_dev); 323 return PTR_ERR(data->cool_dev);
380 } 324 }
381 bg_ptr->conf->sensors[id].cooling_data.freq_clip_count = tab_size;
382 omap_bandgap_set_sensor_data(bg_ptr, id, data); 325 omap_bandgap_set_sensor_data(bg_ptr, id, data);
383 326
384 return 0; 327 return 0;
diff --git a/drivers/staging/omapdrm/Kconfig b/drivers/staging/omapdrm/Kconfig
index 81a7cba4a0c5..b724a4131435 100644
--- a/drivers/staging/omapdrm/Kconfig
+++ b/drivers/staging/omapdrm/Kconfig
@@ -2,7 +2,7 @@
2config DRM_OMAP 2config DRM_OMAP
3 tristate "OMAP DRM" 3 tristate "OMAP DRM"
4 depends on DRM && !CONFIG_FB_OMAP2 4 depends on DRM && !CONFIG_FB_OMAP2
5 depends on ARCH_OMAP2PLUS 5 depends on ARCH_OMAP2PLUS || ARCH_MULTIPLATFORM
6 select DRM_KMS_HELPER 6 select DRM_KMS_HELPER
7 select OMAP2_DSS 7 select OMAP2_DSS
8 select FB_SYS_FILLRECT 8 select FB_SYS_FILLRECT
diff --git a/drivers/staging/omapdrm/omap_connector.c b/drivers/staging/omapdrm/omap_connector.c
index 38be186c249a..91edb3f96972 100644
--- a/drivers/staging/omapdrm/omap_connector.c
+++ b/drivers/staging/omapdrm/omap_connector.c
@@ -146,11 +146,10 @@ enum drm_connector_status omap_connector_detect(
146 enum drm_connector_status ret; 146 enum drm_connector_status ret;
147 147
148 if (dssdrv->detect) { 148 if (dssdrv->detect) {
149 if (dssdrv->detect(dssdev)) { 149 if (dssdrv->detect(dssdev))
150 ret = connector_status_connected; 150 ret = connector_status_connected;
151 } else { 151 else
152 ret = connector_status_disconnected; 152 ret = connector_status_disconnected;
153 }
154 } else { 153 } else {
155 ret = connector_status_unknown; 154 ret = connector_status_unknown;
156 } 155 }
@@ -383,9 +382,8 @@ struct drm_connector *omap_connector_init(struct drm_device *dev,
383 return connector; 382 return connector;
384 383
385fail: 384fail:
386 if (connector) { 385 if (connector)
387 omap_connector_destroy(connector); 386 omap_connector_destroy(connector);
388 }
389 387
390 return NULL; 388 return NULL;
391} 389}
diff --git a/drivers/staging/omapdrm/omap_crtc.c b/drivers/staging/omapdrm/omap_crtc.c
index 732f2ad34036..d87bd84257bd 100644
--- a/drivers/staging/omapdrm/omap_crtc.c
+++ b/drivers/staging/omapdrm/omap_crtc.c
@@ -19,7 +19,7 @@
19 19
20#include "omap_drv.h" 20#include "omap_drv.h"
21 21
22#include "drm_mode.h" 22#include <drm/drm_mode.h>
23#include "drm_crtc.h" 23#include "drm_crtc.h"
24#include "drm_crtc_helper.h" 24#include "drm_crtc_helper.h"
25 25
@@ -114,7 +114,7 @@ static void omap_crtc_load_lut(struct drm_crtc *crtc)
114 114
115static void vblank_cb(void *arg) 115static void vblank_cb(void *arg)
116{ 116{
117 static uint32_t sequence = 0; 117 static uint32_t sequence;
118 struct drm_crtc *crtc = arg; 118 struct drm_crtc *crtc = arg;
119 struct drm_device *dev = crtc->dev; 119 struct drm_device *dev = crtc->dev;
120 struct omap_crtc *omap_crtc = to_omap_crtc(crtc); 120 struct omap_crtc *omap_crtc = to_omap_crtc(crtc);
@@ -263,8 +263,8 @@ struct drm_crtc *omap_crtc_init(struct drm_device *dev,
263 return crtc; 263 return crtc;
264 264
265fail: 265fail:
266 if (crtc) { 266 if (crtc)
267 omap_crtc_destroy(crtc); 267 omap_crtc_destroy(crtc);
268 } 268
269 return NULL; 269 return NULL;
270} 270}
diff --git a/drivers/staging/omapdrm/omap_dmm_priv.h b/drivers/staging/omapdrm/omap_dmm_priv.h
index 08b22e9f0ed7..273ec12c028a 100644
--- a/drivers/staging/omapdrm/omap_dmm_priv.h
+++ b/drivers/staging/omapdrm/omap_dmm_priv.h
@@ -141,8 +141,7 @@ struct refill_engine {
141 /* only one trans per engine for now */ 141 /* only one trans per engine for now */
142 struct dmm_txn txn; 142 struct dmm_txn txn;
143 143
144 /* offset to lut associated with container */ 144 bool async;
145 u32 *lut_offset;
146 145
147 wait_queue_head_t wait_for_refill; 146 wait_queue_head_t wait_for_refill;
148 147
@@ -161,10 +160,11 @@ struct dmm {
161 dma_addr_t refill_pa; 160 dma_addr_t refill_pa;
162 161
163 /* refill engines */ 162 /* refill engines */
164 struct semaphore engine_sem; 163 wait_queue_head_t engine_queue;
165 struct list_head idle_head; 164 struct list_head idle_head;
166 struct refill_engine *engines; 165 struct refill_engine *engines;
167 int num_engines; 166 int num_engines;
167 atomic_t engine_counter;
168 168
169 /* container information */ 169 /* container information */
170 int container_width; 170 int container_width;
@@ -176,9 +176,6 @@ struct dmm {
176 /* array of LUT - TCM containers */ 176 /* array of LUT - TCM containers */
177 struct tcm **tcm; 177 struct tcm **tcm;
178 178
179 /* LUT table storage */
180 u32 *lut;
181
182 /* allocation list and lock */ 179 /* allocation list and lock */
183 struct list_head alloc_head; 180 struct list_head alloc_head;
184}; 181};
diff --git a/drivers/staging/omapdrm/omap_dmm_tiler.c b/drivers/staging/omapdrm/omap_dmm_tiler.c
index 3ae39554df18..59bf43899fc0 100644
--- a/drivers/staging/omapdrm/omap_dmm_tiler.c
+++ b/drivers/staging/omapdrm/omap_dmm_tiler.c
@@ -29,7 +29,6 @@
29#include <linux/mm.h> 29#include <linux/mm.h>
30#include <linux/time.h> 30#include <linux/time.h>
31#include <linux/list.h> 31#include <linux/list.h>
32#include <linux/semaphore.h>
33 32
34#include "omap_dmm_tiler.h" 33#include "omap_dmm_tiler.h"
35#include "omap_dmm_priv.h" 34#include "omap_dmm_priv.h"
@@ -120,6 +119,18 @@ static int wait_status(struct refill_engine *engine, uint32_t wait_mask)
120 return 0; 119 return 0;
121} 120}
122 121
122static void release_engine(struct refill_engine *engine)
123{
124 unsigned long flags;
125
126 spin_lock_irqsave(&list_lock, flags);
127 list_add(&engine->idle_node, &omap_dmm->idle_head);
128 spin_unlock_irqrestore(&list_lock, flags);
129
130 atomic_inc(&omap_dmm->engine_counter);
131 wake_up_interruptible(&omap_dmm->engine_queue);
132}
133
123static irqreturn_t omap_dmm_irq_handler(int irq, void *arg) 134static irqreturn_t omap_dmm_irq_handler(int irq, void *arg)
124{ 135{
125 struct dmm *dmm = arg; 136 struct dmm *dmm = arg;
@@ -130,9 +141,13 @@ static irqreturn_t omap_dmm_irq_handler(int irq, void *arg)
130 writel(status, dmm->base + DMM_PAT_IRQSTATUS); 141 writel(status, dmm->base + DMM_PAT_IRQSTATUS);
131 142
132 for (i = 0; i < dmm->num_engines; i++) { 143 for (i = 0; i < dmm->num_engines; i++) {
133 if (status & DMM_IRQSTAT_LST) 144 if (status & DMM_IRQSTAT_LST) {
134 wake_up_interruptible(&dmm->engines[i].wait_for_refill); 145 wake_up_interruptible(&dmm->engines[i].wait_for_refill);
135 146
147 if (dmm->engines[i].async)
148 release_engine(&dmm->engines[i]);
149 }
150
136 status >>= 8; 151 status >>= 8;
137 } 152 }
138 153
@@ -146,17 +161,24 @@ static struct dmm_txn *dmm_txn_init(struct dmm *dmm, struct tcm *tcm)
146{ 161{
147 struct dmm_txn *txn = NULL; 162 struct dmm_txn *txn = NULL;
148 struct refill_engine *engine = NULL; 163 struct refill_engine *engine = NULL;
164 int ret;
165 unsigned long flags;
149 166
150 down(&dmm->engine_sem); 167
168 /* wait until an engine is available */
169 ret = wait_event_interruptible(omap_dmm->engine_queue,
170 atomic_add_unless(&omap_dmm->engine_counter, -1, 0));
171 if (ret)
172 return ERR_PTR(ret);
151 173
152 /* grab an idle engine */ 174 /* grab an idle engine */
153 spin_lock(&list_lock); 175 spin_lock_irqsave(&list_lock, flags);
154 if (!list_empty(&dmm->idle_head)) { 176 if (!list_empty(&dmm->idle_head)) {
155 engine = list_entry(dmm->idle_head.next, struct refill_engine, 177 engine = list_entry(dmm->idle_head.next, struct refill_engine,
156 idle_node); 178 idle_node);
157 list_del(&engine->idle_node); 179 list_del(&engine->idle_node);
158 } 180 }
159 spin_unlock(&list_lock); 181 spin_unlock_irqrestore(&list_lock, flags);
160 182
161 BUG_ON(!engine); 183 BUG_ON(!engine);
162 184
@@ -174,7 +196,7 @@ static struct dmm_txn *dmm_txn_init(struct dmm *dmm, struct tcm *tcm)
174 * Add region to DMM transaction. If pages or pages[i] is NULL, then the 196 * Add region to DMM transaction. If pages or pages[i] is NULL, then the
175 * corresponding slot is cleared (ie. dummy_pa is programmed) 197 * corresponding slot is cleared (ie. dummy_pa is programmed)
176 */ 198 */
177static int dmm_txn_append(struct dmm_txn *txn, struct pat_area *area, 199static void dmm_txn_append(struct dmm_txn *txn, struct pat_area *area,
178 struct page **pages, uint32_t npages, uint32_t roll) 200 struct page **pages, uint32_t npages, uint32_t roll)
179{ 201{
180 dma_addr_t pat_pa = 0; 202 dma_addr_t pat_pa = 0;
@@ -184,9 +206,6 @@ static int dmm_txn_append(struct dmm_txn *txn, struct pat_area *area,
184 int columns = (1 + area->x1 - area->x0); 206 int columns = (1 + area->x1 - area->x0);
185 int rows = (1 + area->y1 - area->y0); 207 int rows = (1 + area->y1 - area->y0);
186 int i = columns*rows; 208 int i = columns*rows;
187 u32 *lut = omap_dmm->lut + (engine->tcm->lut_id * omap_dmm->lut_width *
188 omap_dmm->lut_height) +
189 (area->y0 * omap_dmm->lut_width) + area->x0;
190 209
191 pat = alloc_dma(txn, sizeof(struct pat), &pat_pa); 210 pat = alloc_dma(txn, sizeof(struct pat), &pat_pa);
192 211
@@ -209,13 +228,9 @@ static int dmm_txn_append(struct dmm_txn *txn, struct pat_area *area,
209 page_to_phys(pages[n]) : engine->dmm->dummy_pa; 228 page_to_phys(pages[n]) : engine->dmm->dummy_pa;
210 } 229 }
211 230
212 /* fill in lut with new addresses */
213 for (i = 0; i < rows; i++, lut += omap_dmm->lut_width)
214 memcpy(lut, &data[i*columns], columns * sizeof(u32));
215
216 txn->last_pat = pat; 231 txn->last_pat = pat;
217 232
218 return 0; 233 return;
219} 234}
220 235
221/** 236/**
@@ -245,6 +260,9 @@ static int dmm_txn_commit(struct dmm_txn *txn, bool wait)
245 goto cleanup; 260 goto cleanup;
246 } 261 }
247 262
263 /* mark whether it is async to denote list management in IRQ handler */
264 engine->async = wait ? false : true;
265
248 /* kick reload */ 266 /* kick reload */
249 writel(engine->refill_pa, 267 writel(engine->refill_pa,
250 dmm->base + reg[PAT_DESCR][engine->id]); 268 dmm->base + reg[PAT_DESCR][engine->id]);
@@ -259,11 +277,10 @@ static int dmm_txn_commit(struct dmm_txn *txn, bool wait)
259 } 277 }
260 278
261cleanup: 279cleanup:
262 spin_lock(&list_lock); 280 /* only place engine back on list if we are done with it */
263 list_add(&engine->idle_node, &dmm->idle_head); 281 if (ret || wait)
264 spin_unlock(&list_lock); 282 release_engine(engine);
265 283
266 up(&omap_dmm->engine_sem);
267 return ret; 284 return ret;
268} 285}
269 286
@@ -279,7 +296,7 @@ static int fill(struct tcm_area *area, struct page **pages,
279 296
280 txn = dmm_txn_init(omap_dmm, area->tcm); 297 txn = dmm_txn_init(omap_dmm, area->tcm);
281 if (IS_ERR_OR_NULL(txn)) 298 if (IS_ERR_OR_NULL(txn))
282 return PTR_ERR(txn); 299 return -ENOMEM;
283 300
284 tcm_for_each_slice(slice, *area, area_s) { 301 tcm_for_each_slice(slice, *area, area_s) {
285 struct pat_area p_area = { 302 struct pat_area p_area = {
@@ -287,16 +304,13 @@ static int fill(struct tcm_area *area, struct page **pages,
287 .x1 = slice.p1.x, .y1 = slice.p1.y, 304 .x1 = slice.p1.x, .y1 = slice.p1.y,
288 }; 305 };
289 306
290 ret = dmm_txn_append(txn, &p_area, pages, npages, roll); 307 dmm_txn_append(txn, &p_area, pages, npages, roll);
291 if (ret)
292 goto fail;
293 308
294 roll += tcm_sizeof(slice); 309 roll += tcm_sizeof(slice);
295 } 310 }
296 311
297 ret = dmm_txn_commit(txn, wait); 312 ret = dmm_txn_commit(txn, wait);
298 313
299fail:
300 return ret; 314 return ret;
301} 315}
302 316
@@ -333,6 +347,7 @@ struct tiler_block *tiler_reserve_2d(enum tiler_fmt fmt, uint16_t w,
333 struct tiler_block *block = kzalloc(sizeof(*block), GFP_KERNEL); 347 struct tiler_block *block = kzalloc(sizeof(*block), GFP_KERNEL);
334 u32 min_align = 128; 348 u32 min_align = 128;
335 int ret; 349 int ret;
350 unsigned long flags;
336 351
337 BUG_ON(!validfmt(fmt)); 352 BUG_ON(!validfmt(fmt));
338 353
@@ -354,9 +369,9 @@ struct tiler_block *tiler_reserve_2d(enum tiler_fmt fmt, uint16_t w,
354 } 369 }
355 370
356 /* add to allocation list */ 371 /* add to allocation list */
357 spin_lock(&list_lock); 372 spin_lock_irqsave(&list_lock, flags);
358 list_add(&block->alloc_node, &omap_dmm->alloc_head); 373 list_add(&block->alloc_node, &omap_dmm->alloc_head);
359 spin_unlock(&list_lock); 374 spin_unlock_irqrestore(&list_lock, flags);
360 375
361 return block; 376 return block;
362} 377}
@@ -365,6 +380,7 @@ struct tiler_block *tiler_reserve_1d(size_t size)
365{ 380{
366 struct tiler_block *block = kzalloc(sizeof(*block), GFP_KERNEL); 381 struct tiler_block *block = kzalloc(sizeof(*block), GFP_KERNEL);
367 int num_pages = (size + PAGE_SIZE - 1) >> PAGE_SHIFT; 382 int num_pages = (size + PAGE_SIZE - 1) >> PAGE_SHIFT;
383 unsigned long flags;
368 384
369 if (!block) 385 if (!block)
370 return ERR_PTR(-ENOMEM); 386 return ERR_PTR(-ENOMEM);
@@ -377,9 +393,9 @@ struct tiler_block *tiler_reserve_1d(size_t size)
377 return ERR_PTR(-ENOMEM); 393 return ERR_PTR(-ENOMEM);
378 } 394 }
379 395
380 spin_lock(&list_lock); 396 spin_lock_irqsave(&list_lock, flags);
381 list_add(&block->alloc_node, &omap_dmm->alloc_head); 397 list_add(&block->alloc_node, &omap_dmm->alloc_head);
382 spin_unlock(&list_lock); 398 spin_unlock_irqrestore(&list_lock, flags);
383 399
384 return block; 400 return block;
385} 401}
@@ -388,13 +404,14 @@ struct tiler_block *tiler_reserve_1d(size_t size)
388int tiler_release(struct tiler_block *block) 404int tiler_release(struct tiler_block *block)
389{ 405{
390 int ret = tcm_free(&block->area); 406 int ret = tcm_free(&block->area);
407 unsigned long flags;
391 408
392 if (block->area.tcm) 409 if (block->area.tcm)
393 dev_err(omap_dmm->dev, "failed to release block\n"); 410 dev_err(omap_dmm->dev, "failed to release block\n");
394 411
395 spin_lock(&list_lock); 412 spin_lock_irqsave(&list_lock, flags);
396 list_del(&block->alloc_node); 413 list_del(&block->alloc_node);
397 spin_unlock(&list_lock); 414 spin_unlock_irqrestore(&list_lock, flags);
398 415
399 kfree(block); 416 kfree(block);
400 return ret; 417 return ret;
@@ -505,7 +522,7 @@ size_t tiler_vsize(enum tiler_fmt fmt, uint16_t w, uint16_t h)
505 return round_up(geom[fmt].cpp * w, PAGE_SIZE) * h; 522 return round_up(geom[fmt].cpp * w, PAGE_SIZE) * h;
506} 523}
507 524
508bool dmm_is_initialized(void) 525bool dmm_is_available(void)
509{ 526{
510 return omap_dmm ? true : false; 527 return omap_dmm ? true : false;
511} 528}
@@ -514,16 +531,17 @@ static int omap_dmm_remove(struct platform_device *dev)
514{ 531{
515 struct tiler_block *block, *_block; 532 struct tiler_block *block, *_block;
516 int i; 533 int i;
534 unsigned long flags;
517 535
518 if (omap_dmm) { 536 if (omap_dmm) {
519 /* free all area regions */ 537 /* free all area regions */
520 spin_lock(&list_lock); 538 spin_lock_irqsave(&list_lock, flags);
521 list_for_each_entry_safe(block, _block, &omap_dmm->alloc_head, 539 list_for_each_entry_safe(block, _block, &omap_dmm->alloc_head,
522 alloc_node) { 540 alloc_node) {
523 list_del(&block->alloc_node); 541 list_del(&block->alloc_node);
524 kfree(block); 542 kfree(block);
525 } 543 }
526 spin_unlock(&list_lock); 544 spin_unlock_irqrestore(&list_lock, flags);
527 545
528 for (i = 0; i < omap_dmm->num_lut; i++) 546 for (i = 0; i < omap_dmm->num_lut; i++)
529 if (omap_dmm->tcm && omap_dmm->tcm[i]) 547 if (omap_dmm->tcm && omap_dmm->tcm[i])
@@ -532,15 +550,13 @@ static int omap_dmm_remove(struct platform_device *dev)
532 550
533 kfree(omap_dmm->engines); 551 kfree(omap_dmm->engines);
534 if (omap_dmm->refill_va) 552 if (omap_dmm->refill_va)
535 dma_free_coherent(omap_dmm->dev, 553 dma_free_writecombine(omap_dmm->dev,
536 REFILL_BUFFER_SIZE * omap_dmm->num_engines, 554 REFILL_BUFFER_SIZE * omap_dmm->num_engines,
537 omap_dmm->refill_va, 555 omap_dmm->refill_va,
538 omap_dmm->refill_pa); 556 omap_dmm->refill_pa);
539 if (omap_dmm->dummy_page) 557 if (omap_dmm->dummy_page)
540 __free_page(omap_dmm->dummy_page); 558 __free_page(omap_dmm->dummy_page);
541 559
542 vfree(omap_dmm->lut);
543
544 if (omap_dmm->irq > 0) 560 if (omap_dmm->irq > 0)
545 free_irq(omap_dmm->irq, omap_dmm); 561 free_irq(omap_dmm->irq, omap_dmm);
546 562
@@ -556,7 +572,7 @@ static int omap_dmm_probe(struct platform_device *dev)
556{ 572{
557 int ret = -EFAULT, i; 573 int ret = -EFAULT, i;
558 struct tcm_area area = {0}; 574 struct tcm_area area = {0};
559 u32 hwinfo, pat_geom, lut_table_size; 575 u32 hwinfo, pat_geom;
560 struct resource *mem; 576 struct resource *mem;
561 577
562 omap_dmm = kzalloc(sizeof(*omap_dmm), GFP_KERNEL); 578 omap_dmm = kzalloc(sizeof(*omap_dmm), GFP_KERNEL);
@@ -569,6 +585,8 @@ static int omap_dmm_probe(struct platform_device *dev)
569 INIT_LIST_HEAD(&omap_dmm->alloc_head); 585 INIT_LIST_HEAD(&omap_dmm->alloc_head);
570 INIT_LIST_HEAD(&omap_dmm->idle_head); 586 INIT_LIST_HEAD(&omap_dmm->idle_head);
571 587
588 init_waitqueue_head(&omap_dmm->engine_queue);
589
572 /* lookup hwmod data - base address and irq */ 590 /* lookup hwmod data - base address and irq */
573 mem = platform_get_resource(dev, IORESOURCE_MEM, 0); 591 mem = platform_get_resource(dev, IORESOURCE_MEM, 0);
574 if (!mem) { 592 if (!mem) {
@@ -597,6 +615,8 @@ static int omap_dmm_probe(struct platform_device *dev)
597 omap_dmm->container_width = 256; 615 omap_dmm->container_width = 256;
598 omap_dmm->container_height = 128; 616 omap_dmm->container_height = 128;
599 617
618 atomic_set(&omap_dmm->engine_counter, omap_dmm->num_engines);
619
600 /* read out actual LUT width and height */ 620 /* read out actual LUT width and height */
601 pat_geom = readl(omap_dmm->base + DMM_PAT_GEOMETRY); 621 pat_geom = readl(omap_dmm->base + DMM_PAT_GEOMETRY);
602 omap_dmm->lut_width = ((pat_geom >> 16) & 0xF) << 5; 622 omap_dmm->lut_width = ((pat_geom >> 16) & 0xF) << 5;
@@ -628,16 +648,6 @@ static int omap_dmm_probe(struct platform_device *dev)
628 */ 648 */
629 writel(0x7e7e7e7e, omap_dmm->base + DMM_PAT_IRQENABLE_SET); 649 writel(0x7e7e7e7e, omap_dmm->base + DMM_PAT_IRQENABLE_SET);
630 650
631 lut_table_size = omap_dmm->lut_width * omap_dmm->lut_height *
632 omap_dmm->num_lut;
633
634 omap_dmm->lut = vmalloc(lut_table_size * sizeof(*omap_dmm->lut));
635 if (!omap_dmm->lut) {
636 dev_err(&dev->dev, "could not allocate lut table\n");
637 ret = -ENOMEM;
638 goto fail;
639 }
640
641 omap_dmm->dummy_page = alloc_page(GFP_KERNEL | __GFP_DMA32); 651 omap_dmm->dummy_page = alloc_page(GFP_KERNEL | __GFP_DMA32);
642 if (!omap_dmm->dummy_page) { 652 if (!omap_dmm->dummy_page) {
643 dev_err(&dev->dev, "could not allocate dummy page\n"); 653 dev_err(&dev->dev, "could not allocate dummy page\n");
@@ -652,7 +662,7 @@ static int omap_dmm_probe(struct platform_device *dev)
652 omap_dmm->dummy_pa = page_to_phys(omap_dmm->dummy_page); 662 omap_dmm->dummy_pa = page_to_phys(omap_dmm->dummy_page);
653 663
654 /* alloc refill memory */ 664 /* alloc refill memory */
655 omap_dmm->refill_va = dma_alloc_coherent(&dev->dev, 665 omap_dmm->refill_va = dma_alloc_writecombine(&dev->dev,
656 REFILL_BUFFER_SIZE * omap_dmm->num_engines, 666 REFILL_BUFFER_SIZE * omap_dmm->num_engines,
657 &omap_dmm->refill_pa, GFP_KERNEL); 667 &omap_dmm->refill_pa, GFP_KERNEL);
658 if (!omap_dmm->refill_va) { 668 if (!omap_dmm->refill_va) {
@@ -670,7 +680,6 @@ static int omap_dmm_probe(struct platform_device *dev)
670 goto fail; 680 goto fail;
671 } 681 }
672 682
673 sema_init(&omap_dmm->engine_sem, omap_dmm->num_engines);
674 for (i = 0; i < omap_dmm->num_engines; i++) { 683 for (i = 0; i < omap_dmm->num_engines; i++) {
675 omap_dmm->engines[i].id = i; 684 omap_dmm->engines[i].id = i;
676 omap_dmm->engines[i].dmm = omap_dmm; 685 omap_dmm->engines[i].dmm = omap_dmm;
@@ -720,9 +729,6 @@ static int omap_dmm_probe(struct platform_device *dev)
720 .p1.y = omap_dmm->container_height - 1, 729 .p1.y = omap_dmm->container_height - 1,
721 }; 730 };
722 731
723 for (i = 0; i < lut_table_size; i++)
724 omap_dmm->lut[i] = omap_dmm->dummy_pa;
725
726 /* initialize all LUTs to dummy page entries */ 732 /* initialize all LUTs to dummy page entries */
727 for (i = 0; i < omap_dmm->num_lut; i++) { 733 for (i = 0; i < omap_dmm->num_lut; i++) {
728 area.tcm = omap_dmm->tcm[i]; 734 area.tcm = omap_dmm->tcm[i];
diff --git a/drivers/staging/omapdrm/omap_dmm_tiler.h b/drivers/staging/omapdrm/omap_dmm_tiler.h
index 740911df5fc3..4fdd61e54bd2 100644
--- a/drivers/staging/omapdrm/omap_dmm_tiler.h
+++ b/drivers/staging/omapdrm/omap_dmm_tiler.h
@@ -16,7 +16,6 @@
16#ifndef OMAP_DMM_TILER_H 16#ifndef OMAP_DMM_TILER_H
17#define OMAP_DMM_TILER_H 17#define OMAP_DMM_TILER_H
18 18
19#include <plat/cpu.h>
20#include "omap_drv.h" 19#include "omap_drv.h"
21#include "tcm.h" 20#include "tcm.h"
22 21
@@ -107,7 +106,7 @@ uint32_t tiler_stride(enum tiler_fmt fmt, uint32_t orient);
107size_t tiler_size(enum tiler_fmt fmt, uint16_t w, uint16_t h); 106size_t tiler_size(enum tiler_fmt fmt, uint16_t w, uint16_t h);
108size_t tiler_vsize(enum tiler_fmt fmt, uint16_t w, uint16_t h); 107size_t tiler_vsize(enum tiler_fmt fmt, uint16_t w, uint16_t h);
109void tiler_align(enum tiler_fmt fmt, uint16_t *w, uint16_t *h); 108void tiler_align(enum tiler_fmt fmt, uint16_t *w, uint16_t *h);
110bool dmm_is_initialized(void); 109bool dmm_is_available(void);
111 110
112extern struct platform_driver omap_dmm_driver; 111extern struct platform_driver omap_dmm_driver;
113 112
@@ -139,9 +138,4 @@ static inline bool validfmt(enum tiler_fmt fmt)
139 } 138 }
140} 139}
141 140
142static inline int dmm_is_available(void)
143{
144 return cpu_is_omap44xx();
145}
146
147#endif 141#endif
diff --git a/drivers/staging/omapdrm/omap_drv.c b/drivers/staging/omapdrm/omap_drv.c
index ebdb0b676737..d4823fd67768 100644
--- a/drivers/staging/omapdrm/omap_drv.c
+++ b/drivers/staging/omapdrm/omap_drv.c
@@ -30,8 +30,6 @@
30#define DRIVER_MINOR 0 30#define DRIVER_MINOR 0
31#define DRIVER_PATCHLEVEL 0 31#define DRIVER_PATCHLEVEL 0
32 32
33struct drm_device *drm_device;
34
35static int num_crtc = CONFIG_DRM_OMAP_NUM_CRTCS; 33static int num_crtc = CONFIG_DRM_OMAP_NUM_CRTCS;
36 34
37MODULE_PARM_DESC(num_crtc, "Number of overlays to use as CRTCs"); 35MODULE_PARM_DESC(num_crtc, "Number of overlays to use as CRTCs");
@@ -53,9 +51,8 @@ static void omap_fb_output_poll_changed(struct drm_device *dev)
53{ 51{
54 struct omap_drm_private *priv = dev->dev_private; 52 struct omap_drm_private *priv = dev->dev_private;
55 DBG("dev=%p", dev); 53 DBG("dev=%p", dev);
56 if (priv->fbdev) { 54 if (priv->fbdev)
57 drm_fb_helper_hotplug_event(priv->fbdev); 55 drm_fb_helper_hotplug_event(priv->fbdev);
58 }
59} 56}
60 57
61static const struct drm_mode_config_funcs omap_mode_config_funcs = { 58static const struct drm_mode_config_funcs omap_mode_config_funcs = {
@@ -87,9 +84,9 @@ static int omap_drm_notifier(struct notifier_block *nb,
87 case OMAP_DSS_HOTPLUG_DISCONNECT: { 84 case OMAP_DSS_HOTPLUG_DISCONNECT: {
88 struct drm_device *dev = drm_device; 85 struct drm_device *dev = drm_device;
89 DBG("hotplug event: evt=%d, dev=%p", evt, dev); 86 DBG("hotplug event: evt=%d, dev=%p", evt, dev);
90 if (dev) { 87 if (dev)
91 drm_sysfs_hotplug_event(dev); 88 drm_sysfs_hotplug_event(dev);
92 } 89
93 return NOTIFY_OK; 90 return NOTIFY_OK;
94 } 91 }
95 default: /* don't care about other events for now */ 92 default: /* don't care about other events for now */
@@ -213,9 +210,9 @@ static int create_crtc(struct drm_device *dev, struct omap_overlay *ovl,
213 struct drm_encoder *encoder = 210 struct drm_encoder *encoder =
214 omap_connector_attached_encoder( 211 omap_connector_attached_encoder(
215 priv->connectors[*j]); 212 priv->connectors[*j]);
216 if (encoder) { 213 if (encoder)
217 mgr = omap_encoder_get_manager(encoder); 214 mgr = omap_encoder_get_manager(encoder);
218 } 215
219 } 216 }
220 (*j)++; 217 (*j)++;
221 } 218 }
@@ -234,9 +231,9 @@ static int create_crtc(struct drm_device *dev, struct omap_overlay *ovl,
234 struct drm_encoder *encoder = 231 struct drm_encoder *encoder =
235 omap_connector_attached_encoder( 232 omap_connector_attached_encoder(
236 priv->connectors[idx]); 233 priv->connectors[idx]);
237 if (encoder) { 234 if (encoder)
238 mgr = omap_encoder_get_manager(encoder); 235 mgr = omap_encoder_get_manager(encoder);
239 } 236
240 } 237 }
241 (*j)++; 238 (*j)++;
242 } 239 }
@@ -355,9 +352,8 @@ static int omap_modeset_init(struct drm_device *dev)
355 */ 352 */
356 int max_overlays = min(omap_dss_get_num_overlays(), num_crtc); 353 int max_overlays = min(omap_dss_get_num_overlays(), num_crtc);
357 354
358 for (i = 0; i < omap_dss_get_num_overlay_managers(); i++) { 355 for (i = 0; i < omap_dss_get_num_overlay_managers(); i++)
359 create_encoder(dev, omap_dss_get_overlay_manager(i)); 356 create_encoder(dev, omap_dss_get_overlay_manager(i));
360 }
361 357
362 for_each_dss_dev(dssdev) { 358 for_each_dss_dev(dssdev) {
363 create_connector(dev, dssdev); 359 create_connector(dev, dssdev);
@@ -419,13 +415,14 @@ static void omap_modeset_free(struct drm_device *dev)
419static int ioctl_get_param(struct drm_device *dev, void *data, 415static int ioctl_get_param(struct drm_device *dev, void *data,
420 struct drm_file *file_priv) 416 struct drm_file *file_priv)
421{ 417{
418 struct omap_drm_private *priv = dev->dev_private;
422 struct drm_omap_param *args = data; 419 struct drm_omap_param *args = data;
423 420
424 DBG("%p: param=%llu", dev, args->param); 421 DBG("%p: param=%llu", dev, args->param);
425 422
426 switch (args->param) { 423 switch (args->param) {
427 case OMAP_PARAM_CHIPSET_ID: 424 case OMAP_PARAM_CHIPSET_ID:
428 args->value = GET_OMAP_TYPE; 425 args->value = priv->omaprev;
429 break; 426 break;
430 default: 427 default:
431 DBG("unknown parameter %lld", args->param); 428 DBG("unknown parameter %lld", args->param);
@@ -469,15 +466,13 @@ static int ioctl_gem_cpu_prep(struct drm_device *dev, void *data,
469 VERB("%p:%p: handle=%d, op=%x", dev, file_priv, args->handle, args->op); 466 VERB("%p:%p: handle=%d, op=%x", dev, file_priv, args->handle, args->op);
470 467
471 obj = drm_gem_object_lookup(dev, file_priv, args->handle); 468 obj = drm_gem_object_lookup(dev, file_priv, args->handle);
472 if (!obj) { 469 if (!obj)
473 return -ENOENT; 470 return -ENOENT;
474 }
475 471
476 ret = omap_gem_op_sync(obj, args->op); 472 ret = omap_gem_op_sync(obj, args->op);
477 473
478 if (!ret) { 474 if (!ret)
479 ret = omap_gem_op_start(obj, args->op); 475 ret = omap_gem_op_start(obj, args->op);
480 }
481 476
482 drm_gem_object_unreference_unlocked(obj); 477 drm_gem_object_unreference_unlocked(obj);
483 478
@@ -494,16 +489,14 @@ static int ioctl_gem_cpu_fini(struct drm_device *dev, void *data,
494 VERB("%p:%p: handle=%d", dev, file_priv, args->handle); 489 VERB("%p:%p: handle=%d", dev, file_priv, args->handle);
495 490
496 obj = drm_gem_object_lookup(dev, file_priv, args->handle); 491 obj = drm_gem_object_lookup(dev, file_priv, args->handle);
497 if (!obj) { 492 if (!obj)
498 return -ENOENT; 493 return -ENOENT;
499 }
500 494
501 /* XXX flushy, flushy */ 495 /* XXX flushy, flushy */
502 ret = 0; 496 ret = 0;
503 497
504 if (!ret) { 498 if (!ret)
505 ret = omap_gem_op_finish(obj, args->op); 499 ret = omap_gem_op_finish(obj, args->op);
506 }
507 500
508 drm_gem_object_unreference_unlocked(obj); 501 drm_gem_object_unreference_unlocked(obj);
509 502
@@ -520,9 +513,8 @@ static int ioctl_gem_info(struct drm_device *dev, void *data,
520 DBG("%p:%p: handle=%d", dev, file_priv, args->handle); 513 DBG("%p:%p: handle=%d", dev, file_priv, args->handle);
521 514
522 obj = drm_gem_object_lookup(dev, file_priv, args->handle); 515 obj = drm_gem_object_lookup(dev, file_priv, args->handle);
523 if (!obj) { 516 if (!obj)
524 return -ENOENT; 517 return -ENOENT;
525 }
526 518
527 args->size = omap_gem_mmap_size(obj); 519 args->size = omap_gem_mmap_size(obj);
528 args->offset = omap_gem_mmap_offset(obj); 520 args->offset = omap_gem_mmap_offset(obj);
@@ -557,19 +549,20 @@ struct drm_ioctl_desc ioctls[DRM_COMMAND_END - DRM_COMMAND_BASE] = {
557 */ 549 */
558static int dev_load(struct drm_device *dev, unsigned long flags) 550static int dev_load(struct drm_device *dev, unsigned long flags)
559{ 551{
552 struct omap_drm_platform_data *pdata = dev->dev->platform_data;
560 struct omap_drm_private *priv; 553 struct omap_drm_private *priv;
561 int ret; 554 int ret;
562 555
563 DBG("load: dev=%p", dev); 556 DBG("load: dev=%p", dev);
564 557
565 drm_device = dev;
566
567 priv = kzalloc(sizeof(*priv), GFP_KERNEL); 558 priv = kzalloc(sizeof(*priv), GFP_KERNEL);
568 if (!priv) { 559 if (!priv) {
569 dev_err(dev->dev, "could not allocate priv\n"); 560 dev_err(dev->dev, "could not allocate priv\n");
570 return -ENOMEM; 561 return -ENOMEM;
571 } 562 }
572 563
564 priv->omaprev = pdata->omaprev;
565
573 dev->dev_private = priv; 566 dev->dev_private = priv;
574 567
575 priv->wq = alloc_ordered_workqueue("omapdrm", 0); 568 priv->wq = alloc_ordered_workqueue("omapdrm", 0);
@@ -595,9 +588,8 @@ static int dev_load(struct drm_device *dev, unsigned long flags)
595 drm_kms_helper_poll_init(dev); 588 drm_kms_helper_poll_init(dev);
596 589
597 ret = drm_vblank_init(dev, priv->num_crtcs); 590 ret = drm_vblank_init(dev, priv->num_crtcs);
598 if (ret) { 591 if (ret)
599 dev_warn(dev->dev, "could not init vblank\n"); 592 dev_warn(dev->dev, "could not init vblank\n");
600 }
601 593
602 return 0; 594 return 0;
603} 595}
@@ -659,19 +651,22 @@ static void dev_lastclose(struct drm_device *dev)
659 651
660 DBG("lastclose: dev=%p", dev); 652 DBG("lastclose: dev=%p", dev);
661 653
662 /* need to restore default rotation state.. not sure if there is 654 if (priv->rotation_prop) {
663 * a cleaner way to restore properties to default state? Maybe 655 /* need to restore default rotation state.. not sure
664 * a flag that properties should automatically be restored to 656 * if there is a cleaner way to restore properties to
665 * default state on lastclose? 657 * default state? Maybe a flag that properties should
666 */ 658 * automatically be restored to default state on
667 for (i = 0; i < priv->num_crtcs; i++) { 659 * lastclose?
668 drm_object_property_set_value(&priv->crtcs[i]->base, 660 */
669 priv->rotation_prop, 0); 661 for (i = 0; i < priv->num_crtcs; i++) {
670 } 662 drm_object_property_set_value(&priv->crtcs[i]->base,
663 priv->rotation_prop, 0);
664 }
671 665
672 for (i = 0; i < priv->num_planes; i++) { 666 for (i = 0; i < priv->num_planes; i++) {
673 drm_object_property_set_value(&priv->planes[i]->base, 667 drm_object_property_set_value(&priv->planes[i]->base,
674 priv->rotation_prop, 0); 668 priv->rotation_prop, 0);
669 }
675 } 670 }
676 671
677 ret = drm_fb_helper_restore_fbdev_mode(priv->fbdev); 672 ret = drm_fb_helper_restore_fbdev_mode(priv->fbdev);
diff --git a/drivers/staging/omapdrm/omap_drv.h b/drivers/staging/omapdrm/omap_drv.h
index 9dc72d143ff3..1d4aea53b75d 100644
--- a/drivers/staging/omapdrm/omap_drv.h
+++ b/drivers/staging/omapdrm/omap_drv.h
@@ -40,6 +40,8 @@
40#define MAX_MAPPERS 2 40#define MAX_MAPPERS 2
41 41
42struct omap_drm_private { 42struct omap_drm_private {
43 uint32_t omaprev;
44
43 unsigned int num_crtcs; 45 unsigned int num_crtcs;
44 struct drm_crtc *crtcs[8]; 46 struct drm_crtc *crtcs[8];
45 47
@@ -189,9 +191,9 @@ size_t omap_gem_mmap_size(struct drm_gem_object *obj);
189int omap_gem_tiled_size(struct drm_gem_object *obj, uint16_t *w, uint16_t *h); 191int omap_gem_tiled_size(struct drm_gem_object *obj, uint16_t *w, uint16_t *h);
190int omap_gem_tiled_stride(struct drm_gem_object *obj, uint32_t orient); 192int omap_gem_tiled_stride(struct drm_gem_object *obj, uint32_t orient);
191 193
192struct dma_buf * omap_gem_prime_export(struct drm_device *dev, 194struct dma_buf *omap_gem_prime_export(struct drm_device *dev,
193 struct drm_gem_object *obj, int flags); 195 struct drm_gem_object *obj, int flags);
194struct drm_gem_object * omap_gem_prime_import(struct drm_device *dev, 196struct drm_gem_object *omap_gem_prime_import(struct drm_device *dev,
195 struct dma_buf *buffer); 197 struct dma_buf *buffer);
196 198
197static inline int align_pitch(int pitch, int width, int bpp) 199static inline int align_pitch(int pitch, int width, int bpp)
@@ -216,17 +218,17 @@ static inline int objects_lookup(struct drm_device *dev,
216 218
217 for (i = 0; i < n; i++) { 219 for (i = 0; i < n; i++) {
218 bos[i] = drm_gem_object_lookup(dev, filp, handles[i]); 220 bos[i] = drm_gem_object_lookup(dev, filp, handles[i]);
219 if (!bos[i]) { 221 if (!bos[i])
220 goto fail; 222 goto fail;
221 } 223
222 } 224 }
223 225
224 return 0; 226 return 0;
225 227
226fail: 228fail:
227 while (--i > 0) { 229 while (--i > 0)
228 drm_gem_object_unreference_unlocked(bos[i]); 230 drm_gem_object_unreference_unlocked(bos[i]);
229 } 231
230 return -ENOENT; 232 return -ENOENT;
231} 233}
232 234
diff --git a/drivers/staging/omapdrm/omap_encoder.c b/drivers/staging/omapdrm/omap_encoder.c
index 31c735d39217..5341d5e3e317 100644
--- a/drivers/staging/omapdrm/omap_encoder.c
+++ b/drivers/staging/omapdrm/omap_encoder.c
@@ -72,9 +72,9 @@ static void omap_encoder_mode_set(struct drm_encoder *encoder,
72 72
73 for (i = 0; i < priv->num_connectors; i++) { 73 for (i = 0; i < priv->num_connectors; i++) {
74 struct drm_connector *connector = priv->connectors[i]; 74 struct drm_connector *connector = priv->connectors[i];
75 if (connector->encoder == encoder) { 75 if (connector->encoder == encoder)
76 omap_connector_mode_set(connector, mode); 76 omap_connector_mode_set(connector, mode);
77 } 77
78 } 78 }
79} 79}
80 80
@@ -163,9 +163,8 @@ struct drm_encoder *omap_encoder_init(struct drm_device *dev,
163 return encoder; 163 return encoder;
164 164
165fail: 165fail:
166 if (encoder) { 166 if (encoder)
167 omap_encoder_destroy(encoder); 167 omap_encoder_destroy(encoder);
168 }
169 168
170 return NULL; 169 return NULL;
171} 170}
diff --git a/drivers/staging/omapdrm/omap_fb.c b/drivers/staging/omapdrm/omap_fb.c
index 446801d63007..09028e9c1093 100644
--- a/drivers/staging/omapdrm/omap_fb.c
+++ b/drivers/staging/omapdrm/omap_fb.c
@@ -253,6 +253,7 @@ int omap_framebuffer_replace(struct drm_framebuffer *a,
253 int ret = 0, i, na, nb; 253 int ret = 0, i, na, nb;
254 struct omap_framebuffer *ofba = to_omap_framebuffer(a); 254 struct omap_framebuffer *ofba = to_omap_framebuffer(a);
255 struct omap_framebuffer *ofbb = to_omap_framebuffer(b); 255 struct omap_framebuffer *ofbb = to_omap_framebuffer(b);
256 uint32_t pinned_mask = 0;
256 257
257 na = a ? drm_format_num_planes(a->pixel_format) : 0; 258 na = a ? drm_format_num_planes(a->pixel_format) : 0;
258 nb = b ? drm_format_num_planes(b->pixel_format) : 0; 259 nb = b ? drm_format_num_planes(b->pixel_format) : 0;
@@ -263,25 +264,24 @@ int omap_framebuffer_replace(struct drm_framebuffer *a,
263 pa = (i < na) ? &ofba->planes[i] : NULL; 264 pa = (i < na) ? &ofba->planes[i] : NULL;
264 pb = (i < nb) ? &ofbb->planes[i] : NULL; 265 pb = (i < nb) ? &ofbb->planes[i] : NULL;
265 266
266 if (pa) { 267 if (pa)
267 unpin(arg, pa->bo); 268 unpin(arg, pa->bo);
268 pa->paddr = 0;
269 }
270 269
271 if (pb && !ret) { 270 if (pb && !ret) {
272 ret = omap_gem_get_paddr(pb->bo, &pb->paddr, true); 271 ret = omap_gem_get_paddr(pb->bo, &pb->paddr, true);
273 if (!ret) 272 if (!ret) {
274 omap_gem_dma_sync(pb->bo, DMA_TO_DEVICE); 273 omap_gem_dma_sync(pb->bo, DMA_TO_DEVICE);
274 pinned_mask |= (1 << i);
275 }
275 } 276 }
276 } 277 }
277 278
278 if (ret) { 279 if (ret) {
279 /* something went wrong.. unpin what has been pinned */ 280 /* something went wrong.. unpin what has been pinned */
280 for (i = 0; i < nb; i++) { 281 for (i = 0; i < nb; i++) {
281 struct plane *pb = &ofba->planes[i]; 282 if (pinned_mask & (1 << i)) {
282 if (pb->paddr) { 283 struct plane *pb = &ofba->planes[i];
283 unpin(arg, pb->bo); 284 unpin(arg, pb->bo);
284 pb->paddr = 0;
285 } 285 }
286 } 286 }
287 } 287 }
@@ -307,17 +307,16 @@ struct drm_connector *omap_framebuffer_get_next_connector(
307 struct list_head *connector_list = &dev->mode_config.connector_list; 307 struct list_head *connector_list = &dev->mode_config.connector_list;
308 struct drm_connector *connector = from; 308 struct drm_connector *connector = from;
309 309
310 if (!from) { 310 if (!from)
311 return list_first_entry(connector_list, typeof(*from), head); 311 return list_first_entry(connector_list, typeof(*from), head);
312 }
313 312
314 list_for_each_entry_from(connector, connector_list, head) { 313 list_for_each_entry_from(connector, connector_list, head) {
315 if (connector != from) { 314 if (connector != from) {
316 struct drm_encoder *encoder = connector->encoder; 315 struct drm_encoder *encoder = connector->encoder;
317 struct drm_crtc *crtc = encoder ? encoder->crtc : NULL; 316 struct drm_crtc *crtc = encoder ? encoder->crtc : NULL;
318 if (crtc && crtc->fb == fb) { 317 if (crtc && crtc->fb == fb)
319 return connector; 318 return connector;
320 } 319
321 } 320 }
322 } 321 }
323 322
@@ -466,8 +465,8 @@ struct drm_framebuffer *omap_framebuffer_init(struct drm_device *dev,
466 return fb; 465 return fb;
467 466
468fail: 467fail:
469 if (fb) { 468 if (fb)
470 omap_framebuffer_destroy(fb); 469 omap_framebuffer_destroy(fb);
471 } 470
472 return ERR_PTR(ret); 471 return ERR_PTR(ret);
473} 472}
diff --git a/drivers/staging/omapdrm/omap_gem.c b/drivers/staging/omapdrm/omap_gem.c
index 66e2c2f8a239..c38992b76fc9 100644
--- a/drivers/staging/omapdrm/omap_gem.c
+++ b/drivers/staging/omapdrm/omap_gem.c
@@ -25,7 +25,7 @@
25#include "omap_dmm_tiler.h" 25#include "omap_dmm_tiler.h"
26 26
27/* remove these once drm core helpers are merged */ 27/* remove these once drm core helpers are merged */
28struct page ** _drm_gem_get_pages(struct drm_gem_object *obj, gfp_t gfpmask); 28struct page **_drm_gem_get_pages(struct drm_gem_object *obj, gfp_t gfpmask);
29void _drm_gem_put_pages(struct drm_gem_object *obj, struct page **pages, 29void _drm_gem_put_pages(struct drm_gem_object *obj, struct page **pages,
30 bool dirty, bool accessed); 30 bool dirty, bool accessed);
31int _drm_gem_create_mmap_offset_size(struct drm_gem_object *obj, size_t size); 31int _drm_gem_create_mmap_offset_size(struct drm_gem_object *obj, size_t size);
@@ -521,9 +521,8 @@ int omap_gem_fault(struct vm_area_struct *vma, struct vm_fault *vmf)
521 521
522 /* if a shmem backed object, make sure we have pages attached now */ 522 /* if a shmem backed object, make sure we have pages attached now */
523 ret = get_pages(obj, &pages); 523 ret = get_pages(obj, &pages);
524 if (ret) { 524 if (ret)
525 goto fail; 525 goto fail;
526 }
527 526
528 /* where should we do corresponding put_pages().. we are mapping 527 /* where should we do corresponding put_pages().. we are mapping
529 * the original page, rather than thru a GART, so we can't rely 528 * the original page, rather than thru a GART, so we can't rely
@@ -953,7 +952,7 @@ int omap_gem_put_pages(struct drm_gem_object *obj)
953void *omap_gem_vaddr(struct drm_gem_object *obj) 952void *omap_gem_vaddr(struct drm_gem_object *obj)
954{ 953{
955 struct omap_gem_object *omap_obj = to_omap_bo(obj); 954 struct omap_gem_object *omap_obj = to_omap_bo(obj);
956 WARN_ON(! mutex_is_locked(&obj->dev->struct_mutex)); 955 WARN_ON(!mutex_is_locked(&obj->dev->struct_mutex));
957 if (!omap_obj->vaddr) { 956 if (!omap_obj->vaddr) {
958 struct page **pages; 957 struct page **pages;
959 int ret = get_pages(obj, &pages); 958 int ret = get_pages(obj, &pages);
@@ -972,7 +971,7 @@ void omap_gem_describe(struct drm_gem_object *obj, struct seq_file *m)
972 struct omap_gem_object *omap_obj = to_omap_bo(obj); 971 struct omap_gem_object *omap_obj = to_omap_bo(obj);
973 uint64_t off = 0; 972 uint64_t off = 0;
974 973
975 WARN_ON(! mutex_is_locked(&dev->struct_mutex)); 974 WARN_ON(!mutex_is_locked(&dev->struct_mutex));
976 975
977 if (obj->map_list.map) 976 if (obj->map_list.map)
978 off = (uint64_t)obj->map_list.hash.key; 977 off = (uint64_t)obj->map_list.hash.key;
@@ -1146,9 +1145,8 @@ int omap_gem_op_sync(struct drm_gem_object *obj, enum omap_gem_op op)
1146 struct omap_gem_sync_waiter *waiter = 1145 struct omap_gem_sync_waiter *waiter =
1147 kzalloc(sizeof(*waiter), GFP_KERNEL); 1146 kzalloc(sizeof(*waiter), GFP_KERNEL);
1148 1147
1149 if (!waiter) { 1148 if (!waiter)
1150 return -ENOMEM; 1149 return -ENOMEM;
1151 }
1152 1150
1153 waiter->omap_obj = omap_obj; 1151 waiter->omap_obj = omap_obj;
1154 waiter->op = op; 1152 waiter->op = op;
@@ -1177,9 +1175,8 @@ int omap_gem_op_sync(struct drm_gem_object *obj, enum omap_gem_op op)
1177 } 1175 }
1178 spin_unlock(&sync_lock); 1176 spin_unlock(&sync_lock);
1179 1177
1180 if (waiter) { 1178 if (waiter)
1181 kfree(waiter); 1179 kfree(waiter);
1182 }
1183 } 1180 }
1184 return ret; 1181 return ret;
1185} 1182}
@@ -1201,9 +1198,8 @@ int omap_gem_op_async(struct drm_gem_object *obj, enum omap_gem_op op,
1201 struct omap_gem_sync_waiter *waiter = 1198 struct omap_gem_sync_waiter *waiter =
1202 kzalloc(sizeof(*waiter), GFP_ATOMIC); 1199 kzalloc(sizeof(*waiter), GFP_ATOMIC);
1203 1200
1204 if (!waiter) { 1201 if (!waiter)
1205 return -ENOMEM; 1202 return -ENOMEM;
1206 }
1207 1203
1208 waiter->omap_obj = omap_obj; 1204 waiter->omap_obj = omap_obj;
1209 waiter->op = op; 1205 waiter->op = op;
@@ -1285,9 +1281,8 @@ void omap_gem_free_object(struct drm_gem_object *obj)
1285 1281
1286 list_del(&omap_obj->mm_list); 1282 list_del(&omap_obj->mm_list);
1287 1283
1288 if (obj->map_list.map) { 1284 if (obj->map_list.map)
1289 drm_gem_free_mmap_offset(obj); 1285 drm_gem_free_mmap_offset(obj);
1290 }
1291 1286
1292 /* this means the object is still pinned.. which really should 1287 /* this means the object is still pinned.. which really should
1293 * not happen. I think.. 1288 * not happen. I think..
@@ -1296,9 +1291,9 @@ void omap_gem_free_object(struct drm_gem_object *obj)
1296 1291
1297 /* don't free externally allocated backing memory */ 1292 /* don't free externally allocated backing memory */
1298 if (!(omap_obj->flags & OMAP_BO_EXT_MEM)) { 1293 if (!(omap_obj->flags & OMAP_BO_EXT_MEM)) {
1299 if (omap_obj->pages) { 1294 if (omap_obj->pages)
1300 omap_gem_detach_pages(obj); 1295 omap_gem_detach_pages(obj);
1301 } 1296
1302 if (!is_shmem(obj)) { 1297 if (!is_shmem(obj)) {
1303 dma_free_writecombine(dev->dev, obj->size, 1298 dma_free_writecombine(dev->dev, obj->size,
1304 omap_obj->vaddr, omap_obj->paddr); 1299 omap_obj->vaddr, omap_obj->paddr);
@@ -1308,9 +1303,8 @@ void omap_gem_free_object(struct drm_gem_object *obj)
1308 } 1303 }
1309 1304
1310 /* don't free externally allocated syncobj */ 1305 /* don't free externally allocated syncobj */
1311 if (!(omap_obj->flags & OMAP_BO_EXT_SYNC)) { 1306 if (!(omap_obj->flags & OMAP_BO_EXT_SYNC))
1312 kfree(omap_obj->sync); 1307 kfree(omap_obj->sync);
1313 }
1314 1308
1315 drm_gem_object_release(obj); 1309 drm_gem_object_release(obj);
1316 1310
@@ -1395,9 +1389,9 @@ struct drm_gem_object *omap_gem_new(struct drm_device *dev,
1395 */ 1389 */
1396 omap_obj->vaddr = dma_alloc_writecombine(dev->dev, size, 1390 omap_obj->vaddr = dma_alloc_writecombine(dev->dev, size,
1397 &omap_obj->paddr, GFP_KERNEL); 1391 &omap_obj->paddr, GFP_KERNEL);
1398 if (omap_obj->vaddr) { 1392 if (omap_obj->vaddr)
1399 flags |= OMAP_BO_DMA; 1393 flags |= OMAP_BO_DMA;
1400 } 1394
1401 } 1395 }
1402 1396
1403 omap_obj->flags = flags; 1397 omap_obj->flags = flags;
@@ -1407,22 +1401,20 @@ struct drm_gem_object *omap_gem_new(struct drm_device *dev,
1407 omap_obj->height = gsize.tiled.height; 1401 omap_obj->height = gsize.tiled.height;
1408 } 1402 }
1409 1403
1410 if (flags & (OMAP_BO_DMA|OMAP_BO_EXT_MEM)) { 1404 if (flags & (OMAP_BO_DMA|OMAP_BO_EXT_MEM))
1411 ret = drm_gem_private_object_init(dev, obj, size); 1405 ret = drm_gem_private_object_init(dev, obj, size);
1412 } else { 1406 else
1413 ret = drm_gem_object_init(dev, obj, size); 1407 ret = drm_gem_object_init(dev, obj, size);
1414 }
1415 1408
1416 if (ret) { 1409 if (ret)
1417 goto fail; 1410 goto fail;
1418 }
1419 1411
1420 return obj; 1412 return obj;
1421 1413
1422fail: 1414fail:
1423 if (obj) { 1415 if (obj)
1424 omap_gem_free_object(obj); 1416 omap_gem_free_object(obj);
1425 } 1417
1426 return NULL; 1418 return NULL;
1427} 1419}
1428 1420
@@ -1435,7 +1427,7 @@ void omap_gem_init(struct drm_device *dev)
1435 }; 1427 };
1436 int i, j; 1428 int i, j;
1437 1429
1438 if (!dmm_is_initialized()) { 1430 if (!dmm_is_available()) {
1439 /* DMM only supported on OMAP4 and later, so this isn't fatal */ 1431 /* DMM only supported on OMAP4 and later, so this isn't fatal */
1440 dev_warn(dev->dev, "DMM not available, disable DMM support\n"); 1432 dev_warn(dev->dev, "DMM not available, disable DMM support\n");
1441 return; 1433 return;
diff --git a/drivers/staging/omapdrm/omap_gem_dmabuf.c b/drivers/staging/omapdrm/omap_gem_dmabuf.c
index c6f3ef6f57b9..9a302062b031 100644
--- a/drivers/staging/omapdrm/omap_gem_dmabuf.c
+++ b/drivers/staging/omapdrm/omap_gem_dmabuf.c
@@ -191,13 +191,13 @@ struct dma_buf_ops omap_dmabuf_ops = {
191 .mmap = omap_gem_dmabuf_mmap, 191 .mmap = omap_gem_dmabuf_mmap,
192}; 192};
193 193
194struct dma_buf * omap_gem_prime_export(struct drm_device *dev, 194struct dma_buf *omap_gem_prime_export(struct drm_device *dev,
195 struct drm_gem_object *obj, int flags) 195 struct drm_gem_object *obj, int flags)
196{ 196{
197 return dma_buf_export(obj, &omap_dmabuf_ops, obj->size, 0600); 197 return dma_buf_export(obj, &omap_dmabuf_ops, obj->size, 0600);
198} 198}
199 199
200struct drm_gem_object * omap_gem_prime_import(struct drm_device *dev, 200struct drm_gem_object *omap_gem_prime_import(struct drm_device *dev,
201 struct dma_buf *buffer) 201 struct dma_buf *buffer)
202{ 202{
203 struct drm_gem_object *obj; 203 struct drm_gem_object *obj;
diff --git a/drivers/staging/omapdrm/omap_gem_helpers.c b/drivers/staging/omapdrm/omap_gem_helpers.c
index f895363a5e54..ffb8cceaeb46 100644
--- a/drivers/staging/omapdrm/omap_gem_helpers.c
+++ b/drivers/staging/omapdrm/omap_gem_helpers.c
@@ -32,7 +32,7 @@
32 * @obj: obj in question 32 * @obj: obj in question
33 * @gfpmask: gfp mask of requested pages 33 * @gfpmask: gfp mask of requested pages
34 */ 34 */
35struct page ** _drm_gem_get_pages(struct drm_gem_object *obj, gfp_t gfpmask) 35struct page **_drm_gem_get_pages(struct drm_gem_object *obj, gfp_t gfpmask)
36{ 36{
37 struct inode *inode; 37 struct inode *inode;
38 struct address_space *mapping; 38 struct address_space *mapping;
@@ -80,9 +80,9 @@ struct page ** _drm_gem_get_pages(struct drm_gem_object *obj, gfp_t gfpmask)
80 return pages; 80 return pages;
81 81
82fail: 82fail:
83 while (i--) { 83 while (i--)
84 page_cache_release(pages[i]); 84 page_cache_release(pages[i]);
85 } 85
86 drm_free_large(pages); 86 drm_free_large(pages);
87 return ERR_CAST(p); 87 return ERR_CAST(p);
88} 88}
diff --git a/drivers/staging/omapdrm/omap_plane.c b/drivers/staging/omapdrm/omap_plane.c
index 4bde639dd02c..2a8e5bab49c9 100644
--- a/drivers/staging/omapdrm/omap_plane.c
+++ b/drivers/staging/omapdrm/omap_plane.c
@@ -416,26 +416,28 @@ void omap_plane_install_properties(struct drm_plane *plane,
416 struct omap_drm_private *priv = dev->dev_private; 416 struct omap_drm_private *priv = dev->dev_private;
417 struct drm_property *prop; 417 struct drm_property *prop;
418 418
419 prop = priv->rotation_prop; 419 if (priv->has_dmm) {
420 if (!prop) { 420 prop = priv->rotation_prop;
421 const struct drm_prop_enum_list props[] = { 421 if (!prop) {
422 { DRM_ROTATE_0, "rotate-0" }, 422 const struct drm_prop_enum_list props[] = {
423 { DRM_ROTATE_90, "rotate-90" }, 423 { DRM_ROTATE_0, "rotate-0" },
424 { DRM_ROTATE_180, "rotate-180" }, 424 { DRM_ROTATE_90, "rotate-90" },
425 { DRM_ROTATE_270, "rotate-270" }, 425 { DRM_ROTATE_180, "rotate-180" },
426 { DRM_REFLECT_X, "reflect-x" }, 426 { DRM_ROTATE_270, "rotate-270" },
427 { DRM_REFLECT_Y, "reflect-y" }, 427 { DRM_REFLECT_X, "reflect-x" },
428 }; 428 { DRM_REFLECT_Y, "reflect-y" },
429 prop = drm_property_create_bitmask(dev, 0, "rotation", 429 };
430 props, ARRAY_SIZE(props)); 430 prop = drm_property_create_bitmask(dev, 0, "rotation",
431 if (prop == NULL) 431 props, ARRAY_SIZE(props));
432 return; 432 if (prop == NULL)
433 priv->rotation_prop = prop; 433 return;
434 priv->rotation_prop = prop;
435 }
436 drm_object_attach_property(obj, prop, 0);
434 } 437 }
435 drm_object_attach_property(obj, prop, 0);
436 438
437 prop = priv->zorder_prop; 439 prop = priv->zorder_prop;
438 if (!prop) { 440 if (!prop) {
439 prop = drm_property_create_range(dev, 0, "zorder", 0, 3); 441 prop = drm_property_create_range(dev, 0, "zorder", 0, 3);
440 if (prop == NULL) 442 if (prop == NULL)
441 return; 443 return;
@@ -549,8 +551,8 @@ struct drm_plane *omap_plane_init(struct drm_device *dev,
549 return plane; 551 return plane;
550 552
551fail: 553fail:
552 if (plane) { 554 if (plane)
553 omap_plane_destroy(plane); 555 omap_plane_destroy(plane);
554 } 556
555 return NULL; 557 return NULL;
556} 558}
diff --git a/drivers/staging/ozwpan/ozevent.c b/drivers/staging/ozwpan/ozevent.c
index a48498bd9b5f..50578ba0061c 100644
--- a/drivers/staging/ozwpan/ozevent.c
+++ b/drivers/staging/ozwpan/ozevent.c
@@ -79,6 +79,7 @@ void oz_event_log2(u8 evt, u8 ctx1, u16 ctx2, void *ctx3, unsigned ctx4)
79/*------------------------------------------------------------------------------ 79/*------------------------------------------------------------------------------
80 * Context: process 80 * Context: process
81 */ 81 */
82#ifdef CONFIG_DEBUG_FS
82static void oz_events_clear(struct oz_evtdev *dev) 83static void oz_events_clear(struct oz_evtdev *dev)
83{ 84{
84 unsigned long irqstate; 85 unsigned long irqstate;
@@ -88,7 +89,6 @@ static void oz_events_clear(struct oz_evtdev *dev)
88 dev->missed_events = 0; 89 dev->missed_events = 0;
89 spin_unlock_irqrestore(&dev->lock, irqstate); 90 spin_unlock_irqrestore(&dev->lock, irqstate);
90} 91}
91#ifdef CONFIG_DEBUG_FS
92/*------------------------------------------------------------------------------ 92/*------------------------------------------------------------------------------
93 * Context: process 93 * Context: process
94 */ 94 */
diff --git a/drivers/staging/ozwpan/ozhcd.c b/drivers/staging/ozwpan/ozhcd.c
index 2e087acf1578..b2d77df2a526 100644
--- a/drivers/staging/ozwpan/ozhcd.c
+++ b/drivers/staging/ozwpan/ozhcd.c
@@ -278,8 +278,7 @@ static void oz_free_urb_link(struct oz_urb_link *urbl)
278 g_link_pool_size++; 278 g_link_pool_size++;
279 } 279 }
280 spin_unlock_irqrestore(&g_link_lock, irq_state); 280 spin_unlock_irqrestore(&g_link_lock, irq_state);
281 if (urbl) 281 kfree(urbl);
282 kfree(urbl);
283 } 282 }
284} 283}
285/*------------------------------------------------------------------------------ 284/*------------------------------------------------------------------------------
@@ -2304,8 +2303,8 @@ error:
2304 */ 2303 */
2305void oz_hcd_term(void) 2304void oz_hcd_term(void)
2306{ 2305{
2307 tasklet_disable(&g_urb_process_tasklet); 2306 tasklet_kill(&g_urb_process_tasklet);
2308 tasklet_disable(&g_urb_cancel_tasklet); 2307 tasklet_kill(&g_urb_cancel_tasklet);
2309 platform_device_unregister(g_plat_dev); 2308 platform_device_unregister(g_plat_dev);
2310 platform_driver_unregister(&g_oz_plat_drv); 2309 platform_driver_unregister(&g_oz_plat_drv);
2311 oz_trace("Pending urbs:%d\n", atomic_read(&g_pending_urbs)); 2310 oz_trace("Pending urbs:%d\n", atomic_read(&g_pending_urbs));
diff --git a/drivers/staging/ozwpan/ozpd.c b/drivers/staging/ozwpan/ozpd.c
index 0b3648ce9687..118a4db74dec 100644
--- a/drivers/staging/ozwpan/ozpd.c
+++ b/drivers/staging/ozwpan/ozpd.c
@@ -402,8 +402,7 @@ static void oz_tx_frame_free(struct oz_pd *pd, struct oz_tx_frame *f)
402 f = 0; 402 f = 0;
403 } 403 }
404 spin_unlock_bh(&pd->tx_frame_lock); 404 spin_unlock_bh(&pd->tx_frame_lock);
405 if (f) 405 kfree(f);
406 kfree(f);
407} 406}
408/*------------------------------------------------------------------------------ 407/*------------------------------------------------------------------------------
409 * Context: softirq-serialized 408 * Context: softirq-serialized
@@ -737,8 +736,7 @@ int oz_isoc_stream_create(struct oz_pd *pd, u8 ep_num)
737 st = 0; 736 st = 0;
738 } 737 }
739 spin_unlock_bh(&pd->stream_lock); 738 spin_unlock_bh(&pd->stream_lock);
740 if (st) 739 kfree(st);
741 kfree(st);
742 return 0; 740 return 0;
743} 741}
744/*------------------------------------------------------------------------------ 742/*------------------------------------------------------------------------------
diff --git a/drivers/staging/ozwpan/ozproto.c b/drivers/staging/ozwpan/ozproto.c
index cfb5160d1ebe..e00a53915daa 100644
--- a/drivers/staging/ozwpan/ozproto.c
+++ b/drivers/staging/ozwpan/ozproto.c
@@ -566,8 +566,7 @@ static void oz_protocol_timer(unsigned long arg)
566 } 566 }
567 spin_unlock_bh(&g_polling_lock); 567 spin_unlock_bh(&g_polling_lock);
568 oz_pd_put(pd); 568 oz_pd_put(pd);
569 if (t) 569 kfree(t);
570 kfree(t);
571 t = t2; 570 t = t2;
572 } while (t); 571 } while (t);
573 g_timer_state = OZ_TIMER_IDLE; 572 g_timer_state = OZ_TIMER_IDLE;
diff --git a/drivers/staging/panel/panel.c b/drivers/staging/panel/panel.c
index 6e9f7090c451..e3113ecefefd 100644
--- a/drivers/staging/panel/panel.c
+++ b/drivers/staging/panel/panel.c
@@ -1758,7 +1758,7 @@ static inline int input_state_high(struct logical_input *input)
1758 char *press_str = input->u.kbd.press_str; 1758 char *press_str = input->u.kbd.press_str;
1759 if (press_str[0]) 1759 if (press_str[0])
1760 keypad_send_key(press_str, 1760 keypad_send_key(press_str,
1761 sizeof(press_str)); 1761 sizeof(input->u.kbd.press_str));
1762 } 1762 }
1763 1763
1764 if (input->u.kbd.repeat_str[0]) { 1764 if (input->u.kbd.repeat_str[0]) {
@@ -1766,7 +1766,7 @@ static inline int input_state_high(struct logical_input *input)
1766 if (input->high_timer >= KEYPAD_REP_START) { 1766 if (input->high_timer >= KEYPAD_REP_START) {
1767 input->high_timer -= KEYPAD_REP_DELAY; 1767 input->high_timer -= KEYPAD_REP_DELAY;
1768 keypad_send_key(repeat_str, 1768 keypad_send_key(repeat_str,
1769 sizeof(repeat_str)); 1769 sizeof(input->u.kbd.repeat_str));
1770 } 1770 }
1771 /* we will need to come back here soon */ 1771 /* we will need to come back here soon */
1772 inputs_stable = 0; 1772 inputs_stable = 0;
@@ -1805,7 +1805,7 @@ static inline void input_state_falling(struct logical_input *input)
1805 if (input->high_timer >= KEYPAD_REP_START) 1805 if (input->high_timer >= KEYPAD_REP_START)
1806 input->high_timer -= KEYPAD_REP_DELAY; 1806 input->high_timer -= KEYPAD_REP_DELAY;
1807 keypad_send_key(repeat_str, 1807 keypad_send_key(repeat_str,
1808 sizeof(repeat_str)); 1808 sizeof(input->u.kbd.repeat_str));
1809 /* we will need to come back here soon */ 1809 /* we will need to come back here soon */
1810 inputs_stable = 0; 1810 inputs_stable = 0;
1811 } 1811 }
@@ -1824,7 +1824,7 @@ static inline void input_state_falling(struct logical_input *input)
1824 char *release_str = input->u.kbd.release_str; 1824 char *release_str = input->u.kbd.release_str;
1825 if (release_str[0]) 1825 if (release_str[0])
1826 keypad_send_key(release_str, 1826 keypad_send_key(release_str,
1827 sizeof(release_str)); 1827 sizeof(input->u.kbd.release_str));
1828 } 1828 }
1829 1829
1830 input->state = INPUT_ST_LOW; 1830 input->state = INPUT_ST_LOW;
diff --git a/drivers/staging/rtl8187se/ieee80211/ieee80211.h b/drivers/staging/rtl8187se/ieee80211/ieee80211.h
index 5f5a30223d56..8fc9f588b056 100644
--- a/drivers/staging/rtl8187se/ieee80211/ieee80211.h
+++ b/drivers/staging/rtl8187se/ieee80211/ieee80211.h
@@ -1221,7 +1221,7 @@ static inline void *ieee80211_priv(struct net_device *dev)
1221 return ((struct ieee80211_device *)netdev_priv(dev))->priv; 1221 return ((struct ieee80211_device *)netdev_priv(dev))->priv;
1222} 1222}
1223 1223
1224extern inline int ieee80211_is_empty_essid(const char *essid, int essid_len) 1224static inline int ieee80211_is_empty_essid(const char *essid, int essid_len)
1225{ 1225{
1226 /* Single white space is for Linksys APs */ 1226 /* Single white space is for Linksys APs */
1227 if (essid_len == 1 && essid[0] == ' ') 1227 if (essid_len == 1 && essid[0] == ' ')
@@ -1237,7 +1237,7 @@ extern inline int ieee80211_is_empty_essid(const char *essid, int essid_len)
1237 return 1; 1237 return 1;
1238} 1238}
1239 1239
1240extern inline int ieee80211_is_valid_mode(struct ieee80211_device *ieee, int mode) 1240static inline int ieee80211_is_valid_mode(struct ieee80211_device *ieee, int mode)
1241{ 1241{
1242 /* 1242 /*
1243 * It is possible for both access points and our device to support 1243 * It is possible for both access points and our device to support
@@ -1263,7 +1263,7 @@ extern inline int ieee80211_is_valid_mode(struct ieee80211_device *ieee, int mod
1263 return 0; 1263 return 0;
1264} 1264}
1265 1265
1266extern inline int ieee80211_get_hdrlen(u16 fc) 1266static inline int ieee80211_get_hdrlen(u16 fc)
1267{ 1267{
1268 int hdrlen = 24; 1268 int hdrlen = 24;
1269 1269
diff --git a/drivers/staging/rtl8187se/ieee80211/ieee80211_crypt.c b/drivers/staging/rtl8187se/ieee80211/ieee80211_crypt.c
index b3882ae9d974..694eae3d4fda 100644
--- a/drivers/staging/rtl8187se/ieee80211/ieee80211_crypt.c
+++ b/drivers/staging/rtl8187se/ieee80211/ieee80211_crypt.c
@@ -11,12 +11,14 @@
11 * 11 *
12 */ 12 */
13 13
14#define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
15
14//#include <linux/config.h> 16//#include <linux/config.h>
15#include <linux/module.h> 17#include <linux/module.h>
16#include <linux/init.h> 18#include <linux/init.h>
17#include <linux/slab.h> 19#include <linux/slab.h>
18#include <asm/string.h> 20#include <linux/string.h>
19#include <asm/errno.h> 21#include <linux/errno.h>
20 22
21#include "ieee80211.h" 23#include "ieee80211.h"
22 24
@@ -66,8 +68,7 @@ void ieee80211_crypt_deinit_handler(unsigned long data)
66 spin_lock_irqsave(&ieee->lock, flags); 68 spin_lock_irqsave(&ieee->lock, flags);
67 ieee80211_crypt_deinit_entries(ieee, 0); 69 ieee80211_crypt_deinit_entries(ieee, 0);
68 if (!list_empty(&ieee->crypt_deinit_list)) { 70 if (!list_empty(&ieee->crypt_deinit_list)) {
69 printk(KERN_DEBUG "%s: entries remaining in delayed crypt " 71 pr_debug("entries remaining in delayed crypt deletion list\n");
70 "deletion list\n", ieee->dev->name);
71 ieee->crypt_deinit_timer.expires = jiffies + HZ; 72 ieee->crypt_deinit_timer.expires = jiffies + HZ;
72 add_timer(&ieee->crypt_deinit_timer); 73 add_timer(&ieee->crypt_deinit_timer);
73 } 74 }
@@ -118,8 +119,7 @@ int ieee80211_register_crypto_ops(struct ieee80211_crypto_ops *ops)
118 list_add(&alg->list, &hcrypt->algs); 119 list_add(&alg->list, &hcrypt->algs);
119 spin_unlock_irqrestore(&hcrypt->lock, flags); 120 spin_unlock_irqrestore(&hcrypt->lock, flags);
120 121
121 printk(KERN_DEBUG "ieee80211_crypt: registered algorithm '%s'\n", 122 pr_debug("registered algorithm '%s'\n", ops->name);
122 ops->name);
123 123
124 return 0; 124 return 0;
125} 125}
@@ -146,8 +146,7 @@ int ieee80211_unregister_crypto_ops(struct ieee80211_crypto_ops *ops)
146 spin_unlock_irqrestore(&hcrypt->lock, flags); 146 spin_unlock_irqrestore(&hcrypt->lock, flags);
147 147
148 if (del_alg) { 148 if (del_alg) {
149 printk(KERN_DEBUG "ieee80211_crypt: unregistered algorithm " 149 pr_debug("unregistered algorithm '%s'\n", ops->name);
150 "'%s'\n", ops->name);
151 kfree(del_alg); 150 kfree(del_alg);
152 } 151 }
153 152
@@ -155,7 +154,7 @@ int ieee80211_unregister_crypto_ops(struct ieee80211_crypto_ops *ops)
155} 154}
156 155
157 156
158struct ieee80211_crypto_ops * ieee80211_get_crypto_ops(const char *name) 157struct ieee80211_crypto_ops *ieee80211_get_crypto_ops(const char *name)
159{ 158{
160 unsigned long flags; 159 unsigned long flags;
161 struct list_head *ptr; 160 struct list_head *ptr;
@@ -182,7 +181,7 @@ struct ieee80211_crypto_ops * ieee80211_get_crypto_ops(const char *name)
182} 181}
183 182
184 183
185static void * ieee80211_crypt_null_init(int keyidx) { return (void *) 1; } 184static void *ieee80211_crypt_null_init(int keyidx) { return (void *) 1; }
186static void ieee80211_crypt_null_deinit(void *priv) {} 185static void ieee80211_crypt_null_deinit(void *priv) {}
187 186
188static struct ieee80211_crypto_ops ieee80211_crypt_null = { 187static struct ieee80211_crypto_ops ieee80211_crypt_null = {
@@ -234,9 +233,8 @@ void ieee80211_crypto_deinit(void)
234 alg = list_entry(ptr, struct ieee80211_crypto_alg, list); 233 alg = list_entry(ptr, struct ieee80211_crypto_alg, list);
235 if (alg) { 234 if (alg) {
236 list_del(ptr); 235 list_del(ptr);
237 printk(KERN_DEBUG 236 pr_debug("unregistered algorithm '%s' (deinit)\n",
238 "ieee80211_crypt: unregistered algorithm '%s' (deinit)\n", 237 alg->ops->name);
239 alg->ops->name);
240 kfree(alg); 238 kfree(alg);
241 } 239 }
242 } 240 }
diff --git a/drivers/staging/rtl8187se/ieee80211/ieee80211_crypt.h b/drivers/staging/rtl8187se/ieee80211/ieee80211_crypt.h
index b58a3bcc0dc0..0b4ea431982d 100644
--- a/drivers/staging/rtl8187se/ieee80211/ieee80211_crypt.h
+++ b/drivers/staging/rtl8187se/ieee80211/ieee80211_crypt.h
@@ -77,7 +77,7 @@ struct ieee80211_crypt_data {
77 77
78int ieee80211_register_crypto_ops(struct ieee80211_crypto_ops *ops); 78int ieee80211_register_crypto_ops(struct ieee80211_crypto_ops *ops);
79int ieee80211_unregister_crypto_ops(struct ieee80211_crypto_ops *ops); 79int ieee80211_unregister_crypto_ops(struct ieee80211_crypto_ops *ops);
80struct ieee80211_crypto_ops * ieee80211_get_crypto_ops(const char *name); 80struct ieee80211_crypto_ops *ieee80211_get_crypto_ops(const char *name);
81void ieee80211_crypt_deinit_entries(struct ieee80211_device *, int); 81void ieee80211_crypt_deinit_entries(struct ieee80211_device *, int);
82void ieee80211_crypt_deinit_handler(unsigned long); 82void ieee80211_crypt_deinit_handler(unsigned long);
83void ieee80211_crypt_delayed_deinit(struct ieee80211_device *ieee, 83void ieee80211_crypt_delayed_deinit(struct ieee80211_device *ieee,
diff --git a/drivers/staging/rtl8187se/ieee80211/ieee80211_crypt_ccmp.c b/drivers/staging/rtl8187se/ieee80211/ieee80211_crypt_ccmp.c
index 6aaaa2fd57f4..f5949e89e5c2 100644
--- a/drivers/staging/rtl8187se/ieee80211/ieee80211_crypt_ccmp.c
+++ b/drivers/staging/rtl8187se/ieee80211/ieee80211_crypt_ccmp.c
@@ -9,6 +9,8 @@
9 * more details. 9 * more details.
10 */ 10 */
11 11
12#define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
13
12//#include <linux/config.h> 14//#include <linux/config.h>
13#include <linux/module.h> 15#include <linux/module.h>
14#include <linux/init.h> 16#include <linux/init.h>
@@ -18,7 +20,7 @@
18#include <linux/netdevice.h> 20#include <linux/netdevice.h>
19#include <linux/if_ether.h> 21#include <linux/if_ether.h>
20#include <linux/if_arp.h> 22#include <linux/if_arp.h>
21#include <asm/string.h> 23#include <linux/string.h>
22#include <linux/wireless.h> 24#include <linux/wireless.h>
23 25
24#include "ieee80211.h" 26#include "ieee80211.h"
@@ -64,7 +66,7 @@ void ieee80211_ccmp_aes_encrypt(struct crypto_tfm *tfm,
64 crypto_cipher_encrypt_one((void *)tfm, ct, pt); 66 crypto_cipher_encrypt_one((void *)tfm, ct, pt);
65} 67}
66 68
67static void * ieee80211_ccmp_init(int key_idx) 69static void *ieee80211_ccmp_init(int key_idx)
68{ 70{
69 struct ieee80211_ccmp_data *priv; 71 struct ieee80211_ccmp_data *priv;
70 72
@@ -75,8 +77,7 @@ static void * ieee80211_ccmp_init(int key_idx)
75 77
76 priv->tfm = (void *)crypto_alloc_cipher("aes", 0, CRYPTO_ALG_ASYNC); 78 priv->tfm = (void *)crypto_alloc_cipher("aes", 0, CRYPTO_ALG_ASYNC);
77 if (IS_ERR(priv->tfm)) { 79 if (IS_ERR(priv->tfm)) {
78 printk(KERN_DEBUG "ieee80211_crypt_ccmp: could not allocate " 80 pr_debug("could not allocate crypto API aes\n");
79 "crypto API aes\n");
80 priv->tfm = NULL; 81 priv->tfm = NULL;
81 goto fail; 82 goto fail;
82 } 83 }
@@ -128,7 +129,7 @@ static void ccmp_init_blocks(struct crypto_tfm *tfm,
128 /* 129 /*
129 qc_included = ((WLAN_FC_GET_TYPE(fc) == IEEE80211_FTYPE_DATA) && 130 qc_included = ((WLAN_FC_GET_TYPE(fc) == IEEE80211_FTYPE_DATA) &&
130 (WLAN_FC_GET_STYPE(fc) & 0x08)); 131 (WLAN_FC_GET_STYPE(fc) & 0x08));
131 */ 132 */
132 // fixed by David :2006.9.6 133 // fixed by David :2006.9.6
133 qc_included = ((WLAN_FC_GET_TYPE(fc) == IEEE80211_FTYPE_DATA) && 134 qc_included = ((WLAN_FC_GET_TYPE(fc) == IEEE80211_FTYPE_DATA) &&
134 (WLAN_FC_GET_STYPE(fc) & 0x80)); 135 (WLAN_FC_GET_STYPE(fc) & 0x80));
@@ -282,23 +283,22 @@ static int ieee80211_ccmp_decrypt(struct sk_buff *skb, int hdr_len, void *priv)
282 keyidx = pos[3]; 283 keyidx = pos[3];
283 if (!(keyidx & (1 << 5))) { 284 if (!(keyidx & (1 << 5))) {
284 if (net_ratelimit()) { 285 if (net_ratelimit()) {
285 printk(KERN_DEBUG "CCMP: received packet without ExtIV" 286 pr_debug("received packet without ExtIV flag from %pM\n",
286 " flag from %pM\n", hdr->addr2); 287 hdr->addr2);
287 } 288 }
288 key->dot11RSNAStatsCCMPFormatErrors++; 289 key->dot11RSNAStatsCCMPFormatErrors++;
289 return -2; 290 return -2;
290 } 291 }
291 keyidx >>= 6; 292 keyidx >>= 6;
292 if (key->key_idx != keyidx) { 293 if (key->key_idx != keyidx) {
293 printk(KERN_DEBUG "CCMP: RX tkey->key_idx=%d frame " 294 pr_debug("RX tkey->key_idx=%d frame keyidx=%d priv=%p\n",
294 "keyidx=%d priv=%p\n", key->key_idx, keyidx, priv); 295 key->key_idx, keyidx, priv);
295 return -6; 296 return -6;
296 } 297 }
297 if (!key->key_set) { 298 if (!key->key_set) {
298 if (net_ratelimit()) { 299 if (net_ratelimit()) {
299 printk(KERN_DEBUG "CCMP: received packet from %pM" 300 pr_debug("received packet from %pM with keyid=%d that does not have a configured key\n",
300 " with keyid=%d that does not have a configured" 301 hdr->addr2, keyidx);
301 " key\n", hdr->addr2, keyidx);
302 } 302 }
303 return -3; 303 return -3;
304 } 304 }
@@ -313,9 +313,8 @@ static int ieee80211_ccmp_decrypt(struct sk_buff *skb, int hdr_len, void *priv)
313 313
314 if (memcmp(pn, key->rx_pn, CCMP_PN_LEN) <= 0) { 314 if (memcmp(pn, key->rx_pn, CCMP_PN_LEN) <= 0) {
315 if (net_ratelimit()) { 315 if (net_ratelimit()) {
316 printk(KERN_DEBUG "CCMP: replay detected: STA=%pM" 316 pr_debug("replay detected: STA=%pM previous PN %pm received PN %pm\n",
317 " previous PN %pm received PN %pm\n", 317 hdr->addr2, key->rx_pn, pn);
318 hdr->addr2, key->rx_pn, pn);
319 } 318 }
320 key->dot11RSNAStatsCCMPReplays++; 319 key->dot11RSNAStatsCCMPReplays++;
321 return -4; 320 return -4;
@@ -341,10 +340,9 @@ static int ieee80211_ccmp_decrypt(struct sk_buff *skb, int hdr_len, void *priv)
341 } 340 }
342 341
343 if (memcmp(mic, a, CCMP_MIC_LEN) != 0) { 342 if (memcmp(mic, a, CCMP_MIC_LEN) != 0) {
344 if (net_ratelimit()) { 343 if (net_ratelimit())
345 printk(KERN_DEBUG "CCMP: decrypt failed: STA=" 344 pr_debug("decrypt failed: STA=%pM\n", hdr->addr2);
346 "%pM\n", hdr->addr2); 345
347 }
348 key->dot11RSNAStatsCCMPDecryptErrors++; 346 key->dot11RSNAStatsCCMPDecryptErrors++;
349 return -5; 347 return -5;
350 } 348 }
@@ -415,7 +413,7 @@ static int ieee80211_ccmp_get_key(void *key, int len, u8 *seq, void *priv)
415} 413}
416 414
417 415
418static char * ieee80211_ccmp_print_stats(char *p, void *priv) 416static char *ieee80211_ccmp_print_stats(char *p, void *priv)
419{ 417{
420 struct ieee80211_ccmp_data *ccmp = priv; 418 struct ieee80211_ccmp_data *ccmp = priv;
421 p += sprintf(p, "key[%d] alg=CCMP key_set=%d " 419 p += sprintf(p, "key[%d] alg=CCMP key_set=%d "
diff --git a/drivers/staging/rtl8187se/ieee80211/ieee80211_crypt_wep.c b/drivers/staging/rtl8187se/ieee80211/ieee80211_crypt_wep.c
index 58f3eeb2143e..bba77141d9a3 100644
--- a/drivers/staging/rtl8187se/ieee80211/ieee80211_crypt_wep.c
+++ b/drivers/staging/rtl8187se/ieee80211/ieee80211_crypt_wep.c
@@ -9,13 +9,15 @@
9 * more details. 9 * more details.
10 */ 10 */
11 11
12#define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
13
12//#include <linux/config.h> 14//#include <linux/config.h>
13#include <linux/module.h> 15#include <linux/module.h>
14#include <linux/init.h> 16#include <linux/init.h>
15#include <linux/slab.h> 17#include <linux/slab.h>
16#include <linux/random.h> 18#include <linux/random.h>
17#include <linux/skbuff.h> 19#include <linux/skbuff.h>
18#include <asm/string.h> 20#include <linux/string.h>
19 21
20#include "ieee80211.h" 22#include "ieee80211.h"
21 23
@@ -40,7 +42,7 @@ struct prism2_wep_data {
40}; 42};
41 43
42 44
43static void * prism2_wep_init(int keyidx) 45static void *prism2_wep_init(int keyidx)
44{ 46{
45 struct prism2_wep_data *priv; 47 struct prism2_wep_data *priv;
46 48
@@ -50,15 +52,13 @@ static void * prism2_wep_init(int keyidx)
50 priv->key_idx = keyidx; 52 priv->key_idx = keyidx;
51 priv->tx_tfm = crypto_alloc_blkcipher("ecb(arc4)", 0, CRYPTO_ALG_ASYNC); 53 priv->tx_tfm = crypto_alloc_blkcipher("ecb(arc4)", 0, CRYPTO_ALG_ASYNC);
52 if (IS_ERR(priv->tx_tfm)) { 54 if (IS_ERR(priv->tx_tfm)) {
53 printk(KERN_DEBUG "ieee80211_crypt_wep: could not allocate " 55 pr_debug("could not allocate crypto API arc4\n");
54 "crypto API arc4\n");
55 priv->tx_tfm = NULL; 56 priv->tx_tfm = NULL;
56 goto fail; 57 goto fail;
57 } 58 }
58 priv->rx_tfm = crypto_alloc_blkcipher("ecb(arc4)", 0, CRYPTO_ALG_ASYNC); 59 priv->rx_tfm = crypto_alloc_blkcipher("ecb(arc4)", 0, CRYPTO_ALG_ASYNC);
59 if (IS_ERR(priv->rx_tfm)) { 60 if (IS_ERR(priv->rx_tfm)) {
60 printk(KERN_DEBUG "ieee80211_crypt_wep: could not allocate " 61 pr_debug("could not allocate crypto API arc4\n");
61 "crypto API arc4\n");
62 priv->rx_tfm = NULL; 62 priv->rx_tfm = NULL;
63 goto fail; 63 goto fail;
64 } 64 }
@@ -217,7 +217,7 @@ static int prism2_wep_decrypt(struct sk_buff *skb, int hdr_len, void *priv)
217 memmove(skb->data + 4, skb->data, hdr_len); 217 memmove(skb->data + 4, skb->data, hdr_len);
218 skb_pull(skb, 4); 218 skb_pull(skb, 4);
219 skb_trim(skb, skb->len - 4); 219 skb_trim(skb, skb->len - 4);
220 return 0; 220 return 0;
221} 221}
222 222
223 223
@@ -248,7 +248,7 @@ static int prism2_wep_get_key(void *key, int len, u8 *seq, void *priv)
248} 248}
249 249
250 250
251static char * prism2_wep_print_stats(char *p, void *priv) 251static char *prism2_wep_print_stats(char *p, void *priv)
252{ 252{
253 struct prism2_wep_data *wep = priv; 253 struct prism2_wep_data *wep = priv;
254 p += sprintf(p, "key[%d] alg=WEP len=%d\n", 254 p += sprintf(p, "key[%d] alg=WEP len=%d\n",
@@ -289,5 +289,5 @@ void ieee80211_crypto_wep_exit(void)
289void ieee80211_wep_null(void) 289void ieee80211_wep_null(void)
290{ 290{
291// printk("============>%s()\n", __func__); 291// printk("============>%s()\n", __func__);
292 return; 292 return;
293} 293}
diff --git a/drivers/staging/rtl8187se/ieee80211/ieee80211_module.c b/drivers/staging/rtl8187se/ieee80211/ieee80211_module.c
index 9422573bfeaa..4358c4b0ca60 100644
--- a/drivers/staging/rtl8187se/ieee80211/ieee80211_module.c
+++ b/drivers/staging/rtl8187se/ieee80211/ieee80211_module.c
@@ -48,7 +48,7 @@
48#include <linux/types.h> 48#include <linux/types.h>
49#include <linux/wireless.h> 49#include <linux/wireless.h>
50#include <linux/etherdevice.h> 50#include <linux/etherdevice.h>
51#include <asm/uaccess.h> 51#include <linux/uaccess.h>
52#include <net/arp.h> 52#include <net/arp.h>
53#include <net/net_namespace.h> 53#include <net/net_namespace.h>
54 54
@@ -69,8 +69,7 @@ static inline int ieee80211_networks_allocate(struct ieee80211_device *ieee)
69 MAX_NETWORK_COUNT, sizeof(struct ieee80211_network), 69 MAX_NETWORK_COUNT, sizeof(struct ieee80211_network),
70 GFP_KERNEL); 70 GFP_KERNEL);
71 if (!ieee->networks) { 71 if (!ieee->networks) {
72 printk(KERN_WARNING "%s: Out of memory allocating beacons\n", 72 netdev_warn(ieee->dev, "Out of memory allocating beacons\n");
73 ieee->dev->name);
74 return -ENOMEM; 73 return -ENOMEM;
75 } 74 }
76 75
@@ -100,7 +99,7 @@ struct net_device *alloc_ieee80211(int sizeof_priv)
100{ 99{
101 struct ieee80211_device *ieee; 100 struct ieee80211_device *ieee;
102 struct net_device *dev; 101 struct net_device *dev;
103 int i,err; 102 int i, err;
104 103
105 IEEE80211_DEBUG_INFO("Initializing...\n"); 104 IEEE80211_DEBUG_INFO("Initializing...\n");
106 105
@@ -140,11 +139,11 @@ struct net_device *alloc_ieee80211(int sizeof_priv)
140 spin_lock_init(&ieee->wpax_suitlist_lock); 139 spin_lock_init(&ieee->wpax_suitlist_lock);
141 140
142 ieee->wpax_type_set = 0; 141 ieee->wpax_type_set = 0;
143 ieee->wpa_enabled = 0; 142 ieee->wpa_enabled = 0;
144 ieee->tkip_countermeasures = 0; 143 ieee->tkip_countermeasures = 0;
145 ieee->drop_unencrypted = 0; 144 ieee->drop_unencrypted = 0;
146 ieee->privacy_invoked = 0; 145 ieee->privacy_invoked = 0;
147 ieee->ieee802_1x = 1; 146 ieee->ieee802_1x = 1;
148 ieee->raw_tx = 0; 147 ieee->raw_tx = 0;
149 148
150 ieee80211_softmac_init(ieee); 149 ieee80211_softmac_init(ieee);
@@ -153,9 +152,9 @@ struct net_device *alloc_ieee80211(int sizeof_priv)
153 INIT_LIST_HEAD(&ieee->ibss_mac_hash[i]); 152 INIT_LIST_HEAD(&ieee->ibss_mac_hash[i]);
154 153
155 for (i = 0; i < 17; i++) { 154 for (i = 0; i < 17; i++) {
156 ieee->last_rxseq_num[i] = -1; 155 ieee->last_rxseq_num[i] = -1;
157 ieee->last_rxfrag_num[i] = -1; 156 ieee->last_rxfrag_num[i] = -1;
158 ieee->last_packet_time[i] = 0; 157 ieee->last_packet_time[i] = 0;
159 } 158 }
160//These function were added to load crypte module autoly 159//These function were added to load crypte module autoly
161 ieee80211_tkip_null(); 160 ieee80211_tkip_null();
diff --git a/drivers/staging/rtl8187se/ieee80211/ieee80211_rx.c b/drivers/staging/rtl8187se/ieee80211/ieee80211_rx.c
index 3a724496e748..446f15ec6396 100644
--- a/drivers/staging/rtl8187se/ieee80211/ieee80211_rx.c
+++ b/drivers/staging/rtl8187se/ieee80211/ieee80211_rx.c
@@ -39,7 +39,7 @@
39#include <linux/types.h> 39#include <linux/types.h>
40#include <linux/wireless.h> 40#include <linux/wireless.h>
41#include <linux/etherdevice.h> 41#include <linux/etherdevice.h>
42#include <asm/uaccess.h> 42#include <linux/uaccess.h>
43#include <linux/ctype.h> 43#include <linux/ctype.h>
44 44
45#include "ieee80211.h" 45#include "ieee80211.h"
@@ -65,7 +65,7 @@ static inline void ieee80211_monitor_rx(struct ieee80211_device *ieee,
65/* Called only as a tasklet (software IRQ) */ 65/* Called only as a tasklet (software IRQ) */
66static struct ieee80211_frag_entry * 66static struct ieee80211_frag_entry *
67ieee80211_frag_cache_find(struct ieee80211_device *ieee, unsigned int seq, 67ieee80211_frag_cache_find(struct ieee80211_device *ieee, unsigned int seq,
68 unsigned int frag, u8 tid,u8 *src, u8 *dst) 68 unsigned int frag, u8 tid, u8 *src, u8 *dst)
69{ 69{
70 struct ieee80211_frag_entry *entry; 70 struct ieee80211_frag_entry *entry;
71 int i; 71 int i;
@@ -107,18 +107,18 @@ ieee80211_frag_cache_get(struct ieee80211_device *ieee,
107 struct ieee80211_hdr_4addrqos *hdr_4addrqos; 107 struct ieee80211_hdr_4addrqos *hdr_4addrqos;
108 u8 tid; 108 u8 tid;
109 109
110 if (((fc & IEEE80211_FCTL_DSTODS) == IEEE80211_FCTL_DSTODS)&&IEEE80211_QOS_HAS_SEQ(fc)) { 110 if (((fc & IEEE80211_FCTL_DSTODS) == IEEE80211_FCTL_DSTODS) && IEEE80211_QOS_HAS_SEQ(fc)) {
111 hdr_4addrqos = (struct ieee80211_hdr_4addrqos *)hdr; 111 hdr_4addrqos = (struct ieee80211_hdr_4addrqos *)hdr;
112 tid = le16_to_cpu(hdr_4addrqos->qos_ctl) & IEEE80211_QOS_TID; 112 tid = le16_to_cpu(hdr_4addrqos->qos_ctl) & IEEE80211_QOS_TID;
113 tid = UP2AC(tid); 113 tid = UP2AC(tid);
114 tid ++; 114 tid++;
115 } else if (IEEE80211_QOS_HAS_SEQ(fc)) { 115 } else if (IEEE80211_QOS_HAS_SEQ(fc)) {
116 hdr_3addrqos = (struct ieee80211_hdr_3addrqos *)hdr; 116 hdr_3addrqos = (struct ieee80211_hdr_3addrqos *)hdr;
117 tid = le16_to_cpu(hdr_3addrqos->qos_ctl) & IEEE80211_QOS_TID; 117 tid = le16_to_cpu(hdr_3addrqos->qos_ctl) & IEEE80211_QOS_TID;
118 tid = UP2AC(tid); 118 tid = UP2AC(tid);
119 tid ++; 119 tid++;
120 } else { 120 } else {
121 tid = 0; 121 tid = 0;
122 } 122 }
123 123
124 if (frag == 0) { 124 if (frag == 0) {
@@ -129,7 +129,7 @@ ieee80211_frag_cache_get(struct ieee80211_device *ieee,
129 2 /* alignment */ + 129 2 /* alignment */ +
130 8 /* WEP */ + 130 8 /* WEP */ +
131 ETH_ALEN /* WDS */ + 131 ETH_ALEN /* WDS */ +
132 (IEEE80211_QOS_HAS_SEQ(fc)?2:0) /* QOS Control */); 132 (IEEE80211_QOS_HAS_SEQ(fc) ? 2 : 0) /* QOS Control */);
133 if (skb == NULL) 133 if (skb == NULL)
134 return NULL; 134 return NULL;
135 135
@@ -150,7 +150,7 @@ ieee80211_frag_cache_get(struct ieee80211_device *ieee,
150 } else { 150 } else {
151 /* received a fragment of a frame for which the head fragment 151 /* received a fragment of a frame for which the head fragment
152 * should have already been received */ 152 * should have already been received */
153 entry = ieee80211_frag_cache_find(ieee, seq, frag, tid,hdr->addr2, 153 entry = ieee80211_frag_cache_find(ieee, seq, frag, tid, hdr->addr2,
154 hdr->addr1); 154 hdr->addr1);
155 if (entry != NULL) { 155 if (entry != NULL) {
156 entry->last_frag = frag; 156 entry->last_frag = frag;
@@ -174,21 +174,21 @@ static int ieee80211_frag_cache_invalidate(struct ieee80211_device *ieee,
174 struct ieee80211_hdr_4addrqos *hdr_4addrqos; 174 struct ieee80211_hdr_4addrqos *hdr_4addrqos;
175 u8 tid; 175 u8 tid;
176 176
177 if(((fc & IEEE80211_FCTL_DSTODS) == IEEE80211_FCTL_DSTODS)&&IEEE80211_QOS_HAS_SEQ(fc)) { 177 if (((fc & IEEE80211_FCTL_DSTODS) == IEEE80211_FCTL_DSTODS) && IEEE80211_QOS_HAS_SEQ(fc)) {
178 hdr_4addrqos = (struct ieee80211_hdr_4addrqos *)hdr; 178 hdr_4addrqos = (struct ieee80211_hdr_4addrqos *)hdr;
179 tid = le16_to_cpu(hdr_4addrqos->qos_ctl) & IEEE80211_QOS_TID; 179 tid = le16_to_cpu(hdr_4addrqos->qos_ctl) & IEEE80211_QOS_TID;
180 tid = UP2AC(tid); 180 tid = UP2AC(tid);
181 tid ++; 181 tid++;
182 } else if (IEEE80211_QOS_HAS_SEQ(fc)) { 182 } else if (IEEE80211_QOS_HAS_SEQ(fc)) {
183 hdr_3addrqos = (struct ieee80211_hdr_3addrqos *)hdr; 183 hdr_3addrqos = (struct ieee80211_hdr_3addrqos *)hdr;
184 tid = le16_to_cpu(hdr_3addrqos->qos_ctl) & IEEE80211_QOS_TID; 184 tid = le16_to_cpu(hdr_3addrqos->qos_ctl) & IEEE80211_QOS_TID;
185 tid = UP2AC(tid); 185 tid = UP2AC(tid);
186 tid ++; 186 tid++;
187 } else { 187 } else {
188 tid = 0; 188 tid = 0;
189 } 189 }
190 190
191 entry = ieee80211_frag_cache_find(ieee, seq, -1, tid,hdr->addr2, 191 entry = ieee80211_frag_cache_find(ieee, seq, -1, tid, hdr->addr2,
192 hdr->addr1); 192 hdr->addr1);
193 193
194 if (entry == NULL) { 194 if (entry == NULL) {
@@ -227,7 +227,7 @@ ieee80211_rx_frame_mgmt(struct ieee80211_device *ieee, struct sk_buff *skb,
227 ieee80211_rx_mgt(ieee, (struct ieee80211_hdr_4addr *)skb->data, 227 ieee80211_rx_mgt(ieee, (struct ieee80211_hdr_4addr *)skb->data,
228 rx_stats); 228 rx_stats);
229 229
230 if((ieee->state == IEEE80211_LINKED)&&(memcmp(hdr->addr3,ieee->current_network.bssid,ETH_ALEN))) { 230 if ((ieee->state == IEEE80211_LINKED) && (memcmp(hdr->addr3, ieee->current_network.bssid, ETH_ALEN))) {
231 dev_kfree_skb_any(skb); 231 dev_kfree_skb_any(skb);
232 return 0; 232 return 0;
233 } 233 }
@@ -244,11 +244,9 @@ ieee80211_rx_frame_mgmt(struct ieee80211_device *ieee, struct sk_buff *skb,
244 244
245/* See IEEE 802.1H for LLC/SNAP encapsulation/decapsulation */ 245/* See IEEE 802.1H for LLC/SNAP encapsulation/decapsulation */
246/* Ethernet-II snap header (RFC1042 for most EtherTypes) */ 246/* Ethernet-II snap header (RFC1042 for most EtherTypes) */
247static unsigned char rfc1042_header[] = 247static unsigned char rfc1042_header[] = { 0xaa, 0xaa, 0x03, 0x00, 0x00, 0x00 };
248{ 0xaa, 0xaa, 0x03, 0x00, 0x00, 0x00 };
249/* Bridge-Tunnel header (for EtherTypes ETH_P_AARP and ETH_P_IPX) */ 248/* Bridge-Tunnel header (for EtherTypes ETH_P_AARP and ETH_P_IPX) */
250static unsigned char bridge_tunnel_header[] = 249static unsigned char bridge_tunnel_header[] = { 0xaa, 0xaa, 0x03, 0x00, 0x00, 0xf8 };
251{ 0xaa, 0xaa, 0x03, 0x00, 0x00, 0xf8 };
252/* No encapsulation header if EtherType < 0x600 (=length) */ 250/* No encapsulation header if EtherType < 0x600 (=length) */
253 251
254/* Called by ieee80211_rx_frame_decrypt */ 252/* Called by ieee80211_rx_frame_decrypt */
@@ -294,7 +292,7 @@ static int ieee80211_is_eapol_frame(struct ieee80211_device *ieee,
294 292
295/* Called only as a tasklet (software IRQ), by ieee80211_rx */ 293/* Called only as a tasklet (software IRQ), by ieee80211_rx */
296static inline int 294static inline int
297ieee80211_rx_frame_decrypt(struct ieee80211_device* ieee, struct sk_buff *skb, 295ieee80211_rx_frame_decrypt(struct ieee80211_device *ieee, struct sk_buff *skb,
298 struct ieee80211_crypt_data *crypt) 296 struct ieee80211_crypt_data *crypt)
299{ 297{
300 struct ieee80211_hdr_4addr *hdr; 298 struct ieee80211_hdr_4addr *hdr;
@@ -310,9 +308,9 @@ ieee80211_rx_frame_decrypt(struct ieee80211_device* ieee, struct sk_buff *skb,
310 if (ieee->tkip_countermeasures && 308 if (ieee->tkip_countermeasures &&
311 strcmp(crypt->ops->name, "TKIP") == 0) { 309 strcmp(crypt->ops->name, "TKIP") == 0) {
312 if (net_ratelimit()) { 310 if (net_ratelimit()) {
313 printk(KERN_DEBUG "%s: TKIP countermeasures: dropped " 311 netdev_dbg(ieee->dev,
314 "received packet from %pM\n", 312 "TKIP countermeasures: dropped received packet from %pM\n",
315 ieee->dev->name, hdr->addr2); 313 ieee->dev->name, hdr->addr2);
316 } 314 }
317 return -1; 315 return -1;
318 } 316 }
@@ -339,7 +337,7 @@ ieee80211_rx_frame_decrypt(struct ieee80211_device* ieee, struct sk_buff *skb,
339 337
340/* Called only as a tasklet (software IRQ), by ieee80211_rx */ 338/* Called only as a tasklet (software IRQ), by ieee80211_rx */
341static inline int 339static inline int
342ieee80211_rx_frame_decrypt_msdu(struct ieee80211_device* ieee, struct sk_buff *skb, 340ieee80211_rx_frame_decrypt_msdu(struct ieee80211_device *ieee, struct sk_buff *skb,
343 int keyidx, struct ieee80211_crypt_data *crypt) 341 int keyidx, struct ieee80211_crypt_data *crypt)
344{ 342{
345 struct ieee80211_hdr_4addr *hdr; 343 struct ieee80211_hdr_4addr *hdr;
@@ -355,9 +353,9 @@ ieee80211_rx_frame_decrypt_msdu(struct ieee80211_device* ieee, struct sk_buff *s
355 res = crypt->ops->decrypt_msdu(skb, keyidx, hdrlen, crypt->priv); 353 res = crypt->ops->decrypt_msdu(skb, keyidx, hdrlen, crypt->priv);
356 atomic_dec(&crypt->refcnt); 354 atomic_dec(&crypt->refcnt);
357 if (res < 0) { 355 if (res < 0) {
358 printk(KERN_DEBUG "%s: MSDU decryption/MIC verification failed" 356 netdev_dbg(ieee->dev,
359 " (SA=%pM keyidx=%d)\n", 357 "MSDU decryption/MIC verification failed (SA=%pM keyidx=%d)\n",
360 ieee->dev->name, hdr->addr2, keyidx); 358 hdr->addr2, keyidx);
361 return -1; 359 return -1;
362 } 360 }
363 361
@@ -381,18 +379,18 @@ static int is_duplicate_packet(struct ieee80211_device *ieee,
381 u8 tid; 379 u8 tid;
382 380
383 //TO2DS and QoS 381 //TO2DS and QoS
384 if(((fc & IEEE80211_FCTL_DSTODS) == IEEE80211_FCTL_DSTODS)&&IEEE80211_QOS_HAS_SEQ(fc)) { 382 if (((fc & IEEE80211_FCTL_DSTODS) == IEEE80211_FCTL_DSTODS) && IEEE80211_QOS_HAS_SEQ(fc)) {
385 hdr_4addrqos = (struct ieee80211_hdr_4addrqos *)header; 383 hdr_4addrqos = (struct ieee80211_hdr_4addrqos *)header;
386 tid = le16_to_cpu(hdr_4addrqos->qos_ctl) & IEEE80211_QOS_TID; 384 tid = le16_to_cpu(hdr_4addrqos->qos_ctl) & IEEE80211_QOS_TID;
387 tid = UP2AC(tid); 385 tid = UP2AC(tid);
388 tid ++; 386 tid++;
389 } else if(IEEE80211_QOS_HAS_SEQ(fc)) { //QoS 387 } else if (IEEE80211_QOS_HAS_SEQ(fc)) { //QoS
390 hdr_3addrqos = (struct ieee80211_hdr_3addrqos *)header; 388 hdr_3addrqos = (struct ieee80211_hdr_3addrqos *)header;
391 tid = le16_to_cpu(hdr_3addrqos->qos_ctl) & IEEE80211_QOS_TID; 389 tid = le16_to_cpu(hdr_3addrqos->qos_ctl) & IEEE80211_QOS_TID;
392 tid = UP2AC(tid); 390 tid = UP2AC(tid);
393 tid ++; 391 tid++;
394 } else { // no QoS 392 } else { // no QoS
395 tid = 0; 393 tid = 0;
396 } 394 }
397 switch (ieee->iw_mode) { 395 switch (ieee->iw_mode) {
398 case IW_MODE_ADHOC: 396 case IW_MODE_ADHOC:
@@ -411,7 +409,8 @@ static int is_duplicate_packet(struct ieee80211_device *ieee,
411 if (p == &ieee->ibss_mac_hash[index]) { 409 if (p == &ieee->ibss_mac_hash[index]) {
412 entry = kmalloc(sizeof(struct ieee_ibss_seq), GFP_ATOMIC); 410 entry = kmalloc(sizeof(struct ieee_ibss_seq), GFP_ATOMIC);
413 if (!entry) { 411 if (!entry) {
414 printk(KERN_WARNING "Cannot malloc new mac entry\n"); 412 netdev_warn(ieee->dev,
413 "Cannot malloc new mac entry\n");
415 return 0; 414 return 0;
416 } 415 }
417 memcpy(entry->mac, mac, ETH_ALEN); 416 memcpy(entry->mac, mac, ETH_ALEN);
@@ -442,7 +441,7 @@ static int is_duplicate_packet(struct ieee80211_device *ieee,
442// } 441// }
443 if ((*last_seq == seq) && 442 if ((*last_seq == seq) &&
444 time_after(*last_time + IEEE_PACKET_RETRY_TIME, jiffies)) { 443 time_after(*last_time + IEEE_PACKET_RETRY_TIME, jiffies)) {
445 if (*last_frag == frag){ 444 if (*last_frag == frag) {
446 //printk(KERN_WARNING "[1] go drop!\n"); 445 //printk(KERN_WARNING "[1] go drop!\n");
447 goto drop; 446 goto drop;
448 447
@@ -493,8 +492,7 @@ int ieee80211_rtl_rx(struct ieee80211_device *ieee, struct sk_buff *skb,
493 stats = &ieee->stats; 492 stats = &ieee->stats;
494 493
495 if (skb->len < 10) { 494 if (skb->len < 10) {
496 printk(KERN_INFO "%s: SKB length < 10\n", 495 netdev_info(ieee->dev, "SKB length < 10\n");
497 dev->name);
498 goto rx_dropped; 496 goto rx_dropped;
499 } 497 }
500 498
@@ -506,19 +504,12 @@ int ieee80211_rtl_rx(struct ieee80211_device *ieee, struct sk_buff *skb,
506 frag = WLAN_GET_SEQ_FRAG(sc); 504 frag = WLAN_GET_SEQ_FRAG(sc);
507 505
508//YJ,add,080828,for keep alive 506//YJ,add,080828,for keep alive
509 if((fc & IEEE80211_FCTL_TODS) != IEEE80211_FCTL_TODS) 507 if ((fc & IEEE80211_FCTL_TODS) != IEEE80211_FCTL_TODS) {
510 { 508 if (!memcmp(hdr->addr1, dev->dev_addr, ETH_ALEN))
511 if(!memcmp(hdr->addr1,dev->dev_addr, ETH_ALEN))
512 {
513 ieee->NumRxUnicast++; 509 ieee->NumRxUnicast++;
514 } 510 } else {
515 } 511 if (!memcmp(hdr->addr3, dev->dev_addr, ETH_ALEN))
516 else
517 {
518 if(!memcmp(hdr->addr3, dev->dev_addr, ETH_ALEN))
519 {
520 ieee->NumRxUnicast++; 512 ieee->NumRxUnicast++;
521 }
522 } 513 }
523//YJ,add,080828,for keep alive,end 514//YJ,add,080828,for keep alive,end
524 515
@@ -577,12 +568,12 @@ int ieee80211_rtl_rx(struct ieee80211_device *ieee, struct sk_buff *skb,
577 case IEEE80211_FCTL_FROMDS: 568 case IEEE80211_FCTL_FROMDS:
578 memcpy(dst, hdr->addr1, ETH_ALEN); 569 memcpy(dst, hdr->addr1, ETH_ALEN);
579 memcpy(src, hdr->addr3, ETH_ALEN); 570 memcpy(src, hdr->addr3, ETH_ALEN);
580 memcpy(bssid,hdr->addr2,ETH_ALEN); 571 memcpy(bssid, hdr->addr2, ETH_ALEN);
581 break; 572 break;
582 case IEEE80211_FCTL_TODS: 573 case IEEE80211_FCTL_TODS:
583 memcpy(dst, hdr->addr3, ETH_ALEN); 574 memcpy(dst, hdr->addr3, ETH_ALEN);
584 memcpy(src, hdr->addr2, ETH_ALEN); 575 memcpy(src, hdr->addr2, ETH_ALEN);
585 memcpy(bssid,hdr->addr1,ETH_ALEN); 576 memcpy(bssid, hdr->addr1, ETH_ALEN);
586 break; 577 break;
587 case IEEE80211_FCTL_FROMDS | IEEE80211_FCTL_TODS: 578 case IEEE80211_FCTL_FROMDS | IEEE80211_FCTL_TODS:
588 if (skb->len < IEEE80211_DATA_HDR4_LEN) 579 if (skb->len < IEEE80211_DATA_HDR4_LEN)
@@ -594,7 +585,7 @@ int ieee80211_rtl_rx(struct ieee80211_device *ieee, struct sk_buff *skb,
594 case 0: 585 case 0:
595 memcpy(dst, hdr->addr1, ETH_ALEN); 586 memcpy(dst, hdr->addr1, ETH_ALEN);
596 memcpy(src, hdr->addr2, ETH_ALEN); 587 memcpy(src, hdr->addr2, ETH_ALEN);
597 memcpy(bssid,hdr->addr3,ETH_ALEN); 588 memcpy(bssid, hdr->addr3, ETH_ALEN);
598 break; 589 break;
599 } 590 }
600 591
@@ -607,7 +598,7 @@ int ieee80211_rtl_rx(struct ieee80211_device *ieee, struct sk_buff *skb,
607 if (stype != IEEE80211_STYPE_DATA && 598 if (stype != IEEE80211_STYPE_DATA &&
608 stype != IEEE80211_STYPE_DATA_CFACK && 599 stype != IEEE80211_STYPE_DATA_CFACK &&
609 stype != IEEE80211_STYPE_DATA_CFPOLL && 600 stype != IEEE80211_STYPE_DATA_CFPOLL &&
610 stype != IEEE80211_STYPE_DATA_CFACKPOLL&& 601 stype != IEEE80211_STYPE_DATA_CFACKPOLL &&
611 stype != IEEE80211_STYPE_QOS_DATA//add by David,2006.8.4 602 stype != IEEE80211_STYPE_QOS_DATA//add by David,2006.8.4
612 ) { 603 ) {
613 if (stype != IEEE80211_STYPE_NULLFUNC) 604 if (stype != IEEE80211_STYPE_NULLFUNC)
@@ -618,9 +609,8 @@ int ieee80211_rtl_rx(struct ieee80211_device *ieee, struct sk_buff *skb,
618 type, stype, skb->len); 609 type, stype, skb->len);
619 goto rx_dropped; 610 goto rx_dropped;
620 } 611 }
621 if(memcmp(bssid,ieee->current_network.bssid,ETH_ALEN)) { 612 if (memcmp(bssid, ieee->current_network.bssid, ETH_ALEN))
622 goto rx_dropped; 613 goto rx_dropped;
623 }
624 614
625 ieee->NumRxDataInPeriod++; 615 ieee->NumRxDataInPeriod++;
626 ieee->NumRxOkTotal++; 616 ieee->NumRxOkTotal++;
@@ -653,9 +643,8 @@ int ieee80211_rtl_rx(struct ieee80211_device *ieee, struct sk_buff *skb,
653 flen -= hdrlen; 643 flen -= hdrlen;
654 644
655 if (frag_skb->tail + flen > frag_skb->end) { 645 if (frag_skb->tail + flen > frag_skb->end) {
656 printk(KERN_WARNING "%s: host decrypted and " 646 netdev_warn(ieee->dev,
657 "reassembled frame did not fit skb\n", 647 "host decrypted and reassembled frame did not fit skb\n");
658 dev->name);
659 ieee80211_frag_cache_invalidate(ieee, hdr); 648 ieee80211_frag_cache_invalidate(ieee, hdr);
660 goto rx_dropped; 649 goto rx_dropped;
661 } 650 }
@@ -804,7 +793,7 @@ static inline int ieee80211_is_ofdm_rate(u8 rate)
804 case IEEE80211_OFDM_RATE_54MB: 793 case IEEE80211_OFDM_RATE_54MB:
805 return 1; 794 return 1;
806 } 795 }
807 return 0; 796 return 0;
808} 797}
809 798
810static inline int ieee80211_SignalStrengthTranslate( 799static inline int ieee80211_SignalStrengthTranslate(
@@ -814,46 +803,27 @@ static inline int ieee80211_SignalStrengthTranslate(
814 int RetSS; 803 int RetSS;
815 804
816 // Step 1. Scale mapping. 805 // Step 1. Scale mapping.
817 if(CurrSS >= 71 && CurrSS <= 100) 806 if (CurrSS >= 71 && CurrSS <= 100)
818 {
819 RetSS = 90 + ((CurrSS - 70) / 3); 807 RetSS = 90 + ((CurrSS - 70) / 3);
820 } 808 else if (CurrSS >= 41 && CurrSS <= 70)
821 else if(CurrSS >= 41 && CurrSS <= 70)
822 {
823 RetSS = 78 + ((CurrSS - 40) / 3); 809 RetSS = 78 + ((CurrSS - 40) / 3);
824 } 810 else if (CurrSS >= 31 && CurrSS <= 40)
825 else if(CurrSS >= 31 && CurrSS <= 40)
826 {
827 RetSS = 66 + (CurrSS - 30); 811 RetSS = 66 + (CurrSS - 30);
828 } 812 else if (CurrSS >= 21 && CurrSS <= 30)
829 else if(CurrSS >= 21 && CurrSS <= 30)
830 {
831 RetSS = 54 + (CurrSS - 20); 813 RetSS = 54 + (CurrSS - 20);
832 } 814 else if (CurrSS >= 5 && CurrSS <= 20)
833 else if(CurrSS >= 5 && CurrSS <= 20)
834 {
835 RetSS = 42 + (((CurrSS - 5) * 2) / 3); 815 RetSS = 42 + (((CurrSS - 5) * 2) / 3);
836 } 816 else if (CurrSS == 4)
837 else if(CurrSS == 4)
838 {
839 RetSS = 36; 817 RetSS = 36;
840 } 818 else if (CurrSS == 3)
841 else if(CurrSS == 3)
842 {
843 RetSS = 27; 819 RetSS = 27;
844 } 820 else if (CurrSS == 2)
845 else if(CurrSS == 2)
846 {
847 RetSS = 18; 821 RetSS = 18;
848 } 822 else if (CurrSS == 1)
849 else if(CurrSS == 1)
850 {
851 RetSS = 9; 823 RetSS = 9;
852 }
853 else 824 else
854 {
855 RetSS = CurrSS; 825 RetSS = CurrSS;
856 } 826
857 //RT_TRACE(COMP_DBG, DBG_LOUD, ("##### After Mapping: LastSS: %d, CurrSS: %d, RetSS: %d\n", LastSS, CurrSS, RetSS)); 827 //RT_TRACE(COMP_DBG, DBG_LOUD, ("##### After Mapping: LastSS: %d, CurrSS: %d, RetSS: %d\n", LastSS, CurrSS, RetSS));
858 828
859 // Step 2. Smoothing. 829 // Step 2. Smoothing.
@@ -867,20 +837,16 @@ static inline void ieee80211_extract_country_ie(
867 struct ieee80211_device *ieee, 837 struct ieee80211_device *ieee,
868 struct ieee80211_info_element *info_element, 838 struct ieee80211_info_element *info_element,
869 struct ieee80211_network *network, 839 struct ieee80211_network *network,
870 u8 * addr2 840 u8 *addr2
871) 841)
872{ 842{
873 if(IS_DOT11D_ENABLE(ieee)) 843 if (IS_DOT11D_ENABLE(ieee)) {
874 { 844 if (info_element->len != 0) {
875 if(info_element->len!= 0)
876 {
877 memcpy(network->CountryIeBuf, info_element->data, info_element->len); 845 memcpy(network->CountryIeBuf, info_element->data, info_element->len);
878 network->CountryIeLen = info_element->len; 846 network->CountryIeLen = info_element->len;
879 847
880 if(!IS_COUNTRY_IE_VALID(ieee)) 848 if (!IS_COUNTRY_IE_VALID(ieee))
881 {
882 Dot11d_UpdateCountryIe(ieee, addr2, info_element->len, info_element->data); 849 Dot11d_UpdateCountryIe(ieee, addr2, info_element->len, info_element->data);
883 }
884 } 850 }
885 851
886 // 852 //
@@ -888,10 +854,8 @@ static inline void ieee80211_extract_country_ie(
888 // some AP (e.g. Cisco 1242) don't include country IE in their 854 // some AP (e.g. Cisco 1242) don't include country IE in their
889 // probe response frame. 855 // probe response frame.
890 // 856 //
891 if(IS_EQUAL_CIE_SRC(ieee, addr2) ) 857 if (IS_EQUAL_CIE_SRC(ieee, addr2))
892 {
893 UPDATE_CIE_WATCHDOG(ieee); 858 UPDATE_CIE_WATCHDOG(ieee);
894 }
895 } 859 }
896 860
897} 861}
@@ -920,10 +884,10 @@ inline int ieee80211_network_init(
920 char *p; 884 char *p;
921#endif 885#endif
922 struct ieee80211_info_element *info_element; 886 struct ieee80211_info_element *info_element;
923 u16 left; 887 u16 left;
924 u8 i; 888 u8 i;
925 short offset; 889 short offset;
926 u8 curRate = 0,hOpRate = 0,curRate_ex = 0; 890 u8 curRate = 0, hOpRate = 0, curRate_ex = 0;
927 891
928 /* Pull out fixed field data */ 892 /* Pull out fixed field data */
929 memcpy(network->bssid, beacon->header.addr3, ETH_ALEN); 893 memcpy(network->bssid, beacon->header.addr3, ETH_ALEN);
@@ -953,10 +917,10 @@ inline int ieee80211_network_init(
953 } else 917 } else
954 network->flags |= NETWORK_HAS_CCK; 918 network->flags |= NETWORK_HAS_CCK;
955 919
956 network->wpa_ie_len = 0; 920 network->wpa_ie_len = 0;
957 network->rsn_ie_len = 0; 921 network->rsn_ie_len = 0;
958 922
959 info_element = &beacon->info_element; 923 info_element = &beacon->info_element;
960 left = stats->len - ((void *)info_element - (void *)beacon); 924 left = stats->len - ((void *)info_element - (void *)beacon);
961 while (left >= sizeof(struct ieee80211_info_element_hdr)) { 925 while (left >= sizeof(struct ieee80211_info_element_hdr)) {
962 if (sizeof(struct ieee80211_info_element_hdr) + info_element->len > left) { 926 if (sizeof(struct ieee80211_info_element_hdr) + info_element->len > left) {
@@ -964,7 +928,7 @@ inline int ieee80211_network_init(
964 info_element->len + sizeof(struct ieee80211_info_element), 928 info_element->len + sizeof(struct ieee80211_info_element),
965 left); 929 left);
966 return 1; 930 return 1;
967 } 931 }
968 932
969 switch (info_element->id) { 933 switch (info_element->id) {
970 case MFIE_TYPE_SSID: 934 case MFIE_TYPE_SSID:
@@ -977,8 +941,8 @@ inline int ieee80211_network_init(
977 network->ssid_len = min(info_element->len, 941 network->ssid_len = min(info_element->len,
978 (u8)IW_ESSID_MAX_SIZE); 942 (u8)IW_ESSID_MAX_SIZE);
979 memcpy(network->ssid, info_element->data, network->ssid_len); 943 memcpy(network->ssid, info_element->data, network->ssid_len);
980 if (network->ssid_len < IW_ESSID_MAX_SIZE) 944 if (network->ssid_len < IW_ESSID_MAX_SIZE)
981 memset(network->ssid + network->ssid_len, 0, 945 memset(network->ssid + network->ssid_len, 0,
982 IW_ESSID_MAX_SIZE - network->ssid_len); 946 IW_ESSID_MAX_SIZE - network->ssid_len);
983 947
984 IEEE80211_DEBUG_SCAN("MFIE_TYPE_SSID: '%s' len=%d.\n", 948 IEEE80211_DEBUG_SCAN("MFIE_TYPE_SSID: '%s' len=%d.\n",
@@ -993,7 +957,7 @@ inline int ieee80211_network_init(
993 for (i = 0; i < network->rates_len; i++) { 957 for (i = 0; i < network->rates_len; i++) {
994 network->rates[i] = info_element->data[i]; 958 network->rates[i] = info_element->data[i];
995 curRate = network->rates[i] & 0x7f; 959 curRate = network->rates[i] & 0x7f;
996 if( hOpRate < curRate ) 960 if (hOpRate < curRate)
997 hOpRate = curRate; 961 hOpRate = curRate;
998#ifdef CONFIG_IEEE80211_DEBUG 962#ifdef CONFIG_IEEE80211_DEBUG
999 p += snprintf(p, sizeof(rates_str) - (p - rates_str), "%02X ", network->rates[i]); 963 p += snprintf(p, sizeof(rates_str) - (p - rates_str), "%02X ", network->rates[i]);
@@ -1019,7 +983,7 @@ inline int ieee80211_network_init(
1019 for (i = 0; i < network->rates_ex_len; i++) { 983 for (i = 0; i < network->rates_ex_len; i++) {
1020 network->rates_ex[i] = info_element->data[i]; 984 network->rates_ex[i] = info_element->data[i];
1021 curRate_ex = network->rates_ex[i] & 0x7f; 985 curRate_ex = network->rates_ex[i] & 0x7f;
1022 if( hOpRate < curRate_ex ) 986 if (hOpRate < curRate_ex)
1023 hOpRate = curRate_ex; 987 hOpRate = curRate_ex;
1024#ifdef CONFIG_IEEE80211_DEBUG 988#ifdef CONFIG_IEEE80211_DEBUG
1025 p += snprintf(p, sizeof(rates_str) - (p - rates_str), "%02X ", network->rates[i]); 989 p += snprintf(p, sizeof(rates_str) - (p - rates_str), "%02X ", network->rates[i]);
@@ -1038,14 +1002,14 @@ inline int ieee80211_network_init(
1038 break; 1002 break;
1039 1003
1040 case MFIE_TYPE_DS_SET: 1004 case MFIE_TYPE_DS_SET:
1041 IEEE80211_DEBUG_SCAN("MFIE_TYPE_DS_SET: %d\n", 1005 IEEE80211_DEBUG_SCAN("MFIE_TYPE_DS_SET: %d\n",
1042 info_element->data[0]); 1006 info_element->data[0]);
1043 if (stats->freq == IEEE80211_24GHZ_BAND) 1007 if (stats->freq == IEEE80211_24GHZ_BAND)
1044 network->channel = info_element->data[0]; 1008 network->channel = info_element->data[0];
1045 break; 1009 break;
1046 1010
1047 case MFIE_TYPE_FH_SET: 1011 case MFIE_TYPE_FH_SET:
1048 IEEE80211_DEBUG_SCAN("MFIE_TYPE_FH_SET: ignored\n"); 1012 IEEE80211_DEBUG_SCAN("MFIE_TYPE_FH_SET: ignored\n");
1049 break; 1013 break;
1050 1014
1051 case MFIE_TYPE_CF_SET: 1015 case MFIE_TYPE_CF_SET:
@@ -1054,12 +1018,12 @@ inline int ieee80211_network_init(
1054 1018
1055 case MFIE_TYPE_TIM: 1019 case MFIE_TYPE_TIM:
1056 1020
1057 if(info_element->len < 4) 1021 if (info_element->len < 4)
1058 break; 1022 break;
1059 1023
1060 network->dtim_period = info_element->data[1]; 1024 network->dtim_period = info_element->data[1];
1061 1025
1062 if(ieee->state != IEEE80211_LINKED) 1026 if (ieee->state != IEEE80211_LINKED)
1063 break; 1027 break;
1064 1028
1065 network->last_dtim_sta_time[0] = jiffies; 1029 network->last_dtim_sta_time[0] = jiffies;
@@ -1067,10 +1031,10 @@ inline int ieee80211_network_init(
1067 1031
1068 network->dtim_data = IEEE80211_DTIM_VALID; 1032 network->dtim_data = IEEE80211_DTIM_VALID;
1069 1033
1070 if(info_element->data[0] != 0) 1034 if (info_element->data[0] != 0)
1071 break; 1035 break;
1072 1036
1073 if(info_element->data[2] & 1) 1037 if (info_element->data[2] & 1)
1074 network->dtim_data |= IEEE80211_DTIM_MBCAST; 1038 network->dtim_data |= IEEE80211_DTIM_MBCAST;
1075 1039
1076 offset = (info_element->data[2] >> 1)*2; 1040 offset = (info_element->data[2] >> 1)*2;
@@ -1078,8 +1042,8 @@ inline int ieee80211_network_init(
1078 //printk("offset1:%x aid:%x\n",offset, ieee->assoc_id); 1042 //printk("offset1:%x aid:%x\n",offset, ieee->assoc_id);
1079 1043
1080 /* add and modified for ps 2008.1.22 */ 1044 /* add and modified for ps 2008.1.22 */
1081 if(ieee->assoc_id < 8*offset || 1045 if (ieee->assoc_id < 8*offset ||
1082 ieee->assoc_id > 8*(offset + info_element->len -3)) { 1046 ieee->assoc_id > 8*(offset + info_element->len - 3)) {
1083 break; 1047 break;
1084 } 1048 }
1085 1049
@@ -1089,9 +1053,9 @@ inline int ieee80211_network_init(
1089 // info_element->data[3+offset] , 1053 // info_element->data[3+offset] ,
1090 // info_element->data[3+offset] & (1<<(ieee->assoc_id%8))); 1054 // info_element->data[3+offset] & (1<<(ieee->assoc_id%8)));
1091 1055
1092 if(info_element->data[3+offset] & (1<<(ieee->assoc_id%8))) { 1056 if (info_element->data[3+offset] & (1<<(ieee->assoc_id%8)))
1093 network->dtim_data |= IEEE80211_DTIM_UCAST; 1057 network->dtim_data |= IEEE80211_DTIM_UCAST;
1094 } 1058
1095 break; 1059 break;
1096 1060
1097 case MFIE_TYPE_IBSS_SET: 1061 case MFIE_TYPE_IBSS_SET:
@@ -1125,9 +1089,8 @@ inline int ieee80211_network_init(
1125 info_element->data[4] == 0x02) { 1089 info_element->data[4] == 0x02) {
1126 network->Turbo_Enable = 1; 1090 network->Turbo_Enable = 1;
1127 } 1091 }
1128 if (1 == stats->nic_type) {//nic 87 1092 if (1 == stats->nic_type) //nic 87
1129 break; 1093 break;
1130 }
1131 1094
1132 if (info_element->len >= 5 && 1095 if (info_element->len >= 5 &&
1133 info_element->data[0] == 0x00 && 1096 info_element->data[0] == 0x00 &&
@@ -1152,7 +1115,7 @@ inline int ieee80211_network_init(
1152 //printk(KERN_WARNING "wmm info&param updated: %x\n", info_element->data[6]); 1115 //printk(KERN_WARNING "wmm info&param updated: %x\n", info_element->data[6]);
1153 network->wmm_info = info_element->data[6]; 1116 network->wmm_info = info_element->data[6];
1154 //WMM Parameter Element 1117 //WMM Parameter Element
1155 memcpy(network->wmm_param, (u8 *)(info_element->data + 8),(info_element->len - 8)); 1118 memcpy(network->wmm_param, (u8 *)(info_element->data + 8), (info_element->len - 8));
1156 network->QoS_Enable = 1; 1119 network->QoS_Enable = 1;
1157 } 1120 }
1158 break; 1121 break;
@@ -1174,14 +1137,14 @@ inline int ieee80211_network_init(
1174 default: 1137 default:
1175 IEEE80211_DEBUG_SCAN("unsupported IE %d\n", 1138 IEEE80211_DEBUG_SCAN("unsupported IE %d\n",
1176 info_element->id); 1139 info_element->id);
1177 break; 1140 break;
1178 } 1141 }
1179 1142
1180 left -= sizeof(struct ieee80211_info_element_hdr) + 1143 left -= sizeof(struct ieee80211_info_element_hdr) +
1181 info_element->len; 1144 info_element->len;
1182 info_element = (struct ieee80211_info_element *) 1145 info_element = (struct ieee80211_info_element *)
1183 &info_element->data[info_element->len]; 1146 &info_element->data[info_element->len];
1184 } 1147 }
1185//by amy 080312 1148//by amy 080312
1186 network->HighestOperaRate = hOpRate; 1149 network->HighestOperaRate = hOpRate;
1187//by amy 080312 1150//by amy 080312
@@ -1217,7 +1180,7 @@ inline int ieee80211_network_init(
1217 1180
1218static inline int is_same_network(struct ieee80211_network *src, 1181static inline int is_same_network(struct ieee80211_network *src,
1219 struct ieee80211_network *dst, 1182 struct ieee80211_network *dst,
1220 struct ieee80211_device * ieee) 1183 struct ieee80211_device *ieee)
1221{ 1184{
1222 /* A network is only a duplicate if the channel, BSSID, ESSID 1185 /* A network is only a duplicate if the channel, BSSID, ESSID
1223 * and the capability field (in particular IBSS and BSS) all match. 1186 * and the capability field (in particular IBSS and BSS) all match.
@@ -1241,12 +1204,11 @@ inline void update_network(struct ieee80211_network *dst,
1241 unsigned char quality = src->stats.signalstrength; 1204 unsigned char quality = src->stats.signalstrength;
1242 unsigned char signal = 0; 1205 unsigned char signal = 0;
1243 unsigned char noise = 0; 1206 unsigned char noise = 0;
1244 if(dst->stats.signalstrength > 0) { 1207 if (dst->stats.signalstrength > 0)
1245 quality = (dst->stats.signalstrength * 5 + src->stats.signalstrength + 5)/6; 1208 quality = (dst->stats.signalstrength * 5 + src->stats.signalstrength + 5)/6;
1246 }
1247 signal = ieee80211_TranslateToDbm(quality); 1209 signal = ieee80211_TranslateToDbm(quality);
1248 //noise = signal - src->stats.noise; 1210 //noise = signal - src->stats.noise;
1249 if(dst->stats.noise > 0) 1211 if (dst->stats.noise > 0)
1250 noise = (dst->stats.noise * 5 + src->stats.noise)/6; 1212 noise = (dst->stats.noise * 5 + src->stats.noise)/6;
1251 //if(strcmp(dst->ssid, "linksys_lzm000") == 0) 1213 //if(strcmp(dst->ssid, "linksys_lzm000") == 0)
1252// printk("ssid:%s, quality:%d, signal:%d\n", dst->ssid, quality, signal); 1214// printk("ssid:%s, quality:%d, signal:%d\n", dst->ssid, quality, signal);
@@ -1262,12 +1224,11 @@ inline void update_network(struct ieee80211_network *dst,
1262 dst->rates_len = src->rates_len; 1224 dst->rates_len = src->rates_len;
1263 memcpy(dst->rates_ex, src->rates_ex, src->rates_ex_len); 1225 memcpy(dst->rates_ex, src->rates_ex, src->rates_ex_len);
1264 dst->rates_ex_len = src->rates_ex_len; 1226 dst->rates_ex_len = src->rates_ex_len;
1265 dst->HighestOperaRate= src->HighestOperaRate; 1227 dst->HighestOperaRate = src->HighestOperaRate;
1266 //printk("==========>in %s: src->ssid is %s,chan is %d\n",__func__,src->ssid,src->channel); 1228 //printk("==========>in %s: src->ssid is %s,chan is %d\n",__func__,src->ssid,src->channel);
1267 1229
1268 //YJ,add,080819,for hidden ap 1230 //YJ,add,080819,for hidden ap
1269 if(src->ssid_len > 0) 1231 if (src->ssid_len > 0) {
1270 {
1271 //if(src->ssid_len == 13) 1232 //if(src->ssid_len == 13)
1272 // printk("=====================>>>>>>>> Dst ssid: %s Src ssid: %s\n", dst->ssid, src->ssid); 1233 // printk("=====================>>>>>>>> Dst ssid: %s Src ssid: %s\n", dst->ssid, src->ssid);
1273 memset(dst->ssid, 0, dst->ssid_len); 1234 memset(dst->ssid, 0, dst->ssid_len);
@@ -1305,11 +1266,11 @@ inline void update_network(struct ieee80211_network *dst,
1305 memcpy(dst->wmm_param, src->wmm_param, IEEE80211_AC_PRAM_LEN); 1266 memcpy(dst->wmm_param, src->wmm_param, IEEE80211_AC_PRAM_LEN);
1306 } 1267 }
1307*/ 1268*/
1308 if(src->wmm_param[0].ac_aci_acm_aifsn|| \ 1269 if (src->wmm_param[0].ac_aci_acm_aifsn || \
1309 src->wmm_param[1].ac_aci_acm_aifsn|| \ 1270 src->wmm_param[1].ac_aci_acm_aifsn || \
1310 src->wmm_param[2].ac_aci_acm_aifsn|| \ 1271 src->wmm_param[2].ac_aci_acm_aifsn || \
1311 src->wmm_param[3].ac_aci_acm_aifsn) { 1272 src->wmm_param[3].ac_aci_acm_aifsn) {
1312 memcpy(dst->wmm_param, src->wmm_param, WME_AC_PRAM_LEN); 1273 memcpy(dst->wmm_param, src->wmm_param, WME_AC_PRAM_LEN);
1313 } 1274 }
1314 dst->QoS_Enable = src->QoS_Enable; 1275 dst->QoS_Enable = src->QoS_Enable;
1315#else 1276#else
@@ -1336,7 +1297,7 @@ inline void ieee80211_process_probe_response(
1336 unsigned long flags; 1297 unsigned long flags;
1337 short renew; 1298 short renew;
1338 u8 wmm_info; 1299 u8 wmm_info;
1339 u8 is_beacon = (WLAN_FC_GET_STYPE(beacon->header.frame_ctl) == IEEE80211_STYPE_BEACON)? 1:0; //YJ,add,080819,for hidden ap 1300 u8 is_beacon = (WLAN_FC_GET_STYPE(beacon->header.frame_ctl) == IEEE80211_STYPE_BEACON) ? 1 : 0; //YJ,add,080819,for hidden ap
1340 1301
1341 memset(&network, 0, sizeof(struct ieee80211_network)); 1302 memset(&network, 0, sizeof(struct ieee80211_network));
1342 1303
@@ -1378,48 +1339,36 @@ inline void ieee80211_process_probe_response(
1378 // (2) If there is no any country code in beacon, 1339 // (2) If there is no any country code in beacon,
1379 // then wireless adapter should do active scan from ch1~11 and 1340 // then wireless adapter should do active scan from ch1~11 and
1380 // passive scan from ch12~14 1341 // passive scan from ch12~14
1381 if(ieee->bGlobalDomain) 1342 if (ieee->bGlobalDomain) {
1382 { 1343 if (WLAN_FC_GET_STYPE(beacon->header.frame_ctl) == IEEE80211_STYPE_PROBE_RESP) {
1383 if (WLAN_FC_GET_STYPE(beacon->header.frame_ctl) == IEEE80211_STYPE_PROBE_RESP)
1384 {
1385 // Case 1: Country code 1344 // Case 1: Country code
1386 if(IS_COUNTRY_IE_VALID(ieee) ) 1345 if (IS_COUNTRY_IE_VALID(ieee)) {
1387 { 1346 if (!IsLegalChannel(ieee, network.channel)) {
1388 if( !IsLegalChannel(ieee, network.channel) )
1389 {
1390 printk("GetScanInfo(): For Country code, filter probe response at channel(%d).\n", network.channel); 1347 printk("GetScanInfo(): For Country code, filter probe response at channel(%d).\n", network.channel);
1391 return; 1348 return;
1392 } 1349 }
1393 } 1350 }
1394 // Case 2: No any country code. 1351 // Case 2: No any country code.
1395 else 1352 else {
1396 {
1397 // Filter over channel ch12~14 1353 // Filter over channel ch12~14
1398 if(network.channel > 11) 1354 if (network.channel > 11) {
1399 {
1400 printk("GetScanInfo(): For Global Domain, filter probe response at channel(%d).\n", network.channel); 1355 printk("GetScanInfo(): For Global Domain, filter probe response at channel(%d).\n", network.channel);
1401 return; 1356 return;
1402 } 1357 }
1403 } 1358 }
1404 } 1359 } else {
1405 else
1406 {
1407 // Case 1: Country code 1360 // Case 1: Country code
1408 if(IS_COUNTRY_IE_VALID(ieee) ) 1361 if (IS_COUNTRY_IE_VALID(ieee)) {
1409 { 1362 if (!IsLegalChannel(ieee, network.channel)) {
1410 if( !IsLegalChannel(ieee, network.channel) ) 1363 printk("GetScanInfo(): For Country code, filter beacon at channel(%d).\n", network.channel);
1411 {
1412 printk("GetScanInfo(): For Country code, filter beacon at channel(%d).\n",network.channel);
1413 return; 1364 return;
1414 } 1365 }
1415 } 1366 }
1416 // Case 2: No any country code. 1367 // Case 2: No any country code.
1417 else 1368 else {
1418 {
1419 // Filter over channel ch12~14 1369 // Filter over channel ch12~14
1420 if(network.channel > 14) 1370 if (network.channel > 14) {
1421 { 1371 printk("GetScanInfo(): For Global Domain, filter beacon at channel(%d).\n", network.channel);
1422 printk("GetScanInfo(): For Global Domain, filter beacon at channel(%d).\n",network.channel);
1423 return; 1372 return;
1424 } 1373 }
1425 } 1374 }
@@ -1437,12 +1386,12 @@ inline void ieee80211_process_probe_response(
1437 1386
1438 spin_lock_irqsave(&ieee->lock, flags); 1387 spin_lock_irqsave(&ieee->lock, flags);
1439 1388
1440 if(is_same_network(&ieee->current_network, &network, ieee)) { 1389 if (is_same_network(&ieee->current_network, &network, ieee)) {
1441 wmm_info = ieee->current_network.wmm_info; 1390 wmm_info = ieee->current_network.wmm_info;
1442 //YJ,add,080819,for hidden ap 1391 //YJ,add,080819,for hidden ap
1443 if(is_beacon == 0) 1392 if (is_beacon == 0)
1444 network.flags = (~NETWORK_EMPTY_ESSID & network.flags)|(NETWORK_EMPTY_ESSID & ieee->current_network.flags); 1393 network.flags = (~NETWORK_EMPTY_ESSID & network.flags)|(NETWORK_EMPTY_ESSID & ieee->current_network.flags);
1445 else if(ieee->state == IEEE80211_LINKED) 1394 else if (ieee->state == IEEE80211_LINKED)
1446 ieee->NumRxBcnInPeriod++; 1395 ieee->NumRxBcnInPeriod++;
1447 //YJ,add,080819,for hidden ap,end 1396 //YJ,add,080819,for hidden ap,end
1448 //printk("====>network.ssid=%s cur_ssid=%s\n", network.ssid, ieee->current_network.ssid); 1397 //printk("====>network.ssid=%s cur_ssid=%s\n", network.ssid, ieee->current_network.ssid);
@@ -1504,13 +1453,13 @@ inline void ieee80211_process_probe_response(
1504 */ 1453 */
1505 renew = !time_after(target->last_scanned + ieee->scan_age, jiffies); 1454 renew = !time_after(target->last_scanned + ieee->scan_age, jiffies);
1506 //YJ,add,080819,for hidden ap 1455 //YJ,add,080819,for hidden ap
1507 if(is_beacon == 0) 1456 if (is_beacon == 0)
1508 network.flags = (~NETWORK_EMPTY_ESSID & network.flags)|(NETWORK_EMPTY_ESSID & target->flags); 1457 network.flags = (~NETWORK_EMPTY_ESSID & network.flags)|(NETWORK_EMPTY_ESSID & target->flags);
1509 //if(strncmp(network.ssid, "linksys-c",9) == 0) 1458 //if(strncmp(network.ssid, "linksys-c",9) == 0)
1510 // printk("====>2 network.ssid=%s FLAG=%d target.ssid=%s FLAG=%d\n", network.ssid, network.flags, target->ssid, target->flags); 1459 // printk("====>2 network.ssid=%s FLAG=%d target.ssid=%s FLAG=%d\n", network.ssid, network.flags, target->ssid, target->flags);
1511 if(((network.flags & NETWORK_EMPTY_ESSID) == NETWORK_EMPTY_ESSID) \ 1460 if (((network.flags & NETWORK_EMPTY_ESSID) == NETWORK_EMPTY_ESSID) \
1512 && (((network.ssid_len > 0) && (strncmp(target->ssid, network.ssid, network.ssid_len)))\ 1461 && (((network.ssid_len > 0) && (strncmp(target->ssid, network.ssid, network.ssid_len)))\
1513 ||((ieee->current_network.ssid_len == network.ssid_len)&&(strncmp(ieee->current_network.ssid, network.ssid, network.ssid_len) == 0)&&(ieee->state == IEEE80211_NOLINK)))) 1462 || ((ieee->current_network.ssid_len == network.ssid_len) && (strncmp(ieee->current_network.ssid, network.ssid, network.ssid_len) == 0) && (ieee->state == IEEE80211_NOLINK))))
1514 renew = 1; 1463 renew = 1;
1515 //YJ,add,080819,for hidden ap,end 1464 //YJ,add,080819,for hidden ap,end
1516 update_network(target, &network); 1465 update_network(target, &network);
diff --git a/drivers/staging/rtl8187se/ieee80211/ieee80211_softmac_wx.c b/drivers/staging/rtl8187se/ieee80211/ieee80211_softmac_wx.c
index 1ef8fd612732..d9add5305e29 100644
--- a/drivers/staging/rtl8187se/ieee80211/ieee80211_softmac_wx.c
+++ b/drivers/staging/rtl8187se/ieee80211/ieee80211_softmac_wx.c
@@ -32,11 +32,11 @@ int ieee80211_wx_set_freq(struct ieee80211_device *ieee, struct iw_request_info
32 union iwreq_data *wrqu, char *b) 32 union iwreq_data *wrqu, char *b)
33{ 33{
34 int ret; 34 int ret;
35 struct iw_freq *fwrq = & wrqu->freq; 35 struct iw_freq *fwrq = &wrqu->freq;
36// printk("in %s\n",__func__); 36// printk("in %s\n",__func__);
37 down(&ieee->wx_sem); 37 down(&ieee->wx_sem);
38 38
39 if(ieee->iw_mode == IW_MODE_INFRA){ 39 if (ieee->iw_mode == IW_MODE_INFRA) {
40 ret = -EOPNOTSUPP; 40 ret = -EOPNOTSUPP;
41 goto out; 41 goto out;
42 } 42 }
@@ -57,21 +57,20 @@ int ieee80211_wx_set_freq(struct ieee80211_device *ieee, struct iw_request_info
57 } 57 }
58 } 58 }
59 59
60 if (fwrq->e > 0 || fwrq->m > 14 || fwrq->m < 1 ){ 60 if (fwrq->e > 0 || fwrq->m > 14 || fwrq->m < 1) {
61 ret = -EOPNOTSUPP; 61 ret = -EOPNOTSUPP;
62 goto out; 62 goto out;
63 63
64 }else { /* Set the channel */ 64 } else { /* Set the channel */
65 65
66 66
67 ieee->current_network.channel = fwrq->m; 67 ieee->current_network.channel = fwrq->m;
68 ieee->set_chan(ieee->dev, ieee->current_network.channel); 68 ieee->set_chan(ieee->dev, ieee->current_network.channel);
69 69
70 if(ieee->iw_mode == IW_MODE_ADHOC || ieee->iw_mode == IW_MODE_MASTER) 70 if (ieee->iw_mode == IW_MODE_ADHOC || ieee->iw_mode == IW_MODE_MASTER)
71 if(ieee->state == IEEE80211_LINKED){ 71 if (ieee->state == IEEE80211_LINKED) {
72 72 ieee80211_stop_send_beacons(ieee);
73 ieee80211_stop_send_beacons(ieee); 73 ieee80211_start_send_beacons(ieee);
74 ieee80211_start_send_beacons(ieee);
75 } 74 }
76 } 75 }
77 76
@@ -86,7 +85,7 @@ int ieee80211_wx_get_freq(struct ieee80211_device *ieee,
86 struct iw_request_info *a, 85 struct iw_request_info *a,
87 union iwreq_data *wrqu, char *b) 86 union iwreq_data *wrqu, char *b)
88{ 87{
89 struct iw_freq *fwrq = & wrqu->freq; 88 struct iw_freq *fwrq = &wrqu->freq;
90 89
91 if (ieee->current_network.channel == 0) 90 if (ieee->current_network.channel == 0)
92 return -1; 91 return -1;
@@ -143,12 +142,12 @@ int ieee80211_wx_set_wap(struct ieee80211_device *ieee,
143 142
144 down(&ieee->wx_sem); 143 down(&ieee->wx_sem);
145 /* use ifconfig hw ether */ 144 /* use ifconfig hw ether */
146 if (ieee->iw_mode == IW_MODE_MASTER){ 145 if (ieee->iw_mode == IW_MODE_MASTER) {
147 ret = -1; 146 ret = -1;
148 goto out; 147 goto out;
149 } 148 }
150 149
151 if (temp->sa_family != ARPHRD_ETHER){ 150 if (temp->sa_family != ARPHRD_ETHER) {
152 ret = -EINVAL; 151 ret = -EINVAL;
153 goto out; 152 goto out;
154 } 153 }
@@ -175,9 +174,10 @@ out:
175 return ret; 174 return ret;
176} 175}
177 176
178 int ieee80211_wx_get_essid(struct ieee80211_device *ieee, struct iw_request_info *a,union iwreq_data *wrqu,char *b) 177int ieee80211_wx_get_essid(struct ieee80211_device *ieee, struct iw_request_info *a,
178 union iwreq_data *wrqu, char *b)
179{ 179{
180 int len,ret = 0; 180 int len, ret = 0;
181 unsigned long flags; 181 unsigned long flags;
182 182
183 if (ieee->iw_mode == IW_MODE_MONITOR) 183 if (ieee->iw_mode == IW_MODE_MONITOR)
@@ -200,7 +200,7 @@ out:
200 } 200 }
201 len = ieee->current_network.ssid_len; 201 len = ieee->current_network.ssid_len;
202 wrqu->essid.length = len; 202 wrqu->essid.length = len;
203 strncpy(b,ieee->current_network.ssid,len); 203 strncpy(b, ieee->current_network.ssid, len);
204 wrqu->essid.flags = 1; 204 wrqu->essid.flags = 1;
205 205
206out: 206out:
@@ -218,11 +218,11 @@ int ieee80211_wx_set_rate(struct ieee80211_device *ieee,
218 u32 target_rate = wrqu->bitrate.value; 218 u32 target_rate = wrqu->bitrate.value;
219 219
220 //added by lizhaoming for auto mode 220 //added by lizhaoming for auto mode
221 if(target_rate == -1){ 221 if (target_rate == -1)
222 ieee->rate = 110; 222 ieee->rate = 110;
223 } else { 223 else
224 ieee->rate = target_rate/100000; 224 ieee->rate = target_rate/100000;
225 } 225
226 //FIXME: we might want to limit rate also in management protocols. 226 //FIXME: we might want to limit rate also in management protocols.
227 return 0; 227 return 0;
228} 228}
@@ -250,16 +250,14 @@ int ieee80211_wx_set_mode(struct ieee80211_device *ieee, struct iw_request_info
250 if (wrqu->mode == ieee->iw_mode) 250 if (wrqu->mode == ieee->iw_mode)
251 goto out; 251 goto out;
252 252
253 if (wrqu->mode == IW_MODE_MONITOR){ 253 if (wrqu->mode == IW_MODE_MONITOR)
254
255 ieee->dev->type = ARPHRD_IEEE80211; 254 ieee->dev->type = ARPHRD_IEEE80211;
256 }else{ 255 else
257 ieee->dev->type = ARPHRD_ETHER; 256 ieee->dev->type = ARPHRD_ETHER;
258 }
259 257
260 if (!ieee->proto_started){ 258 if (!ieee->proto_started) {
261 ieee->iw_mode = wrqu->mode; 259 ieee->iw_mode = wrqu->mode;
262 }else{ 260 } else {
263 ieee80211_stop_protocol(ieee); 261 ieee80211_stop_protocol(ieee);
264 ieee->iw_mode = wrqu->mode; 262 ieee->iw_mode = wrqu->mode;
265 ieee80211_start_protocol(ieee); 263 ieee80211_start_protocol(ieee);
@@ -296,7 +294,7 @@ void ieee80211_wx_sync_scan_wq(struct work_struct *work)
296 if (ieee->data_hard_resume) 294 if (ieee->data_hard_resume)
297 ieee->data_hard_resume(ieee->dev); 295 ieee->data_hard_resume(ieee->dev);
298 296
299 if(ieee->iw_mode == IW_MODE_ADHOC || ieee->iw_mode == IW_MODE_MASTER) 297 if (ieee->iw_mode == IW_MODE_ADHOC || ieee->iw_mode == IW_MODE_MASTER)
300 ieee80211_start_send_beacons(ieee); 298 ieee80211_start_send_beacons(ieee);
301 299
302 //YJ,add,080828, In prevent of lossing ping packet during scanning 300 //YJ,add,080828, In prevent of lossing ping packet during scanning
@@ -314,7 +312,7 @@ int ieee80211_wx_set_scan(struct ieee80211_device *ieee, struct iw_request_info
314 312
315 down(&ieee->wx_sem); 313 down(&ieee->wx_sem);
316 314
317 if (ieee->iw_mode == IW_MODE_MONITOR || !(ieee->proto_started)){ 315 if (ieee->iw_mode == IW_MODE_MONITOR || !(ieee->proto_started)) {
318 ret = -1; 316 ret = -1;
319 goto out; 317 goto out;
320 } 318 }
@@ -323,7 +321,7 @@ int ieee80211_wx_set_scan(struct ieee80211_device *ieee, struct iw_request_info
323 //ieee80211_sta_ps_send_null_frame(ieee, true); 321 //ieee80211_sta_ps_send_null_frame(ieee, true);
324 //YJ,add,080828,end 322 //YJ,add,080828,end
325 323
326 if ( ieee->state == IEEE80211_LINKED){ 324 if (ieee->state == IEEE80211_LINKED) {
327 queue_work(ieee->wq, &ieee->wx_sync_scan_wq); 325 queue_work(ieee->wq, &ieee->wx_sync_scan_wq);
328 /* intentionally forget to up sem */ 326 /* intentionally forget to up sem */
329 return 0; 327 return 0;
@@ -339,7 +337,7 @@ int ieee80211_wx_set_essid(struct ieee80211_device *ieee,
339 union iwreq_data *wrqu, char *extra) 337 union iwreq_data *wrqu, char *extra)
340{ 338{
341 339
342 int ret=0,len; 340 int ret = 0, len;
343 short proto_started; 341 short proto_started;
344 unsigned long flags; 342 unsigned long flags;
345 343
@@ -349,17 +347,17 @@ int ieee80211_wx_set_essid(struct ieee80211_device *ieee,
349 347
350 proto_started = ieee->proto_started; 348 proto_started = ieee->proto_started;
351 349
352 if (wrqu->essid.length > IW_ESSID_MAX_SIZE){ 350 if (wrqu->essid.length > IW_ESSID_MAX_SIZE) {
353 ret= -E2BIG; 351 ret = -E2BIG;
354 goto out; 352 goto out;
355 } 353 }
356 354
357 if (ieee->iw_mode == IW_MODE_MONITOR){ 355 if (ieee->iw_mode == IW_MODE_MONITOR) {
358 ret= -1; 356 ret = -1;
359 goto out; 357 goto out;
360 } 358 }
361 359
362 if(proto_started) 360 if (proto_started)
363 ieee80211_stop_protocol(ieee); 361 ieee80211_stop_protocol(ieee);
364 362
365 /* this is just to be sure that the GET wx callback 363 /* this is just to be sure that the GET wx callback
@@ -377,13 +375,12 @@ int ieee80211_wx_set_essid(struct ieee80211_device *ieee,
377//YJ,modified,080819,end 375//YJ,modified,080819,end
378 376
379 //YJ,add,080819,for hidden ap 377 //YJ,add,080819,for hidden ap
380 if(len == 0){ 378 if (len == 0) {
381 memset(ieee->current_network.bssid, 0, ETH_ALEN); 379 memset(ieee->current_network.bssid, 0, ETH_ALEN);
382 ieee->current_network.capability = 0; 380 ieee->current_network.capability = 0;
383 } 381 }
384 //YJ,add,080819,for hidden ap,end 382 //YJ,add,080819,for hidden ap,end
385 } 383 } else {
386 else{
387 ieee->ssid_set = 0; 384 ieee->ssid_set = 0;
388 ieee->current_network.ssid[0] = '\0'; 385 ieee->current_network.ssid[0] = '\0';
389 ieee->current_network.ssid_len = 0; 386 ieee->current_network.ssid_len = 0;
@@ -398,7 +395,7 @@ out:
398 return ret; 395 return ret;
399} 396}
400 397
401 int ieee80211_wx_get_mode(struct ieee80211_device *ieee, struct iw_request_info *a, 398int ieee80211_wx_get_mode(struct ieee80211_device *ieee, struct iw_request_info *a,
402 union iwreq_data *wrqu, char *b) 399 union iwreq_data *wrqu, char *b)
403{ 400{
404 401
@@ -406,7 +403,7 @@ out:
406 return 0; 403 return 0;
407} 404}
408 405
409 int ieee80211_wx_set_rawtx(struct ieee80211_device *ieee, 406int ieee80211_wx_set_rawtx(struct ieee80211_device *ieee,
410 struct iw_request_info *info, 407 struct iw_request_info *info,
411 union iwreq_data *wrqu, char *extra) 408 union iwreq_data *wrqu, char *extra)
412{ 409{
@@ -417,24 +414,23 @@ out:
417 414
418 down(&ieee->wx_sem); 415 down(&ieee->wx_sem);
419 416
420 if(enable) 417 if (enable)
421 ieee->raw_tx = 1; 418 ieee->raw_tx = 1;
422 else 419 else
423 ieee->raw_tx = 0; 420 ieee->raw_tx = 0;
424 421
425 printk(KERN_INFO"raw TX is %s\n", 422 netdev_info(ieee->dev, "raw TX is %s\n",
426 ieee->raw_tx ? "enabled" : "disabled"); 423 ieee->raw_tx ? "enabled" : "disabled");
427 424
428 if(ieee->iw_mode == IW_MODE_MONITOR) 425 if (ieee->iw_mode == IW_MODE_MONITOR) {
429 { 426 if (prev == 0 && ieee->raw_tx) {
430 if(prev == 0 && ieee->raw_tx){
431 if (ieee->data_hard_resume) 427 if (ieee->data_hard_resume)
432 ieee->data_hard_resume(ieee->dev); 428 ieee->data_hard_resume(ieee->dev);
433 429
434 netif_carrier_on(ieee->dev); 430 netif_carrier_on(ieee->dev);
435 } 431 }
436 432
437 if(prev && ieee->raw_tx == 1) 433 if (prev && ieee->raw_tx == 1)
438 netif_carrier_off(ieee->dev); 434 netif_carrier_off(ieee->dev);
439 } 435 }
440 436
@@ -448,18 +444,18 @@ int ieee80211_wx_get_name(struct ieee80211_device *ieee,
448 union iwreq_data *wrqu, char *extra) 444 union iwreq_data *wrqu, char *extra)
449{ 445{
450 strlcpy(wrqu->name, "802.11", IFNAMSIZ); 446 strlcpy(wrqu->name, "802.11", IFNAMSIZ);
451 if(ieee->modulation & IEEE80211_CCK_MODULATION){ 447 if (ieee->modulation & IEEE80211_CCK_MODULATION) {
452 strlcat(wrqu->name, "b", IFNAMSIZ); 448 strlcat(wrqu->name, "b", IFNAMSIZ);
453 if(ieee->modulation & IEEE80211_OFDM_MODULATION) 449 if (ieee->modulation & IEEE80211_OFDM_MODULATION)
454 strlcat(wrqu->name, "/g", IFNAMSIZ); 450 strlcat(wrqu->name, "/g", IFNAMSIZ);
455 }else if(ieee->modulation & IEEE80211_OFDM_MODULATION) 451 } else if (ieee->modulation & IEEE80211_OFDM_MODULATION)
456 strlcat(wrqu->name, "g", IFNAMSIZ); 452 strlcat(wrqu->name, "g", IFNAMSIZ);
457 453
458 if((ieee->state == IEEE80211_LINKED) || 454 if ((ieee->state == IEEE80211_LINKED) ||
459 (ieee->state == IEEE80211_LINKED_SCANNING)) 455 (ieee->state == IEEE80211_LINKED_SCANNING))
460 strlcat(wrqu->name," link", IFNAMSIZ); 456 strlcat(wrqu->name, " link", IFNAMSIZ);
461 else if(ieee->state != IEEE80211_NOLINK) 457 else if (ieee->state != IEEE80211_NOLINK)
462 strlcat(wrqu->name," .....", IFNAMSIZ); 458 strlcat(wrqu->name, " .....", IFNAMSIZ);
463 459
464 460
465 return 0; 461 return 0;
@@ -473,11 +469,10 @@ int ieee80211_wx_set_power(struct ieee80211_device *ieee,
473{ 469{
474 int ret = 0; 470 int ret = 0;
475 471
476 if( 472 if ((!ieee->sta_wake_up) ||
477 (!ieee->sta_wake_up) || 473 (!ieee->ps_request_tx_ack) ||
478 (!ieee->ps_request_tx_ack) || 474 (!ieee->enter_sleep_state) ||
479 (!ieee->enter_sleep_state) || 475 (!ieee->ps_is_queue_empty)) {
480 (!ieee->ps_is_queue_empty)){
481 476
482 printk("ERROR. PS mode tried to be use but driver missed a callback\n\n"); 477 printk("ERROR. PS mode tried to be use but driver missed a callback\n\n");
483 478
@@ -486,7 +481,7 @@ int ieee80211_wx_set_power(struct ieee80211_device *ieee,
486 481
487 down(&ieee->wx_sem); 482 down(&ieee->wx_sem);
488 483
489 if (wrqu->power.disabled){ 484 if (wrqu->power.disabled) {
490 ieee->ps = IEEE80211_PS_DISABLED; 485 ieee->ps = IEEE80211_PS_DISABLED;
491 486
492 goto exit; 487 goto exit;
@@ -512,7 +507,7 @@ int ieee80211_wx_set_power(struct ieee80211_device *ieee,
512 if (wrqu->power.flags & IW_POWER_TIMEOUT) { 507 if (wrqu->power.flags & IW_POWER_TIMEOUT) {
513 508
514 ieee->ps_timeout = wrqu->power.value / 1000; 509 ieee->ps_timeout = wrqu->power.value / 1000;
515 printk("Timeout %d\n",ieee->ps_timeout); 510 printk("Timeout %d\n", ieee->ps_timeout);
516 } 511 }
517 512
518 if (wrqu->power.flags & IW_POWER_PERIOD) { 513 if (wrqu->power.flags & IW_POWER_PERIOD) {
@@ -533,11 +528,11 @@ int ieee80211_wx_get_power(struct ieee80211_device *ieee,
533 struct iw_request_info *info, 528 struct iw_request_info *info,
534 union iwreq_data *wrqu, char *extra) 529 union iwreq_data *wrqu, char *extra)
535{ 530{
536 int ret =0; 531 int ret = 0;
537 532
538 down(&ieee->wx_sem); 533 down(&ieee->wx_sem);
539 534
540 if(ieee->ps == IEEE80211_PS_DISABLED){ 535 if (ieee->ps == IEEE80211_PS_DISABLED) {
541 wrqu->power.disabled = 1; 536 wrqu->power.disabled = 1;
542 goto exit; 537 goto exit;
543 } 538 }
diff --git a/drivers/staging/rtl8187se/r8180.h b/drivers/staging/rtl8187se/r8180.h
index 2682afbac4ff..70ea4145b4c8 100644
--- a/drivers/staging/rtl8187se/r8180.h
+++ b/drivers/staging/rtl8187se/r8180.h
@@ -327,12 +327,8 @@ typedef struct r8180_priv
327 int irq; 327 int irq;
328 struct ieee80211_device *ieee80211; 328 struct ieee80211_device *ieee80211;
329 329
330 short phy_ver; /* meaningful for rtl8225 1:A 2:B 3:C */
331 short enable_gpio0;
332 short hw_plcp_len;
333 short plcp_preamble_mode; // 0:auto 1:short 2:long 330 short plcp_preamble_mode; // 0:auto 1:short 2:long
334 331
335 spinlock_t irq_lock;
336 spinlock_t irq_th_lock; 332 spinlock_t irq_th_lock;
337 spinlock_t tx_lock; 333 spinlock_t tx_lock;
338 spinlock_t ps_lock; 334 spinlock_t ps_lock;
@@ -350,7 +346,6 @@ typedef struct r8180_priv
350 u8 channel_plan; // it's the channel plan index 346 u8 channel_plan; // it's the channel plan index
351 short up; 347 short up;
352 short crcmon; //if 1 allow bad crc frame reception in monitor mode 348 short crcmon; //if 1 allow bad crc frame reception in monitor mode
353 short prism_hdr;
354 349
355 struct timer_list scan_timer; 350 struct timer_list scan_timer;
356 /*short scanpending; 351 /*short scanpending;
@@ -359,14 +354,11 @@ typedef struct r8180_priv
359 u8 active_probe; 354 u8 active_probe;
360 //u8 active_scan_num; 355 //u8 active_scan_num;
361 struct semaphore wx_sem; 356 struct semaphore wx_sem;
362 struct semaphore rf_state;
363 short hw_wep; 357 short hw_wep;
364 358
365 short digphy; 359 short digphy;
366 short antb; 360 short antb;
367 short diversity; 361 short diversity;
368 u8 cs_treshold;
369 short rcr_csense;
370 u32 key0[4]; 362 u32 key0[4];
371 short (*rf_set_sens)(struct net_device *dev,short sens); 363 short (*rf_set_sens)(struct net_device *dev,short sens);
372 void (*rf_set_chan)(struct net_device *dev,short ch); 364 void (*rf_set_chan)(struct net_device *dev,short ch);
@@ -491,7 +483,6 @@ typedef struct r8180_priv
491 RT_RF_POWER_STATE eRFPowerState; 483 RT_RF_POWER_STATE eRFPowerState;
492 u32 RfOffReason; 484 u32 RfOffReason;
493 bool RFChangeInProgress; 485 bool RFChangeInProgress;
494 bool bInHctTest;
495 bool SetRFPowerStateInProgress; 486 bool SetRFPowerStateInProgress;
496 u8 RFProgType; 487 u8 RFProgType;
497 bool bLeisurePs; 488 bool bLeisurePs;
@@ -618,17 +609,11 @@ typedef struct r8180_priv
618// struct workqueue_struct *workqueue; 609// struct workqueue_struct *workqueue;
619 struct work_struct reset_wq; 610 struct work_struct reset_wq;
620 struct work_struct watch_dog_wq; 611 struct work_struct watch_dog_wq;
621 struct work_struct tx_irq_wq;
622 short ack_tx_to_ieee; 612 short ack_tx_to_ieee;
623 613
624 u8 PowerProfile;
625 u32 CSMethod;
626 u8 cck_txpwr_base;
627 u8 ofdm_txpwr_base;
628 u8 dma_poll_stop_mask; 614 u8 dma_poll_stop_mask;
629 615
630 //u8 RegThreeWireMode; 616 //u8 RegThreeWireMode;
631 u8 MWIEnable;
632 u16 ShortRetryLimit; 617 u16 ShortRetryLimit;
633 u16 LongRetryLimit; 618 u16 LongRetryLimit;
634 u16 EarlyRxThreshold; 619 u16 EarlyRxThreshold;
@@ -667,35 +652,22 @@ void write_nic_dword(struct net_device *dev, int x,u32 y);
667void force_pci_posting(struct net_device *dev); 652void force_pci_posting(struct net_device *dev);
668 653
669void rtl8180_rtx_disable(struct net_device *); 654void rtl8180_rtx_disable(struct net_device *);
670void rtl8180_rx_enable(struct net_device *);
671void rtl8180_tx_enable(struct net_device *);
672void rtl8180_start_scanning(struct net_device *dev);
673void rtl8180_start_scanning_s(struct net_device *dev);
674void rtl8180_stop_scanning(struct net_device *dev);
675void rtl8180_disassociate(struct net_device *dev);
676//void fix_rx_fifo(struct net_device *dev);
677void rtl8180_set_anaparam(struct net_device *dev,u32 a); 655void rtl8180_set_anaparam(struct net_device *dev,u32 a);
678void rtl8185_set_anaparam2(struct net_device *dev,u32 a); 656void rtl8185_set_anaparam2(struct net_device *dev,u32 a);
679void rtl8180_set_hw_wep(struct net_device *dev); 657void rtl8180_set_hw_wep(struct net_device *dev);
680void rtl8180_no_hw_wep(struct net_device *dev); 658void rtl8180_no_hw_wep(struct net_device *dev);
681void rtl8180_update_msr(struct net_device *dev); 659void rtl8180_update_msr(struct net_device *dev);
682//void rtl8180_BSS_create(struct net_device *dev);
683void rtl8180_beacon_tx_disable(struct net_device *dev); 660void rtl8180_beacon_tx_disable(struct net_device *dev);
684void rtl8180_beacon_rx_disable(struct net_device *dev); 661void rtl8180_beacon_rx_disable(struct net_device *dev);
685void rtl8180_conttx_enable(struct net_device *dev);
686void rtl8180_conttx_disable(struct net_device *dev);
687int rtl8180_down(struct net_device *dev); 662int rtl8180_down(struct net_device *dev);
688int rtl8180_up(struct net_device *dev); 663int rtl8180_up(struct net_device *dev);
689void rtl8180_commit(struct net_device *dev); 664void rtl8180_commit(struct net_device *dev);
690void rtl8180_set_chan(struct net_device *dev,short ch); 665void rtl8180_set_chan(struct net_device *dev,short ch);
691void rtl8180_set_master_essid(struct net_device *dev,char *essid);
692void rtl8180_update_beacon_security(struct net_device *dev);
693void write_phy(struct net_device *dev, u8 adr, u8 data); 666void write_phy(struct net_device *dev, u8 adr, u8 data);
694void write_phy_cck(struct net_device *dev, u8 adr, u32 data); 667void write_phy_cck(struct net_device *dev, u8 adr, u32 data);
695void write_phy_ofdm(struct net_device *dev, u8 adr, u32 data); 668void write_phy_ofdm(struct net_device *dev, u8 adr, u32 data);
696void rtl8185_tx_antenna(struct net_device *dev, u8 ant); 669void rtl8185_tx_antenna(struct net_device *dev, u8 ant);
697void rtl8185_rf_pins_enable(struct net_device *dev); 670void rtl8185_rf_pins_enable(struct net_device *dev);
698void IBSS_randomize_cell(struct net_device *dev);
699void IPSEnter(struct net_device *dev); 671void IPSEnter(struct net_device *dev);
700void IPSLeave(struct net_device *dev); 672void IPSLeave(struct net_device *dev);
701int get_curr_tx_free_desc(struct net_device *dev, int priority); 673int get_curr_tx_free_desc(struct net_device *dev, int priority);
diff --git a/drivers/staging/rtl8187se/r8180_core.c b/drivers/staging/rtl8187se/r8180_core.c
index 20e5fb58f52f..ae38475854b5 100644
--- a/drivers/staging/rtl8187se/r8180_core.c
+++ b/drivers/staging/rtl8187se/r8180_core.c
@@ -27,6 +27,8 @@
27 Written by Mariusz Matuszek. 27 Written by Mariusz Matuszek.
28*/ 28*/
29 29
30#define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
31
30#undef RX_DONT_PASS_UL 32#undef RX_DONT_PASS_UL
31#undef DUMMY_RX 33#undef DUMMY_RX
32 34
@@ -44,7 +46,7 @@
44 46
45#include "ieee80211/dot11d.h" 47#include "ieee80211/dot11d.h"
46 48
47static struct pci_device_id rtl8180_pci_id_tbl[] __devinitdata = { 49static struct pci_device_id rtl8180_pci_id_tbl[] = {
48 { 50 {
49 .vendor = PCI_VENDOR_ID_REALTEK, 51 .vendor = PCI_VENDOR_ID_REALTEK,
50 .device = 0x8199, 52 .device = 0x8199,
@@ -61,33 +63,23 @@ static struct pci_device_id rtl8180_pci_id_tbl[] __devinitdata = {
61 } 63 }
62}; 64};
63 65
64
65static char ifname[IFNAMSIZ] = "wlan%d"; 66static char ifname[IFNAMSIZ] = "wlan%d";
66static int hwseqnum = 0; 67static int hwwep;
67static int hwwep = 0;
68static int channels = 0x3fff;
69 68
70MODULE_LICENSE("GPL"); 69MODULE_LICENSE("GPL");
71MODULE_DEVICE_TABLE(pci, rtl8180_pci_id_tbl); 70MODULE_DEVICE_TABLE(pci, rtl8180_pci_id_tbl);
72MODULE_AUTHOR("Andrea Merello <andreamrl@tiscali.it>"); 71MODULE_AUTHOR("Andrea Merello <andreamrl@tiscali.it>");
73MODULE_DESCRIPTION("Linux driver for Realtek RTL8180 / RTL8185 WiFi cards"); 72MODULE_DESCRIPTION("Linux driver for Realtek RTL8187SE WiFi cards");
74
75 73
76module_param_string(ifname, ifname, sizeof(ifname), S_IRUGO|S_IWUSR); 74module_param_string(ifname, ifname, sizeof(ifname), S_IRUGO|S_IWUSR);
77module_param(hwseqnum, int, S_IRUGO|S_IWUSR);
78module_param(hwwep, int, S_IRUGO|S_IWUSR); 75module_param(hwwep, int, S_IRUGO|S_IWUSR);
79module_param(channels, int, S_IRUGO|S_IWUSR);
80 76
81MODULE_PARM_DESC(devname, " Net interface name, wlan%d=default");
82MODULE_PARM_DESC(hwseqnum, " Try to use hardware 802.11 header sequence numbers. Zero=default");
83MODULE_PARM_DESC(hwwep, " Try to use hardware WEP support. Still broken and not available on all cards"); 77MODULE_PARM_DESC(hwwep, " Try to use hardware WEP support. Still broken and not available on all cards");
84MODULE_PARM_DESC(channels, " Channel bitmask for specific locales. NYI");
85 78
86 79static int rtl8180_pci_probe(struct pci_dev *pdev,
87static int __devinit rtl8180_pci_probe(struct pci_dev *pdev,
88 const struct pci_device_id *id); 80 const struct pci_device_id *id);
89 81
90static void __devexit rtl8180_pci_remove(struct pci_dev *pdev); 82static void rtl8180_pci_remove(struct pci_dev *pdev);
91 83
92static void rtl8180_shutdown(struct pci_dev *pdev) 84static void rtl8180_shutdown(struct pci_dev *pdev)
93{ 85{
@@ -126,8 +118,7 @@ static int rtl8180_resume(struct pci_dev *pdev)
126 118
127 err = pci_enable_device(pdev); 119 err = pci_enable_device(pdev);
128 if (err) { 120 if (err) {
129 printk(KERN_ERR "%s: pci_enable_device failed on resume\n", 121 dev_err(&pdev->dev, "pci_enable_device failed on resume\n");
130 dev->name);
131 122
132 return err; 123 return err;
133 } 124 }
@@ -159,7 +150,7 @@ static struct pci_driver rtl8180_pci_driver = {
159 .name = RTL8180_MODULE_NAME, 150 .name = RTL8180_MODULE_NAME,
160 .id_table = rtl8180_pci_id_tbl, 151 .id_table = rtl8180_pci_id_tbl,
161 .probe = rtl8180_pci_probe, 152 .probe = rtl8180_pci_probe,
162 .remove = __devexit_p(rtl8180_pci_remove), 153 .remove = rtl8180_pci_remove,
163 .suspend = rtl8180_suspend, 154 .suspend = rtl8180_suspend,
164 .resume = rtl8180_resume, 155 .resume = rtl8180_resume,
165 .shutdown = rtl8180_shutdown, 156 .shutdown = rtl8180_shutdown,
@@ -211,7 +202,7 @@ static struct net_device_stats *rtl8180_stats(struct net_device *dev);
211void rtl8180_commit(struct net_device *dev); 202void rtl8180_commit(struct net_device *dev);
212void rtl8180_start_tx_beacon(struct net_device *dev); 203void rtl8180_start_tx_beacon(struct net_device *dev);
213 204
214static struct proc_dir_entry *rtl8180_proc = NULL; 205static struct proc_dir_entry *rtl8180_proc;
215 206
216static int proc_get_registers(char *page, char **start, 207static int proc_get_registers(char *page, char **start,
217 off_t offset, int count, 208 off_t offset, int count,
@@ -323,7 +314,6 @@ void rtl8180_proc_remove_one(struct net_device *dev)
323 remove_proc_entry("stats-tx", priv->dir_dev); 314 remove_proc_entry("stats-tx", priv->dir_dev);
324 remove_proc_entry("stats-rx", priv->dir_dev); 315 remove_proc_entry("stats-rx", priv->dir_dev);
325 remove_proc_entry("registers", priv->dir_dev); 316 remove_proc_entry("registers", priv->dir_dev);
326 remove_proc_entry(dev->name, rtl8180_proc);
327 priv->dir_dev = NULL; 317 priv->dir_dev = NULL;
328 } 318 }
329} 319}
@@ -444,24 +434,6 @@ void buffer_free(struct net_device *dev, struct buffer **buffer, int len, short
444 *buffer = NULL; 434 *buffer = NULL;
445} 435}
446 436
447void print_buffer(u32 *buffer, int len)
448{
449 int i;
450 u8 *buf = (u8 *)buffer;
451
452 printk("ASCII BUFFER DUMP (len: %x):\n", len);
453
454 for (i = 0; i < len; i++)
455 printk("%c", buf[i]);
456
457 printk("\nBINARY BUFFER DUMP (len: %x):\n", len);
458
459 for (i = 0; i < len; i++)
460 printk("%02x", buf[i]);
461
462 printk("\n");
463}
464
465int get_curr_tx_free_desc(struct net_device *dev, int priority) 437int get_curr_tx_free_desc(struct net_device *dev, int priority)
466{ 438{
467 struct r8180_priv *priv = ieee80211_priv(dev); 439 struct r8180_priv *priv = ieee80211_priv(dev);
@@ -635,74 +607,6 @@ void fix_rx_fifo(struct net_device *dev)
635 set_nic_rxring(dev); 607 set_nic_rxring(dev);
636} 608}
637 609
638unsigned char QUALITY_MAP[] = {
639 0x64, 0x64, 0x64, 0x63, 0x63, 0x62, 0x62, 0x61,
640 0x61, 0x60, 0x60, 0x5f, 0x5f, 0x5e, 0x5d, 0x5c,
641 0x5b, 0x5a, 0x59, 0x57, 0x56, 0x54, 0x52, 0x4f,
642 0x4c, 0x49, 0x45, 0x41, 0x3c, 0x37, 0x31, 0x29,
643 0x24, 0x22, 0x22, 0x22, 0x22, 0x22, 0x22, 0x22,
644 0x22, 0x22, 0x21, 0x21, 0x21, 0x21, 0x21, 0x20,
645 0x20, 0x20, 0x20, 0x1f, 0x1f, 0x1e, 0x1e, 0x1e,
646 0x1d, 0x1d, 0x1c, 0x1c, 0x1b, 0x1a, 0x19, 0x19,
647 0x18, 0x17, 0x16, 0x15, 0x14, 0x12, 0x11, 0x0f,
648 0x0e, 0x0c, 0x0a, 0x08, 0x06, 0x04, 0x01, 0x00
649};
650
651unsigned char STRENGTH_MAP[] = {
652 0x64, 0x64, 0x63, 0x62, 0x61, 0x60, 0x5f, 0x5e,
653 0x5d, 0x5c, 0x5b, 0x5a, 0x57, 0x54, 0x52, 0x50,
654 0x4e, 0x4c, 0x4a, 0x48, 0x46, 0x44, 0x41, 0x3f,
655 0x3c, 0x3a, 0x37, 0x36, 0x36, 0x1c, 0x1c, 0x1b,
656 0x1b, 0x1a, 0x1a, 0x19, 0x19, 0x18, 0x18, 0x17,
657 0x17, 0x16, 0x16, 0x15, 0x15, 0x14, 0x14, 0x13,
658 0x13, 0x12, 0x12, 0x11, 0x11, 0x10, 0x10, 0x0f,
659 0x0f, 0x0e, 0x0e, 0x0d, 0x0d, 0x0c, 0x0c, 0x0b,
660 0x0b, 0x0a, 0x0a, 0x09, 0x09, 0x08, 0x08, 0x07,
661 0x07, 0x06, 0x06, 0x05, 0x04, 0x03, 0x02, 0x00
662};
663
664void rtl8180_RSSI_calc(struct net_device *dev, u8 *rssi, u8 *qual)
665{
666 u32 temp;
667 u32 temp2;
668 u32 q;
669 u32 orig_qual;
670 u8 _rssi;
671
672 q = *qual;
673 orig_qual = *qual;
674 _rssi = 0; /* avoid gcc complains.. */
675
676 if (q <= 0x4e) {
677 temp = QUALITY_MAP[q];
678 } else {
679 if (q & 0x80)
680 temp = 0x32;
681 else
682 temp = 1;
683 }
684
685 *qual = temp;
686 temp2 = *rssi;
687
688 if (_rssi < 0x64) {
689 if (_rssi == 0)
690 *rssi = 1;
691 } else {
692 *rssi = 0x64;
693 }
694
695 return;
696}
697
698void rtl8180_irq_enable(struct net_device *dev)
699{
700 struct r8180_priv *priv = (struct r8180_priv *)ieee80211_priv(dev);
701
702 priv->irq_enabled = 1;
703 write_nic_word(dev, INTA_MASK, priv->irq_mask);
704}
705
706void rtl8180_irq_disable(struct net_device *dev) 610void rtl8180_irq_disable(struct net_device *dev)
707{ 611{
708 struct r8180_priv *priv = (struct r8180_priv *)ieee80211_priv(dev); 612 struct r8180_priv *priv = (struct r8180_priv *)ieee80211_priv(dev);
@@ -724,7 +628,6 @@ void rtl8180_set_mode(struct net_device *dev, int mode)
724 write_nic_byte(dev, EPROM_CMD, ecmd); 628 write_nic_byte(dev, EPROM_CMD, ecmd);
725} 629}
726 630
727void rtl8180_adapter_start(struct net_device *dev);
728void rtl8180_beacon_tx_enable(struct net_device *dev); 631void rtl8180_beacon_tx_enable(struct net_device *dev);
729 632
730void rtl8180_update_msr(struct net_device *dev) 633void rtl8180_update_msr(struct net_device *dev)
@@ -771,57 +674,6 @@ void rtl8180_set_chan(struct net_device *dev, short ch)
771 priv->rf_set_chan(dev, priv->chan); 674 priv->rf_set_chan(dev, priv->chan);
772} 675}
773 676
774void rtl8180_rx_enable(struct net_device *dev)
775{
776 u8 cmd;
777 u32 rxconf;
778 /* for now we accept data, management & ctl frame*/
779 struct r8180_priv *priv = (struct r8180_priv *)ieee80211_priv(dev);
780
781 rxconf = read_nic_dword(dev, RX_CONF);
782 rxconf = rxconf & ~MAC_FILTER_MASK;
783 rxconf = rxconf | (1<<ACCEPT_MNG_FRAME_SHIFT);
784 rxconf = rxconf | (1<<ACCEPT_DATA_FRAME_SHIFT);
785 rxconf = rxconf | (1<<ACCEPT_BCAST_FRAME_SHIFT);
786 rxconf = rxconf | (1<<ACCEPT_MCAST_FRAME_SHIFT);
787 if (dev->flags & IFF_PROMISC)
788 DMESG("NIC in promisc mode");
789
790 if (priv->ieee80211->iw_mode == IW_MODE_MONITOR || \
791 dev->flags & IFF_PROMISC) {
792 rxconf = rxconf | (1<<ACCEPT_ALLMAC_FRAME_SHIFT);
793 } else {
794 rxconf = rxconf | (1<<ACCEPT_NICMAC_FRAME_SHIFT);
795 }
796
797 if (priv->ieee80211->iw_mode == IW_MODE_MONITOR) {
798 rxconf = rxconf | (1<<ACCEPT_CTL_FRAME_SHIFT);
799 rxconf = rxconf | (1<<ACCEPT_ICVERR_FRAME_SHIFT);
800 rxconf = rxconf | (1<<ACCEPT_PWR_FRAME_SHIFT);
801 }
802
803 if (priv->crcmon == 1 && priv->ieee80211->iw_mode == IW_MODE_MONITOR)
804 rxconf = rxconf | (1<<ACCEPT_CRCERR_FRAME_SHIFT);
805
806 rxconf = rxconf & ~RX_FIFO_THRESHOLD_MASK;
807 rxconf = rxconf | (RX_FIFO_THRESHOLD_NONE << RX_FIFO_THRESHOLD_SHIFT);
808
809 rxconf = rxconf | (1<<RX_AUTORESETPHY_SHIFT);
810 rxconf = rxconf & ~MAX_RX_DMA_MASK;
811 rxconf = rxconf | (MAX_RX_DMA_2048<<MAX_RX_DMA_SHIFT);
812
813 rxconf = rxconf | RCR_ONLYERLPKT;
814
815 rxconf = rxconf & ~RCR_CS_MASK;
816
817 write_nic_dword(dev, RX_CONF, rxconf);
818
819 fix_rx_fifo(dev);
820
821 cmd = read_nic_byte(dev, CMD);
822 write_nic_byte(dev, CMD, cmd | (1<<CMD_RX_ENABLE_SHIFT));
823}
824
825void set_nic_txring(struct net_device *dev) 677void set_nic_txring(struct net_device *dev)
826{ 678{
827 struct r8180_priv *priv = (struct r8180_priv *)ieee80211_priv(dev); 679 struct r8180_priv *priv = (struct r8180_priv *)ieee80211_priv(dev);
@@ -835,80 +687,6 @@ void set_nic_txring(struct net_device *dev)
835 write_nic_dword(dev, TX_BEACON_RING_ADDR, priv->txbeaconringdma); 687 write_nic_dword(dev, TX_BEACON_RING_ADDR, priv->txbeaconringdma);
836} 688}
837 689
838void rtl8180_conttx_enable(struct net_device *dev)
839{
840 u32 txconf;
841
842 txconf = read_nic_dword(dev, TX_CONF);
843 txconf = txconf & ~TX_LOOPBACK_MASK;
844 txconf = txconf | (TX_LOOPBACK_CONTINUE<<TX_LOOPBACK_SHIFT);
845 write_nic_dword(dev, TX_CONF, txconf);
846}
847
848void rtl8180_conttx_disable(struct net_device *dev)
849{
850 u32 txconf;
851
852 txconf = read_nic_dword(dev, TX_CONF);
853 txconf = txconf & ~TX_LOOPBACK_MASK;
854 txconf = txconf | (TX_LOOPBACK_NONE<<TX_LOOPBACK_SHIFT);
855 write_nic_dword(dev, TX_CONF, txconf);
856}
857
858void rtl8180_tx_enable(struct net_device *dev)
859{
860 u8 cmd;
861 u8 tx_agc_ctl;
862 u8 byte;
863 u32 txconf;
864 struct r8180_priv *priv = (struct r8180_priv *)ieee80211_priv(dev);
865
866 txconf = read_nic_dword(dev, TX_CONF);
867
868 byte = read_nic_byte(dev, CW_CONF);
869 byte &= ~(1<<CW_CONF_PERPACKET_CW_SHIFT);
870 byte &= ~(1<<CW_CONF_PERPACKET_RETRY_SHIFT);
871 write_nic_byte(dev, CW_CONF, byte);
872
873 tx_agc_ctl = read_nic_byte(dev, TX_AGC_CTL);
874 tx_agc_ctl &= ~(1<<TX_AGC_CTL_PERPACKET_GAIN_SHIFT);
875 tx_agc_ctl &= ~(1<<TX_AGC_CTL_PERPACKET_ANTSEL_SHIFT);
876 tx_agc_ctl |= (1<<TX_AGC_CTL_FEEDBACK_ANT);
877 write_nic_byte(dev, TX_AGC_CTL, tx_agc_ctl);
878 write_nic_byte(dev, 0xec, 0x3f); /* Disable early TX */
879
880 txconf = txconf & ~(1<<TCR_PROBE_NOTIMESTAMP_SHIFT);
881
882 txconf = txconf & ~TX_LOOPBACK_MASK;
883 txconf = txconf | (TX_LOOPBACK_NONE<<TX_LOOPBACK_SHIFT);
884 txconf = txconf & ~TCR_DPRETRY_MASK;
885 txconf = txconf & ~TCR_RTSRETRY_MASK;
886 txconf = txconf | (priv->retry_data<<TX_DPRETRY_SHIFT);
887 txconf = txconf | (priv->retry_rts<<TX_RTSRETRY_SHIFT);
888 txconf = txconf & ~(1<<TX_NOCRC_SHIFT);
889
890 if (priv->hw_plcp_len)
891 txconf = txconf & ~TCR_PLCP_LEN;
892 else
893 txconf = txconf | TCR_PLCP_LEN;
894
895 txconf = txconf & ~TCR_MXDMA_MASK;
896 txconf = txconf | (TCR_MXDMA_2048<<TCR_MXDMA_SHIFT);
897 txconf = txconf | TCR_CWMIN;
898 txconf = txconf | TCR_DISCW;
899
900 txconf = txconf | (1 << TX_NOICV_SHIFT);
901
902 write_nic_dword(dev, TX_CONF, txconf);
903
904 fix_tx_fifo(dev);
905
906 cmd = read_nic_byte(dev, CMD);
907 write_nic_byte(dev, CMD, cmd | (1<<CMD_TX_ENABLE_SHIFT));
908
909 write_nic_dword(dev, TX_CONF, txconf);
910}
911
912void rtl8180_beacon_tx_enable(struct net_device *dev) 690void rtl8180_beacon_tx_enable(struct net_device *dev)
913{ 691{
914 struct r8180_priv *priv = (struct r8180_priv *)ieee80211_priv(dev); 692 struct r8180_priv *priv = (struct r8180_priv *)ieee80211_priv(dev);
@@ -936,8 +714,8 @@ void rtl8180_rtx_disable(struct net_device *dev)
936 struct r8180_priv *priv = ieee80211_priv(dev); 714 struct r8180_priv *priv = ieee80211_priv(dev);
937 715
938 cmd = read_nic_byte(dev, CMD); 716 cmd = read_nic_byte(dev, CMD);
939 write_nic_byte(dev, CMD, cmd & ~\ 717 write_nic_byte(dev, CMD, cmd &
940 ((1<<CMD_RX_ENABLE_SHIFT)|(1<<CMD_TX_ENABLE_SHIFT))); 718 ~((1<<CMD_RX_ENABLE_SHIFT)|(1<<CMD_TX_ENABLE_SHIFT)));
941 force_pci_posting(dev); 719 force_pci_posting(dev);
942 mdelay(10); 720 mdelay(10);
943 721
@@ -1481,8 +1259,7 @@ void rtl8180_rx(struct net_device *dev)
1481 1259
1482 pci_dma_sync_single_for_cpu(priv->pdev, 1260 pci_dma_sync_single_for_cpu(priv->pdev,
1483 priv->rxbuffer->dma, 1261 priv->rxbuffer->dma,
1484 priv->rxbuffersize * \ 1262 priv->rxbuffersize * sizeof(u8),
1485 sizeof(u8),
1486 PCI_DMA_FROMDEVICE); 1263 PCI_DMA_FROMDEVICE);
1487 1264
1488 first = *(priv->rxringtail) & (1<<29) ? 1 : 0; 1265 first = *(priv->rxringtail) & (1<<29) ? 1 : 0;
@@ -1660,14 +1437,9 @@ void rtl8180_rx(struct net_device *dev)
1660 dev_kfree_skb_any(priv->rx_skb); 1437 dev_kfree_skb_any(priv->rx_skb);
1661 priv->stats.rxnolast++; 1438 priv->stats.rxnolast++;
1662 } 1439 }
1663 /* support for prism header has been originally added by Christian */ 1440 priv->rx_skb = dev_alloc_skb(len+2);
1664 if (priv->prism_hdr && priv->ieee80211->iw_mode == IW_MODE_MONITOR) { 1441 if (!priv->rx_skb)
1665 1442 goto drop;
1666 } else {
1667 priv->rx_skb = dev_alloc_skb(len+2);
1668 if (!priv->rx_skb)
1669 goto drop;
1670 }
1671 1443
1672 priv->rx_skb_complete = 0; 1444 priv->rx_skb_complete = 0;
1673 priv->rx_skb->dev = dev; 1445 priv->rx_skb->dev = dev;
@@ -1718,8 +1490,7 @@ void rtl8180_rx(struct net_device *dev)
1718 1490
1719 pci_dma_sync_single_for_device(priv->pdev, 1491 pci_dma_sync_single_for_device(priv->pdev,
1720 priv->rxbuffer->dma, 1492 priv->rxbuffer->dma,
1721 priv->rxbuffersize * \ 1493 priv->rxbuffersize * sizeof(u8),
1722 sizeof(u8),
1723 PCI_DMA_FROMDEVICE); 1494 PCI_DMA_FROMDEVICE);
1724 1495
1725drop: /* this is used when we have not enough mem */ 1496drop: /* this is used when we have not enough mem */
@@ -1929,7 +1700,7 @@ void rtl8180_prepare_beacon(struct net_device *dev)
1929 * descriptor in the ring buffer, copyes the frame in a TX buffer 1700 * descriptor in the ring buffer, copyes the frame in a TX buffer
1930 * and kicks the NIC to ensure it does the DMA transfer. 1701 * and kicks the NIC to ensure it does the DMA transfer.
1931 */ 1702 */
1932short rtl8180_tx(struct net_device *dev, u8* txbuf, int len, int priority, 1703short rtl8180_tx(struct net_device *dev, u8 *txbuf, int len, int priority,
1933 short morefrag, short descfrag, int rate) 1704 short morefrag, short descfrag, int rate)
1934{ 1705{
1935 struct r8180_priv *priv = ieee80211_priv(dev); 1706 struct r8180_priv *priv = ieee80211_priv(dev);
@@ -1940,8 +1711,6 @@ short rtl8180_tx(struct net_device *dev, u8* txbuf, int len, int priority,
1940 int remain; 1711 int remain;
1941 int buflen; 1712 int buflen;
1942 int count; 1713 int count;
1943 u16 duration;
1944 short ext;
1945 struct buffer *buflist; 1714 struct buffer *buflist;
1946 struct ieee80211_hdr_3addr *frag_hdr = (struct ieee80211_hdr_3addr *)txbuf; 1715 struct ieee80211_hdr_3addr *frag_hdr = (struct ieee80211_hdr_3addr *)txbuf;
1947 u8 dest[ETH_ALEN]; 1716 u8 dest[ETH_ALEN];
@@ -2137,15 +1906,6 @@ short rtl8180_tx(struct net_device *dev, u8* txbuf, int len, int priority,
2137 1906
2138 *tail = *tail | ((rate&0xf) << 24); 1907 *tail = *tail | ((rate&0xf) << 24);
2139 1908
2140 /* hw_plcp_len is not used for rtl8180 chip */
2141 /* FIXME */
2142 if (!priv->hw_plcp_len) {
2143 duration = rtl8180_len2duration(len, rate, &ext);
2144 *(tail+1) = *(tail+1) | ((duration & 0x7fff)<<16);
2145 if (ext)
2146 *(tail+1) = *(tail+1) | (1<<31); /* plcp length extension */
2147 }
2148
2149 if (morefrag) 1909 if (morefrag)
2150 *tail = (*tail) | (1<<17); /* more fragment */ 1910 *tail = (*tail) | (1<<17); /* more fragment */
2151 if (!remain) 1911 if (!remain)
@@ -2223,10 +1983,10 @@ void rtl8180_link_change(struct net_device *dev)
2223 write_nic_dword(dev, BSSID, ((u32 *)net->bssid)[0]); 1983 write_nic_dword(dev, BSSID, ((u32 *)net->bssid)[0]);
2224 write_nic_word(dev, BSSID+4, ((u16 *)net->bssid)[2]); 1984 write_nic_word(dev, BSSID+4, ((u16 *)net->bssid)[2]);
2225 1985
2226 beacon_interval = read_nic_dword(dev, BEACON_INTERVAL); 1986 beacon_interval = read_nic_word(dev, BEACON_INTERVAL);
2227 beacon_interval &= ~BEACON_INTERVAL_MASK; 1987 beacon_interval &= ~BEACON_INTERVAL_MASK;
2228 beacon_interval |= net->beacon_interval; 1988 beacon_interval |= net->beacon_interval;
2229 write_nic_dword(dev, BEACON_INTERVAL, beacon_interval); 1989 write_nic_word(dev, BEACON_INTERVAL, beacon_interval);
2230 1990
2231 rtl8180_set_mode(dev, EPROM_CMD_NORMAL); 1991 rtl8180_set_mode(dev, EPROM_CMD_NORMAL);
2232 1992
@@ -2279,8 +2039,6 @@ short rtl8180_is_tx_queue_empty(struct net_device *dev)
2279 return 0; 2039 return 0;
2280 return 1; 2040 return 1;
2281} 2041}
2282/* FIXME FIXME 5msecs is random */
2283#define HW_WAKE_DELAY 5
2284 2042
2285void rtl8180_hw_wakeup(struct net_device *dev) 2043void rtl8180_hw_wakeup(struct net_device *dev)
2286{ 2044{
@@ -2397,7 +2155,8 @@ void rtl8180_wmm_param_update(struct work_struct *work)
2397 write_nic_dword(dev, AC_VO_PARAM, u4bAcParam); 2155 write_nic_dword(dev, AC_VO_PARAM, u4bAcParam);
2398 break; 2156 break;
2399 default: 2157 default:
2400 printk(KERN_WARNING "SetHwReg8185():invalid ACI: %d!\n", eACI); 2158 pr_warn("SetHwReg8185():invalid ACI: %d!\n",
2159 eACI);
2401 break; 2160 break;
2402 } 2161 }
2403 } 2162 }
@@ -2436,7 +2195,8 @@ void rtl8180_wmm_param_update(struct work_struct *work)
2436 write_nic_dword(dev, AC_VO_PARAM, u4bAcParam); 2195 write_nic_dword(dev, AC_VO_PARAM, u4bAcParam);
2437 break; 2196 break;
2438 default: 2197 default:
2439 printk(KERN_WARNING "SetHwReg8185(): invalid ACI: %d !\n", eACI); 2198 pr_warn("SetHwReg8185(): invalid ACI: %d !\n",
2199 eACI);
2440 break; 2200 break;
2441 } 2201 }
2442 } 2202 }
@@ -2444,7 +2204,6 @@ void rtl8180_wmm_param_update(struct work_struct *work)
2444 } 2204 }
2445} 2205}
2446 2206
2447void rtl8180_tx_irq_wq(struct work_struct *work);
2448void rtl8180_restart_wq(struct work_struct *work); 2207void rtl8180_restart_wq(struct work_struct *work);
2449/* void rtl8180_rq_tx_ack(struct work_struct *work); */ 2208/* void rtl8180_rq_tx_ack(struct work_struct *work); */
2450void rtl8180_watch_dog_wq(struct work_struct *work); 2209void rtl8180_watch_dog_wq(struct work_struct *work);
@@ -2455,7 +2214,7 @@ void rtl8180_watch_dog(struct net_device *dev);
2455 2214
2456void watch_dog_adaptive(unsigned long data) 2215void watch_dog_adaptive(unsigned long data)
2457{ 2216{
2458 struct r8180_priv* priv = ieee80211_priv((struct net_device *)data); 2217 struct r8180_priv *priv = ieee80211_priv((struct net_device *)data);
2459 2218
2460 if (!priv->up) { 2219 if (!priv->up) {
2461 DMESG("<----watch_dog_adaptive():driver is not up!\n"); 2220 DMESG("<----watch_dog_adaptive():driver is not up!\n");
@@ -2601,8 +2360,7 @@ short rtl8180_init(struct net_device *dev)
2601{ 2360{
2602 struct r8180_priv *priv = ieee80211_priv(dev); 2361 struct r8180_priv *priv = ieee80211_priv(dev);
2603 u16 word; 2362 u16 word;
2604 u16 version; 2363 u16 usValue;
2605 u32 usValue;
2606 u16 tmpu16; 2364 u16 tmpu16;
2607 int i, j; 2365 int i, j;
2608 struct eeprom_93cx6 eeprom; 2366 struct eeprom_93cx6 eeprom;
@@ -2634,7 +2392,6 @@ short rtl8180_init(struct net_device *dev)
2634 priv->RFChangeInProgress = false; 2392 priv->RFChangeInProgress = false;
2635 priv->SetRFPowerStateInProgress = false; 2393 priv->SetRFPowerStateInProgress = false;
2636 priv->RFProgType = 0; 2394 priv->RFProgType = 0;
2637 priv->bInHctTest = false;
2638 2395
2639 priv->irq_enabled = 0; 2396 priv->irq_enabled = 0;
2640 2397
@@ -2658,14 +2415,12 @@ short rtl8180_init(struct net_device *dev)
2658 priv->ieee80211->ps_is_queue_empty = rtl8180_is_tx_queue_empty; 2415 priv->ieee80211->ps_is_queue_empty = rtl8180_is_tx_queue_empty;
2659 2416
2660 priv->hw_wep = hwwep; 2417 priv->hw_wep = hwwep;
2661 priv->prism_hdr = 0;
2662 priv->dev = dev; 2418 priv->dev = dev;
2663 priv->retry_rts = DEFAULT_RETRY_RTS; 2419 priv->retry_rts = DEFAULT_RETRY_RTS;
2664 priv->retry_data = DEFAULT_RETRY_DATA; 2420 priv->retry_data = DEFAULT_RETRY_DATA;
2665 priv->RFChangeInProgress = false; 2421 priv->RFChangeInProgress = false;
2666 priv->SetRFPowerStateInProgress = false; 2422 priv->SetRFPowerStateInProgress = false;
2667 priv->RFProgType = 0; 2423 priv->RFProgType = 0;
2668 priv->bInHctTest = false;
2669 priv->bInactivePs = true; /* false; */ 2424 priv->bInactivePs = true; /* false; */
2670 priv->ieee80211->bInactivePs = priv->bInactivePs; 2425 priv->ieee80211->bInactivePs = priv->bInactivePs;
2671 priv->bSwRfProcessing = false; 2426 priv->bSwRfProcessing = false;
@@ -2726,7 +2481,6 @@ short rtl8180_init(struct net_device *dev)
2726 priv->NumTxOkTotal = 0; 2481 priv->NumTxOkTotal = 0;
2727 priv->NumTxUnicast = 0; 2482 priv->NumTxUnicast = 0;
2728 priv->keepAliveLevel = DEFAULT_KEEP_ALIVE_LEVEL; 2483 priv->keepAliveLevel = DEFAULT_KEEP_ALIVE_LEVEL;
2729 priv->PowerProfile = POWER_PROFILE_AC;
2730 priv->CurrRetryCnt = 0; 2484 priv->CurrRetryCnt = 0;
2731 priv->LastRetryCnt = 0; 2485 priv->LastRetryCnt = 0;
2732 priv->LastTxokCnt = 0; 2486 priv->LastTxokCnt = 0;
@@ -2748,15 +2502,12 @@ short rtl8180_init(struct net_device *dev)
2748 priv->RegBModeGainStage = 1; 2502 priv->RegBModeGainStage = 1;
2749 2503
2750 priv->promisc = (dev->flags & IFF_PROMISC) ? 1 : 0; 2504 priv->promisc = (dev->flags & IFF_PROMISC) ? 1 : 0;
2751 spin_lock_init(&priv->irq_lock);
2752 spin_lock_init(&priv->irq_th_lock); 2505 spin_lock_init(&priv->irq_th_lock);
2753 spin_lock_init(&priv->tx_lock); 2506 spin_lock_init(&priv->tx_lock);
2754 spin_lock_init(&priv->ps_lock); 2507 spin_lock_init(&priv->ps_lock);
2755 spin_lock_init(&priv->rf_ps_lock); 2508 spin_lock_init(&priv->rf_ps_lock);
2756 sema_init(&priv->wx_sem, 1); 2509 sema_init(&priv->wx_sem, 1);
2757 sema_init(&priv->rf_state, 1);
2758 INIT_WORK(&priv->reset_wq, (void *)rtl8180_restart_wq); 2510 INIT_WORK(&priv->reset_wq, (void *)rtl8180_restart_wq);
2759 INIT_WORK(&priv->tx_irq_wq, (void *)rtl8180_tx_irq_wq);
2760 INIT_DELAYED_WORK(&priv->ieee80211->hw_wakeup_wq, 2511 INIT_DELAYED_WORK(&priv->ieee80211->hw_wakeup_wq,
2761 (void *)rtl8180_hw_wakeup_wq); 2512 (void *)rtl8180_hw_wakeup_wq);
2762 INIT_DELAYED_WORK(&priv->ieee80211->hw_sleep_wq, 2513 INIT_DELAYED_WORK(&priv->ieee80211->hw_sleep_wq,
@@ -2798,19 +2549,14 @@ short rtl8180_init(struct net_device *dev)
2798 priv->ieee80211->stop_send_beacons = rtl8180_beacon_tx_disable; 2549 priv->ieee80211->stop_send_beacons = rtl8180_beacon_tx_disable;
2799 priv->ieee80211->fts = DEFAULT_FRAG_THRESHOLD; 2550 priv->ieee80211->fts = DEFAULT_FRAG_THRESHOLD;
2800 2551
2801 priv->MWIEnable = 0;
2802
2803 priv->ShortRetryLimit = 7; 2552 priv->ShortRetryLimit = 7;
2804 priv->LongRetryLimit = 7; 2553 priv->LongRetryLimit = 7;
2805 priv->EarlyRxThreshold = 7; 2554 priv->EarlyRxThreshold = 7;
2806 2555
2807 priv->CSMethod = (0x01 << 29); 2556 priv->TransmitConfig = (1<<TCR_DurProcMode_OFFSET) |
2808
2809 priv->TransmitConfig = TCR_DurProcMode_OFFSET |
2810 (7<<TCR_MXDMA_OFFSET) | 2557 (7<<TCR_MXDMA_OFFSET) |
2811 (priv->ShortRetryLimit<<TCR_SRL_OFFSET) | 2558 (priv->ShortRetryLimit<<TCR_SRL_OFFSET) |
2812 (priv->LongRetryLimit<<TCR_LRL_OFFSET) | 2559 (priv->LongRetryLimit<<TCR_LRL_OFFSET);
2813 (0 ? TCR_SAT : 0);
2814 2560
2815 priv->ReceiveConfig = RCR_AMF | RCR_ADF | RCR_ACF | 2561 priv->ReceiveConfig = RCR_AMF | RCR_ADF | RCR_ACF |
2816 RCR_AB | RCR_AM | RCR_APM | 2562 RCR_AB | RCR_AM | RCR_APM |
@@ -2832,47 +2578,35 @@ short rtl8180_init(struct net_device *dev)
2832 priv->InitialGain = 6; 2578 priv->InitialGain = 6;
2833 2579
2834 DMESG("MAC controller is a RTL8187SE b/g"); 2580 DMESG("MAC controller is a RTL8187SE b/g");
2835 priv->phy_ver = 2;
2836 2581
2837 priv->ieee80211->modulation |= IEEE80211_OFDM_MODULATION; 2582 priv->ieee80211->modulation |= IEEE80211_OFDM_MODULATION;
2838 priv->ieee80211->short_slot = 1; 2583 priv->ieee80211->short_slot = 1;
2839 2584
2840 /* just for sync 85 */ 2585 eeprom_93cx6_read(&eeprom, EEPROM_SW_REVD_OFFSET, &usValue);
2841 priv->enable_gpio0 = 0; 2586 DMESG("usValue is %#hx\n", usValue);
2842
2843 eeprom_93cx6_read(&eeprom, EEPROM_SW_REVD_OFFSET, &eeprom_val);
2844 usValue = eeprom_val;
2845 DMESG("usValue is 0x%x\n", usValue);
2846 /* 3Read AntennaDiversity */ 2587 /* 3Read AntennaDiversity */
2847 2588
2848 /* SW Antenna Diversity. */ 2589 /* SW Antenna Diversity. */
2849 if ((usValue & EEPROM_SW_AD_MASK) != EEPROM_SW_AD_ENABLE) 2590 priv->EEPROMSwAntennaDiversity = (usValue & EEPROM_SW_AD_MASK) ==
2850 priv->EEPROMSwAntennaDiversity = false; 2591 EEPROM_SW_AD_ENABLE;
2851 else
2852 priv->EEPROMSwAntennaDiversity = true;
2853 2592
2854 /* Default Antenna to use. */ 2593 /* Default Antenna to use. */
2855 if ((usValue & EEPROM_DEF_ANT_MASK) != EEPROM_DEF_ANT_1) 2594 priv->EEPROMDefaultAntenna1 = (usValue & EEPROM_DEF_ANT_MASK) ==
2856 priv->EEPROMDefaultAntenna1 = false; 2595 EEPROM_DEF_ANT_1;
2857 else
2858 priv->EEPROMDefaultAntenna1 = true;
2859 2596
2860 if (priv->RegSwAntennaDiversityMechanism == 0) /* Auto */ 2597 if (priv->RegSwAntennaDiversityMechanism == 0) /* Auto */
2861 /* 0: default from EEPROM. */ 2598 /* 0: default from EEPROM. */
2862 priv->bSwAntennaDiverity = priv->EEPROMSwAntennaDiversity; 2599 priv->bSwAntennaDiverity = priv->EEPROMSwAntennaDiversity;
2863 else 2600 else
2864 /* 1:disable antenna diversity, 2: enable antenna diversity. */ 2601 /* 1:disable antenna diversity, 2: enable antenna diversity. */
2865 priv->bSwAntennaDiverity = ((priv->RegSwAntennaDiversityMechanism == 1) ? false : true); 2602 priv->bSwAntennaDiverity = priv->RegSwAntennaDiversityMechanism == 2;
2866 2603
2867 if (priv->RegDefaultAntenna == 0) 2604 if (priv->RegDefaultAntenna == 0)
2868 /* 0: default from EEPROM. */ 2605 /* 0: default from EEPROM. */
2869 priv->bDefaultAntenna1 = priv->EEPROMDefaultAntenna1; 2606 priv->bDefaultAntenna1 = priv->EEPROMDefaultAntenna1;
2870 else 2607 else
2871 /* 1: main, 2: aux. */ 2608 /* 1: main, 2: aux. */
2872 priv->bDefaultAntenna1 = ((priv->RegDefaultAntenna == 2) ? true : false); 2609 priv->bDefaultAntenna1 = priv->RegDefaultAntenna == 2;
2873
2874 /* rtl8185 can calc plcp len in HW. */
2875 priv->hw_plcp_len = 1;
2876 2610
2877 priv->plcp_preamble_mode = 2; 2611 priv->plcp_preamble_mode = 2;
2878 /* the eeprom type is stored in RCR register bit #6 */ 2612 /* the eeprom type is stored in RCR register bit #6 */
@@ -2909,18 +2643,6 @@ short rtl8180_init(struct net_device *dev)
2909 if ((tmpu16 & EEPROM_THERMAL_METER_ENABLE) >> 13) 2643 if ((tmpu16 & EEPROM_THERMAL_METER_ENABLE) >> 13)
2910 priv->bTxPowerTrack = true; 2644 priv->bTxPowerTrack = true;
2911 2645
2912 eeprom_93cx6_read(&eeprom, EPROM_TXPW_BASE, &word);
2913 priv->cck_txpwr_base = word & 0xf;
2914 priv->ofdm_txpwr_base = (word>>4) & 0xf;
2915
2916 eeprom_93cx6_read(&eeprom, EPROM_VERSION, &version);
2917 DMESG("EEPROM version %x", version);
2918 priv->rcr_csense = 3;
2919
2920 eeprom_93cx6_read(&eeprom, ENERGY_TRESHOLD, &eeprom_val);
2921 priv->cs_treshold = (eeprom_val & 0xff00) >> 8;
2922
2923 eeprom_93cx6_read(&eeprom, RFCHIPID, &eeprom_val);
2924 priv->rf_sleep = rtl8225z4_rf_sleep; 2646 priv->rf_sleep = rtl8225z4_rf_sleep;
2925 priv->rf_wakeup = rtl8225z4_rf_wakeup; 2647 priv->rf_wakeup = rtl8225z4_rf_wakeup;
2926 DMESGW("**PLEASE** REPORT SUCCESSFUL/UNSUCCESSFUL TO Realtek!"); 2648 DMESGW("**PLEASE** REPORT SUCCESSFUL/UNSUCCESSFUL TO Realtek!");
@@ -3084,100 +2806,6 @@ void write_phy_cck(struct net_device *dev, u8 adr, u32 data)
3084 rtl8185_write_phy(dev, adr, data | 0x10000); 2806 rtl8185_write_phy(dev, adr, data | 0x10000);
3085} 2807}
3086 2808
3087void rtl8185_set_rate(struct net_device *dev)
3088{
3089 int i;
3090 u16 word;
3091 int basic_rate, min_rr_rate, max_rr_rate;
3092
3093 basic_rate = ieeerate2rtlrate(240);
3094 min_rr_rate = ieeerate2rtlrate(60);
3095 max_rr_rate = ieeerate2rtlrate(240);
3096
3097 write_nic_byte(dev, RESP_RATE,
3098 max_rr_rate<<MAX_RESP_RATE_SHIFT |
3099 min_rr_rate<<MIN_RESP_RATE_SHIFT);
3100
3101 word = read_nic_word(dev, BRSR);
3102 word &= ~BRSR_MBR_8185;
3103
3104 for (i = 0; i <= basic_rate; i++)
3105 word |= (1<<i);
3106
3107 write_nic_word(dev, BRSR, word);
3108}
3109
3110void rtl8180_adapter_start(struct net_device *dev)
3111{
3112 struct r8180_priv *priv = ieee80211_priv(dev);
3113
3114 rtl8180_rtx_disable(dev);
3115 rtl8180_reset(dev);
3116
3117 /* enable beacon timeout, beacon TX ok and err
3118 * LP tx ok and err, HP TX ok and err, NP TX ok and err,
3119 * RX ok and ERR, and GP timer
3120 */
3121 priv->irq_mask = 0x6fcf;
3122
3123 priv->dma_poll_mask = 0;
3124
3125 rtl8180_beacon_tx_disable(dev);
3126
3127 rtl8180_set_mode(dev, EPROM_CMD_CONFIG);
3128 write_nic_dword(dev, MAC0, ((u32 *)dev->dev_addr)[0]);
3129 write_nic_word(dev, MAC4, ((u32 *)dev->dev_addr)[1] & 0xffff);
3130 rtl8180_set_mode(dev, EPROM_CMD_NORMAL);
3131
3132 rtl8180_update_msr(dev);
3133
3134 /* These might be unnecessary since we do in rx_enable / tx_enable */
3135 fix_rx_fifo(dev);
3136 fix_tx_fifo(dev);
3137
3138 rtl8180_set_mode(dev, EPROM_CMD_CONFIG);
3139
3140 /*
3141 * The following is very strange. seems to be that 1 means test mode,
3142 * but we need to acknowledges the nic when a packet is ready
3143 * although we set it to 0
3144 */
3145
3146 write_nic_byte(dev,
3147 CONFIG2, read_nic_byte(dev, CONFIG2) & ~\
3148 (1<<CONFIG2_DMA_POLLING_MODE_SHIFT));
3149 /* ^the nic isn't in test mode */
3150 write_nic_byte(dev,
3151 CONFIG2, read_nic_byte(dev, CONFIG2)|(1<<4));
3152
3153 rtl8180_set_mode(dev, EPROM_CMD_NORMAL);
3154
3155 write_nic_dword(dev, INT_TIMEOUT, 0);
3156
3157 write_nic_byte(dev, WPA_CONFIG, 0);
3158
3159 rtl8180_no_hw_wep(dev);
3160
3161 rtl8185_set_rate(dev);
3162 write_nic_byte(dev, RATE_FALLBACK, 0x81);
3163
3164 write_nic_byte(dev, GP_ENABLE, read_nic_byte(dev, GP_ENABLE) & ~(1<<6));
3165
3166 /* FIXME cfg 3 ClkRun enable - isn't it ReadOnly ? */
3167 rtl8180_set_mode(dev, EPROM_CMD_CONFIG);
3168 write_nic_byte(dev, CONFIG3, read_nic_byte(dev, CONFIG3)
3169 | (1 << CONFIG3_CLKRUN_SHIFT));
3170 rtl8180_set_mode(dev, EPROM_CMD_NORMAL);
3171
3172 priv->rf_init(dev);
3173
3174 if (priv->rf_set_sens != NULL)
3175 priv->rf_set_sens(dev, priv->sens);
3176 rtl8180_irq_enable(dev);
3177
3178 netif_start_queue(dev);
3179}
3180
3181/* 2809/*
3182 * This configures registers for beacon tx and enables it via 2810 * This configures registers for beacon tx and enables it via
3183 * rtl8180_beacon_tx_enable(). rtl8180_beacon_tx_disable() might 2811 * rtl8180_beacon_tx_enable(). rtl8180_beacon_tx_disable() might
@@ -3299,8 +2927,6 @@ static void MgntLinkKeepAlive(struct r8180_priv *priv)
3299 } 2927 }
3300} 2928}
3301 2929
3302static u8 read_acadapter_file(char *filename);
3303
3304void rtl8180_watch_dog(struct net_device *dev) 2930void rtl8180_watch_dog(struct net_device *dev)
3305{ 2931{
3306 struct r8180_priv *priv = ieee80211_priv(dev); 2932 struct r8180_priv *priv = ieee80211_priv(dev);
@@ -3333,12 +2959,7 @@ void rtl8180_watch_dog(struct net_device *dev)
3333 MgntLinkKeepAlive(priv); 2959 MgntLinkKeepAlive(priv);
3334 2960
3335 /* YJ,add,080828,for LPS */ 2961 /* YJ,add,080828,for LPS */
3336 if (priv->PowerProfile == POWER_PROFILE_BATTERY) 2962 LeisurePSLeave(priv);
3337 priv->bLeisurePs = true;
3338 else if (priv->PowerProfile == POWER_PROFILE_AC) {
3339 LeisurePSLeave(priv);
3340 priv->bLeisurePs = false;
3341 }
3342 2963
3343 if (priv->ieee80211->state == IEEE80211_LINKED) { 2964 if (priv->ieee80211->state == IEEE80211_LINKED) {
3344 priv->link_detect.NumRxOkInPeriod = priv->ieee80211->NumRxDataInPeriod; 2965 priv->link_detect.NumRxOkInPeriod = priv->ieee80211->NumRxDataInPeriod;
@@ -3555,7 +3176,7 @@ static const struct net_device_ops rtl8180_netdev_ops = {
3555 .ndo_start_xmit = ieee80211_rtl_xmit, 3176 .ndo_start_xmit = ieee80211_rtl_xmit,
3556}; 3177};
3557 3178
3558static int __devinit rtl8180_pci_probe(struct pci_dev *pdev, 3179static int rtl8180_pci_probe(struct pci_dev *pdev,
3559 const struct pci_device_id *id) 3180 const struct pci_device_id *id)
3560{ 3181{
3561 unsigned long ioaddr = 0; 3182 unsigned long ioaddr = 0;
@@ -3638,7 +3259,8 @@ static int __devinit rtl8180_pci_probe(struct pci_dev *pdev,
3638 3259
3639 netif_carrier_off(dev); 3260 netif_carrier_off(dev);
3640 3261
3641 register_netdev(dev); 3262 if (register_netdev(dev))
3263 goto fail1;
3642 3264
3643 rtl8180_proc_init_one(dev); 3265 rtl8180_proc_init_one(dev);
3644 3266
@@ -3667,7 +3289,7 @@ fail_free:
3667 return ret; 3289 return ret;
3668} 3290}
3669 3291
3670static void __devexit rtl8180_pci_remove(struct pci_dev *pdev) 3292static void rtl8180_pci_remove(struct pci_dev *pdev)
3671{ 3293{
3672 struct r8180_priv *priv; 3294 struct r8180_priv *priv;
3673 struct net_device *dev = pci_get_drvdata(pdev); 3295 struct net_device *dev = pci_get_drvdata(pdev);
@@ -3721,27 +3343,27 @@ static int __init rtl8180_pci_module_init(void)
3721 3343
3722 ret = ieee80211_crypto_init(); 3344 ret = ieee80211_crypto_init();
3723 if (ret) { 3345 if (ret) {
3724 printk(KERN_ERR "ieee80211_crypto_init() failed %d\n", ret); 3346 pr_err("ieee80211_crypto_init() failed %d\n", ret);
3725 return ret; 3347 return ret;
3726 } 3348 }
3727 ret = ieee80211_crypto_tkip_init(); 3349 ret = ieee80211_crypto_tkip_init();
3728 if (ret) { 3350 if (ret) {
3729 printk(KERN_ERR "ieee80211_crypto_tkip_init() failed %d\n", ret); 3351 pr_err("ieee80211_crypto_tkip_init() failed %d\n", ret);
3730 return ret; 3352 return ret;
3731 } 3353 }
3732 ret = ieee80211_crypto_ccmp_init(); 3354 ret = ieee80211_crypto_ccmp_init();
3733 if (ret) { 3355 if (ret) {
3734 printk(KERN_ERR "ieee80211_crypto_ccmp_init() failed %d\n", ret); 3356 pr_err("ieee80211_crypto_ccmp_init() failed %d\n", ret);
3735 return ret; 3357 return ret;
3736 } 3358 }
3737 ret = ieee80211_crypto_wep_init(); 3359 ret = ieee80211_crypto_wep_init();
3738 if (ret) { 3360 if (ret) {
3739 printk(KERN_ERR "ieee80211_crypto_wep_init() failed %d\n", ret); 3361 pr_err("ieee80211_crypto_wep_init() failed %d\n", ret);
3740 return ret; 3362 return ret;
3741 } 3363 }
3742 3364
3743 printk(KERN_INFO "\nLinux kernel driver for RTL8180 / RTL8185 based WLAN cards\n"); 3365 pr_info("\nLinux kernel driver for RTL8180 / RTL8185 based WLAN cards\n");
3744 printk(KERN_INFO "Copyright (c) 2004-2005, Andrea Merello\n"); 3366 pr_info("Copyright (c) 2004-2005, Andrea Merello\n");
3745 DMESG("Initializing module"); 3367 DMESG("Initializing module");
3746 DMESG("Wireless extensions version %d", WIRELESS_EXT); 3368 DMESG("Wireless extensions version %d", WIRELESS_EXT);
3747 rtl8180_proc_module_init(); 3369 rtl8180_proc_module_init();
@@ -3844,7 +3466,7 @@ void rtl8180_tx_isr(struct net_device *dev, int pri, short error)
3844 return ; 3466 return ;
3845 } 3467 }
3846 3468
3847 nicv = (u32 *)((nic - nicbegin) + (u8*)begin); 3469 nicv = (u32 *)((nic - nicbegin) + (u8 *)begin);
3848 if ((head <= tail && (nicv > tail || nicv < head)) || 3470 if ((head <= tail && (nicv > tail || nicv < head)) ||
3849 (head > tail && (nicv > tail && nicv < head))) { 3471 (head > tail && (nicv > tail && nicv < head))) {
3850 DMESGW("nic has lost pointer"); 3472 DMESGW("nic has lost pointer");
@@ -3932,15 +3554,6 @@ void rtl8180_tx_isr(struct net_device *dev, int pri, short error)
3932 spin_unlock_irqrestore(&priv->tx_lock, flag); 3554 spin_unlock_irqrestore(&priv->tx_lock, flag);
3933} 3555}
3934 3556
3935void rtl8180_tx_irq_wq(struct work_struct *work)
3936{
3937 struct delayed_work *dwork = to_delayed_work(work);
3938 struct ieee80211_device * ieee = (struct ieee80211_device *)
3939 container_of(dwork, struct ieee80211_device, watch_dog_wq);
3940 struct net_device *dev = ieee->dev;
3941
3942 rtl8180_tx_isr(dev, MANAGE_PRIORITY, 0);
3943}
3944irqreturn_t rtl8180_interrupt(int irq, void *netdev, struct pt_regs *regs) 3557irqreturn_t rtl8180_interrupt(int irq, void *netdev, struct pt_regs *regs)
3945{ 3558{
3946 struct net_device *dev = (struct net_device *) netdev; 3559 struct net_device *dev = (struct net_device *) netdev;
@@ -4013,7 +3626,7 @@ irqreturn_t rtl8180_interrupt(int irq, void *netdev, struct pt_regs *regs)
4013 priv->stats.txbkperr++; 3626 priv->stats.txbkperr++;
4014 priv->ieee80211->stats.tx_errors++; 3627 priv->ieee80211->stats.tx_errors++;
4015 rtl8180_tx_isr(dev, BK_PRIORITY, 1); 3628 rtl8180_tx_isr(dev, BK_PRIORITY, 1);
4016 rtl8180_try_wake_queue(dev, BE_PRIORITY); 3629 rtl8180_try_wake_queue(dev, BK_PRIORITY);
4017 } 3630 }
4018 3631
4019 if (inta & ISR_TBEDER) { /* corresponding to BE_PRIORITY */ 3632 if (inta & ISR_TBEDER) { /* corresponding to BE_PRIORITY */
@@ -4067,6 +3680,7 @@ irqreturn_t rtl8180_interrupt(int irq, void *netdev, struct pt_regs *regs)
4067 priv->link_detect.NumTxOkInPeriod++; /* YJ,add,080828 */ 3680 priv->link_detect.NumTxOkInPeriod++; /* YJ,add,080828 */
4068 priv->stats.txnpokint++; 3681 priv->stats.txnpokint++;
4069 rtl8180_tx_isr(dev, NORM_PRIORITY, 0); 3682 rtl8180_tx_isr(dev, NORM_PRIORITY, 0);
3683 rtl8180_try_wake_queue(dev, NORM_PRIORITY);
4070 } 3684 }
4071 3685
4072 if (inta & ISR_TLPDOK) { /* Low priority tx ok */ 3686 if (inta & ISR_TLPDOK) { /* Low priority tx ok */
@@ -4113,10 +3727,7 @@ void GPIOChangeRFWorkItemCallBack(struct work_struct *work)
4113 char *argv[3]; 3727 char *argv[3];
4114 static char *RadioPowerPath = "/etc/acpi/events/RadioPower.sh"; 3728 static char *RadioPowerPath = "/etc/acpi/events/RadioPower.sh";
4115 static char *envp[] = {"HOME=/", "TERM=linux", "PATH=/usr/bin:/bin", NULL}; 3729 static char *envp[] = {"HOME=/", "TERM=linux", "PATH=/usr/bin:/bin", NULL};
4116 static int readf_count = 0; 3730 static int readf_count;
4117
4118 if (readf_count % 10 == 0)
4119 priv->PowerProfile = read_acadapter_file("/proc/acpi/ac_adapter/AC0/state");
4120 3731
4121 readf_count = (readf_count+1)%0xffff; 3732 readf_count = (readf_count+1)%0xffff;
4122 /* We should turn off LED before polling FF51[4]. */ 3733 /* We should turn off LED before polling FF51[4]. */
@@ -4162,10 +3773,5 @@ void GPIOChangeRFWorkItemCallBack(struct work_struct *work)
4162 } 3773 }
4163} 3774}
4164 3775
4165static u8 read_acadapter_file(char *filename)
4166{
4167 return 0;
4168}
4169
4170module_init(rtl8180_pci_module_init); 3776module_init(rtl8180_pci_module_init);
4171module_exit(rtl8180_pci_module_exit); 3777module_exit(rtl8180_pci_module_exit);
diff --git a/drivers/staging/rtl8187se/r8180_dm.h b/drivers/staging/rtl8187se/r8180_dm.h
index b7758254ad76..732c06ac1026 100644
--- a/drivers/staging/rtl8187se/r8180_dm.h
+++ b/drivers/staging/rtl8187se/r8180_dm.h
@@ -13,10 +13,10 @@ bool CheckDig(struct net_device *dev);
13bool CheckHighPower(struct net_device *dev); 13bool CheckHighPower(struct net_device *dev);
14void rtl8180_hw_dig_wq(struct work_struct *work); 14void rtl8180_hw_dig_wq(struct work_struct *work);
15void rtl8180_tx_pw_wq(struct work_struct *work); 15void rtl8180_tx_pw_wq(struct work_struct *work);
16void rtl8180_rate_adapter(struct work_struct * work); 16void rtl8180_rate_adapter(struct work_struct *work);
17void TxPwrTracking87SE(struct net_device *dev); 17void TxPwrTracking87SE(struct net_device *dev);
18bool CheckTxPwrTracking(struct net_device *dev); 18bool CheckTxPwrTracking(struct net_device *dev);
19void rtl8180_rate_adapter(struct work_struct * work); 19void rtl8180_rate_adapter(struct work_struct *work);
20void timer_rate_adaptive(unsigned long data); 20void timer_rate_adaptive(unsigned long data);
21 21
22 22
diff --git a/drivers/staging/rtl8187se/r8180_rtl8225.h b/drivers/staging/rtl8187se/r8180_rtl8225.h
index 494ea8619e72..c6f2128e755c 100644
--- a/drivers/staging/rtl8187se/r8180_rtl8225.h
+++ b/drivers/staging/rtl8187se/r8180_rtl8225.h
@@ -23,8 +23,8 @@ void rtl8225z2_rf_init(struct net_device *dev);
23void rtl8225z2_rf_set_chan(struct net_device *dev, short ch); 23void rtl8225z2_rf_set_chan(struct net_device *dev, short ch);
24void rtl8225z2_rf_close(struct net_device *dev); 24void rtl8225z2_rf_close(struct net_device *dev);
25 25
26void RF_WriteReg(struct net_device *dev, u8 offset, u32 data); 26void RF_WriteReg(struct net_device *dev, u8 offset, u16 data);
27u32 RF_ReadReg(struct net_device *dev, u8 offset); 27u16 RF_ReadReg(struct net_device *dev, u8 offset);
28 28
29void rtl8180_set_mode(struct net_device *dev, int mode); 29void rtl8180_set_mode(struct net_device *dev, int mode);
30void rtl8180_set_mode(struct net_device *dev, int mode); 30void rtl8180_set_mode(struct net_device *dev, int mode);
diff --git a/drivers/staging/rtl8187se/r8180_rtl8225z2.c b/drivers/staging/rtl8187se/r8180_rtl8225z2.c
index d28c1d996084..c592f7936ddb 100644
--- a/drivers/staging/rtl8187se/r8180_rtl8225z2.c
+++ b/drivers/staging/rtl8187se/r8180_rtl8225z2.c
@@ -15,7 +15,6 @@
15 15
16#include "ieee80211/dot11d.h" 16#include "ieee80211/dot11d.h"
17 17
18
19static void write_rtl8225(struct net_device *dev, u8 adr, u16 data) 18static void write_rtl8225(struct net_device *dev, u8 adr, u16 data)
20{ 19{
21 int i; 20 int i;
@@ -76,22 +75,6 @@ static void write_rtl8225(struct net_device *dev, u8 adr, u16 data)
76 rtl8185_rf_pins_enable(dev); 75 rtl8185_rf_pins_enable(dev);
77} 76}
78 77
79static const u16 rtl8225bcd_rxgain[] = {
80 0x0400, 0x0401, 0x0402, 0x0403, 0x0404, 0x0405, 0x0408, 0x0409,
81 0x040a, 0x040b, 0x0502, 0x0503, 0x0504, 0x0505, 0x0540, 0x0541,
82 0x0542, 0x0543, 0x0544, 0x0545, 0x0580, 0x0581, 0x0582, 0x0583,
83 0x0584, 0x0585, 0x0588, 0x0589, 0x058a, 0x058b, 0x0643, 0x0644,
84 0x0645, 0x0680, 0x0681, 0x0682, 0x0683, 0x0684, 0x0685, 0x0688,
85 0x0689, 0x068a, 0x068b, 0x068c, 0x0742, 0x0743, 0x0744, 0x0745,
86 0x0780, 0x0781, 0x0782, 0x0783, 0x0784, 0x0785, 0x0788, 0x0789,
87 0x078a, 0x078b, 0x078c, 0x078d, 0x0790, 0x0791, 0x0792, 0x0793,
88 0x0794, 0x0795, 0x0798, 0x0799, 0x079a, 0x079b, 0x079c, 0x079d,
89 0x07a0, 0x07a1, 0x07a2, 0x07a3, 0x07a4, 0x07a5, 0x07a8, 0x07a9,
90 0x07aa, 0x07ab, 0x07ac, 0x07ad, 0x07b0, 0x07b1, 0x07b2, 0x07b3,
91 0x07b4, 0x07b5, 0x07b8, 0x07b9, 0x07ba, 0x07bb, 0x07bb
92
93};
94
95static const u8 rtl8225_agc[] = { 78static const u8 rtl8225_agc[] = {
96 0x9e, 0x9e, 0x9e, 0x9e, 0x9e, 0x9e, 0x9e, 0x9e, 79 0x9e, 0x9e, 0x9e, 0x9e, 0x9e, 0x9e, 0x9e, 0x9e,
97 0x9d, 0x9c, 0x9b, 0x9a, 0x99, 0x98, 0x97, 0x96, 80 0x9d, 0x9c, 0x9b, 0x9a, 0x99, 0x98, 0x97, 0x96,
@@ -111,122 +94,12 @@ static const u8 rtl8225_agc[] = {
111 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 94 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01,
112}; 95};
113 96
114static const u8 rtl8225_gain[] = {
115 0x23, 0x88, 0x7c, 0xa5, /* -82dBm */
116 0x23, 0x88, 0x7c, 0xb5, /* -82dBm */
117 0x23, 0x88, 0x7c, 0xc5, /* -82dBm */
118 0x33, 0x80, 0x79, 0xc5, /* -78dBm */
119 0x43, 0x78, 0x76, 0xc5, /* -74dBm */
120 0x53, 0x60, 0x73, 0xc5, /* -70dBm */
121 0x63, 0x58, 0x70, 0xc5, /* -66dBm */
122};
123
124static const u8 rtl8225_tx_gain_cck_ofdm[] = {
125 0x02, 0x06, 0x0e, 0x1e, 0x3e, 0x7e
126};
127
128static const u8 rtl8225_tx_power_cck[] = {
129 0x18, 0x17, 0x15, 0x11, 0x0c, 0x08, 0x04, 0x02,
130 0x1b, 0x1a, 0x17, 0x13, 0x0e, 0x09, 0x04, 0x02,
131 0x1f, 0x1e, 0x1a, 0x15, 0x10, 0x0a, 0x05, 0x02,
132 0x22, 0x21, 0x1d, 0x18, 0x11, 0x0b, 0x06, 0x02,
133 0x26, 0x25, 0x21, 0x1b, 0x14, 0x0d, 0x06, 0x03,
134 0x2b, 0x2a, 0x25, 0x1e, 0x16, 0x0e, 0x07, 0x03
135};
136
137static const u8 rtl8225_tx_power_cck_ch14[] = {
138 0x18, 0x17, 0x15, 0x0c, 0x00, 0x00, 0x00, 0x00,
139 0x1b, 0x1a, 0x17, 0x0e, 0x00, 0x00, 0x00, 0x00,
140 0x1f, 0x1e, 0x1a, 0x0f, 0x00, 0x00, 0x00, 0x00,
141 0x22, 0x21, 0x1d, 0x11, 0x00, 0x00, 0x00, 0x00,
142 0x26, 0x25, 0x21, 0x13, 0x00, 0x00, 0x00, 0x00,
143 0x2b, 0x2a, 0x25, 0x15, 0x00, 0x00, 0x00, 0x00
144};
145
146static const u8 rtl8225_tx_power_ofdm[] = {
147 0x80, 0x90, 0xa2, 0xb5, 0xcb, 0xe4
148};
149
150static const u32 rtl8225_chan[] = { 97static const u32 rtl8225_chan[] = {
151 0, 98 0,
152 0x0080, 0x0100, 0x0180, 0x0200, 0x0280, 0x0300, 0x0380, 99 0x0080, 0x0100, 0x0180, 0x0200, 0x0280, 0x0300, 0x0380,
153 0x0400, 0x0480, 0x0500, 0x0580, 0x0600, 0x0680, 0x074A, 100 0x0400, 0x0480, 0x0500, 0x0580, 0x0600, 0x0680, 0x074A,
154}; 101};
155 102
156static void rtl8225_SetTXPowerLevel(struct net_device *dev, short ch)
157{
158 struct r8180_priv *priv = ieee80211_priv(dev);
159 int GainIdx;
160 int GainSetting;
161 int i;
162 u8 power;
163 const u8 *cck_power_table;
164 u8 max_cck_power_level;
165 u8 max_ofdm_power_level;
166 u8 min_ofdm_power_level;
167 u8 cck_power_level = 0xff & priv->chtxpwr[ch];
168 u8 ofdm_power_level = 0xff & priv->chtxpwr_ofdm[ch];
169
170 max_cck_power_level = 35;
171 max_ofdm_power_level = 35;
172 min_ofdm_power_level = 0;
173
174 if (cck_power_level > max_cck_power_level)
175 cck_power_level = max_cck_power_level;
176
177 GainIdx = cck_power_level % 6;
178 GainSetting = cck_power_level / 6;
179
180 if (ch == 14)
181 cck_power_table = rtl8225_tx_power_cck_ch14;
182 else
183 cck_power_table = rtl8225_tx_power_cck;
184
185 write_nic_byte(dev, TX_GAIN_CCK,
186 rtl8225_tx_gain_cck_ofdm[GainSetting] >> 1);
187
188 for (i = 0; i < 8; i++) {
189 power = cck_power_table[GainIdx * 8 + i];
190 write_phy_cck(dev, 0x44 + i, power);
191 }
192
193 /* FIXME Is this delay really needed ? */
194 force_pci_posting(dev);
195 mdelay(1);
196
197 if (ofdm_power_level > (max_ofdm_power_level - min_ofdm_power_level))
198 ofdm_power_level = max_ofdm_power_level;
199 else
200 ofdm_power_level += min_ofdm_power_level;
201
202 if (ofdm_power_level > 35)
203 ofdm_power_level = 35;
204
205 GainIdx = ofdm_power_level % 6;
206 GainSetting = ofdm_power_level / 6;
207
208 rtl8185_set_anaparam2(dev, RTL8225_ANAPARAM2_ON);
209
210 write_phy_ofdm(dev, 2, 0x42);
211 write_phy_ofdm(dev, 6, 0x00);
212 write_phy_ofdm(dev, 8, 0x00);
213
214 write_nic_byte(dev, TX_GAIN_OFDM,
215 rtl8225_tx_gain_cck_ofdm[GainSetting] >> 1);
216
217 power = rtl8225_tx_power_ofdm[GainIdx];
218
219 write_phy_ofdm(dev, 5, power);
220 write_phy_ofdm(dev, 7, power);
221
222 force_pci_posting(dev);
223 mdelay(1);
224}
225
226static const u8 rtl8225z2_threshold[] = {
227 0x8d, 0x8d, 0x8d, 0x8d, 0x9d, 0xad, 0xbd,
228};
229
230static const u8 rtl8225z2_gain_bg[] = { 103static const u8 rtl8225z2_gain_bg[] = {
231 0x23, 0x15, 0xa5, /* -82-1dBm */ 104 0x23, 0x15, 0xa5, /* -82-1dBm */
232 0x23, 0x15, 0xb5, /* -82-2dBm */ 105 0x23, 0x15, 0xb5, /* -82-2dBm */
@@ -259,29 +132,8 @@ static const u16 rtl8225z2_rxgain[] = {
259 0x0794, 0x0795, 0x0798, 0x0799, 0x079a, 0x079b, 0x079c, 0x079d, 132 0x0794, 0x0795, 0x0798, 0x0799, 0x079a, 0x079b, 0x079c, 0x079d,
260 0x07a0, 0x07a1, 0x07a2, 0x07a3, 0x07a4, 0x07a5, 0x07a8, 0x07a9, 133 0x07a0, 0x07a1, 0x07a2, 0x07a3, 0x07a4, 0x07a5, 0x07a8, 0x07a9,
261 0x03aa, 0x03ab, 0x03ac, 0x03ad, 0x03b0, 0x03b1, 0x03b2, 0x03b3, 134 0x03aa, 0x03ab, 0x03ac, 0x03ad, 0x03b0, 0x03b1, 0x03b2, 0x03b3,
262 0x03b4, 0x03b5, 0x03b8, 0x03b9, 0x03ba, 0x03bb, 0x03bb 135 0x03b4, 0x03b5, 0x03b8, 0x03b9, 0x03ba, 0x03bb
263
264};
265 136
266static const u8 ZEBRA2_CCK_OFDM_GAIN_SETTING[] = {
267 0x00, 0x01, 0x02, 0x03, 0x04, 0x05,
268 0x06, 0x07, 0x08, 0x09, 0x0a, 0x0b,
269 0x0c, 0x0d, 0x0e, 0x0f, 0x10, 0x11,
270 0x12, 0x13, 0x14, 0x15, 0x16, 0x17,
271 0x18, 0x19, 0x1a, 0x1b, 0x1c, 0x1d,
272 0x1e, 0x1f, 0x20, 0x21, 0x22, 0x23,
273};
274
275static const u8 rtl8225z2_tx_power_ofdm[] = {
276 0x42, 0x00, 0x40, 0x00, 0x40
277};
278
279static const u8 rtl8225z2_tx_power_cck_ch14[] = {
280 0x36, 0x35, 0x2e, 0x1b, 0x00, 0x00, 0x00, 0x00
281};
282
283static const u8 rtl8225z2_tx_power_cck[] = {
284 0x36, 0x35, 0x2e, 0x25, 0x1c, 0x12, 0x09, 0x04
285}; 137};
286 138
287void rtl8225z2_set_gain(struct net_device *dev, short gain) 139void rtl8225z2_set_gain(struct net_device *dev, short gain)
@@ -412,22 +264,6 @@ static u32 read_rtl8225(struct net_device *dev, u8 adr)
412 return dataRead; 264 return dataRead;
413} 265}
414 266
415short rtl8225_is_V_z2(struct net_device *dev)
416{
417 short vz2 = 1;
418
419 if (read_rtl8225(dev, 8) != 0x588)
420 vz2 = 0;
421 else /* reg 9 pg 1 = 24 */
422 if (read_rtl8225(dev, 9) != 0x700)
423 vz2 = 0;
424
425 /* sw back to pg 0 */
426 write_rtl8225(dev, 0, 0xb7);
427
428 return vz2;
429}
430
431void rtl8225z2_rf_close(struct net_device *dev) 267void rtl8225z2_rf_close(struct net_device *dev)
432{ 268{
433 RF_WriteReg(dev, 0x4, 0x1f); 269 RF_WriteReg(dev, 0x4, 0x1f);
@@ -524,8 +360,7 @@ void rtl8225z2_SetTXPowerLevel(struct net_device *dev, short ch)
524 if (cck_power_level > 35) 360 if (cck_power_level > 35)
525 cck_power_level = 35; 361 cck_power_level = 35;
526 362
527 write_nic_byte(dev, CCK_TXAGC, 363 write_nic_byte(dev, CCK_TXAGC, cck_power_level);
528 (ZEBRA2_CCK_OFDM_GAIN_SETTING[(u8)cck_power_level]));
529 force_pci_posting(dev); 364 force_pci_posting(dev);
530 mdelay(1); 365 mdelay(1);
531 366
@@ -540,8 +375,7 @@ void rtl8225z2_SetTXPowerLevel(struct net_device *dev, short ch)
540 write_phy_ofdm(dev, 8, 0x40); 375 write_phy_ofdm(dev, 8, 0x40);
541 } 376 }
542 377
543 write_nic_byte(dev, OFDM_TXAGC, 378 write_nic_byte(dev, OFDM_TXAGC, ofdm_power_level);
544 ZEBRA2_CCK_OFDM_GAIN_SETTING[(u8)ofdm_power_level]);
545 379
546 if (ofdm_power_level <= 11) { 380 if (ofdm_power_level <= 11) {
547 write_phy_ofdm(dev, 0x07, 0x5c); 381 write_phy_ofdm(dev, 0x07, 0x5c);
@@ -592,50 +426,13 @@ static void rtl8225_host_pci_init(struct net_device *dev)
592 write_nic_word(dev, GP_ENABLE, 0xff & (~(1 << 6))); 426 write_nic_word(dev, GP_ENABLE, 0xff & (~(1 << 6)));
593} 427}
594 428
595static void rtl8225_rf_set_chan(struct net_device *dev, short ch)
596{
597 struct r8180_priv *priv = ieee80211_priv(dev);
598 short gset = (priv->ieee80211->state == IEEE80211_LINKED &&
599 ieee80211_is_54g(&priv->ieee80211->current_network)) ||
600 priv->ieee80211->iw_mode == IW_MODE_MONITOR;
601
602 rtl8225_SetTXPowerLevel(dev, ch);
603
604 write_rtl8225(dev, 0x7, rtl8225_chan[ch]);
605
606 force_pci_posting(dev);
607 mdelay(10);
608
609 if (gset) {
610 write_nic_byte(dev, SIFS, 0x22);
611 write_nic_byte(dev, DIFS, 0x14);
612 } else {
613 write_nic_byte(dev, SIFS, 0x44);
614 write_nic_byte(dev, DIFS, 0x24);
615 }
616
617 if (priv->ieee80211->state == IEEE80211_LINKED &&
618 ieee80211_is_shortslot(&priv->ieee80211->current_network))
619 write_nic_byte(dev, SLOT, 0x9);
620 else
621 write_nic_byte(dev, SLOT, 0x14);
622
623 if (gset) {
624 write_nic_byte(dev, EIFS, 81);
625 write_nic_byte(dev, CW_VAL, 0x73);
626 } else {
627 write_nic_byte(dev, EIFS, 81);
628 write_nic_byte(dev, CW_VAL, 0xa5);
629 }
630}
631
632void rtl8225z2_rf_init(struct net_device *dev) 429void rtl8225z2_rf_init(struct net_device *dev)
633{ 430{
634 struct r8180_priv *priv = ieee80211_priv(dev); 431 struct r8180_priv *priv = ieee80211_priv(dev);
635 int i; 432 int i;
636 short channel = 1; 433 short channel = 1;
637 u16 brsr; 434 u16 brsr;
638 u32 data, addr; 435 u32 data;
639 436
640 priv->chan = channel; 437 priv->chan = channel;
641 438
@@ -676,8 +473,8 @@ void rtl8225z2_rf_init(struct net_device *dev)
676 473
677 write_rtl8225(dev, 0x0, 0x1b7); 474 write_rtl8225(dev, 0x0, 0x1b7);
678 475
679 for (i = 0; i < 95; i++) { 476 for (i = 0; i < ARRAY_SIZE(rtl8225z2_rxgain); i++) {
680 write_rtl8225(dev, 0x1, (u8)(i + 1)); 477 write_rtl8225(dev, 0x1, i + 1);
681 write_rtl8225(dev, 0x2, rtl8225z2_rxgain[i]); 478 write_rtl8225(dev, 0x2, rtl8225z2_rxgain[i]);
682 } 479 }
683 480
@@ -707,14 +504,12 @@ void rtl8225z2_rf_init(struct net_device *dev)
707 504
708 write_rtl8225(dev, 0x0, 0x2bf); 505 write_rtl8225(dev, 0x0, 0x2bf);
709 506
710 for (i = 0; i < 128; i++) { 507 for (i = 0; i < ARRAY_SIZE(rtl8225_agc); i++) {
711 data = rtl8225_agc[i]; 508 write_phy_ofdm(dev, 0xb, rtl8225_agc[i]);
712
713 addr = i + 0x80; /* enable writing AGC table */
714 write_phy_ofdm(dev, 0xb, data);
715 mdelay(1); 509 mdelay(1);
716 510
717 write_phy_ofdm(dev, 0xa, addr); 511 /* enable writing AGC table */
512 write_phy_ofdm(dev, 0xa, i + 0x80);
718 mdelay(1); 513 mdelay(1);
719 } 514 }
720 515
@@ -808,7 +603,7 @@ void rtl8225z2_rf_init(struct net_device *dev)
808 write_nic_dword(dev, 0x94, 0x15c00002); 603 write_nic_dword(dev, 0x94, 0x15c00002);
809 rtl8185_rf_pins_enable(dev); 604 rtl8185_rf_pins_enable(dev);
810 605
811 rtl8225_rf_set_chan(dev, priv->chan); 606 rtl8225z2_rf_set_chan(dev, priv->chan);
812} 607}
813 608
814void rtl8225z2_rf_set_mode(struct net_device *dev) 609void rtl8225z2_rf_set_mode(struct net_device *dev)
diff --git a/drivers/staging/rtl8187se/r8180_wx.c b/drivers/staging/rtl8187se/r8180_wx.c
index 52f63d75d248..156b75882290 100644
--- a/drivers/staging/rtl8187se/r8180_wx.c
+++ b/drivers/staging/rtl8187se/r8180_wx.c
@@ -59,8 +59,6 @@ int r8180_wx_set_key(struct net_device *dev, struct iw_request_info *info,
59 if (priv->ieee80211->bHwRadioOff) 59 if (priv->ieee80211->bHwRadioOff)
60 return 0; 60 return 0;
61 61
62 if (erq->flags & IW_ENCODE_DISABLED)
63
64 if (erq->length > 0) { 62 if (erq->length > 0) {
65 u32* tkey = (u32*) key; 63 u32* tkey = (u32*) key;
66 priv->key0[0] = tkey[0]; 64 priv->key0[0] = tkey[0];
diff --git a/drivers/staging/rtl8187se/r8185b_init.c b/drivers/staging/rtl8187se/r8185b_init.c
index bf343199bd21..f1db9e401c87 100644
--- a/drivers/staging/rtl8187se/r8185b_init.c
+++ b/drivers/staging/rtl8187se/r8185b_init.c
@@ -207,156 +207,84 @@ void SetOutputEnableOfRfPins(struct net_device *dev)
207 write_nic_word(dev, RFPinsEnable, 0x1bff); 207 write_nic_word(dev, RFPinsEnable, 0x1bff);
208} 208}
209 209
210static int HwHSSIThreeWire(struct net_device *dev, 210static bool HwHSSIThreeWire(struct net_device *dev,
211 u8 *pDataBuf, 211 u8 *pDataBuf,
212 u8 nDataBufBitCnt, 212 bool write)
213 int bSI,
214 int bWrite)
215{ 213{
216 int bResult = 1;
217 u8 TryCnt; 214 u8 TryCnt;
218 u8 u1bTmp; 215 u8 u1bTmp;
219 216
220 do { 217 /* Check if WE and RE are cleared. */
221 /* Check if WE and RE are cleared. */ 218 for (TryCnt = 0; TryCnt < TC_3W_POLL_MAX_TRY_CNT; TryCnt++) {
222 for (TryCnt = 0; TryCnt < TC_3W_POLL_MAX_TRY_CNT; TryCnt++) { 219 u1bTmp = read_nic_byte(dev, SW_3W_CMD1);
223 u1bTmp = read_nic_byte(dev, SW_3W_CMD1); 220 if ((u1bTmp & (SW_3W_CMD1_RE|SW_3W_CMD1_WE)) == 0)
224 if ((u1bTmp & (SW_3W_CMD1_RE|SW_3W_CMD1_WE)) == 0) 221 break;
225 break;
226
227 udelay(10);
228 }
229 if (TryCnt == TC_3W_POLL_MAX_TRY_CNT) {
230 printk(KERN_ERR "rtl8187se: HwThreeWire(): CmdReg:"
231 " %#X RE|WE bits are not clear!!\n", u1bTmp);
232 dump_stack();
233 return 0;
234 }
235
236 /* RTL8187S HSSI Read/Write Function */
237 u1bTmp = read_nic_byte(dev, RF_SW_CONFIG);
238
239 if (bSI)
240 u1bTmp |= RF_SW_CFG_SI; /* reg08[1]=1 Serial Interface(SI) */
241
242 else
243 u1bTmp &= ~RF_SW_CFG_SI; /* reg08[1]=0 Parallel Interface(PI) */
244
245
246 write_nic_byte(dev, RF_SW_CONFIG, u1bTmp);
247
248 if (bSI) {
249 /* jong: HW SI read must set reg84[3]=0. */
250 u1bTmp = read_nic_byte(dev, RFPinsSelect);
251 u1bTmp &= ~BIT3;
252 write_nic_byte(dev, RFPinsSelect, u1bTmp);
253 }
254 /* Fill up data buffer for write operation. */
255
256 if (bWrite) {
257 if (nDataBufBitCnt == 16) {
258 write_nic_word(dev, SW_3W_DB0, *((u16 *)pDataBuf));
259 } else if (nDataBufBitCnt == 64) {
260 /* RTL8187S shouldn't enter this case */
261 write_nic_dword(dev, SW_3W_DB0, *((u32 *)pDataBuf));
262 write_nic_dword(dev, SW_3W_DB1, *((u32 *)(pDataBuf + 4)));
263 } else {
264 int idx;
265 int ByteCnt = nDataBufBitCnt / 8;
266 /* printk("%d\n",nDataBufBitCnt); */
267 if ((nDataBufBitCnt % 8) != 0) {
268 printk(KERN_ERR "rtl8187se: "
269 "HwThreeWire(): nDataBufBitCnt(%d)"
270 " should be multiple of 8!!!\n",
271 nDataBufBitCnt);
272 dump_stack();
273 nDataBufBitCnt += 8;
274 nDataBufBitCnt &= ~7;
275 }
276
277 if (nDataBufBitCnt > 64) {
278 printk(KERN_ERR "rtl8187se: HwThreeWire():"
279 " nDataBufBitCnt(%d) should <= 64!!!\n",
280 nDataBufBitCnt);
281 dump_stack();
282 nDataBufBitCnt = 64;
283 }
284 222
285 for (idx = 0; idx < ByteCnt; idx++) 223 udelay(10);
286 write_nic_byte(dev, (SW_3W_DB0+idx), *(pDataBuf+idx)); 224 }
225 if (TryCnt == TC_3W_POLL_MAX_TRY_CNT) {
226 netdev_err(dev,
227 "HwThreeWire(): CmdReg: %#X RE|WE bits are not clear!!\n",
228 u1bTmp);
229 return false;
230 }
287 231
288 } 232 /* RTL8187S HSSI Read/Write Function */
289 } else { /* read */ 233 u1bTmp = read_nic_byte(dev, RF_SW_CONFIG);
290 if (bSI) { 234 u1bTmp |= RF_SW_CFG_SI; /* reg08[1]=1 Serial Interface(SI) */
291 /* SI - reg274[3:0] : RF register's Address */ 235 write_nic_byte(dev, RF_SW_CONFIG, u1bTmp);
292 write_nic_word(dev, SW_3W_DB0, *((u16 *)pDataBuf));
293 } else {
294 /* PI - reg274[15:12] : RF register's Address */
295 write_nic_word(dev, SW_3W_DB0, (*((u16 *)pDataBuf)) << 12);
296 }
297 }
298 236
299 /* Set up command: WE or RE. */ 237 /* jong: HW SI read must set reg84[3]=0. */
300 if (bWrite) 238 u1bTmp = read_nic_byte(dev, RFPinsSelect);
301 write_nic_byte(dev, SW_3W_CMD1, SW_3W_CMD1_WE); 239 u1bTmp &= ~BIT3;
240 write_nic_byte(dev, RFPinsSelect, u1bTmp);
241 /* Fill up data buffer for write operation. */
302 242
303 else 243 /* SI - reg274[3:0] : RF register's Address */
304 write_nic_byte(dev, SW_3W_CMD1, SW_3W_CMD1_RE); 244 if (write)
245 write_nic_word(dev, SW_3W_DB0, *((u16 *)pDataBuf));
246 else
247 write_nic_word(dev, SW_3W_DB0, *((u16 *)pDataBuf));
305 248
249 /* Set up command: WE or RE. */
250 if (write)
251 write_nic_byte(dev, SW_3W_CMD1, SW_3W_CMD1_WE);
252 else
253 write_nic_byte(dev, SW_3W_CMD1, SW_3W_CMD1_RE);
306 254
307 /* Check if DONE is set. */
308 for (TryCnt = 0; TryCnt < TC_3W_POLL_MAX_TRY_CNT; TryCnt++) {
309 u1bTmp = read_nic_byte(dev, SW_3W_CMD1);
310 if ((u1bTmp & SW_3W_CMD1_DONE) != 0)
311 break;
312 255
313 udelay(10); 256 /* Check if DONE is set. */
314 } 257 for (TryCnt = 0; TryCnt < TC_3W_POLL_MAX_TRY_CNT; TryCnt++) {
258 u1bTmp = read_nic_byte(dev, SW_3W_CMD1);
259 if (u1bTmp & SW_3W_CMD1_DONE)
260 break;
315 261
316 write_nic_byte(dev, SW_3W_CMD1, 0); 262 udelay(10);
263 }
317 264
318 /* Read back data for read operation. */ 265 write_nic_byte(dev, SW_3W_CMD1, 0);
319 if (bWrite == 0) {
320 if (bSI) {
321 /* Serial Interface : reg363_362[11:0] */
322 *((u16 *)pDataBuf) = read_nic_word(dev, SI_DATA_READ) ;
323 } else {
324 /* Parallel Interface : reg361_360[11:0] */
325 *((u16 *)pDataBuf) = read_nic_word(dev, PI_DATA_READ);
326 }
327 266
328 *((u16 *)pDataBuf) &= 0x0FFF; 267 /* Read back data for read operation. */
329 } 268 if (!write) {
330 269 /* Serial Interface : reg363_362[11:0] */
331 } while (0); 270 *((u16 *)pDataBuf) = read_nic_word(dev, SI_DATA_READ);
271 *((u16 *)pDataBuf) &= 0x0FFF;
272 }
332 273
333 return bResult; 274 return true;
334} 275}
335 276
336void RF_WriteReg(struct net_device *dev, u8 offset, u32 data) 277void RF_WriteReg(struct net_device *dev, u8 offset, u16 data)
337{ 278{
338 u32 data2Write; 279 u16 reg = (data << 4) | (offset & 0x0f);
339 u8 len; 280 HwHSSIThreeWire(dev, (u8 *)&reg, true);
340
341 /* Pure HW 3-wire. */
342 data2Write = (data << 4) | (u32)(offset & 0x0f);
343 len = 16;
344
345 HwHSSIThreeWire(dev, (u8 *)(&data2Write), len, 1, 1);
346} 281}
347 282
348u32 RF_ReadReg(struct net_device *dev, u8 offset) 283u16 RF_ReadReg(struct net_device *dev, u8 offset)
349{ 284{
350 u32 data2Write; 285 u16 reg = offset & 0x0f;
351 u8 wlen; 286 HwHSSIThreeWire(dev, (u8 *)&reg, false);
352 u32 dataRead; 287 return reg;
353
354 data2Write = ((u32)(offset & 0x0f));
355 wlen = 16;
356 HwHSSIThreeWire(dev, (u8 *)(&data2Write), wlen, 1, 0);
357 dataRead = data2Write;
358
359 return dataRead;
360} 288}
361 289
362 290
@@ -472,7 +400,8 @@ void ZEBRA_Config_85BASIC_HardCode(struct net_device *dev)
472 struct r8180_priv *priv = (struct r8180_priv *)ieee80211_priv(dev); 400 struct r8180_priv *priv = (struct r8180_priv *)ieee80211_priv(dev);
473 u32 i; 401 u32 i;
474 u32 addr, data; 402 u32 addr, data;
475 u32 u4bRegOffset, u4bRegValue, u4bRF23, u4bRF24; 403 u32 u4bRegOffset, u4bRegValue;
404 u16 u4bRF23, u4bRF24;
476 u8 u1b24E; 405 u8 u1b24E;
477 int d_cut = 0; 406 int d_cut = 0;
478 407
@@ -491,7 +420,7 @@ void ZEBRA_Config_85BASIC_HardCode(struct net_device *dev)
491 420
492 if (u4bRF23 == 0x818 && u4bRF24 == 0x70C) { 421 if (u4bRF23 == 0x818 && u4bRF24 == 0x70C) {
493 d_cut = 1; 422 d_cut = 1;
494 printk(KERN_INFO "rtl8187se: card type changed from C- to D-cut\n"); 423 netdev_info(dev, "card type changed from C- to D-cut\n");
495 } 424 }
496 425
497 /* Page0 : reg0-reg15 */ 426 /* Page0 : reg0-reg15 */
@@ -930,10 +859,7 @@ static void MacConfig_85BASIC(struct net_device *dev)
930 859
931u8 GetSupportedWirelessMode8185(struct net_device *dev) 860u8 GetSupportedWirelessMode8185(struct net_device *dev)
932{ 861{
933 u8 btSupportedWirelessMode = 0; 862 return WIRELESS_MODE_B | WIRELESS_MODE_G;
934
935 btSupportedWirelessMode = (WIRELESS_MODE_B | WIRELESS_MODE_G);
936 return btSupportedWirelessMode;
937} 863}
938 864
939void ActUpdateChannelAccessSetting(struct net_device *dev, 865void ActUpdateChannelAccessSetting(struct net_device *dev,
@@ -1130,13 +1056,13 @@ void ActSetWirelessMode8185(struct net_device *dev, u8 btWirelessMode)
1130 ieee->mode = (WIRELESS_MODE)btWirelessMode; 1056 ieee->mode = (WIRELESS_MODE)btWirelessMode;
1131 1057
1132 /* 3. Change related setting. */ 1058 /* 3. Change related setting. */
1133 if( ieee->mode == WIRELESS_MODE_A ) { 1059 if (ieee->mode == WIRELESS_MODE_A)
1134 DMESG("WIRELESS_MODE_A\n"); 1060 DMESG("WIRELESS_MODE_A\n");
1135 } else if( ieee->mode == WIRELESS_MODE_B ) { 1061 else if (ieee->mode == WIRELESS_MODE_B)
1136 DMESG("WIRELESS_MODE_B\n"); 1062 DMESG("WIRELESS_MODE_B\n");
1137 } else if( ieee->mode == WIRELESS_MODE_G ) { 1063 else if (ieee->mode == WIRELESS_MODE_G)
1138 DMESG("WIRELESS_MODE_G\n"); 1064 DMESG("WIRELESS_MODE_G\n");
1139 } 1065
1140 ActUpdateChannelAccessSetting( dev, ieee->mode, &priv->ChannelAccessSetting); 1066 ActUpdateChannelAccessSetting( dev, ieee->mode, &priv->ChannelAccessSetting);
1141} 1067}
1142 1068
@@ -1148,18 +1074,11 @@ void rtl8185b_irq_enable(struct net_device *dev)
1148 write_nic_dword(dev, IMR, priv->IntrMask); 1074 write_nic_dword(dev, IMR, priv->IntrMask);
1149} 1075}
1150 1076
1151void DrvIFIndicateDisassociation(struct net_device *dev, u16 reason)
1152{
1153 /* nothing is needed after disassociation request. */
1154}
1155
1156void MgntDisconnectIBSS(struct net_device *dev) 1077void MgntDisconnectIBSS(struct net_device *dev)
1157{ 1078{
1158 struct r8180_priv *priv = (struct r8180_priv *)ieee80211_priv(dev); 1079 struct r8180_priv *priv = (struct r8180_priv *)ieee80211_priv(dev);
1159 u8 i; 1080 u8 i;
1160 1081
1161 DrvIFIndicateDisassociation(dev, unspec_reason);
1162
1163 for (i = 0; i < 6 ; i++) 1082 for (i = 0; i < 6 ; i++)
1164 priv->ieee80211->current_network.bssid[i] = 0x55; 1083 priv->ieee80211->current_network.bssid[i] = 0x55;
1165 1084
@@ -1190,8 +1109,6 @@ void MlmeDisassociateRequest(struct net_device *dev, u8 *asSta, u8 asRsn)
1190 1109
1191 if (memcmp(priv->ieee80211->current_network.bssid, asSta, 6) == 0) { 1110 if (memcmp(priv->ieee80211->current_network.bssid, asSta, 6) == 0) {
1192 /* ShuChen TODO: change media status. */ 1111 /* ShuChen TODO: change media status. */
1193 /* ShuChen TODO: What to do when disassociate. */
1194 DrvIFIndicateDisassociation(dev, unspec_reason);
1195 1112
1196 for (i = 0; i < 6; i++) 1113 for (i = 0; i < 6; i++)
1197 priv->ieee80211->current_network.bssid[i] = 0x22; 1114 priv->ieee80211->current_network.bssid[i] = 0x22;
@@ -1267,14 +1184,6 @@ bool SetRFPowerState(struct net_device *dev, RT_RF_POWER_STATE eRFPowerState)
1267 return bResult; 1184 return bResult;
1268} 1185}
1269 1186
1270void HalEnableRx8185Dummy(struct net_device *dev)
1271{
1272}
1273
1274void HalDisableRx8185Dummy(struct net_device *dev)
1275{
1276}
1277
1278bool MgntActSet_RF_State(struct net_device *dev, RT_RF_POWER_STATE StateToSet, u32 ChangeSource) 1187bool MgntActSet_RF_State(struct net_device *dev, RT_RF_POWER_STATE StateToSet, u32 ChangeSource)
1279{ 1188{
1280 struct r8180_priv *priv = (struct r8180_priv *)ieee80211_priv(dev); 1189 struct r8180_priv *priv = (struct r8180_priv *)ieee80211_priv(dev);
@@ -1323,11 +1232,9 @@ bool MgntActSet_RF_State(struct net_device *dev, RT_RF_POWER_STATE StateToSet, u
1323 priv->RfOffReason = 0; 1232 priv->RfOffReason = 0;
1324 bActionAllowed = true; 1233 bActionAllowed = true;
1325 1234
1326 if (rtState == eRfOff && ChangeSource >= RF_CHANGE_BY_HW && !priv->bInHctTest) 1235 if (rtState == eRfOff && ChangeSource >= RF_CHANGE_BY_HW)
1327 bConnectBySSID = true; 1236 bConnectBySSID = true;
1328 1237 }
1329 } else
1330 ;
1331 break; 1238 break;
1332 1239
1333 case eRfOff: 1240 case eRfOff:
@@ -1359,18 +1266,6 @@ bool MgntActSet_RF_State(struct net_device *dev, RT_RF_POWER_STATE StateToSet, u
1359 if (bActionAllowed) { 1266 if (bActionAllowed) {
1360 /* Config HW to the specified mode. */ 1267 /* Config HW to the specified mode. */
1361 SetRFPowerState(dev, StateToSet); 1268 SetRFPowerState(dev, StateToSet);
1362
1363 /* Turn on RF. */
1364 if (StateToSet == eRfOn) {
1365 HalEnableRx8185Dummy(dev);
1366 if (bConnectBySSID) {
1367 /* by amy not supported */
1368 }
1369 }
1370 /* Turn off RF. */
1371 else if (StateToSet == eRfOff)
1372 HalDisableRx8185Dummy(dev);
1373
1374 } 1269 }
1375 1270
1376 /* Release RF spinlock */ 1271 /* Release RF spinlock */
diff --git a/drivers/staging/rtl8192e/rtl8192e/rtl_core.c b/drivers/staging/rtl8192e/rtl8192e/rtl_core.c
index 81134d312ee3..1a70f324552f 100644
--- a/drivers/staging/rtl8192e/rtl8192e/rtl_core.c
+++ b/drivers/staging/rtl8192e/rtl8192e/rtl_core.c
@@ -82,7 +82,7 @@ static struct rtl819x_ops rtl819xp_ops = {
82 .RxCheckStuckHandler = rtl8192_HalRxCheckStuck, 82 .RxCheckStuckHandler = rtl8192_HalRxCheckStuck,
83}; 83};
84 84
85static struct pci_device_id rtl8192_pci_id_tbl[] __devinitdata = { 85static struct pci_device_id rtl8192_pci_id_tbl[] = {
86 {RTL_PCI_DEVICE(0x10ec, 0x8192, rtl819xp_ops)}, 86 {RTL_PCI_DEVICE(0x10ec, 0x8192, rtl819xp_ops)},
87 {RTL_PCI_DEVICE(0x07aa, 0x0044, rtl819xp_ops)}, 87 {RTL_PCI_DEVICE(0x07aa, 0x0044, rtl819xp_ops)},
88 {RTL_PCI_DEVICE(0x07aa, 0x0047, rtl819xp_ops)}, 88 {RTL_PCI_DEVICE(0x07aa, 0x0047, rtl819xp_ops)},
@@ -91,15 +91,15 @@ static struct pci_device_id rtl8192_pci_id_tbl[] __devinitdata = {
91 91
92MODULE_DEVICE_TABLE(pci, rtl8192_pci_id_tbl); 92MODULE_DEVICE_TABLE(pci, rtl8192_pci_id_tbl);
93 93
94static int __devinit rtl8192_pci_probe(struct pci_dev *pdev, 94static int rtl8192_pci_probe(struct pci_dev *pdev,
95 const struct pci_device_id *id); 95 const struct pci_device_id *id);
96static void __devexit rtl8192_pci_disconnect(struct pci_dev *pdev); 96static void rtl8192_pci_disconnect(struct pci_dev *pdev);
97 97
98static struct pci_driver rtl8192_pci_driver = { 98static struct pci_driver rtl8192_pci_driver = {
99 .name = DRV_NAME, /* Driver name */ 99 .name = DRV_NAME, /* Driver name */
100 .id_table = rtl8192_pci_id_tbl, /* PCI_ID table */ 100 .id_table = rtl8192_pci_id_tbl, /* PCI_ID table */
101 .probe = rtl8192_pci_probe, /* probe fn */ 101 .probe = rtl8192_pci_probe, /* probe fn */
102 .remove = __devexit_p(rtl8192_pci_disconnect), /* remove fn */ 102 .remove = rtl8192_pci_disconnect, /* remove fn */
103 .suspend = rtl8192E_suspend, /* PM suspend fn */ 103 .suspend = rtl8192E_suspend, /* PM suspend fn */
104 .resume = rtl8192E_resume, /* PM resume fn */ 104 .resume = rtl8192E_resume, /* PM resume fn */
105}; 105};
@@ -2846,7 +2846,7 @@ static const struct net_device_ops rtl8192_netdev_ops = {
2846 .ndo_start_xmit = rtllib_xmit, 2846 .ndo_start_xmit = rtllib_xmit,
2847}; 2847};
2848 2848
2849static int __devinit rtl8192_pci_probe(struct pci_dev *pdev, 2849static int rtl8192_pci_probe(struct pci_dev *pdev,
2850 const struct pci_device_id *id) 2850 const struct pci_device_id *id)
2851{ 2851{
2852 unsigned long ioaddr = 0; 2852 unsigned long ioaddr = 0;
@@ -2955,7 +2955,8 @@ static int __devinit rtl8192_pci_probe(struct pci_dev *pdev,
2955 netif_carrier_off(dev); 2955 netif_carrier_off(dev);
2956 netif_stop_queue(dev); 2956 netif_stop_queue(dev);
2957 2957
2958 register_netdev(dev); 2958 if (register_netdev(dev))
2959 goto err_free_irq;
2959 RT_TRACE(COMP_INIT, "dev name: %s\n", dev->name); 2960 RT_TRACE(COMP_INIT, "dev name: %s\n", dev->name);
2960 2961
2961 rtl8192_proc_init_one(dev); 2962 rtl8192_proc_init_one(dev);
@@ -2981,7 +2982,7 @@ err_pci_disable:
2981 return err; 2982 return err;
2982} 2983}
2983 2984
2984static void __devexit rtl8192_pci_disconnect(struct pci_dev *pdev) 2985static void rtl8192_pci_disconnect(struct pci_dev *pdev)
2985{ 2986{
2986 struct net_device *dev = pci_get_drvdata(pdev); 2987 struct net_device *dev = pci_get_drvdata(pdev);
2987 struct r8192_priv *priv ; 2988 struct r8192_priv *priv ;
diff --git a/drivers/staging/rtl8192e/rtllib.h b/drivers/staging/rtl8192e/rtllib.h
index 9ac8d8ea4ae8..3485ef1dfab1 100644
--- a/drivers/staging/rtl8192e/rtllib.h
+++ b/drivers/staging/rtl8192e/rtllib.h
@@ -2567,7 +2567,7 @@ static inline void *rtllib_priv(struct net_device *dev)
2567 return ((struct rtllib_device *)netdev_priv(dev))->priv; 2567 return ((struct rtllib_device *)netdev_priv(dev))->priv;
2568} 2568}
2569 2569
2570extern inline int rtllib_is_empty_essid(const char *essid, int essid_len) 2570static inline int rtllib_is_empty_essid(const char *essid, int essid_len)
2571{ 2571{
2572 /* Single white space is for Linksys APs */ 2572 /* Single white space is for Linksys APs */
2573 if (essid_len == 1 && essid[0] == ' ') 2573 if (essid_len == 1 && essid[0] == ' ')
@@ -2583,7 +2583,7 @@ extern inline int rtllib_is_empty_essid(const char *essid, int essid_len)
2583 return 1; 2583 return 1;
2584} 2584}
2585 2585
2586extern inline int rtllib_is_valid_mode(struct rtllib_device *ieee, int mode) 2586static inline int rtllib_is_valid_mode(struct rtllib_device *ieee, int mode)
2587{ 2587{
2588 /* 2588 /*
2589 * It is possible for both access points and our device to support 2589 * It is possible for both access points and our device to support
@@ -2609,7 +2609,7 @@ extern inline int rtllib_is_valid_mode(struct rtllib_device *ieee, int mode)
2609 return 0; 2609 return 0;
2610} 2610}
2611 2611
2612extern inline int rtllib_get_hdrlen(u16 fc) 2612static inline int rtllib_get_hdrlen(u16 fc)
2613{ 2613{
2614 int hdrlen = RTLLIB_3ADDR_LEN; 2614 int hdrlen = RTLLIB_3ADDR_LEN;
2615 2615
diff --git a/drivers/staging/rtl8192e/rtllib_tx.c b/drivers/staging/rtl8192e/rtllib_tx.c
index 42900ee4825b..759d7c7d78e5 100644
--- a/drivers/staging/rtl8192e/rtllib_tx.c
+++ b/drivers/staging/rtl8192e/rtllib_tx.c
@@ -287,7 +287,7 @@ static void rtllib_tx_query_agg_cap(struct rtllib_device *ieee,
287{ 287{
288 struct rt_hi_throughput *pHTInfo = ieee->pHTInfo; 288 struct rt_hi_throughput *pHTInfo = ieee->pHTInfo;
289 struct tx_ts_record *pTxTs = NULL; 289 struct tx_ts_record *pTxTs = NULL;
290 struct rtllib_hdr_1addr* hdr = (struct rtllib_hdr_1addr *)skb->data; 290 struct rtllib_hdr_1addr *hdr = (struct rtllib_hdr_1addr *)skb->data;
291 291
292 if (rtllib_act_scanning(ieee, false)) 292 if (rtllib_act_scanning(ieee, false))
293 return; 293 return;
diff --git a/drivers/staging/rtl8192u/ieee80211/ieee80211.h b/drivers/staging/rtl8192u/ieee80211/ieee80211.h
index 13f45c3125ce..502bfdbcc84b 100644
--- a/drivers/staging/rtl8192u/ieee80211/ieee80211.h
+++ b/drivers/staging/rtl8192u/ieee80211/ieee80211.h
@@ -235,7 +235,10 @@ enum _ReasonCode{
235 235
236 236
237 237
238#define aSifsTime ((priv->ieee80211->current_network.mode == IEEE_A)||(priv->ieee80211->current_network.mode == IEEE_N_24G)||(priv->ieee80211->current_network.mode == IEEE_N_5G))? 16 : 10 238#define aSifsTime ((priv->ieee80211->current_network.mode == IEEE_A || \
239 priv->ieee80211->current_network.mode == IEEE_N_24G || \
240 priv->ieee80211->current_network.mode == IEEE_N_5G) ? \
241 16 : 10)
239 242
240#define MGMT_QUEUE_NUM 5 243#define MGMT_QUEUE_NUM 5
241 244
diff --git a/drivers/staging/rtl8192u/r8192U_core.c b/drivers/staging/rtl8192u/r8192U_core.c
index 5a2fab9fa772..56367f23112f 100644
--- a/drivers/staging/rtl8192u/r8192U_core.c
+++ b/drivers/staging/rtl8192u/r8192U_core.c
@@ -144,9 +144,9 @@ MODULE_PARM_DESC(ifname," Net interface name, wlan%d=default");
144MODULE_PARM_DESC(hwwep," Try to use hardware security support. "); 144MODULE_PARM_DESC(hwwep," Try to use hardware security support. ");
145MODULE_PARM_DESC(channels," Channel bitmask for specific locales. NYI"); 145MODULE_PARM_DESC(channels," Channel bitmask for specific locales. NYI");
146 146
147static int __devinit rtl8192_usb_probe(struct usb_interface *intf, 147static int rtl8192_usb_probe(struct usb_interface *intf,
148 const struct usb_device_id *id); 148 const struct usb_device_id *id);
149static void __devexit rtl8192_usb_disconnect(struct usb_interface *intf); 149static void rtl8192_usb_disconnect(struct usb_interface *intf);
150 150
151 151
152static struct usb_driver rtl8192_usb_driver = { 152static struct usb_driver rtl8192_usb_driver = {
@@ -5739,7 +5739,7 @@ static const struct net_device_ops rtl8192_netdev_ops = {
5739 ---------------------------- USB_STUFF--------------------------- 5739 ---------------------------- USB_STUFF---------------------------
5740*****************************************************************************/ 5740*****************************************************************************/
5741 5741
5742static int __devinit rtl8192_usb_probe(struct usb_interface *intf, 5742static int rtl8192_usb_probe(struct usb_interface *intf,
5743 const struct usb_device_id *id) 5743 const struct usb_device_id *id)
5744{ 5744{
5745// unsigned long ioaddr = 0; 5745// unsigned long ioaddr = 0;
@@ -5826,7 +5826,7 @@ void rtl8192_cancel_deferred_work(struct r8192_priv* priv)
5826} 5826}
5827 5827
5828 5828
5829static void __devexit rtl8192_usb_disconnect(struct usb_interface *intf) 5829static void rtl8192_usb_disconnect(struct usb_interface *intf)
5830{ 5830{
5831 struct net_device *dev = usb_get_intfdata(intf); 5831 struct net_device *dev = usb_get_intfdata(intf);
5832 5832
diff --git a/drivers/staging/rtl8712/mlme_linux.c b/drivers/staging/rtl8712/mlme_linux.c
index abf96c14df93..7279854c86aa 100644
--- a/drivers/staging/rtl8712/mlme_linux.c
+++ b/drivers/staging/rtl8712/mlme_linux.c
@@ -156,7 +156,7 @@ void r8712_report_sec_ie(struct _adapter *adapter, u8 authmode, u8 *sec_ie)
156 p = buff; 156 p = buff;
157 p += sprintf(p, "ASSOCINFO(ReqIEs="); 157 p += sprintf(p, "ASSOCINFO(ReqIEs=");
158 len = sec_ie[1] + 2; 158 len = sec_ie[1] + 2;
159 len = (len < IW_CUSTOM_MAX) ? len : IW_CUSTOM_MAX; 159 len = (len < IW_CUSTOM_MAX) ? len : IW_CUSTOM_MAX - 1;
160 for (i = 0; i < len; i++) 160 for (i = 0; i < len; i++)
161 p += sprintf(p, "%02x", sec_ie[i]); 161 p += sprintf(p, "%02x", sec_ie[i]);
162 p += sprintf(p, ")"); 162 p += sprintf(p, ")");
diff --git a/drivers/staging/rtl8712/rtl871x_cmd.c b/drivers/staging/rtl8712/rtl871x_cmd.c
index 659683e022b9..31f31dbf7f31 100644
--- a/drivers/staging/rtl8712/rtl871x_cmd.c
+++ b/drivers/staging/rtl8712/rtl871x_cmd.c
@@ -814,7 +814,7 @@ u8 r8712_setassocsta_cmd(struct _adapter *padapter, u8 *mac_addr)
814 struct cmd_priv *pcmdpriv = &padapter->cmdpriv; 814 struct cmd_priv *pcmdpriv = &padapter->cmdpriv;
815 struct cmd_obj *ph2c; 815 struct cmd_obj *ph2c;
816 struct set_assocsta_parm *psetassocsta_para; 816 struct set_assocsta_parm *psetassocsta_para;
817 struct set_stakey_rsp *psetassocsta_rsp = NULL; 817 struct set_assocsta_rsp *psetassocsta_rsp = NULL;
818 818
819 ph2c = (struct cmd_obj *)_malloc(sizeof(struct cmd_obj)); 819 ph2c = (struct cmd_obj *)_malloc(sizeof(struct cmd_obj));
820 if (ph2c == NULL) 820 if (ph2c == NULL)
@@ -825,7 +825,7 @@ u8 r8712_setassocsta_cmd(struct _adapter *padapter, u8 *mac_addr)
825 kfree((u8 *) ph2c); 825 kfree((u8 *) ph2c);
826 return _FAIL; 826 return _FAIL;
827 } 827 }
828 psetassocsta_rsp = (struct set_stakey_rsp *)_malloc( 828 psetassocsta_rsp = (struct set_assocsta_rsp *)_malloc(
829 sizeof(struct set_assocsta_rsp)); 829 sizeof(struct set_assocsta_rsp));
830 if (psetassocsta_rsp == NULL) { 830 if (psetassocsta_rsp == NULL) {
831 kfree((u8 *)ph2c); 831 kfree((u8 *)ph2c);
diff --git a/drivers/staging/rtl8712/rtl871x_ioctl_linux.c b/drivers/staging/rtl8712/rtl871x_ioctl_linux.c
index c9a6a7fbb89c..3a6479064519 100644
--- a/drivers/staging/rtl8712/rtl871x_ioctl_linux.c
+++ b/drivers/staging/rtl8712/rtl871x_ioctl_linux.c
@@ -2110,10 +2110,10 @@ static int r871x_wps_start(struct net_device *dev,
2110 struct iw_point *pdata = &wrqu->data; 2110 struct iw_point *pdata = &wrqu->data;
2111 u32 u32wps_start = 0; 2111 u32 u32wps_start = 0;
2112 2112
2113 if (copy_from_user((void *)&u32wps_start, pdata->pointer, 4))
2114 return -EFAULT;
2115 if ((padapter->bDriverStopped) || (pdata == NULL)) 2113 if ((padapter->bDriverStopped) || (pdata == NULL))
2116 return -EINVAL; 2114 return -EINVAL;
2115 if (copy_from_user((void *)&u32wps_start, pdata->pointer, 4))
2116 return -EFAULT;
2117 if (u32wps_start == 0) 2117 if (u32wps_start == 0)
2118 u32wps_start = *extra; 2118 u32wps_start = *extra;
2119 if (u32wps_start == 1) /* WPS Start */ 2119 if (u32wps_start == 1) /* WPS Start */
diff --git a/drivers/staging/rts5139/Makefile b/drivers/staging/rts5139/Makefile
index 82b8958e8d31..75dd31224e62 100644
--- a/drivers/staging/rts5139/Makefile
+++ b/drivers/staging/rts5139/Makefile
@@ -25,13 +25,19 @@
25# Makefile for the RTS51xx USB Card Reader drivers. 25# Makefile for the RTS51xx USB Card Reader drivers.
26# 26#
27 27
28TARGET_MODULE := rts5139 28obj-$(CONFIG_RTS5139) := rts5139.o
29 29
30EXTRA_CFLAGS := -Idrivers/scsi -I$(PWD) 30ccflags-y := -Idrivers/scsi
31 31
32obj-m += $(TARGET_MODULE).o 32rts5139-y := \
33 33 rts51x_transport.o \
34common-obj := rts51x_transport.o rts51x_scsi.o rts51x_fop.o 34 rts51x_scsi.o \
35 35 rts51x_fop.o \
36$(TARGET_MODULE)-objs := $(common-obj) rts51x.o rts51x_chip.o rts51x_card.o \ 36 rts51x.o \
37 xd.o sd.o ms.o sd_cprm.o ms_mg.o 37 rts51x_chip.o \
38 rts51x_card.o \
39 xd.o \
40 sd.o \
41 ms.o \
42 sd_cprm.o \
43 ms_mg.o
diff --git a/drivers/staging/rts5139/ms.c b/drivers/staging/rts5139/ms.c
index 6eef33b03f55..a27f7e224e03 100644
--- a/drivers/staging/rts5139/ms.c
+++ b/drivers/staging/rts5139/ms.c
@@ -160,7 +160,7 @@ int ms_transfer_data(struct rts51x_chip *chip, u8 trans_mode, u8 tpc,
160 rts51x_add_cmd(chip, WRITE_REG_CMD, MS_CFG, MS_2K_SECTOR_MODE, 160 rts51x_add_cmd(chip, WRITE_REG_CMD, MS_CFG, MS_2K_SECTOR_MODE,
161 0); 161 0);
162 162
163 trans_dma_enable(dir, chip, sec_cnt * 512, DMA_512); 163 rts51x_trans_dma_enable(dir, chip, sec_cnt * 512, DMA_512);
164 164
165 rts51x_add_cmd(chip, WRITE_REG_CMD, MS_TRANSFER, 0xFF, 165 rts51x_add_cmd(chip, WRITE_REG_CMD, MS_TRANSFER, 0xFF,
166 MS_TRANSFER_START | trans_mode); 166 MS_TRANSFER_START | trans_mode);
@@ -602,7 +602,7 @@ static int ms_prepare_reset(struct rts51x_chip *chip)
602 if (!chip->option.FT2_fast_mode) { 602 if (!chip->option.FT2_fast_mode) {
603 wait_timeout(250); 603 wait_timeout(250);
604 604
605 card_power_on(chip, MS_CARD); 605 rts51x_card_power_on(chip, MS_CARD);
606 wait_timeout(150); 606 wait_timeout(150);
607 607
608#ifdef SUPPORT_OCP 608#ifdef SUPPORT_OCP
@@ -872,7 +872,7 @@ static int msxc_change_power(struct rts51x_chip *chip, u8 mode)
872 int retval; 872 int retval;
873 u8 buf[6]; 873 u8 buf[6];
874 874
875 ms_cleanup_work(chip); 875 rts51x_ms_cleanup_work(chip);
876 876
877 /* Set Parameter Register */ 877 /* Set Parameter Register */
878 retval = ms_set_rw_reg_addr(chip, 0, 0, Pro_DataCount1, 6); 878 retval = ms_set_rw_reg_addr(chip, 0, 0, Pro_DataCount1, 6);
@@ -2600,14 +2600,14 @@ BUILD_FAIL:
2600 return STATUS_FAIL; 2600 return STATUS_FAIL;
2601} 2601}
2602 2602
2603int reset_ms_card(struct rts51x_chip *chip) 2603int rts51x_reset_ms_card(struct rts51x_chip *chip)
2604{ 2604{
2605 struct ms_info *ms_card = &(chip->ms_card); 2605 struct ms_info *ms_card = &(chip->ms_card);
2606 int retval; 2606 int retval;
2607 2607
2608 memset(ms_card, 0, sizeof(struct ms_info)); 2608 memset(ms_card, 0, sizeof(struct ms_info));
2609 2609
2610 enable_card_clock(chip, MS_CARD); 2610 rts51x_enable_card_clock(chip, MS_CARD);
2611 2611
2612 retval = rts51x_select_card(chip, MS_CARD); 2612 retval = rts51x_select_card(chip, MS_CARD);
2613 if (retval != STATUS_SUCCESS) 2613 if (retval != STATUS_SUCCESS)
@@ -2936,7 +2936,7 @@ static int mspro_read_format_progress(struct rts51x_chip *chip,
2936 return STATUS_SUCCESS; 2936 return STATUS_SUCCESS;
2937} 2937}
2938 2938
2939void mspro_polling_format_status(struct rts51x_chip *chip) 2939void rts51x_mspro_polling_format_status(struct rts51x_chip *chip)
2940{ 2940{
2941 struct ms_info *ms_card = &(chip->ms_card); 2941 struct ms_info *ms_card = &(chip->ms_card);
2942 int i; 2942 int i;
@@ -2952,25 +2952,25 @@ void mspro_polling_format_status(struct rts51x_chip *chip)
2952 return; 2952 return;
2953} 2953}
2954 2954
2955void mspro_format_sense(struct rts51x_chip *chip, unsigned int lun) 2955void rts51x_mspro_format_sense(struct rts51x_chip *chip, unsigned int lun)
2956{ 2956{
2957 struct ms_info *ms_card = &(chip->ms_card); 2957 struct ms_info *ms_card = &(chip->ms_card);
2958 2958
2959 if (CHK_FORMAT_STATUS(ms_card, FORMAT_SUCCESS)) { 2959 if (CHK_FORMAT_STATUS(ms_card, FORMAT_SUCCESS)) {
2960 set_sense_type(chip, lun, SENSE_TYPE_NO_SENSE); 2960 rts51x_set_sense_type(chip, lun, SENSE_TYPE_NO_SENSE);
2961 ms_card->pro_under_formatting = 0; 2961 ms_card->pro_under_formatting = 0;
2962 ms_card->progress = 0; 2962 ms_card->progress = 0;
2963 } else if (CHK_FORMAT_STATUS(ms_card, FORMAT_IN_PROGRESS)) { 2963 } else if (CHK_FORMAT_STATUS(ms_card, FORMAT_IN_PROGRESS)) {
2964 set_sense_data(chip, lun, CUR_ERR, 0x02, 0, 0x04, 0x04, 2964 rts51x_set_sense_data(chip, lun, CUR_ERR, 0x02, 0, 0x04, 0x04,
2965 0, (u16) (ms_card->progress)); 2965 0, (u16) (ms_card->progress));
2966 } else { 2966 } else {
2967 set_sense_type(chip, lun, SENSE_TYPE_FORMAT_CMD_FAILED); 2967 rts51x_set_sense_type(chip, lun, SENSE_TYPE_FORMAT_CMD_FAILED);
2968 ms_card->pro_under_formatting = 0; 2968 ms_card->pro_under_formatting = 0;
2969 ms_card->progress = 0; 2969 ms_card->progress = 0;
2970 } 2970 }
2971} 2971}
2972 2972
2973int mspro_format(struct scsi_cmnd *srb, struct rts51x_chip *chip, 2973int rts51x_mspro_format(struct scsi_cmnd *srb, struct rts51x_chip *chip,
2974 int short_data_len, int quick_format) 2974 int short_data_len, int quick_format)
2975{ 2975{
2976 struct ms_info *ms_card = &(chip->ms_card); 2976 struct ms_info *ms_card = &(chip->ms_card);
@@ -3035,7 +3035,7 @@ int mspro_format(struct scsi_cmnd *srb, struct rts51x_chip *chip,
3035 ms_card->pro_under_formatting = 0; 3035 ms_card->pro_under_formatting = 0;
3036 ms_card->progress = 0; 3036 ms_card->progress = 0;
3037 ms_card->format_status = FORMAT_SUCCESS; 3037 ms_card->format_status = FORMAT_SUCCESS;
3038 set_sense_type(chip, SCSI_LUN(srb), SENSE_TYPE_NO_SENSE); 3038 rts51x_set_sense_type(chip, SCSI_LUN(srb), SENSE_TYPE_NO_SENSE);
3039 return STATUS_SUCCESS; 3039 return STATUS_SUCCESS;
3040 } 3040 }
3041 3041
@@ -3103,7 +3103,7 @@ static int ms_read_multiple_pages(struct rts51x_chip *chip, u16 phy_blk,
3103 rts51x_add_cmd(chip, WRITE_REG_CMD, MS_SECTOR_CNT_H, 0xFF, 0); 3103 rts51x_add_cmd(chip, WRITE_REG_CMD, MS_SECTOR_CNT_H, 0xFF, 0);
3104 rts51x_add_cmd(chip, WRITE_REG_CMD, MS_TPC, 0xFF, READ_PAGE_DATA); 3104 rts51x_add_cmd(chip, WRITE_REG_CMD, MS_TPC, 0xFF, READ_PAGE_DATA);
3105 3105
3106 trans_dma_enable(DMA_FROM_DEVICE, chip, 512 * page_cnt, DMA_512); 3106 rts51x_trans_dma_enable(DMA_FROM_DEVICE, chip, 512 * page_cnt, DMA_512);
3107 3107
3108 rts51x_add_cmd(chip, WRITE_REG_CMD, MS_TRANSFER, 0xFF, 3108 rts51x_add_cmd(chip, WRITE_REG_CMD, MS_TRANSFER, 0xFF,
3109 MS_TRANSFER_START | MS_TM_MULTI_READ); 3109 MS_TRANSFER_START | MS_TM_MULTI_READ);
@@ -3307,7 +3307,7 @@ static int ms_write_multiple_pages(struct rts51x_chip *chip, u16 old_blk,
3307 rts51x_add_cmd(chip, WRITE_REG_CMD, CARD_DATA_SOURCE, 0x01, 3307 rts51x_add_cmd(chip, WRITE_REG_CMD, CARD_DATA_SOURCE, 0x01,
3308 RING_BUFFER); 3308 RING_BUFFER);
3309 3309
3310 trans_dma_enable(DMA_TO_DEVICE, chip, 512 * page_cnt, DMA_512); 3310 rts51x_trans_dma_enable(DMA_TO_DEVICE, chip, 512 * page_cnt, DMA_512);
3311 3311
3312 rts51x_add_cmd(chip, WRITE_REG_CMD, MS_TRANSFER, 0xFF, 3312 rts51x_add_cmd(chip, WRITE_REG_CMD, MS_TRANSFER, 0xFF,
3313 MS_TRANSFER_START | MS_TM_MULTI_WRITE); 3313 MS_TRANSFER_START | MS_TM_MULTI_WRITE);
@@ -3467,7 +3467,7 @@ static int ms_read_multiple_pages(struct rts51x_chip *chip, u16 phy_blk,
3467 rts51x_add_cmd(chip, WRITE_REG_CMD, MS_TRANS_CFG, 0xFF, 3467 rts51x_add_cmd(chip, WRITE_REG_CMD, MS_TRANS_CFG, 0xFF,
3468 trans_cfg); 3468 trans_cfg);
3469 3469
3470 trans_dma_enable(DMA_FROM_DEVICE, chip, 512, DMA_512); 3470 rts51x_trans_dma_enable(DMA_FROM_DEVICE, chip, 512, DMA_512);
3471 3471
3472 rts51x_add_cmd(chip, WRITE_REG_CMD, MS_TRANSFER, 0xFF, 3472 rts51x_add_cmd(chip, WRITE_REG_CMD, MS_TRANSFER, 0xFF,
3473 MS_TRANSFER_START | MS_TM_NORMAL_READ); 3473 MS_TRANSFER_START | MS_TM_NORMAL_READ);
@@ -3670,7 +3670,7 @@ static int ms_write_multiple_pages(struct rts51x_chip *chip, u16 old_blk,
3670 rts51x_add_cmd(chip, WRITE_REG_CMD, MS_TRANS_CFG, 0xFF, 3670 rts51x_add_cmd(chip, WRITE_REG_CMD, MS_TRANS_CFG, 0xFF,
3671 WAIT_INT); 3671 WAIT_INT);
3672 3672
3673 trans_dma_enable(DMA_TO_DEVICE, chip, 512, DMA_512); 3673 rts51x_trans_dma_enable(DMA_TO_DEVICE, chip, 512, DMA_512);
3674 3674
3675 rts51x_add_cmd(chip, WRITE_REG_CMD, MS_TRANSFER, 0xFF, 3675 rts51x_add_cmd(chip, WRITE_REG_CMD, MS_TRANSFER, 0xFF,
3676 MS_TRANSFER_START | MS_TM_NORMAL_WRITE); 3676 MS_TRANSFER_START | MS_TM_NORMAL_WRITE);
@@ -3803,10 +3803,10 @@ static int ms_prepare_write(struct rts51x_chip *chip, u16 old_blk, u16 new_blk,
3803 return STATUS_SUCCESS; 3803 return STATUS_SUCCESS;
3804} 3804}
3805 3805
3806int ms_delay_write(struct rts51x_chip *chip) 3806int rts51x_ms_delay_write(struct rts51x_chip *chip)
3807{ 3807{
3808 struct ms_info *ms_card = &(chip->ms_card); 3808 struct ms_info *ms_card = &(chip->ms_card);
3809 struct ms_delay_write_tag *delay_write = &(ms_card->delay_write); 3809 struct rts51x_ms_delay_write_tag *delay_write = &(ms_card->delay_write);
3810 int retval; 3810 int retval;
3811 3811
3812 if (delay_write->delay_write_flag) { 3812 if (delay_write->delay_write_flag) {
@@ -3827,16 +3827,16 @@ int ms_delay_write(struct rts51x_chip *chip)
3827 return STATUS_SUCCESS; 3827 return STATUS_SUCCESS;
3828} 3828}
3829 3829
3830static inline void ms_rw_fail(struct scsi_cmnd *srb, struct rts51x_chip *chip) 3830static inline void rts51x_ms_rw_fail(struct scsi_cmnd *srb, struct rts51x_chip *chip)
3831{ 3831{
3832 if (srb->sc_data_direction == DMA_FROM_DEVICE) 3832 if (srb->sc_data_direction == DMA_FROM_DEVICE)
3833 set_sense_type(chip, SCSI_LUN(srb), 3833 rts51x_set_sense_type(chip, SCSI_LUN(srb),
3834 SENSE_TYPE_MEDIA_UNRECOVER_READ_ERR); 3834 SENSE_TYPE_MEDIA_UNRECOVER_READ_ERR);
3835 else 3835 else
3836 set_sense_type(chip, SCSI_LUN(srb), SENSE_TYPE_MEDIA_WRITE_ERR); 3836 rts51x_set_sense_type(chip, SCSI_LUN(srb), SENSE_TYPE_MEDIA_WRITE_ERR);
3837} 3837}
3838 3838
3839static int ms_rw_multi_sector(struct scsi_cmnd *srb, struct rts51x_chip *chip, 3839static int rts51x_ms_rw_multi_sector(struct scsi_cmnd *srb, struct rts51x_chip *chip,
3840 u32 start_sector, u16 sector_cnt) 3840 u32 start_sector, u16 sector_cnt)
3841{ 3841{
3842 struct ms_info *ms_card = &(chip->ms_card); 3842 struct ms_info *ms_card = &(chip->ms_card);
@@ -3847,7 +3847,7 @@ static int ms_rw_multi_sector(struct scsi_cmnd *srb, struct rts51x_chip *chip,
3847 u8 start_page, end_page = 0, page_cnt; 3847 u8 start_page, end_page = 0, page_cnt;
3848 u8 *buf; 3848 u8 *buf;
3849 void *ptr = NULL; 3849 void *ptr = NULL;
3850 struct ms_delay_write_tag *delay_write = &(ms_card->delay_write); 3850 struct rts51x_ms_delay_write_tag *delay_write = &(ms_card->delay_write);
3851 3851
3852 ms_set_err_code(chip, MS_NO_ERROR); 3852 ms_set_err_code(chip, MS_NO_ERROR);
3853 3853
@@ -3857,7 +3857,7 @@ static int ms_rw_multi_sector(struct scsi_cmnd *srb, struct rts51x_chip *chip,
3857 3857
3858 retval = ms_switch_clock(chip); 3858 retval = ms_switch_clock(chip);
3859 if (retval != STATUS_SUCCESS) { 3859 if (retval != STATUS_SUCCESS) {
3860 ms_rw_fail(srb, chip); 3860 rts51x_ms_rw_fail(srb, chip);
3861 TRACE_RET(chip, retval); 3861 TRACE_RET(chip, retval);
3862 } 3862 }
3863 3863
@@ -3873,7 +3873,7 @@ static int ms_rw_multi_sector(struct scsi_cmnd *srb, struct rts51x_chip *chip,
3873 retval = ms_build_l2p_tbl(chip, seg_no); 3873 retval = ms_build_l2p_tbl(chip, seg_no);
3874 if (retval != STATUS_SUCCESS) { 3874 if (retval != STATUS_SUCCESS) {
3875 chip->card_fail |= MS_CARD; 3875 chip->card_fail |= MS_CARD;
3876 set_sense_type(chip, lun, SENSE_TYPE_MEDIA_NOT_PRESENT); 3876 rts51x_set_sense_type(chip, lun, SENSE_TYPE_MEDIA_NOT_PRESENT);
3877 TRACE_RET(chip, retval); 3877 TRACE_RET(chip, retval);
3878 } 3878 }
3879 } 3879 }
@@ -3898,7 +3898,7 @@ static int ms_rw_multi_sector(struct scsi_cmnd *srb, struct rts51x_chip *chip,
3898 start_page); 3898 start_page);
3899#endif 3899#endif
3900 if (retval != STATUS_SUCCESS) { 3900 if (retval != STATUS_SUCCESS) {
3901 set_sense_type(chip, lun, 3901 rts51x_set_sense_type(chip, lun,
3902 SENSE_TYPE_MEDIA_WRITE_ERR); 3902 SENSE_TYPE_MEDIA_WRITE_ERR);
3903 TRACE_RET(chip, retval); 3903 TRACE_RET(chip, retval);
3904 } 3904 }
@@ -3911,9 +3911,9 @@ static int ms_rw_multi_sector(struct scsi_cmnd *srb, struct rts51x_chip *chip,
3911 old_blk = delay_write->old_phyblock; 3911 old_blk = delay_write->old_phyblock;
3912 new_blk = delay_write->new_phyblock; 3912 new_blk = delay_write->new_phyblock;
3913 } else { 3913 } else {
3914 retval = ms_delay_write(chip); 3914 retval = rts51x_ms_delay_write(chip);
3915 if (retval != STATUS_SUCCESS) { 3915 if (retval != STATUS_SUCCESS) {
3916 set_sense_type(chip, lun, 3916 rts51x_set_sense_type(chip, lun,
3917 SENSE_TYPE_MEDIA_WRITE_ERR); 3917 SENSE_TYPE_MEDIA_WRITE_ERR);
3918 TRACE_RET(chip, retval); 3918 TRACE_RET(chip, retval);
3919 } 3919 }
@@ -3922,7 +3922,7 @@ static int ms_rw_multi_sector(struct scsi_cmnd *srb, struct rts51x_chip *chip,
3922 log_blk - ms_start_idx[seg_no]); 3922 log_blk - ms_start_idx[seg_no]);
3923 new_blk = ms_get_unused_block(chip, seg_no); 3923 new_blk = ms_get_unused_block(chip, seg_no);
3924 if ((old_blk == 0xFFFF) || (new_blk == 0xFFFF)) { 3924 if ((old_blk == 0xFFFF) || (new_blk == 0xFFFF)) {
3925 set_sense_type(chip, lun, 3925 rts51x_set_sense_type(chip, lun,
3926 SENSE_TYPE_MEDIA_WRITE_ERR); 3926 SENSE_TYPE_MEDIA_WRITE_ERR);
3927 TRACE_RET(chip, STATUS_FAIL); 3927 TRACE_RET(chip, STATUS_FAIL);
3928 } 3928 }
@@ -3933,26 +3933,26 @@ static int ms_rw_multi_sector(struct scsi_cmnd *srb, struct rts51x_chip *chip,
3933 if (retval != STATUS_SUCCESS) { 3933 if (retval != STATUS_SUCCESS) {
3934 if (monitor_card_cd(chip, MS_CARD) == 3934 if (monitor_card_cd(chip, MS_CARD) ==
3935 CD_NOT_EXIST) { 3935 CD_NOT_EXIST) {
3936 set_sense_type(chip, lun, 3936 rts51x_set_sense_type(chip, lun,
3937 SENSE_TYPE_MEDIA_NOT_PRESENT); 3937 SENSE_TYPE_MEDIA_NOT_PRESENT);
3938 TRACE_RET(chip, STATUS_FAIL); 3938 TRACE_RET(chip, STATUS_FAIL);
3939 } 3939 }
3940 3940
3941 set_sense_type(chip, lun, 3941 rts51x_set_sense_type(chip, lun,
3942 SENSE_TYPE_MEDIA_WRITE_ERR); 3942 SENSE_TYPE_MEDIA_WRITE_ERR);
3943 TRACE_RET(chip, retval); 3943 TRACE_RET(chip, retval);
3944 } 3944 }
3945 } 3945 }
3946 } else { 3946 } else {
3947 retval = ms_delay_write(chip); 3947 retval = rts51x_ms_delay_write(chip);
3948 if (retval != STATUS_SUCCESS) { 3948 if (retval != STATUS_SUCCESS) {
3949 if (monitor_card_cd(chip, MS_CARD) == CD_NOT_EXIST) { 3949 if (monitor_card_cd(chip, MS_CARD) == CD_NOT_EXIST) {
3950 set_sense_type(chip, lun, 3950 rts51x_set_sense_type(chip, lun,
3951 SENSE_TYPE_MEDIA_NOT_PRESENT); 3951 SENSE_TYPE_MEDIA_NOT_PRESENT);
3952 TRACE_RET(chip, STATUS_FAIL); 3952 TRACE_RET(chip, STATUS_FAIL);
3953 } 3953 }
3954 3954
3955 set_sense_type(chip, lun, 3955 rts51x_set_sense_type(chip, lun,
3956 SENSE_TYPE_MEDIA_UNRECOVER_READ_ERR); 3956 SENSE_TYPE_MEDIA_UNRECOVER_READ_ERR);
3957 TRACE_RET(chip, retval); 3957 TRACE_RET(chip, retval);
3958 } 3958 }
@@ -3960,7 +3960,7 @@ static int ms_rw_multi_sector(struct scsi_cmnd *srb, struct rts51x_chip *chip,
3960 ms_get_l2p_tbl(chip, seg_no, 3960 ms_get_l2p_tbl(chip, seg_no,
3961 log_blk - ms_start_idx[seg_no]); 3961 log_blk - ms_start_idx[seg_no]);
3962 if (old_blk == 0xFFFF) { 3962 if (old_blk == 0xFFFF) {
3963 set_sense_type(chip, lun, 3963 rts51x_set_sense_type(chip, lun,
3964 SENSE_TYPE_MEDIA_UNRECOVER_READ_ERR); 3964 SENSE_TYPE_MEDIA_UNRECOVER_READ_ERR);
3965 TRACE_RET(chip, STATUS_FAIL); 3965 TRACE_RET(chip, STATUS_FAIL);
3966 } 3966 }
@@ -3993,12 +3993,12 @@ static int ms_rw_multi_sector(struct scsi_cmnd *srb, struct rts51x_chip *chip,
3993 3993
3994 if (retval != STATUS_SUCCESS) { 3994 if (retval != STATUS_SUCCESS) {
3995 if (monitor_card_cd(chip, MS_CARD) == CD_NOT_EXIST) { 3995 if (monitor_card_cd(chip, MS_CARD) == CD_NOT_EXIST) {
3996 set_sense_type(chip, lun, 3996 rts51x_set_sense_type(chip, lun,
3997 SENSE_TYPE_MEDIA_NOT_PRESENT); 3997 SENSE_TYPE_MEDIA_NOT_PRESENT);
3998 TRACE_RET(chip, STATUS_FAIL); 3998 TRACE_RET(chip, STATUS_FAIL);
3999 } 3999 }
4000 4000
4001 ms_rw_fail(srb, chip); 4001 rts51x_ms_rw_fail(srb, chip);
4002 TRACE_RET(chip, retval); 4002 TRACE_RET(chip, retval);
4003 } 4003 }
4004 /* Update L2P table if need */ 4004 /* Update L2P table if need */
@@ -4030,7 +4030,7 @@ static int ms_rw_multi_sector(struct scsi_cmnd *srb, struct rts51x_chip *chip,
4030 retval = ms_build_l2p_tbl(chip, seg_no); 4030 retval = ms_build_l2p_tbl(chip, seg_no);
4031 if (retval != STATUS_SUCCESS) { 4031 if (retval != STATUS_SUCCESS) {
4032 chip->card_fail |= MS_CARD; 4032 chip->card_fail |= MS_CARD;
4033 set_sense_type(chip, lun, 4033 rts51x_set_sense_type(chip, lun,
4034 SENSE_TYPE_MEDIA_NOT_PRESENT); 4034 SENSE_TYPE_MEDIA_NOT_PRESENT);
4035 TRACE_RET(chip, retval); 4035 TRACE_RET(chip, retval);
4036 } 4036 }
@@ -4040,14 +4040,14 @@ static int ms_rw_multi_sector(struct scsi_cmnd *srb, struct rts51x_chip *chip,
4040 ms_get_l2p_tbl(chip, seg_no, 4040 ms_get_l2p_tbl(chip, seg_no,
4041 log_blk - ms_start_idx[seg_no]); 4041 log_blk - ms_start_idx[seg_no]);
4042 if (old_blk == 0xFFFF) { 4042 if (old_blk == 0xFFFF) {
4043 ms_rw_fail(srb, chip); 4043 rts51x_ms_rw_fail(srb, chip);
4044 TRACE_RET(chip, STATUS_FAIL); 4044 TRACE_RET(chip, STATUS_FAIL);
4045 } 4045 }
4046 4046
4047 if (srb->sc_data_direction == DMA_TO_DEVICE) { 4047 if (srb->sc_data_direction == DMA_TO_DEVICE) {
4048 new_blk = ms_get_unused_block(chip, seg_no); 4048 new_blk = ms_get_unused_block(chip, seg_no);
4049 if (new_blk == 0xFFFF) { 4049 if (new_blk == 0xFFFF) {
4050 ms_rw_fail(srb, chip); 4050 rts51x_ms_rw_fail(srb, chip);
4051 TRACE_RET(chip, STATUS_FAIL); 4051 TRACE_RET(chip, STATUS_FAIL);
4052 } 4052 }
4053 } 4053 }
@@ -4073,7 +4073,7 @@ static int ms_rw_multi_sector(struct scsi_cmnd *srb, struct rts51x_chip *chip,
4073 return STATUS_SUCCESS; 4073 return STATUS_SUCCESS;
4074} 4074}
4075 4075
4076int ms_rw(struct scsi_cmnd *srb, struct rts51x_chip *chip, u32 start_sector, 4076int rts51x_ms_rw(struct scsi_cmnd *srb, struct rts51x_chip *chip, u32 start_sector,
4077 u16 sector_cnt) 4077 u16 sector_cnt)
4078{ 4078{
4079 struct ms_info *ms_card = &(chip->ms_card); 4079 struct ms_info *ms_card = &(chip->ms_card);
@@ -4084,12 +4084,12 @@ int ms_rw(struct scsi_cmnd *srb, struct rts51x_chip *chip, u32 start_sector,
4084 mspro_rw_multi_sector(srb, chip, start_sector, sector_cnt); 4084 mspro_rw_multi_sector(srb, chip, start_sector, sector_cnt);
4085 else 4085 else
4086 retval = 4086 retval =
4087 ms_rw_multi_sector(srb, chip, start_sector, sector_cnt); 4087 rts51x_ms_rw_multi_sector(srb, chip, start_sector, sector_cnt);
4088 4088
4089 return retval; 4089 return retval;
4090} 4090}
4091 4091
4092void ms_free_l2p_tbl(struct rts51x_chip *chip) 4092void rts51x_ms_free_l2p_tbl(struct rts51x_chip *chip)
4093{ 4093{
4094 struct ms_info *ms_card = &(chip->ms_card); 4094 struct ms_info *ms_card = &(chip->ms_card);
4095 int i = 0; 4095 int i = 0;
@@ -4110,7 +4110,7 @@ void ms_free_l2p_tbl(struct rts51x_chip *chip)
4110 } 4110 }
4111} 4111}
4112 4112
4113void ms_cleanup_work(struct rts51x_chip *chip) 4113void rts51x_ms_cleanup_work(struct rts51x_chip *chip)
4114{ 4114{
4115 struct ms_info *ms_card = &(chip->ms_card); 4115 struct ms_info *ms_card = &(chip->ms_card);
4116 4116
@@ -4130,7 +4130,7 @@ void ms_cleanup_work(struct rts51x_chip *chip)
4130 } else if ((!CHK_MSPRO(ms_card)) 4130 } else if ((!CHK_MSPRO(ms_card))
4131 && ms_card->delay_write.delay_write_flag) { 4131 && ms_card->delay_write.delay_write_flag) {
4132 RTS51X_DEBUGP("MS: delay write\n"); 4132 RTS51X_DEBUGP("MS: delay write\n");
4133 ms_delay_write(chip); 4133 rts51x_ms_delay_write(chip);
4134 ms_card->counter = 0; 4134 ms_card->counter = 0;
4135 } 4135 }
4136} 4136}
@@ -4161,12 +4161,12 @@ static int ms_power_off_card3v3(struct rts51x_chip *chip)
4161 return STATUS_SUCCESS; 4161 return STATUS_SUCCESS;
4162} 4162}
4163 4163
4164int release_ms_card(struct rts51x_chip *chip) 4164int rts51x_release_ms_card(struct rts51x_chip *chip)
4165{ 4165{
4166 struct ms_info *ms_card = &(chip->ms_card); 4166 struct ms_info *ms_card = &(chip->ms_card);
4167 int retval; 4167 int retval;
4168 4168
4169 RTS51X_DEBUGP("release_ms_card\n"); 4169 RTS51X_DEBUGP("rts51x_release_ms_card\n");
4170 4170
4171 ms_card->delay_write.delay_write_flag = 0; 4171 ms_card->delay_write.delay_write_flag = 0;
4172 ms_card->pro_under_formatting = 0; 4172 ms_card->pro_under_formatting = 0;
@@ -4175,7 +4175,7 @@ int release_ms_card(struct rts51x_chip *chip)
4175 chip->card_fail &= ~MS_CARD; 4175 chip->card_fail &= ~MS_CARD;
4176 chip->card_wp &= ~MS_CARD; 4176 chip->card_wp &= ~MS_CARD;
4177 4177
4178 ms_free_l2p_tbl(chip); 4178 rts51x_ms_free_l2p_tbl(chip);
4179 4179
4180 rts51x_write_register(chip, SFSM_ED, HW_CMD_STOP, HW_CMD_STOP); 4180 rts51x_write_register(chip, SFSM_ED, HW_CMD_STOP, HW_CMD_STOP);
4181 4181
diff --git a/drivers/staging/rts5139/ms.h b/drivers/staging/rts5139/ms.h
index 0321d06e776d..857c1974ef24 100644
--- a/drivers/staging/rts5139/ms.h
+++ b/drivers/staging/rts5139/ms.h
@@ -231,18 +231,18 @@
231 (((retval) != STATUS_SUCCESS) || \ 231 (((retval) != STATUS_SUCCESS) || \
232 (chip->rsp_buf[0] & MS_TRANSFER_ERR)) 232 (chip->rsp_buf[0] & MS_TRANSFER_ERR))
233 233
234void mspro_polling_format_status(struct rts51x_chip *chip); 234void rts51x_mspro_polling_format_status(struct rts51x_chip *chip);
235void mspro_format_sense(struct rts51x_chip *chip, unsigned int lun); 235void rts51x_mspro_format_sense(struct rts51x_chip *chip, unsigned int lun);
236 236
237int reset_ms_card(struct rts51x_chip *chip); 237int rts51x_reset_ms_card(struct rts51x_chip *chip);
238int ms_rw(struct scsi_cmnd *srb, struct rts51x_chip *chip, u32 start_sector, 238int rts51x_ms_rw(struct scsi_cmnd *srb, struct rts51x_chip *chip, u32 start_sector,
239 u16 sector_cnt); 239 u16 sector_cnt);
240int mspro_format(struct scsi_cmnd *srb, struct rts51x_chip *chip, 240int rts51x_mspro_format(struct scsi_cmnd *srb, struct rts51x_chip *chip,
241 int short_data_len, int quick_format); 241 int short_data_len, int quick_format);
242void ms_free_l2p_tbl(struct rts51x_chip *chip); 242void rts51x_ms_free_l2p_tbl(struct rts51x_chip *chip);
243void ms_cleanup_work(struct rts51x_chip *chip); 243void rts51x_ms_cleanup_work(struct rts51x_chip *chip);
244int release_ms_card(struct rts51x_chip *chip); 244int rts51x_release_ms_card(struct rts51x_chip *chip);
245int ms_delay_write(struct rts51x_chip *chip); 245int rts51x_ms_delay_write(struct rts51x_chip *chip);
246 246
247#ifdef SUPPORT_MAGIC_GATE 247#ifdef SUPPORT_MAGIC_GATE
248 248
diff --git a/drivers/staging/rts5139/ms_mg.c b/drivers/staging/rts5139/ms_mg.c
index 057d96c1a937..54cfd85259a9 100644
--- a/drivers/staging/rts5139/ms_mg.c
+++ b/drivers/staging/rts5139/ms_mg.c
@@ -119,7 +119,7 @@ int mg_set_tpc_para_sub(struct rts51x_chip *chip, int type, u8 mg_entry_num)
119 * 2. send SET_ID TPC command to medium with Leaf ID released by host 119 * 2. send SET_ID TPC command to medium with Leaf ID released by host
120 * in this SCSI CMD. 120 * in this SCSI CMD.
121 */ 121 */
122int mg_set_leaf_id(struct scsi_cmnd *srb, struct rts51x_chip *chip) 122int rts51x_mg_set_leaf_id(struct scsi_cmnd *srb, struct rts51x_chip *chip)
123{ 123{
124 int retval; 124 int retval;
125 int i; 125 int i;
@@ -129,10 +129,10 @@ int mg_set_leaf_id(struct scsi_cmnd *srb, struct rts51x_chip *chip)
129 RTS51X_DEBUGP("--%s--\n", __func__); 129 RTS51X_DEBUGP("--%s--\n", __func__);
130 130
131 if (scsi_bufflen(srb) < 12) { 131 if (scsi_bufflen(srb) < 12) {
132 set_sense_type(chip, lun, SENSE_TYPE_MEDIA_INVALID_CMD_FIELD); 132 rts51x_set_sense_type(chip, lun, SENSE_TYPE_MEDIA_INVALID_CMD_FIELD);
133 TRACE_RET(chip, STATUS_FAIL); 133 TRACE_RET(chip, STATUS_FAIL);
134 } 134 }
135 ms_cleanup_work(chip); 135 rts51x_ms_cleanup_work(chip);
136 136
137 retval = ms_switch_clock(chip); 137 retval = ms_switch_clock(chip);
138 if (retval != STATUS_SUCCESS) 138 if (retval != STATUS_SUCCESS)
@@ -140,7 +140,7 @@ int mg_set_leaf_id(struct scsi_cmnd *srb, struct rts51x_chip *chip)
140 140
141 retval = mg_send_ex_cmd(chip, MG_SET_LID, 0); 141 retval = mg_send_ex_cmd(chip, MG_SET_LID, 0);
142 if (retval != STATUS_SUCCESS) { 142 if (retval != STATUS_SUCCESS) {
143 set_sense_type(chip, lun, SENSE_TYPE_MG_KEY_FAIL_NOT_ESTAB); 143 rts51x_set_sense_type(chip, lun, SENSE_TYPE_MG_KEY_FAIL_NOT_ESTAB);
144 TRACE_RET(chip, retval); 144 TRACE_RET(chip, retval);
145 } 145 }
146 146
@@ -151,12 +151,12 @@ int mg_set_leaf_id(struct scsi_cmnd *srb, struct rts51x_chip *chip)
151 retval = 151 retval =
152 ms_write_bytes(chip, PRO_WRITE_SHORT_DATA, 32, WAIT_INT, buf1, 32); 152 ms_write_bytes(chip, PRO_WRITE_SHORT_DATA, 32, WAIT_INT, buf1, 32);
153 if (retval != STATUS_SUCCESS) { 153 if (retval != STATUS_SUCCESS) {
154 set_sense_type(chip, lun, SENSE_TYPE_MG_KEY_FAIL_NOT_ESTAB); 154 rts51x_set_sense_type(chip, lun, SENSE_TYPE_MG_KEY_FAIL_NOT_ESTAB);
155 TRACE_RET(chip, retval); 155 TRACE_RET(chip, retval);
156 } 156 }
157 retval = mg_check_int_error(chip); 157 retval = mg_check_int_error(chip);
158 if (retval != STATUS_SUCCESS) { 158 if (retval != STATUS_SUCCESS) {
159 set_sense_type(chip, lun, SENSE_TYPE_MG_KEY_FAIL_NOT_ESTAB); 159 rts51x_set_sense_type(chip, lun, SENSE_TYPE_MG_KEY_FAIL_NOT_ESTAB);
160 TRACE_RET(chip, retval); 160 TRACE_RET(chip, retval);
161 } 161 }
162 162
@@ -170,7 +170,7 @@ int mg_set_leaf_id(struct scsi_cmnd *srb, struct rts51x_chip *chip)
170 * data(1536 bytes totally) from medium by using READ_LONG_DATA TPC 170 * data(1536 bytes totally) from medium by using READ_LONG_DATA TPC
171 * for 3 times, and report data to host with data-length is 1052 bytes. 171 * for 3 times, and report data to host with data-length is 1052 bytes.
172 */ 172 */
173int mg_get_local_EKB(struct scsi_cmnd *srb, struct rts51x_chip *chip) 173int rts51x_mg_get_local_EKB(struct scsi_cmnd *srb, struct rts51x_chip *chip)
174{ 174{
175 int retval = STATUS_FAIL; 175 int retval = STATUS_FAIL;
176 int bufflen; 176 int bufflen;
@@ -179,7 +179,7 @@ int mg_get_local_EKB(struct scsi_cmnd *srb, struct rts51x_chip *chip)
179 179
180 RTS51X_DEBUGP("--%s--\n", __func__); 180 RTS51X_DEBUGP("--%s--\n", __func__);
181 181
182 ms_cleanup_work(chip); 182 rts51x_ms_cleanup_work(chip);
183 183
184 retval = ms_switch_clock(chip); 184 retval = ms_switch_clock(chip);
185 if (retval != STATUS_SUCCESS) 185 if (retval != STATUS_SUCCESS)
@@ -196,21 +196,21 @@ int mg_get_local_EKB(struct scsi_cmnd *srb, struct rts51x_chip *chip)
196 196
197 retval = mg_send_ex_cmd(chip, MG_GET_LEKB, 0); 197 retval = mg_send_ex_cmd(chip, MG_GET_LEKB, 0);
198 if (retval != STATUS_SUCCESS) { 198 if (retval != STATUS_SUCCESS) {
199 set_sense_type(chip, lun, SENSE_TYPE_MG_KEY_FAIL_NOT_AUTHEN); 199 rts51x_set_sense_type(chip, lun, SENSE_TYPE_MG_KEY_FAIL_NOT_AUTHEN);
200 TRACE_GOTO(chip, GetEKBFinish); 200 TRACE_GOTO(chip, GetEKBFinish);
201 } 201 }
202 202
203 retval = ms_transfer_data(chip, MS_TM_AUTO_READ, PRO_READ_LONG_DATA, 203 retval = ms_transfer_data(chip, MS_TM_AUTO_READ, PRO_READ_LONG_DATA,
204 3, WAIT_INT, 0, 0, buf + 4, 1536); 204 3, WAIT_INT, 0, 0, buf + 4, 1536);
205 if (retval != STATUS_SUCCESS) { 205 if (retval != STATUS_SUCCESS) {
206 set_sense_type(chip, lun, SENSE_TYPE_MG_KEY_FAIL_NOT_AUTHEN); 206 rts51x_set_sense_type(chip, lun, SENSE_TYPE_MG_KEY_FAIL_NOT_AUTHEN);
207 rts51x_write_register(chip, CARD_STOP, MS_STOP | MS_CLR_ERR, 207 rts51x_write_register(chip, CARD_STOP, MS_STOP | MS_CLR_ERR,
208 MS_STOP | MS_CLR_ERR); 208 MS_STOP | MS_CLR_ERR);
209 TRACE_GOTO(chip, GetEKBFinish); 209 TRACE_GOTO(chip, GetEKBFinish);
210 } 210 }
211 retval = mg_check_int_error(chip); 211 retval = mg_check_int_error(chip);
212 if (retval != STATUS_SUCCESS) { 212 if (retval != STATUS_SUCCESS) {
213 set_sense_type(chip, lun, SENSE_TYPE_MG_KEY_FAIL_NOT_AUTHEN); 213 rts51x_set_sense_type(chip, lun, SENSE_TYPE_MG_KEY_FAIL_NOT_AUTHEN);
214 TRACE_GOTO(chip, GetEKBFinish); 214 TRACE_GOTO(chip, GetEKBFinish);
215 } 215 }
216 216
@@ -229,7 +229,7 @@ GetEKBFinish:
229 * TPC commands to the medium for writing 8-bytes data as challenge 229 * TPC commands to the medium for writing 8-bytes data as challenge
230 * by host within a short data packet. 230 * by host within a short data packet.
231 */ 231 */
232int mg_chg(struct scsi_cmnd *srb, struct rts51x_chip *chip) 232int rts51x_mg_chg(struct scsi_cmnd *srb, struct rts51x_chip *chip)
233{ 233{
234 struct ms_info *ms_card = &(chip->ms_card); 234 struct ms_info *ms_card = &(chip->ms_card);
235 int retval; 235 int retval;
@@ -240,7 +240,7 @@ int mg_chg(struct scsi_cmnd *srb, struct rts51x_chip *chip)
240 240
241 RTS51X_DEBUGP("--%s--\n", __func__); 241 RTS51X_DEBUGP("--%s--\n", __func__);
242 242
243 ms_cleanup_work(chip); 243 rts51x_ms_cleanup_work(chip);
244 244
245 retval = ms_switch_clock(chip); 245 retval = ms_switch_clock(chip);
246 if (retval != STATUS_SUCCESS) 246 if (retval != STATUS_SUCCESS)
@@ -248,19 +248,19 @@ int mg_chg(struct scsi_cmnd *srb, struct rts51x_chip *chip)
248 248
249 retval = mg_send_ex_cmd(chip, MG_GET_ID, 0); 249 retval = mg_send_ex_cmd(chip, MG_GET_ID, 0);
250 if (retval != STATUS_SUCCESS) { 250 if (retval != STATUS_SUCCESS) {
251 set_sense_type(chip, lun, SENSE_TYPE_MG_INCOMPATIBLE_MEDIUM); 251 rts51x_set_sense_type(chip, lun, SENSE_TYPE_MG_INCOMPATIBLE_MEDIUM);
252 TRACE_RET(chip, retval); 252 TRACE_RET(chip, retval);
253 } 253 }
254 254
255 retval = 255 retval =
256 ms_read_bytes(chip, PRO_READ_SHORT_DATA, 32, WAIT_INT, buf, 32); 256 ms_read_bytes(chip, PRO_READ_SHORT_DATA, 32, WAIT_INT, buf, 32);
257 if (retval != STATUS_SUCCESS) { 257 if (retval != STATUS_SUCCESS) {
258 set_sense_type(chip, lun, SENSE_TYPE_MG_INCOMPATIBLE_MEDIUM); 258 rts51x_set_sense_type(chip, lun, SENSE_TYPE_MG_INCOMPATIBLE_MEDIUM);
259 TRACE_RET(chip, retval); 259 TRACE_RET(chip, retval);
260 } 260 }
261 retval = mg_check_int_error(chip); 261 retval = mg_check_int_error(chip);
262 if (retval != STATUS_SUCCESS) { 262 if (retval != STATUS_SUCCESS) {
263 set_sense_type(chip, lun, SENSE_TYPE_MG_INCOMPATIBLE_MEDIUM); 263 rts51x_set_sense_type(chip, lun, SENSE_TYPE_MG_INCOMPATIBLE_MEDIUM);
264 TRACE_RET(chip, retval); 264 TRACE_RET(chip, retval);
265 } 265 }
266 266
@@ -276,13 +276,13 @@ int mg_chg(struct scsi_cmnd *srb, struct rts51x_chip *chip)
276 } 276 }
277 277
278 if (i == 2500) { 278 if (i == 2500) {
279 set_sense_type(chip, lun, SENSE_TYPE_MG_INCOMPATIBLE_MEDIUM); 279 rts51x_set_sense_type(chip, lun, SENSE_TYPE_MG_INCOMPATIBLE_MEDIUM);
280 TRACE_RET(chip, STATUS_FAIL); 280 TRACE_RET(chip, STATUS_FAIL);
281 } 281 }
282 282
283 retval = mg_send_ex_cmd(chip, MG_SET_RD, 0); 283 retval = mg_send_ex_cmd(chip, MG_SET_RD, 0);
284 if (retval != STATUS_SUCCESS) { 284 if (retval != STATUS_SUCCESS) {
285 set_sense_type(chip, lun, SENSE_TYPE_MG_INCOMPATIBLE_MEDIUM); 285 rts51x_set_sense_type(chip, lun, SENSE_TYPE_MG_INCOMPATIBLE_MEDIUM);
286 TRACE_RET(chip, retval); 286 TRACE_RET(chip, retval);
287 } 287 }
288 288
@@ -296,12 +296,12 @@ int mg_chg(struct scsi_cmnd *srb, struct rts51x_chip *chip)
296 retval = 296 retval =
297 ms_write_bytes(chip, PRO_WRITE_SHORT_DATA, 32, WAIT_INT, buf, 32); 297 ms_write_bytes(chip, PRO_WRITE_SHORT_DATA, 32, WAIT_INT, buf, 32);
298 if (retval != STATUS_SUCCESS) { 298 if (retval != STATUS_SUCCESS) {
299 set_sense_type(chip, lun, SENSE_TYPE_MG_INCOMPATIBLE_MEDIUM); 299 rts51x_set_sense_type(chip, lun, SENSE_TYPE_MG_INCOMPATIBLE_MEDIUM);
300 TRACE_RET(chip, retval); 300 TRACE_RET(chip, retval);
301 } 301 }
302 retval = mg_check_int_error(chip); 302 retval = mg_check_int_error(chip);
303 if (retval != STATUS_SUCCESS) { 303 if (retval != STATUS_SUCCESS) {
304 set_sense_type(chip, lun, SENSE_TYPE_MG_INCOMPATIBLE_MEDIUM); 304 rts51x_set_sense_type(chip, lun, SENSE_TYPE_MG_INCOMPATIBLE_MEDIUM);
305 TRACE_RET(chip, retval); 305 TRACE_RET(chip, retval);
306 } 306 }
307 307
@@ -320,7 +320,7 @@ int mg_chg(struct scsi_cmnd *srb, struct rts51x_chip *chip)
320 * The paremeter MagicGateID is the one that adapter has obtained from 320 * The paremeter MagicGateID is the one that adapter has obtained from
321 * the medium by TPC commands in Set Leaf ID command phase previously. 321 * the medium by TPC commands in Set Leaf ID command phase previously.
322 */ 322 */
323int mg_get_rsp_chg(struct scsi_cmnd *srb, struct rts51x_chip *chip) 323int rts51x_mg_get_rsp_chg(struct scsi_cmnd *srb, struct rts51x_chip *chip)
324{ 324{
325 struct ms_info *ms_card = &(chip->ms_card); 325 struct ms_info *ms_card = &(chip->ms_card);
326 int retval, i; 326 int retval, i;
@@ -330,7 +330,7 @@ int mg_get_rsp_chg(struct scsi_cmnd *srb, struct rts51x_chip *chip)
330 330
331 RTS51X_DEBUGP("--%s--\n", __func__); 331 RTS51X_DEBUGP("--%s--\n", __func__);
332 332
333 ms_cleanup_work(chip); 333 rts51x_ms_cleanup_work(chip);
334 334
335 retval = ms_switch_clock(chip); 335 retval = ms_switch_clock(chip);
336 if (retval != STATUS_SUCCESS) 336 if (retval != STATUS_SUCCESS)
@@ -338,19 +338,19 @@ int mg_get_rsp_chg(struct scsi_cmnd *srb, struct rts51x_chip *chip)
338 338
339 retval = mg_send_ex_cmd(chip, MG_MAKE_RMS, 0); 339 retval = mg_send_ex_cmd(chip, MG_MAKE_RMS, 0);
340 if (retval != STATUS_SUCCESS) { 340 if (retval != STATUS_SUCCESS) {
341 set_sense_type(chip, lun, SENSE_TYPE_MG_KEY_FAIL_NOT_AUTHEN); 341 rts51x_set_sense_type(chip, lun, SENSE_TYPE_MG_KEY_FAIL_NOT_AUTHEN);
342 TRACE_RET(chip, retval); 342 TRACE_RET(chip, retval);
343 } 343 }
344 344
345 retval = 345 retval =
346 ms_read_bytes(chip, PRO_READ_SHORT_DATA, 32, WAIT_INT, buf1, 32); 346 ms_read_bytes(chip, PRO_READ_SHORT_DATA, 32, WAIT_INT, buf1, 32);
347 if (retval != STATUS_SUCCESS) { 347 if (retval != STATUS_SUCCESS) {
348 set_sense_type(chip, lun, SENSE_TYPE_MG_KEY_FAIL_NOT_AUTHEN); 348 rts51x_set_sense_type(chip, lun, SENSE_TYPE_MG_KEY_FAIL_NOT_AUTHEN);
349 TRACE_RET(chip, retval); 349 TRACE_RET(chip, retval);
350 } 350 }
351 retval = mg_check_int_error(chip); 351 retval = mg_check_int_error(chip);
352 if (retval != STATUS_SUCCESS) { 352 if (retval != STATUS_SUCCESS) {
353 set_sense_type(chip, lun, SENSE_TYPE_MG_KEY_FAIL_NOT_AUTHEN); 353 rts51x_set_sense_type(chip, lun, SENSE_TYPE_MG_KEY_FAIL_NOT_AUTHEN);
354 TRACE_RET(chip, retval); 354 TRACE_RET(chip, retval);
355 } 355 }
356 356
@@ -375,7 +375,7 @@ int mg_get_rsp_chg(struct scsi_cmnd *srb, struct rts51x_chip *chip)
375 } 375 }
376 376
377 if (i == 2500) { 377 if (i == 2500) {
378 set_sense_type(chip, lun, SENSE_TYPE_MG_KEY_FAIL_NOT_AUTHEN); 378 rts51x_set_sense_type(chip, lun, SENSE_TYPE_MG_KEY_FAIL_NOT_AUTHEN);
379 TRACE_RET(chip, STATUS_FAIL); 379 TRACE_RET(chip, STATUS_FAIL);
380 } 380 }
381 381
@@ -389,7 +389,7 @@ int mg_get_rsp_chg(struct scsi_cmnd *srb, struct rts51x_chip *chip)
389 * issues TPC commands to the medium for writing 8-bytes data as 389 * issues TPC commands to the medium for writing 8-bytes data as
390 * challenge by host within a short data packet. 390 * challenge by host within a short data packet.
391 */ 391 */
392int mg_rsp(struct scsi_cmnd *srb, struct rts51x_chip *chip) 392int rts51x_mg_rsp(struct scsi_cmnd *srb, struct rts51x_chip *chip)
393{ 393{
394 struct ms_info *ms_card = &(chip->ms_card); 394 struct ms_info *ms_card = &(chip->ms_card);
395 int retval; 395 int retval;
@@ -400,7 +400,7 @@ int mg_rsp(struct scsi_cmnd *srb, struct rts51x_chip *chip)
400 400
401 RTS51X_DEBUGP("--%s--\n", __func__); 401 RTS51X_DEBUGP("--%s--\n", __func__);
402 402
403 ms_cleanup_work(chip); 403 rts51x_ms_cleanup_work(chip);
404 404
405 retval = ms_switch_clock(chip); 405 retval = ms_switch_clock(chip);
406 if (retval != STATUS_SUCCESS) 406 if (retval != STATUS_SUCCESS)
@@ -408,7 +408,7 @@ int mg_rsp(struct scsi_cmnd *srb, struct rts51x_chip *chip)
408 408
409 retval = mg_send_ex_cmd(chip, MG_MAKE_KSE, 0); 409 retval = mg_send_ex_cmd(chip, MG_MAKE_KSE, 0);
410 if (retval != STATUS_SUCCESS) { 410 if (retval != STATUS_SUCCESS) {
411 set_sense_type(chip, lun, SENSE_TYPE_MG_KEY_FAIL_NOT_AUTHEN); 411 rts51x_set_sense_type(chip, lun, SENSE_TYPE_MG_KEY_FAIL_NOT_AUTHEN);
412 TRACE_RET(chip, retval); 412 TRACE_RET(chip, retval);
413 } 413 }
414 414
@@ -422,12 +422,12 @@ int mg_rsp(struct scsi_cmnd *srb, struct rts51x_chip *chip)
422 retval = 422 retval =
423 ms_write_bytes(chip, PRO_WRITE_SHORT_DATA, 32, WAIT_INT, buf, 32); 423 ms_write_bytes(chip, PRO_WRITE_SHORT_DATA, 32, WAIT_INT, buf, 32);
424 if (retval != STATUS_SUCCESS) { 424 if (retval != STATUS_SUCCESS) {
425 set_sense_type(chip, lun, SENSE_TYPE_MG_KEY_FAIL_NOT_AUTHEN); 425 rts51x_set_sense_type(chip, lun, SENSE_TYPE_MG_KEY_FAIL_NOT_AUTHEN);
426 TRACE_RET(chip, retval); 426 TRACE_RET(chip, retval);
427 } 427 }
428 retval = mg_check_int_error(chip); 428 retval = mg_check_int_error(chip);
429 if (retval != STATUS_SUCCESS) { 429 if (retval != STATUS_SUCCESS) {
430 set_sense_type(chip, lun, SENSE_TYPE_MG_KEY_FAIL_NOT_AUTHEN); 430 rts51x_set_sense_type(chip, lun, SENSE_TYPE_MG_KEY_FAIL_NOT_AUTHEN);
431 TRACE_RET(chip, retval); 431 TRACE_RET(chip, retval);
432 } 432 }
433 433
@@ -447,7 +447,7 @@ int mg_rsp(struct scsi_cmnd *srb, struct rts51x_chip *chip)
447 * precedes data transmission from medium to Ring buffer by DMA mechanism 447 * precedes data transmission from medium to Ring buffer by DMA mechanism
448 * in order to get maximum performance and minimum code size simultaneously. 448 * in order to get maximum performance and minimum code size simultaneously.
449 */ 449 */
450int mg_get_ICV(struct scsi_cmnd *srb, struct rts51x_chip *chip) 450int rts51x_mg_get_ICV(struct scsi_cmnd *srb, struct rts51x_chip *chip)
451{ 451{
452 struct ms_info *ms_card = &(chip->ms_card); 452 struct ms_info *ms_card = &(chip->ms_card);
453 int retval; 453 int retval;
@@ -457,7 +457,7 @@ int mg_get_ICV(struct scsi_cmnd *srb, struct rts51x_chip *chip)
457 457
458 RTS51X_DEBUGP("--%s--\n", __func__); 458 RTS51X_DEBUGP("--%s--\n", __func__);
459 459
460 ms_cleanup_work(chip); 460 rts51x_ms_cleanup_work(chip);
461 461
462 retval = ms_switch_clock(chip); 462 retval = ms_switch_clock(chip);
463 if (retval != STATUS_SUCCESS) 463 if (retval != STATUS_SUCCESS)
@@ -474,21 +474,21 @@ int mg_get_ICV(struct scsi_cmnd *srb, struct rts51x_chip *chip)
474 474
475 retval = mg_send_ex_cmd(chip, MG_GET_IBD, ms_card->mg_entry_num); 475 retval = mg_send_ex_cmd(chip, MG_GET_IBD, ms_card->mg_entry_num);
476 if (retval != STATUS_SUCCESS) { 476 if (retval != STATUS_SUCCESS) {
477 set_sense_type(chip, lun, SENSE_TYPE_MEDIA_UNRECOVER_READ_ERR); 477 rts51x_set_sense_type(chip, lun, SENSE_TYPE_MEDIA_UNRECOVER_READ_ERR);
478 TRACE_GOTO(chip, GetICVFinish); 478 TRACE_GOTO(chip, GetICVFinish);
479 } 479 }
480 480
481 retval = ms_transfer_data(chip, MS_TM_AUTO_READ, PRO_READ_LONG_DATA, 481 retval = ms_transfer_data(chip, MS_TM_AUTO_READ, PRO_READ_LONG_DATA,
482 2, WAIT_INT, 0, 0, buf + 4, 1024); 482 2, WAIT_INT, 0, 0, buf + 4, 1024);
483 if (retval != STATUS_SUCCESS) { 483 if (retval != STATUS_SUCCESS) {
484 set_sense_type(chip, lun, SENSE_TYPE_MEDIA_UNRECOVER_READ_ERR); 484 rts51x_set_sense_type(chip, lun, SENSE_TYPE_MEDIA_UNRECOVER_READ_ERR);
485 rts51x_write_register(chip, CARD_STOP, MS_STOP | MS_CLR_ERR, 485 rts51x_write_register(chip, CARD_STOP, MS_STOP | MS_CLR_ERR,
486 MS_STOP | MS_CLR_ERR); 486 MS_STOP | MS_CLR_ERR);
487 TRACE_GOTO(chip, GetICVFinish); 487 TRACE_GOTO(chip, GetICVFinish);
488 } 488 }
489 retval = mg_check_int_error(chip); 489 retval = mg_check_int_error(chip);
490 if (retval != STATUS_SUCCESS) { 490 if (retval != STATUS_SUCCESS) {
491 set_sense_type(chip, lun, SENSE_TYPE_MEDIA_UNRECOVER_READ_ERR); 491 rts51x_set_sense_type(chip, lun, SENSE_TYPE_MEDIA_UNRECOVER_READ_ERR);
492 TRACE_GOTO(chip, GetICVFinish); 492 TRACE_GOTO(chip, GetICVFinish);
493 } 493 }
494 494
@@ -511,7 +511,7 @@ GetICVFinish:
511 * that sent by host, and it should be skipped by shifting DMA pointer 511 * that sent by host, and it should be skipped by shifting DMA pointer
512 * before writing 1024 bytes to medium. 512 * before writing 1024 bytes to medium.
513 */ 513 */
514int mg_set_ICV(struct scsi_cmnd *srb, struct rts51x_chip *chip) 514int rts51x_mg_set_ICV(struct scsi_cmnd *srb, struct rts51x_chip *chip)
515{ 515{
516 struct ms_info *ms_card = &(chip->ms_card); 516 struct ms_info *ms_card = &(chip->ms_card);
517 int retval; 517 int retval;
@@ -524,7 +524,7 @@ int mg_set_ICV(struct scsi_cmnd *srb, struct rts51x_chip *chip)
524 524
525 RTS51X_DEBUGP("--%s--\n", __func__); 525 RTS51X_DEBUGP("--%s--\n", __func__);
526 526
527 ms_cleanup_work(chip); 527 rts51x_ms_cleanup_work(chip);
528 528
529 retval = ms_switch_clock(chip); 529 retval = ms_switch_clock(chip);
530 if (retval != STATUS_SUCCESS) 530 if (retval != STATUS_SUCCESS)
@@ -541,13 +541,13 @@ int mg_set_ICV(struct scsi_cmnd *srb, struct rts51x_chip *chip)
541 if (retval != STATUS_SUCCESS) { 541 if (retval != STATUS_SUCCESS) {
542 if (ms_card->mg_auth == 0) { 542 if (ms_card->mg_auth == 0) {
543 if ((buf[5] & 0xC0) != 0) 543 if ((buf[5] & 0xC0) != 0)
544 set_sense_type(chip, lun, 544 rts51x_set_sense_type(chip, lun,
545 SENSE_TYPE_MG_KEY_FAIL_NOT_ESTAB); 545 SENSE_TYPE_MG_KEY_FAIL_NOT_ESTAB);
546 else 546 else
547 set_sense_type(chip, lun, 547 rts51x_set_sense_type(chip, lun,
548 SENSE_TYPE_MG_WRITE_ERR); 548 SENSE_TYPE_MG_WRITE_ERR);
549 } else { 549 } else {
550 set_sense_type(chip, lun, SENSE_TYPE_MG_WRITE_ERR); 550 rts51x_set_sense_type(chip, lun, SENSE_TYPE_MG_WRITE_ERR);
551 } 551 }
552 TRACE_GOTO(chip, SetICVFinish); 552 TRACE_GOTO(chip, SetICVFinish);
553 } 553 }
@@ -563,7 +563,7 @@ int mg_set_ICV(struct scsi_cmnd *srb, struct rts51x_chip *chip)
563 rts51x_add_cmd(chip, WRITE_REG_CMD, MS_TRANS_CFG, 0xFF, 563 rts51x_add_cmd(chip, WRITE_REG_CMD, MS_TRANS_CFG, 0xFF,
564 WAIT_INT); 564 WAIT_INT);
565 565
566 trans_dma_enable(DMA_TO_DEVICE, chip, 512, DMA_512); 566 rts51x_trans_dma_enable(DMA_TO_DEVICE, chip, 512, DMA_512);
567 567
568 rts51x_add_cmd(chip, WRITE_REG_CMD, MS_TRANSFER, 0xFF, 568 rts51x_add_cmd(chip, WRITE_REG_CMD, MS_TRANSFER, 0xFF,
569 MS_TRANSFER_START | MS_TM_NORMAL_WRITE); 569 MS_TRANSFER_START | MS_TM_NORMAL_WRITE);
@@ -572,7 +572,7 @@ int mg_set_ICV(struct scsi_cmnd *srb, struct rts51x_chip *chip)
572 572
573 retval = rts51x_send_cmd(chip, MODE_CDOR, 100); 573 retval = rts51x_send_cmd(chip, MODE_CDOR, 100);
574 if (retval != STATUS_SUCCESS) { 574 if (retval != STATUS_SUCCESS) {
575 set_sense_type(chip, lun, SENSE_TYPE_MG_WRITE_ERR); 575 rts51x_set_sense_type(chip, lun, SENSE_TYPE_MG_WRITE_ERR);
576 TRACE_GOTO(chip, SetICVFinish); 576 TRACE_GOTO(chip, SetICVFinish);
577 } 577 }
578 578
@@ -583,13 +583,13 @@ int mg_set_ICV(struct scsi_cmnd *srb, struct rts51x_chip *chip)
583 rts51x_clear_ms_error(chip); 583 rts51x_clear_ms_error(chip);
584 if (ms_card->mg_auth == 0) { 584 if (ms_card->mg_auth == 0) {
585 if ((buf[5] & 0xC0) != 0) 585 if ((buf[5] & 0xC0) != 0)
586 set_sense_type(chip, lun, 586 rts51x_set_sense_type(chip, lun,
587 SENSE_TYPE_MG_KEY_FAIL_NOT_ESTAB); 587 SENSE_TYPE_MG_KEY_FAIL_NOT_ESTAB);
588 else 588 else
589 set_sense_type(chip, lun, 589 rts51x_set_sense_type(chip, lun,
590 SENSE_TYPE_MG_WRITE_ERR); 590 SENSE_TYPE_MG_WRITE_ERR);
591 } else { 591 } else {
592 set_sense_type(chip, lun, 592 rts51x_set_sense_type(chip, lun,
593 SENSE_TYPE_MG_WRITE_ERR); 593 SENSE_TYPE_MG_WRITE_ERR);
594 } 594 }
595 retval = STATUS_FAIL; 595 retval = STATUS_FAIL;
@@ -602,13 +602,13 @@ int mg_set_ICV(struct scsi_cmnd *srb, struct rts51x_chip *chip)
602 rts51x_clear_ms_error(chip); 602 rts51x_clear_ms_error(chip);
603 if (ms_card->mg_auth == 0) { 603 if (ms_card->mg_auth == 0) {
604 if ((buf[5] & 0xC0) != 0) 604 if ((buf[5] & 0xC0) != 0)
605 set_sense_type(chip, lun, 605 rts51x_set_sense_type(chip, lun,
606 SENSE_TYPE_MG_KEY_FAIL_NOT_ESTAB); 606 SENSE_TYPE_MG_KEY_FAIL_NOT_ESTAB);
607 else 607 else
608 set_sense_type(chip, lun, 608 rts51x_set_sense_type(chip, lun,
609 SENSE_TYPE_MG_WRITE_ERR); 609 SENSE_TYPE_MG_WRITE_ERR);
610 } else { 610 } else {
611 set_sense_type(chip, lun, 611 rts51x_set_sense_type(chip, lun,
612 SENSE_TYPE_MG_WRITE_ERR); 612 SENSE_TYPE_MG_WRITE_ERR);
613 } 613 }
614 retval = STATUS_FAIL; 614 retval = STATUS_FAIL;
@@ -622,13 +622,13 @@ int mg_set_ICV(struct scsi_cmnd *srb, struct rts51x_chip *chip)
622 rts51x_clear_ms_error(chip); 622 rts51x_clear_ms_error(chip);
623 if (ms_card->mg_auth == 0) { 623 if (ms_card->mg_auth == 0) {
624 if ((buf[5] & 0xC0) != 0) 624 if ((buf[5] & 0xC0) != 0)
625 set_sense_type(chip, lun, 625 rts51x_set_sense_type(chip, lun,
626 SENSE_TYPE_MG_KEY_FAIL_NOT_ESTAB); 626 SENSE_TYPE_MG_KEY_FAIL_NOT_ESTAB);
627 else 627 else
628 set_sense_type(chip, lun, 628 rts51x_set_sense_type(chip, lun,
629 SENSE_TYPE_MG_WRITE_ERR); 629 SENSE_TYPE_MG_WRITE_ERR);
630 } else { 630 } else {
631 set_sense_type(chip, lun, SENSE_TYPE_MG_WRITE_ERR); 631 rts51x_set_sense_type(chip, lun, SENSE_TYPE_MG_WRITE_ERR);
632 } 632 }
633 TRACE_GOTO(chip, SetICVFinish); 633 TRACE_GOTO(chip, SetICVFinish);
634 } 634 }
diff --git a/drivers/staging/rts5139/ms_mg.h b/drivers/staging/rts5139/ms_mg.h
index e2ca55085f97..d15733a992ae 100644
--- a/drivers/staging/rts5139/ms_mg.h
+++ b/drivers/staging/rts5139/ms_mg.h
@@ -30,12 +30,12 @@
30#include "rts51x_chip.h" 30#include "rts51x_chip.h"
31#include "ms.h" 31#include "ms.h"
32 32
33int mg_set_leaf_id(struct scsi_cmnd *srb, struct rts51x_chip *chip); 33int rts51x_mg_set_leaf_id(struct scsi_cmnd *srb, struct rts51x_chip *chip);
34int mg_get_local_EKB(struct scsi_cmnd *srb, struct rts51x_chip *chip); 34int rts51x_mg_get_local_EKB(struct scsi_cmnd *srb, struct rts51x_chip *chip);
35int mg_chg(struct scsi_cmnd *srb, struct rts51x_chip *chip); 35int rts51x_mg_chg(struct scsi_cmnd *srb, struct rts51x_chip *chip);
36int mg_get_rsp_chg(struct scsi_cmnd *srb, struct rts51x_chip *chip); 36int rts51x_mg_get_rsp_chg(struct scsi_cmnd *srb, struct rts51x_chip *chip);
37int mg_rsp(struct scsi_cmnd *srb, struct rts51x_chip *chip); 37int rts51x_mg_rsp(struct scsi_cmnd *srb, struct rts51x_chip *chip);
38int mg_get_ICV(struct scsi_cmnd *srb, struct rts51x_chip *chip); 38int rts51x_mg_get_ICV(struct scsi_cmnd *srb, struct rts51x_chip *chip);
39int mg_set_ICV(struct scsi_cmnd *srb, struct rts51x_chip *chip); 39int rts51x_mg_set_ICV(struct scsi_cmnd *srb, struct rts51x_chip *chip);
40 40
41#endif /* __RTS51X_MS_MG_H */ 41#endif /* __RTS51X_MS_MG_H */
diff --git a/drivers/staging/rts5139/rts51x.c b/drivers/staging/rts5139/rts51x.c
index c3fe7dda1f4e..04213463123e 100644
--- a/drivers/staging/rts5139/rts51x.c
+++ b/drivers/staging/rts5139/rts51x.c
@@ -306,7 +306,7 @@ static int rts51x_control_thread(void *__chip)
306 306
307 /* we've got a command, let's do it! */ 307 /* we've got a command, let's do it! */
308 else { 308 else {
309 RTS51X_DEBUG(scsi_show_command(chip->srb)); 309 RTS51X_DEBUG(rts51x_scsi_show_command(chip->srb));
310 rts51x_invoke_transport(chip->srb, chip); 310 rts51x_invoke_transport(chip->srb, chip);
311 } 311 }
312 312
@@ -397,7 +397,7 @@ static int rts51x_polling_thread(void *__chip)
397 } 397 }
398#endif 398#endif
399 399
400 mspro_polling_format_status(chip); 400 rts51x_mspro_polling_format_status(chip);
401 401
402 /* lock the device pointers */ 402 /* lock the device pointers */
403 mutex_lock(&(chip->usb->dev_mutex)); 403 mutex_lock(&(chip->usb->dev_mutex));
@@ -478,7 +478,7 @@ static void rts51x_init_options(struct rts51x_chip *chip)
478{ 478{
479 struct rts51x_option *option = &(chip->option); 479 struct rts51x_option *option = &(chip->option);
480 480
481 option->mspro_formatter_enable = 1; 481 option->rts51x_mspro_formatter_enable = 1;
482 482
483 option->fpga_sd_sdr104_clk = CLK_100; 483 option->fpga_sd_sdr104_clk = CLK_100;
484 option->fpga_sd_sdr50_clk = CLK_100; 484 option->fpga_sd_sdr50_clk = CLK_100;
@@ -510,7 +510,7 @@ static void rts51x_init_options(struct rts51x_chip *chip)
510 510
511 option->FT2_fast_mode = 0; 511 option->FT2_fast_mode = 0;
512 option->pwr_delay = 800; 512 option->pwr_delay = 800;
513 option->xd_rw_step = 0; 513 option->rts51x_xd_rw_step = 0;
514 option->D3318_off_delay = 50; 514 option->D3318_off_delay = 50;
515 option->delink_delay = 100; 515 option->delink_delay = 100;
516 option->rts5129_D3318_off_enable = 0; 516 option->rts5129_D3318_off_enable = 0;
@@ -518,7 +518,7 @@ static void rts51x_init_options(struct rts51x_chip *chip)
518 option->reset_or_rw_fail_set_pad_drive = 1; 518 option->reset_or_rw_fail_set_pad_drive = 1;
519 option->debounce_num = 2; 519 option->debounce_num = 2;
520 option->led_toggle_interval = 6; 520 option->led_toggle_interval = 6;
521 option->xd_rwn_step = 0; 521 option->rts51x_xd_rwn_step = 0;
522 option->sd_send_status_en = 0; 522 option->sd_send_status_en = 0;
523 option->sdr50_tx_phase = 0x01; 523 option->sdr50_tx_phase = 0x01;
524 option->sdr50_rx_phase = 0x05; 524 option->sdr50_rx_phase = 0x05;
diff --git a/drivers/staging/rts5139/rts51x_card.c b/drivers/staging/rts5139/rts51x_card.c
index 50be42ac592b..509d83e623a5 100644
--- a/drivers/staging/rts5139/rts51x_card.c
+++ b/drivers/staging/rts5139/rts51x_card.c
@@ -41,7 +41,7 @@
41#include "sd.h" 41#include "sd.h"
42#include "ms.h" 42#include "ms.h"
43 43
44void do_remaining_work(struct rts51x_chip *chip) 44void rts51x_do_remaining_work(struct rts51x_chip *chip)
45{ 45{
46 struct sd_info *sd_card = &(chip->sd_card); 46 struct sd_info *sd_card = &(chip->sd_card);
47 struct xd_info *xd_card = &(chip->xd_card); 47 struct xd_info *xd_card = &(chip->xd_card);
@@ -84,27 +84,27 @@ void do_remaining_work(struct rts51x_chip *chip)
84 } 84 }
85 85
86 if (sd_card->counter > POLLING_WAIT_CNT) 86 if (sd_card->counter > POLLING_WAIT_CNT)
87 sd_cleanup_work(chip); 87 rts51x_sd_cleanup_work(chip);
88 88
89 if (xd_card->counter > POLLING_WAIT_CNT) 89 if (xd_card->counter > POLLING_WAIT_CNT)
90 xd_cleanup_work(chip); 90 rts51x_xd_cleanup_work(chip);
91 91
92 if (ms_card->counter > POLLING_WAIT_CNT) 92 if (ms_card->counter > POLLING_WAIT_CNT)
93 ms_cleanup_work(chip); 93 rts51x_ms_cleanup_work(chip);
94} 94}
95 95
96static void do_reset_xd_card(struct rts51x_chip *chip) 96static void do_rts51x_reset_xd_card(struct rts51x_chip *chip)
97{ 97{
98 int retval; 98 int retval;
99 99
100 if (chip->card2lun[XD_CARD] >= MAX_ALLOWED_LUN_CNT) 100 if (chip->card2lun[XD_CARD] >= MAX_ALLOWED_LUN_CNT)
101 return; 101 return;
102 102
103 retval = reset_xd_card(chip); 103 retval = rts51x_reset_xd_card(chip);
104 if (retval == STATUS_SUCCESS) { 104 if (retval == STATUS_SUCCESS) {
105 chip->card_ready |= XD_CARD; 105 chip->card_ready |= XD_CARD;
106 chip->card_fail &= ~XD_CARD; 106 chip->card_fail &= ~XD_CARD;
107 chip->rw_card[chip->card2lun[XD_CARD]] = xd_rw; 107 chip->rw_card[chip->card2lun[XD_CARD]] = rts51x_xd_rw;
108 } else { 108 } else {
109 chip->card_ready &= ~XD_CARD; 109 chip->card_ready &= ~XD_CARD;
110 chip->card_fail |= XD_CARD; 110 chip->card_fail |= XD_CARD;
@@ -120,18 +120,18 @@ static void do_reset_xd_card(struct rts51x_chip *chip)
120 } 120 }
121} 121}
122 122
123void do_reset_sd_card(struct rts51x_chip *chip) 123void rts51x_do_rts51x_reset_sd_card(struct rts51x_chip *chip)
124{ 124{
125 int retval; 125 int retval;
126 126
127 if (chip->card2lun[SD_CARD] >= MAX_ALLOWED_LUN_CNT) 127 if (chip->card2lun[SD_CARD] >= MAX_ALLOWED_LUN_CNT)
128 return; 128 return;
129 129
130 retval = reset_sd_card(chip); 130 retval = rts51x_reset_sd_card(chip);
131 if (retval == STATUS_SUCCESS) { 131 if (retval == STATUS_SUCCESS) {
132 chip->card_ready |= SD_CARD; 132 chip->card_ready |= SD_CARD;
133 chip->card_fail &= ~SD_CARD; 133 chip->card_fail &= ~SD_CARD;
134 chip->rw_card[chip->card2lun[SD_CARD]] = sd_rw; 134 chip->rw_card[chip->card2lun[SD_CARD]] = rts51x_sd_rw;
135 } else { 135 } else {
136 chip->card_ready &= ~SD_CARD; 136 chip->card_ready &= ~SD_CARD;
137 chip->card_fail |= SD_CARD; 137 chip->card_fail |= SD_CARD;
@@ -147,18 +147,18 @@ void do_reset_sd_card(struct rts51x_chip *chip)
147 } 147 }
148} 148}
149 149
150static void do_reset_ms_card(struct rts51x_chip *chip) 150static void do_rts51x_reset_ms_card(struct rts51x_chip *chip)
151{ 151{
152 int retval; 152 int retval;
153 153
154 if (chip->card2lun[MS_CARD] >= MAX_ALLOWED_LUN_CNT) 154 if (chip->card2lun[MS_CARD] >= MAX_ALLOWED_LUN_CNT)
155 return; 155 return;
156 156
157 retval = reset_ms_card(chip); 157 retval = rts51x_reset_ms_card(chip);
158 if (retval == STATUS_SUCCESS) { 158 if (retval == STATUS_SUCCESS) {
159 chip->card_ready |= MS_CARD; 159 chip->card_ready |= MS_CARD;
160 chip->card_fail &= ~MS_CARD; 160 chip->card_fail &= ~MS_CARD;
161 chip->rw_card[chip->card2lun[MS_CARD]] = ms_rw; 161 chip->rw_card[chip->card2lun[MS_CARD]] = rts51x_ms_rw;
162 } else { 162 } else {
163 chip->card_ready &= ~MS_CARD; 163 chip->card_ready &= ~MS_CARD;
164 chip->card_fail |= MS_CARD; 164 chip->card_fail |= MS_CARD;
@@ -301,7 +301,7 @@ void rts51x_init_cards(struct rts51x_chip *chip)
301 chip->card_exist &= ~XD_CARD; 301 chip->card_exist &= ~XD_CARD;
302 chip->card_ejected = 0; 302 chip->card_ejected = 0;
303 if (chip->card_ready & XD_CARD) { 303 if (chip->card_ready & XD_CARD) {
304 release_xd_card(chip); 304 rts51x_release_xd_card(chip);
305 chip->rw_card[chip->card2lun[XD_CARD]] = NULL; 305 chip->rw_card[chip->card2lun[XD_CARD]] = NULL;
306 clear_bit(chip->card2lun[XD_CARD], 306 clear_bit(chip->card2lun[XD_CARD],
307 &(chip->lun_mc)); 307 &(chip->lun_mc));
@@ -312,7 +312,7 @@ void rts51x_init_cards(struct rts51x_chip *chip)
312 chip->card_exist &= ~SD_CARD; 312 chip->card_exist &= ~SD_CARD;
313 chip->card_ejected = 0; 313 chip->card_ejected = 0;
314 if (chip->card_ready & SD_CARD) { 314 if (chip->card_ready & SD_CARD) {
315 release_sd_card(chip); 315 rts51x_release_sd_card(chip);
316 chip->rw_card[chip->card2lun[SD_CARD]] = NULL; 316 chip->rw_card[chip->card2lun[SD_CARD]] = NULL;
317 clear_bit(chip->card2lun[SD_CARD], 317 clear_bit(chip->card2lun[SD_CARD],
318 &(chip->lun_mc)); 318 &(chip->lun_mc));
@@ -323,7 +323,7 @@ void rts51x_init_cards(struct rts51x_chip *chip)
323 chip->card_exist &= ~MS_CARD; 323 chip->card_exist &= ~MS_CARD;
324 chip->card_ejected = 0; 324 chip->card_ejected = 0;
325 if (chip->card_ready & MS_CARD) { 325 if (chip->card_ready & MS_CARD) {
326 release_ms_card(chip); 326 rts51x_release_ms_card(chip);
327 chip->rw_card[chip->card2lun[MS_CARD]] = NULL; 327 chip->rw_card[chip->card2lun[MS_CARD]] = NULL;
328 clear_bit(chip->card2lun[MS_CARD], 328 clear_bit(chip->card2lun[MS_CARD],
329 &(chip->lun_mc)); 329 &(chip->lun_mc));
@@ -339,13 +339,13 @@ void rts51x_init_cards(struct rts51x_chip *chip)
339 339
340 if (need_reset & XD_CARD) { 340 if (need_reset & XD_CARD) {
341 chip->card_exist |= XD_CARD; 341 chip->card_exist |= XD_CARD;
342 do_reset_xd_card(chip); 342 do_rts51x_reset_xd_card(chip);
343 } else if (need_reset & SD_CARD) { 343 } else if (need_reset & SD_CARD) {
344 chip->card_exist |= SD_CARD; 344 chip->card_exist |= SD_CARD;
345 do_reset_sd_card(chip); 345 rts51x_do_rts51x_reset_sd_card(chip);
346 } else if (need_reset & MS_CARD) { 346 } else if (need_reset & MS_CARD) {
347 chip->card_exist |= MS_CARD; 347 chip->card_exist |= MS_CARD;
348 do_reset_ms_card(chip); 348 do_rts51x_reset_ms_card(chip);
349 } 349 }
350 } 350 }
351} 351}
@@ -353,20 +353,20 @@ void rts51x_init_cards(struct rts51x_chip *chip)
353void rts51x_release_cards(struct rts51x_chip *chip) 353void rts51x_release_cards(struct rts51x_chip *chip)
354{ 354{
355 if (chip->card_ready & SD_CARD) { 355 if (chip->card_ready & SD_CARD) {
356 sd_cleanup_work(chip); 356 rts51x_sd_cleanup_work(chip);
357 release_sd_card(chip); 357 rts51x_release_sd_card(chip);
358 chip->card_ready &= ~SD_CARD; 358 chip->card_ready &= ~SD_CARD;
359 } 359 }
360 360
361 if (chip->card_ready & XD_CARD) { 361 if (chip->card_ready & XD_CARD) {
362 xd_cleanup_work(chip); 362 rts51x_xd_cleanup_work(chip);
363 release_xd_card(chip); 363 rts51x_release_xd_card(chip);
364 chip->card_ready &= ~XD_CARD; 364 chip->card_ready &= ~XD_CARD;
365 } 365 }
366 366
367 if (chip->card_ready & MS_CARD) { 367 if (chip->card_ready & MS_CARD) {
368 ms_cleanup_work(chip); 368 rts51x_ms_cleanup_work(chip);
369 release_ms_card(chip); 369 rts51x_release_ms_card(chip);
370 chip->card_ready &= ~MS_CARD; 370 chip->card_ready &= ~MS_CARD;
371 } 371 }
372} 372}
@@ -376,7 +376,7 @@ static inline u8 double_depth(u8 depth)
376 return ((depth > 1) ? (depth - 1) : depth); 376 return ((depth > 1) ? (depth - 1) : depth);
377} 377}
378 378
379int switch_ssc_clock(struct rts51x_chip *chip, int clk) 379int rts51x_switch_ssc_clock(struct rts51x_chip *chip, int clk)
380{ 380{
381 struct sd_info *sd_card = &(chip->sd_card); 381 struct sd_info *sd_card = &(chip->sd_card);
382 struct ms_info *ms_card = &(chip->ms_card); 382 struct ms_info *ms_card = &(chip->ms_card);
@@ -513,7 +513,7 @@ int switch_ssc_clock(struct rts51x_chip *chip, int clk)
513 return STATUS_SUCCESS; 513 return STATUS_SUCCESS;
514} 514}
515 515
516int switch_normal_clock(struct rts51x_chip *chip, int clk) 516int rts51x_switch_normal_clock(struct rts51x_chip *chip, int clk)
517{ 517{
518 int retval; 518 int retval;
519 u8 sel, div, mcu_cnt; 519 u8 sel, div, mcu_cnt;
@@ -653,7 +653,7 @@ int switch_normal_clock(struct rts51x_chip *chip, int clk)
653 return STATUS_SUCCESS; 653 return STATUS_SUCCESS;
654} 654}
655 655
656int card_rw(struct scsi_cmnd *srb, struct rts51x_chip *chip, u32 sec_addr, 656int rts51x_card_rw(struct scsi_cmnd *srb, struct rts51x_chip *chip, u32 sec_addr,
657 u16 sec_cnt) 657 u16 sec_cnt)
658{ 658{
659 int retval; 659 int retval;
@@ -688,7 +688,7 @@ int card_rw(struct scsi_cmnd *srb, struct rts51x_chip *chip, u32 sec_addr,
688 return retval; 688 return retval;
689} 689}
690 690
691u8 get_lun_card(struct rts51x_chip *chip, unsigned int lun) 691u8 rts51x_get_lun_card(struct rts51x_chip *chip, unsigned int lun)
692{ 692{
693 if ((chip->card_ready & chip->lun2card[lun]) == XD_CARD) 693 if ((chip->card_ready & chip->lun2card[lun]) == XD_CARD)
694 return (u8) XD_CARD; 694 return (u8) XD_CARD;
@@ -744,24 +744,24 @@ int rts51x_select_card(struct rts51x_chip *chip, int card)
744 return STATUS_SUCCESS; 744 return STATUS_SUCCESS;
745} 745}
746 746
747void eject_card(struct rts51x_chip *chip, unsigned int lun) 747void rts51x_eject_card(struct rts51x_chip *chip, unsigned int lun)
748{ 748{
749 RTS51X_DEBUGP("eject card\n"); 749 RTS51X_DEBUGP("eject card\n");
750 RTS51X_SET_STAT(chip, STAT_RUN); 750 RTS51X_SET_STAT(chip, STAT_RUN);
751 do_remaining_work(chip); 751 rts51x_do_remaining_work(chip);
752 752
753 if ((chip->card_ready & chip->lun2card[lun]) == SD_CARD) { 753 if ((chip->card_ready & chip->lun2card[lun]) == SD_CARD) {
754 release_sd_card(chip); 754 rts51x_release_sd_card(chip);
755 chip->card_ejected |= SD_CARD; 755 chip->card_ejected |= SD_CARD;
756 chip->card_ready &= ~SD_CARD; 756 chip->card_ready &= ~SD_CARD;
757 chip->capacity[lun] = 0; 757 chip->capacity[lun] = 0;
758 } else if ((chip->card_ready & chip->lun2card[lun]) == XD_CARD) { 758 } else if ((chip->card_ready & chip->lun2card[lun]) == XD_CARD) {
759 release_xd_card(chip); 759 rts51x_release_xd_card(chip);
760 chip->card_ejected |= XD_CARD; 760 chip->card_ejected |= XD_CARD;
761 chip->card_ready &= ~XD_CARD; 761 chip->card_ready &= ~XD_CARD;
762 chip->capacity[lun] = 0; 762 chip->capacity[lun] = 0;
763 } else if ((chip->card_ready & chip->lun2card[lun]) == MS_CARD) { 763 } else if ((chip->card_ready & chip->lun2card[lun]) == MS_CARD) {
764 release_ms_card(chip); 764 rts51x_release_ms_card(chip);
765 chip->card_ejected |= MS_CARD; 765 chip->card_ejected |= MS_CARD;
766 chip->card_ready &= ~MS_CARD; 766 chip->card_ready &= ~MS_CARD;
767 chip->capacity[lun] = 0; 767 chip->capacity[lun] = 0;
@@ -770,7 +770,7 @@ void eject_card(struct rts51x_chip *chip, unsigned int lun)
770 XD_INT | MS_INT | SD_INT); 770 XD_INT | MS_INT | SD_INT);
771} 771}
772 772
773void trans_dma_enable(enum dma_data_direction dir, struct rts51x_chip *chip, 773void rts51x_trans_dma_enable(enum dma_data_direction dir, struct rts51x_chip *chip,
774 u32 byte_cnt, u8 pack_size) 774 u32 byte_cnt, u8 pack_size)
775{ 775{
776 if (pack_size > DMA_1024) 776 if (pack_size > DMA_1024)
@@ -798,7 +798,7 @@ void trans_dma_enable(enum dma_data_direction dir, struct rts51x_chip *chip,
798 } 798 }
799} 799}
800 800
801int enable_card_clock(struct rts51x_chip *chip, u8 card) 801int rts51x_enable_card_clock(struct rts51x_chip *chip, u8 card)
802{ 802{
803 u8 clk_en = 0; 803 u8 clk_en = 0;
804 804
@@ -814,7 +814,7 @@ int enable_card_clock(struct rts51x_chip *chip, u8 card)
814 return STATUS_SUCCESS; 814 return STATUS_SUCCESS;
815} 815}
816 816
817int card_power_on(struct rts51x_chip *chip, u8 card) 817int rts51x_card_power_on(struct rts51x_chip *chip, u8 card)
818{ 818{
819 u8 mask, val1, val2; 819 u8 mask, val1, val2;
820 820
@@ -863,7 +863,7 @@ int monitor_card_cd(struct rts51x_chip *chip, u8 card)
863 return CD_NOT_EXIST; 863 return CD_NOT_EXIST;
864} 864}
865 865
866int toggle_gpio(struct rts51x_chip *chip, u8 gpio) 866int rts51x_toggle_gpio(struct rts51x_chip *chip, u8 gpio)
867{ 867{
868 int retval; 868 int retval;
869 u8 temp_reg; 869 u8 temp_reg;
@@ -898,7 +898,7 @@ int toggle_gpio(struct rts51x_chip *chip, u8 gpio)
898 return STATUS_SUCCESS; 898 return STATUS_SUCCESS;
899} 899}
900 900
901int turn_on_led(struct rts51x_chip *chip, u8 gpio) 901int rts51x_turn_on_led(struct rts51x_chip *chip, u8 gpio)
902{ 902{
903 int retval; 903 int retval;
904 u8 gpio_oe[4] = { 904 u8 gpio_oe[4] = {
@@ -917,7 +917,7 @@ int turn_on_led(struct rts51x_chip *chip, u8 gpio)
917 return STATUS_SUCCESS; 917 return STATUS_SUCCESS;
918} 918}
919 919
920int turn_off_led(struct rts51x_chip *chip, u8 gpio) 920int rts51x_turn_off_led(struct rts51x_chip *chip, u8 gpio)
921{ 921{
922 int retval; 922 int retval;
923 u8 gpio_output[4] = { 923 u8 gpio_output[4] = {
diff --git a/drivers/staging/rts5139/rts51x_card.h b/drivers/staging/rts5139/rts51x_card.h
index c5c03cce98bd..e62b25c31413 100644
--- a/drivers/staging/rts5139/rts51x_card.h
+++ b/drivers/staging/rts5139/rts51x_card.h
@@ -737,24 +737,24 @@
737 737
738int monitor_card_cd(struct rts51x_chip *chip, u8 card); 738int monitor_card_cd(struct rts51x_chip *chip, u8 card);
739 739
740void do_remaining_work(struct rts51x_chip *chip); 740void rts51x_do_remaining_work(struct rts51x_chip *chip);
741void do_reset_sd_card(struct rts51x_chip *chip); 741void rts51x_do_rts51x_reset_sd_card(struct rts51x_chip *chip);
742void rts51x_init_cards(struct rts51x_chip *chip); 742void rts51x_init_cards(struct rts51x_chip *chip);
743void rts51x_release_cards(struct rts51x_chip *chip); 743void rts51x_release_cards(struct rts51x_chip *chip);
744int switch_ssc_clock(struct rts51x_chip *chip, int clk); 744int rts51x_switch_ssc_clock(struct rts51x_chip *chip, int clk);
745int switch_normal_clock(struct rts51x_chip *chip, int clk); 745int rts51x_switch_normal_clock(struct rts51x_chip *chip, int clk);
746int card_rw(struct scsi_cmnd *srb, struct rts51x_chip *chip, u32 sec_addr, 746int rts51x_card_rw(struct scsi_cmnd *srb, struct rts51x_chip *chip, u32 sec_addr,
747 u16 sec_cnt); 747 u16 sec_cnt);
748u8 get_lun_card(struct rts51x_chip *chip, unsigned int lun); 748u8 rts51x_get_lun_card(struct rts51x_chip *chip, unsigned int lun);
749int rts51x_select_card(struct rts51x_chip *chip, int card); 749int rts51x_select_card(struct rts51x_chip *chip, int card);
750void eject_card(struct rts51x_chip *chip, unsigned int lun); 750void rts51x_eject_card(struct rts51x_chip *chip, unsigned int lun);
751void trans_dma_enable(enum dma_data_direction dir, struct rts51x_chip *chip, 751void rts51x_trans_dma_enable(enum dma_data_direction dir, struct rts51x_chip *chip,
752 u32 byte_cnt, u8 pack_size); 752 u32 byte_cnt, u8 pack_size);
753int enable_card_clock(struct rts51x_chip *chip, u8 card); 753int rts51x_enable_card_clock(struct rts51x_chip *chip, u8 card);
754int card_power_on(struct rts51x_chip *chip, u8 card); 754int rts51x_card_power_on(struct rts51x_chip *chip, u8 card);
755int toggle_gpio(struct rts51x_chip *chip, u8 gpio); 755int rts51x_toggle_gpio(struct rts51x_chip *chip, u8 gpio);
756int turn_on_led(struct rts51x_chip *chip, u8 gpio); 756int rts51x_turn_on_led(struct rts51x_chip *chip, u8 gpio);
757int turn_off_led(struct rts51x_chip *chip, u8 gpio); 757int rts51x_turn_off_led(struct rts51x_chip *chip, u8 gpio);
758 758
759static inline int check_card_ready(struct rts51x_chip *chip, unsigned int lun) 759static inline int check_card_ready(struct rts51x_chip *chip, unsigned int lun)
760{ 760{
@@ -830,9 +830,9 @@ static inline int switch_clock(struct rts51x_chip *chip, int clk)
830 int retval = 0; 830 int retval = 0;
831 831
832 if (chip->asic_code) 832 if (chip->asic_code)
833 retval = switch_ssc_clock(chip, clk); 833 retval = rts51x_switch_ssc_clock(chip, clk);
834 else 834 else
835 retval = switch_normal_clock(chip, clk); 835 retval = rts51x_switch_normal_clock(chip, clk);
836 836
837 return retval; 837 return retval;
838} 838}
diff --git a/drivers/staging/rts5139/rts51x_chip.c b/drivers/staging/rts5139/rts51x_chip.c
index 08dcae8db63e..7d7510de170c 100644
--- a/drivers/staging/rts5139/rts51x_chip.c
+++ b/drivers/staging/rts5139/rts51x_chip.c
@@ -132,7 +132,7 @@ int rts51x_reset_chip(struct rts51x_chip *chip)
132 } 132 }
133#endif 133#endif
134 if (chip->option.FT2_fast_mode) { 134 if (chip->option.FT2_fast_mode) {
135 card_power_on(chip, SD_CARD | MS_CARD | XD_CARD); 135 rts51x_card_power_on(chip, SD_CARD | MS_CARD | XD_CARD);
136 wait_timeout(10); 136 wait_timeout(10);
137 } 137 }
138 138
@@ -212,8 +212,8 @@ int rts51x_init_chip(struct rts51x_chip *chip)
212 212
213int rts51x_release_chip(struct rts51x_chip *chip) 213int rts51x_release_chip(struct rts51x_chip *chip)
214{ 214{
215 xd_free_l2p_tbl(chip); 215 rts51x_xd_free_l2p_tbl(chip);
216 ms_free_l2p_tbl(chip); 216 rts51x_ms_free_l2p_tbl(chip);
217 chip->card_ready = 0; 217 chip->card_ready = 0;
218 return STATUS_SUCCESS; 218 return STATUS_SUCCESS;
219} 219}
@@ -227,7 +227,7 @@ static inline void rts51x_blink_led(struct rts51x_chip *chip)
227 chip->led_toggle_counter++; 227 chip->led_toggle_counter++;
228 } else { 228 } else {
229 chip->led_toggle_counter = 0; 229 chip->led_toggle_counter = 0;
230 toggle_gpio(chip, LED_GPIO); 230 rts51x_toggle_gpio(chip, LED_GPIO);
231 } 231 }
232 } 232 }
233} 233}
@@ -325,14 +325,14 @@ void rts51x_polling_func(struct rts51x_chip *chip)
325 && (chip->card_exist & 325 && (chip->card_exist &
326 (SD_CARD | MS_CARD | XD_CARD)) 326 (SD_CARD | MS_CARD | XD_CARD))
327 && (!chip->card_ejected)) { 327 && (!chip->card_ejected)) {
328 turn_on_led(chip, LED_GPIO); 328 rts51x_turn_on_led(chip, LED_GPIO);
329 } else { 329 } else {
330 if (chip->rts5179) { 330 if (chip->rts5179) {
331 rts51x_ep0_write_register(chip, 331 rts51x_ep0_write_register(chip,
332 CARD_GPIO, 332 CARD_GPIO,
333 0x03, 0x00); 333 0x03, 0x00);
334 } else { 334 } else {
335 turn_off_led(chip, LED_GPIO); 335 rts51x_turn_off_led(chip, LED_GPIO);
336 } 336 }
337 337
338 } 338 }
@@ -353,7 +353,7 @@ void rts51x_polling_func(struct rts51x_chip *chip)
353 switch (RTS51X_GET_STAT(chip)) { 353 switch (RTS51X_GET_STAT(chip)) {
354 case STAT_RUN: 354 case STAT_RUN:
355 rts51x_blink_led(chip); 355 rts51x_blink_led(chip);
356 do_remaining_work(chip); 356 rts51x_do_remaining_work(chip);
357 break; 357 break;
358 358
359 case STAT_IDLE: 359 case STAT_IDLE:
@@ -707,7 +707,7 @@ void rts51x_do_before_power_down(struct rts51x_chip *chip)
707 if (chip->rts5179) 707 if (chip->rts5179)
708 rts51x_ep0_write_register(chip, CARD_GPIO, 0x03, 0x00); 708 rts51x_ep0_write_register(chip, CARD_GPIO, 0x03, 0x00);
709 else 709 else
710 turn_off_led(chip, LED_GPIO); 710 rts51x_turn_off_led(chip, LED_GPIO);
711 711
712 chip->cur_clk = 0; 712 chip->cur_clk = 0;
713 chip->card_exist = 0; 713 chip->card_exist = 0;
@@ -797,7 +797,7 @@ void rts51x_pp_status(struct rts51x_chip *chip, unsigned int lun, u8 *status,
797{ 797{
798 struct sd_info *sd_card = &(chip->sd_card); 798 struct sd_info *sd_card = &(chip->sd_card);
799 struct ms_info *ms_card = &(chip->ms_card); 799 struct ms_info *ms_card = &(chip->ms_card);
800 u8 card = get_lun_card(chip, lun); 800 u8 card = rts51x_get_lun_card(chip, lun);
801#ifdef SUPPORT_OC 801#ifdef SUPPORT_OC
802 u8 oc_now_mask = 0, oc_ever_mask = 0; 802 u8 oc_now_mask = 0, oc_ever_mask = 0;
803#endif 803#endif
@@ -958,9 +958,9 @@ void rts51x_read_status(struct rts51x_chip *chip, unsigned int lun,
958 rts51x_status[12] = 0; 958 rts51x_status[12] = 0;
959 959
960 /* Detailed Type */ 960 /* Detailed Type */
961 if (get_lun_card(chip, lun) == XD_CARD) { 961 if (rts51x_get_lun_card(chip, lun) == XD_CARD) {
962 rts51x_status[13] = 0x40; 962 rts51x_status[13] = 0x40;
963 } else if (get_lun_card(chip, lun) == SD_CARD) { 963 } else if (rts51x_get_lun_card(chip, lun) == SD_CARD) {
964 struct sd_info *sd_card = &(chip->sd_card); 964 struct sd_info *sd_card = &(chip->sd_card);
965 965
966 rts51x_status[13] = 0x20; 966 rts51x_status[13] = 0x20;
@@ -976,7 +976,7 @@ void rts51x_read_status(struct rts51x_chip *chip, unsigned int lun,
976 if (CHK_MMC_SECTOR_MODE(sd_card)) 976 if (CHK_MMC_SECTOR_MODE(sd_card))
977 rts51x_status[13] |= 0x04; /* Hi capacity */ 977 rts51x_status[13] |= 0x04; /* Hi capacity */
978 } 978 }
979 } else if (get_lun_card(chip, lun) == MS_CARD) { 979 } else if (rts51x_get_lun_card(chip, lun) == MS_CARD) {
980 struct ms_info *ms_card = &(chip->ms_card); 980 struct ms_info *ms_card = &(chip->ms_card);
981 981
982 if (CHK_MSPRO(ms_card)) { 982 if (CHK_MSPRO(ms_card)) {
diff --git a/drivers/staging/rts5139/rts51x_chip.h b/drivers/staging/rts5139/rts51x_chip.h
index 64257caf2f30..12deb24cfbbe 100644
--- a/drivers/staging/rts5139/rts51x_chip.h
+++ b/drivers/staging/rts5139/rts51x_chip.h
@@ -253,7 +253,7 @@ struct sense_data_t {
253#define SUPPORT_UHS50_MMC44 0x40 253#define SUPPORT_UHS50_MMC44 0x40
254 254
255struct rts51x_option { 255struct rts51x_option {
256 int mspro_formatter_enable; 256 int rts51x_mspro_formatter_enable;
257 257
258 /* card clock expected by user for fpga platform */ 258 /* card clock expected by user for fpga platform */
259 int fpga_sd_sdr104_clk; 259 int fpga_sd_sdr104_clk;
@@ -308,7 +308,7 @@ struct rts51x_option {
308 * add for config delay between 1/4 PMOS and 3/4 PMOS */ 308 * add for config delay between 1/4 PMOS and 3/4 PMOS */
309 int pwr_delay; 309 int pwr_delay;
310 310
311 int xd_rw_step; /* add to tune xd tRP */ 311 int rts51x_xd_rw_step; /* add to tune xd tRP */
312 int D3318_off_delay; /* add to tune D3318 off delay time */ 312 int D3318_off_delay; /* add to tune D3318 off delay time */
313 int delink_delay; /* add to tune delink delay time */ 313 int delink_delay; /* add to tune delink delay time */
314 /* add for rts5129 to enable/disable D3318 off */ 314 /* add for rts5129 to enable/disable D3318 off */
@@ -320,7 +320,7 @@ struct rts51x_option {
320 320
321 u8 debounce_num; /* debounce number */ 321 u8 debounce_num; /* debounce number */
322 u8 led_toggle_interval; /* used to control led toggle speed */ 322 u8 led_toggle_interval; /* used to control led toggle speed */
323 int xd_rwn_step; 323 int rts51x_xd_rwn_step;
324 u8 sd_send_status_en; 324 u8 sd_send_status_en;
325 /* used to store default phase which is 325 /* used to store default phase which is
326 * used when phase tune all pass. */ 326 * used when phase tune all pass. */
@@ -337,11 +337,11 @@ struct rts51x_option {
337 u8 dv18_voltage; /* add to tune dv18 voltage */ 337 u8 dv18_voltage; /* add to tune dv18 voltage */
338}; 338};
339 339
340#define MS_FORMATTER_ENABLED(chip) ((chip)->option.mspro_formatter_enable) 340#define MS_FORMATTER_ENABLED(chip) ((chip)->option.rts51x_mspro_formatter_enable)
341 341
342struct rts51x_chip; 342struct rts51x_chip;
343 343
344typedef int (*card_rw_func) (struct scsi_cmnd *srb, struct rts51x_chip *chip, 344typedef int (*rts51x_card_rw_func) (struct scsi_cmnd *srb, struct rts51x_chip *chip,
345 u32 sec_addr, u16 sec_cnt); 345 u32 sec_addr, u16 sec_cnt);
346 346
347/* For MS Card */ 347/* For MS Card */
@@ -564,7 +564,7 @@ struct sd_info {
564#define CHK_MS8BIT(ms_card) (((ms_card)->ms_type & MS_8BIT)) 564#define CHK_MS8BIT(ms_card) (((ms_card)->ms_type & MS_8BIT))
565#define CHK_MS4BIT(ms_card) (((ms_card)->ms_type & MS_4BIT)) 565#define CHK_MS4BIT(ms_card) (((ms_card)->ms_type & MS_4BIT))
566 566
567struct ms_delay_write_tag { 567struct rts51x_ms_delay_write_tag {
568 u16 old_phyblock; 568 u16 old_phyblock;
569 u16 new_phyblock; 569 u16 new_phyblock;
570 u16 logblock; 570 u16 logblock;
@@ -605,7 +605,7 @@ struct ms_info {
605 u32 total_sec_cnt; 605 u32 total_sec_cnt;
606 u8 last_rw_int; 606 u8 last_rw_int;
607 607
608 struct ms_delay_write_tag delay_write; 608 struct rts51x_ms_delay_write_tag delay_write;
609 609
610 int counter; 610 int counter;
611 611
@@ -671,7 +671,7 @@ struct rts51x_chip {
671 u32 capacity[MAX_ALLOWED_LUN_CNT]; 671 u32 capacity[MAX_ALLOWED_LUN_CNT];
672 672
673 /* read/write card function pointer */ 673 /* read/write card function pointer */
674 card_rw_func rw_card[MAX_ALLOWED_LUN_CNT]; 674 rts51x_card_rw_func rw_card[MAX_ALLOWED_LUN_CNT];
675 /* read/write capacity, used for GPIO Toggle */ 675 /* read/write capacity, used for GPIO Toggle */
676 u32 rw_cap[MAX_ALLOWED_LUN_CNT]; 676 u32 rw_cap[MAX_ALLOWED_LUN_CNT];
677 /* card to lun mapping table */ 677 /* card to lun mapping table */
diff --git a/drivers/staging/rts5139/rts51x_fop.c b/drivers/staging/rts5139/rts51x_fop.c
index bf1a9e64e874..dee7d8af564e 100644
--- a/drivers/staging/rts5139/rts51x_fop.c
+++ b/drivers/staging/rts5139/rts51x_fop.c
@@ -70,7 +70,7 @@ static int rts51x_sd_direct_cmnd(struct rts51x_chip *chip,
70 switch (dir) { 70 switch (dir) {
71 case 0: 71 case 0:
72 /* No data */ 72 /* No data */
73 retval = ext_sd_execute_no_data(chip, chip->card2lun[SD_CARD], 73 retval = ext_rts51x_sd_execute_no_data(chip, chip->card2lun[SD_CARD],
74 cmd_idx, standby, acmd, 74 cmd_idx, standby, acmd,
75 rsp_code, arg); 75 rsp_code, arg);
76 if (retval != TRANSPORT_GOOD) 76 if (retval != TRANSPORT_GOOD)
@@ -83,7 +83,7 @@ static int rts51x_sd_direct_cmnd(struct rts51x_chip *chip,
83 if (!buf) 83 if (!buf)
84 TRACE_RET(chip, STATUS_NOMEM); 84 TRACE_RET(chip, STATUS_NOMEM);
85 85
86 retval = ext_sd_execute_read_data(chip, chip->card2lun[SD_CARD], 86 retval = ext_rts51x_sd_execute_read_data(chip, chip->card2lun[SD_CARD],
87 cmd_idx, cmd12, standby, acmd, 87 cmd_idx, cmd12, standby, acmd,
88 rsp_code, arg, len, buf, 88 rsp_code, arg, len, buf,
89 cmnd->buf_len, 0); 89 cmnd->buf_len, 0);
@@ -117,7 +117,7 @@ static int rts51x_sd_direct_cmnd(struct rts51x_chip *chip,
117 } 117 }
118 118
119 retval = 119 retval =
120 ext_sd_execute_write_data(chip, chip->card2lun[SD_CARD], 120 ext_rts51x_sd_execute_write_data(chip, chip->card2lun[SD_CARD],
121 cmd_idx, cmd12, standby, acmd, 121 cmd_idx, cmd12, standby, acmd,
122 rsp_code, arg, len, buf, 122 rsp_code, arg, len, buf,
123 cmnd->buf_len, 0); 123 cmnd->buf_len, 0);
diff --git a/drivers/staging/rts5139/rts51x_scsi.c b/drivers/staging/rts5139/rts51x_scsi.c
index e07a1f4f58cf..052911c93103 100644
--- a/drivers/staging/rts5139/rts51x_scsi.c
+++ b/drivers/staging/rts5139/rts51x_scsi.c
@@ -44,7 +44,7 @@
44#include "ms_mg.h" 44#include "ms_mg.h"
45#include "trace.h" 45#include "trace.h"
46 46
47void scsi_show_command(struct scsi_cmnd *srb) 47void rts51x_scsi_show_command(struct scsi_cmnd *srb)
48{ 48{
49 char *what = NULL; 49 char *what = NULL;
50 int i, unknown_cmd = 0; 50 int i, unknown_cmd = 0;
@@ -333,72 +333,72 @@ void scsi_show_command(struct scsi_cmnd *srb)
333 } 333 }
334} 334}
335 335
336void set_sense_type(struct rts51x_chip *chip, unsigned int lun, int sense_type) 336void rts51x_set_sense_type(struct rts51x_chip *chip, unsigned int lun, int sense_type)
337{ 337{
338 switch (sense_type) { 338 switch (sense_type) {
339 case SENSE_TYPE_MEDIA_CHANGE: 339 case SENSE_TYPE_MEDIA_CHANGE:
340 set_sense_data(chip, lun, CUR_ERR, 0x06, 0, 0x28, 0, 0, 0); 340 rts51x_set_sense_data(chip, lun, CUR_ERR, 0x06, 0, 0x28, 0, 0, 0);
341 break; 341 break;
342 342
343 case SENSE_TYPE_MEDIA_NOT_PRESENT: 343 case SENSE_TYPE_MEDIA_NOT_PRESENT:
344 set_sense_data(chip, lun, CUR_ERR, 0x02, 0, 0x3A, 0, 0, 0); 344 rts51x_set_sense_data(chip, lun, CUR_ERR, 0x02, 0, 0x3A, 0, 0, 0);
345 break; 345 break;
346 346
347 case SENSE_TYPE_MEDIA_LBA_OVER_RANGE: 347 case SENSE_TYPE_MEDIA_LBA_OVER_RANGE:
348 set_sense_data(chip, lun, CUR_ERR, 0x05, 0, 0x21, 0, 0, 0); 348 rts51x_set_sense_data(chip, lun, CUR_ERR, 0x05, 0, 0x21, 0, 0, 0);
349 break; 349 break;
350 350
351 case SENSE_TYPE_MEDIA_LUN_NOT_SUPPORT: 351 case SENSE_TYPE_MEDIA_LUN_NOT_SUPPORT:
352 set_sense_data(chip, lun, CUR_ERR, 0x05, 0, 0x25, 0, 0, 0); 352 rts51x_set_sense_data(chip, lun, CUR_ERR, 0x05, 0, 0x25, 0, 0, 0);
353 break; 353 break;
354 354
355 case SENSE_TYPE_MEDIA_WRITE_PROTECT: 355 case SENSE_TYPE_MEDIA_WRITE_PROTECT:
356 set_sense_data(chip, lun, CUR_ERR, 0x07, 0, 0x27, 0, 0, 0); 356 rts51x_set_sense_data(chip, lun, CUR_ERR, 0x07, 0, 0x27, 0, 0, 0);
357 break; 357 break;
358 358
359 case SENSE_TYPE_MEDIA_UNRECOVER_READ_ERR: 359 case SENSE_TYPE_MEDIA_UNRECOVER_READ_ERR:
360 set_sense_data(chip, lun, CUR_ERR, 0x03, 0, 0x11, 0, 0, 0); 360 rts51x_set_sense_data(chip, lun, CUR_ERR, 0x03, 0, 0x11, 0, 0, 0);
361 break; 361 break;
362 362
363 case SENSE_TYPE_MEDIA_WRITE_ERR: 363 case SENSE_TYPE_MEDIA_WRITE_ERR:
364 set_sense_data(chip, lun, CUR_ERR, 0x03, 0, 0x0C, 0x02, 0, 0); 364 rts51x_set_sense_data(chip, lun, CUR_ERR, 0x03, 0, 0x0C, 0x02, 0, 0);
365 break; 365 break;
366 366
367 case SENSE_TYPE_MEDIA_INVALID_CMD_FIELD: 367 case SENSE_TYPE_MEDIA_INVALID_CMD_FIELD:
368 set_sense_data(chip, lun, CUR_ERR, ILGAL_REQ, 0, 368 rts51x_set_sense_data(chip, lun, CUR_ERR, ILGAL_REQ, 0,
369 ASC_INVLD_CDB, ASCQ_INVLD_CDB, CDB_ILLEGAL, 1); 369 ASC_INVLD_CDB, ASCQ_INVLD_CDB, CDB_ILLEGAL, 1);
370 break; 370 break;
371 371
372 case SENSE_TYPE_FORMAT_CMD_FAILED: 372 case SENSE_TYPE_FORMAT_CMD_FAILED:
373 set_sense_data(chip, lun, CUR_ERR, 0x03, 0, 0x31, 0x01, 0, 0); 373 rts51x_set_sense_data(chip, lun, CUR_ERR, 0x03, 0, 0x31, 0x01, 0, 0);
374 break; 374 break;
375 375
376#ifdef SUPPORT_MAGIC_GATE 376#ifdef SUPPORT_MAGIC_GATE
377 case SENSE_TYPE_MG_KEY_FAIL_NOT_ESTAB: 377 case SENSE_TYPE_MG_KEY_FAIL_NOT_ESTAB:
378 set_sense_data(chip, lun, CUR_ERR, 0x05, 0, 0x6F, 0x02, 0, 0); 378 rts51x_set_sense_data(chip, lun, CUR_ERR, 0x05, 0, 0x6F, 0x02, 0, 0);
379 break; 379 break;
380 380
381 case SENSE_TYPE_MG_KEY_FAIL_NOT_AUTHEN: 381 case SENSE_TYPE_MG_KEY_FAIL_NOT_AUTHEN:
382 set_sense_data(chip, lun, CUR_ERR, 0x05, 0, 0x6F, 0x00, 0, 0); 382 rts51x_set_sense_data(chip, lun, CUR_ERR, 0x05, 0, 0x6F, 0x00, 0, 0);
383 break; 383 break;
384 384
385 case SENSE_TYPE_MG_INCOMPATIBLE_MEDIUM: 385 case SENSE_TYPE_MG_INCOMPATIBLE_MEDIUM:
386 set_sense_data(chip, lun, CUR_ERR, 0x02, 0, 0x30, 0x00, 0, 0); 386 rts51x_set_sense_data(chip, lun, CUR_ERR, 0x02, 0, 0x30, 0x00, 0, 0);
387 break; 387 break;
388 388
389 case SENSE_TYPE_MG_WRITE_ERR: 389 case SENSE_TYPE_MG_WRITE_ERR:
390 set_sense_data(chip, lun, CUR_ERR, 0x03, 0, 0x0C, 0x00, 0, 0); 390 rts51x_set_sense_data(chip, lun, CUR_ERR, 0x03, 0, 0x0C, 0x00, 0, 0);
391 break; 391 break;
392#endif 392#endif
393 393
394 case SENSE_TYPE_NO_SENSE: 394 case SENSE_TYPE_NO_SENSE:
395 default: 395 default:
396 set_sense_data(chip, lun, CUR_ERR, 0, 0, 0, 0, 0, 0); 396 rts51x_set_sense_data(chip, lun, CUR_ERR, 0, 0, 0, 0, 0, 0);
397 break; 397 break;
398 } 398 }
399} 399}
400 400
401void set_sense_data(struct rts51x_chip *chip, unsigned int lun, u8 err_code, 401void rts51x_set_sense_data(struct rts51x_chip *chip, unsigned int lun, u8 err_code,
402 u8 sense_key, u32 info, u8 asc, u8 ascq, u8 sns_key_info0, 402 u8 sense_key, u32 info, u8 asc, u8 ascq, u8 sns_key_info0,
403 u16 sns_key_info1) 403 u16 sns_key_info1)
404{ 404{
@@ -428,13 +428,13 @@ static int test_unit_ready(struct scsi_cmnd *srb, struct rts51x_chip *chip)
428 rts51x_init_cards(chip); 428 rts51x_init_cards(chip);
429 429
430 if (!check_card_ready(chip, lun)) { 430 if (!check_card_ready(chip, lun)) {
431 set_sense_type(chip, lun, SENSE_TYPE_MEDIA_NOT_PRESENT); 431 rts51x_set_sense_type(chip, lun, SENSE_TYPE_MEDIA_NOT_PRESENT);
432 return TRANSPORT_FAILED; 432 return TRANSPORT_FAILED;
433 } 433 }
434 434
435 if (!check_lun_mc(chip, lun)) { 435 if (!check_lun_mc(chip, lun)) {
436 set_lun_mc(chip, lun); 436 set_lun_mc(chip, lun);
437 set_sense_type(chip, lun, SENSE_TYPE_MEDIA_CHANGE); 437 rts51x_set_sense_type(chip, lun, SENSE_TYPE_MEDIA_CHANGE);
438 return TRANSPORT_FAILED; 438 return TRANSPORT_FAILED;
439 } 439 }
440 440
@@ -457,7 +457,7 @@ static int inquiry(struct scsi_cmnd *srb, struct rts51x_chip *chip)
457 char *inquiry_string; 457 char *inquiry_string;
458 unsigned char sendbytes; 458 unsigned char sendbytes;
459 unsigned char *buf; 459 unsigned char *buf;
460 u8 card = get_lun_card(chip, lun); 460 u8 card = rts51x_get_lun_card(chip, lun);
461 int pro_formatter_flag = 0; 461 int pro_formatter_flag = 0;
462 unsigned char inquiry_buf[] = { 462 unsigned char inquiry_buf[] = {
463 QULIFIRE | DRCT_ACCESS_DEV, 463 QULIFIRE | DRCT_ACCESS_DEV,
@@ -532,7 +532,7 @@ static int start_stop_unit(struct scsi_cmnd *srb, struct rts51x_chip *chip)
532 case UNLOAD_MEDIUM: 532 case UNLOAD_MEDIUM:
533 /* Media shall be unload */ 533 /* Media shall be unload */
534 if (check_card_ready(chip, lun)) 534 if (check_card_ready(chip, lun))
535 eject_card(chip, lun); 535 rts51x_eject_card(chip, lun);
536 return TRANSPORT_GOOD; 536 return TRANSPORT_GOOD;
537 537
538 case MAKE_MEDIUM_READY: 538 case MAKE_MEDIUM_READY:
@@ -540,7 +540,7 @@ static int start_stop_unit(struct scsi_cmnd *srb, struct rts51x_chip *chip)
540 if (check_card_ready(chip, lun)) { 540 if (check_card_ready(chip, lun)) {
541 return TRANSPORT_GOOD; 541 return TRANSPORT_GOOD;
542 } else { 542 } else {
543 set_sense_type(chip, lun, SENSE_TYPE_MEDIA_NOT_PRESENT); 543 rts51x_set_sense_type(chip, lun, SENSE_TYPE_MEDIA_NOT_PRESENT);
544 TRACE_RET(chip, TRANSPORT_FAILED); 544 TRACE_RET(chip, TRANSPORT_FAILED);
545 } 545 }
546 546
@@ -559,7 +559,7 @@ static int allow_medium_removal(struct scsi_cmnd *srb, struct rts51x_chip *chip)
559 scsi_set_resid(srb, 0); 559 scsi_set_resid(srb, 0);
560 560
561 if (prevent) { 561 if (prevent) {
562 set_sense_type(chip, SCSI_LUN(srb), 562 rts51x_set_sense_type(chip, SCSI_LUN(srb),
563 SENSE_TYPE_MEDIA_INVALID_CMD_FIELD); 563 SENSE_TYPE_MEDIA_INVALID_CMD_FIELD);
564 TRACE_RET(chip, TRANSPORT_FAILED); 564 TRACE_RET(chip, TRANSPORT_FAILED);
565 } 565 }
@@ -663,10 +663,10 @@ static int mode_sense(struct scsi_cmnd *srb, struct rts51x_chip *chip)
663 int status; 663 int status;
664 int pro_formatter_flag; 664 int pro_formatter_flag;
665 unsigned char pageCode, *buf; 665 unsigned char pageCode, *buf;
666 u8 card = get_lun_card(chip, lun); 666 u8 card = rts51x_get_lun_card(chip, lun);
667 667
668 if (!check_card_ready(chip, lun)) { 668 if (!check_card_ready(chip, lun)) {
669 set_sense_type(chip, lun, SENSE_TYPE_MEDIA_NOT_PRESENT); 669 rts51x_set_sense_type(chip, lun, SENSE_TYPE_MEDIA_NOT_PRESENT);
670 scsi_set_resid(srb, scsi_bufflen(srb)); 670 scsi_set_resid(srb, scsi_bufflen(srb));
671 TRACE_RET(chip, TRANSPORT_FAILED); 671 TRACE_RET(chip, TRANSPORT_FAILED);
672 } 672 }
@@ -678,7 +678,7 @@ static int mode_sense(struct scsi_cmnd *srb, struct rts51x_chip *chip)
678 if ((get_lun2card(chip, lun) & MS_CARD)) { 678 if ((get_lun2card(chip, lun) & MS_CARD)) {
679 if (!card || (card == MS_CARD)) { 679 if (!card || (card == MS_CARD)) {
680 dataSize = 108; 680 dataSize = 108;
681 if (chip->option.mspro_formatter_enable) 681 if (chip->option.rts51x_mspro_formatter_enable)
682 pro_formatter_flag = 1; 682 pro_formatter_flag = 1;
683 } 683 }
684 } 684 }
@@ -725,7 +725,7 @@ static int mode_sense(struct scsi_cmnd *srb, struct rts51x_chip *chip)
725 } 725 }
726 status = TRANSPORT_GOOD; 726 status = TRANSPORT_GOOD;
727 } else { 727 } else {
728 set_sense_type(chip, lun, SENSE_TYPE_MEDIA_INVALID_CMD_FIELD); 728 rts51x_set_sense_type(chip, lun, SENSE_TYPE_MEDIA_INVALID_CMD_FIELD);
729 scsi_set_resid(srb, scsi_bufflen(srb)); 729 scsi_set_resid(srb, scsi_bufflen(srb));
730 status = TRANSPORT_FAILED; 730 status = TRANSPORT_FAILED;
731 } 731 }
@@ -749,9 +749,9 @@ static int request_sense(struct scsi_cmnd *srb, struct rts51x_chip *chip)
749 749
750 sense = &(chip->sense_buffer[lun]); 750 sense = &(chip->sense_buffer[lun]);
751 751
752 if ((get_lun_card(chip, lun) == MS_CARD) 752 if ((rts51x_get_lun_card(chip, lun) == MS_CARD)
753 && PRO_UNDER_FORMATTING(ms_card)) { 753 && PRO_UNDER_FORMATTING(ms_card)) {
754 mspro_format_sense(chip, lun); 754 rts51x_mspro_format_sense(chip, lun);
755 } 755 }
756 756
757 buf = vmalloc(scsi_bufflen(srb)); 757 buf = vmalloc(scsi_bufflen(srb));
@@ -766,7 +766,7 @@ static int request_sense(struct scsi_cmnd *srb, struct rts51x_chip *chip)
766 766
767 scsi_set_resid(srb, 0); 767 scsi_set_resid(srb, 0);
768 /* Reset Sense Data */ 768 /* Reset Sense Data */
769 set_sense_type(chip, lun, SENSE_TYPE_NO_SENSE); 769 rts51x_set_sense_type(chip, lun, SENSE_TYPE_NO_SENSE);
770 return TRANSPORT_GOOD; 770 return TRANSPORT_GOOD;
771} 771}
772 772
@@ -778,13 +778,13 @@ static int read_write(struct scsi_cmnd *srb, struct rts51x_chip *chip)
778 u16 sec_cnt; 778 u16 sec_cnt;
779 779
780 if (!check_card_ready(chip, lun) || (chip->capacity[lun] == 0)) { 780 if (!check_card_ready(chip, lun) || (chip->capacity[lun] == 0)) {
781 set_sense_type(chip, lun, SENSE_TYPE_MEDIA_NOT_PRESENT); 781 rts51x_set_sense_type(chip, lun, SENSE_TYPE_MEDIA_NOT_PRESENT);
782 TRACE_RET(chip, TRANSPORT_FAILED); 782 TRACE_RET(chip, TRANSPORT_FAILED);
783 } 783 }
784 784
785 if (!check_lun_mc(chip, lun)) { 785 if (!check_lun_mc(chip, lun)) {
786 set_lun_mc(chip, lun); 786 set_lun_mc(chip, lun);
787 set_sense_type(chip, lun, SENSE_TYPE_MEDIA_CHANGE); 787 rts51x_set_sense_type(chip, lun, SENSE_TYPE_MEDIA_CHANGE);
788 return TRANSPORT_FAILED; 788 return TRANSPORT_FAILED;
789 } 789 }
790 790
@@ -812,13 +812,13 @@ static int read_write(struct scsi_cmnd *srb, struct rts51x_chip *chip)
812 ((u32) srb->cmnd[7]); 812 ((u32) srb->cmnd[7]);
813 sec_cnt = ((u16) (srb->cmnd[9]) << 8) | srb->cmnd[10]; 813 sec_cnt = ((u16) (srb->cmnd[9]) << 8) | srb->cmnd[10];
814 } else { 814 } else {
815 set_sense_type(chip, lun, SENSE_TYPE_MEDIA_INVALID_CMD_FIELD); 815 rts51x_set_sense_type(chip, lun, SENSE_TYPE_MEDIA_INVALID_CMD_FIELD);
816 TRACE_RET(chip, TRANSPORT_FAILED); 816 TRACE_RET(chip, TRANSPORT_FAILED);
817 } 817 }
818 818
819 if ((start_sec > chip->capacity[lun]) || 819 if ((start_sec > chip->capacity[lun]) ||
820 ((start_sec + sec_cnt) > chip->capacity[lun])) { 820 ((start_sec + sec_cnt) > chip->capacity[lun])) {
821 set_sense_type(chip, lun, SENSE_TYPE_MEDIA_LBA_OVER_RANGE); 821 rts51x_set_sense_type(chip, lun, SENSE_TYPE_MEDIA_LBA_OVER_RANGE);
822 TRACE_RET(chip, TRANSPORT_FAILED); 822 TRACE_RET(chip, TRANSPORT_FAILED);
823 } 823 }
824 824
@@ -830,17 +830,17 @@ static int read_write(struct scsi_cmnd *srb, struct rts51x_chip *chip)
830 if ((srb->sc_data_direction == DMA_TO_DEVICE) 830 if ((srb->sc_data_direction == DMA_TO_DEVICE)
831 && check_card_wp(chip, lun)) { 831 && check_card_wp(chip, lun)) {
832 RTS51X_DEBUGP("Write protected card!\n"); 832 RTS51X_DEBUGP("Write protected card!\n");
833 set_sense_type(chip, lun, SENSE_TYPE_MEDIA_WRITE_PROTECT); 833 rts51x_set_sense_type(chip, lun, SENSE_TYPE_MEDIA_WRITE_PROTECT);
834 TRACE_RET(chip, TRANSPORT_FAILED); 834 TRACE_RET(chip, TRANSPORT_FAILED);
835 } 835 }
836 836
837 retval = card_rw(srb, chip, start_sec, sec_cnt); 837 retval = rts51x_card_rw(srb, chip, start_sec, sec_cnt);
838 if (retval != STATUS_SUCCESS) { 838 if (retval != STATUS_SUCCESS) {
839 if (srb->sc_data_direction == DMA_FROM_DEVICE) { 839 if (srb->sc_data_direction == DMA_FROM_DEVICE) {
840 set_sense_type(chip, lun, 840 rts51x_set_sense_type(chip, lun,
841 SENSE_TYPE_MEDIA_UNRECOVER_READ_ERR); 841 SENSE_TYPE_MEDIA_UNRECOVER_READ_ERR);
842 } else { 842 } else {
843 set_sense_type(chip, lun, SENSE_TYPE_MEDIA_WRITE_ERR); 843 rts51x_set_sense_type(chip, lun, SENSE_TYPE_MEDIA_WRITE_ERR);
844 } 844 }
845 TRACE_RET(chip, TRANSPORT_FAILED); 845 TRACE_RET(chip, TRANSPORT_FAILED);
846 } 846 }
@@ -855,13 +855,13 @@ static int read_format_capacity(struct scsi_cmnd *srb, struct rts51x_chip *chip)
855 unsigned char *buf; 855 unsigned char *buf;
856 unsigned int lun = SCSI_LUN(srb); 856 unsigned int lun = SCSI_LUN(srb);
857 unsigned int buf_len; 857 unsigned int buf_len;
858 u8 card = get_lun_card(chip, lun); 858 u8 card = rts51x_get_lun_card(chip, lun);
859 int desc_cnt; 859 int desc_cnt;
860 int i = 0; 860 int i = 0;
861 861
862 if (!check_card_ready(chip, lun)) { 862 if (!check_card_ready(chip, lun)) {
863 if (!chip->option.mspro_formatter_enable) { 863 if (!chip->option.rts51x_mspro_formatter_enable) {
864 set_sense_type(chip, lun, SENSE_TYPE_MEDIA_NOT_PRESENT); 864 rts51x_set_sense_type(chip, lun, SENSE_TYPE_MEDIA_NOT_PRESENT);
865 TRACE_RET(chip, TRANSPORT_FAILED); 865 TRACE_RET(chip, TRANSPORT_FAILED);
866 } 866 }
867 } 867 }
@@ -877,7 +877,7 @@ static int read_format_capacity(struct scsi_cmnd *srb, struct rts51x_chip *chip)
877 buf[i++] = 0; 877 buf[i++] = 0;
878 878
879 /* Capacity List Length */ 879 /* Capacity List Length */
880 if ((buf_len > 12) && chip->option.mspro_formatter_enable && 880 if ((buf_len > 12) && chip->option.rts51x_mspro_formatter_enable &&
881 (chip->lun2card[lun] & MS_CARD) && (!card || (card == MS_CARD))) { 881 (chip->lun2card[lun] & MS_CARD) && (!card || (card == MS_CARD))) {
882 buf[i++] = 0x10; 882 buf[i++] = 0x10;
883 desc_cnt = 2; 883 desc_cnt = 2;
@@ -933,13 +933,13 @@ static int read_capacity(struct scsi_cmnd *srb, struct rts51x_chip *chip)
933 unsigned int lun = SCSI_LUN(srb); 933 unsigned int lun = SCSI_LUN(srb);
934 934
935 if (!check_card_ready(chip, lun)) { 935 if (!check_card_ready(chip, lun)) {
936 set_sense_type(chip, lun, SENSE_TYPE_MEDIA_NOT_PRESENT); 936 rts51x_set_sense_type(chip, lun, SENSE_TYPE_MEDIA_NOT_PRESENT);
937 TRACE_RET(chip, TRANSPORT_FAILED); 937 TRACE_RET(chip, TRANSPORT_FAILED);
938 } 938 }
939 939
940 if (!check_lun_mc(chip, lun)) { 940 if (!check_lun_mc(chip, lun)) {
941 set_lun_mc(chip, lun); 941 set_lun_mc(chip, lun);
942 set_sense_type(chip, lun, SENSE_TYPE_MEDIA_CHANGE); 942 rts51x_set_sense_type(chip, lun, SENSE_TYPE_MEDIA_CHANGE);
943 return TRANSPORT_FAILED; 943 return TRANSPORT_FAILED;
944 } 944 }
945 945
@@ -1021,7 +1021,7 @@ static int read_mem(struct scsi_cmnd *srb, struct rts51x_chip *chip)
1021 retval = rts51x_ep0_read_register(chip, addr + i, buf + i); 1021 retval = rts51x_ep0_read_register(chip, addr + i, buf + i);
1022 if (retval != STATUS_SUCCESS) { 1022 if (retval != STATUS_SUCCESS) {
1023 vfree(buf); 1023 vfree(buf);
1024 set_sense_type(chip, lun, 1024 rts51x_set_sense_type(chip, lun,
1025 SENSE_TYPE_MEDIA_UNRECOVER_READ_ERR); 1025 SENSE_TYPE_MEDIA_UNRECOVER_READ_ERR);
1026 TRACE_RET(chip, TRANSPORT_FAILED); 1026 TRACE_RET(chip, TRANSPORT_FAILED);
1027 } 1027 }
@@ -1066,7 +1066,7 @@ static int write_mem(struct scsi_cmnd *srb, struct rts51x_chip *chip)
1066 rts51x_ep0_write_register(chip, addr + i, 0xFF, buf[i]); 1066 rts51x_ep0_write_register(chip, addr + i, 0xFF, buf[i]);
1067 if (retval != STATUS_SUCCESS) { 1067 if (retval != STATUS_SUCCESS) {
1068 vfree(buf); 1068 vfree(buf);
1069 set_sense_type(chip, lun, SENSE_TYPE_MEDIA_WRITE_ERR); 1069 rts51x_set_sense_type(chip, lun, SENSE_TYPE_MEDIA_WRITE_ERR);
1070 TRACE_RET(chip, TRANSPORT_FAILED); 1070 TRACE_RET(chip, TRANSPORT_FAILED);
1071 } 1071 }
1072 } 1072 }
@@ -1083,12 +1083,12 @@ static int get_sd_csd(struct scsi_cmnd *srb, struct rts51x_chip *chip)
1083 unsigned int lun = SCSI_LUN(srb); 1083 unsigned int lun = SCSI_LUN(srb);
1084 1084
1085 if (!check_card_ready(chip, lun)) { 1085 if (!check_card_ready(chip, lun)) {
1086 set_sense_type(chip, lun, SENSE_TYPE_MEDIA_NOT_PRESENT); 1086 rts51x_set_sense_type(chip, lun, SENSE_TYPE_MEDIA_NOT_PRESENT);
1087 TRACE_RET(chip, TRANSPORT_FAILED); 1087 TRACE_RET(chip, TRANSPORT_FAILED);
1088 } 1088 }
1089 1089
1090 if (get_lun_card(chip, lun) != SD_CARD) { 1090 if (rts51x_get_lun_card(chip, lun) != SD_CARD) {
1091 set_sense_type(chip, lun, SENSE_TYPE_MEDIA_UNRECOVER_READ_ERR); 1091 rts51x_set_sense_type(chip, lun, SENSE_TYPE_MEDIA_UNRECOVER_READ_ERR);
1092 TRACE_RET(chip, TRANSPORT_FAILED); 1092 TRACE_RET(chip, TRANSPORT_FAILED);
1093 } 1093 }
1094 1094
@@ -1120,7 +1120,7 @@ static int read_phy_register(struct scsi_cmnd *srb, struct rts51x_chip *chip)
1120 rts51x_read_phy_register(chip, addr + i, buf + i); 1120 rts51x_read_phy_register(chip, addr + i, buf + i);
1121 if (retval != STATUS_SUCCESS) { 1121 if (retval != STATUS_SUCCESS) {
1122 vfree(buf); 1122 vfree(buf);
1123 set_sense_type(chip, SCSI_LUN(srb), 1123 rts51x_set_sense_type(chip, SCSI_LUN(srb),
1124 SENSE_TYPE_MEDIA_UNRECOVER_READ_ERR); 1124 SENSE_TYPE_MEDIA_UNRECOVER_READ_ERR);
1125 TRACE_RET(chip, TRANSPORT_FAILED); 1125 TRACE_RET(chip, TRANSPORT_FAILED);
1126 } 1126 }
@@ -1163,7 +1163,7 @@ static int write_phy_register(struct scsi_cmnd *srb, struct rts51x_chip *chip)
1163 rts51x_write_phy_register(chip, addr + i, buf[i]); 1163 rts51x_write_phy_register(chip, addr + i, buf[i]);
1164 if (retval != STATUS_SUCCESS) { 1164 if (retval != STATUS_SUCCESS) {
1165 vfree(buf); 1165 vfree(buf);
1166 set_sense_type(chip, SCSI_LUN(srb), 1166 rts51x_set_sense_type(chip, SCSI_LUN(srb),
1167 SENSE_TYPE_MEDIA_WRITE_ERR); 1167 SENSE_TYPE_MEDIA_WRITE_ERR);
1168 TRACE_RET(chip, TRANSPORT_FAILED); 1168 TRACE_RET(chip, TRANSPORT_FAILED);
1169 } 1169 }
@@ -1181,15 +1181,15 @@ static int get_card_bus_width(struct scsi_cmnd *srb, struct rts51x_chip *chip)
1181 u8 card, bus_width; 1181 u8 card, bus_width;
1182 1182
1183 if (!check_card_ready(chip, lun)) { 1183 if (!check_card_ready(chip, lun)) {
1184 set_sense_type(chip, lun, SENSE_TYPE_MEDIA_NOT_PRESENT); 1184 rts51x_set_sense_type(chip, lun, SENSE_TYPE_MEDIA_NOT_PRESENT);
1185 TRACE_RET(chip, TRANSPORT_FAILED); 1185 TRACE_RET(chip, TRANSPORT_FAILED);
1186 } 1186 }
1187 1187
1188 card = get_lun_card(chip, lun); 1188 card = rts51x_get_lun_card(chip, lun);
1189 if ((card == SD_CARD) || (card == MS_CARD)) { 1189 if ((card == SD_CARD) || (card == MS_CARD)) {
1190 bus_width = chip->card_bus_width[lun]; 1190 bus_width = chip->card_bus_width[lun];
1191 } else { 1191 } else {
1192 set_sense_type(chip, lun, SENSE_TYPE_MEDIA_UNRECOVER_READ_ERR); 1192 rts51x_set_sense_type(chip, lun, SENSE_TYPE_MEDIA_UNRECOVER_READ_ERR);
1193 TRACE_RET(chip, TRANSPORT_FAILED); 1193 TRACE_RET(chip, TRANSPORT_FAILED);
1194 } 1194 }
1195 1195
@@ -1211,7 +1211,7 @@ static int trace_msg_cmd(struct scsi_cmnd *srb, struct rts51x_chip *chip)
1211 ((2 + MSG_FUNC_LEN + MSG_FILE_LEN + TIME_VAL_LEN) * TRACE_ITEM_CNT); 1211 ((2 + MSG_FUNC_LEN + MSG_FILE_LEN + TIME_VAL_LEN) * TRACE_ITEM_CNT);
1212 1212
1213 if ((scsi_bufflen(srb) < buf_len) || (scsi_sglist(srb) == NULL)) { 1213 if ((scsi_bufflen(srb) < buf_len) || (scsi_sglist(srb) == NULL)) {
1214 set_sense_type(chip, SCSI_LUN(srb), 1214 rts51x_set_sense_type(chip, SCSI_LUN(srb),
1215 SENSE_TYPE_MEDIA_UNRECOVER_READ_ERR); 1215 SENSE_TYPE_MEDIA_UNRECOVER_READ_ERR);
1216 TRACE_RET(chip, TRANSPORT_FAILED); 1216 TRACE_RET(chip, TRANSPORT_FAILED);
1217 } 1217 }
@@ -1251,7 +1251,7 @@ static int rw_mem_cmd_buf(struct scsi_cmnd *srb, struct rts51x_chip *chip)
1251 case ADD_BATCHCMD: 1251 case ADD_BATCHCMD:
1252 cmd_type = srb->cmnd[4]; 1252 cmd_type = srb->cmnd[4];
1253 if (cmd_type > 2) { 1253 if (cmd_type > 2) {
1254 set_sense_type(chip, lun, 1254 rts51x_set_sense_type(chip, lun,
1255 SENSE_TYPE_MEDIA_INVALID_CMD_FIELD); 1255 SENSE_TYPE_MEDIA_INVALID_CMD_FIELD);
1256 TRACE_RET(chip, TRANSPORT_FAILED); 1256 TRACE_RET(chip, TRANSPORT_FAILED);
1257 } 1257 }
@@ -1274,13 +1274,13 @@ static int rw_mem_cmd_buf(struct scsi_cmnd *srb, struct rts51x_chip *chip)
1274 [9]); 1274 [9]);
1275 retval = rts51x_send_cmd(chip, mode, 1000); 1275 retval = rts51x_send_cmd(chip, mode, 1000);
1276 if (retval != STATUS_SUCCESS) { 1276 if (retval != STATUS_SUCCESS) {
1277 set_sense_type(chip, lun, SENSE_TYPE_MEDIA_WRITE_ERR); 1277 rts51x_set_sense_type(chip, lun, SENSE_TYPE_MEDIA_WRITE_ERR);
1278 TRACE_RET(chip, TRANSPORT_FAILED); 1278 TRACE_RET(chip, TRANSPORT_FAILED);
1279 } 1279 }
1280 if (mode & STAGE_R) { 1280 if (mode & STAGE_R) {
1281 retval = rts51x_get_rsp(chip, len, timeout); 1281 retval = rts51x_get_rsp(chip, len, timeout);
1282 if (retval != STATUS_SUCCESS) { 1282 if (retval != STATUS_SUCCESS) {
1283 set_sense_type(chip, lun, 1283 rts51x_set_sense_type(chip, lun,
1284 SENSE_TYPE_MEDIA_UNRECOVER_READ_ERR); 1284 SENSE_TYPE_MEDIA_UNRECOVER_READ_ERR);
1285 TRACE_RET(chip, TRANSPORT_FAILED); 1285 TRACE_RET(chip, TRANSPORT_FAILED);
1286 } 1286 }
@@ -1291,7 +1291,7 @@ static int rw_mem_cmd_buf(struct scsi_cmnd *srb, struct rts51x_chip *chip)
1291 idx = srb->cmnd[4]; 1291 idx = srb->cmnd[4];
1292 value = chip->rsp_buf[idx]; 1292 value = chip->rsp_buf[idx];
1293 if (scsi_bufflen(srb) < 1) { 1293 if (scsi_bufflen(srb) < 1) {
1294 set_sense_type(chip, lun, 1294 rts51x_set_sense_type(chip, lun,
1295 SENSE_TYPE_MEDIA_INVALID_CMD_FIELD); 1295 SENSE_TYPE_MEDIA_INVALID_CMD_FIELD);
1296 TRACE_RET(chip, TRANSPORT_FAILED); 1296 TRACE_RET(chip, TRANSPORT_FAILED);
1297 } 1297 }
@@ -1300,12 +1300,12 @@ static int rw_mem_cmd_buf(struct scsi_cmnd *srb, struct rts51x_chip *chip)
1300 break; 1300 break;
1301 1301
1302 default: 1302 default:
1303 set_sense_type(chip, lun, SENSE_TYPE_MEDIA_INVALID_CMD_FIELD); 1303 rts51x_set_sense_type(chip, lun, SENSE_TYPE_MEDIA_INVALID_CMD_FIELD);
1304 TRACE_RET(chip, TRANSPORT_FAILED); 1304 TRACE_RET(chip, TRANSPORT_FAILED);
1305 } 1305 }
1306 1306
1307 if (retval != STATUS_SUCCESS) { 1307 if (retval != STATUS_SUCCESS) {
1308 set_sense_type(chip, lun, SENSE_TYPE_MEDIA_WRITE_ERR); 1308 rts51x_set_sense_type(chip, lun, SENSE_TYPE_MEDIA_WRITE_ERR);
1309 TRACE_RET(chip, TRANSPORT_FAILED); 1309 TRACE_RET(chip, TRANSPORT_FAILED);
1310 } 1310 }
1311 1311
@@ -1357,7 +1357,7 @@ static int app_cmd(struct scsi_cmnd *srb, struct rts51x_chip *chip)
1357 break; 1357 break;
1358 1358
1359 default: 1359 default:
1360 set_sense_type(chip, SCSI_LUN(srb), 1360 rts51x_set_sense_type(chip, SCSI_LUN(srb),
1361 SENSE_TYPE_MEDIA_INVALID_CMD_FIELD); 1361 SENSE_TYPE_MEDIA_INVALID_CMD_FIELD);
1362 TRACE_RET(chip, TRANSPORT_FAILED); 1362 TRACE_RET(chip, TRANSPORT_FAILED);
1363 } 1363 }
@@ -1401,7 +1401,7 @@ static int vendor_cmnd(struct scsi_cmnd *srb, struct rts51x_chip *chip)
1401 break; 1401 break;
1402 1402
1403 default: 1403 default:
1404 set_sense_type(chip, SCSI_LUN(srb), 1404 rts51x_set_sense_type(chip, SCSI_LUN(srb),
1405 SENSE_TYPE_MEDIA_INVALID_CMD_FIELD); 1405 SENSE_TYPE_MEDIA_INVALID_CMD_FIELD);
1406 TRACE_RET(chip, TRANSPORT_FAILED); 1406 TRACE_RET(chip, TRANSPORT_FAILED);
1407 } 1407 }
@@ -1415,15 +1415,15 @@ static int ms_format_cmnd(struct scsi_cmnd *srb, struct rts51x_chip *chip)
1415 unsigned int lun = SCSI_LUN(srb); 1415 unsigned int lun = SCSI_LUN(srb);
1416 int retval, quick_format; 1416 int retval, quick_format;
1417 1417
1418 if (get_lun_card(chip, lun) != MS_CARD) { 1418 if (rts51x_get_lun_card(chip, lun) != MS_CARD) {
1419 set_sense_type(chip, lun, SENSE_TYPE_MEDIA_LUN_NOT_SUPPORT); 1419 rts51x_set_sense_type(chip, lun, SENSE_TYPE_MEDIA_LUN_NOT_SUPPORT);
1420 TRACE_RET(chip, TRANSPORT_FAILED); 1420 TRACE_RET(chip, TRANSPORT_FAILED);
1421 } 1421 }
1422 1422
1423 if ((srb->cmnd[3] != 0x4D) || (srb->cmnd[4] != 0x47) 1423 if ((srb->cmnd[3] != 0x4D) || (srb->cmnd[4] != 0x47)
1424 || (srb->cmnd[5] != 0x66) || (srb->cmnd[6] != 0x6D) 1424 || (srb->cmnd[5] != 0x66) || (srb->cmnd[6] != 0x6D)
1425 || (srb->cmnd[7] != 0x74)) { 1425 || (srb->cmnd[7] != 0x74)) {
1426 set_sense_type(chip, lun, SENSE_TYPE_MEDIA_INVALID_CMD_FIELD); 1426 rts51x_set_sense_type(chip, lun, SENSE_TYPE_MEDIA_INVALID_CMD_FIELD);
1427 TRACE_RET(chip, TRANSPORT_FAILED); 1427 TRACE_RET(chip, TRANSPORT_FAILED);
1428 } 1428 }
1429 1429
@@ -1433,26 +1433,26 @@ static int ms_format_cmnd(struct scsi_cmnd *srb, struct rts51x_chip *chip)
1433 quick_format = 1; 1433 quick_format = 1;
1434 1434
1435 if (!(chip->card_ready & MS_CARD)) { 1435 if (!(chip->card_ready & MS_CARD)) {
1436 set_sense_type(chip, lun, SENSE_TYPE_MEDIA_NOT_PRESENT); 1436 rts51x_set_sense_type(chip, lun, SENSE_TYPE_MEDIA_NOT_PRESENT);
1437 TRACE_RET(chip, TRANSPORT_FAILED); 1437 TRACE_RET(chip, TRANSPORT_FAILED);
1438 } 1438 }
1439 1439
1440 if (chip->card_wp & MS_CARD) { 1440 if (chip->card_wp & MS_CARD) {
1441 set_sense_type(chip, lun, SENSE_TYPE_MEDIA_WRITE_PROTECT); 1441 rts51x_set_sense_type(chip, lun, SENSE_TYPE_MEDIA_WRITE_PROTECT);
1442 TRACE_RET(chip, TRANSPORT_FAILED); 1442 TRACE_RET(chip, TRANSPORT_FAILED);
1443 } 1443 }
1444 1444
1445 if (!CHK_MSPRO(ms_card)) { 1445 if (!CHK_MSPRO(ms_card)) {
1446 set_sense_type(chip, lun, SENSE_TYPE_MEDIA_LUN_NOT_SUPPORT); 1446 rts51x_set_sense_type(chip, lun, SENSE_TYPE_MEDIA_LUN_NOT_SUPPORT);
1447 TRACE_RET(chip, TRANSPORT_FAILED); 1447 TRACE_RET(chip, TRANSPORT_FAILED);
1448 } 1448 }
1449 1449
1450 rts51x_prepare_run(chip); 1450 rts51x_prepare_run(chip);
1451 RTS51X_SET_STAT(chip, STAT_RUN); 1451 RTS51X_SET_STAT(chip, STAT_RUN);
1452 1452
1453 retval = mspro_format(srb, chip, MS_SHORT_DATA_LEN, quick_format); 1453 retval = rts51x_mspro_format(srb, chip, MS_SHORT_DATA_LEN, quick_format);
1454 if (retval != STATUS_SUCCESS) { 1454 if (retval != STATUS_SUCCESS) {
1455 set_sense_type(chip, lun, SENSE_TYPE_FORMAT_CMD_FAILED); 1455 rts51x_set_sense_type(chip, lun, SENSE_TYPE_FORMAT_CMD_FAILED);
1456 TRACE_RET(chip, TRANSPORT_FAILED); 1456 TRACE_RET(chip, TRANSPORT_FAILED);
1457 } 1457 }
1458 1458
@@ -1471,18 +1471,18 @@ static int get_ms_information(struct scsi_cmnd *srb, struct rts51x_chip *chip)
1471 int i; 1471 int i;
1472 1472
1473 if (!check_card_ready(chip, lun)) { 1473 if (!check_card_ready(chip, lun)) {
1474 set_sense_type(chip, lun, SENSE_TYPE_MEDIA_NOT_PRESENT); 1474 rts51x_set_sense_type(chip, lun, SENSE_TYPE_MEDIA_NOT_PRESENT);
1475 TRACE_RET(chip, TRANSPORT_FAILED); 1475 TRACE_RET(chip, TRANSPORT_FAILED);
1476 } 1476 }
1477 if ((get_lun_card(chip, lun) != MS_CARD)) { 1477 if ((rts51x_get_lun_card(chip, lun) != MS_CARD)) {
1478 set_sense_type(chip, lun, SENSE_TYPE_MEDIA_LUN_NOT_SUPPORT); 1478 rts51x_set_sense_type(chip, lun, SENSE_TYPE_MEDIA_LUN_NOT_SUPPORT);
1479 TRACE_RET(chip, TRANSPORT_FAILED); 1479 TRACE_RET(chip, TRANSPORT_FAILED);
1480 } 1480 }
1481 1481
1482 if ((srb->cmnd[2] != 0xB0) || (srb->cmnd[4] != 0x4D) || 1482 if ((srb->cmnd[2] != 0xB0) || (srb->cmnd[4] != 0x4D) ||
1483 (srb->cmnd[5] != 0x53) || (srb->cmnd[6] != 0x49) || 1483 (srb->cmnd[5] != 0x53) || (srb->cmnd[6] != 0x49) ||
1484 (srb->cmnd[7] != 0x44)) { 1484 (srb->cmnd[7] != 0x44)) {
1485 set_sense_type(chip, lun, SENSE_TYPE_MEDIA_INVALID_CMD_FIELD); 1485 rts51x_set_sense_type(chip, lun, SENSE_TYPE_MEDIA_INVALID_CMD_FIELD);
1486 TRACE_RET(chip, TRANSPORT_FAILED); 1486 TRACE_RET(chip, TRANSPORT_FAILED);
1487 } 1487 }
1488 1488
@@ -1490,7 +1490,7 @@ static int get_ms_information(struct scsi_cmnd *srb, struct rts51x_chip *chip)
1490 if ((CHK_MSXC(ms_card) && (dev_info_id == 0x10)) || 1490 if ((CHK_MSXC(ms_card) && (dev_info_id == 0x10)) ||
1491 (!CHK_MSXC(ms_card) && (dev_info_id == 0x13)) || 1491 (!CHK_MSXC(ms_card) && (dev_info_id == 0x13)) ||
1492 !CHK_MSPRO(ms_card)) { 1492 !CHK_MSPRO(ms_card)) {
1493 set_sense_type(chip, lun, SENSE_TYPE_MEDIA_INVALID_CMD_FIELD); 1493 rts51x_set_sense_type(chip, lun, SENSE_TYPE_MEDIA_INVALID_CMD_FIELD);
1494 TRACE_RET(chip, TRANSPORT_FAILED); 1494 TRACE_RET(chip, TRANSPORT_FAILED);
1495 } 1495 }
1496 1496
@@ -1576,44 +1576,44 @@ static int sd_extention_cmnd(struct scsi_cmnd *srb, struct rts51x_chip *chip)
1576 rts51x_prepare_run(chip); 1576 rts51x_prepare_run(chip);
1577 RTS51X_SET_STAT(chip, STAT_RUN); 1577 RTS51X_SET_STAT(chip, STAT_RUN);
1578 1578
1579 sd_cleanup_work(chip); 1579 rts51x_sd_cleanup_work(chip);
1580 1580
1581 if (!check_card_ready(chip, lun)) { 1581 if (!check_card_ready(chip, lun)) {
1582 set_sense_type(chip, lun, SENSE_TYPE_MEDIA_NOT_PRESENT); 1582 rts51x_set_sense_type(chip, lun, SENSE_TYPE_MEDIA_NOT_PRESENT);
1583 TRACE_RET(chip, TRANSPORT_FAILED); 1583 TRACE_RET(chip, TRANSPORT_FAILED);
1584 } 1584 }
1585 if ((get_lun_card(chip, lun) != SD_CARD)) { 1585 if ((rts51x_get_lun_card(chip, lun) != SD_CARD)) {
1586 set_sense_type(chip, lun, SENSE_TYPE_MEDIA_LUN_NOT_SUPPORT); 1586 rts51x_set_sense_type(chip, lun, SENSE_TYPE_MEDIA_LUN_NOT_SUPPORT);
1587 TRACE_RET(chip, TRANSPORT_FAILED); 1587 TRACE_RET(chip, TRANSPORT_FAILED);
1588 } 1588 }
1589 1589
1590 switch (srb->cmnd[0]) { 1590 switch (srb->cmnd[0]) {
1591 case SD_PASS_THRU_MODE: 1591 case SD_PASS_THRU_MODE:
1592 result = sd_pass_thru_mode(srb, chip); 1592 result = rts51x_sd_pass_thru_mode(srb, chip);
1593 break; 1593 break;
1594 1594
1595 case SD_EXECUTE_NO_DATA: 1595 case SD_EXECUTE_NO_DATA:
1596 result = sd_execute_no_data(srb, chip); 1596 result = rts51x_sd_execute_no_data(srb, chip);
1597 break; 1597 break;
1598 1598
1599 case SD_EXECUTE_READ: 1599 case SD_EXECUTE_READ:
1600 result = sd_execute_read_data(srb, chip); 1600 result = rts51x_sd_execute_read_data(srb, chip);
1601 break; 1601 break;
1602 1602
1603 case SD_EXECUTE_WRITE: 1603 case SD_EXECUTE_WRITE:
1604 result = sd_execute_write_data(srb, chip); 1604 result = rts51x_sd_execute_write_data(srb, chip);
1605 break; 1605 break;
1606 1606
1607 case SD_GET_RSP: 1607 case SD_GET_RSP:
1608 result = sd_get_cmd_rsp(srb, chip); 1608 result = rts51x_sd_get_cmd_rsp(srb, chip);
1609 break; 1609 break;
1610 1610
1611 case SD_HW_RST: 1611 case SD_HW_RST:
1612 result = sd_hw_rst(srb, chip); 1612 result = rts51x_sd_hw_rst(srb, chip);
1613 break; 1613 break;
1614 1614
1615 default: 1615 default:
1616 set_sense_type(chip, lun, SENSE_TYPE_MEDIA_INVALID_CMD_FIELD); 1616 rts51x_set_sense_type(chip, lun, SENSE_TYPE_MEDIA_INVALID_CMD_FIELD);
1617 TRACE_RET(chip, TRANSPORT_FAILED); 1617 TRACE_RET(chip, TRANSPORT_FAILED);
1618 } 1618 }
1619 1619
@@ -1632,24 +1632,24 @@ static int mg_report_key(struct scsi_cmnd *srb, struct rts51x_chip *chip)
1632 rts51x_prepare_run(chip); 1632 rts51x_prepare_run(chip);
1633 RTS51X_SET_STAT(chip, STAT_RUN); 1633 RTS51X_SET_STAT(chip, STAT_RUN);
1634 1634
1635 ms_cleanup_work(chip); 1635 rts51x_ms_cleanup_work(chip);
1636 1636
1637 if (!check_card_ready(chip, lun)) { 1637 if (!check_card_ready(chip, lun)) {
1638 set_sense_type(chip, lun, SENSE_TYPE_MEDIA_NOT_PRESENT); 1638 rts51x_set_sense_type(chip, lun, SENSE_TYPE_MEDIA_NOT_PRESENT);
1639 TRACE_RET(chip, TRANSPORT_FAILED); 1639 TRACE_RET(chip, TRANSPORT_FAILED);
1640 } 1640 }
1641 if ((get_lun_card(chip, lun) != MS_CARD)) { 1641 if ((rts51x_get_lun_card(chip, lun) != MS_CARD)) {
1642 set_sense_type(chip, lun, SENSE_TYPE_MEDIA_LUN_NOT_SUPPORT); 1642 rts51x_set_sense_type(chip, lun, SENSE_TYPE_MEDIA_LUN_NOT_SUPPORT);
1643 TRACE_RET(chip, TRANSPORT_FAILED); 1643 TRACE_RET(chip, TRANSPORT_FAILED);
1644 } 1644 }
1645 1645
1646 if (srb->cmnd[7] != KC_MG_R_PRO) { 1646 if (srb->cmnd[7] != KC_MG_R_PRO) {
1647 set_sense_type(chip, lun, SENSE_TYPE_MEDIA_INVALID_CMD_FIELD); 1647 rts51x_set_sense_type(chip, lun, SENSE_TYPE_MEDIA_INVALID_CMD_FIELD);
1648 TRACE_RET(chip, TRANSPORT_FAILED); 1648 TRACE_RET(chip, TRANSPORT_FAILED);
1649 } 1649 }
1650 1650
1651 if (!CHK_MSPRO(ms_card)) { 1651 if (!CHK_MSPRO(ms_card)) {
1652 set_sense_type(chip, lun, SENSE_TYPE_MG_INCOMPATIBLE_MEDIUM); 1652 rts51x_set_sense_type(chip, lun, SENSE_TYPE_MG_INCOMPATIBLE_MEDIUM);
1653 TRACE_RET(chip, TRANSPORT_FAILED); 1653 TRACE_RET(chip, TRANSPORT_FAILED);
1654 } 1654 }
1655 1655
@@ -1659,11 +1659,11 @@ static int mg_report_key(struct scsi_cmnd *srb, struct rts51x_chip *chip)
1659 case KF_GET_LOC_EKB: 1659 case KF_GET_LOC_EKB:
1660 if ((scsi_bufflen(srb) == 0x41C) && 1660 if ((scsi_bufflen(srb) == 0x41C) &&
1661 (srb->cmnd[8] == 0x04) && (srb->cmnd[9] == 0x1C)) { 1661 (srb->cmnd[8] == 0x04) && (srb->cmnd[9] == 0x1C)) {
1662 retval = mg_get_local_EKB(srb, chip); 1662 retval = rts51x_mg_get_local_EKB(srb, chip);
1663 if (retval != STATUS_SUCCESS) 1663 if (retval != STATUS_SUCCESS)
1664 TRACE_RET(chip, TRANSPORT_FAILED); 1664 TRACE_RET(chip, TRANSPORT_FAILED);
1665 } else { 1665 } else {
1666 set_sense_type(chip, lun, 1666 rts51x_set_sense_type(chip, lun,
1667 SENSE_TYPE_MEDIA_INVALID_CMD_FIELD); 1667 SENSE_TYPE_MEDIA_INVALID_CMD_FIELD);
1668 TRACE_RET(chip, TRANSPORT_FAILED); 1668 TRACE_RET(chip, TRANSPORT_FAILED);
1669 } 1669 }
@@ -1672,11 +1672,11 @@ static int mg_report_key(struct scsi_cmnd *srb, struct rts51x_chip *chip)
1672 case KF_RSP_CHG: 1672 case KF_RSP_CHG:
1673 if ((scsi_bufflen(srb) == 0x24) && 1673 if ((scsi_bufflen(srb) == 0x24) &&
1674 (srb->cmnd[8] == 0x00) && (srb->cmnd[9] == 0x24)) { 1674 (srb->cmnd[8] == 0x00) && (srb->cmnd[9] == 0x24)) {
1675 retval = mg_get_rsp_chg(srb, chip); 1675 retval = rts51x_mg_get_rsp_chg(srb, chip);
1676 if (retval != STATUS_SUCCESS) 1676 if (retval != STATUS_SUCCESS)
1677 TRACE_RET(chip, TRANSPORT_FAILED); 1677 TRACE_RET(chip, TRANSPORT_FAILED);
1678 } else { 1678 } else {
1679 set_sense_type(chip, lun, 1679 rts51x_set_sense_type(chip, lun,
1680 SENSE_TYPE_MEDIA_INVALID_CMD_FIELD); 1680 SENSE_TYPE_MEDIA_INVALID_CMD_FIELD);
1681 TRACE_RET(chip, TRANSPORT_FAILED); 1681 TRACE_RET(chip, TRANSPORT_FAILED);
1682 } 1682 }
@@ -1690,18 +1690,18 @@ static int mg_report_key(struct scsi_cmnd *srb, struct rts51x_chip *chip)
1690 (srb->cmnd[2] == 0x00) && 1690 (srb->cmnd[2] == 0x00) &&
1691 (srb->cmnd[3] == 0x00) && 1691 (srb->cmnd[3] == 0x00) &&
1692 (srb->cmnd[4] == 0x00) && (srb->cmnd[5] < 32)) { 1692 (srb->cmnd[4] == 0x00) && (srb->cmnd[5] < 32)) {
1693 retval = mg_get_ICV(srb, chip); 1693 retval = rts51x_mg_get_ICV(srb, chip);
1694 if (retval != STATUS_SUCCESS) 1694 if (retval != STATUS_SUCCESS)
1695 TRACE_RET(chip, TRANSPORT_FAILED); 1695 TRACE_RET(chip, TRANSPORT_FAILED);
1696 } else { 1696 } else {
1697 set_sense_type(chip, lun, 1697 rts51x_set_sense_type(chip, lun,
1698 SENSE_TYPE_MEDIA_INVALID_CMD_FIELD); 1698 SENSE_TYPE_MEDIA_INVALID_CMD_FIELD);
1699 TRACE_RET(chip, TRANSPORT_FAILED); 1699 TRACE_RET(chip, TRANSPORT_FAILED);
1700 } 1700 }
1701 break; 1701 break;
1702 1702
1703 default: 1703 default:
1704 set_sense_type(chip, lun, SENSE_TYPE_MEDIA_INVALID_CMD_FIELD); 1704 rts51x_set_sense_type(chip, lun, SENSE_TYPE_MEDIA_INVALID_CMD_FIELD);
1705 TRACE_RET(chip, TRANSPORT_FAILED); 1705 TRACE_RET(chip, TRANSPORT_FAILED);
1706 } 1706 }
1707 1707
@@ -1719,28 +1719,28 @@ static int mg_send_key(struct scsi_cmnd *srb, struct rts51x_chip *chip)
1719 rts51x_prepare_run(chip); 1719 rts51x_prepare_run(chip);
1720 RTS51X_SET_STAT(chip, STAT_RUN); 1720 RTS51X_SET_STAT(chip, STAT_RUN);
1721 1721
1722 ms_cleanup_work(chip); 1722 rts51x_ms_cleanup_work(chip);
1723 1723
1724 if (!check_card_ready(chip, lun)) { 1724 if (!check_card_ready(chip, lun)) {
1725 set_sense_type(chip, lun, SENSE_TYPE_MEDIA_NOT_PRESENT); 1725 rts51x_set_sense_type(chip, lun, SENSE_TYPE_MEDIA_NOT_PRESENT);
1726 TRACE_RET(chip, TRANSPORT_FAILED); 1726 TRACE_RET(chip, TRANSPORT_FAILED);
1727 } 1727 }
1728 if (check_card_wp(chip, lun)) { 1728 if (check_card_wp(chip, lun)) {
1729 set_sense_type(chip, lun, SENSE_TYPE_MEDIA_WRITE_PROTECT); 1729 rts51x_set_sense_type(chip, lun, SENSE_TYPE_MEDIA_WRITE_PROTECT);
1730 TRACE_RET(chip, TRANSPORT_FAILED); 1730 TRACE_RET(chip, TRANSPORT_FAILED);
1731 } 1731 }
1732 if ((get_lun_card(chip, lun) != MS_CARD)) { 1732 if ((rts51x_get_lun_card(chip, lun) != MS_CARD)) {
1733 set_sense_type(chip, lun, SENSE_TYPE_MEDIA_LUN_NOT_SUPPORT); 1733 rts51x_set_sense_type(chip, lun, SENSE_TYPE_MEDIA_LUN_NOT_SUPPORT);
1734 TRACE_RET(chip, TRANSPORT_FAILED); 1734 TRACE_RET(chip, TRANSPORT_FAILED);
1735 } 1735 }
1736 1736
1737 if (srb->cmnd[7] != KC_MG_R_PRO) { 1737 if (srb->cmnd[7] != KC_MG_R_PRO) {
1738 set_sense_type(chip, lun, SENSE_TYPE_MEDIA_INVALID_CMD_FIELD); 1738 rts51x_set_sense_type(chip, lun, SENSE_TYPE_MEDIA_INVALID_CMD_FIELD);
1739 TRACE_RET(chip, TRANSPORT_FAILED); 1739 TRACE_RET(chip, TRANSPORT_FAILED);
1740 } 1740 }
1741 1741
1742 if (!CHK_MSPRO(ms_card)) { 1742 if (!CHK_MSPRO(ms_card)) {
1743 set_sense_type(chip, lun, SENSE_TYPE_MG_INCOMPATIBLE_MEDIUM); 1743 rts51x_set_sense_type(chip, lun, SENSE_TYPE_MG_INCOMPATIBLE_MEDIUM);
1744 TRACE_RET(chip, TRANSPORT_FAILED); 1744 TRACE_RET(chip, TRANSPORT_FAILED);
1745 } 1745 }
1746 1746
@@ -1750,11 +1750,11 @@ static int mg_send_key(struct scsi_cmnd *srb, struct rts51x_chip *chip)
1750 case KF_SET_LEAF_ID: 1750 case KF_SET_LEAF_ID:
1751 if ((scsi_bufflen(srb) == 0x0C) && 1751 if ((scsi_bufflen(srb) == 0x0C) &&
1752 (srb->cmnd[8] == 0x00) && (srb->cmnd[9] == 0x0C)) { 1752 (srb->cmnd[8] == 0x00) && (srb->cmnd[9] == 0x0C)) {
1753 retval = mg_set_leaf_id(srb, chip); 1753 retval = rts51x_mg_set_leaf_id(srb, chip);
1754 if (retval != STATUS_SUCCESS) 1754 if (retval != STATUS_SUCCESS)
1755 TRACE_RET(chip, TRANSPORT_FAILED); 1755 TRACE_RET(chip, TRANSPORT_FAILED);
1756 } else { 1756 } else {
1757 set_sense_type(chip, lun, 1757 rts51x_set_sense_type(chip, lun,
1758 SENSE_TYPE_MEDIA_INVALID_CMD_FIELD); 1758 SENSE_TYPE_MEDIA_INVALID_CMD_FIELD);
1759 TRACE_RET(chip, TRANSPORT_FAILED); 1759 TRACE_RET(chip, TRANSPORT_FAILED);
1760 } 1760 }
@@ -1763,11 +1763,11 @@ static int mg_send_key(struct scsi_cmnd *srb, struct rts51x_chip *chip)
1763 case KF_CHG_HOST: 1763 case KF_CHG_HOST:
1764 if ((scsi_bufflen(srb) == 0x0C) && 1764 if ((scsi_bufflen(srb) == 0x0C) &&
1765 (srb->cmnd[8] == 0x00) && (srb->cmnd[9] == 0x0C)) { 1765 (srb->cmnd[8] == 0x00) && (srb->cmnd[9] == 0x0C)) {
1766 retval = mg_chg(srb, chip); 1766 retval = rts51x_mg_chg(srb, chip);
1767 if (retval != STATUS_SUCCESS) 1767 if (retval != STATUS_SUCCESS)
1768 TRACE_RET(chip, TRANSPORT_FAILED); 1768 TRACE_RET(chip, TRANSPORT_FAILED);
1769 } else { 1769 } else {
1770 set_sense_type(chip, lun, 1770 rts51x_set_sense_type(chip, lun,
1771 SENSE_TYPE_MEDIA_INVALID_CMD_FIELD); 1771 SENSE_TYPE_MEDIA_INVALID_CMD_FIELD);
1772 TRACE_RET(chip, TRANSPORT_FAILED); 1772 TRACE_RET(chip, TRANSPORT_FAILED);
1773 } 1773 }
@@ -1776,11 +1776,11 @@ static int mg_send_key(struct scsi_cmnd *srb, struct rts51x_chip *chip)
1776 case KF_RSP_HOST: 1776 case KF_RSP_HOST:
1777 if ((scsi_bufflen(srb) == 0x0C) && 1777 if ((scsi_bufflen(srb) == 0x0C) &&
1778 (srb->cmnd[8] == 0x00) && (srb->cmnd[9] == 0x0C)) { 1778 (srb->cmnd[8] == 0x00) && (srb->cmnd[9] == 0x0C)) {
1779 retval = mg_rsp(srb, chip); 1779 retval = rts51x_mg_rsp(srb, chip);
1780 if (retval != STATUS_SUCCESS) 1780 if (retval != STATUS_SUCCESS)
1781 TRACE_RET(chip, TRANSPORT_FAILED); 1781 TRACE_RET(chip, TRANSPORT_FAILED);
1782 } else { 1782 } else {
1783 set_sense_type(chip, lun, 1783 rts51x_set_sense_type(chip, lun,
1784 SENSE_TYPE_MEDIA_INVALID_CMD_FIELD); 1784 SENSE_TYPE_MEDIA_INVALID_CMD_FIELD);
1785 TRACE_RET(chip, TRANSPORT_FAILED); 1785 TRACE_RET(chip, TRANSPORT_FAILED);
1786 } 1786 }
@@ -1794,18 +1794,18 @@ static int mg_send_key(struct scsi_cmnd *srb, struct rts51x_chip *chip)
1794 (srb->cmnd[2] == 0x00) && 1794 (srb->cmnd[2] == 0x00) &&
1795 (srb->cmnd[3] == 0x00) && 1795 (srb->cmnd[3] == 0x00) &&
1796 (srb->cmnd[4] == 0x00) && (srb->cmnd[5] < 32)) { 1796 (srb->cmnd[4] == 0x00) && (srb->cmnd[5] < 32)) {
1797 retval = mg_set_ICV(srb, chip); 1797 retval = rts51x_mg_set_ICV(srb, chip);
1798 if (retval != STATUS_SUCCESS) 1798 if (retval != STATUS_SUCCESS)
1799 TRACE_RET(chip, TRANSPORT_FAILED); 1799 TRACE_RET(chip, TRANSPORT_FAILED);
1800 } else { 1800 } else {
1801 set_sense_type(chip, lun, 1801 rts51x_set_sense_type(chip, lun,
1802 SENSE_TYPE_MEDIA_INVALID_CMD_FIELD); 1802 SENSE_TYPE_MEDIA_INVALID_CMD_FIELD);
1803 TRACE_RET(chip, TRANSPORT_FAILED); 1803 TRACE_RET(chip, TRANSPORT_FAILED);
1804 } 1804 }
1805 break; 1805 break;
1806 1806
1807 default: 1807 default:
1808 set_sense_type(chip, lun, SENSE_TYPE_MEDIA_INVALID_CMD_FIELD); 1808 rts51x_set_sense_type(chip, lun, SENSE_TYPE_MEDIA_INVALID_CMD_FIELD);
1809 TRACE_RET(chip, TRANSPORT_FAILED); 1809 TRACE_RET(chip, TRANSPORT_FAILED);
1810 } 1810 }
1811 1811
@@ -1820,12 +1820,12 @@ int rts51x_scsi_handler(struct scsi_cmnd *srb, struct rts51x_chip *chip)
1820 unsigned int lun = SCSI_LUN(srb); 1820 unsigned int lun = SCSI_LUN(srb);
1821 int result = TRANSPORT_GOOD; 1821 int result = TRANSPORT_GOOD;
1822 1822
1823 if ((get_lun_card(chip, lun) == MS_CARD) && 1823 if ((rts51x_get_lun_card(chip, lun) == MS_CARD) &&
1824 (ms_card->format_status == FORMAT_IN_PROGRESS)) { 1824 (ms_card->format_status == FORMAT_IN_PROGRESS)) {
1825 if ((srb->cmnd[0] != REQUEST_SENSE) 1825 if ((srb->cmnd[0] != REQUEST_SENSE)
1826 && (srb->cmnd[0] != INQUIRY)) { 1826 && (srb->cmnd[0] != INQUIRY)) {
1827 /* Logical Unit Not Ready Format in Progress */ 1827 /* Logical Unit Not Ready Format in Progress */
1828 set_sense_data(chip, lun, CUR_ERR, 0x02, 0, 0x04, 0x04, 1828 rts51x_set_sense_data(chip, lun, CUR_ERR, 0x02, 0, 0x04, 0x04,
1829 0, (u16) (ms_card->progress)); 1829 0, (u16) (ms_card->progress));
1830 TRACE_RET(chip, TRANSPORT_FAILED); 1830 TRACE_RET(chip, TRANSPORT_FAILED);
1831 } 1831 }
@@ -1908,7 +1908,7 @@ int rts51x_scsi_handler(struct scsi_cmnd *srb, struct rts51x_chip *chip)
1908 break; 1908 break;
1909 1909
1910 default: 1910 default:
1911 set_sense_type(chip, lun, SENSE_TYPE_MEDIA_INVALID_CMD_FIELD); 1911 rts51x_set_sense_type(chip, lun, SENSE_TYPE_MEDIA_INVALID_CMD_FIELD);
1912 result = TRANSPORT_FAILED; 1912 result = TRANSPORT_FAILED;
1913 } 1913 }
1914 1914
diff --git a/drivers/staging/rts5139/rts51x_scsi.h b/drivers/staging/rts5139/rts51x_scsi.h
index 9042bc98a9a0..cdfe550371ce 100644
--- a/drivers/staging/rts5139/rts51x_scsi.h
+++ b/drivers/staging/rts5139/rts51x_scsi.h
@@ -133,9 +133,9 @@ struct rts51x_chip;
133 133
134#define SCSI 0x00 /* Interface ID */ 134#define SCSI 0x00 /* Interface ID */
135 135
136void scsi_show_command(struct scsi_cmnd *srb); 136void rts51x_scsi_show_command(struct scsi_cmnd *srb);
137void set_sense_type(struct rts51x_chip *chip, unsigned int lun, int sense_type); 137void rts51x_set_sense_type(struct rts51x_chip *chip, unsigned int lun, int sense_type);
138void set_sense_data(struct rts51x_chip *chip, unsigned int lun, u8 err_code, 138void rts51x_set_sense_data(struct rts51x_chip *chip, unsigned int lun, u8 err_code,
139 u8 sense_key, u32 info, u8 asc, u8 ascq, u8 sns_key_info0, 139 u8 sense_key, u32 info, u8 asc, u8 ascq, u8 sns_key_info0,
140 u16 sns_key_info1); 140 u16 sns_key_info1);
141 141
diff --git a/drivers/staging/rts5139/sd.c b/drivers/staging/rts5139/sd.c
index b739f26f78cc..4283b0917f24 100644
--- a/drivers/staging/rts5139/sd.c
+++ b/drivers/staging/rts5139/sd.c
@@ -680,7 +680,7 @@ static int sd_set_init_para(struct rts51x_chip *chip)
680 return STATUS_SUCCESS; 680 return STATUS_SUCCESS;
681} 681}
682 682
683int sd_select_card(struct rts51x_chip *chip, int select) 683int rts51x_sd_select_card(struct rts51x_chip *chip, int select)
684{ 684{
685 struct sd_info *sd_card = &(chip->sd_card); 685 struct sd_info *sd_card = &(chip->sd_card);
686 int retval; 686 int retval;
@@ -1747,7 +1747,7 @@ static int mmc_ddr_tuning(struct rts51x_chip *chip)
1747 return STATUS_SUCCESS; 1747 return STATUS_SUCCESS;
1748} 1748}
1749 1749
1750int sd_switch_clock(struct rts51x_chip *chip) 1750int rts51x_sd_switch_clock(struct rts51x_chip *chip)
1751{ 1751{
1752 struct sd_info *sd_card = &(chip->sd_card); 1752 struct sd_info *sd_card = &(chip->sd_card);
1753 int retval; 1753 int retval;
@@ -1913,7 +1913,7 @@ static int sd_init_power(struct rts51x_chip *chip)
1913#endif 1913#endif
1914 1914
1915 /* Power on card */ 1915 /* Power on card */
1916 retval = card_power_on(chip, SD_CARD); 1916 retval = rts51x_card_power_on(chip, SD_CARD);
1917 if (retval != STATUS_SUCCESS) 1917 if (retval != STATUS_SUCCESS)
1918 TRACE_RET(chip, retval); 1918 TRACE_RET(chip, retval);
1919 1919
@@ -2139,7 +2139,7 @@ RTY_CMD55:
2139 if (retval != STATUS_SUCCESS) 2139 if (retval != STATUS_SUCCESS)
2140 TRACE_RET(chip, retval); 2140 TRACE_RET(chip, retval);
2141 /* Select SD card */ 2141 /* Select SD card */
2142 retval = sd_select_card(chip, 1); 2142 retval = rts51x_sd_select_card(chip, 1);
2143 if (retval != STATUS_SUCCESS) 2143 if (retval != STATUS_SUCCESS)
2144 TRACE_RET(chip, retval); 2144 TRACE_RET(chip, retval);
2145 2145
@@ -2656,7 +2656,7 @@ RTY_MMC_RST:
2656 spec_ver = (sd_card->raw_csd[0] & 0x3C) >> 2; 2656 spec_ver = (sd_card->raw_csd[0] & 0x3C) >> 2;
2657 2657
2658 /* Select MMC card */ 2658 /* Select MMC card */
2659 retval = sd_select_card(chip, 1); 2659 retval = rts51x_sd_select_card(chip, 1);
2660 if (retval != STATUS_SUCCESS) 2660 if (retval != STATUS_SUCCESS)
2661 TRACE_RET(chip, retval); 2661 TRACE_RET(chip, retval);
2662 2662
@@ -2748,7 +2748,7 @@ RTY_MMC_RST:
2748 return STATUS_SUCCESS; 2748 return STATUS_SUCCESS;
2749} 2749}
2750 2750
2751int reset_sd_card(struct rts51x_chip *chip) 2751int rts51x_reset_sd_card(struct rts51x_chip *chip)
2752{ 2752{
2753 struct sd_info *sd_card = &(chip->sd_card); 2753 struct sd_info *sd_card = &(chip->sd_card);
2754 int retval; 2754 int retval;
@@ -2764,7 +2764,7 @@ int reset_sd_card(struct rts51x_chip *chip)
2764 sd_card->sd_switch_fail = 0; 2764 sd_card->sd_switch_fail = 0;
2765 2765
2766 sd_clear_reset_fail(chip); 2766 sd_clear_reset_fail(chip);
2767 enable_card_clock(chip, SD_CARD); 2767 rts51x_enable_card_clock(chip, SD_CARD);
2768 2768
2769 sd_init_power(chip); 2769 sd_init_power(chip);
2770 2770
@@ -2891,7 +2891,7 @@ static void sd_stop_seq_mode(struct rts51x_chip *chip)
2891 int retval; 2891 int retval;
2892 2892
2893 if (sd_card->seq_mode) { 2893 if (sd_card->seq_mode) {
2894 retval = sd_switch_clock(chip); 2894 retval = rts51x_sd_switch_clock(chip);
2895 if (retval != STATUS_SUCCESS) 2895 if (retval != STATUS_SUCCESS)
2896 return; 2896 return;
2897 2897
@@ -2923,14 +2923,14 @@ static inline int sd_auto_tune_clock(struct rts51x_chip *chip)
2923 sd_card->sd_clock = CLK_50; 2923 sd_card->sd_clock = CLK_50;
2924 } 2924 }
2925 2925
2926 retval = sd_switch_clock(chip); 2926 retval = rts51x_sd_switch_clock(chip);
2927 if (retval != STATUS_SUCCESS) 2927 if (retval != STATUS_SUCCESS)
2928 TRACE_RET(chip, retval); 2928 TRACE_RET(chip, retval);
2929 2929
2930 return STATUS_SUCCESS; 2930 return STATUS_SUCCESS;
2931} 2931}
2932 2932
2933int sd_rw(struct scsi_cmnd *srb, struct rts51x_chip *chip, u32 start_sector, 2933int rts51x_sd_rw(struct scsi_cmnd *srb, struct rts51x_chip *chip, u32 start_sector,
2934 u16 sector_cnt) 2934 u16 sector_cnt)
2935{ 2935{
2936 struct sd_info *sd_card = &(chip->sd_card); 2936 struct sd_info *sd_card = &(chip->sd_card);
@@ -2947,11 +2947,11 @@ int sd_rw(struct scsi_cmnd *srb, struct rts51x_chip *chip, u32 start_sector,
2947 else 2947 else
2948 data_addr = start_sector; 2948 data_addr = start_sector;
2949 2949
2950 RTS51X_DEBUGP("sd_rw, data_addr = 0x%x\n", data_addr); 2950 RTS51X_DEBUGP("rts51x_sd_rw, data_addr = 0x%x\n", data_addr);
2951 2951
2952 sd_clr_err_code(chip); 2952 sd_clr_err_code(chip);
2953 2953
2954 retval = sd_switch_clock(chip); 2954 retval = rts51x_sd_switch_clock(chip);
2955 if (retval != STATUS_SUCCESS) 2955 if (retval != STATUS_SUCCESS)
2956 TRACE_RET(chip, retval); 2956 TRACE_RET(chip, retval);
2957 2957
@@ -3020,7 +3020,7 @@ int sd_rw(struct scsi_cmnd *srb, struct rts51x_chip *chip, u32 start_sector,
3020 SD_NO_WAIT_BUSY_END | SD_NO_CHECK_CRC7 | 3020 SD_NO_WAIT_BUSY_END | SD_NO_CHECK_CRC7 |
3021 SD_RSP_LEN_0); 3021 SD_RSP_LEN_0);
3022 3022
3023 trans_dma_enable(srb->sc_data_direction, chip, sector_cnt * 512, 3023 rts51x_trans_dma_enable(srb->sc_data_direction, chip, sector_cnt * 512,
3024 DMA_512); 3024 DMA_512);
3025 3025
3026 if (srb->sc_data_direction == DMA_FROM_DEVICE) { 3026 if (srb->sc_data_direction == DMA_FROM_DEVICE) {
@@ -3058,7 +3058,7 @@ int sd_rw(struct scsi_cmnd *srb, struct rts51x_chip *chip, u32 start_sector,
3058 SD_NO_WAIT_BUSY_END | SD_CHECK_CRC7 | 3058 SD_NO_WAIT_BUSY_END | SD_CHECK_CRC7 |
3059 SD_RSP_LEN_6); 3059 SD_RSP_LEN_6);
3060 3060
3061 trans_dma_enable(srb->sc_data_direction, chip, 3061 rts51x_trans_dma_enable(srb->sc_data_direction, chip,
3062 sector_cnt * 512, DMA_512); 3062 sector_cnt * 512, DMA_512);
3063 3063
3064 rts51x_add_cmd(chip, WRITE_REG_CMD, SD_TRANSFER, 0xFF, 3064 rts51x_add_cmd(chip, WRITE_REG_CMD, SD_TRANSFER, 0xFF,
@@ -3099,7 +3099,7 @@ int sd_rw(struct scsi_cmnd *srb, struct rts51x_chip *chip, u32 start_sector,
3099 SD_NO_WAIT_BUSY_END | SD_NO_CHECK_CRC7 | 3099 SD_NO_WAIT_BUSY_END | SD_NO_CHECK_CRC7 |
3100 SD_RSP_LEN_0); 3100 SD_RSP_LEN_0);
3101 3101
3102 trans_dma_enable(srb->sc_data_direction, chip, 3102 rts51x_trans_dma_enable(srb->sc_data_direction, chip,
3103 sector_cnt * 512, DMA_512); 3103 sector_cnt * 512, DMA_512);
3104 3104
3105 rts51x_add_cmd(chip, WRITE_REG_CMD, SD_TRANSFER, 0xFF, 3105 rts51x_add_cmd(chip, WRITE_REG_CMD, SD_TRANSFER, 0xFF,
@@ -3168,7 +3168,7 @@ int sd_rw(struct scsi_cmnd *srb, struct rts51x_chip *chip, u32 start_sector,
3168 return STATUS_SUCCESS; 3168 return STATUS_SUCCESS;
3169} 3169}
3170 3170
3171void sd_cleanup_work(struct rts51x_chip *chip) 3171void rts51x_sd_cleanup_work(struct rts51x_chip *chip)
3172{ 3172{
3173 struct sd_info *sd_card = &(chip->sd_card); 3173 struct sd_info *sd_card = &(chip->sd_card);
3174 3174
@@ -3220,12 +3220,12 @@ static int sd_power_off_card3v3(struct rts51x_chip *chip)
3220 return STATUS_SUCCESS; 3220 return STATUS_SUCCESS;
3221} 3221}
3222 3222
3223int release_sd_card(struct rts51x_chip *chip) 3223int rts51x_release_sd_card(struct rts51x_chip *chip)
3224{ 3224{
3225 struct sd_info *sd_card = &(chip->sd_card); 3225 struct sd_info *sd_card = &(chip->sd_card);
3226 int retval; 3226 int retval;
3227 3227
3228 RTS51X_DEBUGP("release_sd_card\n"); 3228 RTS51X_DEBUGP("rts51x_release_sd_card\n");
3229 3229
3230 chip->card_ready &= ~SD_CARD; 3230 chip->card_ready &= ~SD_CARD;
3231 chip->card_fail &= ~SD_CARD; 3231 chip->card_fail &= ~SD_CARD;
diff --git a/drivers/staging/rts5139/sd.h b/drivers/staging/rts5139/sd.h
index de155d8e682d..7dd943f54c74 100644
--- a/drivers/staging/rts5139/sd.h
+++ b/drivers/staging/rts5139/sd.h
@@ -256,13 +256,13 @@ struct timing_phase_path {
256 int len; 256 int len;
257}; 257};
258 258
259int sd_select_card(struct rts51x_chip *chip, int select); 259int rts51x_sd_select_card(struct rts51x_chip *chip, int select);
260int reset_sd_card(struct rts51x_chip *chip); 260int rts51x_reset_sd_card(struct rts51x_chip *chip);
261int sd_switch_clock(struct rts51x_chip *chip); 261int rts51x_sd_switch_clock(struct rts51x_chip *chip);
262int sd_rw(struct scsi_cmnd *srb, struct rts51x_chip *chip, u32 start_sector, 262int rts51x_sd_rw(struct scsi_cmnd *srb, struct rts51x_chip *chip, u32 start_sector,
263 u16 sector_cnt); 263 u16 sector_cnt);
264void sd_cleanup_work(struct rts51x_chip *chip); 264void rts51x_sd_cleanup_work(struct rts51x_chip *chip);
265int release_sd_card(struct rts51x_chip *chip); 265int rts51x_release_sd_card(struct rts51x_chip *chip);
266 266
267#ifdef SUPPORT_CPRM 267#ifdef SUPPORT_CPRM
268extern int reset_sd(struct rts51x_chip *chip); 268extern int reset_sd(struct rts51x_chip *chip);
diff --git a/drivers/staging/rts5139/sd_cprm.c b/drivers/staging/rts5139/sd_cprm.c
index 0167f7f35c20..d4689839e15a 100644
--- a/drivers/staging/rts5139/sd_cprm.c
+++ b/drivers/staging/rts5139/sd_cprm.c
@@ -269,7 +269,7 @@ static int ext_sd_get_rsp(struct rts51x_chip *chip, int len,
269 return STATUS_SUCCESS; 269 return STATUS_SUCCESS;
270} 270}
271 271
272int ext_sd_execute_no_data(struct rts51x_chip *chip, unsigned int lun, 272int ext_rts51x_sd_execute_no_data(struct rts51x_chip *chip, unsigned int lun,
273 u8 cmd_idx, u8 standby, u8 acmd, u8 rsp_code, 273 u8 cmd_idx, u8 standby, u8 acmd, u8 rsp_code,
274 u32 arg) 274 u32 arg)
275{ 275{
@@ -277,30 +277,30 @@ int ext_sd_execute_no_data(struct rts51x_chip *chip, unsigned int lun,
277 int retval, rsp_len; 277 int retval, rsp_len;
278 u8 rsp_type; 278 u8 rsp_type;
279 279
280 retval = sd_switch_clock(chip); 280 retval = rts51x_sd_switch_clock(chip);
281 if (retval != STATUS_SUCCESS) 281 if (retval != STATUS_SUCCESS)
282 TRACE_RET(chip, TRANSPORT_FAILED); 282 TRACE_RET(chip, TRANSPORT_FAILED);
283 283
284 if (sd_card->pre_cmd_err) { 284 if (sd_card->pre_cmd_err) {
285 sd_card->pre_cmd_err = 0; 285 sd_card->pre_cmd_err = 0;
286 set_sense_type(chip, lun, SENSE_TYPE_MEDIA_CHANGE); 286 rts51x_set_sense_type(chip, lun, SENSE_TYPE_MEDIA_CHANGE);
287 TRACE_RET(chip, TRANSPORT_FAILED); 287 TRACE_RET(chip, TRANSPORT_FAILED);
288 } 288 }
289 retval = get_rsp_type(rsp_code, &rsp_type, &rsp_len); 289 retval = get_rsp_type(rsp_code, &rsp_type, &rsp_len);
290 if (retval != STATUS_SUCCESS) { 290 if (retval != STATUS_SUCCESS) {
291 set_sense_type(chip, lun, SENSE_TYPE_MEDIA_INVALID_CMD_FIELD); 291 rts51x_set_sense_type(chip, lun, SENSE_TYPE_MEDIA_INVALID_CMD_FIELD);
292 TRACE_RET(chip, TRANSPORT_FAILED); 292 TRACE_RET(chip, TRANSPORT_FAILED);
293 } 293 }
294 sd_card->last_rsp_type = rsp_type; 294 sd_card->last_rsp_type = rsp_type;
295 295
296 retval = sd_switch_clock(chip); 296 retval = rts51x_sd_switch_clock(chip);
297 if (retval != STATUS_SUCCESS) 297 if (retval != STATUS_SUCCESS)
298 TRACE_RET(chip, TRANSPORT_FAILED); 298 TRACE_RET(chip, TRANSPORT_FAILED);
299 /* Set H/W SD/MMC Bus Width */ 299 /* Set H/W SD/MMC Bus Width */
300 rts51x_write_register(chip, SD_CFG1, 0x03, SD_BUS_WIDTH_4); 300 rts51x_write_register(chip, SD_CFG1, 0x03, SD_BUS_WIDTH_4);
301 301
302 if (standby) { 302 if (standby) {
303 retval = sd_select_card(chip, 0); 303 retval = rts51x_sd_select_card(chip, 0);
304 if (retval != STATUS_SUCCESS) 304 if (retval != STATUS_SUCCESS)
305 TRACE_GOTO(chip, SD_Execute_Cmd_Failed); 305 TRACE_GOTO(chip, SD_Execute_Cmd_Failed);
306 } 306 }
@@ -319,7 +319,7 @@ int ext_sd_execute_no_data(struct rts51x_chip *chip, unsigned int lun,
319 TRACE_GOTO(chip, SD_Execute_Cmd_Failed); 319 TRACE_GOTO(chip, SD_Execute_Cmd_Failed);
320 320
321 if (standby) { 321 if (standby) {
322 retval = sd_select_card(chip, 1); 322 retval = rts51x_sd_select_card(chip, 1);
323 if (retval != STATUS_SUCCESS) 323 if (retval != STATUS_SUCCESS)
324 TRACE_GOTO(chip, SD_Execute_Cmd_Failed); 324 TRACE_GOTO(chip, SD_Execute_Cmd_Failed);
325 } 325 }
@@ -328,16 +328,16 @@ int ext_sd_execute_no_data(struct rts51x_chip *chip, unsigned int lun,
328 328
329SD_Execute_Cmd_Failed: 329SD_Execute_Cmd_Failed:
330 sd_card->pre_cmd_err = 1; 330 sd_card->pre_cmd_err = 1;
331 set_sense_type(chip, lun, SENSE_TYPE_NO_SENSE); 331 rts51x_set_sense_type(chip, lun, SENSE_TYPE_NO_SENSE);
332 release_sd_card(chip); 332 rts51x_release_sd_card(chip);
333 do_reset_sd_card(chip); 333 rts51x_do_rts51x_reset_sd_card(chip);
334 if (!(chip->card_ready & SD_CARD)) 334 if (!(chip->card_ready & SD_CARD))
335 set_sense_type(chip, lun, SENSE_TYPE_MEDIA_NOT_PRESENT); 335 rts51x_set_sense_type(chip, lun, SENSE_TYPE_MEDIA_NOT_PRESENT);
336 336
337 TRACE_RET(chip, TRANSPORT_FAILED); 337 TRACE_RET(chip, TRANSPORT_FAILED);
338} 338}
339 339
340int ext_sd_execute_read_data(struct rts51x_chip *chip, unsigned int lun, 340int ext_rts51x_sd_execute_read_data(struct rts51x_chip *chip, unsigned int lun,
341 u8 cmd_idx, u8 cmd12, u8 standby, 341 u8 cmd_idx, u8 cmd12, u8 standby,
342 u8 acmd, u8 rsp_code, u32 arg, u32 data_len, 342 u8 acmd, u8 rsp_code, u32 arg, u32 data_len,
343 void *data_buf, unsigned int buf_len, int use_sg) 343 void *data_buf, unsigned int buf_len, int use_sg)
@@ -349,21 +349,21 @@ int ext_sd_execute_read_data(struct rts51x_chip *chip, unsigned int lun,
349 349
350 if (sd_card->pre_cmd_err) { 350 if (sd_card->pre_cmd_err) {
351 sd_card->pre_cmd_err = 0; 351 sd_card->pre_cmd_err = 0;
352 set_sense_type(chip, lun, SENSE_TYPE_MEDIA_CHANGE); 352 rts51x_set_sense_type(chip, lun, SENSE_TYPE_MEDIA_CHANGE);
353 TRACE_RET(chip, TRANSPORT_FAILED); 353 TRACE_RET(chip, TRANSPORT_FAILED);
354 } 354 }
355 355
356 retval = sd_switch_clock(chip); 356 retval = rts51x_sd_switch_clock(chip);
357 if (retval != STATUS_SUCCESS) 357 if (retval != STATUS_SUCCESS)
358 TRACE_RET(chip, STATUS_FAIL); 358 TRACE_RET(chip, STATUS_FAIL);
359 retval = get_rsp_type(rsp_code, &rsp_type, &rsp_len); 359 retval = get_rsp_type(rsp_code, &rsp_type, &rsp_len);
360 if (retval != STATUS_SUCCESS) { 360 if (retval != STATUS_SUCCESS) {
361 set_sense_type(chip, lun, SENSE_TYPE_MEDIA_INVALID_CMD_FIELD); 361 rts51x_set_sense_type(chip, lun, SENSE_TYPE_MEDIA_INVALID_CMD_FIELD);
362 TRACE_RET(chip, TRANSPORT_FAILED); 362 TRACE_RET(chip, TRANSPORT_FAILED);
363 } 363 }
364 sd_card->last_rsp_type = rsp_type; 364 sd_card->last_rsp_type = rsp_type;
365 365
366 retval = sd_switch_clock(chip); 366 retval = rts51x_sd_switch_clock(chip);
367 if (retval != STATUS_SUCCESS) 367 if (retval != STATUS_SUCCESS)
368 TRACE_RET(chip, TRANSPORT_FAILED); 368 TRACE_RET(chip, TRANSPORT_FAILED);
369 bus_width = SD_BUS_WIDTH_4; 369 bus_width = SD_BUS_WIDTH_4;
@@ -376,7 +376,7 @@ int ext_sd_execute_read_data(struct rts51x_chip *chip, unsigned int lun,
376 } 376 }
377 377
378 if (standby) { 378 if (standby) {
379 retval = sd_select_card(chip, 0); 379 retval = rts51x_sd_select_card(chip, 0);
380 if (retval != STATUS_SUCCESS) 380 if (retval != STATUS_SUCCESS)
381 TRACE_GOTO(chip, SD_Execute_Read_Cmd_Failed); 381 TRACE_GOTO(chip, SD_Execute_Read_Cmd_Failed);
382 } 382 }
@@ -448,7 +448,7 @@ int ext_sd_execute_read_data(struct rts51x_chip *chip, unsigned int lun,
448 rts51x_add_cmd(chip, WRITE_REG_CMD, SD_CMD4, 0xFF, (u8) arg); 448 rts51x_add_cmd(chip, WRITE_REG_CMD, SD_CMD4, 0xFF, (u8) arg);
449 rts51x_add_cmd(chip, WRITE_REG_CMD, SD_CFG1, 0x03, bus_width); 449 rts51x_add_cmd(chip, WRITE_REG_CMD, SD_CFG1, 0x03, bus_width);
450 rts51x_add_cmd(chip, WRITE_REG_CMD, SD_CFG2, 0xFF, rsp_type); 450 rts51x_add_cmd(chip, WRITE_REG_CMD, SD_CFG2, 0xFF, rsp_type);
451 trans_dma_enable(DMA_FROM_DEVICE, chip, data_len, DMA_512); 451 rts51x_trans_dma_enable(DMA_FROM_DEVICE, chip, data_len, DMA_512);
452 rts51x_add_cmd(chip, WRITE_REG_CMD, SD_TRANSFER, 0xFF, 452 rts51x_add_cmd(chip, WRITE_REG_CMD, SD_TRANSFER, 0xFF,
453 SD_TM_AUTO_READ_2 | SD_TRANSFER_START); 453 SD_TM_AUTO_READ_2 | SD_TRANSFER_START);
454 rts51x_add_cmd(chip, CHECK_REG_CMD, SD_TRANSFER, 454 rts51x_add_cmd(chip, CHECK_REG_CMD, SD_TRANSFER,
@@ -490,7 +490,7 @@ int ext_sd_execute_read_data(struct rts51x_chip *chip, unsigned int lun,
490 TRACE_GOTO(chip, SD_Execute_Read_Cmd_Failed); 490 TRACE_GOTO(chip, SD_Execute_Read_Cmd_Failed);
491 491
492 if (standby) { 492 if (standby) {
493 retval = sd_select_card(chip, 1); 493 retval = rts51x_sd_select_card(chip, 1);
494 if (retval != STATUS_SUCCESS) 494 if (retval != STATUS_SUCCESS)
495 TRACE_GOTO(chip, SD_Execute_Read_Cmd_Failed); 495 TRACE_GOTO(chip, SD_Execute_Read_Cmd_Failed);
496 } 496 }
@@ -531,18 +531,18 @@ int ext_sd_execute_read_data(struct rts51x_chip *chip, unsigned int lun,
531 531
532SD_Execute_Read_Cmd_Failed: 532SD_Execute_Read_Cmd_Failed:
533 sd_card->pre_cmd_err = 1; 533 sd_card->pre_cmd_err = 1;
534 set_sense_type(chip, lun, SENSE_TYPE_NO_SENSE); 534 rts51x_set_sense_type(chip, lun, SENSE_TYPE_NO_SENSE);
535 if (read_err) 535 if (read_err)
536 set_sense_type(chip, lun, SENSE_TYPE_MEDIA_UNRECOVER_READ_ERR); 536 rts51x_set_sense_type(chip, lun, SENSE_TYPE_MEDIA_UNRECOVER_READ_ERR);
537 release_sd_card(chip); 537 rts51x_release_sd_card(chip);
538 do_reset_sd_card(chip); 538 rts51x_do_rts51x_reset_sd_card(chip);
539 if (!(chip->card_ready & SD_CARD)) 539 if (!(chip->card_ready & SD_CARD))
540 set_sense_type(chip, lun, SENSE_TYPE_MEDIA_NOT_PRESENT); 540 rts51x_set_sense_type(chip, lun, SENSE_TYPE_MEDIA_NOT_PRESENT);
541 541
542 TRACE_RET(chip, TRANSPORT_FAILED); 542 TRACE_RET(chip, TRANSPORT_FAILED);
543} 543}
544 544
545int ext_sd_execute_write_data(struct rts51x_chip *chip, unsigned int lun, 545int ext_rts51x_sd_execute_write_data(struct rts51x_chip *chip, unsigned int lun,
546 u8 cmd_idx, u8 cmd12, u8 standby, u8 acmd, 546 u8 cmd_idx, u8 cmd12, u8 standby, u8 acmd,
547 u8 rsp_code, u32 arg, u32 data_len, 547 u8 rsp_code, u32 arg, u32 data_len,
548 void *data_buf, unsigned int buf_len, int use_sg) 548 void *data_buf, unsigned int buf_len, int use_sg)
@@ -555,22 +555,22 @@ int ext_sd_execute_write_data(struct rts51x_chip *chip, unsigned int lun,
555 555
556 if (sd_card->pre_cmd_err) { 556 if (sd_card->pre_cmd_err) {
557 sd_card->pre_cmd_err = 0; 557 sd_card->pre_cmd_err = 0;
558 set_sense_type(chip, lun, SENSE_TYPE_MEDIA_CHANGE); 558 rts51x_set_sense_type(chip, lun, SENSE_TYPE_MEDIA_CHANGE);
559 TRACE_RET(chip, TRANSPORT_FAILED); 559 TRACE_RET(chip, TRANSPORT_FAILED);
560 } 560 }
561 561
562 retval = sd_switch_clock(chip); 562 retval = rts51x_sd_switch_clock(chip);
563 if (retval != STATUS_SUCCESS) 563 if (retval != STATUS_SUCCESS)
564 TRACE_RET(chip, STATUS_FAIL); 564 TRACE_RET(chip, STATUS_FAIL);
565 565
566 retval = get_rsp_type(rsp_code, &rsp_type, &rsp_len); 566 retval = get_rsp_type(rsp_code, &rsp_type, &rsp_len);
567 if (retval != STATUS_SUCCESS) { 567 if (retval != STATUS_SUCCESS) {
568 set_sense_type(chip, lun, SENSE_TYPE_MEDIA_INVALID_CMD_FIELD); 568 rts51x_set_sense_type(chip, lun, SENSE_TYPE_MEDIA_INVALID_CMD_FIELD);
569 TRACE_RET(chip, TRANSPORT_FAILED); 569 TRACE_RET(chip, TRANSPORT_FAILED);
570 } 570 }
571 sd_card->last_rsp_type = rsp_type; 571 sd_card->last_rsp_type = rsp_type;
572 572
573 retval = sd_switch_clock(chip); 573 retval = rts51x_sd_switch_clock(chip);
574 if (retval != STATUS_SUCCESS) 574 if (retval != STATUS_SUCCESS)
575 TRACE_RET(chip, TRANSPORT_FAILED); 575 TRACE_RET(chip, TRANSPORT_FAILED);
576 rts51x_write_register(chip, SD_CFG1, 0x03, SD_BUS_WIDTH_4); 576 rts51x_write_register(chip, SD_CFG1, 0x03, SD_BUS_WIDTH_4);
@@ -583,7 +583,7 @@ int ext_sd_execute_write_data(struct rts51x_chip *chip, unsigned int lun,
583 } 583 }
584 584
585 if (standby) { 585 if (standby) {
586 retval = sd_select_card(chip, 0); 586 retval = rts51x_sd_select_card(chip, 0);
587 if (retval != STATUS_SUCCESS) 587 if (retval != STATUS_SUCCESS)
588 TRACE_GOTO(chip, SD_Execute_Write_Cmd_Failed); 588 TRACE_GOTO(chip, SD_Execute_Write_Cmd_Failed);
589 } 589 }
@@ -690,7 +690,7 @@ int ext_sd_execute_write_data(struct rts51x_chip *chip, unsigned int lun,
690 rts51x_add_cmd(chip, WRITE_REG_CMD, SD_BLOCK_CNT_L, 690 rts51x_add_cmd(chip, WRITE_REG_CMD, SD_BLOCK_CNT_L,
691 0xFF, (u8) ((data_len & 0x0001FE00) >> 9)); 691 0xFF, (u8) ((data_len & 0x0001FE00) >> 9));
692 692
693 trans_dma_enable(DMA_TO_DEVICE, chip, data_len, DMA_512); 693 rts51x_trans_dma_enable(DMA_TO_DEVICE, chip, data_len, DMA_512);
694 694
695 rts51x_add_cmd(chip, WRITE_REG_CMD, SD_TRANSFER, 0xFF, 695 rts51x_add_cmd(chip, WRITE_REG_CMD, SD_TRANSFER, 0xFF,
696 SD_TM_AUTO_WRITE_3 | SD_TRANSFER_START); 696 SD_TM_AUTO_WRITE_3 | SD_TRANSFER_START);
@@ -724,7 +724,7 @@ int ext_sd_execute_write_data(struct rts51x_chip *chip, unsigned int lun,
724 } 724 }
725 725
726 if (standby) { 726 if (standby) {
727 retval = sd_select_card(chip, 1); 727 retval = rts51x_sd_select_card(chip, 1);
728 if (retval != STATUS_SUCCESS) 728 if (retval != STATUS_SUCCESS)
729 TRACE_GOTO(chip, SD_Execute_Write_Cmd_Failed); 729 TRACE_GOTO(chip, SD_Execute_Write_Cmd_Failed);
730 } 730 }
@@ -767,18 +767,18 @@ int ext_sd_execute_write_data(struct rts51x_chip *chip, unsigned int lun,
767 767
768SD_Execute_Write_Cmd_Failed: 768SD_Execute_Write_Cmd_Failed:
769 sd_card->pre_cmd_err = 1; 769 sd_card->pre_cmd_err = 1;
770 set_sense_type(chip, lun, SENSE_TYPE_NO_SENSE); 770 rts51x_set_sense_type(chip, lun, SENSE_TYPE_NO_SENSE);
771 if (write_err) 771 if (write_err)
772 set_sense_type(chip, lun, SENSE_TYPE_MEDIA_WRITE_ERR); 772 rts51x_set_sense_type(chip, lun, SENSE_TYPE_MEDIA_WRITE_ERR);
773 release_sd_card(chip); 773 rts51x_release_sd_card(chip);
774 do_reset_sd_card(chip); 774 rts51x_do_rts51x_reset_sd_card(chip);
775 if (!(chip->card_ready & SD_CARD)) 775 if (!(chip->card_ready & SD_CARD))
776 set_sense_type(chip, lun, SENSE_TYPE_MEDIA_NOT_PRESENT); 776 rts51x_set_sense_type(chip, lun, SENSE_TYPE_MEDIA_NOT_PRESENT);
777 777
778 TRACE_RET(chip, TRANSPORT_FAILED); 778 TRACE_RET(chip, TRANSPORT_FAILED);
779} 779}
780 780
781int sd_pass_thru_mode(struct scsi_cmnd *srb, struct rts51x_chip *chip) 781int rts51x_sd_pass_thru_mode(struct scsi_cmnd *srb, struct rts51x_chip *chip)
782{ 782{
783 struct sd_info *sd_card = &(chip->sd_card); 783 struct sd_info *sd_card = &(chip->sd_card);
784 unsigned int lun = SCSI_LUN(srb); 784 unsigned int lun = SCSI_LUN(srb);
@@ -808,7 +808,7 @@ int sd_pass_thru_mode(struct scsi_cmnd *srb, struct rts51x_chip *chip)
808 808
809 if (!(CHK_BIT(chip->lun_mc, lun))) { 809 if (!(CHK_BIT(chip->lun_mc, lun))) {
810 SET_BIT(chip->lun_mc, lun); 810 SET_BIT(chip->lun_mc, lun);
811 set_sense_type(chip, lun, SENSE_TYPE_MEDIA_CHANGE); 811 rts51x_set_sense_type(chip, lun, SENSE_TYPE_MEDIA_CHANGE);
812 TRACE_RET(chip, TRANSPORT_FAILED); 812 TRACE_RET(chip, TRANSPORT_FAILED);
813 } 813 }
814 814
@@ -816,7 +816,7 @@ int sd_pass_thru_mode(struct scsi_cmnd *srb, struct rts51x_chip *chip)
816 || (0x20 != srb->cmnd[4]) || (0x43 != srb->cmnd[5]) 816 || (0x20 != srb->cmnd[4]) || (0x43 != srb->cmnd[5])
817 || (0x61 != srb->cmnd[6]) || (0x72 != srb->cmnd[7]) 817 || (0x61 != srb->cmnd[6]) || (0x72 != srb->cmnd[7])
818 || (0x64 != srb->cmnd[8])) { 818 || (0x64 != srb->cmnd[8])) {
819 set_sense_type(chip, lun, SENSE_TYPE_MEDIA_INVALID_CMD_FIELD); 819 rts51x_set_sense_type(chip, lun, SENSE_TYPE_MEDIA_INVALID_CMD_FIELD);
820 TRACE_RET(chip, TRANSPORT_FAILED); 820 TRACE_RET(chip, TRANSPORT_FAILED);
821 } 821 }
822 822
@@ -830,7 +830,7 @@ int sd_pass_thru_mode(struct scsi_cmnd *srb, struct rts51x_chip *chip)
830 break; 830 break;
831 831
832 default: 832 default:
833 set_sense_type(chip, lun, SENSE_TYPE_MEDIA_INVALID_CMD_FIELD); 833 rts51x_set_sense_type(chip, lun, SENSE_TYPE_MEDIA_INVALID_CMD_FIELD);
834 TRACE_RET(chip, TRANSPORT_FAILED); 834 TRACE_RET(chip, TRANSPORT_FAILED);
835 } 835 }
836 836
@@ -850,7 +850,7 @@ int sd_pass_thru_mode(struct scsi_cmnd *srb, struct rts51x_chip *chip)
850 return TRANSPORT_GOOD; 850 return TRANSPORT_GOOD;
851} 851}
852 852
853int sd_execute_no_data(struct scsi_cmnd *srb, struct rts51x_chip *chip) 853int rts51x_sd_execute_no_data(struct scsi_cmnd *srb, struct rts51x_chip *chip)
854{ 854{
855 struct sd_info *sd_card = &(chip->sd_card); 855 struct sd_info *sd_card = &(chip->sd_card);
856 unsigned int lun = SCSI_LUN(srb); 856 unsigned int lun = SCSI_LUN(srb);
@@ -860,7 +860,7 @@ int sd_execute_no_data(struct scsi_cmnd *srb, struct rts51x_chip *chip)
860 u32 arg; 860 u32 arg;
861 861
862 if (!sd_card->sd_pass_thru_en) { 862 if (!sd_card->sd_pass_thru_en) {
863 set_sense_type(chip, lun, SENSE_TYPE_MEDIA_INVALID_CMD_FIELD); 863 rts51x_set_sense_type(chip, lun, SENSE_TYPE_MEDIA_INVALID_CMD_FIELD);
864 TRACE_RET(chip, TRANSPORT_FAILED); 864 TRACE_RET(chip, TRANSPORT_FAILED);
865 } 865 }
866 866
@@ -876,13 +876,13 @@ int sd_execute_no_data(struct scsi_cmnd *srb, struct rts51x_chip *chip)
876 rsp_code = srb->cmnd[10]; 876 rsp_code = srb->cmnd[10];
877 877
878 retval = 878 retval =
879 ext_sd_execute_no_data(chip, lun, cmd_idx, standby, acmd, rsp_code, 879 ext_rts51x_sd_execute_no_data(chip, lun, cmd_idx, standby, acmd, rsp_code,
880 arg); 880 arg);
881 scsi_set_resid(srb, 0); 881 scsi_set_resid(srb, 0);
882 return retval; 882 return retval;
883} 883}
884 884
885int sd_execute_read_data(struct scsi_cmnd *srb, struct rts51x_chip *chip) 885int rts51x_sd_execute_read_data(struct scsi_cmnd *srb, struct rts51x_chip *chip)
886{ 886{
887 struct sd_info *sd_card = &(chip->sd_card); 887 struct sd_info *sd_card = &(chip->sd_card);
888 int retval; 888 int retval;
@@ -891,7 +891,7 @@ int sd_execute_read_data(struct scsi_cmnd *srb, struct rts51x_chip *chip)
891 u32 arg, data_len; 891 u32 arg, data_len;
892 892
893 if (!sd_card->sd_pass_thru_en) { 893 if (!sd_card->sd_pass_thru_en) {
894 set_sense_type(chip, lun, SENSE_TYPE_MEDIA_INVALID_CMD_FIELD); 894 rts51x_set_sense_type(chip, lun, SENSE_TYPE_MEDIA_INVALID_CMD_FIELD);
895 TRACE_RET(chip, TRANSPORT_FAILED); 895 TRACE_RET(chip, TRANSPORT_FAILED);
896 } 896 }
897 897
@@ -912,7 +912,7 @@ int sd_execute_read_data(struct scsi_cmnd *srb, struct rts51x_chip *chip)
912 rsp_code = srb->cmnd[10]; 912 rsp_code = srb->cmnd[10];
913 913
914 retval = 914 retval =
915 ext_sd_execute_read_data(chip, lun, cmd_idx, send_cmd12, standby, 915 ext_rts51x_sd_execute_read_data(chip, lun, cmd_idx, send_cmd12, standby,
916 acmd, rsp_code, arg, data_len, 916 acmd, rsp_code, arg, data_len,
917 scsi_sglist(srb), scsi_bufflen(srb), 917 scsi_sglist(srb), scsi_bufflen(srb),
918 scsi_sg_count(srb)); 918 scsi_sg_count(srb));
@@ -920,7 +920,7 @@ int sd_execute_read_data(struct scsi_cmnd *srb, struct rts51x_chip *chip)
920 return retval; 920 return retval;
921} 921}
922 922
923int sd_execute_write_data(struct scsi_cmnd *srb, struct rts51x_chip *chip) 923int rts51x_sd_execute_write_data(struct scsi_cmnd *srb, struct rts51x_chip *chip)
924{ 924{
925 struct sd_info *sd_card = &(chip->sd_card); 925 struct sd_info *sd_card = &(chip->sd_card);
926 int retval; 926 int retval;
@@ -929,7 +929,7 @@ int sd_execute_write_data(struct scsi_cmnd *srb, struct rts51x_chip *chip)
929 u32 data_len, arg; 929 u32 data_len, arg;
930 930
931 if (!sd_card->sd_pass_thru_en) { 931 if (!sd_card->sd_pass_thru_en) {
932 set_sense_type(chip, lun, SENSE_TYPE_MEDIA_INVALID_CMD_FIELD); 932 rts51x_set_sense_type(chip, lun, SENSE_TYPE_MEDIA_INVALID_CMD_FIELD);
933 TRACE_RET(chip, TRANSPORT_FAILED); 933 TRACE_RET(chip, TRANSPORT_FAILED);
934 } 934 }
935 935
@@ -950,7 +950,7 @@ int sd_execute_write_data(struct scsi_cmnd *srb, struct rts51x_chip *chip)
950 rsp_code = srb->cmnd[10]; 950 rsp_code = srb->cmnd[10];
951 951
952 retval = 952 retval =
953 ext_sd_execute_write_data(chip, lun, cmd_idx, send_cmd12, standby, 953 ext_rts51x_sd_execute_write_data(chip, lun, cmd_idx, send_cmd12, standby,
954 acmd, rsp_code, arg, data_len, 954 acmd, rsp_code, arg, data_len,
955 scsi_sglist(srb), scsi_bufflen(srb), 955 scsi_sglist(srb), scsi_bufflen(srb),
956 scsi_sg_count(srb)); 956 scsi_sg_count(srb));
@@ -958,7 +958,7 @@ int sd_execute_write_data(struct scsi_cmnd *srb, struct rts51x_chip *chip)
958 return retval; 958 return retval;
959} 959}
960 960
961int sd_get_cmd_rsp(struct scsi_cmnd *srb, struct rts51x_chip *chip) 961int rts51x_sd_get_cmd_rsp(struct scsi_cmnd *srb, struct rts51x_chip *chip)
962{ 962{
963 struct sd_info *sd_card = &(chip->sd_card); 963 struct sd_info *sd_card = &(chip->sd_card);
964 unsigned int lun = SCSI_LUN(srb); 964 unsigned int lun = SCSI_LUN(srb);
@@ -966,20 +966,20 @@ int sd_get_cmd_rsp(struct scsi_cmnd *srb, struct rts51x_chip *chip)
966 u16 data_len; 966 u16 data_len;
967 967
968 if (!sd_card->sd_pass_thru_en) { 968 if (!sd_card->sd_pass_thru_en) {
969 set_sense_type(chip, lun, SENSE_TYPE_MEDIA_INVALID_CMD_FIELD); 969 rts51x_set_sense_type(chip, lun, SENSE_TYPE_MEDIA_INVALID_CMD_FIELD);
970 TRACE_RET(chip, TRANSPORT_FAILED); 970 TRACE_RET(chip, TRANSPORT_FAILED);
971 } 971 }
972 972
973 if (sd_card->pre_cmd_err) { 973 if (sd_card->pre_cmd_err) {
974 sd_card->pre_cmd_err = 0; 974 sd_card->pre_cmd_err = 0;
975 set_sense_type(chip, lun, SENSE_TYPE_MEDIA_CHANGE); 975 rts51x_set_sense_type(chip, lun, SENSE_TYPE_MEDIA_CHANGE);
976 TRACE_RET(chip, TRANSPORT_FAILED); 976 TRACE_RET(chip, TRANSPORT_FAILED);
977 } 977 }
978 978
979 data_len = ((u16) srb->cmnd[7] << 8) | srb->cmnd[8]; 979 data_len = ((u16) srb->cmnd[7] << 8) | srb->cmnd[8];
980 980
981 if (sd_card->last_rsp_type == SD_RSP_TYPE_R0) { 981 if (sd_card->last_rsp_type == SD_RSP_TYPE_R0) {
982 set_sense_type(chip, lun, SENSE_TYPE_MEDIA_INVALID_CMD_FIELD); 982 rts51x_set_sense_type(chip, lun, SENSE_TYPE_MEDIA_INVALID_CMD_FIELD);
983 TRACE_RET(chip, TRANSPORT_FAILED); 983 TRACE_RET(chip, TRANSPORT_FAILED);
984 } else if (sd_card->last_rsp_type == SD_RSP_TYPE_R2) { 984 } else if (sd_card->last_rsp_type == SD_RSP_TYPE_R2) {
985 count = (data_len < 17) ? data_len : 17; 985 count = (data_len < 17) ? data_len : 17;
@@ -997,20 +997,20 @@ int sd_get_cmd_rsp(struct scsi_cmnd *srb, struct rts51x_chip *chip)
997 return TRANSPORT_GOOD; 997 return TRANSPORT_GOOD;
998} 998}
999 999
1000int sd_hw_rst(struct scsi_cmnd *srb, struct rts51x_chip *chip) 1000int rts51x_sd_hw_rst(struct scsi_cmnd *srb, struct rts51x_chip *chip)
1001{ 1001{
1002 struct sd_info *sd_card = &(chip->sd_card); 1002 struct sd_info *sd_card = &(chip->sd_card);
1003 unsigned int lun = SCSI_LUN(srb); 1003 unsigned int lun = SCSI_LUN(srb);
1004 int retval; 1004 int retval;
1005 1005
1006 if (!sd_card->sd_pass_thru_en) { 1006 if (!sd_card->sd_pass_thru_en) {
1007 set_sense_type(chip, lun, SENSE_TYPE_MEDIA_INVALID_CMD_FIELD); 1007 rts51x_set_sense_type(chip, lun, SENSE_TYPE_MEDIA_INVALID_CMD_FIELD);
1008 TRACE_RET(chip, TRANSPORT_FAILED); 1008 TRACE_RET(chip, TRANSPORT_FAILED);
1009 } 1009 }
1010 1010
1011 if (sd_card->pre_cmd_err) { 1011 if (sd_card->pre_cmd_err) {
1012 sd_card->pre_cmd_err = 0; 1012 sd_card->pre_cmd_err = 0;
1013 set_sense_type(chip, lun, SENSE_TYPE_MEDIA_CHANGE); 1013 rts51x_set_sense_type(chip, lun, SENSE_TYPE_MEDIA_CHANGE);
1014 TRACE_RET(chip, TRANSPORT_FAILED); 1014 TRACE_RET(chip, TRANSPORT_FAILED);
1015 } 1015 }
1016 1016
@@ -1018,16 +1018,16 @@ int sd_hw_rst(struct scsi_cmnd *srb, struct rts51x_chip *chip)
1018 || (0x20 != srb->cmnd[4]) || (0x43 != srb->cmnd[5]) 1018 || (0x20 != srb->cmnd[4]) || (0x43 != srb->cmnd[5])
1019 || (0x61 != srb->cmnd[6]) || (0x72 != srb->cmnd[7]) 1019 || (0x61 != srb->cmnd[6]) || (0x72 != srb->cmnd[7])
1020 || (0x64 != srb->cmnd[8])) { 1020 || (0x64 != srb->cmnd[8])) {
1021 set_sense_type(chip, lun, SENSE_TYPE_MEDIA_INVALID_CMD_FIELD); 1021 rts51x_set_sense_type(chip, lun, SENSE_TYPE_MEDIA_INVALID_CMD_FIELD);
1022 TRACE_RET(chip, TRANSPORT_FAILED); 1022 TRACE_RET(chip, TRANSPORT_FAILED);
1023 } 1023 }
1024 1024
1025 switch (srb->cmnd[1] & 0x0F) { 1025 switch (srb->cmnd[1] & 0x0F) {
1026 case 0: 1026 case 0:
1027 /* SD Card Power Off -> ON and Initialization */ 1027 /* SD Card Power Off -> ON and Initialization */
1028 retval = reset_sd_card(chip); 1028 retval = rts51x_reset_sd_card(chip);
1029 if (retval != STATUS_SUCCESS) { 1029 if (retval != STATUS_SUCCESS) {
1030 set_sense_type(chip, lun, SENSE_TYPE_MEDIA_NOT_PRESENT); 1030 rts51x_set_sense_type(chip, lun, SENSE_TYPE_MEDIA_NOT_PRESENT);
1031 sd_card->pre_cmd_err = 1; 1031 sd_card->pre_cmd_err = 1;
1032 TRACE_RET(chip, TRANSPORT_FAILED); 1032 TRACE_RET(chip, TRANSPORT_FAILED);
1033 } 1033 }
@@ -1038,14 +1038,14 @@ int sd_hw_rst(struct scsi_cmnd *srb, struct rts51x_chip *chip)
1038 * (without SD Card Power Off -> ON) */ 1038 * (without SD Card Power Off -> ON) */
1039 retval = reset_sd(chip); 1039 retval = reset_sd(chip);
1040 if (retval != STATUS_SUCCESS) { 1040 if (retval != STATUS_SUCCESS) {
1041 set_sense_type(chip, lun, SENSE_TYPE_MEDIA_NOT_PRESENT); 1041 rts51x_set_sense_type(chip, lun, SENSE_TYPE_MEDIA_NOT_PRESENT);
1042 sd_card->pre_cmd_err = 1; 1042 sd_card->pre_cmd_err = 1;
1043 TRACE_RET(chip, TRANSPORT_FAILED); 1043 TRACE_RET(chip, TRANSPORT_FAILED);
1044 } 1044 }
1045 break; 1045 break;
1046 1046
1047 default: 1047 default:
1048 set_sense_type(chip, lun, SENSE_TYPE_MEDIA_INVALID_CMD_FIELD); 1048 rts51x_set_sense_type(chip, lun, SENSE_TYPE_MEDIA_INVALID_CMD_FIELD);
1049 TRACE_RET(chip, TRANSPORT_FAILED); 1049 TRACE_RET(chip, TRANSPORT_FAILED);
1050 } 1050 }
1051 1051
diff --git a/drivers/staging/rts5139/sd_cprm.h b/drivers/staging/rts5139/sd_cprm.h
index 75e263b6594c..79dfd27db41a 100644
--- a/drivers/staging/rts5139/sd_cprm.h
+++ b/drivers/staging/rts5139/sd_cprm.h
@@ -31,24 +31,24 @@
31#include "sd.h" 31#include "sd.h"
32 32
33#ifdef SUPPORT_CPRM 33#ifdef SUPPORT_CPRM
34int ext_sd_execute_no_data(struct rts51x_chip *chip, unsigned int lun, 34int ext_rts51x_sd_execute_no_data(struct rts51x_chip *chip, unsigned int lun,
35 u8 cmd_idx, u8 standby, u8 acmd, u8 rsp_code, 35 u8 cmd_idx, u8 standby, u8 acmd, u8 rsp_code,
36 u32 arg); 36 u32 arg);
37int ext_sd_execute_read_data(struct rts51x_chip *chip, unsigned int lun, 37int ext_rts51x_sd_execute_read_data(struct rts51x_chip *chip, unsigned int lun,
38 u8 cmd_idx, u8 cmd12, u8 standby, u8 acmd, 38 u8 cmd_idx, u8 cmd12, u8 standby, u8 acmd,
39 u8 rsp_code, u32 arg, u32 data_len, void *data_buf, 39 u8 rsp_code, u32 arg, u32 data_len, void *data_buf,
40 unsigned int buf_len, int use_sg); 40 unsigned int buf_len, int use_sg);
41int ext_sd_execute_write_data(struct rts51x_chip *chip, unsigned int lun, 41int ext_rts51x_sd_execute_write_data(struct rts51x_chip *chip, unsigned int lun,
42 u8 cmd_idx, u8 cmd12, u8 standby, u8 acmd, 42 u8 cmd_idx, u8 cmd12, u8 standby, u8 acmd,
43 u8 rsp_code, u32 arg, u32 data_len, 43 u8 rsp_code, u32 arg, u32 data_len,
44 void *data_buf, unsigned int buf_len, int use_sg); 44 void *data_buf, unsigned int buf_len, int use_sg);
45 45
46int sd_pass_thru_mode(struct scsi_cmnd *srb, struct rts51x_chip *chip); 46int rts51x_sd_pass_thru_mode(struct scsi_cmnd *srb, struct rts51x_chip *chip);
47int sd_execute_no_data(struct scsi_cmnd *srb, struct rts51x_chip *chip); 47int rts51x_sd_execute_no_data(struct scsi_cmnd *srb, struct rts51x_chip *chip);
48int sd_execute_read_data(struct scsi_cmnd *srb, struct rts51x_chip *chip); 48int rts51x_sd_execute_read_data(struct scsi_cmnd *srb, struct rts51x_chip *chip);
49int sd_execute_write_data(struct scsi_cmnd *srb, struct rts51x_chip *chip); 49int rts51x_sd_execute_write_data(struct scsi_cmnd *srb, struct rts51x_chip *chip);
50int sd_get_cmd_rsp(struct scsi_cmnd *srb, struct rts51x_chip *chip); 50int rts51x_sd_get_cmd_rsp(struct scsi_cmnd *srb, struct rts51x_chip *chip);
51int sd_hw_rst(struct scsi_cmnd *srb, struct rts51x_chip *chip); 51int rts51x_sd_hw_rst(struct scsi_cmnd *srb, struct rts51x_chip *chip);
52#endif 52#endif
53 53
54#endif /* __RTS51X_SD_CPRM_H */ 54#endif /* __RTS51X_SD_CPRM_H */
diff --git a/drivers/staging/rts5139/xd.c b/drivers/staging/rts5139/xd.c
index 58f8ba24caed..10fea7e16ace 100644
--- a/drivers/staging/rts5139/xd.c
+++ b/drivers/staging/rts5139/xd.c
@@ -425,7 +425,7 @@ static int reset_xd(struct rts51x_chip *chip)
425 } 425 }
426#endif 426#endif
427 427
428 retval = card_power_on(chip, XD_CARD); 428 retval = rts51x_card_power_on(chip, XD_CARD);
429 if (retval != STATUS_SUCCESS) 429 if (retval != STATUS_SUCCESS)
430 TRACE_RET(chip, retval); 430 TRACE_RET(chip, retval);
431#ifdef SUPPORT_OCP 431#ifdef SUPPORT_OCP
@@ -472,8 +472,8 @@ static int reset_xd(struct rts51x_chip *chip)
472 rts51x_init_cmd(chip); 472 rts51x_init_cmd(chip);
473 rts51x_add_cmd(chip, WRITE_REG_CMD, XD_DTCTL, 0xFF, 473 rts51x_add_cmd(chip, WRITE_REG_CMD, XD_DTCTL, 0xFF,
474 XD_TIME_SETUP_STEP * 3 + XD_TIME_RW_STEP * 474 XD_TIME_SETUP_STEP * 3 + XD_TIME_RW_STEP *
475 (2 + i + chip->option.xd_rw_step) 475 (2 + i + chip->option.rts51x_xd_rw_step)
476 + XD_TIME_RWN_STEP * (i + chip->option.xd_rwn_step)); 476 + XD_TIME_RWN_STEP * (i + chip->option.rts51x_xd_rwn_step));
477 rts51x_add_cmd(chip, WRITE_REG_CMD, XD_CATCTL, 0xFF, 477 rts51x_add_cmd(chip, WRITE_REG_CMD, XD_CATCTL, 0xFF,
478 XD_TIME_SETUP_STEP * 3 + XD_TIME_RW_STEP * (4 + 478 XD_TIME_SETUP_STEP * 3 + XD_TIME_RW_STEP * (4 +
479 i) + XD_TIME_RWN_STEP * (3 + i)); 479 i) + XD_TIME_RWN_STEP * (3 + i));
@@ -905,7 +905,7 @@ static u32 xd_get_l2p_tbl(struct rts51x_chip *chip, int zone_no, u16 log_off)
905 return (u32) zone->l2p_table[log_off] + ((u32) (zone_no) << 10); 905 return (u32) zone->l2p_table[log_off] + ((u32) (zone_no) << 10);
906} 906}
907 907
908int reset_xd_card(struct rts51x_chip *chip) 908int rts51x_reset_xd_card(struct rts51x_chip *chip)
909{ 909{
910 struct xd_info *xd_card = &(chip->xd_card); 910 struct xd_info *xd_card = &(chip->xd_card);
911 int retval; 911 int retval;
@@ -920,7 +920,7 @@ int reset_xd_card(struct rts51x_chip *chip)
920 xd_card->cis_block = 0xFFFF; 920 xd_card->cis_block = 0xFFFF;
921 xd_card->delay_write.delay_write_flag = 0; 921 xd_card->delay_write.delay_write_flag = 0;
922 922
923 enable_card_clock(chip, XD_CARD); 923 rts51x_enable_card_clock(chip, XD_CARD);
924 924
925 retval = reset_xd(chip); 925 retval = reset_xd(chip);
926 if (retval != STATUS_SUCCESS) { 926 if (retval != STATUS_SUCCESS) {
@@ -1526,7 +1526,7 @@ static int xd_read_multiple_pages(struct rts51x_chip *chip, u32 phy_blk,
1526 rts51x_add_cmd(chip, WRITE_REG_CMD, XD_CHK_DATA_STATUS, 1526 rts51x_add_cmd(chip, WRITE_REG_CMD, XD_CHK_DATA_STATUS,
1527 XD_AUTO_CHK_DATA_STATUS, XD_AUTO_CHK_DATA_STATUS); 1527 XD_AUTO_CHK_DATA_STATUS, XD_AUTO_CHK_DATA_STATUS);
1528 1528
1529 trans_dma_enable(chip->srb->sc_data_direction, chip, page_cnt * 512, 1529 rts51x_trans_dma_enable(chip->srb->sc_data_direction, chip, page_cnt * 512,
1530 DMA_512); 1530 DMA_512);
1531 1531
1532 rts51x_add_cmd(chip, WRITE_REG_CMD, XD_TRANSFER, 0xFF, 1532 rts51x_add_cmd(chip, WRITE_REG_CMD, XD_TRANSFER, 0xFF,
@@ -1745,7 +1745,7 @@ static int xd_write_multiple_pages(struct rts51x_chip *chip, u32 old_blk,
1745 rts51x_add_cmd(chip, WRITE_REG_CMD, CARD_DATA_SOURCE, 0x01, 1745 rts51x_add_cmd(chip, WRITE_REG_CMD, CARD_DATA_SOURCE, 0x01,
1746 RING_BUFFER); 1746 RING_BUFFER);
1747 1747
1748 trans_dma_enable(chip->srb->sc_data_direction, chip, page_cnt * 512, 1748 rts51x_trans_dma_enable(chip->srb->sc_data_direction, chip, page_cnt * 512,
1749 DMA_512); 1749 DMA_512);
1750 1750
1751 rts51x_add_cmd(chip, WRITE_REG_CMD, XD_TRANSFER, 0xFF, 1751 rts51x_add_cmd(chip, WRITE_REG_CMD, XD_TRANSFER, 0xFF,
@@ -1842,7 +1842,7 @@ static int xd_delay_write(struct rts51x_chip *chip)
1842 return STATUS_SUCCESS; 1842 return STATUS_SUCCESS;
1843} 1843}
1844 1844
1845int xd_rw(struct scsi_cmnd *srb, struct rts51x_chip *chip, u32 start_sector, 1845int rts51x_xd_rw(struct scsi_cmnd *srb, struct rts51x_chip *chip, u32 start_sector,
1846 u16 sector_cnt) 1846 u16 sector_cnt)
1847{ 1847{
1848 struct xd_info *xd_card = &(chip->xd_card); 1848 struct xd_info *xd_card = &(chip->xd_card);
@@ -1860,7 +1860,7 @@ int xd_rw(struct scsi_cmnd *srb, struct rts51x_chip *chip, u32 start_sector,
1860 1860
1861 xd_card->counter = 0; 1861 xd_card->counter = 0;
1862 1862
1863 RTS51X_DEBUGP("xd_rw: scsi_bufflen = %d, scsi_sg_count = %d\n", 1863 RTS51X_DEBUGP("rts51x_xd_rw: scsi_bufflen = %d, scsi_sg_count = %d\n",
1864 scsi_bufflen(srb), scsi_sg_count(srb)); 1864 scsi_bufflen(srb), scsi_sg_count(srb));
1865 RTS51X_DEBUGP("Data direction: %s\n", 1865 RTS51X_DEBUGP("Data direction: %s\n",
1866 (srb->sc_data_direction == 1866 (srb->sc_data_direction ==
@@ -1883,7 +1883,7 @@ int xd_rw(struct scsi_cmnd *srb, struct rts51x_chip *chip, u32 start_sector,
1883 retval = xd_build_l2p_tbl(chip, zone_no); 1883 retval = xd_build_l2p_tbl(chip, zone_no);
1884 if (retval != STATUS_SUCCESS) { 1884 if (retval != STATUS_SUCCESS) {
1885 chip->card_fail |= XD_CARD; 1885 chip->card_fail |= XD_CARD;
1886 set_sense_type(chip, lun, SENSE_TYPE_MEDIA_NOT_PRESENT); 1886 rts51x_set_sense_type(chip, lun, SENSE_TYPE_MEDIA_NOT_PRESENT);
1887 TRACE_RET(chip, retval); 1887 TRACE_RET(chip, retval);
1888 } 1888 }
1889 } 1889 }
@@ -1900,7 +1900,7 @@ int xd_rw(struct scsi_cmnd *srb, struct rts51x_chip *chip, u32 start_sector,
1900 delay_write->pageoff, 1900 delay_write->pageoff,
1901 start_page); 1901 start_page);
1902 if (retval != STATUS_SUCCESS) { 1902 if (retval != STATUS_SUCCESS) {
1903 set_sense_type(chip, lun, 1903 rts51x_set_sense_type(chip, lun,
1904 SENSE_TYPE_MEDIA_WRITE_ERR); 1904 SENSE_TYPE_MEDIA_WRITE_ERR);
1905 TRACE_RET(chip, retval); 1905 TRACE_RET(chip, retval);
1906 } 1906 }
@@ -1916,7 +1916,7 @@ int xd_rw(struct scsi_cmnd *srb, struct rts51x_chip *chip, u32 start_sector,
1916 } else { 1916 } else {
1917 retval = xd_delay_write(chip); 1917 retval = xd_delay_write(chip);
1918 if (retval != STATUS_SUCCESS) { 1918 if (retval != STATUS_SUCCESS) {
1919 set_sense_type(chip, lun, 1919 rts51x_set_sense_type(chip, lun,
1920 SENSE_TYPE_MEDIA_WRITE_ERR); 1920 SENSE_TYPE_MEDIA_WRITE_ERR);
1921 TRACE_RET(chip, retval); 1921 TRACE_RET(chip, retval);
1922 } 1922 }
@@ -1924,7 +1924,7 @@ int xd_rw(struct scsi_cmnd *srb, struct rts51x_chip *chip, u32 start_sector,
1924 new_blk = xd_get_unused_block(chip, zone_no); 1924 new_blk = xd_get_unused_block(chip, zone_no);
1925 if ((old_blk == BLK_NOT_FOUND) 1925 if ((old_blk == BLK_NOT_FOUND)
1926 || (new_blk == BLK_NOT_FOUND)) { 1926 || (new_blk == BLK_NOT_FOUND)) {
1927 set_sense_type(chip, lun, 1927 rts51x_set_sense_type(chip, lun,
1928 SENSE_TYPE_MEDIA_WRITE_ERR); 1928 SENSE_TYPE_MEDIA_WRITE_ERR);
1929 TRACE_RET(chip, retval); 1929 TRACE_RET(chip, retval);
1930 } 1930 }
@@ -1935,11 +1935,11 @@ int xd_rw(struct scsi_cmnd *srb, struct rts51x_chip *chip, u32 start_sector,
1935 if (retval != STATUS_SUCCESS) { 1935 if (retval != STATUS_SUCCESS) {
1936 if (monitor_card_cd(chip, XD_CARD) == 1936 if (monitor_card_cd(chip, XD_CARD) ==
1937 CD_NOT_EXIST) { 1937 CD_NOT_EXIST) {
1938 set_sense_type(chip, lun, 1938 rts51x_set_sense_type(chip, lun,
1939 SENSE_TYPE_MEDIA_NOT_PRESENT); 1939 SENSE_TYPE_MEDIA_NOT_PRESENT);
1940 TRACE_RET(chip, STATUS_FAIL); 1940 TRACE_RET(chip, STATUS_FAIL);
1941 } 1941 }
1942 set_sense_type(chip, lun, 1942 rts51x_set_sense_type(chip, lun,
1943 SENSE_TYPE_MEDIA_WRITE_ERR); 1943 SENSE_TYPE_MEDIA_WRITE_ERR);
1944 TRACE_RET(chip, retval); 1944 TRACE_RET(chip, retval);
1945 } 1945 }
@@ -1948,18 +1948,18 @@ int xd_rw(struct scsi_cmnd *srb, struct rts51x_chip *chip, u32 start_sector,
1948 retval = xd_delay_write(chip); 1948 retval = xd_delay_write(chip);
1949 if (retval != STATUS_SUCCESS) { 1949 if (retval != STATUS_SUCCESS) {
1950 if (monitor_card_cd(chip, XD_CARD) == CD_NOT_EXIST) { 1950 if (monitor_card_cd(chip, XD_CARD) == CD_NOT_EXIST) {
1951 set_sense_type(chip, lun, 1951 rts51x_set_sense_type(chip, lun,
1952 SENSE_TYPE_MEDIA_NOT_PRESENT); 1952 SENSE_TYPE_MEDIA_NOT_PRESENT);
1953 TRACE_RET(chip, STATUS_FAIL); 1953 TRACE_RET(chip, STATUS_FAIL);
1954 } 1954 }
1955 set_sense_type(chip, lun, 1955 rts51x_set_sense_type(chip, lun,
1956 SENSE_TYPE_MEDIA_UNRECOVER_READ_ERR); 1956 SENSE_TYPE_MEDIA_UNRECOVER_READ_ERR);
1957 TRACE_RET(chip, retval); 1957 TRACE_RET(chip, retval);
1958 } 1958 }
1959 1959
1960 old_blk = xd_get_l2p_tbl(chip, zone_no, log_off); 1960 old_blk = xd_get_l2p_tbl(chip, zone_no, log_off);
1961 if (old_blk == BLK_NOT_FOUND) { 1961 if (old_blk == BLK_NOT_FOUND) {
1962 set_sense_type(chip, lun, 1962 rts51x_set_sense_type(chip, lun,
1963 SENSE_TYPE_MEDIA_UNRECOVER_READ_ERR); 1963 SENSE_TYPE_MEDIA_UNRECOVER_READ_ERR);
1964 TRACE_RET(chip, STATUS_FAIL); 1964 TRACE_RET(chip, STATUS_FAIL);
1965 } 1965 }
@@ -1980,7 +1980,7 @@ int xd_rw(struct scsi_cmnd *srb, struct rts51x_chip *chip, u32 start_sector,
1980 start_page, end_page, 1980 start_page, end_page,
1981 buf, &ptr, &offset); 1981 buf, &ptr, &offset);
1982 if (retval != STATUS_SUCCESS) { 1982 if (retval != STATUS_SUCCESS) {
1983 set_sense_type(chip, lun, 1983 rts51x_set_sense_type(chip, lun,
1984 SENSE_TYPE_MEDIA_UNRECOVER_READ_ERR); 1984 SENSE_TYPE_MEDIA_UNRECOVER_READ_ERR);
1985 TRACE_RET(chip, STATUS_FAIL); 1985 TRACE_RET(chip, STATUS_FAIL);
1986 } 1986 }
@@ -1991,7 +1991,7 @@ int xd_rw(struct scsi_cmnd *srb, struct rts51x_chip *chip, u32 start_sector,
1991 end_page, buf, &ptr, 1991 end_page, buf, &ptr,
1992 &offset); 1992 &offset);
1993 if (retval != STATUS_SUCCESS) { 1993 if (retval != STATUS_SUCCESS) {
1994 set_sense_type(chip, lun, 1994 rts51x_set_sense_type(chip, lun,
1995 SENSE_TYPE_MEDIA_WRITE_ERR); 1995 SENSE_TYPE_MEDIA_WRITE_ERR);
1996 TRACE_RET(chip, STATUS_FAIL); 1996 TRACE_RET(chip, STATUS_FAIL);
1997 } 1997 }
@@ -2010,7 +2010,7 @@ int xd_rw(struct scsi_cmnd *srb, struct rts51x_chip *chip, u32 start_sector,
2010 retval = xd_build_l2p_tbl(chip, zone_no); 2010 retval = xd_build_l2p_tbl(chip, zone_no);
2011 if (retval != STATUS_SUCCESS) { 2011 if (retval != STATUS_SUCCESS) {
2012 chip->card_fail |= XD_CARD; 2012 chip->card_fail |= XD_CARD;
2013 set_sense_type(chip, lun, 2013 rts51x_set_sense_type(chip, lun,
2014 SENSE_TYPE_MEDIA_NOT_PRESENT); 2014 SENSE_TYPE_MEDIA_NOT_PRESENT);
2015 TRACE_RET(chip, retval); 2015 TRACE_RET(chip, retval);
2016 } 2016 }
@@ -2019,10 +2019,10 @@ int xd_rw(struct scsi_cmnd *srb, struct rts51x_chip *chip, u32 start_sector,
2019 old_blk = xd_get_l2p_tbl(chip, zone_no, log_off); 2019 old_blk = xd_get_l2p_tbl(chip, zone_no, log_off);
2020 if (old_blk == BLK_NOT_FOUND) { 2020 if (old_blk == BLK_NOT_FOUND) {
2021 if (srb->sc_data_direction == DMA_FROM_DEVICE) { 2021 if (srb->sc_data_direction == DMA_FROM_DEVICE) {
2022 set_sense_type(chip, lun, 2022 rts51x_set_sense_type(chip, lun,
2023 SENSE_TYPE_MEDIA_UNRECOVER_READ_ERR); 2023 SENSE_TYPE_MEDIA_UNRECOVER_READ_ERR);
2024 } else { 2024 } else {
2025 set_sense_type(chip, lun, 2025 rts51x_set_sense_type(chip, lun,
2026 SENSE_TYPE_MEDIA_WRITE_ERR); 2026 SENSE_TYPE_MEDIA_WRITE_ERR);
2027 } 2027 }
2028 TRACE_RET(chip, STATUS_FAIL); 2028 TRACE_RET(chip, STATUS_FAIL);
@@ -2031,7 +2031,7 @@ int xd_rw(struct scsi_cmnd *srb, struct rts51x_chip *chip, u32 start_sector,
2031 if (srb->sc_data_direction == DMA_TO_DEVICE) { 2031 if (srb->sc_data_direction == DMA_TO_DEVICE) {
2032 new_blk = xd_get_unused_block(chip, zone_no); 2032 new_blk = xd_get_unused_block(chip, zone_no);
2033 if (new_blk == BLK_NOT_FOUND) { 2033 if (new_blk == BLK_NOT_FOUND) {
2034 set_sense_type(chip, lun, 2034 rts51x_set_sense_type(chip, lun,
2035 SENSE_TYPE_MEDIA_WRITE_ERR); 2035 SENSE_TYPE_MEDIA_WRITE_ERR);
2036 TRACE_RET(chip, STATUS_FAIL); 2036 TRACE_RET(chip, STATUS_FAIL);
2037 } 2037 }
@@ -2054,7 +2054,7 @@ int xd_rw(struct scsi_cmnd *srb, struct rts51x_chip *chip, u32 start_sector,
2054 return STATUS_SUCCESS; 2054 return STATUS_SUCCESS;
2055} 2055}
2056 2056
2057void xd_free_l2p_tbl(struct rts51x_chip *chip) 2057void rts51x_xd_free_l2p_tbl(struct rts51x_chip *chip)
2058{ 2058{
2059 struct xd_info *xd_card = &(chip->xd_card); 2059 struct xd_info *xd_card = &(chip->xd_card);
2060 int i = 0; 2060 int i = 0;
@@ -2075,7 +2075,7 @@ void xd_free_l2p_tbl(struct rts51x_chip *chip)
2075 } 2075 }
2076} 2076}
2077 2077
2078void xd_cleanup_work(struct rts51x_chip *chip) 2078void rts51x_xd_cleanup_work(struct rts51x_chip *chip)
2079{ 2079{
2080 struct xd_info *xd_card = &(chip->xd_card); 2080 struct xd_info *xd_card = &(chip->xd_card);
2081 2081
@@ -2115,12 +2115,12 @@ static int xd_power_off_card3v3(struct rts51x_chip *chip)
2115 return STATUS_SUCCESS; 2115 return STATUS_SUCCESS;
2116} 2116}
2117 2117
2118int release_xd_card(struct rts51x_chip *chip) 2118int rts51x_release_xd_card(struct rts51x_chip *chip)
2119{ 2119{
2120 struct xd_info *xd_card = &(chip->xd_card); 2120 struct xd_info *xd_card = &(chip->xd_card);
2121 int retval; 2121 int retval;
2122 2122
2123 RTS51X_DEBUGP("release_xd_card\n"); 2123 RTS51X_DEBUGP("rts51x_release_xd_card\n");
2124 2124
2125 chip->card_ready &= ~XD_CARD; 2125 chip->card_ready &= ~XD_CARD;
2126 chip->card_fail &= ~XD_CARD; 2126 chip->card_fail &= ~XD_CARD;
@@ -2128,7 +2128,7 @@ int release_xd_card(struct rts51x_chip *chip)
2128 2128
2129 xd_card->delay_write.delay_write_flag = 0; 2129 xd_card->delay_write.delay_write_flag = 0;
2130 2130
2131 xd_free_l2p_tbl(chip); 2131 rts51x_xd_free_l2p_tbl(chip);
2132 2132
2133 rts51x_write_register(chip, SFSM_ED, HW_CMD_STOP, HW_CMD_STOP); 2133 rts51x_write_register(chip, SFSM_ED, HW_CMD_STOP, HW_CMD_STOP);
2134 2134
diff --git a/drivers/staging/rts5139/xd.h b/drivers/staging/rts5139/xd.h
index 55e4205e23fa..695a0b4d7e52 100644
--- a/drivers/staging/rts5139/xd.h
+++ b/drivers/staging/rts5139/xd.h
@@ -181,11 +181,11 @@
181#define CIS1_8 (256 + 8) 181#define CIS1_8 (256 + 8)
182#define CIS1_9 (256 + 9) 182#define CIS1_9 (256 + 9)
183 183
184int reset_xd_card(struct rts51x_chip *chip); 184int rts51x_reset_xd_card(struct rts51x_chip *chip);
185int xd_rw(struct scsi_cmnd *srb, struct rts51x_chip *chip, u32 start_sector, 185int rts51x_xd_rw(struct scsi_cmnd *srb, struct rts51x_chip *chip, u32 start_sector,
186 u16 sector_cnt); 186 u16 sector_cnt);
187void xd_free_l2p_tbl(struct rts51x_chip *chip); 187void rts51x_xd_free_l2p_tbl(struct rts51x_chip *chip);
188void xd_cleanup_work(struct rts51x_chip *chip); 188void rts51x_xd_cleanup_work(struct rts51x_chip *chip);
189int release_xd_card(struct rts51x_chip *chip); 189int rts51x_release_xd_card(struct rts51x_chip *chip);
190 190
191#endif /* __RTS51X_XD_H */ 191#endif /* __RTS51X_XD_H */
diff --git a/drivers/staging/rts_pstor/Kconfig b/drivers/staging/rts_pstor/Kconfig
deleted file mode 100644
index 4d66a99fba82..000000000000
--- a/drivers/staging/rts_pstor/Kconfig
+++ /dev/null
@@ -1,16 +0,0 @@
1config RTS_PSTOR
2 tristate "RealTek PCI-E Card Reader support"
3 depends on PCI && SCSI
4 help
5 Say Y here to include driver code to support the Realtek
6 PCI-E card readers.
7
8 If this driver is compiled as a module, it will be named rts_pstor.
9
10config RTS_PSTOR_DEBUG
11 bool "Realtek PCI-E Card Reader verbose debug"
12 depends on RTS_PSTOR
13 help
14 Say Y here in order to have the rts_pstor code generate
15 verbose debugging messages.
16
diff --git a/drivers/staging/rts_pstor/Makefile b/drivers/staging/rts_pstor/Makefile
deleted file mode 100644
index 42533d39c07f..000000000000
--- a/drivers/staging/rts_pstor/Makefile
+++ /dev/null
@@ -1,16 +0,0 @@
1ccflags := -Idrivers/scsi
2
3obj-$(CONFIG_RTS_PSTOR) := rts_pstor.o
4
5rts_pstor-y := \
6 rtsx.o \
7 rtsx_chip.o \
8 rtsx_transport.o \
9 rtsx_scsi.o \
10 rtsx_card.o \
11 general.o \
12 sd.o \
13 xd.o \
14 ms.o \
15 spi.o
16
diff --git a/drivers/staging/rts_pstor/TODO b/drivers/staging/rts_pstor/TODO
deleted file mode 100644
index becb95e4f2cd..000000000000
--- a/drivers/staging/rts_pstor/TODO
+++ /dev/null
@@ -1,9 +0,0 @@
1TODO:
2- support more pcie card reader of Realtek family
3- use kernel coding style
4- checkpatch.pl fixes
5- stop having thousands of lines of code duplicated with staging/rts5139
6- This driver contains an entire SD/MMC stack -- it should use the stack in
7 drivers/mmc instead, as a host driver e.g. drivers/mmc/host/realtek-pci.c;
8 see drivers/mmc/host/via-sdmmc.c as an example.
9- This driver presents cards as SCSI devices, but they should be MMC devices.
diff --git a/drivers/staging/rts_pstor/debug.h b/drivers/staging/rts_pstor/debug.h
deleted file mode 100644
index ab305be96fb5..000000000000
--- a/drivers/staging/rts_pstor/debug.h
+++ /dev/null
@@ -1,43 +0,0 @@
1/* Driver for Realtek PCI-Express card reader
2 * Header file
3 *
4 * Copyright(c) 2009 Realtek Semiconductor Corp. All rights reserved.
5 *
6 * This program is free software; you can redistribute it and/or modify it
7 * under the terms of the GNU General Public License as published by the
8 * Free Software Foundation; either version 2, or (at your option) any
9 * later version.
10 *
11 * This program is distributed in the hope that it will be useful, but
12 * WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
14 * General Public License for more details.
15 *
16 * You should have received a copy of the GNU General Public License along
17 * with this program; if not, see <http://www.gnu.org/licenses/>.
18 *
19 * Author:
20 * wwang (wei_wang@realsil.com.cn)
21 * No. 450, Shenhu Road, Suzhou Industry Park, Suzhou, China
22 */
23
24#ifndef __REALTEK_RTSX_DEBUG_H
25#define __REALTEK_RTSX_DEBUG_H
26
27#include <linux/kernel.h>
28
29#define RTSX_STOR "rts_pstor: "
30
31#ifdef CONFIG_RTS_PSTOR_DEBUG
32#define RTSX_DEBUGP(x...) printk(KERN_DEBUG RTSX_STOR x)
33#define RTSX_DEBUGPN(x...) printk(KERN_DEBUG x)
34#define RTSX_DEBUGPX(x...) printk(x)
35#define RTSX_DEBUG(x) x
36#else
37#define RTSX_DEBUGP(x...)
38#define RTSX_DEBUGPN(x...)
39#define RTSX_DEBUGPX(x...)
40#define RTSX_DEBUG(x)
41#endif
42
43#endif /* __REALTEK_RTSX_DEBUG_H */
diff --git a/drivers/staging/rts_pstor/general.c b/drivers/staging/rts_pstor/general.c
deleted file mode 100644
index 056e98d2475c..000000000000
--- a/drivers/staging/rts_pstor/general.c
+++ /dev/null
@@ -1,35 +0,0 @@
1/* Driver for Realtek PCI-Express card reader
2 *
3 * Copyright(c) 2009 Realtek Semiconductor Corp. All rights reserved.
4 *
5 * This program is free software; you can redistribute it and/or modify it
6 * under the terms of the GNU General Public License as published by the
7 * Free Software Foundation; either version 2, or (at your option) any
8 * later version.
9 *
10 * This program is distributed in the hope that it will be useful, but
11 * WITHOUT ANY WARRANTY; without even the implied warranty of
12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
13 * General Public License for more details.
14 *
15 * You should have received a copy of the GNU General Public License along
16 * with this program; if not, see <http://www.gnu.org/licenses/>.
17 *
18 * Author:
19 * wwang (wei_wang@realsil.com.cn)
20 * No. 450, Shenhu Road, Suzhou Industry Park, Suzhou, China
21 */
22
23#include "general.h"
24
25int bit1cnt_long(u32 data)
26{
27 int i, cnt = 0;
28 for (i = 0; i < 32; i++) {
29 if (data & 0x01)
30 cnt++;
31 data >>= 1;
32 }
33 return cnt;
34}
35
diff --git a/drivers/staging/rts_pstor/general.h b/drivers/staging/rts_pstor/general.h
deleted file mode 100644
index f17930d2e0c4..000000000000
--- a/drivers/staging/rts_pstor/general.h
+++ /dev/null
@@ -1,31 +0,0 @@
1/* Driver for Realtek PCI-Express card reader
2 * Header file
3 *
4 * Copyright(c) 2009 Realtek Semiconductor Corp. All rights reserved.
5 *
6 * This program is free software; you can redistribute it and/or modify it
7 * under the terms of the GNU General Public License as published by the
8 * Free Software Foundation; either version 2, or (at your option) any
9 * later version.
10 *
11 * This program is distributed in the hope that it will be useful, but
12 * WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
14 * General Public License for more details.
15 *
16 * You should have received a copy of the GNU General Public License along
17 * with this program; if not, see <http://www.gnu.org/licenses/>.
18 *
19 * Author:
20 * wwang (wei_wang@realsil.com.cn)
21 * No. 450, Shenhu Road, Suzhou Industry Park, Suzhou, China
22 */
23
24#ifndef __RTSX_GENERAL_H
25#define __RTSX_GENERAL_H
26
27#include "rtsx.h"
28
29int bit1cnt_long(u32 data);
30
31#endif /* __RTSX_GENERAL_H */
diff --git a/drivers/staging/rts_pstor/ms.c b/drivers/staging/rts_pstor/ms.c
deleted file mode 100644
index 16a5c16fb6ab..000000000000
--- a/drivers/staging/rts_pstor/ms.c
+++ /dev/null
@@ -1,4051 +0,0 @@
1/* Driver for Realtek PCI-Express card reader
2 *
3 * Copyright(c) 2009 Realtek Semiconductor Corp. All rights reserved.
4 *
5 * This program is free software; you can redistribute it and/or modify it
6 * under the terms of the GNU General Public License as published by the
7 * Free Software Foundation; either version 2, or (at your option) any
8 * later version.
9 *
10 * This program is distributed in the hope that it will be useful, but
11 * WITHOUT ANY WARRANTY; without even the implied warranty of
12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
13 * General Public License for more details.
14 *
15 * You should have received a copy of the GNU General Public License along
16 * with this program; if not, see <http://www.gnu.org/licenses/>.
17 *
18 * Author:
19 * wwang (wei_wang@realsil.com.cn)
20 * No. 450, Shenhu Road, Suzhou Industry Park, Suzhou, China
21 */
22
23#include <linux/blkdev.h>
24#include <linux/kthread.h>
25#include <linux/sched.h>
26#include <linux/vmalloc.h>
27
28#include "rtsx.h"
29#include "rtsx_transport.h"
30#include "rtsx_scsi.h"
31#include "rtsx_card.h"
32#include "ms.h"
33
34static inline void ms_set_err_code(struct rtsx_chip *chip, u8 err_code)
35{
36 struct ms_info *ms_card = &(chip->ms_card);
37
38 ms_card->err_code = err_code;
39}
40
41static inline int ms_check_err_code(struct rtsx_chip *chip, u8 err_code)
42{
43 struct ms_info *ms_card = &(chip->ms_card);
44
45 return (ms_card->err_code == err_code);
46}
47
48static int ms_parse_err_code(struct rtsx_chip *chip)
49{
50 TRACE_RET(chip, STATUS_FAIL);
51}
52
53static int ms_transfer_tpc(struct rtsx_chip *chip, u8 trans_mode, u8 tpc, u8 cnt, u8 cfg)
54{
55 struct ms_info *ms_card = &(chip->ms_card);
56 int retval;
57 u8 *ptr;
58
59 RTSX_DEBUGP("ms_transfer_tpc: tpc = 0x%x\n", tpc);
60
61 rtsx_init_cmd(chip);
62
63 rtsx_add_cmd(chip, WRITE_REG_CMD, MS_TPC, 0xFF, tpc);
64 rtsx_add_cmd(chip, WRITE_REG_CMD, MS_BYTE_CNT, 0xFF, cnt);
65 rtsx_add_cmd(chip, WRITE_REG_CMD, MS_TRANS_CFG, 0xFF, cfg);
66 rtsx_add_cmd(chip, WRITE_REG_CMD, CARD_DATA_SOURCE, 0x01, PINGPONG_BUFFER);
67
68 rtsx_add_cmd(chip, WRITE_REG_CMD, MS_TRANSFER, 0xFF, MS_TRANSFER_START | trans_mode);
69 rtsx_add_cmd(chip, CHECK_REG_CMD, MS_TRANSFER, MS_TRANSFER_END, MS_TRANSFER_END);
70
71 rtsx_add_cmd(chip, READ_REG_CMD, MS_TRANS_CFG, 0, 0);
72
73 retval = rtsx_send_cmd(chip, MS_CARD, 5000);
74 if (retval < 0) {
75 rtsx_clear_ms_error(chip);
76 ms_set_err_code(chip, MS_TO_ERROR);
77 TRACE_RET(chip, ms_parse_err_code(chip));
78 }
79
80 ptr = rtsx_get_cmd_data(chip) + 1;
81
82 if (!(tpc & 0x08)) { /* Read Packet */
83 if (*ptr & MS_CRC16_ERR) {
84 ms_set_err_code(chip, MS_CRC16_ERROR);
85 TRACE_RET(chip, ms_parse_err_code(chip));
86 }
87 } else { /* Write Packet */
88 if (CHK_MSPRO(ms_card) && !(*ptr & 0x80)) {
89 if (*ptr & (MS_INT_ERR | MS_INT_CMDNK)) {
90 ms_set_err_code(chip, MS_CMD_NK);
91 TRACE_RET(chip, ms_parse_err_code(chip));
92 }
93 }
94 }
95
96 if (*ptr & MS_RDY_TIMEOUT) {
97 rtsx_clear_ms_error(chip);
98 ms_set_err_code(chip, MS_TO_ERROR);
99 TRACE_RET(chip, ms_parse_err_code(chip));
100 }
101
102 return STATUS_SUCCESS;
103}
104
105static int ms_transfer_data(struct rtsx_chip *chip, u8 trans_mode, u8 tpc, u16 sec_cnt,
106 u8 cfg, int mode_2k, int use_sg, void *buf, int buf_len)
107{
108 int retval;
109 u8 val, err_code = 0;
110 enum dma_data_direction dir;
111
112 if (!buf || !buf_len)
113 TRACE_RET(chip, STATUS_FAIL);
114
115 if (trans_mode == MS_TM_AUTO_READ) {
116 dir = DMA_FROM_DEVICE;
117 err_code = MS_FLASH_READ_ERROR;
118 } else if (trans_mode == MS_TM_AUTO_WRITE) {
119 dir = DMA_TO_DEVICE;
120 err_code = MS_FLASH_WRITE_ERROR;
121 } else {
122 TRACE_RET(chip, STATUS_FAIL);
123 }
124
125 rtsx_init_cmd(chip);
126
127 rtsx_add_cmd(chip, WRITE_REG_CMD, MS_TPC, 0xFF, tpc);
128 rtsx_add_cmd(chip, WRITE_REG_CMD,
129 MS_SECTOR_CNT_H, 0xFF, (u8)(sec_cnt >> 8));
130 rtsx_add_cmd(chip, WRITE_REG_CMD, MS_SECTOR_CNT_L, 0xFF, (u8)sec_cnt);
131 rtsx_add_cmd(chip, WRITE_REG_CMD, MS_TRANS_CFG, 0xFF, cfg);
132
133 if (mode_2k) {
134 rtsx_add_cmd(chip, WRITE_REG_CMD,
135 MS_CFG, MS_2K_SECTOR_MODE, MS_2K_SECTOR_MODE);
136 } else {
137 rtsx_add_cmd(chip, WRITE_REG_CMD, MS_CFG, MS_2K_SECTOR_MODE, 0);
138 }
139
140 trans_dma_enable(dir, chip, sec_cnt * 512, DMA_512);
141
142 rtsx_add_cmd(chip, WRITE_REG_CMD,
143 MS_TRANSFER, 0xFF, MS_TRANSFER_START | trans_mode);
144 rtsx_add_cmd(chip, CHECK_REG_CMD,
145 MS_TRANSFER, MS_TRANSFER_END, MS_TRANSFER_END);
146
147 rtsx_send_cmd_no_wait(chip);
148
149 retval = rtsx_transfer_data(chip, MS_CARD, buf, buf_len,
150 use_sg, dir, chip->mspro_timeout);
151 if (retval < 0) {
152 ms_set_err_code(chip, err_code);
153 if (retval == -ETIMEDOUT)
154 retval = STATUS_TIMEDOUT;
155 else
156 retval = STATUS_FAIL;
157
158 TRACE_RET(chip, retval);
159 }
160
161 RTSX_READ_REG(chip, MS_TRANS_CFG, &val);
162 if (val & (MS_INT_CMDNK | MS_INT_ERR | MS_CRC16_ERR | MS_RDY_TIMEOUT))
163 TRACE_RET(chip, STATUS_FAIL);
164
165 return STATUS_SUCCESS;
166}
167
168static int ms_write_bytes(struct rtsx_chip *chip,
169 u8 tpc, u8 cnt, u8 cfg, u8 *data, int data_len)
170{
171 struct ms_info *ms_card = &(chip->ms_card);
172 int retval, i;
173
174 if (!data || (data_len < cnt))
175 TRACE_RET(chip, STATUS_ERROR);
176
177 rtsx_init_cmd(chip);
178
179 for (i = 0; i < cnt; i++) {
180 rtsx_add_cmd(chip, WRITE_REG_CMD,
181 PPBUF_BASE2 + i, 0xFF, data[i]);
182 }
183 if (cnt % 2)
184 rtsx_add_cmd(chip, WRITE_REG_CMD, PPBUF_BASE2 + i, 0xFF, 0xFF);
185
186 rtsx_add_cmd(chip, WRITE_REG_CMD, MS_TPC, 0xFF, tpc);
187 rtsx_add_cmd(chip, WRITE_REG_CMD, MS_BYTE_CNT, 0xFF, cnt);
188 rtsx_add_cmd(chip, WRITE_REG_CMD, MS_TRANS_CFG, 0xFF, cfg);
189 rtsx_add_cmd(chip, WRITE_REG_CMD, CARD_DATA_SOURCE, 0x01, PINGPONG_BUFFER);
190
191 rtsx_add_cmd(chip, WRITE_REG_CMD,
192 MS_TRANSFER, 0xFF, MS_TRANSFER_START | MS_TM_WRITE_BYTES);
193 rtsx_add_cmd(chip, CHECK_REG_CMD,
194 MS_TRANSFER, MS_TRANSFER_END, MS_TRANSFER_END);
195
196 retval = rtsx_send_cmd(chip, MS_CARD, 5000);
197 if (retval < 0) {
198 u8 val = 0;
199
200 rtsx_read_register(chip, MS_TRANS_CFG, &val);
201 RTSX_DEBUGP("MS_TRANS_CFG: 0x%02x\n", val);
202
203 rtsx_clear_ms_error(chip);
204
205 if (!(tpc & 0x08)) {
206 if (val & MS_CRC16_ERR) {
207 ms_set_err_code(chip, MS_CRC16_ERROR);
208 TRACE_RET(chip, ms_parse_err_code(chip));
209 }
210 } else {
211 if (CHK_MSPRO(ms_card) && !(val & 0x80)) {
212 if (val & (MS_INT_ERR | MS_INT_CMDNK)) {
213 ms_set_err_code(chip, MS_CMD_NK);
214 TRACE_RET(chip, ms_parse_err_code(chip));
215 }
216 }
217 }
218
219 if (val & MS_RDY_TIMEOUT) {
220 ms_set_err_code(chip, MS_TO_ERROR);
221 TRACE_RET(chip, ms_parse_err_code(chip));
222 }
223
224 ms_set_err_code(chip, MS_TO_ERROR);
225 TRACE_RET(chip, ms_parse_err_code(chip));
226 }
227
228 return STATUS_SUCCESS;
229}
230
231static int ms_read_bytes(struct rtsx_chip *chip, u8 tpc, u8 cnt, u8 cfg, u8 *data, int data_len)
232{
233 struct ms_info *ms_card = &(chip->ms_card);
234 int retval, i;
235 u8 *ptr;
236
237 if (!data)
238 TRACE_RET(chip, STATUS_ERROR);
239
240 rtsx_init_cmd(chip);
241
242 rtsx_add_cmd(chip, WRITE_REG_CMD, MS_TPC, 0xFF, tpc);
243 rtsx_add_cmd(chip, WRITE_REG_CMD, MS_BYTE_CNT, 0xFF, cnt);
244 rtsx_add_cmd(chip, WRITE_REG_CMD, MS_TRANS_CFG, 0xFF, cfg);
245 rtsx_add_cmd(chip, WRITE_REG_CMD, CARD_DATA_SOURCE, 0x01, PINGPONG_BUFFER);
246
247 rtsx_add_cmd(chip, WRITE_REG_CMD, MS_TRANSFER, 0xFF, MS_TRANSFER_START | MS_TM_READ_BYTES);
248 rtsx_add_cmd(chip, CHECK_REG_CMD, MS_TRANSFER, MS_TRANSFER_END, MS_TRANSFER_END);
249
250 for (i = 0; i < data_len - 1; i++)
251 rtsx_add_cmd(chip, READ_REG_CMD, PPBUF_BASE2 + i, 0, 0);
252
253 if (data_len % 2)
254 rtsx_add_cmd(chip, READ_REG_CMD, PPBUF_BASE2 + data_len, 0, 0);
255 else
256 rtsx_add_cmd(chip, READ_REG_CMD, PPBUF_BASE2 + data_len - 1, 0, 0);
257
258 retval = rtsx_send_cmd(chip, MS_CARD, 5000);
259 if (retval < 0) {
260 u8 val = 0;
261
262 rtsx_read_register(chip, MS_TRANS_CFG, &val);
263 rtsx_clear_ms_error(chip);
264
265 if (!(tpc & 0x08)) {
266 if (val & MS_CRC16_ERR) {
267 ms_set_err_code(chip, MS_CRC16_ERROR);
268 TRACE_RET(chip, ms_parse_err_code(chip));
269 }
270 } else {
271 if (CHK_MSPRO(ms_card) && !(val & 0x80)) {
272 if (val & (MS_INT_ERR | MS_INT_CMDNK)) {
273 ms_set_err_code(chip, MS_CMD_NK);
274 TRACE_RET(chip, ms_parse_err_code(chip));
275 }
276 }
277 }
278
279 if (val & MS_RDY_TIMEOUT) {
280 ms_set_err_code(chip, MS_TO_ERROR);
281 TRACE_RET(chip, ms_parse_err_code(chip));
282 }
283
284 ms_set_err_code(chip, MS_TO_ERROR);
285 TRACE_RET(chip, ms_parse_err_code(chip));
286 }
287
288 ptr = rtsx_get_cmd_data(chip) + 1;
289
290 for (i = 0; i < data_len; i++)
291 data[i] = ptr[i];
292
293 if ((tpc == PRO_READ_SHORT_DATA) && (data_len == 8)) {
294 RTSX_DEBUGP("Read format progress:\n");
295 RTSX_DUMP(ptr, cnt);
296 }
297
298 return STATUS_SUCCESS;
299}
300
301static int ms_set_rw_reg_addr(struct rtsx_chip *chip,
302 u8 read_start, u8 read_cnt, u8 write_start, u8 write_cnt)
303{
304 int retval, i;
305 u8 data[4];
306
307 data[0] = read_start;
308 data[1] = read_cnt;
309 data[2] = write_start;
310 data[3] = write_cnt;
311
312 for (i = 0; i < MS_MAX_RETRY_COUNT; i++) {
313 retval = ms_write_bytes(chip, SET_RW_REG_ADRS, 4,
314 NO_WAIT_INT, data, 4);
315 if (retval == STATUS_SUCCESS)
316 return STATUS_SUCCESS;
317 rtsx_clear_ms_error(chip);
318 }
319
320 TRACE_RET(chip, STATUS_FAIL);
321}
322
323static int ms_send_cmd(struct rtsx_chip *chip, u8 cmd, u8 cfg)
324{
325 u8 data[2];
326
327 data[0] = cmd;
328 data[1] = 0;
329
330 return ms_write_bytes(chip, PRO_SET_CMD, 1, cfg, data, 1);
331}
332
333static int ms_set_init_para(struct rtsx_chip *chip)
334{
335 struct ms_info *ms_card = &(chip->ms_card);
336 int retval;
337
338 if (CHK_HG8BIT(ms_card)) {
339 if (chip->asic_code)
340 ms_card->ms_clock = chip->asic_ms_hg_clk;
341 else
342 ms_card->ms_clock = chip->fpga_ms_hg_clk;
343
344 } else if (CHK_MSPRO(ms_card) || CHK_MS4BIT(ms_card)) {
345 if (chip->asic_code)
346 ms_card->ms_clock = chip->asic_ms_4bit_clk;
347 else
348 ms_card->ms_clock = chip->fpga_ms_4bit_clk;
349
350 } else {
351 if (chip->asic_code)
352 ms_card->ms_clock = chip->asic_ms_1bit_clk;
353 else
354 ms_card->ms_clock = chip->fpga_ms_1bit_clk;
355 }
356
357 retval = switch_clock(chip, ms_card->ms_clock);
358 if (retval != STATUS_SUCCESS)
359 TRACE_RET(chip, STATUS_FAIL);
360
361 retval = select_card(chip, MS_CARD);
362 if (retval != STATUS_SUCCESS)
363 TRACE_RET(chip, STATUS_FAIL);
364
365 return STATUS_SUCCESS;
366}
367
368static int ms_switch_clock(struct rtsx_chip *chip)
369{
370 struct ms_info *ms_card = &(chip->ms_card);
371 int retval;
372
373 retval = select_card(chip, MS_CARD);
374 if (retval != STATUS_SUCCESS)
375 TRACE_RET(chip, STATUS_FAIL);
376
377 retval = switch_clock(chip, ms_card->ms_clock);
378 if (retval != STATUS_SUCCESS)
379 TRACE_RET(chip, STATUS_FAIL);
380
381 return STATUS_SUCCESS;
382}
383
384static int ms_pull_ctl_disable(struct rtsx_chip *chip)
385{
386 if (CHECK_PID(chip, 0x5209)) {
387 RTSX_WRITE_REG(chip, CARD_PULL_CTL4, 0xFF, 0x55);
388 RTSX_WRITE_REG(chip, CARD_PULL_CTL5, 0xFF, 0x55);
389 RTSX_WRITE_REG(chip, CARD_PULL_CTL6, 0xFF, 0x15);
390 } else if (CHECK_PID(chip, 0x5208)) {
391 RTSX_WRITE_REG(chip, CARD_PULL_CTL1, 0xFF,
392 MS_D1_PD | MS_D2_PD | MS_CLK_PD | MS_D6_PD);
393 RTSX_WRITE_REG(chip, CARD_PULL_CTL2, 0xFF,
394 MS_D3_PD | MS_D0_PD | MS_BS_PD | XD_D4_PD);
395 RTSX_WRITE_REG(chip, CARD_PULL_CTL3, 0xFF,
396 MS_D7_PD | XD_CE_PD | XD_CLE_PD | XD_CD_PU);
397 RTSX_WRITE_REG(chip, CARD_PULL_CTL4, 0xFF,
398 XD_RDY_PD | SD_D3_PD | SD_D2_PD | XD_ALE_PD);
399 RTSX_WRITE_REG(chip, CARD_PULL_CTL5, 0xFF,
400 MS_INS_PU | SD_WP_PD | SD_CD_PU | SD_CMD_PD);
401 RTSX_WRITE_REG(chip, CARD_PULL_CTL6, 0xFF,
402 MS_D5_PD | MS_D4_PD);
403 } else if (CHECK_PID(chip, 0x5288)) {
404 if (CHECK_BARO_PKG(chip, QFN)) {
405 RTSX_WRITE_REG(chip, CARD_PULL_CTL1, 0xFF, 0x55);
406 RTSX_WRITE_REG(chip, CARD_PULL_CTL2, 0xFF, 0x55);
407 RTSX_WRITE_REG(chip, CARD_PULL_CTL3, 0xFF, 0x4B);
408 RTSX_WRITE_REG(chip, CARD_PULL_CTL4, 0xFF, 0x69);
409 }
410 }
411
412 return STATUS_SUCCESS;
413}
414
415static int ms_pull_ctl_enable(struct rtsx_chip *chip)
416{
417 int retval;
418
419 rtsx_init_cmd(chip);
420
421 if (CHECK_PID(chip, 0x5209)) {
422 rtsx_add_cmd(chip, WRITE_REG_CMD, CARD_PULL_CTL4, 0xFF, 0x55);
423 rtsx_add_cmd(chip, WRITE_REG_CMD, CARD_PULL_CTL5, 0xFF, 0x55);
424 rtsx_add_cmd(chip, WRITE_REG_CMD, CARD_PULL_CTL6, 0xFF, 0x15);
425 } else if (CHECK_PID(chip, 0x5208)) {
426 rtsx_add_cmd(chip, WRITE_REG_CMD, CARD_PULL_CTL1, 0xFF,
427 MS_D1_PD | MS_D2_PD | MS_CLK_NP | MS_D6_PD);
428 rtsx_add_cmd(chip, WRITE_REG_CMD, CARD_PULL_CTL2, 0xFF,
429 MS_D3_PD | MS_D0_PD | MS_BS_NP | XD_D4_PD);
430 rtsx_add_cmd(chip, WRITE_REG_CMD, CARD_PULL_CTL3, 0xFF,
431 MS_D7_PD | XD_CE_PD | XD_CLE_PD | XD_CD_PU);
432 rtsx_add_cmd(chip, WRITE_REG_CMD, CARD_PULL_CTL4, 0xFF,
433 XD_RDY_PD | SD_D3_PD | SD_D2_PD | XD_ALE_PD);
434 rtsx_add_cmd(chip, WRITE_REG_CMD, CARD_PULL_CTL5, 0xFF,
435 MS_INS_PU | SD_WP_PD | SD_CD_PU | SD_CMD_PD);
436 rtsx_add_cmd(chip, WRITE_REG_CMD, CARD_PULL_CTL6, 0xFF,
437 MS_D5_PD | MS_D4_PD);
438 } else if (CHECK_PID(chip, 0x5288)) {
439 if (CHECK_BARO_PKG(chip, QFN)) {
440 rtsx_add_cmd(chip, WRITE_REG_CMD,
441 CARD_PULL_CTL1, 0xFF, 0x55);
442 rtsx_add_cmd(chip, WRITE_REG_CMD,
443 CARD_PULL_CTL2, 0xFF, 0x45);
444 rtsx_add_cmd(chip, WRITE_REG_CMD,
445 CARD_PULL_CTL3, 0xFF, 0x4B);
446 rtsx_add_cmd(chip, WRITE_REG_CMD,
447 CARD_PULL_CTL4, 0xFF, 0x29);
448 }
449 }
450
451 retval = rtsx_send_cmd(chip, MS_CARD, 100);
452 if (retval < 0)
453 TRACE_RET(chip, STATUS_FAIL);
454
455 return STATUS_SUCCESS;
456}
457
458static int ms_prepare_reset(struct rtsx_chip *chip)
459{
460 struct ms_info *ms_card = &(chip->ms_card);
461 int retval;
462 u8 oc_mask = 0;
463
464 ms_card->ms_type = 0;
465 ms_card->check_ms_flow = 0;
466 ms_card->switch_8bit_fail = 0;
467 ms_card->delay_write.delay_write_flag = 0;
468
469 ms_card->pro_under_formatting = 0;
470
471 retval = ms_power_off_card3v3(chip);
472 if (retval != STATUS_SUCCESS)
473 TRACE_RET(chip, STATUS_FAIL);
474
475 if (!chip->ft2_fast_mode)
476 wait_timeout(250);
477
478 retval = enable_card_clock(chip, MS_CARD);
479 if (retval != STATUS_SUCCESS)
480 TRACE_RET(chip, STATUS_FAIL);
481
482 if (chip->asic_code) {
483 retval = ms_pull_ctl_enable(chip);
484 if (retval != STATUS_SUCCESS)
485 TRACE_RET(chip, STATUS_FAIL);
486 } else {
487 RTSX_WRITE_REG(chip, FPGA_PULL_CTL, FPGA_MS_PULL_CTL_BIT | 0x20, 0);
488 }
489
490 if (!chip->ft2_fast_mode) {
491 retval = card_power_on(chip, MS_CARD);
492 if (retval != STATUS_SUCCESS)
493 TRACE_RET(chip, STATUS_FAIL);
494
495 wait_timeout(150);
496
497#ifdef SUPPORT_OCP
498 if (CHECK_LUN_MODE(chip, SD_MS_2LUN))
499 oc_mask = MS_OC_NOW | MS_OC_EVER;
500 else
501 oc_mask = SD_OC_NOW | SD_OC_EVER;
502
503 if (chip->ocp_stat & oc_mask) {
504 RTSX_DEBUGP("Over current, OCPSTAT is 0x%x\n",
505 chip->ocp_stat);
506 TRACE_RET(chip, STATUS_FAIL);
507 }
508#endif
509 }
510
511 RTSX_WRITE_REG(chip, CARD_OE, MS_OUTPUT_EN, MS_OUTPUT_EN);
512
513 if (chip->asic_code) {
514 RTSX_WRITE_REG(chip, MS_CFG, 0xFF,
515 SAMPLE_TIME_RISING | PUSH_TIME_DEFAULT |
516 NO_EXTEND_TOGGLE | MS_BUS_WIDTH_1);
517 } else {
518 RTSX_WRITE_REG(chip, MS_CFG, 0xFF,
519 SAMPLE_TIME_FALLING | PUSH_TIME_DEFAULT |
520 NO_EXTEND_TOGGLE | MS_BUS_WIDTH_1);
521 }
522 RTSX_WRITE_REG(chip, MS_TRANS_CFG, 0xFF, NO_WAIT_INT | NO_AUTO_READ_INT_REG);
523 RTSX_WRITE_REG(chip, CARD_STOP, MS_STOP | MS_CLR_ERR, MS_STOP | MS_CLR_ERR);
524
525 retval = ms_set_init_para(chip);
526 if (retval != STATUS_SUCCESS)
527 TRACE_RET(chip, STATUS_FAIL);
528
529 return STATUS_SUCCESS;
530}
531
532static int ms_identify_media_type(struct rtsx_chip *chip, int switch_8bit_bus)
533{
534 struct ms_info *ms_card = &(chip->ms_card);
535 int retval, i;
536 u8 val;
537
538 retval = ms_set_rw_reg_addr(chip, Pro_StatusReg, 6, SystemParm, 1);
539 if (retval != STATUS_SUCCESS)
540 TRACE_RET(chip, STATUS_FAIL);
541
542 for (i = 0; i < MS_MAX_RETRY_COUNT; i++) {
543 retval = ms_transfer_tpc(chip, MS_TM_READ_BYTES, READ_REG, 6, NO_WAIT_INT);
544 if (retval == STATUS_SUCCESS)
545 break;
546 }
547 if (i == MS_MAX_RETRY_COUNT)
548 TRACE_RET(chip, STATUS_FAIL);
549
550 RTSX_READ_REG(chip, PPBUF_BASE2 + 2, &val);
551 RTSX_DEBUGP("Type register: 0x%x\n", val);
552 if (val != 0x01) {
553 if (val != 0x02)
554 ms_card->check_ms_flow = 1;
555
556 TRACE_RET(chip, STATUS_FAIL);
557 }
558
559 RTSX_READ_REG(chip, PPBUF_BASE2 + 4, &val);
560 RTSX_DEBUGP("Category register: 0x%x\n", val);
561 if (val != 0) {
562 ms_card->check_ms_flow = 1;
563 TRACE_RET(chip, STATUS_FAIL);
564 }
565
566 RTSX_READ_REG(chip, PPBUF_BASE2 + 5, &val);
567 RTSX_DEBUGP("Class register: 0x%x\n", val);
568 if (val == 0) {
569 RTSX_READ_REG(chip, PPBUF_BASE2, &val);
570 if (val & WRT_PRTCT)
571 chip->card_wp |= MS_CARD;
572 else
573 chip->card_wp &= ~MS_CARD;
574
575 } else if ((val == 0x01) || (val == 0x02) || (val == 0x03)) {
576 chip->card_wp |= MS_CARD;
577 } else {
578 ms_card->check_ms_flow = 1;
579 TRACE_RET(chip, STATUS_FAIL);
580 }
581
582 ms_card->ms_type |= TYPE_MSPRO;
583
584 RTSX_READ_REG(chip, PPBUF_BASE2 + 3, &val);
585 RTSX_DEBUGP("IF Mode register: 0x%x\n", val);
586 if (val == 0) {
587 ms_card->ms_type &= 0x0F;
588 } else if (val == 7) {
589 if (switch_8bit_bus)
590 ms_card->ms_type |= MS_HG;
591 else
592 ms_card->ms_type &= 0x0F;
593
594 } else {
595 TRACE_RET(chip, STATUS_FAIL);
596 }
597
598 return STATUS_SUCCESS;
599}
600
601static int ms_confirm_cpu_startup(struct rtsx_chip *chip)
602{
603 int retval, i, k;
604 u8 val;
605
606 /* Confirm CPU StartUp */
607 k = 0;
608 do {
609 if (detect_card_cd(chip, MS_CARD) != STATUS_SUCCESS) {
610 ms_set_err_code(chip, MS_NO_CARD);
611 TRACE_RET(chip, STATUS_FAIL);
612 }
613
614 for (i = 0; i < MS_MAX_RETRY_COUNT; i++) {
615 retval = ms_read_bytes(chip, GET_INT, 1, NO_WAIT_INT, &val, 1);
616 if (retval == STATUS_SUCCESS)
617 break;
618 }
619 if (i == MS_MAX_RETRY_COUNT)
620 TRACE_RET(chip, STATUS_FAIL);
621
622 if (k > 100)
623 TRACE_RET(chip, STATUS_FAIL);
624
625 k++;
626 wait_timeout(100);
627 } while (!(val & INT_REG_CED));
628
629 for (i = 0; i < MS_MAX_RETRY_COUNT; i++) {
630 retval = ms_read_bytes(chip, GET_INT, 1, NO_WAIT_INT, &val, 1);
631 if (retval == STATUS_SUCCESS)
632 break;
633 }
634 if (i == MS_MAX_RETRY_COUNT)
635 TRACE_RET(chip, STATUS_FAIL);
636
637 if (val & INT_REG_ERR) {
638 if (val & INT_REG_CMDNK)
639 chip->card_wp |= (MS_CARD);
640 else
641 TRACE_RET(chip, STATUS_FAIL);
642 }
643 /* -- end confirm CPU startup */
644
645 return STATUS_SUCCESS;
646}
647
648static int ms_switch_parallel_bus(struct rtsx_chip *chip)
649{
650 int retval, i;
651 u8 data[2];
652
653 data[0] = PARALLEL_4BIT_IF;
654 data[1] = 0;
655 for (i = 0; i < MS_MAX_RETRY_COUNT; i++) {
656 retval = ms_write_bytes(chip, WRITE_REG, 1, NO_WAIT_INT, data, 2);
657 if (retval == STATUS_SUCCESS)
658 break;
659 }
660 if (retval != STATUS_SUCCESS)
661 TRACE_RET(chip, STATUS_FAIL);
662
663 return STATUS_SUCCESS;
664}
665
666static int ms_switch_8bit_bus(struct rtsx_chip *chip)
667{
668 struct ms_info *ms_card = &(chip->ms_card);
669 int retval, i;
670 u8 data[2];
671
672 data[0] = PARALLEL_8BIT_IF;
673 data[1] = 0;
674 for (i = 0; i < MS_MAX_RETRY_COUNT; i++) {
675 retval = ms_write_bytes(chip, WRITE_REG, 1, NO_WAIT_INT, data, 2);
676 if (retval == STATUS_SUCCESS)
677 break;
678 }
679 if (retval != STATUS_SUCCESS)
680 TRACE_RET(chip, STATUS_FAIL);
681
682 RTSX_WRITE_REG(chip, MS_CFG, 0x98, MS_BUS_WIDTH_8 | SAMPLE_TIME_FALLING);
683 ms_card->ms_type |= MS_8BIT;
684 retval = ms_set_init_para(chip);
685 if (retval != STATUS_SUCCESS)
686 TRACE_RET(chip, STATUS_FAIL);
687
688 for (i = 0; i < MS_MAX_RETRY_COUNT; i++) {
689 retval = ms_transfer_tpc(chip, MS_TM_READ_BYTES, GET_INT, 1, NO_WAIT_INT);
690 if (retval != STATUS_SUCCESS)
691 TRACE_RET(chip, STATUS_FAIL);
692 }
693
694 return STATUS_SUCCESS;
695}
696
697static int ms_pro_reset_flow(struct rtsx_chip *chip, int switch_8bit_bus)
698{
699 struct ms_info *ms_card = &(chip->ms_card);
700 int retval, i;
701
702 for (i = 0; i < 3; i++) {
703 retval = ms_prepare_reset(chip);
704 if (retval != STATUS_SUCCESS)
705 TRACE_RET(chip, STATUS_FAIL);
706
707 retval = ms_identify_media_type(chip, switch_8bit_bus);
708 if (retval != STATUS_SUCCESS)
709 TRACE_RET(chip, STATUS_FAIL);
710
711 retval = ms_confirm_cpu_startup(chip);
712 if (retval != STATUS_SUCCESS)
713 TRACE_RET(chip, STATUS_FAIL);
714
715 retval = ms_switch_parallel_bus(chip);
716 if (retval != STATUS_SUCCESS) {
717 if (detect_card_cd(chip, MS_CARD) != STATUS_SUCCESS) {
718 ms_set_err_code(chip, MS_NO_CARD);
719 TRACE_RET(chip, STATUS_FAIL);
720 }
721 continue;
722 } else {
723 break;
724 }
725 }
726
727 if (retval != STATUS_SUCCESS)
728 TRACE_RET(chip, STATUS_FAIL);
729
730 /* Switch MS-PRO into Parallel mode */
731 RTSX_WRITE_REG(chip, MS_CFG, 0x18, MS_BUS_WIDTH_4);
732 RTSX_WRITE_REG(chip, MS_CFG, PUSH_TIME_ODD, PUSH_TIME_ODD);
733
734 retval = ms_set_init_para(chip);
735 if (retval != STATUS_SUCCESS)
736 TRACE_RET(chip, STATUS_FAIL);
737
738 /* If MSPro HG Card, We shall try to switch to 8-bit bus */
739 if (CHK_MSHG(ms_card) && chip->support_ms_8bit && switch_8bit_bus) {
740 retval = ms_switch_8bit_bus(chip);
741 if (retval != STATUS_SUCCESS) {
742 ms_card->switch_8bit_fail = 1;
743 TRACE_RET(chip, STATUS_FAIL);
744 }
745 }
746
747 return STATUS_SUCCESS;
748}
749
750#ifdef XC_POWERCLASS
751static int msxc_change_power(struct rtsx_chip *chip, u8 mode)
752{
753 int retval;
754 u8 buf[6];
755
756 ms_cleanup_work(chip);
757
758 retval = ms_set_rw_reg_addr(chip, 0, 0, Pro_DataCount1, 6);
759 if (retval != STATUS_SUCCESS)
760 TRACE_RET(chip, STATUS_FAIL);
761
762 buf[0] = 0;
763 buf[1] = mode;
764 buf[2] = 0;
765 buf[3] = 0;
766 buf[4] = 0;
767 buf[5] = 0;
768
769 retval = ms_write_bytes(chip, PRO_WRITE_REG , 6, NO_WAIT_INT, buf, 6);
770 if (retval != STATUS_SUCCESS)
771 TRACE_RET(chip, STATUS_FAIL);
772
773 retval = ms_send_cmd(chip, XC_CHG_POWER, WAIT_INT);
774 if (retval != STATUS_SUCCESS)
775 TRACE_RET(chip, STATUS_FAIL);
776
777 RTSX_READ_REG(chip, MS_TRANS_CFG, buf);
778 if (buf[0] & (MS_INT_CMDNK | MS_INT_ERR))
779 TRACE_RET(chip, STATUS_FAIL);
780
781 return STATUS_SUCCESS;
782}
783#endif
784
785static int ms_read_attribute_info(struct rtsx_chip *chip)
786{
787 struct ms_info *ms_card = &(chip->ms_card);
788 int retval, i;
789 u8 val, *buf, class_code, device_type, sub_class, data[16];
790 u16 total_blk = 0, blk_size = 0;
791#ifdef SUPPORT_MSXC
792 u32 xc_total_blk = 0, xc_blk_size = 0;
793#endif
794 u32 sys_info_addr = 0, sys_info_size;
795#ifdef SUPPORT_PCGL_1P18
796 u32 model_name_addr = 0, model_name_size;
797 int found_sys_info = 0, found_model_name = 0;
798#endif
799
800 retval = ms_set_rw_reg_addr(chip, Pro_IntReg, 2, Pro_SystemParm, 7);
801 if (retval != STATUS_SUCCESS)
802 TRACE_RET(chip, STATUS_FAIL);
803
804 if (CHK_MS8BIT(ms_card))
805 data[0] = PARALLEL_8BIT_IF;
806 else
807 data[0] = PARALLEL_4BIT_IF;
808
809 data[1] = 0;
810
811 data[2] = 0x40;
812 data[3] = 0;
813 data[4] = 0;
814 data[5] = 0;
815 data[6] = 0;
816 data[7] = 0;
817
818 for (i = 0; i < MS_MAX_RETRY_COUNT; i++) {
819 retval = ms_write_bytes(chip, PRO_WRITE_REG, 7, NO_WAIT_INT, data, 8);
820 if (retval == STATUS_SUCCESS)
821 break;
822 }
823 if (retval != STATUS_SUCCESS)
824 TRACE_RET(chip, STATUS_FAIL);
825
826 buf = kmalloc(64 * 512, GFP_KERNEL);
827 if (buf == NULL)
828 TRACE_RET(chip, STATUS_ERROR);
829
830 for (i = 0; i < MS_MAX_RETRY_COUNT; i++) {
831 retval = ms_send_cmd(chip, PRO_READ_ATRB, WAIT_INT);
832 if (retval != STATUS_SUCCESS)
833 continue;
834
835 retval = rtsx_read_register(chip, MS_TRANS_CFG, &val);
836 if (retval != STATUS_SUCCESS) {
837 kfree(buf);
838 TRACE_RET(chip, STATUS_FAIL);
839 }
840 if (!(val & MS_INT_BREQ)) {
841 kfree(buf);
842 TRACE_RET(chip, STATUS_FAIL);
843 }
844 retval = ms_transfer_data(chip, MS_TM_AUTO_READ, PRO_READ_LONG_DATA,
845 0x40, WAIT_INT, 0, 0, buf, 64 * 512);
846 if (retval == STATUS_SUCCESS)
847 break;
848 else
849 rtsx_clear_ms_error(chip);
850 }
851 if (retval != STATUS_SUCCESS) {
852 kfree(buf);
853 TRACE_RET(chip, STATUS_FAIL);
854 }
855
856 i = 0;
857 do {
858 retval = rtsx_read_register(chip, MS_TRANS_CFG, &val);
859 if (retval != STATUS_SUCCESS) {
860 kfree(buf);
861 TRACE_RET(chip, STATUS_FAIL);
862 }
863
864 if ((val & MS_INT_CED) || !(val & MS_INT_BREQ))
865 break;
866
867 retval = ms_transfer_tpc(chip, MS_TM_NORMAL_READ, PRO_READ_LONG_DATA, 0, WAIT_INT);
868 if (retval != STATUS_SUCCESS) {
869 kfree(buf);
870 TRACE_RET(chip, STATUS_FAIL);
871 }
872
873 i++;
874 } while (i < 1024);
875
876 if (retval != STATUS_SUCCESS) {
877 kfree(buf);
878 TRACE_RET(chip, STATUS_FAIL);
879 }
880
881 if ((buf[0] != 0xa5) && (buf[1] != 0xc3)) {
882 /* Signature code is wrong */
883 kfree(buf);
884 TRACE_RET(chip, STATUS_FAIL);
885 }
886
887 if ((buf[4] < 1) || (buf[4] > 12)) {
888 kfree(buf);
889 TRACE_RET(chip, STATUS_FAIL);
890 }
891
892 for (i = 0; i < buf[4]; i++) {
893 int cur_addr_off = 16 + i * 12;
894
895#ifdef SUPPORT_MSXC
896 if ((buf[cur_addr_off + 8] == 0x10) || (buf[cur_addr_off + 8] == 0x13))
897#else
898 if (buf[cur_addr_off + 8] == 0x10)
899#endif
900 {
901 sys_info_addr = ((u32)buf[cur_addr_off + 0] << 24) |
902 ((u32)buf[cur_addr_off + 1] << 16) |
903 ((u32)buf[cur_addr_off + 2] << 8) | buf[cur_addr_off + 3];
904 sys_info_size = ((u32)buf[cur_addr_off + 4] << 24) |
905 ((u32)buf[cur_addr_off + 5] << 16) |
906 ((u32)buf[cur_addr_off + 6] << 8) | buf[cur_addr_off + 7];
907 RTSX_DEBUGP("sys_info_addr = 0x%x, sys_info_size = 0x%x\n",
908 sys_info_addr, sys_info_size);
909 if (sys_info_size != 96) {
910 kfree(buf);
911 TRACE_RET(chip, STATUS_FAIL);
912 }
913 if (sys_info_addr < 0x1A0) {
914 kfree(buf);
915 TRACE_RET(chip, STATUS_FAIL);
916 }
917 if ((sys_info_size + sys_info_addr) > 0x8000) {
918 kfree(buf);
919 TRACE_RET(chip, STATUS_FAIL);
920 }
921
922#ifdef SUPPORT_MSXC
923 if (buf[cur_addr_off + 8] == 0x13)
924 ms_card->ms_type |= MS_XC;
925#endif
926#ifdef SUPPORT_PCGL_1P18
927 found_sys_info = 1;
928#else
929 break;
930#endif
931 }
932#ifdef SUPPORT_PCGL_1P18
933 if (buf[cur_addr_off + 8] == 0x15) {
934 model_name_addr = ((u32)buf[cur_addr_off + 0] << 24) |
935 ((u32)buf[cur_addr_off + 1] << 16) |
936 ((u32)buf[cur_addr_off + 2] << 8) | buf[cur_addr_off + 3];
937 model_name_size = ((u32)buf[cur_addr_off + 4] << 24) |
938 ((u32)buf[cur_addr_off + 5] << 16) |
939 ((u32)buf[cur_addr_off + 6] << 8) | buf[cur_addr_off + 7];
940 RTSX_DEBUGP("model_name_addr = 0x%x, model_name_size = 0x%x\n",
941 model_name_addr, model_name_size);
942 if (model_name_size != 48) {
943 kfree(buf);
944 TRACE_RET(chip, STATUS_FAIL);
945 }
946 if (model_name_addr < 0x1A0) {
947 kfree(buf);
948 TRACE_RET(chip, STATUS_FAIL);
949 }
950 if ((model_name_size + model_name_addr) > 0x8000) {
951 kfree(buf);
952 TRACE_RET(chip, STATUS_FAIL);
953 }
954
955 found_model_name = 1;
956 }
957
958 if (found_sys_info && found_model_name)
959 break;
960#endif
961 }
962
963 if (i == buf[4]) {
964 kfree(buf);
965 TRACE_RET(chip, STATUS_FAIL);
966 }
967
968 class_code = buf[sys_info_addr + 0];
969 device_type = buf[sys_info_addr + 56];
970 sub_class = buf[sys_info_addr + 46];
971#ifdef SUPPORT_MSXC
972 if (CHK_MSXC(ms_card)) {
973 xc_total_blk = ((u32)buf[sys_info_addr + 6] << 24) |
974 ((u32)buf[sys_info_addr + 7] << 16) |
975 ((u32)buf[sys_info_addr + 8] << 8) |
976 buf[sys_info_addr + 9];
977 xc_blk_size = ((u32)buf[sys_info_addr + 32] << 24) |
978 ((u32)buf[sys_info_addr + 33] << 16) |
979 ((u32)buf[sys_info_addr + 34] << 8) |
980 buf[sys_info_addr + 35];
981 RTSX_DEBUGP("xc_total_blk = 0x%x, xc_blk_size = 0x%x\n", xc_total_blk, xc_blk_size);
982 } else {
983 total_blk = ((u16)buf[sys_info_addr + 6] << 8) | buf[sys_info_addr + 7];
984 blk_size = ((u16)buf[sys_info_addr + 2] << 8) | buf[sys_info_addr + 3];
985 RTSX_DEBUGP("total_blk = 0x%x, blk_size = 0x%x\n", total_blk, blk_size);
986 }
987#else
988 total_blk = ((u16)buf[sys_info_addr + 6] << 8) | buf[sys_info_addr + 7];
989 blk_size = ((u16)buf[sys_info_addr + 2] << 8) | buf[sys_info_addr + 3];
990 RTSX_DEBUGP("total_blk = 0x%x, blk_size = 0x%x\n", total_blk, blk_size);
991#endif
992
993 RTSX_DEBUGP("class_code = 0x%x, device_type = 0x%x, sub_class = 0x%x\n",
994 class_code, device_type, sub_class);
995
996 memcpy(ms_card->raw_sys_info, buf + sys_info_addr, 96);
997#ifdef SUPPORT_PCGL_1P18
998 memcpy(ms_card->raw_model_name, buf + model_name_addr, 48);
999#endif
1000
1001 kfree(buf);
1002
1003#ifdef SUPPORT_MSXC
1004 if (CHK_MSXC(ms_card)) {
1005 if (class_code != 0x03)
1006 TRACE_RET(chip, STATUS_FAIL);
1007 } else {
1008 if (class_code != 0x02)
1009 TRACE_RET(chip, STATUS_FAIL);
1010 }
1011#else
1012 if (class_code != 0x02)
1013 TRACE_RET(chip, STATUS_FAIL);
1014#endif
1015
1016 if (device_type != 0x00) {
1017 if ((device_type == 0x01) || (device_type == 0x02) ||
1018 (device_type == 0x03)) {
1019 chip->card_wp |= MS_CARD;
1020 } else {
1021 TRACE_RET(chip, STATUS_FAIL);
1022 }
1023 }
1024
1025 if (sub_class & 0xC0)
1026 TRACE_RET(chip, STATUS_FAIL);
1027
1028 RTSX_DEBUGP("class_code: 0x%x, device_type: 0x%x, sub_class: 0x%x\n",
1029 class_code, device_type, sub_class);
1030
1031#ifdef SUPPORT_MSXC
1032 if (CHK_MSXC(ms_card)) {
1033 chip->capacity[chip->card2lun[MS_CARD]] =
1034 ms_card->capacity = xc_total_blk * xc_blk_size;
1035 } else {
1036 chip->capacity[chip->card2lun[MS_CARD]] =
1037 ms_card->capacity = total_blk * blk_size;
1038 }
1039#else
1040 chip->capacity[chip->card2lun[MS_CARD]] = ms_card->capacity = total_blk * blk_size;
1041#endif
1042
1043 return STATUS_SUCCESS;
1044}
1045
1046#ifdef SUPPORT_MAGIC_GATE
1047static int mg_set_tpc_para_sub(struct rtsx_chip *chip, int type, u8 mg_entry_num);
1048#endif
1049
1050static int reset_ms_pro(struct rtsx_chip *chip)
1051{
1052 struct ms_info *ms_card = &(chip->ms_card);
1053 int retval;
1054#ifdef XC_POWERCLASS
1055 u8 change_power_class;
1056
1057 if (chip->ms_power_class_en & 0x02)
1058 change_power_class = 2;
1059 else if (chip->ms_power_class_en & 0x01)
1060 change_power_class = 1;
1061 else
1062 change_power_class = 0;
1063#endif
1064
1065#ifdef XC_POWERCLASS
1066Retry:
1067#endif
1068 retval = ms_pro_reset_flow(chip, 1);
1069 if (retval != STATUS_SUCCESS) {
1070 if (ms_card->switch_8bit_fail) {
1071 retval = ms_pro_reset_flow(chip, 0);
1072 if (retval != STATUS_SUCCESS)
1073 TRACE_RET(chip, STATUS_FAIL);
1074 } else {
1075 TRACE_RET(chip, STATUS_FAIL);
1076 }
1077 }
1078
1079 retval = ms_read_attribute_info(chip);
1080 if (retval != STATUS_SUCCESS)
1081 TRACE_RET(chip, STATUS_FAIL);
1082
1083#ifdef XC_POWERCLASS
1084 if (CHK_HG8BIT(ms_card))
1085 change_power_class = 0;
1086
1087 if (change_power_class && CHK_MSXC(ms_card)) {
1088 u8 power_class_en = chip->ms_power_class_en;
1089
1090 RTSX_DEBUGP("power_class_en = 0x%x\n", power_class_en);
1091 RTSX_DEBUGP("change_power_class = %d\n", change_power_class);
1092
1093 if (change_power_class)
1094 power_class_en &= (1 << (change_power_class - 1));
1095 else
1096 power_class_en = 0;
1097
1098 if (power_class_en) {
1099 u8 power_class_mode = (ms_card->raw_sys_info[46] & 0x18) >> 3;
1100 RTSX_DEBUGP("power_class_mode = 0x%x", power_class_mode);
1101 if (change_power_class > power_class_mode)
1102 change_power_class = power_class_mode;
1103 if (change_power_class) {
1104 retval = msxc_change_power(chip, change_power_class);
1105 if (retval != STATUS_SUCCESS) {
1106 change_power_class--;
1107 goto Retry;
1108 }
1109 }
1110 }
1111 }
1112#endif
1113
1114#ifdef SUPPORT_MAGIC_GATE
1115 retval = mg_set_tpc_para_sub(chip, 0, 0);
1116 if (retval != STATUS_SUCCESS)
1117 TRACE_RET(chip, STATUS_FAIL);
1118#endif
1119
1120 if (CHK_HG8BIT(ms_card))
1121 chip->card_bus_width[chip->card2lun[MS_CARD]] = 8;
1122 else
1123 chip->card_bus_width[chip->card2lun[MS_CARD]] = 4;
1124
1125 return STATUS_SUCCESS;
1126}
1127
1128static int ms_read_status_reg(struct rtsx_chip *chip)
1129{
1130 int retval;
1131 u8 val[2];
1132
1133 retval = ms_set_rw_reg_addr(chip, StatusReg0, 2, 0, 0);
1134 if (retval != STATUS_SUCCESS)
1135 TRACE_RET(chip, STATUS_FAIL);
1136
1137 retval = ms_read_bytes(chip, READ_REG, 2, NO_WAIT_INT, val, 2);
1138 if (retval != STATUS_SUCCESS)
1139 TRACE_RET(chip, STATUS_FAIL);
1140
1141 if (val[1] & (STS_UCDT | STS_UCEX | STS_UCFG)) {
1142 ms_set_err_code(chip, MS_FLASH_READ_ERROR);
1143 TRACE_RET(chip, STATUS_FAIL);
1144 }
1145
1146 return STATUS_SUCCESS;
1147}
1148
1149
1150static int ms_read_extra_data(struct rtsx_chip *chip,
1151 u16 block_addr, u8 page_num, u8 *buf, int buf_len)
1152{
1153 struct ms_info *ms_card = &(chip->ms_card);
1154 int retval, i;
1155 u8 val, data[10];
1156
1157 retval = ms_set_rw_reg_addr(chip, OverwriteFlag, MS_EXTRA_SIZE, SystemParm, 6);
1158 if (retval != STATUS_SUCCESS)
1159 TRACE_RET(chip, STATUS_FAIL);
1160
1161 if (CHK_MS4BIT(ms_card)) {
1162 /* Parallel interface */
1163 data[0] = 0x88;
1164 } else {
1165 /* Serial interface */
1166 data[0] = 0x80;
1167 }
1168 data[1] = 0;
1169 data[2] = (u8)(block_addr >> 8);
1170 data[3] = (u8)block_addr;
1171 data[4] = 0x40;
1172 data[5] = page_num;
1173
1174 for (i = 0; i < MS_MAX_RETRY_COUNT; i++) {
1175 retval = ms_write_bytes(chip, WRITE_REG, 6, NO_WAIT_INT, data, 6);
1176 if (retval == STATUS_SUCCESS)
1177 break;
1178 }
1179 if (i == MS_MAX_RETRY_COUNT)
1180 TRACE_RET(chip, STATUS_FAIL);
1181
1182 ms_set_err_code(chip, MS_NO_ERROR);
1183
1184 for (i = 0; i < MS_MAX_RETRY_COUNT; i++) {
1185 retval = ms_send_cmd(chip, BLOCK_READ, WAIT_INT);
1186 if (retval == STATUS_SUCCESS)
1187 break;
1188 }
1189 if (i == MS_MAX_RETRY_COUNT)
1190 TRACE_RET(chip, STATUS_FAIL);
1191
1192 ms_set_err_code(chip, MS_NO_ERROR);
1193 retval = ms_read_bytes(chip, GET_INT, 1, NO_WAIT_INT, &val, 1);
1194 if (retval != STATUS_SUCCESS)
1195 TRACE_RET(chip, STATUS_FAIL);
1196
1197 if (val & INT_REG_CMDNK) {
1198 ms_set_err_code(chip, MS_CMD_NK);
1199 TRACE_RET(chip, STATUS_FAIL);
1200 }
1201 if (val & INT_REG_CED) {
1202 if (val & INT_REG_ERR) {
1203 retval = ms_read_status_reg(chip);
1204 if (retval != STATUS_SUCCESS)
1205 TRACE_RET(chip, STATUS_FAIL);
1206
1207 retval = ms_set_rw_reg_addr(chip, OverwriteFlag, MS_EXTRA_SIZE, SystemParm, 6);
1208 if (retval != STATUS_SUCCESS)
1209 TRACE_RET(chip, STATUS_FAIL);
1210 }
1211 }
1212
1213 retval = ms_read_bytes(chip, READ_REG, MS_EXTRA_SIZE, NO_WAIT_INT, data, MS_EXTRA_SIZE);
1214 if (retval != STATUS_SUCCESS)
1215 TRACE_RET(chip, STATUS_FAIL);
1216
1217 if (buf && buf_len) {
1218 if (buf_len > MS_EXTRA_SIZE)
1219 buf_len = MS_EXTRA_SIZE;
1220 memcpy(buf, data, buf_len);
1221 }
1222
1223 return STATUS_SUCCESS;
1224}
1225
1226static int ms_write_extra_data(struct rtsx_chip *chip,
1227 u16 block_addr, u8 page_num, u8 *buf, int buf_len)
1228{
1229 struct ms_info *ms_card = &(chip->ms_card);
1230 int retval, i;
1231 u8 val, data[16];
1232
1233 if (!buf || (buf_len < MS_EXTRA_SIZE))
1234 TRACE_RET(chip, STATUS_FAIL);
1235
1236 retval = ms_set_rw_reg_addr(chip, OverwriteFlag, MS_EXTRA_SIZE, SystemParm, 6 + MS_EXTRA_SIZE);
1237 if (retval != STATUS_SUCCESS)
1238 TRACE_RET(chip, STATUS_FAIL);
1239
1240 if (CHK_MS4BIT(ms_card))
1241 data[0] = 0x88;
1242 else
1243 data[0] = 0x80;
1244
1245 data[1] = 0;
1246 data[2] = (u8)(block_addr >> 8);
1247 data[3] = (u8)block_addr;
1248 data[4] = 0x40;
1249 data[5] = page_num;
1250
1251 for (i = 6; i < MS_EXTRA_SIZE + 6; i++)
1252 data[i] = buf[i - 6];
1253
1254 retval = ms_write_bytes(chip, WRITE_REG , (6+MS_EXTRA_SIZE), NO_WAIT_INT, data, 16);
1255 if (retval != STATUS_SUCCESS)
1256 TRACE_RET(chip, STATUS_FAIL);
1257
1258 retval = ms_send_cmd(chip, BLOCK_WRITE, WAIT_INT);
1259 if (retval != STATUS_SUCCESS)
1260 TRACE_RET(chip, STATUS_FAIL);
1261
1262 ms_set_err_code(chip, MS_NO_ERROR);
1263 retval = ms_read_bytes(chip, GET_INT, 1, NO_WAIT_INT, &val, 1);
1264 if (retval != STATUS_SUCCESS)
1265 TRACE_RET(chip, STATUS_FAIL);
1266
1267 if (val & INT_REG_CMDNK) {
1268 ms_set_err_code(chip, MS_CMD_NK);
1269 TRACE_RET(chip, STATUS_FAIL);
1270 }
1271 if (val & INT_REG_CED) {
1272 if (val & INT_REG_ERR) {
1273 ms_set_err_code(chip, MS_FLASH_WRITE_ERROR);
1274 TRACE_RET(chip, STATUS_FAIL);
1275 }
1276 }
1277
1278 return STATUS_SUCCESS;
1279}
1280
1281
1282static int ms_read_page(struct rtsx_chip *chip, u16 block_addr, u8 page_num)
1283{
1284 struct ms_info *ms_card = &(chip->ms_card);
1285 int retval;
1286 u8 val, data[6];
1287
1288 retval = ms_set_rw_reg_addr(chip, OverwriteFlag, MS_EXTRA_SIZE, SystemParm, 6);
1289 if (retval != STATUS_SUCCESS)
1290 TRACE_RET(chip, STATUS_FAIL);
1291
1292 if (CHK_MS4BIT(ms_card))
1293 data[0] = 0x88;
1294 else
1295 data[0] = 0x80;
1296
1297 data[1] = 0;
1298 data[2] = (u8)(block_addr >> 8);
1299 data[3] = (u8)block_addr;
1300 data[4] = 0x20;
1301 data[5] = page_num;
1302
1303 retval = ms_write_bytes(chip, WRITE_REG , 6, NO_WAIT_INT, data, 6);
1304 if (retval != STATUS_SUCCESS)
1305 TRACE_RET(chip, STATUS_FAIL);
1306
1307 retval = ms_send_cmd(chip, BLOCK_READ, WAIT_INT);
1308 if (retval != STATUS_SUCCESS)
1309 TRACE_RET(chip, STATUS_FAIL);
1310
1311 ms_set_err_code(chip, MS_NO_ERROR);
1312 retval = ms_read_bytes(chip, GET_INT, 1, NO_WAIT_INT, &val, 1);
1313 if (retval != STATUS_SUCCESS)
1314 TRACE_RET(chip, STATUS_FAIL);
1315
1316 if (val & INT_REG_CMDNK) {
1317 ms_set_err_code(chip, MS_CMD_NK);
1318 TRACE_RET(chip, STATUS_FAIL);
1319 }
1320
1321 if (val & INT_REG_CED) {
1322 if (val & INT_REG_ERR) {
1323 if (!(val & INT_REG_BREQ)) {
1324 ms_set_err_code(chip, MS_FLASH_READ_ERROR);
1325 TRACE_RET(chip, STATUS_FAIL);
1326 }
1327 retval = ms_read_status_reg(chip);
1328 if (retval != STATUS_SUCCESS)
1329 ms_set_err_code(chip, MS_FLASH_WRITE_ERROR);
1330
1331 } else {
1332 if (!(val & INT_REG_BREQ)) {
1333 ms_set_err_code(chip, MS_BREQ_ERROR);
1334 TRACE_RET(chip, STATUS_FAIL);
1335 }
1336 }
1337 }
1338
1339 retval = ms_transfer_tpc(chip, MS_TM_NORMAL_READ, READ_PAGE_DATA, 0, NO_WAIT_INT);
1340 if (retval != STATUS_SUCCESS)
1341 TRACE_RET(chip, STATUS_FAIL);
1342
1343 if (ms_check_err_code(chip, MS_FLASH_WRITE_ERROR))
1344 TRACE_RET(chip, STATUS_FAIL);
1345
1346 return STATUS_SUCCESS;
1347}
1348
1349
1350static int ms_set_bad_block(struct rtsx_chip *chip, u16 phy_blk)
1351{
1352 struct ms_info *ms_card = &(chip->ms_card);
1353 int retval;
1354 u8 val, data[8], extra[MS_EXTRA_SIZE];
1355
1356 retval = ms_read_extra_data(chip, phy_blk, 0, extra, MS_EXTRA_SIZE);
1357 if (retval != STATUS_SUCCESS)
1358 TRACE_RET(chip, STATUS_FAIL);
1359
1360 retval = ms_set_rw_reg_addr(chip, OverwriteFlag, MS_EXTRA_SIZE, SystemParm, 7);
1361 if (retval != STATUS_SUCCESS)
1362 TRACE_RET(chip, STATUS_FAIL);
1363
1364 ms_set_err_code(chip, MS_NO_ERROR);
1365
1366 if (CHK_MS4BIT(ms_card))
1367 data[0] = 0x88;
1368 else
1369 data[0] = 0x80;
1370
1371 data[1] = 0;
1372 data[2] = (u8)(phy_blk >> 8);
1373 data[3] = (u8)phy_blk;
1374 data[4] = 0x80;
1375 data[5] = 0;
1376 data[6] = extra[0] & 0x7F;
1377 data[7] = 0xFF;
1378
1379 retval = ms_write_bytes(chip, WRITE_REG , 7, NO_WAIT_INT, data, 7);
1380 if (retval != STATUS_SUCCESS)
1381 TRACE_RET(chip, STATUS_FAIL);
1382
1383 retval = ms_send_cmd(chip, BLOCK_WRITE, WAIT_INT);
1384 if (retval != STATUS_SUCCESS)
1385 TRACE_RET(chip, STATUS_FAIL);
1386
1387 ms_set_err_code(chip, MS_NO_ERROR);
1388 retval = ms_read_bytes(chip, GET_INT, 1, NO_WAIT_INT, &val, 1);
1389 if (retval != STATUS_SUCCESS)
1390 TRACE_RET(chip, STATUS_FAIL);
1391
1392 if (val & INT_REG_CMDNK) {
1393 ms_set_err_code(chip, MS_CMD_NK);
1394 TRACE_RET(chip, STATUS_FAIL);
1395 }
1396
1397 if (val & INT_REG_CED) {
1398 if (val & INT_REG_ERR) {
1399 ms_set_err_code(chip, MS_FLASH_WRITE_ERROR);
1400 TRACE_RET(chip, STATUS_FAIL);
1401 }
1402 }
1403
1404 return STATUS_SUCCESS;
1405}
1406
1407
1408static int ms_erase_block(struct rtsx_chip *chip, u16 phy_blk)
1409{
1410 struct ms_info *ms_card = &(chip->ms_card);
1411 int retval, i = 0;
1412 u8 val, data[6];
1413
1414 retval = ms_set_rw_reg_addr(chip, OverwriteFlag, MS_EXTRA_SIZE, SystemParm, 6);
1415 if (retval != STATUS_SUCCESS)
1416 TRACE_RET(chip, STATUS_FAIL);
1417
1418 ms_set_err_code(chip, MS_NO_ERROR);
1419
1420 if (CHK_MS4BIT(ms_card))
1421 data[0] = 0x88;
1422 else
1423 data[0] = 0x80;
1424
1425 data[1] = 0;
1426 data[2] = (u8)(phy_blk >> 8);
1427 data[3] = (u8)phy_blk;
1428 data[4] = 0;
1429 data[5] = 0;
1430
1431 retval = ms_write_bytes(chip, WRITE_REG, 6, NO_WAIT_INT, data, 6);
1432 if (retval != STATUS_SUCCESS)
1433 TRACE_RET(chip, STATUS_FAIL);
1434
1435ERASE_RTY:
1436 retval = ms_send_cmd(chip, BLOCK_ERASE, WAIT_INT);
1437 if (retval != STATUS_SUCCESS)
1438 TRACE_RET(chip, STATUS_FAIL);
1439
1440 ms_set_err_code(chip, MS_NO_ERROR);
1441 retval = ms_read_bytes(chip, GET_INT, 1, NO_WAIT_INT, &val, 1);
1442 if (retval != STATUS_SUCCESS)
1443 TRACE_RET(chip, STATUS_FAIL);
1444
1445 if (val & INT_REG_CMDNK) {
1446 if (i < 3) {
1447 i++;
1448 goto ERASE_RTY;
1449 }
1450
1451 ms_set_err_code(chip, MS_CMD_NK);
1452 ms_set_bad_block(chip, phy_blk);
1453 TRACE_RET(chip, STATUS_FAIL);
1454 }
1455
1456 if (val & INT_REG_CED) {
1457 if (val & INT_REG_ERR) {
1458 ms_set_err_code(chip, MS_FLASH_WRITE_ERROR);
1459 TRACE_RET(chip, STATUS_FAIL);
1460 }
1461 }
1462
1463 return STATUS_SUCCESS;
1464}
1465
1466
1467static void ms_set_page_status(u16 log_blk, u8 type, u8 *extra, int extra_len)
1468{
1469 if (!extra || (extra_len < MS_EXTRA_SIZE))
1470 return;
1471
1472 memset(extra, 0xFF, MS_EXTRA_SIZE);
1473
1474 if (type == setPS_NG) {
1475 /* set page status as 1:NG,and block status keep 1:OK */
1476 extra[0] = 0xB8;
1477 } else {
1478 /* set page status as 0:Data Error,and block status keep 1:OK */
1479 extra[0] = 0x98;
1480 }
1481
1482 extra[2] = (u8)(log_blk >> 8);
1483 extra[3] = (u8)log_blk;
1484}
1485
1486static int ms_init_page(struct rtsx_chip *chip, u16 phy_blk, u16 log_blk, u8 start_page, u8 end_page)
1487{
1488 int retval;
1489 u8 extra[MS_EXTRA_SIZE], i;
1490
1491 memset(extra, 0xff, MS_EXTRA_SIZE);
1492
1493 extra[0] = 0xf8; /* Block, page OK, data erased */
1494 extra[1] = 0xff;
1495 extra[2] = (u8)(log_blk >> 8);
1496 extra[3] = (u8)log_blk;
1497
1498 for (i = start_page; i < end_page; i++) {
1499 if (detect_card_cd(chip, MS_CARD) != STATUS_SUCCESS) {
1500 ms_set_err_code(chip, MS_NO_CARD);
1501 TRACE_RET(chip, STATUS_FAIL);
1502 }
1503
1504 retval = ms_write_extra_data(chip, phy_blk, i, extra, MS_EXTRA_SIZE);
1505 if (retval != STATUS_SUCCESS)
1506 TRACE_RET(chip, STATUS_FAIL);
1507 }
1508
1509 return STATUS_SUCCESS;
1510}
1511
1512static int ms_copy_page(struct rtsx_chip *chip, u16 old_blk, u16 new_blk,
1513 u16 log_blk, u8 start_page, u8 end_page)
1514{
1515 struct ms_info *ms_card = &(chip->ms_card);
1516 int retval, rty_cnt, uncorrect_flag = 0;
1517 u8 extra[MS_EXTRA_SIZE], val, i, j, data[16];
1518
1519 RTSX_DEBUGP("Copy page from 0x%x to 0x%x, logical block is 0x%x\n",
1520 old_blk, new_blk, log_blk);
1521 RTSX_DEBUGP("start_page = %d, end_page = %d\n", start_page, end_page);
1522
1523 retval = ms_read_extra_data(chip, new_blk, 0, extra, MS_EXTRA_SIZE);
1524 if (retval != STATUS_SUCCESS)
1525 TRACE_RET(chip, STATUS_FAIL);
1526
1527 retval = ms_read_status_reg(chip);
1528 if (retval != STATUS_SUCCESS)
1529 TRACE_RET(chip, STATUS_FAIL);
1530
1531 RTSX_READ_REG(chip, PPBUF_BASE2, &val);
1532
1533 if (val & BUF_FULL) {
1534 retval = ms_send_cmd(chip, CLEAR_BUF, WAIT_INT);
1535 if (retval != STATUS_SUCCESS)
1536 TRACE_RET(chip, STATUS_FAIL);
1537
1538 retval = ms_read_bytes(chip, GET_INT, 1, NO_WAIT_INT, &val, 1);
1539 if (retval != STATUS_SUCCESS)
1540 TRACE_RET(chip, STATUS_FAIL);
1541
1542 if (!(val & INT_REG_CED)) {
1543 ms_set_err_code(chip, MS_FLASH_WRITE_ERROR);
1544 TRACE_RET(chip, STATUS_FAIL);
1545 }
1546 }
1547
1548 for (i = start_page; i < end_page; i++) {
1549 if (detect_card_cd(chip, MS_CARD) != STATUS_SUCCESS) {
1550 ms_set_err_code(chip, MS_NO_CARD);
1551 TRACE_RET(chip, STATUS_FAIL);
1552 }
1553
1554 ms_read_extra_data(chip, old_blk, i, extra, MS_EXTRA_SIZE);
1555
1556 retval = ms_set_rw_reg_addr(chip, OverwriteFlag, MS_EXTRA_SIZE, SystemParm, 6);
1557 if (retval != STATUS_SUCCESS)
1558 TRACE_RET(chip, STATUS_FAIL);
1559
1560 ms_set_err_code(chip, MS_NO_ERROR);
1561
1562 if (CHK_MS4BIT(ms_card))
1563 data[0] = 0x88;
1564 else
1565 data[0] = 0x80;
1566
1567 data[1] = 0;
1568 data[2] = (u8)(old_blk >> 8);
1569 data[3] = (u8)old_blk;
1570 data[4] = 0x20;
1571 data[5] = i;
1572
1573 retval = ms_write_bytes(chip, WRITE_REG , 6, NO_WAIT_INT, data, 6);
1574 if (retval != STATUS_SUCCESS)
1575 TRACE_RET(chip, STATUS_FAIL);
1576
1577 retval = ms_send_cmd(chip, BLOCK_READ, WAIT_INT);
1578 if (retval != STATUS_SUCCESS)
1579 TRACE_RET(chip, STATUS_FAIL);
1580
1581 ms_set_err_code(chip, MS_NO_ERROR);
1582 retval = ms_read_bytes(chip, GET_INT, 1, NO_WAIT_INT, &val, 1);
1583 if (retval != STATUS_SUCCESS)
1584 TRACE_RET(chip, STATUS_FAIL);
1585
1586 if (val & INT_REG_CMDNK) {
1587 ms_set_err_code(chip, MS_CMD_NK);
1588 TRACE_RET(chip, STATUS_FAIL);
1589 }
1590
1591 if (val & INT_REG_CED) {
1592 if (val & INT_REG_ERR) {
1593 retval = ms_read_status_reg(chip);
1594 if (retval != STATUS_SUCCESS) {
1595 uncorrect_flag = 1;
1596 RTSX_DEBUGP("Uncorrectable error\n");
1597 } else {
1598 uncorrect_flag = 0;
1599 }
1600
1601 retval = ms_transfer_tpc(chip, MS_TM_NORMAL_READ, READ_PAGE_DATA, 0, NO_WAIT_INT);
1602 if (retval != STATUS_SUCCESS)
1603 TRACE_RET(chip, STATUS_FAIL);
1604
1605 if (uncorrect_flag) {
1606 ms_set_page_status(log_blk, setPS_NG, extra, MS_EXTRA_SIZE);
1607 if (i == 0)
1608 extra[0] &= 0xEF;
1609
1610 ms_write_extra_data(chip, old_blk, i, extra, MS_EXTRA_SIZE);
1611 RTSX_DEBUGP("page %d : extra[0] = 0x%x\n", i, extra[0]);
1612 MS_SET_BAD_BLOCK_FLG(ms_card);
1613
1614 ms_set_page_status(log_blk, setPS_Error, extra, MS_EXTRA_SIZE);
1615 ms_write_extra_data(chip, new_blk, i, extra, MS_EXTRA_SIZE);
1616 continue;
1617 }
1618
1619 for (rty_cnt = 0; rty_cnt < MS_MAX_RETRY_COUNT; rty_cnt++) {
1620 retval = ms_transfer_tpc(chip, MS_TM_NORMAL_WRITE,
1621 WRITE_PAGE_DATA, 0, NO_WAIT_INT);
1622 if (retval == STATUS_SUCCESS)
1623 break;
1624 }
1625 if (rty_cnt == MS_MAX_RETRY_COUNT)
1626 TRACE_RET(chip, STATUS_FAIL);
1627 }
1628
1629 if (!(val & INT_REG_BREQ)) {
1630 ms_set_err_code(chip, MS_BREQ_ERROR);
1631 TRACE_RET(chip, STATUS_FAIL);
1632 }
1633 }
1634
1635 retval = ms_set_rw_reg_addr(chip, OverwriteFlag,
1636 MS_EXTRA_SIZE, SystemParm, (6+MS_EXTRA_SIZE));
1637
1638 ms_set_err_code(chip, MS_NO_ERROR);
1639
1640 if (CHK_MS4BIT(ms_card))
1641 data[0] = 0x88;
1642 else
1643 data[0] = 0x80;
1644
1645 data[1] = 0;
1646 data[2] = (u8)(new_blk >> 8);
1647 data[3] = (u8)new_blk;
1648 data[4] = 0x20;
1649 data[5] = i;
1650
1651 if ((extra[0] & 0x60) != 0x60)
1652 data[6] = extra[0];
1653 else
1654 data[6] = 0xF8;
1655
1656 data[6 + 1] = 0xFF;
1657 data[6 + 2] = (u8)(log_blk >> 8);
1658 data[6 + 3] = (u8)log_blk;
1659
1660 for (j = 4; j <= MS_EXTRA_SIZE; j++)
1661 data[6 + j] = 0xFF;
1662
1663 retval = ms_write_bytes(chip, WRITE_REG, (6 + MS_EXTRA_SIZE), NO_WAIT_INT, data, 16);
1664 if (retval != STATUS_SUCCESS)
1665 TRACE_RET(chip, STATUS_FAIL);
1666
1667 retval = ms_send_cmd(chip, BLOCK_WRITE, WAIT_INT);
1668 if (retval != STATUS_SUCCESS)
1669 TRACE_RET(chip, STATUS_FAIL);
1670
1671 ms_set_err_code(chip, MS_NO_ERROR);
1672 retval = ms_read_bytes(chip, GET_INT, 1, NO_WAIT_INT, &val, 1);
1673 if (retval != STATUS_SUCCESS)
1674 TRACE_RET(chip, STATUS_FAIL);
1675
1676 if (val & INT_REG_CMDNK) {
1677 ms_set_err_code(chip, MS_CMD_NK);
1678 TRACE_RET(chip, STATUS_FAIL);
1679 }
1680
1681 if (val & INT_REG_CED) {
1682 if (val & INT_REG_ERR) {
1683 ms_set_err_code(chip, MS_FLASH_WRITE_ERROR);
1684 TRACE_RET(chip, STATUS_FAIL);
1685 }
1686 }
1687
1688 if (i == 0) {
1689 retval = ms_set_rw_reg_addr(chip, OverwriteFlag, MS_EXTRA_SIZE, SystemParm, 7);
1690 if (retval != STATUS_SUCCESS)
1691 TRACE_RET(chip, STATUS_FAIL);
1692
1693 ms_set_err_code(chip, MS_NO_ERROR);
1694
1695 if (CHK_MS4BIT(ms_card))
1696 data[0] = 0x88;
1697 else
1698 data[0] = 0x80;
1699
1700 data[1] = 0;
1701 data[2] = (u8)(old_blk >> 8);
1702 data[3] = (u8)old_blk;
1703 data[4] = 0x80;
1704 data[5] = 0;
1705 data[6] = 0xEF;
1706 data[7] = 0xFF;
1707
1708 retval = ms_write_bytes(chip, WRITE_REG, 7, NO_WAIT_INT, data, 8);
1709 if (retval != STATUS_SUCCESS)
1710 TRACE_RET(chip, STATUS_FAIL);
1711
1712 retval = ms_send_cmd(chip, BLOCK_WRITE, WAIT_INT);
1713 if (retval != STATUS_SUCCESS)
1714 TRACE_RET(chip, STATUS_FAIL);
1715
1716 ms_set_err_code(chip, MS_NO_ERROR);
1717 retval = ms_read_bytes(chip, GET_INT, 1, NO_WAIT_INT, &val, 1);
1718 if (retval != STATUS_SUCCESS)
1719 TRACE_RET(chip, STATUS_FAIL);
1720
1721 if (val & INT_REG_CMDNK) {
1722 ms_set_err_code(chip, MS_CMD_NK);
1723 TRACE_RET(chip, STATUS_FAIL);
1724 }
1725
1726 if (val & INT_REG_CED) {
1727 if (val & INT_REG_ERR) {
1728 ms_set_err_code(chip, MS_FLASH_WRITE_ERROR);
1729 TRACE_RET(chip, STATUS_FAIL);
1730 }
1731 }
1732 }
1733 }
1734
1735 return STATUS_SUCCESS;
1736}
1737
1738
1739static int reset_ms(struct rtsx_chip *chip)
1740{
1741 struct ms_info *ms_card = &(chip->ms_card);
1742 int retval;
1743 u16 i, reg_addr, block_size;
1744 u8 val, extra[MS_EXTRA_SIZE], j, *ptr;
1745#ifndef SUPPORT_MAGIC_GATE
1746 u16 eblock_cnt;
1747#endif
1748
1749 retval = ms_prepare_reset(chip);
1750 if (retval != STATUS_SUCCESS)
1751 TRACE_RET(chip, STATUS_FAIL);
1752
1753 ms_card->ms_type |= TYPE_MS;
1754
1755 retval = ms_send_cmd(chip, MS_RESET, NO_WAIT_INT);
1756 if (retval != STATUS_SUCCESS)
1757 TRACE_RET(chip, STATUS_FAIL);
1758
1759 retval = ms_read_status_reg(chip);
1760 if (retval != STATUS_SUCCESS)
1761 TRACE_RET(chip, STATUS_FAIL);
1762
1763 RTSX_READ_REG(chip, PPBUF_BASE2, &val);
1764 if (val & WRT_PRTCT)
1765 chip->card_wp |= MS_CARD;
1766 else
1767 chip->card_wp &= ~MS_CARD;
1768
1769 i = 0;
1770
1771RE_SEARCH:
1772 /* Search Boot Block */
1773 while (i < (MAX_DEFECTIVE_BLOCK + 2)) {
1774 if (detect_card_cd(chip, MS_CARD) != STATUS_SUCCESS) {
1775 ms_set_err_code(chip, MS_NO_CARD);
1776 TRACE_RET(chip, STATUS_FAIL);
1777 }
1778
1779 retval = ms_read_extra_data(chip, i, 0, extra, MS_EXTRA_SIZE);
1780 if (retval != STATUS_SUCCESS) {
1781 i++;
1782 continue;
1783 }
1784
1785 if (extra[0] & BLOCK_OK) {
1786 if (!(extra[1] & NOT_BOOT_BLOCK)) {
1787 ms_card->boot_block = i;
1788 break;
1789 }
1790 }
1791 i++;
1792 }
1793
1794 if (i == (MAX_DEFECTIVE_BLOCK + 2)) {
1795 RTSX_DEBUGP("No boot block found!");
1796 TRACE_RET(chip, STATUS_FAIL);
1797 }
1798
1799 for (j = 0; j < 3; j++) {
1800 retval = ms_read_page(chip, ms_card->boot_block, j);
1801 if (retval != STATUS_SUCCESS) {
1802 if (ms_check_err_code(chip, MS_FLASH_WRITE_ERROR)) {
1803 i = ms_card->boot_block + 1;
1804 ms_set_err_code(chip, MS_NO_ERROR);
1805 goto RE_SEARCH;
1806 }
1807 }
1808 }
1809
1810 retval = ms_read_page(chip, ms_card->boot_block, 0);
1811 if (retval != STATUS_SUCCESS)
1812 TRACE_RET(chip, STATUS_FAIL);
1813
1814 /* Read MS system information as sys_info */
1815 rtsx_init_cmd(chip);
1816
1817 for (i = 0; i < 96; i++)
1818 rtsx_add_cmd(chip, READ_REG_CMD, PPBUF_BASE2 + 0x1A0 + i, 0, 0);
1819
1820 retval = rtsx_send_cmd(chip, MS_CARD, 100);
1821 if (retval < 0)
1822 TRACE_RET(chip, STATUS_FAIL);
1823
1824 ptr = rtsx_get_cmd_data(chip);
1825 memcpy(ms_card->raw_sys_info, ptr, 96);
1826
1827 /* Read useful block contents */
1828 rtsx_init_cmd(chip);
1829
1830 rtsx_add_cmd(chip, READ_REG_CMD, HEADER_ID0, 0, 0);
1831 rtsx_add_cmd(chip, READ_REG_CMD, HEADER_ID1, 0, 0);
1832
1833 for (reg_addr = DISABLED_BLOCK0; reg_addr <= DISABLED_BLOCK3; reg_addr++)
1834 rtsx_add_cmd(chip, READ_REG_CMD, reg_addr, 0, 0);
1835
1836 for (reg_addr = BLOCK_SIZE_0; reg_addr <= PAGE_SIZE_1; reg_addr++)
1837 rtsx_add_cmd(chip, READ_REG_CMD, reg_addr, 0, 0);
1838
1839 rtsx_add_cmd(chip, READ_REG_CMD, MS_Device_Type, 0, 0);
1840 rtsx_add_cmd(chip, READ_REG_CMD, MS_4bit_Support, 0, 0);
1841
1842 retval = rtsx_send_cmd(chip, MS_CARD, 100);
1843 if (retval < 0)
1844 TRACE_RET(chip, STATUS_FAIL);
1845
1846 ptr = rtsx_get_cmd_data(chip);
1847
1848 RTSX_DEBUGP("Boot block data:\n");
1849 RTSX_DUMP(ptr, 16);
1850
1851 /* Block ID error
1852 * HEADER_ID0, HEADER_ID1
1853 */
1854 if (ptr[0] != 0x00 || ptr[1] != 0x01) {
1855 i = ms_card->boot_block + 1;
1856 goto RE_SEARCH;
1857 }
1858
1859 /* Page size error
1860 * PAGE_SIZE_0, PAGE_SIZE_1
1861 */
1862 if (ptr[12] != 0x02 || ptr[13] != 0x00) {
1863 i = ms_card->boot_block + 1;
1864 goto RE_SEARCH;
1865 }
1866
1867 if ((ptr[14] == 1) || (ptr[14] == 3))
1868 chip->card_wp |= MS_CARD;
1869
1870 /* BLOCK_SIZE_0, BLOCK_SIZE_1 */
1871 block_size = ((u16)ptr[6] << 8) | ptr[7];
1872 if (block_size == 0x0010) {
1873 /* Block size 16KB */
1874 ms_card->block_shift = 5;
1875 ms_card->page_off = 0x1F;
1876 } else if (block_size == 0x0008) {
1877 /* Block size 8KB */
1878 ms_card->block_shift = 4;
1879 ms_card->page_off = 0x0F;
1880 }
1881
1882 /* BLOCK_COUNT_0, BLOCK_COUNT_1 */
1883 ms_card->total_block = ((u16)ptr[8] << 8) | ptr[9];
1884
1885#ifdef SUPPORT_MAGIC_GATE
1886 j = ptr[10];
1887
1888 if (ms_card->block_shift == 4) { /* 4MB or 8MB */
1889 if (j < 2) { /* Effective block for 4MB: 0x1F0 */
1890 ms_card->capacity = 0x1EE0;
1891 } else { /* Effective block for 8MB: 0x3E0 */
1892 ms_card->capacity = 0x3DE0;
1893 }
1894 } else { /* 16MB, 32MB, 64MB or 128MB */
1895 if (j < 5) { /* Effective block for 16MB: 0x3E0 */
1896 ms_card->capacity = 0x7BC0;
1897 } else if (j < 0xA) { /* Effective block for 32MB: 0x7C0 */
1898 ms_card->capacity = 0xF7C0;
1899 } else if (j < 0x11) { /* Effective block for 64MB: 0xF80 */
1900 ms_card->capacity = 0x1EF80;
1901 } else { /* Effective block for 128MB: 0x1F00 */
1902 ms_card->capacity = 0x3DF00;
1903 }
1904 }
1905#else
1906 /* EBLOCK_COUNT_0, EBLOCK_COUNT_1 */
1907 eblock_cnt = ((u16)ptr[10] << 8) | ptr[11];
1908
1909 ms_card->capacity = ((u32)eblock_cnt - 2) << ms_card->block_shift;
1910#endif
1911
1912 chip->capacity[chip->card2lun[MS_CARD]] = ms_card->capacity;
1913
1914 /* Switch I/F Mode */
1915 if (ptr[15]) {
1916 retval = ms_set_rw_reg_addr(chip, 0, 0, SystemParm, 1);
1917 if (retval != STATUS_SUCCESS)
1918 TRACE_RET(chip, STATUS_FAIL);
1919
1920 RTSX_WRITE_REG(chip, PPBUF_BASE2, 0xFF, 0x88);
1921 RTSX_WRITE_REG(chip, PPBUF_BASE2 + 1, 0xFF, 0);
1922
1923 retval = ms_transfer_tpc(chip, MS_TM_WRITE_BYTES, WRITE_REG , 1, NO_WAIT_INT);
1924 if (retval != STATUS_SUCCESS)
1925 TRACE_RET(chip, STATUS_FAIL);
1926
1927 RTSX_WRITE_REG(chip, MS_CFG, 0x58 | MS_NO_CHECK_INT,
1928 MS_BUS_WIDTH_4 | PUSH_TIME_ODD | MS_NO_CHECK_INT);
1929
1930 ms_card->ms_type |= MS_4BIT;
1931 }
1932
1933 if (CHK_MS4BIT(ms_card))
1934 chip->card_bus_width[chip->card2lun[MS_CARD]] = 4;
1935 else
1936 chip->card_bus_width[chip->card2lun[MS_CARD]] = 1;
1937
1938 return STATUS_SUCCESS;
1939}
1940
1941static int ms_init_l2p_tbl(struct rtsx_chip *chip)
1942{
1943 struct ms_info *ms_card = &(chip->ms_card);
1944 int size, i, seg_no, retval;
1945 u16 defect_block, reg_addr;
1946 u8 val1, val2;
1947
1948 ms_card->segment_cnt = ms_card->total_block >> 9;
1949 RTSX_DEBUGP("ms_card->segment_cnt = %d\n", ms_card->segment_cnt);
1950
1951 size = ms_card->segment_cnt * sizeof(struct zone_entry);
1952 ms_card->segment = vzalloc(size);
1953 if (ms_card->segment == NULL)
1954 TRACE_RET(chip, STATUS_FAIL);
1955
1956 retval = ms_read_page(chip, ms_card->boot_block, 1);
1957 if (retval != STATUS_SUCCESS)
1958 TRACE_GOTO(chip, INIT_FAIL);
1959
1960 reg_addr = PPBUF_BASE2;
1961 for (i = 0; i < (((ms_card->total_block >> 9) * 10) + 1); i++) {
1962 retval = rtsx_read_register(chip, reg_addr++, &val1);
1963 if (retval != STATUS_SUCCESS)
1964 TRACE_GOTO(chip, INIT_FAIL);
1965
1966 retval = rtsx_read_register(chip, reg_addr++, &val2);
1967 if (retval != STATUS_SUCCESS)
1968 TRACE_GOTO(chip, INIT_FAIL);
1969
1970 defect_block = ((u16)val1 << 8) | val2;
1971 if (defect_block == 0xFFFF)
1972 break;
1973
1974 seg_no = defect_block / 512;
1975 ms_card->segment[seg_no].defect_list[ms_card->segment[seg_no].disable_count++] = defect_block;
1976 }
1977
1978 for (i = 0; i < ms_card->segment_cnt; i++) {
1979 ms_card->segment[i].build_flag = 0;
1980 ms_card->segment[i].l2p_table = NULL;
1981 ms_card->segment[i].free_table = NULL;
1982 ms_card->segment[i].get_index = 0;
1983 ms_card->segment[i].set_index = 0;
1984 ms_card->segment[i].unused_blk_cnt = 0;
1985
1986 RTSX_DEBUGP("defective block count of segment %d is %d\n",
1987 i, ms_card->segment[i].disable_count);
1988 }
1989
1990 return STATUS_SUCCESS;
1991
1992INIT_FAIL:
1993 if (ms_card->segment) {
1994 vfree(ms_card->segment);
1995 ms_card->segment = NULL;
1996 }
1997
1998 return STATUS_FAIL;
1999}
2000
2001static u16 ms_get_l2p_tbl(struct rtsx_chip *chip, int seg_no, u16 log_off)
2002{
2003 struct ms_info *ms_card = &(chip->ms_card);
2004 struct zone_entry *segment;
2005
2006 if (ms_card->segment == NULL)
2007 return 0xFFFF;
2008
2009 segment = &(ms_card->segment[seg_no]);
2010
2011 if (segment->l2p_table)
2012 return segment->l2p_table[log_off];
2013
2014 return 0xFFFF;
2015}
2016
2017static void ms_set_l2p_tbl(struct rtsx_chip *chip, int seg_no, u16 log_off, u16 phy_blk)
2018{
2019 struct ms_info *ms_card = &(chip->ms_card);
2020 struct zone_entry *segment;
2021
2022 if (ms_card->segment == NULL)
2023 return;
2024
2025 segment = &(ms_card->segment[seg_no]);
2026 if (segment->l2p_table)
2027 segment->l2p_table[log_off] = phy_blk;
2028}
2029
2030static void ms_set_unused_block(struct rtsx_chip *chip, u16 phy_blk)
2031{
2032 struct ms_info *ms_card = &(chip->ms_card);
2033 struct zone_entry *segment;
2034 int seg_no;
2035
2036 seg_no = (int)phy_blk >> 9;
2037 segment = &(ms_card->segment[seg_no]);
2038
2039 segment->free_table[segment->set_index++] = phy_blk;
2040 if (segment->set_index >= MS_FREE_TABLE_CNT)
2041 segment->set_index = 0;
2042
2043 segment->unused_blk_cnt++;
2044}
2045
2046static u16 ms_get_unused_block(struct rtsx_chip *chip, int seg_no)
2047{
2048 struct ms_info *ms_card = &(chip->ms_card);
2049 struct zone_entry *segment;
2050 u16 phy_blk;
2051
2052 segment = &(ms_card->segment[seg_no]);
2053
2054 if (segment->unused_blk_cnt <= 0)
2055 return 0xFFFF;
2056
2057 phy_blk = segment->free_table[segment->get_index];
2058 segment->free_table[segment->get_index++] = 0xFFFF;
2059 if (segment->get_index >= MS_FREE_TABLE_CNT)
2060 segment->get_index = 0;
2061
2062 segment->unused_blk_cnt--;
2063
2064 return phy_blk;
2065}
2066
2067static const unsigned short ms_start_idx[] = {0, 494, 990, 1486, 1982, 2478, 2974, 3470,
2068 3966, 4462, 4958, 5454, 5950, 6446, 6942, 7438, 7934};
2069
2070static int ms_arbitrate_l2p(struct rtsx_chip *chip, u16 phy_blk, u16 log_off, u8 us1, u8 us2)
2071{
2072 struct ms_info *ms_card = &(chip->ms_card);
2073 struct zone_entry *segment;
2074 int seg_no;
2075 u16 tmp_blk;
2076
2077 seg_no = (int)phy_blk >> 9;
2078 segment = &(ms_card->segment[seg_no]);
2079 tmp_blk = segment->l2p_table[log_off];
2080
2081 if (us1 != us2) {
2082 if (us1 == 0) {
2083 if (!(chip->card_wp & MS_CARD))
2084 ms_erase_block(chip, tmp_blk);
2085
2086 ms_set_unused_block(chip, tmp_blk);
2087 segment->l2p_table[log_off] = phy_blk;
2088 } else {
2089 if (!(chip->card_wp & MS_CARD))
2090 ms_erase_block(chip, phy_blk);
2091
2092 ms_set_unused_block(chip, phy_blk);
2093 }
2094 } else {
2095 if (phy_blk < tmp_blk) {
2096 if (!(chip->card_wp & MS_CARD))
2097 ms_erase_block(chip, phy_blk);
2098
2099 ms_set_unused_block(chip, phy_blk);
2100 } else {
2101 if (!(chip->card_wp & MS_CARD))
2102 ms_erase_block(chip, tmp_blk);
2103
2104 ms_set_unused_block(chip, tmp_blk);
2105 segment->l2p_table[log_off] = phy_blk;
2106 }
2107 }
2108
2109 return STATUS_SUCCESS;
2110}
2111
2112static int ms_build_l2p_tbl(struct rtsx_chip *chip, int seg_no)
2113{
2114 struct ms_info *ms_card = &(chip->ms_card);
2115 struct zone_entry *segment;
2116 int retval, table_size, disable_cnt, defect_flag, i;
2117 u16 start, end, phy_blk, log_blk, tmp_blk;
2118 u8 extra[MS_EXTRA_SIZE], us1, us2;
2119
2120 RTSX_DEBUGP("ms_build_l2p_tbl: %d\n", seg_no);
2121
2122 if (ms_card->segment == NULL) {
2123 retval = ms_init_l2p_tbl(chip);
2124 if (retval != STATUS_SUCCESS)
2125 TRACE_RET(chip, retval);
2126 }
2127
2128 if (ms_card->segment[seg_no].build_flag) {
2129 RTSX_DEBUGP("l2p table of segment %d has been built\n", seg_no);
2130 return STATUS_SUCCESS;
2131 }
2132
2133 if (seg_no == 0)
2134 table_size = 494;
2135 else
2136 table_size = 496;
2137
2138 segment = &(ms_card->segment[seg_no]);
2139
2140 if (segment->l2p_table == NULL) {
2141 segment->l2p_table = (u16 *)vmalloc(table_size * 2);
2142 if (segment->l2p_table == NULL)
2143 TRACE_GOTO(chip, BUILD_FAIL);
2144 }
2145 memset((u8 *)(segment->l2p_table), 0xff, table_size * 2);
2146
2147 if (segment->free_table == NULL) {
2148 segment->free_table = (u16 *)vmalloc(MS_FREE_TABLE_CNT * 2);
2149 if (segment->free_table == NULL)
2150 TRACE_GOTO(chip, BUILD_FAIL);
2151 }
2152 memset((u8 *)(segment->free_table), 0xff, MS_FREE_TABLE_CNT * 2);
2153
2154 start = (u16)seg_no << 9;
2155 end = (u16)(seg_no + 1) << 9;
2156
2157 disable_cnt = segment->disable_count;
2158
2159 segment->get_index = segment->set_index = 0;
2160 segment->unused_blk_cnt = 0;
2161
2162 for (phy_blk = start; phy_blk < end; phy_blk++) {
2163 if (disable_cnt) {
2164 defect_flag = 0;
2165 for (i = 0; i < segment->disable_count; i++) {
2166 if (phy_blk == segment->defect_list[i]) {
2167 defect_flag = 1;
2168 break;
2169 }
2170 }
2171 if (defect_flag) {
2172 disable_cnt--;
2173 continue;
2174 }
2175 }
2176
2177 retval = ms_read_extra_data(chip, phy_blk, 0, extra, MS_EXTRA_SIZE);
2178 if (retval != STATUS_SUCCESS) {
2179 RTSX_DEBUGP("read extra data fail\n");
2180 ms_set_bad_block(chip, phy_blk);
2181 continue;
2182 }
2183
2184 if (seg_no == ms_card->segment_cnt - 1) {
2185 if (!(extra[1] & NOT_TRANSLATION_TABLE)) {
2186 if (!(chip->card_wp & MS_CARD)) {
2187 retval = ms_erase_block(chip, phy_blk);
2188 if (retval != STATUS_SUCCESS)
2189 continue;
2190 extra[2] = 0xff;
2191 extra[3] = 0xff;
2192 }
2193 }
2194 }
2195
2196 if (!(extra[0] & BLOCK_OK))
2197 continue;
2198 if (!(extra[1] & NOT_BOOT_BLOCK))
2199 continue;
2200 if ((extra[0] & PAGE_OK) != PAGE_OK)
2201 continue;
2202
2203 log_blk = ((u16)extra[2] << 8) | extra[3];
2204
2205 if (log_blk == 0xFFFF) {
2206 if (!(chip->card_wp & MS_CARD)) {
2207 retval = ms_erase_block(chip, phy_blk);
2208 if (retval != STATUS_SUCCESS)
2209 continue;
2210 }
2211 ms_set_unused_block(chip, phy_blk);
2212 continue;
2213 }
2214
2215 if ((log_blk < ms_start_idx[seg_no]) ||
2216 (log_blk >= ms_start_idx[seg_no+1])) {
2217 if (!(chip->card_wp & MS_CARD)) {
2218 retval = ms_erase_block(chip, phy_blk);
2219 if (retval != STATUS_SUCCESS)
2220 continue;
2221 }
2222 ms_set_unused_block(chip, phy_blk);
2223 continue;
2224 }
2225
2226 if (segment->l2p_table[log_blk - ms_start_idx[seg_no]] == 0xFFFF) {
2227 segment->l2p_table[log_blk - ms_start_idx[seg_no]] = phy_blk;
2228 continue;
2229 }
2230
2231 us1 = extra[0] & 0x10;
2232 tmp_blk = segment->l2p_table[log_blk - ms_start_idx[seg_no]];
2233 retval = ms_read_extra_data(chip, tmp_blk, 0, extra, MS_EXTRA_SIZE);
2234 if (retval != STATUS_SUCCESS)
2235 continue;
2236 us2 = extra[0] & 0x10;
2237
2238 (void)ms_arbitrate_l2p(chip, phy_blk, log_blk-ms_start_idx[seg_no], us1, us2);
2239 continue;
2240 }
2241
2242 segment->build_flag = 1;
2243
2244 RTSX_DEBUGP("unused block count: %d\n", segment->unused_blk_cnt);
2245
2246 /* Logical Address Confirmation Process */
2247 if (seg_no == ms_card->segment_cnt - 1) {
2248 if (segment->unused_blk_cnt < 2)
2249 chip->card_wp |= MS_CARD;
2250 } else {
2251 if (segment->unused_blk_cnt < 1)
2252 chip->card_wp |= MS_CARD;
2253 }
2254
2255 if (chip->card_wp & MS_CARD)
2256 return STATUS_SUCCESS;
2257
2258 for (log_blk = ms_start_idx[seg_no]; log_blk < ms_start_idx[seg_no + 1]; log_blk++) {
2259 if (segment->l2p_table[log_blk-ms_start_idx[seg_no]] == 0xFFFF) {
2260 phy_blk = ms_get_unused_block(chip, seg_no);
2261 if (phy_blk == 0xFFFF) {
2262 chip->card_wp |= MS_CARD;
2263 return STATUS_SUCCESS;
2264 }
2265 retval = ms_init_page(chip, phy_blk, log_blk, 0, 1);
2266 if (retval != STATUS_SUCCESS)
2267 TRACE_GOTO(chip, BUILD_FAIL);
2268
2269 segment->l2p_table[log_blk-ms_start_idx[seg_no]] = phy_blk;
2270 if (seg_no == ms_card->segment_cnt - 1) {
2271 if (segment->unused_blk_cnt < 2) {
2272 chip->card_wp |= MS_CARD;
2273 return STATUS_SUCCESS;
2274 }
2275 } else {
2276 if (segment->unused_blk_cnt < 1) {
2277 chip->card_wp |= MS_CARD;
2278 return STATUS_SUCCESS;
2279 }
2280 }
2281 }
2282 }
2283
2284 /* Make boot block be the first normal block */
2285 if (seg_no == 0) {
2286 for (log_blk = 0; log_blk < 494; log_blk++) {
2287 tmp_blk = segment->l2p_table[log_blk];
2288 if (tmp_blk < ms_card->boot_block) {
2289 RTSX_DEBUGP("Boot block is not the first normal block.\n");
2290
2291 if (chip->card_wp & MS_CARD)
2292 break;
2293
2294 phy_blk = ms_get_unused_block(chip, 0);
2295 retval = ms_copy_page(chip, tmp_blk, phy_blk,
2296 log_blk, 0, ms_card->page_off + 1);
2297 if (retval != STATUS_SUCCESS)
2298 TRACE_RET(chip, STATUS_FAIL);
2299
2300 segment->l2p_table[log_blk] = phy_blk;
2301
2302 retval = ms_set_bad_block(chip, tmp_blk);
2303 if (retval != STATUS_SUCCESS)
2304 TRACE_RET(chip, STATUS_FAIL);
2305 }
2306 }
2307 }
2308
2309 return STATUS_SUCCESS;
2310
2311BUILD_FAIL:
2312 segment->build_flag = 0;
2313 if (segment->l2p_table) {
2314 vfree(segment->l2p_table);
2315 segment->l2p_table = NULL;
2316 }
2317 if (segment->free_table) {
2318 vfree(segment->free_table);
2319 segment->free_table = NULL;
2320 }
2321
2322 return STATUS_FAIL;
2323}
2324
2325
2326int reset_ms_card(struct rtsx_chip *chip)
2327{
2328 struct ms_info *ms_card = &(chip->ms_card);
2329 int retval;
2330
2331 memset(ms_card, 0, sizeof(struct ms_info));
2332
2333 retval = enable_card_clock(chip, MS_CARD);
2334 if (retval != STATUS_SUCCESS)
2335 TRACE_RET(chip, STATUS_FAIL);
2336
2337 retval = select_card(chip, MS_CARD);
2338 if (retval != STATUS_SUCCESS)
2339 TRACE_RET(chip, STATUS_FAIL);
2340
2341 ms_card->ms_type = 0;
2342
2343 retval = reset_ms_pro(chip);
2344 if (retval != STATUS_SUCCESS) {
2345 if (ms_card->check_ms_flow) {
2346 retval = reset_ms(chip);
2347 if (retval != STATUS_SUCCESS)
2348 TRACE_RET(chip, STATUS_FAIL);
2349 } else {
2350 TRACE_RET(chip, STATUS_FAIL);
2351 }
2352 }
2353
2354 retval = ms_set_init_para(chip);
2355 if (retval != STATUS_SUCCESS)
2356 TRACE_RET(chip, STATUS_FAIL);
2357
2358 if (!CHK_MSPRO(ms_card)) {
2359 /* Build table for the last segment,
2360 * to check if L2P table block exists, erasing it
2361 */
2362 retval = ms_build_l2p_tbl(chip, ms_card->total_block / 512 - 1);
2363 if (retval != STATUS_SUCCESS)
2364 TRACE_RET(chip, STATUS_FAIL);
2365 }
2366
2367 RTSX_DEBUGP("ms_card->ms_type = 0x%x\n", ms_card->ms_type);
2368
2369 return STATUS_SUCCESS;
2370}
2371
2372static int mspro_set_rw_cmd(struct rtsx_chip *chip, u32 start_sec, u16 sec_cnt, u8 cmd)
2373{
2374 int retval, i;
2375 u8 data[8];
2376
2377 data[0] = cmd;
2378 data[1] = (u8)(sec_cnt >> 8);
2379 data[2] = (u8)sec_cnt;
2380 data[3] = (u8)(start_sec >> 24);
2381 data[4] = (u8)(start_sec >> 16);
2382 data[5] = (u8)(start_sec >> 8);
2383 data[6] = (u8)start_sec;
2384 data[7] = 0;
2385
2386 for (i = 0; i < MS_MAX_RETRY_COUNT; i++) {
2387 retval = ms_write_bytes(chip, PRO_EX_SET_CMD, 7, WAIT_INT, data, 8);
2388 if (retval == STATUS_SUCCESS)
2389 break;
2390 }
2391 if (i == MS_MAX_RETRY_COUNT)
2392 TRACE_RET(chip, STATUS_FAIL);
2393
2394 return STATUS_SUCCESS;
2395}
2396
2397
2398void mspro_stop_seq_mode(struct rtsx_chip *chip)
2399{
2400 struct ms_info *ms_card = &(chip->ms_card);
2401 int retval;
2402
2403 RTSX_DEBUGP("--%s--\n", __func__);
2404
2405 if (ms_card->seq_mode) {
2406 retval = ms_switch_clock(chip);
2407 if (retval != STATUS_SUCCESS)
2408 return;
2409
2410 ms_card->seq_mode = 0;
2411 ms_card->total_sec_cnt = 0;
2412 ms_send_cmd(chip, PRO_STOP, WAIT_INT);
2413
2414 rtsx_write_register(chip, RBCTL, RB_FLUSH, RB_FLUSH);
2415 }
2416}
2417
2418static inline int ms_auto_tune_clock(struct rtsx_chip *chip)
2419{
2420 struct ms_info *ms_card = &(chip->ms_card);
2421 int retval;
2422
2423 RTSX_DEBUGP("--%s--\n", __func__);
2424
2425 if (chip->asic_code) {
2426 if (ms_card->ms_clock > 30)
2427 ms_card->ms_clock -= 20;
2428 } else {
2429 if (ms_card->ms_clock == CLK_80)
2430 ms_card->ms_clock = CLK_60;
2431 else if (ms_card->ms_clock == CLK_60)
2432 ms_card->ms_clock = CLK_40;
2433 }
2434
2435 retval = ms_switch_clock(chip);
2436 if (retval != STATUS_SUCCESS)
2437 TRACE_RET(chip, STATUS_FAIL);
2438
2439 return STATUS_SUCCESS;
2440}
2441
2442static int mspro_rw_multi_sector(struct scsi_cmnd *srb, struct rtsx_chip *chip, u32 start_sector, u16 sector_cnt)
2443{
2444 struct ms_info *ms_card = &(chip->ms_card);
2445 int retval, mode_2k = 0;
2446 u16 count;
2447 u8 val, trans_mode, rw_tpc, rw_cmd;
2448
2449 ms_set_err_code(chip, MS_NO_ERROR);
2450
2451 ms_card->cleanup_counter = 0;
2452
2453 if (CHK_MSHG(ms_card)) {
2454 if ((start_sector % 4) || (sector_cnt % 4)) {
2455 if (srb->sc_data_direction == DMA_FROM_DEVICE) {
2456 rw_tpc = PRO_READ_LONG_DATA;
2457 rw_cmd = PRO_READ_DATA;
2458 } else {
2459 rw_tpc = PRO_WRITE_LONG_DATA;
2460 rw_cmd = PRO_WRITE_DATA;
2461 }
2462 } else {
2463 if (srb->sc_data_direction == DMA_FROM_DEVICE) {
2464 rw_tpc = PRO_READ_QUAD_DATA;
2465 rw_cmd = PRO_READ_2K_DATA;
2466 } else {
2467 rw_tpc = PRO_WRITE_QUAD_DATA;
2468 rw_cmd = PRO_WRITE_2K_DATA;
2469 }
2470 mode_2k = 1;
2471 }
2472 } else {
2473 if (srb->sc_data_direction == DMA_FROM_DEVICE) {
2474 rw_tpc = PRO_READ_LONG_DATA;
2475 rw_cmd = PRO_READ_DATA;
2476 } else {
2477 rw_tpc = PRO_WRITE_LONG_DATA;
2478 rw_cmd = PRO_WRITE_DATA;
2479 }
2480 }
2481
2482 retval = ms_switch_clock(chip);
2483 if (retval != STATUS_SUCCESS)
2484 TRACE_RET(chip, STATUS_FAIL);
2485
2486 if (srb->sc_data_direction == DMA_FROM_DEVICE)
2487 trans_mode = MS_TM_AUTO_READ;
2488 else
2489 trans_mode = MS_TM_AUTO_WRITE;
2490
2491 RTSX_READ_REG(chip, MS_TRANS_CFG, &val);
2492
2493 if (ms_card->seq_mode) {
2494 if ((ms_card->pre_dir != srb->sc_data_direction)
2495 || ((ms_card->pre_sec_addr + ms_card->pre_sec_cnt) != start_sector)
2496 || (mode_2k && (ms_card->seq_mode & MODE_512_SEQ))
2497 || (!mode_2k && (ms_card->seq_mode & MODE_2K_SEQ))
2498 || !(val & MS_INT_BREQ)
2499 || ((ms_card->total_sec_cnt + sector_cnt) > 0xFE00)) {
2500 ms_card->seq_mode = 0;
2501 ms_card->total_sec_cnt = 0;
2502 if (val & MS_INT_BREQ) {
2503 retval = ms_send_cmd(chip, PRO_STOP, WAIT_INT);
2504 if (retval != STATUS_SUCCESS)
2505 TRACE_RET(chip, STATUS_FAIL);
2506
2507 rtsx_write_register(chip, RBCTL, RB_FLUSH, RB_FLUSH);
2508 }
2509 }
2510 }
2511
2512 if (!ms_card->seq_mode) {
2513 ms_card->total_sec_cnt = 0;
2514 if (sector_cnt >= SEQ_START_CRITERIA) {
2515 if ((ms_card->capacity - start_sector) > 0xFE00)
2516 count = 0xFE00;
2517 else
2518 count = (u16)(ms_card->capacity - start_sector);
2519
2520 if (count > sector_cnt) {
2521 if (mode_2k)
2522 ms_card->seq_mode |= MODE_2K_SEQ;
2523 else
2524 ms_card->seq_mode |= MODE_512_SEQ;
2525 }
2526 } else {
2527 count = sector_cnt;
2528 }
2529 retval = mspro_set_rw_cmd(chip, start_sector, count, rw_cmd);
2530 if (retval != STATUS_SUCCESS) {
2531 ms_card->seq_mode = 0;
2532 TRACE_RET(chip, STATUS_FAIL);
2533 }
2534 }
2535
2536 retval = ms_transfer_data(chip, trans_mode, rw_tpc, sector_cnt, WAIT_INT, mode_2k,
2537 scsi_sg_count(srb), scsi_sglist(srb), scsi_bufflen(srb));
2538 if (retval != STATUS_SUCCESS) {
2539 ms_card->seq_mode = 0;
2540 rtsx_read_register(chip, MS_TRANS_CFG, &val);
2541 rtsx_clear_ms_error(chip);
2542
2543 if (detect_card_cd(chip, MS_CARD) != STATUS_SUCCESS) {
2544 chip->rw_need_retry = 0;
2545 RTSX_DEBUGP("No card exist, exit mspro_rw_multi_sector\n");
2546 TRACE_RET(chip, STATUS_FAIL);
2547 }
2548
2549 if (val & MS_INT_BREQ)
2550 ms_send_cmd(chip, PRO_STOP, WAIT_INT);
2551
2552 if (val & (MS_CRC16_ERR | MS_RDY_TIMEOUT)) {
2553 RTSX_DEBUGP("MSPro CRC error, tune clock!\n");
2554 chip->rw_need_retry = 1;
2555 ms_auto_tune_clock(chip);
2556 }
2557
2558 TRACE_RET(chip, retval);
2559 }
2560
2561 if (ms_card->seq_mode) {
2562 ms_card->pre_sec_addr = start_sector;
2563 ms_card->pre_sec_cnt = sector_cnt;
2564 ms_card->pre_dir = srb->sc_data_direction;
2565 ms_card->total_sec_cnt += sector_cnt;
2566 }
2567
2568 return STATUS_SUCCESS;
2569}
2570
2571static int mspro_read_format_progress(struct rtsx_chip *chip, const int short_data_len)
2572{
2573 struct ms_info *ms_card = &(chip->ms_card);
2574 int retval, i;
2575 u32 total_progress, cur_progress;
2576 u8 cnt, tmp;
2577 u8 data[8];
2578
2579 RTSX_DEBUGP("mspro_read_format_progress, short_data_len = %d\n", short_data_len);
2580
2581 retval = ms_switch_clock(chip);
2582 if (retval != STATUS_SUCCESS) {
2583 ms_card->format_status = FORMAT_FAIL;
2584 TRACE_RET(chip, STATUS_FAIL);
2585 }
2586
2587 retval = rtsx_read_register(chip, MS_TRANS_CFG, &tmp);
2588 if (retval != STATUS_SUCCESS) {
2589 ms_card->format_status = FORMAT_FAIL;
2590 TRACE_RET(chip, STATUS_FAIL);
2591 }
2592
2593 if (!(tmp & MS_INT_BREQ)) {
2594 if ((tmp & (MS_INT_CED | MS_INT_BREQ | MS_INT_CMDNK | MS_INT_ERR)) == MS_INT_CED) {
2595 ms_card->format_status = FORMAT_SUCCESS;
2596 return STATUS_SUCCESS;
2597 }
2598 ms_card->format_status = FORMAT_FAIL;
2599 TRACE_RET(chip, STATUS_FAIL);
2600 }
2601
2602 if (short_data_len >= 256)
2603 cnt = 0;
2604 else
2605 cnt = (u8)short_data_len;
2606
2607 retval = rtsx_write_register(chip, MS_CFG, MS_NO_CHECK_INT, MS_NO_CHECK_INT);
2608 if (retval != STATUS_SUCCESS) {
2609 ms_card->format_status = FORMAT_FAIL;
2610 TRACE_RET(chip, STATUS_FAIL);
2611 }
2612
2613 retval = ms_read_bytes(chip, PRO_READ_SHORT_DATA, cnt, WAIT_INT, data, 8);
2614 if (retval != STATUS_SUCCESS) {
2615 ms_card->format_status = FORMAT_FAIL;
2616 TRACE_RET(chip, STATUS_FAIL);
2617 }
2618
2619 total_progress = (data[0] << 24) | (data[1] << 16) | (data[2] << 8) | data[3];
2620 cur_progress = (data[4] << 24) | (data[5] << 16) | (data[6] << 8) | data[7];
2621
2622 RTSX_DEBUGP("total_progress = %d, cur_progress = %d\n",
2623 total_progress, cur_progress);
2624
2625 if (total_progress == 0) {
2626 ms_card->progress = 0;
2627 } else {
2628 u64 ulltmp = (u64)cur_progress * (u64)65535;
2629 do_div(ulltmp, total_progress);
2630 ms_card->progress = (u16)ulltmp;
2631 }
2632 RTSX_DEBUGP("progress = %d\n", ms_card->progress);
2633
2634 for (i = 0; i < 5000; i++) {
2635 retval = rtsx_read_register(chip, MS_TRANS_CFG, &tmp);
2636 if (retval != STATUS_SUCCESS) {
2637 ms_card->format_status = FORMAT_FAIL;
2638 TRACE_RET(chip, STATUS_FAIL);
2639 }
2640 if (tmp & (MS_INT_CED | MS_INT_CMDNK | MS_INT_BREQ | MS_INT_ERR))
2641 break;
2642
2643 wait_timeout(1);
2644 }
2645
2646 retval = rtsx_write_register(chip, MS_CFG, MS_NO_CHECK_INT, 0);
2647 if (retval != STATUS_SUCCESS) {
2648 ms_card->format_status = FORMAT_FAIL;
2649 TRACE_RET(chip, STATUS_FAIL);
2650 }
2651
2652 if (i == 5000) {
2653 ms_card->format_status = FORMAT_FAIL;
2654 TRACE_RET(chip, STATUS_FAIL);
2655 }
2656
2657 if (tmp & (MS_INT_CMDNK | MS_INT_ERR)) {
2658 ms_card->format_status = FORMAT_FAIL;
2659 TRACE_RET(chip, STATUS_FAIL);
2660 }
2661
2662 if (tmp & MS_INT_CED) {
2663 ms_card->format_status = FORMAT_SUCCESS;
2664 ms_card->pro_under_formatting = 0;
2665 } else if (tmp & MS_INT_BREQ) {
2666 ms_card->format_status = FORMAT_IN_PROGRESS;
2667 } else {
2668 ms_card->format_status = FORMAT_FAIL;
2669 ms_card->pro_under_formatting = 0;
2670 TRACE_RET(chip, STATUS_FAIL);
2671 }
2672
2673 return STATUS_SUCCESS;
2674}
2675
2676void mspro_polling_format_status(struct rtsx_chip *chip)
2677{
2678 struct ms_info *ms_card = &(chip->ms_card);
2679 int i;
2680
2681 if (ms_card->pro_under_formatting && (rtsx_get_stat(chip) != RTSX_STAT_SS)) {
2682 rtsx_set_stat(chip, RTSX_STAT_RUN);
2683
2684 for (i = 0; i < 65535; i++) {
2685 mspro_read_format_progress(chip, MS_SHORT_DATA_LEN);
2686 if (ms_card->format_status != FORMAT_IN_PROGRESS)
2687 break;
2688 }
2689 }
2690
2691 return;
2692}
2693
2694int mspro_format(struct scsi_cmnd *srb, struct rtsx_chip *chip, int short_data_len, int quick_format)
2695{
2696 struct ms_info *ms_card = &(chip->ms_card);
2697 int retval, i;
2698 u8 buf[8], tmp;
2699 u16 para;
2700
2701 RTSX_DEBUGP("--%s--\n", __func__);
2702
2703 retval = ms_switch_clock(chip);
2704 if (retval != STATUS_SUCCESS)
2705 TRACE_RET(chip, STATUS_FAIL);
2706
2707 retval = ms_set_rw_reg_addr(chip, 0x00, 0x00, Pro_TPCParm, 0x01);
2708 if (retval != STATUS_SUCCESS)
2709 TRACE_RET(chip, STATUS_FAIL);
2710
2711 memset(buf, 0, 2);
2712 switch (short_data_len) {
2713 case 32:
2714 buf[0] = 0;
2715 break;
2716 case 64:
2717 buf[0] = 1;
2718 break;
2719 case 128:
2720 buf[0] = 2;
2721 break;
2722 case 256:
2723 default:
2724 buf[0] = 3;
2725 break;
2726 }
2727
2728 for (i = 0; i < MS_MAX_RETRY_COUNT; i++) {
2729 retval = ms_write_bytes(chip, PRO_WRITE_REG, 1, NO_WAIT_INT, buf, 2);
2730 if (retval == STATUS_SUCCESS)
2731 break;
2732 }
2733 if (i == MS_MAX_RETRY_COUNT)
2734 TRACE_RET(chip, STATUS_FAIL);
2735
2736 if (quick_format)
2737 para = 0x0000;
2738 else
2739 para = 0x0001;
2740
2741 retval = mspro_set_rw_cmd(chip, 0, para, PRO_FORMAT);
2742 if (retval != STATUS_SUCCESS)
2743 TRACE_RET(chip, STATUS_FAIL);
2744
2745 RTSX_READ_REG(chip, MS_TRANS_CFG, &tmp);
2746
2747 if (tmp & (MS_INT_CMDNK | MS_INT_ERR))
2748 TRACE_RET(chip, STATUS_FAIL);
2749
2750 if ((tmp & (MS_INT_BREQ | MS_INT_CED)) == MS_INT_BREQ) {
2751 ms_card->pro_under_formatting = 1;
2752 ms_card->progress = 0;
2753 ms_card->format_status = FORMAT_IN_PROGRESS;
2754 return STATUS_SUCCESS;
2755 }
2756
2757 if (tmp & MS_INT_CED) {
2758 ms_card->pro_under_formatting = 0;
2759 ms_card->progress = 0;
2760 ms_card->format_status = FORMAT_SUCCESS;
2761 set_sense_type(chip, SCSI_LUN(srb), SENSE_TYPE_NO_SENSE);
2762 return STATUS_SUCCESS;
2763 }
2764
2765 TRACE_RET(chip, STATUS_FAIL);
2766}
2767
2768
2769static int ms_read_multiple_pages(struct rtsx_chip *chip, u16 phy_blk, u16 log_blk,
2770 u8 start_page, u8 end_page, u8 *buf, unsigned int *index, unsigned int *offset)
2771{
2772 struct ms_info *ms_card = &(chip->ms_card);
2773 int retval, i;
2774 u8 extra[MS_EXTRA_SIZE], page_addr, val, trans_cfg, data[6];
2775 u8 *ptr;
2776
2777 retval = ms_read_extra_data(chip, phy_blk, start_page, extra, MS_EXTRA_SIZE);
2778 if (retval == STATUS_SUCCESS) {
2779 if ((extra[1] & 0x30) != 0x30) {
2780 ms_set_err_code(chip, MS_FLASH_READ_ERROR);
2781 TRACE_RET(chip, STATUS_FAIL);
2782 }
2783 }
2784
2785 retval = ms_set_rw_reg_addr(chip, OverwriteFlag, MS_EXTRA_SIZE, SystemParm, 6);
2786 if (retval != STATUS_SUCCESS)
2787 TRACE_RET(chip, STATUS_FAIL);
2788
2789 if (CHK_MS4BIT(ms_card))
2790 data[0] = 0x88;
2791 else
2792 data[0] = 0x80;
2793
2794 data[1] = 0;
2795 data[2] = (u8)(phy_blk >> 8);
2796 data[3] = (u8)phy_blk;
2797 data[4] = 0;
2798 data[5] = start_page;
2799
2800 for (i = 0; i < MS_MAX_RETRY_COUNT; i++) {
2801 retval = ms_write_bytes(chip, WRITE_REG, 6, NO_WAIT_INT, data, 6);
2802 if (retval == STATUS_SUCCESS)
2803 break;
2804 }
2805 if (i == MS_MAX_RETRY_COUNT)
2806 TRACE_RET(chip, STATUS_FAIL);
2807
2808 ms_set_err_code(chip, MS_NO_ERROR);
2809
2810 retval = ms_send_cmd(chip, BLOCK_READ, WAIT_INT);
2811 if (retval != STATUS_SUCCESS)
2812 TRACE_RET(chip, STATUS_FAIL);
2813
2814 ptr = buf;
2815
2816 for (page_addr = start_page; page_addr < end_page; page_addr++) {
2817 ms_set_err_code(chip, MS_NO_ERROR);
2818
2819 if (detect_card_cd(chip, MS_CARD) != STATUS_SUCCESS) {
2820 ms_set_err_code(chip, MS_NO_CARD);
2821 TRACE_RET(chip, STATUS_FAIL);
2822 }
2823
2824 retval = ms_read_bytes(chip, GET_INT, 1, NO_WAIT_INT, &val, 1);
2825 if (retval != STATUS_SUCCESS)
2826 TRACE_RET(chip, STATUS_FAIL);
2827
2828 if (val & INT_REG_CMDNK) {
2829 ms_set_err_code(chip, MS_CMD_NK);
2830 TRACE_RET(chip, STATUS_FAIL);
2831 }
2832 if (val & INT_REG_ERR) {
2833 if (val & INT_REG_BREQ) {
2834 retval = ms_read_status_reg(chip);
2835 if (retval != STATUS_SUCCESS) {
2836 if (!(chip->card_wp & MS_CARD)) {
2837 reset_ms(chip);
2838 ms_set_page_status(log_blk, setPS_NG, extra, MS_EXTRA_SIZE);
2839 ms_write_extra_data(chip, phy_blk,
2840 page_addr, extra, MS_EXTRA_SIZE);
2841 }
2842 ms_set_err_code(chip, MS_FLASH_READ_ERROR);
2843 TRACE_RET(chip, STATUS_FAIL);
2844 }
2845 } else {
2846 ms_set_err_code(chip, MS_FLASH_READ_ERROR);
2847 TRACE_RET(chip, STATUS_FAIL);
2848 }
2849 } else {
2850 if (!(val & INT_REG_BREQ)) {
2851 ms_set_err_code(chip, MS_BREQ_ERROR);
2852 TRACE_RET(chip, STATUS_FAIL);
2853 }
2854 }
2855
2856 if (page_addr == (end_page - 1)) {
2857 if (!(val & INT_REG_CED)) {
2858 retval = ms_send_cmd(chip, BLOCK_END, WAIT_INT);
2859 if (retval != STATUS_SUCCESS)
2860 TRACE_RET(chip, STATUS_FAIL);
2861 }
2862
2863 retval = ms_read_bytes(chip, GET_INT, 1, NO_WAIT_INT, &val, 1);
2864 if (retval != STATUS_SUCCESS)
2865 TRACE_RET(chip, STATUS_FAIL);
2866
2867 if (!(val & INT_REG_CED)) {
2868 ms_set_err_code(chip, MS_FLASH_READ_ERROR);
2869 TRACE_RET(chip, STATUS_FAIL);
2870 }
2871
2872 trans_cfg = NO_WAIT_INT;
2873 } else {
2874 trans_cfg = WAIT_INT;
2875 }
2876
2877 rtsx_init_cmd(chip);
2878
2879 rtsx_add_cmd(chip, WRITE_REG_CMD, MS_TPC, 0xFF, READ_PAGE_DATA);
2880 rtsx_add_cmd(chip, WRITE_REG_CMD, MS_TRANS_CFG, 0xFF, trans_cfg);
2881 rtsx_add_cmd(chip, WRITE_REG_CMD, CARD_DATA_SOURCE, 0x01, RING_BUFFER);
2882
2883 trans_dma_enable(DMA_FROM_DEVICE, chip, 512, DMA_512);
2884
2885 rtsx_add_cmd(chip, WRITE_REG_CMD, MS_TRANSFER, 0xFF,
2886 MS_TRANSFER_START | MS_TM_NORMAL_READ);
2887 rtsx_add_cmd(chip, CHECK_REG_CMD, MS_TRANSFER, MS_TRANSFER_END, MS_TRANSFER_END);
2888
2889 rtsx_send_cmd_no_wait(chip);
2890
2891 retval = rtsx_transfer_data_partial(chip, MS_CARD, ptr, 512, scsi_sg_count(chip->srb),
2892 index, offset, DMA_FROM_DEVICE, chip->ms_timeout);
2893 if (retval < 0) {
2894 if (retval == -ETIMEDOUT) {
2895 ms_set_err_code(chip, MS_TO_ERROR);
2896 rtsx_clear_ms_error(chip);
2897 TRACE_RET(chip, STATUS_TIMEDOUT);
2898 }
2899
2900 retval = rtsx_read_register(chip, MS_TRANS_CFG, &val);
2901 if (retval != STATUS_SUCCESS) {
2902 ms_set_err_code(chip, MS_TO_ERROR);
2903 rtsx_clear_ms_error(chip);
2904 TRACE_RET(chip, STATUS_TIMEDOUT);
2905 }
2906 if (val & (MS_CRC16_ERR | MS_RDY_TIMEOUT)) {
2907 ms_set_err_code(chip, MS_CRC16_ERROR);
2908 rtsx_clear_ms_error(chip);
2909 TRACE_RET(chip, STATUS_FAIL);
2910 }
2911 }
2912
2913 if (scsi_sg_count(chip->srb) == 0)
2914 ptr += 512;
2915 }
2916
2917 return STATUS_SUCCESS;
2918}
2919
2920static int ms_write_multiple_pages(struct rtsx_chip *chip, u16 old_blk, u16 new_blk,
2921 u16 log_blk, u8 start_page, u8 end_page, u8 *buf,
2922 unsigned int *index, unsigned int *offset)
2923{
2924 struct ms_info *ms_card = &(chip->ms_card);
2925 int retval, i;
2926 u8 page_addr, val, data[16];
2927 u8 *ptr;
2928
2929 if (!start_page) {
2930 retval = ms_set_rw_reg_addr(chip, OverwriteFlag, MS_EXTRA_SIZE, SystemParm, 7);
2931 if (retval != STATUS_SUCCESS)
2932 TRACE_RET(chip, STATUS_FAIL);
2933
2934 if (CHK_MS4BIT(ms_card))
2935 data[0] = 0x88;
2936 else
2937 data[0] = 0x80;
2938
2939 data[1] = 0;
2940 data[2] = (u8)(old_blk >> 8);
2941 data[3] = (u8)old_blk;
2942 data[4] = 0x80;
2943 data[5] = 0;
2944 data[6] = 0xEF;
2945 data[7] = 0xFF;
2946
2947 retval = ms_write_bytes(chip, WRITE_REG, 7, NO_WAIT_INT, data, 8);
2948 if (retval != STATUS_SUCCESS)
2949 TRACE_RET(chip, STATUS_FAIL);
2950
2951 retval = ms_send_cmd(chip, BLOCK_WRITE, WAIT_INT);
2952 if (retval != STATUS_SUCCESS)
2953 TRACE_RET(chip, STATUS_FAIL);
2954
2955 ms_set_err_code(chip, MS_NO_ERROR);
2956 retval = ms_transfer_tpc(chip, MS_TM_READ_BYTES, GET_INT, 1, NO_WAIT_INT);
2957 if (retval != STATUS_SUCCESS)
2958 TRACE_RET(chip, STATUS_FAIL);
2959 }
2960
2961 retval = ms_set_rw_reg_addr(chip, OverwriteFlag, MS_EXTRA_SIZE, SystemParm, (6 + MS_EXTRA_SIZE));
2962 if (retval != STATUS_SUCCESS)
2963 TRACE_RET(chip, STATUS_FAIL);
2964
2965 ms_set_err_code(chip, MS_NO_ERROR);
2966
2967 if (CHK_MS4BIT(ms_card))
2968 data[0] = 0x88;
2969 else
2970 data[0] = 0x80;
2971
2972 data[1] = 0;
2973 data[2] = (u8)(new_blk >> 8);
2974 data[3] = (u8)new_blk;
2975 if ((end_page - start_page) == 1)
2976 data[4] = 0x20;
2977 else
2978 data[4] = 0;
2979
2980 data[5] = start_page;
2981 data[6] = 0xF8;
2982 data[7] = 0xFF;
2983 data[8] = (u8)(log_blk >> 8);
2984 data[9] = (u8)log_blk;
2985
2986 for (i = 0x0A; i < 0x10; i++)
2987 data[i] = 0xFF;
2988
2989 for (i = 0; i < MS_MAX_RETRY_COUNT; i++) {
2990 retval = ms_write_bytes(chip, WRITE_REG, 6 + MS_EXTRA_SIZE, NO_WAIT_INT, data, 16);
2991 if (retval == STATUS_SUCCESS)
2992 break;
2993 }
2994 if (i == MS_MAX_RETRY_COUNT)
2995 TRACE_RET(chip, STATUS_FAIL);
2996
2997 for (i = 0; i < MS_MAX_RETRY_COUNT; i++) {
2998 retval = ms_send_cmd(chip, BLOCK_WRITE, WAIT_INT);
2999 if (retval == STATUS_SUCCESS)
3000 break;
3001 }
3002 if (i == MS_MAX_RETRY_COUNT)
3003 TRACE_RET(chip, STATUS_FAIL);
3004
3005 retval = ms_read_bytes(chip, GET_INT, 1, NO_WAIT_INT, &val, 1);
3006 if (retval != STATUS_SUCCESS)
3007 TRACE_RET(chip, STATUS_FAIL);
3008
3009 ptr = buf;
3010 for (page_addr = start_page; page_addr < end_page; page_addr++) {
3011 ms_set_err_code(chip, MS_NO_ERROR);
3012
3013 if (detect_card_cd(chip, MS_CARD) != STATUS_SUCCESS) {
3014 ms_set_err_code(chip, MS_NO_CARD);
3015 TRACE_RET(chip, STATUS_FAIL);
3016 }
3017
3018 if (val & INT_REG_CMDNK) {
3019 ms_set_err_code(chip, MS_CMD_NK);
3020 TRACE_RET(chip, STATUS_FAIL);
3021 }
3022 if (val & INT_REG_ERR) {
3023 ms_set_err_code(chip, MS_FLASH_WRITE_ERROR);
3024 TRACE_RET(chip, STATUS_FAIL);
3025 }
3026 if (!(val & INT_REG_BREQ)) {
3027 ms_set_err_code(chip, MS_BREQ_ERROR);
3028 TRACE_RET(chip, STATUS_FAIL);
3029 }
3030
3031 udelay(30);
3032
3033 rtsx_init_cmd(chip);
3034
3035 rtsx_add_cmd(chip, WRITE_REG_CMD, MS_TPC, 0xFF, WRITE_PAGE_DATA);
3036 rtsx_add_cmd(chip, WRITE_REG_CMD, MS_TRANS_CFG, 0xFF, WAIT_INT);
3037 rtsx_add_cmd(chip, WRITE_REG_CMD, CARD_DATA_SOURCE, 0x01, RING_BUFFER);
3038
3039 trans_dma_enable(DMA_TO_DEVICE, chip, 512, DMA_512);
3040
3041 rtsx_add_cmd(chip, WRITE_REG_CMD, MS_TRANSFER, 0xFF,
3042 MS_TRANSFER_START | MS_TM_NORMAL_WRITE);
3043 rtsx_add_cmd(chip, CHECK_REG_CMD, MS_TRANSFER, MS_TRANSFER_END, MS_TRANSFER_END);
3044
3045 rtsx_send_cmd_no_wait(chip);
3046
3047 retval = rtsx_transfer_data_partial(chip, MS_CARD, ptr, 512, scsi_sg_count(chip->srb),
3048 index, offset, DMA_TO_DEVICE, chip->ms_timeout);
3049 if (retval < 0) {
3050 ms_set_err_code(chip, MS_TO_ERROR);
3051 rtsx_clear_ms_error(chip);
3052
3053 if (retval == -ETIMEDOUT)
3054 TRACE_RET(chip, STATUS_TIMEDOUT);
3055 else
3056 TRACE_RET(chip, STATUS_FAIL);
3057 }
3058
3059 retval = ms_read_bytes(chip, GET_INT, 1, NO_WAIT_INT, &val, 1);
3060 if (retval != STATUS_SUCCESS)
3061 TRACE_RET(chip, STATUS_FAIL);
3062
3063 if ((end_page - start_page) == 1) {
3064 if (!(val & INT_REG_CED)) {
3065 ms_set_err_code(chip, MS_FLASH_WRITE_ERROR);
3066 TRACE_RET(chip, STATUS_FAIL);
3067 }
3068 } else {
3069 if (page_addr == (end_page - 1)) {
3070 if (!(val & INT_REG_CED)) {
3071 retval = ms_send_cmd(chip, BLOCK_END, WAIT_INT);
3072 if (retval != STATUS_SUCCESS)
3073 TRACE_RET(chip, STATUS_FAIL);
3074 }
3075
3076 retval = ms_read_bytes(chip, GET_INT, 1, NO_WAIT_INT, &val, 1);
3077 if (retval != STATUS_SUCCESS)
3078 TRACE_RET(chip, STATUS_FAIL);
3079 }
3080
3081 if ((page_addr == (end_page - 1)) || (page_addr == ms_card->page_off)) {
3082 if (!(val & INT_REG_CED)) {
3083 ms_set_err_code(chip, MS_FLASH_WRITE_ERROR);
3084 TRACE_RET(chip, STATUS_FAIL);
3085 }
3086 }
3087 }
3088
3089 if (scsi_sg_count(chip->srb) == 0)
3090 ptr += 512;
3091 }
3092
3093 return STATUS_SUCCESS;
3094}
3095
3096
3097static int ms_finish_write(struct rtsx_chip *chip, u16 old_blk, u16 new_blk,
3098 u16 log_blk, u8 page_off)
3099{
3100 struct ms_info *ms_card = &(chip->ms_card);
3101 int retval, seg_no;
3102
3103 retval = ms_copy_page(chip, old_blk, new_blk, log_blk,
3104 page_off, ms_card->page_off + 1);
3105 if (retval != STATUS_SUCCESS)
3106 TRACE_RET(chip, STATUS_FAIL);
3107
3108 seg_no = old_blk >> 9;
3109
3110 if (MS_TST_BAD_BLOCK_FLG(ms_card)) {
3111 MS_CLR_BAD_BLOCK_FLG(ms_card);
3112 ms_set_bad_block(chip, old_blk);
3113 } else {
3114 retval = ms_erase_block(chip, old_blk);
3115 if (retval == STATUS_SUCCESS)
3116 ms_set_unused_block(chip, old_blk);
3117 }
3118
3119 ms_set_l2p_tbl(chip, seg_no, log_blk - ms_start_idx[seg_no], new_blk);
3120
3121 return STATUS_SUCCESS;
3122}
3123
3124static int ms_prepare_write(struct rtsx_chip *chip, u16 old_blk, u16 new_blk,
3125 u16 log_blk, u8 start_page)
3126{
3127 int retval;
3128
3129 if (start_page) {
3130 retval = ms_copy_page(chip, old_blk, new_blk, log_blk, 0, start_page);
3131 if (retval != STATUS_SUCCESS)
3132 TRACE_RET(chip, STATUS_FAIL);
3133 }
3134
3135 return STATUS_SUCCESS;
3136}
3137
3138#ifdef MS_DELAY_WRITE
3139int ms_delay_write(struct rtsx_chip *chip)
3140{
3141 struct ms_info *ms_card = &(chip->ms_card);
3142 struct ms_delay_write_tag *delay_write = &(ms_card->delay_write);
3143 int retval;
3144
3145 if (delay_write->delay_write_flag) {
3146 retval = ms_set_init_para(chip);
3147 if (retval != STATUS_SUCCESS)
3148 TRACE_RET(chip, STATUS_FAIL);
3149
3150 delay_write->delay_write_flag = 0;
3151 retval = ms_finish_write(chip,
3152 delay_write->old_phyblock, delay_write->new_phyblock,
3153 delay_write->logblock, delay_write->pageoff);
3154 if (retval != STATUS_SUCCESS)
3155 TRACE_RET(chip, STATUS_FAIL);
3156 }
3157
3158 return STATUS_SUCCESS;
3159}
3160#endif
3161
3162static inline void ms_rw_fail(struct scsi_cmnd *srb, struct rtsx_chip *chip)
3163{
3164 if (srb->sc_data_direction == DMA_FROM_DEVICE)
3165 set_sense_type(chip, SCSI_LUN(srb), SENSE_TYPE_MEDIA_UNRECOVER_READ_ERR);
3166 else
3167 set_sense_type(chip, SCSI_LUN(srb), SENSE_TYPE_MEDIA_WRITE_ERR);
3168}
3169
3170static int ms_rw_multi_sector(struct scsi_cmnd *srb, struct rtsx_chip *chip, u32 start_sector, u16 sector_cnt)
3171{
3172 struct ms_info *ms_card = &(chip->ms_card);
3173 unsigned int lun = SCSI_LUN(srb);
3174 int retval, seg_no;
3175 unsigned int index = 0, offset = 0;
3176 u16 old_blk = 0, new_blk = 0, log_blk, total_sec_cnt = sector_cnt;
3177 u8 start_page, end_page = 0, page_cnt;
3178 u8 *ptr;
3179#ifdef MS_DELAY_WRITE
3180 struct ms_delay_write_tag *delay_write = &(ms_card->delay_write);
3181#endif
3182
3183 ms_set_err_code(chip, MS_NO_ERROR);
3184
3185 ms_card->cleanup_counter = 0;
3186
3187 ptr = (u8 *)scsi_sglist(srb);
3188
3189 retval = ms_switch_clock(chip);
3190 if (retval != STATUS_SUCCESS) {
3191 ms_rw_fail(srb, chip);
3192 TRACE_RET(chip, STATUS_FAIL);
3193 }
3194
3195 log_blk = (u16)(start_sector >> ms_card->block_shift);
3196 start_page = (u8)(start_sector & ms_card->page_off);
3197
3198 for (seg_no = 0; seg_no < ARRAY_SIZE(ms_start_idx) - 1; seg_no++) {
3199 if (log_blk < ms_start_idx[seg_no+1])
3200 break;
3201 }
3202
3203 if (ms_card->segment[seg_no].build_flag == 0) {
3204 retval = ms_build_l2p_tbl(chip, seg_no);
3205 if (retval != STATUS_SUCCESS) {
3206 chip->card_fail |= MS_CARD;
3207 set_sense_type(chip, lun, SENSE_TYPE_MEDIA_NOT_PRESENT);
3208 TRACE_RET(chip, STATUS_FAIL);
3209 }
3210 }
3211
3212 if (srb->sc_data_direction == DMA_TO_DEVICE) {
3213#ifdef MS_DELAY_WRITE
3214 if (delay_write->delay_write_flag &&
3215 (delay_write->logblock == log_blk) &&
3216 (start_page > delay_write->pageoff)) {
3217 delay_write->delay_write_flag = 0;
3218 retval = ms_copy_page(chip,
3219 delay_write->old_phyblock,
3220 delay_write->new_phyblock, log_blk,
3221 delay_write->pageoff, start_page);
3222 if (retval != STATUS_SUCCESS) {
3223 set_sense_type(chip, lun, SENSE_TYPE_MEDIA_WRITE_ERR);
3224 TRACE_RET(chip, STATUS_FAIL);
3225 }
3226 old_blk = delay_write->old_phyblock;
3227 new_blk = delay_write->new_phyblock;
3228 } else if (delay_write->delay_write_flag &&
3229 (delay_write->logblock == log_blk) &&
3230 (start_page == delay_write->pageoff)) {
3231 delay_write->delay_write_flag = 0;
3232 old_blk = delay_write->old_phyblock;
3233 new_blk = delay_write->new_phyblock;
3234 } else {
3235 retval = ms_delay_write(chip);
3236 if (retval != STATUS_SUCCESS) {
3237 set_sense_type(chip, lun, SENSE_TYPE_MEDIA_WRITE_ERR);
3238 TRACE_RET(chip, STATUS_FAIL);
3239 }
3240#endif
3241 old_blk = ms_get_l2p_tbl(chip, seg_no, log_blk - ms_start_idx[seg_no]);
3242 new_blk = ms_get_unused_block(chip, seg_no);
3243 if ((old_blk == 0xFFFF) || (new_blk == 0xFFFF)) {
3244 set_sense_type(chip, lun, SENSE_TYPE_MEDIA_WRITE_ERR);
3245 TRACE_RET(chip, STATUS_FAIL);
3246 }
3247
3248 retval = ms_prepare_write(chip, old_blk, new_blk, log_blk, start_page);
3249 if (retval != STATUS_SUCCESS) {
3250 if (detect_card_cd(chip, MS_CARD) != STATUS_SUCCESS) {
3251 set_sense_type(chip, lun, SENSE_TYPE_MEDIA_NOT_PRESENT);
3252 TRACE_RET(chip, STATUS_FAIL);
3253 }
3254 set_sense_type(chip, lun, SENSE_TYPE_MEDIA_WRITE_ERR);
3255 TRACE_RET(chip, STATUS_FAIL);
3256 }
3257#ifdef MS_DELAY_WRITE
3258 }
3259#endif
3260 } else {
3261#ifdef MS_DELAY_WRITE
3262 retval = ms_delay_write(chip);
3263 if (retval != STATUS_SUCCESS) {
3264 if (detect_card_cd(chip, MS_CARD) != STATUS_SUCCESS) {
3265 set_sense_type(chip, lun, SENSE_TYPE_MEDIA_NOT_PRESENT);
3266 TRACE_RET(chip, STATUS_FAIL);
3267 }
3268 set_sense_type(chip, lun, SENSE_TYPE_MEDIA_UNRECOVER_READ_ERR);
3269 TRACE_RET(chip, STATUS_FAIL);
3270 }
3271#endif
3272 old_blk = ms_get_l2p_tbl(chip, seg_no, log_blk - ms_start_idx[seg_no]);
3273 if (old_blk == 0xFFFF) {
3274 set_sense_type(chip, lun, SENSE_TYPE_MEDIA_UNRECOVER_READ_ERR);
3275 TRACE_RET(chip, STATUS_FAIL);
3276 }
3277 }
3278
3279 RTSX_DEBUGP("seg_no = %d, old_blk = 0x%x, new_blk = 0x%x\n", seg_no, old_blk, new_blk);
3280
3281 while (total_sec_cnt) {
3282 if ((start_page + total_sec_cnt) > (ms_card->page_off + 1))
3283 end_page = ms_card->page_off + 1;
3284 else
3285 end_page = start_page + (u8)total_sec_cnt;
3286
3287 page_cnt = end_page - start_page;
3288
3289 RTSX_DEBUGP("start_page = %d, end_page = %d, page_cnt = %d\n",
3290 start_page, end_page, page_cnt);
3291
3292 if (srb->sc_data_direction == DMA_FROM_DEVICE) {
3293 retval = ms_read_multiple_pages(chip,
3294 old_blk, log_blk, start_page, end_page,
3295 ptr, &index, &offset);
3296 } else {
3297 retval = ms_write_multiple_pages(chip, old_blk,
3298 new_blk, log_blk, start_page, end_page,
3299 ptr, &index, &offset);
3300 }
3301
3302 if (retval != STATUS_SUCCESS) {
3303 toggle_gpio(chip, 1);
3304 if (detect_card_cd(chip, MS_CARD) != STATUS_SUCCESS) {
3305 set_sense_type(chip, lun, SENSE_TYPE_MEDIA_NOT_PRESENT);
3306 TRACE_RET(chip, STATUS_FAIL);
3307 }
3308 ms_rw_fail(srb, chip);
3309 TRACE_RET(chip, STATUS_FAIL);
3310 }
3311
3312 if (srb->sc_data_direction == DMA_TO_DEVICE) {
3313 if (end_page == (ms_card->page_off + 1)) {
3314 retval = ms_erase_block(chip, old_blk);
3315 if (retval == STATUS_SUCCESS)
3316 ms_set_unused_block(chip, old_blk);
3317
3318 ms_set_l2p_tbl(chip, seg_no, log_blk - ms_start_idx[seg_no], new_blk);
3319 }
3320 }
3321
3322 total_sec_cnt -= page_cnt;
3323 if (scsi_sg_count(srb) == 0)
3324 ptr += page_cnt * 512;
3325
3326 if (total_sec_cnt == 0)
3327 break;
3328
3329 log_blk++;
3330
3331 for (seg_no = 0; seg_no < ARRAY_SIZE(ms_start_idx) - 1;
3332 seg_no++) {
3333 if (log_blk < ms_start_idx[seg_no+1])
3334 break;
3335 }
3336
3337 if (ms_card->segment[seg_no].build_flag == 0) {
3338 retval = ms_build_l2p_tbl(chip, seg_no);
3339 if (retval != STATUS_SUCCESS) {
3340 chip->card_fail |= MS_CARD;
3341 set_sense_type(chip, lun, SENSE_TYPE_MEDIA_NOT_PRESENT);
3342 TRACE_RET(chip, STATUS_FAIL);
3343 }
3344 }
3345
3346 old_blk = ms_get_l2p_tbl(chip, seg_no, log_blk - ms_start_idx[seg_no]);
3347 if (old_blk == 0xFFFF) {
3348 ms_rw_fail(srb, chip);
3349 TRACE_RET(chip, STATUS_FAIL);
3350 }
3351
3352 if (srb->sc_data_direction == DMA_TO_DEVICE) {
3353 new_blk = ms_get_unused_block(chip, seg_no);
3354 if (new_blk == 0xFFFF) {
3355 ms_rw_fail(srb, chip);
3356 TRACE_RET(chip, STATUS_FAIL);
3357 }
3358 }
3359
3360 RTSX_DEBUGP("seg_no = %d, old_blk = 0x%x, new_blk = 0x%x\n", seg_no, old_blk, new_blk);
3361
3362 start_page = 0;
3363 }
3364
3365 if (srb->sc_data_direction == DMA_TO_DEVICE) {
3366 if (end_page < (ms_card->page_off + 1)) {
3367#ifdef MS_DELAY_WRITE
3368 delay_write->delay_write_flag = 1;
3369 delay_write->old_phyblock = old_blk;
3370 delay_write->new_phyblock = new_blk;
3371 delay_write->logblock = log_blk;
3372 delay_write->pageoff = end_page;
3373#else
3374 retval = ms_finish_write(chip, old_blk, new_blk, log_blk, end_page);
3375 if (retval != STATUS_SUCCESS) {
3376 if (detect_card_cd(chip, MS_CARD) != STATUS_SUCCESS) {
3377 set_sense_type(chip, lun, SENSE_TYPE_MEDIA_NOT_PRESENT);
3378 TRACE_RET(chip, STATUS_FAIL);
3379 }
3380
3381 ms_rw_fail(srb, chip);
3382 TRACE_RET(chip, STATUS_FAIL);
3383 }
3384#endif
3385 }
3386 }
3387
3388 scsi_set_resid(srb, 0);
3389
3390 return STATUS_SUCCESS;
3391}
3392
3393int ms_rw(struct scsi_cmnd *srb, struct rtsx_chip *chip, u32 start_sector, u16 sector_cnt)
3394{
3395 struct ms_info *ms_card = &(chip->ms_card);
3396 int retval;
3397
3398 if (CHK_MSPRO(ms_card))
3399 retval = mspro_rw_multi_sector(srb, chip, start_sector, sector_cnt);
3400 else
3401 retval = ms_rw_multi_sector(srb, chip, start_sector, sector_cnt);
3402
3403 return retval;
3404}
3405
3406
3407void ms_free_l2p_tbl(struct rtsx_chip *chip)
3408{
3409 struct ms_info *ms_card = &(chip->ms_card);
3410 int i = 0;
3411
3412 if (ms_card->segment != NULL) {
3413 for (i = 0; i < ms_card->segment_cnt; i++) {
3414 if (ms_card->segment[i].l2p_table != NULL) {
3415 vfree(ms_card->segment[i].l2p_table);
3416 ms_card->segment[i].l2p_table = NULL;
3417 }
3418 if (ms_card->segment[i].free_table != NULL) {
3419 vfree(ms_card->segment[i].free_table);
3420 ms_card->segment[i].free_table = NULL;
3421 }
3422 }
3423 vfree(ms_card->segment);
3424 ms_card->segment = NULL;
3425 }
3426}
3427
3428#ifdef SUPPORT_MAGIC_GATE
3429
3430#ifdef READ_BYTES_WAIT_INT
3431static int ms_poll_int(struct rtsx_chip *chip)
3432{
3433 int retval;
3434 u8 val;
3435
3436 rtsx_init_cmd(chip);
3437
3438 rtsx_add_cmd(chip, CHECK_REG_CMD, MS_TRANS_CFG, MS_INT_CED, MS_INT_CED);
3439
3440 retval = rtsx_send_cmd(chip, MS_CARD, 5000);
3441 if (retval != STATUS_SUCCESS)
3442 TRACE_RET(chip, STATUS_FAIL);
3443
3444 val = *rtsx_get_cmd_data(chip);
3445 if (val & MS_INT_ERR)
3446 TRACE_RET(chip, STATUS_FAIL);
3447
3448 return STATUS_SUCCESS;
3449}
3450#endif
3451
3452#ifdef MS_SAMPLE_INT_ERR
3453static int check_ms_err(struct rtsx_chip *chip)
3454{
3455 int retval;
3456 u8 val;
3457
3458 retval = rtsx_read_register(chip, MS_TRANSFER, &val);
3459 if (retval != STATUS_SUCCESS)
3460 return 1;
3461 if (val & MS_TRANSFER_ERR)
3462 return 1;
3463
3464 retval = rtsx_read_register(chip, MS_TRANS_CFG, &val);
3465 if (retval != STATUS_SUCCESS)
3466 return 1;
3467
3468 if (val & (MS_INT_ERR | MS_INT_CMDNK))
3469 return 1;
3470
3471 return 0;
3472}
3473#else
3474static int check_ms_err(struct rtsx_chip *chip)
3475{
3476 int retval;
3477 u8 val;
3478
3479 retval = rtsx_read_register(chip, MS_TRANSFER, &val);
3480 if (retval != STATUS_SUCCESS)
3481 return 1;
3482 if (val & MS_TRANSFER_ERR)
3483 return 1;
3484
3485 return 0;
3486}
3487#endif
3488
3489static int mg_send_ex_cmd(struct rtsx_chip *chip, u8 cmd, u8 entry_num)
3490{
3491 int retval, i;
3492 u8 data[8];
3493
3494 data[0] = cmd;
3495 data[1] = 0;
3496 data[2] = 0;
3497 data[3] = 0;
3498 data[4] = 0;
3499 data[5] = 0;
3500 data[6] = entry_num;
3501 data[7] = 0;
3502
3503 for (i = 0; i < MS_MAX_RETRY_COUNT; i++) {
3504 retval = ms_write_bytes(chip, PRO_EX_SET_CMD, 7, WAIT_INT, data, 8);
3505 if (retval == STATUS_SUCCESS)
3506 break;
3507 }
3508 if (i == MS_MAX_RETRY_COUNT)
3509 TRACE_RET(chip, STATUS_FAIL);
3510
3511 if (check_ms_err(chip)) {
3512 rtsx_clear_ms_error(chip);
3513 TRACE_RET(chip, STATUS_FAIL);
3514 }
3515
3516 return STATUS_SUCCESS;
3517}
3518
3519static int mg_set_tpc_para_sub(struct rtsx_chip *chip, int type, u8 mg_entry_num)
3520{
3521 int retval;
3522 u8 buf[6];
3523
3524 RTSX_DEBUGP("--%s--\n", __func__);
3525
3526 if (type == 0)
3527 retval = ms_set_rw_reg_addr(chip, 0, 0, Pro_TPCParm, 1);
3528 else
3529 retval = ms_set_rw_reg_addr(chip, 0, 0, Pro_DataCount1, 6);
3530
3531 if (retval != STATUS_SUCCESS)
3532 TRACE_RET(chip, STATUS_FAIL);
3533
3534 buf[0] = 0;
3535 buf[1] = 0;
3536 if (type == 1) {
3537 buf[2] = 0;
3538 buf[3] = 0;
3539 buf[4] = 0;
3540 buf[5] = mg_entry_num;
3541 }
3542 retval = ms_write_bytes(chip, PRO_WRITE_REG, (type == 0) ? 1 : 6, NO_WAIT_INT, buf, 6);
3543 if (retval != STATUS_SUCCESS)
3544 TRACE_RET(chip, STATUS_FAIL);
3545
3546 return STATUS_SUCCESS;
3547}
3548
3549int mg_set_leaf_id(struct scsi_cmnd *srb, struct rtsx_chip *chip)
3550{
3551 int retval;
3552 int i;
3553 unsigned int lun = SCSI_LUN(srb);
3554 u8 buf1[32], buf2[12];
3555
3556 RTSX_DEBUGP("--%s--\n", __func__);
3557
3558 if (scsi_bufflen(srb) < 12) {
3559 set_sense_type(chip, lun, SENSE_TYPE_MEDIA_INVALID_CMD_FIELD);
3560 TRACE_RET(chip, STATUS_FAIL);
3561 }
3562
3563 ms_cleanup_work(chip);
3564
3565 retval = ms_switch_clock(chip);
3566 if (retval != STATUS_SUCCESS)
3567 TRACE_RET(chip, STATUS_FAIL);
3568
3569 retval = mg_send_ex_cmd(chip, MG_SET_LID, 0);
3570 if (retval != STATUS_SUCCESS) {
3571 set_sense_type(chip, lun, SENSE_TYPE_MG_KEY_FAIL_NOT_ESTAB);
3572 TRACE_RET(chip, STATUS_FAIL);
3573 }
3574
3575 memset(buf1, 0, 32);
3576 rtsx_stor_get_xfer_buf(buf2, min(12, (int)scsi_bufflen(srb)), srb);
3577 for (i = 0; i < 8; i++)
3578 buf1[8+i] = buf2[4+i];
3579
3580 retval = ms_write_bytes(chip, PRO_WRITE_SHORT_DATA, 32, WAIT_INT, buf1, 32);
3581 if (retval != STATUS_SUCCESS) {
3582 set_sense_type(chip, lun, SENSE_TYPE_MG_KEY_FAIL_NOT_ESTAB);
3583 TRACE_RET(chip, STATUS_FAIL);
3584 }
3585 if (check_ms_err(chip)) {
3586 set_sense_type(chip, lun, SENSE_TYPE_MG_KEY_FAIL_NOT_ESTAB);
3587 rtsx_clear_ms_error(chip);
3588 TRACE_RET(chip, STATUS_FAIL);
3589 }
3590
3591 return STATUS_SUCCESS;
3592}
3593
3594int mg_get_local_EKB(struct scsi_cmnd *srb, struct rtsx_chip *chip)
3595{
3596 int retval = STATUS_FAIL;
3597 int bufflen;
3598 unsigned int lun = SCSI_LUN(srb);
3599 u8 *buf = NULL;
3600
3601 RTSX_DEBUGP("--%s--\n", __func__);
3602
3603 ms_cleanup_work(chip);
3604
3605 retval = ms_switch_clock(chip);
3606 if (retval != STATUS_SUCCESS)
3607 TRACE_RET(chip, STATUS_FAIL);
3608
3609 buf = kmalloc(1540, GFP_KERNEL);
3610 if (!buf)
3611 TRACE_RET(chip, STATUS_ERROR);
3612
3613 buf[0] = 0x04;
3614 buf[1] = 0x1A;
3615 buf[2] = 0x00;
3616 buf[3] = 0x00;
3617
3618 retval = mg_send_ex_cmd(chip, MG_GET_LEKB, 0);
3619 if (retval != STATUS_SUCCESS) {
3620 set_sense_type(chip, lun, SENSE_TYPE_MG_KEY_FAIL_NOT_AUTHEN);
3621 TRACE_GOTO(chip, GetEKBFinish);
3622 }
3623
3624 retval = ms_transfer_data(chip, MS_TM_AUTO_READ, PRO_READ_LONG_DATA,
3625 3, WAIT_INT, 0, 0, buf + 4, 1536);
3626 if (retval != STATUS_SUCCESS) {
3627 set_sense_type(chip, lun, SENSE_TYPE_MG_KEY_FAIL_NOT_AUTHEN);
3628 rtsx_clear_ms_error(chip);
3629 TRACE_GOTO(chip, GetEKBFinish);
3630 }
3631 if (check_ms_err(chip)) {
3632 set_sense_type(chip, lun, SENSE_TYPE_MG_KEY_FAIL_NOT_AUTHEN);
3633 rtsx_clear_ms_error(chip);
3634 TRACE_RET(chip, STATUS_FAIL);
3635 }
3636
3637 bufflen = min(1052, (int)scsi_bufflen(srb));
3638 rtsx_stor_set_xfer_buf(buf, bufflen, srb);
3639
3640GetEKBFinish:
3641 kfree(buf);
3642 return retval;
3643}
3644
3645int mg_chg(struct scsi_cmnd *srb, struct rtsx_chip *chip)
3646{
3647 struct ms_info *ms_card = &(chip->ms_card);
3648 int retval;
3649 int bufflen;
3650 int i;
3651 unsigned int lun = SCSI_LUN(srb);
3652 u8 buf[32];
3653
3654 RTSX_DEBUGP("--%s--\n", __func__);
3655
3656 ms_cleanup_work(chip);
3657
3658 retval = ms_switch_clock(chip);
3659 if (retval != STATUS_SUCCESS)
3660 TRACE_RET(chip, STATUS_FAIL);
3661
3662 retval = mg_send_ex_cmd(chip, MG_GET_ID, 0);
3663 if (retval != STATUS_SUCCESS) {
3664 set_sense_type(chip, lun, SENSE_TYPE_MG_INCOMPATIBLE_MEDIUM);
3665 TRACE_RET(chip, STATUS_FAIL);
3666 }
3667
3668 retval = ms_read_bytes(chip, PRO_READ_SHORT_DATA, 32, WAIT_INT, buf, 32);
3669 if (retval != STATUS_SUCCESS) {
3670 set_sense_type(chip, lun, SENSE_TYPE_MG_INCOMPATIBLE_MEDIUM);
3671 TRACE_RET(chip, STATUS_FAIL);
3672 }
3673 if (check_ms_err(chip)) {
3674 set_sense_type(chip, lun, SENSE_TYPE_MG_INCOMPATIBLE_MEDIUM);
3675 rtsx_clear_ms_error(chip);
3676 TRACE_RET(chip, STATUS_FAIL);
3677 }
3678
3679 memcpy(ms_card->magic_gate_id, buf, 16);
3680
3681#ifdef READ_BYTES_WAIT_INT
3682 retval = ms_poll_int(chip);
3683 if (retval != STATUS_SUCCESS) {
3684 set_sense_type(chip, lun, SENSE_TYPE_MG_INCOMPATIBLE_MEDIUM);
3685 TRACE_RET(chip, STATUS_FAIL);
3686 }
3687#endif
3688
3689 retval = mg_send_ex_cmd(chip, MG_SET_RD, 0);
3690 if (retval != STATUS_SUCCESS) {
3691 set_sense_type(chip, lun, SENSE_TYPE_MG_INCOMPATIBLE_MEDIUM);
3692 TRACE_RET(chip, STATUS_FAIL);
3693 }
3694
3695 bufflen = min(12, (int)scsi_bufflen(srb));
3696 rtsx_stor_get_xfer_buf(buf, bufflen, srb);
3697
3698 for (i = 0; i < 8; i++)
3699 buf[i] = buf[4+i];
3700
3701 for (i = 0; i < 24; i++)
3702 buf[8+i] = 0;
3703
3704 retval = ms_write_bytes(chip, PRO_WRITE_SHORT_DATA,
3705 32, WAIT_INT, buf, 32);
3706 if (retval != STATUS_SUCCESS) {
3707 set_sense_type(chip, lun, SENSE_TYPE_MG_INCOMPATIBLE_MEDIUM);
3708 TRACE_RET(chip, STATUS_FAIL);
3709 }
3710 if (check_ms_err(chip)) {
3711 set_sense_type(chip, lun, SENSE_TYPE_MG_INCOMPATIBLE_MEDIUM);
3712 rtsx_clear_ms_error(chip);
3713 TRACE_RET(chip, STATUS_FAIL);
3714 }
3715
3716 ms_card->mg_auth = 0;
3717
3718 return STATUS_SUCCESS;
3719}
3720
3721int mg_get_rsp_chg(struct scsi_cmnd *srb, struct rtsx_chip *chip)
3722{
3723 struct ms_info *ms_card = &(chip->ms_card);
3724 int retval;
3725 int bufflen;
3726 unsigned int lun = SCSI_LUN(srb);
3727 u8 buf1[32], buf2[36];
3728
3729 RTSX_DEBUGP("--%s--\n", __func__);
3730
3731 ms_cleanup_work(chip);
3732
3733 retval = ms_switch_clock(chip);
3734 if (retval != STATUS_SUCCESS)
3735 TRACE_RET(chip, STATUS_FAIL);
3736
3737 retval = mg_send_ex_cmd(chip, MG_MAKE_RMS, 0);
3738 if (retval != STATUS_SUCCESS) {
3739 set_sense_type(chip, lun, SENSE_TYPE_MG_KEY_FAIL_NOT_AUTHEN);
3740 TRACE_RET(chip, STATUS_FAIL);
3741 }
3742
3743 retval = ms_read_bytes(chip, PRO_READ_SHORT_DATA, 32, WAIT_INT, buf1, 32);
3744 if (retval != STATUS_SUCCESS) {
3745 set_sense_type(chip, lun, SENSE_TYPE_MG_KEY_FAIL_NOT_AUTHEN);
3746 TRACE_RET(chip, STATUS_FAIL);
3747 }
3748 if (check_ms_err(chip)) {
3749 set_sense_type(chip, lun, SENSE_TYPE_MG_KEY_FAIL_NOT_AUTHEN);
3750 rtsx_clear_ms_error(chip);
3751 TRACE_RET(chip, STATUS_FAIL);
3752 }
3753
3754 buf2[0] = 0x00;
3755 buf2[1] = 0x22;
3756 buf2[2] = 0x00;
3757 buf2[3] = 0x00;
3758
3759 memcpy(buf2 + 4, ms_card->magic_gate_id, 16);
3760 memcpy(buf2 + 20, buf1, 16);
3761
3762 bufflen = min(36, (int)scsi_bufflen(srb));
3763 rtsx_stor_set_xfer_buf(buf2, bufflen, srb);
3764
3765#ifdef READ_BYTES_WAIT_INT
3766 retval = ms_poll_int(chip);
3767 if (retval != STATUS_SUCCESS) {
3768 set_sense_type(chip, lun, SENSE_TYPE_MG_KEY_FAIL_NOT_AUTHEN);
3769 TRACE_RET(chip, STATUS_FAIL);
3770 }
3771#endif
3772
3773 return STATUS_SUCCESS;
3774}
3775
3776int mg_rsp(struct scsi_cmnd *srb, struct rtsx_chip *chip)
3777{
3778 struct ms_info *ms_card = &(chip->ms_card);
3779 int retval;
3780 int i;
3781 int bufflen;
3782 unsigned int lun = SCSI_LUN(srb);
3783 u8 buf[32];
3784
3785 RTSX_DEBUGP("--%s--\n", __func__);
3786
3787 ms_cleanup_work(chip);
3788
3789 retval = ms_switch_clock(chip);
3790 if (retval != STATUS_SUCCESS)
3791 TRACE_RET(chip, STATUS_FAIL);
3792
3793 retval = mg_send_ex_cmd(chip, MG_MAKE_KSE, 0);
3794 if (retval != STATUS_SUCCESS) {
3795 set_sense_type(chip, lun, SENSE_TYPE_MG_KEY_FAIL_NOT_AUTHEN);
3796 TRACE_RET(chip, STATUS_FAIL);
3797 }
3798
3799 bufflen = min(12, (int)scsi_bufflen(srb));
3800 rtsx_stor_get_xfer_buf(buf, bufflen, srb);
3801
3802 for (i = 0; i < 8; i++)
3803 buf[i] = buf[4+i];
3804
3805 for (i = 0; i < 24; i++)
3806 buf[8+i] = 0;
3807
3808 retval = ms_write_bytes(chip, PRO_WRITE_SHORT_DATA, 32, WAIT_INT, buf, 32);
3809 if (retval != STATUS_SUCCESS) {
3810 set_sense_type(chip, lun, SENSE_TYPE_MG_KEY_FAIL_NOT_AUTHEN);
3811 TRACE_RET(chip, STATUS_FAIL);
3812 }
3813 if (check_ms_err(chip)) {
3814 set_sense_type(chip, lun, SENSE_TYPE_MG_KEY_FAIL_NOT_AUTHEN);
3815 rtsx_clear_ms_error(chip);
3816 TRACE_RET(chip, STATUS_FAIL);
3817 }
3818
3819 ms_card->mg_auth = 1;
3820
3821 return STATUS_SUCCESS;
3822}
3823
3824int mg_get_ICV(struct scsi_cmnd *srb, struct rtsx_chip *chip)
3825{
3826 struct ms_info *ms_card = &(chip->ms_card);
3827 int retval;
3828 int bufflen;
3829 unsigned int lun = SCSI_LUN(srb);
3830 u8 *buf = NULL;
3831
3832 RTSX_DEBUGP("--%s--\n", __func__);
3833
3834 ms_cleanup_work(chip);
3835
3836 retval = ms_switch_clock(chip);
3837 if (retval != STATUS_SUCCESS)
3838 TRACE_RET(chip, STATUS_FAIL);
3839
3840 buf = kmalloc(1028, GFP_KERNEL);
3841 if (!buf)
3842 TRACE_RET(chip, STATUS_ERROR);
3843
3844 buf[0] = 0x04;
3845 buf[1] = 0x02;
3846 buf[2] = 0x00;
3847 buf[3] = 0x00;
3848
3849 retval = mg_send_ex_cmd(chip, MG_GET_IBD, ms_card->mg_entry_num);
3850 if (retval != STATUS_SUCCESS) {
3851 set_sense_type(chip, lun, SENSE_TYPE_MEDIA_UNRECOVER_READ_ERR);
3852 TRACE_GOTO(chip, GetICVFinish);
3853 }
3854
3855 retval = ms_transfer_data(chip, MS_TM_AUTO_READ, PRO_READ_LONG_DATA,
3856 2, WAIT_INT, 0, 0, buf + 4, 1024);
3857 if (retval != STATUS_SUCCESS) {
3858 set_sense_type(chip, lun, SENSE_TYPE_MEDIA_UNRECOVER_READ_ERR);
3859 rtsx_clear_ms_error(chip);
3860 TRACE_GOTO(chip, GetICVFinish);
3861 }
3862 if (check_ms_err(chip)) {
3863 set_sense_type(chip, lun, SENSE_TYPE_MEDIA_UNRECOVER_READ_ERR);
3864 rtsx_clear_ms_error(chip);
3865 TRACE_RET(chip, STATUS_FAIL);
3866 }
3867
3868 bufflen = min(1028, (int)scsi_bufflen(srb));
3869 rtsx_stor_set_xfer_buf(buf, bufflen, srb);
3870
3871GetICVFinish:
3872 kfree(buf);
3873 return retval;
3874}
3875
3876int mg_set_ICV(struct scsi_cmnd *srb, struct rtsx_chip *chip)
3877{
3878 struct ms_info *ms_card = &(chip->ms_card);
3879 int retval;
3880 int bufflen;
3881#ifdef MG_SET_ICV_SLOW
3882 int i;
3883#endif
3884 unsigned int lun = SCSI_LUN(srb);
3885 u8 *buf = NULL;
3886
3887 RTSX_DEBUGP("--%s--\n", __func__);
3888
3889 ms_cleanup_work(chip);
3890
3891 retval = ms_switch_clock(chip);
3892 if (retval != STATUS_SUCCESS)
3893 TRACE_RET(chip, STATUS_FAIL);
3894
3895 buf = kmalloc(1028, GFP_KERNEL);
3896 if (!buf)
3897 TRACE_RET(chip, STATUS_ERROR);
3898
3899 bufflen = min(1028, (int)scsi_bufflen(srb));
3900 rtsx_stor_get_xfer_buf(buf, bufflen, srb);
3901
3902 retval = mg_send_ex_cmd(chip, MG_SET_IBD, ms_card->mg_entry_num);
3903 if (retval != STATUS_SUCCESS) {
3904 if (ms_card->mg_auth == 0) {
3905 if ((buf[5] & 0xC0) != 0)
3906 set_sense_type(chip, lun, SENSE_TYPE_MG_KEY_FAIL_NOT_ESTAB);
3907 else
3908 set_sense_type(chip, lun, SENSE_TYPE_MG_WRITE_ERR);
3909 } else {
3910 set_sense_type(chip, lun, SENSE_TYPE_MG_WRITE_ERR);
3911 }
3912 TRACE_GOTO(chip, SetICVFinish);
3913 }
3914
3915#ifdef MG_SET_ICV_SLOW
3916 for (i = 0; i < 2; i++) {
3917 udelay(50);
3918
3919 rtsx_init_cmd(chip);
3920
3921 rtsx_add_cmd(chip, WRITE_REG_CMD, MS_TPC, 0xFF, PRO_WRITE_LONG_DATA);
3922 rtsx_add_cmd(chip, WRITE_REG_CMD, MS_TRANS_CFG, 0xFF, WAIT_INT);
3923 rtsx_add_cmd(chip, WRITE_REG_CMD, CARD_DATA_SOURCE, 0x01, RING_BUFFER);
3924
3925 trans_dma_enable(DMA_TO_DEVICE, chip, 512, DMA_512);
3926
3927 rtsx_add_cmd(chip, WRITE_REG_CMD, MS_TRANSFER, 0xFF,
3928 MS_TRANSFER_START | MS_TM_NORMAL_WRITE);
3929 rtsx_add_cmd(chip, CHECK_REG_CMD, MS_TRANSFER, MS_TRANSFER_END, MS_TRANSFER_END);
3930
3931 rtsx_send_cmd_no_wait(chip);
3932
3933 retval = rtsx_transfer_data(chip, MS_CARD, buf + 4 + i*512, 512, 0, DMA_TO_DEVICE, 3000);
3934 if ((retval < 0) || check_ms_err(chip)) {
3935 rtsx_clear_ms_error(chip);
3936 if (ms_card->mg_auth == 0) {
3937 if ((buf[5] & 0xC0) != 0)
3938 set_sense_type(chip, lun, SENSE_TYPE_MG_KEY_FAIL_NOT_ESTAB);
3939 else
3940 set_sense_type(chip, lun, SENSE_TYPE_MG_WRITE_ERR);
3941 } else {
3942 set_sense_type(chip, lun, SENSE_TYPE_MG_WRITE_ERR);
3943 }
3944 retval = STATUS_FAIL;
3945 TRACE_GOTO(chip, SetICVFinish);
3946 }
3947 }
3948#else
3949 retval = ms_transfer_data(chip, MS_TM_AUTO_WRITE, PRO_WRITE_LONG_DATA,
3950 2, WAIT_INT, 0, 0, buf + 4, 1024);
3951 if ((retval != STATUS_SUCCESS) || check_ms_err(chip)) {
3952 rtsx_clear_ms_error(chip);
3953 if (ms_card->mg_auth == 0) {
3954 if ((buf[5] & 0xC0) != 0)
3955 set_sense_type(chip, lun, SENSE_TYPE_MG_KEY_FAIL_NOT_ESTAB);
3956 else
3957 set_sense_type(chip, lun, SENSE_TYPE_MG_WRITE_ERR);
3958 } else {
3959 set_sense_type(chip, lun, SENSE_TYPE_MG_WRITE_ERR);
3960 }
3961 TRACE_GOTO(chip, SetICVFinish);
3962 }
3963#endif
3964
3965SetICVFinish:
3966 kfree(buf);
3967 return retval;
3968}
3969
3970#endif /* SUPPORT_MAGIC_GATE */
3971
3972void ms_cleanup_work(struct rtsx_chip *chip)
3973{
3974 struct ms_info *ms_card = &(chip->ms_card);
3975
3976 if (CHK_MSPRO(ms_card)) {
3977 if (ms_card->seq_mode) {
3978 RTSX_DEBUGP("MS Pro: stop transmission\n");
3979 mspro_stop_seq_mode(chip);
3980 ms_card->cleanup_counter = 0;
3981 }
3982 if (CHK_MSHG(ms_card)) {
3983 rtsx_write_register(chip, MS_CFG,
3984 MS_2K_SECTOR_MODE, 0x00);
3985 }
3986 }
3987#ifdef MS_DELAY_WRITE
3988 else if ((!CHK_MSPRO(ms_card)) && ms_card->delay_write.delay_write_flag) {
3989 RTSX_DEBUGP("MS: delay write\n");
3990 ms_delay_write(chip);
3991 ms_card->cleanup_counter = 0;
3992 }
3993#endif
3994}
3995
3996int ms_power_off_card3v3(struct rtsx_chip *chip)
3997{
3998 int retval;
3999
4000 retval = disable_card_clock(chip, MS_CARD);
4001 if (retval != STATUS_SUCCESS)
4002 TRACE_RET(chip, STATUS_FAIL);
4003
4004 if (chip->asic_code) {
4005 retval = ms_pull_ctl_disable(chip);
4006 if (retval != STATUS_SUCCESS)
4007 TRACE_RET(chip, STATUS_FAIL);
4008 } else {
4009 RTSX_WRITE_REG(chip, FPGA_PULL_CTL,
4010 FPGA_MS_PULL_CTL_BIT | 0x20, FPGA_MS_PULL_CTL_BIT);
4011 }
4012 RTSX_WRITE_REG(chip, CARD_OE, MS_OUTPUT_EN, 0);
4013 if (!chip->ft2_fast_mode) {
4014 retval = card_power_off(chip, MS_CARD);
4015 if (retval != STATUS_SUCCESS)
4016 TRACE_RET(chip, STATUS_FAIL);
4017 }
4018
4019 return STATUS_SUCCESS;
4020}
4021
4022int release_ms_card(struct rtsx_chip *chip)
4023{
4024 struct ms_info *ms_card = &(chip->ms_card);
4025 int retval;
4026
4027 RTSX_DEBUGP("release_ms_card\n");
4028
4029#ifdef MS_DELAY_WRITE
4030 ms_card->delay_write.delay_write_flag = 0;
4031#endif
4032 ms_card->pro_under_formatting = 0;
4033
4034 chip->card_ready &= ~MS_CARD;
4035 chip->card_fail &= ~MS_CARD;
4036 chip->card_wp &= ~MS_CARD;
4037
4038 ms_free_l2p_tbl(chip);
4039
4040 memset(ms_card->raw_sys_info, 0, 96);
4041#ifdef SUPPORT_PCGL_1P18
4042 memset(ms_card->raw_model_name, 0, 48);
4043#endif
4044
4045 retval = ms_power_off_card3v3(chip);
4046 if (retval != STATUS_SUCCESS)
4047 TRACE_RET(chip, STATUS_FAIL);
4048
4049 return STATUS_SUCCESS;
4050}
4051
diff --git a/drivers/staging/rts_pstor/ms.h b/drivers/staging/rts_pstor/ms.h
deleted file mode 100644
index 537019876139..000000000000
--- a/drivers/staging/rts_pstor/ms.h
+++ /dev/null
@@ -1,225 +0,0 @@
1/* Driver for Realtek PCI-Express card reader
2 * Header file
3 *
4 * Copyright(c) 2009 Realtek Semiconductor Corp. All rights reserved.
5 *
6 * This program is free software; you can redistribute it and/or modify it
7 * under the terms of the GNU General Public License as published by the
8 * Free Software Foundation; either version 2, or (at your option) any
9 * later version.
10 *
11 * This program is distributed in the hope that it will be useful, but
12 * WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
14 * General Public License for more details.
15 *
16 * You should have received a copy of the GNU General Public License along
17 * with this program; if not, see <http://www.gnu.org/licenses/>.
18 *
19 * Author:
20 * wwang (wei_wang@realsil.com.cn)
21 * No. 450, Shenhu Road, Suzhou Industry Park, Suzhou, China
22 */
23
24#ifndef __REALTEK_RTSX_MS_H
25#define __REALTEK_RTSX_MS_H
26
27#define MS_DELAY_WRITE
28
29#define MS_MAX_RETRY_COUNT 3
30
31#define MS_EXTRA_SIZE 0x9
32
33#define WRT_PRTCT 0x01
34
35/* Error Code */
36#define MS_NO_ERROR 0x00
37#define MS_CRC16_ERROR 0x80
38#define MS_TO_ERROR 0x40
39#define MS_NO_CARD 0x20
40#define MS_NO_MEMORY 0x10
41#define MS_CMD_NK 0x08
42#define MS_FLASH_READ_ERROR 0x04
43#define MS_FLASH_WRITE_ERROR 0x02
44#define MS_BREQ_ERROR 0x01
45#define MS_NOT_FOUND 0x03
46
47/* Transfer Protocol Command */
48#define READ_PAGE_DATA 0x02
49#define READ_REG 0x04
50#define GET_INT 0x07
51#define WRITE_PAGE_DATA 0x0D
52#define WRITE_REG 0x0B
53#define SET_RW_REG_ADRS 0x08
54#define SET_CMD 0x0E
55
56#define PRO_READ_LONG_DATA 0x02
57#define PRO_READ_SHORT_DATA 0x03
58#define PRO_READ_REG 0x04
59#define PRO_READ_QUAD_DATA 0x05
60#define PRO_GET_INT 0x07
61#define PRO_WRITE_LONG_DATA 0x0D
62#define PRO_WRITE_SHORT_DATA 0x0C
63#define PRO_WRITE_QUAD_DATA 0x0A
64#define PRO_WRITE_REG 0x0B
65#define PRO_SET_RW_REG_ADRS 0x08
66#define PRO_SET_CMD 0x0E
67#define PRO_EX_SET_CMD 0x09
68
69#ifdef SUPPORT_MAGIC_GATE
70
71#define MG_GET_ID 0x40
72#define MG_SET_LID 0x41
73#define MG_GET_LEKB 0x42
74#define MG_SET_RD 0x43
75#define MG_MAKE_RMS 0x44
76#define MG_MAKE_KSE 0x45
77#define MG_SET_IBD 0x46
78#define MG_GET_IBD 0x47
79
80#endif
81
82#ifdef XC_POWERCLASS
83#define XC_CHG_POWER 0x16
84#endif
85
86#define BLOCK_READ 0xAA
87#define BLOCK_WRITE 0x55
88#define BLOCK_END 0x33
89#define BLOCK_ERASE 0x99
90#define FLASH_STOP 0xCC
91
92#define SLEEP 0x5A
93#define CLEAR_BUF 0xC3
94#define MS_RESET 0x3C
95
96#define PRO_READ_DATA 0x20
97#define PRO_WRITE_DATA 0x21
98#define PRO_READ_ATRB 0x24
99#define PRO_STOP 0x25
100#define PRO_ERASE 0x26
101#define PRO_READ_2K_DATA 0x27
102#define PRO_WRITE_2K_DATA 0x28
103
104#define PRO_FORMAT 0x10
105#define PRO_SLEEP 0x11
106
107#define IntReg 0x01
108#define StatusReg0 0x02
109#define StatusReg1 0x03
110
111#define SystemParm 0x10
112#define BlockAdrs 0x11
113#define CMDParm 0x14
114#define PageAdrs 0x15
115
116#define OverwriteFlag 0x16
117#define ManagemenFlag 0x17
118#define LogicalAdrs 0x18
119#define ReserveArea 0x1A
120
121#define Pro_IntReg 0x01
122#define Pro_StatusReg 0x02
123#define Pro_TypeReg 0x04
124#define Pro_IFModeReg 0x05
125#define Pro_CatagoryReg 0x06
126#define Pro_ClassReg 0x07
127
128
129#define Pro_SystemParm 0x10
130#define Pro_DataCount1 0x11
131#define Pro_DataCount0 0x12
132#define Pro_DataAddr3 0x13
133#define Pro_DataAddr2 0x14
134#define Pro_DataAddr1 0x15
135#define Pro_DataAddr0 0x16
136
137#define Pro_TPCParm 0x17
138#define Pro_CMDParm 0x18
139
140#define INT_REG_CED 0x80
141#define INT_REG_ERR 0x40
142#define INT_REG_BREQ 0x20
143#define INT_REG_CMDNK 0x01
144
145#define BLOCK_BOOT 0xC0
146#define BLOCK_OK 0x80
147#define PAGE_OK 0x60
148#define DATA_COMPL 0x10
149
150#define NOT_BOOT_BLOCK 0x4
151#define NOT_TRANSLATION_TABLE 0x8
152
153#define HEADER_ID0 PPBUF_BASE2
154#define HEADER_ID1 (PPBUF_BASE2 + 1)
155#define DISABLED_BLOCK0 (PPBUF_BASE2 + 0x170 + 4)
156#define DISABLED_BLOCK1 (PPBUF_BASE2 + 0x170 + 5)
157#define DISABLED_BLOCK2 (PPBUF_BASE2 + 0x170 + 6)
158#define DISABLED_BLOCK3 (PPBUF_BASE2 + 0x170 + 7)
159#define BLOCK_SIZE_0 (PPBUF_BASE2 + 0x1a0 + 2)
160#define BLOCK_SIZE_1 (PPBUF_BASE2 + 0x1a0 + 3)
161#define BLOCK_COUNT_0 (PPBUF_BASE2 + 0x1a0 + 4)
162#define BLOCK_COUNT_1 (PPBUF_BASE2 + 0x1a0 + 5)
163#define EBLOCK_COUNT_0 (PPBUF_BASE2 + 0x1a0 + 6)
164#define EBLOCK_COUNT_1 (PPBUF_BASE2 + 0x1a0 + 7)
165#define PAGE_SIZE_0 (PPBUF_BASE2 + 0x1a0 + 8)
166#define PAGE_SIZE_1 (PPBUF_BASE2 + 0x1a0 + 9)
167
168#define MS_Device_Type (PPBUF_BASE2 + 0x1D8)
169
170#define MS_4bit_Support (PPBUF_BASE2 + 0x1D3)
171
172#define setPS_NG 1
173#define setPS_Error 0
174
175#define PARALLEL_8BIT_IF 0x40
176#define PARALLEL_4BIT_IF 0x00
177#define SERIAL_IF 0x80
178
179#define BUF_FULL 0x10
180#define BUF_EMPTY 0x20
181
182#define MEDIA_BUSY 0x80
183#define FLASH_BUSY 0x40
184#define DATA_ERROR 0x20
185#define STS_UCDT 0x10
186#define EXTRA_ERROR 0x08
187#define STS_UCEX 0x04
188#define FLAG_ERROR 0x02
189#define STS_UCFG 0x01
190
191#define MS_SHORT_DATA_LEN 32
192
193#define FORMAT_SUCCESS 0
194#define FORMAT_FAIL 1
195#define FORMAT_IN_PROGRESS 2
196
197#define MS_SET_BAD_BLOCK_FLG(ms_card) ((ms_card)->multi_flag |= 0x80)
198#define MS_CLR_BAD_BLOCK_FLG(ms_card) ((ms_card)->multi_flag &= 0x7F)
199#define MS_TST_BAD_BLOCK_FLG(ms_card) ((ms_card)->multi_flag & 0x80)
200
201void mspro_polling_format_status(struct rtsx_chip *chip);
202
203void mspro_stop_seq_mode(struct rtsx_chip *chip);
204int reset_ms_card(struct rtsx_chip *chip);
205int ms_rw(struct scsi_cmnd *srb, struct rtsx_chip *chip, u32 start_sector, u16 sector_cnt);
206int mspro_format(struct scsi_cmnd *srb, struct rtsx_chip *chip, int short_data_len, int quick_format);
207void ms_free_l2p_tbl(struct rtsx_chip *chip);
208void ms_cleanup_work(struct rtsx_chip *chip);
209int ms_power_off_card3v3(struct rtsx_chip *chip);
210int release_ms_card(struct rtsx_chip *chip);
211#ifdef MS_DELAY_WRITE
212int ms_delay_write(struct rtsx_chip *chip);
213#endif
214
215#ifdef SUPPORT_MAGIC_GATE
216int mg_set_leaf_id(struct scsi_cmnd *srb, struct rtsx_chip *chip);
217int mg_get_local_EKB(struct scsi_cmnd *srb, struct rtsx_chip *chip);
218int mg_chg(struct scsi_cmnd *srb, struct rtsx_chip *chip);
219int mg_get_rsp_chg(struct scsi_cmnd *srb, struct rtsx_chip *chip);
220int mg_rsp(struct scsi_cmnd *srb, struct rtsx_chip *chip);
221int mg_get_ICV(struct scsi_cmnd *srb, struct rtsx_chip *chip);
222int mg_set_ICV(struct scsi_cmnd *srb, struct rtsx_chip *chip);
223#endif
224
225#endif /* __REALTEK_RTSX_MS_H */
diff --git a/drivers/staging/rts_pstor/rtsx.c b/drivers/staging/rts_pstor/rtsx.c
deleted file mode 100644
index afe9c2e763d7..000000000000
--- a/drivers/staging/rts_pstor/rtsx.c
+++ /dev/null
@@ -1,1105 +0,0 @@
1/* Driver for Realtek PCI-Express card reader
2 *
3 * Copyright(c) 2009 Realtek Semiconductor Corp. All rights reserved.
4 *
5 * This program is free software; you can redistribute it and/or modify it
6 * under the terms of the GNU General Public License as published by the
7 * Free Software Foundation; either version 2, or (at your option) any
8 * later version.
9 *
10 * This program is distributed in the hope that it will be useful, but
11 * WITHOUT ANY WARRANTY; without even the implied warranty of
12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
13 * General Public License for more details.
14 *
15 * You should have received a copy of the GNU General Public License along
16 * with this program; if not, see <http://www.gnu.org/licenses/>.
17 *
18 * Author:
19 * wwang (wei_wang@realsil.com.cn)
20 * No. 450, Shenhu Road, Suzhou Industry Park, Suzhou, China
21 */
22
23#define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
24
25#include <linux/blkdev.h>
26#include <linux/kthread.h>
27#include <linux/sched.h>
28#include <linux/workqueue.h>
29
30#include "rtsx.h"
31#include "rtsx_chip.h"
32#include "rtsx_transport.h"
33#include "rtsx_scsi.h"
34#include "rtsx_card.h"
35#include "general.h"
36
37#include "ms.h"
38#include "sd.h"
39#include "xd.h"
40
41#define DRIVER_VERSION "v1.10"
42
43MODULE_DESCRIPTION("Realtek PCI-Express card reader driver");
44MODULE_LICENSE("GPL");
45MODULE_VERSION(DRIVER_VERSION);
46
47static unsigned int delay_use = 1;
48module_param(delay_use, uint, S_IRUGO | S_IWUSR);
49MODULE_PARM_DESC(delay_use, "seconds to delay before using a new device");
50
51static int ss_en;
52module_param(ss_en, int, S_IRUGO | S_IWUSR);
53MODULE_PARM_DESC(ss_en, "enable selective suspend");
54
55static int ss_interval = 50;
56module_param(ss_interval, int, S_IRUGO | S_IWUSR);
57MODULE_PARM_DESC(ss_interval, "Interval to enter ss state in seconds");
58
59static int auto_delink_en;
60module_param(auto_delink_en, int, S_IRUGO | S_IWUSR);
61MODULE_PARM_DESC(auto_delink_en, "enable auto delink");
62
63static unsigned char aspm_l0s_l1_en;
64module_param(aspm_l0s_l1_en, byte, S_IRUGO | S_IWUSR);
65MODULE_PARM_DESC(aspm_l0s_l1_en, "enable device aspm");
66
67static int msi_en;
68module_param(msi_en, int, S_IRUGO | S_IWUSR);
69MODULE_PARM_DESC(msi_en, "enable msi");
70
71static irqreturn_t rtsx_interrupt(int irq, void *dev_id);
72
73/***********************************************************************
74 * Host functions
75 ***********************************************************************/
76
77static const char *host_info(struct Scsi_Host *host)
78{
79 return "SCSI emulation for PCI-Express Mass Storage devices";
80}
81
82static int slave_alloc(struct scsi_device *sdev)
83{
84 /*
85 * Set the INQUIRY transfer length to 36. We don't use any of
86 * the extra data and many devices choke if asked for more or
87 * less than 36 bytes.
88 */
89 sdev->inquiry_len = 36;
90 return 0;
91}
92
93static int slave_configure(struct scsi_device *sdev)
94{
95 /* Scatter-gather buffers (all but the last) must have a length
96 * divisible by the bulk maxpacket size. Otherwise a data packet
97 * would end up being short, causing a premature end to the data
98 * transfer. Since high-speed bulk pipes have a maxpacket size
99 * of 512, we'll use that as the scsi device queue's DMA alignment
100 * mask. Guaranteeing proper alignment of the first buffer will
101 * have the desired effect because, except at the beginning and
102 * the end, scatter-gather buffers follow page boundaries. */
103 blk_queue_dma_alignment(sdev->request_queue, (512 - 1));
104
105 /* Set the SCSI level to at least 2. We'll leave it at 3 if that's
106 * what is originally reported. We need this to avoid confusing
107 * the SCSI layer with devices that report 0 or 1, but need 10-byte
108 * commands (ala ATAPI devices behind certain bridges, or devices
109 * which simply have broken INQUIRY data).
110 *
111 * NOTE: This means /dev/sg programs (ala cdrecord) will get the
112 * actual information. This seems to be the preference for
113 * programs like that.
114 *
115 * NOTE: This also means that /proc/scsi/scsi and sysfs may report
116 * the actual value or the modified one, depending on where the
117 * data comes from.
118 */
119 if (sdev->scsi_level < SCSI_2)
120 sdev->scsi_level = sdev->sdev_target->scsi_level = SCSI_2;
121
122 return 0;
123}
124
125
126/***********************************************************************
127 * /proc/scsi/ functions
128 ***********************************************************************/
129
130/* we use this macro to help us write into the buffer */
131#undef SPRINTF
132#define SPRINTF(args...) \
133 do { if (pos < buffer+length) pos += sprintf(pos, ## args); } while (0)
134
135static int proc_info(struct Scsi_Host *host, char *buffer,
136 char **start, off_t offset, int length, int inout)
137{
138 char *pos = buffer;
139
140 /* if someone is sending us data, just throw it away */
141 if (inout)
142 return length;
143
144 /* print the controller name */
145 SPRINTF(" Host scsi%d: %s\n", host->host_no, CR_DRIVER_NAME);
146
147 /* print product, vendor, and driver version strings */
148 SPRINTF(" Vendor: Realtek Corp.\n");
149 SPRINTF(" Product: PCIE Card Reader\n");
150 SPRINTF(" Version: %s\n", DRIVER_VERSION);
151
152 /*
153 * Calculate start of next buffer, and return value.
154 */
155 *start = buffer + offset;
156
157 if ((pos - buffer) < offset)
158 return 0;
159 else if ((pos - buffer - offset) < length)
160 return pos - buffer - offset;
161 else
162 return length;
163}
164
165/* queue a command */
166/* This is always called with scsi_lock(host) held */
167static int queuecommand_lck(struct scsi_cmnd *srb,
168 void (*done)(struct scsi_cmnd *))
169{
170 struct rtsx_dev *dev = host_to_rtsx(srb->device->host);
171 struct rtsx_chip *chip = dev->chip;
172
173 /* check for state-transition errors */
174 if (chip->srb != NULL) {
175 dev_err(&dev->pci->dev, "Error in %s: chip->srb = %p\n",
176 __func__, chip->srb);
177 return SCSI_MLQUEUE_HOST_BUSY;
178 }
179
180 /* fail the command if we are disconnecting */
181 if (rtsx_chk_stat(chip, RTSX_STAT_DISCONNECT)) {
182 dev_info(&dev->pci->dev, "Fail command during disconnect\n");
183 srb->result = DID_NO_CONNECT << 16;
184 done(srb);
185 return 0;
186 }
187
188 /* enqueue the command and wake up the control thread */
189 srb->scsi_done = done;
190 chip->srb = srb;
191 complete(&dev->cmnd_ready);
192
193 return 0;
194}
195
196static DEF_SCSI_QCMD(queuecommand)
197
198/***********************************************************************
199 * Error handling functions
200 ***********************************************************************/
201
202/* Command timeout and abort */
203static int command_abort(struct scsi_cmnd *srb)
204{
205 struct Scsi_Host *host = srb->device->host;
206 struct rtsx_dev *dev = host_to_rtsx(host);
207 struct rtsx_chip *chip = dev->chip;
208
209 dev_info(&dev->pci->dev, "%s called\n", __func__);
210
211 scsi_lock(host);
212
213 /* Is this command still active? */
214 if (chip->srb != srb) {
215 scsi_unlock(host);
216 dev_info(&dev->pci->dev, "-- nothing to abort\n");
217 return FAILED;
218 }
219
220 rtsx_set_stat(chip, RTSX_STAT_ABORT);
221
222 scsi_unlock(host);
223
224 /* Wait for the aborted command to finish */
225 wait_for_completion(&dev->notify);
226
227 return SUCCESS;
228}
229
230/* This invokes the transport reset mechanism to reset the state of the
231 * device */
232static int device_reset(struct scsi_cmnd *srb)
233{
234 int result = 0;
235 struct rtsx_dev *dev = host_to_rtsx(srb->device->host);
236
237 dev_info(&dev->pci->dev, "%s called\n", __func__);
238
239 return result < 0 ? FAILED : SUCCESS;
240}
241
242/* Simulate a SCSI bus reset by resetting the device's USB port. */
243static int bus_reset(struct scsi_cmnd *srb)
244{
245 int result = 0;
246 struct rtsx_dev *dev = host_to_rtsx(srb->device->host);
247
248 dev_info(&dev->pci->dev, "%s called\n", __func__);
249
250 return result < 0 ? FAILED : SUCCESS;
251}
252
253
254/*
255 * this defines our host template, with which we'll allocate hosts
256 */
257
258static struct scsi_host_template rtsx_host_template = {
259 /* basic userland interface stuff */
260 .name = CR_DRIVER_NAME,
261 .proc_name = CR_DRIVER_NAME,
262 .proc_info = proc_info,
263 .info = host_info,
264
265 /* command interface -- queued only */
266 .queuecommand = queuecommand,
267
268 /* error and abort handlers */
269 .eh_abort_handler = command_abort,
270 .eh_device_reset_handler = device_reset,
271 .eh_bus_reset_handler = bus_reset,
272
273 /* queue commands only, only one command per LUN */
274 .can_queue = 1,
275 .cmd_per_lun = 1,
276
277 /* unknown initiator id */
278 .this_id = -1,
279
280 .slave_alloc = slave_alloc,
281 .slave_configure = slave_configure,
282
283 /* lots of sg segments can be handled */
284 .sg_tablesize = SG_ALL,
285
286 /* limit the total size of a transfer to 120 KB */
287 .max_sectors = 240,
288
289 /* merge commands... this seems to help performance, but
290 * periodically someone should test to see which setting is more
291 * optimal.
292 */
293 .use_clustering = 1,
294
295 /* emulated HBA */
296 .emulated = 1,
297
298 /* we do our own delay after a device or bus reset */
299 .skip_settle_delay = 1,
300
301 /* module management */
302 .module = THIS_MODULE
303};
304
305
306static int rtsx_acquire_irq(struct rtsx_dev *dev)
307{
308 struct rtsx_chip *chip = dev->chip;
309
310 dev_info(&dev->pci->dev, "%s: chip->msi_en = %d, pci->irq = %d\n",
311 __func__, chip->msi_en, dev->pci->irq);
312
313 if (request_irq(dev->pci->irq, rtsx_interrupt,
314 chip->msi_en ? 0 : IRQF_SHARED,
315 CR_DRIVER_NAME, dev)) {
316 dev_err(&dev->pci->dev,
317 "rtsx: unable to grab IRQ %d, disabling device\n",
318 dev->pci->irq);
319 return -1;
320 }
321
322 dev->irq = dev->pci->irq;
323 pci_intx(dev->pci, !chip->msi_en);
324
325 return 0;
326}
327
328
329int rtsx_read_pci_cfg_byte(u8 bus, u8 dev, u8 func, u8 offset, u8 *val)
330{
331 struct pci_dev *pdev;
332 u8 data;
333 u8 devfn = (dev << 3) | func;
334
335 pdev = pci_get_bus_and_slot(bus, devfn);
336 if (!pdev)
337 return -1;
338
339 pci_read_config_byte(pdev, offset, &data);
340 if (val)
341 *val = data;
342
343 return 0;
344}
345
346#ifdef CONFIG_PM
347/*
348 * power management
349 */
350static int rtsx_suspend(struct pci_dev *pci, pm_message_t state)
351{
352 struct rtsx_dev *dev = (struct rtsx_dev *)pci_get_drvdata(pci);
353 struct rtsx_chip *chip;
354
355 if (!dev)
356 return 0;
357
358 /* lock the device pointers */
359 mutex_lock(&(dev->dev_mutex));
360
361 chip = dev->chip;
362
363 rtsx_do_before_power_down(chip, PM_S3);
364
365 if (dev->irq >= 0) {
366 synchronize_irq(dev->irq);
367 free_irq(dev->irq, (void *)dev);
368 dev->irq = -1;
369 }
370
371 if (chip->msi_en)
372 pci_disable_msi(pci);
373
374 pci_save_state(pci);
375 pci_enable_wake(pci, pci_choose_state(pci, state), 1);
376 pci_disable_device(pci);
377 pci_set_power_state(pci, pci_choose_state(pci, state));
378
379 /* unlock the device pointers */
380 mutex_unlock(&dev->dev_mutex);
381
382 return 0;
383}
384
385static int rtsx_resume(struct pci_dev *pci)
386{
387 struct rtsx_dev *dev = (struct rtsx_dev *)pci_get_drvdata(pci);
388 struct rtsx_chip *chip;
389
390 if (!dev)
391 return 0;
392
393 chip = dev->chip;
394
395 /* lock the device pointers */
396 mutex_lock(&(dev->dev_mutex));
397
398 pci_set_power_state(pci, PCI_D0);
399 pci_restore_state(pci);
400 if (pci_enable_device(pci) < 0) {
401 dev_err(&dev->pci->dev,
402 "%s: pci_enable_device failed, disabling device\n",
403 CR_DRIVER_NAME);
404 /* unlock the device pointers */
405 mutex_unlock(&dev->dev_mutex);
406 return -EIO;
407 }
408 pci_set_master(pci);
409
410 if (chip->msi_en) {
411 if (pci_enable_msi(pci) < 0)
412 chip->msi_en = 0;
413 }
414
415 if (rtsx_acquire_irq(dev) < 0) {
416 /* unlock the device pointers */
417 mutex_unlock(&dev->dev_mutex);
418 return -EIO;
419 }
420
421 rtsx_write_register(chip, HOST_SLEEP_STATE, 0x03, 0x00);
422 rtsx_init_chip(chip);
423
424 /* unlock the device pointers */
425 mutex_unlock(&dev->dev_mutex);
426
427 return 0;
428}
429#endif /* CONFIG_PM */
430
431static void rtsx_shutdown(struct pci_dev *pci)
432{
433 struct rtsx_dev *dev = (struct rtsx_dev *)pci_get_drvdata(pci);
434 struct rtsx_chip *chip;
435
436 if (!dev)
437 return;
438
439 chip = dev->chip;
440
441 rtsx_do_before_power_down(chip, PM_S1);
442
443 if (dev->irq >= 0) {
444 synchronize_irq(dev->irq);
445 free_irq(dev->irq, (void *)dev);
446 dev->irq = -1;
447 }
448
449 if (chip->msi_en)
450 pci_disable_msi(pci);
451
452 pci_disable_device(pci);
453
454 return;
455}
456
457static int rtsx_control_thread(void *__dev)
458{
459 struct rtsx_dev *dev = (struct rtsx_dev *)__dev;
460 struct rtsx_chip *chip = dev->chip;
461 struct Scsi_Host *host = rtsx_to_host(dev);
462
463 for (;;) {
464 if (wait_for_completion_interruptible(&dev->cmnd_ready))
465 break;
466
467 /* lock the device pointers */
468 mutex_lock(&(dev->dev_mutex));
469
470 /* if the device has disconnected, we are free to exit */
471 if (rtsx_chk_stat(chip, RTSX_STAT_DISCONNECT)) {
472 dev_info(&dev->pci->dev, "-- rtsx-control exiting\n");
473 mutex_unlock(&dev->dev_mutex);
474 break;
475 }
476
477 /* lock access to the state */
478 scsi_lock(host);
479
480 /* has the command aborted ? */
481 if (rtsx_chk_stat(chip, RTSX_STAT_ABORT)) {
482 chip->srb->result = DID_ABORT << 16;
483 goto SkipForAbort;
484 }
485
486 scsi_unlock(host);
487
488 /* reject the command if the direction indicator
489 * is UNKNOWN
490 */
491 if (chip->srb->sc_data_direction == DMA_BIDIRECTIONAL) {
492 dev_err(&dev->pci->dev, "UNKNOWN data direction\n");
493 chip->srb->result = DID_ERROR << 16;
494 }
495
496 /* reject if target != 0 or if LUN is higher than
497 * the maximum known LUN
498 */
499 else if (chip->srb->device->id) {
500 dev_err(&dev->pci->dev, "Bad target number (%d:%d)\n",
501 chip->srb->device->id,
502 chip->srb->device->lun);
503 chip->srb->result = DID_BAD_TARGET << 16;
504 }
505
506 else if (chip->srb->device->lun > chip->max_lun) {
507 dev_err(&dev->pci->dev, "Bad LUN (%d:%d)\n",
508 chip->srb->device->id,
509 chip->srb->device->lun);
510 chip->srb->result = DID_BAD_TARGET << 16;
511 }
512
513 /* we've got a command, let's do it! */
514 else {
515 RTSX_DEBUG(scsi_show_command(chip->srb));
516 rtsx_invoke_transport(chip->srb, chip);
517 }
518
519 /* lock access to the state */
520 scsi_lock(host);
521
522 /* did the command already complete because of a disconnect? */
523 if (!chip->srb)
524 ; /* nothing to do */
525
526 /* indicate that the command is done */
527 else if (chip->srb->result != DID_ABORT << 16) {
528 chip->srb->scsi_done(chip->srb);
529 } else {
530SkipForAbort:
531 dev_err(&dev->pci->dev, "scsi command aborted\n");
532 }
533
534 if (rtsx_chk_stat(chip, RTSX_STAT_ABORT)) {
535 complete(&(dev->notify));
536
537 rtsx_set_stat(chip, RTSX_STAT_IDLE);
538 }
539
540 /* finished working on this command */
541 chip->srb = NULL;
542 scsi_unlock(host);
543
544 /* unlock the device pointers */
545 mutex_unlock(&dev->dev_mutex);
546 } /* for (;;) */
547
548 /* notify the exit routine that we're actually exiting now
549 *
550 * complete()/wait_for_completion() is similar to up()/down(),
551 * except that complete() is safe in the case where the structure
552 * is getting deleted in a parallel mode of execution (i.e. just
553 * after the down() -- that's necessary for the thread-shutdown
554 * case.
555 *
556 * complete_and_exit() goes even further than this -- it is safe in
557 * the case that the thread of the caller is going away (not just
558 * the structure) -- this is necessary for the module-remove case.
559 * This is important in preemption kernels, which transfer the flow
560 * of execution immediately upon a complete().
561 */
562 complete_and_exit(&dev->control_exit, 0);
563}
564
565
566static int rtsx_polling_thread(void *__dev)
567{
568 struct rtsx_dev *dev = (struct rtsx_dev *)__dev;
569 struct rtsx_chip *chip = dev->chip;
570 struct sd_info *sd_card = &(chip->sd_card);
571 struct xd_info *xd_card = &(chip->xd_card);
572 struct ms_info *ms_card = &(chip->ms_card);
573
574 sd_card->cleanup_counter = 0;
575 xd_card->cleanup_counter = 0;
576 ms_card->cleanup_counter = 0;
577
578 /* Wait until SCSI scan finished */
579 wait_timeout((delay_use + 5) * 1000);
580
581 for (;;) {
582
583 set_current_state(TASK_INTERRUPTIBLE);
584 schedule_timeout(POLLING_INTERVAL);
585
586 /* lock the device pointers */
587 mutex_lock(&(dev->dev_mutex));
588
589 /* if the device has disconnected, we are free to exit */
590 if (rtsx_chk_stat(chip, RTSX_STAT_DISCONNECT)) {
591 dev_info(&dev->pci->dev, "-- rtsx-polling exiting\n");
592 mutex_unlock(&dev->dev_mutex);
593 break;
594 }
595
596 mutex_unlock(&dev->dev_mutex);
597
598 mspro_polling_format_status(chip);
599
600 /* lock the device pointers */
601 mutex_lock(&(dev->dev_mutex));
602
603 rtsx_polling_func(chip);
604
605 /* unlock the device pointers */
606 mutex_unlock(&dev->dev_mutex);
607 }
608
609 complete_and_exit(&dev->polling_exit, 0);
610}
611
612/*
613 * interrupt handler
614 */
615static irqreturn_t rtsx_interrupt(int irq, void *dev_id)
616{
617 struct rtsx_dev *dev = dev_id;
618 struct rtsx_chip *chip;
619 int retval;
620 u32 status;
621
622 if (dev)
623 chip = dev->chip;
624 else
625 return IRQ_NONE;
626
627 if (!chip)
628 return IRQ_NONE;
629
630 spin_lock(&dev->reg_lock);
631
632 retval = rtsx_pre_handle_interrupt(chip);
633 if (retval == STATUS_FAIL) {
634 spin_unlock(&dev->reg_lock);
635 if (chip->int_reg == 0xFFFFFFFF)
636 return IRQ_HANDLED;
637 else
638 return IRQ_NONE;
639 }
640
641 status = chip->int_reg;
642
643 if (dev->check_card_cd) {
644 if (!(dev->check_card_cd & status)) {
645 /* card not exist, return TRANS_RESULT_FAIL */
646 dev->trans_result = TRANS_RESULT_FAIL;
647 if (dev->done)
648 complete(dev->done);
649 goto Exit;
650 }
651 }
652
653 if (status & (NEED_COMPLETE_INT | DELINK_INT)) {
654 if (status & (TRANS_FAIL_INT | DELINK_INT)) {
655 if (status & DELINK_INT)
656 RTSX_SET_DELINK(chip);
657 dev->trans_result = TRANS_RESULT_FAIL;
658 if (dev->done)
659 complete(dev->done);
660 } else if (status & TRANS_OK_INT) {
661 dev->trans_result = TRANS_RESULT_OK;
662 if (dev->done)
663 complete(dev->done);
664 } else if (status & DATA_DONE_INT) {
665 dev->trans_result = TRANS_NOT_READY;
666 if (dev->done && (dev->trans_state == STATE_TRANS_SG))
667 complete(dev->done);
668 }
669 }
670
671Exit:
672 spin_unlock(&dev->reg_lock);
673 return IRQ_HANDLED;
674}
675
676
677/* Release all our dynamic resources */
678static void rtsx_release_resources(struct rtsx_dev *dev)
679{
680 dev_info(&dev->pci->dev, "-- %s\n", __func__);
681
682 /* Tell the control thread to exit. The SCSI host must
683 * already have been removed so it won't try to queue
684 * any more commands.
685 */
686 dev_info(&dev->pci->dev, "-- sending exit command to thread\n");
687 complete(&dev->cmnd_ready);
688 if (dev->ctl_thread)
689 wait_for_completion(&dev->control_exit);
690 if (dev->polling_thread)
691 wait_for_completion(&dev->polling_exit);
692
693 wait_timeout(200);
694
695 if (dev->rtsx_resv_buf) {
696 dma_free_coherent(&(dev->pci->dev), RTSX_RESV_BUF_LEN,
697 dev->rtsx_resv_buf, dev->rtsx_resv_buf_addr);
698 dev->chip->host_cmds_ptr = NULL;
699 dev->chip->host_sg_tbl_ptr = NULL;
700 }
701
702 if (dev->irq > 0)
703 free_irq(dev->irq, (void *)dev);
704 if (dev->chip->msi_en)
705 pci_disable_msi(dev->pci);
706 if (dev->remap_addr)
707 iounmap(dev->remap_addr);
708
709 pci_disable_device(dev->pci);
710 pci_release_regions(dev->pci);
711
712 rtsx_release_chip(dev->chip);
713 kfree(dev->chip);
714}
715
716/* First stage of disconnect processing: stop all commands and remove
717 * the host */
718static void quiesce_and_remove_host(struct rtsx_dev *dev)
719{
720 struct Scsi_Host *host = rtsx_to_host(dev);
721 struct rtsx_chip *chip = dev->chip;
722
723 /* Prevent new transfers, stop the current command, and
724 * interrupt a SCSI-scan or device-reset delay */
725 mutex_lock(&dev->dev_mutex);
726 scsi_lock(host);
727 rtsx_set_stat(chip, RTSX_STAT_DISCONNECT);
728 scsi_unlock(host);
729 mutex_unlock(&dev->dev_mutex);
730 wake_up(&dev->delay_wait);
731 wait_for_completion(&dev->scanning_done);
732
733 /* Wait some time to let other threads exist */
734 wait_timeout(100);
735
736 /* queuecommand won't accept any new commands and the control
737 * thread won't execute a previously-queued command. If there
738 * is such a command pending, complete it with an error. */
739 mutex_lock(&dev->dev_mutex);
740 if (chip->srb) {
741 chip->srb->result = DID_NO_CONNECT << 16;
742 scsi_lock(host);
743 chip->srb->scsi_done(dev->chip->srb);
744 chip->srb = NULL;
745 scsi_unlock(host);
746 }
747 mutex_unlock(&dev->dev_mutex);
748
749 /* Now we own no commands so it's safe to remove the SCSI host */
750 scsi_remove_host(host);
751}
752
753/* Second stage of disconnect processing: deallocate all resources */
754static void release_everything(struct rtsx_dev *dev)
755{
756 rtsx_release_resources(dev);
757
758 /* Drop our reference to the host; the SCSI core will free it
759 * when the refcount becomes 0. */
760 scsi_host_put(rtsx_to_host(dev));
761}
762
763/* Thread to carry out delayed SCSI-device scanning */
764static int rtsx_scan_thread(void *__dev)
765{
766 struct rtsx_dev *dev = (struct rtsx_dev *)__dev;
767 struct rtsx_chip *chip = dev->chip;
768
769 /* Wait for the timeout to expire or for a disconnect */
770 if (delay_use > 0) {
771 dev_info(&dev->pci->dev,
772 "%s: waiting for device to settle before scanning\n",
773 CR_DRIVER_NAME);
774 wait_event_interruptible_timeout(dev->delay_wait,
775 rtsx_chk_stat(chip, RTSX_STAT_DISCONNECT),
776 delay_use * HZ);
777 }
778
779 /* If the device is still connected, perform the scanning */
780 if (!rtsx_chk_stat(chip, RTSX_STAT_DISCONNECT)) {
781 scsi_scan_host(rtsx_to_host(dev));
782 dev_info(&dev->pci->dev, "%s: device scan complete\n",
783 CR_DRIVER_NAME);
784
785 /* Should we unbind if no devices were detected? */
786 }
787
788 complete_and_exit(&dev->scanning_done, 0);
789}
790
791static void rtsx_init_options(struct rtsx_chip *chip)
792{
793 chip->vendor_id = chip->rtsx->pci->vendor;
794 chip->product_id = chip->rtsx->pci->device;
795 chip->adma_mode = 1;
796 chip->lun_mc = 0;
797 chip->driver_first_load = 1;
798#ifdef HW_AUTO_SWITCH_SD_BUS
799 chip->sdio_in_charge = 0;
800#endif
801
802 chip->mspro_formatter_enable = 1;
803 chip->ignore_sd = 0;
804 chip->use_hw_setting = 0;
805 chip->lun_mode = DEFAULT_SINGLE;
806 chip->auto_delink_en = auto_delink_en;
807 chip->ss_en = ss_en;
808 chip->ss_idle_period = ss_interval * 1000;
809 chip->remote_wakeup_en = 0;
810 chip->aspm_l0s_l1_en = aspm_l0s_l1_en;
811 chip->dynamic_aspm = 1;
812 chip->fpga_sd_sdr104_clk = CLK_200;
813 chip->fpga_sd_ddr50_clk = CLK_100;
814 chip->fpga_sd_sdr50_clk = CLK_100;
815 chip->fpga_sd_hs_clk = CLK_100;
816 chip->fpga_mmc_52m_clk = CLK_80;
817 chip->fpga_ms_hg_clk = CLK_80;
818 chip->fpga_ms_4bit_clk = CLK_80;
819 chip->fpga_ms_1bit_clk = CLK_40;
820 chip->asic_sd_sdr104_clk = 203;
821 chip->asic_sd_sdr50_clk = 98;
822 chip->asic_sd_ddr50_clk = 98;
823 chip->asic_sd_hs_clk = 98;
824 chip->asic_mmc_52m_clk = 98;
825 chip->asic_ms_hg_clk = 117;
826 chip->asic_ms_4bit_clk = 78;
827 chip->asic_ms_1bit_clk = 39;
828 chip->ssc_depth_sd_sdr104 = SSC_DEPTH_2M;
829 chip->ssc_depth_sd_sdr50 = SSC_DEPTH_2M;
830 chip->ssc_depth_sd_ddr50 = SSC_DEPTH_1M;
831 chip->ssc_depth_sd_hs = SSC_DEPTH_1M;
832 chip->ssc_depth_mmc_52m = SSC_DEPTH_1M;
833 chip->ssc_depth_ms_hg = SSC_DEPTH_1M;
834 chip->ssc_depth_ms_4bit = SSC_DEPTH_512K;
835 chip->ssc_depth_low_speed = SSC_DEPTH_512K;
836 chip->ssc_en = 1;
837 chip->sd_speed_prior = 0x01040203;
838 chip->sd_current_prior = 0x00010203;
839 chip->sd_ctl = SD_PUSH_POINT_AUTO |
840 SD_SAMPLE_POINT_AUTO |
841 SUPPORT_MMC_DDR_MODE;
842 chip->sd_ddr_tx_phase = 0;
843 chip->mmc_ddr_tx_phase = 1;
844 chip->sd_default_tx_phase = 15;
845 chip->sd_default_rx_phase = 15;
846 chip->pmos_pwr_on_interval = 200;
847 chip->sd_voltage_switch_delay = 1000;
848 chip->ms_power_class_en = 3;
849
850 chip->sd_400mA_ocp_thd = 1;
851 chip->sd_800mA_ocp_thd = 5;
852 chip->ms_ocp_thd = 2;
853
854 chip->card_drive_sel = 0x55;
855 chip->sd30_drive_sel_1v8 = 0x03;
856 chip->sd30_drive_sel_3v3 = 0x01;
857
858 chip->do_delink_before_power_down = 1;
859 chip->auto_power_down = 1;
860 chip->polling_config = 0;
861
862 chip->force_clkreq_0 = 1;
863 chip->ft2_fast_mode = 0;
864
865 chip->sdio_retry_cnt = 1;
866
867 chip->xd_timeout = 2000;
868 chip->sd_timeout = 10000;
869 chip->ms_timeout = 2000;
870 chip->mspro_timeout = 15000;
871
872 chip->power_down_in_ss = 1;
873
874 chip->sdr104_en = 1;
875 chip->sdr50_en = 1;
876 chip->ddr50_en = 1;
877
878 chip->delink_stage1_step = 100;
879 chip->delink_stage2_step = 40;
880 chip->delink_stage3_step = 20;
881
882 chip->auto_delink_in_L1 = 1;
883 chip->blink_led = 1;
884 chip->msi_en = msi_en;
885 chip->hp_watch_bios_hotplug = 0;
886 chip->max_payload = 0;
887 chip->phy_voltage = 0;
888
889 chip->support_ms_8bit = 1;
890 chip->s3_pwr_off_delay = 1000;
891}
892
893static int __devinit rtsx_probe(struct pci_dev *pci,
894 const struct pci_device_id *pci_id)
895{
896 struct Scsi_Host *host;
897 struct rtsx_dev *dev;
898 int err = 0;
899 struct task_struct *th;
900
901 RTSX_DEBUGP("Realtek PCI-E card reader detected\n");
902
903 err = pci_enable_device(pci);
904 if (err < 0) {
905 dev_err(&pci->dev, "PCI enable device failed!\n");
906 return err;
907 }
908
909 err = pci_request_regions(pci, CR_DRIVER_NAME);
910 if (err < 0) {
911 dev_err(&pci->dev, "PCI request regions for %s failed!\n",
912 CR_DRIVER_NAME);
913 pci_disable_device(pci);
914 return err;
915 }
916
917 /*
918 * Ask the SCSI layer to allocate a host structure, with extra
919 * space at the end for our private rtsx_dev structure.
920 */
921 host = scsi_host_alloc(&rtsx_host_template, sizeof(*dev));
922 if (!host) {
923 dev_err(&pci->dev, "Unable to allocate the scsi host\n");
924 pci_release_regions(pci);
925 pci_disable_device(pci);
926 return -ENOMEM;
927 }
928
929 dev = host_to_rtsx(host);
930 memset(dev, 0, sizeof(struct rtsx_dev));
931
932 dev->chip = kzalloc(sizeof(struct rtsx_chip), GFP_KERNEL);
933 if (dev->chip == NULL)
934 goto errout;
935
936 spin_lock_init(&dev->reg_lock);
937 mutex_init(&(dev->dev_mutex));
938 init_completion(&dev->cmnd_ready);
939 init_completion(&dev->control_exit);
940 init_completion(&dev->polling_exit);
941 init_completion(&(dev->notify));
942 init_completion(&dev->scanning_done);
943 init_waitqueue_head(&dev->delay_wait);
944
945 dev->pci = pci;
946 dev->irq = -1;
947
948 dev_info(&pci->dev, "Resource length: 0x%x\n",
949 (unsigned int)pci_resource_len(pci, 0));
950 dev->addr = pci_resource_start(pci, 0);
951 dev->remap_addr = ioremap_nocache(dev->addr, pci_resource_len(pci, 0));
952 if (dev->remap_addr == NULL) {
953 dev_err(&pci->dev, "ioremap error\n");
954 err = -ENXIO;
955 goto errout;
956 }
957
958 /*
959 * Using "unsigned long" cast here to eliminate gcc warning in
960 * 64-bit system
961 */
962 dev_info(&pci->dev, "Original address: 0x%lx, remapped address: 0x%lx\n",
963 (unsigned long)(dev->addr), (unsigned long)(dev->remap_addr));
964
965 dev->rtsx_resv_buf = dma_alloc_coherent(&(pci->dev), RTSX_RESV_BUF_LEN,
966 &(dev->rtsx_resv_buf_addr), GFP_KERNEL);
967 if (dev->rtsx_resv_buf == NULL) {
968 dev_err(&pci->dev, "alloc dma buffer fail\n");
969 err = -ENXIO;
970 goto errout;
971 }
972 dev->chip->host_cmds_ptr = dev->rtsx_resv_buf;
973 dev->chip->host_cmds_addr = dev->rtsx_resv_buf_addr;
974 dev->chip->host_sg_tbl_ptr = dev->rtsx_resv_buf + HOST_CMDS_BUF_LEN;
975 dev->chip->host_sg_tbl_addr = dev->rtsx_resv_buf_addr +
976 HOST_CMDS_BUF_LEN;
977
978 dev->chip->rtsx = dev;
979
980 rtsx_init_options(dev->chip);
981
982 dev_info(&pci->dev, "pci->irq = %d\n", pci->irq);
983
984 if (dev->chip->msi_en) {
985 if (pci_enable_msi(pci) < 0)
986 dev->chip->msi_en = 0;
987 }
988
989 if (rtsx_acquire_irq(dev) < 0) {
990 err = -EBUSY;
991 goto errout;
992 }
993
994 pci_set_master(pci);
995 synchronize_irq(dev->irq);
996
997 rtsx_init_chip(dev->chip);
998
999 /* set the supported max_lun and max_id for the scsi host
1000 * NOTE: the minimal value of max_id is 1 */
1001 host->max_id = 1;
1002 host->max_lun = dev->chip->max_lun;
1003
1004 /* Start up our control thread */
1005 th = kthread_run(rtsx_control_thread, dev, CR_DRIVER_NAME);
1006 if (IS_ERR(th)) {
1007 dev_err(&pci->dev, "Unable to start control thread\n");
1008 err = PTR_ERR(th);
1009 goto errout;
1010 }
1011 dev->ctl_thread = th;
1012
1013 err = scsi_add_host(host, &pci->dev);
1014 if (err) {
1015 dev_err(&pci->dev, "Unable to add the scsi host\n");
1016 goto errout;
1017 }
1018
1019 /* Start up the thread for delayed SCSI-device scanning */
1020 th = kthread_run(rtsx_scan_thread, dev, "rtsx-scan");
1021 if (IS_ERR(th)) {
1022 dev_err(&pci->dev, "Unable to start the device-scanning thread\n");
1023 complete(&dev->scanning_done);
1024 quiesce_and_remove_host(dev);
1025 err = PTR_ERR(th);
1026 goto errout;
1027 }
1028
1029 /* Start up the thread for polling thread */
1030 th = kthread_run(rtsx_polling_thread, dev, "rtsx-polling");
1031 if (IS_ERR(th)) {
1032 dev_err(&pci->dev, "Unable to start the device-polling thread\n");
1033 quiesce_and_remove_host(dev);
1034 err = PTR_ERR(th);
1035 goto errout;
1036 }
1037 dev->polling_thread = th;
1038
1039 pci_set_drvdata(pci, dev);
1040
1041 return 0;
1042
1043 /* We come here if there are any problems */
1044errout:
1045 dev_err(&pci->dev, "rtsx_probe() failed\n");
1046 release_everything(dev);
1047
1048 return err;
1049}
1050
1051
1052static void __devexit rtsx_remove(struct pci_dev *pci)
1053{
1054 struct rtsx_dev *dev = (struct rtsx_dev *)pci_get_drvdata(pci);
1055
1056 dev_info(&pci->dev, "rtsx_remove() called\n");
1057
1058 quiesce_and_remove_host(dev);
1059 release_everything(dev);
1060
1061 pci_set_drvdata(pci, NULL);
1062}
1063
1064/* PCI IDs */
1065static DEFINE_PCI_DEVICE_TABLE(rtsx_ids) = {
1066 { PCI_DEVICE(PCI_VENDOR_ID_REALTEK, 0x5208), PCI_CLASS_OTHERS << 16, 0xFF0000 },
1067 { PCI_DEVICE(PCI_VENDOR_ID_REALTEK, 0x5209), PCI_CLASS_OTHERS << 16, 0xFF0000 },
1068 { PCI_DEVICE(PCI_VENDOR_ID_REALTEK, 0x5288), PCI_CLASS_OTHERS << 16, 0xFF0000 },
1069 { 0, },
1070};
1071
1072MODULE_DEVICE_TABLE(pci, rtsx_ids);
1073
1074/* pci_driver definition */
1075static struct pci_driver driver = {
1076 .name = CR_DRIVER_NAME,
1077 .id_table = rtsx_ids,
1078 .probe = rtsx_probe,
1079 .remove = __devexit_p(rtsx_remove),
1080#ifdef CONFIG_PM
1081 .suspend = rtsx_suspend,
1082 .resume = rtsx_resume,
1083#endif
1084 .shutdown = rtsx_shutdown,
1085};
1086
1087static int __init rtsx_init(void)
1088{
1089 pr_info("Initializing Realtek PCIE storage driver...\n");
1090
1091 return pci_register_driver(&driver);
1092}
1093
1094static void __exit rtsx_exit(void)
1095{
1096 pr_info("rtsx_exit() called\n");
1097
1098 pci_unregister_driver(&driver);
1099
1100 pr_info("%s module exit\n", CR_DRIVER_NAME);
1101}
1102
1103module_init(rtsx_init)
1104module_exit(rtsx_exit)
1105
diff --git a/drivers/staging/rts_pstor/rtsx.h b/drivers/staging/rts_pstor/rtsx.h
deleted file mode 100644
index 1ab42fcc47da..000000000000
--- a/drivers/staging/rts_pstor/rtsx.h
+++ /dev/null
@@ -1,186 +0,0 @@
1/* Driver for Realtek PCI-Express card reader
2 * Header file
3 *
4 * Copyright(c) 2009 Realtek Semiconductor Corp. All rights reserved.
5 *
6 * This program is free software; you can redistribute it and/or modify it
7 * under the terms of the GNU General Public License as published by the
8 * Free Software Foundation; either version 2, or (at your option) any
9 * later version.
10 *
11 * This program is distributed in the hope that it will be useful, but
12 * WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
14 * General Public License for more details.
15 *
16 * You should have received a copy of the GNU General Public License along
17 * with this program; if not, see <http://www.gnu.org/licenses/>.
18 *
19 * Author:
20 * wwang (wei_wang@realsil.com.cn)
21 * No. 450, Shenhu Road, Suzhou Industry Park, Suzhou, China
22 */
23
24#ifndef __REALTEK_RTSX_H
25#define __REALTEK_RTSX_H
26
27#include <linux/io.h>
28#include <linux/bitops.h>
29#include <linux/delay.h>
30#include <linux/interrupt.h>
31#include <linux/kernel.h>
32#include <linux/module.h>
33#include <linux/moduleparam.h>
34#include <linux/init.h>
35#include <linux/slab.h>
36#include <linux/pci.h>
37#include <linux/mutex.h>
38#include <linux/cdrom.h>
39#include <linux/workqueue.h>
40#include <linux/timer.h>
41#include <linux/time.h>
42
43#include <scsi/scsi.h>
44#include <scsi/scsi_cmnd.h>
45#include <scsi/scsi_device.h>
46#include <scsi/scsi_devinfo.h>
47#include <scsi/scsi_eh.h>
48#include <scsi/scsi_host.h>
49
50#include "debug.h"
51#include "trace.h"
52#include "general.h"
53
54#define CR_DRIVER_NAME "rts_pstor"
55
56#define pci_get_bus_and_slot(bus, devfn) \
57 pci_get_domain_bus_and_slot(0, (bus), (devfn))
58
59/*
60 * macros for easy use
61 */
62#define rtsx_writel(chip, reg, value) \
63 iowrite32(value, (chip)->rtsx->remap_addr + reg)
64#define rtsx_readl(chip, reg) \
65 ioread32((chip)->rtsx->remap_addr + reg)
66#define rtsx_writew(chip, reg, value) \
67 iowrite16(value, (chip)->rtsx->remap_addr + reg)
68#define rtsx_readw(chip, reg) \
69 ioread16((chip)->rtsx->remap_addr + reg)
70#define rtsx_writeb(chip, reg, value) \
71 iowrite8(value, (chip)->rtsx->remap_addr + reg)
72#define rtsx_readb(chip, reg) \
73 ioread8((chip)->rtsx->remap_addr + reg)
74
75#define rtsx_read_config_byte(chip, where, val) \
76 pci_read_config_byte((chip)->rtsx->pci, where, val)
77
78#define rtsx_write_config_byte(chip, where, val) \
79 pci_write_config_byte((chip)->rtsx->pci, where, val)
80
81#define wait_timeout_x(task_state, msecs) \
82do { \
83 set_current_state((task_state)); \
84 schedule_timeout((msecs) * HZ / 1000); \
85} while (0)
86#define wait_timeout(msecs) wait_timeout_x(TASK_INTERRUPTIBLE, (msecs))
87
88
89#define STATE_TRANS_NONE 0
90#define STATE_TRANS_CMD 1
91#define STATE_TRANS_BUF 2
92#define STATE_TRANS_SG 3
93
94#define TRANS_NOT_READY 0
95#define TRANS_RESULT_OK 1
96#define TRANS_RESULT_FAIL 2
97
98#define SCSI_LUN(srb) ((srb)->device->lun)
99
100typedef unsigned long DELAY_PARA_T;
101
102struct rtsx_chip;
103
104struct rtsx_dev {
105 struct pci_dev *pci;
106
107 /* pci resources */
108 unsigned long addr;
109 void __iomem *remap_addr;
110 int irq;
111
112 /* locks */
113 spinlock_t reg_lock;
114
115 struct task_struct *ctl_thread; /* the control thread */
116 struct task_struct *polling_thread; /* the polling thread */
117
118 /* mutual exclusion and synchronization structures */
119 struct completion cmnd_ready; /* to sleep thread on */
120 struct completion control_exit; /* control thread exit */
121 struct completion polling_exit; /* polling thread exit */
122 struct completion notify; /* thread begin/end */
123 struct completion scanning_done; /* wait for scan thread */
124
125 wait_queue_head_t delay_wait; /* wait during scan, reset */
126 struct mutex dev_mutex;
127
128 /* host reserved buffer */
129 void *rtsx_resv_buf;
130 dma_addr_t rtsx_resv_buf_addr;
131
132 char trans_result;
133 char trans_state;
134
135 struct completion *done;
136 /* Whether interrupt handler should care card cd info */
137 u32 check_card_cd;
138
139 struct rtsx_chip *chip;
140};
141
142typedef struct rtsx_dev rtsx_dev_t;
143
144/* Convert between rtsx_dev and the corresponding Scsi_Host */
145static inline struct Scsi_Host *rtsx_to_host(struct rtsx_dev *dev)
146{
147 return container_of((void *) dev, struct Scsi_Host, hostdata);
148}
149static inline struct rtsx_dev *host_to_rtsx(struct Scsi_Host *host)
150{
151 return (struct rtsx_dev *) host->hostdata;
152}
153
154static inline void get_current_time(u8 *timeval_buf, int buf_len)
155{
156 struct timeval tv;
157
158 if (!timeval_buf || (buf_len < 8))
159 return;
160
161 do_gettimeofday(&tv);
162
163 timeval_buf[0] = (u8)(tv.tv_sec >> 24);
164 timeval_buf[1] = (u8)(tv.tv_sec >> 16);
165 timeval_buf[2] = (u8)(tv.tv_sec >> 8);
166 timeval_buf[3] = (u8)(tv.tv_sec);
167 timeval_buf[4] = (u8)(tv.tv_usec >> 24);
168 timeval_buf[5] = (u8)(tv.tv_usec >> 16);
169 timeval_buf[6] = (u8)(tv.tv_usec >> 8);
170 timeval_buf[7] = (u8)(tv.tv_usec);
171}
172
173/* The scsi_lock() and scsi_unlock() macros protect the sm_state and the
174 * single queue element srb for write access */
175#define scsi_unlock(host) spin_unlock_irq(host->host_lock)
176#define scsi_lock(host) spin_lock_irq(host->host_lock)
177
178#define lock_state(chip) spin_lock_irq(&((chip)->rtsx->reg_lock))
179#define unlock_state(chip) spin_unlock_irq(&((chip)->rtsx->reg_lock))
180
181/* struct scsi_cmnd transfer buffer access utilities */
182enum xfer_buf_dir {TO_XFER_BUF, FROM_XFER_BUF};
183
184int rtsx_read_pci_cfg_byte(u8 bus, u8 dev, u8 func, u8 offset, u8 *val);
185
186#endif /* __REALTEK_RTSX_H */
diff --git a/drivers/staging/rts_pstor/rtsx_card.c b/drivers/staging/rts_pstor/rtsx_card.c
deleted file mode 100644
index 539aa6a27788..000000000000
--- a/drivers/staging/rts_pstor/rtsx_card.c
+++ /dev/null
@@ -1,1233 +0,0 @@
1/* Driver for Realtek PCI-Express card reader
2 *
3 * Copyright(c) 2009 Realtek Semiconductor Corp. All rights reserved.
4 *
5 * This program is free software; you can redistribute it and/or modify it
6 * under the terms of the GNU General Public License as published by the
7 * Free Software Foundation; either version 2, or (at your option) any
8 * later version.
9 *
10 * This program is distributed in the hope that it will be useful, but
11 * WITHOUT ANY WARRANTY; without even the implied warranty of
12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
13 * General Public License for more details.
14 *
15 * You should have received a copy of the GNU General Public License along
16 * with this program; if not, see <http://www.gnu.org/licenses/>.
17 *
18 * Author:
19 * wwang (wei_wang@realsil.com.cn)
20 * No. 450, Shenhu Road, Suzhou Industry Park, Suzhou, China
21 */
22
23#include <linux/blkdev.h>
24#include <linux/kthread.h>
25#include <linux/sched.h>
26#include <linux/workqueue.h>
27#include <linux/kernel.h>
28
29#include "rtsx.h"
30#include "rtsx_transport.h"
31#include "rtsx_scsi.h"
32#include "rtsx_card.h"
33
34#include "rtsx_sys.h"
35#include "general.h"
36
37#include "sd.h"
38#include "xd.h"
39#include "ms.h"
40
41void do_remaining_work(struct rtsx_chip *chip)
42{
43 struct sd_info *sd_card = &(chip->sd_card);
44#ifdef XD_DELAY_WRITE
45 struct xd_info *xd_card = &(chip->xd_card);
46#endif
47 struct ms_info *ms_card = &(chip->ms_card);
48
49 if (chip->card_ready & SD_CARD) {
50 if (sd_card->seq_mode) {
51 rtsx_set_stat(chip, RTSX_STAT_RUN);
52 sd_card->cleanup_counter++;
53 } else {
54 sd_card->cleanup_counter = 0;
55 }
56 }
57
58#ifdef XD_DELAY_WRITE
59 if (chip->card_ready & XD_CARD) {
60 if (xd_card->delay_write.delay_write_flag) {
61 rtsx_set_stat(chip, RTSX_STAT_RUN);
62 xd_card->cleanup_counter++;
63 } else {
64 xd_card->cleanup_counter = 0;
65 }
66 }
67#endif
68
69 if (chip->card_ready & MS_CARD) {
70 if (CHK_MSPRO(ms_card)) {
71 if (ms_card->seq_mode) {
72 rtsx_set_stat(chip, RTSX_STAT_RUN);
73 ms_card->cleanup_counter++;
74 } else {
75 ms_card->cleanup_counter = 0;
76 }
77 } else {
78#ifdef MS_DELAY_WRITE
79 if (ms_card->delay_write.delay_write_flag) {
80 rtsx_set_stat(chip, RTSX_STAT_RUN);
81 ms_card->cleanup_counter++;
82 } else {
83 ms_card->cleanup_counter = 0;
84 }
85#endif
86 }
87 }
88
89 if (sd_card->cleanup_counter > POLLING_WAIT_CNT)
90 sd_cleanup_work(chip);
91
92 if (xd_card->cleanup_counter > POLLING_WAIT_CNT)
93 xd_cleanup_work(chip);
94
95 if (ms_card->cleanup_counter > POLLING_WAIT_CNT)
96 ms_cleanup_work(chip);
97}
98
99void try_to_switch_sdio_ctrl(struct rtsx_chip *chip)
100{
101 u8 reg1 = 0, reg2 = 0;
102
103 rtsx_read_register(chip, 0xFF34, &reg1);
104 rtsx_read_register(chip, 0xFF38, &reg2);
105 RTSX_DEBUGP("reg 0xFF34: 0x%x, reg 0xFF38: 0x%x\n", reg1, reg2);
106 if ((reg1 & 0xC0) && (reg2 & 0xC0)) {
107 chip->sd_int = 1;
108 rtsx_write_register(chip, SDIO_CTRL, 0xFF, SDIO_BUS_CTRL | SDIO_CD_CTRL);
109 rtsx_write_register(chip, PWR_GATE_CTRL, LDO3318_PWR_MASK, LDO_ON);
110 }
111}
112
113#ifdef SUPPORT_SDIO_ASPM
114void dynamic_configure_sdio_aspm(struct rtsx_chip *chip)
115{
116 u8 buf[12], reg;
117 int i;
118
119 for (i = 0; i < 12; i++)
120 rtsx_read_register(chip, 0xFF08 + i, &buf[i]);
121 rtsx_read_register(chip, 0xFF25, &reg);
122 if ((memcmp(buf, chip->sdio_raw_data, 12) != 0) || (reg & 0x03)) {
123 chip->sdio_counter = 0;
124 chip->sdio_idle = 0;
125 } else {
126 if (!chip->sdio_idle) {
127 chip->sdio_counter++;
128 if (chip->sdio_counter >= SDIO_IDLE_COUNT) {
129 chip->sdio_counter = 0;
130 chip->sdio_idle = 1;
131 }
132 }
133 }
134 memcpy(chip->sdio_raw_data, buf, 12);
135
136 if (chip->sdio_idle) {
137 if (!chip->sdio_aspm) {
138 RTSX_DEBUGP("SDIO enter ASPM!\n");
139 rtsx_write_register(chip, ASPM_FORCE_CTL, 0xFC,
140 0x30 | (chip->aspm_level[1] << 2));
141 chip->sdio_aspm = 1;
142 }
143 } else {
144 if (chip->sdio_aspm) {
145 RTSX_DEBUGP("SDIO exit ASPM!\n");
146 rtsx_write_register(chip, ASPM_FORCE_CTL, 0xFC, 0x30);
147 chip->sdio_aspm = 0;
148 }
149 }
150}
151#endif
152
153void do_reset_sd_card(struct rtsx_chip *chip)
154{
155 int retval;
156
157 RTSX_DEBUGP("%s: %d, card2lun = 0x%x\n", __func__,
158 chip->sd_reset_counter, chip->card2lun[SD_CARD]);
159
160 if (chip->card2lun[SD_CARD] >= MAX_ALLOWED_LUN_CNT) {
161 clear_bit(SD_NR, &(chip->need_reset));
162 chip->sd_reset_counter = 0;
163 chip->sd_show_cnt = 0;
164 return;
165 }
166
167 chip->rw_fail_cnt[chip->card2lun[SD_CARD]] = 0;
168
169 rtsx_set_stat(chip, RTSX_STAT_RUN);
170 rtsx_write_register(chip, SDIO_CTRL, 0xFF, 0);
171
172 retval = reset_sd_card(chip);
173 if (chip->need_release & SD_CARD)
174 return;
175 if (retval == STATUS_SUCCESS) {
176 clear_bit(SD_NR, &(chip->need_reset));
177 chip->sd_reset_counter = 0;
178 chip->sd_show_cnt = 0;
179 chip->card_ready |= SD_CARD;
180 chip->card_fail &= ~SD_CARD;
181 chip->rw_card[chip->card2lun[SD_CARD]] = sd_rw;
182 } else {
183 if (chip->sd_io || (chip->sd_reset_counter >= MAX_RESET_CNT)) {
184 clear_bit(SD_NR, &(chip->need_reset));
185 chip->sd_reset_counter = 0;
186 chip->sd_show_cnt = 0;
187 } else {
188 chip->sd_reset_counter++;
189 }
190 chip->card_ready &= ~SD_CARD;
191 chip->card_fail |= SD_CARD;
192 chip->capacity[chip->card2lun[SD_CARD]] = 0;
193 chip->rw_card[chip->card2lun[SD_CARD]] = NULL;
194
195 rtsx_write_register(chip, CARD_OE, SD_OUTPUT_EN, 0);
196 if (!chip->ft2_fast_mode)
197 card_power_off(chip, SD_CARD);
198 if (chip->sd_io) {
199 chip->sd_int = 0;
200 try_to_switch_sdio_ctrl(chip);
201 } else {
202 disable_card_clock(chip, SD_CARD);
203 }
204 }
205}
206
207void do_reset_xd_card(struct rtsx_chip *chip)
208{
209 int retval;
210
211 RTSX_DEBUGP("%s: %d, card2lun = 0x%x\n", __func__,
212 chip->xd_reset_counter, chip->card2lun[XD_CARD]);
213
214 if (chip->card2lun[XD_CARD] >= MAX_ALLOWED_LUN_CNT) {
215 clear_bit(XD_NR, &(chip->need_reset));
216 chip->xd_reset_counter = 0;
217 chip->xd_show_cnt = 0;
218 return;
219 }
220
221 chip->rw_fail_cnt[chip->card2lun[XD_CARD]] = 0;
222
223 rtsx_set_stat(chip, RTSX_STAT_RUN);
224 rtsx_write_register(chip, SDIO_CTRL, 0xFF, 0);
225
226 retval = reset_xd_card(chip);
227 if (chip->need_release & XD_CARD)
228 return;
229 if (retval == STATUS_SUCCESS) {
230 clear_bit(XD_NR, &(chip->need_reset));
231 chip->xd_reset_counter = 0;
232 chip->card_ready |= XD_CARD;
233 chip->card_fail &= ~XD_CARD;
234 chip->rw_card[chip->card2lun[XD_CARD]] = xd_rw;
235 } else {
236 if (chip->xd_reset_counter >= MAX_RESET_CNT) {
237 clear_bit(XD_NR, &(chip->need_reset));
238 chip->xd_reset_counter = 0;
239 chip->xd_show_cnt = 0;
240 } else {
241 chip->xd_reset_counter++;
242 }
243 chip->card_ready &= ~XD_CARD;
244 chip->card_fail |= XD_CARD;
245 chip->capacity[chip->card2lun[XD_CARD]] = 0;
246 chip->rw_card[chip->card2lun[XD_CARD]] = NULL;
247
248 rtsx_write_register(chip, CARD_OE, XD_OUTPUT_EN, 0);
249 if (!chip->ft2_fast_mode)
250 card_power_off(chip, XD_CARD);
251 disable_card_clock(chip, XD_CARD);
252 }
253}
254
255void do_reset_ms_card(struct rtsx_chip *chip)
256{
257 int retval;
258
259 RTSX_DEBUGP("%s: %d, card2lun = 0x%x\n", __func__,
260 chip->ms_reset_counter, chip->card2lun[MS_CARD]);
261
262 if (chip->card2lun[MS_CARD] >= MAX_ALLOWED_LUN_CNT) {
263 clear_bit(MS_NR, &(chip->need_reset));
264 chip->ms_reset_counter = 0;
265 chip->ms_show_cnt = 0;
266 return;
267 }
268
269 chip->rw_fail_cnt[chip->card2lun[MS_CARD]] = 0;
270
271 rtsx_set_stat(chip, RTSX_STAT_RUN);
272 rtsx_write_register(chip, SDIO_CTRL, 0xFF, 0);
273
274 retval = reset_ms_card(chip);
275 if (chip->need_release & MS_CARD)
276 return;
277 if (retval == STATUS_SUCCESS) {
278 clear_bit(MS_NR, &(chip->need_reset));
279 chip->ms_reset_counter = 0;
280 chip->card_ready |= MS_CARD;
281 chip->card_fail &= ~MS_CARD;
282 chip->rw_card[chip->card2lun[MS_CARD]] = ms_rw;
283 } else {
284 if (chip->ms_reset_counter >= MAX_RESET_CNT) {
285 clear_bit(MS_NR, &(chip->need_reset));
286 chip->ms_reset_counter = 0;
287 chip->ms_show_cnt = 0;
288 } else {
289 chip->ms_reset_counter++;
290 }
291 chip->card_ready &= ~MS_CARD;
292 chip->card_fail |= MS_CARD;
293 chip->capacity[chip->card2lun[MS_CARD]] = 0;
294 chip->rw_card[chip->card2lun[MS_CARD]] = NULL;
295
296 rtsx_write_register(chip, CARD_OE, MS_OUTPUT_EN, 0);
297 if (!chip->ft2_fast_mode)
298 card_power_off(chip, MS_CARD);
299 disable_card_clock(chip, MS_CARD);
300 }
301}
302
303static void release_sdio(struct rtsx_chip *chip)
304{
305 if (chip->sd_io) {
306 rtsx_write_register(chip, CARD_STOP, SD_STOP | SD_CLR_ERR,
307 SD_STOP | SD_CLR_ERR);
308
309 if (chip->chip_insert_with_sdio) {
310 chip->chip_insert_with_sdio = 0;
311
312 if (CHECK_PID(chip, 0x5288))
313 rtsx_write_register(chip, 0xFE5A, 0x08, 0x00);
314 else
315 rtsx_write_register(chip, 0xFE70, 0x80, 0x00);
316 }
317
318 rtsx_write_register(chip, SDIO_CTRL, SDIO_CD_CTRL, 0);
319 chip->sd_io = 0;
320 }
321}
322
323void rtsx_power_off_card(struct rtsx_chip *chip)
324{
325 if ((chip->card_ready & SD_CARD) || chip->sd_io) {
326 sd_cleanup_work(chip);
327 sd_power_off_card3v3(chip);
328 }
329
330 if (chip->card_ready & XD_CARD) {
331 xd_cleanup_work(chip);
332 xd_power_off_card3v3(chip);
333 }
334
335 if (chip->card_ready & MS_CARD) {
336 ms_cleanup_work(chip);
337 ms_power_off_card3v3(chip);
338 }
339}
340
341void rtsx_release_cards(struct rtsx_chip *chip)
342{
343 chip->int_reg = rtsx_readl(chip, RTSX_BIPR);
344
345 if ((chip->card_ready & SD_CARD) || chip->sd_io) {
346 if (chip->int_reg & SD_EXIST)
347 sd_cleanup_work(chip);
348 release_sd_card(chip);
349 }
350
351 if (chip->card_ready & XD_CARD) {
352 if (chip->int_reg & XD_EXIST)
353 xd_cleanup_work(chip);
354 release_xd_card(chip);
355 }
356
357 if (chip->card_ready & MS_CARD) {
358 if (chip->int_reg & MS_EXIST)
359 ms_cleanup_work(chip);
360 release_ms_card(chip);
361 }
362}
363
364void rtsx_reset_cards(struct rtsx_chip *chip)
365{
366 if (!chip->need_reset)
367 return;
368
369 rtsx_set_stat(chip, RTSX_STAT_RUN);
370
371 rtsx_force_power_on(chip, SSC_PDCTL | OC_PDCTL);
372
373 rtsx_disable_aspm(chip);
374
375 if ((chip->need_reset & SD_CARD) && chip->chip_insert_with_sdio)
376 clear_bit(SD_NR, &(chip->need_reset));
377
378 if (chip->need_reset & XD_CARD) {
379 chip->card_exist |= XD_CARD;
380
381 if (chip->xd_show_cnt >= MAX_SHOW_CNT)
382 do_reset_xd_card(chip);
383 else
384 chip->xd_show_cnt++;
385 }
386 if (CHECK_PID(chip, 0x5288) && CHECK_BARO_PKG(chip, QFN)) {
387 if (chip->card_exist & XD_CARD) {
388 clear_bit(SD_NR, &(chip->need_reset));
389 clear_bit(MS_NR, &(chip->need_reset));
390 }
391 }
392 if (chip->need_reset & SD_CARD) {
393 chip->card_exist |= SD_CARD;
394
395 if (chip->sd_show_cnt >= MAX_SHOW_CNT) {
396 rtsx_write_register(chip, RBCTL, RB_FLUSH, RB_FLUSH);
397 do_reset_sd_card(chip);
398 } else {
399 chip->sd_show_cnt++;
400 }
401 }
402 if (chip->need_reset & MS_CARD) {
403 chip->card_exist |= MS_CARD;
404
405 if (chip->ms_show_cnt >= MAX_SHOW_CNT)
406 do_reset_ms_card(chip);
407 else
408 chip->ms_show_cnt++;
409 }
410}
411
412void rtsx_reinit_cards(struct rtsx_chip *chip, int reset_chip)
413{
414 rtsx_set_stat(chip, RTSX_STAT_RUN);
415
416 rtsx_force_power_on(chip, SSC_PDCTL | OC_PDCTL);
417
418 if (reset_chip)
419 rtsx_reset_chip(chip);
420
421 chip->int_reg = rtsx_readl(chip, RTSX_BIPR);
422
423 if ((chip->int_reg & SD_EXIST) && (chip->need_reinit & SD_CARD)) {
424 release_sdio(chip);
425 release_sd_card(chip);
426
427 wait_timeout(100);
428
429 chip->card_exist |= SD_CARD;
430 do_reset_sd_card(chip);
431 }
432
433 if ((chip->int_reg & XD_EXIST) && (chip->need_reinit & XD_CARD)) {
434 release_xd_card(chip);
435
436 wait_timeout(100);
437
438 chip->card_exist |= XD_CARD;
439 do_reset_xd_card(chip);
440 }
441
442 if ((chip->int_reg & MS_EXIST) && (chip->need_reinit & MS_CARD)) {
443 release_ms_card(chip);
444
445 wait_timeout(100);
446
447 chip->card_exist |= MS_CARD;
448 do_reset_ms_card(chip);
449 }
450
451 chip->need_reinit = 0;
452}
453
454#ifdef DISABLE_CARD_INT
455void card_cd_debounce(struct rtsx_chip *chip, unsigned long *need_reset, unsigned long *need_release)
456{
457 u8 release_map = 0, reset_map = 0;
458
459 chip->int_reg = rtsx_readl(chip, RTSX_BIPR);
460
461 if (chip->card_exist) {
462 if (chip->card_exist & XD_CARD) {
463 if (!(chip->int_reg & XD_EXIST))
464 release_map |= XD_CARD;
465 } else if (chip->card_exist & SD_CARD) {
466 if (!(chip->int_reg & SD_EXIST))
467 release_map |= SD_CARD;
468 } else if (chip->card_exist & MS_CARD) {
469 if (!(chip->int_reg & MS_EXIST))
470 release_map |= MS_CARD;
471 }
472 } else {
473 if (chip->int_reg & XD_EXIST)
474 reset_map |= XD_CARD;
475 else if (chip->int_reg & SD_EXIST)
476 reset_map |= SD_CARD;
477 else if (chip->int_reg & MS_EXIST)
478 reset_map |= MS_CARD;
479 }
480
481 if (reset_map) {
482 int xd_cnt = 0, sd_cnt = 0, ms_cnt = 0;
483 int i;
484
485 for (i = 0; i < (DEBOUNCE_CNT); i++) {
486 chip->int_reg = rtsx_readl(chip, RTSX_BIPR);
487
488 if (chip->int_reg & XD_EXIST)
489 xd_cnt++;
490 else
491 xd_cnt = 0;
492
493 if (chip->int_reg & SD_EXIST)
494 sd_cnt++;
495 else
496 sd_cnt = 0;
497
498 if (chip->int_reg & MS_EXIST)
499 ms_cnt++;
500 else
501 ms_cnt = 0;
502
503 wait_timeout(30);
504 }
505
506 reset_map = 0;
507 if (!(chip->card_exist & XD_CARD) && (xd_cnt > (DEBOUNCE_CNT-1)))
508 reset_map |= XD_CARD;
509 if (!(chip->card_exist & SD_CARD) && (sd_cnt > (DEBOUNCE_CNT-1)))
510 reset_map |= SD_CARD;
511 if (!(chip->card_exist & MS_CARD) && (ms_cnt > (DEBOUNCE_CNT-1)))
512 reset_map |= MS_CARD;
513 }
514
515 if (CHECK_PID(chip, 0x5288) && CHECK_BARO_PKG(chip, QFN))
516 rtsx_write_register(chip, HOST_SLEEP_STATE, 0xC0, 0x00);
517
518 if (need_reset)
519 *need_reset = reset_map;
520 if (need_release)
521 *need_release = release_map;
522}
523#endif
524
525void rtsx_init_cards(struct rtsx_chip *chip)
526{
527 if (RTSX_TST_DELINK(chip) && (rtsx_get_stat(chip) != RTSX_STAT_SS)) {
528 RTSX_DEBUGP("Reset chip in polling thread!\n");
529 rtsx_reset_chip(chip);
530 RTSX_CLR_DELINK(chip);
531 }
532
533#ifdef DISABLE_CARD_INT
534 card_cd_debounce(chip, &(chip->need_reset), &(chip->need_release));
535#endif
536
537 if (chip->need_release) {
538 if (CHECK_PID(chip, 0x5288) && CHECK_BARO_PKG(chip, QFN)) {
539 if (chip->int_reg & XD_EXIST) {
540 clear_bit(SD_NR, &(chip->need_release));
541 clear_bit(MS_NR, &(chip->need_release));
542 }
543 }
544
545 if (!(chip->card_exist & SD_CARD) && !chip->sd_io)
546 clear_bit(SD_NR, &(chip->need_release));
547 if (!(chip->card_exist & XD_CARD))
548 clear_bit(XD_NR, &(chip->need_release));
549 if (!(chip->card_exist & MS_CARD))
550 clear_bit(MS_NR, &(chip->need_release));
551
552 RTSX_DEBUGP("chip->need_release = 0x%x\n", (unsigned int)(chip->need_release));
553
554#ifdef SUPPORT_OCP
555 if (chip->need_release) {
556 if (CHECK_PID(chip, 0x5209)) {
557 u8 mask = 0, val = 0;
558 if (CHECK_LUN_MODE(chip, SD_MS_2LUN)) {
559 if (chip->ocp_stat & (MS_OC_NOW | MS_OC_EVER)) {
560 mask |= MS_OCP_INT_CLR | MS_OC_CLR;
561 val |= MS_OCP_INT_CLR | MS_OC_CLR;
562 }
563 }
564 if (chip->ocp_stat & (SD_OC_NOW | SD_OC_EVER)) {
565 mask |= SD_OCP_INT_CLR | SD_OC_CLR;
566 val |= SD_OCP_INT_CLR | SD_OC_CLR;
567 }
568 if (mask)
569 rtsx_write_register(chip, OCPCTL, mask, val);
570 } else {
571 if (chip->ocp_stat & (CARD_OC_NOW | CARD_OC_EVER))
572 rtsx_write_register(chip, OCPCLR,
573 CARD_OC_INT_CLR | CARD_OC_CLR,
574 CARD_OC_INT_CLR | CARD_OC_CLR);
575 }
576 chip->ocp_stat = 0;
577 }
578#endif
579 if (chip->need_release) {
580 rtsx_set_stat(chip, RTSX_STAT_RUN);
581 rtsx_force_power_on(chip, SSC_PDCTL | OC_PDCTL);
582 }
583
584 if (chip->need_release & SD_CARD) {
585 clear_bit(SD_NR, &(chip->need_release));
586 chip->card_exist &= ~SD_CARD;
587 chip->card_ejected &= ~SD_CARD;
588 chip->card_fail &= ~SD_CARD;
589 CLR_BIT(chip->lun_mc, chip->card2lun[SD_CARD]);
590 chip->rw_fail_cnt[chip->card2lun[SD_CARD]] = 0;
591 rtsx_write_register(chip, RBCTL, RB_FLUSH, RB_FLUSH);
592
593 release_sdio(chip);
594 release_sd_card(chip);
595 }
596
597 if (chip->need_release & XD_CARD) {
598 clear_bit(XD_NR, &(chip->need_release));
599 chip->card_exist &= ~XD_CARD;
600 chip->card_ejected &= ~XD_CARD;
601 chip->card_fail &= ~XD_CARD;
602 CLR_BIT(chip->lun_mc, chip->card2lun[XD_CARD]);
603 chip->rw_fail_cnt[chip->card2lun[XD_CARD]] = 0;
604
605 release_xd_card(chip);
606
607 if (CHECK_PID(chip, 0x5288) && CHECK_BARO_PKG(chip, QFN))
608 rtsx_write_register(chip, HOST_SLEEP_STATE, 0xC0, 0xC0);
609 }
610
611 if (chip->need_release & MS_CARD) {
612 clear_bit(MS_NR, &(chip->need_release));
613 chip->card_exist &= ~MS_CARD;
614 chip->card_ejected &= ~MS_CARD;
615 chip->card_fail &= ~MS_CARD;
616 CLR_BIT(chip->lun_mc, chip->card2lun[MS_CARD]);
617 chip->rw_fail_cnt[chip->card2lun[MS_CARD]] = 0;
618
619 release_ms_card(chip);
620 }
621
622 RTSX_DEBUGP("chip->card_exist = 0x%x\n", chip->card_exist);
623
624 if (!chip->card_exist)
625 turn_off_led(chip, LED_GPIO);
626 }
627
628 if (chip->need_reset) {
629 RTSX_DEBUGP("chip->need_reset = 0x%x\n", (unsigned int)(chip->need_reset));
630
631 rtsx_reset_cards(chip);
632 }
633
634 if (chip->need_reinit) {
635 RTSX_DEBUGP("chip->need_reinit = 0x%x\n", (unsigned int)(chip->need_reinit));
636
637 rtsx_reinit_cards(chip, 0);
638 }
639}
640
641static inline u8 double_depth(u8 depth)
642{
643 return ((depth > 1) ? (depth - 1) : depth);
644}
645
646int switch_ssc_clock(struct rtsx_chip *chip, int clk)
647{
648 struct sd_info *sd_card = &(chip->sd_card);
649 struct ms_info *ms_card = &(chip->ms_card);
650 int retval;
651 u8 N = (u8)(clk - 2), min_N, max_N;
652 u8 mcu_cnt, div, max_div, ssc_depth, ssc_depth_mask;
653 int sd_vpclk_phase_reset = 0;
654
655 if (chip->cur_clk == clk)
656 return STATUS_SUCCESS;
657
658 if (CHECK_PID(chip, 0x5209)) {
659 min_N = 80;
660 max_N = 208;
661 max_div = CLK_DIV_8;
662 } else {
663 min_N = 60;
664 max_N = 120;
665 max_div = CLK_DIV_4;
666 }
667
668 if (CHECK_PID(chip, 0x5209) && (chip->cur_card == SD_CARD)) {
669 struct sd_info *sd_card = &(chip->sd_card);
670 if (CHK_SD30_SPEED(sd_card) || CHK_MMC_DDR52(sd_card))
671 sd_vpclk_phase_reset = 1;
672 }
673
674 RTSX_DEBUGP("Switch SSC clock to %dMHz (cur_clk = %d)\n", clk, chip->cur_clk);
675
676 if ((clk <= 2) || (N > max_N))
677 TRACE_RET(chip, STATUS_FAIL);
678
679 mcu_cnt = (u8)(125/clk + 3);
680 if (CHECK_PID(chip, 0x5209)) {
681 if (mcu_cnt > 15)
682 mcu_cnt = 15;
683 } else {
684 if (mcu_cnt > 7)
685 mcu_cnt = 7;
686 }
687
688 div = CLK_DIV_1;
689 while ((N < min_N) && (div < max_div)) {
690 N = (N + 2) * 2 - 2;
691 div++;
692 }
693 RTSX_DEBUGP("N = %d, div = %d\n", N, div);
694
695 if (chip->ssc_en) {
696 if (CHECK_PID(chip, 0x5209)) {
697 if (chip->cur_card == SD_CARD) {
698 if (CHK_SD_SDR104(sd_card))
699 ssc_depth = chip->ssc_depth_sd_sdr104;
700 else if (CHK_SD_SDR50(sd_card))
701 ssc_depth = chip->ssc_depth_sd_sdr50;
702 else if (CHK_SD_DDR50(sd_card))
703 ssc_depth = double_depth(chip->ssc_depth_sd_ddr50);
704 else if (CHK_SD_HS(sd_card))
705 ssc_depth = double_depth(chip->ssc_depth_sd_hs);
706 else if (CHK_MMC_52M(sd_card) || CHK_MMC_DDR52(sd_card))
707 ssc_depth = double_depth(chip->ssc_depth_mmc_52m);
708 else
709 ssc_depth = double_depth(chip->ssc_depth_low_speed);
710 } else if (chip->cur_card == MS_CARD) {
711 if (CHK_MSPRO(ms_card)) {
712 if (CHK_HG8BIT(ms_card))
713 ssc_depth = double_depth(chip->ssc_depth_ms_hg);
714 else
715 ssc_depth = double_depth(chip->ssc_depth_ms_4bit);
716 } else {
717 if (CHK_MS4BIT(ms_card))
718 ssc_depth = double_depth(chip->ssc_depth_ms_4bit);
719 else
720 ssc_depth = double_depth(chip->ssc_depth_low_speed);
721 }
722 } else {
723 ssc_depth = double_depth(chip->ssc_depth_low_speed);
724 }
725
726 if (ssc_depth) {
727 if (div == CLK_DIV_2) {
728 if (ssc_depth > 1)
729 ssc_depth -= 1;
730 else
731 ssc_depth = SSC_DEPTH_4M;
732
733 } else if (div == CLK_DIV_4) {
734 if (ssc_depth > 2)
735 ssc_depth -= 2;
736 else
737 ssc_depth = SSC_DEPTH_4M;
738
739 } else if (div == CLK_DIV_8) {
740 if (ssc_depth > 3)
741 ssc_depth -= 3;
742 else
743 ssc_depth = SSC_DEPTH_4M;
744
745 }
746 }
747 } else {
748 ssc_depth = 0x01;
749 N -= 2;
750 }
751 } else {
752 ssc_depth = 0;
753 }
754
755 if (CHECK_PID(chip, 0x5209))
756 ssc_depth_mask = SSC_DEPTH_MASK;
757 else
758 ssc_depth_mask = 0x03;
759
760 RTSX_DEBUGP("ssc_depth = %d\n", ssc_depth);
761
762 rtsx_init_cmd(chip);
763 rtsx_add_cmd(chip, WRITE_REG_CMD, CLK_CTL, CLK_LOW_FREQ, CLK_LOW_FREQ);
764 rtsx_add_cmd(chip, WRITE_REG_CMD, CLK_DIV, 0xFF, (div << 4) | mcu_cnt);
765 rtsx_add_cmd(chip, WRITE_REG_CMD, SSC_CTL1, SSC_RSTB, 0);
766 rtsx_add_cmd(chip, WRITE_REG_CMD, SSC_CTL2, ssc_depth_mask, ssc_depth);
767 rtsx_add_cmd(chip, WRITE_REG_CMD, SSC_DIV_N_0, 0xFF, N);
768 rtsx_add_cmd(chip, WRITE_REG_CMD, SSC_CTL1, SSC_RSTB, SSC_RSTB);
769 if (sd_vpclk_phase_reset) {
770 rtsx_add_cmd(chip, WRITE_REG_CMD, SD_VPCLK0_CTL, PHASE_NOT_RESET, 0);
771 rtsx_add_cmd(chip, WRITE_REG_CMD, SD_VPCLK0_CTL, PHASE_NOT_RESET, PHASE_NOT_RESET);
772 }
773
774 retval = rtsx_send_cmd(chip, 0, WAIT_TIME);
775 if (retval < 0)
776 TRACE_RET(chip, STATUS_ERROR);
777
778 udelay(10);
779 RTSX_WRITE_REG(chip, CLK_CTL, CLK_LOW_FREQ, 0);
780
781 chip->cur_clk = clk;
782
783 return STATUS_SUCCESS;
784}
785
786int switch_normal_clock(struct rtsx_chip *chip, int clk)
787{
788 u8 sel, div, mcu_cnt;
789 int sd_vpclk_phase_reset = 0;
790
791 if (chip->cur_clk == clk)
792 return STATUS_SUCCESS;
793
794 if (CHECK_PID(chip, 0x5209) && (chip->cur_card == SD_CARD)) {
795 struct sd_info *sd_card = &(chip->sd_card);
796 if (CHK_SD30_SPEED(sd_card) || CHK_MMC_DDR52(sd_card))
797 sd_vpclk_phase_reset = 1;
798 }
799
800 switch (clk) {
801 case CLK_20:
802 RTSX_DEBUGP("Switch clock to 20MHz\n");
803 sel = SSC_80;
804 div = CLK_DIV_4;
805 mcu_cnt = 7;
806 break;
807
808 case CLK_30:
809 RTSX_DEBUGP("Switch clock to 30MHz\n");
810 sel = SSC_120;
811 div = CLK_DIV_4;
812 mcu_cnt = 7;
813 break;
814
815 case CLK_40:
816 RTSX_DEBUGP("Switch clock to 40MHz\n");
817 sel = SSC_80;
818 div = CLK_DIV_2;
819 mcu_cnt = 7;
820 break;
821
822 case CLK_50:
823 RTSX_DEBUGP("Switch clock to 50MHz\n");
824 sel = SSC_100;
825 div = CLK_DIV_2;
826 mcu_cnt = 6;
827 break;
828
829 case CLK_60:
830 RTSX_DEBUGP("Switch clock to 60MHz\n");
831 sel = SSC_120;
832 div = CLK_DIV_2;
833 mcu_cnt = 6;
834 break;
835
836 case CLK_80:
837 RTSX_DEBUGP("Switch clock to 80MHz\n");
838 sel = SSC_80;
839 div = CLK_DIV_1;
840 mcu_cnt = 5;
841 break;
842
843 case CLK_100:
844 RTSX_DEBUGP("Switch clock to 100MHz\n");
845 sel = SSC_100;
846 div = CLK_DIV_1;
847 mcu_cnt = 5;
848 break;
849
850 case CLK_120:
851 RTSX_DEBUGP("Switch clock to 120MHz\n");
852 sel = SSC_120;
853 div = CLK_DIV_1;
854 mcu_cnt = 5;
855 break;
856
857 case CLK_150:
858 RTSX_DEBUGP("Switch clock to 150MHz\n");
859 sel = SSC_150;
860 div = CLK_DIV_1;
861 mcu_cnt = 4;
862 break;
863
864 case CLK_200:
865 RTSX_DEBUGP("Switch clock to 200MHz\n");
866 sel = SSC_200;
867 div = CLK_DIV_1;
868 mcu_cnt = 4;
869 break;
870
871 default:
872 RTSX_DEBUGP("Try to switch to an illegal clock (%d)\n", clk);
873 TRACE_RET(chip, STATUS_FAIL);
874 }
875
876 RTSX_WRITE_REG(chip, CLK_CTL, 0xFF, CLK_LOW_FREQ);
877 if (sd_vpclk_phase_reset) {
878 RTSX_WRITE_REG(chip, SD_VPCLK0_CTL, PHASE_NOT_RESET, 0);
879 RTSX_WRITE_REG(chip, SD_VPCLK1_CTL, PHASE_NOT_RESET, 0);
880 }
881 RTSX_WRITE_REG(chip, CLK_DIV, 0xFF, (div << 4) | mcu_cnt);
882 RTSX_WRITE_REG(chip, CLK_SEL, 0xFF, sel);
883
884 if (sd_vpclk_phase_reset) {
885 udelay(200);
886 RTSX_WRITE_REG(chip, SD_VPCLK0_CTL, PHASE_NOT_RESET, PHASE_NOT_RESET);
887 RTSX_WRITE_REG(chip, SD_VPCLK1_CTL, PHASE_NOT_RESET, PHASE_NOT_RESET);
888 udelay(200);
889 }
890 RTSX_WRITE_REG(chip, CLK_CTL, 0xFF, 0);
891
892 chip->cur_clk = clk;
893
894 return STATUS_SUCCESS;
895}
896
897void trans_dma_enable(enum dma_data_direction dir, struct rtsx_chip *chip, u32 byte_cnt, u8 pack_size)
898{
899 if (pack_size > DMA_1024)
900 pack_size = DMA_512;
901
902 rtsx_add_cmd(chip, WRITE_REG_CMD, IRQSTAT0, DMA_DONE_INT, DMA_DONE_INT);
903
904 rtsx_add_cmd(chip, WRITE_REG_CMD, DMATC3, 0xFF, (u8)(byte_cnt >> 24));
905 rtsx_add_cmd(chip, WRITE_REG_CMD, DMATC2, 0xFF, (u8)(byte_cnt >> 16));
906 rtsx_add_cmd(chip, WRITE_REG_CMD, DMATC1, 0xFF, (u8)(byte_cnt >> 8));
907 rtsx_add_cmd(chip, WRITE_REG_CMD, DMATC0, 0xFF, (u8)byte_cnt);
908
909 if (dir == DMA_FROM_DEVICE) {
910 rtsx_add_cmd(chip, WRITE_REG_CMD, DMACTL, 0x03 | DMA_PACK_SIZE_MASK,
911 DMA_DIR_FROM_CARD | DMA_EN | pack_size);
912 } else {
913 rtsx_add_cmd(chip, WRITE_REG_CMD, DMACTL, 0x03 | DMA_PACK_SIZE_MASK,
914 DMA_DIR_TO_CARD | DMA_EN | pack_size);
915 }
916
917 rtsx_add_cmd(chip, WRITE_REG_CMD, CARD_DATA_SOURCE, 0x01, RING_BUFFER);
918}
919
920int enable_card_clock(struct rtsx_chip *chip, u8 card)
921{
922 u8 clk_en = 0;
923
924 if (card & XD_CARD)
925 clk_en |= XD_CLK_EN;
926 if (card & SD_CARD)
927 clk_en |= SD_CLK_EN;
928 if (card & MS_CARD)
929 clk_en |= MS_CLK_EN;
930
931 RTSX_WRITE_REG(chip, CARD_CLK_EN, clk_en, clk_en);
932
933 return STATUS_SUCCESS;
934}
935
936int disable_card_clock(struct rtsx_chip *chip, u8 card)
937{
938 u8 clk_en = 0;
939
940 if (card & XD_CARD)
941 clk_en |= XD_CLK_EN;
942 if (card & SD_CARD)
943 clk_en |= SD_CLK_EN;
944 if (card & MS_CARD)
945 clk_en |= MS_CLK_EN;
946
947 RTSX_WRITE_REG(chip, CARD_CLK_EN, clk_en, 0);
948
949 return STATUS_SUCCESS;
950}
951
952int card_power_on(struct rtsx_chip *chip, u8 card)
953{
954 int retval;
955 u8 mask, val1, val2;
956
957 if (CHECK_LUN_MODE(chip, SD_MS_2LUN) && (card == MS_CARD)) {
958 mask = MS_POWER_MASK;
959 val1 = MS_PARTIAL_POWER_ON;
960 val2 = MS_POWER_ON;
961 } else {
962 mask = SD_POWER_MASK;
963 val1 = SD_PARTIAL_POWER_ON;
964 val2 = SD_POWER_ON;
965 }
966
967 rtsx_init_cmd(chip);
968 rtsx_add_cmd(chip, WRITE_REG_CMD, CARD_PWR_CTL, mask, val1);
969 if (CHECK_PID(chip, 0x5209) && (card == SD_CARD))
970 rtsx_add_cmd(chip, WRITE_REG_CMD, PWR_GATE_CTRL, LDO3318_PWR_MASK, LDO_SUSPEND);
971
972 retval = rtsx_send_cmd(chip, 0, 100);
973 if (retval != STATUS_SUCCESS)
974 TRACE_RET(chip, STATUS_FAIL);
975
976 udelay(chip->pmos_pwr_on_interval);
977
978 rtsx_init_cmd(chip);
979 rtsx_add_cmd(chip, WRITE_REG_CMD, CARD_PWR_CTL, mask, val2);
980 if (CHECK_PID(chip, 0x5209) && (card == SD_CARD))
981 rtsx_add_cmd(chip, WRITE_REG_CMD, PWR_GATE_CTRL, LDO3318_PWR_MASK, LDO_ON);
982
983 retval = rtsx_send_cmd(chip, 0, 100);
984 if (retval != STATUS_SUCCESS)
985 TRACE_RET(chip, STATUS_FAIL);
986
987 return STATUS_SUCCESS;
988}
989
990int card_power_off(struct rtsx_chip *chip, u8 card)
991{
992 u8 mask, val;
993
994 if (CHECK_LUN_MODE(chip, SD_MS_2LUN) && (card == MS_CARD)) {
995 mask = MS_POWER_MASK;
996 val = MS_POWER_OFF;
997 } else {
998 mask = SD_POWER_MASK;
999 val = SD_POWER_OFF;
1000 }
1001 if (CHECK_PID(chip, 0x5209)) {
1002 mask |= PMOS_STRG_MASK;
1003 val |= PMOS_STRG_400mA;
1004 }
1005
1006 RTSX_WRITE_REG(chip, CARD_PWR_CTL, mask, val);
1007 if (CHECK_PID(chip, 0x5209) && (card == SD_CARD))
1008 RTSX_WRITE_REG(chip, PWR_GATE_CTRL, LDO3318_PWR_MASK, LDO_OFF);
1009
1010 return STATUS_SUCCESS;
1011}
1012
1013int card_rw(struct scsi_cmnd *srb, struct rtsx_chip *chip, u32 sec_addr, u16 sec_cnt)
1014{
1015 int retval;
1016 unsigned int lun = SCSI_LUN(srb);
1017 int i;
1018
1019 if (chip->rw_card[lun] == NULL)
1020 TRACE_RET(chip, STATUS_FAIL);
1021
1022 for (i = 0; i < 3; i++) {
1023 chip->rw_need_retry = 0;
1024
1025 retval = chip->rw_card[lun](srb, chip, sec_addr, sec_cnt);
1026 if (retval != STATUS_SUCCESS) {
1027 if (rtsx_check_chip_exist(chip) != STATUS_SUCCESS) {
1028 rtsx_release_chip(chip);
1029 TRACE_RET(chip, STATUS_FAIL);
1030 }
1031 if (detect_card_cd(chip, chip->cur_card) != STATUS_SUCCESS)
1032 TRACE_RET(chip, STATUS_FAIL);
1033
1034 if (!chip->rw_need_retry) {
1035 RTSX_DEBUGP("RW fail, but no need to retry\n");
1036 break;
1037 }
1038 } else {
1039 chip->rw_need_retry = 0;
1040 break;
1041 }
1042
1043 RTSX_DEBUGP("Retry RW, (i = %d)\n", i);
1044 }
1045
1046 return retval;
1047}
1048
1049int card_share_mode(struct rtsx_chip *chip, int card)
1050{
1051 u8 mask, value;
1052
1053 if (CHECK_PID(chip, 0x5209) || CHECK_PID(chip, 0x5208)) {
1054 mask = CARD_SHARE_MASK;
1055 if (card == SD_CARD)
1056 value = CARD_SHARE_48_SD;
1057 else if (card == MS_CARD)
1058 value = CARD_SHARE_48_MS;
1059 else if (card == XD_CARD)
1060 value = CARD_SHARE_48_XD;
1061 else
1062 TRACE_RET(chip, STATUS_FAIL);
1063
1064 } else if (CHECK_PID(chip, 0x5288)) {
1065 mask = 0x03;
1066 if (card == SD_CARD)
1067 value = CARD_SHARE_BAROSSA_SD;
1068 else if (card == MS_CARD)
1069 value = CARD_SHARE_BAROSSA_MS;
1070 else if (card == XD_CARD)
1071 value = CARD_SHARE_BAROSSA_XD;
1072 else
1073 TRACE_RET(chip, STATUS_FAIL);
1074
1075 } else {
1076 TRACE_RET(chip, STATUS_FAIL);
1077 }
1078
1079 RTSX_WRITE_REG(chip, CARD_SHARE_MODE, mask, value);
1080
1081 return STATUS_SUCCESS;
1082}
1083
1084
1085int select_card(struct rtsx_chip *chip, int card)
1086{
1087 int retval;
1088
1089 if (chip->cur_card != card) {
1090 u8 mod;
1091
1092 if (card == SD_CARD)
1093 mod = SD_MOD_SEL;
1094 else if (card == MS_CARD)
1095 mod = MS_MOD_SEL;
1096 else if (card == XD_CARD)
1097 mod = XD_MOD_SEL;
1098 else if (card == SPI_CARD)
1099 mod = SPI_MOD_SEL;
1100 else
1101 TRACE_RET(chip, STATUS_FAIL);
1102
1103 RTSX_WRITE_REG(chip, CARD_SELECT, 0x07, mod);
1104 chip->cur_card = card;
1105
1106 retval = card_share_mode(chip, card);
1107 if (retval != STATUS_SUCCESS)
1108 TRACE_RET(chip, STATUS_FAIL);
1109 }
1110
1111 return STATUS_SUCCESS;
1112}
1113
1114void toggle_gpio(struct rtsx_chip *chip, u8 gpio)
1115{
1116 u8 temp_reg;
1117
1118 rtsx_read_register(chip, CARD_GPIO, &temp_reg);
1119 temp_reg ^= (0x01 << gpio);
1120 rtsx_write_register(chip, CARD_GPIO, 0xFF, temp_reg);
1121}
1122
1123void turn_on_led(struct rtsx_chip *chip, u8 gpio)
1124{
1125 if (CHECK_PID(chip, 0x5288))
1126 rtsx_write_register(chip, CARD_GPIO, (u8)(1 << gpio), (u8)(1 << gpio));
1127 else
1128 rtsx_write_register(chip, CARD_GPIO, (u8)(1 << gpio), 0);
1129}
1130
1131void turn_off_led(struct rtsx_chip *chip, u8 gpio)
1132{
1133 if (CHECK_PID(chip, 0x5288))
1134 rtsx_write_register(chip, CARD_GPIO, (u8)(1 << gpio), 0);
1135 else
1136 rtsx_write_register(chip, CARD_GPIO, (u8)(1 << gpio), (u8)(1 << gpio));
1137}
1138
1139int detect_card_cd(struct rtsx_chip *chip, int card)
1140{
1141 u32 card_cd, status;
1142
1143 if (card == SD_CARD) {
1144 card_cd = SD_EXIST;
1145 } else if (card == MS_CARD) {
1146 card_cd = MS_EXIST;
1147 } else if (card == XD_CARD) {
1148 card_cd = XD_EXIST;
1149 } else {
1150 RTSX_DEBUGP("Wrong card type: 0x%x\n", card);
1151 TRACE_RET(chip, STATUS_FAIL);
1152 }
1153
1154 status = rtsx_readl(chip, RTSX_BIPR);
1155 if (!(status & card_cd))
1156 TRACE_RET(chip, STATUS_FAIL);
1157
1158 return STATUS_SUCCESS;
1159}
1160
1161int check_card_exist(struct rtsx_chip *chip, unsigned int lun)
1162{
1163 if (chip->card_exist & chip->lun2card[lun])
1164 return 1;
1165
1166 return 0;
1167}
1168
1169int check_card_ready(struct rtsx_chip *chip, unsigned int lun)
1170{
1171 if (chip->card_ready & chip->lun2card[lun])
1172 return 1;
1173
1174 return 0;
1175}
1176
1177int check_card_wp(struct rtsx_chip *chip, unsigned int lun)
1178{
1179 if (chip->card_wp & chip->lun2card[lun])
1180 return 1;
1181
1182 return 0;
1183}
1184
1185int check_card_fail(struct rtsx_chip *chip, unsigned int lun)
1186{
1187 if (chip->card_fail & chip->lun2card[lun])
1188 return 1;
1189
1190 return 0;
1191}
1192
1193int check_card_ejected(struct rtsx_chip *chip, unsigned int lun)
1194{
1195 if (chip->card_ejected & chip->lun2card[lun])
1196 return 1;
1197
1198 return 0;
1199}
1200
1201u8 get_lun_card(struct rtsx_chip *chip, unsigned int lun)
1202{
1203 if ((chip->card_ready & chip->lun2card[lun]) == XD_CARD)
1204 return (u8)XD_CARD;
1205 else if ((chip->card_ready & chip->lun2card[lun]) == SD_CARD)
1206 return (u8)SD_CARD;
1207 else if ((chip->card_ready & chip->lun2card[lun]) == MS_CARD)
1208 return (u8)MS_CARD;
1209
1210 return 0;
1211}
1212
1213void eject_card(struct rtsx_chip *chip, unsigned int lun)
1214{
1215 do_remaining_work(chip);
1216
1217 if ((chip->card_ready & chip->lun2card[lun]) == SD_CARD) {
1218 release_sd_card(chip);
1219 chip->card_ejected |= SD_CARD;
1220 chip->card_ready &= ~SD_CARD;
1221 chip->capacity[lun] = 0;
1222 } else if ((chip->card_ready & chip->lun2card[lun]) == XD_CARD) {
1223 release_xd_card(chip);
1224 chip->card_ejected |= XD_CARD;
1225 chip->card_ready &= ~XD_CARD;
1226 chip->capacity[lun] = 0;
1227 } else if ((chip->card_ready & chip->lun2card[lun]) == MS_CARD) {
1228 release_ms_card(chip);
1229 chip->card_ejected |= MS_CARD;
1230 chip->card_ready &= ~MS_CARD;
1231 chip->capacity[lun] = 0;
1232 }
1233}
diff --git a/drivers/staging/rts_pstor/rtsx_card.h b/drivers/staging/rts_pstor/rtsx_card.h
deleted file mode 100644
index 3f7277676208..000000000000
--- a/drivers/staging/rts_pstor/rtsx_card.h
+++ /dev/null
@@ -1,1093 +0,0 @@
1/* Driver for Realtek PCI-Express card reader
2 * Header file
3 *
4 * Copyright(c) 2009 Realtek Semiconductor Corp. All rights reserved.
5 *
6 * This program is free software; you can redistribute it and/or modify it
7 * under the terms of the GNU General Public License as published by the
8 * Free Software Foundation; either version 2, or (at your option) any
9 * later version.
10 *
11 * This program is distributed in the hope that it will be useful, but
12 * WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
14 * General Public License for more details.
15 *
16 * You should have received a copy of the GNU General Public License along
17 * with this program; if not, see <http://www.gnu.org/licenses/>.
18 *
19 * Author:
20 * wwang (wei_wang@realsil.com.cn)
21 * No. 450, Shenhu Road, Suzhou Industry Park, Suzhou, China
22 */
23
24#ifndef __REALTEK_RTSX_CARD_H
25#define __REALTEK_RTSX_CARD_H
26
27#include "debug.h"
28#include "rtsx.h"
29#include "rtsx_chip.h"
30#include "rtsx_transport.h"
31#include "sd.h"
32
33#define SSC_POWER_DOWN 0x01
34#define SD_OC_POWER_DOWN 0x02
35#define MS_OC_POWER_DOWN 0x04
36#define ALL_POWER_DOWN 0x07
37#define OC_POWER_DOWN 0x06
38
39#define PMOS_STRG_MASK 0x10
40#define PMOS_STRG_800mA 0x10
41#define PMOS_STRG_400mA 0x00
42
43#define POWER_OFF 0x03
44#define PARTIAL_POWER_ON 0x01
45#define POWER_ON 0x00
46
47#define MS_POWER_OFF 0x0C
48#define MS_PARTIAL_POWER_ON 0x04
49#define MS_POWER_ON 0x00
50#define MS_POWER_MASK 0x0C
51
52#define SD_POWER_OFF 0x03
53#define SD_PARTIAL_POWER_ON 0x01
54#define SD_POWER_ON 0x00
55#define SD_POWER_MASK 0x03
56
57#define XD_OUTPUT_EN 0x02
58#define SD_OUTPUT_EN 0x04
59#define MS_OUTPUT_EN 0x08
60#define SPI_OUTPUT_EN 0x10
61
62#define CLK_LOW_FREQ 0x01
63
64#define CLK_DIV_1 0x01
65#define CLK_DIV_2 0x02
66#define CLK_DIV_4 0x03
67#define CLK_DIV_8 0x04
68
69#define SSC_80 0
70#define SSC_100 1
71#define SSC_120 2
72#define SSC_150 3
73#define SSC_200 4
74
75#define XD_CLK_EN 0x02
76#define SD_CLK_EN 0x04
77#define MS_CLK_EN 0x08
78#define SPI_CLK_EN 0x10
79
80#define XD_MOD_SEL 1
81#define SD_MOD_SEL 2
82#define MS_MOD_SEL 3
83#define SPI_MOD_SEL 4
84
85#define CHANGE_CLK 0x01
86
87#define SD_CRC7_ERR 0x80
88#define SD_CRC16_ERR 0x40
89#define SD_CRC_WRITE_ERR 0x20
90#define SD_CRC_WRITE_ERR_MASK 0x1C
91#define GET_CRC_TIME_OUT 0x02
92#define SD_TUNING_COMPARE_ERR 0x01
93
94#define SD_RSP_80CLK_TIMEOUT 0x01
95
96#define SD_CLK_TOGGLE_EN 0x80
97#define SD_CLK_FORCE_STOP 0x40
98#define SD_DAT3_STATUS 0x10
99#define SD_DAT2_STATUS 0x08
100#define SD_DAT1_STATUS 0x04
101#define SD_DAT0_STATUS 0x02
102#define SD_CMD_STATUS 0x01
103
104#define SD_IO_USING_1V8 0x80
105#define SD_IO_USING_3V3 0x7F
106#define TYPE_A_DRIVING 0x00
107#define TYPE_B_DRIVING 0x01
108#define TYPE_C_DRIVING 0x02
109#define TYPE_D_DRIVING 0x03
110
111#define DDR_FIX_RX_DAT 0x00
112#define DDR_VAR_RX_DAT 0x80
113#define DDR_FIX_RX_DAT_EDGE 0x00
114#define DDR_FIX_RX_DAT_14_DELAY 0x40
115#define DDR_FIX_RX_CMD 0x00
116#define DDR_VAR_RX_CMD 0x20
117#define DDR_FIX_RX_CMD_POS_EDGE 0x00
118#define DDR_FIX_RX_CMD_14_DELAY 0x10
119#define SD20_RX_POS_EDGE 0x00
120#define SD20_RX_14_DELAY 0x08
121#define SD20_RX_SEL_MASK 0x08
122
123#define DDR_FIX_TX_CMD_DAT 0x00
124#define DDR_VAR_TX_CMD_DAT 0x80
125#define DDR_FIX_TX_DAT_14_TSU 0x00
126#define DDR_FIX_TX_DAT_12_TSU 0x40
127#define DDR_FIX_TX_CMD_NEG_EDGE 0x00
128#define DDR_FIX_TX_CMD_14_AHEAD 0x20
129#define SD20_TX_NEG_EDGE 0x00
130#define SD20_TX_14_AHEAD 0x10
131#define SD20_TX_SEL_MASK 0x10
132#define DDR_VAR_SDCLK_POL_SWAP 0x01
133
134#define SD_TRANSFER_START 0x80
135#define SD_TRANSFER_END 0x40
136#define SD_STAT_IDLE 0x20
137#define SD_TRANSFER_ERR 0x10
138#define SD_TM_NORMAL_WRITE 0x00
139#define SD_TM_AUTO_WRITE_3 0x01
140#define SD_TM_AUTO_WRITE_4 0x02
141#define SD_TM_AUTO_READ_3 0x05
142#define SD_TM_AUTO_READ_4 0x06
143#define SD_TM_CMD_RSP 0x08
144#define SD_TM_AUTO_WRITE_1 0x09
145#define SD_TM_AUTO_WRITE_2 0x0A
146#define SD_TM_NORMAL_READ 0x0C
147#define SD_TM_AUTO_READ_1 0x0D
148#define SD_TM_AUTO_READ_2 0x0E
149#define SD_TM_AUTO_TUNING 0x0F
150
151#define PHASE_CHANGE 0x80
152#define PHASE_NOT_RESET 0x40
153
154#define DCMPS_CHANGE 0x80
155#define DCMPS_CHANGE_DONE 0x40
156#define DCMPS_ERROR 0x20
157#define DCMPS_CURRENT_PHASE 0x1F
158
159#define SD_CLK_DIVIDE_0 0x00
160#define SD_CLK_DIVIDE_256 0xC0
161#define SD_CLK_DIVIDE_128 0x80
162#define SD_BUS_WIDTH_1 0x00
163#define SD_BUS_WIDTH_4 0x01
164#define SD_BUS_WIDTH_8 0x02
165#define SD_ASYNC_FIFO_NOT_RST 0x10
166#define SD_20_MODE 0x00
167#define SD_DDR_MODE 0x04
168#define SD_30_MODE 0x08
169
170#define SD_CLK_DIVIDE_MASK 0xC0
171
172#define SD_CMD_IDLE 0x80
173
174#define SD_DATA_IDLE 0x80
175
176#define DCM_RESET 0x08
177#define DCM_LOCKED 0x04
178#define DCM_208M 0x00
179#define DCM_TX 0x01
180#define DCM_RX 0x02
181
182#define DRP_START 0x80
183#define DRP_DONE 0x40
184
185#define DRP_WRITE 0x80
186#define DRP_READ 0x00
187#define DCM_WRITE_ADDRESS_50 0x50
188#define DCM_WRITE_ADDRESS_51 0x51
189#define DCM_READ_ADDRESS_00 0x00
190#define DCM_READ_ADDRESS_51 0x51
191
192#define SD_CALCULATE_CRC7 0x00
193#define SD_NO_CALCULATE_CRC7 0x80
194#define SD_CHECK_CRC16 0x00
195#define SD_NO_CHECK_CRC16 0x40
196#define SD_NO_CHECK_WAIT_CRC_TO 0x20
197#define SD_WAIT_BUSY_END 0x08
198#define SD_NO_WAIT_BUSY_END 0x00
199#define SD_CHECK_CRC7 0x00
200#define SD_NO_CHECK_CRC7 0x04
201#define SD_RSP_LEN_0 0x00
202#define SD_RSP_LEN_6 0x01
203#define SD_RSP_LEN_17 0x02
204#define SD_RSP_TYPE_R0 0x04
205#define SD_RSP_TYPE_R1 0x01
206#define SD_RSP_TYPE_R1b 0x09
207#define SD_RSP_TYPE_R2 0x02
208#define SD_RSP_TYPE_R3 0x05
209#define SD_RSP_TYPE_R4 0x05
210#define SD_RSP_TYPE_R5 0x01
211#define SD_RSP_TYPE_R6 0x01
212#define SD_RSP_TYPE_R7 0x01
213
214#define SD_RSP_80CLK_TIMEOUT_EN 0x01
215
216#define SAMPLE_TIME_RISING 0x00
217#define SAMPLE_TIME_FALLING 0x80
218#define PUSH_TIME_DEFAULT 0x00
219#define PUSH_TIME_ODD 0x40
220#define NO_EXTEND_TOGGLE 0x00
221#define EXTEND_TOGGLE_CHK 0x20
222#define MS_BUS_WIDTH_1 0x00
223#define MS_BUS_WIDTH_4 0x10
224#define MS_BUS_WIDTH_8 0x18
225#define MS_2K_SECTOR_MODE 0x04
226#define MS_512_SECTOR_MODE 0x00
227#define MS_TOGGLE_TIMEOUT_EN 0x00
228#define MS_TOGGLE_TIMEOUT_DISEN 0x01
229#define MS_NO_CHECK_INT 0x02
230
231#define WAIT_INT 0x80
232#define NO_WAIT_INT 0x00
233#define NO_AUTO_READ_INT_REG 0x00
234#define AUTO_READ_INT_REG 0x40
235#define MS_CRC16_ERR 0x20
236#define MS_RDY_TIMEOUT 0x10
237#define MS_INT_CMDNK 0x08
238#define MS_INT_BREQ 0x04
239#define MS_INT_ERR 0x02
240#define MS_INT_CED 0x01
241
242#define MS_TRANSFER_START 0x80
243#define MS_TRANSFER_END 0x40
244#define MS_TRANSFER_ERR 0x20
245#define MS_BS_STATE 0x10
246#define MS_TM_READ_BYTES 0x00
247#define MS_TM_NORMAL_READ 0x01
248#define MS_TM_WRITE_BYTES 0x04
249#define MS_TM_NORMAL_WRITE 0x05
250#define MS_TM_AUTO_READ 0x08
251#define MS_TM_AUTO_WRITE 0x0C
252
253#define CARD_SHARE_MASK 0x0F
254#define CARD_SHARE_MULTI_LUN 0x00
255#define CARD_SHARE_NORMAL 0x00
256#define CARD_SHARE_48_XD 0x02
257#define CARD_SHARE_48_SD 0x04
258#define CARD_SHARE_48_MS 0x08
259#define CARD_SHARE_BAROSSA_XD 0x00
260#define CARD_SHARE_BAROSSA_SD 0x01
261#define CARD_SHARE_BAROSSA_MS 0x02
262
263#define MS_DRIVE_8 0x00
264#define MS_DRIVE_4 0x40
265#define MS_DRIVE_12 0x80
266#define SD_DRIVE_8 0x00
267#define SD_DRIVE_4 0x10
268#define SD_DRIVE_12 0x20
269#define XD_DRIVE_8 0x00
270#define XD_DRIVE_4 0x04
271#define XD_DRIVE_12 0x08
272
273#define SPI_STOP 0x01
274#define XD_STOP 0x02
275#define SD_STOP 0x04
276#define MS_STOP 0x08
277#define SPI_CLR_ERR 0x10
278#define XD_CLR_ERR 0x20
279#define SD_CLR_ERR 0x40
280#define MS_CLR_ERR 0x80
281
282#define CRC_FIX_CLK (0x00 << 0)
283#define CRC_VAR_CLK0 (0x01 << 0)
284#define CRC_VAR_CLK1 (0x02 << 0)
285#define SD30_FIX_CLK (0x00 << 2)
286#define SD30_VAR_CLK0 (0x01 << 2)
287#define SD30_VAR_CLK1 (0x02 << 2)
288#define SAMPLE_FIX_CLK (0x00 << 4)
289#define SAMPLE_VAR_CLK0 (0x01 << 4)
290#define SAMPLE_VAR_CLK1 (0x02 << 4)
291
292#define SDIO_VER_20 0x80
293#define SDIO_VER_10 0x00
294#define SDIO_VER_CHG 0x40
295#define SDIO_BUS_AUTO_SWITCH 0x10
296
297#define PINGPONG_BUFFER 0x01
298#define RING_BUFFER 0x00
299
300#define RB_FLUSH 0x80
301
302#define DMA_DONE_INT_EN 0x80
303#define SUSPEND_INT_EN 0x40
304#define LINK_RDY_INT_EN 0x20
305#define LINK_DOWN_INT_EN 0x10
306
307#define DMA_DONE_INT 0x80
308#define SUSPEND_INT 0x40
309#define LINK_RDY_INT 0x20
310#define LINK_DOWN_INT 0x10
311
312#define MRD_ERR_INT_EN 0x40
313#define MWR_ERR_INT_EN 0x20
314#define SCSI_CMD_INT_EN 0x10
315#define TLP_RCV_INT_EN 0x08
316#define TLP_TRSMT_INT_EN 0x04
317#define MRD_COMPLETE_INT_EN 0x02
318#define MWR_COMPLETE_INT_EN 0x01
319
320#define MRD_ERR_INT 0x40
321#define MWR_ERR_INT 0x20
322#define SCSI_CMD_INT 0x10
323#define TLP_RX_INT 0x08
324#define TLP_TX_INT 0x04
325#define MRD_COMPLETE_INT 0x02
326#define MWR_COMPLETE_INT 0x01
327
328#define MSG_RX_INT_EN 0x08
329#define MRD_RX_INT_EN 0x04
330#define MWR_RX_INT_EN 0x02
331#define CPLD_RX_INT_EN 0x01
332
333#define MSG_RX_INT 0x08
334#define MRD_RX_INT 0x04
335#define MWR_RX_INT 0x02
336#define CPLD_RX_INT 0x01
337
338#define MSG_TX_INT_EN 0x08
339#define MRD_TX_INT_EN 0x04
340#define MWR_TX_INT_EN 0x02
341#define CPLD_TX_INT_EN 0x01
342
343#define MSG_TX_INT 0x08
344#define MRD_TX_INT 0x04
345#define MWR_TX_INT 0x02
346#define CPLD_TX_INT 0x01
347
348#define DMA_RST 0x80
349#define DMA_BUSY 0x04
350#define DMA_DIR_TO_CARD 0x00
351#define DMA_DIR_FROM_CARD 0x02
352#define DMA_EN 0x01
353#define DMA_128 (0 << 4)
354#define DMA_256 (1 << 4)
355#define DMA_512 (2 << 4)
356#define DMA_1024 (3 << 4)
357#define DMA_PACK_SIZE_MASK 0x30
358
359#define XD_PWR_OFF_DELAY0 0x00
360#define XD_PWR_OFF_DELAY1 0x02
361#define XD_PWR_OFF_DELAY2 0x04
362#define XD_PWR_OFF_DELAY3 0x06
363#define XD_AUTO_PWR_OFF_EN 0xF7
364#define XD_NO_AUTO_PWR_OFF 0x08
365
366#define XD_TIME_RWN_1 0x00
367#define XD_TIME_RWN_STEP 0x20
368#define XD_TIME_RW_1 0x00
369#define XD_TIME_RW_STEP 0x04
370#define XD_TIME_SETUP_1 0x00
371#define XD_TIME_SETUP_STEP 0x01
372
373#define XD_ECC2_UNCORRECTABLE 0x80
374#define XD_ECC2_ERROR 0x40
375#define XD_ECC1_UNCORRECTABLE 0x20
376#define XD_ECC1_ERROR 0x10
377#define XD_RDY 0x04
378#define XD_CE_EN 0xFD
379#define XD_CE_DISEN 0x02
380#define XD_WP_EN 0xFE
381#define XD_WP_DISEN 0x01
382
383#define XD_TRANSFER_START 0x80
384#define XD_TRANSFER_END 0x40
385#define XD_PPB_EMPTY 0x20
386#define XD_RESET 0x00
387#define XD_ERASE 0x01
388#define XD_READ_STATUS 0x02
389#define XD_READ_ID 0x03
390#define XD_READ_REDUNDANT 0x04
391#define XD_READ_PAGES 0x05
392#define XD_SET_CMD 0x06
393#define XD_NORMAL_READ 0x07
394#define XD_WRITE_PAGES 0x08
395#define XD_NORMAL_WRITE 0x09
396#define XD_WRITE_REDUNDANT 0x0A
397#define XD_SET_ADDR 0x0B
398
399#define XD_PPB_TO_SIE 0x80
400#define XD_TO_PPB_ONLY 0x00
401#define XD_BA_TRANSFORM 0x40
402#define XD_BA_NO_TRANSFORM 0x00
403#define XD_NO_CALC_ECC 0x20
404#define XD_CALC_ECC 0x00
405#define XD_IGNORE_ECC 0x10
406#define XD_CHECK_ECC 0x00
407#define XD_DIRECT_TO_RB 0x08
408#define XD_ADDR_LENGTH_0 0x00
409#define XD_ADDR_LENGTH_1 0x01
410#define XD_ADDR_LENGTH_2 0x02
411#define XD_ADDR_LENGTH_3 0x03
412#define XD_ADDR_LENGTH_4 0x04
413
414#define XD_GPG 0xFF
415#define XD_BPG 0x00
416
417#define XD_GBLK 0xFF
418#define XD_LATER_BBLK 0xF0
419
420#define XD_ECC2_ALL1 0x80
421#define XD_ECC1_ALL1 0x40
422#define XD_BA2_ALL0 0x20
423#define XD_BA1_ALL0 0x10
424#define XD_BA1_BA2_EQL 0x04
425#define XD_BA2_VALID 0x02
426#define XD_BA1_VALID 0x01
427
428#define XD_PGSTS_ZEROBIT_OVER4 0x00
429#define XD_PGSTS_NOT_FF 0x02
430#define XD_AUTO_CHK_DATA_STATUS 0x01
431
432#define RSTB_MODE_DETECT 0x80
433#define MODE_OUT_VLD 0x40
434#define MODE_OUT_0_NONE 0x00
435#define MODE_OUT_10_NONE 0x04
436#define MODE_OUT_10_47 0x05
437#define MODE_OUT_10_180 0x06
438#define MODE_OUT_10_680 0x07
439#define MODE_OUT_16_NONE 0x08
440#define MODE_OUT_16_47 0x09
441#define MODE_OUT_16_180 0x0A
442#define MODE_OUT_16_680 0x0B
443#define MODE_OUT_NONE_NONE 0x0C
444#define MODE_OUT_NONE_47 0x0D
445#define MODE_OUT_NONE_180 0x0E
446#define MODE_OUT_NONE_680 0x0F
447
448#define CARD_OC_INT_EN 0x20
449#define CARD_DETECT_EN 0x08
450
451#define MS_DETECT_EN 0x80
452#define MS_OCP_INT_EN 0x40
453#define MS_OCP_INT_CLR 0x20
454#define MS_OC_CLR 0x10
455#define SD_DETECT_EN 0x08
456#define SD_OCP_INT_EN 0x04
457#define SD_OCP_INT_CLR 0x02
458#define SD_OC_CLR 0x01
459
460#define CARD_OCP_DETECT 0x80
461#define CARD_OC_NOW 0x08
462#define CARD_OC_EVER 0x04
463
464#define MS_OCP_DETECT 0x80
465#define MS_OC_NOW 0x40
466#define MS_OC_EVER 0x20
467#define SD_OCP_DETECT 0x08
468#define SD_OC_NOW 0x04
469#define SD_OC_EVER 0x02
470
471#define CARD_OC_INT_CLR 0x08
472#define CARD_OC_CLR 0x02
473
474#define SD_OCP_GLITCH_MASK 0x07
475#define SD_OCP_GLITCH_6_4 0x00
476#define SD_OCP_GLITCH_64 0x01
477#define SD_OCP_GLITCH_640 0x02
478#define SD_OCP_GLITCH_1000 0x03
479#define SD_OCP_GLITCH_2000 0x04
480#define SD_OCP_GLITCH_4000 0x05
481#define SD_OCP_GLITCH_8000 0x06
482#define SD_OCP_GLITCH_10000 0x07
483
484#define MS_OCP_GLITCH_MASK 0x70
485#define MS_OCP_GLITCH_6_4 (0x00 << 4)
486#define MS_OCP_GLITCH_64 (0x01 << 4)
487#define MS_OCP_GLITCH_640 (0x02 << 4)
488#define MS_OCP_GLITCH_1000 (0x03 << 4)
489#define MS_OCP_GLITCH_2000 (0x04 << 4)
490#define MS_OCP_GLITCH_4000 (0x05 << 4)
491#define MS_OCP_GLITCH_8000 (0x06 << 4)
492#define MS_OCP_GLITCH_10000 (0x07 << 4)
493
494#define OCP_TIME_60 0x00
495#define OCP_TIME_100 (0x01 << 3)
496#define OCP_TIME_200 (0x02 << 3)
497#define OCP_TIME_400 (0x03 << 3)
498#define OCP_TIME_600 (0x04 << 3)
499#define OCP_TIME_800 (0x05 << 3)
500#define OCP_TIME_1100 (0x06 << 3)
501#define OCP_TIME_MASK 0x38
502
503#define MS_OCP_TIME_60 0x00
504#define MS_OCP_TIME_100 (0x01 << 4)
505#define MS_OCP_TIME_200 (0x02 << 4)
506#define MS_OCP_TIME_400 (0x03 << 4)
507#define MS_OCP_TIME_600 (0x04 << 4)
508#define MS_OCP_TIME_800 (0x05 << 4)
509#define MS_OCP_TIME_1100 (0x06 << 4)
510#define MS_OCP_TIME_MASK 0x70
511
512#define SD_OCP_TIME_60 0x00
513#define SD_OCP_TIME_100 0x01
514#define SD_OCP_TIME_200 0x02
515#define SD_OCP_TIME_400 0x03
516#define SD_OCP_TIME_600 0x04
517#define SD_OCP_TIME_800 0x05
518#define SD_OCP_TIME_1100 0x06
519#define SD_OCP_TIME_MASK 0x07
520
521#define OCP_THD_315_417 0x00
522#define OCP_THD_283_783 (0x01 << 6)
523#define OCP_THD_244_946 (0x02 << 6)
524#define OCP_THD_191_1080 (0x03 << 6)
525#define OCP_THD_MASK 0xC0
526
527#define MS_OCP_THD_450 0x00
528#define MS_OCP_THD_550 (0x01 << 4)
529#define MS_OCP_THD_650 (0x02 << 4)
530#define MS_OCP_THD_750 (0x03 << 4)
531#define MS_OCP_THD_850 (0x04 << 4)
532#define MS_OCP_THD_950 (0x05 << 4)
533#define MS_OCP_THD_1050 (0x06 << 4)
534#define MS_OCP_THD_1150 (0x07 << 4)
535#define MS_OCP_THD_MASK 0x70
536
537#define SD_OCP_THD_450 0x00
538#define SD_OCP_THD_550 0x01
539#define SD_OCP_THD_650 0x02
540#define SD_OCP_THD_750 0x03
541#define SD_OCP_THD_850 0x04
542#define SD_OCP_THD_950 0x05
543#define SD_OCP_THD_1050 0x06
544#define SD_OCP_THD_1150 0x07
545#define SD_OCP_THD_MASK 0x07
546
547#define FPGA_MS_PULL_CTL_EN 0xEF
548#define FPGA_SD_PULL_CTL_EN 0xF7
549#define FPGA_XD_PULL_CTL_EN1 0xFE
550#define FPGA_XD_PULL_CTL_EN2 0xFD
551#define FPGA_XD_PULL_CTL_EN3 0xFB
552
553#define FPGA_MS_PULL_CTL_BIT 0x10
554#define FPGA_SD_PULL_CTL_BIT 0x08
555
556#define BLINK_EN 0x08
557#define LED_GPIO0 (0 << 4)
558#define LED_GPIO1 (1 << 4)
559#define LED_GPIO2 (2 << 4)
560
561#define SDIO_BUS_CTRL 0x01
562#define SDIO_CD_CTRL 0x02
563
564#define SSC_RSTB 0x80
565#define SSC_8X_EN 0x40
566#define SSC_FIX_FRAC 0x20
567#define SSC_SEL_1M 0x00
568#define SSC_SEL_2M 0x08
569#define SSC_SEL_4M 0x10
570#define SSC_SEL_8M 0x18
571
572#define SSC_DEPTH_MASK 0x07
573#define SSC_DEPTH_DISALBE 0x00
574#define SSC_DEPTH_4M 0x01
575#define SSC_DEPTH_2M 0x02
576#define SSC_DEPTH_1M 0x03
577#define SSC_DEPTH_512K 0x04
578#define SSC_DEPTH_256K 0x05
579#define SSC_DEPTH_128K 0x06
580#define SSC_DEPTH_64K 0x07
581
582#define XD_D3_NP 0x00
583#define XD_D3_PD (0x01 << 6)
584#define XD_D3_PU (0x02 << 6)
585#define XD_D2_NP 0x00
586#define XD_D2_PD (0x01 << 4)
587#define XD_D2_PU (0x02 << 4)
588#define XD_D1_NP 0x00
589#define XD_D1_PD (0x01 << 2)
590#define XD_D1_PU (0x02 << 2)
591#define XD_D0_NP 0x00
592#define XD_D0_PD 0x01
593#define XD_D0_PU 0x02
594
595#define SD_D7_NP 0x00
596#define SD_D7_PD (0x01 << 4)
597#define SD_DAT7_PU (0x02 << 4)
598#define SD_CLK_NP 0x00
599#define SD_CLK_PD (0x01 << 2)
600#define SD_CLK_PU (0x02 << 2)
601#define SD_D5_NP 0x00
602#define SD_D5_PD 0x01
603#define SD_D5_PU 0x02
604
605#define MS_D1_NP 0x00
606#define MS_D1_PD (0x01 << 6)
607#define MS_D1_PU (0x02 << 6)
608#define MS_D2_NP 0x00
609#define MS_D2_PD (0x01 << 4)
610#define MS_D2_PU (0x02 << 4)
611#define MS_CLK_NP 0x00
612#define MS_CLK_PD (0x01 << 2)
613#define MS_CLK_PU (0x02 << 2)
614#define MS_D6_NP 0x00
615#define MS_D6_PD 0x01
616#define MS_D6_PU 0x02
617
618#define XD_D7_NP 0x00
619#define XD_D7_PD (0x01 << 6)
620#define XD_D7_PU (0x02 << 6)
621#define XD_D6_NP 0x00
622#define XD_D6_PD (0x01 << 4)
623#define XD_D6_PU (0x02 << 4)
624#define XD_D5_NP 0x00
625#define XD_D5_PD (0x01 << 2)
626#define XD_D5_PU (0x02 << 2)
627#define XD_D4_NP 0x00
628#define XD_D4_PD 0x01
629#define XD_D4_PU 0x02
630
631#define SD_D6_NP 0x00
632#define SD_D6_PD (0x01 << 6)
633#define SD_D6_PU (0x02 << 6)
634#define SD_D0_NP 0x00
635#define SD_D0_PD (0x01 << 4)
636#define SD_D0_PU (0x02 << 4)
637#define SD_D1_NP 0x00
638#define SD_D1_PD 0x01
639#define SD_D1_PU 0x02
640
641#define MS_D3_NP 0x00
642#define MS_D3_PD (0x01 << 6)
643#define MS_D3_PU (0x02 << 6)
644#define MS_D0_NP 0x00
645#define MS_D0_PD (0x01 << 4)
646#define MS_D0_PU (0x02 << 4)
647#define MS_BS_NP 0x00
648#define MS_BS_PD (0x01 << 2)
649#define MS_BS_PU (0x02 << 2)
650
651#define XD_WP_NP 0x00
652#define XD_WP_PD (0x01 << 6)
653#define XD_WP_PU (0x02 << 6)
654#define XD_CE_NP 0x00
655#define XD_CE_PD (0x01 << 3)
656#define XD_CE_PU (0x02 << 3)
657#define XD_CLE_NP 0x00
658#define XD_CLE_PD (0x01 << 1)
659#define XD_CLE_PU (0x02 << 1)
660#define XD_CD_PD 0x00
661#define XD_CD_PU 0x01
662
663#define SD_D4_NP 0x00
664#define SD_D4_PD (0x01 << 6)
665#define SD_D4_PU (0x02 << 6)
666
667#define MS_D7_NP 0x00
668#define MS_D7_PD (0x01 << 6)
669#define MS_D7_PU (0x02 << 6)
670
671#define XD_RDY_NP 0x00
672#define XD_RDY_PD (0x01 << 6)
673#define XD_RDY_PU (0x02 << 6)
674#define XD_WE_NP 0x00
675#define XD_WE_PD (0x01 << 4)
676#define XD_WE_PU (0x02 << 4)
677#define XD_RE_NP 0x00
678#define XD_RE_PD (0x01 << 2)
679#define XD_RE_PU (0x02 << 2)
680#define XD_ALE_NP 0x00
681#define XD_ALE_PD 0x01
682#define XD_ALE_PU 0x02
683
684#define SD_D3_NP 0x00
685#define SD_D3_PD (0x01 << 4)
686#define SD_D3_PU (0x02 << 4)
687#define SD_D2_NP 0x00
688#define SD_D2_PD (0x01 << 2)
689#define SD_D2_PU (0x02 << 2)
690
691#define MS_INS_PD 0x00
692#define MS_INS_PU (0x01 << 7)
693#define SD_WP_NP 0x00
694#define SD_WP_PD (0x01 << 5)
695#define SD_WP_PU (0x02 << 5)
696#define SD_CD_PD 0x00
697#define SD_CD_PU (0x01 << 4)
698#define SD_CMD_NP 0x00
699#define SD_CMD_PD (0x01 << 2)
700#define SD_CMD_PU (0x02 << 2)
701
702#define MS_D5_NP 0x00
703#define MS_D5_PD (0x01 << 2)
704#define MS_D5_PU (0x02 << 2)
705#define MS_D4_NP 0x00
706#define MS_D4_PD 0x01
707#define MS_D4_PU 0x02
708
709#define FORCE_PM_CLOCK 0x10
710#define EN_CLOCK_PM 0x01
711
712#define HOST_ENTER_S3 0x02
713#define HOST_ENTER_S1 0x01
714
715#define AUX_PWR_DETECTED 0x01
716
717#define PHY_DEBUG_MODE 0x01
718
719#define SPI_COMMAND_BIT_8 0xE0
720#define SPI_ADDRESS_BIT_24 0x17
721#define SPI_ADDRESS_BIT_32 0x1F
722
723#define SPI_TRANSFER0_START 0x80
724#define SPI_TRANSFER0_END 0x40
725#define SPI_C_MODE0 0x00
726#define SPI_CA_MODE0 0x01
727#define SPI_CDO_MODE0 0x02
728#define SPI_CDI_MODE0 0x03
729#define SPI_CADO_MODE0 0x04
730#define SPI_CADI_MODE0 0x05
731#define SPI_POLLING_MODE0 0x06
732
733#define SPI_TRANSFER1_START 0x80
734#define SPI_TRANSFER1_END 0x40
735#define SPI_DO_MODE1 0x00
736#define SPI_DI_MODE1 0x01
737
738#define CS_POLARITY_HIGH 0x40
739#define CS_POLARITY_LOW 0x00
740#define DTO_MSB_FIRST 0x00
741#define DTO_LSB_FIRST 0x20
742#define SPI_MASTER 0x00
743#define SPI_SLAVE 0x10
744#define SPI_MODE0 0x00
745#define SPI_MODE1 0x04
746#define SPI_MODE2 0x08
747#define SPI_MODE3 0x0C
748#define SPI_MANUAL 0x00
749#define SPI_HALF_AUTO 0x01
750#define SPI_AUTO 0x02
751#define SPI_EEPROM_AUTO 0x03
752
753#define EDO_TIMING_MASK 0x03
754#define SAMPLE_RISING 0x00
755#define SAMPLE_DELAY_HALF 0x01
756#define SAMPLE_DELAY_ONE 0x02
757#define SAPMLE_DELAY_ONE_HALF 0x03
758#define TCS_MASK 0x0C
759
760#define NOT_BYPASS_SD 0x02
761#define DISABLE_SDIO_FUNC 0x04
762#define SELECT_1LUN 0x08
763
764#define PWR_GATE_EN 0x01
765#define LDO3318_PWR_MASK 0x06
766#define LDO_ON 0x00
767#define LDO_SUSPEND 0x04
768#define LDO_OFF 0x06
769
770#define SD_CFG1 0xFDA0
771#define SD_CFG2 0xFDA1
772#define SD_CFG3 0xFDA2
773#define SD_STAT1 0xFDA3
774#define SD_STAT2 0xFDA4
775#define SD_BUS_STAT 0xFDA5
776#define SD_PAD_CTL 0xFDA6
777#define SD_SAMPLE_POINT_CTL 0xFDA7
778#define SD_PUSH_POINT_CTL 0xFDA8
779#define SD_CMD0 0xFDA9
780#define SD_CMD1 0xFDAA
781#define SD_CMD2 0xFDAB
782#define SD_CMD3 0xFDAC
783#define SD_CMD4 0xFDAD
784#define SD_CMD5 0xFDAE
785#define SD_BYTE_CNT_L 0xFDAF
786#define SD_BYTE_CNT_H 0xFDB0
787#define SD_BLOCK_CNT_L 0xFDB1
788#define SD_BLOCK_CNT_H 0xFDB2
789#define SD_TRANSFER 0xFDB3
790#define SD_CMD_STATE 0xFDB5
791#define SD_DATA_STATE 0xFDB6
792
793#define DCM_DRP_CTL 0xFC23
794#define DCM_DRP_TRIG 0xFC24
795#define DCM_DRP_CFG 0xFC25
796#define DCM_DRP_WR_DATA_L 0xFC26
797#define DCM_DRP_WR_DATA_H 0xFC27
798#define DCM_DRP_RD_DATA_L 0xFC28
799#define DCM_DRP_RD_DATA_H 0xFC29
800#define SD_VPCLK0_CTL 0xFC2A
801#define SD_VPCLK1_CTL 0xFC2B
802#define SD_DCMPS0_CTL 0xFC2C
803#define SD_DCMPS1_CTL 0xFC2D
804#define SD_VPTX_CTL SD_VPCLK0_CTL
805#define SD_VPRX_CTL SD_VPCLK1_CTL
806#define SD_DCMPS_TX_CTL SD_DCMPS0_CTL
807#define SD_DCMPS_RX_CTL SD_DCMPS1_CTL
808
809#define CARD_CLK_SOURCE 0xFC2E
810
811#define CARD_PWR_CTL 0xFD50
812#define CARD_CLK_SWITCH 0xFD51
813#define CARD_SHARE_MODE 0xFD52
814#define CARD_DRIVE_SEL 0xFD53
815#define CARD_STOP 0xFD54
816#define CARD_OE 0xFD55
817#define CARD_AUTO_BLINK 0xFD56
818#define CARD_GPIO_DIR 0xFD57
819#define CARD_GPIO 0xFD58
820
821#define CARD_DATA_SOURCE 0xFD5B
822#define CARD_SELECT 0xFD5C
823#define SD30_DRIVE_SEL 0xFD5E
824
825#define CARD_CLK_EN 0xFD69
826
827#define SDIO_CTRL 0xFD6B
828
829#define FPDCTL 0xFC00
830#define PDINFO 0xFC01
831
832#define CLK_CTL 0xFC02
833#define CLK_DIV 0xFC03
834#define CLK_SEL 0xFC04
835
836#define SSC_DIV_N_0 0xFC0F
837#define SSC_DIV_N_1 0xFC10
838
839#define RCCTL 0xFC14
840
841#define FPGA_PULL_CTL 0xFC1D
842
843#define CARD_PULL_CTL1 0xFD60
844#define CARD_PULL_CTL2 0xFD61
845#define CARD_PULL_CTL3 0xFD62
846#define CARD_PULL_CTL4 0xFD63
847#define CARD_PULL_CTL5 0xFD64
848#define CARD_PULL_CTL6 0xFD65
849
850#define IRQEN0 0xFE20
851#define IRQSTAT0 0xFE21
852#define IRQEN1 0xFE22
853#define IRQSTAT1 0xFE23
854#define TLPRIEN 0xFE24
855#define TLPRISTAT 0xFE25
856#define TLPTIEN 0xFE26
857#define TLPTISTAT 0xFE27
858#define DMATC0 0xFE28
859#define DMATC1 0xFE29
860#define DMATC2 0xFE2A
861#define DMATC3 0xFE2B
862#define DMACTL 0xFE2C
863#define BCTL 0xFE2D
864#define RBBC0 0xFE2E
865#define RBBC1 0xFE2F
866#define RBDAT 0xFE30
867#define RBCTL 0xFE34
868#define CFGADDR0 0xFE35
869#define CFGADDR1 0xFE36
870#define CFGDATA0 0xFE37
871#define CFGDATA1 0xFE38
872#define CFGDATA2 0xFE39
873#define CFGDATA3 0xFE3A
874#define CFGRWCTL 0xFE3B
875#define PHYRWCTL 0xFE3C
876#define PHYDATA0 0xFE3D
877#define PHYDATA1 0xFE3E
878#define PHYADDR 0xFE3F
879#define MSGRXDATA0 0xFE40
880#define MSGRXDATA1 0xFE41
881#define MSGRXDATA2 0xFE42
882#define MSGRXDATA3 0xFE43
883#define MSGTXDATA0 0xFE44
884#define MSGTXDATA1 0xFE45
885#define MSGTXDATA2 0xFE46
886#define MSGTXDATA3 0xFE47
887#define MSGTXCTL 0xFE48
888#define PETXCFG 0xFE49
889
890#define CDRESUMECTL 0xFE52
891#define WAKE_SEL_CTL 0xFE54
892#define PME_FORCE_CTL 0xFE56
893#define ASPM_FORCE_CTL 0xFE57
894#define PM_CLK_FORCE_CTL 0xFE58
895#define PERST_GLITCH_WIDTH 0xFE5C
896#define CHANGE_LINK_STATE 0xFE5B
897#define RESET_LOAD_REG 0xFE5E
898#define HOST_SLEEP_STATE 0xFE60
899#define MAIN_PWR_OFF_CTL 0xFE70 /* RTS5208 */
900#define SDIO_CFG 0xFE70 /* RTS5209 */
901
902#define NFTS_TX_CTRL 0xFE72
903
904#define PWR_GATE_CTRL 0xFE75
905#define PWD_SUSPEND_EN 0xFE76
906
907#define EFUSE_CONTENT 0xFE5F
908
909#define XD_INIT 0xFD10
910#define XD_DTCTL 0xFD11
911#define XD_CTL 0xFD12
912#define XD_TRANSFER 0xFD13
913#define XD_CFG 0xFD14
914#define XD_ADDRESS0 0xFD15
915#define XD_ADDRESS1 0xFD16
916#define XD_ADDRESS2 0xFD17
917#define XD_ADDRESS3 0xFD18
918#define XD_ADDRESS4 0xFD19
919#define XD_DAT 0xFD1A
920#define XD_PAGE_CNT 0xFD1B
921#define XD_PAGE_STATUS 0xFD1C
922#define XD_BLOCK_STATUS 0xFD1D
923#define XD_BLOCK_ADDR1_L 0xFD1E
924#define XD_BLOCK_ADDR1_H 0xFD1F
925#define XD_BLOCK_ADDR2_L 0xFD20
926#define XD_BLOCK_ADDR2_H 0xFD21
927#define XD_BYTE_CNT_L 0xFD22
928#define XD_BYTE_CNT_H 0xFD23
929#define XD_PARITY 0xFD24
930#define XD_ECC_BIT1 0xFD25
931#define XD_ECC_BYTE1 0xFD26
932#define XD_ECC_BIT2 0xFD27
933#define XD_ECC_BYTE2 0xFD28
934#define XD_RESERVED0 0xFD29
935#define XD_RESERVED1 0xFD2A
936#define XD_RESERVED2 0xFD2B
937#define XD_RESERVED3 0xFD2C
938#define XD_CHK_DATA_STATUS 0xFD2D
939#define XD_CATCTL 0xFD2E
940
941#define MS_CFG 0xFD40
942#define MS_TPC 0xFD41
943#define MS_TRANS_CFG 0xFD42
944#define MS_TRANSFER 0xFD43
945#define MS_INT_REG 0xFD44
946#define MS_BYTE_CNT 0xFD45
947#define MS_SECTOR_CNT_L 0xFD46
948#define MS_SECTOR_CNT_H 0xFD47
949#define MS_DBUS_H 0xFD48
950
951#define SSC_CTL1 0xFC11
952#define SSC_CTL2 0xFC12
953
954#define OCPCTL 0xFC15
955#define OCPSTAT 0xFC16
956#define OCPCLR 0xFC17 /* 5208 */
957#define OCPGLITCH 0xFC17 /* 5209 */
958#define OCPPARA1 0xFC18
959#define OCPPARA2 0xFC19
960
961#define EFUSE_OP 0xFC20
962#define EFUSE_CTRL 0xFC21
963#define EFUSE_DATA 0xFC22
964
965#define SPI_COMMAND 0xFD80
966#define SPI_ADDR0 0xFD81
967#define SPI_ADDR1 0xFD82
968#define SPI_ADDR2 0xFD83
969#define SPI_ADDR3 0xFD84
970#define SPI_CA_NUMBER 0xFD85
971#define SPI_LENGTH0 0xFD86
972#define SPI_LENGTH1 0xFD87
973#define SPI_DATA 0xFD88
974#define SPI_DATA_NUMBER 0xFD89
975#define SPI_TRANSFER0 0xFD90
976#define SPI_TRANSFER1 0xFD91
977#define SPI_CONTROL 0xFD92
978#define SPI_SIG 0xFD93
979#define SPI_TCTL 0xFD94
980#define SPI_SLAVE_NUM 0xFD95
981#define SPI_CLK_DIVIDER0 0xFD96
982#define SPI_CLK_DIVIDER1 0xFD97
983
984#define SRAM_BASE 0xE600
985#define RBUF_BASE 0xF400
986#define PPBUF_BASE1 0xF800
987#define PPBUF_BASE2 0xFA00
988#define IMAGE_FLAG_ADDR0 0xCE80
989#define IMAGE_FLAG_ADDR1 0xCE81
990
991#define READ_OP 1
992#define WRITE_OP 2
993
994#define LCTLR 0x80
995
996#define POLLING_WAIT_CNT 1
997#define IDLE_MAX_COUNT 10
998#define SDIO_IDLE_COUNT 10
999
1000#define DEBOUNCE_CNT 5
1001
1002void do_remaining_work(struct rtsx_chip *chip);
1003void try_to_switch_sdio_ctrl(struct rtsx_chip *chip);
1004void do_reset_sd_card(struct rtsx_chip *chip);
1005void do_reset_xd_card(struct rtsx_chip *chip);
1006void do_reset_ms_card(struct rtsx_chip *chip);
1007void rtsx_power_off_card(struct rtsx_chip *chip);
1008void rtsx_release_cards(struct rtsx_chip *chip);
1009void rtsx_reset_cards(struct rtsx_chip *chip);
1010void rtsx_reinit_cards(struct rtsx_chip *chip, int reset_chip);
1011void rtsx_init_cards(struct rtsx_chip *chip);
1012int switch_ssc_clock(struct rtsx_chip *chip, int clk);
1013int switch_normal_clock(struct rtsx_chip *chip, int clk);
1014int enable_card_clock(struct rtsx_chip *chip, u8 card);
1015int disable_card_clock(struct rtsx_chip *chip, u8 card);
1016int card_rw(struct scsi_cmnd *srb, struct rtsx_chip *chip, u32 sec_addr, u16 sec_cnt);
1017void trans_dma_enable(enum dma_data_direction dir, struct rtsx_chip *chip, u32 byte_cnt, u8 pack_size);
1018void toggle_gpio(struct rtsx_chip *chip, u8 gpio);
1019void turn_on_led(struct rtsx_chip *chip, u8 gpio);
1020void turn_off_led(struct rtsx_chip *chip, u8 gpio);
1021
1022int card_share_mode(struct rtsx_chip *chip, int card);
1023int select_card(struct rtsx_chip *chip, int card);
1024int detect_card_cd(struct rtsx_chip *chip, int card);
1025int check_card_exist(struct rtsx_chip *chip, unsigned int lun);
1026int check_card_ready(struct rtsx_chip *chip, unsigned int lun);
1027int check_card_wp(struct rtsx_chip *chip, unsigned int lun);
1028int check_card_fail(struct rtsx_chip *chip, unsigned int lun);
1029int check_card_ejected(struct rtsx_chip *chip, unsigned int lun);
1030void eject_card(struct rtsx_chip *chip, unsigned int lun);
1031u8 get_lun_card(struct rtsx_chip *chip, unsigned int lun);
1032
1033static inline u32 get_card_size(struct rtsx_chip *chip, unsigned int lun)
1034{
1035#ifdef SUPPORT_SD_LOCK
1036 struct sd_info *sd_card = &(chip->sd_card);
1037
1038 if ((get_lun_card(chip, lun) == SD_CARD) && (sd_card->sd_lock_status & SD_LOCKED))
1039 return 0;
1040 else
1041 return chip->capacity[lun];
1042#else
1043 return chip->capacity[lun];
1044#endif
1045}
1046
1047static inline int switch_clock(struct rtsx_chip *chip, int clk)
1048{
1049 int retval = 0;
1050
1051 if (chip->asic_code)
1052 retval = switch_ssc_clock(chip, clk);
1053 else
1054 retval = switch_normal_clock(chip, clk);
1055
1056 return retval;
1057}
1058
1059int card_power_on(struct rtsx_chip *chip, u8 card);
1060int card_power_off(struct rtsx_chip *chip, u8 card);
1061
1062static inline int card_power_off_all(struct rtsx_chip *chip)
1063{
1064 RTSX_WRITE_REG(chip, CARD_PWR_CTL, 0x0F, 0x0F);
1065
1066 return STATUS_SUCCESS;
1067}
1068
1069static inline void rtsx_clear_xd_error(struct rtsx_chip *chip)
1070{
1071 rtsx_write_register(chip, CARD_STOP, XD_STOP | XD_CLR_ERR, XD_STOP | XD_CLR_ERR);
1072}
1073
1074static inline void rtsx_clear_sd_error(struct rtsx_chip *chip)
1075{
1076 rtsx_write_register(chip, CARD_STOP, SD_STOP | SD_CLR_ERR, SD_STOP | SD_CLR_ERR);
1077}
1078
1079static inline void rtsx_clear_ms_error(struct rtsx_chip *chip)
1080{
1081 rtsx_write_register(chip, CARD_STOP, MS_STOP | MS_CLR_ERR, MS_STOP | MS_CLR_ERR);
1082}
1083
1084static inline void rtsx_clear_spi_error(struct rtsx_chip *chip)
1085{
1086 rtsx_write_register(chip, CARD_STOP, SPI_STOP | SPI_CLR_ERR, SPI_STOP | SPI_CLR_ERR);
1087}
1088
1089#ifdef SUPPORT_SDIO_ASPM
1090void dynamic_configure_sdio_aspm(struct rtsx_chip *chip);
1091#endif
1092
1093#endif /* __REALTEK_RTSX_CARD_H */
diff --git a/drivers/staging/rts_pstor/rtsx_chip.c b/drivers/staging/rts_pstor/rtsx_chip.c
deleted file mode 100644
index d8e691b99028..000000000000
--- a/drivers/staging/rts_pstor/rtsx_chip.c
+++ /dev/null
@@ -1,2264 +0,0 @@
1/* Driver for Realtek PCI-Express card reader
2 *
3 * Copyright(c) 2009 Realtek Semiconductor Corp. All rights reserved.
4 *
5 * This program is free software; you can redistribute it and/or modify it
6 * under the terms of the GNU General Public License as published by the
7 * Free Software Foundation; either version 2, or (at your option) any
8 * later version.
9 *
10 * This program is distributed in the hope that it will be useful, but
11 * WITHOUT ANY WARRANTY; without even the implied warranty of
12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
13 * General Public License for more details.
14 *
15 * You should have received a copy of the GNU General Public License along
16 * with this program; if not, see <http://www.gnu.org/licenses/>.
17 *
18 * Author:
19 * wwang (wei_wang@realsil.com.cn)
20 * No. 450, Shenhu Road, Suzhou Industry Park, Suzhou, China
21 */
22
23#include <linux/blkdev.h>
24#include <linux/kthread.h>
25#include <linux/sched.h>
26#include <linux/workqueue.h>
27#include <linux/vmalloc.h>
28
29#include "rtsx.h"
30#include "rtsx_transport.h"
31#include "rtsx_scsi.h"
32#include "rtsx_card.h"
33#include "rtsx_chip.h"
34#include "rtsx_sys.h"
35#include "general.h"
36
37#include "sd.h"
38#include "xd.h"
39#include "ms.h"
40
41static void rtsx_calibration(struct rtsx_chip *chip)
42{
43 rtsx_write_phy_register(chip, 0x1B, 0x135E);
44 wait_timeout(10);
45 rtsx_write_phy_register(chip, 0x00, 0x0280);
46 rtsx_write_phy_register(chip, 0x01, 0x7112);
47 rtsx_write_phy_register(chip, 0x01, 0x7110);
48 rtsx_write_phy_register(chip, 0x01, 0x7112);
49 rtsx_write_phy_register(chip, 0x01, 0x7113);
50 rtsx_write_phy_register(chip, 0x00, 0x0288);
51}
52
53void rtsx_disable_card_int(struct rtsx_chip *chip)
54{
55 u32 reg = rtsx_readl(chip, RTSX_BIER);
56
57 reg &= ~(XD_INT_EN | SD_INT_EN | MS_INT_EN);
58 rtsx_writel(chip, RTSX_BIER, reg);
59}
60
61void rtsx_enable_card_int(struct rtsx_chip *chip)
62{
63 u32 reg = rtsx_readl(chip, RTSX_BIER);
64 int i;
65
66 for (i = 0; i <= chip->max_lun; i++) {
67 if (chip->lun2card[i] & XD_CARD)
68 reg |= XD_INT_EN;
69 if (chip->lun2card[i] & SD_CARD)
70 reg |= SD_INT_EN;
71 if (chip->lun2card[i] & MS_CARD)
72 reg |= MS_INT_EN;
73 }
74 if (chip->hw_bypass_sd)
75 reg &= ~((u32)SD_INT_EN);
76
77 rtsx_writel(chip, RTSX_BIER, reg);
78}
79
80void rtsx_enable_bus_int(struct rtsx_chip *chip)
81{
82 u32 reg = 0;
83#ifndef DISABLE_CARD_INT
84 int i;
85#endif
86
87 reg = TRANS_OK_INT_EN | TRANS_FAIL_INT_EN;
88
89#ifndef DISABLE_CARD_INT
90 for (i = 0; i <= chip->max_lun; i++) {
91 RTSX_DEBUGP("lun2card[%d] = 0x%02x\n", i, chip->lun2card[i]);
92
93 if (chip->lun2card[i] & XD_CARD)
94 reg |= XD_INT_EN;
95 if (chip->lun2card[i] & SD_CARD)
96 reg |= SD_INT_EN;
97 if (chip->lun2card[i] & MS_CARD)
98 reg |= MS_INT_EN;
99 }
100 if (chip->hw_bypass_sd)
101 reg &= ~((u32)SD_INT_EN);
102#endif
103
104 if (chip->ic_version >= IC_VER_C)
105 reg |= DELINK_INT_EN;
106#ifdef SUPPORT_OCP
107 if (CHECK_PID(chip, 0x5209)) {
108 if (CHECK_LUN_MODE(chip, SD_MS_2LUN))
109 reg |= MS_OC_INT_EN | SD_OC_INT_EN;
110 else
111 reg |= SD_OC_INT_EN;
112 } else {
113 reg |= OC_INT_EN;
114 }
115#endif
116 if (!chip->adma_mode)
117 reg |= DATA_DONE_INT_EN;
118
119 /* Enable Bus Interrupt */
120 rtsx_writel(chip, RTSX_BIER, reg);
121
122 RTSX_DEBUGP("RTSX_BIER: 0x%08x\n", reg);
123}
124
125void rtsx_disable_bus_int(struct rtsx_chip *chip)
126{
127 rtsx_writel(chip, RTSX_BIER, 0);
128}
129
130static int rtsx_pre_handle_sdio_old(struct rtsx_chip *chip)
131{
132 if (chip->ignore_sd && CHK_SDIO_EXIST(chip)) {
133 if (chip->asic_code) {
134 RTSX_WRITE_REG(chip, CARD_PULL_CTL5, 0xFF,
135 MS_INS_PU | SD_WP_PU | SD_CD_PU | SD_CMD_PU);
136 } else {
137 RTSX_WRITE_REG(chip, FPGA_PULL_CTL, 0xFF, FPGA_SD_PULL_CTL_EN);
138 }
139 RTSX_WRITE_REG(chip, CARD_SHARE_MODE, 0xFF, CARD_SHARE_48_SD);
140
141 /* Enable SDIO internal clock */
142 RTSX_WRITE_REG(chip, 0xFF2C, 0x01, 0x01);
143
144 RTSX_WRITE_REG(chip, SDIO_CTRL, 0xFF, SDIO_BUS_CTRL | SDIO_CD_CTRL);
145
146 chip->sd_int = 1;
147 chip->sd_io = 1;
148 } else {
149 chip->need_reset |= SD_CARD;
150 }
151
152 return STATUS_SUCCESS;
153}
154
155#ifdef HW_AUTO_SWITCH_SD_BUS
156static int rtsx_pre_handle_sdio_new(struct rtsx_chip *chip)
157{
158 u8 tmp;
159 int sw_bypass_sd = 0;
160 int retval;
161
162 if (chip->driver_first_load) {
163 if (CHECK_PID(chip, 0x5288)) {
164 RTSX_READ_REG(chip, 0xFE5A, &tmp);
165 if (tmp & 0x08)
166 sw_bypass_sd = 1;
167 } else if (CHECK_PID(chip, 0x5208)) {
168 RTSX_READ_REG(chip, 0xFE70, &tmp);
169 if (tmp & 0x80)
170 sw_bypass_sd = 1;
171 } else if (CHECK_PID(chip, 0x5209)) {
172 RTSX_READ_REG(chip, SDIO_CFG, &tmp);
173 if (tmp & SDIO_BUS_AUTO_SWITCH)
174 sw_bypass_sd = 1;
175 }
176 } else {
177 if (chip->sdio_in_charge)
178 sw_bypass_sd = 1;
179 }
180 RTSX_DEBUGP("chip->sdio_in_charge = %d\n", chip->sdio_in_charge);
181 RTSX_DEBUGP("chip->driver_first_load = %d\n", chip->driver_first_load);
182 RTSX_DEBUGP("sw_bypass_sd = %d\n", sw_bypass_sd);
183
184 if (sw_bypass_sd) {
185 u8 cd_toggle_mask = 0;
186
187 RTSX_READ_REG(chip, TLPTISTAT, &tmp);
188 if (CHECK_PID(chip, 0x5209))
189 cd_toggle_mask = 0x10;
190 else
191 cd_toggle_mask = 0x08;
192
193 if (tmp & cd_toggle_mask) {
194 /* Disable sdio_bus_auto_switch */
195 if (CHECK_PID(chip, 0x5288))
196 RTSX_WRITE_REG(chip, 0xFE5A, 0x08, 0x00);
197 else if (CHECK_PID(chip, 0x5208))
198 RTSX_WRITE_REG(chip, 0xFE70, 0x80, 0x00);
199 else
200 RTSX_WRITE_REG(chip, SDIO_CFG, SDIO_BUS_AUTO_SWITCH, 0);
201
202 RTSX_WRITE_REG(chip, TLPTISTAT, 0xFF, tmp);
203
204 chip->need_reset |= SD_CARD;
205 } else {
206 RTSX_DEBUGP("Chip inserted with SDIO!\n");
207
208 if (chip->asic_code) {
209 retval = sd_pull_ctl_enable(chip);
210 if (retval != STATUS_SUCCESS)
211 TRACE_RET(chip, STATUS_FAIL);
212 } else {
213 RTSX_WRITE_REG(chip, FPGA_PULL_CTL, FPGA_SD_PULL_CTL_BIT | 0x20, 0);
214 }
215 retval = card_share_mode(chip, SD_CARD);
216 if (retval != STATUS_SUCCESS)
217 TRACE_RET(chip, STATUS_FAIL);
218
219 /* Enable sdio_bus_auto_switch */
220 if (CHECK_PID(chip, 0x5288)) {
221 RTSX_WRITE_REG(chip, 0xFE5A, 0x08, 0x08);
222 } else if (CHECK_PID(chip, 0x5208)) {
223 RTSX_WRITE_REG(chip, 0xFE70, 0x80, 0x80);
224 } else {
225 RTSX_WRITE_REG(chip, SDIO_CFG,
226 SDIO_BUS_AUTO_SWITCH, SDIO_BUS_AUTO_SWITCH);
227 }
228 chip->chip_insert_with_sdio = 1;
229 chip->sd_io = 1;
230 }
231 } else {
232 if (CHECK_PID(chip, 0x5209))
233 RTSX_WRITE_REG(chip, TLPTISTAT, 0x10, 0x10);
234 else
235 RTSX_WRITE_REG(chip, TLPTISTAT, 0x08, 0x08);
236
237 chip->need_reset |= SD_CARD;
238 }
239
240 return STATUS_SUCCESS;
241}
242#endif
243
244int rtsx_reset_chip(struct rtsx_chip *chip)
245{
246 int retval;
247
248 rtsx_writel(chip, RTSX_HCBAR, chip->host_cmds_addr);
249
250 rtsx_disable_aspm(chip);
251
252 if (CHECK_PID(chip, 0x5209) && chip->asic_code) {
253 u16 val;
254
255 /* optimize PHY */
256 retval = rtsx_write_phy_register(chip, 0x00, 0xB966);
257 if (retval != STATUS_SUCCESS)
258 TRACE_RET(chip, STATUS_FAIL);
259
260 retval = rtsx_write_phy_register(chip, 0x01, 0x713F);
261 if (retval != STATUS_SUCCESS)
262 TRACE_RET(chip, STATUS_FAIL);
263
264 retval = rtsx_write_phy_register(chip, 0x03, 0xA549);
265 if (retval != STATUS_SUCCESS)
266 TRACE_RET(chip, STATUS_FAIL);
267
268 retval = rtsx_write_phy_register(chip, 0x06, 0xB235);
269 if (retval != STATUS_SUCCESS)
270 TRACE_RET(chip, STATUS_FAIL);
271
272 retval = rtsx_write_phy_register(chip, 0x07, 0xEF40);
273 if (retval != STATUS_SUCCESS)
274 TRACE_RET(chip, STATUS_FAIL);
275
276 retval = rtsx_write_phy_register(chip, 0x1E, 0xF8EB);
277 if (retval != STATUS_SUCCESS)
278 TRACE_RET(chip, STATUS_FAIL);
279
280 retval = rtsx_write_phy_register(chip, 0x19, 0xFE6C);
281 if (retval != STATUS_SUCCESS)
282 TRACE_RET(chip, STATUS_FAIL);
283
284 wait_timeout(1);
285 retval = rtsx_write_phy_register(chip, 0x0A, 0x05C0);
286 if (retval != STATUS_SUCCESS)
287 TRACE_RET(chip, STATUS_FAIL);
288
289
290 retval = rtsx_write_cfg_dw(chip, 1, 0x110, 0xFFFF, 0xFFFF);
291 if (retval != STATUS_SUCCESS)
292 TRACE_RET(chip, STATUS_FAIL);
293
294 retval = rtsx_read_phy_register(chip, 0x08, &val);
295 if (retval != STATUS_SUCCESS)
296 TRACE_RET(chip, STATUS_FAIL);
297
298 RTSX_DEBUGP("Read from phy 0x08: 0x%04x\n", val);
299
300 if (chip->phy_voltage) {
301 chip->phy_voltage &= 0x3F;
302 RTSX_DEBUGP("chip->phy_voltage = 0x%x\n", chip->phy_voltage);
303 val &= ~0x3F;
304 val |= chip->phy_voltage;
305 RTSX_DEBUGP("Write to phy 0x08: 0x%04x\n", val);
306 retval = rtsx_write_phy_register(chip, 0x08, val);
307 if (retval != STATUS_SUCCESS)
308 TRACE_RET(chip, STATUS_FAIL);
309
310 } else {
311 chip->phy_voltage = (u8)(val & 0x3F);
312 RTSX_DEBUGP("Default, chip->phy_voltage = 0x%x\n", chip->phy_voltage);
313 }
314 }
315
316 RTSX_WRITE_REG(chip, HOST_SLEEP_STATE, 0x03, 0x00);
317
318 /* Disable card clock */
319 RTSX_WRITE_REG(chip, CARD_CLK_EN, 0x1E, 0);
320
321#ifdef SUPPORT_OCP
322 /* SSC power on, OCD power on */
323 if (CHECK_LUN_MODE(chip, SD_MS_2LUN))
324 RTSX_WRITE_REG(chip, FPDCTL, OC_POWER_DOWN, 0);
325 else
326 RTSX_WRITE_REG(chip, FPDCTL, OC_POWER_DOWN, MS_OC_POWER_DOWN);
327
328 if (CHECK_PID(chip, 0x5209)) {
329 RTSX_WRITE_REG(chip, OCPPARA1, SD_OCP_TIME_MASK | MS_OCP_TIME_MASK,
330 SD_OCP_TIME_800 | MS_OCP_TIME_800);
331 RTSX_WRITE_REG(chip, OCPPARA2, SD_OCP_THD_MASK | MS_OCP_THD_MASK,
332 chip->sd_400mA_ocp_thd | (chip->ms_ocp_thd << 4));
333 if (CHECK_LUN_MODE(chip, SD_MS_2LUN)) {
334 RTSX_WRITE_REG(chip, OCPGLITCH, SD_OCP_GLITCH_MASK | MS_OCP_GLITCH_MASK,
335 SD_OCP_GLITCH_10000 | MS_OCP_GLITCH_10000);
336 } else {
337 RTSX_WRITE_REG(chip, OCPGLITCH, SD_OCP_GLITCH_MASK, SD_OCP_GLITCH_10000);
338 }
339 RTSX_WRITE_REG(chip, OCPCTL, 0xFF,
340 SD_OCP_INT_EN | SD_DETECT_EN | MS_OCP_INT_EN | MS_DETECT_EN);
341 } else {
342 RTSX_WRITE_REG(chip, OCPPARA1, OCP_TIME_MASK, OCP_TIME_800);
343 RTSX_WRITE_REG(chip, OCPPARA2, OCP_THD_MASK, OCP_THD_244_946);
344 RTSX_WRITE_REG(chip, OCPCTL, 0xFF, CARD_OC_INT_EN | CARD_DETECT_EN);
345 }
346#else
347 /* OC power down */
348 RTSX_WRITE_REG(chip, FPDCTL, OC_POWER_DOWN, OC_POWER_DOWN);
349#endif
350
351 if (!CHECK_PID(chip, 0x5288))
352 RTSX_WRITE_REG(chip, CARD_GPIO_DIR, 0xFF, 0x03);
353
354 /* Turn off LED */
355 RTSX_WRITE_REG(chip, CARD_GPIO, 0xFF, 0x03);
356
357 /* Reset delink mode */
358 RTSX_WRITE_REG(chip, CHANGE_LINK_STATE, 0x0A, 0);
359
360 /* Card driving select */
361 RTSX_WRITE_REG(chip, CARD_DRIVE_SEL, 0xFF, chip->card_drive_sel);
362 if (CHECK_PID(chip, 0x5209))
363 RTSX_WRITE_REG(chip, SD30_DRIVE_SEL, 0x07, chip->sd30_drive_sel_3v3);
364
365#ifdef LED_AUTO_BLINK
366 RTSX_WRITE_REG(chip, CARD_AUTO_BLINK, 0xFF,
367 LED_BLINK_SPEED | BLINK_EN | LED_GPIO0);
368#endif
369
370 if (chip->asic_code) {
371 /* Enable SSC Clock */
372 RTSX_WRITE_REG(chip, SSC_CTL1, 0xFF, SSC_8X_EN | SSC_SEL_4M);
373 RTSX_WRITE_REG(chip, SSC_CTL2, 0xFF, 0x12);
374 }
375
376 /* Disable cd_pwr_save (u_force_rst_core_en=0, u_cd_rst_core_en=0)
377 0xFE5B
378 bit[1] u_cd_rst_core_en rst_value = 0
379 bit[2] u_force_rst_core_en rst_value = 0
380 bit[5] u_mac_phy_rst_n_dbg rst_value = 1
381 bit[4] u_non_sticky_rst_n_dbg rst_value = 0
382 */
383 RTSX_WRITE_REG(chip, CHANGE_LINK_STATE, 0x16, 0x10);
384
385 /* Enable ASPM */
386 if (chip->aspm_l0s_l1_en) {
387 if (chip->dynamic_aspm) {
388 if (CHK_SDIO_EXIST(chip)) {
389 if (CHECK_PID(chip, 0x5209)) {
390 retval = rtsx_write_cfg_dw(chip, 1, 0xC0, 0xFF, chip->aspm_l0s_l1_en);
391 if (retval != STATUS_SUCCESS)
392 TRACE_RET(chip, STATUS_FAIL);
393
394 } else if (CHECK_PID(chip, 0x5288)) {
395 retval = rtsx_write_cfg_dw(chip, 2, 0xC0, 0xFF, chip->aspm_l0s_l1_en);
396 if (retval != STATUS_SUCCESS)
397 TRACE_RET(chip, STATUS_FAIL);
398 }
399 }
400 } else {
401 if (CHECK_PID(chip, 0x5208))
402 RTSX_WRITE_REG(chip, ASPM_FORCE_CTL, 0xFF, 0x3F);
403
404 retval = rtsx_write_config_byte(chip, LCTLR, chip->aspm_l0s_l1_en);
405 if (retval != STATUS_SUCCESS)
406 TRACE_RET(chip, STATUS_FAIL);
407
408 chip->aspm_level[0] = chip->aspm_l0s_l1_en;
409 if (CHK_SDIO_EXIST(chip)) {
410 chip->aspm_level[1] = chip->aspm_l0s_l1_en;
411 if (CHECK_PID(chip, 0x5288))
412 retval = rtsx_write_cfg_dw(chip, 2, 0xC0, 0xFF, chip->aspm_l0s_l1_en);
413 else
414 retval = rtsx_write_cfg_dw(chip, 1, 0xC0, 0xFF, chip->aspm_l0s_l1_en);
415
416 if (retval != STATUS_SUCCESS)
417 TRACE_RET(chip, STATUS_FAIL);
418
419 }
420
421 chip->aspm_enabled = 1;
422 }
423 } else {
424 if (chip->asic_code && CHECK_PID(chip, 0x5208)) {
425 retval = rtsx_write_phy_register(chip, 0x07, 0x0129);
426 if (retval != STATUS_SUCCESS)
427 TRACE_RET(chip, STATUS_FAIL);
428 }
429 retval = rtsx_write_config_byte(chip, LCTLR, chip->aspm_l0s_l1_en);
430 if (retval != STATUS_SUCCESS)
431 TRACE_RET(chip, STATUS_FAIL);
432 }
433
434 retval = rtsx_write_config_byte(chip, 0x81, 1);
435 if (retval != STATUS_SUCCESS)
436 TRACE_RET(chip, STATUS_FAIL);
437
438 if (CHK_SDIO_EXIST(chip)) {
439 if (CHECK_PID(chip, 0x5288))
440 retval = rtsx_write_cfg_dw(chip, 2, 0xC0, 0xFF00, 0x0100);
441 else
442 retval = rtsx_write_cfg_dw(chip, 1, 0xC0, 0xFF00, 0x0100);
443
444 if (retval != STATUS_SUCCESS)
445 TRACE_RET(chip, STATUS_FAIL);
446
447 }
448
449 if (CHECK_PID(chip, 0x5209)) {
450 retval = rtsx_write_cfg_dw(chip, 0, 0x70C, 0xFF000000, 0x5B);
451 if (retval != STATUS_SUCCESS)
452 TRACE_RET(chip, STATUS_FAIL);
453 }
454
455 if (CHECK_PID(chip, 0x5288)) {
456 if (!CHK_SDIO_EXIST(chip)) {
457 retval = rtsx_write_cfg_dw(chip, 2, 0xC0, 0xFFFF, 0x0103);
458 if (retval != STATUS_SUCCESS)
459 TRACE_RET(chip, STATUS_FAIL);
460
461 retval = rtsx_write_cfg_dw(chip, 2, 0x84, 0xFF, 0x03);
462 if (retval != STATUS_SUCCESS)
463 TRACE_RET(chip, STATUS_FAIL);
464
465 }
466 }
467
468 RTSX_WRITE_REG(chip, IRQSTAT0, LINK_RDY_INT, LINK_RDY_INT);
469
470 RTSX_WRITE_REG(chip, PERST_GLITCH_WIDTH, 0xFF, 0x80);
471
472 if (CHECK_PID(chip, 0x5209)) {
473 RTSX_WRITE_REG(chip, PWD_SUSPEND_EN, 0xFF, 0xFF);
474 RTSX_WRITE_REG(chip, PWR_GATE_CTRL, PWR_GATE_EN, PWR_GATE_EN);
475 }
476
477 /* Enable PCIE interrupt */
478 if (chip->asic_code) {
479 if (CHECK_PID(chip, 0x5208)) {
480 if (chip->phy_debug_mode) {
481 RTSX_WRITE_REG(chip, CDRESUMECTL, 0x77, 0);
482 rtsx_disable_bus_int(chip);
483 } else {
484 rtsx_enable_bus_int(chip);
485 }
486
487 if (chip->ic_version >= IC_VER_D) {
488 u16 reg;
489 retval = rtsx_read_phy_register(chip, 0x00, &reg);
490 if (retval != STATUS_SUCCESS)
491 TRACE_RET(chip, STATUS_FAIL);
492
493 reg &= 0xFE7F;
494 reg |= 0x80;
495 retval = rtsx_write_phy_register(chip, 0x00, reg);
496 if (retval != STATUS_SUCCESS)
497 TRACE_RET(chip, STATUS_FAIL);
498
499 retval = rtsx_read_phy_register(chip, 0x1C, &reg);
500 if (retval != STATUS_SUCCESS)
501 TRACE_RET(chip, STATUS_FAIL);
502
503 reg &= 0xFFF7;
504 retval = rtsx_write_phy_register(chip, 0x1C, reg);
505 if (retval != STATUS_SUCCESS)
506 TRACE_RET(chip, STATUS_FAIL);
507
508 }
509
510 if (chip->driver_first_load && (chip->ic_version < IC_VER_C))
511 rtsx_calibration(chip);
512
513 } else {
514 rtsx_enable_bus_int(chip);
515 }
516 } else {
517 rtsx_enable_bus_int(chip);
518 }
519
520#ifdef HW_INT_WRITE_CLR
521 if (CHECK_PID(chip, 0x5209)) {
522 /* Set interrupt write clear */
523 RTSX_WRITE_REG(chip, NFTS_TX_CTRL, 0x02, 0);
524 }
525#endif
526
527 chip->need_reset = 0;
528
529 chip->int_reg = rtsx_readl(chip, RTSX_BIPR);
530#ifdef HW_INT_WRITE_CLR
531 if (CHECK_PID(chip, 0x5209)) {
532 /* Clear interrupt flag */
533 rtsx_writel(chip, RTSX_BIPR, chip->int_reg);
534 }
535#endif
536 if (chip->hw_bypass_sd)
537 goto NextCard;
538 RTSX_DEBUGP("In rtsx_reset_chip, chip->int_reg = 0x%x\n", chip->int_reg);
539 if (chip->int_reg & SD_EXIST) {
540#ifdef HW_AUTO_SWITCH_SD_BUS
541 if (CHECK_PID(chip, 0x5208) && (chip->ic_version < IC_VER_C))
542 retval = rtsx_pre_handle_sdio_old(chip);
543 else
544 retval = rtsx_pre_handle_sdio_new(chip);
545
546 RTSX_DEBUGP("chip->need_reset = 0x%x (rtsx_reset_chip)\n", (unsigned int)(chip->need_reset));
547#else /* HW_AUTO_SWITCH_SD_BUS */
548 retval = rtsx_pre_handle_sdio_old(chip);
549#endif /* HW_AUTO_SWITCH_SD_BUS */
550 if (retval != STATUS_SUCCESS)
551 TRACE_RET(chip, STATUS_FAIL);
552
553 } else {
554 chip->sd_io = 0;
555 RTSX_WRITE_REG(chip, SDIO_CTRL, SDIO_BUS_CTRL | SDIO_CD_CTRL, 0);
556 }
557
558NextCard:
559 if (chip->int_reg & XD_EXIST)
560 chip->need_reset |= XD_CARD;
561 if (chip->int_reg & MS_EXIST)
562 chip->need_reset |= MS_CARD;
563 if (chip->int_reg & CARD_EXIST)
564 RTSX_WRITE_REG(chip, SSC_CTL1, SSC_RSTB, SSC_RSTB);
565
566 RTSX_DEBUGP("In rtsx_init_chip, chip->need_reset = 0x%x\n", (unsigned int)(chip->need_reset));
567
568 RTSX_WRITE_REG(chip, RCCTL, 0x01, 0x00);
569
570 if (CHECK_PID(chip, 0x5208) || CHECK_PID(chip, 0x5288)) {
571 /* Turn off main power when entering S3/S4 state */
572 RTSX_WRITE_REG(chip, MAIN_PWR_OFF_CTL, 0x03, 0x03);
573 }
574
575 if (chip->remote_wakeup_en && !chip->auto_delink_en) {
576 RTSX_WRITE_REG(chip, WAKE_SEL_CTL, 0x07, 0x07);
577 if (chip->aux_pwr_exist)
578 RTSX_WRITE_REG(chip, PME_FORCE_CTL, 0xFF, 0x33);
579 } else {
580 RTSX_WRITE_REG(chip, WAKE_SEL_CTL, 0x07, 0x04);
581 RTSX_WRITE_REG(chip, PME_FORCE_CTL, 0xFF, 0x30);
582 }
583
584 if (CHECK_PID(chip, 0x5208) && (chip->ic_version >= IC_VER_D)) {
585 RTSX_WRITE_REG(chip, PETXCFG, 0x1C, 0x14);
586 } else if (CHECK_PID(chip, 0x5209)) {
587 if (chip->force_clkreq_0)
588 RTSX_WRITE_REG(chip, PETXCFG, 0x08, 0x08);
589 else
590 RTSX_WRITE_REG(chip, PETXCFG, 0x08, 0x00);
591 }
592
593 if (chip->asic_code && CHECK_PID(chip, 0x5208)) {
594 retval = rtsx_clr_phy_reg_bit(chip, 0x1C, 2);
595 if (retval != STATUS_SUCCESS)
596 TRACE_RET(chip, STATUS_FAIL);
597 }
598
599 if (chip->ft2_fast_mode) {
600 RTSX_WRITE_REG(chip, CARD_PWR_CTL, 0xFF, MS_PARTIAL_POWER_ON | SD_PARTIAL_POWER_ON);
601 udelay(chip->pmos_pwr_on_interval);
602 RTSX_WRITE_REG(chip, CARD_PWR_CTL, 0xFF, MS_POWER_ON | SD_POWER_ON);
603
604 wait_timeout(200);
605 }
606
607 /* Reset card */
608 rtsx_reset_detected_cards(chip, 0);
609
610 chip->driver_first_load = 0;
611
612 return STATUS_SUCCESS;
613}
614
615static inline int check_sd_speed_prior(u32 sd_speed_prior)
616{
617 int i, fake_para = 0;
618
619 for (i = 0; i < 4; i++) {
620 u8 tmp = (u8)(sd_speed_prior >> (i*8));
621 if ((tmp < 0x01) || (tmp > 0x04)) {
622 fake_para = 1;
623 break;
624 }
625 }
626
627 return !fake_para;
628}
629
630static inline int check_sd_current_prior(u32 sd_current_prior)
631{
632 int i, fake_para = 0;
633
634 for (i = 0; i < 4; i++) {
635 u8 tmp = (u8)(sd_current_prior >> (i*8));
636 if (tmp > 0x03) {
637 fake_para = 1;
638 break;
639 }
640 }
641
642 return !fake_para;
643}
644
645static int rts5209_init(struct rtsx_chip *chip)
646{
647 int retval;
648 u32 lval = 0;
649 u8 val = 0;
650
651 val = rtsx_readb(chip, 0x1C);
652 if ((val & 0x10) == 0)
653 chip->asic_code = 1;
654 else
655 chip->asic_code = 0;
656
657 chip->ic_version = val & 0x0F;
658 chip->phy_debug_mode = 0;
659
660 chip->aux_pwr_exist = 0;
661
662 chip->ms_power_class_en = 0x03;
663
664 retval = rtsx_read_cfg_dw(chip, 0, 0x724, &lval);
665 if (retval != STATUS_SUCCESS)
666 TRACE_RET(chip, STATUS_FAIL);
667
668 RTSX_DEBUGP("dw in 0x724: 0x%x\n", lval);
669 val = (u8)lval;
670 if (!(val & 0x80)) {
671 if (val & 0x08)
672 chip->lun_mode = DEFAULT_SINGLE;
673 else
674 chip->lun_mode = SD_MS_2LUN;
675
676 if (val & 0x04)
677 SET_SDIO_EXIST(chip);
678 else
679 CLR_SDIO_EXIST(chip);
680
681 if (val & 0x02)
682 chip->hw_bypass_sd = 0;
683 else
684 chip->hw_bypass_sd = 1;
685
686 } else {
687 SET_SDIO_EXIST(chip);
688 chip->hw_bypass_sd = 0;
689 }
690
691 if (chip->use_hw_setting) {
692 u8 clk;
693
694 chip->aspm_l0s_l1_en = (val >> 5) & 0x03;
695
696 val = (u8)(lval >> 8);
697
698 clk = (val >> 5) & 0x07;
699 if (clk != 0x07)
700 chip->asic_sd_sdr50_clk = 98 - clk * 2;
701
702 if (val & 0x10)
703 chip->auto_delink_en = 1;
704 else
705 chip->auto_delink_en = 0;
706
707 if (chip->ss_en == 2) {
708 chip->ss_en = 0;
709 } else {
710 if (val & 0x08)
711 chip->ss_en = 1;
712 else
713 chip->ss_en = 0;
714 }
715
716 clk = val & 0x07;
717 if (clk != 0x07)
718 chip->asic_ms_hg_clk = (59 - clk) * 2;
719
720 val = (u8)(lval >> 16);
721
722 clk = (val >> 6) & 0x03;
723 if (clk != 0x03) {
724 chip->asic_sd_hs_clk = (49 - clk * 2) * 2;
725 chip->asic_mmc_52m_clk = (49 - clk * 2) * 2;
726 }
727
728 clk = (val >> 4) & 0x03;
729 if (clk != 0x03)
730 chip->asic_sd_ddr50_clk = (48 - clk * 2) * 2;
731
732 if (val & 0x01)
733 chip->sdr104_en = 1;
734 else
735 chip->sdr104_en = 0;
736
737 if (val & 0x02)
738 chip->ddr50_en = 1;
739 else
740 chip->ddr50_en = 0;
741
742 if (val & 0x04)
743 chip->sdr50_en = 1;
744 else
745 chip->sdr50_en = 0;
746
747
748 val = (u8)(lval >> 24);
749
750 clk = (val >> 5) & 0x07;
751 if (clk != 0x07)
752 chip->asic_sd_sdr104_clk = 206 - clk * 3;
753
754 if (val & 0x10)
755 chip->power_down_in_ss = 1;
756 else
757 chip->power_down_in_ss = 0;
758
759 chip->ms_power_class_en = val & 0x03;
760 }
761
762 if (chip->hp_watch_bios_hotplug && chip->auto_delink_en) {
763 u8 reg58, reg5b;
764
765 retval = rtsx_read_pci_cfg_byte(0x00,
766 0x1C, 0x02, 0x58, &reg58);
767 if (retval < 0)
768 return STATUS_SUCCESS;
769
770 retval = rtsx_read_pci_cfg_byte(0x00,
771 0x1C, 0x02, 0x5B, &reg5b);
772 if (retval < 0)
773 return STATUS_SUCCESS;
774
775 RTSX_DEBUGP("reg58 = 0x%x, reg5b = 0x%x\n", reg58, reg5b);
776
777 if ((reg58 == 0x00) && (reg5b == 0x01))
778 chip->auto_delink_en = 0;
779
780 }
781
782 return STATUS_SUCCESS;
783}
784
785static int rts5208_init(struct rtsx_chip *chip)
786{
787 int retval;
788 u16 reg = 0;
789 u8 val = 0;
790
791 RTSX_WRITE_REG(chip, CLK_SEL, 0x03, 0x03);
792 RTSX_READ_REG(chip, CLK_SEL, &val);
793 if (val == 0)
794 chip->asic_code = 1;
795 else
796 chip->asic_code = 0;
797
798 if (chip->asic_code) {
799 retval = rtsx_read_phy_register(chip, 0x1C, &reg);
800 if (retval != STATUS_SUCCESS)
801 TRACE_RET(chip, STATUS_FAIL);
802
803 RTSX_DEBUGP("Value of phy register 0x1C is 0x%x\n", reg);
804 chip->ic_version = (reg >> 4) & 0x07;
805 if (reg & PHY_DEBUG_MODE)
806 chip->phy_debug_mode = 1;
807 else
808 chip->phy_debug_mode = 0;
809
810 } else {
811 RTSX_READ_REG(chip, 0xFE80, &val);
812 chip->ic_version = val;
813 chip->phy_debug_mode = 0;
814 }
815
816 RTSX_READ_REG(chip, PDINFO, &val);
817 RTSX_DEBUGP("PDINFO: 0x%x\n", val);
818 if (val & AUX_PWR_DETECTED)
819 chip->aux_pwr_exist = 1;
820 else
821 chip->aux_pwr_exist = 0;
822
823 RTSX_READ_REG(chip, 0xFE50, &val);
824 if (val & 0x01)
825 chip->hw_bypass_sd = 1;
826 else
827 chip->hw_bypass_sd = 0;
828
829 rtsx_read_config_byte(chip, 0x0E, &val);
830 if (val & 0x80)
831 SET_SDIO_EXIST(chip);
832 else
833 CLR_SDIO_EXIST(chip);
834
835 if (chip->use_hw_setting) {
836 RTSX_READ_REG(chip, CHANGE_LINK_STATE, &val);
837 if (val & 0x80)
838 chip->auto_delink_en = 1;
839 else
840 chip->auto_delink_en = 0;
841 }
842
843 return STATUS_SUCCESS;
844}
845
846static int rts5288_init(struct rtsx_chip *chip)
847{
848 int retval;
849 u8 val = 0, max_func;
850 u32 lval = 0;
851
852 RTSX_WRITE_REG(chip, CLK_SEL, 0x03, 0x03);
853 RTSX_READ_REG(chip, CLK_SEL, &val);
854 if (val == 0)
855 chip->asic_code = 1;
856 else
857 chip->asic_code = 0;
858
859 chip->ic_version = 0;
860 chip->phy_debug_mode = 0;
861
862 RTSX_READ_REG(chip, PDINFO, &val);
863 RTSX_DEBUGP("PDINFO: 0x%x\n", val);
864 if (val & AUX_PWR_DETECTED)
865 chip->aux_pwr_exist = 1;
866 else
867 chip->aux_pwr_exist = 0;
868
869 RTSX_READ_REG(chip, CARD_SHARE_MODE, &val);
870 RTSX_DEBUGP("CARD_SHARE_MODE: 0x%x\n", val);
871 if (val & 0x04)
872 chip->baro_pkg = QFN;
873 else
874 chip->baro_pkg = LQFP;
875
876 RTSX_READ_REG(chip, 0xFE5A, &val);
877 if (val & 0x10)
878 chip->hw_bypass_sd = 1;
879 else
880 chip->hw_bypass_sd = 0;
881
882 retval = rtsx_read_cfg_dw(chip, 0, 0x718, &lval);
883 if (retval != STATUS_SUCCESS)
884 TRACE_RET(chip, STATUS_FAIL);
885
886 max_func = (u8)((lval >> 29) & 0x07);
887 RTSX_DEBUGP("Max function number: %d\n", max_func);
888 if (max_func == 0x02)
889 SET_SDIO_EXIST(chip);
890 else
891 CLR_SDIO_EXIST(chip);
892
893 if (chip->use_hw_setting) {
894 RTSX_READ_REG(chip, CHANGE_LINK_STATE, &val);
895 if (val & 0x80)
896 chip->auto_delink_en = 1;
897 else
898 chip->auto_delink_en = 0;
899
900 if (CHECK_BARO_PKG(chip, LQFP))
901 chip->lun_mode = SD_MS_1LUN;
902 else
903 chip->lun_mode = DEFAULT_SINGLE;
904
905 }
906
907 return STATUS_SUCCESS;
908}
909
910int rtsx_init_chip(struct rtsx_chip *chip)
911{
912 struct sd_info *sd_card = &(chip->sd_card);
913 struct xd_info *xd_card = &(chip->xd_card);
914 struct ms_info *ms_card = &(chip->ms_card);
915 int retval;
916 unsigned int i;
917
918 RTSX_DEBUGP("Vendor ID: 0x%04x, Product ID: 0x%04x\n",
919 chip->vendor_id, chip->product_id);
920
921 chip->ic_version = 0;
922
923#ifdef _MSG_TRACE
924 chip->msg_idx = 0;
925#endif
926
927 memset(xd_card, 0, sizeof(struct xd_info));
928 memset(sd_card, 0, sizeof(struct sd_info));
929 memset(ms_card, 0, sizeof(struct ms_info));
930
931 chip->xd_reset_counter = 0;
932 chip->sd_reset_counter = 0;
933 chip->ms_reset_counter = 0;
934
935 chip->xd_show_cnt = MAX_SHOW_CNT;
936 chip->sd_show_cnt = MAX_SHOW_CNT;
937 chip->ms_show_cnt = MAX_SHOW_CNT;
938
939 chip->sd_io = 0;
940 chip->auto_delink_cnt = 0;
941 chip->auto_delink_allowed = 1;
942 rtsx_set_stat(chip, RTSX_STAT_INIT);
943
944 chip->aspm_enabled = 0;
945 chip->chip_insert_with_sdio = 0;
946 chip->sdio_aspm = 0;
947 chip->sdio_idle = 0;
948 chip->sdio_counter = 0;
949 chip->cur_card = 0;
950 chip->phy_debug_mode = 0;
951 chip->sdio_func_exist = 0;
952 memset(chip->sdio_raw_data, 0, 12);
953
954 for (i = 0; i < MAX_ALLOWED_LUN_CNT; i++) {
955 set_sense_type(chip, i, SENSE_TYPE_NO_SENSE);
956 chip->rw_fail_cnt[i] = 0;
957 }
958
959 if (!check_sd_speed_prior(chip->sd_speed_prior))
960 chip->sd_speed_prior = 0x01040203;
961
962 RTSX_DEBUGP("sd_speed_prior = 0x%08x\n", chip->sd_speed_prior);
963
964 if (!check_sd_current_prior(chip->sd_current_prior))
965 chip->sd_current_prior = 0x00010203;
966
967 RTSX_DEBUGP("sd_current_prior = 0x%08x\n", chip->sd_current_prior);
968
969 if ((chip->sd_ddr_tx_phase > 31) || (chip->sd_ddr_tx_phase < 0))
970 chip->sd_ddr_tx_phase = 0;
971
972 if ((chip->mmc_ddr_tx_phase > 31) || (chip->mmc_ddr_tx_phase < 0))
973 chip->mmc_ddr_tx_phase = 0;
974
975 RTSX_WRITE_REG(chip, FPDCTL, SSC_POWER_DOWN, 0);
976 wait_timeout(200);
977 RTSX_WRITE_REG(chip, CLK_DIV, 0x07, 0x07);
978 RTSX_DEBUGP("chip->use_hw_setting = %d\n", chip->use_hw_setting);
979
980 if (CHECK_PID(chip, 0x5209)) {
981 retval = rts5209_init(chip);
982 if (retval != STATUS_SUCCESS)
983 TRACE_RET(chip, STATUS_FAIL);
984
985 } else if (CHECK_PID(chip, 0x5208)) {
986 retval = rts5208_init(chip);
987 if (retval != STATUS_SUCCESS)
988 TRACE_RET(chip, STATUS_FAIL);
989
990 } else if (CHECK_PID(chip, 0x5288)) {
991 retval = rts5288_init(chip);
992 if (retval != STATUS_SUCCESS)
993 TRACE_RET(chip, STATUS_FAIL);
994
995 }
996
997 if (chip->ss_en == 2)
998 chip->ss_en = 0;
999
1000 RTSX_DEBUGP("chip->asic_code = %d\n", chip->asic_code);
1001 RTSX_DEBUGP("chip->ic_version = 0x%x\n", chip->ic_version);
1002 RTSX_DEBUGP("chip->phy_debug_mode = %d\n", chip->phy_debug_mode);
1003 RTSX_DEBUGP("chip->aux_pwr_exist = %d\n", chip->aux_pwr_exist);
1004 RTSX_DEBUGP("chip->sdio_func_exist = %d\n", chip->sdio_func_exist);
1005 RTSX_DEBUGP("chip->hw_bypass_sd = %d\n", chip->hw_bypass_sd);
1006 RTSX_DEBUGP("chip->aspm_l0s_l1_en = %d\n", chip->aspm_l0s_l1_en);
1007 RTSX_DEBUGP("chip->lun_mode = %d\n", chip->lun_mode);
1008 RTSX_DEBUGP("chip->auto_delink_en = %d\n", chip->auto_delink_en);
1009 RTSX_DEBUGP("chip->ss_en = %d\n", chip->ss_en);
1010 RTSX_DEBUGP("chip->baro_pkg = %d\n", chip->baro_pkg);
1011
1012 if (CHECK_LUN_MODE(chip, SD_MS_2LUN)) {
1013 chip->card2lun[SD_CARD] = 0;
1014 chip->card2lun[MS_CARD] = 1;
1015 chip->card2lun[XD_CARD] = 0xFF;
1016 chip->lun2card[0] = SD_CARD;
1017 chip->lun2card[1] = MS_CARD;
1018 chip->max_lun = 1;
1019 SET_SDIO_IGNORED(chip);
1020 } else if (CHECK_LUN_MODE(chip, SD_MS_1LUN)) {
1021 chip->card2lun[SD_CARD] = 0;
1022 chip->card2lun[MS_CARD] = 0;
1023 chip->card2lun[XD_CARD] = 0xFF;
1024 chip->lun2card[0] = SD_CARD | MS_CARD;
1025 chip->max_lun = 0;
1026 } else {
1027 chip->card2lun[XD_CARD] = 0;
1028 chip->card2lun[SD_CARD] = 0;
1029 chip->card2lun[MS_CARD] = 0;
1030 chip->lun2card[0] = XD_CARD | SD_CARD | MS_CARD;
1031 chip->max_lun = 0;
1032 }
1033
1034 retval = rtsx_reset_chip(chip);
1035 if (retval != STATUS_SUCCESS)
1036 TRACE_RET(chip, STATUS_FAIL);
1037
1038 return STATUS_SUCCESS;
1039}
1040
1041void rtsx_release_chip(struct rtsx_chip *chip)
1042{
1043 xd_free_l2p_tbl(chip);
1044 ms_free_l2p_tbl(chip);
1045 chip->card_exist = 0;
1046 chip->card_ready = 0;
1047}
1048
1049#if !defined(LED_AUTO_BLINK) && defined(REGULAR_BLINK)
1050static inline void rtsx_blink_led(struct rtsx_chip *chip)
1051{
1052 if (chip->card_exist && chip->blink_led) {
1053 if (chip->led_toggle_counter < LED_TOGGLE_INTERVAL) {
1054 chip->led_toggle_counter++;
1055 } else {
1056 chip->led_toggle_counter = 0;
1057 toggle_gpio(chip, LED_GPIO);
1058 }
1059 }
1060}
1061#endif
1062
1063static void rtsx_monitor_aspm_config(struct rtsx_chip *chip)
1064{
1065 int maybe_support_aspm, reg_changed;
1066 u32 tmp = 0;
1067 u8 reg0 = 0, reg1 = 0;
1068
1069 maybe_support_aspm = 0;
1070 reg_changed = 0;
1071 rtsx_read_config_byte(chip, LCTLR, &reg0);
1072 if (chip->aspm_level[0] != reg0) {
1073 reg_changed = 1;
1074 chip->aspm_level[0] = reg0;
1075 }
1076 if (CHK_SDIO_EXIST(chip) && !CHK_SDIO_IGNORED(chip)) {
1077 rtsx_read_cfg_dw(chip, 1, 0xC0, &tmp);
1078 reg1 = (u8)tmp;
1079 if (chip->aspm_level[1] != reg1) {
1080 reg_changed = 1;
1081 chip->aspm_level[1] = reg1;
1082 }
1083
1084 if ((reg0 & 0x03) && (reg1 & 0x03))
1085 maybe_support_aspm = 1;
1086
1087 } else {
1088 if (reg0 & 0x03)
1089 maybe_support_aspm = 1;
1090
1091 }
1092
1093 if (reg_changed) {
1094 if (maybe_support_aspm)
1095 chip->aspm_l0s_l1_en = 0x03;
1096
1097 RTSX_DEBUGP("aspm_level[0] = 0x%02x, aspm_level[1] = 0x%02x\n",
1098 chip->aspm_level[0], chip->aspm_level[1]);
1099
1100 if (chip->aspm_l0s_l1_en) {
1101 chip->aspm_enabled = 1;
1102 } else {
1103 chip->aspm_enabled = 0;
1104 chip->sdio_aspm = 0;
1105 }
1106 rtsx_write_register(chip, ASPM_FORCE_CTL, 0xFF,
1107 0x30 | chip->aspm_level[0] | (chip->aspm_level[1] << 2));
1108 }
1109}
1110
1111void rtsx_polling_func(struct rtsx_chip *chip)
1112{
1113#ifdef SUPPORT_SD_LOCK
1114 struct sd_info *sd_card = &(chip->sd_card);
1115#endif
1116 int ss_allowed;
1117
1118 if (rtsx_chk_stat(chip, RTSX_STAT_SUSPEND))
1119 return;
1120
1121 if (rtsx_chk_stat(chip, RTSX_STAT_DELINK))
1122 goto Delink_Stage;
1123
1124 if (chip->polling_config) {
1125 u8 val;
1126 rtsx_read_config_byte(chip, 0, &val);
1127 }
1128
1129 if (rtsx_chk_stat(chip, RTSX_STAT_SS))
1130 return;
1131
1132#ifdef SUPPORT_OCP
1133 if (chip->ocp_int) {
1134 rtsx_read_register(chip, OCPSTAT, &(chip->ocp_stat));
1135
1136 if (CHECK_PID(chip, 0x5209) &&
1137 CHECK_LUN_MODE(chip, SD_MS_2LUN)) {
1138 if (chip->ocp_int & SD_OC_INT)
1139 sd_power_off_card3v3(chip);
1140 if (chip->ocp_int & MS_OC_INT)
1141 ms_power_off_card3v3(chip);
1142 } else {
1143 if (chip->card_exist & SD_CARD)
1144 sd_power_off_card3v3(chip);
1145 else if (chip->card_exist & MS_CARD)
1146 ms_power_off_card3v3(chip);
1147 else if (chip->card_exist & XD_CARD)
1148 xd_power_off_card3v3(chip);
1149
1150 }
1151
1152 chip->ocp_int = 0;
1153 }
1154#endif
1155
1156#ifdef SUPPORT_SD_LOCK
1157 if (sd_card->sd_erase_status) {
1158 if (chip->card_exist & SD_CARD) {
1159 u8 val;
1160 if (CHECK_PID(chip, 0x5209)) {
1161 rtsx_read_register(chip, SD_BUS_STAT, &val);
1162 if (val & SD_DAT0_STATUS) {
1163 sd_card->sd_erase_status = SD_NOT_ERASE;
1164 sd_card->sd_lock_notify = 1;
1165 chip->need_reinit |= SD_CARD;
1166 }
1167 } else {
1168 rtsx_read_register(chip, 0xFD30, &val);
1169 if (val & 0x02) {
1170 sd_card->sd_erase_status = SD_NOT_ERASE;
1171 sd_card->sd_lock_notify = 1;
1172 chip->need_reinit |= SD_CARD;
1173 }
1174 }
1175 } else {
1176 sd_card->sd_erase_status = SD_NOT_ERASE;
1177 }
1178 }
1179#endif
1180
1181 rtsx_init_cards(chip);
1182
1183 if (chip->ss_en) {
1184 ss_allowed = 1;
1185
1186 if (CHECK_PID(chip, 0x5288)) {
1187 ss_allowed = 0;
1188 } else {
1189 if (CHK_SDIO_EXIST(chip) && !CHK_SDIO_IGNORED(chip)) {
1190 u32 val;
1191 rtsx_read_cfg_dw(chip, 1, 0x04, &val);
1192 if (val & 0x07)
1193 ss_allowed = 0;
1194
1195 }
1196 }
1197 } else {
1198 ss_allowed = 0;
1199 }
1200
1201 if (ss_allowed && !chip->sd_io) {
1202 if (rtsx_get_stat(chip) != RTSX_STAT_IDLE) {
1203 chip->ss_counter = 0;
1204 } else {
1205 if (chip->ss_counter <
1206 (chip->ss_idle_period / POLLING_INTERVAL)) {
1207 chip->ss_counter++;
1208 } else {
1209 rtsx_exclusive_enter_ss(chip);
1210 return;
1211 }
1212 }
1213 }
1214
1215 if (CHECK_PID(chip, 0x5208)) {
1216 rtsx_monitor_aspm_config(chip);
1217
1218#ifdef SUPPORT_SDIO_ASPM
1219 if (CHK_SDIO_EXIST(chip) && !CHK_SDIO_IGNORED(chip) &&
1220 chip->aspm_l0s_l1_en && chip->dynamic_aspm) {
1221 if (chip->sd_io) {
1222 dynamic_configure_sdio_aspm(chip);
1223 } else {
1224 if (!chip->sdio_aspm) {
1225 RTSX_DEBUGP("SDIO enter ASPM!\n");
1226 rtsx_write_register(chip,
1227 ASPM_FORCE_CTL, 0xFC,
1228 0x30 | (chip->aspm_level[1] << 2));
1229 chip->sdio_aspm = 1;
1230 }
1231 }
1232 }
1233#endif
1234 }
1235
1236 if (chip->idle_counter < IDLE_MAX_COUNT) {
1237 chip->idle_counter++;
1238 } else {
1239 if (rtsx_get_stat(chip) != RTSX_STAT_IDLE) {
1240 RTSX_DEBUGP("Idle state!\n");
1241 rtsx_set_stat(chip, RTSX_STAT_IDLE);
1242
1243#if !defined(LED_AUTO_BLINK) && defined(REGULAR_BLINK)
1244 chip->led_toggle_counter = 0;
1245#endif
1246 rtsx_force_power_on(chip, SSC_PDCTL);
1247
1248 turn_off_led(chip, LED_GPIO);
1249
1250 if (chip->auto_power_down && !chip->card_ready && !chip->sd_io)
1251 rtsx_force_power_down(chip, SSC_PDCTL | OC_PDCTL);
1252
1253 }
1254 }
1255
1256 switch (rtsx_get_stat(chip)) {
1257 case RTSX_STAT_RUN:
1258#if !defined(LED_AUTO_BLINK) && defined(REGULAR_BLINK)
1259 rtsx_blink_led(chip);
1260#endif
1261 do_remaining_work(chip);
1262 break;
1263
1264 case RTSX_STAT_IDLE:
1265 if (chip->sd_io && !chip->sd_int)
1266 try_to_switch_sdio_ctrl(chip);
1267
1268 rtsx_enable_aspm(chip);
1269 break;
1270
1271 default:
1272 break;
1273 }
1274
1275
1276#ifdef SUPPORT_OCP
1277 if (CHECK_LUN_MODE(chip, SD_MS_2LUN)) {
1278#ifdef CONFIG_RTS_PSTOR_DEBUG
1279 if (chip->ocp_stat & (SD_OC_NOW | SD_OC_EVER | MS_OC_NOW | MS_OC_EVER))
1280 RTSX_DEBUGP("Over current, OCPSTAT is 0x%x\n", chip->ocp_stat);
1281#endif
1282
1283 if (chip->ocp_stat & (SD_OC_NOW | SD_OC_EVER)) {
1284 if (chip->card_exist & SD_CARD) {
1285 rtsx_write_register(chip, CARD_OE, SD_OUTPUT_EN, 0);
1286 card_power_off(chip, SD_CARD);
1287 chip->card_fail |= SD_CARD;
1288 }
1289 }
1290 if (chip->ocp_stat & (MS_OC_NOW | MS_OC_EVER)) {
1291 if (chip->card_exist & MS_CARD) {
1292 rtsx_write_register(chip, CARD_OE, MS_OUTPUT_EN, 0);
1293 card_power_off(chip, MS_CARD);
1294 chip->card_fail |= MS_CARD;
1295 }
1296 }
1297 } else {
1298 if (chip->ocp_stat & (SD_OC_NOW | SD_OC_EVER)) {
1299 RTSX_DEBUGP("Over current, OCPSTAT is 0x%x\n", chip->ocp_stat);
1300 if (chip->card_exist & SD_CARD) {
1301 rtsx_write_register(chip, CARD_OE, SD_OUTPUT_EN, 0);
1302 chip->card_fail |= SD_CARD;
1303 } else if (chip->card_exist & MS_CARD) {
1304 rtsx_write_register(chip, CARD_OE, MS_OUTPUT_EN, 0);
1305 chip->card_fail |= MS_CARD;
1306 } else if (chip->card_exist & XD_CARD) {
1307 rtsx_write_register(chip, CARD_OE, XD_OUTPUT_EN, 0);
1308 chip->card_fail |= XD_CARD;
1309 }
1310 card_power_off(chip, SD_CARD);
1311 }
1312 }
1313#endif
1314
1315Delink_Stage:
1316 if (chip->auto_delink_en && chip->auto_delink_allowed &&
1317 !chip->card_ready && !chip->card_ejected && !chip->sd_io) {
1318 int enter_L1 = chip->auto_delink_in_L1 && (chip->aspm_l0s_l1_en || chip->ss_en);
1319 int delink_stage1_cnt = chip->delink_stage1_step;
1320 int delink_stage2_cnt = delink_stage1_cnt + chip->delink_stage2_step;
1321 int delink_stage3_cnt = delink_stage2_cnt + chip->delink_stage3_step;
1322
1323 if (chip->auto_delink_cnt <= delink_stage3_cnt) {
1324 if (chip->auto_delink_cnt == delink_stage1_cnt) {
1325 rtsx_set_stat(chip, RTSX_STAT_DELINK);
1326
1327 if (chip->asic_code && CHECK_PID(chip, 0x5208))
1328 rtsx_set_phy_reg_bit(chip, 0x1C, 2);
1329
1330 if (chip->card_exist) {
1331 RTSX_DEBUGP("False card inserted, do force delink\n");
1332
1333 if (enter_L1)
1334 rtsx_write_register(chip, HOST_SLEEP_STATE, 0x03, 1);
1335
1336 rtsx_write_register(chip, CHANGE_LINK_STATE, 0x0A, 0x0A);
1337
1338 if (enter_L1)
1339 rtsx_enter_L1(chip);
1340
1341 chip->auto_delink_cnt = delink_stage3_cnt + 1;
1342 } else {
1343 RTSX_DEBUGP("No card inserted, do delink\n");
1344
1345 if (enter_L1)
1346 rtsx_write_register(chip, HOST_SLEEP_STATE, 0x03, 1);
1347
1348#ifdef HW_INT_WRITE_CLR
1349 if (CHECK_PID(chip, 0x5209)) {
1350 rtsx_writel(chip, RTSX_BIPR, 0xFFFFFFFF);
1351 RTSX_DEBUGP("RTSX_BIPR: 0x%x\n", rtsx_readl(chip, RTSX_BIPR));
1352 }
1353#endif
1354 rtsx_write_register(chip, CHANGE_LINK_STATE, 0x02, 0x02);
1355
1356 if (enter_L1)
1357 rtsx_enter_L1(chip);
1358
1359 }
1360 }
1361
1362 if (chip->auto_delink_cnt == delink_stage2_cnt) {
1363 RTSX_DEBUGP("Try to do force delink\n");
1364
1365 if (enter_L1)
1366 rtsx_exit_L1(chip);
1367
1368 if (chip->asic_code && CHECK_PID(chip, 0x5208))
1369 rtsx_set_phy_reg_bit(chip, 0x1C, 2);
1370
1371 rtsx_write_register(chip, CHANGE_LINK_STATE, 0x0A, 0x0A);
1372 }
1373
1374 chip->auto_delink_cnt++;
1375 }
1376 } else {
1377 chip->auto_delink_cnt = 0;
1378 }
1379}
1380
1381void rtsx_undo_delink(struct rtsx_chip *chip)
1382{
1383 chip->auto_delink_allowed = 0;
1384 rtsx_write_register(chip, CHANGE_LINK_STATE, 0x0A, 0x00);
1385}
1386
1387/**
1388 * rtsx_stop_cmd - stop command transfer and DMA transfer
1389 * @chip: Realtek's card reader chip
1390 * @card: flash card type
1391 *
1392 * Stop command transfer and DMA transfer.
1393 * This function is called in error handler.
1394 */
1395void rtsx_stop_cmd(struct rtsx_chip *chip, int card)
1396{
1397 int i;
1398
1399 for (i = 0; i <= 8; i++) {
1400 int addr = RTSX_HCBAR + i * 4;
1401 u32 reg;
1402 reg = rtsx_readl(chip, addr);
1403 RTSX_DEBUGP("BAR (0x%02x): 0x%08x\n", addr, reg);
1404 }
1405 rtsx_writel(chip, RTSX_HCBCTLR, STOP_CMD);
1406 rtsx_writel(chip, RTSX_HDBCTLR, STOP_DMA);
1407
1408 for (i = 0; i < 16; i++) {
1409 u16 addr = 0xFE20 + (u16)i;
1410 u8 val;
1411 rtsx_read_register(chip, addr, &val);
1412 RTSX_DEBUGP("0x%04X: 0x%02x\n", addr, val);
1413 }
1414
1415 rtsx_write_register(chip, DMACTL, 0x80, 0x80);
1416 rtsx_write_register(chip, RBCTL, 0x80, 0x80);
1417}
1418
1419#define MAX_RW_REG_CNT 1024
1420
1421int rtsx_write_register(struct rtsx_chip *chip, u16 addr, u8 mask, u8 data)
1422{
1423 int i;
1424 u32 val = 3 << 30;
1425
1426 val |= (u32)(addr & 0x3FFF) << 16;
1427 val |= (u32)mask << 8;
1428 val |= (u32)data;
1429
1430 rtsx_writel(chip, RTSX_HAIMR, val);
1431
1432 for (i = 0; i < MAX_RW_REG_CNT; i++) {
1433 val = rtsx_readl(chip, RTSX_HAIMR);
1434 if ((val & (1 << 31)) == 0) {
1435 if (data != (u8)val)
1436 TRACE_RET(chip, STATUS_FAIL);
1437
1438 return STATUS_SUCCESS;
1439 }
1440 }
1441
1442 TRACE_RET(chip, STATUS_TIMEDOUT);
1443}
1444
1445int rtsx_read_register(struct rtsx_chip *chip, u16 addr, u8 *data)
1446{
1447 u32 val = 2 << 30;
1448 int i;
1449
1450 if (data)
1451 *data = 0;
1452
1453 val |= (u32)(addr & 0x3FFF) << 16;
1454
1455 rtsx_writel(chip, RTSX_HAIMR, val);
1456
1457 for (i = 0; i < MAX_RW_REG_CNT; i++) {
1458 val = rtsx_readl(chip, RTSX_HAIMR);
1459 if ((val & (1 << 31)) == 0)
1460 break;
1461 }
1462
1463 if (i >= MAX_RW_REG_CNT)
1464 TRACE_RET(chip, STATUS_TIMEDOUT);
1465
1466 if (data)
1467 *data = (u8)(val & 0xFF);
1468
1469 return STATUS_SUCCESS;
1470}
1471
1472int rtsx_write_cfg_dw(struct rtsx_chip *chip, u8 func_no, u16 addr, u32 mask, u32 val)
1473{
1474 u8 mode = 0, tmp;
1475 int i;
1476
1477 for (i = 0; i < 4; i++) {
1478 if (mask & 0xFF) {
1479 RTSX_WRITE_REG(chip, CFGDATA0 + i,
1480 0xFF, (u8)(val & mask & 0xFF));
1481 mode |= (1 << i);
1482 }
1483 mask >>= 8;
1484 val >>= 8;
1485 }
1486
1487 if (mode) {
1488 RTSX_WRITE_REG(chip, CFGADDR0, 0xFF, (u8)addr);
1489 RTSX_WRITE_REG(chip, CFGADDR1, 0xFF, (u8)(addr >> 8));
1490
1491 RTSX_WRITE_REG(chip, CFGRWCTL, 0xFF,
1492 0x80 | mode | ((func_no & 0x03) << 4));
1493
1494 for (i = 0; i < MAX_RW_REG_CNT; i++) {
1495 RTSX_READ_REG(chip, CFGRWCTL, &tmp);
1496 if ((tmp & 0x80) == 0)
1497 break;
1498 }
1499 }
1500
1501 return STATUS_SUCCESS;
1502}
1503
1504int rtsx_read_cfg_dw(struct rtsx_chip *chip, u8 func_no, u16 addr, u32 *val)
1505{
1506 int i;
1507 u8 tmp;
1508 u32 data = 0;
1509
1510 RTSX_WRITE_REG(chip, CFGADDR0, 0xFF, (u8)addr);
1511 RTSX_WRITE_REG(chip, CFGADDR1, 0xFF, (u8)(addr >> 8));
1512 RTSX_WRITE_REG(chip, CFGRWCTL, 0xFF, 0x80 | ((func_no & 0x03) << 4));
1513
1514 for (i = 0; i < MAX_RW_REG_CNT; i++) {
1515 RTSX_READ_REG(chip, CFGRWCTL, &tmp);
1516 if ((tmp & 0x80) == 0)
1517 break;
1518 }
1519
1520 for (i = 0; i < 4; i++) {
1521 RTSX_READ_REG(chip, CFGDATA0 + i, &tmp);
1522 data |= (u32)tmp << (i * 8);
1523 }
1524
1525 if (val)
1526 *val = data;
1527
1528 return STATUS_SUCCESS;
1529}
1530
1531int rtsx_write_cfg_seq(struct rtsx_chip *chip, u8 func, u16 addr, u8 *buf, int len)
1532{
1533 u32 *data, *mask;
1534 u16 offset = addr % 4;
1535 u16 aligned_addr = addr - offset;
1536 int dw_len, i, j;
1537 int retval;
1538
1539 RTSX_DEBUGP("%s\n", __func__);
1540
1541 if (!buf)
1542 TRACE_RET(chip, STATUS_NOMEM);
1543
1544 if ((len + offset) % 4)
1545 dw_len = (len + offset) / 4 + 1;
1546 else
1547 dw_len = (len + offset) / 4;
1548
1549 RTSX_DEBUGP("dw_len = %d\n", dw_len);
1550
1551 data = vzalloc(dw_len * 4);
1552 if (!data)
1553 TRACE_RET(chip, STATUS_NOMEM);
1554
1555 mask = vzalloc(dw_len * 4);
1556 if (!mask) {
1557 vfree(data);
1558 TRACE_RET(chip, STATUS_NOMEM);
1559 }
1560
1561 j = 0;
1562 for (i = 0; i < len; i++) {
1563 mask[j] |= 0xFF << (offset * 8);
1564 data[j] |= buf[i] << (offset * 8);
1565 if (++offset == 4) {
1566 j++;
1567 offset = 0;
1568 }
1569 }
1570
1571 RTSX_DUMP(mask, dw_len * 4);
1572 RTSX_DUMP(data, dw_len * 4);
1573
1574 for (i = 0; i < dw_len; i++) {
1575 retval = rtsx_write_cfg_dw(chip, func, aligned_addr + i * 4, mask[i], data[i]);
1576 if (retval != STATUS_SUCCESS) {
1577 vfree(data);
1578 vfree(mask);
1579 TRACE_RET(chip, STATUS_FAIL);
1580 }
1581 }
1582
1583 vfree(data);
1584 vfree(mask);
1585
1586 return STATUS_SUCCESS;
1587}
1588
1589int rtsx_read_cfg_seq(struct rtsx_chip *chip, u8 func, u16 addr, u8 *buf, int len)
1590{
1591 u32 *data;
1592 u16 offset = addr % 4;
1593 u16 aligned_addr = addr - offset;
1594 int dw_len, i, j;
1595 int retval;
1596
1597 RTSX_DEBUGP("%s\n", __func__);
1598
1599 if ((len + offset) % 4)
1600 dw_len = (len + offset) / 4 + 1;
1601 else
1602 dw_len = (len + offset) / 4;
1603
1604 RTSX_DEBUGP("dw_len = %d\n", dw_len);
1605
1606 data = (u32 *)vmalloc(dw_len * 4);
1607 if (!data)
1608 TRACE_RET(chip, STATUS_NOMEM);
1609
1610 for (i = 0; i < dw_len; i++) {
1611 retval = rtsx_read_cfg_dw(chip, func, aligned_addr + i * 4, data + i);
1612 if (retval != STATUS_SUCCESS) {
1613 vfree(data);
1614 TRACE_RET(chip, STATUS_FAIL);
1615 }
1616 }
1617
1618 if (buf) {
1619 j = 0;
1620
1621 for (i = 0; i < len; i++) {
1622 buf[i] = (u8)(data[j] >> (offset * 8));
1623 if (++offset == 4) {
1624 j++;
1625 offset = 0;
1626 }
1627 }
1628 }
1629
1630 vfree(data);
1631
1632 return STATUS_SUCCESS;
1633}
1634
1635int rtsx_write_phy_register(struct rtsx_chip *chip, u8 addr, u16 val)
1636{
1637 int i, finished = 0;
1638 u8 tmp;
1639
1640 RTSX_WRITE_REG(chip, PHYDATA0, 0xFF, (u8)val);
1641 RTSX_WRITE_REG(chip, PHYDATA1, 0xFF, (u8)(val >> 8));
1642 RTSX_WRITE_REG(chip, PHYADDR, 0xFF, addr);
1643 RTSX_WRITE_REG(chip, PHYRWCTL, 0xFF, 0x81);
1644
1645 for (i = 0; i < 100000; i++) {
1646 RTSX_READ_REG(chip, PHYRWCTL, &tmp);
1647 if (!(tmp & 0x80)) {
1648 finished = 1;
1649 break;
1650 }
1651 }
1652
1653 if (!finished)
1654 TRACE_RET(chip, STATUS_FAIL);
1655
1656 return STATUS_SUCCESS;
1657}
1658
1659int rtsx_read_phy_register(struct rtsx_chip *chip, u8 addr, u16 *val)
1660{
1661 int i, finished = 0;
1662 u16 data = 0;
1663 u8 tmp;
1664
1665 RTSX_WRITE_REG(chip, PHYADDR, 0xFF, addr);
1666 RTSX_WRITE_REG(chip, PHYRWCTL, 0xFF, 0x80);
1667
1668 for (i = 0; i < 100000; i++) {
1669 RTSX_READ_REG(chip, PHYRWCTL, &tmp);
1670 if (!(tmp & 0x80)) {
1671 finished = 1;
1672 break;
1673 }
1674 }
1675
1676 if (!finished)
1677 TRACE_RET(chip, STATUS_FAIL);
1678
1679 RTSX_READ_REG(chip, PHYDATA0, &tmp);
1680 data = tmp;
1681 RTSX_READ_REG(chip, PHYDATA1, &tmp);
1682 data |= (u16)tmp << 8;
1683
1684 if (val)
1685 *val = data;
1686
1687 return STATUS_SUCCESS;
1688}
1689
1690int rtsx_read_efuse(struct rtsx_chip *chip, u8 addr, u8 *val)
1691{
1692 int i;
1693 u8 data = 0;
1694
1695 RTSX_WRITE_REG(chip, EFUSE_CTRL, 0xFF, 0x80|addr);
1696
1697 for (i = 0; i < 100; i++) {
1698 RTSX_READ_REG(chip, EFUSE_CTRL, &data);
1699 if (!(data & 0x80))
1700 break;
1701 udelay(1);
1702 }
1703
1704 if (data & 0x80)
1705 TRACE_RET(chip, STATUS_TIMEDOUT);
1706
1707 RTSX_READ_REG(chip, EFUSE_DATA, &data);
1708 if (val)
1709 *val = data;
1710
1711 return STATUS_SUCCESS;
1712}
1713
1714int rtsx_write_efuse(struct rtsx_chip *chip, u8 addr, u8 val)
1715{
1716 int i, j;
1717 u8 data = 0, tmp = 0xFF;
1718
1719 for (i = 0; i < 8; i++) {
1720 if (val & (u8)(1 << i))
1721 continue;
1722
1723 tmp &= (~(u8)(1 << i));
1724 RTSX_DEBUGP("Write 0x%x to 0x%x\n", tmp, addr);
1725
1726 RTSX_WRITE_REG(chip, EFUSE_DATA, 0xFF, tmp);
1727 RTSX_WRITE_REG(chip, EFUSE_CTRL, 0xFF, 0xA0|addr);
1728
1729 for (j = 0; j < 100; j++) {
1730 RTSX_READ_REG(chip, EFUSE_CTRL, &data);
1731 if (!(data & 0x80))
1732 break;
1733 wait_timeout(3);
1734 }
1735
1736 if (data & 0x80)
1737 TRACE_RET(chip, STATUS_TIMEDOUT);
1738
1739 wait_timeout(5);
1740 }
1741
1742 return STATUS_SUCCESS;
1743}
1744
1745int rtsx_clr_phy_reg_bit(struct rtsx_chip *chip, u8 reg, u8 bit)
1746{
1747 int retval;
1748 u16 value;
1749
1750 retval = rtsx_read_phy_register(chip, reg, &value);
1751 if (retval != STATUS_SUCCESS)
1752 TRACE_RET(chip, STATUS_FAIL);
1753
1754 if (value & (1 << bit)) {
1755 value &= ~(1 << bit);
1756 retval = rtsx_write_phy_register(chip, reg, value);
1757 if (retval != STATUS_SUCCESS)
1758 TRACE_RET(chip, STATUS_FAIL);
1759 }
1760
1761 return STATUS_SUCCESS;
1762}
1763
1764int rtsx_set_phy_reg_bit(struct rtsx_chip *chip, u8 reg, u8 bit)
1765{
1766 int retval;
1767 u16 value;
1768
1769 retval = rtsx_read_phy_register(chip, reg, &value);
1770 if (retval != STATUS_SUCCESS)
1771 TRACE_RET(chip, STATUS_FAIL);
1772
1773 if (0 == (value & (1 << bit))) {
1774 value |= (1 << bit);
1775 retval = rtsx_write_phy_register(chip, reg, value);
1776 if (retval != STATUS_SUCCESS)
1777 TRACE_RET(chip, STATUS_FAIL);
1778 }
1779
1780 return STATUS_SUCCESS;
1781}
1782
1783int rtsx_check_link_ready(struct rtsx_chip *chip)
1784{
1785 u8 val;
1786
1787 RTSX_READ_REG(chip, IRQSTAT0, &val);
1788
1789 RTSX_DEBUGP("IRQSTAT0: 0x%x\n", val);
1790 if (val & LINK_RDY_INT) {
1791 RTSX_DEBUGP("Delinked!\n");
1792 rtsx_write_register(chip, IRQSTAT0, LINK_RDY_INT, LINK_RDY_INT);
1793 return STATUS_FAIL;
1794 }
1795
1796 return STATUS_SUCCESS;
1797}
1798
1799static void rtsx_handle_pm_dstate(struct rtsx_chip *chip, u8 dstate)
1800{
1801 u32 ultmp;
1802
1803 RTSX_DEBUGP("%04x set pm_dstate to %d\n", chip->product_id, dstate);
1804
1805 if (CHK_SDIO_EXIST(chip)) {
1806 u8 func_no;
1807
1808 if (CHECK_PID(chip, 0x5288))
1809 func_no = 2;
1810 else
1811 func_no = 1;
1812
1813 rtsx_read_cfg_dw(chip, func_no, 0x84, &ultmp);
1814 RTSX_DEBUGP("pm_dstate of function %d: 0x%x\n", (int)func_no, ultmp);
1815 rtsx_write_cfg_dw(chip, func_no, 0x84, 0xFF, dstate);
1816 }
1817
1818 rtsx_write_config_byte(chip, 0x44, dstate);
1819 rtsx_write_config_byte(chip, 0x45, 0);
1820}
1821
1822void rtsx_enter_L1(struct rtsx_chip *chip)
1823{
1824 rtsx_handle_pm_dstate(chip, 2);
1825}
1826
1827void rtsx_exit_L1(struct rtsx_chip *chip)
1828{
1829 rtsx_write_config_byte(chip, 0x44, 0);
1830 rtsx_write_config_byte(chip, 0x45, 0);
1831}
1832
1833void rtsx_enter_ss(struct rtsx_chip *chip)
1834{
1835 RTSX_DEBUGP("Enter Selective Suspend State!\n");
1836
1837 rtsx_write_register(chip, IRQSTAT0, LINK_RDY_INT, LINK_RDY_INT);
1838
1839 if (chip->power_down_in_ss) {
1840 rtsx_power_off_card(chip);
1841 rtsx_force_power_down(chip, SSC_PDCTL | OC_PDCTL);
1842 }
1843
1844 if (CHK_SDIO_EXIST(chip)) {
1845 if (CHECK_PID(chip, 0x5288))
1846 rtsx_write_cfg_dw(chip, 2, 0xC0, 0xFF00, 0x0100);
1847 else
1848 rtsx_write_cfg_dw(chip, 1, 0xC0, 0xFF00, 0x0100);
1849 }
1850
1851 if (chip->auto_delink_en) {
1852 rtsx_write_register(chip, HOST_SLEEP_STATE, 0x01, 0x01);
1853 } else {
1854 if (!chip->phy_debug_mode) {
1855 u32 tmp;
1856 tmp = rtsx_readl(chip, RTSX_BIER);
1857 tmp |= CARD_INT;
1858 rtsx_writel(chip, RTSX_BIER, tmp);
1859 }
1860
1861 rtsx_write_register(chip, CHANGE_LINK_STATE, 0x02, 0);
1862 }
1863
1864 rtsx_enter_L1(chip);
1865
1866 RTSX_CLR_DELINK(chip);
1867 rtsx_set_stat(chip, RTSX_STAT_SS);
1868}
1869
1870void rtsx_exit_ss(struct rtsx_chip *chip)
1871{
1872 RTSX_DEBUGP("Exit Selective Suspend State!\n");
1873
1874 rtsx_exit_L1(chip);
1875
1876 if (chip->power_down_in_ss) {
1877 rtsx_force_power_on(chip, SSC_PDCTL | OC_PDCTL);
1878 udelay(1000);
1879 }
1880
1881 if (RTSX_TST_DELINK(chip)) {
1882 chip->need_reinit = SD_CARD | MS_CARD | XD_CARD;
1883 rtsx_reinit_cards(chip, 1);
1884 RTSX_CLR_DELINK(chip);
1885 } else if (chip->power_down_in_ss) {
1886 chip->need_reinit = SD_CARD | MS_CARD | XD_CARD;
1887 rtsx_reinit_cards(chip, 0);
1888 }
1889}
1890
1891int rtsx_pre_handle_interrupt(struct rtsx_chip *chip)
1892{
1893 u32 status, int_enable;
1894 int exit_ss = 0;
1895#ifdef SUPPORT_OCP
1896 u32 ocp_int = 0;
1897
1898 if (CHECK_PID(chip, 0x5209)) {
1899 if (CHECK_LUN_MODE(chip, SD_MS_2LUN))
1900 ocp_int = MS_OC_INT | SD_OC_INT;
1901 else
1902 ocp_int = SD_OC_INT;
1903
1904 } else {
1905 ocp_int = OC_INT;
1906 }
1907#endif
1908
1909 if (chip->ss_en) {
1910 chip->ss_counter = 0;
1911 if (rtsx_get_stat(chip) == RTSX_STAT_SS) {
1912 exit_ss = 1;
1913 rtsx_exit_L1(chip);
1914 rtsx_set_stat(chip, RTSX_STAT_RUN);
1915 }
1916 }
1917
1918 int_enable = rtsx_readl(chip, RTSX_BIER);
1919 chip->int_reg = rtsx_readl(chip, RTSX_BIPR);
1920
1921#ifdef HW_INT_WRITE_CLR
1922 if (CHECK_PID(chip, 0x5209))
1923 rtsx_writel(chip, RTSX_BIPR, chip->int_reg);
1924#endif
1925
1926 if (((chip->int_reg & int_enable) == 0) || (chip->int_reg == 0xFFFFFFFF))
1927 return STATUS_FAIL;
1928
1929 if (!chip->msi_en) {
1930 if (CHECK_PID(chip, 0x5209)) {
1931 u8 val;
1932 rtsx_read_config_byte(chip, 0x05, &val);
1933 if (val & 0x04)
1934 return STATUS_FAIL;
1935 }
1936 }
1937
1938 status = chip->int_reg &= (int_enable | 0x7FFFFF);
1939
1940 if (status & CARD_INT) {
1941 chip->auto_delink_cnt = 0;
1942
1943 if (status & SD_INT) {
1944 if (status & SD_EXIST) {
1945 set_bit(SD_NR, &(chip->need_reset));
1946 } else {
1947 set_bit(SD_NR, &(chip->need_release));
1948 chip->sd_reset_counter = 0;
1949 chip->sd_show_cnt = 0;
1950 clear_bit(SD_NR, &(chip->need_reset));
1951 }
1952 } else {
1953 /* If multi-luns, it's possible that
1954 when plugging/unplugging one card
1955 there is another card which still
1956 exists in the slot. In this case,
1957 all existed cards should be reset.
1958 */
1959 if (exit_ss && (status & SD_EXIST))
1960 set_bit(SD_NR, &(chip->need_reinit));
1961 }
1962 if (!CHECK_PID(chip, 0x5288) || CHECK_BARO_PKG(chip, QFN)) {
1963 if (status & XD_INT) {
1964 if (status & XD_EXIST) {
1965 set_bit(XD_NR, &(chip->need_reset));
1966 } else {
1967 set_bit(XD_NR, &(chip->need_release));
1968 chip->xd_reset_counter = 0;
1969 chip->xd_show_cnt = 0;
1970 clear_bit(XD_NR, &(chip->need_reset));
1971 }
1972 } else {
1973 if (exit_ss && (status & XD_EXIST))
1974 set_bit(XD_NR, &(chip->need_reinit));
1975 }
1976 }
1977 if (status & MS_INT) {
1978 if (status & MS_EXIST) {
1979 set_bit(MS_NR, &(chip->need_reset));
1980 } else {
1981 set_bit(MS_NR, &(chip->need_release));
1982 chip->ms_reset_counter = 0;
1983 chip->ms_show_cnt = 0;
1984 clear_bit(MS_NR, &(chip->need_reset));
1985 }
1986 } else {
1987 if (exit_ss && (status & MS_EXIST))
1988 set_bit(MS_NR, &(chip->need_reinit));
1989 }
1990 }
1991
1992#ifdef SUPPORT_OCP
1993 chip->ocp_int = ocp_int & status;
1994#endif
1995
1996 if (chip->sd_io) {
1997 if (chip->int_reg & DATA_DONE_INT)
1998 chip->int_reg &= ~(u32)DATA_DONE_INT;
1999 }
2000
2001 return STATUS_SUCCESS;
2002}
2003
2004void rtsx_do_before_power_down(struct rtsx_chip *chip, int pm_stat)
2005{
2006 int retval;
2007
2008 RTSX_DEBUGP("rtsx_do_before_power_down, pm_stat = %d\n", pm_stat);
2009
2010 rtsx_set_stat(chip, RTSX_STAT_SUSPEND);
2011
2012 retval = rtsx_force_power_on(chip, SSC_PDCTL);
2013 if (retval != STATUS_SUCCESS)
2014 return;
2015
2016 rtsx_release_cards(chip);
2017 rtsx_disable_bus_int(chip);
2018 turn_off_led(chip, LED_GPIO);
2019
2020#ifdef HW_AUTO_SWITCH_SD_BUS
2021 if (chip->sd_io) {
2022 chip->sdio_in_charge = 1;
2023 if (CHECK_PID(chip, 0x5208)) {
2024 rtsx_write_register(chip, TLPTISTAT, 0x08, 0x08);
2025 /* Enable sdio_bus_auto_switch */
2026 rtsx_write_register(chip, 0xFE70, 0x80, 0x80);
2027 } else if (CHECK_PID(chip, 0x5288)) {
2028 rtsx_write_register(chip, TLPTISTAT, 0x08, 0x08);
2029 /* Enable sdio_bus_auto_switch */
2030 rtsx_write_register(chip, 0xFE5A, 0x08, 0x08);
2031 } else if (CHECK_PID(chip, 0x5209)) {
2032 rtsx_write_register(chip, TLPTISTAT, 0x10, 0x10);
2033 /* Enable sdio_bus_auto_switch */
2034 rtsx_write_register(chip, SDIO_CFG, SDIO_BUS_AUTO_SWITCH, SDIO_BUS_AUTO_SWITCH);
2035 }
2036 }
2037#endif
2038
2039 if (CHECK_PID(chip, 0x5208) && (chip->ic_version >= IC_VER_D)) {
2040 /* u_force_clkreq_0 */
2041 rtsx_write_register(chip, PETXCFG, 0x08, 0x08);
2042 } else if (CHECK_PID(chip, 0x5209)) {
2043 /* u_force_clkreq_0 */
2044 rtsx_write_register(chip, PETXCFG, 0x08, 0x08);
2045 }
2046
2047 if (pm_stat == PM_S1) {
2048 RTSX_DEBUGP("Host enter S1\n");
2049 rtsx_write_register(chip, HOST_SLEEP_STATE, 0x03, HOST_ENTER_S1);
2050 } else if (pm_stat == PM_S3) {
2051 if (chip->s3_pwr_off_delay > 0)
2052 wait_timeout(chip->s3_pwr_off_delay);
2053
2054 RTSX_DEBUGP("Host enter S3\n");
2055 rtsx_write_register(chip, HOST_SLEEP_STATE, 0x03, HOST_ENTER_S3);
2056 }
2057
2058 if (chip->do_delink_before_power_down && chip->auto_delink_en)
2059 rtsx_write_register(chip, CHANGE_LINK_STATE, 0x02, 2);
2060
2061 rtsx_force_power_down(chip, SSC_PDCTL | OC_PDCTL);
2062
2063 chip->cur_clk = 0;
2064 chip->cur_card = 0;
2065 chip->card_exist = 0;
2066}
2067
2068void rtsx_enable_aspm(struct rtsx_chip *chip)
2069{
2070 if (chip->aspm_l0s_l1_en && chip->dynamic_aspm) {
2071 if (!chip->aspm_enabled) {
2072 RTSX_DEBUGP("Try to enable ASPM\n");
2073 chip->aspm_enabled = 1;
2074
2075 if (chip->asic_code && CHECK_PID(chip, 0x5208))
2076 rtsx_write_phy_register(chip, 0x07, 0);
2077 if (CHECK_PID(chip, 0x5208)) {
2078 rtsx_write_register(chip, ASPM_FORCE_CTL, 0xF3,
2079 0x30 | chip->aspm_level[0]);
2080 } else {
2081 rtsx_write_config_byte(chip, LCTLR, chip->aspm_l0s_l1_en);
2082 }
2083
2084 if (CHK_SDIO_EXIST(chip)) {
2085 u16 val = chip->aspm_l0s_l1_en | 0x0100;
2086 if (CHECK_PID(chip, 0x5288))
2087 rtsx_write_cfg_dw(chip, 2, 0xC0, 0xFFFF, val);
2088 else
2089 rtsx_write_cfg_dw(chip, 1, 0xC0, 0xFFFF, val);
2090 }
2091 }
2092 }
2093
2094 return;
2095}
2096
2097void rtsx_disable_aspm(struct rtsx_chip *chip)
2098{
2099 if (CHECK_PID(chip, 0x5208))
2100 rtsx_monitor_aspm_config(chip);
2101
2102 if (chip->aspm_l0s_l1_en && chip->dynamic_aspm) {
2103 if (chip->aspm_enabled) {
2104 RTSX_DEBUGP("Try to disable ASPM\n");
2105 chip->aspm_enabled = 0;
2106
2107 if (chip->asic_code && CHECK_PID(chip, 0x5208))
2108 rtsx_write_phy_register(chip, 0x07, 0x0129);
2109 if (CHECK_PID(chip, 0x5208))
2110 rtsx_write_register(chip, ASPM_FORCE_CTL, 0xF3, 0x30);
2111 else
2112 rtsx_write_config_byte(chip, LCTLR, 0x00);
2113
2114 wait_timeout(1);
2115 }
2116 }
2117
2118 return;
2119}
2120
2121int rtsx_read_ppbuf(struct rtsx_chip *chip, u8 *buf, int buf_len)
2122{
2123 int retval;
2124 int i, j;
2125 u16 reg_addr;
2126 u8 *ptr;
2127
2128 if (!buf)
2129 TRACE_RET(chip, STATUS_ERROR);
2130
2131 ptr = buf;
2132 reg_addr = PPBUF_BASE2;
2133 for (i = 0; i < buf_len/256; i++) {
2134 rtsx_init_cmd(chip);
2135
2136 for (j = 0; j < 256; j++)
2137 rtsx_add_cmd(chip, READ_REG_CMD, reg_addr++, 0, 0);
2138
2139 retval = rtsx_send_cmd(chip, 0, 250);
2140 if (retval < 0)
2141 TRACE_RET(chip, STATUS_FAIL);
2142
2143 memcpy(ptr, rtsx_get_cmd_data(chip), 256);
2144 ptr += 256;
2145 }
2146
2147 if (buf_len%256) {
2148 rtsx_init_cmd(chip);
2149
2150 for (j = 0; j < buf_len%256; j++)
2151 rtsx_add_cmd(chip, READ_REG_CMD, reg_addr++, 0, 0);
2152
2153 retval = rtsx_send_cmd(chip, 0, 250);
2154 if (retval < 0)
2155 TRACE_RET(chip, STATUS_FAIL);
2156 }
2157
2158 memcpy(ptr, rtsx_get_cmd_data(chip), buf_len%256);
2159
2160 return STATUS_SUCCESS;
2161}
2162
2163int rtsx_write_ppbuf(struct rtsx_chip *chip, u8 *buf, int buf_len)
2164{
2165 int retval;
2166 int i, j;
2167 u16 reg_addr;
2168 u8 *ptr;
2169
2170 if (!buf)
2171 TRACE_RET(chip, STATUS_ERROR);
2172
2173 ptr = buf;
2174 reg_addr = PPBUF_BASE2;
2175 for (i = 0; i < buf_len/256; i++) {
2176 rtsx_init_cmd(chip);
2177
2178 for (j = 0; j < 256; j++) {
2179 rtsx_add_cmd(chip, WRITE_REG_CMD, reg_addr++, 0xFF, *ptr);
2180 ptr++;
2181 }
2182
2183 retval = rtsx_send_cmd(chip, 0, 250);
2184 if (retval < 0)
2185 TRACE_RET(chip, STATUS_FAIL);
2186 }
2187
2188 if (buf_len%256) {
2189 rtsx_init_cmd(chip);
2190
2191 for (j = 0; j < buf_len%256; j++) {
2192 rtsx_add_cmd(chip, WRITE_REG_CMD, reg_addr++, 0xFF, *ptr);
2193 ptr++;
2194 }
2195
2196 retval = rtsx_send_cmd(chip, 0, 250);
2197 if (retval < 0)
2198 TRACE_RET(chip, STATUS_FAIL);
2199 }
2200
2201 return STATUS_SUCCESS;
2202}
2203
2204int rtsx_check_chip_exist(struct rtsx_chip *chip)
2205{
2206 if (rtsx_readl(chip, 0) == 0xFFFFFFFF)
2207 TRACE_RET(chip, STATUS_FAIL);
2208
2209 return STATUS_SUCCESS;
2210}
2211
2212int rtsx_force_power_on(struct rtsx_chip *chip, u8 ctl)
2213{
2214 int retval;
2215 u8 mask = 0;
2216
2217 if (ctl & SSC_PDCTL)
2218 mask |= SSC_POWER_DOWN;
2219
2220#ifdef SUPPORT_OCP
2221 if (ctl & OC_PDCTL) {
2222 mask |= SD_OC_POWER_DOWN;
2223 if (CHECK_LUN_MODE(chip, SD_MS_2LUN))
2224 mask |= MS_OC_POWER_DOWN;
2225 }
2226#endif
2227
2228 if (mask) {
2229 retval = rtsx_write_register(chip, FPDCTL, mask, 0);
2230 if (retval != STATUS_SUCCESS)
2231 TRACE_RET(chip, STATUS_FAIL);
2232
2233 if (CHECK_PID(chip, 0x5288))
2234 wait_timeout(200);
2235 }
2236
2237 return STATUS_SUCCESS;
2238}
2239
2240int rtsx_force_power_down(struct rtsx_chip *chip, u8 ctl)
2241{
2242 int retval;
2243 u8 mask = 0, val = 0;
2244
2245 if (ctl & SSC_PDCTL)
2246 mask |= SSC_POWER_DOWN;
2247
2248#ifdef SUPPORT_OCP
2249 if (ctl & OC_PDCTL) {
2250 mask |= SD_OC_POWER_DOWN;
2251 if (CHECK_LUN_MODE(chip, SD_MS_2LUN))
2252 mask |= MS_OC_POWER_DOWN;
2253 }
2254#endif
2255
2256 if (mask) {
2257 val = mask;
2258 retval = rtsx_write_register(chip, FPDCTL, mask, val);
2259 if (retval != STATUS_SUCCESS)
2260 TRACE_RET(chip, STATUS_FAIL);
2261 }
2262
2263 return STATUS_SUCCESS;
2264}
diff --git a/drivers/staging/rts_pstor/rtsx_chip.h b/drivers/staging/rts_pstor/rtsx_chip.h
deleted file mode 100644
index 9f7cd82a1541..000000000000
--- a/drivers/staging/rts_pstor/rtsx_chip.h
+++ /dev/null
@@ -1,989 +0,0 @@
1/* Driver for Realtek PCI-Express card reader
2 * Header file
3 *
4 * Copyright(c) 2009 Realtek Semiconductor Corp. All rights reserved.
5 *
6 * This program is free software; you can redistribute it and/or modify it
7 * under the terms of the GNU General Public License as published by the
8 * Free Software Foundation; either version 2, or (at your option) any
9 * later version.
10 *
11 * This program is distributed in the hope that it will be useful, but
12 * WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
14 * General Public License for more details.
15 *
16 * You should have received a copy of the GNU General Public License along
17 * with this program; if not, see <http://www.gnu.org/licenses/>.
18 *
19 * Author:
20 * wwang (wei_wang@realsil.com.cn)
21 * No. 450, Shenhu Road, Suzhou Industry Park, Suzhou, China
22 */
23
24#ifndef __REALTEK_RTSX_CHIP_H
25#define __REALTEK_RTSX_CHIP_H
26
27#include "rtsx.h"
28
29#define SUPPORT_CPRM
30#define SUPPORT_OCP
31#define SUPPORT_SDIO_ASPM
32#define SUPPORT_MAGIC_GATE
33#define SUPPORT_MSXC
34#define SUPPORT_SD_LOCK
35/* Hardware switch bus_ctl and cd_ctl automatically */
36#define HW_AUTO_SWITCH_SD_BUS
37/* Enable hardware interrupt write clear */
38#define HW_INT_WRITE_CLR
39/* #define LED_AUTO_BLINK */
40/* #define DISABLE_CARD_INT */
41
42#ifdef SUPPORT_MAGIC_GATE
43 /* Using NORMAL_WRITE instead of AUTO_WRITE to set ICV */
44 #define MG_SET_ICV_SLOW
45 /* HW may miss ERR/CMDNK signal when sampling INT status. */
46 #define MS_SAMPLE_INT_ERR
47 /* HW DO NOT support Wait_INT function during READ_BYTES transfer mode */
48 #define READ_BYTES_WAIT_INT
49#endif
50
51#ifdef SUPPORT_MSXC
52#define XC_POWERCLASS
53#define SUPPORT_PCGL_1P18
54#endif
55
56#ifndef LED_AUTO_BLINK
57#define REGULAR_BLINK
58#endif
59
60#define LED_BLINK_SPEED 5
61#define LED_TOGGLE_INTERVAL 6
62#define GPIO_TOGGLE_THRESHOLD 1024
63#define LED_GPIO 0
64
65#define POLLING_INTERVAL 30
66
67#define TRACE_ITEM_CNT 64
68
69#ifndef STATUS_SUCCESS
70#define STATUS_SUCCESS 0
71#endif
72#ifndef STATUS_FAIL
73#define STATUS_FAIL 1
74#endif
75#ifndef STATUS_TIMEDOUT
76#define STATUS_TIMEDOUT 2
77#endif
78#ifndef STATUS_NOMEM
79#define STATUS_NOMEM 3
80#endif
81#ifndef STATUS_READ_FAIL
82#define STATUS_READ_FAIL 4
83#endif
84#ifndef STATUS_WRITE_FAIL
85#define STATUS_WRITE_FAIL 5
86#endif
87#ifndef STATUS_ERROR
88#define STATUS_ERROR 10
89#endif
90
91#define PM_S1 1
92#define PM_S3 3
93
94/*
95 * Transport return codes
96 */
97
98#define TRANSPORT_GOOD 0 /* Transport good, command good */
99#define TRANSPORT_FAILED 1 /* Transport good, command failed */
100#define TRANSPORT_NO_SENSE 2 /* Command failed, no auto-sense */
101#define TRANSPORT_ERROR 3 /* Transport bad (i.e. device dead) */
102
103
104/*-----------------------------------
105 Start-Stop-Unit
106-----------------------------------*/
107#define STOP_MEDIUM 0x00 /* access disable */
108#define MAKE_MEDIUM_READY 0x01 /* access enable */
109#define UNLOAD_MEDIUM 0x02 /* unload */
110#define LOAD_MEDIUM 0x03 /* load */
111
112/*-----------------------------------
113 STANDARD_INQUIRY
114-----------------------------------*/
115#define QULIFIRE 0x00
116#define AENC_FNC 0x00
117#define TRML_IOP 0x00
118#define REL_ADR 0x00
119#define WBUS_32 0x00
120#define WBUS_16 0x00
121#define SYNC 0x00
122#define LINKED 0x00
123#define CMD_QUE 0x00
124#define SFT_RE 0x00
125
126#define VEN_ID_LEN 8 /* Vendor ID Length */
127#define PRDCT_ID_LEN 16 /* Product ID Length */
128#define PRDCT_REV_LEN 4 /* Product LOT Length */
129
130/* Dynamic flag definitions: used in set_bit() etc. */
131#define RTSX_FLIDX_TRANS_ACTIVE 18 /* 0x00040000 transfer is active */
132#define RTSX_FLIDX_ABORTING 20 /* 0x00100000 abort is in progress */
133#define RTSX_FLIDX_DISCONNECTING 21 /* 0x00200000 disconnect in progress */
134#define ABORTING_OR_DISCONNECTING ((1UL << US_FLIDX_ABORTING) | \
135 (1UL << US_FLIDX_DISCONNECTING))
136#define RTSX_FLIDX_RESETTING 22 /* 0x00400000 device reset in progress */
137#define RTSX_FLIDX_TIMED_OUT 23 /* 0x00800000 SCSI midlayer timed out */
138
139#define DRCT_ACCESS_DEV 0x00 /* Direct Access Device */
140#define RMB_DISC 0x80 /* The Device is Removable */
141#define ANSI_SCSI2 0x02 /* Based on ANSI-SCSI2 */
142
143#define SCSI 0x00 /* Interface ID */
144
145#define WRITE_PROTECTED_MEDIA 0x07
146
147/*---- sense key ----*/
148#define ILI 0x20 /* ILI bit is on */
149
150#define NO_SENSE 0x00 /* not exist sense key */
151#define RECOVER_ERR 0x01 /* Target/Logical unit is recoverd */
152#define NOT_READY 0x02 /* Logical unit is not ready */
153#define MEDIA_ERR 0x03 /* medium/data error */
154#define HARDWARE_ERR 0x04 /* hardware error */
155#define ILGAL_REQ 0x05 /* CDB/parameter/identify msg error */
156#define UNIT_ATTENTION 0x06 /* unit attention condition occur */
157#define DAT_PRTCT 0x07 /* read/write is desable */
158#define BLNC_CHK 0x08 /* find blank/DOF in read */
159 /* write to unblank area */
160#define CPY_ABRT 0x0a /* Copy/Compare/Copy&Verify illgal */
161#define ABRT_CMD 0x0b /* Target make the command in error */
162#define EQUAL 0x0c /* Search Data end with Equal */
163#define VLM_OVRFLW 0x0d /* Some data are left in buffer */
164#define MISCMP 0x0e /* find inequality */
165
166#define READ_ERR -1
167#define WRITE_ERR -2
168
169#define FIRST_RESET 0x01
170#define USED_EXIST 0x02
171
172/*-----------------------------------
173 SENSE_DATA
174-----------------------------------*/
175/*---- valid ----*/
176#define SENSE_VALID 0x80 /* Sense data is valid as SCSI2 */
177#define SENSE_INVALID 0x00 /* Sense data is invalid as SCSI2 */
178
179/*---- error code ----*/
180#define CUR_ERR 0x70 /* current error */
181#define DEF_ERR 0x71 /* specific command error */
182
183/*---- sense key Information ----*/
184#define SNSKEYINFO_LEN 3 /* length of sense key information */
185
186#define SKSV 0x80
187#define CDB_ILLEGAL 0x40
188#define DAT_ILLEGAL 0x00
189#define BPV 0x08
190#define BIT_ILLEGAL0 0 /* bit0 is illegal */
191#define BIT_ILLEGAL1 1 /* bit1 is illegal */
192#define BIT_ILLEGAL2 2 /* bit2 is illegal */
193#define BIT_ILLEGAL3 3 /* bit3 is illegal */
194#define BIT_ILLEGAL4 4 /* bit4 is illegal */
195#define BIT_ILLEGAL5 5 /* bit5 is illegal */
196#define BIT_ILLEGAL6 6 /* bit6 is illegal */
197#define BIT_ILLEGAL7 7 /* bit7 is illegal */
198
199/*---- ASC ----*/
200#define ASC_NO_INFO 0x00
201#define ASC_MISCMP 0x1d
202#define ASC_INVLD_CDB 0x24
203#define ASC_INVLD_PARA 0x26
204#define ASC_LU_NOT_READY 0x04
205#define ASC_WRITE_ERR 0x0c
206#define ASC_READ_ERR 0x11
207#define ASC_LOAD_EJCT_ERR 0x53
208#define ASC_MEDIA_NOT_PRESENT 0x3A
209#define ASC_MEDIA_CHANGED 0x28
210#define ASC_MEDIA_IN_PROCESS 0x04
211#define ASC_WRITE_PROTECT 0x27
212#define ASC_LUN_NOT_SUPPORTED 0x25
213
214/*---- ASQC ----*/
215#define ASCQ_NO_INFO 0x00
216#define ASCQ_MEDIA_IN_PROCESS 0x01
217#define ASCQ_MISCMP 0x00
218#define ASCQ_INVLD_CDB 0x00
219#define ASCQ_INVLD_PARA 0x02
220#define ASCQ_LU_NOT_READY 0x02
221#define ASCQ_WRITE_ERR 0x02
222#define ASCQ_READ_ERR 0x00
223#define ASCQ_LOAD_EJCT_ERR 0x00
224#define ASCQ_WRITE_PROTECT 0x00
225
226
227struct sense_data_t {
228 unsigned char err_code; /* error code */
229 /* bit7 : valid */
230 /* (1 : SCSI2) */
231 /* (0 : Vendor specific) */
232 /* bit6-0 : error code */
233 /* (0x70 : current error) */
234 /* (0x71 : specific command error) */
235 unsigned char seg_no; /* segment No. */
236 unsigned char sense_key; /* byte5 : ILI */
237 /* bit3-0 : sense key */
238 unsigned char info[4]; /* information */
239 unsigned char ad_sense_len; /* additional sense data length */
240 unsigned char cmd_info[4]; /* command specific information */
241 unsigned char asc; /* ASC */
242 unsigned char ascq; /* ASCQ */
243 unsigned char rfu; /* FRU */
244 unsigned char sns_key_info[3]; /* sense key specific information */
245};
246
247/* PCI Operation Register Address */
248#define RTSX_HCBAR 0x00
249#define RTSX_HCBCTLR 0x04
250#define RTSX_HDBAR 0x08
251#define RTSX_HDBCTLR 0x0C
252#define RTSX_HAIMR 0x10
253#define RTSX_BIPR 0x14
254#define RTSX_BIER 0x18
255
256/* Host command buffer control register */
257#define STOP_CMD (0x01 << 28)
258
259/* Host data buffer control register */
260#define SDMA_MODE 0x00
261#define ADMA_MODE (0x02 << 26)
262#define STOP_DMA (0x01 << 28)
263#define TRIG_DMA (0x01 << 31)
264
265/* Bus interrupt pending register */
266#define CMD_DONE_INT (1 << 31)
267#define DATA_DONE_INT (1 << 30)
268#define TRANS_OK_INT (1 << 29)
269#define TRANS_FAIL_INT (1 << 28)
270#define XD_INT (1 << 27)
271#define MS_INT (1 << 26)
272#define SD_INT (1 << 25)
273#define GPIO0_INT (1 << 24)
274#define OC_INT (1 << 23)
275#define SD_WRITE_PROTECT (1 << 19)
276#define XD_EXIST (1 << 18)
277#define MS_EXIST (1 << 17)
278#define SD_EXIST (1 << 16)
279#define DELINK_INT GPIO0_INT
280#define MS_OC_INT (1 << 23)
281#define SD_OC_INT (1 << 22)
282
283#define CARD_INT (XD_INT | MS_INT | SD_INT)
284#define NEED_COMPLETE_INT (DATA_DONE_INT | TRANS_OK_INT | TRANS_FAIL_INT)
285#define RTSX_INT (CMD_DONE_INT | NEED_COMPLETE_INT | CARD_INT | GPIO0_INT | OC_INT)
286
287#define CARD_EXIST (XD_EXIST | MS_EXIST | SD_EXIST)
288
289/* Bus interrupt enable register */
290#define CMD_DONE_INT_EN (1 << 31)
291#define DATA_DONE_INT_EN (1 << 30)
292#define TRANS_OK_INT_EN (1 << 29)
293#define TRANS_FAIL_INT_EN (1 << 28)
294#define XD_INT_EN (1 << 27)
295#define MS_INT_EN (1 << 26)
296#define SD_INT_EN (1 << 25)
297#define GPIO0_INT_EN (1 << 24)
298#define OC_INT_EN (1 << 23)
299#define DELINK_INT_EN GPIO0_INT_EN
300#define MS_OC_INT_EN (1 << 23)
301#define SD_OC_INT_EN (1 << 22)
302
303
304#define READ_REG_CMD 0
305#define WRITE_REG_CMD 1
306#define CHECK_REG_CMD 2
307
308#define HOST_TO_DEVICE 0
309#define DEVICE_TO_HOST 1
310
311
312#define RTSX_RESV_BUF_LEN 4096
313#define HOST_CMDS_BUF_LEN 1024
314#define HOST_SG_TBL_BUF_LEN (RTSX_RESV_BUF_LEN - HOST_CMDS_BUF_LEN)
315
316#define SD_NR 2
317#define MS_NR 3
318#define XD_NR 4
319#define SPI_NR 7
320#define SD_CARD (1 << SD_NR)
321#define MS_CARD (1 << MS_NR)
322#define XD_CARD (1 << XD_NR)
323#define SPI_CARD (1 << SPI_NR)
324
325#define MAX_ALLOWED_LUN_CNT 8
326
327#define XD_FREE_TABLE_CNT 1200
328#define MS_FREE_TABLE_CNT 512
329
330
331/* Bit Operation */
332#define SET_BIT(data, idx) ((data) |= 1 << (idx))
333#define CLR_BIT(data, idx) ((data) &= ~(1 << (idx)))
334#define CHK_BIT(data, idx) ((data) & (1 << (idx)))
335
336/* SG descriptor */
337#define SG_INT 0x04
338#define SG_END 0x02
339#define SG_VALID 0x01
340
341#define SG_NO_OP 0x00
342#define SG_TRANS_DATA (0x02 << 4)
343#define SG_LINK_DESC (0x03 << 4)
344
345struct rtsx_chip;
346
347typedef int (*card_rw_func)(struct scsi_cmnd *srb, struct rtsx_chip *chip, u32 sec_addr, u16 sec_cnt);
348
349/* Supported Clock */
350enum card_clock {CLK_20 = 1, CLK_30, CLK_40, CLK_50, CLK_60, CLK_80, CLK_100, CLK_120, CLK_150, CLK_200};
351
352enum RTSX_STAT {RTSX_STAT_INIT, RTSX_STAT_IDLE, RTSX_STAT_RUN, RTSX_STAT_SS,
353 RTSX_STAT_DELINK, RTSX_STAT_SUSPEND, RTSX_STAT_ABORT, RTSX_STAT_DISCONNECT};
354enum IC_VER {IC_VER_AB, IC_VER_C = 2, IC_VER_D = 3};
355
356#define MAX_RESET_CNT 3
357
358/* For MS Card */
359#define MAX_DEFECTIVE_BLOCK 10
360
361struct zone_entry {
362 u16 *l2p_table;
363 u16 *free_table;
364 u16 defect_list[MAX_DEFECTIVE_BLOCK]; /* For MS card only */
365 int set_index;
366 int get_index;
367 int unused_blk_cnt;
368 int disable_count;
369 /* To indicate whether the L2P table of this zone has been built. */
370 int build_flag;
371};
372
373#define TYPE_SD 0x0000
374#define TYPE_MMC 0x0001
375
376/* TYPE_SD */
377#define SD_HS 0x0100
378#define SD_SDR50 0x0200
379#define SD_DDR50 0x0400
380#define SD_SDR104 0x0800
381#define SD_HCXC 0x1000
382
383/* TYPE_MMC */
384#define MMC_26M 0x0100
385#define MMC_52M 0x0200
386#define MMC_4BIT 0x0400
387#define MMC_8BIT 0x0800
388#define MMC_SECTOR_MODE 0x1000
389#define MMC_DDR52 0x2000
390
391/* SD card */
392#define CHK_SD(sd_card) (((sd_card)->sd_type & 0xFF) == TYPE_SD)
393#define CHK_SD_HS(sd_card) (CHK_SD(sd_card) && ((sd_card)->sd_type & SD_HS))
394#define CHK_SD_SDR50(sd_card) (CHK_SD(sd_card) && ((sd_card)->sd_type & SD_SDR50))
395#define CHK_SD_DDR50(sd_card) (CHK_SD(sd_card) && ((sd_card)->sd_type & SD_DDR50))
396#define CHK_SD_SDR104(sd_card) (CHK_SD(sd_card) && ((sd_card)->sd_type & SD_SDR104))
397#define CHK_SD_HCXC(sd_card) (CHK_SD(sd_card) && ((sd_card)->sd_type & SD_HCXC))
398#define CHK_SD_HC(sd_card) (CHK_SD_HCXC(sd_card) && ((sd_card)->capacity <= 0x4000000))
399#define CHK_SD_XC(sd_card) (CHK_SD_HCXC(sd_card) && ((sd_card)->capacity > 0x4000000))
400#define CHK_SD30_SPEED(sd_card) (CHK_SD_SDR50(sd_card) || CHK_SD_DDR50(sd_card) || CHK_SD_SDR104(sd_card))
401
402#define SET_SD(sd_card) ((sd_card)->sd_type = TYPE_SD)
403#define SET_SD_HS(sd_card) ((sd_card)->sd_type |= SD_HS)
404#define SET_SD_SDR50(sd_card) ((sd_card)->sd_type |= SD_SDR50)
405#define SET_SD_DDR50(sd_card) ((sd_card)->sd_type |= SD_DDR50)
406#define SET_SD_SDR104(sd_card) ((sd_card)->sd_type |= SD_SDR104)
407#define SET_SD_HCXC(sd_card) ((sd_card)->sd_type |= SD_HCXC)
408
409#define CLR_SD_HS(sd_card) ((sd_card)->sd_type &= ~SD_HS)
410#define CLR_SD_SDR50(sd_card) ((sd_card)->sd_type &= ~SD_SDR50)
411#define CLR_SD_DDR50(sd_card) ((sd_card)->sd_type &= ~SD_DDR50)
412#define CLR_SD_SDR104(sd_card) ((sd_card)->sd_type &= ~SD_SDR104)
413#define CLR_SD_HCXC(sd_card) ((sd_card)->sd_type &= ~SD_HCXC)
414
415/* MMC card */
416#define CHK_MMC(sd_card) (((sd_card)->sd_type & 0xFF) == TYPE_MMC)
417#define CHK_MMC_26M(sd_card) (CHK_MMC(sd_card) && ((sd_card)->sd_type & MMC_26M))
418#define CHK_MMC_52M(sd_card) (CHK_MMC(sd_card) && ((sd_card)->sd_type & MMC_52M))
419#define CHK_MMC_4BIT(sd_card) (CHK_MMC(sd_card) && ((sd_card)->sd_type & MMC_4BIT))
420#define CHK_MMC_8BIT(sd_card) (CHK_MMC(sd_card) && ((sd_card)->sd_type & MMC_8BIT))
421#define CHK_MMC_SECTOR_MODE(sd_card) (CHK_MMC(sd_card) && ((sd_card)->sd_type & MMC_SECTOR_MODE))
422#define CHK_MMC_DDR52(sd_card) (CHK_MMC(sd_card) && ((sd_card)->sd_type & MMC_DDR52))
423
424#define SET_MMC(sd_card) ((sd_card)->sd_type = TYPE_MMC)
425#define SET_MMC_26M(sd_card) ((sd_card)->sd_type |= MMC_26M)
426#define SET_MMC_52M(sd_card) ((sd_card)->sd_type |= MMC_52M)
427#define SET_MMC_4BIT(sd_card) ((sd_card)->sd_type |= MMC_4BIT)
428#define SET_MMC_8BIT(sd_card) ((sd_card)->sd_type |= MMC_8BIT)
429#define SET_MMC_SECTOR_MODE(sd_card) ((sd_card)->sd_type |= MMC_SECTOR_MODE)
430#define SET_MMC_DDR52(sd_card) ((sd_card)->sd_type |= MMC_DDR52)
431
432#define CLR_MMC_26M(sd_card) ((sd_card)->sd_type &= ~MMC_26M)
433#define CLR_MMC_52M(sd_card) ((sd_card)->sd_type &= ~MMC_52M)
434#define CLR_MMC_4BIT(sd_card) ((sd_card)->sd_type &= ~MMC_4BIT)
435#define CLR_MMC_8BIT(sd_card) ((sd_card)->sd_type &= ~MMC_8BIT)
436#define CLR_MMC_SECTOR_MODE(sd_card) ((sd_card)->sd_type &= ~MMC_SECTOR_MODE)
437#define CLR_MMC_DDR52(sd_card) ((sd_card)->sd_type &= ~MMC_DDR52)
438
439#define CHK_MMC_HS(sd_card) (CHK_MMC_52M(sd_card) && CHK_MMC_26M(sd_card))
440#define CLR_MMC_HS(sd_card) \
441do { \
442 CLR_MMC_DDR52(sd_card); \
443 CLR_MMC_52M(sd_card); \
444 CLR_MMC_26M(sd_card); \
445} while (0)
446
447#define SD_SUPPORT_CLASS_TEN 0x01
448#define SD_SUPPORT_1V8 0x02
449
450#define SD_SET_CLASS_TEN(sd_card) ((sd_card)->sd_setting |= SD_SUPPORT_CLASS_TEN)
451#define SD_CHK_CLASS_TEN(sd_card) ((sd_card)->sd_setting & SD_SUPPORT_CLASS_TEN)
452#define SD_CLR_CLASS_TEN(sd_card) ((sd_card)->sd_setting &= ~SD_SUPPORT_CLASS_TEN)
453#define SD_SET_1V8(sd_card) ((sd_card)->sd_setting |= SD_SUPPORT_1V8)
454#define SD_CHK_1V8(sd_card) ((sd_card)->sd_setting & SD_SUPPORT_1V8)
455#define SD_CLR_1V8(sd_card) ((sd_card)->sd_setting &= ~SD_SUPPORT_1V8)
456
457struct sd_info {
458 u16 sd_type;
459 u8 err_code;
460 u8 sd_data_buf_ready;
461 u32 sd_addr;
462 u32 capacity;
463
464 u8 raw_csd[16];
465 u8 raw_scr[8];
466
467 /* Sequential RW */
468 int seq_mode;
469 enum dma_data_direction pre_dir;
470 u32 pre_sec_addr;
471 u16 pre_sec_cnt;
472
473 int cleanup_counter;
474
475 int sd_clock;
476
477 int mmc_dont_switch_bus;
478
479#ifdef SUPPORT_CPRM
480 int sd_pass_thru_en;
481 int pre_cmd_err;
482 u8 last_rsp_type;
483 u8 rsp[17];
484#endif
485
486 u8 func_group1_mask;
487 u8 func_group2_mask;
488 u8 func_group3_mask;
489 u8 func_group4_mask;
490
491 u8 sd_switch_fail;
492 u8 sd_read_phase;
493
494#ifdef SUPPORT_SD_LOCK
495 u8 sd_lock_status;
496 u8 sd_erase_status;
497 u8 sd_lock_notify;
498#endif
499 int need_retune;
500};
501
502struct xd_delay_write_tag {
503 u32 old_phyblock;
504 u32 new_phyblock;
505 u32 logblock;
506 u8 pageoff;
507 u8 delay_write_flag;
508};
509
510struct xd_info {
511 u8 maker_code;
512 u8 device_code;
513 u8 block_shift;
514 u8 page_off;
515 u8 addr_cycle;
516 u16 cis_block;
517 u8 multi_flag;
518 u8 err_code;
519 u32 capacity;
520
521 struct zone_entry *zone;
522 int zone_cnt;
523
524 struct xd_delay_write_tag delay_write;
525 int cleanup_counter;
526
527 int xd_clock;
528};
529
530#define MODE_512_SEQ 0x01
531#define MODE_2K_SEQ 0x02
532
533#define TYPE_MS 0x0000
534#define TYPE_MSPRO 0x0001
535
536#define MS_4BIT 0x0100
537#define MS_8BIT 0x0200
538#define MS_HG 0x0400
539#define MS_XC 0x0800
540
541#define HG8BIT (MS_HG | MS_8BIT)
542
543#define CHK_MSPRO(ms_card) (((ms_card)->ms_type & 0xFF) == TYPE_MSPRO)
544#define CHK_HG8BIT(ms_card) (CHK_MSPRO(ms_card) && (((ms_card)->ms_type & HG8BIT) == HG8BIT))
545#define CHK_MSXC(ms_card) (CHK_MSPRO(ms_card) && ((ms_card)->ms_type & MS_XC))
546#define CHK_MSHG(ms_card) (CHK_MSPRO(ms_card) && ((ms_card)->ms_type & MS_HG))
547
548#define CHK_MS8BIT(ms_card) (((ms_card)->ms_type & MS_8BIT))
549#define CHK_MS4BIT(ms_card) (((ms_card)->ms_type & MS_4BIT))
550
551struct ms_delay_write_tag {
552 u16 old_phyblock;
553 u16 new_phyblock;
554 u16 logblock;
555 u8 pageoff;
556 u8 delay_write_flag;
557};
558
559struct ms_info {
560 u16 ms_type;
561 u8 block_shift;
562 u8 page_off;
563 u16 total_block;
564 u16 boot_block;
565 u32 capacity;
566
567 u8 check_ms_flow;
568 u8 switch_8bit_fail;
569 u8 err_code;
570
571 struct zone_entry *segment;
572 int segment_cnt;
573
574 int pro_under_formatting;
575 int format_status;
576 u16 progress;
577 u8 raw_sys_info[96];
578#ifdef SUPPORT_PCGL_1P18
579 u8 raw_model_name[48];
580#endif
581
582 u8 multi_flag;
583
584 /* Sequential RW */
585 u8 seq_mode;
586 enum dma_data_direction pre_dir;
587 u32 pre_sec_addr;
588 u16 pre_sec_cnt;
589 u32 total_sec_cnt;
590
591 struct ms_delay_write_tag delay_write;
592
593 int cleanup_counter;
594
595 int ms_clock;
596
597#ifdef SUPPORT_MAGIC_GATE
598 u8 magic_gate_id[16];
599 u8 mg_entry_num;
600 int mg_auth; /* flag to indicate authentication process */
601#endif
602};
603
604struct spi_info {
605 u8 use_clk;
606 u8 write_en;
607 u16 clk_div;
608 u8 err_code;
609
610 int spi_clock;
611};
612
613
614#ifdef _MSG_TRACE
615struct trace_msg_t {
616 u16 line;
617#define MSG_FUNC_LEN 64
618 char func[MSG_FUNC_LEN];
619#define MSG_FILE_LEN 32
620 char file[MSG_FILE_LEN];
621#define TIME_VAL_LEN 16
622 u8 timeval_buf[TIME_VAL_LEN];
623 u8 valid;
624};
625#endif
626
627/************/
628/* LUN mode */
629/************/
630/* Single LUN, support xD/SD/MS */
631#define DEFAULT_SINGLE 0
632/* 2 LUN mode, support SD/MS */
633#define SD_MS_2LUN 1
634/* Single LUN, but only support SD/MS, for Barossa LQFP */
635#define SD_MS_1LUN 2
636
637#define LAST_LUN_MODE 2
638
639/* Barossa package */
640#define QFN 0
641#define LQFP 1
642
643/******************/
644/* sd_ctl bit map */
645/******************/
646/* SD push point control, bit 0, 1 */
647#define SD_PUSH_POINT_CTL_MASK 0x03
648#define SD_PUSH_POINT_DELAY 0x01
649#define SD_PUSH_POINT_AUTO 0x02
650/* SD sample point control, bit 2, 3 */
651#define SD_SAMPLE_POINT_CTL_MASK 0x0C
652#define SD_SAMPLE_POINT_DELAY 0x04
653#define SD_SAMPLE_POINT_AUTO 0x08
654/* SD DDR Tx phase set by user, bit 4 */
655#define SD_DDR_TX_PHASE_SET_BY_USER 0x10
656/* MMC DDR Tx phase set by user, bit 5 */
657#define MMC_DDR_TX_PHASE_SET_BY_USER 0x20
658/* Support MMC DDR mode, bit 6 */
659#define SUPPORT_MMC_DDR_MODE 0x40
660/* Reset MMC at first */
661#define RESET_MMC_FIRST 0x80
662
663#define SEQ_START_CRITERIA 0x20
664
665/* MS Power Class En */
666#define POWER_CLASS_2_EN 0x02
667#define POWER_CLASS_1_EN 0x01
668
669#define MAX_SHOW_CNT 10
670#define MAX_RESET_CNT 3
671
672#define SDIO_EXIST 0x01
673#define SDIO_IGNORED 0x02
674
675#define CHK_SDIO_EXIST(chip) ((chip)->sdio_func_exist & SDIO_EXIST)
676#define SET_SDIO_EXIST(chip) ((chip)->sdio_func_exist |= SDIO_EXIST)
677#define CLR_SDIO_EXIST(chip) ((chip)->sdio_func_exist &= ~SDIO_EXIST)
678
679#define CHK_SDIO_IGNORED(chip) ((chip)->sdio_func_exist & SDIO_IGNORED)
680#define SET_SDIO_IGNORED(chip) ((chip)->sdio_func_exist |= SDIO_IGNORED)
681#define CLR_SDIO_IGNORED(chip) ((chip)->sdio_func_exist &= ~SDIO_IGNORED)
682
683struct rtsx_chip {
684 rtsx_dev_t *rtsx;
685
686 u32 int_reg; /* Bus interrupt pending register */
687 char max_lun;
688 void *context;
689
690 void *host_cmds_ptr; /* host commands buffer pointer */
691 dma_addr_t host_cmds_addr;
692 int ci; /* Command Index */
693
694 void *host_sg_tbl_ptr; /* SG descriptor table */
695 dma_addr_t host_sg_tbl_addr;
696 int sgi; /* SG entry index */
697
698 struct scsi_cmnd *srb; /* current srb */
699 struct sense_data_t sense_buffer[MAX_ALLOWED_LUN_CNT];
700
701 int cur_clk; /* current card clock */
702
703 /* Current accessed card */
704 int cur_card;
705
706 unsigned long need_release; /* need release bit map */
707 unsigned long need_reset; /* need reset bit map */
708 /* Flag to indicate that this card is just resumed from SS state,
709 * and need released before being resetted
710 */
711 unsigned long need_reinit;
712
713 int rw_need_retry;
714
715#ifdef SUPPORT_OCP
716 u32 ocp_int;
717 u8 ocp_stat;
718#endif
719
720 u8 card_exist; /* card exist bit map (physical exist) */
721 u8 card_ready; /* card ready bit map (reset successfully) */
722 u8 card_fail; /* card reset fail bit map */
723 u8 card_ejected; /* card ejected bit map */
724 u8 card_wp; /* card write protected bit map */
725
726 u8 lun_mc; /* flag to indicate whether to answer MediaChange */
727
728#ifndef LED_AUTO_BLINK
729 int led_toggle_counter;
730#endif
731
732 int sd_reset_counter;
733 int xd_reset_counter;
734 int ms_reset_counter;
735
736 /* card bus width */
737 u8 card_bus_width[MAX_ALLOWED_LUN_CNT];
738 /* card capacity */
739 u32 capacity[MAX_ALLOWED_LUN_CNT];
740 /* read/write card function pointer */
741 card_rw_func rw_card[MAX_ALLOWED_LUN_CNT];
742 /* read/write capacity, used for GPIO Toggle */
743 u32 rw_cap[MAX_ALLOWED_LUN_CNT];
744 /* card to lun mapping table */
745 u8 card2lun[32];
746 /* lun to card mapping table */
747 u8 lun2card[MAX_ALLOWED_LUN_CNT];
748
749 int rw_fail_cnt[MAX_ALLOWED_LUN_CNT];
750
751 int sd_show_cnt;
752 int xd_show_cnt;
753 int ms_show_cnt;
754
755 /* card information */
756 struct sd_info sd_card;
757 struct xd_info xd_card;
758 struct ms_info ms_card;
759
760 struct spi_info spi;
761
762#ifdef _MSG_TRACE
763 struct trace_msg_t trace_msg[TRACE_ITEM_CNT];
764 int msg_idx;
765#endif
766
767 int auto_delink_cnt;
768 int auto_delink_allowed;
769
770 int aspm_enabled;
771
772 int sdio_aspm;
773 int sdio_idle;
774 int sdio_counter;
775 u8 sdio_raw_data[12];
776
777 u8 sd_io;
778 u8 sd_int;
779
780 u8 rtsx_flag;
781
782 int ss_counter;
783 int idle_counter;
784 enum RTSX_STAT rtsx_stat;
785
786 u16 vendor_id;
787 u16 product_id;
788 u8 ic_version;
789
790 int driver_first_load;
791
792#ifdef HW_AUTO_SWITCH_SD_BUS
793 int sdio_in_charge;
794#endif
795
796 u8 aspm_level[2];
797
798 int chip_insert_with_sdio;
799
800 /* Options */
801
802 int adma_mode;
803
804 int auto_delink_en;
805 int ss_en;
806 u8 lun_mode;
807 u8 aspm_l0s_l1_en;
808
809 int power_down_in_ss;
810
811 int sdr104_en;
812 int ddr50_en;
813 int sdr50_en;
814
815 int baro_pkg;
816
817 int asic_code;
818 int phy_debug_mode;
819 int hw_bypass_sd;
820 int sdio_func_exist;
821 int aux_pwr_exist;
822 u8 ms_power_class_en;
823
824 int mspro_formatter_enable;
825
826 int remote_wakeup_en;
827
828 int ignore_sd;
829 int use_hw_setting;
830
831 int ss_idle_period;
832
833 int dynamic_aspm;
834
835 int fpga_sd_sdr104_clk;
836 int fpga_sd_ddr50_clk;
837 int fpga_sd_sdr50_clk;
838 int fpga_sd_hs_clk;
839 int fpga_mmc_52m_clk;
840 int fpga_ms_hg_clk;
841 int fpga_ms_4bit_clk;
842 int fpga_ms_1bit_clk;
843
844 int asic_sd_sdr104_clk;
845 int asic_sd_ddr50_clk;
846 int asic_sd_sdr50_clk;
847 int asic_sd_hs_clk;
848 int asic_mmc_52m_clk;
849 int asic_ms_hg_clk;
850 int asic_ms_4bit_clk;
851 int asic_ms_1bit_clk;
852
853 u8 ssc_depth_sd_sdr104;
854 u8 ssc_depth_sd_ddr50;
855 u8 ssc_depth_sd_sdr50;
856 u8 ssc_depth_sd_hs;
857 u8 ssc_depth_mmc_52m;
858 u8 ssc_depth_ms_hg;
859 u8 ssc_depth_ms_4bit;
860 u8 ssc_depth_low_speed;
861
862 u8 card_drive_sel;
863 u8 sd30_drive_sel_1v8;
864 u8 sd30_drive_sel_3v3;
865
866 u8 sd_400mA_ocp_thd;
867 u8 sd_800mA_ocp_thd;
868 u8 ms_ocp_thd;
869
870 int ssc_en;
871 int msi_en;
872
873 int xd_timeout;
874 int sd_timeout;
875 int ms_timeout;
876 int mspro_timeout;
877
878 int auto_power_down;
879
880 int sd_ddr_tx_phase;
881 int mmc_ddr_tx_phase;
882 int sd_default_tx_phase;
883 int sd_default_rx_phase;
884
885 int pmos_pwr_on_interval;
886 int sd_voltage_switch_delay;
887 int s3_pwr_off_delay;
888
889 int force_clkreq_0;
890 int ft2_fast_mode;
891
892 int do_delink_before_power_down;
893 int polling_config;
894 int sdio_retry_cnt;
895
896 int delink_stage1_step;
897 int delink_stage2_step;
898 int delink_stage3_step;
899
900 int auto_delink_in_L1;
901 int hp_watch_bios_hotplug;
902 int support_ms_8bit;
903
904 u8 blink_led;
905 u8 phy_voltage;
906 u8 max_payload;
907
908 u32 sd_speed_prior;
909 u32 sd_current_prior;
910 u32 sd_ctl;
911};
912
913#define rtsx_set_stat(chip, stat) \
914do { \
915 if ((stat) != RTSX_STAT_IDLE) { \
916 (chip)->idle_counter = 0; \
917 } \
918 (chip)->rtsx_stat = (enum RTSX_STAT)(stat); \
919} while (0)
920#define rtsx_get_stat(chip) ((chip)->rtsx_stat)
921#define rtsx_chk_stat(chip, stat) ((chip)->rtsx_stat == (stat))
922
923#define RTSX_SET_DELINK(chip) ((chip)->rtsx_flag |= 0x01)
924#define RTSX_CLR_DELINK(chip) ((chip)->rtsx_flag &= 0xFE)
925#define RTSX_TST_DELINK(chip) ((chip)->rtsx_flag & 0x01)
926
927#define CHECK_PID(chip, pid) ((chip)->product_id == (pid))
928#define CHECK_BARO_PKG(chip, pkg) ((chip)->baro_pkg == (pkg))
929#define CHECK_LUN_MODE(chip, mode) ((chip)->lun_mode == (mode))
930
931/* Power down control */
932#define SSC_PDCTL 0x01
933#define OC_PDCTL 0x02
934
935int rtsx_force_power_on(struct rtsx_chip *chip, u8 ctl);
936int rtsx_force_power_down(struct rtsx_chip *chip, u8 ctl);
937
938void rtsx_disable_card_int(struct rtsx_chip *chip);
939void rtsx_enable_card_int(struct rtsx_chip *chip);
940void rtsx_enable_bus_int(struct rtsx_chip *chip);
941void rtsx_disable_bus_int(struct rtsx_chip *chip);
942int rtsx_reset_chip(struct rtsx_chip *chip);
943int rtsx_init_chip(struct rtsx_chip *chip);
944void rtsx_release_chip(struct rtsx_chip *chip);
945void rtsx_polling_func(struct rtsx_chip *chip);
946void rtsx_undo_delink(struct rtsx_chip *chip);
947void rtsx_stop_cmd(struct rtsx_chip *chip, int card);
948int rtsx_write_register(struct rtsx_chip *chip, u16 addr, u8 mask, u8 data);
949int rtsx_read_register(struct rtsx_chip *chip, u16 addr, u8 *data);
950int rtsx_write_cfg_dw(struct rtsx_chip *chip, u8 func_no, u16 addr, u32 mask, u32 val);
951int rtsx_read_cfg_dw(struct rtsx_chip *chip, u8 func_no, u16 addr, u32 *val);
952int rtsx_write_cfg_seq(struct rtsx_chip *chip, u8 func, u16 addr, u8 *buf, int len);
953int rtsx_read_cfg_seq(struct rtsx_chip *chip, u8 func, u16 addr, u8 *buf, int len);
954int rtsx_write_phy_register(struct rtsx_chip *chip, u8 addr, u16 val);
955int rtsx_read_phy_register(struct rtsx_chip *chip, u8 addr, u16 *val);
956int rtsx_read_efuse(struct rtsx_chip *chip, u8 addr, u8 *val);
957int rtsx_write_efuse(struct rtsx_chip *chip, u8 addr, u8 val);
958int rtsx_clr_phy_reg_bit(struct rtsx_chip *chip, u8 reg, u8 bit);
959int rtsx_set_phy_reg_bit(struct rtsx_chip *chip, u8 reg, u8 bit);
960int rtsx_check_link_ready(struct rtsx_chip *chip);
961void rtsx_enter_ss(struct rtsx_chip *chip);
962void rtsx_exit_ss(struct rtsx_chip *chip);
963int rtsx_pre_handle_interrupt(struct rtsx_chip *chip);
964void rtsx_enter_L1(struct rtsx_chip *chip);
965void rtsx_exit_L1(struct rtsx_chip *chip);
966void rtsx_do_before_power_down(struct rtsx_chip *chip, int pm_stat);
967void rtsx_enable_aspm(struct rtsx_chip *chip);
968void rtsx_disable_aspm(struct rtsx_chip *chip);
969int rtsx_read_ppbuf(struct rtsx_chip *chip, u8 *buf, int buf_len);
970int rtsx_write_ppbuf(struct rtsx_chip *chip, u8 *buf, int buf_len);
971int rtsx_check_chip_exist(struct rtsx_chip *chip);
972
973#define RTSX_WRITE_REG(chip, addr, mask, data) \
974do { \
975 int retval = rtsx_write_register((chip), (addr), (mask), (data)); \
976 if (retval != STATUS_SUCCESS) { \
977 TRACE_RET((chip), retval); \
978 } \
979} while (0)
980
981#define RTSX_READ_REG(chip, addr, data) \
982do { \
983 int retval = rtsx_read_register((chip), (addr), (data)); \
984 if (retval != STATUS_SUCCESS) { \
985 TRACE_RET((chip), retval); \
986 } \
987} while (0)
988
989#endif /* __REALTEK_RTSX_CHIP_H */
diff --git a/drivers/staging/rts_pstor/rtsx_scsi.c b/drivers/staging/rts_pstor/rtsx_scsi.c
deleted file mode 100644
index 86c41b3a42a3..000000000000
--- a/drivers/staging/rts_pstor/rtsx_scsi.c
+++ /dev/null
@@ -1,3137 +0,0 @@
1/* Driver for Realtek PCI-Express card reader
2 *
3 * Copyright(c) 2009 Realtek Semiconductor Corp. All rights reserved.
4 *
5 * This program is free software; you can redistribute it and/or modify it
6 * under the terms of the GNU General Public License as published by the
7 * Free Software Foundation; either version 2, or (at your option) any
8 * later version.
9 *
10 * This program is distributed in the hope that it will be useful, but
11 * WITHOUT ANY WARRANTY; without even the implied warranty of
12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
13 * General Public License for more details.
14 *
15 * You should have received a copy of the GNU General Public License along
16 * with this program; if not, see <http://www.gnu.org/licenses/>.
17 *
18 * Author:
19 * wwang (wei_wang@realsil.com.cn)
20 * No. 450, Shenhu Road, Suzhou Industry Park, Suzhou, China
21 */
22
23#include <linux/blkdev.h>
24#include <linux/kthread.h>
25#include <linux/sched.h>
26#include <linux/vmalloc.h>
27
28#include "rtsx.h"
29#include "rtsx_transport.h"
30#include "rtsx_sys.h"
31#include "rtsx_card.h"
32#include "rtsx_chip.h"
33#include "rtsx_scsi.h"
34#include "sd.h"
35#include "ms.h"
36#include "spi.h"
37
38void scsi_show_command(struct scsi_cmnd *srb)
39{
40 char *what = NULL;
41 int i, unknown_cmd = 0;
42
43 switch (srb->cmnd[0]) {
44 case TEST_UNIT_READY: what = "TEST_UNIT_READY"; break;
45 case REZERO_UNIT: what = "REZERO_UNIT"; break;
46 case REQUEST_SENSE: what = "REQUEST_SENSE"; break;
47 case FORMAT_UNIT: what = "FORMAT_UNIT"; break;
48 case READ_BLOCK_LIMITS: what = "READ_BLOCK_LIMITS"; break;
49 case REASSIGN_BLOCKS: what = "REASSIGN_BLOCKS"; break;
50 case READ_6: what = "READ_6"; break;
51 case WRITE_6: what = "WRITE_6"; break;
52 case SEEK_6: what = "SEEK_6"; break;
53 case READ_REVERSE: what = "READ_REVERSE"; break;
54 case WRITE_FILEMARKS: what = "WRITE_FILEMARKS"; break;
55 case SPACE: what = "SPACE"; break;
56 case INQUIRY: what = "INQUIRY"; break;
57 case RECOVER_BUFFERED_DATA: what = "RECOVER_BUFFERED_DATA"; break;
58 case MODE_SELECT: what = "MODE_SELECT"; break;
59 case RESERVE: what = "RESERVE"; break;
60 case RELEASE: what = "RELEASE"; break;
61 case COPY: what = "COPY"; break;
62 case ERASE: what = "ERASE"; break;
63 case MODE_SENSE: what = "MODE_SENSE"; break;
64 case START_STOP: what = "START_STOP"; break;
65 case RECEIVE_DIAGNOSTIC: what = "RECEIVE_DIAGNOSTIC"; break;
66 case SEND_DIAGNOSTIC: what = "SEND_DIAGNOSTIC"; break;
67 case ALLOW_MEDIUM_REMOVAL: what = "ALLOW_MEDIUM_REMOVAL"; break;
68 case SET_WINDOW: what = "SET_WINDOW"; break;
69 case READ_CAPACITY: what = "READ_CAPACITY"; break;
70 case READ_10: what = "READ_10"; break;
71 case WRITE_10: what = "WRITE_10"; break;
72 case SEEK_10: what = "SEEK_10"; break;
73 case WRITE_VERIFY: what = "WRITE_VERIFY"; break;
74 case VERIFY: what = "VERIFY"; break;
75 case SEARCH_HIGH: what = "SEARCH_HIGH"; break;
76 case SEARCH_EQUAL: what = "SEARCH_EQUAL"; break;
77 case SEARCH_LOW: what = "SEARCH_LOW"; break;
78 case SET_LIMITS: what = "SET_LIMITS"; break;
79 case READ_POSITION: what = "READ_POSITION"; break;
80 case SYNCHRONIZE_CACHE: what = "SYNCHRONIZE_CACHE"; break;
81 case LOCK_UNLOCK_CACHE: what = "LOCK_UNLOCK_CACHE"; break;
82 case READ_DEFECT_DATA: what = "READ_DEFECT_DATA"; break;
83 case MEDIUM_SCAN: what = "MEDIUM_SCAN"; break;
84 case COMPARE: what = "COMPARE"; break;
85 case COPY_VERIFY: what = "COPY_VERIFY"; break;
86 case WRITE_BUFFER: what = "WRITE_BUFFER"; break;
87 case READ_BUFFER: what = "READ_BUFFER"; break;
88 case UPDATE_BLOCK: what = "UPDATE_BLOCK"; break;
89 case READ_LONG: what = "READ_LONG"; break;
90 case WRITE_LONG: what = "WRITE_LONG"; break;
91 case CHANGE_DEFINITION: what = "CHANGE_DEFINITION"; break;
92 case WRITE_SAME: what = "WRITE_SAME"; break;
93 case GPCMD_READ_SUBCHANNEL: what = "READ SUBCHANNEL"; break;
94 case READ_TOC: what = "READ_TOC"; break;
95 case GPCMD_READ_HEADER: what = "READ HEADER"; break;
96 case GPCMD_PLAY_AUDIO_10: what = "PLAY AUDIO (10)"; break;
97 case GPCMD_PLAY_AUDIO_MSF: what = "PLAY AUDIO MSF"; break;
98 case GPCMD_GET_EVENT_STATUS_NOTIFICATION:
99 what = "GET EVENT/STATUS NOTIFICATION"; break;
100 case GPCMD_PAUSE_RESUME: what = "PAUSE/RESUME"; break;
101 case LOG_SELECT: what = "LOG_SELECT"; break;
102 case LOG_SENSE: what = "LOG_SENSE"; break;
103 case GPCMD_STOP_PLAY_SCAN: what = "STOP PLAY/SCAN"; break;
104 case GPCMD_READ_DISC_INFO: what = "READ DISC INFORMATION"; break;
105 case GPCMD_READ_TRACK_RZONE_INFO:
106 what = "READ TRACK INFORMATION"; break;
107 case GPCMD_RESERVE_RZONE_TRACK: what = "RESERVE TRACK"; break;
108 case GPCMD_SEND_OPC: what = "SEND OPC"; break;
109 case MODE_SELECT_10: what = "MODE_SELECT_10"; break;
110 case GPCMD_REPAIR_RZONE_TRACK: what = "REPAIR TRACK"; break;
111 case 0x59: what = "READ MASTER CUE"; break;
112 case MODE_SENSE_10: what = "MODE_SENSE_10"; break;
113 case GPCMD_CLOSE_TRACK: what = "CLOSE TRACK/SESSION"; break;
114 case 0x5C: what = "READ BUFFER CAPACITY"; break;
115 case 0x5D: what = "SEND CUE SHEET"; break;
116 case GPCMD_BLANK: what = "BLANK"; break;
117 case REPORT_LUNS: what = "REPORT LUNS"; break;
118 case MOVE_MEDIUM: what = "MOVE_MEDIUM or PLAY AUDIO (12)"; break;
119 case READ_12: what = "READ_12"; break;
120 case WRITE_12: what = "WRITE_12"; break;
121 case WRITE_VERIFY_12: what = "WRITE_VERIFY_12"; break;
122 case SEARCH_HIGH_12: what = "SEARCH_HIGH_12"; break;
123 case SEARCH_EQUAL_12: what = "SEARCH_EQUAL_12"; break;
124 case SEARCH_LOW_12: what = "SEARCH_LOW_12"; break;
125 case SEND_VOLUME_TAG: what = "SEND_VOLUME_TAG"; break;
126 case READ_ELEMENT_STATUS: what = "READ_ELEMENT_STATUS"; break;
127 case GPCMD_READ_CD_MSF: what = "READ CD MSF"; break;
128 case GPCMD_SCAN: what = "SCAN"; break;
129 case GPCMD_SET_SPEED: what = "SET CD SPEED"; break;
130 case GPCMD_MECHANISM_STATUS: what = "MECHANISM STATUS"; break;
131 case GPCMD_READ_CD: what = "READ CD"; break;
132 case 0xE1: what = "WRITE CONTINUE"; break;
133 case WRITE_LONG_2: what = "WRITE_LONG_2"; break;
134 case VENDOR_CMND: what = "Realtek's vendor command"; break;
135 default: what = "(unknown command)"; unknown_cmd = 1; break;
136 }
137
138 if (srb->cmnd[0] != TEST_UNIT_READY)
139 RTSX_DEBUGP("Command %s (%d bytes)\n", what, srb->cmd_len);
140
141 if (unknown_cmd) {
142 RTSX_DEBUGP("");
143 for (i = 0; i < srb->cmd_len && i < 16; i++)
144 RTSX_DEBUGPN(" %02x", srb->cmnd[i]);
145 RTSX_DEBUGPN("\n");
146 }
147}
148
149void set_sense_type(struct rtsx_chip *chip, unsigned int lun, int sense_type)
150{
151 switch (sense_type) {
152 case SENSE_TYPE_MEDIA_CHANGE:
153 set_sense_data(chip, lun, CUR_ERR, 0x06, 0, 0x28, 0, 0, 0);
154 break;
155
156 case SENSE_TYPE_MEDIA_NOT_PRESENT:
157 set_sense_data(chip, lun, CUR_ERR, 0x02, 0, 0x3A, 0, 0, 0);
158 break;
159
160 case SENSE_TYPE_MEDIA_LBA_OVER_RANGE:
161 set_sense_data(chip, lun, CUR_ERR, 0x05, 0, 0x21, 0, 0, 0);
162 break;
163
164 case SENSE_TYPE_MEDIA_LUN_NOT_SUPPORT:
165 set_sense_data(chip, lun, CUR_ERR, 0x05, 0, 0x25, 0, 0, 0);
166 break;
167
168 case SENSE_TYPE_MEDIA_WRITE_PROTECT:
169 set_sense_data(chip, lun, CUR_ERR, 0x07, 0, 0x27, 0, 0, 0);
170 break;
171
172 case SENSE_TYPE_MEDIA_UNRECOVER_READ_ERR:
173 set_sense_data(chip, lun, CUR_ERR, 0x03, 0, 0x11, 0, 0, 0);
174 break;
175
176 case SENSE_TYPE_MEDIA_WRITE_ERR:
177 set_sense_data(chip, lun, CUR_ERR, 0x03, 0, 0x0C, 0x02, 0, 0);
178 break;
179
180 case SENSE_TYPE_MEDIA_INVALID_CMD_FIELD:
181 set_sense_data(chip, lun, CUR_ERR, ILGAL_REQ, 0,
182 ASC_INVLD_CDB, ASCQ_INVLD_CDB, CDB_ILLEGAL, 1);
183 break;
184
185 case SENSE_TYPE_FORMAT_IN_PROGRESS:
186 set_sense_data(chip, lun, CUR_ERR, 0x02, 0, 0x04, 0x04, 0, 0);
187 break;
188
189 case SENSE_TYPE_FORMAT_CMD_FAILED:
190 set_sense_data(chip, lun, CUR_ERR, 0x03, 0, 0x31, 0x01, 0, 0);
191 break;
192
193#ifdef SUPPORT_MAGIC_GATE
194 case SENSE_TYPE_MG_KEY_FAIL_NOT_ESTAB:
195 set_sense_data(chip, lun, CUR_ERR, 0x05, 0, 0x6F, 0x02, 0, 0);
196 break;
197
198 case SENSE_TYPE_MG_KEY_FAIL_NOT_AUTHEN:
199 set_sense_data(chip, lun, CUR_ERR, 0x05, 0, 0x6F, 0x00, 0, 0);
200 break;
201
202 case SENSE_TYPE_MG_INCOMPATIBLE_MEDIUM:
203 set_sense_data(chip, lun, CUR_ERR, 0x02, 0, 0x30, 0x00, 0, 0);
204 break;
205
206 case SENSE_TYPE_MG_WRITE_ERR:
207 set_sense_data(chip, lun, CUR_ERR, 0x03, 0, 0x0C, 0x00, 0, 0);
208 break;
209#endif
210
211#ifdef SUPPORT_SD_LOCK
212 case SENSE_TYPE_MEDIA_READ_FORBIDDEN:
213 set_sense_data(chip, lun, CUR_ERR, 0x07, 0, 0x11, 0x13, 0, 0);
214 break;
215#endif
216
217 case SENSE_TYPE_NO_SENSE:
218 default:
219 set_sense_data(chip, lun, CUR_ERR, 0, 0, 0, 0, 0, 0);
220 break;
221 }
222}
223
224void set_sense_data(struct rtsx_chip *chip, unsigned int lun, u8 err_code, u8 sense_key,
225 u32 info, u8 asc, u8 ascq, u8 sns_key_info0, u16 sns_key_info1)
226{
227 struct sense_data_t *sense = &(chip->sense_buffer[lun]);
228
229 sense->err_code = err_code;
230 sense->sense_key = sense_key;
231 sense->info[0] = (u8)(info >> 24);
232 sense->info[1] = (u8)(info >> 16);
233 sense->info[2] = (u8)(info >> 8);
234 sense->info[3] = (u8)info;
235
236 sense->ad_sense_len = sizeof(struct sense_data_t) - 8;
237 sense->asc = asc;
238 sense->ascq = ascq;
239 if (sns_key_info0 != 0) {
240 sense->sns_key_info[0] = SKSV | sns_key_info0;
241 sense->sns_key_info[1] = (sns_key_info1 & 0xf0) >> 8;
242 sense->sns_key_info[2] = sns_key_info1 & 0x0f;
243 }
244}
245
246static int test_unit_ready(struct scsi_cmnd *srb, struct rtsx_chip *chip)
247{
248 unsigned int lun = SCSI_LUN(srb);
249
250 if (!check_card_ready(chip, lun)) {
251 set_sense_type(chip, lun, SENSE_TYPE_MEDIA_NOT_PRESENT);
252 return TRANSPORT_FAILED;
253 }
254
255 if (!(CHK_BIT(chip->lun_mc, lun))) {
256 SET_BIT(chip->lun_mc, lun);
257 set_sense_type(chip, lun, SENSE_TYPE_MEDIA_CHANGE);
258 return TRANSPORT_FAILED;
259 }
260
261#ifdef SUPPORT_SD_LOCK
262 if (get_lun_card(chip, SCSI_LUN(srb)) == SD_CARD) {
263 struct sd_info *sd_card = &(chip->sd_card);
264 if (sd_card->sd_lock_notify) {
265 sd_card->sd_lock_notify = 0;
266 set_sense_type(chip, lun, SENSE_TYPE_MEDIA_CHANGE);
267 return TRANSPORT_FAILED;
268 } else if (sd_card->sd_lock_status & SD_LOCKED) {
269 set_sense_type(chip, lun, SENSE_TYPE_MEDIA_READ_FORBIDDEN);
270 return TRANSPORT_FAILED;
271 }
272 }
273#endif
274
275 return TRANSPORT_GOOD;
276}
277
278static unsigned char formatter_inquiry_str[20] = {
279 'M', 'E', 'M', 'O', 'R', 'Y', 'S', 'T', 'I', 'C', 'K',
280#ifdef SUPPORT_MAGIC_GATE
281 '-', 'M', 'G', /* Byte[47:49] */
282#else
283 0x20, 0x20, 0x20, /* Byte[47:49] */
284#endif
285
286#ifdef SUPPORT_MAGIC_GATE
287 0x0B, /* Byte[50]: MG, MS, MSPro, MSXC */
288#else
289 0x09, /* Byte[50]: MS, MSPro, MSXC */
290#endif
291 0x00, /* Byte[51]: Category Specific Commands */
292 0x00, /* Byte[52]: Access Control and feature */
293 0x20, 0x20, 0x20, /* Byte[53:55] */
294};
295
296static int inquiry(struct scsi_cmnd *srb, struct rtsx_chip *chip)
297{
298 unsigned int lun = SCSI_LUN(srb);
299 char *inquiry_default = (char *)"Generic-xD/SD/M.S. 1.00 ";
300 char *inquiry_sdms = (char *)"Generic-SD/MemoryStick 1.00 ";
301 char *inquiry_sd = (char *)"Generic-SD/MMC 1.00 ";
302 char *inquiry_ms = (char *)"Generic-MemoryStick 1.00 ";
303 char *inquiry_string;
304 unsigned char sendbytes;
305 unsigned char *buf;
306 u8 card = get_lun_card(chip, lun);
307 int pro_formatter_flag = 0;
308 unsigned char inquiry_buf[] = {
309 QULIFIRE|DRCT_ACCESS_DEV,
310 RMB_DISC|0x0D,
311 0x00,
312 0x01,
313 0x1f,
314 0x02,
315 0,
316 REL_ADR|WBUS_32|WBUS_16|SYNC|LINKED|CMD_QUE|SFT_RE,
317 };
318
319 if (CHECK_LUN_MODE(chip, SD_MS_2LUN)) {
320 if (chip->lun2card[lun] == SD_CARD)
321 inquiry_string = inquiry_sd;
322 else
323 inquiry_string = inquiry_ms;
324
325 } else if (CHECK_LUN_MODE(chip, SD_MS_1LUN)) {
326 inquiry_string = inquiry_sdms;
327 } else {
328 inquiry_string = inquiry_default;
329 }
330
331 buf = vmalloc(scsi_bufflen(srb));
332 if (buf == NULL)
333 TRACE_RET(chip, TRANSPORT_ERROR);
334
335#ifdef SUPPORT_MAGIC_GATE
336 if ((chip->mspro_formatter_enable) &&
337 (chip->lun2card[lun] & MS_CARD))
338#else
339 if (chip->mspro_formatter_enable)
340#endif
341 {
342 if (!card || (card == MS_CARD))
343 pro_formatter_flag = 1;
344 }
345
346 if (pro_formatter_flag) {
347 if (scsi_bufflen(srb) < 56)
348 sendbytes = (unsigned char)(scsi_bufflen(srb));
349 else
350 sendbytes = 56;
351
352 } else {
353 if (scsi_bufflen(srb) < 36)
354 sendbytes = (unsigned char)(scsi_bufflen(srb));
355 else
356 sendbytes = 36;
357 }
358
359 if (sendbytes > 8) {
360 memcpy(buf, inquiry_buf, 8);
361 memcpy(buf + 8, inquiry_string, sendbytes - 8);
362 if (pro_formatter_flag) {
363 /* Additional Length */
364 buf[4] = 0x33;
365 }
366 } else {
367 memcpy(buf, inquiry_buf, sendbytes);
368 }
369
370 if (pro_formatter_flag) {
371 if (sendbytes > 36)
372 memcpy(buf + 36, formatter_inquiry_str, sendbytes - 36);
373 }
374
375 scsi_set_resid(srb, 0);
376
377 rtsx_stor_set_xfer_buf(buf, scsi_bufflen(srb), srb);
378 vfree(buf);
379
380 return TRANSPORT_GOOD;
381}
382
383
384static int start_stop_unit(struct scsi_cmnd *srb, struct rtsx_chip *chip)
385{
386 unsigned int lun = SCSI_LUN(srb);
387
388 scsi_set_resid(srb, scsi_bufflen(srb));
389
390 if (srb->cmnd[1] == 1)
391 return TRANSPORT_GOOD;
392
393 switch (srb->cmnd[0x4]) {
394 case STOP_MEDIUM:
395 /* Media disabled */
396 return TRANSPORT_GOOD;
397
398 case UNLOAD_MEDIUM:
399 /* Media shall be unload */
400 if (check_card_ready(chip, lun))
401 eject_card(chip, lun);
402 return TRANSPORT_GOOD;
403
404 case MAKE_MEDIUM_READY:
405 case LOAD_MEDIUM:
406 if (check_card_ready(chip, lun)) {
407 return TRANSPORT_GOOD;
408 } else {
409 set_sense_type(chip, lun, SENSE_TYPE_MEDIA_NOT_PRESENT);
410 TRACE_RET(chip, TRANSPORT_FAILED);
411 }
412
413 break;
414 }
415
416 TRACE_RET(chip, TRANSPORT_ERROR);
417}
418
419
420static int allow_medium_removal(struct scsi_cmnd *srb, struct rtsx_chip *chip)
421{
422 int prevent;
423
424 prevent = srb->cmnd[4] & 0x1;
425
426 scsi_set_resid(srb, 0);
427
428 if (prevent) {
429 set_sense_type(chip, SCSI_LUN(srb), SENSE_TYPE_MEDIA_INVALID_CMD_FIELD);
430 TRACE_RET(chip, TRANSPORT_FAILED);
431 }
432
433 return TRANSPORT_GOOD;
434}
435
436
437static int request_sense(struct scsi_cmnd *srb, struct rtsx_chip *chip)
438{
439 struct sense_data_t *sense;
440 unsigned int lun = SCSI_LUN(srb);
441 struct ms_info *ms_card = &(chip->ms_card);
442 unsigned char *tmp, *buf;
443
444 sense = &(chip->sense_buffer[lun]);
445
446 if ((get_lun_card(chip, lun) == MS_CARD) && ms_card->pro_under_formatting) {
447 if (ms_card->format_status == FORMAT_SUCCESS) {
448 set_sense_type(chip, lun, SENSE_TYPE_NO_SENSE);
449 ms_card->pro_under_formatting = 0;
450 ms_card->progress = 0;
451 } else if (ms_card->format_status == FORMAT_IN_PROGRESS) {
452 /* Logical Unit Not Ready Format in Progress */
453 set_sense_data(chip, lun, CUR_ERR, 0x02, 0, 0x04, 0x04,
454 0, (u16)(ms_card->progress));
455 } else {
456 /* Format Command Failed */
457 set_sense_type(chip, lun, SENSE_TYPE_FORMAT_CMD_FAILED);
458 ms_card->pro_under_formatting = 0;
459 ms_card->progress = 0;
460 }
461
462 rtsx_set_stat(chip, RTSX_STAT_RUN);
463 }
464
465 buf = vmalloc(scsi_bufflen(srb));
466 if (buf == NULL)
467 TRACE_RET(chip, TRANSPORT_ERROR);
468
469 tmp = (unsigned char *)sense;
470 memcpy(buf, tmp, scsi_bufflen(srb));
471
472 rtsx_stor_set_xfer_buf(buf, scsi_bufflen(srb), srb);
473 vfree(buf);
474
475 scsi_set_resid(srb, 0);
476 /* Reset Sense Data */
477 set_sense_type(chip, lun, SENSE_TYPE_NO_SENSE);
478 return TRANSPORT_GOOD;
479}
480
481static void ms_mode_sense(struct rtsx_chip *chip, u8 cmd,
482 int lun, u8 *buf, int buf_len)
483{
484 struct ms_info *ms_card = &(chip->ms_card);
485 int sys_info_offset;
486 int data_size = buf_len;
487 int support_format = 0;
488 int i = 0;
489
490 if (cmd == MODE_SENSE) {
491 sys_info_offset = 8;
492 if (data_size > 0x68)
493 data_size = 0x68;
494
495 buf[i++] = 0x67; /* Mode Data Length */
496 } else {
497 sys_info_offset = 12;
498 if (data_size > 0x6C)
499 data_size = 0x6C;
500
501 buf[i++] = 0x00; /* Mode Data Length (MSB) */
502 buf[i++] = 0x6A; /* Mode Data Length (LSB) */
503 }
504
505 /* Medium Type Code */
506 if (check_card_ready(chip, lun)) {
507 if (CHK_MSXC(ms_card)) {
508 support_format = 1;
509 buf[i++] = 0x40;
510 } else if (CHK_MSPRO(ms_card)) {
511 support_format = 1;
512 buf[i++] = 0x20;
513 } else {
514 buf[i++] = 0x10;
515 }
516
517 /* WP */
518 if (check_card_wp(chip, lun))
519 buf[i++] = 0x80;
520 else
521 buf[i++] = 0x00;
522
523 } else {
524 buf[i++] = 0x00; /* MediaType */
525 buf[i++] = 0x00; /* WP */
526 }
527
528 buf[i++] = 0x00; /* Reserved */
529
530 if (cmd == MODE_SENSE_10) {
531 buf[i++] = 0x00; /* Reserved */
532 buf[i++] = 0x00; /* Block descriptor length(MSB) */
533 buf[i++] = 0x00; /* Block descriptor length(LSB) */
534
535 /* The Following Data is the content of "Page 0x20" */
536 if (data_size >= 9)
537 buf[i++] = 0x20; /* Page Code */
538 if (data_size >= 10)
539 buf[i++] = 0x62; /* Page Length */
540 if (data_size >= 11)
541 buf[i++] = 0x00; /* No Access Control */
542 if (data_size >= 12) {
543 if (support_format)
544 buf[i++] = 0xC0; /* SF, SGM */
545 else
546 buf[i++] = 0x00;
547 }
548 } else {
549 /* The Following Data is the content of "Page 0x20" */
550 if (data_size >= 5)
551 buf[i++] = 0x20; /* Page Code */
552 if (data_size >= 6)
553 buf[i++] = 0x62; /* Page Length */
554 if (data_size >= 7)
555 buf[i++] = 0x00; /* No Access Control */
556 if (data_size >= 8) {
557 if (support_format)
558 buf[i++] = 0xC0; /* SF, SGM */
559 else
560 buf[i++] = 0x00;
561 }
562 }
563
564 if (data_size > sys_info_offset) {
565 /* 96 Bytes Attribute Data */
566 int len = data_size - sys_info_offset;
567 len = (len < 96) ? len : 96;
568
569 memcpy(buf + sys_info_offset, ms_card->raw_sys_info, len);
570 }
571}
572
573static int mode_sense(struct scsi_cmnd *srb, struct rtsx_chip *chip)
574{
575 unsigned int lun = SCSI_LUN(srb);
576 unsigned int dataSize;
577 int status;
578 int pro_formatter_flag;
579 unsigned char pageCode, *buf;
580 u8 card = get_lun_card(chip, lun);
581
582#ifndef SUPPORT_MAGIC_GATE
583 if (!check_card_ready(chip, lun)) {
584 set_sense_type(chip, lun, SENSE_TYPE_MEDIA_NOT_PRESENT);
585 scsi_set_resid(srb, scsi_bufflen(srb));
586 TRACE_RET(chip, TRANSPORT_FAILED);
587 }
588#endif
589
590 pro_formatter_flag = 0;
591 dataSize = 8;
592#ifdef SUPPORT_MAGIC_GATE
593 if ((chip->lun2card[lun] & MS_CARD)) {
594 if (!card || (card == MS_CARD)) {
595 dataSize = 108;
596 if (chip->mspro_formatter_enable)
597 pro_formatter_flag = 1;
598 }
599 }
600#else
601 if (card == MS_CARD) {
602 if (chip->mspro_formatter_enable) {
603 pro_formatter_flag = 1;
604 dataSize = 108;
605 }
606 }
607#endif
608
609 buf = kmalloc(dataSize, GFP_KERNEL);
610 if (buf == NULL)
611 TRACE_RET(chip, TRANSPORT_ERROR);
612
613 pageCode = srb->cmnd[2] & 0x3f;
614
615 if ((pageCode == 0x3F) || (pageCode == 0x1C) ||
616 (pageCode == 0x00) ||
617 (pro_formatter_flag && (pageCode == 0x20))) {
618 if (srb->cmnd[0] == MODE_SENSE) {
619 if ((pageCode == 0x3F) || (pageCode == 0x20)) {
620 ms_mode_sense(chip, srb->cmnd[0],
621 lun, buf, dataSize);
622 } else {
623 dataSize = 4;
624 buf[0] = 0x03;
625 buf[1] = 0x00;
626 if (check_card_wp(chip, lun))
627 buf[2] = 0x80;
628 else
629 buf[2] = 0x00;
630
631 buf[3] = 0x00;
632 }
633 } else {
634 if ((pageCode == 0x3F) || (pageCode == 0x20)) {
635 ms_mode_sense(chip, srb->cmnd[0],
636 lun, buf, dataSize);
637 } else {
638 dataSize = 8;
639 buf[0] = 0x00;
640 buf[1] = 0x06;
641 buf[2] = 0x00;
642 if (check_card_wp(chip, lun))
643 buf[3] = 0x80;
644 else
645 buf[3] = 0x00;
646 buf[4] = 0x00;
647 buf[5] = 0x00;
648 buf[6] = 0x00;
649 buf[7] = 0x00;
650 }
651 }
652 status = TRANSPORT_GOOD;
653 } else {
654 set_sense_type(chip, lun, SENSE_TYPE_MEDIA_INVALID_CMD_FIELD);
655 scsi_set_resid(srb, scsi_bufflen(srb));
656 status = TRANSPORT_FAILED;
657 }
658
659 if (status == TRANSPORT_GOOD) {
660 unsigned int len = min(scsi_bufflen(srb), dataSize);
661 rtsx_stor_set_xfer_buf(buf, len, srb);
662 scsi_set_resid(srb, scsi_bufflen(srb) - len);
663 }
664 kfree(buf);
665
666 return status;
667}
668
669static int read_write(struct scsi_cmnd *srb, struct rtsx_chip *chip)
670{
671#ifdef SUPPORT_SD_LOCK
672 struct sd_info *sd_card = &(chip->sd_card);
673#endif
674 unsigned int lun = SCSI_LUN(srb);
675 int retval;
676 u32 start_sec;
677 u16 sec_cnt;
678
679 rtsx_disable_aspm(chip);
680
681 if (chip->ss_en && (rtsx_get_stat(chip) == RTSX_STAT_SS)) {
682 rtsx_exit_ss(chip);
683 wait_timeout(100);
684 }
685 rtsx_set_stat(chip, RTSX_STAT_RUN);
686
687 if (!check_card_ready(chip, lun) || (get_card_size(chip, lun) == 0)) {
688 set_sense_type(chip, lun, SENSE_TYPE_MEDIA_NOT_PRESENT);
689 TRACE_RET(chip, TRANSPORT_FAILED);
690 }
691
692 if (!(CHK_BIT(chip->lun_mc, lun))) {
693 SET_BIT(chip->lun_mc, lun);
694 set_sense_type(chip, lun, SENSE_TYPE_MEDIA_CHANGE);
695 return TRANSPORT_FAILED;
696 }
697
698#ifdef SUPPORT_SD_LOCK
699 if (sd_card->sd_erase_status) {
700 /* Accessing to any card is forbidden
701 * until the erase procedure of SD is completed
702 */
703 RTSX_DEBUGP("SD card being erased!\n");
704 set_sense_type(chip, lun, SENSE_TYPE_MEDIA_READ_FORBIDDEN);
705 TRACE_RET(chip, TRANSPORT_FAILED);
706 }
707
708 if (get_lun_card(chip, lun) == SD_CARD) {
709 if (sd_card->sd_lock_status & SD_LOCKED) {
710 RTSX_DEBUGP("SD card locked!\n");
711 set_sense_type(chip, lun, SENSE_TYPE_MEDIA_READ_FORBIDDEN);
712 TRACE_RET(chip, TRANSPORT_FAILED);
713 }
714 }
715#endif
716
717 if ((srb->cmnd[0] == READ_10) || (srb->cmnd[0] == WRITE_10)) {
718 start_sec = ((u32)srb->cmnd[2] << 24) | ((u32)srb->cmnd[3] << 16) |
719 ((u32)srb->cmnd[4] << 8) | ((u32)srb->cmnd[5]);
720 sec_cnt = ((u16)(srb->cmnd[7]) << 8) | srb->cmnd[8];
721 } else if ((srb->cmnd[0] == READ_6) || (srb->cmnd[0] == WRITE_6)) {
722 start_sec = ((u32)(srb->cmnd[1] & 0x1F) << 16) |
723 ((u32)srb->cmnd[2] << 8) | ((u32)srb->cmnd[3]);
724 sec_cnt = srb->cmnd[4];
725 } else if ((srb->cmnd[0] == VENDOR_CMND) && (srb->cmnd[1] == SCSI_APP_CMD) &&
726 ((srb->cmnd[2] == PP_READ10) || (srb->cmnd[2] == PP_WRITE10))) {
727 start_sec = ((u32)srb->cmnd[4] << 24) | ((u32)srb->cmnd[5] << 16) |
728 ((u32)srb->cmnd[6] << 8) | ((u32)srb->cmnd[7]);
729 sec_cnt = ((u16)(srb->cmnd[9]) << 8) | srb->cmnd[10];
730 } else {
731 set_sense_type(chip, lun, SENSE_TYPE_MEDIA_INVALID_CMD_FIELD);
732 TRACE_RET(chip, TRANSPORT_FAILED);
733 }
734
735 /* In some test, we will receive a start_sec like 0xFFFFFFFF.
736 * In this situation, start_sec + sec_cnt will overflow, so we
737 * need to judge start_sec at first
738 */
739 if ((start_sec > get_card_size(chip, lun)) ||
740 ((start_sec + sec_cnt) > get_card_size(chip, lun))) {
741 set_sense_type(chip, lun, SENSE_TYPE_MEDIA_LBA_OVER_RANGE);
742 TRACE_RET(chip, TRANSPORT_FAILED);
743 }
744
745 if (sec_cnt == 0) {
746 scsi_set_resid(srb, 0);
747 return TRANSPORT_GOOD;
748 }
749
750 if (chip->rw_fail_cnt[lun] == 3) {
751 RTSX_DEBUGP("read/write fail three times in succession\n");
752 if (srb->sc_data_direction == DMA_FROM_DEVICE)
753 set_sense_type(chip, lun, SENSE_TYPE_MEDIA_UNRECOVER_READ_ERR);
754 else
755 set_sense_type(chip, lun, SENSE_TYPE_MEDIA_WRITE_ERR);
756
757 TRACE_RET(chip, TRANSPORT_FAILED);
758 }
759
760 if (srb->sc_data_direction == DMA_TO_DEVICE) {
761 if (check_card_wp(chip, lun)) {
762 RTSX_DEBUGP("Write protected card!\n");
763 set_sense_type(chip, lun, SENSE_TYPE_MEDIA_WRITE_PROTECT);
764 TRACE_RET(chip, TRANSPORT_FAILED);
765 }
766 if (CHECK_PID(chip, 0x5209) && chip->max_payload) {
767 u8 val = 0x10 | (chip->max_payload << 5);
768 retval = rtsx_write_cfg_dw(chip, 0, 0x78, 0xFF, val);
769 if (retval != STATUS_SUCCESS)
770 TRACE_RET(chip, TRANSPORT_ERROR);
771 }
772 }
773
774 retval = card_rw(srb, chip, start_sec, sec_cnt);
775 if (retval != STATUS_SUCCESS) {
776 if (chip->need_release & chip->lun2card[lun]) {
777 chip->rw_fail_cnt[lun] = 0;
778 set_sense_type(chip, lun, SENSE_TYPE_MEDIA_NOT_PRESENT);
779 } else {
780 chip->rw_fail_cnt[lun]++;
781 if (srb->sc_data_direction == DMA_FROM_DEVICE)
782 set_sense_type(chip, lun, SENSE_TYPE_MEDIA_UNRECOVER_READ_ERR);
783 else
784 set_sense_type(chip, lun, SENSE_TYPE_MEDIA_WRITE_ERR);
785 }
786 retval = TRANSPORT_FAILED;
787 TRACE_GOTO(chip, Exit);
788 } else {
789 chip->rw_fail_cnt[lun] = 0;
790 retval = TRANSPORT_GOOD;
791 }
792
793 scsi_set_resid(srb, 0);
794
795Exit:
796 if (srb->sc_data_direction == DMA_TO_DEVICE) {
797 if (CHECK_PID(chip, 0x5209) && chip->max_payload) {
798 retval = rtsx_write_cfg_dw(chip, 0, 0x78, 0xFF, 0x10);
799 if (retval != STATUS_SUCCESS)
800 TRACE_RET(chip, TRANSPORT_ERROR);
801 }
802 }
803
804 return retval;
805}
806
807static int read_format_capacity(struct scsi_cmnd *srb, struct rtsx_chip *chip)
808{
809 unsigned char *buf;
810 unsigned int lun = SCSI_LUN(srb);
811 unsigned int buf_len;
812 u8 card = get_lun_card(chip, lun);
813 u32 card_size;
814 int desc_cnt;
815 int i = 0;
816
817 if (!check_card_ready(chip, lun)) {
818 if (!chip->mspro_formatter_enable) {
819 set_sense_type(chip, lun, SENSE_TYPE_MEDIA_NOT_PRESENT);
820 TRACE_RET(chip, TRANSPORT_FAILED);
821 }
822 }
823
824 buf_len = (scsi_bufflen(srb) > 12) ? 0x14 : 12;
825
826 buf = kmalloc(buf_len, GFP_KERNEL);
827 if (buf == NULL)
828 TRACE_RET(chip, TRANSPORT_ERROR);
829
830 buf[i++] = 0;
831 buf[i++] = 0;
832 buf[i++] = 0;
833
834 /* Capacity List Length */
835 if ((buf_len > 12) && chip->mspro_formatter_enable &&
836 (chip->lun2card[lun] & MS_CARD) &&
837 (!card || (card == MS_CARD))) {
838 buf[i++] = 0x10;
839 desc_cnt = 2;
840 } else {
841 buf[i++] = 0x08;
842 desc_cnt = 1;
843 }
844
845 while (desc_cnt) {
846 if (check_card_ready(chip, lun)) {
847 card_size = get_card_size(chip, lun);
848 buf[i++] = (unsigned char)(card_size >> 24);
849 buf[i++] = (unsigned char)(card_size >> 16);
850 buf[i++] = (unsigned char)(card_size >> 8);
851 buf[i++] = (unsigned char)card_size;
852
853 if (desc_cnt == 2)
854 buf[i++] = 2;
855 else
856 buf[i++] = 0;
857 } else {
858 buf[i++] = 0xFF;
859 buf[i++] = 0xFF;
860 buf[i++] = 0xFF;
861 buf[i++] = 0xFF;
862
863 if (desc_cnt == 2)
864 buf[i++] = 3;
865 else
866 buf[i++] = 0;
867 }
868
869 buf[i++] = 0x00;
870 buf[i++] = 0x02;
871 buf[i++] = 0x00;
872
873 desc_cnt--;
874 }
875
876 buf_len = min(scsi_bufflen(srb), buf_len);
877 rtsx_stor_set_xfer_buf(buf, buf_len, srb);
878 kfree(buf);
879
880 scsi_set_resid(srb, scsi_bufflen(srb) - buf_len);
881
882 return TRANSPORT_GOOD;
883}
884
885static int read_capacity(struct scsi_cmnd *srb, struct rtsx_chip *chip)
886{
887 unsigned char *buf;
888 unsigned int lun = SCSI_LUN(srb);
889 u32 card_size;
890
891 if (!check_card_ready(chip, lun)) {
892 set_sense_type(chip, lun, SENSE_TYPE_MEDIA_NOT_PRESENT);
893 TRACE_RET(chip, TRANSPORT_FAILED);
894 }
895
896 if (!(CHK_BIT(chip->lun_mc, lun))) {
897 SET_BIT(chip->lun_mc, lun);
898 set_sense_type(chip, lun, SENSE_TYPE_MEDIA_CHANGE);
899 return TRANSPORT_FAILED;
900 }
901
902 buf = kmalloc(8, GFP_KERNEL);
903 if (buf == NULL)
904 TRACE_RET(chip, TRANSPORT_ERROR);
905
906 card_size = get_card_size(chip, lun);
907 buf[0] = (unsigned char)((card_size - 1) >> 24);
908 buf[1] = (unsigned char)((card_size - 1) >> 16);
909 buf[2] = (unsigned char)((card_size - 1) >> 8);
910 buf[3] = (unsigned char)(card_size - 1);
911
912 buf[4] = 0x00;
913 buf[5] = 0x00;
914 buf[6] = 0x02;
915 buf[7] = 0x00;
916
917 rtsx_stor_set_xfer_buf(buf, scsi_bufflen(srb), srb);
918 kfree(buf);
919
920 scsi_set_resid(srb, 0);
921
922 return TRANSPORT_GOOD;
923}
924
925static int read_eeprom(struct scsi_cmnd *srb, struct rtsx_chip *chip)
926{
927 unsigned short len, i;
928 int retval;
929 u8 *buf;
930
931 rtsx_disable_aspm(chip);
932
933 if (chip->ss_en && (rtsx_get_stat(chip) == RTSX_STAT_SS)) {
934 rtsx_exit_ss(chip);
935 wait_timeout(100);
936 }
937 rtsx_set_stat(chip, RTSX_STAT_RUN);
938
939 len = ((u16)srb->cmnd[4] << 8) | srb->cmnd[5];
940
941 buf = (u8 *)vmalloc(len);
942 if (!buf)
943 TRACE_RET(chip, TRANSPORT_ERROR);
944
945 retval = rtsx_force_power_on(chip, SSC_PDCTL);
946 if (retval != STATUS_SUCCESS) {
947 vfree(buf);
948 set_sense_type(chip, SCSI_LUN(srb), SENSE_TYPE_MEDIA_UNRECOVER_READ_ERR);
949 TRACE_RET(chip, TRANSPORT_FAILED);
950 }
951
952 for (i = 0; i < len; i++) {
953 retval = spi_read_eeprom(chip, i, buf + i);
954 if (retval != STATUS_SUCCESS) {
955 vfree(buf);
956 set_sense_type(chip, SCSI_LUN(srb), SENSE_TYPE_MEDIA_UNRECOVER_READ_ERR);
957 TRACE_RET(chip, TRANSPORT_FAILED);
958 }
959 }
960
961 len = (unsigned short)min(scsi_bufflen(srb), (unsigned int)len);
962 rtsx_stor_set_xfer_buf(buf, len, srb);
963 scsi_set_resid(srb, scsi_bufflen(srb) - len);
964
965 vfree(buf);
966
967 return TRANSPORT_GOOD;
968}
969
970static int write_eeprom(struct scsi_cmnd *srb, struct rtsx_chip *chip)
971{
972 unsigned short len, i;
973 int retval;
974 u8 *buf;
975
976 rtsx_disable_aspm(chip);
977
978 if (chip->ss_en && (rtsx_get_stat(chip) == RTSX_STAT_SS)) {
979 rtsx_exit_ss(chip);
980 wait_timeout(100);
981 }
982 rtsx_set_stat(chip, RTSX_STAT_RUN);
983
984 len = ((u16)srb->cmnd[4] << 8) | srb->cmnd[5];
985
986 retval = rtsx_force_power_on(chip, SSC_PDCTL);
987 if (retval != STATUS_SUCCESS) {
988 set_sense_type(chip, SCSI_LUN(srb), SENSE_TYPE_MEDIA_WRITE_ERR);
989 TRACE_RET(chip, TRANSPORT_FAILED);
990 }
991
992 if (len == 511) {
993 retval = spi_erase_eeprom_chip(chip);
994 if (retval != STATUS_SUCCESS) {
995 set_sense_type(chip, SCSI_LUN(srb), SENSE_TYPE_MEDIA_WRITE_ERR);
996 TRACE_RET(chip, TRANSPORT_FAILED);
997 }
998 } else {
999 len = (unsigned short)min(scsi_bufflen(srb), (unsigned int)len);
1000 buf = (u8 *)vmalloc(len);
1001 if (buf == NULL)
1002 TRACE_RET(chip, TRANSPORT_ERROR);
1003
1004 rtsx_stor_get_xfer_buf(buf, len, srb);
1005 scsi_set_resid(srb, scsi_bufflen(srb) - len);
1006
1007 for (i = 0; i < len; i++) {
1008 retval = spi_write_eeprom(chip, i, buf[i]);
1009 if (retval != STATUS_SUCCESS) {
1010 vfree(buf);
1011 set_sense_type(chip, SCSI_LUN(srb), SENSE_TYPE_MEDIA_WRITE_ERR);
1012 TRACE_RET(chip, TRANSPORT_FAILED);
1013 }
1014 }
1015
1016 vfree(buf);
1017 }
1018
1019 return TRANSPORT_GOOD;
1020}
1021
1022static int read_mem(struct scsi_cmnd *srb, struct rtsx_chip *chip)
1023{
1024 unsigned short addr, len, i;
1025 int retval;
1026 u8 *buf;
1027
1028 rtsx_disable_aspm(chip);
1029
1030 if (chip->ss_en && (rtsx_get_stat(chip) == RTSX_STAT_SS)) {
1031 rtsx_exit_ss(chip);
1032 wait_timeout(100);
1033 }
1034 rtsx_set_stat(chip, RTSX_STAT_RUN);
1035
1036 addr = ((u16)srb->cmnd[2] << 8) | srb->cmnd[3];
1037 len = ((u16)srb->cmnd[4] << 8) | srb->cmnd[5];
1038
1039 if (addr < 0xFC00) {
1040 set_sense_type(chip, SCSI_LUN(srb), SENSE_TYPE_MEDIA_INVALID_CMD_FIELD);
1041 TRACE_RET(chip, TRANSPORT_FAILED);
1042 }
1043
1044 buf = (u8 *)vmalloc(len);
1045 if (!buf)
1046 TRACE_RET(chip, TRANSPORT_ERROR);
1047
1048 retval = rtsx_force_power_on(chip, SSC_PDCTL);
1049 if (retval != STATUS_SUCCESS) {
1050 vfree(buf);
1051 set_sense_type(chip, SCSI_LUN(srb), SENSE_TYPE_MEDIA_WRITE_ERR);
1052 TRACE_RET(chip, TRANSPORT_FAILED);
1053 }
1054
1055 for (i = 0; i < len; i++) {
1056 retval = rtsx_read_register(chip, addr + i, buf + i);
1057 if (retval != STATUS_SUCCESS) {
1058 vfree(buf);
1059 set_sense_type(chip, SCSI_LUN(srb), SENSE_TYPE_MEDIA_UNRECOVER_READ_ERR);
1060 TRACE_RET(chip, TRANSPORT_FAILED);
1061 }
1062 }
1063
1064 len = (unsigned short)min(scsi_bufflen(srb), (unsigned int)len);
1065 rtsx_stor_set_xfer_buf(buf, len, srb);
1066 scsi_set_resid(srb, scsi_bufflen(srb) - len);
1067
1068 vfree(buf);
1069
1070 return TRANSPORT_GOOD;
1071}
1072
1073static int write_mem(struct scsi_cmnd *srb, struct rtsx_chip *chip)
1074{
1075 unsigned short addr, len, i;
1076 int retval;
1077 u8 *buf;
1078
1079 rtsx_disable_aspm(chip);
1080
1081 if (chip->ss_en && (rtsx_get_stat(chip) == RTSX_STAT_SS)) {
1082 rtsx_exit_ss(chip);
1083 wait_timeout(100);
1084 }
1085 rtsx_set_stat(chip, RTSX_STAT_RUN);
1086
1087 addr = ((u16)srb->cmnd[2] << 8) | srb->cmnd[3];
1088 len = ((u16)srb->cmnd[4] << 8) | srb->cmnd[5];
1089
1090 if (addr < 0xFC00) {
1091 set_sense_type(chip, SCSI_LUN(srb), SENSE_TYPE_MEDIA_INVALID_CMD_FIELD);
1092 TRACE_RET(chip, TRANSPORT_FAILED);
1093 }
1094
1095 len = (unsigned short)min(scsi_bufflen(srb), (unsigned int)len);
1096 buf = (u8 *)vmalloc(len);
1097 if (buf == NULL)
1098 TRACE_RET(chip, TRANSPORT_ERROR);
1099
1100 rtsx_stor_get_xfer_buf(buf, len, srb);
1101 scsi_set_resid(srb, scsi_bufflen(srb) - len);
1102
1103 retval = rtsx_force_power_on(chip, SSC_PDCTL);
1104 if (retval != STATUS_SUCCESS) {
1105 vfree(buf);
1106 set_sense_type(chip, SCSI_LUN(srb), SENSE_TYPE_MEDIA_WRITE_ERR);
1107 TRACE_RET(chip, TRANSPORT_FAILED);
1108 }
1109
1110 for (i = 0; i < len; i++) {
1111 retval = rtsx_write_register(chip, addr + i, 0xFF, buf[i]);
1112 if (retval != STATUS_SUCCESS) {
1113 vfree(buf);
1114 set_sense_type(chip, SCSI_LUN(srb), SENSE_TYPE_MEDIA_WRITE_ERR);
1115 TRACE_RET(chip, TRANSPORT_FAILED);
1116 }
1117 }
1118
1119 vfree(buf);
1120
1121 return TRANSPORT_GOOD;
1122}
1123
1124static int get_sd_csd(struct scsi_cmnd *srb, struct rtsx_chip *chip)
1125{
1126 struct sd_info *sd_card = &(chip->sd_card);
1127 unsigned int lun = SCSI_LUN(srb);
1128
1129 if (!check_card_ready(chip, lun)) {
1130 set_sense_type(chip, lun, SENSE_TYPE_MEDIA_NOT_PRESENT);
1131 TRACE_RET(chip, TRANSPORT_FAILED);
1132 }
1133
1134 if (get_lun_card(chip, lun) != SD_CARD) {
1135 set_sense_type(chip, lun, SENSE_TYPE_MEDIA_UNRECOVER_READ_ERR);
1136 TRACE_RET(chip, TRANSPORT_FAILED);
1137 }
1138
1139 scsi_set_resid(srb, 0);
1140 rtsx_stor_set_xfer_buf(sd_card->raw_csd, scsi_bufflen(srb), srb);
1141
1142 return TRANSPORT_GOOD;
1143}
1144
1145static int toggle_gpio_cmd(struct scsi_cmnd *srb, struct rtsx_chip *chip)
1146{
1147 u8 gpio = srb->cmnd[2];
1148
1149 rtsx_disable_aspm(chip);
1150
1151 if (chip->ss_en && (rtsx_get_stat(chip) == RTSX_STAT_SS)) {
1152 rtsx_exit_ss(chip);
1153 wait_timeout(100);
1154 }
1155 rtsx_set_stat(chip, RTSX_STAT_RUN);
1156
1157 if (gpio > 3)
1158 gpio = 1;
1159 toggle_gpio(chip, gpio);
1160
1161 return TRANSPORT_GOOD;
1162}
1163
1164#ifdef _MSG_TRACE
1165static int trace_msg_cmd(struct scsi_cmnd *srb, struct rtsx_chip *chip)
1166{
1167 unsigned char *ptr, *buf = NULL;
1168 int i, msg_cnt;
1169 u8 clear;
1170 unsigned int buf_len;
1171
1172 buf_len = 4 + ((2 + MSG_FUNC_LEN + MSG_FILE_LEN + TIME_VAL_LEN) * TRACE_ITEM_CNT);
1173
1174 if ((scsi_bufflen(srb) < buf_len) || (scsi_sglist(srb) == NULL)) {
1175 set_sense_type(chip, SCSI_LUN(srb), SENSE_TYPE_MEDIA_UNRECOVER_READ_ERR);
1176 TRACE_RET(chip, TRANSPORT_FAILED);
1177 }
1178
1179 clear = srb->cmnd[2];
1180
1181 buf = (unsigned char *)vmalloc(scsi_bufflen(srb));
1182 if (buf == NULL)
1183 TRACE_RET(chip, TRANSPORT_ERROR);
1184 ptr = buf;
1185
1186 if (chip->trace_msg[chip->msg_idx].valid)
1187 msg_cnt = TRACE_ITEM_CNT;
1188 else
1189 msg_cnt = chip->msg_idx;
1190
1191 *(ptr++) = (u8)(msg_cnt >> 24);
1192 *(ptr++) = (u8)(msg_cnt >> 16);
1193 *(ptr++) = (u8)(msg_cnt >> 8);
1194 *(ptr++) = (u8)msg_cnt;
1195 RTSX_DEBUGP("Trace message count is %d\n", msg_cnt);
1196
1197 for (i = 1; i <= msg_cnt; i++) {
1198 int j, idx;
1199
1200 idx = chip->msg_idx - i;
1201 if (idx < 0)
1202 idx += TRACE_ITEM_CNT;
1203
1204 *(ptr++) = (u8)(chip->trace_msg[idx].line >> 8);
1205 *(ptr++) = (u8)(chip->trace_msg[idx].line);
1206 for (j = 0; j < MSG_FUNC_LEN; j++)
1207 *(ptr++) = chip->trace_msg[idx].func[j];
1208
1209 for (j = 0; j < MSG_FILE_LEN; j++)
1210 *(ptr++) = chip->trace_msg[idx].file[j];
1211
1212 for (j = 0; j < TIME_VAL_LEN; j++)
1213 *(ptr++) = chip->trace_msg[idx].timeval_buf[j];
1214 }
1215
1216 rtsx_stor_set_xfer_buf(buf, scsi_bufflen(srb), srb);
1217 vfree(buf);
1218
1219 if (clear) {
1220 chip->msg_idx = 0;
1221 for (i = 0; i < TRACE_ITEM_CNT; i++)
1222 chip->trace_msg[i].valid = 0;
1223 }
1224
1225 scsi_set_resid(srb, 0);
1226 return TRANSPORT_GOOD;
1227}
1228#endif
1229
1230static int read_host_reg(struct scsi_cmnd *srb, struct rtsx_chip *chip)
1231{
1232 u8 addr, buf[4];
1233 u32 val;
1234 unsigned int len;
1235
1236 rtsx_disable_aspm(chip);
1237
1238 if (chip->ss_en && (rtsx_get_stat(chip) == RTSX_STAT_SS)) {
1239 rtsx_exit_ss(chip);
1240 wait_timeout(100);
1241 }
1242 rtsx_set_stat(chip, RTSX_STAT_RUN);
1243
1244 addr = srb->cmnd[4];
1245
1246 val = rtsx_readl(chip, addr);
1247 RTSX_DEBUGP("Host register (0x%x): 0x%x\n", addr, val);
1248
1249 buf[0] = (u8)(val >> 24);
1250 buf[1] = (u8)(val >> 16);
1251 buf[2] = (u8)(val >> 8);
1252 buf[3] = (u8)val;
1253
1254 len = min(scsi_bufflen(srb), (unsigned int)4);
1255 rtsx_stor_set_xfer_buf(buf, len, srb);
1256 scsi_set_resid(srb, scsi_bufflen(srb) - len);
1257
1258 return TRANSPORT_GOOD;
1259}
1260
1261static int write_host_reg(struct scsi_cmnd *srb, struct rtsx_chip *chip)
1262{
1263 u8 addr, buf[4];
1264 u32 val;
1265 unsigned int len;
1266
1267 rtsx_disable_aspm(chip);
1268
1269 if (chip->ss_en && (rtsx_get_stat(chip) == RTSX_STAT_SS)) {
1270 rtsx_exit_ss(chip);
1271 wait_timeout(100);
1272 }
1273 rtsx_set_stat(chip, RTSX_STAT_RUN);
1274
1275 addr = srb->cmnd[4];
1276
1277 len = min(scsi_bufflen(srb), (unsigned int)4);
1278 rtsx_stor_get_xfer_buf(buf, len, srb);
1279 scsi_set_resid(srb, scsi_bufflen(srb) - len);
1280
1281 val = ((u32)buf[0] << 24) | ((u32)buf[1] << 16) | ((u32)buf[2] << 8) | buf[3];
1282
1283 rtsx_writel(chip, addr, val);
1284
1285 return TRANSPORT_GOOD;
1286}
1287
1288static int set_variable(struct scsi_cmnd *srb, struct rtsx_chip *chip)
1289{
1290 unsigned lun = SCSI_LUN(srb);
1291
1292 if (srb->cmnd[3] == 1) {
1293 /* Variable Clock */
1294 struct xd_info *xd_card = &(chip->xd_card);
1295 struct sd_info *sd_card = &(chip->sd_card);
1296 struct ms_info *ms_card = &(chip->ms_card);
1297
1298 switch (srb->cmnd[4]) {
1299 case XD_CARD:
1300 xd_card->xd_clock = srb->cmnd[5];
1301 break;
1302
1303 case SD_CARD:
1304 sd_card->sd_clock = srb->cmnd[5];
1305 break;
1306
1307 case MS_CARD:
1308 ms_card->ms_clock = srb->cmnd[5];
1309 break;
1310
1311 default:
1312 set_sense_type(chip, lun, SENSE_TYPE_MEDIA_INVALID_CMD_FIELD);
1313 TRACE_RET(chip, TRANSPORT_FAILED);
1314 }
1315 } else if (srb->cmnd[3] == 2) {
1316 if (srb->cmnd[4]) {
1317 chip->blink_led = 1;
1318 } else {
1319 int retval;
1320
1321 chip->blink_led = 0;
1322
1323 rtsx_disable_aspm(chip);
1324
1325 if (chip->ss_en && (rtsx_get_stat(chip) == RTSX_STAT_SS)) {
1326 rtsx_exit_ss(chip);
1327 wait_timeout(100);
1328 }
1329 rtsx_set_stat(chip, RTSX_STAT_RUN);
1330
1331 retval = rtsx_force_power_on(chip, SSC_PDCTL);
1332 if (retval != STATUS_SUCCESS) {
1333 set_sense_type(chip, SCSI_LUN(srb), SENSE_TYPE_MEDIA_WRITE_ERR);
1334 TRACE_RET(chip, TRANSPORT_FAILED);
1335 }
1336
1337 turn_off_led(chip, LED_GPIO);
1338 }
1339 } else {
1340 set_sense_type(chip, lun, SENSE_TYPE_MEDIA_INVALID_CMD_FIELD);
1341 TRACE_RET(chip, TRANSPORT_FAILED);
1342 }
1343
1344 return TRANSPORT_GOOD;
1345}
1346
1347static int get_variable(struct scsi_cmnd *srb, struct rtsx_chip *chip)
1348{
1349 unsigned int lun = SCSI_LUN(srb);
1350
1351 if (srb->cmnd[3] == 1) {
1352 struct xd_info *xd_card = &(chip->xd_card);
1353 struct sd_info *sd_card = &(chip->sd_card);
1354 struct ms_info *ms_card = &(chip->ms_card);
1355 u8 tmp;
1356
1357 switch (srb->cmnd[4]) {
1358 case XD_CARD:
1359 tmp = (u8)(xd_card->xd_clock);
1360 break;
1361
1362 case SD_CARD:
1363 tmp = (u8)(sd_card->sd_clock);
1364 break;
1365
1366 case MS_CARD:
1367 tmp = (u8)(ms_card->ms_clock);
1368 break;
1369
1370 default:
1371 set_sense_type(chip, lun, SENSE_TYPE_MEDIA_INVALID_CMD_FIELD);
1372 TRACE_RET(chip, TRANSPORT_FAILED);
1373 }
1374
1375 rtsx_stor_set_xfer_buf(&tmp, 1, srb);
1376 } else if (srb->cmnd[3] == 2) {
1377 u8 tmp = chip->blink_led;
1378 rtsx_stor_set_xfer_buf(&tmp, 1, srb);
1379 } else {
1380 set_sense_type(chip, lun, SENSE_TYPE_MEDIA_INVALID_CMD_FIELD);
1381 TRACE_RET(chip, TRANSPORT_FAILED);
1382 }
1383
1384 return TRANSPORT_GOOD;
1385}
1386
1387static int dma_access_ring_buffer(struct scsi_cmnd *srb, struct rtsx_chip *chip)
1388{
1389 int retval;
1390 unsigned int lun = SCSI_LUN(srb);
1391 u16 len;
1392
1393 rtsx_disable_aspm(chip);
1394
1395 if (chip->ss_en && (rtsx_get_stat(chip) == RTSX_STAT_SS)) {
1396 rtsx_exit_ss(chip);
1397 wait_timeout(100);
1398 }
1399 rtsx_set_stat(chip, RTSX_STAT_RUN);
1400
1401 len = ((u16)(srb->cmnd[4]) << 8) | srb->cmnd[5];
1402 len = min(len, (u16)scsi_bufflen(srb));
1403
1404 if (srb->sc_data_direction == DMA_FROM_DEVICE)
1405 RTSX_DEBUGP("Read from device\n");
1406 else
1407 RTSX_DEBUGP("Write to device\n");
1408
1409 retval = rtsx_transfer_data(chip, 0, scsi_sglist(srb), len,
1410 scsi_sg_count(srb), srb->sc_data_direction, 1000);
1411 if (retval < 0) {
1412 if (srb->sc_data_direction == DMA_FROM_DEVICE)
1413 set_sense_type(chip, lun, SENSE_TYPE_MEDIA_UNRECOVER_READ_ERR);
1414 else
1415 set_sense_type(chip, lun, SENSE_TYPE_MEDIA_WRITE_ERR);
1416
1417 TRACE_RET(chip, TRANSPORT_FAILED);
1418 }
1419 scsi_set_resid(srb, 0);
1420
1421 return TRANSPORT_GOOD;
1422}
1423
1424static int get_dev_status(struct scsi_cmnd *srb, struct rtsx_chip *chip)
1425{
1426 struct sd_info *sd_card = &(chip->sd_card);
1427 struct ms_info *ms_card = &(chip->ms_card);
1428 int buf_len;
1429 unsigned int lun = SCSI_LUN(srb);
1430 u8 card = get_lun_card(chip, lun);
1431 u8 status[32];
1432#ifdef SUPPORT_OCP
1433 u8 oc_now_mask = 0, oc_ever_mask = 0;
1434#endif
1435
1436 memset(status, 0, 32);
1437
1438 status[0] = (u8)(chip->product_id);
1439 status[1] = chip->ic_version;
1440
1441 if (chip->auto_delink_en)
1442 status[2] = 0x10;
1443 else
1444 status[2] = 0x00;
1445
1446 status[3] = 20;
1447 status[4] = 10;
1448 status[5] = 05;
1449 status[6] = 21;
1450
1451 if (chip->card_wp)
1452 status[7] = 0x20;
1453 else
1454 status[7] = 0x00;
1455
1456#ifdef SUPPORT_OCP
1457 status[8] = 0;
1458 if (CHECK_LUN_MODE(chip, SD_MS_2LUN) && (chip->lun2card[lun] == MS_CARD)) {
1459 oc_now_mask = MS_OC_NOW;
1460 oc_ever_mask = MS_OC_EVER;
1461 } else {
1462 oc_now_mask = SD_OC_NOW;
1463 oc_ever_mask = SD_OC_EVER;
1464 }
1465
1466 if (chip->ocp_stat & oc_now_mask)
1467 status[8] |= 0x02;
1468
1469 if (chip->ocp_stat & oc_ever_mask)
1470 status[8] |= 0x01;
1471#endif
1472
1473 if (card == SD_CARD) {
1474 if (CHK_SD(sd_card)) {
1475 if (CHK_SD_HCXC(sd_card)) {
1476 if (sd_card->capacity > 0x4000000)
1477 status[0x0E] = 0x02;
1478 else
1479 status[0x0E] = 0x01;
1480 } else {
1481 status[0x0E] = 0x00;
1482 }
1483
1484 if (CHK_SD_SDR104(sd_card))
1485 status[0x0F] = 0x03;
1486 else if (CHK_SD_DDR50(sd_card))
1487 status[0x0F] = 0x04;
1488 else if (CHK_SD_SDR50(sd_card))
1489 status[0x0F] = 0x02;
1490 else if (CHK_SD_HS(sd_card))
1491 status[0x0F] = 0x01;
1492 else
1493 status[0x0F] = 0x00;
1494 } else {
1495 if (CHK_MMC_SECTOR_MODE(sd_card))
1496 status[0x0E] = 0x01;
1497 else
1498 status[0x0E] = 0x00;
1499
1500 if (CHK_MMC_DDR52(sd_card))
1501 status[0x0F] = 0x03;
1502 else if (CHK_MMC_52M(sd_card))
1503 status[0x0F] = 0x02;
1504 else if (CHK_MMC_26M(sd_card))
1505 status[0x0F] = 0x01;
1506 else
1507 status[0x0F] = 0x00;
1508 }
1509 } else if (card == MS_CARD) {
1510 if (CHK_MSPRO(ms_card)) {
1511 if (CHK_MSXC(ms_card))
1512 status[0x0E] = 0x01;
1513 else
1514 status[0x0E] = 0x00;
1515
1516 if (CHK_HG8BIT(ms_card))
1517 status[0x0F] = 0x01;
1518 else
1519 status[0x0F] = 0x00;
1520 }
1521 }
1522
1523#ifdef SUPPORT_SD_LOCK
1524 if (card == SD_CARD) {
1525 status[0x17] = 0x80;
1526 if (sd_card->sd_erase_status)
1527 status[0x17] |= 0x01;
1528 if (sd_card->sd_lock_status & SD_LOCKED) {
1529 status[0x17] |= 0x02;
1530 status[0x07] |= 0x40;
1531 }
1532 if (sd_card->sd_lock_status & SD_PWD_EXIST)
1533 status[0x17] |= 0x04;
1534 } else {
1535 status[0x17] = 0x00;
1536 }
1537
1538 RTSX_DEBUGP("status[0x17] = 0x%x\n", status[0x17]);
1539#endif
1540
1541 status[0x18] = 0x8A;
1542 status[0x1A] = 0x28;
1543#ifdef SUPPORT_SD_LOCK
1544 status[0x1F] = 0x01;
1545#endif
1546
1547 buf_len = min(scsi_bufflen(srb), (unsigned int)sizeof(status));
1548 rtsx_stor_set_xfer_buf(status, buf_len, srb);
1549 scsi_set_resid(srb, scsi_bufflen(srb) - buf_len);
1550
1551 return TRANSPORT_GOOD;
1552}
1553
1554static int set_chip_mode(struct scsi_cmnd *srb, struct rtsx_chip *chip)
1555{
1556 int phy_debug_mode;
1557 int retval;
1558 u16 reg;
1559
1560 if (!CHECK_PID(chip, 0x5208)) {
1561 set_sense_type(chip, SCSI_LUN(srb), SENSE_TYPE_MEDIA_INVALID_CMD_FIELD);
1562 TRACE_RET(chip, TRANSPORT_FAILED);
1563 }
1564
1565 phy_debug_mode = (int)(srb->cmnd[3]);
1566
1567 if (phy_debug_mode) {
1568 chip->phy_debug_mode = 1;
1569 retval = rtsx_write_register(chip, CDRESUMECTL, 0x77, 0);
1570 if (retval != STATUS_SUCCESS)
1571 TRACE_RET(chip, TRANSPORT_FAILED);
1572
1573 rtsx_disable_bus_int(chip);
1574
1575 retval = rtsx_read_phy_register(chip, 0x1C, &reg);
1576 if (retval != STATUS_SUCCESS)
1577 TRACE_RET(chip, TRANSPORT_FAILED);
1578
1579 reg |= 0x0001;
1580 retval = rtsx_write_phy_register(chip, 0x1C, reg);
1581 if (retval != STATUS_SUCCESS)
1582 TRACE_RET(chip, TRANSPORT_FAILED);
1583 } else {
1584 chip->phy_debug_mode = 0;
1585 retval = rtsx_write_register(chip, CDRESUMECTL, 0x77, 0x77);
1586 if (retval != STATUS_SUCCESS)
1587 TRACE_RET(chip, TRANSPORT_FAILED);
1588
1589 rtsx_enable_bus_int(chip);
1590
1591 retval = rtsx_read_phy_register(chip, 0x1C, &reg);
1592 if (retval != STATUS_SUCCESS)
1593 TRACE_RET(chip, TRANSPORT_FAILED);
1594
1595 reg &= 0xFFFE;
1596 retval = rtsx_write_phy_register(chip, 0x1C, reg);
1597 if (retval != STATUS_SUCCESS)
1598 TRACE_RET(chip, TRANSPORT_FAILED);
1599 }
1600
1601 return TRANSPORT_GOOD;
1602}
1603
1604static int rw_mem_cmd_buf(struct scsi_cmnd *srb, struct rtsx_chip *chip)
1605{
1606 int retval = STATUS_SUCCESS;
1607 unsigned int lun = SCSI_LUN(srb);
1608 u8 cmd_type, mask, value, idx;
1609 u16 addr;
1610
1611 rtsx_disable_aspm(chip);
1612
1613 if (chip->ss_en && (rtsx_get_stat(chip) == RTSX_STAT_SS)) {
1614 rtsx_exit_ss(chip);
1615 wait_timeout(100);
1616 }
1617 rtsx_set_stat(chip, RTSX_STAT_RUN);
1618
1619 switch (srb->cmnd[3]) {
1620 case INIT_BATCHCMD:
1621 rtsx_init_cmd(chip);
1622 break;
1623
1624 case ADD_BATCHCMD:
1625 cmd_type = srb->cmnd[4];
1626 if (cmd_type > 2) {
1627 set_sense_type(chip, lun, SENSE_TYPE_MEDIA_INVALID_CMD_FIELD);
1628 TRACE_RET(chip, TRANSPORT_FAILED);
1629 }
1630 addr = (srb->cmnd[5] << 8) | srb->cmnd[6];
1631 mask = srb->cmnd[7];
1632 value = srb->cmnd[8];
1633 rtsx_add_cmd(chip, cmd_type, addr, mask, value);
1634 break;
1635
1636 case SEND_BATCHCMD:
1637 retval = rtsx_send_cmd(chip, 0, 1000);
1638 break;
1639
1640 case GET_BATCHRSP:
1641 idx = srb->cmnd[4];
1642 value = *(rtsx_get_cmd_data(chip) + idx);
1643 if (scsi_bufflen(srb) < 1) {
1644 set_sense_type(chip, lun, SENSE_TYPE_MEDIA_INVALID_CMD_FIELD);
1645 TRACE_RET(chip, TRANSPORT_FAILED);
1646 }
1647 rtsx_stor_set_xfer_buf(&value, 1, srb);
1648 scsi_set_resid(srb, 0);
1649 break;
1650
1651 default:
1652 set_sense_type(chip, lun, SENSE_TYPE_MEDIA_INVALID_CMD_FIELD);
1653 TRACE_RET(chip, TRANSPORT_FAILED);
1654 }
1655
1656 if (retval != STATUS_SUCCESS) {
1657 set_sense_type(chip, lun, SENSE_TYPE_MEDIA_WRITE_ERR);
1658 TRACE_RET(chip, TRANSPORT_FAILED);
1659 }
1660
1661 return TRANSPORT_GOOD;
1662}
1663
1664static int suit_cmd(struct scsi_cmnd *srb, struct rtsx_chip *chip)
1665{
1666 int result;
1667
1668 switch (srb->cmnd[3]) {
1669 case INIT_BATCHCMD:
1670 case ADD_BATCHCMD:
1671 case SEND_BATCHCMD:
1672 case GET_BATCHRSP:
1673 result = rw_mem_cmd_buf(srb, chip);
1674 break;
1675 default:
1676 result = TRANSPORT_ERROR;
1677 }
1678
1679 return result;
1680}
1681
1682static int read_phy_register(struct scsi_cmnd *srb, struct rtsx_chip *chip)
1683{
1684 unsigned short addr, len, i;
1685 int retval;
1686 u8 *buf;
1687 u16 val;
1688
1689 rtsx_disable_aspm(chip);
1690
1691 if (chip->ss_en && (rtsx_get_stat(chip) == RTSX_STAT_SS)) {
1692 rtsx_exit_ss(chip);
1693 wait_timeout(100);
1694 }
1695 rtsx_set_stat(chip, RTSX_STAT_RUN);
1696
1697 addr = ((u16)srb->cmnd[4] << 8) | srb->cmnd[5];
1698 len = ((u16)srb->cmnd[6] << 8) | srb->cmnd[7];
1699
1700 if (len % 2)
1701 len -= len % 2;
1702
1703 if (len) {
1704 buf = (u8 *)vmalloc(len);
1705 if (!buf)
1706 TRACE_RET(chip, TRANSPORT_ERROR);
1707
1708 retval = rtsx_force_power_on(chip, SSC_PDCTL);
1709 if (retval != STATUS_SUCCESS) {
1710 vfree(buf);
1711 set_sense_type(chip, SCSI_LUN(srb), SENSE_TYPE_MEDIA_UNRECOVER_READ_ERR);
1712 TRACE_RET(chip, TRANSPORT_FAILED);
1713 }
1714
1715 for (i = 0; i < len / 2; i++) {
1716 retval = rtsx_read_phy_register(chip, addr + i, &val);
1717 if (retval != STATUS_SUCCESS) {
1718 vfree(buf);
1719 set_sense_type(chip, SCSI_LUN(srb), SENSE_TYPE_MEDIA_UNRECOVER_READ_ERR);
1720 TRACE_RET(chip, TRANSPORT_FAILED);
1721 }
1722
1723 buf[2*i] = (u8)(val >> 8);
1724 buf[2*i+1] = (u8)val;
1725 }
1726
1727 len = (unsigned short)min(scsi_bufflen(srb), (unsigned int)len);
1728 rtsx_stor_set_xfer_buf(buf, len, srb);
1729 scsi_set_resid(srb, scsi_bufflen(srb) - len);
1730
1731 vfree(buf);
1732 }
1733
1734 return TRANSPORT_GOOD;
1735}
1736
1737static int write_phy_register(struct scsi_cmnd *srb, struct rtsx_chip *chip)
1738{
1739 unsigned short addr, len, i;
1740 int retval;
1741 u8 *buf;
1742 u16 val;
1743
1744 rtsx_disable_aspm(chip);
1745
1746 if (chip->ss_en && (rtsx_get_stat(chip) == RTSX_STAT_SS)) {
1747 rtsx_exit_ss(chip);
1748 wait_timeout(100);
1749 }
1750 rtsx_set_stat(chip, RTSX_STAT_RUN);
1751
1752 addr = ((u16)srb->cmnd[4] << 8) | srb->cmnd[5];
1753 len = ((u16)srb->cmnd[6] << 8) | srb->cmnd[7];
1754
1755 if (len % 2)
1756 len -= len % 2;
1757
1758 if (len) {
1759 len = (unsigned short)min(scsi_bufflen(srb), (unsigned int)len);
1760
1761 buf = (u8 *)vmalloc(len);
1762 if (buf == NULL)
1763 TRACE_RET(chip, TRANSPORT_ERROR);
1764
1765 rtsx_stor_get_xfer_buf(buf, len, srb);
1766 scsi_set_resid(srb, scsi_bufflen(srb) - len);
1767
1768 retval = rtsx_force_power_on(chip, SSC_PDCTL);
1769 if (retval != STATUS_SUCCESS) {
1770 vfree(buf);
1771 set_sense_type(chip, SCSI_LUN(srb), SENSE_TYPE_MEDIA_WRITE_ERR);
1772 TRACE_RET(chip, TRANSPORT_FAILED);
1773 }
1774
1775 for (i = 0; i < len / 2; i++) {
1776 val = ((u16)buf[2*i] << 8) | buf[2*i+1];
1777 retval = rtsx_write_phy_register(chip, addr + i, val);
1778 if (retval != STATUS_SUCCESS) {
1779 vfree(buf);
1780 set_sense_type(chip, SCSI_LUN(srb), SENSE_TYPE_MEDIA_WRITE_ERR);
1781 TRACE_RET(chip, TRANSPORT_FAILED);
1782 }
1783 }
1784
1785 vfree(buf);
1786 }
1787
1788 return TRANSPORT_GOOD;
1789}
1790
1791static int erase_eeprom2(struct scsi_cmnd *srb, struct rtsx_chip *chip)
1792{
1793 unsigned short addr;
1794 int retval;
1795 u8 mode;
1796
1797 rtsx_disable_aspm(chip);
1798
1799 if (chip->ss_en && (rtsx_get_stat(chip) == RTSX_STAT_SS)) {
1800 rtsx_exit_ss(chip);
1801 wait_timeout(100);
1802 }
1803 rtsx_set_stat(chip, RTSX_STAT_RUN);
1804
1805 retval = rtsx_force_power_on(chip, SSC_PDCTL);
1806 if (retval != STATUS_SUCCESS) {
1807 set_sense_type(chip, SCSI_LUN(srb), SENSE_TYPE_MEDIA_WRITE_ERR);
1808 TRACE_RET(chip, TRANSPORT_FAILED);
1809 }
1810
1811 mode = srb->cmnd[3];
1812 addr = ((u16)srb->cmnd[4] << 8) | srb->cmnd[5];
1813
1814 if (mode == 0) {
1815 retval = spi_erase_eeprom_chip(chip);
1816 if (retval != STATUS_SUCCESS) {
1817 set_sense_type(chip, SCSI_LUN(srb), SENSE_TYPE_MEDIA_WRITE_ERR);
1818 TRACE_RET(chip, TRANSPORT_FAILED);
1819 }
1820 } else if (mode == 1) {
1821 retval = spi_erase_eeprom_byte(chip, addr);
1822 if (retval != STATUS_SUCCESS) {
1823 set_sense_type(chip, SCSI_LUN(srb), SENSE_TYPE_MEDIA_WRITE_ERR);
1824 TRACE_RET(chip, TRANSPORT_FAILED);
1825 }
1826 } else {
1827 set_sense_type(chip, SCSI_LUN(srb), SENSE_TYPE_MEDIA_INVALID_CMD_FIELD);
1828 TRACE_RET(chip, TRANSPORT_FAILED);
1829 }
1830
1831 return TRANSPORT_GOOD;
1832}
1833
1834static int read_eeprom2(struct scsi_cmnd *srb, struct rtsx_chip *chip)
1835{
1836 unsigned short addr, len, i;
1837 int retval;
1838 u8 *buf;
1839
1840 rtsx_disable_aspm(chip);
1841
1842 if (chip->ss_en && (rtsx_get_stat(chip) == RTSX_STAT_SS)) {
1843 rtsx_exit_ss(chip);
1844 wait_timeout(100);
1845 }
1846 rtsx_set_stat(chip, RTSX_STAT_RUN);
1847
1848 addr = ((u16)srb->cmnd[4] << 8) | srb->cmnd[5];
1849 len = ((u16)srb->cmnd[6] << 8) | srb->cmnd[7];
1850
1851 buf = (u8 *)vmalloc(len);
1852 if (!buf)
1853 TRACE_RET(chip, TRANSPORT_ERROR);
1854
1855 retval = rtsx_force_power_on(chip, SSC_PDCTL);
1856 if (retval != STATUS_SUCCESS) {
1857 vfree(buf);
1858 set_sense_type(chip, SCSI_LUN(srb), SENSE_TYPE_MEDIA_UNRECOVER_READ_ERR);
1859 TRACE_RET(chip, TRANSPORT_FAILED);
1860 }
1861
1862 for (i = 0; i < len; i++) {
1863 retval = spi_read_eeprom(chip, addr + i, buf + i);
1864 if (retval != STATUS_SUCCESS) {
1865 vfree(buf);
1866 set_sense_type(chip, SCSI_LUN(srb), SENSE_TYPE_MEDIA_UNRECOVER_READ_ERR);
1867 TRACE_RET(chip, TRANSPORT_FAILED);
1868 }
1869 }
1870
1871 len = (unsigned short)min(scsi_bufflen(srb), (unsigned int)len);
1872 rtsx_stor_set_xfer_buf(buf, len, srb);
1873 scsi_set_resid(srb, scsi_bufflen(srb) - len);
1874
1875 vfree(buf);
1876
1877 return TRANSPORT_GOOD;
1878}
1879
1880static int write_eeprom2(struct scsi_cmnd *srb, struct rtsx_chip *chip)
1881{
1882 unsigned short addr, len, i;
1883 int retval;
1884 u8 *buf;
1885
1886 rtsx_disable_aspm(chip);
1887
1888 if (chip->ss_en && (rtsx_get_stat(chip) == RTSX_STAT_SS)) {
1889 rtsx_exit_ss(chip);
1890 wait_timeout(100);
1891 }
1892 rtsx_set_stat(chip, RTSX_STAT_RUN);
1893
1894 addr = ((u16)srb->cmnd[4] << 8) | srb->cmnd[5];
1895 len = ((u16)srb->cmnd[6] << 8) | srb->cmnd[7];
1896
1897 len = (unsigned short)min(scsi_bufflen(srb), (unsigned int)len);
1898 buf = (u8 *)vmalloc(len);
1899 if (buf == NULL)
1900 TRACE_RET(chip, TRANSPORT_ERROR);
1901
1902 rtsx_stor_get_xfer_buf(buf, len, srb);
1903 scsi_set_resid(srb, scsi_bufflen(srb) - len);
1904
1905 retval = rtsx_force_power_on(chip, SSC_PDCTL);
1906 if (retval != STATUS_SUCCESS) {
1907 vfree(buf);
1908 set_sense_type(chip, SCSI_LUN(srb), SENSE_TYPE_MEDIA_WRITE_ERR);
1909 TRACE_RET(chip, TRANSPORT_FAILED);
1910 }
1911
1912 for (i = 0; i < len; i++) {
1913 retval = spi_write_eeprom(chip, addr + i, buf[i]);
1914 if (retval != STATUS_SUCCESS) {
1915 vfree(buf);
1916 set_sense_type(chip, SCSI_LUN(srb), SENSE_TYPE_MEDIA_WRITE_ERR);
1917 TRACE_RET(chip, TRANSPORT_FAILED);
1918 }
1919 }
1920
1921 vfree(buf);
1922
1923 return TRANSPORT_GOOD;
1924}
1925
1926static int read_efuse(struct scsi_cmnd *srb, struct rtsx_chip *chip)
1927{
1928 int retval;
1929 u8 addr, len, i;
1930 u8 *buf;
1931
1932 rtsx_disable_aspm(chip);
1933
1934 if (chip->ss_en && (rtsx_get_stat(chip) == RTSX_STAT_SS)) {
1935 rtsx_exit_ss(chip);
1936 wait_timeout(100);
1937 }
1938 rtsx_set_stat(chip, RTSX_STAT_RUN);
1939
1940 addr = srb->cmnd[4];
1941 len = srb->cmnd[5];
1942
1943 buf = (u8 *)vmalloc(len);
1944 if (!buf)
1945 TRACE_RET(chip, TRANSPORT_ERROR);
1946
1947 retval = rtsx_force_power_on(chip, SSC_PDCTL);
1948 if (retval != STATUS_SUCCESS) {
1949 vfree(buf);
1950 set_sense_type(chip, SCSI_LUN(srb), SENSE_TYPE_MEDIA_UNRECOVER_READ_ERR);
1951 TRACE_RET(chip, TRANSPORT_FAILED);
1952 }
1953
1954 for (i = 0; i < len; i++) {
1955 retval = rtsx_read_efuse(chip, addr + i, buf + i);
1956 if (retval != STATUS_SUCCESS) {
1957 vfree(buf);
1958 set_sense_type(chip, SCSI_LUN(srb), SENSE_TYPE_MEDIA_UNRECOVER_READ_ERR);
1959 TRACE_RET(chip, TRANSPORT_FAILED);
1960 }
1961 }
1962
1963 len = (u8)min(scsi_bufflen(srb), (unsigned int)len);
1964 rtsx_stor_set_xfer_buf(buf, len, srb);
1965 scsi_set_resid(srb, scsi_bufflen(srb) - len);
1966
1967 vfree(buf);
1968
1969 return TRANSPORT_GOOD;
1970}
1971
1972static int write_efuse(struct scsi_cmnd *srb, struct rtsx_chip *chip)
1973{
1974 int retval, result = TRANSPORT_GOOD;
1975 u16 val;
1976 u8 addr, len, i;
1977 u8 *buf;
1978
1979 rtsx_disable_aspm(chip);
1980
1981 if (chip->ss_en && (rtsx_get_stat(chip) == RTSX_STAT_SS)) {
1982 rtsx_exit_ss(chip);
1983 wait_timeout(100);
1984 }
1985 rtsx_set_stat(chip, RTSX_STAT_RUN);
1986
1987 addr = srb->cmnd[4];
1988 len = srb->cmnd[5];
1989
1990 len = (u8)min(scsi_bufflen(srb), (unsigned int)len);
1991 buf = (u8 *)vmalloc(len);
1992 if (buf == NULL)
1993 TRACE_RET(chip, TRANSPORT_ERROR);
1994
1995 rtsx_stor_get_xfer_buf(buf, len, srb);
1996 scsi_set_resid(srb, scsi_bufflen(srb) - len);
1997
1998 retval = rtsx_force_power_on(chip, SSC_PDCTL);
1999 if (retval != STATUS_SUCCESS) {
2000 vfree(buf);
2001 TRACE_RET(chip, TRANSPORT_ERROR);
2002 }
2003
2004 if (chip->asic_code) {
2005 retval = rtsx_read_phy_register(chip, 0x08, &val);
2006 if (retval != STATUS_SUCCESS) {
2007 vfree(buf);
2008 TRACE_RET(chip, TRANSPORT_ERROR);
2009 }
2010
2011 retval = rtsx_write_register(chip, PWR_GATE_CTRL, LDO3318_PWR_MASK, LDO_OFF);
2012 if (retval != STATUS_SUCCESS) {
2013 vfree(buf);
2014 TRACE_RET(chip, TRANSPORT_ERROR);
2015 }
2016
2017 wait_timeout(600);
2018
2019 retval = rtsx_write_phy_register(chip, 0x08, 0x4C00 | chip->phy_voltage);
2020 if (retval != STATUS_SUCCESS) {
2021 vfree(buf);
2022 TRACE_RET(chip, TRANSPORT_ERROR);
2023 }
2024
2025 retval = rtsx_write_register(chip, PWR_GATE_CTRL, LDO3318_PWR_MASK, LDO_ON);
2026 if (retval != STATUS_SUCCESS) {
2027 vfree(buf);
2028 TRACE_RET(chip, TRANSPORT_ERROR);
2029 }
2030
2031 wait_timeout(600);
2032 }
2033
2034 retval = card_power_on(chip, SPI_CARD);
2035 if (retval != STATUS_SUCCESS) {
2036 vfree(buf);
2037 TRACE_RET(chip, TRANSPORT_ERROR);
2038 }
2039
2040 wait_timeout(50);
2041
2042 for (i = 0; i < len; i++) {
2043 retval = rtsx_write_efuse(chip, addr + i, buf[i]);
2044 if (retval != STATUS_SUCCESS) {
2045 set_sense_type(chip, SCSI_LUN(srb), SENSE_TYPE_MEDIA_WRITE_ERR);
2046 result = TRANSPORT_FAILED;
2047 TRACE_GOTO(chip, Exit);
2048 }
2049 }
2050
2051Exit:
2052 vfree(buf);
2053
2054 retval = card_power_off(chip, SPI_CARD);
2055 if (retval != STATUS_SUCCESS)
2056 TRACE_RET(chip, TRANSPORT_ERROR);
2057
2058 if (chip->asic_code) {
2059 retval = rtsx_write_register(chip, PWR_GATE_CTRL, LDO3318_PWR_MASK, LDO_OFF);
2060 if (retval != STATUS_SUCCESS)
2061 TRACE_RET(chip, TRANSPORT_ERROR);
2062
2063 wait_timeout(600);
2064
2065 retval = rtsx_write_phy_register(chip, 0x08, val);
2066 if (retval != STATUS_SUCCESS)
2067 TRACE_RET(chip, TRANSPORT_ERROR);
2068
2069 retval = rtsx_write_register(chip, PWR_GATE_CTRL, LDO3318_PWR_MASK, LDO_ON);
2070 if (retval != STATUS_SUCCESS)
2071 TRACE_RET(chip, TRANSPORT_ERROR);
2072 }
2073
2074 return result;
2075}
2076
2077static int read_cfg_byte(struct scsi_cmnd *srb, struct rtsx_chip *chip)
2078{
2079 int retval;
2080 u8 func, func_max;
2081 u16 addr, len;
2082 u8 *buf;
2083
2084 rtsx_disable_aspm(chip);
2085
2086 if (chip->ss_en && (rtsx_get_stat(chip) == RTSX_STAT_SS)) {
2087 rtsx_exit_ss(chip);
2088 wait_timeout(100);
2089 }
2090 rtsx_set_stat(chip, RTSX_STAT_RUN);
2091
2092 func = srb->cmnd[3];
2093 addr = ((u16)(srb->cmnd[4]) << 8) | srb->cmnd[5];
2094 len = ((u16)(srb->cmnd[6]) << 8) | srb->cmnd[7];
2095
2096 RTSX_DEBUGP("%s: func = %d, addr = 0x%x, len = %d\n", __func__, func, addr, len);
2097
2098 if (CHK_SDIO_EXIST(chip) && !CHK_SDIO_IGNORED(chip))
2099 func_max = 1;
2100 else
2101 func_max = 0;
2102
2103 if (func > func_max) {
2104 set_sense_type(chip, SCSI_LUN(srb), SENSE_TYPE_MEDIA_INVALID_CMD_FIELD);
2105 TRACE_RET(chip, TRANSPORT_FAILED);
2106 }
2107
2108 buf = (u8 *)vmalloc(len);
2109 if (!buf)
2110 TRACE_RET(chip, TRANSPORT_ERROR);
2111
2112 retval = rtsx_read_cfg_seq(chip, func, addr, buf, len);
2113 if (retval != STATUS_SUCCESS) {
2114 set_sense_type(chip, SCSI_LUN(srb), SENSE_TYPE_MEDIA_UNRECOVER_READ_ERR);
2115 vfree(buf);
2116 TRACE_RET(chip, TRANSPORT_FAILED);
2117 }
2118
2119 len = (u16)min(scsi_bufflen(srb), (unsigned int)len);
2120 rtsx_stor_set_xfer_buf(buf, len, srb);
2121 scsi_set_resid(srb, scsi_bufflen(srb) - len);
2122
2123 vfree(buf);
2124
2125 return TRANSPORT_GOOD;
2126}
2127
2128static int write_cfg_byte(struct scsi_cmnd *srb, struct rtsx_chip *chip)
2129{
2130 int retval;
2131 u8 func, func_max;
2132 u16 addr, len;
2133 u8 *buf;
2134
2135 rtsx_disable_aspm(chip);
2136
2137 if (chip->ss_en && (rtsx_get_stat(chip) == RTSX_STAT_SS)) {
2138 rtsx_exit_ss(chip);
2139 wait_timeout(100);
2140 }
2141 rtsx_set_stat(chip, RTSX_STAT_RUN);
2142
2143 func = srb->cmnd[3];
2144 addr = ((u16)(srb->cmnd[4]) << 8) | srb->cmnd[5];
2145 len = ((u16)(srb->cmnd[6]) << 8) | srb->cmnd[7];
2146
2147 RTSX_DEBUGP("%s: func = %d, addr = 0x%x\n", __func__, func, addr);
2148
2149 if (CHK_SDIO_EXIST(chip) && !CHK_SDIO_IGNORED(chip))
2150 func_max = 1;
2151 else
2152 func_max = 0;
2153
2154 if (func > func_max) {
2155 set_sense_type(chip, SCSI_LUN(srb), SENSE_TYPE_MEDIA_INVALID_CMD_FIELD);
2156 TRACE_RET(chip, TRANSPORT_FAILED);
2157 }
2158
2159 len = (unsigned short)min(scsi_bufflen(srb), (unsigned int)len);
2160 buf = (u8 *)vmalloc(len);
2161 if (!buf)
2162 TRACE_RET(chip, TRANSPORT_ERROR);
2163
2164 rtsx_stor_get_xfer_buf(buf, len, srb);
2165 scsi_set_resid(srb, scsi_bufflen(srb) - len);
2166
2167 retval = rtsx_write_cfg_seq(chip, func, addr, buf, len);
2168 if (retval != STATUS_SUCCESS) {
2169 set_sense_type(chip, SCSI_LUN(srb), SENSE_TYPE_MEDIA_WRITE_ERR);
2170 vfree(buf);
2171 TRACE_RET(chip, TRANSPORT_FAILED);
2172 }
2173
2174 vfree(buf);
2175
2176 return TRANSPORT_GOOD;
2177}
2178
2179static int app_cmd(struct scsi_cmnd *srb, struct rtsx_chip *chip)
2180{
2181 int result;
2182
2183 switch (srb->cmnd[2]) {
2184 case PP_READ10:
2185 case PP_WRITE10:
2186 result = read_write(srb, chip);
2187 break;
2188
2189 case READ_HOST_REG:
2190 result = read_host_reg(srb, chip);
2191 break;
2192
2193 case WRITE_HOST_REG:
2194 result = write_host_reg(srb, chip);
2195 break;
2196
2197 case GET_VAR:
2198 result = get_variable(srb, chip);
2199 break;
2200
2201 case SET_VAR:
2202 result = set_variable(srb, chip);
2203 break;
2204
2205 case DMA_READ:
2206 case DMA_WRITE:
2207 result = dma_access_ring_buffer(srb, chip);
2208 break;
2209
2210 case READ_PHY:
2211 result = read_phy_register(srb, chip);
2212 break;
2213
2214 case WRITE_PHY:
2215 result = write_phy_register(srb, chip);
2216 break;
2217
2218 case ERASE_EEPROM2:
2219 result = erase_eeprom2(srb, chip);
2220 break;
2221
2222 case READ_EEPROM2:
2223 result = read_eeprom2(srb, chip);
2224 break;
2225
2226 case WRITE_EEPROM2:
2227 result = write_eeprom2(srb, chip);
2228 break;
2229
2230 case READ_EFUSE:
2231 result = read_efuse(srb, chip);
2232 break;
2233
2234 case WRITE_EFUSE:
2235 result = write_efuse(srb, chip);
2236 break;
2237
2238 case READ_CFG:
2239 result = read_cfg_byte(srb, chip);
2240 break;
2241
2242 case WRITE_CFG:
2243 result = write_cfg_byte(srb, chip);
2244 break;
2245
2246 case SET_CHIP_MODE:
2247 result = set_chip_mode(srb, chip);
2248 break;
2249
2250 case SUIT_CMD:
2251 result = suit_cmd(srb, chip);
2252 break;
2253
2254 case GET_DEV_STATUS:
2255 result = get_dev_status(srb, chip);
2256 break;
2257
2258 default:
2259 set_sense_type(chip, SCSI_LUN(srb), SENSE_TYPE_MEDIA_INVALID_CMD_FIELD);
2260 TRACE_RET(chip, TRANSPORT_FAILED);
2261 }
2262
2263 return result;
2264}
2265
2266
2267static int read_status(struct scsi_cmnd *srb, struct rtsx_chip *chip)
2268{
2269 u8 rtsx_status[16];
2270 int buf_len;
2271 unsigned int lun = SCSI_LUN(srb);
2272
2273 rtsx_status[0] = (u8)(chip->vendor_id >> 8);
2274 rtsx_status[1] = (u8)(chip->vendor_id);
2275
2276 rtsx_status[2] = (u8)(chip->product_id >> 8);
2277 rtsx_status[3] = (u8)(chip->product_id);
2278
2279 rtsx_status[4] = (u8)lun;
2280
2281 if (CHECK_LUN_MODE(chip, SD_MS_2LUN)) {
2282 if (chip->lun2card[lun] == SD_CARD)
2283 rtsx_status[5] = 2;
2284 else
2285 rtsx_status[5] = 3;
2286 } else {
2287 if (chip->card_exist) {
2288 if (chip->card_exist & XD_CARD)
2289 rtsx_status[5] = 4;
2290 else if (chip->card_exist & SD_CARD)
2291 rtsx_status[5] = 2;
2292 else if (chip->card_exist & MS_CARD)
2293 rtsx_status[5] = 3;
2294 else
2295 rtsx_status[5] = 7;
2296 } else {
2297 rtsx_status[5] = 7;
2298 }
2299 }
2300
2301 if (CHECK_LUN_MODE(chip, SD_MS_2LUN))
2302 rtsx_status[6] = 2;
2303 else
2304 rtsx_status[6] = 1;
2305
2306 rtsx_status[7] = (u8)(chip->product_id);
2307 rtsx_status[8] = chip->ic_version;
2308
2309 if (check_card_exist(chip, lun))
2310 rtsx_status[9] = 1;
2311 else
2312 rtsx_status[9] = 0;
2313
2314 if (CHECK_LUN_MODE(chip, SD_MS_2LUN))
2315 rtsx_status[10] = 0;
2316 else
2317 rtsx_status[10] = 1;
2318
2319 if (CHECK_LUN_MODE(chip, SD_MS_2LUN)) {
2320 if (chip->lun2card[lun] == SD_CARD)
2321 rtsx_status[11] = SD_CARD;
2322 else
2323 rtsx_status[11] = MS_CARD;
2324 } else {
2325 rtsx_status[11] = XD_CARD | SD_CARD | MS_CARD;
2326 }
2327
2328 if (check_card_ready(chip, lun))
2329 rtsx_status[12] = 1;
2330 else
2331 rtsx_status[12] = 0;
2332
2333 if (get_lun_card(chip, lun) == XD_CARD) {
2334 rtsx_status[13] = 0x40;
2335 } else if (get_lun_card(chip, lun) == SD_CARD) {
2336 struct sd_info *sd_card = &(chip->sd_card);
2337
2338 rtsx_status[13] = 0x20;
2339 if (CHK_SD(sd_card)) {
2340 if (CHK_SD_HCXC(sd_card))
2341 rtsx_status[13] |= 0x04;
2342 if (CHK_SD_HS(sd_card))
2343 rtsx_status[13] |= 0x02;
2344 } else {
2345 rtsx_status[13] |= 0x08;
2346 if (CHK_MMC_52M(sd_card))
2347 rtsx_status[13] |= 0x02;
2348 if (CHK_MMC_SECTOR_MODE(sd_card))
2349 rtsx_status[13] |= 0x04;
2350 }
2351 } else if (get_lun_card(chip, lun) == MS_CARD) {
2352 struct ms_info *ms_card = &(chip->ms_card);
2353
2354 if (CHK_MSPRO(ms_card)) {
2355 rtsx_status[13] = 0x38;
2356 if (CHK_HG8BIT(ms_card))
2357 rtsx_status[13] |= 0x04;
2358#ifdef SUPPORT_MSXC
2359 if (CHK_MSXC(ms_card))
2360 rtsx_status[13] |= 0x01;
2361#endif
2362 } else {
2363 rtsx_status[13] = 0x30;
2364 }
2365 } else {
2366 if (CHECK_LUN_MODE(chip, DEFAULT_SINGLE)) {
2367#ifdef SUPPORT_SDIO
2368 if (chip->sd_io && chip->sd_int)
2369 rtsx_status[13] = 0x60;
2370 else
2371 rtsx_status[13] = 0x70;
2372#else
2373 rtsx_status[13] = 0x70;
2374#endif
2375 } else {
2376 if (chip->lun2card[lun] == SD_CARD)
2377 rtsx_status[13] = 0x20;
2378 else
2379 rtsx_status[13] = 0x30;
2380 }
2381 }
2382
2383 rtsx_status[14] = 0x78;
2384 if (CHK_SDIO_EXIST(chip) && !CHK_SDIO_IGNORED(chip))
2385 rtsx_status[15] = 0x83;
2386 else
2387 rtsx_status[15] = 0x82;
2388
2389 buf_len = min(scsi_bufflen(srb), (unsigned int)sizeof(rtsx_status));
2390 rtsx_stor_set_xfer_buf(rtsx_status, buf_len, srb);
2391 scsi_set_resid(srb, scsi_bufflen(srb) - buf_len);
2392
2393 return TRANSPORT_GOOD;
2394}
2395
2396static int get_card_bus_width(struct scsi_cmnd *srb, struct rtsx_chip *chip)
2397{
2398 unsigned int lun = SCSI_LUN(srb);
2399 u8 card, bus_width;
2400
2401 if (!check_card_ready(chip, lun)) {
2402 set_sense_type(chip, lun, SENSE_TYPE_MEDIA_NOT_PRESENT);
2403 TRACE_RET(chip, TRANSPORT_FAILED);
2404 }
2405
2406 card = get_lun_card(chip, lun);
2407 if ((card == SD_CARD) || (card == MS_CARD)) {
2408 bus_width = chip->card_bus_width[lun];
2409 } else {
2410 set_sense_type(chip, lun, SENSE_TYPE_MEDIA_UNRECOVER_READ_ERR);
2411 TRACE_RET(chip, TRANSPORT_FAILED);
2412 }
2413
2414 scsi_set_resid(srb, 0);
2415 rtsx_stor_set_xfer_buf(&bus_width, scsi_bufflen(srb), srb);
2416
2417 return TRANSPORT_GOOD;
2418}
2419
2420static int spi_vendor_cmd(struct scsi_cmnd *srb, struct rtsx_chip *chip)
2421{
2422 int result;
2423 unsigned int lun = SCSI_LUN(srb);
2424 u8 gpio_dir;
2425
2426 if (CHECK_PID(chip, 0x5208) || CHECK_PID(chip, 0x5288)) {
2427 set_sense_type(chip, lun, SENSE_TYPE_MEDIA_INVALID_CMD_FIELD);
2428 TRACE_RET(chip, TRANSPORT_FAILED);
2429 }
2430
2431 rtsx_disable_aspm(chip);
2432
2433 if (chip->ss_en && (rtsx_get_stat(chip) == RTSX_STAT_SS)) {
2434 rtsx_exit_ss(chip);
2435 wait_timeout(100);
2436 }
2437 rtsx_set_stat(chip, RTSX_STAT_RUN);
2438
2439 rtsx_force_power_on(chip, SSC_PDCTL);
2440
2441 rtsx_read_register(chip, CARD_GPIO_DIR, &gpio_dir);
2442 rtsx_write_register(chip, CARD_GPIO_DIR, 0x07, gpio_dir & 0x06);
2443
2444 switch (srb->cmnd[2]) {
2445 case SCSI_SPI_GETSTATUS:
2446 result = spi_get_status(srb, chip);
2447 break;
2448
2449 case SCSI_SPI_SETPARAMETER:
2450 result = spi_set_parameter(srb, chip);
2451 break;
2452
2453 case SCSI_SPI_READFALSHID:
2454 result = spi_read_flash_id(srb, chip);
2455 break;
2456
2457 case SCSI_SPI_READFLASH:
2458 result = spi_read_flash(srb, chip);
2459 break;
2460
2461 case SCSI_SPI_WRITEFLASH:
2462 result = spi_write_flash(srb, chip);
2463 break;
2464
2465 case SCSI_SPI_WRITEFLASHSTATUS:
2466 result = spi_write_flash_status(srb, chip);
2467 break;
2468
2469 case SCSI_SPI_ERASEFLASH:
2470 result = spi_erase_flash(srb, chip);
2471 break;
2472
2473 default:
2474 rtsx_write_register(chip, CARD_GPIO_DIR, 0x07, gpio_dir);
2475
2476 set_sense_type(chip, lun, SENSE_TYPE_MEDIA_INVALID_CMD_FIELD);
2477 TRACE_RET(chip, TRANSPORT_FAILED);
2478 }
2479
2480 rtsx_write_register(chip, CARD_GPIO_DIR, 0x07, gpio_dir);
2481
2482 if (result != STATUS_SUCCESS)
2483 TRACE_RET(chip, TRANSPORT_FAILED);
2484
2485 return TRANSPORT_GOOD;
2486}
2487
2488static int vendor_cmnd(struct scsi_cmnd *srb, struct rtsx_chip *chip)
2489{
2490 int result;
2491
2492 switch (srb->cmnd[1]) {
2493 case READ_STATUS:
2494 result = read_status(srb, chip);
2495 break;
2496
2497 case READ_MEM:
2498 result = read_mem(srb, chip);
2499 break;
2500
2501 case WRITE_MEM:
2502 result = write_mem(srb, chip);
2503 break;
2504
2505 case READ_EEPROM:
2506 result = read_eeprom(srb, chip);
2507 break;
2508
2509 case WRITE_EEPROM:
2510 result = write_eeprom(srb, chip);
2511 break;
2512
2513 case TOGGLE_GPIO:
2514 result = toggle_gpio_cmd(srb, chip);
2515 break;
2516
2517 case GET_SD_CSD:
2518 result = get_sd_csd(srb, chip);
2519 break;
2520
2521 case GET_BUS_WIDTH:
2522 result = get_card_bus_width(srb, chip);
2523 break;
2524
2525#ifdef _MSG_TRACE
2526 case TRACE_MSG:
2527 result = trace_msg_cmd(srb, chip);
2528 break;
2529#endif
2530
2531 case SCSI_APP_CMD:
2532 result = app_cmd(srb, chip);
2533 break;
2534
2535 case SPI_VENDOR_COMMAND:
2536 result = spi_vendor_cmd(srb, chip);
2537 break;
2538
2539 default:
2540 set_sense_type(chip, SCSI_LUN(srb), SENSE_TYPE_MEDIA_INVALID_CMD_FIELD);
2541 TRACE_RET(chip, TRANSPORT_FAILED);
2542 }
2543
2544 return result;
2545}
2546
2547#if !defined(LED_AUTO_BLINK) && !defined(REGULAR_BLINK)
2548void led_shine(struct scsi_cmnd *srb, struct rtsx_chip *chip)
2549{
2550 unsigned int lun = SCSI_LUN(srb);
2551 u16 sec_cnt;
2552
2553 if ((srb->cmnd[0] == READ_10) || (srb->cmnd[0] == WRITE_10))
2554 sec_cnt = ((u16)(srb->cmnd[7]) << 8) | srb->cmnd[8];
2555 else if ((srb->cmnd[0] == READ_6) || (srb->cmnd[0] == WRITE_6))
2556 sec_cnt = srb->cmnd[4];
2557 else
2558 return;
2559
2560 if (chip->rw_cap[lun] >= GPIO_TOGGLE_THRESHOLD) {
2561 toggle_gpio(chip, LED_GPIO);
2562 chip->rw_cap[lun] = 0;
2563 } else {
2564 chip->rw_cap[lun] += sec_cnt;
2565 }
2566}
2567#endif
2568
2569static int ms_format_cmnd(struct scsi_cmnd *srb, struct rtsx_chip *chip)
2570{
2571 struct ms_info *ms_card = &(chip->ms_card);
2572 unsigned int lun = SCSI_LUN(srb);
2573 int retval, quick_format;
2574
2575 if (get_lun_card(chip, lun) != MS_CARD) {
2576 set_sense_type(chip, lun, SENSE_TYPE_MEDIA_LUN_NOT_SUPPORT);
2577 TRACE_RET(chip, TRANSPORT_FAILED);
2578 }
2579
2580 if ((srb->cmnd[3] != 0x4D) || (srb->cmnd[4] != 0x47) ||
2581 (srb->cmnd[5] != 0x66) || (srb->cmnd[6] != 0x6D) ||
2582 (srb->cmnd[7] != 0x74)) {
2583 set_sense_type(chip, lun, SENSE_TYPE_MEDIA_INVALID_CMD_FIELD);
2584 TRACE_RET(chip, TRANSPORT_FAILED);
2585 }
2586
2587 rtsx_disable_aspm(chip);
2588
2589 if (chip->ss_en && (rtsx_get_stat(chip) == RTSX_STAT_SS)) {
2590 rtsx_exit_ss(chip);
2591 wait_timeout(100);
2592
2593 if (!check_card_ready(chip, lun) ||
2594 (get_card_size(chip, lun) == 0)) {
2595 set_sense_type(chip, lun, SENSE_TYPE_MEDIA_NOT_PRESENT);
2596 TRACE_RET(chip, TRANSPORT_FAILED);
2597 }
2598 }
2599 rtsx_set_stat(chip, RTSX_STAT_RUN);
2600
2601 if (srb->cmnd[8] & 0x01)
2602 quick_format = 0;
2603 else
2604 quick_format = 1;
2605
2606 if (!(chip->card_ready & MS_CARD)) {
2607 set_sense_type(chip, lun, SENSE_TYPE_MEDIA_NOT_PRESENT);
2608 TRACE_RET(chip, TRANSPORT_FAILED);
2609 }
2610
2611 if (chip->card_wp & MS_CARD) {
2612 set_sense_type(chip, lun, SENSE_TYPE_MEDIA_WRITE_PROTECT);
2613 TRACE_RET(chip, TRANSPORT_FAILED);
2614 }
2615
2616 if (!CHK_MSPRO(ms_card)) {
2617 set_sense_type(chip, lun, SENSE_TYPE_MEDIA_LUN_NOT_SUPPORT);
2618 TRACE_RET(chip, TRANSPORT_FAILED);
2619 }
2620
2621 retval = mspro_format(srb, chip, MS_SHORT_DATA_LEN, quick_format);
2622 if (retval != STATUS_SUCCESS) {
2623 set_sense_type(chip, lun, SENSE_TYPE_FORMAT_CMD_FAILED);
2624 TRACE_RET(chip, TRANSPORT_FAILED);
2625 }
2626
2627 scsi_set_resid(srb, 0);
2628 return TRANSPORT_GOOD;
2629}
2630
2631#ifdef SUPPORT_PCGL_1P18
2632static int get_ms_information(struct scsi_cmnd *srb, struct rtsx_chip *chip)
2633{
2634 struct ms_info *ms_card = &(chip->ms_card);
2635 unsigned int lun = SCSI_LUN(srb);
2636 u8 dev_info_id, data_len;
2637 u8 *buf;
2638 unsigned int buf_len;
2639 int i;
2640
2641 if (!check_card_ready(chip, lun)) {
2642 set_sense_type(chip, lun, SENSE_TYPE_MEDIA_NOT_PRESENT);
2643 TRACE_RET(chip, TRANSPORT_FAILED);
2644 }
2645 if ((get_lun_card(chip, lun) != MS_CARD)) {
2646 set_sense_type(chip, lun, SENSE_TYPE_MEDIA_LUN_NOT_SUPPORT);
2647 TRACE_RET(chip, TRANSPORT_FAILED);
2648 }
2649
2650 if ((srb->cmnd[2] != 0xB0) || (srb->cmnd[4] != 0x4D) ||
2651 (srb->cmnd[5] != 0x53) || (srb->cmnd[6] != 0x49) ||
2652 (srb->cmnd[7] != 0x44)) {
2653 set_sense_type(chip, lun, SENSE_TYPE_MEDIA_INVALID_CMD_FIELD);
2654 TRACE_RET(chip, TRANSPORT_FAILED);
2655 }
2656
2657 dev_info_id = srb->cmnd[3];
2658 if ((CHK_MSXC(ms_card) && (dev_info_id == 0x10)) ||
2659 (!CHK_MSXC(ms_card) && (dev_info_id == 0x13)) ||
2660 !CHK_MSPRO(ms_card)) {
2661 set_sense_type(chip, lun, SENSE_TYPE_MEDIA_INVALID_CMD_FIELD);
2662 TRACE_RET(chip, TRANSPORT_FAILED);
2663 }
2664
2665 if (dev_info_id == 0x15)
2666 buf_len = data_len = 0x3A;
2667 else
2668 buf_len = data_len = 0x6A;
2669
2670 buf = kmalloc(buf_len, GFP_KERNEL);
2671 if (!buf)
2672 TRACE_RET(chip, TRANSPORT_ERROR);
2673
2674 i = 0;
2675 /* GET Memory Stick Media Information Response Header */
2676 buf[i++] = 0x00; /* Data length MSB */
2677 buf[i++] = data_len; /* Data length LSB */
2678 /* Device Information Type Code */
2679 if (CHK_MSXC(ms_card))
2680 buf[i++] = 0x03;
2681 else
2682 buf[i++] = 0x02;
2683
2684 /* SGM bit */
2685 buf[i++] = 0x01;
2686 /* Reserved */
2687 buf[i++] = 0x00;
2688 buf[i++] = 0x00;
2689 buf[i++] = 0x00;
2690 /* Number of Device Information */
2691 buf[i++] = 0x01;
2692
2693 /* Device Information Body */
2694
2695 /* Device Information ID Number */
2696 buf[i++] = dev_info_id;
2697 /* Device Information Length */
2698 if (dev_info_id == 0x15)
2699 data_len = 0x31;
2700 else
2701 data_len = 0x61;
2702
2703 buf[i++] = 0x00; /* Data length MSB */
2704 buf[i++] = data_len; /* Data length LSB */
2705 /* Valid Bit */
2706 buf[i++] = 0x80;
2707 if ((dev_info_id == 0x10) || (dev_info_id == 0x13)) {
2708 /* System Information */
2709 memcpy(buf+i, ms_card->raw_sys_info, 96);
2710 } else {
2711 /* Model Name */
2712 memcpy(buf+i, ms_card->raw_model_name, 48);
2713 }
2714
2715 rtsx_stor_set_xfer_buf(buf, buf_len, srb);
2716
2717 if (dev_info_id == 0x15)
2718 scsi_set_resid(srb, scsi_bufflen(srb)-0x3C);
2719 else
2720 scsi_set_resid(srb, scsi_bufflen(srb)-0x6C);
2721
2722 kfree(buf);
2723 return STATUS_SUCCESS;
2724}
2725#endif
2726
2727static int ms_sp_cmnd(struct scsi_cmnd *srb, struct rtsx_chip *chip)
2728{
2729 int retval = TRANSPORT_ERROR;
2730
2731 if (srb->cmnd[2] == MS_FORMAT)
2732 retval = ms_format_cmnd(srb, chip);
2733#ifdef SUPPORT_PCGL_1P18
2734 else if (srb->cmnd[2] == GET_MS_INFORMATION)
2735 retval = get_ms_information(srb, chip);
2736#endif
2737
2738 return retval;
2739}
2740
2741#ifdef SUPPORT_CPRM
2742static int sd_extention_cmnd(struct scsi_cmnd *srb, struct rtsx_chip *chip)
2743{
2744 unsigned int lun = SCSI_LUN(srb);
2745 int result;
2746
2747 rtsx_disable_aspm(chip);
2748
2749 if (chip->ss_en && (rtsx_get_stat(chip) == RTSX_STAT_SS)) {
2750 rtsx_exit_ss(chip);
2751 wait_timeout(100);
2752 }
2753 rtsx_set_stat(chip, RTSX_STAT_RUN);
2754
2755 sd_cleanup_work(chip);
2756
2757 if (!check_card_ready(chip, lun)) {
2758 set_sense_type(chip, lun, SENSE_TYPE_MEDIA_NOT_PRESENT);
2759 TRACE_RET(chip, TRANSPORT_FAILED);
2760 }
2761 if ((get_lun_card(chip, lun) != SD_CARD)) {
2762 set_sense_type(chip, lun, SENSE_TYPE_MEDIA_LUN_NOT_SUPPORT);
2763 TRACE_RET(chip, TRANSPORT_FAILED);
2764 }
2765
2766 switch (srb->cmnd[0]) {
2767 case SD_PASS_THRU_MODE:
2768 result = sd_pass_thru_mode(srb, chip);
2769 break;
2770
2771 case SD_EXECUTE_NO_DATA:
2772 result = sd_execute_no_data(srb, chip);
2773 break;
2774
2775 case SD_EXECUTE_READ:
2776 result = sd_execute_read_data(srb, chip);
2777 break;
2778
2779 case SD_EXECUTE_WRITE:
2780 result = sd_execute_write_data(srb, chip);
2781 break;
2782
2783 case SD_GET_RSP:
2784 result = sd_get_cmd_rsp(srb, chip);
2785 break;
2786
2787 case SD_HW_RST:
2788 result = sd_hw_rst(srb, chip);
2789 break;
2790
2791 default:
2792 set_sense_type(chip, lun, SENSE_TYPE_MEDIA_INVALID_CMD_FIELD);
2793 TRACE_RET(chip, TRANSPORT_FAILED);
2794 }
2795
2796 return result;
2797}
2798#endif
2799
2800#ifdef SUPPORT_MAGIC_GATE
2801static int mg_report_key(struct scsi_cmnd *srb, struct rtsx_chip *chip)
2802{
2803 struct ms_info *ms_card = &(chip->ms_card);
2804 unsigned int lun = SCSI_LUN(srb);
2805 int retval;
2806 u8 key_format;
2807
2808 RTSX_DEBUGP("--%s--\n", __func__);
2809
2810 rtsx_disable_aspm(chip);
2811
2812 if (chip->ss_en && (rtsx_get_stat(chip) == RTSX_STAT_SS)) {
2813 rtsx_exit_ss(chip);
2814 wait_timeout(100);
2815 }
2816 rtsx_set_stat(chip, RTSX_STAT_RUN);
2817
2818 ms_cleanup_work(chip);
2819
2820 if (!check_card_ready(chip, lun)) {
2821 set_sense_type(chip, lun, SENSE_TYPE_MEDIA_NOT_PRESENT);
2822 TRACE_RET(chip, TRANSPORT_FAILED);
2823 }
2824 if ((get_lun_card(chip, lun) != MS_CARD)) {
2825 set_sense_type(chip, lun, SENSE_TYPE_MEDIA_LUN_NOT_SUPPORT);
2826 TRACE_RET(chip, TRANSPORT_FAILED);
2827 }
2828
2829 if (srb->cmnd[7] != KC_MG_R_PRO) {
2830 set_sense_type(chip, lun, SENSE_TYPE_MEDIA_INVALID_CMD_FIELD);
2831 TRACE_RET(chip, TRANSPORT_FAILED);
2832 }
2833
2834 if (!CHK_MSPRO(ms_card)) {
2835 set_sense_type(chip, lun, SENSE_TYPE_MG_INCOMPATIBLE_MEDIUM);
2836 TRACE_RET(chip, TRANSPORT_FAILED);
2837 }
2838
2839 key_format = srb->cmnd[10] & 0x3F;
2840 RTSX_DEBUGP("key_format = 0x%x\n", key_format);
2841
2842 switch (key_format) {
2843 case KF_GET_LOC_EKB:
2844 if ((scsi_bufflen(srb) == 0x41C) &&
2845 (srb->cmnd[8] == 0x04) &&
2846 (srb->cmnd[9] == 0x1C)) {
2847 retval = mg_get_local_EKB(srb, chip);
2848 if (retval != STATUS_SUCCESS)
2849 TRACE_RET(chip, TRANSPORT_FAILED);
2850
2851 } else {
2852 set_sense_type(chip, lun, SENSE_TYPE_MEDIA_INVALID_CMD_FIELD);
2853 TRACE_RET(chip, TRANSPORT_FAILED);
2854 }
2855 break;
2856
2857 case KF_RSP_CHG:
2858 if ((scsi_bufflen(srb) == 0x24) &&
2859 (srb->cmnd[8] == 0x00) &&
2860 (srb->cmnd[9] == 0x24)) {
2861 retval = mg_get_rsp_chg(srb, chip);
2862 if (retval != STATUS_SUCCESS)
2863 TRACE_RET(chip, TRANSPORT_FAILED);
2864
2865 } else {
2866 set_sense_type(chip, lun, SENSE_TYPE_MEDIA_INVALID_CMD_FIELD);
2867 TRACE_RET(chip, TRANSPORT_FAILED);
2868 }
2869 break;
2870
2871 case KF_GET_ICV:
2872 ms_card->mg_entry_num = srb->cmnd[5];
2873 if ((scsi_bufflen(srb) == 0x404) &&
2874 (srb->cmnd[8] == 0x04) &&
2875 (srb->cmnd[9] == 0x04) &&
2876 (srb->cmnd[2] == 0x00) &&
2877 (srb->cmnd[3] == 0x00) &&
2878 (srb->cmnd[4] == 0x00) &&
2879 (srb->cmnd[5] < 32)) {
2880 retval = mg_get_ICV(srb, chip);
2881 if (retval != STATUS_SUCCESS)
2882 TRACE_RET(chip, TRANSPORT_FAILED);
2883
2884 } else {
2885 set_sense_type(chip, lun, SENSE_TYPE_MEDIA_INVALID_CMD_FIELD);
2886 TRACE_RET(chip, TRANSPORT_FAILED);
2887 }
2888 break;
2889
2890 default:
2891 set_sense_type(chip, lun, SENSE_TYPE_MEDIA_INVALID_CMD_FIELD);
2892 TRACE_RET(chip, TRANSPORT_FAILED);
2893 }
2894
2895 scsi_set_resid(srb, 0);
2896 return TRANSPORT_GOOD;
2897}
2898
2899static int mg_send_key(struct scsi_cmnd *srb, struct rtsx_chip *chip)
2900{
2901 struct ms_info *ms_card = &(chip->ms_card);
2902 unsigned int lun = SCSI_LUN(srb);
2903 int retval;
2904 u8 key_format;
2905
2906 RTSX_DEBUGP("--%s--\n", __func__);
2907
2908 rtsx_disable_aspm(chip);
2909
2910 if (chip->ss_en && (rtsx_get_stat(chip) == RTSX_STAT_SS)) {
2911 rtsx_exit_ss(chip);
2912 wait_timeout(100);
2913 }
2914 rtsx_set_stat(chip, RTSX_STAT_RUN);
2915
2916 ms_cleanup_work(chip);
2917
2918 if (!check_card_ready(chip, lun)) {
2919 set_sense_type(chip, lun, SENSE_TYPE_MEDIA_NOT_PRESENT);
2920 TRACE_RET(chip, TRANSPORT_FAILED);
2921 }
2922 if (check_card_wp(chip, lun)) {
2923 set_sense_type(chip, lun, SENSE_TYPE_MEDIA_WRITE_PROTECT);
2924 TRACE_RET(chip, TRANSPORT_FAILED);
2925 }
2926 if ((get_lun_card(chip, lun) != MS_CARD)) {
2927 set_sense_type(chip, lun, SENSE_TYPE_MEDIA_LUN_NOT_SUPPORT);
2928 TRACE_RET(chip, TRANSPORT_FAILED);
2929 }
2930
2931 if (srb->cmnd[7] != KC_MG_R_PRO) {
2932 set_sense_type(chip, lun, SENSE_TYPE_MEDIA_INVALID_CMD_FIELD);
2933 TRACE_RET(chip, TRANSPORT_FAILED);
2934 }
2935
2936 if (!CHK_MSPRO(ms_card)) {
2937 set_sense_type(chip, lun, SENSE_TYPE_MG_INCOMPATIBLE_MEDIUM);
2938 TRACE_RET(chip, TRANSPORT_FAILED);
2939 }
2940
2941 key_format = srb->cmnd[10] & 0x3F;
2942 RTSX_DEBUGP("key_format = 0x%x\n", key_format);
2943
2944 switch (key_format) {
2945 case KF_SET_LEAF_ID:
2946 if ((scsi_bufflen(srb) == 0x0C) &&
2947 (srb->cmnd[8] == 0x00) &&
2948 (srb->cmnd[9] == 0x0C)) {
2949 retval = mg_set_leaf_id(srb, chip);
2950 if (retval != STATUS_SUCCESS)
2951 TRACE_RET(chip, TRANSPORT_FAILED);
2952
2953 } else {
2954 set_sense_type(chip, lun, SENSE_TYPE_MEDIA_INVALID_CMD_FIELD);
2955 TRACE_RET(chip, TRANSPORT_FAILED);
2956 }
2957 break;
2958
2959 case KF_CHG_HOST:
2960 if ((scsi_bufflen(srb) == 0x0C) &&
2961 (srb->cmnd[8] == 0x00) &&
2962 (srb->cmnd[9] == 0x0C)) {
2963 retval = mg_chg(srb, chip);
2964 if (retval != STATUS_SUCCESS)
2965 TRACE_RET(chip, TRANSPORT_FAILED);
2966
2967 } else {
2968 set_sense_type(chip, lun, SENSE_TYPE_MEDIA_INVALID_CMD_FIELD);
2969 TRACE_RET(chip, TRANSPORT_FAILED);
2970 }
2971 break;
2972
2973 case KF_RSP_HOST:
2974 if ((scsi_bufflen(srb) == 0x0C) &&
2975 (srb->cmnd[8] == 0x00) &&
2976 (srb->cmnd[9] == 0x0C)) {
2977 retval = mg_rsp(srb, chip);
2978 if (retval != STATUS_SUCCESS)
2979 TRACE_RET(chip, TRANSPORT_FAILED);
2980
2981 } else {
2982 set_sense_type(chip, lun, SENSE_TYPE_MEDIA_INVALID_CMD_FIELD);
2983 TRACE_RET(chip, TRANSPORT_FAILED);
2984 }
2985 break;
2986
2987 case KF_SET_ICV:
2988 ms_card->mg_entry_num = srb->cmnd[5];
2989 if ((scsi_bufflen(srb) == 0x404) &&
2990 (srb->cmnd[8] == 0x04) &&
2991 (srb->cmnd[9] == 0x04) &&
2992 (srb->cmnd[2] == 0x00) &&
2993 (srb->cmnd[3] == 0x00) &&
2994 (srb->cmnd[4] == 0x00) &&
2995 (srb->cmnd[5] < 32)) {
2996 retval = mg_set_ICV(srb, chip);
2997 if (retval != STATUS_SUCCESS)
2998 TRACE_RET(chip, TRANSPORT_FAILED);
2999
3000 } else {
3001 set_sense_type(chip, lun, SENSE_TYPE_MEDIA_INVALID_CMD_FIELD);
3002 TRACE_RET(chip, TRANSPORT_FAILED);
3003 }
3004 break;
3005
3006 default:
3007 set_sense_type(chip, lun, SENSE_TYPE_MEDIA_INVALID_CMD_FIELD);
3008 TRACE_RET(chip, TRANSPORT_FAILED);
3009 }
3010
3011 scsi_set_resid(srb, 0);
3012 return TRANSPORT_GOOD;
3013}
3014#endif
3015
3016int rtsx_scsi_handler(struct scsi_cmnd *srb, struct rtsx_chip *chip)
3017{
3018#ifdef SUPPORT_SD_LOCK
3019 struct sd_info *sd_card = &(chip->sd_card);
3020#endif
3021 struct ms_info *ms_card = &(chip->ms_card);
3022 unsigned int lun = SCSI_LUN(srb);
3023 int result;
3024
3025#ifdef SUPPORT_SD_LOCK
3026 if (sd_card->sd_erase_status) {
3027 /* Block all SCSI command except for
3028 * REQUEST_SENSE and rs_ppstatus
3029 */
3030 if (!((srb->cmnd[0] == VENDOR_CMND) &&
3031 (srb->cmnd[1] == SCSI_APP_CMD) &&
3032 (srb->cmnd[2] == GET_DEV_STATUS)) &&
3033 (srb->cmnd[0] != REQUEST_SENSE)) {
3034 /* Logical Unit Not Ready Format in Progress */
3035 set_sense_data(chip, lun, CUR_ERR,
3036 0x02, 0, 0x04, 0x04, 0, 0);
3037 TRACE_RET(chip, TRANSPORT_FAILED);
3038 }
3039 }
3040#endif
3041
3042 if ((get_lun_card(chip, lun) == MS_CARD) &&
3043 (ms_card->format_status == FORMAT_IN_PROGRESS)) {
3044 if ((srb->cmnd[0] != REQUEST_SENSE) && (srb->cmnd[0] != INQUIRY)) {
3045 /* Logical Unit Not Ready Format in Progress */
3046 set_sense_data(chip, lun, CUR_ERR, 0x02, 0, 0x04, 0x04,
3047 0, (u16)(ms_card->progress));
3048 TRACE_RET(chip, TRANSPORT_FAILED);
3049 }
3050 }
3051
3052 switch (srb->cmnd[0]) {
3053 case READ_10:
3054 case WRITE_10:
3055 case READ_6:
3056 case WRITE_6:
3057 result = read_write(srb, chip);
3058#if !defined(LED_AUTO_BLINK) && !defined(REGULAR_BLINK)
3059 led_shine(srb, chip);
3060#endif
3061 break;
3062
3063 case TEST_UNIT_READY:
3064 result = test_unit_ready(srb, chip);
3065 break;
3066
3067 case INQUIRY:
3068 result = inquiry(srb, chip);
3069 break;
3070
3071 case READ_CAPACITY:
3072 result = read_capacity(srb, chip);
3073 break;
3074
3075 case START_STOP:
3076 result = start_stop_unit(srb, chip);
3077 break;
3078
3079 case ALLOW_MEDIUM_REMOVAL:
3080 result = allow_medium_removal(srb, chip);
3081 break;
3082
3083 case REQUEST_SENSE:
3084 result = request_sense(srb, chip);
3085 break;
3086
3087 case MODE_SENSE:
3088 case MODE_SENSE_10:
3089 result = mode_sense(srb, chip);
3090 break;
3091
3092 case 0x23:
3093 result = read_format_capacity(srb, chip);
3094 break;
3095
3096 case VENDOR_CMND:
3097 result = vendor_cmnd(srb, chip);
3098 break;
3099
3100 case MS_SP_CMND:
3101 result = ms_sp_cmnd(srb, chip);
3102 break;
3103
3104#ifdef SUPPORT_CPRM
3105 case SD_PASS_THRU_MODE:
3106 case SD_EXECUTE_NO_DATA:
3107 case SD_EXECUTE_READ:
3108 case SD_EXECUTE_WRITE:
3109 case SD_GET_RSP:
3110 case SD_HW_RST:
3111 result = sd_extention_cmnd(srb, chip);
3112 break;
3113#endif
3114
3115#ifdef SUPPORT_MAGIC_GATE
3116 case CMD_MSPRO_MG_RKEY:
3117 result = mg_report_key(srb, chip);
3118 break;
3119
3120 case CMD_MSPRO_MG_SKEY:
3121 result = mg_send_key(srb, chip);
3122 break;
3123#endif
3124
3125 case FORMAT_UNIT:
3126 case MODE_SELECT:
3127 case VERIFY:
3128 result = TRANSPORT_GOOD;
3129 break;
3130
3131 default:
3132 set_sense_type(chip, lun, SENSE_TYPE_MEDIA_INVALID_CMD_FIELD);
3133 result = TRANSPORT_FAILED;
3134 }
3135
3136 return result;
3137}
diff --git a/drivers/staging/rts_pstor/rtsx_scsi.h b/drivers/staging/rts_pstor/rtsx_scsi.h
deleted file mode 100644
index 64b84992fdb3..000000000000
--- a/drivers/staging/rts_pstor/rtsx_scsi.h
+++ /dev/null
@@ -1,142 +0,0 @@
1/* Driver for Realtek PCI-Express card reader
2 * Header file
3 *
4 * Copyright(c) 2009 Realtek Semiconductor Corp. All rights reserved.
5 *
6 * This program is free software; you can redistribute it and/or modify it
7 * under the terms of the GNU General Public License as published by the
8 * Free Software Foundation; either version 2, or (at your option) any
9 * later version.
10 *
11 * This program is distributed in the hope that it will be useful, but
12 * WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
14 * General Public License for more details.
15 *
16 * You should have received a copy of the GNU General Public License along
17 * with this program; if not, see <http://www.gnu.org/licenses/>.
18 *
19 * Author:
20 * wwang (wei_wang@realsil.com.cn)
21 * No. 450, Shenhu Road, Suzhou Industry Park, Suzhou, China
22 */
23
24#ifndef __REALTEK_RTSX_SCSI_H
25#define __REALTEK_RTSX_SCSI_H
26
27#include "rtsx.h"
28#include "rtsx_chip.h"
29
30#define MS_SP_CMND 0xFA
31#define MS_FORMAT 0xA0
32#define GET_MS_INFORMATION 0xB0
33
34#define VENDOR_CMND 0xF0
35
36#define READ_STATUS 0x09
37
38#define READ_EEPROM 0x04
39#define WRITE_EEPROM 0x05
40#define READ_MEM 0x0D
41#define WRITE_MEM 0x0E
42#define GET_BUS_WIDTH 0x13
43#define GET_SD_CSD 0x14
44#define TOGGLE_GPIO 0x15
45#define TRACE_MSG 0x18
46
47#define SCSI_APP_CMD 0x10
48
49#define PP_READ10 0x1A
50#define PP_WRITE10 0x0A
51#define READ_HOST_REG 0x1D
52#define WRITE_HOST_REG 0x0D
53#define SET_VAR 0x05
54#define GET_VAR 0x15
55#define DMA_READ 0x16
56#define DMA_WRITE 0x06
57#define GET_DEV_STATUS 0x10
58#define SET_CHIP_MODE 0x27
59#define SUIT_CMD 0xE0
60#define WRITE_PHY 0x07
61#define READ_PHY 0x17
62#define WRITE_EEPROM2 0x03
63#define READ_EEPROM2 0x13
64#define ERASE_EEPROM2 0x23
65#define WRITE_EFUSE 0x04
66#define READ_EFUSE 0x14
67#define WRITE_CFG 0x0E
68#define READ_CFG 0x1E
69
70#define SPI_VENDOR_COMMAND 0x1C
71
72#define SCSI_SPI_GETSTATUS 0x00
73#define SCSI_SPI_SETPARAMETER 0x01
74#define SCSI_SPI_READFALSHID 0x02
75#define SCSI_SPI_READFLASH 0x03
76#define SCSI_SPI_WRITEFLASH 0x04
77#define SCSI_SPI_WRITEFLASHSTATUS 0x05
78#define SCSI_SPI_ERASEFLASH 0x06
79
80#define INIT_BATCHCMD 0x41
81#define ADD_BATCHCMD 0x42
82#define SEND_BATCHCMD 0x43
83#define GET_BATCHRSP 0x44
84
85#define CHIP_NORMALMODE 0x00
86#define CHIP_DEBUGMODE 0x01
87
88/* SD Pass Through Command Extension */
89#define SD_PASS_THRU_MODE 0xD0
90#define SD_EXECUTE_NO_DATA 0xD1
91#define SD_EXECUTE_READ 0xD2
92#define SD_EXECUTE_WRITE 0xD3
93#define SD_GET_RSP 0xD4
94#define SD_HW_RST 0xD6
95
96#ifdef SUPPORT_MAGIC_GATE
97#define CMD_MSPRO_MG_RKEY 0xA4 /* Report Key Command */
98#define CMD_MSPRO_MG_SKEY 0xA3 /* Send Key Command */
99
100/* CBWCB field: key class */
101#define KC_MG_R_PRO 0xBE /* MG-R PRO*/
102
103/* CBWCB field: key format */
104#define KF_SET_LEAF_ID 0x31 /* Set Leaf ID */
105#define KF_GET_LOC_EKB 0x32 /* Get Local EKB */
106#define KF_CHG_HOST 0x33 /* Challenge (host) */
107#define KF_RSP_CHG 0x34 /* Response and Challenge (device) */
108#define KF_RSP_HOST 0x35 /* Response (host) */
109#define KF_GET_ICV 0x36 /* Get ICV */
110#define KF_SET_ICV 0x37 /* SSet ICV */
111#endif
112
113/* Sense type */
114#define SENSE_TYPE_NO_SENSE 0
115#define SENSE_TYPE_MEDIA_CHANGE 1
116#define SENSE_TYPE_MEDIA_NOT_PRESENT 2
117#define SENSE_TYPE_MEDIA_LBA_OVER_RANGE 3
118#define SENSE_TYPE_MEDIA_LUN_NOT_SUPPORT 4
119#define SENSE_TYPE_MEDIA_WRITE_PROTECT 5
120#define SENSE_TYPE_MEDIA_INVALID_CMD_FIELD 6
121#define SENSE_TYPE_MEDIA_UNRECOVER_READ_ERR 7
122#define SENSE_TYPE_MEDIA_WRITE_ERR 8
123#define SENSE_TYPE_FORMAT_IN_PROGRESS 9
124#define SENSE_TYPE_FORMAT_CMD_FAILED 10
125#ifdef SUPPORT_MAGIC_GATE
126#define SENSE_TYPE_MG_KEY_FAIL_NOT_ESTAB 0x0b
127#define SENSE_TYPE_MG_KEY_FAIL_NOT_AUTHEN 0x0c
128#define SENSE_TYPE_MG_INCOMPATIBLE_MEDIUM 0x0d
129#define SENSE_TYPE_MG_WRITE_ERR 0x0e
130#endif
131#ifdef SUPPORT_SD_LOCK
132#define SENSE_TYPE_MEDIA_READ_FORBIDDEN 0x10 /* FOR Locked SD card*/
133#endif
134
135void scsi_show_command(struct scsi_cmnd *srb);
136void set_sense_type(struct rtsx_chip *chip, unsigned int lun, int sense_type);
137void set_sense_data(struct rtsx_chip *chip, unsigned int lun, u8 err_code, u8 sense_key,
138 u32 info, u8 asc, u8 ascq, u8 sns_key_info0, u16 sns_key_info1);
139int rtsx_scsi_handler(struct scsi_cmnd *srb, struct rtsx_chip *chip);
140
141#endif /* __REALTEK_RTSX_SCSI_H */
142
diff --git a/drivers/staging/rts_pstor/rtsx_sys.h b/drivers/staging/rts_pstor/rtsx_sys.h
deleted file mode 100644
index 8e55a3a8b00a..000000000000
--- a/drivers/staging/rts_pstor/rtsx_sys.h
+++ /dev/null
@@ -1,50 +0,0 @@
1/* Driver for Realtek PCI-Express card reader
2 * Header file
3 *
4 * Copyright(c) 2009 Realtek Semiconductor Corp. All rights reserved.
5 *
6 * This program is free software; you can redistribute it and/or modify it
7 * under the terms of the GNU General Public License as published by the
8 * Free Software Foundation; either version 2, or (at your option) any
9 * later version.
10 *
11 * This program is distributed in the hope that it will be useful, but
12 * WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
14 * General Public License for more details.
15 *
16 * You should have received a copy of the GNU General Public License along
17 * with this program; if not, see <http://www.gnu.org/licenses/>.
18 *
19 * Author:
20 * wwang (wei_wang@realsil.com.cn)
21 * No. 450, Shenhu Road, Suzhou Industry Park, Suzhou, China
22 */
23
24#ifndef __RTSX_SYS_H
25#define __RTSX_SYS_H
26
27#include "rtsx.h"
28#include "rtsx_chip.h"
29#include "rtsx_card.h"
30
31typedef dma_addr_t ULONG_PTR;
32
33static inline void rtsx_exclusive_enter_ss(struct rtsx_chip *chip)
34{
35 struct rtsx_dev *dev = chip->rtsx;
36
37 spin_lock(&(dev->reg_lock));
38 rtsx_enter_ss(chip);
39 spin_unlock(&(dev->reg_lock));
40}
41
42static inline void rtsx_reset_detected_cards(struct rtsx_chip *chip, int flag)
43{
44 rtsx_reset_cards(chip);
45}
46
47#define RTSX_MSG_IN_INT(x)
48
49#endif /* __RTSX_SYS_H */
50
diff --git a/drivers/staging/rts_pstor/rtsx_transport.c b/drivers/staging/rts_pstor/rtsx_transport.c
deleted file mode 100644
index 1f9a42480443..000000000000
--- a/drivers/staging/rts_pstor/rtsx_transport.c
+++ /dev/null
@@ -1,769 +0,0 @@
1/* Driver for Realtek PCI-Express card reader
2 *
3 * Copyright(c) 2009 Realtek Semiconductor Corp. All rights reserved.
4 *
5 * This program is free software; you can redistribute it and/or modify it
6 * under the terms of the GNU General Public License as published by the
7 * Free Software Foundation; either version 2, or (at your option) any
8 * later version.
9 *
10 * This program is distributed in the hope that it will be useful, but
11 * WITHOUT ANY WARRANTY; without even the implied warranty of
12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
13 * General Public License for more details.
14 *
15 * You should have received a copy of the GNU General Public License along
16 * with this program; if not, see <http://www.gnu.org/licenses/>.
17 *
18 * Author:
19 * wwang (wei_wang@realsil.com.cn)
20 * No. 450, Shenhu Road, Suzhou Industry Park, Suzhou, China
21 */
22
23#include <linux/blkdev.h>
24#include <linux/kthread.h>
25#include <linux/sched.h>
26
27#include "rtsx.h"
28#include "rtsx_scsi.h"
29#include "rtsx_transport.h"
30#include "rtsx_chip.h"
31#include "rtsx_card.h"
32#include "debug.h"
33
34/***********************************************************************
35 * Scatter-gather transfer buffer access routines
36 ***********************************************************************/
37
38/* Copy a buffer of length buflen to/from the srb's transfer buffer.
39 * (Note: for scatter-gather transfers (srb->use_sg > 0), srb->request_buffer
40 * points to a list of s-g entries and we ignore srb->request_bufflen.
41 * For non-scatter-gather transfers, srb->request_buffer points to the
42 * transfer buffer itself and srb->request_bufflen is the buffer's length.)
43 * Update the *index and *offset variables so that the next copy will
44 * pick up from where this one left off. */
45
46unsigned int rtsx_stor_access_xfer_buf(unsigned char *buffer,
47 unsigned int buflen, struct scsi_cmnd *srb, unsigned int *index,
48 unsigned int *offset, enum xfer_buf_dir dir)
49{
50 unsigned int cnt;
51
52 /* If not using scatter-gather, just transfer the data directly.
53 * Make certain it will fit in the available buffer space. */
54 if (scsi_sg_count(srb) == 0) {
55 if (*offset >= scsi_bufflen(srb))
56 return 0;
57 cnt = min(buflen, scsi_bufflen(srb) - *offset);
58 if (dir == TO_XFER_BUF)
59 memcpy((unsigned char *) scsi_sglist(srb) + *offset,
60 buffer, cnt);
61 else
62 memcpy(buffer, (unsigned char *) scsi_sglist(srb) +
63 *offset, cnt);
64 *offset += cnt;
65
66 /* Using scatter-gather. We have to go through the list one entry
67 * at a time. Each s-g entry contains some number of pages, and
68 * each page has to be kmap()'ed separately. If the page is already
69 * in kernel-addressable memory then kmap() will return its address.
70 * If the page is not directly accessible -- such as a user buffer
71 * located in high memory -- then kmap() will map it to a temporary
72 * position in the kernel's virtual address space. */
73 } else {
74 struct scatterlist *sg =
75 (struct scatterlist *) scsi_sglist(srb)
76 + *index;
77
78 /* This loop handles a single s-g list entry, which may
79 * include multiple pages. Find the initial page structure
80 * and the starting offset within the page, and update
81 * the *offset and *index values for the next loop. */
82 cnt = 0;
83 while (cnt < buflen && *index < scsi_sg_count(srb)) {
84 struct page *page = sg_page(sg) +
85 ((sg->offset + *offset) >> PAGE_SHIFT);
86 unsigned int poff =
87 (sg->offset + *offset) & (PAGE_SIZE-1);
88 unsigned int sglen = sg->length - *offset;
89
90 if (sglen > buflen - cnt) {
91
92 /* Transfer ends within this s-g entry */
93 sglen = buflen - cnt;
94 *offset += sglen;
95 } else {
96
97 /* Transfer continues to next s-g entry */
98 *offset = 0;
99 ++*index;
100 ++sg;
101 }
102
103 /* Transfer the data for all the pages in this
104 * s-g entry. For each page: call kmap(), do the
105 * transfer, and call kunmap() immediately after. */
106 while (sglen > 0) {
107 unsigned int plen = min(sglen, (unsigned int)
108 PAGE_SIZE - poff);
109 unsigned char *ptr = kmap(page);
110
111 if (dir == TO_XFER_BUF)
112 memcpy(ptr + poff, buffer + cnt, plen);
113 else
114 memcpy(buffer + cnt, ptr + poff, plen);
115 kunmap(page);
116
117 /* Start at the beginning of the next page */
118 poff = 0;
119 ++page;
120 cnt += plen;
121 sglen -= plen;
122 }
123 }
124 }
125
126 /* Return the amount actually transferred */
127 return cnt;
128}
129
130/* Store the contents of buffer into srb's transfer buffer and set the
131* SCSI residue. */
132void rtsx_stor_set_xfer_buf(unsigned char *buffer,
133 unsigned int buflen, struct scsi_cmnd *srb)
134{
135 unsigned int index = 0, offset = 0;
136
137 rtsx_stor_access_xfer_buf(buffer, buflen, srb, &index, &offset,
138 TO_XFER_BUF);
139 if (buflen < scsi_bufflen(srb))
140 scsi_set_resid(srb, scsi_bufflen(srb) - buflen);
141}
142
143void rtsx_stor_get_xfer_buf(unsigned char *buffer,
144 unsigned int buflen, struct scsi_cmnd *srb)
145{
146 unsigned int index = 0, offset = 0;
147
148 rtsx_stor_access_xfer_buf(buffer, buflen, srb, &index, &offset,
149 FROM_XFER_BUF);
150 if (buflen < scsi_bufflen(srb))
151 scsi_set_resid(srb, scsi_bufflen(srb) - buflen);
152}
153
154
155/***********************************************************************
156 * Transport routines
157 ***********************************************************************/
158
159/* Invoke the transport and basic error-handling/recovery methods
160 *
161 * This is used to send the message to the device and receive the response.
162 */
163void rtsx_invoke_transport(struct scsi_cmnd *srb, struct rtsx_chip *chip)
164{
165 int result;
166
167 result = rtsx_scsi_handler(srb, chip);
168
169 /* if the command gets aborted by the higher layers, we need to
170 * short-circuit all other processing
171 */
172 if (rtsx_chk_stat(chip, RTSX_STAT_ABORT)) {
173 RTSX_DEBUGP("-- command was aborted\n");
174 srb->result = DID_ABORT << 16;
175 goto Handle_Errors;
176 }
177
178 /* if there is a transport error, reset and don't auto-sense */
179 if (result == TRANSPORT_ERROR) {
180 RTSX_DEBUGP("-- transport indicates error, resetting\n");
181 srb->result = DID_ERROR << 16;
182 goto Handle_Errors;
183 }
184
185 srb->result = SAM_STAT_GOOD;
186
187 /*
188 * If we have a failure, we're going to do a REQUEST_SENSE
189 * automatically. Note that we differentiate between a command
190 * "failure" and an "error" in the transport mechanism.
191 */
192 if (result == TRANSPORT_FAILED) {
193 /* set the result so the higher layers expect this data */
194 srb->result = SAM_STAT_CHECK_CONDITION;
195 memcpy(srb->sense_buffer,
196 (unsigned char *)&(chip->sense_buffer[SCSI_LUN(srb)]),
197 sizeof(struct sense_data_t));
198 }
199
200 return;
201
202 /* Error and abort processing: try to resynchronize with the device
203 * by issuing a port reset. If that fails, try a class-specific
204 * device reset. */
205Handle_Errors:
206 return;
207}
208
209void rtsx_add_cmd(struct rtsx_chip *chip,
210 u8 cmd_type, u16 reg_addr, u8 mask, u8 data)
211{
212 u32 *cb = (u32 *)(chip->host_cmds_ptr);
213 u32 val = 0;
214
215 val |= (u32)(cmd_type & 0x03) << 30;
216 val |= (u32)(reg_addr & 0x3FFF) << 16;
217 val |= (u32)mask << 8;
218 val |= (u32)data;
219
220 spin_lock_irq(&chip->rtsx->reg_lock);
221 if (chip->ci < (HOST_CMDS_BUF_LEN / 4))
222 cb[(chip->ci)++] = cpu_to_le32(val);
223
224 spin_unlock_irq(&chip->rtsx->reg_lock);
225}
226
227void rtsx_send_cmd_no_wait(struct rtsx_chip *chip)
228{
229 u32 val = 1 << 31;
230
231 rtsx_writel(chip, RTSX_HCBAR, chip->host_cmds_addr);
232
233 val |= (u32)(chip->ci * 4) & 0x00FFFFFF;
234 /* Hardware Auto Response */
235 val |= 0x40000000;
236 rtsx_writel(chip, RTSX_HCBCTLR, val);
237}
238
239int rtsx_send_cmd(struct rtsx_chip *chip, u8 card, int timeout)
240{
241 struct rtsx_dev *rtsx = chip->rtsx;
242 struct completion trans_done;
243 u32 val = 1 << 31;
244 long timeleft;
245 int err = 0;
246
247 if (card == SD_CARD)
248 rtsx->check_card_cd = SD_EXIST;
249 else if (card == MS_CARD)
250 rtsx->check_card_cd = MS_EXIST;
251 else if (card == XD_CARD)
252 rtsx->check_card_cd = XD_EXIST;
253 else
254 rtsx->check_card_cd = 0;
255
256 spin_lock_irq(&rtsx->reg_lock);
257
258 /* set up data structures for the wakeup system */
259 rtsx->done = &trans_done;
260 rtsx->trans_result = TRANS_NOT_READY;
261 init_completion(&trans_done);
262 rtsx->trans_state = STATE_TRANS_CMD;
263
264 rtsx_writel(chip, RTSX_HCBAR, chip->host_cmds_addr);
265
266 val |= (u32)(chip->ci * 4) & 0x00FFFFFF;
267 /* Hardware Auto Response */
268 val |= 0x40000000;
269 rtsx_writel(chip, RTSX_HCBCTLR, val);
270
271 spin_unlock_irq(&rtsx->reg_lock);
272
273 /* Wait for TRANS_OK_INT */
274 timeleft = wait_for_completion_interruptible_timeout(
275 &trans_done, timeout * HZ / 1000);
276 if (timeleft <= 0) {
277 RTSX_DEBUGP("chip->int_reg = 0x%x\n", chip->int_reg);
278 err = -ETIMEDOUT;
279 TRACE_GOTO(chip, finish_send_cmd);
280 }
281
282 spin_lock_irq(&rtsx->reg_lock);
283 if (rtsx->trans_result == TRANS_RESULT_FAIL)
284 err = -EIO;
285 else if (rtsx->trans_result == TRANS_RESULT_OK)
286 err = 0;
287
288 spin_unlock_irq(&rtsx->reg_lock);
289
290finish_send_cmd:
291 rtsx->done = NULL;
292 rtsx->trans_state = STATE_TRANS_NONE;
293
294 if (err < 0)
295 rtsx_stop_cmd(chip, card);
296
297 return err;
298}
299
300static inline void rtsx_add_sg_tbl(
301 struct rtsx_chip *chip, u32 addr, u32 len, u8 option)
302{
303 u64 *sgb = (u64 *)(chip->host_sg_tbl_ptr);
304 u64 val = 0;
305 u32 temp_len = 0;
306 u8 temp_opt = 0;
307
308 do {
309 if (len > 0x80000) {
310 temp_len = 0x80000;
311 temp_opt = option & (~SG_END);
312 } else {
313 temp_len = len;
314 temp_opt = option;
315 }
316 val = ((u64)addr << 32) | ((u64)temp_len << 12) | temp_opt;
317
318 if (chip->sgi < (HOST_SG_TBL_BUF_LEN / 8))
319 sgb[(chip->sgi)++] = cpu_to_le64(val);
320
321 len -= temp_len;
322 addr += temp_len;
323 } while (len);
324}
325
326static int rtsx_transfer_sglist_adma_partial(struct rtsx_chip *chip, u8 card,
327 struct scatterlist *sg, int num_sg, unsigned int *index,
328 unsigned int *offset, int size,
329 enum dma_data_direction dma_dir, int timeout)
330{
331 struct rtsx_dev *rtsx = chip->rtsx;
332 struct completion trans_done;
333 u8 dir;
334 int sg_cnt, i, resid;
335 int err = 0;
336 long timeleft;
337 struct scatterlist *sg_ptr;
338 u32 val = TRIG_DMA;
339
340 if ((sg == NULL) || (num_sg <= 0) || !offset || !index)
341 return -EIO;
342
343 if (dma_dir == DMA_TO_DEVICE)
344 dir = HOST_TO_DEVICE;
345 else if (dma_dir == DMA_FROM_DEVICE)
346 dir = DEVICE_TO_HOST;
347 else
348 return -ENXIO;
349
350 if (card == SD_CARD)
351 rtsx->check_card_cd = SD_EXIST;
352 else if (card == MS_CARD)
353 rtsx->check_card_cd = MS_EXIST;
354 else if (card == XD_CARD)
355 rtsx->check_card_cd = XD_EXIST;
356 else
357 rtsx->check_card_cd = 0;
358
359 spin_lock_irq(&rtsx->reg_lock);
360
361 /* set up data structures for the wakeup system */
362 rtsx->done = &trans_done;
363
364 rtsx->trans_state = STATE_TRANS_SG;
365 rtsx->trans_result = TRANS_NOT_READY;
366
367 spin_unlock_irq(&rtsx->reg_lock);
368
369 sg_cnt = dma_map_sg(&(rtsx->pci->dev), sg, num_sg, dma_dir);
370
371 resid = size;
372 sg_ptr = sg;
373 chip->sgi = 0;
374 /* Usually the next entry will be @sg@ + 1, but if this sg element
375 * is part of a chained scatterlist, it could jump to the start of
376 * a new scatterlist array. So here we use sg_next to move to
377 * the proper sg
378 */
379 for (i = 0; i < *index; i++)
380 sg_ptr = sg_next(sg_ptr);
381 for (i = *index; i < sg_cnt; i++) {
382 dma_addr_t addr;
383 unsigned int len;
384 u8 option;
385
386 addr = sg_dma_address(sg_ptr);
387 len = sg_dma_len(sg_ptr);
388
389 RTSX_DEBUGP("DMA addr: 0x%x, Len: 0x%x\n",
390 (unsigned int)addr, len);
391 RTSX_DEBUGP("*index = %d, *offset = %d\n", *index, *offset);
392
393 addr += *offset;
394
395 if ((len - *offset) > resid) {
396 *offset += resid;
397 len = resid;
398 resid = 0;
399 } else {
400 resid -= (len - *offset);
401 len -= *offset;
402 *offset = 0;
403 *index = *index + 1;
404 }
405 if ((i == (sg_cnt - 1)) || !resid)
406 option = SG_VALID | SG_END | SG_TRANS_DATA;
407 else
408 option = SG_VALID | SG_TRANS_DATA;
409
410 rtsx_add_sg_tbl(chip, (u32)addr, (u32)len, option);
411
412 if (!resid)
413 break;
414
415 sg_ptr = sg_next(sg_ptr);
416 }
417
418 RTSX_DEBUGP("SG table count = %d\n", chip->sgi);
419
420 val |= (u32)(dir & 0x01) << 29;
421 val |= ADMA_MODE;
422
423 spin_lock_irq(&rtsx->reg_lock);
424
425 init_completion(&trans_done);
426
427 rtsx_writel(chip, RTSX_HDBAR, chip->host_sg_tbl_addr);
428 rtsx_writel(chip, RTSX_HDBCTLR, val);
429
430 spin_unlock_irq(&rtsx->reg_lock);
431
432 timeleft = wait_for_completion_interruptible_timeout(
433 &trans_done, timeout * HZ / 1000);
434 if (timeleft <= 0) {
435 RTSX_DEBUGP("Timeout (%s %d)\n", __func__, __LINE__);
436 RTSX_DEBUGP("chip->int_reg = 0x%x\n", chip->int_reg);
437 err = -ETIMEDOUT;
438 goto out;
439 }
440
441 spin_lock_irq(&rtsx->reg_lock);
442 if (rtsx->trans_result == TRANS_RESULT_FAIL) {
443 err = -EIO;
444 spin_unlock_irq(&rtsx->reg_lock);
445 goto out;
446 }
447 spin_unlock_irq(&rtsx->reg_lock);
448
449 /* Wait for TRANS_OK_INT */
450 spin_lock_irq(&rtsx->reg_lock);
451 if (rtsx->trans_result == TRANS_NOT_READY) {
452 init_completion(&trans_done);
453 spin_unlock_irq(&rtsx->reg_lock);
454 timeleft = wait_for_completion_interruptible_timeout(
455 &trans_done, timeout * HZ / 1000);
456 if (timeleft <= 0) {
457 RTSX_DEBUGP("Timeout (%s %d)\n", __func__, __LINE__);
458 RTSX_DEBUGP("chip->int_reg = 0x%x\n", chip->int_reg);
459 err = -ETIMEDOUT;
460 goto out;
461 }
462 } else {
463 spin_unlock_irq(&rtsx->reg_lock);
464 }
465
466 spin_lock_irq(&rtsx->reg_lock);
467 if (rtsx->trans_result == TRANS_RESULT_FAIL)
468 err = -EIO;
469 else if (rtsx->trans_result == TRANS_RESULT_OK)
470 err = 0;
471
472 spin_unlock_irq(&rtsx->reg_lock);
473
474out:
475 rtsx->done = NULL;
476 rtsx->trans_state = STATE_TRANS_NONE;
477 dma_unmap_sg(&(rtsx->pci->dev), sg, num_sg, dma_dir);
478
479 if (err < 0)
480 rtsx_stop_cmd(chip, card);
481
482 return err;
483}
484
485static int rtsx_transfer_sglist_adma(struct rtsx_chip *chip, u8 card,
486 struct scatterlist *sg, int num_sg,
487 enum dma_data_direction dma_dir, int timeout)
488{
489 struct rtsx_dev *rtsx = chip->rtsx;
490 struct completion trans_done;
491 u8 dir;
492 int buf_cnt, i;
493 int err = 0;
494 long timeleft;
495 struct scatterlist *sg_ptr;
496
497 if ((sg == NULL) || (num_sg <= 0))
498 return -EIO;
499
500 if (dma_dir == DMA_TO_DEVICE)
501 dir = HOST_TO_DEVICE;
502 else if (dma_dir == DMA_FROM_DEVICE)
503 dir = DEVICE_TO_HOST;
504 else
505 return -ENXIO;
506
507 if (card == SD_CARD)
508 rtsx->check_card_cd = SD_EXIST;
509 else if (card == MS_CARD)
510 rtsx->check_card_cd = MS_EXIST;
511 else if (card == XD_CARD)
512 rtsx->check_card_cd = XD_EXIST;
513 else
514 rtsx->check_card_cd = 0;
515
516 spin_lock_irq(&rtsx->reg_lock);
517
518 /* set up data structures for the wakeup system */
519 rtsx->done = &trans_done;
520
521 rtsx->trans_state = STATE_TRANS_SG;
522 rtsx->trans_result = TRANS_NOT_READY;
523
524 spin_unlock_irq(&rtsx->reg_lock);
525
526 buf_cnt = dma_map_sg(&(rtsx->pci->dev), sg, num_sg, dma_dir);
527
528 sg_ptr = sg;
529
530 for (i = 0; i <= buf_cnt / (HOST_SG_TBL_BUF_LEN / 8); i++) {
531 u32 val = TRIG_DMA;
532 int sg_cnt, j;
533
534 if (i == buf_cnt / (HOST_SG_TBL_BUF_LEN / 8))
535 sg_cnt = buf_cnt % (HOST_SG_TBL_BUF_LEN / 8);
536 else
537 sg_cnt = (HOST_SG_TBL_BUF_LEN / 8);
538
539 chip->sgi = 0;
540 for (j = 0; j < sg_cnt; j++) {
541 dma_addr_t addr = sg_dma_address(sg_ptr);
542 unsigned int len = sg_dma_len(sg_ptr);
543 u8 option;
544
545 RTSX_DEBUGP("DMA addr: 0x%x, Len: 0x%x\n",
546 (unsigned int)addr, len);
547
548 if (j == (sg_cnt - 1))
549 option = SG_VALID | SG_END | SG_TRANS_DATA;
550 else
551 option = SG_VALID | SG_TRANS_DATA;
552
553 rtsx_add_sg_tbl(chip, (u32)addr, (u32)len, option);
554
555 sg_ptr = sg_next(sg_ptr);
556 }
557
558 RTSX_DEBUGP("SG table count = %d\n", chip->sgi);
559
560 val |= (u32)(dir & 0x01) << 29;
561 val |= ADMA_MODE;
562
563 spin_lock_irq(&rtsx->reg_lock);
564
565 init_completion(&trans_done);
566
567 rtsx_writel(chip, RTSX_HDBAR, chip->host_sg_tbl_addr);
568 rtsx_writel(chip, RTSX_HDBCTLR, val);
569
570 spin_unlock_irq(&rtsx->reg_lock);
571
572 timeleft = wait_for_completion_interruptible_timeout(
573 &trans_done, timeout * HZ / 1000);
574 if (timeleft <= 0) {
575 RTSX_DEBUGP("Timeout (%s %d)\n", __func__, __LINE__);
576 RTSX_DEBUGP("chip->int_reg = 0x%x\n", chip->int_reg);
577 err = -ETIMEDOUT;
578 goto out;
579 }
580
581 spin_lock_irq(&rtsx->reg_lock);
582 if (rtsx->trans_result == TRANS_RESULT_FAIL) {
583 err = -EIO;
584 spin_unlock_irq(&rtsx->reg_lock);
585 goto out;
586 }
587 spin_unlock_irq(&rtsx->reg_lock);
588
589 sg_ptr += sg_cnt;
590 }
591
592 /* Wait for TRANS_OK_INT */
593 spin_lock_irq(&rtsx->reg_lock);
594 if (rtsx->trans_result == TRANS_NOT_READY) {
595 init_completion(&trans_done);
596 spin_unlock_irq(&rtsx->reg_lock);
597 timeleft = wait_for_completion_interruptible_timeout(
598 &trans_done, timeout * HZ / 1000);
599 if (timeleft <= 0) {
600 RTSX_DEBUGP("Timeout (%s %d)\n", __func__, __LINE__);
601 RTSX_DEBUGP("chip->int_reg = 0x%x\n", chip->int_reg);
602 err = -ETIMEDOUT;
603 goto out;
604 }
605 } else {
606 spin_unlock_irq(&rtsx->reg_lock);
607 }
608
609 spin_lock_irq(&rtsx->reg_lock);
610 if (rtsx->trans_result == TRANS_RESULT_FAIL)
611 err = -EIO;
612 else if (rtsx->trans_result == TRANS_RESULT_OK)
613 err = 0;
614
615 spin_unlock_irq(&rtsx->reg_lock);
616
617out:
618 rtsx->done = NULL;
619 rtsx->trans_state = STATE_TRANS_NONE;
620 dma_unmap_sg(&(rtsx->pci->dev), sg, num_sg, dma_dir);
621
622 if (err < 0)
623 rtsx_stop_cmd(chip, card);
624
625 return err;
626}
627
628static int rtsx_transfer_buf(struct rtsx_chip *chip, u8 card, void *buf, size_t len,
629 enum dma_data_direction dma_dir, int timeout)
630{
631 struct rtsx_dev *rtsx = chip->rtsx;
632 struct completion trans_done;
633 dma_addr_t addr;
634 u8 dir;
635 int err = 0;
636 u32 val = (1 << 31);
637 long timeleft;
638
639 if ((buf == NULL) || (len <= 0))
640 return -EIO;
641
642 if (dma_dir == DMA_TO_DEVICE)
643 dir = HOST_TO_DEVICE;
644 else if (dma_dir == DMA_FROM_DEVICE)
645 dir = DEVICE_TO_HOST;
646 else
647 return -ENXIO;
648
649 addr = dma_map_single(&(rtsx->pci->dev), buf, len, dma_dir);
650 if (!addr)
651 return -ENOMEM;
652
653 if (card == SD_CARD)
654 rtsx->check_card_cd = SD_EXIST;
655 else if (card == MS_CARD)
656 rtsx->check_card_cd = MS_EXIST;
657 else if (card == XD_CARD)
658 rtsx->check_card_cd = XD_EXIST;
659 else
660 rtsx->check_card_cd = 0;
661
662 val |= (u32)(dir & 0x01) << 29;
663 val |= (u32)(len & 0x00FFFFFF);
664
665 spin_lock_irq(&rtsx->reg_lock);
666
667 /* set up data structures for the wakeup system */
668 rtsx->done = &trans_done;
669
670 init_completion(&trans_done);
671
672 rtsx->trans_state = STATE_TRANS_BUF;
673 rtsx->trans_result = TRANS_NOT_READY;
674
675 rtsx_writel(chip, RTSX_HDBAR, addr);
676 rtsx_writel(chip, RTSX_HDBCTLR, val);
677
678 spin_unlock_irq(&rtsx->reg_lock);
679
680 /* Wait for TRANS_OK_INT */
681 timeleft = wait_for_completion_interruptible_timeout(
682 &trans_done, timeout * HZ / 1000);
683 if (timeleft <= 0) {
684 RTSX_DEBUGP("Timeout (%s %d)\n", __func__, __LINE__);
685 RTSX_DEBUGP("chip->int_reg = 0x%x\n", chip->int_reg);
686 err = -ETIMEDOUT;
687 goto out;
688 }
689
690 spin_lock_irq(&rtsx->reg_lock);
691 if (rtsx->trans_result == TRANS_RESULT_FAIL)
692 err = -EIO;
693 else if (rtsx->trans_result == TRANS_RESULT_OK)
694 err = 0;
695
696 spin_unlock_irq(&rtsx->reg_lock);
697
698out:
699 rtsx->done = NULL;
700 rtsx->trans_state = STATE_TRANS_NONE;
701 dma_unmap_single(&(rtsx->pci->dev), addr, len, dma_dir);
702
703 if (err < 0)
704 rtsx_stop_cmd(chip, card);
705
706 return err;
707}
708
709int rtsx_transfer_data_partial(struct rtsx_chip *chip, u8 card,
710 void *buf, size_t len, int use_sg, unsigned int *index,
711 unsigned int *offset, enum dma_data_direction dma_dir,
712 int timeout)
713{
714 int err = 0;
715
716 /* don't transfer data during abort processing */
717 if (rtsx_chk_stat(chip, RTSX_STAT_ABORT))
718 return -EIO;
719
720 if (use_sg) {
721 err = rtsx_transfer_sglist_adma_partial(chip, card,
722 (struct scatterlist *)buf, use_sg,
723 index, offset, (int)len, dma_dir, timeout);
724 } else {
725 err = rtsx_transfer_buf(chip, card,
726 buf, len, dma_dir, timeout);
727 }
728
729 if (err < 0) {
730 if (RTSX_TST_DELINK(chip)) {
731 RTSX_CLR_DELINK(chip);
732 chip->need_reinit = SD_CARD | MS_CARD | XD_CARD;
733 rtsx_reinit_cards(chip, 1);
734 }
735 }
736
737 return err;
738}
739
740int rtsx_transfer_data(struct rtsx_chip *chip, u8 card, void *buf, size_t len,
741 int use_sg, enum dma_data_direction dma_dir, int timeout)
742{
743 int err = 0;
744
745 RTSX_DEBUGP("use_sg = %d\n", use_sg);
746
747 /* don't transfer data during abort processing */
748 if (rtsx_chk_stat(chip, RTSX_STAT_ABORT))
749 return -EIO;
750
751 if (use_sg) {
752 err = rtsx_transfer_sglist_adma(chip, card,
753 (struct scatterlist *)buf,
754 use_sg, dma_dir, timeout);
755 } else {
756 err = rtsx_transfer_buf(chip, card, buf, len, dma_dir, timeout);
757 }
758
759 if (err < 0) {
760 if (RTSX_TST_DELINK(chip)) {
761 RTSX_CLR_DELINK(chip);
762 chip->need_reinit = SD_CARD | MS_CARD | XD_CARD;
763 rtsx_reinit_cards(chip, 1);
764 }
765 }
766
767 return err;
768}
769
diff --git a/drivers/staging/rts_pstor/rtsx_transport.h b/drivers/staging/rts_pstor/rtsx_transport.h
deleted file mode 100644
index 41f1ea05a8d3..000000000000
--- a/drivers/staging/rts_pstor/rtsx_transport.h
+++ /dev/null
@@ -1,66 +0,0 @@
1/* Driver for Realtek PCI-Express card reader
2 * Header file
3 *
4 * Copyright(c) 2009 Realtek Semiconductor Corp. All rights reserved.
5 *
6 * This program is free software; you can redistribute it and/or modify it
7 * under the terms of the GNU General Public License as published by the
8 * Free Software Foundation; either version 2, or (at your option) any
9 * later version.
10 *
11 * This program is distributed in the hope that it will be useful, but
12 * WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
14 * General Public License for more details.
15 *
16 * You should have received a copy of the GNU General Public License along
17 * with this program; if not, see <http://www.gnu.org/licenses/>.
18 *
19 * Author:
20 * wwang (wei_wang@realsil.com.cn)
21 * No. 450, Shenhu Road, Suzhou Industry Park, Suzhou, China
22 */
23
24#ifndef __REALTEK_RTSX_TRANSPORT_H
25#define __REALTEK_RTSX_TRANSPORT_H
26
27#include "rtsx.h"
28#include "rtsx_chip.h"
29
30#define WAIT_TIME 2000
31
32unsigned int rtsx_stor_access_xfer_buf(unsigned char *buffer,
33 unsigned int buflen, struct scsi_cmnd *srb, unsigned int *index,
34 unsigned int *offset, enum xfer_buf_dir dir);
35void rtsx_stor_set_xfer_buf(unsigned char *buffer,
36 unsigned int buflen, struct scsi_cmnd *srb);
37void rtsx_stor_get_xfer_buf(unsigned char *buffer,
38 unsigned int buflen, struct scsi_cmnd *srb);
39void rtsx_invoke_transport(struct scsi_cmnd *srb, struct rtsx_chip *chip);
40
41
42#define rtsx_init_cmd(chip) ((chip)->ci = 0)
43
44void rtsx_add_cmd(struct rtsx_chip *chip,
45 u8 cmd_type, u16 reg_addr, u8 mask, u8 data);
46void rtsx_send_cmd_no_wait(struct rtsx_chip *chip);
47int rtsx_send_cmd(struct rtsx_chip *chip, u8 card, int timeout);
48
49extern inline u8 *rtsx_get_cmd_data(struct rtsx_chip *chip)
50{
51#ifdef CMD_USING_SG
52 return (u8 *)(chip->host_sg_tbl_ptr);
53#else
54 return (u8 *)(chip->host_cmds_ptr);
55#endif
56}
57
58int rtsx_transfer_data(struct rtsx_chip *chip, u8 card, void *buf, size_t len,
59 int use_sg, enum dma_data_direction dma_dir, int timeout);
60
61int rtsx_transfer_data_partial(struct rtsx_chip *chip, u8 card, void *buf, size_t len,
62 int use_sg, unsigned int *index, unsigned int *offset,
63 enum dma_data_direction dma_dir, int timeout);
64
65#endif /* __REALTEK_RTSX_TRANSPORT_H */
66
diff --git a/drivers/staging/rts_pstor/sd.c b/drivers/staging/rts_pstor/sd.c
deleted file mode 100644
index c6a581c47cbc..000000000000
--- a/drivers/staging/rts_pstor/sd.c
+++ /dev/null
@@ -1,4570 +0,0 @@
1/* Driver for Realtek PCI-Express card reader
2 *
3 * Copyright(c) 2009 Realtek Semiconductor Corp. All rights reserved.
4 *
5 * This program is free software; you can redistribute it and/or modify it
6 * under the terms of the GNU General Public License as published by the
7 * Free Software Foundation; either version 2, or (at your option) any
8 * later version.
9 *
10 * This program is distributed in the hope that it will be useful, but
11 * WITHOUT ANY WARRANTY; without even the implied warranty of
12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
13 * General Public License for more details.
14 *
15 * You should have received a copy of the GNU General Public License along
16 * with this program; if not, see <http://www.gnu.org/licenses/>.
17 *
18 * Author:
19 * wwang (wei_wang@realsil.com.cn)
20 * No. 450, Shenhu Road, Suzhou Industry Park, Suzhou, China
21 */
22
23#include <linux/blkdev.h>
24#include <linux/kthread.h>
25#include <linux/sched.h>
26
27#include "rtsx.h"
28#include "rtsx_transport.h"
29#include "rtsx_scsi.h"
30#include "rtsx_card.h"
31#include "sd.h"
32
33#define SD_MAX_RETRY_COUNT 3
34
35static u16 REG_SD_CFG1;
36static u16 REG_SD_CFG2;
37static u16 REG_SD_CFG3;
38static u16 REG_SD_STAT1;
39static u16 REG_SD_STAT2;
40static u16 REG_SD_BUS_STAT;
41static u16 REG_SD_PAD_CTL;
42static u16 REG_SD_SAMPLE_POINT_CTL;
43static u16 REG_SD_PUSH_POINT_CTL;
44static u16 REG_SD_CMD0;
45static u16 REG_SD_CMD1;
46static u16 REG_SD_CMD2;
47static u16 REG_SD_CMD3;
48static u16 REG_SD_CMD4;
49static u16 REG_SD_CMD5;
50static u16 REG_SD_BYTE_CNT_L;
51static u16 REG_SD_BYTE_CNT_H;
52static u16 REG_SD_BLOCK_CNT_L;
53static u16 REG_SD_BLOCK_CNT_H;
54static u16 REG_SD_TRANSFER;
55static u16 REG_SD_VPCLK0_CTL;
56static u16 REG_SD_VPCLK1_CTL;
57static u16 REG_SD_DCMPS0_CTL;
58static u16 REG_SD_DCMPS1_CTL;
59
60static inline void sd_set_err_code(struct rtsx_chip *chip, u8 err_code)
61{
62 struct sd_info *sd_card = &(chip->sd_card);
63
64 sd_card->err_code |= err_code;
65}
66
67static inline void sd_clr_err_code(struct rtsx_chip *chip)
68{
69 struct sd_info *sd_card = &(chip->sd_card);
70
71 sd_card->err_code = 0;
72}
73
74static inline int sd_check_err_code(struct rtsx_chip *chip, u8 err_code)
75{
76 struct sd_info *sd_card = &(chip->sd_card);
77
78 return sd_card->err_code & err_code;
79}
80
81static void sd_init_reg_addr(struct rtsx_chip *chip)
82{
83 if (CHECK_PID(chip, 0x5209)) {
84 REG_SD_CFG1 = SD_CFG1;
85 REG_SD_CFG2 = SD_CFG2;
86 REG_SD_CFG3 = SD_CFG3;
87 REG_SD_STAT1 = SD_STAT1;
88 REG_SD_STAT2 = SD_STAT2;
89 REG_SD_BUS_STAT = SD_BUS_STAT;
90 REG_SD_PAD_CTL = SD_PAD_CTL;
91 REG_SD_SAMPLE_POINT_CTL = SD_SAMPLE_POINT_CTL;
92 REG_SD_PUSH_POINT_CTL = SD_PUSH_POINT_CTL;
93 REG_SD_CMD0 = SD_CMD0;
94 REG_SD_CMD1 = SD_CMD1;
95 REG_SD_CMD2 = SD_CMD2;
96 REG_SD_CMD3 = SD_CMD3;
97 REG_SD_CMD4 = SD_CMD4;
98 REG_SD_CMD5 = SD_CMD5;
99 REG_SD_BYTE_CNT_L = SD_BYTE_CNT_L;
100 REG_SD_BYTE_CNT_H = SD_BYTE_CNT_H;
101 REG_SD_BLOCK_CNT_L = SD_BLOCK_CNT_L;
102 REG_SD_BLOCK_CNT_H = SD_BLOCK_CNT_H;
103 REG_SD_TRANSFER = SD_TRANSFER;
104 REG_SD_VPCLK0_CTL = SD_VPCLK0_CTL;
105 REG_SD_VPCLK1_CTL = SD_VPCLK1_CTL;
106 REG_SD_DCMPS0_CTL = SD_DCMPS0_CTL;
107 REG_SD_DCMPS1_CTL = SD_DCMPS1_CTL;
108 } else {
109 REG_SD_CFG1 = 0xFD31;
110 REG_SD_CFG2 = 0xFD33;
111 REG_SD_CFG3 = 0xFD3E;
112 REG_SD_STAT1 = 0xFD30;
113 REG_SD_STAT2 = 0;
114 REG_SD_BUS_STAT = 0;
115 REG_SD_PAD_CTL = 0;
116 REG_SD_SAMPLE_POINT_CTL = 0;
117 REG_SD_PUSH_POINT_CTL = 0;
118 REG_SD_CMD0 = 0xFD34;
119 REG_SD_CMD1 = 0xFD35;
120 REG_SD_CMD2 = 0xFD36;
121 REG_SD_CMD3 = 0xFD37;
122 REG_SD_CMD4 = 0xFD38;
123 REG_SD_CMD5 = 0xFD5A;
124 REG_SD_BYTE_CNT_L = 0xFD39;
125 REG_SD_BYTE_CNT_H = 0xFD3A;
126 REG_SD_BLOCK_CNT_L = 0xFD3B;
127 REG_SD_BLOCK_CNT_H = 0xFD3C;
128 REG_SD_TRANSFER = 0xFD32;
129 REG_SD_VPCLK0_CTL = 0;
130 REG_SD_VPCLK1_CTL = 0;
131 REG_SD_DCMPS0_CTL = 0;
132 REG_SD_DCMPS1_CTL = 0;
133 }
134}
135
136static int sd_check_data0_status(struct rtsx_chip *chip)
137{
138 u8 stat;
139
140 if (CHECK_PID(chip, 0x5209))
141 RTSX_READ_REG(chip, REG_SD_BUS_STAT, &stat);
142 else
143 RTSX_READ_REG(chip, REG_SD_STAT1, &stat);
144
145 if (!(stat & SD_DAT0_STATUS)) {
146 sd_set_err_code(chip, SD_BUSY);
147 TRACE_RET(chip, STATUS_FAIL);
148 }
149
150 return STATUS_SUCCESS;
151}
152
153static int sd_send_cmd_get_rsp(struct rtsx_chip *chip, u8 cmd_idx,
154 u32 arg, u8 rsp_type, u8 *rsp, int rsp_len)
155{
156 struct sd_info *sd_card = &(chip->sd_card);
157 int retval;
158 int timeout = 100;
159 u16 reg_addr;
160 u8 *ptr;
161 int stat_idx = 0;
162 int rty_cnt = 0;
163
164 sd_clr_err_code(chip);
165
166 RTSX_DEBUGP("SD/MMC CMD %d, arg = 0x%08x\n", cmd_idx, arg);
167
168 if (rsp_type == SD_RSP_TYPE_R1b)
169 timeout = 3000;
170
171RTY_SEND_CMD:
172
173 rtsx_init_cmd(chip);
174
175 rtsx_add_cmd(chip, WRITE_REG_CMD, REG_SD_CMD0, 0xFF, 0x40 | cmd_idx);
176 rtsx_add_cmd(chip, WRITE_REG_CMD, REG_SD_CMD1, 0xFF, (u8)(arg >> 24));
177 rtsx_add_cmd(chip, WRITE_REG_CMD, REG_SD_CMD2, 0xFF, (u8)(arg >> 16));
178 rtsx_add_cmd(chip, WRITE_REG_CMD, REG_SD_CMD3, 0xFF, (u8)(arg >> 8));
179 rtsx_add_cmd(chip, WRITE_REG_CMD, REG_SD_CMD4, 0xFF, (u8)arg);
180
181 rtsx_add_cmd(chip, WRITE_REG_CMD, REG_SD_CFG2, 0xFF, rsp_type);
182 rtsx_add_cmd(chip, WRITE_REG_CMD, CARD_DATA_SOURCE,
183 0x01, PINGPONG_BUFFER);
184 rtsx_add_cmd(chip, WRITE_REG_CMD, REG_SD_TRANSFER,
185 0xFF, SD_TM_CMD_RSP | SD_TRANSFER_START);
186 rtsx_add_cmd(chip, CHECK_REG_CMD, REG_SD_TRANSFER,
187 SD_TRANSFER_END | SD_STAT_IDLE, SD_TRANSFER_END | SD_STAT_IDLE);
188
189 if (rsp_type == SD_RSP_TYPE_R2) {
190 for (reg_addr = PPBUF_BASE2; reg_addr < PPBUF_BASE2 + 16; reg_addr++)
191 rtsx_add_cmd(chip, READ_REG_CMD, reg_addr, 0, 0);
192
193 stat_idx = 16;
194 } else if (rsp_type != SD_RSP_TYPE_R0) {
195 for (reg_addr = REG_SD_CMD0; reg_addr <= REG_SD_CMD4; reg_addr++)
196 rtsx_add_cmd(chip, READ_REG_CMD, reg_addr, 0, 0);
197
198 stat_idx = 5;
199 }
200
201 rtsx_add_cmd(chip, READ_REG_CMD, REG_SD_STAT1, 0, 0);
202
203 retval = rtsx_send_cmd(chip, SD_CARD, timeout);
204 if (retval < 0) {
205 u8 val;
206
207 rtsx_read_register(chip, REG_SD_STAT1, &val);
208 RTSX_DEBUGP("SD_STAT1: 0x%x\n", val);
209
210 if (CHECK_PID(chip, 0x5209)) {
211 rtsx_read_register(chip, REG_SD_STAT2, &val);
212 RTSX_DEBUGP("SD_STAT2: 0x%x\n", val);
213
214 if (val & SD_RSP_80CLK_TIMEOUT) {
215 rtsx_clear_sd_error(chip);
216 sd_set_err_code(chip, SD_RSP_TIMEOUT);
217 TRACE_RET(chip, STATUS_FAIL);
218 }
219
220 rtsx_read_register(chip, REG_SD_BUS_STAT, &val);
221 RTSX_DEBUGP("SD_BUS_STAT: 0x%x\n", val);
222 } else {
223 rtsx_read_register(chip, REG_SD_CFG3, &val);
224 RTSX_DEBUGP("SD_CFG3: 0x%x\n", val);
225 }
226
227 if (retval == -ETIMEDOUT) {
228 if (rsp_type & SD_WAIT_BUSY_END) {
229 retval = sd_check_data0_status(chip);
230 if (retval != STATUS_SUCCESS) {
231 rtsx_clear_sd_error(chip);
232 TRACE_RET(chip, retval);
233 }
234 } else {
235 sd_set_err_code(chip, SD_TO_ERR);
236 }
237 retval = STATUS_TIMEDOUT;
238 } else {
239 retval = STATUS_FAIL;
240 }
241 rtsx_clear_sd_error(chip);
242
243 TRACE_RET(chip, retval);
244 }
245
246 if (rsp_type == SD_RSP_TYPE_R0)
247 return STATUS_SUCCESS;
248
249 ptr = rtsx_get_cmd_data(chip) + 1;
250
251 if ((ptr[0] & 0xC0) != 0) {
252 sd_set_err_code(chip, SD_STS_ERR);
253 TRACE_RET(chip, STATUS_FAIL);
254 }
255
256 if (!(rsp_type & SD_NO_CHECK_CRC7)) {
257 if (ptr[stat_idx] & SD_CRC7_ERR) {
258 if (cmd_idx == WRITE_MULTIPLE_BLOCK) {
259 sd_set_err_code(chip, SD_CRC_ERR);
260 TRACE_RET(chip, STATUS_FAIL);
261 }
262 if (rty_cnt < SD_MAX_RETRY_COUNT) {
263 wait_timeout(20);
264 rty_cnt++;
265 goto RTY_SEND_CMD;
266 } else {
267 sd_set_err_code(chip, SD_CRC_ERR);
268 TRACE_RET(chip, STATUS_FAIL);
269 }
270 }
271 }
272
273 if ((rsp_type == SD_RSP_TYPE_R1) || (rsp_type == SD_RSP_TYPE_R1b)) {
274 if ((cmd_idx != SEND_RELATIVE_ADDR) && (cmd_idx != SEND_IF_COND)) {
275 if (cmd_idx != STOP_TRANSMISSION) {
276 if (ptr[1] & 0x80)
277 TRACE_RET(chip, STATUS_FAIL);
278 }
279#ifdef SUPPORT_SD_LOCK
280 if (ptr[1] & 0x7D)
281#else
282 if (ptr[1] & 0x7F)
283#endif
284 {
285 RTSX_DEBUGP("ptr[1]: 0x%02x\n", ptr[1]);
286 TRACE_RET(chip, STATUS_FAIL);
287 }
288 if (ptr[2] & 0xFF) {
289 RTSX_DEBUGP("ptr[2]: 0x%02x\n", ptr[2]);
290 TRACE_RET(chip, STATUS_FAIL);
291 }
292 if (ptr[3] & 0x80) {
293 RTSX_DEBUGP("ptr[3]: 0x%02x\n", ptr[3]);
294 TRACE_RET(chip, STATUS_FAIL);
295 }
296 if (ptr[3] & 0x01)
297 sd_card->sd_data_buf_ready = 1;
298 else
299 sd_card->sd_data_buf_ready = 0;
300 }
301 }
302
303 if (rsp && rsp_len)
304 memcpy(rsp, ptr, rsp_len);
305
306 return STATUS_SUCCESS;
307}
308
309static int sd_read_data(struct rtsx_chip *chip,
310 u8 trans_mode, u8 *cmd, int cmd_len, u16 byte_cnt,
311 u16 blk_cnt, u8 bus_width, u8 *buf, int buf_len,
312 int timeout)
313{
314 struct sd_info *sd_card = &(chip->sd_card);
315 int retval;
316 int i;
317
318 sd_clr_err_code(chip);
319
320 if (!buf)
321 buf_len = 0;
322
323 if (buf_len > 512)
324 TRACE_RET(chip, STATUS_FAIL);
325
326 rtsx_init_cmd(chip);
327
328 if (cmd_len) {
329 RTSX_DEBUGP("SD/MMC CMD %d\n", cmd[0] - 0x40);
330 for (i = 0; i < (cmd_len < 6 ? cmd_len : 6); i++)
331 rtsx_add_cmd(chip, WRITE_REG_CMD, REG_SD_CMD0 + i, 0xFF, cmd[i]);
332 }
333 rtsx_add_cmd(chip, WRITE_REG_CMD, REG_SD_BYTE_CNT_L, 0xFF, (u8)byte_cnt);
334 rtsx_add_cmd(chip, WRITE_REG_CMD, REG_SD_BYTE_CNT_H, 0xFF, (u8)(byte_cnt >> 8));
335 rtsx_add_cmd(chip, WRITE_REG_CMD, REG_SD_BLOCK_CNT_L, 0xFF, (u8)blk_cnt);
336 rtsx_add_cmd(chip, WRITE_REG_CMD, REG_SD_BLOCK_CNT_H, 0xFF, (u8)(blk_cnt >> 8));
337
338 rtsx_add_cmd(chip, WRITE_REG_CMD, REG_SD_CFG1, 0x03, bus_width);
339
340 rtsx_add_cmd(chip, WRITE_REG_CMD, REG_SD_CFG2, 0xFF,
341 SD_CALCULATE_CRC7 | SD_CHECK_CRC16 | SD_NO_WAIT_BUSY_END |
342 SD_CHECK_CRC7 | SD_RSP_LEN_6);
343 if (trans_mode != SD_TM_AUTO_TUNING)
344 rtsx_add_cmd(chip, WRITE_REG_CMD, CARD_DATA_SOURCE, 0x01, PINGPONG_BUFFER);
345
346 rtsx_add_cmd(chip, WRITE_REG_CMD, REG_SD_TRANSFER, 0xFF, trans_mode | SD_TRANSFER_START);
347 rtsx_add_cmd(chip, CHECK_REG_CMD, REG_SD_TRANSFER, SD_TRANSFER_END, SD_TRANSFER_END);
348
349 retval = rtsx_send_cmd(chip, SD_CARD, timeout);
350 if (retval < 0) {
351 if (retval == -ETIMEDOUT) {
352 sd_send_cmd_get_rsp(chip, SEND_STATUS, sd_card->sd_addr,
353 SD_RSP_TYPE_R1, NULL, 0);
354 }
355
356 TRACE_RET(chip, STATUS_FAIL);
357 }
358
359 if (buf && buf_len) {
360 retval = rtsx_read_ppbuf(chip, buf, buf_len);
361 if (retval != STATUS_SUCCESS)
362 TRACE_RET(chip, STATUS_FAIL);
363 }
364
365 return STATUS_SUCCESS;
366}
367
368static int sd_write_data(struct rtsx_chip *chip, u8 trans_mode,
369 u8 *cmd, int cmd_len, u16 byte_cnt, u16 blk_cnt, u8 bus_width,
370 u8 *buf, int buf_len, int timeout)
371{
372 struct sd_info *sd_card = &(chip->sd_card);
373 int retval;
374 int i;
375
376 sd_clr_err_code(chip);
377
378 if (!buf)
379 buf_len = 0;
380
381 if (buf_len > 512) {
382 /* This function can't write data more than one page */
383 TRACE_RET(chip, STATUS_FAIL);
384 }
385
386 if (buf && buf_len) {
387 retval = rtsx_write_ppbuf(chip, buf, buf_len);
388 if (retval != STATUS_SUCCESS)
389 TRACE_RET(chip, STATUS_FAIL);
390 }
391
392 rtsx_init_cmd(chip);
393
394 if (cmd_len) {
395 RTSX_DEBUGP("SD/MMC CMD %d\n", cmd[0] - 0x40);
396 for (i = 0; i < (cmd_len < 6 ? cmd_len : 6); i++) {
397 rtsx_add_cmd(chip, WRITE_REG_CMD,
398 REG_SD_CMD0 + i, 0xFF, cmd[i]);
399 }
400 }
401 rtsx_add_cmd(chip, WRITE_REG_CMD, REG_SD_BYTE_CNT_L, 0xFF, (u8)byte_cnt);
402 rtsx_add_cmd(chip, WRITE_REG_CMD, REG_SD_BYTE_CNT_H, 0xFF, (u8)(byte_cnt >> 8));
403 rtsx_add_cmd(chip, WRITE_REG_CMD, REG_SD_BLOCK_CNT_L, 0xFF, (u8)blk_cnt);
404 rtsx_add_cmd(chip, WRITE_REG_CMD, REG_SD_BLOCK_CNT_H, 0xFF, (u8)(blk_cnt >> 8));
405
406 rtsx_add_cmd(chip, WRITE_REG_CMD, REG_SD_CFG1, 0x03, bus_width);
407
408 rtsx_add_cmd(chip, WRITE_REG_CMD, REG_SD_CFG2, 0xFF,
409 SD_CALCULATE_CRC7 | SD_CHECK_CRC16 | SD_NO_WAIT_BUSY_END |
410 SD_CHECK_CRC7 | SD_RSP_LEN_6);
411
412 rtsx_add_cmd(chip, WRITE_REG_CMD, REG_SD_TRANSFER, 0xFF, trans_mode | SD_TRANSFER_START);
413 rtsx_add_cmd(chip, CHECK_REG_CMD, REG_SD_TRANSFER, SD_TRANSFER_END, SD_TRANSFER_END);
414
415 retval = rtsx_send_cmd(chip, SD_CARD, timeout);
416 if (retval < 0) {
417 if (retval == -ETIMEDOUT) {
418 sd_send_cmd_get_rsp(chip, SEND_STATUS,
419 sd_card->sd_addr, SD_RSP_TYPE_R1, NULL, 0);
420 }
421
422 TRACE_RET(chip, STATUS_FAIL);
423 }
424
425 return STATUS_SUCCESS;
426}
427
428static int sd_check_csd(struct rtsx_chip *chip, char check_wp)
429{
430 struct sd_info *sd_card = &(chip->sd_card);
431 int retval;
432 int i;
433 u8 csd_ver, trans_speed;
434 u8 rsp[16];
435
436 for (i = 0; i < 6; i++) {
437 if (detect_card_cd(chip, SD_CARD) != STATUS_SUCCESS) {
438 sd_set_err_code(chip, SD_NO_CARD);
439 TRACE_RET(chip, STATUS_FAIL);
440 }
441
442 retval = sd_send_cmd_get_rsp(chip, SEND_CSD, sd_card->sd_addr, SD_RSP_TYPE_R2, rsp, 16);
443 if (retval == STATUS_SUCCESS)
444 break;
445 }
446
447 if (i == 6)
448 TRACE_RET(chip, STATUS_FAIL);
449
450 memcpy(sd_card->raw_csd, rsp + 1, 15);
451
452 if (CHECK_PID(chip, 0x5209))
453 RTSX_READ_REG(chip, REG_SD_CMD5, sd_card->raw_csd + 15);
454
455 RTSX_DEBUGP("CSD Response:\n");
456 RTSX_DUMP(sd_card->raw_csd, 16);
457
458 csd_ver = (rsp[1] & 0xc0) >> 6;
459 RTSX_DEBUGP("csd_ver = %d\n", csd_ver);
460
461 trans_speed = rsp[4];
462 if ((trans_speed & 0x07) == 0x02) {
463 if ((trans_speed & 0xf8) >= 0x30) {
464 if (chip->asic_code)
465 sd_card->sd_clock = 47;
466 else
467 sd_card->sd_clock = CLK_50;
468
469 } else if ((trans_speed & 0xf8) == 0x28) {
470 if (chip->asic_code)
471 sd_card->sd_clock = 39;
472 else
473 sd_card->sd_clock = CLK_40;
474
475 } else if ((trans_speed & 0xf8) == 0x20) {
476 if (chip->asic_code)
477 sd_card->sd_clock = 29;
478 else
479 sd_card->sd_clock = CLK_30;
480
481 } else if ((trans_speed & 0xf8) >= 0x10) {
482 if (chip->asic_code)
483 sd_card->sd_clock = 23;
484 else
485 sd_card->sd_clock = CLK_20;
486
487 } else if ((trans_speed & 0x08) >= 0x08) {
488 if (chip->asic_code)
489 sd_card->sd_clock = 19;
490 else
491 sd_card->sd_clock = CLK_20;
492 } else {
493 TRACE_RET(chip, STATUS_FAIL);
494 }
495 } else {
496 TRACE_RET(chip, STATUS_FAIL);
497 }
498
499 if (CHK_MMC_SECTOR_MODE(sd_card)) {
500 sd_card->capacity = 0;
501 } else {
502 if ((!CHK_SD_HCXC(sd_card)) || (csd_ver == 0)) {
503 u8 blk_size, c_size_mult;
504 u16 c_size;
505 blk_size = rsp[6] & 0x0F;
506 c_size = ((u16)(rsp[7] & 0x03) << 10)
507 + ((u16)rsp[8] << 2)
508 + ((u16)(rsp[9] & 0xC0) >> 6);
509 c_size_mult = (u8)((rsp[10] & 0x03) << 1);
510 c_size_mult += (rsp[11] & 0x80) >> 7;
511 sd_card->capacity = (((u32)(c_size + 1)) * (1 << (c_size_mult + 2))) << (blk_size - 9);
512 } else {
513 u32 total_sector = 0;
514 total_sector = (((u32)rsp[8] & 0x3f) << 16) |
515 ((u32)rsp[9] << 8) | (u32)rsp[10];
516 sd_card->capacity = (total_sector + 1) << 10;
517 }
518 }
519
520 if (check_wp) {
521 if (rsp[15] & 0x30)
522 chip->card_wp |= SD_CARD;
523
524 RTSX_DEBUGP("CSD WP Status: 0x%x\n", rsp[15]);
525 }
526
527 return STATUS_SUCCESS;
528}
529
530static int sd_set_sample_push_timing(struct rtsx_chip *chip)
531{
532 struct sd_info *sd_card = &(chip->sd_card);
533
534 if (CHECK_PID(chip, 0x5209)) {
535 if (CHK_SD_SDR104(sd_card) || CHK_SD_SDR50(sd_card)) {
536 RTSX_WRITE_REG(chip, SD_CFG1, 0x0C | SD_ASYNC_FIFO_NOT_RST,
537 SD_30_MODE | SD_ASYNC_FIFO_NOT_RST);
538 RTSX_WRITE_REG(chip, CLK_CTL, CLK_LOW_FREQ, CLK_LOW_FREQ);
539 RTSX_WRITE_REG(chip, CARD_CLK_SOURCE, 0xFF,
540 CRC_VAR_CLK0 | SD30_FIX_CLK | SAMPLE_VAR_CLK1);
541 RTSX_WRITE_REG(chip, CLK_CTL, CLK_LOW_FREQ, 0);
542 } else if (CHK_SD_DDR50(sd_card) || CHK_MMC_DDR52(sd_card)) {
543 RTSX_WRITE_REG(chip, SD_CFG1, 0x0C | SD_ASYNC_FIFO_NOT_RST,
544 SD_DDR_MODE | SD_ASYNC_FIFO_NOT_RST);
545 RTSX_WRITE_REG(chip, CLK_CTL, CLK_LOW_FREQ, CLK_LOW_FREQ);
546 RTSX_WRITE_REG(chip, CARD_CLK_SOURCE, 0xFF,
547 CRC_VAR_CLK0 | SD30_FIX_CLK | SAMPLE_VAR_CLK1);
548 RTSX_WRITE_REG(chip, CLK_CTL, CLK_LOW_FREQ, 0);
549 RTSX_WRITE_REG(chip, SD_PUSH_POINT_CTL, DDR_VAR_TX_CMD_DAT,
550 DDR_VAR_TX_CMD_DAT);
551 RTSX_WRITE_REG(chip, SD_SAMPLE_POINT_CTL, DDR_VAR_RX_DAT | DDR_VAR_RX_CMD,
552 DDR_VAR_RX_DAT | DDR_VAR_RX_CMD);
553 } else {
554 u8 val = 0;
555
556 RTSX_WRITE_REG(chip, SD_CFG1, 0x0C, SD_20_MODE);
557 RTSX_WRITE_REG(chip, CLK_CTL, CLK_LOW_FREQ, CLK_LOW_FREQ);
558 RTSX_WRITE_REG(chip, CARD_CLK_SOURCE, 0xFF,
559 CRC_FIX_CLK | SD30_VAR_CLK0 | SAMPLE_VAR_CLK1);
560 RTSX_WRITE_REG(chip, CLK_CTL, CLK_LOW_FREQ, 0);
561
562 if ((chip->sd_ctl & SD_PUSH_POINT_CTL_MASK) == SD_PUSH_POINT_AUTO)
563 val = SD20_TX_NEG_EDGE;
564 else if ((chip->sd_ctl & SD_PUSH_POINT_CTL_MASK) == SD_PUSH_POINT_DELAY)
565 val = SD20_TX_14_AHEAD;
566 else
567 val = SD20_TX_NEG_EDGE;
568
569 RTSX_WRITE_REG(chip, SD_PUSH_POINT_CTL, SD20_TX_SEL_MASK, val);
570
571 if ((chip->sd_ctl & SD_SAMPLE_POINT_CTL_MASK) == SD_SAMPLE_POINT_AUTO) {
572 if (chip->asic_code) {
573 if (CHK_SD_HS(sd_card) || CHK_MMC_52M(sd_card))
574 val = SD20_RX_14_DELAY;
575 else
576 val = SD20_RX_POS_EDGE;
577 } else {
578 val = SD20_RX_14_DELAY;
579 }
580 } else if ((chip->sd_ctl & SD_SAMPLE_POINT_CTL_MASK) == SD_SAMPLE_POINT_DELAY) {
581 val = SD20_RX_14_DELAY;
582 } else {
583 val = SD20_RX_POS_EDGE;
584 }
585 RTSX_WRITE_REG(chip, SD_SAMPLE_POINT_CTL, SD20_RX_SEL_MASK, val);
586 }
587 } else {
588 u8 val = 0;
589
590 if ((chip->sd_ctl & SD_PUSH_POINT_CTL_MASK) == SD_PUSH_POINT_DELAY)
591 val |= 0x10;
592
593 if ((chip->sd_ctl & SD_SAMPLE_POINT_CTL_MASK) == SD_SAMPLE_POINT_AUTO) {
594 if (chip->asic_code) {
595 if (CHK_SD_HS(sd_card) || CHK_MMC_52M(sd_card)) {
596 if (val & 0x10)
597 val |= 0x04;
598 else
599 val |= 0x08;
600 }
601 } else {
602 if (val & 0x10)
603 val |= 0x04;
604 else
605 val |= 0x08;
606 }
607 } else if ((chip->sd_ctl & SD_SAMPLE_POINT_CTL_MASK) == SD_SAMPLE_POINT_DELAY) {
608 if (val & 0x10)
609 val |= 0x04;
610 else
611 val |= 0x08;
612 }
613
614 RTSX_WRITE_REG(chip, REG_SD_CFG1, 0x1C, val);
615 }
616
617 return STATUS_SUCCESS;
618}
619
620static void sd_choose_proper_clock(struct rtsx_chip *chip)
621{
622 struct sd_info *sd_card = &(chip->sd_card);
623
624 if (CHK_SD_SDR104(sd_card)) {
625 if (chip->asic_code)
626 sd_card->sd_clock = chip->asic_sd_sdr104_clk;
627 else
628 sd_card->sd_clock = chip->fpga_sd_sdr104_clk;
629
630 } else if (CHK_SD_DDR50(sd_card)) {
631 if (chip->asic_code)
632 sd_card->sd_clock = chip->asic_sd_ddr50_clk;
633 else
634 sd_card->sd_clock = chip->fpga_sd_ddr50_clk;
635
636 } else if (CHK_SD_SDR50(sd_card)) {
637 if (chip->asic_code)
638 sd_card->sd_clock = chip->asic_sd_sdr50_clk;
639 else
640 sd_card->sd_clock = chip->fpga_sd_sdr50_clk;
641
642 } else if (CHK_SD_HS(sd_card)) {
643 if (chip->asic_code)
644 sd_card->sd_clock = chip->asic_sd_hs_clk;
645 else
646 sd_card->sd_clock = chip->fpga_sd_hs_clk;
647
648 } else if (CHK_MMC_52M(sd_card) || CHK_MMC_DDR52(sd_card)) {
649 if (chip->asic_code)
650 sd_card->sd_clock = chip->asic_mmc_52m_clk;
651 else
652 sd_card->sd_clock = chip->fpga_mmc_52m_clk;
653
654 } else if (CHK_MMC_26M(sd_card)) {
655 if (chip->asic_code)
656 sd_card->sd_clock = 48;
657 else
658 sd_card->sd_clock = CLK_50;
659 }
660}
661
662static int sd_set_clock_divider(struct rtsx_chip *chip, u8 clk_div)
663{
664 u8 mask = 0, val = 0;
665
666 if (CHECK_PID(chip, 0x5209)) {
667 mask = SD_CLK_DIVIDE_MASK;
668 val = clk_div;
669 } else {
670 mask = 0x60;
671 if (clk_div == SD_CLK_DIVIDE_0)
672 val = 0x00;
673 else if (clk_div == SD_CLK_DIVIDE_128)
674 val = 0x40;
675 else if (clk_div == SD_CLK_DIVIDE_256)
676 val = 0x20;
677 }
678
679 RTSX_WRITE_REG(chip, REG_SD_CFG1, mask, val);
680
681 return STATUS_SUCCESS;
682}
683
684static int sd_set_init_para(struct rtsx_chip *chip)
685{
686 struct sd_info *sd_card = &(chip->sd_card);
687 int retval;
688
689 retval = sd_set_sample_push_timing(chip);
690 if (retval != STATUS_SUCCESS)
691 TRACE_RET(chip, STATUS_FAIL);
692
693 sd_choose_proper_clock(chip);
694
695 retval = switch_clock(chip, sd_card->sd_clock);
696 if (retval != STATUS_SUCCESS)
697 TRACE_RET(chip, STATUS_FAIL);
698
699 return STATUS_SUCCESS;
700}
701
702int sd_select_card(struct rtsx_chip *chip, int select)
703{
704 struct sd_info *sd_card = &(chip->sd_card);
705 int retval;
706 u8 cmd_idx, cmd_type;
707 u32 addr;
708
709 if (select) {
710 cmd_idx = SELECT_CARD;
711 cmd_type = SD_RSP_TYPE_R1;
712 addr = sd_card->sd_addr;
713 } else {
714 cmd_idx = DESELECT_CARD;
715 cmd_type = SD_RSP_TYPE_R0;
716 addr = 0;
717 }
718
719 retval = sd_send_cmd_get_rsp(chip, cmd_idx, addr, cmd_type, NULL, 0);
720 if (retval != STATUS_SUCCESS)
721 TRACE_RET(chip, STATUS_FAIL);
722
723 return STATUS_SUCCESS;
724}
725
726#ifdef SUPPORT_SD_LOCK
727static int sd_update_lock_status(struct rtsx_chip *chip)
728{
729 struct sd_info *sd_card = &(chip->sd_card);
730 int retval;
731 u8 rsp[5];
732
733 retval = sd_send_cmd_get_rsp(chip, SEND_STATUS, sd_card->sd_addr, SD_RSP_TYPE_R1, rsp, 5);
734 if (retval != STATUS_SUCCESS)
735 TRACE_RET(chip, STATUS_FAIL);
736
737 if (rsp[1] & 0x02)
738 sd_card->sd_lock_status |= SD_LOCKED;
739 else
740 sd_card->sd_lock_status &= ~SD_LOCKED;
741
742 RTSX_DEBUGP("sd_card->sd_lock_status = 0x%x\n", sd_card->sd_lock_status);
743
744 if (rsp[1] & 0x01)
745 TRACE_RET(chip, STATUS_FAIL);
746
747 return STATUS_SUCCESS;
748}
749#endif
750
751static int sd_wait_state_data_ready(struct rtsx_chip *chip, u8 state, u8 data_ready, int polling_cnt)
752{
753 struct sd_info *sd_card = &(chip->sd_card);
754 int retval, i;
755 u8 rsp[5];
756
757 for (i = 0; i < polling_cnt; i++) {
758 retval = sd_send_cmd_get_rsp(chip, SEND_STATUS,
759 sd_card->sd_addr, SD_RSP_TYPE_R1, rsp, 5);
760 if (retval != STATUS_SUCCESS)
761 TRACE_RET(chip, STATUS_FAIL);
762
763 if (((rsp[3] & 0x1E) == state) && ((rsp[3] & 0x01) == data_ready))
764 return STATUS_SUCCESS;
765 }
766
767 TRACE_RET(chip, STATUS_FAIL);
768}
769
770static int sd_change_bank_voltage(struct rtsx_chip *chip, u8 voltage)
771{
772 int retval;
773
774 if (voltage == SD_IO_3V3) {
775 if (chip->asic_code) {
776 retval = rtsx_write_phy_register(chip, 0x08, 0x4FC0 | chip->phy_voltage);
777 if (retval != STATUS_SUCCESS)
778 TRACE_RET(chip, STATUS_FAIL);
779 } else {
780 RTSX_WRITE_REG(chip, SD_PAD_CTL, SD_IO_USING_1V8, 0);
781 }
782 } else if (voltage == SD_IO_1V8) {
783 if (chip->asic_code) {
784 retval = rtsx_write_phy_register(chip, 0x08, 0x4C40 | chip->phy_voltage);
785 if (retval != STATUS_SUCCESS)
786 TRACE_RET(chip, STATUS_FAIL);
787 } else {
788 RTSX_WRITE_REG(chip, SD_PAD_CTL, SD_IO_USING_1V8, SD_IO_USING_1V8);
789 }
790 } else {
791 TRACE_RET(chip, STATUS_FAIL);
792 }
793
794 return STATUS_SUCCESS;
795}
796
797static int sd_voltage_switch(struct rtsx_chip *chip)
798{
799 int retval;
800 u8 stat;
801
802 RTSX_WRITE_REG(chip, SD_BUS_STAT, SD_CLK_TOGGLE_EN | SD_CLK_FORCE_STOP, SD_CLK_TOGGLE_EN);
803
804 retval = sd_send_cmd_get_rsp(chip, VOLTAGE_SWITCH, 0, SD_RSP_TYPE_R1, NULL, 0);
805 if (retval != STATUS_SUCCESS)
806 TRACE_RET(chip, STATUS_FAIL);
807
808 udelay(chip->sd_voltage_switch_delay);
809
810 RTSX_READ_REG(chip, SD_BUS_STAT, &stat);
811 if (stat & (SD_CMD_STATUS | SD_DAT3_STATUS | SD_DAT2_STATUS |
812 SD_DAT1_STATUS | SD_DAT0_STATUS)) {
813 TRACE_RET(chip, STATUS_FAIL);
814 }
815
816 RTSX_WRITE_REG(chip, SD_BUS_STAT, 0xFF, SD_CLK_FORCE_STOP);
817 retval = sd_change_bank_voltage(chip, SD_IO_1V8);
818 if (retval != STATUS_SUCCESS)
819 TRACE_RET(chip, STATUS_FAIL);
820
821 wait_timeout(50);
822
823 RTSX_WRITE_REG(chip, SD_BUS_STAT, 0xFF, SD_CLK_TOGGLE_EN);
824 wait_timeout(10);
825
826 RTSX_READ_REG(chip, SD_BUS_STAT, &stat);
827 if ((stat & (SD_CMD_STATUS | SD_DAT3_STATUS | SD_DAT2_STATUS |
828 SD_DAT1_STATUS | SD_DAT0_STATUS)) !=
829 (SD_CMD_STATUS | SD_DAT3_STATUS | SD_DAT2_STATUS |
830 SD_DAT1_STATUS | SD_DAT0_STATUS)) {
831 RTSX_DEBUGP("SD_BUS_STAT: 0x%x\n", stat);
832 rtsx_write_register(chip, SD_BUS_STAT, SD_CLK_TOGGLE_EN | SD_CLK_FORCE_STOP, 0);
833 rtsx_write_register(chip, CARD_CLK_EN, 0xFF, 0);
834 TRACE_RET(chip, STATUS_FAIL);
835 }
836
837 RTSX_WRITE_REG(chip, SD_BUS_STAT, SD_CLK_TOGGLE_EN | SD_CLK_FORCE_STOP, 0);
838
839 return STATUS_SUCCESS;
840}
841
842static int sd_reset_dcm(struct rtsx_chip *chip, u8 tune_dir)
843{
844 if (tune_dir == TUNE_RX) {
845 RTSX_WRITE_REG(chip, DCM_DRP_CTL, 0xFF, DCM_RESET | DCM_RX);
846 RTSX_WRITE_REG(chip, DCM_DRP_CTL, 0xFF, DCM_RX);
847 } else {
848 RTSX_WRITE_REG(chip, DCM_DRP_CTL, 0xFF, DCM_RESET | DCM_TX);
849 RTSX_WRITE_REG(chip, DCM_DRP_CTL, 0xFF, DCM_TX);
850 }
851
852 return STATUS_SUCCESS;
853}
854
855static int sd_change_phase(struct rtsx_chip *chip, u8 sample_point, u8 tune_dir)
856{
857 struct sd_info *sd_card = &(chip->sd_card);
858 u16 SD_VP_CTL, SD_DCMPS_CTL;
859 u8 val;
860 int retval;
861 int ddr_rx = 0;
862
863 RTSX_DEBUGP("sd_change_phase (sample_point = %d, tune_dir = %d)\n",
864 sample_point, tune_dir);
865
866 if (tune_dir == TUNE_RX) {
867 SD_VP_CTL = SD_VPRX_CTL;
868 SD_DCMPS_CTL = SD_DCMPS_RX_CTL;
869 if (CHK_SD_DDR50(sd_card))
870 ddr_rx = 1;
871 } else {
872 SD_VP_CTL = SD_VPTX_CTL;
873 SD_DCMPS_CTL = SD_DCMPS_TX_CTL;
874 }
875
876 if (chip->asic_code) {
877 RTSX_WRITE_REG(chip, CLK_CTL, CHANGE_CLK, CHANGE_CLK);
878 RTSX_WRITE_REG(chip, SD_VP_CTL, 0x1F, sample_point);
879 RTSX_WRITE_REG(chip, SD_VPCLK0_CTL, PHASE_NOT_RESET, 0);
880 RTSX_WRITE_REG(chip, SD_VPCLK0_CTL, PHASE_NOT_RESET, PHASE_NOT_RESET);
881 RTSX_WRITE_REG(chip, CLK_CTL, CHANGE_CLK, 0);
882 } else {
883#ifdef CONFIG_RTS_PSTOR_DEBUG
884 rtsx_read_register(chip, SD_VP_CTL, &val);
885 RTSX_DEBUGP("SD_VP_CTL: 0x%x\n", val);
886 rtsx_read_register(chip, SD_DCMPS_CTL, &val);
887 RTSX_DEBUGP("SD_DCMPS_CTL: 0x%x\n", val);
888#endif
889
890 if (ddr_rx) {
891 RTSX_WRITE_REG(chip, SD_VP_CTL, PHASE_CHANGE, PHASE_CHANGE);
892 udelay(50);
893 RTSX_WRITE_REG(chip, SD_VP_CTL, 0xFF,
894 PHASE_CHANGE | PHASE_NOT_RESET | sample_point);
895 } else {
896 RTSX_WRITE_REG(chip, CLK_CTL, CHANGE_CLK, CHANGE_CLK);
897 udelay(50);
898 RTSX_WRITE_REG(chip, SD_VP_CTL, 0xFF,
899 PHASE_NOT_RESET | sample_point);
900 }
901 udelay(100);
902
903 rtsx_init_cmd(chip);
904 rtsx_add_cmd(chip, WRITE_REG_CMD, SD_DCMPS_CTL, DCMPS_CHANGE, DCMPS_CHANGE);
905 rtsx_add_cmd(chip, CHECK_REG_CMD, SD_DCMPS_CTL, DCMPS_CHANGE_DONE, DCMPS_CHANGE_DONE);
906 retval = rtsx_send_cmd(chip, SD_CARD, 100);
907 if (retval != STATUS_SUCCESS)
908 TRACE_GOTO(chip, Fail);
909
910 val = *rtsx_get_cmd_data(chip);
911 if (val & DCMPS_ERROR)
912 TRACE_GOTO(chip, Fail);
913
914 if ((val & DCMPS_CURRENT_PHASE) != sample_point)
915 TRACE_GOTO(chip, Fail);
916
917 RTSX_WRITE_REG(chip, SD_DCMPS_CTL, DCMPS_CHANGE, 0);
918 if (ddr_rx)
919 RTSX_WRITE_REG(chip, SD_VP_CTL, PHASE_CHANGE, 0);
920 else
921 RTSX_WRITE_REG(chip, CLK_CTL, CHANGE_CLK, 0);
922
923 udelay(50);
924 }
925
926 RTSX_WRITE_REG(chip, SD_CFG1, SD_ASYNC_FIFO_NOT_RST, 0);
927
928 return STATUS_SUCCESS;
929
930Fail:
931#ifdef CONFIG_RTS_PSTOR_DEBUG
932 rtsx_read_register(chip, SD_VP_CTL, &val);
933 RTSX_DEBUGP("SD_VP_CTL: 0x%x\n", val);
934 rtsx_read_register(chip, SD_DCMPS_CTL, &val);
935 RTSX_DEBUGP("SD_DCMPS_CTL: 0x%x\n", val);
936#endif
937
938 rtsx_write_register(chip, SD_DCMPS_CTL, DCMPS_CHANGE, 0);
939 rtsx_write_register(chip, SD_VP_CTL, PHASE_CHANGE, 0);
940 wait_timeout(10);
941 sd_reset_dcm(chip, tune_dir);
942 return STATUS_FAIL;
943}
944
945static int sd_check_spec(struct rtsx_chip *chip, u8 bus_width)
946{
947 struct sd_info *sd_card = &(chip->sd_card);
948 int retval;
949 u8 cmd[5], buf[8];
950
951 retval = sd_send_cmd_get_rsp(chip, APP_CMD, sd_card->sd_addr, SD_RSP_TYPE_R1, NULL, 0);
952 if (retval != STATUS_SUCCESS)
953 TRACE_RET(chip, STATUS_FAIL);
954
955 cmd[0] = 0x40 | SEND_SCR;
956 cmd[1] = 0;
957 cmd[2] = 0;
958 cmd[3] = 0;
959 cmd[4] = 0;
960
961 retval = sd_read_data(chip, SD_TM_NORMAL_READ, cmd, 5, 8, 1, bus_width, buf, 8, 250);
962 if (retval != STATUS_SUCCESS) {
963 rtsx_clear_sd_error(chip);
964 TRACE_RET(chip, STATUS_FAIL);
965 }
966
967 memcpy(sd_card->raw_scr, buf, 8);
968
969 if ((buf[0] & 0x0F) == 0)
970 TRACE_RET(chip, STATUS_FAIL);
971
972 return STATUS_SUCCESS;
973}
974
975static int sd_query_switch_result(struct rtsx_chip *chip, u8 func_group, u8 func_to_switch,
976 u8 *buf, int buf_len)
977{
978 u8 support_mask = 0, query_switch = 0, switch_busy = 0;
979 int support_offset = 0, query_switch_offset = 0, check_busy_offset = 0;
980
981 if (func_group == SD_FUNC_GROUP_1) {
982 support_offset = FUNCTION_GROUP1_SUPPORT_OFFSET;
983 query_switch_offset = FUNCTION_GROUP1_QUERY_SWITCH_OFFSET;
984 check_busy_offset = FUNCTION_GROUP1_CHECK_BUSY_OFFSET;
985
986 switch (func_to_switch) {
987 case HS_SUPPORT:
988 support_mask = HS_SUPPORT_MASK;
989 query_switch = HS_QUERY_SWITCH_OK;
990 switch_busy = HS_SWITCH_BUSY;
991 break;
992
993 case SDR50_SUPPORT:
994 support_mask = SDR50_SUPPORT_MASK;
995 query_switch = SDR50_QUERY_SWITCH_OK;
996 switch_busy = SDR50_SWITCH_BUSY;
997 break;
998
999 case SDR104_SUPPORT:
1000 support_mask = SDR104_SUPPORT_MASK;
1001 query_switch = SDR104_QUERY_SWITCH_OK;
1002 switch_busy = SDR104_SWITCH_BUSY;
1003 break;
1004
1005 case DDR50_SUPPORT:
1006 support_mask = DDR50_SUPPORT_MASK;
1007 query_switch = DDR50_QUERY_SWITCH_OK;
1008 switch_busy = DDR50_SWITCH_BUSY;
1009 break;
1010
1011 default:
1012 TRACE_RET(chip, STATUS_FAIL);
1013 }
1014 } else if (func_group == SD_FUNC_GROUP_3) {
1015 support_offset = FUNCTION_GROUP3_SUPPORT_OFFSET;
1016 query_switch_offset = FUNCTION_GROUP3_QUERY_SWITCH_OFFSET;
1017 check_busy_offset = FUNCTION_GROUP3_CHECK_BUSY_OFFSET;
1018
1019 switch (func_to_switch) {
1020 case DRIVING_TYPE_A:
1021 support_mask = DRIVING_TYPE_A_MASK;
1022 query_switch = TYPE_A_QUERY_SWITCH_OK;
1023 switch_busy = TYPE_A_SWITCH_BUSY;
1024 break;
1025
1026 case DRIVING_TYPE_C:
1027 support_mask = DRIVING_TYPE_C_MASK;
1028 query_switch = TYPE_C_QUERY_SWITCH_OK;
1029 switch_busy = TYPE_C_SWITCH_BUSY;
1030 break;
1031
1032 case DRIVING_TYPE_D:
1033 support_mask = DRIVING_TYPE_D_MASK;
1034 query_switch = TYPE_D_QUERY_SWITCH_OK;
1035 switch_busy = TYPE_D_SWITCH_BUSY;
1036 break;
1037
1038 default:
1039 TRACE_RET(chip, STATUS_FAIL);
1040 }
1041 } else if (func_group == SD_FUNC_GROUP_4) {
1042 support_offset = FUNCTION_GROUP4_SUPPORT_OFFSET;
1043 query_switch_offset = FUNCTION_GROUP4_QUERY_SWITCH_OFFSET;
1044 check_busy_offset = FUNCTION_GROUP4_CHECK_BUSY_OFFSET;
1045
1046 switch (func_to_switch) {
1047 case CURRENT_LIMIT_400:
1048 support_mask = CURRENT_LIMIT_400_MASK;
1049 query_switch = CURRENT_LIMIT_400_QUERY_SWITCH_OK;
1050 switch_busy = CURRENT_LIMIT_400_SWITCH_BUSY;
1051 break;
1052
1053 case CURRENT_LIMIT_600:
1054 support_mask = CURRENT_LIMIT_600_MASK;
1055 query_switch = CURRENT_LIMIT_600_QUERY_SWITCH_OK;
1056 switch_busy = CURRENT_LIMIT_600_SWITCH_BUSY;
1057 break;
1058
1059 case CURRENT_LIMIT_800:
1060 support_mask = CURRENT_LIMIT_800_MASK;
1061 query_switch = CURRENT_LIMIT_800_QUERY_SWITCH_OK;
1062 switch_busy = CURRENT_LIMIT_800_SWITCH_BUSY;
1063 break;
1064
1065 default:
1066 TRACE_RET(chip, STATUS_FAIL);
1067 }
1068 } else {
1069 TRACE_RET(chip, STATUS_FAIL);
1070 }
1071
1072 if (func_group == SD_FUNC_GROUP_1) {
1073 if (!(buf[support_offset] & support_mask) ||
1074 ((buf[query_switch_offset] & 0x0F) != query_switch)) {
1075 TRACE_RET(chip, STATUS_FAIL);
1076 }
1077 }
1078
1079 /* Check 'Busy Status' */
1080 if ((buf[DATA_STRUCTURE_VER_OFFSET] == 0x01) &&
1081 ((buf[check_busy_offset] & switch_busy) == switch_busy)) {
1082 TRACE_RET(chip, STATUS_FAIL);
1083 }
1084
1085 return STATUS_SUCCESS;
1086}
1087
1088static int sd_check_switch_mode(struct rtsx_chip *chip, u8 mode,
1089 u8 func_group, u8 func_to_switch, u8 bus_width)
1090{
1091 struct sd_info *sd_card = &(chip->sd_card);
1092 int retval;
1093 u8 cmd[5], buf[64];
1094
1095 RTSX_DEBUGP("sd_check_switch_mode (mode = %d, func_group = %d, func_to_switch = %d)\n",
1096 mode, func_group, func_to_switch);
1097
1098 cmd[0] = 0x40 | SWITCH;
1099 cmd[1] = mode;
1100
1101 if (func_group == SD_FUNC_GROUP_1) {
1102 cmd[2] = 0xFF;
1103 cmd[3] = 0xFF;
1104 cmd[4] = 0xF0 + func_to_switch;
1105 } else if (func_group == SD_FUNC_GROUP_3) {
1106 cmd[2] = 0xFF;
1107 cmd[3] = 0xF0 + func_to_switch;
1108 cmd[4] = 0xFF;
1109 } else if (func_group == SD_FUNC_GROUP_4) {
1110 cmd[2] = 0xFF;
1111 cmd[3] = 0x0F + (func_to_switch << 4);
1112 cmd[4] = 0xFF;
1113 } else {
1114 cmd[1] = SD_CHECK_MODE;
1115 cmd[2] = 0xFF;
1116 cmd[3] = 0xFF;
1117 cmd[4] = 0xFF;
1118 }
1119
1120 retval = sd_read_data(chip, SD_TM_NORMAL_READ, cmd, 5, 64, 1, bus_width, buf, 64, 250);
1121 if (retval != STATUS_SUCCESS) {
1122 rtsx_clear_sd_error(chip);
1123 TRACE_RET(chip, STATUS_FAIL);
1124 }
1125
1126 RTSX_DUMP(buf, 64);
1127
1128 if (func_group == NO_ARGUMENT) {
1129 sd_card->func_group1_mask = buf[0x0D];
1130 sd_card->func_group2_mask = buf[0x0B];
1131 sd_card->func_group3_mask = buf[0x09];
1132 sd_card->func_group4_mask = buf[0x07];
1133
1134 RTSX_DEBUGP("func_group1_mask = 0x%02x\n", buf[0x0D]);
1135 RTSX_DEBUGP("func_group2_mask = 0x%02x\n", buf[0x0B]);
1136 RTSX_DEBUGP("func_group3_mask = 0x%02x\n", buf[0x09]);
1137 RTSX_DEBUGP("func_group4_mask = 0x%02x\n", buf[0x07]);
1138 } else {
1139 /* Maximum current consumption, check whether current is acceptable;
1140 * bit[511:496] = 0x0000 means some error happened.
1141 */
1142 u16 cc = ((u16)buf[0] << 8) | buf[1];
1143 RTSX_DEBUGP("Maximum current consumption: %dmA\n", cc);
1144 if ((cc == 0) || (cc > 800))
1145 TRACE_RET(chip, STATUS_FAIL);
1146
1147 retval = sd_query_switch_result(chip, func_group, func_to_switch, buf, 64);
1148 if (retval != STATUS_SUCCESS)
1149 TRACE_RET(chip, STATUS_FAIL);
1150
1151 if ((cc > 400) || (func_to_switch > CURRENT_LIMIT_400)) {
1152 RTSX_WRITE_REG(chip, OCPPARA2, SD_OCP_THD_MASK, chip->sd_800mA_ocp_thd);
1153 RTSX_WRITE_REG(chip, CARD_PWR_CTL, PMOS_STRG_MASK, PMOS_STRG_800mA);
1154 }
1155 }
1156
1157 return STATUS_SUCCESS;
1158}
1159
1160static u8 downgrade_switch_mode(u8 func_group, u8 func_to_switch)
1161{
1162 if (func_group == SD_FUNC_GROUP_1) {
1163 if (func_to_switch > HS_SUPPORT)
1164 func_to_switch--;
1165
1166 } else if (func_group == SD_FUNC_GROUP_4) {
1167 if (func_to_switch > CURRENT_LIMIT_200)
1168 func_to_switch--;
1169 }
1170
1171 return func_to_switch;
1172}
1173
1174static int sd_check_switch(struct rtsx_chip *chip,
1175 u8 func_group, u8 func_to_switch, u8 bus_width)
1176{
1177 int retval;
1178 int i;
1179 int switch_good = 0;
1180
1181 for (i = 0; i < 3; i++) {
1182 if (detect_card_cd(chip, SD_CARD) != STATUS_SUCCESS) {
1183 sd_set_err_code(chip, SD_NO_CARD);
1184 TRACE_RET(chip, STATUS_FAIL);
1185 }
1186
1187 retval = sd_check_switch_mode(chip, SD_CHECK_MODE, func_group,
1188 func_to_switch, bus_width);
1189 if (retval == STATUS_SUCCESS) {
1190 u8 stat;
1191
1192 retval = sd_check_switch_mode(chip, SD_SWITCH_MODE,
1193 func_group, func_to_switch, bus_width);
1194 if (retval == STATUS_SUCCESS) {
1195 switch_good = 1;
1196 break;
1197 }
1198
1199 RTSX_READ_REG(chip, SD_STAT1, &stat);
1200 if (stat & SD_CRC16_ERR) {
1201 RTSX_DEBUGP("SD CRC16 error when switching mode\n");
1202 TRACE_RET(chip, STATUS_FAIL);
1203 }
1204 }
1205
1206 func_to_switch = downgrade_switch_mode(func_group, func_to_switch);
1207
1208 wait_timeout(20);
1209 }
1210
1211 if (!switch_good)
1212 TRACE_RET(chip, STATUS_FAIL);
1213
1214 return STATUS_SUCCESS;
1215}
1216
1217static int sd_switch_function(struct rtsx_chip *chip, u8 bus_width)
1218{
1219 struct sd_info *sd_card = &(chip->sd_card);
1220 int retval;
1221 int i;
1222 u8 func_to_switch = 0;
1223
1224 /* Get supported functions */
1225 retval = sd_check_switch_mode(chip, SD_CHECK_MODE,
1226 NO_ARGUMENT, NO_ARGUMENT, bus_width);
1227 if (retval != STATUS_SUCCESS)
1228 TRACE_RET(chip, STATUS_FAIL);
1229
1230 sd_card->func_group1_mask &= ~(sd_card->sd_switch_fail);
1231
1232 /* Function Group 1: Access Mode */
1233 for (i = 0; i < 4; i++) {
1234 switch ((u8)(chip->sd_speed_prior >> (i*8))) {
1235 case SDR104_SUPPORT:
1236 if ((sd_card->func_group1_mask & SDR104_SUPPORT_MASK)
1237 && chip->sdr104_en) {
1238 func_to_switch = SDR104_SUPPORT;
1239 }
1240 break;
1241
1242 case DDR50_SUPPORT:
1243 if ((sd_card->func_group1_mask & DDR50_SUPPORT_MASK)
1244 && chip->ddr50_en) {
1245 func_to_switch = DDR50_SUPPORT;
1246 }
1247 break;
1248
1249 case SDR50_SUPPORT:
1250 if ((sd_card->func_group1_mask & SDR50_SUPPORT_MASK)
1251 && chip->sdr50_en) {
1252 func_to_switch = SDR50_SUPPORT;
1253 }
1254 break;
1255
1256 case HS_SUPPORT:
1257 if (sd_card->func_group1_mask & HS_SUPPORT_MASK)
1258 func_to_switch = HS_SUPPORT;
1259
1260 break;
1261
1262 default:
1263 continue;
1264 }
1265
1266
1267 if (func_to_switch)
1268 break;
1269
1270 }
1271 RTSX_DEBUGP("SD_FUNC_GROUP_1: func_to_switch = 0x%02x", func_to_switch);
1272
1273#ifdef SUPPORT_SD_LOCK
1274 if ((sd_card->sd_lock_status & SD_SDR_RST)
1275 && (DDR50_SUPPORT == func_to_switch)
1276 && (sd_card->func_group1_mask & SDR50_SUPPORT_MASK)) {
1277 func_to_switch = SDR50_SUPPORT;
1278 RTSX_DEBUGP("Using SDR50 instead of DDR50 for SD Lock\n");
1279 }
1280#endif
1281
1282 if (func_to_switch) {
1283 retval = sd_check_switch(chip, SD_FUNC_GROUP_1, func_to_switch, bus_width);
1284 if (retval != STATUS_SUCCESS) {
1285 if (func_to_switch == SDR104_SUPPORT) {
1286 sd_card->sd_switch_fail = SDR104_SUPPORT_MASK;
1287 } else if (func_to_switch == DDR50_SUPPORT) {
1288 sd_card->sd_switch_fail =
1289 SDR104_SUPPORT_MASK | DDR50_SUPPORT_MASK;
1290 } else if (func_to_switch == SDR50_SUPPORT) {
1291 sd_card->sd_switch_fail =
1292 SDR104_SUPPORT_MASK | DDR50_SUPPORT_MASK |
1293 SDR50_SUPPORT_MASK;
1294 }
1295 TRACE_RET(chip, STATUS_FAIL);
1296 }
1297
1298 if (func_to_switch == SDR104_SUPPORT)
1299 SET_SD_SDR104(sd_card);
1300 else if (func_to_switch == DDR50_SUPPORT)
1301 SET_SD_DDR50(sd_card);
1302 else if (func_to_switch == SDR50_SUPPORT)
1303 SET_SD_SDR50(sd_card);
1304 else
1305 SET_SD_HS(sd_card);
1306 }
1307
1308 if (CHK_SD_DDR50(sd_card)) {
1309 RTSX_WRITE_REG(chip, SD_PUSH_POINT_CTL, 0x06, 0x04);
1310 retval = sd_set_sample_push_timing(chip);
1311 if (retval != STATUS_SUCCESS)
1312 TRACE_RET(chip, STATUS_FAIL);
1313 }
1314
1315 if (!func_to_switch || (func_to_switch == HS_SUPPORT)) {
1316 /* Do not try to switch current limit if the card doesn't
1317 * support UHS mode or we don't want it to support UHS mode
1318 */
1319 return STATUS_SUCCESS;
1320 }
1321
1322 /* Function Group 4: Current Limit */
1323 func_to_switch = 0xFF;
1324
1325 for (i = 0; i < 4; i++) {
1326 switch ((u8)(chip->sd_current_prior >> (i*8))) {
1327 case CURRENT_LIMIT_800:
1328 if (sd_card->func_group4_mask & CURRENT_LIMIT_800_MASK)
1329 func_to_switch = CURRENT_LIMIT_800;
1330
1331 break;
1332
1333 case CURRENT_LIMIT_600:
1334 if (sd_card->func_group4_mask & CURRENT_LIMIT_600_MASK)
1335 func_to_switch = CURRENT_LIMIT_600;
1336
1337 break;
1338
1339 case CURRENT_LIMIT_400:
1340 if (sd_card->func_group4_mask & CURRENT_LIMIT_400_MASK)
1341 func_to_switch = CURRENT_LIMIT_400;
1342
1343 break;
1344
1345 case CURRENT_LIMIT_200:
1346 if (sd_card->func_group4_mask & CURRENT_LIMIT_200_MASK)
1347 func_to_switch = CURRENT_LIMIT_200;
1348
1349 break;
1350
1351 default:
1352 continue;
1353 }
1354
1355 if (func_to_switch != 0xFF)
1356 break;
1357 }
1358
1359 RTSX_DEBUGP("SD_FUNC_GROUP_4: func_to_switch = 0x%02x", func_to_switch);
1360
1361 if (func_to_switch <= CURRENT_LIMIT_800) {
1362 retval = sd_check_switch(chip, SD_FUNC_GROUP_4, func_to_switch, bus_width);
1363 if (retval != STATUS_SUCCESS) {
1364 if (sd_check_err_code(chip, SD_NO_CARD))
1365 TRACE_RET(chip, STATUS_FAIL);
1366 }
1367 RTSX_DEBUGP("Switch current limit finished! (%d)\n", retval);
1368 }
1369
1370 if (CHK_SD_DDR50(sd_card))
1371 RTSX_WRITE_REG(chip, SD_PUSH_POINT_CTL, 0x06, 0);
1372
1373 return STATUS_SUCCESS;
1374}
1375
1376static int sd_wait_data_idle(struct rtsx_chip *chip)
1377{
1378 int retval = STATUS_TIMEDOUT;
1379 int i;
1380 u8 val = 0;
1381
1382 for (i = 0; i < 100; i++) {
1383 RTSX_READ_REG(chip, SD_DATA_STATE, &val);
1384 if (val & SD_DATA_IDLE) {
1385 retval = STATUS_SUCCESS;
1386 break;
1387 }
1388 udelay(100);
1389 }
1390 RTSX_DEBUGP("SD_DATA_STATE: 0x%02x\n", val);
1391
1392 return retval;
1393}
1394
1395static int sd_sdr_tuning_rx_cmd(struct rtsx_chip *chip, u8 sample_point)
1396{
1397 int retval;
1398 u8 cmd[5];
1399
1400 retval = sd_change_phase(chip, sample_point, TUNE_RX);
1401 if (retval != STATUS_SUCCESS)
1402 TRACE_RET(chip, STATUS_FAIL);
1403
1404 cmd[0] = 0x40 | SEND_TUNING_PATTERN;
1405 cmd[1] = 0;
1406 cmd[2] = 0;
1407 cmd[3] = 0;
1408 cmd[4] = 0;
1409
1410 retval = sd_read_data(chip, SD_TM_AUTO_TUNING,
1411 cmd, 5, 0x40, 1, SD_BUS_WIDTH_4, NULL, 0, 100);
1412 if (retval != STATUS_SUCCESS) {
1413 (void)sd_wait_data_idle(chip);
1414
1415 rtsx_clear_sd_error(chip);
1416 TRACE_RET(chip, STATUS_FAIL);
1417 }
1418
1419 return STATUS_SUCCESS;
1420}
1421
1422static int sd_ddr_tuning_rx_cmd(struct rtsx_chip *chip, u8 sample_point)
1423{
1424 struct sd_info *sd_card = &(chip->sd_card);
1425 int retval;
1426 u8 cmd[5];
1427
1428 retval = sd_change_phase(chip, sample_point, TUNE_RX);
1429 if (retval != STATUS_SUCCESS)
1430 TRACE_RET(chip, STATUS_FAIL);
1431
1432 RTSX_DEBUGP("sd ddr tuning rx\n");
1433
1434 retval = sd_send_cmd_get_rsp(chip, APP_CMD, sd_card->sd_addr, SD_RSP_TYPE_R1, NULL, 0);
1435 if (retval != STATUS_SUCCESS)
1436 TRACE_RET(chip, STATUS_FAIL);
1437
1438 cmd[0] = 0x40 | SD_STATUS;
1439 cmd[1] = 0;
1440 cmd[2] = 0;
1441 cmd[3] = 0;
1442 cmd[4] = 0;
1443
1444 retval = sd_read_data(chip, SD_TM_NORMAL_READ,
1445 cmd, 5, 64, 1, SD_BUS_WIDTH_4, NULL, 0, 100);
1446 if (retval != STATUS_SUCCESS) {
1447 (void)sd_wait_data_idle(chip);
1448
1449 rtsx_clear_sd_error(chip);
1450 TRACE_RET(chip, STATUS_FAIL);
1451 }
1452
1453 return STATUS_SUCCESS;
1454}
1455
1456static int mmc_ddr_tunning_rx_cmd(struct rtsx_chip *chip, u8 sample_point)
1457{
1458 struct sd_info *sd_card = &(chip->sd_card);
1459 int retval;
1460 u8 cmd[5], bus_width;
1461
1462 if (CHK_MMC_8BIT(sd_card))
1463 bus_width = SD_BUS_WIDTH_8;
1464 else if (CHK_MMC_4BIT(sd_card))
1465 bus_width = SD_BUS_WIDTH_4;
1466 else
1467 bus_width = SD_BUS_WIDTH_1;
1468
1469 retval = sd_change_phase(chip, sample_point, TUNE_RX);
1470 if (retval != STATUS_SUCCESS)
1471 TRACE_RET(chip, STATUS_FAIL);
1472
1473 RTSX_DEBUGP("mmc ddr tuning rx\n");
1474
1475 cmd[0] = 0x40 | SEND_EXT_CSD;
1476 cmd[1] = 0;
1477 cmd[2] = 0;
1478 cmd[3] = 0;
1479 cmd[4] = 0;
1480
1481 retval = sd_read_data(chip, SD_TM_NORMAL_READ,
1482 cmd, 5, 0x200, 1, bus_width, NULL, 0, 100);
1483 if (retval != STATUS_SUCCESS) {
1484 (void)sd_wait_data_idle(chip);
1485
1486 rtsx_clear_sd_error(chip);
1487 TRACE_RET(chip, STATUS_FAIL);
1488 }
1489
1490 return STATUS_SUCCESS;
1491}
1492
1493static int sd_sdr_tuning_tx_cmd(struct rtsx_chip *chip, u8 sample_point)
1494{
1495 struct sd_info *sd_card = &(chip->sd_card);
1496 int retval;
1497
1498 retval = sd_change_phase(chip, sample_point, TUNE_TX);
1499 if (retval != STATUS_SUCCESS)
1500 TRACE_RET(chip, STATUS_FAIL);
1501
1502 RTSX_WRITE_REG(chip, SD_CFG3, SD_RSP_80CLK_TIMEOUT_EN, SD_RSP_80CLK_TIMEOUT_EN);
1503
1504 retval = sd_send_cmd_get_rsp(chip, SEND_STATUS, sd_card->sd_addr,
1505 SD_RSP_TYPE_R1, NULL, 0);
1506 if (retval != STATUS_SUCCESS) {
1507 if (sd_check_err_code(chip, SD_RSP_TIMEOUT)) {
1508 rtsx_write_register(chip, SD_CFG3, SD_RSP_80CLK_TIMEOUT_EN, 0);
1509 TRACE_RET(chip, STATUS_FAIL);
1510 }
1511 }
1512
1513 RTSX_WRITE_REG(chip, SD_CFG3, SD_RSP_80CLK_TIMEOUT_EN, 0);
1514
1515 return STATUS_SUCCESS;
1516}
1517
1518static int sd_ddr_tuning_tx_cmd(struct rtsx_chip *chip, u8 sample_point)
1519{
1520 struct sd_info *sd_card = &(chip->sd_card);
1521 int retval;
1522 u8 cmd[5], bus_width;
1523
1524 retval = sd_change_phase(chip, sample_point, TUNE_TX);
1525 if (retval != STATUS_SUCCESS)
1526 TRACE_RET(chip, STATUS_FAIL);
1527
1528 if (CHK_SD(sd_card)) {
1529 bus_width = SD_BUS_WIDTH_4;
1530 } else {
1531 if (CHK_MMC_8BIT(sd_card))
1532 bus_width = SD_BUS_WIDTH_8;
1533 else if (CHK_MMC_4BIT(sd_card))
1534 bus_width = SD_BUS_WIDTH_4;
1535 else
1536 bus_width = SD_BUS_WIDTH_1;
1537 }
1538
1539 retval = sd_wait_state_data_ready(chip, 0x08, 1, 1000);
1540 if (retval != STATUS_SUCCESS)
1541 TRACE_RET(chip, STATUS_FAIL);
1542
1543 RTSX_WRITE_REG(chip, SD_CFG3, SD_RSP_80CLK_TIMEOUT_EN, SD_RSP_80CLK_TIMEOUT_EN);
1544
1545 cmd[0] = 0x40 | PROGRAM_CSD;
1546 cmd[1] = 0;
1547 cmd[2] = 0;
1548 cmd[3] = 0;
1549 cmd[4] = 0;
1550
1551 retval = sd_write_data(chip, SD_TM_AUTO_WRITE_2,
1552 cmd, 5, 16, 1, bus_width, sd_card->raw_csd, 16, 100);
1553 if (retval != STATUS_SUCCESS) {
1554 rtsx_clear_sd_error(chip);
1555 rtsx_write_register(chip, SD_CFG3, SD_RSP_80CLK_TIMEOUT_EN, 0);
1556 TRACE_RET(chip, STATUS_FAIL);
1557 }
1558
1559 RTSX_WRITE_REG(chip, SD_CFG3, SD_RSP_80CLK_TIMEOUT_EN, 0);
1560
1561 sd_send_cmd_get_rsp(chip, SEND_STATUS, sd_card->sd_addr, SD_RSP_TYPE_R1, NULL, 0);
1562
1563 return STATUS_SUCCESS;
1564}
1565
1566static u8 sd_search_final_phase(struct rtsx_chip *chip, u32 phase_map, u8 tune_dir)
1567{
1568 struct sd_info *sd_card = &(chip->sd_card);
1569 struct timing_phase_path path[MAX_PHASE + 1];
1570 int i, j, cont_path_cnt;
1571 int new_block, max_len, final_path_idx;
1572 u8 final_phase = 0xFF;
1573
1574 if (phase_map == 0xFFFFFFFF) {
1575 if (tune_dir == TUNE_RX)
1576 final_phase = (u8)chip->sd_default_rx_phase;
1577 else
1578 final_phase = (u8)chip->sd_default_tx_phase;
1579
1580 goto Search_Finish;
1581 }
1582
1583 cont_path_cnt = 0;
1584 new_block = 1;
1585 j = 0;
1586 for (i = 0; i < MAX_PHASE + 1; i++) {
1587 if (phase_map & (1 << i)) {
1588 if (new_block) {
1589 new_block = 0;
1590 j = cont_path_cnt++;
1591 path[j].start = i;
1592 path[j].end = i;
1593 } else {
1594 path[j].end = i;
1595 }
1596 } else {
1597 new_block = 1;
1598 if (cont_path_cnt) {
1599 int idx = cont_path_cnt - 1;
1600 path[idx].len = path[idx].end - path[idx].start + 1;
1601 path[idx].mid = path[idx].start + path[idx].len / 2;
1602 }
1603 }
1604 }
1605
1606 if (cont_path_cnt == 0) {
1607 RTSX_DEBUGP("No continuous phase path\n");
1608 goto Search_Finish;
1609 } else {
1610 int idx = cont_path_cnt - 1;
1611 path[idx].len = path[idx].end - path[idx].start + 1;
1612 path[idx].mid = path[idx].start + path[idx].len / 2;
1613 }
1614
1615 if ((path[0].start == 0) && (path[cont_path_cnt - 1].end == MAX_PHASE)) {
1616 path[0].start = path[cont_path_cnt - 1].start - MAX_PHASE - 1;
1617 path[0].len += path[cont_path_cnt - 1].len;
1618 path[0].mid = path[0].start + path[0].len / 2;
1619 if (path[0].mid < 0)
1620 path[0].mid += MAX_PHASE + 1;
1621
1622 cont_path_cnt--;
1623 }
1624
1625 max_len = 0;
1626 final_phase = 0;
1627 final_path_idx = 0;
1628 for (i = 0; i < cont_path_cnt; i++) {
1629 if (path[i].len > max_len) {
1630 max_len = path[i].len;
1631 final_phase = (u8)path[i].mid;
1632 final_path_idx = i;
1633 }
1634
1635 RTSX_DEBUGP("path[%d].start = %d\n", i, path[i].start);
1636 RTSX_DEBUGP("path[%d].end = %d\n", i, path[i].end);
1637 RTSX_DEBUGP("path[%d].len = %d\n", i, path[i].len);
1638 RTSX_DEBUGP("path[%d].mid = %d\n", i, path[i].mid);
1639 RTSX_DEBUGP("\n");
1640 }
1641
1642 if (tune_dir == TUNE_TX) {
1643 if (CHK_SD_SDR104(sd_card)) {
1644 if (max_len > 15) {
1645 int temp_mid = (max_len - 16) / 2;
1646 int temp_final_phase =
1647 path[final_path_idx].end - (max_len - (6 + temp_mid));
1648
1649 if (temp_final_phase < 0)
1650 final_phase = (u8)(temp_final_phase + MAX_PHASE + 1);
1651 else
1652 final_phase = (u8)temp_final_phase;
1653 }
1654 } else if (CHK_SD_SDR50(sd_card)) {
1655 if (max_len > 12) {
1656 int temp_mid = (max_len - 13) / 2;
1657 int temp_final_phase =
1658 path[final_path_idx].end - (max_len - (3 + temp_mid));
1659
1660 if (temp_final_phase < 0)
1661 final_phase = (u8)(temp_final_phase + MAX_PHASE + 1);
1662 else
1663 final_phase = (u8)temp_final_phase;
1664 }
1665 }
1666 }
1667
1668Search_Finish:
1669 RTSX_DEBUGP("Final chosen phase: %d\n", final_phase);
1670 return final_phase;
1671}
1672
1673static int sd_tuning_rx(struct rtsx_chip *chip)
1674{
1675 struct sd_info *sd_card = &(chip->sd_card);
1676 int retval;
1677 int i, j;
1678 u32 raw_phase_map[3], phase_map;
1679 u8 final_phase;
1680 int (*tuning_cmd)(struct rtsx_chip *chip, u8 sample_point);
1681
1682 if (CHK_SD(sd_card)) {
1683 if (CHK_SD_DDR50(sd_card))
1684 tuning_cmd = sd_ddr_tuning_rx_cmd;
1685 else
1686 tuning_cmd = sd_sdr_tuning_rx_cmd;
1687
1688 } else {
1689 if (CHK_MMC_DDR52(sd_card))
1690 tuning_cmd = mmc_ddr_tunning_rx_cmd;
1691 else
1692 TRACE_RET(chip, STATUS_FAIL);
1693 }
1694
1695 for (i = 0; i < 3; i++) {
1696 raw_phase_map[i] = 0;
1697 for (j = MAX_PHASE; j >= 0; j--) {
1698 if (detect_card_cd(chip, SD_CARD) != STATUS_SUCCESS) {
1699 sd_set_err_code(chip, SD_NO_CARD);
1700 TRACE_RET(chip, STATUS_FAIL);
1701 }
1702
1703 retval = tuning_cmd(chip, (u8)j);
1704 if (retval == STATUS_SUCCESS)
1705 raw_phase_map[i] |= 1 << j;
1706 }
1707 }
1708
1709 phase_map = raw_phase_map[0] & raw_phase_map[1] & raw_phase_map[2];
1710 for (i = 0; i < 3; i++)
1711 RTSX_DEBUGP("RX raw_phase_map[%d] = 0x%08x\n", i, raw_phase_map[i]);
1712
1713 RTSX_DEBUGP("RX phase_map = 0x%08x\n", phase_map);
1714
1715 final_phase = sd_search_final_phase(chip, phase_map, TUNE_RX);
1716 if (final_phase == 0xFF)
1717 TRACE_RET(chip, STATUS_FAIL);
1718
1719 retval = sd_change_phase(chip, final_phase, TUNE_RX);
1720 if (retval != STATUS_SUCCESS)
1721 TRACE_RET(chip, STATUS_FAIL);
1722
1723 return STATUS_SUCCESS;
1724}
1725
1726static int sd_ddr_pre_tuning_tx(struct rtsx_chip *chip)
1727{
1728 struct sd_info *sd_card = &(chip->sd_card);
1729 int retval;
1730 int i;
1731 u32 phase_map;
1732 u8 final_phase;
1733
1734 RTSX_WRITE_REG(chip, SD_CFG3, SD_RSP_80CLK_TIMEOUT_EN, SD_RSP_80CLK_TIMEOUT_EN);
1735
1736 phase_map = 0;
1737 for (i = MAX_PHASE; i >= 0; i--) {
1738 if (detect_card_cd(chip, SD_CARD) != STATUS_SUCCESS) {
1739 sd_set_err_code(chip, SD_NO_CARD);
1740 rtsx_write_register(chip, SD_CFG3,
1741 SD_RSP_80CLK_TIMEOUT_EN, 0);
1742 TRACE_RET(chip, STATUS_FAIL);
1743 }
1744
1745 retval = sd_change_phase(chip, (u8)i, TUNE_TX);
1746 if (retval != STATUS_SUCCESS)
1747 continue;
1748
1749 retval = sd_send_cmd_get_rsp(chip, SEND_STATUS, sd_card->sd_addr,
1750 SD_RSP_TYPE_R1, NULL, 0);
1751 if ((retval == STATUS_SUCCESS) || !sd_check_err_code(chip, SD_RSP_TIMEOUT))
1752 phase_map |= 1 << i;
1753 }
1754
1755 RTSX_WRITE_REG(chip, SD_CFG3, SD_RSP_80CLK_TIMEOUT_EN, 0);
1756
1757 RTSX_DEBUGP("DDR TX pre tune phase_map = 0x%08x\n", phase_map);
1758
1759 final_phase = sd_search_final_phase(chip, phase_map, TUNE_TX);
1760 if (final_phase == 0xFF)
1761 TRACE_RET(chip, STATUS_FAIL);
1762
1763 retval = sd_change_phase(chip, final_phase, TUNE_TX);
1764 if (retval != STATUS_SUCCESS)
1765 TRACE_RET(chip, STATUS_FAIL);
1766
1767 RTSX_DEBUGP("DDR TX pre tune phase: %d\n", (int)final_phase);
1768
1769 return STATUS_SUCCESS;
1770}
1771
1772static int sd_tuning_tx(struct rtsx_chip *chip)
1773{
1774 struct sd_info *sd_card = &(chip->sd_card);
1775 int retval;
1776 int i, j;
1777 u32 raw_phase_map[3], phase_map;
1778 u8 final_phase;
1779 int (*tuning_cmd)(struct rtsx_chip *chip, u8 sample_point);
1780
1781 if (CHK_SD(sd_card)) {
1782 if (CHK_SD_DDR50(sd_card))
1783 tuning_cmd = sd_ddr_tuning_tx_cmd;
1784 else
1785 tuning_cmd = sd_sdr_tuning_tx_cmd;
1786
1787 } else {
1788 if (CHK_MMC_DDR52(sd_card))
1789 tuning_cmd = sd_ddr_tuning_tx_cmd;
1790 else
1791 TRACE_RET(chip, STATUS_FAIL);
1792 }
1793
1794 for (i = 0; i < 3; i++) {
1795 raw_phase_map[i] = 0;
1796 for (j = MAX_PHASE; j >= 0; j--) {
1797 if (detect_card_cd(chip, SD_CARD) != STATUS_SUCCESS) {
1798 sd_set_err_code(chip, SD_NO_CARD);
1799 rtsx_write_register(chip, SD_CFG3,
1800 SD_RSP_80CLK_TIMEOUT_EN, 0);
1801 TRACE_RET(chip, STATUS_FAIL);
1802 }
1803
1804 retval = tuning_cmd(chip, (u8)j);
1805 if (retval == STATUS_SUCCESS)
1806 raw_phase_map[i] |= 1 << j;
1807 }
1808 }
1809
1810 phase_map = raw_phase_map[0] & raw_phase_map[1] & raw_phase_map[2];
1811 for (i = 0; i < 3; i++)
1812 RTSX_DEBUGP("TX raw_phase_map[%d] = 0x%08x\n", i, raw_phase_map[i]);
1813
1814 RTSX_DEBUGP("TX phase_map = 0x%08x\n", phase_map);
1815
1816 final_phase = sd_search_final_phase(chip, phase_map, TUNE_TX);
1817 if (final_phase == 0xFF)
1818 TRACE_RET(chip, STATUS_FAIL);
1819
1820 retval = sd_change_phase(chip, final_phase, TUNE_TX);
1821 if (retval != STATUS_SUCCESS)
1822 TRACE_RET(chip, STATUS_FAIL);
1823
1824 return STATUS_SUCCESS;
1825}
1826
1827static int sd_sdr_tuning(struct rtsx_chip *chip)
1828{
1829 int retval;
1830
1831 retval = sd_tuning_tx(chip);
1832 if (retval != STATUS_SUCCESS)
1833 TRACE_RET(chip, STATUS_FAIL);
1834
1835 retval = sd_tuning_rx(chip);
1836 if (retval != STATUS_SUCCESS)
1837 TRACE_RET(chip, STATUS_FAIL);
1838
1839 return STATUS_SUCCESS;
1840}
1841
1842static int sd_ddr_tuning(struct rtsx_chip *chip)
1843{
1844 int retval;
1845
1846 if (!(chip->sd_ctl & SD_DDR_TX_PHASE_SET_BY_USER)) {
1847 retval = sd_ddr_pre_tuning_tx(chip);
1848 if (retval != STATUS_SUCCESS)
1849 TRACE_RET(chip, STATUS_FAIL);
1850 } else {
1851 retval = sd_change_phase(chip, (u8)chip->sd_ddr_tx_phase, TUNE_TX);
1852 if (retval != STATUS_SUCCESS)
1853 TRACE_RET(chip, STATUS_FAIL);
1854 }
1855
1856 retval = sd_tuning_rx(chip);
1857 if (retval != STATUS_SUCCESS)
1858 TRACE_RET(chip, STATUS_FAIL);
1859
1860 if (!(chip->sd_ctl & SD_DDR_TX_PHASE_SET_BY_USER)) {
1861 retval = sd_tuning_tx(chip);
1862 if (retval != STATUS_SUCCESS)
1863 TRACE_RET(chip, STATUS_FAIL);
1864 }
1865
1866 return STATUS_SUCCESS;
1867}
1868
1869static int mmc_ddr_tuning(struct rtsx_chip *chip)
1870{
1871 int retval;
1872
1873 if (!(chip->sd_ctl & MMC_DDR_TX_PHASE_SET_BY_USER)) {
1874 retval = sd_ddr_pre_tuning_tx(chip);
1875 if (retval != STATUS_SUCCESS)
1876 TRACE_RET(chip, STATUS_FAIL);
1877 } else {
1878 retval = sd_change_phase(chip, (u8)chip->mmc_ddr_tx_phase, TUNE_TX);
1879 if (retval != STATUS_SUCCESS)
1880 TRACE_RET(chip, STATUS_FAIL);
1881 }
1882
1883 retval = sd_tuning_rx(chip);
1884 if (retval != STATUS_SUCCESS)
1885 TRACE_RET(chip, STATUS_FAIL);
1886
1887 if (!(chip->sd_ctl & MMC_DDR_TX_PHASE_SET_BY_USER)) {
1888 retval = sd_tuning_tx(chip);
1889 if (retval != STATUS_SUCCESS)
1890 TRACE_RET(chip, STATUS_FAIL);
1891 }
1892
1893 return STATUS_SUCCESS;
1894}
1895
1896int sd_switch_clock(struct rtsx_chip *chip)
1897{
1898 struct sd_info *sd_card = &(chip->sd_card);
1899 int retval;
1900 int re_tuning = 0;
1901
1902 retval = select_card(chip, SD_CARD);
1903 if (retval != STATUS_SUCCESS)
1904 TRACE_RET(chip, STATUS_FAIL);
1905
1906 if (CHECK_PID(chip, 0x5209) &&
1907 (CHK_SD30_SPEED(sd_card) || CHK_MMC_DDR52(sd_card))) {
1908 if (sd_card->need_retune && (sd_card->sd_clock != chip->cur_clk)) {
1909 re_tuning = 1;
1910 sd_card->need_retune = 0;
1911 }
1912 }
1913
1914 retval = switch_clock(chip, sd_card->sd_clock);
1915 if (retval != STATUS_SUCCESS)
1916 TRACE_RET(chip, STATUS_FAIL);
1917
1918 if (re_tuning) {
1919 if (CHK_SD(sd_card)) {
1920 if (CHK_SD_DDR50(sd_card))
1921 retval = sd_ddr_tuning(chip);
1922 else
1923 retval = sd_sdr_tuning(chip);
1924 } else {
1925 if (CHK_MMC_DDR52(sd_card))
1926 retval = mmc_ddr_tuning(chip);
1927 }
1928
1929 if (retval != STATUS_SUCCESS)
1930 TRACE_RET(chip, STATUS_FAIL);
1931 }
1932
1933 return STATUS_SUCCESS;
1934}
1935
1936static int sd_prepare_reset(struct rtsx_chip *chip)
1937{
1938 struct sd_info *sd_card = &(chip->sd_card);
1939 int retval;
1940
1941 if (chip->asic_code)
1942 sd_card->sd_clock = 29;
1943 else
1944 sd_card->sd_clock = CLK_30;
1945
1946 sd_card->sd_type = 0;
1947 sd_card->seq_mode = 0;
1948 sd_card->sd_data_buf_ready = 0;
1949 sd_card->capacity = 0;
1950
1951#ifdef SUPPORT_SD_LOCK
1952 sd_card->sd_lock_status = 0;
1953 sd_card->sd_erase_status = 0;
1954#endif
1955
1956 chip->capacity[chip->card2lun[SD_CARD]] = 0;
1957 chip->sd_io = 0;
1958
1959 retval = sd_set_init_para(chip);
1960 if (retval != STATUS_SUCCESS)
1961 TRACE_RET(chip, retval);
1962
1963 if (CHECK_PID(chip, 0x5209)) {
1964 RTSX_WRITE_REG(chip, REG_SD_CFG1, 0xFF,
1965 SD_CLK_DIVIDE_128 | SD_20_MODE | SD_BUS_WIDTH_1);
1966 RTSX_WRITE_REG(chip, SD_SAMPLE_POINT_CTL, 0xFF, SD20_RX_POS_EDGE);
1967 RTSX_WRITE_REG(chip, SD_PUSH_POINT_CTL, 0xFF, 0);
1968 } else {
1969 RTSX_WRITE_REG(chip, REG_SD_CFG1, 0xFF, 0x40);
1970 }
1971
1972 RTSX_WRITE_REG(chip, CARD_STOP, SD_STOP | SD_CLR_ERR, SD_STOP | SD_CLR_ERR);
1973
1974 retval = select_card(chip, SD_CARD);
1975 if (retval != STATUS_SUCCESS)
1976 TRACE_RET(chip, STATUS_FAIL);
1977
1978 return STATUS_SUCCESS;
1979}
1980
1981static int sd_pull_ctl_disable(struct rtsx_chip *chip)
1982{
1983 if (CHECK_PID(chip, 0x5209)) {
1984 RTSX_WRITE_REG(chip, CARD_PULL_CTL1, 0xFF, 0x55);
1985 RTSX_WRITE_REG(chip, CARD_PULL_CTL2, 0xFF, 0x55);
1986 RTSX_WRITE_REG(chip, CARD_PULL_CTL3, 0xFF, 0xD5);
1987 } else if (CHECK_PID(chip, 0x5208)) {
1988 RTSX_WRITE_REG(chip, CARD_PULL_CTL1, 0xFF,
1989 XD_D3_PD | SD_D7_PD | SD_CLK_PD | SD_D5_PD);
1990 RTSX_WRITE_REG(chip, CARD_PULL_CTL2, 0xFF,
1991 SD_D6_PD | SD_D0_PD | SD_D1_PD | XD_D5_PD);
1992 RTSX_WRITE_REG(chip, CARD_PULL_CTL3, 0xFF,
1993 SD_D4_PD | XD_CE_PD | XD_CLE_PD | XD_CD_PU);
1994 RTSX_WRITE_REG(chip, CARD_PULL_CTL4, 0xFF,
1995 XD_RDY_PD | SD_D3_PD | SD_D2_PD | XD_ALE_PD);
1996 RTSX_WRITE_REG(chip, CARD_PULL_CTL5, 0xFF,
1997 MS_INS_PU | SD_WP_PD | SD_CD_PU | SD_CMD_PD);
1998 RTSX_WRITE_REG(chip, CARD_PULL_CTL6, 0xFF, MS_D5_PD | MS_D4_PD);
1999 } else if (CHECK_PID(chip, 0x5288)) {
2000 if (CHECK_BARO_PKG(chip, QFN)) {
2001 RTSX_WRITE_REG(chip, CARD_PULL_CTL1, 0xFF, 0x55);
2002 RTSX_WRITE_REG(chip, CARD_PULL_CTL2, 0xFF, 0x55);
2003 RTSX_WRITE_REG(chip, CARD_PULL_CTL3, 0xFF, 0x4B);
2004 RTSX_WRITE_REG(chip, CARD_PULL_CTL4, 0xFF, 0x69);
2005 }
2006 }
2007
2008 return STATUS_SUCCESS;
2009}
2010
2011int sd_pull_ctl_enable(struct rtsx_chip *chip)
2012{
2013 int retval;
2014
2015 rtsx_init_cmd(chip);
2016
2017 if (CHECK_PID(chip, 0x5209)) {
2018 rtsx_add_cmd(chip, WRITE_REG_CMD, CARD_PULL_CTL1, 0xFF, 0xAA);
2019 rtsx_add_cmd(chip, WRITE_REG_CMD, CARD_PULL_CTL2, 0xFF, 0xAA);
2020 rtsx_add_cmd(chip, WRITE_REG_CMD, CARD_PULL_CTL3, 0xFF, 0xE9);
2021 } else if (CHECK_PID(chip, 0x5208)) {
2022 rtsx_add_cmd(chip, WRITE_REG_CMD, CARD_PULL_CTL1, 0xFF,
2023 XD_D3_PD | SD_DAT7_PU | SD_CLK_NP | SD_D5_PU);
2024 rtsx_add_cmd(chip, WRITE_REG_CMD, CARD_PULL_CTL2, 0xFF,
2025 SD_D6_PU | SD_D0_PU | SD_D1_PU | XD_D5_PD);
2026 rtsx_add_cmd(chip, WRITE_REG_CMD, CARD_PULL_CTL3, 0xFF,
2027 SD_D4_PU | XD_CE_PD | XD_CLE_PD | XD_CD_PU);
2028 rtsx_add_cmd(chip, WRITE_REG_CMD, CARD_PULL_CTL4, 0xFF,
2029 XD_RDY_PD | SD_D3_PU | SD_D2_PU | XD_ALE_PD);
2030 rtsx_add_cmd(chip, WRITE_REG_CMD, CARD_PULL_CTL5, 0xFF,
2031 MS_INS_PU | SD_WP_PU | SD_CD_PU | SD_CMD_PU);
2032 rtsx_add_cmd(chip, WRITE_REG_CMD, CARD_PULL_CTL6, 0xFF, MS_D5_PD | MS_D4_PD);
2033 } else if (CHECK_PID(chip, 0x5288)) {
2034 if (CHECK_BARO_PKG(chip, QFN)) {
2035 rtsx_add_cmd(chip, WRITE_REG_CMD, CARD_PULL_CTL1, 0xFF, 0xA8);
2036 rtsx_add_cmd(chip, WRITE_REG_CMD, CARD_PULL_CTL2, 0xFF, 0x5A);
2037 rtsx_add_cmd(chip, WRITE_REG_CMD, CARD_PULL_CTL3, 0xFF, 0x95);
2038 rtsx_add_cmd(chip, WRITE_REG_CMD, CARD_PULL_CTL4, 0xFF, 0xAA);
2039 }
2040 }
2041
2042 retval = rtsx_send_cmd(chip, SD_CARD, 100);
2043 if (retval < 0)
2044 TRACE_RET(chip, STATUS_FAIL);
2045
2046 return STATUS_SUCCESS;
2047}
2048
2049static int sd_init_power(struct rtsx_chip *chip)
2050{
2051 int retval;
2052
2053 if (CHECK_PID(chip, 0x5209))
2054 RTSX_WRITE_REG(chip, PWR_GATE_CTRL, LDO3318_PWR_MASK, LDO_OFF);
2055
2056 retval = sd_power_off_card3v3(chip);
2057 if (retval != STATUS_SUCCESS)
2058 TRACE_RET(chip, STATUS_FAIL);
2059
2060 if (!chip->ft2_fast_mode)
2061 wait_timeout(250);
2062
2063 retval = enable_card_clock(chip, SD_CARD);
2064 if (retval != STATUS_SUCCESS)
2065 TRACE_RET(chip, STATUS_FAIL);
2066
2067 if (chip->asic_code) {
2068 retval = sd_pull_ctl_enable(chip);
2069 if (retval != STATUS_SUCCESS)
2070 TRACE_RET(chip, STATUS_FAIL);
2071 } else {
2072 RTSX_WRITE_REG(chip, FPGA_PULL_CTL, FPGA_SD_PULL_CTL_BIT | 0x20, 0);
2073 }
2074
2075 if (chip->ft2_fast_mode) {
2076 if (CHECK_PID(chip, 0x5209))
2077 RTSX_WRITE_REG(chip, PWR_GATE_CTRL, LDO3318_PWR_MASK, LDO_ON);
2078
2079 } else {
2080 retval = card_power_on(chip, SD_CARD);
2081 if (retval != STATUS_SUCCESS)
2082 TRACE_RET(chip, STATUS_FAIL);
2083
2084 wait_timeout(260);
2085
2086#ifdef SUPPORT_OCP
2087 if (chip->ocp_stat & (SD_OC_NOW | SD_OC_EVER)) {
2088 RTSX_DEBUGP("Over current, OCPSTAT is 0x%x\n", chip->ocp_stat);
2089 TRACE_RET(chip, STATUS_FAIL);
2090 }
2091#endif
2092 }
2093
2094 RTSX_WRITE_REG(chip, CARD_OE, SD_OUTPUT_EN, SD_OUTPUT_EN);
2095
2096 return STATUS_SUCCESS;
2097}
2098
2099static int sd_dummy_clock(struct rtsx_chip *chip)
2100{
2101 if (CHECK_PID(chip, 0x5209)) {
2102 RTSX_WRITE_REG(chip, SD_BUS_STAT, SD_CLK_TOGGLE_EN, SD_CLK_TOGGLE_EN);
2103 wait_timeout(5);
2104 RTSX_WRITE_REG(chip, SD_BUS_STAT, SD_CLK_TOGGLE_EN, 0x00);
2105 } else {
2106 RTSX_WRITE_REG(chip, REG_SD_CFG3, 0x01, 0x01);
2107 wait_timeout(5);
2108 RTSX_WRITE_REG(chip, REG_SD_CFG3, 0x01, 0);
2109 }
2110
2111 return STATUS_SUCCESS;
2112}
2113
2114static int sd_read_lba0(struct rtsx_chip *chip)
2115{
2116 struct sd_info *sd_card = &(chip->sd_card);
2117 int retval;
2118 u8 cmd[5], bus_width;
2119
2120 cmd[0] = 0x40 | READ_SINGLE_BLOCK;
2121 cmd[1] = 0;
2122 cmd[2] = 0;
2123 cmd[3] = 0;
2124 cmd[4] = 0;
2125
2126 if (CHK_SD(sd_card)) {
2127 bus_width = SD_BUS_WIDTH_4;
2128 } else {
2129 if (CHK_MMC_8BIT(sd_card))
2130 bus_width = SD_BUS_WIDTH_8;
2131 else if (CHK_MMC_4BIT(sd_card))
2132 bus_width = SD_BUS_WIDTH_4;
2133 else
2134 bus_width = SD_BUS_WIDTH_1;
2135 }
2136
2137 retval = sd_read_data(chip, SD_TM_NORMAL_READ, cmd,
2138 5, 512, 1, bus_width, NULL, 0, 100);
2139 if (retval != STATUS_SUCCESS) {
2140 rtsx_clear_sd_error(chip);
2141 TRACE_RET(chip, STATUS_FAIL);
2142 }
2143
2144 return STATUS_SUCCESS;
2145}
2146
2147static int sd_check_wp_state(struct rtsx_chip *chip)
2148{
2149 struct sd_info *sd_card = &(chip->sd_card);
2150 int retval;
2151 u32 val;
2152 u16 sd_card_type;
2153 u8 cmd[5], buf[64];
2154
2155 retval = sd_send_cmd_get_rsp(chip, APP_CMD,
2156 sd_card->sd_addr, SD_RSP_TYPE_R1, NULL, 0);
2157 if (retval != STATUS_SUCCESS)
2158 TRACE_RET(chip, STATUS_FAIL);
2159
2160 cmd[0] = 0x40 | SD_STATUS;
2161 cmd[1] = 0;
2162 cmd[2] = 0;
2163 cmd[3] = 0;
2164 cmd[4] = 0;
2165
2166 retval = sd_read_data(chip, SD_TM_NORMAL_READ, cmd, 5, 64, 1, SD_BUS_WIDTH_4, buf, 64, 250);
2167 if (retval != STATUS_SUCCESS) {
2168 rtsx_clear_sd_error(chip);
2169
2170 sd_send_cmd_get_rsp(chip, SEND_STATUS, sd_card->sd_addr, SD_RSP_TYPE_R1, NULL, 0);
2171 TRACE_RET(chip, STATUS_FAIL);
2172 }
2173
2174 RTSX_DEBUGP("ACMD13:\n");
2175 RTSX_DUMP(buf, 64);
2176
2177 sd_card_type = ((u16)buf[2] << 8) | buf[3];
2178 RTSX_DEBUGP("sd_card_type = 0x%04x\n", sd_card_type);
2179 if ((sd_card_type == 0x0001) || (sd_card_type == 0x0002)) {
2180 /* ROM card or OTP */
2181 chip->card_wp |= SD_CARD;
2182 }
2183
2184 /* Check SD Machanical Write-Protect Switch */
2185 val = rtsx_readl(chip, RTSX_BIPR);
2186 if (val & SD_WRITE_PROTECT)
2187 chip->card_wp |= SD_CARD;
2188
2189 return STATUS_SUCCESS;
2190}
2191
2192static int reset_sd(struct rtsx_chip *chip)
2193{
2194 struct sd_info *sd_card = &(chip->sd_card);
2195 int retval, i = 0, j = 0, k = 0, hi_cap_flow = 0;
2196 int sd_dont_switch = 0;
2197 int support_1v8 = 0;
2198 int try_sdio = 1;
2199 u8 rsp[16];
2200 u8 switch_bus_width;
2201 u32 voltage = 0;
2202 int sd20_mode = 0;
2203
2204 SET_SD(sd_card);
2205
2206Switch_Fail:
2207
2208 i = 0;
2209 j = 0;
2210 k = 0;
2211 hi_cap_flow = 0;
2212
2213#ifdef SUPPORT_SD_LOCK
2214 if (sd_card->sd_lock_status & SD_UNLOCK_POW_ON)
2215 goto SD_UNLOCK_ENTRY;
2216#endif
2217
2218 retval = sd_prepare_reset(chip);
2219 if (retval != STATUS_SUCCESS)
2220 TRACE_RET(chip, STATUS_FAIL);
2221
2222 retval = sd_dummy_clock(chip);
2223 if (retval != STATUS_SUCCESS)
2224 TRACE_RET(chip, STATUS_FAIL);
2225
2226 if (CHK_SDIO_EXIST(chip) && !CHK_SDIO_IGNORED(chip) && try_sdio) {
2227 int rty_cnt = 0;
2228
2229 for (; rty_cnt < chip->sdio_retry_cnt; rty_cnt++) {
2230 if (detect_card_cd(chip, SD_CARD) != STATUS_SUCCESS) {
2231 sd_set_err_code(chip, SD_NO_CARD);
2232 TRACE_RET(chip, STATUS_FAIL);
2233 }
2234
2235 retval = sd_send_cmd_get_rsp(chip, IO_SEND_OP_COND, 0, SD_RSP_TYPE_R4, rsp, 5);
2236 if (retval == STATUS_SUCCESS) {
2237 int func_num = (rsp[1] >> 4) & 0x07;
2238 if (func_num) {
2239 RTSX_DEBUGP("SD_IO card (Function number: %d)!\n", func_num);
2240 chip->sd_io = 1;
2241 TRACE_RET(chip, STATUS_FAIL);
2242 }
2243
2244 break;
2245 }
2246
2247 sd_init_power(chip);
2248
2249 sd_dummy_clock(chip);
2250 }
2251
2252 RTSX_DEBUGP("Normal card!\n");
2253 }
2254
2255 /* Start Initialization Process of SD Card */
2256RTY_SD_RST:
2257 retval = sd_send_cmd_get_rsp(chip, GO_IDLE_STATE, 0, SD_RSP_TYPE_R0, NULL, 0);
2258 if (retval != STATUS_SUCCESS)
2259 TRACE_RET(chip, STATUS_FAIL);
2260
2261 wait_timeout(20);
2262
2263 retval = sd_send_cmd_get_rsp(chip, SEND_IF_COND, 0x000001AA, SD_RSP_TYPE_R7, rsp, 5);
2264 if (retval == STATUS_SUCCESS) {
2265 if ((rsp[4] == 0xAA) && ((rsp[3] & 0x0f) == 0x01)) {
2266 hi_cap_flow = 1;
2267 if (CHECK_PID(chip, 0x5209)) {
2268 if (sd20_mode) {
2269 voltage = SUPPORT_VOLTAGE |
2270 SUPPORT_HIGH_AND_EXTENDED_CAPACITY;
2271 } else {
2272 voltage = SUPPORT_VOLTAGE |
2273 SUPPORT_HIGH_AND_EXTENDED_CAPACITY |
2274 SUPPORT_MAX_POWER_PERMANCE | SUPPORT_1V8;
2275 }
2276 } else {
2277 voltage = SUPPORT_VOLTAGE | 0x40000000;
2278 }
2279 }
2280 }
2281
2282 if (!hi_cap_flow) {
2283 voltage = SUPPORT_VOLTAGE;
2284
2285 retval = sd_send_cmd_get_rsp(chip, GO_IDLE_STATE, 0, SD_RSP_TYPE_R0, NULL, 0);
2286 if (retval != STATUS_SUCCESS)
2287 TRACE_RET(chip, STATUS_FAIL);
2288
2289 wait_timeout(20);
2290 }
2291
2292 do {
2293 retval = sd_send_cmd_get_rsp(chip, APP_CMD, 0, SD_RSP_TYPE_R1, NULL, 0);
2294 if (retval != STATUS_SUCCESS) {
2295 if (detect_card_cd(chip, SD_CARD) != STATUS_SUCCESS) {
2296 sd_set_err_code(chip, SD_NO_CARD);
2297 TRACE_RET(chip, STATUS_FAIL);
2298 }
2299
2300 j++;
2301 if (j < 3)
2302 goto RTY_SD_RST;
2303 else
2304 TRACE_RET(chip, STATUS_FAIL);
2305 }
2306
2307 retval = sd_send_cmd_get_rsp(chip, SD_APP_OP_COND, voltage, SD_RSP_TYPE_R3, rsp, 5);
2308 if (retval != STATUS_SUCCESS) {
2309 k++;
2310 if (k < 3)
2311 goto RTY_SD_RST;
2312 else
2313 TRACE_RET(chip, STATUS_FAIL);
2314 }
2315
2316 i++;
2317 wait_timeout(20);
2318 } while (!(rsp[1] & 0x80) && (i < 255));
2319
2320 if (i == 255)
2321 TRACE_RET(chip, STATUS_FAIL);
2322
2323 if (hi_cap_flow) {
2324 if (rsp[1] & 0x40)
2325 SET_SD_HCXC(sd_card);
2326 else
2327 CLR_SD_HCXC(sd_card);
2328
2329 if (CHECK_PID(chip, 0x5209) && CHK_SD_HCXC(sd_card) && !sd20_mode)
2330 support_1v8 = (rsp[1] & 0x01) ? 1 : 0;
2331 else
2332 support_1v8 = 0;
2333 } else {
2334 CLR_SD_HCXC(sd_card);
2335 support_1v8 = 0;
2336 }
2337 RTSX_DEBUGP("support_1v8 = %d\n", support_1v8);
2338
2339 if (support_1v8) {
2340 retval = sd_voltage_switch(chip);
2341 if (retval != STATUS_SUCCESS)
2342 TRACE_RET(chip, STATUS_FAIL);
2343 }
2344
2345 retval = sd_send_cmd_get_rsp(chip, ALL_SEND_CID, 0, SD_RSP_TYPE_R2, NULL, 0);
2346 if (retval != STATUS_SUCCESS)
2347 TRACE_RET(chip, STATUS_FAIL);
2348
2349 for (i = 0; i < 3; i++) {
2350 retval = sd_send_cmd_get_rsp(chip, SEND_RELATIVE_ADDR, 0, SD_RSP_TYPE_R6, rsp, 5);
2351 if (retval != STATUS_SUCCESS)
2352 TRACE_RET(chip, STATUS_FAIL);
2353
2354 sd_card->sd_addr = (u32)rsp[1] << 24;
2355 sd_card->sd_addr += (u32)rsp[2] << 16;
2356
2357 if (sd_card->sd_addr)
2358 break;
2359 }
2360
2361 retval = sd_check_csd(chip, 1);
2362 if (retval != STATUS_SUCCESS)
2363 TRACE_RET(chip, STATUS_FAIL);
2364
2365 retval = sd_select_card(chip, 1);
2366 if (retval != STATUS_SUCCESS)
2367 TRACE_RET(chip, STATUS_FAIL);
2368
2369#ifdef SUPPORT_SD_LOCK
2370SD_UNLOCK_ENTRY:
2371 retval = sd_update_lock_status(chip);
2372 if (retval != STATUS_SUCCESS)
2373 TRACE_RET(chip, STATUS_FAIL);
2374
2375 if (sd_card->sd_lock_status & SD_LOCKED) {
2376 sd_card->sd_lock_status |= (SD_LOCK_1BIT_MODE | SD_PWD_EXIST);
2377 return STATUS_SUCCESS;
2378 } else if (!(sd_card->sd_lock_status & SD_UNLOCK_POW_ON)) {
2379 sd_card->sd_lock_status &= ~SD_PWD_EXIST;
2380 }
2381#endif
2382
2383 retval = sd_send_cmd_get_rsp(chip, APP_CMD, sd_card->sd_addr, SD_RSP_TYPE_R1, NULL, 0);
2384 if (retval != STATUS_SUCCESS)
2385 TRACE_RET(chip, STATUS_FAIL);
2386
2387 retval = sd_send_cmd_get_rsp(chip, SET_CLR_CARD_DETECT, 0, SD_RSP_TYPE_R1, NULL, 0);
2388 if (retval != STATUS_SUCCESS)
2389 TRACE_RET(chip, STATUS_FAIL);
2390
2391 if (support_1v8) {
2392 retval = sd_send_cmd_get_rsp(chip, APP_CMD, sd_card->sd_addr, SD_RSP_TYPE_R1, NULL, 0);
2393 if (retval != STATUS_SUCCESS)
2394 TRACE_RET(chip, STATUS_FAIL);
2395
2396 retval = sd_send_cmd_get_rsp(chip, SET_BUS_WIDTH, 2, SD_RSP_TYPE_R1, NULL, 0);
2397 if (retval != STATUS_SUCCESS)
2398 TRACE_RET(chip, STATUS_FAIL);
2399
2400 switch_bus_width = SD_BUS_WIDTH_4;
2401 } else {
2402 switch_bus_width = SD_BUS_WIDTH_1;
2403 }
2404
2405 retval = sd_send_cmd_get_rsp(chip, SET_BLOCKLEN, 0x200, SD_RSP_TYPE_R1, NULL, 0);
2406 if (retval != STATUS_SUCCESS)
2407 TRACE_RET(chip, STATUS_FAIL);
2408
2409 retval = sd_set_clock_divider(chip, SD_CLK_DIVIDE_0);
2410 if (retval != STATUS_SUCCESS)
2411 TRACE_RET(chip, STATUS_FAIL);
2412
2413 if (!(sd_card->raw_csd[4] & 0x40))
2414 sd_dont_switch = 1;
2415
2416 if (!sd_dont_switch) {
2417 if (sd20_mode) {
2418 /* Set sd_switch_fail here, because we needn't
2419 * switch to UHS mode
2420 */
2421 sd_card->sd_switch_fail = SDR104_SUPPORT_MASK |
2422 DDR50_SUPPORT_MASK | SDR50_SUPPORT_MASK;
2423 }
2424
2425 /* Check the card whether follow SD1.1 spec or higher */
2426 retval = sd_check_spec(chip, switch_bus_width);
2427 if (retval == STATUS_SUCCESS) {
2428 retval = sd_switch_function(chip, switch_bus_width);
2429 if (retval != STATUS_SUCCESS) {
2430 if (CHECK_PID(chip, 0x5209))
2431 sd_change_bank_voltage(chip, SD_IO_3V3);
2432
2433 sd_init_power(chip);
2434 sd_dont_switch = 1;
2435 try_sdio = 0;
2436
2437 goto Switch_Fail;
2438 }
2439 } else {
2440 if (support_1v8) {
2441 if (CHECK_PID(chip, 0x5209))
2442 sd_change_bank_voltage(chip, SD_IO_3V3);
2443
2444 sd_init_power(chip);
2445 sd_dont_switch = 1;
2446 try_sdio = 0;
2447
2448 goto Switch_Fail;
2449 }
2450 }
2451 }
2452
2453 if (!support_1v8) {
2454 retval = sd_send_cmd_get_rsp(chip, APP_CMD, sd_card->sd_addr, SD_RSP_TYPE_R1, NULL, 0);
2455 if (retval != STATUS_SUCCESS)
2456 TRACE_RET(chip, STATUS_FAIL);
2457
2458 retval = sd_send_cmd_get_rsp(chip, SET_BUS_WIDTH, 2, SD_RSP_TYPE_R1, NULL, 0);
2459 if (retval != STATUS_SUCCESS)
2460 TRACE_RET(chip, STATUS_FAIL);
2461 }
2462
2463#ifdef SUPPORT_SD_LOCK
2464 sd_card->sd_lock_status &= ~SD_LOCK_1BIT_MODE;
2465#endif
2466
2467 if (!sd20_mode && CHK_SD30_SPEED(sd_card)) {
2468 int read_lba0 = 1;
2469
2470 RTSX_WRITE_REG(chip, SD30_DRIVE_SEL, 0x07, chip->sd30_drive_sel_1v8);
2471
2472 retval = sd_set_init_para(chip);
2473 if (retval != STATUS_SUCCESS)
2474 TRACE_RET(chip, STATUS_FAIL);
2475
2476 if (CHK_SD_DDR50(sd_card))
2477 retval = sd_ddr_tuning(chip);
2478 else
2479 retval = sd_sdr_tuning(chip);
2480
2481 if (retval != STATUS_SUCCESS) {
2482 if (sd20_mode) {
2483 TRACE_RET(chip, STATUS_FAIL);
2484 } else {
2485 retval = sd_init_power(chip);
2486 if (retval != STATUS_SUCCESS)
2487 TRACE_RET(chip, STATUS_FAIL);
2488
2489 try_sdio = 0;
2490 sd20_mode = 1;
2491 goto Switch_Fail;
2492 }
2493 }
2494
2495 sd_send_cmd_get_rsp(chip, SEND_STATUS, sd_card->sd_addr, SD_RSP_TYPE_R1, NULL, 0);
2496
2497 if (CHK_SD_DDR50(sd_card)) {
2498 retval = sd_wait_state_data_ready(chip, 0x08, 1, 1000);
2499 if (retval != STATUS_SUCCESS)
2500 read_lba0 = 0;
2501 }
2502
2503 if (read_lba0) {
2504 retval = sd_read_lba0(chip);
2505 if (retval != STATUS_SUCCESS) {
2506 if (sd20_mode) {
2507 TRACE_RET(chip, STATUS_FAIL);
2508 } else {
2509 retval = sd_init_power(chip);
2510 if (retval != STATUS_SUCCESS)
2511 TRACE_RET(chip, STATUS_FAIL);
2512
2513 try_sdio = 0;
2514 sd20_mode = 1;
2515 goto Switch_Fail;
2516 }
2517 }
2518 }
2519 }
2520
2521 retval = sd_check_wp_state(chip);
2522 if (retval != STATUS_SUCCESS)
2523 TRACE_RET(chip, STATUS_FAIL);
2524
2525 chip->card_bus_width[chip->card2lun[SD_CARD]] = 4;
2526
2527#ifdef SUPPORT_SD_LOCK
2528 if (sd_card->sd_lock_status & SD_UNLOCK_POW_ON) {
2529 RTSX_WRITE_REG(chip, REG_SD_BLOCK_CNT_H, 0xFF, 0x02);
2530 RTSX_WRITE_REG(chip, REG_SD_BLOCK_CNT_L, 0xFF, 0x00);
2531 }
2532#endif
2533
2534 return STATUS_SUCCESS;
2535}
2536
2537
2538static int mmc_test_switch_bus(struct rtsx_chip *chip, u8 width)
2539{
2540 struct sd_info *sd_card = &(chip->sd_card);
2541 int retval;
2542 u8 buf[8] = {0}, bus_width, *ptr;
2543 u16 byte_cnt;
2544 int len;
2545
2546 retval = sd_send_cmd_get_rsp(chip, BUSTEST_W, 0, SD_RSP_TYPE_R1, NULL, 0);
2547 if (retval != STATUS_SUCCESS)
2548 TRACE_RET(chip, SWITCH_FAIL);
2549
2550 if (width == MMC_8BIT_BUS) {
2551 buf[0] = 0x55;
2552 buf[1] = 0xAA;
2553 len = 8;
2554 byte_cnt = 8;
2555 bus_width = SD_BUS_WIDTH_8;
2556 } else {
2557 buf[0] = 0x5A;
2558 len = 4;
2559 byte_cnt = 4;
2560 bus_width = SD_BUS_WIDTH_4;
2561 }
2562
2563 if (!CHECK_PID(chip, 0x5209)) {
2564 retval = rtsx_write_register(chip, REG_SD_CFG3, 0x02, 0x02);
2565 if (retval != STATUS_SUCCESS)
2566 TRACE_RET(chip, SWITCH_ERR);
2567 }
2568
2569 retval = sd_write_data(chip, SD_TM_AUTO_WRITE_3,
2570 NULL, 0, byte_cnt, 1, bus_width, buf, len, 100);
2571 if (retval != STATUS_SUCCESS) {
2572 if (CHECK_PID(chip, 0x5209)) {
2573 u8 val1 = 0, val2 = 0;
2574 rtsx_read_register(chip, REG_SD_STAT1, &val1);
2575 rtsx_read_register(chip, REG_SD_STAT2, &val2);
2576 rtsx_clear_sd_error(chip);
2577 if ((val1 & 0xE0) || val2)
2578 TRACE_RET(chip, SWITCH_ERR);
2579 } else {
2580 rtsx_clear_sd_error(chip);
2581 rtsx_write_register(chip, REG_SD_CFG3, 0x02, 0);
2582 TRACE_RET(chip, SWITCH_ERR);
2583 }
2584 }
2585
2586 if (!CHECK_PID(chip, 0x5209)) {
2587 retval = rtsx_write_register(chip, REG_SD_CFG3, 0x02, 0);
2588 if (retval != STATUS_SUCCESS)
2589 TRACE_RET(chip, SWITCH_ERR);
2590 }
2591
2592 RTSX_DEBUGP("SD/MMC CMD %d\n", BUSTEST_R);
2593
2594 rtsx_init_cmd(chip);
2595
2596 rtsx_add_cmd(chip, WRITE_REG_CMD, REG_SD_CMD0, 0xFF, 0x40 | BUSTEST_R);
2597
2598 if (width == MMC_8BIT_BUS)
2599 rtsx_add_cmd(chip, WRITE_REG_CMD, REG_SD_BYTE_CNT_L, 0xFF, 0x08);
2600 else
2601 rtsx_add_cmd(chip, WRITE_REG_CMD, REG_SD_BYTE_CNT_L, 0xFF, 0x04);
2602
2603 rtsx_add_cmd(chip, WRITE_REG_CMD, REG_SD_BLOCK_CNT_L, 0xFF, 1);
2604 rtsx_add_cmd(chip, WRITE_REG_CMD, REG_SD_BLOCK_CNT_H, 0xFF, 0);
2605
2606 rtsx_add_cmd(chip, WRITE_REG_CMD, REG_SD_CFG2, 0xFF,
2607 SD_CALCULATE_CRC7 | SD_NO_CHECK_CRC16 | SD_NO_WAIT_BUSY_END |
2608 SD_CHECK_CRC7 | SD_RSP_LEN_6);
2609 rtsx_add_cmd(chip, WRITE_REG_CMD, CARD_DATA_SOURCE, 0x01, PINGPONG_BUFFER);
2610 rtsx_add_cmd(chip, WRITE_REG_CMD, REG_SD_TRANSFER, 0xFF, SD_TM_NORMAL_READ | SD_TRANSFER_START);
2611 rtsx_add_cmd(chip, CHECK_REG_CMD, REG_SD_TRANSFER, SD_TRANSFER_END, SD_TRANSFER_END);
2612
2613 rtsx_add_cmd(chip, READ_REG_CMD, PPBUF_BASE2, 0, 0);
2614 if (width == MMC_8BIT_BUS)
2615 rtsx_add_cmd(chip, READ_REG_CMD, PPBUF_BASE2 + 1, 0, 0);
2616
2617 retval = rtsx_send_cmd(chip, SD_CARD, 100);
2618 if (retval < 0) {
2619 rtsx_clear_sd_error(chip);
2620 TRACE_RET(chip, SWITCH_ERR);
2621 }
2622
2623 ptr = rtsx_get_cmd_data(chip) + 1;
2624
2625 if (width == MMC_8BIT_BUS) {
2626 RTSX_DEBUGP("BUSTEST_R [8bits]: 0x%02x 0x%02x\n", ptr[0], ptr[1]);
2627 if ((ptr[0] == 0xAA) && (ptr[1] == 0x55)) {
2628 u8 rsp[5];
2629 u32 arg;
2630
2631 if (CHK_MMC_DDR52(sd_card))
2632 arg = 0x03B70600;
2633 else
2634 arg = 0x03B70200;
2635
2636 retval = sd_send_cmd_get_rsp(chip, SWITCH, arg, SD_RSP_TYPE_R1b, rsp, 5);
2637 if ((retval == STATUS_SUCCESS) && !(rsp[4] & MMC_SWITCH_ERR))
2638 return SWITCH_SUCCESS;
2639 }
2640 } else {
2641 RTSX_DEBUGP("BUSTEST_R [4bits]: 0x%02x\n", ptr[0]);
2642 if (ptr[0] == 0xA5) {
2643 u8 rsp[5];
2644 u32 arg;
2645
2646 if (CHK_MMC_DDR52(sd_card))
2647 arg = 0x03B70500;
2648 else
2649 arg = 0x03B70100;
2650
2651 retval = sd_send_cmd_get_rsp(chip, SWITCH, arg, SD_RSP_TYPE_R1b, rsp, 5);
2652 if ((retval == STATUS_SUCCESS) && !(rsp[4] & MMC_SWITCH_ERR))
2653 return SWITCH_SUCCESS;
2654 }
2655 }
2656
2657 TRACE_RET(chip, SWITCH_FAIL);
2658}
2659
2660
2661static int mmc_switch_timing_bus(struct rtsx_chip *chip, int switch_ddr)
2662{
2663 struct sd_info *sd_card = &(chip->sd_card);
2664 int retval;
2665 u8 *ptr, card_type, card_type_mask = 0;
2666
2667 CLR_MMC_HS(sd_card);
2668
2669 RTSX_DEBUGP("SD/MMC CMD %d\n", SEND_EXT_CSD);
2670
2671 rtsx_init_cmd(chip);
2672
2673 rtsx_add_cmd(chip, WRITE_REG_CMD, REG_SD_CMD0, 0xFF, 0x40 | SEND_EXT_CSD);
2674 rtsx_add_cmd(chip, WRITE_REG_CMD, REG_SD_CMD1, 0xFF, 0);
2675 rtsx_add_cmd(chip, WRITE_REG_CMD, REG_SD_CMD2, 0xFF, 0);
2676 rtsx_add_cmd(chip, WRITE_REG_CMD, REG_SD_CMD3, 0xFF, 0);
2677 rtsx_add_cmd(chip, WRITE_REG_CMD, REG_SD_CMD4, 0xFF, 0);
2678
2679 rtsx_add_cmd(chip, WRITE_REG_CMD, REG_SD_BYTE_CNT_L, 0xFF, 0);
2680 rtsx_add_cmd(chip, WRITE_REG_CMD, REG_SD_BYTE_CNT_H, 0xFF, 2);
2681 rtsx_add_cmd(chip, WRITE_REG_CMD, REG_SD_BLOCK_CNT_L, 0xFF, 1);
2682 rtsx_add_cmd(chip, WRITE_REG_CMD, REG_SD_BLOCK_CNT_H, 0xFF, 0);
2683
2684 rtsx_add_cmd(chip, WRITE_REG_CMD, REG_SD_CFG2, 0xFF,
2685 SD_CALCULATE_CRC7 | SD_CHECK_CRC16 | SD_NO_WAIT_BUSY_END |
2686 SD_CHECK_CRC7 | SD_RSP_LEN_6);
2687 rtsx_add_cmd(chip, WRITE_REG_CMD, CARD_DATA_SOURCE, 0x01, PINGPONG_BUFFER);
2688 rtsx_add_cmd(chip, WRITE_REG_CMD, REG_SD_TRANSFER, 0xFF, SD_TM_NORMAL_READ | SD_TRANSFER_START);
2689 rtsx_add_cmd(chip, CHECK_REG_CMD, REG_SD_TRANSFER, SD_TRANSFER_END, SD_TRANSFER_END);
2690
2691 rtsx_add_cmd(chip, READ_REG_CMD, PPBUF_BASE2 + 196, 0xFF, 0);
2692 rtsx_add_cmd(chip, READ_REG_CMD, PPBUF_BASE2 + 212, 0xFF, 0);
2693 rtsx_add_cmd(chip, READ_REG_CMD, PPBUF_BASE2 + 213, 0xFF, 0);
2694 rtsx_add_cmd(chip, READ_REG_CMD, PPBUF_BASE2 + 214, 0xFF, 0);
2695 rtsx_add_cmd(chip, READ_REG_CMD, PPBUF_BASE2 + 215, 0xFF, 0);
2696
2697 retval = rtsx_send_cmd(chip, SD_CARD, 1000);
2698 if (retval < 0) {
2699 if (retval == -ETIMEDOUT) {
2700 rtsx_clear_sd_error(chip);
2701 sd_send_cmd_get_rsp(chip, SEND_STATUS, sd_card->sd_addr,
2702 SD_RSP_TYPE_R1, NULL, 0);
2703 }
2704 TRACE_RET(chip, STATUS_FAIL);
2705 }
2706
2707 ptr = rtsx_get_cmd_data(chip);
2708 if (ptr[0] & SD_TRANSFER_ERR) {
2709 sd_send_cmd_get_rsp(chip, SEND_STATUS, sd_card->sd_addr, SD_RSP_TYPE_R1, NULL, 0);
2710 TRACE_RET(chip, STATUS_FAIL);
2711 }
2712
2713 if (CHK_MMC_SECTOR_MODE(sd_card)) {
2714 sd_card->capacity = ((u32)ptr[5] << 24) | ((u32)ptr[4] << 16) |
2715 ((u32)ptr[3] << 8) | ((u32)ptr[2]);
2716 }
2717
2718 if (CHECK_PID(chip, 0x5209)) {
2719#ifdef SUPPORT_SD_LOCK
2720 if (!(sd_card->sd_lock_status & SD_SDR_RST) &&
2721 (chip->sd_ctl & SUPPORT_MMC_DDR_MODE)) {
2722 card_type_mask = 0x07;
2723 } else {
2724 card_type_mask = 0x03;
2725 }
2726#else
2727 if (chip->sd_ctl & SUPPORT_MMC_DDR_MODE)
2728 card_type_mask = 0x07;
2729 else
2730 card_type_mask = 0x03;
2731#endif
2732 } else {
2733 card_type_mask = 0x03;
2734 }
2735 card_type = ptr[1] & card_type_mask;
2736 if (card_type) {
2737 u8 rsp[5];
2738
2739 if (card_type & 0x04) {
2740 if (switch_ddr)
2741 SET_MMC_DDR52(sd_card);
2742 else
2743 SET_MMC_52M(sd_card);
2744 } else if (card_type & 0x02) {
2745 SET_MMC_52M(sd_card);
2746 } else {
2747 SET_MMC_26M(sd_card);
2748 }
2749
2750 retval = sd_send_cmd_get_rsp(chip, SWITCH,
2751 0x03B90100, SD_RSP_TYPE_R1b, rsp, 5);
2752 if ((retval != STATUS_SUCCESS) || (rsp[4] & MMC_SWITCH_ERR))
2753 CLR_MMC_HS(sd_card);
2754 }
2755
2756 sd_choose_proper_clock(chip);
2757 retval = switch_clock(chip, sd_card->sd_clock);
2758 if (retval != STATUS_SUCCESS)
2759 TRACE_RET(chip, STATUS_FAIL);
2760
2761 /* Test Bus Procedure */
2762 retval = mmc_test_switch_bus(chip, MMC_8BIT_BUS);
2763 if (retval == SWITCH_SUCCESS) {
2764 SET_MMC_8BIT(sd_card);
2765 chip->card_bus_width[chip->card2lun[SD_CARD]] = 8;
2766#ifdef SUPPORT_SD_LOCK
2767 sd_card->sd_lock_status &= ~SD_LOCK_1BIT_MODE;
2768#endif
2769 } else if (retval == SWITCH_FAIL) {
2770 retval = mmc_test_switch_bus(chip, MMC_4BIT_BUS);
2771 if (retval == SWITCH_SUCCESS) {
2772 SET_MMC_4BIT(sd_card);
2773 chip->card_bus_width[chip->card2lun[SD_CARD]] = 4;
2774#ifdef SUPPORT_SD_LOCK
2775 sd_card->sd_lock_status &= ~SD_LOCK_1BIT_MODE;
2776#endif
2777 } else if (retval == SWITCH_FAIL) {
2778 CLR_MMC_8BIT(sd_card);
2779 CLR_MMC_4BIT(sd_card);
2780 } else {
2781 TRACE_RET(chip, STATUS_FAIL);
2782 }
2783 } else {
2784 TRACE_RET(chip, STATUS_FAIL);
2785 }
2786
2787 return STATUS_SUCCESS;
2788}
2789
2790
2791static int reset_mmc(struct rtsx_chip *chip)
2792{
2793 struct sd_info *sd_card = &(chip->sd_card);
2794 int retval, i = 0, j = 0, k = 0;
2795 int switch_ddr = 1;
2796 u8 rsp[16];
2797 u8 spec_ver = 0;
2798 u32 temp;
2799
2800#ifdef SUPPORT_SD_LOCK
2801 if (sd_card->sd_lock_status & SD_UNLOCK_POW_ON)
2802 goto MMC_UNLOCK_ENTRY;
2803#endif
2804
2805Switch_Fail:
2806 retval = sd_prepare_reset(chip);
2807 if (retval != STATUS_SUCCESS)
2808 TRACE_RET(chip, retval);
2809
2810 SET_MMC(sd_card);
2811
2812RTY_MMC_RST:
2813 retval = sd_send_cmd_get_rsp(chip, GO_IDLE_STATE, 0, SD_RSP_TYPE_R0, NULL, 0);
2814 if (retval != STATUS_SUCCESS)
2815 TRACE_RET(chip, STATUS_FAIL);
2816
2817 do {
2818 if (detect_card_cd(chip, SD_CARD) != STATUS_SUCCESS) {
2819 sd_set_err_code(chip, SD_NO_CARD);
2820 TRACE_RET(chip, STATUS_FAIL);
2821 }
2822
2823 retval = sd_send_cmd_get_rsp(chip, SEND_OP_COND,
2824 (SUPPORT_VOLTAGE|0x40000000), SD_RSP_TYPE_R3, rsp, 5);
2825 if (retval != STATUS_SUCCESS) {
2826 if (sd_check_err_code(chip, SD_BUSY) || sd_check_err_code(chip, SD_TO_ERR)) {
2827 k++;
2828 if (k < 20) {
2829 sd_clr_err_code(chip);
2830 goto RTY_MMC_RST;
2831 } else {
2832 TRACE_RET(chip, STATUS_FAIL);
2833 }
2834 } else {
2835 j++;
2836 if (j < 100) {
2837 sd_clr_err_code(chip);
2838 goto RTY_MMC_RST;
2839 } else {
2840 TRACE_RET(chip, STATUS_FAIL);
2841 }
2842 }
2843 }
2844
2845 wait_timeout(20);
2846 i++;
2847 } while (!(rsp[1] & 0x80) && (i < 255));
2848
2849 if (i == 255)
2850 TRACE_RET(chip, STATUS_FAIL);
2851
2852 if ((rsp[1] & 0x60) == 0x40)
2853 SET_MMC_SECTOR_MODE(sd_card);
2854 else
2855 CLR_MMC_SECTOR_MODE(sd_card);
2856
2857 retval = sd_send_cmd_get_rsp(chip, ALL_SEND_CID, 0, SD_RSP_TYPE_R2, NULL, 0);
2858 if (retval != STATUS_SUCCESS)
2859 TRACE_RET(chip, STATUS_FAIL);
2860
2861 sd_card->sd_addr = 0x00100000;
2862 retval = sd_send_cmd_get_rsp(chip, SET_RELATIVE_ADDR, sd_card->sd_addr, SD_RSP_TYPE_R6, rsp, 5);
2863 if (retval != STATUS_SUCCESS)
2864 TRACE_RET(chip, STATUS_FAIL);
2865
2866 retval = sd_check_csd(chip, 1);
2867 if (retval != STATUS_SUCCESS)
2868 TRACE_RET(chip, STATUS_FAIL);
2869
2870 spec_ver = (sd_card->raw_csd[0] & 0x3C) >> 2;
2871
2872 retval = sd_select_card(chip, 1);
2873 if (retval != STATUS_SUCCESS)
2874 TRACE_RET(chip, STATUS_FAIL);
2875
2876 retval = sd_send_cmd_get_rsp(chip, SET_BLOCKLEN, 0x200, SD_RSP_TYPE_R1, NULL, 0);
2877 if (retval != STATUS_SUCCESS)
2878 TRACE_RET(chip, STATUS_FAIL);
2879
2880#ifdef SUPPORT_SD_LOCK
2881MMC_UNLOCK_ENTRY:
2882 retval = sd_update_lock_status(chip);
2883 if (retval != STATUS_SUCCESS)
2884 TRACE_RET(chip, STATUS_FAIL);
2885#endif
2886
2887 retval = sd_set_clock_divider(chip, SD_CLK_DIVIDE_0);
2888 if (retval != STATUS_SUCCESS)
2889 TRACE_RET(chip, STATUS_FAIL);
2890
2891 chip->card_bus_width[chip->card2lun[SD_CARD]] = 1;
2892
2893 if (!sd_card->mmc_dont_switch_bus) {
2894 if (spec_ver == 4) {
2895 /* MMC 4.x Cards */
2896 retval = mmc_switch_timing_bus(chip, switch_ddr);
2897 if (retval != STATUS_SUCCESS) {
2898 retval = sd_init_power(chip);
2899 if (retval != STATUS_SUCCESS)
2900 TRACE_RET(chip, STATUS_FAIL);
2901 sd_card->mmc_dont_switch_bus = 1;
2902 TRACE_GOTO(chip, Switch_Fail);
2903 }
2904 }
2905
2906 if (CHK_MMC_SECTOR_MODE(sd_card) && (sd_card->capacity == 0))
2907 TRACE_RET(chip, STATUS_FAIL);
2908
2909 if (switch_ddr && CHK_MMC_DDR52(sd_card)) {
2910 retval = sd_set_init_para(chip);
2911 if (retval != STATUS_SUCCESS)
2912 TRACE_RET(chip, STATUS_FAIL);
2913
2914 retval = mmc_ddr_tuning(chip);
2915 if (retval != STATUS_SUCCESS) {
2916 retval = sd_init_power(chip);
2917 if (retval != STATUS_SUCCESS)
2918 TRACE_RET(chip, STATUS_FAIL);
2919
2920 switch_ddr = 0;
2921 TRACE_GOTO(chip, Switch_Fail);
2922 }
2923
2924 retval = sd_wait_state_data_ready(chip, 0x08, 1, 1000);
2925 if (retval == STATUS_SUCCESS) {
2926 retval = sd_read_lba0(chip);
2927 if (retval != STATUS_SUCCESS) {
2928 retval = sd_init_power(chip);
2929 if (retval != STATUS_SUCCESS)
2930 TRACE_RET(chip, STATUS_FAIL);
2931
2932 switch_ddr = 0;
2933 TRACE_GOTO(chip, Switch_Fail);
2934 }
2935 }
2936 }
2937 }
2938
2939#ifdef SUPPORT_SD_LOCK
2940 if (sd_card->sd_lock_status & SD_UNLOCK_POW_ON) {
2941 RTSX_WRITE_REG(chip, REG_SD_BLOCK_CNT_H, 0xFF, 0x02);
2942 RTSX_WRITE_REG(chip, REG_SD_BLOCK_CNT_L, 0xFF, 0x00);
2943 }
2944#endif
2945
2946 temp = rtsx_readl(chip, RTSX_BIPR);
2947 if (temp & SD_WRITE_PROTECT)
2948 chip->card_wp |= SD_CARD;
2949
2950 return STATUS_SUCCESS;
2951}
2952
2953int reset_sd_card(struct rtsx_chip *chip)
2954{
2955 struct sd_info *sd_card = &(chip->sd_card);
2956 int retval;
2957
2958 sd_init_reg_addr(chip);
2959
2960 memset(sd_card, 0, sizeof(struct sd_info));
2961 chip->capacity[chip->card2lun[SD_CARD]] = 0;
2962
2963 retval = enable_card_clock(chip, SD_CARD);
2964 if (retval != STATUS_SUCCESS)
2965 TRACE_RET(chip, STATUS_FAIL);
2966
2967 if (chip->ignore_sd && CHK_SDIO_EXIST(chip) && !CHK_SDIO_IGNORED(chip)) {
2968 if (chip->asic_code) {
2969 retval = sd_pull_ctl_enable(chip);
2970 if (retval != STATUS_SUCCESS)
2971 TRACE_RET(chip, STATUS_FAIL);
2972 } else {
2973 retval = rtsx_write_register(chip, FPGA_PULL_CTL,
2974 FPGA_SD_PULL_CTL_BIT | 0x20, 0);
2975 if (retval != STATUS_SUCCESS)
2976 TRACE_RET(chip, STATUS_FAIL);
2977 }
2978 retval = card_share_mode(chip, SD_CARD);
2979 if (retval != STATUS_SUCCESS)
2980 TRACE_RET(chip, STATUS_FAIL);
2981
2982 chip->sd_io = 1;
2983 TRACE_RET(chip, STATUS_FAIL);
2984 }
2985
2986 retval = sd_init_power(chip);
2987 if (retval != STATUS_SUCCESS)
2988 TRACE_RET(chip, STATUS_FAIL);
2989
2990 if (chip->sd_ctl & RESET_MMC_FIRST) {
2991 retval = reset_mmc(chip);
2992 if (retval != STATUS_SUCCESS) {
2993 if (sd_check_err_code(chip, SD_NO_CARD))
2994 TRACE_RET(chip, STATUS_FAIL);
2995
2996 retval = reset_sd(chip);
2997 if (retval != STATUS_SUCCESS) {
2998 if (CHECK_PID(chip, 0x5209))
2999 sd_change_bank_voltage(chip, SD_IO_3V3);
3000
3001 TRACE_RET(chip, STATUS_FAIL);
3002 }
3003 }
3004 } else {
3005 retval = reset_sd(chip);
3006 if (retval != STATUS_SUCCESS) {
3007 if (sd_check_err_code(chip, SD_NO_CARD))
3008 TRACE_RET(chip, STATUS_FAIL);
3009
3010 if (CHECK_PID(chip, 0x5209)) {
3011 retval = sd_change_bank_voltage(chip, SD_IO_3V3);
3012 if (retval != STATUS_SUCCESS)
3013 TRACE_RET(chip, STATUS_FAIL);
3014 }
3015
3016 if (chip->sd_io) {
3017 TRACE_RET(chip, STATUS_FAIL);
3018 } else {
3019 retval = reset_mmc(chip);
3020 if (retval != STATUS_SUCCESS)
3021 TRACE_RET(chip, STATUS_FAIL);
3022 }
3023 }
3024 }
3025
3026 retval = sd_set_clock_divider(chip, SD_CLK_DIVIDE_0);
3027 if (retval != STATUS_SUCCESS)
3028 TRACE_RET(chip, STATUS_FAIL);
3029
3030 RTSX_WRITE_REG(chip, REG_SD_BYTE_CNT_L, 0xFF, 0);
3031 RTSX_WRITE_REG(chip, REG_SD_BYTE_CNT_H, 0xFF, 2);
3032
3033 chip->capacity[chip->card2lun[SD_CARD]] = sd_card->capacity;
3034
3035 retval = sd_set_init_para(chip);
3036 if (retval != STATUS_SUCCESS)
3037 TRACE_RET(chip, STATUS_FAIL);
3038
3039 RTSX_DEBUGP("sd_card->sd_type = 0x%x\n", sd_card->sd_type);
3040
3041 return STATUS_SUCCESS;
3042}
3043
3044static int reset_mmc_only(struct rtsx_chip *chip)
3045{
3046 struct sd_info *sd_card = &(chip->sd_card);
3047 int retval;
3048
3049 sd_card->sd_type = 0;
3050 sd_card->seq_mode = 0;
3051 sd_card->sd_data_buf_ready = 0;
3052 sd_card->capacity = 0;
3053 sd_card->sd_switch_fail = 0;
3054
3055#ifdef SUPPORT_SD_LOCK
3056 sd_card->sd_lock_status = 0;
3057 sd_card->sd_erase_status = 0;
3058#endif
3059
3060 chip->capacity[chip->card2lun[SD_CARD]] = sd_card->capacity = 0;
3061
3062 retval = enable_card_clock(chip, SD_CARD);
3063 if (retval != STATUS_SUCCESS)
3064 TRACE_RET(chip, STATUS_FAIL);
3065
3066 retval = sd_init_power(chip);
3067 if (retval != STATUS_SUCCESS)
3068 TRACE_RET(chip, STATUS_FAIL);
3069
3070 retval = reset_mmc(chip);
3071 if (retval != STATUS_SUCCESS)
3072 TRACE_RET(chip, STATUS_FAIL);
3073
3074 retval = sd_set_clock_divider(chip, SD_CLK_DIVIDE_0);
3075 if (retval != STATUS_SUCCESS)
3076 TRACE_RET(chip, STATUS_FAIL);
3077
3078 RTSX_WRITE_REG(chip, REG_SD_BYTE_CNT_L, 0xFF, 0);
3079 RTSX_WRITE_REG(chip, REG_SD_BYTE_CNT_H, 0xFF, 2);
3080
3081 chip->capacity[chip->card2lun[SD_CARD]] = sd_card->capacity;
3082
3083 retval = sd_set_init_para(chip);
3084 if (retval != STATUS_SUCCESS)
3085 TRACE_RET(chip, STATUS_FAIL);
3086
3087 RTSX_DEBUGP("In reset_mmc_only, sd_card->sd_type = 0x%x\n", sd_card->sd_type);
3088
3089 return STATUS_SUCCESS;
3090}
3091
3092#define WAIT_DATA_READY_RTY_CNT 255
3093
3094static int wait_data_buf_ready(struct rtsx_chip *chip)
3095{
3096 struct sd_info *sd_card = &(chip->sd_card);
3097 int i, retval;
3098
3099 for (i = 0; i < WAIT_DATA_READY_RTY_CNT; i++) {
3100 if (detect_card_cd(chip, SD_CARD) != STATUS_SUCCESS) {
3101 sd_set_err_code(chip, SD_NO_CARD);
3102 TRACE_RET(chip, STATUS_FAIL);
3103 }
3104
3105 sd_card->sd_data_buf_ready = 0;
3106
3107 retval = sd_send_cmd_get_rsp(chip, SEND_STATUS,
3108 sd_card->sd_addr, SD_RSP_TYPE_R1, NULL, 0);
3109 if (retval != STATUS_SUCCESS)
3110 TRACE_RET(chip, STATUS_FAIL);
3111
3112 if (sd_card->sd_data_buf_ready) {
3113 return sd_send_cmd_get_rsp(chip, SEND_STATUS,
3114 sd_card->sd_addr, SD_RSP_TYPE_R1, NULL, 0);
3115 }
3116 }
3117
3118 sd_set_err_code(chip, SD_TO_ERR);
3119
3120 TRACE_RET(chip, STATUS_FAIL);
3121}
3122
3123void sd_stop_seq_mode(struct rtsx_chip *chip)
3124{
3125 struct sd_info *sd_card = &(chip->sd_card);
3126 int retval;
3127
3128 if (sd_card->seq_mode) {
3129 retval = sd_switch_clock(chip);
3130 if (retval != STATUS_SUCCESS)
3131 return;
3132
3133 retval = sd_send_cmd_get_rsp(chip, STOP_TRANSMISSION, 0,
3134 SD_RSP_TYPE_R1b, NULL, 0);
3135 if (retval != STATUS_SUCCESS)
3136 sd_set_err_code(chip, SD_STS_ERR);
3137
3138 retval = sd_wait_state_data_ready(chip, 0x08, 1, 1000);
3139 if (retval != STATUS_SUCCESS)
3140 sd_set_err_code(chip, SD_STS_ERR);
3141
3142 sd_card->seq_mode = 0;
3143
3144 rtsx_write_register(chip, RBCTL, RB_FLUSH, RB_FLUSH);
3145 }
3146}
3147
3148static inline int sd_auto_tune_clock(struct rtsx_chip *chip)
3149{
3150 struct sd_info *sd_card = &(chip->sd_card);
3151 int retval;
3152
3153 if (chip->asic_code) {
3154 if (sd_card->sd_clock > 30)
3155 sd_card->sd_clock -= 20;
3156 } else {
3157 switch (sd_card->sd_clock) {
3158 case CLK_200:
3159 sd_card->sd_clock = CLK_150;
3160 break;
3161
3162 case CLK_150:
3163 sd_card->sd_clock = CLK_120;
3164 break;
3165
3166 case CLK_120:
3167 sd_card->sd_clock = CLK_100;
3168 break;
3169
3170 case CLK_100:
3171 sd_card->sd_clock = CLK_80;
3172 break;
3173
3174 case CLK_80:
3175 sd_card->sd_clock = CLK_60;
3176 break;
3177
3178 case CLK_60:
3179 sd_card->sd_clock = CLK_50;
3180 break;
3181
3182 default:
3183 break;
3184 }
3185 }
3186
3187 retval = sd_switch_clock(chip);
3188 if (retval != STATUS_SUCCESS)
3189 TRACE_RET(chip, STATUS_FAIL);
3190
3191 return STATUS_SUCCESS;
3192}
3193
3194int sd_rw(struct scsi_cmnd *srb, struct rtsx_chip *chip, u32 start_sector, u16 sector_cnt)
3195{
3196 struct sd_info *sd_card = &(chip->sd_card);
3197 u32 data_addr;
3198 u8 cfg2;
3199 int retval;
3200
3201 if (srb->sc_data_direction == DMA_FROM_DEVICE) {
3202 RTSX_DEBUGP("sd_rw: Read %d %s from 0x%x\n", sector_cnt,
3203 (sector_cnt > 1) ? "sectors" : "sector", start_sector);
3204 } else {
3205 RTSX_DEBUGP("sd_rw: Write %d %s to 0x%x\n", sector_cnt,
3206 (sector_cnt > 1) ? "sectors" : "sector", start_sector);
3207 }
3208
3209 sd_card->cleanup_counter = 0;
3210
3211 if (!(chip->card_ready & SD_CARD)) {
3212 sd_card->seq_mode = 0;
3213
3214 retval = reset_sd_card(chip);
3215 if (retval == STATUS_SUCCESS) {
3216 chip->card_ready |= SD_CARD;
3217 chip->card_fail &= ~SD_CARD;
3218 } else {
3219 chip->card_ready &= ~SD_CARD;
3220 chip->card_fail |= SD_CARD;
3221 chip->capacity[chip->card2lun[SD_CARD]] = 0;
3222 chip->rw_need_retry = 1;
3223 TRACE_RET(chip, STATUS_FAIL);
3224 }
3225 }
3226
3227 if (!CHK_SD_HCXC(sd_card) && !CHK_MMC_SECTOR_MODE(sd_card))
3228 data_addr = start_sector << 9;
3229 else
3230 data_addr = start_sector;
3231
3232 sd_clr_err_code(chip);
3233
3234 retval = sd_switch_clock(chip);
3235 if (retval != STATUS_SUCCESS) {
3236 sd_set_err_code(chip, SD_IO_ERR);
3237 TRACE_GOTO(chip, RW_FAIL);
3238 }
3239
3240 if (sd_card->seq_mode && ((sd_card->pre_dir != srb->sc_data_direction)
3241 || ((sd_card->pre_sec_addr + sd_card->pre_sec_cnt) != start_sector))) {
3242 if ((sd_card->pre_sec_cnt < 0x80)
3243 && (sd_card->pre_dir == DMA_FROM_DEVICE)
3244 && !CHK_SD30_SPEED(sd_card)
3245 && !CHK_SD_HS(sd_card)
3246 && !CHK_MMC_HS(sd_card)) {
3247 sd_send_cmd_get_rsp(chip, SEND_STATUS,
3248 sd_card->sd_addr, SD_RSP_TYPE_R1, NULL, 0);
3249 }
3250
3251 retval = sd_send_cmd_get_rsp(chip, STOP_TRANSMISSION,
3252 0, SD_RSP_TYPE_R1b, NULL, 0);
3253 if (retval != STATUS_SUCCESS) {
3254 chip->rw_need_retry = 1;
3255 sd_set_err_code(chip, SD_STS_ERR);
3256 TRACE_GOTO(chip, RW_FAIL);
3257 }
3258
3259 sd_card->seq_mode = 0;
3260
3261 retval = rtsx_write_register(chip, RBCTL, RB_FLUSH, RB_FLUSH);
3262 if (retval != STATUS_SUCCESS) {
3263 sd_set_err_code(chip, SD_IO_ERR);
3264 TRACE_GOTO(chip, RW_FAIL);
3265 }
3266
3267 if ((sd_card->pre_sec_cnt < 0x80)
3268 && !CHK_SD30_SPEED(sd_card)
3269 && !CHK_SD_HS(sd_card)
3270 && !CHK_MMC_HS(sd_card)) {
3271 sd_send_cmd_get_rsp(chip, SEND_STATUS,
3272 sd_card->sd_addr, SD_RSP_TYPE_R1, NULL, 0);
3273 }
3274 }
3275
3276 rtsx_init_cmd(chip);
3277
3278 rtsx_add_cmd(chip, WRITE_REG_CMD, REG_SD_BYTE_CNT_L, 0xFF, 0x00);
3279 rtsx_add_cmd(chip, WRITE_REG_CMD, REG_SD_BYTE_CNT_H, 0xFF, 0x02);
3280 rtsx_add_cmd(chip, WRITE_REG_CMD, REG_SD_BLOCK_CNT_L, 0xFF, (u8)sector_cnt);
3281 rtsx_add_cmd(chip, WRITE_REG_CMD, REG_SD_BLOCK_CNT_H, 0xFF, (u8)(sector_cnt >> 8));
3282
3283 rtsx_add_cmd(chip, WRITE_REG_CMD, CARD_DATA_SOURCE, 0x01, RING_BUFFER);
3284
3285 if (CHK_MMC_8BIT(sd_card))
3286 rtsx_add_cmd(chip, WRITE_REG_CMD, REG_SD_CFG1, 0x03, SD_BUS_WIDTH_8);
3287 else if (CHK_MMC_4BIT(sd_card) || CHK_SD(sd_card))
3288 rtsx_add_cmd(chip, WRITE_REG_CMD, REG_SD_CFG1, 0x03, SD_BUS_WIDTH_4);
3289 else
3290 rtsx_add_cmd(chip, WRITE_REG_CMD, REG_SD_CFG1, 0x03, SD_BUS_WIDTH_1);
3291
3292 if (sd_card->seq_mode) {
3293 cfg2 = SD_NO_CALCULATE_CRC7 | SD_CHECK_CRC16 | SD_NO_WAIT_BUSY_END |
3294 SD_NO_CHECK_CRC7 | SD_RSP_LEN_0;
3295 if (CHECK_PID(chip, 0x5209)) {
3296 if (!CHK_SD30_SPEED(sd_card))
3297 cfg2 |= SD_NO_CHECK_WAIT_CRC_TO;
3298 }
3299 rtsx_add_cmd(chip, WRITE_REG_CMD, REG_SD_CFG2, 0xFF, cfg2);
3300
3301 trans_dma_enable(srb->sc_data_direction, chip, sector_cnt * 512, DMA_512);
3302
3303 if (srb->sc_data_direction == DMA_FROM_DEVICE) {
3304 rtsx_add_cmd(chip, WRITE_REG_CMD, REG_SD_TRANSFER, 0xFF,
3305 SD_TM_AUTO_READ_3 | SD_TRANSFER_START);
3306 } else {
3307 rtsx_add_cmd(chip, WRITE_REG_CMD, REG_SD_TRANSFER, 0xFF,
3308 SD_TM_AUTO_WRITE_3 | SD_TRANSFER_START);
3309 }
3310
3311 rtsx_add_cmd(chip, CHECK_REG_CMD, REG_SD_TRANSFER, SD_TRANSFER_END, SD_TRANSFER_END);
3312
3313 rtsx_send_cmd_no_wait(chip);
3314 } else {
3315 if (srb->sc_data_direction == DMA_FROM_DEVICE) {
3316 RTSX_DEBUGP("SD/MMC CMD %d\n", READ_MULTIPLE_BLOCK);
3317 rtsx_add_cmd(chip, WRITE_REG_CMD, REG_SD_CMD0, 0xFF,
3318 0x40 | READ_MULTIPLE_BLOCK);
3319 rtsx_add_cmd(chip, WRITE_REG_CMD, REG_SD_CMD1, 0xFF, (u8)(data_addr >> 24));
3320 rtsx_add_cmd(chip, WRITE_REG_CMD, REG_SD_CMD2, 0xFF, (u8)(data_addr >> 16));
3321 rtsx_add_cmd(chip, WRITE_REG_CMD, REG_SD_CMD3, 0xFF, (u8)(data_addr >> 8));
3322 rtsx_add_cmd(chip, WRITE_REG_CMD, REG_SD_CMD4, 0xFF, (u8)data_addr);
3323
3324 cfg2 = SD_CALCULATE_CRC7 | SD_CHECK_CRC16 | SD_NO_WAIT_BUSY_END |
3325 SD_CHECK_CRC7 | SD_RSP_LEN_6;
3326 if (CHECK_PID(chip, 0x5209)) {
3327 if (!CHK_SD30_SPEED(sd_card))
3328 cfg2 |= SD_NO_CHECK_WAIT_CRC_TO;
3329 }
3330 rtsx_add_cmd(chip, WRITE_REG_CMD, REG_SD_CFG2, 0xFF, cfg2);
3331
3332 trans_dma_enable(srb->sc_data_direction, chip, sector_cnt * 512, DMA_512);
3333
3334 rtsx_add_cmd(chip, WRITE_REG_CMD, REG_SD_TRANSFER, 0xFF,
3335 SD_TM_AUTO_READ_2 | SD_TRANSFER_START);
3336 rtsx_add_cmd(chip, CHECK_REG_CMD, REG_SD_TRANSFER,
3337 SD_TRANSFER_END, SD_TRANSFER_END);
3338
3339 rtsx_send_cmd_no_wait(chip);
3340 } else {
3341 retval = rtsx_send_cmd(chip, SD_CARD, 50);
3342 if (retval < 0) {
3343 rtsx_clear_sd_error(chip);
3344
3345 chip->rw_need_retry = 1;
3346 sd_set_err_code(chip, SD_TO_ERR);
3347 TRACE_GOTO(chip, RW_FAIL);
3348 }
3349
3350 retval = wait_data_buf_ready(chip);
3351 if (retval != STATUS_SUCCESS) {
3352 chip->rw_need_retry = 1;
3353 sd_set_err_code(chip, SD_TO_ERR);
3354 TRACE_GOTO(chip, RW_FAIL);
3355 }
3356
3357 retval = sd_send_cmd_get_rsp(chip, WRITE_MULTIPLE_BLOCK,
3358 data_addr, SD_RSP_TYPE_R1, NULL, 0);
3359 if (retval != STATUS_SUCCESS) {
3360 chip->rw_need_retry = 1;
3361 TRACE_GOTO(chip, RW_FAIL);
3362 }
3363
3364 rtsx_init_cmd(chip);
3365
3366 cfg2 = SD_NO_CALCULATE_CRC7 | SD_CHECK_CRC16 | SD_NO_WAIT_BUSY_END |
3367 SD_NO_CHECK_CRC7 | SD_RSP_LEN_0;
3368 if (CHECK_PID(chip, 0x5209)) {
3369 if (!CHK_SD30_SPEED(sd_card))
3370 cfg2 |= SD_NO_CHECK_WAIT_CRC_TO;
3371 }
3372 rtsx_add_cmd(chip, WRITE_REG_CMD, REG_SD_CFG2, 0xFF, cfg2);
3373
3374 trans_dma_enable(srb->sc_data_direction, chip, sector_cnt * 512, DMA_512);
3375
3376 rtsx_add_cmd(chip, WRITE_REG_CMD, REG_SD_TRANSFER, 0xFF,
3377 SD_TM_AUTO_WRITE_3 | SD_TRANSFER_START);
3378 rtsx_add_cmd(chip, CHECK_REG_CMD, REG_SD_TRANSFER,
3379 SD_TRANSFER_END, SD_TRANSFER_END);
3380
3381 rtsx_send_cmd_no_wait(chip);
3382 }
3383
3384 sd_card->seq_mode = 1;
3385 }
3386
3387 retval = rtsx_transfer_data(chip, SD_CARD, scsi_sglist(srb), scsi_bufflen(srb),
3388 scsi_sg_count(srb), srb->sc_data_direction, chip->sd_timeout);
3389 if (retval < 0) {
3390 u8 stat = 0;
3391 int err;
3392
3393 sd_card->seq_mode = 0;
3394
3395 if (retval == -ETIMEDOUT)
3396 err = STATUS_TIMEDOUT;
3397 else
3398 err = STATUS_FAIL;
3399
3400 rtsx_read_register(chip, REG_SD_STAT1, &stat);
3401 rtsx_clear_sd_error(chip);
3402 if (detect_card_cd(chip, SD_CARD) != STATUS_SUCCESS) {
3403 chip->rw_need_retry = 0;
3404 RTSX_DEBUGP("No card exist, exit sd_rw\n");
3405 TRACE_RET(chip, STATUS_FAIL);
3406 }
3407
3408 chip->rw_need_retry = 1;
3409
3410 retval = sd_send_cmd_get_rsp(chip, STOP_TRANSMISSION, 0, SD_RSP_TYPE_R1b, NULL, 0);
3411 if (retval != STATUS_SUCCESS) {
3412 sd_set_err_code(chip, SD_STS_ERR);
3413 TRACE_GOTO(chip, RW_FAIL);
3414 }
3415
3416 if (stat & (SD_CRC7_ERR | SD_CRC16_ERR | SD_CRC_WRITE_ERR)) {
3417 RTSX_DEBUGP("SD CRC error, tune clock!\n");
3418 sd_set_err_code(chip, SD_CRC_ERR);
3419 TRACE_GOTO(chip, RW_FAIL);
3420 }
3421
3422 if (err == STATUS_TIMEDOUT) {
3423 sd_set_err_code(chip, SD_TO_ERR);
3424 TRACE_GOTO(chip, RW_FAIL);
3425 }
3426
3427 TRACE_RET(chip, err);
3428 }
3429
3430 sd_card->pre_sec_addr = start_sector;
3431 sd_card->pre_sec_cnt = sector_cnt;
3432 sd_card->pre_dir = srb->sc_data_direction;
3433
3434 return STATUS_SUCCESS;
3435
3436RW_FAIL:
3437 sd_card->seq_mode = 0;
3438
3439 if (detect_card_cd(chip, SD_CARD) != STATUS_SUCCESS) {
3440 chip->rw_need_retry = 0;
3441 RTSX_DEBUGP("No card exist, exit sd_rw\n");
3442 TRACE_RET(chip, STATUS_FAIL);
3443 }
3444
3445 if (sd_check_err_code(chip, SD_CRC_ERR)) {
3446 if (CHK_MMC_4BIT(sd_card) || CHK_MMC_8BIT(sd_card)) {
3447 sd_card->mmc_dont_switch_bus = 1;
3448 reset_mmc_only(chip);
3449 sd_card->mmc_dont_switch_bus = 0;
3450 } else {
3451 sd_card->need_retune = 1;
3452 sd_auto_tune_clock(chip);
3453 }
3454 } else if (sd_check_err_code(chip, SD_TO_ERR | SD_STS_ERR)) {
3455 retval = reset_sd_card(chip);
3456 if (retval != STATUS_SUCCESS) {
3457 chip->card_ready &= ~SD_CARD;
3458 chip->card_fail |= SD_CARD;
3459 chip->capacity[chip->card2lun[SD_CARD]] = 0;
3460 }
3461 }
3462
3463 TRACE_RET(chip, STATUS_FAIL);
3464}
3465
3466#ifdef SUPPORT_CPRM
3467int soft_reset_sd_card(struct rtsx_chip *chip)
3468{
3469 return reset_sd(chip);
3470}
3471
3472int ext_sd_send_cmd_get_rsp(struct rtsx_chip *chip, u8 cmd_idx,
3473 u32 arg, u8 rsp_type, u8 *rsp, int rsp_len, int special_check)
3474{
3475 int retval;
3476 int timeout = 100;
3477 u16 reg_addr;
3478 u8 *ptr;
3479 int stat_idx = 0;
3480 int rty_cnt = 0;
3481
3482 RTSX_DEBUGP("EXT SD/MMC CMD %d\n", cmd_idx);
3483
3484 if (rsp_type == SD_RSP_TYPE_R1b)
3485 timeout = 3000;
3486
3487RTY_SEND_CMD:
3488
3489 rtsx_init_cmd(chip);
3490
3491 rtsx_add_cmd(chip, WRITE_REG_CMD, REG_SD_CMD0, 0xFF, 0x40 | cmd_idx);
3492 rtsx_add_cmd(chip, WRITE_REG_CMD, REG_SD_CMD1, 0xFF, (u8)(arg >> 24));
3493 rtsx_add_cmd(chip, WRITE_REG_CMD, REG_SD_CMD2, 0xFF, (u8)(arg >> 16));
3494 rtsx_add_cmd(chip, WRITE_REG_CMD, REG_SD_CMD3, 0xFF, (u8)(arg >> 8));
3495 rtsx_add_cmd(chip, WRITE_REG_CMD, REG_SD_CMD4, 0xFF, (u8)arg);
3496
3497 rtsx_add_cmd(chip, WRITE_REG_CMD, REG_SD_CFG2, 0xFF, rsp_type);
3498 rtsx_add_cmd(chip, WRITE_REG_CMD, CARD_DATA_SOURCE,
3499 0x01, PINGPONG_BUFFER);
3500 rtsx_add_cmd(chip, WRITE_REG_CMD, REG_SD_TRANSFER,
3501 0xFF, SD_TM_CMD_RSP | SD_TRANSFER_START);
3502 rtsx_add_cmd(chip, CHECK_REG_CMD, REG_SD_TRANSFER, SD_TRANSFER_END, SD_TRANSFER_END);
3503
3504 if (rsp_type == SD_RSP_TYPE_R2) {
3505 for (reg_addr = PPBUF_BASE2; reg_addr < PPBUF_BASE2 + 16; reg_addr++)
3506 rtsx_add_cmd(chip, READ_REG_CMD, reg_addr, 0, 0);
3507
3508 stat_idx = 17;
3509 } else if (rsp_type != SD_RSP_TYPE_R0) {
3510 for (reg_addr = REG_SD_CMD0; reg_addr <= REG_SD_CMD4; reg_addr++)
3511 rtsx_add_cmd(chip, READ_REG_CMD, reg_addr, 0, 0);
3512
3513 stat_idx = 6;
3514 }
3515 rtsx_add_cmd(chip, READ_REG_CMD, REG_SD_CMD5, 0, 0);
3516
3517 rtsx_add_cmd(chip, READ_REG_CMD, REG_SD_STAT1, 0, 0);
3518
3519 retval = rtsx_send_cmd(chip, SD_CARD, timeout);
3520 if (retval < 0) {
3521 if (retval == -ETIMEDOUT) {
3522 rtsx_clear_sd_error(chip);
3523
3524 if (rsp_type & SD_WAIT_BUSY_END) {
3525 retval = sd_check_data0_status(chip);
3526 if (retval != STATUS_SUCCESS)
3527 TRACE_RET(chip, retval);
3528 } else {
3529 sd_set_err_code(chip, SD_TO_ERR);
3530 }
3531 }
3532 TRACE_RET(chip, STATUS_FAIL);
3533 }
3534
3535 if (rsp_type == SD_RSP_TYPE_R0)
3536 return STATUS_SUCCESS;
3537
3538 ptr = rtsx_get_cmd_data(chip) + 1;
3539
3540 if ((ptr[0] & 0xC0) != 0) {
3541 sd_set_err_code(chip, SD_STS_ERR);
3542 TRACE_RET(chip, STATUS_FAIL);
3543 }
3544
3545 if (!(rsp_type & SD_NO_CHECK_CRC7)) {
3546 if (ptr[stat_idx] & SD_CRC7_ERR) {
3547 if (cmd_idx == WRITE_MULTIPLE_BLOCK) {
3548 sd_set_err_code(chip, SD_CRC_ERR);
3549 TRACE_RET(chip, STATUS_FAIL);
3550 }
3551 if (rty_cnt < SD_MAX_RETRY_COUNT) {
3552 wait_timeout(20);
3553 rty_cnt++;
3554 goto RTY_SEND_CMD;
3555 } else {
3556 sd_set_err_code(chip, SD_CRC_ERR);
3557 TRACE_RET(chip, STATUS_FAIL);
3558 }
3559 }
3560 }
3561
3562 if ((cmd_idx == SELECT_CARD) || (cmd_idx == APP_CMD) ||
3563 (cmd_idx == SEND_STATUS) || (cmd_idx == STOP_TRANSMISSION)) {
3564 if ((cmd_idx != STOP_TRANSMISSION) && (special_check == 0)) {
3565 if (ptr[1] & 0x80)
3566 TRACE_RET(chip, STATUS_FAIL);
3567 }
3568#ifdef SUPPORT_SD_LOCK
3569 if (ptr[1] & 0x7D)
3570#else
3571 if (ptr[1] & 0x7F)
3572#endif
3573 {
3574 TRACE_RET(chip, STATUS_FAIL);
3575 }
3576 if (ptr[2] & 0xF8)
3577 TRACE_RET(chip, STATUS_FAIL);
3578
3579 if (cmd_idx == SELECT_CARD) {
3580 if (rsp_type == SD_RSP_TYPE_R2) {
3581 if ((ptr[3] & 0x1E) != 0x04)
3582 TRACE_RET(chip, STATUS_FAIL);
3583
3584 } else if (rsp_type == SD_RSP_TYPE_R0) {
3585 if ((ptr[3] & 0x1E) != 0x03)
3586 TRACE_RET(chip, STATUS_FAIL);
3587 }
3588 }
3589 }
3590
3591 if (rsp && rsp_len)
3592 memcpy(rsp, ptr, rsp_len);
3593
3594 return STATUS_SUCCESS;
3595}
3596
3597int ext_sd_get_rsp(struct rtsx_chip *chip, int len, u8 *rsp, u8 rsp_type)
3598{
3599 int retval, rsp_len;
3600 u16 reg_addr;
3601
3602 if (rsp_type == SD_RSP_TYPE_R0)
3603 return STATUS_SUCCESS;
3604
3605 rtsx_init_cmd(chip);
3606
3607 if (rsp_type == SD_RSP_TYPE_R2) {
3608 for (reg_addr = PPBUF_BASE2; reg_addr < PPBUF_BASE2 + 16; reg_addr++)
3609 rtsx_add_cmd(chip, READ_REG_CMD, reg_addr, 0xFF, 0);
3610
3611 rsp_len = 17;
3612 } else if (rsp_type != SD_RSP_TYPE_R0) {
3613 for (reg_addr = REG_SD_CMD0; reg_addr <= REG_SD_CMD4; reg_addr++)
3614 rtsx_add_cmd(chip, READ_REG_CMD, reg_addr, 0xFF, 0);
3615
3616 rsp_len = 6;
3617 }
3618 rtsx_add_cmd(chip, READ_REG_CMD, REG_SD_CMD5, 0xFF, 0);
3619
3620 retval = rtsx_send_cmd(chip, SD_CARD, 100);
3621 if (retval != STATUS_SUCCESS)
3622 TRACE_RET(chip, STATUS_FAIL);
3623
3624 if (rsp) {
3625 int min_len = (rsp_len < len) ? rsp_len : len;
3626
3627 memcpy(rsp, rtsx_get_cmd_data(chip), min_len);
3628
3629 RTSX_DEBUGP("min_len = %d\n", min_len);
3630 RTSX_DEBUGP("Response in cmd buf: 0x%x 0x%x 0x%x 0x%x\n",
3631 rsp[0], rsp[1], rsp[2], rsp[3]);
3632 }
3633
3634 return STATUS_SUCCESS;
3635}
3636
3637int sd_pass_thru_mode(struct scsi_cmnd *srb, struct rtsx_chip *chip)
3638{
3639 struct sd_info *sd_card = &(chip->sd_card);
3640 unsigned int lun = SCSI_LUN(srb);
3641 int len;
3642 u8 buf[18] = {
3643 0x00,
3644 0x00,
3645 0x00,
3646 0x0E,
3647 0x00,
3648 0x00,
3649 0x00,
3650 0x00,
3651 0x53,
3652 0x44,
3653 0x20,
3654 0x43,
3655 0x61,
3656 0x72,
3657 0x64,
3658 0x00,
3659 0x00,
3660 0x00,
3661 };
3662
3663 sd_card->pre_cmd_err = 0;
3664
3665 if (!(CHK_BIT(chip->lun_mc, lun))) {
3666 SET_BIT(chip->lun_mc, lun);
3667 set_sense_type(chip, lun, SENSE_TYPE_MEDIA_CHANGE);
3668 TRACE_RET(chip, TRANSPORT_FAILED);
3669 }
3670
3671 if ((0x53 != srb->cmnd[2]) || (0x44 != srb->cmnd[3]) || (0x20 != srb->cmnd[4]) ||
3672 (0x43 != srb->cmnd[5]) || (0x61 != srb->cmnd[6]) ||
3673 (0x72 != srb->cmnd[7]) || (0x64 != srb->cmnd[8])) {
3674 set_sense_type(chip, lun, SENSE_TYPE_MEDIA_INVALID_CMD_FIELD);
3675 TRACE_RET(chip, TRANSPORT_FAILED);
3676 }
3677
3678 switch (srb->cmnd[1] & 0x0F) {
3679 case 0:
3680 sd_card->sd_pass_thru_en = 0;
3681 break;
3682
3683 case 1:
3684 sd_card->sd_pass_thru_en = 1;
3685 break;
3686
3687 default:
3688 set_sense_type(chip, lun, SENSE_TYPE_MEDIA_INVALID_CMD_FIELD);
3689 TRACE_RET(chip, TRANSPORT_FAILED);
3690 }
3691
3692 buf[5] = (1 == CHK_SD(sd_card)) ? 0x01 : 0x02;
3693 if (chip->card_wp & SD_CARD)
3694 buf[5] |= 0x80;
3695
3696 buf[6] = (u8)(sd_card->sd_addr >> 16);
3697 buf[7] = (u8)(sd_card->sd_addr >> 24);
3698
3699 buf[15] = chip->max_lun;
3700
3701 len = min(18, (int)scsi_bufflen(srb));
3702 rtsx_stor_set_xfer_buf(buf, len, srb);
3703
3704 return TRANSPORT_GOOD;
3705}
3706
3707static inline int get_rsp_type(struct scsi_cmnd *srb, u8 *rsp_type, int *rsp_len)
3708{
3709 if (!rsp_type || !rsp_len)
3710 return STATUS_FAIL;
3711
3712 switch (srb->cmnd[10]) {
3713 case 0x03:
3714 *rsp_type = SD_RSP_TYPE_R0;
3715 *rsp_len = 0;
3716 break;
3717
3718 case 0x04:
3719 *rsp_type = SD_RSP_TYPE_R1;
3720 *rsp_len = 6;
3721 break;
3722
3723 case 0x05:
3724 *rsp_type = SD_RSP_TYPE_R1b;
3725 *rsp_len = 6;
3726 break;
3727
3728 case 0x06:
3729 *rsp_type = SD_RSP_TYPE_R2;
3730 *rsp_len = 17;
3731 break;
3732
3733 case 0x07:
3734 *rsp_type = SD_RSP_TYPE_R3;
3735 *rsp_len = 6;
3736 break;
3737
3738 default:
3739 return STATUS_FAIL;
3740 }
3741
3742 return STATUS_SUCCESS;
3743}
3744
3745int sd_execute_no_data(struct scsi_cmnd *srb, struct rtsx_chip *chip)
3746{
3747 struct sd_info *sd_card = &(chip->sd_card);
3748 unsigned int lun = SCSI_LUN(srb);
3749 int retval, rsp_len;
3750 u8 cmd_idx, rsp_type;
3751 u8 standby = 0, acmd = 0;
3752 u32 arg;
3753
3754 if (!sd_card->sd_pass_thru_en) {
3755 set_sense_type(chip, lun, SENSE_TYPE_MEDIA_INVALID_CMD_FIELD);
3756 TRACE_RET(chip, TRANSPORT_FAILED);
3757 }
3758
3759 retval = sd_switch_clock(chip);
3760 if (retval != STATUS_SUCCESS)
3761 TRACE_RET(chip, TRANSPORT_FAILED);
3762
3763 if (sd_card->pre_cmd_err) {
3764 sd_card->pre_cmd_err = 0;
3765 set_sense_type(chip, lun, SENSE_TYPE_MEDIA_CHANGE);
3766 TRACE_RET(chip, TRANSPORT_FAILED);
3767 }
3768
3769 cmd_idx = srb->cmnd[2] & 0x3F;
3770 if (srb->cmnd[1] & 0x02)
3771 standby = 1;
3772
3773 if (srb->cmnd[1] & 0x01)
3774 acmd = 1;
3775
3776 arg = ((u32)srb->cmnd[3] << 24) | ((u32)srb->cmnd[4] << 16) |
3777 ((u32)srb->cmnd[5] << 8) | srb->cmnd[6];
3778
3779 retval = get_rsp_type(srb, &rsp_type, &rsp_len);
3780 if (retval != STATUS_SUCCESS) {
3781 set_sense_type(chip, lun, SENSE_TYPE_MEDIA_INVALID_CMD_FIELD);
3782 TRACE_RET(chip, TRANSPORT_FAILED);
3783 }
3784 sd_card->last_rsp_type = rsp_type;
3785
3786 retval = sd_switch_clock(chip);
3787 if (retval != STATUS_SUCCESS)
3788 TRACE_RET(chip, TRANSPORT_FAILED);
3789
3790#ifdef SUPPORT_SD_LOCK
3791 if ((sd_card->sd_lock_status & SD_LOCK_1BIT_MODE) == 0) {
3792 if (CHK_MMC_8BIT(sd_card)) {
3793 retval = rtsx_write_register(chip, REG_SD_CFG1, 0x03, SD_BUS_WIDTH_8);
3794 if (retval != STATUS_SUCCESS)
3795 TRACE_RET(chip, TRANSPORT_FAILED);
3796
3797 } else if (CHK_SD(sd_card) || CHK_MMC_4BIT(sd_card)) {
3798 retval = rtsx_write_register(chip, REG_SD_CFG1, 0x03, SD_BUS_WIDTH_4);
3799 if (retval != STATUS_SUCCESS)
3800 TRACE_RET(chip, TRANSPORT_FAILED);
3801 }
3802 }
3803#else
3804 retval = rtsx_write_register(chip, REG_SD_CFG1, 0x03, SD_BUS_WIDTH_4);
3805 if (retval != STATUS_SUCCESS)
3806 TRACE_RET(chip, TRANSPORT_FAILED);
3807#endif
3808
3809 if (standby) {
3810 retval = sd_select_card(chip, 0);
3811 if (retval != STATUS_SUCCESS)
3812 TRACE_GOTO(chip, SD_Execute_Cmd_Failed);
3813 }
3814
3815 if (acmd) {
3816 retval = ext_sd_send_cmd_get_rsp(chip, APP_CMD, sd_card->sd_addr,
3817 SD_RSP_TYPE_R1, NULL, 0, 0);
3818 if (retval != STATUS_SUCCESS)
3819 TRACE_GOTO(chip, SD_Execute_Cmd_Failed);
3820 }
3821
3822 retval = ext_sd_send_cmd_get_rsp(chip, cmd_idx, arg, rsp_type,
3823 sd_card->rsp, rsp_len, 0);
3824 if (retval != STATUS_SUCCESS)
3825 TRACE_GOTO(chip, SD_Execute_Cmd_Failed);
3826
3827 if (standby) {
3828 retval = sd_select_card(chip, 1);
3829 if (retval != STATUS_SUCCESS)
3830 TRACE_GOTO(chip, SD_Execute_Cmd_Failed);
3831 }
3832
3833#ifdef SUPPORT_SD_LOCK
3834 retval = sd_update_lock_status(chip);
3835 if (retval != STATUS_SUCCESS)
3836 TRACE_GOTO(chip, SD_Execute_Cmd_Failed);
3837#endif
3838
3839 scsi_set_resid(srb, 0);
3840 return TRANSPORT_GOOD;
3841
3842SD_Execute_Cmd_Failed:
3843 sd_card->pre_cmd_err = 1;
3844 set_sense_type(chip, lun, SENSE_TYPE_NO_SENSE);
3845 release_sd_card(chip);
3846 do_reset_sd_card(chip);
3847 if (!(chip->card_ready & SD_CARD))
3848 set_sense_type(chip, lun, SENSE_TYPE_MEDIA_NOT_PRESENT);
3849
3850 TRACE_RET(chip, TRANSPORT_FAILED);
3851}
3852
3853int sd_execute_read_data(struct scsi_cmnd *srb, struct rtsx_chip *chip)
3854{
3855 struct sd_info *sd_card = &(chip->sd_card);
3856 unsigned int lun = SCSI_LUN(srb);
3857 int retval, rsp_len, i;
3858 int cmd13_checkbit = 0, read_err = 0;
3859 u8 cmd_idx, rsp_type, bus_width;
3860 u8 send_cmd12 = 0, standby = 0, acmd = 0;
3861 u32 data_len;
3862
3863 if (!sd_card->sd_pass_thru_en) {
3864 set_sense_type(chip, lun, SENSE_TYPE_MEDIA_INVALID_CMD_FIELD);
3865 TRACE_RET(chip, TRANSPORT_FAILED);
3866 }
3867
3868 if (sd_card->pre_cmd_err) {
3869 sd_card->pre_cmd_err = 0;
3870 set_sense_type(chip, lun, SENSE_TYPE_MEDIA_CHANGE);
3871 TRACE_RET(chip, TRANSPORT_FAILED);
3872 }
3873
3874 retval = sd_switch_clock(chip);
3875 if (retval != STATUS_SUCCESS)
3876 TRACE_RET(chip, TRANSPORT_FAILED);
3877
3878 cmd_idx = srb->cmnd[2] & 0x3F;
3879 if (srb->cmnd[1] & 0x04)
3880 send_cmd12 = 1;
3881
3882 if (srb->cmnd[1] & 0x02)
3883 standby = 1;
3884
3885 if (srb->cmnd[1] & 0x01)
3886 acmd = 1;
3887
3888 data_len = ((u32)srb->cmnd[7] << 16) | ((u32)srb->cmnd[8] << 8) | srb->cmnd[9];
3889
3890 retval = get_rsp_type(srb, &rsp_type, &rsp_len);
3891 if (retval != STATUS_SUCCESS) {
3892 set_sense_type(chip, lun, SENSE_TYPE_MEDIA_INVALID_CMD_FIELD);
3893 TRACE_RET(chip, TRANSPORT_FAILED);
3894 }
3895 sd_card->last_rsp_type = rsp_type;
3896
3897 retval = sd_switch_clock(chip);
3898 if (retval != STATUS_SUCCESS)
3899 TRACE_RET(chip, TRANSPORT_FAILED);
3900
3901#ifdef SUPPORT_SD_LOCK
3902 if ((sd_card->sd_lock_status & SD_LOCK_1BIT_MODE) == 0) {
3903 if (CHK_MMC_8BIT(sd_card))
3904 bus_width = SD_BUS_WIDTH_8;
3905 else if (CHK_SD(sd_card) || CHK_MMC_4BIT(sd_card))
3906 bus_width = SD_BUS_WIDTH_4;
3907 else
3908 bus_width = SD_BUS_WIDTH_1;
3909 } else {
3910 bus_width = SD_BUS_WIDTH_4;
3911 }
3912 RTSX_DEBUGP("bus_width = %d\n", bus_width);
3913#else
3914 bus_width = SD_BUS_WIDTH_4;
3915#endif
3916
3917 if (data_len < 512) {
3918 retval = ext_sd_send_cmd_get_rsp(chip, SET_BLOCKLEN, data_len,
3919 SD_RSP_TYPE_R1, NULL, 0, 0);
3920 if (retval != STATUS_SUCCESS)
3921 TRACE_GOTO(chip, SD_Execute_Read_Cmd_Failed);
3922 }
3923
3924 if (standby) {
3925 retval = sd_select_card(chip, 0);
3926 if (retval != STATUS_SUCCESS)
3927 TRACE_GOTO(chip, SD_Execute_Read_Cmd_Failed);
3928 }
3929
3930 if (acmd) {
3931 retval = ext_sd_send_cmd_get_rsp(chip, APP_CMD, sd_card->sd_addr,
3932 SD_RSP_TYPE_R1, NULL, 0, 0);
3933 if (retval != STATUS_SUCCESS)
3934 TRACE_GOTO(chip, SD_Execute_Read_Cmd_Failed);
3935 }
3936
3937 if (data_len <= 512) {
3938 int min_len;
3939 u8 *buf;
3940 u16 byte_cnt, blk_cnt;
3941 u8 cmd[5];
3942
3943 byte_cnt = ((u16)(srb->cmnd[8] & 0x03) << 8) | srb->cmnd[9];
3944 blk_cnt = 1;
3945
3946 cmd[0] = 0x40 | cmd_idx;
3947 cmd[1] = srb->cmnd[3];
3948 cmd[2] = srb->cmnd[4];
3949 cmd[3] = srb->cmnd[5];
3950 cmd[4] = srb->cmnd[6];
3951
3952 buf = kmalloc(data_len, GFP_KERNEL);
3953 if (buf == NULL)
3954 TRACE_RET(chip, TRANSPORT_ERROR);
3955
3956 retval = sd_read_data(chip, SD_TM_NORMAL_READ, cmd, 5, byte_cnt,
3957 blk_cnt, bus_width, buf, data_len, 2000);
3958 if (retval != STATUS_SUCCESS) {
3959 read_err = 1;
3960 kfree(buf);
3961 rtsx_clear_sd_error(chip);
3962 TRACE_GOTO(chip, SD_Execute_Read_Cmd_Failed);
3963 }
3964
3965 min_len = min(data_len, scsi_bufflen(srb));
3966 rtsx_stor_set_xfer_buf(buf, min_len, srb);
3967
3968 kfree(buf);
3969 } else if (!(data_len & 0x1FF)) {
3970 rtsx_init_cmd(chip);
3971
3972 trans_dma_enable(DMA_FROM_DEVICE, chip, data_len, DMA_512);
3973
3974 rtsx_add_cmd(chip, WRITE_REG_CMD, REG_SD_BYTE_CNT_H, 0xFF, 0x02);
3975 rtsx_add_cmd(chip, WRITE_REG_CMD, REG_SD_BYTE_CNT_L, 0xFF, 0x00);
3976 rtsx_add_cmd(chip, WRITE_REG_CMD, REG_SD_BLOCK_CNT_H,
3977 0xFF, (srb->cmnd[7] & 0xFE) >> 1);
3978 rtsx_add_cmd(chip, WRITE_REG_CMD, REG_SD_BLOCK_CNT_L,
3979 0xFF, (u8)((data_len & 0x0001FE00) >> 9));
3980
3981 rtsx_add_cmd(chip, WRITE_REG_CMD, REG_SD_CMD0, 0xFF, 0x40 | cmd_idx);
3982 rtsx_add_cmd(chip, WRITE_REG_CMD, REG_SD_CMD1, 0xFF, srb->cmnd[3]);
3983 rtsx_add_cmd(chip, WRITE_REG_CMD, REG_SD_CMD2, 0xFF, srb->cmnd[4]);
3984 rtsx_add_cmd(chip, WRITE_REG_CMD, REG_SD_CMD3, 0xFF, srb->cmnd[5]);
3985 rtsx_add_cmd(chip, WRITE_REG_CMD, REG_SD_CMD4, 0xFF, srb->cmnd[6]);
3986
3987 rtsx_add_cmd(chip, WRITE_REG_CMD, REG_SD_CFG1, 0x03, bus_width);
3988 rtsx_add_cmd(chip, WRITE_REG_CMD, REG_SD_CFG2, 0xFF, rsp_type);
3989
3990 rtsx_add_cmd(chip, WRITE_REG_CMD, REG_SD_TRANSFER,
3991 0xFF, SD_TM_AUTO_READ_2 | SD_TRANSFER_START);
3992 rtsx_add_cmd(chip, CHECK_REG_CMD, REG_SD_TRANSFER, SD_TRANSFER_END, SD_TRANSFER_END);
3993
3994 rtsx_send_cmd_no_wait(chip);
3995
3996 retval = rtsx_transfer_data(chip, SD_CARD, scsi_sglist(srb), scsi_bufflen(srb),
3997 scsi_sg_count(srb), DMA_FROM_DEVICE, 10000);
3998 if (retval < 0) {
3999 read_err = 1;
4000 rtsx_clear_sd_error(chip);
4001 TRACE_GOTO(chip, SD_Execute_Read_Cmd_Failed);
4002 }
4003
4004 } else {
4005 TRACE_GOTO(chip, SD_Execute_Read_Cmd_Failed);
4006 }
4007
4008 retval = ext_sd_get_rsp(chip, rsp_len, sd_card->rsp, rsp_type);
4009 if (retval != STATUS_SUCCESS)
4010 TRACE_GOTO(chip, SD_Execute_Read_Cmd_Failed);
4011
4012 if (standby) {
4013 retval = sd_select_card(chip, 1);
4014 if (retval != STATUS_SUCCESS)
4015 TRACE_GOTO(chip, SD_Execute_Read_Cmd_Failed);
4016 }
4017
4018 if (send_cmd12) {
4019 retval = ext_sd_send_cmd_get_rsp(chip, STOP_TRANSMISSION,
4020 0, SD_RSP_TYPE_R1b, NULL, 0, 0);
4021 if (retval != STATUS_SUCCESS)
4022 TRACE_GOTO(chip, SD_Execute_Read_Cmd_Failed);
4023 }
4024
4025 if (data_len < 512) {
4026 retval = ext_sd_send_cmd_get_rsp(chip, SET_BLOCKLEN, 0x200,
4027 SD_RSP_TYPE_R1, NULL, 0, 0);
4028 if (retval != STATUS_SUCCESS)
4029 TRACE_GOTO(chip, SD_Execute_Read_Cmd_Failed);
4030
4031 retval = rtsx_write_register(chip, SD_BYTE_CNT_H, 0xFF, 0x02);
4032 if (retval != STATUS_SUCCESS)
4033 TRACE_GOTO(chip, SD_Execute_Read_Cmd_Failed);
4034
4035 retval = rtsx_write_register(chip, SD_BYTE_CNT_L, 0xFF, 0x00);
4036 if (retval != STATUS_SUCCESS)
4037 TRACE_GOTO(chip, SD_Execute_Read_Cmd_Failed);
4038 }
4039
4040 if ((srb->cmnd[1] & 0x02) || (srb->cmnd[1] & 0x04))
4041 cmd13_checkbit = 1;
4042
4043 for (i = 0; i < 3; i++) {
4044 retval = ext_sd_send_cmd_get_rsp(chip, SEND_STATUS, sd_card->sd_addr,
4045 SD_RSP_TYPE_R1, NULL, 0, cmd13_checkbit);
4046 if (retval == STATUS_SUCCESS)
4047 break;
4048 }
4049 if (retval != STATUS_SUCCESS)
4050 TRACE_GOTO(chip, SD_Execute_Read_Cmd_Failed);
4051
4052 scsi_set_resid(srb, 0);
4053 return TRANSPORT_GOOD;
4054
4055SD_Execute_Read_Cmd_Failed:
4056 sd_card->pre_cmd_err = 1;
4057 set_sense_type(chip, lun, SENSE_TYPE_NO_SENSE);
4058 if (read_err)
4059 set_sense_type(chip, lun, SENSE_TYPE_MEDIA_UNRECOVER_READ_ERR);
4060
4061 release_sd_card(chip);
4062 do_reset_sd_card(chip);
4063 if (!(chip->card_ready & SD_CARD))
4064 set_sense_type(chip, lun, SENSE_TYPE_MEDIA_NOT_PRESENT);
4065
4066 TRACE_RET(chip, TRANSPORT_FAILED);
4067}
4068
4069int sd_execute_write_data(struct scsi_cmnd *srb, struct rtsx_chip *chip)
4070{
4071 struct sd_info *sd_card = &(chip->sd_card);
4072 unsigned int lun = SCSI_LUN(srb);
4073 int retval, rsp_len, i;
4074 int cmd13_checkbit = 0, write_err = 0;
4075 u8 cmd_idx, rsp_type;
4076 u8 send_cmd12 = 0, standby = 0, acmd = 0;
4077 u32 data_len, arg;
4078#ifdef SUPPORT_SD_LOCK
4079 int lock_cmd_fail = 0;
4080 u8 sd_lock_state = 0;
4081 u8 lock_cmd_type = 0;
4082#endif
4083
4084 if (!sd_card->sd_pass_thru_en) {
4085 set_sense_type(chip, lun, SENSE_TYPE_MEDIA_INVALID_CMD_FIELD);
4086 TRACE_RET(chip, TRANSPORT_FAILED);
4087 }
4088
4089 if (sd_card->pre_cmd_err) {
4090 sd_card->pre_cmd_err = 0;
4091 set_sense_type(chip, lun, SENSE_TYPE_MEDIA_CHANGE);
4092 TRACE_RET(chip, TRANSPORT_FAILED);
4093 }
4094
4095 retval = sd_switch_clock(chip);
4096 if (retval != STATUS_SUCCESS)
4097 TRACE_RET(chip, TRANSPORT_FAILED);
4098
4099 cmd_idx = srb->cmnd[2] & 0x3F;
4100 if (srb->cmnd[1] & 0x04)
4101 send_cmd12 = 1;
4102
4103 if (srb->cmnd[1] & 0x02)
4104 standby = 1;
4105
4106 if (srb->cmnd[1] & 0x01)
4107 acmd = 1;
4108
4109 data_len = ((u32)srb->cmnd[7] << 16) | ((u32)srb->cmnd[8] << 8) | srb->cmnd[9];
4110 arg = ((u32)srb->cmnd[3] << 24) | ((u32)srb->cmnd[4] << 16) |
4111 ((u32)srb->cmnd[5] << 8) | srb->cmnd[6];
4112
4113#ifdef SUPPORT_SD_LOCK
4114 if (cmd_idx == LOCK_UNLOCK) {
4115 sd_lock_state = sd_card->sd_lock_status;
4116 sd_lock_state &= SD_LOCKED;
4117 }
4118#endif
4119
4120 retval = get_rsp_type(srb, &rsp_type, &rsp_len);
4121 if (retval != STATUS_SUCCESS) {
4122 set_sense_type(chip, lun, SENSE_TYPE_MEDIA_INVALID_CMD_FIELD);
4123 TRACE_RET(chip, TRANSPORT_FAILED);
4124 }
4125 sd_card->last_rsp_type = rsp_type;
4126
4127 retval = sd_switch_clock(chip);
4128 if (retval != STATUS_SUCCESS)
4129 TRACE_RET(chip, TRANSPORT_FAILED);
4130
4131#ifdef SUPPORT_SD_LOCK
4132 if ((sd_card->sd_lock_status & SD_LOCK_1BIT_MODE) == 0) {
4133 if (CHK_MMC_8BIT(sd_card)) {
4134 retval = rtsx_write_register(chip, REG_SD_CFG1, 0x03, SD_BUS_WIDTH_8);
4135 if (retval != STATUS_SUCCESS)
4136 TRACE_RET(chip, TRANSPORT_FAILED);
4137
4138 } else if (CHK_SD(sd_card) || CHK_MMC_4BIT(sd_card)) {
4139 retval = rtsx_write_register(chip, REG_SD_CFG1, 0x03, SD_BUS_WIDTH_4);
4140 if (retval != STATUS_SUCCESS)
4141 TRACE_RET(chip, TRANSPORT_FAILED);
4142 }
4143 }
4144#else
4145 retval = rtsx_write_register(chip, REG_SD_CFG1, 0x03, SD_BUS_WIDTH_4);
4146 if (retval != STATUS_SUCCESS)
4147 TRACE_RET(chip, TRANSPORT_FAILED);
4148#endif
4149
4150 if (data_len < 512) {
4151 retval = ext_sd_send_cmd_get_rsp(chip, SET_BLOCKLEN, data_len,
4152 SD_RSP_TYPE_R1, NULL, 0, 0);
4153 if (retval != STATUS_SUCCESS)
4154 TRACE_GOTO(chip, SD_Execute_Write_Cmd_Failed);
4155 }
4156
4157 if (standby) {
4158 retval = sd_select_card(chip, 0);
4159 if (retval != STATUS_SUCCESS)
4160 TRACE_GOTO(chip, SD_Execute_Write_Cmd_Failed);
4161 }
4162
4163 if (acmd) {
4164 retval = ext_sd_send_cmd_get_rsp(chip, APP_CMD, sd_card->sd_addr,
4165 SD_RSP_TYPE_R1, NULL, 0, 0);
4166 if (retval != STATUS_SUCCESS)
4167 TRACE_GOTO(chip, SD_Execute_Write_Cmd_Failed);
4168 }
4169
4170 retval = ext_sd_send_cmd_get_rsp(chip, cmd_idx, arg, rsp_type,
4171 sd_card->rsp, rsp_len, 0);
4172 if (retval != STATUS_SUCCESS)
4173 TRACE_GOTO(chip, SD_Execute_Write_Cmd_Failed);
4174
4175 if (data_len <= 512) {
4176 u16 i;
4177 u8 *buf;
4178
4179 buf = kmalloc(data_len, GFP_KERNEL);
4180 if (buf == NULL)
4181 TRACE_RET(chip, TRANSPORT_ERROR);
4182
4183 rtsx_stor_get_xfer_buf(buf, data_len, srb);
4184
4185#ifdef SUPPORT_SD_LOCK
4186 if (cmd_idx == LOCK_UNLOCK)
4187 lock_cmd_type = buf[0] & 0x0F;
4188#endif
4189
4190 if (data_len > 256) {
4191 rtsx_init_cmd(chip);
4192 for (i = 0; i < 256; i++) {
4193 rtsx_add_cmd(chip, WRITE_REG_CMD,
4194 PPBUF_BASE2 + i, 0xFF, buf[i]);
4195 }
4196 retval = rtsx_send_cmd(chip, 0, 250);
4197 if (retval != STATUS_SUCCESS) {
4198 kfree(buf);
4199 TRACE_GOTO(chip, SD_Execute_Write_Cmd_Failed);
4200 }
4201
4202 rtsx_init_cmd(chip);
4203 for (i = 256; i < data_len; i++) {
4204 rtsx_add_cmd(chip, WRITE_REG_CMD,
4205 PPBUF_BASE2 + i, 0xFF, buf[i]);
4206 }
4207 retval = rtsx_send_cmd(chip, 0, 250);
4208 if (retval != STATUS_SUCCESS) {
4209 kfree(buf);
4210 TRACE_GOTO(chip, SD_Execute_Write_Cmd_Failed);
4211 }
4212 } else {
4213 rtsx_init_cmd(chip);
4214 for (i = 0; i < data_len; i++) {
4215 rtsx_add_cmd(chip, WRITE_REG_CMD,
4216 PPBUF_BASE2 + i, 0xFF, buf[i]);
4217 }
4218 retval = rtsx_send_cmd(chip, 0, 250);
4219 if (retval != STATUS_SUCCESS) {
4220 kfree(buf);
4221 TRACE_GOTO(chip, SD_Execute_Write_Cmd_Failed);
4222 }
4223 }
4224
4225 kfree(buf);
4226
4227 rtsx_init_cmd(chip);
4228
4229 rtsx_add_cmd(chip, WRITE_REG_CMD, REG_SD_BYTE_CNT_H, 0xFF, srb->cmnd[8] & 0x03);
4230 rtsx_add_cmd(chip, WRITE_REG_CMD, REG_SD_BYTE_CNT_L, 0xFF, srb->cmnd[9]);
4231 rtsx_add_cmd(chip, WRITE_REG_CMD, REG_SD_BLOCK_CNT_H, 0xFF, 0x00);
4232 rtsx_add_cmd(chip, WRITE_REG_CMD, REG_SD_BLOCK_CNT_L, 0xFF, 0x01);
4233 rtsx_add_cmd(chip, WRITE_REG_CMD, CARD_DATA_SOURCE, 0x01, PINGPONG_BUFFER);
4234
4235 rtsx_add_cmd(chip, WRITE_REG_CMD, REG_SD_TRANSFER, 0xFF,
4236 SD_TM_AUTO_WRITE_3 | SD_TRANSFER_START);
4237 rtsx_add_cmd(chip, CHECK_REG_CMD, REG_SD_TRANSFER, SD_TRANSFER_END, SD_TRANSFER_END);
4238
4239 retval = rtsx_send_cmd(chip, SD_CARD, 250);
4240 } else if (!(data_len & 0x1FF)) {
4241 rtsx_init_cmd(chip);
4242
4243 trans_dma_enable(DMA_TO_DEVICE, chip, data_len, DMA_512);
4244
4245 rtsx_add_cmd(chip, WRITE_REG_CMD, REG_SD_BYTE_CNT_H, 0xFF, 0x02);
4246 rtsx_add_cmd(chip, WRITE_REG_CMD, REG_SD_BYTE_CNT_L, 0xFF, 0x00);
4247 rtsx_add_cmd(chip, WRITE_REG_CMD, REG_SD_BLOCK_CNT_H,
4248 0xFF, (srb->cmnd[7] & 0xFE) >> 1);
4249 rtsx_add_cmd(chip, WRITE_REG_CMD, REG_SD_BLOCK_CNT_L,
4250 0xFF, (u8)((data_len & 0x0001FE00) >> 9));
4251
4252 rtsx_add_cmd(chip, WRITE_REG_CMD, REG_SD_TRANSFER, 0xFF, SD_TM_AUTO_WRITE_3 | SD_TRANSFER_START);
4253 rtsx_add_cmd(chip, CHECK_REG_CMD, REG_SD_TRANSFER, SD_TRANSFER_END, SD_TRANSFER_END);
4254
4255 rtsx_send_cmd_no_wait(chip);
4256
4257 retval = rtsx_transfer_data(chip, SD_CARD, scsi_sglist(srb), scsi_bufflen(srb),
4258 scsi_sg_count(srb), DMA_TO_DEVICE, 10000);
4259
4260 } else {
4261 TRACE_GOTO(chip, SD_Execute_Write_Cmd_Failed);
4262 }
4263
4264 if (retval < 0) {
4265 write_err = 1;
4266 rtsx_clear_sd_error(chip);
4267 TRACE_GOTO(chip, SD_Execute_Write_Cmd_Failed);
4268 }
4269
4270#ifdef SUPPORT_SD_LOCK
4271 if (cmd_idx == LOCK_UNLOCK) {
4272 if (lock_cmd_type == SD_ERASE) {
4273 sd_card->sd_erase_status = SD_UNDER_ERASING;
4274 scsi_set_resid(srb, 0);
4275 return TRANSPORT_GOOD;
4276 }
4277
4278 rtsx_init_cmd(chip);
4279 if (CHECK_PID(chip, 0x5209))
4280 rtsx_add_cmd(chip, CHECK_REG_CMD, SD_BUS_STAT, SD_DAT0_STATUS, SD_DAT0_STATUS);
4281 else
4282 rtsx_add_cmd(chip, CHECK_REG_CMD, 0xFD30, 0x02, 0x02);
4283
4284 rtsx_send_cmd(chip, SD_CARD, 250);
4285
4286 retval = sd_update_lock_status(chip);
4287 if (retval != STATUS_SUCCESS) {
4288 RTSX_DEBUGP("Lock command fail!\n");
4289 lock_cmd_fail = 1;
4290 }
4291 }
4292#endif /* SUPPORT_SD_LOCK */
4293
4294 if (standby) {
4295 retval = sd_select_card(chip, 1);
4296 if (retval != STATUS_SUCCESS)
4297 TRACE_GOTO(chip, SD_Execute_Write_Cmd_Failed);
4298 }
4299
4300 if (send_cmd12) {
4301 retval = ext_sd_send_cmd_get_rsp(chip, STOP_TRANSMISSION,
4302 0, SD_RSP_TYPE_R1b, NULL, 0, 0);
4303 if (retval != STATUS_SUCCESS)
4304 TRACE_GOTO(chip, SD_Execute_Write_Cmd_Failed);
4305 }
4306
4307 if (data_len < 512) {
4308 retval = ext_sd_send_cmd_get_rsp(chip, SET_BLOCKLEN, 0x200,
4309 SD_RSP_TYPE_R1, NULL, 0, 0);
4310 if (retval != STATUS_SUCCESS)
4311 TRACE_GOTO(chip, SD_Execute_Write_Cmd_Failed);
4312
4313 retval = rtsx_write_register(chip, SD_BYTE_CNT_H, 0xFF, 0x02);
4314 if (retval != STATUS_SUCCESS)
4315 TRACE_GOTO(chip, SD_Execute_Write_Cmd_Failed);
4316
4317 rtsx_write_register(chip, SD_BYTE_CNT_L, 0xFF, 0x00);
4318 if (retval != STATUS_SUCCESS)
4319 TRACE_GOTO(chip, SD_Execute_Write_Cmd_Failed);
4320 }
4321
4322 if ((srb->cmnd[1] & 0x02) || (srb->cmnd[1] & 0x04))
4323 cmd13_checkbit = 1;
4324
4325 for (i = 0; i < 3; i++) {
4326 retval = ext_sd_send_cmd_get_rsp(chip, SEND_STATUS, sd_card->sd_addr,
4327 SD_RSP_TYPE_R1, NULL, 0, cmd13_checkbit);
4328 if (retval == STATUS_SUCCESS)
4329 break;
4330 }
4331 if (retval != STATUS_SUCCESS)
4332 TRACE_GOTO(chip, SD_Execute_Write_Cmd_Failed);
4333
4334#ifdef SUPPORT_SD_LOCK
4335 if (cmd_idx == LOCK_UNLOCK) {
4336 if (!lock_cmd_fail) {
4337 RTSX_DEBUGP("lock_cmd_type = 0x%x\n", lock_cmd_type);
4338 if (lock_cmd_type & SD_CLR_PWD)
4339 sd_card->sd_lock_status &= ~SD_PWD_EXIST;
4340
4341 if (lock_cmd_type & SD_SET_PWD)
4342 sd_card->sd_lock_status |= SD_PWD_EXIST;
4343 }
4344
4345 RTSX_DEBUGP("sd_lock_state = 0x%x, sd_card->sd_lock_status = 0x%x\n",
4346 sd_lock_state, sd_card->sd_lock_status);
4347 if (sd_lock_state ^ (sd_card->sd_lock_status & SD_LOCKED)) {
4348 sd_card->sd_lock_notify = 1;
4349 if (sd_lock_state) {
4350 if (sd_card->sd_lock_status & SD_LOCK_1BIT_MODE) {
4351 sd_card->sd_lock_status |= (SD_UNLOCK_POW_ON | SD_SDR_RST);
4352 if (CHK_SD(sd_card)) {
4353 retval = reset_sd(chip);
4354 if (retval != STATUS_SUCCESS) {
4355 sd_card->sd_lock_status &= ~(SD_UNLOCK_POW_ON | SD_SDR_RST);
4356 TRACE_GOTO(chip, SD_Execute_Write_Cmd_Failed);
4357 }
4358 }
4359
4360 sd_card->sd_lock_status &= ~(SD_UNLOCK_POW_ON | SD_SDR_RST);
4361 }
4362 }
4363 }
4364 }
4365
4366 if (lock_cmd_fail) {
4367 scsi_set_resid(srb, 0);
4368 set_sense_type(chip, lun, SENSE_TYPE_NO_SENSE);
4369 TRACE_RET(chip, TRANSPORT_FAILED);
4370 }
4371#endif /* SUPPORT_SD_LOCK */
4372
4373 scsi_set_resid(srb, 0);
4374 return TRANSPORT_GOOD;
4375
4376SD_Execute_Write_Cmd_Failed:
4377 sd_card->pre_cmd_err = 1;
4378 set_sense_type(chip, lun, SENSE_TYPE_NO_SENSE);
4379 if (write_err)
4380 set_sense_type(chip, lun, SENSE_TYPE_MEDIA_WRITE_ERR);
4381
4382 release_sd_card(chip);
4383 do_reset_sd_card(chip);
4384 if (!(chip->card_ready & SD_CARD))
4385 set_sense_type(chip, lun, SENSE_TYPE_MEDIA_NOT_PRESENT);
4386
4387 TRACE_RET(chip, TRANSPORT_FAILED);
4388}
4389
4390int sd_get_cmd_rsp(struct scsi_cmnd *srb, struct rtsx_chip *chip)
4391{
4392 struct sd_info *sd_card = &(chip->sd_card);
4393 unsigned int lun = SCSI_LUN(srb);
4394 int count;
4395 u16 data_len;
4396
4397 if (!sd_card->sd_pass_thru_en) {
4398 set_sense_type(chip, lun, SENSE_TYPE_MEDIA_INVALID_CMD_FIELD);
4399 TRACE_RET(chip, TRANSPORT_FAILED);
4400 }
4401
4402 if (sd_card->pre_cmd_err) {
4403 sd_card->pre_cmd_err = 0;
4404 set_sense_type(chip, lun, SENSE_TYPE_MEDIA_CHANGE);
4405 TRACE_RET(chip, TRANSPORT_FAILED);
4406 }
4407
4408 data_len = ((u16)srb->cmnd[7] << 8) | srb->cmnd[8];
4409
4410 if (sd_card->last_rsp_type == SD_RSP_TYPE_R0) {
4411 set_sense_type(chip, lun, SENSE_TYPE_MEDIA_INVALID_CMD_FIELD);
4412 TRACE_RET(chip, TRANSPORT_FAILED);
4413 } else if (sd_card->last_rsp_type == SD_RSP_TYPE_R2) {
4414 count = (data_len < 17) ? data_len : 17;
4415 } else {
4416 count = (data_len < 6) ? data_len : 6;
4417 }
4418 rtsx_stor_set_xfer_buf(sd_card->rsp, count, srb);
4419
4420 RTSX_DEBUGP("Response length: %d\n", data_len);
4421 RTSX_DEBUGP("Response: 0x%x 0x%x 0x%x 0x%x\n",
4422 sd_card->rsp[0], sd_card->rsp[1], sd_card->rsp[2], sd_card->rsp[3]);
4423
4424 scsi_set_resid(srb, 0);
4425 return TRANSPORT_GOOD;
4426}
4427
4428int sd_hw_rst(struct scsi_cmnd *srb, struct rtsx_chip *chip)
4429{
4430 struct sd_info *sd_card = &(chip->sd_card);
4431 unsigned int lun = SCSI_LUN(srb);
4432 int retval;
4433
4434 if (!sd_card->sd_pass_thru_en) {
4435 set_sense_type(chip, lun, SENSE_TYPE_MEDIA_INVALID_CMD_FIELD);
4436 TRACE_RET(chip, TRANSPORT_FAILED);
4437 }
4438
4439 if (sd_card->pre_cmd_err) {
4440 sd_card->pre_cmd_err = 0;
4441 set_sense_type(chip, lun, SENSE_TYPE_MEDIA_CHANGE);
4442 TRACE_RET(chip, TRANSPORT_FAILED);
4443 }
4444
4445 if ((0x53 != srb->cmnd[2]) || (0x44 != srb->cmnd[3]) || (0x20 != srb->cmnd[4]) ||
4446 (0x43 != srb->cmnd[5]) || (0x61 != srb->cmnd[6]) ||
4447 (0x72 != srb->cmnd[7]) || (0x64 != srb->cmnd[8])) {
4448 set_sense_type(chip, lun, SENSE_TYPE_MEDIA_INVALID_CMD_FIELD);
4449 TRACE_RET(chip, TRANSPORT_FAILED);
4450 }
4451
4452 switch (srb->cmnd[1] & 0x0F) {
4453 case 0:
4454#ifdef SUPPORT_SD_LOCK
4455 if (0x64 == srb->cmnd[9])
4456 sd_card->sd_lock_status |= SD_SDR_RST;
4457#endif
4458 retval = reset_sd_card(chip);
4459 if (retval != STATUS_SUCCESS) {
4460#ifdef SUPPORT_SD_LOCK
4461 sd_card->sd_lock_status &= ~SD_SDR_RST;
4462#endif
4463 set_sense_type(chip, lun, SENSE_TYPE_MEDIA_NOT_PRESENT);
4464 sd_card->pre_cmd_err = 1;
4465 TRACE_RET(chip, TRANSPORT_FAILED);
4466 }
4467#ifdef SUPPORT_SD_LOCK
4468 sd_card->sd_lock_status &= ~SD_SDR_RST;
4469#endif
4470 break;
4471
4472 case 1:
4473 retval = soft_reset_sd_card(chip);
4474 if (retval != STATUS_SUCCESS) {
4475 set_sense_type(chip, lun, SENSE_TYPE_MEDIA_NOT_PRESENT);
4476 sd_card->pre_cmd_err = 1;
4477 TRACE_RET(chip, TRANSPORT_FAILED);
4478 }
4479 break;
4480
4481 default:
4482 set_sense_type(chip, lun, SENSE_TYPE_MEDIA_INVALID_CMD_FIELD);
4483 TRACE_RET(chip, TRANSPORT_FAILED);
4484 }
4485
4486 scsi_set_resid(srb, 0);
4487 return TRANSPORT_GOOD;
4488}
4489#endif
4490
4491void sd_cleanup_work(struct rtsx_chip *chip)
4492{
4493 struct sd_info *sd_card = &(chip->sd_card);
4494
4495 if (sd_card->seq_mode) {
4496 RTSX_DEBUGP("SD: stop transmission\n");
4497 sd_stop_seq_mode(chip);
4498 sd_card->cleanup_counter = 0;
4499 }
4500}
4501
4502int sd_power_off_card3v3(struct rtsx_chip *chip)
4503{
4504 int retval;
4505
4506 retval = disable_card_clock(chip, SD_CARD);
4507 if (retval != STATUS_SUCCESS)
4508 TRACE_RET(chip, STATUS_FAIL);
4509
4510 RTSX_WRITE_REG(chip, CARD_OE, SD_OUTPUT_EN, 0);
4511
4512 if (!chip->ft2_fast_mode) {
4513 retval = card_power_off(chip, SD_CARD);
4514 if (retval != STATUS_SUCCESS)
4515 TRACE_RET(chip, STATUS_FAIL);
4516
4517 wait_timeout(50);
4518 }
4519
4520 if (chip->asic_code) {
4521 retval = sd_pull_ctl_disable(chip);
4522 if (retval != STATUS_SUCCESS)
4523 TRACE_RET(chip, STATUS_FAIL);
4524 } else {
4525 RTSX_WRITE_REG(chip, FPGA_PULL_CTL,
4526 FPGA_SD_PULL_CTL_BIT | 0x20, FPGA_SD_PULL_CTL_BIT);
4527 }
4528
4529 return STATUS_SUCCESS;
4530}
4531
4532int release_sd_card(struct rtsx_chip *chip)
4533{
4534 struct sd_info *sd_card = &(chip->sd_card);
4535 int retval;
4536
4537 RTSX_DEBUGP("release_sd_card\n");
4538
4539 chip->card_ready &= ~SD_CARD;
4540 chip->card_fail &= ~SD_CARD;
4541 chip->card_wp &= ~SD_CARD;
4542
4543 chip->sd_io = 0;
4544 chip->sd_int = 0;
4545
4546#ifdef SUPPORT_SD_LOCK
4547 sd_card->sd_lock_status = 0;
4548 sd_card->sd_erase_status = 0;
4549#endif
4550
4551 memset(sd_card->raw_csd, 0, 16);
4552 memset(sd_card->raw_scr, 0, 8);
4553
4554 retval = sd_power_off_card3v3(chip);
4555 if (retval != STATUS_SUCCESS)
4556 TRACE_RET(chip, STATUS_FAIL);
4557
4558 if (CHECK_PID(chip, 0x5209)) {
4559 retval = sd_change_bank_voltage(chip, SD_IO_3V3);
4560 if (retval != STATUS_SUCCESS)
4561 TRACE_RET(chip, STATUS_FAIL);
4562
4563 if (CHK_SD30_SPEED(sd_card))
4564 RTSX_WRITE_REG(chip, SD30_DRIVE_SEL, 0x07, chip->sd30_drive_sel_3v3);
4565
4566 RTSX_WRITE_REG(chip, OCPPARA2, SD_OCP_THD_MASK, chip->sd_400mA_ocp_thd);
4567 }
4568
4569 return STATUS_SUCCESS;
4570}
diff --git a/drivers/staging/rts_pstor/sd.h b/drivers/staging/rts_pstor/sd.h
deleted file mode 100644
index 1df1aa75e93a..000000000000
--- a/drivers/staging/rts_pstor/sd.h
+++ /dev/null
@@ -1,300 +0,0 @@
1/* Driver for Realtek PCI-Express card reader
2 * Header file
3 *
4 * Copyright(c) 2009 Realtek Semiconductor Corp. All rights reserved.
5 *
6 * This program is free software; you can redistribute it and/or modify it
7 * under the terms of the GNU General Public License as published by the
8 * Free Software Foundation; either version 2, or (at your option) any
9 * later version.
10 *
11 * This program is distributed in the hope that it will be useful, but
12 * WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
14 * General Public License for more details.
15 *
16 * You should have received a copy of the GNU General Public License along
17 * with this program; if not, see <http://www.gnu.org/licenses/>.
18 *
19 * Author:
20 * wwang (wei_wang@realsil.com.cn)
21 * No. 450, Shenhu Road, Suzhou Industry Park, Suzhou, China
22 */
23
24#ifndef __REALTEK_RTSX_SD_H
25#define __REALTEK_RTSX_SD_H
26
27#include "rtsx_chip.h"
28
29#define SUPPORT_VOLTAGE 0x003C0000
30
31/* Error Code */
32#define SD_NO_ERROR 0x0
33#define SD_CRC_ERR 0x80
34#define SD_TO_ERR 0x40
35#define SD_NO_CARD 0x20
36#define SD_BUSY 0x10
37#define SD_STS_ERR 0x08
38#define SD_RSP_TIMEOUT 0x04
39#define SD_IO_ERR 0x02
40
41/* Return code for MMC switch bus */
42#define SWITCH_SUCCESS 0
43#define SWITCH_ERR 1
44#define SWITCH_FAIL 2
45
46/* MMC/SD Command Index */
47/* Basic command (class 0) */
48#define GO_IDLE_STATE 0
49#define SEND_OP_COND 1
50#define ALL_SEND_CID 2
51#define SET_RELATIVE_ADDR 3
52#define SEND_RELATIVE_ADDR 3
53#define SET_DSR 4
54#define IO_SEND_OP_COND 5
55#define SWITCH 6
56#define SELECT_CARD 7
57#define DESELECT_CARD 7
58/* CMD8 is "SEND_EXT_CSD" for MMC4.x Spec
59 * while is "SEND_IF_COND" for SD 2.0
60 */
61#define SEND_EXT_CSD 8
62#define SEND_IF_COND 8
63
64#define SEND_CSD 9
65#define SEND_CID 10
66#define VOLTAGE_SWITCH 11
67#define READ_DAT_UTIL_STOP 11
68#define STOP_TRANSMISSION 12
69#define SEND_STATUS 13
70#define GO_INACTIVE_STATE 15
71
72#define SET_BLOCKLEN 16
73#define READ_SINGLE_BLOCK 17
74#define READ_MULTIPLE_BLOCK 18
75#define SEND_TUNING_PATTERN 19
76
77#define BUSTEST_R 14
78#define BUSTEST_W 19
79
80#define WRITE_BLOCK 24
81#define WRITE_MULTIPLE_BLOCK 25
82#define PROGRAM_CSD 27
83
84#define ERASE_WR_BLK_START 32
85#define ERASE_WR_BLK_END 33
86#define ERASE_CMD 38
87
88#define LOCK_UNLOCK 42
89#define IO_RW_DIRECT 52
90
91#define APP_CMD 55
92#define GEN_CMD 56
93
94#define SET_BUS_WIDTH 6
95#define SD_STATUS 13
96#define SEND_NUM_WR_BLOCKS 22
97#define SET_WR_BLK_ERASE_COUNT 23
98#define SD_APP_OP_COND 41
99#define SET_CLR_CARD_DETECT 42
100#define SEND_SCR 51
101
102#define SD_READ_COMPLETE 0x00
103#define SD_READ_TO 0x01
104#define SD_READ_ADVENCE 0x02
105
106#define SD_CHECK_MODE 0x00
107#define SD_SWITCH_MODE 0x80
108#define SD_FUNC_GROUP_1 0x01
109#define SD_FUNC_GROUP_2 0x02
110#define SD_FUNC_GROUP_3 0x03
111#define SD_FUNC_GROUP_4 0x04
112#define SD_CHECK_SPEC_V1_1 0xFF
113
114#define NO_ARGUMENT 0x00
115#define CHECK_PATTERN 0x000000AA
116#define VOLTAGE_SUPPLY_RANGE 0x00000100
117#define SUPPORT_HIGH_AND_EXTENDED_CAPACITY 0x40000000
118#define SUPPORT_MAX_POWER_PERMANCE 0x10000000
119#define SUPPORT_1V8 0x01000000
120
121#define SWTICH_NO_ERR 0x00
122#define CARD_NOT_EXIST 0x01
123#define SPEC_NOT_SUPPORT 0x02
124#define CHECK_MODE_ERR 0x03
125#define CHECK_NOT_READY 0x04
126#define SWITCH_CRC_ERR 0x05
127#define SWITCH_MODE_ERR 0x06
128#define SWITCH_PASS 0x07
129
130#ifdef SUPPORT_SD_LOCK
131#define SD_ERASE 0x08
132#define SD_LOCK 0x04
133#define SD_UNLOCK 0x00
134#define SD_CLR_PWD 0x02
135#define SD_SET_PWD 0x01
136
137#define SD_PWD_LEN 0x10
138
139#define SD_LOCKED 0x80
140#define SD_LOCK_1BIT_MODE 0x40
141#define SD_PWD_EXIST 0x20
142#define SD_UNLOCK_POW_ON 0x01
143#define SD_SDR_RST 0x02
144
145#define SD_NOT_ERASE 0x00
146#define SD_UNDER_ERASING 0x01
147#define SD_COMPLETE_ERASE 0x02
148
149#define SD_RW_FORBIDDEN 0x0F
150
151#endif
152
153#define HS_SUPPORT 0x01
154#define SDR50_SUPPORT 0x02
155#define SDR104_SUPPORT 0x03
156#define DDR50_SUPPORT 0x04
157
158#define HS_SUPPORT_MASK 0x02
159#define SDR50_SUPPORT_MASK 0x04
160#define SDR104_SUPPORT_MASK 0x08
161#define DDR50_SUPPORT_MASK 0x10
162
163#define HS_QUERY_SWITCH_OK 0x01
164#define SDR50_QUERY_SWITCH_OK 0x02
165#define SDR104_QUERY_SWITCH_OK 0x03
166#define DDR50_QUERY_SWITCH_OK 0x04
167
168#define HS_SWITCH_BUSY 0x02
169#define SDR50_SWITCH_BUSY 0x04
170#define SDR104_SWITCH_BUSY 0x08
171#define DDR50_SWITCH_BUSY 0x10
172
173#define FUNCTION_GROUP1_SUPPORT_OFFSET 0x0D
174#define FUNCTION_GROUP1_QUERY_SWITCH_OFFSET 0x10
175#define FUNCTION_GROUP1_CHECK_BUSY_OFFSET 0x1D
176
177#define DRIVING_TYPE_A 0x01
178#define DRIVING_TYPE_B 0x00
179#define DRIVING_TYPE_C 0x02
180#define DRIVING_TYPE_D 0x03
181
182#define DRIVING_TYPE_A_MASK 0x02
183#define DRIVING_TYPE_B_MASK 0x01
184#define DRIVING_TYPE_C_MASK 0x04
185#define DRIVING_TYPE_D_MASK 0x08
186
187#define TYPE_A_QUERY_SWITCH_OK 0x01
188#define TYPE_B_QUERY_SWITCH_OK 0x00
189#define TYPE_C_QUERY_SWITCH_OK 0x02
190#define TYPE_D_QUERY_SWITCH_OK 0x03
191
192#define TYPE_A_SWITCH_BUSY 0x02
193#define TYPE_B_SWITCH_BUSY 0x01
194#define TYPE_C_SWITCH_BUSY 0x04
195#define TYPE_D_SWITCH_BUSY 0x08
196
197#define FUNCTION_GROUP3_SUPPORT_OFFSET 0x09
198#define FUNCTION_GROUP3_QUERY_SWITCH_OFFSET 0x0F
199#define FUNCTION_GROUP3_CHECK_BUSY_OFFSET 0x19
200
201#define CURRENT_LIMIT_200 0x00
202#define CURRENT_LIMIT_400 0x01
203#define CURRENT_LIMIT_600 0x02
204#define CURRENT_LIMIT_800 0x03
205
206#define CURRENT_LIMIT_200_MASK 0x01
207#define CURRENT_LIMIT_400_MASK 0x02
208#define CURRENT_LIMIT_600_MASK 0x04
209#define CURRENT_LIMIT_800_MASK 0x08
210
211#define CURRENT_LIMIT_200_QUERY_SWITCH_OK 0x00
212#define CURRENT_LIMIT_400_QUERY_SWITCH_OK 0x01
213#define CURRENT_LIMIT_600_QUERY_SWITCH_OK 0x02
214#define CURRENT_LIMIT_800_QUERY_SWITCH_OK 0x03
215
216#define CURRENT_LIMIT_200_SWITCH_BUSY 0x01
217#define CURRENT_LIMIT_400_SWITCH_BUSY 0x02
218#define CURRENT_LIMIT_600_SWITCH_BUSY 0x04
219#define CURRENT_LIMIT_800_SWITCH_BUSY 0x08
220
221#define FUNCTION_GROUP4_SUPPORT_OFFSET 0x07
222#define FUNCTION_GROUP4_QUERY_SWITCH_OFFSET 0x0F
223#define FUNCTION_GROUP4_CHECK_BUSY_OFFSET 0x17
224
225#define DATA_STRUCTURE_VER_OFFSET 0x11
226
227#define MAX_PHASE 31
228
229#define MMC_8BIT_BUS 0x0010
230#define MMC_4BIT_BUS 0x0020
231
232#define MMC_SWITCH_ERR 0x80
233
234#define SD_IO_3V3 0
235#define SD_IO_1V8 1
236
237#define TUNE_TX 0x00
238#define TUNE_RX 0x01
239
240#define CHANGE_TX 0x00
241#define CHANGE_RX 0x01
242
243#define DCM_HIGH_FREQUENCY_MODE 0x00
244#define DCM_LOW_FREQUENCY_MODE 0x01
245
246#define DCM_HIGH_FREQUENCY_MODE_SET 0x0C
247#define DCM_Low_FREQUENCY_MODE_SET 0x00
248
249#define MULTIPLY_BY_1 0x00
250#define MULTIPLY_BY_2 0x01
251#define MULTIPLY_BY_3 0x02
252#define MULTIPLY_BY_4 0x03
253#define MULTIPLY_BY_5 0x04
254#define MULTIPLY_BY_6 0x05
255#define MULTIPLY_BY_7 0x06
256#define MULTIPLY_BY_8 0x07
257#define MULTIPLY_BY_9 0x08
258#define MULTIPLY_BY_10 0x09
259
260#define DIVIDE_BY_2 0x01
261#define DIVIDE_BY_3 0x02
262#define DIVIDE_BY_4 0x03
263#define DIVIDE_BY_5 0x04
264#define DIVIDE_BY_6 0x05
265#define DIVIDE_BY_7 0x06
266#define DIVIDE_BY_8 0x07
267#define DIVIDE_BY_9 0x08
268#define DIVIDE_BY_10 0x09
269
270struct timing_phase_path {
271 int start;
272 int end;
273 int mid;
274 int len;
275};
276
277int sd_select_card(struct rtsx_chip *chip, int select);
278int sd_pull_ctl_enable(struct rtsx_chip *chip);
279int reset_sd_card(struct rtsx_chip *chip);
280int sd_switch_clock(struct rtsx_chip *chip);
281void sd_stop_seq_mode(struct rtsx_chip *chip);
282int sd_rw(struct scsi_cmnd *srb, struct rtsx_chip *chip, u32 start_sector, u16 sector_cnt);
283void sd_cleanup_work(struct rtsx_chip *chip);
284int sd_power_off_card3v3(struct rtsx_chip *chip);
285int release_sd_card(struct rtsx_chip *chip);
286#ifdef SUPPORT_CPRM
287int soft_reset_sd_card(struct rtsx_chip *chip);
288int ext_sd_send_cmd_get_rsp(struct rtsx_chip *chip, u8 cmd_idx,
289 u32 arg, u8 rsp_type, u8 *rsp, int rsp_len, int special_check);
290int ext_sd_get_rsp(struct rtsx_chip *chip, int len, u8 *rsp, u8 rsp_type);
291
292int sd_pass_thru_mode(struct scsi_cmnd *srb, struct rtsx_chip *chip);
293int sd_execute_no_data(struct scsi_cmnd *srb, struct rtsx_chip *chip);
294int sd_execute_read_data(struct scsi_cmnd *srb, struct rtsx_chip *chip);
295int sd_execute_write_data(struct scsi_cmnd *srb, struct rtsx_chip *chip);
296int sd_get_cmd_rsp(struct scsi_cmnd *srb, struct rtsx_chip *chip);
297int sd_hw_rst(struct scsi_cmnd *srb, struct rtsx_chip *chip);
298#endif
299
300#endif /* __REALTEK_RTSX_SD_H */
diff --git a/drivers/staging/rts_pstor/spi.c b/drivers/staging/rts_pstor/spi.c
deleted file mode 100644
index 6b36cc532a8c..000000000000
--- a/drivers/staging/rts_pstor/spi.c
+++ /dev/null
@@ -1,812 +0,0 @@
1/* Driver for Realtek PCI-Express card reader
2 *
3 * Copyright(c) 2009 Realtek Semiconductor Corp. All rights reserved.
4 *
5 * This program is free software; you can redistribute it and/or modify it
6 * under the terms of the GNU General Public License as published by the
7 * Free Software Foundation; either version 2, or (at your option) any
8 * later version.
9 *
10 * This program is distributed in the hope that it will be useful, but
11 * WITHOUT ANY WARRANTY; without even the implied warranty of
12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
13 * General Public License for more details.
14 *
15 * You should have received a copy of the GNU General Public License along
16 * with this program; if not, see <http://www.gnu.org/licenses/>.
17 *
18 * Author:
19 * wwang (wei_wang@realsil.com.cn)
20 * No. 450, Shenhu Road, Suzhou Industry Park, Suzhou, China
21 */
22
23#include <linux/blkdev.h>
24#include <linux/kthread.h>
25#include <linux/sched.h>
26
27#include "rtsx.h"
28#include "rtsx_transport.h"
29#include "rtsx_scsi.h"
30#include "rtsx_card.h"
31#include "spi.h"
32
33static inline void spi_set_err_code(struct rtsx_chip *chip, u8 err_code)
34{
35 struct spi_info *spi = &(chip->spi);
36
37 spi->err_code = err_code;
38}
39
40static int spi_init(struct rtsx_chip *chip)
41{
42 RTSX_WRITE_REG(chip, SPI_CONTROL, 0xFF,
43 CS_POLARITY_LOW | DTO_MSB_FIRST | SPI_MASTER | SPI_MODE0 | SPI_AUTO);
44 RTSX_WRITE_REG(chip, SPI_TCTL, EDO_TIMING_MASK, SAMPLE_DELAY_HALF);
45
46 return STATUS_SUCCESS;
47}
48
49static int spi_set_init_para(struct rtsx_chip *chip)
50{
51 struct spi_info *spi = &(chip->spi);
52 int retval;
53
54 RTSX_WRITE_REG(chip, SPI_CLK_DIVIDER1, 0xFF, (u8)(spi->clk_div >> 8));
55 RTSX_WRITE_REG(chip, SPI_CLK_DIVIDER0, 0xFF, (u8)(spi->clk_div));
56
57 retval = switch_clock(chip, spi->spi_clock);
58 if (retval != STATUS_SUCCESS)
59 TRACE_RET(chip, STATUS_FAIL);
60
61 retval = select_card(chip, SPI_CARD);
62 if (retval != STATUS_SUCCESS)
63 TRACE_RET(chip, STATUS_FAIL);
64
65 RTSX_WRITE_REG(chip, CARD_CLK_EN, SPI_CLK_EN, SPI_CLK_EN);
66 RTSX_WRITE_REG(chip, CARD_OE, SPI_OUTPUT_EN, SPI_OUTPUT_EN);
67
68 wait_timeout(10);
69
70 retval = spi_init(chip);
71 if (retval != STATUS_SUCCESS)
72 TRACE_RET(chip, STATUS_FAIL);
73
74 return STATUS_SUCCESS;
75}
76
77static int sf_polling_status(struct rtsx_chip *chip, int msec)
78{
79 int retval;
80
81 rtsx_init_cmd(chip);
82
83 rtsx_add_cmd(chip, WRITE_REG_CMD, SPI_COMMAND, 0xFF, SPI_RDSR);
84 rtsx_add_cmd(chip, WRITE_REG_CMD, SPI_TRANSFER0, 0xFF, SPI_TRANSFER0_START | SPI_POLLING_MODE0);
85 rtsx_add_cmd(chip, CHECK_REG_CMD, SPI_TRANSFER0, SPI_TRANSFER0_END, SPI_TRANSFER0_END);
86
87 retval = rtsx_send_cmd(chip, 0, msec);
88 if (retval < 0) {
89 rtsx_clear_spi_error(chip);
90 spi_set_err_code(chip, SPI_BUSY_ERR);
91 TRACE_RET(chip, STATUS_FAIL);
92 }
93
94 return STATUS_SUCCESS;
95}
96
97static int sf_enable_write(struct rtsx_chip *chip, u8 ins)
98{
99 struct spi_info *spi = &(chip->spi);
100 int retval;
101
102 if (!spi->write_en)
103 return STATUS_SUCCESS;
104
105 rtsx_init_cmd(chip);
106
107 rtsx_add_cmd(chip, WRITE_REG_CMD, SPI_COMMAND, 0xFF, ins);
108 rtsx_add_cmd(chip, WRITE_REG_CMD, SPI_CA_NUMBER, 0xFF, SPI_COMMAND_BIT_8 | SPI_ADDRESS_BIT_24);
109 rtsx_add_cmd(chip, WRITE_REG_CMD, SPI_TRANSFER0, 0xFF, SPI_TRANSFER0_START | SPI_C_MODE0);
110 rtsx_add_cmd(chip, CHECK_REG_CMD, SPI_TRANSFER0, SPI_TRANSFER0_END, SPI_TRANSFER0_END);
111
112 retval = rtsx_send_cmd(chip, 0, 100);
113 if (retval < 0) {
114 rtsx_clear_spi_error(chip);
115 spi_set_err_code(chip, SPI_HW_ERR);
116 TRACE_RET(chip, STATUS_FAIL);
117 }
118
119 return STATUS_SUCCESS;
120}
121
122static int sf_disable_write(struct rtsx_chip *chip, u8 ins)
123{
124 struct spi_info *spi = &(chip->spi);
125 int retval;
126
127 if (!spi->write_en)
128 return STATUS_SUCCESS;
129
130 rtsx_init_cmd(chip);
131
132 rtsx_add_cmd(chip, WRITE_REG_CMD, SPI_COMMAND, 0xFF, ins);
133 rtsx_add_cmd(chip, WRITE_REG_CMD, SPI_CA_NUMBER, 0xFF, SPI_COMMAND_BIT_8 | SPI_ADDRESS_BIT_24);
134 rtsx_add_cmd(chip, WRITE_REG_CMD, SPI_TRANSFER0, 0xFF, SPI_TRANSFER0_START | SPI_C_MODE0);
135 rtsx_add_cmd(chip, CHECK_REG_CMD, SPI_TRANSFER0, SPI_TRANSFER0_END, SPI_TRANSFER0_END);
136
137 retval = rtsx_send_cmd(chip, 0, 100);
138 if (retval < 0) {
139 rtsx_clear_spi_error(chip);
140 spi_set_err_code(chip, SPI_HW_ERR);
141 TRACE_RET(chip, STATUS_FAIL);
142 }
143
144 return STATUS_SUCCESS;
145}
146
147static void sf_program(struct rtsx_chip *chip, u8 ins, u8 addr_mode, u32 addr, u16 len)
148{
149 rtsx_add_cmd(chip, WRITE_REG_CMD, SPI_COMMAND, 0xFF, ins);
150 rtsx_add_cmd(chip, WRITE_REG_CMD, SPI_CA_NUMBER, 0xFF, SPI_COMMAND_BIT_8 | SPI_ADDRESS_BIT_24);
151 rtsx_add_cmd(chip, WRITE_REG_CMD, SPI_LENGTH0, 0xFF, (u8)len);
152 rtsx_add_cmd(chip, WRITE_REG_CMD, SPI_LENGTH1, 0xFF, (u8)(len >> 8));
153 if (addr_mode) {
154 rtsx_add_cmd(chip, WRITE_REG_CMD, SPI_ADDR0, 0xFF, (u8)addr);
155 rtsx_add_cmd(chip, WRITE_REG_CMD, SPI_ADDR1, 0xFF, (u8)(addr >> 8));
156 rtsx_add_cmd(chip, WRITE_REG_CMD, SPI_ADDR2, 0xFF, (u8)(addr >> 16));
157 rtsx_add_cmd(chip, WRITE_REG_CMD, SPI_TRANSFER0, 0xFF, SPI_TRANSFER0_START | SPI_CADO_MODE0);
158 } else {
159 rtsx_add_cmd(chip, WRITE_REG_CMD, SPI_TRANSFER0, 0xFF, SPI_TRANSFER0_START | SPI_CDO_MODE0);
160 }
161 rtsx_add_cmd(chip, CHECK_REG_CMD, SPI_TRANSFER0, SPI_TRANSFER0_END, SPI_TRANSFER0_END);
162}
163
164static int sf_erase(struct rtsx_chip *chip, u8 ins, u8 addr_mode, u32 addr)
165{
166 int retval;
167
168 rtsx_init_cmd(chip);
169
170 rtsx_add_cmd(chip, WRITE_REG_CMD, SPI_COMMAND, 0xFF, ins);
171 rtsx_add_cmd(chip, WRITE_REG_CMD, SPI_CA_NUMBER, 0xFF, SPI_COMMAND_BIT_8 | SPI_ADDRESS_BIT_24);
172 if (addr_mode) {
173 rtsx_add_cmd(chip, WRITE_REG_CMD, SPI_ADDR0, 0xFF, (u8)addr);
174 rtsx_add_cmd(chip, WRITE_REG_CMD, SPI_ADDR1, 0xFF, (u8)(addr >> 8));
175 rtsx_add_cmd(chip, WRITE_REG_CMD, SPI_ADDR2, 0xFF, (u8)(addr >> 16));
176 rtsx_add_cmd(chip, WRITE_REG_CMD, SPI_TRANSFER0, 0xFF, SPI_TRANSFER0_START | SPI_CA_MODE0);
177 } else {
178 rtsx_add_cmd(chip, WRITE_REG_CMD, SPI_TRANSFER0, 0xFF, SPI_TRANSFER0_START | SPI_C_MODE0);
179 }
180 rtsx_add_cmd(chip, CHECK_REG_CMD, SPI_TRANSFER0, SPI_TRANSFER0_END, SPI_TRANSFER0_END);
181
182 retval = rtsx_send_cmd(chip, 0, 100);
183 if (retval < 0) {
184 rtsx_clear_spi_error(chip);
185 spi_set_err_code(chip, SPI_HW_ERR);
186 TRACE_RET(chip, STATUS_FAIL);
187 }
188
189 return STATUS_SUCCESS;
190}
191
192static int spi_init_eeprom(struct rtsx_chip *chip)
193{
194 int retval;
195 int clk;
196
197 if (chip->asic_code)
198 clk = 30;
199 else
200 clk = CLK_30;
201
202 RTSX_WRITE_REG(chip, SPI_CLK_DIVIDER1, 0xFF, 0x00);
203 RTSX_WRITE_REG(chip, SPI_CLK_DIVIDER0, 0xFF, 0x27);
204
205 retval = switch_clock(chip, clk);
206 if (retval != STATUS_SUCCESS)
207 TRACE_RET(chip, STATUS_FAIL);
208
209 retval = select_card(chip, SPI_CARD);
210 if (retval != STATUS_SUCCESS)
211 TRACE_RET(chip, STATUS_FAIL);
212
213 RTSX_WRITE_REG(chip, CARD_CLK_EN, SPI_CLK_EN, SPI_CLK_EN);
214 RTSX_WRITE_REG(chip, CARD_OE, SPI_OUTPUT_EN, SPI_OUTPUT_EN);
215
216 wait_timeout(10);
217
218 RTSX_WRITE_REG(chip, SPI_CONTROL, 0xFF, CS_POLARITY_HIGH | SPI_EEPROM_AUTO);
219 RTSX_WRITE_REG(chip, SPI_TCTL, EDO_TIMING_MASK, SAMPLE_DELAY_HALF);
220
221 return STATUS_SUCCESS;
222}
223
224static int spi_eeprom_program_enable(struct rtsx_chip *chip)
225{
226 int retval;
227
228 rtsx_init_cmd(chip);
229
230 rtsx_add_cmd(chip, WRITE_REG_CMD, SPI_CA_NUMBER, 0xFF, 0x86);
231 rtsx_add_cmd(chip, WRITE_REG_CMD, SPI_COMMAND, 0xFF, 0x13);
232 rtsx_add_cmd(chip, WRITE_REG_CMD, SPI_TRANSFER0, 0xFF, SPI_TRANSFER0_START | SPI_CA_MODE0);
233 rtsx_add_cmd(chip, CHECK_REG_CMD, SPI_TRANSFER0, SPI_TRANSFER0_END, SPI_TRANSFER0_END);
234
235 retval = rtsx_send_cmd(chip, 0, 100);
236 if (retval < 0)
237 TRACE_RET(chip, STATUS_FAIL);
238
239 return STATUS_SUCCESS;
240}
241
242int spi_erase_eeprom_chip(struct rtsx_chip *chip)
243{
244 int retval;
245
246 retval = spi_init_eeprom(chip);
247 if (retval != STATUS_SUCCESS)
248 TRACE_RET(chip, STATUS_FAIL);
249
250 retval = spi_eeprom_program_enable(chip);
251 if (retval != STATUS_SUCCESS)
252 TRACE_RET(chip, STATUS_FAIL);
253
254 rtsx_init_cmd(chip);
255
256 rtsx_add_cmd(chip, WRITE_REG_CMD, CARD_GPIO_DIR, 0x01, 0);
257 rtsx_add_cmd(chip, WRITE_REG_CMD, CARD_DATA_SOURCE, 0x01, RING_BUFFER);
258 rtsx_add_cmd(chip, WRITE_REG_CMD, SPI_COMMAND, 0xFF, 0x12);
259 rtsx_add_cmd(chip, WRITE_REG_CMD, SPI_CA_NUMBER, 0xFF, 0x84);
260 rtsx_add_cmd(chip, WRITE_REG_CMD, SPI_TRANSFER0, 0xFF, SPI_TRANSFER0_START | SPI_CA_MODE0);
261 rtsx_add_cmd(chip, CHECK_REG_CMD, SPI_TRANSFER0, SPI_TRANSFER0_END, SPI_TRANSFER0_END);
262
263 retval = rtsx_send_cmd(chip, 0, 100);
264 if (retval < 0)
265 TRACE_RET(chip, STATUS_FAIL);
266
267 RTSX_WRITE_REG(chip, CARD_GPIO_DIR, 0x01, 0x01);
268
269 return STATUS_SUCCESS;
270}
271
272int spi_erase_eeprom_byte(struct rtsx_chip *chip, u16 addr)
273{
274 int retval;
275
276 retval = spi_init_eeprom(chip);
277 if (retval != STATUS_SUCCESS)
278 TRACE_RET(chip, STATUS_FAIL);
279
280 retval = spi_eeprom_program_enable(chip);
281 if (retval != STATUS_SUCCESS)
282 TRACE_RET(chip, STATUS_FAIL);
283
284 rtsx_init_cmd(chip);
285
286 rtsx_add_cmd(chip, WRITE_REG_CMD, CARD_GPIO_DIR, 0x01, 0);
287 rtsx_add_cmd(chip, WRITE_REG_CMD, CARD_DATA_SOURCE, 0x01, RING_BUFFER);
288 rtsx_add_cmd(chip, WRITE_REG_CMD, SPI_COMMAND, 0xFF, 0x07);
289 rtsx_add_cmd(chip, WRITE_REG_CMD, SPI_ADDR0, 0xFF, (u8)addr);
290 rtsx_add_cmd(chip, WRITE_REG_CMD, SPI_ADDR1, 0xFF, (u8)(addr >> 8));
291 rtsx_add_cmd(chip, WRITE_REG_CMD, SPI_CA_NUMBER, 0xFF, 0x46);
292 rtsx_add_cmd(chip, WRITE_REG_CMD, SPI_TRANSFER0, 0xFF, SPI_TRANSFER0_START | SPI_CA_MODE0);
293 rtsx_add_cmd(chip, CHECK_REG_CMD, SPI_TRANSFER0, SPI_TRANSFER0_END, SPI_TRANSFER0_END);
294
295 retval = rtsx_send_cmd(chip, 0, 100);
296 if (retval < 0)
297 TRACE_RET(chip, STATUS_FAIL);
298
299 RTSX_WRITE_REG(chip, CARD_GPIO_DIR, 0x01, 0x01);
300
301 return STATUS_SUCCESS;
302}
303
304
305int spi_read_eeprom(struct rtsx_chip *chip, u16 addr, u8 *val)
306{
307 int retval;
308 u8 data;
309
310 retval = spi_init_eeprom(chip);
311 if (retval != STATUS_SUCCESS)
312 TRACE_RET(chip, STATUS_FAIL);
313
314 rtsx_init_cmd(chip);
315
316 rtsx_add_cmd(chip, WRITE_REG_CMD, CARD_GPIO_DIR, 0x01, 0);
317 rtsx_add_cmd(chip, WRITE_REG_CMD, CARD_DATA_SOURCE, 0x01, RING_BUFFER);
318 rtsx_add_cmd(chip, WRITE_REG_CMD, SPI_COMMAND, 0xFF, 0x06);
319 rtsx_add_cmd(chip, WRITE_REG_CMD, SPI_ADDR0, 0xFF, (u8)addr);
320 rtsx_add_cmd(chip, WRITE_REG_CMD, SPI_ADDR1, 0xFF, (u8)(addr >> 8));
321 rtsx_add_cmd(chip, WRITE_REG_CMD, SPI_CA_NUMBER, 0xFF, 0x46);
322 rtsx_add_cmd(chip, WRITE_REG_CMD, SPI_LENGTH0, 0xFF, 1);
323 rtsx_add_cmd(chip, WRITE_REG_CMD, SPI_TRANSFER0, 0xFF, SPI_TRANSFER0_START | SPI_CADI_MODE0);
324 rtsx_add_cmd(chip, CHECK_REG_CMD, SPI_TRANSFER0, SPI_TRANSFER0_END, SPI_TRANSFER0_END);
325
326 retval = rtsx_send_cmd(chip, 0, 100);
327 if (retval < 0)
328 TRACE_RET(chip, STATUS_FAIL);
329
330 wait_timeout(5);
331 RTSX_READ_REG(chip, SPI_DATA, &data);
332
333 if (val)
334 *val = data;
335
336 RTSX_WRITE_REG(chip, CARD_GPIO_DIR, 0x01, 0x01);
337
338 return STATUS_SUCCESS;
339}
340
341int spi_write_eeprom(struct rtsx_chip *chip, u16 addr, u8 val)
342{
343 int retval;
344
345 retval = spi_init_eeprom(chip);
346 if (retval != STATUS_SUCCESS)
347 TRACE_RET(chip, STATUS_FAIL);
348
349 retval = spi_eeprom_program_enable(chip);
350 if (retval != STATUS_SUCCESS)
351 TRACE_RET(chip, STATUS_FAIL);
352
353 rtsx_init_cmd(chip);
354
355 rtsx_add_cmd(chip, WRITE_REG_CMD, CARD_GPIO_DIR, 0x01, 0);
356 rtsx_add_cmd(chip, WRITE_REG_CMD, CARD_DATA_SOURCE, 0x01, RING_BUFFER);
357 rtsx_add_cmd(chip, WRITE_REG_CMD, SPI_COMMAND, 0xFF, 0x05);
358 rtsx_add_cmd(chip, WRITE_REG_CMD, SPI_ADDR0, 0xFF, val);
359 rtsx_add_cmd(chip, WRITE_REG_CMD, SPI_ADDR1, 0xFF, (u8)addr);
360 rtsx_add_cmd(chip, WRITE_REG_CMD, SPI_ADDR2, 0xFF, (u8)(addr >> 8));
361 rtsx_add_cmd(chip, WRITE_REG_CMD, SPI_CA_NUMBER, 0xFF, 0x4E);
362 rtsx_add_cmd(chip, WRITE_REG_CMD, SPI_TRANSFER0, 0xFF, SPI_TRANSFER0_START | SPI_CA_MODE0);
363 rtsx_add_cmd(chip, CHECK_REG_CMD, SPI_TRANSFER0, SPI_TRANSFER0_END, SPI_TRANSFER0_END);
364
365 retval = rtsx_send_cmd(chip, 0, 100);
366 if (retval < 0)
367 TRACE_RET(chip, STATUS_FAIL);
368
369 RTSX_WRITE_REG(chip, CARD_GPIO_DIR, 0x01, 0x01);
370
371 return STATUS_SUCCESS;
372}
373
374
375int spi_get_status(struct scsi_cmnd *srb, struct rtsx_chip *chip)
376{
377 struct spi_info *spi = &(chip->spi);
378
379 RTSX_DEBUGP("spi_get_status: err_code = 0x%x\n", spi->err_code);
380 rtsx_stor_set_xfer_buf(&(spi->err_code), min((int)scsi_bufflen(srb), 1), srb);
381 scsi_set_resid(srb, scsi_bufflen(srb) - 1);
382
383 return STATUS_SUCCESS;
384}
385
386int spi_set_parameter(struct scsi_cmnd *srb, struct rtsx_chip *chip)
387{
388 struct spi_info *spi = &(chip->spi);
389
390 spi_set_err_code(chip, SPI_NO_ERR);
391
392 if (chip->asic_code)
393 spi->spi_clock = ((u16)(srb->cmnd[8]) << 8) | srb->cmnd[9];
394 else
395 spi->spi_clock = srb->cmnd[3];
396
397 spi->clk_div = ((u16)(srb->cmnd[4]) << 8) | srb->cmnd[5];
398 spi->write_en = srb->cmnd[6];
399
400 RTSX_DEBUGP("spi_set_parameter: spi_clock = %d, clk_div = %d, write_en = %d\n",
401 spi->spi_clock, spi->clk_div, spi->write_en);
402
403 return STATUS_SUCCESS;
404}
405
406int spi_read_flash_id(struct scsi_cmnd *srb, struct rtsx_chip *chip)
407{
408 int retval;
409 u16 len;
410 u8 *buf;
411
412 spi_set_err_code(chip, SPI_NO_ERR);
413
414 len = ((u16)(srb->cmnd[7]) << 8) | srb->cmnd[8];
415 if (len > 512) {
416 spi_set_err_code(chip, SPI_INVALID_COMMAND);
417 TRACE_RET(chip, STATUS_FAIL);
418 }
419
420 retval = spi_set_init_para(chip);
421 if (retval != STATUS_SUCCESS) {
422 spi_set_err_code(chip, SPI_HW_ERR);
423 TRACE_RET(chip, STATUS_FAIL);
424 }
425
426 rtsx_init_cmd(chip);
427
428 rtsx_add_cmd(chip, WRITE_REG_CMD, CARD_DATA_SOURCE, 0x01, PINGPONG_BUFFER);
429
430 rtsx_add_cmd(chip, WRITE_REG_CMD, SPI_COMMAND, 0xFF, srb->cmnd[3]);
431 rtsx_add_cmd(chip, WRITE_REG_CMD, SPI_ADDR2, 0xFF, srb->cmnd[4]);
432 rtsx_add_cmd(chip, WRITE_REG_CMD, SPI_ADDR1, 0xFF, srb->cmnd[5]);
433 rtsx_add_cmd(chip, WRITE_REG_CMD, SPI_ADDR0, 0xFF, srb->cmnd[6]);
434 rtsx_add_cmd(chip, WRITE_REG_CMD, SPI_CA_NUMBER, 0xFF, SPI_COMMAND_BIT_8 | SPI_ADDRESS_BIT_24);
435 rtsx_add_cmd(chip, WRITE_REG_CMD, SPI_LENGTH1, 0xFF, srb->cmnd[7]);
436 rtsx_add_cmd(chip, WRITE_REG_CMD, SPI_LENGTH0, 0xFF, srb->cmnd[8]);
437
438 if (len == 0) {
439 if (srb->cmnd[9]) {
440 rtsx_add_cmd(chip, WRITE_REG_CMD, SPI_TRANSFER0,
441 0xFF, SPI_TRANSFER0_START | SPI_CA_MODE0);
442 } else {
443 rtsx_add_cmd(chip, WRITE_REG_CMD, SPI_TRANSFER0,
444 0xFF, SPI_TRANSFER0_START | SPI_C_MODE0);
445 }
446 } else {
447 if (srb->cmnd[9]) {
448 rtsx_add_cmd(chip, WRITE_REG_CMD, SPI_TRANSFER0,
449 0xFF, SPI_TRANSFER0_START | SPI_CADI_MODE0);
450 } else {
451 rtsx_add_cmd(chip, WRITE_REG_CMD, SPI_TRANSFER0,
452 0xFF, SPI_TRANSFER0_START | SPI_CDI_MODE0);
453 }
454 }
455
456 rtsx_add_cmd(chip, CHECK_REG_CMD, SPI_TRANSFER0, SPI_TRANSFER0_END, SPI_TRANSFER0_END);
457
458 retval = rtsx_send_cmd(chip, 0, 100);
459 if (retval < 0) {
460 rtsx_clear_spi_error(chip);
461 spi_set_err_code(chip, SPI_HW_ERR);
462 TRACE_RET(chip, STATUS_FAIL);
463 }
464
465 if (len) {
466 buf = kmalloc(len, GFP_KERNEL);
467 if (!buf)
468 TRACE_RET(chip, STATUS_ERROR);
469
470 retval = rtsx_read_ppbuf(chip, buf, len);
471 if (retval != STATUS_SUCCESS) {
472 spi_set_err_code(chip, SPI_READ_ERR);
473 kfree(buf);
474 TRACE_RET(chip, STATUS_FAIL);
475 }
476
477 rtsx_stor_set_xfer_buf(buf, scsi_bufflen(srb), srb);
478 scsi_set_resid(srb, 0);
479
480 kfree(buf);
481 }
482
483 return STATUS_SUCCESS;
484}
485
486int spi_read_flash(struct scsi_cmnd *srb, struct rtsx_chip *chip)
487{
488 int retval;
489 unsigned int index = 0, offset = 0;
490 u8 ins, slow_read;
491 u32 addr;
492 u16 len;
493 u8 *buf;
494
495 spi_set_err_code(chip, SPI_NO_ERR);
496
497 ins = srb->cmnd[3];
498 addr = ((u32)(srb->cmnd[4]) << 16) | ((u32)(srb->cmnd[5]) << 8) | srb->cmnd[6];
499 len = ((u16)(srb->cmnd[7]) << 8) | srb->cmnd[8];
500 slow_read = srb->cmnd[9];
501
502 retval = spi_set_init_para(chip);
503 if (retval != STATUS_SUCCESS) {
504 spi_set_err_code(chip, SPI_HW_ERR);
505 TRACE_RET(chip, STATUS_FAIL);
506 }
507
508 buf = kmalloc(SF_PAGE_LEN, GFP_KERNEL);
509 if (buf == NULL)
510 TRACE_RET(chip, STATUS_ERROR);
511
512 while (len) {
513 u16 pagelen = SF_PAGE_LEN - (u8)addr;
514
515 if (pagelen > len)
516 pagelen = len;
517
518 rtsx_init_cmd(chip);
519
520 trans_dma_enable(DMA_FROM_DEVICE, chip, 256, DMA_256);
521
522 rtsx_add_cmd(chip, WRITE_REG_CMD, SPI_COMMAND, 0xFF, ins);
523
524 if (slow_read) {
525 rtsx_add_cmd(chip, WRITE_REG_CMD, SPI_ADDR0, 0xFF, (u8)addr);
526 rtsx_add_cmd(chip, WRITE_REG_CMD, SPI_ADDR1, 0xFF, (u8)(addr >> 8));
527 rtsx_add_cmd(chip, WRITE_REG_CMD, SPI_ADDR2, 0xFF, (u8)(addr >> 16));
528 rtsx_add_cmd(chip, WRITE_REG_CMD, SPI_CA_NUMBER, 0xFF, SPI_COMMAND_BIT_8 | SPI_ADDRESS_BIT_24);
529 } else {
530 rtsx_add_cmd(chip, WRITE_REG_CMD, SPI_ADDR1, 0xFF, (u8)addr);
531 rtsx_add_cmd(chip, WRITE_REG_CMD, SPI_ADDR2, 0xFF, (u8)(addr >> 8));
532 rtsx_add_cmd(chip, WRITE_REG_CMD, SPI_ADDR3, 0xFF, (u8)(addr >> 16));
533 rtsx_add_cmd(chip, WRITE_REG_CMD, SPI_CA_NUMBER, 0xFF, SPI_COMMAND_BIT_8 | SPI_ADDRESS_BIT_32);
534 }
535
536 rtsx_add_cmd(chip, WRITE_REG_CMD, SPI_LENGTH1, 0xFF, (u8)(pagelen >> 8));
537 rtsx_add_cmd(chip, WRITE_REG_CMD, SPI_LENGTH0, 0xFF, (u8)pagelen);
538
539 rtsx_add_cmd(chip, WRITE_REG_CMD, SPI_TRANSFER0, 0xFF, SPI_TRANSFER0_START | SPI_CADI_MODE0);
540 rtsx_add_cmd(chip, CHECK_REG_CMD, SPI_TRANSFER0, SPI_TRANSFER0_END, SPI_TRANSFER0_END);
541
542 rtsx_send_cmd_no_wait(chip);
543
544 retval = rtsx_transfer_data(chip, 0, buf, pagelen, 0, DMA_FROM_DEVICE, 10000);
545 if (retval < 0) {
546 kfree(buf);
547 rtsx_clear_spi_error(chip);
548 spi_set_err_code(chip, SPI_HW_ERR);
549 TRACE_RET(chip, STATUS_FAIL);
550 }
551
552 rtsx_stor_access_xfer_buf(buf, pagelen, srb, &index, &offset, TO_XFER_BUF);
553
554 addr += pagelen;
555 len -= pagelen;
556 }
557
558 scsi_set_resid(srb, 0);
559 kfree(buf);
560
561 return STATUS_SUCCESS;
562}
563
564int spi_write_flash(struct scsi_cmnd *srb, struct rtsx_chip *chip)
565{
566 int retval;
567 u8 ins, program_mode;
568 u32 addr;
569 u16 len;
570 u8 *buf;
571 unsigned int index = 0, offset = 0;
572
573 spi_set_err_code(chip, SPI_NO_ERR);
574
575 ins = srb->cmnd[3];
576 addr = ((u32)(srb->cmnd[4]) << 16) | ((u32)(srb->cmnd[5]) << 8) | srb->cmnd[6];
577 len = ((u16)(srb->cmnd[7]) << 8) | srb->cmnd[8];
578 program_mode = srb->cmnd[9];
579
580 retval = spi_set_init_para(chip);
581 if (retval != STATUS_SUCCESS) {
582 spi_set_err_code(chip, SPI_HW_ERR);
583 TRACE_RET(chip, STATUS_FAIL);
584 }
585
586 if (program_mode == BYTE_PROGRAM) {
587 buf = kmalloc(4, GFP_KERNEL);
588 if (!buf)
589 TRACE_RET(chip, STATUS_ERROR);
590
591 while (len) {
592 retval = sf_enable_write(chip, SPI_WREN);
593 if (retval != STATUS_SUCCESS) {
594 kfree(buf);
595 TRACE_RET(chip, STATUS_FAIL);
596 }
597
598 rtsx_stor_access_xfer_buf(buf, 1, srb, &index, &offset, FROM_XFER_BUF);
599
600 rtsx_init_cmd(chip);
601
602 rtsx_add_cmd(chip, WRITE_REG_CMD, CARD_DATA_SOURCE, 0x01, PINGPONG_BUFFER);
603 rtsx_add_cmd(chip, WRITE_REG_CMD, PPBUF_BASE2, 0xFF, buf[0]);
604 sf_program(chip, ins, 1, addr, 1);
605
606 retval = rtsx_send_cmd(chip, 0, 100);
607 if (retval < 0) {
608 kfree(buf);
609 rtsx_clear_spi_error(chip);
610 spi_set_err_code(chip, SPI_HW_ERR);
611 TRACE_RET(chip, STATUS_FAIL);
612 }
613
614 retval = sf_polling_status(chip, 100);
615 if (retval != STATUS_SUCCESS) {
616 kfree(buf);
617 TRACE_RET(chip, STATUS_FAIL);
618 }
619
620 addr++;
621 len--;
622 }
623
624 kfree(buf);
625
626 } else if (program_mode == AAI_PROGRAM) {
627 int first_byte = 1;
628
629 retval = sf_enable_write(chip, SPI_WREN);
630 if (retval != STATUS_SUCCESS)
631 TRACE_RET(chip, STATUS_FAIL);
632
633 buf = kmalloc(4, GFP_KERNEL);
634 if (!buf)
635 TRACE_RET(chip, STATUS_ERROR);
636
637 while (len) {
638 rtsx_stor_access_xfer_buf(buf, 1, srb, &index, &offset, FROM_XFER_BUF);
639
640 rtsx_init_cmd(chip);
641
642 rtsx_add_cmd(chip, WRITE_REG_CMD, CARD_DATA_SOURCE, 0x01, PINGPONG_BUFFER);
643 rtsx_add_cmd(chip, WRITE_REG_CMD, PPBUF_BASE2, 0xFF, buf[0]);
644 if (first_byte) {
645 sf_program(chip, ins, 1, addr, 1);
646 first_byte = 0;
647 } else {
648 sf_program(chip, ins, 0, 0, 1);
649 }
650
651 retval = rtsx_send_cmd(chip, 0, 100);
652 if (retval < 0) {
653 kfree(buf);
654 rtsx_clear_spi_error(chip);
655 spi_set_err_code(chip, SPI_HW_ERR);
656 TRACE_RET(chip, STATUS_FAIL);
657 }
658
659 retval = sf_polling_status(chip, 100);
660 if (retval != STATUS_SUCCESS) {
661 kfree(buf);
662 TRACE_RET(chip, STATUS_FAIL);
663 }
664
665 len--;
666 }
667
668 kfree(buf);
669
670 retval = sf_disable_write(chip, SPI_WRDI);
671 if (retval != STATUS_SUCCESS)
672 TRACE_RET(chip, STATUS_FAIL);
673
674 retval = sf_polling_status(chip, 100);
675 if (retval != STATUS_SUCCESS)
676 TRACE_RET(chip, STATUS_FAIL);
677 } else if (program_mode == PAGE_PROGRAM) {
678 buf = kmalloc(SF_PAGE_LEN, GFP_KERNEL);
679 if (!buf)
680 TRACE_RET(chip, STATUS_NOMEM);
681
682 while (len) {
683 u16 pagelen = SF_PAGE_LEN - (u8)addr;
684
685 if (pagelen > len)
686 pagelen = len;
687
688 retval = sf_enable_write(chip, SPI_WREN);
689 if (retval != STATUS_SUCCESS) {
690 kfree(buf);
691 TRACE_RET(chip, STATUS_FAIL);
692 }
693
694 rtsx_init_cmd(chip);
695
696 trans_dma_enable(DMA_TO_DEVICE, chip, 256, DMA_256);
697 sf_program(chip, ins, 1, addr, pagelen);
698
699 rtsx_send_cmd_no_wait(chip);
700
701 rtsx_stor_access_xfer_buf(buf, pagelen, srb, &index, &offset, FROM_XFER_BUF);
702
703 retval = rtsx_transfer_data(chip, 0, buf, pagelen, 0, DMA_TO_DEVICE, 100);
704 if (retval < 0) {
705 kfree(buf);
706 rtsx_clear_spi_error(chip);
707 spi_set_err_code(chip, SPI_HW_ERR);
708 TRACE_RET(chip, STATUS_FAIL);
709 }
710
711 retval = sf_polling_status(chip, 100);
712 if (retval != STATUS_SUCCESS) {
713 kfree(buf);
714 TRACE_RET(chip, STATUS_FAIL);
715 }
716
717 addr += pagelen;
718 len -= pagelen;
719 }
720
721 kfree(buf);
722 } else {
723 spi_set_err_code(chip, SPI_INVALID_COMMAND);
724 TRACE_RET(chip, STATUS_FAIL);
725 }
726
727 return STATUS_SUCCESS;
728}
729
730int spi_erase_flash(struct scsi_cmnd *srb, struct rtsx_chip *chip)
731{
732 int retval;
733 u8 ins, erase_mode;
734 u32 addr;
735
736 spi_set_err_code(chip, SPI_NO_ERR);
737
738 ins = srb->cmnd[3];
739 addr = ((u32)(srb->cmnd[4]) << 16) | ((u32)(srb->cmnd[5]) << 8) | srb->cmnd[6];
740 erase_mode = srb->cmnd[9];
741
742 retval = spi_set_init_para(chip);
743 if (retval != STATUS_SUCCESS) {
744 spi_set_err_code(chip, SPI_HW_ERR);
745 TRACE_RET(chip, STATUS_FAIL);
746 }
747
748 if (erase_mode == PAGE_ERASE) {
749 retval = sf_enable_write(chip, SPI_WREN);
750 if (retval != STATUS_SUCCESS)
751 TRACE_RET(chip, STATUS_FAIL);
752
753 retval = sf_erase(chip, ins, 1, addr);
754 if (retval != STATUS_SUCCESS)
755 TRACE_RET(chip, STATUS_FAIL);
756 } else if (erase_mode == CHIP_ERASE) {
757 retval = sf_enable_write(chip, SPI_WREN);
758 if (retval != STATUS_SUCCESS)
759 TRACE_RET(chip, STATUS_FAIL);
760
761 retval = sf_erase(chip, ins, 0, 0);
762 if (retval != STATUS_SUCCESS)
763 TRACE_RET(chip, STATUS_FAIL);
764 } else {
765 spi_set_err_code(chip, SPI_INVALID_COMMAND);
766 TRACE_RET(chip, STATUS_FAIL);
767 }
768
769 return STATUS_SUCCESS;
770}
771
772int spi_write_flash_status(struct scsi_cmnd *srb, struct rtsx_chip *chip)
773{
774 int retval;
775 u8 ins, status, ewsr;
776
777 ins = srb->cmnd[3];
778 status = srb->cmnd[4];
779 ewsr = srb->cmnd[5];
780
781 retval = spi_set_init_para(chip);
782 if (retval != STATUS_SUCCESS) {
783 spi_set_err_code(chip, SPI_HW_ERR);
784 TRACE_RET(chip, STATUS_FAIL);
785 }
786
787 retval = sf_enable_write(chip, ewsr);
788 if (retval != STATUS_SUCCESS)
789 TRACE_RET(chip, STATUS_FAIL);
790
791 rtsx_init_cmd(chip);
792
793 rtsx_add_cmd(chip, WRITE_REG_CMD, CARD_DATA_SOURCE, 0x01, PINGPONG_BUFFER);
794
795 rtsx_add_cmd(chip, WRITE_REG_CMD, SPI_COMMAND, 0xFF, ins);
796 rtsx_add_cmd(chip, WRITE_REG_CMD, SPI_CA_NUMBER, 0xFF, SPI_COMMAND_BIT_8 | SPI_ADDRESS_BIT_24);
797 rtsx_add_cmd(chip, WRITE_REG_CMD, SPI_LENGTH1, 0xFF, 0);
798 rtsx_add_cmd(chip, WRITE_REG_CMD, SPI_LENGTH0, 0xFF, 1);
799 rtsx_add_cmd(chip, WRITE_REG_CMD, PPBUF_BASE2, 0xFF, status);
800 rtsx_add_cmd(chip, WRITE_REG_CMD, SPI_TRANSFER0, 0xFF, SPI_TRANSFER0_START | SPI_CDO_MODE0);
801 rtsx_add_cmd(chip, CHECK_REG_CMD, SPI_TRANSFER0, SPI_TRANSFER0_END, SPI_TRANSFER0_END);
802
803 retval = rtsx_send_cmd(chip, 0, 100);
804 if (retval != STATUS_SUCCESS) {
805 rtsx_clear_spi_error(chip);
806 spi_set_err_code(chip, SPI_HW_ERR);
807 TRACE_RET(chip, STATUS_FAIL);
808 }
809
810 return STATUS_SUCCESS;
811}
812
diff --git a/drivers/staging/rts_pstor/spi.h b/drivers/staging/rts_pstor/spi.h
deleted file mode 100644
index b59291f8b201..000000000000
--- a/drivers/staging/rts_pstor/spi.h
+++ /dev/null
@@ -1,65 +0,0 @@
1/* Driver for Realtek PCI-Express card reader
2 * Header file
3 *
4 * Copyright(c) 2009 Realtek Semiconductor Corp. All rights reserved.
5 *
6 * This program is free software; you can redistribute it and/or modify it
7 * under the terms of the GNU General Public License as published by the
8 * Free Software Foundation; either version 2, or (at your option) any
9 * later version.
10 *
11 * This program is distributed in the hope that it will be useful, but
12 * WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
14 * General Public License for more details.
15 *
16 * You should have received a copy of the GNU General Public License along
17 * with this program; if not, see <http://www.gnu.org/licenses/>.
18 *
19 * Author:
20 * wwang (wei_wang@realsil.com.cn)
21 * No. 450, Shenhu Road, Suzhou Industry Park, Suzhou, China
22 */
23
24#ifndef __REALTEK_RTSX_SPI_H
25#define __REALTEK_RTSX_SPI_H
26
27/* SPI operation error */
28#define SPI_NO_ERR 0x00
29#define SPI_HW_ERR 0x01
30#define SPI_INVALID_COMMAND 0x02
31#define SPI_READ_ERR 0x03
32#define SPI_WRITE_ERR 0x04
33#define SPI_ERASE_ERR 0x05
34#define SPI_BUSY_ERR 0x06
35
36/* Serial flash instruction */
37#define SPI_READ 0x03
38#define SPI_FAST_READ 0x0B
39#define SPI_WREN 0x06
40#define SPI_WRDI 0x04
41#define SPI_RDSR 0x05
42
43#define SF_PAGE_LEN 256
44
45#define BYTE_PROGRAM 0
46#define AAI_PROGRAM 1
47#define PAGE_PROGRAM 2
48
49#define PAGE_ERASE 0
50#define CHIP_ERASE 1
51
52int spi_erase_eeprom_chip(struct rtsx_chip *chip);
53int spi_erase_eeprom_byte(struct rtsx_chip *chip, u16 addr);
54int spi_read_eeprom(struct rtsx_chip *chip, u16 addr, u8 *val);
55int spi_write_eeprom(struct rtsx_chip *chip, u16 addr, u8 val);
56int spi_get_status(struct scsi_cmnd *srb, struct rtsx_chip *chip);
57int spi_set_parameter(struct scsi_cmnd *srb, struct rtsx_chip *chip);
58int spi_read_flash_id(struct scsi_cmnd *srb, struct rtsx_chip *chip);
59int spi_read_flash(struct scsi_cmnd *srb, struct rtsx_chip *chip);
60int spi_write_flash(struct scsi_cmnd *srb, struct rtsx_chip *chip);
61int spi_erase_flash(struct scsi_cmnd *srb, struct rtsx_chip *chip);
62int spi_write_flash_status(struct scsi_cmnd *srb, struct rtsx_chip *chip);
63
64
65#endif /* __REALTEK_RTSX_SPI_H */
diff --git a/drivers/staging/rts_pstor/trace.h b/drivers/staging/rts_pstor/trace.h
deleted file mode 100644
index cf60a1b872b3..000000000000
--- a/drivers/staging/rts_pstor/trace.h
+++ /dev/null
@@ -1,93 +0,0 @@
1/* Driver for Realtek PCI-Express card reader
2 * Header file
3 *
4 * Copyright(c) 2009 Realtek Semiconductor Corp. All rights reserved.
5 *
6 * This program is free software; you can redistribute it and/or modify it
7 * under the terms of the GNU General Public License as published by the
8 * Free Software Foundation; either version 2, or (at your option) any
9 * later version.
10 *
11 * This program is distributed in the hope that it will be useful, but
12 * WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
14 * General Public License for more details.
15 *
16 * You should have received a copy of the GNU General Public License along
17 * with this program; if not, see <http://www.gnu.org/licenses/>.
18 *
19 * Author:
20 * wwang (wei_wang@realsil.com.cn)
21 * No. 450, Shenhu Road, Suzhou Industry Park, Suzhou, China
22 */
23
24#ifndef __REALTEK_RTSX_TRACE_H
25#define __REALTEK_RTSX_TRACE_H
26
27#define _MSG_TRACE
28
29#ifdef _MSG_TRACE
30static inline char *filename(char *path)
31{
32 char *ptr;
33
34 if (path == NULL)
35 return NULL;
36
37 ptr = path;
38
39 while (*ptr != '\0') {
40 if ((*ptr == '\\') || (*ptr == '/'))
41 path = ptr + 1;
42
43 ptr++;
44 }
45
46 return path;
47}
48
49#define TRACE_RET(chip, ret) \
50do { \
51 char *_file = filename(__FILE__); \
52 RTSX_DEBUGP("[%s][%s]:[%d]\n", _file, __func__, __LINE__); \
53 (chip)->trace_msg[(chip)->msg_idx].line = (u16)(__LINE__); \
54 strncpy((chip)->trace_msg[(chip)->msg_idx].func, __func__, MSG_FUNC_LEN-1); \
55 strncpy((chip)->trace_msg[(chip)->msg_idx].file, _file, MSG_FILE_LEN-1); \
56 get_current_time((chip)->trace_msg[(chip)->msg_idx].timeval_buf, TIME_VAL_LEN); \
57 (chip)->trace_msg[(chip)->msg_idx].valid = 1; \
58 (chip)->msg_idx++; \
59 if ((chip)->msg_idx >= TRACE_ITEM_CNT) { \
60 (chip)->msg_idx = 0; \
61 } \
62 return ret; \
63} while (0)
64
65#define TRACE_GOTO(chip, label) \
66do { \
67 char *_file = filename(__FILE__); \
68 RTSX_DEBUGP("[%s][%s]:[%d]\n", _file, __func__, __LINE__); \
69 (chip)->trace_msg[(chip)->msg_idx].line = (u16)(__LINE__); \
70 strncpy((chip)->trace_msg[(chip)->msg_idx].func, __func__, MSG_FUNC_LEN-1); \
71 strncpy((chip)->trace_msg[(chip)->msg_idx].file, _file, MSG_FILE_LEN-1); \
72 get_current_time((chip)->trace_msg[(chip)->msg_idx].timeval_buf, TIME_VAL_LEN); \
73 (chip)->trace_msg[(chip)->msg_idx].valid = 1; \
74 (chip)->msg_idx++; \
75 if ((chip)->msg_idx >= TRACE_ITEM_CNT) { \
76 (chip)->msg_idx = 0; \
77 } \
78 goto label; \
79} while (0)
80#else
81#define TRACE_RET(chip, ret) return ret
82#define TRACE_GOTO(chip, label) goto label
83#endif
84
85#ifdef CONFIG_RTS_PSTOR_DEBUG
86#define RTSX_DUMP(buf, buf_len) \
87 print_hex_dump(KERN_DEBUG, RTSX_STOR, DUMP_PREFIX_NONE, \
88 16, 1, (buf), (buf_len), false)
89#else
90#define RTSX_DUMP(buf, buf_len)
91#endif
92
93#endif /* __REALTEK_RTSX_TRACE_H */
diff --git a/drivers/staging/rts_pstor/xd.c b/drivers/staging/rts_pstor/xd.c
deleted file mode 100644
index 9bba5b11a824..000000000000
--- a/drivers/staging/rts_pstor/xd.c
+++ /dev/null
@@ -1,2052 +0,0 @@
1/* Driver for Realtek PCI-Express card reader
2 *
3 * Copyright(c) 2009 Realtek Semiconductor Corp. All rights reserved.
4 *
5 * This program is free software; you can redistribute it and/or modify it
6 * under the terms of the GNU General Public License as published by the
7 * Free Software Foundation; either version 2, or (at your option) any
8 * later version.
9 *
10 * This program is distributed in the hope that it will be useful, but
11 * WITHOUT ANY WARRANTY; without even the implied warranty of
12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
13 * General Public License for more details.
14 *
15 * You should have received a copy of the GNU General Public License along
16 * with this program; if not, see <http://www.gnu.org/licenses/>.
17 *
18 * Author:
19 * wwang (wei_wang@realsil.com.cn)
20 * No. 450, Shenhu Road, Suzhou Industry Park, Suzhou, China
21 */
22
23#include <linux/blkdev.h>
24#include <linux/kthread.h>
25#include <linux/sched.h>
26#include <linux/vmalloc.h>
27
28#include "rtsx.h"
29#include "rtsx_transport.h"
30#include "rtsx_scsi.h"
31#include "rtsx_card.h"
32#include "xd.h"
33
34static int xd_build_l2p_tbl(struct rtsx_chip *chip, int zone_no);
35static int xd_init_page(struct rtsx_chip *chip, u32 phy_blk, u16 logoff, u8 start_page, u8 end_page);
36
37static inline void xd_set_err_code(struct rtsx_chip *chip, u8 err_code)
38{
39 struct xd_info *xd_card = &(chip->xd_card);
40
41 xd_card->err_code = err_code;
42}
43
44static inline int xd_check_err_code(struct rtsx_chip *chip, u8 err_code)
45{
46 struct xd_info *xd_card = &(chip->xd_card);
47
48 return (xd_card->err_code == err_code);
49}
50
51static int xd_set_init_para(struct rtsx_chip *chip)
52{
53 struct xd_info *xd_card = &(chip->xd_card);
54 int retval;
55
56 if (chip->asic_code)
57 xd_card->xd_clock = 47;
58 else
59 xd_card->xd_clock = CLK_50;
60
61 retval = switch_clock(chip, xd_card->xd_clock);
62 if (retval != STATUS_SUCCESS)
63 TRACE_RET(chip, STATUS_FAIL);
64
65 return STATUS_SUCCESS;
66}
67
68static int xd_switch_clock(struct rtsx_chip *chip)
69{
70 struct xd_info *xd_card = &(chip->xd_card);
71 int retval;
72
73 retval = select_card(chip, XD_CARD);
74 if (retval != STATUS_SUCCESS)
75 TRACE_RET(chip, STATUS_FAIL);
76
77 retval = switch_clock(chip, xd_card->xd_clock);
78 if (retval != STATUS_SUCCESS)
79 TRACE_RET(chip, STATUS_FAIL);
80
81 return STATUS_SUCCESS;
82}
83
84static int xd_read_id(struct rtsx_chip *chip, u8 id_cmd, u8 *id_buf, u8 buf_len)
85{
86 int retval, i;
87 u8 *ptr;
88
89 rtsx_init_cmd(chip);
90
91 rtsx_add_cmd(chip, WRITE_REG_CMD, XD_DAT, 0xFF, id_cmd);
92 rtsx_add_cmd(chip, WRITE_REG_CMD, XD_TRANSFER, 0xFF, XD_TRANSFER_START | XD_READ_ID);
93 rtsx_add_cmd(chip, CHECK_REG_CMD, XD_TRANSFER, XD_TRANSFER_END, XD_TRANSFER_END);
94
95 for (i = 0; i < 4; i++)
96 rtsx_add_cmd(chip, READ_REG_CMD, (u16)(XD_ADDRESS1 + i), 0, 0);
97
98 retval = rtsx_send_cmd(chip, XD_CARD, 20);
99 if (retval < 0)
100 TRACE_RET(chip, STATUS_FAIL);
101
102 ptr = rtsx_get_cmd_data(chip) + 1;
103 if (id_buf && buf_len) {
104 if (buf_len > 4)
105 buf_len = 4;
106 memcpy(id_buf, ptr, buf_len);
107 }
108
109 return STATUS_SUCCESS;
110}
111
112static void xd_assign_phy_addr(struct rtsx_chip *chip, u32 addr, u8 mode)
113{
114 struct xd_info *xd_card = &(chip->xd_card);
115
116 switch (mode) {
117 case XD_RW_ADDR:
118 rtsx_add_cmd(chip, WRITE_REG_CMD, XD_ADDRESS0, 0xFF, 0);
119 rtsx_add_cmd(chip, WRITE_REG_CMD, XD_ADDRESS1, 0xFF, (u8)addr);
120 rtsx_add_cmd(chip, WRITE_REG_CMD, XD_ADDRESS2, 0xFF, (u8)(addr >> 8));
121 rtsx_add_cmd(chip, WRITE_REG_CMD, XD_ADDRESS3, 0xFF, (u8)(addr >> 16));
122 rtsx_add_cmd(chip, WRITE_REG_CMD, XD_CFG, 0xFF,
123 xd_card->addr_cycle | XD_CALC_ECC | XD_BA_NO_TRANSFORM);
124 break;
125
126 case XD_ERASE_ADDR:
127 rtsx_add_cmd(chip, WRITE_REG_CMD, XD_ADDRESS0, 0xFF, (u8)addr);
128 rtsx_add_cmd(chip, WRITE_REG_CMD, XD_ADDRESS1, 0xFF, (u8)(addr >> 8));
129 rtsx_add_cmd(chip, WRITE_REG_CMD, XD_ADDRESS2, 0xFF, (u8)(addr >> 16));
130 rtsx_add_cmd(chip, WRITE_REG_CMD, XD_CFG, 0xFF,
131 (xd_card->addr_cycle - 1) | XD_CALC_ECC | XD_BA_NO_TRANSFORM);
132 break;
133
134 default:
135 break;
136 }
137}
138
139static int xd_read_redundant(struct rtsx_chip *chip, u32 page_addr, u8 *buf, int buf_len)
140{
141 int retval, i;
142
143 rtsx_init_cmd(chip);
144
145 xd_assign_phy_addr(chip, page_addr, XD_RW_ADDR);
146
147 rtsx_add_cmd(chip, WRITE_REG_CMD, XD_TRANSFER, 0xFF, XD_TRANSFER_START | XD_READ_REDUNDANT);
148 rtsx_add_cmd(chip, CHECK_REG_CMD, XD_TRANSFER, XD_TRANSFER_END, XD_TRANSFER_END);
149
150 for (i = 0; i < 6; i++)
151 rtsx_add_cmd(chip, READ_REG_CMD, (u16)(XD_PAGE_STATUS + i), 0, 0);
152 for (i = 0; i < 4; i++)
153 rtsx_add_cmd(chip, READ_REG_CMD, (u16)(XD_RESERVED0 + i), 0, 0);
154 rtsx_add_cmd(chip, READ_REG_CMD, XD_PARITY, 0, 0);
155
156 retval = rtsx_send_cmd(chip, XD_CARD, 500);
157 if (retval < 0)
158 TRACE_RET(chip, STATUS_FAIL);
159
160 if (buf && buf_len) {
161 u8 *ptr = rtsx_get_cmd_data(chip) + 1;
162
163 if (buf_len > 11)
164 buf_len = 11;
165 memcpy(buf, ptr, buf_len);
166 }
167
168 return STATUS_SUCCESS;
169}
170
171static int xd_read_data_from_ppb(struct rtsx_chip *chip, int offset, u8 *buf, int buf_len)
172{
173 int retval, i;
174
175 if (!buf || (buf_len < 0))
176 TRACE_RET(chip, STATUS_FAIL);
177
178 rtsx_init_cmd(chip);
179
180 for (i = 0; i < buf_len; i++)
181 rtsx_add_cmd(chip, READ_REG_CMD, PPBUF_BASE2 + offset + i, 0, 0);
182
183 retval = rtsx_send_cmd(chip, 0, 250);
184 if (retval < 0) {
185 rtsx_clear_xd_error(chip);
186 TRACE_RET(chip, STATUS_FAIL);
187 }
188
189 memcpy(buf, rtsx_get_cmd_data(chip), buf_len);
190
191 return STATUS_SUCCESS;
192}
193
194static int xd_read_cis(struct rtsx_chip *chip, u32 page_addr, u8 *buf, int buf_len)
195{
196 int retval;
197 u8 reg;
198
199 if (!buf || (buf_len < 10))
200 TRACE_RET(chip, STATUS_FAIL);
201
202 rtsx_init_cmd(chip);
203
204 xd_assign_phy_addr(chip, page_addr, XD_RW_ADDR);
205
206 rtsx_add_cmd(chip, WRITE_REG_CMD, CARD_DATA_SOURCE, 0x01, PINGPONG_BUFFER);
207 rtsx_add_cmd(chip, WRITE_REG_CMD, XD_PAGE_CNT, 0xFF, 1);
208 rtsx_add_cmd(chip, WRITE_REG_CMD, XD_CHK_DATA_STATUS, XD_AUTO_CHK_DATA_STATUS, XD_AUTO_CHK_DATA_STATUS);
209
210 rtsx_add_cmd(chip, WRITE_REG_CMD, XD_TRANSFER, 0xFF, XD_TRANSFER_START | XD_READ_PAGES);
211 rtsx_add_cmd(chip, CHECK_REG_CMD, XD_TRANSFER, XD_TRANSFER_END, XD_TRANSFER_END);
212
213 retval = rtsx_send_cmd(chip, XD_CARD, 250);
214 if (retval == -ETIMEDOUT) {
215 rtsx_clear_xd_error(chip);
216 TRACE_RET(chip, STATUS_FAIL);
217 }
218
219 RTSX_READ_REG(chip, XD_PAGE_STATUS, &reg);
220 if (reg != XD_GPG) {
221 rtsx_clear_xd_error(chip);
222 TRACE_RET(chip, STATUS_FAIL);
223 }
224
225 RTSX_READ_REG(chip, XD_CTL, &reg);
226 if (!(reg & XD_ECC1_ERROR) || !(reg & XD_ECC1_UNCORRECTABLE)) {
227 retval = xd_read_data_from_ppb(chip, 0, buf, buf_len);
228 if (retval != STATUS_SUCCESS)
229 TRACE_RET(chip, STATUS_FAIL);
230 if (reg & XD_ECC1_ERROR) {
231 u8 ecc_bit, ecc_byte;
232
233 RTSX_READ_REG(chip, XD_ECC_BIT1, &ecc_bit);
234 RTSX_READ_REG(chip, XD_ECC_BYTE1, &ecc_byte);
235
236 RTSX_DEBUGP("ECC_BIT1 = 0x%x, ECC_BYTE1 = 0x%x\n", ecc_bit, ecc_byte);
237 if (ecc_byte < buf_len) {
238 RTSX_DEBUGP("Before correct: 0x%x\n", buf[ecc_byte]);
239 buf[ecc_byte] ^= (1 << ecc_bit);
240 RTSX_DEBUGP("After correct: 0x%x\n", buf[ecc_byte]);
241 }
242 }
243 } else if (!(reg & XD_ECC2_ERROR) || !(reg & XD_ECC2_UNCORRECTABLE)) {
244 rtsx_clear_xd_error(chip);
245
246 retval = xd_read_data_from_ppb(chip, 256, buf, buf_len);
247 if (retval != STATUS_SUCCESS)
248 TRACE_RET(chip, STATUS_FAIL);
249 if (reg & XD_ECC2_ERROR) {
250 u8 ecc_bit, ecc_byte;
251
252 RTSX_READ_REG(chip, XD_ECC_BIT2, &ecc_bit);
253 RTSX_READ_REG(chip, XD_ECC_BYTE2, &ecc_byte);
254
255 RTSX_DEBUGP("ECC_BIT2 = 0x%x, ECC_BYTE2 = 0x%x\n", ecc_bit, ecc_byte);
256 if (ecc_byte < buf_len) {
257 RTSX_DEBUGP("Before correct: 0x%x\n", buf[ecc_byte]);
258 buf[ecc_byte] ^= (1 << ecc_bit);
259 RTSX_DEBUGP("After correct: 0x%x\n", buf[ecc_byte]);
260 }
261 }
262 } else {
263 rtsx_clear_xd_error(chip);
264 TRACE_RET(chip, STATUS_FAIL);
265 }
266
267 return STATUS_SUCCESS;
268}
269
270static void xd_fill_pull_ctl_disable(struct rtsx_chip *chip)
271{
272 if (CHECK_PID(chip, 0x5209)) {
273 rtsx_add_cmd(chip, WRITE_REG_CMD, CARD_PULL_CTL1, 0xFF, 0x55);
274 rtsx_add_cmd(chip, WRITE_REG_CMD, CARD_PULL_CTL2, 0xFF, 0x55);
275 rtsx_add_cmd(chip, WRITE_REG_CMD, CARD_PULL_CTL3, 0xFF, 0xD5);
276 rtsx_add_cmd(chip, WRITE_REG_CMD, CARD_PULL_CTL4, 0xFF, 0x55);
277 rtsx_add_cmd(chip, WRITE_REG_CMD, CARD_PULL_CTL5, 0xFF, 0x55);
278 rtsx_add_cmd(chip, WRITE_REG_CMD, CARD_PULL_CTL6, 0xFF, 0x15);
279 } else if (CHECK_PID(chip, 0x5208)) {
280 rtsx_add_cmd(chip, WRITE_REG_CMD, CARD_PULL_CTL1, 0xFF,
281 XD_D3_PD | XD_D2_PD | XD_D1_PD | XD_D0_PD);
282 rtsx_add_cmd(chip, WRITE_REG_CMD, CARD_PULL_CTL2, 0xFF,
283 XD_D7_PD | XD_D6_PD | XD_D5_PD | XD_D4_PD);
284 rtsx_add_cmd(chip, WRITE_REG_CMD, CARD_PULL_CTL3, 0xFF,
285 XD_WP_PD | XD_CE_PD | XD_CLE_PD | XD_CD_PU);
286 rtsx_add_cmd(chip, WRITE_REG_CMD, CARD_PULL_CTL4, 0xFF,
287 XD_RDY_PD | XD_WE_PD | XD_RE_PD | XD_ALE_PD);
288 rtsx_add_cmd(chip, WRITE_REG_CMD, CARD_PULL_CTL5, 0xFF,
289 MS_INS_PU | SD_WP_PD | SD_CD_PU | SD_CMD_PD);
290 rtsx_add_cmd(chip, WRITE_REG_CMD, CARD_PULL_CTL6, 0xFF, MS_D5_PD | MS_D4_PD);
291 } else if (CHECK_PID(chip, 0x5288)) {
292 if (CHECK_BARO_PKG(chip, QFN)) {
293 rtsx_add_cmd(chip, WRITE_REG_CMD, CARD_PULL_CTL1, 0xFF, 0x55);
294 rtsx_add_cmd(chip, WRITE_REG_CMD, CARD_PULL_CTL2, 0xFF, 0x55);
295 rtsx_add_cmd(chip, WRITE_REG_CMD, CARD_PULL_CTL3, 0xFF, 0x4B);
296 rtsx_add_cmd(chip, WRITE_REG_CMD, CARD_PULL_CTL4, 0xFF, 0x69);
297 }
298 }
299}
300
301static void xd_fill_pull_ctl_stage1_barossa(struct rtsx_chip *chip)
302{
303 if (CHECK_BARO_PKG(chip, QFN)) {
304 rtsx_add_cmd(chip, WRITE_REG_CMD, CARD_PULL_CTL1, 0xFF, 0x55);
305 rtsx_add_cmd(chip, WRITE_REG_CMD, CARD_PULL_CTL2, 0xFF, 0x55);
306 rtsx_add_cmd(chip, WRITE_REG_CMD, CARD_PULL_CTL3, 0xFF, 0x4B);
307 rtsx_add_cmd(chip, WRITE_REG_CMD, CARD_PULL_CTL4, 0xFF, 0x55);
308 }
309}
310
311static void xd_fill_pull_ctl_enable(struct rtsx_chip *chip)
312{
313 if (CHECK_PID(chip, 0x5209)) {
314 rtsx_add_cmd(chip, WRITE_REG_CMD, CARD_PULL_CTL1, 0xFF, 0xAA);
315 rtsx_add_cmd(chip, WRITE_REG_CMD, CARD_PULL_CTL2, 0xFF, 0x55);
316 rtsx_add_cmd(chip, WRITE_REG_CMD, CARD_PULL_CTL3, 0xFF, 0xD5);
317 rtsx_add_cmd(chip, WRITE_REG_CMD, CARD_PULL_CTL4, 0xFF, 0x55);
318 rtsx_add_cmd(chip, WRITE_REG_CMD, CARD_PULL_CTL5, 0xFF, 0x55);
319 rtsx_add_cmd(chip, WRITE_REG_CMD, CARD_PULL_CTL6, 0xFF, 0x15);
320 } else if (CHECK_PID(chip, 0x5208)) {
321 rtsx_add_cmd(chip, WRITE_REG_CMD, CARD_PULL_CTL1, 0xFF,
322 XD_D3_PD | XD_D2_PD | XD_D1_PD | XD_D0_PD);
323 rtsx_add_cmd(chip, WRITE_REG_CMD, CARD_PULL_CTL2, 0xFF,
324 XD_D7_PD | XD_D6_PD | XD_D5_PD | XD_D4_PD);
325 rtsx_add_cmd(chip, WRITE_REG_CMD, CARD_PULL_CTL3, 0xFF,
326 XD_WP_PD | XD_CE_PU | XD_CLE_PD | XD_CD_PU);
327 rtsx_add_cmd(chip, WRITE_REG_CMD, CARD_PULL_CTL4, 0xFF,
328 XD_RDY_PU | XD_WE_PU | XD_RE_PU | XD_ALE_PD);
329 rtsx_add_cmd(chip, WRITE_REG_CMD, CARD_PULL_CTL5, 0xFF,
330 MS_INS_PU | SD_WP_PD | SD_CD_PU | SD_CMD_PD);
331 rtsx_add_cmd(chip, WRITE_REG_CMD, CARD_PULL_CTL6, 0xFF, MS_D5_PD | MS_D4_PD);
332 } else if (CHECK_PID(chip, 0x5288)) {
333 if (CHECK_BARO_PKG(chip, QFN)) {
334 rtsx_add_cmd(chip, WRITE_REG_CMD, CARD_PULL_CTL1, 0xFF, 0x55);
335 rtsx_add_cmd(chip, WRITE_REG_CMD, CARD_PULL_CTL2, 0xFF, 0x55);
336 rtsx_add_cmd(chip, WRITE_REG_CMD, CARD_PULL_CTL3, 0xFF, 0x53);
337 rtsx_add_cmd(chip, WRITE_REG_CMD, CARD_PULL_CTL4, 0xFF, 0xA9);
338 }
339 }
340}
341
342static int xd_pull_ctl_disable(struct rtsx_chip *chip)
343{
344 if (CHECK_PID(chip, 0x5209)) {
345 RTSX_WRITE_REG(chip, CARD_PULL_CTL1, 0xFF, 0x55);
346 RTSX_WRITE_REG(chip, CARD_PULL_CTL2, 0xFF, 0x55);
347 RTSX_WRITE_REG(chip, CARD_PULL_CTL3, 0xFF, 0xD5);
348 RTSX_WRITE_REG(chip, CARD_PULL_CTL4, 0xFF, 0x55);
349 RTSX_WRITE_REG(chip, CARD_PULL_CTL5, 0xFF, 0x55);
350 RTSX_WRITE_REG(chip, CARD_PULL_CTL6, 0xFF, 0x15);
351 } else if (CHECK_PID(chip, 0x5208)) {
352 RTSX_WRITE_REG(chip, CARD_PULL_CTL1, 0xFF,
353 XD_D3_PD | XD_D2_PD | XD_D1_PD | XD_D0_PD);
354 RTSX_WRITE_REG(chip, CARD_PULL_CTL2, 0xFF,
355 XD_D7_PD | XD_D6_PD | XD_D5_PD | XD_D4_PD);
356 RTSX_WRITE_REG(chip, CARD_PULL_CTL3, 0xFF,
357 XD_WP_PD | XD_CE_PD | XD_CLE_PD | XD_CD_PU);
358 RTSX_WRITE_REG(chip, CARD_PULL_CTL4, 0xFF,
359 XD_RDY_PD | XD_WE_PD | XD_RE_PD | XD_ALE_PD);
360 RTSX_WRITE_REG(chip, CARD_PULL_CTL5, 0xFF,
361 MS_INS_PU | SD_WP_PD | SD_CD_PU | SD_CMD_PD);
362 RTSX_WRITE_REG(chip, CARD_PULL_CTL6, 0xFF, MS_D5_PD | MS_D4_PD);
363 } else if (CHECK_PID(chip, 0x5288)) {
364 if (CHECK_BARO_PKG(chip, QFN)) {
365 RTSX_WRITE_REG(chip, CARD_PULL_CTL1, 0xFF, 0x55);
366 RTSX_WRITE_REG(chip, CARD_PULL_CTL2, 0xFF, 0x55);
367 RTSX_WRITE_REG(chip, CARD_PULL_CTL3, 0xFF, 0x4B);
368 RTSX_WRITE_REG(chip, CARD_PULL_CTL4, 0xFF, 0x69);
369 }
370 }
371
372 return STATUS_SUCCESS;
373}
374
375static void xd_clear_dma_buffer(struct rtsx_chip *chip)
376{
377 if (CHECK_PID(chip, 0x5209)) {
378 int retval;
379 u8 *buf;
380
381 RTSX_DEBUGP("xD ECC error, dummy write!\n");
382
383 buf = kmalloc(512, GFP_KERNEL);
384 if (!buf)
385 return;
386
387 rtsx_init_cmd(chip);
388
389 trans_dma_enable(DMA_TO_DEVICE, chip, 512, DMA_512);
390
391 rtsx_add_cmd(chip, WRITE_REG_CMD, CARD_SELECT, 0x07, SD_MOD_SEL);
392 rtsx_add_cmd(chip, WRITE_REG_CMD, CARD_CLK_EN, SD_CLK_EN, SD_CLK_EN);
393 if (chip->asic_code) {
394 rtsx_add_cmd(chip, WRITE_REG_CMD, CARD_PULL_CTL2, 0xFF, 0xAA);
395 } else {
396 rtsx_add_cmd(chip, WRITE_REG_CMD, FPGA_PULL_CTL,
397 FPGA_SD_PULL_CTL_BIT, 0);
398 }
399
400 rtsx_add_cmd(chip, WRITE_REG_CMD, SD_BYTE_CNT_L, 0xFF, 0x00);
401 rtsx_add_cmd(chip, WRITE_REG_CMD, SD_BYTE_CNT_H, 0xFF, 0x02);
402 rtsx_add_cmd(chip, WRITE_REG_CMD, SD_BLOCK_CNT_L, 0xFF, 1);
403 rtsx_add_cmd(chip, WRITE_REG_CMD, SD_BLOCK_CNT_H, 0xFF, 0);
404 rtsx_add_cmd(chip, WRITE_REG_CMD, SD_CFG1, 0x03, SD_BUS_WIDTH_4);
405
406 rtsx_add_cmd(chip, WRITE_REG_CMD, CARD_DATA_SOURCE, 0x01, RING_BUFFER);
407
408 rtsx_add_cmd(chip, WRITE_REG_CMD, SD_TRANSFER, 0xFF,
409 SD_TM_AUTO_WRITE_3 | SD_TRANSFER_START);
410 rtsx_add_cmd(chip, CHECK_REG_CMD, SD_TRANSFER, SD_TRANSFER_END, SD_TRANSFER_END);
411
412 rtsx_send_cmd_no_wait(chip);
413
414 retval = rtsx_transfer_data(chip, SD_CARD, buf, 512, 0, DMA_TO_DEVICE, 100);
415 if (retval < 0) {
416 u8 val;
417
418 rtsx_read_register(chip, SD_STAT1, &val);
419 RTSX_DEBUGP("SD_STAT1: 0x%x\n", val);
420
421 rtsx_read_register(chip, SD_STAT2, &val);
422 RTSX_DEBUGP("SD_STAT2: 0x%x\n", val);
423
424 rtsx_read_register(chip, SD_BUS_STAT, &val);
425 RTSX_DEBUGP("SD_BUS_STAT: 0x%x\n", val);
426
427 rtsx_write_register(chip, CARD_STOP, SD_STOP | SD_CLR_ERR, SD_STOP | SD_CLR_ERR);
428 }
429
430 kfree(buf);
431
432 if (chip->asic_code) {
433 rtsx_write_register(chip, CARD_PULL_CTL2, 0xFF, 0x55);
434 } else {
435 rtsx_write_register(chip, FPGA_PULL_CTL,
436 FPGA_SD_PULL_CTL_BIT, FPGA_SD_PULL_CTL_BIT);
437 }
438 rtsx_write_register(chip, CARD_SELECT, 0x07, XD_MOD_SEL);
439 rtsx_write_register(chip, CARD_CLK_EN, SD_CLK_EN, 0);
440 }
441}
442
443static int reset_xd(struct rtsx_chip *chip)
444{
445 struct xd_info *xd_card = &(chip->xd_card);
446 int retval, i, j;
447 u8 *ptr, id_buf[4], redunt[11];
448
449 retval = select_card(chip, XD_CARD);
450 if (retval != STATUS_SUCCESS)
451 TRACE_RET(chip, STATUS_FAIL);
452
453 rtsx_init_cmd(chip);
454
455 rtsx_add_cmd(chip, WRITE_REG_CMD, XD_CHK_DATA_STATUS, 0xFF, XD_PGSTS_NOT_FF);
456 if (chip->asic_code) {
457 if (!CHECK_PID(chip, 0x5288))
458 xd_fill_pull_ctl_disable(chip);
459 else
460 xd_fill_pull_ctl_stage1_barossa(chip);
461 } else {
462 rtsx_add_cmd(chip, WRITE_REG_CMD, FPGA_PULL_CTL, 0xFF,
463 (FPGA_XD_PULL_CTL_EN1 & FPGA_XD_PULL_CTL_EN3) | 0x20);
464 }
465
466 if (!chip->ft2_fast_mode)
467 rtsx_add_cmd(chip, WRITE_REG_CMD, XD_INIT, XD_NO_AUTO_PWR_OFF, 0);
468
469 rtsx_add_cmd(chip, WRITE_REG_CMD, CARD_OE, XD_OUTPUT_EN, 0);
470
471 retval = rtsx_send_cmd(chip, XD_CARD, 100);
472 if (retval < 0)
473 TRACE_RET(chip, STATUS_FAIL);
474
475 if (!chip->ft2_fast_mode) {
476 retval = card_power_off(chip, XD_CARD);
477 if (retval != STATUS_SUCCESS)
478 TRACE_RET(chip, STATUS_FAIL);
479
480 wait_timeout(250);
481
482 if (CHECK_PID(chip, 0x5209))
483 RTSX_WRITE_REG(chip, CARD_PULL_CTL1, 0xFF, 0xAA);
484
485 rtsx_init_cmd(chip);
486
487 if (chip->asic_code) {
488 xd_fill_pull_ctl_enable(chip);
489 } else {
490 rtsx_add_cmd(chip, WRITE_REG_CMD, FPGA_PULL_CTL, 0xFF,
491 (FPGA_XD_PULL_CTL_EN1 & FPGA_XD_PULL_CTL_EN2) | 0x20);
492 }
493
494 retval = rtsx_send_cmd(chip, XD_CARD, 100);
495 if (retval < 0)
496 TRACE_RET(chip, STATUS_FAIL);
497
498 retval = card_power_on(chip, XD_CARD);
499 if (retval != STATUS_SUCCESS)
500 TRACE_RET(chip, STATUS_FAIL);
501
502#ifdef SUPPORT_OCP
503 wait_timeout(50);
504 if (chip->ocp_stat & (SD_OC_NOW | SD_OC_EVER)) {
505 RTSX_DEBUGP("Over current, OCPSTAT is 0x%x\n", chip->ocp_stat);
506 TRACE_RET(chip, STATUS_FAIL);
507 }
508#endif
509 }
510
511 rtsx_init_cmd(chip);
512
513 if (chip->ft2_fast_mode) {
514 if (chip->asic_code) {
515 xd_fill_pull_ctl_enable(chip);
516 } else {
517 rtsx_add_cmd(chip, WRITE_REG_CMD, FPGA_PULL_CTL, 0xFF,
518 (FPGA_XD_PULL_CTL_EN1 & FPGA_XD_PULL_CTL_EN2) | 0x20);
519 }
520 }
521
522 rtsx_add_cmd(chip, WRITE_REG_CMD, CARD_OE, XD_OUTPUT_EN, XD_OUTPUT_EN);
523 rtsx_add_cmd(chip, WRITE_REG_CMD, XD_CTL, XD_CE_DISEN, XD_CE_DISEN);
524
525 retval = rtsx_send_cmd(chip, XD_CARD, 100);
526 if (retval < 0)
527 TRACE_RET(chip, STATUS_FAIL);
528
529 if (!chip->ft2_fast_mode)
530 wait_timeout(200);
531
532 retval = xd_set_init_para(chip);
533 if (retval != STATUS_SUCCESS)
534 TRACE_RET(chip, STATUS_FAIL);
535
536 /* Read ID to check if the timing setting is right */
537 for (i = 0; i < 4; i++) {
538 rtsx_init_cmd(chip);
539
540 rtsx_add_cmd(chip, WRITE_REG_CMD, XD_DTCTL, 0xFF,
541 XD_TIME_SETUP_STEP * 3 + XD_TIME_RW_STEP * (2 + i) + XD_TIME_RWN_STEP * i);
542 rtsx_add_cmd(chip, WRITE_REG_CMD, XD_CATCTL, 0xFF,
543 XD_TIME_SETUP_STEP * 3 + XD_TIME_RW_STEP * (4 + i) + XD_TIME_RWN_STEP * (3 + i));
544
545 rtsx_add_cmd(chip, WRITE_REG_CMD, XD_TRANSFER, 0xFF, XD_TRANSFER_START | XD_RESET);
546 rtsx_add_cmd(chip, CHECK_REG_CMD, XD_TRANSFER, XD_TRANSFER_END, XD_TRANSFER_END);
547
548 rtsx_add_cmd(chip, READ_REG_CMD, XD_DAT, 0, 0);
549 rtsx_add_cmd(chip, READ_REG_CMD, XD_CTL, 0, 0);
550
551 retval = rtsx_send_cmd(chip, XD_CARD, 100);
552 if (retval < 0)
553 TRACE_RET(chip, STATUS_FAIL);
554
555 ptr = rtsx_get_cmd_data(chip) + 1;
556
557 RTSX_DEBUGP("XD_DAT: 0x%x, XD_CTL: 0x%x\n", ptr[0], ptr[1]);
558
559 if (((ptr[0] & READY_FLAG) != READY_STATE) || !(ptr[1] & XD_RDY))
560 continue;
561
562 retval = xd_read_id(chip, READ_ID, id_buf, 4);
563 if (retval != STATUS_SUCCESS)
564 TRACE_RET(chip, STATUS_FAIL);
565
566 RTSX_DEBUGP("READ_ID: 0x%x 0x%x 0x%x 0x%x\n",
567 id_buf[0], id_buf[1], id_buf[2], id_buf[3]);
568
569 xd_card->device_code = id_buf[1];
570
571 /* Check if the xD card is supported */
572 switch (xd_card->device_code) {
573 case XD_4M_X8_512_1:
574 case XD_4M_X8_512_2:
575 xd_card->block_shift = 4;
576 xd_card->page_off = 0x0F;
577 xd_card->addr_cycle = 3;
578 xd_card->zone_cnt = 1;
579 xd_card->capacity = 8000;
580 XD_SET_4MB(xd_card);
581 break;
582 case XD_8M_X8_512:
583 xd_card->block_shift = 4;
584 xd_card->page_off = 0x0F;
585 xd_card->addr_cycle = 3;
586 xd_card->zone_cnt = 1;
587 xd_card->capacity = 16000;
588 break;
589 case XD_16M_X8_512:
590 XD_PAGE_512(xd_card);
591 xd_card->addr_cycle = 3;
592 xd_card->zone_cnt = 1;
593 xd_card->capacity = 32000;
594 break;
595 case XD_32M_X8_512:
596 XD_PAGE_512(xd_card);
597 xd_card->addr_cycle = 3;
598 xd_card->zone_cnt = 2;
599 xd_card->capacity = 64000;
600 break;
601 case XD_64M_X8_512:
602 XD_PAGE_512(xd_card);
603 xd_card->addr_cycle = 4;
604 xd_card->zone_cnt = 4;
605 xd_card->capacity = 128000;
606 break;
607 case XD_128M_X8_512:
608 XD_PAGE_512(xd_card);
609 xd_card->addr_cycle = 4;
610 xd_card->zone_cnt = 8;
611 xd_card->capacity = 256000;
612 break;
613 case XD_256M_X8_512:
614 XD_PAGE_512(xd_card);
615 xd_card->addr_cycle = 4;
616 xd_card->zone_cnt = 16;
617 xd_card->capacity = 512000;
618 break;
619 case XD_512M_X8:
620 XD_PAGE_512(xd_card);
621 xd_card->addr_cycle = 4;
622 xd_card->zone_cnt = 32;
623 xd_card->capacity = 1024000;
624 break;
625 case xD_1G_X8_512:
626 XD_PAGE_512(xd_card);
627 xd_card->addr_cycle = 4;
628 xd_card->zone_cnt = 64;
629 xd_card->capacity = 2048000;
630 break;
631 case xD_2G_X8_512:
632 XD_PAGE_512(xd_card);
633 xd_card->addr_cycle = 4;
634 xd_card->zone_cnt = 128;
635 xd_card->capacity = 4096000;
636 break;
637 default:
638 continue;
639 }
640
641 /* Confirm timing setting */
642 for (j = 0; j < 10; j++) {
643 retval = xd_read_id(chip, READ_ID, id_buf, 4);
644 if (retval != STATUS_SUCCESS)
645 TRACE_RET(chip, STATUS_FAIL);
646
647 if (id_buf[1] != xd_card->device_code)
648 break;
649 }
650
651 if (j == 10)
652 break;
653 }
654
655 if (i == 4) {
656 xd_card->block_shift = 0;
657 xd_card->page_off = 0;
658 xd_card->addr_cycle = 0;
659 xd_card->capacity = 0;
660
661 TRACE_RET(chip, STATUS_FAIL);
662 }
663
664 retval = xd_read_id(chip, READ_xD_ID, id_buf, 4);
665 if (retval != STATUS_SUCCESS)
666 TRACE_RET(chip, STATUS_FAIL);
667 RTSX_DEBUGP("READ_xD_ID: 0x%x 0x%x 0x%x 0x%x\n",
668 id_buf[0], id_buf[1], id_buf[2], id_buf[3]);
669 if (id_buf[2] != XD_ID_CODE)
670 TRACE_RET(chip, STATUS_FAIL);
671
672 /* Search CIS block */
673 for (i = 0; i < 24; i++) {
674 u32 page_addr;
675
676 if (detect_card_cd(chip, XD_CARD) != STATUS_SUCCESS)
677 TRACE_RET(chip, STATUS_FAIL);
678
679 page_addr = (u32)i << xd_card->block_shift;
680
681 for (j = 0; j < 3; j++) {
682 retval = xd_read_redundant(chip, page_addr, redunt, 11);
683 if (retval == STATUS_SUCCESS)
684 break;
685 }
686 if (j == 3)
687 continue;
688
689 if (redunt[BLOCK_STATUS] != XD_GBLK)
690 continue;
691
692 j = 0;
693 if (redunt[PAGE_STATUS] != XD_GPG) {
694 for (j = 1; j <= 8; j++) {
695 retval = xd_read_redundant(chip, page_addr + j, redunt, 11);
696 if (retval == STATUS_SUCCESS) {
697 if (redunt[PAGE_STATUS] == XD_GPG)
698 break;
699 }
700 }
701
702 if (j == 9)
703 break;
704 }
705
706 /* Check CIS data */
707 if ((redunt[BLOCK_STATUS] == XD_GBLK) && (redunt[PARITY] & XD_BA1_ALL0)) {
708 u8 buf[10];
709
710 page_addr += j;
711
712 retval = xd_read_cis(chip, page_addr, buf, 10);
713 if (retval != STATUS_SUCCESS)
714 TRACE_RET(chip, STATUS_FAIL);
715
716 if ((buf[0] == 0x01) && (buf[1] == 0x03) && (buf[2] == 0xD9)
717 && (buf[3] == 0x01) && (buf[4] == 0xFF)
718 && (buf[5] == 0x18) && (buf[6] == 0x02)
719 && (buf[7] == 0xDF) && (buf[8] == 0x01)
720 && (buf[9] == 0x20)) {
721 xd_card->cis_block = (u16)i;
722 }
723 }
724
725 break;
726 }
727
728 RTSX_DEBUGP("CIS block: 0x%x\n", xd_card->cis_block);
729 if (xd_card->cis_block == 0xFFFF)
730 TRACE_RET(chip, STATUS_FAIL);
731
732 chip->capacity[chip->card2lun[XD_CARD]] = xd_card->capacity;
733
734 return STATUS_SUCCESS;
735}
736
737static int xd_check_data_blank(u8 *redunt)
738{
739 int i;
740
741 for (i = 0; i < 6; i++) {
742 if (redunt[PAGE_STATUS + i] != 0xFF)
743 return 0;
744 }
745
746 if ((redunt[PARITY] & (XD_ECC1_ALL1 | XD_ECC2_ALL1)) != (XD_ECC1_ALL1 | XD_ECC2_ALL1))
747 return 0;
748
749
750 for (i = 0; i < 4; i++) {
751 if (redunt[RESERVED0 + i] != 0xFF)
752 return 0;
753 }
754
755 return 1;
756}
757
758static u16 xd_load_log_block_addr(u8 *redunt)
759{
760 u16 addr = 0xFFFF;
761
762 if (redunt[PARITY] & XD_BA1_BA2_EQL)
763 addr = ((u16)redunt[BLOCK_ADDR1_H] << 8) | redunt[BLOCK_ADDR1_L];
764 else if (redunt[PARITY] & XD_BA1_VALID)
765 addr = ((u16)redunt[BLOCK_ADDR1_H] << 8) | redunt[BLOCK_ADDR1_L];
766 else if (redunt[PARITY] & XD_BA2_VALID)
767 addr = ((u16)redunt[BLOCK_ADDR2_H] << 8) | redunt[BLOCK_ADDR2_L];
768
769 return addr;
770}
771
772static int xd_init_l2p_tbl(struct rtsx_chip *chip)
773{
774 struct xd_info *xd_card = &(chip->xd_card);
775 int size, i;
776
777 RTSX_DEBUGP("xd_init_l2p_tbl: zone_cnt = %d\n", xd_card->zone_cnt);
778
779 if (xd_card->zone_cnt < 1)
780 TRACE_RET(chip, STATUS_FAIL);
781
782 size = xd_card->zone_cnt * sizeof(struct zone_entry);
783 RTSX_DEBUGP("Buffer size for l2p table is %d\n", size);
784
785 xd_card->zone = (struct zone_entry *)vmalloc(size);
786 if (!xd_card->zone)
787 TRACE_RET(chip, STATUS_ERROR);
788
789 for (i = 0; i < xd_card->zone_cnt; i++) {
790 xd_card->zone[i].build_flag = 0;
791 xd_card->zone[i].l2p_table = NULL;
792 xd_card->zone[i].free_table = NULL;
793 xd_card->zone[i].get_index = 0;
794 xd_card->zone[i].set_index = 0;
795 xd_card->zone[i].unused_blk_cnt = 0;
796 }
797
798 return STATUS_SUCCESS;
799}
800
801static inline void free_zone(struct zone_entry *zone)
802{
803 RTSX_DEBUGP("free_zone\n");
804
805 if (!zone)
806 return;
807
808 zone->build_flag = 0;
809 zone->set_index = 0;
810 zone->get_index = 0;
811 zone->unused_blk_cnt = 0;
812 if (zone->l2p_table) {
813 vfree(zone->l2p_table);
814 zone->l2p_table = NULL;
815 }
816 if (zone->free_table) {
817 vfree(zone->free_table);
818 zone->free_table = NULL;
819 }
820}
821
822static void xd_set_unused_block(struct rtsx_chip *chip, u32 phy_blk)
823{
824 struct xd_info *xd_card = &(chip->xd_card);
825 struct zone_entry *zone;
826 int zone_no;
827
828 zone_no = (int)phy_blk >> 10;
829 if (zone_no >= xd_card->zone_cnt) {
830 RTSX_DEBUGP("Set unused block to invalid zone (zone_no = %d, zone_cnt = %d)\n",
831 zone_no, xd_card->zone_cnt);
832 return;
833 }
834 zone = &(xd_card->zone[zone_no]);
835
836 if (zone->free_table == NULL) {
837 if (xd_build_l2p_tbl(chip, zone_no) != STATUS_SUCCESS)
838 return;
839 }
840
841 if ((zone->set_index >= XD_FREE_TABLE_CNT)
842 || (zone->set_index < 0)) {
843 free_zone(zone);
844 RTSX_DEBUGP("Set unused block fail, invalid set_index\n");
845 return;
846 }
847
848 RTSX_DEBUGP("Set unused block to index %d\n", zone->set_index);
849
850 zone->free_table[zone->set_index++] = (u16) (phy_blk & 0x3ff);
851 if (zone->set_index >= XD_FREE_TABLE_CNT)
852 zone->set_index = 0;
853 zone->unused_blk_cnt++;
854}
855
856static u32 xd_get_unused_block(struct rtsx_chip *chip, int zone_no)
857{
858 struct xd_info *xd_card = &(chip->xd_card);
859 struct zone_entry *zone;
860 u32 phy_blk;
861
862 if (zone_no >= xd_card->zone_cnt) {
863 RTSX_DEBUGP("Get unused block from invalid zone (zone_no = %d, zone_cnt = %d)\n",
864 zone_no, xd_card->zone_cnt);
865 return BLK_NOT_FOUND;
866 }
867 zone = &(xd_card->zone[zone_no]);
868
869 if ((zone->unused_blk_cnt == 0) || (zone->set_index == zone->get_index)) {
870 free_zone(zone);
871 RTSX_DEBUGP("Get unused block fail, no unused block available\n");
872 return BLK_NOT_FOUND;
873 }
874 if ((zone->get_index >= XD_FREE_TABLE_CNT) || (zone->get_index < 0)) {
875 free_zone(zone);
876 RTSX_DEBUGP("Get unused block fail, invalid get_index\n");
877 return BLK_NOT_FOUND;
878 }
879
880 RTSX_DEBUGP("Get unused block from index %d\n", zone->get_index);
881
882 phy_blk = zone->free_table[zone->get_index];
883 zone->free_table[zone->get_index++] = 0xFFFF;
884 if (zone->get_index >= XD_FREE_TABLE_CNT)
885 zone->get_index = 0;
886 zone->unused_blk_cnt--;
887
888 phy_blk += ((u32)(zone_no) << 10);
889 return phy_blk;
890}
891
892static void xd_set_l2p_tbl(struct rtsx_chip *chip, int zone_no, u16 log_off, u16 phy_off)
893{
894 struct xd_info *xd_card = &(chip->xd_card);
895 struct zone_entry *zone;
896
897 zone = &(xd_card->zone[zone_no]);
898 zone->l2p_table[log_off] = phy_off;
899}
900
901static u32 xd_get_l2p_tbl(struct rtsx_chip *chip, int zone_no, u16 log_off)
902{
903 struct xd_info *xd_card = &(chip->xd_card);
904 struct zone_entry *zone;
905 int retval;
906
907 zone = &(xd_card->zone[zone_no]);
908 if (zone->l2p_table[log_off] == 0xFFFF) {
909 u32 phy_blk = 0;
910 int i;
911
912#ifdef XD_DELAY_WRITE
913 retval = xd_delay_write(chip);
914 if (retval != STATUS_SUCCESS) {
915 RTSX_DEBUGP("In xd_get_l2p_tbl, delay write fail!\n");
916 return BLK_NOT_FOUND;
917 }
918#endif
919
920 if (zone->unused_blk_cnt <= 0) {
921 RTSX_DEBUGP("No unused block!\n");
922 return BLK_NOT_FOUND;
923 }
924
925 for (i = 0; i < zone->unused_blk_cnt; i++) {
926 phy_blk = xd_get_unused_block(chip, zone_no);
927 if (phy_blk == BLK_NOT_FOUND) {
928 RTSX_DEBUGP("No unused block available!\n");
929 return BLK_NOT_FOUND;
930 }
931
932 retval = xd_init_page(chip, phy_blk, log_off, 0, xd_card->page_off + 1);
933 if (retval == STATUS_SUCCESS)
934 break;
935 }
936 if (i >= zone->unused_blk_cnt) {
937 RTSX_DEBUGP("No good unused block available!\n");
938 return BLK_NOT_FOUND;
939 }
940
941 xd_set_l2p_tbl(chip, zone_no, log_off, (u16)(phy_blk & 0x3FF));
942 return phy_blk;
943 }
944
945 return (u32)zone->l2p_table[log_off] + ((u32)(zone_no) << 10);
946}
947
948int reset_xd_card(struct rtsx_chip *chip)
949{
950 struct xd_info *xd_card = &(chip->xd_card);
951 int retval;
952
953 memset(xd_card, 0, sizeof(struct xd_info));
954
955 xd_card->block_shift = 0;
956 xd_card->page_off = 0;
957 xd_card->addr_cycle = 0;
958 xd_card->capacity = 0;
959 xd_card->zone_cnt = 0;
960 xd_card->cis_block = 0xFFFF;
961 xd_card->delay_write.delay_write_flag = 0;
962
963 retval = enable_card_clock(chip, XD_CARD);
964 if (retval != STATUS_SUCCESS)
965 TRACE_RET(chip, STATUS_FAIL);
966
967 retval = reset_xd(chip);
968 if (retval != STATUS_SUCCESS)
969 TRACE_RET(chip, STATUS_FAIL);
970
971 retval = xd_init_l2p_tbl(chip);
972 if (retval != STATUS_SUCCESS)
973 TRACE_RET(chip, STATUS_FAIL);
974
975 return STATUS_SUCCESS;
976}
977
978static int xd_mark_bad_block(struct rtsx_chip *chip, u32 phy_blk)
979{
980 struct xd_info *xd_card = &(chip->xd_card);
981 int retval;
982 u32 page_addr;
983 u8 reg = 0;
984
985 RTSX_DEBUGP("mark block 0x%x as bad block\n", phy_blk);
986
987 if (phy_blk == BLK_NOT_FOUND)
988 TRACE_RET(chip, STATUS_FAIL);
989
990 rtsx_init_cmd(chip);
991
992 rtsx_add_cmd(chip, WRITE_REG_CMD, XD_PAGE_STATUS, 0xFF, XD_GPG);
993 rtsx_add_cmd(chip, WRITE_REG_CMD, XD_BLOCK_STATUS, 0xFF, XD_LATER_BBLK);
994 rtsx_add_cmd(chip, WRITE_REG_CMD, XD_BLOCK_ADDR1_H, 0xFF, 0xFF);
995 rtsx_add_cmd(chip, WRITE_REG_CMD, XD_BLOCK_ADDR1_L, 0xFF, 0xFF);
996 rtsx_add_cmd(chip, WRITE_REG_CMD, XD_BLOCK_ADDR2_H, 0xFF, 0xFF);
997 rtsx_add_cmd(chip, WRITE_REG_CMD, XD_BLOCK_ADDR2_L, 0xFF, 0xFF);
998 rtsx_add_cmd(chip, WRITE_REG_CMD, XD_RESERVED0, 0xFF, 0xFF);
999 rtsx_add_cmd(chip, WRITE_REG_CMD, XD_RESERVED1, 0xFF, 0xFF);
1000 rtsx_add_cmd(chip, WRITE_REG_CMD, XD_RESERVED2, 0xFF, 0xFF);
1001 rtsx_add_cmd(chip, WRITE_REG_CMD, XD_RESERVED3, 0xFF, 0xFF);
1002
1003 page_addr = phy_blk << xd_card->block_shift;
1004
1005 xd_assign_phy_addr(chip, page_addr, XD_RW_ADDR);
1006
1007 rtsx_add_cmd(chip, WRITE_REG_CMD, XD_PAGE_CNT, 0xFF, xd_card->page_off + 1);
1008
1009 rtsx_add_cmd(chip, WRITE_REG_CMD, XD_TRANSFER, 0xFF, XD_TRANSFER_START | XD_WRITE_REDUNDANT);
1010 rtsx_add_cmd(chip, CHECK_REG_CMD, XD_TRANSFER, XD_TRANSFER_END, XD_TRANSFER_END);
1011
1012 retval = rtsx_send_cmd(chip, XD_CARD, 500);
1013 if (retval < 0) {
1014 rtsx_clear_xd_error(chip);
1015 rtsx_read_register(chip, XD_DAT, &reg);
1016 if (reg & PROGRAM_ERROR)
1017 xd_set_err_code(chip, XD_PRG_ERROR);
1018 else
1019 xd_set_err_code(chip, XD_TO_ERROR);
1020 TRACE_RET(chip, STATUS_FAIL);
1021 }
1022
1023 return STATUS_SUCCESS;
1024}
1025
1026static int xd_init_page(struct rtsx_chip *chip, u32 phy_blk, u16 logoff, u8 start_page, u8 end_page)
1027{
1028 struct xd_info *xd_card = &(chip->xd_card);
1029 int retval;
1030 u32 page_addr;
1031 u8 reg = 0;
1032
1033 RTSX_DEBUGP("Init block 0x%x\n", phy_blk);
1034
1035 if (start_page > end_page)
1036 TRACE_RET(chip, STATUS_FAIL);
1037 if (phy_blk == BLK_NOT_FOUND)
1038 TRACE_RET(chip, STATUS_FAIL);
1039
1040 rtsx_init_cmd(chip);
1041
1042 rtsx_add_cmd(chip, WRITE_REG_CMD, XD_PAGE_STATUS, 0xFF, 0xFF);
1043 rtsx_add_cmd(chip, WRITE_REG_CMD, XD_BLOCK_STATUS, 0xFF, 0xFF);
1044 rtsx_add_cmd(chip, WRITE_REG_CMD, XD_BLOCK_ADDR1_H, 0xFF, (u8)(logoff >> 8));
1045 rtsx_add_cmd(chip, WRITE_REG_CMD, XD_BLOCK_ADDR1_L, 0xFF, (u8)logoff);
1046
1047 page_addr = (phy_blk << xd_card->block_shift) + start_page;
1048
1049 xd_assign_phy_addr(chip, page_addr, XD_RW_ADDR);
1050
1051 rtsx_add_cmd(chip, WRITE_REG_CMD, XD_CFG, XD_BA_TRANSFORM, XD_BA_TRANSFORM);
1052
1053 rtsx_add_cmd(chip, WRITE_REG_CMD, XD_PAGE_CNT, 0xFF, (end_page - start_page));
1054
1055 rtsx_add_cmd(chip, WRITE_REG_CMD, XD_TRANSFER, 0xFF, XD_TRANSFER_START | XD_WRITE_REDUNDANT);
1056 rtsx_add_cmd(chip, CHECK_REG_CMD, XD_TRANSFER, XD_TRANSFER_END, XD_TRANSFER_END);
1057
1058 retval = rtsx_send_cmd(chip, XD_CARD, 500);
1059 if (retval < 0) {
1060 rtsx_clear_xd_error(chip);
1061 rtsx_read_register(chip, XD_DAT, &reg);
1062 if (reg & PROGRAM_ERROR) {
1063 xd_mark_bad_block(chip, phy_blk);
1064 xd_set_err_code(chip, XD_PRG_ERROR);
1065 } else {
1066 xd_set_err_code(chip, XD_TO_ERROR);
1067 }
1068 TRACE_RET(chip, STATUS_FAIL);
1069 }
1070
1071 return STATUS_SUCCESS;
1072}
1073
1074static int xd_copy_page(struct rtsx_chip *chip, u32 old_blk, u32 new_blk, u8 start_page, u8 end_page)
1075{
1076 struct xd_info *xd_card = &(chip->xd_card);
1077 u32 old_page, new_page;
1078 u8 i, reg = 0;
1079 int retval;
1080
1081 RTSX_DEBUGP("Copy page from block 0x%x to block 0x%x\n", old_blk, new_blk);
1082
1083 if (start_page > end_page)
1084 TRACE_RET(chip, STATUS_FAIL);
1085
1086 if ((old_blk == BLK_NOT_FOUND) || (new_blk == BLK_NOT_FOUND))
1087 TRACE_RET(chip, STATUS_FAIL);
1088
1089 old_page = (old_blk << xd_card->block_shift) + start_page;
1090 new_page = (new_blk << xd_card->block_shift) + start_page;
1091
1092 XD_CLR_BAD_NEWBLK(xd_card);
1093
1094 RTSX_WRITE_REG(chip, CARD_DATA_SOURCE, 0x01, PINGPONG_BUFFER);
1095
1096 for (i = start_page; i < end_page; i++) {
1097 if (detect_card_cd(chip, XD_CARD) != STATUS_SUCCESS) {
1098 rtsx_clear_xd_error(chip);
1099 xd_set_err_code(chip, XD_NO_CARD);
1100 TRACE_RET(chip, STATUS_FAIL);
1101 }
1102
1103 rtsx_init_cmd(chip);
1104
1105 xd_assign_phy_addr(chip, old_page, XD_RW_ADDR);
1106
1107 rtsx_add_cmd(chip, WRITE_REG_CMD, XD_PAGE_CNT, 0xFF, 1);
1108 rtsx_add_cmd(chip, WRITE_REG_CMD, XD_CHK_DATA_STATUS, XD_AUTO_CHK_DATA_STATUS, 0);
1109 rtsx_add_cmd(chip, WRITE_REG_CMD, XD_TRANSFER, 0xFF, XD_TRANSFER_START | XD_READ_PAGES);
1110 rtsx_add_cmd(chip, CHECK_REG_CMD, XD_TRANSFER, XD_TRANSFER_END, XD_TRANSFER_END);
1111
1112 retval = rtsx_send_cmd(chip, XD_CARD, 500);
1113 if (retval < 0) {
1114 rtsx_clear_xd_error(chip);
1115 reg = 0;
1116 rtsx_read_register(chip, XD_CTL, &reg);
1117 if (reg & (XD_ECC1_ERROR | XD_ECC2_ERROR)) {
1118 wait_timeout(100);
1119
1120 if (detect_card_cd(chip, XD_CARD) != STATUS_SUCCESS) {
1121 xd_set_err_code(chip, XD_NO_CARD);
1122 TRACE_RET(chip, STATUS_FAIL);
1123 }
1124
1125 if (((reg & (XD_ECC1_ERROR | XD_ECC1_UNCORRECTABLE)) ==
1126 (XD_ECC1_ERROR | XD_ECC1_UNCORRECTABLE))
1127 || ((reg & (XD_ECC2_ERROR | XD_ECC2_UNCORRECTABLE)) ==
1128 (XD_ECC2_ERROR | XD_ECC2_UNCORRECTABLE))) {
1129 rtsx_write_register(chip, XD_PAGE_STATUS, 0xFF, XD_BPG);
1130 rtsx_write_register(chip, XD_BLOCK_STATUS, 0xFF, XD_GBLK);
1131 XD_SET_BAD_OLDBLK(xd_card);
1132 RTSX_DEBUGP("old block 0x%x ecc error\n", old_blk);
1133 }
1134 } else {
1135 xd_set_err_code(chip, XD_TO_ERROR);
1136 TRACE_RET(chip, STATUS_FAIL);
1137 }
1138 }
1139
1140 if (XD_CHK_BAD_OLDBLK(xd_card))
1141 rtsx_clear_xd_error(chip);
1142
1143 rtsx_init_cmd(chip);
1144
1145 xd_assign_phy_addr(chip, new_page, XD_RW_ADDR);
1146 rtsx_add_cmd(chip, WRITE_REG_CMD, XD_PAGE_CNT, 0xFF, 1);
1147 rtsx_add_cmd(chip, WRITE_REG_CMD, XD_TRANSFER, 0xFF,
1148 XD_TRANSFER_START | XD_WRITE_PAGES);
1149 rtsx_add_cmd(chip, CHECK_REG_CMD, XD_TRANSFER, XD_TRANSFER_END, XD_TRANSFER_END);
1150
1151 retval = rtsx_send_cmd(chip, XD_CARD, 300);
1152 if (retval < 0) {
1153 rtsx_clear_xd_error(chip);
1154 reg = 0;
1155 rtsx_read_register(chip, XD_DAT, &reg);
1156 if (reg & PROGRAM_ERROR) {
1157 xd_mark_bad_block(chip, new_blk);
1158 xd_set_err_code(chip, XD_PRG_ERROR);
1159 XD_SET_BAD_NEWBLK(xd_card);
1160 } else {
1161 xd_set_err_code(chip, XD_TO_ERROR);
1162 }
1163 TRACE_RET(chip, STATUS_FAIL);
1164 }
1165
1166 old_page++;
1167 new_page++;
1168 }
1169
1170 return STATUS_SUCCESS;
1171}
1172
1173static int xd_reset_cmd(struct rtsx_chip *chip)
1174{
1175 int retval;
1176 u8 *ptr;
1177
1178 rtsx_init_cmd(chip);
1179
1180 rtsx_add_cmd(chip, WRITE_REG_CMD, XD_TRANSFER, 0xFF, XD_TRANSFER_START | XD_RESET);
1181 rtsx_add_cmd(chip, CHECK_REG_CMD, XD_TRANSFER, XD_TRANSFER_END, XD_TRANSFER_END);
1182 rtsx_add_cmd(chip, READ_REG_CMD, XD_DAT, 0, 0);
1183 rtsx_add_cmd(chip, READ_REG_CMD, XD_CTL, 0, 0);
1184
1185 retval = rtsx_send_cmd(chip, XD_CARD, 100);
1186 if (retval < 0)
1187 TRACE_RET(chip, STATUS_FAIL);
1188
1189 ptr = rtsx_get_cmd_data(chip) + 1;
1190 if (((ptr[0] & READY_FLAG) == READY_STATE) && (ptr[1] & XD_RDY))
1191 return STATUS_SUCCESS;
1192
1193 TRACE_RET(chip, STATUS_FAIL);
1194}
1195
1196static int xd_erase_block(struct rtsx_chip *chip, u32 phy_blk)
1197{
1198 struct xd_info *xd_card = &(chip->xd_card);
1199 u32 page_addr;
1200 u8 reg = 0, *ptr;
1201 int i, retval;
1202
1203 if (phy_blk == BLK_NOT_FOUND)
1204 TRACE_RET(chip, STATUS_FAIL);
1205
1206 page_addr = phy_blk << xd_card->block_shift;
1207
1208 for (i = 0; i < 3; i++) {
1209 rtsx_init_cmd(chip);
1210
1211 xd_assign_phy_addr(chip, page_addr, XD_ERASE_ADDR);
1212
1213 rtsx_add_cmd(chip, WRITE_REG_CMD, XD_TRANSFER, 0xFF, XD_TRANSFER_START | XD_ERASE);
1214 rtsx_add_cmd(chip, CHECK_REG_CMD, XD_TRANSFER, XD_TRANSFER_END, XD_TRANSFER_END);
1215 rtsx_add_cmd(chip, READ_REG_CMD, XD_DAT, 0, 0);
1216
1217 retval = rtsx_send_cmd(chip, XD_CARD, 250);
1218 if (retval < 0) {
1219 rtsx_clear_xd_error(chip);
1220 rtsx_read_register(chip, XD_DAT, &reg);
1221 if (reg & PROGRAM_ERROR) {
1222 xd_mark_bad_block(chip, phy_blk);
1223 xd_set_err_code(chip, XD_PRG_ERROR);
1224 TRACE_RET(chip, STATUS_FAIL);
1225 } else {
1226 xd_set_err_code(chip, XD_ERASE_FAIL);
1227 }
1228 retval = xd_reset_cmd(chip);
1229 if (retval != STATUS_SUCCESS)
1230 TRACE_RET(chip, STATUS_FAIL);
1231 continue;
1232 }
1233
1234 ptr = rtsx_get_cmd_data(chip) + 1;
1235 if (*ptr & PROGRAM_ERROR) {
1236 xd_mark_bad_block(chip, phy_blk);
1237 xd_set_err_code(chip, XD_PRG_ERROR);
1238 TRACE_RET(chip, STATUS_FAIL);
1239 }
1240
1241 return STATUS_SUCCESS;
1242 }
1243
1244 xd_mark_bad_block(chip, phy_blk);
1245 xd_set_err_code(chip, XD_ERASE_FAIL);
1246 TRACE_RET(chip, STATUS_FAIL);
1247}
1248
1249
1250static int xd_build_l2p_tbl(struct rtsx_chip *chip, int zone_no)
1251{
1252 struct xd_info *xd_card = &(chip->xd_card);
1253 struct zone_entry *zone;
1254 int retval;
1255 u32 start, end, i;
1256 u16 max_logoff, cur_fst_page_logoff, cur_lst_page_logoff, ent_lst_page_logoff;
1257 u8 redunt[11];
1258
1259 RTSX_DEBUGP("xd_build_l2p_tbl: %d\n", zone_no);
1260
1261 if (xd_card->zone == NULL) {
1262 retval = xd_init_l2p_tbl(chip);
1263 if (retval != STATUS_SUCCESS)
1264 return retval;
1265 }
1266
1267 if (xd_card->zone[zone_no].build_flag) {
1268 RTSX_DEBUGP("l2p table of zone %d has been built\n", zone_no);
1269 return STATUS_SUCCESS;
1270 }
1271
1272 zone = &(xd_card->zone[zone_no]);
1273
1274 if (zone->l2p_table == NULL) {
1275 zone->l2p_table = (u16 *)vmalloc(2000);
1276 if (zone->l2p_table == NULL)
1277 TRACE_GOTO(chip, Build_Fail);
1278 }
1279 memset((u8 *)(zone->l2p_table), 0xff, 2000);
1280
1281 if (zone->free_table == NULL) {
1282 zone->free_table = (u16 *)vmalloc(XD_FREE_TABLE_CNT * 2);
1283 if (zone->free_table == NULL)
1284 TRACE_GOTO(chip, Build_Fail);
1285 }
1286 memset((u8 *)(zone->free_table), 0xff, XD_FREE_TABLE_CNT * 2);
1287
1288 if (zone_no == 0) {
1289 if (xd_card->cis_block == 0xFFFF)
1290 start = 0;
1291 else
1292 start = xd_card->cis_block + 1;
1293 if (XD_CHK_4MB(xd_card)) {
1294 end = 0x200;
1295 max_logoff = 499;
1296 } else {
1297 end = 0x400;
1298 max_logoff = 999;
1299 }
1300 } else {
1301 start = (u32)(zone_no) << 10;
1302 end = (u32)(zone_no + 1) << 10;
1303 max_logoff = 999;
1304 }
1305
1306 RTSX_DEBUGP("start block 0x%x, end block 0x%x\n", start, end);
1307
1308 zone->set_index = zone->get_index = 0;
1309 zone->unused_blk_cnt = 0;
1310
1311 for (i = start; i < end; i++) {
1312 u32 page_addr = i << xd_card->block_shift;
1313 u32 phy_block;
1314
1315 retval = xd_read_redundant(chip, page_addr, redunt, 11);
1316 if (retval != STATUS_SUCCESS)
1317 continue;
1318
1319 if (redunt[BLOCK_STATUS] != 0xFF) {
1320 RTSX_DEBUGP("bad block\n");
1321 continue;
1322 }
1323
1324 if (xd_check_data_blank(redunt)) {
1325 RTSX_DEBUGP("blank block\n");
1326 xd_set_unused_block(chip, i);
1327 continue;
1328 }
1329
1330 cur_fst_page_logoff = xd_load_log_block_addr(redunt);
1331 if ((cur_fst_page_logoff == 0xFFFF) || (cur_fst_page_logoff > max_logoff)) {
1332 retval = xd_erase_block(chip, i);
1333 if (retval == STATUS_SUCCESS)
1334 xd_set_unused_block(chip, i);
1335 continue;
1336 }
1337
1338 if ((zone_no == 0) && (cur_fst_page_logoff == 0) && (redunt[PAGE_STATUS] != XD_GPG))
1339 XD_SET_MBR_FAIL(xd_card);
1340
1341 if (zone->l2p_table[cur_fst_page_logoff] == 0xFFFF) {
1342 zone->l2p_table[cur_fst_page_logoff] = (u16)(i & 0x3FF);
1343 continue;
1344 }
1345
1346 phy_block = zone->l2p_table[cur_fst_page_logoff] + ((u32)((zone_no) << 10));
1347
1348 page_addr = ((i + 1) << xd_card->block_shift) - 1;
1349
1350 retval = xd_read_redundant(chip, page_addr, redunt, 11);
1351 if (retval != STATUS_SUCCESS)
1352 continue;
1353
1354 cur_lst_page_logoff = xd_load_log_block_addr(redunt);
1355 if (cur_lst_page_logoff == cur_fst_page_logoff) {
1356 int m;
1357
1358 page_addr = ((phy_block + 1) << xd_card->block_shift) - 1;
1359
1360 for (m = 0; m < 3; m++) {
1361 retval = xd_read_redundant(chip, page_addr, redunt, 11);
1362 if (retval == STATUS_SUCCESS)
1363 break;
1364 }
1365
1366 if (m == 3) {
1367 zone->l2p_table[cur_fst_page_logoff] = (u16)(i & 0x3FF);
1368 retval = xd_erase_block(chip, phy_block);
1369 if (retval == STATUS_SUCCESS)
1370 xd_set_unused_block(chip, phy_block);
1371 continue;
1372 }
1373
1374 ent_lst_page_logoff = xd_load_log_block_addr(redunt);
1375 if (ent_lst_page_logoff != cur_fst_page_logoff) {
1376 zone->l2p_table[cur_fst_page_logoff] = (u16)(i & 0x3FF);
1377 retval = xd_erase_block(chip, phy_block);
1378 if (retval == STATUS_SUCCESS)
1379 xd_set_unused_block(chip, phy_block);
1380 continue;
1381 } else {
1382 retval = xd_erase_block(chip, i);
1383 if (retval == STATUS_SUCCESS)
1384 xd_set_unused_block(chip, i);
1385 }
1386 } else {
1387 retval = xd_erase_block(chip, i);
1388 if (retval == STATUS_SUCCESS)
1389 xd_set_unused_block(chip, i);
1390 }
1391 }
1392
1393 if (XD_CHK_4MB(xd_card))
1394 end = 500;
1395 else
1396 end = 1000;
1397
1398 i = 0;
1399 for (start = 0; start < end; start++) {
1400 if (zone->l2p_table[start] == 0xFFFF)
1401 i++;
1402 }
1403
1404 RTSX_DEBUGP("Block count %d, invalid L2P entry %d\n", end, i);
1405 RTSX_DEBUGP("Total unused block: %d\n", zone->unused_blk_cnt);
1406
1407 if ((zone->unused_blk_cnt - i) < 1)
1408 chip->card_wp |= XD_CARD;
1409
1410 zone->build_flag = 1;
1411
1412 return STATUS_SUCCESS;
1413
1414Build_Fail:
1415 if (zone->l2p_table) {
1416 vfree(zone->l2p_table);
1417 zone->l2p_table = NULL;
1418 }
1419 if (zone->free_table) {
1420 vfree(zone->free_table);
1421 zone->free_table = NULL;
1422 }
1423
1424 return STATUS_FAIL;
1425}
1426
1427static int xd_send_cmd(struct rtsx_chip *chip, u8 cmd)
1428{
1429 int retval;
1430
1431 rtsx_init_cmd(chip);
1432
1433 rtsx_add_cmd(chip, WRITE_REG_CMD, XD_DAT, 0xFF, cmd);
1434 rtsx_add_cmd(chip, WRITE_REG_CMD, XD_TRANSFER, 0xFF, XD_TRANSFER_START | XD_SET_CMD);
1435 rtsx_add_cmd(chip, CHECK_REG_CMD, XD_TRANSFER, XD_TRANSFER_END, XD_TRANSFER_END);
1436
1437 retval = rtsx_send_cmd(chip, XD_CARD, 200);
1438 if (retval < 0)
1439 TRACE_RET(chip, STATUS_FAIL);
1440
1441 return STATUS_SUCCESS;
1442}
1443
1444static int xd_read_multiple_pages(struct rtsx_chip *chip, u32 phy_blk, u32 log_blk,
1445 u8 start_page, u8 end_page, u8 *buf, unsigned int *index, unsigned int *offset)
1446{
1447 struct xd_info *xd_card = &(chip->xd_card);
1448 u32 page_addr, new_blk;
1449 u16 log_off;
1450 u8 reg_val, page_cnt;
1451 int zone_no, retval, i;
1452
1453 if (start_page > end_page)
1454 TRACE_RET(chip, STATUS_FAIL);
1455
1456 page_cnt = end_page - start_page;
1457 zone_no = (int)(log_blk / 1000);
1458 log_off = (u16)(log_blk % 1000);
1459
1460 if ((phy_blk & 0x3FF) == 0x3FF) {
1461 for (i = 0; i < 256; i++) {
1462 page_addr = ((u32)i) << xd_card->block_shift;
1463
1464 retval = xd_read_redundant(chip, page_addr, NULL, 0);
1465 if (retval == STATUS_SUCCESS)
1466 break;
1467
1468 if (detect_card_cd(chip, XD_CARD) != STATUS_SUCCESS) {
1469 xd_set_err_code(chip, XD_NO_CARD);
1470 TRACE_RET(chip, STATUS_FAIL);
1471 }
1472 }
1473 }
1474
1475 page_addr = (phy_blk << xd_card->block_shift) + start_page;
1476
1477 rtsx_init_cmd(chip);
1478
1479 xd_assign_phy_addr(chip, page_addr, XD_RW_ADDR);
1480 rtsx_add_cmd(chip, WRITE_REG_CMD, XD_CFG, XD_PPB_TO_SIE, XD_PPB_TO_SIE);
1481 rtsx_add_cmd(chip, WRITE_REG_CMD, CARD_DATA_SOURCE, 0x01, RING_BUFFER);
1482 rtsx_add_cmd(chip, WRITE_REG_CMD, XD_PAGE_CNT, 0xFF, page_cnt);
1483 rtsx_add_cmd(chip, WRITE_REG_CMD, XD_CHK_DATA_STATUS,
1484 XD_AUTO_CHK_DATA_STATUS, XD_AUTO_CHK_DATA_STATUS);
1485
1486 trans_dma_enable(chip->srb->sc_data_direction, chip, page_cnt * 512, DMA_512);
1487
1488 rtsx_add_cmd(chip, WRITE_REG_CMD, XD_TRANSFER, 0xFF, XD_TRANSFER_START | XD_READ_PAGES);
1489 rtsx_add_cmd(chip, CHECK_REG_CMD, XD_TRANSFER,
1490 XD_TRANSFER_END | XD_PPB_EMPTY, XD_TRANSFER_END | XD_PPB_EMPTY);
1491
1492 rtsx_send_cmd_no_wait(chip);
1493
1494 retval = rtsx_transfer_data_partial(chip, XD_CARD, buf, page_cnt * 512, scsi_sg_count(chip->srb),
1495 index, offset, DMA_FROM_DEVICE, chip->xd_timeout);
1496 if (retval < 0) {
1497 rtsx_clear_xd_error(chip);
1498 xd_clear_dma_buffer(chip);
1499
1500 if (retval == -ETIMEDOUT) {
1501 xd_set_err_code(chip, XD_TO_ERROR);
1502 TRACE_RET(chip, STATUS_FAIL);
1503 } else {
1504 TRACE_GOTO(chip, Fail);
1505 }
1506 }
1507
1508 return STATUS_SUCCESS;
1509
1510Fail:
1511 RTSX_READ_REG(chip, XD_PAGE_STATUS, &reg_val);
1512
1513 if (reg_val != XD_GPG)
1514 xd_set_err_code(chip, XD_PRG_ERROR);
1515
1516 RTSX_READ_REG(chip, XD_CTL, &reg_val);
1517
1518 if (((reg_val & (XD_ECC1_ERROR | XD_ECC1_UNCORRECTABLE))
1519 == (XD_ECC1_ERROR | XD_ECC1_UNCORRECTABLE))
1520 || ((reg_val & (XD_ECC2_ERROR | XD_ECC2_UNCORRECTABLE))
1521 == (XD_ECC2_ERROR | XD_ECC2_UNCORRECTABLE))) {
1522 wait_timeout(100);
1523
1524 if (detect_card_cd(chip, XD_CARD) != STATUS_SUCCESS) {
1525 xd_set_err_code(chip, XD_NO_CARD);
1526 TRACE_RET(chip, STATUS_FAIL);
1527 }
1528
1529 xd_set_err_code(chip, XD_ECC_ERROR);
1530
1531 new_blk = xd_get_unused_block(chip, zone_no);
1532 if (new_blk == NO_NEW_BLK) {
1533 XD_CLR_BAD_OLDBLK(xd_card);
1534 TRACE_RET(chip, STATUS_FAIL);
1535 }
1536
1537 retval = xd_copy_page(chip, phy_blk, new_blk, 0, xd_card->page_off + 1);
1538 if (retval != STATUS_SUCCESS) {
1539 if (!XD_CHK_BAD_NEWBLK(xd_card)) {
1540 retval = xd_erase_block(chip, new_blk);
1541 if (retval == STATUS_SUCCESS)
1542 xd_set_unused_block(chip, new_blk);
1543 } else {
1544 XD_CLR_BAD_NEWBLK(xd_card);
1545 }
1546 XD_CLR_BAD_OLDBLK(xd_card);
1547 TRACE_RET(chip, STATUS_FAIL);
1548 }
1549 xd_set_l2p_tbl(chip, zone_no, log_off, (u16)(new_blk & 0x3FF));
1550 xd_erase_block(chip, phy_blk);
1551 xd_mark_bad_block(chip, phy_blk);
1552 XD_CLR_BAD_OLDBLK(xd_card);
1553 }
1554
1555 TRACE_RET(chip, STATUS_FAIL);
1556}
1557
1558static int xd_finish_write(struct rtsx_chip *chip,
1559 u32 old_blk, u32 new_blk, u32 log_blk, u8 page_off)
1560{
1561 struct xd_info *xd_card = &(chip->xd_card);
1562 int retval, zone_no;
1563 u16 log_off;
1564
1565 RTSX_DEBUGP("xd_finish_write, old_blk = 0x%x, new_blk = 0x%x, log_blk = 0x%x\n",
1566 old_blk, new_blk, log_blk);
1567
1568 if (page_off > xd_card->page_off)
1569 TRACE_RET(chip, STATUS_FAIL);
1570
1571 zone_no = (int)(log_blk / 1000);
1572 log_off = (u16)(log_blk % 1000);
1573
1574 if (old_blk == BLK_NOT_FOUND) {
1575 retval = xd_init_page(chip, new_blk, log_off,
1576 page_off, xd_card->page_off + 1);
1577 if (retval != STATUS_SUCCESS) {
1578 retval = xd_erase_block(chip, new_blk);
1579 if (retval == STATUS_SUCCESS)
1580 xd_set_unused_block(chip, new_blk);
1581 TRACE_RET(chip, STATUS_FAIL);
1582 }
1583 } else {
1584 retval = xd_copy_page(chip, old_blk, new_blk,
1585 page_off, xd_card->page_off + 1);
1586 if (retval != STATUS_SUCCESS) {
1587 if (!XD_CHK_BAD_NEWBLK(xd_card)) {
1588 retval = xd_erase_block(chip, new_blk);
1589 if (retval == STATUS_SUCCESS)
1590 xd_set_unused_block(chip, new_blk);
1591 }
1592 XD_CLR_BAD_NEWBLK(xd_card);
1593 TRACE_RET(chip, STATUS_FAIL);
1594 }
1595
1596 retval = xd_erase_block(chip, old_blk);
1597 if (retval == STATUS_SUCCESS) {
1598 if (XD_CHK_BAD_OLDBLK(xd_card)) {
1599 xd_mark_bad_block(chip, old_blk);
1600 XD_CLR_BAD_OLDBLK(xd_card);
1601 } else {
1602 xd_set_unused_block(chip, old_blk);
1603 }
1604 } else {
1605 xd_set_err_code(chip, XD_NO_ERROR);
1606 XD_CLR_BAD_OLDBLK(xd_card);
1607 }
1608 }
1609
1610 xd_set_l2p_tbl(chip, zone_no, log_off, (u16)(new_blk & 0x3FF));
1611
1612 return STATUS_SUCCESS;
1613}
1614
1615static int xd_prepare_write(struct rtsx_chip *chip,
1616 u32 old_blk, u32 new_blk, u32 log_blk, u8 page_off)
1617{
1618 int retval;
1619
1620 RTSX_DEBUGP("%s, old_blk = 0x%x, new_blk = 0x%x, log_blk = 0x%x, page_off = %d\n",
1621 __func__, old_blk, new_blk, log_blk, (int)page_off);
1622
1623 if (page_off) {
1624 retval = xd_copy_page(chip, old_blk, new_blk, 0, page_off);
1625 if (retval != STATUS_SUCCESS)
1626 TRACE_RET(chip, STATUS_FAIL);
1627 }
1628
1629 return STATUS_SUCCESS;
1630}
1631
1632
1633static int xd_write_multiple_pages(struct rtsx_chip *chip, u32 old_blk, u32 new_blk, u32 log_blk,
1634 u8 start_page, u8 end_page, u8 *buf, unsigned int *index, unsigned int *offset)
1635{
1636 struct xd_info *xd_card = &(chip->xd_card);
1637 u32 page_addr;
1638 int zone_no, retval;
1639 u16 log_off;
1640 u8 page_cnt, reg_val;
1641
1642 RTSX_DEBUGP("%s, old_blk = 0x%x, new_blk = 0x%x, log_blk = 0x%x\n",
1643 __func__, old_blk, new_blk, log_blk);
1644
1645 if (start_page > end_page)
1646 TRACE_RET(chip, STATUS_FAIL);
1647
1648 page_cnt = end_page - start_page;
1649 zone_no = (int)(log_blk / 1000);
1650 log_off = (u16)(log_blk % 1000);
1651
1652 page_addr = (new_blk << xd_card->block_shift) + start_page;
1653
1654 retval = xd_send_cmd(chip, READ1_1);
1655 if (retval != STATUS_SUCCESS)
1656 TRACE_RET(chip, STATUS_FAIL);
1657
1658 rtsx_init_cmd(chip);
1659
1660 rtsx_add_cmd(chip, WRITE_REG_CMD, XD_BLOCK_ADDR1_H, 0xFF, (u8)(log_off >> 8));
1661 rtsx_add_cmd(chip, WRITE_REG_CMD, XD_BLOCK_ADDR1_L, 0xFF, (u8)log_off);
1662 rtsx_add_cmd(chip, WRITE_REG_CMD, XD_BLOCK_STATUS, 0xFF, XD_GBLK);
1663 rtsx_add_cmd(chip, WRITE_REG_CMD, XD_PAGE_STATUS, 0xFF, XD_GPG);
1664
1665 xd_assign_phy_addr(chip, page_addr, XD_RW_ADDR);
1666
1667 rtsx_add_cmd(chip, WRITE_REG_CMD, XD_CFG, XD_BA_TRANSFORM, XD_BA_TRANSFORM);
1668 rtsx_add_cmd(chip, WRITE_REG_CMD, XD_PAGE_CNT, 0xFF, page_cnt);
1669 rtsx_add_cmd(chip, WRITE_REG_CMD, CARD_DATA_SOURCE, 0x01, RING_BUFFER);
1670
1671 trans_dma_enable(chip->srb->sc_data_direction, chip, page_cnt * 512, DMA_512);
1672
1673 rtsx_add_cmd(chip, WRITE_REG_CMD, XD_TRANSFER, 0xFF, XD_TRANSFER_START | XD_WRITE_PAGES);
1674 rtsx_add_cmd(chip, CHECK_REG_CMD, XD_TRANSFER, XD_TRANSFER_END, XD_TRANSFER_END);
1675
1676 rtsx_send_cmd_no_wait(chip);
1677
1678 retval = rtsx_transfer_data_partial(chip, XD_CARD, buf, page_cnt * 512, scsi_sg_count(chip->srb),
1679 index, offset, DMA_TO_DEVICE, chip->xd_timeout);
1680 if (retval < 0) {
1681 rtsx_clear_xd_error(chip);
1682
1683 if (retval == -ETIMEDOUT) {
1684 xd_set_err_code(chip, XD_TO_ERROR);
1685 TRACE_RET(chip, STATUS_FAIL);
1686 } else {
1687 TRACE_GOTO(chip, Fail);
1688 }
1689 }
1690
1691 if (end_page == (xd_card->page_off + 1)) {
1692 xd_card->delay_write.delay_write_flag = 0;
1693
1694 if (old_blk != BLK_NOT_FOUND) {
1695 retval = xd_erase_block(chip, old_blk);
1696 if (retval == STATUS_SUCCESS) {
1697 if (XD_CHK_BAD_OLDBLK(xd_card)) {
1698 xd_mark_bad_block(chip, old_blk);
1699 XD_CLR_BAD_OLDBLK(xd_card);
1700 } else {
1701 xd_set_unused_block(chip, old_blk);
1702 }
1703 } else {
1704 xd_set_err_code(chip, XD_NO_ERROR);
1705 XD_CLR_BAD_OLDBLK(xd_card);
1706 }
1707 }
1708 xd_set_l2p_tbl(chip, zone_no, log_off, (u16)(new_blk & 0x3FF));
1709 }
1710
1711 return STATUS_SUCCESS;
1712
1713Fail:
1714 RTSX_READ_REG(chip, XD_DAT, &reg_val);
1715 if (reg_val & PROGRAM_ERROR) {
1716 xd_set_err_code(chip, XD_PRG_ERROR);
1717 xd_mark_bad_block(chip, new_blk);
1718 }
1719
1720 TRACE_RET(chip, STATUS_FAIL);
1721}
1722
1723#ifdef XD_DELAY_WRITE
1724int xd_delay_write(struct rtsx_chip *chip)
1725{
1726 struct xd_info *xd_card = &(chip->xd_card);
1727 struct xd_delay_write_tag *delay_write = &(xd_card->delay_write);
1728 int retval;
1729
1730 if (delay_write->delay_write_flag) {
1731 RTSX_DEBUGP("xd_delay_write\n");
1732 retval = xd_switch_clock(chip);
1733 if (retval != STATUS_SUCCESS)
1734 TRACE_RET(chip, STATUS_FAIL);
1735
1736 delay_write->delay_write_flag = 0;
1737 retval = xd_finish_write(chip,
1738 delay_write->old_phyblock, delay_write->new_phyblock,
1739 delay_write->logblock, delay_write->pageoff);
1740 if (retval != STATUS_SUCCESS)
1741 TRACE_RET(chip, STATUS_FAIL);
1742 }
1743
1744 return STATUS_SUCCESS;
1745}
1746#endif
1747
1748int xd_rw(struct scsi_cmnd *srb, struct rtsx_chip *chip, u32 start_sector, u16 sector_cnt)
1749{
1750 struct xd_info *xd_card = &(chip->xd_card);
1751 unsigned int lun = SCSI_LUN(srb);
1752#ifdef XD_DELAY_WRITE
1753 struct xd_delay_write_tag *delay_write = &(xd_card->delay_write);
1754#endif
1755 int retval, zone_no;
1756 unsigned int index = 0, offset = 0;
1757 u32 log_blk, old_blk = 0, new_blk = 0;
1758 u16 log_off, total_sec_cnt = sector_cnt;
1759 u8 start_page, end_page = 0, page_cnt;
1760 u8 *ptr;
1761
1762 xd_set_err_code(chip, XD_NO_ERROR);
1763
1764 xd_card->cleanup_counter = 0;
1765
1766 RTSX_DEBUGP("xd_rw: scsi_sg_count = %d\n", scsi_sg_count(srb));
1767
1768 ptr = (u8 *)scsi_sglist(srb);
1769
1770 retval = xd_switch_clock(chip);
1771 if (retval != STATUS_SUCCESS)
1772 TRACE_RET(chip, STATUS_FAIL);
1773
1774
1775 if (detect_card_cd(chip, XD_CARD) != STATUS_SUCCESS) {
1776 chip->card_fail |= XD_CARD;
1777 set_sense_type(chip, lun, SENSE_TYPE_MEDIA_NOT_PRESENT);
1778 TRACE_RET(chip, STATUS_FAIL);
1779 }
1780
1781 log_blk = start_sector >> xd_card->block_shift;
1782 start_page = (u8)start_sector & xd_card->page_off;
1783 zone_no = (int)(log_blk / 1000);
1784 log_off = (u16)(log_blk % 1000);
1785
1786 if (xd_card->zone[zone_no].build_flag == 0) {
1787 retval = xd_build_l2p_tbl(chip, zone_no);
1788 if (retval != STATUS_SUCCESS) {
1789 chip->card_fail |= XD_CARD;
1790 set_sense_type(chip, lun, SENSE_TYPE_MEDIA_NOT_PRESENT);
1791 TRACE_RET(chip, STATUS_FAIL);
1792 }
1793 }
1794
1795 if (srb->sc_data_direction == DMA_TO_DEVICE) {
1796#ifdef XD_DELAY_WRITE
1797 if (delay_write->delay_write_flag &&
1798 (delay_write->logblock == log_blk) &&
1799 (start_page > delay_write->pageoff)) {
1800 delay_write->delay_write_flag = 0;
1801 if (delay_write->old_phyblock != BLK_NOT_FOUND) {
1802 retval = xd_copy_page(chip,
1803 delay_write->old_phyblock,
1804 delay_write->new_phyblock,
1805 delay_write->pageoff, start_page);
1806 if (retval != STATUS_SUCCESS) {
1807 set_sense_type(chip, lun, SENSE_TYPE_MEDIA_WRITE_ERR);
1808 TRACE_RET(chip, STATUS_FAIL);
1809 }
1810 }
1811 old_blk = delay_write->old_phyblock;
1812 new_blk = delay_write->new_phyblock;
1813 } else if (delay_write->delay_write_flag &&
1814 (delay_write->logblock == log_blk) &&
1815 (start_page == delay_write->pageoff)) {
1816 delay_write->delay_write_flag = 0;
1817 old_blk = delay_write->old_phyblock;
1818 new_blk = delay_write->new_phyblock;
1819 } else {
1820 retval = xd_delay_write(chip);
1821 if (retval != STATUS_SUCCESS) {
1822 set_sense_type(chip, lun, SENSE_TYPE_MEDIA_WRITE_ERR);
1823 TRACE_RET(chip, STATUS_FAIL);
1824 }
1825#endif
1826 old_blk = xd_get_l2p_tbl(chip, zone_no, log_off);
1827 new_blk = xd_get_unused_block(chip, zone_no);
1828 if ((old_blk == BLK_NOT_FOUND) || (new_blk == BLK_NOT_FOUND)) {
1829 set_sense_type(chip, lun, SENSE_TYPE_MEDIA_WRITE_ERR);
1830 TRACE_RET(chip, STATUS_FAIL);
1831 }
1832
1833 retval = xd_prepare_write(chip, old_blk, new_blk, log_blk, start_page);
1834 if (retval != STATUS_SUCCESS) {
1835 if (detect_card_cd(chip, XD_CARD) != STATUS_SUCCESS) {
1836 set_sense_type(chip, lun, SENSE_TYPE_MEDIA_NOT_PRESENT);
1837 TRACE_RET(chip, STATUS_FAIL);
1838 }
1839 set_sense_type(chip, lun, SENSE_TYPE_MEDIA_WRITE_ERR);
1840 TRACE_RET(chip, STATUS_FAIL);
1841 }
1842#ifdef XD_DELAY_WRITE
1843 }
1844#endif
1845 } else {
1846#ifdef XD_DELAY_WRITE
1847 retval = xd_delay_write(chip);
1848 if (retval != STATUS_SUCCESS) {
1849 if (detect_card_cd(chip, XD_CARD) != STATUS_SUCCESS) {
1850 set_sense_type(chip, lun, SENSE_TYPE_MEDIA_NOT_PRESENT);
1851 TRACE_RET(chip, STATUS_FAIL);
1852 }
1853 set_sense_type(chip, lun, SENSE_TYPE_MEDIA_UNRECOVER_READ_ERR);
1854 TRACE_RET(chip, STATUS_FAIL);
1855 }
1856#endif
1857
1858 old_blk = xd_get_l2p_tbl(chip, zone_no, log_off);
1859 if (old_blk == BLK_NOT_FOUND) {
1860 set_sense_type(chip, lun, SENSE_TYPE_MEDIA_UNRECOVER_READ_ERR);
1861 TRACE_RET(chip, STATUS_FAIL);
1862 }
1863 }
1864
1865 RTSX_DEBUGP("old_blk = 0x%x\n", old_blk);
1866
1867 while (total_sec_cnt) {
1868 if (detect_card_cd(chip, XD_CARD) != STATUS_SUCCESS) {
1869 chip->card_fail |= XD_CARD;
1870 set_sense_type(chip, lun, SENSE_TYPE_MEDIA_NOT_PRESENT);
1871 TRACE_RET(chip, STATUS_FAIL);
1872 }
1873
1874 if ((start_page + total_sec_cnt) > (xd_card->page_off + 1))
1875 end_page = xd_card->page_off + 1;
1876 else
1877 end_page = start_page + (u8)total_sec_cnt;
1878
1879 page_cnt = end_page - start_page;
1880 if (srb->sc_data_direction == DMA_FROM_DEVICE) {
1881 retval = xd_read_multiple_pages(chip, old_blk, log_blk,
1882 start_page, end_page, ptr, &index, &offset);
1883 if (retval != STATUS_SUCCESS) {
1884 set_sense_type(chip, lun, SENSE_TYPE_MEDIA_UNRECOVER_READ_ERR);
1885 TRACE_RET(chip, STATUS_FAIL);
1886 }
1887 } else {
1888 retval = xd_write_multiple_pages(chip, old_blk, new_blk, log_blk,
1889 start_page, end_page, ptr, &index, &offset);
1890 if (retval != STATUS_SUCCESS) {
1891 set_sense_type(chip, lun, SENSE_TYPE_MEDIA_WRITE_ERR);
1892 TRACE_RET(chip, STATUS_FAIL);
1893 }
1894 }
1895
1896 total_sec_cnt -= page_cnt;
1897 if (scsi_sg_count(srb) == 0)
1898 ptr += page_cnt * 512;
1899
1900 if (total_sec_cnt == 0)
1901 break;
1902
1903 log_blk++;
1904 zone_no = (int)(log_blk / 1000);
1905 log_off = (u16)(log_blk % 1000);
1906
1907 if (xd_card->zone[zone_no].build_flag == 0) {
1908 retval = xd_build_l2p_tbl(chip, zone_no);
1909 if (retval != STATUS_SUCCESS) {
1910 chip->card_fail |= XD_CARD;
1911 set_sense_type(chip, lun, SENSE_TYPE_MEDIA_NOT_PRESENT);
1912 TRACE_RET(chip, STATUS_FAIL);
1913 }
1914 }
1915
1916 old_blk = xd_get_l2p_tbl(chip, zone_no, log_off);
1917 if (old_blk == BLK_NOT_FOUND) {
1918 if (srb->sc_data_direction == DMA_FROM_DEVICE)
1919 set_sense_type(chip, lun, SENSE_TYPE_MEDIA_UNRECOVER_READ_ERR);
1920 else
1921 set_sense_type(chip, lun, SENSE_TYPE_MEDIA_WRITE_ERR);
1922
1923 TRACE_RET(chip, STATUS_FAIL);
1924 }
1925
1926 if (srb->sc_data_direction == DMA_TO_DEVICE) {
1927 new_blk = xd_get_unused_block(chip, zone_no);
1928 if (new_blk == BLK_NOT_FOUND) {
1929 set_sense_type(chip, lun, SENSE_TYPE_MEDIA_WRITE_ERR);
1930 TRACE_RET(chip, STATUS_FAIL);
1931 }
1932 }
1933
1934 start_page = 0;
1935 }
1936
1937 if ((srb->sc_data_direction == DMA_TO_DEVICE) &&
1938 (end_page != (xd_card->page_off + 1))) {
1939#ifdef XD_DELAY_WRITE
1940 delay_write->delay_write_flag = 1;
1941 delay_write->old_phyblock = old_blk;
1942 delay_write->new_phyblock = new_blk;
1943 delay_write->logblock = log_blk;
1944 delay_write->pageoff = end_page;
1945#else
1946 if (detect_card_cd(chip, XD_CARD) != STATUS_SUCCESS) {
1947 chip->card_fail |= XD_CARD;
1948 set_sense_type(chip, lun, SENSE_TYPE_MEDIA_NOT_PRESENT);
1949 TRACE_RET(chip, STATUS_FAIL);
1950 }
1951
1952 retval = xd_finish_write(chip, old_blk, new_blk, log_blk, end_page);
1953 if (retval != STATUS_SUCCESS) {
1954 if (detect_card_cd(chip, XD_CARD) != STATUS_SUCCESS) {
1955 set_sense_type(chip, lun, SENSE_TYPE_MEDIA_NOT_PRESENT);
1956 TRACE_RET(chip, STATUS_FAIL);
1957 }
1958 set_sense_type(chip, lun, SENSE_TYPE_MEDIA_WRITE_ERR);
1959 TRACE_RET(chip, STATUS_FAIL);
1960 }
1961#endif
1962 }
1963
1964 scsi_set_resid(srb, 0);
1965
1966 return STATUS_SUCCESS;
1967}
1968
1969void xd_free_l2p_tbl(struct rtsx_chip *chip)
1970{
1971 struct xd_info *xd_card = &(chip->xd_card);
1972 int i = 0;
1973
1974 if (xd_card->zone != NULL) {
1975 for (i = 0; i < xd_card->zone_cnt; i++) {
1976 if (xd_card->zone[i].l2p_table != NULL) {
1977 vfree(xd_card->zone[i].l2p_table);
1978 xd_card->zone[i].l2p_table = NULL;
1979 }
1980 if (xd_card->zone[i].free_table != NULL) {
1981 vfree(xd_card->zone[i].free_table);
1982 xd_card->zone[i].free_table = NULL;
1983 }
1984 }
1985 vfree(xd_card->zone);
1986 xd_card->zone = NULL;
1987 }
1988}
1989
1990void xd_cleanup_work(struct rtsx_chip *chip)
1991{
1992#ifdef XD_DELAY_WRITE
1993 struct xd_info *xd_card = &(chip->xd_card);
1994
1995 if (xd_card->delay_write.delay_write_flag) {
1996 RTSX_DEBUGP("xD: delay write\n");
1997 xd_delay_write(chip);
1998 xd_card->cleanup_counter = 0;
1999 }
2000#endif
2001}
2002
2003int xd_power_off_card3v3(struct rtsx_chip *chip)
2004{
2005 int retval;
2006
2007 retval = disable_card_clock(chip, XD_CARD);
2008 if (retval != STATUS_SUCCESS)
2009 TRACE_RET(chip, STATUS_FAIL);
2010
2011 RTSX_WRITE_REG(chip, CARD_OE, XD_OUTPUT_EN, 0);
2012
2013 if (!chip->ft2_fast_mode) {
2014 retval = card_power_off(chip, XD_CARD);
2015 if (retval != STATUS_SUCCESS)
2016 TRACE_RET(chip, STATUS_FAIL);
2017
2018 wait_timeout(50);
2019 }
2020
2021 if (chip->asic_code) {
2022 retval = xd_pull_ctl_disable(chip);
2023 if (retval != STATUS_SUCCESS)
2024 TRACE_RET(chip, STATUS_FAIL);
2025 } else {
2026 RTSX_WRITE_REG(chip, FPGA_PULL_CTL, 0xFF, 0xDF);
2027 }
2028
2029 return STATUS_SUCCESS;
2030}
2031
2032int release_xd_card(struct rtsx_chip *chip)
2033{
2034 struct xd_info *xd_card = &(chip->xd_card);
2035 int retval;
2036
2037 RTSX_DEBUGP("release_xd_card\n");
2038
2039 chip->card_ready &= ~XD_CARD;
2040 chip->card_fail &= ~XD_CARD;
2041 chip->card_wp &= ~XD_CARD;
2042
2043 xd_card->delay_write.delay_write_flag = 0;
2044
2045 xd_free_l2p_tbl(chip);
2046
2047 retval = xd_power_off_card3v3(chip);
2048 if (retval != STATUS_SUCCESS)
2049 TRACE_RET(chip, STATUS_FAIL);
2050
2051 return STATUS_SUCCESS;
2052}
diff --git a/drivers/staging/rts_pstor/xd.h b/drivers/staging/rts_pstor/xd.h
deleted file mode 100644
index cd9fbc1f96de..000000000000
--- a/drivers/staging/rts_pstor/xd.h
+++ /dev/null
@@ -1,188 +0,0 @@
1/* Driver for Realtek PCI-Express card reader
2 * Header file
3 *
4 * Copyright(c) 2009 Realtek Semiconductor Corp. All rights reserved.
5 *
6 * This program is free software; you can redistribute it and/or modify it
7 * under the terms of the GNU General Public License as published by the
8 * Free Software Foundation; either version 2, or (at your option) any
9 * later version.
10 *
11 * This program is distributed in the hope that it will be useful, but
12 * WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
14 * General Public License for more details.
15 *
16 * You should have received a copy of the GNU General Public License along
17 * with this program; if not, see <http://www.gnu.org/licenses/>.
18 *
19 * Author:
20 * wwang (wei_wang@realsil.com.cn)
21 * No. 450, Shenhu Road, Suzhou Industry Park, Suzhou, China
22 */
23
24#ifndef __REALTEK_RTSX_XD_H
25#define __REALTEK_RTSX_XD_H
26
27#define XD_DELAY_WRITE
28
29/* Error Codes */
30#define XD_NO_ERROR 0x00
31#define XD_NO_MEMORY 0x80
32#define XD_PRG_ERROR 0x40
33#define XD_NO_CARD 0x20
34#define XD_READ_FAIL 0x10
35#define XD_ERASE_FAIL 0x08
36#define XD_WRITE_FAIL 0x04
37#define XD_ECC_ERROR 0x02
38#define XD_TO_ERROR 0x01
39
40/* XD Commands */
41#define READ1_1 0x00
42#define READ1_2 0x01
43#define READ2 0x50
44#define READ_ID 0x90
45#define RESET 0xff
46#define PAGE_PRG_1 0x80
47#define PAGE_PRG_2 0x10
48#define BLK_ERASE_1 0x60
49#define BLK_ERASE_2 0xD0
50#define READ_STS 0x70
51#define READ_xD_ID 0x9A
52#define COPY_BACK_512 0x8A
53#define COPY_BACK_2K 0x85
54#define READ1_1_2 0x30
55#define READ1_1_3 0x35
56#define CHG_DAT_OUT_1 0x05
57#define RDM_DAT_OUT_1 0x05
58#define CHG_DAT_OUT_2 0xE0
59#define RDM_DAT_OUT_2 0xE0
60#define CHG_DAT_OUT_2 0xE0
61#define CHG_DAT_IN_1 0x85
62#define CACHE_PRG 0x15
63
64/* Redundant Area Related */
65#define XD_EXTRA_SIZE 0x10
66#define XD_2K_EXTRA_SIZE 0x40
67
68#define NOT_WRITE_PROTECTED 0x80
69#define READY_STATE 0x40
70#define PROGRAM_ERROR 0x01
71#define PROGRAM_ERROR_N_1 0x02
72#define INTERNAL_READY 0x20
73#define READY_FLAG 0x5F
74
75#define XD_8M_X8_512 0xE6
76#define XD_16M_X8_512 0x73
77#define XD_32M_X8_512 0x75
78#define XD_64M_X8_512 0x76
79#define XD_128M_X8_512 0x79
80#define XD_256M_X8_512 0x71
81#define XD_128M_X8_2048 0xF1
82#define XD_256M_X8_2048 0xDA
83#define XD_512M_X8 0xDC
84#define XD_128M_X16_2048 0xC1
85#define XD_4M_X8_512_1 0xE3
86#define XD_4M_X8_512_2 0xE5
87#define xD_1G_X8_512 0xD3
88#define xD_2G_X8_512 0xD5
89
90#define XD_ID_CODE 0xB5
91
92#define VENDOR_BLOCK 0xEFFF
93#define CIS_BLOCK 0xDFFF
94
95#define BLK_NOT_FOUND 0xFFFFFFFF
96
97#define NO_NEW_BLK 0xFFFFFFFF
98
99#define PAGE_CORRECTABLE 0x0
100#define PAGE_NOTCORRECTABLE 0x1
101
102#define NO_OFFSET 0x0
103#define WITH_OFFSET 0x1
104
105#define Sect_Per_Page 4
106#define XD_ADDR_MODE_2C XD_ADDR_MODE_2A
107
108#define ZONE0_BAD_BLOCK 23
109#define NOT_ZONE0_BAD_BLOCK 24
110
111#define XD_RW_ADDR 0x01
112#define XD_ERASE_ADDR 0x02
113
114#define XD_PAGE_512(xd_card) \
115do { \
116 (xd_card)->block_shift = 5; \
117 (xd_card)->page_off = 0x1F; \
118} while (0)
119
120#define XD_SET_BAD_NEWBLK(xd_card) ((xd_card)->multi_flag |= 0x01)
121#define XD_CLR_BAD_NEWBLK(xd_card) ((xd_card)->multi_flag &= ~0x01)
122#define XD_CHK_BAD_NEWBLK(xd_card) ((xd_card)->multi_flag & 0x01)
123
124#define XD_SET_BAD_OLDBLK(xd_card) ((xd_card)->multi_flag |= 0x02)
125#define XD_CLR_BAD_OLDBLK(xd_card) ((xd_card)->multi_flag &= ~0x02)
126#define XD_CHK_BAD_OLDBLK(xd_card) ((xd_card)->multi_flag & 0x02)
127
128#define XD_SET_MBR_FAIL(xd_card) ((xd_card)->multi_flag |= 0x04)
129#define XD_CLR_MBR_FAIL(xd_card) ((xd_card)->multi_flag &= ~0x04)
130#define XD_CHK_MBR_FAIL(xd_card) ((xd_card)->multi_flag & 0x04)
131
132#define XD_SET_ECC_FLD_ERR(xd_card) ((xd_card)->multi_flag |= 0x08)
133#define XD_CLR_ECC_FLD_ERR(xd_card) ((xd_card)->multi_flag &= ~0x08)
134#define XD_CHK_ECC_FLD_ERR(xd_card) ((xd_card)->multi_flag & 0x08)
135
136#define XD_SET_4MB(xd_card) ((xd_card)->multi_flag |= 0x10)
137#define XD_CLR_4MB(xd_card) ((xd_card)->multi_flag &= ~0x10)
138#define XD_CHK_4MB(xd_card) ((xd_card)->multi_flag & 0x10)
139
140#define XD_SET_ECC_ERR(xd_card) ((xd_card)->multi_flag |= 0x40)
141#define XD_CLR_ECC_ERR(xd_card) ((xd_card)->multi_flag &= ~0x40)
142#define XD_CHK_ECC_ERR(xd_card) ((xd_card)->multi_flag & 0x40)
143
144#define PAGE_STATUS 0
145#define BLOCK_STATUS 1
146#define BLOCK_ADDR1_L 2
147#define BLOCK_ADDR1_H 3
148#define BLOCK_ADDR2_L 4
149#define BLOCK_ADDR2_H 5
150#define RESERVED0 6
151#define RESERVED1 7
152#define RESERVED2 8
153#define RESERVED3 9
154#define PARITY 10
155
156#define CIS0_0 0
157#define CIS0_1 1
158#define CIS0_2 2
159#define CIS0_3 3
160#define CIS0_4 4
161#define CIS0_5 5
162#define CIS0_6 6
163#define CIS0_7 7
164#define CIS0_8 8
165#define CIS0_9 9
166#define CIS1_0 256
167#define CIS1_1 (256 + 1)
168#define CIS1_2 (256 + 2)
169#define CIS1_3 (256 + 3)
170#define CIS1_4 (256 + 4)
171#define CIS1_5 (256 + 5)
172#define CIS1_6 (256 + 6)
173#define CIS1_7 (256 + 7)
174#define CIS1_8 (256 + 8)
175#define CIS1_9 (256 + 9)
176
177int reset_xd_card(struct rtsx_chip *chip);
178#ifdef XD_DELAY_WRITE
179int xd_delay_write(struct rtsx_chip *chip);
180#endif
181int xd_rw(struct scsi_cmnd *srb, struct rtsx_chip *chip, u32 start_sector, u16 sector_cnt);
182void xd_free_l2p_tbl(struct rtsx_chip *chip);
183void xd_cleanup_work(struct rtsx_chip *chip);
184int xd_power_off_card3v3(struct rtsx_chip *chip);
185int release_xd_card(struct rtsx_chip *chip);
186
187#endif /* __REALTEK_RTSX_XD_H */
188
diff --git a/drivers/staging/sbe-2t3e3/cpld.c b/drivers/staging/sbe-2t3e3/cpld.c
index cc2b54d52b1b..27365f9bc0b0 100644
--- a/drivers/staging/sbe-2t3e3/cpld.c
+++ b/drivers/staging/sbe-2t3e3/cpld.c
@@ -338,7 +338,7 @@ void cpld_set_fractional_mode(struct channel *sc, u32 mode,
338 SBE_2T3E3_CPLD_VAL_FRACTIONAL_MODE_2); 338 SBE_2T3E3_CPLD_VAL_FRACTIONAL_MODE_2);
339 break; 339 break;
340 default: 340 default:
341 printk(KERN_ERR "wrong mode in set_fractional_mode\n"); 341 netdev_err(sc->dev, "wrong mode in set_fractional_mode\n");
342 return; 342 return;
343 } 343 }
344 344
diff --git a/drivers/staging/sbe-2t3e3/main.c b/drivers/staging/sbe-2t3e3/main.c
index f3dbef6b0eef..c8e039860dc4 100644
--- a/drivers/staging/sbe-2t3e3/main.c
+++ b/drivers/staging/sbe-2t3e3/main.c
@@ -135,9 +135,10 @@ void t3e3_read_card_serial_number(struct channel *sc)
135 for (i = 0; i < 3; i++) 135 for (i = 0; i < 3; i++)
136 sc->ether.card_serial_number[i] = t3e3_eeprom_read_word(sc, 10 + i); 136 sc->ether.card_serial_number[i] = t3e3_eeprom_read_word(sc, 10 + i);
137 137
138 printk(KERN_INFO "SBE wanPMC-2T3E3 serial number: %04X%04X%04X\n", 138 netdev_info(sc->dev, "SBE wanPMC-2T3E3 serial number: %04X%04X%04X\n",
139 sc->ether.card_serial_number[0], sc->ether.card_serial_number[1], 139 sc->ether.card_serial_number[0],
140 sc->ether.card_serial_number[2]); 140 sc->ether.card_serial_number[1],
141 sc->ether.card_serial_number[2]);
141} 142}
142 143
143/* 144/*
diff --git a/drivers/staging/sbe-2t3e3/module.c b/drivers/staging/sbe-2t3e3/module.c
index 8adb17816ad9..ae7af397a992 100644
--- a/drivers/staging/sbe-2t3e3/module.c
+++ b/drivers/staging/sbe-2t3e3/module.c
@@ -10,6 +10,8 @@
10 * This code is based on a driver written by SBE Inc. 10 * This code is based on a driver written by SBE Inc.
11 */ 11 */
12 12
13#define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
14
13#include <linux/module.h> 15#include <linux/module.h>
14#include <linux/slab.h> 16#include <linux/slab.h>
15#include <linux/delay.h> 17#include <linux/delay.h>
@@ -50,7 +52,7 @@ static void t3e3_remove_channel(struct channel *channel)
50 pci_set_drvdata(pdev, NULL); 52 pci_set_drvdata(pdev, NULL);
51} 53}
52 54
53static int __devinit t3e3_init_channel(struct channel *channel, struct pci_dev *pdev, struct card *card) 55static int t3e3_init_channel(struct channel *channel, struct pci_dev *pdev, struct card *card)
54{ 56{
55 struct net_device *dev; 57 struct net_device *dev;
56 unsigned int val; 58 unsigned int val;
@@ -66,7 +68,7 @@ static int __devinit t3e3_init_channel(struct channel *channel, struct pci_dev *
66 68
67 dev = alloc_hdlcdev(channel); 69 dev = alloc_hdlcdev(channel);
68 if (!dev) { 70 if (!dev) {
69 printk(KERN_ERR "SBE 2T3E3" ": Out of memory\n"); 71 pr_err("Out of memory\n");
70 err = -ENOMEM; 72 err = -ENOMEM;
71 goto free_regions; 73 goto free_regions;
72 } 74 }
@@ -96,7 +98,8 @@ static int __devinit t3e3_init_channel(struct channel *channel, struct pci_dev *
96 98
97 err = request_irq(dev->irq, &t3e3_intr, IRQF_SHARED, dev->name, dev); 99 err = request_irq(dev->irq, &t3e3_intr, IRQF_SHARED, dev->name, dev);
98 if (err) { 100 if (err) {
99 printk(KERN_WARNING "%s: could not get irq: %d\n", dev->name, dev->irq); 101 netdev_warn(channel->dev, "%s: could not get irq: %d\n",
102 dev->name, dev->irq);
100 goto unregister_dev; 103 goto unregister_dev;
101 } 104 }
102 105
@@ -114,7 +117,7 @@ disable:
114 return err; 117 return err;
115} 118}
116 119
117static void __devexit t3e3_remove_card(struct pci_dev *pdev) 120static void t3e3_remove_card(struct pci_dev *pdev)
118{ 121{
119 struct channel *channel0 = pci_get_drvdata(pdev); 122 struct channel *channel0 = pci_get_drvdata(pdev);
120 struct card *card = channel0->card; 123 struct card *card = channel0->card;
@@ -128,7 +131,7 @@ static void __devexit t3e3_remove_card(struct pci_dev *pdev)
128 kfree(card); 131 kfree(card);
129} 132}
130 133
131static int __devinit t3e3_init_card(struct pci_dev *pdev, const struct pci_device_id *ent) 134static int t3e3_init_card(struct pci_dev *pdev, const struct pci_device_id *ent)
132{ 135{
133 /* pdev points to channel #0 */ 136 /* pdev points to channel #0 */
134 struct pci_dev *pdev1 = NULL; 137 struct pci_dev *pdev1 = NULL;
@@ -144,7 +147,7 @@ static int __devinit t3e3_init_card(struct pci_dev *pdev, const struct pci_devic
144 break; /* found the second channel */ 147 break; /* found the second channel */
145 148
146 if (!pdev1) { 149 if (!pdev1) {
147 printk(KERN_ERR "SBE 2T3E3" ": Can't find the second channel\n"); 150 dev_err(&pdev->dev, "Can't find the second channel\n");
148 return -EFAULT; 151 return -EFAULT;
149 } 152 }
150 channels = 2; 153 channels = 2;
@@ -153,7 +156,7 @@ static int __devinit t3e3_init_card(struct pci_dev *pdev, const struct pci_devic
153 156
154 card = kzalloc(sizeof(struct card) + channels * sizeof(struct channel), GFP_KERNEL); 157 card = kzalloc(sizeof(struct card) + channels * sizeof(struct channel), GFP_KERNEL);
155 if (!card) { 158 if (!card) {
156 printk(KERN_ERR "SBE 2T3E3" ": Out of memory\n"); 159 dev_err(&pdev->dev, "Out of memory\n");
157 return -ENOBUFS; 160 return -ENOBUFS;
158 } 161 }
159 162
@@ -185,7 +188,7 @@ free_card:
185 return err; 188 return err;
186} 189}
187 190
188static struct pci_device_id t3e3_pci_tbl[] __devinitdata = { 191static struct pci_device_id t3e3_pci_tbl[] = {
189 { PCI_VENDOR_ID_DEC, PCI_DEVICE_ID_DEC_21142, 192 { PCI_VENDOR_ID_DEC, PCI_DEVICE_ID_DEC_21142,
190 PCI_VENDOR_ID_SBE, PCI_SUBDEVICE_ID_SBE_T3E3, 0, 0, 0 }, 193 PCI_VENDOR_ID_SBE, PCI_SUBDEVICE_ID_SBE_T3E3, 0, 0, 0 },
191 { PCI_VENDOR_ID_DEC, PCI_DEVICE_ID_DEC_21142, 194 { PCI_VENDOR_ID_DEC, PCI_DEVICE_ID_DEC_21142,
diff --git a/drivers/staging/sbe-2t3e3/netdev.c b/drivers/staging/sbe-2t3e3/netdev.c
index 180c96327b9a..1f5088b3c10b 100644
--- a/drivers/staging/sbe-2t3e3/netdev.c
+++ b/drivers/staging/sbe-2t3e3/netdev.c
@@ -57,7 +57,7 @@ static int t3e3_ioctl(struct net_device *dev, struct ifreq *ifr, int cmd)
57 return 0; 57 return 0;
58} 58}
59 59
60static struct net_device_stats* t3e3_get_stats(struct net_device *dev) 60static struct net_device_stats *t3e3_get_stats(struct net_device *dev)
61{ 61{
62 struct net_device_stats *nstats = &dev->stats; 62 struct net_device_stats *nstats = &dev->stats;
63 struct channel *sc = dev_to_priv(dev); 63 struct channel *sc = dev_to_priv(dev);
@@ -134,7 +134,8 @@ int setup_device(struct net_device *dev, struct channel *sc)
134 dev->tx_queue_len = 100; 134 dev->tx_queue_len = 100;
135 hdlc->xmit = t3e3_if_start_xmit; 135 hdlc->xmit = t3e3_if_start_xmit;
136 hdlc->attach = t3e3_attach; 136 hdlc->attach = t3e3_attach;
137 if ((retval = register_hdlc_device(dev))) { 137 retval = register_hdlc_device(dev);
138 if (retval) {
138 dev_err(&sc->pdev->dev, "error registering HDLC device\n"); 139 dev_err(&sc->pdev->dev, "error registering HDLC device\n");
139 return retval; 140 return retval;
140 } 141 }
diff --git a/drivers/staging/sep/sep_main.c b/drivers/staging/sep/sep_main.c
index a414e52dd082..15c6e3d9437c 100644
--- a/drivers/staging/sep/sep_main.c
+++ b/drivers/staging/sep/sep_main.c
@@ -3431,7 +3431,7 @@ static ssize_t sep_create_dcb_dmatables_context(struct sep_device *sep,
3431 if (copy_from_user(dcb_args, 3431 if (copy_from_user(dcb_args,
3432 user_dcb_args, 3432 user_dcb_args,
3433 num_dcbs * sizeof(struct build_dcb_struct))) { 3433 num_dcbs * sizeof(struct build_dcb_struct))) {
3434 error = -EINVAL; 3434 error = -EFAULT;
3435 goto end_function; 3435 goto end_function;
3436 } 3436 }
3437 3437
@@ -3619,7 +3619,7 @@ static ssize_t sep_create_msgarea_context(struct sep_device *sep,
3619 3619
3620 /* Copy input data to write() to allocated message buffer */ 3620 /* Copy input data to write() to allocated message buffer */
3621 if (copy_from_user(*msg_region, msg_user, msg_len)) { 3621 if (copy_from_user(*msg_region, msg_user, msg_len)) {
3622 error = -EINVAL; 3622 error = -EFAULT;
3623 goto end_function; 3623 goto end_function;
3624 } 3624 }
3625 3625
@@ -4112,7 +4112,7 @@ static int sep_register_driver_with_fs(struct sep_device *sep)
4112 *Attempt to set up and configure a SEP device that has been 4112 *Attempt to set up and configure a SEP device that has been
4113 *discovered by the PCI layer. Allocates all required resources. 4113 *discovered by the PCI layer. Allocates all required resources.
4114 */ 4114 */
4115static int __devinit sep_probe(struct pci_dev *pdev, 4115static int sep_probe(struct pci_dev *pdev,
4116 const struct pci_device_id *ent) 4116 const struct pci_device_id *ent)
4117{ 4117{
4118 int error = 0; 4118 int error = 0;
diff --git a/drivers/staging/serqt_usb2/serqt_usb2.c b/drivers/staging/serqt_usb2/serqt_usb2.c
index 099bc69ca00c..1b3e995d3a27 100644
--- a/drivers/staging/serqt_usb2/serqt_usb2.c
+++ b/drivers/staging/serqt_usb2/serqt_usb2.c
@@ -272,7 +272,8 @@ static void qt_write_bulk_callback(struct urb *urb)
272 status = urb->status; 272 status = urb->status;
273 273
274 if (status) { 274 if (status) {
275 dev_dbg(&urb->dev->dev, "nonzero write bulk status received:%d\n", status); 275 dev_dbg(&urb->dev->dev,
276 "nonzero write bulk status received:%d\n", status);
276 return; 277 return;
277 } 278 }
278 279
@@ -290,22 +291,80 @@ static void qt_interrupt_callback(struct urb *urb)
290 /* FIXME */ 291 /* FIXME */
291} 292}
292 293
294static void qt_status_change_check(struct tty_struct *tty,
295 struct urb *urb,
296 struct quatech_port *qt_port,
297 struct usb_serial_port *port)
298{
299 int flag, i;
300 unsigned char *data = urb->transfer_buffer;
301 unsigned int RxCount = urb->actual_length;
302
303 for (i = 0; i < RxCount; ++i) {
304 /* Look ahead code here */
305 if ((i <= (RxCount - 3)) && (data[i] == 0x1b)
306 && (data[i + 1] == 0x1b)) {
307 flag = 0;
308 switch (data[i + 2]) {
309 case 0x00:
310 if (i > (RxCount - 4)) {
311 dev_dbg(&port->dev,
312 "Illegal escape seuences in received data\n");
313 break;
314 }
315
316 ProcessLineStatus(qt_port, data[i + 3]);
317
318 i += 3;
319 flag = 1;
320 break;
321
322 case 0x01:
323 if (i > (RxCount - 4)) {
324 dev_dbg(&port->dev,
325 "Illegal escape seuences in received data\n");
326 break;
327 }
328
329 ProcessModemStatus(qt_port, data[i + 3]);
330
331 i += 3;
332 flag = 1;
333 break;
334
335 case 0xff:
336 dev_dbg(&port->dev, "No status sequence.\n");
337
338 ProcessRxChar(tty, port, data[i]);
339 ProcessRxChar(tty, port, data[i + 1]);
340
341 i += 2;
342 break;
343 }
344 if (flag == 1)
345 continue;
346 }
347
348 if (tty && urb->actual_length)
349 tty_insert_flip_char(tty, data[i], TTY_NORMAL);
350
351 }
352 tty_flip_buffer_push(tty);
353}
354
293static void qt_read_bulk_callback(struct urb *urb) 355static void qt_read_bulk_callback(struct urb *urb)
294{ 356{
295 357
296 struct usb_serial_port *port = urb->context; 358 struct usb_serial_port *port = urb->context;
297 struct usb_serial *serial = get_usb_serial(port, __func__); 359 struct usb_serial *serial = get_usb_serial(port, __func__);
298 struct quatech_port *qt_port = qt_get_port_private(port); 360 struct quatech_port *qt_port = qt_get_port_private(port);
299 unsigned char *data;
300 struct tty_struct *tty; 361 struct tty_struct *tty;
301 unsigned int index; 362 int result;
302 unsigned int RxCount;
303 int i, result;
304 int flag, flag_data;
305 363
306 if (urb->status) { 364 if (urb->status) {
307 qt_port->ReadBulkStopped = 1; 365 qt_port->ReadBulkStopped = 1;
308 dev_dbg(&urb->dev->dev, "%s - nonzero write bulk status received: %d\n", 366 dev_dbg(&urb->dev->dev,
367 "%s - nonzero write bulk status received: %d\n",
309 __func__, urb->status); 368 __func__, urb->status);
310 return; 369 return;
311 } 370 }
@@ -314,14 +373,8 @@ static void qt_read_bulk_callback(struct urb *urb)
314 if (!tty) 373 if (!tty)
315 return; 374 return;
316 375
317 data = urb->transfer_buffer; 376 dev_dbg(&port->dev,
318 377 "%s - port->RxHolding = %d\n", __func__, qt_port->RxHolding);
319 RxCount = urb->actual_length;
320
321 /* index = MINOR(port->tty->device) - serial->minor; */
322 index = tty->index - serial->minor;
323
324 dev_dbg(&port->dev, "%s - port->RxHolding = %d\n", __func__, qt_port->RxHolding);
325 378
326 if (port_paranoia_check(port, __func__) != 0) { 379 if (port_paranoia_check(port, __func__) != 0) {
327 qt_port->ReadBulkStopped = 1; 380 qt_port->ReadBulkStopped = 1;
@@ -333,7 +386,8 @@ static void qt_read_bulk_callback(struct urb *urb)
333 386
334 if (qt_port->closePending == 1) { 387 if (qt_port->closePending == 1) {
335 /* Were closing , stop reading */ 388 /* Were closing , stop reading */
336 dev_dbg(&port->dev, "%s - (qt_port->closepending == 1\n", __func__); 389 dev_dbg(&port->dev,
390 "%s - (qt_port->closepending == 1\n", __func__);
337 qt_port->ReadBulkStopped = 1; 391 qt_port->ReadBulkStopped = 1;
338 goto exit; 392 goto exit;
339 } 393 }
@@ -351,62 +405,14 @@ static void qt_read_bulk_callback(struct urb *urb)
351 if (urb->status) { 405 if (urb->status) {
352 qt_port->ReadBulkStopped = 1; 406 qt_port->ReadBulkStopped = 1;
353 407
354 dev_dbg(&port->dev, "%s - nonzero read bulk status received: %d\n", 408 dev_dbg(&port->dev,
409 "%s - nonzero read bulk status received: %d\n",
355 __func__, urb->status); 410 __func__, urb->status);
356 goto exit; 411 goto exit;
357 } 412 }
358 413
359 if (RxCount) { 414 if (urb->actual_length)
360 flag_data = 0; 415 qt_status_change_check(tty, urb, qt_port, port);
361 for (i = 0; i < RxCount; ++i) {
362 /* Look ahead code here */
363 if ((i <= (RxCount - 3)) && (data[i] == 0x1b)
364 && (data[i + 1] == 0x1b)) {
365 flag = 0;
366 switch (data[i + 2]) {
367 case 0x00:
368 /* line status change 4th byte must follow */
369 if (i > (RxCount - 4)) {
370 dev_dbg(&port->dev, "Illegal escape seuences in received data\n");
371 break;
372 }
373 ProcessLineStatus(qt_port, data[i + 3]);
374 i += 3;
375 flag = 1;
376 break;
377
378 case 0x01:
379 /* Modem status status change 4th byte must follow */
380 dev_dbg(&port->dev, "Modem status status.\n");
381 if (i > (RxCount - 4)) {
382 dev_dbg(&port->dev, "Illegal escape sequences in received data\n");
383 break;
384 }
385 ProcessModemStatus(qt_port,
386 data[i + 3]);
387 i += 3;
388 flag = 1;
389 break;
390 case 0xff:
391 dev_dbg(&port->dev, "No status sequence.\n");
392
393 if (tty) {
394 ProcessRxChar(tty, port, data[i]);
395 ProcessRxChar(tty, port, data[i + 1]);
396 }
397 i += 2;
398 break;
399 }
400 if (flag == 1)
401 continue;
402 }
403
404 if (tty && urb->actual_length)
405 tty_insert_flip_char(tty, data[i], TTY_NORMAL);
406
407 }
408 tty_flip_buffer_push(tty);
409 }
410 416
411 /* Continue trying to always read */ 417 /* Continue trying to always read */
412 usb_fill_bulk_urb(port->read_urb, serial->dev, 418 usb_fill_bulk_urb(port->read_urb, serial->dev,
@@ -417,10 +423,11 @@ static void qt_read_bulk_callback(struct urb *urb)
417 qt_read_bulk_callback, port); 423 qt_read_bulk_callback, port);
418 result = usb_submit_urb(port->read_urb, GFP_ATOMIC); 424 result = usb_submit_urb(port->read_urb, GFP_ATOMIC);
419 if (result) 425 if (result)
420 dev_dbg(&port->dev, "%s - failed resubmitting read urb, error %d", 426 dev_dbg(&port->dev,
427 "%s - failed resubmitting read urb, error %d",
421 __func__, result); 428 __func__, result);
422 else { 429 else {
423 if (RxCount) { 430 if (urb->actual_length) {
424 tty_flip_buffer_push(tty); 431 tty_flip_buffer_push(tty);
425 tty_schedule_flip(tty); 432 tty_schedule_flip(tty);
426 } 433 }
@@ -824,6 +831,31 @@ static void qt_release(struct usb_serial *serial)
824 831
825} 832}
826 833
834static void qt_submit_urb_from_open(struct usb_serial *serial,
835 struct usb_serial_port *port)
836{
837 int result;
838 struct usb_serial_port *port0 = serial->port[0];
839
840 /* set up interrupt urb */
841 usb_fill_int_urb(port0->interrupt_in_urb,
842 serial->dev,
843 usb_rcvintpipe(serial->dev,
844 port0->interrupt_in_endpointAddress),
845 port0->interrupt_in_buffer,
846 port0->interrupt_in_urb->transfer_buffer_length,
847 qt_interrupt_callback, serial,
848 port0->interrupt_in_urb->interval);
849
850 result = usb_submit_urb(port0->interrupt_in_urb,
851 GFP_KERNEL);
852 if (result) {
853 dev_err(&port->dev,
854 "%s - Error %d submitting interrupt urb\n",
855 __func__, result);
856 }
857}
858
827static int qt_open(struct tty_struct *tty, 859static int qt_open(struct tty_struct *tty,
828 struct usb_serial_port *port) 860 struct usb_serial_port *port)
829{ 861{
@@ -884,38 +916,20 @@ static int qt_open(struct tty_struct *tty,
884 916
885 /* Check to see if we've set up our endpoint info yet */ 917 /* Check to see if we've set up our endpoint info yet */
886 if (port0->open_ports == 1) { 918 if (port0->open_ports == 1) {
887 if (serial->port[0]->interrupt_in_buffer == NULL) { 919 if (serial->port[0]->interrupt_in_buffer == NULL)
888 /* set up interrupt urb */ 920 qt_submit_urb_from_open(serial, port);
889 usb_fill_int_urb(serial->port[0]->interrupt_in_urb,
890 serial->dev,
891 usb_rcvintpipe(serial->dev,
892 serial->port[0]->interrupt_in_endpointAddress),
893 serial->port[0]->interrupt_in_buffer,
894 serial->port[0]->
895 interrupt_in_urb->transfer_buffer_length,
896 qt_interrupt_callback, serial,
897 serial->port[0]->
898 interrupt_in_urb->interval);
899
900 result =
901 usb_submit_urb(serial->port[0]->interrupt_in_urb,
902 GFP_KERNEL);
903 if (result) {
904 dev_err(&port->dev,
905 "%s - Error %d submitting "
906 "interrupt urb\n", __func__, result);
907 }
908
909 }
910
911 } 921 }
912 922
913 dev_dbg(&port->dev, "port number is %d\n", port->number); 923 dev_dbg(&port->dev, "port number is %d\n", port->number);
914 dev_dbg(&port->dev, "serial number is %d\n", port->serial->minor); 924 dev_dbg(&port->dev, "serial number is %d\n", port->serial->minor);
915 dev_dbg(&port->dev, "Bulkin endpoint is %d\n", port->bulk_in_endpointAddress); 925 dev_dbg(&port->dev,
916 dev_dbg(&port->dev, "BulkOut endpoint is %d\n", port->bulk_out_endpointAddress); 926 "Bulkin endpoint is %d\n", port->bulk_in_endpointAddress);
917 dev_dbg(&port->dev, "Interrupt endpoint is %d\n", port->interrupt_in_endpointAddress); 927 dev_dbg(&port->dev,
918 dev_dbg(&port->dev, "port's number in the device is %d\n", quatech_port->port_num); 928 "BulkOut endpoint is %d\n", port->bulk_out_endpointAddress);
929 dev_dbg(&port->dev, "Interrupt endpoint is %d\n",
930 port->interrupt_in_endpointAddress);
931 dev_dbg(&port->dev, "port's number in the device is %d\n",
932 quatech_port->port_num);
919 quatech_port->read_urb = port->read_urb; 933 quatech_port->read_urb = port->read_urb;
920 934
921 /* set up our bulk in urb */ 935 /* set up our bulk in urb */
@@ -928,7 +942,8 @@ static int qt_open(struct tty_struct *tty,
928 quatech_port->read_urb->transfer_buffer_length, 942 quatech_port->read_urb->transfer_buffer_length,
929 qt_read_bulk_callback, quatech_port); 943 qt_read_bulk_callback, quatech_port);
930 944
931 dev_dbg(&port->dev, "qt_open: bulkin endpoint is %d\n", port->bulk_in_endpointAddress); 945 dev_dbg(&port->dev, "qt_open: bulkin endpoint is %d\n",
946 port->bulk_in_endpointAddress);
932 quatech_port->read_urb_busy = true; 947 quatech_port->read_urb_busy = true;
933 result = usb_submit_urb(quatech_port->read_urb, GFP_KERNEL); 948 result = usb_submit_urb(quatech_port->read_urb, GFP_KERNEL);
934 if (result) { 949 if (result) {
@@ -1021,15 +1036,18 @@ static void qt_close(struct usb_serial_port *port)
1021 /* Close uart channel */ 1036 /* Close uart channel */
1022 status = qt_close_channel(serial, index); 1037 status = qt_close_channel(serial, index);
1023 if (status < 0) 1038 if (status < 0)
1024 dev_dbg(&port->dev, "%s - port %d qt_close_channel failed.\n", __func__, port->number); 1039 dev_dbg(&port->dev,
1040 "%s - port %d qt_close_channel failed.\n",
1041 __func__, port->number);
1025 1042
1026 port0->open_ports--; 1043 port0->open_ports--;
1027 1044
1028 dev_dbg(&port->dev, "qt_num_open_ports in close%d:in port%d\n", port0->open_ports, port->number); 1045 dev_dbg(&port->dev, "qt_num_open_ports in close%d:in port%d\n",
1046 port0->open_ports, port->number);
1029 1047
1030 if (port0->open_ports == 0) { 1048 if (port0->open_ports == 0) {
1031 if (serial->port[0]->interrupt_in_urb) { 1049 if (serial->port[0]->interrupt_in_urb) {
1032 dev_dbg(&port->dev, "%s", "Shutdown interrupt_in_urb\n"); 1050 dev_dbg(&port->dev, "Shutdown interrupt_in_urb\n");
1033 usb_kill_urb(serial->port[0]->interrupt_in_urb); 1051 usb_kill_urb(serial->port[0]->interrupt_in_urb);
1034 } 1052 }
1035 1053
@@ -1053,7 +1071,8 @@ static int qt_write(struct tty_struct *tty, struct usb_serial_port *port,
1053 return -ENODEV; 1071 return -ENODEV;
1054 1072
1055 if (count == 0) { 1073 if (count == 0) {
1056 dev_dbg(&port->dev, "%s - write request of 0 bytes\n", __func__); 1074 dev_dbg(&port->dev,
1075 "%s - write request of 0 bytes\n", __func__);
1057 return 0; 1076 return 0;
1058 } 1077 }
1059 1078
@@ -1080,7 +1099,8 @@ static int qt_write(struct tty_struct *tty, struct usb_serial_port *port,
1080 /* send the data out the bulk port */ 1099 /* send the data out the bulk port */
1081 result = usb_submit_urb(port->write_urb, GFP_ATOMIC); 1100 result = usb_submit_urb(port->write_urb, GFP_ATOMIC);
1082 if (result) 1101 if (result)
1083 dev_dbg(&port->dev, "%s - failed submitting write urb, error %d\n", 1102 dev_dbg(&port->dev,
1103 "%s - failed submitting write urb, error %d\n",
1084 __func__, result); 1104 __func__, result);
1085 else 1105 else
1086 result = count; 1106 result = count;
@@ -1163,7 +1183,8 @@ static int qt_ioctl(struct tty_struct *tty,
1163 return 0; 1183 return 0;
1164 } 1184 }
1165 1185
1166 dev_dbg(&port->dev, "%s -No ioctl for that one. port = %d\n", __func__, port->number); 1186 dev_dbg(&port->dev, "%s -No ioctl for that one. port = %d\n",
1187 __func__, port->number);
1167 return -ENOIOCTLCMD; 1188 return -ENOIOCTLCMD;
1168} 1189}
1169 1190
@@ -1238,7 +1259,8 @@ static void qt_set_termios(struct tty_struct *tty,
1238 1259
1239 /* Now determine flow control */ 1260 /* Now determine flow control */
1240 if (cflag & CRTSCTS) { 1261 if (cflag & CRTSCTS) {
1241 dev_dbg(&port->dev, "%s - Enabling HW flow control port %d\n", __func__, port->number); 1262 dev_dbg(&port->dev, "%s - Enabling HW flow control port %d\n",
1263 __func__, port->number);
1242 1264
1243 /* Enable RTS/CTS flow control */ 1265 /* Enable RTS/CTS flow control */
1244 status = BoxSetHW_FlowCtrl(port->serial, index, 1); 1266 status = BoxSetHW_FlowCtrl(port->serial, index, 1);
@@ -1249,7 +1271,9 @@ static void qt_set_termios(struct tty_struct *tty,
1249 } 1271 }
1250 } else { 1272 } else {
1251 /* Disable RTS/CTS flow control */ 1273 /* Disable RTS/CTS flow control */
1252 dev_dbg(&port->dev, "%s - disabling HW flow control port %d\n", __func__, port->number); 1274 dev_dbg(&port->dev,
1275 "%s - disabling HW flow control port %d\n",
1276 __func__, port->number);
1253 1277
1254 status = BoxSetHW_FlowCtrl(port->serial, index, 0); 1278 status = BoxSetHW_FlowCtrl(port->serial, index, 0);
1255 if (status < 0) { 1279 if (status < 0) {
@@ -1268,17 +1292,21 @@ static void qt_set_termios(struct tty_struct *tty,
1268 BoxSetSW_FlowCtrl(port->serial, index, stop_char, 1292 BoxSetSW_FlowCtrl(port->serial, index, stop_char,
1269 start_char); 1293 start_char);
1270 if (status < 0) 1294 if (status < 0)
1271 dev_dbg(&port->dev, "BoxSetSW_FlowCtrl (enabled) failed\n"); 1295 dev_dbg(&port->dev,
1296 "BoxSetSW_FlowCtrl (enabled) failed\n");
1272 1297
1273 } else { 1298 } else {
1274 /* disable SW flow control */ 1299 /* disable SW flow control */
1275 status = BoxDisable_SW_FlowCtrl(port->serial, index); 1300 status = BoxDisable_SW_FlowCtrl(port->serial, index);
1276 if (status < 0) 1301 if (status < 0)
1277 dev_dbg(&port->dev, "BoxSetSW_FlowCtrl (diabling) failed\n"); 1302 dev_dbg(&port->dev,
1303 "BoxSetSW_FlowCtrl (diabling) failed\n");
1278 1304
1279 } 1305 }
1280 termios->c_cflag &= ~CMSPAR; 1306 termios->c_cflag &= ~CMSPAR;
1281 /* FIXME: Error cases should be returning the actual bits changed only */ 1307 /* FIXME:
1308 Error cases should be returning the actual bits changed only
1309 */
1282} 1310}
1283 1311
1284static void qt_break(struct tty_struct *tty, int break_state) 1312static void qt_break(struct tty_struct *tty, int break_state)
@@ -1436,12 +1464,32 @@ static void qt_throttle(struct tty_struct *tty)
1436 mutex_unlock(&qt_port->lock); 1464 mutex_unlock(&qt_port->lock);
1437} 1465}
1438 1466
1467static void qt_submit_urb_from_unthrottle(struct usb_serial_port *port,
1468 struct usb_serial *serial)
1469{
1470 int result;
1471
1472 /* Start reading from the device */
1473 usb_fill_bulk_urb(port->read_urb, serial->dev,
1474 usb_rcvbulkpipe(serial->dev,
1475 port->bulk_in_endpointAddress),
1476 port->read_urb->transfer_buffer,
1477 port->read_urb->transfer_buffer_length,
1478 qt_read_bulk_callback, port);
1479
1480 result = usb_submit_urb(port->read_urb, GFP_ATOMIC);
1481
1482 if (result)
1483 dev_err(&port->dev,
1484 "%s - failed restarting read urb, error %d\n",
1485 __func__, result);
1486}
1487
1439static void qt_unthrottle(struct tty_struct *tty) 1488static void qt_unthrottle(struct tty_struct *tty)
1440{ 1489{
1441 struct usb_serial_port *port = tty->driver_data; 1490 struct usb_serial_port *port = tty->driver_data;
1442 struct usb_serial *serial = get_usb_serial(port, __func__); 1491 struct usb_serial *serial = get_usb_serial(port, __func__);
1443 struct quatech_port *qt_port; 1492 struct quatech_port *qt_port;
1444 unsigned int result;
1445 1493
1446 if (!serial) 1494 if (!serial)
1447 return; 1495 return;
@@ -1457,21 +1505,8 @@ static void qt_unthrottle(struct tty_struct *tty)
1457 dev_dbg(&port->dev, "%s - qt_port->RxHolding = 0\n", __func__); 1505 dev_dbg(&port->dev, "%s - qt_port->RxHolding = 0\n", __func__);
1458 1506
1459 /* if we have a bulk endpoint, start it up */ 1507 /* if we have a bulk endpoint, start it up */
1460 if ((serial->num_bulk_in) && (qt_port->ReadBulkStopped == 1)) { 1508 if ((serial->num_bulk_in) && (qt_port->ReadBulkStopped == 1))
1461 /* Start reading from the device */ 1509 qt_submit_urb_from_unthrottle(port, serial);
1462 usb_fill_bulk_urb(port->read_urb, serial->dev,
1463 usb_rcvbulkpipe(serial->dev,
1464 port->bulk_in_endpointAddress),
1465 port->read_urb->transfer_buffer,
1466 port->read_urb->
1467 transfer_buffer_length,
1468 qt_read_bulk_callback, port);
1469 result = usb_submit_urb(port->read_urb, GFP_ATOMIC);
1470 if (result)
1471 dev_err(&port->dev,
1472 "%s - failed restarting read urb, error %d\n",
1473 __func__, result);
1474 }
1475 } 1510 }
1476 mutex_unlock(&qt_port->lock); 1511 mutex_unlock(&qt_port->lock);
1477} 1512}
diff --git a/drivers/staging/silicom/bp_mod.c b/drivers/staging/silicom/bp_mod.c
index 3cfd0516adfa..58c5f5cf4cec 100644
--- a/drivers/staging/silicom/bp_mod.c
+++ b/drivers/staging/silicom/bp_mod.c
@@ -9,7 +9,6 @@
9/* */ 9/* */
10/* */ 10/* */
11/******************************************************************************/ 11/******************************************************************************/
12#include <linux/version.h>
13 12
14#include <linux/kernel.h> /* We're doing kernel work */ 13#include <linux/kernel.h> /* We're doing kernel work */
15#include <linux/module.h> /* Specifically, a module */ 14#include <linux/module.h> /* Specifically, a module */
@@ -4319,16 +4318,6 @@ void remove_bypass_wd_auto(bpctl_dev_t *pbpctl_dev)
4319 del_timer_sync(&pbpctl_dev->bp_timer); 4318 del_timer_sync(&pbpctl_dev->bp_timer);
4320#ifdef BP_SELF_TEST 4319#ifdef BP_SELF_TEST
4321 pbpctl_dev_sl = get_status_port_fn(pbpctl_dev); 4320 pbpctl_dev_sl = get_status_port_fn(pbpctl_dev);
4322#if (LINUX_VERSION_CODE < KERNEL_VERSION(2,6,31))
4323 if (pbpctl_dev_sl && (pbpctl_dev_sl->ndev)
4324 && (pbpctl_dev_sl->ndev->hard_start_xmit)
4325 && (pbpctl_dev_sl->hard_start_xmit_save)) {
4326 rtnl_lock();
4327 pbpctl_dev_sl->ndev->hard_start_xmit =
4328 pbpctl_dev_sl->hard_start_xmit_save;
4329 rtnl_unlock();
4330 }
4331#else
4332 if (pbpctl_dev_sl && (pbpctl_dev_sl->ndev)) { 4321 if (pbpctl_dev_sl && (pbpctl_dev_sl->ndev)) {
4333 if ((pbpctl_dev_sl->ndev->netdev_ops) 4322 if ((pbpctl_dev_sl->ndev->netdev_ops)
4334 && (pbpctl_dev_sl->old_ops)) { 4323 && (pbpctl_dev_sl->old_ops)) {
@@ -4342,8 +4331,6 @@ void remove_bypass_wd_auto(bpctl_dev_t *pbpctl_dev)
4342 } 4331 }
4343 4332
4344 } 4333 }
4345
4346#endif
4347#endif 4334#endif
4348 } 4335 }
4349 4336
@@ -4433,23 +4420,7 @@ int set_bp_self_test(bpctl_dev_t *pbpctl_dev, unsigned int param)
4433 if (pbpctl_dev->bp_caps & WD_CTL_CAP) { 4420 if (pbpctl_dev->bp_caps & WD_CTL_CAP) {
4434 pbpctl_dev->bp_self_test_flag = param == 0 ? 0 : 1; 4421 pbpctl_dev->bp_self_test_flag = param == 0 ? 0 : 1;
4435 pbpctl_dev_sl = get_status_port_fn(pbpctl_dev); 4422 pbpctl_dev_sl = get_status_port_fn(pbpctl_dev);
4436#if (LINUX_VERSION_CODE < KERNEL_VERSION(2,6,31))
4437 if ((pbpctl_dev_sl->ndev) &&
4438 (pbpctl_dev_sl->ndev->hard_start_xmit)) {
4439 rtnl_lock();
4440 if (pbpctl_dev->bp_self_test_flag == 1) {
4441 4423
4442 pbpctl_dev_sl->hard_start_xmit_save =
4443 pbpctl_dev_sl->ndev->hard_start_xmit;
4444 pbpctl_dev_sl->ndev->hard_start_xmit =
4445 bp_hard_start_xmit;
4446 } else if (pbpctl_dev_sl->hard_start_xmit_save) {
4447 pbpctl_dev_sl->ndev->hard_start_xmit =
4448 pbpctl_dev_sl->hard_start_xmit_save;
4449 }
4450 rtnl_unlock();
4451 }
4452#else
4453 if ((pbpctl_dev_sl->ndev) && (pbpctl_dev_sl->ndev->netdev_ops)) { 4424 if ((pbpctl_dev_sl->ndev) && (pbpctl_dev_sl->ndev->netdev_ops)) {
4454 rtnl_lock(); 4425 rtnl_lock();
4455 if (pbpctl_dev->bp_self_test_flag == 1) { 4426 if (pbpctl_dev->bp_self_test_flag == 1) {
@@ -4470,7 +4441,6 @@ int set_bp_self_test(bpctl_dev_t *pbpctl_dev, unsigned int param)
4470 } 4441 }
4471 rtnl_unlock(); 4442 rtnl_unlock();
4472 } 4443 }
4473#endif
4474 4444
4475 set_bypass_wd_auto(pbpctl_dev, param); 4445 set_bypass_wd_auto(pbpctl_dev, param);
4476 return 0; 4446 return 0;
@@ -5428,15 +5398,8 @@ static void if_scan_init(void)
5428 /* rcu_read_lock(); */ 5398 /* rcu_read_lock(); */
5429 /* rtnl_lock(); */ 5399 /* rtnl_lock(); */
5430 /* rcu_read_lock(); */ 5400 /* rcu_read_lock(); */
5431#if 1 5401
5432#if (LINUX_VERSION_CODE >= 0x020618) 5402 for_each_netdev(&init_net, dev) {
5433 for_each_netdev(&init_net, dev)
5434#elif (LINUX_VERSION_CODE >= 0x20616)
5435 for_each_netdev(dev)
5436#else
5437 for (dev = dev_base; dev; dev = dev->next)
5438#endif
5439 {
5440 5403
5441 struct ethtool_drvinfo drvinfo; 5404 struct ethtool_drvinfo drvinfo;
5442 char cbuf[32]; 5405 char cbuf[32];
@@ -5454,8 +5417,6 @@ static void if_scan_init(void)
5454 dev->ethtool_ops->get_drvinfo(dev, &drvinfo); 5417 dev->ethtool_ops->get_drvinfo(dev, &drvinfo);
5455 } else 5418 } else
5456 continue; 5419 continue;
5457 if (!drvinfo.bus_info)
5458 continue;
5459 if (!strcmp(drvinfo.bus_info, "N/A")) 5420 if (!strcmp(drvinfo.bus_info, "N/A"))
5460 continue; 5421 continue;
5461 memcpy(&cbuf, drvinfo.bus_info, 32); 5422 memcpy(&cbuf, drvinfo.bus_info, 32);
@@ -5491,22 +5452,14 @@ static void if_scan_init(void)
5491 } 5452 }
5492 5453
5493 } 5454 }
5494#endif
5495 /* rtnl_unlock(); */ 5455 /* rtnl_unlock(); */
5496 /* rcu_read_unlock(); */ 5456 /* rcu_read_unlock(); */
5497 5457
5498} 5458}
5499 5459
5500#if (LINUX_VERSION_CODE < KERNEL_VERSION(2,6,30)) 5460static long device_ioctl(struct file *file, /* see include/linux/fs.h */
5501static int device_ioctl(struct inode *inode, /* see include/linux/fs.h */
5502 struct file *file, /* ditto */
5503 unsigned int ioctl_num, /* number and param for ioctl */
5504 unsigned long ioctl_param)
5505#else
5506static long device_ioctl(struct file *file, /* ditto */
5507 unsigned int ioctl_num, /* number and param for ioctl */ 5461 unsigned int ioctl_num, /* number and param for ioctl */
5508 unsigned long ioctl_param) 5462 unsigned long ioctl_param)
5509#endif
5510{ 5463{
5511 struct bpctl_cmd bpctl_cmd; 5464 struct bpctl_cmd bpctl_cmd;
5512 int dev_idx = 0; 5465 int dev_idx = 0;
@@ -5517,9 +5470,7 @@ static long device_ioctl(struct file *file, /* ditto */
5517 5470
5518 static bpctl_dev_t *pbpctl_dev; 5471 static bpctl_dev_t *pbpctl_dev;
5519 5472
5520#if (LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,30))
5521 /* lock_kernel(); */ 5473 /* lock_kernel(); */
5522#endif
5523 lock_bpctl(); 5474 lock_bpctl();
5524 /* local_irq_save(flags); */ 5475 /* local_irq_save(flags); */
5525 /* if(!spin_trylock_irqsave(&bpvm_lock)){ 5476 /* if(!spin_trylock_irqsave(&bpvm_lock)){
@@ -5900,9 +5851,7 @@ static long device_ioctl(struct file *file, /* ditto */
5900 ret = -EFAULT; 5851 ret = -EFAULT;
5901 ret = SUCCESS; 5852 ret = SUCCESS;
5902 bp_exit: 5853 bp_exit:
5903#if (LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,30))
5904 /* unlock_kernel(); */ 5854 /* unlock_kernel(); */
5905#endif
5906 /* spin_unlock_irqrestore(&bpvm_lock, flags); */ 5855 /* spin_unlock_irqrestore(&bpvm_lock, flags); */
5907 unlock_bpctl(); 5856 unlock_bpctl();
5908 /* unlock_kernel(); */ 5857 /* unlock_kernel(); */
@@ -5911,12 +5860,7 @@ static long device_ioctl(struct file *file, /* ditto */
5911 5860
5912struct file_operations Fops = { 5861struct file_operations Fops = {
5913 .owner = THIS_MODULE, 5862 .owner = THIS_MODULE,
5914#if (LINUX_VERSION_CODE < KERNEL_VERSION(2,6,30))
5915 .ioctl = device_ioctl,
5916#else
5917 .unlocked_ioctl = device_ioctl, 5863 .unlocked_ioctl = device_ioctl,
5918#endif
5919
5920 .open = device_open, 5864 .open = device_open,
5921 .release = device_release, /* a.k.a. close */ 5865 .release = device_release, /* a.k.a. close */
5922}; 5866};
@@ -6952,15 +6896,8 @@ static int __init bypass_init_module(void)
6952 memset(bpctl_dev_arr[idx_dev].bp_tx_data + 7, 6896 memset(bpctl_dev_arr[idx_dev].bp_tx_data + 7,
6953 0xaa, 5); 6897 0xaa, 5);
6954 6898
6955#if (LINUX_VERSION_CODE < KERNEL_VERSION(2,6,9))
6956 bpctl_dev_arr[idx_dev].bp_tx_data[12] =
6957 (ETH_P_BPTEST >> 8) & 0xff;
6958 bpctl_dev_arr[idx_dev].bp_tx_data[13] =
6959 ETH_P_BPTEST & 0xff;
6960#else
6961 *(__be16 *) (bpctl_dev_arr[idx_dev].bp_tx_data + 6899 *(__be16 *) (bpctl_dev_arr[idx_dev].bp_tx_data +
6962 12) = htons(ETH_P_BPTEST); 6900 12) = htons(ETH_P_BPTEST);
6963#endif
6964 6901
6965 } else 6902 } else
6966 printk("bp_ctl: Memory allocation error!\n"); 6903 printk("bp_ctl: Memory allocation error!\n");
@@ -7009,83 +6946,6 @@ static int __init bypass_init_module(void)
7009 } 6946 }
7010 } 6947 }
7011 6948
7012#if (LINUX_VERSION_CODE < KERNEL_VERSION(2,6,0))
7013 inter_module_register("is_bypass_sd", THIS_MODULE, &is_bypass_sd);
7014 inter_module_register("get_bypass_slave_sd", THIS_MODULE,
7015 &get_bypass_slave_sd);
7016 inter_module_register("get_bypass_caps_sd", THIS_MODULE,
7017 &get_bypass_caps_sd);
7018 inter_module_register("get_wd_set_caps_sd", THIS_MODULE,
7019 &get_wd_set_caps_sd);
7020 inter_module_register("set_bypass_sd", THIS_MODULE, &set_bypass_sd);
7021 inter_module_register("get_bypass_sd", THIS_MODULE, &get_bypass_sd);
7022 inter_module_register("get_bypass_change_sd", THIS_MODULE,
7023 &get_bypass_change_sd);
7024 inter_module_register("set_dis_bypass_sd", THIS_MODULE,
7025 &set_dis_bypass_sd);
7026 inter_module_register("get_dis_bypass_sd", THIS_MODULE,
7027 &get_dis_bypass_sd);
7028 inter_module_register("set_bypass_pwoff_sd", THIS_MODULE,
7029 &set_bypass_pwoff_sd);
7030 inter_module_register("get_bypass_pwoff_sd", THIS_MODULE,
7031 &get_bypass_pwoff_sd);
7032 inter_module_register("set_bypass_pwup_sd", THIS_MODULE,
7033 &set_bypass_pwup_sd);
7034 inter_module_register("get_bypass_pwup_sd", THIS_MODULE,
7035 &get_bypass_pwup_sd);
7036 inter_module_register("get_bypass_wd_sd", THIS_MODULE,
7037 &get_bypass_wd_sd);
7038 inter_module_register("set_bypass_wd_sd", THIS_MODULE,
7039 &set_bypass_wd_sd);
7040 inter_module_register("get_wd_expire_time_sd", THIS_MODULE,
7041 &get_wd_expire_time_sd);
7042 inter_module_register("reset_bypass_wd_timer_sd", THIS_MODULE,
7043 &reset_bypass_wd_timer_sd);
7044 inter_module_register("set_std_nic_sd", THIS_MODULE, &set_std_nic_sd);
7045 inter_module_register("get_std_nic_sd", THIS_MODULE, &get_std_nic_sd);
7046 inter_module_register("set_tx_sd", THIS_MODULE, &set_tx_sd);
7047 inter_module_register("get_tx_sd", THIS_MODULE, &get_tx_sd);
7048 inter_module_register("set_tpl_sd", THIS_MODULE, &set_tpl_sd);
7049 inter_module_register("get_tpl_sd", THIS_MODULE, &get_tpl_sd);
7050
7051 inter_module_register("set_bp_hw_reset_sd", THIS_MODULE,
7052 &set_bp_hw_reset_sd);
7053 inter_module_register("get_bp_hw_reset_sd", THIS_MODULE,
7054 &get_bp_hw_reset_sd);
7055
7056 inter_module_register("set_tap_sd", THIS_MODULE, &set_tap_sd);
7057 inter_module_register("get_tap_sd", THIS_MODULE, &get_tap_sd);
7058 inter_module_register("get_tap_change_sd", THIS_MODULE,
7059 &get_tap_change_sd);
7060 inter_module_register("set_dis_tap_sd", THIS_MODULE, &set_dis_tap_sd);
7061 inter_module_register("get_dis_tap_sd", THIS_MODULE, &get_dis_tap_sd);
7062 inter_module_register("set_tap_pwup_sd", THIS_MODULE, &set_tap_pwup_sd);
7063 inter_module_register("get_tap_pwup_sd", THIS_MODULE, &get_tap_pwup_sd);
7064 inter_module_register("set_bp_disc_sd", THIS_MODULE, &set_bp_disc_sd);
7065 inter_module_register("get_bp_disc_sd", THIS_MODULE, &get_bp_disc_sd);
7066 inter_module_register("get_bp_disc_change_sd", THIS_MODULE,
7067 &get_bp_disc_change_sd);
7068 inter_module_register("set_bp_dis_disc_sd", THIS_MODULE,
7069 &set_bp_dis_disc_sd);
7070 inter_module_register("get_bp_dis_disc_sd", THIS_MODULE,
7071 &get_bp_dis_disc_sd);
7072 inter_module_register("set_bp_disc_pwup_sd", THIS_MODULE,
7073 &set_bp_disc_pwup_sd);
7074 inter_module_register("get_bp_disc_pwup_sd", THIS_MODULE,
7075 &get_bp_disc_pwup_sd);
7076 inter_module_register("set_wd_exp_mode_sd", THIS_MODULE,
7077 &set_wd_exp_mode_sd);
7078 inter_module_register("get_wd_exp_mode_sd", THIS_MODULE,
7079 &get_wd_exp_mode_sd);
7080 inter_module_register("set_wd_autoreset_sd", THIS_MODULE,
7081 &set_wd_autoreset_sd);
7082 inter_module_register("get_wd_autoreset_sd", THIS_MODULE,
7083 &get_wd_autoreset_sd);
7084 inter_module_register("get_bypass_info_sd", THIS_MODULE,
7085 &get_bypass_info_sd);
7086 inter_module_register("bp_if_scan_sd", THIS_MODULE, &bp_if_scan_sd);
7087
7088#endif
7089 register_netdevice_notifier(&bp_notifier_block); 6949 register_netdevice_notifier(&bp_notifier_block);
7090#ifdef BP_PROC_SUPPORT 6950#ifdef BP_PROC_SUPPORT
7091 { 6951 {
@@ -7115,58 +6975,8 @@ static int __init bypass_init_module(void)
7115static void __exit bypass_cleanup_module(void) 6975static void __exit bypass_cleanup_module(void)
7116{ 6976{
7117 int i; 6977 int i;
7118#if (LINUX_VERSION_CODE < KERNEL_VERSION(2,6,23))
7119 int ret;
7120#endif
7121 unregister_netdevice_notifier(&bp_notifier_block); 6978 unregister_netdevice_notifier(&bp_notifier_block);
7122 6979
7123#if (LINUX_VERSION_CODE < KERNEL_VERSION(2,6,0))
7124 inter_module_unregister("is_bypass_sd");
7125 inter_module_unregister("get_bypass_slave_sd");
7126 inter_module_unregister("get_bypass_caps_sd");
7127 inter_module_unregister("get_wd_set_caps_sd");
7128 inter_module_unregister("set_bypass_sd");
7129 inter_module_unregister("get_bypass_sd");
7130 inter_module_unregister("get_bypass_change_sd");
7131 inter_module_unregister("set_dis_bypass_sd");
7132 inter_module_unregister("get_dis_bypass_sd");
7133 inter_module_unregister("set_bypass_pwoff_sd");
7134 inter_module_unregister("get_bypass_pwoff_sd");
7135 inter_module_unregister("set_bypass_pwup_sd");
7136 inter_module_unregister("get_bypass_pwup_sd");
7137 inter_module_unregister("set_bypass_wd_sd");
7138 inter_module_unregister("get_bypass_wd_sd");
7139 inter_module_unregister("get_wd_expire_time_sd");
7140 inter_module_unregister("reset_bypass_wd_timer_sd");
7141 inter_module_unregister("set_std_nic_sd");
7142 inter_module_unregister("get_std_nic_sd");
7143 inter_module_unregister("set_tx_sd");
7144 inter_module_unregister("get_tx_sd");
7145 inter_module_unregister("set_tpl_sd");
7146 inter_module_unregister("get_tpl_sd");
7147 inter_module_unregister("set_tap_sd");
7148 inter_module_unregister("get_tap_sd");
7149 inter_module_unregister("get_tap_change_sd");
7150 inter_module_unregister("set_dis_tap_sd");
7151 inter_module_unregister("get_dis_tap_sd");
7152 inter_module_unregister("set_tap_pwup_sd");
7153 inter_module_unregister("get_tap_pwup_sd");
7154 inter_module_unregister("set_bp_disc_sd");
7155 inter_module_unregister("get_bp_disc_sd");
7156 inter_module_unregister("get_bp_disc_change_sd");
7157 inter_module_unregister("set_bp_dis_disc_sd");
7158 inter_module_unregister("get_bp_dis_disc_sd");
7159 inter_module_unregister("set_bp_disc_pwup_sd");
7160 inter_module_unregister("get_bp_disc_pwup_sd");
7161 inter_module_unregister("set_wd_exp_mode_sd");
7162 inter_module_unregister("get_wd_exp_mode_sd");
7163 inter_module_unregister("set_wd_autoreset_sd");
7164 inter_module_unregister("get_wd_autoreset_sd");
7165 inter_module_unregister("get_bypass_info_sd");
7166 inter_module_unregister("bp_if_scan_sd");
7167
7168#endif
7169
7170 for (i = 0; i < device_num; i++) { 6980 for (i = 0; i < device_num; i++) {
7171 /* unsigned long flags; */ 6981 /* unsigned long flags; */
7172#ifdef BP_PROC_SUPPORT 6982#ifdef BP_PROC_SUPPORT
@@ -7198,17 +7008,7 @@ static void __exit bypass_cleanup_module(void)
7198/* 7008/*
7199* Unregister the device 7009* Unregister the device
7200*/ 7010*/
7201#if (LINUX_VERSION_CODE < KERNEL_VERSION(2,6,23))
7202 ret = unregister_chrdev(major_num, DEVICE_NAME);
7203/*
7204* If there's an error, report it
7205*/
7206 if (ret < 0)
7207 printk("Error in module_unregister_chrdev: %d\n", ret);
7208#else
7209 unregister_chrdev(major_num, DEVICE_NAME); 7011 unregister_chrdev(major_num, DEVICE_NAME);
7210
7211#endif
7212} 7012}
7213 7013
7214module_init(bypass_init_module); 7014module_init(bypass_init_module);
@@ -7597,11 +7397,7 @@ static struct proc_dir_entry *proc_getdir(char *name,
7597 } 7397 }
7598 if (pde == (struct proc_dir_entry *)0) { 7398 if (pde == (struct proc_dir_entry *)0) {
7599 /* create the directory */ 7399 /* create the directory */
7600#if (LINUX_VERSION_CODE > 0x20300)
7601 pde = proc_mkdir(name, proc_dir); 7400 pde = proc_mkdir(name, proc_dir);
7602#else
7603 pde = create_proc_entry(name, S_IFDIR, proc_dir);
7604#endif
7605 if (pde == (struct proc_dir_entry *)0) { 7401 if (pde == (struct proc_dir_entry *)0) {
7606 7402
7607 return pde; 7403 return pde;
@@ -7703,13 +7499,8 @@ get_bypass_slave_pfs(char *page, char **start, off_t off, int count,
7703 return len; 7499 return len;
7704 } 7500 }
7705 net_slave_dev = pbp_device_block_slave->ndev; 7501 net_slave_dev = pbp_device_block_slave->ndev;
7706 if (net_slave_dev) { 7502 if (net_slave_dev)
7707 if (net_slave_dev) 7503 len = sprintf(page, "%s\n", net_slave_dev->name);
7708 len = sprintf(page, "%s\n", net_slave_dev->name);
7709 else
7710 len = sprintf(page, "fail\n");
7711
7712 }
7713 7504
7714 *eof = 1; 7505 *eof = 1;
7715 return len; 7506 return len;
diff --git a/drivers/staging/silicom/bp_proc.c b/drivers/staging/silicom/bp_proc.c
index 6ad4b27472e4..a01ca97b7665 100644
--- a/drivers/staging/silicom/bp_proc.c
+++ b/drivers/staging/silicom/bp_proc.c
@@ -10,21 +10,20 @@
10/* */ 10/* */
11/******************************************************************************/ 11/******************************************************************************/
12 12
13#include <linux/version.h> 13#if defined(CONFIG_SMP) && !defined(__SMP__)
14#if defined(CONFIG_SMP) && ! defined(__SMP__)
15#define __SMP__ 14#define __SMP__
16#endif 15#endif
17 16
18#include <linux/proc_fs.h> 17#include <linux/proc_fs.h>
19#include <linux/netdevice.h> 18#include <linux/netdevice.h>
20#include <asm/uaccess.h> 19#include <asm/uaccess.h>
21//#include <linux/smp_lock.h> 20/* #include <linux/smp_lock.h> */
22#include "bp_mod.h" 21#include "bp_mod.h"
23 22
24#define BP_PROC_DIR "bypass" 23#define BP_PROC_DIR "bypass"
25//#define BYPASS_SUPPORT "bypass" 24/* #define BYPASS_SUPPORT "bypass" */
26 25
27#ifdef BYPASS_SUPPORT 26#ifdef BYPASS_SUPPORT
28 27
29#define GPIO6_SET_ENTRY_SD "gpio6_set" 28#define GPIO6_SET_ENTRY_SD "gpio6_set"
30#define GPIO6_CLEAR_ENTRY_SD "gpio6_clear" 29#define GPIO6_CLEAR_ENTRY_SD "gpio6_clear"
@@ -70,7 +69,7 @@
70#define DISC_CHANGE_ENTRY_SD "disc_change" 69#define DISC_CHANGE_ENTRY_SD "disc_change"
71#define DIS_DISC_ENTRY_SD "dis_disc" 70#define DIS_DISC_ENTRY_SD "dis_disc"
72#define DISC_PWUP_ENTRY_SD "disc_pwup" 71#define DISC_PWUP_ENTRY_SD "disc_pwup"
73#endif //bypass_support 72
74static struct proc_dir_entry *bp_procfs_dir; 73static struct proc_dir_entry *bp_procfs_dir;
75 74
76static struct proc_dir_entry *proc_getdir(char *name, 75static struct proc_dir_entry *proc_getdir(char *name,
@@ -86,20 +85,17 @@ static struct proc_dir_entry *proc_getdir(char *name,
86 if (pde == (struct proc_dir_entry *)0) { 85 if (pde == (struct proc_dir_entry *)0) {
87 /* create the directory */ 86 /* create the directory */
88 pde = create_proc_entry(name, S_IFDIR, proc_dir); 87 pde = create_proc_entry(name, S_IFDIR, proc_dir);
89 if (pde == (struct proc_dir_entry *)0) { 88 if (pde == (struct proc_dir_entry *)0)
90 return (pde); 89 return pde;
91 }
92 } 90 }
93 return (pde); 91 return pde;
94} 92}
95 93
96#ifdef BYPASS_SUPPORT
97
98int 94int
99bypass_proc_create_entry_sd(struct pfs_unit *pfs_unit_curr, 95bypass_proc_create_entry_sd(struct pfs_unit *pfs_unit_curr,
100 char *proc_name, 96 char *proc_name,
101 write_proc_t * write_proc, 97 write_proc_t *write_proc,
102 read_proc_t * read_proc, 98 read_proc_t *read_proc,
103 struct proc_dir_entry *parent_pfs, void *data) 99 struct proc_dir_entry *parent_pfs, void *data)
104{ 100{
105 strcpy(pfs_unit_curr->proc_name, proc_name); 101 strcpy(pfs_unit_curr->proc_name, proc_name);
@@ -107,10 +103,8 @@ bypass_proc_create_entry_sd(struct pfs_unit *pfs_unit_curr,
107 S_IFREG | S_IRUSR | 103 S_IFREG | S_IRUSR |
108 S_IWUSR | S_IRGRP | 104 S_IWUSR | S_IRGRP |
109 S_IROTH, parent_pfs); 105 S_IROTH, parent_pfs);
110 if (pfs_unit_curr->proc_entry == 0) { 106 if (pfs_unit_curr->proc_entry == 0)
111
112 return -1; 107 return -1;
113 }
114 108
115 pfs_unit_curr->proc_entry->read_proc = read_proc; 109 pfs_unit_curr->proc_entry->read_proc = read_proc;
116 pfs_unit_curr->proc_entry->write_proc = write_proc; 110 pfs_unit_curr->proc_entry->write_proc = write_proc;
@@ -207,9 +201,8 @@ set_bypass_pfs(struct file *file, const char *buffer,
207 if (count > (sizeof(kbuf) - 1)) 201 if (count > (sizeof(kbuf) - 1))
208 return -1; 202 return -1;
209 203
210 if (copy_from_user(&kbuf, buffer, count)) { 204 if (copy_from_user(&kbuf, buffer, count))
211 return -1; 205 return -1;
212 }
213 206
214 kbuf[count] = '\0'; 207 kbuf[count] = '\0';
215 length = strlen(kbuf); 208 length = strlen(kbuf);
@@ -239,9 +232,8 @@ set_tap_pfs(struct file *file, const char *buffer,
239 if (count > (sizeof(kbuf) - 1)) 232 if (count > (sizeof(kbuf) - 1))
240 return -1; 233 return -1;
241 234
242 if (copy_from_user(&kbuf, buffer, count)) { 235 if (copy_from_user(&kbuf, buffer, count))
243 return -1; 236 return -1;
244 }
245 237
246 kbuf[count] = '\0'; 238 kbuf[count] = '\0';
247 length = strlen(kbuf); 239 length = strlen(kbuf);
@@ -271,9 +263,8 @@ set_disc_pfs(struct file *file, const char *buffer,
271 if (count > (sizeof(kbuf) - 1)) 263 if (count > (sizeof(kbuf) - 1))
272 return -1; 264 return -1;
273 265
274 if (copy_from_user(&kbuf, buffer, count)) { 266 if (copy_from_user(&kbuf, buffer, count))
275 return -1; 267 return -1;
276 }
277 268
278 kbuf[count] = '\0'; 269 kbuf[count] = '\0';
279 length = strlen(kbuf); 270 length = strlen(kbuf);
@@ -421,9 +412,8 @@ set_bypass_wd_pfs(struct file *file, const char *buffer,
421 unsigned int timeout = 0; 412 unsigned int timeout = 0;
422 char *timeout_ptr = kbuf; 413 char *timeout_ptr = kbuf;
423 414
424 if (copy_from_user(&kbuf, buffer, count)) { 415 if (copy_from_user(&kbuf, buffer, count))
425 return -1; 416 return -1;
426 }
427 417
428 timeout_ptr = kbuf; 418 timeout_ptr = kbuf;
429 timeout = atoi(&timeout_ptr); 419 timeout = atoi(&timeout_ptr);
@@ -570,9 +560,8 @@ set_dis_bypass_pfs(struct file *file, const char *buffer,
570 560
571 int bypass_param = 0, length = 0; 561 int bypass_param = 0, length = 0;
572 562
573 if (copy_from_user(&kbuf, buffer, count)) { 563 if (copy_from_user(&kbuf, buffer, count))
574 return -1; 564 return -1;
575 }
576 565
577 kbuf[count] = '\0'; 566 kbuf[count] = '\0';
578 length = strlen(kbuf); 567 length = strlen(kbuf);
@@ -599,9 +588,8 @@ set_dis_tap_pfs(struct file *file, const char *buffer,
599 588
600 int tap_param = 0, length = 0; 589 int tap_param = 0, length = 0;
601 590
602 if (copy_from_user(&kbuf, buffer, count)) { 591 if (copy_from_user(&kbuf, buffer, count))
603 return -1; 592 return -1;
604 }
605 593
606 kbuf[count] = '\0'; 594 kbuf[count] = '\0';
607 length = strlen(kbuf); 595 length = strlen(kbuf);
@@ -628,9 +616,8 @@ set_dis_disc_pfs(struct file *file, const char *buffer,
628 616
629 int tap_param = 0, length = 0; 617 int tap_param = 0, length = 0;
630 618
631 if (copy_from_user(&kbuf, buffer, count)) { 619 if (copy_from_user(&kbuf, buffer, count))
632 return -1; 620 return -1;
633 }
634 621
635 kbuf[count] = '\0'; 622 kbuf[count] = '\0';
636 length = strlen(kbuf); 623 length = strlen(kbuf);
@@ -717,9 +704,8 @@ set_bypass_pwup_pfs(struct file *file, const char *buffer,
717 704
718 int bypass_param = 0, length = 0; 705 int bypass_param = 0, length = 0;
719 706
720 if (copy_from_user(&kbuf, buffer, count)) { 707 if (copy_from_user(&kbuf, buffer, count))
721 return -1; 708 return -1;
722 }
723 709
724 kbuf[count] = '\0'; 710 kbuf[count] = '\0';
725 length = strlen(kbuf); 711 length = strlen(kbuf);
@@ -746,9 +732,8 @@ set_bypass_pwoff_pfs(struct file *file, const char *buffer,
746 732
747 int bypass_param = 0, length = 0; 733 int bypass_param = 0, length = 0;
748 734
749 if (copy_from_user(&kbuf, buffer, count)) { 735 if (copy_from_user(&kbuf, buffer, count))
750 return -1; 736 return -1;
751 }
752 737
753 kbuf[count] = '\0'; 738 kbuf[count] = '\0';
754 length = strlen(kbuf); 739 length = strlen(kbuf);
@@ -775,9 +760,8 @@ set_tap_pwup_pfs(struct file *file, const char *buffer,
775 760
776 int tap_param = 0, length = 0; 761 int tap_param = 0, length = 0;
777 762
778 if (copy_from_user(&kbuf, buffer, count)) { 763 if (copy_from_user(&kbuf, buffer, count))
779 return -1; 764 return -1;
780 }
781 765
782 kbuf[count] = '\0'; 766 kbuf[count] = '\0';
783 length = strlen(kbuf); 767 length = strlen(kbuf);
@@ -804,9 +788,8 @@ set_disc_pwup_pfs(struct file *file, const char *buffer,
804 788
805 int tap_param = 0, length = 0; 789 int tap_param = 0, length = 0;
806 790
807 if (copy_from_user(&kbuf, buffer, count)) { 791 if (copy_from_user(&kbuf, buffer, count))
808 return -1; 792 return -1;
809 }
810 793
811 kbuf[count] = '\0'; 794 kbuf[count] = '\0';
812 length = strlen(kbuf); 795 length = strlen(kbuf);
@@ -913,9 +896,8 @@ set_std_nic_pfs(struct file *file, const char *buffer,
913 896
914 int bypass_param = 0, length = 0; 897 int bypass_param = 0, length = 0;
915 898
916 if (copy_from_user(&kbuf, buffer, count)) { 899 if (copy_from_user(&kbuf, buffer, count))
917 return -1; 900 return -1;
918 }
919 901
920 kbuf[count] = '\0'; 902 kbuf[count] = '\0';
921 length = strlen(kbuf); 903 length = strlen(kbuf);
@@ -988,9 +970,8 @@ set_wd_exp_mode_pfs(struct file *file, const char *buffer,
988 if (count > (sizeof(kbuf) - 1)) 970 if (count > (sizeof(kbuf) - 1))
989 return -1; 971 return -1;
990 972
991 if (copy_from_user(&kbuf, buffer, count)) { 973 if (copy_from_user(&kbuf, buffer, count))
992 return -1; 974 return -1;
993 }
994 975
995 kbuf[count] = '\0'; 976 kbuf[count] = '\0';
996 length = strlen(kbuf); 977 length = strlen(kbuf);
@@ -1036,9 +1017,8 @@ set_wd_autoreset_pfs(struct file *file, const char *buffer,
1036 u32 timeout = 0; 1017 u32 timeout = 0;
1037 char *timeout_ptr = kbuf; 1018 char *timeout_ptr = kbuf;
1038 1019
1039 if (copy_from_user(&kbuf, buffer, count)) { 1020 if (copy_from_user(&kbuf, buffer, count))
1040 return -1; 1021 return -1;
1041 }
1042 1022
1043 timeout_ptr = kbuf; 1023 timeout_ptr = kbuf;
1044 timeout = atoi(&timeout_ptr); 1024 timeout = atoi(&timeout_ptr);
@@ -1061,9 +1041,8 @@ set_tpl_pfs(struct file *file, const char *buffer,
1061 if (count > (sizeof(kbuf) - 1)) 1041 if (count > (sizeof(kbuf) - 1))
1062 return -1; 1042 return -1;
1063 1043
1064 if (copy_from_user(&kbuf, buffer, count)) { 1044 if (copy_from_user(&kbuf, buffer, count))
1065 return -1; 1045 return -1;
1066 }
1067 1046
1068 kbuf[count] = '\0'; 1047 kbuf[count] = '\0';
1069 length = strlen(kbuf); 1048 length = strlen(kbuf);
@@ -1094,9 +1073,8 @@ set_wait_at_pwup_pfs(struct file *file, const char *buffer,
1094 if (count > (sizeof(kbuf) - 1)) 1073 if (count > (sizeof(kbuf) - 1))
1095 return -1; 1074 return -1;
1096 1075
1097 if (copy_from_user(&kbuf, buffer, count)) { 1076 if (copy_from_user(&kbuf, buffer, count))
1098 return -1; 1077 return -1;
1099 }
1100 1078
1101 kbuf[count] = '\0'; 1079 kbuf[count] = '\0';
1102 length = strlen(kbuf); 1080 length = strlen(kbuf);
@@ -1126,9 +1104,8 @@ set_hw_reset_pfs(struct file *file, const char *buffer,
1126 if (count > (sizeof(kbuf) - 1)) 1104 if (count > (sizeof(kbuf) - 1))
1127 return -1; 1105 return -1;
1128 1106
1129 if (copy_from_user(&kbuf, buffer, count)) { 1107 if (copy_from_user(&kbuf, buffer, count))
1130 return -1; 1108 return -1;
1131 }
1132 1109
1133 kbuf[count] = '\0'; 1110 kbuf[count] = '\0';
1134 length = strlen(kbuf); 1111 length = strlen(kbuf);
@@ -1147,10 +1124,10 @@ set_hw_reset_pfs(struct file *file, const char *buffer,
1147 1124
1148#endif /*PMC_FIX_FLAG */ 1125#endif /*PMC_FIX_FLAG */
1149 1126
1150int bypass_proc_create_dev_sd(bpctl_dev_t * pbp_device_block) 1127int bypass_proc_create_dev_sd(bpctl_dev_t *pbp_device_block)
1151{ 1128{
1152 struct bypass_pfs_sd *current_pfs = &(pbp_device_block->bypass_pfs_set); 1129 struct bypass_pfs_sd *current_pfs = &(pbp_device_block->bypass_pfs_set);
1153 static struct proc_dir_entry *procfs_dir = NULL; 1130 static struct proc_dir_entry *procfs_dir;
1154 int ret = 0; 1131 int ret = 0;
1155 1132
1156 sprintf(current_pfs->dir_name, "bypass_%s", dev->name); 1133 sprintf(current_pfs->dir_name, "bypass_%s", dev->name);
@@ -1327,7 +1304,7 @@ int bypass_proc_create_dev_sd(bpctl_dev_t * pbp_device_block)
1327 return ret; 1304 return ret;
1328} 1305}
1329 1306
1330int bypass_proc_remove_dev_sd(bpctl_dev_t * pbp_device_block) 1307int bypass_proc_remove_dev_sd(bpctl_dev_t *pbp_device_block)
1331{ 1308{
1332 1309
1333 struct bypass_pfs_sd *current_pfs = &pbp_device_block->bypass_pfs_set; 1310 struct bypass_pfs_sd *current_pfs = &pbp_device_block->bypass_pfs_set;
diff --git a/drivers/staging/silicom/bypasslib/bplibk.h b/drivers/staging/silicom/bypasslib/bplibk.h
index a1c85eec02f0..d8c1d27650b4 100644
--- a/drivers/staging/silicom/bypasslib/bplibk.h
+++ b/drivers/staging/silicom/bypasslib/bplibk.h
@@ -28,16 +28,7 @@
28 ((pid==INTEL_PEG4BPII_PID)|| \ 28 ((pid==INTEL_PEG4BPII_PID)|| \
29 (pid==INTEL_PEG4BPFII_PID))) 29 (pid==INTEL_PEG4BPFII_PID)))
30 30
31#if (LINUX_VERSION_CODE < KERNEL_VERSION(2,6,10))
32#define pci_get_class pci_find_class
33
34#define pci_get_device pci_find_device
35
36#endif
37
38#if (LINUX_VERSION_CODE > KERNEL_VERSION(2,6,10))
39#define EXPORT_SYMBOL_NOVERS EXPORT_SYMBOL 31#define EXPORT_SYMBOL_NOVERS EXPORT_SYMBOL
40#endif
41 32
42#ifdef BP_VENDOR_SUPPORT 33#ifdef BP_VENDOR_SUPPORT
43char *bp_desc_array[] = 34char *bp_desc_array[] =
diff --git a/drivers/staging/silicom/bypasslib/bypass.c b/drivers/staging/silicom/bypasslib/bypass.c
index 527829d58133..95a1f1815d90 100644
--- a/drivers/staging/silicom/bypasslib/bypass.c
+++ b/drivers/staging/silicom/bypasslib/bypass.c
@@ -11,7 +11,6 @@
11/* */ 11/* */
12/******************************************************************************/ 12/******************************************************************************/
13 13
14#include <linux/version.h>
15#if defined(CONFIG_SMP) && ! defined(__SMP__) 14#if defined(CONFIG_SMP) && ! defined(__SMP__)
16#define __SMP__ 15#define __SMP__
17#endif 16#endif
diff --git a/drivers/staging/slicoss/slicoss.c b/drivers/staging/slicoss/slicoss.c
index cd920dad85cd..78578ee59557 100644
--- a/drivers/staging/slicoss/slicoss.c
+++ b/drivers/staging/slicoss/slicoss.c
@@ -142,39 +142,12 @@ static DEFINE_PCI_DEVICE_TABLE(slic_pci_tbl) = {
142 142
143MODULE_DEVICE_TABLE(pci, slic_pci_tbl); 143MODULE_DEVICE_TABLE(pci, slic_pci_tbl);
144 144
145#ifdef ASSERT
146#undef ASSERT
147#endif
148
149static void slic_assert_fail(void)
150{
151 u32 cpuid;
152 u32 curr_pid;
153 cpuid = smp_processor_id();
154 curr_pid = current->pid;
155
156 printk(KERN_ERR "%s CPU # %d ---- PID # %d\n",
157 __func__, cpuid, curr_pid);
158}
159
160#ifndef ASSERT
161#define ASSERT(a) do { \
162 if (!(a)) { \
163 printk(KERN_ERR "slicoss ASSERT() Failure: function %s" \
164 "line %d\n", __func__, __LINE__); \
165 slic_assert_fail(); \
166 } \
167} while (0)
168#endif
169
170
171#define SLIC_GET_SLIC_HANDLE(_adapter, _pslic_handle) \ 145#define SLIC_GET_SLIC_HANDLE(_adapter, _pslic_handle) \
172{ \ 146{ \
173 spin_lock_irqsave(&_adapter->handle_lock.lock, \ 147 spin_lock_irqsave(&_adapter->handle_lock.lock, \
174 _adapter->handle_lock.flags); \ 148 _adapter->handle_lock.flags); \
175 _pslic_handle = _adapter->pfree_slic_handles; \ 149 _pslic_handle = _adapter->pfree_slic_handles; \
176 if (_pslic_handle) { \ 150 if (_pslic_handle) { \
177 ASSERT(_pslic_handle->type == SLIC_HANDLE_FREE); \
178 _adapter->pfree_slic_handles = _pslic_handle->next; \ 151 _adapter->pfree_slic_handles = _pslic_handle->next; \
179 } \ 152 } \
180 spin_unlock_irqrestore(&_adapter->handle_lock.lock, \ 153 spin_unlock_irqrestore(&_adapter->handle_lock.lock, \
@@ -325,11 +298,8 @@ static void slic_timer_ping(ulong dev)
325 struct adapter *adapter; 298 struct adapter *adapter;
326 struct sliccard *card; 299 struct sliccard *card;
327 300
328 ASSERT(dev);
329 adapter = netdev_priv((struct net_device *)dev); 301 adapter = netdev_priv((struct net_device *)dev);
330 ASSERT(adapter);
331 card = adapter->card; 302 card = adapter->card;
332 ASSERT(card);
333 303
334 adapter->pingtimer.expires = jiffies + (PING_TIMER_INTERVAL * HZ); 304 adapter->pingtimer.expires = jiffies + (PING_TIMER_INTERVAL * HZ);
335 add_timer(&adapter->pingtimer); 305 add_timer(&adapter->pingtimer);
@@ -361,9 +331,6 @@ static void slic_link_config(struct adapter *adapter,
361 if (adapter->state != ADAPT_UP) 331 if (adapter->state != ADAPT_UP)
362 return; 332 return;
363 333
364 ASSERT((adapter->devid == SLIC_1GB_DEVICE_ID)
365 || (adapter->devid == SLIC_2GB_DEVICE_ID));
366
367 if (linkspeed > LINK_1000MB) 334 if (linkspeed > LINK_1000MB)
368 linkspeed = LINK_AUTOSPEED; 335 linkspeed = LINK_AUTOSPEED;
369 if (linkduplex > LINK_AUTOD) 336 if (linkduplex > LINK_AUTOD)
@@ -593,8 +560,7 @@ static int slic_card_download(struct adapter *adapter)
593 file = "slicoss/gbdownload.sys"; 560 file = "slicoss/gbdownload.sys";
594 break; 561 break;
595 default: 562 default:
596 ASSERT(0); 563 return -ENOENT;
597 break;
598 } 564 }
599 ret = request_firmware(&fw, file, &adapter->pcidev->dev); 565 ret = request_firmware(&fw, file, &adapter->pcidev->dev);
600 if (ret) { 566 if (ret) {
@@ -604,7 +570,6 @@ static int slic_card_download(struct adapter *adapter)
604 } 570 }
605 numsects = *(u32 *)(fw->data + index); 571 numsects = *(u32 *)(fw->data + index);
606 index += 4; 572 index += 4;
607 ASSERT(numsects <= 3);
608 for (i = 0; i < numsects; i++) { 573 for (i = 0; i < numsects; i++) {
609 sectsize[i] = *(u32 *)(fw->data + index); 574 sectsize[i] = *(u32 *)(fw->data + index);
610 index += 4; 575 index += 4;
@@ -1060,8 +1025,6 @@ static void slic_upr_start(struct adapter *adapter)
1060 case SLIC_UPR_PING: 1025 case SLIC_UPR_PING:
1061 slic_reg32_write(&slic_regs->slic_ping, 1, FLUSH); 1026 slic_reg32_write(&slic_regs->slic_ping, 1, FLUSH);
1062 break; 1027 break;
1063 default:
1064 ASSERT(0);
1065 } 1028 }
1066} 1029}
1067 1030
@@ -1116,9 +1079,6 @@ static void slic_link_upr_complete(struct adapter *adapter, u32 isr)
1116 if (adapter->state != ADAPT_UP) 1079 if (adapter->state != ADAPT_UP)
1117 return; 1080 return;
1118 1081
1119 ASSERT((adapter->devid == SLIC_1GB_DEVICE_ID)
1120 || (adapter->devid == SLIC_2GB_DEVICE_ID));
1121
1122 linkup = linkstatus & GIG_LINKUP ? LINK_UP : LINK_DOWN; 1082 linkup = linkstatus & GIG_LINKUP ? LINK_UP : LINK_DOWN;
1123 if (linkstatus & GIG_SPEED_1000) 1083 if (linkstatus & GIG_SPEED_1000)
1124 linkspeed = LINK_1000MB; 1084 linkspeed = LINK_1000MB;
@@ -1170,7 +1130,6 @@ static void slic_upr_request_complete(struct adapter *adapter, u32 isr)
1170 spin_lock_irqsave(&adapter->upr_lock.lock, adapter->upr_lock.flags); 1130 spin_lock_irqsave(&adapter->upr_lock.lock, adapter->upr_lock.flags);
1171 upr = adapter->upr_list; 1131 upr = adapter->upr_list;
1172 if (!upr) { 1132 if (!upr) {
1173 ASSERT(0);
1174 spin_unlock_irqrestore(&adapter->upr_lock.lock, 1133 spin_unlock_irqrestore(&adapter->upr_lock.lock,
1175 adapter->upr_lock.flags); 1134 adapter->upr_lock.flags);
1176 return; 1135 return;
@@ -1178,7 +1137,6 @@ static void slic_upr_request_complete(struct adapter *adapter, u32 isr)
1178 adapter->upr_list = upr->next; 1137 adapter->upr_list = upr->next;
1179 upr->next = NULL; 1138 upr->next = NULL;
1180 adapter->upr_busy = 0; 1139 adapter->upr_busy = 0;
1181 ASSERT(adapter->port == upr->adapter);
1182 switch (upr->upr_request) { 1140 switch (upr->upr_request) {
1183 case SLIC_UPR_STATS: 1141 case SLIC_UPR_STATS:
1184 { 1142 {
@@ -1260,23 +1218,9 @@ static void slic_upr_request_complete(struct adapter *adapter, u32 isr)
1260 break; 1218 break;
1261 case SLIC_UPR_RCONFIG: 1219 case SLIC_UPR_RCONFIG:
1262 break; 1220 break;
1263 case SLIC_UPR_RPHY:
1264 ASSERT(0);
1265 break;
1266 case SLIC_UPR_ENLB:
1267 ASSERT(0);
1268 break;
1269 case SLIC_UPR_ENCT:
1270 ASSERT(0);
1271 break;
1272 case SLIC_UPR_PDWN:
1273 ASSERT(0);
1274 break;
1275 case SLIC_UPR_PING: 1221 case SLIC_UPR_PING:
1276 card->pingstatus |= (isr & ISR_PINGDSMASK); 1222 card->pingstatus |= (isr & ISR_PINGDSMASK);
1277 break; 1223 break;
1278 default:
1279 ASSERT(0);
1280 } 1224 }
1281 kfree(upr); 1225 kfree(upr);
1282 slic_upr_start(adapter); 1226 slic_upr_start(adapter);
@@ -1292,7 +1236,6 @@ static void slic_config_get(struct adapter *adapter, u32 config,
1292 status = slic_upr_request(adapter, 1236 status = slic_upr_request(adapter,
1293 SLIC_UPR_RCONFIG, 1237 SLIC_UPR_RCONFIG,
1294 (u32) config, (u32) config_h, 0, 0); 1238 (u32) config, (u32) config_h, 0, 0);
1295 ASSERT(status == 0);
1296} 1239}
1297 1240
1298/* 1241/*
@@ -1422,7 +1365,6 @@ static int slic_rspqueue_init(struct adapter *adapter)
1422 __iomem struct slic_regs *slic_regs = adapter->slic_regs; 1365 __iomem struct slic_regs *slic_regs = adapter->slic_regs;
1423 u32 paddrh = 0; 1366 u32 paddrh = 0;
1424 1367
1425 ASSERT(adapter->state == ADAPT_DOWN);
1426 memset(rspq, 0, sizeof(struct slic_rspqueue)); 1368 memset(rspq, 0, sizeof(struct slic_rspqueue));
1427 1369
1428 rspq->num_pages = SLIC_RSPQ_PAGES_GB; 1370 rspq->num_pages = SLIC_RSPQ_PAGES_GB;
@@ -1439,14 +1381,6 @@ static int slic_rspqueue_init(struct adapter *adapter)
1439 } 1381 }
1440 /* FIXME: 1382 /* FIXME:
1441 * do we really need this assertions (4K PAGE_SIZE aligned addr)? */ 1383 * do we really need this assertions (4K PAGE_SIZE aligned addr)? */
1442#if 0
1443#ifndef CONFIG_X86_64
1444 ASSERT(((u32) rspq->vaddr[i] & 0xFFFFF000) ==
1445 (u32) rspq->vaddr[i]);
1446 ASSERT(((u32) rspq->paddr[i] & 0xFFFFF000) ==
1447 (u32) rspq->paddr[i]);
1448#endif
1449#endif
1450 memset(rspq->vaddr[i], 0, PAGE_SIZE); 1384 memset(rspq->vaddr[i], 0, PAGE_SIZE);
1451 1385
1452 if (paddrh == 0) { 1386 if (paddrh == 0) {
@@ -1475,18 +1409,9 @@ static struct slic_rspbuf *slic_rspqueue_getnext(struct adapter *adapter)
1475 return NULL; 1409 return NULL;
1476 1410
1477 buf = rspq->rspbuf; 1411 buf = rspq->rspbuf;
1478#if BITS_PER_LONG == 32
1479 ASSERT((buf->status & 0xFFFFFFE0) == 0);
1480#endif
1481 ASSERT(buf->hosthandle);
1482 if (++rspq->offset < SLIC_RSPQ_BUFSINPAGE) { 1412 if (++rspq->offset < SLIC_RSPQ_BUFSINPAGE) {
1483 rspq->rspbuf++; 1413 rspq->rspbuf++;
1484#if BITS_PER_LONG == 32
1485 ASSERT(((u32) rspq->rspbuf & 0xFFFFFFE0) ==
1486 (u32) rspq->rspbuf);
1487#endif
1488 } else { 1414 } else {
1489 ASSERT(rspq->offset == SLIC_RSPQ_BUFSINPAGE);
1490 slic_reg64_write(adapter, &adapter->slic_regs->slic_rbar64, 1415 slic_reg64_write(adapter, &adapter->slic_regs->slic_rbar64,
1491 (rspq->paddr[rspq->pageindex] | SLIC_RSPQ_BUFSINPAGE), 1416 (rspq->paddr[rspq->pageindex] | SLIC_RSPQ_BUFSINPAGE),
1492 &adapter->slic_regs->slic_addr_upper, 0, DONT_FLUSH); 1417 &adapter->slic_regs->slic_addr_upper, 0, DONT_FLUSH);
@@ -1494,22 +1419,9 @@ static struct slic_rspbuf *slic_rspqueue_getnext(struct adapter *adapter)
1494 rspq->offset = 0; 1419 rspq->offset = 0;
1495 rspq->rspbuf = (struct slic_rspbuf *) 1420 rspq->rspbuf = (struct slic_rspbuf *)
1496 rspq->vaddr[rspq->pageindex]; 1421 rspq->vaddr[rspq->pageindex];
1497#if BITS_PER_LONG == 32
1498 ASSERT(((u32) rspq->rspbuf & 0xFFFFF000) ==
1499 (u32) rspq->rspbuf);
1500#endif
1501 } 1422 }
1502#if BITS_PER_LONG == 32
1503 ASSERT(((u32) buf & 0xFFFFFFE0) == (u32) buf);
1504#endif
1505 return buf;
1506}
1507
1508static void slic_cmdqmem_init(struct adapter *adapter)
1509{
1510 struct slic_cmdqmem *cmdqmem = &adapter->cmdqmem;
1511 1423
1512 memset(cmdqmem, 0, sizeof(struct slic_cmdqmem)); 1424 return buf;
1513} 1425}
1514 1426
1515static void slic_cmdqmem_free(struct adapter *adapter) 1427static void slic_cmdqmem_free(struct adapter *adapter)
@@ -1540,9 +1452,7 @@ static u32 *slic_cmdqmem_addpage(struct adapter *adapter)
1540 &cmdqmem->dma_pages[cmdqmem->pagecnt]); 1452 &cmdqmem->dma_pages[cmdqmem->pagecnt]);
1541 if (!pageaddr) 1453 if (!pageaddr)
1542 return NULL; 1454 return NULL;
1543#if BITS_PER_LONG == 32 1455
1544 ASSERT(((u32) pageaddr & 0xFFFFF000) == (u32) pageaddr);
1545#endif
1546 cmdqmem->pages[cmdqmem->pagecnt] = pageaddr; 1456 cmdqmem->pages[cmdqmem->pagecnt] = pageaddr;
1547 cmdqmem->pagecnt++; 1457 cmdqmem->pagecnt++;
1548 return pageaddr; 1458 return pageaddr;
@@ -1598,11 +1508,6 @@ static void slic_cmdq_addcmdpage(struct adapter *adapter, u32 *page)
1598 (adapter->slic_handle_ix < 256)) { 1508 (adapter->slic_handle_ix < 256)) {
1599 /* Allocate and initialize a SLIC_HANDLE for this command */ 1509 /* Allocate and initialize a SLIC_HANDLE for this command */
1600 SLIC_GET_SLIC_HANDLE(adapter, pslic_handle); 1510 SLIC_GET_SLIC_HANDLE(adapter, pslic_handle);
1601 if (pslic_handle == NULL)
1602 ASSERT(0);
1603 ASSERT(pslic_handle ==
1604 &adapter->slic_handles[pslic_handle->token.
1605 handle_index]);
1606 pslic_handle->type = SLIC_HANDLE_CMD; 1511 pslic_handle->type = SLIC_HANDLE_CMD;
1607 pslic_handle->address = (void *) cmd; 1512 pslic_handle->address = (void *) cmd;
1608 pslic_handle->offset = (ushort) adapter->slic_handle_ix++; 1513 pslic_handle->offset = (ushort) adapter->slic_handle_ix++;
@@ -1641,20 +1546,16 @@ static int slic_cmdq_init(struct adapter *adapter)
1641 int i; 1546 int i;
1642 u32 *pageaddr; 1547 u32 *pageaddr;
1643 1548
1644 ASSERT(adapter->state == ADAPT_DOWN);
1645 memset(&adapter->cmdq_all, 0, sizeof(struct slic_cmdqueue)); 1549 memset(&adapter->cmdq_all, 0, sizeof(struct slic_cmdqueue));
1646 memset(&adapter->cmdq_free, 0, sizeof(struct slic_cmdqueue)); 1550 memset(&adapter->cmdq_free, 0, sizeof(struct slic_cmdqueue));
1647 memset(&adapter->cmdq_done, 0, sizeof(struct slic_cmdqueue)); 1551 memset(&adapter->cmdq_done, 0, sizeof(struct slic_cmdqueue));
1648 spin_lock_init(&adapter->cmdq_all.lock.lock); 1552 spin_lock_init(&adapter->cmdq_all.lock.lock);
1649 spin_lock_init(&adapter->cmdq_free.lock.lock); 1553 spin_lock_init(&adapter->cmdq_free.lock.lock);
1650 spin_lock_init(&adapter->cmdq_done.lock.lock); 1554 spin_lock_init(&adapter->cmdq_done.lock.lock);
1651 slic_cmdqmem_init(adapter); 1555 memset(&adapter->cmdqmem, 0, sizeof(struct slic_cmdqmem));
1652 adapter->slic_handle_ix = 1; 1556 adapter->slic_handle_ix = 1;
1653 for (i = 0; i < SLIC_CMDQ_INITPAGES; i++) { 1557 for (i = 0; i < SLIC_CMDQ_INITPAGES; i++) {
1654 pageaddr = slic_cmdqmem_addpage(adapter); 1558 pageaddr = slic_cmdqmem_addpage(adapter);
1655#if BITS_PER_LONG == 32
1656 ASSERT(((u32) pageaddr & 0xFFFFF000) == (u32) pageaddr);
1657#endif
1658 if (!pageaddr) { 1559 if (!pageaddr) {
1659 slic_cmdq_free(adapter); 1560 slic_cmdq_free(adapter);
1660 return -ENOMEM; 1561 return -ENOMEM;
@@ -1682,7 +1583,6 @@ static void slic_cmdq_reset(struct adapter *adapter)
1682 while (hcmd) { 1583 while (hcmd) {
1683 if (hcmd->busy) { 1584 if (hcmd->busy) {
1684 skb = hcmd->skb; 1585 skb = hcmd->skb;
1685 ASSERT(skb);
1686 hcmd->busy = 0; 1586 hcmd->busy = 0;
1687 hcmd->skb = NULL; 1587 hcmd->skb = NULL;
1688 dev_kfree_skb_irq(skb); 1588 dev_kfree_skb_irq(skb);
@@ -1718,7 +1618,6 @@ static void slic_cmdq_getdone(struct adapter *adapter)
1718 struct slic_cmdqueue *done_cmdq = &adapter->cmdq_done; 1618 struct slic_cmdqueue *done_cmdq = &adapter->cmdq_done;
1719 struct slic_cmdqueue *free_cmdq = &adapter->cmdq_free; 1619 struct slic_cmdqueue *free_cmdq = &adapter->cmdq_free;
1720 1620
1721 ASSERT(free_cmdq->head == NULL);
1722 spin_lock_irqsave(&done_cmdq->lock.lock, done_cmdq->lock.flags); 1621 spin_lock_irqsave(&done_cmdq->lock.lock, done_cmdq->lock.flags);
1723 1622
1724 free_cmdq->head = done_cmdq->head; 1623 free_cmdq->head = done_cmdq->head;
@@ -1884,7 +1783,6 @@ static int slic_rcvqueue_init(struct adapter *adapter)
1884 int i, count; 1783 int i, count;
1885 struct slic_rcvqueue *rcvq = &adapter->rcvqueue; 1784 struct slic_rcvqueue *rcvq = &adapter->rcvqueue;
1886 1785
1887 ASSERT(adapter->state == ADAPT_DOWN);
1888 rcvq->tail = NULL; 1786 rcvq->tail = NULL;
1889 rcvq->head = NULL; 1787 rcvq->head = NULL;
1890 rcvq->size = SLIC_RCVQ_ENTRIES; 1788 rcvq->size = SLIC_RCVQ_ENTRIES;
@@ -1913,7 +1811,6 @@ static struct sk_buff *slic_rcvqueue_getnext(struct adapter *adapter)
1913 if (rcvq->count) { 1811 if (rcvq->count) {
1914 skb = rcvq->head; 1812 skb = rcvq->head;
1915 rcvbuf = (struct slic_rcvbuf *)skb->head; 1813 rcvbuf = (struct slic_rcvbuf *)skb->head;
1916 ASSERT(rcvbuf);
1917 1814
1918 if (rcvbuf->status & IRHDDR_SVALID) { 1815 if (rcvbuf->status & IRHDDR_SVALID) {
1919 rcvq->head = rcvq->head->next; 1816 rcvq->head = rcvq->head->next;
@@ -1946,8 +1843,6 @@ static u32 slic_rcvqueue_reinsert(struct adapter *adapter, struct sk_buff *skb)
1946 struct slic_rcvbuf *rcvbuf = (struct slic_rcvbuf *)skb->head; 1843 struct slic_rcvbuf *rcvbuf = (struct slic_rcvbuf *)skb->head;
1947 struct device *dev; 1844 struct device *dev;
1948 1845
1949 ASSERT(skb->len == SLIC_RCVBUF_HEADSIZE);
1950
1951 paddr = (void *)pci_map_single(adapter->pcidev, skb->head, 1846 paddr = (void *)pci_map_single(adapter->pcidev, skb->head,
1952 SLIC_RCVQ_RCVBUFSIZE, PCI_DMA_FROMDEVICE); 1847 SLIC_RCVQ_RCVBUFSIZE, PCI_DMA_FROMDEVICE);
1953 rcvbuf->status = 0; 1848 rcvbuf->status = 0;
@@ -2019,7 +1914,6 @@ static int slic_debug_card_show(struct seq_file *seq, void *v)
2019 card->adapters_activated); 1914 card->adapters_activated);
2020 seq_printf(seq, " Allocated : %d\n", 1915 seq_printf(seq, " Allocated : %d\n",
2021 card->adapters_allocated); 1916 card->adapters_allocated);
2022 ASSERT(card->card_size <= SLIC_NBR_MACS);
2023 for (i = 0; i < card->card_size; i++) { 1917 for (i = 0; i < card->card_size; i++) {
2024 seq_printf(seq, 1918 seq_printf(seq,
2025 " MAC%d : %2.2X %2.2X %2.2X %2.2X %2.2X %2.2X\n", 1919 " MAC%d : %2.2X %2.2X %2.2X %2.2X %2.2X %2.2X\n",
@@ -2460,7 +2354,6 @@ static void slic_link_event_handler(struct adapter *adapter)
2460 (u32) &pshmem->linkstatus, /* no 4GB wrap guaranteed */ 2354 (u32) &pshmem->linkstatus, /* no 4GB wrap guaranteed */
2461 0, 0, 0); 2355 0, 0, 0);
2462#endif 2356#endif
2463 ASSERT(status == 0);
2464} 2357}
2465 2358
2466static void slic_init_cleanup(struct adapter *adapter) 2359static void slic_init_cleanup(struct adapter *adapter)
@@ -2524,8 +2417,6 @@ static void slic_mcast_set_list(struct net_device *dev)
2524 char *addresses; 2417 char *addresses;
2525 struct netdev_hw_addr *ha; 2418 struct netdev_hw_addr *ha;
2526 2419
2527 ASSERT(adapter);
2528
2529 netdev_for_each_mc_addr(ha, dev) { 2420 netdev_for_each_mc_addr(ha, dev) {
2530 addresses = (char *) &ha->addr; 2421 addresses = (char *) &ha->addr;
2531 status = slic_mcast_add_list(adapter, addresses); 2422 status = slic_mcast_add_list(adapter, addresses);
@@ -2612,8 +2503,6 @@ static void slic_xmit_fail(struct adapter *adapter,
2612 "xmit_start skb[%p] type[%x] No host commands " 2503 "xmit_start skb[%p] type[%x] No host commands "
2613 "available\n", skb, skb->pkt_type); 2504 "available\n", skb, skb->pkt_type);
2614 break; 2505 break;
2615 default:
2616 ASSERT(0);
2617 } 2506 }
2618 } 2507 }
2619 dev_kfree_skb(skb); 2508 dev_kfree_skb(skb);
@@ -2725,7 +2614,6 @@ static void slic_rcv_handler(struct adapter *adapter)
2725 while ((skb = slic_rcvqueue_getnext(adapter))) { 2614 while ((skb = slic_rcvqueue_getnext(adapter))) {
2726 u32 rx_bytes; 2615 u32 rx_bytes;
2727 2616
2728 ASSERT(skb->head);
2729 rcvbuf = (struct slic_rcvbuf *)skb->head; 2617 rcvbuf = (struct slic_rcvbuf *)skb->head;
2730 adapter->card->events++; 2618 adapter->card->events++;
2731 if (rcvbuf->status & IRHDDR_ERR) { 2619 if (rcvbuf->status & IRHDDR_ERR) {
@@ -2781,16 +2669,11 @@ static void slic_xmit_complete(struct adapter *adapter)
2781 Get the complete host command buffer 2669 Get the complete host command buffer
2782 */ 2670 */
2783 slic_handle_word.handle_token = rspbuf->hosthandle; 2671 slic_handle_word.handle_token = rspbuf->hosthandle;
2784 ASSERT(slic_handle_word.handle_index);
2785 ASSERT(slic_handle_word.handle_index <= SLIC_CMDQ_MAXCMDS);
2786 hcmd = 2672 hcmd =
2787 (struct slic_hostcmd *) 2673 (struct slic_hostcmd *)
2788 adapter->slic_handles[slic_handle_word.handle_index]. 2674 adapter->slic_handles[slic_handle_word.handle_index].
2789 address; 2675 address;
2790/* hcmd = (struct slic_hostcmd *) rspbuf->hosthandle; */ 2676/* hcmd = (struct slic_hostcmd *) rspbuf->hosthandle; */
2791 ASSERT(hcmd);
2792 ASSERT(hcmd->pslic_handle ==
2793 &adapter->slic_handles[slic_handle_word.handle_index]);
2794 if (hcmd->type == SLIC_CMD_DUMB) { 2677 if (hcmd->type == SLIC_CMD_DUMB) {
2795 if (hcmd->skb) 2678 if (hcmd->skb)
2796 dev_kfree_skb_irq(hcmd->skb); 2679 dev_kfree_skb_irq(hcmd->skb);
@@ -2884,9 +2767,6 @@ static irqreturn_t slic_interrupt(int irq, void *dev_id)
2884 slic_upr_request_complete(adapter, isr); 2767 slic_upr_request_complete(adapter, isr);
2885 } 2768 }
2886 break; 2769 break;
2887
2888 default:
2889 break;
2890 } 2770 }
2891 2771
2892 adapter->isrcopy = 0; 2772 adapter->isrcopy = 0;
@@ -2911,7 +2791,6 @@ static netdev_tx_t slic_xmit_start(struct sk_buff *skb, struct net_device *dev)
2911 void *offloadcmd = NULL; 2791 void *offloadcmd = NULL;
2912 2792
2913 card = adapter->card; 2793 card = adapter->card;
2914 ASSERT(card);
2915 if ((adapter->linkstate != LINK_UP) || 2794 if ((adapter->linkstate != LINK_UP) ||
2916 (adapter->state != ADAPT_UP) || (card->state != CARD_UP)) { 2795 (adapter->state != ADAPT_UP) || (card->state != CARD_UP)) {
2917 status = XMIT_FAIL_LINK_STATE; 2796 status = XMIT_FAIL_LINK_STATE;
@@ -2929,9 +2808,6 @@ static netdev_tx_t slic_xmit_start(struct sk_buff *skb, struct net_device *dev)
2929 status = XMIT_FAIL_HOSTCMD_FAIL; 2808 status = XMIT_FAIL_HOSTCMD_FAIL;
2930 goto xmit_fail; 2809 goto xmit_fail;
2931 } 2810 }
2932 ASSERT(hcmd->pslic_handle);
2933 ASSERT(hcmd->cmd64.hosthandle ==
2934 hcmd->pslic_handle->token.handle_token);
2935 hcmd->skb = skb; 2811 hcmd->skb = skb;
2936 hcmd->busy = 1; 2812 hcmd->busy = 1;
2937 hcmd->type = SLIC_CMD_DUMB; 2813 hcmd->type = SLIC_CMD_DUMB;
@@ -3024,8 +2900,6 @@ static int slic_if_init(struct adapter *adapter)
3024 struct slic_shmem *pshmem; 2900 struct slic_shmem *pshmem;
3025 int rc; 2901 int rc;
3026 2902
3027 ASSERT(card);
3028
3029 /* adapter should be down at this point */ 2903 /* adapter should be down at this point */
3030 if (adapter->state != ADAPT_DOWN) { 2904 if (adapter->state != ADAPT_DOWN) {
3031 dev_err(&dev->dev, "%s: adapter->state != ADAPT_DOWN\n", 2905 dev_err(&dev->dev, "%s: adapter->state != ADAPT_DOWN\n",
@@ -3033,7 +2907,6 @@ static int slic_if_init(struct adapter *adapter)
3033 rc = -EIO; 2907 rc = -EIO;
3034 goto err; 2908 goto err;
3035 } 2909 }
3036 ASSERT(adapter->linkstate == LINK_DOWN);
3037 2910
3038 adapter->devflags_prev = dev->flags; 2911 adapter->devflags_prev = dev->flags;
3039 adapter->macopts = MAC_DIRECTED; 2912 adapter->macopts = MAC_DIRECTED;
@@ -3133,9 +3006,6 @@ static int slic_entry_open(struct net_device *dev)
3133 struct sliccard *card = adapter->card; 3006 struct sliccard *card = adapter->card;
3134 int status; 3007 int status;
3135 3008
3136 ASSERT(adapter);
3137 ASSERT(card);
3138
3139 netif_stop_queue(adapter->netdev); 3009 netif_stop_queue(adapter->netdev);
3140 3010
3141 spin_lock_irqsave(&slic_global.driver_lock.lock, 3011 spin_lock_irqsave(&slic_global.driver_lock.lock,
@@ -3176,7 +3046,7 @@ static void slic_card_cleanup(struct sliccard *card)
3176 kfree(card); 3046 kfree(card);
3177} 3047}
3178 3048
3179static void __devexit slic_entry_remove(struct pci_dev *pcidev) 3049static void slic_entry_remove(struct pci_dev *pcidev)
3180{ 3050{
3181 struct net_device *dev = pci_get_drvdata(pcidev); 3051 struct net_device *dev = pci_get_drvdata(pcidev);
3182 u32 mmio_start = 0; 3052 u32 mmio_start = 0;
@@ -3202,9 +3072,7 @@ static void __devexit slic_entry_remove(struct pci_dev *pcidev)
3202 mlist = mlist->next; 3072 mlist = mlist->next;
3203 kfree(mcaddr); 3073 kfree(mcaddr);
3204 } 3074 }
3205 ASSERT(adapter->card);
3206 card = adapter->card; 3075 card = adapter->card;
3207 ASSERT(card->adapters_allocated);
3208 card->adapters_allocated--; 3076 card->adapters_allocated--;
3209 adapter->allocated = 0; 3077 adapter->allocated = 0;
3210 if (!card->adapters_allocated) { 3078 if (!card->adapters_allocated) {
@@ -3214,10 +3082,8 @@ static void __devexit slic_entry_remove(struct pci_dev *pcidev)
3214 } else { 3082 } else {
3215 while (curr_card->next != card) 3083 while (curr_card->next != card)
3216 curr_card = curr_card->next; 3084 curr_card = curr_card->next;
3217 ASSERT(curr_card);
3218 curr_card->next = card->next; 3085 curr_card->next = card->next;
3219 } 3086 }
3220 ASSERT(slic_global.num_slic_cards);
3221 slic_global.num_slic_cards--; 3087 slic_global.num_slic_cards--;
3222 slic_card_cleanup(card); 3088 slic_card_cleanup(card);
3223 } 3089 }
@@ -3234,14 +3100,12 @@ static int slic_entry_halt(struct net_device *dev)
3234 3100
3235 spin_lock_irqsave(&slic_global.driver_lock.lock, 3101 spin_lock_irqsave(&slic_global.driver_lock.lock,
3236 slic_global.driver_lock.flags); 3102 slic_global.driver_lock.flags);
3237 ASSERT(card);
3238 netif_stop_queue(adapter->netdev); 3103 netif_stop_queue(adapter->netdev);
3239 adapter->state = ADAPT_DOWN; 3104 adapter->state = ADAPT_DOWN;
3240 adapter->linkstate = LINK_DOWN; 3105 adapter->linkstate = LINK_DOWN;
3241 adapter->upr_list = NULL; 3106 adapter->upr_list = NULL;
3242 adapter->upr_busy = 0; 3107 adapter->upr_busy = 0;
3243 adapter->devflags_prev = 0; 3108 adapter->devflags_prev = 0;
3244 ASSERT(card->adapter[adapter->cardindex] == adapter);
3245 slic_reg32_write(&slic_regs->slic_icr, ICR_INT_OFF, FLUSH); 3109 slic_reg32_write(&slic_regs->slic_icr, ICR_INT_OFF, FLUSH);
3246 adapter->all_reg_writes++; 3110 adapter->all_reg_writes++;
3247 adapter->icr_reg_writes++; 3111 adapter->icr_reg_writes++;
@@ -3273,7 +3137,6 @@ static struct net_device_stats *slic_get_stats(struct net_device *dev)
3273{ 3137{
3274 struct adapter *adapter = netdev_priv(dev); 3138 struct adapter *adapter = netdev_priv(dev);
3275 3139
3276 ASSERT(adapter);
3277 dev->stats.collisions = adapter->slic_stats.iface.xmit_collisions; 3140 dev->stats.collisions = adapter->slic_stats.iface.xmit_collisions;
3278 dev->stats.rx_errors = adapter->slic_stats.iface.rcv_errors; 3141 dev->stats.rx_errors = adapter->slic_stats.iface.rcv_errors;
3279 dev->stats.tx_errors = adapter->slic_stats.iface.xmt_errors; 3142 dev->stats.tx_errors = adapter->slic_stats.iface.xmt_errors;
@@ -3296,7 +3159,6 @@ static int slic_ioctl(struct net_device *dev, struct ifreq *rq, int cmd)
3296 u32 data[7]; 3159 u32 data[7];
3297 u32 intagg; 3160 u32 intagg;
3298 3161
3299 ASSERT(rq);
3300 switch (cmd) { 3162 switch (cmd) {
3301 case SIOCSLICSETINTAGG: 3163 case SIOCSLICSETINTAGG:
3302 if (copy_from_user(data, rq->ifr_data, 28)) 3164 if (copy_from_user(data, rq->ifr_data, 28))
@@ -3342,7 +3204,6 @@ static int slic_ioctl(struct net_device *dev, struct ifreq *rq, int cmd)
3342 } 3204 }
3343#endif 3205#endif
3344 case SIOCETHTOOL: 3206 case SIOCETHTOOL:
3345 ASSERT(adapter);
3346 if (copy_from_user(&ecmd, rq->ifr_data, sizeof(ecmd))) 3207 if (copy_from_user(&ecmd, rq->ifr_data, sizeof(ecmd)))
3347 return -EFAULT; 3208 return -EFAULT;
3348 3209
@@ -3682,7 +3543,6 @@ static void slic_init_adapter(struct net_device *netdev,
3682 /* 3543 /*
3683 Initialize slic_handle array 3544 Initialize slic_handle array
3684 */ 3545 */
3685 ASSERT(SLIC_CMDQ_MAXCMDS <= 0xFFFF);
3686 /* 3546 /*
3687 Start with 1. 0 is an invalid host handle. 3547 Start with 1. 0 is an invalid host handle.
3688 */ 3548 */
@@ -3699,8 +3559,6 @@ static void slic_init_adapter(struct net_device *netdev,
3699 sizeof(struct slic_shmem), 3559 sizeof(struct slic_shmem),
3700 &adapter-> 3560 &adapter->
3701 phys_shmem); 3561 phys_shmem);
3702 ASSERT(adapter->pshmem);
3703
3704 if (adapter->pshmem) 3562 if (adapter->pshmem)
3705 memset(adapter->pshmem, 0, sizeof(struct slic_shmem)); 3563 memset(adapter->pshmem, 0, sizeof(struct slic_shmem));
3706} 3564}
@@ -3775,11 +3633,9 @@ static u32 slic_card_locate(struct adapter *adapter)
3775 } 3633 }
3776 } 3634 }
3777 3635
3778 ASSERT(card);
3779 if (!card) 3636 if (!card)
3780 return -ENXIO; 3637 return -ENXIO;
3781 /* Put the adapter in the card's adapter list */ 3638 /* Put the adapter in the card's adapter list */
3782 ASSERT(card->adapter[adapter->port] == NULL);
3783 if (!card->adapter[adapter->port]) { 3639 if (!card->adapter[adapter->port]) {
3784 card->adapter[adapter->port] = adapter; 3640 card->adapter[adapter->port] = adapter;
3785 adapter->card = card; 3641 adapter->card = card;
@@ -3794,7 +3650,6 @@ static u32 slic_card_locate(struct adapter *adapter)
3794 else 3650 else
3795 break; 3651 break;
3796 } 3652 }
3797 ASSERT(i != SLIC_MAX_PORTS);
3798 if (physcard->adapter[i]->slotnumber == adapter->slotnumber) 3653 if (physcard->adapter[i]->slotnumber == adapter->slotnumber)
3799 break; 3654 break;
3800 physcard = physcard->next; 3655 physcard = physcard->next;
@@ -3802,7 +3657,11 @@ static u32 slic_card_locate(struct adapter *adapter)
3802 if (!physcard) { 3657 if (!physcard) {
3803 /* no structure allocated for this physical card yet */ 3658 /* no structure allocated for this physical card yet */
3804 physcard = kzalloc(sizeof(struct physcard), GFP_ATOMIC); 3659 physcard = kzalloc(sizeof(struct physcard), GFP_ATOMIC);
3805 ASSERT(physcard); 3660 if (!physcard) {
3661 if (card_hostid == SLIC_HOSTID_DEFAULT)
3662 kfree(card);
3663 return -ENOMEM;
3664 }
3806 3665
3807 physcard->next = slic_global.phys_card; 3666 physcard->next = slic_global.phys_card;
3808 slic_global.phys_card = physcard; 3667 slic_global.phys_card = physcard;
@@ -3813,14 +3672,13 @@ static u32 slic_card_locate(struct adapter *adapter)
3813 /* Note - this is ZERO relative */ 3672 /* Note - this is ZERO relative */
3814 adapter->physport = physcard->adapters_allocd - 1; 3673 adapter->physport = physcard->adapters_allocd - 1;
3815 3674
3816 ASSERT(physcard->adapter[adapter->physport] == NULL);
3817 physcard->adapter[adapter->physport] = adapter; 3675 physcard->adapter[adapter->physport] = adapter;
3818 adapter->physcard = physcard; 3676 adapter->physcard = physcard;
3819 3677
3820 return 0; 3678 return 0;
3821} 3679}
3822 3680
3823static int __devinit slic_entry_probe(struct pci_dev *pcidev, 3681static int slic_entry_probe(struct pci_dev *pcidev,
3824 const struct pci_device_id *pci_tbl_entry) 3682 const struct pci_device_id *pci_tbl_entry)
3825{ 3683{
3826 static int cards_found; 3684 static int cards_found;
@@ -3962,7 +3820,7 @@ static struct pci_driver slic_driver = {
3962 .name = DRV_NAME, 3820 .name = DRV_NAME,
3963 .id_table = slic_pci_tbl, 3821 .id_table = slic_pci_tbl,
3964 .probe = slic_entry_probe, 3822 .probe = slic_entry_probe,
3965 .remove = __devexit_p(slic_entry_remove), 3823 .remove = slic_entry_remove,
3966}; 3824};
3967 3825
3968static int __init slic_module_init(void) 3826static int __init slic_module_init(void)
diff --git a/drivers/staging/sm7xxfb/sm7xxfb.c b/drivers/staging/sm7xxfb/sm7xxfb.c
index f27182d4dea6..0764bbbfd497 100644
--- a/drivers/staging/sm7xxfb/sm7xxfb.c
+++ b/drivers/staging/sm7xxfb/sm7xxfb.c
@@ -768,7 +768,7 @@ static inline void sm7xx_init_hw(void)
768 outb_p(0x11, 0x3c5); 768 outb_p(0x11, 0x3c5);
769} 769}
770 770
771static int __devinit smtcfb_pci_probe(struct pci_dev *pdev, 771static int smtcfb_pci_probe(struct pci_dev *pdev,
772 const struct pci_device_id *ent) 772 const struct pci_device_id *ent)
773{ 773{
774 struct smtcfb_info *sfb; 774 struct smtcfb_info *sfb;
@@ -928,7 +928,7 @@ static DEFINE_PCI_DEVICE_TABLE(smtcfb_pci_table) = {
928 {0,} 928 {0,}
929}; 929};
930 930
931static void __devexit smtcfb_pci_remove(struct pci_dev *pdev) 931static void smtcfb_pci_remove(struct pci_dev *pdev)
932{ 932{
933 struct smtcfb_info *sfb; 933 struct smtcfb_info *sfb;
934 934
@@ -1027,7 +1027,7 @@ static struct pci_driver smtcfb_driver = {
1027 .name = "smtcfb", 1027 .name = "smtcfb",
1028 .id_table = smtcfb_pci_table, 1028 .id_table = smtcfb_pci_table,
1029 .probe = smtcfb_pci_probe, 1029 .probe = smtcfb_pci_probe,
1030 .remove = __devexit_p(smtcfb_pci_remove), 1030 .remove = smtcfb_pci_remove,
1031 .driver.pm = SM7XX_PM_OPS, 1031 .driver.pm = SM7XX_PM_OPS,
1032}; 1032};
1033 1033
diff --git a/drivers/staging/ste_rmi4/synaptics_i2c_rmi4.c b/drivers/staging/ste_rmi4/synaptics_i2c_rmi4.c
index 277491a877ea..299f51810199 100644
--- a/drivers/staging/ste_rmi4/synaptics_i2c_rmi4.c
+++ b/drivers/staging/ste_rmi4/synaptics_i2c_rmi4.c
@@ -31,6 +31,7 @@
31#include <linux/interrupt.h> 31#include <linux/interrupt.h>
32#include <linux/regulator/consumer.h> 32#include <linux/regulator/consumer.h>
33#include <linux/module.h> 33#include <linux/module.h>
34#include <linux/input/mt.h>
34#include "synaptics_i2c_rmi4.h" 35#include "synaptics_i2c_rmi4.h"
35 36
36/* TODO: for multiple device support will need a per-device mutex */ 37/* TODO: for multiple device support will need a per-device mutex */
@@ -67,7 +68,6 @@
67#define PDT_START_SCAN_LOCATION (0x00E9) 68#define PDT_START_SCAN_LOCATION (0x00E9)
68#define PDT_END_SCAN_LOCATION (0x000A) 69#define PDT_END_SCAN_LOCATION (0x000A)
69#define PDT_ENTRY_SIZE (0x0006) 70#define PDT_ENTRY_SIZE (0x0006)
70#define RMI4_NUMBER_OF_MAX_FINGERS (8)
71#define SYNAPTICS_RMI4_TOUCHPAD_FUNC_NUM (0x11) 71#define SYNAPTICS_RMI4_TOUCHPAD_FUNC_NUM (0x11)
72#define SYNAPTICS_RMI4_DEVICE_CONTROL_FUNC_NUM (0x01) 72#define SYNAPTICS_RMI4_DEVICE_CONTROL_FUNC_NUM (0x01)
73 73
@@ -164,6 +164,7 @@ struct synaptics_rmi4_device_info {
164 * @regulator: pointer to the regulator structure 164 * @regulator: pointer to the regulator structure
165 * @wait: wait queue structure variable 165 * @wait: wait queue structure variable
166 * @touch_stopped: flag to stop the thread function 166 * @touch_stopped: flag to stop the thread function
167 * @fingers_supported: maximum supported fingers
167 * 168 *
168 * This structure gives the device data information. 169 * This structure gives the device data information.
169 */ 170 */
@@ -184,6 +185,7 @@ struct synaptics_rmi4_data {
184 struct regulator *regulator; 185 struct regulator *regulator;
185 wait_queue_head_t wait; 186 wait_queue_head_t wait;
186 bool touch_stopped; 187 bool touch_stopped;
188 unsigned char fingers_supported;
187}; 189};
188 190
189/** 191/**
@@ -303,22 +305,21 @@ static int synpatics_rmi4_touchpad_report(struct synaptics_rmi4_data *pdata,
303 /* number of touch points - fingers down in this case */ 305 /* number of touch points - fingers down in this case */
304 int touch_count = 0; 306 int touch_count = 0;
305 int finger; 307 int finger;
306 int fingers_supported;
307 int finger_registers; 308 int finger_registers;
308 int reg; 309 int reg;
309 int finger_shift; 310 int finger_shift;
310 int finger_status; 311 int finger_status;
311 int retval; 312 int retval;
313 int x, y;
314 int wx, wy;
312 unsigned short data_base_addr; 315 unsigned short data_base_addr;
313 unsigned short data_offset; 316 unsigned short data_offset;
314 unsigned char data_reg_blk_size; 317 unsigned char data_reg_blk_size;
315 unsigned char values[2]; 318 unsigned char values[2];
316 unsigned char data[DATA_LEN]; 319 unsigned char data[DATA_LEN];
317 int x[RMI4_NUMBER_OF_MAX_FINGERS]; 320 unsigned char fingers_supported = pdata->fingers_supported;
318 int y[RMI4_NUMBER_OF_MAX_FINGERS];
319 int wx[RMI4_NUMBER_OF_MAX_FINGERS];
320 int wy[RMI4_NUMBER_OF_MAX_FINGERS];
321 struct i2c_client *client = pdata->i2c_client; 321 struct i2c_client *client = pdata->i2c_client;
322 struct input_dev *input_dev = pdata->input_dev;
322 323
323 /* get 2D sensor finger data */ 324 /* get 2D sensor finger data */
324 /* 325 /*
@@ -333,7 +334,6 @@ static int synpatics_rmi4_touchpad_report(struct synaptics_rmi4_data *pdata,
333 * 10 = finger present but data may not be accurate, 334 * 10 = finger present but data may not be accurate,
334 * 11 = reserved for product use. 335 * 11 = reserved for product use.
335 */ 336 */
336 fingers_supported = rfi->num_of_data_points;
337 finger_registers = (fingers_supported + 3)/4; 337 finger_registers = (fingers_supported + 3)/4;
338 data_base_addr = rfi->fn_desc.data_base_addr; 338 data_base_addr = rfi->fn_desc.data_base_addr;
339 retval = synaptics_rmi4_i2c_block_read(pdata, data_base_addr, values, 339 retval = synaptics_rmi4_i2c_block_read(pdata, data_base_addr, values,
@@ -358,7 +358,11 @@ static int synpatics_rmi4_touchpad_report(struct synaptics_rmi4_data *pdata,
358 * if finger status indicates a finger is present then 358 * if finger status indicates a finger is present then
359 * read the finger data and report it 359 * read the finger data and report it
360 */ 360 */
361 if (finger_status == 1 || finger_status == 2) { 361 input_mt_slot(input_dev, finger);
362 input_mt_report_slot_state(input_dev, MT_TOOL_FINGER,
363 finger_status != 0);
364
365 if (finger_status) {
362 /* Read the finger data */ 366 /* Read the finger data */
363 data_offset = data_base_addr + 367 data_offset = data_base_addr +
364 ((finger * data_reg_blk_size) + 368 ((finger * data_reg_blk_size) +
@@ -367,50 +371,33 @@ static int synpatics_rmi4_touchpad_report(struct synaptics_rmi4_data *pdata,
367 data_offset, data, 371 data_offset, data,
368 data_reg_blk_size); 372 data_reg_blk_size);
369 if (retval != data_reg_blk_size) { 373 if (retval != data_reg_blk_size) {
370 printk(KERN_ERR "%s:read data failed\n", 374 dev_err(&client->dev, "%s:read data failed\n",
371 __func__); 375 __func__);
372 return 0; 376 return 0;
373 } else {
374 x[touch_count] =
375 (data[0] << 4) | (data[2] & MASK_4BIT);
376 y[touch_count] =
377 (data[1] << 4) |
378 ((data[2] >> 4) & MASK_4BIT);
379 wy[touch_count] =
380 (data[3] >> 4) & MASK_4BIT;
381 wx[touch_count] =
382 (data[3] & MASK_4BIT);
383
384 if (pdata->board->x_flip)
385 x[touch_count] =
386 pdata->sensor_max_x -
387 x[touch_count];
388 if (pdata->board->y_flip)
389 y[touch_count] =
390 pdata->sensor_max_y -
391 y[touch_count];
392 } 377 }
378 x = (data[0] << 4) | (data[2] & MASK_4BIT);
379 y = (data[1] << 4) | ((data[2] >> 4) & MASK_4BIT);
380 wy = (data[3] >> 4) & MASK_4BIT;
381 wx = (data[3] & MASK_4BIT);
382
383 if (pdata->board->x_flip)
384 x = pdata->sensor_max_x - x;
385 if (pdata->board->y_flip)
386 y = pdata->sensor_max_y - y;
387
388 input_report_abs(input_dev, ABS_MT_TOUCH_MAJOR,
389 max(wx, wy));
390 input_report_abs(input_dev, ABS_MT_POSITION_X, x);
391 input_report_abs(input_dev, ABS_MT_POSITION_Y, y);
392
393 /* number of active touch points */ 393 /* number of active touch points */
394 touch_count++; 394 touch_count++;
395 } 395 }
396 } 396 }
397 397
398 /* report to input subsystem */
399 if (touch_count) {
400 for (finger = 0; finger < touch_count; finger++) {
401 input_report_abs(pdata->input_dev, ABS_MT_TOUCH_MAJOR,
402 max(wx[finger] , wy[finger]));
403 input_report_abs(pdata->input_dev, ABS_MT_POSITION_X,
404 x[finger]);
405 input_report_abs(pdata->input_dev, ABS_MT_POSITION_Y,
406 y[finger]);
407 input_mt_sync(pdata->input_dev);
408 }
409 } else
410 input_mt_sync(pdata->input_dev);
411
412 /* sync after groups of events */ 398 /* sync after groups of events */
413 input_sync(pdata->input_dev); 399 input_mt_sync_frame(input_dev);
400 input_sync(input_dev);
414 /* return the number of touch points */ 401 /* return the number of touch points */
415 return touch_count; 402 return touch_count;
416} 403}
@@ -575,6 +562,7 @@ static int synpatics_rmi4_touchpad_detect(struct synaptics_rmi4_data *pdata,
575 if ((queries[1] & MASK_3BIT) == 5) 562 if ((queries[1] & MASK_3BIT) == 5)
576 rfi->num_of_data_points = 10; 563 rfi->num_of_data_points = 10;
577 } 564 }
565 pdata->fingers_supported = rfi->num_of_data_points;
578 /* Need to get interrupt info for handling interrupts */ 566 /* Need to get interrupt info for handling interrupts */
579 rfi->index_to_intr_reg = (interruptcount + 7)/8; 567 rfi->index_to_intr_reg = (interruptcount + 7)/8;
580 if (rfi->index_to_intr_reg != 0) 568 if (rfi->index_to_intr_reg != 0)
@@ -891,7 +879,7 @@ static int synaptics_rmi4_i2c_query_device(struct synaptics_rmi4_data *pdata)
891 * the rmi4 Physical Device Table and enumerate any rmi4 functions that 879 * the rmi4 Physical Device Table and enumerate any rmi4 functions that
892 * have data sources associated with them. 880 * have data sources associated with them.
893 */ 881 */
894static int __devinit synaptics_rmi4_probe 882static int synaptics_rmi4_probe
895 (struct i2c_client *client, const struct i2c_device_id *dev_id) 883 (struct i2c_client *client, const struct i2c_device_id *dev_id)
896{ 884{
897 int retval; 885 int retval;
@@ -988,6 +976,8 @@ static int __devinit synaptics_rmi4_probe
988 rmi4_data->sensor_max_y, 0, 0); 976 rmi4_data->sensor_max_y, 0, 0);
989 input_set_abs_params(rmi4_data->input_dev, ABS_MT_TOUCH_MAJOR, 0, 977 input_set_abs_params(rmi4_data->input_dev, ABS_MT_TOUCH_MAJOR, 0,
990 MAX_TOUCH_MAJOR, 0, 0); 978 MAX_TOUCH_MAJOR, 0, 0);
979 input_mt_init_slots(rmi4_data->input_dev,
980 rmi4_data->fingers_supported, 0);
991 981
992 /* Clear interrupts */ 982 /* Clear interrupts */
993 synaptics_rmi4_i2c_block_read(rmi4_data, 983 synaptics_rmi4_i2c_block_read(rmi4_data,
@@ -1032,7 +1022,7 @@ err_input:
1032 * This function uses to remove the i2c-client 1022 * This function uses to remove the i2c-client
1033 * touchscreen driver and returns integer. 1023 * touchscreen driver and returns integer.
1034 */ 1024 */
1035static int __devexit synaptics_rmi4_remove(struct i2c_client *client) 1025static int synaptics_rmi4_remove(struct i2c_client *client)
1036{ 1026{
1037 struct synaptics_rmi4_data *rmi4_data = i2c_get_clientdata(client); 1027 struct synaptics_rmi4_data *rmi4_data = i2c_get_clientdata(client);
1038 const struct synaptics_rmi4_platform_data *pdata = rmi4_data->board; 1028 const struct synaptics_rmi4_platform_data *pdata = rmi4_data->board;
@@ -1140,33 +1130,11 @@ static struct i2c_driver synaptics_rmi4_driver = {
1140#endif 1130#endif
1141 }, 1131 },
1142 .probe = synaptics_rmi4_probe, 1132 .probe = synaptics_rmi4_probe,
1143 .remove = __devexit_p(synaptics_rmi4_remove), 1133 .remove = synaptics_rmi4_remove,
1144 .id_table = synaptics_rmi4_id_table, 1134 .id_table = synaptics_rmi4_id_table,
1145}; 1135};
1146/**
1147 * synaptics_rmi4_init() - Initialize the touchscreen driver
1148 *
1149 * This function uses to initializes the synaptics
1150 * touchscreen driver and returns integer.
1151 */
1152static int __init synaptics_rmi4_init(void)
1153{
1154 return i2c_add_driver(&synaptics_rmi4_driver);
1155}
1156/**
1157 * synaptics_rmi4_exit() - De-initialize the touchscreen driver
1158 *
1159 * This function uses to de-initialize the synaptics
1160 * touchscreen driver and returns none.
1161 */
1162static void __exit synaptics_rmi4_exit(void)
1163{
1164 i2c_del_driver(&synaptics_rmi4_driver);
1165}
1166
1167 1136
1168module_init(synaptics_rmi4_init); 1137module_i2c_driver(synaptics_rmi4_driver);
1169module_exit(synaptics_rmi4_exit);
1170 1138
1171MODULE_LICENSE("GPL v2"); 1139MODULE_LICENSE("GPL v2");
1172MODULE_AUTHOR("naveen.gaddipati@stericsson.com, js.ha@stericsson.com"); 1140MODULE_AUTHOR("naveen.gaddipati@stericsson.com, js.ha@stericsson.com");
diff --git a/drivers/staging/telephony/Kconfig b/drivers/staging/telephony/Kconfig
deleted file mode 100644
index b5f78b6ed2bd..000000000000
--- a/drivers/staging/telephony/Kconfig
+++ /dev/null
@@ -1,47 +0,0 @@
1#
2# Telephony device configuration
3#
4
5menuconfig PHONE
6 tristate "Telephony support"
7 depends on HAS_IOMEM
8 ---help---
9 Say Y here if you have a telephony card, which for example allows
10 you to use a regular phone for voice-over-IP applications.
11
12 Note: this has nothing to do with modems. You do not need to say Y
13 here in order to be able to use a modem under Linux.
14
15 To compile this driver as a module, choose M here: the
16 module will be called phonedev.
17
18if PHONE
19
20config PHONE_IXJ
21 tristate "QuickNet Internet LineJack/PhoneJack support"
22 depends on ISA || PCI
23 ---help---
24 Say M if you have a telephony card manufactured by Quicknet
25 Technologies, Inc. These include the Internet PhoneJACK and
26 Internet LineJACK Telephony Cards. You will get a module called
27 ixj.
28
29 For the ISA versions of these products, you can configure the
30 cards using the isapnp tools (pnpdump/isapnp) or you can use the
31 isapnp support. Please read <file:Documentation/telephony/ixj.txt>.
32
33 For more information on these cards, see Quicknet's web site at:
34 <http://www.quicknet.net/>.
35
36 If you do not have any Quicknet telephony cards, you can safely
37 say N here.
38
39config PHONE_IXJ_PCMCIA
40 tristate "QuickNet Internet LineJack/PhoneJack PCMCIA support"
41 depends on PHONE_IXJ && PCMCIA
42 help
43 Say Y here to configure in PCMCIA service support for the Quicknet
44 cards manufactured by Quicknet Technologies, Inc. This changes the
45 card initialization code to work with the card manager daemon.
46
47endif # PHONE
diff --git a/drivers/staging/telephony/Makefile b/drivers/staging/telephony/Makefile
deleted file mode 100644
index 1206615d69e4..000000000000
--- a/drivers/staging/telephony/Makefile
+++ /dev/null
@@ -1,7 +0,0 @@
1#
2# Makefile for drivers/telephony
3#
4
5obj-$(CONFIG_PHONE) += phonedev.o
6obj-$(CONFIG_PHONE_IXJ) += ixj.o
7obj-$(CONFIG_PHONE_IXJ_PCMCIA) += ixj_pcmcia.o
diff --git a/drivers/staging/telephony/TODO b/drivers/staging/telephony/TODO
deleted file mode 100644
index d47dec3508d7..000000000000
--- a/drivers/staging/telephony/TODO
+++ /dev/null
@@ -1,10 +0,0 @@
1TODO
2. Determine if the boards are still in use
3 and move this module back to drivers/telephony if necessary
4. Coding style cleanups
5
6Please send patches to Greg Kroah-Hartman <greg@kroah.com> and
7cc Joe Perches <joe@perches.com> if the module should be reactivated.
8
9If no module activity occurs before version 3.6 is released, this
10module should be removed.
diff --git a/drivers/staging/telephony/ixj-ver.h b/drivers/staging/telephony/ixj-ver.h
deleted file mode 100644
index 2031ac6c888c..000000000000
--- a/drivers/staging/telephony/ixj-ver.h
+++ /dev/null
@@ -1,4 +0,0 @@
1/* configuration management identifiers */
2#define IXJ_VER_MAJOR 1
3#define IXJ_VER_MINOR 0
4#define IXJ_BLD_VER 1
diff --git a/drivers/staging/telephony/ixj.c b/drivers/staging/telephony/ixj.c
deleted file mode 100644
index 1cfa0b07d725..000000000000
--- a/drivers/staging/telephony/ixj.c
+++ /dev/null
@@ -1,10571 +0,0 @@
1/****************************************************************************
2 * ixj.c
3 *
4 * Device Driver for Quicknet Technologies, Inc.'s Telephony cards
5 * including the Internet PhoneJACK, Internet PhoneJACK Lite,
6 * Internet PhoneJACK PCI, Internet LineJACK, Internet PhoneCARD and
7 * SmartCABLE
8 *
9 * (c) Copyright 1999-2001 Quicknet Technologies, Inc.
10 *
11 * This program is free software; you can redistribute it and/or
12 * modify it under the terms of the GNU General Public License
13 * as published by the Free Software Foundation; either version
14 * 2 of the License, or (at your option) any later version.
15 *
16 * Author: Ed Okerson, <eokerson@quicknet.net>
17 *
18 * Contributors: Greg Herlein, <gherlein@quicknet.net>
19 * David W. Erhart, <derhart@quicknet.net>
20 * John Sellers, <jsellers@quicknet.net>
21 * Mike Preston, <mpreston@quicknet.net>
22 *
23 * Fixes: David Huggins-Daines, <dhd@cepstral.com>
24 * Fabio Ferrari, <fabio.ferrari@digitro.com.br>
25 * Artis Kugevics, <artis@mt.lv>
26 * Daniele Bellucci, <bellucda@tiscali.it>
27 *
28 * More information about the hardware related to this driver can be found
29 * at our website: http://www.quicknet.net
30 *
31 * IN NO EVENT SHALL QUICKNET TECHNOLOGIES, INC. BE LIABLE TO ANY PARTY FOR
32 * DIRECT, INDIRECT, SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES ARISING OUT
33 * OF THE USE OF THIS SOFTWARE AND ITS DOCUMENTATION, EVEN IF QUICKNET
34 * TECHNOLOGIES, INC. HAS BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
35 *
36 * QUICKNET TECHNOLOGIES, INC. SPECIFICALLY DISCLAIMS ANY WARRANTIES,
37 * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY
38 * AND FITNESS FOR A PARTICULAR PURPOSE. THE SOFTWARE PROVIDED HEREUNDER IS
39 * ON AN "AS IS" BASIS, AND QUICKNET TECHNOLOGIES, INC. HAS NO OBLIGATION
40 * TO PROVIDE MAINTENANCE, SUPPORT, UPDATES, ENHANCEMENTS, OR MODIFICATIONS.
41 *
42 ***************************************************************************/
43
44/*
45 * Revision 4.8 2003/07/09 19:39:00 Daniele Bellucci
46 * Audit some copy_*_user and minor cleanup.
47 *
48 * Revision 4.7 2001/08/13 06:19:33 craigs
49 * Added additional changes from Alan Cox and John Anderson for
50 * 2.2 to 2.4 cleanup and bounds checking
51 *
52 * Revision 4.6 2001/08/13 01:05:05 craigs
53 * Really fixed PHONE_QUERY_CODEC problem this time
54 *
55 * Revision 4.5 2001/08/13 00:11:03 craigs
56 * Fixed problem in handling of PHONE_QUERY_CODEC, thanks to Shane Anderson
57 *
58 * Revision 4.4 2001/08/07 07:58:12 craigs
59 * Changed back to three digit version numbers
60 * Added tagbuild target to allow automatic and easy tagging of versions
61 *
62 * Revision 4.3 2001/08/07 07:24:47 craigs
63 * Added ixj-ver.h to allow easy configuration management of driver
64 * Added display of version number in /prox/ixj
65 *
66 * Revision 4.2 2001/08/06 07:07:19 craigs
67 * Reverted IXJCTL_DSP_TYPE and IXJCTL_DSP_VERSION files to original
68 * behaviour of returning int rather than short *
69 *
70 * Revision 4.1 2001/08/05 00:17:37 craigs
71 * More changes for correct PCMCIA installation
72 * Start of changes for backward Linux compatibility
73 *
74 * Revision 4.0 2001/08/04 12:33:12 craigs
75 * New version using GNU autoconf
76 *
77 * Revision 3.105 2001/07/20 23:14:32 eokerson
78 * More work on CallerID generation when using ring cadences.
79 *
80 * Revision 3.104 2001/07/06 01:33:55 eokerson
81 * Some bugfixes from Robert Vojta <vojta@ipex.cz> and a few mods to the Makefile.
82 *
83 * Revision 3.103 2001/07/05 19:20:16 eokerson
84 * Updated HOWTO
85 * Changed mic gain to 30dB on Internet LineJACK mic/speaker port.
86 *
87 * Revision 3.102 2001/07/03 23:51:21 eokerson
88 * Un-mute mic on Internet LineJACK when in speakerphone mode.
89 *
90 * Revision 3.101 2001/07/02 19:26:56 eokerson
91 * Removed initialiazation of ixjdebug and ixj_convert_loaded so they will go in the .bss instead of the .data
92 *
93 * Revision 3.100 2001/07/02 19:18:27 eokerson
94 * Changed driver to make dynamic allocation possible. We now pass IXJ * between functions instead of array indexes.
95 * Fixed the way the POTS and PSTN ports interact during a PSTN call to allow local answering.
96 * Fixed speaker mode on Internet LineJACK.
97 *
98 * Revision 3.99 2001/05/09 14:11:16 eokerson
99 * Fixed kmalloc error in ixj_build_filter_cadence. Thanks David Chan <cat@waulogy.stanford.edu>.
100 *
101 * Revision 3.98 2001/05/08 19:55:33 eokerson
102 * Fixed POTS hookstate detection while it is connected to PSTN port.
103 *
104 * Revision 3.97 2001/05/08 00:01:04 eokerson
105 * Fixed kernel oops when sending caller ID data.
106 *
107 * Revision 3.96 2001/05/04 23:09:30 eokerson
108 * Now uses one kernel timer for each card, instead of one for the entire driver.
109 *
110 * Revision 3.95 2001/04/25 22:06:47 eokerson
111 * Fixed squawking at beginning of some G.723.1 calls.
112 *
113 * Revision 3.94 2001/04/03 23:42:00 eokerson
114 * Added linear volume ioctls
115 * Added raw filter load ioctl
116 *
117 * Revision 3.93 2001/02/27 01:00:06 eokerson
118 * Fixed blocking in CallerID.
119 * Reduced size of ixj structure for smaller driver footprint.
120 *
121 * Revision 3.92 2001/02/20 22:02:59 eokerson
122 * Fixed isapnp and pcmcia module compatibility for 2.4.x kernels.
123 * Improved PSTN ring detection.
124 * Fixed wink generation on POTS ports.
125 *
126 * Revision 3.91 2001/02/13 00:55:44 eokerson
127 * Turn AEC back on after changing frame sizes.
128 *
129 * Revision 3.90 2001/02/12 16:42:00 eokerson
130 * Added ALAW codec, thanks to Fabio Ferrari for the table based converters to make ALAW from ULAW.
131 *
132 * Revision 3.89 2001/02/12 15:41:16 eokerson
133 * Fix from Artis Kugevics - Tone gains were not being set correctly.
134 *
135 * Revision 3.88 2001/02/05 23:25:42 eokerson
136 * Fixed lockup bugs with deregister.
137 *
138 * Revision 3.87 2001/01/29 21:00:39 eokerson
139 * Fix from Fabio Ferrari <fabio.ferrari@digitro.com.br> to properly handle EAGAIN and EINTR during non-blocking write.
140 * Updated copyright date.
141 *
142 * Revision 3.86 2001/01/23 23:53:46 eokerson
143 * Fixes to G.729 compatibility.
144 *
145 * Revision 3.85 2001/01/23 21:30:36 eokerson
146 * Added verbage about cards supported.
147 * Removed commands that put the card in low power mode at some times that it should not be in low power mode.
148 *
149 * Revision 3.84 2001/01/22 23:32:10 eokerson
150 * Some bugfixes from David Huggins-Daines, <dhd@cepstral.com> and other cleanups.
151 *
152 * Revision 3.83 2001/01/19 14:51:41 eokerson
153 * Fixed ixj_WriteDSPCommand to decrement usage counter when command fails.
154 *
155 * Revision 3.82 2001/01/19 00:34:49 eokerson
156 * Added verbosity to write overlap errors.
157 *
158 * Revision 3.81 2001/01/18 23:56:54 eokerson
159 * Fixed PSTN line test functions.
160 *
161 * Revision 3.80 2001/01/18 22:29:27 eokerson
162 * Updated AEC/AGC values for different cards.
163 *
164 * Revision 3.79 2001/01/17 02:58:54 eokerson
165 * Fixed AEC reset after Caller ID.
166 * Fixed Codec lockup after Caller ID on Call Waiting when not using 30ms frames.
167 *
168 * Revision 3.78 2001/01/16 19:43:09 eokerson
169 * Added support for Linux 2.4.x kernels.
170 *
171 * Revision 3.77 2001/01/09 04:00:52 eokerson
172 * Linetest will now test the line, even if it has previously succeeded.
173 *
174 * Revision 3.76 2001/01/08 19:27:00 eokerson
175 * Fixed problem with standard cable on Internet PhoneCARD.
176 *
177 * Revision 3.75 2000/12/22 16:52:14 eokerson
178 * Modified to allow hookstate detection on the POTS port when the PSTN port is selected.
179 *
180 * Revision 3.74 2000/12/08 22:41:50 eokerson
181 * Added capability for G729B.
182 *
183 * Revision 3.73 2000/12/07 23:35:16 eokerson
184 * Added capability to have different ring pattern before CallerID data.
185 * Added hookstate checks in CallerID routines to stop FSK.
186 *
187 * Revision 3.72 2000/12/06 19:31:31 eokerson
188 * Modified signal behavior to only send one signal per event.
189 *
190 * Revision 3.71 2000/12/06 03:23:08 eokerson
191 * Fixed CallerID on Call Waiting.
192 *
193 * Revision 3.70 2000/12/04 21:29:37 eokerson
194 * Added checking to Smart Cable gain functions.
195 *
196 * Revision 3.69 2000/12/04 21:05:20 eokerson
197 * Changed ixjdebug levels.
198 * Added ioctls to change gains in Internet Phone CARD Smart Cable.
199 *
200 * Revision 3.68 2000/12/04 00:17:21 craigs
201 * Changed mixer voice gain to +6dB rather than 0dB
202 *
203 * Revision 3.67 2000/11/30 21:25:51 eokerson
204 * Fixed write signal errors.
205 *
206 * Revision 3.66 2000/11/29 22:42:44 eokerson
207 * Fixed PSTN ring detect problems.
208 *
209 * Revision 3.65 2000/11/29 07:31:55 craigs
210 * Added new 425Hz filter co-efficients
211 * Added card-specific DTMF prescaler initialisation
212 *
213 * Revision 3.64 2000/11/28 14:03:32 craigs
214 * Changed certain mixer initialisations to be 0dB rather than 12dB
215 * Added additional information to /proc/ixj
216 *
217 * Revision 3.63 2000/11/28 11:38:41 craigs
218 * Added display of AEC modes in AUTO and AGC mode
219 *
220 * Revision 3.62 2000/11/28 04:05:44 eokerson
221 * Improved PSTN ring detection routine.
222 *
223 * Revision 3.61 2000/11/27 21:53:12 eokerson
224 * Fixed flash detection.
225 *
226 * Revision 3.60 2000/11/27 15:57:29 eokerson
227 * More work on G.729 load routines.
228 *
229 * Revision 3.59 2000/11/25 21:55:12 eokerson
230 * Fixed errors in G.729 load routine.
231 *
232 * Revision 3.58 2000/11/25 04:08:29 eokerson
233 * Added board locks around G.729 and TS85 load routines.
234 *
235 * Revision 3.57 2000/11/24 05:35:17 craigs
236 * Added ability to retrieve mixer values on LineJACK
237 * Added complete initialisation of all mixer values at startup
238 * Fixed spelling mistake
239 *
240 * Revision 3.56 2000/11/23 02:52:11 robertj
241 * Added cvs change log keyword.
242 * Fixed bug in capabilities list when using G.729 module.
243 *
244 */
245
246#include "ixj-ver.h"
247
248#define PERFMON_STATS
249#define IXJDEBUG 0
250#define MAXRINGS 5
251
252#include <linux/module.h>
253
254#include <linux/init.h>
255#include <linux/sched.h>
256#include <linux/kernel.h> /* printk() */
257#include <linux/fs.h> /* everything... */
258#include <linux/errno.h> /* error codes */
259#include <linux/slab.h>
260#include <linux/mutex.h>
261#include <linux/mm.h>
262#include <linux/ioport.h>
263#include <linux/interrupt.h>
264#include <linux/proc_fs.h>
265#include <linux/poll.h>
266#include <linux/timer.h>
267#include <linux/delay.h>
268#include <linux/pci.h>
269
270#include <asm/io.h>
271#include <asm/uaccess.h>
272
273#include <linux/isapnp.h>
274
275#include "ixj.h"
276
277#define TYPE(inode) (iminor(inode) >> 4)
278#define NUM(inode) (iminor(inode) & 0xf)
279
280static DEFINE_MUTEX(ixj_mutex);
281static int ixjdebug;
282static int hertz = HZ;
283static int samplerate = 100;
284
285module_param(ixjdebug, int, 0);
286
287static DEFINE_PCI_DEVICE_TABLE(ixj_pci_tbl) = {
288 { PCI_VENDOR_ID_QUICKNET, PCI_DEVICE_ID_QUICKNET_XJ,
289 PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0},
290 { }
291};
292MODULE_DEVICE_TABLE(pci, ixj_pci_tbl);
293
294/************************************************************************
295*
296* ixjdebug meanings are now bit mapped instead of level based
297* Values can be or'ed together to turn on multiple messages
298*
299* bit 0 (0x0001) = any failure
300* bit 1 (0x0002) = general messages
301* bit 2 (0x0004) = POTS ringing related
302* bit 3 (0x0008) = PSTN events
303* bit 4 (0x0010) = PSTN Cadence state details
304* bit 5 (0x0020) = Tone detection triggers
305* bit 6 (0x0040) = Tone detection cadence details
306* bit 7 (0x0080) = ioctl tracking
307* bit 8 (0x0100) = signal tracking
308* bit 9 (0x0200) = CallerID generation details
309*
310************************************************************************/
311
312#ifdef IXJ_DYN_ALLOC
313
314static IXJ *ixj[IXJMAX];
315#define get_ixj(b) ixj[(b)]
316
317/*
318 * Allocate a free IXJ device
319 */
320
321static IXJ *ixj_alloc()
322{
323 for(cnt=0; cnt<IXJMAX; cnt++)
324 {
325 if(ixj[cnt] == NULL || !ixj[cnt]->DSPbase)
326 {
327 j = kmalloc(sizeof(IXJ), GFP_KERNEL);
328 if (j == NULL)
329 return NULL;
330 ixj[cnt] = j;
331 return j;
332 }
333 }
334 return NULL;
335}
336
337static void ixj_fsk_free(IXJ *j)
338{
339 kfree(j->fskdata);
340 j->fskdata = NULL;
341}
342
343static void ixj_fsk_alloc(IXJ *j)
344{
345 if(!j->fskdata) {
346 j->fskdata = kmalloc(8000, GFP_KERNEL);
347 if (!j->fskdata) {
348 if(ixjdebug & 0x0200) {
349 printk("IXJ phone%d - allocate failed\n", j->board);
350 }
351 return;
352 } else {
353 j->fsksize = 8000;
354 if(ixjdebug & 0x0200) {
355 printk("IXJ phone%d - allocate succeeded\n", j->board);
356 }
357 }
358 }
359}
360
361#else
362
363static IXJ ixj[IXJMAX];
364#define get_ixj(b) (&ixj[(b)])
365
366/*
367 * Allocate a free IXJ device
368 */
369
370static IXJ *ixj_alloc(void)
371{
372 int cnt;
373 for(cnt=0; cnt<IXJMAX; cnt++) {
374 if(!ixj[cnt].DSPbase)
375 return &ixj[cnt];
376 }
377 return NULL;
378}
379
380static inline void ixj_fsk_free(IXJ *j) {;}
381
382static inline void ixj_fsk_alloc(IXJ *j)
383{
384 j->fsksize = 8000;
385}
386
387#endif
388
389#ifdef PERFMON_STATS
390#define ixj_perfmon(x) ((x)++)
391#else
392#define ixj_perfmon(x) do { } while(0)
393#endif
394
395static int ixj_convert_loaded;
396
397static int ixj_WriteDSPCommand(unsigned short, IXJ *j);
398
399/************************************************************************
400*
401* These are function definitions to allow external modules to register
402* enhanced functionality call backs.
403*
404************************************************************************/
405
406static int Stub(IXJ * J, unsigned long arg)
407{
408 return 0;
409}
410
411static IXJ_REGFUNC ixj_PreRead = &Stub;
412static IXJ_REGFUNC ixj_PostRead = &Stub;
413static IXJ_REGFUNC ixj_PreWrite = &Stub;
414static IXJ_REGFUNC ixj_PostWrite = &Stub;
415
416static void ixj_read_frame(IXJ *j);
417static void ixj_write_frame(IXJ *j);
418static void ixj_init_timer(IXJ *j);
419static void ixj_add_timer(IXJ * j);
420static void ixj_timeout(unsigned long ptr);
421static int read_filters(IXJ *j);
422static int LineMonitor(IXJ *j);
423static int ixj_fasync(int fd, struct file *, int mode);
424static int ixj_set_port(IXJ *j, int arg);
425static int ixj_set_pots(IXJ *j, int arg);
426static int ixj_hookstate(IXJ *j);
427static int ixj_record_start(IXJ *j);
428static void ixj_record_stop(IXJ *j);
429static void set_rec_volume(IXJ *j, int volume);
430static int get_rec_volume(IXJ *j);
431static int set_rec_codec(IXJ *j, int rate);
432static void ixj_vad(IXJ *j, int arg);
433static int ixj_play_start(IXJ *j);
434static void ixj_play_stop(IXJ *j);
435static int ixj_set_tone_on(unsigned short arg, IXJ *j);
436static int ixj_set_tone_off(unsigned short, IXJ *j);
437static int ixj_play_tone(IXJ *j, char tone);
438static void ixj_aec_start(IXJ *j, int level);
439static int idle(IXJ *j);
440static void ixj_ring_on(IXJ *j);
441static void ixj_ring_off(IXJ *j);
442static void aec_stop(IXJ *j);
443static void ixj_ringback(IXJ *j);
444static void ixj_busytone(IXJ *j);
445static void ixj_dialtone(IXJ *j);
446static void ixj_cpt_stop(IXJ *j);
447static char daa_int_read(IXJ *j);
448static char daa_CR_read(IXJ *j, int cr);
449static int daa_set_mode(IXJ *j, int mode);
450static int ixj_linetest(IXJ *j);
451static int ixj_daa_write(IXJ *j);
452static int ixj_daa_cid_read(IXJ *j);
453static void DAA_Coeff_US(IXJ *j);
454static void DAA_Coeff_UK(IXJ *j);
455static void DAA_Coeff_France(IXJ *j);
456static void DAA_Coeff_Germany(IXJ *j);
457static void DAA_Coeff_Australia(IXJ *j);
458static void DAA_Coeff_Japan(IXJ *j);
459static int ixj_init_filter(IXJ *j, IXJ_FILTER * jf);
460static int ixj_init_filter_raw(IXJ *j, IXJ_FILTER_RAW * jfr);
461static int ixj_init_tone(IXJ *j, IXJ_TONE * ti);
462static int ixj_build_cadence(IXJ *j, IXJ_CADENCE __user * cp);
463static int ixj_build_filter_cadence(IXJ *j, IXJ_FILTER_CADENCE __user * cp);
464/* Serial Control Interface funtions */
465static int SCI_Control(IXJ *j, int control);
466static int SCI_Prepare(IXJ *j);
467static int SCI_WaitHighSCI(IXJ *j);
468static int SCI_WaitLowSCI(IXJ *j);
469static DWORD PCIEE_GetSerialNumber(WORD wAddress);
470static int ixj_PCcontrol_wait(IXJ *j);
471static void ixj_pre_cid(IXJ *j);
472static void ixj_write_cid(IXJ *j);
473static void ixj_write_cid_bit(IXJ *j, int bit);
474static int set_base_frame(IXJ *j, int size);
475static int set_play_codec(IXJ *j, int rate);
476static void set_rec_depth(IXJ *j, int depth);
477static int ixj_mixer(long val, IXJ *j);
478
479/************************************************************************
480CT8020/CT8021 Host Programmers Model
481Host address Function Access
482DSPbase +
4830-1 Aux Software Status Register (reserved) Read Only
4842-3 Software Status Register Read Only
4854-5 Aux Software Control Register (reserved) Read Write
4866-7 Software Control Register Read Write
4878-9 Hardware Status Register Read Only
488A-B Hardware Control Register Read Write
489C-D Host Transmit (Write) Data Buffer Access Port (buffer input)Write Only
490E-F Host Receive (Read) Data Buffer Access Port (buffer input) Read Only
491************************************************************************/
492
493static inline void ixj_read_HSR(IXJ *j)
494{
495 j->hsr.bytes.low = inb_p(j->DSPbase + 8);
496 j->hsr.bytes.high = inb_p(j->DSPbase + 9);
497}
498
499static inline int IsControlReady(IXJ *j)
500{
501 ixj_read_HSR(j);
502 return j->hsr.bits.controlrdy ? 1 : 0;
503}
504
505static inline int IsPCControlReady(IXJ *j)
506{
507 j->pccr1.byte = inb_p(j->XILINXbase + 3);
508 return j->pccr1.bits.crr ? 1 : 0;
509}
510
511static inline int IsStatusReady(IXJ *j)
512{
513 ixj_read_HSR(j);
514 return j->hsr.bits.statusrdy ? 1 : 0;
515}
516
517static inline int IsRxReady(IXJ *j)
518{
519 ixj_read_HSR(j);
520 ixj_perfmon(j->rxreadycheck);
521 return j->hsr.bits.rxrdy ? 1 : 0;
522}
523
524static inline int IsTxReady(IXJ *j)
525{
526 ixj_read_HSR(j);
527 ixj_perfmon(j->txreadycheck);
528 return j->hsr.bits.txrdy ? 1 : 0;
529}
530
531static inline void set_play_volume(IXJ *j, int volume)
532{
533 if (ixjdebug & 0x0002)
534 printk(KERN_INFO "IXJ: /dev/phone%d Setting Play Volume to 0x%4.4x\n", j->board, volume);
535 ixj_WriteDSPCommand(0xCF02, j);
536 ixj_WriteDSPCommand(volume, j);
537}
538
539static int set_play_volume_linear(IXJ *j, int volume)
540{
541 int newvolume, dspplaymax;
542
543 if (ixjdebug & 0x0002)
544 printk(KERN_INFO "IXJ: /dev/phone %d Setting Linear Play Volume to 0x%4.4x\n", j->board, volume);
545 if(volume > 100 || volume < 0) {
546 return -1;
547 }
548
549 /* This should normalize the perceived volumes between the different cards caused by differences in the hardware */
550 switch (j->cardtype) {
551 case QTI_PHONEJACK:
552 dspplaymax = 0x380;
553 break;
554 case QTI_LINEJACK:
555 if(j->port == PORT_PSTN) {
556 dspplaymax = 0x48;
557 } else {
558 dspplaymax = 0x100;
559 }
560 break;
561 case QTI_PHONEJACK_LITE:
562 dspplaymax = 0x380;
563 break;
564 case QTI_PHONEJACK_PCI:
565 dspplaymax = 0x6C;
566 break;
567 case QTI_PHONECARD:
568 dspplaymax = 0x50;
569 break;
570 default:
571 return -1;
572 }
573 newvolume = (dspplaymax * volume) / 100;
574 set_play_volume(j, newvolume);
575 return 0;
576}
577
578static inline void set_play_depth(IXJ *j, int depth)
579{
580 if (depth > 60)
581 depth = 60;
582 if (depth < 0)
583 depth = 0;
584 ixj_WriteDSPCommand(0x5280 + depth, j);
585}
586
587static inline int get_play_volume(IXJ *j)
588{
589 ixj_WriteDSPCommand(0xCF00, j);
590 return j->ssr.high << 8 | j->ssr.low;
591}
592
593static int get_play_volume_linear(IXJ *j)
594{
595 int volume, newvolume, dspplaymax;
596
597 /* This should normalize the perceived volumes between the different cards caused by differences in the hardware */
598 switch (j->cardtype) {
599 case QTI_PHONEJACK:
600 dspplaymax = 0x380;
601 break;
602 case QTI_LINEJACK:
603 if(j->port == PORT_PSTN) {
604 dspplaymax = 0x48;
605 } else {
606 dspplaymax = 0x100;
607 }
608 break;
609 case QTI_PHONEJACK_LITE:
610 dspplaymax = 0x380;
611 break;
612 case QTI_PHONEJACK_PCI:
613 dspplaymax = 0x6C;
614 break;
615 case QTI_PHONECARD:
616 dspplaymax = 100;
617 break;
618 default:
619 return -1;
620 }
621 volume = get_play_volume(j);
622 newvolume = (volume * 100) / dspplaymax;
623 if(newvolume > 100)
624 newvolume = 100;
625 return newvolume;
626}
627
628static inline BYTE SLIC_GetState(IXJ *j)
629{
630 if (j->cardtype == QTI_PHONECARD) {
631 j->pccr1.byte = 0;
632 j->psccr.bits.dev = 3;
633 j->psccr.bits.rw = 1;
634 outw_p(j->psccr.byte << 8, j->XILINXbase + 0x00);
635 ixj_PCcontrol_wait(j);
636 j->pslic.byte = inw_p(j->XILINXbase + 0x00) & 0xFF;
637 ixj_PCcontrol_wait(j);
638 if (j->pslic.bits.powerdown)
639 return PLD_SLIC_STATE_OC;
640 else if (!j->pslic.bits.ring0 && !j->pslic.bits.ring1)
641 return PLD_SLIC_STATE_ACTIVE;
642 else
643 return PLD_SLIC_STATE_RINGING;
644 } else {
645 j->pld_slicr.byte = inb_p(j->XILINXbase + 0x01);
646 }
647 return j->pld_slicr.bits.state;
648}
649
650static bool SLIC_SetState(BYTE byState, IXJ *j)
651{
652 bool fRetVal = false;
653
654 if (j->cardtype == QTI_PHONECARD) {
655 if (j->flags.pcmciasct) {
656 switch (byState) {
657 case PLD_SLIC_STATE_TIPOPEN:
658 case PLD_SLIC_STATE_OC:
659 j->pslic.bits.powerdown = 1;
660 j->pslic.bits.ring0 = j->pslic.bits.ring1 = 0;
661 fRetVal = true;
662 break;
663 case PLD_SLIC_STATE_RINGING:
664 if (j->readers || j->writers) {
665 j->pslic.bits.powerdown = 0;
666 j->pslic.bits.ring0 = 1;
667 j->pslic.bits.ring1 = 0;
668 fRetVal = true;
669 }
670 break;
671 case PLD_SLIC_STATE_OHT: /* On-hook transmit */
672
673 case PLD_SLIC_STATE_STANDBY:
674 case PLD_SLIC_STATE_ACTIVE:
675 if (j->readers || j->writers) {
676 j->pslic.bits.powerdown = 0;
677 } else {
678 j->pslic.bits.powerdown = 1;
679 }
680 j->pslic.bits.ring0 = j->pslic.bits.ring1 = 0;
681 fRetVal = true;
682 break;
683 case PLD_SLIC_STATE_APR: /* Active polarity reversal */
684
685 case PLD_SLIC_STATE_OHTPR: /* OHT polarity reversal */
686
687 default:
688 fRetVal = false;
689 break;
690 }
691 j->psccr.bits.dev = 3;
692 j->psccr.bits.rw = 0;
693 outw_p(j->psccr.byte << 8 | j->pslic.byte, j->XILINXbase + 0x00);
694 ixj_PCcontrol_wait(j);
695 }
696 } else {
697 /* Set the C1, C2, C3 & B2EN signals. */
698 switch (byState) {
699 case PLD_SLIC_STATE_OC:
700 j->pld_slicw.bits.c1 = 0;
701 j->pld_slicw.bits.c2 = 0;
702 j->pld_slicw.bits.c3 = 0;
703 j->pld_slicw.bits.b2en = 0;
704 outb_p(j->pld_slicw.byte, j->XILINXbase + 0x01);
705 fRetVal = true;
706 break;
707 case PLD_SLIC_STATE_RINGING:
708 j->pld_slicw.bits.c1 = 1;
709 j->pld_slicw.bits.c2 = 0;
710 j->pld_slicw.bits.c3 = 0;
711 j->pld_slicw.bits.b2en = 1;
712 outb_p(j->pld_slicw.byte, j->XILINXbase + 0x01);
713 fRetVal = true;
714 break;
715 case PLD_SLIC_STATE_ACTIVE:
716 j->pld_slicw.bits.c1 = 0;
717 j->pld_slicw.bits.c2 = 1;
718 j->pld_slicw.bits.c3 = 0;
719 j->pld_slicw.bits.b2en = 0;
720 outb_p(j->pld_slicw.byte, j->XILINXbase + 0x01);
721 fRetVal = true;
722 break;
723 case PLD_SLIC_STATE_OHT: /* On-hook transmit */
724
725 j->pld_slicw.bits.c1 = 1;
726 j->pld_slicw.bits.c2 = 1;
727 j->pld_slicw.bits.c3 = 0;
728 j->pld_slicw.bits.b2en = 0;
729 outb_p(j->pld_slicw.byte, j->XILINXbase + 0x01);
730 fRetVal = true;
731 break;
732 case PLD_SLIC_STATE_TIPOPEN:
733 j->pld_slicw.bits.c1 = 0;
734 j->pld_slicw.bits.c2 = 0;
735 j->pld_slicw.bits.c3 = 1;
736 j->pld_slicw.bits.b2en = 0;
737 outb_p(j->pld_slicw.byte, j->XILINXbase + 0x01);
738 fRetVal = true;
739 break;
740 case PLD_SLIC_STATE_STANDBY:
741 j->pld_slicw.bits.c1 = 1;
742 j->pld_slicw.bits.c2 = 0;
743 j->pld_slicw.bits.c3 = 1;
744 j->pld_slicw.bits.b2en = 1;
745 outb_p(j->pld_slicw.byte, j->XILINXbase + 0x01);
746 fRetVal = true;
747 break;
748 case PLD_SLIC_STATE_APR: /* Active polarity reversal */
749
750 j->pld_slicw.bits.c1 = 0;
751 j->pld_slicw.bits.c2 = 1;
752 j->pld_slicw.bits.c3 = 1;
753 j->pld_slicw.bits.b2en = 0;
754 outb_p(j->pld_slicw.byte, j->XILINXbase + 0x01);
755 fRetVal = true;
756 break;
757 case PLD_SLIC_STATE_OHTPR: /* OHT polarity reversal */
758
759 j->pld_slicw.bits.c1 = 1;
760 j->pld_slicw.bits.c2 = 1;
761 j->pld_slicw.bits.c3 = 1;
762 j->pld_slicw.bits.b2en = 0;
763 outb_p(j->pld_slicw.byte, j->XILINXbase + 0x01);
764 fRetVal = true;
765 break;
766 default:
767 fRetVal = false;
768 break;
769 }
770 }
771
772 return fRetVal;
773}
774
775static int ixj_wink(IXJ *j)
776{
777 BYTE slicnow;
778
779 slicnow = SLIC_GetState(j);
780
781 j->pots_winkstart = jiffies;
782 SLIC_SetState(PLD_SLIC_STATE_OC, j);
783
784 msleep(jiffies_to_msecs(j->winktime));
785
786 SLIC_SetState(slicnow, j);
787 return 0;
788}
789
790static void ixj_init_timer(IXJ *j)
791{
792 init_timer(&j->timer);
793 j->timer.function = ixj_timeout;
794 j->timer.data = (unsigned long)j;
795}
796
797static void ixj_add_timer(IXJ *j)
798{
799 j->timer.expires = jiffies + (hertz / samplerate);
800 add_timer(&j->timer);
801}
802
803static void ixj_tone_timeout(IXJ *j)
804{
805 IXJ_TONE ti;
806
807 j->tone_state++;
808 if (j->tone_state == 3) {
809 j->tone_state = 0;
810 if (j->cadence_t) {
811 j->tone_cadence_state++;
812 if (j->tone_cadence_state >= j->cadence_t->elements_used) {
813 switch (j->cadence_t->termination) {
814 case PLAY_ONCE:
815 ixj_cpt_stop(j);
816 break;
817 case REPEAT_LAST_ELEMENT:
818 j->tone_cadence_state--;
819 ixj_play_tone(j, j->cadence_t->ce[j->tone_cadence_state].index);
820 break;
821 case REPEAT_ALL:
822 j->tone_cadence_state = 0;
823 if (j->cadence_t->ce[j->tone_cadence_state].freq0) {
824 ti.tone_index = j->cadence_t->ce[j->tone_cadence_state].index;
825 ti.freq0 = j->cadence_t->ce[j->tone_cadence_state].freq0;
826 ti.gain0 = j->cadence_t->ce[j->tone_cadence_state].gain0;
827 ti.freq1 = j->cadence_t->ce[j->tone_cadence_state].freq1;
828 ti.gain1 = j->cadence_t->ce[j->tone_cadence_state].gain1;
829 ixj_init_tone(j, &ti);
830 }
831 ixj_set_tone_on(j->cadence_t->ce[0].tone_on_time, j);
832 ixj_set_tone_off(j->cadence_t->ce[0].tone_off_time, j);
833 ixj_play_tone(j, j->cadence_t->ce[0].index);
834 break;
835 }
836 } else {
837 if (j->cadence_t->ce[j->tone_cadence_state].gain0) {
838 ti.tone_index = j->cadence_t->ce[j->tone_cadence_state].index;
839 ti.freq0 = j->cadence_t->ce[j->tone_cadence_state].freq0;
840 ti.gain0 = j->cadence_t->ce[j->tone_cadence_state].gain0;
841 ti.freq1 = j->cadence_t->ce[j->tone_cadence_state].freq1;
842 ti.gain1 = j->cadence_t->ce[j->tone_cadence_state].gain1;
843 ixj_init_tone(j, &ti);
844 }
845 ixj_set_tone_on(j->cadence_t->ce[j->tone_cadence_state].tone_on_time, j);
846 ixj_set_tone_off(j->cadence_t->ce[j->tone_cadence_state].tone_off_time, j);
847 ixj_play_tone(j, j->cadence_t->ce[j->tone_cadence_state].index);
848 }
849 }
850 }
851}
852
853static inline void ixj_kill_fasync(IXJ *j, IXJ_SIGEVENT event, int dir)
854{
855 if(j->ixj_signals[event]) {
856 if(ixjdebug & 0x0100)
857 printk("Sending signal for event %d\n", event);
858 /* Send apps notice of change */
859 /* see config.h for macro definition */
860 kill_fasync(&(j->async_queue), j->ixj_signals[event], dir);
861 }
862}
863
864static void ixj_pstn_state(IXJ *j)
865{
866 int var;
867 union XOPXR0 XR0, daaint;
868
869 var = 10;
870
871 XR0.reg = j->m_DAAShadowRegs.XOP_REGS.XOP.xr0.reg;
872 daaint.reg = 0;
873 XR0.bitreg.RMR = j->m_DAAShadowRegs.SOP_REGS.SOP.cr1.bitreg.RMR;
874
875 j->pld_scrr.byte = inb_p(j->XILINXbase);
876 if (j->pld_scrr.bits.daaflag) {
877 daa_int_read(j);
878 if(j->m_DAAShadowRegs.XOP_REGS.XOP.xr0.bitreg.RING) {
879 if(time_after(jiffies, j->pstn_sleeptil) && !(j->flags.pots_pstn && j->hookstate)) {
880 daaint.bitreg.RING = 1;
881 if(ixjdebug & 0x0008) {
882 printk(KERN_INFO "IXJ DAA Ring Interrupt /dev/phone%d at %ld\n", j->board, jiffies);
883 }
884 } else {
885 daa_set_mode(j, SOP_PU_RESET);
886 }
887 }
888 if(j->m_DAAShadowRegs.XOP_REGS.XOP.xr0.bitreg.Caller_ID) {
889 daaint.bitreg.Caller_ID = 1;
890 j->pstn_cid_intr = 1;
891 j->pstn_cid_received = jiffies;
892 if(ixjdebug & 0x0008) {
893 printk(KERN_INFO "IXJ DAA Caller_ID Interrupt /dev/phone%d at %ld\n", j->board, jiffies);
894 }
895 }
896 if(j->m_DAAShadowRegs.XOP_REGS.XOP.xr0.bitreg.Cadence) {
897 daaint.bitreg.Cadence = 1;
898 if(ixjdebug & 0x0008) {
899 printk(KERN_INFO "IXJ DAA Cadence Interrupt /dev/phone%d at %ld\n", j->board, jiffies);
900 }
901 }
902 if(j->m_DAAShadowRegs.XOP_REGS.XOP.xr0.bitreg.VDD_OK != XR0.bitreg.VDD_OK) {
903 daaint.bitreg.VDD_OK = 1;
904 daaint.bitreg.SI_0 = j->m_DAAShadowRegs.XOP_REGS.XOP.xr0.bitreg.VDD_OK;
905 }
906 }
907 daa_CR_read(j, 1);
908 if(j->m_DAAShadowRegs.SOP_REGS.SOP.cr1.bitreg.RMR != XR0.bitreg.RMR && time_after(jiffies, j->pstn_sleeptil) && !(j->flags.pots_pstn && j->hookstate)) {
909 daaint.bitreg.RMR = 1;
910 daaint.bitreg.SI_1 = j->m_DAAShadowRegs.SOP_REGS.SOP.cr1.bitreg.RMR;
911 if(ixjdebug & 0x0008) {
912 printk(KERN_INFO "IXJ DAA RMR /dev/phone%d was %s for %ld\n", j->board, XR0.bitreg.RMR?"on":"off", jiffies - j->pstn_last_rmr);
913 }
914 j->pstn_prev_rmr = j->pstn_last_rmr;
915 j->pstn_last_rmr = jiffies;
916 }
917 switch(j->daa_mode) {
918 case SOP_PU_SLEEP:
919 if (daaint.bitreg.RING) {
920 if (!j->flags.pstn_ringing) {
921 if (j->daa_mode != SOP_PU_RINGING) {
922 j->pstn_ring_int = jiffies;
923 daa_set_mode(j, SOP_PU_RINGING);
924 }
925 }
926 }
927 break;
928 case SOP_PU_RINGING:
929 if (daaint.bitreg.RMR) {
930 if (ixjdebug & 0x0008) {
931 printk(KERN_INFO "IXJ Ring Cadence a state = %d /dev/phone%d at %ld\n", j->cadence_f[4].state, j->board, jiffies);
932 }
933 if (daaint.bitreg.SI_1) { /* Rising edge of RMR */
934 j->flags.pstn_rmr = 1;
935 j->pstn_ring_start = jiffies;
936 j->pstn_ring_stop = 0;
937 j->ex.bits.pstn_ring = 0;
938 if (j->cadence_f[4].state == 0) {
939 j->cadence_f[4].state = 1;
940 j->cadence_f[4].on1min = jiffies + (long)((j->cadence_f[4].on1 * hertz * (100 - var)) / 10000);
941 j->cadence_f[4].on1dot = jiffies + (long)((j->cadence_f[4].on1 * hertz * (100)) / 10000);
942 j->cadence_f[4].on1max = jiffies + (long)((j->cadence_f[4].on1 * hertz * (100 + var)) / 10000);
943 } else if (j->cadence_f[4].state == 2) {
944 if((time_after(jiffies, j->cadence_f[4].off1min) &&
945 time_before(jiffies, j->cadence_f[4].off1max))) {
946 if (j->cadence_f[4].on2) {
947 j->cadence_f[4].state = 3;
948 j->cadence_f[4].on2min = jiffies + (long)((j->cadence_f[4].on2 * (hertz * (100 - var)) / 10000));
949 j->cadence_f[4].on2dot = jiffies + (long)((j->cadence_f[4].on2 * (hertz * (100)) / 10000));
950 j->cadence_f[4].on2max = jiffies + (long)((j->cadence_f[4].on2 * (hertz * (100 + var)) / 10000));
951 } else {
952 j->cadence_f[4].state = 7;
953 }
954 } else {
955 if (ixjdebug & 0x0008) {
956 printk(KERN_INFO "IXJ Ring Cadence fail state = %d /dev/phone%d at %ld should be %d\n",
957 j->cadence_f[4].state, j->board, jiffies - j->pstn_prev_rmr,
958 j->cadence_f[4].off1);
959 }
960 j->cadence_f[4].state = 0;
961 }
962 } else if (j->cadence_f[4].state == 4) {
963 if((time_after(jiffies, j->cadence_f[4].off2min) &&
964 time_before(jiffies, j->cadence_f[4].off2max))) {
965 if (j->cadence_f[4].on3) {
966 j->cadence_f[4].state = 5;
967 j->cadence_f[4].on3min = jiffies + (long)((j->cadence_f[4].on3 * (hertz * (100 - var)) / 10000));
968 j->cadence_f[4].on3dot = jiffies + (long)((j->cadence_f[4].on3 * (hertz * (100)) / 10000));
969 j->cadence_f[4].on3max = jiffies + (long)((j->cadence_f[4].on3 * (hertz * (100 + var)) / 10000));
970 } else {
971 j->cadence_f[4].state = 7;
972 }
973 } else {
974 if (ixjdebug & 0x0008) {
975 printk(KERN_INFO "IXJ Ring Cadence fail state = %d /dev/phone%d at %ld should be %d\n",
976 j->cadence_f[4].state, j->board, jiffies - j->pstn_prev_rmr,
977 j->cadence_f[4].off2);
978 }
979 j->cadence_f[4].state = 0;
980 }
981 } else if (j->cadence_f[4].state == 6) {
982 if((time_after(jiffies, j->cadence_f[4].off3min) &&
983 time_before(jiffies, j->cadence_f[4].off3max))) {
984 j->cadence_f[4].state = 7;
985 } else {
986 if (ixjdebug & 0x0008) {
987 printk(KERN_INFO "IXJ Ring Cadence fail state = %d /dev/phone%d at %ld should be %d\n",
988 j->cadence_f[4].state, j->board, jiffies - j->pstn_prev_rmr,
989 j->cadence_f[4].off3);
990 }
991 j->cadence_f[4].state = 0;
992 }
993 } else {
994 j->cadence_f[4].state = 0;
995 }
996 } else { /* Falling edge of RMR */
997 j->pstn_ring_start = 0;
998 j->pstn_ring_stop = jiffies;
999 if (j->cadence_f[4].state == 1) {
1000 if(!j->cadence_f[4].on1) {
1001 j->cadence_f[4].state = 7;
1002 } else if((time_after(jiffies, j->cadence_f[4].on1min) &&
1003 time_before(jiffies, j->cadence_f[4].on1max))) {
1004 if (j->cadence_f[4].off1) {
1005 j->cadence_f[4].state = 2;
1006 j->cadence_f[4].off1min = jiffies + (long)((j->cadence_f[4].off1 * (hertz * (100 - var)) / 10000));
1007 j->cadence_f[4].off1dot = jiffies + (long)((j->cadence_f[4].off1 * (hertz * (100)) / 10000));
1008 j->cadence_f[4].off1max = jiffies + (long)((j->cadence_f[4].off1 * (hertz * (100 + var)) / 10000));
1009 } else {
1010 j->cadence_f[4].state = 7;
1011 }
1012 } else {
1013 if (ixjdebug & 0x0008) {
1014 printk(KERN_INFO "IXJ Ring Cadence fail state = %d /dev/phone%d at %ld should be %d\n",
1015 j->cadence_f[4].state, j->board, jiffies - j->pstn_prev_rmr,
1016 j->cadence_f[4].on1);
1017 }
1018 j->cadence_f[4].state = 0;
1019 }
1020 } else if (j->cadence_f[4].state == 3) {
1021 if((time_after(jiffies, j->cadence_f[4].on2min) &&
1022 time_before(jiffies, j->cadence_f[4].on2max))) {
1023 if (j->cadence_f[4].off2) {
1024 j->cadence_f[4].state = 4;
1025 j->cadence_f[4].off2min = jiffies + (long)((j->cadence_f[4].off2 * (hertz * (100 - var)) / 10000));
1026 j->cadence_f[4].off2dot = jiffies + (long)((j->cadence_f[4].off2 * (hertz * (100)) / 10000));
1027 j->cadence_f[4].off2max = jiffies + (long)((j->cadence_f[4].off2 * (hertz * (100 + var)) / 10000));
1028 } else {
1029 j->cadence_f[4].state = 7;
1030 }
1031 } else {
1032 if (ixjdebug & 0x0008) {
1033 printk(KERN_INFO "IXJ Ring Cadence fail state = %d /dev/phone%d at %ld should be %d\n",
1034 j->cadence_f[4].state, j->board, jiffies - j->pstn_prev_rmr,
1035 j->cadence_f[4].on2);
1036 }
1037 j->cadence_f[4].state = 0;
1038 }
1039 } else if (j->cadence_f[4].state == 5) {
1040 if((time_after(jiffies, j->cadence_f[4].on3min) &&
1041 time_before(jiffies, j->cadence_f[4].on3max))) {
1042 if (j->cadence_f[4].off3) {
1043 j->cadence_f[4].state = 6;
1044 j->cadence_f[4].off3min = jiffies + (long)((j->cadence_f[4].off3 * (hertz * (100 - var)) / 10000));
1045 j->cadence_f[4].off3dot = jiffies + (long)((j->cadence_f[4].off3 * (hertz * (100)) / 10000));
1046 j->cadence_f[4].off3max = jiffies + (long)((j->cadence_f[4].off3 * (hertz * (100 + var)) / 10000));
1047 } else {
1048 j->cadence_f[4].state = 7;
1049 }
1050 } else {
1051 j->cadence_f[4].state = 0;
1052 }
1053 } else {
1054 if (ixjdebug & 0x0008) {
1055 printk(KERN_INFO "IXJ Ring Cadence fail state = %d /dev/phone%d at %ld should be %d\n",
1056 j->cadence_f[4].state, j->board, jiffies - j->pstn_prev_rmr,
1057 j->cadence_f[4].on3);
1058 }
1059 j->cadence_f[4].state = 0;
1060 }
1061 }
1062 if (ixjdebug & 0x0010) {
1063 printk(KERN_INFO "IXJ Ring Cadence b state = %d /dev/phone%d at %ld\n", j->cadence_f[4].state, j->board, jiffies);
1064 }
1065 if (ixjdebug & 0x0010) {
1066 switch(j->cadence_f[4].state) {
1067 case 1:
1068 printk(KERN_INFO "IXJ /dev/phone%d Next Ring Cadence state at %u min %ld - %ld - max %ld\n", j->board,
1069 j->cadence_f[4].on1, j->cadence_f[4].on1min, j->cadence_f[4].on1dot, j->cadence_f[4].on1max);
1070 break;
1071 case 2:
1072 printk(KERN_INFO "IXJ /dev/phone%d Next Ring Cadence state at %u min %ld - %ld - max %ld\n", j->board,
1073 j->cadence_f[4].off1, j->cadence_f[4].off1min, j->cadence_f[4].off1dot, j->cadence_f[4].off1max);
1074 break;
1075 case 3:
1076 printk(KERN_INFO "IXJ /dev/phone%d Next Ring Cadence state at %u min %ld - %ld - max %ld\n", j->board,
1077 j->cadence_f[4].on2, j->cadence_f[4].on2min, j->cadence_f[4].on2dot, j->cadence_f[4].on2max);
1078 break;
1079 case 4:
1080 printk(KERN_INFO "IXJ /dev/phone%d Next Ring Cadence state at %u min %ld - %ld - max %ld\n", j->board,
1081 j->cadence_f[4].off2, j->cadence_f[4].off2min, j->cadence_f[4].off2dot, j->cadence_f[4].off2max);
1082 break;
1083 case 5:
1084 printk(KERN_INFO "IXJ /dev/phone%d Next Ring Cadence state at %u min %ld - %ld - max %ld\n", j->board,
1085 j->cadence_f[4].on3, j->cadence_f[4].on3min, j->cadence_f[4].on3dot, j->cadence_f[4].on3max);
1086 break;
1087 case 6:
1088 printk(KERN_INFO "IXJ /dev/phone%d Next Ring Cadence state at %u min %ld - %ld - max %ld\n", j->board,
1089 j->cadence_f[4].off3, j->cadence_f[4].off3min, j->cadence_f[4].off3dot, j->cadence_f[4].off3max);
1090 break;
1091 }
1092 }
1093 }
1094 if (j->cadence_f[4].state == 7) {
1095 j->cadence_f[4].state = 0;
1096 j->pstn_ring_stop = jiffies;
1097 j->ex.bits.pstn_ring = 1;
1098 ixj_kill_fasync(j, SIG_PSTN_RING, POLL_IN);
1099 if(ixjdebug & 0x0008) {
1100 printk(KERN_INFO "IXJ Ring int set /dev/phone%d at %ld\n", j->board, jiffies);
1101 }
1102 }
1103 if((j->pstn_ring_int != 0 && time_after(jiffies, j->pstn_ring_int + (hertz * 5)) && !j->flags.pstn_rmr) ||
1104 (j->pstn_ring_stop != 0 && time_after(jiffies, j->pstn_ring_stop + (hertz * 5)))) {
1105 if(ixjdebug & 0x0008) {
1106 printk("IXJ DAA no ring in 5 seconds /dev/phone%d at %ld\n", j->board, jiffies);
1107 printk("IXJ DAA pstn ring int /dev/phone%d at %ld\n", j->board, j->pstn_ring_int);
1108 printk("IXJ DAA pstn ring stop /dev/phone%d at %ld\n", j->board, j->pstn_ring_stop);
1109 }
1110 j->pstn_ring_stop = j->pstn_ring_int = 0;
1111 daa_set_mode(j, SOP_PU_SLEEP);
1112 }
1113 outb_p(j->pld_scrw.byte, j->XILINXbase);
1114 if (j->pstn_cid_intr && time_after(jiffies, j->pstn_cid_received + hertz)) {
1115 ixj_daa_cid_read(j);
1116 j->ex.bits.caller_id = 1;
1117 ixj_kill_fasync(j, SIG_CALLER_ID, POLL_IN);
1118 j->pstn_cid_intr = 0;
1119 }
1120 if (daaint.bitreg.Cadence) {
1121 if(ixjdebug & 0x0008) {
1122 printk("IXJ DAA Cadence interrupt going to sleep /dev/phone%d\n", j->board);
1123 }
1124 daa_set_mode(j, SOP_PU_SLEEP);
1125 j->ex.bits.pstn_ring = 0;
1126 }
1127 break;
1128 case SOP_PU_CONVERSATION:
1129 if (daaint.bitreg.VDD_OK) {
1130 if(!daaint.bitreg.SI_0) {
1131 if (!j->pstn_winkstart) {
1132 if(ixjdebug & 0x0008) {
1133 printk("IXJ DAA possible wink /dev/phone%d %ld\n", j->board, jiffies);
1134 }
1135 j->pstn_winkstart = jiffies;
1136 }
1137 } else {
1138 if (j->pstn_winkstart) {
1139 if(ixjdebug & 0x0008) {
1140 printk("IXJ DAA possible wink end /dev/phone%d %ld\n", j->board, jiffies);
1141 }
1142 j->pstn_winkstart = 0;
1143 }
1144 }
1145 }
1146 if (j->pstn_winkstart && time_after(jiffies, j->pstn_winkstart + ((hertz * j->winktime) / 1000))) {
1147 if(ixjdebug & 0x0008) {
1148 printk("IXJ DAA wink detected going to sleep /dev/phone%d %ld\n", j->board, jiffies);
1149 }
1150 daa_set_mode(j, SOP_PU_SLEEP);
1151 j->pstn_winkstart = 0;
1152 j->ex.bits.pstn_wink = 1;
1153 ixj_kill_fasync(j, SIG_PSTN_WINK, POLL_IN);
1154 }
1155 break;
1156 }
1157}
1158
1159static void ixj_timeout(unsigned long ptr)
1160{
1161 int board;
1162 unsigned long jifon;
1163 IXJ *j = (IXJ *)ptr;
1164 board = j->board;
1165
1166 if (j->DSPbase && atomic_read(&j->DSPWrite) == 0 && test_and_set_bit(board, (void *)&j->busyflags) == 0) {
1167 ixj_perfmon(j->timerchecks);
1168 j->hookstate = ixj_hookstate(j);
1169 if (j->tone_state) {
1170 if (!(j->hookstate)) {
1171 ixj_cpt_stop(j);
1172 if (j->m_hook) {
1173 j->m_hook = 0;
1174 j->ex.bits.hookstate = 1;
1175 ixj_kill_fasync(j, SIG_HOOKSTATE, POLL_IN);
1176 }
1177 clear_bit(board, &j->busyflags);
1178 ixj_add_timer(j);
1179 return;
1180 }
1181 if (j->tone_state == 1)
1182 jifon = ((hertz * j->tone_on_time) * 25 / 100000);
1183 else
1184 jifon = ((hertz * j->tone_on_time) * 25 / 100000) + ((hertz * j->tone_off_time) * 25 / 100000);
1185 if (time_before(jiffies, j->tone_start_jif + jifon)) {
1186 if (j->tone_state == 1) {
1187 ixj_play_tone(j, j->tone_index);
1188 if (j->dsp.low == 0x20) {
1189 clear_bit(board, &j->busyflags);
1190 ixj_add_timer(j);
1191 return;
1192 }
1193 } else {
1194 ixj_play_tone(j, 0);
1195 if (j->dsp.low == 0x20) {
1196 clear_bit(board, &j->busyflags);
1197 ixj_add_timer(j);
1198 return;
1199 }
1200 }
1201 } else {
1202 ixj_tone_timeout(j);
1203 if (j->flags.dialtone) {
1204 ixj_dialtone(j);
1205 }
1206 if (j->flags.busytone) {
1207 ixj_busytone(j);
1208 if (j->dsp.low == 0x20) {
1209 clear_bit(board, &j->busyflags);
1210 ixj_add_timer(j);
1211 return;
1212 }
1213 }
1214 if (j->flags.ringback) {
1215 ixj_ringback(j);
1216 if (j->dsp.low == 0x20) {
1217 clear_bit(board, &j->busyflags);
1218 ixj_add_timer(j);
1219 return;
1220 }
1221 }
1222 if (!j->tone_state) {
1223 ixj_cpt_stop(j);
1224 }
1225 }
1226 }
1227 if (!(j->tone_state && j->dsp.low == 0x20)) {
1228 if (IsRxReady(j)) {
1229 ixj_read_frame(j);
1230 }
1231 if (IsTxReady(j)) {
1232 ixj_write_frame(j);
1233 }
1234 }
1235 if (j->flags.cringing) {
1236 if (j->hookstate & 1) {
1237 j->flags.cringing = 0;
1238 ixj_ring_off(j);
1239 } else if(j->cadence_f[5].enable && ((!j->cadence_f[5].en_filter) || (j->cadence_f[5].en_filter && j->flags.firstring))) {
1240 switch(j->cadence_f[5].state) {
1241 case 0:
1242 j->cadence_f[5].on1dot = jiffies + (long)((j->cadence_f[5].on1 * (hertz * 100) / 10000));
1243 if (time_before(jiffies, j->cadence_f[5].on1dot)) {
1244 if(ixjdebug & 0x0004) {
1245 printk("Ringing cadence state = %d - %ld\n", j->cadence_f[5].state, jiffies);
1246 }
1247 ixj_ring_on(j);
1248 }
1249 j->cadence_f[5].state = 1;
1250 break;
1251 case 1:
1252 if (time_after(jiffies, j->cadence_f[5].on1dot)) {
1253 j->cadence_f[5].off1dot = jiffies + (long)((j->cadence_f[5].off1 * (hertz * 100) / 10000));
1254 if(ixjdebug & 0x0004) {
1255 printk("Ringing cadence state = %d - %ld\n", j->cadence_f[5].state, jiffies);
1256 }
1257 ixj_ring_off(j);
1258 j->cadence_f[5].state = 2;
1259 }
1260 break;
1261 case 2:
1262 if (time_after(jiffies, j->cadence_f[5].off1dot)) {
1263 if(ixjdebug & 0x0004) {
1264 printk("Ringing cadence state = %d - %ld\n", j->cadence_f[5].state, jiffies);
1265 }
1266 ixj_ring_on(j);
1267 if (j->cadence_f[5].on2) {
1268 j->cadence_f[5].on2dot = jiffies + (long)((j->cadence_f[5].on2 * (hertz * 100) / 10000));
1269 j->cadence_f[5].state = 3;
1270 } else {
1271 j->cadence_f[5].state = 7;
1272 }
1273 }
1274 break;
1275 case 3:
1276 if (time_after(jiffies, j->cadence_f[5].on2dot)) {
1277 if(ixjdebug & 0x0004) {
1278 printk("Ringing cadence state = %d - %ld\n", j->cadence_f[5].state, jiffies);
1279 }
1280 ixj_ring_off(j);
1281 if (j->cadence_f[5].off2) {
1282 j->cadence_f[5].off2dot = jiffies + (long)((j->cadence_f[5].off2 * (hertz * 100) / 10000));
1283 j->cadence_f[5].state = 4;
1284 } else {
1285 j->cadence_f[5].state = 7;
1286 }
1287 }
1288 break;
1289 case 4:
1290 if (time_after(jiffies, j->cadence_f[5].off2dot)) {
1291 if(ixjdebug & 0x0004) {
1292 printk("Ringing cadence state = %d - %ld\n", j->cadence_f[5].state, jiffies);
1293 }
1294 ixj_ring_on(j);
1295 if (j->cadence_f[5].on3) {
1296 j->cadence_f[5].on3dot = jiffies + (long)((j->cadence_f[5].on3 * (hertz * 100) / 10000));
1297 j->cadence_f[5].state = 5;
1298 } else {
1299 j->cadence_f[5].state = 7;
1300 }
1301 }
1302 break;
1303 case 5:
1304 if (time_after(jiffies, j->cadence_f[5].on3dot)) {
1305 if(ixjdebug & 0x0004) {
1306 printk("Ringing cadence state = %d - %ld\n", j->cadence_f[5].state, jiffies);
1307 }
1308 ixj_ring_off(j);
1309 if (j->cadence_f[5].off3) {
1310 j->cadence_f[5].off3dot = jiffies + (long)((j->cadence_f[5].off3 * (hertz * 100) / 10000));
1311 j->cadence_f[5].state = 6;
1312 } else {
1313 j->cadence_f[5].state = 7;
1314 }
1315 }
1316 break;
1317 case 6:
1318 if (time_after(jiffies, j->cadence_f[5].off3dot)) {
1319 if(ixjdebug & 0x0004) {
1320 printk("Ringing cadence state = %d - %ld\n", j->cadence_f[5].state, jiffies);
1321 }
1322 j->cadence_f[5].state = 7;
1323 }
1324 break;
1325 case 7:
1326 if(ixjdebug & 0x0004) {
1327 printk("Ringing cadence state = %d - %ld\n", j->cadence_f[5].state, jiffies);
1328 }
1329 j->flags.cidring = 1;
1330 j->cadence_f[5].state = 0;
1331 break;
1332 }
1333 if (j->flags.cidring && !j->flags.cidsent) {
1334 j->flags.cidsent = 1;
1335 if(j->fskdcnt) {
1336 SLIC_SetState(PLD_SLIC_STATE_OHT, j);
1337 ixj_pre_cid(j);
1338 }
1339 j->flags.cidring = 0;
1340 }
1341 clear_bit(board, &j->busyflags);
1342 ixj_add_timer(j);
1343 return;
1344 } else {
1345 if (time_after(jiffies, j->ring_cadence_jif + (hertz / 2))) {
1346 if (j->flags.cidring && !j->flags.cidsent) {
1347 j->flags.cidsent = 1;
1348 if(j->fskdcnt) {
1349 SLIC_SetState(PLD_SLIC_STATE_OHT, j);
1350 ixj_pre_cid(j);
1351 }
1352 j->flags.cidring = 0;
1353 }
1354 j->ring_cadence_t--;
1355 if (j->ring_cadence_t == -1)
1356 j->ring_cadence_t = 15;
1357 j->ring_cadence_jif = jiffies;
1358
1359 if (j->ring_cadence & 1 << j->ring_cadence_t) {
1360 if(j->flags.cidsent && j->cadence_f[5].en_filter)
1361 j->flags.firstring = 1;
1362 else
1363 ixj_ring_on(j);
1364 } else {
1365 ixj_ring_off(j);
1366 if(!j->flags.cidsent)
1367 j->flags.cidring = 1;
1368 }
1369 }
1370 clear_bit(board, &j->busyflags);
1371 ixj_add_timer(j);
1372 return;
1373 }
1374 }
1375 if (!j->flags.ringing) {
1376 if (j->hookstate) { /* & 1) { */
1377 if (j->dsp.low != 0x20 &&
1378 SLIC_GetState(j) != PLD_SLIC_STATE_ACTIVE) {
1379 SLIC_SetState(PLD_SLIC_STATE_ACTIVE, j);
1380 }
1381 LineMonitor(j);
1382 read_filters(j);
1383 ixj_WriteDSPCommand(0x511B, j);
1384 j->proc_load = j->ssr.high << 8 | j->ssr.low;
1385 if (!j->m_hook && (j->hookstate & 1)) {
1386 j->m_hook = j->ex.bits.hookstate = 1;
1387 ixj_kill_fasync(j, SIG_HOOKSTATE, POLL_IN);
1388 }
1389 } else {
1390 if (j->ex.bits.dtmf_ready) {
1391 j->dtmf_wp = j->dtmf_rp = j->ex.bits.dtmf_ready = 0;
1392 }
1393 if (j->m_hook) {
1394 j->m_hook = 0;
1395 j->ex.bits.hookstate = 1;
1396 ixj_kill_fasync(j, SIG_HOOKSTATE, POLL_IN);
1397 }
1398 }
1399 }
1400 if (j->cardtype == QTI_LINEJACK && !j->flags.pstncheck && j->flags.pstn_present) {
1401 ixj_pstn_state(j);
1402 }
1403 if (j->ex.bytes) {
1404 wake_up_interruptible(&j->poll_q); /* Wake any blocked selects */
1405 }
1406 clear_bit(board, &j->busyflags);
1407 }
1408 ixj_add_timer(j);
1409}
1410
1411static int ixj_status_wait(IXJ *j)
1412{
1413 unsigned long jif;
1414
1415 jif = jiffies + ((60 * hertz) / 100);
1416 while (!IsStatusReady(j)) {
1417 ixj_perfmon(j->statuswait);
1418 if (time_after(jiffies, jif)) {
1419 ixj_perfmon(j->statuswaitfail);
1420 return -1;
1421 }
1422 }
1423 return 0;
1424}
1425
1426static int ixj_PCcontrol_wait(IXJ *j)
1427{
1428 unsigned long jif;
1429
1430 jif = jiffies + ((60 * hertz) / 100);
1431 while (!IsPCControlReady(j)) {
1432 ixj_perfmon(j->pcontrolwait);
1433 if (time_after(jiffies, jif)) {
1434 ixj_perfmon(j->pcontrolwaitfail);
1435 return -1;
1436 }
1437 }
1438 return 0;
1439}
1440
1441static int ixj_WriteDSPCommand(unsigned short cmd, IXJ *j)
1442{
1443 BYTES bytes;
1444 unsigned long jif;
1445
1446 atomic_inc(&j->DSPWrite);
1447 if(atomic_read(&j->DSPWrite) > 1) {
1448 printk("IXJ %d DSP write overlap attempting command 0x%4.4x\n", j->board, cmd);
1449 return -1;
1450 }
1451 bytes.high = (cmd & 0xFF00) >> 8;
1452 bytes.low = cmd & 0x00FF;
1453 jif = jiffies + ((60 * hertz) / 100);
1454 while (!IsControlReady(j)) {
1455 ixj_perfmon(j->iscontrolready);
1456 if (time_after(jiffies, jif)) {
1457 ixj_perfmon(j->iscontrolreadyfail);
1458 atomic_dec(&j->DSPWrite);
1459 if(atomic_read(&j->DSPWrite) > 0) {
1460 printk("IXJ %d DSP overlaped command 0x%4.4x during control ready failure.\n", j->board, cmd);
1461 while(atomic_read(&j->DSPWrite) > 0) {
1462 atomic_dec(&j->DSPWrite);
1463 }
1464 }
1465 return -1;
1466 }
1467 }
1468 outb(bytes.low, j->DSPbase + 6);
1469 outb(bytes.high, j->DSPbase + 7);
1470
1471 if (ixj_status_wait(j)) {
1472 j->ssr.low = 0xFF;
1473 j->ssr.high = 0xFF;
1474 atomic_dec(&j->DSPWrite);
1475 if(atomic_read(&j->DSPWrite) > 0) {
1476 printk("IXJ %d DSP overlaped command 0x%4.4x during status wait failure.\n", j->board, cmd);
1477 while(atomic_read(&j->DSPWrite) > 0) {
1478 atomic_dec(&j->DSPWrite);
1479 }
1480 }
1481 return -1;
1482 }
1483/* Read Software Status Register */
1484 j->ssr.low = inb_p(j->DSPbase + 2);
1485 j->ssr.high = inb_p(j->DSPbase + 3);
1486 atomic_dec(&j->DSPWrite);
1487 if(atomic_read(&j->DSPWrite) > 0) {
1488 printk("IXJ %d DSP overlaped command 0x%4.4x\n", j->board, cmd);
1489 while(atomic_read(&j->DSPWrite) > 0) {
1490 atomic_dec(&j->DSPWrite);
1491 }
1492 }
1493 return 0;
1494}
1495
1496/***************************************************************************
1497*
1498* General Purpose IO Register read routine
1499*
1500***************************************************************************/
1501static inline int ixj_gpio_read(IXJ *j)
1502{
1503 if (ixj_WriteDSPCommand(0x5143, j))
1504 return -1;
1505
1506 j->gpio.bytes.low = j->ssr.low;
1507 j->gpio.bytes.high = j->ssr.high;
1508
1509 return 0;
1510}
1511
1512static inline void LED_SetState(int state, IXJ *j)
1513{
1514 if (j->cardtype == QTI_LINEJACK) {
1515 j->pld_scrw.bits.led1 = state & 0x1 ? 1 : 0;
1516 j->pld_scrw.bits.led2 = state & 0x2 ? 1 : 0;
1517 j->pld_scrw.bits.led3 = state & 0x4 ? 1 : 0;
1518 j->pld_scrw.bits.led4 = state & 0x8 ? 1 : 0;
1519
1520 outb(j->pld_scrw.byte, j->XILINXbase);
1521 }
1522}
1523
1524/*********************************************************************
1525* GPIO Pins are configured as follows on the Quicknet Internet
1526* PhoneJACK Telephony Cards
1527*
1528* POTS Select GPIO_6=0 GPIO_7=0
1529* Mic/Speaker Select GPIO_6=0 GPIO_7=1
1530* Handset Select GPIO_6=1 GPIO_7=0
1531*
1532* SLIC Active GPIO_1=0 GPIO_2=1 GPIO_5=0
1533* SLIC Ringing GPIO_1=1 GPIO_2=1 GPIO_5=0
1534* SLIC Open Circuit GPIO_1=0 GPIO_2=0 GPIO_5=0
1535*
1536* Hook Switch changes reported on GPIO_3
1537*********************************************************************/
1538static int ixj_set_port(IXJ *j, int arg)
1539{
1540 if (j->cardtype == QTI_PHONEJACK_LITE) {
1541 if (arg != PORT_POTS)
1542 return 10;
1543 else
1544 return 0;
1545 }
1546 switch (arg) {
1547 case PORT_POTS:
1548 j->port = PORT_POTS;
1549 switch (j->cardtype) {
1550 case QTI_PHONECARD:
1551 if (j->flags.pcmciasct == 1)
1552 SLIC_SetState(PLD_SLIC_STATE_ACTIVE, j);
1553 else
1554 return 11;
1555 break;
1556 case QTI_PHONEJACK_PCI:
1557 j->pld_slicw.pcib.mic = 0;
1558 j->pld_slicw.pcib.spk = 0;
1559 outb(j->pld_slicw.byte, j->XILINXbase + 0x01);
1560 break;
1561 case QTI_LINEJACK:
1562 ixj_set_pots(j, 0); /* Disconnect POTS/PSTN relay */
1563 if (ixj_WriteDSPCommand(0xC528, j)) /* Write CODEC config to
1564 Software Control Register */
1565 return 2;
1566 j->pld_scrw.bits.daafsyncen = 0; /* Turn off DAA Frame Sync */
1567
1568 outb(j->pld_scrw.byte, j->XILINXbase);
1569 j->pld_clock.byte = 0;
1570 outb(j->pld_clock.byte, j->XILINXbase + 0x04);
1571 j->pld_slicw.bits.rly1 = 1;
1572 j->pld_slicw.bits.spken = 0;
1573 outb(j->pld_slicw.byte, j->XILINXbase + 0x01);
1574 ixj_mixer(0x1200, j); /* Turn Off MIC switch on mixer left */
1575 ixj_mixer(0x1401, j); /* Turn On Mono1 switch on mixer left */
1576 ixj_mixer(0x1300, j); /* Turn Off MIC switch on mixer right */
1577 ixj_mixer(0x1501, j); /* Turn On Mono1 switch on mixer right */
1578 ixj_mixer(0x0E80, j); /*Mic mute */
1579 ixj_mixer(0x0F00, j); /* Set mono out (SLIC) to 0dB */
1580 ixj_mixer(0x0080, j); /* Mute Master Left volume */
1581 ixj_mixer(0x0180, j); /* Mute Master Right volume */
1582 SLIC_SetState(PLD_SLIC_STATE_STANDBY, j);
1583/* SLIC_SetState(PLD_SLIC_STATE_ACTIVE, j); */
1584 break;
1585 case QTI_PHONEJACK:
1586 j->gpio.bytes.high = 0x0B;
1587 j->gpio.bits.gpio6 = 0;
1588 j->gpio.bits.gpio7 = 0;
1589 ixj_WriteDSPCommand(j->gpio.word, j);
1590 break;
1591 }
1592 break;
1593 case PORT_PSTN:
1594 if (j->cardtype == QTI_LINEJACK) {
1595 ixj_WriteDSPCommand(0xC534, j); /* Write CODEC config to Software Control Register */
1596
1597 j->pld_slicw.bits.rly3 = 0;
1598 j->pld_slicw.bits.rly1 = 1;
1599 j->pld_slicw.bits.spken = 0;
1600 outb(j->pld_slicw.byte, j->XILINXbase + 0x01);
1601 j->port = PORT_PSTN;
1602 } else {
1603 return 4;
1604 }
1605 break;
1606 case PORT_SPEAKER:
1607 j->port = PORT_SPEAKER;
1608 switch (j->cardtype) {
1609 case QTI_PHONECARD:
1610 if (j->flags.pcmciasct) {
1611 SLIC_SetState(PLD_SLIC_STATE_OC, j);
1612 }
1613 break;
1614 case QTI_PHONEJACK_PCI:
1615 j->pld_slicw.pcib.mic = 1;
1616 j->pld_slicw.pcib.spk = 1;
1617 outb(j->pld_slicw.byte, j->XILINXbase + 0x01);
1618 break;
1619 case QTI_LINEJACK:
1620 ixj_set_pots(j, 0); /* Disconnect POTS/PSTN relay */
1621 if (ixj_WriteDSPCommand(0xC528, j)) /* Write CODEC config to
1622 Software Control Register */
1623 return 2;
1624 j->pld_scrw.bits.daafsyncen = 0; /* Turn off DAA Frame Sync */
1625
1626 outb(j->pld_scrw.byte, j->XILINXbase);
1627 j->pld_clock.byte = 0;
1628 outb(j->pld_clock.byte, j->XILINXbase + 0x04);
1629 j->pld_slicw.bits.rly1 = 1;
1630 j->pld_slicw.bits.spken = 1;
1631 outb(j->pld_slicw.byte, j->XILINXbase + 0x01);
1632 ixj_mixer(0x1201, j); /* Turn On MIC switch on mixer left */
1633 ixj_mixer(0x1400, j); /* Turn Off Mono1 switch on mixer left */
1634 ixj_mixer(0x1301, j); /* Turn On MIC switch on mixer right */
1635 ixj_mixer(0x1500, j); /* Turn Off Mono1 switch on mixer right */
1636 ixj_mixer(0x0E06, j); /*Mic un-mute 0dB */
1637 ixj_mixer(0x0F80, j); /* Mute mono out (SLIC) */
1638 ixj_mixer(0x0000, j); /* Set Master Left volume to 0dB */
1639 ixj_mixer(0x0100, j); /* Set Master Right volume to 0dB */
1640 break;
1641 case QTI_PHONEJACK:
1642 j->gpio.bytes.high = 0x0B;
1643 j->gpio.bits.gpio6 = 0;
1644 j->gpio.bits.gpio7 = 1;
1645 ixj_WriteDSPCommand(j->gpio.word, j);
1646 break;
1647 }
1648 break;
1649 case PORT_HANDSET:
1650 if (j->cardtype != QTI_PHONEJACK) {
1651 return 5;
1652 } else {
1653 j->gpio.bytes.high = 0x0B;
1654 j->gpio.bits.gpio6 = 1;
1655 j->gpio.bits.gpio7 = 0;
1656 ixj_WriteDSPCommand(j->gpio.word, j);
1657 j->port = PORT_HANDSET;
1658 }
1659 break;
1660 default:
1661 return 6;
1662 break;
1663 }
1664 return 0;
1665}
1666
1667static int ixj_set_pots(IXJ *j, int arg)
1668{
1669 if (j->cardtype == QTI_LINEJACK) {
1670 if (arg) {
1671 if (j->port == PORT_PSTN) {
1672 j->pld_slicw.bits.rly1 = 0;
1673 outb(j->pld_slicw.byte, j->XILINXbase + 0x01);
1674 j->flags.pots_pstn = 1;
1675 return 1;
1676 } else {
1677 j->flags.pots_pstn = 0;
1678 return 0;
1679 }
1680 } else {
1681 j->pld_slicw.bits.rly1 = 1;
1682 outb(j->pld_slicw.byte, j->XILINXbase + 0x01);
1683 j->flags.pots_pstn = 0;
1684 return 1;
1685 }
1686 } else {
1687 return 0;
1688 }
1689}
1690
1691static void ixj_ring_on(IXJ *j)
1692{
1693 if (j->dsp.low == 0x20) /* Internet PhoneJACK */
1694 {
1695 if (ixjdebug & 0x0004)
1696 printk(KERN_INFO "IXJ Ring On /dev/phone%d\n", j->board);
1697
1698 j->gpio.bytes.high = 0x0B;
1699 j->gpio.bytes.low = 0x00;
1700 j->gpio.bits.gpio1 = 1;
1701 j->gpio.bits.gpio2 = 1;
1702 j->gpio.bits.gpio5 = 0;
1703 ixj_WriteDSPCommand(j->gpio.word, j); /* send the ring signal */
1704 } else /* Internet LineJACK, Internet PhoneJACK Lite or Internet PhoneJACK PCI */
1705 {
1706 if (ixjdebug & 0x0004)
1707 printk(KERN_INFO "IXJ Ring On /dev/phone%d\n", j->board);
1708
1709 SLIC_SetState(PLD_SLIC_STATE_RINGING, j);
1710 }
1711}
1712
1713static int ixj_siadc(IXJ *j, int val)
1714{
1715 if(j->cardtype == QTI_PHONECARD){
1716 if(j->flags.pcmciascp){
1717 if(val == -1)
1718 return j->siadc.bits.rxg;
1719
1720 if(val < 0 || val > 0x1F)
1721 return -1;
1722
1723 j->siadc.bits.hom = 0; /* Handset Out Mute */
1724 j->siadc.bits.lom = 0; /* Line Out Mute */
1725 j->siadc.bits.rxg = val; /*(0xC000 - 0x41C8) / 0x4EF; RX PGA Gain */
1726 j->psccr.bits.addr = 6; /* R/W Smart Cable Register Address */
1727 j->psccr.bits.rw = 0; /* Read / Write flag */
1728 j->psccr.bits.dev = 0;
1729 outb(j->siadc.byte, j->XILINXbase + 0x00);
1730 outb(j->psccr.byte, j->XILINXbase + 0x01);
1731 ixj_PCcontrol_wait(j);
1732 return j->siadc.bits.rxg;
1733 }
1734 }
1735 return -1;
1736}
1737
1738static int ixj_sidac(IXJ *j, int val)
1739{
1740 if(j->cardtype == QTI_PHONECARD){
1741 if(j->flags.pcmciascp){
1742 if(val == -1)
1743 return j->sidac.bits.txg;
1744
1745 if(val < 0 || val > 0x1F)
1746 return -1;
1747
1748 j->sidac.bits.srm = 1; /* Speaker Right Mute */
1749 j->sidac.bits.slm = 1; /* Speaker Left Mute */
1750 j->sidac.bits.txg = val; /* (0xC000 - 0x45E4) / 0x5D3; TX PGA Gain */
1751 j->psccr.bits.addr = 7; /* R/W Smart Cable Register Address */
1752 j->psccr.bits.rw = 0; /* Read / Write flag */
1753 j->psccr.bits.dev = 0;
1754 outb(j->sidac.byte, j->XILINXbase + 0x00);
1755 outb(j->psccr.byte, j->XILINXbase + 0x01);
1756 ixj_PCcontrol_wait(j);
1757 return j->sidac.bits.txg;
1758 }
1759 }
1760 return -1;
1761}
1762
1763static int ixj_pcmcia_cable_check(IXJ *j)
1764{
1765 j->pccr1.byte = inb_p(j->XILINXbase + 0x03);
1766 if (!j->flags.pcmciastate) {
1767 j->pccr2.byte = inb_p(j->XILINXbase + 0x02);
1768 if (j->pccr1.bits.drf || j->pccr2.bits.rstc) {
1769 j->flags.pcmciastate = 4;
1770 return 0;
1771 }
1772 if (j->pccr1.bits.ed) {
1773 j->pccr1.bits.ed = 0;
1774 j->psccr.bits.dev = 3;
1775 j->psccr.bits.rw = 1;
1776 outw_p(j->psccr.byte << 8, j->XILINXbase + 0x00);
1777 ixj_PCcontrol_wait(j);
1778 j->pslic.byte = inw_p(j->XILINXbase + 0x00) & 0xFF;
1779 j->pslic.bits.led2 = j->pslic.bits.det ? 1 : 0;
1780 j->psccr.bits.dev = 3;
1781 j->psccr.bits.rw = 0;
1782 outw_p(j->psccr.byte << 8 | j->pslic.byte, j->XILINXbase + 0x00);
1783 ixj_PCcontrol_wait(j);
1784 return j->pslic.bits.led2 ? 1 : 0;
1785 } else if (j->flags.pcmciasct) {
1786 return j->r_hook;
1787 } else {
1788 return 1;
1789 }
1790 } else if (j->flags.pcmciastate == 4) {
1791 if (!j->pccr1.bits.drf) {
1792 j->flags.pcmciastate = 3;
1793 }
1794 return 0;
1795 } else if (j->flags.pcmciastate == 3) {
1796 j->pccr2.bits.pwr = 0;
1797 j->pccr2.bits.rstc = 1;
1798 outb(j->pccr2.byte, j->XILINXbase + 0x02);
1799 j->checkwait = jiffies + (hertz * 2);
1800 j->flags.incheck = 1;
1801 j->flags.pcmciastate = 2;
1802 return 0;
1803 } else if (j->flags.pcmciastate == 2) {
1804 if (j->flags.incheck) {
1805 if (time_before(jiffies, j->checkwait)) {
1806 return 0;
1807 } else {
1808 j->flags.incheck = 0;
1809 }
1810 }
1811 j->pccr2.bits.pwr = 0;
1812 j->pccr2.bits.rstc = 0;
1813 outb_p(j->pccr2.byte, j->XILINXbase + 0x02);
1814 j->flags.pcmciastate = 1;
1815 return 0;
1816 } else if (j->flags.pcmciastate == 1) {
1817 j->flags.pcmciastate = 0;
1818 if (!j->pccr1.bits.drf) {
1819 j->psccr.bits.dev = 3;
1820 j->psccr.bits.rw = 1;
1821 outb_p(j->psccr.byte, j->XILINXbase + 0x01);
1822 ixj_PCcontrol_wait(j);
1823 j->flags.pcmciascp = 1; /* Set Cable Present Flag */
1824
1825 j->flags.pcmciasct = (inw_p(j->XILINXbase + 0x00) >> 8) & 0x03; /* Get Cable Type */
1826
1827 if (j->flags.pcmciasct == 3) {
1828 j->flags.pcmciastate = 4;
1829 return 0;
1830 } else if (j->flags.pcmciasct == 0) {
1831 j->pccr2.bits.pwr = 1;
1832 j->pccr2.bits.rstc = 0;
1833 outb_p(j->pccr2.byte, j->XILINXbase + 0x02);
1834 j->port = PORT_SPEAKER;
1835 } else {
1836 j->port = PORT_POTS;
1837 }
1838 j->sic1.bits.cpd = 0; /* Chip Power Down */
1839 j->sic1.bits.mpd = 0; /* MIC Bias Power Down */
1840 j->sic1.bits.hpd = 0; /* Handset Bias Power Down */
1841 j->sic1.bits.lpd = 0; /* Line Bias Power Down */
1842 j->sic1.bits.spd = 1; /* Speaker Drive Power Down */
1843 j->psccr.bits.addr = 1; /* R/W Smart Cable Register Address */
1844 j->psccr.bits.rw = 0; /* Read / Write flag */
1845 j->psccr.bits.dev = 0;
1846 outb(j->sic1.byte, j->XILINXbase + 0x00);
1847 outb(j->psccr.byte, j->XILINXbase + 0x01);
1848 ixj_PCcontrol_wait(j);
1849
1850 j->sic2.bits.al = 0; /* Analog Loopback DAC analog -> ADC analog */
1851 j->sic2.bits.dl2 = 0; /* Digital Loopback DAC -> ADC one bit */
1852 j->sic2.bits.dl1 = 0; /* Digital Loopback ADC -> DAC one bit */
1853 j->sic2.bits.pll = 0; /* 1 = div 10, 0 = div 5 */
1854 j->sic2.bits.hpd = 0; /* HPF disable */
1855 j->psccr.bits.addr = 2; /* R/W Smart Cable Register Address */
1856 j->psccr.bits.rw = 0; /* Read / Write flag */
1857 j->psccr.bits.dev = 0;
1858 outb(j->sic2.byte, j->XILINXbase + 0x00);
1859 outb(j->psccr.byte, j->XILINXbase + 0x01);
1860 ixj_PCcontrol_wait(j);
1861
1862 j->psccr.bits.addr = 3; /* R/W Smart Cable Register Address */
1863 j->psccr.bits.rw = 0; /* Read / Write flag */
1864 j->psccr.bits.dev = 0;
1865 outb(0x00, j->XILINXbase + 0x00); /* PLL Divide N1 */
1866 outb(j->psccr.byte, j->XILINXbase + 0x01);
1867 ixj_PCcontrol_wait(j);
1868
1869 j->psccr.bits.addr = 4; /* R/W Smart Cable Register Address */
1870 j->psccr.bits.rw = 0; /* Read / Write flag */
1871 j->psccr.bits.dev = 0;
1872 outb(0x09, j->XILINXbase + 0x00); /* PLL Multiply M1 */
1873 outb(j->psccr.byte, j->XILINXbase + 0x01);
1874 ixj_PCcontrol_wait(j);
1875
1876 j->sirxg.bits.lig = 1; /* Line In Gain */
1877 j->sirxg.bits.lim = 1; /* Line In Mute */
1878 j->sirxg.bits.mcg = 0; /* MIC In Gain was 3 */
1879 j->sirxg.bits.mcm = 0; /* MIC In Mute */
1880 j->sirxg.bits.him = 0; /* Handset In Mute */
1881 j->sirxg.bits.iir = 1; /* IIR */
1882 j->psccr.bits.addr = 5; /* R/W Smart Cable Register Address */
1883 j->psccr.bits.rw = 0; /* Read / Write flag */
1884 j->psccr.bits.dev = 0;
1885 outb(j->sirxg.byte, j->XILINXbase + 0x00);
1886 outb(j->psccr.byte, j->XILINXbase + 0x01);
1887 ixj_PCcontrol_wait(j);
1888
1889 ixj_siadc(j, 0x17);
1890 ixj_sidac(j, 0x1D);
1891
1892 j->siaatt.bits.sot = 0;
1893 j->psccr.bits.addr = 9; /* R/W Smart Cable Register Address */
1894 j->psccr.bits.rw = 0; /* Read / Write flag */
1895 j->psccr.bits.dev = 0;
1896 outb(j->siaatt.byte, j->XILINXbase + 0x00);
1897 outb(j->psccr.byte, j->XILINXbase + 0x01);
1898 ixj_PCcontrol_wait(j);
1899
1900 if (j->flags.pcmciasct == 1 && !j->readers && !j->writers) {
1901 j->psccr.byte = j->pslic.byte = 0;
1902 j->pslic.bits.powerdown = 1;
1903 j->psccr.bits.dev = 3;
1904 j->psccr.bits.rw = 0;
1905 outw_p(j->psccr.byte << 8 | j->pslic.byte, j->XILINXbase + 0x00);
1906 ixj_PCcontrol_wait(j);
1907 }
1908 }
1909 return 0;
1910 } else {
1911 j->flags.pcmciascp = 0;
1912 return 0;
1913 }
1914 return 0;
1915}
1916
1917static int ixj_hookstate(IXJ *j)
1918{
1919 int fOffHook = 0;
1920
1921 switch (j->cardtype) {
1922 case QTI_PHONEJACK:
1923 ixj_gpio_read(j);
1924 fOffHook = j->gpio.bits.gpio3read ? 1 : 0;
1925 break;
1926 case QTI_LINEJACK:
1927 case QTI_PHONEJACK_LITE:
1928 case QTI_PHONEJACK_PCI:
1929 SLIC_GetState(j);
1930 if(j->cardtype == QTI_LINEJACK && j->flags.pots_pstn == 1 && (j->readers || j->writers)) {
1931 fOffHook = j->pld_slicr.bits.potspstn ? 1 : 0;
1932 if(fOffHook != j->p_hook) {
1933 if(!j->checkwait) {
1934 j->checkwait = jiffies;
1935 }
1936 if(time_before(jiffies, j->checkwait + 2)) {
1937 fOffHook ^= 1;
1938 } else {
1939 j->checkwait = 0;
1940 }
1941 j->p_hook = fOffHook;
1942 printk("IXJ : /dev/phone%d pots-pstn hookstate check %d at %ld\n", j->board, fOffHook, jiffies);
1943 }
1944 } else {
1945 if (j->pld_slicr.bits.state == PLD_SLIC_STATE_ACTIVE ||
1946 j->pld_slicr.bits.state == PLD_SLIC_STATE_STANDBY) {
1947 if (j->flags.ringing || j->flags.cringing) {
1948 if (!in_interrupt()) {
1949 msleep(20);
1950 }
1951 SLIC_GetState(j);
1952 if (j->pld_slicr.bits.state == PLD_SLIC_STATE_RINGING) {
1953 ixj_ring_on(j);
1954 }
1955 }
1956 if (j->cardtype == QTI_PHONEJACK_PCI) {
1957 j->pld_scrr.byte = inb_p(j->XILINXbase);
1958 fOffHook = j->pld_scrr.pcib.det ? 1 : 0;
1959 } else
1960 fOffHook = j->pld_slicr.bits.det ? 1 : 0;
1961 }
1962 }
1963 break;
1964 case QTI_PHONECARD:
1965 fOffHook = ixj_pcmcia_cable_check(j);
1966 break;
1967 }
1968 if (j->r_hook != fOffHook) {
1969 j->r_hook = fOffHook;
1970 if (j->port == PORT_SPEAKER || j->port == PORT_HANDSET) { // || (j->port == PORT_PSTN && j->flags.pots_pstn == 0)) {
1971 j->ex.bits.hookstate = 1;
1972 ixj_kill_fasync(j, SIG_HOOKSTATE, POLL_IN);
1973 } else if (!fOffHook) {
1974 j->flash_end = jiffies + ((60 * hertz) / 100);
1975 }
1976 }
1977 if (fOffHook) {
1978 if(time_before(jiffies, j->flash_end)) {
1979 j->ex.bits.flash = 1;
1980 j->flash_end = 0;
1981 ixj_kill_fasync(j, SIG_FLASH, POLL_IN);
1982 }
1983 } else {
1984 if(time_before(jiffies, j->flash_end)) {
1985 fOffHook = 1;
1986 }
1987 }
1988
1989 if (j->port == PORT_PSTN && j->daa_mode == SOP_PU_CONVERSATION)
1990 fOffHook |= 2;
1991
1992 if (j->port == PORT_SPEAKER) {
1993 if(j->cardtype == QTI_PHONECARD) {
1994 if(j->flags.pcmciascp && j->flags.pcmciasct) {
1995 fOffHook |= 2;
1996 }
1997 } else {
1998 fOffHook |= 2;
1999 }
2000 }
2001
2002 if (j->port == PORT_HANDSET)
2003 fOffHook |= 2;
2004
2005 return fOffHook;
2006}
2007
2008static void ixj_ring_off(IXJ *j)
2009{
2010 if (j->dsp.low == 0x20) /* Internet PhoneJACK */
2011 {
2012 if (ixjdebug & 0x0004)
2013 printk(KERN_INFO "IXJ Ring Off\n");
2014 j->gpio.bytes.high = 0x0B;
2015 j->gpio.bytes.low = 0x00;
2016 j->gpio.bits.gpio1 = 0;
2017 j->gpio.bits.gpio2 = 1;
2018 j->gpio.bits.gpio5 = 0;
2019 ixj_WriteDSPCommand(j->gpio.word, j);
2020 } else /* Internet LineJACK */
2021 {
2022 if (ixjdebug & 0x0004)
2023 printk(KERN_INFO "IXJ Ring Off\n");
2024
2025 if(!j->flags.cidplay)
2026 SLIC_SetState(PLD_SLIC_STATE_STANDBY, j);
2027
2028 SLIC_GetState(j);
2029 }
2030}
2031
2032static void ixj_ring_start(IXJ *j)
2033{
2034 j->flags.cringing = 1;
2035 if (ixjdebug & 0x0004)
2036 printk(KERN_INFO "IXJ Cadence Ringing Start /dev/phone%d\n", j->board);
2037 if (ixj_hookstate(j) & 1) {
2038 if (j->port == PORT_POTS)
2039 ixj_ring_off(j);
2040 j->flags.cringing = 0;
2041 if (ixjdebug & 0x0004)
2042 printk(KERN_INFO "IXJ Cadence Ringing Stopped /dev/phone%d off hook\n", j->board);
2043 } else if(j->cadence_f[5].enable && (!j->cadence_f[5].en_filter)) {
2044 j->ring_cadence_jif = jiffies;
2045 j->flags.cidsent = j->flags.cidring = 0;
2046 j->cadence_f[5].state = 0;
2047 if(j->cadence_f[5].on1)
2048 ixj_ring_on(j);
2049 } else {
2050 j->ring_cadence_jif = jiffies;
2051 j->ring_cadence_t = 15;
2052 if (j->ring_cadence & 1 << j->ring_cadence_t) {
2053 ixj_ring_on(j);
2054 } else {
2055 ixj_ring_off(j);
2056 }
2057 j->flags.cidsent = j->flags.cidring = j->flags.firstring = 0;
2058 }
2059}
2060
2061static int ixj_ring(IXJ *j)
2062{
2063 char cntr;
2064 unsigned long jif;
2065
2066 j->flags.ringing = 1;
2067 if (ixj_hookstate(j) & 1) {
2068 ixj_ring_off(j);
2069 j->flags.ringing = 0;
2070 return 1;
2071 }
2072 for (cntr = 0; cntr < j->maxrings; cntr++) {
2073 jif = jiffies + (1 * hertz);
2074 ixj_ring_on(j);
2075 while (time_before(jiffies, jif)) {
2076 if (ixj_hookstate(j) & 1) {
2077 ixj_ring_off(j);
2078 j->flags.ringing = 0;
2079 return 1;
2080 }
2081 schedule_timeout_interruptible(1);
2082 if (signal_pending(current))
2083 break;
2084 }
2085 jif = jiffies + (3 * hertz);
2086 ixj_ring_off(j);
2087 while (time_before(jiffies, jif)) {
2088 if (ixj_hookstate(j) & 1) {
2089 msleep(10);
2090 if (ixj_hookstate(j) & 1) {
2091 j->flags.ringing = 0;
2092 return 1;
2093 }
2094 }
2095 schedule_timeout_interruptible(1);
2096 if (signal_pending(current))
2097 break;
2098 }
2099 }
2100 ixj_ring_off(j);
2101 j->flags.ringing = 0;
2102 return 0;
2103}
2104
2105static int ixj_open(struct phone_device *p, struct file *file_p)
2106{
2107 IXJ *j = get_ixj(p->board);
2108 file_p->private_data = j;
2109
2110 if (!j->DSPbase)
2111 return -ENODEV;
2112
2113 if (file_p->f_mode & FMODE_READ) {
2114 if(!j->readers) {
2115 j->readers++;
2116 } else {
2117 return -EBUSY;
2118 }
2119 }
2120
2121 if (file_p->f_mode & FMODE_WRITE) {
2122 if(!j->writers) {
2123 j->writers++;
2124 } else {
2125 if (file_p->f_mode & FMODE_READ){
2126 j->readers--;
2127 }
2128 return -EBUSY;
2129 }
2130 }
2131
2132 if (j->cardtype == QTI_PHONECARD) {
2133 j->pslic.bits.powerdown = 0;
2134 j->psccr.bits.dev = 3;
2135 j->psccr.bits.rw = 0;
2136 outw_p(j->psccr.byte << 8 | j->pslic.byte, j->XILINXbase + 0x00);
2137 ixj_PCcontrol_wait(j);
2138 }
2139
2140 j->flags.cidplay = 0;
2141 j->flags.cidcw_ack = 0;
2142
2143 if (ixjdebug & 0x0002)
2144 printk(KERN_INFO "Opening board %d\n", p->board);
2145
2146 j->framesread = j->frameswritten = 0;
2147 return 0;
2148}
2149
2150static int ixj_release(struct inode *inode, struct file *file_p)
2151{
2152 IXJ_TONE ti;
2153 int cnt;
2154 IXJ *j = file_p->private_data;
2155 int board = j->p.board;
2156
2157 /*
2158 * Set up locks to ensure that only one process is talking to the DSP at a time.
2159 * This is necessary to keep the DSP from locking up.
2160 */
2161 while(test_and_set_bit(board, (void *)&j->busyflags) != 0)
2162 schedule_timeout_interruptible(1);
2163 if (ixjdebug & 0x0002)
2164 printk(KERN_INFO "Closing board %d\n", NUM(inode));
2165
2166 if (j->cardtype == QTI_PHONECARD)
2167 ixj_set_port(j, PORT_SPEAKER);
2168 else
2169 ixj_set_port(j, PORT_POTS);
2170
2171 aec_stop(j);
2172 ixj_play_stop(j);
2173 ixj_record_stop(j);
2174 set_play_volume(j, 0x100);
2175 set_rec_volume(j, 0x100);
2176 ixj_ring_off(j);
2177
2178 /* Restore the tone table to default settings. */
2179 ti.tone_index = 10;
2180 ti.gain0 = 1;
2181 ti.freq0 = hz941;
2182 ti.gain1 = 0;
2183 ti.freq1 = hz1209;
2184 ixj_init_tone(j, &ti);
2185 ti.tone_index = 11;
2186 ti.gain0 = 1;
2187 ti.freq0 = hz941;
2188 ti.gain1 = 0;
2189 ti.freq1 = hz1336;
2190 ixj_init_tone(j, &ti);
2191 ti.tone_index = 12;
2192 ti.gain0 = 1;
2193 ti.freq0 = hz941;
2194 ti.gain1 = 0;
2195 ti.freq1 = hz1477;
2196 ixj_init_tone(j, &ti);
2197 ti.tone_index = 13;
2198 ti.gain0 = 1;
2199 ti.freq0 = hz800;
2200 ti.gain1 = 0;
2201 ti.freq1 = 0;
2202 ixj_init_tone(j, &ti);
2203 ti.tone_index = 14;
2204 ti.gain0 = 1;
2205 ti.freq0 = hz1000;
2206 ti.gain1 = 0;
2207 ti.freq1 = 0;
2208 ixj_init_tone(j, &ti);
2209 ti.tone_index = 15;
2210 ti.gain0 = 1;
2211 ti.freq0 = hz1250;
2212 ti.gain1 = 0;
2213 ti.freq1 = 0;
2214 ixj_init_tone(j, &ti);
2215 ti.tone_index = 16;
2216 ti.gain0 = 1;
2217 ti.freq0 = hz950;
2218 ti.gain1 = 0;
2219 ti.freq1 = 0;
2220 ixj_init_tone(j, &ti);
2221 ti.tone_index = 17;
2222 ti.gain0 = 1;
2223 ti.freq0 = hz1100;
2224 ti.gain1 = 0;
2225 ti.freq1 = 0;
2226 ixj_init_tone(j, &ti);
2227 ti.tone_index = 18;
2228 ti.gain0 = 1;
2229 ti.freq0 = hz1400;
2230 ti.gain1 = 0;
2231 ti.freq1 = 0;
2232 ixj_init_tone(j, &ti);
2233 ti.tone_index = 19;
2234 ti.gain0 = 1;
2235 ti.freq0 = hz1500;
2236 ti.gain1 = 0;
2237 ti.freq1 = 0;
2238 ixj_init_tone(j, &ti);
2239 ti.tone_index = 20;
2240 ti.gain0 = 1;
2241 ti.freq0 = hz1600;
2242 ti.gain1 = 0;
2243 ti.freq1 = 0;
2244 ixj_init_tone(j, &ti);
2245 ti.tone_index = 21;
2246 ti.gain0 = 1;
2247 ti.freq0 = hz1800;
2248 ti.gain1 = 0;
2249 ti.freq1 = 0;
2250 ixj_init_tone(j, &ti);
2251 ti.tone_index = 22;
2252 ti.gain0 = 1;
2253 ti.freq0 = hz2100;
2254 ti.gain1 = 0;
2255 ti.freq1 = 0;
2256 ixj_init_tone(j, &ti);
2257 ti.tone_index = 23;
2258 ti.gain0 = 1;
2259 ti.freq0 = hz1300;
2260 ti.gain1 = 0;
2261 ti.freq1 = 0;
2262 ixj_init_tone(j, &ti);
2263 ti.tone_index = 24;
2264 ti.gain0 = 1;
2265 ti.freq0 = hz2450;
2266 ti.gain1 = 0;
2267 ti.freq1 = 0;
2268 ixj_init_tone(j, &ti);
2269 ti.tone_index = 25;
2270 ti.gain0 = 1;
2271 ti.freq0 = hz350;
2272 ti.gain1 = 0;
2273 ti.freq1 = hz440;
2274 ixj_init_tone(j, &ti);
2275 ti.tone_index = 26;
2276 ti.gain0 = 1;
2277 ti.freq0 = hz440;
2278 ti.gain1 = 0;
2279 ti.freq1 = hz480;
2280 ixj_init_tone(j, &ti);
2281 ti.tone_index = 27;
2282 ti.gain0 = 1;
2283 ti.freq0 = hz480;
2284 ti.gain1 = 0;
2285 ti.freq1 = hz620;
2286 ixj_init_tone(j, &ti);
2287
2288 set_rec_depth(j, 2); /* Set Record Channel Limit to 2 frames */
2289
2290 set_play_depth(j, 2); /* Set Playback Channel Limit to 2 frames */
2291
2292 j->ex.bits.dtmf_ready = 0;
2293 j->dtmf_state = 0;
2294 j->dtmf_wp = j->dtmf_rp = 0;
2295 j->rec_mode = j->play_mode = -1;
2296 j->flags.ringing = 0;
2297 j->maxrings = MAXRINGS;
2298 j->ring_cadence = USA_RING_CADENCE;
2299 if(j->cadence_f[5].enable) {
2300 j->cadence_f[5].enable = j->cadence_f[5].en_filter = j->cadence_f[5].state = 0;
2301 }
2302 j->drybuffer = 0;
2303 j->winktime = 320;
2304 j->flags.dtmf_oob = 0;
2305 for (cnt = 0; cnt < 4; cnt++)
2306 j->cadence_f[cnt].enable = 0;
2307
2308 idle(j);
2309
2310 if(j->cardtype == QTI_PHONECARD) {
2311 SLIC_SetState(PLD_SLIC_STATE_OC, j);
2312 }
2313
2314 if (file_p->f_mode & FMODE_READ)
2315 j->readers--;
2316 if (file_p->f_mode & FMODE_WRITE)
2317 j->writers--;
2318
2319 if (j->read_buffer && !j->readers) {
2320 kfree(j->read_buffer);
2321 j->read_buffer = NULL;
2322 j->read_buffer_size = 0;
2323 }
2324 if (j->write_buffer && !j->writers) {
2325 kfree(j->write_buffer);
2326 j->write_buffer = NULL;
2327 j->write_buffer_size = 0;
2328 }
2329 j->rec_codec = j->play_codec = 0;
2330 j->rec_frame_size = j->play_frame_size = 0;
2331 j->flags.cidsent = j->flags.cidring = 0;
2332
2333 if(j->cardtype == QTI_LINEJACK && !j->readers && !j->writers) {
2334 ixj_set_port(j, PORT_PSTN);
2335 daa_set_mode(j, SOP_PU_SLEEP);
2336 ixj_set_pots(j, 1);
2337 }
2338 ixj_WriteDSPCommand(0x0FE3, j); /* Put the DSP in 1/5 power mode. */
2339
2340 /* Set up the default signals for events */
2341 for (cnt = 0; cnt < 35; cnt++)
2342 j->ixj_signals[cnt] = SIGIO;
2343
2344 /* Set the excetion signal enable flags */
2345 j->ex_sig.bits.dtmf_ready = j->ex_sig.bits.hookstate = j->ex_sig.bits.flash = j->ex_sig.bits.pstn_ring =
2346 j->ex_sig.bits.caller_id = j->ex_sig.bits.pstn_wink = j->ex_sig.bits.f0 = j->ex_sig.bits.f1 = j->ex_sig.bits.f2 =
2347 j->ex_sig.bits.f3 = j->ex_sig.bits.fc0 = j->ex_sig.bits.fc1 = j->ex_sig.bits.fc2 = j->ex_sig.bits.fc3 = 1;
2348
2349 file_p->private_data = NULL;
2350 clear_bit(board, &j->busyflags);
2351 return 0;
2352}
2353
2354static int read_filters(IXJ *j)
2355{
2356 unsigned short fc, cnt, trg;
2357 int var;
2358
2359 trg = 0;
2360 if (ixj_WriteDSPCommand(0x5144, j)) {
2361 if(ixjdebug & 0x0001) {
2362 printk(KERN_INFO "Read Frame Counter failed!\n");
2363 }
2364 return -1;
2365 }
2366 fc = j->ssr.high << 8 | j->ssr.low;
2367 if (fc == j->frame_count)
2368 return 1;
2369
2370 j->frame_count = fc;
2371
2372 if (j->dtmf_proc)
2373 return 1;
2374
2375 var = 10;
2376
2377 for (cnt = 0; cnt < 4; cnt++) {
2378 if (ixj_WriteDSPCommand(0x5154 + cnt, j)) {
2379 if(ixjdebug & 0x0001) {
2380 printk(KERN_INFO "Select Filter %d failed!\n", cnt);
2381 }
2382 return -1;
2383 }
2384 if (ixj_WriteDSPCommand(0x515C, j)) {
2385 if(ixjdebug & 0x0001) {
2386 printk(KERN_INFO "Read Filter History %d failed!\n", cnt);
2387 }
2388 return -1;
2389 }
2390 j->filter_hist[cnt] = j->ssr.high << 8 | j->ssr.low;
2391
2392 if (j->cadence_f[cnt].enable) {
2393 if (j->filter_hist[cnt] & 3 && !(j->filter_hist[cnt] & 12)) {
2394 if (j->cadence_f[cnt].state == 0) {
2395 j->cadence_f[cnt].state = 1;
2396 j->cadence_f[cnt].on1min = jiffies + (long)((j->cadence_f[cnt].on1 * (hertz * (100 - var)) / 10000));
2397 j->cadence_f[cnt].on1dot = jiffies + (long)((j->cadence_f[cnt].on1 * (hertz * (100)) / 10000));
2398 j->cadence_f[cnt].on1max = jiffies + (long)((j->cadence_f[cnt].on1 * (hertz * (100 + var)) / 10000));
2399 } else if (j->cadence_f[cnt].state == 2 &&
2400 (time_after(jiffies, j->cadence_f[cnt].off1min) &&
2401 time_before(jiffies, j->cadence_f[cnt].off1max))) {
2402 if (j->cadence_f[cnt].on2) {
2403 j->cadence_f[cnt].state = 3;
2404 j->cadence_f[cnt].on2min = jiffies + (long)((j->cadence_f[cnt].on2 * (hertz * (100 - var)) / 10000));
2405 j->cadence_f[cnt].on2dot = jiffies + (long)((j->cadence_f[cnt].on2 * (hertz * (100)) / 10000));
2406 j->cadence_f[cnt].on2max = jiffies + (long)((j->cadence_f[cnt].on2 * (hertz * (100 + var)) / 10000));
2407 } else {
2408 j->cadence_f[cnt].state = 7;
2409 }
2410 } else if (j->cadence_f[cnt].state == 4 &&
2411 (time_after(jiffies, j->cadence_f[cnt].off2min) &&
2412 time_before(jiffies, j->cadence_f[cnt].off2max))) {
2413 if (j->cadence_f[cnt].on3) {
2414 j->cadence_f[cnt].state = 5;
2415 j->cadence_f[cnt].on3min = jiffies + (long)((j->cadence_f[cnt].on3 * (hertz * (100 - var)) / 10000));
2416 j->cadence_f[cnt].on3dot = jiffies + (long)((j->cadence_f[cnt].on3 * (hertz * (100)) / 10000));
2417 j->cadence_f[cnt].on3max = jiffies + (long)((j->cadence_f[cnt].on3 * (hertz * (100 + var)) / 10000));
2418 } else {
2419 j->cadence_f[cnt].state = 7;
2420 }
2421 } else {
2422 j->cadence_f[cnt].state = 0;
2423 }
2424 } else if (j->filter_hist[cnt] & 12 && !(j->filter_hist[cnt] & 3)) {
2425 if (j->cadence_f[cnt].state == 1) {
2426 if(!j->cadence_f[cnt].on1) {
2427 j->cadence_f[cnt].state = 7;
2428 } else if((time_after(jiffies, j->cadence_f[cnt].on1min) &&
2429 time_before(jiffies, j->cadence_f[cnt].on1max))) {
2430 if(j->cadence_f[cnt].off1) {
2431 j->cadence_f[cnt].state = 2;
2432 j->cadence_f[cnt].off1min = jiffies + (long)((j->cadence_f[cnt].off1 * (hertz * (100 - var)) / 10000));
2433 j->cadence_f[cnt].off1dot = jiffies + (long)((j->cadence_f[cnt].off1 * (hertz * (100)) / 10000));
2434 j->cadence_f[cnt].off1max = jiffies + (long)((j->cadence_f[cnt].off1 * (hertz * (100 + var)) / 10000));
2435 } else {
2436 j->cadence_f[cnt].state = 7;
2437 }
2438 } else {
2439 j->cadence_f[cnt].state = 0;
2440 }
2441 } else if (j->cadence_f[cnt].state == 3) {
2442 if((time_after(jiffies, j->cadence_f[cnt].on2min) &&
2443 time_before(jiffies, j->cadence_f[cnt].on2max))) {
2444 if(j->cadence_f[cnt].off2) {
2445 j->cadence_f[cnt].state = 4;
2446 j->cadence_f[cnt].off2min = jiffies + (long)((j->cadence_f[cnt].off2 * (hertz * (100 - var)) / 10000));
2447 j->cadence_f[cnt].off2dot = jiffies + (long)((j->cadence_f[cnt].off2 * (hertz * (100)) / 10000));
2448 j->cadence_f[cnt].off2max = jiffies + (long)((j->cadence_f[cnt].off2 * (hertz * (100 + var)) / 10000));
2449 } else {
2450 j->cadence_f[cnt].state = 7;
2451 }
2452 } else {
2453 j->cadence_f[cnt].state = 0;
2454 }
2455 } else if (j->cadence_f[cnt].state == 5) {
2456 if ((time_after(jiffies, j->cadence_f[cnt].on3min) &&
2457 time_before(jiffies, j->cadence_f[cnt].on3max))) {
2458 if(j->cadence_f[cnt].off3) {
2459 j->cadence_f[cnt].state = 6;
2460 j->cadence_f[cnt].off3min = jiffies + (long)((j->cadence_f[cnt].off3 * (hertz * (100 - var)) / 10000));
2461 j->cadence_f[cnt].off3dot = jiffies + (long)((j->cadence_f[cnt].off3 * (hertz * (100)) / 10000));
2462 j->cadence_f[cnt].off3max = jiffies + (long)((j->cadence_f[cnt].off3 * (hertz * (100 + var)) / 10000));
2463 } else {
2464 j->cadence_f[cnt].state = 7;
2465 }
2466 } else {
2467 j->cadence_f[cnt].state = 0;
2468 }
2469 } else {
2470 j->cadence_f[cnt].state = 0;
2471 }
2472 } else {
2473 switch(j->cadence_f[cnt].state) {
2474 case 1:
2475 if(time_after(jiffies, j->cadence_f[cnt].on1dot) &&
2476 !j->cadence_f[cnt].off1 &&
2477 !j->cadence_f[cnt].on2 && !j->cadence_f[cnt].off2 &&
2478 !j->cadence_f[cnt].on3 && !j->cadence_f[cnt].off3) {
2479 j->cadence_f[cnt].state = 7;
2480 }
2481 break;
2482 case 3:
2483 if(time_after(jiffies, j->cadence_f[cnt].on2dot) &&
2484 !j->cadence_f[cnt].off2 &&
2485 !j->cadence_f[cnt].on3 && !j->cadence_f[cnt].off3) {
2486 j->cadence_f[cnt].state = 7;
2487 }
2488 break;
2489 case 5:
2490 if(time_after(jiffies, j->cadence_f[cnt].on3dot) &&
2491 !j->cadence_f[cnt].off3) {
2492 j->cadence_f[cnt].state = 7;
2493 }
2494 break;
2495 }
2496 }
2497
2498 if (ixjdebug & 0x0040) {
2499 printk(KERN_INFO "IXJ Tone Cadence state = %d /dev/phone%d at %ld\n", j->cadence_f[cnt].state, j->board, jiffies);
2500 switch(j->cadence_f[cnt].state) {
2501 case 0:
2502 printk(KERN_INFO "IXJ /dev/phone%d No Tone detected\n", j->board);
2503 break;
2504 case 1:
2505 printk(KERN_INFO "IXJ /dev/phone%d Next Tone Cadence state at %u %ld - %ld - %ld\n", j->board,
2506 j->cadence_f[cnt].on1, j->cadence_f[cnt].on1min, j->cadence_f[cnt].on1dot, j->cadence_f[cnt].on1max);
2507 break;
2508 case 2:
2509 printk(KERN_INFO "IXJ /dev/phone%d Next Tone Cadence state at %ld - %ld\n", j->board, j->cadence_f[cnt].off1min,
2510 j->cadence_f[cnt].off1max);
2511 break;
2512 case 3:
2513 printk(KERN_INFO "IXJ /dev/phone%d Next Tone Cadence state at %ld - %ld\n", j->board, j->cadence_f[cnt].on2min,
2514 j->cadence_f[cnt].on2max);
2515 break;
2516 case 4:
2517 printk(KERN_INFO "IXJ /dev/phone%d Next Tone Cadence state at %ld - %ld\n", j->board, j->cadence_f[cnt].off2min,
2518 j->cadence_f[cnt].off2max);
2519 break;
2520 case 5:
2521 printk(KERN_INFO "IXJ /dev/phone%d Next Tone Cadence state at %ld - %ld\n", j->board, j->cadence_f[cnt].on3min,
2522 j->cadence_f[cnt].on3max);
2523 break;
2524 case 6:
2525 printk(KERN_INFO "IXJ /dev/phone%d Next Tone Cadence state at %ld - %ld\n", j->board, j->cadence_f[cnt].off3min,
2526 j->cadence_f[cnt].off3max);
2527 break;
2528 }
2529 }
2530 }
2531 if (j->cadence_f[cnt].state == 7) {
2532 j->cadence_f[cnt].state = 0;
2533 if (j->cadence_f[cnt].enable == 1)
2534 j->cadence_f[cnt].enable = 0;
2535 switch (cnt) {
2536 case 0:
2537 if(ixjdebug & 0x0020) {
2538 printk(KERN_INFO "Filter Cadence 0 triggered %ld\n", jiffies);
2539 }
2540 j->ex.bits.fc0 = 1;
2541 ixj_kill_fasync(j, SIG_FC0, POLL_IN);
2542 break;
2543 case 1:
2544 if(ixjdebug & 0x0020) {
2545 printk(KERN_INFO "Filter Cadence 1 triggered %ld\n", jiffies);
2546 }
2547 j->ex.bits.fc1 = 1;
2548 ixj_kill_fasync(j, SIG_FC1, POLL_IN);
2549 break;
2550 case 2:
2551 if(ixjdebug & 0x0020) {
2552 printk(KERN_INFO "Filter Cadence 2 triggered %ld\n", jiffies);
2553 }
2554 j->ex.bits.fc2 = 1;
2555 ixj_kill_fasync(j, SIG_FC2, POLL_IN);
2556 break;
2557 case 3:
2558 if(ixjdebug & 0x0020) {
2559 printk(KERN_INFO "Filter Cadence 3 triggered %ld\n", jiffies);
2560 }
2561 j->ex.bits.fc3 = 1;
2562 ixj_kill_fasync(j, SIG_FC3, POLL_IN);
2563 break;
2564 }
2565 }
2566 if (j->filter_en[cnt] && ((j->filter_hist[cnt] & 3 && !(j->filter_hist[cnt] & 12)) ||
2567 (j->filter_hist[cnt] & 12 && !(j->filter_hist[cnt] & 3)))) {
2568 if((j->filter_hist[cnt] & 3 && !(j->filter_hist[cnt] & 12))) {
2569 trg = 1;
2570 } else if((j->filter_hist[cnt] & 12 && !(j->filter_hist[cnt] & 3))) {
2571 trg = 0;
2572 }
2573 switch (cnt) {
2574 case 0:
2575 if(ixjdebug & 0x0020) {
2576 printk(KERN_INFO "Filter 0 triggered %d at %ld\n", trg, jiffies);
2577 }
2578 j->ex.bits.f0 = 1;
2579 ixj_kill_fasync(j, SIG_F0, POLL_IN);
2580 break;
2581 case 1:
2582 if(ixjdebug & 0x0020) {
2583 printk(KERN_INFO "Filter 1 triggered %d at %ld\n", trg, jiffies);
2584 }
2585 j->ex.bits.f1 = 1;
2586 ixj_kill_fasync(j, SIG_F1, POLL_IN);
2587 break;
2588 case 2:
2589 if(ixjdebug & 0x0020) {
2590 printk(KERN_INFO "Filter 2 triggered %d at %ld\n", trg, jiffies);
2591 }
2592 j->ex.bits.f2 = 1;
2593 ixj_kill_fasync(j, SIG_F2, POLL_IN);
2594 break;
2595 case 3:
2596 if(ixjdebug & 0x0020) {
2597 printk(KERN_INFO "Filter 3 triggered %d at %ld\n", trg, jiffies);
2598 }
2599 j->ex.bits.f3 = 1;
2600 ixj_kill_fasync(j, SIG_F3, POLL_IN);
2601 break;
2602 }
2603 }
2604 }
2605 return 0;
2606}
2607
2608static int LineMonitor(IXJ *j)
2609{
2610 if (j->dtmf_proc) {
2611 return -1;
2612 }
2613 j->dtmf_proc = 1;
2614
2615 if (ixj_WriteDSPCommand(0x7000, j)) /* Line Monitor */
2616 return -1;
2617
2618 j->dtmf.bytes.high = j->ssr.high;
2619 j->dtmf.bytes.low = j->ssr.low;
2620 if (!j->dtmf_state && j->dtmf.bits.dtmf_valid) {
2621 j->dtmf_state = 1;
2622 j->dtmf_current = j->dtmf.bits.digit;
2623 }
2624 if (j->dtmf_state && !j->dtmf.bits.dtmf_valid) /* && j->dtmf_wp != j->dtmf_rp) */
2625 {
2626 if(!j->cidcw_wait) {
2627 j->dtmfbuffer[j->dtmf_wp] = j->dtmf_current;
2628 j->dtmf_wp++;
2629 if (j->dtmf_wp == 79)
2630 j->dtmf_wp = 0;
2631 j->ex.bits.dtmf_ready = 1;
2632 if(j->ex_sig.bits.dtmf_ready) {
2633 ixj_kill_fasync(j, SIG_DTMF_READY, POLL_IN);
2634 }
2635 }
2636 else if(j->dtmf_current == 0x00 || j->dtmf_current == 0x0D) {
2637 if(ixjdebug & 0x0020) {
2638 printk("IXJ phone%d saw CIDCW Ack DTMF %d from display at %ld\n", j->board, j->dtmf_current, jiffies);
2639 }
2640 j->flags.cidcw_ack = 1;
2641 }
2642 j->dtmf_state = 0;
2643 }
2644 j->dtmf_proc = 0;
2645
2646 return 0;
2647}
2648
2649/************************************************************************
2650*
2651* Functions to allow alaw <-> ulaw conversions.
2652*
2653************************************************************************/
2654
2655static void ulaw2alaw(unsigned char *buff, unsigned long len)
2656{
2657 static unsigned char table_ulaw2alaw[] =
2658 {
2659 0x2A, 0x2B, 0x28, 0x29, 0x2E, 0x2F, 0x2C, 0x2D,
2660 0x22, 0x23, 0x20, 0x21, 0x26, 0x27, 0x24, 0x25,
2661 0x3A, 0x3B, 0x38, 0x39, 0x3E, 0x3F, 0x3C, 0x3D,
2662 0x32, 0x33, 0x30, 0x31, 0x36, 0x37, 0x34, 0x35,
2663 0x0B, 0x08, 0x09, 0x0E, 0x0F, 0x0C, 0x0D, 0x02,
2664 0x03, 0x00, 0x01, 0x06, 0x07, 0x04, 0x05, 0x1A,
2665 0x1B, 0x18, 0x19, 0x1E, 0x1F, 0x1C, 0x1D, 0x12,
2666 0x13, 0x10, 0x11, 0x16, 0x17, 0x14, 0x15, 0x6B,
2667 0x68, 0x69, 0x6E, 0x6F, 0x6C, 0x6D, 0x62, 0x63,
2668 0x60, 0x61, 0x66, 0x67, 0x64, 0x65, 0x7B, 0x79,
2669 0x7E, 0x7F, 0x7C, 0x7D, 0x72, 0x73, 0x70, 0x71,
2670 0x76, 0x77, 0x74, 0x75, 0x4B, 0x49, 0x4F, 0x4D,
2671 0x42, 0x43, 0x40, 0x41, 0x46, 0x47, 0x44, 0x45,
2672 0x5A, 0x5B, 0x58, 0x59, 0x5E, 0x5F, 0x5C, 0x5D,
2673 0x52, 0x52, 0x53, 0x53, 0x50, 0x50, 0x51, 0x51,
2674 0x56, 0x56, 0x57, 0x57, 0x54, 0x54, 0x55, 0xD5,
2675 0xAA, 0xAB, 0xA8, 0xA9, 0xAE, 0xAF, 0xAC, 0xAD,
2676 0xA2, 0xA3, 0xA0, 0xA1, 0xA6, 0xA7, 0xA4, 0xA5,
2677 0xBA, 0xBB, 0xB8, 0xB9, 0xBE, 0xBF, 0xBC, 0xBD,
2678 0xB2, 0xB3, 0xB0, 0xB1, 0xB6, 0xB7, 0xB4, 0xB5,
2679 0x8B, 0x88, 0x89, 0x8E, 0x8F, 0x8C, 0x8D, 0x82,
2680 0x83, 0x80, 0x81, 0x86, 0x87, 0x84, 0x85, 0x9A,
2681 0x9B, 0x98, 0x99, 0x9E, 0x9F, 0x9C, 0x9D, 0x92,
2682 0x93, 0x90, 0x91, 0x96, 0x97, 0x94, 0x95, 0xEB,
2683 0xE8, 0xE9, 0xEE, 0xEF, 0xEC, 0xED, 0xE2, 0xE3,
2684 0xE0, 0xE1, 0xE6, 0xE7, 0xE4, 0xE5, 0xFB, 0xF9,
2685 0xFE, 0xFF, 0xFC, 0xFD, 0xF2, 0xF3, 0xF0, 0xF1,
2686 0xF6, 0xF7, 0xF4, 0xF5, 0xCB, 0xC9, 0xCF, 0xCD,
2687 0xC2, 0xC3, 0xC0, 0xC1, 0xC6, 0xC7, 0xC4, 0xC5,
2688 0xDA, 0xDB, 0xD8, 0xD9, 0xDE, 0xDF, 0xDC, 0xDD,
2689 0xD2, 0xD2, 0xD3, 0xD3, 0xD0, 0xD0, 0xD1, 0xD1,
2690 0xD6, 0xD6, 0xD7, 0xD7, 0xD4, 0xD4, 0xD5, 0xD5
2691 };
2692
2693 while (len--)
2694 {
2695 *buff = table_ulaw2alaw[*(unsigned char *)buff];
2696 buff++;
2697 }
2698}
2699
2700static void alaw2ulaw(unsigned char *buff, unsigned long len)
2701{
2702 static unsigned char table_alaw2ulaw[] =
2703 {
2704 0x29, 0x2A, 0x27, 0x28, 0x2D, 0x2E, 0x2B, 0x2C,
2705 0x21, 0x22, 0x1F, 0x20, 0x25, 0x26, 0x23, 0x24,
2706 0x39, 0x3A, 0x37, 0x38, 0x3D, 0x3E, 0x3B, 0x3C,
2707 0x31, 0x32, 0x2F, 0x30, 0x35, 0x36, 0x33, 0x34,
2708 0x0A, 0x0B, 0x08, 0x09, 0x0E, 0x0F, 0x0C, 0x0D,
2709 0x02, 0x03, 0x00, 0x01, 0x06, 0x07, 0x04, 0x05,
2710 0x1A, 0x1B, 0x18, 0x19, 0x1E, 0x1F, 0x1C, 0x1D,
2711 0x12, 0x13, 0x10, 0x11, 0x16, 0x17, 0x14, 0x15,
2712 0x62, 0x63, 0x60, 0x61, 0x66, 0x67, 0x64, 0x65,
2713 0x5D, 0x5D, 0x5C, 0x5C, 0x5F, 0x5F, 0x5E, 0x5E,
2714 0x74, 0x76, 0x70, 0x72, 0x7C, 0x7E, 0x78, 0x7A,
2715 0x6A, 0x6B, 0x68, 0x69, 0x6E, 0x6F, 0x6C, 0x6D,
2716 0x48, 0x49, 0x46, 0x47, 0x4C, 0x4D, 0x4A, 0x4B,
2717 0x40, 0x41, 0x3F, 0x3F, 0x44, 0x45, 0x42, 0x43,
2718 0x56, 0x57, 0x54, 0x55, 0x5A, 0x5B, 0x58, 0x59,
2719 0x4F, 0x4F, 0x4E, 0x4E, 0x52, 0x53, 0x50, 0x51,
2720 0xA9, 0xAA, 0xA7, 0xA8, 0xAD, 0xAE, 0xAB, 0xAC,
2721 0xA1, 0xA2, 0x9F, 0xA0, 0xA5, 0xA6, 0xA3, 0xA4,
2722 0xB9, 0xBA, 0xB7, 0xB8, 0xBD, 0xBE, 0xBB, 0xBC,
2723 0xB1, 0xB2, 0xAF, 0xB0, 0xB5, 0xB6, 0xB3, 0xB4,
2724 0x8A, 0x8B, 0x88, 0x89, 0x8E, 0x8F, 0x8C, 0x8D,
2725 0x82, 0x83, 0x80, 0x81, 0x86, 0x87, 0x84, 0x85,
2726 0x9A, 0x9B, 0x98, 0x99, 0x9E, 0x9F, 0x9C, 0x9D,
2727 0x92, 0x93, 0x90, 0x91, 0x96, 0x97, 0x94, 0x95,
2728 0xE2, 0xE3, 0xE0, 0xE1, 0xE6, 0xE7, 0xE4, 0xE5,
2729 0xDD, 0xDD, 0xDC, 0xDC, 0xDF, 0xDF, 0xDE, 0xDE,
2730 0xF4, 0xF6, 0xF0, 0xF2, 0xFC, 0xFE, 0xF8, 0xFA,
2731 0xEA, 0xEB, 0xE8, 0xE9, 0xEE, 0xEF, 0xEC, 0xED,
2732 0xC8, 0xC9, 0xC6, 0xC7, 0xCC, 0xCD, 0xCA, 0xCB,
2733 0xC0, 0xC1, 0xBF, 0xBF, 0xC4, 0xC5, 0xC2, 0xC3,
2734 0xD6, 0xD7, 0xD4, 0xD5, 0xDA, 0xDB, 0xD8, 0xD9,
2735 0xCF, 0xCF, 0xCE, 0xCE, 0xD2, 0xD3, 0xD0, 0xD1
2736 };
2737
2738 while (len--)
2739 {
2740 *buff = table_alaw2ulaw[*(unsigned char *)buff];
2741 buff++;
2742 }
2743}
2744
2745static ssize_t ixj_read(struct file * file_p, char __user *buf, size_t length, loff_t * ppos)
2746{
2747 unsigned long i = *ppos;
2748 IXJ * j = get_ixj(NUM(file_p->f_path.dentry->d_inode));
2749
2750 DECLARE_WAITQUEUE(wait, current);
2751
2752 if (j->flags.inread)
2753 return -EALREADY;
2754
2755 j->flags.inread = 1;
2756
2757 add_wait_queue(&j->read_q, &wait);
2758 set_current_state(TASK_INTERRUPTIBLE);
2759 mb();
2760
2761 while (!j->read_buffer_ready || (j->dtmf_state && j->flags.dtmf_oob)) {
2762 ++j->read_wait;
2763 if (file_p->f_flags & O_NONBLOCK) {
2764 set_current_state(TASK_RUNNING);
2765 remove_wait_queue(&j->read_q, &wait);
2766 j->flags.inread = 0;
2767 return -EAGAIN;
2768 }
2769 if (!ixj_hookstate(j)) {
2770 set_current_state(TASK_RUNNING);
2771 remove_wait_queue(&j->read_q, &wait);
2772 j->flags.inread = 0;
2773 return 0;
2774 }
2775 interruptible_sleep_on(&j->read_q);
2776 if (signal_pending(current)) {
2777 set_current_state(TASK_RUNNING);
2778 remove_wait_queue(&j->read_q, &wait);
2779 j->flags.inread = 0;
2780 return -EINTR;
2781 }
2782 }
2783
2784 remove_wait_queue(&j->read_q, &wait);
2785 set_current_state(TASK_RUNNING);
2786 /* Don't ever copy more than the user asks */
2787 if(j->rec_codec == ALAW)
2788 ulaw2alaw(j->read_buffer, min(length, j->read_buffer_size));
2789 i = copy_to_user(buf, j->read_buffer, min(length, j->read_buffer_size));
2790 j->read_buffer_ready = 0;
2791 if (i) {
2792 j->flags.inread = 0;
2793 return -EFAULT;
2794 } else {
2795 j->flags.inread = 0;
2796 return min(length, j->read_buffer_size);
2797 }
2798}
2799
2800static ssize_t ixj_enhanced_read(struct file * file_p, char __user *buf, size_t length,
2801 loff_t * ppos)
2802{
2803 int pre_retval;
2804 ssize_t read_retval = 0;
2805 IXJ *j = get_ixj(NUM(file_p->f_path.dentry->d_inode));
2806
2807 pre_retval = ixj_PreRead(j, 0L);
2808 switch (pre_retval) {
2809 case NORMAL:
2810 read_retval = ixj_read(file_p, buf, length, ppos);
2811 ixj_PostRead(j, 0L);
2812 break;
2813 case NOPOST:
2814 read_retval = ixj_read(file_p, buf, length, ppos);
2815 break;
2816 case POSTONLY:
2817 ixj_PostRead(j, 0L);
2818 break;
2819 default:
2820 read_retval = pre_retval;
2821 }
2822 return read_retval;
2823}
2824
2825static ssize_t ixj_write(struct file *file_p, const char __user *buf, size_t count, loff_t * ppos)
2826{
2827 unsigned long i = *ppos;
2828 IXJ *j = file_p->private_data;
2829
2830 DECLARE_WAITQUEUE(wait, current);
2831
2832 if (j->flags.inwrite)
2833 return -EALREADY;
2834
2835 j->flags.inwrite = 1;
2836
2837 add_wait_queue(&j->write_q, &wait);
2838 set_current_state(TASK_INTERRUPTIBLE);
2839 mb();
2840
2841
2842 while (!j->write_buffers_empty) {
2843 ++j->write_wait;
2844 if (file_p->f_flags & O_NONBLOCK) {
2845 set_current_state(TASK_RUNNING);
2846 remove_wait_queue(&j->write_q, &wait);
2847 j->flags.inwrite = 0;
2848 return -EAGAIN;
2849 }
2850 if (!ixj_hookstate(j)) {
2851 set_current_state(TASK_RUNNING);
2852 remove_wait_queue(&j->write_q, &wait);
2853 j->flags.inwrite = 0;
2854 return 0;
2855 }
2856 interruptible_sleep_on(&j->write_q);
2857 if (signal_pending(current)) {
2858 set_current_state(TASK_RUNNING);
2859 remove_wait_queue(&j->write_q, &wait);
2860 j->flags.inwrite = 0;
2861 return -EINTR;
2862 }
2863 }
2864 set_current_state(TASK_RUNNING);
2865 remove_wait_queue(&j->write_q, &wait);
2866 if (j->write_buffer_wp + count >= j->write_buffer_end)
2867 j->write_buffer_wp = j->write_buffer;
2868 i = copy_from_user(j->write_buffer_wp, buf, min(count, j->write_buffer_size));
2869 if (i) {
2870 j->flags.inwrite = 0;
2871 return -EFAULT;
2872 }
2873 if(j->play_codec == ALAW)
2874 alaw2ulaw(j->write_buffer_wp, min(count, j->write_buffer_size));
2875 j->flags.inwrite = 0;
2876 return min(count, j->write_buffer_size);
2877}
2878
2879static ssize_t ixj_enhanced_write(struct file * file_p, const char __user *buf, size_t count, loff_t * ppos)
2880{
2881 int pre_retval;
2882 ssize_t write_retval = 0;
2883
2884 IXJ *j = get_ixj(NUM(file_p->f_path.dentry->d_inode));
2885
2886 pre_retval = ixj_PreWrite(j, 0L);
2887 switch (pre_retval) {
2888 case NORMAL:
2889 write_retval = ixj_write(file_p, buf, count, ppos);
2890 if (write_retval > 0) {
2891 ixj_PostWrite(j, 0L);
2892 j->write_buffer_wp += write_retval;
2893 j->write_buffers_empty--;
2894 }
2895 break;
2896 case NOPOST:
2897 write_retval = ixj_write(file_p, buf, count, ppos);
2898 if (write_retval > 0) {
2899 j->write_buffer_wp += write_retval;
2900 j->write_buffers_empty--;
2901 }
2902 break;
2903 case POSTONLY:
2904 ixj_PostWrite(j, 0L);
2905 break;
2906 default:
2907 write_retval = pre_retval;
2908 }
2909 return write_retval;
2910}
2911
2912static void ixj_read_frame(IXJ *j)
2913{
2914 int cnt, dly;
2915
2916 if (j->read_buffer) {
2917 for (cnt = 0; cnt < j->rec_frame_size * 2; cnt += 2) {
2918 if (!(cnt % 16) && !IsRxReady(j)) {
2919 dly = 0;
2920 while (!IsRxReady(j)) {
2921 if (dly++ > 5) {
2922 dly = 0;
2923 break;
2924 }
2925 udelay(10);
2926 }
2927 }
2928 /* Throw away word 0 of the 8021 compressed format to get standard G.729. */
2929 if (j->rec_codec == G729 && (cnt == 0 || cnt == 10 || cnt == 20)) {
2930 inb_p(j->DSPbase + 0x0E);
2931 inb_p(j->DSPbase + 0x0F);
2932 }
2933 *(j->read_buffer + cnt) = inb_p(j->DSPbase + 0x0E);
2934 *(j->read_buffer + cnt + 1) = inb_p(j->DSPbase + 0x0F);
2935 }
2936 ++j->framesread;
2937 if (j->intercom != -1) {
2938 if (IsTxReady(get_ixj(j->intercom))) {
2939 for (cnt = 0; cnt < j->rec_frame_size * 2; cnt += 2) {
2940 if (!(cnt % 16) && !IsTxReady(j)) {
2941 dly = 0;
2942 while (!IsTxReady(j)) {
2943 if (dly++ > 5) {
2944 dly = 0;
2945 break;
2946 }
2947 udelay(10);
2948 }
2949 }
2950 outb_p(*(j->read_buffer + cnt), get_ixj(j->intercom)->DSPbase + 0x0C);
2951 outb_p(*(j->read_buffer + cnt + 1), get_ixj(j->intercom)->DSPbase + 0x0D);
2952 }
2953 get_ixj(j->intercom)->frameswritten++;
2954 }
2955 } else {
2956 j->read_buffer_ready = 1;
2957 wake_up_interruptible(&j->read_q); /* Wake any blocked readers */
2958
2959 wake_up_interruptible(&j->poll_q); /* Wake any blocked selects */
2960
2961 if(j->ixj_signals[SIG_READ_READY])
2962 ixj_kill_fasync(j, SIG_READ_READY, POLL_OUT);
2963 }
2964 }
2965}
2966
2967static short fsk[][6][20] =
2968{
2969 {
2970 {
2971 0, 17846, 29934, 32364, 24351, 8481, -10126, -25465, -32587, -29196,
2972 -16384, 1715, 19260, 30591, 32051, 23170, 6813, -11743, -26509, -32722
2973 },
2974 {
2975 -28377, -14876, 3425, 20621, 31163, 31650, 21925, 5126, -13328, -27481,
2976 -32767, -27481, -13328, 5126, 21925, 31650, 31163, 20621, 3425, -14876
2977 },
2978 {
2979 -28377, -32722, -26509, -11743, 6813, 23170, 32051, 30591, 19260, 1715,
2980 -16384, -29196, -32587, -25465, -10126, 8481, 24351, 32364, 29934, 17846
2981 },
2982 {
2983 0, -17846, -29934, -32364, -24351, -8481, 10126, 25465, 32587, 29196,
2984 16384, -1715, -19260, -30591, -32051, -23170, -6813, 11743, 26509, 32722
2985 },
2986 {
2987 28377, 14876, -3425, -20621, -31163, -31650, -21925, -5126, 13328, 27481,
2988 32767, 27481, 13328, -5126, -21925, -31650, -31163, -20621, -3425, 14876
2989 },
2990 {
2991 28377, 32722, 26509, 11743, -6813, -23170, -32051, -30591, -19260, -1715,
2992 16384, 29196, 32587, 25465, 10126, -8481, -24351, -32364, -29934, -17846
2993 }
2994 },
2995 {
2996 {
2997 0, 10126, 19260, 26509, 31163, 32767, 31163, 26509, 19260, 10126,
2998 0, -10126, -19260, -26509, -31163, -32767, -31163, -26509, -19260, -10126
2999 },
3000 {
3001 -28377, -21925, -13328, -3425, 6813, 16384, 24351, 29934, 32587, 32051,
3002 28377, 21925, 13328, 3425, -6813, -16384, -24351, -29934, -32587, -32051
3003 },
3004 {
3005 -28377, -32051, -32587, -29934, -24351, -16384, -6813, 3425, 13328, 21925,
3006 28377, 32051, 32587, 29934, 24351, 16384, 6813, -3425, -13328, -21925
3007 },
3008 {
3009 0, -10126, -19260, -26509, -31163, -32767, -31163, -26509, -19260, -10126,
3010 0, 10126, 19260, 26509, 31163, 32767, 31163, 26509, 19260, 10126
3011 },
3012 {
3013 28377, 21925, 13328, 3425, -6813, -16383, -24351, -29934, -32587, -32051,
3014 -28377, -21925, -13328, -3425, 6813, 16383, 24351, 29934, 32587, 32051
3015 },
3016 {
3017 28377, 32051, 32587, 29934, 24351, 16384, 6813, -3425, -13328, -21925,
3018 -28377, -32051, -32587, -29934, -24351, -16384, -6813, 3425, 13328, 21925
3019 }
3020 }
3021};
3022
3023
3024static void ixj_write_cid_bit(IXJ *j, int bit)
3025{
3026 while (j->fskcnt < 20) {
3027 if(j->fskdcnt < (j->fsksize - 1))
3028 j->fskdata[j->fskdcnt++] = fsk[bit][j->fskz][j->fskcnt];
3029
3030 j->fskcnt += 3;
3031 }
3032 j->fskcnt %= 20;
3033
3034 if (!bit)
3035 j->fskz++;
3036 if (j->fskz >= 6)
3037 j->fskz = 0;
3038
3039}
3040
3041static void ixj_write_cid_byte(IXJ *j, char byte)
3042{
3043 IXJ_CBYTE cb;
3044
3045 cb.cbyte = byte;
3046 ixj_write_cid_bit(j, 0);
3047 ixj_write_cid_bit(j, cb.cbits.b0 ? 1 : 0);
3048 ixj_write_cid_bit(j, cb.cbits.b1 ? 1 : 0);
3049 ixj_write_cid_bit(j, cb.cbits.b2 ? 1 : 0);
3050 ixj_write_cid_bit(j, cb.cbits.b3 ? 1 : 0);
3051 ixj_write_cid_bit(j, cb.cbits.b4 ? 1 : 0);
3052 ixj_write_cid_bit(j, cb.cbits.b5 ? 1 : 0);
3053 ixj_write_cid_bit(j, cb.cbits.b6 ? 1 : 0);
3054 ixj_write_cid_bit(j, cb.cbits.b7 ? 1 : 0);
3055 ixj_write_cid_bit(j, 1);
3056}
3057
3058static void ixj_write_cid_seize(IXJ *j)
3059{
3060 int cnt;
3061
3062 for (cnt = 0; cnt < 150; cnt++) {
3063 ixj_write_cid_bit(j, 0);
3064 ixj_write_cid_bit(j, 1);
3065 }
3066 for (cnt = 0; cnt < 180; cnt++) {
3067 ixj_write_cid_bit(j, 1);
3068 }
3069}
3070
3071static void ixj_write_cidcw_seize(IXJ *j)
3072{
3073 int cnt;
3074
3075 for (cnt = 0; cnt < 80; cnt++) {
3076 ixj_write_cid_bit(j, 1);
3077 }
3078}
3079
3080static int ixj_write_cid_string(IXJ *j, char *s, int checksum)
3081{
3082 int cnt;
3083
3084 for (cnt = 0; cnt < strlen(s); cnt++) {
3085 ixj_write_cid_byte(j, s[cnt]);
3086 checksum = (checksum + s[cnt]);
3087 }
3088 return checksum;
3089}
3090
3091static void ixj_pad_fsk(IXJ *j, int pad)
3092{
3093 int cnt;
3094
3095 for (cnt = 0; cnt < pad; cnt++) {
3096 if(j->fskdcnt < (j->fsksize - 1))
3097 j->fskdata[j->fskdcnt++] = 0x0000;
3098 }
3099 for (cnt = 0; cnt < 720; cnt++) {
3100 if(j->fskdcnt < (j->fsksize - 1))
3101 j->fskdata[j->fskdcnt++] = 0x0000;
3102 }
3103}
3104
3105static void ixj_pre_cid(IXJ *j)
3106{
3107 j->cid_play_codec = j->play_codec;
3108 j->cid_play_frame_size = j->play_frame_size;
3109 j->cid_play_volume = get_play_volume(j);
3110 j->cid_play_flag = j->flags.playing;
3111
3112 j->cid_rec_codec = j->rec_codec;
3113 j->cid_rec_volume = get_rec_volume(j);
3114 j->cid_rec_flag = j->flags.recording;
3115
3116 j->cid_play_aec_level = j->aec_level;
3117
3118 switch(j->baseframe.low) {
3119 case 0xA0:
3120 j->cid_base_frame_size = 20;
3121 break;
3122 case 0x50:
3123 j->cid_base_frame_size = 10;
3124 break;
3125 case 0xF0:
3126 j->cid_base_frame_size = 30;
3127 break;
3128 }
3129
3130 ixj_play_stop(j);
3131 ixj_cpt_stop(j);
3132
3133 j->flags.cidplay = 1;
3134
3135 set_base_frame(j, 30);
3136 set_play_codec(j, LINEAR16);
3137 set_play_volume(j, 0x1B);
3138 ixj_play_start(j);
3139}
3140
3141static void ixj_post_cid(IXJ *j)
3142{
3143 ixj_play_stop(j);
3144
3145 if(j->cidsize > 5000) {
3146 SLIC_SetState(PLD_SLIC_STATE_STANDBY, j);
3147 }
3148 j->flags.cidplay = 0;
3149 if(ixjdebug & 0x0200) {
3150 printk("IXJ phone%d Finished Playing CallerID data %ld\n", j->board, jiffies);
3151 }
3152
3153 ixj_fsk_free(j);
3154
3155 j->fskdcnt = 0;
3156 set_base_frame(j, j->cid_base_frame_size);
3157 set_play_codec(j, j->cid_play_codec);
3158 ixj_aec_start(j, j->cid_play_aec_level);
3159 set_play_volume(j, j->cid_play_volume);
3160
3161 set_rec_codec(j, j->cid_rec_codec);
3162 set_rec_volume(j, j->cid_rec_volume);
3163
3164 if(j->cid_rec_flag)
3165 ixj_record_start(j);
3166
3167 if(j->cid_play_flag)
3168 ixj_play_start(j);
3169
3170 if(j->cid_play_flag) {
3171 wake_up_interruptible(&j->write_q); /* Wake any blocked writers */
3172 }
3173}
3174
3175static void ixj_write_cid(IXJ *j)
3176{
3177 char sdmf1[50];
3178 char sdmf2[50];
3179 char sdmf3[80];
3180 char mdmflen, len1, len2, len3;
3181 int pad;
3182
3183 int checksum = 0;
3184
3185 if (j->dsp.low == 0x20 || j->flags.cidplay)
3186 return;
3187
3188 j->fskz = j->fskphase = j->fskcnt = j->fskdcnt = 0;
3189 j->cidsize = j->cidcnt = 0;
3190
3191 ixj_fsk_alloc(j);
3192
3193 strcpy(sdmf1, j->cid_send.month);
3194 strcat(sdmf1, j->cid_send.day);
3195 strcat(sdmf1, j->cid_send.hour);
3196 strcat(sdmf1, j->cid_send.min);
3197 strcpy(sdmf2, j->cid_send.number);
3198 strcpy(sdmf3, j->cid_send.name);
3199
3200 len1 = strlen(sdmf1);
3201 len2 = strlen(sdmf2);
3202 len3 = strlen(sdmf3);
3203 mdmflen = len1 + len2 + len3 + 6;
3204
3205 while(1){
3206 ixj_write_cid_seize(j);
3207
3208 ixj_write_cid_byte(j, 0x80);
3209 checksum = 0x80;
3210 ixj_write_cid_byte(j, mdmflen);
3211 checksum = checksum + mdmflen;
3212
3213 ixj_write_cid_byte(j, 0x01);
3214 checksum = checksum + 0x01;
3215 ixj_write_cid_byte(j, len1);
3216 checksum = checksum + len1;
3217 checksum = ixj_write_cid_string(j, sdmf1, checksum);
3218 if(ixj_hookstate(j) & 1)
3219 break;
3220
3221 ixj_write_cid_byte(j, 0x02);
3222 checksum = checksum + 0x02;
3223 ixj_write_cid_byte(j, len2);
3224 checksum = checksum + len2;
3225 checksum = ixj_write_cid_string(j, sdmf2, checksum);
3226 if(ixj_hookstate(j) & 1)
3227 break;
3228
3229 ixj_write_cid_byte(j, 0x07);
3230 checksum = checksum + 0x07;
3231 ixj_write_cid_byte(j, len3);
3232 checksum = checksum + len3;
3233 checksum = ixj_write_cid_string(j, sdmf3, checksum);
3234 if(ixj_hookstate(j) & 1)
3235 break;
3236
3237 checksum %= 256;
3238 checksum ^= 0xFF;
3239 checksum += 1;
3240
3241 ixj_write_cid_byte(j, (char) checksum);
3242
3243 pad = j->fskdcnt % 240;
3244 if (pad) {
3245 pad = 240 - pad;
3246 }
3247 ixj_pad_fsk(j, pad);
3248 break;
3249 }
3250
3251 ixj_write_frame(j);
3252}
3253
3254static void ixj_write_cidcw(IXJ *j)
3255{
3256 IXJ_TONE ti;
3257
3258 char sdmf1[50];
3259 char sdmf2[50];
3260 char sdmf3[80];
3261 char mdmflen, len1, len2, len3;
3262 int pad;
3263
3264 int checksum = 0;
3265
3266 if (j->dsp.low == 0x20 || j->flags.cidplay)
3267 return;
3268
3269 j->fskz = j->fskphase = j->fskcnt = j->fskdcnt = 0;
3270 j->cidsize = j->cidcnt = 0;
3271
3272 ixj_fsk_alloc(j);
3273
3274 j->flags.cidcw_ack = 0;
3275
3276 ti.tone_index = 23;
3277 ti.gain0 = 1;
3278 ti.freq0 = hz440;
3279 ti.gain1 = 0;
3280 ti.freq1 = 0;
3281 ixj_init_tone(j, &ti);
3282
3283 ixj_set_tone_on(1500, j);
3284 ixj_set_tone_off(32, j);
3285 if(ixjdebug & 0x0200) {
3286 printk("IXJ cidcw phone%d first tone start at %ld\n", j->board, jiffies);
3287 }
3288 ixj_play_tone(j, 23);
3289
3290 clear_bit(j->board, &j->busyflags);
3291 while(j->tone_state)
3292 schedule_timeout_interruptible(1);
3293 while(test_and_set_bit(j->board, (void *)&j->busyflags) != 0)
3294 schedule_timeout_interruptible(1);
3295 if(ixjdebug & 0x0200) {
3296 printk("IXJ cidcw phone%d first tone end at %ld\n", j->board, jiffies);
3297 }
3298
3299 ti.tone_index = 24;
3300 ti.gain0 = 1;
3301 ti.freq0 = hz2130;
3302 ti.gain1 = 0;
3303 ti.freq1 = hz2750;
3304 ixj_init_tone(j, &ti);
3305
3306 ixj_set_tone_off(10, j);
3307 ixj_set_tone_on(600, j);
3308 if(ixjdebug & 0x0200) {
3309 printk("IXJ cidcw phone%d second tone start at %ld\n", j->board, jiffies);
3310 }
3311 ixj_play_tone(j, 24);
3312
3313 clear_bit(j->board, &j->busyflags);
3314 while(j->tone_state)
3315 schedule_timeout_interruptible(1);
3316 while(test_and_set_bit(j->board, (void *)&j->busyflags) != 0)
3317 schedule_timeout_interruptible(1);
3318 if(ixjdebug & 0x0200) {
3319 printk("IXJ cidcw phone%d sent second tone at %ld\n", j->board, jiffies);
3320 }
3321
3322 j->cidcw_wait = jiffies + ((50 * hertz) / 100);
3323
3324 clear_bit(j->board, &j->busyflags);
3325 while(!j->flags.cidcw_ack && time_before(jiffies, j->cidcw_wait))
3326 schedule_timeout_interruptible(1);
3327 while(test_and_set_bit(j->board, (void *)&j->busyflags) != 0)
3328 schedule_timeout_interruptible(1);
3329 j->cidcw_wait = 0;
3330 if(!j->flags.cidcw_ack) {
3331 if(ixjdebug & 0x0200) {
3332 printk("IXJ cidcw phone%d did not receive ACK from display %ld\n", j->board, jiffies);
3333 }
3334 ixj_post_cid(j);
3335 if(j->cid_play_flag) {
3336 wake_up_interruptible(&j->write_q); /* Wake any blocked readers */
3337 }
3338 return;
3339 } else {
3340 ixj_pre_cid(j);
3341 }
3342 j->flags.cidcw_ack = 0;
3343 strcpy(sdmf1, j->cid_send.month);
3344 strcat(sdmf1, j->cid_send.day);
3345 strcat(sdmf1, j->cid_send.hour);
3346 strcat(sdmf1, j->cid_send.min);
3347 strcpy(sdmf2, j->cid_send.number);
3348 strcpy(sdmf3, j->cid_send.name);
3349
3350 len1 = strlen(sdmf1);
3351 len2 = strlen(sdmf2);
3352 len3 = strlen(sdmf3);
3353 mdmflen = len1 + len2 + len3 + 6;
3354
3355 ixj_write_cidcw_seize(j);
3356
3357 ixj_write_cid_byte(j, 0x80);
3358 checksum = 0x80;
3359 ixj_write_cid_byte(j, mdmflen);
3360 checksum = checksum + mdmflen;
3361
3362 ixj_write_cid_byte(j, 0x01);
3363 checksum = checksum + 0x01;
3364 ixj_write_cid_byte(j, len1);
3365 checksum = checksum + len1;
3366 checksum = ixj_write_cid_string(j, sdmf1, checksum);
3367
3368 ixj_write_cid_byte(j, 0x02);
3369 checksum = checksum + 0x02;
3370 ixj_write_cid_byte(j, len2);
3371 checksum = checksum + len2;
3372 checksum = ixj_write_cid_string(j, sdmf2, checksum);
3373
3374 ixj_write_cid_byte(j, 0x07);
3375 checksum = checksum + 0x07;
3376 ixj_write_cid_byte(j, len3);
3377 checksum = checksum + len3;
3378 checksum = ixj_write_cid_string(j, sdmf3, checksum);
3379
3380 checksum %= 256;
3381 checksum ^= 0xFF;
3382 checksum += 1;
3383
3384 ixj_write_cid_byte(j, (char) checksum);
3385
3386 pad = j->fskdcnt % 240;
3387 if (pad) {
3388 pad = 240 - pad;
3389 }
3390 ixj_pad_fsk(j, pad);
3391 if(ixjdebug & 0x0200) {
3392 printk("IXJ cidcw phone%d sent FSK data at %ld\n", j->board, jiffies);
3393 }
3394}
3395
3396static void ixj_write_vmwi(IXJ *j, int msg)
3397{
3398 char mdmflen;
3399 int pad;
3400
3401 int checksum = 0;
3402
3403 if (j->dsp.low == 0x20 || j->flags.cidplay)
3404 return;
3405
3406 j->fskz = j->fskphase = j->fskcnt = j->fskdcnt = 0;
3407 j->cidsize = j->cidcnt = 0;
3408
3409 ixj_fsk_alloc(j);
3410
3411 mdmflen = 3;
3412
3413 if (j->port == PORT_POTS)
3414 SLIC_SetState(PLD_SLIC_STATE_OHT, j);
3415
3416 ixj_write_cid_seize(j);
3417
3418 ixj_write_cid_byte(j, 0x82);
3419 checksum = 0x82;
3420 ixj_write_cid_byte(j, mdmflen);
3421 checksum = checksum + mdmflen;
3422
3423 ixj_write_cid_byte(j, 0x0B);
3424 checksum = checksum + 0x0B;
3425 ixj_write_cid_byte(j, 1);
3426 checksum = checksum + 1;
3427
3428 if(msg) {
3429 ixj_write_cid_byte(j, 0xFF);
3430 checksum = checksum + 0xFF;
3431 }
3432 else {
3433 ixj_write_cid_byte(j, 0x00);
3434 checksum = checksum + 0x00;
3435 }
3436
3437 checksum %= 256;
3438 checksum ^= 0xFF;
3439 checksum += 1;
3440
3441 ixj_write_cid_byte(j, (char) checksum);
3442
3443 pad = j->fskdcnt % 240;
3444 if (pad) {
3445 pad = 240 - pad;
3446 }
3447 ixj_pad_fsk(j, pad);
3448}
3449
3450static void ixj_write_frame(IXJ *j)
3451{
3452 int cnt, frame_count, dly;
3453 IXJ_WORD dat;
3454
3455 frame_count = 0;
3456 if(j->flags.cidplay) {
3457 for(cnt = 0; cnt < 480; cnt++) {
3458 if (!(cnt % 16) && !IsTxReady(j)) {
3459 dly = 0;
3460 while (!IsTxReady(j)) {
3461 if (dly++ > 5) {
3462 dly = 0;
3463 break;
3464 }
3465 udelay(10);
3466 }
3467 }
3468 dat.word = j->fskdata[j->cidcnt++];
3469 outb_p(dat.bytes.low, j->DSPbase + 0x0C);
3470 outb_p(dat.bytes.high, j->DSPbase + 0x0D);
3471 cnt++;
3472 }
3473 if(j->cidcnt >= j->fskdcnt) {
3474 ixj_post_cid(j);
3475 }
3476 /* This may seem rude, but if we just played one frame of FSK data for CallerID
3477 and there is real audio data in the buffer, we need to throw it away because
3478 we just used it's time slot */
3479 if (j->write_buffer_rp > j->write_buffer_wp) {
3480 j->write_buffer_rp += j->cid_play_frame_size * 2;
3481 if (j->write_buffer_rp >= j->write_buffer_end) {
3482 j->write_buffer_rp = j->write_buffer;
3483 }
3484 j->write_buffers_empty++;
3485 wake_up_interruptible(&j->write_q); /* Wake any blocked writers */
3486
3487 wake_up_interruptible(&j->poll_q); /* Wake any blocked selects */
3488 }
3489 } else if (j->write_buffer && j->write_buffers_empty < 1) {
3490 if (j->write_buffer_wp > j->write_buffer_rp) {
3491 frame_count =
3492 (j->write_buffer_wp - j->write_buffer_rp) / (j->play_frame_size * 2);
3493 }
3494 if (j->write_buffer_rp > j->write_buffer_wp) {
3495 frame_count =
3496 (j->write_buffer_wp - j->write_buffer) / (j->play_frame_size * 2) +
3497 (j->write_buffer_end - j->write_buffer_rp) / (j->play_frame_size * 2);
3498 }
3499 if (frame_count >= 1) {
3500 if (j->ver.low == 0x12 && j->play_mode && j->flags.play_first_frame) {
3501 BYTES blankword;
3502
3503 switch (j->play_mode) {
3504 case PLAYBACK_MODE_ULAW:
3505 case PLAYBACK_MODE_ALAW:
3506 blankword.low = blankword.high = 0xFF;
3507 break;
3508 case PLAYBACK_MODE_8LINEAR:
3509 case PLAYBACK_MODE_16LINEAR:
3510 default:
3511 blankword.low = blankword.high = 0x00;
3512 break;
3513 case PLAYBACK_MODE_8LINEAR_WSS:
3514 blankword.low = blankword.high = 0x80;
3515 break;
3516 }
3517 for (cnt = 0; cnt < 16; cnt++) {
3518 if (!(cnt % 16) && !IsTxReady(j)) {
3519 dly = 0;
3520 while (!IsTxReady(j)) {
3521 if (dly++ > 5) {
3522 dly = 0;
3523 break;
3524 }
3525 udelay(10);
3526 }
3527 }
3528 outb_p((blankword.low), j->DSPbase + 0x0C);
3529 outb_p((blankword.high), j->DSPbase + 0x0D);
3530 }
3531 j->flags.play_first_frame = 0;
3532 } else if (j->play_codec == G723_63 && j->flags.play_first_frame) {
3533 for (cnt = 0; cnt < 24; cnt++) {
3534 BYTES blankword;
3535
3536 if(cnt == 12) {
3537 blankword.low = 0x02;
3538 blankword.high = 0x00;
3539 }
3540 else {
3541 blankword.low = blankword.high = 0x00;
3542 }
3543 if (!(cnt % 16) && !IsTxReady(j)) {
3544 dly = 0;
3545 while (!IsTxReady(j)) {
3546 if (dly++ > 5) {
3547 dly = 0;
3548 break;
3549 }
3550 udelay(10);
3551 }
3552 }
3553 outb_p((blankword.low), j->DSPbase + 0x0C);
3554 outb_p((blankword.high), j->DSPbase + 0x0D);
3555 }
3556 j->flags.play_first_frame = 0;
3557 }
3558 for (cnt = 0; cnt < j->play_frame_size * 2; cnt += 2) {
3559 if (!(cnt % 16) && !IsTxReady(j)) {
3560 dly = 0;
3561 while (!IsTxReady(j)) {
3562 if (dly++ > 5) {
3563 dly = 0;
3564 break;
3565 }
3566 udelay(10);
3567 }
3568 }
3569 /* Add word 0 to G.729 frames for the 8021. Right now we don't do VAD/CNG */
3570 if (j->play_codec == G729 && (cnt == 0 || cnt == 10 || cnt == 20)) {
3571 if (j->write_buffer_rp[cnt] == 0 &&
3572 j->write_buffer_rp[cnt + 1] == 0 &&
3573 j->write_buffer_rp[cnt + 2] == 0 &&
3574 j->write_buffer_rp[cnt + 3] == 0 &&
3575 j->write_buffer_rp[cnt + 4] == 0 &&
3576 j->write_buffer_rp[cnt + 5] == 0 &&
3577 j->write_buffer_rp[cnt + 6] == 0 &&
3578 j->write_buffer_rp[cnt + 7] == 0 &&
3579 j->write_buffer_rp[cnt + 8] == 0 &&
3580 j->write_buffer_rp[cnt + 9] == 0) {
3581 /* someone is trying to write silence lets make this a type 0 frame. */
3582 outb_p(0x00, j->DSPbase + 0x0C);
3583 outb_p(0x00, j->DSPbase + 0x0D);
3584 } else {
3585 /* so all other frames are type 1. */
3586 outb_p(0x01, j->DSPbase + 0x0C);
3587 outb_p(0x00, j->DSPbase + 0x0D);
3588 }
3589 }
3590 outb_p(*(j->write_buffer_rp + cnt), j->DSPbase + 0x0C);
3591 outb_p(*(j->write_buffer_rp + cnt + 1), j->DSPbase + 0x0D);
3592 *(j->write_buffer_rp + cnt) = 0;
3593 *(j->write_buffer_rp + cnt + 1) = 0;
3594 }
3595 j->write_buffer_rp += j->play_frame_size * 2;
3596 if (j->write_buffer_rp >= j->write_buffer_end) {
3597 j->write_buffer_rp = j->write_buffer;
3598 }
3599 j->write_buffers_empty++;
3600 wake_up_interruptible(&j->write_q); /* Wake any blocked writers */
3601
3602 wake_up_interruptible(&j->poll_q); /* Wake any blocked selects */
3603
3604 ++j->frameswritten;
3605 }
3606 } else {
3607 j->drybuffer++;
3608 }
3609 if(j->ixj_signals[SIG_WRITE_READY]) {
3610 ixj_kill_fasync(j, SIG_WRITE_READY, POLL_OUT);
3611 }
3612}
3613
3614static int idle(IXJ *j)
3615{
3616 if (ixj_WriteDSPCommand(0x0000, j)) /* DSP Idle */
3617
3618 return 0;
3619
3620 if (j->ssr.high || j->ssr.low) {
3621 return 0;
3622 } else {
3623 j->play_mode = -1;
3624 j->flags.playing = 0;
3625 j->rec_mode = -1;
3626 j->flags.recording = 0;
3627 return 1;
3628 }
3629}
3630
3631static int set_base_frame(IXJ *j, int size)
3632{
3633 unsigned short cmd;
3634 int cnt;
3635
3636 idle(j);
3637 j->cid_play_aec_level = j->aec_level;
3638 aec_stop(j);
3639 for (cnt = 0; cnt < 10; cnt++) {
3640 if (idle(j))
3641 break;
3642 }
3643 if (j->ssr.high || j->ssr.low)
3644 return -1;
3645 if (j->dsp.low != 0x20) {
3646 switch (size) {
3647 case 30:
3648 cmd = 0x07F0;
3649 /* Set Base Frame Size to 240 pg9-10 8021 */
3650 break;
3651 case 20:
3652 cmd = 0x07A0;
3653 /* Set Base Frame Size to 160 pg9-10 8021 */
3654 break;
3655 case 10:
3656 cmd = 0x0750;
3657 /* Set Base Frame Size to 80 pg9-10 8021 */
3658 break;
3659 default:
3660 return -1;
3661 }
3662 } else {
3663 if (size == 30)
3664 return size;
3665 else
3666 return -1;
3667 }
3668 if (ixj_WriteDSPCommand(cmd, j)) {
3669 j->baseframe.high = j->baseframe.low = 0xFF;
3670 return -1;
3671 } else {
3672 j->baseframe.high = j->ssr.high;
3673 j->baseframe.low = j->ssr.low;
3674 /* If the status returned is 0x0000 (pg9-9 8021) the call failed */
3675 if(j->baseframe.high == 0x00 && j->baseframe.low == 0x00) {
3676 return -1;
3677 }
3678 }
3679 ixj_aec_start(j, j->cid_play_aec_level);
3680 return size;
3681}
3682
3683static int set_rec_codec(IXJ *j, int rate)
3684{
3685 int retval = 0;
3686
3687 j->rec_codec = rate;
3688
3689 switch (rate) {
3690 case G723_63:
3691 if (j->ver.low != 0x12 || ixj_convert_loaded) {
3692 j->rec_frame_size = 12;
3693 j->rec_mode = 0;
3694 } else {
3695 retval = 1;
3696 }
3697 break;
3698 case G723_53:
3699 if (j->ver.low != 0x12 || ixj_convert_loaded) {
3700 j->rec_frame_size = 10;
3701 j->rec_mode = 0;
3702 } else {
3703 retval = 1;
3704 }
3705 break;
3706 case TS85:
3707 if (j->dsp.low == 0x20 || j->flags.ts85_loaded) {
3708 j->rec_frame_size = 16;
3709 j->rec_mode = 0;
3710 } else {
3711 retval = 1;
3712 }
3713 break;
3714 case TS48:
3715 if (j->ver.low != 0x12 || ixj_convert_loaded) {
3716 j->rec_frame_size = 9;
3717 j->rec_mode = 0;
3718 } else {
3719 retval = 1;
3720 }
3721 break;
3722 case TS41:
3723 if (j->ver.low != 0x12 || ixj_convert_loaded) {
3724 j->rec_frame_size = 8;
3725 j->rec_mode = 0;
3726 } else {
3727 retval = 1;
3728 }
3729 break;
3730 case G728:
3731 if (j->dsp.low != 0x20) {
3732 j->rec_frame_size = 48;
3733 j->rec_mode = 0;
3734 } else {
3735 retval = 1;
3736 }
3737 break;
3738 case G729:
3739 if (j->dsp.low != 0x20) {
3740 if (!j->flags.g729_loaded) {
3741 retval = 1;
3742 break;
3743 }
3744 switch (j->baseframe.low) {
3745 case 0xA0:
3746 j->rec_frame_size = 10;
3747 break;
3748 case 0x50:
3749 j->rec_frame_size = 5;
3750 break;
3751 default:
3752 j->rec_frame_size = 15;
3753 break;
3754 }
3755 j->rec_mode = 0;
3756 } else {
3757 retval = 1;
3758 }
3759 break;
3760 case G729B:
3761 if (j->dsp.low != 0x20) {
3762 if (!j->flags.g729_loaded) {
3763 retval = 1;
3764 break;
3765 }
3766 switch (j->baseframe.low) {
3767 case 0xA0:
3768 j->rec_frame_size = 12;
3769 break;
3770 case 0x50:
3771 j->rec_frame_size = 6;
3772 break;
3773 default:
3774 j->rec_frame_size = 18;
3775 break;
3776 }
3777 j->rec_mode = 0;
3778 } else {
3779 retval = 1;
3780 }
3781 break;
3782 case ULAW:
3783 switch (j->baseframe.low) {
3784 case 0xA0:
3785 j->rec_frame_size = 80;
3786 break;
3787 case 0x50:
3788 j->rec_frame_size = 40;
3789 break;
3790 default:
3791 j->rec_frame_size = 120;
3792 break;
3793 }
3794 j->rec_mode = 4;
3795 break;
3796 case ALAW:
3797 switch (j->baseframe.low) {
3798 case 0xA0:
3799 j->rec_frame_size = 80;
3800 break;
3801 case 0x50:
3802 j->rec_frame_size = 40;
3803 break;
3804 default:
3805 j->rec_frame_size = 120;
3806 break;
3807 }
3808 j->rec_mode = 4;
3809 break;
3810 case LINEAR16:
3811 switch (j->baseframe.low) {
3812 case 0xA0:
3813 j->rec_frame_size = 160;
3814 break;
3815 case 0x50:
3816 j->rec_frame_size = 80;
3817 break;
3818 default:
3819 j->rec_frame_size = 240;
3820 break;
3821 }
3822 j->rec_mode = 5;
3823 break;
3824 case LINEAR8:
3825 switch (j->baseframe.low) {
3826 case 0xA0:
3827 j->rec_frame_size = 80;
3828 break;
3829 case 0x50:
3830 j->rec_frame_size = 40;
3831 break;
3832 default:
3833 j->rec_frame_size = 120;
3834 break;
3835 }
3836 j->rec_mode = 6;
3837 break;
3838 case WSS:
3839 switch (j->baseframe.low) {
3840 case 0xA0:
3841 j->rec_frame_size = 80;
3842 break;
3843 case 0x50:
3844 j->rec_frame_size = 40;
3845 break;
3846 default:
3847 j->rec_frame_size = 120;
3848 break;
3849 }
3850 j->rec_mode = 7;
3851 break;
3852 default:
3853 kfree(j->read_buffer);
3854 j->rec_frame_size = 0;
3855 j->rec_mode = -1;
3856 j->read_buffer = NULL;
3857 j->read_buffer_size = 0;
3858 retval = 1;
3859 break;
3860 }
3861 return retval;
3862}
3863
3864static int ixj_record_start(IXJ *j)
3865{
3866 unsigned short cmd = 0x0000;
3867
3868 if (j->read_buffer) {
3869 ixj_record_stop(j);
3870 }
3871 j->flags.recording = 1;
3872 ixj_WriteDSPCommand(0x0FE0, j); /* Put the DSP in full power mode. */
3873
3874 if(ixjdebug & 0x0002)
3875 printk("IXJ %d Starting Record Codec %d at %ld\n", j->board, j->rec_codec, jiffies);
3876
3877 if (!j->rec_mode) {
3878 switch (j->rec_codec) {
3879 case G723_63:
3880 cmd = 0x5131;
3881 break;
3882 case G723_53:
3883 cmd = 0x5132;
3884 break;
3885 case TS85:
3886 cmd = 0x5130; /* TrueSpeech 8.5 */
3887
3888 break;
3889 case TS48:
3890 cmd = 0x5133; /* TrueSpeech 4.8 */
3891
3892 break;
3893 case TS41:
3894 cmd = 0x5134; /* TrueSpeech 4.1 */
3895
3896 break;
3897 case G728:
3898 cmd = 0x5135;
3899 break;
3900 case G729:
3901 case G729B:
3902 cmd = 0x5136;
3903 break;
3904 default:
3905 return 1;
3906 }
3907 if (ixj_WriteDSPCommand(cmd, j))
3908 return -1;
3909 }
3910 if (!j->read_buffer) {
3911 if (!j->read_buffer)
3912 j->read_buffer = kmalloc(j->rec_frame_size * 2, GFP_ATOMIC);
3913 if (!j->read_buffer) {
3914 printk("Read buffer allocation for ixj board %d failed!\n", j->board);
3915 return -ENOMEM;
3916 }
3917 }
3918 j->read_buffer_size = j->rec_frame_size * 2;
3919
3920 if (ixj_WriteDSPCommand(0x5102, j)) /* Set Poll sync mode */
3921
3922 return -1;
3923
3924 switch (j->rec_mode) {
3925 case 0:
3926 cmd = 0x1C03; /* Record C1 */
3927
3928 break;
3929 case 4:
3930 if (j->ver.low == 0x12) {
3931 cmd = 0x1E03; /* Record C1 */
3932
3933 } else {
3934 cmd = 0x1E01; /* Record C1 */
3935
3936 }
3937 break;
3938 case 5:
3939 if (j->ver.low == 0x12) {
3940 cmd = 0x1E83; /* Record C1 */
3941
3942 } else {
3943 cmd = 0x1E81; /* Record C1 */
3944
3945 }
3946 break;
3947 case 6:
3948 if (j->ver.low == 0x12) {
3949 cmd = 0x1F03; /* Record C1 */
3950
3951 } else {
3952 cmd = 0x1F01; /* Record C1 */
3953
3954 }
3955 break;
3956 case 7:
3957 if (j->ver.low == 0x12) {
3958 cmd = 0x1F83; /* Record C1 */
3959 } else {
3960 cmd = 0x1F81; /* Record C1 */
3961 }
3962 break;
3963 }
3964 if (ixj_WriteDSPCommand(cmd, j))
3965 return -1;
3966
3967 if (j->flags.playing) {
3968 ixj_aec_start(j, j->aec_level);
3969 }
3970 return 0;
3971}
3972
3973static void ixj_record_stop(IXJ *j)
3974{
3975 if (ixjdebug & 0x0002)
3976 printk("IXJ %d Stopping Record Codec %d at %ld\n", j->board, j->rec_codec, jiffies);
3977
3978 kfree(j->read_buffer);
3979 j->read_buffer = NULL;
3980 j->read_buffer_size = 0;
3981 if (j->rec_mode > -1) {
3982 ixj_WriteDSPCommand(0x5120, j);
3983 j->rec_mode = -1;
3984 }
3985 j->flags.recording = 0;
3986}
3987static void ixj_vad(IXJ *j, int arg)
3988{
3989 if (arg)
3990 ixj_WriteDSPCommand(0x513F, j);
3991 else
3992 ixj_WriteDSPCommand(0x513E, j);
3993}
3994
3995static void set_rec_depth(IXJ *j, int depth)
3996{
3997 if (depth > 60)
3998 depth = 60;
3999 if (depth < 0)
4000 depth = 0;
4001 ixj_WriteDSPCommand(0x5180 + depth, j);
4002}
4003
4004static void set_dtmf_prescale(IXJ *j, int volume)
4005{
4006 ixj_WriteDSPCommand(0xCF07, j);
4007 ixj_WriteDSPCommand(volume, j);
4008}
4009
4010static int get_dtmf_prescale(IXJ *j)
4011{
4012 ixj_WriteDSPCommand(0xCF05, j);
4013 return j->ssr.high << 8 | j->ssr.low;
4014}
4015
4016static void set_rec_volume(IXJ *j, int volume)
4017{
4018 if(j->aec_level == AEC_AGC) {
4019 if (ixjdebug & 0x0002)
4020 printk(KERN_INFO "IXJ: /dev/phone%d Setting AGC Threshold to 0x%4.4x\n", j->board, volume);
4021 ixj_WriteDSPCommand(0xCF96, j);
4022 ixj_WriteDSPCommand(volume, j);
4023 } else {
4024 if (ixjdebug & 0x0002)
4025 printk(KERN_INFO "IXJ: /dev/phone %d Setting Record Volume to 0x%4.4x\n", j->board, volume);
4026 ixj_WriteDSPCommand(0xCF03, j);
4027 ixj_WriteDSPCommand(volume, j);
4028 }
4029}
4030
4031static int set_rec_volume_linear(IXJ *j, int volume)
4032{
4033 int newvolume, dsprecmax;
4034
4035 if (ixjdebug & 0x0002)
4036 printk(KERN_INFO "IXJ: /dev/phone %d Setting Linear Record Volume to 0x%4.4x\n", j->board, volume);
4037 if(volume > 100 || volume < 0) {
4038 return -1;
4039 }
4040
4041 /* This should normalize the perceived volumes between the different cards caused by differences in the hardware */
4042 switch (j->cardtype) {
4043 case QTI_PHONEJACK:
4044 dsprecmax = 0x440;
4045 break;
4046 case QTI_LINEJACK:
4047 dsprecmax = 0x180;
4048 ixj_mixer(0x0203, j); /*Voice Left Volume unmute 6db */
4049 ixj_mixer(0x0303, j); /*Voice Right Volume unmute 6db */
4050 ixj_mixer(0x0C00, j); /*Mono1 unmute 12db */
4051 break;
4052 case QTI_PHONEJACK_LITE:
4053 dsprecmax = 0x4C0;
4054 break;
4055 case QTI_PHONEJACK_PCI:
4056 dsprecmax = 0x100;
4057 break;
4058 case QTI_PHONECARD:
4059 dsprecmax = 0x400;
4060 break;
4061 default:
4062 return -1;
4063 }
4064 newvolume = (dsprecmax * volume) / 100;
4065 set_rec_volume(j, newvolume);
4066 return 0;
4067}
4068
4069static int get_rec_volume(IXJ *j)
4070{
4071 if(j->aec_level == AEC_AGC) {
4072 if (ixjdebug & 0x0002)
4073 printk(KERN_INFO "Getting AGC Threshold\n");
4074 ixj_WriteDSPCommand(0xCF86, j);
4075 if (ixjdebug & 0x0002)
4076 printk(KERN_INFO "AGC Threshold is 0x%2.2x%2.2x\n", j->ssr.high, j->ssr.low);
4077 return j->ssr.high << 8 | j->ssr.low;
4078 } else {
4079 if (ixjdebug & 0x0002)
4080 printk(KERN_INFO "Getting Record Volume\n");
4081 ixj_WriteDSPCommand(0xCF01, j);
4082 return j->ssr.high << 8 | j->ssr.low;
4083 }
4084}
4085
4086static int get_rec_volume_linear(IXJ *j)
4087{
4088 int volume, newvolume, dsprecmax;
4089
4090 switch (j->cardtype) {
4091 case QTI_PHONEJACK:
4092 dsprecmax = 0x440;
4093 break;
4094 case QTI_LINEJACK:
4095 dsprecmax = 0x180;
4096 break;
4097 case QTI_PHONEJACK_LITE:
4098 dsprecmax = 0x4C0;
4099 break;
4100 case QTI_PHONEJACK_PCI:
4101 dsprecmax = 0x100;
4102 break;
4103 case QTI_PHONECARD:
4104 dsprecmax = 0x400;
4105 break;
4106 default:
4107 return -1;
4108 }
4109 volume = get_rec_volume(j);
4110 newvolume = (volume * 100) / dsprecmax;
4111 if(newvolume > 100)
4112 newvolume = 100;
4113 return newvolume;
4114}
4115
4116static int get_rec_level(IXJ *j)
4117{
4118 int retval;
4119
4120 ixj_WriteDSPCommand(0xCF88, j);
4121
4122 retval = j->ssr.high << 8 | j->ssr.low;
4123 retval = (retval * 256) / 240;
4124 return retval;
4125}
4126
4127static void ixj_aec_start(IXJ *j, int level)
4128{
4129 j->aec_level = level;
4130 if (ixjdebug & 0x0002)
4131 printk(KERN_INFO "AGC set = 0x%2.2x\n", j->aec_level);
4132 if (!level) {
4133 aec_stop(j);
4134 } else {
4135 if (j->rec_codec == G729 || j->play_codec == G729 || j->rec_codec == G729B || j->play_codec == G729B) {
4136 ixj_WriteDSPCommand(0xE022, j); /* Move AEC filter buffer */
4137
4138 ixj_WriteDSPCommand(0x0300, j);
4139 }
4140 ixj_WriteDSPCommand(0xB001, j); /* AEC On */
4141
4142 ixj_WriteDSPCommand(0xE013, j); /* Advanced AEC C1 */
4143
4144 switch (level) {
4145 case AEC_LOW:
4146 ixj_WriteDSPCommand(0x0000, j); /* Advanced AEC C2 = off */
4147
4148 ixj_WriteDSPCommand(0xE011, j);
4149 ixj_WriteDSPCommand(0xFFFF, j);
4150
4151 ixj_WriteDSPCommand(0xCF97, j); /* Set AGC Enable */
4152 ixj_WriteDSPCommand(0x0000, j); /* to off */
4153
4154 break;
4155
4156 case AEC_MED:
4157 ixj_WriteDSPCommand(0x0600, j); /* Advanced AEC C2 = on medium */
4158
4159 ixj_WriteDSPCommand(0xE011, j);
4160 ixj_WriteDSPCommand(0x0080, j);
4161
4162 ixj_WriteDSPCommand(0xCF97, j); /* Set AGC Enable */
4163 ixj_WriteDSPCommand(0x0000, j); /* to off */
4164
4165 break;
4166
4167 case AEC_HIGH:
4168 ixj_WriteDSPCommand(0x0C00, j); /* Advanced AEC C2 = on high */
4169
4170 ixj_WriteDSPCommand(0xE011, j);
4171 ixj_WriteDSPCommand(0x0080, j);
4172
4173 ixj_WriteDSPCommand(0xCF97, j); /* Set AGC Enable */
4174 ixj_WriteDSPCommand(0x0000, j); /* to off */
4175
4176 break;
4177
4178 case AEC_AGC:
4179 /* First we have to put the AEC into advance auto mode so that AGC will not conflict with it */
4180 ixj_WriteDSPCommand(0x0002, j); /* Attenuation scaling factor of 2 */
4181
4182 ixj_WriteDSPCommand(0xE011, j);
4183 ixj_WriteDSPCommand(0x0100, j); /* Higher Threshold Floor */
4184
4185 ixj_WriteDSPCommand(0xE012, j); /* Set Train and Lock */
4186
4187 if(j->cardtype == QTI_LINEJACK || j->cardtype == QTI_PHONECARD)
4188 ixj_WriteDSPCommand(0x0224, j);
4189 else
4190 ixj_WriteDSPCommand(0x1224, j);
4191
4192 ixj_WriteDSPCommand(0xE014, j);
4193 ixj_WriteDSPCommand(0x0003, j); /* Lock threshold at 3dB */
4194
4195 ixj_WriteDSPCommand(0xE338, j); /* Set Echo Suppresser Attenuation to 0dB */
4196
4197 /* Now we can set the AGC initial parameters and turn it on */
4198 ixj_WriteDSPCommand(0xCF90, j); /* Set AGC Minimum gain */
4199 ixj_WriteDSPCommand(0x0020, j); /* to 0.125 (-18dB) */
4200
4201 ixj_WriteDSPCommand(0xCF91, j); /* Set AGC Maximum gain */
4202 ixj_WriteDSPCommand(0x1000, j); /* to 16 (24dB) */
4203
4204 ixj_WriteDSPCommand(0xCF92, j); /* Set AGC start gain */
4205 ixj_WriteDSPCommand(0x0800, j); /* to 8 (+18dB) */
4206
4207 ixj_WriteDSPCommand(0xCF93, j); /* Set AGC hold time */
4208 ixj_WriteDSPCommand(0x1F40, j); /* to 2 seconds (units are 250us) */
4209
4210 ixj_WriteDSPCommand(0xCF94, j); /* Set AGC Attack Time Constant */
4211 ixj_WriteDSPCommand(0x0005, j); /* to 8ms */
4212
4213 ixj_WriteDSPCommand(0xCF95, j); /* Set AGC Decay Time Constant */
4214 ixj_WriteDSPCommand(0x000D, j); /* to 4096ms */
4215
4216 ixj_WriteDSPCommand(0xCF96, j); /* Set AGC Attack Threshold */
4217 ixj_WriteDSPCommand(0x1200, j); /* to 25% */
4218
4219 ixj_WriteDSPCommand(0xCF97, j); /* Set AGC Enable */
4220 ixj_WriteDSPCommand(0x0001, j); /* to on */
4221
4222 break;
4223
4224 case AEC_AUTO:
4225 ixj_WriteDSPCommand(0x0002, j); /* Attenuation scaling factor of 2 */
4226
4227 ixj_WriteDSPCommand(0xE011, j);
4228 ixj_WriteDSPCommand(0x0100, j); /* Higher Threshold Floor */
4229
4230 ixj_WriteDSPCommand(0xE012, j); /* Set Train and Lock */
4231
4232 if(j->cardtype == QTI_LINEJACK || j->cardtype == QTI_PHONECARD)
4233 ixj_WriteDSPCommand(0x0224, j);
4234 else
4235 ixj_WriteDSPCommand(0x1224, j);
4236
4237 ixj_WriteDSPCommand(0xE014, j);
4238 ixj_WriteDSPCommand(0x0003, j); /* Lock threshold at 3dB */
4239
4240 ixj_WriteDSPCommand(0xE338, j); /* Set Echo Suppresser Attenuation to 0dB */
4241
4242 break;
4243 }
4244 }
4245}
4246
4247static void aec_stop(IXJ *j)
4248{
4249 j->aec_level = AEC_OFF;
4250 if (j->rec_codec == G729 || j->play_codec == G729 || j->rec_codec == G729B || j->play_codec == G729B) {
4251 ixj_WriteDSPCommand(0xE022, j); /* Move AEC filter buffer back */
4252
4253 ixj_WriteDSPCommand(0x0700, j);
4254 }
4255 if (j->play_mode != -1 && j->rec_mode != -1)
4256 {
4257 ixj_WriteDSPCommand(0xB002, j); /* AEC Stop */
4258 }
4259}
4260
4261static int set_play_codec(IXJ *j, int rate)
4262{
4263 int retval = 0;
4264
4265 j->play_codec = rate;
4266
4267 switch (rate) {
4268 case G723_63:
4269 if (j->ver.low != 0x12 || ixj_convert_loaded) {
4270 j->play_frame_size = 12;
4271 j->play_mode = 0;
4272 } else {
4273 retval = 1;
4274 }
4275 break;
4276 case G723_53:
4277 if (j->ver.low != 0x12 || ixj_convert_loaded) {
4278 j->play_frame_size = 10;
4279 j->play_mode = 0;
4280 } else {
4281 retval = 1;
4282 }
4283 break;
4284 case TS85:
4285 if (j->dsp.low == 0x20 || j->flags.ts85_loaded) {
4286 j->play_frame_size = 16;
4287 j->play_mode = 0;
4288 } else {
4289 retval = 1;
4290 }
4291 break;
4292 case TS48:
4293 if (j->ver.low != 0x12 || ixj_convert_loaded) {
4294 j->play_frame_size = 9;
4295 j->play_mode = 0;
4296 } else {
4297 retval = 1;
4298 }
4299 break;
4300 case TS41:
4301 if (j->ver.low != 0x12 || ixj_convert_loaded) {
4302 j->play_frame_size = 8;
4303 j->play_mode = 0;
4304 } else {
4305 retval = 1;
4306 }
4307 break;
4308 case G728:
4309 if (j->dsp.low != 0x20) {
4310 j->play_frame_size = 48;
4311 j->play_mode = 0;
4312 } else {
4313 retval = 1;
4314 }
4315 break;
4316 case G729:
4317 if (j->dsp.low != 0x20) {
4318 if (!j->flags.g729_loaded) {
4319 retval = 1;
4320 break;
4321 }
4322 switch (j->baseframe.low) {
4323 case 0xA0:
4324 j->play_frame_size = 10;
4325 break;
4326 case 0x50:
4327 j->play_frame_size = 5;
4328 break;
4329 default:
4330 j->play_frame_size = 15;
4331 break;
4332 }
4333 j->play_mode = 0;
4334 } else {
4335 retval = 1;
4336 }
4337 break;
4338 case G729B:
4339 if (j->dsp.low != 0x20) {
4340 if (!j->flags.g729_loaded) {
4341 retval = 1;
4342 break;
4343 }
4344 switch (j->baseframe.low) {
4345 case 0xA0:
4346 j->play_frame_size = 12;
4347 break;
4348 case 0x50:
4349 j->play_frame_size = 6;
4350 break;
4351 default:
4352 j->play_frame_size = 18;
4353 break;
4354 }
4355 j->play_mode = 0;
4356 } else {
4357 retval = 1;
4358 }
4359 break;
4360 case ULAW:
4361 switch (j->baseframe.low) {
4362 case 0xA0:
4363 j->play_frame_size = 80;
4364 break;
4365 case 0x50:
4366 j->play_frame_size = 40;
4367 break;
4368 default:
4369 j->play_frame_size = 120;
4370 break;
4371 }
4372 j->play_mode = 2;
4373 break;
4374 case ALAW:
4375 switch (j->baseframe.low) {
4376 case 0xA0:
4377 j->play_frame_size = 80;
4378 break;
4379 case 0x50:
4380 j->play_frame_size = 40;
4381 break;
4382 default:
4383 j->play_frame_size = 120;
4384 break;
4385 }
4386 j->play_mode = 2;
4387 break;
4388 case LINEAR16:
4389 switch (j->baseframe.low) {
4390 case 0xA0:
4391 j->play_frame_size = 160;
4392 break;
4393 case 0x50:
4394 j->play_frame_size = 80;
4395 break;
4396 default:
4397 j->play_frame_size = 240;
4398 break;
4399 }
4400 j->play_mode = 6;
4401 break;
4402 case LINEAR8:
4403 switch (j->baseframe.low) {
4404 case 0xA0:
4405 j->play_frame_size = 80;
4406 break;
4407 case 0x50:
4408 j->play_frame_size = 40;
4409 break;
4410 default:
4411 j->play_frame_size = 120;
4412 break;
4413 }
4414 j->play_mode = 4;
4415 break;
4416 case WSS:
4417 switch (j->baseframe.low) {
4418 case 0xA0:
4419 j->play_frame_size = 80;
4420 break;
4421 case 0x50:
4422 j->play_frame_size = 40;
4423 break;
4424 default:
4425 j->play_frame_size = 120;
4426 break;
4427 }
4428 j->play_mode = 5;
4429 break;
4430 default:
4431 kfree(j->write_buffer);
4432 j->play_frame_size = 0;
4433 j->play_mode = -1;
4434 j->write_buffer = NULL;
4435 j->write_buffer_size = 0;
4436 retval = 1;
4437 break;
4438 }
4439 return retval;
4440}
4441
4442static int ixj_play_start(IXJ *j)
4443{
4444 unsigned short cmd = 0x0000;
4445
4446 if (j->write_buffer) {
4447 ixj_play_stop(j);
4448 }
4449
4450 if(ixjdebug & 0x0002)
4451 printk("IXJ %d Starting Play Codec %d at %ld\n", j->board, j->play_codec, jiffies);
4452
4453 j->flags.playing = 1;
4454 ixj_WriteDSPCommand(0x0FE0, j); /* Put the DSP in full power mode. */
4455
4456 j->flags.play_first_frame = 1;
4457 j->drybuffer = 0;
4458
4459 if (!j->play_mode) {
4460 switch (j->play_codec) {
4461 case G723_63:
4462 cmd = 0x5231;
4463 break;
4464 case G723_53:
4465 cmd = 0x5232;
4466 break;
4467 case TS85:
4468 cmd = 0x5230; /* TrueSpeech 8.5 */
4469
4470 break;
4471 case TS48:
4472 cmd = 0x5233; /* TrueSpeech 4.8 */
4473
4474 break;
4475 case TS41:
4476 cmd = 0x5234; /* TrueSpeech 4.1 */
4477
4478 break;
4479 case G728:
4480 cmd = 0x5235;
4481 break;
4482 case G729:
4483 case G729B:
4484 cmd = 0x5236;
4485 break;
4486 default:
4487 return 1;
4488 }
4489 if (ixj_WriteDSPCommand(cmd, j))
4490 return -1;
4491 }
4492 j->write_buffer = kmalloc(j->play_frame_size * 2, GFP_ATOMIC);
4493 if (!j->write_buffer) {
4494 printk("Write buffer allocation for ixj board %d failed!\n", j->board);
4495 return -ENOMEM;
4496 }
4497/* j->write_buffers_empty = 2; */
4498 j->write_buffers_empty = 1;
4499 j->write_buffer_size = j->play_frame_size * 2;
4500 j->write_buffer_end = j->write_buffer + j->play_frame_size * 2;
4501 j->write_buffer_rp = j->write_buffer_wp = j->write_buffer;
4502
4503 if (ixj_WriteDSPCommand(0x5202, j)) /* Set Poll sync mode */
4504
4505 return -1;
4506
4507 switch (j->play_mode) {
4508 case 0:
4509 cmd = 0x2C03;
4510 break;
4511 case 2:
4512 if (j->ver.low == 0x12) {
4513 cmd = 0x2C23;
4514 } else {
4515 cmd = 0x2C21;
4516 }
4517 break;
4518 case 4:
4519 if (j->ver.low == 0x12) {
4520 cmd = 0x2C43;
4521 } else {
4522 cmd = 0x2C41;
4523 }
4524 break;
4525 case 5:
4526 if (j->ver.low == 0x12) {
4527 cmd = 0x2C53;
4528 } else {
4529 cmd = 0x2C51;
4530 }
4531 break;
4532 case 6:
4533 if (j->ver.low == 0x12) {
4534 cmd = 0x2C63;
4535 } else {
4536 cmd = 0x2C61;
4537 }
4538 break;
4539 }
4540 if (ixj_WriteDSPCommand(cmd, j))
4541 return -1;
4542
4543 if (ixj_WriteDSPCommand(0x2000, j)) /* Playback C2 */
4544 return -1;
4545
4546 if (ixj_WriteDSPCommand(0x2000 + j->play_frame_size, j)) /* Playback C3 */
4547 return -1;
4548
4549 if (j->flags.recording) {
4550 ixj_aec_start(j, j->aec_level);
4551 }
4552
4553 return 0;
4554}
4555
4556static void ixj_play_stop(IXJ *j)
4557{
4558 if (ixjdebug & 0x0002)
4559 printk("IXJ %d Stopping Play Codec %d at %ld\n", j->board, j->play_codec, jiffies);
4560
4561 kfree(j->write_buffer);
4562 j->write_buffer = NULL;
4563 j->write_buffer_size = 0;
4564 if (j->play_mode > -1) {
4565 ixj_WriteDSPCommand(0x5221, j); /* Stop playback and flush buffers. 8022 reference page 9-40 */
4566
4567 j->play_mode = -1;
4568 }
4569 j->flags.playing = 0;
4570}
4571
4572static inline int get_play_level(IXJ *j)
4573{
4574 int retval;
4575
4576 ixj_WriteDSPCommand(0xCF8F, j); /* 8022 Reference page 9-38 */
4577 return j->ssr.high << 8 | j->ssr.low;
4578 retval = j->ssr.high << 8 | j->ssr.low;
4579 retval = (retval * 256) / 240;
4580 return retval;
4581}
4582
4583static unsigned int ixj_poll(struct file *file_p, poll_table * wait)
4584{
4585 unsigned int mask = 0;
4586
4587 IXJ *j = get_ixj(NUM(file_p->f_path.dentry->d_inode));
4588
4589 poll_wait(file_p, &(j->poll_q), wait);
4590 if (j->read_buffer_ready > 0)
4591 mask |= POLLIN | POLLRDNORM; /* readable */
4592 if (j->write_buffers_empty > 0)
4593 mask |= POLLOUT | POLLWRNORM; /* writable */
4594 if (j->ex.bytes)
4595 mask |= POLLPRI;
4596 return mask;
4597}
4598
4599static int ixj_play_tone(IXJ *j, char tone)
4600{
4601 if (!j->tone_state) {
4602 if(ixjdebug & 0x0002) {
4603 printk("IXJ %d starting tone %d at %ld\n", j->board, tone, jiffies);
4604 }
4605 if (j->dsp.low == 0x20) {
4606 idle(j);
4607 }
4608 j->tone_start_jif = jiffies;
4609
4610 j->tone_state = 1;
4611 }
4612
4613 j->tone_index = tone;
4614 if (ixj_WriteDSPCommand(0x6000 + j->tone_index, j))
4615 return -1;
4616
4617 return 0;
4618}
4619
4620static int ixj_set_tone_on(unsigned short arg, IXJ *j)
4621{
4622 j->tone_on_time = arg;
4623
4624 if (ixj_WriteDSPCommand(0x6E04, j)) /* Set Tone On Period */
4625
4626 return -1;
4627
4628 if (ixj_WriteDSPCommand(arg, j))
4629 return -1;
4630
4631 return 0;
4632}
4633
4634static int SCI_WaitHighSCI(IXJ *j)
4635{
4636 int cnt;
4637
4638 j->pld_scrr.byte = inb_p(j->XILINXbase);
4639 if (!j->pld_scrr.bits.sci) {
4640 for (cnt = 0; cnt < 10; cnt++) {
4641 udelay(32);
4642 j->pld_scrr.byte = inb_p(j->XILINXbase);
4643
4644 if ((j->pld_scrr.bits.sci))
4645 return 1;
4646 }
4647 if (ixjdebug & 0x0001)
4648 printk(KERN_INFO "SCI Wait High failed %x\n", j->pld_scrr.byte);
4649 return 0;
4650 } else
4651 return 1;
4652}
4653
4654static int SCI_WaitLowSCI(IXJ *j)
4655{
4656 int cnt;
4657
4658 j->pld_scrr.byte = inb_p(j->XILINXbase);
4659 if (j->pld_scrr.bits.sci) {
4660 for (cnt = 0; cnt < 10; cnt++) {
4661 udelay(32);
4662 j->pld_scrr.byte = inb_p(j->XILINXbase);
4663
4664 if (!(j->pld_scrr.bits.sci))
4665 return 1;
4666 }
4667 if (ixjdebug & 0x0001)
4668 printk(KERN_INFO "SCI Wait Low failed %x\n", j->pld_scrr.byte);
4669 return 0;
4670 } else
4671 return 1;
4672}
4673
4674static int SCI_Control(IXJ *j, int control)
4675{
4676 switch (control) {
4677 case SCI_End:
4678 j->pld_scrw.bits.c0 = 0; /* Set PLD Serial control interface */
4679
4680 j->pld_scrw.bits.c1 = 0; /* to no selection */
4681
4682 break;
4683 case SCI_Enable_DAA:
4684 j->pld_scrw.bits.c0 = 1; /* Set PLD Serial control interface */
4685
4686 j->pld_scrw.bits.c1 = 0; /* to write to DAA */
4687
4688 break;
4689 case SCI_Enable_Mixer:
4690 j->pld_scrw.bits.c0 = 0; /* Set PLD Serial control interface */
4691
4692 j->pld_scrw.bits.c1 = 1; /* to write to mixer */
4693
4694 break;
4695 case SCI_Enable_EEPROM:
4696 j->pld_scrw.bits.c0 = 1; /* Set PLD Serial control interface */
4697
4698 j->pld_scrw.bits.c1 = 1; /* to write to EEPROM */
4699
4700 break;
4701 default:
4702 return 0;
4703 break;
4704 }
4705 outb_p(j->pld_scrw.byte, j->XILINXbase);
4706
4707 switch (control) {
4708 case SCI_End:
4709 return 1;
4710 break;
4711 case SCI_Enable_DAA:
4712 case SCI_Enable_Mixer:
4713 case SCI_Enable_EEPROM:
4714 if (!SCI_WaitHighSCI(j))
4715 return 0;
4716 break;
4717 default:
4718 return 0;
4719 break;
4720 }
4721 return 1;
4722}
4723
4724static int SCI_Prepare(IXJ *j)
4725{
4726 if (!SCI_Control(j, SCI_End))
4727 return 0;
4728
4729 if (!SCI_WaitLowSCI(j))
4730 return 0;
4731
4732 return 1;
4733}
4734
4735static int ixj_get_mixer(long val, IXJ *j)
4736{
4737 int reg = (val & 0x1F00) >> 8;
4738 return j->mix.vol[reg];
4739}
4740
4741static int ixj_mixer(long val, IXJ *j)
4742{
4743 BYTES bytes;
4744
4745 bytes.high = (val & 0x1F00) >> 8;
4746 bytes.low = val & 0x00FF;
4747
4748 /* save mixer value so we can get back later on */
4749 j->mix.vol[bytes.high] = bytes.low;
4750
4751 outb_p(bytes.high & 0x1F, j->XILINXbase + 0x03); /* Load Mixer Address */
4752
4753 outb_p(bytes.low, j->XILINXbase + 0x02); /* Load Mixer Data */
4754
4755 SCI_Control(j, SCI_Enable_Mixer);
4756
4757 SCI_Control(j, SCI_End);
4758
4759 return 0;
4760}
4761
4762static int daa_load(BYTES * p_bytes, IXJ *j)
4763{
4764 outb_p(p_bytes->high, j->XILINXbase + 0x03);
4765 outb_p(p_bytes->low, j->XILINXbase + 0x02);
4766 if (!SCI_Control(j, SCI_Enable_DAA))
4767 return 0;
4768 else
4769 return 1;
4770}
4771
4772static int ixj_daa_cr4(IXJ *j, char reg)
4773{
4774 BYTES bytes;
4775
4776 switch (j->daa_mode) {
4777 case SOP_PU_SLEEP:
4778 bytes.high = 0x14;
4779 break;
4780 case SOP_PU_RINGING:
4781 bytes.high = 0x54;
4782 break;
4783 case SOP_PU_CONVERSATION:
4784 bytes.high = 0x94;
4785 break;
4786 case SOP_PU_PULSEDIALING:
4787 bytes.high = 0xD4;
4788 break;
4789 }
4790
4791 j->m_DAAShadowRegs.SOP_REGS.SOP.cr4.reg = reg;
4792
4793 switch (j->m_DAAShadowRegs.SOP_REGS.SOP.cr4.bitreg.AGX) {
4794 case 0:
4795 j->m_DAAShadowRegs.SOP_REGS.SOP.cr4.bitreg.AGR_Z = 0;
4796 break;
4797 case 1:
4798 j->m_DAAShadowRegs.SOP_REGS.SOP.cr4.bitreg.AGR_Z = 2;
4799 break;
4800 case 2:
4801 j->m_DAAShadowRegs.SOP_REGS.SOP.cr4.bitreg.AGR_Z = 1;
4802 break;
4803 case 3:
4804 j->m_DAAShadowRegs.SOP_REGS.SOP.cr4.bitreg.AGR_Z = 3;
4805 break;
4806 }
4807
4808 bytes.low = j->m_DAAShadowRegs.SOP_REGS.SOP.cr4.reg;
4809
4810 if (!daa_load(&bytes, j))
4811 return 0;
4812
4813 if (!SCI_Prepare(j))
4814 return 0;
4815
4816 return 1;
4817}
4818
4819static char daa_int_read(IXJ *j)
4820{
4821 BYTES bytes;
4822
4823 if (!SCI_Prepare(j))
4824 return 0;
4825
4826 bytes.high = 0x38;
4827 bytes.low = 0x00;
4828 outb_p(bytes.high, j->XILINXbase + 0x03);
4829 outb_p(bytes.low, j->XILINXbase + 0x02);
4830
4831 if (!SCI_Control(j, SCI_Enable_DAA))
4832 return 0;
4833
4834 bytes.high = inb_p(j->XILINXbase + 0x03);
4835 bytes.low = inb_p(j->XILINXbase + 0x02);
4836 if (bytes.low != ALISDAA_ID_BYTE) {
4837 if (ixjdebug & 0x0001)
4838 printk("Cannot read DAA ID Byte high = %d low = %d\n", bytes.high, bytes.low);
4839 return 0;
4840 }
4841 if (!SCI_Control(j, SCI_Enable_DAA))
4842 return 0;
4843 if (!SCI_Control(j, SCI_End))
4844 return 0;
4845
4846 bytes.high = inb_p(j->XILINXbase + 0x03);
4847 bytes.low = inb_p(j->XILINXbase + 0x02);
4848
4849 j->m_DAAShadowRegs.XOP_REGS.XOP.xr0.reg = bytes.high;
4850
4851 return 1;
4852}
4853
4854static char daa_CR_read(IXJ *j, int cr)
4855{
4856 IXJ_WORD wdata;
4857 BYTES bytes;
4858
4859 if (!SCI_Prepare(j))
4860 return 0;
4861
4862 switch (j->daa_mode) {
4863 case SOP_PU_SLEEP:
4864 bytes.high = 0x30 + cr;
4865 break;
4866 case SOP_PU_RINGING:
4867 bytes.high = 0x70 + cr;
4868 break;
4869 case SOP_PU_CONVERSATION:
4870 bytes.high = 0xB0 + cr;
4871 break;
4872 case SOP_PU_PULSEDIALING:
4873 default:
4874 bytes.high = 0xF0 + cr;
4875 break;
4876 }
4877
4878 bytes.low = 0x00;
4879
4880 outb_p(bytes.high, j->XILINXbase + 0x03);
4881 outb_p(bytes.low, j->XILINXbase + 0x02);
4882
4883 if (!SCI_Control(j, SCI_Enable_DAA))
4884 return 0;
4885
4886 bytes.high = inb_p(j->XILINXbase + 0x03);
4887 bytes.low = inb_p(j->XILINXbase + 0x02);
4888 if (bytes.low != ALISDAA_ID_BYTE) {
4889 if (ixjdebug & 0x0001)
4890 printk("Cannot read DAA ID Byte high = %d low = %d\n", bytes.high, bytes.low);
4891 return 0;
4892 }
4893 if (!SCI_Control(j, SCI_Enable_DAA))
4894 return 0;
4895 if (!SCI_Control(j, SCI_End))
4896 return 0;
4897
4898 wdata.word = inw_p(j->XILINXbase + 0x02);
4899
4900 switch(cr){
4901 case 5:
4902 j->m_DAAShadowRegs.SOP_REGS.SOP.cr5.reg = wdata.bytes.high;
4903 break;
4904 case 4:
4905 j->m_DAAShadowRegs.SOP_REGS.SOP.cr4.reg = wdata.bytes.high;
4906 break;
4907 case 3:
4908 j->m_DAAShadowRegs.SOP_REGS.SOP.cr3.reg = wdata.bytes.high;
4909 break;
4910 case 2:
4911 j->m_DAAShadowRegs.SOP_REGS.SOP.cr2.reg = wdata.bytes.high;
4912 break;
4913 case 1:
4914 j->m_DAAShadowRegs.SOP_REGS.SOP.cr1.reg = wdata.bytes.high;
4915 break;
4916 case 0:
4917 j->m_DAAShadowRegs.SOP_REGS.SOP.cr0.reg = wdata.bytes.high;
4918 break;
4919 default:
4920 return 0;
4921 }
4922 return 1;
4923}
4924
4925static int ixj_daa_cid_reset(IXJ *j)
4926{
4927 int i;
4928 BYTES bytes;
4929
4930 if (ixjdebug & 0x0002)
4931 printk("DAA Clearing CID ram\n");
4932
4933 if (!SCI_Prepare(j))
4934 return 0;
4935
4936 bytes.high = 0x58;
4937 bytes.low = 0x00;
4938 outb_p(bytes.high, j->XILINXbase + 0x03);
4939 outb_p(bytes.low, j->XILINXbase + 0x02);
4940
4941 if (!SCI_Control(j, SCI_Enable_DAA))
4942 return 0;
4943
4944 if (!SCI_WaitHighSCI(j))
4945 return 0;
4946
4947 for (i = 0; i < ALISDAA_CALLERID_SIZE - 1; i += 2) {
4948 bytes.high = bytes.low = 0x00;
4949 outb_p(bytes.high, j->XILINXbase + 0x03);
4950
4951 if (i < ALISDAA_CALLERID_SIZE - 1)
4952 outb_p(bytes.low, j->XILINXbase + 0x02);
4953
4954 if (!SCI_Control(j, SCI_Enable_DAA))
4955 return 0;
4956
4957 if (!SCI_WaitHighSCI(j))
4958 return 0;
4959
4960 }
4961
4962 if (!SCI_Control(j, SCI_End))
4963 return 0;
4964
4965 if (ixjdebug & 0x0002)
4966 printk("DAA CID ram cleared\n");
4967
4968 return 1;
4969}
4970
4971static int ixj_daa_cid_read(IXJ *j)
4972{
4973 int i;
4974 BYTES bytes;
4975 char CID[ALISDAA_CALLERID_SIZE];
4976 bool mContinue;
4977 char *pIn, *pOut;
4978
4979 if (!SCI_Prepare(j))
4980 return 0;
4981
4982 bytes.high = 0x78;
4983 bytes.low = 0x00;
4984 outb_p(bytes.high, j->XILINXbase + 0x03);
4985 outb_p(bytes.low, j->XILINXbase + 0x02);
4986
4987 if (!SCI_Control(j, SCI_Enable_DAA))
4988 return 0;
4989
4990 if (!SCI_WaitHighSCI(j))
4991 return 0;
4992
4993 bytes.high = inb_p(j->XILINXbase + 0x03);
4994 bytes.low = inb_p(j->XILINXbase + 0x02);
4995 if (bytes.low != ALISDAA_ID_BYTE) {
4996 if (ixjdebug & 0x0001)
4997 printk("DAA Get Version Cannot read DAA ID Byte high = %d low = %d\n", bytes.high, bytes.low);
4998 return 0;
4999 }
5000 for (i = 0; i < ALISDAA_CALLERID_SIZE; i += 2) {
5001 bytes.high = bytes.low = 0x00;
5002 outb_p(bytes.high, j->XILINXbase + 0x03);
5003 outb_p(bytes.low, j->XILINXbase + 0x02);
5004
5005 if (!SCI_Control(j, SCI_Enable_DAA))
5006 return 0;
5007
5008 if (!SCI_WaitHighSCI(j))
5009 return 0;
5010
5011 CID[i + 0] = inb_p(j->XILINXbase + 0x03);
5012 CID[i + 1] = inb_p(j->XILINXbase + 0x02);
5013 }
5014
5015 if (!SCI_Control(j, SCI_End))
5016 return 0;
5017
5018 pIn = CID;
5019 pOut = j->m_DAAShadowRegs.CAO_REGS.CAO.CallerID;
5020 mContinue = true;
5021 while (mContinue) {
5022 if ((pIn[1] & 0x03) == 0x01) {
5023 pOut[0] = pIn[0];
5024 }
5025 if ((pIn[2] & 0x0c) == 0x04) {
5026 pOut[1] = ((pIn[2] & 0x03) << 6) | ((pIn[1] & 0xfc) >> 2);
5027 }
5028 if ((pIn[3] & 0x30) == 0x10) {
5029 pOut[2] = ((pIn[3] & 0x0f) << 4) | ((pIn[2] & 0xf0) >> 4);
5030 }
5031 if ((pIn[4] & 0xc0) == 0x40) {
5032 pOut[3] = ((pIn[4] & 0x3f) << 2) | ((pIn[3] & 0xc0) >> 6);
5033 } else {
5034 mContinue = false;
5035 }
5036 pIn += 5, pOut += 4;
5037 }
5038 memset(&j->cid, 0, sizeof(PHONE_CID));
5039 pOut = j->m_DAAShadowRegs.CAO_REGS.CAO.CallerID;
5040 pOut += 4;
5041 strncpy(j->cid.month, pOut, 2);
5042 pOut += 2;
5043 strncpy(j->cid.day, pOut, 2);
5044 pOut += 2;
5045 strncpy(j->cid.hour, pOut, 2);
5046 pOut += 2;
5047 strncpy(j->cid.min, pOut, 2);
5048 pOut += 3;
5049 j->cid.numlen = *pOut;
5050 pOut += 1;
5051 strncpy(j->cid.number, pOut, j->cid.numlen);
5052 pOut += j->cid.numlen + 1;
5053 j->cid.namelen = *pOut;
5054 pOut += 1;
5055 strncpy(j->cid.name, pOut, j->cid.namelen);
5056
5057 ixj_daa_cid_reset(j);
5058 return 1;
5059}
5060
5061static char daa_get_version(IXJ *j)
5062{
5063 BYTES bytes;
5064
5065 if (!SCI_Prepare(j))
5066 return 0;
5067
5068 bytes.high = 0x35;
5069 bytes.low = 0x00;
5070 outb_p(bytes.high, j->XILINXbase + 0x03);
5071 outb_p(bytes.low, j->XILINXbase + 0x02);
5072
5073 if (!SCI_Control(j, SCI_Enable_DAA))
5074 return 0;
5075
5076 bytes.high = inb_p(j->XILINXbase + 0x03);
5077 bytes.low = inb_p(j->XILINXbase + 0x02);
5078 if (bytes.low != ALISDAA_ID_BYTE) {
5079 if (ixjdebug & 0x0001)
5080 printk("DAA Get Version Cannot read DAA ID Byte high = %d low = %d\n", bytes.high, bytes.low);
5081 return 0;
5082 }
5083 if (!SCI_Control(j, SCI_Enable_DAA))
5084 return 0;
5085
5086 if (!SCI_Control(j, SCI_End))
5087 return 0;
5088
5089 bytes.high = inb_p(j->XILINXbase + 0x03);
5090 bytes.low = inb_p(j->XILINXbase + 0x02);
5091 if (ixjdebug & 0x0002)
5092 printk("DAA CR5 Byte high = 0x%x low = 0x%x\n", bytes.high, bytes.low);
5093 j->m_DAAShadowRegs.SOP_REGS.SOP.cr5.reg = bytes.high;
5094 return bytes.high;
5095}
5096
5097static int daa_set_mode(IXJ *j, int mode)
5098{
5099 /* NOTE:
5100 The DAA *MUST* be in the conversation mode if the
5101 PSTN line is to be seized (PSTN line off-hook).
5102 Taking the PSTN line off-hook while the DAA is in
5103 a mode other than conversation mode will cause a
5104 hardware failure of the ALIS-A part.
5105
5106 NOTE:
5107 The DAA can only go to SLEEP, RINGING or PULSEDIALING modes
5108 if the PSTN line is on-hook. Failure to have the PSTN line
5109 in the on-hook state WILL CAUSE A HARDWARE FAILURE OF THE
5110 ALIS-A part.
5111 */
5112
5113 BYTES bytes;
5114
5115 j->flags.pstn_rmr = 0;
5116
5117 if (!SCI_Prepare(j))
5118 return 0;
5119
5120 switch (mode) {
5121 case SOP_PU_RESET:
5122 j->pld_scrw.bits.daafsyncen = 0; /* Turn off DAA Frame Sync */
5123
5124 outb_p(j->pld_scrw.byte, j->XILINXbase);
5125 j->pld_slicw.bits.rly2 = 0;
5126 outb_p(j->pld_slicw.byte, j->XILINXbase + 0x01);
5127 bytes.high = 0x10;
5128 bytes.low = j->m_DAAShadowRegs.SOP_REGS.SOP.cr0.reg;
5129 daa_load(&bytes, j);
5130 if (!SCI_Prepare(j))
5131 return 0;
5132
5133 j->daa_mode = SOP_PU_SLEEP;
5134 break;
5135 case SOP_PU_SLEEP:
5136 if(j->daa_mode == SOP_PU_SLEEP)
5137 {
5138 break;
5139 }
5140 if (ixjdebug & 0x0008)
5141 printk(KERN_INFO "phone DAA: SOP_PU_SLEEP at %ld\n", jiffies);
5142/* if(j->daa_mode == SOP_PU_CONVERSATION) */
5143 {
5144 j->pld_scrw.bits.daafsyncen = 0; /* Turn off DAA Frame Sync */
5145
5146 outb_p(j->pld_scrw.byte, j->XILINXbase);
5147 j->pld_slicw.bits.rly2 = 0;
5148 outb_p(j->pld_slicw.byte, j->XILINXbase + 0x01);
5149 bytes.high = 0x10;
5150 bytes.low = j->m_DAAShadowRegs.SOP_REGS.SOP.cr0.reg;
5151 daa_load(&bytes, j);
5152 if (!SCI_Prepare(j))
5153 return 0;
5154 }
5155 j->pld_scrw.bits.daafsyncen = 0; /* Turn off DAA Frame Sync */
5156
5157 outb_p(j->pld_scrw.byte, j->XILINXbase);
5158 j->pld_slicw.bits.rly2 = 0;
5159 outb_p(j->pld_slicw.byte, j->XILINXbase + 0x01);
5160 bytes.high = 0x10;
5161 bytes.low = j->m_DAAShadowRegs.SOP_REGS.SOP.cr0.reg;
5162 daa_load(&bytes, j);
5163 if (!SCI_Prepare(j))
5164 return 0;
5165
5166 j->daa_mode = SOP_PU_SLEEP;
5167 j->flags.pstn_ringing = 0;
5168 j->ex.bits.pstn_ring = 0;
5169 j->pstn_sleeptil = jiffies + (hertz / 4);
5170 wake_up_interruptible(&j->read_q); /* Wake any blocked readers */
5171 wake_up_interruptible(&j->write_q); /* Wake any blocked writers */
5172 wake_up_interruptible(&j->poll_q); /* Wake any blocked selects */
5173 break;
5174 case SOP_PU_RINGING:
5175 if (ixjdebug & 0x0008)
5176 printk(KERN_INFO "phone DAA: SOP_PU_RINGING at %ld\n", jiffies);
5177 j->pld_scrw.bits.daafsyncen = 0; /* Turn off DAA Frame Sync */
5178
5179 outb_p(j->pld_scrw.byte, j->XILINXbase);
5180 j->pld_slicw.bits.rly2 = 0;
5181 outb_p(j->pld_slicw.byte, j->XILINXbase + 0x01);
5182 bytes.high = 0x50;
5183 bytes.low = j->m_DAAShadowRegs.SOP_REGS.SOP.cr0.reg;
5184 daa_load(&bytes, j);
5185 if (!SCI_Prepare(j))
5186 return 0;
5187 j->daa_mode = SOP_PU_RINGING;
5188 break;
5189 case SOP_PU_CONVERSATION:
5190 if (ixjdebug & 0x0008)
5191 printk(KERN_INFO "phone DAA: SOP_PU_CONVERSATION at %ld\n", jiffies);
5192 bytes.high = 0x90;
5193 bytes.low = j->m_DAAShadowRegs.SOP_REGS.SOP.cr0.reg;
5194 daa_load(&bytes, j);
5195 if (!SCI_Prepare(j))
5196 return 0;
5197 j->pld_slicw.bits.rly2 = 1;
5198 outb_p(j->pld_slicw.byte, j->XILINXbase + 0x01);
5199 j->pld_scrw.bits.daafsyncen = 1; /* Turn on DAA Frame Sync */
5200
5201 outb_p(j->pld_scrw.byte, j->XILINXbase);
5202 j->daa_mode = SOP_PU_CONVERSATION;
5203 j->flags.pstn_ringing = 0;
5204 j->ex.bits.pstn_ring = 0;
5205 j->pstn_sleeptil = jiffies;
5206 j->pstn_ring_start = j->pstn_ring_stop = j->pstn_ring_int = 0;
5207 break;
5208 case SOP_PU_PULSEDIALING:
5209 if (ixjdebug & 0x0008)
5210 printk(KERN_INFO "phone DAA: SOP_PU_PULSEDIALING at %ld\n", jiffies);
5211 j->pld_scrw.bits.daafsyncen = 0; /* Turn off DAA Frame Sync */
5212
5213 outb_p(j->pld_scrw.byte, j->XILINXbase);
5214 j->pld_slicw.bits.rly2 = 0;
5215 outb_p(j->pld_slicw.byte, j->XILINXbase + 0x01);
5216 bytes.high = 0xD0;
5217 bytes.low = j->m_DAAShadowRegs.SOP_REGS.SOP.cr0.reg;
5218 daa_load(&bytes, j);
5219 if (!SCI_Prepare(j))
5220 return 0;
5221 j->daa_mode = SOP_PU_PULSEDIALING;
5222 break;
5223 default:
5224 break;
5225 }
5226 return 1;
5227}
5228
5229static int ixj_daa_write(IXJ *j)
5230{
5231 BYTES bytes;
5232
5233 j->flags.pstncheck = 1;
5234
5235 daa_set_mode(j, SOP_PU_SLEEP);
5236
5237 if (!SCI_Prepare(j))
5238 return 0;
5239
5240 outb_p(j->pld_scrw.byte, j->XILINXbase);
5241
5242 bytes.high = 0x14;
5243 bytes.low = j->m_DAAShadowRegs.SOP_REGS.SOP.cr4.reg;
5244 if (!daa_load(&bytes, j))
5245 return 0;
5246
5247 bytes.high = j->m_DAAShadowRegs.SOP_REGS.SOP.cr3.reg;
5248 bytes.low = j->m_DAAShadowRegs.SOP_REGS.SOP.cr2.reg;
5249 if (!daa_load(&bytes, j))
5250 return 0;
5251
5252 bytes.high = j->m_DAAShadowRegs.SOP_REGS.SOP.cr1.reg;
5253 bytes.low = j->m_DAAShadowRegs.SOP_REGS.SOP.cr0.reg;
5254 if (!daa_load(&bytes, j))
5255 return 0;
5256
5257 if (!SCI_Prepare(j))
5258 return 0;
5259
5260 bytes.high = 0x1F;
5261 bytes.low = j->m_DAAShadowRegs.XOP_REGS.XOP.xr7.reg;
5262 if (!daa_load(&bytes, j))
5263 return 0;
5264
5265 bytes.high = j->m_DAAShadowRegs.XOP_xr6_W.reg;
5266 bytes.low = j->m_DAAShadowRegs.XOP_REGS.XOP.xr5.reg;
5267 if (!daa_load(&bytes, j))
5268 return 0;
5269
5270 bytes.high = j->m_DAAShadowRegs.XOP_REGS.XOP.xr4.reg;
5271 bytes.low = j->m_DAAShadowRegs.XOP_REGS.XOP.xr3.reg;
5272 if (!daa_load(&bytes, j))
5273 return 0;
5274
5275 bytes.high = j->m_DAAShadowRegs.XOP_REGS.XOP.xr2.reg;
5276 bytes.low = j->m_DAAShadowRegs.XOP_REGS.XOP.xr1.reg;
5277 if (!daa_load(&bytes, j))
5278 return 0;
5279
5280 bytes.high = j->m_DAAShadowRegs.XOP_xr0_W.reg;
5281 bytes.low = 0x00;
5282 if (!daa_load(&bytes, j))
5283 return 0;
5284
5285 if (!SCI_Prepare(j))
5286 return 0;
5287
5288 bytes.high = 0x00;
5289 bytes.low = j->m_DAAShadowRegs.COP_REGS.COP.THFilterCoeff_1[7];
5290 if (!daa_load(&bytes, j))
5291 return 0;
5292
5293 bytes.high = j->m_DAAShadowRegs.COP_REGS.COP.THFilterCoeff_1[6];
5294 bytes.low = j->m_DAAShadowRegs.COP_REGS.COP.THFilterCoeff_1[5];
5295 if (!daa_load(&bytes, j))
5296 return 0;
5297
5298 bytes.high = j->m_DAAShadowRegs.COP_REGS.COP.THFilterCoeff_1[4];
5299 bytes.low = j->m_DAAShadowRegs.COP_REGS.COP.THFilterCoeff_1[3];
5300 if (!daa_load(&bytes, j))
5301 return 0;
5302
5303 bytes.high = j->m_DAAShadowRegs.COP_REGS.COP.THFilterCoeff_1[2];
5304 bytes.low = j->m_DAAShadowRegs.COP_REGS.COP.THFilterCoeff_1[1];
5305 if (!daa_load(&bytes, j))
5306 return 0;
5307
5308 bytes.high = j->m_DAAShadowRegs.COP_REGS.COP.THFilterCoeff_1[0];
5309 bytes.low = 0x00;
5310 if (!daa_load(&bytes, j))
5311 return 0;
5312
5313 if (!SCI_Control(j, SCI_End))
5314 return 0;
5315 if (!SCI_WaitLowSCI(j))
5316 return 0;
5317
5318 bytes.high = 0x01;
5319 bytes.low = j->m_DAAShadowRegs.COP_REGS.COP.THFilterCoeff_2[7];
5320 if (!daa_load(&bytes, j))
5321 return 0;
5322
5323 bytes.high = j->m_DAAShadowRegs.COP_REGS.COP.THFilterCoeff_2[6];
5324 bytes.low = j->m_DAAShadowRegs.COP_REGS.COP.THFilterCoeff_2[5];
5325 if (!daa_load(&bytes, j))
5326 return 0;
5327
5328 bytes.high = j->m_DAAShadowRegs.COP_REGS.COP.THFilterCoeff_2[4];
5329 bytes.low = j->m_DAAShadowRegs.COP_REGS.COP.THFilterCoeff_2[3];
5330 if (!daa_load(&bytes, j))
5331 return 0;
5332
5333 bytes.high = j->m_DAAShadowRegs.COP_REGS.COP.THFilterCoeff_2[2];
5334 bytes.low = j->m_DAAShadowRegs.COP_REGS.COP.THFilterCoeff_2[1];
5335 if (!daa_load(&bytes, j))
5336 return 0;
5337
5338 bytes.high = j->m_DAAShadowRegs.COP_REGS.COP.THFilterCoeff_2[0];
5339 bytes.low = 0x00;
5340 if (!daa_load(&bytes, j))
5341 return 0;
5342
5343 if (!SCI_Control(j, SCI_End))
5344 return 0;
5345 if (!SCI_WaitLowSCI(j))
5346 return 0;
5347
5348 bytes.high = 0x02;
5349 bytes.low = j->m_DAAShadowRegs.COP_REGS.COP.THFilterCoeff_3[7];
5350 if (!daa_load(&bytes, j))
5351 return 0;
5352
5353 bytes.high = j->m_DAAShadowRegs.COP_REGS.COP.THFilterCoeff_3[6];
5354 bytes.low = j->m_DAAShadowRegs.COP_REGS.COP.THFilterCoeff_3[5];
5355 if (!daa_load(&bytes, j))
5356 return 0;
5357
5358 bytes.high = j->m_DAAShadowRegs.COP_REGS.COP.THFilterCoeff_3[4];
5359 bytes.low = j->m_DAAShadowRegs.COP_REGS.COP.THFilterCoeff_3[3];
5360 if (!daa_load(&bytes, j))
5361 return 0;
5362
5363 bytes.high = j->m_DAAShadowRegs.COP_REGS.COP.THFilterCoeff_3[2];
5364 bytes.low = j->m_DAAShadowRegs.COP_REGS.COP.THFilterCoeff_3[1];
5365 if (!daa_load(&bytes, j))
5366 return 0;
5367
5368 bytes.high = j->m_DAAShadowRegs.COP_REGS.COP.THFilterCoeff_3[0];
5369 bytes.low = 0x00;
5370 if (!daa_load(&bytes, j))
5371 return 0;
5372
5373 if (!SCI_Control(j, SCI_End))
5374 return 0;
5375 if (!SCI_WaitLowSCI(j))
5376 return 0;
5377
5378 bytes.high = 0x03;
5379 bytes.low = j->m_DAAShadowRegs.COP_REGS.COP.RingerImpendance_1[7];
5380 if (!daa_load(&bytes, j))
5381 return 0;
5382
5383 bytes.high = j->m_DAAShadowRegs.COP_REGS.COP.RingerImpendance_1[6];
5384 bytes.low = j->m_DAAShadowRegs.COP_REGS.COP.RingerImpendance_1[5];
5385 if (!daa_load(&bytes, j))
5386 return 0;
5387
5388 bytes.high = j->m_DAAShadowRegs.COP_REGS.COP.RingerImpendance_1[4];
5389 bytes.low = j->m_DAAShadowRegs.COP_REGS.COP.RingerImpendance_1[3];
5390 if (!daa_load(&bytes, j))
5391 return 0;
5392
5393 bytes.high = j->m_DAAShadowRegs.COP_REGS.COP.RingerImpendance_1[2];
5394 bytes.low = j->m_DAAShadowRegs.COP_REGS.COP.RingerImpendance_1[1];
5395 if (!daa_load(&bytes, j))
5396 return 0;
5397
5398 bytes.high = j->m_DAAShadowRegs.COP_REGS.COP.RingerImpendance_1[0];
5399 bytes.low = 0x00;
5400 if (!daa_load(&bytes, j))
5401 return 0;
5402
5403 if (!SCI_Control(j, SCI_End))
5404 return 0;
5405 if (!SCI_WaitLowSCI(j))
5406 return 0;
5407
5408 bytes.high = 0x04;
5409 bytes.low = j->m_DAAShadowRegs.COP_REGS.COP.IMFilterCoeff_1[7];
5410 if (!daa_load(&bytes, j))
5411 return 0;
5412
5413 bytes.high = j->m_DAAShadowRegs.COP_REGS.COP.IMFilterCoeff_1[6];
5414 bytes.low = j->m_DAAShadowRegs.COP_REGS.COP.IMFilterCoeff_1[5];
5415 if (!daa_load(&bytes, j))
5416 return 0;
5417
5418 bytes.high = j->m_DAAShadowRegs.COP_REGS.COP.IMFilterCoeff_1[4];
5419 bytes.low = j->m_DAAShadowRegs.COP_REGS.COP.IMFilterCoeff_1[3];
5420 if (!daa_load(&bytes, j))
5421 return 0;
5422
5423 bytes.high = j->m_DAAShadowRegs.COP_REGS.COP.IMFilterCoeff_1[2];
5424 bytes.low = j->m_DAAShadowRegs.COP_REGS.COP.IMFilterCoeff_1[1];
5425 if (!daa_load(&bytes, j))
5426 return 0;
5427
5428 bytes.high = j->m_DAAShadowRegs.COP_REGS.COP.IMFilterCoeff_1[0];
5429 bytes.low = 0x00;
5430 if (!daa_load(&bytes, j))
5431 return 0;
5432
5433 if (!SCI_Control(j, SCI_End))
5434 return 0;
5435 if (!SCI_WaitLowSCI(j))
5436 return 0;
5437
5438 bytes.high = 0x05;
5439 bytes.low = j->m_DAAShadowRegs.COP_REGS.COP.IMFilterCoeff_2[7];
5440 if (!daa_load(&bytes, j))
5441 return 0;
5442
5443 bytes.high = j->m_DAAShadowRegs.COP_REGS.COP.IMFilterCoeff_2[6];
5444 bytes.low = j->m_DAAShadowRegs.COP_REGS.COP.IMFilterCoeff_2[5];
5445 if (!daa_load(&bytes, j))
5446 return 0;
5447
5448 bytes.high = j->m_DAAShadowRegs.COP_REGS.COP.IMFilterCoeff_2[4];
5449 bytes.low = j->m_DAAShadowRegs.COP_REGS.COP.IMFilterCoeff_2[3];
5450 if (!daa_load(&bytes, j))
5451 return 0;
5452
5453 bytes.high = j->m_DAAShadowRegs.COP_REGS.COP.IMFilterCoeff_2[2];
5454 bytes.low = j->m_DAAShadowRegs.COP_REGS.COP.IMFilterCoeff_2[1];
5455 if (!daa_load(&bytes, j))
5456 return 0;
5457
5458 bytes.high = j->m_DAAShadowRegs.COP_REGS.COP.IMFilterCoeff_2[0];
5459 bytes.low = 0x00;
5460 if (!daa_load(&bytes, j))
5461 return 0;
5462
5463 if (!SCI_Control(j, SCI_End))
5464 return 0;
5465 if (!SCI_WaitLowSCI(j))
5466 return 0;
5467
5468 bytes.high = 0x06;
5469 bytes.low = j->m_DAAShadowRegs.COP_REGS.COP.RingerImpendance_2[7];
5470 if (!daa_load(&bytes, j))
5471 return 0;
5472
5473 bytes.high = j->m_DAAShadowRegs.COP_REGS.COP.RingerImpendance_2[6];
5474 bytes.low = j->m_DAAShadowRegs.COP_REGS.COP.RingerImpendance_2[5];
5475 if (!daa_load(&bytes, j))
5476 return 0;
5477
5478 bytes.high = j->m_DAAShadowRegs.COP_REGS.COP.RingerImpendance_2[4];
5479 bytes.low = j->m_DAAShadowRegs.COP_REGS.COP.RingerImpendance_2[3];
5480 if (!daa_load(&bytes, j))
5481 return 0;
5482
5483 bytes.high = j->m_DAAShadowRegs.COP_REGS.COP.RingerImpendance_2[2];
5484 bytes.low = j->m_DAAShadowRegs.COP_REGS.COP.RingerImpendance_2[1];
5485 if (!daa_load(&bytes, j))
5486 return 0;
5487
5488 bytes.high = j->m_DAAShadowRegs.COP_REGS.COP.RingerImpendance_2[0];
5489 bytes.low = 0x00;
5490 if (!daa_load(&bytes, j))
5491 return 0;
5492
5493 if (!SCI_Control(j, SCI_End))
5494 return 0;
5495 if (!SCI_WaitLowSCI(j))
5496 return 0;
5497
5498 bytes.high = 0x07;
5499 bytes.low = j->m_DAAShadowRegs.COP_REGS.COP.FRRFilterCoeff[7];
5500 if (!daa_load(&bytes, j))
5501 return 0;
5502
5503 bytes.high = j->m_DAAShadowRegs.COP_REGS.COP.FRRFilterCoeff[6];
5504 bytes.low = j->m_DAAShadowRegs.COP_REGS.COP.FRRFilterCoeff[5];
5505 if (!daa_load(&bytes, j))
5506 return 0;
5507
5508 bytes.high = j->m_DAAShadowRegs.COP_REGS.COP.FRRFilterCoeff[4];
5509 bytes.low = j->m_DAAShadowRegs.COP_REGS.COP.FRRFilterCoeff[3];
5510 if (!daa_load(&bytes, j))
5511 return 0;
5512
5513 bytes.high = j->m_DAAShadowRegs.COP_REGS.COP.FRRFilterCoeff[2];
5514 bytes.low = j->m_DAAShadowRegs.COP_REGS.COP.FRRFilterCoeff[1];
5515 if (!daa_load(&bytes, j))
5516 return 0;
5517
5518 bytes.high = j->m_DAAShadowRegs.COP_REGS.COP.FRRFilterCoeff[0];
5519 bytes.low = 0x00;
5520 if (!daa_load(&bytes, j))
5521 return 0;
5522
5523 if (!SCI_Control(j, SCI_End))
5524 return 0;
5525 if (!SCI_WaitLowSCI(j))
5526 return 0;
5527
5528 bytes.high = 0x08;
5529 bytes.low = j->m_DAAShadowRegs.COP_REGS.COP.FRXFilterCoeff[7];
5530 if (!daa_load(&bytes, j))
5531 return 0;
5532
5533 bytes.high = j->m_DAAShadowRegs.COP_REGS.COP.FRXFilterCoeff[6];
5534 bytes.low = j->m_DAAShadowRegs.COP_REGS.COP.FRXFilterCoeff[5];
5535 if (!daa_load(&bytes, j))
5536 return 0;
5537
5538 bytes.high = j->m_DAAShadowRegs.COP_REGS.COP.FRXFilterCoeff[4];
5539 bytes.low = j->m_DAAShadowRegs.COP_REGS.COP.FRXFilterCoeff[3];
5540 if (!daa_load(&bytes, j))
5541 return 0;
5542
5543 bytes.high = j->m_DAAShadowRegs.COP_REGS.COP.FRXFilterCoeff[2];
5544 bytes.low = j->m_DAAShadowRegs.COP_REGS.COP.FRXFilterCoeff[1];
5545 if (!daa_load(&bytes, j))
5546 return 0;
5547
5548 bytes.high = j->m_DAAShadowRegs.COP_REGS.COP.FRXFilterCoeff[0];
5549 bytes.low = 0x00;
5550 if (!daa_load(&bytes, j))
5551 return 0;
5552
5553 if (!SCI_Control(j, SCI_End))
5554 return 0;
5555 if (!SCI_WaitLowSCI(j))
5556 return 0;
5557
5558 bytes.high = 0x09;
5559 bytes.low = j->m_DAAShadowRegs.COP_REGS.COP.ARFilterCoeff[3];
5560 if (!daa_load(&bytes, j))
5561 return 0;
5562
5563 bytes.high = j->m_DAAShadowRegs.COP_REGS.COP.ARFilterCoeff[2];
5564 bytes.low = j->m_DAAShadowRegs.COP_REGS.COP.ARFilterCoeff[1];
5565 if (!daa_load(&bytes, j))
5566 return 0;
5567
5568 bytes.high = j->m_DAAShadowRegs.COP_REGS.COP.ARFilterCoeff[0];
5569 bytes.low = 0x00;
5570 if (!daa_load(&bytes, j))
5571 return 0;
5572
5573 if (!SCI_Control(j, SCI_End))
5574 return 0;
5575 if (!SCI_WaitLowSCI(j))
5576 return 0;
5577
5578 bytes.high = 0x0A;
5579 bytes.low = j->m_DAAShadowRegs.COP_REGS.COP.AXFilterCoeff[3];
5580 if (!daa_load(&bytes, j))
5581 return 0;
5582
5583 bytes.high = j->m_DAAShadowRegs.COP_REGS.COP.AXFilterCoeff[2];
5584 bytes.low = j->m_DAAShadowRegs.COP_REGS.COP.AXFilterCoeff[1];
5585 if (!daa_load(&bytes, j))
5586 return 0;
5587
5588 bytes.high = j->m_DAAShadowRegs.COP_REGS.COP.AXFilterCoeff[0];
5589 bytes.low = 0x00;
5590 if (!daa_load(&bytes, j))
5591 return 0;
5592
5593 if (!SCI_Control(j, SCI_End))
5594 return 0;
5595 if (!SCI_WaitLowSCI(j))
5596 return 0;
5597
5598 bytes.high = 0x0B;
5599 bytes.low = j->m_DAAShadowRegs.COP_REGS.COP.Tone1Coeff[3];
5600 if (!daa_load(&bytes, j))
5601 return 0;
5602
5603 bytes.high = j->m_DAAShadowRegs.COP_REGS.COP.Tone1Coeff[2];
5604 bytes.low = j->m_DAAShadowRegs.COP_REGS.COP.Tone1Coeff[1];
5605 if (!daa_load(&bytes, j))
5606 return 0;
5607
5608 bytes.high = j->m_DAAShadowRegs.COP_REGS.COP.Tone1Coeff[0];
5609 bytes.low = 0x00;
5610 if (!daa_load(&bytes, j))
5611 return 0;
5612
5613 if (!SCI_Control(j, SCI_End))
5614 return 0;
5615 if (!SCI_WaitLowSCI(j))
5616 return 0;
5617
5618 bytes.high = 0x0C;
5619 bytes.low = j->m_DAAShadowRegs.COP_REGS.COP.Tone2Coeff[3];
5620 if (!daa_load(&bytes, j))
5621 return 0;
5622
5623 bytes.high = j->m_DAAShadowRegs.COP_REGS.COP.Tone2Coeff[2];
5624 bytes.low = j->m_DAAShadowRegs.COP_REGS.COP.Tone2Coeff[1];
5625 if (!daa_load(&bytes, j))
5626 return 0;
5627
5628 bytes.high = j->m_DAAShadowRegs.COP_REGS.COP.Tone2Coeff[0];
5629 bytes.low = 0x00;
5630 if (!daa_load(&bytes, j))
5631 return 0;
5632
5633 if (!SCI_Control(j, SCI_End))
5634 return 0;
5635 if (!SCI_WaitLowSCI(j))
5636 return 0;
5637
5638 bytes.high = 0x0D;
5639 bytes.low = j->m_DAAShadowRegs.COP_REGS.COP.LevelmeteringRinging[3];
5640 if (!daa_load(&bytes, j))
5641 return 0;
5642
5643 bytes.high = j->m_DAAShadowRegs.COP_REGS.COP.LevelmeteringRinging[2];
5644 bytes.low = j->m_DAAShadowRegs.COP_REGS.COP.LevelmeteringRinging[1];
5645 if (!daa_load(&bytes, j))
5646 return 0;
5647
5648 bytes.high = j->m_DAAShadowRegs.COP_REGS.COP.LevelmeteringRinging[0];
5649 bytes.low = 0x00;
5650 if (!daa_load(&bytes, j))
5651 return 0;
5652
5653 if (!SCI_Control(j, SCI_End))
5654 return 0;
5655 if (!SCI_WaitLowSCI(j))
5656 return 0;
5657
5658 bytes.high = 0x0E;
5659 bytes.low = j->m_DAAShadowRegs.COP_REGS.COP.CallerID1stTone[7];
5660 if (!daa_load(&bytes, j))
5661 return 0;
5662
5663 bytes.high = j->m_DAAShadowRegs.COP_REGS.COP.CallerID1stTone[6];
5664 bytes.low = j->m_DAAShadowRegs.COP_REGS.COP.CallerID1stTone[5];
5665 if (!daa_load(&bytes, j))
5666 return 0;
5667
5668 bytes.high = j->m_DAAShadowRegs.COP_REGS.COP.CallerID1stTone[4];
5669 bytes.low = j->m_DAAShadowRegs.COP_REGS.COP.CallerID1stTone[3];
5670 if (!daa_load(&bytes, j))
5671 return 0;
5672
5673 bytes.high = j->m_DAAShadowRegs.COP_REGS.COP.CallerID1stTone[2];
5674 bytes.low = j->m_DAAShadowRegs.COP_REGS.COP.CallerID1stTone[1];
5675 if (!daa_load(&bytes, j))
5676 return 0;
5677
5678 bytes.high = j->m_DAAShadowRegs.COP_REGS.COP.CallerID1stTone[0];
5679 bytes.low = 0x00;
5680 if (!daa_load(&bytes, j))
5681 return 0;
5682
5683 if (!SCI_Control(j, SCI_End))
5684 return 0;
5685 if (!SCI_WaitLowSCI(j))
5686 return 0;
5687
5688 bytes.high = 0x0F;
5689 bytes.low = j->m_DAAShadowRegs.COP_REGS.COP.CallerID2ndTone[7];
5690 if (!daa_load(&bytes, j))
5691 return 0;
5692
5693 bytes.high = j->m_DAAShadowRegs.COP_REGS.COP.CallerID2ndTone[6];
5694 bytes.low = j->m_DAAShadowRegs.COP_REGS.COP.CallerID2ndTone[5];
5695 if (!daa_load(&bytes, j))
5696 return 0;
5697
5698 bytes.high = j->m_DAAShadowRegs.COP_REGS.COP.CallerID2ndTone[4];
5699 bytes.low = j->m_DAAShadowRegs.COP_REGS.COP.CallerID2ndTone[3];
5700 if (!daa_load(&bytes, j))
5701 return 0;
5702
5703 bytes.high = j->m_DAAShadowRegs.COP_REGS.COP.CallerID2ndTone[2];
5704 bytes.low = j->m_DAAShadowRegs.COP_REGS.COP.CallerID2ndTone[1];
5705 if (!daa_load(&bytes, j))
5706 return 0;
5707
5708 bytes.high = j->m_DAAShadowRegs.COP_REGS.COP.CallerID2ndTone[0];
5709 bytes.low = 0x00;
5710 if (!daa_load(&bytes, j))
5711 return 0;
5712
5713 udelay(32);
5714 j->pld_scrr.byte = inb_p(j->XILINXbase);
5715 if (!SCI_Control(j, SCI_End))
5716 return 0;
5717
5718 outb_p(j->pld_scrw.byte, j->XILINXbase);
5719
5720 if (ixjdebug & 0x0002)
5721 printk("DAA Coefficients Loaded\n");
5722
5723 j->flags.pstncheck = 0;
5724 return 1;
5725}
5726
5727static int ixj_set_tone_off(unsigned short arg, IXJ *j)
5728{
5729 j->tone_off_time = arg;
5730 if (ixj_WriteDSPCommand(0x6E05, j)) /* Set Tone Off Period */
5731
5732 return -1;
5733 if (ixj_WriteDSPCommand(arg, j))
5734 return -1;
5735 return 0;
5736}
5737
5738static int ixj_get_tone_on(IXJ *j)
5739{
5740 if (ixj_WriteDSPCommand(0x6E06, j)) /* Get Tone On Period */
5741
5742 return -1;
5743 return 0;
5744}
5745
5746static int ixj_get_tone_off(IXJ *j)
5747{
5748 if (ixj_WriteDSPCommand(0x6E07, j)) /* Get Tone Off Period */
5749
5750 return -1;
5751 return 0;
5752}
5753
5754static void ixj_busytone(IXJ *j)
5755{
5756 j->flags.ringback = 0;
5757 j->flags.dialtone = 0;
5758 j->flags.busytone = 1;
5759 ixj_set_tone_on(0x07D0, j);
5760 ixj_set_tone_off(0x07D0, j);
5761 ixj_play_tone(j, 27);
5762}
5763
5764static void ixj_dialtone(IXJ *j)
5765{
5766 j->flags.ringback = 0;
5767 j->flags.dialtone = 1;
5768 j->flags.busytone = 0;
5769 if (j->dsp.low == 0x20) {
5770 return;
5771 } else {
5772 ixj_set_tone_on(0xFFFF, j);
5773 ixj_set_tone_off(0x0000, j);
5774 ixj_play_tone(j, 25);
5775 }
5776}
5777
5778static void ixj_cpt_stop(IXJ *j)
5779{
5780 if(j->tone_state || j->tone_cadence_state)
5781 {
5782 j->flags.dialtone = 0;
5783 j->flags.busytone = 0;
5784 j->flags.ringback = 0;
5785 ixj_set_tone_on(0x0001, j);
5786 ixj_set_tone_off(0x0000, j);
5787 ixj_play_tone(j, 0);
5788 j->tone_state = j->tone_cadence_state = 0;
5789 if (j->cadence_t) {
5790 kfree(j->cadence_t->ce);
5791 kfree(j->cadence_t);
5792 j->cadence_t = NULL;
5793 }
5794 }
5795 if (j->play_mode == -1 && j->rec_mode == -1)
5796 idle(j);
5797 if (j->play_mode != -1 && j->dsp.low == 0x20)
5798 ixj_play_start(j);
5799 if (j->rec_mode != -1 && j->dsp.low == 0x20)
5800 ixj_record_start(j);
5801}
5802
5803static void ixj_ringback(IXJ *j)
5804{
5805 j->flags.busytone = 0;
5806 j->flags.dialtone = 0;
5807 j->flags.ringback = 1;
5808 ixj_set_tone_on(0x0FA0, j);
5809 ixj_set_tone_off(0x2EE0, j);
5810 ixj_play_tone(j, 26);
5811}
5812
5813static void ixj_testram(IXJ *j)
5814{
5815 ixj_WriteDSPCommand(0x3001, j); /* Test External SRAM */
5816}
5817
5818static int ixj_build_cadence(IXJ *j, IXJ_CADENCE __user * cp)
5819{
5820 ixj_cadence *lcp;
5821 IXJ_CADENCE_ELEMENT __user *cep;
5822 IXJ_CADENCE_ELEMENT *lcep;
5823 IXJ_TONE ti;
5824 int err;
5825
5826 lcp = kmalloc(sizeof(ixj_cadence), GFP_KERNEL);
5827 if (lcp == NULL)
5828 return -ENOMEM;
5829
5830 err = -EFAULT;
5831 if (copy_from_user(&lcp->elements_used,
5832 &cp->elements_used, sizeof(int)))
5833 goto out;
5834 if (copy_from_user(&lcp->termination,
5835 &cp->termination, sizeof(IXJ_CADENCE_TERM)))
5836 goto out;
5837 if (get_user(cep, &cp->ce))
5838 goto out;
5839
5840 err = -EINVAL;
5841 if ((unsigned)lcp->elements_used >= ~0U/sizeof(IXJ_CADENCE_ELEMENT))
5842 goto out;
5843
5844 err = -ENOMEM;
5845 lcep = kmalloc(sizeof(IXJ_CADENCE_ELEMENT) * lcp->elements_used, GFP_KERNEL);
5846 if (!lcep)
5847 goto out;
5848
5849 err = -EFAULT;
5850 if (copy_from_user(lcep, cep, sizeof(IXJ_CADENCE_ELEMENT) * lcp->elements_used))
5851 goto out1;
5852
5853 if (j->cadence_t) {
5854 kfree(j->cadence_t->ce);
5855 kfree(j->cadence_t);
5856 }
5857 lcp->ce = (void *) lcep;
5858 j->cadence_t = lcp;
5859 j->tone_cadence_state = 0;
5860 ixj_set_tone_on(lcp->ce[0].tone_on_time, j);
5861 ixj_set_tone_off(lcp->ce[0].tone_off_time, j);
5862 if (j->cadence_t->ce[j->tone_cadence_state].freq0) {
5863 ti.tone_index = j->cadence_t->ce[j->tone_cadence_state].index;
5864 ti.freq0 = j->cadence_t->ce[j->tone_cadence_state].freq0;
5865 ti.gain0 = j->cadence_t->ce[j->tone_cadence_state].gain0;
5866 ti.freq1 = j->cadence_t->ce[j->tone_cadence_state].freq1;
5867 ti.gain1 = j->cadence_t->ce[j->tone_cadence_state].gain1;
5868 ixj_init_tone(j, &ti);
5869 }
5870 ixj_play_tone(j, lcp->ce[0].index);
5871 return 1;
5872out1:
5873 kfree(lcep);
5874out:
5875 kfree(lcp);
5876 return err;
5877}
5878
5879static int ixj_build_filter_cadence(IXJ *j, IXJ_FILTER_CADENCE __user * cp)
5880{
5881 IXJ_FILTER_CADENCE *lcp;
5882 lcp = memdup_user(cp, sizeof(IXJ_FILTER_CADENCE));
5883 if (IS_ERR(lcp)) {
5884 if(ixjdebug & 0x0001) {
5885 printk(KERN_INFO "Could not allocate memory for cadence or could not copy cadence to kernel\n");
5886 }
5887 return PTR_ERR(lcp);
5888 }
5889 if (lcp->filter > 5) {
5890 if(ixjdebug & 0x0001) {
5891 printk(KERN_INFO "Cadence out of range\n");
5892 }
5893 kfree(lcp);
5894 return -1;
5895 }
5896 j->cadence_f[lcp->filter].state = 0;
5897 j->cadence_f[lcp->filter].enable = lcp->enable;
5898 j->filter_en[lcp->filter] = j->cadence_f[lcp->filter].en_filter = lcp->en_filter;
5899 j->cadence_f[lcp->filter].on1 = lcp->on1;
5900 j->cadence_f[lcp->filter].on1min = 0;
5901 j->cadence_f[lcp->filter].on1max = 0;
5902 j->cadence_f[lcp->filter].off1 = lcp->off1;
5903 j->cadence_f[lcp->filter].off1min = 0;
5904 j->cadence_f[lcp->filter].off1max = 0;
5905 j->cadence_f[lcp->filter].on2 = lcp->on2;
5906 j->cadence_f[lcp->filter].on2min = 0;
5907 j->cadence_f[lcp->filter].on2max = 0;
5908 j->cadence_f[lcp->filter].off2 = lcp->off2;
5909 j->cadence_f[lcp->filter].off2min = 0;
5910 j->cadence_f[lcp->filter].off2max = 0;
5911 j->cadence_f[lcp->filter].on3 = lcp->on3;
5912 j->cadence_f[lcp->filter].on3min = 0;
5913 j->cadence_f[lcp->filter].on3max = 0;
5914 j->cadence_f[lcp->filter].off3 = lcp->off3;
5915 j->cadence_f[lcp->filter].off3min = 0;
5916 j->cadence_f[lcp->filter].off3max = 0;
5917 if(ixjdebug & 0x0002) {
5918 printk(KERN_INFO "Cadence %d loaded\n", lcp->filter);
5919 }
5920 kfree(lcp);
5921 return 0;
5922}
5923
5924static void add_caps(IXJ *j)
5925{
5926 j->caps = 0;
5927 j->caplist[j->caps].cap = PHONE_VENDOR_QUICKNET;
5928 strcpy(j->caplist[j->caps].desc, "Quicknet Technologies, Inc. (www.quicknet.net)");
5929 j->caplist[j->caps].captype = vendor;
5930 j->caplist[j->caps].handle = j->caps;
5931 j->caps++;
5932 j->caplist[j->caps].captype = device;
5933 switch (j->cardtype) {
5934 case QTI_PHONEJACK:
5935 strcpy(j->caplist[j->caps].desc, "Quicknet Internet PhoneJACK");
5936 break;
5937 case QTI_LINEJACK:
5938 strcpy(j->caplist[j->caps].desc, "Quicknet Internet LineJACK");
5939 break;
5940 case QTI_PHONEJACK_LITE:
5941 strcpy(j->caplist[j->caps].desc, "Quicknet Internet PhoneJACK Lite");
5942 break;
5943 case QTI_PHONEJACK_PCI:
5944 strcpy(j->caplist[j->caps].desc, "Quicknet Internet PhoneJACK PCI");
5945 break;
5946 case QTI_PHONECARD:
5947 strcpy(j->caplist[j->caps].desc, "Quicknet Internet PhoneCARD");
5948 break;
5949 }
5950 j->caplist[j->caps].cap = j->cardtype;
5951 j->caplist[j->caps].handle = j->caps;
5952 j->caps++;
5953 strcpy(j->caplist[j->caps].desc, "POTS");
5954 j->caplist[j->caps].captype = port;
5955 j->caplist[j->caps].cap = pots;
5956 j->caplist[j->caps].handle = j->caps;
5957 j->caps++;
5958
5959 /* add devices that can do speaker/mic */
5960 switch (j->cardtype) {
5961 case QTI_PHONEJACK:
5962 case QTI_LINEJACK:
5963 case QTI_PHONEJACK_PCI:
5964 case QTI_PHONECARD:
5965 strcpy(j->caplist[j->caps].desc, "SPEAKER");
5966 j->caplist[j->caps].captype = port;
5967 j->caplist[j->caps].cap = speaker;
5968 j->caplist[j->caps].handle = j->caps;
5969 j->caps++;
5970 default:
5971 break;
5972 }
5973
5974 /* add devices that can do handset */
5975 switch (j->cardtype) {
5976 case QTI_PHONEJACK:
5977 strcpy(j->caplist[j->caps].desc, "HANDSET");
5978 j->caplist[j->caps].captype = port;
5979 j->caplist[j->caps].cap = handset;
5980 j->caplist[j->caps].handle = j->caps;
5981 j->caps++;
5982 break;
5983 default:
5984 break;
5985 }
5986
5987 /* add devices that can do PSTN */
5988 switch (j->cardtype) {
5989 case QTI_LINEJACK:
5990 strcpy(j->caplist[j->caps].desc, "PSTN");
5991 j->caplist[j->caps].captype = port;
5992 j->caplist[j->caps].cap = pstn;
5993 j->caplist[j->caps].handle = j->caps;
5994 j->caps++;
5995 break;
5996 default:
5997 break;
5998 }
5999
6000 /* add codecs - all cards can do uLaw, linear 8/16, and Windows sound system */
6001 strcpy(j->caplist[j->caps].desc, "ULAW");
6002 j->caplist[j->caps].captype = codec;
6003 j->caplist[j->caps].cap = ULAW;
6004 j->caplist[j->caps].handle = j->caps;
6005 j->caps++;
6006
6007 strcpy(j->caplist[j->caps].desc, "LINEAR 16 bit");
6008 j->caplist[j->caps].captype = codec;
6009 j->caplist[j->caps].cap = LINEAR16;
6010 j->caplist[j->caps].handle = j->caps;
6011 j->caps++;
6012
6013 strcpy(j->caplist[j->caps].desc, "LINEAR 8 bit");
6014 j->caplist[j->caps].captype = codec;
6015 j->caplist[j->caps].cap = LINEAR8;
6016 j->caplist[j->caps].handle = j->caps;
6017 j->caps++;
6018
6019 strcpy(j->caplist[j->caps].desc, "Windows Sound System");
6020 j->caplist[j->caps].captype = codec;
6021 j->caplist[j->caps].cap = WSS;
6022 j->caplist[j->caps].handle = j->caps;
6023 j->caps++;
6024
6025 /* software ALAW codec, made from ULAW */
6026 strcpy(j->caplist[j->caps].desc, "ALAW");
6027 j->caplist[j->caps].captype = codec;
6028 j->caplist[j->caps].cap = ALAW;
6029 j->caplist[j->caps].handle = j->caps;
6030 j->caps++;
6031
6032 /* version 12 of the 8020 does the following codecs in a broken way */
6033 if (j->dsp.low != 0x20 || j->ver.low != 0x12) {
6034 strcpy(j->caplist[j->caps].desc, "G.723.1 6.3kbps");
6035 j->caplist[j->caps].captype = codec;
6036 j->caplist[j->caps].cap = G723_63;
6037 j->caplist[j->caps].handle = j->caps;
6038 j->caps++;
6039
6040 strcpy(j->caplist[j->caps].desc, "G.723.1 5.3kbps");
6041 j->caplist[j->caps].captype = codec;
6042 j->caplist[j->caps].cap = G723_53;
6043 j->caplist[j->caps].handle = j->caps;
6044 j->caps++;
6045
6046 strcpy(j->caplist[j->caps].desc, "TrueSpeech 4.8kbps");
6047 j->caplist[j->caps].captype = codec;
6048 j->caplist[j->caps].cap = TS48;
6049 j->caplist[j->caps].handle = j->caps;
6050 j->caps++;
6051
6052 strcpy(j->caplist[j->caps].desc, "TrueSpeech 4.1kbps");
6053 j->caplist[j->caps].captype = codec;
6054 j->caplist[j->caps].cap = TS41;
6055 j->caplist[j->caps].handle = j->caps;
6056 j->caps++;
6057 }
6058
6059 /* 8020 chips can do TS8.5 native, and 8021/8022 can load it */
6060 if (j->dsp.low == 0x20 || j->flags.ts85_loaded) {
6061 strcpy(j->caplist[j->caps].desc, "TrueSpeech 8.5kbps");
6062 j->caplist[j->caps].captype = codec;
6063 j->caplist[j->caps].cap = TS85;
6064 j->caplist[j->caps].handle = j->caps;
6065 j->caps++;
6066 }
6067
6068 /* 8021 chips can do G728 */
6069 if (j->dsp.low == 0x21) {
6070 strcpy(j->caplist[j->caps].desc, "G.728 16kbps");
6071 j->caplist[j->caps].captype = codec;
6072 j->caplist[j->caps].cap = G728;
6073 j->caplist[j->caps].handle = j->caps;
6074 j->caps++;
6075 }
6076
6077 /* 8021/8022 chips can do G729 if loaded */
6078 if (j->dsp.low != 0x20 && j->flags.g729_loaded) {
6079 strcpy(j->caplist[j->caps].desc, "G.729A 8kbps");
6080 j->caplist[j->caps].captype = codec;
6081 j->caplist[j->caps].cap = G729;
6082 j->caplist[j->caps].handle = j->caps;
6083 j->caps++;
6084 }
6085 if (j->dsp.low != 0x20 && j->flags.g729_loaded) {
6086 strcpy(j->caplist[j->caps].desc, "G.729B 8kbps");
6087 j->caplist[j->caps].captype = codec;
6088 j->caplist[j->caps].cap = G729B;
6089 j->caplist[j->caps].handle = j->caps;
6090 j->caps++;
6091 }
6092}
6093
6094static int capabilities_check(IXJ *j, struct phone_capability *pcreq)
6095{
6096 int cnt;
6097 int retval = 0;
6098 for (cnt = 0; cnt < j->caps; cnt++) {
6099 if (pcreq->captype == j->caplist[cnt].captype
6100 && pcreq->cap == j->caplist[cnt].cap) {
6101 retval = 1;
6102 break;
6103 }
6104 }
6105 return retval;
6106}
6107
6108static long do_ixj_ioctl(struct file *file_p, unsigned int cmd, unsigned long arg)
6109{
6110 IXJ_TONE ti;
6111 IXJ_FILTER jf;
6112 IXJ_FILTER_RAW jfr;
6113 void __user *argp = (void __user *)arg;
6114 struct inode *inode = file_p->f_path.dentry->d_inode;
6115 unsigned int minor = iminor(inode);
6116 unsigned int raise, mant;
6117 int board = NUM(inode);
6118
6119 IXJ *j = get_ixj(NUM(inode));
6120
6121 int retval = 0;
6122
6123 /*
6124 * Set up locks to ensure that only one process is talking to the DSP at a time.
6125 * This is necessary to keep the DSP from locking up.
6126 */
6127 while(test_and_set_bit(board, (void *)&j->busyflags) != 0)
6128 schedule_timeout_interruptible(1);
6129 if (ixjdebug & 0x0040)
6130 printk("phone%d ioctl, cmd: 0x%x, arg: 0x%lx\n", minor, cmd, arg);
6131 if (minor >= IXJMAX) {
6132 clear_bit(board, &j->busyflags);
6133 return -ENODEV;
6134 }
6135 /*
6136 * Check ioctls only root can use.
6137 */
6138 if (!capable(CAP_SYS_ADMIN)) {
6139 switch (cmd) {
6140 case IXJCTL_TESTRAM:
6141 case IXJCTL_HZ:
6142 retval = -EPERM;
6143 }
6144 }
6145 switch (cmd) {
6146 case IXJCTL_TESTRAM:
6147 ixj_testram(j);
6148 retval = (j->ssr.high << 8) + j->ssr.low;
6149 break;
6150 case IXJCTL_CARDTYPE:
6151 retval = j->cardtype;
6152 break;
6153 case IXJCTL_SERIAL:
6154 retval = j->serial;
6155 break;
6156 case IXJCTL_VERSION:
6157 {
6158 char arg_str[100];
6159 snprintf(arg_str, sizeof(arg_str),
6160 "\nDriver version %i.%i.%i", IXJ_VER_MAJOR,
6161 IXJ_VER_MINOR, IXJ_BLD_VER);
6162 if (copy_to_user(argp, arg_str, strlen(arg_str)))
6163 retval = -EFAULT;
6164 }
6165 break;
6166 case PHONE_RING_CADENCE:
6167 j->ring_cadence = arg;
6168 break;
6169 case IXJCTL_CIDCW:
6170 if(arg) {
6171 if (copy_from_user(&j->cid_send, argp, sizeof(PHONE_CID))) {
6172 retval = -EFAULT;
6173 break;
6174 }
6175 } else {
6176 memset(&j->cid_send, 0, sizeof(PHONE_CID));
6177 }
6178 ixj_write_cidcw(j);
6179 break;
6180 /* Binary compatbility */
6181 case OLD_PHONE_RING_START:
6182 arg = 0;
6183 /* Fall through */
6184 case PHONE_RING_START:
6185 if(arg) {
6186 if (copy_from_user(&j->cid_send, argp, sizeof(PHONE_CID))) {
6187 retval = -EFAULT;
6188 break;
6189 }
6190 ixj_write_cid(j);
6191 } else {
6192 memset(&j->cid_send, 0, sizeof(PHONE_CID));
6193 }
6194 ixj_ring_start(j);
6195 break;
6196 case PHONE_RING_STOP:
6197 j->flags.cringing = 0;
6198 if(j->cadence_f[5].enable) {
6199 j->cadence_f[5].state = 0;
6200 }
6201 ixj_ring_off(j);
6202 break;
6203 case PHONE_RING:
6204 retval = ixj_ring(j);
6205 break;
6206 case PHONE_EXCEPTION:
6207 retval = j->ex.bytes;
6208 if(j->ex.bits.flash) {
6209 j->flash_end = 0;
6210 j->ex.bits.flash = 0;
6211 }
6212 j->ex.bits.pstn_ring = 0;
6213 j->ex.bits.caller_id = 0;
6214 j->ex.bits.pstn_wink = 0;
6215 j->ex.bits.f0 = 0;
6216 j->ex.bits.f1 = 0;
6217 j->ex.bits.f2 = 0;
6218 j->ex.bits.f3 = 0;
6219 j->ex.bits.fc0 = 0;
6220 j->ex.bits.fc1 = 0;
6221 j->ex.bits.fc2 = 0;
6222 j->ex.bits.fc3 = 0;
6223 j->ex.bits.reserved = 0;
6224 break;
6225 case PHONE_HOOKSTATE:
6226 j->ex.bits.hookstate = 0;
6227 retval = j->hookstate; //j->r_hook;
6228 break;
6229 case IXJCTL_SET_LED:
6230 LED_SetState(arg, j);
6231 break;
6232 case PHONE_FRAME:
6233 retval = set_base_frame(j, arg);
6234 break;
6235 case PHONE_REC_CODEC:
6236 retval = set_rec_codec(j, arg);
6237 break;
6238 case PHONE_VAD:
6239 ixj_vad(j, arg);
6240 break;
6241 case PHONE_REC_START:
6242 ixj_record_start(j);
6243 break;
6244 case PHONE_REC_STOP:
6245 ixj_record_stop(j);
6246 break;
6247 case PHONE_REC_DEPTH:
6248 set_rec_depth(j, arg);
6249 break;
6250 case PHONE_REC_VOLUME:
6251 if(arg == -1) {
6252 retval = get_rec_volume(j);
6253 }
6254 else {
6255 set_rec_volume(j, arg);
6256 retval = arg;
6257 }
6258 break;
6259 case PHONE_REC_VOLUME_LINEAR:
6260 if(arg == -1) {
6261 retval = get_rec_volume_linear(j);
6262 }
6263 else {
6264 set_rec_volume_linear(j, arg);
6265 retval = arg;
6266 }
6267 break;
6268 case IXJCTL_DTMF_PRESCALE:
6269 if(arg == -1) {
6270 retval = get_dtmf_prescale(j);
6271 }
6272 else {
6273 set_dtmf_prescale(j, arg);
6274 retval = arg;
6275 }
6276 break;
6277 case PHONE_REC_LEVEL:
6278 retval = get_rec_level(j);
6279 break;
6280 case IXJCTL_SC_RXG:
6281 retval = ixj_siadc(j, arg);
6282 break;
6283 case IXJCTL_SC_TXG:
6284 retval = ixj_sidac(j, arg);
6285 break;
6286 case IXJCTL_AEC_START:
6287 ixj_aec_start(j, arg);
6288 break;
6289 case IXJCTL_AEC_STOP:
6290 aec_stop(j);
6291 break;
6292 case IXJCTL_AEC_GET_LEVEL:
6293 retval = j->aec_level;
6294 break;
6295 case PHONE_PLAY_CODEC:
6296 retval = set_play_codec(j, arg);
6297 break;
6298 case PHONE_PLAY_START:
6299 retval = ixj_play_start(j);
6300 break;
6301 case PHONE_PLAY_STOP:
6302 ixj_play_stop(j);
6303 break;
6304 case PHONE_PLAY_DEPTH:
6305 set_play_depth(j, arg);
6306 break;
6307 case PHONE_PLAY_VOLUME:
6308 if(arg == -1) {
6309 retval = get_play_volume(j);
6310 }
6311 else {
6312 set_play_volume(j, arg);
6313 retval = arg;
6314 }
6315 break;
6316 case PHONE_PLAY_VOLUME_LINEAR:
6317 if(arg == -1) {
6318 retval = get_play_volume_linear(j);
6319 }
6320 else {
6321 set_play_volume_linear(j, arg);
6322 retval = arg;
6323 }
6324 break;
6325 case PHONE_PLAY_LEVEL:
6326 retval = get_play_level(j);
6327 break;
6328 case IXJCTL_DSP_TYPE:
6329 retval = (j->dsp.high << 8) + j->dsp.low;
6330 break;
6331 case IXJCTL_DSP_VERSION:
6332 retval = (j->ver.high << 8) + j->ver.low;
6333 break;
6334 case IXJCTL_HZ:
6335 hertz = arg;
6336 break;
6337 case IXJCTL_RATE:
6338 if (arg > hertz)
6339 retval = -1;
6340 else
6341 samplerate = arg;
6342 break;
6343 case IXJCTL_DRYBUFFER_READ:
6344 put_user(j->drybuffer, (unsigned long __user *) argp);
6345 break;
6346 case IXJCTL_DRYBUFFER_CLEAR:
6347 j->drybuffer = 0;
6348 break;
6349 case IXJCTL_FRAMES_READ:
6350 put_user(j->framesread, (unsigned long __user *) argp);
6351 break;
6352 case IXJCTL_FRAMES_WRITTEN:
6353 put_user(j->frameswritten, (unsigned long __user *) argp);
6354 break;
6355 case IXJCTL_READ_WAIT:
6356 put_user(j->read_wait, (unsigned long __user *) argp);
6357 break;
6358 case IXJCTL_WRITE_WAIT:
6359 put_user(j->write_wait, (unsigned long __user *) argp);
6360 break;
6361 case PHONE_MAXRINGS:
6362 j->maxrings = arg;
6363 break;
6364 case PHONE_SET_TONE_ON_TIME:
6365 ixj_set_tone_on(arg, j);
6366 break;
6367 case PHONE_SET_TONE_OFF_TIME:
6368 ixj_set_tone_off(arg, j);
6369 break;
6370 case PHONE_GET_TONE_ON_TIME:
6371 if (ixj_get_tone_on(j)) {
6372 retval = -1;
6373 } else {
6374 retval = (j->ssr.high << 8) + j->ssr.low;
6375 }
6376 break;
6377 case PHONE_GET_TONE_OFF_TIME:
6378 if (ixj_get_tone_off(j)) {
6379 retval = -1;
6380 } else {
6381 retval = (j->ssr.high << 8) + j->ssr.low;
6382 }
6383 break;
6384 case PHONE_PLAY_TONE:
6385 if (!j->tone_state)
6386 retval = ixj_play_tone(j, arg);
6387 else
6388 retval = -1;
6389 break;
6390 case PHONE_GET_TONE_STATE:
6391 retval = j->tone_state;
6392 break;
6393 case PHONE_DTMF_READY:
6394 retval = j->ex.bits.dtmf_ready;
6395 break;
6396 case PHONE_GET_DTMF:
6397 if (ixj_hookstate(j)) {
6398 if (j->dtmf_rp != j->dtmf_wp) {
6399 retval = j->dtmfbuffer[j->dtmf_rp];
6400 j->dtmf_rp++;
6401 if (j->dtmf_rp == 79)
6402 j->dtmf_rp = 0;
6403 if (j->dtmf_rp == j->dtmf_wp) {
6404 j->ex.bits.dtmf_ready = j->dtmf_rp = j->dtmf_wp = 0;
6405 }
6406 }
6407 }
6408 break;
6409 case PHONE_GET_DTMF_ASCII:
6410 if (ixj_hookstate(j)) {
6411 if (j->dtmf_rp != j->dtmf_wp) {
6412 switch (j->dtmfbuffer[j->dtmf_rp]) {
6413 case 10:
6414 retval = 42; /* '*'; */
6415
6416 break;
6417 case 11:
6418 retval = 48; /*'0'; */
6419
6420 break;
6421 case 12:
6422 retval = 35; /*'#'; */
6423
6424 break;
6425 case 28:
6426 retval = 65; /*'A'; */
6427
6428 break;
6429 case 29:
6430 retval = 66; /*'B'; */
6431
6432 break;
6433 case 30:
6434 retval = 67; /*'C'; */
6435
6436 break;
6437 case 31:
6438 retval = 68; /*'D'; */
6439
6440 break;
6441 default:
6442 retval = 48 + j->dtmfbuffer[j->dtmf_rp];
6443 break;
6444 }
6445 j->dtmf_rp++;
6446 if (j->dtmf_rp == 79)
6447 j->dtmf_rp = 0;
6448 if(j->dtmf_rp == j->dtmf_wp)
6449 {
6450 j->ex.bits.dtmf_ready = j->dtmf_rp = j->dtmf_wp = 0;
6451 }
6452 }
6453 }
6454 break;
6455 case PHONE_DTMF_OOB:
6456 j->flags.dtmf_oob = arg;
6457 break;
6458 case PHONE_DIALTONE:
6459 ixj_dialtone(j);
6460 break;
6461 case PHONE_BUSY:
6462 ixj_busytone(j);
6463 break;
6464 case PHONE_RINGBACK:
6465 ixj_ringback(j);
6466 break;
6467 case PHONE_WINK:
6468 if(j->cardtype == QTI_PHONEJACK)
6469 retval = -1;
6470 else
6471 retval = ixj_wink(j);
6472 break;
6473 case PHONE_CPT_STOP:
6474 ixj_cpt_stop(j);
6475 break;
6476 case PHONE_QUERY_CODEC:
6477 {
6478 struct phone_codec_data pd;
6479 int val;
6480 int proto_size[] = {
6481 -1,
6482 12, 10, 16, 9, 8, 48, 5,
6483 40, 40, 80, 40, 40, 6
6484 };
6485 if(copy_from_user(&pd, argp, sizeof(pd))) {
6486 retval = -EFAULT;
6487 break;
6488 }
6489 if(pd.type<1 || pd.type>13) {
6490 retval = -EPROTONOSUPPORT;
6491 break;
6492 }
6493 if(pd.type<G729)
6494 val=proto_size[pd.type];
6495 else switch(j->baseframe.low)
6496 {
6497 case 0xA0:val=2*proto_size[pd.type];break;
6498 case 0x50:val=proto_size[pd.type];break;
6499 default:val=proto_size[pd.type]*3;break;
6500 }
6501 pd.buf_min=pd.buf_max=pd.buf_opt=val;
6502 if(copy_to_user(argp, &pd, sizeof(pd)))
6503 retval = -EFAULT;
6504 break;
6505 }
6506 case IXJCTL_DSP_IDLE:
6507 idle(j);
6508 break;
6509 case IXJCTL_MIXER:
6510 if ((arg & 0xff) == 0xff)
6511 retval = ixj_get_mixer(arg, j);
6512 else
6513 ixj_mixer(arg, j);
6514 break;
6515 case IXJCTL_DAA_COEFF_SET:
6516 switch (arg) {
6517 case DAA_US:
6518 DAA_Coeff_US(j);
6519 retval = ixj_daa_write(j);
6520 break;
6521 case DAA_UK:
6522 DAA_Coeff_UK(j);
6523 retval = ixj_daa_write(j);
6524 break;
6525 case DAA_FRANCE:
6526 DAA_Coeff_France(j);
6527 retval = ixj_daa_write(j);
6528 break;
6529 case DAA_GERMANY:
6530 DAA_Coeff_Germany(j);
6531 retval = ixj_daa_write(j);
6532 break;
6533 case DAA_AUSTRALIA:
6534 DAA_Coeff_Australia(j);
6535 retval = ixj_daa_write(j);
6536 break;
6537 case DAA_JAPAN:
6538 DAA_Coeff_Japan(j);
6539 retval = ixj_daa_write(j);
6540 break;
6541 default:
6542 retval = 1;
6543 break;
6544 }
6545 break;
6546 case IXJCTL_DAA_AGAIN:
6547 ixj_daa_cr4(j, arg | 0x02);
6548 break;
6549 case IXJCTL_PSTN_LINETEST:
6550 retval = ixj_linetest(j);
6551 break;
6552 case IXJCTL_VMWI:
6553 ixj_write_vmwi(j, arg);
6554 break;
6555 case IXJCTL_CID:
6556 if (copy_to_user(argp, &j->cid, sizeof(PHONE_CID)))
6557 retval = -EFAULT;
6558 j->ex.bits.caller_id = 0;
6559 break;
6560 case IXJCTL_WINK_DURATION:
6561 j->winktime = arg;
6562 break;
6563 case IXJCTL_PORT:
6564 if (arg)
6565 retval = ixj_set_port(j, arg);
6566 else
6567 retval = j->port;
6568 break;
6569 case IXJCTL_POTS_PSTN:
6570 retval = ixj_set_pots(j, arg);
6571 break;
6572 case PHONE_CAPABILITIES:
6573 add_caps(j);
6574 retval = j->caps;
6575 break;
6576 case PHONE_CAPABILITIES_LIST:
6577 add_caps(j);
6578 if (copy_to_user(argp, j->caplist, sizeof(struct phone_capability) * j->caps))
6579 retval = -EFAULT;
6580 break;
6581 case PHONE_CAPABILITIES_CHECK:
6582 {
6583 struct phone_capability cap;
6584 if (copy_from_user(&cap, argp, sizeof(cap)))
6585 retval = -EFAULT;
6586 else {
6587 add_caps(j);
6588 retval = capabilities_check(j, &cap);
6589 }
6590 }
6591 break;
6592 case PHONE_PSTN_SET_STATE:
6593 daa_set_mode(j, arg);
6594 break;
6595 case PHONE_PSTN_GET_STATE:
6596 retval = j->daa_mode;
6597 j->ex.bits.pstn_ring = 0;
6598 break;
6599 case IXJCTL_SET_FILTER:
6600 if (copy_from_user(&jf, argp, sizeof(jf)))
6601 retval = -EFAULT;
6602 else
6603 retval = ixj_init_filter(j, &jf);
6604 break;
6605 case IXJCTL_SET_FILTER_RAW:
6606 if (copy_from_user(&jfr, argp, sizeof(jfr)))
6607 retval = -EFAULT;
6608 else
6609 retval = ixj_init_filter_raw(j, &jfr);
6610 break;
6611 case IXJCTL_GET_FILTER_HIST:
6612 if(arg<0||arg>3)
6613 retval = -EINVAL;
6614 else
6615 retval = j->filter_hist[arg];
6616 break;
6617 case IXJCTL_INIT_TONE:
6618 if (copy_from_user(&ti, argp, sizeof(ti)))
6619 retval = -EFAULT;
6620 else
6621 retval = ixj_init_tone(j, &ti);
6622 break;
6623 case IXJCTL_TONE_CADENCE:
6624 retval = ixj_build_cadence(j, argp);
6625 break;
6626 case IXJCTL_FILTER_CADENCE:
6627 retval = ixj_build_filter_cadence(j, argp);
6628 break;
6629 case IXJCTL_SIGCTL:
6630 if (copy_from_user(&j->sigdef, argp, sizeof(IXJ_SIGDEF))) {
6631 retval = -EFAULT;
6632 break;
6633 }
6634 j->ixj_signals[j->sigdef.event] = j->sigdef.signal;
6635 if(j->sigdef.event < 33) {
6636 raise = 1;
6637 for(mant = 0; mant < j->sigdef.event; mant++){
6638 raise *= 2;
6639 }
6640 if(j->sigdef.signal)
6641 j->ex_sig.bytes |= raise;
6642 else
6643 j->ex_sig.bytes &= (raise^0xffff);
6644 }
6645 break;
6646 case IXJCTL_INTERCOM_STOP:
6647 if(arg < 0 || arg >= IXJMAX)
6648 return -EINVAL;
6649 j->intercom = -1;
6650 ixj_record_stop(j);
6651 ixj_play_stop(j);
6652 idle(j);
6653 get_ixj(arg)->intercom = -1;
6654 ixj_record_stop(get_ixj(arg));
6655 ixj_play_stop(get_ixj(arg));
6656 idle(get_ixj(arg));
6657 break;
6658 case IXJCTL_INTERCOM_START:
6659 if(arg < 0 || arg >= IXJMAX)
6660 return -EINVAL;
6661 j->intercom = arg;
6662 ixj_record_start(j);
6663 ixj_play_start(j);
6664 get_ixj(arg)->intercom = board;
6665 ixj_play_start(get_ixj(arg));
6666 ixj_record_start(get_ixj(arg));
6667 break;
6668 }
6669 if (ixjdebug & 0x0040)
6670 printk("phone%d ioctl end, cmd: 0x%x, arg: 0x%lx\n", minor, cmd, arg);
6671 clear_bit(board, &j->busyflags);
6672 return retval;
6673}
6674
6675static long ixj_ioctl(struct file *file_p, unsigned int cmd, unsigned long arg)
6676{
6677 long ret;
6678 mutex_lock(&ixj_mutex);
6679 ret = do_ixj_ioctl(file_p, cmd, arg);
6680 mutex_unlock(&ixj_mutex);
6681 return ret;
6682}
6683
6684static int ixj_fasync(int fd, struct file *file_p, int mode)
6685{
6686 IXJ *j = get_ixj(NUM(file_p->f_path.dentry->d_inode));
6687
6688 return fasync_helper(fd, file_p, mode, &j->async_queue);
6689}
6690
6691static const struct file_operations ixj_fops =
6692{
6693 .owner = THIS_MODULE,
6694 .read = ixj_enhanced_read,
6695 .write = ixj_enhanced_write,
6696 .poll = ixj_poll,
6697 .unlocked_ioctl = ixj_ioctl,
6698 .release = ixj_release,
6699 .fasync = ixj_fasync,
6700 .llseek = default_llseek,
6701};
6702
6703static int ixj_linetest(IXJ *j)
6704{
6705 j->flags.pstncheck = 1; /* Testing */
6706 j->flags.pstn_present = 0; /* Assume the line is not there */
6707
6708 daa_int_read(j); /*Clear DAA Interrupt flags */
6709 /* */
6710 /* Hold all relays in the normally de-energized position. */
6711 /* */
6712
6713 j->pld_slicw.bits.rly1 = 0;
6714 j->pld_slicw.bits.rly2 = 0;
6715 j->pld_slicw.bits.rly3 = 0;
6716 outb_p(j->pld_slicw.byte, j->XILINXbase + 0x01);
6717 j->pld_scrw.bits.daafsyncen = 0; /* Turn off DAA Frame Sync */
6718
6719 outb_p(j->pld_scrw.byte, j->XILINXbase);
6720 j->pld_slicr.byte = inb_p(j->XILINXbase + 0x01);
6721 if (j->pld_slicr.bits.potspstn) {
6722 j->flags.pots_pstn = 1;
6723 j->flags.pots_correct = 0;
6724 LED_SetState(0x4, j);
6725 } else {
6726 j->flags.pots_pstn = 0;
6727 j->pld_slicw.bits.rly1 = 0;
6728 j->pld_slicw.bits.rly2 = 0;
6729 j->pld_slicw.bits.rly3 = 1;
6730 outb_p(j->pld_slicw.byte, j->XILINXbase + 0x01);
6731 j->pld_scrw.bits.daafsyncen = 0; /* Turn off DAA Frame Sync */
6732
6733 outb_p(j->pld_scrw.byte, j->XILINXbase);
6734 daa_set_mode(j, SOP_PU_CONVERSATION);
6735 msleep(1000);
6736 daa_int_read(j);
6737 daa_set_mode(j, SOP_PU_RESET);
6738 if (j->m_DAAShadowRegs.XOP_REGS.XOP.xr0.bitreg.VDD_OK) {
6739 j->flags.pots_correct = 0; /* Should not be line voltage on POTS port. */
6740 LED_SetState(0x4, j);
6741 j->pld_slicw.bits.rly3 = 0;
6742 outb_p(j->pld_slicw.byte, j->XILINXbase + 0x01);
6743 } else {
6744 j->flags.pots_correct = 1;
6745 LED_SetState(0x8, j);
6746 j->pld_slicw.bits.rly1 = 1;
6747 j->pld_slicw.bits.rly2 = 0;
6748 j->pld_slicw.bits.rly3 = 0;
6749 outb_p(j->pld_slicw.byte, j->XILINXbase + 0x01);
6750 }
6751 }
6752 j->pld_slicw.bits.rly3 = 0;
6753 outb_p(j->pld_slicw.byte, j->XILINXbase + 0x01);
6754 daa_set_mode(j, SOP_PU_CONVERSATION);
6755 msleep(1000);
6756 daa_int_read(j);
6757 daa_set_mode(j, SOP_PU_RESET);
6758 if (j->m_DAAShadowRegs.XOP_REGS.XOP.xr0.bitreg.VDD_OK) {
6759 j->pstn_sleeptil = jiffies + (hertz / 4);
6760 j->flags.pstn_present = 1;
6761 } else {
6762 j->flags.pstn_present = 0;
6763 }
6764 if (j->flags.pstn_present) {
6765 if (j->flags.pots_correct) {
6766 LED_SetState(0xA, j);
6767 } else {
6768 LED_SetState(0x6, j);
6769 }
6770 } else {
6771 if (j->flags.pots_correct) {
6772 LED_SetState(0x9, j);
6773 } else {
6774 LED_SetState(0x5, j);
6775 }
6776 }
6777 j->flags.pstncheck = 0; /* Testing */
6778 return j->flags.pstn_present;
6779}
6780
6781static int ixj_selfprobe(IXJ *j)
6782{
6783 unsigned short cmd;
6784 int cnt;
6785 BYTES bytes;
6786
6787 init_waitqueue_head(&j->poll_q);
6788 init_waitqueue_head(&j->read_q);
6789 init_waitqueue_head(&j->write_q);
6790
6791 while(atomic_read(&j->DSPWrite) > 0)
6792 atomic_dec(&j->DSPWrite);
6793 if (ixjdebug & 0x0002)
6794 printk(KERN_INFO "Write IDLE to Software Control Register\n");
6795 ixj_WriteDSPCommand(0x0FE0, j); /* Put the DSP in full power mode. */
6796
6797 if (ixj_WriteDSPCommand(0x0000, j)) /* Write IDLE to Software Control Register */
6798 return -1;
6799/* The read values of the SSR should be 0x00 for the IDLE command */
6800 if (j->ssr.low || j->ssr.high)
6801 return -1;
6802 if (ixjdebug & 0x0002)
6803 printk(KERN_INFO "Get Device ID Code\n");
6804 if (ixj_WriteDSPCommand(0x3400, j)) /* Get Device ID Code */
6805 return -1;
6806 j->dsp.low = j->ssr.low;
6807 j->dsp.high = j->ssr.high;
6808 if (ixjdebug & 0x0002)
6809 printk(KERN_INFO "Get Device Version Code\n");
6810 if (ixj_WriteDSPCommand(0x3800, j)) /* Get Device Version Code */
6811 return -1;
6812 j->ver.low = j->ssr.low;
6813 j->ver.high = j->ssr.high;
6814 if (!j->cardtype) {
6815 if (j->dsp.low == 0x21) {
6816 bytes.high = bytes.low = inb_p(j->XILINXbase + 0x02);
6817 outb_p(bytes.low ^ 0xFF, j->XILINXbase + 0x02);
6818/* Test for Internet LineJACK or Internet PhoneJACK Lite */
6819 bytes.low = inb_p(j->XILINXbase + 0x02);
6820 if (bytes.low == bytes.high) /* Register is read only on */
6821 /* Internet PhoneJack Lite */
6822 {
6823 j->cardtype = QTI_PHONEJACK_LITE;
6824 if (!request_region(j->XILINXbase, 4, "ixj control")) {
6825 printk(KERN_INFO "ixj: can't get I/O address 0x%x\n", j->XILINXbase);
6826 return -1;
6827 }
6828 j->pld_slicw.pcib.e1 = 1;
6829 outb_p(j->pld_slicw.byte, j->XILINXbase);
6830 } else {
6831 j->cardtype = QTI_LINEJACK;
6832
6833 if (!request_region(j->XILINXbase, 8, "ixj control")) {
6834 printk(KERN_INFO "ixj: can't get I/O address 0x%x\n", j->XILINXbase);
6835 return -1;
6836 }
6837 }
6838 } else if (j->dsp.low == 0x22) {
6839 j->cardtype = QTI_PHONEJACK_PCI;
6840 request_region(j->XILINXbase, 4, "ixj control");
6841 j->pld_slicw.pcib.e1 = 1;
6842 outb_p(j->pld_slicw.byte, j->XILINXbase);
6843 } else
6844 j->cardtype = QTI_PHONEJACK;
6845 } else {
6846 switch (j->cardtype) {
6847 case QTI_PHONEJACK:
6848 if (!j->dsp.low != 0x20) {
6849 j->dsp.high = 0x80;
6850 j->dsp.low = 0x20;
6851 ixj_WriteDSPCommand(0x3800, j);
6852 j->ver.low = j->ssr.low;
6853 j->ver.high = j->ssr.high;
6854 }
6855 break;
6856 case QTI_LINEJACK:
6857 if (!request_region(j->XILINXbase, 8, "ixj control")) {
6858 printk(KERN_INFO "ixj: can't get I/O address 0x%x\n", j->XILINXbase);
6859 return -1;
6860 }
6861 break;
6862 case QTI_PHONEJACK_LITE:
6863 case QTI_PHONEJACK_PCI:
6864 if (!request_region(j->XILINXbase, 4, "ixj control")) {
6865 printk(KERN_INFO "ixj: can't get I/O address 0x%x\n", j->XILINXbase);
6866 return -1;
6867 }
6868 j->pld_slicw.pcib.e1 = 1;
6869 outb_p(j->pld_slicw.byte, j->XILINXbase);
6870 break;
6871 case QTI_PHONECARD:
6872 break;
6873 }
6874 }
6875 if (j->dsp.low == 0x20 || j->cardtype == QTI_PHONEJACK_LITE || j->cardtype == QTI_PHONEJACK_PCI) {
6876 if (ixjdebug & 0x0002)
6877 printk(KERN_INFO "Write CODEC config to Software Control Register\n");
6878 if (ixj_WriteDSPCommand(0xC462, j)) /* Write CODEC config to Software Control Register */
6879 return -1;
6880 if (ixjdebug & 0x0002)
6881 printk(KERN_INFO "Write CODEC timing to Software Control Register\n");
6882 if (j->cardtype == QTI_PHONEJACK) {
6883 cmd = 0x9FF2;
6884 } else {
6885 cmd = 0x9FF5;
6886 }
6887 if (ixj_WriteDSPCommand(cmd, j)) /* Write CODEC timing to Software Control Register */
6888 return -1;
6889 } else {
6890 if (set_base_frame(j, 30) != 30)
6891 return -1;
6892 if (ixjdebug & 0x0002)
6893 printk(KERN_INFO "Write CODEC config to Software Control Register\n");
6894 if (j->cardtype == QTI_PHONECARD) {
6895 if (ixj_WriteDSPCommand(0xC528, j)) /* Write CODEC config to Software Control Register */
6896 return -1;
6897 }
6898 if (j->cardtype == QTI_LINEJACK) {
6899 if (ixj_WriteDSPCommand(0xC528, j)) /* Write CODEC config to Software Control Register */
6900 return -1;
6901 if (ixjdebug & 0x0002)
6902 printk(KERN_INFO "Turn on the PLD Clock at 8Khz\n");
6903 j->pld_clock.byte = 0;
6904 outb_p(j->pld_clock.byte, j->XILINXbase + 0x04);
6905 }
6906 }
6907
6908 if (j->dsp.low == 0x20) {
6909 if (ixjdebug & 0x0002)
6910 printk(KERN_INFO "Configure GPIO pins\n");
6911 j->gpio.bytes.high = 0x09;
6912/* bytes.low = 0xEF; 0xF7 */
6913 j->gpio.bits.gpio1 = 1;
6914 j->gpio.bits.gpio2 = 1;
6915 j->gpio.bits.gpio3 = 0;
6916 j->gpio.bits.gpio4 = 1;
6917 j->gpio.bits.gpio5 = 1;
6918 j->gpio.bits.gpio6 = 1;
6919 j->gpio.bits.gpio7 = 1;
6920 ixj_WriteDSPCommand(j->gpio.word, j); /* Set GPIO pin directions */
6921 if (ixjdebug & 0x0002)
6922 printk(KERN_INFO "Enable SLIC\n");
6923 j->gpio.bytes.high = 0x0B;
6924 j->gpio.bytes.low = 0x00;
6925 j->gpio.bits.gpio1 = 0;
6926 j->gpio.bits.gpio2 = 1;
6927 j->gpio.bits.gpio5 = 0;
6928 ixj_WriteDSPCommand(j->gpio.word, j); /* send the ring stop signal */
6929 j->port = PORT_POTS;
6930 } else {
6931 if (j->cardtype == QTI_LINEJACK) {
6932 LED_SetState(0x1, j);
6933 msleep(100);
6934 LED_SetState(0x2, j);
6935 msleep(100);
6936 LED_SetState(0x4, j);
6937 msleep(100);
6938 LED_SetState(0x8, j);
6939 msleep(100);
6940 LED_SetState(0x0, j);
6941 daa_get_version(j);
6942 if (ixjdebug & 0x0002)
6943 printk("Loading DAA Coefficients\n");
6944 DAA_Coeff_US(j);
6945 if (!ixj_daa_write(j)) {
6946 printk("DAA write failed on board %d\n", j->board);
6947 return -1;
6948 }
6949 if(!ixj_daa_cid_reset(j)) {
6950 printk("DAA CID reset failed on board %d\n", j->board);
6951 return -1;
6952 }
6953 j->flags.pots_correct = 0;
6954 j->flags.pstn_present = 0;
6955 ixj_linetest(j);
6956 if (j->flags.pots_correct) {
6957 j->pld_scrw.bits.daafsyncen = 0; /* Turn off DAA Frame Sync */
6958
6959 outb_p(j->pld_scrw.byte, j->XILINXbase);
6960 j->pld_slicw.bits.rly1 = 1;
6961 j->pld_slicw.bits.spken = 1;
6962 outb_p(j->pld_slicw.byte, j->XILINXbase + 0x01);
6963 SLIC_SetState(PLD_SLIC_STATE_STANDBY, j);
6964/* SLIC_SetState(PLD_SLIC_STATE_ACTIVE, j); */
6965 j->port = PORT_POTS;
6966 }
6967 ixj_set_port(j, PORT_PSTN);
6968 ixj_set_pots(j, 1);
6969 if (ixjdebug & 0x0002)
6970 printk(KERN_INFO "Enable Mixer\n");
6971 ixj_mixer(0x0000, j); /*Master Volume Left unmute 0db */
6972 ixj_mixer(0x0100, j); /*Master Volume Right unmute 0db */
6973
6974 ixj_mixer(0x0203, j); /*Voice Left Volume unmute 6db */
6975 ixj_mixer(0x0303, j); /*Voice Right Volume unmute 6db */
6976
6977 ixj_mixer(0x0480, j); /*FM Left mute */
6978 ixj_mixer(0x0580, j); /*FM Right mute */
6979
6980 ixj_mixer(0x0680, j); /*CD Left mute */
6981 ixj_mixer(0x0780, j); /*CD Right mute */
6982
6983 ixj_mixer(0x0880, j); /*Line Left mute */
6984 ixj_mixer(0x0980, j); /*Line Right mute */
6985
6986 ixj_mixer(0x0A80, j); /*Aux left mute */
6987 ixj_mixer(0x0B80, j); /*Aux right mute */
6988
6989 ixj_mixer(0x0C00, j); /*Mono1 unmute 12db */
6990 ixj_mixer(0x0D80, j); /*Mono2 mute */
6991
6992 ixj_mixer(0x0E80, j); /*Mic mute */
6993
6994 ixj_mixer(0x0F00, j); /*Mono Out Volume unmute 0db */
6995
6996 ixj_mixer(0x1000, j); /*Voice Left and Right out only */
6997 ixj_mixer(0x110C, j);
6998
6999
7000 ixj_mixer(0x1200, j); /*Mono1 switch on mixer left */
7001 ixj_mixer(0x1401, j);
7002
7003 ixj_mixer(0x1300, j); /*Mono1 switch on mixer right */
7004 ixj_mixer(0x1501, j);
7005
7006 ixj_mixer(0x1700, j); /*Clock select */
7007
7008 ixj_mixer(0x1800, j); /*ADC input from mixer */
7009
7010 ixj_mixer(0x1901, j); /*Mic gain 30db */
7011
7012 if (ixjdebug & 0x0002)
7013 printk(KERN_INFO "Setting Default US Ring Cadence Detection\n");
7014 j->cadence_f[4].state = 0;
7015 j->cadence_f[4].on1 = 0; /*Cadence Filter 4 is used for PSTN ring cadence */
7016 j->cadence_f[4].off1 = 0;
7017 j->cadence_f[4].on2 = 0;
7018 j->cadence_f[4].off2 = 0;
7019 j->cadence_f[4].on3 = 0;
7020 j->cadence_f[4].off3 = 0; /* These should represent standard US ring pulse. */
7021 j->pstn_last_rmr = jiffies;
7022
7023 } else {
7024 if (j->cardtype == QTI_PHONECARD) {
7025 ixj_WriteDSPCommand(0xCF07, j);
7026 ixj_WriteDSPCommand(0x00B0, j);
7027 ixj_set_port(j, PORT_SPEAKER);
7028 } else {
7029 ixj_set_port(j, PORT_POTS);
7030 SLIC_SetState(PLD_SLIC_STATE_STANDBY, j);
7031/* SLIC_SetState(PLD_SLIC_STATE_ACTIVE, j); */
7032 }
7033 }
7034 }
7035
7036 j->intercom = -1;
7037 j->framesread = j->frameswritten = 0;
7038 j->read_wait = j->write_wait = 0;
7039 j->rxreadycheck = j->txreadycheck = 0;
7040
7041 /* initialise the DTMF prescale to a sensible value */
7042 if (j->cardtype == QTI_LINEJACK) {
7043 set_dtmf_prescale(j, 0x10);
7044 } else {
7045 set_dtmf_prescale(j, 0x40);
7046 }
7047 set_play_volume(j, 0x100);
7048 set_rec_volume(j, 0x100);
7049
7050 if (ixj_WriteDSPCommand(0x0000, j)) /* Write IDLE to Software Control Register */
7051 return -1;
7052/* The read values of the SSR should be 0x00 for the IDLE command */
7053 if (j->ssr.low || j->ssr.high)
7054 return -1;
7055
7056 if (ixjdebug & 0x0002)
7057 printk(KERN_INFO "Enable Line Monitor\n");
7058
7059 if (ixjdebug & 0x0002)
7060 printk(KERN_INFO "Set Line Monitor to Asynchronous Mode\n");
7061
7062 if (ixj_WriteDSPCommand(0x7E01, j)) /* Asynchronous Line Monitor */
7063 return -1;
7064
7065 if (ixjdebug & 0x002)
7066 printk(KERN_INFO "Enable DTMF Detectors\n");
7067
7068 if (ixj_WriteDSPCommand(0x5151, j)) /* Enable DTMF detection */
7069 return -1;
7070
7071 if (ixj_WriteDSPCommand(0x6E01, j)) /* Set Asynchronous Tone Generation */
7072 return -1;
7073
7074 set_rec_depth(j, 2); /* Set Record Channel Limit to 2 frames */
7075
7076 set_play_depth(j, 2); /* Set Playback Channel Limit to 2 frames */
7077
7078 j->ex.bits.dtmf_ready = 0;
7079 j->dtmf_state = 0;
7080 j->dtmf_wp = j->dtmf_rp = 0;
7081 j->rec_mode = j->play_mode = -1;
7082 j->flags.ringing = 0;
7083 j->maxrings = MAXRINGS;
7084 j->ring_cadence = USA_RING_CADENCE;
7085 j->drybuffer = 0;
7086 j->winktime = 320;
7087 j->flags.dtmf_oob = 0;
7088 for (cnt = 0; cnt < 4; cnt++)
7089 j->cadence_f[cnt].enable = 0;
7090 /* must be a device on the specified address */
7091 ixj_WriteDSPCommand(0x0FE3, j); /* Put the DSP in 1/5 power mode. */
7092
7093 /* Set up the default signals for events */
7094 for (cnt = 0; cnt < 35; cnt++)
7095 j->ixj_signals[cnt] = SIGIO;
7096
7097 /* Set the exception signal enable flags */
7098 j->ex_sig.bits.dtmf_ready = j->ex_sig.bits.hookstate = j->ex_sig.bits.flash = j->ex_sig.bits.pstn_ring =
7099 j->ex_sig.bits.caller_id = j->ex_sig.bits.pstn_wink = j->ex_sig.bits.f0 = j->ex_sig.bits.f1 = j->ex_sig.bits.f2 =
7100 j->ex_sig.bits.f3 = j->ex_sig.bits.fc0 = j->ex_sig.bits.fc1 = j->ex_sig.bits.fc2 = j->ex_sig.bits.fc3 = 1;
7101#ifdef IXJ_DYN_ALLOC
7102 j->fskdata = NULL;
7103#endif
7104 j->fskdcnt = 0;
7105 j->cidcw_wait = 0;
7106
7107 /* Register with the Telephony for Linux subsystem */
7108 j->p.f_op = &ixj_fops;
7109 j->p.open = ixj_open;
7110 j->p.board = j->board;
7111 phone_register_device(&j->p, PHONE_UNIT_ANY);
7112
7113 ixj_init_timer(j);
7114 ixj_add_timer(j);
7115 return 0;
7116}
7117
7118/*
7119 * Exported service for pcmcia card handling
7120 */
7121
7122IXJ *ixj_pcmcia_probe(unsigned long dsp, unsigned long xilinx)
7123{
7124 IXJ *j = ixj_alloc();
7125
7126 j->board = 0;
7127
7128 j->DSPbase = dsp;
7129 j->XILINXbase = xilinx;
7130 j->cardtype = QTI_PHONECARD;
7131 ixj_selfprobe(j);
7132 return j;
7133}
7134
7135EXPORT_SYMBOL(ixj_pcmcia_probe); /* For PCMCIA */
7136
7137static int ixj_get_status_proc(char *buf)
7138{
7139 int len;
7140 int cnt;
7141 IXJ *j;
7142 len = 0;
7143 len += sprintf(buf + len, "\nDriver version %i.%i.%i", IXJ_VER_MAJOR, IXJ_VER_MINOR, IXJ_BLD_VER);
7144 len += sprintf(buf + len, "\nsizeof IXJ struct %Zd bytes", sizeof(IXJ));
7145 len += sprintf(buf + len, "\nsizeof DAA struct %Zd bytes", sizeof(DAA_REGS));
7146 len += sprintf(buf + len, "\nUsing old telephony API");
7147 len += sprintf(buf + len, "\nDebug Level %d\n", ixjdebug);
7148
7149 for (cnt = 0; cnt < IXJMAX; cnt++) {
7150 j = get_ixj(cnt);
7151 if(j==NULL)
7152 continue;
7153 if (j->DSPbase) {
7154 len += sprintf(buf + len, "\nCard Num %d", cnt);
7155 len += sprintf(buf + len, "\nDSP Base Address 0x%4.4x", j->DSPbase);
7156 if (j->cardtype != QTI_PHONEJACK)
7157 len += sprintf(buf + len, "\nXILINX Base Address 0x%4.4x", j->XILINXbase);
7158 len += sprintf(buf + len, "\nDSP Type %2.2x%2.2x", j->dsp.high, j->dsp.low);
7159 len += sprintf(buf + len, "\nDSP Version %2.2x.%2.2x", j->ver.high, j->ver.low);
7160 len += sprintf(buf + len, "\nSerial Number %8.8x", j->serial);
7161 switch (j->cardtype) {
7162 case (QTI_PHONEJACK):
7163 len += sprintf(buf + len, "\nCard Type = Internet PhoneJACK");
7164 break;
7165 case (QTI_LINEJACK):
7166 len += sprintf(buf + len, "\nCard Type = Internet LineJACK");
7167 if (j->flags.g729_loaded)
7168 len += sprintf(buf + len, " w/G.729 A/B");
7169 len += sprintf(buf + len, " Country = %d", j->daa_country);
7170 break;
7171 case (QTI_PHONEJACK_LITE):
7172 len += sprintf(buf + len, "\nCard Type = Internet PhoneJACK Lite");
7173 if (j->flags.g729_loaded)
7174 len += sprintf(buf + len, " w/G.729 A/B");
7175 break;
7176 case (QTI_PHONEJACK_PCI):
7177 len += sprintf(buf + len, "\nCard Type = Internet PhoneJACK PCI");
7178 if (j->flags.g729_loaded)
7179 len += sprintf(buf + len, " w/G.729 A/B");
7180 break;
7181 case (QTI_PHONECARD):
7182 len += sprintf(buf + len, "\nCard Type = Internet PhoneCARD");
7183 if (j->flags.g729_loaded)
7184 len += sprintf(buf + len, " w/G.729 A/B");
7185 len += sprintf(buf + len, "\nSmart Cable %spresent", j->pccr1.bits.drf ? "not " : "");
7186 if (!j->pccr1.bits.drf)
7187 len += sprintf(buf + len, "\nSmart Cable type %d", j->flags.pcmciasct);
7188 len += sprintf(buf + len, "\nSmart Cable state %d", j->flags.pcmciastate);
7189 break;
7190 default:
7191 len += sprintf(buf + len, "\nCard Type = %d", j->cardtype);
7192 break;
7193 }
7194 len += sprintf(buf + len, "\nReaders %d", j->readers);
7195 len += sprintf(buf + len, "\nWriters %d", j->writers);
7196 add_caps(j);
7197 len += sprintf(buf + len, "\nCapabilities %d", j->caps);
7198 if (j->dsp.low != 0x20)
7199 len += sprintf(buf + len, "\nDSP Processor load %d", j->proc_load);
7200 if (j->flags.cidsent)
7201 len += sprintf(buf + len, "\nCaller ID data sent");
7202 else
7203 len += sprintf(buf + len, "\nCaller ID data not sent");
7204
7205 len += sprintf(buf + len, "\nPlay CODEC ");
7206 switch (j->play_codec) {
7207 case G723_63:
7208 len += sprintf(buf + len, "G.723.1 6.3");
7209 break;
7210 case G723_53:
7211 len += sprintf(buf + len, "G.723.1 5.3");
7212 break;
7213 case TS85:
7214 len += sprintf(buf + len, "TrueSpeech 8.5");
7215 break;
7216 case TS48:
7217 len += sprintf(buf + len, "TrueSpeech 4.8");
7218 break;
7219 case TS41:
7220 len += sprintf(buf + len, "TrueSpeech 4.1");
7221 break;
7222 case G728:
7223 len += sprintf(buf + len, "G.728");
7224 break;
7225 case G729:
7226 len += sprintf(buf + len, "G.729");
7227 break;
7228 case G729B:
7229 len += sprintf(buf + len, "G.729B");
7230 break;
7231 case ULAW:
7232 len += sprintf(buf + len, "uLaw");
7233 break;
7234 case ALAW:
7235 len += sprintf(buf + len, "aLaw");
7236 break;
7237 case LINEAR16:
7238 len += sprintf(buf + len, "16 bit Linear");
7239 break;
7240 case LINEAR8:
7241 len += sprintf(buf + len, "8 bit Linear");
7242 break;
7243 case WSS:
7244 len += sprintf(buf + len, "Windows Sound System");
7245 break;
7246 default:
7247 len += sprintf(buf + len, "NO CODEC CHOSEN");
7248 break;
7249 }
7250 len += sprintf(buf + len, "\nRecord CODEC ");
7251 switch (j->rec_codec) {
7252 case G723_63:
7253 len += sprintf(buf + len, "G.723.1 6.3");
7254 break;
7255 case G723_53:
7256 len += sprintf(buf + len, "G.723.1 5.3");
7257 break;
7258 case TS85:
7259 len += sprintf(buf + len, "TrueSpeech 8.5");
7260 break;
7261 case TS48:
7262 len += sprintf(buf + len, "TrueSpeech 4.8");
7263 break;
7264 case TS41:
7265 len += sprintf(buf + len, "TrueSpeech 4.1");
7266 break;
7267 case G728:
7268 len += sprintf(buf + len, "G.728");
7269 break;
7270 case G729:
7271 len += sprintf(buf + len, "G.729");
7272 break;
7273 case G729B:
7274 len += sprintf(buf + len, "G.729B");
7275 break;
7276 case ULAW:
7277 len += sprintf(buf + len, "uLaw");
7278 break;
7279 case ALAW:
7280 len += sprintf(buf + len, "aLaw");
7281 break;
7282 case LINEAR16:
7283 len += sprintf(buf + len, "16 bit Linear");
7284 break;
7285 case LINEAR8:
7286 len += sprintf(buf + len, "8 bit Linear");
7287 break;
7288 case WSS:
7289 len += sprintf(buf + len, "Windows Sound System");
7290 break;
7291 default:
7292 len += sprintf(buf + len, "NO CODEC CHOSEN");
7293 break;
7294 }
7295 len += sprintf(buf + len, "\nAEC ");
7296 switch (j->aec_level) {
7297 case AEC_OFF:
7298 len += sprintf(buf + len, "Off");
7299 break;
7300 case AEC_LOW:
7301 len += sprintf(buf + len, "Low");
7302 break;
7303 case AEC_MED:
7304 len += sprintf(buf + len, "Med");
7305 break;
7306 case AEC_HIGH:
7307 len += sprintf(buf + len, "High");
7308 break;
7309 case AEC_AUTO:
7310 len += sprintf(buf + len, "Auto");
7311 break;
7312 case AEC_AGC:
7313 len += sprintf(buf + len, "AEC/AGC");
7314 break;
7315 default:
7316 len += sprintf(buf + len, "unknown(%i)", j->aec_level);
7317 break;
7318 }
7319
7320 len += sprintf(buf + len, "\nRec volume 0x%x", get_rec_volume(j));
7321 len += sprintf(buf + len, "\nPlay volume 0x%x", get_play_volume(j));
7322 len += sprintf(buf + len, "\nDTMF prescale 0x%x", get_dtmf_prescale(j));
7323
7324 len += sprintf(buf + len, "\nHook state %d", j->hookstate); /* j->r_hook); */
7325
7326 if (j->cardtype == QTI_LINEJACK) {
7327 len += sprintf(buf + len, "\nPOTS Correct %d", j->flags.pots_correct);
7328 len += sprintf(buf + len, "\nPSTN Present %d", j->flags.pstn_present);
7329 len += sprintf(buf + len, "\nPSTN Check %d", j->flags.pstncheck);
7330 len += sprintf(buf + len, "\nPOTS to PSTN %d", j->flags.pots_pstn);
7331 switch (j->daa_mode) {
7332 case SOP_PU_SLEEP:
7333 len += sprintf(buf + len, "\nDAA PSTN On Hook");
7334 break;
7335 case SOP_PU_RINGING:
7336 len += sprintf(buf + len, "\nDAA PSTN Ringing");
7337 len += sprintf(buf + len, "\nRinging state = %d", j->cadence_f[4].state);
7338 break;
7339 case SOP_PU_CONVERSATION:
7340 len += sprintf(buf + len, "\nDAA PSTN Off Hook");
7341 break;
7342 case SOP_PU_PULSEDIALING:
7343 len += sprintf(buf + len, "\nDAA PSTN Pulse Dialing");
7344 break;
7345 }
7346 len += sprintf(buf + len, "\nDAA RMR = %d", j->m_DAAShadowRegs.SOP_REGS.SOP.cr1.bitreg.RMR);
7347 len += sprintf(buf + len, "\nDAA VDD OK = %d", j->m_DAAShadowRegs.XOP_REGS.XOP.xr0.bitreg.VDD_OK);
7348 len += sprintf(buf + len, "\nDAA CR0 = 0x%02x", j->m_DAAShadowRegs.SOP_REGS.SOP.cr0.reg);
7349 len += sprintf(buf + len, "\nDAA CR1 = 0x%02x", j->m_DAAShadowRegs.SOP_REGS.SOP.cr1.reg);
7350 len += sprintf(buf + len, "\nDAA CR2 = 0x%02x", j->m_DAAShadowRegs.SOP_REGS.SOP.cr2.reg);
7351 len += sprintf(buf + len, "\nDAA CR3 = 0x%02x", j->m_DAAShadowRegs.SOP_REGS.SOP.cr3.reg);
7352 len += sprintf(buf + len, "\nDAA CR4 = 0x%02x", j->m_DAAShadowRegs.SOP_REGS.SOP.cr4.reg);
7353 len += sprintf(buf + len, "\nDAA CR5 = 0x%02x", j->m_DAAShadowRegs.SOP_REGS.SOP.cr5.reg);
7354 len += sprintf(buf + len, "\nDAA XR0 = 0x%02x", j->m_DAAShadowRegs.XOP_REGS.XOP.xr0.reg);
7355 len += sprintf(buf + len, "\nDAA ringstop %ld - jiffies %ld", j->pstn_ring_stop, jiffies);
7356 }
7357 switch (j->port) {
7358 case PORT_POTS:
7359 len += sprintf(buf + len, "\nPort POTS");
7360 break;
7361 case PORT_PSTN:
7362 len += sprintf(buf + len, "\nPort PSTN");
7363 break;
7364 case PORT_SPEAKER:
7365 len += sprintf(buf + len, "\nPort SPEAKER/MIC");
7366 break;
7367 case PORT_HANDSET:
7368 len += sprintf(buf + len, "\nPort HANDSET");
7369 break;
7370 }
7371 if (j->dsp.low == 0x21 || j->dsp.low == 0x22) {
7372 len += sprintf(buf + len, "\nSLIC state ");
7373 switch (SLIC_GetState(j)) {
7374 case PLD_SLIC_STATE_OC:
7375 len += sprintf(buf + len, "OC");
7376 break;
7377 case PLD_SLIC_STATE_RINGING:
7378 len += sprintf(buf + len, "RINGING");
7379 break;
7380 case PLD_SLIC_STATE_ACTIVE:
7381 len += sprintf(buf + len, "ACTIVE");
7382 break;
7383 case PLD_SLIC_STATE_OHT: /* On-hook transmit */
7384 len += sprintf(buf + len, "OHT");
7385 break;
7386 case PLD_SLIC_STATE_TIPOPEN:
7387 len += sprintf(buf + len, "TIPOPEN");
7388 break;
7389 case PLD_SLIC_STATE_STANDBY:
7390 len += sprintf(buf + len, "STANDBY");
7391 break;
7392 case PLD_SLIC_STATE_APR: /* Active polarity reversal */
7393 len += sprintf(buf + len, "APR");
7394 break;
7395 case PLD_SLIC_STATE_OHTPR: /* OHT polarity reversal */
7396 len += sprintf(buf + len, "OHTPR");
7397 break;
7398 default:
7399 len += sprintf(buf + len, "%d", SLIC_GetState(j));
7400 break;
7401 }
7402 }
7403 len += sprintf(buf + len, "\nBase Frame %2.2x.%2.2x", j->baseframe.high, j->baseframe.low);
7404 len += sprintf(buf + len, "\nCID Base Frame %2d", j->cid_base_frame_size);
7405#ifdef PERFMON_STATS
7406 len += sprintf(buf + len, "\nTimer Checks %ld", j->timerchecks);
7407 len += sprintf(buf + len, "\nRX Ready Checks %ld", j->rxreadycheck);
7408 len += sprintf(buf + len, "\nTX Ready Checks %ld", j->txreadycheck);
7409 len += sprintf(buf + len, "\nFrames Read %ld", j->framesread);
7410 len += sprintf(buf + len, "\nFrames Written %ld", j->frameswritten);
7411 len += sprintf(buf + len, "\nDry Buffer %ld", j->drybuffer);
7412 len += sprintf(buf + len, "\nRead Waits %ld", j->read_wait);
7413 len += sprintf(buf + len, "\nWrite Waits %ld", j->write_wait);
7414 len += sprintf(buf + len, "\nStatus Waits %ld", j->statuswait);
7415 len += sprintf(buf + len, "\nStatus Wait Fails %ld", j->statuswaitfail);
7416 len += sprintf(buf + len, "\nPControl Waits %ld", j->pcontrolwait);
7417 len += sprintf(buf + len, "\nPControl Wait Fails %ld", j->pcontrolwaitfail);
7418 len += sprintf(buf + len, "\nIs Control Ready Checks %ld", j->iscontrolready);
7419 len += sprintf(buf + len, "\nIs Control Ready Check failures %ld", j->iscontrolreadyfail);
7420
7421#endif
7422 len += sprintf(buf + len, "\n");
7423 }
7424 }
7425 return len;
7426}
7427
7428static int ixj_read_proc(char *page, char **start, off_t off,
7429 int count, int *eof, void *data)
7430{
7431 int len = ixj_get_status_proc(page);
7432 if (len <= off+count) *eof = 1;
7433 *start = page + off;
7434 len -= off;
7435 if (len>count) len = count;
7436 if (len<0) len = 0;
7437 return len;
7438}
7439
7440
7441static void cleanup(void)
7442{
7443 int cnt;
7444 IXJ *j;
7445
7446 for (cnt = 0; cnt < IXJMAX; cnt++) {
7447 j = get_ixj(cnt);
7448 if(j != NULL && j->DSPbase) {
7449 if (ixjdebug & 0x0002)
7450 printk(KERN_INFO "IXJ: Deleting timer for /dev/phone%d\n", cnt);
7451 del_timer(&j->timer);
7452 if (j->cardtype == QTI_LINEJACK) {
7453 j->pld_scrw.bits.daafsyncen = 0; /* Turn off DAA Frame Sync */
7454
7455 outb_p(j->pld_scrw.byte, j->XILINXbase);
7456 j->pld_slicw.bits.rly1 = 0;
7457 j->pld_slicw.bits.rly2 = 0;
7458 j->pld_slicw.bits.rly3 = 0;
7459 outb_p(j->pld_slicw.byte, j->XILINXbase + 0x01);
7460 LED_SetState(0x0, j);
7461 if (ixjdebug & 0x0002)
7462 printk(KERN_INFO "IXJ: Releasing XILINX address for /dev/phone%d\n", cnt);
7463 release_region(j->XILINXbase, 8);
7464 } else if (j->cardtype == QTI_PHONEJACK_LITE || j->cardtype == QTI_PHONEJACK_PCI) {
7465 if (ixjdebug & 0x0002)
7466 printk(KERN_INFO "IXJ: Releasing XILINX address for /dev/phone%d\n", cnt);
7467 release_region(j->XILINXbase, 4);
7468 }
7469 kfree(j->read_buffer);
7470 kfree(j->write_buffer);
7471 if (j->dev)
7472 pnp_device_detach(j->dev);
7473 if (ixjdebug & 0x0002)
7474 printk(KERN_INFO "IXJ: Unregistering /dev/phone%d from LTAPI\n", cnt);
7475 phone_unregister_device(&j->p);
7476 if (ixjdebug & 0x0002)
7477 printk(KERN_INFO "IXJ: Releasing DSP address for /dev/phone%d\n", cnt);
7478 release_region(j->DSPbase, 16);
7479#ifdef IXJ_DYN_ALLOC
7480 if (ixjdebug & 0x0002)
7481 printk(KERN_INFO "IXJ: Freeing memory for /dev/phone%d\n", cnt);
7482 kfree(j);
7483 ixj[cnt] = NULL;
7484#endif
7485 }
7486 }
7487 if (ixjdebug & 0x0002)
7488 printk(KERN_INFO "IXJ: Removing /proc/ixj\n");
7489 remove_proc_entry ("ixj", NULL);
7490}
7491
7492/* Typedefs */
7493typedef struct {
7494 BYTE length;
7495 DWORD bits;
7496} DATABLOCK;
7497
7498static void PCIEE_WriteBit(WORD wEEPROMAddress, BYTE lastLCC, BYTE byData)
7499{
7500 lastLCC = lastLCC & 0xfb;
7501 lastLCC = lastLCC | (byData ? 4 : 0);
7502 outb(lastLCC, wEEPROMAddress); /*set data out bit as appropriate */
7503
7504 mdelay(1);
7505 lastLCC = lastLCC | 0x01;
7506 outb(lastLCC, wEEPROMAddress); /*SK rising edge */
7507
7508 byData = byData << 1;
7509 lastLCC = lastLCC & 0xfe;
7510 mdelay(1);
7511 outb(lastLCC, wEEPROMAddress); /*after delay, SK falling edge */
7512
7513}
7514
7515static BYTE PCIEE_ReadBit(WORD wEEPROMAddress, BYTE lastLCC)
7516{
7517 mdelay(1);
7518 lastLCC = lastLCC | 0x01;
7519 outb(lastLCC, wEEPROMAddress); /*SK rising edge */
7520
7521 lastLCC = lastLCC & 0xfe;
7522 mdelay(1);
7523 outb(lastLCC, wEEPROMAddress); /*after delay, SK falling edge */
7524
7525 return ((inb(wEEPROMAddress) >> 3) & 1);
7526}
7527
7528static bool PCIEE_ReadWord(WORD wAddress, WORD wLoc, WORD * pwResult)
7529{
7530 BYTE lastLCC;
7531 WORD wEEPROMAddress = wAddress + 3;
7532 DWORD i;
7533 BYTE byResult;
7534 *pwResult = 0;
7535 lastLCC = inb(wEEPROMAddress);
7536 lastLCC = lastLCC | 0x02;
7537 lastLCC = lastLCC & 0xfe;
7538 outb(lastLCC, wEEPROMAddress); /* CS hi, SK lo */
7539
7540 mdelay(1); /* delay */
7541
7542 PCIEE_WriteBit(wEEPROMAddress, lastLCC, 1);
7543 PCIEE_WriteBit(wEEPROMAddress, lastLCC, 1);
7544 PCIEE_WriteBit(wEEPROMAddress, lastLCC, 0);
7545 for (i = 0; i < 8; i++) {
7546 PCIEE_WriteBit(wEEPROMAddress, lastLCC, wLoc & 0x80 ? 1 : 0);
7547 wLoc <<= 1;
7548 }
7549
7550 for (i = 0; i < 16; i++) {
7551 byResult = PCIEE_ReadBit(wEEPROMAddress, lastLCC);
7552 *pwResult = (*pwResult << 1) | byResult;
7553 }
7554
7555 mdelay(1); /* another delay */
7556
7557 lastLCC = lastLCC & 0xfd;
7558 outb(lastLCC, wEEPROMAddress); /* negate CS */
7559
7560 return 0;
7561}
7562
7563static DWORD PCIEE_GetSerialNumber(WORD wAddress)
7564{
7565 WORD wLo, wHi;
7566 if (PCIEE_ReadWord(wAddress, 62, &wLo))
7567 return 0;
7568 if (PCIEE_ReadWord(wAddress, 63, &wHi))
7569 return 0;
7570 return (((DWORD) wHi << 16) | wLo);
7571}
7572
7573static int dspio[IXJMAX + 1] =
7574{
7575 0,
7576};
7577static int xio[IXJMAX + 1] =
7578{
7579 0,
7580};
7581
7582module_param_array(dspio, int, NULL, 0);
7583module_param_array(xio, int, NULL, 0);
7584MODULE_DESCRIPTION("Quicknet VoIP Telephony card module - www.quicknet.net");
7585MODULE_AUTHOR("Ed Okerson <eokerson@quicknet.net>");
7586MODULE_LICENSE("GPL");
7587
7588static void __exit ixj_exit(void)
7589{
7590 cleanup();
7591}
7592
7593static IXJ *new_ixj(unsigned long port)
7594{
7595 IXJ *res;
7596 if (!request_region(port, 16, "ixj DSP")) {
7597 printk(KERN_INFO "ixj: can't get I/O address 0x%lx\n", port);
7598 return NULL;
7599 }
7600 res = ixj_alloc();
7601 if (!res) {
7602 release_region(port, 16);
7603 printk(KERN_INFO "ixj: out of memory\n");
7604 return NULL;
7605 }
7606 res->DSPbase = port;
7607 return res;
7608}
7609
7610static int __init ixj_probe_isapnp(int *cnt)
7611{
7612 int probe = 0;
7613 int func = 0x110;
7614 struct pnp_dev *dev = NULL, *old_dev = NULL;
7615
7616 while (1) {
7617 do {
7618 IXJ *j;
7619 int result;
7620
7621 old_dev = dev;
7622 dev = pnp_find_dev(NULL, ISAPNP_VENDOR('Q', 'T', 'I'),
7623 ISAPNP_FUNCTION(func), old_dev);
7624 if (!dev || !dev->card)
7625 break;
7626 result = pnp_device_attach(dev);
7627 if (result < 0) {
7628 printk("pnp attach failed %d \n", result);
7629 break;
7630 }
7631 if (pnp_activate_dev(dev) < 0) {
7632 printk("pnp activate failed (out of resources?)\n");
7633 pnp_device_detach(dev);
7634 return -ENOMEM;
7635 }
7636
7637 if (!pnp_port_valid(dev, 0)) {
7638 pnp_device_detach(dev);
7639 return -ENODEV;
7640 }
7641
7642 j = new_ixj(pnp_port_start(dev, 0));
7643 if (!j)
7644 break;
7645
7646 if (func != 0x110)
7647 j->XILINXbase = pnp_port_start(dev, 1); /* get real port */
7648
7649 switch (func) {
7650 case (0x110):
7651 j->cardtype = QTI_PHONEJACK;
7652 break;
7653 case (0x310):
7654 j->cardtype = QTI_LINEJACK;
7655 break;
7656 case (0x410):
7657 j->cardtype = QTI_PHONEJACK_LITE;
7658 break;
7659 }
7660 j->board = *cnt;
7661 probe = ixj_selfprobe(j);
7662 if(!probe) {
7663 j->serial = dev->card->serial;
7664 j->dev = dev;
7665 switch (func) {
7666 case 0x110:
7667 printk(KERN_INFO "ixj: found Internet PhoneJACK at 0x%x\n", j->DSPbase);
7668 break;
7669 case 0x310:
7670 printk(KERN_INFO "ixj: found Internet LineJACK at 0x%x\n", j->DSPbase);
7671 break;
7672 case 0x410:
7673 printk(KERN_INFO "ixj: found Internet PhoneJACK Lite at 0x%x\n", j->DSPbase);
7674 break;
7675 }
7676 }
7677 ++*cnt;
7678 } while (dev);
7679 if (func == 0x410)
7680 break;
7681 if (func == 0x310)
7682 func = 0x410;
7683 if (func == 0x110)
7684 func = 0x310;
7685 dev = NULL;
7686 }
7687 return probe;
7688}
7689
7690static int __init ixj_probe_isa(int *cnt)
7691{
7692 int i, probe;
7693
7694 /* Use passed parameters for older kernels without PnP */
7695 for (i = 0; i < IXJMAX; i++) {
7696 if (dspio[i]) {
7697 IXJ *j = new_ixj(dspio[i]);
7698
7699 if (!j)
7700 break;
7701
7702 j->XILINXbase = xio[i];
7703 j->cardtype = 0;
7704
7705 j->board = *cnt;
7706 probe = ixj_selfprobe(j);
7707 j->dev = NULL;
7708 ++*cnt;
7709 }
7710 }
7711 return 0;
7712}
7713
7714static int __init ixj_probe_pci(int *cnt)
7715{
7716 struct pci_dev *pci = NULL;
7717 int i, probe = 0;
7718 IXJ *j = NULL;
7719
7720 for (i = 0; i < IXJMAX - *cnt; i++) {
7721 pci = pci_get_device(PCI_VENDOR_ID_QUICKNET,
7722 PCI_DEVICE_ID_QUICKNET_XJ, pci);
7723 if (!pci)
7724 break;
7725
7726 if (pci_enable_device(pci))
7727 break;
7728 j = new_ixj(pci_resource_start(pci, 0));
7729 if (!j)
7730 break;
7731
7732 j->serial = (PCIEE_GetSerialNumber)pci_resource_start(pci, 2);
7733 j->XILINXbase = j->DSPbase + 0x10;
7734 j->cardtype = QTI_PHONEJACK_PCI;
7735 j->board = *cnt;
7736 probe = ixj_selfprobe(j);
7737 if (!probe)
7738 printk(KERN_INFO "ixj: found Internet PhoneJACK PCI at 0x%x\n", j->DSPbase);
7739 ++*cnt;
7740 }
7741 pci_dev_put(pci);
7742 return probe;
7743}
7744
7745static int __init ixj_init(void)
7746{
7747 int cnt = 0;
7748 int probe = 0;
7749
7750 cnt = 0;
7751
7752 /* These might be no-ops, see above. */
7753 if ((probe = ixj_probe_isapnp(&cnt)) < 0) {
7754 return probe;
7755 }
7756 if ((probe = ixj_probe_isa(&cnt)) < 0) {
7757 return probe;
7758 }
7759 if ((probe = ixj_probe_pci(&cnt)) < 0) {
7760 return probe;
7761 }
7762 printk(KERN_INFO "ixj driver initialized.\n");
7763 create_proc_read_entry ("ixj", 0, NULL, ixj_read_proc, NULL);
7764 return probe;
7765}
7766
7767module_init(ixj_init);
7768module_exit(ixj_exit);
7769
7770static void DAA_Coeff_US(IXJ *j)
7771{
7772 int i;
7773
7774 j->daa_country = DAA_US;
7775 /*----------------------------------------------- */
7776 /* CAO */
7777 for (i = 0; i < ALISDAA_CALLERID_SIZE; i++) {
7778 j->m_DAAShadowRegs.CAO_REGS.CAO.CallerID[i] = 0;
7779 }
7780
7781/* Bytes for IM-filter part 1 (04): 0E,32,E2,2F,C2,5A,C0,00 */
7782 j->m_DAAShadowRegs.COP_REGS.COP.IMFilterCoeff_1[7] = 0x03;
7783 j->m_DAAShadowRegs.COP_REGS.COP.IMFilterCoeff_1[6] = 0x4B;
7784 j->m_DAAShadowRegs.COP_REGS.COP.IMFilterCoeff_1[5] = 0x5D;
7785 j->m_DAAShadowRegs.COP_REGS.COP.IMFilterCoeff_1[4] = 0xCD;
7786 j->m_DAAShadowRegs.COP_REGS.COP.IMFilterCoeff_1[3] = 0x24;
7787 j->m_DAAShadowRegs.COP_REGS.COP.IMFilterCoeff_1[2] = 0xC5;
7788 j->m_DAAShadowRegs.COP_REGS.COP.IMFilterCoeff_1[1] = 0xA0;
7789 j->m_DAAShadowRegs.COP_REGS.COP.IMFilterCoeff_1[0] = 0x00;
7790/* Bytes for IM-filter part 2 (05): 72,85,00,0E,2B,3A,D0,08 */
7791 j->m_DAAShadowRegs.COP_REGS.COP.IMFilterCoeff_2[7] = 0x71;
7792 j->m_DAAShadowRegs.COP_REGS.COP.IMFilterCoeff_2[6] = 0x1A;
7793 j->m_DAAShadowRegs.COP_REGS.COP.IMFilterCoeff_2[5] = 0x00;
7794 j->m_DAAShadowRegs.COP_REGS.COP.IMFilterCoeff_2[4] = 0x0A;
7795 j->m_DAAShadowRegs.COP_REGS.COP.IMFilterCoeff_2[3] = 0xB5;
7796 j->m_DAAShadowRegs.COP_REGS.COP.IMFilterCoeff_2[2] = 0x33;
7797 j->m_DAAShadowRegs.COP_REGS.COP.IMFilterCoeff_2[1] = 0xE0;
7798 j->m_DAAShadowRegs.COP_REGS.COP.IMFilterCoeff_2[0] = 0x08;
7799/* Bytes for FRX-filter (08): 03,8F,48,F2,8F,48,70,08 */
7800 j->m_DAAShadowRegs.COP_REGS.COP.FRXFilterCoeff[7] = 0x05;
7801 j->m_DAAShadowRegs.COP_REGS.COP.FRXFilterCoeff[6] = 0xA3;
7802 j->m_DAAShadowRegs.COP_REGS.COP.FRXFilterCoeff[5] = 0x72;
7803 j->m_DAAShadowRegs.COP_REGS.COP.FRXFilterCoeff[4] = 0x34;
7804 j->m_DAAShadowRegs.COP_REGS.COP.FRXFilterCoeff[3] = 0x3F;
7805 j->m_DAAShadowRegs.COP_REGS.COP.FRXFilterCoeff[2] = 0x3B;
7806 j->m_DAAShadowRegs.COP_REGS.COP.FRXFilterCoeff[1] = 0x30;
7807 j->m_DAAShadowRegs.COP_REGS.COP.FRXFilterCoeff[0] = 0x08;
7808/* Bytes for FRR-filter (07): 04,8F,38,7F,9B,EA,B0,08 */
7809 j->m_DAAShadowRegs.COP_REGS.COP.FRRFilterCoeff[7] = 0x05;
7810 j->m_DAAShadowRegs.COP_REGS.COP.FRRFilterCoeff[6] = 0x87;
7811 j->m_DAAShadowRegs.COP_REGS.COP.FRRFilterCoeff[5] = 0xF9;
7812 j->m_DAAShadowRegs.COP_REGS.COP.FRRFilterCoeff[4] = 0x3E;
7813 j->m_DAAShadowRegs.COP_REGS.COP.FRRFilterCoeff[3] = 0x32;
7814 j->m_DAAShadowRegs.COP_REGS.COP.FRRFilterCoeff[2] = 0xDA;
7815 j->m_DAAShadowRegs.COP_REGS.COP.FRRFilterCoeff[1] = 0xB0;
7816 j->m_DAAShadowRegs.COP_REGS.COP.FRRFilterCoeff[0] = 0x08;
7817/* Bytes for AX-filter (0A): 16,55,DD,CA */
7818 j->m_DAAShadowRegs.COP_REGS.COP.AXFilterCoeff[3] = 0x41;
7819 j->m_DAAShadowRegs.COP_REGS.COP.AXFilterCoeff[2] = 0xB5;
7820 j->m_DAAShadowRegs.COP_REGS.COP.AXFilterCoeff[1] = 0xDD;
7821 j->m_DAAShadowRegs.COP_REGS.COP.AXFilterCoeff[0] = 0xCA;
7822/* Bytes for AR-filter (09): 52,D3,11,42 */
7823 j->m_DAAShadowRegs.COP_REGS.COP.ARFilterCoeff[3] = 0x25;
7824 j->m_DAAShadowRegs.COP_REGS.COP.ARFilterCoeff[2] = 0xC7;
7825 j->m_DAAShadowRegs.COP_REGS.COP.ARFilterCoeff[1] = 0x10;
7826 j->m_DAAShadowRegs.COP_REGS.COP.ARFilterCoeff[0] = 0xD6;
7827/* Bytes for TH-filter part 1 (00): 00,42,48,81,B3,80,00,98 */
7828 j->m_DAAShadowRegs.COP_REGS.COP.THFilterCoeff_1[7] = 0x00;
7829 j->m_DAAShadowRegs.COP_REGS.COP.THFilterCoeff_1[6] = 0x42;
7830 j->m_DAAShadowRegs.COP_REGS.COP.THFilterCoeff_1[5] = 0x48;
7831 j->m_DAAShadowRegs.COP_REGS.COP.THFilterCoeff_1[4] = 0x81;
7832 j->m_DAAShadowRegs.COP_REGS.COP.THFilterCoeff_1[3] = 0xA5;
7833 j->m_DAAShadowRegs.COP_REGS.COP.THFilterCoeff_1[2] = 0x80;
7834 j->m_DAAShadowRegs.COP_REGS.COP.THFilterCoeff_1[1] = 0x00;
7835 j->m_DAAShadowRegs.COP_REGS.COP.THFilterCoeff_1[0] = 0x98;
7836/* Bytes for TH-filter part 2 (01): 02,F2,33,A0,68,AB,8A,AD */
7837 j->m_DAAShadowRegs.COP_REGS.COP.THFilterCoeff_2[7] = 0x02;
7838 j->m_DAAShadowRegs.COP_REGS.COP.THFilterCoeff_2[6] = 0xA2;
7839 j->m_DAAShadowRegs.COP_REGS.COP.THFilterCoeff_2[5] = 0x2B;
7840 j->m_DAAShadowRegs.COP_REGS.COP.THFilterCoeff_2[4] = 0xB0;
7841 j->m_DAAShadowRegs.COP_REGS.COP.THFilterCoeff_2[3] = 0xE8;
7842 j->m_DAAShadowRegs.COP_REGS.COP.THFilterCoeff_2[2] = 0xAB;
7843 j->m_DAAShadowRegs.COP_REGS.COP.THFilterCoeff_2[1] = 0x81;
7844 j->m_DAAShadowRegs.COP_REGS.COP.THFilterCoeff_2[0] = 0xCC;
7845/* Bytes for TH-filter part 3 (02): 00,88,DA,54,A4,BA,2D,BB */
7846 j->m_DAAShadowRegs.COP_REGS.COP.THFilterCoeff_3[7] = 0x00;
7847 j->m_DAAShadowRegs.COP_REGS.COP.THFilterCoeff_3[6] = 0x88;
7848 j->m_DAAShadowRegs.COP_REGS.COP.THFilterCoeff_3[5] = 0xD2;
7849 j->m_DAAShadowRegs.COP_REGS.COP.THFilterCoeff_3[4] = 0x24;
7850 j->m_DAAShadowRegs.COP_REGS.COP.THFilterCoeff_3[3] = 0xBA;
7851 j->m_DAAShadowRegs.COP_REGS.COP.THFilterCoeff_3[2] = 0xA9;
7852 j->m_DAAShadowRegs.COP_REGS.COP.THFilterCoeff_3[1] = 0x3B;
7853 j->m_DAAShadowRegs.COP_REGS.COP.THFilterCoeff_3[0] = 0xA6;
7854/* ; (10K, 0.68uF) */
7855 /* */
7856 /* Bytes for Ringing part 1 (03):1B,3B,9B,BA,D4,1C,B3,23 */
7857 j->m_DAAShadowRegs.COP_REGS.COP.RingerImpendance_1[7] = 0x1B;
7858 j->m_DAAShadowRegs.COP_REGS.COP.RingerImpendance_1[6] = 0x3C;
7859 j->m_DAAShadowRegs.COP_REGS.COP.RingerImpendance_1[5] = 0x93;
7860 j->m_DAAShadowRegs.COP_REGS.COP.RingerImpendance_1[4] = 0x3A;
7861 j->m_DAAShadowRegs.COP_REGS.COP.RingerImpendance_1[3] = 0x22;
7862 j->m_DAAShadowRegs.COP_REGS.COP.RingerImpendance_1[2] = 0x12;
7863 j->m_DAAShadowRegs.COP_REGS.COP.RingerImpendance_1[1] = 0xA3;
7864 j->m_DAAShadowRegs.COP_REGS.COP.RingerImpendance_1[0] = 0x23;
7865 /* Bytes for Ringing part 2 (06):13,42,A6,BA,D4,73,CA,D5 */
7866 j->m_DAAShadowRegs.COP_REGS.COP.RingerImpendance_2[7] = 0x12;
7867 j->m_DAAShadowRegs.COP_REGS.COP.RingerImpendance_2[6] = 0xA2;
7868 j->m_DAAShadowRegs.COP_REGS.COP.RingerImpendance_2[5] = 0xA6;
7869 j->m_DAAShadowRegs.COP_REGS.COP.RingerImpendance_2[4] = 0xBA;
7870 j->m_DAAShadowRegs.COP_REGS.COP.RingerImpendance_2[3] = 0x22;
7871 j->m_DAAShadowRegs.COP_REGS.COP.RingerImpendance_2[2] = 0x7A;
7872 j->m_DAAShadowRegs.COP_REGS.COP.RingerImpendance_2[1] = 0x0A;
7873 j->m_DAAShadowRegs.COP_REGS.COP.RingerImpendance_2[0] = 0xD5;
7874
7875 /* Levelmetering Ringing (0D):B2,45,0F,8E */
7876 j->m_DAAShadowRegs.COP_REGS.COP.LevelmeteringRinging[3] = 0xAA;
7877 j->m_DAAShadowRegs.COP_REGS.COP.LevelmeteringRinging[2] = 0x35;
7878 j->m_DAAShadowRegs.COP_REGS.COP.LevelmeteringRinging[1] = 0x0F;
7879 j->m_DAAShadowRegs.COP_REGS.COP.LevelmeteringRinging[0] = 0x8E;
7880
7881 /* Bytes for Ringing part 1 (03):1B,3B,9B,BA,D4,1C,B3,23 */
7882/* j->m_DAAShadowRegs.COP_REGS.COP.RingerImpendance_1[7] = 0x1C; */
7883/* j->m_DAAShadowRegs.COP_REGS.COP.RingerImpendance_1[6] = 0xB3; */
7884/* j->m_DAAShadowRegs.COP_REGS.COP.RingerImpendance_1[5] = 0xAB; */
7885/* j->m_DAAShadowRegs.COP_REGS.COP.RingerImpendance_1[4] = 0xAB; */
7886/* j->m_DAAShadowRegs.COP_REGS.COP.RingerImpendance_1[3] = 0x54; */
7887/* j->m_DAAShadowRegs.COP_REGS.COP.RingerImpendance_1[2] = 0x2D; */
7888/* j->m_DAAShadowRegs.COP_REGS.COP.RingerImpendance_1[1] = 0x62; */
7889/* j->m_DAAShadowRegs.COP_REGS.COP.RingerImpendance_1[0] = 0x2D; */
7890 /* Bytes for Ringing part 2 (06):13,42,A6,BA,D4,73,CA,D5 */
7891/* j->m_DAAShadowRegs.COP_REGS.COP.RingerImpendance_2[7] = 0x2D; */
7892/* j->m_DAAShadowRegs.COP_REGS.COP.RingerImpendance_2[6] = 0x62; */
7893/* j->m_DAAShadowRegs.COP_REGS.COP.RingerImpendance_2[5] = 0xA6; */
7894/* j->m_DAAShadowRegs.COP_REGS.COP.RingerImpendance_2[4] = 0xBB; */
7895/* j->m_DAAShadowRegs.COP_REGS.COP.RingerImpendance_2[3] = 0x2A; */
7896/* j->m_DAAShadowRegs.COP_REGS.COP.RingerImpendance_2[2] = 0x7D; */
7897/* j->m_DAAShadowRegs.COP_REGS.COP.RingerImpendance_2[1] = 0x0A; */
7898/* j->m_DAAShadowRegs.COP_REGS.COP.RingerImpendance_2[0] = 0xD4; */
7899/* */
7900 /* Levelmetering Ringing (0D):B2,45,0F,8E */
7901/* j->m_DAAShadowRegs.COP_REGS.COP.LevelmeteringRinging[3] = 0xAA; */
7902/* j->m_DAAShadowRegs.COP_REGS.COP.LevelmeteringRinging[2] = 0x05; */
7903/* j->m_DAAShadowRegs.COP_REGS.COP.LevelmeteringRinging[1] = 0x0F; */
7904/* j->m_DAAShadowRegs.COP_REGS.COP.LevelmeteringRinging[0] = 0x8E; */
7905
7906 /* Caller ID 1st Tone (0E):CA,0E,CA,09,99,99,99,99 */
7907 j->m_DAAShadowRegs.COP_REGS.COP.CallerID1stTone[7] = 0xCA;
7908 j->m_DAAShadowRegs.COP_REGS.COP.CallerID1stTone[6] = 0x0E;
7909 j->m_DAAShadowRegs.COP_REGS.COP.CallerID1stTone[5] = 0xCA;
7910 j->m_DAAShadowRegs.COP_REGS.COP.CallerID1stTone[4] = 0x09;
7911 j->m_DAAShadowRegs.COP_REGS.COP.CallerID1stTone[3] = 0x99;
7912 j->m_DAAShadowRegs.COP_REGS.COP.CallerID1stTone[2] = 0x99;
7913 j->m_DAAShadowRegs.COP_REGS.COP.CallerID1stTone[1] = 0x99;
7914 j->m_DAAShadowRegs.COP_REGS.COP.CallerID1stTone[0] = 0x99;
7915/* Caller ID 2nd Tone (0F):FD,B5,BA,07,DA,00,00,00 */
7916 j->m_DAAShadowRegs.COP_REGS.COP.CallerID2ndTone[7] = 0xFD;
7917 j->m_DAAShadowRegs.COP_REGS.COP.CallerID2ndTone[6] = 0xB5;
7918 j->m_DAAShadowRegs.COP_REGS.COP.CallerID2ndTone[5] = 0xBA;
7919 j->m_DAAShadowRegs.COP_REGS.COP.CallerID2ndTone[4] = 0x07;
7920 j->m_DAAShadowRegs.COP_REGS.COP.CallerID2ndTone[3] = 0xDA;
7921 j->m_DAAShadowRegs.COP_REGS.COP.CallerID2ndTone[2] = 0x00;
7922 j->m_DAAShadowRegs.COP_REGS.COP.CallerID2ndTone[1] = 0x00;
7923 j->m_DAAShadowRegs.COP_REGS.COP.CallerID2ndTone[0] = 0x00;
7924/* */
7925 /* ;CR Registers */
7926 /* Config. Reg. 0 (filters) (cr0):FE ; CLK gen. by crystal */
7927 j->m_DAAShadowRegs.SOP_REGS.SOP.cr0.reg = 0xFF;
7928/* Config. Reg. 1 (dialing) (cr1):05 */
7929 j->m_DAAShadowRegs.SOP_REGS.SOP.cr1.reg = 0x05;
7930/* Config. Reg. 2 (caller ID) (cr2):04 */
7931 j->m_DAAShadowRegs.SOP_REGS.SOP.cr2.reg = 0x04;
7932/* Config. Reg. 3 (testloops) (cr3):03 ; SEL Bit==0, HP-disabled */
7933 j->m_DAAShadowRegs.SOP_REGS.SOP.cr3.reg = 0x00;
7934/* Config. Reg. 4 (analog gain) (cr4):02 */
7935 j->m_DAAShadowRegs.SOP_REGS.SOP.cr4.reg = 0x02;
7936 /* Config. Reg. 5 (Version) (cr5):02 */
7937 /* Config. Reg. 6 (Reserved) (cr6):00 */
7938 /* Config. Reg. 7 (Reserved) (cr7):00 */
7939 /* */
7940 /* ;xr Registers */
7941 /* Ext. Reg. 0 (Interrupt Reg.) (xr0):02 */
7942
7943 j->m_DAAShadowRegs.XOP_xr0_W.reg = 0x02; /* SO_1 set to '1' because it is inverted. */
7944 /* Ext. Reg. 1 (Interrupt enable) (xr1):3C Cadence, RING, Caller ID, VDD_OK */
7945
7946 j->m_DAAShadowRegs.XOP_REGS.XOP.xr1.reg = 0x3C;
7947/* Ext. Reg. 2 (Cadence Time Out) (xr2):7D */
7948 j->m_DAAShadowRegs.XOP_REGS.XOP.xr2.reg = 0x7D;
7949/* Ext. Reg. 3 (DC Char) (xr3):32 ; B-Filter Off == 1 */
7950 j->m_DAAShadowRegs.XOP_REGS.XOP.xr3.reg = 0x3B; /*0x32; */
7951 /* Ext. Reg. 4 (Cadence) (xr4):00 */
7952
7953 j->m_DAAShadowRegs.XOP_REGS.XOP.xr4.reg = 0x00;
7954/* Ext. Reg. 5 (Ring timer) (xr5):22 */
7955 j->m_DAAShadowRegs.XOP_REGS.XOP.xr5.reg = 0x22;
7956/* Ext. Reg. 6 (Power State) (xr6):00 */
7957 j->m_DAAShadowRegs.XOP_xr6_W.reg = 0x00;
7958/* Ext. Reg. 7 (Vdd) (xr7):40 */
7959 j->m_DAAShadowRegs.XOP_REGS.XOP.xr7.reg = 0x40; /* 0x40 ??? Should it be 0x00? */
7960 /* */
7961 /* DTMF Tone 1 (0B): 11,B3,5A,2C ; 697 Hz */
7962 /* 12,33,5A,C3 ; 770 Hz */
7963 /* 13,3C,5B,32 ; 852 Hz */
7964 /* 1D,1B,5C,CC ; 941 Hz */
7965
7966 j->m_DAAShadowRegs.COP_REGS.COP.Tone1Coeff[3] = 0x11;
7967 j->m_DAAShadowRegs.COP_REGS.COP.Tone1Coeff[2] = 0xB3;
7968 j->m_DAAShadowRegs.COP_REGS.COP.Tone1Coeff[1] = 0x5A;
7969 j->m_DAAShadowRegs.COP_REGS.COP.Tone1Coeff[0] = 0x2C;
7970/* DTMF Tone 2 (0C): 32,32,52,B3 ; 1209 Hz */
7971 /* EC,1D,52,22 ; 1336 Hz */
7972 /* AA,AC,51,D2 ; 1477 Hz */
7973 /* 9B,3B,51,25 ; 1633 Hz */
7974 j->m_DAAShadowRegs.COP_REGS.COP.Tone2Coeff[3] = 0x32;
7975 j->m_DAAShadowRegs.COP_REGS.COP.Tone2Coeff[2] = 0x32;
7976 j->m_DAAShadowRegs.COP_REGS.COP.Tone2Coeff[1] = 0x52;
7977 j->m_DAAShadowRegs.COP_REGS.COP.Tone2Coeff[0] = 0xB3;
7978}
7979
7980static void DAA_Coeff_UK(IXJ *j)
7981{
7982 int i;
7983
7984 j->daa_country = DAA_UK;
7985 /*----------------------------------------------- */
7986 /* CAO */
7987 for (i = 0; i < ALISDAA_CALLERID_SIZE; i++) {
7988 j->m_DAAShadowRegs.CAO_REGS.CAO.CallerID[i] = 0;
7989 }
7990
7991/* Bytes for IM-filter part 1 (04): 00,C2,BB,A8,CB,81,A0,00 */
7992 j->m_DAAShadowRegs.COP_REGS.COP.IMFilterCoeff_1[7] = 0x00;
7993 j->m_DAAShadowRegs.COP_REGS.COP.IMFilterCoeff_1[6] = 0xC2;
7994 j->m_DAAShadowRegs.COP_REGS.COP.IMFilterCoeff_1[5] = 0xBB;
7995 j->m_DAAShadowRegs.COP_REGS.COP.IMFilterCoeff_1[4] = 0xA8;
7996 j->m_DAAShadowRegs.COP_REGS.COP.IMFilterCoeff_1[3] = 0xCB;
7997 j->m_DAAShadowRegs.COP_REGS.COP.IMFilterCoeff_1[2] = 0x81;
7998 j->m_DAAShadowRegs.COP_REGS.COP.IMFilterCoeff_1[1] = 0xA0;
7999 j->m_DAAShadowRegs.COP_REGS.COP.IMFilterCoeff_1[0] = 0x00;
8000/* Bytes for IM-filter part 2 (05): 40,00,00,0A,A4,33,E0,08 */
8001 j->m_DAAShadowRegs.COP_REGS.COP.IMFilterCoeff_2[7] = 0x40;
8002 j->m_DAAShadowRegs.COP_REGS.COP.IMFilterCoeff_2[6] = 0x00;
8003 j->m_DAAShadowRegs.COP_REGS.COP.IMFilterCoeff_2[5] = 0x00;
8004 j->m_DAAShadowRegs.COP_REGS.COP.IMFilterCoeff_2[4] = 0x0A;
8005 j->m_DAAShadowRegs.COP_REGS.COP.IMFilterCoeff_2[3] = 0xA4;
8006 j->m_DAAShadowRegs.COP_REGS.COP.IMFilterCoeff_2[2] = 0x33;
8007 j->m_DAAShadowRegs.COP_REGS.COP.IMFilterCoeff_2[1] = 0xE0;
8008 j->m_DAAShadowRegs.COP_REGS.COP.IMFilterCoeff_2[0] = 0x08;
8009/* Bytes for FRX-filter (08): 07,9B,ED,24,B2,A2,A0,08 */
8010 j->m_DAAShadowRegs.COP_REGS.COP.FRXFilterCoeff[7] = 0x07;
8011 j->m_DAAShadowRegs.COP_REGS.COP.FRXFilterCoeff[6] = 0x9B;
8012 j->m_DAAShadowRegs.COP_REGS.COP.FRXFilterCoeff[5] = 0xED;
8013 j->m_DAAShadowRegs.COP_REGS.COP.FRXFilterCoeff[4] = 0x24;
8014 j->m_DAAShadowRegs.COP_REGS.COP.FRXFilterCoeff[3] = 0xB2;
8015 j->m_DAAShadowRegs.COP_REGS.COP.FRXFilterCoeff[2] = 0xA2;
8016 j->m_DAAShadowRegs.COP_REGS.COP.FRXFilterCoeff[1] = 0xA0;
8017 j->m_DAAShadowRegs.COP_REGS.COP.FRXFilterCoeff[0] = 0x08;
8018/* Bytes for FRR-filter (07): 0F,92,F2,B2,87,D2,30,08 */
8019 j->m_DAAShadowRegs.COP_REGS.COP.FRRFilterCoeff[7] = 0x0F;
8020 j->m_DAAShadowRegs.COP_REGS.COP.FRRFilterCoeff[6] = 0x92;
8021 j->m_DAAShadowRegs.COP_REGS.COP.FRRFilterCoeff[5] = 0xF2;
8022 j->m_DAAShadowRegs.COP_REGS.COP.FRRFilterCoeff[4] = 0xB2;
8023 j->m_DAAShadowRegs.COP_REGS.COP.FRRFilterCoeff[3] = 0x87;
8024 j->m_DAAShadowRegs.COP_REGS.COP.FRRFilterCoeff[2] = 0xD2;
8025 j->m_DAAShadowRegs.COP_REGS.COP.FRRFilterCoeff[1] = 0x30;
8026 j->m_DAAShadowRegs.COP_REGS.COP.FRRFilterCoeff[0] = 0x08;
8027/* Bytes for AX-filter (0A): 1B,A5,DD,CA */
8028 j->m_DAAShadowRegs.COP_REGS.COP.AXFilterCoeff[3] = 0x1B;
8029 j->m_DAAShadowRegs.COP_REGS.COP.AXFilterCoeff[2] = 0xA5;
8030 j->m_DAAShadowRegs.COP_REGS.COP.AXFilterCoeff[1] = 0xDD;
8031 j->m_DAAShadowRegs.COP_REGS.COP.AXFilterCoeff[0] = 0xCA;
8032/* Bytes for AR-filter (09): E2,27,10,D6 */
8033 j->m_DAAShadowRegs.COP_REGS.COP.ARFilterCoeff[3] = 0xE2;
8034 j->m_DAAShadowRegs.COP_REGS.COP.ARFilterCoeff[2] = 0x27;
8035 j->m_DAAShadowRegs.COP_REGS.COP.ARFilterCoeff[1] = 0x10;
8036 j->m_DAAShadowRegs.COP_REGS.COP.ARFilterCoeff[0] = 0xD6;
8037/* Bytes for TH-filter part 1 (00): 80,2D,38,8B,D0,00,00,98 */
8038 j->m_DAAShadowRegs.COP_REGS.COP.THFilterCoeff_1[7] = 0x80;
8039 j->m_DAAShadowRegs.COP_REGS.COP.THFilterCoeff_1[6] = 0x2D;
8040 j->m_DAAShadowRegs.COP_REGS.COP.THFilterCoeff_1[5] = 0x38;
8041 j->m_DAAShadowRegs.COP_REGS.COP.THFilterCoeff_1[4] = 0x8B;
8042 j->m_DAAShadowRegs.COP_REGS.COP.THFilterCoeff_1[3] = 0xD0;
8043 j->m_DAAShadowRegs.COP_REGS.COP.THFilterCoeff_1[2] = 0x00;
8044 j->m_DAAShadowRegs.COP_REGS.COP.THFilterCoeff_1[1] = 0x00;
8045 j->m_DAAShadowRegs.COP_REGS.COP.THFilterCoeff_1[0] = 0x98;
8046/* Bytes for TH-filter part 2 (01): 02,5A,53,F0,0B,5F,84,D4 */
8047 j->m_DAAShadowRegs.COP_REGS.COP.THFilterCoeff_2[7] = 0x02;
8048 j->m_DAAShadowRegs.COP_REGS.COP.THFilterCoeff_2[6] = 0x5A;
8049 j->m_DAAShadowRegs.COP_REGS.COP.THFilterCoeff_2[5] = 0x53;
8050 j->m_DAAShadowRegs.COP_REGS.COP.THFilterCoeff_2[4] = 0xF0;
8051 j->m_DAAShadowRegs.COP_REGS.COP.THFilterCoeff_2[3] = 0x0B;
8052 j->m_DAAShadowRegs.COP_REGS.COP.THFilterCoeff_2[2] = 0x5F;
8053 j->m_DAAShadowRegs.COP_REGS.COP.THFilterCoeff_2[1] = 0x84;
8054 j->m_DAAShadowRegs.COP_REGS.COP.THFilterCoeff_2[0] = 0xD4;
8055/* Bytes for TH-filter part 3 (02): 00,88,6A,A4,8F,52,F5,32 */
8056 j->m_DAAShadowRegs.COP_REGS.COP.THFilterCoeff_3[7] = 0x00;
8057 j->m_DAAShadowRegs.COP_REGS.COP.THFilterCoeff_3[6] = 0x88;
8058 j->m_DAAShadowRegs.COP_REGS.COP.THFilterCoeff_3[5] = 0x6A;
8059 j->m_DAAShadowRegs.COP_REGS.COP.THFilterCoeff_3[4] = 0xA4;
8060 j->m_DAAShadowRegs.COP_REGS.COP.THFilterCoeff_3[3] = 0x8F;
8061 j->m_DAAShadowRegs.COP_REGS.COP.THFilterCoeff_3[2] = 0x52;
8062 j->m_DAAShadowRegs.COP_REGS.COP.THFilterCoeff_3[1] = 0xF5;
8063 j->m_DAAShadowRegs.COP_REGS.COP.THFilterCoeff_3[0] = 0x32;
8064/* ; idle */
8065 /* Bytes for Ringing part 1 (03):1B,3C,93,3A,22,12,A3,23 */
8066 j->m_DAAShadowRegs.COP_REGS.COP.RingerImpendance_1[7] = 0x1B;
8067 j->m_DAAShadowRegs.COP_REGS.COP.RingerImpendance_1[6] = 0x3C;
8068 j->m_DAAShadowRegs.COP_REGS.COP.RingerImpendance_1[5] = 0x93;
8069 j->m_DAAShadowRegs.COP_REGS.COP.RingerImpendance_1[4] = 0x3A;
8070 j->m_DAAShadowRegs.COP_REGS.COP.RingerImpendance_1[3] = 0x22;
8071 j->m_DAAShadowRegs.COP_REGS.COP.RingerImpendance_1[2] = 0x12;
8072 j->m_DAAShadowRegs.COP_REGS.COP.RingerImpendance_1[1] = 0xA3;
8073 j->m_DAAShadowRegs.COP_REGS.COP.RingerImpendance_1[0] = 0x23;
8074/* Bytes for Ringing part 2 (06):12,A2,A6,BA,22,7A,0A,D5 */
8075 j->m_DAAShadowRegs.COP_REGS.COP.RingerImpendance_2[7] = 0x12;
8076 j->m_DAAShadowRegs.COP_REGS.COP.RingerImpendance_2[6] = 0xA2;
8077 j->m_DAAShadowRegs.COP_REGS.COP.RingerImpendance_2[5] = 0xA6;
8078 j->m_DAAShadowRegs.COP_REGS.COP.RingerImpendance_2[4] = 0xBA;
8079 j->m_DAAShadowRegs.COP_REGS.COP.RingerImpendance_2[3] = 0x22;
8080 j->m_DAAShadowRegs.COP_REGS.COP.RingerImpendance_2[2] = 0x7A;
8081 j->m_DAAShadowRegs.COP_REGS.COP.RingerImpendance_2[1] = 0x0A;
8082 j->m_DAAShadowRegs.COP_REGS.COP.RingerImpendance_2[0] = 0xD5;
8083/* Levelmetering Ringing (0D):AA,35,0F,8E ; 25Hz 30V less possible? */
8084 j->m_DAAShadowRegs.COP_REGS.COP.LevelmeteringRinging[3] = 0xAA;
8085 j->m_DAAShadowRegs.COP_REGS.COP.LevelmeteringRinging[2] = 0x35;
8086 j->m_DAAShadowRegs.COP_REGS.COP.LevelmeteringRinging[1] = 0x0F;
8087 j->m_DAAShadowRegs.COP_REGS.COP.LevelmeteringRinging[0] = 0x8E;
8088/* Caller ID 1st Tone (0E):CA,0E,CA,09,99,99,99,99 */
8089 j->m_DAAShadowRegs.COP_REGS.COP.CallerID1stTone[7] = 0xCA;
8090 j->m_DAAShadowRegs.COP_REGS.COP.CallerID1stTone[6] = 0x0E;
8091 j->m_DAAShadowRegs.COP_REGS.COP.CallerID1stTone[5] = 0xCA;
8092 j->m_DAAShadowRegs.COP_REGS.COP.CallerID1stTone[4] = 0x09;
8093 j->m_DAAShadowRegs.COP_REGS.COP.CallerID1stTone[3] = 0x99;
8094 j->m_DAAShadowRegs.COP_REGS.COP.CallerID1stTone[2] = 0x99;
8095 j->m_DAAShadowRegs.COP_REGS.COP.CallerID1stTone[1] = 0x99;
8096 j->m_DAAShadowRegs.COP_REGS.COP.CallerID1stTone[0] = 0x99;
8097/* Caller ID 2nd Tone (0F):FD,B5,BA,07,DA,00,00,00 */
8098 j->m_DAAShadowRegs.COP_REGS.COP.CallerID2ndTone[7] = 0xFD;
8099 j->m_DAAShadowRegs.COP_REGS.COP.CallerID2ndTone[6] = 0xB5;
8100 j->m_DAAShadowRegs.COP_REGS.COP.CallerID2ndTone[5] = 0xBA;
8101 j->m_DAAShadowRegs.COP_REGS.COP.CallerID2ndTone[4] = 0x07;
8102 j->m_DAAShadowRegs.COP_REGS.COP.CallerID2ndTone[3] = 0xDA;
8103 j->m_DAAShadowRegs.COP_REGS.COP.CallerID2ndTone[2] = 0x00;
8104 j->m_DAAShadowRegs.COP_REGS.COP.CallerID2ndTone[1] = 0x00;
8105 j->m_DAAShadowRegs.COP_REGS.COP.CallerID2ndTone[0] = 0x00;
8106/* ;CR Registers */
8107 /* Config. Reg. 0 (filters) (cr0):FF */
8108 j->m_DAAShadowRegs.SOP_REGS.SOP.cr0.reg = 0xFF;
8109/* Config. Reg. 1 (dialing) (cr1):05 */
8110 j->m_DAAShadowRegs.SOP_REGS.SOP.cr1.reg = 0x05;
8111/* Config. Reg. 2 (caller ID) (cr2):04 */
8112 j->m_DAAShadowRegs.SOP_REGS.SOP.cr2.reg = 0x04;
8113/* Config. Reg. 3 (testloops) (cr3):00 ; */
8114 j->m_DAAShadowRegs.SOP_REGS.SOP.cr3.reg = 0x00;
8115/* Config. Reg. 4 (analog gain) (cr4):02 */
8116 j->m_DAAShadowRegs.SOP_REGS.SOP.cr4.reg = 0x02;
8117 /* Config. Reg. 5 (Version) (cr5):02 */
8118 /* Config. Reg. 6 (Reserved) (cr6):00 */
8119 /* Config. Reg. 7 (Reserved) (cr7):00 */
8120 /* ;xr Registers */
8121 /* Ext. Reg. 0 (Interrupt Reg.) (xr0):02 */
8122
8123 j->m_DAAShadowRegs.XOP_xr0_W.reg = 0x02; /* SO_1 set to '1' because it is inverted. */
8124 /* Ext. Reg. 1 (Interrupt enable) (xr1):1C */
8125
8126 j->m_DAAShadowRegs.XOP_REGS.XOP.xr1.reg = 0x1C; /* RING, Caller ID, VDD_OK */
8127 /* Ext. Reg. 2 (Cadence Time Out) (xr2):7D */
8128
8129 j->m_DAAShadowRegs.XOP_REGS.XOP.xr2.reg = 0x7D;
8130/* Ext. Reg. 3 (DC Char) (xr3):36 ; */
8131 j->m_DAAShadowRegs.XOP_REGS.XOP.xr3.reg = 0x36;
8132/* Ext. Reg. 4 (Cadence) (xr4):00 */
8133 j->m_DAAShadowRegs.XOP_REGS.XOP.xr4.reg = 0x00;
8134/* Ext. Reg. 5 (Ring timer) (xr5):22 */
8135 j->m_DAAShadowRegs.XOP_REGS.XOP.xr5.reg = 0x22;
8136/* Ext. Reg. 6 (Power State) (xr6):00 */
8137 j->m_DAAShadowRegs.XOP_xr6_W.reg = 0x00;
8138/* Ext. Reg. 7 (Vdd) (xr7):46 */
8139 j->m_DAAShadowRegs.XOP_REGS.XOP.xr7.reg = 0x46; /* 0x46 ??? Should it be 0x00? */
8140 /* DTMF Tone 1 (0B): 11,B3,5A,2C ; 697 Hz */
8141 /* 12,33,5A,C3 ; 770 Hz */
8142 /* 13,3C,5B,32 ; 852 Hz */
8143 /* 1D,1B,5C,CC ; 941 Hz */
8144
8145 j->m_DAAShadowRegs.COP_REGS.COP.Tone1Coeff[3] = 0x11;
8146 j->m_DAAShadowRegs.COP_REGS.COP.Tone1Coeff[2] = 0xB3;
8147 j->m_DAAShadowRegs.COP_REGS.COP.Tone1Coeff[1] = 0x5A;
8148 j->m_DAAShadowRegs.COP_REGS.COP.Tone1Coeff[0] = 0x2C;
8149/* DTMF Tone 2 (0C): 32,32,52,B3 ; 1209 Hz */
8150 /* EC,1D,52,22 ; 1336 Hz */
8151 /* AA,AC,51,D2 ; 1477 Hz */
8152 /* 9B,3B,51,25 ; 1633 Hz */
8153 j->m_DAAShadowRegs.COP_REGS.COP.Tone2Coeff[3] = 0x32;
8154 j->m_DAAShadowRegs.COP_REGS.COP.Tone2Coeff[2] = 0x32;
8155 j->m_DAAShadowRegs.COP_REGS.COP.Tone2Coeff[1] = 0x52;
8156 j->m_DAAShadowRegs.COP_REGS.COP.Tone2Coeff[0] = 0xB3;
8157}
8158
8159
8160static void DAA_Coeff_France(IXJ *j)
8161{
8162 int i;
8163
8164 j->daa_country = DAA_FRANCE;
8165 /*----------------------------------------------- */
8166 /* CAO */
8167 for (i = 0; i < ALISDAA_CALLERID_SIZE; i++) {
8168 j->m_DAAShadowRegs.CAO_REGS.CAO.CallerID[i] = 0;
8169 }
8170
8171/* Bytes for IM-filter part 1 (04): 02,A2,43,2C,22,AF,A0,00 */
8172 j->m_DAAShadowRegs.COP_REGS.COP.IMFilterCoeff_1[7] = 0x02;
8173 j->m_DAAShadowRegs.COP_REGS.COP.IMFilterCoeff_1[6] = 0xA2;
8174 j->m_DAAShadowRegs.COP_REGS.COP.IMFilterCoeff_1[5] = 0x43;
8175 j->m_DAAShadowRegs.COP_REGS.COP.IMFilterCoeff_1[4] = 0x2C;
8176 j->m_DAAShadowRegs.COP_REGS.COP.IMFilterCoeff_1[3] = 0x22;
8177 j->m_DAAShadowRegs.COP_REGS.COP.IMFilterCoeff_1[2] = 0xAF;
8178 j->m_DAAShadowRegs.COP_REGS.COP.IMFilterCoeff_1[1] = 0xA0;
8179 j->m_DAAShadowRegs.COP_REGS.COP.IMFilterCoeff_1[0] = 0x00;
8180/* Bytes for IM-filter part 2 (05): 67,CE,00,0C,22,33,E0,08 */
8181 j->m_DAAShadowRegs.COP_REGS.COP.IMFilterCoeff_2[7] = 0x67;
8182 j->m_DAAShadowRegs.COP_REGS.COP.IMFilterCoeff_2[6] = 0xCE;
8183 j->m_DAAShadowRegs.COP_REGS.COP.IMFilterCoeff_2[5] = 0x00;
8184 j->m_DAAShadowRegs.COP_REGS.COP.IMFilterCoeff_2[4] = 0x2C;
8185 j->m_DAAShadowRegs.COP_REGS.COP.IMFilterCoeff_2[3] = 0x22;
8186 j->m_DAAShadowRegs.COP_REGS.COP.IMFilterCoeff_2[2] = 0x33;
8187 j->m_DAAShadowRegs.COP_REGS.COP.IMFilterCoeff_2[1] = 0xE0;
8188 j->m_DAAShadowRegs.COP_REGS.COP.IMFilterCoeff_2[0] = 0x08;
8189/* Bytes for FRX-filter (08): 07,9A,28,F6,23,4A,B0,08 */
8190 j->m_DAAShadowRegs.COP_REGS.COP.FRXFilterCoeff[7] = 0x07;
8191 j->m_DAAShadowRegs.COP_REGS.COP.FRXFilterCoeff[6] = 0x9A;
8192 j->m_DAAShadowRegs.COP_REGS.COP.FRXFilterCoeff[5] = 0x28;
8193 j->m_DAAShadowRegs.COP_REGS.COP.FRXFilterCoeff[4] = 0xF6;
8194 j->m_DAAShadowRegs.COP_REGS.COP.FRXFilterCoeff[3] = 0x23;
8195 j->m_DAAShadowRegs.COP_REGS.COP.FRXFilterCoeff[2] = 0x4A;
8196 j->m_DAAShadowRegs.COP_REGS.COP.FRXFilterCoeff[1] = 0xB0;
8197 j->m_DAAShadowRegs.COP_REGS.COP.FRXFilterCoeff[0] = 0x08;
8198/* Bytes for FRR-filter (07): 03,8F,F9,2F,9E,FA,20,08 */
8199 j->m_DAAShadowRegs.COP_REGS.COP.FRRFilterCoeff[7] = 0x03;
8200 j->m_DAAShadowRegs.COP_REGS.COP.FRRFilterCoeff[6] = 0x8F;
8201 j->m_DAAShadowRegs.COP_REGS.COP.FRRFilterCoeff[5] = 0xF9;
8202 j->m_DAAShadowRegs.COP_REGS.COP.FRRFilterCoeff[4] = 0x2F;
8203 j->m_DAAShadowRegs.COP_REGS.COP.FRRFilterCoeff[3] = 0x9E;
8204 j->m_DAAShadowRegs.COP_REGS.COP.FRRFilterCoeff[2] = 0xFA;
8205 j->m_DAAShadowRegs.COP_REGS.COP.FRRFilterCoeff[1] = 0x20;
8206 j->m_DAAShadowRegs.COP_REGS.COP.FRRFilterCoeff[0] = 0x08;
8207/* Bytes for AX-filter (0A): 16,B5,DD,CA */
8208 j->m_DAAShadowRegs.COP_REGS.COP.AXFilterCoeff[3] = 0x16;
8209 j->m_DAAShadowRegs.COP_REGS.COP.AXFilterCoeff[2] = 0xB5;
8210 j->m_DAAShadowRegs.COP_REGS.COP.AXFilterCoeff[1] = 0xDD;
8211 j->m_DAAShadowRegs.COP_REGS.COP.AXFilterCoeff[0] = 0xCA;
8212/* Bytes for AR-filter (09): 52,C7,10,D6 */
8213 j->m_DAAShadowRegs.COP_REGS.COP.ARFilterCoeff[3] = 0xE2;
8214 j->m_DAAShadowRegs.COP_REGS.COP.ARFilterCoeff[2] = 0xC7;
8215 j->m_DAAShadowRegs.COP_REGS.COP.ARFilterCoeff[1] = 0x10;
8216 j->m_DAAShadowRegs.COP_REGS.COP.ARFilterCoeff[0] = 0xD6;
8217/* Bytes for TH-filter part 1 (00): 00,42,48,81,A6,80,00,98 */
8218 j->m_DAAShadowRegs.COP_REGS.COP.THFilterCoeff_1[7] = 0x00;
8219 j->m_DAAShadowRegs.COP_REGS.COP.THFilterCoeff_1[6] = 0x42;
8220 j->m_DAAShadowRegs.COP_REGS.COP.THFilterCoeff_1[5] = 0x48;
8221 j->m_DAAShadowRegs.COP_REGS.COP.THFilterCoeff_1[4] = 0x81;
8222 j->m_DAAShadowRegs.COP_REGS.COP.THFilterCoeff_1[3] = 0xA6;
8223 j->m_DAAShadowRegs.COP_REGS.COP.THFilterCoeff_1[2] = 0x80;
8224 j->m_DAAShadowRegs.COP_REGS.COP.THFilterCoeff_1[1] = 0x00;
8225 j->m_DAAShadowRegs.COP_REGS.COP.THFilterCoeff_1[0] = 0x98;
8226/* Bytes for TH-filter part 2 (01): 02,AC,2A,30,78,AC,8A,2C */
8227 j->m_DAAShadowRegs.COP_REGS.COP.THFilterCoeff_2[7] = 0x02;
8228 j->m_DAAShadowRegs.COP_REGS.COP.THFilterCoeff_2[6] = 0xAC;
8229 j->m_DAAShadowRegs.COP_REGS.COP.THFilterCoeff_2[5] = 0x2A;
8230 j->m_DAAShadowRegs.COP_REGS.COP.THFilterCoeff_2[4] = 0x30;
8231 j->m_DAAShadowRegs.COP_REGS.COP.THFilterCoeff_2[3] = 0x78;
8232 j->m_DAAShadowRegs.COP_REGS.COP.THFilterCoeff_2[2] = 0xAC;
8233 j->m_DAAShadowRegs.COP_REGS.COP.THFilterCoeff_2[1] = 0x8A;
8234 j->m_DAAShadowRegs.COP_REGS.COP.THFilterCoeff_2[0] = 0x2C;
8235/* Bytes for TH-filter part 3 (02): 00,88,DA,A5,22,BA,2C,45 */
8236 j->m_DAAShadowRegs.COP_REGS.COP.THFilterCoeff_3[7] = 0x00;
8237 j->m_DAAShadowRegs.COP_REGS.COP.THFilterCoeff_3[6] = 0x88;
8238 j->m_DAAShadowRegs.COP_REGS.COP.THFilterCoeff_3[5] = 0xDA;
8239 j->m_DAAShadowRegs.COP_REGS.COP.THFilterCoeff_3[4] = 0xA5;
8240 j->m_DAAShadowRegs.COP_REGS.COP.THFilterCoeff_3[3] = 0x22;
8241 j->m_DAAShadowRegs.COP_REGS.COP.THFilterCoeff_3[2] = 0xBA;
8242 j->m_DAAShadowRegs.COP_REGS.COP.THFilterCoeff_3[1] = 0x2C;
8243 j->m_DAAShadowRegs.COP_REGS.COP.THFilterCoeff_3[0] = 0x45;
8244/* ; idle */
8245 /* Bytes for Ringing part 1 (03):1B,3C,93,3A,22,12,A3,23 */
8246 j->m_DAAShadowRegs.COP_REGS.COP.RingerImpendance_1[7] = 0x1B;
8247 j->m_DAAShadowRegs.COP_REGS.COP.RingerImpendance_1[6] = 0x3C;
8248 j->m_DAAShadowRegs.COP_REGS.COP.RingerImpendance_1[5] = 0x93;
8249 j->m_DAAShadowRegs.COP_REGS.COP.RingerImpendance_1[4] = 0x3A;
8250 j->m_DAAShadowRegs.COP_REGS.COP.RingerImpendance_1[3] = 0x22;
8251 j->m_DAAShadowRegs.COP_REGS.COP.RingerImpendance_1[2] = 0x12;
8252 j->m_DAAShadowRegs.COP_REGS.COP.RingerImpendance_1[1] = 0xA3;
8253 j->m_DAAShadowRegs.COP_REGS.COP.RingerImpendance_1[0] = 0x23;
8254/* Bytes for Ringing part 2 (06):12,A2,A6,BA,22,7A,0A,D5 */
8255 j->m_DAAShadowRegs.COP_REGS.COP.RingerImpendance_2[7] = 0x12;
8256 j->m_DAAShadowRegs.COP_REGS.COP.RingerImpendance_2[6] = 0xA2;
8257 j->m_DAAShadowRegs.COP_REGS.COP.RingerImpendance_2[5] = 0xA6;
8258 j->m_DAAShadowRegs.COP_REGS.COP.RingerImpendance_2[4] = 0xBA;
8259 j->m_DAAShadowRegs.COP_REGS.COP.RingerImpendance_2[3] = 0x22;
8260 j->m_DAAShadowRegs.COP_REGS.COP.RingerImpendance_2[2] = 0x7A;
8261 j->m_DAAShadowRegs.COP_REGS.COP.RingerImpendance_2[1] = 0x0A;
8262 j->m_DAAShadowRegs.COP_REGS.COP.RingerImpendance_2[0] = 0xD5;
8263/* Levelmetering Ringing (0D):32,45,B5,84 ; 50Hz 20V */
8264 j->m_DAAShadowRegs.COP_REGS.COP.LevelmeteringRinging[3] = 0x32;
8265 j->m_DAAShadowRegs.COP_REGS.COP.LevelmeteringRinging[2] = 0x45;
8266 j->m_DAAShadowRegs.COP_REGS.COP.LevelmeteringRinging[1] = 0xB5;
8267 j->m_DAAShadowRegs.COP_REGS.COP.LevelmeteringRinging[0] = 0x84;
8268/* Caller ID 1st Tone (0E):CA,0E,CA,09,99,99,99,99 */
8269 j->m_DAAShadowRegs.COP_REGS.COP.CallerID1stTone[7] = 0xCA;
8270 j->m_DAAShadowRegs.COP_REGS.COP.CallerID1stTone[6] = 0x0E;
8271 j->m_DAAShadowRegs.COP_REGS.COP.CallerID1stTone[5] = 0xCA;
8272 j->m_DAAShadowRegs.COP_REGS.COP.CallerID1stTone[4] = 0x09;
8273 j->m_DAAShadowRegs.COP_REGS.COP.CallerID1stTone[3] = 0x99;
8274 j->m_DAAShadowRegs.COP_REGS.COP.CallerID1stTone[2] = 0x99;
8275 j->m_DAAShadowRegs.COP_REGS.COP.CallerID1stTone[1] = 0x99;
8276 j->m_DAAShadowRegs.COP_REGS.COP.CallerID1stTone[0] = 0x99;
8277/* Caller ID 2nd Tone (0F):FD,B5,BA,07,DA,00,00,00 */
8278 j->m_DAAShadowRegs.COP_REGS.COP.CallerID2ndTone[7] = 0xFD;
8279 j->m_DAAShadowRegs.COP_REGS.COP.CallerID2ndTone[6] = 0xB5;
8280 j->m_DAAShadowRegs.COP_REGS.COP.CallerID2ndTone[5] = 0xBA;
8281 j->m_DAAShadowRegs.COP_REGS.COP.CallerID2ndTone[4] = 0x07;
8282 j->m_DAAShadowRegs.COP_REGS.COP.CallerID2ndTone[3] = 0xDA;
8283 j->m_DAAShadowRegs.COP_REGS.COP.CallerID2ndTone[2] = 0x00;
8284 j->m_DAAShadowRegs.COP_REGS.COP.CallerID2ndTone[1] = 0x00;
8285 j->m_DAAShadowRegs.COP_REGS.COP.CallerID2ndTone[0] = 0x00;
8286/* ;CR Registers */
8287 /* Config. Reg. 0 (filters) (cr0):FF */
8288 j->m_DAAShadowRegs.SOP_REGS.SOP.cr0.reg = 0xFF;
8289/* Config. Reg. 1 (dialing) (cr1):05 */
8290 j->m_DAAShadowRegs.SOP_REGS.SOP.cr1.reg = 0x05;
8291/* Config. Reg. 2 (caller ID) (cr2):04 */
8292 j->m_DAAShadowRegs.SOP_REGS.SOP.cr2.reg = 0x04;
8293/* Config. Reg. 3 (testloops) (cr3):00 ; */
8294 j->m_DAAShadowRegs.SOP_REGS.SOP.cr3.reg = 0x00;
8295/* Config. Reg. 4 (analog gain) (cr4):02 */
8296 j->m_DAAShadowRegs.SOP_REGS.SOP.cr4.reg = 0x02;
8297 /* Config. Reg. 5 (Version) (cr5):02 */
8298 /* Config. Reg. 6 (Reserved) (cr6):00 */
8299 /* Config. Reg. 7 (Reserved) (cr7):00 */
8300 /* ;xr Registers */
8301 /* Ext. Reg. 0 (Interrupt Reg.) (xr0):02 */
8302
8303 j->m_DAAShadowRegs.XOP_xr0_W.reg = 0x02; /* SO_1 set to '1' because it is inverted. */
8304 /* Ext. Reg. 1 (Interrupt enable) (xr1):1C */
8305
8306 j->m_DAAShadowRegs.XOP_REGS.XOP.xr1.reg = 0x1C; /* RING, Caller ID, VDD_OK */
8307 /* Ext. Reg. 2 (Cadence Time Out) (xr2):7D */
8308
8309 j->m_DAAShadowRegs.XOP_REGS.XOP.xr2.reg = 0x7D;
8310/* Ext. Reg. 3 (DC Char) (xr3):36 ; */
8311 j->m_DAAShadowRegs.XOP_REGS.XOP.xr3.reg = 0x36;
8312/* Ext. Reg. 4 (Cadence) (xr4):00 */
8313 j->m_DAAShadowRegs.XOP_REGS.XOP.xr4.reg = 0x00;
8314/* Ext. Reg. 5 (Ring timer) (xr5):22 */
8315 j->m_DAAShadowRegs.XOP_REGS.XOP.xr5.reg = 0x22;
8316/* Ext. Reg. 6 (Power State) (xr6):00 */
8317 j->m_DAAShadowRegs.XOP_xr6_W.reg = 0x00;
8318/* Ext. Reg. 7 (Vdd) (xr7):46 */
8319 j->m_DAAShadowRegs.XOP_REGS.XOP.xr7.reg = 0x46; /* 0x46 ??? Should it be 0x00? */
8320 /* DTMF Tone 1 (0B): 11,B3,5A,2C ; 697 Hz */
8321 /* 12,33,5A,C3 ; 770 Hz */
8322 /* 13,3C,5B,32 ; 852 Hz */
8323 /* 1D,1B,5C,CC ; 941 Hz */
8324
8325 j->m_DAAShadowRegs.COP_REGS.COP.Tone1Coeff[3] = 0x11;
8326 j->m_DAAShadowRegs.COP_REGS.COP.Tone1Coeff[2] = 0xB3;
8327 j->m_DAAShadowRegs.COP_REGS.COP.Tone1Coeff[1] = 0x5A;
8328 j->m_DAAShadowRegs.COP_REGS.COP.Tone1Coeff[0] = 0x2C;
8329/* DTMF Tone 2 (0C): 32,32,52,B3 ; 1209 Hz */
8330 /* EC,1D,52,22 ; 1336 Hz */
8331 /* AA,AC,51,D2 ; 1477 Hz */
8332 /* 9B,3B,51,25 ; 1633 Hz */
8333 j->m_DAAShadowRegs.COP_REGS.COP.Tone2Coeff[3] = 0x32;
8334 j->m_DAAShadowRegs.COP_REGS.COP.Tone2Coeff[2] = 0x32;
8335 j->m_DAAShadowRegs.COP_REGS.COP.Tone2Coeff[1] = 0x52;
8336 j->m_DAAShadowRegs.COP_REGS.COP.Tone2Coeff[0] = 0xB3;
8337}
8338
8339
8340static void DAA_Coeff_Germany(IXJ *j)
8341{
8342 int i;
8343
8344 j->daa_country = DAA_GERMANY;
8345 /*----------------------------------------------- */
8346 /* CAO */
8347 for (i = 0; i < ALISDAA_CALLERID_SIZE; i++) {
8348 j->m_DAAShadowRegs.CAO_REGS.CAO.CallerID[i] = 0;
8349 }
8350
8351/* Bytes for IM-filter part 1 (04): 00,CE,BB,B8,D2,81,B0,00 */
8352 j->m_DAAShadowRegs.COP_REGS.COP.IMFilterCoeff_1[7] = 0x00;
8353 j->m_DAAShadowRegs.COP_REGS.COP.IMFilterCoeff_1[6] = 0xCE;
8354 j->m_DAAShadowRegs.COP_REGS.COP.IMFilterCoeff_1[5] = 0xBB;
8355 j->m_DAAShadowRegs.COP_REGS.COP.IMFilterCoeff_1[4] = 0xB8;
8356 j->m_DAAShadowRegs.COP_REGS.COP.IMFilterCoeff_1[3] = 0xD2;
8357 j->m_DAAShadowRegs.COP_REGS.COP.IMFilterCoeff_1[2] = 0x81;
8358 j->m_DAAShadowRegs.COP_REGS.COP.IMFilterCoeff_1[1] = 0xB0;
8359 j->m_DAAShadowRegs.COP_REGS.COP.IMFilterCoeff_1[0] = 0x00;
8360/* Bytes for IM-filter part 2 (05): 45,8F,00,0C,D2,3A,D0,08 */
8361 j->m_DAAShadowRegs.COP_REGS.COP.IMFilterCoeff_2[7] = 0x45;
8362 j->m_DAAShadowRegs.COP_REGS.COP.IMFilterCoeff_2[6] = 0x8F;
8363 j->m_DAAShadowRegs.COP_REGS.COP.IMFilterCoeff_2[5] = 0x00;
8364 j->m_DAAShadowRegs.COP_REGS.COP.IMFilterCoeff_2[4] = 0x0C;
8365 j->m_DAAShadowRegs.COP_REGS.COP.IMFilterCoeff_2[3] = 0xD2;
8366 j->m_DAAShadowRegs.COP_REGS.COP.IMFilterCoeff_2[2] = 0x3A;
8367 j->m_DAAShadowRegs.COP_REGS.COP.IMFilterCoeff_2[1] = 0xD0;
8368 j->m_DAAShadowRegs.COP_REGS.COP.IMFilterCoeff_2[0] = 0x08;
8369/* Bytes for FRX-filter (08): 07,AA,E2,34,24,89,20,08 */
8370 j->m_DAAShadowRegs.COP_REGS.COP.FRXFilterCoeff[7] = 0x07;
8371 j->m_DAAShadowRegs.COP_REGS.COP.FRXFilterCoeff[6] = 0xAA;
8372 j->m_DAAShadowRegs.COP_REGS.COP.FRXFilterCoeff[5] = 0xE2;
8373 j->m_DAAShadowRegs.COP_REGS.COP.FRXFilterCoeff[4] = 0x34;
8374 j->m_DAAShadowRegs.COP_REGS.COP.FRXFilterCoeff[3] = 0x24;
8375 j->m_DAAShadowRegs.COP_REGS.COP.FRXFilterCoeff[2] = 0x89;
8376 j->m_DAAShadowRegs.COP_REGS.COP.FRXFilterCoeff[1] = 0x20;
8377 j->m_DAAShadowRegs.COP_REGS.COP.FRXFilterCoeff[0] = 0x08;
8378/* Bytes for FRR-filter (07): 02,87,FA,37,9A,CA,B0,08 */
8379 j->m_DAAShadowRegs.COP_REGS.COP.FRRFilterCoeff[7] = 0x02;
8380 j->m_DAAShadowRegs.COP_REGS.COP.FRRFilterCoeff[6] = 0x87;
8381 j->m_DAAShadowRegs.COP_REGS.COP.FRRFilterCoeff[5] = 0xFA;
8382 j->m_DAAShadowRegs.COP_REGS.COP.FRRFilterCoeff[4] = 0x37;
8383 j->m_DAAShadowRegs.COP_REGS.COP.FRRFilterCoeff[3] = 0x9A;
8384 j->m_DAAShadowRegs.COP_REGS.COP.FRRFilterCoeff[2] = 0xCA;
8385 j->m_DAAShadowRegs.COP_REGS.COP.FRRFilterCoeff[1] = 0xB0;
8386 j->m_DAAShadowRegs.COP_REGS.COP.FRRFilterCoeff[0] = 0x08;
8387/* Bytes for AX-filter (0A): 72,D5,DD,CA */
8388 j->m_DAAShadowRegs.COP_REGS.COP.AXFilterCoeff[3] = 0x72;
8389 j->m_DAAShadowRegs.COP_REGS.COP.AXFilterCoeff[2] = 0xD5;
8390 j->m_DAAShadowRegs.COP_REGS.COP.AXFilterCoeff[1] = 0xDD;
8391 j->m_DAAShadowRegs.COP_REGS.COP.AXFilterCoeff[0] = 0xCA;
8392/* Bytes for AR-filter (09): 72,42,13,4B */
8393 j->m_DAAShadowRegs.COP_REGS.COP.ARFilterCoeff[3] = 0x72;
8394 j->m_DAAShadowRegs.COP_REGS.COP.ARFilterCoeff[2] = 0x42;
8395 j->m_DAAShadowRegs.COP_REGS.COP.ARFilterCoeff[1] = 0x13;
8396 j->m_DAAShadowRegs.COP_REGS.COP.ARFilterCoeff[0] = 0x4B;
8397/* Bytes for TH-filter part 1 (00): 80,52,48,81,AD,80,00,98 */
8398 j->m_DAAShadowRegs.COP_REGS.COP.THFilterCoeff_1[7] = 0x80;
8399 j->m_DAAShadowRegs.COP_REGS.COP.THFilterCoeff_1[6] = 0x52;
8400 j->m_DAAShadowRegs.COP_REGS.COP.THFilterCoeff_1[5] = 0x48;
8401 j->m_DAAShadowRegs.COP_REGS.COP.THFilterCoeff_1[4] = 0x81;
8402 j->m_DAAShadowRegs.COP_REGS.COP.THFilterCoeff_1[3] = 0xAD;
8403 j->m_DAAShadowRegs.COP_REGS.COP.THFilterCoeff_1[2] = 0x80;
8404 j->m_DAAShadowRegs.COP_REGS.COP.THFilterCoeff_1[1] = 0x00;
8405 j->m_DAAShadowRegs.COP_REGS.COP.THFilterCoeff_1[0] = 0x98;
8406/* Bytes for TH-filter part 2 (01): 02,42,5A,20,E8,1A,81,27 */
8407 j->m_DAAShadowRegs.COP_REGS.COP.THFilterCoeff_2[7] = 0x02;
8408 j->m_DAAShadowRegs.COP_REGS.COP.THFilterCoeff_2[6] = 0x42;
8409 j->m_DAAShadowRegs.COP_REGS.COP.THFilterCoeff_2[5] = 0x5A;
8410 j->m_DAAShadowRegs.COP_REGS.COP.THFilterCoeff_2[4] = 0x20;
8411 j->m_DAAShadowRegs.COP_REGS.COP.THFilterCoeff_2[3] = 0xE8;
8412 j->m_DAAShadowRegs.COP_REGS.COP.THFilterCoeff_2[2] = 0x1A;
8413 j->m_DAAShadowRegs.COP_REGS.COP.THFilterCoeff_2[1] = 0x81;
8414 j->m_DAAShadowRegs.COP_REGS.COP.THFilterCoeff_2[0] = 0x27;
8415/* Bytes for TH-filter part 3 (02): 00,88,63,26,BD,4B,A3,C2 */
8416 j->m_DAAShadowRegs.COP_REGS.COP.THFilterCoeff_3[7] = 0x00;
8417 j->m_DAAShadowRegs.COP_REGS.COP.THFilterCoeff_3[6] = 0x88;
8418 j->m_DAAShadowRegs.COP_REGS.COP.THFilterCoeff_3[5] = 0x63;
8419 j->m_DAAShadowRegs.COP_REGS.COP.THFilterCoeff_3[4] = 0x26;
8420 j->m_DAAShadowRegs.COP_REGS.COP.THFilterCoeff_3[3] = 0xBD;
8421 j->m_DAAShadowRegs.COP_REGS.COP.THFilterCoeff_3[2] = 0x4B;
8422 j->m_DAAShadowRegs.COP_REGS.COP.THFilterCoeff_3[1] = 0xA3;
8423 j->m_DAAShadowRegs.COP_REGS.COP.THFilterCoeff_3[0] = 0xC2;
8424/* ; (10K, 0.68uF) */
8425 /* Bytes for Ringing part 1 (03):1B,3B,9B,BA,D4,1C,B3,23 */
8426 j->m_DAAShadowRegs.COP_REGS.COP.RingerImpendance_1[7] = 0x1B;
8427 j->m_DAAShadowRegs.COP_REGS.COP.RingerImpendance_1[6] = 0x3B;
8428 j->m_DAAShadowRegs.COP_REGS.COP.RingerImpendance_1[5] = 0x9B;
8429 j->m_DAAShadowRegs.COP_REGS.COP.RingerImpendance_1[4] = 0xBA;
8430 j->m_DAAShadowRegs.COP_REGS.COP.RingerImpendance_1[3] = 0xD4;
8431 j->m_DAAShadowRegs.COP_REGS.COP.RingerImpendance_1[2] = 0x1C;
8432 j->m_DAAShadowRegs.COP_REGS.COP.RingerImpendance_1[1] = 0xB3;
8433 j->m_DAAShadowRegs.COP_REGS.COP.RingerImpendance_1[0] = 0x23;
8434/* Bytes for Ringing part 2 (06):13,42,A6,BA,D4,73,CA,D5 */
8435 j->m_DAAShadowRegs.COP_REGS.COP.RingerImpendance_2[7] = 0x13;
8436 j->m_DAAShadowRegs.COP_REGS.COP.RingerImpendance_2[6] = 0x42;
8437 j->m_DAAShadowRegs.COP_REGS.COP.RingerImpendance_2[5] = 0xA6;
8438 j->m_DAAShadowRegs.COP_REGS.COP.RingerImpendance_2[4] = 0xBA;
8439 j->m_DAAShadowRegs.COP_REGS.COP.RingerImpendance_2[3] = 0xD4;
8440 j->m_DAAShadowRegs.COP_REGS.COP.RingerImpendance_2[2] = 0x73;
8441 j->m_DAAShadowRegs.COP_REGS.COP.RingerImpendance_2[1] = 0xCA;
8442 j->m_DAAShadowRegs.COP_REGS.COP.RingerImpendance_2[0] = 0xD5;
8443/* Levelmetering Ringing (0D):B2,45,0F,8E */
8444 j->m_DAAShadowRegs.COP_REGS.COP.LevelmeteringRinging[3] = 0xB2;
8445 j->m_DAAShadowRegs.COP_REGS.COP.LevelmeteringRinging[2] = 0x45;
8446 j->m_DAAShadowRegs.COP_REGS.COP.LevelmeteringRinging[1] = 0x0F;
8447 j->m_DAAShadowRegs.COP_REGS.COP.LevelmeteringRinging[0] = 0x8E;
8448/* Caller ID 1st Tone (0E):CA,0E,CA,09,99,99,99,99 */
8449 j->m_DAAShadowRegs.COP_REGS.COP.CallerID1stTone[7] = 0xCA;
8450 j->m_DAAShadowRegs.COP_REGS.COP.CallerID1stTone[6] = 0x0E;
8451 j->m_DAAShadowRegs.COP_REGS.COP.CallerID1stTone[5] = 0xCA;
8452 j->m_DAAShadowRegs.COP_REGS.COP.CallerID1stTone[4] = 0x09;
8453 j->m_DAAShadowRegs.COP_REGS.COP.CallerID1stTone[3] = 0x99;
8454 j->m_DAAShadowRegs.COP_REGS.COP.CallerID1stTone[2] = 0x99;
8455 j->m_DAAShadowRegs.COP_REGS.COP.CallerID1stTone[1] = 0x99;
8456 j->m_DAAShadowRegs.COP_REGS.COP.CallerID1stTone[0] = 0x99;
8457/* Caller ID 2nd Tone (0F):FD,B5,BA,07,DA,00,00,00 */
8458 j->m_DAAShadowRegs.COP_REGS.COP.CallerID2ndTone[7] = 0xFD;
8459 j->m_DAAShadowRegs.COP_REGS.COP.CallerID2ndTone[6] = 0xB5;
8460 j->m_DAAShadowRegs.COP_REGS.COP.CallerID2ndTone[5] = 0xBA;
8461 j->m_DAAShadowRegs.COP_REGS.COP.CallerID2ndTone[4] = 0x07;
8462 j->m_DAAShadowRegs.COP_REGS.COP.CallerID2ndTone[3] = 0xDA;
8463 j->m_DAAShadowRegs.COP_REGS.COP.CallerID2ndTone[2] = 0x00;
8464 j->m_DAAShadowRegs.COP_REGS.COP.CallerID2ndTone[1] = 0x00;
8465 j->m_DAAShadowRegs.COP_REGS.COP.CallerID2ndTone[0] = 0x00;
8466/* ;CR Registers */
8467 /* Config. Reg. 0 (filters) (cr0):FF ; all Filters enabled, CLK from ext. source */
8468 j->m_DAAShadowRegs.SOP_REGS.SOP.cr0.reg = 0xFF;
8469/* Config. Reg. 1 (dialing) (cr1):05 ; Manual Ring, Ring metering enabled */
8470 j->m_DAAShadowRegs.SOP_REGS.SOP.cr1.reg = 0x05;
8471/* Config. Reg. 2 (caller ID) (cr2):04 ; Analog Gain 0dB, FSC internal */
8472 j->m_DAAShadowRegs.SOP_REGS.SOP.cr2.reg = 0x04;
8473/* Config. Reg. 3 (testloops) (cr3):00 ; SEL Bit==0, HP-enabled */
8474 j->m_DAAShadowRegs.SOP_REGS.SOP.cr3.reg = 0x00;
8475/* Config. Reg. 4 (analog gain) (cr4):02 */
8476 j->m_DAAShadowRegs.SOP_REGS.SOP.cr4.reg = 0x02;
8477 /* Config. Reg. 5 (Version) (cr5):02 */
8478 /* Config. Reg. 6 (Reserved) (cr6):00 */
8479 /* Config. Reg. 7 (Reserved) (cr7):00 */
8480 /* ;xr Registers */
8481 /* Ext. Reg. 0 (Interrupt Reg.) (xr0):02 */
8482
8483 j->m_DAAShadowRegs.XOP_xr0_W.reg = 0x02; /* SO_1 set to '1' because it is inverted. */
8484 /* Ext. Reg. 1 (Interrupt enable) (xr1):1C ; Ring, CID, VDDOK Interrupts enabled */
8485
8486 j->m_DAAShadowRegs.XOP_REGS.XOP.xr1.reg = 0x1C; /* RING, Caller ID, VDD_OK */
8487 /* Ext. Reg. 2 (Cadence Time Out) (xr2):7D */
8488
8489 j->m_DAAShadowRegs.XOP_REGS.XOP.xr2.reg = 0x7D;
8490/* Ext. Reg. 3 (DC Char) (xr3):32 ; B-Filter Off==1, U0=3.5V, R=200Ohm */
8491 j->m_DAAShadowRegs.XOP_REGS.XOP.xr3.reg = 0x32;
8492/* Ext. Reg. 4 (Cadence) (xr4):00 */
8493 j->m_DAAShadowRegs.XOP_REGS.XOP.xr4.reg = 0x00;
8494/* Ext. Reg. 5 (Ring timer) (xr5):22 */
8495 j->m_DAAShadowRegs.XOP_REGS.XOP.xr5.reg = 0x22;
8496/* Ext. Reg. 6 (Power State) (xr6):00 */
8497 j->m_DAAShadowRegs.XOP_xr6_W.reg = 0x00;
8498/* Ext. Reg. 7 (Vdd) (xr7):40 ; VDD=4.25 V */
8499 j->m_DAAShadowRegs.XOP_REGS.XOP.xr7.reg = 0x40; /* 0x40 ??? Should it be 0x00? */
8500 /* DTMF Tone 1 (0B): 11,B3,5A,2C ; 697 Hz */
8501 /* 12,33,5A,C3 ; 770 Hz */
8502 /* 13,3C,5B,32 ; 852 Hz */
8503 /* 1D,1B,5C,CC ; 941 Hz */
8504
8505 j->m_DAAShadowRegs.COP_REGS.COP.Tone1Coeff[3] = 0x11;
8506 j->m_DAAShadowRegs.COP_REGS.COP.Tone1Coeff[2] = 0xB3;
8507 j->m_DAAShadowRegs.COP_REGS.COP.Tone1Coeff[1] = 0x5A;
8508 j->m_DAAShadowRegs.COP_REGS.COP.Tone1Coeff[0] = 0x2C;
8509/* DTMF Tone 2 (0C): 32,32,52,B3 ; 1209 Hz */
8510 /* EC,1D,52,22 ; 1336 Hz */
8511 /* AA,AC,51,D2 ; 1477 Hz */
8512 /* 9B,3B,51,25 ; 1633 Hz */
8513 j->m_DAAShadowRegs.COP_REGS.COP.Tone2Coeff[3] = 0x32;
8514 j->m_DAAShadowRegs.COP_REGS.COP.Tone2Coeff[2] = 0x32;
8515 j->m_DAAShadowRegs.COP_REGS.COP.Tone2Coeff[1] = 0x52;
8516 j->m_DAAShadowRegs.COP_REGS.COP.Tone2Coeff[0] = 0xB3;
8517}
8518
8519
8520static void DAA_Coeff_Australia(IXJ *j)
8521{
8522 int i;
8523
8524 j->daa_country = DAA_AUSTRALIA;
8525 /*----------------------------------------------- */
8526 /* CAO */
8527 for (i = 0; i < ALISDAA_CALLERID_SIZE; i++) {
8528 j->m_DAAShadowRegs.CAO_REGS.CAO.CallerID[i] = 0;
8529 }
8530
8531/* Bytes for IM-filter part 1 (04): 00,A3,AA,28,B3,82,D0,00 */
8532 j->m_DAAShadowRegs.COP_REGS.COP.IMFilterCoeff_1[7] = 0x00;
8533 j->m_DAAShadowRegs.COP_REGS.COP.IMFilterCoeff_1[6] = 0xA3;
8534 j->m_DAAShadowRegs.COP_REGS.COP.IMFilterCoeff_1[5] = 0xAA;
8535 j->m_DAAShadowRegs.COP_REGS.COP.IMFilterCoeff_1[4] = 0x28;
8536 j->m_DAAShadowRegs.COP_REGS.COP.IMFilterCoeff_1[3] = 0xB3;
8537 j->m_DAAShadowRegs.COP_REGS.COP.IMFilterCoeff_1[2] = 0x82;
8538 j->m_DAAShadowRegs.COP_REGS.COP.IMFilterCoeff_1[1] = 0xD0;
8539 j->m_DAAShadowRegs.COP_REGS.COP.IMFilterCoeff_1[0] = 0x00;
8540/* Bytes for IM-filter part 2 (05): 70,96,00,09,32,6B,C0,08 */
8541 j->m_DAAShadowRegs.COP_REGS.COP.IMFilterCoeff_2[7] = 0x70;
8542 j->m_DAAShadowRegs.COP_REGS.COP.IMFilterCoeff_2[6] = 0x96;
8543 j->m_DAAShadowRegs.COP_REGS.COP.IMFilterCoeff_2[5] = 0x00;
8544 j->m_DAAShadowRegs.COP_REGS.COP.IMFilterCoeff_2[4] = 0x09;
8545 j->m_DAAShadowRegs.COP_REGS.COP.IMFilterCoeff_2[3] = 0x32;
8546 j->m_DAAShadowRegs.COP_REGS.COP.IMFilterCoeff_2[2] = 0x6B;
8547 j->m_DAAShadowRegs.COP_REGS.COP.IMFilterCoeff_2[1] = 0xC0;
8548 j->m_DAAShadowRegs.COP_REGS.COP.IMFilterCoeff_2[0] = 0x08;
8549/* Bytes for FRX-filter (08): 07,96,E2,34,32,9B,30,08 */
8550 j->m_DAAShadowRegs.COP_REGS.COP.FRXFilterCoeff[7] = 0x07;
8551 j->m_DAAShadowRegs.COP_REGS.COP.FRXFilterCoeff[6] = 0x96;
8552 j->m_DAAShadowRegs.COP_REGS.COP.FRXFilterCoeff[5] = 0xE2;
8553 j->m_DAAShadowRegs.COP_REGS.COP.FRXFilterCoeff[4] = 0x34;
8554 j->m_DAAShadowRegs.COP_REGS.COP.FRXFilterCoeff[3] = 0x32;
8555 j->m_DAAShadowRegs.COP_REGS.COP.FRXFilterCoeff[2] = 0x9B;
8556 j->m_DAAShadowRegs.COP_REGS.COP.FRXFilterCoeff[1] = 0x30;
8557 j->m_DAAShadowRegs.COP_REGS.COP.FRXFilterCoeff[0] = 0x08;
8558/* Bytes for FRR-filter (07): 0F,9A,E9,2F,22,CC,A0,08 */
8559 j->m_DAAShadowRegs.COP_REGS.COP.FRRFilterCoeff[7] = 0x0F;
8560 j->m_DAAShadowRegs.COP_REGS.COP.FRRFilterCoeff[6] = 0x9A;
8561 j->m_DAAShadowRegs.COP_REGS.COP.FRRFilterCoeff[5] = 0xE9;
8562 j->m_DAAShadowRegs.COP_REGS.COP.FRRFilterCoeff[4] = 0x2F;
8563 j->m_DAAShadowRegs.COP_REGS.COP.FRRFilterCoeff[3] = 0x22;
8564 j->m_DAAShadowRegs.COP_REGS.COP.FRRFilterCoeff[2] = 0xCC;
8565 j->m_DAAShadowRegs.COP_REGS.COP.FRRFilterCoeff[1] = 0xA0;
8566 j->m_DAAShadowRegs.COP_REGS.COP.FRRFilterCoeff[0] = 0x08;
8567/* Bytes for AX-filter (0A): CB,45,DD,CA */
8568 j->m_DAAShadowRegs.COP_REGS.COP.AXFilterCoeff[3] = 0xCB;
8569 j->m_DAAShadowRegs.COP_REGS.COP.AXFilterCoeff[2] = 0x45;
8570 j->m_DAAShadowRegs.COP_REGS.COP.AXFilterCoeff[1] = 0xDD;
8571 j->m_DAAShadowRegs.COP_REGS.COP.AXFilterCoeff[0] = 0xCA;
8572/* Bytes for AR-filter (09): 1B,67,10,D6 */
8573 j->m_DAAShadowRegs.COP_REGS.COP.ARFilterCoeff[3] = 0x1B;
8574 j->m_DAAShadowRegs.COP_REGS.COP.ARFilterCoeff[2] = 0x67;
8575 j->m_DAAShadowRegs.COP_REGS.COP.ARFilterCoeff[1] = 0x10;
8576 j->m_DAAShadowRegs.COP_REGS.COP.ARFilterCoeff[0] = 0xD6;
8577/* Bytes for TH-filter part 1 (00): 80,52,48,81,AF,80,00,98 */
8578 j->m_DAAShadowRegs.COP_REGS.COP.THFilterCoeff_1[7] = 0x80;
8579 j->m_DAAShadowRegs.COP_REGS.COP.THFilterCoeff_1[6] = 0x52;
8580 j->m_DAAShadowRegs.COP_REGS.COP.THFilterCoeff_1[5] = 0x48;
8581 j->m_DAAShadowRegs.COP_REGS.COP.THFilterCoeff_1[4] = 0x81;
8582 j->m_DAAShadowRegs.COP_REGS.COP.THFilterCoeff_1[3] = 0xAF;
8583 j->m_DAAShadowRegs.COP_REGS.COP.THFilterCoeff_1[2] = 0x80;
8584 j->m_DAAShadowRegs.COP_REGS.COP.THFilterCoeff_1[1] = 0x00;
8585 j->m_DAAShadowRegs.COP_REGS.COP.THFilterCoeff_1[0] = 0x98;
8586/* Bytes for TH-filter part 2 (01): 02,DB,52,B0,38,01,82,AC */
8587 j->m_DAAShadowRegs.COP_REGS.COP.THFilterCoeff_2[7] = 0x02;
8588 j->m_DAAShadowRegs.COP_REGS.COP.THFilterCoeff_2[6] = 0xDB;
8589 j->m_DAAShadowRegs.COP_REGS.COP.THFilterCoeff_2[5] = 0x52;
8590 j->m_DAAShadowRegs.COP_REGS.COP.THFilterCoeff_2[4] = 0xB0;
8591 j->m_DAAShadowRegs.COP_REGS.COP.THFilterCoeff_2[3] = 0x38;
8592 j->m_DAAShadowRegs.COP_REGS.COP.THFilterCoeff_2[2] = 0x01;
8593 j->m_DAAShadowRegs.COP_REGS.COP.THFilterCoeff_2[1] = 0x82;
8594 j->m_DAAShadowRegs.COP_REGS.COP.THFilterCoeff_2[0] = 0xAC;
8595/* Bytes for TH-filter part 3 (02): 00,88,4A,3E,2C,3B,24,46 */
8596 j->m_DAAShadowRegs.COP_REGS.COP.THFilterCoeff_3[7] = 0x00;
8597 j->m_DAAShadowRegs.COP_REGS.COP.THFilterCoeff_3[6] = 0x88;
8598 j->m_DAAShadowRegs.COP_REGS.COP.THFilterCoeff_3[5] = 0x4A;
8599 j->m_DAAShadowRegs.COP_REGS.COP.THFilterCoeff_3[4] = 0x3E;
8600 j->m_DAAShadowRegs.COP_REGS.COP.THFilterCoeff_3[3] = 0x2C;
8601 j->m_DAAShadowRegs.COP_REGS.COP.THFilterCoeff_3[2] = 0x3B;
8602 j->m_DAAShadowRegs.COP_REGS.COP.THFilterCoeff_3[1] = 0x24;
8603 j->m_DAAShadowRegs.COP_REGS.COP.THFilterCoeff_3[0] = 0x46;
8604/* ; idle */
8605 /* Bytes for Ringing part 1 (03):1B,3C,93,3A,22,12,A3,23 */
8606 j->m_DAAShadowRegs.COP_REGS.COP.RingerImpendance_1[7] = 0x1B;
8607 j->m_DAAShadowRegs.COP_REGS.COP.RingerImpendance_1[6] = 0x3C;
8608 j->m_DAAShadowRegs.COP_REGS.COP.RingerImpendance_1[5] = 0x93;
8609 j->m_DAAShadowRegs.COP_REGS.COP.RingerImpendance_1[4] = 0x3A;
8610 j->m_DAAShadowRegs.COP_REGS.COP.RingerImpendance_1[3] = 0x22;
8611 j->m_DAAShadowRegs.COP_REGS.COP.RingerImpendance_1[2] = 0x12;
8612 j->m_DAAShadowRegs.COP_REGS.COP.RingerImpendance_1[1] = 0xA3;
8613 j->m_DAAShadowRegs.COP_REGS.COP.RingerImpendance_1[0] = 0x23;
8614/* Bytes for Ringing part 2 (06):12,A2,A6,BA,22,7A,0A,D5 */
8615 j->m_DAAShadowRegs.COP_REGS.COP.RingerImpendance_2[7] = 0x12;
8616 j->m_DAAShadowRegs.COP_REGS.COP.RingerImpendance_2[6] = 0xA2;
8617 j->m_DAAShadowRegs.COP_REGS.COP.RingerImpendance_2[5] = 0xA6;
8618 j->m_DAAShadowRegs.COP_REGS.COP.RingerImpendance_2[4] = 0xBA;
8619 j->m_DAAShadowRegs.COP_REGS.COP.RingerImpendance_2[3] = 0x22;
8620 j->m_DAAShadowRegs.COP_REGS.COP.RingerImpendance_2[2] = 0x7A;
8621 j->m_DAAShadowRegs.COP_REGS.COP.RingerImpendance_2[1] = 0x0A;
8622 j->m_DAAShadowRegs.COP_REGS.COP.RingerImpendance_2[0] = 0xD5;
8623/* Levelmetering Ringing (0D):32,45,B5,84 ; 50Hz 20V */
8624 j->m_DAAShadowRegs.COP_REGS.COP.LevelmeteringRinging[3] = 0x32;
8625 j->m_DAAShadowRegs.COP_REGS.COP.LevelmeteringRinging[2] = 0x45;
8626 j->m_DAAShadowRegs.COP_REGS.COP.LevelmeteringRinging[1] = 0xB5;
8627 j->m_DAAShadowRegs.COP_REGS.COP.LevelmeteringRinging[0] = 0x84;
8628/* Caller ID 1st Tone (0E):CA,0E,CA,09,99,99,99,99 */
8629 j->m_DAAShadowRegs.COP_REGS.COP.CallerID1stTone[7] = 0xCA;
8630 j->m_DAAShadowRegs.COP_REGS.COP.CallerID1stTone[6] = 0x0E;
8631 j->m_DAAShadowRegs.COP_REGS.COP.CallerID1stTone[5] = 0xCA;
8632 j->m_DAAShadowRegs.COP_REGS.COP.CallerID1stTone[4] = 0x09;
8633 j->m_DAAShadowRegs.COP_REGS.COP.CallerID1stTone[3] = 0x99;
8634 j->m_DAAShadowRegs.COP_REGS.COP.CallerID1stTone[2] = 0x99;
8635 j->m_DAAShadowRegs.COP_REGS.COP.CallerID1stTone[1] = 0x99;
8636 j->m_DAAShadowRegs.COP_REGS.COP.CallerID1stTone[0] = 0x99;
8637/* Caller ID 2nd Tone (0F):FD,B5,BA,07,DA,00,00,00 */
8638 j->m_DAAShadowRegs.COP_REGS.COP.CallerID2ndTone[7] = 0xFD;
8639 j->m_DAAShadowRegs.COP_REGS.COP.CallerID2ndTone[6] = 0xB5;
8640 j->m_DAAShadowRegs.COP_REGS.COP.CallerID2ndTone[5] = 0xBA;
8641 j->m_DAAShadowRegs.COP_REGS.COP.CallerID2ndTone[4] = 0x07;
8642 j->m_DAAShadowRegs.COP_REGS.COP.CallerID2ndTone[3] = 0xDA;
8643 j->m_DAAShadowRegs.COP_REGS.COP.CallerID2ndTone[2] = 0x00;
8644 j->m_DAAShadowRegs.COP_REGS.COP.CallerID2ndTone[1] = 0x00;
8645 j->m_DAAShadowRegs.COP_REGS.COP.CallerID2ndTone[0] = 0x00;
8646/* ;CR Registers */
8647 /* Config. Reg. 0 (filters) (cr0):FF */
8648 j->m_DAAShadowRegs.SOP_REGS.SOP.cr0.reg = 0xFF;
8649/* Config. Reg. 1 (dialing) (cr1):05 */
8650 j->m_DAAShadowRegs.SOP_REGS.SOP.cr1.reg = 0x05;
8651/* Config. Reg. 2 (caller ID) (cr2):04 */
8652 j->m_DAAShadowRegs.SOP_REGS.SOP.cr2.reg = 0x04;
8653/* Config. Reg. 3 (testloops) (cr3):00 ; */
8654 j->m_DAAShadowRegs.SOP_REGS.SOP.cr3.reg = 0x00;
8655/* Config. Reg. 4 (analog gain) (cr4):02 */
8656 j->m_DAAShadowRegs.SOP_REGS.SOP.cr4.reg = 0x02;
8657 /* Config. Reg. 5 (Version) (cr5):02 */
8658 /* Config. Reg. 6 (Reserved) (cr6):00 */
8659 /* Config. Reg. 7 (Reserved) (cr7):00 */
8660 /* ;xr Registers */
8661 /* Ext. Reg. 0 (Interrupt Reg.) (xr0):02 */
8662
8663 j->m_DAAShadowRegs.XOP_xr0_W.reg = 0x02; /* SO_1 set to '1' because it is inverted. */
8664 /* Ext. Reg. 1 (Interrupt enable) (xr1):1C */
8665
8666 j->m_DAAShadowRegs.XOP_REGS.XOP.xr1.reg = 0x1C; /* RING, Caller ID, VDD_OK */
8667 /* Ext. Reg. 2 (Cadence Time Out) (xr2):7D */
8668
8669 j->m_DAAShadowRegs.XOP_REGS.XOP.xr2.reg = 0x7D;
8670/* Ext. Reg. 3 (DC Char) (xr3):2B ; */
8671 j->m_DAAShadowRegs.XOP_REGS.XOP.xr3.reg = 0x2B;
8672/* Ext. Reg. 4 (Cadence) (xr4):00 */
8673 j->m_DAAShadowRegs.XOP_REGS.XOP.xr4.reg = 0x00;
8674/* Ext. Reg. 5 (Ring timer) (xr5):22 */
8675 j->m_DAAShadowRegs.XOP_REGS.XOP.xr5.reg = 0x22;
8676/* Ext. Reg. 6 (Power State) (xr6):00 */
8677 j->m_DAAShadowRegs.XOP_xr6_W.reg = 0x00;
8678/* Ext. Reg. 7 (Vdd) (xr7):40 */
8679 j->m_DAAShadowRegs.XOP_REGS.XOP.xr7.reg = 0x40; /* 0x40 ??? Should it be 0x00? */
8680
8681 /* DTMF Tone 1 (0B): 11,B3,5A,2C ; 697 Hz */
8682 /* 12,33,5A,C3 ; 770 Hz */
8683 /* 13,3C,5B,32 ; 852 Hz */
8684 /* 1D,1B,5C,CC ; 941 Hz */
8685 j->m_DAAShadowRegs.COP_REGS.COP.Tone1Coeff[3] = 0x11;
8686 j->m_DAAShadowRegs.COP_REGS.COP.Tone1Coeff[2] = 0xB3;
8687 j->m_DAAShadowRegs.COP_REGS.COP.Tone1Coeff[1] = 0x5A;
8688 j->m_DAAShadowRegs.COP_REGS.COP.Tone1Coeff[0] = 0x2C;
8689
8690 /* DTMF Tone 2 (0C): 32,32,52,B3 ; 1209 Hz */
8691 /* EC,1D,52,22 ; 1336 Hz */
8692 /* AA,AC,51,D2 ; 1477 Hz */
8693 /* 9B,3B,51,25 ; 1633 Hz */
8694 j->m_DAAShadowRegs.COP_REGS.COP.Tone2Coeff[3] = 0x32;
8695 j->m_DAAShadowRegs.COP_REGS.COP.Tone2Coeff[2] = 0x32;
8696 j->m_DAAShadowRegs.COP_REGS.COP.Tone2Coeff[1] = 0x52;
8697 j->m_DAAShadowRegs.COP_REGS.COP.Tone2Coeff[0] = 0xB3;
8698}
8699
8700static void DAA_Coeff_Japan(IXJ *j)
8701{
8702 int i;
8703
8704 j->daa_country = DAA_JAPAN;
8705 /*----------------------------------------------- */
8706 /* CAO */
8707 for (i = 0; i < ALISDAA_CALLERID_SIZE; i++) {
8708 j->m_DAAShadowRegs.CAO_REGS.CAO.CallerID[i] = 0;
8709 }
8710
8711/* Bytes for IM-filter part 1 (04): 06,BD,E2,2D,BA,F9,A0,00 */
8712 j->m_DAAShadowRegs.COP_REGS.COP.IMFilterCoeff_1[7] = 0x06;
8713 j->m_DAAShadowRegs.COP_REGS.COP.IMFilterCoeff_1[6] = 0xBD;
8714 j->m_DAAShadowRegs.COP_REGS.COP.IMFilterCoeff_1[5] = 0xE2;
8715 j->m_DAAShadowRegs.COP_REGS.COP.IMFilterCoeff_1[4] = 0x2D;
8716 j->m_DAAShadowRegs.COP_REGS.COP.IMFilterCoeff_1[3] = 0xBA;
8717 j->m_DAAShadowRegs.COP_REGS.COP.IMFilterCoeff_1[2] = 0xF9;
8718 j->m_DAAShadowRegs.COP_REGS.COP.IMFilterCoeff_1[1] = 0xA0;
8719 j->m_DAAShadowRegs.COP_REGS.COP.IMFilterCoeff_1[0] = 0x00;
8720/* Bytes for IM-filter part 2 (05): 6F,F7,00,0E,34,33,E0,08 */
8721 j->m_DAAShadowRegs.COP_REGS.COP.IMFilterCoeff_2[7] = 0x6F;
8722 j->m_DAAShadowRegs.COP_REGS.COP.IMFilterCoeff_2[6] = 0xF7;
8723 j->m_DAAShadowRegs.COP_REGS.COP.IMFilterCoeff_2[5] = 0x00;
8724 j->m_DAAShadowRegs.COP_REGS.COP.IMFilterCoeff_2[4] = 0x0E;
8725 j->m_DAAShadowRegs.COP_REGS.COP.IMFilterCoeff_2[3] = 0x34;
8726 j->m_DAAShadowRegs.COP_REGS.COP.IMFilterCoeff_2[2] = 0x33;
8727 j->m_DAAShadowRegs.COP_REGS.COP.IMFilterCoeff_2[1] = 0xE0;
8728 j->m_DAAShadowRegs.COP_REGS.COP.IMFilterCoeff_2[0] = 0x08;
8729/* Bytes for FRX-filter (08): 02,8F,68,77,9C,58,F0,08 */
8730 j->m_DAAShadowRegs.COP_REGS.COP.FRXFilterCoeff[7] = 0x02;
8731 j->m_DAAShadowRegs.COP_REGS.COP.FRXFilterCoeff[6] = 0x8F;
8732 j->m_DAAShadowRegs.COP_REGS.COP.FRXFilterCoeff[5] = 0x68;
8733 j->m_DAAShadowRegs.COP_REGS.COP.FRXFilterCoeff[4] = 0x77;
8734 j->m_DAAShadowRegs.COP_REGS.COP.FRXFilterCoeff[3] = 0x9C;
8735 j->m_DAAShadowRegs.COP_REGS.COP.FRXFilterCoeff[2] = 0x58;
8736 j->m_DAAShadowRegs.COP_REGS.COP.FRXFilterCoeff[1] = 0xF0;
8737 j->m_DAAShadowRegs.COP_REGS.COP.FRXFilterCoeff[0] = 0x08;
8738/* Bytes for FRR-filter (07): 03,8F,38,73,87,EA,20,08 */
8739 j->m_DAAShadowRegs.COP_REGS.COP.FRRFilterCoeff[7] = 0x03;
8740 j->m_DAAShadowRegs.COP_REGS.COP.FRRFilterCoeff[6] = 0x8F;
8741 j->m_DAAShadowRegs.COP_REGS.COP.FRRFilterCoeff[5] = 0x38;
8742 j->m_DAAShadowRegs.COP_REGS.COP.FRRFilterCoeff[4] = 0x73;
8743 j->m_DAAShadowRegs.COP_REGS.COP.FRRFilterCoeff[3] = 0x87;
8744 j->m_DAAShadowRegs.COP_REGS.COP.FRRFilterCoeff[2] = 0xEA;
8745 j->m_DAAShadowRegs.COP_REGS.COP.FRRFilterCoeff[1] = 0x20;
8746 j->m_DAAShadowRegs.COP_REGS.COP.FRRFilterCoeff[0] = 0x08;
8747/* Bytes for AX-filter (0A): 51,C5,DD,CA */
8748 j->m_DAAShadowRegs.COP_REGS.COP.AXFilterCoeff[3] = 0x51;
8749 j->m_DAAShadowRegs.COP_REGS.COP.AXFilterCoeff[2] = 0xC5;
8750 j->m_DAAShadowRegs.COP_REGS.COP.AXFilterCoeff[1] = 0xDD;
8751 j->m_DAAShadowRegs.COP_REGS.COP.AXFilterCoeff[0] = 0xCA;
8752/* Bytes for AR-filter (09): 25,A7,10,D6 */
8753 j->m_DAAShadowRegs.COP_REGS.COP.ARFilterCoeff[3] = 0x25;
8754 j->m_DAAShadowRegs.COP_REGS.COP.ARFilterCoeff[2] = 0xA7;
8755 j->m_DAAShadowRegs.COP_REGS.COP.ARFilterCoeff[1] = 0x10;
8756 j->m_DAAShadowRegs.COP_REGS.COP.ARFilterCoeff[0] = 0xD6;
8757/* Bytes for TH-filter part 1 (00): 00,42,48,81,AE,80,00,98 */
8758 j->m_DAAShadowRegs.COP_REGS.COP.THFilterCoeff_1[7] = 0x00;
8759 j->m_DAAShadowRegs.COP_REGS.COP.THFilterCoeff_1[6] = 0x42;
8760 j->m_DAAShadowRegs.COP_REGS.COP.THFilterCoeff_1[5] = 0x48;
8761 j->m_DAAShadowRegs.COP_REGS.COP.THFilterCoeff_1[4] = 0x81;
8762 j->m_DAAShadowRegs.COP_REGS.COP.THFilterCoeff_1[3] = 0xAE;
8763 j->m_DAAShadowRegs.COP_REGS.COP.THFilterCoeff_1[2] = 0x80;
8764 j->m_DAAShadowRegs.COP_REGS.COP.THFilterCoeff_1[1] = 0x00;
8765 j->m_DAAShadowRegs.COP_REGS.COP.THFilterCoeff_1[0] = 0x98;
8766/* Bytes for TH-filter part 2 (01): 02,AB,2A,20,99,5B,89,28 */
8767 j->m_DAAShadowRegs.COP_REGS.COP.THFilterCoeff_2[7] = 0x02;
8768 j->m_DAAShadowRegs.COP_REGS.COP.THFilterCoeff_2[6] = 0xAB;
8769 j->m_DAAShadowRegs.COP_REGS.COP.THFilterCoeff_2[5] = 0x2A;
8770 j->m_DAAShadowRegs.COP_REGS.COP.THFilterCoeff_2[4] = 0x20;
8771 j->m_DAAShadowRegs.COP_REGS.COP.THFilterCoeff_2[3] = 0x99;
8772 j->m_DAAShadowRegs.COP_REGS.COP.THFilterCoeff_2[2] = 0x5B;
8773 j->m_DAAShadowRegs.COP_REGS.COP.THFilterCoeff_2[1] = 0x89;
8774 j->m_DAAShadowRegs.COP_REGS.COP.THFilterCoeff_2[0] = 0x28;
8775/* Bytes for TH-filter part 3 (02): 00,88,DA,25,34,C5,4C,BA */
8776 j->m_DAAShadowRegs.COP_REGS.COP.THFilterCoeff_3[7] = 0x00;
8777 j->m_DAAShadowRegs.COP_REGS.COP.THFilterCoeff_3[6] = 0x88;
8778 j->m_DAAShadowRegs.COP_REGS.COP.THFilterCoeff_3[5] = 0xDA;
8779 j->m_DAAShadowRegs.COP_REGS.COP.THFilterCoeff_3[4] = 0x25;
8780 j->m_DAAShadowRegs.COP_REGS.COP.THFilterCoeff_3[3] = 0x34;
8781 j->m_DAAShadowRegs.COP_REGS.COP.THFilterCoeff_3[2] = 0xC5;
8782 j->m_DAAShadowRegs.COP_REGS.COP.THFilterCoeff_3[1] = 0x4C;
8783 j->m_DAAShadowRegs.COP_REGS.COP.THFilterCoeff_3[0] = 0xBA;
8784/* ; idle */
8785 /* Bytes for Ringing part 1 (03):1B,3C,93,3A,22,12,A3,23 */
8786 j->m_DAAShadowRegs.COP_REGS.COP.RingerImpendance_1[7] = 0x1B;
8787 j->m_DAAShadowRegs.COP_REGS.COP.RingerImpendance_1[6] = 0x3C;
8788 j->m_DAAShadowRegs.COP_REGS.COP.RingerImpendance_1[5] = 0x93;
8789 j->m_DAAShadowRegs.COP_REGS.COP.RingerImpendance_1[4] = 0x3A;
8790 j->m_DAAShadowRegs.COP_REGS.COP.RingerImpendance_1[3] = 0x22;
8791 j->m_DAAShadowRegs.COP_REGS.COP.RingerImpendance_1[2] = 0x12;
8792 j->m_DAAShadowRegs.COP_REGS.COP.RingerImpendance_1[1] = 0xA3;
8793 j->m_DAAShadowRegs.COP_REGS.COP.RingerImpendance_1[0] = 0x23;
8794/* Bytes for Ringing part 2 (06):12,A2,A6,BA,22,7A,0A,D5 */
8795 j->m_DAAShadowRegs.COP_REGS.COP.RingerImpendance_2[7] = 0x12;
8796 j->m_DAAShadowRegs.COP_REGS.COP.RingerImpendance_2[6] = 0xA2;
8797 j->m_DAAShadowRegs.COP_REGS.COP.RingerImpendance_2[5] = 0xA6;
8798 j->m_DAAShadowRegs.COP_REGS.COP.RingerImpendance_2[4] = 0xBA;
8799 j->m_DAAShadowRegs.COP_REGS.COP.RingerImpendance_2[3] = 0x22;
8800 j->m_DAAShadowRegs.COP_REGS.COP.RingerImpendance_2[2] = 0x7A;
8801 j->m_DAAShadowRegs.COP_REGS.COP.RingerImpendance_2[1] = 0x0A;
8802 j->m_DAAShadowRegs.COP_REGS.COP.RingerImpendance_2[0] = 0xD5;
8803/* Levelmetering Ringing (0D):AA,35,0F,8E ; 25Hz 30V ????????? */
8804 j->m_DAAShadowRegs.COP_REGS.COP.LevelmeteringRinging[3] = 0xAA;
8805 j->m_DAAShadowRegs.COP_REGS.COP.LevelmeteringRinging[2] = 0x35;
8806 j->m_DAAShadowRegs.COP_REGS.COP.LevelmeteringRinging[1] = 0x0F;
8807 j->m_DAAShadowRegs.COP_REGS.COP.LevelmeteringRinging[0] = 0x8E;
8808/* Caller ID 1st Tone (0E):CA,0E,CA,09,99,99,99,99 */
8809 j->m_DAAShadowRegs.COP_REGS.COP.CallerID1stTone[7] = 0xCA;
8810 j->m_DAAShadowRegs.COP_REGS.COP.CallerID1stTone[6] = 0x0E;
8811 j->m_DAAShadowRegs.COP_REGS.COP.CallerID1stTone[5] = 0xCA;
8812 j->m_DAAShadowRegs.COP_REGS.COP.CallerID1stTone[4] = 0x09;
8813 j->m_DAAShadowRegs.COP_REGS.COP.CallerID1stTone[3] = 0x99;
8814 j->m_DAAShadowRegs.COP_REGS.COP.CallerID1stTone[2] = 0x99;
8815 j->m_DAAShadowRegs.COP_REGS.COP.CallerID1stTone[1] = 0x99;
8816 j->m_DAAShadowRegs.COP_REGS.COP.CallerID1stTone[0] = 0x99;
8817/* Caller ID 2nd Tone (0F):FD,B5,BA,07,DA,00,00,00 */
8818 j->m_DAAShadowRegs.COP_REGS.COP.CallerID2ndTone[7] = 0xFD;
8819 j->m_DAAShadowRegs.COP_REGS.COP.CallerID2ndTone[6] = 0xB5;
8820 j->m_DAAShadowRegs.COP_REGS.COP.CallerID2ndTone[5] = 0xBA;
8821 j->m_DAAShadowRegs.COP_REGS.COP.CallerID2ndTone[4] = 0x07;
8822 j->m_DAAShadowRegs.COP_REGS.COP.CallerID2ndTone[3] = 0xDA;
8823 j->m_DAAShadowRegs.COP_REGS.COP.CallerID2ndTone[2] = 0x00;
8824 j->m_DAAShadowRegs.COP_REGS.COP.CallerID2ndTone[1] = 0x00;
8825 j->m_DAAShadowRegs.COP_REGS.COP.CallerID2ndTone[0] = 0x00;
8826/* ;CR Registers */
8827 /* Config. Reg. 0 (filters) (cr0):FF */
8828 j->m_DAAShadowRegs.SOP_REGS.SOP.cr0.reg = 0xFF;
8829/* Config. Reg. 1 (dialing) (cr1):05 */
8830 j->m_DAAShadowRegs.SOP_REGS.SOP.cr1.reg = 0x05;
8831/* Config. Reg. 2 (caller ID) (cr2):04 */
8832 j->m_DAAShadowRegs.SOP_REGS.SOP.cr2.reg = 0x04;
8833/* Config. Reg. 3 (testloops) (cr3):00 ; */
8834 j->m_DAAShadowRegs.SOP_REGS.SOP.cr3.reg = 0x00;
8835/* Config. Reg. 4 (analog gain) (cr4):02 */
8836 j->m_DAAShadowRegs.SOP_REGS.SOP.cr4.reg = 0x02;
8837 /* Config. Reg. 5 (Version) (cr5):02 */
8838 /* Config. Reg. 6 (Reserved) (cr6):00 */
8839 /* Config. Reg. 7 (Reserved) (cr7):00 */
8840 /* ;xr Registers */
8841 /* Ext. Reg. 0 (Interrupt Reg.) (xr0):02 */
8842
8843 j->m_DAAShadowRegs.XOP_xr0_W.reg = 0x02; /* SO_1 set to '1' because it is inverted. */
8844 /* Ext. Reg. 1 (Interrupt enable) (xr1):1C */
8845
8846 j->m_DAAShadowRegs.XOP_REGS.XOP.xr1.reg = 0x1C; /* RING, Caller ID, VDD_OK */
8847 /* Ext. Reg. 2 (Cadence Time Out) (xr2):7D */
8848
8849 j->m_DAAShadowRegs.XOP_REGS.XOP.xr2.reg = 0x7D;
8850/* Ext. Reg. 3 (DC Char) (xr3):22 ; */
8851 j->m_DAAShadowRegs.XOP_REGS.XOP.xr3.reg = 0x22;
8852/* Ext. Reg. 4 (Cadence) (xr4):00 */
8853 j->m_DAAShadowRegs.XOP_REGS.XOP.xr4.reg = 0x00;
8854/* Ext. Reg. 5 (Ring timer) (xr5):22 */
8855 j->m_DAAShadowRegs.XOP_REGS.XOP.xr5.reg = 0x22;
8856/* Ext. Reg. 6 (Power State) (xr6):00 */
8857 j->m_DAAShadowRegs.XOP_xr6_W.reg = 0x00;
8858/* Ext. Reg. 7 (Vdd) (xr7):40 */
8859 j->m_DAAShadowRegs.XOP_REGS.XOP.xr7.reg = 0x40; /* 0x40 ??? Should it be 0x00? */
8860 /* DTMF Tone 1 (0B): 11,B3,5A,2C ; 697 Hz */
8861 /* 12,33,5A,C3 ; 770 Hz */
8862 /* 13,3C,5B,32 ; 852 Hz */
8863 /* 1D,1B,5C,CC ; 941 Hz */
8864
8865 j->m_DAAShadowRegs.COP_REGS.COP.Tone1Coeff[3] = 0x11;
8866 j->m_DAAShadowRegs.COP_REGS.COP.Tone1Coeff[2] = 0xB3;
8867 j->m_DAAShadowRegs.COP_REGS.COP.Tone1Coeff[1] = 0x5A;
8868 j->m_DAAShadowRegs.COP_REGS.COP.Tone1Coeff[0] = 0x2C;
8869/* DTMF Tone 2 (0C): 32,32,52,B3 ; 1209 Hz */
8870 /* EC,1D,52,22 ; 1336 Hz */
8871 /* AA,AC,51,D2 ; 1477 Hz */
8872 /* 9B,3B,51,25 ; 1633 Hz */
8873 j->m_DAAShadowRegs.COP_REGS.COP.Tone2Coeff[3] = 0x32;
8874 j->m_DAAShadowRegs.COP_REGS.COP.Tone2Coeff[2] = 0x32;
8875 j->m_DAAShadowRegs.COP_REGS.COP.Tone2Coeff[1] = 0x52;
8876 j->m_DAAShadowRegs.COP_REGS.COP.Tone2Coeff[0] = 0xB3;
8877}
8878
8879static s16 tone_table[][19] =
8880{
8881 { /* f20_50[] 11 */
8882 32538, /* A1 = 1.985962 */
8883 -32325, /* A2 = -0.986511 */
8884 -343, /* B2 = -0.010493 */
8885 0, /* B1 = 0 */
8886 343, /* B0 = 0.010493 */
8887 32619, /* A1 = 1.990906 */
8888 -32520, /* A2 = -0.992462 */
8889 19179, /* B2 = 0.585327 */
8890 -19178, /* B1 = -1.170593 */
8891 19179, /* B0 = 0.585327 */
8892 32723, /* A1 = 1.997314 */
8893 -32686, /* A2 = -0.997528 */
8894 9973, /* B2 = 0.304352 */
8895 -9955, /* B1 = -0.607605 */
8896 9973, /* B0 = 0.304352 */
8897 7, /* Internal filter scaling */
8898 159, /* Minimum in-band energy threshold */
8899 21, /* 21/32 in-band to broad-band ratio */
8900 0x0FF5 /* shift-mask 0x0FF (look at 16 half-frames) bit count = 5 */
8901 },
8902 { /* f133_200[] 12 */
8903 32072, /* A1 = 1.95752 */
8904 -31896, /* A2 = -0.973419 */
8905 -435, /* B2 = -0.013294 */
8906 0, /* B1 = 0 */
8907 435, /* B0 = 0.013294 */
8908 32188, /* A1 = 1.9646 */
8909 -32400, /* A2 = -0.98877 */
8910 15139, /* B2 = 0.462036 */
8911 -14882, /* B1 = -0.908356 */
8912 15139, /* B0 = 0.462036 */
8913 32473, /* A1 = 1.981995 */
8914 -32524, /* A2 = -0.992584 */
8915 23200, /* B2 = 0.708008 */
8916 -23113, /* B1 = -1.410706 */
8917 23200, /* B0 = 0.708008 */
8918 7, /* Internal filter scaling */
8919 159, /* Minimum in-band energy threshold */
8920 21, /* 21/32 in-band to broad-band ratio */
8921 0x0FF5 /* shift-mask 0x0FF (look at 16 half-frames) bit count = 5 */
8922 },
8923 { /* f300 13 */
8924 31769, /* A1 = -1.939026 */
8925 -32584, /* A2 = 0.994385 */
8926 -475, /* B2 = -0.014522 */
8927 0, /* B1 = 0.000000 */
8928 475, /* B0 = 0.014522 */
8929 31789, /* A1 = -1.940247 */
8930 -32679, /* A2 = 0.997284 */
8931 17280, /* B2 = 0.527344 */
8932 -16865, /* B1 = -1.029358 */
8933 17280, /* B0 = 0.527344 */
8934 31841, /* A1 = -1.943481 */
8935 -32681, /* A2 = 0.997345 */
8936 543, /* B2 = 0.016579 */
8937 -525, /* B1 = -0.032097 */
8938 543, /* B0 = 0.016579 */
8939 5, /* Internal filter scaling */
8940 159, /* Minimum in-band energy threshold */
8941 21, /* 21/32 in-band to broad-band ratio */
8942 0x0FF5 /* shift-mask 0x0FF (look at 16 half-frames) bit count = 5 */
8943 },
8944 { /* f300_420[] 14 */
8945 30750, /* A1 = 1.876892 */
8946 -31212, /* A2 = -0.952515 */
8947 -804, /* B2 = -0.024541 */
8948 0, /* B1 = 0 */
8949 804, /* B0 = 0.024541 */
8950 30686, /* A1 = 1.872925 */
8951 -32145, /* A2 = -0.980988 */
8952 14747, /* B2 = 0.450043 */
8953 -13703, /* B1 = -0.836395 */
8954 14747, /* B0 = 0.450043 */
8955 31651, /* A1 = 1.931824 */
8956 -32321, /* A2 = -0.986389 */
8957 24425, /* B2 = 0.745422 */
8958 -23914, /* B1 = -1.459595 */
8959 24427, /* B0 = 0.745483 */
8960 7, /* Internal filter scaling */
8961 159, /* Minimum in-band energy threshold */
8962 21, /* 21/32 in-band to broad-band ratio */
8963 0x0FF5 /* shift-mask 0x0FF (look at 16 half-frames) bit count = 5 */
8964 },
8965 { /* f330 15 */
8966 31613, /* A1 = -1.929565 */
8967 -32646, /* A2 = 0.996277 */
8968 -185, /* B2 = -0.005657 */
8969 0, /* B1 = 0.000000 */
8970 185, /* B0 = 0.005657 */
8971 31620, /* A1 = -1.929932 */
8972 -32713, /* A2 = 0.998352 */
8973 19253, /* B2 = 0.587585 */
8974 -18566, /* B1 = -1.133179 */
8975 19253, /* B0 = 0.587585 */
8976 31674, /* A1 = -1.933228 */
8977 -32715, /* A2 = 0.998413 */
8978 2575, /* B2 = 0.078590 */
8979 -2495, /* B1 = -0.152283 */
8980 2575, /* B0 = 0.078590 */
8981 5, /* Internal filter scaling */
8982 159, /* Minimum in-band energy threshold */
8983 21, /* 21/32 in-band to broad-band ratio */
8984 0x0FF5 /* shift-mask 0x0FF (look at 16 half-frames) bit count = 5 */
8985 },
8986 { /* f300_425[] 16 */
8987 30741, /* A1 = 1.876282 */
8988 -31475, /* A2 = -0.960541 */
8989 -703, /* B2 = -0.021484 */
8990 0, /* B1 = 0 */
8991 703, /* B0 = 0.021484 */
8992 30688, /* A1 = 1.873047 */
8993 -32248, /* A2 = -0.984161 */
8994 14542, /* B2 = 0.443787 */
8995 -13523, /* B1 = -0.825439 */
8996 14542, /* B0 = 0.443817 */
8997 31494, /* A1 = 1.922302 */
8998 -32366, /* A2 = -0.987762 */
8999 21577, /* B2 = 0.658508 */
9000 -21013, /* B1 = -1.282532 */
9001 21577, /* B0 = 0.658508 */
9002 7, /* Internal filter scaling */
9003 159, /* Minimum in-band energy threshold */
9004 21, /* 21/32 in-band to broad-band ratio */
9005 0x0FF5 /* shift-mask 0x0FF (look at 16 half-frames) bit count = 5 */
9006 },
9007 { /* f330_440[] 17 */
9008 30627, /* A1 = 1.869324 */
9009 -31338, /* A2 = -0.95636 */
9010 -843, /* B2 = -0.025749 */
9011 0, /* B1 = 0 */
9012 843, /* B0 = 0.025749 */
9013 30550, /* A1 = 1.864685 */
9014 -32221, /* A2 = -0.983337 */
9015 13594, /* B2 = 0.414886 */
9016 -12589, /* B1 = -0.768402 */
9017 13594, /* B0 = 0.414886 */
9018 31488, /* A1 = 1.921936 */
9019 -32358, /* A2 = -0.987518 */
9020 24684, /* B2 = 0.753296 */
9021 -24029, /* B1 = -1.466614 */
9022 24684, /* B0 = 0.753296 */
9023 7, /* Internal filter scaling */
9024 159, /* Minimum in-band energy threshold */
9025 21, /* 21/32 in-band to broad-band ratio */
9026 0x0FF5 /* shift-mask 0x0FF (look at 16 half-frames) bit count = 5 */
9027 },
9028 { /* f340 18 */
9029 31546, /* A1 = -1.925476 */
9030 -32646, /* A2 = 0.996277 */
9031 -445, /* B2 = -0.013588 */
9032 0, /* B1 = 0.000000 */
9033 445, /* B0 = 0.013588 */
9034 31551, /* A1 = -1.925781 */
9035 -32713, /* A2 = 0.998352 */
9036 23884, /* B2 = 0.728882 */
9037 -22979, /* B1 = -1.402527 */
9038 23884, /* B0 = 0.728882 */
9039 31606, /* A1 = -1.929138 */
9040 -32715, /* A2 = 0.998413 */
9041 863, /* B2 = 0.026367 */
9042 -835, /* B1 = -0.050985 */
9043 863, /* B0 = 0.026367 */
9044 5, /* Internal filter scaling */
9045 159, /* Minimum in-band energy threshold */
9046 21, /* 21/32 in-band to broad-band ratio */
9047 0x0FF5 /* shift-mask 0x0FF (look at 16 half-frames) bit count = 5 */
9048 },
9049 { /* f350_400[] 19 */
9050 31006, /* A1 = 1.892517 */
9051 -32029, /* A2 = -0.977448 */
9052 -461, /* B2 = -0.014096 */
9053 0, /* B1 = 0 */
9054 461, /* B0 = 0.014096 */
9055 30999, /* A1 = 1.892029 */
9056 -32487, /* A2 = -0.991455 */
9057 11325, /* B2 = 0.345612 */
9058 -10682, /* B1 = -0.651978 */
9059 11325, /* B0 = 0.345612 */
9060 31441, /* A1 = 1.919067 */
9061 -32526, /* A2 = -0.992615 */
9062 24324, /* B2 = 0.74231 */
9063 -23535, /* B1 = -1.436523 */
9064 24324, /* B0 = 0.74231 */
9065 7, /* Internal filter scaling */
9066 159, /* Minimum in-band energy threshold */
9067 21, /* 21/32 in-band to broad-band ratio */
9068 0x0FF5 /* shift-mask 0x0FF (look at 16 half-frames) bit count = 5 */
9069 },
9070 { /* f350_440[] */
9071 30634, /* A1 = 1.869751 */
9072 -31533, /* A2 = -0.962341 */
9073 -680, /* B2 = -0.020782 */
9074 0, /* B1 = 0 */
9075 680, /* B0 = 0.020782 */
9076 30571, /* A1 = 1.865906 */
9077 -32277, /* A2 = -0.985016 */
9078 12894, /* B2 = 0.393524 */
9079 -11945, /* B1 = -0.729065 */
9080 12894, /* B0 = 0.393524 */
9081 31367, /* A1 = 1.91449 */
9082 -32379, /* A2 = -0.988129 */
9083 23820, /* B2 = 0.726929 */
9084 -23104, /* B1 = -1.410217 */
9085 23820, /* B0 = 0.726929 */
9086 7, /* Internal filter scaling */
9087 159, /* Minimum in-band energy threshold */
9088 21, /* 21/32 in-band to broad-band ratio */
9089 0x0FF5 /* shift-mask 0x0FF (look at 16 half-frames) bit count = 5 */
9090 },
9091 { /* f350_450[] */
9092 30552, /* A1 = 1.864807 */
9093 -31434, /* A2 = -0.95929 */
9094 -690, /* B2 = -0.021066 */
9095 0, /* B1 = 0 */
9096 690, /* B0 = 0.021066 */
9097 30472, /* A1 = 1.859924 */
9098 -32248, /* A2 = -0.984161 */
9099 13385, /* B2 = 0.408478 */
9100 -12357, /* B1 = -0.754242 */
9101 13385, /* B0 = 0.408478 */
9102 31358, /* A1 = 1.914001 */
9103 -32366, /* A2 = -0.987732 */
9104 26488, /* B2 = 0.80835 */
9105 -25692, /* B1 = -1.568176 */
9106 26490, /* B0 = 0.808411 */
9107 7, /* Internal filter scaling */
9108 159, /* Minimum in-band energy threshold */
9109 21, /* 21/32 in-band to broad-band ratio */
9110 0x0FF5 /* shift-mask 0x0FF (look at 16 half-frames) bit count = 5 */
9111 },
9112 { /* f360 */
9113 31397, /* A1 = -1.916321 */
9114 -32623, /* A2 = 0.995605 */
9115 -117, /* B2 = -0.003598 */
9116 0, /* B1 = 0.000000 */
9117 117, /* B0 = 0.003598 */
9118 31403, /* A1 = -1.916687 */
9119 -32700, /* A2 = 0.997925 */
9120 3388, /* B2 = 0.103401 */
9121 -3240, /* B1 = -0.197784 */
9122 3388, /* B0 = 0.103401 */
9123 31463, /* A1 = -1.920410 */
9124 -32702, /* A2 = 0.997986 */
9125 13346, /* B2 = 0.407288 */
9126 -12863, /* B1 = -0.785126 */
9127 13346, /* B0 = 0.407288 */
9128 5, /* Internal filter scaling */
9129 159, /* Minimum in-band energy threshold */
9130 21, /* 21/32 in-band to broad-band ratio */
9131 0x0FF5 /* shift-mask 0x0FF (look at 16 half-frames) bit count = 5 */
9132 },
9133 { /* f380_420[] */
9134 30831, /* A1 = 1.881775 */
9135 -32064, /* A2 = -0.978546 */
9136 -367, /* B2 = -0.01122 */
9137 0, /* B1 = 0 */
9138 367, /* B0 = 0.01122 */
9139 30813, /* A1 = 1.880737 */
9140 -32456, /* A2 = -0.990509 */
9141 11068, /* B2 = 0.337769 */
9142 -10338, /* B1 = -0.631042 */
9143 11068, /* B0 = 0.337769 */
9144 31214, /* A1 = 1.905212 */
9145 -32491, /* A2 = -0.991577 */
9146 16374, /* B2 = 0.499695 */
9147 -15781, /* B1 = -0.963196 */
9148 16374, /* B0 = 0.499695 */
9149 7, /* Internal filter scaling */
9150 159, /* Minimum in-band energy threshold */
9151 21, /* 21/32 in-band to broad-band ratio */
9152 0x0FF5 /* shift-mask 0x0FF (look at 16 half-frames) bit count = 5 */
9153 },
9154 { /* f392 */
9155 31152, /* A1 = -1.901428 */
9156 -32613, /* A2 = 0.995300 */
9157 -314, /* B2 = -0.009605 */
9158 0, /* B1 = 0.000000 */
9159 314, /* B0 = 0.009605 */
9160 31156, /* A1 = -1.901672 */
9161 -32694, /* A2 = 0.997742 */
9162 28847, /* B2 = 0.880371 */
9163 -2734, /* B1 = -0.166901 */
9164 28847, /* B0 = 0.880371 */
9165 31225, /* A1 = -1.905823 */
9166 -32696, /* A2 = 0.997803 */
9167 462, /* B2 = 0.014108 */
9168 -442, /* B1 = -0.027019 */
9169 462, /* B0 = 0.014108 */
9170 5, /* Internal filter scaling */
9171 159, /* Minimum in-band energy threshold */
9172 21, /* 21/32 in-band to broad-band ratio */
9173 0x0FF5 /* shift-mask 0x0FF (look at 16 half-frames) bit count = 5 */
9174 },
9175 { /* f400_425[] */
9176 30836, /* A1 = 1.882141 */
9177 -32296, /* A2 = -0.985596 */
9178 -324, /* B2 = -0.009903 */
9179 0, /* B1 = 0 */
9180 324, /* B0 = 0.009903 */
9181 30825, /* A1 = 1.881409 */
9182 -32570, /* A2 = -0.993958 */
9183 16847, /* B2 = 0.51416 */
9184 -15792, /* B1 = -0.963898 */
9185 16847, /* B0 = 0.51416 */
9186 31106, /* A1 = 1.89856 */
9187 -32584, /* A2 = -0.994415 */
9188 9579, /* B2 = 0.292328 */
9189 -9164, /* B1 = -0.559357 */
9190 9579, /* B0 = 0.292328 */
9191 7, /* Internal filter scaling */
9192 159, /* Minimum in-band energy threshold */
9193 21, /* 21/32 in-band to broad-band ratio */
9194 0x0FF5 /* shift-mask 0x0FF (look at 16 half-frames) bit count = 5 */
9195 },
9196 { /* f400_440[] */
9197 30702, /* A1 = 1.873962 */
9198 -32134, /* A2 = -0.980682 */
9199 -517, /* B2 = -0.015793 */
9200 0, /* B1 = 0 */
9201 517, /* B0 = 0.015793 */
9202 30676, /* A1 = 1.872375 */
9203 -32520, /* A2 = -0.992462 */
9204 8144, /* B2 = 0.24855 */
9205 -7596, /* B1 = -0.463684 */
9206 8144, /* B0 = 0.24855 */
9207 31084, /* A1 = 1.897217 */
9208 -32547, /* A2 = -0.993256 */
9209 22713, /* B2 = 0.693176 */
9210 -21734, /* B1 = -1.326599 */
9211 22713, /* B0 = 0.693176 */
9212 7, /* Internal filter scaling */
9213 159, /* Minimum in-band energy threshold */
9214 21, /* 21/32 in-band to broad-band ratio */
9215 0x0FF5 /* shift-mask 0x0FF (look at 16 half-frames) bit count = 5 */
9216 },
9217 { /* f400_450[] */
9218 30613, /* A1 = 1.86853 */
9219 -32031, /* A2 = -0.977509 */
9220 -618, /* B2 = -0.018866 */
9221 0, /* B1 = 0 */
9222 618, /* B0 = 0.018866 */
9223 30577, /* A1 = 1.866272 */
9224 -32491, /* A2 = -0.991577 */
9225 9612, /* B2 = 0.293335 */
9226 -8935, /* B1 = -0.54541 */
9227 9612, /* B0 = 0.293335 */
9228 31071, /* A1 = 1.896484 */
9229 -32524, /* A2 = -0.992584 */
9230 21596, /* B2 = 0.659058 */
9231 -20667, /* B1 = -1.261414 */
9232 21596, /* B0 = 0.659058 */
9233 7, /* Internal filter scaling */
9234 159, /* Minimum in-band energy threshold */
9235 21, /* 21/32 in-band to broad-band ratio */
9236 0x0FF5 /* shift-mask 0x0FF (look at 16 half-frames) bit count = 5 */
9237 },
9238 { /* f420 */
9239 30914, /* A1 = -1.886841 */
9240 -32584, /* A2 = 0.994385 */
9241 -426, /* B2 = -0.013020 */
9242 0, /* B1 = 0.000000 */
9243 426, /* B0 = 0.013020 */
9244 30914, /* A1 = -1.886841 */
9245 -32679, /* A2 = 0.997314 */
9246 17520, /* B2 = 0.534668 */
9247 -16471, /* B1 = -1.005310 */
9248 17520, /* B0 = 0.534668 */
9249 31004, /* A1 = -1.892334 */
9250 -32683, /* A2 = 0.997406 */
9251 819, /* B2 = 0.025023 */
9252 -780, /* B1 = -0.047619 */
9253 819, /* B0 = 0.025023 */
9254 5, /* Internal filter scaling */
9255 159, /* Minimum in-band energy threshold */
9256 21, /* 21/32 in-band to broad-band ratio */
9257 0x0FF5 /* shift-mask 0x0FF (look at 16 half-frames) bit count = 5 */
9258 },
9259#if 0
9260 { /* f425 */
9261 30881, /* A1 = -1.884827 */
9262 -32603, /* A2 = 0.994965 */
9263 -496, /* B2 = -0.015144 */
9264 0, /* B1 = 0.000000 */
9265 496, /* B0 = 0.015144 */
9266 30880, /* A1 = -1.884766 */
9267 -32692, /* A2 = 0.997711 */
9268 24767, /* B2 = 0.755859 */
9269 -23290, /* B1 = -1.421509 */
9270 24767, /* B0 = 0.755859 */
9271 30967, /* A1 = -1.890076 */
9272 -32694, /* A2 = 0.997772 */
9273 728, /* B2 = 0.022232 */
9274 -691, /* B1 = -0.042194 */
9275 728, /* B0 = 0.022232 */
9276 5, /* Internal filter scaling */
9277 159, /* Minimum in-band energy threshold */
9278 21, /* 21/32 in-band to broad-band ratio */
9279 0x0FF5 /* shift-mask 0x0FF (look at 16 half-frames) bit count = 5 */
9280 },
9281#else
9282 {
9283 30850,
9284 -32534,
9285 -504,
9286 0,
9287 504,
9288 30831,
9289 -32669,
9290 24303,
9291 -22080,
9292 24303,
9293 30994,
9294 -32673,
9295 1905,
9296 -1811,
9297 1905,
9298 5,
9299 129,
9300 17,
9301 0xff5
9302 },
9303#endif
9304 { /* f425_450[] */
9305 30646, /* A1 = 1.870544 */
9306 -32327, /* A2 = -0.986572 */
9307 -287, /* B2 = -0.008769 */
9308 0, /* B1 = 0 */
9309 287, /* B0 = 0.008769 */
9310 30627, /* A1 = 1.869324 */
9311 -32607, /* A2 = -0.995087 */
9312 13269, /* B2 = 0.404968 */
9313 -12376, /* B1 = -0.755432 */
9314 13269, /* B0 = 0.404968 */
9315 30924, /* A1 = 1.887512 */
9316 -32619, /* A2 = -0.995453 */
9317 19950, /* B2 = 0.608826 */
9318 -18940, /* B1 = -1.156006 */
9319 19950, /* B0 = 0.608826 */
9320 7, /* Internal filter scaling */
9321 159, /* Minimum in-band energy threshold */
9322 21, /* 21/32 in-band to broad-band ratio */
9323 0x0FF5 /* shift-mask 0x0FF (look at 16 half-frames) bit count = 5 */
9324 },
9325 { /* f425_475[] */
9326 30396, /* A1 = 1.855225 */
9327 -32014, /* A2 = -0.97699 */
9328 -395, /* B2 = -0.012055 */
9329 0, /* B1 = 0 */
9330 395, /* B0 = 0.012055 */
9331 30343, /* A1 = 1.85199 */
9332 -32482, /* A2 = -0.991302 */
9333 17823, /* B2 = 0.543945 */
9334 -16431, /* B1 = -1.002869 */
9335 17823, /* B0 = 0.543945 */
9336 30872, /* A1 = 1.884338 */
9337 -32516, /* A2 = -0.99231 */
9338 18124, /* B2 = 0.553101 */
9339 -17246, /* B1 = -1.052673 */
9340 18124, /* B0 = 0.553101 */
9341 7, /* Internal filter scaling */
9342 159, /* Minimum in-band energy threshold */
9343 21, /* 21/32 in-band to broad-band ratio */
9344 0x0FF5 /* shift-mask 0x0FF (look at 16 half-frames) bit count = 5 */
9345 },
9346 { /* f435 */
9347 30796, /* A1 = -1.879639 */
9348 -32603, /* A2 = 0.994965 */
9349 -254, /* B2 = -0.007762 */
9350 0, /* B1 = 0.000000 */
9351 254, /* B0 = 0.007762 */
9352 30793, /* A1 = -1.879456 */
9353 -32692, /* A2 = 0.997711 */
9354 18934, /* B2 = 0.577820 */
9355 -17751, /* B1 = -1.083496 */
9356 18934, /* B0 = 0.577820 */
9357 30882, /* A1 = -1.884888 */
9358 -32694, /* A2 = 0.997772 */
9359 1858, /* B2 = 0.056713 */
9360 -1758, /* B1 = -0.107357 */
9361 1858, /* B0 = 0.056713 */
9362 5, /* Internal filter scaling */
9363 159, /* Minimum in-band energy threshold */
9364 21, /* 21/32 in-band to broad-band ratio */
9365 0x0FF5 /* shift-mask 0x0FF (look at 16 half-frames) bit count = 5 */
9366 },
9367 { /* f440_450[] */
9368 30641, /* A1 = 1.870239 */
9369 -32458, /* A2 = -0.99057 */
9370 -155, /* B2 = -0.004735 */
9371 0, /* B1 = 0 */
9372 155, /* B0 = 0.004735 */
9373 30631, /* A1 = 1.869568 */
9374 -32630, /* A2 = -0.995789 */
9375 11453, /* B2 = 0.349548 */
9376 -10666, /* B1 = -0.651001 */
9377 11453, /* B0 = 0.349548 */
9378 30810, /* A1 = 1.880554 */
9379 -32634, /* A2 = -0.995941 */
9380 12237, /* B2 = 0.373474 */
9381 -11588, /* B1 = -0.707336 */
9382 12237, /* B0 = 0.373474 */
9383 7, /* Internal filter scaling */
9384 159, /* Minimum in-band energy threshold */
9385 21, /* 21/32 in-band to broad-band ratio */
9386 0x0FF5 /* shift-mask 0x0FF (look at 16 half-frames) bit count = 5 */
9387 },
9388 { /* f440_480[] */
9389 30367, /* A1 = 1.853455 */
9390 -32147, /* A2 = -0.981079 */
9391 -495, /* B2 = -0.015113 */
9392 0, /* B1 = 0 */
9393 495, /* B0 = 0.015113 */
9394 30322, /* A1 = 1.850769 */
9395 -32543, /* A2 = -0.993134 */
9396 10031, /* B2 = 0.306152 */
9397 -9252, /* B1 = -0.564728 */
9398 10031, /* B0 = 0.306152 */
9399 30770, /* A1 = 1.878052 */
9400 -32563, /* A2 = -0.993774 */
9401 22674, /* B2 = 0.691956 */
9402 -21465, /* B1 = -1.31012 */
9403 22674, /* B0 = 0.691956 */
9404 7, /* Internal filter scaling */
9405 159, /* Minimum in-band energy threshold */
9406 21, /* 21/32 in-band to broad-band ratio */
9407 0x0FF5 /* shift-mask 0x0FF (look at 16 half-frames) bit count = 5 */
9408 },
9409 { /* f445 */
9410 30709, /* A1 = -1.874329 */
9411 -32603, /* A2 = 0.994965 */
9412 -83, /* B2 = -0.002545 */
9413 0, /* B1 = 0.000000 */
9414 83, /* B0 = 0.002545 */
9415 30704, /* A1 = -1.874084 */
9416 -32692, /* A2 = 0.997711 */
9417 10641, /* B2 = 0.324738 */
9418 -9947, /* B1 = -0.607147 */
9419 10641, /* B0 = 0.324738 */
9420 30796, /* A1 = -1.879639 */
9421 -32694, /* A2 = 0.997772 */
9422 10079, /* B2 = 0.307587 */
9423 9513, /* B1 = 0.580688 */
9424 10079, /* B0 = 0.307587 */
9425 5, /* Internal filter scaling */
9426 159, /* Minimum in-band energy threshold */
9427 21, /* 21/32 in-band to broad-band ratio */
9428 0x0FF5 /* shift-mask 0x0FF (look at 16 half-frames) bit count = 5 */
9429 },
9430 { /* f450 */
9431 30664, /* A1 = -1.871643 */
9432 -32603, /* A2 = 0.994965 */
9433 -164, /* B2 = -0.005029 */
9434 0, /* B1 = 0.000000 */
9435 164, /* B0 = 0.005029 */
9436 30661, /* A1 = -1.871399 */
9437 -32692, /* A2 = 0.997711 */
9438 15294, /* B2 = 0.466736 */
9439 -14275, /* B1 = -0.871307 */
9440 15294, /* B0 = 0.466736 */
9441 30751, /* A1 = -1.876953 */
9442 -32694, /* A2 = 0.997772 */
9443 3548, /* B2 = 0.108284 */
9444 -3344, /* B1 = -0.204155 */
9445 3548, /* B0 = 0.108284 */
9446 5, /* Internal filter scaling */
9447 159, /* Minimum in-band energy threshold */
9448 21, /* 21/32 in-band to broad-band ratio */
9449 0x0FF5 /* shift-mask 0x0FF (look at 16 half-frames) bit count = 5 */
9450 },
9451 { /* f452 */
9452 30653, /* A1 = -1.870911 */
9453 -32615, /* A2 = 0.995361 */
9454 -209, /* B2 = -0.006382 */
9455 0, /* B1 = 0.000000 */
9456 209, /* B0 = 0.006382 */
9457 30647, /* A1 = -1.870605 */
9458 -32702, /* A2 = 0.997986 */
9459 18971, /* B2 = 0.578979 */
9460 -17716, /* B1 = -1.081299 */
9461 18971, /* B0 = 0.578979 */
9462 30738, /* A1 = -1.876099 */
9463 -32702, /* A2 = 0.998016 */
9464 2967, /* B2 = 0.090561 */
9465 -2793, /* B1 = -0.170502 */
9466 2967, /* B0 = 0.090561 */
9467 5, /* Internal filter scaling */
9468 159, /* Minimum in-band energy threshold */
9469 21, /* 21/32 in-band to broad-band ratio */
9470 0x0FF5 /* shift-mask 0x0FF (look at 16 half-frames) bit count = 5 */
9471 },
9472 { /* f475 */
9473 30437, /* A1 = -1.857727 */
9474 -32603, /* A2 = 0.994965 */
9475 -264, /* B2 = -0.008062 */
9476 0, /* B1 = 0.000000 */
9477 264, /* B0 = 0.008062 */
9478 30430, /* A1 = -1.857300 */
9479 -32692, /* A2 = 0.997711 */
9480 21681, /* B2 = 0.661682 */
9481 -20082, /* B1 = -1.225708 */
9482 21681, /* B0 = 0.661682 */
9483 30526, /* A1 = -1.863220 */
9484 -32694, /* A2 = 0.997742 */
9485 1559, /* B2 = 0.047600 */
9486 -1459, /* B1 = -0.089096 */
9487 1559, /* B0 = 0.047600 */
9488 5, /* Internal filter scaling */
9489 159, /* Minimum in-band energy threshold */
9490 21, /* 21/32 in-band to broad-band ratio */
9491 0x0FF5 /* shift-mask 0x0FF (look at 16 half-frames) bit count = 5 */
9492 },
9493 { /* f480_620[] */
9494 28975, /* A1 = 1.768494 */
9495 -30955, /* A2 = -0.944672 */
9496 -1026, /* B2 = -0.03133 */
9497 0, /* B1 = 0 */
9498 1026, /* B0 = 0.03133 */
9499 28613, /* A1 = 1.746399 */
9500 -32089, /* A2 = -0.979309 */
9501 14214, /* B2 = 0.433807 */
9502 -12202, /* B1 = -0.744812 */
9503 14214, /* B0 = 0.433807 */
9504 30243, /* A1 = 1.845947 */
9505 -32238, /* A2 = -0.983856 */
9506 24825, /* B2 = 0.757629 */
9507 -23402, /* B1 = -1.428345 */
9508 24825, /* B0 = 0.757629 */
9509 7, /* Internal filter scaling */
9510 159, /* Minimum in-band energy threshold */
9511 21, /* 21/32 in-band to broad-band ratio */
9512 0x0FF5 /* shift-mask 0x0FF (look at 16 half-frames) bit count = 5 */
9513 },
9514 { /* f494 */
9515 30257, /* A1 = -1.846741 */
9516 -32605, /* A2 = 0.995056 */
9517 -249, /* B2 = -0.007625 */
9518 0, /* B1 = 0.000000 */
9519 249, /* B0 = 0.007625 */
9520 30247, /* A1 = -1.846191 */
9521 -32694, /* A2 = 0.997772 */
9522 18088, /* B2 = 0.552002 */
9523 -16652, /* B1 = -1.016418 */
9524 18088, /* B0 = 0.552002 */
9525 30348, /* A1 = -1.852295 */
9526 -32696, /* A2 = 0.997803 */
9527 2099, /* B2 = 0.064064 */
9528 -1953, /* B1 = -0.119202 */
9529 2099, /* B0 = 0.064064 */
9530 5, /* Internal filter scaling */
9531 159, /* Minimum in-band energy threshold */
9532 21, /* 21/32 in-band to broad-band ratio */
9533 0x0FF5 /* shift-mask 0x0FF (look at 16 half-frames) bit count = 5 */
9534 },
9535 { /* f500 */
9536 30202, /* A1 = -1.843431 */
9537 -32624, /* A2 = 0.995622 */
9538 -413, /* B2 = -0.012622 */
9539 0, /* B1 = 0.000000 */
9540 413, /* B0 = 0.012622 */
9541 30191, /* A1 = -1.842721 */
9542 -32714, /* A2 = 0.998364 */
9543 25954, /* B2 = 0.792057 */
9544 -23890, /* B1 = -1.458131 */
9545 25954, /* B0 = 0.792057 */
9546 30296, /* A1 = -1.849172 */
9547 -32715, /* A2 = 0.998397 */
9548 2007, /* B2 = 0.061264 */
9549 -1860, /* B1 = -0.113568 */
9550 2007, /* B0 = 0.061264 */
9551 5, /* Internal filter scaling */
9552 159, /* Minimum in-band energy threshold */
9553 21, /* 21/32 in-band to broad-band ratio */
9554 0x0FF5 /* shift-mask 0x0FF (look at 16 half-frames) bit count = 5 */
9555 },
9556 { /* f520 */
9557 30001, /* A1 = -1.831116 */
9558 -32613, /* A2 = 0.995270 */
9559 -155, /* B2 = -0.004750 */
9560 0, /* B1 = 0.000000 */
9561 155, /* B0 = 0.004750 */
9562 29985, /* A1 = -1.830200 */
9563 -32710, /* A2 = 0.998260 */
9564 6584, /* B2 = 0.200928 */
9565 -6018, /* B1 = -0.367355 */
9566 6584, /* B0 = 0.200928 */
9567 30105, /* A1 = -1.837524 */
9568 -32712, /* A2 = 0.998291 */
9569 23812, /* B2 = 0.726685 */
9570 -21936, /* B1 = -1.338928 */
9571 23812, /* B0 = 0.726685 */
9572 5, /* Internal filter scaling */
9573 159, /* Minimum in-band energy threshold */
9574 21, /* 21/32 in-band to broad-band ratio */
9575 0x0FF5 /* shift-mask 0x0FF (look at 16 half-frames) bit count = 5 */
9576 },
9577 { /* f523 */
9578 29964, /* A1 = -1.828918 */
9579 -32601, /* A2 = 0.994904 */
9580 -101, /* B2 = -0.003110 */
9581 0, /* B1 = 0.000000 */
9582 101, /* B0 = 0.003110 */
9583 29949, /* A1 = -1.827942 */
9584 -32700, /* A2 = 0.997925 */
9585 11041, /* B2 = 0.336975 */
9586 -10075, /* B1 = -0.614960 */
9587 11041, /* B0 = 0.336975 */
9588 30070, /* A1 = -1.835388 */
9589 -32702, /* A2 = 0.997986 */
9590 16762, /* B2 = 0.511536 */
9591 -15437, /* B1 = -0.942230 */
9592 16762, /* B0 = 0.511536 */
9593 5, /* Internal filter scaling */
9594 159, /* Minimum in-band energy threshold */
9595 21, /* 21/32 in-band to broad-band ratio */
9596 0x0FF5 /* shift-mask 0x0FF (look at 16 half-frames) bit count = 5 */
9597 },
9598 { /* f525 */
9599 29936, /* A1 = -1.827209 */
9600 -32584, /* A2 = 0.994415 */
9601 -91, /* B2 = -0.002806 */
9602 0, /* B1 = 0.000000 */
9603 91, /* B0 = 0.002806 */
9604 29921, /* A1 = -1.826233 */
9605 -32688, /* A2 = 0.997559 */
9606 11449, /* B2 = 0.349396 */
9607 -10426, /* B1 = -0.636383 */
9608 11449, /* B0 = 0.349396 */
9609 30045, /* A1 = -1.833862 */
9610 -32688, /* A2 = 0.997589 */
9611 13055, /* B2 = 0.398407 */
9612 -12028, /* B1 = -0.734161 */
9613 13055, /* B0 = 0.398407 */
9614 5, /* Internal filter scaling */
9615 159, /* Minimum in-band energy threshold */
9616 21, /* 21/32 in-band to broad-band ratio */
9617 0x0FF5 /* shift-mask 0x0FF (look at 16 half-frames) bit count = 5 */
9618 },
9619 { /* f540_660[] */
9620 28499, /* A1 = 1.739441 */
9621 -31129, /* A2 = -0.949982 */
9622 -849, /* B2 = -0.025922 */
9623 0, /* B1 = 0 */
9624 849, /* B0 = 0.025922 */
9625 28128, /* A1 = 1.716797 */
9626 -32130, /* A2 = -0.98056 */
9627 14556, /* B2 = 0.444214 */
9628 -12251, /* B1 = -0.747772 */
9629 14556, /* B0 = 0.444244 */
9630 29667, /* A1 = 1.81073 */
9631 -32244, /* A2 = -0.984039 */
9632 23038, /* B2 = 0.703064 */
9633 -21358, /* B1 = -1.303589 */
9634 23040, /* B0 = 0.703125 */
9635 7, /* Internal filter scaling */
9636 159, /* Minimum in-band energy threshold */
9637 21, /* 21/32 in-band to broad-band ratio */
9638 0x0FF5 /* shift-mask 0x0FF (look at 16 half-frames) bit count = 5 */
9639 },
9640 { /* f587 */
9641 29271, /* A1 = -1.786560 */
9642 -32599, /* A2 = 0.994873 */
9643 -490, /* B2 = -0.014957 */
9644 0, /* B1 = 0.000000 */
9645 490, /* B0 = 0.014957 */
9646 29246, /* A1 = -1.785095 */
9647 -32700, /* A2 = 0.997925 */
9648 28961, /* B2 = 0.883850 */
9649 -25796, /* B1 = -1.574463 */
9650 28961, /* B0 = 0.883850 */
9651 29383, /* A1 = -1.793396 */
9652 -32700, /* A2 = 0.997955 */
9653 1299, /* B2 = 0.039650 */
9654 -1169, /* B1 = -0.071396 */
9655 1299, /* B0 = 0.039650 */
9656 5, /* Internal filter scaling */
9657 159, /* Minimum in-band energy threshold */
9658 21, /* 21/32 in-band to broad-band ratio */
9659 0x0FF5 /* shift-mask 0x0FF (look at 16 half-frames) bit count = 5 */
9660 },
9661 { /* f590 */
9662 29230, /* A1 = -1.784058 */
9663 -32584, /* A2 = 0.994415 */
9664 -418, /* B2 = -0.012757 */
9665 0, /* B1 = 0.000000 */
9666 418, /* B0 = 0.012757 */
9667 29206, /* A1 = -1.782593 */
9668 -32688, /* A2 = 0.997559 */
9669 36556, /* B2 = 1.115601 */
9670 -32478, /* B1 = -1.982300 */
9671 36556, /* B0 = 1.115601 */
9672 29345, /* A1 = -1.791077 */
9673 -32688, /* A2 = 0.997589 */
9674 897, /* B2 = 0.027397 */
9675 -808, /* B1 = -0.049334 */
9676 897, /* B0 = 0.027397 */
9677 5, /* Internal filter scaling */
9678 159, /* Minimum in-band energy threshold */
9679 21, /* 21/32 in-band to broad-band ratio */
9680 0x0FF5 /* shift-mask 0x0FF (look at 16 half-frames) bit count = 5 */
9681 },
9682 { /* f600 */
9683 29116, /* A1 = -1.777100 */
9684 -32603, /* A2 = 0.994965 */
9685 -165, /* B2 = -0.005039 */
9686 0, /* B1 = 0.000000 */
9687 165, /* B0 = 0.005039 */
9688 29089, /* A1 = -1.775452 */
9689 -32708, /* A2 = 0.998199 */
9690 6963, /* B2 = 0.212494 */
9691 -6172, /* B1 = -0.376770 */
9692 6963, /* B0 = 0.212494 */
9693 29237, /* A1 = -1.784485 */
9694 -32710, /* A2 = 0.998230 */
9695 24197, /* B2 = 0.738464 */
9696 -21657, /* B1 = -1.321899 */
9697 24197, /* B0 = 0.738464 */
9698 5, /* Internal filter scaling */
9699 159, /* Minimum in-band energy threshold */
9700 21, /* 21/32 in-band to broad-band ratio */
9701 0x0FF5 /* shift-mask 0x0FF (look at 16 half-frames) bit count = 5 */
9702 },
9703 { /* f660 */
9704 28376, /* A1 = -1.731934 */
9705 -32567, /* A2 = 0.993896 */
9706 -363, /* B2 = -0.011102 */
9707 0, /* B1 = 0.000000 */
9708 363, /* B0 = 0.011102 */
9709 28337, /* A1 = -1.729614 */
9710 -32683, /* A2 = 0.997434 */
9711 21766, /* B2 = 0.664246 */
9712 -18761, /* B1 = -1.145081 */
9713 21766, /* B0 = 0.664246 */
9714 28513, /* A1 = -1.740356 */
9715 -32686, /* A2 = 0.997498 */
9716 2509, /* B2 = 0.076584 */
9717 -2196, /* B1 = -0.134041 */
9718 2509, /* B0 = 0.076584 */
9719 5, /* Internal filter scaling */
9720 159, /* Minimum in-band energy threshold */
9721 21, /* 21/32 in-band to broad-band ratio */
9722 0x0FF5 /* shift-mask 0x0FF (look at 16 half-frames) bit count = 5 */
9723 },
9724 { /* f700 */
9725 27844, /* A1 = -1.699463 */
9726 -32563, /* A2 = 0.993744 */
9727 -366, /* B2 = -0.011187 */
9728 0, /* B1 = 0.000000 */
9729 366, /* B0 = 0.011187 */
9730 27797, /* A1 = -1.696655 */
9731 -32686, /* A2 = 0.997498 */
9732 22748, /* B2 = 0.694214 */
9733 -19235, /* B1 = -1.174072 */
9734 22748, /* B0 = 0.694214 */
9735 27995, /* A1 = -1.708740 */
9736 -32688, /* A2 = 0.997559 */
9737 2964, /* B2 = 0.090477 */
9738 -2546, /* B1 = -0.155449 */
9739 2964, /* B0 = 0.090477 */
9740 5, /* Internal filter scaling */
9741 159, /* Minimum in-band energy threshold */
9742 21, /* 21/32 in-band to broad-band ratio */
9743 0x0FF5 /* shift-mask 0x0FF (look at 16 half-frames) bit count = 5 */
9744 },
9745 { /* f740 */
9746 27297, /* A1 = -1.666077 */
9747 -32551, /* A2 = 0.993408 */
9748 -345, /* B2 = -0.010540 */
9749 0, /* B1 = 0.000000 */
9750 345, /* B0 = 0.010540 */
9751 27240, /* A1 = -1.662598 */
9752 -32683, /* A2 = 0.997406 */
9753 22560, /* B2 = 0.688477 */
9754 -18688, /* B1 = -1.140625 */
9755 22560, /* B0 = 0.688477 */
9756 27461, /* A1 = -1.676147 */
9757 -32684, /* A2 = 0.997467 */
9758 3541, /* B2 = 0.108086 */
9759 -2985, /* B1 = -0.182220 */
9760 3541, /* B0 = 0.108086 */
9761 5, /* Internal filter scaling */
9762 159, /* Minimum in-band energy threshold */
9763 21, /* 21/32 in-band to broad-band ratio */
9764 0x0FF5 /* shift-mask 0x0FF (look at 16 half-frames) bit count = 5 */
9765 },
9766 { /* f750 */
9767 27155, /* A1 = -1.657410 */
9768 -32551, /* A2 = 0.993408 */
9769 -462, /* B2 = -0.014117 */
9770 0, /* B1 = 0.000000 */
9771 462, /* B0 = 0.014117 */
9772 27097, /* A1 = -1.653870 */
9773 -32683, /* A2 = 0.997406 */
9774 32495, /* B2 = 0.991699 */
9775 -26776, /* B1 = -1.634338 */
9776 32495, /* B0 = 0.991699 */
9777 27321, /* A1 = -1.667542 */
9778 -32684, /* A2 = 0.997467 */
9779 1835, /* B2 = 0.056007 */
9780 -1539, /* B1 = -0.093948 */
9781 1835, /* B0 = 0.056007 */
9782 5, /* Internal filter scaling */
9783 159, /* Minimum in-band energy threshold */
9784 21, /* 21/32 in-band to broad-band ratio */
9785 0x0FF5 /* shift-mask 0x0FF (look at 16 half-frames) bit count = 5 */
9786 },
9787 { /* f750_1450[] */
9788 19298, /* A1 = 1.177917 */
9789 -24471, /* A2 = -0.746796 */
9790 -4152, /* B2 = -0.126709 */
9791 0, /* B1 = 0 */
9792 4152, /* B0 = 0.126709 */
9793 12902, /* A1 = 0.787476 */
9794 -29091, /* A2 = -0.887817 */
9795 12491, /* B2 = 0.38121 */
9796 -1794, /* B1 = -0.109528 */
9797 12494, /* B0 = 0.381317 */
9798 26291, /* A1 = 1.604736 */
9799 -30470, /* A2 = -0.929901 */
9800 28859, /* B2 = 0.880737 */
9801 -26084, /* B1 = -1.592102 */
9802 28861, /* B0 = 0.880798 */
9803 7, /* Internal filter scaling */
9804 159, /* Minimum in-band energy threshold */
9805 21, /* 21/32 in-band to broad-band ratio */
9806 0x0FF5 /* shift-mask 0x0FF (look at 16 half-frames) bit count = 5 */
9807 },
9808 { /* f770 */
9809 26867, /* A1 = -1.639832 */
9810 -32551, /* A2 = 0.993408 */
9811 -123, /* B2 = -0.003755 */
9812 0, /* B1 = 0.000000 */
9813 123, /* B0 = 0.003755 */
9814 26805, /* A1 = -1.636108 */
9815 -32683, /* A2 = 0.997406 */
9816 17297, /* B2 = 0.527863 */
9817 -14096, /* B1 = -0.860382 */
9818 17297, /* B0 = 0.527863 */
9819 27034, /* A1 = -1.650085 */
9820 -32684, /* A2 = 0.997467 */
9821 12958, /* B2 = 0.395477 */
9822 -10756, /* B1 = -0.656525 */
9823 12958, /* B0 = 0.395477 */
9824 5, /* Internal filter scaling */
9825 159, /* Minimum in-band energy threshold */
9826 21, /* 21/32 in-band to broad-band ratio */
9827 0x0FF5 /* shift-mask 0x0FF (look at 16 half-frames) bit count = 5 */
9828 },
9829 { /* f800 */
9830 26413, /* A1 = -1.612122 */
9831 -32547, /* A2 = 0.993286 */
9832 -223, /* B2 = -0.006825 */
9833 0, /* B1 = 0.000000 */
9834 223, /* B0 = 0.006825 */
9835 26342, /* A1 = -1.607849 */
9836 -32686, /* A2 = 0.997498 */
9837 6391, /* B2 = 0.195053 */
9838 -5120, /* B1 = -0.312531 */
9839 6391, /* B0 = 0.195053 */
9840 26593, /* A1 = -1.623108 */
9841 -32688, /* A2 = 0.997559 */
9842 23681, /* B2 = 0.722717 */
9843 -19328, /* B1 = -1.179688 */
9844 23681, /* B0 = 0.722717 */
9845 5, /* Internal filter scaling */
9846 159, /* Minimum in-band energy threshold */
9847 21, /* 21/32 in-band to broad-band ratio */
9848 0x0FF5 /* shift-mask 0x0FF (look at 16 half-frames) bit count = 5 */
9849 },
9850 { /* f816 */
9851 26168, /* A1 = -1.597209 */
9852 -32528, /* A2 = 0.992706 */
9853 -235, /* B2 = -0.007182 */
9854 0, /* B1 = 0.000000 */
9855 235, /* B0 = 0.007182 */
9856 26092, /* A1 = -1.592590 */
9857 -32675, /* A2 = 0.997192 */
9858 20823, /* B2 = 0.635498 */
9859 -16510, /* B1 = -1.007751 */
9860 20823, /* B0 = 0.635498 */
9861 26363, /* A1 = -1.609070 */
9862 -32677, /* A2 = 0.997253 */
9863 6739, /* B2 = 0.205688 */
9864 -5459, /* B1 = -0.333206 */
9865 6739, /* B0 = 0.205688 */
9866 5, /* Internal filter scaling */
9867 159, /* Minimum in-band energy threshold */
9868 21, /* 21/32 in-band to broad-band ratio */
9869 0x0FF5 /* shift-mask 0x0FF (look at 16 half-frames) bit count = 5 */
9870 },
9871 { /* f850 */
9872 25641, /* A1 = -1.565063 */
9873 -32536, /* A2 = 0.992950 */
9874 -121, /* B2 = -0.003707 */
9875 0, /* B1 = 0.000000 */
9876 121, /* B0 = 0.003707 */
9877 25560, /* A1 = -1.560059 */
9878 -32684, /* A2 = 0.997437 */
9879 18341, /* B2 = 0.559753 */
9880 -14252, /* B1 = -0.869904 */
9881 18341, /* B0 = 0.559753 */
9882 25837, /* A1 = -1.577026 */
9883 -32684, /* A2 = 0.997467 */
9884 16679, /* B2 = 0.509003 */
9885 -13232, /* B1 = -0.807648 */
9886 16679, /* B0 = 0.509003 */
9887 5, /* Internal filter scaling */
9888 159, /* Minimum in-band energy threshold */
9889 21, /* 21/32 in-band to broad-band ratio */
9890 0x0FF5 /* shift-mask 0x0FF (look at 16 half-frames) bit count = 5 */
9891 },
9892 { /* f857_1645[] */
9893 16415, /* A1 = 1.001953 */
9894 -23669, /* A2 = -0.722321 */
9895 -4549, /* B2 = -0.138847 */
9896 0, /* B1 = 0 */
9897 4549, /* B0 = 0.138847 */
9898 8456, /* A1 = 0.516174 */
9899 -28996, /* A2 = -0.884918 */
9900 13753, /* B2 = 0.419724 */
9901 -12, /* B1 = -0.000763 */
9902 13757, /* B0 = 0.419846 */
9903 24632, /* A1 = 1.503418 */
9904 -30271, /* A2 = -0.923828 */
9905 29070, /* B2 = 0.887146 */
9906 -25265, /* B1 = -1.542114 */
9907 29073, /* B0 = 0.887268 */
9908 7, /* Internal filter scaling */
9909 159, /* Minimum in-band energy threshold */
9910 21, /* 21/32 in-band to broad-band ratio */
9911 0x0FF5 /* shift-mask 0x0FF (look at 16 half-frames) bit count = 5 */
9912 },
9913 { /* f900 */
9914 24806, /* A1 = -1.514099 */
9915 -32501, /* A2 = 0.991852 */
9916 -326, /* B2 = -0.009969 */
9917 0, /* B1 = 0.000000 */
9918 326, /* B0 = 0.009969 */
9919 24709, /* A1 = -1.508118 */
9920 -32659, /* A2 = 0.996674 */
9921 20277, /* B2 = 0.618835 */
9922 -15182, /* B1 = -0.926636 */
9923 20277, /* B0 = 0.618835 */
9924 25022, /* A1 = -1.527222 */
9925 -32661, /* A2 = 0.996735 */
9926 4320, /* B2 = 0.131836 */
9927 -3331, /* B1 = -0.203339 */
9928 4320, /* B0 = 0.131836 */
9929 5, /* Internal filter scaling */
9930 159, /* Minimum in-band energy threshold */
9931 21, /* 21/32 in-band to broad-band ratio */
9932 0x0FF5 /* shift-mask 0x0FF (look at 16 half-frames) bit count = 5 */
9933 },
9934 { /* f900_1300[] */
9935 19776, /* A1 = 1.207092 */
9936 -27437, /* A2 = -0.837341 */
9937 -2666, /* B2 = -0.081371 */
9938 0, /* B1 = 0 */
9939 2666, /* B0 = 0.081371 */
9940 16302, /* A1 = 0.995026 */
9941 -30354, /* A2 = -0.926361 */
9942 10389, /* B2 = 0.317062 */
9943 -3327, /* B1 = -0.203064 */
9944 10389, /* B0 = 0.317062 */
9945 24299, /* A1 = 1.483154 */
9946 -30930, /* A2 = -0.943909 */
9947 25016, /* B2 = 0.763428 */
9948 -21171, /* B1 = -1.292236 */
9949 25016, /* B0 = 0.763428 */
9950 7, /* Internal filter scaling */
9951 159, /* Minimum in-band energy threshold */
9952 21, /* 21/32 in-band to broad-band ratio */
9953 0x0FF5 /* shift-mask 0x0FF (look at 16 half-frames) bit count = 5 */
9954 },
9955 { /* f935_1215[] */
9956 20554, /* A1 = 1.254517 */
9957 -28764, /* A2 = -0.877838 */
9958 -2048, /* B2 = -0.062515 */
9959 0, /* B1 = 0 */
9960 2048, /* B0 = 0.062515 */
9961 18209, /* A1 = 1.11145 */
9962 -30951, /* A2 = -0.94458 */
9963 9390, /* B2 = 0.286575 */
9964 -3955, /* B1 = -0.241455 */
9965 9390, /* B0 = 0.286575 */
9966 23902, /* A1 = 1.458923 */
9967 -31286, /* A2 = -0.954803 */
9968 23252, /* B2 = 0.709595 */
9969 -19132, /* B1 = -1.167725 */
9970 23252, /* B0 = 0.709595 */
9971 7, /* Internal filter scaling */
9972 159, /* Minimum in-band energy threshold */
9973 21, /* 21/32 in-band to broad-band ratio */
9974 0x0FF5 /* shift-mask 0x0FF (look at 16 half-frames) bit count = 5 */
9975 },
9976 { /* f941_1477[] */
9977 17543, /* A1 = 1.07074 */
9978 -26220, /* A2 = -0.800201 */
9979 -3298, /* B2 = -0.100647 */
9980 0, /* B1 = 0 */
9981 3298, /* B0 = 0.100647 */
9982 12423, /* A1 = 0.75827 */
9983 -30036, /* A2 = -0.916626 */
9984 12651, /* B2 = 0.386078 */
9985 -2444, /* B1 = -0.14917 */
9986 12653, /* B0 = 0.386154 */
9987 23518, /* A1 = 1.435425 */
9988 -30745, /* A2 = -0.938293 */
9989 27282, /* B2 = 0.832581 */
9990 -22529, /* B1 = -1.375122 */
9991 27286, /* B0 = 0.832703 */
9992 7, /* Internal filter scaling */
9993 159, /* Minimum in-band energy threshold */
9994 21, /* 21/32 in-band to broad-band ratio */
9995 0x0FF5 /* shift-mask 0x0FF (look at 16 half-frames) bit count = 5 */
9996 },
9997 { /* f942 */
9998 24104, /* A1 = -1.471252 */
9999 -32507, /* A2 = 0.992065 */
10000 -351, /* B2 = -0.010722 */
10001 0, /* B1 = 0.000000 */
10002 351, /* B0 = 0.010722 */
10003 23996, /* A1 = -1.464600 */
10004 -32671, /* A2 = 0.997040 */
10005 22848, /* B2 = 0.697266 */
10006 -16639, /* B1 = -1.015564 */
10007 22848, /* B0 = 0.697266 */
10008 24332, /* A1 = -1.485168 */
10009 -32673, /* A2 = 0.997101 */
10010 4906, /* B2 = 0.149727 */
10011 -3672, /* B1 = -0.224174 */
10012 4906, /* B0 = 0.149727 */
10013 5, /* Internal filter scaling */
10014 159, /* Minimum in-band energy threshold */
10015 21, /* 21/32 in-band to broad-band ratio */
10016 0x0FF5 /* shift-mask 0x0FF (look at 16 half-frames) bit count = 5 */
10017 },
10018 { /* f950 */
10019 23967, /* A1 = -1.462830 */
10020 -32507, /* A2 = 0.992065 */
10021 -518, /* B2 = -0.015821 */
10022 0, /* B1 = 0.000000 */
10023 518, /* B0 = 0.015821 */
10024 23856, /* A1 = -1.456055 */
10025 -32671, /* A2 = 0.997040 */
10026 26287, /* B2 = 0.802246 */
10027 -19031, /* B1 = -1.161560 */
10028 26287, /* B0 = 0.802246 */
10029 24195, /* A1 = -1.476746 */
10030 -32673, /* A2 = 0.997101 */
10031 2890, /* B2 = 0.088196 */
10032 -2151, /* B1 = -0.131317 */
10033 2890, /* B0 = 0.088196 */
10034 5, /* Internal filter scaling */
10035 159, /* Minimum in-band energy threshold */
10036 21, /* 21/32 in-band to broad-band ratio */
10037 0x0FF5 /* shift-mask 0x0FF (look at 16 half-frames) bit count = 5 */
10038 },
10039 { /* f950_1400[] */
10040 18294, /* A1 = 1.116638 */
10041 -26962, /* A2 = -0.822845 */
10042 -2914, /* B2 = -0.088936 */
10043 0, /* B1 = 0 */
10044 2914, /* B0 = 0.088936 */
10045 14119, /* A1 = 0.861786 */
10046 -30227, /* A2 = -0.922455 */
10047 11466, /* B2 = 0.349945 */
10048 -2833, /* B1 = -0.172943 */
10049 11466, /* B0 = 0.349945 */
10050 23431, /* A1 = 1.430115 */
10051 -30828, /* A2 = -0.940796 */
10052 25331, /* B2 = 0.773071 */
10053 -20911, /* B1 = -1.276367 */
10054 25331, /* B0 = 0.773071 */
10055 7, /* Internal filter scaling */
10056 159, /* Minimum in-band energy threshold */
10057 21, /* 21/32 in-band to broad-band ratio */
10058 0x0FF5 /* shift-mask 0x0FF (look at 16 half-frames) bit count = 5 */
10059 },
10060 { /* f975 */
10061 23521, /* A1 = -1.435608 */
10062 -32489, /* A2 = 0.991516 */
10063 -193, /* B2 = -0.005915 */
10064 0, /* B1 = 0.000000 */
10065 193, /* B0 = 0.005915 */
10066 23404, /* A1 = -1.428467 */
10067 -32655, /* A2 = 0.996582 */
10068 17740, /* B2 = 0.541412 */
10069 -12567, /* B1 = -0.767029 */
10070 17740, /* B0 = 0.541412 */
10071 23753, /* A1 = -1.449829 */
10072 -32657, /* A2 = 0.996613 */
10073 9090, /* B2 = 0.277405 */
10074 -6662, /* B1 = -0.406647 */
10075 9090, /* B0 = 0.277405 */
10076 5, /* Internal filter scaling */
10077 159, /* Minimum in-band energy threshold */
10078 21, /* 21/32 in-band to broad-band ratio */
10079 0x0FF5 /* shift-mask 0x0FF (look at 16 half-frames) bit count = 5 */
10080 },
10081 { /* f1000 */
10082 23071, /* A1 = -1.408203 */
10083 -32489, /* A2 = 0.991516 */
10084 -293, /* B2 = -0.008965 */
10085 0, /* B1 = 0.000000 */
10086 293, /* B0 = 0.008965 */
10087 22951, /* A1 = -1.400818 */
10088 -32655, /* A2 = 0.996582 */
10089 5689, /* B2 = 0.173645 */
10090 -3951, /* B1 = -0.241150 */
10091 5689, /* B0 = 0.173645 */
10092 23307, /* A1 = -1.422607 */
10093 -32657, /* A2 = 0.996613 */
10094 18692, /* B2 = 0.570435 */
10095 -13447, /* B1 = -0.820770 */
10096 18692, /* B0 = 0.570435 */
10097 5, /* Internal filter scaling */
10098 159, /* Minimum in-band energy threshold */
10099 21, /* 21/32 in-band to broad-band ratio */
10100 0x0FF5 /* shift-mask 0x0FF (look at 16 half-frames) bit count = 5 */
10101 },
10102 { /* f1020 */
10103 22701, /* A1 = -1.385620 */
10104 -32474, /* A2 = 0.991058 */
10105 -292, /* B2 = -0.008933 */
10106 0, /*163840 , B1 = 10.000000 */
10107 292, /* B0 = 0.008933 */
10108 22564, /* A1 = -1.377258 */
10109 -32655, /* A2 = 0.996552 */
10110 20756, /* B2 = 0.633423 */
10111 -14176, /* B1 = -0.865295 */
10112 20756, /* B0 = 0.633423 */
10113 22960, /* A1 = -1.401428 */
10114 -32657, /* A2 = 0.996613 */
10115 6520, /* B2 = 0.198990 */
10116 -4619, /* B1 = -0.281937 */
10117 6520, /* B0 = 0.198990 */
10118 5, /* Internal filter scaling */
10119 159, /* Minimum in-band energy threshold */
10120 21, /* 21/32 in-band to broad-band ratio */
10121 0x0FF5 /* shift-mask 0x0FF (look at 16 half-frames) bit count = 5 */
10122 },
10123 { /* f1050 */
10124 22142, /* A1 = -1.351501 */
10125 -32474, /* A2 = 0.991058 */
10126 -147, /* B2 = -0.004493 */
10127 0, /* B1 = 0.000000 */
10128 147, /* B0 = 0.004493 */
10129 22000, /* A1 = -1.342834 */
10130 -32655, /* A2 = 0.996552 */
10131 15379, /* B2 = 0.469360 */
10132 -10237, /* B1 = -0.624847 */
10133 15379, /* B0 = 0.469360 */
10134 22406, /* A1 = -1.367554 */
10135 -32657, /* A2 = 0.996613 */
10136 17491, /* B2 = 0.533783 */
10137 -12096, /* B1 = -0.738312 */
10138 17491, /* B0 = 0.533783 */
10139 5, /* Internal filter scaling */
10140 159, /* Minimum in-band energy threshold */
10141 21, /* 21/32 in-band to broad-band ratio */
10142 0x0FF5 /* shift-mask 0x0FF (look at 16 half-frames) bit count = 5 */
10143 },
10144 { /* f1100_1750[] */
10145 12973, /* A1 = 0.79184 */
10146 -24916, /* A2 = -0.760376 */
10147 6655, /* B2 = 0.203102 */
10148 367, /* B1 = 0.0224 */
10149 6657, /* B0 = 0.203171 */
10150 5915, /* A1 = 0.361053 */
10151 -29560, /* A2 = -0.90213 */
10152 -7777, /* B2 = -0.23735 */
10153 0, /* B1 = 0 */
10154 7777, /* B0 = 0.23735 */
10155 20510, /* A1 = 1.251892 */
10156 -30260, /* A2 = -0.923462 */
10157 26662, /* B2 = 0.81366 */
10158 -20573, /* B1 = -1.255737 */
10159 26668, /* B0 = 0.813843 */
10160 7, /* Internal filter scaling */
10161 159, /* Minimum in-band energy threshold */
10162 21, /* 21/32 in-band to broad-band ratio */
10163 0x0FF5 /* shift-mask 0x0FF (look at 16 half-frames) bit count = 5 */
10164 },
10165 { /* f1140 */
10166 20392, /* A1 = -1.244629 */
10167 -32460, /* A2 = 0.990601 */
10168 -270, /* B2 = -0.008240 */
10169 0, /* B1 = 0.000000 */
10170 270, /* B0 = 0.008240 */
10171 20218, /* A1 = -1.234009 */
10172 -32655, /* A2 = 0.996582 */
10173 21337, /* B2 = 0.651154 */
10174 -13044, /* B1 = -0.796143 */
10175 21337, /* B0 = 0.651154 */
10176 20684, /* A1 = -1.262512 */
10177 -32657, /* A2 = 0.996643 */
10178 8572, /* B2 = 0.261612 */
10179 -5476, /* B1 = -0.334244 */
10180 8572, /* B0 = 0.261612 */
10181 5, /* Internal filter scaling */
10182 159, /* Minimum in-band energy threshold */
10183 21, /* 21/32 in-band to broad-band ratio */
10184 0x0FF5 /* shift-mask 0x0FF (look at 16 half-frames) bit count = 5 */
10185 },
10186 { /* f1200 */
10187 19159, /* A1 = -1.169373 */
10188 -32456, /* A2 = 0.990509 */
10189 -335, /* B2 = -0.010252 */
10190 0, /* B1 = 0.000000 */
10191 335, /* B0 = 0.010252 */
10192 18966, /* A1 = -1.157593 */
10193 -32661, /* A2 = 0.996735 */
10194 6802, /* B2 = 0.207588 */
10195 -3900, /* B1 = -0.238098 */
10196 6802, /* B0 = 0.207588 */
10197 19467, /* A1 = -1.188232 */
10198 -32661, /* A2 = 0.996765 */
10199 25035, /* B2 = 0.764008 */
10200 -15049, /* B1 = -0.918579 */
10201 25035, /* B0 = 0.764008 */
10202 5, /* Internal filter scaling */
10203 159, /* Minimum in-band energy threshold */
10204 21, /* 21/32 in-band to broad-band ratio */
10205 0x0FF5 /* shift-mask 0x0FF (look at 16 half-frames) bit count = 5 */
10206 },
10207 { /* f1209 */
10208 18976, /* A1 = -1.158264 */
10209 -32439, /* A2 = 0.989990 */
10210 -183, /* B2 = -0.005588 */
10211 0, /* B1 = 0.000000 */
10212 183, /* B0 = 0.005588 */
10213 18774, /* A1 = -1.145874 */
10214 -32650, /* A2 = 0.996429 */
10215 15468, /* B2 = 0.472076 */
10216 -8768, /* B1 = -0.535217 */
10217 15468, /* B0 = 0.472076 */
10218 19300, /* A1 = -1.177979 */
10219 -32652, /* A2 = 0.996490 */
10220 19840, /* B2 = 0.605499 */
10221 -11842, /* B1 = -0.722809 */
10222 19840, /* B0 = 0.605499 */
10223 5, /* Internal filter scaling */
10224 159, /* Minimum in-band energy threshold */
10225 21, /* 21/32 in-band to broad-band ratio */
10226 0x0FF5 /* shift-mask 0x0FF (look at 16 half-frames) bit count = 5 */
10227 },
10228 { /* f1330 */
10229 16357, /* A1 = -0.998413 */
10230 -32368, /* A2 = 0.987793 */
10231 -217, /* B2 = -0.006652 */
10232 0, /* B1 = 0.000000 */
10233 217, /* B0 = 0.006652 */
10234 16107, /* A1 = -0.983126 */
10235 -32601, /* A2 = 0.994904 */
10236 11602, /* B2 = 0.354065 */
10237 -5555, /* B1 = -0.339111 */
10238 11602, /* B0 = 0.354065 */
10239 16722, /* A1 = -1.020630 */
10240 -32603, /* A2 = 0.994965 */
10241 15574, /* B2 = 0.475311 */
10242 -8176, /* B1 = -0.499069 */
10243 15574, /* B0 = 0.475311 */
10244 5, /* Internal filter scaling */
10245 159, /* Minimum in-band energy threshold */
10246 21, /* 21/32 in-band to broad-band ratio */
10247 0x0FF5 /* shift-mask 0x0FF (look at 16 half-frames) bit count = 5 */
10248 },
10249 { /* f1336 */
10250 16234, /* A1 = -0.990875 */
10251 32404, /* A2 = -0.988922 */
10252 -193, /* B2 = -0.005908 */
10253 0, /* B1 = 0.000000 */
10254 193, /* B0 = 0.005908 */
10255 15986, /* A1 = -0.975769 */
10256 -32632, /* A2 = 0.995880 */
10257 18051, /* B2 = 0.550903 */
10258 -8658, /* B1 = -0.528473 */
10259 18051, /* B0 = 0.550903 */
10260 16591, /* A1 = -1.012695 */
10261 -32634, /* A2 = 0.995941 */
10262 15736, /* B2 = 0.480240 */
10263 -8125, /* B1 = -0.495926 */
10264 15736, /* B0 = 0.480240 */
10265 5, /* Internal filter scaling */
10266 159, /* Minimum in-band energy threshold */
10267 21, /* 21/32 in-band to broad-band ratio */
10268 0x0FF5 /* shift-mask 0x0FF (look at 16 half-frames) bit count = 5 */
10269 },
10270 { /* f1366 */
10271 15564, /* A1 = -0.949982 */
10272 -32404, /* A2 = 0.988922 */
10273 -269, /* B2 = -0.008216 */
10274 0, /* B1 = 0.000000 */
10275 269, /* B0 = 0.008216 */
10276 15310, /* A1 = -0.934479 */
10277 -32632, /* A2 = 0.995880 */
10278 10815, /* B2 = 0.330063 */
10279 -4962, /* B1 = -0.302887 */
10280 10815, /* B0 = 0.330063 */
10281 15924, /* A1 = -0.971924 */
10282 -32634, /* A2 = 0.995941 */
10283 18880, /* B2 = 0.576172 */
10284 -9364, /* B1 = -0.571594 */
10285 18880, /* B0 = 0.576172 */
10286 5, /* Internal filter scaling */
10287 159, /* Minimum in-band energy threshold */
10288 21, /* 21/32 in-band to broad-band ratio */
10289 0x0FF5 /* shift-mask 0x0FF (look at 16 half-frames) bit count = 5 */
10290 },
10291 { /* f1380 */
10292 15247, /* A1 = -0.930603 */
10293 -32397, /* A2 = 0.988708 */
10294 -244, /* B2 = -0.007451 */
10295 0, /* B1 = 0.000000 */
10296 244, /* B0 = 0.007451 */
10297 14989, /* A1 = -0.914886 */
10298 -32627, /* A2 = 0.995697 */
10299 18961, /* B2 = 0.578644 */
10300 -8498, /* B1 = -0.518707 */
10301 18961, /* B0 = 0.578644 */
10302 15608, /* A1 = -0.952667 */
10303 -32628, /* A2 = 0.995758 */
10304 11145, /* B2 = 0.340134 */
10305 -5430, /* B1 = -0.331467 */
10306 11145, /* B0 = 0.340134 */
10307 5, /* Internal filter scaling */
10308 159, /* Minimum in-band energy threshold */
10309 21, /* 21/32 in-band to broad-band ratio */
10310 0x0FF5 /* shift-mask 0x0FF (look at 16 half-frames) bit count = 5 */
10311 },
10312 { /* f1400 */
10313 14780, /* A1 = -0.902130 */
10314 -32393, /* A2 = 0.988586 */
10315 -396, /* B2 = -0.012086 */
10316 0, /* B1 = 0.000000 */
10317 396, /* B0 = 0.012086 */
10318 14510, /* A1 = -0.885651 */
10319 -32630, /* A2 = 0.995819 */
10320 6326, /* B2 = 0.193069 */
10321 -2747, /* B1 = -0.167671 */
10322 6326, /* B0 = 0.193069 */
10323 15154, /* A1 = -0.924957 */
10324 -32632, /* A2 = 0.995850 */
10325 23235, /* B2 = 0.709076 */
10326 -10983, /* B1 = -0.670380 */
10327 23235, /* B0 = 0.709076 */
10328 5, /* Internal filter scaling */
10329 159, /* Minimum in-band energy threshold */
10330 21, /* 21/32 in-band to broad-band ratio */
10331 0x0FF5 /* shift-mask 0x0FF (look at 16 half-frames) bit count = 5 */
10332 },
10333 { /* f1477 */
10334 13005, /* A1 = -0.793793 */
10335 -32368, /* A2 = 0.987823 */
10336 -500, /* B2 = -0.015265 */
10337 0, /* B1 = 0.000000 */
10338 500, /* B0 = 0.015265 */
10339 12708, /* A1 = -0.775665 */
10340 -32615, /* A2 = 0.995331 */
10341 11420, /* B2 = 0.348526 */
10342 -4306, /* B1 = -0.262833 */
10343 11420, /* B0 = 0.348526 */
10344 13397, /* A1 = -0.817688 */
10345 -32615, /* A2 = 0.995361 */
10346 9454, /* B2 = 0.288528 */
10347 -3981, /* B1 = -0.243027 */
10348 9454, /* B0 = 0.288528 */
10349 5, /* Internal filter scaling */
10350 159, /* Minimum in-band energy threshold */
10351 21, /* 21/32 in-band to broad-band ratio */
10352 0x0FF5 /* shift-mask 0x0FF (look at 16 half-frames) bit count = 5 */
10353 },
10354 { /* f1600 */
10355 10046, /* A1 = -0.613190 */
10356 -32331, /* A2 = 0.986694 */
10357 -455, /* B2 = -0.013915 */
10358 0, /* B1 = 0.000000 */
10359 455, /* B0 = 0.013915 */
10360 9694, /* A1 = -0.591705 */
10361 -32601, /* A2 = 0.994934 */
10362 6023, /* B2 = 0.183815 */
10363 -1708, /* B1 = -0.104279 */
10364 6023, /* B0 = 0.183815 */
10365 10478, /* A1 = -0.639587 */
10366 -32603, /* A2 = 0.994965 */
10367 22031, /* B2 = 0.672333 */
10368 -7342, /* B1 = -0.448151 */
10369 22031, /* B0 = 0.672333 */
10370 5, /* Internal filter scaling */
10371 159, /* Minimum in-band energy threshold */
10372 21, /* 21/32 in-band to broad-band ratio */
10373 0x0FF5 /* shift-mask 0x0FF (look at 16 half-frames) bit count = 5 */
10374 },
10375 { /* f1633_1638[] */
10376 9181, /* A1 = 0.560394 */
10377 -32256, /* A2 = -0.984375 */
10378 -556, /* B2 = -0.016975 */
10379 0, /* B1 = 0 */
10380 556, /* B0 = 0.016975 */
10381 8757, /* A1 = 0.534515 */
10382 -32574, /* A2 = -0.99408 */
10383 8443, /* B2 = 0.25769 */
10384 -2135, /* B1 = -0.130341 */
10385 8443, /* B0 = 0.25769 */
10386 9691, /* A1 = 0.591522 */
10387 -32574, /* A2 = -0.99411 */
10388 15446, /* B2 = 0.471375 */
10389 -4809, /* B1 = -0.293579 */
10390 15446, /* B0 = 0.471375 */
10391 7, /* Internal filter scaling */
10392 159, /* Minimum in-band energy threshold */
10393 21, /* 21/32 in-band to broad-band ratio */
10394 0x0FF5 /* shift-mask 0x0FF (look at 16 half-frames) bit count = 5 */
10395 },
10396 { /* f1800 */
10397 5076, /* A1 = -0.309875 */
10398 -32304, /* A2 = 0.985840 */
10399 -508, /* B2 = -0.015503 */
10400 0, /* B1 = 0.000000 */
10401 508, /* B0 = 0.015503 */
10402 4646, /* A1 = -0.283600 */
10403 -32605, /* A2 = 0.995026 */
10404 6742, /* B2 = 0.205780 */
10405 -878, /* B1 = -0.053635 */
10406 6742, /* B0 = 0.205780 */
10407 5552, /* A1 = -0.338928 */
10408 -32605, /* A2 = 0.995056 */
10409 23667, /* B2 = 0.722260 */
10410 -4297, /* B1 = -0.262329 */
10411 23667, /* B0 = 0.722260 */
10412 5, /* Internal filter scaling */
10413 159, /* Minimum in-band energy threshold */
10414 21, /* 21/32 in-band to broad-band ratio */
10415 0x0FF5 /* shift-mask 0x0FF (look at 16 half-frames) bit count = 5 */
10416 },
10417 { /* f1860 */
10418 3569, /* A1 = -0.217865 */
10419 -32292, /* A2 = 0.985504 */
10420 -239, /* B2 = -0.007322 */
10421 0, /* B1 = 0.000000 */
10422 239, /* B0 = 0.007322 */
10423 3117, /* A1 = -0.190277 */
10424 -32603, /* A2 = 0.994965 */
10425 18658, /* B2 = 0.569427 */
10426 -1557, /* B1 = -0.095032 */
10427 18658, /* B0 = 0.569427 */
10428 4054, /* A1 = -0.247437 */
10429 -32603, /* A2 = 0.994965 */
10430 18886, /* B2 = 0.576385 */
10431 -2566, /* B1 = -0.156647 */
10432 18886, /* B0 = 0.576385 */
10433 5, /* Internal filter scaling */
10434 159, /* Minimum in-band energy threshold */
10435 21, /* 21/32 in-band to broad-band ratio */
10436 0x0FF5 /* shift-mask 0x0FF (look at 16 half-frames) bit count = 5 */
10437 },
10438};
10439static int ixj_init_filter(IXJ *j, IXJ_FILTER * jf)
10440{
10441 unsigned short cmd;
10442 int cnt, max;
10443
10444 if (jf->filter > 3) {
10445 return -1;
10446 }
10447 if (ixj_WriteDSPCommand(0x5154 + jf->filter, j)) /* Select Filter */
10448
10449 return -1;
10450 if (!jf->enable) {
10451 if (ixj_WriteDSPCommand(0x5152, j)) /* Disable Filter */
10452
10453 return -1;
10454 else
10455 return 0;
10456 } else {
10457 if (ixj_WriteDSPCommand(0x5153, j)) /* Enable Filter */
10458
10459 return -1;
10460 /* Select the filter (f0 - f3) to use. */
10461 if (ixj_WriteDSPCommand(0x5154 + jf->filter, j))
10462 return -1;
10463 }
10464 if (jf->freq < 12 && jf->freq > 3) {
10465 /* Select the frequency for the selected filter. */
10466 if (ixj_WriteDSPCommand(0x5170 + jf->freq, j))
10467 return -1;
10468 } else if (jf->freq > 11) {
10469 /* We need to load a programmable filter set for undefined */
10470 /* frequencies. So we will point the filter to a programmable set. */
10471 /* Since there are only 4 filters and 4 programmable sets, we will */
10472 /* just point the filter to the same number set and program it for the */
10473 /* frequency we want. */
10474 if (ixj_WriteDSPCommand(0x5170 + jf->filter, j))
10475 return -1;
10476 if (j->ver.low != 0x12) {
10477 cmd = 0x515B;
10478 max = 19;
10479 } else {
10480 cmd = 0x515E;
10481 max = 15;
10482 }
10483 if (ixj_WriteDSPCommand(cmd, j))
10484 return -1;
10485 for (cnt = 0; cnt < max; cnt++) {
10486 if (ixj_WriteDSPCommand(tone_table[jf->freq - 12][cnt], j))
10487 return -1;
10488 }
10489 }
10490 j->filter_en[jf->filter] = jf->enable;
10491 return 0;
10492}
10493
10494static int ixj_init_filter_raw(IXJ *j, IXJ_FILTER_RAW * jfr)
10495{
10496 unsigned short cmd;
10497 int cnt, max;
10498 if (jfr->filter > 3) {
10499 return -1;
10500 }
10501 if (ixj_WriteDSPCommand(0x5154 + jfr->filter, j)) /* Select Filter */
10502 return -1;
10503
10504 if (!jfr->enable) {
10505 if (ixj_WriteDSPCommand(0x5152, j)) /* Disable Filter */
10506 return -1;
10507 else
10508 return 0;
10509 } else {
10510 if (ixj_WriteDSPCommand(0x5153, j)) /* Enable Filter */
10511 return -1;
10512 /* Select the filter (f0 - f3) to use. */
10513 if (ixj_WriteDSPCommand(0x5154 + jfr->filter, j))
10514 return -1;
10515 }
10516 /* We need to load a programmable filter set for undefined */
10517 /* frequencies. So we will point the filter to a programmable set. */
10518 /* Since there are only 4 filters and 4 programmable sets, we will */
10519 /* just point the filter to the same number set and program it for the */
10520 /* frequency we want. */
10521 if (ixj_WriteDSPCommand(0x5170 + jfr->filter, j))
10522 return -1;
10523 if (j->ver.low != 0x12) {
10524 cmd = 0x515B;
10525 max = 19;
10526 } else {
10527 cmd = 0x515E;
10528 max = 15;
10529 }
10530 if (ixj_WriteDSPCommand(cmd, j))
10531 return -1;
10532 for (cnt = 0; cnt < max; cnt++) {
10533 if (ixj_WriteDSPCommand(jfr->coeff[cnt], j))
10534 return -1;
10535 }
10536 j->filter_en[jfr->filter] = jfr->enable;
10537 return 0;
10538}
10539
10540static int ixj_init_tone(IXJ *j, IXJ_TONE * ti)
10541{
10542 int freq0, freq1;
10543 unsigned short data;
10544 if (ti->freq0) {
10545 freq0 = ti->freq0;
10546 } else {
10547 freq0 = 0x7FFF;
10548 }
10549
10550 if (ti->freq1) {
10551 freq1 = ti->freq1;
10552 } else {
10553 freq1 = 0x7FFF;
10554 }
10555
10556 if(ti->tone_index > 12 && ti->tone_index < 28)
10557 {
10558 if (ixj_WriteDSPCommand(0x6800 + ti->tone_index, j))
10559 return -1;
10560 if (ixj_WriteDSPCommand(0x6000 + (ti->gain1 << 4) + ti->gain0, j))
10561 return -1;
10562 data = freq0;
10563 if (ixj_WriteDSPCommand(data, j))
10564 return -1;
10565 data = freq1;
10566 if (ixj_WriteDSPCommand(data, j))
10567 return -1;
10568 }
10569 return freq0;
10570}
10571
diff --git a/drivers/staging/telephony/ixj.h b/drivers/staging/telephony/ixj.h
deleted file mode 100644
index 2c841134f61c..000000000000
--- a/drivers/staging/telephony/ixj.h
+++ /dev/null
@@ -1,1322 +0,0 @@
1/******************************************************************************
2 * ixj.h
3 *
4 *
5 * Device Driver for Quicknet Technologies, Inc.'s Telephony cards
6 * including the Internet PhoneJACK, Internet PhoneJACK Lite,
7 * Internet PhoneJACK PCI, Internet LineJACK, Internet PhoneCARD and
8 * SmartCABLE
9 *
10 * (c) Copyright 1999-2001 Quicknet Technologies, Inc.
11 *
12 * This program is free software; you can redistribute it and/or
13 * modify it under the terms of the GNU General Public License
14 * as published by the Free Software Foundation; either version
15 * 2 of the License, or (at your option) any later version.
16 *
17 * Author: Ed Okerson, <eokerson@quicknet.net>
18 *
19 * Contributors: Greg Herlein, <gherlein@quicknet.net>
20 * David W. Erhart, <derhart@quicknet.net>
21 * John Sellers, <jsellers@quicknet.net>
22 * Mike Preston, <mpreston@quicknet.net>
23 *
24 * More information about the hardware related to this driver can be found
25 * at our website: http://www.quicknet.net
26 *
27 * Fixes:
28 *
29 * IN NO EVENT SHALL QUICKNET TECHNOLOGIES, INC. BE LIABLE TO ANY PARTY FOR
30 * DIRECT, INDIRECT, SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES ARISING OUT
31 * OF THE USE OF THIS SOFTWARE AND ITS DOCUMENTATION, EVEN IF QUICKNET
32 * TECHNOLOGIES, INC.HAS BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
33 *
34 * QUICKNET TECHNOLOGIES, INC. SPECIFICALLY DISCLAIMS ANY WARRANTIES,
35 * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY
36 * AND FITNESS FOR A PARTICULAR PURPOSE. THE SOFTWARE PROVIDED HEREUNDER IS
37 * ON AN "AS IS" BASIS, AND QUICKNET TECHNOLOGIES, INC. HAS NO OBLIGATION
38 * TO PROVIDE MAINTENANCE, SUPPORT, UPDATES, ENHANCEMENTS, OR MODIFICATIONS.
39 *
40 *****************************************************************************/
41#define IXJ_VERSION 3031
42
43#include <linux/types.h>
44
45#include <linux/ixjuser.h>
46#include <linux/phonedev.h>
47
48typedef __u16 WORD;
49typedef __u32 DWORD;
50typedef __u8 BYTE;
51
52#ifndef IXJMAX
53#define IXJMAX 16
54#endif
55
56/******************************************************************************
57*
58* This structure when unioned with the structures below makes simple byte
59* access to the registers easier.
60*
61******************************************************************************/
62typedef struct {
63 unsigned char low;
64 unsigned char high;
65} BYTES;
66
67typedef union {
68 BYTES bytes;
69 short word;
70} IXJ_WORD;
71
72typedef struct{
73 unsigned int b0:1;
74 unsigned int b1:1;
75 unsigned int b2:1;
76 unsigned int b3:1;
77 unsigned int b4:1;
78 unsigned int b5:1;
79 unsigned int b6:1;
80 unsigned int b7:1;
81} IXJ_CBITS;
82
83typedef union{
84 IXJ_CBITS cbits;
85 char cbyte;
86} IXJ_CBYTE;
87
88/******************************************************************************
89*
90* This structure represents the Hardware Control Register of the CT8020/8021
91* The CT8020 is used in the Internet PhoneJACK, and the 8021 in the
92* Internet LineJACK
93*
94******************************************************************************/
95typedef struct {
96 unsigned int rxrdy:1;
97 unsigned int txrdy:1;
98 unsigned int status:1;
99 unsigned int auxstatus:1;
100 unsigned int rxdma:1;
101 unsigned int txdma:1;
102 unsigned int rxburst:1;
103 unsigned int txburst:1;
104 unsigned int dmadir:1;
105 unsigned int cont:1;
106 unsigned int irqn:1;
107 unsigned int t:5;
108} HCRBIT;
109
110typedef union {
111 HCRBIT bits;
112 BYTES bytes;
113} HCR;
114
115/******************************************************************************
116*
117* This structure represents the Hardware Status Register of the CT8020/8021
118* The CT8020 is used in the Internet PhoneJACK, and the 8021 in the
119* Internet LineJACK
120*
121******************************************************************************/
122typedef struct {
123 unsigned int controlrdy:1;
124 unsigned int auxctlrdy:1;
125 unsigned int statusrdy:1;
126 unsigned int auxstatusrdy:1;
127 unsigned int rxrdy:1;
128 unsigned int txrdy:1;
129 unsigned int restart:1;
130 unsigned int irqn:1;
131 unsigned int rxdma:1;
132 unsigned int txdma:1;
133 unsigned int cohostshutdown:1;
134 unsigned int t:5;
135} HSRBIT;
136
137typedef union {
138 HSRBIT bits;
139 BYTES bytes;
140} HSR;
141
142/******************************************************************************
143*
144* This structure represents the General Purpose IO Register of the CT8020/8021
145* The CT8020 is used in the Internet PhoneJACK, and the 8021 in the
146* Internet LineJACK
147*
148******************************************************************************/
149typedef struct {
150 unsigned int x:1;
151 unsigned int gpio1:1;
152 unsigned int gpio2:1;
153 unsigned int gpio3:1;
154 unsigned int gpio4:1;
155 unsigned int gpio5:1;
156 unsigned int gpio6:1;
157 unsigned int gpio7:1;
158 unsigned int xread:1;
159 unsigned int gpio1read:1;
160 unsigned int gpio2read:1;
161 unsigned int gpio3read:1;
162 unsigned int gpio4read:1;
163 unsigned int gpio5read:1;
164 unsigned int gpio6read:1;
165 unsigned int gpio7read:1;
166} GPIOBIT;
167
168typedef union {
169 GPIOBIT bits;
170 BYTES bytes;
171 unsigned short word;
172} GPIO;
173
174/******************************************************************************
175*
176* This structure represents the Line Monitor status response
177*
178******************************************************************************/
179typedef struct {
180 unsigned int digit:4;
181 unsigned int cpf_valid:1;
182 unsigned int dtmf_valid:1;
183 unsigned int peak:1;
184 unsigned int z:1;
185 unsigned int f0:1;
186 unsigned int f1:1;
187 unsigned int f2:1;
188 unsigned int f3:1;
189 unsigned int frame:4;
190} LMON;
191
192typedef union {
193 LMON bits;
194 BYTES bytes;
195} DTMF;
196
197typedef struct {
198 unsigned int z:7;
199 unsigned int dtmf_en:1;
200 unsigned int y:4;
201 unsigned int F3:1;
202 unsigned int F2:1;
203 unsigned int F1:1;
204 unsigned int F0:1;
205} CP;
206
207typedef union {
208 CP bits;
209 BYTES bytes;
210} CPTF;
211
212/******************************************************************************
213*
214* This structure represents the Status Control Register on the Internet
215* LineJACK
216*
217******************************************************************************/
218typedef struct {
219 unsigned int c0:1;
220 unsigned int c1:1;
221 unsigned int stereo:1;
222 unsigned int daafsyncen:1;
223 unsigned int led1:1;
224 unsigned int led2:1;
225 unsigned int led3:1;
226 unsigned int led4:1;
227} PSCRWI; /* Internet LineJACK and Internet PhoneJACK Lite */
228
229typedef struct {
230 unsigned int eidp:1;
231 unsigned int eisd:1;
232 unsigned int x:6;
233} PSCRWP; /* Internet PhoneJACK PCI */
234
235typedef union {
236 PSCRWI bits;
237 PSCRWP pcib;
238 char byte;
239} PLD_SCRW;
240
241typedef struct {
242 unsigned int c0:1;
243 unsigned int c1:1;
244 unsigned int x:1;
245 unsigned int d0ee:1;
246 unsigned int mixerbusy:1;
247 unsigned int sci:1;
248 unsigned int dspflag:1;
249 unsigned int daaflag:1;
250} PSCRRI;
251
252typedef struct {
253 unsigned int eidp:1;
254 unsigned int eisd:1;
255 unsigned int x:4;
256 unsigned int dspflag:1;
257 unsigned int det:1;
258} PSCRRP;
259
260typedef union {
261 PSCRRI bits;
262 PSCRRP pcib;
263 char byte;
264} PLD_SCRR;
265
266/******************************************************************************
267*
268* These structures represents the SLIC Control Register on the
269* Internet LineJACK
270*
271******************************************************************************/
272typedef struct {
273 unsigned int c1:1;
274 unsigned int c2:1;
275 unsigned int c3:1;
276 unsigned int b2en:1;
277 unsigned int spken:1;
278 unsigned int rly1:1;
279 unsigned int rly2:1;
280 unsigned int rly3:1;
281} PSLICWRITE;
282
283typedef struct {
284 unsigned int state:3;
285 unsigned int b2en:1;
286 unsigned int spken:1;
287 unsigned int c3:1;
288 unsigned int potspstn:1;
289 unsigned int det:1;
290} PSLICREAD;
291
292typedef struct {
293 unsigned int c1:1;
294 unsigned int c2:1;
295 unsigned int c3:1;
296 unsigned int b2en:1;
297 unsigned int e1:1;
298 unsigned int mic:1;
299 unsigned int spk:1;
300 unsigned int x:1;
301} PSLICPCI;
302
303typedef union {
304 PSLICPCI pcib;
305 PSLICWRITE bits;
306 PSLICREAD slic;
307 char byte;
308} PLD_SLICW;
309
310typedef union {
311 PSLICPCI pcib;
312 PSLICREAD bits;
313 char byte;
314} PLD_SLICR;
315
316/******************************************************************************
317*
318* These structures represents the Clock Control Register on the
319* Internet LineJACK
320*
321******************************************************************************/
322typedef struct {
323 unsigned int clk0:1;
324 unsigned int clk1:1;
325 unsigned int clk2:1;
326 unsigned int x0:1;
327 unsigned int slic_e1:1;
328 unsigned int x1:1;
329 unsigned int x2:1;
330 unsigned int x3:1;
331} PCLOCK;
332
333typedef union {
334 PCLOCK bits;
335 char byte;
336} PLD_CLOCK;
337
338/******************************************************************************
339*
340* These structures deal with the mixer on the Internet LineJACK
341*
342******************************************************************************/
343
344typedef struct {
345 unsigned short vol[10];
346 unsigned int recsrc;
347 unsigned int modcnt;
348 unsigned short micpreamp;
349} MIX;
350
351/******************************************************************************
352*
353* These structures deal with the control logic on the Internet PhoneCARD
354*
355******************************************************************************/
356typedef struct {
357 unsigned int x0:4; /* unused bits */
358
359 unsigned int ed:1; /* Event Detect */
360
361 unsigned int drf:1; /* SmartCABLE Removal Flag 1=no cable */
362
363 unsigned int dspf:1; /* DSP Flag 1=DSP Ready */
364
365 unsigned int crr:1; /* Control Register Ready */
366
367} COMMAND_REG1;
368
369typedef union {
370 COMMAND_REG1 bits;
371 unsigned char byte;
372} PCMCIA_CR1;
373
374typedef struct {
375 unsigned int x0:4; /* unused bits */
376
377 unsigned int rstc:1; /* SmartCABLE Reset */
378
379 unsigned int pwr:1; /* SmartCABLE Power */
380
381 unsigned int x1:2; /* unused bits */
382
383} COMMAND_REG2;
384
385typedef union {
386 COMMAND_REG2 bits;
387 unsigned char byte;
388} PCMCIA_CR2;
389
390typedef struct {
391 unsigned int addr:5; /* R/W SmartCABLE Register Address */
392
393 unsigned int rw:1; /* Read / Write flag */
394
395 unsigned int dev:2; /* 2 bit SmartCABLE Device Address */
396
397} CONTROL_REG;
398
399typedef union {
400 CONTROL_REG bits;
401 unsigned char byte;
402} PCMCIA_SCCR;
403
404typedef struct {
405 unsigned int hsw:1;
406 unsigned int det:1;
407 unsigned int led2:1;
408 unsigned int led1:1;
409 unsigned int ring1:1;
410 unsigned int ring0:1;
411 unsigned int x:1;
412 unsigned int powerdown:1;
413} PCMCIA_SLIC_REG;
414
415typedef union {
416 PCMCIA_SLIC_REG bits;
417 unsigned char byte;
418} PCMCIA_SLIC;
419
420typedef struct {
421 unsigned int cpd:1; /* Chip Power Down */
422
423 unsigned int mpd:1; /* MIC Bias Power Down */
424
425 unsigned int hpd:1; /* Handset Drive Power Down */
426
427 unsigned int lpd:1; /* Line Drive Power Down */
428
429 unsigned int spd:1; /* Speaker Drive Power Down */
430
431 unsigned int x:2; /* unused bits */
432
433 unsigned int sr:1; /* Software Reset */
434
435} Si3CONTROL1;
436
437typedef union {
438 Si3CONTROL1 bits;
439 unsigned char byte;
440} Si3C1;
441
442typedef struct {
443 unsigned int al:1; /* Analog Loopback DAC analog -> ADC analog */
444
445 unsigned int dl2:1; /* Digital Loopback DAC -> ADC one bit */
446
447 unsigned int dl1:1; /* Digital Loopback ADC -> DAC one bit */
448
449 unsigned int pll:1; /* 1 = div 10, 0 = div 5 */
450
451 unsigned int hpd:1; /* HPF disable */
452
453 unsigned int x:3; /* unused bits */
454
455} Si3CONTROL2;
456
457typedef union {
458 Si3CONTROL2 bits;
459 unsigned char byte;
460} Si3C2;
461
462typedef struct {
463 unsigned int iir:1; /* 1 enables IIR, 0 enables FIR */
464
465 unsigned int him:1; /* Handset Input Mute */
466
467 unsigned int mcm:1; /* MIC In Mute */
468
469 unsigned int mcg:2; /* MIC In Gain */
470
471 unsigned int lim:1; /* Line In Mute */
472
473 unsigned int lig:2; /* Line In Gain */
474
475} Si3RXGAIN;
476
477typedef union {
478 Si3RXGAIN bits;
479 unsigned char byte;
480} Si3RXG;
481
482typedef struct {
483 unsigned int hom:1; /* Handset Out Mute */
484
485 unsigned int lom:1; /* Line Out Mute */
486
487 unsigned int rxg:5; /* RX PGA Gain */
488
489 unsigned int x:1; /* unused bit */
490
491} Si3ADCVOLUME;
492
493typedef union {
494 Si3ADCVOLUME bits;
495 unsigned char byte;
496} Si3ADC;
497
498typedef struct {
499 unsigned int srm:1; /* Speaker Right Mute */
500
501 unsigned int slm:1; /* Speaker Left Mute */
502
503 unsigned int txg:5; /* TX PGA Gain */
504
505 unsigned int x:1; /* unused bit */
506
507} Si3DACVOLUME;
508
509typedef union {
510 Si3DACVOLUME bits;
511 unsigned char byte;
512} Si3DAC;
513
514typedef struct {
515 unsigned int x:5; /* unused bit */
516
517 unsigned int losc:1; /* Line Out Short Circuit */
518
519 unsigned int srsc:1; /* Speaker Right Short Circuit */
520
521 unsigned int slsc:1; /* Speaker Left Short Circuit */
522
523} Si3STATUSREPORT;
524
525typedef union {
526 Si3STATUSREPORT bits;
527 unsigned char byte;
528} Si3STAT;
529
530typedef struct {
531 unsigned int sot:2; /* Speaker Out Attenuation */
532
533 unsigned int lot:2; /* Line Out Attenuation */
534
535 unsigned int x:4; /* unused bits */
536
537} Si3ANALOGATTN;
538
539typedef union {
540 Si3ANALOGATTN bits;
541 unsigned char byte;
542} Si3AATT;
543
544/******************************************************************************
545*
546* These structures deal with the DAA on the Internet LineJACK
547*
548******************************************************************************/
549
550typedef struct _DAA_REGS {
551 /*----------------------------------------------- */
552 /* SOP Registers */
553 /* */
554 BYTE bySOP;
555
556 union _SOP_REGS {
557 struct _SOP {
558 union /* SOP - CR0 Register */
559 {
560 BYTE reg;
561 struct _CR0_BITREGS {
562 BYTE CLK_EXT:1; /* cr0[0:0] */
563
564 BYTE RIP:1; /* cr0[1:1] */
565
566 BYTE AR:1; /* cr0[2:2] */
567
568 BYTE AX:1; /* cr0[3:3] */
569
570 BYTE FRR:1; /* cr0[4:4] */
571
572 BYTE FRX:1; /* cr0[5:5] */
573
574 BYTE IM:1; /* cr0[6:6] */
575
576 BYTE TH:1; /* cr0[7:7] */
577
578 } bitreg;
579 } cr0;
580
581 union /* SOP - CR1 Register */
582 {
583 BYTE reg;
584 struct _CR1_REGS {
585 BYTE RM:1; /* cr1[0:0] */
586
587 BYTE RMR:1; /* cr1[1:1] */
588
589 BYTE No_auto:1; /* cr1[2:2] */
590
591 BYTE Pulse:1; /* cr1[3:3] */
592
593 BYTE P_Tone1:1; /* cr1[4:4] */
594
595 BYTE P_Tone2:1; /* cr1[5:5] */
596
597 BYTE E_Tone1:1; /* cr1[6:6] */
598
599 BYTE E_Tone2:1; /* cr1[7:7] */
600
601 } bitreg;
602 } cr1;
603
604 union /* SOP - CR2 Register */
605 {
606 BYTE reg;
607 struct _CR2_REGS {
608 BYTE Call_II:1; /* CR2[0:0] */
609
610 BYTE Call_I:1; /* CR2[1:1] */
611
612 BYTE Call_en:1; /* CR2[2:2] */
613
614 BYTE Call_pon:1; /* CR2[3:3] */
615
616 BYTE IDR:1; /* CR2[4:4] */
617
618 BYTE COT_R:3; /* CR2[5:7] */
619
620 } bitreg;
621 } cr2;
622
623 union /* SOP - CR3 Register */
624 {
625 BYTE reg;
626 struct _CR3_REGS {
627 BYTE DHP_X:1; /* CR3[0:0] */
628
629 BYTE DHP_R:1; /* CR3[1:1] */
630
631 BYTE Cal_pctl:1; /* CR3[2:2] */
632
633 BYTE SEL:1; /* CR3[3:3] */
634
635 BYTE TestLoops:4; /* CR3[4:7] */
636
637 } bitreg;
638 } cr3;
639
640 union /* SOP - CR4 Register */
641 {
642 BYTE reg;
643 struct _CR4_REGS {
644 BYTE Fsc_en:1; /* CR4[0:0] */
645
646 BYTE Int_en:1; /* CR4[1:1] */
647
648 BYTE AGX:2; /* CR4[2:3] */
649
650 BYTE AGR_R:2; /* CR4[4:5] */
651
652 BYTE AGR_Z:2; /* CR4[6:7] */
653
654 } bitreg;
655 } cr4;
656
657 union /* SOP - CR5 Register */
658 {
659 BYTE reg;
660 struct _CR5_REGS {
661 BYTE V_0:1; /* CR5[0:0] */
662
663 BYTE V_1:1; /* CR5[1:1] */
664
665 BYTE V_2:1; /* CR5[2:2] */
666
667 BYTE V_3:1; /* CR5[3:3] */
668
669 BYTE V_4:1; /* CR5[4:4] */
670
671 BYTE V_5:1; /* CR5[5:5] */
672
673 BYTE V_6:1; /* CR5[6:6] */
674
675 BYTE V_7:1; /* CR5[7:7] */
676
677 } bitreg;
678 } cr5;
679
680 union /* SOP - CR6 Register */
681 {
682 BYTE reg;
683 struct _CR6_REGS {
684 BYTE reserved:8; /* CR6[0:7] */
685
686 } bitreg;
687 } cr6;
688
689 union /* SOP - CR7 Register */
690 {
691 BYTE reg;
692 struct _CR7_REGS {
693 BYTE reserved:8; /* CR7[0:7] */
694
695 } bitreg;
696 } cr7;
697 } SOP;
698
699 BYTE ByteRegs[sizeof(struct _SOP)];
700
701 } SOP_REGS;
702
703 /* DAA_REGS.SOP_REGS.SOP.CR5.reg */
704 /* DAA_REGS.SOP_REGS.SOP.CR5.bitreg */
705 /* DAA_REGS.SOP_REGS.SOP.CR5.bitreg.V_2 */
706 /* DAA_REGS.SOP_REGS.ByteRegs[5] */
707
708 /*----------------------------------------------- */
709 /* XOP Registers */
710 /* */
711 BYTE byXOP;
712
713 union _XOP_REGS {
714 struct _XOP {
715 union XOPXR0/* XOP - XR0 Register - Read values */
716 {
717 BYTE reg;
718 struct _XR0_BITREGS {
719 BYTE SI_0:1; /* XR0[0:0] - Read */
720
721 BYTE SI_1:1; /* XR0[1:1] - Read */
722
723 BYTE VDD_OK:1; /* XR0[2:2] - Read */
724
725 BYTE Caller_ID:1; /* XR0[3:3] - Read */
726
727 BYTE RING:1; /* XR0[4:4] - Read */
728
729 BYTE Cadence:1; /* XR0[5:5] - Read */
730
731 BYTE Wake_up:1; /* XR0[6:6] - Read */
732
733 BYTE RMR:1; /* XR0[7:7] - Read */
734
735 } bitreg;
736 } xr0;
737
738 union /* XOP - XR1 Register */
739 {
740 BYTE reg;
741 struct _XR1_BITREGS {
742 BYTE M_SI_0:1; /* XR1[0:0] */
743
744 BYTE M_SI_1:1; /* XR1[1:1] */
745
746 BYTE M_VDD_OK:1; /* XR1[2:2] */
747
748 BYTE M_Caller_ID:1; /* XR1[3:3] */
749
750 BYTE M_RING:1; /* XR1[4:4] */
751
752 BYTE M_Cadence:1; /* XR1[5:5] */
753
754 BYTE M_Wake_up:1; /* XR1[6:6] */
755
756 BYTE unused:1; /* XR1[7:7] */
757
758 } bitreg;
759 } xr1;
760
761 union /* XOP - XR2 Register */
762 {
763 BYTE reg;
764 struct _XR2_BITREGS {
765 BYTE CTO0:1; /* XR2[0:0] */
766
767 BYTE CTO1:1; /* XR2[1:1] */
768
769 BYTE CTO2:1; /* XR2[2:2] */
770
771 BYTE CTO3:1; /* XR2[3:3] */
772
773 BYTE CTO4:1; /* XR2[4:4] */
774
775 BYTE CTO5:1; /* XR2[5:5] */
776
777 BYTE CTO6:1; /* XR2[6:6] */
778
779 BYTE CTO7:1; /* XR2[7:7] */
780
781 } bitreg;
782 } xr2;
783
784 union /* XOP - XR3 Register */
785 {
786 BYTE reg;
787 struct _XR3_BITREGS {
788 BYTE DCR0:1; /* XR3[0:0] */
789
790 BYTE DCR1:1; /* XR3[1:1] */
791
792 BYTE DCI:1; /* XR3[2:2] */
793
794 BYTE DCU0:1; /* XR3[3:3] */
795
796 BYTE DCU1:1; /* XR3[4:4] */
797
798 BYTE B_off:1; /* XR3[5:5] */
799
800 BYTE AGB0:1; /* XR3[6:6] */
801
802 BYTE AGB1:1; /* XR3[7:7] */
803
804 } bitreg;
805 } xr3;
806
807 union /* XOP - XR4 Register */
808 {
809 BYTE reg;
810 struct _XR4_BITREGS {
811 BYTE C_0:1; /* XR4[0:0] */
812
813 BYTE C_1:1; /* XR4[1:1] */
814
815 BYTE C_2:1; /* XR4[2:2] */
816
817 BYTE C_3:1; /* XR4[3:3] */
818
819 BYTE C_4:1; /* XR4[4:4] */
820
821 BYTE C_5:1; /* XR4[5:5] */
822
823 BYTE C_6:1; /* XR4[6:6] */
824
825 BYTE C_7:1; /* XR4[7:7] */
826
827 } bitreg;
828 } xr4;
829
830 union /* XOP - XR5 Register */
831 {
832 BYTE reg;
833 struct _XR5_BITREGS {
834 BYTE T_0:1; /* XR5[0:0] */
835
836 BYTE T_1:1; /* XR5[1:1] */
837
838 BYTE T_2:1; /* XR5[2:2] */
839
840 BYTE T_3:1; /* XR5[3:3] */
841
842 BYTE T_4:1; /* XR5[4:4] */
843
844 BYTE T_5:1; /* XR5[5:5] */
845
846 BYTE T_6:1; /* XR5[6:6] */
847
848 BYTE T_7:1; /* XR5[7:7] */
849
850 } bitreg;
851 } xr5;
852
853 union /* XOP - XR6 Register - Read Values */
854 {
855 BYTE reg;
856 struct _XR6_BITREGS {
857 BYTE CPS0:1; /* XR6[0:0] */
858
859 BYTE CPS1:1; /* XR6[1:1] */
860
861 BYTE unused1:2; /* XR6[2:3] */
862
863 BYTE CLK_OFF:1; /* XR6[4:4] */
864
865 BYTE unused2:3; /* XR6[5:7] */
866
867 } bitreg;
868 } xr6;
869
870 union /* XOP - XR7 Register */
871 {
872 BYTE reg;
873 struct _XR7_BITREGS {
874 BYTE unused1:1; /* XR7[0:0] */
875
876 BYTE Vdd0:1; /* XR7[1:1] */
877
878 BYTE Vdd1:1; /* XR7[2:2] */
879
880 BYTE unused2:5; /* XR7[3:7] */
881
882 } bitreg;
883 } xr7;
884 } XOP;
885
886 BYTE ByteRegs[sizeof(struct _XOP)];
887
888 } XOP_REGS;
889
890 /* DAA_REGS.XOP_REGS.XOP.XR7.reg */
891 /* DAA_REGS.XOP_REGS.XOP.XR7.bitreg */
892 /* DAA_REGS.XOP_REGS.XOP.XR7.bitreg.Vdd0 */
893 /* DAA_REGS.XOP_REGS.ByteRegs[7] */
894
895 /*----------------------------------------------- */
896 /* COP Registers */
897 /* */
898 BYTE byCOP;
899
900 union _COP_REGS {
901 struct _COP {
902 BYTE THFilterCoeff_1[8]; /* COP - TH Filter Coefficients, CODE=0, Part 1 */
903
904 BYTE THFilterCoeff_2[8]; /* COP - TH Filter Coefficients, CODE=1, Part 2 */
905
906 BYTE THFilterCoeff_3[8]; /* COP - TH Filter Coefficients, CODE=2, Part 3 */
907
908 BYTE RingerImpendance_1[8]; /* COP - Ringer Impendance Coefficients, CODE=3, Part 1 */
909
910 BYTE IMFilterCoeff_1[8]; /* COP - IM Filter Coefficients, CODE=4, Part 1 */
911
912 BYTE IMFilterCoeff_2[8]; /* COP - IM Filter Coefficients, CODE=5, Part 2 */
913
914 BYTE RingerImpendance_2[8]; /* COP - Ringer Impendance Coefficients, CODE=6, Part 2 */
915
916 BYTE FRRFilterCoeff[8]; /* COP - FRR Filter Coefficients, CODE=7 */
917
918 BYTE FRXFilterCoeff[8]; /* COP - FRX Filter Coefficients, CODE=8 */
919
920 BYTE ARFilterCoeff[4]; /* COP - AR Filter Coefficients, CODE=9 */
921
922 BYTE AXFilterCoeff[4]; /* COP - AX Filter Coefficients, CODE=10 */
923
924 BYTE Tone1Coeff[4]; /* COP - Tone1 Coefficients, CODE=11 */
925
926 BYTE Tone2Coeff[4]; /* COP - Tone2 Coefficients, CODE=12 */
927
928 BYTE LevelmeteringRinging[4]; /* COP - Levelmetering Ringing, CODE=13 */
929
930 BYTE CallerID1stTone[8]; /* COP - Caller ID 1st Tone, CODE=14 */
931
932 BYTE CallerID2ndTone[8]; /* COP - Caller ID 2nd Tone, CODE=15 */
933
934 } COP;
935
936 BYTE ByteRegs[sizeof(struct _COP)];
937
938 } COP_REGS;
939
940 /* DAA_REGS.COP_REGS.COP.XR7.Tone1Coeff[3] */
941 /* DAA_REGS.COP_REGS.COP.XR7.bitreg */
942 /* DAA_REGS.COP_REGS.COP.XR7.bitreg.Vdd0 */
943 /* DAA_REGS.COP_REGS.ByteRegs[57] */
944
945 /*----------------------------------------------- */
946 /* CAO Registers */
947 /* */
948 BYTE byCAO;
949
950 union _CAO_REGS {
951 struct _CAO {
952 BYTE CallerID[512]; /* CAO - Caller ID Bytes */
953
954 } CAO;
955
956 BYTE ByteRegs[sizeof(struct _CAO)];
957 } CAO_REGS;
958
959 union /* XOP - XR0 Register - Write values */
960 {
961 BYTE reg;
962 struct _XR0_BITREGSW {
963 BYTE SO_0:1; /* XR1[0:0] - Write */
964
965 BYTE SO_1:1; /* XR1[1:1] - Write */
966
967 BYTE SO_2:1; /* XR1[2:2] - Write */
968
969 BYTE unused:5; /* XR1[3:7] - Write */
970
971 } bitreg;
972 } XOP_xr0_W;
973
974 union /* XOP - XR6 Register - Write values */
975 {
976 BYTE reg;
977 struct _XR6_BITREGSW {
978 BYTE unused1:4; /* XR6[0:3] */
979
980 BYTE CLK_OFF:1; /* XR6[4:4] */
981
982 BYTE unused2:3; /* XR6[5:7] */
983
984 } bitreg;
985 } XOP_xr6_W;
986
987} DAA_REGS;
988
989#define ALISDAA_ID_BYTE 0x81
990#define ALISDAA_CALLERID_SIZE 512
991
992/*------------------------------ */
993/* */
994/* Misc definitions */
995/* */
996
997/* Power Up Operation */
998#define SOP_PU_SLEEP 0
999#define SOP_PU_RINGING 1
1000#define SOP_PU_CONVERSATION 2
1001#define SOP_PU_PULSEDIALING 3
1002#define SOP_PU_RESET 4
1003
1004#define ALISDAA_CALLERID_SIZE 512
1005
1006#define PLAYBACK_MODE_COMPRESSED 0 /* Selects: Compressed modes, TrueSpeech 8.5-4.1, G.723.1, G.722, G.728, G.729 */
1007#define PLAYBACK_MODE_TRUESPEECH_V40 0 /* Selects: TrueSpeech 8.5, 6.3, 5.3, 4.8 or 4.1 Kbps */
1008#define PLAYBACK_MODE_TRUESPEECH 8 /* Selects: TrueSpeech 8.5, 6.3, 5.3, 4.8 or 4.1 Kbps Version 5.1 */
1009#define PLAYBACK_MODE_ULAW 2 /* Selects: 64 Kbit/sec MuA-law PCM */
1010#define PLAYBACK_MODE_ALAW 10 /* Selects: 64 Kbit/sec A-law PCM */
1011#define PLAYBACK_MODE_16LINEAR 6 /* Selects: 128 Kbit/sec 16-bit linear */
1012#define PLAYBACK_MODE_8LINEAR 4 /* Selects: 64 Kbit/sec 8-bit signed linear */
1013#define PLAYBACK_MODE_8LINEAR_WSS 5 /* Selects: 64 Kbit/sec WSS 8-bit unsigned linear */
1014
1015#define RECORD_MODE_COMPRESSED 0 /* Selects: Compressed modes, TrueSpeech 8.5-4.1, G.723.1, G.722, G.728, G.729 */
1016#define RECORD_MODE_TRUESPEECH 0 /* Selects: TrueSpeech 8.5, 6.3, 5.3, 4.8 or 4.1 Kbps */
1017#define RECORD_MODE_ULAW 4 /* Selects: 64 Kbit/sec Mu-law PCM */
1018#define RECORD_MODE_ALAW 12 /* Selects: 64 Kbit/sec A-law PCM */
1019#define RECORD_MODE_16LINEAR 5 /* Selects: 128 Kbit/sec 16-bit linear */
1020#define RECORD_MODE_8LINEAR 6 /* Selects: 64 Kbit/sec 8-bit signed linear */
1021#define RECORD_MODE_8LINEAR_WSS 7 /* Selects: 64 Kbit/sec WSS 8-bit unsigned linear */
1022
1023enum SLIC_STATES {
1024 PLD_SLIC_STATE_OC = 0,
1025 PLD_SLIC_STATE_RINGING,
1026 PLD_SLIC_STATE_ACTIVE,
1027 PLD_SLIC_STATE_OHT,
1028 PLD_SLIC_STATE_TIPOPEN,
1029 PLD_SLIC_STATE_STANDBY,
1030 PLD_SLIC_STATE_APR,
1031 PLD_SLIC_STATE_OHTPR
1032};
1033
1034enum SCI_CONTROL {
1035 SCI_End = 0,
1036 SCI_Enable_DAA,
1037 SCI_Enable_Mixer,
1038 SCI_Enable_EEPROM
1039};
1040
1041enum Mode {
1042 T63, T53, T48, T40
1043};
1044enum Dir {
1045 V3_TO_V4, V4_TO_V3, V4_TO_V5, V5_TO_V4
1046};
1047
1048typedef struct Proc_Info_Tag {
1049 enum Mode convert_mode;
1050 enum Dir convert_dir;
1051 int Prev_Frame_Type;
1052 int Current_Frame_Type;
1053} Proc_Info_Type;
1054
1055enum PREVAL {
1056 NORMAL = 0,
1057 NOPOST,
1058 POSTONLY,
1059 PREERROR
1060};
1061
1062enum IXJ_EXTENSIONS {
1063 G729LOADER = 0,
1064 TS85LOADER,
1065 PRE_READ,
1066 POST_READ,
1067 PRE_WRITE,
1068 POST_WRITE,
1069 PRE_IOCTL,
1070 POST_IOCTL
1071};
1072
1073typedef struct {
1074 char enable;
1075 char en_filter;
1076 unsigned int filter;
1077 unsigned int state; /* State 0 when cadence has not started. */
1078
1079 unsigned int on1; /* State 1 */
1080
1081 unsigned long on1min; /* State 1 - 10% + jiffies */
1082 unsigned long on1dot; /* State 1 + jiffies */
1083
1084 unsigned long on1max; /* State 1 + 10% + jiffies */
1085
1086 unsigned int off1; /* State 2 */
1087
1088 unsigned long off1min;
1089 unsigned long off1dot; /* State 2 + jiffies */
1090 unsigned long off1max;
1091 unsigned int on2; /* State 3 */
1092
1093 unsigned long on2min;
1094 unsigned long on2dot;
1095 unsigned long on2max;
1096 unsigned int off2; /* State 4 */
1097
1098 unsigned long off2min;
1099 unsigned long off2dot; /* State 4 + jiffies */
1100 unsigned long off2max;
1101 unsigned int on3; /* State 5 */
1102
1103 unsigned long on3min;
1104 unsigned long on3dot;
1105 unsigned long on3max;
1106 unsigned int off3; /* State 6 */
1107
1108 unsigned long off3min;
1109 unsigned long off3dot; /* State 6 + jiffies */
1110 unsigned long off3max;
1111} IXJ_CADENCE_F;
1112
1113typedef struct {
1114 unsigned int busytone:1;
1115 unsigned int dialtone:1;
1116 unsigned int ringback:1;
1117 unsigned int ringing:1;
1118 unsigned int playing:1;
1119 unsigned int recording:1;
1120 unsigned int cringing:1;
1121 unsigned int play_first_frame:1;
1122 unsigned int pstn_present:1;
1123 unsigned int pstn_ringing:1;
1124 unsigned int pots_correct:1;
1125 unsigned int pots_pstn:1;
1126 unsigned int g729_loaded:1;
1127 unsigned int ts85_loaded:1;
1128 unsigned int dtmf_oob:1; /* DTMF Out-Of-Band */
1129
1130 unsigned int pcmciascp:1; /* SmartCABLE Present */
1131
1132 unsigned int pcmciasct:2; /* SmartCABLE Type */
1133
1134 unsigned int pcmciastate:3; /* SmartCABLE Init State */
1135
1136 unsigned int inwrite:1; /* Currently writing */
1137
1138 unsigned int inread:1; /* Currently reading */
1139
1140 unsigned int incheck:1; /* Currently checking the SmartCABLE */
1141
1142 unsigned int cidplay:1; /* Currently playing Caller ID */
1143
1144 unsigned int cidring:1; /* This is the ring for Caller ID */
1145
1146 unsigned int cidsent:1; /* Caller ID has been sent */
1147
1148 unsigned int cidcw_ack:1; /* Caller ID CW ACK (from CPE) */
1149 unsigned int firstring:1; /* First ring cadence is complete */
1150 unsigned int pstncheck:1; /* Currently checking the PSTN Line */
1151 unsigned int pstn_rmr:1;
1152 unsigned int x:3; /* unused bits */
1153
1154} IXJ_FLAGS;
1155
1156/******************************************************************************
1157*
1158* This structure holds the state of all of the Quicknet cards
1159*
1160******************************************************************************/
1161
1162typedef struct {
1163 int elements_used;
1164 IXJ_CADENCE_TERM termination;
1165 IXJ_CADENCE_ELEMENT *ce;
1166} ixj_cadence;
1167
1168typedef struct {
1169 struct phone_device p;
1170 struct timer_list timer;
1171 unsigned int board;
1172 unsigned int DSPbase;
1173 unsigned int XILINXbase;
1174 unsigned int serial;
1175 atomic_t DSPWrite;
1176 struct phone_capability caplist[30];
1177 unsigned int caps;
1178 struct pnp_dev *dev;
1179 unsigned int cardtype;
1180 unsigned int rec_codec;
1181 unsigned int cid_rec_codec;
1182 unsigned int cid_rec_volume;
1183 unsigned char cid_rec_flag;
1184 signed char rec_mode;
1185 unsigned int play_codec;
1186 unsigned int cid_play_codec;
1187 unsigned int cid_play_volume;
1188 unsigned char cid_play_flag;
1189 signed char play_mode;
1190 IXJ_FLAGS flags;
1191 unsigned long busyflags;
1192 unsigned int rec_frame_size;
1193 unsigned int play_frame_size;
1194 unsigned int cid_play_frame_size;
1195 unsigned int cid_base_frame_size;
1196 unsigned long cidcw_wait;
1197 int aec_level;
1198 int cid_play_aec_level;
1199 int readers, writers;
1200 wait_queue_head_t poll_q;
1201 wait_queue_head_t read_q;
1202 char *read_buffer, *read_buffer_end;
1203 char *read_convert_buffer;
1204 size_t read_buffer_size;
1205 unsigned int read_buffer_ready;
1206 wait_queue_head_t write_q;
1207 char *write_buffer, *write_buffer_end;
1208 char *write_convert_buffer;
1209 size_t write_buffer_size;
1210 unsigned int write_buffers_empty;
1211 unsigned long drybuffer;
1212 char *write_buffer_rp, *write_buffer_wp;
1213 char dtmfbuffer[80];
1214 char dtmf_current;
1215 int dtmf_wp, dtmf_rp, dtmf_state, dtmf_proc;
1216 int tone_off_time, tone_on_time;
1217 struct fasync_struct *async_queue;
1218 unsigned long tone_start_jif;
1219 char tone_index;
1220 char tone_state;
1221 char maxrings;
1222 ixj_cadence *cadence_t;
1223 ixj_cadence *cadence_r;
1224 int tone_cadence_state;
1225 IXJ_CADENCE_F cadence_f[6];
1226 DTMF dtmf;
1227 CPTF cptf;
1228 BYTES dsp;
1229 BYTES ver;
1230 BYTES scr;
1231 BYTES ssr;
1232 BYTES baseframe;
1233 HSR hsr;
1234 GPIO gpio;
1235 PLD_SCRR pld_scrr;
1236 PLD_SCRW pld_scrw;
1237 PLD_SLICW pld_slicw;
1238 PLD_SLICR pld_slicr;
1239 PLD_CLOCK pld_clock;
1240 PCMCIA_CR1 pccr1;
1241 PCMCIA_CR2 pccr2;
1242 PCMCIA_SCCR psccr;
1243 PCMCIA_SLIC pslic;
1244 char pscdd;
1245 Si3C1 sic1;
1246 Si3C2 sic2;
1247 Si3RXG sirxg;
1248 Si3ADC siadc;
1249 Si3DAC sidac;
1250 Si3STAT sistat;
1251 Si3AATT siaatt;
1252 MIX mix;
1253 unsigned short ring_cadence;
1254 int ring_cadence_t;
1255 unsigned long ring_cadence_jif;
1256 unsigned long checkwait;
1257 int intercom;
1258 int m_hook;
1259 int r_hook;
1260 int p_hook;
1261 char pstn_envelope;
1262 char pstn_cid_intr;
1263 unsigned char fskz;
1264 unsigned char fskphase;
1265 unsigned char fskcnt;
1266 unsigned int cidsize;
1267 unsigned int cidcnt;
1268 unsigned long pstn_cid_received;
1269 PHONE_CID cid;
1270 PHONE_CID cid_send;
1271 unsigned long pstn_ring_int;
1272 unsigned long pstn_ring_start;
1273 unsigned long pstn_ring_stop;
1274 unsigned long pstn_winkstart;
1275 unsigned long pstn_last_rmr;
1276 unsigned long pstn_prev_rmr;
1277 unsigned long pots_winkstart;
1278 unsigned int winktime;
1279 unsigned long flash_end;
1280 char port;
1281 char hookstate;
1282 union telephony_exception ex;
1283 union telephony_exception ex_sig;
1284 int ixj_signals[35];
1285 IXJ_SIGDEF sigdef;
1286 char daa_mode;
1287 char daa_country;
1288 unsigned long pstn_sleeptil;
1289 DAA_REGS m_DAAShadowRegs;
1290 Proc_Info_Type Info_read;
1291 Proc_Info_Type Info_write;
1292 unsigned short frame_count;
1293 unsigned int filter_hist[4];
1294 unsigned char filter_en[6];
1295 unsigned short proc_load;
1296 unsigned long framesread;
1297 unsigned long frameswritten;
1298 unsigned long read_wait;
1299 unsigned long write_wait;
1300 unsigned long timerchecks;
1301 unsigned long txreadycheck;
1302 unsigned long rxreadycheck;
1303 unsigned long statuswait;
1304 unsigned long statuswaitfail;
1305 unsigned long pcontrolwait;
1306 unsigned long pcontrolwaitfail;
1307 unsigned long iscontrolready;
1308 unsigned long iscontrolreadyfail;
1309 unsigned long pstnstatecheck;
1310#ifdef IXJ_DYN_ALLOC
1311 short *fskdata;
1312#else
1313 short fskdata[8000];
1314#endif
1315 int fsksize;
1316 int fskdcnt;
1317} IXJ;
1318
1319typedef int (*IXJ_REGFUNC) (IXJ * j, unsigned long arg);
1320
1321extern IXJ *ixj_pcmcia_probe(unsigned long, unsigned long);
1322
diff --git a/drivers/staging/telephony/ixj_pcmcia.c b/drivers/staging/telephony/ixj_pcmcia.c
deleted file mode 100644
index 05032e2cc954..000000000000
--- a/drivers/staging/telephony/ixj_pcmcia.c
+++ /dev/null
@@ -1,187 +0,0 @@
1#include "ixj-ver.h"
2
3#include <linux/module.h>
4
5#include <linux/init.h>
6#include <linux/kernel.h> /* printk() */
7#include <linux/fs.h> /* everything... */
8#include <linux/errno.h> /* error codes */
9#include <linux/slab.h>
10
11#include <pcmcia/cistpl.h>
12#include <pcmcia/ds.h>
13
14#include "ixj.h"
15
16/*
17 * PCMCIA service support for Quicknet cards
18 */
19
20
21typedef struct ixj_info_t {
22 int ndev;
23 struct ixj *port;
24} ixj_info_t;
25
26static void ixj_detach(struct pcmcia_device *p_dev);
27static int ixj_config(struct pcmcia_device * link);
28static void ixj_cs_release(struct pcmcia_device * link);
29
30static int ixj_probe(struct pcmcia_device *p_dev)
31{
32 dev_dbg(&p_dev->dev, "ixj_attach()\n");
33 /* Create new ixj device */
34 p_dev->priv = kzalloc(sizeof(struct ixj_info_t), GFP_KERNEL);
35 if (!p_dev->priv) {
36 return -ENOMEM;
37 }
38
39 return ixj_config(p_dev);
40}
41
42static void ixj_detach(struct pcmcia_device *link)
43{
44 dev_dbg(&link->dev, "ixj_detach\n");
45
46 ixj_cs_release(link);
47
48 kfree(link->priv);
49}
50
51static void ixj_get_serial(struct pcmcia_device * link, IXJ * j)
52{
53 char *str;
54 int i, place;
55 dev_dbg(&link->dev, "ixj_get_serial\n");
56
57 str = link->prod_id[0];
58 if (!str)
59 goto failed;
60 printk("%s", str);
61 str = link->prod_id[1];
62 if (!str)
63 goto failed;
64 printk(" %s", str);
65 str = link->prod_id[2];
66 if (!str)
67 goto failed;
68 place = 1;
69 for (i = strlen(str) - 1; i >= 0; i--) {
70 switch (str[i]) {
71 case '0':
72 case '1':
73 case '2':
74 case '3':
75 case '4':
76 case '5':
77 case '6':
78 case '7':
79 case '8':
80 case '9':
81 j->serial += (str[i] - 48) * place;
82 break;
83 case 'A':
84 case 'B':
85 case 'C':
86 case 'D':
87 case 'E':
88 case 'F':
89 j->serial += (str[i] - 55) * place;
90 break;
91 case 'a':
92 case 'b':
93 case 'c':
94 case 'd':
95 case 'e':
96 case 'f':
97 j->serial += (str[i] - 87) * place;
98 break;
99 }
100 place = place * 0x10;
101 }
102 str = link->prod_id[3];
103 if (!str)
104 goto failed;
105 printk(" version %s\n", str);
106failed:
107 return;
108}
109
110static int ixj_config_check(struct pcmcia_device *p_dev, void *priv_data)
111{
112 p_dev->resource[0]->flags &= ~IO_DATA_PATH_WIDTH;
113 p_dev->resource[0]->flags |= IO_DATA_PATH_WIDTH_8;
114 p_dev->resource[1]->flags &= ~IO_DATA_PATH_WIDTH;
115 p_dev->resource[1]->flags |= IO_DATA_PATH_WIDTH_8;
116 p_dev->io_lines = 3;
117
118 return pcmcia_request_io(p_dev);
119}
120
121static int ixj_config(struct pcmcia_device * link)
122{
123 IXJ *j;
124 ixj_info_t *info;
125
126 info = link->priv;
127 dev_dbg(&link->dev, "ixj_config\n");
128
129 link->config_flags = CONF_AUTO_SET_IO;
130
131 if (pcmcia_loop_config(link, ixj_config_check, NULL))
132 goto failed;
133
134 if (pcmcia_enable_device(link))
135 goto failed;
136
137 /*
138 * Register the card with the core.
139 */
140 j = ixj_pcmcia_probe(link->resource[0]->start,
141 link->resource[0]->start + 0x10);
142
143 info->ndev = 1;
144 ixj_get_serial(link, j);
145 return 0;
146
147failed:
148 ixj_cs_release(link);
149 return -ENODEV;
150}
151
152static void ixj_cs_release(struct pcmcia_device *link)
153{
154 ixj_info_t *info = link->priv;
155 dev_dbg(&link->dev, "ixj_cs_release\n");
156 info->ndev = 0;
157 pcmcia_disable_device(link);
158}
159
160static const struct pcmcia_device_id ixj_ids[] = {
161 PCMCIA_DEVICE_MANF_CARD(0x0257, 0x0600),
162 PCMCIA_DEVICE_NULL
163};
164MODULE_DEVICE_TABLE(pcmcia, ixj_ids);
165
166static struct pcmcia_driver ixj_driver = {
167 .owner = THIS_MODULE,
168 .name = "ixj_cs",
169 .probe = ixj_probe,
170 .remove = ixj_detach,
171 .id_table = ixj_ids,
172};
173
174static int __init ixj_pcmcia_init(void)
175{
176 return pcmcia_register_driver(&ixj_driver);
177}
178
179static void ixj_pcmcia_exit(void)
180{
181 pcmcia_unregister_driver(&ixj_driver);
182}
183
184module_init(ixj_pcmcia_init);
185module_exit(ixj_pcmcia_exit);
186
187MODULE_LICENSE("GPL");
diff --git a/drivers/staging/telephony/phonedev.c b/drivers/staging/telephony/phonedev.c
deleted file mode 100644
index 1dd0b6717ccc..000000000000
--- a/drivers/staging/telephony/phonedev.c
+++ /dev/null
@@ -1,166 +0,0 @@
1/*
2 * Telephony registration for Linux
3 *
4 * (c) Copyright 1999 Red Hat Software Inc.
5 *
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public License
8 * as published by the Free Software Foundation; either version
9 * 2 of the License, or (at your option) any later version.
10 *
11 * Author: Alan Cox, <alan@lxorguk.ukuu.org.uk>
12 *
13 * Fixes: Mar 01 2000 Thomas Sparr, <thomas.l.sparr@telia.com>
14 * phone_register_device now works with unit!=PHONE_UNIT_ANY
15 */
16
17#include <linux/module.h>
18#include <linux/types.h>
19#include <linux/kernel.h>
20#include <linux/fs.h>
21#include <linux/mm.h>
22#include <linux/string.h>
23#include <linux/errno.h>
24#include <linux/phonedev.h>
25#include <linux/init.h>
26#include <asm/uaccess.h>
27
28#include <linux/kmod.h>
29#include <linux/sem.h>
30#include <linux/mutex.h>
31
32#define PHONE_NUM_DEVICES 256
33
34/*
35 * Active devices
36 */
37
38static struct phone_device *phone_device[PHONE_NUM_DEVICES];
39static DEFINE_MUTEX(phone_lock);
40
41/*
42 * Open a phone device.
43 */
44
45static int phone_open(struct inode *inode, struct file *file)
46{
47 unsigned int minor = iminor(inode);
48 int err = 0;
49 struct phone_device *p;
50 const struct file_operations *old_fops, *new_fops = NULL;
51
52 if (minor >= PHONE_NUM_DEVICES)
53 return -ENODEV;
54
55 mutex_lock(&phone_lock);
56 p = phone_device[minor];
57 if (p)
58 new_fops = fops_get(p->f_op);
59 if (!new_fops) {
60 mutex_unlock(&phone_lock);
61 request_module("char-major-%d-%d", PHONE_MAJOR, minor);
62 mutex_lock(&phone_lock);
63 p = phone_device[minor];
64 if (p == NULL || (new_fops = fops_get(p->f_op)) == NULL)
65 {
66 err=-ENODEV;
67 goto end;
68 }
69 }
70 old_fops = file->f_op;
71 file->f_op = new_fops;
72 if (p->open)
73 err = p->open(p, file); /* Tell the device it is open */
74 if (err) {
75 fops_put(file->f_op);
76 file->f_op = fops_get(old_fops);
77 }
78 fops_put(old_fops);
79end:
80 mutex_unlock(&phone_lock);
81 return err;
82}
83
84/*
85 * Telephony For Linux device drivers request registration here.
86 */
87
88int phone_register_device(struct phone_device *p, int unit)
89{
90 int base;
91 int end;
92 int i;
93
94 base = 0;
95 end = PHONE_NUM_DEVICES - 1;
96
97 if (unit != PHONE_UNIT_ANY) {
98 base = unit;
99 end = unit + 1; /* enter the loop at least one time */
100 }
101
102 mutex_lock(&phone_lock);
103 for (i = base; i < end; i++) {
104 if (phone_device[i] == NULL) {
105 phone_device[i] = p;
106 p->minor = i;
107 mutex_unlock(&phone_lock);
108 return 0;
109 }
110 }
111 mutex_unlock(&phone_lock);
112 return -ENFILE;
113}
114
115/*
116 * Unregister an unused Telephony for linux device
117 */
118
119void phone_unregister_device(struct phone_device *pfd)
120{
121 mutex_lock(&phone_lock);
122 if (likely(phone_device[pfd->minor] == pfd))
123 phone_device[pfd->minor] = NULL;
124 mutex_unlock(&phone_lock);
125}
126
127
128static const struct file_operations phone_fops =
129{
130 .owner = THIS_MODULE,
131 .open = phone_open,
132 .llseek = noop_llseek,
133};
134
135/*
136 * Board init functions
137 */
138
139
140/*
141 * Initialise Telephony for linux
142 */
143
144static int __init telephony_init(void)
145{
146 printk(KERN_INFO "Linux telephony interface: v1.00\n");
147 if (register_chrdev(PHONE_MAJOR, "telephony", &phone_fops)) {
148 printk("phonedev: unable to get major %d\n", PHONE_MAJOR);
149 return -EIO;
150 }
151
152 return 0;
153}
154
155static void __exit telephony_exit(void)
156{
157 unregister_chrdev(PHONE_MAJOR, "telephony");
158}
159
160module_init(telephony_init);
161module_exit(telephony_exit);
162
163MODULE_LICENSE("GPL");
164
165EXPORT_SYMBOL(phone_register_device);
166EXPORT_SYMBOL(phone_unregister_device);
diff --git a/drivers/staging/tidspbridge/dynload/dload_internal.h b/drivers/staging/tidspbridge/dynload/dload_internal.h
index 7b77573fba53..b9d079b96190 100644
--- a/drivers/staging/tidspbridge/dynload/dload_internal.h
+++ b/drivers/staging/tidspbridge/dynload/dload_internal.h
@@ -313,14 +313,14 @@ extern uint32_t dload_reverse_checksum16(void *data, unsigned siz);
313/* 313/*
314 * exported by reloc.c 314 * exported by reloc.c
315 */ 315 */
316extern void dload_relocate(struct dload_state *dlthis, tgt_au_t * data, 316extern void dload_relocate(struct dload_state *dlthis, tgt_au_t *data,
317 struct reloc_record_t *rp, bool * tramps_generated, 317 struct reloc_record_t *rp, bool *tramps_generated,
318 bool second_pass); 318 bool second_pass);
319 319
320extern rvalue dload_unpack(struct dload_state *dlthis, tgt_au_t * data, 320extern rvalue dload_unpack(struct dload_state *dlthis, tgt_au_t *data,
321 int fieldsz, int offset, unsigned sgn); 321 int fieldsz, int offset, unsigned sgn);
322 322
323extern int dload_repack(struct dload_state *dlthis, rvalue val, tgt_au_t * data, 323extern int dload_repack(struct dload_state *dlthis, rvalue val, tgt_au_t *data,
324 int fieldsz, int offset, unsigned sgn); 324 int fieldsz, int offset, unsigned sgn);
325 325
326/* 326/*
diff --git a/drivers/staging/tidspbridge/dynload/reloc.c b/drivers/staging/tidspbridge/dynload/reloc.c
index 7b28c07ed7c5..463abdb6392f 100644
--- a/drivers/staging/tidspbridge/dynload/reloc.c
+++ b/drivers/staging/tidspbridge/dynload/reloc.c
@@ -45,7 +45,7 @@ static const char bsssymbol[] = { ".bss" };
45 * Effect: 45 * Effect:
46 * Extracts the specified field and returns it. 46 * Extracts the specified field and returns it.
47 ************************************************************************* */ 47 ************************************************************************* */
48rvalue dload_unpack(struct dload_state *dlthis, tgt_au_t * data, int fieldsz, 48rvalue dload_unpack(struct dload_state *dlthis, tgt_au_t *data, int fieldsz,
49 int offset, unsigned sgn) 49 int offset, unsigned sgn)
50{ 50{
51 register rvalue objval; 51 register rvalue objval;
@@ -98,7 +98,7 @@ rvalue dload_unpack(struct dload_state *dlthis, tgt_au_t * data, int fieldsz,
98 ************************************************************************* */ 98 ************************************************************************* */
99static const unsigned char ovf_limit[] = { 1, 2, 2 }; 99static const unsigned char ovf_limit[] = { 1, 2, 2 };
100 100
101int dload_repack(struct dload_state *dlthis, rvalue val, tgt_au_t * data, 101int dload_repack(struct dload_state *dlthis, rvalue val, tgt_au_t *data,
102 int fieldsz, int offset, unsigned sgn) 102 int fieldsz, int offset, unsigned sgn)
103{ 103{
104 register urvalue objval, mask; 104 register urvalue objval, mask;
@@ -161,7 +161,7 @@ static const u8 c60_scale[SCALE_MASK + 1] = {
161 * Effect: 161 * Effect:
162 * Performs the specified relocation operation 162 * Performs the specified relocation operation
163 ************************************************************************* */ 163 ************************************************************************* */
164void dload_relocate(struct dload_state *dlthis, tgt_au_t * data, 164void dload_relocate(struct dload_state *dlthis, tgt_au_t *data,
165 struct reloc_record_t *rp, bool *tramps_generated, 165 struct reloc_record_t *rp, bool *tramps_generated,
166 bool second_pass) 166 bool second_pass)
167{ 167{
diff --git a/drivers/staging/tidspbridge/rmgr/drv_interface.c b/drivers/staging/tidspbridge/rmgr/drv_interface.c
index 701a11ac676d..e6f31d817d6b 100644
--- a/drivers/staging/tidspbridge/rmgr/drv_interface.c
+++ b/drivers/staging/tidspbridge/rmgr/drv_interface.c
@@ -471,7 +471,7 @@ err1:
471 return err; 471 return err;
472} 472}
473 473
474static int __devinit omap34_xx_bridge_probe(struct platform_device *pdev) 474static int omap34_xx_bridge_probe(struct platform_device *pdev)
475{ 475{
476 int err; 476 int err;
477 dev_t dev = 0; 477 dev_t dev = 0;
@@ -527,7 +527,7 @@ err1:
527 return err; 527 return err;
528} 528}
529 529
530static int __devexit omap34_xx_bridge_remove(struct platform_device *pdev) 530static int omap34_xx_bridge_remove(struct platform_device *pdev)
531{ 531{
532 dev_t devno; 532 dev_t devno;
533 int status = 0; 533 int status = 0;
@@ -606,7 +606,7 @@ static struct platform_driver bridge_driver = {
606 .name = "omap-dsp", 606 .name = "omap-dsp",
607 }, 607 },
608 .probe = omap34_xx_bridge_probe, 608 .probe = omap34_xx_bridge_probe,
609 .remove = __devexit_p(omap34_xx_bridge_remove), 609 .remove = omap34_xx_bridge_remove,
610#ifdef CONFIG_PM 610#ifdef CONFIG_PM
611 .suspend = bridge_suspend, 611 .suspend = bridge_suspend,
612 .resume = bridge_resume, 612 .resume = bridge_resume,
diff --git a/drivers/staging/usbip/stub_dev.c b/drivers/staging/usbip/stub_dev.c
index c8d79a7f0e0e..ee36415eb26d 100644
--- a/drivers/staging/usbip/stub_dev.c
+++ b/drivers/staging/usbip/stub_dev.c
@@ -18,6 +18,7 @@
18 */ 18 */
19 19
20#include <linux/device.h> 20#include <linux/device.h>
21#include <linux/file.h>
21#include <linux/kthread.h> 22#include <linux/kthread.h>
22#include <linux/module.h> 23#include <linux/module.h>
23 24
@@ -203,7 +204,7 @@ static void stub_shutdown_connection(struct usbip_device *ud)
203 * not touch NULL socket. 204 * not touch NULL socket.
204 */ 205 */
205 if (ud->tcp_socket) { 206 if (ud->tcp_socket) {
206 sock_release(ud->tcp_socket); 207 fput(ud->tcp_socket->file);
207 ud->tcp_socket = NULL; 208 ud->tcp_socket = NULL;
208 } 209 }
209 210
@@ -432,6 +433,8 @@ static int stub_probe(struct usb_interface *interface,
432 dev_err(&interface->dev, "stub_add_files for %s\n", udev_busid); 433 dev_err(&interface->dev, "stub_add_files for %s\n", udev_busid);
433 usb_set_intfdata(interface, NULL); 434 usb_set_intfdata(interface, NULL);
434 usb_put_intf(interface); 435 usb_put_intf(interface);
436 usb_put_dev(udev);
437 kthread_stop_put(sdev->ud.eh);
435 438
436 busid_priv->interf_count = 0; 439 busid_priv->interf_count = 0;
437 busid_priv->sdev = NULL; 440 busid_priv->sdev = NULL;
@@ -477,19 +480,17 @@ static void stub_disconnect(struct usb_interface *interface)
477 /* get stub_device */ 480 /* get stub_device */
478 if (!sdev) { 481 if (!sdev) {
479 dev_err(&interface->dev, "could not get device"); 482 dev_err(&interface->dev, "could not get device");
480 /* BUG(); */
481 return; 483 return;
482 } 484 }
483 485
484 usb_set_intfdata(interface, NULL); 486 usb_set_intfdata(interface, NULL);
485 487
486 /* 488 /*
487 * NOTE: 489 * NOTE: rx/tx threads are invoked for each usb_device.
488 * rx/tx threads are invoked for each usb_device.
489 */ 490 */
490 stub_remove_files(&interface->dev); 491 stub_remove_files(&interface->dev);
491 492
492 /*If usb reset called from event handler*/ 493 /* If usb reset is called from event handler */
493 if (busid_priv->sdev->ud.eh == current) { 494 if (busid_priv->sdev->ud.eh == current) {
494 busid_priv->interf_count--; 495 busid_priv->interf_count--;
495 return; 496 return;
@@ -504,13 +505,13 @@ static void stub_disconnect(struct usb_interface *interface)
504 505
505 busid_priv->interf_count = 0; 506 busid_priv->interf_count = 0;
506 507
507 /* 1. shutdown the current connection */ 508 /* shutdown the current connection */
508 shutdown_busid(busid_priv); 509 shutdown_busid(busid_priv);
509 510
510 usb_put_dev(sdev->udev); 511 usb_put_dev(sdev->udev);
511 usb_put_intf(interface); 512 usb_put_intf(interface);
512 513
513 /* 3. free sdev */ 514 /* free sdev */
514 busid_priv->sdev = NULL; 515 busid_priv->sdev = NULL;
515 stub_device_free(sdev); 516 stub_device_free(sdev);
516 517
diff --git a/drivers/staging/usbip/stub_rx.c b/drivers/staging/usbip/stub_rx.c
index 694cfd7596f3..0572a15242b5 100644
--- a/drivers/staging/usbip/stub_rx.c
+++ b/drivers/staging/usbip/stub_rx.c
@@ -164,7 +164,6 @@ static int tweak_set_configuration_cmd(struct urb *urb)
164 config, dev_name(&urb->dev->dev)); 164 config, dev_name(&urb->dev->dev));
165 165
166 return 0; 166 return 0;
167 /* return usb_driver_set_configuration(urb->dev, config); */
168} 167}
169 168
170static int tweak_reset_device_cmd(struct urb *urb) 169static int tweak_reset_device_cmd(struct urb *urb)
@@ -480,7 +479,7 @@ static void stub_recv_cmd_submit(struct stub_device *sdev,
480 return; 479 return;
481 } 480 }
482 481
483 /* set priv->urb->transfer_buffer */ 482 /* allocate urb transfer buffer, if needed */
484 if (pdu->u.cmd_submit.transfer_buffer_length > 0) { 483 if (pdu->u.cmd_submit.transfer_buffer_length > 0) {
485 priv->urb->transfer_buffer = 484 priv->urb->transfer_buffer =
486 kzalloc(pdu->u.cmd_submit.transfer_buffer_length, 485 kzalloc(pdu->u.cmd_submit.transfer_buffer_length,
@@ -492,7 +491,7 @@ static void stub_recv_cmd_submit(struct stub_device *sdev,
492 } 491 }
493 } 492 }
494 493
495 /* set priv->urb->setup_packet */ 494 /* copy urb setup packet */
496 priv->urb->setup_packet = kmemdup(&pdu->u.cmd_submit.setup, 8, 495 priv->urb->setup_packet = kmemdup(&pdu->u.cmd_submit.setup, 8,
497 GFP_KERNEL); 496 GFP_KERNEL);
498 if (!priv->urb->setup_packet) { 497 if (!priv->urb->setup_packet) {
diff --git a/drivers/staging/usbip/stub_tx.c b/drivers/staging/usbip/stub_tx.c
index 023fda305be2..513961fef055 100644
--- a/drivers/staging/usbip/stub_tx.c
+++ b/drivers/staging/usbip/stub_tx.c
@@ -166,7 +166,7 @@ static int stub_send_ret_submit(struct stub_device *sdev)
166 int ret; 166 int ret;
167 struct urb *urb = priv->urb; 167 struct urb *urb = priv->urb;
168 struct usbip_header pdu_header; 168 struct usbip_header pdu_header;
169 void *iso_buffer = NULL; 169 struct usbip_iso_packet_descriptor *iso_buffer = NULL;
170 struct kvec *iov = NULL; 170 struct kvec *iov = NULL;
171 int iovnum = 0; 171 int iovnum = 0;
172 172
@@ -192,7 +192,6 @@ static int stub_send_ret_submit(struct stub_device *sdev)
192 setup_ret_submit_pdu(&pdu_header, urb); 192 setup_ret_submit_pdu(&pdu_header, urb);
193 usbip_dbg_stub_tx("setup txdata seqnum: %d urb: %p\n", 193 usbip_dbg_stub_tx("setup txdata seqnum: %d urb: %p\n",
194 pdu_header.base.seqnum, urb); 194 pdu_header.base.seqnum, urb);
195 /*usbip_dump_header(pdu_header);*/
196 usbip_header_correct_endian(&pdu_header, 1); 195 usbip_header_correct_endian(&pdu_header, 1);
197 196
198 iov[iovnum].iov_base = &pdu_header; 197 iov[iovnum].iov_base = &pdu_header;
diff --git a/drivers/staging/usbip/usbip_common.c b/drivers/staging/usbip/usbip_common.c
index 57f11f9cd8a5..75189feac380 100644
--- a/drivers/staging/usbip/usbip_common.c
+++ b/drivers/staging/usbip/usbip_common.c
@@ -413,8 +413,10 @@ struct socket *sockfd_to_socket(unsigned int sockfd)
413 413
414 inode = file->f_dentry->d_inode; 414 inode = file->f_dentry->d_inode;
415 415
416 if (!inode || !S_ISSOCK(inode->i_mode)) 416 if (!inode || !S_ISSOCK(inode->i_mode)) {
417 fput(file);
417 return NULL; 418 return NULL;
419 }
418 420
419 socket = SOCKET_I(inode); 421 socket = SOCKET_I(inode);
420 422
@@ -439,7 +441,6 @@ static void usbip_pack_cmd_submit(struct usbip_header *pdu, struct urb *urb,
439 * will be discussed when usbip is ported to other operating systems. 441 * will be discussed when usbip is ported to other operating systems.
440 */ 442 */
441 if (pack) { 443 if (pack) {
442 /* vhci_tx.c */
443 spdu->transfer_flags = 444 spdu->transfer_flags =
444 tweak_transfer_flags(urb->transfer_flags); 445 tweak_transfer_flags(urb->transfer_flags);
445 spdu->transfer_buffer_length = urb->transfer_buffer_length; 446 spdu->transfer_buffer_length = urb->transfer_buffer_length;
@@ -447,9 +448,7 @@ static void usbip_pack_cmd_submit(struct usbip_header *pdu, struct urb *urb,
447 spdu->number_of_packets = urb->number_of_packets; 448 spdu->number_of_packets = urb->number_of_packets;
448 spdu->interval = urb->interval; 449 spdu->interval = urb->interval;
449 } else { 450 } else {
450 /* stub_rx.c */
451 urb->transfer_flags = spdu->transfer_flags; 451 urb->transfer_flags = spdu->transfer_flags;
452
453 urb->transfer_buffer_length = spdu->transfer_buffer_length; 452 urb->transfer_buffer_length = spdu->transfer_buffer_length;
454 urb->start_frame = spdu->start_frame; 453 urb->start_frame = spdu->start_frame;
455 urb->number_of_packets = spdu->number_of_packets; 454 urb->number_of_packets = spdu->number_of_packets;
@@ -463,16 +462,12 @@ static void usbip_pack_ret_submit(struct usbip_header *pdu, struct urb *urb,
463 struct usbip_header_ret_submit *rpdu = &pdu->u.ret_submit; 462 struct usbip_header_ret_submit *rpdu = &pdu->u.ret_submit;
464 463
465 if (pack) { 464 if (pack) {
466 /* stub_tx.c */
467
468 rpdu->status = urb->status; 465 rpdu->status = urb->status;
469 rpdu->actual_length = urb->actual_length; 466 rpdu->actual_length = urb->actual_length;
470 rpdu->start_frame = urb->start_frame; 467 rpdu->start_frame = urb->start_frame;
471 rpdu->number_of_packets = urb->number_of_packets; 468 rpdu->number_of_packets = urb->number_of_packets;
472 rpdu->error_count = urb->error_count; 469 rpdu->error_count = urb->error_count;
473 } else { 470 } else {
474 /* vhci_rx.c */
475
476 urb->status = rpdu->status; 471 urb->status = rpdu->status;
477 urb->actual_length = rpdu->actual_length; 472 urb->actual_length = rpdu->actual_length;
478 urb->start_frame = rpdu->start_frame; 473 urb->start_frame = rpdu->start_frame;
@@ -639,28 +634,26 @@ static void usbip_pack_iso(struct usbip_iso_packet_descriptor *iso,
639} 634}
640 635
641/* must free buffer */ 636/* must free buffer */
642void *usbip_alloc_iso_desc_pdu(struct urb *urb, ssize_t *bufflen) 637struct usbip_iso_packet_descriptor*
638usbip_alloc_iso_desc_pdu(struct urb *urb, ssize_t *bufflen)
643{ 639{
644 void *buff;
645 struct usbip_iso_packet_descriptor *iso; 640 struct usbip_iso_packet_descriptor *iso;
646 int np = urb->number_of_packets; 641 int np = urb->number_of_packets;
647 ssize_t size = np * sizeof(*iso); 642 ssize_t size = np * sizeof(*iso);
648 int i; 643 int i;
649 644
650 buff = kzalloc(size, GFP_KERNEL); 645 iso = kzalloc(size, GFP_KERNEL);
651 if (!buff) 646 if (!iso)
652 return NULL; 647 return NULL;
653 648
654 for (i = 0; i < np; i++) { 649 for (i = 0; i < np; i++) {
655 iso = buff + (i * sizeof(*iso)); 650 usbip_pack_iso(&iso[i], &urb->iso_frame_desc[i], 1);
656 651 usbip_iso_packet_correct_endian(&iso[i], 1);
657 usbip_pack_iso(iso, &urb->iso_frame_desc[i], 1);
658 usbip_iso_packet_correct_endian(iso, 1);
659 } 652 }
660 653
661 *bufflen = size; 654 *bufflen = size;
662 655
663 return buff; 656 return iso;
664} 657}
665EXPORT_SYMBOL_GPL(usbip_alloc_iso_desc_pdu); 658EXPORT_SYMBOL_GPL(usbip_alloc_iso_desc_pdu);
666 659
@@ -680,8 +673,6 @@ int usbip_recv_iso(struct usbip_device *ud, struct urb *urb)
680 673
681 /* my Bluetooth dongle gets ISO URBs which are np = 0 */ 674 /* my Bluetooth dongle gets ISO URBs which are np = 0 */
682 if (np == 0) { 675 if (np == 0) {
683 /* pr_info("iso np == 0\n"); */
684 /* usbip_dump_urb(urb); */
685 return 0; 676 return 0;
686 } 677 }
687 678
@@ -703,11 +694,10 @@ int usbip_recv_iso(struct usbip_device *ud, struct urb *urb)
703 return -EPIPE; 694 return -EPIPE;
704 } 695 }
705 696
697 iso = (struct usbip_iso_packet_descriptor *) buff;
706 for (i = 0; i < np; i++) { 698 for (i = 0; i < np; i++) {
707 iso = buff + (i * sizeof(*iso)); 699 usbip_iso_packet_correct_endian(&iso[i], 0);
708 700 usbip_pack_iso(&iso[i], &urb->iso_frame_desc[i], 0);
709 usbip_iso_packet_correct_endian(iso, 0);
710 usbip_pack_iso(iso, &urb->iso_frame_desc[i], 0);
711 total_length += urb->iso_frame_desc[i].actual_length; 701 total_length += urb->iso_frame_desc[i].actual_length;
712 } 702 }
713 703
@@ -754,7 +744,7 @@ void usbip_pad_iso(struct usbip_device *ud, struct urb *urb)
754 /* 744 /*
755 * if actual_length is transfer_buffer_length then no padding is 745 * if actual_length is transfer_buffer_length then no padding is
756 * present. 746 * present.
757 */ 747 */
758 if (urb->actual_length == urb->transfer_buffer_length) 748 if (urb->actual_length == urb->transfer_buffer_length)
759 return; 749 return;
760 750
@@ -778,14 +768,12 @@ int usbip_recv_xbuff(struct usbip_device *ud, struct urb *urb)
778 int size; 768 int size;
779 769
780 if (ud->side == USBIP_STUB) { 770 if (ud->side == USBIP_STUB) {
781 /* stub_rx.c */
782 /* the direction of urb must be OUT. */ 771 /* the direction of urb must be OUT. */
783 if (usb_pipein(urb->pipe)) 772 if (usb_pipein(urb->pipe))
784 return 0; 773 return 0;
785 774
786 size = urb->transfer_buffer_length; 775 size = urb->transfer_buffer_length;
787 } else { 776 } else {
788 /* vhci_rx.c */
789 /* the direction of urb must be IN. */ 777 /* the direction of urb must be IN. */
790 if (usb_pipeout(urb->pipe)) 778 if (usb_pipeout(urb->pipe))
791 return 0; 779 return 0;
diff --git a/drivers/staging/usbip/usbip_common.h b/drivers/staging/usbip/usbip_common.h
index 5d89c0fd6f7b..7e6c5436d972 100644
--- a/drivers/staging/usbip/usbip_common.h
+++ b/drivers/staging/usbip/usbip_common.h
@@ -320,7 +320,9 @@ void usbip_pack_pdu(struct usbip_header *pdu, struct urb *urb, int cmd,
320 int pack); 320 int pack);
321void usbip_header_correct_endian(struct usbip_header *pdu, int send); 321void usbip_header_correct_endian(struct usbip_header *pdu, int send);
322 322
323void *usbip_alloc_iso_desc_pdu(struct urb *urb, ssize_t *bufflen); 323struct usbip_iso_packet_descriptor*
324usbip_alloc_iso_desc_pdu(struct urb *urb, ssize_t *bufflen);
325
324/* some members of urb must be substituted before. */ 326/* some members of urb must be substituted before. */
325int usbip_recv_iso(struct usbip_device *ud, struct urb *urb); 327int usbip_recv_iso(struct usbip_device *ud, struct urb *urb);
326void usbip_pad_iso(struct usbip_device *ud, struct urb *urb); 328void usbip_pad_iso(struct usbip_device *ud, struct urb *urb);
diff --git a/drivers/staging/usbip/userspace/src/usbip_detach.c b/drivers/staging/usbip/userspace/src/usbip_detach.c
index 89bf3c195c28..dac5f065755a 100644
--- a/drivers/staging/usbip/userspace/src/usbip_detach.c
+++ b/drivers/staging/usbip/userspace/src/usbip_detach.c
@@ -19,6 +19,7 @@
19#include <sysfs/libsysfs.h> 19#include <sysfs/libsysfs.h>
20 20
21#include <ctype.h> 21#include <ctype.h>
22#include <limits.h>
22#include <stdint.h> 23#include <stdint.h>
23#include <stdio.h> 24#include <stdio.h>
24#include <stdlib.h> 25#include <stdlib.h>
@@ -46,6 +47,7 @@ static int detach_port(char *port)
46{ 47{
47 int ret; 48 int ret;
48 uint8_t portnum; 49 uint8_t portnum;
50 char path[PATH_MAX+1];
49 51
50 for (unsigned int i=0; i < strlen(port); i++) 52 for (unsigned int i=0; i < strlen(port); i++)
51 if (!isdigit(port[i])) { 53 if (!isdigit(port[i])) {
@@ -57,6 +59,13 @@ static int detach_port(char *port)
57 59
58 portnum = atoi(port); 60 portnum = atoi(port);
59 61
62 /* remove the port state file */
63
64 snprintf(path, PATH_MAX, VHCI_STATE_PATH"/port%d", portnum);
65
66 remove(path);
67 rmdir(VHCI_STATE_PATH);
68
60 ret = usbip_vhci_driver_open(); 69 ret = usbip_vhci_driver_open();
61 if (ret < 0) { 70 if (ret < 0) {
62 err("open vhci_driver"); 71 err("open vhci_driver");
diff --git a/drivers/staging/usbip/vhci.h b/drivers/staging/usbip/vhci.h
index c66b8b3f97b4..5dddc4d4b6a5 100644
--- a/drivers/staging/usbip/vhci.h
+++ b/drivers/staging/usbip/vhci.h
@@ -99,7 +99,6 @@ extern const struct attribute_group dev_attr_group;
99 99
100/* vhci_hcd.c */ 100/* vhci_hcd.c */
101void rh_port_connect(int rhport, enum usb_device_speed speed); 101void rh_port_connect(int rhport, enum usb_device_speed speed);
102void rh_port_disconnect(int rhport);
103 102
104/* vhci_rx.c */ 103/* vhci_rx.c */
105struct urb *pickup_urb_and_free_priv(struct vhci_device *vdev, __u32 seqnum); 104struct urb *pickup_urb_and_free_priv(struct vhci_device *vdev, __u32 seqnum);
diff --git a/drivers/staging/usbip/vhci_hcd.c b/drivers/staging/usbip/vhci_hcd.c
index 620d1beb4587..c3aa2195f1a8 100644
--- a/drivers/staging/usbip/vhci_hcd.c
+++ b/drivers/staging/usbip/vhci_hcd.c
@@ -18,6 +18,7 @@
18 */ 18 */
19 19
20#include <linux/init.h> 20#include <linux/init.h>
21#include <linux/file.h>
21#include <linux/kernel.h> 22#include <linux/kernel.h>
22#include <linux/kthread.h> 23#include <linux/kthread.h>
23#include <linux/module.h> 24#include <linux/module.h>
@@ -140,32 +141,23 @@ void rh_port_connect(int rhport, enum usb_device_speed speed)
140 break; 141 break;
141 } 142 }
142 143
143 /* spin_lock(&the_controller->vdev[rhport].ud.lock);
144 * the_controller->vdev[rhport].ud.status = VDEV_CONNECT;
145 * spin_unlock(&the_controller->vdev[rhport].ud.lock); */
146
147 spin_unlock_irqrestore(&the_controller->lock, flags); 144 spin_unlock_irqrestore(&the_controller->lock, flags);
148 145
149 usb_hcd_poll_rh_status(vhci_to_hcd(the_controller)); 146 usb_hcd_poll_rh_status(vhci_to_hcd(the_controller));
150} 147}
151 148
152void rh_port_disconnect(int rhport) 149static void rh_port_disconnect(int rhport)
153{ 150{
154 unsigned long flags; 151 unsigned long flags;
155 152
156 usbip_dbg_vhci_rh("rh_port_disconnect %d\n", rhport); 153 usbip_dbg_vhci_rh("rh_port_disconnect %d\n", rhport);
157 154
158 spin_lock_irqsave(&the_controller->lock, flags); 155 spin_lock_irqsave(&the_controller->lock, flags);
159 /* stop_activity(dum, driver); */ 156
160 the_controller->port_status[rhport] &= ~USB_PORT_STAT_CONNECTION; 157 the_controller->port_status[rhport] &= ~USB_PORT_STAT_CONNECTION;
161 the_controller->port_status[rhport] |= 158 the_controller->port_status[rhport] |=
162 (1 << USB_PORT_FEAT_C_CONNECTION); 159 (1 << USB_PORT_FEAT_C_CONNECTION);
163 160
164 /* not yet complete the disconnection
165 * spin_lock(&vdev->ud.lock);
166 * vdev->ud.status = VHC_ST_DISCONNECT;
167 * spin_unlock(&vdev->ud.lock); */
168
169 spin_unlock_irqrestore(&the_controller->lock, flags); 161 spin_unlock_irqrestore(&the_controller->lock, flags);
170 usb_hcd_poll_rh_status(vhci_to_hcd(the_controller)); 162 usb_hcd_poll_rh_status(vhci_to_hcd(the_controller));
171} 163}
@@ -228,7 +220,6 @@ done:
228 return changed ? retval : 0; 220 return changed ? retval : 0;
229} 221}
230 222
231/* See hub_configure in hub.c */
232static inline void hub_descriptor(struct usb_hub_descriptor *desc) 223static inline void hub_descriptor(struct usb_hub_descriptor *desc)
233{ 224{
234 memset(desc, 0, sizeof(*desc)); 225 memset(desc, 0, sizeof(*desc));
@@ -292,8 +283,6 @@ static int vhci_hub_control(struct usb_hcd *hcd, u16 typeReq, u16 wValue,
292 usbip_dbg_vhci_rh(" ClearPortFeature: " 283 usbip_dbg_vhci_rh(" ClearPortFeature: "
293 "USB_PORT_FEAT_POWER\n"); 284 "USB_PORT_FEAT_POWER\n");
294 dum->port_status[rhport] = 0; 285 dum->port_status[rhport] = 0;
295 /* dum->address = 0; */
296 /* dum->hdev = 0; */
297 dum->resuming = 0; 286 dum->resuming = 0;
298 break; 287 break;
299 case USB_PORT_FEAT_C_RESET: 288 case USB_PORT_FEAT_C_RESET:
@@ -333,11 +322,11 @@ static int vhci_hub_control(struct usb_hcd *hcd, u16 typeReq, u16 wValue,
333 retval = -EPIPE; 322 retval = -EPIPE;
334 } 323 }
335 324
336 /* we do no care of resume. */ 325 /* we do not care about resume. */
337 326
338 /* whoever resets or resumes must GetPortStatus to 327 /* whoever resets or resumes must GetPortStatus to
339 * complete it!! 328 * complete it!!
340 * */ 329 */
341 if (dum->resuming && time_after(jiffies, dum->re_timeout)) { 330 if (dum->resuming && time_after(jiffies, dum->re_timeout)) {
342 dum->port_status[rhport] |= 331 dum->port_status[rhport] |=
343 (1 << USB_PORT_FEAT_C_SUSPEND); 332 (1 << USB_PORT_FEAT_C_SUSPEND);
@@ -345,11 +334,6 @@ static int vhci_hub_control(struct usb_hcd *hcd, u16 typeReq, u16 wValue,
345 ~(1 << USB_PORT_FEAT_SUSPEND); 334 ~(1 << USB_PORT_FEAT_SUSPEND);
346 dum->resuming = 0; 335 dum->resuming = 0;
347 dum->re_timeout = 0; 336 dum->re_timeout = 0;
348 /* if (dum->driver && dum->driver->resume) {
349 * spin_unlock (&dum->lock);
350 * dum->driver->resume (&dum->gadget);
351 * spin_lock (&dum->lock);
352 * } */
353 } 337 }
354 338
355 if ((dum->port_status[rhport] & (1 << USB_PORT_FEAT_RESET)) != 339 if ((dum->port_status[rhport] & (1 << USB_PORT_FEAT_RESET)) !=
@@ -411,9 +395,6 @@ static int vhci_hub_control(struct usb_hcd *hcd, u16 typeReq, u16 wValue,
411 395
412 default: 396 default:
413 pr_err("default: no such request\n"); 397 pr_err("default: no such request\n");
414 /* dev_dbg (hardware,
415 * "hub control req%04x v%04x i%04x l%d\n",
416 * typeReq, wValue, wIndex, wLength); */
417 398
418 /* "protocol stall" on error */ 399 /* "protocol stall" on error */
419 retval = -EPIPE; 400 retval = -EPIPE;
@@ -456,7 +437,6 @@ static void vhci_tx_urb(struct urb *urb)
456 437
457 if (!vdev) { 438 if (!vdev) {
458 pr_err("could not get virtual device"); 439 pr_err("could not get virtual device");
459 /* BUG(); */
460 return; 440 return;
461 } 441 }
462 442
@@ -813,7 +793,7 @@ static void vhci_shutdown_connection(struct usbip_device *ud)
813 kernel_sock_shutdown(ud->tcp_socket, SHUT_RDWR); 793 kernel_sock_shutdown(ud->tcp_socket, SHUT_RDWR);
814 } 794 }
815 795
816 /* kill threads related to this sdev, if v.c. exists */ 796 /* kill threads related to this sdev */
817 if (vdev->ud.tcp_rx) { 797 if (vdev->ud.tcp_rx) {
818 kthread_stop_put(vdev->ud.tcp_rx); 798 kthread_stop_put(vdev->ud.tcp_rx);
819 vdev->ud.tcp_rx = NULL; 799 vdev->ud.tcp_rx = NULL;
@@ -825,8 +805,8 @@ static void vhci_shutdown_connection(struct usbip_device *ud)
825 pr_info("stop threads\n"); 805 pr_info("stop threads\n");
826 806
827 /* active connection is closed */ 807 /* active connection is closed */
828 if (vdev->ud.tcp_socket != NULL) { 808 if (vdev->ud.tcp_socket) {
829 sock_release(vdev->ud.tcp_socket); 809 fput(vdev->ud.tcp_socket->file);
830 vdev->ud.tcp_socket = NULL; 810 vdev->ud.tcp_socket = NULL;
831 } 811 }
832 pr_info("release socket\n"); 812 pr_info("release socket\n");
@@ -872,7 +852,10 @@ static void vhci_device_reset(struct usbip_device *ud)
872 usb_put_dev(vdev->udev); 852 usb_put_dev(vdev->udev);
873 vdev->udev = NULL; 853 vdev->udev = NULL;
874 854
875 ud->tcp_socket = NULL; 855 if (ud->tcp_socket) {
856 fput(ud->tcp_socket->file);
857 ud->tcp_socket = NULL;
858 }
876 ud->status = VDEV_ST_NULL; 859 ud->status = VDEV_ST_NULL;
877 860
878 spin_unlock(&ud->lock); 861 spin_unlock(&ud->lock);
@@ -928,7 +911,6 @@ static int vhci_start(struct usb_hcd *hcd)
928 spin_lock_init(&vhci->lock); 911 spin_lock_init(&vhci->lock);
929 912
930 hcd->power_budget = 0; /* no limit */ 913 hcd->power_budget = 0; /* no limit */
931 hcd->state = HC_STATE_RUNNING;
932 hcd->uses_new_polling = 1; 914 hcd->uses_new_polling = 1;
933 915
934 /* vhci_hcd is now ready to be controlled through sysfs */ 916 /* vhci_hcd is now ready to be controlled through sysfs */
@@ -976,8 +958,6 @@ static int vhci_bus_suspend(struct usb_hcd *hcd)
976 dev_dbg(&hcd->self.root_hub->dev, "%s\n", __func__); 958 dev_dbg(&hcd->self.root_hub->dev, "%s\n", __func__);
977 959
978 spin_lock_irq(&vhci->lock); 960 spin_lock_irq(&vhci->lock);
979 /* vhci->rh_state = DUMMY_RH_SUSPENDED;
980 * set_link_state(vhci); */
981 hcd->state = HC_STATE_SUSPENDED; 961 hcd->state = HC_STATE_SUSPENDED;
982 spin_unlock_irq(&vhci->lock); 962 spin_unlock_irq(&vhci->lock);
983 963
@@ -995,10 +975,6 @@ static int vhci_bus_resume(struct usb_hcd *hcd)
995 if (!HCD_HW_ACCESSIBLE(hcd)) { 975 if (!HCD_HW_ACCESSIBLE(hcd)) {
996 rc = -ESHUTDOWN; 976 rc = -ESHUTDOWN;
997 } else { 977 } else {
998 /* vhci->rh_state = DUMMY_RH_RUNNING;
999 * set_link_state(vhci);
1000 * if (!list_empty(&vhci->urbp_list))
1001 * mod_timer(&vhci->timer, jiffies); */
1002 hcd->state = HC_STATE_RUNNING; 978 hcd->state = HC_STATE_RUNNING;
1003 } 979 }
1004 spin_unlock_irq(&vhci->lock); 980 spin_unlock_irq(&vhci->lock);
@@ -1151,7 +1127,7 @@ static int vhci_hcd_resume(struct platform_device *pdev)
1151 1127
1152static struct platform_driver vhci_driver = { 1128static struct platform_driver vhci_driver = {
1153 .probe = vhci_hcd_probe, 1129 .probe = vhci_hcd_probe,
1154 .remove = __devexit_p(vhci_hcd_remove), 1130 .remove = vhci_hcd_remove,
1155 .suspend = vhci_hcd_suspend, 1131 .suspend = vhci_hcd_suspend,
1156 .resume = vhci_hcd_resume, 1132 .resume = vhci_hcd_resume,
1157 .driver = { 1133 .driver = {
@@ -1175,7 +1151,6 @@ static struct platform_device the_pdev = {
1175 .name = (char *) driver_name, 1151 .name = (char *) driver_name,
1176 .id = -1, 1152 .id = -1,
1177 .dev = { 1153 .dev = {
1178 /* .driver = &vhci_driver, */
1179 .release = the_pdev_release, 1154 .release = the_pdev_release,
1180 }, 1155 },
1181}; 1156};
diff --git a/drivers/staging/usbip/vhci_rx.c b/drivers/staging/usbip/vhci_rx.c
index f0eaf04fa25b..ba5f1c079b69 100644
--- a/drivers/staging/usbip/vhci_rx.c
+++ b/drivers/staging/usbip/vhci_rx.c
@@ -167,7 +167,7 @@ static void vhci_recv_ret_unlink(struct vhci_device *vdev,
167 } else { 167 } else {
168 usbip_dbg_vhci_rx("now giveback urb %p\n", urb); 168 usbip_dbg_vhci_rx("now giveback urb %p\n", urb);
169 169
170 /* If unlink is succeed, status is -ECONNRESET */ 170 /* If unlink is successful, status is -ECONNRESET */
171 urb->status = pdu->u.ret_unlink.status; 171 urb->status = pdu->u.ret_unlink.status;
172 pr_info("urb->status %d\n", urb->status); 172 pr_info("urb->status %d\n", urb->status);
173 173
diff --git a/drivers/staging/usbip/vhci_sysfs.c b/drivers/staging/usbip/vhci_sysfs.c
index 7ce9c2f7e442..c66e9c05c76b 100644
--- a/drivers/staging/usbip/vhci_sysfs.c
+++ b/drivers/staging/usbip/vhci_sysfs.c
@@ -18,6 +18,7 @@
18 */ 18 */
19 19
20#include <linux/kthread.h> 20#include <linux/kthread.h>
21#include <linux/file.h>
21#include <linux/net.h> 22#include <linux/net.h>
22 23
23#include "usbip_common.h" 24#include "usbip_common.h"
@@ -189,7 +190,8 @@ static ssize_t store_attach(struct device *dev, struct device_attribute *attr,
189 if (valid_args(rhport, speed) < 0) 190 if (valid_args(rhport, speed) < 0)
190 return -EINVAL; 191 return -EINVAL;
191 192
192 /* check sockfd */ 193 /* Extract socket from fd. */
194 /* The correct way to clean this up is to fput(socket->file). */
193 socket = sockfd_to_socket(sockfd); 195 socket = sockfd_to_socket(sockfd);
194 if (!socket) 196 if (!socket)
195 return -EINVAL; 197 return -EINVAL;
@@ -206,6 +208,8 @@ static ssize_t store_attach(struct device *dev, struct device_attribute *attr,
206 spin_unlock(&vdev->ud.lock); 208 spin_unlock(&vdev->ud.lock);
207 spin_unlock(&the_controller->lock); 209 spin_unlock(&the_controller->lock);
208 210
211 fput(socket->file);
212
209 dev_err(dev, "port %d already used\n", rhport); 213 dev_err(dev, "port %d already used\n", rhport);
210 return -EINVAL; 214 return -EINVAL;
211 } 215 }
diff --git a/drivers/staging/usbip/vhci_tx.c b/drivers/staging/usbip/vhci_tx.c
index 9b437e7ef1a7..b1f0dcd68f55 100644
--- a/drivers/staging/usbip/vhci_tx.c
+++ b/drivers/staging/usbip/vhci_tx.c
@@ -76,7 +76,7 @@ static int vhci_send_cmd_submit(struct vhci_device *vdev)
76 int ret; 76 int ret;
77 struct urb *urb = priv->urb; 77 struct urb *urb = priv->urb;
78 struct usbip_header pdu_header; 78 struct usbip_header pdu_header;
79 void *iso_buffer = NULL; 79 struct usbip_iso_packet_descriptor *iso_buffer = NULL;
80 80
81 txsize = 0; 81 txsize = 0;
82 memset(&pdu_header, 0, sizeof(pdu_header)); 82 memset(&pdu_header, 0, sizeof(pdu_header));
diff --git a/drivers/staging/vme/devices/vme_pio2.h b/drivers/staging/vme/devices/vme_pio2.h
index 72d9ce0bcb45..d5d94c43c074 100644
--- a/drivers/staging/vme/devices/vme_pio2.h
+++ b/drivers/staging/vme/devices/vme_pio2.h
@@ -243,7 +243,7 @@ struct pio2_card {
243int pio2_cntr_reset(struct pio2_card *); 243int pio2_cntr_reset(struct pio2_card *);
244 244
245int pio2_gpio_reset(struct pio2_card *); 245int pio2_gpio_reset(struct pio2_card *);
246int __devinit pio2_gpio_init(struct pio2_card *); 246int pio2_gpio_init(struct pio2_card *);
247void pio2_gpio_exit(struct pio2_card *); 247void pio2_gpio_exit(struct pio2_card *);
248 248
249#endif /* _VME_PIO2_H_ */ 249#endif /* _VME_PIO2_H_ */
diff --git a/drivers/staging/vme/devices/vme_pio2_core.c b/drivers/staging/vme/devices/vme_pio2_core.c
index dad8281915bf..0331178ca3b3 100644
--- a/drivers/staging/vme/devices/vme_pio2_core.c
+++ b/drivers/staging/vme/devices/vme_pio2_core.c
@@ -42,8 +42,8 @@ static int variant_num;
42static bool loopback; 42static bool loopback;
43 43
44static int pio2_match(struct vme_dev *); 44static int pio2_match(struct vme_dev *);
45static int __devinit pio2_probe(struct vme_dev *); 45static int pio2_probe(struct vme_dev *);
46static int __devexit pio2_remove(struct vme_dev *); 46static int pio2_remove(struct vme_dev *);
47 47
48static int pio2_get_led(struct pio2_card *card) 48static int pio2_get_led(struct pio2_card *card)
49{ 49{
@@ -156,7 +156,7 @@ static struct vme_driver pio2_driver = {
156 .name = driver_name, 156 .name = driver_name,
157 .match = pio2_match, 157 .match = pio2_match,
158 .probe = pio2_probe, 158 .probe = pio2_probe,
159 .remove = __devexit_p(pio2_remove), 159 .remove = pio2_remove,
160}; 160};
161 161
162 162
@@ -222,7 +222,7 @@ static int pio2_match(struct vme_dev *vdev)
222 return 1; 222 return 1;
223} 223}
224 224
225static int __devinit pio2_probe(struct vme_dev *vdev) 225static int pio2_probe(struct vme_dev *vdev)
226{ 226{
227 struct pio2_card *card; 227 struct pio2_card *card;
228 int retval; 228 int retval;
@@ -455,7 +455,7 @@ err_struct:
455 return retval; 455 return retval;
456} 456}
457 457
458static int __devexit pio2_remove(struct vme_dev *vdev) 458static int pio2_remove(struct vme_dev *vdev)
459{ 459{
460 int vec; 460 int vec;
461 int i; 461 int i;
diff --git a/drivers/staging/vme/devices/vme_pio2_gpio.c b/drivers/staging/vme/devices/vme_pio2_gpio.c
index ad76a477825b..69d880517e07 100644
--- a/drivers/staging/vme/devices/vme_pio2_gpio.c
+++ b/drivers/staging/vme/devices/vme_pio2_gpio.c
@@ -186,7 +186,7 @@ int pio2_gpio_reset(struct pio2_card *card)
186 return 0; 186 return 0;
187} 187}
188 188
189int __devinit pio2_gpio_init(struct pio2_card *card) 189int pio2_gpio_init(struct pio2_card *card)
190{ 190{
191 int retval = 0; 191 int retval = 0;
192 char *label; 192 char *label;
diff --git a/drivers/staging/vme/devices/vme_user.c b/drivers/staging/vme/devices/vme_user.c
index c3f94f311ca7..4ef852c4c4e1 100644
--- a/drivers/staging/vme/devices/vme_user.c
+++ b/drivers/staging/vme/devices/vme_user.c
@@ -15,6 +15,8 @@
15 * option) any later version. 15 * option) any later version.
16 */ 16 */
17 17
18#define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
19
18#include <linux/cdev.h> 20#include <linux/cdev.h>
19#include <linux/delay.h> 21#include <linux/delay.h>
20#include <linux/device.h> 22#include <linux/device.h>
@@ -135,8 +137,8 @@ static loff_t vme_user_llseek(struct file *, loff_t, int);
135static long vme_user_unlocked_ioctl(struct file *, unsigned int, unsigned long); 137static long vme_user_unlocked_ioctl(struct file *, unsigned int, unsigned long);
136 138
137static int vme_user_match(struct vme_dev *); 139static int vme_user_match(struct vme_dev *);
138static int __devinit vme_user_probe(struct vme_dev *); 140static int vme_user_probe(struct vme_dev *);
139static int __devexit vme_user_remove(struct vme_dev *); 141static int vme_user_remove(struct vme_dev *);
140 142
141static const struct file_operations vme_user_fops = { 143static const struct file_operations vme_user_fops = {
142 .open = vme_user_open, 144 .open = vme_user_open,
@@ -170,7 +172,7 @@ static int vme_user_open(struct inode *inode, struct file *file)
170 mutex_lock(&image[minor].mutex); 172 mutex_lock(&image[minor].mutex);
171 /* Allow device to be opened if a resource is needed and allocated. */ 173 /* Allow device to be opened if a resource is needed and allocated. */
172 if (minor < CONTROL_MINOR && image[minor].resource == NULL) { 174 if (minor < CONTROL_MINOR && image[minor].resource == NULL) {
173 printk(KERN_ERR "No resources allocated for device\n"); 175 pr_err("No resources allocated for device\n");
174 err = -EINVAL; 176 err = -EINVAL;
175 goto err_res; 177 goto err_res;
176 } 178 }
@@ -225,13 +227,13 @@ static ssize_t resource_to_user(int minor, char __user *buf, size_t count,
225 (unsigned long)copied); 227 (unsigned long)copied);
226 if (retval != 0) { 228 if (retval != 0) {
227 copied = (copied - retval); 229 copied = (copied - retval);
228 printk(KERN_INFO "User copy failed\n"); 230 pr_info("User copy failed\n");
229 return -EINVAL; 231 return -EINVAL;
230 } 232 }
231 233
232 } else { 234 } else {
233 /* XXX Need to write this */ 235 /* XXX Need to write this */
234 printk(KERN_INFO "Currently don't support large transfers\n"); 236 pr_info("Currently don't support large transfers\n");
235 /* Map in pages from userspace */ 237 /* Map in pages from userspace */
236 238
237 /* Call vme_master_read to do the transfer */ 239 /* Call vme_master_read to do the transfer */
@@ -265,7 +267,7 @@ static ssize_t resource_from_user(unsigned int minor, const char __user *buf,
265 image[minor].kern_buf, copied, *ppos); 267 image[minor].kern_buf, copied, *ppos);
266 } else { 268 } else {
267 /* XXX Need to write this */ 269 /* XXX Need to write this */
268 printk(KERN_INFO "Currently don't support large transfers\n"); 270 pr_info("Currently don't support large transfers\n");
269 /* Map in pages from userspace */ 271 /* Map in pages from userspace */
270 272
271 /* Call vme_master_write to do the transfer */ 273 /* Call vme_master_write to do the transfer */
@@ -286,7 +288,7 @@ static ssize_t buffer_to_user(unsigned int minor, char __user *buf,
286 retval = __copy_to_user(buf, image_ptr, (unsigned long)count); 288 retval = __copy_to_user(buf, image_ptr, (unsigned long)count);
287 if (retval != 0) { 289 if (retval != 0) {
288 retval = (count - retval); 290 retval = (count - retval);
289 printk(KERN_WARNING "Partial copy to userspace\n"); 291 pr_warn("Partial copy to userspace\n");
290 } else 292 } else
291 retval = count; 293 retval = count;
292 294
@@ -305,7 +307,7 @@ static ssize_t buffer_from_user(unsigned int minor, const char __user *buf,
305 retval = __copy_from_user(image_ptr, buf, (unsigned long)count); 307 retval = __copy_from_user(image_ptr, buf, (unsigned long)count);
306 if (retval != 0) { 308 if (retval != 0) {
307 retval = (count - retval); 309 retval = (count - retval);
308 printk(KERN_WARNING "Partial copy to userspace\n"); 310 pr_warn("Partial copy to userspace\n");
309 } else 311 } else
310 retval = count; 312 retval = count;
311 313
@@ -476,7 +478,7 @@ static int vme_user_ioctl(struct inode *inode, struct file *file,
476 copied = copy_from_user(&irq_req, argp, 478 copied = copy_from_user(&irq_req, argp,
477 sizeof(struct vme_irq_id)); 479 sizeof(struct vme_irq_id));
478 if (copied != 0) { 480 if (copied != 0) {
479 printk(KERN_WARNING "Partial copy from userspace\n"); 481 pr_warn("Partial copy from userspace\n");
480 return -EFAULT; 482 return -EFAULT;
481 } 483 }
482 484
@@ -503,8 +505,7 @@ static int vme_user_ioctl(struct inode *inode, struct file *file,
503 copied = copy_to_user(argp, &master, 505 copied = copy_to_user(argp, &master,
504 sizeof(struct vme_master)); 506 sizeof(struct vme_master));
505 if (copied != 0) { 507 if (copied != 0) {
506 printk(KERN_WARNING "Partial copy to " 508 pr_warn("Partial copy to userspace\n");
507 "userspace\n");
508 return -EFAULT; 509 return -EFAULT;
509 } 510 }
510 511
@@ -515,8 +516,7 @@ static int vme_user_ioctl(struct inode *inode, struct file *file,
515 516
516 copied = copy_from_user(&master, argp, sizeof(master)); 517 copied = copy_from_user(&master, argp, sizeof(master));
517 if (copied != 0) { 518 if (copied != 0) {
518 printk(KERN_WARNING "Partial copy from " 519 pr_warn("Partial copy from userspace\n");
519 "userspace\n");
520 return -EFAULT; 520 return -EFAULT;
521 } 521 }
522 522
@@ -546,8 +546,7 @@ static int vme_user_ioctl(struct inode *inode, struct file *file,
546 copied = copy_to_user(argp, &slave, 546 copied = copy_to_user(argp, &slave,
547 sizeof(struct vme_slave)); 547 sizeof(struct vme_slave));
548 if (copied != 0) { 548 if (copied != 0) {
549 printk(KERN_WARNING "Partial copy to " 549 pr_warn("Partial copy to userspace\n");
550 "userspace\n");
551 return -EFAULT; 550 return -EFAULT;
552 } 551 }
553 552
@@ -558,8 +557,7 @@ static int vme_user_ioctl(struct inode *inode, struct file *file,
558 557
559 copied = copy_from_user(&slave, argp, sizeof(slave)); 558 copied = copy_from_user(&slave, argp, sizeof(slave));
560 if (copied != 0) { 559 if (copied != 0) {
561 printk(KERN_WARNING "Partial copy from " 560 pr_warn("Partial copy from userspace\n");
562 "userspace\n");
563 return -EFAULT; 561 return -EFAULT;
564 } 562 }
565 563
@@ -599,8 +597,8 @@ static void buf_unalloc(int num)
599{ 597{
600 if (image[num].kern_buf) { 598 if (image[num].kern_buf) {
601#ifdef VME_DEBUG 599#ifdef VME_DEBUG
602 printk(KERN_DEBUG "UniverseII:Releasing buffer at %p\n", 600 pr_debug("UniverseII:Releasing buffer at %p\n",
603 image[num].pci_buf); 601 image[num].pci_buf);
604#endif 602#endif
605 603
606 vme_free_consistent(image[num].resource, image[num].size_buf, 604 vme_free_consistent(image[num].resource, image[num].size_buf,
@@ -612,7 +610,7 @@ static void buf_unalloc(int num)
612 610
613#ifdef VME_DEBUG 611#ifdef VME_DEBUG
614 } else { 612 } else {
615 printk(KERN_DEBUG "UniverseII: Buffer not allocated\n"); 613 pr_debug("UniverseII: Buffer not allocated\n");
616#endif 614#endif
617 } 615 }
618} 616}
@@ -621,7 +619,7 @@ static struct vme_driver vme_user_driver = {
621 .name = driver_name, 619 .name = driver_name,
622 .match = vme_user_match, 620 .match = vme_user_match,
623 .probe = vme_user_probe, 621 .probe = vme_user_probe,
624 .remove = __devexit_p(vme_user_remove), 622 .remove = vme_user_remove,
625}; 623};
626 624
627 625
@@ -629,11 +627,10 @@ static int __init vme_user_init(void)
629{ 627{
630 int retval = 0; 628 int retval = 0;
631 629
632 printk(KERN_INFO "VME User Space Access Driver\n"); 630 pr_info("VME User Space Access Driver\n");
633 631
634 if (bus_num == 0) { 632 if (bus_num == 0) {
635 printk(KERN_ERR "%s: No cards, skipping registration\n", 633 pr_err("No cards, skipping registration\n");
636 driver_name);
637 retval = -ENODEV; 634 retval = -ENODEV;
638 goto err_nocard; 635 goto err_nocard;
639 } 636 }
@@ -642,8 +639,8 @@ static int __init vme_user_init(void)
642 * in future revisions if that ever becomes necessary. 639 * in future revisions if that ever becomes necessary.
643 */ 640 */
644 if (bus_num > VME_USER_BUS_MAX) { 641 if (bus_num > VME_USER_BUS_MAX) {
645 printk(KERN_ERR "%s: Driver only able to handle %d buses\n", 642 pr_err("Driver only able to handle %d buses\n",
646 driver_name, VME_USER_BUS_MAX); 643 VME_USER_BUS_MAX);
647 bus_num = VME_USER_BUS_MAX; 644 bus_num = VME_USER_BUS_MAX;
648 } 645 }
649 646
@@ -676,15 +673,14 @@ static int vme_user_match(struct vme_dev *vdev)
676 * as practical. We will therefore reserve the buffers and request the images 673 * as practical. We will therefore reserve the buffers and request the images
677 * here so that we don't have to do it later. 674 * here so that we don't have to do it later.
678 */ 675 */
679static int __devinit vme_user_probe(struct vme_dev *vdev) 676static int vme_user_probe(struct vme_dev *vdev)
680{ 677{
681 int i, err; 678 int i, err;
682 char name[12]; 679 char name[12];
683 680
684 /* Save pointer to the bridge device */ 681 /* Save pointer to the bridge device */
685 if (vme_user_bridge != NULL) { 682 if (vme_user_bridge != NULL) {
686 printk(KERN_ERR "%s: Driver can only be loaded for 1 device\n", 683 dev_err(&vdev->dev, "Driver can only be loaded for 1 device\n");
687 driver_name);
688 err = -EINVAL; 684 err = -EINVAL;
689 goto err_dev; 685 goto err_dev;
690 } 686 }
@@ -707,8 +703,8 @@ static int __devinit vme_user_probe(struct vme_dev *vdev)
707 err = register_chrdev_region(MKDEV(VME_MAJOR, 0), VME_DEVS, 703 err = register_chrdev_region(MKDEV(VME_MAJOR, 0), VME_DEVS,
708 driver_name); 704 driver_name);
709 if (err) { 705 if (err) {
710 printk(KERN_WARNING "%s: Error getting Major Number %d for " 706 dev_warn(&vdev->dev, "Error getting Major Number %d for driver.\n",
711 "driver.\n", driver_name, VME_MAJOR); 707 VME_MAJOR);
712 goto err_region; 708 goto err_region;
713 } 709 }
714 710
@@ -718,7 +714,7 @@ static int __devinit vme_user_probe(struct vme_dev *vdev)
718 vme_user_cdev->owner = THIS_MODULE; 714 vme_user_cdev->owner = THIS_MODULE;
719 err = cdev_add(vme_user_cdev, MKDEV(VME_MAJOR, 0), VME_DEVS); 715 err = cdev_add(vme_user_cdev, MKDEV(VME_MAJOR, 0), VME_DEVS);
720 if (err) { 716 if (err) {
721 printk(KERN_WARNING "%s: cdev_all failed\n", driver_name); 717 dev_warn(&vdev->dev, "cdev_all failed\n");
722 goto err_char; 718 goto err_char;
723 } 719 }
724 720
@@ -732,16 +728,16 @@ static int __devinit vme_user_probe(struct vme_dev *vdev)
732 image[i].resource = vme_slave_request(vme_user_bridge, 728 image[i].resource = vme_slave_request(vme_user_bridge,
733 VME_A24, VME_SCT); 729 VME_A24, VME_SCT);
734 if (image[i].resource == NULL) { 730 if (image[i].resource == NULL) {
735 printk(KERN_WARNING "Unable to allocate slave " 731 dev_warn(&vdev->dev,
736 "resource\n"); 732 "Unable to allocate slave resource\n");
737 goto err_slave; 733 goto err_slave;
738 } 734 }
739 image[i].size_buf = PCI_BUF_SIZE; 735 image[i].size_buf = PCI_BUF_SIZE;
740 image[i].kern_buf = vme_alloc_consistent(image[i].resource, 736 image[i].kern_buf = vme_alloc_consistent(image[i].resource,
741 image[i].size_buf, &image[i].pci_buf); 737 image[i].size_buf, &image[i].pci_buf);
742 if (image[i].kern_buf == NULL) { 738 if (image[i].kern_buf == NULL) {
743 printk(KERN_WARNING "Unable to allocate memory for " 739 dev_warn(&vdev->dev,
744 "buffer\n"); 740 "Unable to allocate memory for buffer\n");
745 image[i].pci_buf = 0; 741 image[i].pci_buf = 0;
746 vme_slave_free(image[i].resource); 742 vme_slave_free(image[i].resource);
747 err = -ENOMEM; 743 err = -ENOMEM;
@@ -758,15 +754,15 @@ static int __devinit vme_user_probe(struct vme_dev *vdev)
758 image[i].resource = vme_master_request(vme_user_bridge, 754 image[i].resource = vme_master_request(vme_user_bridge,
759 VME_A32, VME_SCT, VME_D32); 755 VME_A32, VME_SCT, VME_D32);
760 if (image[i].resource == NULL) { 756 if (image[i].resource == NULL) {
761 printk(KERN_WARNING "Unable to allocate master " 757 dev_warn(&vdev->dev,
762 "resource\n"); 758 "Unable to allocate master resource\n");
763 goto err_master; 759 goto err_master;
764 } 760 }
765 image[i].size_buf = PCI_BUF_SIZE; 761 image[i].size_buf = PCI_BUF_SIZE;
766 image[i].kern_buf = kmalloc(image[i].size_buf, GFP_KERNEL); 762 image[i].kern_buf = kmalloc(image[i].size_buf, GFP_KERNEL);
767 if (image[i].kern_buf == NULL) { 763 if (image[i].kern_buf == NULL) {
768 printk(KERN_WARNING "Unable to allocate memory for " 764 dev_warn(&vdev->dev,
769 "master window buffers\n"); 765 "Unable to allocate memory for master window buffers\n");
770 err = -ENOMEM; 766 err = -ENOMEM;
771 goto err_master_buf; 767 goto err_master_buf;
772 } 768 }
@@ -775,7 +771,7 @@ static int __devinit vme_user_probe(struct vme_dev *vdev)
775 /* Create sysfs entries - on udev systems this creates the dev files */ 771 /* Create sysfs entries - on udev systems this creates the dev files */
776 vme_user_sysfs_class = class_create(THIS_MODULE, driver_name); 772 vme_user_sysfs_class = class_create(THIS_MODULE, driver_name);
777 if (IS_ERR(vme_user_sysfs_class)) { 773 if (IS_ERR(vme_user_sysfs_class)) {
778 printk(KERN_ERR "Error creating vme_user class.\n"); 774 dev_err(&vdev->dev, "Error creating vme_user class.\n");
779 err = PTR_ERR(vme_user_sysfs_class); 775 err = PTR_ERR(vme_user_sysfs_class);
780 goto err_class; 776 goto err_class;
781 } 777 }
@@ -803,8 +799,7 @@ static int __devinit vme_user_probe(struct vme_dev *vdev)
803 image[i].device = device_create(vme_user_sysfs_class, NULL, 799 image[i].device = device_create(vme_user_sysfs_class, NULL,
804 MKDEV(VME_MAJOR, i), NULL, name, num); 800 MKDEV(VME_MAJOR, i), NULL, name, num);
805 if (IS_ERR(image[i].device)) { 801 if (IS_ERR(image[i].device)) {
806 printk(KERN_INFO "%s: Error creating sysfs device\n", 802 dev_info(&vdev->dev, "Error creating sysfs device\n");
807 driver_name);
808 err = PTR_ERR(image[i].device); 803 err = PTR_ERR(image[i].device);
809 goto err_sysfs; 804 goto err_sysfs;
810 } 805 }
@@ -851,7 +846,7 @@ err_dev:
851 return err; 846 return err;
852} 847}
853 848
854static int __devexit vme_user_remove(struct vme_dev *dev) 849static int vme_user_remove(struct vme_dev *dev)
855{ 850{
856 int i; 851 int i;
857 852
diff --git a/drivers/staging/vt6655/device_main.c b/drivers/staging/vt6655/device_main.c
index 9e3b3f2bbe53..453c83d7fe8c 100644
--- a/drivers/staging/vt6655/device_main.c
+++ b/drivers/staging/vt6655/device_main.c
@@ -356,7 +356,7 @@ static char* get_chip_name(int chip_id)
356 return chip_info_table[i].name; 356 return chip_info_table[i].name;
357} 357}
358 358
359static void __devexit vt6655_remove(struct pci_dev *pcid) 359static void vt6655_remove(struct pci_dev *pcid)
360{ 360{
361 PSDevice pDevice = pci_get_drvdata(pcid); 361 PSDevice pDevice = pci_get_drvdata(pcid);
362 362
@@ -902,7 +902,7 @@ static const struct net_device_ops device_netdev_ops = {
902 .ndo_set_rx_mode = device_set_multi, 902 .ndo_set_rx_mode = device_set_multi,
903}; 903};
904 904
905static int __devinit 905static int
906vt6655_probe(struct pci_dev *pcid, const struct pci_device_id *ent) 906vt6655_probe(struct pci_dev *pcid, const struct pci_device_id *ent)
907{ 907{
908 static bool bFirst = true; 908 static bool bFirst = true;
@@ -1099,7 +1099,7 @@ static void device_print_info(PSDevice pDevice)
1099 1099
1100} 1100}
1101 1101
1102static void __devinit vt6655_init_info(struct pci_dev* pcid, PSDevice* ppDevice, 1102static void vt6655_init_info(struct pci_dev* pcid, PSDevice* ppDevice,
1103 PCHIP_INFO pChip_info) { 1103 PCHIP_INFO pChip_info) {
1104 1104
1105 PSDevice p; 1105 PSDevice p;
diff --git a/drivers/staging/vt6655/hostap.c b/drivers/staging/vt6655/hostap.c
index 67b1b88b1b89..5f13890cf124 100644
--- a/drivers/staging/vt6655/hostap.c
+++ b/drivers/staging/vt6655/hostap.c
@@ -596,9 +596,9 @@ static int hostap_set_encryption(PSDevice pDevice,
596 596
597 if (param->u.crypt.seq) { 597 if (param->u.crypt.seq) {
598 memcpy(&abySeq, param->u.crypt.seq, 8); 598 memcpy(&abySeq, param->u.crypt.seq, 8);
599 for (ii = 0 ; ii < 8 ; ii++) { 599 for (ii = 0 ; ii < 8 ; ii++)
600 KeyRSC |= (abySeq[ii] << (ii * 8)); 600 KeyRSC |= (unsigned long)abySeq[ii] << (ii * 8);
601 } 601
602 dwKeyIndex |= 1 << 29; 602 dwKeyIndex |= 1 << 29;
603 pMgmt->sNodeDBTable[iNodeIndex].KeyRSC = KeyRSC; 603 pMgmt->sNodeDBTable[iNodeIndex].KeyRSC = KeyRSC;
604 } 604 }
diff --git a/drivers/staging/vt6655/rxtx.c b/drivers/staging/vt6655/rxtx.c
index 4972e57845c2..875ee4442386 100644
--- a/drivers/staging/vt6655/rxtx.c
+++ b/drivers/staging/vt6655/rxtx.c
@@ -242,7 +242,7 @@ s_vFillTxKey (
242 } 242 }
243 // Append IV after Mac Header 243 // Append IV after Mac Header
244 *pdwIV &= WEP_IV_MASK;//00000000 11111111 11111111 11111111 244 *pdwIV &= WEP_IV_MASK;//00000000 11111111 11111111 11111111
245 *pdwIV |= (byKeyIndex << 30); 245 *pdwIV |= (unsigned long)byKeyIndex << 30;
246 *pdwIV = cpu_to_le32(*pdwIV); 246 *pdwIV = cpu_to_le32(*pdwIV);
247 pDevice->dwIVCounter++; 247 pDevice->dwIVCounter++;
248 if (pDevice->dwIVCounter > WEP_IV_MASK) { 248 if (pDevice->dwIVCounter > WEP_IV_MASK) {
diff --git a/drivers/staging/vt6655/wcmd.c b/drivers/staging/vt6655/wcmd.c
index 94bd1fc42c93..6d0b87a14267 100644
--- a/drivers/staging/vt6655/wcmd.c
+++ b/drivers/staging/vt6655/wcmd.c
@@ -412,6 +412,7 @@ vCommandTimer (
412 if (!is_channel_valid(pMgmt->uScanChannel)) { 412 if (!is_channel_valid(pMgmt->uScanChannel)) {
413 DBG_PRT(MSG_LEVEL_DEBUG, KERN_INFO "Invalid channel pMgmt->uScanChannel = %d \n",pMgmt->uScanChannel); 413 DBG_PRT(MSG_LEVEL_DEBUG, KERN_INFO "Invalid channel pMgmt->uScanChannel = %d \n",pMgmt->uScanChannel);
414 s_bCommandComplete(pDevice); 414 s_bCommandComplete(pDevice);
415 spin_unlock_irq(&pDevice->lock);
415 return; 416 return;
416 } 417 }
417//printk("chester-pMgmt->uScanChannel=%d,pDevice->byMaxChannel=%d\n",pMgmt->uScanChannel,pDevice->byMaxChannel); 418//printk("chester-pMgmt->uScanChannel=%d,pDevice->byMaxChannel=%d\n",pMgmt->uScanChannel,pDevice->byMaxChannel);
diff --git a/drivers/staging/vt6656/80211mgr.c b/drivers/staging/vt6656/80211mgr.c
index 39f98423dc02..e6ced95e6fa7 100644
--- a/drivers/staging/vt6656/80211mgr.c
+++ b/drivers/staging/vt6656/80211mgr.c
@@ -52,11 +52,11 @@
52 * 52 *
53 */ 53 */
54 54
55#include "device.h"
55#include "tmacro.h" 56#include "tmacro.h"
56#include "tether.h" 57#include "tether.h"
57#include "80211mgr.h" 58#include "80211mgr.h"
58#include "80211hdr.h" 59#include "80211hdr.h"
59#include "device.h"
60#include "wpa.h" 60#include "wpa.h"
61 61
62/*--------------------- Static Definitions -------------------------*/ 62/*--------------------- Static Definitions -------------------------*/
diff --git a/drivers/staging/vt6656/Makefile b/drivers/staging/vt6656/Makefile
index 41ed06bb6654..c998547884c0 100644
--- a/drivers/staging/vt6656/Makefile
+++ b/drivers/staging/vt6656/Makefile
@@ -20,7 +20,6 @@ vt6656_stage-y += main_usb.o \
20 rc4.o \ 20 rc4.o \
21 tether.o \ 21 tether.o \
22 tcrc.o \ 22 tcrc.o \
23 ioctl.o \
24 hostap.o \ 23 hostap.o \
25 wpa.o \ 24 wpa.o \
26 key.o \ 25 key.o \
diff --git a/drivers/staging/vt6656/bssdb.c b/drivers/staging/vt6656/bssdb.c
index 2ac066df8340..6a1394192248 100644
--- a/drivers/staging/vt6656/bssdb.c
+++ b/drivers/staging/vt6656/bssdb.c
@@ -882,7 +882,6 @@ void BSSvSecondCallBack(void *hDeviceContext)
882 unsigned int uSleepySTACnt = 0; 882 unsigned int uSleepySTACnt = 0;
883 unsigned int uNonShortSlotSTACnt = 0; 883 unsigned int uNonShortSlotSTACnt = 0;
884 unsigned int uLongPreambleSTACnt = 0; 884 unsigned int uLongPreambleSTACnt = 0;
885 viawget_wpa_header *wpahdr;
886 885
887 spin_lock_irq(&pDevice->lock); 886 spin_lock_irq(&pDevice->lock);
888 887
@@ -913,7 +912,6 @@ if(pDevice->byReAssocCount > 0) {
913 if((pDevice->byReAssocCount > 10) && (pDevice->bLinkPass != TRUE)) { //10 sec timeout 912 if((pDevice->byReAssocCount > 10) && (pDevice->bLinkPass != TRUE)) { //10 sec timeout
914 printk("Re-association timeout!!!\n"); 913 printk("Re-association timeout!!!\n");
915 pDevice->byReAssocCount = 0; 914 pDevice->byReAssocCount = 0;
916 #ifdef WPA_SUPPLICANT_DRIVER_WEXT_SUPPORT
917 // if(pDevice->bWPASuppWextEnabled == TRUE) 915 // if(pDevice->bWPASuppWextEnabled == TRUE)
918 { 916 {
919 union iwreq_data wrqu; 917 union iwreq_data wrqu;
@@ -922,20 +920,11 @@ if(pDevice->byReAssocCount > 0) {
922 PRINT_K("wireless_send_event--->SIOCGIWAP(disassociated)\n"); 920 PRINT_K("wireless_send_event--->SIOCGIWAP(disassociated)\n");
923 wireless_send_event(pDevice->dev, SIOCGIWAP, &wrqu, NULL); 921 wireless_send_event(pDevice->dev, SIOCGIWAP, &wrqu, NULL);
924 } 922 }
925 #endif
926 } 923 }
927 else if(pDevice->bLinkPass == TRUE) 924 else if(pDevice->bLinkPass == TRUE)
928 pDevice->byReAssocCount = 0; 925 pDevice->byReAssocCount = 0;
929} 926}
930 927
931if((pMgmt->eCurrState!=WMAC_STATE_ASSOC) &&
932 (pMgmt->eLastState==WMAC_STATE_ASSOC))
933{
934 union iwreq_data wrqu;
935 memset(&wrqu, 0, sizeof(wrqu));
936 wrqu.data.flags = RT_DISCONNECTED_EVENT_FLAG;
937 wireless_send_event(pDevice->dev, IWEVCUSTOM, &wrqu, NULL);
938}
939 pMgmt->eLastState = pMgmt->eCurrState ; 928 pMgmt->eLastState = pMgmt->eCurrState ;
940 929
941 s_uCalculateLinkQual((void *)pDevice); 930 s_uCalculateLinkQual((void *)pDevice);
@@ -1102,21 +1091,6 @@ if((pMgmt->eCurrState!=WMAC_STATE_ASSOC) &&
1102 1091
1103 DBG_PRT(MSG_LEVEL_NOTICE, KERN_INFO "Lost AP beacon [%d] sec, disconnected !\n", pMgmt->sNodeDBTable[0].uInActiveCount); 1092 DBG_PRT(MSG_LEVEL_NOTICE, KERN_INFO "Lost AP beacon [%d] sec, disconnected !\n", pMgmt->sNodeDBTable[0].uInActiveCount);
1104 /* let wpa supplicant know AP may disconnect */ 1093 /* let wpa supplicant know AP may disconnect */
1105 if ((pDevice->bWPADEVUp) && (pDevice->skb != NULL)) {
1106 wpahdr = (viawget_wpa_header *)pDevice->skb->data;
1107 wpahdr->type = VIAWGET_DISASSOC_MSG;
1108 wpahdr->resp_ie_len = 0;
1109 wpahdr->req_ie_len = 0;
1110 skb_put(pDevice->skb, sizeof(viawget_wpa_header));
1111 pDevice->skb->dev = pDevice->wpadev;
1112 skb_reset_mac_header(pDevice->skb);
1113 pDevice->skb->pkt_type = PACKET_HOST;
1114 pDevice->skb->protocol = htons(ETH_P_802_2);
1115 memset(pDevice->skb->cb, 0, sizeof(pDevice->skb->cb));
1116 netif_rx(pDevice->skb);
1117 pDevice->skb = dev_alloc_skb((int)pDevice->rx_buf_sz);
1118 }
1119 #ifdef WPA_SUPPLICANT_DRIVER_WEXT_SUPPORT
1120 { 1094 {
1121 union iwreq_data wrqu; 1095 union iwreq_data wrqu;
1122 memset(&wrqu, 0, sizeof (wrqu)); 1096 memset(&wrqu, 0, sizeof (wrqu));
@@ -1124,7 +1098,6 @@ if((pMgmt->eCurrState!=WMAC_STATE_ASSOC) &&
1124 PRINT_K("wireless_send_event--->SIOCGIWAP(disassociated)\n"); 1098 PRINT_K("wireless_send_event--->SIOCGIWAP(disassociated)\n");
1125 wireless_send_event(pDevice->dev, SIOCGIWAP, &wrqu, NULL); 1099 wireless_send_event(pDevice->dev, SIOCGIWAP, &wrqu, NULL);
1126 } 1100 }
1127 #endif
1128 } 1101 }
1129 } 1102 }
1130 else if (pItemSSID->len != 0) { 1103 else if (pItemSSID->len != 0) {
@@ -1144,20 +1117,6 @@ DBG_PRT(MSG_LEVEL_DEBUG, KERN_INFO "bIsRoaming %d, !\n", pDevice->bIsRoaming );
1144 pDevice->uAutoReConnectTime = 0; 1117 pDevice->uAutoReConnectTime = 0;
1145 pDevice->uIsroamingTime = 0; 1118 pDevice->uIsroamingTime = 0;
1146 pDevice->bRoaming = FALSE; 1119 pDevice->bRoaming = FALSE;
1147
1148 wpahdr = (viawget_wpa_header *)pDevice->skb->data;
1149 wpahdr->type = VIAWGET_CCKM_ROAM_MSG;
1150 wpahdr->resp_ie_len = 0;
1151 wpahdr->req_ie_len = 0;
1152 skb_put(pDevice->skb, sizeof(viawget_wpa_header));
1153 pDevice->skb->dev = pDevice->wpadev;
1154 skb_reset_mac_header(pDevice->skb);
1155 pDevice->skb->pkt_type = PACKET_HOST;
1156 pDevice->skb->protocol = htons(ETH_P_802_2);
1157 memset(pDevice->skb->cb, 0, sizeof(pDevice->skb->cb));
1158 netif_rx(pDevice->skb);
1159 pDevice->skb = dev_alloc_skb((int)pDevice->rx_buf_sz);
1160
1161 } 1120 }
1162 else if ((pDevice->bRoaming == FALSE)&&(pDevice->bIsRoaming == TRUE)) { 1121 else if ((pDevice->bRoaming == FALSE)&&(pDevice->bIsRoaming == TRUE)) {
1163 pDevice->uIsroamingTime++; 1122 pDevice->uIsroamingTime++;
@@ -1169,11 +1128,9 @@ DBG_PRT(MSG_LEVEL_DEBUG, KERN_INFO "bIsRoaming %d, !\n", pDevice->bIsRoaming );
1169else { 1128else {
1170 if (pDevice->uAutoReConnectTime < 10) { 1129 if (pDevice->uAutoReConnectTime < 10) {
1171 pDevice->uAutoReConnectTime++; 1130 pDevice->uAutoReConnectTime++;
1172 #ifdef WPA_SUPPLICANT_DRIVER_WEXT_SUPPORT
1173 //network manager support need not do Roaming scan??? 1131 //network manager support need not do Roaming scan???
1174 if(pDevice->bWPASuppWextEnabled ==TRUE) 1132 if(pDevice->bWPASuppWextEnabled ==TRUE)
1175 pDevice->uAutoReConnectTime = 0; 1133 pDevice->uAutoReConnectTime = 0;
1176 #endif
1177 } 1134 }
1178 else { 1135 else {
1179 //mike use old encryption status for wpa reauthen 1136 //mike use old encryption status for wpa reauthen
diff --git a/drivers/staging/vt6656/desc.h b/drivers/staging/vt6656/desc.h
index b68b2ec96eaa..5007e98d1b0e 100644
--- a/drivers/staging/vt6656/desc.h
+++ b/drivers/staging/vt6656/desc.h
@@ -298,7 +298,7 @@ typedef const SCTS_FB *PCSCTS_FB;
298// Tx FIFO header 298// Tx FIFO header
299// 299//
300typedef struct tagSTxBufHead { 300typedef struct tagSTxBufHead {
301 DWORD adwTxKey[4]; 301 u32 adwTxKey[4];
302 WORD wFIFOCtl; 302 WORD wFIFOCtl;
303 WORD wTimeStamp; 303 WORD wTimeStamp;
304 WORD wFragCtl; 304 WORD wFragCtl;
@@ -376,24 +376,24 @@ typedef const STxDataHead_a_FB *PCSTxDataHead_a_FB;
376// MICHDR data header 376// MICHDR data header
377// 377//
378typedef struct tagSMICHDRHead { 378typedef struct tagSMICHDRHead {
379 DWORD adwHDR0[4]; 379 u32 adwHDR0[4];
380 DWORD adwHDR1[4]; 380 u32 adwHDR1[4];
381 DWORD adwHDR2[4]; 381 u32 adwHDR2[4];
382} __attribute__ ((__packed__)) 382} __attribute__ ((__packed__))
383SMICHDRHead, *PSMICHDRHead; 383SMICHDRHead, *PSMICHDRHead;
384 384
385typedef const SMICHDRHead *PCSMICHDRHead; 385typedef const SMICHDRHead *PCSMICHDRHead;
386 386
387typedef struct tagSBEACONCtl { 387typedef struct tagSBEACONCtl {
388 DWORD BufReady : 1; 388 u32 BufReady:1;
389 DWORD TSF : 15; 389 u32 TSF:15;
390 DWORD BufLen : 11; 390 u32 BufLen:11;
391 DWORD Reserved : 5; 391 u32 Reserved:5;
392} __attribute__ ((__packed__)) 392} __attribute__ ((__packed__))
393SBEACONCtl; 393SBEACONCtl;
394 394
395typedef struct tagSSecretKey { 395typedef struct tagSSecretKey {
396 DWORD dwLowDword; 396 u32 dwLowDword;
397 BYTE byHighByte; 397 BYTE byHighByte;
398} __attribute__ ((__packed__)) 398} __attribute__ ((__packed__))
399SSecretKey; 399SSecretKey;
@@ -402,11 +402,11 @@ typedef struct tagSKeyEntry {
402 BYTE abyAddrHi[2]; 402 BYTE abyAddrHi[2];
403 WORD wKCTL; 403 WORD wKCTL;
404 BYTE abyAddrLo[4]; 404 BYTE abyAddrLo[4];
405 DWORD dwKey0[4]; 405 u32 dwKey0[4];
406 DWORD dwKey1[4]; 406 u32 dwKey1[4];
407 DWORD dwKey2[4]; 407 u32 dwKey2[4];
408 DWORD dwKey3[4]; 408 u32 dwKey3[4];
409 DWORD dwKey4[4]; 409 u32 dwKey4[4];
410} __attribute__ ((__packed__)) 410} __attribute__ ((__packed__))
411SKeyEntry; 411SKeyEntry;
412 412
diff --git a/drivers/staging/vt6656/device.h b/drivers/staging/vt6656/device.h
index 6370d1039103..25bf03af7733 100644
--- a/drivers/staging/vt6656/device.h
+++ b/drivers/staging/vt6656/device.h
@@ -30,47 +30,28 @@
30#define __DEVICE_H__ 30#define __DEVICE_H__
31 31
32#include <linux/module.h> 32#include <linux/module.h>
33#include <linux/types.h>
34#include <linux/init.h>
35#include <linux/mm.h>
36#include <linux/errno.h>
37#include <linux/ioport.h>
38#include <linux/pci.h>
39#include <linux/kernel.h> 33#include <linux/kernel.h>
40#include <linux/netdevice.h>
41#include <linux/etherdevice.h>
42#include <linux/skbuff.h>
43#include <linux/delay.h>
44#include <linux/timer.h>
45#include <linux/slab.h> 34#include <linux/slab.h>
46#include <linux/interrupt.h> 35#include <linux/init.h>
47#include <linux/string.h> 36#include <linux/delay.h>
48#include <linux/wait.h> 37#include <linux/device.h>
38#include <linux/firmware.h>
39#include <linux/etherdevice.h>
40#include <linux/suspend.h>
49#include <linux/if_arp.h> 41#include <linux/if_arp.h>
50#include <linux/sched.h> 42#include <linux/wireless.h>
51#include <linux/if.h> 43#include <net/iw_handler.h>
52#include <linux/rtnetlink.h>//James 44#include <net/cfg80211.h>
53#include <linux/proc_fs.h> 45#include <linux/timer.h>
54#include <linux/inetdevice.h>
55#include <linux/reboot.h>
56#include <linux/usb.h> 46#include <linux/usb.h>
57#include <linux/signal.h> 47
58#include <linux/firmware.h> 48
59#include <asm/io.h>
60#include <asm/uaccess.h>
61#ifdef SIOCETHTOOL 49#ifdef SIOCETHTOOL
62#define DEVICE_ETHTOOL_IOCTL_SUPPORT 50#define DEVICE_ETHTOOL_IOCTL_SUPPORT
63#include <linux/ethtool.h> 51#include <linux/ethtool.h>
64#else 52#else
65#undef DEVICE_ETHTOOL_IOCTL_SUPPORT 53#undef DEVICE_ETHTOOL_IOCTL_SUPPORT
66#endif 54#endif
67/* Include Wireless Extension definition and check version - Jean II */
68#include <linux/wireless.h>
69#include <net/iw_handler.h> // New driver API
70
71#ifndef WPA_SUPPLICANT_DRIVER_WEXT_SUPPORT
72#define WPA_SUPPLICANT_DRIVER_WEXT_SUPPORT
73#endif
74 55
75//please copy below macro to driver_event.c for API 56//please copy below macro to driver_event.c for API
76#define RT_INSMOD_EVENT_FLAG 0x0101 57#define RT_INSMOD_EVENT_FLAG 0x0101
@@ -418,7 +399,6 @@ typedef struct __device_info {
418 struct net_device* dev; 399 struct net_device* dev;
419 struct net_device_stats stats; 400 struct net_device_stats stats;
420 401
421 const struct firmware *firmware;
422 402
423 OPTIONS sOpts; 403 OPTIONS sOpts;
424 404
@@ -734,7 +714,6 @@ typedef struct __device_info {
734 BYTE byKeyIndex; 714 BYTE byKeyIndex;
735 715
736 BOOL bAES; 716 BOOL bAES;
737 BYTE byCntMeasure;
738 717
739 unsigned int uKeyLength; 718 unsigned int uKeyLength;
740 BYTE abyKey[WLAN_WEP232_KEYLEN]; 719 BYTE abyKey[WLAN_WEP232_KEYLEN];
@@ -814,16 +793,13 @@ typedef struct __device_info {
814 //WPA supplicant daemon 793 //WPA supplicant daemon
815 struct net_device *wpadev; 794 struct net_device *wpadev;
816 BOOL bWPADEVUp; 795 BOOL bWPADEVUp;
817 struct sk_buff *skb;
818 //-- 796 //--
819 797
820#ifdef WPA_SUPPLICANT_DRIVER_WEXT_SUPPORT
821 BOOL bwextstep0; 798 BOOL bwextstep0;
822 BOOL bwextstep1; 799 BOOL bwextstep1;
823 BOOL bwextstep2; 800 BOOL bwextstep2;
824 BOOL bwextstep3; 801 BOOL bwextstep3;
825 BOOL bWPASuppWextEnabled; 802 BOOL bWPASuppWextEnabled;
826#endif
827 803
828#ifdef HOSTAP 804#ifdef HOSTAP
829 // user space daemon: hostapd, is used for HOSTAP 805 // user space daemon: hostapd, is used for HOSTAP
diff --git a/drivers/staging/vt6656/dpc.c b/drivers/staging/vt6656/dpc.c
index 28edf9e7efcb..e94f6a1647a3 100644
--- a/drivers/staging/vt6656/dpc.c
+++ b/drivers/staging/vt6656/dpc.c
@@ -332,7 +332,7 @@ RXbBulkInProcessData (
332 PBYTE pbyFrame; 332 PBYTE pbyFrame;
333 BOOL bDeFragRx = FALSE; 333 BOOL bDeFragRx = FALSE;
334 unsigned int cbHeaderOffset; 334 unsigned int cbHeaderOffset;
335 unsigned int FrameSize; 335 u32 FrameSize;
336 WORD wEtherType = 0; 336 WORD wEtherType = 0;
337 signed int iSANodeIndex = -1; 337 signed int iSANodeIndex = -1;
338 signed int iDANodeIndex = -1; 338 signed int iDANodeIndex = -1;
@@ -351,7 +351,7 @@ RXbBulkInProcessData (
351 /* signed long ldBm = 0; */ 351 /* signed long ldBm = 0; */
352 BOOL bIsWEP = FALSE; 352 BOOL bIsWEP = FALSE;
353 BOOL bExtIV = FALSE; 353 BOOL bExtIV = FALSE;
354 DWORD dwWbkStatus; 354 u32 dwWbkStatus;
355 PRCB pRCBIndicate = pRCB; 355 PRCB pRCBIndicate = pRCB;
356 PBYTE pbyDAddress; 356 PBYTE pbyDAddress;
357 PWORD pwPLCP_Length; 357 PWORD pwPLCP_Length;
@@ -366,15 +366,15 @@ RXbBulkInProcessData (
366 366
367 skb = pRCB->skb; 367 skb = pRCB->skb;
368 368
369 //[31:16]RcvByteCount ( not include 4-byte Status ) 369 /* [31:16]RcvByteCount ( not include 4-byte Status ) */
370 dwWbkStatus = *( (PDWORD)(skb->data) ); 370 dwWbkStatus = *((u32 *)(skb->data));
371 FrameSize = (unsigned int)(dwWbkStatus >> 16); 371 FrameSize = dwWbkStatus >> 16;
372 FrameSize += 4; 372 FrameSize += 4;
373 373
374 if (BytesToIndicate != FrameSize) { 374 if (BytesToIndicate != FrameSize) {
375 DBG_PRT(MSG_LEVEL_DEBUG, KERN_INFO"---------- WRONG Length 1 \n"); 375 DBG_PRT(MSG_LEVEL_DEBUG, KERN_INFO"------- WRONG Length 1\n");
376 return FALSE; 376 return FALSE;
377 } 377 }
378 378
379 if ((BytesToIndicate > 2372) || (BytesToIndicate <= 40)) { 379 if ((BytesToIndicate > 2372) || (BytesToIndicate <= 40)) {
380 // Frame Size error drop this packet. 380 // Frame Size error drop this packet.
@@ -617,7 +617,7 @@ RXbBulkInProcessData (
617 //Discard beacon packet which channel is 0 617 //Discard beacon packet which channel is 0
618 if ( (WLAN_GET_FC_FSTYPE((pRxPacket->p80211Header->sA3.wFrameCtl)) == WLAN_FSTYPE_BEACON) || 618 if ( (WLAN_GET_FC_FSTYPE((pRxPacket->p80211Header->sA3.wFrameCtl)) == WLAN_FSTYPE_BEACON) ||
619 (WLAN_GET_FC_FSTYPE((pRxPacket->p80211Header->sA3.wFrameCtl)) == WLAN_FSTYPE_PROBERESP) ) { 619 (WLAN_GET_FC_FSTYPE((pRxPacket->p80211Header->sA3.wFrameCtl)) == WLAN_FSTYPE_PROBERESP) ) {
620 return TRUE; 620 return FALSE;
621 } 621 }
622 } 622 }
623 pRxPacket->byRxChannel = (*pbyRxSts) >> 2; 623 pRxPacket->byRxChannel = (*pbyRxSts) >> 2;
@@ -818,7 +818,6 @@ RXbBulkInProcessData (
818 DWORD dwMICKey0 = 0, dwMICKey1 = 0; 818 DWORD dwMICKey0 = 0, dwMICKey1 = 0;
819 DWORD dwLocalMIC_L = 0; 819 DWORD dwLocalMIC_L = 0;
820 DWORD dwLocalMIC_R = 0; 820 DWORD dwLocalMIC_R = 0;
821 viawget_wpa_header *wpahdr;
822 821
823 822
824 if (pMgmt->eCurrMode == WMAC_MODE_ESS_AP) { 823 if (pMgmt->eCurrMode == WMAC_MODE_ESS_AP) {
@@ -864,7 +863,6 @@ RXbBulkInProcessData (
864 pDevice->dev->name); 863 pDevice->dev->name);
865 } 864 }
866 } 865 }
867 #ifdef WPA_SUPPLICANT_DRIVER_WEXT_SUPPORT
868 //send event to wpa_supplicant 866 //send event to wpa_supplicant
869 //if(pDevice->bWPASuppWextEnabled == TRUE) 867 //if(pDevice->bWPASuppWextEnabled == TRUE)
870 { 868 {
@@ -889,31 +887,6 @@ RXbBulkInProcessData (
889 wireless_send_event(pDevice->dev, IWEVMICHAELMICFAILURE, &wrqu, (char *)&ev); 887 wireless_send_event(pDevice->dev, IWEVMICHAELMICFAILURE, &wrqu, (char *)&ev);
890 888
891 } 889 }
892 #endif
893
894
895 if ((pDevice->bWPADEVUp) && (pDevice->skb != NULL)) {
896 wpahdr = (viawget_wpa_header *)pDevice->skb->data;
897 if ((pMgmt->eCurrMode == WMAC_MODE_ESS_STA) &&
898 (pMgmt->eCurrState == WMAC_STATE_ASSOC) &&
899 (*pbyRsr & (RSR_ADDRBROAD | RSR_ADDRMULTI)) == 0) {
900 //s802_11_Status.Flags = NDIS_802_11_AUTH_REQUEST_PAIRWISE_ERROR;
901 wpahdr->type = VIAWGET_PTK_MIC_MSG;
902 } else {
903 //s802_11_Status.Flags = NDIS_802_11_AUTH_REQUEST_GROUP_ERROR;
904 wpahdr->type = VIAWGET_GTK_MIC_MSG;
905 }
906 wpahdr->resp_ie_len = 0;
907 wpahdr->req_ie_len = 0;
908 skb_put(pDevice->skb, sizeof(viawget_wpa_header));
909 pDevice->skb->dev = pDevice->wpadev;
910 skb_reset_mac_header(pDevice->skb);
911 pDevice->skb->pkt_type = PACKET_HOST;
912 pDevice->skb->protocol = htons(ETH_P_802_2);
913 memset(pDevice->skb->cb, 0, sizeof(pDevice->skb->cb));
914 netif_rx(pDevice->skb);
915 pDevice->skb = dev_alloc_skb((int)pDevice->rx_buf_sz);
916 }
917 890
918 return FALSE; 891 return FALSE;
919 892
@@ -1217,7 +1190,7 @@ static BOOL s_bHandleRxEncryption (
1217 if (byDecMode == KEY_CTL_WEP) { 1190 if (byDecMode == KEY_CTL_WEP) {
1218 // handle WEP 1191 // handle WEP
1219 if ((pDevice->byLocalID <= REV_ID_VT3253_A1) || 1192 if ((pDevice->byLocalID <= REV_ID_VT3253_A1) ||
1220 (((PSKeyTable)(pKey->pvKeyTable))->bSoftWEP == TRUE)) { 1193 (((PSKeyTable)(&pKey->pvKeyTable))->bSoftWEP == TRUE)) {
1221 // Software WEP 1194 // Software WEP
1222 // 1. 3253A 1195 // 1. 3253A
1223 // 2. WEP 256 1196 // 2. WEP 256
@@ -1238,7 +1211,7 @@ static BOOL s_bHandleRxEncryption (
1238 1211
1239 PayloadLen -= (WLAN_HDR_ADDR3_LEN + 8 + 4); // 24 is 802.11 header, 8 is IV&ExtIV, 4 is crc 1212 PayloadLen -= (WLAN_HDR_ADDR3_LEN + 8 + 4); // 24 is 802.11 header, 8 is IV&ExtIV, 4 is crc
1240 *pdwRxTSC47_16 = cpu_to_le32(*(PDWORD)(pbyIV + 4)); 1213 *pdwRxTSC47_16 = cpu_to_le32(*(PDWORD)(pbyIV + 4));
1241 DBG_PRT(MSG_LEVEL_DEBUG, KERN_INFO"ExtIV: %lx\n",*pdwRxTSC47_16); 1214 DBG_PRT(MSG_LEVEL_DEBUG, KERN_INFO"ExtIV: %x\n", *pdwRxTSC47_16);
1242 if (byDecMode == KEY_CTL_TKIP) { 1215 if (byDecMode == KEY_CTL_TKIP) {
1243 *pwRxTSC15_0 = cpu_to_le16(MAKEWORD(*(pbyIV+2), *pbyIV)); 1216 *pwRxTSC15_0 = cpu_to_le16(MAKEWORD(*(pbyIV+2), *pbyIV));
1244 } else { 1217 } else {
@@ -1324,9 +1297,9 @@ static BOOL s_bHostWepRxEncryption (
1324 1297
1325 if (byDecMode == KEY_CTL_WEP) { 1298 if (byDecMode == KEY_CTL_WEP) {
1326 // handle WEP 1299 // handle WEP
1327 DBG_PRT(MSG_LEVEL_DEBUG, KERN_INFO"byDecMode == KEY_CTL_WEP \n"); 1300 DBG_PRT(MSG_LEVEL_DEBUG, KERN_INFO"byDecMode == KEY_CTL_WEP\n");
1328 if ((pDevice->byLocalID <= REV_ID_VT3253_A1) || 1301 if ((pDevice->byLocalID <= REV_ID_VT3253_A1) ||
1329 (((PSKeyTable)(pKey->pvKeyTable))->bSoftWEP == TRUE) || 1302 (((PSKeyTable)(&pKey->pvKeyTable))->bSoftWEP == TRUE) ||
1330 (bOnFly == FALSE)) { 1303 (bOnFly == FALSE)) {
1331 // Software WEP 1304 // Software WEP
1332 // 1. 3253A 1305 // 1. 3253A
@@ -1349,7 +1322,7 @@ static BOOL s_bHostWepRxEncryption (
1349 1322
1350 PayloadLen -= (WLAN_HDR_ADDR3_LEN + 8 + 4); // 24 is 802.11 header, 8 is IV&ExtIV, 4 is crc 1323 PayloadLen -= (WLAN_HDR_ADDR3_LEN + 8 + 4); // 24 is 802.11 header, 8 is IV&ExtIV, 4 is crc
1351 *pdwRxTSC47_16 = cpu_to_le32(*(PDWORD)(pbyIV + 4)); 1324 *pdwRxTSC47_16 = cpu_to_le32(*(PDWORD)(pbyIV + 4));
1352 DBG_PRT(MSG_LEVEL_DEBUG, KERN_INFO"ExtIV: %lx\n",*pdwRxTSC47_16); 1325 DBG_PRT(MSG_LEVEL_DEBUG, KERN_INFO"ExtIV: %x\n", *pdwRxTSC47_16);
1353 1326
1354 if (byDecMode == KEY_CTL_TKIP) { 1327 if (byDecMode == KEY_CTL_TKIP) {
1355 *pwRxTSC15_0 = cpu_to_le16(MAKEWORD(*(pbyIV+2), *pbyIV)); 1328 *pwRxTSC15_0 = cpu_to_le16(MAKEWORD(*(pbyIV+2), *pbyIV));
@@ -1534,6 +1507,11 @@ RXvFreeRCB(
1534 ASSERT(!pRCB->Ref); // should be 0 1507 ASSERT(!pRCB->Ref); // should be 0
1535 ASSERT(pRCB->pDevice); // shouldn't be NULL 1508 ASSERT(pRCB->pDevice); // shouldn't be NULL
1536 1509
1510 if (bReAllocSkb == FALSE) {
1511 kfree_skb(pRCB->skb);
1512 bReAllocSkb = TRUE;
1513 }
1514
1537 if (bReAllocSkb == TRUE) { 1515 if (bReAllocSkb == TRUE) {
1538 pRCB->skb = dev_alloc_skb((int)pDevice->rx_buf_sz); 1516 pRCB->skb = dev_alloc_skb((int)pDevice->rx_buf_sz);
1539 // todo error handling 1517 // todo error handling
diff --git a/drivers/staging/vt6656/firmware.c b/drivers/staging/vt6656/firmware.c
index 8c8126a3540b..8831ea03c001 100644
--- a/drivers/staging/vt6656/firmware.c
+++ b/drivers/staging/vt6656/firmware.c
@@ -61,28 +61,24 @@ FIRMWAREbDownload(
61 PSDevice pDevice 61 PSDevice pDevice
62 ) 62 )
63{ 63{
64 struct device *dev = &pDevice->usb->dev;
64 const struct firmware *fw; 65 const struct firmware *fw;
65 int NdisStatus; 66 int NdisStatus;
66 void *pBuffer = NULL; 67 void *pBuffer = NULL;
67 BOOL result = FALSE; 68 BOOL result = FALSE;
68 u16 wLength; 69 u16 wLength;
69 int ii; 70 int ii, rc;
71
70 72
71 DBG_PRT(MSG_LEVEL_DEBUG, KERN_INFO"---->Download firmware\n"); 73 DBG_PRT(MSG_LEVEL_DEBUG, KERN_INFO"---->Download firmware\n");
72 spin_unlock_irq(&pDevice->lock); 74 spin_unlock_irq(&pDevice->lock);
73 75
74 if (!pDevice->firmware) { 76 rc = request_firmware(&fw, FIRMWARE_NAME, dev);
75 struct device *dev = &pDevice->usb->dev; 77 if (rc) {
76 int rc; 78 dev_err(dev, "firmware file %s request failed (%d)\n",
77 79 FIRMWARE_NAME, rc);
78 rc = request_firmware(&pDevice->firmware, FIRMWARE_NAME, dev);
79 if (rc) {
80 dev_err(dev, "firmware file %s request failed (%d)\n",
81 FIRMWARE_NAME, rc);
82 goto out; 80 goto out;
83 }
84 } 81 }
85 fw = pDevice->firmware;
86 82
87 pBuffer = kmalloc(FIRMWARE_CHUNK_SIZE, GFP_KERNEL); 83 pBuffer = kmalloc(FIRMWARE_CHUNK_SIZE, GFP_KERNEL);
88 if (!pBuffer) 84 if (!pBuffer)
@@ -103,10 +99,12 @@ FIRMWAREbDownload(
103 DBG_PRT(MSG_LEVEL_DEBUG, 99 DBG_PRT(MSG_LEVEL_DEBUG,
104 KERN_INFO"Download firmware...%d %zu\n", ii, fw->size); 100 KERN_INFO"Download firmware...%d %zu\n", ii, fw->size);
105 if (NdisStatus != STATUS_SUCCESS) 101 if (NdisStatus != STATUS_SUCCESS)
106 goto out; 102 goto free_fw;
107 } 103 }
108 104
109 result = TRUE; 105 result = TRUE;
106free_fw:
107 release_firmware(fw);
110 108
111out: 109out:
112 kfree(pBuffer); 110 kfree(pBuffer);
diff --git a/drivers/staging/vt6656/hostap.c b/drivers/staging/vt6656/hostap.c
index 0a73d4060ee1..26a7d0e4b048 100644
--- a/drivers/staging/vt6656/hostap.c
+++ b/drivers/staging/vt6656/hostap.c
@@ -542,9 +542,9 @@ static int hostap_set_encryption(PSDevice pDevice,
542 542
543 if (param->u.crypt.seq) { 543 if (param->u.crypt.seq) {
544 memcpy(&abySeq, param->u.crypt.seq, 8); 544 memcpy(&abySeq, param->u.crypt.seq, 8);
545 for (ii = 0 ; ii < 8 ; ii++) { 545 for (ii = 0 ; ii < 8 ; ii++)
546 KeyRSC |= (abySeq[ii] << (ii * 8)); 546 KeyRSC |= (unsigned long)abySeq[ii] << (ii * 8);
547 } 547
548 dwKeyIndex |= 1 << 29; 548 dwKeyIndex |= 1 << 29;
549 pMgmt->sNodeDBTable[iNodeIndex].KeyRSC = KeyRSC; 549 pMgmt->sNodeDBTable[iNodeIndex].KeyRSC = KeyRSC;
550 } 550 }
diff --git a/drivers/staging/vt6656/int.h b/drivers/staging/vt6656/int.h
index 3734e2c953d9..5d8faf9f96ec 100644
--- a/drivers/staging/vt6656/int.h
+++ b/drivers/staging/vt6656/int.h
@@ -48,8 +48,8 @@ typedef struct tagSINTData {
48 BYTE byTSR3; 48 BYTE byTSR3;
49 BYTE byPkt3; 49 BYTE byPkt3;
50 WORD wTime3; 50 WORD wTime3;
51 DWORD dwLoTSF; 51 u32 dwLoTSF;
52 DWORD dwHiTSF; 52 u32 dwHiTSF;
53 BYTE byISR0; 53 BYTE byISR0;
54 BYTE byISR1; 54 BYTE byISR1;
55 BYTE byRTSSuccess; 55 BYTE byRTSSuccess;
diff --git a/drivers/staging/vt6656/ioctl.c b/drivers/staging/vt6656/ioctl.c
deleted file mode 100644
index b6af5f691128..000000000000
--- a/drivers/staging/vt6656/ioctl.c
+++ /dev/null
@@ -1,648 +0,0 @@
1/*
2 * Copyright (c) 1996, 2003 VIA Networking Technologies, Inc.
3 * All rights reserved.
4 *
5 * This program is free software; you can redistribute it and/or modify
6 * it under the terms of the GNU General Public License as published by
7 * the Free Software Foundation; either version 2 of the License, or
8 * (at your option) any later version.
9 *
10 * This program is distributed in the hope that it will be useful,
11 * but WITHOUT ANY WARRANTY; without even the implied warranty of
12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 * GNU General Public License for more details.
14 *
15 * You should have received a copy of the GNU General Public License along
16 * with this program; if not, write to the Free Software Foundation, Inc.,
17 * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
18 *
19 * File: ioctl.c
20 *
21 * Purpose: private ioctl functions
22 *
23 * Author: Lyndon Chen
24 *
25 * Date: Auguest 20, 2003
26 *
27 * Functions:
28 *
29 * Revision History:
30 *
31 */
32
33#include "ioctl.h"
34#include "iocmd.h"
35#include "mac.h"
36#include "card.h"
37#include "hostap.h"
38#include "wpactl.h"
39#include "control.h"
40#include "rndis.h"
41#include "rf.h"
42
43SWPAResult wpa_Result;
44static int msglevel = MSG_LEVEL_INFO;
45
46int private_ioctl(PSDevice pDevice, struct ifreq *rq)
47{
48
49 PSCmdRequest pReq = (PSCmdRequest)rq;
50 PSMgmtObject pMgmt = &(pDevice->sMgmtObj);
51 int result = 0;
52 PWLAN_IE_SSID pItemSSID;
53 SCmdBSSJoin sJoinCmd;
54 SCmdZoneTypeSet sZoneTypeCmd;
55 SCmdScan sScanCmd;
56 SCmdStartAP sStartAPCmd;
57 SCmdSetWEP sWEPCmd;
58 SCmdValue sValue;
59 SBSSIDList sList;
60 SNodeList sNodeList;
61 PSBSSIDList pList;
62 PSNodeList pNodeList;
63 unsigned int cbListCount;
64 PKnownBSS pBSS;
65 PKnownNodeDB pNode;
66 unsigned int ii, jj;
67 SCmdLinkStatus sLinkStatus;
68 BYTE abySuppRates[] = {WLAN_EID_SUPP_RATES, 4, 0x02, 0x04, 0x0B, 0x16};
69 BYTE abyNullAddr[] = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00};
70 DWORD dwKeyIndex = 0;
71 BYTE abyScanSSID[WLAN_IEHDR_LEN + WLAN_SSID_MAXLEN + 1];
72 signed long ldBm;
73
74 pReq->wResult = 0;
75
76 switch (pReq->wCmdCode) {
77 case WLAN_CMD_BSS_SCAN:
78 if (copy_from_user(&sScanCmd, pReq->data, sizeof(SCmdScan))) {
79 result = -EFAULT;
80 break;
81 }
82
83 pItemSSID = (PWLAN_IE_SSID)sScanCmd.ssid;
84 if (pItemSSID->len > WLAN_SSID_MAXLEN + 1)
85 return -EINVAL;
86 if (pItemSSID->len != 0) {
87 memset(abyScanSSID, 0, WLAN_IEHDR_LEN + WLAN_SSID_MAXLEN + 1);
88 memcpy(abyScanSSID, pItemSSID, pItemSSID->len + WLAN_IEHDR_LEN);
89 }
90 spin_lock_irq(&pDevice->lock);
91
92 if (memcmp(pMgmt->abyCurrBSSID, &abyNullAddr[0], 6) == 0)
93 BSSvClearBSSList(pDevice, FALSE);
94 else
95 BSSvClearBSSList(pDevice, pDevice->bLinkPass);
96
97 DBG_PRT(MSG_LEVEL_DEBUG, KERN_INFO "WLAN_CMD_BSS_SCAN..begin\n");
98
99 if (pItemSSID->len != 0)
100 bScheduleCommand(pDevice, WLAN_CMD_BSSID_SCAN,
101 abyScanSSID);
102 else
103 bScheduleCommand(pDevice, WLAN_CMD_BSSID_SCAN, NULL);
104
105 spin_unlock_irq(&pDevice->lock);
106 break;
107
108 case WLAN_CMD_ZONETYPE_SET:
109 result = -EOPNOTSUPP;
110 break;
111
112 if (copy_from_user(&sZoneTypeCmd, pReq->data, sizeof(SCmdZoneTypeSet))) {
113 result = -EFAULT;
114 break;
115 }
116
117 if (sZoneTypeCmd.bWrite == TRUE) {
118 /* write zonetype */
119 if (sZoneTypeCmd.ZoneType == ZoneType_USA) {
120 /* set to USA */
121 printk("set_ZoneType:USA\n");
122 } else if (sZoneTypeCmd.ZoneType == ZoneType_Japan) {
123 /* set to Japan */
124 printk("set_ZoneType:Japan\n");
125 } else if (sZoneTypeCmd.ZoneType == ZoneType_Europe) {
126 /* set to Europe */
127 printk("set_ZoneType:Europe\n");
128 }
129 } else {
130 /* read zonetype */
131 BYTE zonetype = 0;
132
133 if (zonetype == 0x00) { /* USA */
134 sZoneTypeCmd.ZoneType = ZoneType_USA;
135 } else if (zonetype == 0x01) { /* Japan */
136 sZoneTypeCmd.ZoneType = ZoneType_Japan;
137 } else if (zonetype == 0x02) { /* Europe */
138 sZoneTypeCmd.ZoneType = ZoneType_Europe;
139 } else { /* Unknown ZoneType */
140 printk("Error:ZoneType[%x] Unknown ???\n", zonetype);
141 result = -EFAULT;
142 break;
143 }
144
145 if (copy_to_user(pReq->data, &sZoneTypeCmd,
146 sizeof(SCmdZoneTypeSet))) {
147 result = -EFAULT;
148 break;
149 }
150 }
151 break;
152
153 case WLAN_CMD_BSS_JOIN:
154 if (copy_from_user(&sJoinCmd, pReq->data, sizeof(SCmdBSSJoin))) {
155 result = -EFAULT;
156 break;
157 }
158
159 pItemSSID = (PWLAN_IE_SSID)sJoinCmd.ssid;
160 if (pItemSSID->len > WLAN_SSID_MAXLEN + 1)
161 return -EINVAL;
162 memset(pMgmt->abyDesireSSID, 0, WLAN_IEHDR_LEN + WLAN_SSID_MAXLEN + 1);
163 memcpy(pMgmt->abyDesireSSID, pItemSSID, pItemSSID->len + WLAN_IEHDR_LEN);
164 if (sJoinCmd.wBSSType == ADHOC) {
165 pMgmt->eConfigMode = WMAC_CONFIG_IBSS_STA;
166 DBG_PRT(MSG_LEVEL_DEBUG, KERN_INFO "ioct set to adhoc mode\n");
167 } else {
168 pMgmt->eConfigMode = WMAC_CONFIG_ESS_STA;
169 DBG_PRT(MSG_LEVEL_DEBUG, KERN_INFO "ioct set to STA mode\n");
170 }
171 if (sJoinCmd.bPSEnable == TRUE) {
172 pDevice->ePSMode = WMAC_POWER_FAST;
173 pMgmt->wListenInterval = 2;
174 DBG_PRT(MSG_LEVEL_DEBUG, KERN_INFO "Power Saving On\n");
175 } else {
176 pDevice->ePSMode = WMAC_POWER_CAM;
177 pMgmt->wListenInterval = 1;
178 DBG_PRT(MSG_LEVEL_DEBUG, KERN_INFO "Power Saving Off\n");
179 }
180
181 if (sJoinCmd.bShareKeyAuth == TRUE) {
182 pMgmt->bShareKeyAlgorithm = TRUE;
183 DBG_PRT(MSG_LEVEL_DEBUG, KERN_INFO "Share Key\n");
184 } else {
185 pMgmt->bShareKeyAlgorithm = FALSE;
186 DBG_PRT(MSG_LEVEL_DEBUG, KERN_INFO "Open System\n");
187 }
188
189 pDevice->uChannel = sJoinCmd.uChannel;
190 netif_stop_queue(pDevice->dev);
191 spin_lock_irq(&pDevice->lock);
192 pMgmt->eCurrState = WMAC_STATE_IDLE;
193 bScheduleCommand(pDevice, WLAN_CMD_BSSID_SCAN,
194 pMgmt->abyDesireSSID);
195 bScheduleCommand(pDevice, WLAN_CMD_SSID, NULL);
196 spin_unlock_irq(&pDevice->lock);
197 break;
198
199 case WLAN_CMD_SET_WEP:
200 DBG_PRT(MSG_LEVEL_DEBUG, KERN_INFO "WLAN_CMD_SET_WEP Key.\n");
201 memset(&sWEPCmd, 0, sizeof(SCmdSetWEP));
202 if (copy_from_user(&sWEPCmd, pReq->data, sizeof(SCmdSetWEP))) {
203 result = -EFAULT;
204 break;
205 }
206 if (sWEPCmd.bEnableWep != TRUE) {
207 int uu;
208
209 pDevice->bEncryptionEnable = FALSE;
210 pDevice->eEncryptionStatus = Ndis802_11EncryptionDisabled;
211 spin_lock_irq(&pDevice->lock);
212 for (uu = 0; uu < MAX_KEY_TABLE; uu++)
213 MACvDisableKeyEntry(pDevice, uu);
214 spin_unlock_irq(&pDevice->lock);
215 DBG_PRT(MSG_LEVEL_DEBUG, KERN_INFO "WEP function disable.\n");
216 break;
217 }
218
219 for (ii = 0; ii < WLAN_WEP_NKEYS; ii++) {
220 if (sWEPCmd.bWepKeyAvailable[ii]) {
221 if (ii == sWEPCmd.byKeyIndex)
222 dwKeyIndex = ii | (1 << 31);
223 else
224 dwKeyIndex = ii;
225 spin_lock_irq(&pDevice->lock);
226 KeybSetDefaultKey(pDevice, &(pDevice->sKey),
227 dwKeyIndex,
228 sWEPCmd.auWepKeyLength[ii],
229 NULL,
230 (PBYTE)&sWEPCmd.abyWepKey[ii][0],
231 KEY_CTL_WEP);
232 spin_unlock_irq(&pDevice->lock);
233 }
234 }
235 pDevice->byKeyIndex = sWEPCmd.byKeyIndex;
236 pDevice->bTransmitKey = TRUE;
237 pDevice->bEncryptionEnable = TRUE;
238 pDevice->eEncryptionStatus = Ndis802_11Encryption1Enabled;
239 break;
240
241 case WLAN_CMD_GET_LINK:
242 DBG_PRT(MSG_LEVEL_DEBUG, KERN_INFO "WLAN_CMD_GET_LINK status.\n");
243
244 memset(sLinkStatus.abySSID, 0, WLAN_SSID_MAXLEN + 1);
245
246 if (pMgmt->eCurrMode == WMAC_MODE_IBSS_STA)
247 sLinkStatus.wBSSType = ADHOC;
248 else
249 sLinkStatus.wBSSType = INFRA;
250
251 if (pMgmt->eCurrState == WMAC_STATE_JOINTED)
252 sLinkStatus.byState = ADHOC_JOINTED;
253 else
254 sLinkStatus.byState = ADHOC_STARTED;
255
256 sLinkStatus.uChannel = pMgmt->uCurrChannel;
257 if (pDevice->bLinkPass == TRUE) {
258 sLinkStatus.bLink = TRUE;
259 pItemSSID = (PWLAN_IE_SSID)pMgmt->abyCurrSSID;
260 memcpy(sLinkStatus.abySSID, pItemSSID->abySSID, pItemSSID->len);
261 memcpy(sLinkStatus.abyBSSID, pMgmt->abyCurrBSSID, WLAN_BSSID_LEN);
262 sLinkStatus.uLinkRate = pMgmt->sNodeDBTable[0].wTxDataRate;
263 DBG_PRT(MSG_LEVEL_DEBUG, KERN_INFO "Link Success!\n");
264 } else {
265 sLinkStatus.bLink = FALSE;
266 sLinkStatus.uLinkRate = 0;
267 }
268 if (copy_to_user(pReq->data, &sLinkStatus,
269 sizeof(SCmdLinkStatus))) {
270 result = -EFAULT;
271 break;
272 }
273 break;
274
275 case WLAN_CMD_GET_LISTLEN:
276 cbListCount = 0;
277 pBSS = &(pMgmt->sBSSList[0]);
278 for (ii = 0; ii < MAX_BSS_NUM; ii++) {
279 pBSS = &(pMgmt->sBSSList[ii]);
280 if (!pBSS->bActive)
281 continue;
282 cbListCount++;
283 }
284 sList.uItem = cbListCount;
285 if (copy_to_user(pReq->data, &sList, sizeof(SBSSIDList))) {
286 result = -EFAULT;
287 break;
288 }
289 pReq->wResult = 0;
290 break;
291
292 case WLAN_CMD_GET_LIST:
293 if (copy_from_user(&sList, pReq->data, sizeof(SBSSIDList))) {
294 result = -EFAULT;
295 break;
296 }
297 if (sList.uItem > (ULONG_MAX - sizeof(SBSSIDList)) / sizeof(SBSSIDItem)) {
298 result = -EINVAL;
299 break;
300 }
301 pList = kmalloc(sizeof(SBSSIDList) + (sList.uItem * sizeof(SBSSIDItem)), GFP_ATOMIC);
302 if (pList == NULL) {
303 result = -ENOMEM;
304 break;
305 }
306 pList->uItem = sList.uItem;
307 pBSS = &(pMgmt->sBSSList[0]);
308 for (ii = 0, jj = 0; jj < MAX_BSS_NUM ; jj++) {
309 pBSS = &(pMgmt->sBSSList[jj]);
310 if (pBSS->bActive) {
311 pList->sBSSIDList[ii].uChannel = pBSS->uChannel;
312 pList->sBSSIDList[ii].wBeaconInterval = pBSS->wBeaconInterval;
313 pList->sBSSIDList[ii].wCapInfo = pBSS->wCapInfo;
314 RFvRSSITodBm(pDevice, (BYTE)(pBSS->uRSSI), &ldBm);
315 pList->sBSSIDList[ii].uRSSI = (unsigned int)ldBm;
316 /* pList->sBSSIDList[ii].uRSSI = pBSS->uRSSI; */
317 memcpy(pList->sBSSIDList[ii].abyBSSID, pBSS->abyBSSID, WLAN_BSSID_LEN);
318 pItemSSID = (PWLAN_IE_SSID)pBSS->abySSID;
319 memset(pList->sBSSIDList[ii].abySSID, 0, WLAN_SSID_MAXLEN + 1);
320 memcpy(pList->sBSSIDList[ii].abySSID, pItemSSID->abySSID, pItemSSID->len);
321 if (WLAN_GET_CAP_INFO_ESS(pBSS->wCapInfo)) {
322 pList->sBSSIDList[ii].byNetType = INFRA;
323 } else {
324 pList->sBSSIDList[ii].byNetType = ADHOC;
325 }
326 if (WLAN_GET_CAP_INFO_PRIVACY(pBSS->wCapInfo)) {
327 pList->sBSSIDList[ii].bWEPOn = TRUE;
328 } else {
329 pList->sBSSIDList[ii].bWEPOn = FALSE;
330 }
331 ii++;
332 if (ii >= pList->uItem)
333 break;
334 }
335 }
336
337 if (copy_to_user(pReq->data, pList, sizeof(SBSSIDList) + (sList.uItem * sizeof(SBSSIDItem)))) {
338 result = -EFAULT;
339 break;
340 }
341 kfree(pList);
342 pReq->wResult = 0;
343 break;
344
345 case WLAN_CMD_GET_MIB:
346 if (copy_to_user(pReq->data, &(pDevice->s802_11Counter), sizeof(SDot11MIBCount))) {
347 result = -EFAULT;
348 break;
349 }
350 break;
351
352 case WLAN_CMD_GET_STAT:
353 if (copy_to_user(pReq->data, &(pDevice->scStatistic), sizeof(SStatCounter))) {
354 result = -EFAULT;
355 break;
356 }
357 break;
358
359 case WLAN_CMD_STOP_MAC:
360 DBG_PRT(MSG_LEVEL_DEBUG, KERN_INFO "WLAN_CMD_STOP_MAC\n");
361 /* Todo xxxxxx */
362 netif_stop_queue(pDevice->dev);
363 spin_lock_irq(&pDevice->lock);
364 if (pDevice->bRadioOff == FALSE) {
365 CARDbRadioPowerOff(pDevice);
366 }
367 pDevice->bLinkPass = FALSE;
368 ControlvMaskByte(pDevice, MESSAGE_REQUEST_MACREG, MAC_REG_PAPEDELAY, LEDSTS_STS, LEDSTS_SLOW);
369 memset(pMgmt->abyCurrBSSID, 0, 6);
370 pMgmt->eCurrState = WMAC_STATE_IDLE;
371 /* del_timer(&pDevice->sTimerCommand); */
372 /* del_timer(&pMgmt->sTimerSecondCallback); */
373 pDevice->bCmdRunning = FALSE;
374 spin_unlock_irq(&pDevice->lock);
375 break;
376
377 case WLAN_CMD_START_MAC:
378 DBG_PRT(MSG_LEVEL_DEBUG, KERN_INFO "WLAN_CMD_START_MAC\n");
379 /* Todo xxxxxxx */
380 if (pDevice->bRadioOff == TRUE)
381 CARDbRadioPowerOn(pDevice);
382 break;
383
384 case WLAN_CMD_SET_HOSTAPD:
385 DBG_PRT(MSG_LEVEL_DEBUG, KERN_INFO "WLAN_CMD_SET_HOSTAPD\n");
386
387 if (copy_from_user(&sValue, pReq->data, sizeof(SCmdValue))) {
388 result = -EFAULT;
389 break;
390 }
391 if (sValue.dwValue == 1) {
392 if (vt6656_hostap_set_hostapd(pDevice, 1, 1) == 0) {
393 DBG_PRT(MSG_LEVEL_DEBUG, KERN_INFO "Enable HOSTAP\n");
394 } else {
395 result = -EFAULT;
396 break;
397 }
398 } else {
399 vt6656_hostap_set_hostapd(pDevice, 0, 1);
400 DBG_PRT(MSG_LEVEL_DEBUG, KERN_INFO "Disable HOSTAP\n");
401 }
402 break;
403
404 case WLAN_CMD_SET_HOSTAPD_STA:
405 DBG_PRT(MSG_LEVEL_DEBUG, KERN_INFO "WLAN_CMD_SET_HOSTAPD_STA\n");
406 break;
407
408 case WLAN_CMD_SET_802_1X:
409 DBG_PRT(MSG_LEVEL_DEBUG, KERN_INFO "WLAN_CMD_SET_802_1X\n");
410 if (copy_from_user(&sValue, pReq->data, sizeof(SCmdValue))) {
411 result = -EFAULT;
412 break;
413 }
414
415 if (sValue.dwValue == 1) {
416 pDevice->bEnable8021x = TRUE;
417 DBG_PRT(MSG_LEVEL_DEBUG, KERN_INFO "Enable 802.1x\n");
418 } else {
419 pDevice->bEnable8021x = FALSE;
420 DBG_PRT(MSG_LEVEL_DEBUG, KERN_INFO "Disable 802.1x\n");
421 }
422 break;
423
424 case WLAN_CMD_SET_HOST_WEP:
425 DBG_PRT(MSG_LEVEL_DEBUG, KERN_INFO "WLAN_CMD_SET_HOST_WEP\n");
426 if (copy_from_user(&sValue, pReq->data, sizeof(SCmdValue))) {
427 result = -EFAULT;
428 break;
429 }
430
431 if (sValue.dwValue == 1) {
432 pDevice->bEnableHostWEP = TRUE;
433 DBG_PRT(MSG_LEVEL_DEBUG, KERN_INFO "Enable HostWEP\n");
434 } else {
435 pDevice->bEnableHostWEP = FALSE;
436 DBG_PRT(MSG_LEVEL_DEBUG, KERN_INFO "Disable HostWEP\n");
437 }
438 break;
439
440 case WLAN_CMD_SET_WPA:
441 DBG_PRT(MSG_LEVEL_DEBUG, KERN_INFO "WLAN_CMD_SET_WPA\n");
442
443 if (copy_from_user(&sValue, pReq->data, sizeof(SCmdValue))) {
444 result = -EFAULT;
445 break;
446 }
447 if (sValue.dwValue == 1) {
448 DBG_PRT(MSG_LEVEL_DEBUG, KERN_INFO "up wpadev\n");
449 memcpy(pDevice->wpadev->dev_addr, pDevice->dev->dev_addr,
450 ETH_ALEN);
451 pDevice->bWPADEVUp = TRUE;
452 } else {
453 DBG_PRT(MSG_LEVEL_DEBUG, KERN_INFO "close wpadev\n");
454 pDevice->bWPADEVUp = FALSE;
455 }
456 break;
457
458 case WLAN_CMD_AP_START:
459 DBG_PRT(MSG_LEVEL_DEBUG, KERN_INFO "WLAN_CMD_AP_START\n");
460 if (pDevice->bRadioOff == TRUE) {
461 CARDbRadioPowerOn(pDevice);
462 add_timer(&pMgmt->sTimerSecondCallback);
463 }
464 if (copy_from_user(&sStartAPCmd, pReq->data, sizeof(SCmdStartAP))) {
465 result = -EFAULT;
466 break;
467 }
468
469 if (sStartAPCmd.wBSSType == AP) {
470 pMgmt->eConfigMode = WMAC_CONFIG_AP;
471 DBG_PRT(MSG_LEVEL_DEBUG, KERN_INFO "ioct set to AP mode\n");
472 } else {
473 DBG_PRT(MSG_LEVEL_DEBUG, KERN_INFO "ioct BSS type not set to AP mode\n");
474 result = -EFAULT;
475 break;
476 }
477
478 if (sStartAPCmd.wBBPType == PHY80211g) {
479 pMgmt->byAPBBType = PHY_TYPE_11G;
480 } else if (sStartAPCmd.wBBPType == PHY80211a) {
481 pMgmt->byAPBBType = PHY_TYPE_11A;
482 } else {
483 pMgmt->byAPBBType = PHY_TYPE_11B;
484 }
485
486 pItemSSID = (PWLAN_IE_SSID)sStartAPCmd.ssid;
487 if (pItemSSID->len > WLAN_SSID_MAXLEN + 1)
488 return -EINVAL;
489 memset(pMgmt->abyDesireSSID, 0, WLAN_IEHDR_LEN + WLAN_SSID_MAXLEN + 1);
490 memcpy(pMgmt->abyDesireSSID, pItemSSID, pItemSSID->len + WLAN_IEHDR_LEN);
491
492 if ((sStartAPCmd.uChannel > 0) && (sStartAPCmd.uChannel <= 14))
493 pDevice->uChannel = sStartAPCmd.uChannel;
494
495 if ((sStartAPCmd.uBeaconInt >= 20) && (sStartAPCmd.uBeaconInt <= 1000))
496 pMgmt->wIBSSBeaconPeriod = sStartAPCmd.uBeaconInt;
497 else
498 pMgmt->wIBSSBeaconPeriod = 100;
499
500 if (sStartAPCmd.bShareKeyAuth == TRUE) {
501 pMgmt->bShareKeyAlgorithm = TRUE;
502 DBG_PRT(MSG_LEVEL_DEBUG, KERN_INFO "Share Key\n");
503 } else {
504 pMgmt->bShareKeyAlgorithm = FALSE;
505 DBG_PRT(MSG_LEVEL_DEBUG, KERN_INFO "Open System\n");
506 }
507 memcpy(pMgmt->abyIBSSSuppRates, abySuppRates, 6);
508
509 if (sStartAPCmd.byBasicRate & BIT3) {
510 pMgmt->abyIBSSSuppRates[2] |= BIT7;
511 pMgmt->abyIBSSSuppRates[3] |= BIT7;
512 pMgmt->abyIBSSSuppRates[4] |= BIT7;
513 pMgmt->abyIBSSSuppRates[5] |= BIT7;
514 } else if (sStartAPCmd.byBasicRate & BIT2) {
515 pMgmt->abyIBSSSuppRates[2] |= BIT7;
516 pMgmt->abyIBSSSuppRates[3] |= BIT7;
517 pMgmt->abyIBSSSuppRates[4] |= BIT7;
518 } else if (sStartAPCmd.byBasicRate & BIT1) {
519 pMgmt->abyIBSSSuppRates[2] |= BIT7;
520 pMgmt->abyIBSSSuppRates[3] |= BIT7;
521 } else if (sStartAPCmd.byBasicRate & BIT1) {
522 pMgmt->abyIBSSSuppRates[2] |= BIT7;
523 } else {
524 /* default 1,2M */
525 pMgmt->abyIBSSSuppRates[2] |= BIT7;
526 pMgmt->abyIBSSSuppRates[3] |= BIT7;
527 }
528
529 DBG_PRT(MSG_LEVEL_DEBUG, KERN_INFO "Support Rate= %*ph\n",
530 4, pMgmt->abyIBSSSuppRates + 2);
531
532 netif_stop_queue(pDevice->dev);
533 spin_lock_irq(&pDevice->lock);
534 bScheduleCommand(pDevice, WLAN_CMD_RUN_AP, NULL);
535 spin_unlock_irq(&pDevice->lock);
536 break;
537
538 case WLAN_CMD_GET_NODE_CNT:
539 cbListCount = 0;
540 pNode = &(pMgmt->sNodeDBTable[0]);
541 for (ii = 0; ii < (MAX_NODE_NUM + 1); ii++) {
542 pNode = &(pMgmt->sNodeDBTable[ii]);
543 if (!pNode->bActive)
544 continue;
545 cbListCount++;
546 }
547
548 sNodeList.uItem = cbListCount;
549 if (copy_to_user(pReq->data, &sNodeList, sizeof(SNodeList))) {
550 result = -EFAULT;
551 break;
552 }
553 pReq->wResult = 0;
554 break;
555
556 case WLAN_CMD_GET_NODE_LIST:
557 if (copy_from_user(&sNodeList, pReq->data, sizeof(SNodeList))) {
558 result = -EFAULT;
559 break;
560 }
561 if (sNodeList.uItem > (ULONG_MAX - sizeof(SNodeList)) / sizeof(SNodeItem)) {
562 result = -ENOMEM;
563 break;
564 }
565 pNodeList = kmalloc(sizeof(SNodeList) + (sNodeList.uItem * sizeof(SNodeItem)), GFP_ATOMIC);
566 if (pNodeList == NULL) {
567 result = -ENOMEM;
568 break;
569 }
570 pNodeList->uItem = sNodeList.uItem;
571 pNode = &(pMgmt->sNodeDBTable[0]);
572 for (ii = 0, jj = 0; ii < (MAX_NODE_NUM + 1); ii++) {
573 pNode = &(pMgmt->sNodeDBTable[ii]);
574 if (pNode->bActive) {
575 pNodeList->sNodeList[jj].wAID = pNode->wAID;
576 memcpy(pNodeList->sNodeList[jj].abyMACAddr, pNode->abyMACAddr, WLAN_ADDR_LEN);
577 pNodeList->sNodeList[jj].wTxDataRate = pNode->wTxDataRate;
578 pNodeList->sNodeList[jj].wInActiveCount = (WORD)pNode->uInActiveCount;
579 pNodeList->sNodeList[jj].wEnQueueCnt = (WORD)pNode->wEnQueueCnt;
580 pNodeList->sNodeList[jj].wFlags = (WORD)pNode->dwFlags;
581 pNodeList->sNodeList[jj].bPWBitOn = pNode->bPSEnable;
582 pNodeList->sNodeList[jj].byKeyIndex = pNode->byKeyIndex;
583 pNodeList->sNodeList[jj].wWepKeyLength = pNode->uWepKeyLength;
584 memcpy(&(pNodeList->sNodeList[jj].abyWepKey[0]), &(pNode->abyWepKey[0]), WEP_KEYMAXLEN);
585 DBG_PRT(MSG_LEVEL_DEBUG, KERN_INFO "key= %2.2X:%2.2X:%2.2X:%2.2X:%2.2X\n",
586 pNodeList->sNodeList[jj].abyWepKey[0],
587 pNodeList->sNodeList[jj].abyWepKey[1],
588 pNodeList->sNodeList[jj].abyWepKey[2],
589 pNodeList->sNodeList[jj].abyWepKey[3],
590 pNodeList->sNodeList[jj].abyWepKey[4]);
591 pNodeList->sNodeList[jj].bIsInFallback = pNode->bIsInFallback;
592 pNodeList->sNodeList[jj].uTxFailures = pNode->uTxFailures;
593 pNodeList->sNodeList[jj].uTxAttempts = pNode->uTxAttempts;
594 pNodeList->sNodeList[jj].wFailureRatio = (WORD)pNode->uFailureRatio;
595 jj++;
596 if (jj >= pNodeList->uItem)
597 break;
598 }
599 }
600 if (copy_to_user(pReq->data, pNodeList, sizeof(SNodeList) + (sNodeList.uItem * sizeof(SNodeItem)))) {
601 kfree(pNodeList);
602 result = -EFAULT;
603 break;
604 }
605 kfree(pNodeList);
606 pReq->wResult = 0;
607 break;
608
609 case 0xFF:
610 memset(wpa_Result.ifname, 0, sizeof(wpa_Result.ifname));
611 wpa_Result.proto = 0;
612 wpa_Result.key_mgmt = 0;
613 wpa_Result.eap_type = 0;
614 wpa_Result.authenticated = FALSE;
615 pDevice->fWPA_Authened = FALSE;
616 if (copy_from_user(&wpa_Result, pReq->data, sizeof(wpa_Result))) {
617 result = -EFAULT;
618 break;
619 }
620 /* for some AP's maybe a good authentication */
621 if (wpa_Result.key_mgmt == 0x20)
622 pMgmt->Cisco_cckm = 1;
623 else
624 pMgmt->Cisco_cckm = 0;
625
626 if (wpa_Result.authenticated == TRUE) {
627 {
628 union iwreq_data wrqu;
629
630 pItemSSID = (PWLAN_IE_SSID)pMgmt->abyCurrSSID;
631 memset(&wrqu, 0, sizeof(wrqu));
632 wrqu.data.flags = RT_WPACONNECTED_EVENT_FLAG;
633 wrqu.data.length = pItemSSID->len;
634 wireless_send_event(pDevice->dev, IWEVCUSTOM, &wrqu, pItemSSID->abySSID);
635 }
636
637 pDevice->fWPA_Authened = TRUE; /* is successful peer to wpa_Result.authenticated? */
638 }
639
640 pReq->wResult = 0;
641 break;
642
643 default:
644 DBG_PRT(MSG_LEVEL_DEBUG, KERN_INFO "Private command not supported..\n");
645 }
646
647 return result;
648}
diff --git a/drivers/staging/vt6656/ioctl.h b/drivers/staging/vt6656/ioctl.h
deleted file mode 100644
index caa4ac963d93..000000000000
--- a/drivers/staging/vt6656/ioctl.h
+++ /dev/null
@@ -1,54 +0,0 @@
1/*
2 * Copyright (c) 1996, 2003 VIA Networking Technologies, Inc.
3 * All rights reserved.
4 *
5 * This program is free software; you can redistribute it and/or modify
6 * it under the terms of the GNU General Public License as published by
7 * the Free Software Foundation; either version 2 of the License, or
8 * (at your option) any later version.
9 *
10 * This program is distributed in the hope that it will be useful,
11 * but WITHOUT ANY WARRANTY; without even the implied warranty of
12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 * GNU General Public License for more details.
14 *
15 * You should have received a copy of the GNU General Public License along
16 * with this program; if not, write to the Free Software Foundation, Inc.,
17 * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
18 *
19 * File: hostap.h
20 *
21 * Purpose:
22 *
23 * Author: Lyndon Chen
24 *
25 * Date: May 21, 2003
26 *
27 */
28
29#ifndef __IOCTL_H__
30#define __IOCTL_H__
31
32#include "device.h"
33
34/*--------------------- Export Definitions -------------------------*/
35
36
37/*--------------------- Export Classes ----------------------------*/
38
39/*--------------------- Export Variables --------------------------*/
40
41/*--------------------- Export Functions --------------------------*/
42
43int private_ioctl(PSDevice pDevice, struct ifreq *rq);
44
45/*
46void vConfigWEPKey (
47 PSDevice pDevice,
48 DWORD dwKeyIndex,
49 PBYTE pbyKey,
50 unsigned long uKeyLength
51 );
52*/
53
54#endif /* __IOCTL_H__ */
diff --git a/drivers/staging/vt6656/iwctl.c b/drivers/staging/vt6656/iwctl.c
index 8f198749ca51..52fce6902508 100644
--- a/drivers/staging/vt6656/iwctl.c
+++ b/drivers/staging/vt6656/iwctl.c
@@ -31,26 +31,17 @@
31 */ 31 */
32 32
33#include "device.h" 33#include "device.h"
34#include "ioctl.h" 34#include "iwctl.h"
35#include "iocmd.h"
36#include "mac.h" 35#include "mac.h"
37#include "card.h" 36#include "card.h"
38#include "hostap.h" 37#include "hostap.h"
39#include "power.h" 38#include "power.h"
40#include "rf.h" 39#include "rf.h"
41
42#ifdef WPA_SUPPLICANT_DRIVER_WEXT_SUPPORT
43#include "iowpa.h" 40#include "iowpa.h"
44#include "wpactl.h" 41#include "wpactl.h"
45#endif 42#include "control.h"
46 43#include "rndis.h"
47#include <net/iw_handler.h>
48 44
49#ifdef WPA_SUPPLICANT_DRIVER_WEXT_SUPPORT
50#define SUPPORTED_WIRELESS_EXT 18
51#else
52#define SUPPORTED_WIRELESS_EXT 17
53#endif
54 45
55static const long frequency_list[] = { 46static const long frequency_list[] = {
56 2412, 2417, 2422, 2427, 2432, 2437, 2442, 2447, 2452, 2457, 2462, 2467, 2472, 2484, 47 2412, 2417, 2422, 2427, 2432, 2437, 2442, 2447, 2452, 2457, 2462, 2467, 2472, 2484,
@@ -88,9 +79,9 @@ struct iw_statistics *iwctl_get_wireless_stats(struct net_device *dev)
88 * Wireless Handler: get protocol name 79 * Wireless Handler: get protocol name
89 */ 80 */
90int iwctl_giwname(struct net_device *dev, struct iw_request_info *info, 81int iwctl_giwname(struct net_device *dev, struct iw_request_info *info,
91 char *wrq, char *extra) 82 union iwreq_data *wrqu, char *extra)
92{ 83{
93 strcpy(wrq, "802.11-a/b/g"); 84 strcpy(wrqu->name, "802.11-a/b/g");
94 return 0; 85 return 0;
95} 86}
96 87
@@ -98,9 +89,10 @@ int iwctl_giwname(struct net_device *dev, struct iw_request_info *info,
98 * Wireless Handler: set scan 89 * Wireless Handler: set scan
99 */ 90 */
100int iwctl_siwscan(struct net_device *dev, struct iw_request_info *info, 91int iwctl_siwscan(struct net_device *dev, struct iw_request_info *info,
101 struct iw_point *wrq, char *extra) 92 union iwreq_data *wrqu, char *extra)
102{ 93{
103 PSDevice pDevice = netdev_priv(dev); 94 PSDevice pDevice = netdev_priv(dev);
95 struct iw_point *wrq = &wrqu->data;
104 PSMgmtObject pMgmt = &(pDevice->sMgmtObj); 96 PSMgmtObject pMgmt = &(pDevice->sMgmtObj);
105 struct iw_scan_req *req = (struct iw_scan_req *)extra; 97 struct iw_scan_req *req = (struct iw_scan_req *)extra;
106 BYTE abyScanSSID[WLAN_IEHDR_LEN + WLAN_SSID_MAXLEN + 1]; 98 BYTE abyScanSSID[WLAN_IEHDR_LEN + WLAN_SSID_MAXLEN + 1];
@@ -109,7 +101,10 @@ int iwctl_siwscan(struct net_device *dev, struct iw_request_info *info,
109 if (!(pDevice->flags & DEVICE_FLAGS_OPENED)) 101 if (!(pDevice->flags & DEVICE_FLAGS_OPENED))
110 return -EINVAL; 102 return -EINVAL;
111 103
112 PRINT_K(" SIOCSIWSCAN \n"); 104 PRINT_K(" SIOCSIWSCAN\n");
105
106 if (pMgmt == NULL)
107 return -EFAULT;
113 108
114 if (pMgmt->eScanState == WMAC_IS_SCANNING) { 109 if (pMgmt->eScanState == WMAC_IS_SCANNING) {
115 // In scanning.. 110 // In scanning..
@@ -137,9 +132,9 @@ int iwctl_siwscan(struct net_device *dev, struct iw_request_info *info,
137 pItemSSID = (PWLAN_IE_SSID)abyScanSSID; 132 pItemSSID = (PWLAN_IE_SSID)abyScanSSID;
138 pItemSSID->byElementID = WLAN_EID_SSID; 133 pItemSSID->byElementID = WLAN_EID_SSID;
139 memcpy(pItemSSID->abySSID, req->essid, (int)req->essid_len); 134 memcpy(pItemSSID->abySSID, req->essid, (int)req->essid_len);
140 if (pItemSSID->abySSID[req->essid_len - 1] == '\0') { 135 if (pItemSSID->abySSID[req->essid_len] == '\0') {
141 if (req->essid_len > 0) 136 if (req->essid_len > 0)
142 pItemSSID->len = req->essid_len - 1; 137 pItemSSID->len = req->essid_len;
143 } else { 138 } else {
144 pItemSSID->len = req->essid_len; 139 pItemSSID->len = req->essid_len;
145 } 140 }
@@ -168,8 +163,9 @@ int iwctl_siwscan(struct net_device *dev, struct iw_request_info *info,
168 * Wireless Handler : get scan results 163 * Wireless Handler : get scan results
169 */ 164 */
170int iwctl_giwscan(struct net_device *dev, struct iw_request_info *info, 165int iwctl_giwscan(struct net_device *dev, struct iw_request_info *info,
171 struct iw_point *wrq, char *extra) 166 union iwreq_data *wrqu, char *extra)
172{ 167{
168 struct iw_point *wrq = &wrqu->data;
173 int ii; 169 int ii;
174 int jj; 170 int jj;
175 int kk; 171 int kk;
@@ -184,10 +180,12 @@ int iwctl_giwscan(struct net_device *dev, struct iw_request_info *info,
184 char *current_val = NULL; 180 char *current_val = NULL;
185 struct iw_event iwe; 181 struct iw_event iwe;
186 long ldBm; 182 long ldBm;
187 char buf[MAX_WPA_IE_LEN * 2 + 30];
188 183
189 DBG_PRT(MSG_LEVEL_DEBUG, KERN_INFO " SIOCGIWSCAN\n"); 184 DBG_PRT(MSG_LEVEL_DEBUG, KERN_INFO " SIOCGIWSCAN\n");
190 185
186 if (pMgmt == NULL)
187 return -EFAULT;
188
191 if (pMgmt->eScanState == WMAC_IS_SCANNING) { 189 if (pMgmt->eScanState == WMAC_IS_SCANNING) {
192 // In scanning.. 190 // In scanning..
193 return -EAGAIN; 191 return -EAGAIN;
@@ -286,12 +284,6 @@ int iwctl_giwscan(struct net_device *dev, struct iw_request_info *info,
286 if ((current_val - current_ev) > IW_EV_LCP_LEN) 284 if ((current_val - current_ev) > IW_EV_LCP_LEN)
287 current_ev = current_val; 285 current_ev = current_val;
288 286
289 memset(&iwe, 0, sizeof(iwe));
290 iwe.cmd = IWEVCUSTOM;
291 sprintf(buf, "bcn_int=%d", pBSS->wBeaconInterval);
292 iwe.u.data.length = strlen(buf);
293 current_ev = iwe_stream_add_point(info, current_ev, end_buf, &iwe, buf);
294
295 if ((pBSS->wWPALen > 0) && (pBSS->wWPALen <= MAX_WPA_IE_LEN)) { 287 if ((pBSS->wWPALen > 0) && (pBSS->wWPALen <= MAX_WPA_IE_LEN)) {
296 memset(&iwe, 0, sizeof(iwe)); 288 memset(&iwe, 0, sizeof(iwe));
297 iwe.cmd = IWEVGENIE; 289 iwe.cmd = IWEVGENIE;
@@ -315,12 +307,13 @@ int iwctl_giwscan(struct net_device *dev, struct iw_request_info *info,
315 * Wireless Handler: set frequence or channel 307 * Wireless Handler: set frequence or channel
316 */ 308 */
317int iwctl_siwfreq(struct net_device *dev, struct iw_request_info *info, 309int iwctl_siwfreq(struct net_device *dev, struct iw_request_info *info,
318 struct iw_freq *wrq, char *extra) 310 union iwreq_data *wrqu, char *extra)
319{ 311{
320 PSDevice pDevice = netdev_priv(dev); 312 PSDevice pDevice = netdev_priv(dev);
313 struct iw_freq *wrq = &wrqu->freq;
321 int rc = 0; 314 int rc = 0;
322 315
323 DBG_PRT(MSG_LEVEL_DEBUG, KERN_INFO " SIOCSIWFREQ \n"); 316 DBG_PRT(MSG_LEVEL_DEBUG, KERN_INFO " SIOCSIWFREQ\n");
324 317
325 // If setting by frequency, convert to a channel 318 // If setting by frequency, convert to a channel
326 if ((wrq->e == 1) && (wrq->m >= (int)2.412e8) && 319 if ((wrq->e == 1) && (wrq->m >= (int)2.412e8) &&
@@ -353,12 +346,17 @@ int iwctl_siwfreq(struct net_device *dev, struct iw_request_info *info,
353 * Wireless Handler: get frequence or channel 346 * Wireless Handler: get frequence or channel
354 */ 347 */
355int iwctl_giwfreq(struct net_device *dev, struct iw_request_info *info, 348int iwctl_giwfreq(struct net_device *dev, struct iw_request_info *info,
356 struct iw_freq *wrq, char *extra) 349 union iwreq_data *wrqu, char *extra)
357{ 350{
358 PSDevice pDevice = netdev_priv(dev); 351 PSDevice pDevice = netdev_priv(dev);
352 struct iw_freq *wrq = &wrqu->freq;
359 PSMgmtObject pMgmt = &(pDevice->sMgmtObj); 353 PSMgmtObject pMgmt = &(pDevice->sMgmtObj);
360 354
361 DBG_PRT(MSG_LEVEL_DEBUG, KERN_INFO " SIOCGIWFREQ \n"); 355 DBG_PRT(MSG_LEVEL_DEBUG, KERN_INFO " SIOCGIWFREQ\n");
356
357 if (pMgmt == NULL)
358 return -EFAULT;
359
362 360
363#ifdef WEXT_USECHANNELS 361#ifdef WEXT_USECHANNELS
364 wrq->m = (int)pMgmt->uCurrChannel; 362 wrq->m = (int)pMgmt->uCurrChannel;
@@ -379,16 +377,21 @@ int iwctl_giwfreq(struct net_device *dev, struct iw_request_info *info,
379 * Wireless Handler: set operation mode 377 * Wireless Handler: set operation mode
380 */ 378 */
381int iwctl_siwmode(struct net_device *dev, struct iw_request_info *info, 379int iwctl_siwmode(struct net_device *dev, struct iw_request_info *info,
382 __u32 *wmode, char *extra) 380 union iwreq_data *wrqu, char *extra)
383{ 381{
384 PSDevice pDevice = netdev_priv(dev); 382 PSDevice pDevice = netdev_priv(dev);
383 __u32 *wmode = &wrqu->mode;
385 PSMgmtObject pMgmt = &(pDevice->sMgmtObj); 384 PSMgmtObject pMgmt = &(pDevice->sMgmtObj);
386 int rc = 0; 385 int rc = 0;
387 386
388 DBG_PRT(MSG_LEVEL_DEBUG, KERN_INFO " SIOCSIWMODE \n"); 387 DBG_PRT(MSG_LEVEL_DEBUG, KERN_INFO " SIOCSIWMODE\n");
388
389 if (pMgmt == NULL)
390 return -EFAULT;
389 391
390 if (pMgmt->eCurrMode == WMAC_MODE_ESS_AP && pDevice->bEnableHostapd) { 392 if (pMgmt->eCurrMode == WMAC_MODE_ESS_AP && pDevice->bEnableHostapd) {
391 DBG_PRT(MSG_LEVEL_DEBUG, KERN_INFO"Can't set operation mode, hostapd is running \n"); 393 DBG_PRT(MSG_LEVEL_DEBUG, KERN_INFO
394 "Can't set operation mode, hostapd is running\n");
392 return rc; 395 return rc;
393 } 396 }
394 397
@@ -432,19 +435,72 @@ int iwctl_siwmode(struct net_device *dev, struct iw_request_info *info,
432 rc = -EINVAL; 435 rc = -EINVAL;
433 } 436 }
434 437
438 if (pDevice->bCommit) {
439 if (pMgmt->eConfigMode == WMAC_CONFIG_AP) {
440 netif_stop_queue(pDevice->dev);
441 spin_lock_irq(&pDevice->lock);
442 bScheduleCommand((void *) pDevice,
443 WLAN_CMD_RUN_AP, NULL);
444 spin_unlock_irq(&pDevice->lock);
445 } else {
446 DBG_PRT(MSG_LEVEL_DEBUG, KERN_INFO
447 "Commit the settings\n");
448
449 spin_lock_irq(&pDevice->lock);
450
451 if (pDevice->bLinkPass &&
452 memcmp(pMgmt->abyCurrSSID,
453 pMgmt->abyDesireSSID,
454 WLAN_IEHDR_LEN + WLAN_SSID_MAXLEN)) {
455 bScheduleCommand((void *) pDevice,
456 WLAN_CMD_DISASSOCIATE, NULL);
457 } else {
458 pDevice->bLinkPass = FALSE;
459 pMgmt->eCurrState = WMAC_STATE_IDLE;
460 memset(pMgmt->abyCurrBSSID, 0, 6);
461 }
462
463 ControlvMaskByte(pDevice,
464 MESSAGE_REQUEST_MACREG, MAC_REG_PAPEDELAY,
465 LEDSTS_STS, LEDSTS_SLOW);
466
467 netif_stop_queue(pDevice->dev);
468
469 pMgmt->eScanType = WMAC_SCAN_ACTIVE;
470
471 if (!pDevice->bWPASuppWextEnabled)
472 bScheduleCommand((void *) pDevice,
473 WLAN_CMD_BSSID_SCAN,
474 pMgmt->abyDesireSSID);
475
476 bScheduleCommand((void *) pDevice,
477 WLAN_CMD_SSID,
478 NULL);
479
480 spin_unlock_irq(&pDevice->lock);
481 }
482 pDevice->bCommit = FALSE;
483 }
484
485
435 return rc; 486 return rc;
436} 487}
437 488
438/* 489/*
439 * Wireless Handler: get operation mode 490 * Wireless Handler: get operation mode
440 */ 491 */
441void iwctl_giwmode(struct net_device *dev, struct iw_request_info *info, 492int iwctl_giwmode(struct net_device *dev, struct iw_request_info *info,
442 __u32 *wmode, char *extra) 493 union iwreq_data *wrqu, char *extra)
443{ 494{
444 PSDevice pDevice = netdev_priv(dev); 495 PSDevice pDevice = netdev_priv(dev);
496 __u32 *wmode = &wrqu->mode;
445 PSMgmtObject pMgmt = &(pDevice->sMgmtObj); 497 PSMgmtObject pMgmt = &(pDevice->sMgmtObj);
446 498
447 DBG_PRT(MSG_LEVEL_DEBUG, KERN_INFO " SIOCGIWMODE \n"); 499 DBG_PRT(MSG_LEVEL_DEBUG, KERN_INFO " SIOCGIWMODE\n");
500
501 if (pMgmt == NULL)
502 return -EFAULT;
503
448 // If not managed, assume it's ad-hoc 504 // If not managed, assume it's ad-hoc
449 switch (pMgmt->eConfigMode) { 505 switch (pMgmt->eConfigMode) {
450 case WMAC_CONFIG_ESS_STA: 506 case WMAC_CONFIG_ESS_STA:
@@ -462,14 +518,17 @@ void iwctl_giwmode(struct net_device *dev, struct iw_request_info *info,
462 default: 518 default:
463 *wmode = IW_MODE_ADHOC; 519 *wmode = IW_MODE_ADHOC;
464 } 520 }
521
522 return 0;
465} 523}
466 524
467/* 525/*
468 * Wireless Handler: get capability range 526 * Wireless Handler: get capability range
469 */ 527 */
470void iwctl_giwrange(struct net_device *dev, struct iw_request_info *info, 528int iwctl_giwrange(struct net_device *dev, struct iw_request_info *info,
471 struct iw_point *wrq, char *extra) 529 union iwreq_data *wrqu, char *extra)
472{ 530{
531 struct iw_point *wrq = &wrqu->data;
473 struct iw_range *range = (struct iw_range *)extra; 532 struct iw_range *range = (struct iw_range *)extra;
474 int i; 533 int i;
475 int k; 534 int k;
@@ -546,7 +605,7 @@ void iwctl_giwrange(struct net_device *dev, struct iw_request_info *info,
546 range->txpower[0] = 100; 605 range->txpower[0] = 100;
547 range->num_txpower = 1; 606 range->num_txpower = 1;
548 range->txpower_capa = IW_TXPOW_MWATT; 607 range->txpower_capa = IW_TXPOW_MWATT;
549 range->we_version_source = SUPPORTED_WIRELESS_EXT; 608 range->we_version_source = WIRELESS_EXT;
550 range->we_version_compiled = WIRELESS_EXT; 609 range->we_version_compiled = WIRELESS_EXT;
551 range->retry_capa = IW_RETRY_LIMIT | IW_RETRY_LIFETIME; 610 range->retry_capa = IW_RETRY_LIMIT | IW_RETRY_LIFETIME;
552 range->retry_flags = IW_RETRY_LIMIT; 611 range->retry_flags = IW_RETRY_LIMIT;
@@ -562,20 +621,26 @@ void iwctl_giwrange(struct net_device *dev, struct iw_request_info *info,
562 range->avg_qual.level = 176; // -80 dBm 621 range->avg_qual.level = 176; // -80 dBm
563 range->avg_qual.noise = 0; 622 range->avg_qual.noise = 0;
564 } 623 }
624
625 return 0;
565} 626}
566 627
567/* 628/*
568 * Wireless Handler : set ap mac address 629 * Wireless Handler : set ap mac address
569 */ 630 */
570int iwctl_siwap(struct net_device *dev, struct iw_request_info *info, 631int iwctl_siwap(struct net_device *dev, struct iw_request_info *info,
571 struct sockaddr *wrq, char *extra) 632 union iwreq_data *wrqu, char *extra)
572{ 633{
573 PSDevice pDevice = netdev_priv(dev); 634 PSDevice pDevice = netdev_priv(dev);
635 struct sockaddr *wrq = &wrqu->ap_addr;
574 PSMgmtObject pMgmt = &(pDevice->sMgmtObj); 636 PSMgmtObject pMgmt = &(pDevice->sMgmtObj);
575 int rc = 0; 637 int rc = 0;
576 BYTE ZeroBSSID[WLAN_BSSID_LEN] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00 }; 638 BYTE ZeroBSSID[WLAN_BSSID_LEN] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00 };
577 639
578 PRINT_K(" SIOCSIWAP \n"); 640 PRINT_K(" SIOCSIWAP\n");
641
642 if (pMgmt == NULL)
643 return -EFAULT;
579 644
580 if (wrq->sa_family != ARPHRD_ETHER) { 645 if (wrq->sa_family != ARPHRD_ETHER) {
581 rc = -EINVAL; 646 rc = -EINVAL;
@@ -616,12 +681,16 @@ int iwctl_siwap(struct net_device *dev, struct iw_request_info *info,
616 * Wireless Handler: get ap mac address 681 * Wireless Handler: get ap mac address
617 */ 682 */
618int iwctl_giwap(struct net_device *dev, struct iw_request_info *info, 683int iwctl_giwap(struct net_device *dev, struct iw_request_info *info,
619 struct sockaddr *wrq, char *extra) 684 union iwreq_data *wrqu, char *extra)
620{ 685{
621 PSDevice pDevice = netdev_priv(dev); 686 PSDevice pDevice = netdev_priv(dev);
687 struct sockaddr *wrq = &wrqu->ap_addr;
622 PSMgmtObject pMgmt = &(pDevice->sMgmtObj); 688 PSMgmtObject pMgmt = &(pDevice->sMgmtObj);
623 689
624 DBG_PRT(MSG_LEVEL_DEBUG, KERN_INFO " SIOCGIWAP \n"); 690 DBG_PRT(MSG_LEVEL_DEBUG, KERN_INFO " SIOCGIWAP\n");
691
692 if (pMgmt == NULL)
693 return -EFAULT;
625 694
626 memcpy(wrq->sa_data, pMgmt->abyCurrBSSID, 6); 695 memcpy(wrq->sa_data, pMgmt->abyCurrBSSID, 6);
627 696
@@ -639,59 +708,77 @@ int iwctl_giwap(struct net_device *dev, struct iw_request_info *info,
639 * Wireless Handler: get ap list 708 * Wireless Handler: get ap list
640 */ 709 */
641int iwctl_giwaplist(struct net_device *dev, struct iw_request_info *info, 710int iwctl_giwaplist(struct net_device *dev, struct iw_request_info *info,
642 struct iw_point *wrq, char *extra) 711 union iwreq_data *wrqu, char *extra)
643{ 712{
713 struct iw_point *wrq = &wrqu->data;
714 struct sockaddr *sock;
715 struct iw_quality *qual;
716 PSDevice pDevice = netdev_priv(dev);
717 PSMgmtObject pMgmt = &pDevice->sMgmtObj;
718 PKnownBSS pBSS = &pMgmt->sBSSList[0];
644 int ii; 719 int ii;
645 int jj; 720 int jj;
646 int rc = 0;
647 struct sockaddr sock[IW_MAX_AP];
648 struct iw_quality qual[IW_MAX_AP];
649 PSDevice pDevice = netdev_priv(dev);
650 PSMgmtObject pMgmt = &(pDevice->sMgmtObj);
651 721
652 DBG_PRT(MSG_LEVEL_DEBUG, KERN_INFO " SIOCGIWAPLIST \n"); 722 DBG_PRT(MSG_LEVEL_DEBUG, KERN_INFO " SIOCGIWAPLIST\n");
653 // Only super-user can see AP list 723 /* Only super-user can see AP list */
654 724
655 if (!capable(CAP_NET_ADMIN)) { 725 if (pBSS == NULL)
656 rc = -EPERM; 726 return -ENODEV;
657 return rc;
658 }
659 727
660 if (wrq->pointer) { 728 if (!capable(CAP_NET_ADMIN))
661 PKnownBSS pBSS = &(pMgmt->sBSSList[0]); 729 return -EPERM;
662 730
663 for (ii = 0, jj= 0; ii < MAX_BSS_NUM; ii++) { 731 if (!wrq->pointer)
664 pBSS = &(pMgmt->sBSSList[ii]); 732 return -EINVAL;
665 if (!pBSS->bActive)
666 continue;
667 if (jj >= IW_MAX_AP)
668 break;
669 memcpy(sock[jj].sa_data, pBSS->abyBSSID, 6);
670 sock[jj].sa_family = ARPHRD_ETHER;
671 qual[jj].level = pBSS->uRSSI;
672 qual[jj].qual = qual[jj].noise = 0;
673 qual[jj].updated = 2;
674 jj++;
675 }
676 733
677 wrq->flags = 1; // Should be defined 734 sock = kzalloc(sizeof(struct sockaddr) * IW_MAX_AP, GFP_KERNEL);
678 wrq->length = jj; 735 if (sock == NULL)
679 memcpy(extra, sock, sizeof(struct sockaddr) * jj); 736 return -ENOMEM;
680 memcpy(extra + sizeof(struct sockaddr) * jj, qual, sizeof(struct iw_quality) * jj); 737 qual = kzalloc(sizeof(struct iw_quality) * IW_MAX_AP, GFP_KERNEL);
738 if (qual == NULL) {
739 kfree(sock);
740 return -ENOMEM;
681 } 741 }
682 return rc; 742
743 for (ii = 0, jj = 0; ii < MAX_BSS_NUM; ii++) {
744 if (!pBSS[ii].bActive)
745 continue;
746 if (jj >= IW_MAX_AP)
747 break;
748 memcpy(sock[jj].sa_data, pBSS[ii].abyBSSID, 6);
749 sock[jj].sa_family = ARPHRD_ETHER;
750 qual[jj].level = pBSS[ii].uRSSI;
751 qual[jj].qual = qual[jj].noise = 0;
752 qual[jj].updated = 2;
753 jj++;
754 }
755
756 wrq->flags = 1; /* Should be defined */
757 wrq->length = jj;
758 memcpy(extra, sock, sizeof(struct sockaddr) * jj);
759 memcpy(extra + sizeof(struct sockaddr) * jj, qual,
760 sizeof(struct iw_quality) * jj);
761
762 kfree(sock);
763 kfree(qual);
764
765 return 0;
683} 766}
684 767
685/* 768/*
686 * Wireless Handler: set essid 769 * Wireless Handler: set essid
687 */ 770 */
688int iwctl_siwessid(struct net_device *dev, struct iw_request_info *info, 771int iwctl_siwessid(struct net_device *dev, struct iw_request_info *info,
689 struct iw_point *wrq, char *extra) 772 union iwreq_data *wrqu, char *extra)
690{ 773{
691 PSDevice pDevice = netdev_priv(dev); 774 PSDevice pDevice = netdev_priv(dev);
775 struct iw_point *wrq = &wrqu->essid;
692 PSMgmtObject pMgmt = &(pDevice->sMgmtObj); 776 PSMgmtObject pMgmt = &(pDevice->sMgmtObj);
693 PWLAN_IE_SSID pItemSSID; 777 PWLAN_IE_SSID pItemSSID;
694 778
779 if (pMgmt == NULL)
780 return -EFAULT;
781
695 if (!(pDevice->flags & DEVICE_FLAGS_OPENED)) 782 if (!(pDevice->flags & DEVICE_FLAGS_OPENED))
696 return -EINVAL; 783 return -EINVAL;
697 784
@@ -704,10 +791,8 @@ int iwctl_siwessid(struct net_device *dev, struct iw_request_info *info,
704 memset(pMgmt->abyDesireSSID, 0, WLAN_IEHDR_LEN + WLAN_SSID_MAXLEN + 1); 791 memset(pMgmt->abyDesireSSID, 0, WLAN_IEHDR_LEN + WLAN_SSID_MAXLEN + 1);
705 memset(pMgmt->abyDesireBSSID, 0xFF,6); 792 memset(pMgmt->abyDesireBSSID, 0xFF,6);
706 PRINT_K("set essid to 'any' \n"); 793 PRINT_K("set essid to 'any' \n");
707#ifdef WPA_SUPPLICANT_DRIVER_WEXT_SUPPORT
708 // Unknown desired AP, so here need not associate?? 794 // Unknown desired AP, so here need not associate??
709 return 0; 795 return 0;
710#endif
711 } else { 796 } else {
712 // Set the SSID 797 // Set the SSID
713 memset(pMgmt->abyDesireSSID, 0, WLAN_IEHDR_LEN + WLAN_SSID_MAXLEN + 1); 798 memset(pMgmt->abyDesireSSID, 0, WLAN_IEHDR_LEN + WLAN_SSID_MAXLEN + 1);
@@ -715,9 +800,9 @@ int iwctl_siwessid(struct net_device *dev, struct iw_request_info *info,
715 pItemSSID->byElementID = WLAN_EID_SSID; 800 pItemSSID->byElementID = WLAN_EID_SSID;
716 801
717 memcpy(pItemSSID->abySSID, extra, wrq->length); 802 memcpy(pItemSSID->abySSID, extra, wrq->length);
718 if (pItemSSID->abySSID[wrq->length - 1] == '\0') { 803 if (pItemSSID->abySSID[wrq->length] == '\0') {
719 if (wrq->length>0) 804 if (wrq->length>0)
720 pItemSSID->len = wrq->length - 1; 805 pItemSSID->len = wrq->length;
721 } else { 806 } else {
722 pItemSSID->len = wrq->length; 807 pItemSSID->len = wrq->length;
723 } 808 }
@@ -729,7 +814,6 @@ int iwctl_siwessid(struct net_device *dev, struct iw_request_info *info,
729 return 0; 814 return 0;
730 } 815 }
731 816
732#ifdef WPA_SUPPLICANT_DRIVER_WEXT_SUPPORT
733 // Wext wil order another command of siwap to link 817 // Wext wil order another command of siwap to link
734 // with desired AP, so here need not associate?? 818 // with desired AP, so here need not associate??
735 if (pDevice->bWPASuppWextEnabled == TRUE) { 819 if (pDevice->bWPASuppWextEnabled == TRUE) {
@@ -778,7 +862,6 @@ int iwctl_siwessid(struct net_device *dev, struct iw_request_info *info,
778 } 862 }
779 return 0; 863 return 0;
780 } 864 }
781#endif
782 865
783 DBG_PRT(MSG_LEVEL_DEBUG, KERN_INFO "set essid = %s \n", pItemSSID->abySSID); 866 DBG_PRT(MSG_LEVEL_DEBUG, KERN_INFO "set essid = %s \n", pItemSSID->abySSID);
784 } 867 }
@@ -792,14 +875,18 @@ int iwctl_siwessid(struct net_device *dev, struct iw_request_info *info,
792/* 875/*
793 * Wireless Handler: get essid 876 * Wireless Handler: get essid
794 */ 877 */
795void iwctl_giwessid(struct net_device *dev, struct iw_request_info *info, 878int iwctl_giwessid(struct net_device *dev, struct iw_request_info *info,
796 struct iw_point *wrq, char *extra) 879 union iwreq_data *wrqu, char *extra)
797{ 880{
798 PSDevice pDevice = netdev_priv(dev); 881 PSDevice pDevice = netdev_priv(dev);
882 struct iw_point *wrq = &wrqu->essid;
799 PSMgmtObject pMgmt = &(pDevice->sMgmtObj); 883 PSMgmtObject pMgmt = &(pDevice->sMgmtObj);
800 PWLAN_IE_SSID pItemSSID; 884 PWLAN_IE_SSID pItemSSID;
801 885
802 DBG_PRT(MSG_LEVEL_DEBUG, KERN_INFO " SIOCGIWESSID \n"); 886 DBG_PRT(MSG_LEVEL_DEBUG, KERN_INFO " SIOCGIWESSID\n");
887
888 if (pMgmt == NULL)
889 return -EFAULT;
803 890
804 // Note: if wrq->u.data.flags != 0, we should get the relevant 891 // Note: if wrq->u.data.flags != 0, we should get the relevant
805 // SSID from the SSID list... 892 // SSID from the SSID list...
@@ -811,15 +898,18 @@ void iwctl_giwessid(struct net_device *dev, struct iw_request_info *info,
811 898
812 wrq->length = pItemSSID->len; 899 wrq->length = pItemSSID->len;
813 wrq->flags = 1; // active 900 wrq->flags = 1; // active
901
902 return 0;
814} 903}
815 904
816/* 905/*
817 * Wireless Handler: set data rate 906 * Wireless Handler: set data rate
818 */ 907 */
819int iwctl_siwrate(struct net_device *dev, struct iw_request_info *info, 908int iwctl_siwrate(struct net_device *dev, struct iw_request_info *info,
820 struct iw_param *wrq, char *extra) 909 union iwreq_data *wrqu, char *extra)
821{ 910{
822 PSDevice pDevice = netdev_priv(dev); 911 PSDevice pDevice = netdev_priv(dev);
912 struct iw_param *wrq = &wrqu->bitrate;
823 int rc = 0; 913 int rc = 0;
824 u8 brate = 0; 914 u8 brate = 0;
825 int i; 915 int i;
@@ -893,13 +983,18 @@ int iwctl_siwrate(struct net_device *dev, struct iw_request_info *info,
893/* 983/*
894 * Wireless Handler: get data rate 984 * Wireless Handler: get data rate
895 */ 985 */
896void iwctl_giwrate(struct net_device *dev, struct iw_request_info *info, 986int iwctl_giwrate(struct net_device *dev, struct iw_request_info *info,
897 struct iw_param *wrq, char *extra) 987 union iwreq_data *wrqu, char *extra)
898{ 988{
899 PSDevice pDevice = netdev_priv(dev); 989 PSDevice pDevice = netdev_priv(dev);
990 struct iw_param *wrq = &wrqu->bitrate;
900 PSMgmtObject pMgmt = &(pDevice->sMgmtObj); 991 PSMgmtObject pMgmt = &(pDevice->sMgmtObj);
901 992
902 DBG_PRT(MSG_LEVEL_DEBUG, KERN_INFO " SIOCGIWRATE \n"); 993 DBG_PRT(MSG_LEVEL_DEBUG, KERN_INFO " SIOCGIWRATE\n");
994
995 if (pMgmt == NULL)
996 return -EFAULT;
997
903 { 998 {
904 BYTE abySupportedRates[13] = { 999 BYTE abySupportedRates[13] = {
905 0x02, 0x04, 0x0B, 0x16, 0x0c, 0x12, 0x18, 0x24, 0x30, 1000 0x02, 0x04, 0x0B, 0x16, 0x0c, 0x12, 0x18, 0x24, 0x30,
@@ -932,14 +1027,18 @@ void iwctl_giwrate(struct net_device *dev, struct iw_request_info *info,
932 if (pDevice->bFixRate == TRUE) 1027 if (pDevice->bFixRate == TRUE)
933 wrq->fixed = TRUE; 1028 wrq->fixed = TRUE;
934 } 1029 }
1030
1031 return 0;
935} 1032}
936 1033
937/* 1034/*
938 * Wireless Handler: set rts threshold 1035 * Wireless Handler: set rts threshold
939 */ 1036 */
940int iwctl_siwrts(struct net_device *dev, struct iw_param *wrq) 1037int iwctl_siwrts(struct net_device *dev, struct iw_request_info *info,
1038 union iwreq_data *wrqu, char *extra)
941{ 1039{
942 PSDevice pDevice = netdev_priv(dev); 1040 PSDevice pDevice = netdev_priv(dev);
1041 struct iw_param *wrq = &wrqu->rts;
943 1042
944 if ((wrq->value < 0 || wrq->value > 2312) && !wrq->disabled) 1043 if ((wrq->value < 0 || wrq->value > 2312) && !wrq->disabled)
945 return -EINVAL; 1044 return -EINVAL;
@@ -956,11 +1055,12 @@ int iwctl_siwrts(struct net_device *dev, struct iw_param *wrq)
956 * Wireless Handler: get rts 1055 * Wireless Handler: get rts
957 */ 1056 */
958int iwctl_giwrts(struct net_device *dev, struct iw_request_info *info, 1057int iwctl_giwrts(struct net_device *dev, struct iw_request_info *info,
959 struct iw_param *wrq, char *extra) 1058 union iwreq_data *wrqu, char *extra)
960{ 1059{
961 PSDevice pDevice = netdev_priv(dev); 1060 PSDevice pDevice = netdev_priv(dev);
1061 struct iw_param *wrq = &wrqu->rts;
962 1062
963 DBG_PRT(MSG_LEVEL_DEBUG, KERN_INFO " SIOCGIWRTS \n"); 1063 DBG_PRT(MSG_LEVEL_DEBUG, KERN_INFO " SIOCGIWRTS\n");
964 wrq->value = pDevice->wRTSThreshold; 1064 wrq->value = pDevice->wRTSThreshold;
965 wrq->disabled = (wrq->value >= 2312); 1065 wrq->disabled = (wrq->value >= 2312);
966 wrq->fixed = 1; 1066 wrq->fixed = 1;
@@ -971,13 +1071,14 @@ int iwctl_giwrts(struct net_device *dev, struct iw_request_info *info,
971 * Wireless Handler: set fragment threshold 1071 * Wireless Handler: set fragment threshold
972 */ 1072 */
973int iwctl_siwfrag(struct net_device *dev, struct iw_request_info *info, 1073int iwctl_siwfrag(struct net_device *dev, struct iw_request_info *info,
974 struct iw_param *wrq, char *extra) 1074 union iwreq_data *wrqu, char *extra)
975{ 1075{
976 PSDevice pDevice = netdev_priv(dev); 1076 PSDevice pDevice = netdev_priv(dev);
1077 struct iw_param *wrq = &wrqu->frag;
977 int rc = 0; 1078 int rc = 0;
978 int fthr = wrq->value; 1079 int fthr = wrq->value;
979 1080
980 DBG_PRT(MSG_LEVEL_DEBUG, KERN_INFO " SIOCSIWFRAG \n"); 1081 DBG_PRT(MSG_LEVEL_DEBUG, KERN_INFO " SIOCSIWFRAG\n");
981 1082
982 if (wrq->disabled) 1083 if (wrq->disabled)
983 fthr = 2312; 1084 fthr = 2312;
@@ -994,11 +1095,12 @@ int iwctl_siwfrag(struct net_device *dev, struct iw_request_info *info,
994 * Wireless Handler: get fragment threshold 1095 * Wireless Handler: get fragment threshold
995 */ 1096 */
996int iwctl_giwfrag(struct net_device *dev, struct iw_request_info *info, 1097int iwctl_giwfrag(struct net_device *dev, struct iw_request_info *info,
997 struct iw_param *wrq, char *extra) 1098 union iwreq_data *wrqu, char *extra)
998{ 1099{
999 PSDevice pDevice = netdev_priv(dev); 1100 PSDevice pDevice = netdev_priv(dev);
1101 struct iw_param *wrq = &wrqu->frag;
1000 1102
1001 DBG_PRT(MSG_LEVEL_DEBUG, KERN_INFO " SIOCGIWFRAG \n"); 1103 DBG_PRT(MSG_LEVEL_DEBUG, KERN_INFO " SIOCGIWFRAG\n");
1002 wrq->value = pDevice->wFragmentationThreshold; 1104 wrq->value = pDevice->wFragmentationThreshold;
1003 wrq->disabled = (wrq->value >= 2312); 1105 wrq->disabled = (wrq->value >= 2312);
1004 wrq->fixed = 1; 1106 wrq->fixed = 1;
@@ -1009,12 +1111,13 @@ int iwctl_giwfrag(struct net_device *dev, struct iw_request_info *info,
1009 * Wireless Handler: set retry threshold 1111 * Wireless Handler: set retry threshold
1010 */ 1112 */
1011int iwctl_siwretry(struct net_device *dev, struct iw_request_info *info, 1113int iwctl_siwretry(struct net_device *dev, struct iw_request_info *info,
1012 struct iw_param *wrq, char *extra) 1114 union iwreq_data *wrqu, char *extra)
1013{ 1115{
1014 PSDevice pDevice = netdev_priv(dev); 1116 PSDevice pDevice = netdev_priv(dev);
1117 struct iw_param *wrq = &wrqu->retry;
1015 int rc = 0; 1118 int rc = 0;
1016 1119
1017 DBG_PRT(MSG_LEVEL_DEBUG, KERN_INFO " SIOCSIWRETRY \n"); 1120 DBG_PRT(MSG_LEVEL_DEBUG, KERN_INFO " SIOCSIWRETRY\n");
1018 1121
1019 if (wrq->disabled) { 1122 if (wrq->disabled) {
1020 rc = -EINVAL; 1123 rc = -EINVAL;
@@ -1041,10 +1144,11 @@ int iwctl_siwretry(struct net_device *dev, struct iw_request_info *info,
1041 * Wireless Handler: get retry threshold 1144 * Wireless Handler: get retry threshold
1042 */ 1145 */
1043int iwctl_giwretry(struct net_device *dev, struct iw_request_info *info, 1146int iwctl_giwretry(struct net_device *dev, struct iw_request_info *info,
1044 struct iw_param *wrq, char *extra) 1147 union iwreq_data *wrqu, char *extra)
1045{ 1148{
1046 PSDevice pDevice = netdev_priv(dev); 1149 PSDevice pDevice = netdev_priv(dev);
1047 DBG_PRT(MSG_LEVEL_DEBUG, KERN_INFO " SIOCGIWRETRY \n"); 1150 struct iw_param *wrq = &wrqu->retry;
1151 DBG_PRT(MSG_LEVEL_DEBUG, KERN_INFO " SIOCGIWRETRY\n");
1048 wrq->disabled = 0; // Can't be disabled 1152 wrq->disabled = 0; // Can't be disabled
1049 1153
1050 // Note: by default, display the min retry number 1154 // Note: by default, display the min retry number
@@ -1067,17 +1171,21 @@ int iwctl_giwretry(struct net_device *dev, struct iw_request_info *info,
1067 * Wireless Handler: set encode mode 1171 * Wireless Handler: set encode mode
1068 */ 1172 */
1069int iwctl_siwencode(struct net_device *dev, struct iw_request_info *info, 1173int iwctl_siwencode(struct net_device *dev, struct iw_request_info *info,
1070 struct iw_point *wrq, char *extra) 1174 union iwreq_data *wrqu, char *extra)
1071{ 1175{
1072 PSDevice pDevice = netdev_priv(dev); 1176 PSDevice pDevice = netdev_priv(dev);
1073 PSMgmtObject pMgmt = &(pDevice->sMgmtObj); 1177 PSMgmtObject pMgmt = &(pDevice->sMgmtObj);
1074 DWORD dwKeyIndex = (DWORD)(wrq->flags & IW_ENCODE_INDEX); 1178 struct iw_point *wrq = &wrqu->encoding;
1179 u32 dwKeyIndex = (u32)(wrq->flags & IW_ENCODE_INDEX);
1075 int ii; 1180 int ii;
1076 int uu; 1181 int uu;
1077 int rc = 0; 1182 int rc = 0;
1078 int index = (wrq->flags & IW_ENCODE_INDEX); 1183 int index = (wrq->flags & IW_ENCODE_INDEX);
1079 1184
1080 DBG_PRT(MSG_LEVEL_DEBUG, KERN_INFO " SIOCSIWENCODE \n"); 1185 DBG_PRT(MSG_LEVEL_DEBUG, KERN_INFO " SIOCSIWENCODE\n");
1186
1187 if (pMgmt == NULL)
1188 return -EFAULT;
1081 1189
1082 // Check the size of the key 1190 // Check the size of the key
1083 if (wrq->length > WLAN_WEP232_KEYLEN) { 1191 if (wrq->length > WLAN_WEP232_KEYLEN) {
@@ -1155,17 +1263,17 @@ int iwctl_siwencode(struct net_device *dev, struct iw_request_info *info,
1155 pMgmt->bShareKeyAlgorithm = FALSE; 1263 pMgmt->bShareKeyAlgorithm = FALSE;
1156 } 1264 }
1157 1265
1158#ifdef WPA_SUPPLICANT_DRIVER_WEXT_SUPPORT
1159 memset(pMgmt->abyDesireBSSID, 0xFF, 6); 1266 memset(pMgmt->abyDesireBSSID, 0xFF, 6);
1160#endif 1267
1161 return rc; 1268 return rc;
1162} 1269}
1163 1270
1164int iwctl_giwencode(struct net_device *dev, struct iw_request_info *info, 1271int iwctl_giwencode(struct net_device *dev, struct iw_request_info *info,
1165 struct iw_point *wrq, char *extra) 1272 union iwreq_data *wrqu, char *extra)
1166{ 1273{
1167 PSDevice pDevice = netdev_priv(dev); 1274 PSDevice pDevice = netdev_priv(dev);
1168 PSMgmtObject pMgmt = &(pDevice->sMgmtObj); 1275 PSMgmtObject pMgmt = &(pDevice->sMgmtObj);
1276 struct iw_point *wrq = &wrqu->encoding;
1169 char abyKey[WLAN_WEP232_KEYLEN]; 1277 char abyKey[WLAN_WEP232_KEYLEN];
1170 1278
1171 unsigned index = (unsigned)(wrq->flags & IW_ENCODE_INDEX); 1279 unsigned index = (unsigned)(wrq->flags & IW_ENCODE_INDEX);
@@ -1173,6 +1281,9 @@ int iwctl_giwencode(struct net_device *dev, struct iw_request_info *info,
1173 1281
1174 DBG_PRT(MSG_LEVEL_DEBUG, KERN_INFO " SIOCGIWENCODE\n"); 1282 DBG_PRT(MSG_LEVEL_DEBUG, KERN_INFO " SIOCGIWENCODE\n");
1175 1283
1284 if (pMgmt == NULL)
1285 return -EFAULT;
1286
1176 if (index > WLAN_WEP_NKEYS) 1287 if (index > WLAN_WEP_NKEYS)
1177 return -EINVAL; 1288 return -EINVAL;
1178 if (index < 1) { // get default key 1289 if (index < 1) { // get default key
@@ -1220,13 +1331,17 @@ int iwctl_giwencode(struct net_device *dev, struct iw_request_info *info,
1220 * Wireless Handler: set power mode 1331 * Wireless Handler: set power mode
1221 */ 1332 */
1222int iwctl_siwpower(struct net_device *dev, struct iw_request_info *info, 1333int iwctl_siwpower(struct net_device *dev, struct iw_request_info *info,
1223 struct iw_param *wrq, char *extra) 1334 union iwreq_data *wrqu, char *extra)
1224{ 1335{
1225 PSDevice pDevice = netdev_priv(dev); 1336 PSDevice pDevice = netdev_priv(dev);
1226 PSMgmtObject pMgmt = &(pDevice->sMgmtObj); 1337 PSMgmtObject pMgmt = &(pDevice->sMgmtObj);
1338 struct iw_param *wrq = &wrqu->power;
1227 int rc = 0; 1339 int rc = 0;
1228 1340
1229 DBG_PRT(MSG_LEVEL_DEBUG, KERN_INFO " SIOCSIWPOWER \n"); 1341 DBG_PRT(MSG_LEVEL_DEBUG, KERN_INFO " SIOCSIWPOWER\n");
1342
1343 if (pMgmt == NULL)
1344 return -EFAULT;
1230 1345
1231 if (!(pDevice->flags & DEVICE_FLAGS_OPENED)) { 1346 if (!(pDevice->flags & DEVICE_FLAGS_OPENED)) {
1232 rc = -EINVAL; 1347 rc = -EINVAL;
@@ -1268,24 +1383,31 @@ int iwctl_siwpower(struct net_device *dev, struct iw_request_info *info,
1268 * Wireless Handler: get power mode 1383 * Wireless Handler: get power mode
1269 */ 1384 */
1270int iwctl_giwpower(struct net_device *dev, struct iw_request_info *info, 1385int iwctl_giwpower(struct net_device *dev, struct iw_request_info *info,
1271 struct iw_param *wrq, char *extra) 1386 union iwreq_data *wrqu, char *extra)
1272{ 1387{
1273 PSDevice pDevice = netdev_priv(dev); 1388 PSDevice pDevice = netdev_priv(dev);
1274 PSMgmtObject pMgmt = &(pDevice->sMgmtObj); 1389 PSMgmtObject pMgmt = &(pDevice->sMgmtObj);
1390 struct iw_param *wrq = &wrqu->power;
1275 int mode = pDevice->ePSMode; 1391 int mode = pDevice->ePSMode;
1276 1392
1277 DBG_PRT(MSG_LEVEL_DEBUG, KERN_INFO " SIOCGIWPOWER \n"); 1393 DBG_PRT(MSG_LEVEL_DEBUG, KERN_INFO " SIOCGIWPOWER\n");
1394
1395 if (pMgmt == NULL)
1396 return -EFAULT;
1278 1397
1279 if ((wrq->disabled = (mode == WMAC_POWER_CAM))) 1398 if ((wrq->disabled = (mode == WMAC_POWER_CAM)))
1280 return 0; 1399 return 0;
1281 1400
1282 if ((wrq->flags & IW_POWER_TYPE) == IW_POWER_TIMEOUT) { 1401 if ((wrq->flags & IW_POWER_TYPE) == IW_POWER_TIMEOUT) {
1283 wrq->value = (int)((pMgmt->wListenInterval * pMgmt->wCurrBeaconPeriod) << 10); 1402 wrq->value = (int)((pMgmt->wListenInterval *
1403 pMgmt->wCurrBeaconPeriod) / 100);
1284 wrq->flags = IW_POWER_TIMEOUT; 1404 wrq->flags = IW_POWER_TIMEOUT;
1285 } else { 1405 } else {
1286 wrq->value = (int)((pMgmt->wListenInterval * pMgmt->wCurrBeaconPeriod) << 10); 1406 wrq->value = (int)((pMgmt->wListenInterval *
1407 pMgmt->wCurrBeaconPeriod) / 100);
1287 wrq->flags = IW_POWER_PERIOD; 1408 wrq->flags = IW_POWER_PERIOD;
1288 } 1409 }
1410
1289 wrq->flags |= IW_POWER_ALL_R; 1411 wrq->flags |= IW_POWER_ALL_R;
1290 return 0; 1412 return 0;
1291} 1413}
@@ -1294,12 +1416,13 @@ int iwctl_giwpower(struct net_device *dev, struct iw_request_info *info,
1294 * Wireless Handler: get Sensitivity 1416 * Wireless Handler: get Sensitivity
1295 */ 1417 */
1296int iwctl_giwsens(struct net_device *dev, struct iw_request_info *info, 1418int iwctl_giwsens(struct net_device *dev, struct iw_request_info *info,
1297 struct iw_param *wrq, char *extra) 1419 union iwreq_data *wrqu, char *extra)
1298{ 1420{
1299 PSDevice pDevice = netdev_priv(dev); 1421 PSDevice pDevice = netdev_priv(dev);
1422 struct iw_param *wrq = &wrqu->sens;
1300 long ldBm; 1423 long ldBm;
1301 1424
1302 DBG_PRT(MSG_LEVEL_DEBUG, KERN_INFO " SIOCGIWSENS \n"); 1425 DBG_PRT(MSG_LEVEL_DEBUG, KERN_INFO " SIOCGIWSENS\n");
1303 if (pDevice->bLinkPass == TRUE) { 1426 if (pDevice->bLinkPass == TRUE) {
1304 RFvRSSITodBm(pDevice, (BYTE)(pDevice->uCurrRSSI), &ldBm); 1427 RFvRSSITodBm(pDevice, (BYTE)(pDevice->uCurrRSSI), &ldBm);
1305 wrq->value = ldBm; 1428 wrq->value = ldBm;
@@ -1311,18 +1434,20 @@ int iwctl_giwsens(struct net_device *dev, struct iw_request_info *info,
1311 return 0; 1434 return 0;
1312} 1435}
1313 1436
1314#ifdef WPA_SUPPLICANT_DRIVER_WEXT_SUPPORT
1315
1316int iwctl_siwauth(struct net_device *dev, struct iw_request_info *info, 1437int iwctl_siwauth(struct net_device *dev, struct iw_request_info *info,
1317 struct iw_param *wrq, char *extra) 1438 union iwreq_data *wrqu, char *extra)
1318{ 1439{
1319 PSDevice pDevice = netdev_priv(dev); 1440 PSDevice pDevice = netdev_priv(dev);
1320 PSMgmtObject pMgmt = &(pDevice->sMgmtObj); 1441 PSMgmtObject pMgmt = &(pDevice->sMgmtObj);
1442 struct iw_param *wrq = &wrqu->param;
1321 int ret = 0; 1443 int ret = 0;
1322 static int wpa_version = 0; // must be static to save the last value, einsn liu 1444 static int wpa_version = 0; // must be static to save the last value, einsn liu
1323 static int pairwise = 0; 1445 static int pairwise = 0;
1324 1446
1325 DBG_PRT(MSG_LEVEL_DEBUG, KERN_INFO " SIOCSIWAUTH \n"); 1447 if (pMgmt == NULL)
1448 return -EFAULT;
1449
1450 DBG_PRT(MSG_LEVEL_DEBUG, KERN_INFO " SIOCSIWAUTH\n");
1326 switch (wrq->flags & IW_AUTH_INDEX) { 1451 switch (wrq->flags & IW_AUTH_INDEX) {
1327 case IW_AUTH_WPA_VERSION: 1452 case IW_AUTH_WPA_VERSION:
1328 wpa_version = wrq->value; 1453 wpa_version = wrq->value;
@@ -1406,6 +1531,7 @@ int iwctl_siwauth(struct net_device *dev, struct iw_request_info *info,
1406 } 1531 }
1407 break; 1532 break;
1408 default: 1533 default:
1534 PRINT_K("iwctl_siwauth: not supported %x\n", wrq->flags);
1409 ret = -EOPNOTSUPP; 1535 ret = -EOPNOTSUPP;
1410 break; 1536 break;
1411 } 1537 }
@@ -1413,18 +1539,22 @@ int iwctl_siwauth(struct net_device *dev, struct iw_request_info *info,
1413} 1539}
1414 1540
1415int iwctl_giwauth(struct net_device *dev, struct iw_request_info *info, 1541int iwctl_giwauth(struct net_device *dev, struct iw_request_info *info,
1416 struct iw_param *wrq, char *extra) 1542 union iwreq_data *wrqu, char *extra)
1417{ 1543{
1418 return -EOPNOTSUPP; 1544 return -EOPNOTSUPP;
1419} 1545}
1420 1546
1421int iwctl_siwgenie(struct net_device *dev, struct iw_request_info *info, 1547int iwctl_siwgenie(struct net_device *dev, struct iw_request_info *info,
1422 struct iw_point *wrq, char *extra) 1548 union iwreq_data *wrqu, char *extra)
1423{ 1549{
1424 PSDevice pDevice = netdev_priv(dev); 1550 PSDevice pDevice = netdev_priv(dev);
1425 PSMgmtObject pMgmt = &(pDevice->sMgmtObj); 1551 PSMgmtObject pMgmt = &(pDevice->sMgmtObj);
1552 struct iw_point *wrq = &wrqu->data;
1426 int ret = 0; 1553 int ret = 0;
1427 1554
1555 if (pMgmt == NULL)
1556 return -EFAULT;
1557
1428 if (wrq->length){ 1558 if (wrq->length){
1429 if ((wrq->length < 2) || (extra[1] + 2 != wrq->length)) { 1559 if ((wrq->length < 2) || (extra[1] + 2 != wrq->length)) {
1430 ret = -EINVAL; 1560 ret = -EINVAL;
@@ -1450,13 +1580,17 @@ out: // not completely ...not necessary in wpa_supplicant 0.5.8
1450} 1580}
1451 1581
1452int iwctl_giwgenie(struct net_device *dev, struct iw_request_info *info, 1582int iwctl_giwgenie(struct net_device *dev, struct iw_request_info *info,
1453 struct iw_point *wrq, char *extra) 1583 union iwreq_data *wrqu, char *extra)
1454{ 1584{
1455 PSDevice pDevice = netdev_priv(dev); 1585 PSDevice pDevice = netdev_priv(dev);
1456 PSMgmtObject pMgmt = &(pDevice->sMgmtObj); 1586 PSMgmtObject pMgmt = &(pDevice->sMgmtObj);
1587 struct iw_point *wrq = &wrqu->data;
1457 int ret = 0; 1588 int ret = 0;
1458 int space = wrq->length; 1589 int space = wrq->length;
1459 1590
1591 if (pMgmt == NULL)
1592 return -EFAULT;
1593
1460 wrq->length = 0; 1594 wrq->length = 0;
1461 if (pMgmt->wWPAIELen > 0) { 1595 if (pMgmt->wWPAIELen > 0) {
1462 wrq->length = pMgmt->wWPAIELen; 1596 wrq->length = pMgmt->wWPAIELen;
@@ -1472,10 +1606,11 @@ int iwctl_giwgenie(struct net_device *dev, struct iw_request_info *info,
1472} 1606}
1473 1607
1474int iwctl_siwencodeext(struct net_device *dev, struct iw_request_info *info, 1608int iwctl_siwencodeext(struct net_device *dev, struct iw_request_info *info,
1475 struct iw_point *wrq, char *extra) 1609 union iwreq_data *wrqu, char *extra)
1476{ 1610{
1477 PSDevice pDevice = netdev_priv(dev); 1611 PSDevice pDevice = netdev_priv(dev);
1478 PSMgmtObject pMgmt = &(pDevice->sMgmtObj); 1612 PSMgmtObject pMgmt = &(pDevice->sMgmtObj);
1613 struct iw_point *wrq = &wrqu->encoding;
1479 struct iw_encode_ext *ext = (struct iw_encode_ext*)extra; 1614 struct iw_encode_ext *ext = (struct iw_encode_ext*)extra;
1480 struct viawget_wpa_param *param=NULL; 1615 struct viawget_wpa_param *param=NULL;
1481// original member 1616// original member
@@ -1488,17 +1623,18 @@ int iwctl_siwencodeext(struct net_device *dev, struct iw_request_info *info,
1488 size_t seq_len = 0; 1623 size_t seq_len = 0;
1489 size_t key_len = 0; 1624 size_t key_len = 0;
1490 u8 *buf; 1625 u8 *buf;
1491 size_t blen;
1492 u8 key_array[64]; 1626 u8 key_array[64];
1493 int ret = 0; 1627 int ret = 0;
1494 1628
1495 PRINT_K("SIOCSIWENCODEEXT...... \n"); 1629 PRINT_K("SIOCSIWENCODEEXT......\n");
1496 1630
1497 blen = sizeof(*param); 1631 if (pMgmt == NULL)
1498 buf = kmalloc((int)blen, (int)GFP_KERNEL); 1632 return -EFAULT;
1633
1634 buf = kzalloc(sizeof(struct viawget_wpa_param), GFP_KERNEL);
1499 if (buf == NULL) 1635 if (buf == NULL)
1500 return -ENOMEM; 1636 return -ENOMEM;
1501 memset(buf, 0, blen); 1637
1502 param = (struct viawget_wpa_param *)buf; 1638 param = (struct viawget_wpa_param *)buf;
1503 1639
1504// recover alg_name 1640// recover alg_name
@@ -1588,28 +1724,33 @@ int iwctl_siwencodeext(struct net_device *dev, struct iw_request_info *info,
1588 } 1724 }
1589/*******/ 1725/*******/
1590 spin_lock_irq(&pDevice->lock); 1726 spin_lock_irq(&pDevice->lock);
1591 ret = wpa_set_keys(pDevice, param, TRUE); 1727 ret = wpa_set_keys(pDevice, param);
1592 spin_unlock_irq(&pDevice->lock); 1728 spin_unlock_irq(&pDevice->lock);
1593 1729
1594error: 1730error:
1595 kfree(param); 1731 kfree(buf);
1596 return ret; 1732 return ret;
1597} 1733}
1598 1734
1599int iwctl_giwencodeext(struct net_device *dev, struct iw_request_info *info, 1735int iwctl_giwencodeext(struct net_device *dev, struct iw_request_info *info,
1600 struct iw_point *wrq, char *extra) 1736 union iwreq_data *wrqu, char *extra)
1601{ 1737{
1602 return -EOPNOTSUPP; 1738 return -EOPNOTSUPP;
1603} 1739}
1604 1740
1605int iwctl_siwmlme(struct net_device *dev, struct iw_request_info *info, 1741int iwctl_siwmlme(struct net_device *dev, struct iw_request_info *info,
1606 struct iw_point *wrq, char *extra) 1742 union iwreq_data *wrqu, char *extra)
1607{ 1743{
1608 PSDevice pDevice = netdev_priv(dev); 1744 PSDevice pDevice = netdev_priv(dev);
1609 PSMgmtObject pMgmt = &(pDevice->sMgmtObj); 1745 PSMgmtObject pMgmt = &(pDevice->sMgmtObj);
1610 struct iw_mlme *mlme = (struct iw_mlme *)extra; 1746 struct iw_mlme *mlme = (struct iw_mlme *)extra;
1611 int ret = 0; 1747 int ret = 0;
1612 1748
1749 DBG_PRT(MSG_LEVEL_DEBUG, KERN_INFO " SIOCSIWMLME\n");
1750
1751 if (pMgmt == NULL)
1752 return -EFAULT;
1753
1613 if (memcmp(pMgmt->abyCurrBSSID, mlme->addr.sa_data, ETH_ALEN)) { 1754 if (memcmp(pMgmt->abyCurrBSSID, mlme->addr.sa_data, ETH_ALEN)) {
1614 ret = -EINVAL; 1755 ret = -EINVAL;
1615 return ret; 1756 return ret;
@@ -1629,81 +1770,62 @@ int iwctl_siwmlme(struct net_device *dev, struct iw_request_info *info,
1629 return ret; 1770 return ret;
1630} 1771}
1631 1772
1632#endif 1773static int iwctl_config_commit(struct net_device *dev,
1774 struct iw_request_info *info, union iwreq_data *wrqu, char *extra)
1775{
1776 DBG_PRT(MSG_LEVEL_DEBUG, KERN_INFO "SIOCSIWCOMMIT\n");
1777
1778 return 0;
1779}
1633 1780
1634static const iw_handler iwctl_handler[] = { 1781static const iw_handler iwctl_handler[] = {
1635 (iw_handler)NULL, // SIOCSIWCOMMIT 1782 IW_HANDLER(SIOCSIWCOMMIT, iwctl_config_commit),
1636 (iw_handler)NULL, // SIOCGIWNAME 1783 IW_HANDLER(SIOCGIWNAME, iwctl_giwname),
1637 (iw_handler)NULL, // SIOCSIWNWID 1784 IW_HANDLER(SIOCSIWFREQ, iwctl_siwfreq),
1638 (iw_handler)NULL, // SIOCGIWNWID 1785 IW_HANDLER(SIOCGIWFREQ, iwctl_giwfreq),
1639 (iw_handler)NULL, // SIOCSIWFREQ 1786 IW_HANDLER(SIOCSIWMODE, iwctl_siwmode),
1640 (iw_handler)NULL, // SIOCGIWFREQ 1787 IW_HANDLER(SIOCGIWMODE, iwctl_giwmode),
1641 (iw_handler)NULL, // SIOCSIWMODE 1788 IW_HANDLER(SIOCGIWSENS, iwctl_giwsens),
1642 (iw_handler)NULL, // SIOCGIWMODE 1789 IW_HANDLER(SIOCGIWRANGE, iwctl_giwrange),
1643 (iw_handler)NULL, // SIOCSIWSENS 1790 IW_HANDLER(SIOCSIWAP, iwctl_siwap),
1644 (iw_handler)NULL, // SIOCGIWSENS 1791 IW_HANDLER(SIOCGIWAP, iwctl_giwap),
1645 (iw_handler)NULL, // SIOCSIWRANGE 1792 IW_HANDLER(SIOCSIWMLME, iwctl_siwmlme),
1646 (iw_handler)iwctl_giwrange, // SIOCGIWRANGE 1793 IW_HANDLER(SIOCGIWAPLIST, iwctl_giwaplist),
1647 (iw_handler)NULL, // SIOCSIWPRIV 1794 IW_HANDLER(SIOCSIWSCAN, iwctl_siwscan),
1648 (iw_handler)NULL, // SIOCGIWPRIV 1795 IW_HANDLER(SIOCGIWSCAN, iwctl_giwscan),
1649 (iw_handler)NULL, // SIOCSIWSTATS 1796 IW_HANDLER(SIOCSIWESSID, iwctl_siwessid),
1650 (iw_handler)NULL, // SIOCGIWSTATS 1797 IW_HANDLER(SIOCGIWESSID, iwctl_giwessid),
1651 (iw_handler)NULL, // SIOCSIWSPY 1798 IW_HANDLER(SIOCSIWRATE, iwctl_siwrate),
1652 (iw_handler)NULL, // SIOCGIWSPY 1799 IW_HANDLER(SIOCGIWRATE, iwctl_giwrate),
1653 (iw_handler)NULL, // -- hole -- 1800 IW_HANDLER(SIOCSIWRTS, iwctl_siwrts),
1654 (iw_handler)NULL, // -- hole -- 1801 IW_HANDLER(SIOCGIWRTS, iwctl_giwrts),
1655 (iw_handler)NULL, // SIOCSIWAP 1802 IW_HANDLER(SIOCSIWFRAG, iwctl_siwfrag),
1656 (iw_handler)NULL, // SIOCGIWAP 1803 IW_HANDLER(SIOCGIWFRAG, iwctl_giwfrag),
1657 (iw_handler)NULL, // -- hole -- 0x16 1804 IW_HANDLER(SIOCSIWRETRY, iwctl_siwretry),
1658 (iw_handler)NULL, // SIOCGIWAPLIST 1805 IW_HANDLER(SIOCGIWRETRY, iwctl_giwretry),
1659 (iw_handler)iwctl_siwscan, // SIOCSIWSCAN 1806 IW_HANDLER(SIOCSIWENCODE, iwctl_siwencode),
1660 (iw_handler)iwctl_giwscan, // SIOCGIWSCAN 1807 IW_HANDLER(SIOCGIWENCODE, iwctl_giwencode),
1661 (iw_handler)NULL, // SIOCSIWESSID 1808 IW_HANDLER(SIOCSIWPOWER, iwctl_siwpower),
1662 (iw_handler)NULL, // SIOCGIWESSID 1809 IW_HANDLER(SIOCGIWPOWER, iwctl_giwpower),
1663 (iw_handler)NULL, // SIOCSIWNICKN 1810 IW_HANDLER(SIOCSIWGENIE, iwctl_siwgenie),
1664 (iw_handler)NULL, // SIOCGIWNICKN 1811 IW_HANDLER(SIOCGIWGENIE, iwctl_giwgenie),
1665 (iw_handler)NULL, // -- hole -- 1812 IW_HANDLER(SIOCSIWMLME, iwctl_siwmlme),
1666 (iw_handler)NULL, // -- hole -- 1813 IW_HANDLER(SIOCSIWAUTH, iwctl_siwauth),
1667 (iw_handler)NULL, // SIOCSIWRATE 0x20 1814 IW_HANDLER(SIOCGIWAUTH, iwctl_giwauth),
1668 (iw_handler)NULL, // SIOCGIWRATE 1815 IW_HANDLER(SIOCSIWENCODEEXT, iwctl_siwencodeext),
1669 (iw_handler)NULL, // SIOCSIWRTS 1816 IW_HANDLER(SIOCGIWENCODEEXT, iwctl_giwencodeext)
1670 (iw_handler)NULL, // SIOCGIWRTS
1671 (iw_handler)NULL, // SIOCSIWFRAG
1672 (iw_handler)NULL, // SIOCGIWFRAG
1673 (iw_handler)NULL, // SIOCSIWTXPOW
1674 (iw_handler)NULL, // SIOCGIWTXPOW
1675 (iw_handler)NULL, // SIOCSIWRETRY
1676 (iw_handler)NULL, // SIOCGIWRETRY
1677 (iw_handler)NULL, // SIOCSIWENCODE
1678 (iw_handler)NULL, // SIOCGIWENCODE
1679 (iw_handler)NULL, // SIOCSIWPOWER
1680 (iw_handler)NULL, // SIOCGIWPOWER
1681 (iw_handler)NULL, // -- hole --
1682 (iw_handler)NULL, // -- hole --
1683 (iw_handler)NULL, // SIOCSIWGENIE
1684 (iw_handler)NULL, // SIOCGIWGENIE
1685 (iw_handler)NULL, // SIOCSIWAUTH
1686 (iw_handler)NULL, // SIOCGIWAUTH
1687 (iw_handler)NULL, // SIOCSIWENCODEEXT
1688 (iw_handler)NULL, // SIOCGIWENCODEEXT
1689 (iw_handler)NULL, // SIOCSIWPMKSA
1690 (iw_handler)NULL, // -- hole --
1691}; 1817};
1692 1818
1693static const iw_handler iwctl_private_handler[] = { 1819static const iw_handler iwctl_private_handler[] = {
1694 NULL, // SIOCIWFIRSTPRIV 1820 NULL, // SIOCIWFIRSTPRIV
1695}; 1821};
1696 1822
1697struct iw_priv_args iwctl_private_args[] = {
1698 { IOCTL_CMD_SET, IW_PRIV_TYPE_CHAR | 1024, 0, "set" },
1699};
1700
1701const struct iw_handler_def iwctl_handler_def = { 1823const struct iw_handler_def iwctl_handler_def = {
1702 .get_wireless_stats = &iwctl_get_wireless_stats, 1824 .get_wireless_stats = &iwctl_get_wireless_stats,
1703 .num_standard = sizeof(iwctl_handler) / sizeof(iw_handler), 1825 .num_standard = ARRAY_SIZE(iwctl_handler),
1704 .num_private = 0, 1826 .num_private = 0,
1705 .num_private_args = 0, 1827 .num_private_args = 0,
1706 .standard = (iw_handler *)iwctl_handler, 1828 .standard = iwctl_handler,
1707 .private = NULL, 1829 .private = NULL,
1708 .private_args = NULL, 1830 .private_args = NULL,
1709}; 1831};
diff --git a/drivers/staging/vt6656/iwctl.h b/drivers/staging/vt6656/iwctl.h
index d056f83a9158..b594a10db318 100644
--- a/drivers/staging/vt6656/iwctl.h
+++ b/drivers/staging/vt6656/iwctl.h
@@ -42,106 +42,105 @@
42struct iw_statistics *iwctl_get_wireless_stats(struct net_device *dev); 42struct iw_statistics *iwctl_get_wireless_stats(struct net_device *dev);
43 43
44int iwctl_siwap(struct net_device *dev, struct iw_request_info *info, 44int iwctl_siwap(struct net_device *dev, struct iw_request_info *info,
45 struct sockaddr *wrq, char *extra); 45 union iwreq_data *wrqu, char *extra);
46 46
47void iwctl_giwrange(struct net_device *dev, struct iw_request_info *info, 47int iwctl_giwrange(struct net_device *dev, struct iw_request_info *info,
48 struct iw_point *wrq, char *extra); 48 union iwreq_data *wrqu, char *extra);
49 49
50void iwctl_giwmode(struct net_device *dev, struct iw_request_info *info, 50int iwctl_giwmode(struct net_device *dev, struct iw_request_info *info,
51 __u32 *wmode, char *extra); 51 union iwreq_data *wrqu, char *extra);
52 52
53int iwctl_siwmode(struct net_device *dev, struct iw_request_info *info, 53int iwctl_siwmode(struct net_device *dev, struct iw_request_info *info,
54 __u32 *wmode, char *extra); 54 union iwreq_data *wrqu, char *extra);
55 55
56int iwctl_giwfreq(struct net_device *dev, struct iw_request_info *info, 56int iwctl_giwfreq(struct net_device *dev, struct iw_request_info *info,
57 struct iw_freq *wrq, char *extra); 57 union iwreq_data *wrqu, char *extra);
58 58
59int iwctl_siwfreq(struct net_device *dev, struct iw_request_info *info, 59int iwctl_siwfreq(struct net_device *dev, struct iw_request_info *info,
60 struct iw_freq *wrq, char *extra); 60 union iwreq_data *wrqu, char *extra);
61 61
62int iwctl_giwname(struct net_device *dev, struct iw_request_info *info, 62int iwctl_giwname(struct net_device *dev, struct iw_request_info *info,
63 char *wrq, char *extra); 63 union iwreq_data *wrqu, char *extra);
64 64
65int iwctl_giwsens(struct net_device *dev, struct iw_request_info *info, 65int iwctl_giwsens(struct net_device *dev, struct iw_request_info *info,
66 struct iw_param *wrq, char *extra); 66 union iwreq_data *wrqu, char *extra);
67 67
68int iwctl_giwap(struct net_device *dev, struct iw_request_info *info, 68int iwctl_giwap(struct net_device *dev, struct iw_request_info *info,
69 struct sockaddr *wrq, char *extra); 69 union iwreq_data *wrqu, char *extra);
70 70
71int iwctl_giwaplist(struct net_device *dev, struct iw_request_info *info, 71int iwctl_giwaplist(struct net_device *dev, struct iw_request_info *info,
72 struct iw_point *wrq, char *extra); 72 union iwreq_data *wrqu, char *extra);
73 73
74int iwctl_siwessid(struct net_device *dev, struct iw_request_info *info, 74int iwctl_siwessid(struct net_device *dev, struct iw_request_info *info,
75 struct iw_point *wrq, char *extra); 75 union iwreq_data *wrqu, char *extra);
76 76
77void iwctl_giwessid(struct net_device *dev, struct iw_request_info *info, 77int iwctl_giwessid(struct net_device *dev, struct iw_request_info *info,
78 struct iw_point *wrq, char *extra); 78 union iwreq_data *wrqu, char *extra);
79 79
80int iwctl_siwrate(struct net_device *dev, struct iw_request_info *info, 80int iwctl_siwrate(struct net_device *dev, struct iw_request_info *info,
81 struct iw_param *wrq, char *extra); 81 union iwreq_data *wrqu, char *extra);
82 82
83void iwctl_giwrate(struct net_device *dev, struct iw_request_info *info, 83int iwctl_giwrate(struct net_device *dev, struct iw_request_info *info,
84 struct iw_param *wrq, char *extra); 84 union iwreq_data *wrqu, char *extra);
85 85
86int iwctl_siwrts(struct net_device *dev, struct iw_param *wrq); 86int iwctl_siwrts(struct net_device *dev, struct iw_request_info *info,
87 union iwreq_data *wrqu, char *extra);
87 88
88int iwctl_giwrts(struct net_device *dev, struct iw_request_info *info, 89int iwctl_giwrts(struct net_device *dev, struct iw_request_info *info,
89 struct iw_param *wrq, char *extra); 90 union iwreq_data *wrqu, char *extra);
90 91
91int iwctl_siwfrag(struct net_device *dev, struct iw_request_info *info, 92int iwctl_siwfrag(struct net_device *dev, struct iw_request_info *info,
92 struct iw_param *wrq, char *extra); 93 union iwreq_data *wrqu, char *extra);
93 94
94int iwctl_giwfrag(struct net_device *dev, struct iw_request_info *info, 95int iwctl_giwfrag(struct net_device *dev, struct iw_request_info *info,
95 struct iw_param *wrq, char *extra); 96 union iwreq_data *wrqu, char *extra);
96 97
97int iwctl_siwretry(struct net_device *dev, struct iw_request_info *info, 98int iwctl_siwretry(struct net_device *dev, struct iw_request_info *info,
98 struct iw_param *wrq, char *extra); 99 union iwreq_data *wrqu, char *extra);
99 100
100int iwctl_giwretry(struct net_device *dev, struct iw_request_info *info, 101int iwctl_giwretry(struct net_device *dev, struct iw_request_info *info,
101 struct iw_param *wrq, char *extra); 102 union iwreq_data *wrqu, char *extra);
102 103
103int iwctl_siwencode(struct net_device *dev, struct iw_request_info *info, 104int iwctl_siwencode(struct net_device *dev, struct iw_request_info *info,
104 struct iw_point *wrq, char *extra); 105 union iwreq_data *wrqu, char *extra);
105 106
106int iwctl_giwencode(struct net_device *dev, struct iw_request_info *info, 107int iwctl_giwencode(struct net_device *dev, struct iw_request_info *info,
107 struct iw_point *wrq, char *extra); 108 union iwreq_data *wrqu, char *extra);
108 109
109int iwctl_siwpower(struct net_device *dev, struct iw_request_info *info, 110int iwctl_siwpower(struct net_device *dev, struct iw_request_info *info,
110 struct iw_param *wrq, char *extra); 111 union iwreq_data *wrqu, char *extra);
111 112
112int iwctl_giwpower(struct net_device *dev, struct iw_request_info *info, 113int iwctl_giwpower(struct net_device *dev, struct iw_request_info *info,
113 struct iw_param *wrq, char *extra); 114 union iwreq_data *wrqu, char *extra);
114 115
115int iwctl_giwscan(struct net_device *dev, struct iw_request_info *info, 116int iwctl_giwscan(struct net_device *dev, struct iw_request_info *info,
116 struct iw_point *wrq, char *extra); 117 union iwreq_data *wrqu, char *extra);
117 118
118int iwctl_siwscan(struct net_device *dev, struct iw_request_info *info, 119int iwctl_siwscan(struct net_device *dev, struct iw_request_info *info,
119 struct iw_param *wrq, char *extra); 120 union iwreq_data *wrqu, char *extra);
120 121
121#ifdef WPA_SUPPLICANT_DRIVER_WEXT_SUPPORT
122int iwctl_siwauth(struct net_device *dev, struct iw_request_info *info, 122int iwctl_siwauth(struct net_device *dev, struct iw_request_info *info,
123 struct iw_param *wrq, char *extra); 123 union iwreq_data *wrqu, char *extra);
124 124
125int iwctl_giwauth(struct net_device *dev, struct iw_request_info *info, 125int iwctl_giwauth(struct net_device *dev, struct iw_request_info *info,
126 struct iw_param *wrq, char *extra); 126 union iwreq_data *wrqu, char *extra);
127 127
128int iwctl_siwgenie(struct net_device *dev, struct iw_request_info *info, 128int iwctl_siwgenie(struct net_device *dev, struct iw_request_info *info,
129 struct iw_point *wrq, char *extra); 129 union iwreq_data *wrqu, char *extra);
130 130
131int iwctl_giwgenie(struct net_device *dev, struct iw_request_info *info, 131int iwctl_giwgenie(struct net_device *dev, struct iw_request_info *info,
132 struct iw_point *wrq, char *extra); 132 union iwreq_data *wrqu, char *extra);
133 133
134int iwctl_siwencodeext(struct net_device *dev, struct iw_request_info *info, 134int iwctl_siwencodeext(struct net_device *dev, struct iw_request_info *info,
135 struct iw_point *wrq, char *extra); 135 union iwreq_data *wrqu, char *extra);
136 136
137int iwctl_giwencodeext(struct net_device *dev, struct iw_request_info *info, 137int iwctl_giwencodeext(struct net_device *dev, struct iw_request_info *info,
138 struct iw_point *wrq, char *extra); 138 union iwreq_data *wrqu, char *extra);
139 139
140int iwctl_siwmlme(struct net_device *dev, struct iw_request_info *info, 140int iwctl_siwmlme(struct net_device *dev, struct iw_request_info *info,
141 struct iw_point *wrq, char *extra); 141 union iwreq_data *wrqu, char *extra);
142#endif // #ifdef WPA_SUPPLICANT_DRIVER_WEXT_SUPPORT
143 142
144extern const struct iw_handler_def iwctl_handler_def; 143extern const struct iw_handler_def iwctl_handler_def;
145extern const struct iw_priv_args iwctl_private_args; 144extern const struct iw_priv_args iwctl_priv_args;
146 145
147#endif /* __IWCTL_H__ */ 146#endif /* __IWCTL_H__ */
diff --git a/drivers/staging/vt6656/key.c b/drivers/staging/vt6656/key.c
index a61fcb9591aa..8c78b86b5c80 100644
--- a/drivers/staging/vt6656/key.c
+++ b/drivers/staging/vt6656/key.c
@@ -36,9 +36,9 @@
36 * 36 *
37 */ 37 */
38 38
39#include "mac.h"
39#include "tmacro.h" 40#include "tmacro.h"
40#include "key.h" 41#include "key.h"
41#include "mac.h"
42#include "rndis.h" 42#include "rndis.h"
43#include "control.h" 43#include "control.h"
44 44
@@ -223,7 +223,7 @@ BOOL KeybSetKey(
223 PSKeyManagement pTable, 223 PSKeyManagement pTable,
224 PBYTE pbyBSSID, 224 PBYTE pbyBSSID,
225 DWORD dwKeyIndex, 225 DWORD dwKeyIndex,
226 unsigned long uKeyLength, 226 u32 uKeyLength,
227 PQWORD pKeyRSC, 227 PQWORD pKeyRSC,
228 PBYTE pbyKey, 228 PBYTE pbyKey,
229 BYTE byKeyDecMode 229 BYTE byKeyDecMode
@@ -235,7 +235,8 @@ BOOL KeybSetKey(
235 PSKeyItem pKey; 235 PSKeyItem pKey;
236 unsigned int uKeyIdx; 236 unsigned int uKeyIdx;
237 237
238 DBG_PRT(MSG_LEVEL_DEBUG, KERN_INFO"Enter KeybSetKey: %lX\n", dwKeyIndex); 238 DBG_PRT(MSG_LEVEL_DEBUG, KERN_INFO
239 "Enter KeybSetKey: %X\n", dwKeyIndex);
239 240
240 j = (MAX_KEY_TABLE-1); 241 j = (MAX_KEY_TABLE-1);
241 for (i=0;i<(MAX_KEY_TABLE-1);i++) { 242 for (i=0;i<(MAX_KEY_TABLE-1);i++) {
@@ -261,7 +262,9 @@ BOOL KeybSetKey(
261 if ((dwKeyIndex & TRANSMIT_KEY) != 0) { 262 if ((dwKeyIndex & TRANSMIT_KEY) != 0) {
262 // Group transmit key 263 // Group transmit key
263 pTable->KeyTable[i].dwGTKeyIndex = dwKeyIndex; 264 pTable->KeyTable[i].dwGTKeyIndex = dwKeyIndex;
264 DBG_PRT(MSG_LEVEL_DEBUG, KERN_INFO"Group transmit key(R)[%lX]: %d\n", pTable->KeyTable[i].dwGTKeyIndex, i); 265 DBG_PRT(MSG_LEVEL_DEBUG, KERN_INFO
266 "Group transmit key(R)[%X]: %d\n",
267 pTable->KeyTable[i].dwGTKeyIndex, i);
265 } 268 }
266 pTable->KeyTable[i].wKeyCtl &= 0xFF0F; // clear group key control filed 269 pTable->KeyTable[i].wKeyCtl &= 0xFF0F; // clear group key control filed
267 pTable->KeyTable[i].wKeyCtl |= (byKeyDecMode << 4); 270 pTable->KeyTable[i].wKeyCtl |= (byKeyDecMode << 4);
@@ -302,9 +305,12 @@ BOOL KeybSetKey(
302 } 305 }
303 DBG_PRT(MSG_LEVEL_DEBUG, KERN_INFO"\n"); 306 DBG_PRT(MSG_LEVEL_DEBUG, KERN_INFO"\n");
304 307
305 DBG_PRT(MSG_LEVEL_DEBUG, KERN_INFO"pKey->dwTSC47_16: %lx\n ", pKey->dwTSC47_16); 308 DBG_PRT(MSG_LEVEL_DEBUG, KERN_INFO"pKey->dwTSC47_16: %x\n ",
306 DBG_PRT(MSG_LEVEL_DEBUG, KERN_INFO"pKey->wTSC15_0: %x\n ", pKey->wTSC15_0); 309 pKey->dwTSC47_16);
307 DBG_PRT(MSG_LEVEL_DEBUG, KERN_INFO"pKey->dwKeyIndex: %lx\n ", pKey->dwKeyIndex); 310 DBG_PRT(MSG_LEVEL_DEBUG, KERN_INFO"pKey->wTSC15_0: %x\n ",
311 pKey->wTSC15_0);
312 DBG_PRT(MSG_LEVEL_DEBUG, KERN_INFO"pKey->dwKeyIndex: %x\n ",
313 pKey->dwKeyIndex);
308 314
309 return (TRUE); 315 return (TRUE);
310 } 316 }
@@ -326,7 +332,9 @@ BOOL KeybSetKey(
326 if ((dwKeyIndex & TRANSMIT_KEY) != 0) { 332 if ((dwKeyIndex & TRANSMIT_KEY) != 0) {
327 // Group transmit key 333 // Group transmit key
328 pTable->KeyTable[j].dwGTKeyIndex = dwKeyIndex; 334 pTable->KeyTable[j].dwGTKeyIndex = dwKeyIndex;
329 DBG_PRT(MSG_LEVEL_DEBUG, KERN_INFO"Group transmit key(N)[%lX]: %d\n", pTable->KeyTable[j].dwGTKeyIndex, j); 335 DBG_PRT(MSG_LEVEL_DEBUG, KERN_INFO
336 "Group transmit key(N)[%X]: %d\n",
337 pTable->KeyTable[j].dwGTKeyIndex, j);
330 } 338 }
331 pTable->KeyTable[j].wKeyCtl &= 0xFF0F; // clear group key control filed 339 pTable->KeyTable[j].wKeyCtl &= 0xFF0F; // clear group key control filed
332 pTable->KeyTable[j].wKeyCtl |= (byKeyDecMode << 4); 340 pTable->KeyTable[j].wKeyCtl |= (byKeyDecMode << 4);
@@ -367,9 +375,11 @@ BOOL KeybSetKey(
367 } 375 }
368 DBG_PRT(MSG_LEVEL_DEBUG, KERN_INFO"\n"); 376 DBG_PRT(MSG_LEVEL_DEBUG, KERN_INFO"\n");
369 377
370 DBG_PRT(MSG_LEVEL_DEBUG, KERN_INFO"pKey->dwTSC47_16: %lx\n ", pKey->dwTSC47_16); 378 DBG_PRT(MSG_LEVEL_DEBUG, KERN_INFO"pKey->dwTSC47_16: %x\n ",
379 pKey->dwTSC47_16);
371 DBG_PRT(MSG_LEVEL_DEBUG, KERN_INFO"pKey->wTSC15_0: %x\n ", pKey->wTSC15_0); 380 DBG_PRT(MSG_LEVEL_DEBUG, KERN_INFO"pKey->wTSC15_0: %x\n ", pKey->wTSC15_0);
372 DBG_PRT(MSG_LEVEL_DEBUG, KERN_INFO"pKey->dwKeyIndex: %lx\n ", pKey->dwKeyIndex); 381 DBG_PRT(MSG_LEVEL_DEBUG, KERN_INFO"pKey->dwKeyIndex: %x\n ",
382 pKey->dwKeyIndex);
373 383
374 return (TRUE); 384 return (TRUE);
375 } 385 }
@@ -597,7 +607,8 @@ BOOL KeybGetTransmitKey(PSKeyManagement pTable, PBYTE pbyBSSID, DWORD dwKeyType,
597 DBG_PRT(MSG_LEVEL_DEBUG, KERN_INFO"%x ", pTable->KeyTable[i].abyBSSID[ii]); 607 DBG_PRT(MSG_LEVEL_DEBUG, KERN_INFO"%x ", pTable->KeyTable[i].abyBSSID[ii]);
598 } 608 }
599 DBG_PRT(MSG_LEVEL_DEBUG, KERN_INFO"\n"); 609 DBG_PRT(MSG_LEVEL_DEBUG, KERN_INFO"\n");
600 DBG_PRT(MSG_LEVEL_DEBUG, KERN_INFO"dwGTKeyIndex: %lX\n", pTable->KeyTable[i].dwGTKeyIndex); 610 DBG_PRT(MSG_LEVEL_DEBUG, KERN_INFO"dwGTKeyIndex: %X\n",
611 pTable->KeyTable[i].dwGTKeyIndex);
601 612
602 return (TRUE); 613 return (TRUE);
603 } 614 }
@@ -664,7 +675,7 @@ BOOL KeybSetDefaultKey(
664 void *pDeviceHandler, 675 void *pDeviceHandler,
665 PSKeyManagement pTable, 676 PSKeyManagement pTable,
666 DWORD dwKeyIndex, 677 DWORD dwKeyIndex,
667 unsigned long uKeyLength, 678 u32 uKeyLength,
668 PQWORD pKeyRSC, 679 PQWORD pKeyRSC,
669 PBYTE pbyKey, 680 PBYTE pbyKey,
670 BYTE byKeyDecMode 681 BYTE byKeyDecMode
@@ -696,7 +707,10 @@ BOOL KeybSetDefaultKey(
696 if ((dwKeyIndex & TRANSMIT_KEY) != 0) { 707 if ((dwKeyIndex & TRANSMIT_KEY) != 0) {
697 // Group transmit key 708 // Group transmit key
698 pTable->KeyTable[MAX_KEY_TABLE-1].dwGTKeyIndex = dwKeyIndex; 709 pTable->KeyTable[MAX_KEY_TABLE-1].dwGTKeyIndex = dwKeyIndex;
699 DBG_PRT(MSG_LEVEL_DEBUG, KERN_INFO"Group transmit key(R)[%lX]: %d\n", pTable->KeyTable[MAX_KEY_TABLE-1].dwGTKeyIndex, MAX_KEY_TABLE-1); 710 DBG_PRT(MSG_LEVEL_DEBUG, KERN_INFO
711 "Group transmit key(R)[%X]: %d\n",
712 pTable->KeyTable[MAX_KEY_TABLE-1].dwGTKeyIndex,
713 MAX_KEY_TABLE-1);
700 714
701 } 715 }
702 pTable->KeyTable[MAX_KEY_TABLE-1].wKeyCtl &= 0x7F00; // clear all key control filed 716 pTable->KeyTable[MAX_KEY_TABLE-1].wKeyCtl &= 0x7F00; // clear all key control filed
@@ -747,9 +761,11 @@ BOOL KeybSetDefaultKey(
747 } 761 }
748 DBG_PRT(MSG_LEVEL_DEBUG, KERN_INFO"\n"); 762 DBG_PRT(MSG_LEVEL_DEBUG, KERN_INFO"\n");
749 763
750 DBG_PRT(MSG_LEVEL_DEBUG, KERN_INFO"pKey->dwTSC47_16: %lx\n", pKey->dwTSC47_16); 764 DBG_PRT(MSG_LEVEL_DEBUG, KERN_INFO"pKey->dwTSC47_16: %x\n",
765 pKey->dwTSC47_16);
751 DBG_PRT(MSG_LEVEL_DEBUG, KERN_INFO"pKey->wTSC15_0: %x\n", pKey->wTSC15_0); 766 DBG_PRT(MSG_LEVEL_DEBUG, KERN_INFO"pKey->wTSC15_0: %x\n", pKey->wTSC15_0);
752 DBG_PRT(MSG_LEVEL_DEBUG, KERN_INFO"pKey->dwKeyIndex: %lx\n", pKey->dwKeyIndex); 767 DBG_PRT(MSG_LEVEL_DEBUG, KERN_INFO"pKey->dwKeyIndex: %x\n",
768 pKey->dwKeyIndex);
753 769
754 return (TRUE); 770 return (TRUE);
755} 771}
@@ -775,7 +791,7 @@ BOOL KeybSetAllGroupKey(
775 void *pDeviceHandler, 791 void *pDeviceHandler,
776 PSKeyManagement pTable, 792 PSKeyManagement pTable,
777 DWORD dwKeyIndex, 793 DWORD dwKeyIndex,
778 unsigned long uKeyLength, 794 u32 uKeyLength,
779 PQWORD pKeyRSC, 795 PQWORD pKeyRSC,
780 PBYTE pbyKey, 796 PBYTE pbyKey,
781 BYTE byKeyDecMode 797 BYTE byKeyDecMode
@@ -787,7 +803,8 @@ BOOL KeybSetAllGroupKey(
787 PSKeyItem pKey; 803 PSKeyItem pKey;
788 unsigned int uKeyIdx; 804 unsigned int uKeyIdx;
789 805
790 DBG_PRT(MSG_LEVEL_DEBUG, KERN_INFO"Enter KeybSetAllGroupKey: %lX\n", dwKeyIndex); 806 DBG_PRT(MSG_LEVEL_DEBUG, KERN_INFO"Enter KeybSetAllGroupKey: %X\n",
807 dwKeyIndex);
791 808
792 809
793 if ((dwKeyIndex & PAIRWISE_KEY) != 0) { // Pairwise key 810 if ((dwKeyIndex & PAIRWISE_KEY) != 0) { // Pairwise key
@@ -804,7 +821,9 @@ BOOL KeybSetAllGroupKey(
804 if ((dwKeyIndex & TRANSMIT_KEY) != 0) { 821 if ((dwKeyIndex & TRANSMIT_KEY) != 0) {
805 // Group transmit key 822 // Group transmit key
806 pTable->KeyTable[i].dwGTKeyIndex = dwKeyIndex; 823 pTable->KeyTable[i].dwGTKeyIndex = dwKeyIndex;
807 DBG_PRT(MSG_LEVEL_DEBUG, KERN_INFO"Group transmit key(R)[%lX]: %d\n", pTable->KeyTable[i].dwGTKeyIndex, i); 824 DBG_PRT(MSG_LEVEL_DEBUG, KERN_INFO
825 "Group transmit key(R)[%X]: %d\n",
826 pTable->KeyTable[i].dwGTKeyIndex, i);
808 827
809 } 828 }
810 pTable->KeyTable[i].wKeyCtl &= 0xFF0F; // clear group key control filed 829 pTable->KeyTable[i].wKeyCtl &= 0xFF0F; // clear group key control filed
diff --git a/drivers/staging/vt6656/key.h b/drivers/staging/vt6656/key.h
index f749c7a027d3..bd35d39621ae 100644
--- a/drivers/staging/vt6656/key.h
+++ b/drivers/staging/vt6656/key.h
@@ -58,7 +58,7 @@
58typedef struct tagSKeyItem 58typedef struct tagSKeyItem
59{ 59{
60 BOOL bKeyValid; 60 BOOL bKeyValid;
61 unsigned long uKeyLength; 61 u32 uKeyLength;
62 BYTE abyKey[MAX_KEY_LEN]; 62 BYTE abyKey[MAX_KEY_LEN];
63 QWORD KeyRSC; 63 QWORD KeyRSC;
64 DWORD dwTSC47_16; 64 DWORD dwTSC47_16;
@@ -107,7 +107,7 @@ BOOL KeybSetKey(
107 PSKeyManagement pTable, 107 PSKeyManagement pTable,
108 PBYTE pbyBSSID, 108 PBYTE pbyBSSID,
109 DWORD dwKeyIndex, 109 DWORD dwKeyIndex,
110 unsigned long uKeyLength, 110 u32 uKeyLength,
111 PQWORD pKeyRSC, 111 PQWORD pKeyRSC,
112 PBYTE pbyKey, 112 PBYTE pbyKey,
113 BYTE byKeyDecMode 113 BYTE byKeyDecMode
@@ -146,7 +146,7 @@ BOOL KeybSetDefaultKey(
146 void *pDeviceHandler, 146 void *pDeviceHandler,
147 PSKeyManagement pTable, 147 PSKeyManagement pTable,
148 DWORD dwKeyIndex, 148 DWORD dwKeyIndex,
149 unsigned long uKeyLength, 149 u32 uKeyLength,
150 PQWORD pKeyRSC, 150 PQWORD pKeyRSC,
151 PBYTE pbyKey, 151 PBYTE pbyKey,
152 BYTE byKeyDecMode 152 BYTE byKeyDecMode
@@ -156,7 +156,7 @@ BOOL KeybSetAllGroupKey(
156 void *pDeviceHandler, 156 void *pDeviceHandler,
157 PSKeyManagement pTable, 157 PSKeyManagement pTable,
158 DWORD dwKeyIndex, 158 DWORD dwKeyIndex,
159 unsigned long uKeyLength, 159 u32 uKeyLength,
160 PQWORD pKeyRSC, 160 PQWORD pKeyRSC,
161 PBYTE pbyKey, 161 PBYTE pbyKey,
162 BYTE byKeyDecMode 162 BYTE byKeyDecMode
diff --git a/drivers/staging/vt6656/mac.c b/drivers/staging/vt6656/mac.c
index af4a29d14775..8fddc7b3930b 100644
--- a/drivers/staging/vt6656/mac.c
+++ b/drivers/staging/vt6656/mac.c
@@ -260,7 +260,8 @@ BYTE pbyData[24];
260 dwData1 <<= 16; 260 dwData1 <<= 16;
261 dwData1 |= MAKEWORD(*(pbyAddr+4), *(pbyAddr+5)); 261 dwData1 |= MAKEWORD(*(pbyAddr+4), *(pbyAddr+5));
262 262
263 DBG_PRT(MSG_LEVEL_DEBUG, KERN_INFO"1. wOffset: %d, Data: %lX, KeyCtl:%X\n", wOffset, dwData1, wKeyCtl); 263 DBG_PRT(MSG_LEVEL_DEBUG, KERN_INFO"1. wOffset: %d, Data: %X,"\
264 " KeyCtl:%X\n", wOffset, dwData1, wKeyCtl);
264 265
265 //VNSvOutPortW(dwIoBase + MAC_REG_MISCFFNDEX, wOffset); 266 //VNSvOutPortW(dwIoBase + MAC_REG_MISCFFNDEX, wOffset);
266 //VNSvOutPortD(dwIoBase + MAC_REG_MISCFFDATA, dwData); 267 //VNSvOutPortD(dwIoBase + MAC_REG_MISCFFDATA, dwData);
@@ -277,7 +278,8 @@ BYTE pbyData[24];
277 dwData2 <<= 8; 278 dwData2 <<= 8;
278 dwData2 |= *(pbyAddr+0); 279 dwData2 |= *(pbyAddr+0);
279 280
280 DBG_PRT(MSG_LEVEL_DEBUG, KERN_INFO"2. wOffset: %d, Data: %lX\n", wOffset, dwData2); 281 DBG_PRT(MSG_LEVEL_DEBUG, KERN_INFO"2. wOffset: %d, Data: %X\n",
282 wOffset, dwData2);
281 283
282 //VNSvOutPortW(dwIoBase + MAC_REG_MISCFFNDEX, wOffset); 284 //VNSvOutPortW(dwIoBase + MAC_REG_MISCFFNDEX, wOffset);
283 //VNSvOutPortD(dwIoBase + MAC_REG_MISCFFDATA, dwData); 285 //VNSvOutPortD(dwIoBase + MAC_REG_MISCFFDATA, dwData);
diff --git a/drivers/staging/vt6656/main_usb.c b/drivers/staging/vt6656/main_usb.c
index ad422dea702b..f33086d66496 100644
--- a/drivers/staging/vt6656/main_usb.c
+++ b/drivers/staging/vt6656/main_usb.c
@@ -61,7 +61,6 @@
61#include "bssdb.h" 61#include "bssdb.h"
62#include "hostap.h" 62#include "hostap.h"
63#include "wpactl.h" 63#include "wpactl.h"
64#include "ioctl.h"
65#include "iwctl.h" 64#include "iwctl.h"
66#include "dpc.h" 65#include "dpc.h"
67#include "datarate.h" 66#include "datarate.h"
@@ -244,7 +243,6 @@ static int Config_FileGetParameter(unsigned char *string,
244 unsigned char *dest, 243 unsigned char *dest,
245 unsigned char *source); 244 unsigned char *source);
246 245
247static BOOL device_release_WPADEV(PSDevice pDevice);
248 246
249static void usb_device_reset(PSDevice pDevice); 247static void usb_device_reset(PSDevice pDevice);
250 248
@@ -634,40 +632,6 @@ static BOOL device_init_registers(PSDevice pDevice, DEVICE_INIT_TYPE InitType)
634 return TRUE; 632 return TRUE;
635} 633}
636 634
637static BOOL device_release_WPADEV(PSDevice pDevice)
638{
639 viawget_wpa_header *wpahdr;
640 int ii=0;
641 // wait_queue_head_t Set_wait;
642 //send device close to wpa_supplicant layer
643 if (pDevice->bWPADEVUp==TRUE) {
644 wpahdr = (viawget_wpa_header *)pDevice->skb->data;
645 wpahdr->type = VIAWGET_DEVICECLOSE_MSG;
646 wpahdr->resp_ie_len = 0;
647 wpahdr->req_ie_len = 0;
648 skb_put(pDevice->skb, sizeof(viawget_wpa_header));
649 pDevice->skb->dev = pDevice->wpadev;
650 skb_reset_mac_header(pDevice->skb);
651 pDevice->skb->pkt_type = PACKET_HOST;
652 pDevice->skb->protocol = htons(ETH_P_802_2);
653 memset(pDevice->skb->cb, 0, sizeof(pDevice->skb->cb));
654 netif_rx(pDevice->skb);
655 pDevice->skb = dev_alloc_skb((int)pDevice->rx_buf_sz);
656
657 //wait release WPADEV
658 // init_waitqueue_head(&Set_wait);
659 // wait_event_timeout(Set_wait, ((pDevice->wpadev==NULL)&&(pDevice->skb == NULL)),5*HZ); //1s wait
660 while(pDevice->bWPADEVUp==TRUE) {
661 set_current_state(TASK_UNINTERRUPTIBLE);
662 schedule_timeout (HZ/20); //wait 50ms
663 ii++;
664 if(ii>20)
665 break;
666 }
667 }
668 return TRUE;
669}
670
671#ifdef CONFIG_PM /* Minimal support for suspend and resume */ 635#ifdef CONFIG_PM /* Minimal support for suspend and resume */
672 636
673static int vt6656_suspend(struct usb_interface *intf, pm_message_t message) 637static int vt6656_suspend(struct usb_interface *intf, pm_message_t message)
@@ -711,7 +675,7 @@ static const struct net_device_ops device_netdev_ops = {
711 .ndo_set_rx_mode = device_set_multi, 675 .ndo_set_rx_mode = device_set_multi,
712}; 676};
713 677
714static int __devinit 678static int
715vt6656_probe(struct usb_interface *intf, const struct usb_device_id *id) 679vt6656_probe(struct usb_interface *intf, const struct usb_device_id *id)
716{ 680{
717 u8 fake_mac[ETH_ALEN] = {0x00, 0x00, 0x00, 0x00, 0x00, 0x01}; 681 u8 fake_mac[ETH_ALEN] = {0x00, 0x00, 0x00, 0x00, 0x00, 0x01};
@@ -758,17 +722,6 @@ vt6656_probe(struct usb_interface *intf, const struct usb_device_id *id)
758 722
759 usb_device_reset(pDevice); 723 usb_device_reset(pDevice);
760 724
761 {
762 union iwreq_data wrqu;
763 memset(&wrqu, 0, sizeof(wrqu));
764 wrqu.data.flags = RT_INSMOD_EVENT_FLAG;
765 wrqu.data.length = IFNAMSIZ;
766 wireless_send_event(pDevice->dev,
767 IWEVCUSTOM,
768 &wrqu,
769 pDevice->dev->name);
770 }
771
772 return 0; 725 return 0;
773 726
774err_netdev: 727err_netdev:
@@ -991,12 +944,6 @@ BOOL device_alloc_frag_buf(PSDevice pDevice, PSDeFragControlBlock pDeF) {
991static int device_open(struct net_device *dev) { 944static int device_open(struct net_device *dev) {
992 PSDevice pDevice=(PSDevice) netdev_priv(dev); 945 PSDevice pDevice=(PSDevice) netdev_priv(dev);
993 946
994 extern SWPAResult wpa_Result;
995 memset(wpa_Result.ifname,0,sizeof(wpa_Result.ifname));
996 wpa_Result.proto = 0;
997 wpa_Result.key_mgmt = 0;
998 wpa_Result.eap_type = 0;
999 wpa_Result.authenticated = FALSE;
1000 pDevice->fWPA_Authened = FALSE; 947 pDevice->fWPA_Authened = FALSE;
1001 948
1002 DBG_PRT(MSG_LEVEL_DEBUG, KERN_INFO " device_open...\n"); 949 DBG_PRT(MSG_LEVEL_DEBUG, KERN_INFO " device_open...\n");
@@ -1056,13 +1003,11 @@ static int device_open(struct net_device *dev) {
1056 pDevice->bEventAvailable = FALSE; 1003 pDevice->bEventAvailable = FALSE;
1057 1004
1058 pDevice->bWPADEVUp = FALSE; 1005 pDevice->bWPADEVUp = FALSE;
1059#ifdef WPA_SUPPLICANT_DRIVER_WEXT_SUPPORT
1060 pDevice->bwextstep0 = FALSE; 1006 pDevice->bwextstep0 = FALSE;
1061 pDevice->bwextstep1 = FALSE; 1007 pDevice->bwextstep1 = FALSE;
1062 pDevice->bwextstep2 = FALSE; 1008 pDevice->bwextstep2 = FALSE;
1063 pDevice->bwextstep3 = FALSE; 1009 pDevice->bwextstep3 = FALSE;
1064 pDevice->bWPASuppWextEnabled = FALSE; 1010 pDevice->bWPASuppWextEnabled = FALSE;
1065#endif
1066 pDevice->byReAssocCount = 0; 1011 pDevice->byReAssocCount = 0;
1067 1012
1068 RXvWorkItem(pDevice); 1013 RXvWorkItem(pDevice);
@@ -1096,15 +1041,8 @@ static int device_open(struct net_device *dev) {
1096 netif_stop_queue(pDevice->dev); 1041 netif_stop_queue(pDevice->dev);
1097 pDevice->flags |= DEVICE_FLAGS_OPENED; 1042 pDevice->flags |= DEVICE_FLAGS_OPENED;
1098 1043
1099{ 1044 DBG_PRT(MSG_LEVEL_DEBUG, KERN_INFO "device_open success..\n");
1100 union iwreq_data wrqu; 1045 return 0;
1101 memset(&wrqu, 0, sizeof(wrqu));
1102 wrqu.data.flags = RT_UPDEV_EVENT_FLAG;
1103 wireless_send_event(pDevice->dev, IWEVCUSTOM, &wrqu, NULL);
1104}
1105
1106 DBG_PRT(MSG_LEVEL_DEBUG, KERN_INFO "device_open success.. \n");
1107 return 0;
1108 1046
1109free_all: 1047free_all:
1110 device_free_frag_bufs(pDevice); 1048 device_free_frag_bufs(pDevice);
@@ -1133,19 +1071,11 @@ static int device_close(struct net_device *dev) {
1133 if (pDevice == NULL) 1071 if (pDevice == NULL)
1134 return -ENODEV; 1072 return -ENODEV;
1135 1073
1136{
1137 union iwreq_data wrqu;
1138 memset(&wrqu, 0, sizeof(wrqu));
1139 wrqu.data.flags = RT_DOWNDEV_EVENT_FLAG;
1140 wireless_send_event(pDevice->dev, IWEVCUSTOM, &wrqu, NULL);
1141}
1142
1143 if (pDevice->bLinkPass) { 1074 if (pDevice->bLinkPass) {
1144 bScheduleCommand((void *) pDevice, WLAN_CMD_DISASSOCIATE, NULL); 1075 bScheduleCommand((void *) pDevice, WLAN_CMD_DISASSOCIATE, NULL);
1145 mdelay(30); 1076 mdelay(30);
1146 } 1077 }
1147 1078
1148device_release_WPADEV(pDevice);
1149 1079
1150 memset(pMgmt->abyDesireSSID, 0, WLAN_IEHDR_LEN + WLAN_SSID_MAXLEN + 1); 1080 memset(pMgmt->abyDesireSSID, 0, WLAN_IEHDR_LEN + WLAN_SSID_MAXLEN + 1);
1151 pMgmt->bShareKeyAlgorithm = FALSE; 1081 pMgmt->bShareKeyAlgorithm = FALSE;
@@ -1204,22 +1134,13 @@ device_release_WPADEV(pDevice);
1204 return 0; 1134 return 0;
1205} 1135}
1206 1136
1207static void __devexit vt6656_disconnect(struct usb_interface *intf) 1137static void vt6656_disconnect(struct usb_interface *intf)
1208{ 1138{
1209 PSDevice device = usb_get_intfdata(intf); 1139 PSDevice device = usb_get_intfdata(intf);
1210 1140
1211 if (!device) 1141 if (!device)
1212 return; 1142 return;
1213 1143
1214 {
1215 union iwreq_data req;
1216 memset(&req, 0, sizeof(req));
1217 req.data.flags = RT_RMMOD_EVENT_FLAG;
1218 wireless_send_event(device->dev, IWEVCUSTOM, &req, NULL);
1219 }
1220
1221 device_release_WPADEV(device);
1222 release_firmware(device->firmware);
1223 1144
1224 usb_set_intfdata(intf, NULL); 1145 usb_set_intfdata(intf, NULL);
1225 usb_put_dev(interface_to_usbdev(intf)); 1146 usb_put_dev(interface_to_usbdev(intf));
@@ -1228,9 +1149,9 @@ static void __devexit vt6656_disconnect(struct usb_interface *intf)
1228 1149
1229 if (device->dev) { 1150 if (device->dev) {
1230 unregister_netdev(device->dev); 1151 unregister_netdev(device->dev);
1231 wpa_set_wpadev(device, 0);
1232 free_netdev(device->dev); 1152 free_netdev(device->dev);
1233 } 1153 }
1154
1234} 1155}
1235 1156
1236static int device_dma0_tx_80211(struct sk_buff *skb, struct net_device *dev) 1157static int device_dma0_tx_80211(struct sk_buff *skb, struct net_device *dev)
@@ -1549,470 +1470,35 @@ static void device_set_multi(struct net_device *dev) {
1549 1470
1550} 1471}
1551 1472
1552 1473static struct net_device_stats *device_get_stats(struct net_device *dev)
1553static struct net_device_stats *device_get_stats(struct net_device *dev) { 1474{
1554 PSDevice pDevice=(PSDevice) netdev_priv(dev); 1475 PSDevice pDevice=(PSDevice) netdev_priv(dev);
1555 1476
1556 return &pDevice->stats; 1477 return &pDevice->stats;
1557} 1478}
1558 1479
1559 1480static int device_ioctl(struct net_device *dev, struct ifreq *rq, int cmd)
1560static int device_ioctl(struct net_device *dev, struct ifreq *rq, int cmd) { 1481{
1561 PSDevice pDevice = (PSDevice)netdev_priv(dev); 1482 PSDevice pDevice = (PSDevice)netdev_priv(dev);
1562 PSMgmtObject pMgmt = &(pDevice->sMgmtObj);
1563 PSCmdRequest pReq;
1564 //BOOL bCommit = FALSE;
1565 struct iwreq *wrq = (struct iwreq *) rq; 1483 struct iwreq *wrq = (struct iwreq *) rq;
1566 int rc =0; 1484 int rc = 0;
1567
1568 if (pMgmt == NULL) {
1569 rc = -EFAULT;
1570 return rc;
1571 }
1572
1573 switch(cmd) {
1574
1575 case SIOCGIWNAME:
1576 rc = iwctl_giwname(dev, NULL, (char *)&(wrq->u.name), NULL);
1577 break;
1578
1579 case SIOCSIWNWID:
1580 case SIOCGIWNWID: //0x8b03 support
1581 rc = -EOPNOTSUPP;
1582 break;
1583
1584 // Set frequency/channel
1585 case SIOCSIWFREQ:
1586 rc = iwctl_siwfreq(dev, NULL, &(wrq->u.freq), NULL);
1587 break;
1588
1589 // Get frequency/channel
1590 case SIOCGIWFREQ:
1591 rc = iwctl_giwfreq(dev, NULL, &(wrq->u.freq), NULL);
1592 break;
1593
1594 // Set desired network name (ESSID)
1595 case SIOCSIWESSID:
1596
1597 {
1598 char essid[IW_ESSID_MAX_SIZE+1];
1599 if (wrq->u.essid.length > IW_ESSID_MAX_SIZE) {
1600 rc = -E2BIG;
1601 break;
1602 }
1603 if (copy_from_user(essid, wrq->u.essid.pointer,
1604 wrq->u.essid.length)) {
1605 rc = -EFAULT;
1606 break;
1607 }
1608 rc = iwctl_siwessid(dev, NULL,
1609 &(wrq->u.essid), essid);
1610 }
1611 break;
1612
1613
1614 // Get current network name (ESSID)
1615 case SIOCGIWESSID:
1616
1617 {
1618 char essid[IW_ESSID_MAX_SIZE+1];
1619 if (wrq->u.essid.pointer) {
1620 iwctl_giwessid(dev, NULL,
1621 &(wrq->u.essid), essid);
1622 if (copy_to_user(wrq->u.essid.pointer,
1623 essid,
1624 wrq->u.essid.length) )
1625 rc = -EFAULT;
1626 }
1627 }
1628 break;
1629
1630 case SIOCSIWAP:
1631
1632 rc = iwctl_siwap(dev, NULL, &(wrq->u.ap_addr), NULL);
1633 break;
1634
1635
1636 // Get current Access Point (BSSID)
1637 case SIOCGIWAP:
1638 rc = iwctl_giwap(dev, NULL, &(wrq->u.ap_addr), NULL);
1639 break;
1640
1641
1642 // Set desired station name
1643 case SIOCSIWNICKN:
1644 DBG_PRT(MSG_LEVEL_DEBUG, KERN_INFO " SIOCSIWNICKN \n");
1645 rc = -EOPNOTSUPP;
1646 break;
1647
1648 // Get current station name
1649 case SIOCGIWNICKN:
1650 DBG_PRT(MSG_LEVEL_DEBUG, KERN_INFO " SIOCGIWNICKN \n");
1651 rc = -EOPNOTSUPP;
1652 break;
1653
1654 // Set the desired bit-rate
1655 case SIOCSIWRATE:
1656 rc = iwctl_siwrate(dev, NULL, &(wrq->u.bitrate), NULL);
1657 break;
1658
1659 // Get the current bit-rate
1660 case SIOCGIWRATE:
1661 iwctl_giwrate(dev, NULL, &(wrq->u.bitrate), NULL);
1662 break;
1663
1664 // Set the desired RTS threshold
1665 case SIOCSIWRTS:
1666
1667 rc = iwctl_siwrts(dev, &(wrq->u.rts));
1668 break;
1669
1670 // Get the current RTS threshold
1671 case SIOCGIWRTS:
1672
1673 rc = iwctl_giwrts(dev, NULL, &(wrq->u.rts), NULL);
1674 break;
1675
1676 // Set the desired fragmentation threshold
1677 case SIOCSIWFRAG:
1678
1679 rc = iwctl_siwfrag(dev, NULL, &(wrq->u.frag), NULL);
1680 break;
1681
1682 // Get the current fragmentation threshold
1683 case SIOCGIWFRAG:
1684
1685 rc = iwctl_giwfrag(dev, NULL, &(wrq->u.frag), NULL);
1686 break;
1687
1688 // Set mode of operation
1689 case SIOCSIWMODE:
1690 rc = iwctl_siwmode(dev, NULL, &(wrq->u.mode), NULL);
1691 break;
1692
1693 // Get mode of operation
1694 case SIOCGIWMODE:
1695 iwctl_giwmode(dev, NULL, &(wrq->u.mode), NULL);
1696 break;
1697
1698 // Set WEP keys and mode
1699 case SIOCSIWENCODE:
1700 {
1701 char abyKey[WLAN_WEP232_KEYLEN];
1702
1703 if (wrq->u.encoding.pointer) {
1704
1705
1706 if (wrq->u.encoding.length > WLAN_WEP232_KEYLEN) {
1707 rc = -E2BIG;
1708 break;
1709 }
1710 memset(abyKey, 0, WLAN_WEP232_KEYLEN);
1711 if (copy_from_user(abyKey,
1712 wrq->u.encoding.pointer,
1713 wrq->u.encoding.length)) {
1714 rc = -EFAULT;
1715 break;
1716 }
1717 } else if (wrq->u.encoding.length != 0) {
1718 rc = -EINVAL;
1719 break;
1720 }
1721 rc = iwctl_siwencode(dev, NULL, &(wrq->u.encoding), abyKey);
1722 }
1723 break;
1724
1725 // Get the WEP keys and mode
1726 case SIOCGIWENCODE:
1727
1728 if (!capable(CAP_NET_ADMIN)) {
1729 rc = -EPERM;
1730 break;
1731 }
1732 {
1733 char abyKey[WLAN_WEP232_KEYLEN];
1734
1735 rc = iwctl_giwencode(dev, NULL, &(wrq->u.encoding), abyKey);
1736 if (rc != 0) break;
1737 if (wrq->u.encoding.pointer) {
1738 if (copy_to_user(wrq->u.encoding.pointer,
1739 abyKey,
1740 wrq->u.encoding.length))
1741 rc = -EFAULT;
1742 }
1743 }
1744 break;
1745
1746 // Get the current Tx-Power
1747 case SIOCGIWTXPOW:
1748 DBG_PRT(MSG_LEVEL_DEBUG, KERN_INFO " SIOCGIWTXPOW \n");
1749 rc = -EOPNOTSUPP;
1750 break;
1751
1752 case SIOCSIWTXPOW:
1753 DBG_PRT(MSG_LEVEL_DEBUG, KERN_INFO " SIOCGIWTXPOW \n");
1754 rc = -EOPNOTSUPP;
1755 break;
1756
1757 case SIOCSIWRETRY:
1758
1759 rc = iwctl_siwretry(dev, NULL, &(wrq->u.retry), NULL);
1760 break;
1761
1762 case SIOCGIWRETRY:
1763
1764 rc = iwctl_giwretry(dev, NULL, &(wrq->u.retry), NULL);
1765 break;
1766
1767 // Get range of parameters
1768 case SIOCGIWRANGE:
1769
1770 {
1771 struct iw_range range;
1772
1773 iwctl_giwrange(dev, NULL, &(wrq->u.data), (char *) &range);
1774 if (copy_to_user(wrq->u.data.pointer, &range, sizeof(struct iw_range)))
1775 rc = -EFAULT;
1776 }
1777
1778 break;
1779
1780 case SIOCGIWPOWER:
1781
1782 rc = iwctl_giwpower(dev, NULL, &(wrq->u.power), NULL);
1783 break;
1784
1785
1786 case SIOCSIWPOWER:
1787
1788 rc = iwctl_siwpower(dev, NULL, &(wrq->u.power), NULL);
1789 break;
1790
1791
1792 case SIOCGIWSENS:
1793
1794 rc = iwctl_giwsens(dev, NULL, &(wrq->u.sens), NULL);
1795 break;
1796
1797 case SIOCSIWSENS:
1798 DBG_PRT(MSG_LEVEL_DEBUG, KERN_INFO " SIOCSIWSENS \n");
1799 rc = -EOPNOTSUPP;
1800 break;
1801
1802 case SIOCGIWAPLIST:
1803 {
1804 char buffer[IW_MAX_AP * (sizeof(struct sockaddr) + sizeof(struct iw_quality))];
1805
1806 if (wrq->u.data.pointer) {
1807 rc = iwctl_giwaplist(dev, NULL, &(wrq->u.data), buffer);
1808 if (rc == 0) {
1809 if (copy_to_user(wrq->u.data.pointer,
1810 buffer,
1811 (wrq->u.data.length * (sizeof(struct sockaddr) + sizeof(struct iw_quality)))
1812 ))
1813 rc = -EFAULT;
1814 }
1815 }
1816 }
1817 break;
1818
1819
1820#ifdef WIRELESS_SPY
1821 // Set the spy list
1822 case SIOCSIWSPY:
1823
1824 DBG_PRT(MSG_LEVEL_DEBUG, KERN_INFO " SIOCSIWSPY \n");
1825 rc = -EOPNOTSUPP;
1826 break;
1827
1828 // Get the spy list
1829 case SIOCGIWSPY:
1830
1831 DBG_PRT(MSG_LEVEL_DEBUG, KERN_INFO " SIOCSIWSPY \n");
1832 rc = -EOPNOTSUPP;
1833 break;
1834
1835#endif // WIRELESS_SPY
1836
1837 case SIOCGIWPRIV:
1838 DBG_PRT(MSG_LEVEL_DEBUG, KERN_INFO " SIOCGIWPRIV \n");
1839 rc = -EOPNOTSUPP;
1840/*
1841 if(wrq->u.data.pointer) {
1842 wrq->u.data.length = sizeof(iwctl_private_args) / sizeof( iwctl_private_args[0]);
1843
1844 if(copy_to_user(wrq->u.data.pointer,
1845 (u_char *) iwctl_private_args,
1846 sizeof(iwctl_private_args)))
1847 rc = -EFAULT;
1848 }
1849*/
1850 break;
1851
1852#ifdef WPA_SUPPLICANT_DRIVER_WEXT_SUPPORT
1853 case SIOCSIWAUTH:
1854 DBG_PRT(MSG_LEVEL_DEBUG, KERN_INFO " SIOCSIWAUTH\n");
1855 rc = iwctl_siwauth(dev, NULL, &(wrq->u.param), NULL);
1856 break;
1857
1858 case SIOCGIWAUTH:
1859 DBG_PRT(MSG_LEVEL_DEBUG, KERN_INFO " SIOCGIWAUTH \n");
1860 rc = iwctl_giwauth(dev, NULL, &(wrq->u.param), NULL);
1861 break;
1862
1863 case SIOCSIWGENIE:
1864 DBG_PRT(MSG_LEVEL_DEBUG, KERN_INFO " SIOCSIWGENIE \n");
1865 rc = iwctl_siwgenie(dev, NULL, &(wrq->u.data), wrq->u.data.pointer);
1866 break;
1867
1868 case SIOCGIWGENIE:
1869 DBG_PRT(MSG_LEVEL_DEBUG, KERN_INFO " SIOCGIWGENIE \n");
1870 rc = iwctl_giwgenie(dev, NULL, &(wrq->u.data), wrq->u.data.pointer);
1871 break;
1872
1873 case SIOCSIWENCODEEXT:
1874 {
1875 char extra[sizeof(struct iw_encode_ext)+MAX_KEY_LEN+1];
1876 DBG_PRT(MSG_LEVEL_DEBUG, KERN_INFO " SIOCSIWENCODEEXT \n");
1877 if(wrq->u.encoding.pointer){
1878 memset(extra, 0, sizeof(struct iw_encode_ext)+MAX_KEY_LEN+1);
1879 if(wrq->u.encoding.length > (sizeof(struct iw_encode_ext)+ MAX_KEY_LEN)){
1880 rc = -E2BIG;
1881 break;
1882 }
1883 if(copy_from_user(extra, wrq->u.encoding.pointer,wrq->u.encoding.length)){
1884 rc = -EFAULT;
1885 break;
1886 }
1887 }else if(wrq->u.encoding.length != 0){
1888 rc = -EINVAL;
1889 break;
1890 }
1891 rc = iwctl_siwencodeext(dev, NULL, &(wrq->u.encoding), extra);
1892 }
1893 break;
1894
1895 case SIOCGIWENCODEEXT:
1896 DBG_PRT(MSG_LEVEL_DEBUG, KERN_INFO " SIOCGIWENCODEEXT \n");
1897 rc = iwctl_giwencodeext(dev, NULL, &(wrq->u.encoding), NULL);
1898 break;
1899
1900 case SIOCSIWMLME:
1901 DBG_PRT(MSG_LEVEL_DEBUG, KERN_INFO " SIOCSIWMLME \n");
1902 rc = iwctl_siwmlme(dev, NULL, &(wrq->u.data), wrq->u.data.pointer);
1903 break;
1904
1905#endif // #ifdef WPA_SUPPLICANT_DRIVER_WEXT_SUPPORT
1906
1907 case IOCTL_CMD_TEST:
1908
1909 if (!(pDevice->flags & DEVICE_FLAGS_OPENED)) {
1910 rc = -EFAULT;
1911 break;
1912 } else {
1913 rc = 0;
1914 }
1915 pReq = (PSCmdRequest)rq;
1916
1917 //20080130-01,<Remark> by Mike Liu
1918 // if(pDevice->bLinkPass==TRUE)
1919 pReq->wResult = MAGIC_CODE; //Linking status:0x3142
1920 //20080130-02,<Remark> by Mike Liu
1921 // else
1922 // pReq->wResult = MAGIC_CODE+1; //disconnect status:0x3143
1923 break;
1924
1925 case IOCTL_CMD_SET:
1926 if (!(pDevice->flags & DEVICE_FLAGS_OPENED) &&
1927 (((PSCmdRequest)rq)->wCmdCode !=WLAN_CMD_SET_WPA))
1928 {
1929 rc = -EFAULT;
1930 break;
1931 } else {
1932 rc = 0;
1933 }
1934 1485
1935 if (test_and_set_bit( 0, (void*)&(pMgmt->uCmdBusy))) { 1486 switch (cmd) {
1936 return -EBUSY;
1937 }
1938 rc = private_ioctl(pDevice, rq);
1939 clear_bit( 0, (void*)&(pMgmt->uCmdBusy));
1940 break;
1941 1487
1942 case IOCTL_CMD_HOSTAPD: 1488 case IOCTL_CMD_HOSTAPD:
1943 1489
1944 if (!(pDevice->flags & DEVICE_FLAGS_OPENED)) { 1490 if (!(pDevice->flags & DEVICE_FLAGS_OPENED))
1945 rc = -EFAULT; 1491 rc = -EFAULT;
1946 break;
1947 } else {
1948 rc = 0;
1949 }
1950 1492
1951 rc = vt6656_hostap_ioctl(pDevice, &wrq->u.data); 1493 rc = vt6656_hostap_ioctl(pDevice, &wrq->u.data);
1952 break; 1494 break;
1953
1954 case IOCTL_CMD_WPA:
1955
1956 if (!(pDevice->flags & DEVICE_FLAGS_OPENED)) {
1957 rc = -EFAULT;
1958 break;
1959 } else {
1960 rc = 0;
1961 }
1962
1963 rc = wpa_ioctl(pDevice, &wrq->u.data);
1964 break;
1965 1495
1966 case SIOCETHTOOL: 1496 case SIOCETHTOOL:
1967 return ethtool_ioctl(dev, (void *) rq->ifr_data); 1497 return ethtool_ioctl(dev, (void *) rq->ifr_data);
1968 // All other calls are currently unsupported
1969
1970 default:
1971 rc = -EOPNOTSUPP;
1972 DBG_PRT(MSG_LEVEL_DEBUG, KERN_INFO "Ioctl command not supported..%x\n", cmd);
1973
1974
1975 }
1976
1977 if (pDevice->bCommit) {
1978 if (pMgmt->eConfigMode == WMAC_CONFIG_AP) {
1979 netif_stop_queue(pDevice->dev);
1980 spin_lock_irq(&pDevice->lock);
1981 bScheduleCommand((void *) pDevice, WLAN_CMD_RUN_AP, NULL);
1982 spin_unlock_irq(&pDevice->lock);
1983 }
1984 else {
1985 DBG_PRT(MSG_LEVEL_DEBUG, KERN_INFO "Commit the settings\n");
1986 spin_lock_irq(&pDevice->lock);
1987//2007-1121-01<Modify>by EinsnLiu
1988 if (pDevice->bLinkPass &&
1989 memcmp(pMgmt->abyCurrSSID,pMgmt->abyDesireSSID,WLAN_IEHDR_LEN + WLAN_SSID_MAXLEN)) {
1990 bScheduleCommand((void *) pDevice, WLAN_CMD_DISASSOCIATE, NULL);
1991 } else {
1992 pDevice->bLinkPass = FALSE;
1993 pMgmt->eCurrState = WMAC_STATE_IDLE;
1994 memset(pMgmt->abyCurrBSSID, 0, 6);
1995 }
1996 ControlvMaskByte(pDevice,MESSAGE_REQUEST_MACREG,MAC_REG_PAPEDELAY,LEDSTS_STS,LEDSTS_SLOW);
1997//End Modify
1998 netif_stop_queue(pDevice->dev);
1999#ifdef WPA_SUPPLICANT_DRIVER_WEXT_SUPPORT
2000 pMgmt->eScanType = WMAC_SCAN_ACTIVE;
2001 if (!pDevice->bWPASuppWextEnabled)
2002#endif
2003 bScheduleCommand((void *) pDevice,
2004 WLAN_CMD_BSSID_SCAN,
2005 pMgmt->abyDesireSSID);
2006 bScheduleCommand((void *) pDevice,
2007 WLAN_CMD_SSID,
2008 NULL);
2009 spin_unlock_irq(&pDevice->lock);
2010 }
2011 pDevice->bCommit = FALSE;
2012 }
2013 1498
1499 }
2014 1500
2015 return rc; 1501 return rc;
2016} 1502}
2017 1503
2018 1504
diff --git a/drivers/staging/vt6656/mib.c b/drivers/staging/vt6656/mib.c
index 8a6ee72f4409..d4c7b0cc7ecd 100644
--- a/drivers/staging/vt6656/mib.c
+++ b/drivers/staging/vt6656/mib.c
@@ -37,7 +37,6 @@
37 * 37 *
38 */ 38 */
39 39
40#include "upc.h"
41#include "mac.h" 40#include "mac.h"
42#include "tether.h" 41#include "tether.h"
43#include "mib.h" 42#include "mib.h"
diff --git a/drivers/staging/vt6656/mib.h b/drivers/staging/vt6656/mib.h
index 82d69a9cc209..85c28e923663 100644
--- a/drivers/staging/vt6656/mib.h
+++ b/drivers/staging/vt6656/mib.h
@@ -68,7 +68,6 @@ typedef struct tagSDot11Counters {
68 unsigned long long TKIPLocalMICFailures; 68 unsigned long long TKIPLocalMICFailures;
69 unsigned long long TKIPRemoteMICFailures; 69 unsigned long long TKIPRemoteMICFailures;
70 unsigned long long TKIPICVErrors; 70 unsigned long long TKIPICVErrors;
71 unsigned long long TKIPCounterMeasuresInvoked;
72 unsigned long long TKIPReplays; 71 unsigned long long TKIPReplays;
73 unsigned long long CCMPFormatErrors; 72 unsigned long long CCMPFormatErrors;
74 unsigned long long CCMPReplays; 73 unsigned long long CCMPReplays;
diff --git a/drivers/staging/vt6656/rf.c b/drivers/staging/vt6656/rf.c
index 593cdc713b0e..74c0598e37b7 100644
--- a/drivers/staging/vt6656/rf.c
+++ b/drivers/staging/vt6656/rf.c
@@ -769,6 +769,9 @@ BYTE byPwr = pDevice->byCCKPwr;
769 return TRUE; 769 return TRUE;
770 } 770 }
771 771
772 if (uCH == 0)
773 return -EINVAL;
774
772 switch (uRATE) { 775 switch (uRATE) {
773 case RATE_1M: 776 case RATE_1M:
774 case RATE_2M: 777 case RATE_2M:
diff --git a/drivers/staging/vt6656/rxtx.c b/drivers/staging/vt6656/rxtx.c
index 339083879883..83c04e120935 100644
--- a/drivers/staging/vt6656/rxtx.c
+++ b/drivers/staging/vt6656/rxtx.c
@@ -355,7 +355,7 @@ s_vFillTxKey (
355 } 355 }
356 // Append IV after Mac Header 356 // Append IV after Mac Header
357 *pdwIV &= WEP_IV_MASK;//00000000 11111111 11111111 11111111 357 *pdwIV &= WEP_IV_MASK;//00000000 11111111 11111111 11111111
358 *pdwIV |= (pDevice->byKeyIndex << 30); 358 *pdwIV |= (u32)pDevice->byKeyIndex << 30;
359 *pdwIV = cpu_to_le32(*pdwIV); 359 *pdwIV = cpu_to_le32(*pdwIV);
360 pDevice->dwIVCounter++; 360 pDevice->dwIVCounter++;
361 if (pDevice->dwIVCounter > WEP_IV_MASK) { 361 if (pDevice->dwIVCounter > WEP_IV_MASK) {
@@ -375,7 +375,8 @@ s_vFillTxKey (
375 *(pbyIVHead+3) = (BYTE)(((pDevice->byKeyIndex << 6) & 0xc0) | 0x20); // 0x20 is ExtIV 375 *(pbyIVHead+3) = (BYTE)(((pDevice->byKeyIndex << 6) & 0xc0) | 0x20); // 0x20 is ExtIV
376 // Append IV&ExtIV after Mac Header 376 // Append IV&ExtIV after Mac Header
377 *pdwExtIV = cpu_to_le32(pTransmitKey->dwTSC47_16); 377 *pdwExtIV = cpu_to_le32(pTransmitKey->dwTSC47_16);
378 DBG_PRT(MSG_LEVEL_DEBUG, KERN_INFO"vFillTxKey()---- pdwExtIV: %lx\n", *pdwExtIV); 378 DBG_PRT(MSG_LEVEL_DEBUG, KERN_INFO"vFillTxKey()---- pdwExtIV: %x\n",
379 *pdwExtIV);
379 380
380 } else if (pTransmitKey->byCipherSuite == KEY_CTL_CCMP) { 381 } else if (pTransmitKey->byCipherSuite == KEY_CTL_CCMP) {
381 pTransmitKey->wTSC15_0++; 382 pTransmitKey->wTSC15_0++;
@@ -1452,12 +1453,10 @@ s_bPacketToWirelessUsb(
1452 1453
1453 1454
1454 pvRrvTime = pMICHDR = pvRTS = pvCTS = pvTxDataHd = NULL; 1455 pvRrvTime = pMICHDR = pvRTS = pvCTS = pvTxDataHd = NULL;
1455 if ((bNeedEncryption) && (pTransmitKey != NULL)) { 1456 if (bNeedEncryption && pTransmitKey->pvKeyTable) {
1456 if (((PSKeyTable) (pTransmitKey->pvKeyTable))->bSoftWEP == TRUE) { 1457 if (((PSKeyTable)&pTransmitKey->pvKeyTable)->bSoftWEP == TRUE)
1457 // WEP 256 1458 bSoftWEP = TRUE; /* WEP 256 */
1458 bSoftWEP = TRUE; 1459 }
1459 }
1460 }
1461 1460
1462 pTxBufHead = (PTX_BUFFER) usbPacketBuf; 1461 pTxBufHead = (PTX_BUFFER) usbPacketBuf;
1463 memset(pTxBufHead, 0, sizeof(TX_BUFFER)); 1462 memset(pTxBufHead, 0, sizeof(TX_BUFFER));
@@ -1751,7 +1750,8 @@ s_bPacketToWirelessUsb(
1751 MIC_vAppend((PBYTE)&(psEthHeader->abyDstAddr[0]), 12); 1750 MIC_vAppend((PBYTE)&(psEthHeader->abyDstAddr[0]), 12);
1752 dwMIC_Priority = 0; 1751 dwMIC_Priority = 0;
1753 MIC_vAppend((PBYTE)&dwMIC_Priority, 4); 1752 MIC_vAppend((PBYTE)&dwMIC_Priority, 4);
1754 DBG_PRT(MSG_LEVEL_DEBUG, KERN_INFO"MIC KEY: %lX, %lX\n", dwMICKey0, dwMICKey1); 1753 DBG_PRT(MSG_LEVEL_DEBUG, KERN_INFO"MIC KEY: %X, %X\n",
1754 dwMICKey0, dwMICKey1);
1755 1755
1756 /////////////////////////////////////////////////////////////////// 1756 ///////////////////////////////////////////////////////////////////
1757 1757
@@ -2633,7 +2633,8 @@ vDMA0_tx_80211(PSDevice pDevice, struct sk_buff *skb) {
2633 MIC_vAppend((PBYTE)&(sEthHeader.abyDstAddr[0]), 12); 2633 MIC_vAppend((PBYTE)&(sEthHeader.abyDstAddr[0]), 12);
2634 dwMIC_Priority = 0; 2634 dwMIC_Priority = 0;
2635 MIC_vAppend((PBYTE)&dwMIC_Priority, 4); 2635 MIC_vAppend((PBYTE)&dwMIC_Priority, 4);
2636 DBG_PRT(MSG_LEVEL_DEBUG, KERN_INFO"DMA0_tx_8021:MIC KEY: %lX, %lX\n", dwMICKey0, dwMICKey1); 2636 DBG_PRT(MSG_LEVEL_DEBUG, KERN_INFO"DMA0_tx_8021:MIC KEY:"\
2637 " %X, %X\n", dwMICKey0, dwMICKey1);
2637 2638
2638 uLength = cbHeaderSize + cbMacHdLen + uPadding + cbIVlen; 2639 uLength = cbHeaderSize + cbMacHdLen + uPadding + cbIVlen;
2639 2640
@@ -2653,7 +2654,8 @@ vDMA0_tx_80211(PSDevice pDevice, struct sk_buff *skb) {
2653 2654
2654 DBG_PRT(MSG_LEVEL_DEBUG, KERN_INFO"uLength: %d, %d\n", uLength, cbFrameBodySize); 2655 DBG_PRT(MSG_LEVEL_DEBUG, KERN_INFO"uLength: %d, %d\n", uLength, cbFrameBodySize);
2655 DBG_PRT(MSG_LEVEL_DEBUG, KERN_INFO"cbReqCount:%d, %d, %d, %d\n", cbReqCount, cbHeaderSize, uPadding, cbIVlen); 2656 DBG_PRT(MSG_LEVEL_DEBUG, KERN_INFO"cbReqCount:%d, %d, %d, %d\n", cbReqCount, cbHeaderSize, uPadding, cbIVlen);
2656 DBG_PRT(MSG_LEVEL_DEBUG, KERN_INFO"MIC:%lx, %lx\n", *pdwMIC_L, *pdwMIC_R); 2657 DBG_PRT(MSG_LEVEL_DEBUG, KERN_INFO"MIC:%x, %x\n",
2658 *pdwMIC_L, *pdwMIC_R);
2657 2659
2658 } 2660 }
2659 2661
@@ -3027,21 +3029,18 @@ int nsDMA_tx_packet(PSDevice pDevice, unsigned int uDMAIdx, struct sk_buff *skb)
3027 DBG_PRT(MSG_LEVEL_DEBUG, KERN_INFO"error: KEY is GTK!!~~\n"); 3029 DBG_PRT(MSG_LEVEL_DEBUG, KERN_INFO"error: KEY is GTK!!~~\n");
3028 } 3030 }
3029 else { 3031 else {
3030 DBG_PRT(MSG_LEVEL_DEBUG, KERN_INFO"Find PTK [%lX]\n", pTransmitKey->dwKeyIndex); 3032 DBG_PRT(MSG_LEVEL_DEBUG, KERN_INFO"Find PTK [%X]\n",
3033 pTransmitKey->dwKeyIndex);
3031 bNeedEncryption = TRUE; 3034 bNeedEncryption = TRUE;
3032 } 3035 }
3033 } 3036 }
3034 } 3037 }
3035 3038
3036 if (pDevice->byCntMeasure == 2) {
3037 bNeedDeAuth = TRUE;
3038 pDevice->s802_11Counter.TKIPCounterMeasuresInvoked++;
3039 }
3040
3041 if (pDevice->bEnableHostWEP) { 3039 if (pDevice->bEnableHostWEP) {
3042 if ((uNodeIndex != 0) && 3040 if ((uNodeIndex != 0) &&
3043 (pMgmt->sNodeDBTable[uNodeIndex].dwKeyIndex & PAIRWISE_KEY)) { 3041 (pMgmt->sNodeDBTable[uNodeIndex].dwKeyIndex & PAIRWISE_KEY)) {
3044 DBG_PRT(MSG_LEVEL_DEBUG, KERN_INFO"Find PTK [%lX]\n", pTransmitKey->dwKeyIndex); 3042 DBG_PRT(MSG_LEVEL_DEBUG, KERN_INFO"Find PTK [%X]\n",
3043 pTransmitKey->dwKeyIndex);
3045 bNeedEncryption = TRUE; 3044 bNeedEncryption = TRUE;
3046 } 3045 }
3047 } 3046 }
@@ -3050,6 +3049,7 @@ int nsDMA_tx_packet(PSDevice pDevice, unsigned int uDMAIdx, struct sk_buff *skb)
3050 3049
3051 if (pTransmitKey == NULL) { 3050 if (pTransmitKey == NULL) {
3052 DBG_PRT(MSG_LEVEL_DEBUG, KERN_INFO"return no tx key\n"); 3051 DBG_PRT(MSG_LEVEL_DEBUG, KERN_INFO"return no tx key\n");
3052 pContext->bBoolInUse = FALSE;
3053 dev_kfree_skb_irq(skb); 3053 dev_kfree_skb_irq(skb);
3054 pStats->tx_dropped++; 3054 pStats->tx_dropped++;
3055 return STATUS_FAILURE; 3055 return STATUS_FAILURE;
diff --git a/drivers/staging/vt6656/rxtx.h b/drivers/staging/vt6656/rxtx.h
index f99acf1d8eb9..dd2198acc636 100644
--- a/drivers/staging/vt6656/rxtx.h
+++ b/drivers/staging/vt6656/rxtx.h
@@ -61,9 +61,9 @@ typedef struct tagSCTSDataF {
61// MICHDR data header 61// MICHDR data header
62// 62//
63typedef struct tagSMICHDR { 63typedef struct tagSMICHDR {
64 DWORD adwHDR0[4]; 64 u32 adwHDR0[4];
65 DWORD adwHDR1[4]; 65 u32 adwHDR1[4];
66 DWORD adwHDR2[4]; 66 u32 adwHDR2[4];
67} SMICHDR, *PSMICHDR; 67} SMICHDR, *PSMICHDR;
68 68
69 69
@@ -630,7 +630,7 @@ typedef struct tagSTX_BUFFER
630 BYTE byPKTNO; 630 BYTE byPKTNO;
631 WORD wTxByteCount; 631 WORD wTxByteCount;
632 632
633 DWORD adwTxKey[4]; 633 u32 adwTxKey[4];
634 WORD wFIFOCtl; 634 WORD wFIFOCtl;
635 WORD wTimeStamp; 635 WORD wTimeStamp;
636 WORD wFragCtl; 636 WORD wFragCtl;
diff --git a/drivers/staging/vt6656/tkip.c b/drivers/staging/vt6656/tkip.c
index 003123e550f6..282c08d65761 100644
--- a/drivers/staging/vt6656/tkip.c
+++ b/drivers/staging/vt6656/tkip.c
@@ -189,27 +189,25 @@ void TKIPvMixKey(
189 PBYTE pbyRC4Key 189 PBYTE pbyRC4Key
190 ) 190 )
191{ 191{
192 unsigned int p1k[5]; 192 u32 p1k[5];
193// unsigned int ttak0, ttak1, ttak2, ttak3, ttak4; 193 u32 tsc0, tsc1, tsc2;
194 unsigned int tsc0, tsc1, tsc2; 194 u32 ppk0, ppk1, ppk2, ppk3, ppk4, ppk5;
195 unsigned int ppk0, ppk1, ppk2, ppk3, ppk4, ppk5; 195 u32 pnl, pnh;
196 unsigned long int pnl,pnh; 196 int i, j;
197 197
198 int i, j; 198 pnl = (u32)wTSC15_0;
199 199 pnh = (u32)(dwTSC47_16 & 0xffffffff);
200 pnl = wTSC15_0; 200
201 pnh = dwTSC47_16; 201 tsc0 = (u32)((pnh >> 16) % 65536); /* msb */
202 202 tsc1 = (u32)(pnh % 65536);
203 tsc0 = (unsigned int)((pnh >> 16) % 65536); /* msb */ 203 tsc2 = (u32)(pnl % 65536); /* lsb */
204 tsc1 = (unsigned int)(pnh % 65536); 204
205 tsc2 = (unsigned int)(pnl % 65536); /* lsb */ 205 /* Phase 1, step 1 */
206 206 p1k[0] = tsc1;
207 /* Phase 1, step 1 */ 207 p1k[1] = tsc0;
208 p1k[0] = tsc1; 208 p1k[2] = (u32)(pbyTA[0] + (pbyTA[1]*256));
209 p1k[1] = tsc0; 209 p1k[3] = (u32)(pbyTA[2] + (pbyTA[3]*256));
210 p1k[2] = (unsigned int)(pbyTA[0] + (pbyTA[1]*256)); 210 p1k[4] = (u32)(pbyTA[4] + (pbyTA[5]*256));
211 p1k[3] = (unsigned int)(pbyTA[2] + (pbyTA[3]*256));
212 p1k[4] = (unsigned int)(pbyTA[4] + (pbyTA[5]*256));
213 211
214 /* Phase 1, step 2 */ 212 /* Phase 1, step 2 */
215 for (i=0; i<8; i++) { 213 for (i=0; i<8; i++) {
diff --git a/drivers/staging/vt6656/ttype.h b/drivers/staging/vt6656/ttype.h
index 8e9450ef3997..dfbf74713a80 100644
--- a/drivers/staging/vt6656/ttype.h
+++ b/drivers/staging/vt6656/ttype.h
@@ -29,6 +29,8 @@
29#ifndef __TTYPE_H__ 29#ifndef __TTYPE_H__
30#define __TTYPE_H__ 30#define __TTYPE_H__
31 31
32#include <linux/types.h>
33
32/******* Common definitions and typedefs ***********************************/ 34/******* Common definitions and typedefs ***********************************/
33 35
34typedef int BOOL; 36typedef int BOOL;
@@ -42,17 +44,17 @@ typedef int BOOL;
42 44
43/****** Simple typedefs ***************************************************/ 45/****** Simple typedefs ***************************************************/
44 46
45typedef unsigned char BYTE; // 8-bit 47typedef u8 BYTE;
46typedef unsigned short WORD; // 16-bit 48typedef u16 WORD;
47typedef unsigned long DWORD; // 32-bit 49typedef u32 DWORD;
48 50
49// QWORD is for those situation that we want 51// QWORD is for those situation that we want
50// an 8-byte-aligned 8 byte long structure 52// an 8-byte-aligned 8 byte long structure
51// which is NOT really a floating point number. 53// which is NOT really a floating point number.
52typedef union tagUQuadWord { 54typedef union tagUQuadWord {
53 struct { 55 struct {
54 DWORD dwLowDword; 56 u32 dwLowDword;
55 DWORD dwHighDword; 57 u32 dwHighDword;
56 } u; 58 } u;
57 double DoNotUseThisField; 59 double DoNotUseThisField;
58} UQuadWord; 60} UQuadWord;
@@ -60,8 +62,8 @@ typedef UQuadWord QWORD; // 64-bit
60 62
61/****** Common pointer types ***********************************************/ 63/****** Common pointer types ***********************************************/
62 64
63typedef unsigned long ULONG_PTR; // 32-bit 65typedef u32 ULONG_PTR;
64typedef unsigned long DWORD_PTR; // 32-bit 66typedef u32 DWORD_PTR;
65 67
66// boolean pointer 68// boolean pointer
67 69
diff --git a/drivers/staging/vt6656/upc.h b/drivers/staging/vt6656/upc.h
deleted file mode 100644
index b33aba4b12c9..000000000000
--- a/drivers/staging/vt6656/upc.h
+++ /dev/null
@@ -1,162 +0,0 @@
1/*
2 * Copyright (c) 1996, 2003 VIA Networking Technologies, Inc.
3 * All rights reserved.
4 *
5 * This program is free software; you can redistribute it and/or modify
6 * it under the terms of the GNU General Public License as published by
7 * the Free Software Foundation; either version 2 of the License, or
8 * (at your option) any later version.
9 *
10 * This program is distributed in the hope that it will be useful,
11 * but WITHOUT ANY WARRANTY; without even the implied warranty of
12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 * GNU General Public License for more details.
14 *
15 * You should have received a copy of the GNU General Public License along
16 * with this program; if not, write to the Free Software Foundation, Inc.,
17 * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
18 *
19 * File: upc.h
20 *
21 * Purpose: Macros to access device
22 *
23 * Author: Tevin Chen
24 *
25 * Date: Mar 17, 1997
26 *
27 */
28
29#ifndef __UPC_H__
30#define __UPC_H__
31
32#include "device.h"
33#include "ttype.h"
34
35/*--------------------- Export Definitions -------------------------*/
36
37
38//
39// For IO mapped
40//
41
42#ifdef IO_MAP
43
44#define VNSvInPortB(dwIOAddress, pbyData) { \
45 *(pbyData) = inb(dwIOAddress); \
46}
47
48
49#define VNSvInPortW(dwIOAddress, pwData) { \
50 *(pwData) = inw(dwIOAddress); \
51}
52
53#define VNSvInPortD(dwIOAddress, pdwData) { \
54 *(pdwData) = inl(dwIOAddress); \
55}
56
57
58#define VNSvOutPortB(dwIOAddress, byData) { \
59 outb(byData, dwIOAddress); \
60}
61
62
63#define VNSvOutPortW(dwIOAddress, wData) { \
64 outw(wData, dwIOAddress); \
65}
66
67#define VNSvOutPortD(dwIOAddress, dwData) { \
68 outl(dwData, dwIOAddress); \
69}
70
71#else
72
73//
74// For memory mapped IO
75//
76
77
78#define VNSvInPortB(dwIOAddress, pbyData) { \
79 volatile BYTE* pbyAddr = ((PBYTE)(dwIOAddress)); \
80 *(pbyData) = readb(pbyAddr); \
81}
82
83
84#define VNSvInPortW(dwIOAddress, pwData) { \
85 volatile WORD* pwAddr = ((PWORD)(dwIOAddress)); \
86 *(pwData) = readw(pwAddr); \
87}
88
89#define VNSvInPortD(dwIOAddress, pdwData) { \
90 volatile DWORD* pdwAddr = ((PDWORD)(dwIOAddress)); \
91 *(pdwData) = readl(pdwAddr); \
92}
93
94
95#define VNSvOutPortB(dwIOAddress, byData) { \
96 volatile BYTE* pbyAddr = ((PBYTE)(dwIOAddress)); \
97 writeb((BYTE)byData, pbyAddr); \
98}
99
100
101#define VNSvOutPortW(dwIOAddress, wData) { \
102 volatile WORD* pwAddr = ((PWORD)(dwIOAddress)); \
103 writew((WORD)wData, pwAddr); \
104}
105
106#define VNSvOutPortD(dwIOAddress, dwData) { \
107 volatile DWORD* pdwAddr = ((PDWORD)(dwIOAddress)); \
108 writel((DWORD)dwData, pdwAddr); \
109}
110
111#endif
112
113
114//
115// ALWAYS IO-Mapped IO when in 16-bit/32-bit environment
116//
117#define PCBvInPortB(dwIOAddress, pbyData) { \
118 *(pbyData) = inb(dwIOAddress); \
119}
120
121#define PCBvInPortW(dwIOAddress, pwData) { \
122 *(pwData) = inw(dwIOAddress); \
123}
124
125#define PCBvInPortD(dwIOAddress, pdwData) { \
126 *(pdwData) = inl(dwIOAddress); \
127}
128
129#define PCBvOutPortB(dwIOAddress, byData) { \
130 outb(byData, dwIOAddress); \
131}
132
133#define PCBvOutPortW(dwIOAddress, wData) { \
134 outw(wData, dwIOAddress); \
135}
136
137#define PCBvOutPortD(dwIOAddress, dwData) { \
138 outl(dwData, dwIOAddress); \
139}
140
141
142#define PCAvDelayByIO(uDelayUnit) { \
143 BYTE byData; \
144 unsigned long ii; \
145 \
146 if (uDelayUnit <= 50) { \
147 udelay(uDelayUnit); \
148 } \
149 else { \
150 for (ii = 0; ii < (uDelayUnit); ii++) \
151 byData = inb(0x61); \
152 } \
153}
154
155
156/*--------------------- Export Classes ----------------------------*/
157
158/*--------------------- Export Variables --------------------------*/
159
160/*--------------------- Export Functions --------------------------*/
161
162#endif /* __UPC_H__ */
diff --git a/drivers/staging/vt6656/usbpipe.c b/drivers/staging/vt6656/usbpipe.c
index 609e8fa10b98..fc68518526e0 100644
--- a/drivers/staging/vt6656/usbpipe.c
+++ b/drivers/staging/vt6656/usbpipe.c
@@ -575,7 +575,8 @@ s_nsBulkInUsbIoCompleteRead(
575// MP_SET_FLAG(pDevice, fMP_DISCONNECTED); 575// MP_SET_FLAG(pDevice, fMP_DISCONNECTED);
576// } 576// }
577 } else { 577 } else {
578 bIndicateReceive = TRUE; 578 if (bytesRead)
579 bIndicateReceive = TRUE;
579 pDevice->ulBulkInContCRCError = 0; 580 pDevice->ulBulkInContCRCError = 0;
580 pDevice->ulBulkInBytesRead += bytesRead; 581 pDevice->ulBulkInBytesRead += bytesRead;
581 582
@@ -660,6 +661,7 @@ PIPEnsSendBulkOut(
660 if (status != 0) 661 if (status != 0)
661 { 662 {
662 DBG_PRT(MSG_LEVEL_DEBUG, KERN_INFO"Submit Tx URB failed %d\n", status); 663 DBG_PRT(MSG_LEVEL_DEBUG, KERN_INFO"Submit Tx URB failed %d\n", status);
664 pContext->bBoolInUse = FALSE;
663 return STATUS_FAILURE; 665 return STATUS_FAILURE;
664 } 666 }
665 return STATUS_PENDING; 667 return STATUS_PENDING;
diff --git a/drivers/staging/vt6656/wcmd.c b/drivers/staging/vt6656/wcmd.c
index 586fbe1627f7..22f6b41cfd19 100644
--- a/drivers/staging/vt6656/wcmd.c
+++ b/drivers/staging/vt6656/wcmd.c
@@ -316,17 +316,19 @@ s_MgrMakeProbeRequest(
316 return pTxPacket; 316 return pTxPacket;
317} 317}
318 318
319void vCommandTimerWait(void *hDeviceContext, unsigned int MSecond) 319void vCommandTimerWait(void *hDeviceContext, unsigned long MSecond)
320{ 320{
321 PSDevice pDevice = (PSDevice)hDeviceContext; 321 PSDevice pDevice = (PSDevice)hDeviceContext;
322 322
323 init_timer(&pDevice->sTimerCommand); 323 init_timer(&pDevice->sTimerCommand);
324 pDevice->sTimerCommand.data = (unsigned long)pDevice; 324
325 pDevice->sTimerCommand.function = (TimerFunction)vRunCommand; 325 pDevice->sTimerCommand.data = (unsigned long)pDevice;
326 // RUN_AT :1 msec ~= (HZ/1024) 326 pDevice->sTimerCommand.function = (TimerFunction)vRunCommand;
327 pDevice->sTimerCommand.expires = (unsigned int)RUN_AT((MSecond * HZ) >> 10); 327 pDevice->sTimerCommand.expires = RUN_AT((MSecond * HZ) / 1000);
328 add_timer(&pDevice->sTimerCommand); 328
329 return; 329 add_timer(&pDevice->sTimerCommand);
330
331 return;
330} 332}
331 333
332void vRunCommand(void *hDeviceContext) 334void vRunCommand(void *hDeviceContext)
@@ -340,6 +342,7 @@ void vRunCommand(void *hDeviceContext)
340 BYTE byMask[8] = {1, 2, 4, 8, 0x10, 0x20, 0x40, 0x80}; 342 BYTE byMask[8] = {1, 2, 4, 8, 0x10, 0x20, 0x40, 0x80};
341 struct sk_buff *skb; 343 struct sk_buff *skb;
342 BYTE byData; 344 BYTE byData;
345 union iwreq_data wrqu;
343 346
344 347
345 if (pDevice->dwDiagRefCount != 0) 348 if (pDevice->dwDiagRefCount != 0)
@@ -501,16 +504,11 @@ void vRunCommand(void *hDeviceContext)
501 pMgmt->eScanState = WMAC_NO_SCANNING; 504 pMgmt->eScanState = WMAC_NO_SCANNING;
502 pDevice->bStopDataPkt = FALSE; 505 pDevice->bStopDataPkt = FALSE;
503 506
504#ifdef WPA_SUPPLICANT_DRIVER_WEXT_SUPPORT 507 /*send scan event to wpa_Supplicant*/
505 if(pMgmt->eScanType == WMAC_SCAN_PASSIVE) 508 PRINT_K("wireless_send_event--->SIOCGIWSCAN(scan done)\n");
506 { 509 memset(&wrqu, 0, sizeof(wrqu));
507 //send scan event to wpa_Supplicant 510 wireless_send_event(pDevice->dev, SIOCGIWSCAN, &wrqu, NULL);
508 union iwreq_data wrqu; 511
509 PRINT_K("wireless_send_event--->SIOCGIWSCAN(scan done)\n");
510 memset(&wrqu, 0, sizeof(wrqu));
511 wireless_send_event(pDevice->dev, SIOCGIWSCAN, &wrqu, NULL);
512 }
513#endif
514 s_bCommandComplete(pDevice); 512 s_bCommandComplete(pDevice);
515 break; 513 break;
516 514
@@ -523,13 +521,11 @@ void vRunCommand(void *hDeviceContext)
523 return; 521 return;
524 } else { 522 } else {
525 523
526 #ifdef WPA_SUPPLICANT_DRIVER_WEXT_SUPPORT
527 pDevice->bwextstep0 = FALSE; 524 pDevice->bwextstep0 = FALSE;
528 pDevice->bwextstep1 = FALSE; 525 pDevice->bwextstep1 = FALSE;
529 pDevice->bwextstep2 = FALSE; 526 pDevice->bwextstep2 = FALSE;
530 pDevice->bwextstep3 = FALSE; 527 pDevice->bwextstep3 = FALSE;
531 pDevice->bWPASuppWextEnabled = FALSE; 528 pDevice->bWPASuppWextEnabled = FALSE;
532 #endif
533 pDevice->fWPA_Authened = FALSE; 529 pDevice->fWPA_Authened = FALSE;
534 530
535 DBG_PRT(MSG_LEVEL_DEBUG, KERN_INFO"Send Disassociation Packet..\n"); 531 DBG_PRT(MSG_LEVEL_DEBUG, KERN_INFO"Send Disassociation Packet..\n");
@@ -672,7 +668,6 @@ void vRunCommand(void *hDeviceContext)
672 } 668 }
673 else { 669 else {
674 DBG_PRT(MSG_LEVEL_DEBUG, KERN_INFO "Disconnect SSID none\n"); 670 DBG_PRT(MSG_LEVEL_DEBUG, KERN_INFO "Disconnect SSID none\n");
675 #ifdef WPA_SUPPLICANT_DRIVER_WEXT_SUPPORT
676 // if(pDevice->bWPASuppWextEnabled == TRUE) 671 // if(pDevice->bWPASuppWextEnabled == TRUE)
677 { 672 {
678 union iwreq_data wrqu; 673 union iwreq_data wrqu;
@@ -681,7 +676,6 @@ void vRunCommand(void *hDeviceContext)
681 PRINT_K("wireless_send_event--->SIOCGIWAP(disassociated:vMgrJoinBSSBegin Fail !!)\n"); 676 PRINT_K("wireless_send_event--->SIOCGIWAP(disassociated:vMgrJoinBSSBegin Fail !!)\n");
682 wireless_send_event(pDevice->dev, SIOCGIWAP, &wrqu, NULL); 677 wireless_send_event(pDevice->dev, SIOCGIWAP, &wrqu, NULL);
683 } 678 }
684 #endif
685 } 679 }
686 } 680 }
687 s_bCommandComplete(pDevice); 681 s_bCommandComplete(pDevice);
@@ -924,7 +918,6 @@ void vRunCommand(void *hDeviceContext)
924 // unlock command busy 918 // unlock command busy
925 pMgmt->eCurrState = WMAC_STATE_IDLE; 919 pMgmt->eCurrState = WMAC_STATE_IDLE;
926 pMgmt->sNodeDBTable[0].bActive = FALSE; 920 pMgmt->sNodeDBTable[0].bActive = FALSE;
927 #ifdef WPA_SUPPLICANT_DRIVER_WEXT_SUPPORT
928 // if(pDevice->bWPASuppWextEnabled == TRUE) 921 // if(pDevice->bWPASuppWextEnabled == TRUE)
929 { 922 {
930 union iwreq_data wrqu; 923 union iwreq_data wrqu;
@@ -933,15 +926,12 @@ void vRunCommand(void *hDeviceContext)
933 PRINT_K("wireless_send_event--->SIOCGIWAP(disassociated)\n"); 926 PRINT_K("wireless_send_event--->SIOCGIWAP(disassociated)\n");
934 wireless_send_event(pDevice->dev, SIOCGIWAP, &wrqu, NULL); 927 wireless_send_event(pDevice->dev, SIOCGIWAP, &wrqu, NULL);
935 } 928 }
936 #endif
937 } 929 }
938 #ifdef WPA_SUPPLICANT_DRIVER_WEXT_SUPPORT
939 pDevice->bwextstep0 = FALSE; 930 pDevice->bwextstep0 = FALSE;
940 pDevice->bwextstep1 = FALSE; 931 pDevice->bwextstep1 = FALSE;
941 pDevice->bwextstep2 = FALSE; 932 pDevice->bwextstep2 = FALSE;
942 pDevice->bwextstep3 = FALSE; 933 pDevice->bwextstep3 = FALSE;
943 pDevice->bWPASuppWextEnabled = FALSE; 934 pDevice->bWPASuppWextEnabled = FALSE;
944 #endif
945 //clear current SSID 935 //clear current SSID
946 pItemSSID = (PWLAN_IE_SSID)pMgmt->abyCurrSSID; 936 pItemSSID = (PWLAN_IE_SSID)pMgmt->abyCurrSSID;
947 pItemSSID->len = 0; 937 pItemSSID->len = 0;
diff --git a/drivers/staging/vt6656/wmgr.c b/drivers/staging/vt6656/wmgr.c
index 7db6a8d3508b..95ddc8303bb3 100644
--- a/drivers/staging/vt6656/wmgr.c
+++ b/drivers/staging/vt6656/wmgr.c
@@ -925,7 +925,6 @@ s_vMgrRxAssocResponse(
925 WLAN_FR_ASSOCRESP sFrame; 925 WLAN_FR_ASSOCRESP sFrame;
926 PWLAN_IE_SSID pItemSSID; 926 PWLAN_IE_SSID pItemSSID;
927 PBYTE pbyIEs; 927 PBYTE pbyIEs;
928 viawget_wpa_header *wpahdr;
929 928
930 929
931 930
@@ -973,32 +972,7 @@ s_vMgrRxAssocResponse(
973 DBG_PRT(MSG_LEVEL_INFO, KERN_INFO "Link with AP(SSID): %s\n", pItemSSID->abySSID); 972 DBG_PRT(MSG_LEVEL_INFO, KERN_INFO "Link with AP(SSID): %s\n", pItemSSID->abySSID);
974 pDevice->bLinkPass = TRUE; 973 pDevice->bLinkPass = TRUE;
975 ControlvMaskByte(pDevice,MESSAGE_REQUEST_MACREG,MAC_REG_PAPEDELAY,LEDSTS_STS,LEDSTS_INTER); 974 ControlvMaskByte(pDevice,MESSAGE_REQUEST_MACREG,MAC_REG_PAPEDELAY,LEDSTS_STS,LEDSTS_INTER);
976 if ((pDevice->bWPADEVUp) && (pDevice->skb != NULL)) {
977 if(skb_tailroom(pDevice->skb) <(sizeof(viawget_wpa_header)+pMgmt->sAssocInfo.AssocInfo.ResponseIELength+
978 pMgmt->sAssocInfo.AssocInfo.RequestIELength)) { //data room not enough
979 dev_kfree_skb(pDevice->skb);
980 pDevice->skb = dev_alloc_skb((int)pDevice->rx_buf_sz);
981 }
982 wpahdr = (viawget_wpa_header *)pDevice->skb->data;
983 wpahdr->type = VIAWGET_ASSOC_MSG;
984 wpahdr->resp_ie_len = pMgmt->sAssocInfo.AssocInfo.ResponseIELength;
985 wpahdr->req_ie_len = pMgmt->sAssocInfo.AssocInfo.RequestIELength;
986 memcpy(pDevice->skb->data + sizeof(viawget_wpa_header), pMgmt->sAssocInfo.abyIEs, wpahdr->req_ie_len);
987 memcpy(pDevice->skb->data + sizeof(viawget_wpa_header) + wpahdr->req_ie_len,
988 pbyIEs,
989 wpahdr->resp_ie_len
990 );
991 skb_put(pDevice->skb, sizeof(viawget_wpa_header) + wpahdr->resp_ie_len + wpahdr->req_ie_len);
992 pDevice->skb->dev = pDevice->wpadev;
993 skb_reset_mac_header(pDevice->skb);
994 pDevice->skb->pkt_type = PACKET_HOST;
995 pDevice->skb->protocol = htons(ETH_P_802_2);
996 memset(pDevice->skb->cb, 0, sizeof(pDevice->skb->cb));
997 netif_rx(pDevice->skb);
998 pDevice->skb = dev_alloc_skb((int)pDevice->rx_buf_sz);
999 }
1000 975
1001#ifdef WPA_SUPPLICANT_DRIVER_WEXT_SUPPORT
1002 //if(pDevice->bWPASuppWextEnabled == TRUE) 976 //if(pDevice->bWPASuppWextEnabled == TRUE)
1003 { 977 {
1004 BYTE buf[512]; 978 BYTE buf[512];
@@ -1037,7 +1011,6 @@ s_vMgrRxAssocResponse(
1037 wireless_send_event(pDevice->dev, SIOCGIWAP, &wrqu, NULL); 1011 wireless_send_event(pDevice->dev, SIOCGIWAP, &wrqu, NULL);
1038 1012
1039 } 1013 }
1040#endif //#ifdef WPA_SUPPLICANT_DRIVER_WEXT_SUPPORT
1041 1014
1042 } 1015 }
1043 else { 1016 else {
@@ -1053,14 +1026,12 @@ s_vMgrRxAssocResponse(
1053 1026
1054 } 1027 }
1055 1028
1056#ifdef WPA_SUPPLICANT_DRIVER_WEXT_SUPPORT
1057//need clear flags related to Networkmanager 1029//need clear flags related to Networkmanager
1058 pDevice->bwextstep0 = FALSE; 1030 pDevice->bwextstep0 = FALSE;
1059 pDevice->bwextstep1 = FALSE; 1031 pDevice->bwextstep1 = FALSE;
1060 pDevice->bwextstep2 = FALSE; 1032 pDevice->bwextstep2 = FALSE;
1061 pDevice->bwextstep3 = FALSE; 1033 pDevice->bwextstep3 = FALSE;
1062 pDevice->bWPASuppWextEnabled = FALSE; 1034 pDevice->bWPASuppWextEnabled = FALSE;
1063#endif
1064 1035
1065if(pMgmt->eCurrState == WMAC_STATE_ASSOC) 1036if(pMgmt->eCurrState == WMAC_STATE_ASSOC)
1066 timer_expire(pDevice->sTimerCommand, 0); 1037 timer_expire(pDevice->sTimerCommand, 0);
@@ -1587,7 +1558,6 @@ s_vMgrRxDisassociation(
1587 WLAN_FR_DISASSOC sFrame; 1558 WLAN_FR_DISASSOC sFrame;
1588 unsigned int uNodeIndex = 0; 1559 unsigned int uNodeIndex = 0;
1589 CMD_STATUS CmdStatus; 1560 CMD_STATUS CmdStatus;
1590 viawget_wpa_header *wpahdr;
1591 1561
1592 if ( pMgmt->eCurrMode == WMAC_MODE_ESS_AP ){ 1562 if ( pMgmt->eCurrMode == WMAC_MODE_ESS_AP ){
1593 // if is acting an AP.. 1563 // if is acting an AP..
@@ -1608,20 +1578,6 @@ s_vMgrRxDisassociation(
1608 DBG_PRT(MSG_LEVEL_NOTICE, KERN_INFO "AP disassociated me, reason=%d.\n", cpu_to_le16(*(sFrame.pwReason))); 1578 DBG_PRT(MSG_LEVEL_NOTICE, KERN_INFO "AP disassociated me, reason=%d.\n", cpu_to_le16(*(sFrame.pwReason)));
1609 1579
1610 pDevice->fWPA_Authened = FALSE; 1580 pDevice->fWPA_Authened = FALSE;
1611 if ((pDevice->bWPADEVUp) && (pDevice->skb != NULL)) {
1612 wpahdr = (viawget_wpa_header *)pDevice->skb->data;
1613 wpahdr->type = VIAWGET_DISASSOC_MSG;
1614 wpahdr->resp_ie_len = 0;
1615 wpahdr->req_ie_len = 0;
1616 skb_put(pDevice->skb, sizeof(viawget_wpa_header));
1617 pDevice->skb->dev = pDevice->wpadev;
1618 skb_reset_mac_header(pDevice->skb);
1619 pDevice->skb->pkt_type = PACKET_HOST;
1620 pDevice->skb->protocol = htons(ETH_P_802_2);
1621 memset(pDevice->skb->cb, 0, sizeof(pDevice->skb->cb));
1622 netif_rx(pDevice->skb);
1623 pDevice->skb = dev_alloc_skb((int)pDevice->rx_buf_sz);
1624 }
1625 1581
1626 //TODO: do something let upper layer know or 1582 //TODO: do something let upper layer know or
1627 //try to send associate packet again because of inactivity timeout 1583 //try to send associate packet again because of inactivity timeout
@@ -1638,7 +1594,6 @@ s_vMgrRxDisassociation(
1638 } 1594 }
1639 } 1595 }
1640 1596
1641 #ifdef WPA_SUPPLICANT_DRIVER_WEXT_SUPPORT
1642 // if(pDevice->bWPASuppWextEnabled == TRUE) 1597 // if(pDevice->bWPASuppWextEnabled == TRUE)
1643 { 1598 {
1644 union iwreq_data wrqu; 1599 union iwreq_data wrqu;
@@ -1647,7 +1602,6 @@ s_vMgrRxDisassociation(
1647 PRINT_K("wireless_send_event--->SIOCGIWAP(disassociated)\n"); 1602 PRINT_K("wireless_send_event--->SIOCGIWAP(disassociated)\n");
1648 wireless_send_event(pDevice->dev, SIOCGIWAP, &wrqu, NULL); 1603 wireless_send_event(pDevice->dev, SIOCGIWAP, &wrqu, NULL);
1649 } 1604 }
1650 #endif
1651 } 1605 }
1652 /* else, ignore it */ 1606 /* else, ignore it */
1653 1607
@@ -1676,7 +1630,6 @@ s_vMgrRxDeauthentication(
1676{ 1630{
1677 WLAN_FR_DEAUTHEN sFrame; 1631 WLAN_FR_DEAUTHEN sFrame;
1678 unsigned int uNodeIndex = 0; 1632 unsigned int uNodeIndex = 0;
1679 viawget_wpa_header *wpahdr;
1680 1633
1681 1634
1682 if (pMgmt->eCurrMode == WMAC_MODE_ESS_AP ){ 1635 if (pMgmt->eCurrMode == WMAC_MODE_ESS_AP ){
@@ -1712,22 +1665,6 @@ s_vMgrRxDeauthentication(
1712 } 1665 }
1713 } 1666 }
1714 1667
1715 if ((pDevice->bWPADEVUp) && (pDevice->skb != NULL)) {
1716 wpahdr = (viawget_wpa_header *)pDevice->skb->data;
1717 wpahdr->type = VIAWGET_DISASSOC_MSG;
1718 wpahdr->resp_ie_len = 0;
1719 wpahdr->req_ie_len = 0;
1720 skb_put(pDevice->skb, sizeof(viawget_wpa_header));
1721 pDevice->skb->dev = pDevice->wpadev;
1722 skb_reset_mac_header(pDevice->skb);
1723 pDevice->skb->pkt_type = PACKET_HOST;
1724 pDevice->skb->protocol = htons(ETH_P_802_2);
1725 memset(pDevice->skb->cb, 0, sizeof(pDevice->skb->cb));
1726 netif_rx(pDevice->skb);
1727 pDevice->skb = dev_alloc_skb((int)pDevice->rx_buf_sz);
1728 }
1729
1730 #ifdef WPA_SUPPLICANT_DRIVER_WEXT_SUPPORT
1731 // if(pDevice->bWPASuppWextEnabled == TRUE) 1668 // if(pDevice->bWPASuppWextEnabled == TRUE)
1732 { 1669 {
1733 union iwreq_data wrqu; 1670 union iwreq_data wrqu;
@@ -1736,7 +1673,6 @@ s_vMgrRxDeauthentication(
1736 PRINT_K("wireless_send_event--->SIOCGIWAP(disauthen)\n"); 1673 PRINT_K("wireless_send_event--->SIOCGIWAP(disauthen)\n");
1737 wireless_send_event(pDevice->dev, SIOCGIWAP, &wrqu, NULL); 1674 wireless_send_event(pDevice->dev, SIOCGIWAP, &wrqu, NULL);
1738 } 1675 }
1739 #endif
1740 1676
1741 } 1677 }
1742 /* else, ignore it. TODO: IBSS authentication service 1678 /* else, ignore it. TODO: IBSS authentication service
@@ -2645,10 +2581,8 @@ void vMgrJoinBSSBegin(void *hDeviceContext, PCMD_STATUS pStatus)
2645*/ 2581*/
2646 } 2582 }
2647 2583
2648#ifdef WPA_SUPPLICANT_DRIVER_WEXT_SUPPORT
2649 //if(pDevice->bWPASuppWextEnabled == TRUE) 2584 //if(pDevice->bWPASuppWextEnabled == TRUE)
2650 Encyption_Rebuild(pDevice, pCurr); 2585 Encyption_Rebuild(pDevice, pCurr);
2651#endif
2652 2586
2653 // Infrastructure BSS 2587 // Infrastructure BSS
2654 s_vMgrSynchBSS(pDevice, 2588 s_vMgrSynchBSS(pDevice,
diff --git a/drivers/staging/vt6656/wmgr.h b/drivers/staging/vt6656/wmgr.h
index 13dfb3bf8328..52b1b562b141 100644
--- a/drivers/staging/vt6656/wmgr.h
+++ b/drivers/staging/vt6656/wmgr.h
@@ -89,44 +89,44 @@ typedef void (*TimerFunction)(unsigned long);
89 89
90//+++ NDIS related 90//+++ NDIS related
91 91
92typedef unsigned char NDIS_802_11_MAC_ADDRESS[ETH_ALEN]; 92typedef u8 NDIS_802_11_MAC_ADDRESS[ETH_ALEN];
93typedef struct _NDIS_802_11_AI_REQFI 93typedef struct _NDIS_802_11_AI_REQFI
94{ 94{
95 unsigned short Capabilities; 95 u16 Capabilities;
96 unsigned short ListenInterval; 96 u16 ListenInterval;
97 NDIS_802_11_MAC_ADDRESS CurrentAPAddress; 97 NDIS_802_11_MAC_ADDRESS CurrentAPAddress;
98} NDIS_802_11_AI_REQFI, *PNDIS_802_11_AI_REQFI; 98} NDIS_802_11_AI_REQFI, *PNDIS_802_11_AI_REQFI;
99 99
100typedef struct _NDIS_802_11_AI_RESFI 100typedef struct _NDIS_802_11_AI_RESFI
101{ 101{
102 unsigned short Capabilities; 102 u16 Capabilities;
103 unsigned short StatusCode; 103 u16 StatusCode;
104 unsigned short AssociationId; 104 u16 AssociationId;
105} NDIS_802_11_AI_RESFI, *PNDIS_802_11_AI_RESFI; 105} NDIS_802_11_AI_RESFI, *PNDIS_802_11_AI_RESFI;
106 106
107typedef struct _NDIS_802_11_ASSOCIATION_INFORMATION 107typedef struct _NDIS_802_11_ASSOCIATION_INFORMATION
108{ 108{
109 unsigned long Length; 109 u32 Length;
110 unsigned short AvailableRequestFixedIEs; 110 u16 AvailableRequestFixedIEs;
111 NDIS_802_11_AI_REQFI RequestFixedIEs; 111 NDIS_802_11_AI_REQFI RequestFixedIEs;
112 unsigned long RequestIELength; 112 u32 RequestIELength;
113 unsigned long OffsetRequestIEs; 113 u32 OffsetRequestIEs;
114 unsigned short AvailableResponseFixedIEs; 114 u16 AvailableResponseFixedIEs;
115 NDIS_802_11_AI_RESFI ResponseFixedIEs; 115 NDIS_802_11_AI_RESFI ResponseFixedIEs;
116 unsigned long ResponseIELength; 116 u32 ResponseIELength;
117 unsigned long OffsetResponseIEs; 117 u32 OffsetResponseIEs;
118} NDIS_802_11_ASSOCIATION_INFORMATION, *PNDIS_802_11_ASSOCIATION_INFORMATION; 118} NDIS_802_11_ASSOCIATION_INFORMATION, *PNDIS_802_11_ASSOCIATION_INFORMATION;
119 119
120 120
121 121
122typedef struct tagSAssocInfo { 122typedef struct tagSAssocInfo {
123 NDIS_802_11_ASSOCIATION_INFORMATION AssocInfo; 123 NDIS_802_11_ASSOCIATION_INFORMATION AssocInfo;
124 BYTE abyIEs[WLAN_BEACON_FR_MAXLEN+WLAN_BEACON_FR_MAXLEN]; 124 u8 abyIEs[WLAN_BEACON_FR_MAXLEN+WLAN_BEACON_FR_MAXLEN];
125 // store ReqIEs set by OID_802_11_ASSOCIATION_INFORMATION 125 /* store ReqIEs set by OID_802_11_ASSOCIATION_INFORMATION */
126 unsigned long RequestIELength; 126 u32 RequestIELength;
127 BYTE abyReqIEs[WLAN_BEACON_FR_MAXLEN]; 127 u8 abyReqIEs[WLAN_BEACON_FR_MAXLEN];
128} SAssocInfo, *PSAssocInfo; 128} SAssocInfo, *PSAssocInfo;
129//--- 129
130 130
131 131
132 132
diff --git a/drivers/staging/vt6656/wpa2.c b/drivers/staging/vt6656/wpa2.c
index c0926976627d..616e24dcf42b 100644
--- a/drivers/staging/vt6656/wpa2.c
+++ b/drivers/staging/vt6656/wpa2.c
@@ -31,8 +31,8 @@
31 * 31 *
32 */ 32 */
33 33
34#include "wpa2.h"
35#include "device.h" 34#include "device.h"
35#include "wpa2.h"
36 36
37/*--------------------- Static Definitions -------------------------*/ 37/*--------------------- Static Definitions -------------------------*/
38static int msglevel =MSG_LEVEL_INFO; 38static int msglevel =MSG_LEVEL_INFO;
diff --git a/drivers/staging/vt6656/wpa2.h b/drivers/staging/vt6656/wpa2.h
index 46c295905b48..c359252a6b0e 100644
--- a/drivers/staging/vt6656/wpa2.h
+++ b/drivers/staging/vt6656/wpa2.h
@@ -45,8 +45,8 @@ typedef struct tagsPMKIDInfo {
45} PMKIDInfo, *PPMKIDInfo; 45} PMKIDInfo, *PPMKIDInfo;
46 46
47typedef struct tagSPMKIDCache { 47typedef struct tagSPMKIDCache {
48 unsigned long BSSIDInfoCount; 48 u32 BSSIDInfoCount;
49 PMKIDInfo BSSIDInfo[MAX_PMKID_CACHE]; 49 PMKIDInfo BSSIDInfo[MAX_PMKID_CACHE];
50} SPMKIDCache, *PSPMKIDCache; 50} SPMKIDCache, *PSPMKIDCache;
51 51
52 52
diff --git a/drivers/staging/vt6656/wpactl.c b/drivers/staging/vt6656/wpactl.c
index 3e65aa132011..cc1d48bced2d 100644
--- a/drivers/staging/vt6656/wpactl.c
+++ b/drivers/staging/vt6656/wpactl.c
@@ -44,13 +44,6 @@
44 44
45/*--------------------- Static Definitions -------------------------*/ 45/*--------------------- Static Definitions -------------------------*/
46 46
47#define VIAWGET_WPA_MAX_BUF_SIZE 1024
48
49static const int frequency_list[] = {
50 2412, 2417, 2422, 2427, 2432, 2437, 2442,
51 2447, 2452, 2457, 2462, 2467, 2472, 2484
52};
53
54/*--------------------- Static Classes ----------------------------*/ 47/*--------------------- Static Classes ----------------------------*/
55 48
56/*--------------------- Static Variables --------------------------*/ 49/*--------------------- Static Variables --------------------------*/
@@ -59,118 +52,7 @@ static int msglevel = MSG_LEVEL_INFO;
59/*--------------------- Static Functions --------------------------*/ 52/*--------------------- Static Functions --------------------------*/
60 53
61/*--------------------- Export Variables --------------------------*/ 54/*--------------------- Export Variables --------------------------*/
62static void wpadev_setup(struct net_device *dev)
63{
64 dev->type = ARPHRD_IEEE80211;
65 dev->hard_header_len = ETH_HLEN;
66 dev->mtu = 2048;
67 dev->addr_len = ETH_ALEN;
68 dev->tx_queue_len = 1000;
69 55
70 memset(dev->broadcast, 0xFF, ETH_ALEN);
71
72 dev->flags = IFF_BROADCAST | IFF_MULTICAST;
73}
74
75/*
76 * Description:
77 * register netdev for wpa supplicant daemon
78 *
79 * Parameters:
80 * In:
81 * pDevice -
82 * enable -
83 * Out:
84 *
85 * Return Value:
86 *
87 */
88static int wpa_init_wpadev(PSDevice pDevice)
89{
90 PSDevice wpadev_priv;
91 struct net_device *dev = pDevice->dev;
92 int ret = 0;
93
94 pDevice->wpadev = alloc_netdev(sizeof(PSDevice), "vntwpa", wpadev_setup);
95 if (pDevice->wpadev == NULL)
96 return -ENOMEM;
97
98 wpadev_priv = netdev_priv(pDevice->wpadev);
99 *wpadev_priv = *pDevice;
100 memcpy(pDevice->wpadev->dev_addr, dev->dev_addr, ETH_ALEN);
101 pDevice->wpadev->base_addr = dev->base_addr;
102 pDevice->wpadev->irq = dev->irq;
103 pDevice->wpadev->mem_start = dev->mem_start;
104 pDevice->wpadev->mem_end = dev->mem_end;
105 ret = register_netdev(pDevice->wpadev);
106 if (ret) {
107 DBG_PRT(MSG_LEVEL_DEBUG, KERN_INFO "%s: register_netdev(WPA) failed!\n",
108 dev->name);
109 free_netdev(pDevice->wpadev);
110 return -1;
111 }
112
113 if (pDevice->skb == NULL) {
114 pDevice->skb = dev_alloc_skb((int)pDevice->rx_buf_sz);
115 if (pDevice->skb == NULL)
116 return -ENOMEM;
117 }
118
119 DBG_PRT(MSG_LEVEL_DEBUG, KERN_INFO "%s: Registered netdev %s for WPA management\n",
120 dev->name, pDevice->wpadev->name);
121
122 return 0;
123}
124
125/*
126 * Description:
127 * unregister net_device (wpadev)
128 *
129 * Parameters:
130 * In:
131 * pDevice -
132 * Out:
133 *
134 * Return Value:
135 *
136 */
137static int wpa_release_wpadev(PSDevice pDevice)
138{
139 if (pDevice->skb) {
140 dev_kfree_skb(pDevice->skb);
141 pDevice->skb = NULL;
142 }
143
144 if (pDevice->wpadev) {
145 DBG_PRT(MSG_LEVEL_DEBUG, KERN_INFO "%s: Netdevice %s unregistered\n",
146 pDevice->dev->name, pDevice->wpadev->name);
147 unregister_netdev(pDevice->wpadev);
148 free_netdev(pDevice->wpadev);
149 pDevice->wpadev = NULL;
150 }
151
152 return 0;
153}
154
155/*
156 * Description:
157 * Set enable/disable dev for wpa supplicant daemon
158 *
159 * Parameters:
160 * In:
161 * pDevice -
162 * val -
163 * Out:
164 *
165 * Return Value:
166 *
167 */
168int wpa_set_wpadev(PSDevice pDevice, int val)
169{
170 if (val)
171 return wpa_init_wpadev(pDevice);
172 return wpa_release_wpadev(pDevice);
173}
174 56
175/* 57/*
176 * Description: 58 * Description:
@@ -185,7 +67,7 @@ int wpa_set_wpadev(PSDevice pDevice, int val)
185 * Return Value: 67 * Return Value:
186 * 68 *
187 */ 69 */
188 int wpa_set_keys(PSDevice pDevice, void *ctx, BOOL fcpfkernel) 70int wpa_set_keys(PSDevice pDevice, void *ctx)
189{ 71{
190 struct viawget_wpa_param *param = ctx; 72 struct viawget_wpa_param *param = ctx;
191 PSMgmtObject pMgmt = &pDevice->sMgmtObj; 73 PSMgmtObject pMgmt = &pDevice->sMgmtObj;
@@ -217,18 +99,7 @@ int wpa_set_wpadev(PSDevice pDevice, int val)
217 if (param->u.wpa_key.key && param->u.wpa_key.key_len > sizeof(abyKey)) 99 if (param->u.wpa_key.key && param->u.wpa_key.key_len > sizeof(abyKey))
218 return -EINVAL; 100 return -EINVAL;
219 101
220 spin_unlock_irq(&pDevice->lock); 102 memcpy(&abyKey[0], param->u.wpa_key.key, param->u.wpa_key.key_len);
221 if (param->u.wpa_key.key && fcpfkernel) {
222 memcpy(&abyKey[0], param->u.wpa_key.key, param->u.wpa_key.key_len);
223 } else {
224 if (param->u.wpa_key.key &&
225 copy_from_user(&abyKey[0], param->u.wpa_key.key,
226 param->u.wpa_key.key_len)) {
227 spin_lock_irq(&pDevice->lock);
228 return -EINVAL;
229 }
230 }
231 spin_lock_irq(&pDevice->lock);
232 103
233 dwKeyIndex = (DWORD)(param->u.wpa_key.key_index); 104 dwKeyIndex = (DWORD)(param->u.wpa_key.key_index);
234 105
@@ -260,18 +131,7 @@ int wpa_set_wpadev(PSDevice pDevice, int val)
260 if (param->u.wpa_key.seq && param->u.wpa_key.seq_len > sizeof(abySeq)) 131 if (param->u.wpa_key.seq && param->u.wpa_key.seq_len > sizeof(abySeq))
261 return -EINVAL; 132 return -EINVAL;
262 133
263 spin_unlock_irq(&pDevice->lock); 134 memcpy(&abySeq[0], param->u.wpa_key.seq, param->u.wpa_key.seq_len);
264 if (param->u.wpa_key.seq && fcpfkernel) {
265 memcpy(&abySeq[0], param->u.wpa_key.seq, param->u.wpa_key.seq_len);
266 } else {
267 if (param->u.wpa_key.seq &&
268 copy_from_user(&abySeq[0], param->u.wpa_key.seq,
269 param->u.wpa_key.seq_len)) {
270 spin_lock_irq(&pDevice->lock);
271 return -EINVAL;
272 }
273 }
274 spin_lock_irq(&pDevice->lock);
275 135
276 if (param->u.wpa_key.seq_len > 0) { 136 if (param->u.wpa_key.seq_len > 0) {
277 for (ii = 0 ; ii < param->u.wpa_key.seq_len ; ii++) { 137 for (ii = 0 ; ii < param->u.wpa_key.seq_len ; ii++) {
@@ -399,521 +259,3 @@ int wpa_set_wpadev(PSDevice pDevice, int val)
399} 259}
400 260
401 261
402/*
403 * Description:
404 * enable wpa auth & mode
405 *
406 * Parameters:
407 * In:
408 * pDevice -
409 * param -
410 * Out:
411 *
412 * Return Value:
413 *
414 */
415static int wpa_set_wpa(PSDevice pDevice, struct viawget_wpa_param *param)
416{
417 PSMgmtObject pMgmt = &pDevice->sMgmtObj;
418 int ret = 0;
419
420 pMgmt->eAuthenMode = WMAC_AUTH_OPEN;
421 pMgmt->bShareKeyAlgorithm = FALSE;
422
423 return ret;
424}
425
426 /*
427 * Description:
428 * set disassociate
429 *
430 * Parameters:
431 * In:
432 * pDevice -
433 * param -
434 * Out:
435 *
436 * Return Value:
437 *
438 */
439static int wpa_set_disassociate(PSDevice pDevice, struct viawget_wpa_param *param)
440{
441 PSMgmtObject pMgmt = &pDevice->sMgmtObj;
442 int ret = 0;
443
444 spin_lock_irq(&pDevice->lock);
445 if (pDevice->bLinkPass) {
446 if (!memcmp(param->addr, pMgmt->abyCurrBSSID, 6))
447 bScheduleCommand((void *)pDevice, WLAN_CMD_DISASSOCIATE, NULL);
448 }
449 spin_unlock_irq(&pDevice->lock);
450
451 return ret;
452}
453
454/*
455 * Description:
456 * enable scan process
457 *
458 * Parameters:
459 * In:
460 * pDevice -
461 * param -
462 * Out:
463 *
464 * Return Value:
465 *
466 */
467static int wpa_set_scan(PSDevice pDevice, struct viawget_wpa_param *param)
468{
469 int ret = 0;
470
471/**set ap_scan=1&&scan_ssid=1 under hidden ssid mode**/
472 PSMgmtObject pMgmt = &pDevice->sMgmtObj;
473 PWLAN_IE_SSID pItemSSID;
474 printk("wpa_set_scan-->desired [ssid=%s,ssid_len=%d]\n",
475 param->u.scan_req.ssid,param->u.scan_req.ssid_len);
476// Set the SSID
477 memset(pMgmt->abyDesireSSID, 0, WLAN_IEHDR_LEN + WLAN_SSID_MAXLEN + 1);
478 pItemSSID = (PWLAN_IE_SSID)pMgmt->abyDesireSSID;
479 pItemSSID->byElementID = WLAN_EID_SSID;
480 memcpy(pItemSSID->abySSID, param->u.scan_req.ssid, param->u.scan_req.ssid_len);
481 pItemSSID->len = param->u.scan_req.ssid_len;
482
483 spin_lock_irq(&pDevice->lock);
484 BSSvClearBSSList((void *) pDevice, pDevice->bLinkPass);
485 bScheduleCommand((void *) pDevice, WLAN_CMD_BSSID_SCAN,
486 pMgmt->abyDesireSSID);
487 spin_unlock_irq(&pDevice->lock);
488
489 return ret;
490}
491
492/*
493 * Description:
494 * get bssid
495 *
496 * Parameters:
497 * In:
498 * pDevice -
499 * param -
500 * Out:
501 *
502 * Return Value:
503 *
504 */
505static int wpa_get_bssid(PSDevice pDevice, struct viawget_wpa_param *param)
506{
507 PSMgmtObject pMgmt = &pDevice->sMgmtObj;
508 int ret = 0;
509 memcpy(param->u.wpa_associate.bssid, pMgmt->abyCurrBSSID, 6);
510
511 return ret;
512}
513
514/*
515 * Description:
516 * get bssid
517 *
518 * Parameters:
519 * In:
520 * pDevice -
521 * param -
522 * Out:
523 *
524 * Return Value:
525 *
526 */
527static int wpa_get_ssid(PSDevice pDevice, struct viawget_wpa_param *param)
528{
529 PSMgmtObject pMgmt = &pDevice->sMgmtObj;
530 PWLAN_IE_SSID pItemSSID;
531 int ret = 0;
532
533 pItemSSID = (PWLAN_IE_SSID)pMgmt->abyCurrSSID;
534
535 memcpy(param->u.wpa_associate.ssid, pItemSSID->abySSID, pItemSSID->len);
536 param->u.wpa_associate.ssid_len = pItemSSID->len;
537
538 return ret;
539}
540
541/*
542 * Description:
543 * get scan results
544 *
545 * Parameters:
546 * In:
547 * pDevice -
548 * param -
549 * Out:
550 *
551 * Return Value:
552 *
553 */
554static int wpa_get_scan(PSDevice pDevice, struct viawget_wpa_param *param)
555{
556 struct viawget_scan_result *scan_buf;
557 PSMgmtObject pMgmt = &pDevice->sMgmtObj;
558 PWLAN_IE_SSID pItemSSID;
559 PKnownBSS pBSS;
560 PBYTE pBuf;
561 int ret = 0;
562 u16 count = 0;
563 u16 ii;
564 u16 jj;
565 long ldBm; //James //add
566
567//******mike:bubble sort by stronger RSSI*****//
568 PBYTE ptempBSS;
569
570 ptempBSS = kmalloc(sizeof(KnownBSS), GFP_ATOMIC);
571
572 if (ptempBSS == NULL) {
573 printk("bubble sort kmalloc memory fail@@@\n");
574 ret = -ENOMEM;
575 return ret;
576 }
577
578 for (ii = 0; ii < MAX_BSS_NUM; ii++) {
579 for (jj = 0; jj < MAX_BSS_NUM - ii - 1; jj++) {
580 if ((pMgmt->sBSSList[jj].bActive != TRUE)
581 || ((pMgmt->sBSSList[jj].uRSSI > pMgmt->sBSSList[jj + 1].uRSSI)
582 && (pMgmt->sBSSList[jj + 1].bActive != FALSE))) {
583 memcpy(ptempBSS,&pMgmt->sBSSList[jj], sizeof(KnownBSS));
584 memcpy(&pMgmt->sBSSList[jj], &pMgmt->sBSSList[jj + 1],
585 sizeof(KnownBSS));
586 memcpy(&pMgmt->sBSSList[jj + 1], ptempBSS, sizeof(KnownBSS));
587 }
588 }
589 }
590 kfree(ptempBSS);
591
592 count = 0;
593 pBSS = &(pMgmt->sBSSList[0]);
594 for (ii = 0; ii < MAX_BSS_NUM; ii++) {
595 pBSS = &(pMgmt->sBSSList[ii]);
596 if (!pBSS->bActive)
597 continue;
598 count++;
599 }
600
601 pBuf = kcalloc(count, sizeof(struct viawget_scan_result), GFP_ATOMIC);
602
603 if (pBuf == NULL) {
604 ret = -ENOMEM;
605 return ret;
606 }
607 scan_buf = (struct viawget_scan_result *)pBuf;
608 pBSS = &(pMgmt->sBSSList[0]);
609 for (ii = 0, jj = 0; ii < MAX_BSS_NUM; ii++) {
610 pBSS = &(pMgmt->sBSSList[ii]);
611 if (pBSS->bActive) {
612 if (jj >= count)
613 break;
614 memcpy(scan_buf->bssid, pBSS->abyBSSID, WLAN_BSSID_LEN);
615 pItemSSID = (PWLAN_IE_SSID)pBSS->abySSID;
616 memcpy(scan_buf->ssid, pItemSSID->abySSID, pItemSSID->len);
617 scan_buf->ssid_len = pItemSSID->len;
618 scan_buf->freq = frequency_list[pBSS->uChannel-1];
619 scan_buf->caps = pBSS->wCapInfo; // DavidWang for sharemode
620
621 RFvRSSITodBm(pDevice, (BYTE)(pBSS->uRSSI), &ldBm);
622 if (-ldBm < 50)
623 scan_buf->qual = 100;
624 else if (-ldBm > 90)
625 scan_buf->qual = 0;
626 else
627 scan_buf->qual=(40-(-ldBm-50))*100/40;
628
629 //James
630 //scan_buf->caps = pBSS->wCapInfo;
631 //scan_buf->qual =
632 scan_buf->noise = 0;
633 scan_buf->level = ldBm;
634
635 //scan_buf->maxrate =
636 if (pBSS->wWPALen != 0) {
637 scan_buf->wpa_ie_len = pBSS->wWPALen;
638 memcpy(scan_buf->wpa_ie, pBSS->byWPAIE, pBSS->wWPALen);
639 }
640 if (pBSS->wRSNLen != 0) {
641 scan_buf->rsn_ie_len = pBSS->wRSNLen;
642 memcpy(scan_buf->rsn_ie, pBSS->byRSNIE, pBSS->wRSNLen);
643 }
644 scan_buf = (struct viawget_scan_result *)((PBYTE)scan_buf + sizeof(struct viawget_scan_result));
645 jj ++;
646 }
647 }
648
649 if (jj < count)
650 count = jj;
651
652 if (copy_to_user(param->u.scan_results.buf, pBuf, sizeof(struct viawget_scan_result) * count))
653 ret = -EFAULT;
654
655 param->u.scan_results.scan_count = count;
656 DBG_PRT(MSG_LEVEL_DEBUG, KERN_INFO " param->u.scan_results.scan_count = %d\n", count);
657
658 kfree(pBuf);
659 return ret;
660}
661
662/*
663 * Description:
664 * set associate with AP
665 *
666 * Parameters:
667 * In:
668 * pDevice -
669 * param -
670 * Out:
671 *
672 * Return Value:
673 *
674 */
675static int wpa_set_associate(PSDevice pDevice, struct viawget_wpa_param *param)
676{
677 PSMgmtObject pMgmt = &pDevice->sMgmtObj;
678 PWLAN_IE_SSID pItemSSID;
679 BYTE abyNullAddr[] = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00};
680 BYTE abyWPAIE[64];
681 int ret = 0;
682 BOOL bwepEnabled=FALSE;
683
684 // set key type & algorithm
685 DBG_PRT(MSG_LEVEL_DEBUG, KERN_INFO "pairwise_suite = %d\n", param->u.wpa_associate.pairwise_suite);
686 DBG_PRT(MSG_LEVEL_DEBUG, KERN_INFO "group_suite = %d\n", param->u.wpa_associate.group_suite);
687 DBG_PRT(MSG_LEVEL_DEBUG, KERN_INFO "key_mgmt_suite = %d\n", param->u.wpa_associate.key_mgmt_suite);
688 DBG_PRT(MSG_LEVEL_DEBUG, KERN_INFO "auth_alg = %d\n", param->u.wpa_associate.auth_alg);
689 DBG_PRT(MSG_LEVEL_DEBUG, KERN_INFO "mode = %d\n", param->u.wpa_associate.mode);
690 DBG_PRT(MSG_LEVEL_DEBUG, KERN_INFO "wpa_ie_len = %d\n", param->u.wpa_associate.wpa_ie_len);
691 DBG_PRT(MSG_LEVEL_DEBUG, KERN_INFO "Roaming dBm = %d\n", param->u.wpa_associate.roam_dbm); // Davidwang
692
693 if (param->u.wpa_associate.wpa_ie) {
694 if (param->u.wpa_associate.wpa_ie_len > sizeof(abyWPAIE))
695 return -EINVAL;
696
697 if (copy_from_user(&abyWPAIE[0], param->u.wpa_associate.wpa_ie,
698 param->u.wpa_associate.wpa_ie_len))
699 return -EFAULT;
700 }
701
702 if (param->u.wpa_associate.mode == 1)
703 pMgmt->eConfigMode = WMAC_CONFIG_IBSS_STA;
704 else
705 pMgmt->eConfigMode = WMAC_CONFIG_ESS_STA;
706
707 // set bssid
708 if (memcmp(param->u.wpa_associate.bssid, &abyNullAddr[0], 6) != 0)
709 memcpy(pMgmt->abyDesireBSSID, param->u.wpa_associate.bssid, 6);
710 // set ssid
711 memset(pMgmt->abyDesireSSID, 0, WLAN_IEHDR_LEN + WLAN_SSID_MAXLEN + 1);
712 pItemSSID = (PWLAN_IE_SSID)pMgmt->abyDesireSSID;
713 pItemSSID->byElementID = WLAN_EID_SSID;
714 pItemSSID->len = param->u.wpa_associate.ssid_len;
715 memcpy(pItemSSID->abySSID, param->u.wpa_associate.ssid, pItemSSID->len);
716
717 if (param->u.wpa_associate.wpa_ie_len == 0) {
718 if (param->u.wpa_associate.auth_alg & AUTH_ALG_SHARED_KEY)
719 pMgmt->eAuthenMode = WMAC_AUTH_SHAREKEY;
720 else
721 pMgmt->eAuthenMode = WMAC_AUTH_OPEN;
722 } else if (abyWPAIE[0] == RSN_INFO_ELEM) {
723 if (param->u.wpa_associate.key_mgmt_suite == KEY_MGMT_PSK)
724 pMgmt->eAuthenMode = WMAC_AUTH_WPA2PSK;
725 else
726 pMgmt->eAuthenMode = WMAC_AUTH_WPA2;
727 } else {
728 if (param->u.wpa_associate.key_mgmt_suite == KEY_MGMT_WPA_NONE)
729 pMgmt->eAuthenMode = WMAC_AUTH_WPANONE;
730 else if (param->u.wpa_associate.key_mgmt_suite == KEY_MGMT_PSK)
731 pMgmt->eAuthenMode = WMAC_AUTH_WPAPSK;
732 else
733 pMgmt->eAuthenMode = WMAC_AUTH_WPA;
734 }
735
736 switch (param->u.wpa_associate.pairwise_suite) {
737 case CIPHER_CCMP:
738 pDevice->eEncryptionStatus = Ndis802_11Encryption3Enabled;
739 break;
740 case CIPHER_TKIP:
741 pDevice->eEncryptionStatus = Ndis802_11Encryption2Enabled;
742 break;
743 case CIPHER_WEP40:
744 case CIPHER_WEP104:
745 pDevice->eEncryptionStatus = Ndis802_11Encryption1Enabled;
746 bwepEnabled = TRUE;
747 break;
748 case CIPHER_NONE:
749 if (param->u.wpa_associate.group_suite == CIPHER_CCMP)
750 pDevice->eEncryptionStatus = Ndis802_11Encryption3Enabled;
751 else
752 pDevice->eEncryptionStatus = Ndis802_11Encryption2Enabled;
753 break;
754 default:
755 pDevice->eEncryptionStatus = Ndis802_11EncryptionDisabled;
756 }
757
758 pMgmt->Roam_dbm = param->u.wpa_associate.roam_dbm;
759 if (pMgmt->eAuthenMode == WMAC_AUTH_SHAREKEY) { // @wep-sharekey
760 pDevice->eEncryptionStatus = Ndis802_11Encryption1Enabled;
761 pMgmt->bShareKeyAlgorithm = TRUE;
762 } else if (pMgmt->eAuthenMode == WMAC_AUTH_OPEN) {
763 if(bwepEnabled==TRUE) { //@open-wep
764 pDevice->eEncryptionStatus = Ndis802_11Encryption1Enabled;
765 } else {
766 // @only open
767 pDevice->eEncryptionStatus = Ndis802_11EncryptionDisabled;
768 }
769 }
770 // mike save old encryption status
771 pDevice->eOldEncryptionStatus = pDevice->eEncryptionStatus;
772
773 if (pDevice->eEncryptionStatus != Ndis802_11EncryptionDisabled)
774 pDevice->bEncryptionEnable = TRUE;
775 else
776 pDevice->bEncryptionEnable = FALSE;
777
778 if ((pMgmt->eAuthenMode == WMAC_AUTH_SHAREKEY) ||
779 ((pMgmt->eAuthenMode == WMAC_AUTH_OPEN) && (bwepEnabled==TRUE))) {
780 // mike re-comment:open-wep && sharekey-wep needn't do initial key!!
781 } else {
782 KeyvInitTable(pDevice,&pDevice->sKey);
783 }
784
785 spin_lock_irq(&pDevice->lock);
786 pDevice->bLinkPass = FALSE;
787 ControlvMaskByte(pDevice, MESSAGE_REQUEST_MACREG, MAC_REG_PAPEDELAY, LEDSTS_STS, LEDSTS_SLOW);
788 memset(pMgmt->abyCurrBSSID, 0, 6);
789 pMgmt->eCurrState = WMAC_STATE_IDLE;
790 netif_stop_queue(pDevice->dev);
791
792/******* search if ap_scan=2, which is associating request in hidden ssid mode ****/
793 {
794 PKnownBSS pCurr = NULL;
795 pCurr = BSSpSearchBSSList(pDevice,
796 pMgmt->abyDesireBSSID,
797 pMgmt->abyDesireSSID,
798 pDevice->eConfigPHYMode
799 );
800
801 if (pCurr == NULL){
802 printk("wpa_set_associate---->hidden mode site survey before associate.......\n");
803 bScheduleCommand((void *)pDevice,
804 WLAN_CMD_BSSID_SCAN,
805 pMgmt->abyDesireSSID);
806 }
807 }
808/****************************************************************/
809
810 bScheduleCommand((void *)pDevice, WLAN_CMD_SSID, NULL);
811 spin_unlock_irq(&pDevice->lock);
812
813 return ret;
814}
815
816/*
817 * Description:
818 * wpa_ioctl main function supported for wpa supplicant
819 *
820 * Parameters:
821 * In:
822 * pDevice -
823 * iw_point -
824 * Out:
825 *
826 * Return Value:
827 *
828 */
829int wpa_ioctl(PSDevice pDevice, struct iw_point *p)
830{
831 struct viawget_wpa_param *param;
832 int ret = 0;
833 int wpa_ioctl = 0;
834
835 if (p->length < sizeof(struct viawget_wpa_param) ||
836 p->length > VIAWGET_WPA_MAX_BUF_SIZE || !p->pointer)
837 return -EINVAL;
838
839 param = kmalloc((int)p->length, GFP_KERNEL);
840 if (param == NULL)
841 return -ENOMEM;
842
843 if (copy_from_user(param, p->pointer, p->length)) {
844 ret = -EFAULT;
845 goto out;
846 }
847
848 switch (param->cmd) {
849 case VIAWGET_SET_WPA:
850 ret = wpa_set_wpa(pDevice, param);
851 DBG_PRT(MSG_LEVEL_DEBUG, KERN_INFO "VIAWGET_SET_WPA \n");
852 break;
853
854 case VIAWGET_SET_KEY:
855 DBG_PRT(MSG_LEVEL_DEBUG, KERN_INFO "VIAWGET_SET_KEY \n");
856 spin_lock_irq(&pDevice->lock);
857 ret = wpa_set_keys(pDevice, param, FALSE);
858 spin_unlock_irq(&pDevice->lock);
859 break;
860
861 case VIAWGET_SET_SCAN:
862 DBG_PRT(MSG_LEVEL_DEBUG, KERN_INFO "VIAWGET_SET_SCAN \n");
863 ret = wpa_set_scan(pDevice, param);
864 break;
865
866 case VIAWGET_GET_SCAN:
867 DBG_PRT(MSG_LEVEL_DEBUG, KERN_INFO "VIAWGET_GET_SCAN\n");
868 ret = wpa_get_scan(pDevice, param);
869 wpa_ioctl = 1;
870 break;
871
872 case VIAWGET_GET_SSID:
873 DBG_PRT(MSG_LEVEL_DEBUG, KERN_INFO "VIAWGET_GET_SSID \n");
874 ret = wpa_get_ssid(pDevice, param);
875 wpa_ioctl = 1;
876 break;
877
878 case VIAWGET_GET_BSSID:
879 DBG_PRT(MSG_LEVEL_DEBUG, KERN_INFO "VIAWGET_GET_BSSID \n");
880 ret = wpa_get_bssid(pDevice, param);
881 wpa_ioctl = 1;
882 break;
883
884 case VIAWGET_SET_ASSOCIATE:
885 DBG_PRT(MSG_LEVEL_DEBUG, KERN_INFO "VIAWGET_SET_ASSOCIATE \n");
886 ret = wpa_set_associate(pDevice, param);
887 break;
888
889 case VIAWGET_SET_DISASSOCIATE:
890 DBG_PRT(MSG_LEVEL_DEBUG, KERN_INFO "VIAWGET_SET_DISASSOCIATE \n");
891 ret = wpa_set_disassociate(pDevice, param);
892 break;
893
894 case VIAWGET_SET_DROP_UNENCRYPT:
895 DBG_PRT(MSG_LEVEL_DEBUG, KERN_INFO "VIAWGET_SET_DROP_UNENCRYPT \n");
896 break;
897
898 case VIAWGET_SET_DEAUTHENTICATE:
899 DBG_PRT(MSG_LEVEL_DEBUG, KERN_INFO "VIAWGET_SET_DEAUTHENTICATE \n");
900 break;
901
902 default:
903 DBG_PRT(MSG_LEVEL_DEBUG, KERN_INFO "wpa_ioctl: unknown cmd=%d\n",
904 param->cmd);
905 kfree(param);
906 return -EOPNOTSUPP;
907 }
908
909 if ((ret == 0) && wpa_ioctl) {
910 if (copy_to_user(p->pointer, param, p->length)) {
911 ret = -EFAULT;
912 goto out;
913 }
914 }
915
916out:
917 kfree(param);
918 return ret;
919}
diff --git a/drivers/staging/vt6656/wpactl.h b/drivers/staging/vt6656/wpactl.h
index 00c8451ab50b..b4ec6b0e1c67 100644
--- a/drivers/staging/vt6656/wpactl.h
+++ b/drivers/staging/vt6656/wpactl.h
@@ -30,9 +30,7 @@
30#define __WPACTL_H__ 30#define __WPACTL_H__
31 31
32#include "device.h" 32#include "device.h"
33#ifdef WPA_SUPPLICANT_DRIVER_WEXT_SUPPORT
34#include "iowpa.h" 33#include "iowpa.h"
35#endif
36 34
37/*--------------------- Export Definitions -------------------------*/ 35/*--------------------- Export Definitions -------------------------*/
38 36
@@ -40,17 +38,11 @@
40//WPA related 38//WPA related
41 39
42typedef enum { WPA_ALG_NONE, WPA_ALG_WEP, WPA_ALG_TKIP, WPA_ALG_CCMP } wpa_alg; 40typedef enum { WPA_ALG_NONE, WPA_ALG_WEP, WPA_ALG_TKIP, WPA_ALG_CCMP } wpa_alg;
43typedef enum { CIPHER_NONE, CIPHER_WEP40, CIPHER_TKIP, CIPHER_CCMP,
44 CIPHER_WEP104 } wpa_cipher;
45typedef enum { KEY_MGMT_802_1X, KEY_MGMT_PSK, KEY_MGMT_NONE,
46 KEY_MGMT_802_1X_NO_WPA, KEY_MGMT_WPA_NONE, KEY_MGMT_CCKM } wpa_key_mgmt;//20080717-02,<Modify> by James Li
47 41
48#define AUTH_ALG_OPEN_SYSTEM 0x01 42#define AUTH_ALG_OPEN_SYSTEM 0x01
49#define AUTH_ALG_SHARED_KEY 0x02 43#define AUTH_ALG_SHARED_KEY 0x02
50#define AUTH_ALG_LEAP 0x04 44#define AUTH_ALG_LEAP 0x04
51 45
52#define GENERIC_INFO_ELEM 0xdd
53#define RSN_INFO_ELEM 0x30
54 46
55typedef unsigned long long NDIS_802_11_KEY_RSC; 47typedef unsigned long long NDIS_802_11_KEY_RSC;
56 48
@@ -60,8 +52,6 @@ typedef unsigned long long NDIS_802_11_KEY_RSC;
60 52
61/*--------------------- Export Functions --------------------------*/ 53/*--------------------- Export Functions --------------------------*/
62 54
63int wpa_set_wpadev(PSDevice pDevice, int val); 55int wpa_set_keys(PSDevice pDevice, void *ctx);
64int wpa_ioctl(PSDevice pDevice, struct iw_point *p);
65int wpa_set_keys(PSDevice pDevice, void *ctx, BOOL fcpfkernel);
66 56
67#endif /* __WPACL_H__ */ 57#endif /* __WPACL_H__ */
diff --git a/drivers/staging/winbond/mds.c b/drivers/staging/winbond/mds.c
index 1b8b8ace39e0..faa93f0ee102 100644
--- a/drivers/staging/winbond/mds.c
+++ b/drivers/staging/winbond/mds.c
@@ -315,7 +315,7 @@ static void Mds_HeaderCopy(struct wbsoft_priv *adapter, struct wb35_descriptor *
315 315
316 pT00->T00_tx_packet_id = pDes->Descriptor_ID; /* Set packet ID */ 316 pT00->T00_tx_packet_id = pDes->Descriptor_ID; /* Set packet ID */
317 pT00->T00_header_length = 24; /* Set header length */ 317 pT00->T00_header_length = 24; /* Set header length */
318 pT01->T01_retry_abort_ebable = 1; /* 921013 931130.5.h */ 318 pT01->T01_retry_abort_enable = 1; /* 921013 931130.5.h */
319 319
320 /* Key ID setup */ 320 /* Key ID setup */
321 pT01->T01_wep_id = 0; 321 pT01->T01_wep_id = 0;
@@ -476,11 +476,8 @@ Mds_Tx(struct wbsoft_priv *adapter)
476 /* 931130.5.b */ 476 /* 931130.5.b */
477 FragmentCount = PacketSize/FragmentThreshold + 1; 477 FragmentCount = PacketSize/FragmentThreshold + 1;
478 stmp = PacketSize + FragmentCount*32 + 8; /* 931130.5.c 8:MIC */ 478 stmp = PacketSize + FragmentCount*32 + 8; /* 931130.5.c 8:MIC */
479 if ((XmitBufSize + stmp) >= MAX_USB_TX_BUFFER) { 479 if ((XmitBufSize + stmp) >= MAX_USB_TX_BUFFER)
480 printk("[Mds_Tx] Excess max tx buffer.\n");
481 break; /* buffer is not enough */ 480 break; /* buffer is not enough */
482 }
483
484 481
485 /* 482 /*
486 * Start transmitting 483 * Start transmitting
diff --git a/drivers/staging/winbond/wb35rx_f.h b/drivers/staging/winbond/wb35rx_f.h
index 1fdf65ea6041..559bdca12e1a 100644
--- a/drivers/staging/winbond/wb35rx_f.h
+++ b/drivers/staging/winbond/wb35rx_f.h
@@ -4,12 +4,12 @@
4#include <net/mac80211.h> 4#include <net/mac80211.h>
5#include "wbhal.h" 5#include "wbhal.h"
6 6
7//==================================== 7/*
8// Interface function declare 8 * Interface function declaration
9//==================================== 9 */
10unsigned char Wb35Rx_initial( struct hw_data * pHwData ); 10unsigned char Wb35Rx_initial(struct hw_data *pHwData);
11void Wb35Rx_destroy( struct hw_data * pHwData ); 11void Wb35Rx_destroy(struct hw_data *pHwData);
12void Wb35Rx_stop( struct hw_data * pHwData ); 12void Wb35Rx_stop(struct hw_data *pHwData);
13void Wb35Rx_start(struct ieee80211_hw *hw); 13void Wb35Rx_start(struct ieee80211_hw *hw);
14 14
15#endif 15#endif
diff --git a/drivers/staging/winbond/wb35rx_s.h b/drivers/staging/winbond/wb35rx_s.h
index 4b03274a7d28..545bc9500723 100644
--- a/drivers/staging/winbond/wb35rx_s.h
+++ b/drivers/staging/winbond/wb35rx_s.h
@@ -1,44 +1,44 @@
1//============================================================================ 1#ifndef __WINBOND_35RX_S_H
2// wb35rx.h -- 2#define __WINBOND_35RX_S_H
3//============================================================================
4 3
5// Definition for this module used 4/* Definition for this module used */
6#define MAX_USB_RX_BUFFER 4096 // This parameter must be 4096 931130.4.f 5#define MAX_USB_RX_BUFFER 4096 /* This parameter must be 4096 931130.4.f */
6#define MAX_USB_RX_BUFFER_NUMBER ETHERNET_RX_DESCRIPTORS /* Maximum 254, 255 is RESERVED ID */
7#define RX_INTERFACE 0 /* Interface 1 */
8#define RX_PIPE 2 /* Pipe 3 */
9#define MAX_PACKET_SIZE 1600 /* 1568 = 8 + 1532 + 4 + 24(IV EIV MIC ICV CRC) for check DMA data 931130.4.g */
10#define RX_END_TAG 0x0badbeef
7 11
8#define MAX_USB_RX_BUFFER_NUMBER ETHERNET_RX_DESCRIPTORS // Maximum 254, 255 is RESERVED ID
9#define RX_INTERFACE 0 // Interface 1
10#define RX_PIPE 2 // Pipe 3
11#define MAX_PACKET_SIZE 1600 //1568 // 8 + 1532 + 4 + 24(IV EIV MIC ICV CRC) for check DMA data 931130.4.g
12#define RX_END_TAG 0x0badbeef
13 12
14 13/*
15//==================================== 14 * Internal variable for module
16// Internal variable for module 15 */
17//====================================
18struct wb35_rx { 16struct wb35_rx {
19 u32 ByteReceived;// For calculating throughput of BulkIn 17 u32 ByteReceived; /* For calculating throughput of BulkIn */
20 atomic_t RxFireCounter;// Does Wb35Rx module fire? 18 atomic_t RxFireCounter;/* Does Wb35Rx module fire? */
21 19
22 u8 RxBuffer[ MAX_USB_RX_BUFFER_NUMBER ][ ((MAX_USB_RX_BUFFER+3) & ~0x03 ) ]; 20 u8 RxBuffer[MAX_USB_RX_BUFFER_NUMBER][((MAX_USB_RX_BUFFER+3) & ~0x03)];
23 u16 RxBufferSize[ ((MAX_USB_RX_BUFFER_NUMBER+1) & ~0x01) ]; 21 u16 RxBufferSize[((MAX_USB_RX_BUFFER_NUMBER+1) & ~0x01)];
24 u8 RxOwner[ ((MAX_USB_RX_BUFFER_NUMBER+3) & ~0x03 ) ];//Ownership of buffer 0: SW 1:HW 22 u8 RxOwner[((MAX_USB_RX_BUFFER_NUMBER+3) & ~0x03)]; /* Ownership of buffer 0:SW 1:HW */
25 23
26 u32 RxProcessIndex;//The next index to process 24 u32 RxProcessIndex; /* The next index to process */
27 u32 RxBufferId; 25 u32 RxBufferId;
28 u32 EP3vm_state; 26 u32 EP3vm_state;
29 27
30 u32 rx_halt; // For VM stopping 28 u32 rx_halt; /* For VM stopping */
31 29
32 u16 MoreDataSize; 30 u16 MoreDataSize;
33 u16 PacketSize; 31 u16 PacketSize;
34 32
35 u32 CurrentRxBufferId; // For complete routine usage 33 u32 CurrentRxBufferId; /* For complete routine usage */
36 u32 Rx3UrbCancel; 34 u32 Rx3UrbCancel;
37 35
38 u32 LastR1; // For RSSI reporting 36 u32 LastR1; /* For RSSI reporting */
39 struct urb * RxUrb; 37 struct urb *RxUrb;
40 u32 Ep3ErrorCount2; // 20060625.1 Usbd for Rx DMA error count 38 u32 Ep3ErrorCount2; /* 20060625.1 Usbd for Rx DMA error count */
41 39
42 int EP3VM_status; 40 int EP3VM_status;
43 u8 * pDRx; 41 u8 *pDRx;
44}; 42};
43
44#endif /* __WINBOND_35RX_S_H */
diff --git a/drivers/staging/winbond/wbhal.h b/drivers/staging/winbond/wbhal.h
index 39e84a0d9729..289ee549146d 100644
--- a/drivers/staging/winbond/wbhal.h
+++ b/drivers/staging/winbond/wbhal.h
@@ -226,11 +226,11 @@ struct T01_descriptor {
226 u32 T01_add_challenge_text:1; 226 u32 T01_add_challenge_text:1;
227 u32 T01_inhibit_crc:1; 227 u32 T01_inhibit_crc:1;
228 u32 T01_loop_back_wep_mode:1; 228 u32 T01_loop_back_wep_mode:1;
229 u32 T01_retry_abort_ebable:1; 229 u32 T01_retry_abort_enable:1;
230 }; 230 };
231#else 231#else
232 struct { 232 struct {
233 u32 T01_retry_abort_ebable:1; 233 u32 T01_retry_abort_enable:1;
234 u32 T01_loop_back_wep_mode:1; 234 u32 T01_loop_back_wep_mode:1;
235 u32 T01_inhibit_crc:1; 235 u32 T01_inhibit_crc:1;
236 u32 T01_add_challenge_text:1; 236 u32 T01_add_challenge_text:1;
diff --git a/drivers/staging/winbond/wbusb.c b/drivers/staging/winbond/wbusb.c
index 48aa1361903e..3fa1ae4d3d76 100644
--- a/drivers/staging/winbond/wbusb.c
+++ b/drivers/staging/winbond/wbusb.c
@@ -79,18 +79,15 @@ static int wbsoft_add_interface(struct ieee80211_hw *dev,
79static void wbsoft_remove_interface(struct ieee80211_hw *dev, 79static void wbsoft_remove_interface(struct ieee80211_hw *dev,
80 struct ieee80211_vif *vif) 80 struct ieee80211_vif *vif)
81{ 81{
82 printk("wbsoft_remove interface called\n");
83} 82}
84 83
85static void wbsoft_stop(struct ieee80211_hw *hw) 84static void wbsoft_stop(struct ieee80211_hw *hw)
86{ 85{
87 printk(KERN_INFO "%s called\n", __func__);
88} 86}
89 87
90static int wbsoft_get_stats(struct ieee80211_hw *hw, 88static int wbsoft_get_stats(struct ieee80211_hw *hw,
91 struct ieee80211_low_level_stats *stats) 89 struct ieee80211_low_level_stats *stats)
92{ 90{
93 printk(KERN_INFO "%s called\n", __func__);
94 return 0; 91 return 0;
95} 92}
96 93
@@ -179,12 +176,9 @@ static void hal_set_current_channel_ex(struct hw_data *pHwData, struct chan_info
179 if (pHwData->SurpriseRemove) 176 if (pHwData->SurpriseRemove)
180 return; 177 return;
181 178
182 printk("Going to channel: %d/%d\n", channel.band, channel.ChanNo);
183
184 RFSynthesizer_SwitchingChannel(pHwData, channel); /* Switch channel */ 179 RFSynthesizer_SwitchingChannel(pHwData, channel); /* Switch channel */
185 pHwData->Channel = channel.ChanNo; 180 pHwData->Channel = channel.ChanNo;
186 pHwData->band = channel.band; 181 pHwData->band = channel.band;
187 pr_debug("Set channel is %d, band =%d\n", pHwData->Channel, pHwData->band);
188 reg->M28_MacControl &= ~0xff; /* Clean channel information field */ 182 reg->M28_MacControl &= ~0xff; /* Clean channel information field */
189 reg->M28_MacControl |= channel.ChanNo; 183 reg->M28_MacControl |= channel.ChanNo;
190 Wb35Reg_WriteWithCallbackValue(pHwData, 0x0828, reg->M28_MacControl, 184 Wb35Reg_WriteWithCallbackValue(pHwData, 0x0828, reg->M28_MacControl,
@@ -264,8 +258,6 @@ static int wbsoft_config(struct ieee80211_hw *dev, u32 changed)
264 struct wbsoft_priv *priv = dev->priv; 258 struct wbsoft_priv *priv = dev->priv;
265 struct chan_info ch; 259 struct chan_info ch;
266 260
267 printk("wbsoft_config called\n");
268
269 /* Should use channel_num, or something, as that is already pre-translated */ 261 /* Should use channel_num, or something, as that is already pre-translated */
270 ch.band = 1; 262 ch.band = 1;
271 ch.ChanNo = 1; 263 ch.ChanNo = 1;
@@ -282,7 +274,6 @@ static int wbsoft_config(struct ieee80211_hw *dev, u32 changed)
282 274
283static u64 wbsoft_get_tsf(struct ieee80211_hw *dev, struct ieee80211_vif *vif) 275static u64 wbsoft_get_tsf(struct ieee80211_hw *dev, struct ieee80211_vif *vif)
284{ 276{
285 printk("wbsoft_get_tsf called\n");
286 return 0; 277 return 0;
287} 278}
288 279
@@ -716,7 +707,6 @@ static int wb35_hw_init(struct ieee80211_hw *hw)
716 } 707 }
717 708
718 priv->sLocalPara.bAntennaNo = hal_get_antenna_number(pHwData); 709 priv->sLocalPara.bAntennaNo = hal_get_antenna_number(pHwData);
719 pr_debug("Driver init, antenna no = %d\n", priv->sLocalPara.bAntennaNo);
720 hal_get_hw_radio_off(pHwData); 710 hal_get_hw_radio_off(pHwData);
721 711
722 /* Waiting for HAL setting OK */ 712 /* Waiting for HAL setting OK */
@@ -782,9 +772,6 @@ static int wb35_probe(struct usb_interface *intf,
782 interface = intf->cur_altsetting; 772 interface = intf->cur_altsetting;
783 endpoint = &interface->endpoint[0].desc; 773 endpoint = &interface->endpoint[0].desc;
784 774
785 if (endpoint[2].wMaxPacketSize == 512)
786 printk("[w35und] Working on USB 2.0\n");
787
788 err = wb35_hw_init(dev); 775 err = wb35_hw_init(dev);
789 if (err) 776 if (err)
790 goto error_free_hw; 777 goto error_free_hw;
@@ -836,7 +823,6 @@ static void wb35_hw_halt(struct wbsoft_priv *adapter)
836{ 823{
837 /* Turn off Rx and Tx hardware ability */ 824 /* Turn off Rx and Tx hardware ability */
838 hal_stop(&adapter->sHwData); 825 hal_stop(&adapter->sHwData);
839 pr_debug("[w35und] Hal_stop O.K.\n");
840 /* Waiting Irp completed */ 826 /* Waiting Irp completed */
841 msleep(100); 827 msleep(100);
842 828
diff --git a/drivers/staging/wlags49_h2/ap_h2.c b/drivers/staging/wlags49_h2/ap_h2.c
index eb8244c4d6f0..e524153e925d 100644
--- a/drivers/staging/wlags49_h2/ap_h2.c
+++ b/drivers/staging/wlags49_h2/ap_h2.c
@@ -25,10 +25,10 @@
25 */ 25 */
26 26
27 27
28#include "hcfcfg.h" /* to get hcf_16 etc defined as well as */ 28#include "hcfcfg.h" /* to get hcf_16 etc defined as well as */
29 /* possible settings which inluence mdd.h or dhf.h */ 29 /* possible settings which inluence mdd.h or dhf.h */
30#include "mdd.h" /* to get COMP_ID_STA etc defined */ 30#include "mdd.h" /* to get COMP_ID_STA etc defined */
31#include "dhf.h" /* used to be "fhfmem.h", to get memblock,plugrecord, */ 31#include "dhf.h" /* used to be "fhfmem.h", to get memblock,plugrecord, */
32 32
33static const hcf_8 fw_image_1_data[] = { 33static const hcf_8 fw_image_1_data[] = {
34 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 34 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
@@ -3301,7 +3301,7 @@ static const CFG_RANGE20_STRCT fw_image_infocompat[] = {
3301 COMP_ROLE_SUPL, 3301 COMP_ROLE_SUPL,
3302 COMP_ID_APF, 3302 COMP_ID_APF,
3303 { 3303 {
3304 { 2, 2, 4 } /* variant, bottom, top */ 3304 { 2, 2, 4 } /* variant, bottom, top */
3305 } 3305 }
3306 }, 3306 },
3307 { 3 + ((20 * sizeof(CFG_RANGE_SPEC_STRCT)) / sizeof(hcf_16)), 3307 { 3 + ((20 * sizeof(CFG_RANGE_SPEC_STRCT)) / sizeof(hcf_16)),
@@ -3309,9 +3309,9 @@ static const CFG_RANGE20_STRCT fw_image_infocompat[] = {
3309 COMP_ROLE_ACT, 3309 COMP_ROLE_ACT,
3310 COMP_ID_MFI, 3310 COMP_ID_MFI,
3311 { 3311 {
3312 { 4, 6, 7 }, /* variant, bottom, top */ 3312 { 4, 6, 7 }, /* variant, bottom, top */
3313 { 5, 6, 7 }, /* variant, bottom, top */ 3313 { 5, 6, 7 }, /* variant, bottom, top */
3314 { 6, 6, 7 } /* variant, bottom, top */ 3314 { 6, 6, 7 } /* variant, bottom, top */
3315 } 3315 }
3316 }, 3316 },
3317 { 3 + ((20 * sizeof(CFG_RANGE_SPEC_STRCT)) / sizeof(hcf_16)), 3317 { 3 + ((20 * sizeof(CFG_RANGE_SPEC_STRCT)) / sizeof(hcf_16)),
@@ -3319,7 +3319,7 @@ static const CFG_RANGE20_STRCT fw_image_infocompat[] = {
3319 COMP_ROLE_ACT, 3319 COMP_ROLE_ACT,
3320 COMP_ID_CFI, 3320 COMP_ID_CFI,
3321 { 3321 {
3322 { 2, 1, 2 } /* variant, bottom, top */ 3322 { 2, 1, 2 } /* variant, bottom, top */
3323 } 3323 }
3324 }, 3324 },
3325 { 0000, 0000, 0000, 0000, { { 0000, 0000, 0000 } } } /* endsentinel */ 3325 { 0000, 0000, 0000, 0000, { { 0000, 0000, 0000 } } } /* endsentinel */
diff --git a/drivers/staging/wlags49_h2/man/wlags49.4 b/drivers/staging/wlags49_h2/man/wlags49.4
index a34588530740..37df99879183 100644
--- a/drivers/staging/wlags49_h2/man/wlags49.4
+++ b/drivers/staging/wlags49_h2/man/wlags49.4
@@ -108,7 +108,7 @@ with the I/O base address and MAC address used by the card.
108 \- Card power management 108 \- Card power management
109 \- Support for Hermes-II & Hermes-II.5 based PCMCIA, Mini PCI, and CardBus cards 109 \- Support for Hermes-II & Hermes-II.5 based PCMCIA, Mini PCI, and CardBus cards
110 \- Wired Equivalent Privacy (WEP) 110 \- Wired Equivalent Privacy (WEP)
111 \- WPA-PSK support (EXPERIMENTAL) 111 \- WPA-PSK support
112 \- Driver utility interface (UIL) 112 \- Driver utility interface (UIL)
113 \- Wireless Extensions 113 \- Wireless Extensions
114 \- Software AP mode 114 \- Software AP mode
diff --git a/drivers/staging/wlags49_h2/wl_if.h b/drivers/staging/wlags49_h2/wl_if.h
index 6d66dabf032c..425d3733b362 100644
--- a/drivers/staging/wlags49_h2/wl_if.h
+++ b/drivers/staging/wlags49_h2/wl_if.h
@@ -71,45 +71,39 @@
71#define MAX_LTV_BUF_SIZE (512 - (sizeof(hcf_16) * 2)) 71#define MAX_LTV_BUF_SIZE (512 - (sizeof(hcf_16) * 2))
72 72
73#define HCF_TALLIES_SIZE (sizeof(CFG_HERMES_TALLIES_STRCT) + \ 73#define HCF_TALLIES_SIZE (sizeof(CFG_HERMES_TALLIES_STRCT) + \
74 (sizeof(hcf_16) * 2)) 74 (sizeof(hcf_16) * 2))
75 75
76#define HCF_MAX_MULTICAST 16 76#define HCF_MAX_MULTICAST 16
77#define HCF_MAX_NAME_LEN 32 77#define HCF_MAX_NAME_LEN 32
78#define MAX_LINE_SIZE 256 78#define MAX_LINE_SIZE 256
79#define HCF_NUM_IO_PORTS 0x80 79#define HCF_NUM_IO_PORTS 0x80
80#define TX_TIMEOUT ((800 * HZ) / 1000) 80#define TX_TIMEOUT ((800 * HZ) / 1000)
81 81
82 82
83//#define HCF_MIN_COMM_QUALITY 0 83/* PE1DNN
84//#define HCF_MAX_COMM_QUALITY 92 84 * Better data from the real world. Not scientific but empirical data gathered
85//#define HCF_MIN_SIGNAL_LEVEL 47 85 * from a Thomson Speedtouch 110 which is identified as:
86//#define HCF_MAX_SIGNAL_LEVEL 138 86 * PCMCIA Info: "Agere Systems" "Wireless PC Card Model 0110"
87//#define HCF_MIN_NOISE_LEVEL 47 87 * Manufacture ID: 0156,0003
88//#define HCF_MAX_NOISE_LEVEL 138 88 * Lowest measurment for noise floor seen is value 54
89//#define HCF_0DBM_OFFSET 149 89 * Highest signal strength in close proximity to the AP seen is value 118
90 90 * Very good must be around 100 (otherwise its never "full scale"
91// PE1DNN 91 * All other constants are derrived from these. This makes the signal gauge
92// Better data from the real world. Not scientific but empirical data gathered 92 * work for me...
93// from a Thomson Speedtouch 110 which is identified as: 93 */
94// PCMCIA Info: "Agere Systems" "Wireless PC Card Model 0110"
95// Manufacture ID: 0156,0003
96// Lowest measurment for noise floor seen is value 54
97// Highest signal strength in close proximity to the AP seen is value 118
98// Very good must be around 100 (otherwise its never "full scale"
99// All other constants are derrived from these. This makes the signal gauge
100// work for me...
101#define HCF_MIN_SIGNAL_LEVEL 54 94#define HCF_MIN_SIGNAL_LEVEL 54
102#define HCF_MAX_SIGNAL_LEVEL 100 95#define HCF_MAX_SIGNAL_LEVEL 100
103#define HCF_MIN_NOISE_LEVEL HCF_MIN_SIGNAL_LEVEL 96#define HCF_MIN_NOISE_LEVEL HCF_MIN_SIGNAL_LEVEL
104#define HCF_MAX_NOISE_LEVEL HCF_MAX_SIGNAL_LEVEL 97#define HCF_MAX_NOISE_LEVEL HCF_MAX_SIGNAL_LEVEL
105#define HCF_0DBM_OFFSET (HCF_MAX_SIGNAL_LEVEL + 1) 98#define HCF_0DBM_OFFSET (HCF_MAX_SIGNAL_LEVEL + 1)
106#define HCF_MIN_COMM_QUALITY 0 99#define HCF_MIN_COMM_QUALITY 0
107#define HCF_MAX_COMM_QUALITY (HCF_MAX_SIGNAL_LEVEL - HCF_MIN_NOISE_LEVEL + 1) 100#define HCF_MAX_COMM_QUALITY (HCF_MAX_SIGNAL_LEVEL - \
101 HCF_MIN_NOISE_LEVEL + 1)
108 102
109 103
110/* For encryption (WEP) */ 104/* For encryption (WEP) */
111#define MIN_KEY_SIZE 5 // 40 bits RC4 - WEP 105#define MIN_KEY_SIZE 5 /* 40 bits RC4 - WEP */
112#define MAX_KEY_SIZE 13 // 104 bits 106#define MAX_KEY_SIZE 13 /* 104 bits */
113#define MAX_KEYS 4 107#define MAX_KEYS 4
114 108
115#define RADIO_CHANNELS 14 109#define RADIO_CHANNELS 14
@@ -121,12 +115,12 @@
121#define MAX_RTS_BYTES 2347 115#define MAX_RTS_BYTES 2347
122 116
123#define MAX_RATES 8 117#define MAX_RATES 8
124#define MEGABIT 1024*1024 118#define MEGABIT (1024 * 1024)
125 119
126#define HCF_FAILURE 0xFF 120#define HCF_FAILURE 0xFF
127#define UIL_FAILURE 0xFF 121#define UIL_FAILURE 0xFF
128#define CFG_UIL_CONNECT 0xA123 // Define differently? 122#define CFG_UIL_CONNECT 0xA123 /* Define differently? */
129#define CFG_UIL_CONNECT_ACK_CODE 0x5653435A // VSCZ 123#define CFG_UIL_CONNECT_ACK_CODE 0x5653435A /* VSCZ */
130#define WVLAN2_UIL_CONNECTED (0x01L << 0) 124#define WVLAN2_UIL_CONNECTED (0x01L << 0)
131#define WVLAN2_UIL_BUSY (0x01L << 1) 125#define WVLAN2_UIL_BUSY (0x01L << 1)
132 126
@@ -154,15 +148,15 @@ UIL_FUN_GET_INFO
154UIL_FUN_PUT_INFO 148UIL_FUN_PUT_INFO
155*/ 149*/
156 150
157#define SIOCSIWNETNAME SIOCDEVPRIVATE+1 151#define SIOCSIWNETNAME (SIOCDEVPRIVATE + 1)
158#define SIOCGIWNETNAME SIOCDEVPRIVATE+2 152#define SIOCGIWNETNAME (SIOCDEVPRIVATE + 2)
159#define SIOCSIWSTANAME SIOCDEVPRIVATE+3 153#define SIOCSIWSTANAME (SIOCDEVPRIVATE + 3)
160#define SIOCGIWSTANAME SIOCDEVPRIVATE+4 154#define SIOCGIWSTANAME (SIOCDEVPRIVATE + 4)
161#define SIOCSIWPORTTYPE SIOCDEVPRIVATE+5 155#define SIOCSIWPORTTYPE (SIOCDEVPRIVATE + 5)
162#define SIOCGIWPORTTYPE SIOCDEVPRIVATE+6 156#define SIOCGIWPORTTYPE (SIOCDEVPRIVATE + 6)
163 157
164/* IOCTL code for the RTS interface */ 158/* IOCTL code for the RTS interface */
165#define WL_IOCTL_RTS SIOCDEVPRIVATE+7 159#define WL_IOCTL_RTS (SIOCDEVPRIVATE + 7)
166 160
167/* IOCTL subcodes for WL_IOCTL_RTS */ 161/* IOCTL subcodes for WL_IOCTL_RTS */
168#define WL_IOCTL_RTS_READ 1 162#define WL_IOCTL_RTS_READ 1
@@ -174,61 +168,54 @@ UIL_FUN_PUT_INFO
174/******************************************************************************* 168/*******************************************************************************
175 * STRUCTURE DEFINITIONS 169 * STRUCTURE DEFINITIONS
176 ******************************************************************************/ 170 ******************************************************************************/
177typedef struct 171typedef struct {
178{ 172 __u16 length;
179 __u16 length; 173 __u8 name[HCF_MAX_NAME_LEN];
180 __u8 name[HCF_MAX_NAME_LEN];
181} 174}
182wvName_t; 175wvName_t;
183 176
184 177
185typedef struct 178typedef struct {
186{ 179 hcf_16 len;
187 hcf_16 len; 180 hcf_16 typ;
188 hcf_16 typ; 181 union {
189 union 182 hcf_8 u8[MAX_LTV_BUF_SIZE / sizeof(hcf_8)];
190 { 183 hcf_16 u16[MAX_LTV_BUF_SIZE / sizeof(hcf_16)];
191 hcf_8 u8[MAX_LTV_BUF_SIZE / sizeof(hcf_8)]; 184 hcf_32 u32[MAX_LTV_BUF_SIZE / sizeof(hcf_32)];
192 hcf_16 u16[MAX_LTV_BUF_SIZE / sizeof(hcf_16)]; 185 } u;
193 hcf_32 u32[MAX_LTV_BUF_SIZE / sizeof(hcf_32)];
194 } u;
195} 186}
196ltv_t; 187ltv_t;
197 188
198 189
199struct uilreq 190struct uilreq {
200{ 191 union {
201 union 192 char ifrn_name[IFNAMSIZ];
202 { 193 } ifr_ifrn;
203 char ifrn_name[IFNAMSIZ];
204 } ifr_ifrn;
205 194
206 IFBP hcfCtx; 195 IFBP hcfCtx;
207 __u8 command; 196 __u8 command;
208 __u8 result; 197 __u8 result;
209 198
210 /* The data field in this structure is typically an LTV of some type. The 199 /* The data field in this structure is typically an LTV of some type.
211 len field is the size of the buffer in bytes, as opposed to words (like 200 The len field is the size of the buffer in bytes, as opposed to words
212 the L-field in the LTV */ 201 (like the L-field in the LTV */
213 __u16 len; 202 __u16 len;
214 void *data; 203 void *data;
215}; 204};
216 205
217 206
218struct rtsreq 207struct rtsreq {
219{ 208 union {
220 union 209 char ifrn_name[IFNAMSIZ];
221 { 210 }
222 char ifrn_name[IFNAMSIZ]; 211 ifr_ifrn;
223 }
224 ifr_ifrn;
225 212
226 __u16 typ; 213 __u16 typ;
227 __u16 reg; 214 __u16 reg;
228 __u16 len; 215 __u16 len;
229 __u16 *data; 216 __u16 *data;
230}; 217};
231 218
232 219
233#endif // __WAVELAN2_IF_H__ 220#endif /* __WAVELAN2_IF_H__ */
234 221
diff --git a/drivers/staging/wlags49_h2/wl_pci.c b/drivers/staging/wlags49_h2/wl_pci.c
index a09c3ac793a2..6226e5eebf3a 100644
--- a/drivers/staging/wlags49_h2/wl_pci.c
+++ b/drivers/staging/wlags49_h2/wl_pci.c
@@ -111,7 +111,7 @@ extern dbg_info_t *DbgInfo;
111#endif // DBG 111#endif // DBG
112 112
113/* define the PCI device Table Cardname and id tables */ 113/* define the PCI device Table Cardname and id tables */
114static struct pci_device_id wl_pci_tbl[] __devinitdata = { 114static struct pci_device_id wl_pci_tbl[] = {
115 { PCI_DEVICE(PCI_VENDOR_ID_WL_LKM, PCI_DEVICE_ID_WL_LKM_0), }, 115 { PCI_DEVICE(PCI_VENDOR_ID_WL_LKM, PCI_DEVICE_ID_WL_LKM_0), },
116 { PCI_DEVICE(PCI_VENDOR_ID_WL_LKM, PCI_DEVICE_ID_WL_LKM_1), }, 116 { PCI_DEVICE(PCI_VENDOR_ID_WL_LKM, PCI_DEVICE_ID_WL_LKM_1), },
117 { PCI_DEVICE(PCI_VENDOR_ID_WL_LKM, PCI_DEVICE_ID_WL_LKM_2), }, 117 { PCI_DEVICE(PCI_VENDOR_ID_WL_LKM, PCI_DEVICE_ID_WL_LKM_2), },
@@ -124,9 +124,9 @@ MODULE_DEVICE_TABLE(pci, wl_pci_tbl);
124/******************************************************************************* 124/*******************************************************************************
125 * function prototypes 125 * function prototypes
126 ******************************************************************************/ 126 ******************************************************************************/
127int __devinit wl_pci_probe( struct pci_dev *pdev, 127int wl_pci_probe( struct pci_dev *pdev,
128 const struct pci_device_id *ent ); 128 const struct pci_device_id *ent );
129void __devexit wl_pci_remove(struct pci_dev *pdev); 129void wl_pci_remove(struct pci_dev *pdev);
130int wl_pci_setup( struct pci_dev *pdev ); 130int wl_pci_setup( struct pci_dev *pdev );
131void wl_pci_enable_cardbus_interrupts( struct pci_dev *pdev ); 131void wl_pci_enable_cardbus_interrupts( struct pci_dev *pdev );
132 132
@@ -160,14 +160,13 @@ void wl_pci_dma_hcf_reclaim_rx( struct wl_private *lp );
160/******************************************************************************* 160/*******************************************************************************
161 * PCI module function registration 161 * PCI module function registration
162 ******************************************************************************/ 162 ******************************************************************************/
163static struct pci_driver wl_driver = 163static struct pci_driver wl_driver = {
164{ 164 .name = MODULE_NAME,
165 name: MODULE_NAME, 165 .id_table = wl_pci_tbl,
166 id_table: wl_pci_tbl, 166 .probe = wl_pci_probe,
167 probe: wl_pci_probe, 167 .remove = wl_pci_remove,
168 remove: __devexit_p(wl_pci_remove), 168 .suspend = NULL,
169 suspend: NULL, 169 .resume = NULL
170 resume: NULL,
171}; 170};
172 171
173/******************************************************************************* 172/*******************************************************************************
@@ -399,7 +398,7 @@ int wl_adapter_is_open( struct net_device *dev )
399 * errno value otherwise 398 * errno value otherwise
400 * 399 *
401 ******************************************************************************/ 400 ******************************************************************************/
402int __devinit wl_pci_probe( struct pci_dev *pdev, 401int wl_pci_probe( struct pci_dev *pdev,
403 const struct pci_device_id *ent ) 402 const struct pci_device_id *ent )
404{ 403{
405 int result; 404 int result;
@@ -436,7 +435,7 @@ int __devinit wl_pci_probe( struct pci_dev *pdev,
436 * N/A 435 * N/A
437 * 436 *
438 ******************************************************************************/ 437 ******************************************************************************/
439void __devexit wl_pci_remove(struct pci_dev *pdev) 438void wl_pci_remove(struct pci_dev *pdev)
440{ 439{
441 struct net_device *dev = NULL; 440 struct net_device *dev = NULL;
442 /*------------------------------------------------------------------------*/ 441 /*------------------------------------------------------------------------*/
diff --git a/drivers/staging/wlan-ng/hfa384x_usb.c b/drivers/staging/wlan-ng/hfa384x_usb.c
index f180c3d8b012..c1a8cb625154 100644
--- a/drivers/staging/wlan-ng/hfa384x_usb.c
+++ b/drivers/staging/wlan-ng/hfa384x_usb.c
@@ -171,11 +171,11 @@ static void hfa384x_ctlxout_callback(struct urb *urb);
171static void hfa384x_usbin_callback(struct urb *urb); 171static void hfa384x_usbin_callback(struct urb *urb);
172 172
173static void 173static void
174hfa384x_usbin_txcompl(wlandevice_t *wlandev, hfa384x_usbin_t * usbin); 174hfa384x_usbin_txcompl(wlandevice_t *wlandev, hfa384x_usbin_t *usbin);
175 175
176static void hfa384x_usbin_rx(wlandevice_t *wlandev, struct sk_buff *skb); 176static void hfa384x_usbin_rx(wlandevice_t *wlandev, struct sk_buff *skb);
177 177
178static void hfa384x_usbin_info(wlandevice_t *wlandev, hfa384x_usbin_t * usbin); 178static void hfa384x_usbin_info(wlandevice_t *wlandev, hfa384x_usbin_t *usbin);
179 179
180static void 180static void
181hfa384x_usbout_tx(wlandevice_t *wlandev, hfa384x_usbout_t *usbout); 181hfa384x_usbout_tx(wlandevice_t *wlandev, hfa384x_usbout_t *usbout);
@@ -285,7 +285,7 @@ static inline const char *ctlxstr(CTLX_STATE s)
285 return ctlx_str[s]; 285 return ctlx_str[s];
286}; 286};
287 287
288static inline hfa384x_usbctlx_t *get_active_ctlx(hfa384x_t * hw) 288static inline hfa384x_usbctlx_t *get_active_ctlx(hfa384x_t *hw)
289{ 289{
290 return list_entry(hw->ctlxq.active.next, hfa384x_usbctlx_t, list); 290 return list_entry(hw->ctlxq.active.next, hfa384x_usbctlx_t, list);
291} 291}
diff --git a/drivers/staging/xgifb/TODO b/drivers/staging/xgifb/TODO
index 13d9bc25797d..392b29d8f134 100644
--- a/drivers/staging/xgifb/TODO
+++ b/drivers/staging/xgifb/TODO
@@ -1,4 +1,4 @@
1This drivers still need a lot of work. I can list all cleanups to do but it's 1This drivers still needs a lot of work. I can list all cleanups to do but it's
2going to be long. So, I'm writing "cleanups" and not the list. 2going to be long. So, I'm writing "cleanups" and not the list.
3 3
4Arnaud 4Arnaud
diff --git a/drivers/staging/xgifb/XGI_main_26.c b/drivers/staging/xgifb/XGI_main_26.c
index f775c5453845..e0f745de7e7a 100644
--- a/drivers/staging/xgifb/XGI_main_26.c
+++ b/drivers/staging/xgifb/XGI_main_26.c
@@ -73,9 +73,9 @@ static int XGIfb_mode_rate_to_dclock(struct vb_device_info *XGI_Pr,
73 RefreshRateTableIndex = XGI_GetRatePtrCRT2(HwDeviceExtension, ModeNo, 73 RefreshRateTableIndex = XGI_GetRatePtrCRT2(HwDeviceExtension, ModeNo,
74 ModeIdIndex, XGI_Pr); 74 ModeIdIndex, XGI_Pr);
75 75
76 ClockIndex = XGI_Pr->RefIndex[RefreshRateTableIndex].Ext_CRTVCLK; 76 ClockIndex = XGI330_RefIndex[RefreshRateTableIndex].Ext_CRTVCLK;
77 77
78 Clock = XGI_Pr->VCLKData[ClockIndex].CLOCK * 1000; 78 Clock = XGI_VCLKData[ClockIndex].CLOCK * 1000;
79 79
80 return Clock; 80 return Clock;
81} 81}
@@ -101,35 +101,35 @@ static int XGIfb_mode_rate_to_ddata(struct vb_device_info *XGI_Pr,
101 return 0; 101 return 0;
102 RefreshRateTableIndex = XGI_GetRatePtrCRT2(HwDeviceExtension, ModeNo, 102 RefreshRateTableIndex = XGI_GetRatePtrCRT2(HwDeviceExtension, ModeNo,
103 ModeIdIndex, XGI_Pr); 103 ModeIdIndex, XGI_Pr);
104 index = XGI_Pr->RefIndex[RefreshRateTableIndex].Ext_CRT1CRTC; 104 index = XGI330_RefIndex[RefreshRateTableIndex].Ext_CRT1CRTC;
105 105
106 sr_data = XGI_Pr->XGINEWUB_CRT1Table[index].CR[5]; 106 sr_data = XGI_CRT1Table[index].CR[5];
107 107
108 cr_data = XGI_Pr->XGINEWUB_CRT1Table[index].CR[0]; 108 cr_data = XGI_CRT1Table[index].CR[0];
109 109
110 /* Horizontal total */ 110 /* Horizontal total */
111 HT = (cr_data & 0xff) | ((unsigned short) (sr_data & 0x03) << 8); 111 HT = (cr_data & 0xff) | ((unsigned short) (sr_data & 0x03) << 8);
112 A = HT + 5; 112 A = HT + 5;
113 113
114 HDE = (XGI_Pr->RefIndex[RefreshRateTableIndex].XRes >> 3) - 1; 114 HDE = (XGI330_RefIndex[RefreshRateTableIndex].XRes >> 3) - 1;
115 E = HDE + 1; 115 E = HDE + 1;
116 116
117 cr_data = XGI_Pr->XGINEWUB_CRT1Table[index].CR[3]; 117 cr_data = XGI_CRT1Table[index].CR[3];
118 118
119 /* Horizontal retrace (=sync) start */ 119 /* Horizontal retrace (=sync) start */
120 HRS = (cr_data & 0xff) | ((unsigned short) (sr_data & 0xC0) << 2); 120 HRS = (cr_data & 0xff) | ((unsigned short) (sr_data & 0xC0) << 2);
121 F = HRS - E - 3; 121 F = HRS - E - 3;
122 122
123 cr_data = XGI_Pr->XGINEWUB_CRT1Table[index].CR[1]; 123 cr_data = XGI_CRT1Table[index].CR[1];
124 124
125 /* Horizontal blank start */ 125 /* Horizontal blank start */
126 HBS = (cr_data & 0xff) | ((unsigned short) (sr_data & 0x30) << 4); 126 HBS = (cr_data & 0xff) | ((unsigned short) (sr_data & 0x30) << 4);
127 127
128 sr_data = XGI_Pr->XGINEWUB_CRT1Table[index].CR[6]; 128 sr_data = XGI_CRT1Table[index].CR[6];
129 129
130 cr_data = XGI_Pr->XGINEWUB_CRT1Table[index].CR[2]; 130 cr_data = XGI_CRT1Table[index].CR[2];
131 131
132 cr_data2 = XGI_Pr->XGINEWUB_CRT1Table[index].CR[4]; 132 cr_data2 = XGI_CRT1Table[index].CR[4];
133 133
134 /* Horizontal blank end */ 134 /* Horizontal blank end */
135 HBE = (cr_data & 0x1f) | ((unsigned short) (cr_data2 & 0x80) >> 2) 135 HBE = (cr_data & 0x1f) | ((unsigned short) (cr_data2 & 0x80) >> 2)
@@ -150,11 +150,11 @@ static int XGIfb_mode_rate_to_ddata(struct vb_device_info *XGI_Pr,
150 *right_margin = F * 8; 150 *right_margin = F * 8;
151 *hsync_len = C * 8; 151 *hsync_len = C * 8;
152 152
153 sr_data = XGI_Pr->XGINEWUB_CRT1Table[index].CR[14]; 153 sr_data = XGI_CRT1Table[index].CR[14];
154 154
155 cr_data = XGI_Pr->XGINEWUB_CRT1Table[index].CR[8]; 155 cr_data = XGI_CRT1Table[index].CR[8];
156 156
157 cr_data2 = XGI_Pr->XGINEWUB_CRT1Table[index].CR[9]; 157 cr_data2 = XGI_CRT1Table[index].CR[9];
158 158
159 /* Vertical total */ 159 /* Vertical total */
160 VT = (cr_data & 0xFF) | ((unsigned short) (cr_data2 & 0x01) << 8) 160 VT = (cr_data & 0xFF) | ((unsigned short) (cr_data2 & 0x01) << 8)
@@ -162,10 +162,10 @@ static int XGIfb_mode_rate_to_ddata(struct vb_device_info *XGI_Pr,
162 | ((unsigned short) (sr_data & 0x01) << 10); 162 | ((unsigned short) (sr_data & 0x01) << 10);
163 A = VT + 2; 163 A = VT + 2;
164 164
165 VDE = XGI_Pr->RefIndex[RefreshRateTableIndex].YRes - 1; 165 VDE = XGI330_RefIndex[RefreshRateTableIndex].YRes - 1;
166 E = VDE + 1; 166 E = VDE + 1;
167 167
168 cr_data = XGI_Pr->XGINEWUB_CRT1Table[index].CR[10]; 168 cr_data = XGI_CRT1Table[index].CR[10];
169 169
170 /* Vertical retrace (=sync) start */ 170 /* Vertical retrace (=sync) start */
171 VRS = (cr_data & 0xff) | ((unsigned short) (cr_data2 & 0x04) << 6) 171 VRS = (cr_data & 0xff) | ((unsigned short) (cr_data2 & 0x04) << 6)
@@ -173,23 +173,23 @@ static int XGIfb_mode_rate_to_ddata(struct vb_device_info *XGI_Pr,
173 | ((unsigned short) (sr_data & 0x08) << 7); 173 | ((unsigned short) (sr_data & 0x08) << 7);
174 F = VRS + 1 - E; 174 F = VRS + 1 - E;
175 175
176 cr_data = XGI_Pr->XGINEWUB_CRT1Table[index].CR[12]; 176 cr_data = XGI_CRT1Table[index].CR[12];
177 177
178 cr_data3 = (XGI_Pr->XGINEWUB_CRT1Table[index].CR[14] & 0x80) << 5; 178 cr_data3 = (XGI_CRT1Table[index].CR[14] & 0x80) << 5;
179 179
180 /* Vertical blank start */ 180 /* Vertical blank start */
181 VBS = (cr_data & 0xff) | ((unsigned short) (cr_data2 & 0x08) << 5) 181 VBS = (cr_data & 0xff) | ((unsigned short) (cr_data2 & 0x08) << 5)
182 | ((unsigned short) (cr_data3 & 0x20) << 4) 182 | ((unsigned short) (cr_data3 & 0x20) << 4)
183 | ((unsigned short) (sr_data & 0x04) << 8); 183 | ((unsigned short) (sr_data & 0x04) << 8);
184 184
185 cr_data = XGI_Pr->XGINEWUB_CRT1Table[index].CR[13]; 185 cr_data = XGI_CRT1Table[index].CR[13];
186 186
187 /* Vertical blank end */ 187 /* Vertical blank end */
188 VBE = (cr_data & 0xff) | ((unsigned short) (sr_data & 0x10) << 4); 188 VBE = (cr_data & 0xff) | ((unsigned short) (sr_data & 0x10) << 4);
189 temp = VBE - ((E - 1) & 511); 189 temp = VBE - ((E - 1) & 511);
190 B = (temp > 0) ? temp : (temp + 512); 190 B = (temp > 0) ? temp : (temp + 512);
191 191
192 cr_data = XGI_Pr->XGINEWUB_CRT1Table[index].CR[11]; 192 cr_data = XGI_CRT1Table[index].CR[11];
193 193
194 /* Vertical retrace (=sync) end */ 194 /* Vertical retrace (=sync) end */
195 VRE = (cr_data & 0x0f) | ((sr_data & 0x20) >> 1); 195 VRE = (cr_data & 0x0f) | ((sr_data & 0x20) >> 1);
@@ -202,25 +202,25 @@ static int XGIfb_mode_rate_to_ddata(struct vb_device_info *XGI_Pr,
202 *lower_margin = F; 202 *lower_margin = F;
203 *vsync_len = C; 203 *vsync_len = C;
204 204
205 if (XGI_Pr->RefIndex[RefreshRateTableIndex].Ext_InfoFlag & 0x8000) 205 if (XGI330_RefIndex[RefreshRateTableIndex].Ext_InfoFlag & 0x8000)
206 *sync &= ~FB_SYNC_VERT_HIGH_ACT; 206 *sync &= ~FB_SYNC_VERT_HIGH_ACT;
207 else 207 else
208 *sync |= FB_SYNC_VERT_HIGH_ACT; 208 *sync |= FB_SYNC_VERT_HIGH_ACT;
209 209
210 if (XGI_Pr->RefIndex[RefreshRateTableIndex].Ext_InfoFlag & 0x4000) 210 if (XGI330_RefIndex[RefreshRateTableIndex].Ext_InfoFlag & 0x4000)
211 *sync &= ~FB_SYNC_HOR_HIGH_ACT; 211 *sync &= ~FB_SYNC_HOR_HIGH_ACT;
212 else 212 else
213 *sync |= FB_SYNC_HOR_HIGH_ACT; 213 *sync |= FB_SYNC_HOR_HIGH_ACT;
214 214
215 *vmode = FB_VMODE_NONINTERLACED; 215 *vmode = FB_VMODE_NONINTERLACED;
216 if (XGI_Pr->RefIndex[RefreshRateTableIndex].Ext_InfoFlag & 0x0080) 216 if (XGI330_RefIndex[RefreshRateTableIndex].Ext_InfoFlag & 0x0080)
217 *vmode = FB_VMODE_INTERLACED; 217 *vmode = FB_VMODE_INTERLACED;
218 else { 218 else {
219 j = 0; 219 j = 0;
220 while (XGI_Pr->EModeIDTable[j].Ext_ModeID != 0xff) { 220 while (XGI330_EModeIDTable[j].Ext_ModeID != 0xff) {
221 if (XGI_Pr->EModeIDTable[j].Ext_ModeID == 221 if (XGI330_EModeIDTable[j].Ext_ModeID ==
222 XGI_Pr->RefIndex[RefreshRateTableIndex].ModeID) { 222 XGI330_RefIndex[RefreshRateTableIndex].ModeID) {
223 if (XGI_Pr->EModeIDTable[j].Ext_ModeFlag & 223 if (XGI330_EModeIDTable[j].Ext_ModeFlag &
224 DoubleScanMode) { 224 DoubleScanMode) {
225 *vmode = FB_VMODE_DOUBLE; 225 *vmode = FB_VMODE_DOUBLE;
226 } 226 }
@@ -1695,7 +1695,7 @@ static int __init XGIfb_setup(char *options)
1695 return 0; 1695 return 0;
1696} 1696}
1697 1697
1698static int __devinit xgifb_probe(struct pci_dev *pdev, 1698static int xgifb_probe(struct pci_dev *pdev,
1699 const struct pci_device_id *ent) 1699 const struct pci_device_id *ent)
1700{ 1700{
1701 u8 reg, reg1; 1701 u8 reg, reg1;
@@ -2103,7 +2103,7 @@ error:
2103/* PCI DEVICE HANDLING */ 2103/* PCI DEVICE HANDLING */
2104/*****************************************************/ 2104/*****************************************************/
2105 2105
2106static void __devexit xgifb_remove(struct pci_dev *pdev) 2106static void xgifb_remove(struct pci_dev *pdev)
2107{ 2107{
2108 struct xgifb_video_info *xgifb_info = pci_get_drvdata(pdev); 2108 struct xgifb_video_info *xgifb_info = pci_get_drvdata(pdev);
2109 struct fb_info *fb_info = xgifb_info->fb_info; 2109 struct fb_info *fb_info = xgifb_info->fb_info;
@@ -2127,7 +2127,7 @@ static struct pci_driver xgifb_driver = {
2127 .name = "xgifb", 2127 .name = "xgifb",
2128 .id_table = xgifb_pci_table, 2128 .id_table = xgifb_pci_table,
2129 .probe = xgifb_probe, 2129 .probe = xgifb_probe,
2130 .remove = __devexit_p(xgifb_remove) 2130 .remove = xgifb_remove
2131}; 2131};
2132 2132
2133 2133
diff --git a/drivers/staging/xgifb/vb_def.h b/drivers/staging/xgifb/vb_def.h
index 77137e4452a0..148f6373c9a2 100644
--- a/drivers/staging/xgifb/vb_def.h
+++ b/drivers/staging/xgifb/vb_def.h
@@ -254,9 +254,16 @@
254#define XGI330_SR1F 0 254#define XGI330_SR1F 0
255#define XGI330_SR23 0xf6 255#define XGI330_SR23 0xf6
256#define XGI330_SR24 0x0d 256#define XGI330_SR24 0x0d
257#define XGI330_SR25 0
258#define XGI330_SR31 0xc0 257#define XGI330_SR31 0xc0
259#define XGI330_SR32 0x11 258#define XGI330_SR32 0x11
260#define XGI330_SR33 0 259#define XGI330_SR33 0
261 260
261extern const struct XGI_ExtStruct XGI330_EModeIDTable[];
262extern const struct XGI_Ext2Struct XGI330_RefIndex[];
263extern const struct XGI_CRT1TableStruct XGI_CRT1Table[];
264extern const struct XGI_ECLKDataStruct XGI340_ECLKData[];
265extern const struct SiS_VCLKData XGI_VCLKData[];
266extern const unsigned char XGI340_CR6B[][4];
267extern const unsigned char XGI340_AGPReg[];
268
262#endif 269#endif
diff --git a/drivers/staging/xgifb/vb_init.c b/drivers/staging/xgifb/vb_init.c
index 7739dbd9f029..2b791c10eb15 100644
--- a/drivers/staging/xgifb/vb_init.c
+++ b/drivers/staging/xgifb/vb_init.c
@@ -94,8 +94,8 @@ static void XGINew_DDR1x_MRS_340(unsigned long P3c4,
94 0x18, 94 0x18,
95 pVBInfo->SR15[2][pVBInfo->ram_type]); /* SR18 */ 95 pVBInfo->SR15[2][pVBInfo->ram_type]); /* SR18 */
96 xgifb_reg_set(P3c4, 0x19, 0x01); 96 xgifb_reg_set(P3c4, 0x19, 0x01);
97 xgifb_reg_set(P3c4, 0x16, pVBInfo->SR16[0]); 97 xgifb_reg_set(P3c4, 0x16, 0x03);
98 xgifb_reg_set(P3c4, 0x16, pVBInfo->SR16[1]); 98 xgifb_reg_set(P3c4, 0x16, 0x83);
99 mdelay(1); 99 mdelay(1);
100 xgifb_reg_set(P3c4, 0x1B, 0x03); 100 xgifb_reg_set(P3c4, 0x1B, 0x03);
101 udelay(500); 101 udelay(500);
@@ -103,8 +103,8 @@ static void XGINew_DDR1x_MRS_340(unsigned long P3c4,
103 0x18, 103 0x18,
104 pVBInfo->SR15[2][pVBInfo->ram_type]); /* SR18 */ 104 pVBInfo->SR15[2][pVBInfo->ram_type]); /* SR18 */
105 xgifb_reg_set(P3c4, 0x19, 0x00); 105 xgifb_reg_set(P3c4, 0x19, 0x00);
106 xgifb_reg_set(P3c4, 0x16, pVBInfo->SR16[2]); 106 xgifb_reg_set(P3c4, 0x16, 0x03);
107 xgifb_reg_set(P3c4, 0x16, pVBInfo->SR16[3]); 107 xgifb_reg_set(P3c4, 0x16, 0x83);
108 xgifb_reg_set(P3c4, 0x1B, 0x00); 108 xgifb_reg_set(P3c4, 0x1B, 0x00);
109} 109}
110 110
@@ -124,13 +124,13 @@ static void XGINew_SetMemoryClock(struct xgi_hw_device_info *HwDeviceExtension,
124 124
125 xgifb_reg_set(pVBInfo->P3c4, 125 xgifb_reg_set(pVBInfo->P3c4,
126 0x2E, 126 0x2E,
127 pVBInfo->ECLKData[pVBInfo->ram_type].SR2E); 127 XGI340_ECLKData[pVBInfo->ram_type].SR2E);
128 xgifb_reg_set(pVBInfo->P3c4, 128 xgifb_reg_set(pVBInfo->P3c4,
129 0x2F, 129 0x2F,
130 pVBInfo->ECLKData[pVBInfo->ram_type].SR2F); 130 XGI340_ECLKData[pVBInfo->ram_type].SR2F);
131 xgifb_reg_set(pVBInfo->P3c4, 131 xgifb_reg_set(pVBInfo->P3c4,
132 0x30, 132 0x30,
133 pVBInfo->ECLKData[pVBInfo->ram_type].SR30); 133 XGI340_ECLKData[pVBInfo->ram_type].SR30);
134 134
135 /* When XG42 ECLK = MCLK = 207MHz, Set SR32 D[1:0] = 10b */ 135 /* When XG42 ECLK = MCLK = 207MHz, Set SR32 D[1:0] = 10b */
136 /* Modify SR32 value, when MCLK=207MHZ, ELCK=250MHz, 136 /* Modify SR32 value, when MCLK=207MHZ, ELCK=250MHz,
@@ -138,10 +138,10 @@ static void XGINew_SetMemoryClock(struct xgi_hw_device_info *HwDeviceExtension,
138 if (HwDeviceExtension->jChipType == XG42) { 138 if (HwDeviceExtension->jChipType == XG42) {
139 if ((pVBInfo->MCLKData[pVBInfo->ram_type].SR28 == 0x1C) && 139 if ((pVBInfo->MCLKData[pVBInfo->ram_type].SR28 == 0x1C) &&
140 (pVBInfo->MCLKData[pVBInfo->ram_type].SR29 == 0x01) && 140 (pVBInfo->MCLKData[pVBInfo->ram_type].SR29 == 0x01) &&
141 (((pVBInfo->ECLKData[pVBInfo->ram_type].SR2E == 0x1C) && 141 (((XGI340_ECLKData[pVBInfo->ram_type].SR2E == 0x1C) &&
142 (pVBInfo->ECLKData[pVBInfo->ram_type].SR2F == 0x01)) || 142 (XGI340_ECLKData[pVBInfo->ram_type].SR2F == 0x01)) ||
143 ((pVBInfo->ECLKData[pVBInfo->ram_type].SR2E == 0x22) && 143 ((XGI340_ECLKData[pVBInfo->ram_type].SR2E == 0x22) &&
144 (pVBInfo->ECLKData[pVBInfo->ram_type].SR2F == 0x01)))) 144 (XGI340_ECLKData[pVBInfo->ram_type].SR2F == 0x01))))
145 xgifb_reg_set(pVBInfo->P3c4, 145 xgifb_reg_set(pVBInfo->P3c4,
146 0x32, 146 0x32,
147 ((unsigned char) xgifb_reg_get( 147 ((unsigned char) xgifb_reg_get(
@@ -429,7 +429,7 @@ static void XGINew_SetDRAMDefaultRegister340(
429 temp2 = 0; 429 temp2 = 0;
430 for (i = 0; i < 4; i++) { 430 for (i = 0; i < 4; i++) {
431 /* CR6B DQS fine tune delay */ 431 /* CR6B DQS fine tune delay */
432 temp = pVBInfo->CR6B[pVBInfo->ram_type][i]; 432 temp = XGI340_CR6B[pVBInfo->ram_type][i];
433 for (j = 0; j < 4; j++) { 433 for (j = 0; j < 4; j++) {
434 temp1 = ((temp >> (2 * j)) & 0x03) << 2; 434 temp1 = ((temp >> (2 * j)) & 0x03) << 2;
435 temp2 |= temp1; 435 temp2 |= temp1;
@@ -444,7 +444,7 @@ static void XGINew_SetDRAMDefaultRegister340(
444 temp2 = 0; 444 temp2 = 0;
445 for (i = 0; i < 4; i++) { 445 for (i = 0; i < 4; i++) {
446 /* CR6E DQM fine tune delay */ 446 /* CR6E DQM fine tune delay */
447 temp = pVBInfo->CR6E[pVBInfo->ram_type][i]; 447 temp = 0;
448 for (j = 0; j < 4; j++) { 448 for (j = 0; j < 4; j++) {
449 temp1 = ((temp >> (2 * j)) & 0x03) << 2; 449 temp1 = ((temp >> (2 * j)) & 0x03) << 2;
450 temp2 |= temp1; 450 temp2 |= temp1;
@@ -463,7 +463,7 @@ static void XGINew_SetDRAMDefaultRegister340(
463 temp2 = 0; 463 temp2 = 0;
464 for (i = 0; i < 8; i++) { 464 for (i = 0; i < 8; i++) {
465 /* CR6F DQ fine tune delay */ 465 /* CR6F DQ fine tune delay */
466 temp = pVBInfo->CR6F[pVBInfo->ram_type][8 * k + i]; 466 temp = 0;
467 for (j = 0; j < 4; j++) { 467 for (j = 0; j < 4; j++) {
468 temp1 = (temp >> (2 * j)) & 0x03; 468 temp1 = (temp >> (2 * j)) & 0x03;
469 temp2 |= temp1; 469 temp2 |= temp1;
@@ -486,7 +486,7 @@ static void XGINew_SetDRAMDefaultRegister340(
486 486
487 temp2 = 0x80; 487 temp2 = 0x80;
488 /* CR89 terminator type select */ 488 /* CR89 terminator type select */
489 temp = pVBInfo->CR89[pVBInfo->ram_type][0]; 489 temp = 0;
490 for (j = 0; j < 4; j++) { 490 for (j = 0; j < 4; j++) {
491 temp1 = (temp >> (2 * j)) & 0x03; 491 temp1 = (temp >> (2 * j)) & 0x03;
492 temp2 |= temp1; 492 temp2 |= temp1;
@@ -496,7 +496,7 @@ static void XGINew_SetDRAMDefaultRegister340(
496 temp2 += 0x10; 496 temp2 += 0x10;
497 } 497 }
498 498
499 temp = pVBInfo->CR89[pVBInfo->ram_type][1]; 499 temp = 0;
500 temp1 = temp & 0x03; 500 temp1 = temp & 0x03;
501 temp2 |= temp1; 501 temp2 |= temp1;
502 xgifb_reg_set(P3d4, 0x89, temp2); 502 xgifb_reg_set(P3d4, 0x89, temp2);
@@ -1378,17 +1378,17 @@ unsigned char XGIInitNew(struct pci_dev *pdev)
1378 for (i = 0x47; i <= 0x4C; i++) 1378 for (i = 0x47; i <= 0x4C; i++)
1379 xgifb_reg_set(pVBInfo->P3d4, 1379 xgifb_reg_set(pVBInfo->P3d4,
1380 i, 1380 i,
1381 pVBInfo->AGPReg[i - 0x47]); 1381 XGI340_AGPReg[i - 0x47]);
1382 1382
1383 for (i = 0x70; i <= 0x71; i++) 1383 for (i = 0x70; i <= 0x71; i++)
1384 xgifb_reg_set(pVBInfo->P3d4, 1384 xgifb_reg_set(pVBInfo->P3d4,
1385 i, 1385 i,
1386 pVBInfo->AGPReg[6 + i - 0x70]); 1386 XGI340_AGPReg[6 + i - 0x70]);
1387 1387
1388 for (i = 0x74; i <= 0x77; i++) 1388 for (i = 0x74; i <= 0x77; i++)
1389 xgifb_reg_set(pVBInfo->P3d4, 1389 xgifb_reg_set(pVBInfo->P3d4,
1390 i, 1390 i,
1391 pVBInfo->AGPReg[8 + i - 0x74]); 1391 XGI340_AGPReg[8 + i - 0x74]);
1392 1392
1393 pci_read_config_dword(pdev, 0x50, &Temp); 1393 pci_read_config_dword(pdev, 0x50, &Temp);
1394 Temp >>= 20; 1394 Temp >>= 20;
@@ -1401,7 +1401,7 @@ unsigned char XGIInitNew(struct pci_dev *pdev)
1401 /* Set PCI */ 1401 /* Set PCI */
1402 xgifb_reg_set(pVBInfo->P3c4, 0x23, XGI330_SR23); 1402 xgifb_reg_set(pVBInfo->P3c4, 0x23, XGI330_SR23);
1403 xgifb_reg_set(pVBInfo->P3c4, 0x24, XGI330_SR24); 1403 xgifb_reg_set(pVBInfo->P3c4, 0x24, XGI330_SR24);
1404 xgifb_reg_set(pVBInfo->P3c4, 0x25, XGI330_SR25); 1404 xgifb_reg_set(pVBInfo->P3c4, 0x25, 0);
1405 1405
1406 if (HwDeviceExtension->jChipType < XG20) { 1406 if (HwDeviceExtension->jChipType < XG20) {
1407 /* Set VB */ 1407 /* Set VB */
@@ -1482,11 +1482,8 @@ unsigned char XGIInitNew(struct pci_dev *pdev)
1482 1482
1483 XGINew_SetDRAMSize_340(xgifb_info, HwDeviceExtension, pVBInfo); 1483 XGINew_SetDRAMSize_340(xgifb_info, HwDeviceExtension, pVBInfo);
1484 1484
1485 xgifb_reg_set(pVBInfo->P3c4, 1485 xgifb_reg_set(pVBInfo->P3c4, 0x22, 0xfa);
1486 0x22, 1486 xgifb_reg_set(pVBInfo->P3c4, 0x21, 0xa3);
1487 (unsigned char) ((pVBInfo->SR22) & 0xFE));
1488
1489 xgifb_reg_set(pVBInfo->P3c4, 0x21, pVBInfo->SR21);
1490 1487
1491 XGINew_ChkSenseStatus(HwDeviceExtension, pVBInfo); 1488 XGINew_ChkSenseStatus(HwDeviceExtension, pVBInfo);
1492 XGINew_SetModeScratch(HwDeviceExtension, pVBInfo); 1489 XGINew_SetModeScratch(HwDeviceExtension, pVBInfo);
diff --git a/drivers/staging/xgifb/vb_init.h b/drivers/staging/xgifb/vb_init.h
index a27b4fe0bb7b..d54898322548 100644
--- a/drivers/staging/xgifb/vb_init.h
+++ b/drivers/staging/xgifb/vb_init.h
@@ -1,6 +1,5 @@
1#ifndef _VBINIT_ 1#ifndef _VBINIT_
2#define _VBINIT_ 2#define _VBINIT_
3extern unsigned char XGIInitNew(struct pci_dev *pdev); 3extern unsigned char XGIInitNew(struct pci_dev *pdev);
4extern struct XGI21_LVDSCapStruct XGI21_LCDCapList[13];
5#endif 4#endif
6 5
diff --git a/drivers/staging/xgifb/vb_setmode.c b/drivers/staging/xgifb/vb_setmode.c
index e95a1655a6ce..d723a2571995 100644
--- a/drivers/staging/xgifb/vb_setmode.c
+++ b/drivers/staging/xgifb/vb_setmode.c
@@ -23,18 +23,7 @@ static const unsigned short XGINew_VGA_DAC[] = {
23 23
24void InitTo330Pointer(unsigned char ChipType, struct vb_device_info *pVBInfo) 24void InitTo330Pointer(unsigned char ChipType, struct vb_device_info *pVBInfo)
25{ 25{
26 pVBInfo->StandTable = &XGI330_StandTable;
27 pVBInfo->EModeIDTable = XGI330_EModeIDTable;
28 pVBInfo->RefIndex = XGI330_RefIndex;
29 pVBInfo->XGINEWUB_CRT1Table = XGI_CRT1Table;
30
31 pVBInfo->MCLKData = XGI340New_MCLKData; 26 pVBInfo->MCLKData = XGI340New_MCLKData;
32 pVBInfo->ECLKData = XGI340_ECLKData;
33 pVBInfo->VCLKData = XGI_VCLKData;
34 pVBInfo->VBVCLKData = XGI_VBVCLKData;
35 pVBInfo->ScreenOffset = XGI330_ScreenOffset;
36 pVBInfo->StResInfo = XGI330_StResInfo;
37 pVBInfo->ModeResInfo = XGI330_ModeResInfo;
38 27
39 pVBInfo->LCDResInfo = 0; 28 pVBInfo->LCDResInfo = 0;
40 pVBInfo->LCDTypeInfo = 0; 29 pVBInfo->LCDTypeInfo = 0;
@@ -44,19 +33,6 @@ void InitTo330Pointer(unsigned char ChipType, struct vb_device_info *pVBInfo)
44 33
45 pVBInfo->SR15 = XGI340_SR13; 34 pVBInfo->SR15 = XGI340_SR13;
46 pVBInfo->CR40 = XGI340_cr41; 35 pVBInfo->CR40 = XGI340_cr41;
47 pVBInfo->CR6B = XGI340_CR6B;
48 pVBInfo->CR6E = XGI340_CR6E;
49 pVBInfo->CR6F = XGI340_CR6F;
50 pVBInfo->CR89 = XGI340_CR89;
51 pVBInfo->AGPReg = XGI340_AGPReg;
52 pVBInfo->SR16 = XGI340_SR16;
53
54 pVBInfo->SR21 = 0xa3;
55 pVBInfo->SR22 = 0xfb;
56
57 pVBInfo->TimingH = XGI_TimingH;
58 pVBInfo->TimingV = XGI_TimingV;
59 pVBInfo->UpdateCRT1 = XGI_UpdateCRT1Table;
60 36
61 /* 310 customization related */ 37 /* 310 customization related */
62 if ((pVBInfo->VBType & VB_SIS301LV) || (pVBInfo->VBType & VB_SIS302LV)) 38 if ((pVBInfo->VBType & VB_SIS301LV) || (pVBInfo->VBType & VB_SIS302LV))
@@ -90,10 +66,10 @@ static void XGI_SetSeqRegs(unsigned short ModeNo,
90 unsigned char tempah, SRdata; 66 unsigned char tempah, SRdata;
91 unsigned short i, modeflag; 67 unsigned short i, modeflag;
92 68
93 modeflag = pVBInfo->EModeIDTable[ModeIdIndex].Ext_ModeFlag; 69 modeflag = XGI330_EModeIDTable[ModeIdIndex].Ext_ModeFlag;
94 70
95 xgifb_reg_set(pVBInfo->P3c4, 0x00, 0x03); /* Set SR0 */ 71 xgifb_reg_set(pVBInfo->P3c4, 0x00, 0x03); /* Set SR0 */
96 tempah = pVBInfo->StandTable->SR[0]; 72 tempah = XGI330_StandTable.SR[0];
97 73
98 i = XGI_SetCRT2ToLCDA; 74 i = XGI_SetCRT2ToLCDA;
99 if (pVBInfo->VBInfo & XGI_SetCRT2ToLCDA) { 75 if (pVBInfo->VBInfo & XGI_SetCRT2ToLCDA) {
@@ -108,7 +84,7 @@ static void XGI_SetSeqRegs(unsigned short ModeNo,
108 84
109 for (i = 02; i <= 04; i++) { 85 for (i = 02; i <= 04; i++) {
110 /* Get SR2,3,4 from file */ 86 /* Get SR2,3,4 from file */
111 SRdata = pVBInfo->StandTable->SR[i - 1]; 87 SRdata = XGI330_StandTable.SR[i - 1];
112 xgifb_reg_set(pVBInfo->P3c4, i, SRdata); /* Set SR2 3 4 */ 88 xgifb_reg_set(pVBInfo->P3c4, i, SRdata); /* Set SR2 3 4 */
113 } 89 }
114} 90}
@@ -125,7 +101,7 @@ static void XGI_SetCRTCRegs(struct xgi_hw_device_info *HwDeviceExtension,
125 101
126 for (i = 0; i <= 0x18; i++) { 102 for (i = 0; i <= 0x18; i++) {
127 /* Get CRTC from file */ 103 /* Get CRTC from file */
128 CRTCdata = pVBInfo->StandTable->CRTC[i]; 104 CRTCdata = XGI330_StandTable.CRTC[i];
129 xgifb_reg_set(pVBInfo->P3d4, i, CRTCdata); /* Set CRTC(3d4) */ 105 xgifb_reg_set(pVBInfo->P3d4, i, CRTCdata); /* Set CRTC(3d4) */
130 } 106 }
131} 107}
@@ -137,10 +113,10 @@ static void XGI_SetATTRegs(unsigned short ModeNo,
137 unsigned char ARdata; 113 unsigned char ARdata;
138 unsigned short i, modeflag; 114 unsigned short i, modeflag;
139 115
140 modeflag = pVBInfo->EModeIDTable[ModeIdIndex].Ext_ModeFlag; 116 modeflag = XGI330_EModeIDTable[ModeIdIndex].Ext_ModeFlag;
141 117
142 for (i = 0; i <= 0x13; i++) { 118 for (i = 0; i <= 0x13; i++) {
143 ARdata = pVBInfo->StandTable->ATTR[i]; 119 ARdata = XGI330_StandTable.ATTR[i];
144 120
145 if ((modeflag & Charx8Dot) && i == 0x13) { /* ifndef Dot9 */ 121 if ((modeflag & Charx8Dot) && i == 0x13) { /* ifndef Dot9 */
146 if (pVBInfo->VBInfo & XGI_SetCRT2ToLCDA) { 122 if (pVBInfo->VBInfo & XGI_SetCRT2ToLCDA) {
@@ -171,7 +147,7 @@ static void XGI_SetGRCRegs(struct vb_device_info *pVBInfo)
171 147
172 for (i = 0; i <= 0x08; i++) { 148 for (i = 0; i <= 0x08; i++) {
173 /* Get GR from file */ 149 /* Get GR from file */
174 GRdata = pVBInfo->StandTable->GRC[i]; 150 GRdata = XGI330_StandTable.GRC[i];
175 xgifb_reg_set(pVBInfo->P3ce, i, GRdata); /* Set GR(3ce) */ 151 xgifb_reg_set(pVBInfo->P3ce, i, GRdata); /* Set GR(3ce) */
176 } 152 }
177 153
@@ -194,12 +170,12 @@ static unsigned char XGI_SetDefaultVCLK(struct vb_device_info *pVBInfo)
194{ 170{
195 171
196 xgifb_reg_and_or(pVBInfo->P3c4, 0x31, ~0x30, 0x20); 172 xgifb_reg_and_or(pVBInfo->P3c4, 0x31, ~0x30, 0x20);
197 xgifb_reg_set(pVBInfo->P3c4, 0x2B, pVBInfo->VCLKData[0].SR2B); 173 xgifb_reg_set(pVBInfo->P3c4, 0x2B, XGI_VCLKData[0].SR2B);
198 xgifb_reg_set(pVBInfo->P3c4, 0x2C, pVBInfo->VCLKData[0].SR2C); 174 xgifb_reg_set(pVBInfo->P3c4, 0x2C, XGI_VCLKData[0].SR2C);
199 175
200 xgifb_reg_and_or(pVBInfo->P3c4, 0x31, ~0x30, 0x10); 176 xgifb_reg_and_or(pVBInfo->P3c4, 0x31, ~0x30, 0x10);
201 xgifb_reg_set(pVBInfo->P3c4, 0x2B, pVBInfo->VCLKData[1].SR2B); 177 xgifb_reg_set(pVBInfo->P3c4, 0x2B, XGI_VCLKData[1].SR2B);
202 xgifb_reg_set(pVBInfo->P3c4, 0x2C, pVBInfo->VCLKData[1].SR2C); 178 xgifb_reg_set(pVBInfo->P3c4, 0x2C, XGI_VCLKData[1].SR2C);
203 179
204 xgifb_reg_and(pVBInfo->P3c4, 0x31, ~0x30); 180 xgifb_reg_and(pVBInfo->P3c4, 0x31, ~0x30);
205 return 0; 181 return 0;
@@ -212,9 +188,9 @@ static unsigned char XGI_AjustCRT2Rate(unsigned short ModeNo,
212{ 188{
213 unsigned short tempax, tempbx, resinfo, modeflag, infoflag; 189 unsigned short tempax, tempbx, resinfo, modeflag, infoflag;
214 190
215 modeflag = pVBInfo->EModeIDTable[ModeIdIndex].Ext_ModeFlag; 191 modeflag = XGI330_EModeIDTable[ModeIdIndex].Ext_ModeFlag;
216 resinfo = pVBInfo->EModeIDTable[ModeIdIndex].Ext_RESINFO; 192 resinfo = XGI330_EModeIDTable[ModeIdIndex].Ext_RESINFO;
217 tempbx = pVBInfo->RefIndex[RefreshRateTableIndex + (*i)].ModeID; 193 tempbx = XGI330_RefIndex[RefreshRateTableIndex + (*i)].ModeID;
218 tempax = 0; 194 tempax = 0;
219 195
220 if (pVBInfo->IF_DEF_LVDS == 0) { 196 if (pVBInfo->IF_DEF_LVDS == 0) {
@@ -279,9 +255,9 @@ static unsigned char XGI_AjustCRT2Rate(unsigned short ModeNo,
279 } 255 }
280 } 256 }
281 257
282 for (; pVBInfo->RefIndex[RefreshRateTableIndex + (*i)].ModeID == 258 for (; XGI330_RefIndex[RefreshRateTableIndex + (*i)].ModeID ==
283 tempbx; (*i)--) { 259 tempbx; (*i)--) {
284 infoflag = pVBInfo->RefIndex[RefreshRateTableIndex + (*i)]. 260 infoflag = XGI330_RefIndex[RefreshRateTableIndex + (*i)].
285 Ext_InfoFlag; 261 Ext_InfoFlag;
286 if (infoflag & tempax) 262 if (infoflag & tempax)
287 return 1; 263 return 1;
@@ -291,9 +267,9 @@ static unsigned char XGI_AjustCRT2Rate(unsigned short ModeNo,
291 } 267 }
292 268
293 for ((*i) = 0;; (*i)++) { 269 for ((*i) = 0;; (*i)++) {
294 infoflag = pVBInfo->RefIndex[RefreshRateTableIndex + (*i)]. 270 infoflag = XGI330_RefIndex[RefreshRateTableIndex + (*i)].
295 Ext_InfoFlag; 271 Ext_InfoFlag;
296 if (pVBInfo->RefIndex[RefreshRateTableIndex + (*i)].ModeID 272 if (XGI330_RefIndex[RefreshRateTableIndex + (*i)].ModeID
297 != tempbx) { 273 != tempbx) {
298 return 0; 274 return 0;
299 } 275 }
@@ -310,7 +286,7 @@ static void XGI_SetSync(unsigned short RefreshRateTableIndex,
310 unsigned short sync, temp; 286 unsigned short sync, temp;
311 287
312 /* di+0x00 */ 288 /* di+0x00 */
313 sync = pVBInfo->RefIndex[RefreshRateTableIndex].Ext_InfoFlag >> 8; 289 sync = XGI330_RefIndex[RefreshRateTableIndex].Ext_InfoFlag >> 8;
314 sync &= 0xC0; 290 sync &= 0xC0;
315 temp = 0x2F; 291 temp = 0x2F;
316 temp |= sync; 292 temp |= sync;
@@ -328,22 +304,22 @@ static void XGI_SetCRT1Timing_H(struct vb_device_info *pVBInfo,
328 data &= 0x7F; 304 data &= 0x7F;
329 xgifb_reg_set(pVBInfo->P3d4, 0x11, data); 305 xgifb_reg_set(pVBInfo->P3d4, 0x11, data);
330 306
331 data = pVBInfo->TimingH[0].data[0]; 307 data = pVBInfo->TimingH.data[0];
332 xgifb_reg_set(pVBInfo->P3d4, 0, data); 308 xgifb_reg_set(pVBInfo->P3d4, 0, data);
333 309
334 for (i = 0x01; i <= 0x04; i++) { 310 for (i = 0x01; i <= 0x04; i++) {
335 data = pVBInfo->TimingH[0].data[i]; 311 data = pVBInfo->TimingH.data[i];
336 xgifb_reg_set(pVBInfo->P3d4, (unsigned short) (i + 1), data); 312 xgifb_reg_set(pVBInfo->P3d4, (unsigned short) (i + 1), data);
337 } 313 }
338 314
339 for (i = 0x05; i <= 0x06; i++) { 315 for (i = 0x05; i <= 0x06; i++) {
340 data = pVBInfo->TimingH[0].data[i]; 316 data = pVBInfo->TimingH.data[i];
341 xgifb_reg_set(pVBInfo->P3c4, (unsigned short) (i + 6), data); 317 xgifb_reg_set(pVBInfo->P3c4, (unsigned short) (i + 6), data);
342 } 318 }
343 319
344 j = (unsigned char) xgifb_reg_get(pVBInfo->P3c4, 0x0e); 320 j = (unsigned char) xgifb_reg_get(pVBInfo->P3c4, 0x0e);
345 j &= 0x1F; 321 j &= 0x1F;
346 data = pVBInfo->TimingH[0].data[7]; 322 data = pVBInfo->TimingH.data[7];
347 data &= 0xE0; 323 data &= 0xE0;
348 data |= j; 324 data |= j;
349 xgifb_reg_set(pVBInfo->P3c4, 0x0e, data); 325 xgifb_reg_set(pVBInfo->P3c4, 0x0e, data);
@@ -385,32 +361,32 @@ static void XGI_SetCRT1Timing_V(unsigned short ModeIdIndex,
385 unsigned short i, j; 361 unsigned short i, j;
386 362
387 for (i = 0x00; i <= 0x01; i++) { 363 for (i = 0x00; i <= 0x01; i++) {
388 data = pVBInfo->TimingV[0].data[i]; 364 data = pVBInfo->TimingV.data[i];
389 xgifb_reg_set(pVBInfo->P3d4, (unsigned short) (i + 6), data); 365 xgifb_reg_set(pVBInfo->P3d4, (unsigned short) (i + 6), data);
390 } 366 }
391 367
392 for (i = 0x02; i <= 0x03; i++) { 368 for (i = 0x02; i <= 0x03; i++) {
393 data = pVBInfo->TimingV[0].data[i]; 369 data = pVBInfo->TimingV.data[i];
394 xgifb_reg_set(pVBInfo->P3d4, (unsigned short) (i + 0x0e), data); 370 xgifb_reg_set(pVBInfo->P3d4, (unsigned short) (i + 0x0e), data);
395 } 371 }
396 372
397 for (i = 0x04; i <= 0x05; i++) { 373 for (i = 0x04; i <= 0x05; i++) {
398 data = pVBInfo->TimingV[0].data[i]; 374 data = pVBInfo->TimingV.data[i];
399 xgifb_reg_set(pVBInfo->P3d4, (unsigned short) (i + 0x11), data); 375 xgifb_reg_set(pVBInfo->P3d4, (unsigned short) (i + 0x11), data);
400 } 376 }
401 377
402 j = (unsigned char) xgifb_reg_get(pVBInfo->P3c4, 0x0a); 378 j = (unsigned char) xgifb_reg_get(pVBInfo->P3c4, 0x0a);
403 j &= 0xC0; 379 j &= 0xC0;
404 data = pVBInfo->TimingV[0].data[6]; 380 data = pVBInfo->TimingV.data[6];
405 data &= 0x3F; 381 data &= 0x3F;
406 data |= j; 382 data |= j;
407 xgifb_reg_set(pVBInfo->P3c4, 0x0a, data); 383 xgifb_reg_set(pVBInfo->P3c4, 0x0a, data);
408 384
409 data = pVBInfo->TimingV[0].data[6]; 385 data = pVBInfo->TimingV.data[6];
410 data &= 0x80; 386 data &= 0x80;
411 data = data >> 2; 387 data = data >> 2;
412 388
413 i = pVBInfo->EModeIDTable[ModeIdIndex].Ext_ModeFlag; 389 i = XGI330_EModeIDTable[ModeIdIndex].Ext_ModeFlag;
414 i &= DoubleScanMode; 390 i &= DoubleScanMode;
415 if (i) 391 if (i)
416 data |= 0x80; 392 data |= 0x80;
@@ -430,7 +406,7 @@ static void XGI_SetCRT1CRTC(unsigned short ModeNo, unsigned short ModeIdIndex,
430 unsigned short i; 406 unsigned short i;
431 407
432 /* Get index */ 408 /* Get index */
433 index = pVBInfo->RefIndex[RefreshRateTableIndex].Ext_CRT1CRTC; 409 index = XGI330_RefIndex[RefreshRateTableIndex].Ext_CRT1CRTC;
434 index = index & IndexMask; 410 index = index & IndexMask;
435 411
436 data = (unsigned char) xgifb_reg_get(pVBInfo->P3d4, 0x11); 412 data = (unsigned char) xgifb_reg_get(pVBInfo->P3d4, 0x11);
@@ -438,12 +414,12 @@ static void XGI_SetCRT1CRTC(unsigned short ModeNo, unsigned short ModeIdIndex,
438 xgifb_reg_set(pVBInfo->P3d4, 0x11, data); /* Unlock CRTC */ 414 xgifb_reg_set(pVBInfo->P3d4, 0x11, data); /* Unlock CRTC */
439 415
440 for (i = 0; i < 8; i++) 416 for (i = 0; i < 8; i++)
441 pVBInfo->TimingH[0].data[i] 417 pVBInfo->TimingH.data[i]
442 = pVBInfo->XGINEWUB_CRT1Table[index].CR[i]; 418 = XGI_CRT1Table[index].CR[i];
443 419
444 for (i = 0; i < 7; i++) 420 for (i = 0; i < 7; i++)
445 pVBInfo->TimingV[0].data[i] 421 pVBInfo->TimingV.data[i]
446 = pVBInfo->XGINEWUB_CRT1Table[index].CR[i + 8]; 422 = XGI_CRT1Table[index].CR[i + 8];
447 423
448 XGI_SetCRT1Timing_H(pVBInfo, HwDeviceExtension); 424 XGI_SetCRT1Timing_H(pVBInfo, HwDeviceExtension);
449 425
@@ -466,23 +442,23 @@ static void XGI_SetXG21CRTC(unsigned short ModeNo, unsigned short ModeIdIndex,
466 unsigned char index, Tempax, Tempbx, Tempcx, Tempdx; 442 unsigned char index, Tempax, Tempbx, Tempcx, Tempdx;
467 unsigned short Temp1, Temp2, Temp3; 443 unsigned short Temp1, Temp2, Temp3;
468 444
469 index = pVBInfo->RefIndex[RefreshRateTableIndex].Ext_CRT1CRTC; 445 index = XGI330_RefIndex[RefreshRateTableIndex].Ext_CRT1CRTC;
470 /* Tempax: CR4 HRS */ 446 /* Tempax: CR4 HRS */
471 Tempax = pVBInfo->XGINEWUB_CRT1Table[index].CR[3]; 447 Tempax = XGI_CRT1Table[index].CR[3];
472 Tempcx = Tempax; /* Tempcx: HRS */ 448 Tempcx = Tempax; /* Tempcx: HRS */
473 /* SR2E[7:0]->HRS */ 449 /* SR2E[7:0]->HRS */
474 xgifb_reg_set(pVBInfo->P3c4, 0x2E, Tempax); 450 xgifb_reg_set(pVBInfo->P3c4, 0x2E, Tempax);
475 451
476 Tempdx = pVBInfo->XGINEWUB_CRT1Table[index].CR[5]; /* SRB */ 452 Tempdx = XGI_CRT1Table[index].CR[5]; /* SRB */
477 Tempdx &= 0xC0; /* Tempdx[7:6]: SRB[7:6] */ 453 Tempdx &= 0xC0; /* Tempdx[7:6]: SRB[7:6] */
478 Temp1 = Tempdx; /* Temp1[7:6]: HRS[9:8] */ 454 Temp1 = Tempdx; /* Temp1[7:6]: HRS[9:8] */
479 Temp1 <<= 2; /* Temp1[9:8]: HRS[9:8] */ 455 Temp1 <<= 2; /* Temp1[9:8]: HRS[9:8] */
480 Temp1 |= Tempax; /* Temp1[9:0]: HRS[9:0] */ 456 Temp1 |= Tempax; /* Temp1[9:0]: HRS[9:0] */
481 457
482 Tempax = pVBInfo->XGINEWUB_CRT1Table[index].CR[4]; /* CR5 HRE */ 458 Tempax = XGI_CRT1Table[index].CR[4]; /* CR5 HRE */
483 Tempax &= 0x1F; /* Tempax[4:0]: HRE[4:0] */ 459 Tempax &= 0x1F; /* Tempax[4:0]: HRE[4:0] */
484 460
485 Tempbx = pVBInfo->XGINEWUB_CRT1Table[index].CR[6]; /* SRC */ 461 Tempbx = XGI_CRT1Table[index].CR[6]; /* SRC */
486 Tempbx &= 0x04; /* Tempbx[2]: HRE[5] */ 462 Tempbx &= 0x04; /* Tempbx[2]: HRE[5] */
487 Tempbx <<= 3; /* Tempbx[5]: HRE[5] */ 463 Tempbx <<= 3; /* Tempbx[5]: HRE[5] */
488 Tempax |= Tempbx; /* Tempax[5:0]: HRE[5:0] */ 464 Tempax |= Tempbx; /* Tempax[5:0]: HRE[5:0] */
@@ -504,12 +480,12 @@ static void XGI_SetXG21CRTC(unsigned short ModeNo, unsigned short ModeIdIndex,
504 xgifb_reg_and_or(pVBInfo->P3c4, 0x30, 0xE3, 00); 480 xgifb_reg_and_or(pVBInfo->P3c4, 0x30, 0xE3, 00);
505 481
506 /* CR10 VRS */ 482 /* CR10 VRS */
507 Tempax = pVBInfo->XGINEWUB_CRT1Table[index].CR[10]; 483 Tempax = XGI_CRT1Table[index].CR[10];
508 Tempbx = Tempax; /* Tempbx: VRS */ 484 Tempbx = Tempax; /* Tempbx: VRS */
509 Tempax &= 0x01; /* Tempax[0]: VRS[0] */ 485 Tempax &= 0x01; /* Tempax[0]: VRS[0] */
510 xgifb_reg_or(pVBInfo->P3c4, 0x33, Tempax); /* SR33[0]->VRS[0] */ 486 xgifb_reg_or(pVBInfo->P3c4, 0x33, Tempax); /* SR33[0]->VRS[0] */
511 /* CR7[2][7] VRE */ 487 /* CR7[2][7] VRE */
512 Tempax = pVBInfo->XGINEWUB_CRT1Table[index].CR[9]; 488 Tempax = XGI_CRT1Table[index].CR[9];
513 Tempcx = Tempbx >> 1; /* Tempcx[6:0]: VRS[7:1] */ 489 Tempcx = Tempbx >> 1; /* Tempcx[6:0]: VRS[7:1] */
514 Tempdx = Tempax & 0x04; /* Tempdx[2]: CR7[2] */ 490 Tempdx = Tempax & 0x04; /* Tempdx[2]: CR7[2] */
515 Tempdx <<= 5; /* Tempdx[7]: VRS[8] */ 491 Tempdx <<= 5; /* Tempdx[7]: VRS[8] */
@@ -523,17 +499,17 @@ static void XGI_SetXG21CRTC(unsigned short ModeNo, unsigned short ModeIdIndex,
523 Temp2 = Tempax << 2; /* Temp2[9]: VRS[9] */ 499 Temp2 = Tempax << 2; /* Temp2[9]: VRS[9] */
524 Temp1 |= Temp2; /* Temp1[9:0]: VRS[9:0] */ 500 Temp1 |= Temp2; /* Temp1[9:0]: VRS[9:0] */
525 /* Tempax: SRA */ 501 /* Tempax: SRA */
526 Tempax = pVBInfo->XGINEWUB_CRT1Table[index].CR[14]; 502 Tempax = XGI_CRT1Table[index].CR[14];
527 Tempax &= 0x08; /* Tempax[3]: VRS[3] */ 503 Tempax &= 0x08; /* Tempax[3]: VRS[3] */
528 Temp2 = Tempax; 504 Temp2 = Tempax;
529 Temp2 <<= 7; /* Temp2[10]: VRS[10] */ 505 Temp2 <<= 7; /* Temp2[10]: VRS[10] */
530 Temp1 |= Temp2; /* Temp1[10:0]: VRS[10:0] */ 506 Temp1 |= Temp2; /* Temp1[10:0]: VRS[10:0] */
531 507
532 /* Tempax: CR11 VRE */ 508 /* Tempax: CR11 VRE */
533 Tempax = pVBInfo->XGINEWUB_CRT1Table[index].CR[11]; 509 Tempax = XGI_CRT1Table[index].CR[11];
534 Tempax &= 0x0F; /* Tempax[3:0]: VRE[3:0] */ 510 Tempax &= 0x0F; /* Tempax[3:0]: VRE[3:0] */
535 /* Tempbx: SRA */ 511 /* Tempbx: SRA */
536 Tempbx = pVBInfo->XGINEWUB_CRT1Table[index].CR[14]; 512 Tempbx = XGI_CRT1Table[index].CR[14];
537 Tempbx &= 0x20; /* Tempbx[5]: VRE[5] */ 513 Tempbx &= 0x20; /* Tempbx[5]: VRE[5] */
538 Tempbx >>= 1; /* Tempbx[4]: VRE[4] */ 514 Tempbx >>= 1; /* Tempbx[4]: VRE[4] */
539 Tempax |= Tempbx; /* Tempax[4:0]: VRE[4:0] */ 515 Tempax |= Tempbx; /* Tempax[4:0]: VRE[4:0] */
@@ -563,23 +539,23 @@ static void XGI_SetXG27CRTC(unsigned short ModeNo,
563{ 539{
564 unsigned short index, Tempax, Tempbx, Tempcx; 540 unsigned short index, Tempax, Tempbx, Tempcx;
565 541
566 index = pVBInfo->RefIndex[RefreshRateTableIndex].Ext_CRT1CRTC; 542 index = XGI330_RefIndex[RefreshRateTableIndex].Ext_CRT1CRTC;
567 /* Tempax: CR4 HRS */ 543 /* Tempax: CR4 HRS */
568 Tempax = pVBInfo->XGINEWUB_CRT1Table[index].CR[3]; 544 Tempax = XGI_CRT1Table[index].CR[3];
569 Tempbx = Tempax; /* Tempbx: HRS[7:0] */ 545 Tempbx = Tempax; /* Tempbx: HRS[7:0] */
570 /* SR2E[7:0]->HRS */ 546 /* SR2E[7:0]->HRS */
571 xgifb_reg_set(pVBInfo->P3c4, 0x2E, Tempax); 547 xgifb_reg_set(pVBInfo->P3c4, 0x2E, Tempax);
572 548
573 /* SR0B */ 549 /* SR0B */
574 Tempax = pVBInfo->XGINEWUB_CRT1Table[index].CR[5]; 550 Tempax = XGI_CRT1Table[index].CR[5];
575 Tempax &= 0xC0; /* Tempax[7:6]: SR0B[7:6]: HRS[9:8]*/ 551 Tempax &= 0xC0; /* Tempax[7:6]: SR0B[7:6]: HRS[9:8]*/
576 Tempbx |= (Tempax << 2); /* Tempbx: HRS[9:0] */ 552 Tempbx |= (Tempax << 2); /* Tempbx: HRS[9:0] */
577 553
578 Tempax = pVBInfo->XGINEWUB_CRT1Table[index].CR[4]; /* CR5 HRE */ 554 Tempax = XGI_CRT1Table[index].CR[4]; /* CR5 HRE */
579 Tempax &= 0x1F; /* Tempax[4:0]: HRE[4:0] */ 555 Tempax &= 0x1F; /* Tempax[4:0]: HRE[4:0] */
580 Tempcx = Tempax; /* Tempcx: HRE[4:0] */ 556 Tempcx = Tempax; /* Tempcx: HRE[4:0] */
581 557
582 Tempax = pVBInfo->XGINEWUB_CRT1Table[index].CR[6]; /* SRC */ 558 Tempax = XGI_CRT1Table[index].CR[6]; /* SRC */
583 Tempax &= 0x04; /* Tempax[2]: HRE[5] */ 559 Tempax &= 0x04; /* Tempax[2]: HRE[5] */
584 Tempax <<= 3; /* Tempax[5]: HRE[5] */ 560 Tempax <<= 3; /* Tempax[5]: HRE[5] */
585 Tempcx |= Tempax; /* Tempcx[5:0]: HRE[5:0] */ 561 Tempcx |= Tempax; /* Tempcx[5:0]: HRE[5:0] */
@@ -588,12 +564,12 @@ static void XGI_SetXG27CRTC(unsigned short ModeNo,
588 Tempbx |= Tempcx; /* Tempbx: HRS[9:6]HRE[5:0] */ 564 Tempbx |= Tempcx; /* Tempbx: HRS[9:6]HRE[5:0] */
589 565
590 /* Tempax: CR4 HRS */ 566 /* Tempax: CR4 HRS */
591 Tempax = pVBInfo->XGINEWUB_CRT1Table[index].CR[3]; 567 Tempax = XGI_CRT1Table[index].CR[3];
592 Tempax &= 0x3F; /* Tempax: HRS[5:0] */ 568 Tempax &= 0x3F; /* Tempax: HRS[5:0] */
593 if (Tempcx <= Tempax) /* HRE[5:0] < HRS[5:0] */ 569 if (Tempcx <= Tempax) /* HRE[5:0] < HRS[5:0] */
594 Tempbx += 0x40; /* Tempbx= Tempbx + 0x40 : HRE[9:0]*/ 570 Tempbx += 0x40; /* Tempbx= Tempbx + 0x40 : HRE[9:0]*/
595 571
596 Tempax = pVBInfo->XGINEWUB_CRT1Table[index].CR[5]; /* SR0B */ 572 Tempax = XGI_CRT1Table[index].CR[5]; /* SR0B */
597 Tempax &= 0xC0; /* Tempax[7:6]: SR0B[7:6]: HRS[9:8]*/ 573 Tempax &= 0xC0; /* Tempax[7:6]: SR0B[7:6]: HRS[9:8]*/
598 Tempax >>= 6; /* Tempax[1:0]: HRS[9:8]*/ 574 Tempax >>= 6; /* Tempax[1:0]: HRS[9:8]*/
599 Tempax |= ((Tempbx << 2) & 0xFF); /* Tempax[7:2]: HRE[5:0] */ 575 Tempax |= ((Tempbx << 2) & 0xFF); /* Tempax[7:2]: HRE[5:0] */
@@ -602,13 +578,13 @@ static void XGI_SetXG27CRTC(unsigned short ModeNo,
602 xgifb_reg_and_or(pVBInfo->P3c4, 0x30, 0xE3, 00); 578 xgifb_reg_and_or(pVBInfo->P3c4, 0x30, 0xE3, 00);
603 579
604 /* CR10 VRS */ 580 /* CR10 VRS */
605 Tempax = pVBInfo->XGINEWUB_CRT1Table[index].CR[10]; 581 Tempax = XGI_CRT1Table[index].CR[10];
606 /* SR34[7:0]->VRS[7:0] */ 582 /* SR34[7:0]->VRS[7:0] */
607 xgifb_reg_set(pVBInfo->P3c4, 0x34, Tempax); 583 xgifb_reg_set(pVBInfo->P3c4, 0x34, Tempax);
608 584
609 Tempcx = Tempax; /* Tempcx <= VRS[7:0] */ 585 Tempcx = Tempax; /* Tempcx <= VRS[7:0] */
610 /* CR7[7][2] VRS[9][8] */ 586 /* CR7[7][2] VRS[9][8] */
611 Tempax = pVBInfo->XGINEWUB_CRT1Table[index].CR[9]; 587 Tempax = XGI_CRT1Table[index].CR[9];
612 Tempbx = Tempax; /* Tempbx <= CR07[7:0] */ 588 Tempbx = Tempax; /* Tempbx <= CR07[7:0] */
613 Tempax = Tempax & 0x04; /* Tempax[2]: CR7[2]: VRS[8] */ 589 Tempax = Tempax & 0x04; /* Tempax[2]: CR7[2]: VRS[8] */
614 Tempax >>= 2; /* Tempax[0]: VRS[8] */ 590 Tempax >>= 2; /* Tempax[0]: VRS[8] */
@@ -617,15 +593,15 @@ static void XGI_SetXG27CRTC(unsigned short ModeNo,
617 Tempcx |= (Tempax << 8); /* Tempcx <= VRS[8:0] */ 593 Tempcx |= (Tempax << 8); /* Tempcx <= VRS[8:0] */
618 Tempcx |= ((Tempbx & 0x80) << 2); /* Tempcx <= VRS[9:0] */ 594 Tempcx |= ((Tempbx & 0x80) << 2); /* Tempcx <= VRS[9:0] */
619 /* Tempax: SR0A */ 595 /* Tempax: SR0A */
620 Tempax = pVBInfo->XGINEWUB_CRT1Table[index].CR[14]; 596 Tempax = XGI_CRT1Table[index].CR[14];
621 Tempax &= 0x08; /* SR0A[3] VRS[10] */ 597 Tempax &= 0x08; /* SR0A[3] VRS[10] */
622 Tempcx |= (Tempax << 7); /* Tempcx <= VRS[10:0] */ 598 Tempcx |= (Tempax << 7); /* Tempcx <= VRS[10:0] */
623 599
624 /* Tempax: CR11 VRE */ 600 /* Tempax: CR11 VRE */
625 Tempax = pVBInfo->XGINEWUB_CRT1Table[index].CR[11]; 601 Tempax = XGI_CRT1Table[index].CR[11];
626 Tempax &= 0x0F; /* Tempax[3:0]: VRE[3:0] */ 602 Tempax &= 0x0F; /* Tempax[3:0]: VRE[3:0] */
627 /* Tempbx: SR0A */ 603 /* Tempbx: SR0A */
628 Tempbx = pVBInfo->XGINEWUB_CRT1Table[index].CR[14]; 604 Tempbx = XGI_CRT1Table[index].CR[14];
629 Tempbx &= 0x20; /* Tempbx[5]: SR0A[5]: VRE[4] */ 605 Tempbx &= 0x20; /* Tempbx[5]: SR0A[5]: VRE[4] */
630 Tempbx >>= 1; /* Tempbx[4]: VRE[4] */ 606 Tempbx >>= 1; /* Tempbx[4]: VRE[4] */
631 Tempax |= Tempbx; /* Tempax[4:0]: VRE[4:0] */ 607 Tempax |= Tempbx; /* Tempax[4:0]: VRE[4:0] */
@@ -698,7 +674,7 @@ static void xgifb_set_lcd(int chip_id,
698 xgifb_reg_and(pVBInfo->P3c4, 0x30, ~0x20); /* Hsync polarity */ 674 xgifb_reg_and(pVBInfo->P3c4, 0x30, ~0x20); /* Hsync polarity */
699 xgifb_reg_and(pVBInfo->P3c4, 0x35, ~0x80); /* Vsync polarity */ 675 xgifb_reg_and(pVBInfo->P3c4, 0x35, ~0x80); /* Vsync polarity */
700 676
701 Data = pVBInfo->RefIndex[RefreshRateTableIndex].Ext_InfoFlag; 677 Data = XGI330_RefIndex[RefreshRateTableIndex].Ext_InfoFlag;
702 if (Data & 0x4000) 678 if (Data & 0x4000)
703 /* Hsync polarity */ 679 /* Hsync polarity */
704 xgifb_reg_or(pVBInfo->P3c4, 0x30, 0x20); 680 xgifb_reg_or(pVBInfo->P3c4, 0x30, 0x20);
@@ -721,10 +697,10 @@ static void XGI_UpdateXG21CRTC(unsigned short ModeNo,
721 697
722 xgifb_reg_and(pVBInfo->P3d4, 0x11, 0x7F); /* Unlock CR0~7 */ 698 xgifb_reg_and(pVBInfo->P3d4, 0x11, 0x7F); /* Unlock CR0~7 */
723 if (ModeNo == 0x2E && 699 if (ModeNo == 0x2E &&
724 (pVBInfo->RefIndex[RefreshRateTableIndex].Ext_CRT1CRTC == 700 (XGI330_RefIndex[RefreshRateTableIndex].Ext_CRT1CRTC ==
725 RES640x480x60)) 701 RES640x480x60))
726 index = 12; 702 index = 12;
727 else if (ModeNo == 0x2E && (pVBInfo->RefIndex[RefreshRateTableIndex]. 703 else if (ModeNo == 0x2E && (XGI330_RefIndex[RefreshRateTableIndex].
728 Ext_CRT1CRTC == RES640x480x72)) 704 Ext_CRT1CRTC == RES640x480x72))
729 index = 13; 705 index = 13;
730 else if (ModeNo == 0x2F) 706 else if (ModeNo == 0x2F)
@@ -736,13 +712,13 @@ static void XGI_UpdateXG21CRTC(unsigned short ModeNo,
736 712
737 if (index != -1) { 713 if (index != -1) {
738 xgifb_reg_set(pVBInfo->P3d4, 0x02, 714 xgifb_reg_set(pVBInfo->P3d4, 0x02,
739 pVBInfo->UpdateCRT1[index].CR02); 715 XGI_UpdateCRT1Table[index].CR02);
740 xgifb_reg_set(pVBInfo->P3d4, 0x03, 716 xgifb_reg_set(pVBInfo->P3d4, 0x03,
741 pVBInfo->UpdateCRT1[index].CR03); 717 XGI_UpdateCRT1Table[index].CR03);
742 xgifb_reg_set(pVBInfo->P3d4, 0x15, 718 xgifb_reg_set(pVBInfo->P3d4, 0x15,
743 pVBInfo->UpdateCRT1[index].CR15); 719 XGI_UpdateCRT1Table[index].CR15);
744 xgifb_reg_set(pVBInfo->P3d4, 0x16, 720 xgifb_reg_set(pVBInfo->P3d4, 0x16,
745 pVBInfo->UpdateCRT1[index].CR16); 721 XGI_UpdateCRT1Table[index].CR16);
746 } 722 }
747} 723}
748 724
@@ -755,11 +731,11 @@ static void XGI_SetCRT1DE(struct xgi_hw_device_info *HwDeviceExtension,
755 731
756 unsigned char data; 732 unsigned char data;
757 733
758 resindex = pVBInfo->EModeIDTable[ModeIdIndex].Ext_RESINFO; 734 resindex = XGI330_EModeIDTable[ModeIdIndex].Ext_RESINFO;
759 735
760 modeflag = pVBInfo->EModeIDTable[ModeIdIndex].Ext_ModeFlag; 736 modeflag = XGI330_EModeIDTable[ModeIdIndex].Ext_ModeFlag;
761 tempax = pVBInfo->ModeResInfo[resindex].HTotal; 737 tempax = XGI330_ModeResInfo[resindex].HTotal;
762 tempbx = pVBInfo->ModeResInfo[resindex].VTotal; 738 tempbx = XGI330_ModeResInfo[resindex].VTotal;
763 739
764 if (modeflag & HalfDCLK) 740 if (modeflag & HalfDCLK)
765 tempax = tempax >> 1; 741 tempax = tempax >> 1;
@@ -767,7 +743,7 @@ static void XGI_SetCRT1DE(struct xgi_hw_device_info *HwDeviceExtension,
767 if (modeflag & HalfDCLK) 743 if (modeflag & HalfDCLK)
768 tempax = tempax << 1; 744 tempax = tempax << 1;
769 745
770 temp = pVBInfo->RefIndex[RefreshRateTableIndex].Ext_InfoFlag; 746 temp = XGI330_RefIndex[RefreshRateTableIndex].Ext_InfoFlag;
771 747
772 if (temp & InterlaceMode) 748 if (temp & InterlaceMode)
773 tempbx = tempbx >> 1; 749 tempbx = tempbx >> 1;
@@ -819,11 +795,11 @@ static void XGI_SetCRT1Offset(unsigned short ModeNo,
819 unsigned short temp, ah, al, temp2, i, DisplayUnit; 795 unsigned short temp, ah, al, temp2, i, DisplayUnit;
820 796
821 /* GetOffset */ 797 /* GetOffset */
822 temp = pVBInfo->EModeIDTable[ModeIdIndex].Ext_ModeInfo; 798 temp = XGI330_EModeIDTable[ModeIdIndex].Ext_ModeInfo;
823 temp = temp >> 8; 799 temp = temp >> 8;
824 temp = pVBInfo->ScreenOffset[temp]; 800 temp = XGI330_ScreenOffset[temp];
825 801
826 temp2 = pVBInfo->RefIndex[RefreshRateTableIndex].Ext_InfoFlag; 802 temp2 = XGI330_RefIndex[RefreshRateTableIndex].Ext_InfoFlag;
827 temp2 &= InterlaceMode; 803 temp2 &= InterlaceMode;
828 804
829 if (temp2) 805 if (temp2)
@@ -874,7 +850,7 @@ static void XGI_SetCRT1Offset(unsigned short ModeNo,
874 xgifb_reg_set(pVBInfo->P3d4, 0x13, temp); 850 xgifb_reg_set(pVBInfo->P3d4, 0x13, temp);
875 851
876 /* SetDisplayUnit */ 852 /* SetDisplayUnit */
877 temp2 = pVBInfo->RefIndex[RefreshRateTableIndex].Ext_InfoFlag; 853 temp2 = XGI330_RefIndex[RefreshRateTableIndex].Ext_InfoFlag;
878 temp2 &= InterlaceMode; 854 temp2 &= InterlaceMode;
879 if (temp2) 855 if (temp2)
880 DisplayUnit >>= 1; 856 DisplayUnit >>= 1;
@@ -904,9 +880,9 @@ static unsigned short XGI_GetVCLK2Ptr(unsigned short ModeNo,
904 unsigned short modeflag, resinfo; 880 unsigned short modeflag, resinfo;
905 881
906 /* si+Ext_ResInfo */ 882 /* si+Ext_ResInfo */
907 modeflag = pVBInfo->EModeIDTable[ModeIdIndex].Ext_ModeFlag; 883 modeflag = XGI330_EModeIDTable[ModeIdIndex].Ext_ModeFlag;
908 resinfo = pVBInfo->EModeIDTable[ModeIdIndex].Ext_RESINFO; 884 resinfo = XGI330_EModeIDTable[ModeIdIndex].Ext_RESINFO;
909 CRT2Index = pVBInfo->RefIndex[RefreshRateTableIndex].Ext_CRT2CRTC; 885 CRT2Index = XGI330_RefIndex[RefreshRateTableIndex].Ext_CRT2CRTC;
910 886
911 if (pVBInfo->IF_DEF_LVDS == 0) { 887 if (pVBInfo->IF_DEF_LVDS == 0) {
912 CRT2Index = CRT2Index >> 6; /* for LCD */ 888 CRT2Index = CRT2Index >> 6; /* for LCD */
@@ -947,7 +923,7 @@ static unsigned short XGI_GetVCLK2Ptr(unsigned short ModeNo,
947 VCLKIndex = TVCLKBASE_315_25 + TVVCLK; 923 VCLKIndex = TVCLKBASE_315_25 + TVVCLK;
948 } else { /* for CRT2 */ 924 } else { /* for CRT2 */
949 /* di+Ext_CRTVCLK */ 925 /* di+Ext_CRTVCLK */
950 VCLKIndex = pVBInfo->RefIndex[RefreshRateTableIndex]. 926 VCLKIndex = XGI330_RefIndex[RefreshRateTableIndex].
951 Ext_CRTVCLK; 927 Ext_CRTVCLK;
952 VCLKIndex &= IndexMask; 928 VCLKIndex &= IndexMask;
953 } 929 }
@@ -971,13 +947,11 @@ static void XGI_SetCRT1VCLK(unsigned short ModeNo,
971 unsigned short vclkindex; 947 unsigned short vclkindex;
972 948
973 if (pVBInfo->IF_DEF_LVDS == 1) { 949 if (pVBInfo->IF_DEF_LVDS == 1) {
974 index = pVBInfo->RefIndex[RefreshRateTableIndex].Ext_CRTVCLK; 950 index = XGI330_RefIndex[RefreshRateTableIndex].Ext_CRTVCLK;
975 data = xgifb_reg_get(pVBInfo->P3c4, 0x31) & 0xCF; 951 data = xgifb_reg_get(pVBInfo->P3c4, 0x31) & 0xCF;
976 xgifb_reg_set(pVBInfo->P3c4, 0x31, data); 952 xgifb_reg_set(pVBInfo->P3c4, 0x31, data);
977 xgifb_reg_set(pVBInfo->P3c4, 0x2B, 953 xgifb_reg_set(pVBInfo->P3c4, 0x2B, XGI_VCLKData[index].SR2B);
978 pVBInfo->VCLKData[index].SR2B); 954 xgifb_reg_set(pVBInfo->P3c4, 0x2C, XGI_VCLKData[index].SR2C);
979 xgifb_reg_set(pVBInfo->P3c4, 0x2C,
980 pVBInfo->VCLKData[index].SR2C);
981 xgifb_reg_set(pVBInfo->P3c4, 0x2D, 0x01); 955 xgifb_reg_set(pVBInfo->P3c4, 0x2D, 0x01);
982 } else if ((pVBInfo->VBType & (VB_SIS301B | VB_SIS302B | VB_SIS301LV 956 } else if ((pVBInfo->VBType & (VB_SIS301B | VB_SIS302B | VB_SIS301LV
983 | VB_SIS302LV | VB_XGI301C)) && (pVBInfo->VBInfo 957 | VB_SIS302LV | VB_XGI301C)) && (pVBInfo->VBInfo
@@ -987,24 +961,22 @@ static void XGI_SetCRT1VCLK(unsigned short ModeNo,
987 pVBInfo); 961 pVBInfo);
988 data = xgifb_reg_get(pVBInfo->P3c4, 0x31) & 0xCF; 962 data = xgifb_reg_get(pVBInfo->P3c4, 0x31) & 0xCF;
989 xgifb_reg_set(pVBInfo->P3c4, 0x31, data); 963 xgifb_reg_set(pVBInfo->P3c4, 0x31, data);
990 data = pVBInfo->VBVCLKData[vclkindex].Part4_A; 964 data = XGI_VBVCLKData[vclkindex].Part4_A;
991 xgifb_reg_set(pVBInfo->P3c4, 0x2B, data); 965 xgifb_reg_set(pVBInfo->P3c4, 0x2B, data);
992 data = pVBInfo->VBVCLKData[vclkindex].Part4_B; 966 data = XGI_VBVCLKData[vclkindex].Part4_B;
993 xgifb_reg_set(pVBInfo->P3c4, 0x2C, data); 967 xgifb_reg_set(pVBInfo->P3c4, 0x2C, data);
994 xgifb_reg_set(pVBInfo->P3c4, 0x2D, 0x01); 968 xgifb_reg_set(pVBInfo->P3c4, 0x2D, 0x01);
995 } else { 969 } else {
996 index = pVBInfo->RefIndex[RefreshRateTableIndex].Ext_CRTVCLK; 970 index = XGI330_RefIndex[RefreshRateTableIndex].Ext_CRTVCLK;
997 data = xgifb_reg_get(pVBInfo->P3c4, 0x31) & 0xCF; 971 data = xgifb_reg_get(pVBInfo->P3c4, 0x31) & 0xCF;
998 xgifb_reg_set(pVBInfo->P3c4, 0x31, data); 972 xgifb_reg_set(pVBInfo->P3c4, 0x31, data);
999 xgifb_reg_set(pVBInfo->P3c4, 0x2B, 973 xgifb_reg_set(pVBInfo->P3c4, 0x2B, XGI_VCLKData[index].SR2B);
1000 pVBInfo->VCLKData[index].SR2B); 974 xgifb_reg_set(pVBInfo->P3c4, 0x2C, XGI_VCLKData[index].SR2C);
1001 xgifb_reg_set(pVBInfo->P3c4, 0x2C,
1002 pVBInfo->VCLKData[index].SR2C);
1003 xgifb_reg_set(pVBInfo->P3c4, 0x2D, 0x01); 975 xgifb_reg_set(pVBInfo->P3c4, 0x2D, 0x01);
1004 } 976 }
1005 977
1006 if (HwDeviceExtension->jChipType >= XG20) { 978 if (HwDeviceExtension->jChipType >= XG20) {
1007 if (pVBInfo->EModeIDTable[ModeIdIndex].Ext_ModeFlag & 979 if (XGI330_EModeIDTable[ModeIdIndex].Ext_ModeFlag &
1008 HalfDCLK) { 980 HalfDCLK) {
1009 data = xgifb_reg_get(pVBInfo->P3c4, 0x2B); 981 data = xgifb_reg_get(pVBInfo->P3c4, 0x2B);
1010 xgifb_reg_set(pVBInfo->P3c4, 0x2B, data); 982 xgifb_reg_set(pVBInfo->P3c4, 0x2B, data);
@@ -1064,9 +1036,9 @@ static void XGI_SetVCLKState(struct xgi_hw_device_info *HwDeviceExtension,
1064 1036
1065 unsigned char index; 1037 unsigned char index;
1066 1038
1067 index = pVBInfo->RefIndex[RefreshRateTableIndex].Ext_CRTVCLK; 1039 index = XGI330_RefIndex[RefreshRateTableIndex].Ext_CRTVCLK;
1068 index &= IndexMask; 1040 index &= IndexMask;
1069 VCLK = pVBInfo->VCLKData[index].CLOCK; 1041 VCLK = XGI_VCLKData[index].CLOCK;
1070 1042
1071 data = xgifb_reg_get(pVBInfo->P3c4, 0x32); 1043 data = xgifb_reg_get(pVBInfo->P3c4, 0x32);
1072 data &= 0xf3; 1044 data &= 0xf3;
@@ -1102,8 +1074,8 @@ static void XGI_SetCRT1ModeRegs(struct xgi_hw_device_info *HwDeviceExtension,
1102 unsigned short data, data2, data3, infoflag = 0, modeflag, resindex, 1074 unsigned short data, data2, data3, infoflag = 0, modeflag, resindex,
1103 xres; 1075 xres;
1104 1076
1105 modeflag = pVBInfo->EModeIDTable[ModeIdIndex].Ext_ModeFlag; 1077 modeflag = XGI330_EModeIDTable[ModeIdIndex].Ext_ModeFlag;
1106 infoflag = pVBInfo->RefIndex[RefreshRateTableIndex].Ext_InfoFlag; 1078 infoflag = XGI330_RefIndex[RefreshRateTableIndex].Ext_InfoFlag;
1107 1079
1108 if (xgifb_reg_get(pVBInfo->P3d4, 0x31) & 0x01) 1080 if (xgifb_reg_get(pVBInfo->P3d4, 0x31) & 0x01)
1109 xgifb_reg_and_or(pVBInfo->P3c4, 0x1F, 0x3F, 0x00); 1081 xgifb_reg_and_or(pVBInfo->P3c4, 0x1F, 0x3F, 0x00);
@@ -1120,8 +1092,8 @@ static void XGI_SetCRT1ModeRegs(struct xgi_hw_device_info *HwDeviceExtension,
1120 data2 |= 0x20; 1092 data2 |= 0x20;
1121 1093
1122 xgifb_reg_and_or(pVBInfo->P3c4, 0x06, ~0x3F, data2); 1094 xgifb_reg_and_or(pVBInfo->P3c4, 0x06, ~0x3F, data2);
1123 resindex = pVBInfo->EModeIDTable[ModeIdIndex].Ext_RESINFO; 1095 resindex = XGI330_EModeIDTable[ModeIdIndex].Ext_RESINFO;
1124 xres = pVBInfo->ModeResInfo[resindex].HTotal; /* xres->ax */ 1096 xres = XGI330_ModeResInfo[resindex].HTotal; /* xres->ax */
1125 1097
1126 data = 0x0000; 1098 data = 0x0000;
1127 if (infoflag & InterlaceMode) { 1099 if (infoflag & InterlaceMode) {
@@ -1282,13 +1254,13 @@ static void XGI_GetLVDSResInfo(unsigned short ModeNo,
1282 unsigned short resindex, xres, yres, modeflag; 1254 unsigned short resindex, xres, yres, modeflag;
1283 1255
1284 /* si+Ext_ResInfo */ 1256 /* si+Ext_ResInfo */
1285 modeflag = pVBInfo->EModeIDTable[ModeIdIndex].Ext_RESINFO; 1257 modeflag = XGI330_EModeIDTable[ModeIdIndex].Ext_RESINFO;
1286 1258
1287 /* si+Ext_ResInfo */ 1259 /* si+Ext_ResInfo */
1288 resindex = pVBInfo->EModeIDTable[ModeIdIndex].Ext_RESINFO; 1260 resindex = XGI330_EModeIDTable[ModeIdIndex].Ext_RESINFO;
1289 1261
1290 xres = pVBInfo->ModeResInfo[resindex].HTotal; 1262 xres = XGI330_ModeResInfo[resindex].HTotal;
1291 yres = pVBInfo->ModeResInfo[resindex].VTotal; 1263 yres = XGI330_ModeResInfo[resindex].VTotal;
1292 1264
1293 if (modeflag & HalfDCLK) 1265 if (modeflag & HalfDCLK)
1294 xres = xres << 1; 1266 xres = xres << 1;
@@ -1305,64 +1277,21 @@ static void XGI_GetLVDSResInfo(unsigned short ModeNo,
1305 pVBInfo->VDE = yres; 1277 pVBInfo->VDE = yres;
1306} 1278}
1307 1279
1308static void *XGI_GetLcdPtr(unsigned short BX, unsigned short ModeNo, 1280static void const *XGI_GetLcdPtr(struct XGI330_LCDDataTablStruct const *table,
1281 unsigned short ModeNo,
1309 unsigned short ModeIdIndex, 1282 unsigned short ModeIdIndex,
1310 unsigned short RefreshRateTableIndex, 1283 unsigned short RefreshRateTableIndex,
1311 struct vb_device_info *pVBInfo) 1284 struct vb_device_info *pVBInfo)
1312{ 1285{
1313 unsigned short i, tempdx, tempbx, tempal, modeflag, table; 1286 unsigned short i, tempdx, tempbx, modeflag;
1314
1315 struct XGI330_LCDDataTablStruct *tempdi = NULL;
1316
1317 tempbx = BX;
1318
1319 modeflag = pVBInfo->EModeIDTable[ModeIdIndex].Ext_ModeFlag;
1320 tempal = pVBInfo->RefIndex[RefreshRateTableIndex].Ext_CRT2CRTC;
1321
1322 tempal = tempal & 0x0f;
1323
1324 if (tempbx <= 1) { /* ExpLink */
1325 tempal = pVBInfo->RefIndex[RefreshRateTableIndex].Ext_CRT2CRTC;
1326
1327 if (pVBInfo->VBInfo & XGI_SetCRT2ToLCDA) {
1328 tempal = pVBInfo->RefIndex[RefreshRateTableIndex].
1329 Ext_CRT2CRTC2;
1330 }
1331 1287
1332 if (tempbx & 0x01) 1288 tempbx = 0;
1333 tempal = (tempal >> 4);
1334
1335 tempal = (tempal & 0x0f);
1336 }
1337
1338 switch (tempbx) {
1339 case 0:
1340 case 1:
1341 tempdi = xgifb_epllcd_crt1;
1342 break;
1343 case 2:
1344 tempdi = XGI_EPLLCDDataPtr;
1345 break;
1346 case 3:
1347 tempdi = XGI_EPLLCDDesDataPtr;
1348 break;
1349 case 4:
1350 tempdi = XGI_LCDDataTable;
1351 break;
1352 case 5:
1353 tempdi = XGI_LCDDesDataTable;
1354 break;
1355 default:
1356 break;
1357 }
1358 1289
1359 if (tempdi == NULL) /* OEMUtil */ 1290 modeflag = XGI330_EModeIDTable[ModeIdIndex].Ext_ModeFlag;
1360 return NULL;
1361 1291
1362 table = tempbx;
1363 i = 0; 1292 i = 0;
1364 1293
1365 while (tempdi[i].PANELID != 0xff) { 1294 while (table[i].PANELID != 0xff) {
1366 tempdx = pVBInfo->LCDResInfo; 1295 tempdx = pVBInfo->LCDResInfo;
1367 if (tempbx & 0x0080) { /* OEMUtil */ 1296 if (tempbx & 0x0080) { /* OEMUtil */
1368 tempbx &= (~0x0080); 1297 tempbx &= (~0x0080);
@@ -1372,341 +1301,21 @@ static void *XGI_GetLcdPtr(unsigned short BX, unsigned short ModeNo,
1372 if (pVBInfo->LCDInfo & EnableScalingLCD) 1301 if (pVBInfo->LCDInfo & EnableScalingLCD)
1373 tempdx &= (~PanelResInfo); 1302 tempdx &= (~PanelResInfo);
1374 1303
1375 if (tempdi[i].PANELID == tempdx) { 1304 if (table[i].PANELID == tempdx) {
1376 tempbx = tempdi[i].MASK; 1305 tempbx = table[i].MASK;
1377 tempdx = pVBInfo->LCDInfo; 1306 tempdx = pVBInfo->LCDInfo;
1378 1307
1379 if (modeflag & HalfDCLK) 1308 if (modeflag & HalfDCLK)
1380 tempdx |= SetLCDLowResolution; 1309 tempdx |= SetLCDLowResolution;
1381 1310
1382 tempbx &= tempdx; 1311 tempbx &= tempdx;
1383 if (tempbx == tempdi[i].CAP) 1312 if (tempbx == table[i].CAP)
1384 break; 1313 break;
1385 } 1314 }
1386 i++; 1315 i++;
1387 } 1316 }
1388 1317
1389 if (table == 0) { 1318 return table[i].DATAPTR;
1390 switch (tempdi[i].DATAPTR) {
1391 case 0:
1392 return &XGI_LVDSCRT11024x768_1_H[tempal];
1393 break;
1394 case 1:
1395 return &XGI_LVDSCRT11024x768_2_H[tempal];
1396 break;
1397 case 2:
1398 return &XGI_LVDSCRT11280x1024_1_H[tempal];
1399 break;
1400 case 3:
1401 return &XGI_LVDSCRT11280x1024_2_H[tempal];
1402 break;
1403 case 4:
1404 return &XGI_LVDSCRT11400x1050_1_H[tempal];
1405 break;
1406 case 5:
1407 return &XGI_LVDSCRT11400x1050_2_H[tempal];
1408 break;
1409 case 6:
1410 return &XGI_LVDSCRT11600x1200_1_H[tempal];
1411 break;
1412 case 7:
1413 return &XGI_LVDSCRT11024x768_1_Hx75[tempal];
1414 break;
1415 case 8:
1416 return &XGI_LVDSCRT11024x768_2_Hx75[tempal];
1417 break;
1418 case 9:
1419 return &XGI_LVDSCRT11280x1024_1_Hx75[tempal];
1420 break;
1421 case 10:
1422 return &XGI_LVDSCRT11280x1024_2_Hx75[tempal];
1423 break;
1424 default:
1425 break;
1426 }
1427 } else if (table == 1) {
1428 switch (tempdi[i].DATAPTR) {
1429 case 0:
1430 return &XGI_LVDSCRT11024x768_1_V[tempal];
1431 break;
1432 case 1:
1433 return &XGI_LVDSCRT11024x768_2_V[tempal];
1434 break;
1435 case 2:
1436 return &XGI_LVDSCRT11280x1024_1_V[tempal];
1437 break;
1438 case 3:
1439 return &XGI_LVDSCRT11280x1024_2_V[tempal];
1440 break;
1441 case 4:
1442 return &XGI_LVDSCRT11400x1050_1_V[tempal];
1443 break;
1444 case 5:
1445 return &XGI_LVDSCRT11400x1050_2_V[tempal];
1446 break;
1447 case 6:
1448 return &XGI_LVDSCRT11600x1200_1_V[tempal];
1449 break;
1450 case 7:
1451 return &XGI_LVDSCRT11024x768_1_Vx75[tempal];
1452 break;
1453 case 8:
1454 return &XGI_LVDSCRT11024x768_2_Vx75[tempal];
1455 break;
1456 case 9:
1457 return &XGI_LVDSCRT11280x1024_1_Vx75[tempal];
1458 break;
1459 case 10:
1460 return &XGI_LVDSCRT11280x1024_2_Vx75[tempal];
1461 break;
1462 default:
1463 break;
1464 }
1465 } else if (table == 2) {
1466 switch (tempdi[i].DATAPTR) {
1467 case 0:
1468 return &XGI_LVDS1024x768Data_1[tempal];
1469 break;
1470 case 1:
1471 return &XGI_LVDS1024x768Data_2[tempal];
1472 break;
1473 case 2:
1474 return &XGI_LVDS1280x1024Data_1[tempal];
1475 break;
1476 case 3:
1477 return &XGI_LVDS1280x1024Data_2[tempal];
1478 break;
1479 case 4:
1480 return &XGI_LVDS1400x1050Data_1[tempal];
1481 break;
1482 case 5:
1483 return &XGI_LVDS1400x1050Data_2[tempal];
1484 break;
1485 case 6:
1486 return &XGI_LVDS1600x1200Data_1[tempal];
1487 break;
1488 case 7:
1489 return &XGI_LVDSNoScalingData[tempal];
1490 break;
1491 case 8:
1492 return &XGI_LVDS1024x768Data_1x75[tempal];
1493 break;
1494 case 9:
1495 return &XGI_LVDS1024x768Data_2x75[tempal];
1496 break;
1497 case 10:
1498 return &XGI_LVDS1280x1024Data_1x75[tempal];
1499 break;
1500 case 11:
1501 return &XGI_LVDS1280x1024Data_2x75[tempal];
1502 break;
1503 case 12:
1504 return &XGI_LVDSNoScalingDatax75[tempal];
1505 break;
1506 default:
1507 break;
1508 }
1509 } else if (table == 3) {
1510 switch (tempdi[i].DATAPTR) {
1511 case 0:
1512 return &XGI_LVDS1024x768Des_1[tempal];
1513 break;
1514 case 1:
1515 return &XGI_LVDS1024x768Des_3[tempal];
1516 break;
1517 case 2:
1518 return &XGI_LVDS1024x768Des_2[tempal];
1519 break;
1520 case 3:
1521 return &XGI_LVDS1280x1024Des_1[tempal];
1522 break;
1523 case 4:
1524 return &XGI_LVDS1280x1024Des_2[tempal];
1525 break;
1526 case 5:
1527 return &XGI_LVDS1400x1050Des_1[tempal];
1528 break;
1529 case 6:
1530 return &XGI_LVDS1400x1050Des_2[tempal];
1531 break;
1532 case 7:
1533 return &XGI_LVDS1600x1200Des_1[tempal];
1534 break;
1535 case 8:
1536 return &XGI_LVDSNoScalingDesData[tempal];
1537 break;
1538 case 9:
1539 return &XGI_LVDS1024x768Des_1x75[tempal];
1540 break;
1541 case 10:
1542 return &XGI_LVDS1024x768Des_3x75[tempal];
1543 break;
1544 case 11:
1545 return &XGI_LVDS1024x768Des_2x75[tempal];
1546 break;
1547 case 12:
1548 return &XGI_LVDS1280x1024Des_1x75[tempal];
1549 break;
1550 case 13:
1551 return &XGI_LVDS1280x1024Des_2x75[tempal];
1552 break;
1553 case 14:
1554 return &XGI_LVDSNoScalingDesDatax75[tempal];
1555 break;
1556 default:
1557 break;
1558 }
1559 } else if (table == 4) {
1560 switch (tempdi[i].DATAPTR) {
1561 case 0:
1562 return &XGI_ExtLCD1024x768Data[tempal];
1563 break;
1564 case 1:
1565 return &XGI_StLCD1024x768Data[tempal];
1566 break;
1567 case 2:
1568 return &XGI_CetLCD1024x768Data[tempal];
1569 break;
1570 case 3:
1571 return &XGI_ExtLCD1280x1024Data[tempal];
1572 break;
1573 case 4:
1574 return &XGI_StLCD1280x1024Data[tempal];
1575 break;
1576 case 5:
1577 return &XGI_CetLCD1280x1024Data[tempal];
1578 break;
1579 case 6:
1580 case 7:
1581 return &xgifb_lcd_1400x1050[tempal];
1582 break;
1583 case 8:
1584 return &XGI_CetLCD1400x1050Data[tempal];
1585 break;
1586 case 9:
1587 return &XGI_ExtLCD1600x1200Data[tempal];
1588 break;
1589 case 10:
1590 return &XGI_StLCD1600x1200Data[tempal];
1591 break;
1592 case 11:
1593 return &XGI_NoScalingData[tempal];
1594 break;
1595 case 12:
1596 return &XGI_ExtLCD1024x768x75Data[tempal];
1597 break;
1598 case 13:
1599 return &XGI_ExtLCD1024x768x75Data[tempal];
1600 break;
1601 case 14:
1602 return &XGI_CetLCD1024x768x75Data[tempal];
1603 break;
1604 case 15:
1605 case 16:
1606 return &xgifb_lcd_1280x1024x75[tempal];
1607 break;
1608 case 17:
1609 return &XGI_CetLCD1280x1024x75Data[tempal];
1610 break;
1611 case 18:
1612 return &XGI_NoScalingDatax75[tempal];
1613 break;
1614 default:
1615 break;
1616 }
1617 } else if (table == 5) {
1618 switch (tempdi[i].DATAPTR) {
1619 case 0:
1620 return &XGI_ExtLCDDes1024x768Data[tempal];
1621 break;
1622 case 1:
1623 return &XGI_StLCDDes1024x768Data[tempal];
1624 break;
1625 case 2:
1626 return &XGI_CetLCDDes1024x768Data[tempal];
1627 break;
1628 case 3:
1629 if ((pVBInfo->VBType & VB_SIS301LV) ||
1630 (pVBInfo->VBType & VB_SIS302LV))
1631 return &XGI_ExtLCDDLDes1280x1024Data[tempal];
1632 else
1633 return &XGI_ExtLCDDes1280x1024Data[tempal];
1634 break;
1635 case 4:
1636 if ((pVBInfo->VBType & VB_SIS301LV) ||
1637 (pVBInfo->VBType & VB_SIS302LV))
1638 return &XGI_StLCDDLDes1280x1024Data[tempal];
1639 else
1640 return &XGI_StLCDDes1280x1024Data[tempal];
1641 break;
1642 case 5:
1643 if ((pVBInfo->VBType & VB_SIS301LV) ||
1644 (pVBInfo->VBType & VB_SIS302LV))
1645 return &XGI_CetLCDDLDes1280x1024Data[tempal];
1646 else
1647 return &XGI_CetLCDDes1280x1024Data[tempal];
1648 break;
1649 case 6:
1650 case 7:
1651 if ((pVBInfo->VBType & VB_SIS301LV) ||
1652 (pVBInfo->VBType & VB_SIS302LV))
1653 return &xgifb_lcddldes_1400x1050[tempal];
1654 else
1655 return &xgifb_lcddes_1400x1050[tempal];
1656 break;
1657 case 8:
1658 return &XGI_CetLCDDes1400x1050Data[tempal];
1659 break;
1660 case 9:
1661 return &XGI_CetLCDDes1400x1050Data2[tempal];
1662 break;
1663 case 10:
1664 if ((pVBInfo->VBType & VB_SIS301LV) ||
1665 (pVBInfo->VBType & VB_SIS302LV))
1666 return &XGI_ExtLCDDLDes1600x1200Data[tempal];
1667 else
1668 return &XGI_ExtLCDDes1600x1200Data[tempal];
1669 break;
1670 case 11:
1671 if ((pVBInfo->VBType & VB_SIS301LV) ||
1672 (pVBInfo->VBType & VB_SIS302LV))
1673 return &XGI_StLCDDLDes1600x1200Data[tempal];
1674 else
1675 return &XGI_StLCDDes1600x1200Data[tempal];
1676 break;
1677 case 12:
1678 return &XGI_NoScalingDesData[tempal];
1679 break;
1680 case 13:
1681 case 14:
1682 return &xgifb_lcddes_1024x768x75[tempal];
1683 break;
1684 case 15:
1685 return &XGI_CetLCDDes1024x768x75Data[tempal];
1686 break;
1687 case 16:
1688 case 17:
1689 if ((pVBInfo->VBType & VB_SIS301LV) ||
1690 (pVBInfo->VBType & VB_SIS302LV))
1691 return &xgifb_lcddldes_1280x1024x75[tempal];
1692 else
1693 return &xgifb_lcddes_1280x1024x75[tempal];
1694 break;
1695 case 18:
1696 if ((pVBInfo->VBType & VB_SIS301LV) ||
1697 (pVBInfo->VBType & VB_SIS302LV))
1698 return &XGI_CetLCDDLDes1280x1024x75Data[tempal];
1699 else
1700 return &XGI_CetLCDDes1280x1024x75Data[tempal];
1701 break;
1702 case 19:
1703 return &XGI_NoScalingDesDatax75[tempal];
1704 break;
1705 default:
1706 break;
1707 }
1708 }
1709 return NULL;
1710} 1319}
1711 1320
1712static struct SiS_TVData const *XGI_GetTVPtr(unsigned short ModeNo, 1321static struct SiS_TVData const *XGI_GetTVPtr(unsigned short ModeNo,
@@ -1716,8 +1325,8 @@ static struct SiS_TVData const *XGI_GetTVPtr(unsigned short ModeNo,
1716{ 1325{
1717 unsigned short i, tempdx, tempal, modeflag; 1326 unsigned short i, tempdx, tempal, modeflag;
1718 1327
1719 modeflag = pVBInfo->EModeIDTable[ModeIdIndex].Ext_ModeFlag; 1328 modeflag = XGI330_EModeIDTable[ModeIdIndex].Ext_ModeFlag;
1720 tempal = pVBInfo->RefIndex[RefreshRateTableIndex].Ext_CRT2CRTC; 1329 tempal = XGI330_RefIndex[RefreshRateTableIndex].Ext_CRT2CRTC;
1721 tempal = tempal & 0x3f; 1330 tempal = tempal & 0x3f;
1722 tempdx = pVBInfo->TVInfo; 1331 tempdx = pVBInfo->TVInfo;
1723 1332
@@ -1743,40 +1352,35 @@ static void XGI_GetLVDSData(unsigned short ModeNo, unsigned short ModeIdIndex,
1743 unsigned short RefreshRateTableIndex, 1352 unsigned short RefreshRateTableIndex,
1744 struct vb_device_info *pVBInfo) 1353 struct vb_device_info *pVBInfo)
1745{ 1354{
1746 unsigned short tempbx; 1355 struct SiS_LVDSData const *LCDPtr;
1747 struct SiS_LVDSData *LCDPtr = NULL;
1748 1356
1749 tempbx = 2; 1357 if (!(pVBInfo->VBInfo & (SetCRT2ToLCD | XGI_SetCRT2ToLCDA)))
1358 return;
1750 1359
1751 if (pVBInfo->VBInfo & (SetCRT2ToLCD | XGI_SetCRT2ToLCDA)) { 1360 LCDPtr = XGI_GetLcdPtr(XGI_EPLLCDDataPtr, ModeNo, ModeIdIndex,
1752 LCDPtr = XGI_GetLcdPtr(tempbx, ModeNo, ModeIdIndex, 1361 RefreshRateTableIndex, pVBInfo);
1753 RefreshRateTableIndex, pVBInfo); 1362 pVBInfo->VGAHT = LCDPtr->VGAHT;
1754 pVBInfo->VGAHT = LCDPtr->VGAHT; 1363 pVBInfo->VGAVT = LCDPtr->VGAVT;
1755 pVBInfo->VGAVT = LCDPtr->VGAVT; 1364 pVBInfo->HT = LCDPtr->LCDHT;
1756 pVBInfo->HT = LCDPtr->LCDHT; 1365 pVBInfo->VT = LCDPtr->LCDVT;
1757 pVBInfo->VT = LCDPtr->LCDVT;
1758 }
1759 1366
1760 if (pVBInfo->VBInfo & (SetCRT2ToLCD | XGI_SetCRT2ToLCDA)) { 1367 if (pVBInfo->LCDInfo & (SetLCDtoNonExpanding | EnableScalingLCD))
1761 if (!(pVBInfo->LCDInfo & (SetLCDtoNonExpanding 1368 return;
1762 | EnableScalingLCD))) { 1369
1763 if ((pVBInfo->LCDResInfo == Panel_1024x768) || 1370 if ((pVBInfo->LCDResInfo == Panel_1024x768) ||
1764 (pVBInfo->LCDResInfo == Panel_1024x768x75)) { 1371 (pVBInfo->LCDResInfo == Panel_1024x768x75)) {
1765 pVBInfo->HDE = 1024; 1372 pVBInfo->HDE = 1024;
1766 pVBInfo->VDE = 768; 1373 pVBInfo->VDE = 768;
1767 } else if ((pVBInfo->LCDResInfo == Panel_1280x1024) || 1374 } else if ((pVBInfo->LCDResInfo == Panel_1280x1024) ||
1768 (pVBInfo->LCDResInfo == 1375 (pVBInfo->LCDResInfo == Panel_1280x1024x75)) {
1769 Panel_1280x1024x75)) { 1376 pVBInfo->HDE = 1280;
1770 pVBInfo->HDE = 1280; 1377 pVBInfo->VDE = 1024;
1771 pVBInfo->VDE = 1024; 1378 } else if (pVBInfo->LCDResInfo == Panel_1400x1050) {
1772 } else if (pVBInfo->LCDResInfo == Panel_1400x1050) { 1379 pVBInfo->HDE = 1400;
1773 pVBInfo->HDE = 1400; 1380 pVBInfo->VDE = 1050;
1774 pVBInfo->VDE = 1050; 1381 } else {
1775 } else { 1382 pVBInfo->HDE = 1600;
1776 pVBInfo->HDE = 1600; 1383 pVBInfo->VDE = 1200;
1777 pVBInfo->VDE = 1200;
1778 }
1779 }
1780 } 1384 }
1781} 1385}
1782 1386
@@ -1786,32 +1390,29 @@ static void XGI_ModCRT1Regs(unsigned short ModeNo, unsigned short ModeIdIndex,
1786 struct vb_device_info *pVBInfo) 1390 struct vb_device_info *pVBInfo)
1787{ 1391{
1788 unsigned char index; 1392 unsigned char index;
1789 unsigned short tempbx, i; 1393 unsigned short i;
1790 struct XGI_LVDSCRT1HDataStruct *LCDPtr = NULL; 1394 struct XGI_LVDSCRT1HDataStruct const *LCDPtr = NULL;
1791 struct XGI_LVDSCRT1VDataStruct *LCDPtr1 = NULL; 1395 struct XGI_LVDSCRT1VDataStruct const *LCDPtr1 = NULL;
1792 1396
1793 index = pVBInfo->RefIndex[RefreshRateTableIndex].Ext_CRT2CRTC; 1397 index = XGI330_RefIndex[RefreshRateTableIndex].Ext_CRT2CRTC;
1794 index = index & IndexMask; 1398 index = index & IndexMask;
1795 1399
1796 tempbx = 0;
1797
1798 if (pVBInfo->VBInfo & (SetCRT2ToLCD | XGI_SetCRT2ToLCDA)) { 1400 if (pVBInfo->VBInfo & (SetCRT2ToLCD | XGI_SetCRT2ToLCDA)) {
1799 LCDPtr = XGI_GetLcdPtr(tempbx, ModeNo, ModeIdIndex, 1401 LCDPtr = XGI_GetLcdPtr(xgifb_epllcd_crt1_h, ModeNo, ModeIdIndex,
1800 RefreshRateTableIndex, pVBInfo); 1402 RefreshRateTableIndex, pVBInfo);
1801 1403
1802 for (i = 0; i < 8; i++) 1404 for (i = 0; i < 8; i++)
1803 pVBInfo->TimingH[0].data[i] = LCDPtr[0].Reg[i]; 1405 pVBInfo->TimingH.data[i] = LCDPtr[0].Reg[i];
1804 } 1406 }
1805 1407
1806 XGI_SetCRT1Timing_H(pVBInfo, HwDeviceExtension); 1408 XGI_SetCRT1Timing_H(pVBInfo, HwDeviceExtension);
1807 1409
1808 tempbx = 1;
1809
1810 if (pVBInfo->VBInfo & (SetCRT2ToLCD | XGI_SetCRT2ToLCDA)) { 1410 if (pVBInfo->VBInfo & (SetCRT2ToLCD | XGI_SetCRT2ToLCDA)) {
1811 LCDPtr1 = XGI_GetLcdPtr(tempbx, ModeNo, ModeIdIndex, 1411 LCDPtr1 = XGI_GetLcdPtr(xgifb_epllcd_crt1_v, ModeNo,
1812 RefreshRateTableIndex, pVBInfo); 1412 ModeIdIndex, RefreshRateTableIndex,
1413 pVBInfo);
1813 for (i = 0; i < 7; i++) 1414 for (i = 0; i < 7; i++)
1814 pVBInfo->TimingV[0].data[i] = LCDPtr1[0].Reg[i]; 1415 pVBInfo->TimingV.data[i] = LCDPtr1[0].Reg[i];
1815 } 1416 }
1816 1417
1817 XGI_SetCRT1Timing_V(ModeIdIndex, ModeNo, pVBInfo); 1418 XGI_SetCRT1Timing_V(ModeIdIndex, ModeNo, pVBInfo);
@@ -1895,17 +1496,18 @@ static void XGI_SetLVDSRegs(unsigned short ModeNo, unsigned short ModeIdIndex,
1895{ 1496{
1896 unsigned short tempbx, tempax, tempcx, tempdx, push1, push2, modeflag; 1497 unsigned short tempbx, tempax, tempcx, tempdx, push1, push2, modeflag;
1897 unsigned long temp, temp1, temp2, temp3, push3; 1498 unsigned long temp, temp1, temp2, temp3, push3;
1898 struct XGI_LCDDesStruct *LCDPtr = NULL; 1499 struct XGI_LCDDesStruct const *LCDPtr = NULL;
1899 struct XGI330_LCDDataDesStruct2 *LCDPtr1 = NULL; 1500 struct XGI330_LCDDataDesStruct2 const *LCDPtr1 = NULL;
1900 1501
1901 modeflag = pVBInfo->EModeIDTable[ModeIdIndex].Ext_ModeFlag; 1502 modeflag = XGI330_EModeIDTable[ModeIdIndex].Ext_ModeFlag;
1902 tempbx = 3;
1903 if (pVBInfo->LCDInfo & EnableScalingLCD) 1503 if (pVBInfo->LCDInfo & EnableScalingLCD)
1904 LCDPtr1 = XGI_GetLcdPtr(tempbx, ModeNo, ModeIdIndex, 1504 LCDPtr1 = XGI_GetLcdPtr(XGI_EPLLCDDesDataPtr, ModeNo,
1905 RefreshRateTableIndex, pVBInfo); 1505 ModeIdIndex, RefreshRateTableIndex,
1506 pVBInfo);
1906 else 1507 else
1907 LCDPtr = XGI_GetLcdPtr(tempbx, ModeNo, ModeIdIndex, 1508 LCDPtr = XGI_GetLcdPtr(XGI_EPLLCDDesDataPtr, ModeNo,
1908 RefreshRateTableIndex, pVBInfo); 1509 ModeIdIndex, RefreshRateTableIndex,
1510 pVBInfo);
1909 1511
1910 XGI_GetLCDSync(&tempax, &tempbx, pVBInfo); 1512 XGI_GetLCDSync(&tempax, &tempbx, pVBInfo);
1911 push1 = tempbx; 1513 push1 = tempbx;
@@ -2179,7 +1781,7 @@ static unsigned char XGI_GetVCLKPtr(unsigned short RefreshRateTableIndex,
2179 unsigned char tempal; 1781 unsigned char tempal;
2180 1782
2181 /* si+Ext_ResInfo */ 1783 /* si+Ext_ResInfo */
2182 modeflag = pVBInfo->EModeIDTable[ModeIdIndex].Ext_ModeFlag; 1784 modeflag = XGI330_EModeIDTable[ModeIdIndex].Ext_ModeFlag;
2183 1785
2184 if ((pVBInfo->SetFlag & ProgrammingCRT2) && 1786 if ((pVBInfo->SetFlag & ProgrammingCRT2) &&
2185 (!(pVBInfo->LCDInfo & EnableScalingLCD))) { /* {LCDA/LCDB} */ 1787 (!(pVBInfo->LCDInfo & EnableScalingLCD))) { /* {LCDA/LCDB} */
@@ -2241,7 +1843,7 @@ static unsigned char XGI_GetVCLKPtr(unsigned short RefreshRateTableIndex,
2241 if ((pVBInfo->LCDInfo & EnableScalingLCD) && (modeflag & Charx8Dot)) 1843 if ((pVBInfo->LCDInfo & EnableScalingLCD) && (modeflag & Charx8Dot))
2242 tempal = tempal ^ tempal; /* ; set to VCLK25MHz always */ 1844 tempal = tempal ^ tempal; /* ; set to VCLK25MHz always */
2243 1845
2244 tempal = pVBInfo->RefIndex[RefreshRateTableIndex].Ext_CRTVCLK; 1846 tempal = XGI330_RefIndex[RefreshRateTableIndex].Ext_CRTVCLK;
2245 return tempal; 1847 return tempal;
2246} 1848}
2247 1849
@@ -2425,7 +2027,7 @@ static void XGI_GetVBInfo(unsigned short ModeNo, unsigned short ModeIdIndex,
2425{ 2027{
2426 unsigned short tempax, push, tempbx, temp, modeflag; 2028 unsigned short tempax, push, tempbx, temp, modeflag;
2427 2029
2428 modeflag = pVBInfo->EModeIDTable[ModeIdIndex].Ext_ModeFlag; 2030 modeflag = XGI330_EModeIDTable[ModeIdIndex].Ext_ModeFlag;
2429 pVBInfo->SetFlag = 0; 2031 pVBInfo->SetFlag = 0;
2430 pVBInfo->ModeType = modeflag & ModeTypeMask; 2032 pVBInfo->ModeType = modeflag & ModeTypeMask;
2431 tempbx = 0; 2033 tempbx = 0;
@@ -2501,7 +2103,7 @@ static void XGI_GetVBInfo(unsigned short ModeNo, unsigned short ModeIdIndex,
2501 } else { 2103 } else {
2502 temp = 0x017C; 2104 temp = 0x017C;
2503 } 2105 }
2504 } else { /* 3nd party chip */ 2106 } else { /* 3rd party chip */
2505 temp = SetCRT2ToLCD; 2107 temp = SetCRT2ToLCD;
2506 } 2108 }
2507 2109
@@ -2611,8 +2213,8 @@ static void XGI_GetTVInfo(unsigned short ModeNo, unsigned short ModeIdIndex,
2611 resinfo = 0; 2213 resinfo = 0;
2612 2214
2613 if (pVBInfo->VBInfo & SetCRT2ToTV) { 2215 if (pVBInfo->VBInfo & SetCRT2ToTV) {
2614 modeflag = pVBInfo->EModeIDTable[ModeIdIndex].Ext_ModeFlag; 2216 modeflag = XGI330_EModeIDTable[ModeIdIndex].Ext_ModeFlag;
2615 resinfo = pVBInfo->EModeIDTable[ModeIdIndex].Ext_RESINFO; 2217 resinfo = XGI330_EModeIDTable[ModeIdIndex].Ext_RESINFO;
2616 2218
2617 if (pVBInfo->VBInfo & SetCRT2ToTV) { 2219 if (pVBInfo->VBInfo & SetCRT2ToTV) {
2618 temp = xgifb_reg_get(pVBInfo->P3d4, 0x35); 2220 temp = xgifb_reg_get(pVBInfo->P3d4, 0x35);
@@ -2697,9 +2299,9 @@ static unsigned char XGI_GetLCDInfo(unsigned short ModeNo,
2697 pVBInfo->LCDTypeInfo = 0; 2299 pVBInfo->LCDTypeInfo = 0;
2698 pVBInfo->LCDInfo = 0; 2300 pVBInfo->LCDInfo = 0;
2699 2301
2700 modeflag = pVBInfo->EModeIDTable[ModeIdIndex].Ext_ModeFlag; 2302 modeflag = XGI330_EModeIDTable[ModeIdIndex].Ext_ModeFlag;
2701 /* si+Ext_ResInfo // */ 2303 /* si+Ext_ResInfo // */
2702 resinfo = pVBInfo->EModeIDTable[ModeIdIndex].Ext_RESINFO; 2304 resinfo = XGI330_EModeIDTable[ModeIdIndex].Ext_RESINFO;
2703 temp = xgifb_reg_get(pVBInfo->P3d4, 0x36); /* Get LCD Res.Info */ 2305 temp = xgifb_reg_get(pVBInfo->P3d4, 0x36); /* Get LCD Res.Info */
2704 tempbx = temp & 0x0F; 2306 tempbx = temp & 0x0F;
2705 2307
@@ -2778,9 +2380,9 @@ unsigned char XGI_SearchModeID(unsigned short ModeNo,
2778 unsigned short *ModeIdIndex, struct vb_device_info *pVBInfo) 2380 unsigned short *ModeIdIndex, struct vb_device_info *pVBInfo)
2779{ 2381{
2780 for (*ModeIdIndex = 0;; (*ModeIdIndex)++) { 2382 for (*ModeIdIndex = 0;; (*ModeIdIndex)++) {
2781 if (pVBInfo->EModeIDTable[*ModeIdIndex].Ext_ModeID == ModeNo) 2383 if (XGI330_EModeIDTable[*ModeIdIndex].Ext_ModeID == ModeNo)
2782 break; 2384 break;
2783 if (pVBInfo->EModeIDTable[*ModeIdIndex].Ext_ModeID == 0xFF) 2385 if (XGI330_EModeIDTable[*ModeIdIndex].Ext_ModeID == 0xFF)
2784 return 0; 2386 return 0;
2785 } 2387 }
2786 2388
@@ -3020,11 +2622,11 @@ static void XGI_GetCRT2ResInfo(unsigned short ModeNo,
3020{ 2622{
3021 unsigned short xres, yres, modeflag, resindex; 2623 unsigned short xres, yres, modeflag, resindex;
3022 2624
3023 resindex = pVBInfo->EModeIDTable[ModeIdIndex].Ext_RESINFO; 2625 resindex = XGI330_EModeIDTable[ModeIdIndex].Ext_RESINFO;
3024 xres = pVBInfo->ModeResInfo[resindex].HTotal; /* xres->ax */ 2626 xres = XGI330_ModeResInfo[resindex].HTotal; /* xres->ax */
3025 yres = pVBInfo->ModeResInfo[resindex].VTotal; /* yres->bx */ 2627 yres = XGI330_ModeResInfo[resindex].VTotal; /* yres->bx */
3026 /* si+St_ModeFlag */ 2628 /* si+St_ModeFlag */
3027 modeflag = pVBInfo->EModeIDTable[ModeIdIndex].Ext_ModeFlag; 2629 modeflag = XGI330_EModeIDTable[ModeIdIndex].Ext_ModeFlag;
3028 2630
3029 if (modeflag & HalfDCLK) 2631 if (modeflag & HalfDCLK)
3030 xres *= 2; 2632 xres *= 2;
@@ -3099,19 +2701,19 @@ static void XGI_GetRAMDAC2DATA(unsigned short ModeNo,
3099 2701
3100 pVBInfo->RVBHCMAX = 1; 2702 pVBInfo->RVBHCMAX = 1;
3101 pVBInfo->RVBHCFACT = 1; 2703 pVBInfo->RVBHCFACT = 1;
3102 modeflag = pVBInfo->EModeIDTable[ModeIdIndex].Ext_ModeFlag; 2704 modeflag = XGI330_EModeIDTable[ModeIdIndex].Ext_ModeFlag;
3103 CRT1Index = pVBInfo->RefIndex[RefreshRateTableIndex].Ext_CRT1CRTC; 2705 CRT1Index = XGI330_RefIndex[RefreshRateTableIndex].Ext_CRT1CRTC;
3104 CRT1Index &= IndexMask; 2706 CRT1Index &= IndexMask;
3105 temp1 = (unsigned short) pVBInfo->XGINEWUB_CRT1Table[CRT1Index].CR[0]; 2707 temp1 = (unsigned short) XGI_CRT1Table[CRT1Index].CR[0];
3106 temp2 = (unsigned short) pVBInfo->XGINEWUB_CRT1Table[CRT1Index].CR[5]; 2708 temp2 = (unsigned short) XGI_CRT1Table[CRT1Index].CR[5];
3107 tempax = (temp1 & 0xFF) | ((temp2 & 0x03) << 8); 2709 tempax = (temp1 & 0xFF) | ((temp2 & 0x03) << 8);
3108 tempbx = (unsigned short) pVBInfo->XGINEWUB_CRT1Table[CRT1Index].CR[8]; 2710 tempbx = (unsigned short) XGI_CRT1Table[CRT1Index].CR[8];
3109 tempcx = (unsigned short) 2711 tempcx = (unsigned short)
3110 pVBInfo->XGINEWUB_CRT1Table[CRT1Index].CR[14] << 8; 2712 XGI_CRT1Table[CRT1Index].CR[14] << 8;
3111 tempcx &= 0x0100; 2713 tempcx &= 0x0100;
3112 tempcx = tempcx << 2; 2714 tempcx = tempcx << 2;
3113 tempbx |= tempcx; 2715 tempbx |= tempcx;
3114 temp1 = (unsigned short) pVBInfo->XGINEWUB_CRT1Table[CRT1Index].CR[9]; 2716 temp1 = (unsigned short) XGI_CRT1Table[CRT1Index].CR[9];
3115 2717
3116 if (temp1 & 0x01) 2718 if (temp1 & 0x01)
3117 tempbx |= 0x0100; 2719 tempbx |= 0x0100;
@@ -3136,13 +2738,13 @@ static void XGI_GetCRT2Data(unsigned short ModeNo, unsigned short ModeIdIndex,
3136 unsigned short RefreshRateTableIndex, 2738 unsigned short RefreshRateTableIndex,
3137 struct vb_device_info *pVBInfo) 2739 struct vb_device_info *pVBInfo)
3138{ 2740{
3139 unsigned short tempax = 0, tempbx, modeflag, resinfo; 2741 unsigned short tempax = 0, tempbx = 0, modeflag, resinfo;
3140 2742
3141 struct SiS_LCDData *LCDPtr = NULL; 2743 struct SiS_LCDData const *LCDPtr = NULL;
3142 2744
3143 /* si+Ext_ResInfo */ 2745 /* si+Ext_ResInfo */
3144 modeflag = pVBInfo->EModeIDTable[ModeIdIndex].Ext_ModeFlag; 2746 modeflag = XGI330_EModeIDTable[ModeIdIndex].Ext_ModeFlag;
3145 resinfo = pVBInfo->EModeIDTable[ModeIdIndex].Ext_RESINFO; 2747 resinfo = XGI330_EModeIDTable[ModeIdIndex].Ext_RESINFO;
3146 pVBInfo->NewFlickerMode = 0; 2748 pVBInfo->NewFlickerMode = 0;
3147 pVBInfo->RVBHRS = 50; 2749 pVBInfo->RVBHRS = 50;
3148 2750
@@ -3152,10 +2754,8 @@ static void XGI_GetCRT2Data(unsigned short ModeNo, unsigned short ModeIdIndex,
3152 return; 2754 return;
3153 } 2755 }
3154 2756
3155 tempbx = 4;
3156
3157 if (pVBInfo->VBInfo & (SetCRT2ToLCD | XGI_SetCRT2ToLCDA)) { 2757 if (pVBInfo->VBInfo & (SetCRT2ToLCD | XGI_SetCRT2ToLCDA)) {
3158 LCDPtr = XGI_GetLcdPtr(tempbx, ModeNo, ModeIdIndex, 2758 LCDPtr = XGI_GetLcdPtr(XGI_LCDDataTable, ModeNo, ModeIdIndex,
3159 RefreshRateTableIndex, pVBInfo); 2759 RefreshRateTableIndex, pVBInfo);
3160 2760
3161 pVBInfo->RVBHCMAX = LCDPtr->RVBHCMAX; 2761 pVBInfo->RVBHCMAX = LCDPtr->RVBHCMAX;
@@ -3345,7 +2945,7 @@ static unsigned short XGI_GetColorDepth(unsigned short ModeNo,
3345 short index; 2945 short index;
3346 unsigned short modeflag; 2946 unsigned short modeflag;
3347 2947
3348 modeflag = pVBInfo->EModeIDTable[ModeIdIndex].Ext_ModeFlag; 2948 modeflag = XGI330_EModeIDTable[ModeIdIndex].Ext_ModeFlag;
3349 index = (modeflag & ModeTypeMask) - ModeEGA; 2949 index = (modeflag & ModeTypeMask) - ModeEGA;
3350 2950
3351 if (index < 0) 2951 if (index < 0)
@@ -3363,12 +2963,12 @@ static unsigned short XGI_GetOffset(unsigned short ModeNo,
3363 unsigned short temp, colordepth, modeinfo, index, infoflag, 2963 unsigned short temp, colordepth, modeinfo, index, infoflag,
3364 ColorDepth[] = { 0x01, 0x02, 0x04 }; 2964 ColorDepth[] = { 0x01, 0x02, 0x04 };
3365 2965
3366 modeinfo = pVBInfo->EModeIDTable[ModeIdIndex].Ext_ModeInfo; 2966 modeinfo = XGI330_EModeIDTable[ModeIdIndex].Ext_ModeInfo;
3367 infoflag = pVBInfo->RefIndex[RefreshRateTableIndex].Ext_InfoFlag; 2967 infoflag = XGI330_RefIndex[RefreshRateTableIndex].Ext_InfoFlag;
3368 2968
3369 index = (modeinfo >> 8) & 0xFF; 2969 index = (modeinfo >> 8) & 0xFF;
3370 2970
3371 temp = pVBInfo->ScreenOffset[index]; 2971 temp = XGI330_ScreenOffset[index];
3372 2972
3373 if (infoflag & InterlaceMode) 2973 if (infoflag & InterlaceMode)
3374 temp = temp << 1; 2974 temp = temp << 1;
@@ -3424,9 +3024,9 @@ static void XGI_PreSetGroup1(unsigned short ModeNo, unsigned short ModeIdIndex,
3424{ 3024{
3425 unsigned short tempcx = 0, CRT1Index = 0, resinfo = 0; 3025 unsigned short tempcx = 0, CRT1Index = 0, resinfo = 0;
3426 3026
3427 CRT1Index = pVBInfo->RefIndex[RefreshRateTableIndex].Ext_CRT1CRTC; 3027 CRT1Index = XGI330_RefIndex[RefreshRateTableIndex].Ext_CRT1CRTC;
3428 CRT1Index &= IndexMask; 3028 CRT1Index &= IndexMask;
3429 resinfo = pVBInfo->EModeIDTable[ModeIdIndex].Ext_RESINFO; 3029 resinfo = XGI330_EModeIDTable[ModeIdIndex].Ext_RESINFO;
3430 3030
3431 XGI_SetCRT2Offset(ModeNo, ModeIdIndex, RefreshRateTableIndex, 3031 XGI_SetCRT2Offset(ModeNo, ModeIdIndex, RefreshRateTableIndex,
3432 HwDeviceExtension, pVBInfo); 3032 HwDeviceExtension, pVBInfo);
@@ -3447,10 +3047,10 @@ static void XGI_SetGroup1(unsigned short ModeNo, unsigned short ModeIdIndex,
3447 unsigned short temp = 0, tempax = 0, tempbx = 0, tempcx = 0, 3047 unsigned short temp = 0, tempax = 0, tempbx = 0, tempcx = 0,
3448 pushbx = 0, CRT1Index = 0, modeflag, resinfo = 0; 3048 pushbx = 0, CRT1Index = 0, modeflag, resinfo = 0;
3449 3049
3450 CRT1Index = pVBInfo->RefIndex[RefreshRateTableIndex].Ext_CRT1CRTC; 3050 CRT1Index = XGI330_RefIndex[RefreshRateTableIndex].Ext_CRT1CRTC;
3451 CRT1Index &= IndexMask; 3051 CRT1Index &= IndexMask;
3452 resinfo = pVBInfo->EModeIDTable[ModeIdIndex].Ext_RESINFO; 3052 resinfo = XGI330_EModeIDTable[ModeIdIndex].Ext_RESINFO;
3453 modeflag = pVBInfo->EModeIDTable[ModeIdIndex].Ext_ModeFlag; 3053 modeflag = XGI330_EModeIDTable[ModeIdIndex].Ext_ModeFlag;
3454 3054
3455 /* bainy change table name */ 3055 /* bainy change table name */
3456 if (modeflag & HalfDCLK) { 3056 if (modeflag & HalfDCLK) {
@@ -3469,14 +3069,13 @@ static void XGI_SetGroup1(unsigned short ModeNo, unsigned short ModeIdIndex,
3469 tempcx += tempbx; 3069 tempcx += tempbx;
3470 3070
3471 if (pVBInfo->VBInfo & SetCRT2ToRAMDAC) { 3071 if (pVBInfo->VBInfo & SetCRT2ToRAMDAC) {
3472 tempbx = pVBInfo->XGINEWUB_CRT1Table[CRT1Index].CR[4]; 3072 tempbx = XGI_CRT1Table[CRT1Index].CR[4];
3473 tempbx |= ((pVBInfo-> 3073 tempbx |= ((XGI_CRT1Table[CRT1Index].CR[14] &
3474 XGINEWUB_CRT1Table[CRT1Index].CR[14] &
3475 0xC0) << 2); 3074 0xC0) << 2);
3476 tempbx = (tempbx - 3) << 3; /* (VGAHRS-3)*8 */ 3075 tempbx = (tempbx - 3) << 3; /* (VGAHRS-3)*8 */
3477 tempcx = pVBInfo->XGINEWUB_CRT1Table[CRT1Index].CR[5]; 3076 tempcx = XGI_CRT1Table[CRT1Index].CR[5];
3478 tempcx &= 0x1F; 3077 tempcx &= 0x1F;
3479 temp = pVBInfo->XGINEWUB_CRT1Table[CRT1Index].CR[15]; 3078 temp = XGI_CRT1Table[CRT1Index].CR[15];
3480 temp = (temp & 0x04) << (5 - 2); /* VGAHRE D[5] */ 3079 temp = (temp & 0x04) << (5 - 2); /* VGAHRE D[5] */
3481 tempcx = ((tempcx | temp) - 3) << 3; /* (VGAHRE-3)*8 */ 3080 tempcx = ((tempcx | temp) - 3) << 3; /* (VGAHRE-3)*8 */
3482 } 3081 }
@@ -3505,14 +3104,13 @@ static void XGI_SetGroup1(unsigned short ModeNo, unsigned short ModeIdIndex,
3505 tempcx += tempbx; 3104 tempcx += tempbx;
3506 3105
3507 if (pVBInfo->VBInfo & SetCRT2ToRAMDAC) { 3106 if (pVBInfo->VBInfo & SetCRT2ToRAMDAC) {
3508 tempbx = pVBInfo->XGINEWUB_CRT1Table[CRT1Index].CR[3]; 3107 tempbx = XGI_CRT1Table[CRT1Index].CR[3];
3509 tempbx |= ((pVBInfo-> 3108 tempbx |= ((XGI_CRT1Table[CRT1Index].CR[5] &
3510 XGINEWUB_CRT1Table[CRT1Index].CR[5] &
3511 0xC0) << 2); 3109 0xC0) << 2);
3512 tempbx = (tempbx - 3) << 3; /* (VGAHRS-3)*8 */ 3110 tempbx = (tempbx - 3) << 3; /* (VGAHRS-3)*8 */
3513 tempcx = pVBInfo->XGINEWUB_CRT1Table[CRT1Index].CR[4]; 3111 tempcx = XGI_CRT1Table[CRT1Index].CR[4];
3514 tempcx &= 0x1F; 3112 tempcx &= 0x1F;
3515 temp = pVBInfo->XGINEWUB_CRT1Table[CRT1Index].CR[6]; 3113 temp = XGI_CRT1Table[CRT1Index].CR[6];
3516 temp = (temp & 0x04) << (5 - 2); /* VGAHRE D[5] */ 3114 temp = (temp & 0x04) << (5 - 2); /* VGAHRE D[5] */
3517 tempcx = ((tempcx | temp) - 3) << 3; /* (VGAHRE-3)*8 */ 3115 tempcx = ((tempcx | temp) - 3) << 3; /* (VGAHRE-3)*8 */
3518 tempbx += 16; 3116 tempbx += 16;
@@ -3554,8 +3152,8 @@ static void XGI_SetGroup1(unsigned short ModeNo, unsigned short ModeIdIndex,
3554 tempcx = ((pVBInfo->VGAVT - pVBInfo->VGAVDE) >> 4) + tempbx + 1; 3152 tempcx = ((pVBInfo->VGAVT - pVBInfo->VGAVDE) >> 4) + tempbx + 1;
3555 3153
3556 if (pVBInfo->VBInfo & SetCRT2ToRAMDAC) { 3154 if (pVBInfo->VBInfo & SetCRT2ToRAMDAC) {
3557 tempbx = pVBInfo->XGINEWUB_CRT1Table[CRT1Index].CR[10]; 3155 tempbx = XGI_CRT1Table[CRT1Index].CR[10];
3558 temp = pVBInfo->XGINEWUB_CRT1Table[CRT1Index].CR[9]; 3156 temp = XGI_CRT1Table[CRT1Index].CR[9];
3559 3157
3560 if (temp & 0x04) 3158 if (temp & 0x04)
3561 tempbx |= 0x0100; 3159 tempbx |= 0x0100;
@@ -3563,12 +3161,12 @@ static void XGI_SetGroup1(unsigned short ModeNo, unsigned short ModeIdIndex,
3563 if (temp & 0x080) 3161 if (temp & 0x080)
3564 tempbx |= 0x0200; 3162 tempbx |= 0x0200;
3565 3163
3566 temp = pVBInfo->XGINEWUB_CRT1Table[CRT1Index].CR[14]; 3164 temp = XGI_CRT1Table[CRT1Index].CR[14];
3567 3165
3568 if (temp & 0x08) 3166 if (temp & 0x08)
3569 tempbx |= 0x0400; 3167 tempbx |= 0x0400;
3570 3168
3571 temp = pVBInfo->XGINEWUB_CRT1Table[CRT1Index].CR[11]; 3169 temp = XGI_CRT1Table[CRT1Index].CR[11];
3572 tempcx = (tempcx & 0xFF00) | (temp & 0x00FF); 3170 tempcx = (tempcx & 0xFF00) | (temp & 0x00FF);
3573 } 3171 }
3574 3172
@@ -3609,9 +3207,9 @@ static void XGI_SetLockRegs(unsigned short ModeNo, unsigned short ModeIdIndex,
3609 modeflag, CRT1Index; 3207 modeflag, CRT1Index;
3610 3208
3611 /* si+Ext_ResInfo */ 3209 /* si+Ext_ResInfo */
3612 modeflag = pVBInfo->EModeIDTable[ModeIdIndex].Ext_ModeFlag; 3210 modeflag = XGI330_EModeIDTable[ModeIdIndex].Ext_ModeFlag;
3613 resinfo = pVBInfo->EModeIDTable[ModeIdIndex].Ext_RESINFO; 3211 resinfo = XGI330_EModeIDTable[ModeIdIndex].Ext_RESINFO;
3614 CRT1Index = pVBInfo->RefIndex[RefreshRateTableIndex].Ext_CRT1CRTC; 3212 CRT1Index = XGI330_RefIndex[RefreshRateTableIndex].Ext_CRT1CRTC;
3615 CRT1Index &= IndexMask; 3213 CRT1Index &= IndexMask;
3616 3214
3617 if (!(pVBInfo->VBInfo & SetInSlaveMode)) 3215 if (!(pVBInfo->VBInfo & SetInSlaveMode))
@@ -3909,9 +3507,9 @@ static void XGI_SetGroup2(unsigned short ModeNo, unsigned short ModeIdIndex,
3909 unsigned long longtemp, tempeax, tempebx, temp2, tempecx; 3507 unsigned long longtemp, tempeax, tempebx, temp2, tempecx;
3910 3508
3911 /* si+Ext_ResInfo */ 3509 /* si+Ext_ResInfo */
3912 modeflag = pVBInfo->EModeIDTable[ModeIdIndex].Ext_ModeFlag; 3510 modeflag = XGI330_EModeIDTable[ModeIdIndex].Ext_ModeFlag;
3913 resinfo = pVBInfo->EModeIDTable[ModeIdIndex].Ext_RESINFO; 3511 resinfo = XGI330_EModeIDTable[ModeIdIndex].Ext_RESINFO;
3914 crt2crtc = pVBInfo->RefIndex[RefreshRateTableIndex].Ext_CRT2CRTC; 3512 crt2crtc = XGI330_RefIndex[RefreshRateTableIndex].Ext_CRT2CRTC;
3915 3513
3916 tempax = 0; 3514 tempax = 0;
3917 3515
@@ -4345,12 +3943,12 @@ static void XGI_SetLCDRegs(unsigned short ModeNo, unsigned short ModeIdIndex,
4345 unsigned short push1, push2, pushbx, tempax, tempbx, tempcx, temp, 3943 unsigned short push1, push2, pushbx, tempax, tempbx, tempcx, temp,
4346 tempah, tempbh, tempch, resinfo, modeflag, CRT1Index; 3944 tempah, tempbh, tempch, resinfo, modeflag, CRT1Index;
4347 3945
4348 struct XGI_LCDDesStruct *LCDBDesPtr = NULL; 3946 struct XGI_LCDDesStruct const *LCDBDesPtr = NULL;
4349 3947
4350 /* si+Ext_ResInfo */ 3948 /* si+Ext_ResInfo */
4351 modeflag = pVBInfo->EModeIDTable[ModeIdIndex].Ext_ModeFlag; 3949 modeflag = XGI330_EModeIDTable[ModeIdIndex].Ext_ModeFlag;
4352 resinfo = pVBInfo->EModeIDTable[ModeIdIndex].Ext_RESINFO; 3950 resinfo = XGI330_EModeIDTable[ModeIdIndex].Ext_RESINFO;
4353 CRT1Index = pVBInfo->RefIndex[RefreshRateTableIndex].Ext_CRT1CRTC; 3951 CRT1Index = XGI330_RefIndex[RefreshRateTableIndex].Ext_CRT1CRTC;
4354 CRT1Index &= IndexMask; 3952 CRT1Index &= IndexMask;
4355 3953
4356 if (!(pVBInfo->VBInfo & SetCRT2ToLCD)) 3954 if (!(pVBInfo->VBInfo & SetCRT2ToLCD))
@@ -4390,10 +3988,15 @@ static void XGI_SetLCDRegs(unsigned short ModeNo, unsigned short ModeIdIndex,
4390 xgifb_reg_and_or(pVBInfo->Part2Port, 0x17, 0xFB, 0x00); 3988 xgifb_reg_and_or(pVBInfo->Part2Port, 0x17, 0xFB, 0x00);
4391 xgifb_reg_and_or(pVBInfo->Part2Port, 0x18, 0xDF, 0x00); 3989 xgifb_reg_and_or(pVBInfo->Part2Port, 0x18, 0xDF, 0x00);
4392 3990
4393 /* Customized LCDB Des no add */ 3991 /* Customized LCDB Does not add */
4394 tempbx = 5; 3992 if ((pVBInfo->VBType & VB_SIS301LV) || (pVBInfo->VBType & VB_SIS302LV))
4395 LCDBDesPtr = XGI_GetLcdPtr(tempbx, ModeNo, ModeIdIndex, 3993 LCDBDesPtr = XGI_GetLcdPtr(xgifb_lcddldes, ModeNo, ModeIdIndex,
4396 RefreshRateTableIndex, pVBInfo); 3994 RefreshRateTableIndex, pVBInfo);
3995 else
3996 LCDBDesPtr = XGI_GetLcdPtr(XGI_LCDDesDataTable, ModeNo,
3997 ModeIdIndex, RefreshRateTableIndex,
3998 pVBInfo);
3999
4397 tempah = pVBInfo->LCDResInfo; 4000 tempah = pVBInfo->LCDResInfo;
4398 tempah &= PanelResInfo; 4001 tempah &= PanelResInfo;
4399 4002
@@ -4545,12 +4148,11 @@ static void XGI_SetLCDRegs(unsigned short ModeNo, unsigned short ModeIdIndex,
4545/* Output : di -> Tap4 Reg. Setting Pointer */ 4148/* Output : di -> Tap4 Reg. Setting Pointer */
4546/* Description : */ 4149/* Description : */
4547/* --------------------------------------------------------------------- */ 4150/* --------------------------------------------------------------------- */
4548static struct XGI301C_Tap4TimingStruct *XGI_GetTap4Ptr(unsigned short tempcx, 4151static struct XGI301C_Tap4TimingStruct const
4549 struct vb_device_info *pVBInfo) 4152*XGI_GetTap4Ptr(unsigned short tempcx, struct vb_device_info *pVBInfo)
4550{ 4153{
4551 unsigned short tempax, tempbx, i; 4154 unsigned short tempax, tempbx, i;
4552 4155 struct XGI301C_Tap4TimingStruct const *Tap4TimingPtr;
4553 struct XGI301C_Tap4TimingStruct *Tap4TimingPtr;
4554 4156
4555 if (tempcx == 0) { 4157 if (tempcx == 0) {
4556 tempax = pVBInfo->VGAHDE; 4158 tempax = pVBInfo->VGAHDE;
@@ -4591,8 +4193,7 @@ static struct XGI301C_Tap4TimingStruct *XGI_GetTap4Ptr(unsigned short tempcx,
4591static void XGI_SetTap4Regs(struct vb_device_info *pVBInfo) 4193static void XGI_SetTap4Regs(struct vb_device_info *pVBInfo)
4592{ 4194{
4593 unsigned short i, j; 4195 unsigned short i, j;
4594 4196 struct XGI301C_Tap4TimingStruct const *Tap4TimingPtr;
4595 struct XGI301C_Tap4TimingStruct *Tap4TimingPtr;
4596 4197
4597 if (!(pVBInfo->VBType & VB_XGI301C)) 4198 if (!(pVBInfo->VBType & VB_XGI301C))
4598 return; 4199 return;
@@ -4628,7 +4229,7 @@ static void XGI_SetGroup3(unsigned short ModeNo, unsigned short ModeIdIndex,
4628 unsigned short modeflag; 4229 unsigned short modeflag;
4629 4230
4630 /* si+Ext_ResInfo */ 4231 /* si+Ext_ResInfo */
4631 modeflag = pVBInfo->EModeIDTable[ModeIdIndex].Ext_ModeFlag; 4232 modeflag = XGI330_EModeIDTable[ModeIdIndex].Ext_ModeFlag;
4632 4233
4633 xgifb_reg_set(pVBInfo->Part3Port, 0x00, 0x00); 4234 xgifb_reg_set(pVBInfo->Part3Port, 0x00, 0x00);
4634 if (pVBInfo->TVInfo & TVSetPAL) { 4235 if (pVBInfo->TVInfo & TVSetPAL) {
@@ -4687,7 +4288,7 @@ static void XGI_SetGroup4(unsigned short ModeNo, unsigned short ModeIdIndex,
4687 unsigned long tempebx, tempeax, templong; 4288 unsigned long tempebx, tempeax, templong;
4688 4289
4689 /* si+Ext_ResInfo */ 4290 /* si+Ext_ResInfo */
4690 modeflag = pVBInfo->EModeIDTable[ModeIdIndex].Ext_ModeFlag; 4291 modeflag = XGI330_EModeIDTable[ModeIdIndex].Ext_ModeFlag;
4691 temp = pVBInfo->RVBHCFACT; 4292 temp = pVBInfo->RVBHCFACT;
4692 xgifb_reg_set(pVBInfo->Part4Port, 0x13, temp); 4293 xgifb_reg_set(pVBInfo->Part4Port, 0x13, temp);
4693 4294
@@ -4890,11 +4491,11 @@ static unsigned char XGI_XG21CheckLVDSMode(struct xgifb_video_info *xgifb_info,
4890{ 4491{
4891 unsigned short xres, yres, colordepth, modeflag, resindex; 4492 unsigned short xres, yres, colordepth, modeflag, resindex;
4892 4493
4893 resindex = pVBInfo->EModeIDTable[ModeIdIndex].Ext_RESINFO; 4494 resindex = XGI330_EModeIDTable[ModeIdIndex].Ext_RESINFO;
4894 xres = pVBInfo->ModeResInfo[resindex].HTotal; /* xres->ax */ 4495 xres = XGI330_ModeResInfo[resindex].HTotal; /* xres->ax */
4895 yres = pVBInfo->ModeResInfo[resindex].VTotal; /* yres->bx */ 4496 yres = XGI330_ModeResInfo[resindex].VTotal; /* yres->bx */
4896 /* si+St_ModeFlag */ 4497 /* si+St_ModeFlag */
4897 modeflag = pVBInfo->EModeIDTable[ModeIdIndex].Ext_ModeFlag; 4498 modeflag = XGI330_EModeIDTable[ModeIdIndex].Ext_ModeFlag;
4898 4499
4899 if (!(modeflag & Charx8Dot)) { 4500 if (!(modeflag & Charx8Dot)) {
4900 xres /= 9; 4501 xres /= 9;
@@ -4952,11 +4553,11 @@ static void xgifb_set_lvds(struct xgifb_video_info *xgifb_info,
4952 else 4553 else
4953 XGI_SetXG21FPBits(pVBInfo); 4554 XGI_SetXG21FPBits(pVBInfo);
4954 4555
4955 resindex = pVBInfo->EModeIDTable[ModeIdIndex].Ext_RESINFO; 4556 resindex = XGI330_EModeIDTable[ModeIdIndex].Ext_RESINFO;
4956 xres = pVBInfo->ModeResInfo[resindex].HTotal; /* xres->ax */ 4557 xres = XGI330_ModeResInfo[resindex].HTotal; /* xres->ax */
4957 yres = pVBInfo->ModeResInfo[resindex].VTotal; /* yres->bx */ 4558 yres = XGI330_ModeResInfo[resindex].VTotal; /* yres->bx */
4958 /* si+St_ModeFlag */ 4559 /* si+St_ModeFlag */
4959 modeflag = pVBInfo->EModeIDTable[ModeIdIndex].Ext_ModeFlag; 4560 modeflag = XGI330_EModeIDTable[ModeIdIndex].Ext_ModeFlag;
4960 4561
4961 if (!(modeflag & Charx8Dot)) 4562 if (!(modeflag & Charx8Dot))
4962 xres = xres * 8 / 9; 4563 xres = xres * 8 / 9;
@@ -5619,8 +5220,8 @@ static void XGI_SetYFilter(unsigned short ModeNo, unsigned short ModeIdIndex,
5619 struct vb_device_info *pVBInfo) 5220 struct vb_device_info *pVBInfo)
5620{ 5221{
5621 unsigned short tempbx, index; 5222 unsigned short tempbx, index;
5622 5223 unsigned char const *filterPtr;
5623 unsigned char tempcl, tempch, tempal, *filterPtr; 5224 unsigned char tempcl, tempch, tempal;
5624 5225
5625 XGI_GetTVPtrIndex2(&tempbx, &tempcl, &tempch, pVBInfo); /* bx, cl, ch */ 5226 XGI_GetTVPtrIndex2(&tempbx, &tempcl, &tempch, pVBInfo); /* bx, cl, ch */
5626 5227
@@ -5653,7 +5254,7 @@ static void XGI_SetYFilter(unsigned short ModeNo, unsigned short ModeIdIndex,
5653 return; 5254 return;
5654 } 5255 }
5655 5256
5656 tempal = pVBInfo->EModeIDTable[ModeIdIndex].VB_ExtTVYFilterIndex; 5257 tempal = XGI330_EModeIDTable[ModeIdIndex].VB_ExtTVYFilterIndex;
5657 if (tempcl == 0) 5258 if (tempcl == 0)
5658 index = tempal * 4; 5259 index = tempal * 4;
5659 else 5260 else
@@ -5915,7 +5516,7 @@ unsigned short XGI_GetRatePtrCRT2(struct xgi_hw_device_info *pXGIHWDE,
5915 5516
5916 unsigned short RefreshRateTableIndex, i, modeflag, index, temp; 5517 unsigned short RefreshRateTableIndex, i, modeflag, index, temp;
5917 5518
5918 modeflag = pVBInfo->EModeIDTable[ModeIdIndex].Ext_ModeFlag; 5519 modeflag = XGI330_EModeIDTable[ModeIdIndex].Ext_ModeFlag;
5919 5520
5920 index = xgifb_reg_get(pVBInfo->P3d4, 0x33); 5521 index = xgifb_reg_get(pVBInfo->P3d4, 0x33);
5921 index = index >> pVBInfo->SelectCRT2Rate; 5522 index = index >> pVBInfo->SelectCRT2Rate;
@@ -5948,31 +5549,30 @@ unsigned short XGI_GetRatePtrCRT2(struct xgi_hw_device_info *pXGIHWDE,
5948 } 5549 }
5949 } 5550 }
5950 5551
5951 RefreshRateTableIndex = pVBInfo->EModeIDTable[ModeIdIndex].REFindex; 5552 RefreshRateTableIndex = XGI330_EModeIDTable[ModeIdIndex].REFindex;
5952 ModeNo = pVBInfo->RefIndex[RefreshRateTableIndex].ModeID; 5553 ModeNo = XGI330_RefIndex[RefreshRateTableIndex].ModeID;
5953 if (pXGIHWDE->jChipType >= XG20) { /* for XG20, XG21, XG27 */ 5554 if (pXGIHWDE->jChipType >= XG20) { /* for XG20, XG21, XG27 */
5954 if ((pVBInfo->RefIndex[RefreshRateTableIndex].XRes == 800) && 5555 if ((XGI330_RefIndex[RefreshRateTableIndex].XRes == 800) &&
5955 (pVBInfo->RefIndex[RefreshRateTableIndex].YRes == 600)) { 5556 (XGI330_RefIndex[RefreshRateTableIndex].YRes == 600)) {
5956 index++; 5557 index++;
5957 } 5558 }
5958 /* do the similar adjustment like XGISearchCRT1Rate() */ 5559 /* do the similar adjustment like XGISearchCRT1Rate() */
5959 if ((pVBInfo->RefIndex[RefreshRateTableIndex].XRes == 1024) && 5560 if ((XGI330_RefIndex[RefreshRateTableIndex].XRes == 1024) &&
5960 (pVBInfo->RefIndex[RefreshRateTableIndex].YRes == 768)) { 5561 (XGI330_RefIndex[RefreshRateTableIndex].YRes == 768)) {
5961 index++; 5562 index++;
5962 } 5563 }
5963 if ((pVBInfo->RefIndex[RefreshRateTableIndex].XRes == 1280) && 5564 if ((XGI330_RefIndex[RefreshRateTableIndex].XRes == 1280) &&
5964 (pVBInfo->RefIndex[RefreshRateTableIndex].YRes == 1024)) { 5565 (XGI330_RefIndex[RefreshRateTableIndex].YRes == 1024)) {
5965 index++; 5566 index++;
5966 } 5567 }
5967 } 5568 }
5968 5569
5969 i = 0; 5570 i = 0;
5970 do { 5571 do {
5971 if (pVBInfo->RefIndex[RefreshRateTableIndex + i]. 5572 if (XGI330_RefIndex[RefreshRateTableIndex + i].
5972 ModeID != ModeNo) 5573 ModeID != ModeNo)
5973 break; 5574 break;
5974 temp = pVBInfo->RefIndex[RefreshRateTableIndex + i]. 5575 temp = XGI330_RefIndex[RefreshRateTableIndex + i].Ext_InfoFlag;
5975 Ext_InfoFlag;
5976 temp &= ModeTypeMask; 5576 temp &= ModeTypeMask;
5977 if (temp < pVBInfo->ModeType) 5577 if (temp < pVBInfo->ModeType)
5978 break; 5578 break;
@@ -5982,7 +5582,7 @@ unsigned short XGI_GetRatePtrCRT2(struct xgi_hw_device_info *pXGIHWDE,
5982 } while (index != 0xFFFF); 5582 } while (index != 0xFFFF);
5983 if (!(pVBInfo->VBInfo & SetCRT2ToRAMDAC)) { 5583 if (!(pVBInfo->VBInfo & SetCRT2ToRAMDAC)) {
5984 if (pVBInfo->VBInfo & SetInSlaveMode) { 5584 if (pVBInfo->VBInfo & SetInSlaveMode) {
5985 temp = pVBInfo->RefIndex[RefreshRateTableIndex + i - 1]. 5585 temp = XGI330_RefIndex[RefreshRateTableIndex + i - 1].
5986 Ext_InfoFlag; 5586 Ext_InfoFlag;
5987 if (temp & InterlaceMode) 5587 if (temp & InterlaceMode)
5988 i++; 5588 i++;
@@ -6272,7 +5872,7 @@ static void XGI_SetCRT1Group(struct xgifb_video_info *xgifb_info,
6272 unsigned short RefreshRateTableIndex, temp; 5872 unsigned short RefreshRateTableIndex, temp;
6273 5873
6274 XGI_SetSeqRegs(ModeNo, ModeIdIndex, pVBInfo); 5874 XGI_SetSeqRegs(ModeNo, ModeIdIndex, pVBInfo);
6275 outb(pVBInfo->StandTable->MISC, pVBInfo->P3c2); 5875 outb(XGI330_StandTable.MISC, pVBInfo->P3c2);
6276 XGI_SetCRTCRegs(HwDeviceExtension, pVBInfo); 5876 XGI_SetCRTCRegs(HwDeviceExtension, pVBInfo);
6277 XGI_SetATTRegs(ModeNo, ModeIdIndex, pVBInfo); 5877 XGI_SetATTRegs(ModeNo, ModeIdIndex, pVBInfo);
6278 XGI_SetGRCRegs(pVBInfo); 5878 XGI_SetGRCRegs(pVBInfo);
@@ -6458,7 +6058,7 @@ unsigned char XGISetModeNew(struct xgifb_video_info *xgifb_info,
6458 pVBInfo)) 6058 pVBInfo))
6459 return 0; 6059 return 0;
6460 6060
6461 pVBInfo->ModeType = pVBInfo->EModeIDTable[ModeIdIndex]. 6061 pVBInfo->ModeType = XGI330_EModeIDTable[ModeIdIndex].
6462 Ext_ModeFlag & ModeTypeMask; 6062 Ext_ModeFlag & ModeTypeMask;
6463 6063
6464 pVBInfo->SetFlag = 0; 6064 pVBInfo->SetFlag = 0;
diff --git a/drivers/staging/xgifb/vb_struct.h b/drivers/staging/xgifb/vb_struct.h
index 70158c2c68af..acf6e7fbbaed 100644
--- a/drivers/staging/xgifb/vb_struct.h
+++ b/drivers/staging/xgifb/vb_struct.h
@@ -56,7 +56,7 @@ struct XGI330_LCDDataTablStruct {
56 unsigned char PANELID; 56 unsigned char PANELID;
57 unsigned short MASK; 57 unsigned short MASK;
58 unsigned short CAP; 58 unsigned short CAP;
59 unsigned short DATAPTR; 59 void const *DATAPTR;
60}; 60};
61 61
62struct XGI330_TVDataTablStruct { 62struct XGI330_TVDataTablStruct {
@@ -158,40 +158,18 @@ struct vb_device_info {
158 void __iomem *FBAddr; 158 void __iomem *FBAddr;
159 unsigned long BaseAddr; 159 unsigned long BaseAddr;
160 160
161 unsigned char (*CR6B)[4]; 161 unsigned char const (*SR15)[8];
162 unsigned char (*CR6E)[4]; 162 unsigned char const (*CR40)[8];
163 unsigned char (*CR6F)[32];
164 unsigned char (*CR89)[2];
165 163
166 unsigned char (*SR15)[8]; 164 struct SiS_MCLKData const *MCLKData;
167 unsigned char (*CR40)[8];
168 165
169 unsigned char *AGPReg;
170 unsigned char *SR16;
171 unsigned char SR21;
172 unsigned char SR22;
173 unsigned char SR25;
174 struct SiS_MCLKData *MCLKData;
175 struct XGI_ECLKDataStruct *ECLKData;
176
177 unsigned char *ScreenOffset;
178 unsigned char *pXGINew_DRAMTypeDefinition; 166 unsigned char *pXGINew_DRAMTypeDefinition;
179 unsigned char XGINew_CR97; 167 unsigned char XGINew_CR97;
180 168
181 struct XGI330_LCDCapStruct *LCDCapList; 169 struct XGI330_LCDCapStruct const *LCDCapList;
182
183 struct XGI_TimingHStruct *TimingH;
184 struct XGI_TimingVStruct *TimingV;
185 170
186 struct SiS_StandTable_S *StandTable; 171 struct XGI_TimingHStruct TimingH;
187 struct XGI_ExtStruct *EModeIDTable; 172 struct XGI_TimingVStruct TimingV;
188 struct XGI_Ext2Struct *RefIndex;
189 struct XGI_CRT1TableStruct *XGINEWUB_CRT1Table;
190 struct SiS_VCLKData *VCLKData;
191 struct SiS_VBVCLKData *VBVCLKData;
192 struct SiS_StResInfo_S *StResInfo;
193 struct SiS_ModeResInfo_S *ModeResInfo;
194 struct XGI_XG21CRT1Struct *UpdateCRT1;
195 173
196 int ram_type; 174 int ram_type;
197 int ram_channel; 175 int ram_channel;
diff --git a/drivers/staging/xgifb/vb_table.h b/drivers/staging/xgifb/vb_table.h
index 180aae042cea..39f528b14f01 100644
--- a/drivers/staging/xgifb/vb_table.h
+++ b/drivers/staging/xgifb/vb_table.h
@@ -1,6 +1,6 @@
1#ifndef _VB_TABLE_ 1#ifndef _VB_TABLE_
2#define _VB_TABLE_ 2#define _VB_TABLE_
3static struct SiS_MCLKData XGI340New_MCLKData[] = { 3static const struct SiS_MCLKData XGI340New_MCLKData[] = {
4 {0x16, 0x01, 0x01, 166}, 4 {0x16, 0x01, 0x01, 166},
5 {0x19, 0x02, 0x01, 124}, 5 {0x19, 0x02, 0x01, 124},
6 {0x7C, 0x08, 0x01, 200}, 6 {0x7C, 0x08, 0x01, 200},
@@ -11,7 +11,7 @@ static struct SiS_MCLKData XGI340New_MCLKData[] = {
11 {0x5c, 0x23, 0x01, 166} 11 {0x5c, 0x23, 0x01, 166}
12}; 12};
13 13
14static struct SiS_MCLKData XGI27New_MCLKData[] = { 14static const struct SiS_MCLKData XGI27New_MCLKData[] = {
15 {0x5c, 0x23, 0x01, 166}, 15 {0x5c, 0x23, 0x01, 166},
16 {0x19, 0x02, 0x01, 124}, 16 {0x19, 0x02, 0x01, 124},
17 {0x7C, 0x08, 0x80, 200}, 17 {0x7C, 0x08, 0x80, 200},
@@ -22,7 +22,7 @@ static struct SiS_MCLKData XGI27New_MCLKData[] = {
22 {0x5c, 0x23, 0x01, 166} 22 {0x5c, 0x23, 0x01, 166}
23}; 23};
24 24
25static struct XGI_ECLKDataStruct XGI340_ECLKData[] = { 25const struct XGI_ECLKDataStruct XGI340_ECLKData[] = {
26 {0x5c, 0x23, 0x01, 166}, 26 {0x5c, 0x23, 0x01, 166},
27 {0x55, 0x84, 0x01, 123}, 27 {0x55, 0x84, 0x01, 123},
28 {0x7C, 0x08, 0x01, 200}, 28 {0x7C, 0x08, 0x01, 200},
@@ -33,21 +33,21 @@ static struct XGI_ECLKDataStruct XGI340_ECLKData[] = {
33 {0x5c, 0x23, 0x01, 166} 33 {0x5c, 0x23, 0x01, 166}
34}; 34};
35 35
36static unsigned char XG27_SR13[4][8] = { 36static const unsigned char XG27_SR13[4][8] = {
37 {0x35, 0x45, 0xb1, 0x00, 0x00, 0x00, 0x00, 0x00}, /* SR13 */ 37 {0x35, 0x45, 0xb1, 0x00, 0x00, 0x00, 0x00, 0x00}, /* SR13 */
38 {0x41, 0x51, 0x5c, 0x00, 0x00, 0x00, 0x00, 0x00}, /* SR14 */ 38 {0x41, 0x51, 0x5c, 0x00, 0x00, 0x00, 0x00, 0x00}, /* SR14 */
39 {0x32, 0x32, 0x42, 0x00, 0x00, 0x00, 0x00, 0x00}, /* SR18 */ 39 {0x32, 0x32, 0x42, 0x00, 0x00, 0x00, 0x00, 0x00}, /* SR18 */
40 {0x03, 0x03, 0x03, 0x00, 0x00, 0x00, 0x00, 0x00} /* SR1B */ 40 {0x03, 0x03, 0x03, 0x00, 0x00, 0x00, 0x00, 0x00} /* SR1B */
41}; 41};
42 42
43static unsigned char XGI340_SR13[4][8] = { 43static const unsigned char XGI340_SR13[4][8] = {
44 {0x35, 0x45, 0xb1, 0x00, 0x00, 0x00, 0x00, 0x00}, /* SR13 */ 44 {0x35, 0x45, 0xb1, 0x00, 0x00, 0x00, 0x00, 0x00}, /* SR13 */
45 {0x41, 0x51, 0x5c, 0x00, 0x00, 0x00, 0x00, 0x00}, /* SR14 */ 45 {0x41, 0x51, 0x5c, 0x00, 0x00, 0x00, 0x00, 0x00}, /* SR14 */
46 {0x31, 0x42, 0x42, 0x00, 0x00, 0x00, 0x00, 0x00}, /* SR18 */ 46 {0x31, 0x42, 0x42, 0x00, 0x00, 0x00, 0x00, 0x00}, /* SR18 */
47 {0x03, 0x03, 0x03, 0x00, 0x00, 0x00, 0x00, 0x00} /* SR1B */ 47 {0x03, 0x03, 0x03, 0x00, 0x00, 0x00, 0x00, 0x00} /* SR1B */
48}; 48};
49 49
50static unsigned char XGI340_cr41[24][8] = { 50static const unsigned char XGI340_cr41[24][8] = {
51 {0x20, 0x50, 0x60, 0x00, 0x00, 0x00, 0x00, 0x00}, /* 0 CR41 */ 51 {0x20, 0x50, 0x60, 0x00, 0x00, 0x00, 0x00, 0x00}, /* 0 CR41 */
52 {0xc4, 0x40, 0x84, 0x00, 0x00, 0x00, 0x00, 0x00}, /* 1 CR8A */ 52 {0xc4, 0x40, 0x84, 0x00, 0x00, 0x00, 0x00, 0x00}, /* 1 CR8A */
53 {0xc4, 0x40, 0x84, 0x00, 0x00, 0x00, 0x00, 0x00}, /* 2 CR8B */ 53 {0xc4, 0x40, 0x84, 0x00, 0x00, 0x00, 0x00, 0x00}, /* 2 CR8B */
@@ -74,7 +74,7 @@ static unsigned char XGI340_cr41[24][8] = {
74 {0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} /* 23 CRC5 */ 74 {0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} /* 23 CRC5 */
75}; 75};
76 76
77static unsigned char XGI27_cr41[24][8] = { 77static const unsigned char XGI27_cr41[24][8] = {
78 {0x20, 0x40, 0x60, 0x00, 0x00, 0x00, 0x00, 0x00}, /* 0 CR41 */ 78 {0x20, 0x40, 0x60, 0x00, 0x00, 0x00, 0x00, 0x00}, /* 0 CR41 */
79 {0xC4, 0x40, 0x84, 0x00, 0x00, 0x00, 0x00, 0x00}, /* 1 CR8A */ 79 {0xC4, 0x40, 0x84, 0x00, 0x00, 0x00, 0x00, 0x00}, /* 1 CR8A */
80 {0xC4, 0x40, 0x84, 0x00, 0x00, 0x00, 0x00, 0x00}, /* 2 CR8B */ 80 {0xC4, 0x40, 0x84, 0x00, 0x00, 0x00, 0x00, 0x00}, /* 2 CR8B */
@@ -103,7 +103,7 @@ static unsigned char XGI27_cr41[24][8] = {
103 {0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} /* 23 CRC5 */ 103 {0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} /* 23 CRC5 */
104}; 104};
105 105
106static unsigned char XGI340_CR6B[8][4] = { 106const unsigned char XGI340_CR6B[8][4] = {
107 {0xaa, 0xaa, 0xaa, 0xaa}, 107 {0xaa, 0xaa, 0xaa, 0xaa},
108 {0xaa, 0xaa, 0xaa, 0xaa}, 108 {0xaa, 0xaa, 0xaa, 0xaa},
109 {0xaa, 0xaa, 0xaa, 0xaa}, 109 {0xaa, 0xaa, 0xaa, 0xaa},
@@ -114,21 +114,13 @@ static unsigned char XGI340_CR6B[8][4] = {
114 {0x00, 0x00, 0x00, 0x00} 114 {0x00, 0x00, 0x00, 0x00}
115}; 115};
116 116
117static unsigned char XGI340_CR6E[8][4];
118
119static unsigned char XGI340_CR6F[8][32];
120
121static unsigned char XGI340_CR89[8][2];
122
123/* CR47,CR48,CR49,CR4A,CR4B,CR4C,CR70,CR71,CR74,CR75,CR76,CR77 */ 117/* CR47,CR48,CR49,CR4A,CR4B,CR4C,CR70,CR71,CR74,CR75,CR76,CR77 */
124static unsigned char XGI340_AGPReg[12] = { 118const unsigned char XGI340_AGPReg[12] = {
125 0x28, 0x23, 0x00, 0x20, 0x00, 0x20, 119 0x28, 0x23, 0x00, 0x20, 0x00, 0x20,
126 0x00, 0x05, 0xd0, 0x10, 0x10, 0x00 120 0x00, 0x05, 0xd0, 0x10, 0x10, 0x00
127}; 121};
128 122
129static unsigned char XGI340_SR16[4] = {0x03, 0x83, 0x03, 0x83}; 123const struct XGI_ExtStruct XGI330_EModeIDTable[] = {
130
131static struct XGI_ExtStruct XGI330_EModeIDTable[] = {
132 {0x2e, 0x0a1b, 0x0306, 0x06, 0x05, 0x06}, 124 {0x2e, 0x0a1b, 0x0306, 0x06, 0x05, 0x06},
133 {0x2f, 0x0a1b, 0x0305, 0x05, 0x05, 0x05}, 125 {0x2f, 0x0a1b, 0x0305, 0x05, 0x05, 0x05},
134 {0x30, 0x2a1b, 0x0407, 0x07, 0x07, 0x0e}, 126 {0x30, 0x2a1b, 0x0407, 0x07, 0x07, 0x0e},
@@ -200,7 +192,7 @@ static struct XGI_ExtStruct XGI330_EModeIDTable[] = {
200 {0xff, 0x0000, 0x0000, 0x00, 0x00, 0x00} 192 {0xff, 0x0000, 0x0000, 0x00, 0x00, 0x00}
201}; 193};
202 194
203static struct SiS_StandTable_S XGI330_StandTable = { 195static const struct SiS_StandTable_S XGI330_StandTable = {
204/* ExtVGATable */ 196/* ExtVGATable */
205 0x00, 0x00, 0x00, 0x0000, 197 0x00, 0x00, 0x00, 0x0000,
206 {0x01, 0x0f, 0x00, 0x0e}, 198 {0x01, 0x0f, 0x00, 0x0e},
@@ -216,11 +208,7 @@ static struct SiS_StandTable_S XGI330_StandTable = {
216 0xff} 208 0xff}
217}; 209};
218 210
219static struct XGI_TimingHStruct XGI_TimingH[1]; 211static const struct XGI_XG21CRT1Struct XGI_UpdateCRT1Table[] = {
220
221static struct XGI_TimingVStruct XGI_TimingV[1];
222
223static struct XGI_XG21CRT1Struct XGI_UpdateCRT1Table[] = {
224 {0x01, 0x27, 0x91, 0x8f, 0xc0}, /* 00 */ 212 {0x01, 0x27, 0x91, 0x8f, 0xc0}, /* 00 */
225 {0x03, 0x4f, 0x83, 0x8f, 0xc0}, /* 01 */ 213 {0x03, 0x4f, 0x83, 0x8f, 0xc0}, /* 01 */
226 {0x05, 0x27, 0x91, 0x8f, 0xc0}, /* 02 */ 214 {0x05, 0x27, 0x91, 0x8f, 0xc0}, /* 02 */
@@ -240,7 +228,7 @@ static struct XGI_XG21CRT1Struct XGI_UpdateCRT1Table[] = {
240 {0x59, 0x27, 0x91, 0x8f, 0xc0} /* 16 */ 228 {0x59, 0x27, 0x91, 0x8f, 0xc0} /* 16 */
241}; 229};
242 230
243static struct XGI_CRT1TableStruct XGI_CRT1Table[] = { 231const struct XGI_CRT1TableStruct XGI_CRT1Table[] = {
244 { {0x2d, 0x28, 0x90, 0x2c, 0x90, 0x00, 0x04, 0x00, 232 { {0x2d, 0x28, 0x90, 0x2c, 0x90, 0x00, 0x04, 0x00,
245 0xbf, 0x1f, 0x9c, 0x8e, 0x96, 0xb9, 0x30} }, /* 0x0 */ 233 0xbf, 0x1f, 0x9c, 0x8e, 0x96, 0xb9, 0x30} }, /* 0x0 */
246 { {0x2d, 0x28, 0x90, 0x2c, 0x90, 0x00, 0x04, 0x00, 234 { {0x2d, 0x28, 0x90, 0x2c, 0x90, 0x00, 0x04, 0x00,
@@ -404,7 +392,7 @@ static struct XGI_CRT1TableStruct XGI_CRT1Table[] = {
404}; 392};
405 393
406/*add for new UNIVGABIOS*/ 394/*add for new UNIVGABIOS*/
407static struct SiS_LCDData XGI_StLCD1024x768Data[] = { 395static const struct SiS_LCDData XGI_StLCD1024x768Data[] = {
408 {62, 25, 800, 546, 1344, 806}, 396 {62, 25, 800, 546, 1344, 806},
409 {32, 15, 930, 546, 1344, 806}, 397 {32, 15, 930, 546, 1344, 806},
410 {62, 25, 800, 546, 1344, 806}, /*chiawenfordot9->dot8*/ 398 {62, 25, 800, 546, 1344, 806}, /*chiawenfordot9->dot8*/
@@ -414,7 +402,7 @@ static struct SiS_LCDData XGI_StLCD1024x768Data[] = {
414 {1, 1, 1344, 806, 1344, 806} 402 {1, 1, 1344, 806, 1344, 806}
415}; 403};
416 404
417static struct SiS_LCDData XGI_ExtLCD1024x768Data[] = { 405static const struct SiS_LCDData XGI_ExtLCD1024x768Data[] = {
418 {42, 25, 1536, 419, 1344, 806}, 406 {42, 25, 1536, 419, 1344, 806},
419 {48, 25, 1536, 369, 1344, 806}, 407 {48, 25, 1536, 369, 1344, 806},
420 {42, 25, 1536, 419, 1344, 806}, 408 {42, 25, 1536, 419, 1344, 806},
@@ -430,7 +418,7 @@ static struct SiS_LCDData XGI_ExtLCD1024x768Data[] = {
430 {1, 1, 1344, 806, 1344, 806} 418 {1, 1, 1344, 806, 1344, 806}
431}; 419};
432 420
433static struct SiS_LCDData XGI_CetLCD1024x768Data[] = { 421static const struct SiS_LCDData XGI_CetLCD1024x768Data[] = {
434 {1, 1, 1344, 806, 1344, 806}, /* ; 00 (320x200,320x400, 422 {1, 1, 1344, 806, 1344, 806}, /* ; 00 (320x200,320x400,
435 640x200,640x400) */ 423 640x200,640x400) */
436 {1, 1, 1344, 806, 1344, 806}, /* 01 (320x350,640x350) */ 424 {1, 1, 1344, 806, 1344, 806}, /* 01 (320x350,640x350) */
@@ -441,7 +429,7 @@ static struct SiS_LCDData XGI_CetLCD1024x768Data[] = {
441 {1, 1, 1344, 806, 1344, 806} /* 06 (1024x768x60Hz) */ 429 {1, 1, 1344, 806, 1344, 806} /* 06 (1024x768x60Hz) */
442}; 430};
443 431
444static struct SiS_LCDData XGI_StLCD1280x1024Data[] = { 432static const struct SiS_LCDData XGI_StLCD1280x1024Data[] = {
445 {22, 5, 800, 510, 1650, 1088}, 433 {22, 5, 800, 510, 1650, 1088},
446 {22, 5, 800, 510, 1650, 1088}, 434 {22, 5, 800, 510, 1650, 1088},
447 {176, 45, 900, 510, 1650, 1088}, 435 {176, 45, 900, 510, 1650, 1088},
@@ -452,7 +440,7 @@ static struct SiS_LCDData XGI_StLCD1280x1024Data[] = {
452 {1, 1, 1688, 1066, 1688, 1066} 440 {1, 1, 1688, 1066, 1688, 1066}
453}; 441};
454 442
455static struct SiS_LCDData XGI_ExtLCD1280x1024Data[] = { 443static const struct SiS_LCDData XGI_ExtLCD1280x1024Data[] = {
456 {211, 60, 1024, 501, 1688, 1066}, 444 {211, 60, 1024, 501, 1688, 1066},
457 {211, 60, 1024, 508, 1688, 1066}, 445 {211, 60, 1024, 508, 1688, 1066},
458 {211, 60, 1024, 501, 1688, 1066}, 446 {211, 60, 1024, 501, 1688, 1066},
@@ -463,7 +451,7 @@ static struct SiS_LCDData XGI_ExtLCD1280x1024Data[] = {
463 {1, 1, 1688, 1066, 1688, 1066} 451 {1, 1, 1688, 1066, 1688, 1066}
464}; 452};
465 453
466static struct SiS_LCDData XGI_CetLCD1280x1024Data[] = { 454static const struct SiS_LCDData XGI_CetLCD1280x1024Data[] = {
467 {1, 1, 1688, 1066, 1688, 1066}, /* 00 (320x200,320x400, 455 {1, 1, 1688, 1066, 1688, 1066}, /* 00 (320x200,320x400,
468 640x200,640x400) */ 456 640x200,640x400) */
469 {1, 1, 1688, 1066, 1688, 1066}, /* 01 (320x350,640x350) */ 457 {1, 1, 1688, 1066, 1688, 1066}, /* 01 (320x350,640x350) */
@@ -476,7 +464,7 @@ static struct SiS_LCDData XGI_CetLCD1280x1024Data[] = {
476 {1, 1, 1688, 1066, 1688, 1066} /* 08 (1400x1050x60Hz) */ 464 {1, 1, 1688, 1066, 1688, 1066} /* 08 (1400x1050x60Hz) */
477}; 465};
478 466
479static struct SiS_LCDData xgifb_lcd_1400x1050[] = { 467static const struct SiS_LCDData xgifb_lcd_1400x1050[] = {
480 {211, 100, 2100, 408, 1688, 1066}, /* 00 (320x200,320x400, 468 {211, 100, 2100, 408, 1688, 1066}, /* 00 (320x200,320x400,
481 640x200,640x400) */ 469 640x200,640x400) */
482 {211, 64, 1536, 358, 1688, 1066}, /* 01 (320x350,640x350) */ 470 {211, 64, 1536, 358, 1688, 1066}, /* 01 (320x350,640x350) */
@@ -490,7 +478,7 @@ static struct SiS_LCDData xgifb_lcd_1400x1050[] = {
490 {1, 1, 1688, 1066, 1688, 1066} /* 08 (1400x1050x60Hz) */ 478 {1, 1, 1688, 1066, 1688, 1066} /* 08 (1400x1050x60Hz) */
491}; 479};
492 480
493static struct SiS_LCDData XGI_ExtLCD1600x1200Data[] = { 481static const struct SiS_LCDData XGI_ExtLCD1600x1200Data[] = {
494 {4, 1, 1620, 420, 2160, 1250}, /* 00 (320x200,320x400, 482 {4, 1, 1620, 420, 2160, 1250}, /* 00 (320x200,320x400,
495 640x200,640x400)*/ 483 640x200,640x400)*/
496 {27, 7, 1920, 375, 2160, 1250}, /* 01 (320x350,640x350) */ 484 {27, 7, 1920, 375, 2160, 1250}, /* 01 (320x350,640x350) */
@@ -504,7 +492,7 @@ static struct SiS_LCDData XGI_ExtLCD1600x1200Data[] = {
504 {1, 1, 2160, 1250, 2160, 1250} /* 09 (1600x1200x60Hz) ;302lv */ 492 {1, 1, 2160, 1250, 2160, 1250} /* 09 (1600x1200x60Hz) ;302lv */
505}; 493};
506 494
507static struct SiS_LCDData XGI_StLCD1600x1200Data[] = { 495static const struct SiS_LCDData XGI_StLCD1600x1200Data[] = {
508 {27, 4, 800, 500, 2160, 1250}, /* 00 (320x200,320x400, 496 {27, 4, 800, 500, 2160, 1250}, /* 00 (320x200,320x400,
509 640x200,640x400) */ 497 640x200,640x400) */
510 {27, 4, 800, 500, 2160, 1250}, /* 01 (320x350,640x350) */ 498 {27, 4, 800, 500, 2160, 1250}, /* 01 (320x350,640x350) */
@@ -520,7 +508,7 @@ static struct SiS_LCDData XGI_StLCD1600x1200Data[] = {
520 508
521#define XGI_CetLCD1400x1050Data XGI_CetLCD1280x1024Data 509#define XGI_CetLCD1400x1050Data XGI_CetLCD1280x1024Data
522 510
523static struct SiS_LCDData XGI_NoScalingData[] = { 511static const struct SiS_LCDData XGI_NoScalingData[] = {
524 {1, 1, 800, 449, 800, 449}, 512 {1, 1, 800, 449, 800, 449},
525 {1, 1, 800, 449, 800, 449}, 513 {1, 1, 800, 449, 800, 449},
526 {1, 1, 900, 449, 900, 449}, 514 {1, 1, 900, 449, 900, 449},
@@ -531,7 +519,7 @@ static struct SiS_LCDData XGI_NoScalingData[] = {
531 {1, 1, 1688, 1066, 1688, 1066} 519 {1, 1, 1688, 1066, 1688, 1066}
532}; 520};
533 521
534static struct SiS_LCDData XGI_ExtLCD1024x768x75Data[] = { 522static const struct SiS_LCDData XGI_ExtLCD1024x768x75Data[] = {
535 {42, 25, 1536, 419, 1344, 806}, /* ; 00 (320x200,320x400, 523 {42, 25, 1536, 419, 1344, 806}, /* ; 00 (320x200,320x400,
536 640x200,640x400) */ 524 640x200,640x400) */
537 {48, 25, 1536, 369, 1344, 806}, /* ; 01 (320x350,640x350) */ 525 {48, 25, 1536, 369, 1344, 806}, /* ; 01 (320x350,640x350) */
@@ -542,7 +530,7 @@ static struct SiS_LCDData XGI_ExtLCD1024x768x75Data[] = {
542 {1, 1, 1312, 800, 1312, 800} /* ; 06 (1024x768x75Hz) */ 530 {1, 1, 1312, 800, 1312, 800} /* ; 06 (1024x768x75Hz) */
543}; 531};
544 532
545static struct SiS_LCDData XGI_CetLCD1024x768x75Data[] = { 533static const struct SiS_LCDData XGI_CetLCD1024x768x75Data[] = {
546 {1, 1, 1312, 800, 1312, 800}, /* ; 00 (320x200,320x400, 534 {1, 1, 1312, 800, 1312, 800}, /* ; 00 (320x200,320x400,
547 640x200,640x400) */ 535 640x200,640x400) */
548 {1, 1, 1312, 800, 1312, 800}, /* ; 01 (320x350,640x350) */ 536 {1, 1, 1312, 800, 1312, 800}, /* ; 01 (320x350,640x350) */
@@ -553,7 +541,7 @@ static struct SiS_LCDData XGI_CetLCD1024x768x75Data[] = {
553 {1, 1, 1312, 800, 1312, 800} /* ; 06 (1024x768x75Hz) */ 541 {1, 1, 1312, 800, 1312, 800} /* ; 06 (1024x768x75Hz) */
554}; 542};
555 543
556static struct SiS_LCDData xgifb_lcd_1280x1024x75[] = { 544static const struct SiS_LCDData xgifb_lcd_1280x1024x75[] = {
557 {211, 60, 1024, 501, 1688, 1066}, /* ; 00 (320x200,320x400, 545 {211, 60, 1024, 501, 1688, 1066}, /* ; 00 (320x200,320x400,
558 640x200,640x400) */ 546 640x200,640x400) */
559 {211, 60, 1024, 508, 1688, 1066}, /* ; 01 (320x350,640x350) */ 547 {211, 60, 1024, 508, 1688, 1066}, /* ; 01 (320x350,640x350) */
@@ -567,7 +555,7 @@ static struct SiS_LCDData xgifb_lcd_1280x1024x75[] = {
567 555
568#define XGI_CetLCD1280x1024x75Data XGI_CetLCD1280x1024Data 556#define XGI_CetLCD1280x1024x75Data XGI_CetLCD1280x1024Data
569 557
570static struct SiS_LCDData XGI_NoScalingDatax75[] = { 558static const struct SiS_LCDData XGI_NoScalingDatax75[] = {
571 {1, 1, 800, 449, 800, 449}, /* ; 00 (320x200, 320x400, 559 {1, 1, 800, 449, 800, 449}, /* ; 00 (320x200, 320x400,
572 640x200, 640x400) */ 560 640x200, 640x400) */
573 {1, 1, 800, 449, 800, 449}, /* ; 01 (320x350, 640x350) */ 561 {1, 1, 800, 449, 800, 449}, /* ; 01 (320x350, 640x350) */
@@ -582,7 +570,7 @@ static struct SiS_LCDData XGI_NoScalingDatax75[] = {
582 {1, 1, 1688, 806, 1688, 806} /* ; 0A (1280x768x75Hz) */ 570 {1, 1, 1688, 806, 1688, 806} /* ; 0A (1280x768x75Hz) */
583}; 571};
584 572
585static struct XGI_LCDDesStruct XGI_ExtLCDDes1024x768Data[] = { 573static const struct XGI_LCDDesStruct XGI_ExtLCDDes1024x768Data[] = {
586 {9, 1057, 0, 771}, /* ; 00 (320x200,320x400,640x200,640x400) */ 574 {9, 1057, 0, 771}, /* ; 00 (320x200,320x400,640x200,640x400) */
587 {9, 1057, 0, 771}, /* ; 01 (320x350,640x350) */ 575 {9, 1057, 0, 771}, /* ; 01 (320x350,640x350) */
588 {9, 1057, 0, 771}, /* ; 02 (360x400,720x400) */ 576 {9, 1057, 0, 771}, /* ; 02 (360x400,720x400) */
@@ -592,7 +580,7 @@ static struct XGI_LCDDesStruct XGI_ExtLCDDes1024x768Data[] = {
592 {9, 1057, 805, 770} /* ; 06 (1024x768x60Hz) */ 580 {9, 1057, 805, 770} /* ; 06 (1024x768x60Hz) */
593}; 581};
594 582
595static struct XGI_LCDDesStruct XGI_StLCDDes1024x768Data[] = { 583static const struct XGI_LCDDesStruct XGI_StLCDDes1024x768Data[] = {
596 {9, 1057, 737, 703}, /* ; 00 (320x200,320x400,640x200,640x400) */ 584 {9, 1057, 737, 703}, /* ; 00 (320x200,320x400,640x200,640x400) */
597 {9, 1057, 686, 651}, /* ; 01 (320x350,640x350) */ 585 {9, 1057, 686, 651}, /* ; 01 (320x350,640x350) */
598 {9, 1057, 737, 703}, /* ; 02 (360x400,720x400) */ 586 {9, 1057, 737, 703}, /* ; 02 (360x400,720x400) */
@@ -602,7 +590,7 @@ static struct XGI_LCDDesStruct XGI_StLCDDes1024x768Data[] = {
602 {9, 1057, 805, 770} /* ; 06 (1024x768x60Hz) */ 590 {9, 1057, 805, 770} /* ; 06 (1024x768x60Hz) */
603}; 591};
604 592
605static struct XGI_LCDDesStruct XGI_CetLCDDes1024x768Data[] = { 593static const struct XGI_LCDDesStruct XGI_CetLCDDes1024x768Data[] = {
606 {1152, 856, 622, 587}, /* ; 00 (320x200,320x400,640x200,640x400) */ 594 {1152, 856, 622, 587}, /* ; 00 (320x200,320x400,640x200,640x400) */
607 {1152, 856, 597, 562}, /* ; 01 (320x350,640x350) */ 595 {1152, 856, 597, 562}, /* ; 01 (320x350,640x350) */
608 {1152, 856, 622, 587}, /* ; 02 (360x400,720x400) */ 596 {1152, 856, 622, 587}, /* ; 02 (360x400,720x400) */
@@ -612,7 +600,7 @@ static struct XGI_LCDDesStruct XGI_CetLCDDes1024x768Data[] = {
612 {0, 1048, 805, 770} /* ; 06 (1024x768x60Hz) */ 600 {0, 1048, 805, 770} /* ; 06 (1024x768x60Hz) */
613}; 601};
614 602
615static struct XGI_LCDDesStruct XGI_ExtLCDDLDes1280x1024Data[] = { 603static const struct XGI_LCDDesStruct XGI_ExtLCDDLDes1280x1024Data[] = {
616 {18, 1346, 981, 940}, /* 00 (320x200,320x400,640x200,640x400) */ 604 {18, 1346, 981, 940}, /* 00 (320x200,320x400,640x200,640x400) */
617 {18, 1346, 926, 865}, /* 01 (320x350,640x350) */ 605 {18, 1346, 926, 865}, /* 01 (320x350,640x350) */
618 {18, 1346, 981, 940}, /* 02 (360x400,720x400) */ 606 {18, 1346, 981, 940}, /* 02 (360x400,720x400) */
@@ -623,7 +611,7 @@ static struct XGI_LCDDesStruct XGI_ExtLCDDLDes1280x1024Data[] = {
623 {18, 1346, 1065, 1024} /* 07 (1280x1024x60Hz) */ 611 {18, 1346, 1065, 1024} /* 07 (1280x1024x60Hz) */
624}; 612};
625 613
626static struct XGI_LCDDesStruct XGI_StLCDDLDes1280x1024Data[] = { 614static const struct XGI_LCDDesStruct XGI_StLCDDLDes1280x1024Data[] = {
627 {18, 1346, 970, 907}, /* 00 (320x200,320x400,640x200,640x400) */ 615 {18, 1346, 970, 907}, /* 00 (320x200,320x400,640x200,640x400) */
628 {18, 1346, 917, 854}, /* 01 (320x350,640x350) */ 616 {18, 1346, 917, 854}, /* 01 (320x350,640x350) */
629 {18, 1346, 970, 907}, /* 02 (360x400,720x400) */ 617 {18, 1346, 970, 907}, /* 02 (360x400,720x400) */
@@ -634,7 +622,7 @@ static struct XGI_LCDDesStruct XGI_StLCDDLDes1280x1024Data[] = {
634 {18, 1346, 1065, 1024} /* 07 (1280x1024x60Hz) */ 622 {18, 1346, 1065, 1024} /* 07 (1280x1024x60Hz) */
635}; 623};
636 624
637static struct XGI_LCDDesStruct XGI_CetLCDDLDes1280x1024Data[] = { 625static const struct XGI_LCDDesStruct XGI_CetLCDDLDes1280x1024Data[] = {
638 {1368, 1008, 752, 711}, /* 00 (320x200,320x400,640x200,640x400) */ 626 {1368, 1008, 752, 711}, /* 00 (320x200,320x400,640x200,640x400) */
639 {1368, 1008, 729, 688}, /* 01 (320x350,640x350) */ 627 {1368, 1008, 729, 688}, /* 01 (320x350,640x350) */
640 {1368, 1008, 752, 711}, /* 02 (360x400,720x400) */ 628 {1368, 1008, 752, 711}, /* 02 (360x400,720x400) */
@@ -645,7 +633,7 @@ static struct XGI_LCDDesStruct XGI_CetLCDDLDes1280x1024Data[] = {
645 {18, 1346, 1065, 1024} /* 07 (1280x1024x60Hz) */ 633 {18, 1346, 1065, 1024} /* 07 (1280x1024x60Hz) */
646}; 634};
647 635
648static struct XGI_LCDDesStruct XGI_ExtLCDDes1280x1024Data[] = { 636static const struct XGI_LCDDesStruct XGI_ExtLCDDes1280x1024Data[] = {
649 {9, 1337, 981, 940}, /* ; 00 (320x200,320x400,640x200,640x400) */ 637 {9, 1337, 981, 940}, /* ; 00 (320x200,320x400,640x200,640x400) */
650 {9, 1337, 926, 884}, /* ; 01 (320x350,640x350) alan, 2003/09/30 */ 638 {9, 1337, 926, 884}, /* ; 01 (320x350,640x350) alan, 2003/09/30 */
651 {9, 1337, 981, 940}, /* ; 02 (360x400,720x400) */ 639 {9, 1337, 981, 940}, /* ; 02 (360x400,720x400) */
@@ -656,7 +644,7 @@ static struct XGI_LCDDesStruct XGI_ExtLCDDes1280x1024Data[] = {
656 {9, 1337, 1065, 1024} /* ; 07 (1280x1024x60Hz) */ 644 {9, 1337, 1065, 1024} /* ; 07 (1280x1024x60Hz) */
657}; 645};
658 646
659static struct XGI_LCDDesStruct XGI_StLCDDes1280x1024Data[] = { 647static const struct XGI_LCDDesStruct XGI_StLCDDes1280x1024Data[] = {
660 {9, 1337, 970, 907}, /* ; 00 (320x200,320x400,640x200,640x400) */ 648 {9, 1337, 970, 907}, /* ; 00 (320x200,320x400,640x200,640x400) */
661 {9, 1337, 917, 854}, /* ; 01 (320x350,640x350) */ 649 {9, 1337, 917, 854}, /* ; 01 (320x350,640x350) */
662 {9, 1337, 970, 907}, /* ; 02 (360x400,720x400) */ 650 {9, 1337, 970, 907}, /* ; 02 (360x400,720x400) */
@@ -667,7 +655,7 @@ static struct XGI_LCDDesStruct XGI_StLCDDes1280x1024Data[] = {
667 {9, 1337, 1065, 1024} /* ; 07 (1280x1024x60Hz) */ 655 {9, 1337, 1065, 1024} /* ; 07 (1280x1024x60Hz) */
668}; 656};
669 657
670static struct XGI_LCDDesStruct XGI_CetLCDDes1280x1024Data[] = { 658static const struct XGI_LCDDesStruct XGI_CetLCDDes1280x1024Data[] = {
671 {1368, 1008, 752, 711}, /* 00 (320x200,320x400,640x200,640x400) */ 659 {1368, 1008, 752, 711}, /* 00 (320x200,320x400,640x200,640x400) */
672 {1368, 1008, 729, 688}, /* 01 (320x350,640x350) */ 660 {1368, 1008, 729, 688}, /* 01 (320x350,640x350) */
673 {1368, 1008, 752, 711}, /* 02 (360x400,720x400) */ 661 {1368, 1008, 752, 711}, /* 02 (360x400,720x400) */
@@ -678,7 +666,7 @@ static struct XGI_LCDDesStruct XGI_CetLCDDes1280x1024Data[] = {
678 {9, 1337, 1065, 1024} /* 07 (1280x1024x60Hz) */ 666 {9, 1337, 1065, 1024} /* 07 (1280x1024x60Hz) */
679}; 667};
680 668
681static struct XGI_LCDDesStruct xgifb_lcddldes_1400x1050[] = { 669static const struct XGI_LCDDesStruct xgifb_lcddldes_1400x1050[] = {
682 {18, 1464, 0, 1051}, /* 00 (320x200,320x400,640x200,640x400) */ 670 {18, 1464, 0, 1051}, /* 00 (320x200,320x400,640x200,640x400) */
683 {18, 1464, 0, 1051}, /* 01 (320x350,640x350) */ 671 {18, 1464, 0, 1051}, /* 01 (320x350,640x350) */
684 {18, 1464, 0, 1051}, /* 02 (360x400,720x400) */ 672 {18, 1464, 0, 1051}, /* 02 (360x400,720x400) */
@@ -690,7 +678,7 @@ static struct XGI_LCDDesStruct xgifb_lcddldes_1400x1050[] = {
690 {18, 1464, 0, 1051} /* 08 (1400x1050x60Hz) */ 678 {18, 1464, 0, 1051} /* 08 (1400x1050x60Hz) */
691}; 679};
692 680
693static struct XGI_LCDDesStruct xgifb_lcddes_1400x1050[] = { 681static const struct XGI_LCDDesStruct xgifb_lcddes_1400x1050[] = {
694 {9, 1455, 0, 1051}, /* 00 (320x200,320x400,640x200,640x400) */ 682 {9, 1455, 0, 1051}, /* 00 (320x200,320x400,640x200,640x400) */
695 {9, 1455, 0, 1051}, /* 01 (320x350,640x350) */ 683 {9, 1455, 0, 1051}, /* 01 (320x350,640x350) */
696 {9, 1455, 0, 1051}, /* 02 (360x400,720x400) */ 684 {9, 1455, 0, 1051}, /* 02 (360x400,720x400) */
@@ -702,7 +690,7 @@ static struct XGI_LCDDesStruct xgifb_lcddes_1400x1050[] = {
702 {9, 1455, 0, 1051} /* 08 (1400x1050x60Hz) */ 690 {9, 1455, 0, 1051} /* 08 (1400x1050x60Hz) */
703}; 691};
704 692
705static struct XGI_LCDDesStruct XGI_CetLCDDes1400x1050Data[] = { 693static const struct XGI_LCDDesStruct XGI_CetLCDDes1400x1050Data[] = {
706 {1308, 1068, 781, 766}, /* 00 (320x200,320x400,640x200,640x400) */ 694 {1308, 1068, 781, 766}, /* 00 (320x200,320x400,640x200,640x400) */
707 {1308, 1068, 781, 766}, /* 01 (320x350,640x350) */ 695 {1308, 1068, 781, 766}, /* 01 (320x350,640x350) */
708 {1308, 1068, 781, 766}, /* 02 (360x400,720x400) */ 696 {1308, 1068, 781, 766}, /* 02 (360x400,720x400) */
@@ -714,7 +702,7 @@ static struct XGI_LCDDesStruct XGI_CetLCDDes1400x1050Data[] = {
714 {18, 1464, 0, 1051} /* 08 (1400x1050x60Hz) */ 702 {18, 1464, 0, 1051} /* 08 (1400x1050x60Hz) */
715}; 703};
716 704
717static struct XGI_LCDDesStruct XGI_CetLCDDes1400x1050Data2[] = { 705static const struct XGI_LCDDesStruct XGI_CetLCDDes1400x1050Data2[] = {
718 {0, 1448, 0, 1051}, /* 00 (320x200,320x400,640x200,640x400) */ 706 {0, 1448, 0, 1051}, /* 00 (320x200,320x400,640x200,640x400) */
719 {0, 1448, 0, 1051}, /* 01 (320x350,640x350) */ 707 {0, 1448, 0, 1051}, /* 01 (320x350,640x350) */
720 {0, 1448, 0, 1051}, /* 02 (360x400,720x400) */ 708 {0, 1448, 0, 1051}, /* 02 (360x400,720x400) */
@@ -722,7 +710,7 @@ static struct XGI_LCDDesStruct XGI_CetLCDDes1400x1050Data2[] = {
722 {0, 1448, 0, 1051} /* 04 (640x480x60Hz) */ 710 {0, 1448, 0, 1051} /* 04 (640x480x60Hz) */
723}; 711};
724 712
725static struct XGI_LCDDesStruct XGI_ExtLCDDLDes1600x1200Data[] = { 713static const struct XGI_LCDDesStruct XGI_ExtLCDDLDes1600x1200Data[] = {
726 {18, 1682, 0, 1201}, /* 00 (320x200,320x400,640x200,640x400) */ 714 {18, 1682, 0, 1201}, /* 00 (320x200,320x400,640x200,640x400) */
727 {18, 1682, 0, 1201}, /* 01 (320x350,640x350) */ 715 {18, 1682, 0, 1201}, /* 01 (320x350,640x350) */
728 {18, 1682, 0, 1201}, /* 02 (360x400,720x400) */ 716 {18, 1682, 0, 1201}, /* 02 (360x400,720x400) */
@@ -735,7 +723,7 @@ static struct XGI_LCDDesStruct XGI_ExtLCDDLDes1600x1200Data[] = {
735 {18, 1682, 0, 1201} /* 09 (1600x1200x60Hz) */ 723 {18, 1682, 0, 1201} /* 09 (1600x1200x60Hz) */
736}; 724};
737 725
738static struct XGI_LCDDesStruct XGI_StLCDDLDes1600x1200Data[] = { 726static const struct XGI_LCDDesStruct XGI_StLCDDLDes1600x1200Data[] = {
739 {18, 1682, 1150, 1101}, /* 00 (320x200,320x400,640x200,640x400) */ 727 {18, 1682, 1150, 1101}, /* 00 (320x200,320x400,640x200,640x400) */
740 {18, 1682, 1083, 1034}, /* 01 (320x350,640x350) */ 728 {18, 1682, 1083, 1034}, /* 01 (320x350,640x350) */
741 {18, 1682, 1150, 1101}, /* 02 (360x400,720x400) */ 729 {18, 1682, 1150, 1101}, /* 02 (360x400,720x400) */
@@ -748,7 +736,7 @@ static struct XGI_LCDDesStruct XGI_StLCDDLDes1600x1200Data[] = {
748 {18, 1682, 0, 1201} /* 09 (1600x1200x60Hz) */ 736 {18, 1682, 0, 1201} /* 09 (1600x1200x60Hz) */
749}; 737};
750 738
751static struct XGI_LCDDesStruct XGI_ExtLCDDes1600x1200Data[] = { 739static const struct XGI_LCDDesStruct XGI_ExtLCDDes1600x1200Data[] = {
752 {9, 1673, 0, 1201}, /* 00 (320x200,320x400,640x200,640x400) */ 740 {9, 1673, 0, 1201}, /* 00 (320x200,320x400,640x200,640x400) */
753 {9, 1673, 0, 1201}, /* 01 (320x350,640x350) */ 741 {9, 1673, 0, 1201}, /* 01 (320x350,640x350) */
754 {9, 1673, 0, 1201}, /* 02 (360x400,720x400) */ 742 {9, 1673, 0, 1201}, /* 02 (360x400,720x400) */
@@ -761,7 +749,7 @@ static struct XGI_LCDDesStruct XGI_ExtLCDDes1600x1200Data[] = {
761 {9, 1673, 0, 1201} /* 09 (1600x1200x60Hz) */ 749 {9, 1673, 0, 1201} /* 09 (1600x1200x60Hz) */
762}; 750};
763 751
764static struct XGI_LCDDesStruct XGI_StLCDDes1600x1200Data[] = { 752static const struct XGI_LCDDesStruct XGI_StLCDDes1600x1200Data[] = {
765 {9, 1673, 1150, 1101}, /* 00 (320x200,320x400,640x200,640x400) */ 753 {9, 1673, 1150, 1101}, /* 00 (320x200,320x400,640x200,640x400) */
766 {9, 1673, 1083, 1034}, /* 01 (320x350,640x350) */ 754 {9, 1673, 1083, 1034}, /* 01 (320x350,640x350) */
767 {9, 1673, 1150, 1101}, /* 02 (360x400,720x400) */ 755 {9, 1673, 1150, 1101}, /* 02 (360x400,720x400) */
@@ -774,7 +762,7 @@ static struct XGI_LCDDesStruct XGI_StLCDDes1600x1200Data[] = {
774 {9, 1673, 0, 1201} /* 09 (1600x1200x60Hz) */ 762 {9, 1673, 0, 1201} /* 09 (1600x1200x60Hz) */
775}; 763};
776 764
777static struct XGI330_LCDDataDesStruct2 XGI_NoScalingDesData[] = { 765static const struct XGI330_LCDDataDesStruct2 XGI_NoScalingDesData[] = {
778 {9, 657, 448, 405, 96, 2}, /* 00 (320x200,320x400, 766 {9, 657, 448, 405, 96, 2}, /* 00 (320x200,320x400,
779 640x200,640x400) */ 767 640x200,640x400) */
780 {9, 657, 448, 355, 96, 2}, /* 01 (320x350,640x350) */ 768 {9, 657, 448, 355, 96, 2}, /* 01 (320x350,640x350) */
@@ -790,7 +778,7 @@ static struct XGI330_LCDDataDesStruct2 XGI_NoScalingDesData[] = {
790}; 778};
791 779
792/* ;;1024x768x75Hz */ 780/* ;;1024x768x75Hz */
793static struct XGI_LCDDesStruct xgifb_lcddes_1024x768x75[] = { 781static const struct XGI_LCDDesStruct xgifb_lcddes_1024x768x75[] = {
794 {9, 1049, 0, 769}, /* ; 00 (320x200,320x400,640x200,640x400) */ 782 {9, 1049, 0, 769}, /* ; 00 (320x200,320x400,640x200,640x400) */
795 {9, 1049, 0, 769}, /* ; 01 (320x350,640x350) */ 783 {9, 1049, 0, 769}, /* ; 01 (320x350,640x350) */
796 {9, 1049, 0, 769}, /* ; 02 (360x400,720x400) */ 784 {9, 1049, 0, 769}, /* ; 02 (360x400,720x400) */
@@ -801,7 +789,7 @@ static struct XGI_LCDDesStruct xgifb_lcddes_1024x768x75[] = {
801}; 789};
802 790
803/* ;;1024x768x75Hz */ 791/* ;;1024x768x75Hz */
804static struct XGI_LCDDesStruct XGI_CetLCDDes1024x768x75Data[] = { 792static const struct XGI_LCDDesStruct XGI_CetLCDDes1024x768x75Data[] = {
805 {1152, 856, 622, 587}, /* ; 00 (320x200,320x400,640x200,640x400) */ 793 {1152, 856, 622, 587}, /* ; 00 (320x200,320x400,640x200,640x400) */
806 {1152, 856, 597, 562}, /* ; 01 (320x350,640x350) */ 794 {1152, 856, 597, 562}, /* ; 01 (320x350,640x350) */
807 {1192, 896, 622, 587}, /* ; 02 (360x400,720x400) */ 795 {1192, 896, 622, 587}, /* ; 02 (360x400,720x400) */
@@ -812,7 +800,7 @@ static struct XGI_LCDDesStruct XGI_CetLCDDes1024x768x75Data[] = {
812}; 800};
813 801
814/* ;;1280x1024x75Hz */ 802/* ;;1280x1024x75Hz */
815static struct XGI_LCDDesStruct xgifb_lcddldes_1280x1024x75[] = { 803static const struct XGI_LCDDesStruct xgifb_lcddldes_1280x1024x75[] = {
816 {18, 1314, 0, 1025}, /* ; 00 (320x200,320x400,640x200,640x400) */ 804 {18, 1314, 0, 1025}, /* ; 00 (320x200,320x400,640x200,640x400) */
817 {18, 1314, 0, 1025}, /* ; 01 (320x350,640x350) */ 805 {18, 1314, 0, 1025}, /* ; 01 (320x350,640x350) */
818 {18, 1314, 0, 1025}, /* ; 02 (360x400,720x400) */ 806 {18, 1314, 0, 1025}, /* ; 02 (360x400,720x400) */
@@ -824,7 +812,7 @@ static struct XGI_LCDDesStruct xgifb_lcddldes_1280x1024x75[] = {
824}; 812};
825 813
826/* 1280x1024x75Hz */ 814/* 1280x1024x75Hz */
827static struct XGI_LCDDesStruct XGI_CetLCDDLDes1280x1024x75Data[] = { 815static const struct XGI_LCDDesStruct XGI_CetLCDDLDes1280x1024x75Data[] = {
828 {1368, 1008, 752, 711}, /* ; 00 (320x200,320x400,640x200,640x400) */ 816 {1368, 1008, 752, 711}, /* ; 00 (320x200,320x400,640x200,640x400) */
829 {1368, 1008, 729, 688}, /* ; 01 (320x350,640x350) */ 817 {1368, 1008, 729, 688}, /* ; 01 (320x350,640x350) */
830 {1408, 1048, 752, 711}, /* ; 02 (360x400,720x400) */ 818 {1408, 1048, 752, 711}, /* ; 02 (360x400,720x400) */
@@ -836,7 +824,7 @@ static struct XGI_LCDDesStruct XGI_CetLCDDLDes1280x1024x75Data[] = {
836}; 824};
837 825
838/* ;;1280x1024x75Hz */ 826/* ;;1280x1024x75Hz */
839static struct XGI_LCDDesStruct xgifb_lcddes_1280x1024x75[] = { 827static const struct XGI_LCDDesStruct xgifb_lcddes_1280x1024x75[] = {
840 {9, 1305, 0, 1025}, /* ; 00 (320x200,320x400,640x200,640x400) */ 828 {9, 1305, 0, 1025}, /* ; 00 (320x200,320x400,640x200,640x400) */
841 {9, 1305, 0, 1025}, /* ; 01 (320x350,640x350) */ 829 {9, 1305, 0, 1025}, /* ; 01 (320x350,640x350) */
842 {9, 1305, 0, 1025}, /* ; 02 (360x400,720x400) */ 830 {9, 1305, 0, 1025}, /* ; 02 (360x400,720x400) */
@@ -848,7 +836,7 @@ static struct XGI_LCDDesStruct xgifb_lcddes_1280x1024x75[] = {
848}; 836};
849 837
850/* 1280x1024x75Hz */ 838/* 1280x1024x75Hz */
851static struct XGI_LCDDesStruct XGI_CetLCDDes1280x1024x75Data[] = { 839static const struct XGI_LCDDesStruct XGI_CetLCDDes1280x1024x75Data[] = {
852 {1368, 1008, 752, 711}, /* ; 00 (320x200,320x400,640x200,640x400) */ 840 {1368, 1008, 752, 711}, /* ; 00 (320x200,320x400,640x200,640x400) */
853 {1368, 1008, 729, 688}, /* ; 01 (320x350,640x350) */ 841 {1368, 1008, 729, 688}, /* ; 01 (320x350,640x350) */
854 {1408, 1048, 752, 711}, /* ; 02 (360x400,720x400) */ 842 {1408, 1048, 752, 711}, /* ; 02 (360x400,720x400) */
@@ -860,7 +848,7 @@ static struct XGI_LCDDesStruct XGI_CetLCDDes1280x1024x75Data[] = {
860}; 848};
861 849
862/* Scaling LCD 75Hz */ 850/* Scaling LCD 75Hz */
863static struct XGI330_LCDDataDesStruct2 XGI_NoScalingDesDatax75[] = { 851static const struct XGI330_LCDDataDesStruct2 XGI_NoScalingDesDatax75[] = {
864 {9, 657, 448, 405, 96, 2}, /* ; 00 (320x200,320x400, 852 {9, 657, 448, 405, 96, 2}, /* ; 00 (320x200,320x400,
865 640x200,640x400) */ 853 640x200,640x400) */
866 {9, 657, 448, 355, 96, 2}, /* ; 01 (320x350,640x350) */ 854 {9, 657, 448, 355, 96, 2}, /* ; 01 (320x350,640x350) */
@@ -1174,7 +1162,7 @@ static const unsigned char XGI330_Ren750pGroup3[] = {
1174 0x18, 0x1D, 0x23, 0x28, 0x4C, 0xAA, 0x01 1162 0x18, 0x1D, 0x23, 0x28, 0x4C, 0xAA, 0x01
1175}; 1163};
1176 1164
1177static struct SiS_LVDSData XGI_LVDS1024x768Data_1[] = { 1165static const struct SiS_LVDSData XGI_LVDS1024x768Data_1[] = {
1178 { 960, 438, 1344, 806}, /* 00 (320x200,320x400,640x200,640x400) */ 1166 { 960, 438, 1344, 806}, /* 00 (320x200,320x400,640x200,640x400) */
1179 { 960, 388, 1344, 806}, /* 01 (320x350,640x350) */ 1167 { 960, 388, 1344, 806}, /* 01 (320x350,640x350) */
1180 {1040, 438, 1344, 806}, /* 02 (360x400,720x400) */ 1168 {1040, 438, 1344, 806}, /* 02 (360x400,720x400) */
@@ -1185,7 +1173,7 @@ static struct SiS_LVDSData XGI_LVDS1024x768Data_1[] = {
1185}; 1173};
1186 1174
1187 1175
1188static struct SiS_LVDSData XGI_LVDS1024x768Data_2[] = { 1176static const struct SiS_LVDSData XGI_LVDS1024x768Data_2[] = {
1189 {1344, 806, 1344, 806}, 1177 {1344, 806, 1344, 806},
1190 {1344, 806, 1344, 806}, 1178 {1344, 806, 1344, 806},
1191 {1344, 806, 1344, 806}, 1179 {1344, 806, 1344, 806},
@@ -1197,7 +1185,7 @@ static struct SiS_LVDSData XGI_LVDS1024x768Data_2[] = {
1197 {800, 525, 1280, 813} 1185 {800, 525, 1280, 813}
1198}; 1186};
1199 1187
1200static struct SiS_LVDSData XGI_LVDS1280x1024Data_1[] = { 1188static const struct SiS_LVDSData XGI_LVDS1280x1024Data_1[] = {
1201 {1048, 442, 1688, 1066}, 1189 {1048, 442, 1688, 1066},
1202 {1048, 392, 1688, 1066}, 1190 {1048, 392, 1688, 1066},
1203 {1048, 442, 1688, 1066}, 1191 {1048, 442, 1688, 1066},
@@ -1210,7 +1198,7 @@ static struct SiS_LVDSData XGI_LVDS1280x1024Data_1[] = {
1210 1198
1211#define XGI_LVDS1280x1024Data_2 XGI_LVDS1024x768Data_2 1199#define XGI_LVDS1280x1024Data_2 XGI_LVDS1024x768Data_2
1212 1200
1213static struct SiS_LVDSData XGI_LVDS1400x1050Data_1[] = { 1201static const struct SiS_LVDSData XGI_LVDS1400x1050Data_1[] = {
1214 {928, 416, 1688, 1066}, 1202 {928, 416, 1688, 1066},
1215 {928, 366, 1688, 1066}, 1203 {928, 366, 1688, 1066},
1216 {928, 416, 1688, 1066}, 1204 {928, 416, 1688, 1066},
@@ -1222,7 +1210,7 @@ static struct SiS_LVDSData XGI_LVDS1400x1050Data_1[] = {
1222 {1688, 1066, 1688, 1066} 1210 {1688, 1066, 1688, 1066}
1223}; 1211};
1224 1212
1225static struct SiS_LVDSData XGI_LVDS1400x1050Data_2[] = { 1213static const struct SiS_LVDSData XGI_LVDS1400x1050Data_2[] = {
1226 {1688, 1066, 1688, 1066}, 1214 {1688, 1066, 1688, 1066},
1227 {1688, 1066, 1688, 1066}, 1215 {1688, 1066, 1688, 1066},
1228 {1688, 1066, 1688, 1066}, 1216 {1688, 1066, 1688, 1066},
@@ -1235,7 +1223,7 @@ static struct SiS_LVDSData XGI_LVDS1400x1050Data_2[] = {
1235}; 1223};
1236 1224
1237/* ;;[ycchen] 12/05/02 LCDHTxLCDVT=2048x1320 */ 1225/* ;;[ycchen] 12/05/02 LCDHTxLCDVT=2048x1320 */
1238static struct SiS_LVDSData XGI_LVDS1600x1200Data_1[] = { 1226static const struct SiS_LVDSData XGI_LVDS1600x1200Data_1[] = {
1239 {1088, 520, 2048, 1320}, /* 00 (320x200,320x400,640x200,640x400) */ 1227 {1088, 520, 2048, 1320}, /* 00 (320x200,320x400,640x200,640x400) */
1240 {1088, 470, 2048, 1320}, /* 01 (320x350,640x350) */ 1228 {1088, 470, 2048, 1320}, /* 01 (320x350,640x350) */
1241 {1088, 520, 2048, 1320}, /* 02 (360x400,720x400) */ 1229 {1088, 520, 2048, 1320}, /* 02 (360x400,720x400) */
@@ -1248,7 +1236,7 @@ static struct SiS_LVDSData XGI_LVDS1600x1200Data_1[] = {
1248 {2048, 1320, 2048, 1320} /* 09 (1600x1200) */ 1236 {2048, 1320, 2048, 1320} /* 09 (1600x1200) */
1249}; 1237};
1250 1238
1251static struct SiS_LVDSData XGI_LVDSNoScalingData[] = { 1239static const struct SiS_LVDSData XGI_LVDSNoScalingData[] = {
1252 { 800, 449, 800, 449}, /* 00 (320x200,320x400,640x200,640x400) */ 1240 { 800, 449, 800, 449}, /* 00 (320x200,320x400,640x200,640x400) */
1253 { 800, 449, 800, 449}, /* 01 (320x350,640x350) */ 1241 { 800, 449, 800, 449}, /* 01 (320x350,640x350) */
1254 { 800, 449, 800, 449}, /* 02 (360x400,720x400) */ 1242 { 800, 449, 800, 449}, /* 02 (360x400,720x400) */
@@ -1262,7 +1250,7 @@ static struct SiS_LVDSData XGI_LVDSNoScalingData[] = {
1262 {1688, 806, 1688, 806} /* 0A (1280x768x60Hz) */ 1250 {1688, 806, 1688, 806} /* 0A (1280x768x60Hz) */
1263}; 1251};
1264 1252
1265static struct SiS_LVDSData XGI_LVDS1024x768Data_1x75[] = { 1253static const struct SiS_LVDSData XGI_LVDS1024x768Data_1x75[] = {
1266 { 960, 438, 1312, 800}, /* 00 (320x200,320x400,640x200,640x400) */ 1254 { 960, 438, 1312, 800}, /* 00 (320x200,320x400,640x200,640x400) */
1267 { 960, 388, 1312, 800}, /* 01 (320x350,640x350) */ 1255 { 960, 388, 1312, 800}, /* 01 (320x350,640x350) */
1268 {1040, 438, 1312, 800}, /* 02 (360x400,720x400) */ 1256 {1040, 438, 1312, 800}, /* 02 (360x400,720x400) */
@@ -1273,7 +1261,7 @@ static struct SiS_LVDSData XGI_LVDS1024x768Data_1x75[] = {
1273}; 1261};
1274 1262
1275 1263
1276static struct SiS_LVDSData XGI_LVDS1024x768Data_2x75[] = { 1264static const struct SiS_LVDSData XGI_LVDS1024x768Data_2x75[] = {
1277 {1312, 800, 1312, 800}, /* ; 00 (320x200,320x400,640x200,640x400) */ 1265 {1312, 800, 1312, 800}, /* ; 00 (320x200,320x400,640x200,640x400) */
1278 {1312, 800, 1312, 800}, /* ; 01 (320x350,640x350) */ 1266 {1312, 800, 1312, 800}, /* ; 01 (320x350,640x350) */
1279 {1312, 800, 1312, 800}, /* ; 02 (360x400,720x400) */ 1267 {1312, 800, 1312, 800}, /* ; 02 (360x400,720x400) */
@@ -1283,7 +1271,7 @@ static struct SiS_LVDSData XGI_LVDS1024x768Data_2x75[] = {
1283 {1312, 800, 1312, 800}, /* ; 06 (512x384,1024x768) */ 1271 {1312, 800, 1312, 800}, /* ; 06 (512x384,1024x768) */
1284}; 1272};
1285 1273
1286static struct SiS_LVDSData XGI_LVDS1280x1024Data_1x75[] = { 1274static const struct SiS_LVDSData XGI_LVDS1280x1024Data_1x75[] = {
1287 {1048, 442, 1688, 1066 }, /* ; 00 (320x200,320x400,640x200,640x400) */ 1275 {1048, 442, 1688, 1066 }, /* ; 00 (320x200,320x400,640x200,640x400) */
1288 {1048, 392, 1688, 1066 }, /* ; 01 (320x350,640x350) */ 1276 {1048, 392, 1688, 1066 }, /* ; 01 (320x350,640x350) */
1289 {1128, 442, 1688, 1066 }, /* ; 02 (360x400,720x400) */ 1277 {1128, 442, 1688, 1066 }, /* ; 02 (360x400,720x400) */
@@ -1294,7 +1282,7 @@ static struct SiS_LVDSData XGI_LVDS1280x1024Data_1x75[] = {
1294 {1688, 1066, 1688, 1066 }, /* ; 06; 07 (640x512,1280x1024) */ 1282 {1688, 1066, 1688, 1066 }, /* ; 06; 07 (640x512,1280x1024) */
1295}; 1283};
1296 1284
1297static struct SiS_LVDSData XGI_LVDS1280x1024Data_2x75[] = { 1285static const struct SiS_LVDSData XGI_LVDS1280x1024Data_2x75[] = {
1298 {1688, 1066, 1688, 1066 }, /* ; 00 (320x200,320x400,640x200,640x400) */ 1286 {1688, 1066, 1688, 1066 }, /* ; 00 (320x200,320x400,640x200,640x400) */
1299 {1688, 1066, 1688, 1066 }, /* ; 01 (320x350,640x350) */ 1287 {1688, 1066, 1688, 1066 }, /* ; 01 (320x350,640x350) */
1300 {1688, 1066, 1688, 1066 }, /* ; 02 (360x400,720x400) */ 1288 {1688, 1066, 1688, 1066 }, /* ; 02 (360x400,720x400) */
@@ -1305,7 +1293,7 @@ static struct SiS_LVDSData XGI_LVDS1280x1024Data_2x75[] = {
1305 {1688, 1066, 1688, 1066 }, /* ; 06; 07 (640x512,1280x1024) */ 1293 {1688, 1066, 1688, 1066 }, /* ; 06; 07 (640x512,1280x1024) */
1306}; 1294};
1307 1295
1308static struct SiS_LVDSData XGI_LVDSNoScalingDatax75[] = { 1296static const struct SiS_LVDSData XGI_LVDSNoScalingDatax75[] = {
1309 { 800, 449, 800, 449}, /* ; 00 (320x200,320x400,640x200,640x400) */ 1297 { 800, 449, 800, 449}, /* ; 00 (320x200,320x400,640x200,640x400) */
1310 { 800, 449, 800, 449}, /* ; 01 (320x350,640x350) */ 1298 { 800, 449, 800, 449}, /* ; 01 (320x350,640x350) */
1311 { 900, 449, 900, 449}, /* ; 02 (360x400,720x400) */ 1299 { 900, 449, 900, 449}, /* ; 02 (360x400,720x400) */
@@ -1320,7 +1308,7 @@ static struct SiS_LVDSData XGI_LVDSNoScalingDatax75[] = {
1320 {1688, 806, 1688, 806}, /* ; 0A (1280x768x75Hz) */ 1308 {1688, 806, 1688, 806}, /* ; 0A (1280x768x75Hz) */
1321}; 1309};
1322 1310
1323static struct SiS_LVDSData XGI_LVDS1024x768Des_1[] = { 1311static const struct SiS_LVDSData XGI_LVDS1024x768Des_1[] = {
1324 {0, 1048, 0, 771}, /* 00 (320x200,320x400,640x200,640x400) */ 1312 {0, 1048, 0, 771}, /* 00 (320x200,320x400,640x200,640x400) */
1325 {0, 1048, 0, 771}, /* 01 (320x350,640x350) */ 1313 {0, 1048, 0, 771}, /* 01 (320x350,640x350) */
1326 {0, 1048, 0, 771}, /* 02 (360x400,720x400) */ 1314 {0, 1048, 0, 771}, /* 02 (360x400,720x400) */
@@ -1330,7 +1318,7 @@ static struct SiS_LVDSData XGI_LVDS1024x768Des_1[] = {
1330 {0, 1048, 805, 770} /* 06 (1024x768x60Hz) */ 1318 {0, 1048, 805, 770} /* 06 (1024x768x60Hz) */
1331} ; 1319} ;
1332 1320
1333static struct SiS_LVDSData XGI_LVDS1024x768Des_2[] = { 1321static const struct SiS_LVDSData XGI_LVDS1024x768Des_2[] = {
1334 {1142, 856, 622, 587}, /* 00 (320x200,320x400,640x200,640x400) */ 1322 {1142, 856, 622, 587}, /* 00 (320x200,320x400,640x200,640x400) */
1335 {1142, 856, 597, 562}, /* 01 (320x350,640x350) */ 1323 {1142, 856, 597, 562}, /* 01 (320x350,640x350) */
1336 {1142, 856, 622, 587}, /* 02 (360x400,720x400) */ 1324 {1142, 856, 622, 587}, /* 02 (360x400,720x400) */
@@ -1340,7 +1328,7 @@ static struct SiS_LVDSData XGI_LVDS1024x768Des_2[] = {
1340 { 0, 1048, 805, 771} /* 06 (1024x768x60Hz) */ 1328 { 0, 1048, 805, 771} /* 06 (1024x768x60Hz) */
1341}; 1329};
1342 1330
1343static struct SiS_LVDSData XGI_LVDS1024x768Des_3[] = { 1331static const struct SiS_LVDSData XGI_LVDS1024x768Des_3[] = {
1344 {320, 24, 622, 587}, /* 00 (320x200,320x400,640x200,640x400) */ 1332 {320, 24, 622, 587}, /* 00 (320x200,320x400,640x200,640x400) */
1345 {320, 24, 597, 562}, /* 01 (320x350,640x350) */ 1333 {320, 24, 597, 562}, /* 01 (320x350,640x350) */
1346 {320, 24, 622, 587}, /* 02 (360x400,720x400) */ 1334 {320, 24, 622, 587}, /* 02 (360x400,720x400) */
@@ -1348,7 +1336,7 @@ static struct SiS_LVDSData XGI_LVDS1024x768Des_3[] = {
1348 {320, 24, 722, 687} /* 04 (640x480x60Hz) */ 1336 {320, 24, 722, 687} /* 04 (640x480x60Hz) */
1349}; 1337};
1350 1338
1351static struct SiS_LVDSData XGI_LVDS1280x1024Des_1[] = { 1339static const struct SiS_LVDSData XGI_LVDS1280x1024Des_1[] = {
1352 {0, 1328, 0, 1025}, /* 00 (320x200,320x400,640x200,640x400) */ 1340 {0, 1328, 0, 1025}, /* 00 (320x200,320x400,640x200,640x400) */
1353 {0, 1328, 0, 1025}, /* 01 (320x350,640x350) */ 1341 {0, 1328, 0, 1025}, /* 01 (320x350,640x350) */
1354 {0, 1328, 0, 1025}, /* 02 (360x400,720x400) */ 1342 {0, 1328, 0, 1025}, /* 02 (360x400,720x400) */
@@ -1360,7 +1348,7 @@ static struct SiS_LVDSData XGI_LVDS1280x1024Des_1[] = {
1360}; 1348};
1361 1349
1362 /* The Display setting for DE Mode Panel */ 1350 /* The Display setting for DE Mode Panel */
1363static struct SiS_LVDSData XGI_LVDS1280x1024Des_2[] = { 1351static const struct SiS_LVDSData XGI_LVDS1280x1024Des_2[] = {
1364 {1368, 1008, 752, 711}, /* 00 (320x200,320x400,640x200,640x400) */ 1352 {1368, 1008, 752, 711}, /* 00 (320x200,320x400,640x200,640x400) */
1365 {1368, 1008, 729, 688}, /* 01 (320x350,640x350) */ 1353 {1368, 1008, 729, 688}, /* 01 (320x350,640x350) */
1366 {1408, 1048, 752, 711}, /* 02 (360x400,720x400) */ 1354 {1408, 1048, 752, 711}, /* 02 (360x400,720x400) */
@@ -1371,7 +1359,7 @@ static struct SiS_LVDSData XGI_LVDS1280x1024Des_2[] = {
1371 {0000, 1328, 0, 1025} /* 07 (1280x1024x60Hz) */ 1359 {0000, 1328, 0, 1025} /* 07 (1280x1024x60Hz) */
1372}; 1360};
1373 1361
1374static struct SiS_LVDSData XGI_LVDS1400x1050Des_1[] = { 1362static const struct SiS_LVDSData XGI_LVDS1400x1050Des_1[] = {
1375 {0, 1448, 0, 1051}, /* 00 (320x200,320x400,640x200,640x400) */ 1363 {0, 1448, 0, 1051}, /* 00 (320x200,320x400,640x200,640x400) */
1376 {0, 1448, 0, 1051}, /* 01 (320x350,640x350) */ 1364 {0, 1448, 0, 1051}, /* 01 (320x350,640x350) */
1377 {0, 1448, 0, 1051}, /* 02 (360x400,720x400) */ 1365 {0, 1448, 0, 1051}, /* 02 (360x400,720x400) */
@@ -1383,7 +1371,7 @@ static struct SiS_LVDSData XGI_LVDS1400x1050Des_1[] = {
1383 {0, 1448, 0, 1051} /* 08 (1400x1050x60Hz) */ 1371 {0, 1448, 0, 1051} /* 08 (1400x1050x60Hz) */
1384}; 1372};
1385 1373
1386static struct SiS_LVDSData XGI_LVDS1400x1050Des_2[] = { 1374static const struct SiS_LVDSData XGI_LVDS1400x1050Des_2[] = {
1387 {1308, 1068, 781, 766}, /* 00 (320x200,320x400,640x200,640x400) */ 1375 {1308, 1068, 781, 766}, /* 00 (320x200,320x400,640x200,640x400) */
1388 {1308, 1068, 781, 766}, /* 01 (320x350,640x350) */ 1376 {1308, 1068, 781, 766}, /* 01 (320x350,640x350) */
1389 {1308, 1068, 781, 766}, /* 02 (360x400,720x400) */ 1377 {1308, 1068, 781, 766}, /* 02 (360x400,720x400) */
@@ -1395,7 +1383,7 @@ static struct SiS_LVDSData XGI_LVDS1400x1050Des_2[] = {
1395 { 0, 1448, 0, 1051} /* 08 (1400x1050x60Hz) */ 1383 { 0, 1448, 0, 1051} /* 08 (1400x1050x60Hz) */
1396}; 1384};
1397 1385
1398static struct SiS_LVDSData XGI_LVDS1600x1200Des_1[] = { 1386static const struct SiS_LVDSData XGI_LVDS1600x1200Des_1[] = {
1399 {0, 1664, 0, 1201}, /* 00 (320x200,320x400,640x200,640x400) */ 1387 {0, 1664, 0, 1201}, /* 00 (320x200,320x400,640x200,640x400) */
1400 {0, 1664, 0, 1201}, /* 01 (320x350,640x350) */ 1388 {0, 1664, 0, 1201}, /* 01 (320x350,640x350) */
1401 {0, 1664, 0, 1201}, /* 02 (360x400,720x400) */ 1389 {0, 1664, 0, 1201}, /* 02 (360x400,720x400) */
@@ -1408,7 +1396,7 @@ static struct SiS_LVDSData XGI_LVDS1600x1200Des_1[] = {
1408 {0, 1664, 0, 1201} /* 09 (1600x1200x60Hz) */ 1396 {0, 1664, 0, 1201} /* 09 (1600x1200x60Hz) */
1409}; 1397};
1410 1398
1411static struct XGI330_LCDDataDesStruct2 XGI_LVDSNoScalingDesData[] = { 1399static const struct XGI330_LCDDataDesStruct2 XGI_LVDSNoScalingDesData[] = {
1412 {0, 648, 448, 405, 96, 2}, /* 00 (320x200,320x400, 1400 {0, 648, 448, 405, 96, 2}, /* 00 (320x200,320x400,
1413 640x200,640x400) */ 1401 640x200,640x400) */
1414 {0, 648, 448, 355, 96, 2}, /* 01 (320x350,640x350) */ 1402 {0, 648, 448, 355, 96, 2}, /* 01 (320x350,640x350) */
@@ -1424,7 +1412,7 @@ static struct XGI330_LCDDataDesStruct2 XGI_LVDSNoScalingDesData[] = {
1424}; 1412};
1425 1413
1426/* ; 1024x768 Full-screen */ 1414/* ; 1024x768 Full-screen */
1427static struct SiS_LVDSData XGI_LVDS1024x768Des_1x75[] = { 1415static const struct SiS_LVDSData XGI_LVDS1024x768Des_1x75[] = {
1428 {0, 1040, 0, 769}, /* ; 00 (320x200,320x400,640x200,640x400) */ 1416 {0, 1040, 0, 769}, /* ; 00 (320x200,320x400,640x200,640x400) */
1429 {0, 1040, 0, 769}, /* ; 01 (320x350,640x350) */ 1417 {0, 1040, 0, 769}, /* ; 01 (320x350,640x350) */
1430 {0, 1040, 0, 769}, /* ; 02 (360x400,720x400) */ 1418 {0, 1040, 0, 769}, /* ; 02 (360x400,720x400) */
@@ -1435,7 +1423,7 @@ static struct SiS_LVDSData XGI_LVDS1024x768Des_1x75[] = {
1435}; 1423};
1436 1424
1437/* ; 1024x768 center-screen (Enh. Mode) */ 1425/* ; 1024x768 center-screen (Enh. Mode) */
1438static struct SiS_LVDSData XGI_LVDS1024x768Des_2x75[] = { 1426static const struct SiS_LVDSData XGI_LVDS1024x768Des_2x75[] = {
1439 {1142, 856, 622, 587}, /* 00 (320x200,320x400,640x200,640x400) */ 1427 {1142, 856, 622, 587}, /* 00 (320x200,320x400,640x200,640x400) */
1440 {1142, 856, 597, 562}, /* 01 (320x350,640x350) */ 1428 {1142, 856, 597, 562}, /* 01 (320x350,640x350) */
1441 {1142, 856, 622, 587}, /* 02 (360x400,720x400) */ 1429 {1142, 856, 622, 587}, /* 02 (360x400,720x400) */
@@ -1446,7 +1434,7 @@ static struct SiS_LVDSData XGI_LVDS1024x768Des_2x75[] = {
1446}; 1434};
1447 1435
1448/* ; 1024x768 center-screen (St.Mode) */ 1436/* ; 1024x768 center-screen (St.Mode) */
1449static struct SiS_LVDSData XGI_LVDS1024x768Des_3x75[] = { 1437static const struct SiS_LVDSData XGI_LVDS1024x768Des_3x75[] = {
1450 {320, 24, 622, 587}, /* ; 00 (320x200,320x400,640x200,640x400) */ 1438 {320, 24, 622, 587}, /* ; 00 (320x200,320x400,640x200,640x400) */
1451 {320, 24, 597, 562}, /* ; 01 (320x350,640x350) */ 1439 {320, 24, 597, 562}, /* ; 01 (320x350,640x350) */
1452 {320, 24, 622, 587}, /* ; 02 (360x400,720x400) */ 1440 {320, 24, 622, 587}, /* ; 02 (360x400,720x400) */
@@ -1454,7 +1442,7 @@ static struct SiS_LVDSData XGI_LVDS1024x768Des_3x75[] = {
1454 {320, 24, 722, 687} /* ; 04 (640x480x60Hz) */ 1442 {320, 24, 722, 687} /* ; 04 (640x480x60Hz) */
1455}; 1443};
1456 1444
1457static struct SiS_LVDSData XGI_LVDS1280x1024Des_1x75[] = { 1445static const struct SiS_LVDSData XGI_LVDS1280x1024Des_1x75[] = {
1458 {0, 1296, 0, 1025}, /* ; 00 (320x200,320x400,640x200,640x400) */ 1446 {0, 1296, 0, 1025}, /* ; 00 (320x200,320x400,640x200,640x400) */
1459 {0, 1296, 0, 1025}, /* ; 01 (320x350,640x350) */ 1447 {0, 1296, 0, 1025}, /* ; 01 (320x350,640x350) */
1460 {0, 1296, 0, 1025}, /* ; 02 (360x400,720x400) */ 1448 {0, 1296, 0, 1025}, /* ; 02 (360x400,720x400) */
@@ -1467,7 +1455,7 @@ static struct SiS_LVDSData XGI_LVDS1280x1024Des_1x75[] = {
1467 1455
1468/* The Display setting for DE Mode Panel */ 1456/* The Display setting for DE Mode Panel */
1469/* Set DE as default */ 1457/* Set DE as default */
1470static struct SiS_LVDSData XGI_LVDS1280x1024Des_2x75[] = { 1458static const struct SiS_LVDSData XGI_LVDS1280x1024Des_2x75[] = {
1471 {1368, 976, 752, 711}, /* ; 00 (320x200,320x400,640x200,640x400) */ 1459 {1368, 976, 752, 711}, /* ; 00 (320x200,320x400,640x200,640x400) */
1472 {1368, 976, 729, 688}, /* ; 01 (320x350,640x350) */ 1460 {1368, 976, 729, 688}, /* ; 01 (320x350,640x350) */
1473 {1408, 976, 752, 711}, /* ; 02 (360x400,720x400) */ 1461 {1408, 976, 752, 711}, /* ; 02 (360x400,720x400) */
@@ -1479,7 +1467,7 @@ static struct SiS_LVDSData XGI_LVDS1280x1024Des_2x75[] = {
1479}; 1467};
1480 1468
1481/* Scaling LCD 75Hz */ 1469/* Scaling LCD 75Hz */
1482static struct XGI330_LCDDataDesStruct2 XGI_LVDSNoScalingDesDatax75[] = { 1470static const struct XGI330_LCDDataDesStruct2 XGI_LVDSNoScalingDesDatax75[] = {
1483 {0, 648, 448, 405, 96, 2}, /* ; 00 (320x200,320x400, 1471 {0, 648, 448, 405, 96, 2}, /* ; 00 (320x200,320x400,
1484 640x200,640x400) */ 1472 640x200,640x400) */
1485 {0, 648, 448, 355, 96, 2}, /* ; 01 (320x350,640x350) */ 1473 {0, 648, 448, 355, 96, 2}, /* ; 01 (320x350,640x350) */
@@ -1495,7 +1483,7 @@ static struct XGI330_LCDDataDesStruct2 XGI_LVDSNoScalingDesDatax75[] = {
1495}; 1483};
1496 1484
1497/* CR00,CR02,CR03,CR04,CR05,SR0B,SR0C,SR0E */ 1485/* CR00,CR02,CR03,CR04,CR05,SR0B,SR0C,SR0E */
1498static struct XGI_LVDSCRT1HDataStruct XGI_LVDSCRT11024x768_1_H[] = { 1486static const struct XGI_LVDSCRT1HDataStruct XGI_LVDSCRT11024x768_1_H[] = {
1499 { {0x4B, 0x27, 0x8F, 0x32, 0x1B, 0x00, 0x45, 0x00} }, /* 00 (320x) */ 1487 { {0x4B, 0x27, 0x8F, 0x32, 0x1B, 0x00, 0x45, 0x00} }, /* 00 (320x) */
1500 { {0x4B, 0x27, 0x8F, 0x2B, 0x03, 0x00, 0x44, 0x00} }, /* 01 (360x) */ 1488 { {0x4B, 0x27, 0x8F, 0x2B, 0x03, 0x00, 0x44, 0x00} }, /* 01 (360x) */
1501 { {0x55, 0x31, 0x99, 0x46, 0x1D, 0x00, 0x55, 0x00} }, /* 02 (400x) */ 1489 { {0x55, 0x31, 0x99, 0x46, 0x1D, 0x00, 0x55, 0x00} }, /* 02 (400x) */
@@ -1507,7 +1495,7 @@ static struct XGI_LVDSCRT1HDataStruct XGI_LVDSCRT11024x768_1_H[] = {
1507}; 1495};
1508 1496
1509/* CR00,CR02,CR03,CR04,CR05,SR0B,SR0C,SR0E */ 1497/* CR00,CR02,CR03,CR04,CR05,SR0B,SR0C,SR0E */
1510static struct XGI_LVDSCRT1HDataStruct XGI_LVDSCRT11280x1024_1_H[] = { 1498static const struct XGI_LVDSCRT1HDataStruct XGI_LVDSCRT11280x1024_1_H[] = {
1511 { {0x56, 0x27, 0x9A, 0x30, 0x1E, 0x00, 0x05, 0x00 } }, /* 00 (320x) */ 1499 { {0x56, 0x27, 0x9A, 0x30, 0x1E, 0x00, 0x05, 0x00 } }, /* 00 (320x) */
1512 { {0x56, 0x27, 0x9A, 0x30, 0x1E, 0x00, 0x05, 0x00 } }, /* 01 (360x) */ 1500 { {0x56, 0x27, 0x9A, 0x30, 0x1E, 0x00, 0x05, 0x00 } }, /* 01 (360x) */
1513 { {0x60, 0x31, 0x84, 0x3A, 0x88, 0x00, 0x01, 0x00 } }, /* 02 (400x) */ 1501 { {0x60, 0x31, 0x84, 0x3A, 0x88, 0x00, 0x01, 0x00 } }, /* 02 (400x) */
@@ -1520,7 +1508,7 @@ static struct XGI_LVDSCRT1HDataStruct XGI_LVDSCRT11280x1024_1_H[] = {
1520}; 1508};
1521 1509
1522/* CR00,CR02,CR03,CR04,CR05,SR0B,SR0C,SR0E */ 1510/* CR00,CR02,CR03,CR04,CR05,SR0B,SR0C,SR0E */
1523static struct XGI_LVDSCRT1HDataStruct XGI_LVDSCRT11024x768_2_H[] = { 1511static const struct XGI_LVDSCRT1HDataStruct XGI_LVDSCRT11024x768_2_H[] = {
1524 { {0x63, 0x27, 0x87, 0x3B, 0x8C, 0x00, 0x01, 0x00} }, /* 00 (320x) */ 1512 { {0x63, 0x27, 0x87, 0x3B, 0x8C, 0x00, 0x01, 0x00} }, /* 00 (320x) */
1525 { {0x63, 0x27, 0x87, 0x3B, 0x8C, 0x00, 0x01, 0x00} }, /* 01 (360x) */ 1513 { {0x63, 0x27, 0x87, 0x3B, 0x8C, 0x00, 0x01, 0x00} }, /* 01 (360x) */
1526 { {0x63, 0x31, 0x87, 0x3D, 0x8E, 0x00, 0x01, 0x00} }, /* 02 (400x) */ 1514 { {0x63, 0x31, 0x87, 0x3D, 0x8E, 0x00, 0x01, 0x00} }, /* 02 (400x) */
@@ -1532,7 +1520,7 @@ static struct XGI_LVDSCRT1HDataStruct XGI_LVDSCRT11024x768_2_H[] = {
1532}; 1520};
1533 1521
1534/* CR00,CR02,CR03,CR04,CR05,SR0B,SR0C,SR0E */ 1522/* CR00,CR02,CR03,CR04,CR05,SR0B,SR0C,SR0E */
1535static struct XGI_LVDSCRT1HDataStruct XGI_LVDSCRT11280x1024_2_H[] = { 1523static const struct XGI_LVDSCRT1HDataStruct XGI_LVDSCRT11280x1024_2_H[] = {
1536 { {0x7E, 0x3B, 0x9A, 0x44, 0x12, 0x00, 0x01, 0x00} }, /* 00 (320x) */ 1524 { {0x7E, 0x3B, 0x9A, 0x44, 0x12, 0x00, 0x01, 0x00} }, /* 00 (320x) */
1537 { {0x7E, 0x3B, 0x9A, 0x44, 0x12, 0x00, 0x01, 0x00} }, /* 01 (360x) */ 1525 { {0x7E, 0x3B, 0x9A, 0x44, 0x12, 0x00, 0x01, 0x00} }, /* 01 (360x) */
1538 { {0x7E, 0x40, 0x84, 0x49, 0x91, 0x00, 0x01, 0x00} }, /* 02 (400x) */ 1526 { {0x7E, 0x40, 0x84, 0x49, 0x91, 0x00, 0x01, 0x00} }, /* 02 (400x) */
@@ -1545,7 +1533,7 @@ static struct XGI_LVDSCRT1HDataStruct XGI_LVDSCRT11280x1024_2_H[] = {
1545}; 1533};
1546 1534
1547/* CR00,CR02,CR03,CR04,CR05,SR0B,SR0C,SR0E */ 1535/* CR00,CR02,CR03,CR04,CR05,SR0B,SR0C,SR0E */
1548static struct XGI_LVDSCRT1HDataStruct XGI_LVDSCRT11400x1050_1_H[] = { 1536static const struct XGI_LVDSCRT1HDataStruct XGI_LVDSCRT11400x1050_1_H[] = {
1549 { {0x47, 0x27, 0x8B, 0x2C, 0x1A, 0x00, 0x05, 0x00} }, /* 00 (320x) */ 1537 { {0x47, 0x27, 0x8B, 0x2C, 0x1A, 0x00, 0x05, 0x00} }, /* 00 (320x) */
1550 { {0x47, 0x27, 0x8B, 0x30, 0x1E, 0x00, 0x05, 0x00} }, /* 01 (360x) */ 1538 { {0x47, 0x27, 0x8B, 0x30, 0x1E, 0x00, 0x05, 0x00} }, /* 01 (360x) */
1551 { {0x51, 0x31, 0x95, 0x36, 0x04, 0x00, 0x01, 0x00} }, /* 02 (400x) */ 1539 { {0x51, 0x31, 0x95, 0x36, 0x04, 0x00, 0x01, 0x00} }, /* 02 (400x) */
@@ -1559,7 +1547,7 @@ static struct XGI_LVDSCRT1HDataStruct XGI_LVDSCRT11400x1050_1_H[] = {
1559}; 1547};
1560 1548
1561/* CR00,CR02,CR03,CR04,CR05,SR0B,SR0C,SR0E */ 1549/* CR00,CR02,CR03,CR04,CR05,SR0B,SR0C,SR0E */
1562static struct XGI_LVDSCRT1HDataStruct XGI_LVDSCRT11400x1050_2_H[] = { 1550static const struct XGI_LVDSCRT1HDataStruct XGI_LVDSCRT11400x1050_2_H[] = {
1563 { {0x76, 0x3F, 0x83, 0x45, 0x8C, 0x00, 0x41, 0x00} }, /* 00 (320x) */ 1551 { {0x76, 0x3F, 0x83, 0x45, 0x8C, 0x00, 0x41, 0x00} }, /* 00 (320x) */
1564 { {0x76, 0x3F, 0x83, 0x45, 0x8C, 0x00, 0x41, 0x00} }, /* 01 (360x) */ 1552 { {0x76, 0x3F, 0x83, 0x45, 0x8C, 0x00, 0x41, 0x00} }, /* 01 (360x) */
1565 { {0x76, 0x31, 0x9A, 0x48, 0x9F, 0x00, 0x41, 0x00} }, /* 02 (400x) */ 1553 { {0x76, 0x31, 0x9A, 0x48, 0x9F, 0x00, 0x41, 0x00} }, /* 02 (400x) */
@@ -1574,7 +1562,7 @@ static struct XGI_LVDSCRT1HDataStruct XGI_LVDSCRT11400x1050_2_H[] = {
1574 1562
1575/* ;302lv channelA [ycchen] 12/05/02 LCDHT=2048 */ 1563/* ;302lv channelA [ycchen] 12/05/02 LCDHT=2048 */
1576/* ; CR00,CR02,CR03,CR04,CR05,SR0B,SR0C,SR0E */ 1564/* ; CR00,CR02,CR03,CR04,CR05,SR0B,SR0C,SR0E */
1577static struct XGI_LVDSCRT1HDataStruct XGI_LVDSCRT11600x1200_1_H[] = { 1565static const struct XGI_LVDSCRT1HDataStruct XGI_LVDSCRT11600x1200_1_H[] = {
1578 { {0x5B, 0x27, 0x9F, 0x32, 0x0A, 0x00, 0x01, 0x00} }, /* 00 (320x) */ 1566 { {0x5B, 0x27, 0x9F, 0x32, 0x0A, 0x00, 0x01, 0x00} }, /* 00 (320x) */
1579 { {0x5B, 0x27, 0x9F, 0x32, 0x0A, 0x00, 0x01, 0x00} }, /* 01 (360x) */ 1567 { {0x5B, 0x27, 0x9F, 0x32, 0x0A, 0x00, 0x01, 0x00} }, /* 01 (360x) */
1580 { {0x65, 0x31, 0x89, 0x3C, 0x94, 0x00, 0x01, 0x00} }, /* 02 (400x) */ 1568 { {0x65, 0x31, 0x89, 0x3C, 0x94, 0x00, 0x01, 0x00} }, /* 02 (400x) */
@@ -1589,7 +1577,7 @@ static struct XGI_LVDSCRT1HDataStruct XGI_LVDSCRT11600x1200_1_H[] = {
1589}; 1577};
1590 1578
1591/* CR06,CR07,CR10,CR11,CR15,CR16,SR0A+CR09(5->7) */ 1579/* CR06,CR07,CR10,CR11,CR15,CR16,SR0A+CR09(5->7) */
1592static struct XGI_LVDSCRT1VDataStruct XGI_LVDSCRT11024x768_1_V[] = { 1580static const struct XGI_LVDSCRT1VDataStruct XGI_LVDSCRT11024x768_1_V[] = {
1593 { {0x97, 0x1F, 0x60, 0x87, 0x5D, 0x83, 0x10} }, /* 00 (x350) */ 1581 { {0x97, 0x1F, 0x60, 0x87, 0x5D, 0x83, 0x10} }, /* 00 (x350) */
1594 { {0xB4, 0x1F, 0x92, 0x89, 0x8F, 0xB5, 0x30} }, /* 01 (x400) */ 1582 { {0xB4, 0x1F, 0x92, 0x89, 0x8F, 0xB5, 0x30} }, /* 01 (x400) */
1595 { {0x04, 0x3E, 0xE2, 0x89, 0xDF, 0x05, 0x00} }, /* 02 (x480) */ 1583 { {0x04, 0x3E, 0xE2, 0x89, 0xDF, 0x05, 0x00} }, /* 02 (x480) */
@@ -1598,7 +1586,7 @@ static struct XGI_LVDSCRT1VDataStruct XGI_LVDSCRT11024x768_1_V[] = {
1598}; 1586};
1599 1587
1600/* CR06,CR07,CR10,CR11,CR15,CR16,SR0A */ 1588/* CR06,CR07,CR10,CR11,CR15,CR16,SR0A */
1601static struct XGI_LVDSCRT1VDataStruct XGI_LVDSCRT11024x768_2_V[] = { 1589static const struct XGI_LVDSCRT1VDataStruct XGI_LVDSCRT11024x768_2_V[] = {
1602 { {0x24, 0xBB, 0x31, 0x87, 0x5D, 0x25, 0x30} }, /* 00 (x350) */ 1590 { {0x24, 0xBB, 0x31, 0x87, 0x5D, 0x25, 0x30} }, /* 00 (x350) */
1603 { {0x24, 0xBB, 0x4A, 0x80, 0x8F, 0x25, 0x30} }, /* 01 (x400) */ 1591 { {0x24, 0xBB, 0x4A, 0x80, 0x8F, 0x25, 0x30} }, /* 01 (x400) */
1604 { {0x24, 0xBB, 0x72, 0x88, 0xDF, 0x25, 0x30} }, /* 02 (x480) */ 1592 { {0x24, 0xBB, 0x72, 0x88, 0xDF, 0x25, 0x30} }, /* 02 (x480) */
@@ -1607,7 +1595,7 @@ static struct XGI_LVDSCRT1VDataStruct XGI_LVDSCRT11024x768_2_V[] = {
1607}; 1595};
1608 1596
1609/* CR06,CR07,CR10,CR11,CR15,CR16,SR0A */ 1597/* CR06,CR07,CR10,CR11,CR15,CR16,SR0A */
1610static struct XGI_LVDSCRT1VDataStruct XGI_LVDSCRT11280x1024_1_V[] = { 1598static const struct XGI_LVDSCRT1VDataStruct XGI_LVDSCRT11280x1024_1_V[] = {
1611 { {0x86, 0x1F, 0x5E, 0x82, 0x5D, 0x87, 0x00} }, /* 00 (x350) */ 1599 { {0x86, 0x1F, 0x5E, 0x82, 0x5D, 0x87, 0x00} }, /* 00 (x350) */
1612 { {0xB8, 0x1F, 0x90, 0x84, 0x8F, 0xB9, 0x30} }, /* 01 (x400) */ 1600 { {0xB8, 0x1F, 0x90, 0x84, 0x8F, 0xB9, 0x30} }, /* 01 (x400) */
1613 { {0x08, 0x3E, 0xE0, 0x84, 0xDF, 0x09, 0x00} }, /* 02 (x480) */ 1601 { {0x08, 0x3E, 0xE0, 0x84, 0xDF, 0x09, 0x00} }, /* 02 (x480) */
@@ -1617,7 +1605,7 @@ static struct XGI_LVDSCRT1VDataStruct XGI_LVDSCRT11280x1024_1_V[] = {
1617}; 1605};
1618 1606
1619/* CR06,CR07,CR10,CR11,CR15,CR16,SR0A */ 1607/* CR06,CR07,CR10,CR11,CR15,CR16,SR0A */
1620static struct XGI_LVDSCRT1VDataStruct XGI_LVDSCRT11280x1024_2_V[] = { 1608static const struct XGI_LVDSCRT1VDataStruct XGI_LVDSCRT11280x1024_2_V[] = {
1621 { {0x28, 0xD2, 0xAF, 0x83, 0xAE, 0xD8, 0xA1} }, /* 00 (x350) */ 1609 { {0x28, 0xD2, 0xAF, 0x83, 0xAE, 0xD8, 0xA1} }, /* 00 (x350) */
1622 { {0x28, 0xD2, 0xC8, 0x8C, 0xC7, 0xF2, 0x81} }, /* 01 (x400) */ 1610 { {0x28, 0xD2, 0xC8, 0x8C, 0xC7, 0xF2, 0x81} }, /* 01 (x400) */
1623 { {0x28, 0xD2, 0xF0, 0x84, 0xEF, 0x1A, 0xB1} }, /* 02 (x480) */ 1611 { {0x28, 0xD2, 0xF0, 0x84, 0xEF, 0x1A, 0xB1} }, /* 02 (x480) */
@@ -1627,7 +1615,7 @@ static struct XGI_LVDSCRT1VDataStruct XGI_LVDSCRT11280x1024_2_V[] = {
1627}; 1615};
1628 1616
1629/* CR06,CR07,CR10,CR11,CR15,CR16,SR0A */ 1617/* CR06,CR07,CR10,CR11,CR15,CR16,SR0A */
1630static struct XGI_LVDSCRT1VDataStruct XGI_LVDSCRT11400x1050_1_V[] = { 1618static const struct XGI_LVDSCRT1VDataStruct XGI_LVDSCRT11400x1050_1_V[] = {
1631 { {0x6C, 0x1F, 0x60, 0x84, 0x5D, 0x6D, 0x10} }, /* 00 (x350) */ 1619 { {0x6C, 0x1F, 0x60, 0x84, 0x5D, 0x6D, 0x10} }, /* 00 (x350) */
1632 { {0x9E, 0x1F, 0x93, 0x86, 0x8F, 0x9F, 0x30} }, /* 01 (x400) */ 1620 { {0x9E, 0x1F, 0x93, 0x86, 0x8F, 0x9F, 0x30} }, /* 01 (x400) */
1633 { {0xEE, 0x1F, 0xE2, 0x86, 0xDF, 0xEF, 0x10} }, /* 02 (x480) */ 1621 { {0xEE, 0x1F, 0xE2, 0x86, 0xDF, 0xEF, 0x10} }, /* 02 (x480) */
@@ -1638,7 +1626,7 @@ static struct XGI_LVDSCRT1VDataStruct XGI_LVDSCRT11400x1050_1_V[] = {
1638}; 1626};
1639 1627
1640/* CR06,CR07,CR10,CR11,CR15,CR16,SR0A */ 1628/* CR06,CR07,CR10,CR11,CR15,CR16,SR0A */
1641static struct XGI_LVDSCRT1VDataStruct XGI_LVDSCRT11400x1050_2_V[] = { 1629static const struct XGI_LVDSCRT1VDataStruct XGI_LVDSCRT11400x1050_2_V[] = {
1642 { {0x28, 0x92, 0xB6, 0x83, 0xB5, 0xCF, 0x81} }, /* 00 (x350) */ 1630 { {0x28, 0x92, 0xB6, 0x83, 0xB5, 0xCF, 0x81} }, /* 00 (x350) */
1643 { {0x28, 0x92, 0xD5, 0x82, 0xD4, 0xEE, 0x81} }, /* 01 (x400) */ 1631 { {0x28, 0x92, 0xD5, 0x82, 0xD4, 0xEE, 0x81} }, /* 01 (x400) */
1644 { {0x28, 0x92, 0xFD, 0x8A, 0xFC, 0x16, 0xB1} }, /* 02 (x480) */ 1632 { {0x28, 0x92, 0xFD, 0x8A, 0xFC, 0x16, 0xB1} }, /* 02 (x480) */
@@ -1649,7 +1637,7 @@ static struct XGI_LVDSCRT1VDataStruct XGI_LVDSCRT11400x1050_2_V[] = {
1649}; 1637};
1650 1638
1651/* CR06,CR07,CR10,CR11,CR15,CR16,SR0A+CR09(5->7) */ 1639/* CR06,CR07,CR10,CR11,CR15,CR16,SR0A+CR09(5->7) */
1652static struct XGI_LVDSCRT1VDataStruct XGI_LVDSCRT11600x1200_1_V[] = { 1640static const struct XGI_LVDSCRT1VDataStruct XGI_LVDSCRT11600x1200_1_V[] = {
1653 { {0xd4, 0x1F, 0x81, 0x84, 0x5D, 0xd5, 0x10} }, /* 00 (x350) */ 1641 { {0xd4, 0x1F, 0x81, 0x84, 0x5D, 0xd5, 0x10} }, /* 00 (x350) */
1654 { {0x06, 0x3e, 0xb3, 0x86, 0x8F, 0x07, 0x20} }, /* 01 (x400) */ 1642 { {0x06, 0x3e, 0xb3, 0x86, 0x8F, 0x07, 0x20} }, /* 01 (x400) */
1655 { {0x56, 0xba, 0x03, 0x86, 0xDF, 0x57, 0x00} }, /* 02 (x480) */ 1643 { {0x56, 0xba, 0x03, 0x86, 0xDF, 0x57, 0x00} }, /* 02 (x480) */
@@ -1661,7 +1649,7 @@ static struct XGI_LVDSCRT1VDataStruct XGI_LVDSCRT11600x1200_1_V[] = {
1661}; 1649};
1662 1650
1663/* CR00,CR02,CR03,CR04,CR05,SR0B,SR0C,SR0E */ 1651/* CR00,CR02,CR03,CR04,CR05,SR0B,SR0C,SR0E */
1664static struct XGI_LVDSCRT1HDataStruct XGI_LVDSCRT11024x768_1_Hx75[] = { 1652static const struct XGI_LVDSCRT1HDataStruct XGI_LVDSCRT11024x768_1_Hx75[] = {
1665 { {0x4B, 0x27, 0x8F, 0x32, 0x1B, 0x00, 0x45, 0x00} },/* ; 00 (320x) */ 1653 { {0x4B, 0x27, 0x8F, 0x32, 0x1B, 0x00, 0x45, 0x00} },/* ; 00 (320x) */
1666 { {0x4B, 0x27, 0x8F, 0x2B, 0x03, 0x00, 0x44, 0x00} },/* ; 01 (360x) */ 1654 { {0x4B, 0x27, 0x8F, 0x2B, 0x03, 0x00, 0x44, 0x00} },/* ; 01 (360x) */
1667 { {0x55, 0x31, 0x99, 0x46, 0x1D, 0x00, 0x55, 0x00} },/* ; 02 (400x) */ 1655 { {0x55, 0x31, 0x99, 0x46, 0x1D, 0x00, 0x55, 0x00} },/* ; 02 (400x) */
@@ -1673,7 +1661,7 @@ static struct XGI_LVDSCRT1HDataStruct XGI_LVDSCRT11024x768_1_Hx75[] = {
1673}; 1661};
1674 1662
1675/* CR06,CR07,CR10,CR11,CR15,CR16,SR0A+CR09(5->7) */ 1663/* CR06,CR07,CR10,CR11,CR15,CR16,SR0A+CR09(5->7) */
1676static struct XGI_LVDSCRT1VDataStruct XGI_LVDSCRT11024x768_1_Vx75[] = { 1664static const struct XGI_LVDSCRT1VDataStruct XGI_LVDSCRT11024x768_1_Vx75[] = {
1677 { {0x97, 0x1F, 0x60, 0x87, 0x5D, 0x83, 0x10} },/* ; 00 (x350) */ 1665 { {0x97, 0x1F, 0x60, 0x87, 0x5D, 0x83, 0x10} },/* ; 00 (x350) */
1678 { {0xB4, 0x1F, 0x92, 0x89, 0x8F, 0xB5, 0x30} },/* ; 01 (x400) */ 1666 { {0xB4, 0x1F, 0x92, 0x89, 0x8F, 0xB5, 0x30} },/* ; 01 (x400) */
1679 { {0xFE, 0x1F, 0xE0, 0x84, 0xDF, 0xFF, 0x10} },/* ; 02 (x480) */ 1667 { {0xFE, 0x1F, 0xE0, 0x84, 0xDF, 0xFF, 0x10} },/* ; 02 (x480) */
@@ -1682,7 +1670,7 @@ static struct XGI_LVDSCRT1VDataStruct XGI_LVDSCRT11024x768_1_Vx75[] = {
1682}; 1670};
1683 1671
1684/* CR00,CR02,CR03,CR04,CR05,SR0B,SR0C,SR0E */ 1672/* CR00,CR02,CR03,CR04,CR05,SR0B,SR0C,SR0E */
1685static struct XGI_LVDSCRT1HDataStruct XGI_LVDSCRT11024x768_2_Hx75[] = { 1673static const struct XGI_LVDSCRT1HDataStruct XGI_LVDSCRT11024x768_2_Hx75[] = {
1686 { {0x63, 0x27, 0x87, 0x3B, 0x8C, 0x00, 0x01, 0x00} },/* ; 00 (320x) */ 1674 { {0x63, 0x27, 0x87, 0x3B, 0x8C, 0x00, 0x01, 0x00} },/* ; 00 (320x) */
1687 { {0x63, 0x27, 0x87, 0x3B, 0x8C, 0x00, 0x01, 0x00} },/* ; 01 (360x) */ 1675 { {0x63, 0x27, 0x87, 0x3B, 0x8C, 0x00, 0x01, 0x00} },/* ; 01 (360x) */
1688 { {0x63, 0x31, 0x87, 0x3D, 0x8E, 0x00, 0x01, 0x00} },/* ; 02 (400x) */ 1676 { {0x63, 0x31, 0x87, 0x3D, 0x8E, 0x00, 0x01, 0x00} },/* ; 02 (400x) */
@@ -1694,7 +1682,7 @@ static struct XGI_LVDSCRT1HDataStruct XGI_LVDSCRT11024x768_2_Hx75[] = {
1694}; 1682};
1695 1683
1696/* CR06,CR07,CR10,CR11,CR15,CR16,SR0A */ 1684/* CR06,CR07,CR10,CR11,CR15,CR16,SR0A */
1697static struct XGI_LVDSCRT1VDataStruct XGI_LVDSCRT11024x768_2_Vx75[] = { 1685static const struct XGI_LVDSCRT1VDataStruct XGI_LVDSCRT11024x768_2_Vx75[] = {
1698 { {0x24, 0xBB, 0x31, 0x87, 0x5D, 0x25, 0x30} },/* ; 00 (x350) */ 1686 { {0x24, 0xBB, 0x31, 0x87, 0x5D, 0x25, 0x30} },/* ; 00 (x350) */
1699 { {0x24, 0xBB, 0x4A, 0x80, 0x8F, 0x25, 0x30} },/* ; 01 (x400) */ 1687 { {0x24, 0xBB, 0x4A, 0x80, 0x8F, 0x25, 0x30} },/* ; 01 (x400) */
1700 { {0x24, 0xBB, 0x72, 0x88, 0xDF, 0x25, 0x30} },/* ; 02 (x480) */ 1688 { {0x24, 0xBB, 0x72, 0x88, 0xDF, 0x25, 0x30} },/* ; 02 (x480) */
@@ -1703,7 +1691,7 @@ static struct XGI_LVDSCRT1VDataStruct XGI_LVDSCRT11024x768_2_Vx75[] = {
1703}; 1691};
1704 1692
1705/* CR00,CR02,CR03,CR04,CR05,SR0B,SR0C,SR0E */ 1693/* CR00,CR02,CR03,CR04,CR05,SR0B,SR0C,SR0E */
1706static struct XGI_LVDSCRT1HDataStruct XGI_LVDSCRT11280x1024_1_Hx75[] = { 1694static const struct XGI_LVDSCRT1HDataStruct XGI_LVDSCRT11280x1024_1_Hx75[] = {
1707 { {0x56, 0x27, 0x9A, 0x30, 0x1E, 0x00, 0x05, 0x00} },/* ; 00 (320x) */ 1695 { {0x56, 0x27, 0x9A, 0x30, 0x1E, 0x00, 0x05, 0x00} },/* ; 00 (320x) */
1708 { {0x56, 0x27, 0x9A, 0x30, 0x1E, 0x00, 0x05, 0x00} },/* ; 01 (360x) */ 1696 { {0x56, 0x27, 0x9A, 0x30, 0x1E, 0x00, 0x05, 0x00} },/* ; 01 (360x) */
1709 { {0x60, 0x31, 0x84, 0x3A, 0x88, 0x00, 0x01, 0x00} },/* ; 02 (400x) */ 1697 { {0x60, 0x31, 0x84, 0x3A, 0x88, 0x00, 0x01, 0x00} },/* ; 02 (400x) */
@@ -1716,7 +1704,7 @@ static struct XGI_LVDSCRT1HDataStruct XGI_LVDSCRT11280x1024_1_Hx75[] = {
1716}; 1704};
1717 1705
1718/* CR06,CR07,CR10,CR11,CR15,CR16,SR0A */ 1706/* CR06,CR07,CR10,CR11,CR15,CR16,SR0A */
1719static struct XGI_LVDSCRT1VDataStruct XGI_LVDSCRT11280x1024_1_Vx75[] = { 1707static const struct XGI_LVDSCRT1VDataStruct XGI_LVDSCRT11280x1024_1_Vx75[] = {
1720 { {0x86, 0xD1, 0xBC, 0x80, 0xBB, 0xE5, 0x00} },/* ; 00 (x350) */ 1708 { {0x86, 0xD1, 0xBC, 0x80, 0xBB, 0xE5, 0x00} },/* ; 00 (x350) */
1721 { {0xB8, 0x1F, 0x90, 0x84, 0x8F, 0xB9, 0x30} },/* ; 01 (x400) */ 1709 { {0xB8, 0x1F, 0x90, 0x84, 0x8F, 0xB9, 0x30} },/* ; 01 (x400) */
1722 { {0x08, 0x3E, 0xE0, 0x84, 0xDF, 0x09, 0x00} },/* ; 02 (x480) */ 1710 { {0x08, 0x3E, 0xE0, 0x84, 0xDF, 0x09, 0x00} },/* ; 02 (x480) */
@@ -1725,7 +1713,7 @@ static struct XGI_LVDSCRT1VDataStruct XGI_LVDSCRT11280x1024_1_Vx75[] = {
1725 { {0x28, 0x5A, 0x13, 0x87, 0xFF, 0x29, 0xA9} } /* ; 05 (x1024) */ 1713 { {0x28, 0x5A, 0x13, 0x87, 0xFF, 0x29, 0xA9} } /* ; 05 (x1024) */
1726}; 1714};
1727/* CR00,CR02,CR03,CR04,CR05,SR0B,SR0C,SR0E */ 1715/* CR00,CR02,CR03,CR04,CR05,SR0B,SR0C,SR0E */
1728static struct XGI_LVDSCRT1HDataStruct XGI_LVDSCRT11280x1024_2_Hx75[] = { 1716static const struct XGI_LVDSCRT1HDataStruct XGI_LVDSCRT11280x1024_2_Hx75[] = {
1729 { {0x7E, 0x3B, 0x9A, 0x44, 0x12, 0x00, 0x01, 0x00} },/* ; 00 (320x) */ 1717 { {0x7E, 0x3B, 0x9A, 0x44, 0x12, 0x00, 0x01, 0x00} },/* ; 00 (320x) */
1730 { {0x7E, 0x3B, 0x9A, 0x44, 0x12, 0x00, 0x01, 0x00} },/* ; 01 (360x) */ 1718 { {0x7E, 0x3B, 0x9A, 0x44, 0x12, 0x00, 0x01, 0x00} },/* ; 01 (360x) */
1731 { {0x7E, 0x40, 0x84, 0x49, 0x91, 0x00, 0x01, 0x00} },/* ; 02 (400x) */ 1719 { {0x7E, 0x40, 0x84, 0x49, 0x91, 0x00, 0x01, 0x00} },/* ; 02 (400x) */
@@ -1738,7 +1726,7 @@ static struct XGI_LVDSCRT1HDataStruct XGI_LVDSCRT11280x1024_2_Hx75[] = {
1738}; 1726};
1739 1727
1740/* CR06,CR07,CR10,CR11,CR15,CR16,SR0A */ 1728/* CR06,CR07,CR10,CR11,CR15,CR16,SR0A */
1741static struct XGI_LVDSCRT1VDataStruct XGI_LVDSCRT11280x1024_2_Vx75[] = { 1729static const struct XGI_LVDSCRT1VDataStruct XGI_LVDSCRT11280x1024_2_Vx75[] = {
1742 { {0x28, 0xD2, 0xAF, 0x83, 0xAE, 0xD8, 0xA1} },/* ; 00 (x350) */ 1730 { {0x28, 0xD2, 0xAF, 0x83, 0xAE, 0xD8, 0xA1} },/* ; 00 (x350) */
1743 { {0x28, 0xD2, 0xC8, 0x8C, 0xC7, 0xF2, 0x81} },/* ; 01 (x400) */ 1731 { {0x28, 0xD2, 0xC8, 0x8C, 0xC7, 0xF2, 0x81} },/* ; 01 (x400) */
1744 { {0x28, 0xD2, 0xF0, 0x84, 0xEF, 0x1A, 0xB1} },/* ; 02 (x480) */ 1732 { {0x28, 0xD2, 0xF0, 0x84, 0xEF, 0x1A, 0xB1} },/* ; 02 (x480) */
@@ -1748,115 +1736,141 @@ static struct XGI_LVDSCRT1VDataStruct XGI_LVDSCRT11280x1024_2_Vx75[] = {
1748}; 1736};
1749 1737
1750/*add for new UNIVGABIOS*/ 1738/*add for new UNIVGABIOS*/
1751static struct XGI330_LCDDataTablStruct XGI_LCDDataTable[] = { 1739static const struct XGI330_LCDDataTablStruct XGI_LCDDataTable[] = {
1752 {Panel_1024x768, 0x0019, 0x0001, 0}, /* XGI_ExtLCD1024x768Data */ 1740 {Panel_1024x768, 0x0019, 0x0001, XGI_ExtLCD1024x768Data },
1753 {Panel_1024x768, 0x0019, 0x0000, 1}, /* XGI_StLCD1024x768Data */ 1741 {Panel_1024x768, 0x0019, 0x0000, XGI_StLCD1024x768Data },
1754 {Panel_1024x768, 0x0018, 0x0010, 2}, /* XGI_CetLCD1024x768Data */ 1742 {Panel_1024x768, 0x0018, 0x0010, XGI_CetLCD1024x768Data },
1755 {Panel_1280x1024, 0x0019, 0x0001, 3}, /* XGI_ExtLCD1280x1024Data */ 1743 {Panel_1280x1024, 0x0019, 0x0001, XGI_ExtLCD1280x1024Data },
1756 {Panel_1280x1024, 0x0019, 0x0000, 4}, /* XGI_StLCD1280x1024Data */ 1744 {Panel_1280x1024, 0x0019, 0x0000, XGI_StLCD1280x1024Data },
1757 {Panel_1280x1024, 0x0018, 0x0010, 5}, /* XGI_CetLCD1280x1024Data */ 1745 {Panel_1280x1024, 0x0018, 0x0010, XGI_CetLCD1280x1024Data },
1758 {Panel_1400x1050, 0x0019, 0x0001, 6}, /* XGI_ExtLCD1400x1050Data */ 1746 {Panel_1400x1050, 0x0019, 0x0001, xgifb_lcd_1400x1050 },
1759 {Panel_1400x1050, 0x0019, 0x0000, 7}, /* XGI_StLCD1400x1050Data */ 1747 {Panel_1400x1050, 0x0019, 0x0000, xgifb_lcd_1400x1050 },
1760 {Panel_1400x1050, 0x0018, 0x0010, 8}, /* XGI_CetLCD1400x1050Data */ 1748 {Panel_1400x1050, 0x0018, 0x0010, XGI_CetLCD1400x1050Data },
1761 {Panel_1600x1200, 0x0019, 0x0001, 9}, /* XGI_ExtLCD1600x1200Data */ 1749 {Panel_1600x1200, 0x0019, 0x0001, XGI_ExtLCD1600x1200Data },
1762 {Panel_1600x1200, 0x0019, 0x0000, 10}, /* XGI_StLCD1600x1200Data */ 1750 {Panel_1600x1200, 0x0019, 0x0000, XGI_StLCD1600x1200Data },
1763 {PanelRef60Hz, 0x0008, 0x0008, 11}, /* XGI_NoScalingData */ 1751 {PanelRef60Hz, 0x0008, 0x0008, XGI_NoScalingData },
1764 {Panel_1024x768x75, 0x0019, 0x0001, 12}, /* XGI_ExtLCD1024x768x75Data */ 1752 {Panel_1024x768x75, 0x0019, 0x0001, XGI_ExtLCD1024x768x75Data },
1765 {Panel_1024x768x75, 0x0019, 0x0000, 13}, /* XGI_StLCD1024x768x75Data */ 1753 {Panel_1024x768x75, 0x0019, 0x0000, XGI_ExtLCD1024x768x75Data },
1766 {Panel_1024x768x75, 0x0018, 0x0010, 14}, /* XGI_CetLCD1024x768x75Data */ 1754 {Panel_1024x768x75, 0x0018, 0x0010, XGI_CetLCD1024x768x75Data },
1767 /* XGI_ExtLCD1280x1024x75Data */ 1755 {Panel_1280x1024x75, 0x0019, 0x0001, xgifb_lcd_1280x1024x75 },
1768 {Panel_1280x1024x75, 0x0019, 0x0001, 15}, 1756 {Panel_1280x1024x75, 0x0019, 0x0000, xgifb_lcd_1280x1024x75 },
1769 /* XGI_StLCD1280x1024x75Data */ 1757 {Panel_1280x1024x75, 0x0018, 0x0010, XGI_CetLCD1280x1024x75Data },
1770 {Panel_1280x1024x75, 0x0019, 0x0000, 16}, 1758 {PanelRef75Hz, 0x0008, 0x0008, XGI_NoScalingDatax75 },
1771 /* XGI_CetLCD1280x1024x75Data */ 1759 {0xFF, 0x0000, 0x0000, NULL } /* End of table */
1772 {Panel_1280x1024x75, 0x0018, 0x0010, 17}, 1760};
1773 {PanelRef75Hz, 0x0008, 0x0008, 18}, /* XGI_NoScalingDatax75 */ 1761
1774 {0xFF, 0x0000, 0x0000, 0} /* End of table */ 1762static const struct XGI330_LCDDataTablStruct XGI_LCDDesDataTable[] = {
1775}; 1763 {Panel_1024x768, 0x0019, 0x0001, XGI_ExtLCDDes1024x768Data },
1776 1764 {Panel_1024x768, 0x0019, 0x0000, XGI_StLCDDes1024x768Data },
1777static struct XGI330_LCDDataTablStruct XGI_LCDDesDataTable[] = { 1765 {Panel_1024x768, 0x0018, 0x0010, XGI_CetLCDDes1024x768Data },
1778 {Panel_1024x768, 0x0019, 0x0001, 0}, /* XGI_ExtLCDDes1024x768Data */ 1766 {Panel_1280x1024, 0x0019, 0x0001, XGI_ExtLCDDes1280x1024Data },
1779 {Panel_1024x768, 0x0019, 0x0000, 1}, /* XGI_StLCDDes1024x768Data */ 1767 {Panel_1280x1024, 0x0019, 0x0000, XGI_StLCDDes1280x1024Data },
1780 {Panel_1024x768, 0x0018, 0x0010, 2}, /* XGI_CetLCDDes1024x768Data */ 1768 {Panel_1280x1024, 0x0018, 0x0010, XGI_CetLCDDes1280x1024Data },
1781 {Panel_1280x1024, 0x0019, 0x0001, 3}, /* XGI_ExtLCDDes1280x1024Data */ 1769 {Panel_1400x1050, 0x0019, 0x0001, xgifb_lcddes_1400x1050 },
1782 {Panel_1280x1024, 0x0019, 0x0000, 4}, /* XGI_StLCDDes1280x1024Data */ 1770 {Panel_1400x1050, 0x0019, 0x0000, xgifb_lcddes_1400x1050 },
1783 {Panel_1280x1024, 0x0018, 0x0010, 5}, /* XGI_CetLCDDes1280x1024Data */ 1771 {Panel_1400x1050, 0x0418, 0x0010, XGI_CetLCDDes1400x1050Data },
1784 {Panel_1400x1050, 0x0019, 0x0001, 6}, /* XGI_ExtLCDDes1400x1050Data */ 1772 {Panel_1400x1050, 0x0418, 0x0410, XGI_CetLCDDes1400x1050Data2 },
1785 {Panel_1400x1050, 0x0019, 0x0000, 7}, /* XGI_StLCDDes1400x1050Data */ 1773 {Panel_1600x1200, 0x0019, 0x0001, XGI_ExtLCDDes1600x1200Data },
1786 {Panel_1400x1050, 0x0418, 0x0010, 8}, /* XGI_CetLCDDes1400x1050Data */ 1774 {Panel_1600x1200, 0x0019, 0x0000, XGI_StLCDDes1600x1200Data },
1787 {Panel_1400x1050, 0x0418, 0x0410, 9}, /* XGI_CetLCDDes1400x1050Data2 */ 1775 {PanelRef60Hz, 0x0008, 0x0008, XGI_NoScalingDesData },
1788 {Panel_1600x1200, 0x0019, 0x0001, 10}, /* XGI_ExtLCDDes1600x1200Data */ 1776 {Panel_1024x768x75, 0x0019, 0x0001, xgifb_lcddes_1024x768x75 },
1789 {Panel_1600x1200, 0x0019, 0x0000, 11}, /* XGI_StLCDDes1600x1200Data */ 1777 {Panel_1024x768x75, 0x0019, 0x0000, xgifb_lcddes_1024x768x75 },
1790 {PanelRef60Hz, 0x0008, 0x0008, 12}, /* XGI_NoScalingDesData */ 1778 {Panel_1024x768x75, 0x0018, 0x0010, XGI_CetLCDDes1024x768x75Data },
1791 /* XGI_ExtLCDDes1024x768x75Data */ 1779 {Panel_1280x1024x75, 0x0019, 0x0001, xgifb_lcddes_1280x1024x75 },
1792 {Panel_1024x768x75, 0x0019, 0x0001, 13}, 1780 {Panel_1280x1024x75, 0x0019, 0x0000, xgifb_lcddes_1280x1024x75 },
1793 /* XGI_StLCDDes1024x768x75Data */ 1781 {Panel_1280x1024x75, 0x0018, 0x0010, XGI_CetLCDDes1280x1024x75Data },
1794 {Panel_1024x768x75, 0x0019, 0x0000, 14}, 1782 {PanelRef75Hz, 0x0008, 0x0008, XGI_NoScalingDesDatax75 },
1795 /* XGI_CetLCDDes1024x768x75Data */ 1783 {0xFF, 0x0000, 0x0000, NULL }
1796 {Panel_1024x768x75, 0x0018, 0x0010, 15}, 1784};
1797 /* XGI_ExtLCDDes1280x1024x75Data */ 1785
1798 {Panel_1280x1024x75, 0x0019, 0x0001, 16}, 1786static const struct XGI330_LCDDataTablStruct xgifb_lcddldes[] = {
1799 /* XGI_StLCDDes1280x1024x75Data */ 1787 {Panel_1024x768, 0x0019, 0x0001, XGI_ExtLCDDes1024x768Data },
1800 {Panel_1280x1024x75, 0x0019, 0x0000, 17}, 1788 {Panel_1024x768, 0x0019, 0x0000, XGI_StLCDDes1024x768Data },
1801 /* XGI_CetLCDDes1280x1024x75Data */ 1789 {Panel_1024x768, 0x0018, 0x0010, XGI_CetLCDDes1024x768Data },
1802 {Panel_1280x1024x75, 0x0018, 0x0010, 18}, 1790 {Panel_1280x1024, 0x0019, 0x0001, XGI_ExtLCDDLDes1280x1024Data },
1803 {PanelRef75Hz, 0x0008, 0x0008, 19}, /* XGI_NoScalingDesDatax75 */ 1791 {Panel_1280x1024, 0x0019, 0x0000, XGI_StLCDDLDes1280x1024Data },
1804 {0xFF, 0x0000, 0x0000, 0} 1792 {Panel_1280x1024, 0x0018, 0x0010, XGI_CetLCDDLDes1280x1024Data },
1805}; 1793 {Panel_1400x1050, 0x0019, 0x0001, xgifb_lcddldes_1400x1050 },
1806 1794 {Panel_1400x1050, 0x0019, 0x0000, xgifb_lcddldes_1400x1050 },
1807static struct XGI330_LCDDataTablStruct xgifb_epllcd_crt1[] = { 1795 {Panel_1400x1050, 0x0418, 0x0010, XGI_CetLCDDes1400x1050Data },
1808 {Panel_1024x768, 0x0018, 0x0000, 0}, /* XGI_LVDSCRT11024x768_1 */ 1796 {Panel_1400x1050, 0x0418, 0x0410, XGI_CetLCDDes1400x1050Data2 },
1809 {Panel_1024x768, 0x0018, 0x0010, 1}, /* XGI_LVDSCRT11024x768_2 */ 1797 {Panel_1600x1200, 0x0019, 0x0001, XGI_ExtLCDDLDes1600x1200Data },
1810 {Panel_1280x1024, 0x0018, 0x0000, 2}, /* XGI_LVDSCRT11280x1024_1 */ 1798 {Panel_1600x1200, 0x0019, 0x0000, XGI_StLCDDLDes1600x1200Data },
1811 {Panel_1280x1024, 0x0018, 0x0010, 3}, /* XGI_LVDSCRT11280x1024_2 */ 1799 {PanelRef60Hz, 0x0008, 0x0008, XGI_NoScalingDesData },
1812 {Panel_1400x1050, 0x0018, 0x0000, 4}, /* XGI_LVDSCRT11400x1050_1 */ 1800 {Panel_1024x768x75, 0x0019, 0x0001, xgifb_lcddes_1024x768x75 },
1813 {Panel_1400x1050, 0x0018, 0x0010, 5}, /* XGI_LVDSCRT11400x1050_2 */ 1801 {Panel_1024x768x75, 0x0019, 0x0000, xgifb_lcddes_1024x768x75 },
1814 {Panel_1600x1200, 0x0018, 0x0000, 6}, /* XGI_LVDSCRT11600x1200_1 */ 1802 {Panel_1024x768x75, 0x0018, 0x0010, XGI_CetLCDDes1024x768x75Data },
1815 {Panel_1024x768x75, 0x0018, 0x0000, 7}, /* XGI_LVDSCRT11024x768_1x75 */ 1803 {Panel_1280x1024x75, 0x0019, 0x0001, xgifb_lcddldes_1280x1024x75 },
1816 {Panel_1024x768x75, 0x0018, 0x0010, 8}, /* XGI_LVDSCRT11024x768_2x75 */ 1804 {Panel_1280x1024x75, 0x0019, 0x0000, xgifb_lcddldes_1280x1024x75 },
1817 {Panel_1280x1024x75, 0x0018, 0x0000, 9}, /*XGI_LVDSCRT11280x1024_1x75*/ 1805 {Panel_1280x1024x75, 0x0018, 0x0010, XGI_CetLCDDLDes1280x1024x75Data },
1818 {Panel_1280x1024x75, 0x0018, 0x0010, 10},/*XGI_LVDSCRT11280x1024_2x75*/ 1806 {PanelRef75Hz, 0x0008, 0x0008, XGI_NoScalingDesDatax75 },
1819 {0xFF, 0x0000, 0x0000, 0} 1807 {0xFF, 0x0000, 0x0000, NULL }
1820}; 1808};
1821 1809
1822static struct XGI330_LCDDataTablStruct XGI_EPLLCDDataPtr[] = { 1810static const struct XGI330_LCDDataTablStruct xgifb_epllcd_crt1_h[] = {
1823 {Panel_1024x768, 0x0018, 0x0000, 0}, /* XGI_LVDS1024x768Data_1 */ 1811 {Panel_1024x768, 0x0018, 0x0000, XGI_LVDSCRT11024x768_1_H },
1824 {Panel_1024x768, 0x0018, 0x0010, 1}, /* XGI_LVDS1024x768Data_2 */ 1812 {Panel_1024x768, 0x0018, 0x0010, XGI_LVDSCRT11024x768_2_H },
1825 {Panel_1280x1024, 0x0018, 0x0000, 2}, /* XGI_LVDS1280x1024Data_1 */ 1813 {Panel_1280x1024, 0x0018, 0x0000, XGI_LVDSCRT11280x1024_1_H },
1826 {Panel_1280x1024, 0x0018, 0x0010, 3}, /* XGI_LVDS1280x1024Data_2 */ 1814 {Panel_1280x1024, 0x0018, 0x0010, XGI_LVDSCRT11280x1024_2_H },
1827 {Panel_1400x1050, 0x0018, 0x0000, 4}, /* XGI_LVDS1400x1050Data_1 */ 1815 {Panel_1400x1050, 0x0018, 0x0000, XGI_LVDSCRT11400x1050_1_H },
1828 {Panel_1400x1050, 0x0018, 0x0010, 5}, /* XGI_LVDS1400x1050Data_2 */ 1816 {Panel_1400x1050, 0x0018, 0x0010, XGI_LVDSCRT11400x1050_2_H },
1829 {Panel_1600x1200, 0x0018, 0x0000, 6}, /* XGI_LVDS1600x1200Data_1 */ 1817 {Panel_1600x1200, 0x0018, 0x0000, XGI_LVDSCRT11600x1200_1_H },
1830 {PanelRef60Hz, 0x0008, 0x0008, 7}, /* XGI_LVDSNoScalingData */ 1818 {Panel_1024x768x75, 0x0018, 0x0000, XGI_LVDSCRT11024x768_1_Hx75 },
1831 {Panel_1024x768x75, 0x0018, 0x0000, 8}, /* XGI_LVDS1024x768Data_1x75 */ 1819 {Panel_1024x768x75, 0x0018, 0x0010, XGI_LVDSCRT11024x768_2_Hx75 },
1832 {Panel_1024x768x75, 0x0018, 0x0010, 9}, /* XGI_LVDS1024x768Data_2x75 */ 1820 {Panel_1280x1024x75, 0x0018, 0x0000, XGI_LVDSCRT11280x1024_1_Hx75 },
1833 /* XGI_LVDS1280x1024Data_1x75 */ 1821 {Panel_1280x1024x75, 0x0018, 0x0010, XGI_LVDSCRT11280x1024_2_Hx75 },
1834 {Panel_1280x1024x75, 0x0018, 0x0000, 10}, 1822 {0xFF, 0x0000, 0x0000, NULL }
1835 /* XGI_LVDS1280x1024Data_2x75 */ 1823};
1836 {Panel_1280x1024x75, 0x0018, 0x0010, 11}, 1824
1837 {PanelRef75Hz, 0x0008, 0x0008, 12}, /* XGI_LVDSNoScalingDatax75 */ 1825static const struct XGI330_LCDDataTablStruct xgifb_epllcd_crt1_v[] = {
1838 {0xFF, 0x0000, 0x0000, 0} 1826 {Panel_1024x768, 0x0018, 0x0000, XGI_LVDSCRT11024x768_1_V },
1839}; 1827 {Panel_1024x768, 0x0018, 0x0010, XGI_LVDSCRT11024x768_2_V },
1840 1828 {Panel_1280x1024, 0x0018, 0x0000, XGI_LVDSCRT11280x1024_1_V },
1841static struct XGI330_LCDDataTablStruct XGI_EPLLCDDesDataPtr[] = { 1829 {Panel_1280x1024, 0x0018, 0x0010, XGI_LVDSCRT11280x1024_2_V },
1842 {Panel_1024x768, 0x0018, 0x0000, 0}, /* XGI_LVDS1024x768Des_1 */ 1830 {Panel_1400x1050, 0x0018, 0x0000, XGI_LVDSCRT11400x1050_1_V },
1843 {Panel_1024x768, 0x0618, 0x0410, 1}, /* XGI_LVDS1024x768Des_3 */ 1831 {Panel_1400x1050, 0x0018, 0x0010, XGI_LVDSCRT11400x1050_2_V },
1844 {Panel_1024x768, 0x0018, 0x0010, 2}, /* XGI_LVDS1024x768Des_2 */ 1832 {Panel_1600x1200, 0x0018, 0x0000, XGI_LVDSCRT11600x1200_1_V },
1845 {Panel_1280x1024, 0x0018, 0x0000, 3}, /* XGI_LVDS1280x1024Des_1 */ 1833 {Panel_1024x768x75, 0x0018, 0x0000, XGI_LVDSCRT11024x768_1_Vx75 },
1846 {Panel_1280x1024, 0x0018, 0x0010, 4}, /* XGI_LVDS1280x1024Des_2 */ 1834 {Panel_1024x768x75, 0x0018, 0x0010, XGI_LVDSCRT11024x768_2_Vx75 },
1847 {Panel_1400x1050, 0x0018, 0x0000, 5}, /* XGI_LVDS1400x1050Des_1 */ 1835 {Panel_1280x1024x75, 0x0018, 0x0000, XGI_LVDSCRT11280x1024_1_Vx75 },
1848 {Panel_1400x1050, 0x0018, 0x0010, 6}, /* XGI_LVDS1400x1050Des_2 */ 1836 {Panel_1280x1024x75, 0x0018, 0x0010, XGI_LVDSCRT11280x1024_2_Vx75 },
1849 {Panel_1600x1200, 0x0018, 0x0000, 7}, /* XGI_LVDS1600x1200Des_1 */ 1837 {0xFF, 0x0000, 0x0000, NULL }
1850 {PanelRef60Hz, 0x0008, 0x0008, 8}, /* XGI_LVDSNoScalingDesData */ 1838};
1851 {Panel_1024x768x75, 0x0018, 0x0000, 9}, /* XGI_LVDS1024x768Des_1x75 */ 1839
1852 {Panel_1024x768x75, 0x0618, 0x0410, 10}, /* XGI_LVDS1024x768Des_3x75 */ 1840static const struct XGI330_LCDDataTablStruct XGI_EPLLCDDataPtr[] = {
1853 {Panel_1024x768x75, 0x0018, 0x0010, 11}, /* XGI_LVDS1024x768Des_2x75 */ 1841 {Panel_1024x768, 0x0018, 0x0000, XGI_LVDS1024x768Data_1 },
1854 /* XGI_LVDS1280x1024Des_1x75 */ 1842 {Panel_1024x768, 0x0018, 0x0010, XGI_LVDS1024x768Data_2 },
1855 {Panel_1280x1024x75, 0x0018, 0x0000, 12}, 1843 {Panel_1280x1024, 0x0018, 0x0000, XGI_LVDS1280x1024Data_1 },
1856 /* XGI_LVDS1280x1024Des_2x75 */ 1844 {Panel_1280x1024, 0x0018, 0x0010, XGI_LVDS1280x1024Data_2 },
1857 {Panel_1280x1024x75, 0x0018, 0x0010, 13}, 1845 {Panel_1400x1050, 0x0018, 0x0000, XGI_LVDS1400x1050Data_1 },
1858 {PanelRef75Hz, 0x0008, 0x0008, 14}, /* XGI_LVDSNoScalingDesDatax75 */ 1846 {Panel_1400x1050, 0x0018, 0x0010, XGI_LVDS1400x1050Data_2 },
1859 {0xFF, 0x0000, 0x0000, 0} 1847 {Panel_1600x1200, 0x0018, 0x0000, XGI_LVDS1600x1200Data_1 },
1848 {PanelRef60Hz, 0x0008, 0x0008, XGI_LVDSNoScalingData },
1849 {Panel_1024x768x75, 0x0018, 0x0000, XGI_LVDS1024x768Data_1x75 },
1850 {Panel_1024x768x75, 0x0018, 0x0010, XGI_LVDS1024x768Data_2x75 },
1851 {Panel_1280x1024x75, 0x0018, 0x0000, XGI_LVDS1280x1024Data_1x75 },
1852 {Panel_1280x1024x75, 0x0018, 0x0010, XGI_LVDS1280x1024Data_2x75 },
1853 {PanelRef75Hz, 0x0008, 0x0008, XGI_LVDSNoScalingDatax75 },
1854 {0xFF, 0x0000, 0x0000, NULL }
1855};
1856
1857static const struct XGI330_LCDDataTablStruct XGI_EPLLCDDesDataPtr[] = {
1858 {Panel_1024x768, 0x0018, 0x0000, XGI_LVDS1024x768Des_1 },
1859 {Panel_1024x768, 0x0618, 0x0410, XGI_LVDS1024x768Des_3 },
1860 {Panel_1024x768, 0x0018, 0x0010, XGI_LVDS1024x768Des_2 },
1861 {Panel_1280x1024, 0x0018, 0x0000, XGI_LVDS1280x1024Des_1 },
1862 {Panel_1280x1024, 0x0018, 0x0010, XGI_LVDS1280x1024Des_2 },
1863 {Panel_1400x1050, 0x0018, 0x0000, XGI_LVDS1400x1050Des_1 },
1864 {Panel_1400x1050, 0x0018, 0x0010, XGI_LVDS1400x1050Des_2 },
1865 {Panel_1600x1200, 0x0018, 0x0000, XGI_LVDS1600x1200Des_1 },
1866 {PanelRef60Hz, 0x0008, 0x0008, XGI_LVDSNoScalingDesData },
1867 {Panel_1024x768x75, 0x0018, 0x0000, XGI_LVDS1024x768Des_1x75 },
1868 {Panel_1024x768x75, 0x0618, 0x0410, XGI_LVDS1024x768Des_3x75 },
1869 {Panel_1024x768x75, 0x0018, 0x0010, XGI_LVDS1024x768Des_2x75 },
1870 {Panel_1280x1024x75, 0x0018, 0x0000, XGI_LVDS1280x1024Des_1x75 },
1871 {Panel_1280x1024x75, 0x0018, 0x0010, XGI_LVDS1280x1024Des_2x75 },
1872 {PanelRef75Hz, 0x0008, 0x0008, XGI_LVDSNoScalingDesDatax75 },
1873 {0xFF, 0x0000, 0x0000, NULL }
1860}; 1874};
1861 1875
1862static const struct XGI330_TVDataTablStruct XGI_TVDataTable[] = { 1876static const struct XGI330_TVDataTablStruct XGI_TVDataTable[] = {
@@ -1877,7 +1891,7 @@ static const struct XGI330_TVDataTablStruct XGI_TVDataTable[] = {
1877}; 1891};
1878 1892
1879/* Dual link only */ 1893/* Dual link only */
1880static struct XGI330_LCDCapStruct XGI_LCDDLCapList[] = { 1894static const struct XGI330_LCDCapStruct XGI_LCDDLCapList[] = {
1881/* LCDCap1024x768 */ 1895/* LCDCap1024x768 */
1882 {Panel_1024x768, DefaultLCDCap, 0, 0x88, 0x06, VCLK65_315, 1896 {Panel_1024x768, DefaultLCDCap, 0, 0x88, 0x06, VCLK65_315,
1883 0x6C, 0xC3, 0x35, 0x62, 0x02, 0x14, 0x0A, 0x02, 0x00, 1897 0x6C, 0xC3, 0x35, 0x62, 0x02, 0x14, 0x0A, 0x02, 0x00,
@@ -1912,7 +1926,7 @@ static struct XGI330_LCDCapStruct XGI_LCDDLCapList[] = {
1912 0x30, 0x10, 0x5A, 0x10, 0x10, 0x0A, 0xC0, 0x28, 0x10} 1926 0x30, 0x10, 0x5A, 0x10, 0x10, 0x0A, 0xC0, 0x28, 0x10}
1913}; 1927};
1914 1928
1915static struct XGI330_LCDCapStruct XGI_LCDCapList[] = { 1929static const struct XGI330_LCDCapStruct XGI_LCDCapList[] = {
1916/* LCDCap1024x768 */ 1930/* LCDCap1024x768 */
1917 {Panel_1024x768, DefaultLCDCap, 0, 0x88, 0x06, VCLK65_315, 1931 {Panel_1024x768, DefaultLCDCap, 0, 0x88, 0x06, VCLK65_315,
1918 0x6C, 0xC3, 0x35, 0x62, 0x02, 0x14, 0x0A, 0x02, 0x00, 1932 0x6C, 0xC3, 0x35, 0x62, 0x02, 0x14, 0x0A, 0x02, 0x00,
@@ -1947,7 +1961,7 @@ static struct XGI330_LCDCapStruct XGI_LCDCapList[] = {
1947 0x30, 0x10, 0x5A, 0x10, 0x10, 0x0A, 0xC0, 0x28, 0x10} 1961 0x30, 0x10, 0x5A, 0x10, 0x10, 0x0A, 0xC0, 0x28, 0x10}
1948}; 1962};
1949 1963
1950static struct XGI_Ext2Struct XGI330_RefIndex[] = { 1964const struct XGI_Ext2Struct XGI330_RefIndex[] = {
1951 {Mode32Bpp + SupportAllCRT2 + SyncPN, RES320x200, VCLK25_175, 1965 {Mode32Bpp + SupportAllCRT2 + SyncPN, RES320x200, VCLK25_175,
1952 0x00, 0x10, 0x59, 320, 200},/* 00 */ 1966 0x00, 0x10, 0x59, 320, 200},/* 00 */
1953 {Mode32Bpp + SupportAllCRT2 + SyncPN, RES320x200, VCLK25_175, 1967 {Mode32Bpp + SupportAllCRT2 + SyncPN, RES320x200, VCLK25_175,
@@ -2101,21 +2115,13 @@ static struct XGI_Ext2Struct XGI330_RefIndex[] = {
2101 0x30, 0x47, 0x37, 1024, 768},/* 48 1024x768x160Hz */ 2115 0x30, 0x47, 0x37, 1024, 768},/* 48 1024x768x160Hz */
2102}; 2116};
2103 2117
2104static unsigned char XGI330_ScreenOffset[] = { 2118static const unsigned char XGI330_ScreenOffset[] = {
2105 0x14, 0x19, 0x20, 0x28, 0x32, 0x40, 2119 0x14, 0x19, 0x20, 0x28, 0x32, 0x40,
2106 0x50, 0x64, 0x78, 0x80, 0x2d, 0x35, 2120 0x50, 0x64, 0x78, 0x80, 0x2d, 0x35,
2107 0x57, 0x48 2121 0x57, 0x48
2108}; 2122};
2109 2123
2110static struct SiS_StResInfo_S XGI330_StResInfo[] = { 2124static const struct SiS_ModeResInfo_S XGI330_ModeResInfo[] = {
2111 {640, 400},
2112 {640, 350},
2113 {720, 400},
2114 {720, 350},
2115 {640, 480}
2116};
2117
2118static struct SiS_ModeResInfo_S XGI330_ModeResInfo[] = {
2119 { 320, 200, 8, 8}, 2125 { 320, 200, 8, 8},
2120 { 320, 240, 8, 8}, 2126 { 320, 240, 8, 8},
2121 { 320, 400, 8, 8}, 2127 { 320, 400, 8, 8},
@@ -2141,7 +2147,7 @@ static struct SiS_ModeResInfo_S XGI330_ModeResInfo[] = {
2141 {1152, 864, 8, 16} 2147 {1152, 864, 8, 16}
2142}; 2148};
2143 2149
2144static struct SiS_VCLKData XGI_VCLKData[] = { 2150const struct SiS_VCLKData XGI_VCLKData[] = {
2145 /* SR2B,SR2C,SR2D */ 2151 /* SR2B,SR2C,SR2D */
2146 {0x1B, 0xE1, 25}, /* 00 (25.175MHz) */ 2152 {0x1B, 0xE1, 25}, /* 00 (25.175MHz) */
2147 {0x4E, 0xE4, 28}, /* 01 (28.322MHz) */ 2153 {0x4E, 0xE4, 28}, /* 01 (28.322MHz) */
@@ -2234,7 +2240,7 @@ static struct SiS_VCLKData XGI_VCLKData[] = {
2234 {0xFF, 0x00, 0} /* End mark */ 2240 {0xFF, 0x00, 0} /* End mark */
2235}; 2241};
2236 2242
2237static struct SiS_VBVCLKData XGI_VBVCLKData[] = { 2243static const struct SiS_VBVCLKData XGI_VBVCLKData[] = {
2238 {0x1B, 0xE1, 25}, /* 00 (25.175MHz) */ 2244 {0x1B, 0xE1, 25}, /* 00 (25.175MHz) */
2239 {0x4E, 0xE4, 28}, /* 01 (28.322MHz) */ 2245 {0x4E, 0xE4, 28}, /* 01 (28.322MHz) */
2240 {0x57, 0xE4, 31}, /* 02 (31.500MHz) */ 2246 {0x57, 0xE4, 31}, /* 02 (31.500MHz) */
@@ -2329,7 +2335,7 @@ static struct SiS_VBVCLKData XGI_VBVCLKData[] = {
2329#define XGI301TVDelay 0x22 2335#define XGI301TVDelay 0x22
2330#define XGI301LCDDelay 0x12 2336#define XGI301LCDDelay 0x12
2331 2337
2332static unsigned char TVAntiFlickList[] = {/* NTSCAntiFlicker */ 2338static const unsigned char TVAntiFlickList[] = {/* NTSCAntiFlicker */
2333 0x04, /* ; 0 Adaptive */ 2339 0x04, /* ; 0 Adaptive */
2334 0x00, /* ; 1 new anti-flicker ? */ 2340 0x00, /* ; 1 new anti-flicker ? */
2335 2341
@@ -2341,7 +2347,7 @@ static unsigned char TVAntiFlickList[] = {/* NTSCAntiFlicker */
2341}; 2347};
2342 2348
2343 2349
2344static unsigned char TVEdgeList[] = { 2350static const unsigned char TVEdgeList[] = {
2345 0x00, /* ; 0 NTSC No Edge enhance */ 2351 0x00, /* ; 0 NTSC No Edge enhance */
2346 0x04, /* ; 1 NTSC Adaptive Edge enhance */ 2352 0x04, /* ; 1 NTSC Adaptive Edge enhance */
2347 0x00, /* ; 0 PAL No Edge enhance */ 2353 0x00, /* ; 0 PAL No Edge enhance */
@@ -2350,7 +2356,7 @@ static unsigned char TVEdgeList[] = {
2350 0x00 /* ; 1 HiTV */ 2356 0x00 /* ; 1 HiTV */
2351}; 2357};
2352 2358
2353static unsigned long TVPhaseList[] = { 2359static const unsigned long TVPhaseList[] = {
2354 0x08BAED21, /* ; 0 NTSC phase */ 2360 0x08BAED21, /* ; 0 NTSC phase */
2355 0x00E3052A, /* ; 1 PAL phase */ 2361 0x00E3052A, /* ; 1 PAL phase */
2356 0x9B2EE421, /* ; 2 PAL-M phase */ 2362 0x9B2EE421, /* ; 2 PAL-M phase */
@@ -2367,7 +2373,7 @@ static unsigned long TVPhaseList[] = {
2367 0xE00A831E /* ; D PAL-M 1024x768 */ 2373 0xE00A831E /* ; D PAL-M 1024x768 */
2368}; 2374};
2369 2375
2370static unsigned char NTSCYFilter1[] = { 2376static const unsigned char NTSCYFilter1[] = {
2371 0x00, 0xF4, 0x10, 0x38, /* 0 : 320x text mode */ 2377 0x00, 0xF4, 0x10, 0x38, /* 0 : 320x text mode */
2372 0x00, 0xF4, 0x10, 0x38, /* 1 : 360x text mode */ 2378 0x00, 0xF4, 0x10, 0x38, /* 1 : 360x text mode */
2373 0xEB, 0x04, 0x25, 0x18, /* 2 : 640x text mode */ 2379 0xEB, 0x04, 0x25, 0x18, /* 2 : 640x text mode */
@@ -2377,7 +2383,7 @@ static unsigned char NTSCYFilter1[] = {
2377 0xEB, 0x15, 0x25, 0xF6 /* 6 : 800x gra. mode */ 2383 0xEB, 0x15, 0x25, 0xF6 /* 6 : 800x gra. mode */
2378}; 2384};
2379 2385
2380static unsigned char PALYFilter1[] = { 2386static const unsigned char PALYFilter1[] = {
2381 0x00, 0xF4, 0x10, 0x38, /* 0 : 320x text mode */ 2387 0x00, 0xF4, 0x10, 0x38, /* 0 : 320x text mode */
2382 0x00, 0xF4, 0x10, 0x38, /* 1 : 360x text mode */ 2388 0x00, 0xF4, 0x10, 0x38, /* 1 : 360x text mode */
2383 0xF1, 0xF7, 0x1F, 0x32, /* 2 : 640x text mode */ 2389 0xF1, 0xF7, 0x1F, 0x32, /* 2 : 640x text mode */
@@ -2387,7 +2393,7 @@ static unsigned char PALYFilter1[] = {
2387 0xFC, 0xFB, 0x14, 0x2A /* 6 : 800x gra. mode */ 2393 0xFC, 0xFB, 0x14, 0x2A /* 6 : 800x gra. mode */
2388}; 2394};
2389 2395
2390static unsigned char xgifb_palmn_yfilter1[] = { 2396static const unsigned char xgifb_palmn_yfilter1[] = {
2391 0x00, 0xF4, 0x10, 0x38, /* 0 : 320x text mode */ 2397 0x00, 0xF4, 0x10, 0x38, /* 0 : 320x text mode */
2392 0x00, 0xF4, 0x10, 0x38, /* 1 : 360x text mode */ 2398 0x00, 0xF4, 0x10, 0x38, /* 1 : 360x text mode */
2393 0xEB, 0x04, 0x10, 0x18, /* 2 : 640x text mode */ 2399 0xEB, 0x04, 0x10, 0x18, /* 2 : 640x text mode */
@@ -2398,7 +2404,7 @@ static unsigned char xgifb_palmn_yfilter1[] = {
2398 0xFF, 0xFF, 0xFF, 0xFF /* End of Table */ 2404 0xFF, 0xFF, 0xFF, 0xFF /* End of Table */
2399}; 2405};
2400 2406
2401static unsigned char xgifb_yfilter2[] = { 2407static const unsigned char xgifb_yfilter2[] = {
2402 0xFF, 0x03, 0x02, 0xF6, 0xFC, 0x27, 0x46, /* 0 : 320x text mode */ 2408 0xFF, 0x03, 0x02, 0xF6, 0xFC, 0x27, 0x46, /* 0 : 320x text mode */
2403 0x01, 0x02, 0xFE, 0xF7, 0x03, 0x27, 0x3C, /* 1 : 360x text mode */ 2409 0x01, 0x02, 0xFE, 0xF7, 0x03, 0x27, 0x3C, /* 1 : 360x text mode */
2404 0xFF, 0x03, 0x02, 0xF6, 0xFC, 0x27, 0x46, /* 2 : 640x text mode */ 2410 0xFF, 0x03, 0x02, 0xF6, 0xFC, 0x27, 0x46, /* 2 : 640x text mode */
@@ -2409,13 +2415,13 @@ static unsigned char xgifb_yfilter2[] = {
2409 0xFF, 0xFF, 0xFC, 0x00, 0x0F, 0x22, 0x28 /* 7 : 1024xgra. mode */ 2415 0xFF, 0xFF, 0xFC, 0x00, 0x0F, 0x22, 0x28 /* 7 : 1024xgra. mode */
2410}; 2416};
2411 2417
2412static unsigned char XGI_NTSC1024AdjTime[] = { 2418static const unsigned char XGI_NTSC1024AdjTime[] = {
2413 0xa7, 0x07, 0xf2, 0x6e, 0x17, 0x8b, 0x73, 0x53, 2419 0xa7, 0x07, 0xf2, 0x6e, 0x17, 0x8b, 0x73, 0x53,
2414 0x13, 0x40, 0x34, 0xF4, 0x63, 0xBB, 0xCC, 0x7A, 2420 0x13, 0x40, 0x34, 0xF4, 0x63, 0xBB, 0xCC, 0x7A,
2415 0x58, 0xe4, 0x73, 0xd0, 0x13 2421 0x58, 0xe4, 0x73, 0xd0, 0x13
2416}; 2422};
2417 2423
2418static struct XGI301C_Tap4TimingStruct xgifb_tap4_timing[] = { 2424static const struct XGI301C_Tap4TimingStruct xgifb_tap4_timing[] = {
2419 {0, { 2425 {0, {
2420 0x00, 0x20, 0x00, 0x00, 0x7F, 0x20, 0x02, 0x7F, /* ; C0-C7 */ 2426 0x00, 0x20, 0x00, 0x00, 0x7F, 0x20, 0x02, 0x7F, /* ; C0-C7 */
2421 0x7D, 0x20, 0x04, 0x7F, 0x7D, 0x1F, 0x06, 0x7E, /* ; C8-CF */ 2427 0x7D, 0x20, 0x04, 0x7F, 0x7D, 0x1F, 0x06, 0x7E, /* ; C8-CF */
@@ -2429,7 +2435,7 @@ static struct XGI301C_Tap4TimingStruct xgifb_tap4_timing[] = {
2429 } 2435 }
2430}; 2436};
2431 2437
2432static struct XGI301C_Tap4TimingStruct PALTap4Timing[] = { 2438static const struct XGI301C_Tap4TimingStruct PALTap4Timing[] = {
2433 {600, { 2439 {600, {
2434 0x05, 0x19, 0x05, 0x7D, 0x03, 0x19, 0x06, 0x7E, /* ; C0-C7 */ 2440 0x05, 0x19, 0x05, 0x7D, 0x03, 0x19, 0x06, 0x7E, /* ; C0-C7 */
2435 0x02, 0x19, 0x08, 0x7D, 0x01, 0x18, 0x0A, 0x7D, /* ; C8-CF */ 2441 0x02, 0x19, 0x08, 0x7D, 0x01, 0x18, 0x0A, 0x7D, /* ; C8-CF */
@@ -2465,7 +2471,7 @@ static struct XGI301C_Tap4TimingStruct PALTap4Timing[] = {
2465 } 2471 }
2466}; 2472};
2467 2473
2468static struct XGI301C_Tap4TimingStruct xgifb_ntsc_525_tap4_timing[] = { 2474static const struct XGI301C_Tap4TimingStruct xgifb_ntsc_525_tap4_timing[] = {
2469 {480, { 2475 {480, {
2470 0x04, 0x1A, 0x04, 0x7E, 0x03, 0x1A, 0x06, 0x7D, /* ; C0-C7 */ 2476 0x04, 0x1A, 0x04, 0x7E, 0x03, 0x1A, 0x06, 0x7D, /* ; C0-C7 */
2471 0x01, 0x1A, 0x08, 0x7D, 0x00, 0x19, 0x0A, 0x7D, /* ; C8-CF */ 2477 0x01, 0x1A, 0x08, 0x7D, 0x00, 0x19, 0x0A, 0x7D, /* ; C8-CF */
@@ -2501,7 +2507,7 @@ static struct XGI301C_Tap4TimingStruct xgifb_ntsc_525_tap4_timing[] = {
2501 } 2507 }
2502}; 2508};
2503 2509
2504static struct XGI301C_Tap4TimingStruct YPbPr750pTap4Timing[] = { 2510static const struct XGI301C_Tap4TimingStruct YPbPr750pTap4Timing[] = {
2505 {0xFFFF, { 2511 {0xFFFF, {
2506 0x05, 0x19, 0x05, 0x7D, 0x03, 0x19, 0x06, 0x7E, /* ; C0-C7 */ 2512 0x05, 0x19, 0x05, 0x7D, 0x03, 0x19, 0x06, 0x7E, /* ; C0-C7 */
2507 0x02, 0x19, 0x08, 0x7D, 0x01, 0x18, 0x0A, 0x7D, /* ; C8-CF */ 2513 0x02, 0x19, 0x08, 0x7D, 0x01, 0x18, 0x0A, 0x7D, /* ; C8-CF */
diff --git a/drivers/staging/zram/zram_drv.c b/drivers/staging/zram/zram_drv.c
index 6edefde23722..fb4a7c94aed3 100644
--- a/drivers/staging/zram/zram_drv.c
+++ b/drivers/staging/zram/zram_drv.c
@@ -183,62 +183,25 @@ static inline int is_partial_io(struct bio_vec *bvec)
183 return bvec->bv_len != PAGE_SIZE; 183 return bvec->bv_len != PAGE_SIZE;
184} 184}
185 185
186static int zram_bvec_read(struct zram *zram, struct bio_vec *bvec, 186static int zram_decompress_page(struct zram *zram, char *mem, u32 index)
187 u32 index, int offset, struct bio *bio)
188{ 187{
189 int ret; 188 int ret = LZO_E_OK;
190 size_t clen; 189 size_t clen = PAGE_SIZE;
191 struct page *page; 190 unsigned char *cmem;
192 unsigned char *user_mem, *cmem, *uncmem = NULL; 191 unsigned long handle = zram->table[index].handle;
193
194 page = bvec->bv_page;
195
196 if (zram_test_flag(zram, index, ZRAM_ZERO)) {
197 handle_zero_page(bvec);
198 return 0;
199 }
200 192
201 /* Requested page is not present in compressed area */ 193 if (!handle || zram_test_flag(zram, index, ZRAM_ZERO)) {
202 if (unlikely(!zram->table[index].handle)) { 194 memset(mem, 0, PAGE_SIZE);
203 pr_debug("Read before write: sector=%lu, size=%u",
204 (ulong)(bio->bi_sector), bio->bi_size);
205 handle_zero_page(bvec);
206 return 0; 195 return 0;
207 } 196 }
208 197
209 if (is_partial_io(bvec)) { 198 cmem = zs_map_object(zram->mem_pool, handle, ZS_MM_RO);
210 /* Use a temporary buffer to decompress the page */ 199 if (zram->table[index].size == PAGE_SIZE)
211 uncmem = kmalloc(PAGE_SIZE, GFP_KERNEL); 200 memcpy(mem, cmem, PAGE_SIZE);
212 if (!uncmem) { 201 else
213 pr_info("Error allocating temp memory!\n");
214 return -ENOMEM;
215 }
216 }
217
218 user_mem = kmap_atomic(page);
219 if (!is_partial_io(bvec))
220 uncmem = user_mem;
221 clen = PAGE_SIZE;
222
223 cmem = zs_map_object(zram->mem_pool, zram->table[index].handle,
224 ZS_MM_RO);
225
226 if (zram->table[index].size == PAGE_SIZE) {
227 memcpy(uncmem, cmem, PAGE_SIZE);
228 ret = LZO_E_OK;
229 } else {
230 ret = lzo1x_decompress_safe(cmem, zram->table[index].size, 202 ret = lzo1x_decompress_safe(cmem, zram->table[index].size,
231 uncmem, &clen); 203 mem, &clen);
232 } 204 zs_unmap_object(zram->mem_pool, handle);
233
234 if (is_partial_io(bvec)) {
235 memcpy(user_mem + bvec->bv_offset, uncmem + offset,
236 bvec->bv_len);
237 kfree(uncmem);
238 }
239
240 zs_unmap_object(zram->mem_pool, zram->table[index].handle);
241 kunmap_atomic(user_mem);
242 205
243 /* Should NEVER happen. Return bio error if it does. */ 206 /* Should NEVER happen. Return bio error if it does. */
244 if (unlikely(ret != LZO_E_OK)) { 207 if (unlikely(ret != LZO_E_OK)) {
@@ -247,36 +210,56 @@ static int zram_bvec_read(struct zram *zram, struct bio_vec *bvec,
247 return ret; 210 return ret;
248 } 211 }
249 212
250 flush_dcache_page(page);
251
252 return 0; 213 return 0;
253} 214}
254 215
255static int zram_read_before_write(struct zram *zram, char *mem, u32 index) 216static int zram_bvec_read(struct zram *zram, struct bio_vec *bvec,
217 u32 index, int offset, struct bio *bio)
256{ 218{
257 int ret; 219 int ret;
258 size_t clen = PAGE_SIZE; 220 struct page *page;
259 unsigned char *cmem; 221 unsigned char *user_mem, *uncmem = NULL;
260 unsigned long handle = zram->table[index].handle;
261 222
262 if (zram_test_flag(zram, index, ZRAM_ZERO) || !handle) { 223 page = bvec->bv_page;
263 memset(mem, 0, PAGE_SIZE); 224
225 if (unlikely(!zram->table[index].handle) ||
226 zram_test_flag(zram, index, ZRAM_ZERO)) {
227 handle_zero_page(bvec);
264 return 0; 228 return 0;
265 } 229 }
266 230
267 cmem = zs_map_object(zram->mem_pool, handle, ZS_MM_RO); 231 user_mem = kmap_atomic(page);
268 ret = lzo1x_decompress_safe(cmem, zram->table[index].size, 232 if (is_partial_io(bvec))
269 mem, &clen); 233 /* Use a temporary buffer to decompress the page */
270 zs_unmap_object(zram->mem_pool, handle); 234 uncmem = kmalloc(PAGE_SIZE, GFP_KERNEL);
235 else
236 uncmem = user_mem;
271 237
238 if (!uncmem) {
239 pr_info("Unable to allocate temp memory\n");
240 ret = -ENOMEM;
241 goto out_cleanup;
242 }
243
244 ret = zram_decompress_page(zram, uncmem, index);
272 /* Should NEVER happen. Return bio error if it does. */ 245 /* Should NEVER happen. Return bio error if it does. */
273 if (unlikely(ret != LZO_E_OK)) { 246 if (unlikely(ret != LZO_E_OK)) {
274 pr_err("Decompression failed! err=%d, page=%u\n", ret, index); 247 pr_err("Decompression failed! err=%d, page=%u\n", ret, index);
275 zram_stat64_inc(zram, &zram->stats.failed_reads); 248 zram_stat64_inc(zram, &zram->stats.failed_reads);
276 return ret; 249 goto out_cleanup;
277 } 250 }
278 251
279 return 0; 252 if (is_partial_io(bvec))
253 memcpy(user_mem + bvec->bv_offset, uncmem + offset,
254 bvec->bv_len);
255
256 flush_dcache_page(page);
257 ret = 0;
258out_cleanup:
259 kunmap_atomic(user_mem);
260 if (is_partial_io(bvec))
261 kfree(uncmem);
262 return ret;
280} 263}
281 264
282static int zram_bvec_write(struct zram *zram, struct bio_vec *bvec, u32 index, 265static int zram_bvec_write(struct zram *zram, struct bio_vec *bvec, u32 index,
@@ -302,7 +285,7 @@ static int zram_bvec_write(struct zram *zram, struct bio_vec *bvec, u32 index,
302 ret = -ENOMEM; 285 ret = -ENOMEM;
303 goto out; 286 goto out;
304 } 287 }
305 ret = zram_read_before_write(zram, uncmem, index); 288 ret = zram_decompress_page(zram, uncmem, index);
306 if (ret) { 289 if (ret) {
307 kfree(uncmem); 290 kfree(uncmem);
308 goto out; 291 goto out;
diff --git a/drivers/staging/zram/zram_drv.h b/drivers/staging/zram/zram_drv.h
index 572c0b1551d4..df2eec407db6 100644
--- a/drivers/staging/zram/zram_drv.h
+++ b/drivers/staging/zram/zram_drv.h
@@ -39,8 +39,8 @@ static const size_t max_zpage_size = PAGE_SIZE / 4 * 3;
39 39
40/* 40/*
41 * NOTE: max_zpage_size must be less than or equal to: 41 * NOTE: max_zpage_size must be less than or equal to:
42 * ZS_MAX_ALLOC_SIZE - sizeof(struct zobj_header) 42 * ZS_MAX_ALLOC_SIZE. Otherwise, zs_malloc() would
43 * otherwise, xv_malloc() would always return failure. 43 * always return failure.
44 */ 44 */
45 45
46/*-- End of configurable params */ 46/*-- End of configurable params */
diff --git a/drivers/staging/zram/zram_sysfs.c b/drivers/staging/zram/zram_sysfs.c
index edb0ed4125d5..de1eacf65dbd 100644
--- a/drivers/staging/zram/zram_sysfs.c
+++ b/drivers/staging/zram/zram_sysfs.c
@@ -15,6 +15,7 @@
15#include <linux/device.h> 15#include <linux/device.h>
16#include <linux/genhd.h> 16#include <linux/genhd.h>
17#include <linux/mm.h> 17#include <linux/mm.h>
18#include <linux/kernel.h>
18 19
19#include "zram_drv.h" 20#include "zram_drv.h"
20 21
@@ -54,13 +55,12 @@ static ssize_t disksize_show(struct device *dev,
54static ssize_t disksize_store(struct device *dev, 55static ssize_t disksize_store(struct device *dev,
55 struct device_attribute *attr, const char *buf, size_t len) 56 struct device_attribute *attr, const char *buf, size_t len)
56{ 57{
57 int ret;
58 u64 disksize; 58 u64 disksize;
59 struct zram *zram = dev_to_zram(dev); 59 struct zram *zram = dev_to_zram(dev);
60 60
61 ret = kstrtoull(buf, 10, &disksize); 61 disksize = memparse(buf, NULL);
62 if (ret) 62 if (!disksize)
63 return ret; 63 return -EINVAL;
64 64
65 down_write(&zram->init_lock); 65 down_write(&zram->init_lock);
66 if (zram->init_done) { 66 if (zram->init_done) {
diff --git a/drivers/vme/boards/vme_vmivme7805.c b/drivers/vme/boards/vme_vmivme7805.c
index 8e05bb4e135a..dd22b5072e21 100644
--- a/drivers/vme/boards/vme_vmivme7805.c
+++ b/drivers/vme/boards/vme_vmivme7805.c
@@ -19,10 +19,8 @@
19 19
20#include "vme_vmivme7805.h" 20#include "vme_vmivme7805.h"
21 21
22static int __init vmic_init(void);
23static int vmic_probe(struct pci_dev *, const struct pci_device_id *); 22static int vmic_probe(struct pci_dev *, const struct pci_device_id *);
24static void vmic_remove(struct pci_dev *); 23static void vmic_remove(struct pci_dev *);
25static void __exit vmic_exit(void);
26 24
27/** Base address to access FPGA register */ 25/** Base address to access FPGA register */
28static void *vmic_base; 26static void *vmic_base;
@@ -41,11 +39,6 @@ static struct pci_driver vmic_driver = {
41 .remove = vmic_remove, 39 .remove = vmic_remove,
42}; 40};
43 41
44static int __init vmic_init(void)
45{
46 return pci_register_driver(&vmic_driver);
47}
48
49static int vmic_probe(struct pci_dev *pdev, const struct pci_device_id *id) 42static int vmic_probe(struct pci_dev *pdev, const struct pci_device_id *id)
50{ 43{
51 int retval; 44 int retval;
@@ -109,15 +102,9 @@ static void vmic_remove(struct pci_dev *pdev)
109 102
110} 103}
111 104
112static void __exit vmic_exit(void) 105module_pci_driver(vmic_driver);
113{
114 pci_unregister_driver(&vmic_driver);
115}
116 106
117MODULE_DESCRIPTION("VMIVME-7805 board support driver"); 107MODULE_DESCRIPTION("VMIVME-7805 board support driver");
118MODULE_AUTHOR("Arthur Benilov <arthur.benilov@iba-group.com>"); 108MODULE_AUTHOR("Arthur Benilov <arthur.benilov@iba-group.com>");
119MODULE_LICENSE("GPL"); 109MODULE_LICENSE("GPL");
120 110
121module_init(vmic_init);
122module_exit(vmic_exit);
123
diff --git a/drivers/vme/bridges/vme_ca91cx42.c b/drivers/vme/bridges/vme_ca91cx42.c
index 1425d22cf956..64bfea314429 100644
--- a/drivers/vme/bridges/vme_ca91cx42.c
+++ b/drivers/vme/bridges/vme_ca91cx42.c
@@ -34,10 +34,8 @@
34#include "../vme_bridge.h" 34#include "../vme_bridge.h"
35#include "vme_ca91cx42.h" 35#include "vme_ca91cx42.h"
36 36
37static int __init ca91cx42_init(void);
38static int ca91cx42_probe(struct pci_dev *, const struct pci_device_id *); 37static int ca91cx42_probe(struct pci_dev *, const struct pci_device_id *);
39static void ca91cx42_remove(struct pci_dev *); 38static void ca91cx42_remove(struct pci_dev *);
40static void __exit ca91cx42_exit(void);
41 39
42/* Module parameters */ 40/* Module parameters */
43static int geoid; 41static int geoid;
@@ -1523,11 +1521,6 @@ static void ca91cx42_free_consistent(struct device *parent, size_t size,
1523 pci_free_consistent(pdev, size, vaddr, dma); 1521 pci_free_consistent(pdev, size, vaddr, dma);
1524} 1522}
1525 1523
1526static int __init ca91cx42_init(void)
1527{
1528 return pci_register_driver(&ca91cx42_driver);
1529}
1530
1531/* 1524/*
1532 * Configure CR/CSR space 1525 * Configure CR/CSR space
1533 * 1526 *
@@ -1944,16 +1937,10 @@ static void ca91cx42_remove(struct pci_dev *pdev)
1944 kfree(ca91cx42_bridge); 1937 kfree(ca91cx42_bridge);
1945} 1938}
1946 1939
1947static void __exit ca91cx42_exit(void) 1940module_pci_driver(ca91cx42_driver);
1948{
1949 pci_unregister_driver(&ca91cx42_driver);
1950}
1951 1941
1952MODULE_PARM_DESC(geoid, "Override geographical addressing"); 1942MODULE_PARM_DESC(geoid, "Override geographical addressing");
1953module_param(geoid, int, 0); 1943module_param(geoid, int, 0);
1954 1944
1955MODULE_DESCRIPTION("VME driver for the Tundra Universe II VME bridge"); 1945MODULE_DESCRIPTION("VME driver for the Tundra Universe II VME bridge");
1956MODULE_LICENSE("GPL"); 1946MODULE_LICENSE("GPL");
1957
1958module_init(ca91cx42_init);
1959module_exit(ca91cx42_exit);
diff --git a/drivers/vme/bridges/vme_tsi148.c b/drivers/vme/bridges/vme_tsi148.c
index 5fbd08ffb9c2..9c1aa4dc39c9 100644
--- a/drivers/vme/bridges/vme_tsi148.c
+++ b/drivers/vme/bridges/vme_tsi148.c
@@ -35,10 +35,8 @@
35#include "../vme_bridge.h" 35#include "../vme_bridge.h"
36#include "vme_tsi148.h" 36#include "vme_tsi148.h"
37 37
38static int __init tsi148_init(void);
39static int tsi148_probe(struct pci_dev *, const struct pci_device_id *); 38static int tsi148_probe(struct pci_dev *, const struct pci_device_id *);
40static void tsi148_remove(struct pci_dev *); 39static void tsi148_remove(struct pci_dev *);
41static void __exit tsi148_exit(void);
42 40
43 41
44/* Module parameter */ 42/* Module parameter */
@@ -2244,11 +2242,6 @@ static void tsi148_free_consistent(struct device *parent, size_t size,
2244 pci_free_consistent(pdev, size, vaddr, dma); 2242 pci_free_consistent(pdev, size, vaddr, dma);
2245} 2243}
2246 2244
2247static int __init tsi148_init(void)
2248{
2249 return pci_register_driver(&tsi148_driver);
2250}
2251
2252/* 2245/*
2253 * Configure CR/CSR space 2246 * Configure CR/CSR space
2254 * 2247 *
@@ -2754,10 +2747,7 @@ static void tsi148_remove(struct pci_dev *pdev)
2754 kfree(tsi148_bridge); 2747 kfree(tsi148_bridge);
2755} 2748}
2756 2749
2757static void __exit tsi148_exit(void) 2750module_pci_driver(tsi148_driver);
2758{
2759 pci_unregister_driver(&tsi148_driver);
2760}
2761 2751
2762MODULE_PARM_DESC(err_chk, "Check for VME errors on reads and writes"); 2752MODULE_PARM_DESC(err_chk, "Check for VME errors on reads and writes");
2763module_param(err_chk, bool, 0); 2753module_param(err_chk, bool, 0);
@@ -2767,6 +2757,3 @@ module_param(geoid, int, 0);
2767 2757
2768MODULE_DESCRIPTION("VME driver for the Tundra Tempe VME bridge"); 2758MODULE_DESCRIPTION("VME driver for the Tundra Tempe VME bridge");
2769MODULE_LICENSE("GPL"); 2759MODULE_LICENSE("GPL");
2770
2771module_init(tsi148_init);
2772module_exit(tsi148_exit);