diff options
author | Nobuhiro Iwamatsu <nobuhiro.iwamatsu.yj@renesas.com> | 2012-06-25 13:35:12 -0400 |
---|---|---|
committer | David S. Miller <davem@davemloft.net> | 2012-06-26 02:54:32 -0400 |
commit | 5cee1d37c9f565f1aa515408863dbb13db67dab9 (patch) | |
tree | 9be17e3476a340f7b3545d87d99d1d853088df2b /drivers | |
parent | 5e7a76be0e48217aff6b6f34bdcce4725db999e2 (diff) |
net/sh-eth: Check return value of sh_eth_reset when chip reset fail
The sh_eth_reset function resets chip, but this performs nothing when failed.
This changes sh_eth_reset return an error, when this failed in reset.
Signed-off-by: Nobuhiro Iwamatsu <nobuhiro.iwamatsu.yj@renesas.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
Diffstat (limited to 'drivers')
-rw-r--r-- | drivers/net/ethernet/renesas/sh_eth.c | 88 |
1 files changed, 56 insertions, 32 deletions
diff --git a/drivers/net/ethernet/renesas/sh_eth.c b/drivers/net/ethernet/renesas/sh_eth.c index 8d696e0c082b..326cb91abdad 100644 --- a/drivers/net/ethernet/renesas/sh_eth.c +++ b/drivers/net/ethernet/renesas/sh_eth.c | |||
@@ -130,6 +130,8 @@ static struct sh_eth_cpu_data sh_eth_my_cpu_data = { | |||
130 | #elif defined(CONFIG_CPU_SUBTYPE_SH7757) | 130 | #elif defined(CONFIG_CPU_SUBTYPE_SH7757) |
131 | #define SH_ETH_HAS_BOTH_MODULES 1 | 131 | #define SH_ETH_HAS_BOTH_MODULES 1 |
132 | #define SH_ETH_HAS_TSU 1 | 132 | #define SH_ETH_HAS_TSU 1 |
133 | static int sh_eth_check_reset(struct net_device *ndev); | ||
134 | |||
133 | static void sh_eth_set_duplex(struct net_device *ndev) | 135 | static void sh_eth_set_duplex(struct net_device *ndev) |
134 | { | 136 | { |
135 | struct sh_eth_private *mdp = netdev_priv(ndev); | 137 | struct sh_eth_private *mdp = netdev_priv(ndev); |
@@ -204,23 +206,19 @@ static void sh_eth_chip_reset_giga(struct net_device *ndev) | |||
204 | } | 206 | } |
205 | 207 | ||
206 | static int sh_eth_is_gether(struct sh_eth_private *mdp); | 208 | static int sh_eth_is_gether(struct sh_eth_private *mdp); |
207 | static void sh_eth_reset(struct net_device *ndev) | 209 | static int sh_eth_reset(struct net_device *ndev) |
208 | { | 210 | { |
209 | struct sh_eth_private *mdp = netdev_priv(ndev); | 211 | struct sh_eth_private *mdp = netdev_priv(ndev); |
210 | int cnt = 100; | 212 | int ret = 0; |
211 | 213 | ||
212 | if (sh_eth_is_gether(mdp)) { | 214 | if (sh_eth_is_gether(mdp)) { |
213 | sh_eth_write(ndev, 0x03, EDSR); | 215 | sh_eth_write(ndev, 0x03, EDSR); |
214 | sh_eth_write(ndev, sh_eth_read(ndev, EDMR) | EDMR_SRST_GETHER, | 216 | sh_eth_write(ndev, sh_eth_read(ndev, EDMR) | EDMR_SRST_GETHER, |
215 | EDMR); | 217 | EDMR); |
216 | while (cnt > 0) { | 218 | |
217 | if (!(sh_eth_read(ndev, EDMR) & 0x3)) | 219 | ret = sh_eth_check_reset(ndev); |
218 | break; | 220 | if (ret) |
219 | mdelay(1); | 221 | goto out; |
220 | cnt--; | ||
221 | } | ||
222 | if (cnt < 0) | ||
223 | printk(KERN_ERR "Device reset fail\n"); | ||
224 | 222 | ||
225 | /* Table Init */ | 223 | /* Table Init */ |
226 | sh_eth_write(ndev, 0x0, TDLAR); | 224 | sh_eth_write(ndev, 0x0, TDLAR); |
@@ -238,6 +236,9 @@ static void sh_eth_reset(struct net_device *ndev) | |||
238 | sh_eth_write(ndev, sh_eth_read(ndev, EDMR) & ~EDMR_SRST_ETHER, | 236 | sh_eth_write(ndev, sh_eth_read(ndev, EDMR) & ~EDMR_SRST_ETHER, |
239 | EDMR); | 237 | EDMR); |
240 | } | 238 | } |
239 | |||
240 | out: | ||
241 | return ret; | ||
241 | } | 242 | } |
242 | 243 | ||
243 | static void sh_eth_set_duplex_giga(struct net_device *ndev) | 244 | static void sh_eth_set_duplex_giga(struct net_device *ndev) |
@@ -310,6 +311,7 @@ static struct sh_eth_cpu_data *sh_eth_get_cpu_data(struct sh_eth_private *mdp) | |||
310 | 311 | ||
311 | #elif defined(CONFIG_CPU_SUBTYPE_SH7734) || defined(CONFIG_CPU_SUBTYPE_SH7763) | 312 | #elif defined(CONFIG_CPU_SUBTYPE_SH7734) || defined(CONFIG_CPU_SUBTYPE_SH7763) |
312 | #define SH_ETH_HAS_TSU 1 | 313 | #define SH_ETH_HAS_TSU 1 |
314 | static int sh_eth_check_reset(struct net_device *ndev); | ||
313 | static void sh_eth_reset_hw_crc(struct net_device *ndev); | 315 | static void sh_eth_reset_hw_crc(struct net_device *ndev); |
314 | 316 | ||
315 | static void sh_eth_chip_reset(struct net_device *ndev) | 317 | static void sh_eth_chip_reset(struct net_device *ndev) |
@@ -381,20 +383,16 @@ static struct sh_eth_cpu_data sh_eth_my_cpu_data = { | |||
381 | #endif | 383 | #endif |
382 | }; | 384 | }; |
383 | 385 | ||
384 | static void sh_eth_reset(struct net_device *ndev) | 386 | static int sh_eth_reset(struct net_device *ndev) |
385 | { | 387 | { |
386 | int cnt = 100; | 388 | int ret = 0; |
387 | 389 | ||
388 | sh_eth_write(ndev, EDSR_ENALL, EDSR); | 390 | sh_eth_write(ndev, EDSR_ENALL, EDSR); |
389 | sh_eth_write(ndev, sh_eth_read(ndev, EDMR) | EDMR_SRST_GETHER, EDMR); | 391 | sh_eth_write(ndev, sh_eth_read(ndev, EDMR) | EDMR_SRST_GETHER, EDMR); |
390 | while (cnt > 0) { | 392 | |
391 | if (!(sh_eth_read(ndev, EDMR) & 0x3)) | 393 | ret = sh_eth_check_reset(ndev); |
392 | break; | 394 | if (ret) |
393 | mdelay(1); | 395 | goto out; |
394 | cnt--; | ||
395 | } | ||
396 | if (cnt == 0) | ||
397 | printk(KERN_ERR "Device reset fail\n"); | ||
398 | 396 | ||
399 | /* Table Init */ | 397 | /* Table Init */ |
400 | sh_eth_write(ndev, 0x0, TDLAR); | 398 | sh_eth_write(ndev, 0x0, TDLAR); |
@@ -412,6 +410,8 @@ static void sh_eth_reset(struct net_device *ndev) | |||
412 | /* Select MII mode */ | 410 | /* Select MII mode */ |
413 | if (sh_eth_my_cpu_data.select_mii) | 411 | if (sh_eth_my_cpu_data.select_mii) |
414 | sh_eth_select_mii(ndev); | 412 | sh_eth_select_mii(ndev); |
413 | out: | ||
414 | return ret; | ||
415 | } | 415 | } |
416 | 416 | ||
417 | static void sh_eth_reset_hw_crc(struct net_device *ndev) | 417 | static void sh_eth_reset_hw_crc(struct net_device *ndev) |
@@ -422,6 +422,8 @@ static void sh_eth_reset_hw_crc(struct net_device *ndev) | |||
422 | 422 | ||
423 | #elif defined(CONFIG_ARCH_R8A7740) | 423 | #elif defined(CONFIG_ARCH_R8A7740) |
424 | #define SH_ETH_HAS_TSU 1 | 424 | #define SH_ETH_HAS_TSU 1 |
425 | static int sh_eth_check_reset(struct net_device *ndev); | ||
426 | |||
425 | static void sh_eth_chip_reset(struct net_device *ndev) | 427 | static void sh_eth_chip_reset(struct net_device *ndev) |
426 | { | 428 | { |
427 | struct sh_eth_private *mdp = netdev_priv(ndev); | 429 | struct sh_eth_private *mdp = netdev_priv(ndev); |
@@ -433,20 +435,16 @@ static void sh_eth_chip_reset(struct net_device *ndev) | |||
433 | sh_eth_select_mii(ndev); | 435 | sh_eth_select_mii(ndev); |
434 | } | 436 | } |
435 | 437 | ||
436 | static void sh_eth_reset(struct net_device *ndev) | 438 | static int sh_eth_reset(struct net_device *ndev) |
437 | { | 439 | { |
438 | int cnt = 100; | 440 | int ret = 0; |
439 | 441 | ||
440 | sh_eth_write(ndev, EDSR_ENALL, EDSR); | 442 | sh_eth_write(ndev, EDSR_ENALL, EDSR); |
441 | sh_eth_write(ndev, sh_eth_read(ndev, EDMR) | EDMR_SRST_GETHER, EDMR); | 443 | sh_eth_write(ndev, sh_eth_read(ndev, EDMR) | EDMR_SRST_GETHER, EDMR); |
442 | while (cnt > 0) { | 444 | |
443 | if (!(sh_eth_read(ndev, EDMR) & 0x3)) | 445 | ret = sh_eth_check_reset(ndev); |
444 | break; | 446 | if (ret) |
445 | mdelay(1); | 447 | goto out; |
446 | cnt--; | ||
447 | } | ||
448 | if (cnt == 0) | ||
449 | printk(KERN_ERR "Device reset fail\n"); | ||
450 | 448 | ||
451 | /* Table Init */ | 449 | /* Table Init */ |
452 | sh_eth_write(ndev, 0x0, TDLAR); | 450 | sh_eth_write(ndev, 0x0, TDLAR); |
@@ -457,6 +455,9 @@ static void sh_eth_reset(struct net_device *ndev) | |||
457 | sh_eth_write(ndev, 0x0, RDFAR); | 455 | sh_eth_write(ndev, 0x0, RDFAR); |
458 | sh_eth_write(ndev, 0x0, RDFXR); | 456 | sh_eth_write(ndev, 0x0, RDFXR); |
459 | sh_eth_write(ndev, 0x0, RDFFR); | 457 | sh_eth_write(ndev, 0x0, RDFFR); |
458 | |||
459 | out: | ||
460 | return ret; | ||
460 | } | 461 | } |
461 | 462 | ||
462 | static void sh_eth_set_duplex(struct net_device *ndev) | 463 | static void sh_eth_set_duplex(struct net_device *ndev) |
@@ -565,11 +566,31 @@ static void sh_eth_set_default_cpu_data(struct sh_eth_cpu_data *cd) | |||
565 | 566 | ||
566 | #if defined(SH_ETH_RESET_DEFAULT) | 567 | #if defined(SH_ETH_RESET_DEFAULT) |
567 | /* Chip Reset */ | 568 | /* Chip Reset */ |
568 | static void sh_eth_reset(struct net_device *ndev) | 569 | static int sh_eth_reset(struct net_device *ndev) |
569 | { | 570 | { |
570 | sh_eth_write(ndev, sh_eth_read(ndev, EDMR) | EDMR_SRST_ETHER, EDMR); | 571 | sh_eth_write(ndev, sh_eth_read(ndev, EDMR) | EDMR_SRST_ETHER, EDMR); |
571 | mdelay(3); | 572 | mdelay(3); |
572 | sh_eth_write(ndev, sh_eth_read(ndev, EDMR) & ~EDMR_SRST_ETHER, EDMR); | 573 | sh_eth_write(ndev, sh_eth_read(ndev, EDMR) & ~EDMR_SRST_ETHER, EDMR); |
574 | |||
575 | return 0; | ||
576 | } | ||
577 | #else | ||
578 | static int sh_eth_check_reset(struct net_device *ndev) | ||
579 | { | ||
580 | int ret = 0; | ||
581 | int cnt = 100; | ||
582 | |||
583 | while (cnt > 0) { | ||
584 | if (!(sh_eth_read(ndev, EDMR) & 0x3)) | ||
585 | break; | ||
586 | mdelay(1); | ||
587 | cnt--; | ||
588 | } | ||
589 | if (cnt < 0) { | ||
590 | printk(KERN_ERR "Device reset fail\n"); | ||
591 | ret = -ETIMEDOUT; | ||
592 | } | ||
593 | return ret; | ||
573 | } | 594 | } |
574 | #endif | 595 | #endif |
575 | 596 | ||
@@ -924,7 +945,9 @@ static int sh_eth_dev_init(struct net_device *ndev) | |||
924 | u32 val; | 945 | u32 val; |
925 | 946 | ||
926 | /* Soft Reset */ | 947 | /* Soft Reset */ |
927 | sh_eth_reset(ndev); | 948 | ret = sh_eth_reset(ndev); |
949 | if (ret) | ||
950 | goto out; | ||
928 | 951 | ||
929 | /* Descriptor format */ | 952 | /* Descriptor format */ |
930 | sh_eth_ring_format(ndev); | 953 | sh_eth_ring_format(ndev); |
@@ -998,6 +1021,7 @@ static int sh_eth_dev_init(struct net_device *ndev) | |||
998 | 1021 | ||
999 | netif_start_queue(ndev); | 1022 | netif_start_queue(ndev); |
1000 | 1023 | ||
1024 | out: | ||
1001 | return ret; | 1025 | return ret; |
1002 | } | 1026 | } |
1003 | 1027 | ||