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authorJohn W. Linville <linville@tuxdriver.com>2011-07-22 17:51:16 -0400
committerJohn W. Linville <linville@tuxdriver.com>2011-07-22 17:51:16 -0400
commit41bf37117b47fc5ce2aae91f6a108e7e42e0b046 (patch)
treed5c8f24075313edfe548256dd931527f1569921e /drivers
parent415b3334a21aa67806c52d1acf4e72e14f7f402f (diff)
parent6e6e8c510a84fe3237ef02b954e58cca6a3f4b1a (diff)
Merge branch 'master' of git://git.kernel.org/pub/scm/linux/kernel/git/linville/wireless-next-2.6 into for-davem
Diffstat (limited to 'drivers')
-rw-r--r--drivers/bcma/core.c72
-rw-r--r--drivers/bcma/driver_chipcommon.c14
-rw-r--r--drivers/bcma/driver_pci.c2
-rw-r--r--drivers/bcma/sprom.c14
-rw-r--r--drivers/net/wireless/ath/ath5k/ahb.c44
-rw-r--r--drivers/net/wireless/ath/ath5k/ani.c84
-rw-r--r--drivers/net/wireless/ath/ath5k/ath5k.h272
-rw-r--r--drivers/net/wireless/ath/ath5k/attach.c31
-rw-r--r--drivers/net/wireless/ath/ath5k/base.c1138
-rw-r--r--drivers/net/wireless/ath/ath5k/base.h205
-rw-r--r--drivers/net/wireless/ath/ath5k/caps.c45
-rw-r--r--drivers/net/wireless/ath/ath5k/debug.c218
-rw-r--r--drivers/net/wireless/ath/ath5k/debug.h21
-rw-r--r--drivers/net/wireless/ath/ath5k/desc.c10
-rw-r--r--drivers/net/wireless/ath/ath5k/dma.c12
-rw-r--r--drivers/net/wireless/ath/ath5k/eeprom.c4
-rw-r--r--drivers/net/wireless/ath/ath5k/initvals.c2
-rw-r--r--drivers/net/wireless/ath/ath5k/led.c68
-rw-r--r--drivers/net/wireless/ath/ath5k/mac80211-ops.c257
-rw-r--r--drivers/net/wireless/ath/ath5k/pci.c38
-rw-r--r--drivers/net/wireless/ath/ath5k/pcu.c24
-rw-r--r--drivers/net/wireless/ath/ath5k/phy.c41
-rw-r--r--drivers/net/wireless/ath/ath5k/qcu.c9
-rw-r--r--drivers/net/wireless/ath/ath5k/reset.c44
-rw-r--r--drivers/net/wireless/ath/ath5k/rfkill.c65
-rw-r--r--drivers/net/wireless/ath/ath5k/sysfs.c32
-rw-r--r--drivers/net/wireless/ath/ath5k/trace.h12
-rw-r--r--drivers/net/wireless/ath/ath9k/ar9003_eeprom.c12
-rw-r--r--drivers/net/wireless/ath/ath9k/btcoex.c8
-rw-r--r--drivers/net/wireless/ath/ath9k/debug.c22
-rw-r--r--drivers/net/wireless/ath/ath9k/eeprom_4k.c12
-rw-r--r--drivers/net/wireless/ath/ath9k/eeprom_9287.c12
-rw-r--r--drivers/net/wireless/ath/ath9k/eeprom_def.c12
-rw-r--r--drivers/net/wireless/ath/ath9k/hif_usb.c9
-rw-r--r--drivers/net/wireless/ath/ath9k/htc_drv_debug.c7
-rw-r--r--drivers/net/wireless/ath/ath9k/hw.c22
-rw-r--r--drivers/net/wireless/ath/ath9k/init.c25
-rw-r--r--drivers/net/wireless/ath/ath9k/recv.c53
-rw-r--r--drivers/net/wireless/ath/ath9k/reg.h23
-rw-r--r--drivers/net/wireless/ath/ath9k/xmit.c4
-rw-r--r--drivers/net/wireless/ath/carl9170/carl9170.h10
-rw-r--r--drivers/net/wireless/ath/carl9170/cmd.h4
-rw-r--r--drivers/net/wireless/ath/carl9170/debug.c2
-rw-r--r--drivers/net/wireless/ath/carl9170/fwdesc.h3
-rw-r--r--drivers/net/wireless/ath/carl9170/hw.h41
-rw-r--r--drivers/net/wireless/ath/carl9170/led.c2
-rw-r--r--drivers/net/wireless/ath/carl9170/mac.c129
-rw-r--r--drivers/net/wireless/ath/carl9170/main.c2
-rw-r--r--drivers/net/wireless/ath/carl9170/phy.c6
-rw-r--r--drivers/net/wireless/ath/carl9170/tx.c290
-rw-r--r--drivers/net/wireless/ath/key.c7
-rw-r--r--drivers/net/wireless/b43/b43.h7
-rw-r--r--drivers/net/wireless/b43/bus.c27
-rw-r--r--drivers/net/wireless/b43/dma.c27
-rw-r--r--drivers/net/wireless/b43/dma.h4
-rw-r--r--drivers/net/wireless/b43/main.c106
-rw-r--r--drivers/net/wireless/b43/phy_ht.c21
-rw-r--r--drivers/net/wireless/b43/phy_n.c4
-rw-r--r--drivers/net/wireless/b43/radio_2059.c9
-rw-r--r--drivers/net/wireless/b43legacy/b43legacy.h2
-rw-r--r--drivers/net/wireless/b43legacy/dma.c7
-rw-r--r--drivers/net/wireless/iwlwifi/Makefile8
-rw-r--r--drivers/net/wireless/iwlwifi/iwl-1000.c11
-rw-r--r--drivers/net/wireless/iwlwifi/iwl-2000.c46
-rw-r--r--drivers/net/wireless/iwlwifi/iwl-5000.c22
-rw-r--r--drivers/net/wireless/iwlwifi/iwl-6000.c58
-rw-r--r--drivers/net/wireless/iwlwifi/iwl-agn-calib.c65
-rw-r--r--drivers/net/wireless/iwlwifi/iwl-agn-hcmd.c210
-rw-r--r--drivers/net/wireless/iwlwifi/iwl-agn-ict.c306
-rw-r--r--drivers/net/wireless/iwlwifi/iwl-agn-lib.c504
-rw-r--r--drivers/net/wireless/iwlwifi/iwl-agn-rs.c8
-rw-r--r--drivers/net/wireless/iwlwifi/iwl-agn-rxon.c115
-rw-r--r--drivers/net/wireless/iwlwifi/iwl-agn-sta.c376
-rw-r--r--drivers/net/wireless/iwlwifi/iwl-agn-tx.c411
-rw-r--r--drivers/net/wireless/iwlwifi/iwl-agn-ucode.c179
-rw-r--r--drivers/net/wireless/iwlwifi/iwl-agn.c1234
-rw-r--r--drivers/net/wireless/iwlwifi/iwl-agn.h65
-rw-r--r--drivers/net/wireless/iwlwifi/iwl-bus.h (renamed from drivers/net/wireless/iwlwifi/iwl-pci.h)70
-rw-r--r--drivers/net/wireless/iwlwifi/iwl-commands.h180
-rw-r--r--drivers/net/wireless/iwlwifi/iwl-core.c28
-rw-r--r--drivers/net/wireless/iwlwifi/iwl-core.h64
-rw-r--r--drivers/net/wireless/iwlwifi/iwl-csr.h1
-rw-r--r--drivers/net/wireless/iwlwifi/iwl-debug.h10
-rw-r--r--drivers/net/wireless/iwlwifi/iwl-debugfs.c87
-rw-r--r--drivers/net/wireless/iwlwifi/iwl-dev.h197
-rw-r--r--drivers/net/wireless/iwlwifi/iwl-eeprom.c10
-rw-r--r--drivers/net/wireless/iwlwifi/iwl-hcmd.c271
-rw-r--r--drivers/net/wireless/iwlwifi/iwl-io.h7
-rw-r--r--drivers/net/wireless/iwlwifi/iwl-led.c4
-rw-r--r--drivers/net/wireless/iwlwifi/iwl-pci.c101
-rw-r--r--drivers/net/wireless/iwlwifi/iwl-power.c8
-rw-r--r--drivers/net/wireless/iwlwifi/iwl-prph.h82
-rw-r--r--drivers/net/wireless/iwlwifi/iwl-rx.c212
-rw-r--r--drivers/net/wireless/iwlwifi/iwl-scan.c8
-rw-r--r--drivers/net/wireless/iwlwifi/iwl-sta.c8
-rw-r--r--drivers/net/wireless/iwlwifi/iwl-sta.h5
-rw-r--r--drivers/net/wireless/iwlwifi/iwl-sv-open.c10
-rw-r--r--drivers/net/wireless/iwlwifi/iwl-trans-int-pcie.h82
-rw-r--r--drivers/net/wireless/iwlwifi/iwl-trans-rx-pcie.c979
-rw-r--r--drivers/net/wireless/iwlwifi/iwl-trans-tx-pcie.c (renamed from drivers/net/wireless/iwlwifi/iwl-tx.c)484
-rw-r--r--drivers/net/wireless/iwlwifi/iwl-trans.c643
-rw-r--r--drivers/net/wireless/iwlwifi/iwl-trans.h154
-rw-r--r--drivers/net/wireless/libertas/dev.h2
-rw-r--r--drivers/net/wireless/libertas/main.c2
-rw-r--r--drivers/net/wireless/libertas/mesh.c972
-rw-r--r--drivers/net/wireless/libertas/mesh.h31
-rw-r--r--drivers/net/wireless/libertas/tx.c2
-rw-r--r--drivers/net/wireless/mwifiex/debugfs.c33
-rw-r--r--drivers/net/wireless/mwifiex/ioctl.h1
-rw-r--r--drivers/net/wireless/mwifiex/main.h1
-rw-r--r--drivers/net/wireless/mwifiex/sdio.c5
-rw-r--r--drivers/net/wireless/mwifiex/sta_ioctl.c14
-rw-r--r--drivers/net/wireless/mwifiex/wmm.c2
-rw-r--r--drivers/net/wireless/mwl8k.c6
-rw-r--r--drivers/net/wireless/orinoco/airport.c9
-rw-r--r--drivers/net/wireless/orinoco/cfg.c6
-rw-r--r--drivers/net/wireless/orinoco/fw.c7
-rw-r--r--drivers/net/wireless/orinoco/fw.h2
-rw-r--r--drivers/net/wireless/orinoco/hermes.c40
-rw-r--r--drivers/net/wireless/orinoco/hermes.h37
-rw-r--r--drivers/net/wireless/orinoco/hermes_dld.c8
-rw-r--r--drivers/net/wireless/orinoco/hermes_dld.h12
-rw-r--r--drivers/net/wireless/orinoco/hw.c48
-rw-r--r--drivers/net/wireless/orinoco/hw.h2
-rw-r--r--drivers/net/wireless/orinoco/main.c46
-rw-r--r--drivers/net/wireless/orinoco/mic.c8
-rw-r--r--drivers/net/wireless/orinoco/orinoco.h16
-rw-r--r--drivers/net/wireless/orinoco/orinoco_cs.c6
-rw-r--r--drivers/net/wireless/orinoco/orinoco_nortel.c3
-rw-r--r--drivers/net/wireless/orinoco/orinoco_pci.c4
-rw-r--r--drivers/net/wireless/orinoco/orinoco_plx.c6
-rw-r--r--drivers/net/wireless/orinoco/orinoco_tmd.c2
-rw-r--r--drivers/net/wireless/orinoco/orinoco_usb.c23
-rw-r--r--drivers/net/wireless/orinoco/spectrum_cs.c10
-rw-r--r--drivers/net/wireless/orinoco/wext.c14
-rw-r--r--drivers/net/wireless/rtlwifi/base.c20
-rw-r--r--drivers/net/wireless/rtlwifi/cam.c8
-rw-r--r--drivers/net/wireless/rtlwifi/core.c6
-rw-r--r--drivers/net/wireless/rtlwifi/debug.h5
-rw-r--r--drivers/net/wireless/rtlwifi/rtl8192c/fw_common.c5
-rw-r--r--drivers/net/wireless/rtlwifi/rtl8192ce/hw.c2
-rw-r--r--drivers/net/wireless/rtlwifi/rtl8192cu/hw.c69
-rw-r--r--drivers/net/wireless/rtlwifi/rtl8192cu/mac.c11
-rw-r--r--drivers/net/wireless/rtlwifi/rtl8192de/hw.c2
-rw-r--r--drivers/net/wireless/rtlwifi/rtl8192de/sw.c8
-rw-r--r--drivers/net/wireless/rtlwifi/rtl8192se/hw.c12
-rw-r--r--drivers/net/wireless/rtlwifi/rtl8192se/phy.c5
-rw-r--r--drivers/net/wireless/rtlwifi/rtl8192se/rf.c4
-rw-r--r--drivers/net/wireless/rtlwifi/rtl8192se/sw.c6
-rw-r--r--drivers/net/wireless/rtlwifi/usb.c12
-rw-r--r--drivers/ssb/main.c5
151 files changed, 6594 insertions, 5998 deletions
diff --git a/drivers/bcma/core.c b/drivers/bcma/core.c
index 1ec7d4528dd0..4a04a49cc06d 100644
--- a/drivers/bcma/core.c
+++ b/drivers/bcma/core.c
@@ -50,3 +50,75 @@ int bcma_core_enable(struct bcma_device *core, u32 flags)
50 return 0; 50 return 0;
51} 51}
52EXPORT_SYMBOL_GPL(bcma_core_enable); 52EXPORT_SYMBOL_GPL(bcma_core_enable);
53
54void bcma_core_set_clockmode(struct bcma_device *core,
55 enum bcma_clkmode clkmode)
56{
57 u16 i;
58
59 WARN_ON(core->id.id != BCMA_CORE_CHIPCOMMON &&
60 core->id.id != BCMA_CORE_PCIE &&
61 core->id.id != BCMA_CORE_80211);
62
63 switch (clkmode) {
64 case BCMA_CLKMODE_FAST:
65 bcma_set32(core, BCMA_CLKCTLST, BCMA_CLKCTLST_FORCEHT);
66 udelay(64);
67 for (i = 0; i < 1500; i++) {
68 if (bcma_read32(core, BCMA_CLKCTLST) &
69 BCMA_CLKCTLST_HAVEHT) {
70 i = 0;
71 break;
72 }
73 udelay(10);
74 }
75 if (i)
76 pr_err("HT force timeout\n");
77 break;
78 case BCMA_CLKMODE_DYNAMIC:
79 pr_warn("Dynamic clockmode not supported yet!\n");
80 break;
81 }
82}
83EXPORT_SYMBOL_GPL(bcma_core_set_clockmode);
84
85void bcma_core_pll_ctl(struct bcma_device *core, u32 req, u32 status, bool on)
86{
87 u16 i;
88
89 WARN_ON(req & ~BCMA_CLKCTLST_EXTRESREQ);
90 WARN_ON(status & ~BCMA_CLKCTLST_EXTRESST);
91
92 if (on) {
93 bcma_set32(core, BCMA_CLKCTLST, req);
94 for (i = 0; i < 10000; i++) {
95 if ((bcma_read32(core, BCMA_CLKCTLST) & status) ==
96 status) {
97 i = 0;
98 break;
99 }
100 udelay(10);
101 }
102 if (i)
103 pr_err("PLL enable timeout\n");
104 } else {
105 pr_warn("Disabling PLL not supported yet!\n");
106 }
107}
108EXPORT_SYMBOL_GPL(bcma_core_pll_ctl);
109
110u32 bcma_core_dma_translation(struct bcma_device *core)
111{
112 switch (core->bus->hosttype) {
113 case BCMA_HOSTTYPE_PCI:
114 if (bcma_aread32(core, BCMA_IOST) & BCMA_IOST_DMA64)
115 return BCMA_DMA_TRANSLATION_DMA64_CMT;
116 else
117 return BCMA_DMA_TRANSLATION_DMA32_CMT;
118 default:
119 pr_err("DMA translation unknown for host %d\n",
120 core->bus->hosttype);
121 }
122 return BCMA_DMA_TRANSLATION_NONE;
123}
124EXPORT_SYMBOL(bcma_core_dma_translation);
diff --git a/drivers/bcma/driver_chipcommon.c b/drivers/bcma/driver_chipcommon.c
index 606102256b44..fb543024df2f 100644
--- a/drivers/bcma/driver_chipcommon.c
+++ b/drivers/bcma/driver_chipcommon.c
@@ -23,6 +23,9 @@ static inline u32 bcma_cc_write32_masked(struct bcma_drv_cc *cc, u16 offset,
23 23
24void bcma_core_chipcommon_init(struct bcma_drv_cc *cc) 24void bcma_core_chipcommon_init(struct bcma_drv_cc *cc)
25{ 25{
26 u32 leddc_on = 10;
27 u32 leddc_off = 90;
28
26 if (cc->core->id.rev >= 11) 29 if (cc->core->id.rev >= 11)
27 cc->status = bcma_cc_read32(cc, BCMA_CC_CHIPSTAT); 30 cc->status = bcma_cc_read32(cc, BCMA_CC_CHIPSTAT);
28 cc->capabilities = bcma_cc_read32(cc, BCMA_CC_CAP); 31 cc->capabilities = bcma_cc_read32(cc, BCMA_CC_CAP);
@@ -38,6 +41,17 @@ void bcma_core_chipcommon_init(struct bcma_drv_cc *cc)
38 bcma_pmu_init(cc); 41 bcma_pmu_init(cc);
39 if (cc->capabilities & BCMA_CC_CAP_PCTL) 42 if (cc->capabilities & BCMA_CC_CAP_PCTL)
40 pr_err("Power control not implemented!\n"); 43 pr_err("Power control not implemented!\n");
44
45 if (cc->core->id.rev >= 16) {
46 if (cc->core->bus->sprom.leddc_on_time &&
47 cc->core->bus->sprom.leddc_off_time) {
48 leddc_on = cc->core->bus->sprom.leddc_on_time;
49 leddc_off = cc->core->bus->sprom.leddc_off_time;
50 }
51 bcma_cc_write32(cc, BCMA_CC_GPIOTIMER,
52 ((leddc_on << BCMA_CC_GPIOTIMER_ONTIME_SHIFT) |
53 (leddc_off << BCMA_CC_GPIOTIMER_OFFTIME_SHIFT)));
54 }
41} 55}
42 56
43/* Set chip watchdog reset timer to fire in 'ticks' backplane cycles */ 57/* Set chip watchdog reset timer to fire in 'ticks' backplane cycles */
diff --git a/drivers/bcma/driver_pci.c b/drivers/bcma/driver_pci.c
index dc6f34ac96a0..745d26491291 100644
--- a/drivers/bcma/driver_pci.c
+++ b/drivers/bcma/driver_pci.c
@@ -172,8 +172,10 @@ static bool bcma_core_pci_is_in_hostmode(struct bcma_drv_pci *pc)
172 chipid_top != 0x5300) 172 chipid_top != 0x5300)
173 return false; 173 return false;
174 174
175#ifdef CONFIG_SSB_DRIVER_PCICORE
175 if (bus->sprom.boardflags_lo & SSB_PCICORE_BFL_NOPCI) 176 if (bus->sprom.boardflags_lo & SSB_PCICORE_BFL_NOPCI)
176 return false; 177 return false;
178#endif /* CONFIG_SSB_DRIVER_PCICORE */
177 179
178#if 0 180#if 0
179 /* TODO: on BCMA we use address from EROM instead of magic formula */ 181 /* TODO: on BCMA we use address from EROM instead of magic formula */
diff --git a/drivers/bcma/sprom.c b/drivers/bcma/sprom.c
index 8e8d5cf32e12..8b5b7856abe3 100644
--- a/drivers/bcma/sprom.c
+++ b/drivers/bcma/sprom.c
@@ -20,12 +20,12 @@
20 * R/W ops. 20 * R/W ops.
21 **************************************************/ 21 **************************************************/
22 22
23static void bcma_sprom_read(struct bcma_bus *bus, u16 *sprom) 23static void bcma_sprom_read(struct bcma_bus *bus, u16 offset, u16 *sprom)
24{ 24{
25 int i; 25 int i;
26 for (i = 0; i < SSB_SPROMSIZE_WORDS_R4; i++) 26 for (i = 0; i < SSB_SPROMSIZE_WORDS_R4; i++)
27 sprom[i] = bcma_read16(bus->drv_cc.core, 27 sprom[i] = bcma_read16(bus->drv_cc.core,
28 BCMA_CC_SPROM + (i * 2)); 28 offset + (i * 2));
29} 29}
30 30
31/************************************************** 31/**************************************************
@@ -112,7 +112,7 @@ static int bcma_sprom_valid(const u16 *sprom)
112 return err; 112 return err;
113 113
114 revision = sprom[SSB_SPROMSIZE_WORDS_R4 - 1] & SSB_SPROM_REVISION_REV; 114 revision = sprom[SSB_SPROMSIZE_WORDS_R4 - 1] & SSB_SPROM_REVISION_REV;
115 if (revision != 8) { 115 if (revision != 8 && revision != 9) {
116 pr_err("Unsupported SPROM revision: %d\n", revision); 116 pr_err("Unsupported SPROM revision: %d\n", revision);
117 return -ENOENT; 117 return -ENOENT;
118 } 118 }
@@ -137,6 +137,7 @@ static void bcma_sprom_extract_r8(struct bcma_bus *bus, const u16 *sprom)
137 137
138int bcma_sprom_get(struct bcma_bus *bus) 138int bcma_sprom_get(struct bcma_bus *bus)
139{ 139{
140 u16 offset;
140 u16 *sprom; 141 u16 *sprom;
141 int err = 0; 142 int err = 0;
142 143
@@ -151,7 +152,12 @@ int bcma_sprom_get(struct bcma_bus *bus)
151 if (!sprom) 152 if (!sprom)
152 return -ENOMEM; 153 return -ENOMEM;
153 154
154 bcma_sprom_read(bus, sprom); 155 /* Most cards have SPROM moved by additional offset 0x30 (48 dwords).
156 * According to brcm80211 this applies to cards with PCIe rev >= 6
157 * TODO: understand this condition and use it */
158 offset = (bus->chipinfo.id == 0x4331) ? BCMA_CC_SPROM :
159 BCMA_CC_SPROM_PCIE6;
160 bcma_sprom_read(bus, offset, sprom);
155 161
156 err = bcma_sprom_valid(sprom); 162 err = bcma_sprom_valid(sprom);
157 if (err) 163 if (err)
diff --git a/drivers/net/wireless/ath/ath5k/ahb.c b/drivers/net/wireless/ath/ath5k/ahb.c
index ba682a0b2dd8..9f69a4c9a3f3 100644
--- a/drivers/net/wireless/ath/ath5k/ahb.c
+++ b/drivers/net/wireless/ath/ath5k/ahb.c
@@ -35,8 +35,8 @@ static void ath5k_ahb_read_cachesize(struct ath_common *common, int *csz)
35static bool 35static bool
36ath5k_ahb_eeprom_read(struct ath_common *common, u32 off, u16 *data) 36ath5k_ahb_eeprom_read(struct ath_common *common, u32 off, u16 *data)
37{ 37{
38 struct ath5k_softc *sc = common->priv; 38 struct ath5k_hw *ah = common->priv;
39 struct platform_device *pdev = to_platform_device(sc->dev); 39 struct platform_device *pdev = to_platform_device(ah->dev);
40 struct ar231x_board_config *bcfg = pdev->dev.platform_data; 40 struct ar231x_board_config *bcfg = pdev->dev.platform_data;
41 u16 *eeprom, *eeprom_end; 41 u16 *eeprom, *eeprom_end;
42 42
@@ -56,8 +56,7 @@ ath5k_ahb_eeprom_read(struct ath_common *common, u32 off, u16 *data)
56 56
57int ath5k_hw_read_srev(struct ath5k_hw *ah) 57int ath5k_hw_read_srev(struct ath5k_hw *ah)
58{ 58{
59 struct ath5k_softc *sc = ah->ah_sc; 59 struct platform_device *pdev = to_platform_device(ah->dev);
60 struct platform_device *pdev = to_platform_device(sc->dev);
61 struct ar231x_board_config *bcfg = pdev->dev.platform_data; 60 struct ar231x_board_config *bcfg = pdev->dev.platform_data;
62 ah->ah_mac_srev = bcfg->devid; 61 ah->ah_mac_srev = bcfg->devid;
63 return 0; 62 return 0;
@@ -65,12 +64,11 @@ int ath5k_hw_read_srev(struct ath5k_hw *ah)
65 64
66static int ath5k_ahb_eeprom_read_mac(struct ath5k_hw *ah, u8 *mac) 65static int ath5k_ahb_eeprom_read_mac(struct ath5k_hw *ah, u8 *mac)
67{ 66{
68 struct ath5k_softc *sc = ah->ah_sc; 67 struct platform_device *pdev = to_platform_device(ah->dev);
69 struct platform_device *pdev = to_platform_device(sc->dev);
70 struct ar231x_board_config *bcfg = pdev->dev.platform_data; 68 struct ar231x_board_config *bcfg = pdev->dev.platform_data;
71 u8 *cfg_mac; 69 u8 *cfg_mac;
72 70
73 if (to_platform_device(sc->dev)->id == 0) 71 if (to_platform_device(ah->dev)->id == 0)
74 cfg_mac = bcfg->config->wlan0_mac; 72 cfg_mac = bcfg->config->wlan0_mac;
75 else 73 else
76 cfg_mac = bcfg->config->wlan1_mac; 74 cfg_mac = bcfg->config->wlan1_mac;
@@ -90,7 +88,7 @@ static const struct ath_bus_ops ath_ahb_bus_ops = {
90static int ath_ahb_probe(struct platform_device *pdev) 88static int ath_ahb_probe(struct platform_device *pdev)
91{ 89{
92 struct ar231x_board_config *bcfg = pdev->dev.platform_data; 90 struct ar231x_board_config *bcfg = pdev->dev.platform_data;
93 struct ath5k_softc *sc; 91 struct ath5k_hw *ah;
94 struct ieee80211_hw *hw; 92 struct ieee80211_hw *hw;
95 struct resource *res; 93 struct resource *res;
96 void __iomem *mem; 94 void __iomem *mem;
@@ -127,19 +125,19 @@ static int ath_ahb_probe(struct platform_device *pdev)
127 125
128 irq = res->start; 126 irq = res->start;
129 127
130 hw = ieee80211_alloc_hw(sizeof(struct ath5k_softc), &ath5k_hw_ops); 128 hw = ieee80211_alloc_hw(sizeof(struct ath5k_hw), &ath5k_hw_ops);
131 if (hw == NULL) { 129 if (hw == NULL) {
132 dev_err(&pdev->dev, "no memory for ieee80211_hw\n"); 130 dev_err(&pdev->dev, "no memory for ieee80211_hw\n");
133 ret = -ENOMEM; 131 ret = -ENOMEM;
134 goto err_out; 132 goto err_out;
135 } 133 }
136 134
137 sc = hw->priv; 135 ah = hw->priv;
138 sc->hw = hw; 136 ah->hw = hw;
139 sc->dev = &pdev->dev; 137 ah->dev = &pdev->dev;
140 sc->iobase = mem; 138 ah->iobase = mem;
141 sc->irq = irq; 139 ah->irq = irq;
142 sc->devid = bcfg->devid; 140 ah->devid = bcfg->devid;
143 141
144 if (bcfg->devid >= AR5K_SREV_AR2315_R6) { 142 if (bcfg->devid >= AR5K_SREV_AR2315_R6) {
145 /* Enable WMAC AHB arbitration */ 143 /* Enable WMAC AHB arbitration */
@@ -155,7 +153,7 @@ static int ath_ahb_probe(struct platform_device *pdev)
155 /* Enable WMAC DMA access (assuming 5312 or 231x*/ 153 /* Enable WMAC DMA access (assuming 5312 or 231x*/
156 /* TODO: check other platforms */ 154 /* TODO: check other platforms */
157 reg = __raw_readl((void __iomem *) AR5K_AR5312_ENABLE); 155 reg = __raw_readl((void __iomem *) AR5K_AR5312_ENABLE);
158 if (to_platform_device(sc->dev)->id == 0) 156 if (to_platform_device(ah->dev)->id == 0)
159 reg |= AR5K_AR5312_ENABLE_WLAN0; 157 reg |= AR5K_AR5312_ENABLE_WLAN0;
160 else 158 else
161 reg |= AR5K_AR5312_ENABLE_WLAN1; 159 reg |= AR5K_AR5312_ENABLE_WLAN1;
@@ -166,13 +164,13 @@ static int ath_ahb_probe(struct platform_device *pdev)
166 * used as pass-through. Disable 2 GHz support in the 164 * used as pass-through. Disable 2 GHz support in the
167 * driver for it 165 * driver for it
168 */ 166 */
169 if (to_platform_device(sc->dev)->id == 0 && 167 if (to_platform_device(ah->dev)->id == 0 &&
170 (bcfg->config->flags & (BD_WLAN0 | BD_WLAN1)) == 168 (bcfg->config->flags & (BD_WLAN0 | BD_WLAN1)) ==
171 (BD_WLAN1 | BD_WLAN0)) 169 (BD_WLAN1 | BD_WLAN0))
172 __set_bit(ATH_STAT_2G_DISABLED, sc->status); 170 __set_bit(ATH_STAT_2G_DISABLED, ah->status);
173 } 171 }
174 172
175 ret = ath5k_init_softc(sc, &ath_ahb_bus_ops); 173 ret = ath5k_init_softc(ah, &ath_ahb_bus_ops);
176 if (ret != 0) { 174 if (ret != 0) {
177 dev_err(&pdev->dev, "failed to attach device, err=%d\n", ret); 175 dev_err(&pdev->dev, "failed to attach device, err=%d\n", ret);
178 ret = -ENODEV; 176 ret = -ENODEV;
@@ -194,13 +192,13 @@ static int ath_ahb_remove(struct platform_device *pdev)
194{ 192{
195 struct ar231x_board_config *bcfg = pdev->dev.platform_data; 193 struct ar231x_board_config *bcfg = pdev->dev.platform_data;
196 struct ieee80211_hw *hw = platform_get_drvdata(pdev); 194 struct ieee80211_hw *hw = platform_get_drvdata(pdev);
197 struct ath5k_softc *sc; 195 struct ath5k_hw *ah;
198 u32 reg; 196 u32 reg;
199 197
200 if (!hw) 198 if (!hw)
201 return 0; 199 return 0;
202 200
203 sc = hw->priv; 201 ah = hw->priv;
204 202
205 if (bcfg->devid >= AR5K_SREV_AR2315_R6) { 203 if (bcfg->devid >= AR5K_SREV_AR2315_R6) {
206 /* Disable WMAC AHB arbitration */ 204 /* Disable WMAC AHB arbitration */
@@ -210,14 +208,14 @@ static int ath_ahb_remove(struct platform_device *pdev)
210 } else { 208 } else {
211 /*Stop DMA access */ 209 /*Stop DMA access */
212 reg = __raw_readl((void __iomem *) AR5K_AR5312_ENABLE); 210 reg = __raw_readl((void __iomem *) AR5K_AR5312_ENABLE);
213 if (to_platform_device(sc->dev)->id == 0) 211 if (to_platform_device(ah->dev)->id == 0)
214 reg &= ~AR5K_AR5312_ENABLE_WLAN0; 212 reg &= ~AR5K_AR5312_ENABLE_WLAN0;
215 else 213 else
216 reg &= ~AR5K_AR5312_ENABLE_WLAN1; 214 reg &= ~AR5K_AR5312_ENABLE_WLAN1;
217 __raw_writel(reg, (void __iomem *) AR5K_AR5312_ENABLE); 215 __raw_writel(reg, (void __iomem *) AR5K_AR5312_ENABLE);
218 } 216 }
219 217
220 ath5k_deinit_softc(sc); 218 ath5k_deinit_softc(ah);
221 platform_set_drvdata(pdev, NULL); 219 platform_set_drvdata(pdev, NULL);
222 ieee80211_free_hw(hw); 220 ieee80211_free_hw(hw);
223 221
diff --git a/drivers/net/wireless/ath/ath5k/ani.c b/drivers/net/wireless/ath/ath5k/ani.c
index 2f0b967a6d8e..603ae15f139b 100644
--- a/drivers/net/wireless/ath/ath5k/ani.c
+++ b/drivers/net/wireless/ath/ath5k/ani.c
@@ -74,7 +74,7 @@ ath5k_ani_set_noise_immunity_level(struct ath5k_hw *ah, int level)
74 static const s8 fr[] = { -78, -80 }; 74 static const s8 fr[] = { -78, -80 };
75#endif 75#endif
76 if (level < 0 || level >= ARRAY_SIZE(sz)) { 76 if (level < 0 || level >= ARRAY_SIZE(sz)) {
77 ATH5K_ERR(ah->ah_sc, "noise immunity level %d out of range", 77 ATH5K_ERR(ah, "noise immunity level %d out of range",
78 level); 78 level);
79 return; 79 return;
80 } 80 }
@@ -88,8 +88,8 @@ ath5k_ani_set_noise_immunity_level(struct ath5k_hw *ah, int level)
88 AR5K_REG_WRITE_BITS(ah, AR5K_PHY_SIG, 88 AR5K_REG_WRITE_BITS(ah, AR5K_PHY_SIG,
89 AR5K_PHY_SIG_FIRPWR, fr[level]); 89 AR5K_PHY_SIG_FIRPWR, fr[level]);
90 90
91 ah->ah_sc->ani_state.noise_imm_level = level; 91 ah->ani_state.noise_imm_level = level;
92 ATH5K_DBG_UNLIMIT(ah->ah_sc, ATH5K_DEBUG_ANI, "new level %d", level); 92 ATH5K_DBG_UNLIMIT(ah, ATH5K_DEBUG_ANI, "new level %d", level);
93} 93}
94 94
95 95
@@ -105,8 +105,8 @@ ath5k_ani_set_spur_immunity_level(struct ath5k_hw *ah, int level)
105 static const int val[] = { 2, 4, 6, 8, 10, 12, 14, 16 }; 105 static const int val[] = { 2, 4, 6, 8, 10, 12, 14, 16 };
106 106
107 if (level < 0 || level >= ARRAY_SIZE(val) || 107 if (level < 0 || level >= ARRAY_SIZE(val) ||
108 level > ah->ah_sc->ani_state.max_spur_level) { 108 level > ah->ani_state.max_spur_level) {
109 ATH5K_ERR(ah->ah_sc, "spur immunity level %d out of range", 109 ATH5K_ERR(ah, "spur immunity level %d out of range",
110 level); 110 level);
111 return; 111 return;
112 } 112 }
@@ -114,8 +114,8 @@ ath5k_ani_set_spur_immunity_level(struct ath5k_hw *ah, int level)
114 AR5K_REG_WRITE_BITS(ah, AR5K_PHY_OFDM_SELFCORR, 114 AR5K_REG_WRITE_BITS(ah, AR5K_PHY_OFDM_SELFCORR,
115 AR5K_PHY_OFDM_SELFCORR_CYPWR_THR1, val[level]); 115 AR5K_PHY_OFDM_SELFCORR_CYPWR_THR1, val[level]);
116 116
117 ah->ah_sc->ani_state.spur_level = level; 117 ah->ani_state.spur_level = level;
118 ATH5K_DBG_UNLIMIT(ah->ah_sc, ATH5K_DEBUG_ANI, "new level %d", level); 118 ATH5K_DBG_UNLIMIT(ah, ATH5K_DEBUG_ANI, "new level %d", level);
119} 119}
120 120
121 121
@@ -130,15 +130,15 @@ ath5k_ani_set_firstep_level(struct ath5k_hw *ah, int level)
130 static const int val[] = { 0, 4, 8 }; 130 static const int val[] = { 0, 4, 8 };
131 131
132 if (level < 0 || level >= ARRAY_SIZE(val)) { 132 if (level < 0 || level >= ARRAY_SIZE(val)) {
133 ATH5K_ERR(ah->ah_sc, "firstep level %d out of range", level); 133 ATH5K_ERR(ah, "firstep level %d out of range", level);
134 return; 134 return;
135 } 135 }
136 136
137 AR5K_REG_WRITE_BITS(ah, AR5K_PHY_SIG, 137 AR5K_REG_WRITE_BITS(ah, AR5K_PHY_SIG,
138 AR5K_PHY_SIG_FIRSTEP, val[level]); 138 AR5K_PHY_SIG_FIRSTEP, val[level]);
139 139
140 ah->ah_sc->ani_state.firstep_level = level; 140 ah->ani_state.firstep_level = level;
141 ATH5K_DBG_UNLIMIT(ah->ah_sc, ATH5K_DEBUG_ANI, "new level %d", level); 141 ATH5K_DBG_UNLIMIT(ah, ATH5K_DEBUG_ANI, "new level %d", level);
142} 142}
143 143
144 144
@@ -178,8 +178,8 @@ ath5k_ani_set_ofdm_weak_signal_detection(struct ath5k_hw *ah, bool on)
178 AR5K_REG_DISABLE_BITS(ah, AR5K_PHY_WEAK_OFDM_LOW_THR, 178 AR5K_REG_DISABLE_BITS(ah, AR5K_PHY_WEAK_OFDM_LOW_THR,
179 AR5K_PHY_WEAK_OFDM_LOW_THR_SELFCOR_EN); 179 AR5K_PHY_WEAK_OFDM_LOW_THR_SELFCOR_EN);
180 180
181 ah->ah_sc->ani_state.ofdm_weak_sig = on; 181 ah->ani_state.ofdm_weak_sig = on;
182 ATH5K_DBG_UNLIMIT(ah->ah_sc, ATH5K_DEBUG_ANI, "turned %s", 182 ATH5K_DBG_UNLIMIT(ah, ATH5K_DEBUG_ANI, "turned %s",
183 on ? "on" : "off"); 183 on ? "on" : "off");
184} 184}
185 185
@@ -195,8 +195,8 @@ ath5k_ani_set_cck_weak_signal_detection(struct ath5k_hw *ah, bool on)
195 static const int val[] = { 8, 6 }; 195 static const int val[] = { 8, 6 };
196 AR5K_REG_WRITE_BITS(ah, AR5K_PHY_CCK_CROSSCORR, 196 AR5K_REG_WRITE_BITS(ah, AR5K_PHY_CCK_CROSSCORR,
197 AR5K_PHY_CCK_CROSSCORR_WEAK_SIG_THR, val[on]); 197 AR5K_PHY_CCK_CROSSCORR_WEAK_SIG_THR, val[on]);
198 ah->ah_sc->ani_state.cck_weak_sig = on; 198 ah->ani_state.cck_weak_sig = on;
199 ATH5K_DBG_UNLIMIT(ah->ah_sc, ATH5K_DEBUG_ANI, "turned %s", 199 ATH5K_DBG_UNLIMIT(ah, ATH5K_DEBUG_ANI, "turned %s",
200 on ? "on" : "off"); 200 on ? "on" : "off");
201} 201}
202 202
@@ -218,7 +218,7 @@ ath5k_ani_raise_immunity(struct ath5k_hw *ah, struct ath5k_ani_state *as,
218{ 218{
219 int rssi = ewma_read(&ah->ah_beacon_rssi_avg); 219 int rssi = ewma_read(&ah->ah_beacon_rssi_avg);
220 220
221 ATH5K_DBG_UNLIMIT(ah->ah_sc, ATH5K_DEBUG_ANI, "raise immunity (%s)", 221 ATH5K_DBG_UNLIMIT(ah, ATH5K_DEBUG_ANI, "raise immunity (%s)",
222 ofdm_trigger ? "ODFM" : "CCK"); 222 ofdm_trigger ? "ODFM" : "CCK");
223 223
224 /* first: raise noise immunity */ 224 /* first: raise noise immunity */
@@ -229,13 +229,13 @@ ath5k_ani_raise_immunity(struct ath5k_hw *ah, struct ath5k_ani_state *as,
229 229
230 /* only OFDM: raise spur immunity level */ 230 /* only OFDM: raise spur immunity level */
231 if (ofdm_trigger && 231 if (ofdm_trigger &&
232 as->spur_level < ah->ah_sc->ani_state.max_spur_level) { 232 as->spur_level < ah->ani_state.max_spur_level) {
233 ath5k_ani_set_spur_immunity_level(ah, as->spur_level + 1); 233 ath5k_ani_set_spur_immunity_level(ah, as->spur_level + 1);
234 return; 234 return;
235 } 235 }
236 236
237 /* AP mode */ 237 /* AP mode */
238 if (ah->ah_sc->opmode == NL80211_IFTYPE_AP) { 238 if (ah->opmode == NL80211_IFTYPE_AP) {
239 if (as->firstep_level < ATH5K_ANI_MAX_FIRSTEP_LVL) 239 if (as->firstep_level < ATH5K_ANI_MAX_FIRSTEP_LVL)
240 ath5k_ani_set_firstep_level(ah, as->firstep_level + 1); 240 ath5k_ani_set_firstep_level(ah, as->firstep_level + 1);
241 return; 241 return;
@@ -248,7 +248,7 @@ ath5k_ani_raise_immunity(struct ath5k_hw *ah, struct ath5k_ani_state *as,
248 * don't shut out a remote node by raising immunity too high. */ 248 * don't shut out a remote node by raising immunity too high. */
249 249
250 if (rssi > ATH5K_ANI_RSSI_THR_HIGH) { 250 if (rssi > ATH5K_ANI_RSSI_THR_HIGH) {
251 ATH5K_DBG_UNLIMIT(ah->ah_sc, ATH5K_DEBUG_ANI, 251 ATH5K_DBG_UNLIMIT(ah, ATH5K_DEBUG_ANI,
252 "beacon RSSI high"); 252 "beacon RSSI high");
253 /* only OFDM: beacon RSSI is high, we can disable ODFM weak 253 /* only OFDM: beacon RSSI is high, we can disable ODFM weak
254 * signal detection */ 254 * signal detection */
@@ -265,7 +265,7 @@ ath5k_ani_raise_immunity(struct ath5k_hw *ah, struct ath5k_ani_state *as,
265 } else if (rssi > ATH5K_ANI_RSSI_THR_LOW) { 265 } else if (rssi > ATH5K_ANI_RSSI_THR_LOW) {
266 /* beacon RSSI in mid range, we need OFDM weak signal detect, 266 /* beacon RSSI in mid range, we need OFDM weak signal detect,
267 * but can raise firstep level */ 267 * but can raise firstep level */
268 ATH5K_DBG_UNLIMIT(ah->ah_sc, ATH5K_DEBUG_ANI, 268 ATH5K_DBG_UNLIMIT(ah, ATH5K_DEBUG_ANI,
269 "beacon RSSI mid"); 269 "beacon RSSI mid");
270 if (ofdm_trigger && as->ofdm_weak_sig == false) 270 if (ofdm_trigger && as->ofdm_weak_sig == false)
271 ath5k_ani_set_ofdm_weak_signal_detection(ah, true); 271 ath5k_ani_set_ofdm_weak_signal_detection(ah, true);
@@ -275,7 +275,7 @@ ath5k_ani_raise_immunity(struct ath5k_hw *ah, struct ath5k_ani_state *as,
275 } else if (ah->ah_current_channel->band == IEEE80211_BAND_2GHZ) { 275 } else if (ah->ah_current_channel->band == IEEE80211_BAND_2GHZ) {
276 /* beacon RSSI is low. in B/G mode turn of OFDM weak signal 276 /* beacon RSSI is low. in B/G mode turn of OFDM weak signal
277 * detect and zero firstep level to maximize CCK sensitivity */ 277 * detect and zero firstep level to maximize CCK sensitivity */
278 ATH5K_DBG_UNLIMIT(ah->ah_sc, ATH5K_DEBUG_ANI, 278 ATH5K_DBG_UNLIMIT(ah, ATH5K_DEBUG_ANI,
279 "beacon RSSI low, 2GHz"); 279 "beacon RSSI low, 2GHz");
280 if (ofdm_trigger && as->ofdm_weak_sig == true) 280 if (ofdm_trigger && as->ofdm_weak_sig == true)
281 ath5k_ani_set_ofdm_weak_signal_detection(ah, false); 281 ath5k_ani_set_ofdm_weak_signal_detection(ah, false);
@@ -303,9 +303,9 @@ ath5k_ani_lower_immunity(struct ath5k_hw *ah, struct ath5k_ani_state *as)
303{ 303{
304 int rssi = ewma_read(&ah->ah_beacon_rssi_avg); 304 int rssi = ewma_read(&ah->ah_beacon_rssi_avg);
305 305
306 ATH5K_DBG_UNLIMIT(ah->ah_sc, ATH5K_DEBUG_ANI, "lower immunity"); 306 ATH5K_DBG_UNLIMIT(ah, ATH5K_DEBUG_ANI, "lower immunity");
307 307
308 if (ah->ah_sc->opmode == NL80211_IFTYPE_AP) { 308 if (ah->opmode == NL80211_IFTYPE_AP) {
309 /* AP mode */ 309 /* AP mode */
310 if (as->firstep_level > 0) { 310 if (as->firstep_level > 0) {
311 ath5k_ani_set_firstep_level(ah, as->firstep_level - 1); 311 ath5k_ani_set_firstep_level(ah, as->firstep_level - 1);
@@ -464,7 +464,7 @@ ath5k_ani_period_restart(struct ath5k_hw *ah, struct ath5k_ani_state *as)
464void 464void
465ath5k_ani_calibration(struct ath5k_hw *ah) 465ath5k_ani_calibration(struct ath5k_hw *ah)
466{ 466{
467 struct ath5k_ani_state *as = &ah->ah_sc->ani_state; 467 struct ath5k_ani_state *as = &ah->ani_state;
468 int listen, ofdm_high, ofdm_low, cck_high, cck_low; 468 int listen, ofdm_high, ofdm_low, cck_high, cck_low;
469 469
470 /* get listen time since last call and add it to the counter because we 470 /* get listen time since last call and add it to the counter because we
@@ -483,9 +483,9 @@ ath5k_ani_calibration(struct ath5k_hw *ah)
483 ofdm_low = as->listen_time * ATH5K_ANI_OFDM_TRIG_LOW / 1000; 483 ofdm_low = as->listen_time * ATH5K_ANI_OFDM_TRIG_LOW / 1000;
484 cck_low = as->listen_time * ATH5K_ANI_CCK_TRIG_LOW / 1000; 484 cck_low = as->listen_time * ATH5K_ANI_CCK_TRIG_LOW / 1000;
485 485
486 ATH5K_DBG_UNLIMIT(ah->ah_sc, ATH5K_DEBUG_ANI, 486 ATH5K_DBG_UNLIMIT(ah, ATH5K_DEBUG_ANI,
487 "listen %d (now %d)", as->listen_time, listen); 487 "listen %d (now %d)", as->listen_time, listen);
488 ATH5K_DBG_UNLIMIT(ah->ah_sc, ATH5K_DEBUG_ANI, 488 ATH5K_DBG_UNLIMIT(ah, ATH5K_DEBUG_ANI,
489 "check high ofdm %d/%d cck %d/%d", 489 "check high ofdm %d/%d cck %d/%d",
490 as->ofdm_errors, ofdm_high, as->cck_errors, cck_high); 490 as->ofdm_errors, ofdm_high, as->cck_errors, cck_high);
491 491
@@ -498,7 +498,7 @@ ath5k_ani_calibration(struct ath5k_hw *ah)
498 } else if (as->listen_time > 5 * ATH5K_ANI_LISTEN_PERIOD) { 498 } else if (as->listen_time > 5 * ATH5K_ANI_LISTEN_PERIOD) {
499 /* If more than 5 (TODO: why 5?) periods have passed and we got 499 /* If more than 5 (TODO: why 5?) periods have passed and we got
500 * relatively little errors we can try to lower immunity */ 500 * relatively little errors we can try to lower immunity */
501 ATH5K_DBG_UNLIMIT(ah->ah_sc, ATH5K_DEBUG_ANI, 501 ATH5K_DBG_UNLIMIT(ah, ATH5K_DEBUG_ANI,
502 "check low ofdm %d/%d cck %d/%d", 502 "check low ofdm %d/%d cck %d/%d",
503 as->ofdm_errors, ofdm_low, as->cck_errors, cck_low); 503 as->ofdm_errors, ofdm_low, as->cck_errors, cck_low);
504 504
@@ -525,7 +525,7 @@ ath5k_ani_calibration(struct ath5k_hw *ah)
525void 525void
526ath5k_ani_mib_intr(struct ath5k_hw *ah) 526ath5k_ani_mib_intr(struct ath5k_hw *ah)
527{ 527{
528 struct ath5k_ani_state *as = &ah->ah_sc->ani_state; 528 struct ath5k_ani_state *as = &ah->ani_state;
529 529
530 /* nothing to do here if HW does not have PHY error counters - they 530 /* nothing to do here if HW does not have PHY error counters - they
531 * can't be the reason for the MIB interrupt then */ 531 * can't be the reason for the MIB interrupt then */
@@ -536,7 +536,7 @@ ath5k_ani_mib_intr(struct ath5k_hw *ah)
536 ath5k_hw_reg_write(ah, 0, AR5K_OFDM_FIL_CNT); 536 ath5k_hw_reg_write(ah, 0, AR5K_OFDM_FIL_CNT);
537 ath5k_hw_reg_write(ah, 0, AR5K_CCK_FIL_CNT); 537 ath5k_hw_reg_write(ah, 0, AR5K_CCK_FIL_CNT);
538 538
539 if (ah->ah_sc->ani_state.ani_mode != ATH5K_ANI_MODE_AUTO) 539 if (ah->ani_state.ani_mode != ATH5K_ANI_MODE_AUTO)
540 return; 540 return;
541 541
542 /* If one of the errors triggered, we can get a superfluous second 542 /* If one of the errors triggered, we can get a superfluous second
@@ -547,7 +547,7 @@ ath5k_ani_mib_intr(struct ath5k_hw *ah)
547 547
548 if (as->ofdm_errors > ATH5K_ANI_OFDM_TRIG_HIGH || 548 if (as->ofdm_errors > ATH5K_ANI_OFDM_TRIG_HIGH ||
549 as->cck_errors > ATH5K_ANI_CCK_TRIG_HIGH) 549 as->cck_errors > ATH5K_ANI_CCK_TRIG_HIGH)
550 tasklet_schedule(&ah->ah_sc->ani_tasklet); 550 tasklet_schedule(&ah->ani_tasklet);
551} 551}
552 552
553 553
@@ -561,16 +561,16 @@ void
561ath5k_ani_phy_error_report(struct ath5k_hw *ah, 561ath5k_ani_phy_error_report(struct ath5k_hw *ah,
562 enum ath5k_phy_error_code phyerr) 562 enum ath5k_phy_error_code phyerr)
563{ 563{
564 struct ath5k_ani_state *as = &ah->ah_sc->ani_state; 564 struct ath5k_ani_state *as = &ah->ani_state;
565 565
566 if (phyerr == AR5K_RX_PHY_ERROR_OFDM_TIMING) { 566 if (phyerr == AR5K_RX_PHY_ERROR_OFDM_TIMING) {
567 as->ofdm_errors++; 567 as->ofdm_errors++;
568 if (as->ofdm_errors > ATH5K_ANI_OFDM_TRIG_HIGH) 568 if (as->ofdm_errors > ATH5K_ANI_OFDM_TRIG_HIGH)
569 tasklet_schedule(&ah->ah_sc->ani_tasklet); 569 tasklet_schedule(&ah->ani_tasklet);
570 } else if (phyerr == AR5K_RX_PHY_ERROR_CCK_TIMING) { 570 } else if (phyerr == AR5K_RX_PHY_ERROR_CCK_TIMING) {
571 as->cck_errors++; 571 as->cck_errors++;
572 if (as->cck_errors > ATH5K_ANI_CCK_TRIG_HIGH) 572 if (as->cck_errors > ATH5K_ANI_CCK_TRIG_HIGH)
573 tasklet_schedule(&ah->ah_sc->ani_tasklet); 573 tasklet_schedule(&ah->ani_tasklet);
574 } 574 }
575} 575}
576 576
@@ -631,24 +631,24 @@ ath5k_ani_init(struct ath5k_hw *ah, enum ath5k_ani_mode mode)
631 return; 631 return;
632 632
633 if (mode < ATH5K_ANI_MODE_OFF || mode > ATH5K_ANI_MODE_AUTO) { 633 if (mode < ATH5K_ANI_MODE_OFF || mode > ATH5K_ANI_MODE_AUTO) {
634 ATH5K_ERR(ah->ah_sc, "ANI mode %d out of range", mode); 634 ATH5K_ERR(ah, "ANI mode %d out of range", mode);
635 return; 635 return;
636 } 636 }
637 637
638 /* clear old state information */ 638 /* clear old state information */
639 memset(&ah->ah_sc->ani_state, 0, sizeof(ah->ah_sc->ani_state)); 639 memset(&ah->ani_state, 0, sizeof(ah->ani_state));
640 640
641 /* older hardware has more spur levels than newer */ 641 /* older hardware has more spur levels than newer */
642 if (ah->ah_mac_srev < AR5K_SREV_AR2414) 642 if (ah->ah_mac_srev < AR5K_SREV_AR2414)
643 ah->ah_sc->ani_state.max_spur_level = 7; 643 ah->ani_state.max_spur_level = 7;
644 else 644 else
645 ah->ah_sc->ani_state.max_spur_level = 2; 645 ah->ani_state.max_spur_level = 2;
646 646
647 /* initial values for our ani parameters */ 647 /* initial values for our ani parameters */
648 if (mode == ATH5K_ANI_MODE_OFF) { 648 if (mode == ATH5K_ANI_MODE_OFF) {
649 ATH5K_DBG_UNLIMIT(ah->ah_sc, ATH5K_DEBUG_ANI, "ANI off\n"); 649 ATH5K_DBG_UNLIMIT(ah, ATH5K_DEBUG_ANI, "ANI off\n");
650 } else if (mode == ATH5K_ANI_MODE_MANUAL_LOW) { 650 } else if (mode == ATH5K_ANI_MODE_MANUAL_LOW) {
651 ATH5K_DBG_UNLIMIT(ah->ah_sc, ATH5K_DEBUG_ANI, 651 ATH5K_DBG_UNLIMIT(ah, ATH5K_DEBUG_ANI,
652 "ANI manual low -> high sensitivity\n"); 652 "ANI manual low -> high sensitivity\n");
653 ath5k_ani_set_noise_immunity_level(ah, 0); 653 ath5k_ani_set_noise_immunity_level(ah, 0);
654 ath5k_ani_set_spur_immunity_level(ah, 0); 654 ath5k_ani_set_spur_immunity_level(ah, 0);
@@ -656,17 +656,17 @@ ath5k_ani_init(struct ath5k_hw *ah, enum ath5k_ani_mode mode)
656 ath5k_ani_set_ofdm_weak_signal_detection(ah, true); 656 ath5k_ani_set_ofdm_weak_signal_detection(ah, true);
657 ath5k_ani_set_cck_weak_signal_detection(ah, true); 657 ath5k_ani_set_cck_weak_signal_detection(ah, true);
658 } else if (mode == ATH5K_ANI_MODE_MANUAL_HIGH) { 658 } else if (mode == ATH5K_ANI_MODE_MANUAL_HIGH) {
659 ATH5K_DBG_UNLIMIT(ah->ah_sc, ATH5K_DEBUG_ANI, 659 ATH5K_DBG_UNLIMIT(ah, ATH5K_DEBUG_ANI,
660 "ANI manual high -> low sensitivity\n"); 660 "ANI manual high -> low sensitivity\n");
661 ath5k_ani_set_noise_immunity_level(ah, 661 ath5k_ani_set_noise_immunity_level(ah,
662 ATH5K_ANI_MAX_NOISE_IMM_LVL); 662 ATH5K_ANI_MAX_NOISE_IMM_LVL);
663 ath5k_ani_set_spur_immunity_level(ah, 663 ath5k_ani_set_spur_immunity_level(ah,
664 ah->ah_sc->ani_state.max_spur_level); 664 ah->ani_state.max_spur_level);
665 ath5k_ani_set_firstep_level(ah, ATH5K_ANI_MAX_FIRSTEP_LVL); 665 ath5k_ani_set_firstep_level(ah, ATH5K_ANI_MAX_FIRSTEP_LVL);
666 ath5k_ani_set_ofdm_weak_signal_detection(ah, false); 666 ath5k_ani_set_ofdm_weak_signal_detection(ah, false);
667 ath5k_ani_set_cck_weak_signal_detection(ah, false); 667 ath5k_ani_set_cck_weak_signal_detection(ah, false);
668 } else if (mode == ATH5K_ANI_MODE_AUTO) { 668 } else if (mode == ATH5K_ANI_MODE_AUTO) {
669 ATH5K_DBG_UNLIMIT(ah->ah_sc, ATH5K_DEBUG_ANI, "ANI auto\n"); 669 ATH5K_DBG_UNLIMIT(ah, ATH5K_DEBUG_ANI, "ANI auto\n");
670 ath5k_ani_set_noise_immunity_level(ah, 0); 670 ath5k_ani_set_noise_immunity_level(ah, 0);
671 ath5k_ani_set_spur_immunity_level(ah, 0); 671 ath5k_ani_set_spur_immunity_level(ah, 0);
672 ath5k_ani_set_firstep_level(ah, 0); 672 ath5k_ani_set_firstep_level(ah, 0);
@@ -692,7 +692,7 @@ ath5k_ani_init(struct ath5k_hw *ah, enum ath5k_ani_mode mode)
692 ~AR5K_RX_FILTER_PHYERR); 692 ~AR5K_RX_FILTER_PHYERR);
693 } 693 }
694 694
695 ah->ah_sc->ani_state.ani_mode = mode; 695 ah->ani_state.ani_mode = mode;
696} 696}
697 697
698 698
diff --git a/drivers/net/wireless/ath/ath5k/ath5k.h b/drivers/net/wireless/ath/ath5k/ath5k.h
index 8ff17941bb28..277d5cbe0068 100644
--- a/drivers/net/wireless/ath/ath5k/ath5k.h
+++ b/drivers/net/wireless/ath/ath5k/ath5k.h
@@ -24,8 +24,10 @@
24#define CHAN_DEBUG 0 24#define CHAN_DEBUG 0
25 25
26#include <linux/io.h> 26#include <linux/io.h>
27#include <linux/interrupt.h>
27#include <linux/types.h> 28#include <linux/types.h>
28#include <linux/average.h> 29#include <linux/average.h>
30#include <linux/leds.h>
29#include <net/mac80211.h> 31#include <net/mac80211.h>
30 32
31/* RX/TX descriptor hw structs 33/* RX/TX descriptor hw structs
@@ -36,7 +38,9 @@
36 * TODO: Make a more generic struct (eg. add more stuff to ath5k_capabilities) 38 * TODO: Make a more generic struct (eg. add more stuff to ath5k_capabilities)
37 * and clean up common bits, then introduce set/get functions in eeprom.c */ 39 * and clean up common bits, then introduce set/get functions in eeprom.c */
38#include "eeprom.h" 40#include "eeprom.h"
41#include "debug.h"
39#include "../ath.h" 42#include "../ath.h"
43#include "ani.h"
40 44
41/* PCI IDs */ 45/* PCI IDs */
42#define PCI_DEVICE_ID_ATHEROS_AR5210 0x0007 /* AR5210 */ 46#define PCI_DEVICE_ID_ATHEROS_AR5210 0x0007 /* AR5210 */
@@ -538,6 +542,27 @@ enum ath5k_tx_queue_id {
538#define AR5K_TXQ_FLAG_COMPRESSION_ENABLE 0x2000 /* Enable hw compression -not implemented-*/ 542#define AR5K_TXQ_FLAG_COMPRESSION_ENABLE 0x2000 /* Enable hw compression -not implemented-*/
539 543
540/* 544/*
545 * Data transmit queue state. One of these exists for each
546 * hardware transmit queue. Packets sent to us from above
547 * are assigned to queues based on their priority. Not all
548 * devices support a complete set of hardware transmit queues.
549 * For those devices the array sc_ac2q will map multiple
550 * priorities to fewer hardware queues (typically all to one
551 * hardware queue).
552 */
553struct ath5k_txq {
554 unsigned int qnum; /* hardware q number */
555 u32 *link; /* link ptr in last TX desc */
556 struct list_head q; /* transmit queue */
557 spinlock_t lock; /* lock on q and link */
558 bool setup;
559 int txq_len; /* number of queued buffers */
560 int txq_max; /* max allowed num of queued buffers */
561 bool txq_poll_mark;
562 unsigned int txq_stuck; /* informational counter */
563};
564
565/*
541 * A struct to hold tx queue's parameters 566 * A struct to hold tx queue's parameters
542 */ 567 */
543struct ath5k_txq_info { 568struct ath5k_txq_info {
@@ -947,35 +972,6 @@ enum ath5k_power_mode {
947#define AR5K_SOFTLED_ON 0 972#define AR5K_SOFTLED_ON 0
948#define AR5K_SOFTLED_OFF 1 973#define AR5K_SOFTLED_OFF 1
949 974
950/*
951 * Chipset capabilities -see ath5k_hw_get_capability-
952 * get_capability function is not yet fully implemented
953 * in ath5k so most of these don't work yet...
954 * TODO: Implement these & merge with _TUNE_ stuff above
955 */
956enum ath5k_capability_type {
957 AR5K_CAP_REG_DMN = 0, /* Used to get current reg. domain id */
958 AR5K_CAP_TKIP_MIC = 2, /* Can handle TKIP MIC in hardware */
959 AR5K_CAP_TKIP_SPLIT = 3, /* TKIP uses split keys */
960 AR5K_CAP_PHYCOUNTERS = 4, /* PHY error counters */
961 AR5K_CAP_DIVERSITY = 5, /* Supports fast diversity */
962 AR5K_CAP_NUM_TXQUEUES = 6, /* Used to get max number of hw txqueues */
963 AR5K_CAP_VEOL = 7, /* Supports virtual EOL */
964 AR5K_CAP_COMPRESSION = 8, /* Supports compression */
965 AR5K_CAP_BURST = 9, /* Supports packet bursting */
966 AR5K_CAP_FASTFRAME = 10, /* Supports fast frames */
967 AR5K_CAP_TXPOW = 11, /* Used to get global tx power limit */
968 AR5K_CAP_TPC = 12, /* Can do per-packet tx power control (needed for 802.11a) */
969 AR5K_CAP_BSSIDMASK = 13, /* Supports bssid mask */
970 AR5K_CAP_MCAST_KEYSRCH = 14, /* Supports multicast key search */
971 AR5K_CAP_TSF_ADJUST = 15, /* Supports beacon tsf adjust */
972 AR5K_CAP_XR = 16, /* Supports XR mode */
973 AR5K_CAP_WME_TKIPMIC = 17, /* Supports TKIP MIC when using WMM */
974 AR5K_CAP_CHAN_HALFRATE = 18, /* Supports half rate channels */
975 AR5K_CAP_CHAN_QUARTERRATE = 19, /* Supports quarter rate channels */
976 AR5K_CAP_RFSILENT = 20, /* Supports RFsilent */
977};
978
979 975
980/* XXX: we *may* move cap_range stuff to struct wiphy */ 976/* XXX: we *may* move cap_range stuff to struct wiphy */
981struct ath5k_capabilities { 977struct ath5k_capabilities {
@@ -1027,9 +1023,66 @@ struct ath5k_avg_val {
1027 int avg_weight; 1023 int avg_weight;
1028}; 1024};
1029 1025
1030/***************************************\ 1026#define ATH5K_LED_MAX_NAME_LEN 31
1031 HARDWARE ABSTRACTION LAYER STRUCTURE 1027
1032\***************************************/ 1028/*
1029 * State for LED triggers
1030 */
1031struct ath5k_led {
1032 char name[ATH5K_LED_MAX_NAME_LEN + 1]; /* name of the LED in sysfs */
1033 struct ath5k_hw *ah; /* driver state */
1034 struct led_classdev led_dev; /* led classdev */
1035};
1036
1037/* Rfkill */
1038struct ath5k_rfkill {
1039 /* GPIO PIN for rfkill */
1040 u16 gpio;
1041 /* polarity of rfkill GPIO PIN */
1042 bool polarity;
1043 /* RFKILL toggle tasklet */
1044 struct tasklet_struct toggleq;
1045};
1046
1047/* statistics */
1048struct ath5k_statistics {
1049 /* antenna use */
1050 unsigned int antenna_rx[5]; /* frames count per antenna RX */
1051 unsigned int antenna_tx[5]; /* frames count per antenna TX */
1052
1053 /* frame errors */
1054 unsigned int rx_all_count; /* all RX frames, including errors */
1055 unsigned int tx_all_count; /* all TX frames, including errors */
1056 unsigned int rx_bytes_count; /* all RX bytes, including errored pkts
1057 * and the MAC headers for each packet
1058 */
1059 unsigned int tx_bytes_count; /* all TX bytes, including errored pkts
1060 * and the MAC headers and padding for
1061 * each packet.
1062 */
1063 unsigned int rxerr_crc;
1064 unsigned int rxerr_phy;
1065 unsigned int rxerr_phy_code[32];
1066 unsigned int rxerr_fifo;
1067 unsigned int rxerr_decrypt;
1068 unsigned int rxerr_mic;
1069 unsigned int rxerr_proc;
1070 unsigned int rxerr_jumbo;
1071 unsigned int txerr_retry;
1072 unsigned int txerr_fifo;
1073 unsigned int txerr_filt;
1074
1075 /* MIB counters */
1076 unsigned int ack_fail;
1077 unsigned int rts_fail;
1078 unsigned int rts_ok;
1079 unsigned int fcs_error;
1080 unsigned int beacons;
1081
1082 unsigned int mib_intr;
1083 unsigned int rxorn_intr;
1084 unsigned int rxeol_intr;
1085};
1033 1086
1034/* 1087/*
1035 * Misc defines 1088 * Misc defines
@@ -1038,12 +1091,114 @@ struct ath5k_avg_val {
1038#define AR5K_MAX_GPIO 10 1091#define AR5K_MAX_GPIO 10
1039#define AR5K_MAX_RF_BANKS 8 1092#define AR5K_MAX_RF_BANKS 8
1040 1093
1041/* TODO: Clean up and merge with ath5k_softc */ 1094#if CHAN_DEBUG
1095#define ATH_CHAN_MAX (26 + 26 + 26 + 200 + 200)
1096#else
1097#define ATH_CHAN_MAX (14 + 14 + 14 + 252 + 20)
1098#endif
1099
1100#define ATH_RXBUF 40 /* number of RX buffers */
1101#define ATH_TXBUF 200 /* number of TX buffers */
1102#define ATH_BCBUF 4 /* number of beacon buffers */
1103#define ATH5K_TXQ_LEN_MAX (ATH_TXBUF / 4) /* bufs per queue */
1104#define ATH5K_TXQ_LEN_LOW (ATH5K_TXQ_LEN_MAX / 2) /* low mark */
1105
1106/* Driver state associated with an instance of a device */
1042struct ath5k_hw { 1107struct ath5k_hw {
1043 struct ath_common common; 1108 struct ath_common common;
1044 1109
1045 struct ath5k_softc *ah_sc; 1110 struct pci_dev *pdev;
1046 void __iomem *ah_iobase; 1111 struct device *dev; /* for dma mapping */
1112 int irq;
1113 u16 devid;
1114 void __iomem *iobase; /* address of the device */
1115 struct mutex lock; /* dev-level lock */
1116 struct ieee80211_hw *hw; /* IEEE 802.11 common */
1117 struct ieee80211_supported_band sbands[IEEE80211_NUM_BANDS];
1118 struct ieee80211_channel channels[ATH_CHAN_MAX];
1119 struct ieee80211_rate rates[IEEE80211_NUM_BANDS][AR5K_MAX_RATES];
1120 s8 rate_idx[IEEE80211_NUM_BANDS][AR5K_MAX_RATES];
1121 enum nl80211_iftype opmode;
1122
1123#ifdef CONFIG_ATH5K_DEBUG
1124 struct ath5k_dbg_info debug; /* debug info */
1125#endif /* CONFIG_ATH5K_DEBUG */
1126
1127 struct ath5k_buf *bufptr; /* allocated buffer ptr */
1128 struct ath5k_desc *desc; /* TX/RX descriptors */
1129 dma_addr_t desc_daddr; /* DMA (physical) address */
1130 size_t desc_len; /* size of TX/RX descriptors */
1131
1132 DECLARE_BITMAP(status, 6);
1133#define ATH_STAT_INVALID 0 /* disable hardware accesses */
1134#define ATH_STAT_MRRETRY 1 /* multi-rate retry support */
1135#define ATH_STAT_PROMISC 2
1136#define ATH_STAT_LEDSOFT 3 /* enable LED gpio status */
1137#define ATH_STAT_STARTED 4 /* opened & irqs enabled */
1138#define ATH_STAT_2G_DISABLED 5 /* multiband radio without 2G */
1139
1140 unsigned int filter_flags; /* HW flags, AR5K_RX_FILTER_* */
1141 struct ieee80211_channel *curchan; /* current h/w channel */
1142
1143 u16 nvifs;
1144
1145 enum ath5k_int imask; /* interrupt mask copy */
1146
1147 spinlock_t irqlock;
1148 bool rx_pending; /* rx tasklet pending */
1149 bool tx_pending; /* tx tasklet pending */
1150
1151 u8 lladdr[ETH_ALEN];
1152 u8 bssidmask[ETH_ALEN];
1153
1154 unsigned int led_pin, /* GPIO pin for driving LED */
1155 led_on; /* pin setting for LED on */
1156
1157 struct work_struct reset_work; /* deferred chip reset */
1158
1159 unsigned int rxbufsize; /* rx size based on mtu */
1160 struct list_head rxbuf; /* receive buffer */
1161 spinlock_t rxbuflock;
1162 u32 *rxlink; /* link ptr in last RX desc */
1163 struct tasklet_struct rxtq; /* rx intr tasklet */
1164 struct ath5k_led rx_led; /* rx led */
1165
1166 struct list_head txbuf; /* transmit buffer */
1167 spinlock_t txbuflock;
1168 unsigned int txbuf_len; /* buf count in txbuf list */
1169 struct ath5k_txq txqs[AR5K_NUM_TX_QUEUES]; /* tx queues */
1170 struct tasklet_struct txtq; /* tx intr tasklet */
1171 struct ath5k_led tx_led; /* tx led */
1172
1173 struct ath5k_rfkill rf_kill;
1174
1175 struct tasklet_struct calib; /* calibration tasklet */
1176
1177 spinlock_t block; /* protects beacon */
1178 struct tasklet_struct beacontq; /* beacon intr tasklet */
1179 struct list_head bcbuf; /* beacon buffer */
1180 struct ieee80211_vif *bslot[ATH_BCBUF];
1181 u16 num_ap_vifs;
1182 u16 num_adhoc_vifs;
1183 unsigned int bhalq, /* SW q for outgoing beacons */
1184 bmisscount, /* missed beacon transmits */
1185 bintval, /* beacon interval in TU */
1186 bsent;
1187 unsigned int nexttbtt; /* next beacon time in TU */
1188 struct ath5k_txq *cabq; /* content after beacon */
1189
1190 int power_level; /* Requested tx power in dBm */
1191 bool assoc; /* associate state */
1192 bool enable_beacon; /* true if beacons are on */
1193
1194 struct ath5k_statistics stats;
1195
1196 struct ath5k_ani_state ani_state;
1197 struct tasklet_struct ani_tasklet; /* ANI calibration */
1198
1199 struct delayed_work tx_complete_work;
1200
1201 struct survey_info survey; /* collected survey info */
1047 1202
1048 enum ath5k_int ah_imr; 1203 enum ath5k_int ah_imr;
1049 1204
@@ -1172,43 +1327,43 @@ struct ath_bus_ops {
1172extern const struct ieee80211_ops ath5k_hw_ops; 1327extern const struct ieee80211_ops ath5k_hw_ops;
1173 1328
1174/* Initialization and detach functions */ 1329/* Initialization and detach functions */
1175int ath5k_init_softc(struct ath5k_softc *sc, const struct ath_bus_ops *bus_ops); 1330int ath5k_init_softc(struct ath5k_hw *ah, const struct ath_bus_ops *bus_ops);
1176void ath5k_deinit_softc(struct ath5k_softc *sc); 1331void ath5k_deinit_softc(struct ath5k_hw *ah);
1177int ath5k_hw_init(struct ath5k_softc *sc); 1332int ath5k_hw_init(struct ath5k_hw *ah);
1178void ath5k_hw_deinit(struct ath5k_hw *ah); 1333void ath5k_hw_deinit(struct ath5k_hw *ah);
1179 1334
1180int ath5k_sysfs_register(struct ath5k_softc *sc); 1335int ath5k_sysfs_register(struct ath5k_hw *ah);
1181void ath5k_sysfs_unregister(struct ath5k_softc *sc); 1336void ath5k_sysfs_unregister(struct ath5k_hw *ah);
1182 1337
1183/* base.c */ 1338/* base.c */
1184struct ath5k_buf; 1339struct ath5k_buf;
1185struct ath5k_txq; 1340struct ath5k_txq;
1186 1341
1187void ath5k_set_beacon_filter(struct ieee80211_hw *hw, bool enable); 1342void ath5k_set_beacon_filter(struct ieee80211_hw *hw, bool enable);
1188bool ath5k_any_vif_assoc(struct ath5k_softc *sc); 1343bool ath5k_any_vif_assoc(struct ath5k_hw *ah);
1189void ath5k_tx_queue(struct ieee80211_hw *hw, struct sk_buff *skb, 1344void ath5k_tx_queue(struct ieee80211_hw *hw, struct sk_buff *skb,
1190 struct ath5k_txq *txq); 1345 struct ath5k_txq *txq);
1191int ath5k_init_hw(struct ath5k_softc *sc); 1346int ath5k_start(struct ieee80211_hw *hw);
1192int ath5k_stop_hw(struct ath5k_softc *sc); 1347void ath5k_stop(struct ieee80211_hw *hw);
1193void ath5k_mode_setup(struct ath5k_softc *sc, struct ieee80211_vif *vif); 1348void ath5k_mode_setup(struct ath5k_hw *ah, struct ieee80211_vif *vif);
1194void ath5k_update_bssid_mask_and_opmode(struct ath5k_softc *sc, 1349void ath5k_update_bssid_mask_and_opmode(struct ath5k_hw *ah,
1195 struct ieee80211_vif *vif); 1350 struct ieee80211_vif *vif);
1196int ath5k_chan_set(struct ath5k_softc *sc, struct ieee80211_channel *chan); 1351int ath5k_chan_set(struct ath5k_hw *ah, struct ieee80211_channel *chan);
1197void ath5k_beacon_update_timers(struct ath5k_softc *sc, u64 bc_tsf); 1352void ath5k_beacon_update_timers(struct ath5k_hw *ah, u64 bc_tsf);
1198int ath5k_beacon_update(struct ieee80211_hw *hw, struct ieee80211_vif *vif); 1353int ath5k_beacon_update(struct ieee80211_hw *hw, struct ieee80211_vif *vif);
1199void ath5k_beacon_config(struct ath5k_softc *sc); 1354void ath5k_beacon_config(struct ath5k_hw *ah);
1200void ath5k_txbuf_free_skb(struct ath5k_softc *sc, struct ath5k_buf *bf); 1355void ath5k_txbuf_free_skb(struct ath5k_hw *ah, struct ath5k_buf *bf);
1201void ath5k_rxbuf_free_skb(struct ath5k_softc *sc, struct ath5k_buf *bf); 1356void ath5k_rxbuf_free_skb(struct ath5k_hw *ah, struct ath5k_buf *bf);
1202 1357
1203/*Chip id helper functions */ 1358/*Chip id helper functions */
1204const char *ath5k_chip_name(enum ath5k_srev_type type, u_int16_t val); 1359const char *ath5k_chip_name(enum ath5k_srev_type type, u_int16_t val);
1205int ath5k_hw_read_srev(struct ath5k_hw *ah); 1360int ath5k_hw_read_srev(struct ath5k_hw *ah);
1206 1361
1207/* LED functions */ 1362/* LED functions */
1208int ath5k_init_leds(struct ath5k_softc *sc); 1363int ath5k_init_leds(struct ath5k_hw *ah);
1209void ath5k_led_enable(struct ath5k_softc *sc); 1364void ath5k_led_enable(struct ath5k_hw *ah);
1210void ath5k_led_off(struct ath5k_softc *sc); 1365void ath5k_led_off(struct ath5k_hw *ah);
1211void ath5k_unregister_leds(struct ath5k_softc *sc); 1366void ath5k_unregister_leds(struct ath5k_hw *ah);
1212 1367
1213 1368
1214/* Reset Functions */ 1369/* Reset Functions */
@@ -1322,9 +1477,6 @@ void ath5k_rfkill_hw_stop(struct ath5k_hw *ah);
1322 1477
1323/* Misc functions TODO: Cleanup */ 1478/* Misc functions TODO: Cleanup */
1324int ath5k_hw_set_capabilities(struct ath5k_hw *ah); 1479int ath5k_hw_set_capabilities(struct ath5k_hw *ah);
1325int ath5k_hw_get_capability(struct ath5k_hw *ah,
1326 enum ath5k_capability_type cap_type, u32 capability,
1327 u32 *result);
1328int ath5k_hw_enable_pspoll(struct ath5k_hw *ah, u8 *bssid, u16 assoc_id); 1480int ath5k_hw_enable_pspoll(struct ath5k_hw *ah, u8 *bssid, u16 assoc_id);
1329int ath5k_hw_disable_pspoll(struct ath5k_hw *ah); 1481int ath5k_hw_disable_pspoll(struct ath5k_hw *ah);
1330 1482
@@ -1384,7 +1536,7 @@ static inline void __iomem *ath5k_ahb_reg(struct ath5k_hw *ah, u16 reg)
1384 (ah->ah_mac_srev >= AR5K_SREV_AR2315_R6))) 1536 (ah->ah_mac_srev >= AR5K_SREV_AR2315_R6)))
1385 return AR5K_AR2315_PCI_BASE + reg; 1537 return AR5K_AR2315_PCI_BASE + reg;
1386 1538
1387 return ah->ah_iobase + reg; 1539 return ah->iobase + reg;
1388} 1540}
1389 1541
1390static inline u32 ath5k_hw_reg_read(struct ath5k_hw *ah, u16 reg) 1542static inline u32 ath5k_hw_reg_read(struct ath5k_hw *ah, u16 reg)
@@ -1401,12 +1553,12 @@ static inline void ath5k_hw_reg_write(struct ath5k_hw *ah, u32 val, u16 reg)
1401 1553
1402static inline u32 ath5k_hw_reg_read(struct ath5k_hw *ah, u16 reg) 1554static inline u32 ath5k_hw_reg_read(struct ath5k_hw *ah, u16 reg)
1403{ 1555{
1404 return ioread32(ah->ah_iobase + reg); 1556 return ioread32(ah->iobase + reg);
1405} 1557}
1406 1558
1407static inline void ath5k_hw_reg_write(struct ath5k_hw *ah, u32 val, u16 reg) 1559static inline void ath5k_hw_reg_write(struct ath5k_hw *ah, u32 val, u16 reg)
1408{ 1560{
1409 iowrite32(val, ah->ah_iobase + reg); 1561 iowrite32(val, ah->iobase + reg);
1410} 1562}
1411 1563
1412#endif 1564#endif
diff --git a/drivers/net/wireless/ath/ath5k/attach.c b/drivers/net/wireless/ath/ath5k/attach.c
index 14dc52e4b50a..f8a6b380d96d 100644
--- a/drivers/net/wireless/ath/ath5k/attach.c
+++ b/drivers/net/wireless/ath/ath5k/attach.c
@@ -59,7 +59,7 @@ static int ath5k_hw_post(struct ath5k_hw *ah)
59 cur_val = ath5k_hw_reg_read(ah, cur_reg); 59 cur_val = ath5k_hw_reg_read(ah, cur_reg);
60 60
61 if (cur_val != var_pattern) { 61 if (cur_val != var_pattern) {
62 ATH5K_ERR(ah->ah_sc, "POST Failed !!!\n"); 62 ATH5K_ERR(ah, "POST Failed !!!\n");
63 return -EAGAIN; 63 return -EAGAIN;
64 } 64 }
65 65
@@ -74,7 +74,7 @@ static int ath5k_hw_post(struct ath5k_hw *ah)
74 cur_val = ath5k_hw_reg_read(ah, cur_reg); 74 cur_val = ath5k_hw_reg_read(ah, cur_reg);
75 75
76 if (cur_val != var_pattern) { 76 if (cur_val != var_pattern) {
77 ATH5K_ERR(ah->ah_sc, "POST Failed !!!\n"); 77 ATH5K_ERR(ah, "POST Failed !!!\n");
78 return -EAGAIN; 78 return -EAGAIN;
79 } 79 }
80 80
@@ -95,19 +95,18 @@ static int ath5k_hw_post(struct ath5k_hw *ah)
95/** 95/**
96 * ath5k_hw_init - Check if hw is supported and init the needed structs 96 * ath5k_hw_init - Check if hw is supported and init the needed structs
97 * 97 *
98 * @sc: The &struct ath5k_softc we got from the driver's init_softc function 98 * @ah: The &struct ath5k_hw we got from the driver's init_softc function
99 * 99 *
100 * Check if the device is supported, perform a POST and initialize the needed 100 * Check if the device is supported, perform a POST and initialize the needed
101 * structs. Returns -ENOMEM if we don't have memory for the needed structs, 101 * structs. Returns -ENOMEM if we don't have memory for the needed structs,
102 * -ENODEV if the device is not supported or prints an error msg if something 102 * -ENODEV if the device is not supported or prints an error msg if something
103 * else went wrong. 103 * else went wrong.
104 */ 104 */
105int ath5k_hw_init(struct ath5k_softc *sc) 105int ath5k_hw_init(struct ath5k_hw *ah)
106{ 106{
107 static const u8 zero_mac[ETH_ALEN] = { }; 107 static const u8 zero_mac[ETH_ALEN] = { };
108 struct ath5k_hw *ah = sc->ah;
109 struct ath_common *common = ath5k_hw_common(ah); 108 struct ath_common *common = ath5k_hw_common(ah);
110 struct pci_dev *pdev = sc->pdev; 109 struct pci_dev *pdev = ah->pdev;
111 struct ath5k_eeprom_info *ee; 110 struct ath5k_eeprom_info *ee;
112 int ret; 111 int ret;
113 u32 srev; 112 u32 srev;
@@ -123,8 +122,8 @@ int ath5k_hw_init(struct ath5k_softc *sc)
123 ah->ah_retry_long = AR5K_INIT_RETRY_LONG; 122 ah->ah_retry_long = AR5K_INIT_RETRY_LONG;
124 ah->ah_ant_mode = AR5K_ANTMODE_DEFAULT; 123 ah->ah_ant_mode = AR5K_ANTMODE_DEFAULT;
125 ah->ah_noise_floor = -95; /* until first NF calibration is run */ 124 ah->ah_noise_floor = -95; /* until first NF calibration is run */
126 sc->ani_state.ani_mode = ATH5K_ANI_MODE_AUTO; 125 ah->ani_state.ani_mode = ATH5K_ANI_MODE_AUTO;
127 ah->ah_current_channel = &sc->channels[0]; 126 ah->ah_current_channel = &ah->channels[0];
128 127
129 /* 128 /*
130 * Find the mac version 129 * Find the mac version
@@ -237,7 +236,7 @@ int ath5k_hw_init(struct ath5k_softc *sc)
237 ah->ah_single_chip = true; 236 ah->ah_single_chip = true;
238 ah->ah_radio_5ghz_revision = AR5K_SREV_RAD_2413; 237 ah->ah_radio_5ghz_revision = AR5K_SREV_RAD_2413;
239 } else { 238 } else {
240 ATH5K_ERR(sc, "Couldn't identify radio revision.\n"); 239 ATH5K_ERR(ah, "Couldn't identify radio revision.\n");
241 ret = -ENODEV; 240 ret = -ENODEV;
242 goto err; 241 goto err;
243 } 242 }
@@ -246,7 +245,7 @@ int ath5k_hw_init(struct ath5k_softc *sc)
246 245
247 /* Return on unsupported chips (unsupported eeprom etc) */ 246 /* Return on unsupported chips (unsupported eeprom etc) */
248 if ((srev >= AR5K_SREV_AR5416) && (srev < AR5K_SREV_AR2425)) { 247 if ((srev >= AR5K_SREV_AR5416) && (srev < AR5K_SREV_AR2425)) {
249 ATH5K_ERR(sc, "Device not yet supported.\n"); 248 ATH5K_ERR(ah, "Device not yet supported.\n");
250 ret = -ENODEV; 249 ret = -ENODEV;
251 goto err; 250 goto err;
252 } 251 }
@@ -268,7 +267,7 @@ int ath5k_hw_init(struct ath5k_softc *sc)
268 */ 267 */
269 ret = ath5k_eeprom_init(ah); 268 ret = ath5k_eeprom_init(ah);
270 if (ret) { 269 if (ret) {
271 ATH5K_ERR(sc, "unable to init EEPROM\n"); 270 ATH5K_ERR(ah, "unable to init EEPROM\n");
272 goto err; 271 goto err;
273 } 272 }
274 273
@@ -309,17 +308,17 @@ int ath5k_hw_init(struct ath5k_softc *sc)
309 /* Get misc capabilities */ 308 /* Get misc capabilities */
310 ret = ath5k_hw_set_capabilities(ah); 309 ret = ath5k_hw_set_capabilities(ah);
311 if (ret) { 310 if (ret) {
312 ATH5K_ERR(sc, "unable to get device capabilities\n"); 311 ATH5K_ERR(ah, "unable to get device capabilities\n");
313 goto err; 312 goto err;
314 } 313 }
315 314
316 if (test_bit(ATH_STAT_2G_DISABLED, sc->status)) { 315 if (test_bit(ATH_STAT_2G_DISABLED, ah->status)) {
317 __clear_bit(AR5K_MODE_11B, ah->ah_capabilities.cap_mode); 316 __clear_bit(AR5K_MODE_11B, ah->ah_capabilities.cap_mode);
318 __clear_bit(AR5K_MODE_11G, ah->ah_capabilities.cap_mode); 317 __clear_bit(AR5K_MODE_11G, ah->ah_capabilities.cap_mode);
319 } 318 }
320 319
321 /* Crypto settings */ 320 /* Crypto settings */
322 common->keymax = (sc->ah->ah_version == AR5K_AR5210 ? 321 common->keymax = (ah->ah_version == AR5K_AR5210 ?
323 AR5K_KEYTABLE_SIZE_5210 : AR5K_KEYTABLE_SIZE_5211); 322 AR5K_KEYTABLE_SIZE_5210 : AR5K_KEYTABLE_SIZE_5211);
324 323
325 if (srev >= AR5K_SREV_AR5212_V4 && 324 if (srev >= AR5K_SREV_AR5212_V4 &&
@@ -339,7 +338,7 @@ int ath5k_hw_init(struct ath5k_softc *sc)
339 /* Set BSSID to bcast address: ff:ff:ff:ff:ff:ff for now */ 338 /* Set BSSID to bcast address: ff:ff:ff:ff:ff:ff for now */
340 memcpy(common->curbssid, ath_bcast_mac, ETH_ALEN); 339 memcpy(common->curbssid, ath_bcast_mac, ETH_ALEN);
341 ath5k_hw_set_bssid(ah); 340 ath5k_hw_set_bssid(ah);
342 ath5k_hw_set_opmode(ah, sc->opmode); 341 ath5k_hw_set_opmode(ah, ah->opmode);
343 342
344 ath5k_hw_rfgain_opt_init(ah); 343 ath5k_hw_rfgain_opt_init(ah);
345 344
@@ -360,7 +359,7 @@ err:
360 */ 359 */
361void ath5k_hw_deinit(struct ath5k_hw *ah) 360void ath5k_hw_deinit(struct ath5k_hw *ah)
362{ 361{
363 __set_bit(ATH_STAT_INVALID, ah->ah_sc->status); 362 __set_bit(ATH_STAT_INVALID, ah->status);
364 363
365 if (ah->ah_rf_banks != NULL) 364 if (ah->ah_rf_banks != NULL)
366 kfree(ah->ah_rf_banks); 365 kfree(ah->ah_rf_banks);
diff --git a/drivers/net/wireless/ath/ath5k/base.c b/drivers/net/wireless/ath/ath5k/base.c
index dce848f76d7c..f54dff44ed50 100644
--- a/drivers/net/wireless/ath/ath5k/base.c
+++ b/drivers/net/wireless/ath/ath5k/base.c
@@ -86,7 +86,7 @@ MODULE_SUPPORTED_DEVICE("Atheros 5xxx WLAN cards");
86MODULE_LICENSE("Dual BSD/GPL"); 86MODULE_LICENSE("Dual BSD/GPL");
87 87
88static int ath5k_init(struct ieee80211_hw *hw); 88static int ath5k_init(struct ieee80211_hw *hw);
89static int ath5k_reset(struct ath5k_softc *sc, struct ieee80211_channel *chan, 89static int ath5k_reset(struct ath5k_hw *ah, struct ieee80211_channel *chan,
90 bool skip_pcu); 90 bool skip_pcu);
91 91
92/* Known SREVs */ 92/* Known SREVs */
@@ -238,8 +238,8 @@ static const struct ath_ops ath5k_common_ops = {
238static int ath5k_reg_notifier(struct wiphy *wiphy, struct regulatory_request *request) 238static int ath5k_reg_notifier(struct wiphy *wiphy, struct regulatory_request *request)
239{ 239{
240 struct ieee80211_hw *hw = wiphy_to_ieee80211_hw(wiphy); 240 struct ieee80211_hw *hw = wiphy_to_ieee80211_hw(wiphy);
241 struct ath5k_softc *sc = hw->priv; 241 struct ath5k_hw *ah = hw->priv;
242 struct ath_regulatory *regulatory = ath5k_hw_regulatory(sc->ah); 242 struct ath_regulatory *regulatory = ath5k_hw_regulatory(ah);
243 243
244 return ath_reg_notifier_apply(wiphy, request, regulatory); 244 return ath_reg_notifier_apply(wiphy, request, regulatory);
245} 245}
@@ -289,7 +289,7 @@ ath5k_setup_channels(struct ath5k_hw *ah, struct ieee80211_channel *channels,
289 band = IEEE80211_BAND_2GHZ; 289 band = IEEE80211_BAND_2GHZ;
290 break; 290 break;
291 default: 291 default:
292 ATH5K_WARN(ah->ah_sc, "bad mode, not copying channels\n"); 292 ATH5K_WARN(ah, "bad mode, not copying channels\n");
293 return 0; 293 return 0;
294 } 294 }
295 295
@@ -327,51 +327,50 @@ ath5k_setup_channels(struct ath5k_hw *ah, struct ieee80211_channel *channels,
327} 327}
328 328
329static void 329static void
330ath5k_setup_rate_idx(struct ath5k_softc *sc, struct ieee80211_supported_band *b) 330ath5k_setup_rate_idx(struct ath5k_hw *ah, struct ieee80211_supported_band *b)
331{ 331{
332 u8 i; 332 u8 i;
333 333
334 for (i = 0; i < AR5K_MAX_RATES; i++) 334 for (i = 0; i < AR5K_MAX_RATES; i++)
335 sc->rate_idx[b->band][i] = -1; 335 ah->rate_idx[b->band][i] = -1;
336 336
337 for (i = 0; i < b->n_bitrates; i++) { 337 for (i = 0; i < b->n_bitrates; i++) {
338 sc->rate_idx[b->band][b->bitrates[i].hw_value] = i; 338 ah->rate_idx[b->band][b->bitrates[i].hw_value] = i;
339 if (b->bitrates[i].hw_value_short) 339 if (b->bitrates[i].hw_value_short)
340 sc->rate_idx[b->band][b->bitrates[i].hw_value_short] = i; 340 ah->rate_idx[b->band][b->bitrates[i].hw_value_short] = i;
341 } 341 }
342} 342}
343 343
344static int 344static int
345ath5k_setup_bands(struct ieee80211_hw *hw) 345ath5k_setup_bands(struct ieee80211_hw *hw)
346{ 346{
347 struct ath5k_softc *sc = hw->priv; 347 struct ath5k_hw *ah = hw->priv;
348 struct ath5k_hw *ah = sc->ah;
349 struct ieee80211_supported_band *sband; 348 struct ieee80211_supported_band *sband;
350 int max_c, count_c = 0; 349 int max_c, count_c = 0;
351 int i; 350 int i;
352 351
353 BUILD_BUG_ON(ARRAY_SIZE(sc->sbands) < IEEE80211_NUM_BANDS); 352 BUILD_BUG_ON(ARRAY_SIZE(ah->sbands) < IEEE80211_NUM_BANDS);
354 max_c = ARRAY_SIZE(sc->channels); 353 max_c = ARRAY_SIZE(ah->channels);
355 354
356 /* 2GHz band */ 355 /* 2GHz band */
357 sband = &sc->sbands[IEEE80211_BAND_2GHZ]; 356 sband = &ah->sbands[IEEE80211_BAND_2GHZ];
358 sband->band = IEEE80211_BAND_2GHZ; 357 sband->band = IEEE80211_BAND_2GHZ;
359 sband->bitrates = &sc->rates[IEEE80211_BAND_2GHZ][0]; 358 sband->bitrates = &ah->rates[IEEE80211_BAND_2GHZ][0];
360 359
361 if (test_bit(AR5K_MODE_11G, sc->ah->ah_capabilities.cap_mode)) { 360 if (test_bit(AR5K_MODE_11G, ah->ah_capabilities.cap_mode)) {
362 /* G mode */ 361 /* G mode */
363 memcpy(sband->bitrates, &ath5k_rates[0], 362 memcpy(sband->bitrates, &ath5k_rates[0],
364 sizeof(struct ieee80211_rate) * 12); 363 sizeof(struct ieee80211_rate) * 12);
365 sband->n_bitrates = 12; 364 sband->n_bitrates = 12;
366 365
367 sband->channels = sc->channels; 366 sband->channels = ah->channels;
368 sband->n_channels = ath5k_setup_channels(ah, sband->channels, 367 sband->n_channels = ath5k_setup_channels(ah, sband->channels,
369 AR5K_MODE_11G, max_c); 368 AR5K_MODE_11G, max_c);
370 369
371 hw->wiphy->bands[IEEE80211_BAND_2GHZ] = sband; 370 hw->wiphy->bands[IEEE80211_BAND_2GHZ] = sband;
372 count_c = sband->n_channels; 371 count_c = sband->n_channels;
373 max_c -= count_c; 372 max_c -= count_c;
374 } else if (test_bit(AR5K_MODE_11B, sc->ah->ah_capabilities.cap_mode)) { 373 } else if (test_bit(AR5K_MODE_11B, ah->ah_capabilities.cap_mode)) {
375 /* B mode */ 374 /* B mode */
376 memcpy(sband->bitrates, &ath5k_rates[0], 375 memcpy(sband->bitrates, &ath5k_rates[0],
377 sizeof(struct ieee80211_rate) * 4); 376 sizeof(struct ieee80211_rate) * 4);
@@ -390,7 +389,7 @@ ath5k_setup_bands(struct ieee80211_hw *hw)
390 } 389 }
391 } 390 }
392 391
393 sband->channels = sc->channels; 392 sband->channels = ah->channels;
394 sband->n_channels = ath5k_setup_channels(ah, sband->channels, 393 sband->n_channels = ath5k_setup_channels(ah, sband->channels,
395 AR5K_MODE_11B, max_c); 394 AR5K_MODE_11B, max_c);
396 395
@@ -398,27 +397,27 @@ ath5k_setup_bands(struct ieee80211_hw *hw)
398 count_c = sband->n_channels; 397 count_c = sband->n_channels;
399 max_c -= count_c; 398 max_c -= count_c;
400 } 399 }
401 ath5k_setup_rate_idx(sc, sband); 400 ath5k_setup_rate_idx(ah, sband);
402 401
403 /* 5GHz band, A mode */ 402 /* 5GHz band, A mode */
404 if (test_bit(AR5K_MODE_11A, sc->ah->ah_capabilities.cap_mode)) { 403 if (test_bit(AR5K_MODE_11A, ah->ah_capabilities.cap_mode)) {
405 sband = &sc->sbands[IEEE80211_BAND_5GHZ]; 404 sband = &ah->sbands[IEEE80211_BAND_5GHZ];
406 sband->band = IEEE80211_BAND_5GHZ; 405 sband->band = IEEE80211_BAND_5GHZ;
407 sband->bitrates = &sc->rates[IEEE80211_BAND_5GHZ][0]; 406 sband->bitrates = &ah->rates[IEEE80211_BAND_5GHZ][0];
408 407
409 memcpy(sband->bitrates, &ath5k_rates[4], 408 memcpy(sband->bitrates, &ath5k_rates[4],
410 sizeof(struct ieee80211_rate) * 8); 409 sizeof(struct ieee80211_rate) * 8);
411 sband->n_bitrates = 8; 410 sband->n_bitrates = 8;
412 411
413 sband->channels = &sc->channels[count_c]; 412 sband->channels = &ah->channels[count_c];
414 sband->n_channels = ath5k_setup_channels(ah, sband->channels, 413 sband->n_channels = ath5k_setup_channels(ah, sband->channels,
415 AR5K_MODE_11A, max_c); 414 AR5K_MODE_11A, max_c);
416 415
417 hw->wiphy->bands[IEEE80211_BAND_5GHZ] = sband; 416 hw->wiphy->bands[IEEE80211_BAND_5GHZ] = sband;
418 } 417 }
419 ath5k_setup_rate_idx(sc, sband); 418 ath5k_setup_rate_idx(ah, sband);
420 419
421 ath5k_debug_dump_bands(sc); 420 ath5k_debug_dump_bands(ah);
422 421
423 return 0; 422 return 0;
424} 423}
@@ -428,14 +427,14 @@ ath5k_setup_bands(struct ieee80211_hw *hw)
428 * To accomplish this we must first cleanup any pending DMA, 427 * To accomplish this we must first cleanup any pending DMA,
429 * then restart stuff after a la ath5k_init. 428 * then restart stuff after a la ath5k_init.
430 * 429 *
431 * Called with sc->lock. 430 * Called with ah->lock.
432 */ 431 */
433int 432int
434ath5k_chan_set(struct ath5k_softc *sc, struct ieee80211_channel *chan) 433ath5k_chan_set(struct ath5k_hw *ah, struct ieee80211_channel *chan)
435{ 434{
436 ATH5K_DBG(sc, ATH5K_DEBUG_RESET, 435 ATH5K_DBG(ah, ATH5K_DEBUG_RESET,
437 "channel set, resetting (%u -> %u MHz)\n", 436 "channel set, resetting (%u -> %u MHz)\n",
438 sc->curchan->center_freq, chan->center_freq); 437 ah->curchan->center_freq, chan->center_freq);
439 438
440 /* 439 /*
441 * To switch channels clear any pending DMA operations; 440 * To switch channels clear any pending DMA operations;
@@ -443,7 +442,7 @@ ath5k_chan_set(struct ath5k_softc *sc, struct ieee80211_channel *chan)
443 * hardware at the new frequency, and then re-enable 442 * hardware at the new frequency, and then re-enable
444 * the relevant bits of the h/w. 443 * the relevant bits of the h/w.
445 */ 444 */
446 return ath5k_reset(sc, chan, true); 445 return ath5k_reset(ah, chan, true);
447} 446}
448 447
449void ath5k_vif_iter(void *data, u8 *mac, struct ieee80211_vif *vif) 448void ath5k_vif_iter(void *data, u8 *mac, struct ieee80211_vif *vif)
@@ -487,10 +486,10 @@ void ath5k_vif_iter(void *data, u8 *mac, struct ieee80211_vif *vif)
487} 486}
488 487
489void 488void
490ath5k_update_bssid_mask_and_opmode(struct ath5k_softc *sc, 489ath5k_update_bssid_mask_and_opmode(struct ath5k_hw *ah,
491 struct ieee80211_vif *vif) 490 struct ieee80211_vif *vif)
492{ 491{
493 struct ath_common *common = ath5k_hw_common(sc->ah); 492 struct ath_common *common = ath5k_hw_common(ah);
494 struct ath5k_vif_iter_data iter_data; 493 struct ath5k_vif_iter_data iter_data;
495 u32 rfilt; 494 u32 rfilt;
496 495
@@ -509,24 +508,24 @@ ath5k_update_bssid_mask_and_opmode(struct ath5k_softc *sc,
509 ath5k_vif_iter(&iter_data, vif->addr, vif); 508 ath5k_vif_iter(&iter_data, vif->addr, vif);
510 509
511 /* Get list of all active MAC addresses */ 510 /* Get list of all active MAC addresses */
512 ieee80211_iterate_active_interfaces_atomic(sc->hw, ath5k_vif_iter, 511 ieee80211_iterate_active_interfaces_atomic(ah->hw, ath5k_vif_iter,
513 &iter_data); 512 &iter_data);
514 memcpy(sc->bssidmask, iter_data.mask, ETH_ALEN); 513 memcpy(ah->bssidmask, iter_data.mask, ETH_ALEN);
515 514
516 sc->opmode = iter_data.opmode; 515 ah->opmode = iter_data.opmode;
517 if (sc->opmode == NL80211_IFTYPE_UNSPECIFIED) 516 if (ah->opmode == NL80211_IFTYPE_UNSPECIFIED)
518 /* Nothing active, default to station mode */ 517 /* Nothing active, default to station mode */
519 sc->opmode = NL80211_IFTYPE_STATION; 518 ah->opmode = NL80211_IFTYPE_STATION;
520 519
521 ath5k_hw_set_opmode(sc->ah, sc->opmode); 520 ath5k_hw_set_opmode(ah, ah->opmode);
522 ATH5K_DBG(sc, ATH5K_DEBUG_MODE, "mode setup opmode %d (%s)\n", 521 ATH5K_DBG(ah, ATH5K_DEBUG_MODE, "mode setup opmode %d (%s)\n",
523 sc->opmode, ath_opmode_to_string(sc->opmode)); 522 ah->opmode, ath_opmode_to_string(ah->opmode));
524 523
525 if (iter_data.need_set_hw_addr && iter_data.found_active) 524 if (iter_data.need_set_hw_addr && iter_data.found_active)
526 ath5k_hw_set_lladdr(sc->ah, iter_data.active_mac); 525 ath5k_hw_set_lladdr(ah, iter_data.active_mac);
527 526
528 if (ath5k_hw_hasbssidmask(sc->ah)) 527 if (ath5k_hw_hasbssidmask(ah))
529 ath5k_hw_set_bssid_mask(sc->ah, sc->bssidmask); 528 ath5k_hw_set_bssid_mask(ah, ah->bssidmask);
530 529
531 /* Set up RX Filter */ 530 /* Set up RX Filter */
532 if (iter_data.n_stas > 1) { 531 if (iter_data.n_stas > 1) {
@@ -534,16 +533,16 @@ ath5k_update_bssid_mask_and_opmode(struct ath5k_softc *sc,
534 * different APs, ARPs are not received (most of the time?) 533 * different APs, ARPs are not received (most of the time?)
535 * Enabling PROMISC appears to fix that problem. 534 * Enabling PROMISC appears to fix that problem.
536 */ 535 */
537 sc->filter_flags |= AR5K_RX_FILTER_PROM; 536 ah->filter_flags |= AR5K_RX_FILTER_PROM;
538 } 537 }
539 538
540 rfilt = sc->filter_flags; 539 rfilt = ah->filter_flags;
541 ath5k_hw_set_rx_filter(sc->ah, rfilt); 540 ath5k_hw_set_rx_filter(ah, rfilt);
542 ATH5K_DBG(sc, ATH5K_DEBUG_MODE, "RX filter 0x%x\n", rfilt); 541 ATH5K_DBG(ah, ATH5K_DEBUG_MODE, "RX filter 0x%x\n", rfilt);
543} 542}
544 543
545static inline int 544static inline int
546ath5k_hw_to_driver_rix(struct ath5k_softc *sc, int hw_rix) 545ath5k_hw_to_driver_rix(struct ath5k_hw *ah, int hw_rix)
547{ 546{
548 int rix; 547 int rix;
549 548
@@ -552,7 +551,7 @@ ath5k_hw_to_driver_rix(struct ath5k_softc *sc, int hw_rix)
552 "hw_rix out of bounds: %x\n", hw_rix)) 551 "hw_rix out of bounds: %x\n", hw_rix))
553 return 0; 552 return 0;
554 553
555 rix = sc->rate_idx[sc->curchan->band][hw_rix]; 554 rix = ah->rate_idx[ah->curchan->band][hw_rix];
556 if (WARN(rix < 0, "invalid hw_rix: %x\n", hw_rix)) 555 if (WARN(rix < 0, "invalid hw_rix: %x\n", hw_rix))
557 rix = 0; 556 rix = 0;
558 557
@@ -564,9 +563,9 @@ ath5k_hw_to_driver_rix(struct ath5k_softc *sc, int hw_rix)
564\***************/ 563\***************/
565 564
566static 565static
567struct sk_buff *ath5k_rx_skb_alloc(struct ath5k_softc *sc, dma_addr_t *skb_addr) 566struct sk_buff *ath5k_rx_skb_alloc(struct ath5k_hw *ah, dma_addr_t *skb_addr)
568{ 567{
569 struct ath_common *common = ath5k_hw_common(sc->ah); 568 struct ath_common *common = ath5k_hw_common(ah);
570 struct sk_buff *skb; 569 struct sk_buff *skb;
571 570
572 /* 571 /*
@@ -578,17 +577,17 @@ struct sk_buff *ath5k_rx_skb_alloc(struct ath5k_softc *sc, dma_addr_t *skb_addr)
578 GFP_ATOMIC); 577 GFP_ATOMIC);
579 578
580 if (!skb) { 579 if (!skb) {
581 ATH5K_ERR(sc, "can't alloc skbuff of size %u\n", 580 ATH5K_ERR(ah, "can't alloc skbuff of size %u\n",
582 common->rx_bufsize); 581 common->rx_bufsize);
583 return NULL; 582 return NULL;
584 } 583 }
585 584
586 *skb_addr = dma_map_single(sc->dev, 585 *skb_addr = dma_map_single(ah->dev,
587 skb->data, common->rx_bufsize, 586 skb->data, common->rx_bufsize,
588 DMA_FROM_DEVICE); 587 DMA_FROM_DEVICE);
589 588
590 if (unlikely(dma_mapping_error(sc->dev, *skb_addr))) { 589 if (unlikely(dma_mapping_error(ah->dev, *skb_addr))) {
591 ATH5K_ERR(sc, "%s: DMA mapping failed\n", __func__); 590 ATH5K_ERR(ah, "%s: DMA mapping failed\n", __func__);
592 dev_kfree_skb(skb); 591 dev_kfree_skb(skb);
593 return NULL; 592 return NULL;
594 } 593 }
@@ -596,15 +595,14 @@ struct sk_buff *ath5k_rx_skb_alloc(struct ath5k_softc *sc, dma_addr_t *skb_addr)
596} 595}
597 596
598static int 597static int
599ath5k_rxbuf_setup(struct ath5k_softc *sc, struct ath5k_buf *bf) 598ath5k_rxbuf_setup(struct ath5k_hw *ah, struct ath5k_buf *bf)
600{ 599{
601 struct ath5k_hw *ah = sc->ah;
602 struct sk_buff *skb = bf->skb; 600 struct sk_buff *skb = bf->skb;
603 struct ath5k_desc *ds; 601 struct ath5k_desc *ds;
604 int ret; 602 int ret;
605 603
606 if (!skb) { 604 if (!skb) {
607 skb = ath5k_rx_skb_alloc(sc, &bf->skbaddr); 605 skb = ath5k_rx_skb_alloc(ah, &bf->skbaddr);
608 if (!skb) 606 if (!skb)
609 return -ENOMEM; 607 return -ENOMEM;
610 bf->skb = skb; 608 bf->skb = skb;
@@ -630,13 +628,13 @@ ath5k_rxbuf_setup(struct ath5k_softc *sc, struct ath5k_buf *bf)
630 ds->ds_data = bf->skbaddr; 628 ds->ds_data = bf->skbaddr;
631 ret = ath5k_hw_setup_rx_desc(ah, ds, ah->common.rx_bufsize, 0); 629 ret = ath5k_hw_setup_rx_desc(ah, ds, ah->common.rx_bufsize, 0);
632 if (ret) { 630 if (ret) {
633 ATH5K_ERR(sc, "%s: could not setup RX desc\n", __func__); 631 ATH5K_ERR(ah, "%s: could not setup RX desc\n", __func__);
634 return ret; 632 return ret;
635 } 633 }
636 634
637 if (sc->rxlink != NULL) 635 if (ah->rxlink != NULL)
638 *sc->rxlink = bf->daddr; 636 *ah->rxlink = bf->daddr;
639 sc->rxlink = &ds->ds_link; 637 ah->rxlink = &ds->ds_link;
640 return 0; 638 return 0;
641} 639}
642 640
@@ -664,10 +662,9 @@ static enum ath5k_pkt_type get_hw_packet_type(struct sk_buff *skb)
664} 662}
665 663
666static int 664static int
667ath5k_txbuf_setup(struct ath5k_softc *sc, struct ath5k_buf *bf, 665ath5k_txbuf_setup(struct ath5k_hw *ah, struct ath5k_buf *bf,
668 struct ath5k_txq *txq, int padsize) 666 struct ath5k_txq *txq, int padsize)
669{ 667{
670 struct ath5k_hw *ah = sc->ah;
671 struct ath5k_desc *ds = bf->desc; 668 struct ath5k_desc *ds = bf->desc;
672 struct sk_buff *skb = bf->skb; 669 struct sk_buff *skb = bf->skb;
673 struct ieee80211_tx_info *info = IEEE80211_SKB_CB(skb); 670 struct ieee80211_tx_info *info = IEEE80211_SKB_CB(skb);
@@ -683,10 +680,10 @@ ath5k_txbuf_setup(struct ath5k_softc *sc, struct ath5k_buf *bf,
683 flags = AR5K_TXDESC_INTREQ | AR5K_TXDESC_CLRDMASK; 680 flags = AR5K_TXDESC_INTREQ | AR5K_TXDESC_CLRDMASK;
684 681
685 /* XXX endianness */ 682 /* XXX endianness */
686 bf->skbaddr = dma_map_single(sc->dev, skb->data, skb->len, 683 bf->skbaddr = dma_map_single(ah->dev, skb->data, skb->len,
687 DMA_TO_DEVICE); 684 DMA_TO_DEVICE);
688 685
689 rate = ieee80211_get_tx_rate(sc->hw, info); 686 rate = ieee80211_get_tx_rate(ah->hw, info);
690 if (!rate) { 687 if (!rate) {
691 ret = -EINVAL; 688 ret = -EINVAL;
692 goto err_unmap; 689 goto err_unmap;
@@ -710,20 +707,20 @@ ath5k_txbuf_setup(struct ath5k_softc *sc, struct ath5k_buf *bf,
710 } 707 }
711 if (rc_flags & IEEE80211_TX_RC_USE_RTS_CTS) { 708 if (rc_flags & IEEE80211_TX_RC_USE_RTS_CTS) {
712 flags |= AR5K_TXDESC_RTSENA; 709 flags |= AR5K_TXDESC_RTSENA;
713 cts_rate = ieee80211_get_rts_cts_rate(sc->hw, info)->hw_value; 710 cts_rate = ieee80211_get_rts_cts_rate(ah->hw, info)->hw_value;
714 duration = le16_to_cpu(ieee80211_rts_duration(sc->hw, 711 duration = le16_to_cpu(ieee80211_rts_duration(ah->hw,
715 info->control.vif, pktlen, info)); 712 info->control.vif, pktlen, info));
716 } 713 }
717 if (rc_flags & IEEE80211_TX_RC_USE_CTS_PROTECT) { 714 if (rc_flags & IEEE80211_TX_RC_USE_CTS_PROTECT) {
718 flags |= AR5K_TXDESC_CTSENA; 715 flags |= AR5K_TXDESC_CTSENA;
719 cts_rate = ieee80211_get_rts_cts_rate(sc->hw, info)->hw_value; 716 cts_rate = ieee80211_get_rts_cts_rate(ah->hw, info)->hw_value;
720 duration = le16_to_cpu(ieee80211_ctstoself_duration(sc->hw, 717 duration = le16_to_cpu(ieee80211_ctstoself_duration(ah->hw,
721 info->control.vif, pktlen, info)); 718 info->control.vif, pktlen, info));
722 } 719 }
723 ret = ah->ah_setup_tx_desc(ah, ds, pktlen, 720 ret = ah->ah_setup_tx_desc(ah, ds, pktlen,
724 ieee80211_get_hdrlen_from_skb(skb), padsize, 721 ieee80211_get_hdrlen_from_skb(skb), padsize,
725 get_hw_packet_type(skb), 722 get_hw_packet_type(skb),
726 (sc->power_level * 2), 723 (ah->power_level * 2),
727 hw_rate, 724 hw_rate,
728 info->control.rates[0].count, keyidx, ah->ah_tx_ant, flags, 725 info->control.rates[0].count, keyidx, ah->ah_tx_ant, flags,
729 cts_rate, duration); 726 cts_rate, duration);
@@ -733,7 +730,7 @@ ath5k_txbuf_setup(struct ath5k_softc *sc, struct ath5k_buf *bf,
733 memset(mrr_rate, 0, sizeof(mrr_rate)); 730 memset(mrr_rate, 0, sizeof(mrr_rate));
734 memset(mrr_tries, 0, sizeof(mrr_tries)); 731 memset(mrr_tries, 0, sizeof(mrr_tries));
735 for (i = 0; i < 3; i++) { 732 for (i = 0; i < 3; i++) {
736 rate = ieee80211_get_alt_retry_rate(sc->hw, info, i); 733 rate = ieee80211_get_alt_retry_rate(ah->hw, info, i);
737 if (!rate) 734 if (!rate)
738 break; 735 break;
739 736
@@ -764,7 +761,7 @@ ath5k_txbuf_setup(struct ath5k_softc *sc, struct ath5k_buf *bf,
764 761
765 return 0; 762 return 0;
766err_unmap: 763err_unmap:
767 dma_unmap_single(sc->dev, bf->skbaddr, skb->len, DMA_TO_DEVICE); 764 dma_unmap_single(ah->dev, bf->skbaddr, skb->len, DMA_TO_DEVICE);
768 return ret; 765 return ret;
769} 766}
770 767
@@ -773,7 +770,7 @@ err_unmap:
773\*******************/ 770\*******************/
774 771
775static int 772static int
776ath5k_desc_alloc(struct ath5k_softc *sc) 773ath5k_desc_alloc(struct ath5k_hw *ah)
777{ 774{
778 struct ath5k_desc *ds; 775 struct ath5k_desc *ds;
779 struct ath5k_buf *bf; 776 struct ath5k_buf *bf;
@@ -782,68 +779,68 @@ ath5k_desc_alloc(struct ath5k_softc *sc)
782 int ret; 779 int ret;
783 780
784 /* allocate descriptors */ 781 /* allocate descriptors */
785 sc->desc_len = sizeof(struct ath5k_desc) * 782 ah->desc_len = sizeof(struct ath5k_desc) *
786 (ATH_TXBUF + ATH_RXBUF + ATH_BCBUF + 1); 783 (ATH_TXBUF + ATH_RXBUF + ATH_BCBUF + 1);
787 784
788 sc->desc = dma_alloc_coherent(sc->dev, sc->desc_len, 785 ah->desc = dma_alloc_coherent(ah->dev, ah->desc_len,
789 &sc->desc_daddr, GFP_KERNEL); 786 &ah->desc_daddr, GFP_KERNEL);
790 if (sc->desc == NULL) { 787 if (ah->desc == NULL) {
791 ATH5K_ERR(sc, "can't allocate descriptors\n"); 788 ATH5K_ERR(ah, "can't allocate descriptors\n");
792 ret = -ENOMEM; 789 ret = -ENOMEM;
793 goto err; 790 goto err;
794 } 791 }
795 ds = sc->desc; 792 ds = ah->desc;
796 da = sc->desc_daddr; 793 da = ah->desc_daddr;
797 ATH5K_DBG(sc, ATH5K_DEBUG_ANY, "DMA map: %p (%zu) -> %llx\n", 794 ATH5K_DBG(ah, ATH5K_DEBUG_ANY, "DMA map: %p (%zu) -> %llx\n",
798 ds, sc->desc_len, (unsigned long long)sc->desc_daddr); 795 ds, ah->desc_len, (unsigned long long)ah->desc_daddr);
799 796
800 bf = kcalloc(1 + ATH_TXBUF + ATH_RXBUF + ATH_BCBUF, 797 bf = kcalloc(1 + ATH_TXBUF + ATH_RXBUF + ATH_BCBUF,
801 sizeof(struct ath5k_buf), GFP_KERNEL); 798 sizeof(struct ath5k_buf), GFP_KERNEL);
802 if (bf == NULL) { 799 if (bf == NULL) {
803 ATH5K_ERR(sc, "can't allocate bufptr\n"); 800 ATH5K_ERR(ah, "can't allocate bufptr\n");
804 ret = -ENOMEM; 801 ret = -ENOMEM;
805 goto err_free; 802 goto err_free;
806 } 803 }
807 sc->bufptr = bf; 804 ah->bufptr = bf;
808 805
809 INIT_LIST_HEAD(&sc->rxbuf); 806 INIT_LIST_HEAD(&ah->rxbuf);
810 for (i = 0; i < ATH_RXBUF; i++, bf++, ds++, da += sizeof(*ds)) { 807 for (i = 0; i < ATH_RXBUF; i++, bf++, ds++, da += sizeof(*ds)) {
811 bf->desc = ds; 808 bf->desc = ds;
812 bf->daddr = da; 809 bf->daddr = da;
813 list_add_tail(&bf->list, &sc->rxbuf); 810 list_add_tail(&bf->list, &ah->rxbuf);
814 } 811 }
815 812
816 INIT_LIST_HEAD(&sc->txbuf); 813 INIT_LIST_HEAD(&ah->txbuf);
817 sc->txbuf_len = ATH_TXBUF; 814 ah->txbuf_len = ATH_TXBUF;
818 for (i = 0; i < ATH_TXBUF; i++, bf++, ds++, da += sizeof(*ds)) { 815 for (i = 0; i < ATH_TXBUF; i++, bf++, ds++, da += sizeof(*ds)) {
819 bf->desc = ds; 816 bf->desc = ds;
820 bf->daddr = da; 817 bf->daddr = da;
821 list_add_tail(&bf->list, &sc->txbuf); 818 list_add_tail(&bf->list, &ah->txbuf);
822 } 819 }
823 820
824 /* beacon buffers */ 821 /* beacon buffers */
825 INIT_LIST_HEAD(&sc->bcbuf); 822 INIT_LIST_HEAD(&ah->bcbuf);
826 for (i = 0; i < ATH_BCBUF; i++, bf++, ds++, da += sizeof(*ds)) { 823 for (i = 0; i < ATH_BCBUF; i++, bf++, ds++, da += sizeof(*ds)) {
827 bf->desc = ds; 824 bf->desc = ds;
828 bf->daddr = da; 825 bf->daddr = da;
829 list_add_tail(&bf->list, &sc->bcbuf); 826 list_add_tail(&bf->list, &ah->bcbuf);
830 } 827 }
831 828
832 return 0; 829 return 0;
833err_free: 830err_free:
834 dma_free_coherent(sc->dev, sc->desc_len, sc->desc, sc->desc_daddr); 831 dma_free_coherent(ah->dev, ah->desc_len, ah->desc, ah->desc_daddr);
835err: 832err:
836 sc->desc = NULL; 833 ah->desc = NULL;
837 return ret; 834 return ret;
838} 835}
839 836
840void 837void
841ath5k_txbuf_free_skb(struct ath5k_softc *sc, struct ath5k_buf *bf) 838ath5k_txbuf_free_skb(struct ath5k_hw *ah, struct ath5k_buf *bf)
842{ 839{
843 BUG_ON(!bf); 840 BUG_ON(!bf);
844 if (!bf->skb) 841 if (!bf->skb)
845 return; 842 return;
846 dma_unmap_single(sc->dev, bf->skbaddr, bf->skb->len, 843 dma_unmap_single(ah->dev, bf->skbaddr, bf->skb->len,
847 DMA_TO_DEVICE); 844 DMA_TO_DEVICE);
848 dev_kfree_skb_any(bf->skb); 845 dev_kfree_skb_any(bf->skb);
849 bf->skb = NULL; 846 bf->skb = NULL;
@@ -852,15 +849,14 @@ ath5k_txbuf_free_skb(struct ath5k_softc *sc, struct ath5k_buf *bf)
852} 849}
853 850
854void 851void
855ath5k_rxbuf_free_skb(struct ath5k_softc *sc, struct ath5k_buf *bf) 852ath5k_rxbuf_free_skb(struct ath5k_hw *ah, struct ath5k_buf *bf)
856{ 853{
857 struct ath5k_hw *ah = sc->ah;
858 struct ath_common *common = ath5k_hw_common(ah); 854 struct ath_common *common = ath5k_hw_common(ah);
859 855
860 BUG_ON(!bf); 856 BUG_ON(!bf);
861 if (!bf->skb) 857 if (!bf->skb)
862 return; 858 return;
863 dma_unmap_single(sc->dev, bf->skbaddr, common->rx_bufsize, 859 dma_unmap_single(ah->dev, bf->skbaddr, common->rx_bufsize,
864 DMA_FROM_DEVICE); 860 DMA_FROM_DEVICE);
865 dev_kfree_skb_any(bf->skb); 861 dev_kfree_skb_any(bf->skb);
866 bf->skb = NULL; 862 bf->skb = NULL;
@@ -869,24 +865,24 @@ ath5k_rxbuf_free_skb(struct ath5k_softc *sc, struct ath5k_buf *bf)
869} 865}
870 866
871static void 867static void
872ath5k_desc_free(struct ath5k_softc *sc) 868ath5k_desc_free(struct ath5k_hw *ah)
873{ 869{
874 struct ath5k_buf *bf; 870 struct ath5k_buf *bf;
875 871
876 list_for_each_entry(bf, &sc->txbuf, list) 872 list_for_each_entry(bf, &ah->txbuf, list)
877 ath5k_txbuf_free_skb(sc, bf); 873 ath5k_txbuf_free_skb(ah, bf);
878 list_for_each_entry(bf, &sc->rxbuf, list) 874 list_for_each_entry(bf, &ah->rxbuf, list)
879 ath5k_rxbuf_free_skb(sc, bf); 875 ath5k_rxbuf_free_skb(ah, bf);
880 list_for_each_entry(bf, &sc->bcbuf, list) 876 list_for_each_entry(bf, &ah->bcbuf, list)
881 ath5k_txbuf_free_skb(sc, bf); 877 ath5k_txbuf_free_skb(ah, bf);
882 878
883 /* Free memory associated with all descriptors */ 879 /* Free memory associated with all descriptors */
884 dma_free_coherent(sc->dev, sc->desc_len, sc->desc, sc->desc_daddr); 880 dma_free_coherent(ah->dev, ah->desc_len, ah->desc, ah->desc_daddr);
885 sc->desc = NULL; 881 ah->desc = NULL;
886 sc->desc_daddr = 0; 882 ah->desc_daddr = 0;
887 883
888 kfree(sc->bufptr); 884 kfree(ah->bufptr);
889 sc->bufptr = NULL; 885 ah->bufptr = NULL;
890} 886}
891 887
892 888
@@ -895,10 +891,9 @@ ath5k_desc_free(struct ath5k_softc *sc)
895\**************/ 891\**************/
896 892
897static struct ath5k_txq * 893static struct ath5k_txq *
898ath5k_txq_setup(struct ath5k_softc *sc, 894ath5k_txq_setup(struct ath5k_hw *ah,
899 int qtype, int subtype) 895 int qtype, int subtype)
900{ 896{
901 struct ath5k_hw *ah = sc->ah;
902 struct ath5k_txq *txq; 897 struct ath5k_txq *txq;
903 struct ath5k_txq_info qi = { 898 struct ath5k_txq_info qi = {
904 .tqi_subtype = subtype, 899 .tqi_subtype = subtype,
@@ -932,13 +927,13 @@ ath5k_txq_setup(struct ath5k_softc *sc,
932 */ 927 */
933 return ERR_PTR(qnum); 928 return ERR_PTR(qnum);
934 } 929 }
935 if (qnum >= ARRAY_SIZE(sc->txqs)) { 930 if (qnum >= ARRAY_SIZE(ah->txqs)) {
936 ATH5K_ERR(sc, "hw qnum %u out of range, max %tu!\n", 931 ATH5K_ERR(ah, "hw qnum %u out of range, max %tu!\n",
937 qnum, ARRAY_SIZE(sc->txqs)); 932 qnum, ARRAY_SIZE(ah->txqs));
938 ath5k_hw_release_tx_queue(ah, qnum); 933 ath5k_hw_release_tx_queue(ah, qnum);
939 return ERR_PTR(-EINVAL); 934 return ERR_PTR(-EINVAL);
940 } 935 }
941 txq = &sc->txqs[qnum]; 936 txq = &ah->txqs[qnum];
942 if (!txq->setup) { 937 if (!txq->setup) {
943 txq->qnum = qnum; 938 txq->qnum = qnum;
944 txq->link = NULL; 939 txq->link = NULL;
@@ -950,7 +945,7 @@ ath5k_txq_setup(struct ath5k_softc *sc,
950 txq->txq_poll_mark = false; 945 txq->txq_poll_mark = false;
951 txq->txq_stuck = 0; 946 txq->txq_stuck = 0;
952 } 947 }
953 return &sc->txqs[qnum]; 948 return &ah->txqs[qnum];
954} 949}
955 950
956static int 951static int
@@ -970,18 +965,17 @@ ath5k_beaconq_setup(struct ath5k_hw *ah)
970} 965}
971 966
972static int 967static int
973ath5k_beaconq_config(struct ath5k_softc *sc) 968ath5k_beaconq_config(struct ath5k_hw *ah)
974{ 969{
975 struct ath5k_hw *ah = sc->ah;
976 struct ath5k_txq_info qi; 970 struct ath5k_txq_info qi;
977 int ret; 971 int ret;
978 972
979 ret = ath5k_hw_get_tx_queueprops(ah, sc->bhalq, &qi); 973 ret = ath5k_hw_get_tx_queueprops(ah, ah->bhalq, &qi);
980 if (ret) 974 if (ret)
981 goto err; 975 goto err;
982 976
983 if (sc->opmode == NL80211_IFTYPE_AP || 977 if (ah->opmode == NL80211_IFTYPE_AP ||
984 sc->opmode == NL80211_IFTYPE_MESH_POINT) { 978 ah->opmode == NL80211_IFTYPE_MESH_POINT) {
985 /* 979 /*
986 * Always burst out beacon and CAB traffic 980 * Always burst out beacon and CAB traffic
987 * (aifs = cwmin = cwmax = 0) 981 * (aifs = cwmin = cwmax = 0)
@@ -989,7 +983,7 @@ ath5k_beaconq_config(struct ath5k_softc *sc)
989 qi.tqi_aifs = 0; 983 qi.tqi_aifs = 0;
990 qi.tqi_cw_min = 0; 984 qi.tqi_cw_min = 0;
991 qi.tqi_cw_max = 0; 985 qi.tqi_cw_max = 0;
992 } else if (sc->opmode == NL80211_IFTYPE_ADHOC) { 986 } else if (ah->opmode == NL80211_IFTYPE_ADHOC) {
993 /* 987 /*
994 * Adhoc mode; backoff between 0 and (2 * cw_min). 988 * Adhoc mode; backoff between 0 and (2 * cw_min).
995 */ 989 */
@@ -998,17 +992,17 @@ ath5k_beaconq_config(struct ath5k_softc *sc)
998 qi.tqi_cw_max = 2 * AR5K_TUNE_CWMIN; 992 qi.tqi_cw_max = 2 * AR5K_TUNE_CWMIN;
999 } 993 }
1000 994
1001 ATH5K_DBG(sc, ATH5K_DEBUG_BEACON, 995 ATH5K_DBG(ah, ATH5K_DEBUG_BEACON,
1002 "beacon queueprops tqi_aifs:%d tqi_cw_min:%d tqi_cw_max:%d\n", 996 "beacon queueprops tqi_aifs:%d tqi_cw_min:%d tqi_cw_max:%d\n",
1003 qi.tqi_aifs, qi.tqi_cw_min, qi.tqi_cw_max); 997 qi.tqi_aifs, qi.tqi_cw_min, qi.tqi_cw_max);
1004 998
1005 ret = ath5k_hw_set_tx_queueprops(ah, sc->bhalq, &qi); 999 ret = ath5k_hw_set_tx_queueprops(ah, ah->bhalq, &qi);
1006 if (ret) { 1000 if (ret) {
1007 ATH5K_ERR(sc, "%s: unable to update parameters for beacon " 1001 ATH5K_ERR(ah, "%s: unable to update parameters for beacon "
1008 "hardware queue!\n", __func__); 1002 "hardware queue!\n", __func__);
1009 goto err; 1003 goto err;
1010 } 1004 }
1011 ret = ath5k_hw_reset_tx_queue(ah, sc->bhalq); /* push to h/w */ 1005 ret = ath5k_hw_reset_tx_queue(ah, ah->bhalq); /* push to h/w */
1012 if (ret) 1006 if (ret)
1013 goto err; 1007 goto err;
1014 1008
@@ -1017,7 +1011,7 @@ ath5k_beaconq_config(struct ath5k_softc *sc)
1017 if (ret) 1011 if (ret)
1018 goto err; 1012 goto err;
1019 1013
1020 qi.tqi_ready_time = (sc->bintval * 80) / 100; 1014 qi.tqi_ready_time = (ah->bintval * 80) / 100;
1021 ret = ath5k_hw_set_tx_queueprops(ah, AR5K_TX_QUEUE_ID_CAB, &qi); 1015 ret = ath5k_hw_set_tx_queueprops(ah, AR5K_TX_QUEUE_ID_CAB, &qi);
1022 if (ret) 1016 if (ret)
1023 goto err; 1017 goto err;
@@ -1030,7 +1024,7 @@ err:
1030/** 1024/**
1031 * ath5k_drain_tx_buffs - Empty tx buffers 1025 * ath5k_drain_tx_buffs - Empty tx buffers
1032 * 1026 *
1033 * @sc The &struct ath5k_softc 1027 * @ah The &struct ath5k_hw
1034 * 1028 *
1035 * Empty tx buffers from all queues in preparation 1029 * Empty tx buffers from all queues in preparation
1036 * of a reset or during shutdown. 1030 * of a reset or during shutdown.
@@ -1039,26 +1033,26 @@ err:
1039 * we do not need to block ath5k_tx_tasklet 1033 * we do not need to block ath5k_tx_tasklet
1040 */ 1034 */
1041static void 1035static void
1042ath5k_drain_tx_buffs(struct ath5k_softc *sc) 1036ath5k_drain_tx_buffs(struct ath5k_hw *ah)
1043{ 1037{
1044 struct ath5k_txq *txq; 1038 struct ath5k_txq *txq;
1045 struct ath5k_buf *bf, *bf0; 1039 struct ath5k_buf *bf, *bf0;
1046 int i; 1040 int i;
1047 1041
1048 for (i = 0; i < ARRAY_SIZE(sc->txqs); i++) { 1042 for (i = 0; i < ARRAY_SIZE(ah->txqs); i++) {
1049 if (sc->txqs[i].setup) { 1043 if (ah->txqs[i].setup) {
1050 txq = &sc->txqs[i]; 1044 txq = &ah->txqs[i];
1051 spin_lock_bh(&txq->lock); 1045 spin_lock_bh(&txq->lock);
1052 list_for_each_entry_safe(bf, bf0, &txq->q, list) { 1046 list_for_each_entry_safe(bf, bf0, &txq->q, list) {
1053 ath5k_debug_printtxbuf(sc, bf); 1047 ath5k_debug_printtxbuf(ah, bf);
1054 1048
1055 ath5k_txbuf_free_skb(sc, bf); 1049 ath5k_txbuf_free_skb(ah, bf);
1056 1050
1057 spin_lock_bh(&sc->txbuflock); 1051 spin_lock_bh(&ah->txbuflock);
1058 list_move_tail(&bf->list, &sc->txbuf); 1052 list_move_tail(&bf->list, &ah->txbuf);
1059 sc->txbuf_len++; 1053 ah->txbuf_len++;
1060 txq->txq_len--; 1054 txq->txq_len--;
1061 spin_unlock_bh(&sc->txbuflock); 1055 spin_unlock_bh(&ah->txbuflock);
1062 } 1056 }
1063 txq->link = NULL; 1057 txq->link = NULL;
1064 txq->txq_poll_mark = false; 1058 txq->txq_poll_mark = false;
@@ -1068,14 +1062,14 @@ ath5k_drain_tx_buffs(struct ath5k_softc *sc)
1068} 1062}
1069 1063
1070static void 1064static void
1071ath5k_txq_release(struct ath5k_softc *sc) 1065ath5k_txq_release(struct ath5k_hw *ah)
1072{ 1066{
1073 struct ath5k_txq *txq = sc->txqs; 1067 struct ath5k_txq *txq = ah->txqs;
1074 unsigned int i; 1068 unsigned int i;
1075 1069
1076 for (i = 0; i < ARRAY_SIZE(sc->txqs); i++, txq++) 1070 for (i = 0; i < ARRAY_SIZE(ah->txqs); i++, txq++)
1077 if (txq->setup) { 1071 if (txq->setup) {
1078 ath5k_hw_release_tx_queue(sc->ah, txq->qnum); 1072 ath5k_hw_release_tx_queue(ah, txq->qnum);
1079 txq->setup = false; 1073 txq->setup = false;
1080 } 1074 }
1081} 1075}
@@ -1089,33 +1083,32 @@ ath5k_txq_release(struct ath5k_softc *sc)
1089 * Enable the receive h/w following a reset. 1083 * Enable the receive h/w following a reset.
1090 */ 1084 */
1091static int 1085static int
1092ath5k_rx_start(struct ath5k_softc *sc) 1086ath5k_rx_start(struct ath5k_hw *ah)
1093{ 1087{
1094 struct ath5k_hw *ah = sc->ah;
1095 struct ath_common *common = ath5k_hw_common(ah); 1088 struct ath_common *common = ath5k_hw_common(ah);
1096 struct ath5k_buf *bf; 1089 struct ath5k_buf *bf;
1097 int ret; 1090 int ret;
1098 1091
1099 common->rx_bufsize = roundup(IEEE80211_MAX_FRAME_LEN, common->cachelsz); 1092 common->rx_bufsize = roundup(IEEE80211_MAX_FRAME_LEN, common->cachelsz);
1100 1093
1101 ATH5K_DBG(sc, ATH5K_DEBUG_RESET, "cachelsz %u rx_bufsize %u\n", 1094 ATH5K_DBG(ah, ATH5K_DEBUG_RESET, "cachelsz %u rx_bufsize %u\n",
1102 common->cachelsz, common->rx_bufsize); 1095 common->cachelsz, common->rx_bufsize);
1103 1096
1104 spin_lock_bh(&sc->rxbuflock); 1097 spin_lock_bh(&ah->rxbuflock);
1105 sc->rxlink = NULL; 1098 ah->rxlink = NULL;
1106 list_for_each_entry(bf, &sc->rxbuf, list) { 1099 list_for_each_entry(bf, &ah->rxbuf, list) {
1107 ret = ath5k_rxbuf_setup(sc, bf); 1100 ret = ath5k_rxbuf_setup(ah, bf);
1108 if (ret != 0) { 1101 if (ret != 0) {
1109 spin_unlock_bh(&sc->rxbuflock); 1102 spin_unlock_bh(&ah->rxbuflock);
1110 goto err; 1103 goto err;
1111 } 1104 }
1112 } 1105 }
1113 bf = list_first_entry(&sc->rxbuf, struct ath5k_buf, list); 1106 bf = list_first_entry(&ah->rxbuf, struct ath5k_buf, list);
1114 ath5k_hw_set_rxdp(ah, bf->daddr); 1107 ath5k_hw_set_rxdp(ah, bf->daddr);
1115 spin_unlock_bh(&sc->rxbuflock); 1108 spin_unlock_bh(&ah->rxbuflock);
1116 1109
1117 ath5k_hw_start_rx_dma(ah); /* enable recv descriptors */ 1110 ath5k_hw_start_rx_dma(ah); /* enable recv descriptors */
1118 ath5k_update_bssid_mask_and_opmode(sc, NULL); /* set filters, etc. */ 1111 ath5k_update_bssid_mask_and_opmode(ah, NULL); /* set filters, etc. */
1119 ath5k_hw_start_rx_pcu(ah); /* re-enable PCU/DMA engine */ 1112 ath5k_hw_start_rx_pcu(ah); /* re-enable PCU/DMA engine */
1120 1113
1121 return 0; 1114 return 0;
@@ -1131,21 +1124,19 @@ err:
1131 * does. 1124 * does.
1132 */ 1125 */
1133static void 1126static void
1134ath5k_rx_stop(struct ath5k_softc *sc) 1127ath5k_rx_stop(struct ath5k_hw *ah)
1135{ 1128{
1136 struct ath5k_hw *ah = sc->ah;
1137 1129
1138 ath5k_hw_set_rx_filter(ah, 0); /* clear recv filter */ 1130 ath5k_hw_set_rx_filter(ah, 0); /* clear recv filter */
1139 ath5k_hw_stop_rx_pcu(ah); /* disable PCU */ 1131 ath5k_hw_stop_rx_pcu(ah); /* disable PCU */
1140 1132
1141 ath5k_debug_printrxbuffs(sc, ah); 1133 ath5k_debug_printrxbuffs(ah);
1142} 1134}
1143 1135
1144static unsigned int 1136static unsigned int
1145ath5k_rx_decrypted(struct ath5k_softc *sc, struct sk_buff *skb, 1137ath5k_rx_decrypted(struct ath5k_hw *ah, struct sk_buff *skb,
1146 struct ath5k_rx_status *rs) 1138 struct ath5k_rx_status *rs)
1147{ 1139{
1148 struct ath5k_hw *ah = sc->ah;
1149 struct ath_common *common = ath5k_hw_common(ah); 1140 struct ath_common *common = ath5k_hw_common(ah);
1150 struct ieee80211_hdr *hdr = (void *)skb->data; 1141 struct ieee80211_hdr *hdr = (void *)skb->data;
1151 unsigned int keyix, hlen; 1142 unsigned int keyix, hlen;
@@ -1172,10 +1163,10 @@ ath5k_rx_decrypted(struct ath5k_softc *sc, struct sk_buff *skb,
1172 1163
1173 1164
1174static void 1165static void
1175ath5k_check_ibss_tsf(struct ath5k_softc *sc, struct sk_buff *skb, 1166ath5k_check_ibss_tsf(struct ath5k_hw *ah, struct sk_buff *skb,
1176 struct ieee80211_rx_status *rxs) 1167 struct ieee80211_rx_status *rxs)
1177{ 1168{
1178 struct ath_common *common = ath5k_hw_common(sc->ah); 1169 struct ath_common *common = ath5k_hw_common(ah);
1179 u64 tsf, bc_tstamp; 1170 u64 tsf, bc_tstamp;
1180 u32 hw_tu; 1171 u32 hw_tu;
1181 struct ieee80211_mgmt *mgmt = (struct ieee80211_mgmt *)skb->data; 1172 struct ieee80211_mgmt *mgmt = (struct ieee80211_mgmt *)skb->data;
@@ -1188,11 +1179,11 @@ ath5k_check_ibss_tsf(struct ath5k_softc *sc, struct sk_buff *skb,
1188 * have updated the local TSF. We have to work around various 1179 * have updated the local TSF. We have to work around various
1189 * hardware bugs, though... 1180 * hardware bugs, though...
1190 */ 1181 */
1191 tsf = ath5k_hw_get_tsf64(sc->ah); 1182 tsf = ath5k_hw_get_tsf64(ah);
1192 bc_tstamp = le64_to_cpu(mgmt->u.beacon.timestamp); 1183 bc_tstamp = le64_to_cpu(mgmt->u.beacon.timestamp);
1193 hw_tu = TSF_TO_TU(tsf); 1184 hw_tu = TSF_TO_TU(tsf);
1194 1185
1195 ATH5K_DBG_UNLIMIT(sc, ATH5K_DEBUG_BEACON, 1186 ATH5K_DBG_UNLIMIT(ah, ATH5K_DEBUG_BEACON,
1196 "beacon %llx mactime %llx (diff %lld) tsf now %llx\n", 1187 "beacon %llx mactime %llx (diff %lld) tsf now %llx\n",
1197 (unsigned long long)bc_tstamp, 1188 (unsigned long long)bc_tstamp,
1198 (unsigned long long)rxs->mactime, 1189 (unsigned long long)rxs->mactime,
@@ -1211,7 +1202,7 @@ ath5k_check_ibss_tsf(struct ath5k_softc *sc, struct sk_buff *skb,
1211 * received, not like mac80211 which defines it at the start. 1202 * received, not like mac80211 which defines it at the start.
1212 */ 1203 */
1213 if (bc_tstamp > rxs->mactime) { 1204 if (bc_tstamp > rxs->mactime) {
1214 ATH5K_DBG_UNLIMIT(sc, ATH5K_DEBUG_BEACON, 1205 ATH5K_DBG_UNLIMIT(ah, ATH5K_DEBUG_BEACON,
1215 "fixing mactime from %llx to %llx\n", 1206 "fixing mactime from %llx to %llx\n",
1216 (unsigned long long)rxs->mactime, 1207 (unsigned long long)rxs->mactime,
1217 (unsigned long long)tsf); 1208 (unsigned long long)tsf);
@@ -1224,25 +1215,24 @@ ath5k_check_ibss_tsf(struct ath5k_softc *sc, struct sk_buff *skb,
1224 * beacons. This also takes care of synchronizing beacon sending 1215 * beacons. This also takes care of synchronizing beacon sending
1225 * times with other stations. 1216 * times with other stations.
1226 */ 1217 */
1227 if (hw_tu >= sc->nexttbtt) 1218 if (hw_tu >= ah->nexttbtt)
1228 ath5k_beacon_update_timers(sc, bc_tstamp); 1219 ath5k_beacon_update_timers(ah, bc_tstamp);
1229 1220
1230 /* Check if the beacon timers are still correct, because a TSF 1221 /* Check if the beacon timers are still correct, because a TSF
1231 * update might have created a window between them - for a 1222 * update might have created a window between them - for a
1232 * longer description see the comment of this function: */ 1223 * longer description see the comment of this function: */
1233 if (!ath5k_hw_check_beacon_timers(sc->ah, sc->bintval)) { 1224 if (!ath5k_hw_check_beacon_timers(ah, ah->bintval)) {
1234 ath5k_beacon_update_timers(sc, bc_tstamp); 1225 ath5k_beacon_update_timers(ah, bc_tstamp);
1235 ATH5K_DBG_UNLIMIT(sc, ATH5K_DEBUG_BEACON, 1226 ATH5K_DBG_UNLIMIT(ah, ATH5K_DEBUG_BEACON,
1236 "fixed beacon timers after beacon receive\n"); 1227 "fixed beacon timers after beacon receive\n");
1237 } 1228 }
1238 } 1229 }
1239} 1230}
1240 1231
1241static void 1232static void
1242ath5k_update_beacon_rssi(struct ath5k_softc *sc, struct sk_buff *skb, int rssi) 1233ath5k_update_beacon_rssi(struct ath5k_hw *ah, struct sk_buff *skb, int rssi)
1243{ 1234{
1244 struct ieee80211_mgmt *mgmt = (struct ieee80211_mgmt *)skb->data; 1235 struct ieee80211_mgmt *mgmt = (struct ieee80211_mgmt *)skb->data;
1245 struct ath5k_hw *ah = sc->ah;
1246 struct ath_common *common = ath5k_hw_common(ah); 1236 struct ath_common *common = ath5k_hw_common(ah);
1247 1237
1248 /* only beacons from our BSSID */ 1238 /* only beacons from our BSSID */
@@ -1324,7 +1314,7 @@ static int ath5k_remove_padding(struct sk_buff *skb)
1324} 1314}
1325 1315
1326static void 1316static void
1327ath5k_receive_frame(struct ath5k_softc *sc, struct sk_buff *skb, 1317ath5k_receive_frame(struct ath5k_hw *ah, struct sk_buff *skb,
1328 struct ath5k_rx_status *rs) 1318 struct ath5k_rx_status *rs)
1329{ 1319{
1330 struct ieee80211_rx_status *rxs; 1320 struct ieee80211_rx_status *rxs;
@@ -1357,37 +1347,37 @@ ath5k_receive_frame(struct ath5k_softc *sc, struct sk_buff *skb,
1357 * impossible to comply to that. This affects IBSS merge only 1347 * impossible to comply to that. This affects IBSS merge only
1358 * right now, so it's not too bad... 1348 * right now, so it's not too bad...
1359 */ 1349 */
1360 rxs->mactime = ath5k_extend_tsf(sc->ah, rs->rs_tstamp); 1350 rxs->mactime = ath5k_extend_tsf(ah, rs->rs_tstamp);
1361 rxs->flag |= RX_FLAG_MACTIME_MPDU; 1351 rxs->flag |= RX_FLAG_MACTIME_MPDU;
1362 1352
1363 rxs->freq = sc->curchan->center_freq; 1353 rxs->freq = ah->curchan->center_freq;
1364 rxs->band = sc->curchan->band; 1354 rxs->band = ah->curchan->band;
1365 1355
1366 rxs->signal = sc->ah->ah_noise_floor + rs->rs_rssi; 1356 rxs->signal = ah->ah_noise_floor + rs->rs_rssi;
1367 1357
1368 rxs->antenna = rs->rs_antenna; 1358 rxs->antenna = rs->rs_antenna;
1369 1359
1370 if (rs->rs_antenna > 0 && rs->rs_antenna < 5) 1360 if (rs->rs_antenna > 0 && rs->rs_antenna < 5)
1371 sc->stats.antenna_rx[rs->rs_antenna]++; 1361 ah->stats.antenna_rx[rs->rs_antenna]++;
1372 else 1362 else
1373 sc->stats.antenna_rx[0]++; /* invalid */ 1363 ah->stats.antenna_rx[0]++; /* invalid */
1374 1364
1375 rxs->rate_idx = ath5k_hw_to_driver_rix(sc, rs->rs_rate); 1365 rxs->rate_idx = ath5k_hw_to_driver_rix(ah, rs->rs_rate);
1376 rxs->flag |= ath5k_rx_decrypted(sc, skb, rs); 1366 rxs->flag |= ath5k_rx_decrypted(ah, skb, rs);
1377 1367
1378 if (rxs->rate_idx >= 0 && rs->rs_rate == 1368 if (rxs->rate_idx >= 0 && rs->rs_rate ==
1379 sc->sbands[sc->curchan->band].bitrates[rxs->rate_idx].hw_value_short) 1369 ah->sbands[ah->curchan->band].bitrates[rxs->rate_idx].hw_value_short)
1380 rxs->flag |= RX_FLAG_SHORTPRE; 1370 rxs->flag |= RX_FLAG_SHORTPRE;
1381 1371
1382 trace_ath5k_rx(sc, skb); 1372 trace_ath5k_rx(ah, skb);
1383 1373
1384 ath5k_update_beacon_rssi(sc, skb, rs->rs_rssi); 1374 ath5k_update_beacon_rssi(ah, skb, rs->rs_rssi);
1385 1375
1386 /* check beacons in IBSS mode */ 1376 /* check beacons in IBSS mode */
1387 if (sc->opmode == NL80211_IFTYPE_ADHOC) 1377 if (ah->opmode == NL80211_IFTYPE_ADHOC)
1388 ath5k_check_ibss_tsf(sc, skb, rxs); 1378 ath5k_check_ibss_tsf(ah, skb, rxs);
1389 1379
1390 ieee80211_rx(sc->hw, skb); 1380 ieee80211_rx(ah->hw, skb);
1391} 1381}
1392 1382
1393/** ath5k_frame_receive_ok() - Do we want to receive this frame or not? 1383/** ath5k_frame_receive_ok() - Do we want to receive this frame or not?
@@ -1396,20 +1386,20 @@ ath5k_receive_frame(struct ath5k_softc *sc, struct sk_buff *skb,
1396 * statistics. Return true if we want this frame, false if not. 1386 * statistics. Return true if we want this frame, false if not.
1397 */ 1387 */
1398static bool 1388static bool
1399ath5k_receive_frame_ok(struct ath5k_softc *sc, struct ath5k_rx_status *rs) 1389ath5k_receive_frame_ok(struct ath5k_hw *ah, struct ath5k_rx_status *rs)
1400{ 1390{
1401 sc->stats.rx_all_count++; 1391 ah->stats.rx_all_count++;
1402 sc->stats.rx_bytes_count += rs->rs_datalen; 1392 ah->stats.rx_bytes_count += rs->rs_datalen;
1403 1393
1404 if (unlikely(rs->rs_status)) { 1394 if (unlikely(rs->rs_status)) {
1405 if (rs->rs_status & AR5K_RXERR_CRC) 1395 if (rs->rs_status & AR5K_RXERR_CRC)
1406 sc->stats.rxerr_crc++; 1396 ah->stats.rxerr_crc++;
1407 if (rs->rs_status & AR5K_RXERR_FIFO) 1397 if (rs->rs_status & AR5K_RXERR_FIFO)
1408 sc->stats.rxerr_fifo++; 1398 ah->stats.rxerr_fifo++;
1409 if (rs->rs_status & AR5K_RXERR_PHY) { 1399 if (rs->rs_status & AR5K_RXERR_PHY) {
1410 sc->stats.rxerr_phy++; 1400 ah->stats.rxerr_phy++;
1411 if (rs->rs_phyerr > 0 && rs->rs_phyerr < 32) 1401 if (rs->rs_phyerr > 0 && rs->rs_phyerr < 32)
1412 sc->stats.rxerr_phy_code[rs->rs_phyerr]++; 1402 ah->stats.rxerr_phy_code[rs->rs_phyerr]++;
1413 return false; 1403 return false;
1414 } 1404 }
1415 if (rs->rs_status & AR5K_RXERR_DECRYPT) { 1405 if (rs->rs_status & AR5K_RXERR_DECRYPT) {
@@ -1423,13 +1413,13 @@ ath5k_receive_frame_ok(struct ath5k_softc *sc, struct ath5k_rx_status *rs)
1423 * 1413 *
1424 * XXX do key cache faulting 1414 * XXX do key cache faulting
1425 */ 1415 */
1426 sc->stats.rxerr_decrypt++; 1416 ah->stats.rxerr_decrypt++;
1427 if (rs->rs_keyix == AR5K_RXKEYIX_INVALID && 1417 if (rs->rs_keyix == AR5K_RXKEYIX_INVALID &&
1428 !(rs->rs_status & AR5K_RXERR_CRC)) 1418 !(rs->rs_status & AR5K_RXERR_CRC))
1429 return true; 1419 return true;
1430 } 1420 }
1431 if (rs->rs_status & AR5K_RXERR_MIC) { 1421 if (rs->rs_status & AR5K_RXERR_MIC) {
1432 sc->stats.rxerr_mic++; 1422 ah->stats.rxerr_mic++;
1433 return true; 1423 return true;
1434 } 1424 }
1435 1425
@@ -1439,26 +1429,26 @@ ath5k_receive_frame_ok(struct ath5k_softc *sc, struct ath5k_rx_status *rs)
1439 } 1429 }
1440 1430
1441 if (unlikely(rs->rs_more)) { 1431 if (unlikely(rs->rs_more)) {
1442 sc->stats.rxerr_jumbo++; 1432 ah->stats.rxerr_jumbo++;
1443 return false; 1433 return false;
1444 } 1434 }
1445 return true; 1435 return true;
1446} 1436}
1447 1437
1448static void 1438static void
1449ath5k_set_current_imask(struct ath5k_softc *sc) 1439ath5k_set_current_imask(struct ath5k_hw *ah)
1450{ 1440{
1451 enum ath5k_int imask; 1441 enum ath5k_int imask;
1452 unsigned long flags; 1442 unsigned long flags;
1453 1443
1454 spin_lock_irqsave(&sc->irqlock, flags); 1444 spin_lock_irqsave(&ah->irqlock, flags);
1455 imask = sc->imask; 1445 imask = ah->imask;
1456 if (sc->rx_pending) 1446 if (ah->rx_pending)
1457 imask &= ~AR5K_INT_RX_ALL; 1447 imask &= ~AR5K_INT_RX_ALL;
1458 if (sc->tx_pending) 1448 if (ah->tx_pending)
1459 imask &= ~AR5K_INT_TX_ALL; 1449 imask &= ~AR5K_INT_TX_ALL;
1460 ath5k_hw_set_imr(sc->ah, imask); 1450 ath5k_hw_set_imr(ah, imask);
1461 spin_unlock_irqrestore(&sc->irqlock, flags); 1451 spin_unlock_irqrestore(&ah->irqlock, flags);
1462} 1452}
1463 1453
1464static void 1454static void
@@ -1467,39 +1457,38 @@ ath5k_tasklet_rx(unsigned long data)
1467 struct ath5k_rx_status rs = {}; 1457 struct ath5k_rx_status rs = {};
1468 struct sk_buff *skb, *next_skb; 1458 struct sk_buff *skb, *next_skb;
1469 dma_addr_t next_skb_addr; 1459 dma_addr_t next_skb_addr;
1470 struct ath5k_softc *sc = (void *)data; 1460 struct ath5k_hw *ah = (void *)data;
1471 struct ath5k_hw *ah = sc->ah;
1472 struct ath_common *common = ath5k_hw_common(ah); 1461 struct ath_common *common = ath5k_hw_common(ah);
1473 struct ath5k_buf *bf; 1462 struct ath5k_buf *bf;
1474 struct ath5k_desc *ds; 1463 struct ath5k_desc *ds;
1475 int ret; 1464 int ret;
1476 1465
1477 spin_lock(&sc->rxbuflock); 1466 spin_lock(&ah->rxbuflock);
1478 if (list_empty(&sc->rxbuf)) { 1467 if (list_empty(&ah->rxbuf)) {
1479 ATH5K_WARN(sc, "empty rx buf pool\n"); 1468 ATH5K_WARN(ah, "empty rx buf pool\n");
1480 goto unlock; 1469 goto unlock;
1481 } 1470 }
1482 do { 1471 do {
1483 bf = list_first_entry(&sc->rxbuf, struct ath5k_buf, list); 1472 bf = list_first_entry(&ah->rxbuf, struct ath5k_buf, list);
1484 BUG_ON(bf->skb == NULL); 1473 BUG_ON(bf->skb == NULL);
1485 skb = bf->skb; 1474 skb = bf->skb;
1486 ds = bf->desc; 1475 ds = bf->desc;
1487 1476
1488 /* bail if HW is still using self-linked descriptor */ 1477 /* bail if HW is still using self-linked descriptor */
1489 if (ath5k_hw_get_rxdp(sc->ah) == bf->daddr) 1478 if (ath5k_hw_get_rxdp(ah) == bf->daddr)
1490 break; 1479 break;
1491 1480
1492 ret = sc->ah->ah_proc_rx_desc(sc->ah, ds, &rs); 1481 ret = ah->ah_proc_rx_desc(ah, ds, &rs);
1493 if (unlikely(ret == -EINPROGRESS)) 1482 if (unlikely(ret == -EINPROGRESS))
1494 break; 1483 break;
1495 else if (unlikely(ret)) { 1484 else if (unlikely(ret)) {
1496 ATH5K_ERR(sc, "error in processing rx descriptor\n"); 1485 ATH5K_ERR(ah, "error in processing rx descriptor\n");
1497 sc->stats.rxerr_proc++; 1486 ah->stats.rxerr_proc++;
1498 break; 1487 break;
1499 } 1488 }
1500 1489
1501 if (ath5k_receive_frame_ok(sc, &rs)) { 1490 if (ath5k_receive_frame_ok(ah, &rs)) {
1502 next_skb = ath5k_rx_skb_alloc(sc, &next_skb_addr); 1491 next_skb = ath5k_rx_skb_alloc(ah, &next_skb_addr);
1503 1492
1504 /* 1493 /*
1505 * If we can't replace bf->skb with a new skb under 1494 * If we can't replace bf->skb with a new skb under
@@ -1508,24 +1497,24 @@ ath5k_tasklet_rx(unsigned long data)
1508 if (!next_skb) 1497 if (!next_skb)
1509 goto next; 1498 goto next;
1510 1499
1511 dma_unmap_single(sc->dev, bf->skbaddr, 1500 dma_unmap_single(ah->dev, bf->skbaddr,
1512 common->rx_bufsize, 1501 common->rx_bufsize,
1513 DMA_FROM_DEVICE); 1502 DMA_FROM_DEVICE);
1514 1503
1515 skb_put(skb, rs.rs_datalen); 1504 skb_put(skb, rs.rs_datalen);
1516 1505
1517 ath5k_receive_frame(sc, skb, &rs); 1506 ath5k_receive_frame(ah, skb, &rs);
1518 1507
1519 bf->skb = next_skb; 1508 bf->skb = next_skb;
1520 bf->skbaddr = next_skb_addr; 1509 bf->skbaddr = next_skb_addr;
1521 } 1510 }
1522next: 1511next:
1523 list_move_tail(&bf->list, &sc->rxbuf); 1512 list_move_tail(&bf->list, &ah->rxbuf);
1524 } while (ath5k_rxbuf_setup(sc, bf) == 0); 1513 } while (ath5k_rxbuf_setup(ah, bf) == 0);
1525unlock: 1514unlock:
1526 spin_unlock(&sc->rxbuflock); 1515 spin_unlock(&ah->rxbuflock);
1527 sc->rx_pending = false; 1516 ah->rx_pending = false;
1528 ath5k_set_current_imask(sc); 1517 ath5k_set_current_imask(ah);
1529} 1518}
1530 1519
1531 1520
@@ -1537,12 +1526,12 @@ void
1537ath5k_tx_queue(struct ieee80211_hw *hw, struct sk_buff *skb, 1526ath5k_tx_queue(struct ieee80211_hw *hw, struct sk_buff *skb,
1538 struct ath5k_txq *txq) 1527 struct ath5k_txq *txq)
1539{ 1528{
1540 struct ath5k_softc *sc = hw->priv; 1529 struct ath5k_hw *ah = hw->priv;
1541 struct ath5k_buf *bf; 1530 struct ath5k_buf *bf;
1542 unsigned long flags; 1531 unsigned long flags;
1543 int padsize; 1532 int padsize;
1544 1533
1545 trace_ath5k_tx(sc, skb, txq); 1534 trace_ath5k_tx(ah, skb, txq);
1546 1535
1547 /* 1536 /*
1548 * The hardware expects the header padded to 4 byte boundaries. 1537 * The hardware expects the header padded to 4 byte boundaries.
@@ -1550,7 +1539,7 @@ ath5k_tx_queue(struct ieee80211_hw *hw, struct sk_buff *skb,
1550 */ 1539 */
1551 padsize = ath5k_add_padding(skb); 1540 padsize = ath5k_add_padding(skb);
1552 if (padsize < 0) { 1541 if (padsize < 0) {
1553 ATH5K_ERR(sc, "tx hdrlen not %%4: not enough" 1542 ATH5K_ERR(ah, "tx hdrlen not %%4: not enough"
1554 " headroom to pad"); 1543 " headroom to pad");
1555 goto drop_packet; 1544 goto drop_packet;
1556 } 1545 }
@@ -1559,28 +1548,28 @@ ath5k_tx_queue(struct ieee80211_hw *hw, struct sk_buff *skb,
1559 txq->qnum <= AR5K_TX_QUEUE_ID_DATA_MAX) 1548 txq->qnum <= AR5K_TX_QUEUE_ID_DATA_MAX)
1560 ieee80211_stop_queue(hw, txq->qnum); 1549 ieee80211_stop_queue(hw, txq->qnum);
1561 1550
1562 spin_lock_irqsave(&sc->txbuflock, flags); 1551 spin_lock_irqsave(&ah->txbuflock, flags);
1563 if (list_empty(&sc->txbuf)) { 1552 if (list_empty(&ah->txbuf)) {
1564 ATH5K_ERR(sc, "no further txbuf available, dropping packet\n"); 1553 ATH5K_ERR(ah, "no further txbuf available, dropping packet\n");
1565 spin_unlock_irqrestore(&sc->txbuflock, flags); 1554 spin_unlock_irqrestore(&ah->txbuflock, flags);
1566 ieee80211_stop_queues(hw); 1555 ieee80211_stop_queues(hw);
1567 goto drop_packet; 1556 goto drop_packet;
1568 } 1557 }
1569 bf = list_first_entry(&sc->txbuf, struct ath5k_buf, list); 1558 bf = list_first_entry(&ah->txbuf, struct ath5k_buf, list);
1570 list_del(&bf->list); 1559 list_del(&bf->list);
1571 sc->txbuf_len--; 1560 ah->txbuf_len--;
1572 if (list_empty(&sc->txbuf)) 1561 if (list_empty(&ah->txbuf))
1573 ieee80211_stop_queues(hw); 1562 ieee80211_stop_queues(hw);
1574 spin_unlock_irqrestore(&sc->txbuflock, flags); 1563 spin_unlock_irqrestore(&ah->txbuflock, flags);
1575 1564
1576 bf->skb = skb; 1565 bf->skb = skb;
1577 1566
1578 if (ath5k_txbuf_setup(sc, bf, txq, padsize)) { 1567 if (ath5k_txbuf_setup(ah, bf, txq, padsize)) {
1579 bf->skb = NULL; 1568 bf->skb = NULL;
1580 spin_lock_irqsave(&sc->txbuflock, flags); 1569 spin_lock_irqsave(&ah->txbuflock, flags);
1581 list_add_tail(&bf->list, &sc->txbuf); 1570 list_add_tail(&bf->list, &ah->txbuf);
1582 sc->txbuf_len++; 1571 ah->txbuf_len++;
1583 spin_unlock_irqrestore(&sc->txbuflock, flags); 1572 spin_unlock_irqrestore(&ah->txbuflock, flags);
1584 goto drop_packet; 1573 goto drop_packet;
1585 } 1574 }
1586 return; 1575 return;
@@ -1590,15 +1579,15 @@ drop_packet:
1590} 1579}
1591 1580
1592static void 1581static void
1593ath5k_tx_frame_completed(struct ath5k_softc *sc, struct sk_buff *skb, 1582ath5k_tx_frame_completed(struct ath5k_hw *ah, struct sk_buff *skb,
1594 struct ath5k_txq *txq, struct ath5k_tx_status *ts) 1583 struct ath5k_txq *txq, struct ath5k_tx_status *ts)
1595{ 1584{
1596 struct ieee80211_tx_info *info; 1585 struct ieee80211_tx_info *info;
1597 u8 tries[3]; 1586 u8 tries[3];
1598 int i; 1587 int i;
1599 1588
1600 sc->stats.tx_all_count++; 1589 ah->stats.tx_all_count++;
1601 sc->stats.tx_bytes_count += skb->len; 1590 ah->stats.tx_bytes_count += skb->len;
1602 info = IEEE80211_SKB_CB(skb); 1591 info = IEEE80211_SKB_CB(skb);
1603 1592
1604 tries[0] = info->status.rates[0].count; 1593 tries[0] = info->status.rates[0].count;
@@ -1618,15 +1607,15 @@ ath5k_tx_frame_completed(struct ath5k_softc *sc, struct sk_buff *skb,
1618 info->status.rates[ts->ts_final_idx + 1].idx = -1; 1607 info->status.rates[ts->ts_final_idx + 1].idx = -1;
1619 1608
1620 if (unlikely(ts->ts_status)) { 1609 if (unlikely(ts->ts_status)) {
1621 sc->stats.ack_fail++; 1610 ah->stats.ack_fail++;
1622 if (ts->ts_status & AR5K_TXERR_FILT) { 1611 if (ts->ts_status & AR5K_TXERR_FILT) {
1623 info->flags |= IEEE80211_TX_STAT_TX_FILTERED; 1612 info->flags |= IEEE80211_TX_STAT_TX_FILTERED;
1624 sc->stats.txerr_filt++; 1613 ah->stats.txerr_filt++;
1625 } 1614 }
1626 if (ts->ts_status & AR5K_TXERR_XRETRY) 1615 if (ts->ts_status & AR5K_TXERR_XRETRY)
1627 sc->stats.txerr_retry++; 1616 ah->stats.txerr_retry++;
1628 if (ts->ts_status & AR5K_TXERR_FIFO) 1617 if (ts->ts_status & AR5K_TXERR_FIFO)
1629 sc->stats.txerr_fifo++; 1618 ah->stats.txerr_fifo++;
1630 } else { 1619 } else {
1631 info->flags |= IEEE80211_TX_STAT_ACK; 1620 info->flags |= IEEE80211_TX_STAT_ACK;
1632 info->status.ack_signal = ts->ts_rssi; 1621 info->status.ack_signal = ts->ts_rssi;
@@ -1642,16 +1631,16 @@ ath5k_tx_frame_completed(struct ath5k_softc *sc, struct sk_buff *skb,
1642 ath5k_remove_padding(skb); 1631 ath5k_remove_padding(skb);
1643 1632
1644 if (ts->ts_antenna > 0 && ts->ts_antenna < 5) 1633 if (ts->ts_antenna > 0 && ts->ts_antenna < 5)
1645 sc->stats.antenna_tx[ts->ts_antenna]++; 1634 ah->stats.antenna_tx[ts->ts_antenna]++;
1646 else 1635 else
1647 sc->stats.antenna_tx[0]++; /* invalid */ 1636 ah->stats.antenna_tx[0]++; /* invalid */
1648 1637
1649 trace_ath5k_tx_complete(sc, skb, txq, ts); 1638 trace_ath5k_tx_complete(ah, skb, txq, ts);
1650 ieee80211_tx_status(sc->hw, skb); 1639 ieee80211_tx_status(ah->hw, skb);
1651} 1640}
1652 1641
1653static void 1642static void
1654ath5k_tx_processq(struct ath5k_softc *sc, struct ath5k_txq *txq) 1643ath5k_tx_processq(struct ath5k_hw *ah, struct ath5k_txq *txq)
1655{ 1644{
1656 struct ath5k_tx_status ts = {}; 1645 struct ath5k_tx_status ts = {};
1657 struct ath5k_buf *bf, *bf0; 1646 struct ath5k_buf *bf, *bf0;
@@ -1668,11 +1657,11 @@ ath5k_tx_processq(struct ath5k_softc *sc, struct ath5k_txq *txq)
1668 if (bf->skb != NULL) { 1657 if (bf->skb != NULL) {
1669 ds = bf->desc; 1658 ds = bf->desc;
1670 1659
1671 ret = sc->ah->ah_proc_tx_desc(sc->ah, ds, &ts); 1660 ret = ah->ah_proc_tx_desc(ah, ds, &ts);
1672 if (unlikely(ret == -EINPROGRESS)) 1661 if (unlikely(ret == -EINPROGRESS))
1673 break; 1662 break;
1674 else if (unlikely(ret)) { 1663 else if (unlikely(ret)) {
1675 ATH5K_ERR(sc, 1664 ATH5K_ERR(ah,
1676 "error %d while processing " 1665 "error %d while processing "
1677 "queue %u\n", ret, txq->qnum); 1666 "queue %u\n", ret, txq->qnum);
1678 break; 1667 break;
@@ -1681,9 +1670,9 @@ ath5k_tx_processq(struct ath5k_softc *sc, struct ath5k_txq *txq)
1681 skb = bf->skb; 1670 skb = bf->skb;
1682 bf->skb = NULL; 1671 bf->skb = NULL;
1683 1672
1684 dma_unmap_single(sc->dev, bf->skbaddr, skb->len, 1673 dma_unmap_single(ah->dev, bf->skbaddr, skb->len,
1685 DMA_TO_DEVICE); 1674 DMA_TO_DEVICE);
1686 ath5k_tx_frame_completed(sc, skb, txq, &ts); 1675 ath5k_tx_frame_completed(ah, skb, txq, &ts);
1687 } 1676 }
1688 1677
1689 /* 1678 /*
@@ -1692,31 +1681,31 @@ ath5k_tx_processq(struct ath5k_softc *sc, struct ath5k_txq *txq)
1692 * host memory and moved on. 1681 * host memory and moved on.
1693 * Always keep the last descriptor to avoid HW races... 1682 * Always keep the last descriptor to avoid HW races...
1694 */ 1683 */
1695 if (ath5k_hw_get_txdp(sc->ah, txq->qnum) != bf->daddr) { 1684 if (ath5k_hw_get_txdp(ah, txq->qnum) != bf->daddr) {
1696 spin_lock(&sc->txbuflock); 1685 spin_lock(&ah->txbuflock);
1697 list_move_tail(&bf->list, &sc->txbuf); 1686 list_move_tail(&bf->list, &ah->txbuf);
1698 sc->txbuf_len++; 1687 ah->txbuf_len++;
1699 txq->txq_len--; 1688 txq->txq_len--;
1700 spin_unlock(&sc->txbuflock); 1689 spin_unlock(&ah->txbuflock);
1701 } 1690 }
1702 } 1691 }
1703 spin_unlock(&txq->lock); 1692 spin_unlock(&txq->lock);
1704 if (txq->txq_len < ATH5K_TXQ_LEN_LOW && txq->qnum < 4) 1693 if (txq->txq_len < ATH5K_TXQ_LEN_LOW && txq->qnum < 4)
1705 ieee80211_wake_queue(sc->hw, txq->qnum); 1694 ieee80211_wake_queue(ah->hw, txq->qnum);
1706} 1695}
1707 1696
1708static void 1697static void
1709ath5k_tasklet_tx(unsigned long data) 1698ath5k_tasklet_tx(unsigned long data)
1710{ 1699{
1711 int i; 1700 int i;
1712 struct ath5k_softc *sc = (void *)data; 1701 struct ath5k_hw *ah = (void *)data;
1713 1702
1714 for (i = 0; i < AR5K_NUM_TX_QUEUES; i++) 1703 for (i = 0; i < AR5K_NUM_TX_QUEUES; i++)
1715 if (sc->txqs[i].setup && (sc->ah->ah_txq_isr & BIT(i))) 1704 if (ah->txqs[i].setup && (ah->ah_txq_isr & BIT(i)))
1716 ath5k_tx_processq(sc, &sc->txqs[i]); 1705 ath5k_tx_processq(ah, &ah->txqs[i]);
1717 1706
1718 sc->tx_pending = false; 1707 ah->tx_pending = false;
1719 ath5k_set_current_imask(sc); 1708 ath5k_set_current_imask(ah);
1720} 1709}
1721 1710
1722 1711
@@ -1728,25 +1717,24 @@ ath5k_tasklet_tx(unsigned long data)
1728 * Setup the beacon frame for transmit. 1717 * Setup the beacon frame for transmit.
1729 */ 1718 */
1730static int 1719static int
1731ath5k_beacon_setup(struct ath5k_softc *sc, struct ath5k_buf *bf) 1720ath5k_beacon_setup(struct ath5k_hw *ah, struct ath5k_buf *bf)
1732{ 1721{
1733 struct sk_buff *skb = bf->skb; 1722 struct sk_buff *skb = bf->skb;
1734 struct ieee80211_tx_info *info = IEEE80211_SKB_CB(skb); 1723 struct ieee80211_tx_info *info = IEEE80211_SKB_CB(skb);
1735 struct ath5k_hw *ah = sc->ah;
1736 struct ath5k_desc *ds; 1724 struct ath5k_desc *ds;
1737 int ret = 0; 1725 int ret = 0;
1738 u8 antenna; 1726 u8 antenna;
1739 u32 flags; 1727 u32 flags;
1740 const int padsize = 0; 1728 const int padsize = 0;
1741 1729
1742 bf->skbaddr = dma_map_single(sc->dev, skb->data, skb->len, 1730 bf->skbaddr = dma_map_single(ah->dev, skb->data, skb->len,
1743 DMA_TO_DEVICE); 1731 DMA_TO_DEVICE);
1744 ATH5K_DBG(sc, ATH5K_DEBUG_BEACON, "skb %p [data %p len %u] " 1732 ATH5K_DBG(ah, ATH5K_DEBUG_BEACON, "skb %p [data %p len %u] "
1745 "skbaddr %llx\n", skb, skb->data, skb->len, 1733 "skbaddr %llx\n", skb, skb->data, skb->len,
1746 (unsigned long long)bf->skbaddr); 1734 (unsigned long long)bf->skbaddr);
1747 1735
1748 if (dma_mapping_error(sc->dev, bf->skbaddr)) { 1736 if (dma_mapping_error(ah->dev, bf->skbaddr)) {
1749 ATH5K_ERR(sc, "beacon DMA mapping failed\n"); 1737 ATH5K_ERR(ah, "beacon DMA mapping failed\n");
1750 return -EIO; 1738 return -EIO;
1751 } 1739 }
1752 1740
@@ -1754,7 +1742,7 @@ ath5k_beacon_setup(struct ath5k_softc *sc, struct ath5k_buf *bf)
1754 antenna = ah->ah_tx_ant; 1742 antenna = ah->ah_tx_ant;
1755 1743
1756 flags = AR5K_TXDESC_NOACK; 1744 flags = AR5K_TXDESC_NOACK;
1757 if (sc->opmode == NL80211_IFTYPE_ADHOC && ath5k_hw_hasveol(ah)) { 1745 if (ah->opmode == NL80211_IFTYPE_ADHOC && ath5k_hw_hasveol(ah)) {
1758 ds->ds_link = bf->daddr; /* self-linked */ 1746 ds->ds_link = bf->daddr; /* self-linked */
1759 flags |= AR5K_TXDESC_VEOL; 1747 flags |= AR5K_TXDESC_VEOL;
1760 } else 1748 } else
@@ -1779,7 +1767,7 @@ ath5k_beacon_setup(struct ath5k_softc *sc, struct ath5k_buf *bf)
1779 * on all of them. 1767 * on all of them.
1780 */ 1768 */
1781 if (ah->ah_ant_mode == AR5K_ANTMODE_SECTOR_AP) 1769 if (ah->ah_ant_mode == AR5K_ANTMODE_SECTOR_AP)
1782 antenna = sc->bsent & 4 ? 2 : 1; 1770 antenna = ah->bsent & 4 ? 2 : 1;
1783 1771
1784 1772
1785 /* FIXME: If we are in g mode and rate is a CCK rate 1773 /* FIXME: If we are in g mode and rate is a CCK rate
@@ -1788,8 +1776,8 @@ ath5k_beacon_setup(struct ath5k_softc *sc, struct ath5k_buf *bf)
1788 ds->ds_data = bf->skbaddr; 1776 ds->ds_data = bf->skbaddr;
1789 ret = ah->ah_setup_tx_desc(ah, ds, skb->len, 1777 ret = ah->ah_setup_tx_desc(ah, ds, skb->len,
1790 ieee80211_get_hdrlen_from_skb(skb), padsize, 1778 ieee80211_get_hdrlen_from_skb(skb), padsize,
1791 AR5K_PKT_TYPE_BEACON, (sc->power_level * 2), 1779 AR5K_PKT_TYPE_BEACON, (ah->power_level * 2),
1792 ieee80211_get_tx_rate(sc->hw, info)->hw_value, 1780 ieee80211_get_tx_rate(ah->hw, info)->hw_value,
1793 1, AR5K_TXKEYIX_INVALID, 1781 1, AR5K_TXKEYIX_INVALID,
1794 antenna, flags, 0, 0); 1782 antenna, flags, 0, 0);
1795 if (ret) 1783 if (ret)
@@ -1797,7 +1785,7 @@ ath5k_beacon_setup(struct ath5k_softc *sc, struct ath5k_buf *bf)
1797 1785
1798 return 0; 1786 return 0;
1799err_unmap: 1787err_unmap:
1800 dma_unmap_single(sc->dev, bf->skbaddr, skb->len, DMA_TO_DEVICE); 1788 dma_unmap_single(ah->dev, bf->skbaddr, skb->len, DMA_TO_DEVICE);
1801 return ret; 1789 return ret;
1802} 1790}
1803 1791
@@ -1812,7 +1800,7 @@ int
1812ath5k_beacon_update(struct ieee80211_hw *hw, struct ieee80211_vif *vif) 1800ath5k_beacon_update(struct ieee80211_hw *hw, struct ieee80211_vif *vif)
1813{ 1801{
1814 int ret; 1802 int ret;
1815 struct ath5k_softc *sc = hw->priv; 1803 struct ath5k_hw *ah = hw->priv;
1816 struct ath5k_vif *avf = (void *)vif->drv_priv; 1804 struct ath5k_vif *avf = (void *)vif->drv_priv;
1817 struct sk_buff *skb; 1805 struct sk_buff *skb;
1818 1806
@@ -1828,9 +1816,9 @@ ath5k_beacon_update(struct ieee80211_hw *hw, struct ieee80211_vif *vif)
1828 goto out; 1816 goto out;
1829 } 1817 }
1830 1818
1831 ath5k_txbuf_free_skb(sc, avf->bbuf); 1819 ath5k_txbuf_free_skb(ah, avf->bbuf);
1832 avf->bbuf->skb = skb; 1820 avf->bbuf->skb = skb;
1833 ret = ath5k_beacon_setup(sc, avf->bbuf); 1821 ret = ath5k_beacon_setup(ah, avf->bbuf);
1834 if (ret) 1822 if (ret)
1835 avf->bbuf->skb = NULL; 1823 avf->bbuf->skb = NULL;
1836out: 1824out:
@@ -1846,15 +1834,14 @@ out:
1846 * or user context from ath5k_beacon_config. 1834 * or user context from ath5k_beacon_config.
1847 */ 1835 */
1848static void 1836static void
1849ath5k_beacon_send(struct ath5k_softc *sc) 1837ath5k_beacon_send(struct ath5k_hw *ah)
1850{ 1838{
1851 struct ath5k_hw *ah = sc->ah;
1852 struct ieee80211_vif *vif; 1839 struct ieee80211_vif *vif;
1853 struct ath5k_vif *avf; 1840 struct ath5k_vif *avf;
1854 struct ath5k_buf *bf; 1841 struct ath5k_buf *bf;
1855 struct sk_buff *skb; 1842 struct sk_buff *skb;
1856 1843
1857 ATH5K_DBG_UNLIMIT(sc, ATH5K_DEBUG_BEACON, "in beacon_send\n"); 1844 ATH5K_DBG_UNLIMIT(ah, ATH5K_DEBUG_BEACON, "in beacon_send\n");
1858 1845
1859 /* 1846 /*
1860 * Check if the previous beacon has gone out. If 1847 * Check if the previous beacon has gone out. If
@@ -1863,47 +1850,47 @@ ath5k_beacon_send(struct ath5k_softc *sc)
1863 * indicate a problem and should not occur. If we 1850 * indicate a problem and should not occur. If we
1864 * miss too many consecutive beacons reset the device. 1851 * miss too many consecutive beacons reset the device.
1865 */ 1852 */
1866 if (unlikely(ath5k_hw_num_tx_pending(ah, sc->bhalq) != 0)) { 1853 if (unlikely(ath5k_hw_num_tx_pending(ah, ah->bhalq) != 0)) {
1867 sc->bmisscount++; 1854 ah->bmisscount++;
1868 ATH5K_DBG(sc, ATH5K_DEBUG_BEACON, 1855 ATH5K_DBG(ah, ATH5K_DEBUG_BEACON,
1869 "missed %u consecutive beacons\n", sc->bmisscount); 1856 "missed %u consecutive beacons\n", ah->bmisscount);
1870 if (sc->bmisscount > 10) { /* NB: 10 is a guess */ 1857 if (ah->bmisscount > 10) { /* NB: 10 is a guess */
1871 ATH5K_DBG(sc, ATH5K_DEBUG_BEACON, 1858 ATH5K_DBG(ah, ATH5K_DEBUG_BEACON,
1872 "stuck beacon time (%u missed)\n", 1859 "stuck beacon time (%u missed)\n",
1873 sc->bmisscount); 1860 ah->bmisscount);
1874 ATH5K_DBG(sc, ATH5K_DEBUG_RESET, 1861 ATH5K_DBG(ah, ATH5K_DEBUG_RESET,
1875 "stuck beacon, resetting\n"); 1862 "stuck beacon, resetting\n");
1876 ieee80211_queue_work(sc->hw, &sc->reset_work); 1863 ieee80211_queue_work(ah->hw, &ah->reset_work);
1877 } 1864 }
1878 return; 1865 return;
1879 } 1866 }
1880 if (unlikely(sc->bmisscount != 0)) { 1867 if (unlikely(ah->bmisscount != 0)) {
1881 ATH5K_DBG(sc, ATH5K_DEBUG_BEACON, 1868 ATH5K_DBG(ah, ATH5K_DEBUG_BEACON,
1882 "resume beacon xmit after %u misses\n", 1869 "resume beacon xmit after %u misses\n",
1883 sc->bmisscount); 1870 ah->bmisscount);
1884 sc->bmisscount = 0; 1871 ah->bmisscount = 0;
1885 } 1872 }
1886 1873
1887 if ((sc->opmode == NL80211_IFTYPE_AP && sc->num_ap_vifs > 1) || 1874 if ((ah->opmode == NL80211_IFTYPE_AP && ah->num_ap_vifs > 1) ||
1888 sc->opmode == NL80211_IFTYPE_MESH_POINT) { 1875 ah->opmode == NL80211_IFTYPE_MESH_POINT) {
1889 u64 tsf = ath5k_hw_get_tsf64(ah); 1876 u64 tsf = ath5k_hw_get_tsf64(ah);
1890 u32 tsftu = TSF_TO_TU(tsf); 1877 u32 tsftu = TSF_TO_TU(tsf);
1891 int slot = ((tsftu % sc->bintval) * ATH_BCBUF) / sc->bintval; 1878 int slot = ((tsftu % ah->bintval) * ATH_BCBUF) / ah->bintval;
1892 vif = sc->bslot[(slot + 1) % ATH_BCBUF]; 1879 vif = ah->bslot[(slot + 1) % ATH_BCBUF];
1893 ATH5K_DBG(sc, ATH5K_DEBUG_BEACON, 1880 ATH5K_DBG(ah, ATH5K_DEBUG_BEACON,
1894 "tsf %llx tsftu %x intval %u slot %u vif %p\n", 1881 "tsf %llx tsftu %x intval %u slot %u vif %p\n",
1895 (unsigned long long)tsf, tsftu, sc->bintval, slot, vif); 1882 (unsigned long long)tsf, tsftu, ah->bintval, slot, vif);
1896 } else /* only one interface */ 1883 } else /* only one interface */
1897 vif = sc->bslot[0]; 1884 vif = ah->bslot[0];
1898 1885
1899 if (!vif) 1886 if (!vif)
1900 return; 1887 return;
1901 1888
1902 avf = (void *)vif->drv_priv; 1889 avf = (void *)vif->drv_priv;
1903 bf = avf->bbuf; 1890 bf = avf->bbuf;
1904 if (unlikely(bf->skb == NULL || sc->opmode == NL80211_IFTYPE_STATION || 1891 if (unlikely(bf->skb == NULL || ah->opmode == NL80211_IFTYPE_STATION ||
1905 sc->opmode == NL80211_IFTYPE_MONITOR)) { 1892 ah->opmode == NL80211_IFTYPE_MONITOR)) {
1906 ATH5K_WARN(sc, "bf=%p bf_skb=%p\n", bf, bf ? bf->skb : NULL); 1893 ATH5K_WARN(ah, "bf=%p bf_skb=%p\n", bf, bf ? bf->skb : NULL);
1907 return; 1894 return;
1908 } 1895 }
1909 1896
@@ -1912,40 +1899,40 @@ ath5k_beacon_send(struct ath5k_softc *sc)
1912 * This should never fail since we check above that no frames 1899 * This should never fail since we check above that no frames
1913 * are still pending on the queue. 1900 * are still pending on the queue.
1914 */ 1901 */
1915 if (unlikely(ath5k_hw_stop_beacon_queue(ah, sc->bhalq))) { 1902 if (unlikely(ath5k_hw_stop_beacon_queue(ah, ah->bhalq))) {
1916 ATH5K_WARN(sc, "beacon queue %u didn't start/stop ?\n", sc->bhalq); 1903 ATH5K_WARN(ah, "beacon queue %u didn't start/stop ?\n", ah->bhalq);
1917 /* NB: hw still stops DMA, so proceed */ 1904 /* NB: hw still stops DMA, so proceed */
1918 } 1905 }
1919 1906
1920 /* refresh the beacon for AP or MESH mode */ 1907 /* refresh the beacon for AP or MESH mode */
1921 if (sc->opmode == NL80211_IFTYPE_AP || 1908 if (ah->opmode == NL80211_IFTYPE_AP ||
1922 sc->opmode == NL80211_IFTYPE_MESH_POINT) 1909 ah->opmode == NL80211_IFTYPE_MESH_POINT)
1923 ath5k_beacon_update(sc->hw, vif); 1910 ath5k_beacon_update(ah->hw, vif);
1924 1911
1925 trace_ath5k_tx(sc, bf->skb, &sc->txqs[sc->bhalq]); 1912 trace_ath5k_tx(ah, bf->skb, &ah->txqs[ah->bhalq]);
1926 1913
1927 ath5k_hw_set_txdp(ah, sc->bhalq, bf->daddr); 1914 ath5k_hw_set_txdp(ah, ah->bhalq, bf->daddr);
1928 ath5k_hw_start_tx_dma(ah, sc->bhalq); 1915 ath5k_hw_start_tx_dma(ah, ah->bhalq);
1929 ATH5K_DBG(sc, ATH5K_DEBUG_BEACON, "TXDP[%u] = %llx (%p)\n", 1916 ATH5K_DBG(ah, ATH5K_DEBUG_BEACON, "TXDP[%u] = %llx (%p)\n",
1930 sc->bhalq, (unsigned long long)bf->daddr, bf->desc); 1917 ah->bhalq, (unsigned long long)bf->daddr, bf->desc);
1931 1918
1932 skb = ieee80211_get_buffered_bc(sc->hw, vif); 1919 skb = ieee80211_get_buffered_bc(ah->hw, vif);
1933 while (skb) { 1920 while (skb) {
1934 ath5k_tx_queue(sc->hw, skb, sc->cabq); 1921 ath5k_tx_queue(ah->hw, skb, ah->cabq);
1935 1922
1936 if (sc->cabq->txq_len >= sc->cabq->txq_max) 1923 if (ah->cabq->txq_len >= ah->cabq->txq_max)
1937 break; 1924 break;
1938 1925
1939 skb = ieee80211_get_buffered_bc(sc->hw, vif); 1926 skb = ieee80211_get_buffered_bc(ah->hw, vif);
1940 } 1927 }
1941 1928
1942 sc->bsent++; 1929 ah->bsent++;
1943} 1930}
1944 1931
1945/** 1932/**
1946 * ath5k_beacon_update_timers - update beacon timers 1933 * ath5k_beacon_update_timers - update beacon timers
1947 * 1934 *
1948 * @sc: struct ath5k_softc pointer we are operating on 1935 * @ah: struct ath5k_hw pointer we are operating on
1949 * @bc_tsf: the timestamp of the beacon. 0 to reset the TSF. -1 to perform a 1936 * @bc_tsf: the timestamp of the beacon. 0 to reset the TSF. -1 to perform a
1950 * beacon timer update based on the current HW TSF. 1937 * beacon timer update based on the current HW TSF.
1951 * 1938 *
@@ -1959,17 +1946,16 @@ ath5k_beacon_send(struct ath5k_softc *sc)
1959 * function to have it all together in one place. 1946 * function to have it all together in one place.
1960 */ 1947 */
1961void 1948void
1962ath5k_beacon_update_timers(struct ath5k_softc *sc, u64 bc_tsf) 1949ath5k_beacon_update_timers(struct ath5k_hw *ah, u64 bc_tsf)
1963{ 1950{
1964 struct ath5k_hw *ah = sc->ah;
1965 u32 nexttbtt, intval, hw_tu, bc_tu; 1951 u32 nexttbtt, intval, hw_tu, bc_tu;
1966 u64 hw_tsf; 1952 u64 hw_tsf;
1967 1953
1968 intval = sc->bintval & AR5K_BEACON_PERIOD; 1954 intval = ah->bintval & AR5K_BEACON_PERIOD;
1969 if (sc->opmode == NL80211_IFTYPE_AP && sc->num_ap_vifs > 1) { 1955 if (ah->opmode == NL80211_IFTYPE_AP && ah->num_ap_vifs > 1) {
1970 intval /= ATH_BCBUF; /* staggered multi-bss beacons */ 1956 intval /= ATH_BCBUF; /* staggered multi-bss beacons */
1971 if (intval < 15) 1957 if (intval < 15)
1972 ATH5K_WARN(sc, "intval %u is too low, min 15\n", 1958 ATH5K_WARN(ah, "intval %u is too low, min 15\n",
1973 intval); 1959 intval);
1974 } 1960 }
1975 if (WARN_ON(!intval)) 1961 if (WARN_ON(!intval))
@@ -2008,7 +1994,7 @@ ath5k_beacon_update_timers(struct ath5k_softc *sc, u64 bc_tsf)
2008 * automatically update the TSF and then we need to reconfigure 1994 * automatically update the TSF and then we need to reconfigure
2009 * the timers. 1995 * the timers.
2010 */ 1996 */
2011 ATH5K_DBG_UNLIMIT(sc, ATH5K_DEBUG_BEACON, 1997 ATH5K_DBG_UNLIMIT(ah, ATH5K_DEBUG_BEACON,
2012 "need to wait for HW TSF sync\n"); 1998 "need to wait for HW TSF sync\n");
2013 return; 1999 return;
2014 } else { 2000 } else {
@@ -2023,7 +2009,7 @@ ath5k_beacon_update_timers(struct ath5k_softc *sc, u64 bc_tsf)
2023 } 2009 }
2024#undef FUDGE 2010#undef FUDGE
2025 2011
2026 sc->nexttbtt = nexttbtt; 2012 ah->nexttbtt = nexttbtt;
2027 2013
2028 intval |= AR5K_BEACON_ENA; 2014 intval |= AR5K_BEACON_ENA;
2029 ath5k_hw_init_beacon(ah, nexttbtt, intval); 2015 ath5k_hw_init_beacon(ah, nexttbtt, intval);
@@ -2033,20 +2019,20 @@ ath5k_beacon_update_timers(struct ath5k_softc *sc, u64 bc_tsf)
2033 * of this function 2019 * of this function
2034 */ 2020 */
2035 if (bc_tsf == -1) 2021 if (bc_tsf == -1)
2036 ATH5K_DBG_UNLIMIT(sc, ATH5K_DEBUG_BEACON, 2022 ATH5K_DBG_UNLIMIT(ah, ATH5K_DEBUG_BEACON,
2037 "reconfigured timers based on HW TSF\n"); 2023 "reconfigured timers based on HW TSF\n");
2038 else if (bc_tsf == 0) 2024 else if (bc_tsf == 0)
2039 ATH5K_DBG_UNLIMIT(sc, ATH5K_DEBUG_BEACON, 2025 ATH5K_DBG_UNLIMIT(ah, ATH5K_DEBUG_BEACON,
2040 "reset HW TSF and timers\n"); 2026 "reset HW TSF and timers\n");
2041 else 2027 else
2042 ATH5K_DBG_UNLIMIT(sc, ATH5K_DEBUG_BEACON, 2028 ATH5K_DBG_UNLIMIT(ah, ATH5K_DEBUG_BEACON,
2043 "updated timers based on beacon TSF\n"); 2029 "updated timers based on beacon TSF\n");
2044 2030
2045 ATH5K_DBG_UNLIMIT(sc, ATH5K_DEBUG_BEACON, 2031 ATH5K_DBG_UNLIMIT(ah, ATH5K_DEBUG_BEACON,
2046 "bc_tsf %llx hw_tsf %llx bc_tu %u hw_tu %u nexttbtt %u\n", 2032 "bc_tsf %llx hw_tsf %llx bc_tu %u hw_tu %u nexttbtt %u\n",
2047 (unsigned long long) bc_tsf, 2033 (unsigned long long) bc_tsf,
2048 (unsigned long long) hw_tsf, bc_tu, hw_tu, nexttbtt); 2034 (unsigned long long) hw_tsf, bc_tu, hw_tu, nexttbtt);
2049 ATH5K_DBG_UNLIMIT(sc, ATH5K_DEBUG_BEACON, "intval %u %s %s\n", 2035 ATH5K_DBG_UNLIMIT(ah, ATH5K_DEBUG_BEACON, "intval %u %s %s\n",
2050 intval & AR5K_BEACON_PERIOD, 2036 intval & AR5K_BEACON_PERIOD,
2051 intval & AR5K_BEACON_ENA ? "AR5K_BEACON_ENA" : "", 2037 intval & AR5K_BEACON_ENA ? "AR5K_BEACON_ENA" : "",
2052 intval & AR5K_BEACON_RESET_TSF ? "AR5K_BEACON_RESET_TSF" : ""); 2038 intval & AR5K_BEACON_RESET_TSF ? "AR5K_BEACON_RESET_TSF" : "");
@@ -2055,22 +2041,21 @@ ath5k_beacon_update_timers(struct ath5k_softc *sc, u64 bc_tsf)
2055/** 2041/**
2056 * ath5k_beacon_config - Configure the beacon queues and interrupts 2042 * ath5k_beacon_config - Configure the beacon queues and interrupts
2057 * 2043 *
2058 * @sc: struct ath5k_softc pointer we are operating on 2044 * @ah: struct ath5k_hw pointer we are operating on
2059 * 2045 *
2060 * In IBSS mode we use a self-linked tx descriptor if possible. We enable SWBA 2046 * In IBSS mode we use a self-linked tx descriptor if possible. We enable SWBA
2061 * interrupts to detect TSF updates only. 2047 * interrupts to detect TSF updates only.
2062 */ 2048 */
2063void 2049void
2064ath5k_beacon_config(struct ath5k_softc *sc) 2050ath5k_beacon_config(struct ath5k_hw *ah)
2065{ 2051{
2066 struct ath5k_hw *ah = sc->ah;
2067 unsigned long flags; 2052 unsigned long flags;
2068 2053
2069 spin_lock_irqsave(&sc->block, flags); 2054 spin_lock_irqsave(&ah->block, flags);
2070 sc->bmisscount = 0; 2055 ah->bmisscount = 0;
2071 sc->imask &= ~(AR5K_INT_BMISS | AR5K_INT_SWBA); 2056 ah->imask &= ~(AR5K_INT_BMISS | AR5K_INT_SWBA);
2072 2057
2073 if (sc->enable_beacon) { 2058 if (ah->enable_beacon) {
2074 /* 2059 /*
2075 * In IBSS mode we use a self-linked tx descriptor and let the 2060 * In IBSS mode we use a self-linked tx descriptor and let the
2076 * hardware send the beacons automatically. We have to load it 2061 * hardware send the beacons automatically. We have to load it
@@ -2078,27 +2063,27 @@ ath5k_beacon_config(struct ath5k_softc *sc)
2078 * We use the SWBA interrupt only to keep track of the beacon 2063 * We use the SWBA interrupt only to keep track of the beacon
2079 * timers in order to detect automatic TSF updates. 2064 * timers in order to detect automatic TSF updates.
2080 */ 2065 */
2081 ath5k_beaconq_config(sc); 2066 ath5k_beaconq_config(ah);
2082 2067
2083 sc->imask |= AR5K_INT_SWBA; 2068 ah->imask |= AR5K_INT_SWBA;
2084 2069
2085 if (sc->opmode == NL80211_IFTYPE_ADHOC) { 2070 if (ah->opmode == NL80211_IFTYPE_ADHOC) {
2086 if (ath5k_hw_hasveol(ah)) 2071 if (ath5k_hw_hasveol(ah))
2087 ath5k_beacon_send(sc); 2072 ath5k_beacon_send(ah);
2088 } else 2073 } else
2089 ath5k_beacon_update_timers(sc, -1); 2074 ath5k_beacon_update_timers(ah, -1);
2090 } else { 2075 } else {
2091 ath5k_hw_stop_beacon_queue(sc->ah, sc->bhalq); 2076 ath5k_hw_stop_beacon_queue(ah, ah->bhalq);
2092 } 2077 }
2093 2078
2094 ath5k_hw_set_imr(ah, sc->imask); 2079 ath5k_hw_set_imr(ah, ah->imask);
2095 mmiowb(); 2080 mmiowb();
2096 spin_unlock_irqrestore(&sc->block, flags); 2081 spin_unlock_irqrestore(&ah->block, flags);
2097} 2082}
2098 2083
2099static void ath5k_tasklet_beacon(unsigned long data) 2084static void ath5k_tasklet_beacon(unsigned long data)
2100{ 2085{
2101 struct ath5k_softc *sc = (struct ath5k_softc *) data; 2086 struct ath5k_hw *ah = (struct ath5k_hw *) data;
2102 2087
2103 /* 2088 /*
2104 * Software beacon alert--time to send a beacon. 2089 * Software beacon alert--time to send a beacon.
@@ -2108,20 +2093,20 @@ static void ath5k_tasklet_beacon(unsigned long data)
2108 * transmission time) in order to detect whether 2093 * transmission time) in order to detect whether
2109 * automatic TSF updates happened. 2094 * automatic TSF updates happened.
2110 */ 2095 */
2111 if (sc->opmode == NL80211_IFTYPE_ADHOC) { 2096 if (ah->opmode == NL80211_IFTYPE_ADHOC) {
2112 /* XXX: only if VEOL supported */ 2097 /* XXX: only if VEOL supported */
2113 u64 tsf = ath5k_hw_get_tsf64(sc->ah); 2098 u64 tsf = ath5k_hw_get_tsf64(ah);
2114 sc->nexttbtt += sc->bintval; 2099 ah->nexttbtt += ah->bintval;
2115 ATH5K_DBG(sc, ATH5K_DEBUG_BEACON, 2100 ATH5K_DBG(ah, ATH5K_DEBUG_BEACON,
2116 "SWBA nexttbtt: %x hw_tu: %x " 2101 "SWBA nexttbtt: %x hw_tu: %x "
2117 "TSF: %llx\n", 2102 "TSF: %llx\n",
2118 sc->nexttbtt, 2103 ah->nexttbtt,
2119 TSF_TO_TU(tsf), 2104 TSF_TO_TU(tsf),
2120 (unsigned long long) tsf); 2105 (unsigned long long) tsf);
2121 } else { 2106 } else {
2122 spin_lock(&sc->block); 2107 spin_lock(&ah->block);
2123 ath5k_beacon_send(sc); 2108 ath5k_beacon_send(ah);
2124 spin_unlock(&sc->block); 2109 spin_unlock(&ah->block);
2125 } 2110 }
2126} 2111}
2127 2112
@@ -2138,12 +2123,12 @@ ath5k_intr_calibration_poll(struct ath5k_hw *ah)
2138 /* run ANI only when full calibration is not active */ 2123 /* run ANI only when full calibration is not active */
2139 ah->ah_cal_next_ani = jiffies + 2124 ah->ah_cal_next_ani = jiffies +
2140 msecs_to_jiffies(ATH5K_TUNE_CALIBRATION_INTERVAL_ANI); 2125 msecs_to_jiffies(ATH5K_TUNE_CALIBRATION_INTERVAL_ANI);
2141 tasklet_schedule(&ah->ah_sc->ani_tasklet); 2126 tasklet_schedule(&ah->ani_tasklet);
2142 2127
2143 } else if (time_is_before_eq_jiffies(ah->ah_cal_next_full)) { 2128 } else if (time_is_before_eq_jiffies(ah->ah_cal_next_full)) {
2144 ah->ah_cal_next_full = jiffies + 2129 ah->ah_cal_next_full = jiffies +
2145 msecs_to_jiffies(ATH5K_TUNE_CALIBRATION_INTERVAL_FULL); 2130 msecs_to_jiffies(ATH5K_TUNE_CALIBRATION_INTERVAL_FULL);
2146 tasklet_schedule(&ah->ah_sc->calib); 2131 tasklet_schedule(&ah->calib);
2147 } 2132 }
2148 /* we could use SWI to generate enough interrupts to meet our 2133 /* we could use SWI to generate enough interrupts to meet our
2149 * calibration interval requirements, if necessary: 2134 * calibration interval requirements, if necessary:
@@ -2151,44 +2136,43 @@ ath5k_intr_calibration_poll(struct ath5k_hw *ah)
2151} 2136}
2152 2137
2153static void 2138static void
2154ath5k_schedule_rx(struct ath5k_softc *sc) 2139ath5k_schedule_rx(struct ath5k_hw *ah)
2155{ 2140{
2156 sc->rx_pending = true; 2141 ah->rx_pending = true;
2157 tasklet_schedule(&sc->rxtq); 2142 tasklet_schedule(&ah->rxtq);
2158} 2143}
2159 2144
2160static void 2145static void
2161ath5k_schedule_tx(struct ath5k_softc *sc) 2146ath5k_schedule_tx(struct ath5k_hw *ah)
2162{ 2147{
2163 sc->tx_pending = true; 2148 ah->tx_pending = true;
2164 tasklet_schedule(&sc->txtq); 2149 tasklet_schedule(&ah->txtq);
2165} 2150}
2166 2151
2167static irqreturn_t 2152static irqreturn_t
2168ath5k_intr(int irq, void *dev_id) 2153ath5k_intr(int irq, void *dev_id)
2169{ 2154{
2170 struct ath5k_softc *sc = dev_id; 2155 struct ath5k_hw *ah = dev_id;
2171 struct ath5k_hw *ah = sc->ah;
2172 enum ath5k_int status; 2156 enum ath5k_int status;
2173 unsigned int counter = 1000; 2157 unsigned int counter = 1000;
2174 2158
2175 if (unlikely(test_bit(ATH_STAT_INVALID, sc->status) || 2159 if (unlikely(test_bit(ATH_STAT_INVALID, ah->status) ||
2176 ((ath5k_get_bus_type(ah) != ATH_AHB) && 2160 ((ath5k_get_bus_type(ah) != ATH_AHB) &&
2177 !ath5k_hw_is_intr_pending(ah)))) 2161 !ath5k_hw_is_intr_pending(ah))))
2178 return IRQ_NONE; 2162 return IRQ_NONE;
2179 2163
2180 do { 2164 do {
2181 ath5k_hw_get_isr(ah, &status); /* NB: clears IRQ too */ 2165 ath5k_hw_get_isr(ah, &status); /* NB: clears IRQ too */
2182 ATH5K_DBG(sc, ATH5K_DEBUG_INTR, "status 0x%x/0x%x\n", 2166 ATH5K_DBG(ah, ATH5K_DEBUG_INTR, "status 0x%x/0x%x\n",
2183 status, sc->imask); 2167 status, ah->imask);
2184 if (unlikely(status & AR5K_INT_FATAL)) { 2168 if (unlikely(status & AR5K_INT_FATAL)) {
2185 /* 2169 /*
2186 * Fatal errors are unrecoverable. 2170 * Fatal errors are unrecoverable.
2187 * Typically these are caused by DMA errors. 2171 * Typically these are caused by DMA errors.
2188 */ 2172 */
2189 ATH5K_DBG(sc, ATH5K_DEBUG_RESET, 2173 ATH5K_DBG(ah, ATH5K_DEBUG_RESET,
2190 "fatal int, resetting\n"); 2174 "fatal int, resetting\n");
2191 ieee80211_queue_work(sc->hw, &sc->reset_work); 2175 ieee80211_queue_work(ah->hw, &ah->reset_work);
2192 } else if (unlikely(status & AR5K_INT_RXORN)) { 2176 } else if (unlikely(status & AR5K_INT_RXORN)) {
2193 /* 2177 /*
2194 * Receive buffers are full. Either the bus is busy or 2178 * Receive buffers are full. Either the bus is busy or
@@ -2199,16 +2183,16 @@ ath5k_intr(int irq, void *dev_id)
2199 * We don't know exactly which versions need a reset - 2183 * We don't know exactly which versions need a reset -
2200 * this guess is copied from the HAL. 2184 * this guess is copied from the HAL.
2201 */ 2185 */
2202 sc->stats.rxorn_intr++; 2186 ah->stats.rxorn_intr++;
2203 if (ah->ah_mac_srev < AR5K_SREV_AR5212) { 2187 if (ah->ah_mac_srev < AR5K_SREV_AR5212) {
2204 ATH5K_DBG(sc, ATH5K_DEBUG_RESET, 2188 ATH5K_DBG(ah, ATH5K_DEBUG_RESET,
2205 "rx overrun, resetting\n"); 2189 "rx overrun, resetting\n");
2206 ieee80211_queue_work(sc->hw, &sc->reset_work); 2190 ieee80211_queue_work(ah->hw, &ah->reset_work);
2207 } else 2191 } else
2208 ath5k_schedule_rx(sc); 2192 ath5k_schedule_rx(ah);
2209 } else { 2193 } else {
2210 if (status & AR5K_INT_SWBA) 2194 if (status & AR5K_INT_SWBA)
2211 tasklet_hi_schedule(&sc->beacontq); 2195 tasklet_hi_schedule(&ah->beacontq);
2212 2196
2213 if (status & AR5K_INT_RXEOL) { 2197 if (status & AR5K_INT_RXEOL) {
2214 /* 2198 /*
@@ -2216,27 +2200,27 @@ ath5k_intr(int irq, void *dev_id)
2216 * RXE bit is written, but it doesn't work at 2200 * RXE bit is written, but it doesn't work at
2217 * least on older hardware revs. 2201 * least on older hardware revs.
2218 */ 2202 */
2219 sc->stats.rxeol_intr++; 2203 ah->stats.rxeol_intr++;
2220 } 2204 }
2221 if (status & AR5K_INT_TXURN) { 2205 if (status & AR5K_INT_TXURN) {
2222 /* bump tx trigger level */ 2206 /* bump tx trigger level */
2223 ath5k_hw_update_tx_triglevel(ah, true); 2207 ath5k_hw_update_tx_triglevel(ah, true);
2224 } 2208 }
2225 if (status & (AR5K_INT_RXOK | AR5K_INT_RXERR)) 2209 if (status & (AR5K_INT_RXOK | AR5K_INT_RXERR))
2226 ath5k_schedule_rx(sc); 2210 ath5k_schedule_rx(ah);
2227 if (status & (AR5K_INT_TXOK | AR5K_INT_TXDESC 2211 if (status & (AR5K_INT_TXOK | AR5K_INT_TXDESC
2228 | AR5K_INT_TXERR | AR5K_INT_TXEOL)) 2212 | AR5K_INT_TXERR | AR5K_INT_TXEOL))
2229 ath5k_schedule_tx(sc); 2213 ath5k_schedule_tx(ah);
2230 if (status & AR5K_INT_BMISS) { 2214 if (status & AR5K_INT_BMISS) {
2231 /* TODO */ 2215 /* TODO */
2232 } 2216 }
2233 if (status & AR5K_INT_MIB) { 2217 if (status & AR5K_INT_MIB) {
2234 sc->stats.mib_intr++; 2218 ah->stats.mib_intr++;
2235 ath5k_hw_update_mib_counters(ah); 2219 ath5k_hw_update_mib_counters(ah);
2236 ath5k_ani_mib_intr(ah); 2220 ath5k_ani_mib_intr(ah);
2237 } 2221 }
2238 if (status & AR5K_INT_GPIO) 2222 if (status & AR5K_INT_GPIO)
2239 tasklet_schedule(&sc->rf_kill.toggleq); 2223 tasklet_schedule(&ah->rf_kill.toggleq);
2240 2224
2241 } 2225 }
2242 2226
@@ -2245,11 +2229,11 @@ ath5k_intr(int irq, void *dev_id)
2245 2229
2246 } while (ath5k_hw_is_intr_pending(ah) && --counter > 0); 2230 } while (ath5k_hw_is_intr_pending(ah) && --counter > 0);
2247 2231
2248 if (sc->rx_pending || sc->tx_pending) 2232 if (ah->rx_pending || ah->tx_pending)
2249 ath5k_set_current_imask(sc); 2233 ath5k_set_current_imask(ah);
2250 2234
2251 if (unlikely(!counter)) 2235 if (unlikely(!counter))
2252 ATH5K_WARN(sc, "too many interrupts, giving up for now\n"); 2236 ATH5K_WARN(ah, "too many interrupts, giving up for now\n");
2253 2237
2254 ath5k_intr_calibration_poll(ah); 2238 ath5k_intr_calibration_poll(ah);
2255 2239
@@ -2263,28 +2247,27 @@ ath5k_intr(int irq, void *dev_id)
2263static void 2247static void
2264ath5k_tasklet_calibrate(unsigned long data) 2248ath5k_tasklet_calibrate(unsigned long data)
2265{ 2249{
2266 struct ath5k_softc *sc = (void *)data; 2250 struct ath5k_hw *ah = (void *)data;
2267 struct ath5k_hw *ah = sc->ah;
2268 2251
2269 /* Only full calibration for now */ 2252 /* Only full calibration for now */
2270 ah->ah_cal_mask |= AR5K_CALIBRATION_FULL; 2253 ah->ah_cal_mask |= AR5K_CALIBRATION_FULL;
2271 2254
2272 ATH5K_DBG(sc, ATH5K_DEBUG_CALIBRATE, "channel %u/%x\n", 2255 ATH5K_DBG(ah, ATH5K_DEBUG_CALIBRATE, "channel %u/%x\n",
2273 ieee80211_frequency_to_channel(sc->curchan->center_freq), 2256 ieee80211_frequency_to_channel(ah->curchan->center_freq),
2274 sc->curchan->hw_value); 2257 ah->curchan->hw_value);
2275 2258
2276 if (ath5k_hw_gainf_calibrate(ah) == AR5K_RFGAIN_NEED_CHANGE) { 2259 if (ath5k_hw_gainf_calibrate(ah) == AR5K_RFGAIN_NEED_CHANGE) {
2277 /* 2260 /*
2278 * Rfgain is out of bounds, reset the chip 2261 * Rfgain is out of bounds, reset the chip
2279 * to load new gain values. 2262 * to load new gain values.
2280 */ 2263 */
2281 ATH5K_DBG(sc, ATH5K_DEBUG_RESET, "calibration, resetting\n"); 2264 ATH5K_DBG(ah, ATH5K_DEBUG_RESET, "calibration, resetting\n");
2282 ieee80211_queue_work(sc->hw, &sc->reset_work); 2265 ieee80211_queue_work(ah->hw, &ah->reset_work);
2283 } 2266 }
2284 if (ath5k_hw_phy_calibrate(ah, sc->curchan)) 2267 if (ath5k_hw_phy_calibrate(ah, ah->curchan))
2285 ATH5K_ERR(sc, "calibration of channel %u failed\n", 2268 ATH5K_ERR(ah, "calibration of channel %u failed\n",
2286 ieee80211_frequency_to_channel( 2269 ieee80211_frequency_to_channel(
2287 sc->curchan->center_freq)); 2270 ah->curchan->center_freq));
2288 2271
2289 /* Noise floor calibration interrupts rx/tx path while I/Q calibration 2272 /* Noise floor calibration interrupts rx/tx path while I/Q calibration
2290 * doesn't. 2273 * doesn't.
@@ -2303,8 +2286,7 @@ ath5k_tasklet_calibrate(unsigned long data)
2303static void 2286static void
2304ath5k_tasklet_ani(unsigned long data) 2287ath5k_tasklet_ani(unsigned long data)
2305{ 2288{
2306 struct ath5k_softc *sc = (void *)data; 2289 struct ath5k_hw *ah = (void *)data;
2307 struct ath5k_hw *ah = sc->ah;
2308 2290
2309 ah->ah_cal_mask |= AR5K_CALIBRATION_ANI; 2291 ah->ah_cal_mask |= AR5K_CALIBRATION_ANI;
2310 ath5k_ani_calibration(ah); 2292 ath5k_ani_calibration(ah);
@@ -2315,21 +2297,21 @@ ath5k_tasklet_ani(unsigned long data)
2315static void 2297static void
2316ath5k_tx_complete_poll_work(struct work_struct *work) 2298ath5k_tx_complete_poll_work(struct work_struct *work)
2317{ 2299{
2318 struct ath5k_softc *sc = container_of(work, struct ath5k_softc, 2300 struct ath5k_hw *ah = container_of(work, struct ath5k_hw,
2319 tx_complete_work.work); 2301 tx_complete_work.work);
2320 struct ath5k_txq *txq; 2302 struct ath5k_txq *txq;
2321 int i; 2303 int i;
2322 bool needreset = false; 2304 bool needreset = false;
2323 2305
2324 mutex_lock(&sc->lock); 2306 mutex_lock(&ah->lock);
2325 2307
2326 for (i = 0; i < ARRAY_SIZE(sc->txqs); i++) { 2308 for (i = 0; i < ARRAY_SIZE(ah->txqs); i++) {
2327 if (sc->txqs[i].setup) { 2309 if (ah->txqs[i].setup) {
2328 txq = &sc->txqs[i]; 2310 txq = &ah->txqs[i];
2329 spin_lock_bh(&txq->lock); 2311 spin_lock_bh(&txq->lock);
2330 if (txq->txq_len > 1) { 2312 if (txq->txq_len > 1) {
2331 if (txq->txq_poll_mark) { 2313 if (txq->txq_poll_mark) {
2332 ATH5K_DBG(sc, ATH5K_DEBUG_XMIT, 2314 ATH5K_DBG(ah, ATH5K_DEBUG_XMIT,
2333 "TX queue stuck %d\n", 2315 "TX queue stuck %d\n",
2334 txq->qnum); 2316 txq->qnum);
2335 needreset = true; 2317 needreset = true;
@@ -2345,14 +2327,14 @@ ath5k_tx_complete_poll_work(struct work_struct *work)
2345 } 2327 }
2346 2328
2347 if (needreset) { 2329 if (needreset) {
2348 ATH5K_DBG(sc, ATH5K_DEBUG_RESET, 2330 ATH5K_DBG(ah, ATH5K_DEBUG_RESET,
2349 "TX queues stuck, resetting\n"); 2331 "TX queues stuck, resetting\n");
2350 ath5k_reset(sc, NULL, true); 2332 ath5k_reset(ah, NULL, true);
2351 } 2333 }
2352 2334
2353 mutex_unlock(&sc->lock); 2335 mutex_unlock(&ah->lock);
2354 2336
2355 ieee80211_queue_delayed_work(sc->hw, &sc->tx_complete_work, 2337 ieee80211_queue_delayed_work(ah->hw, &ah->tx_complete_work,
2356 msecs_to_jiffies(ATH5K_TX_COMPLETE_POLL_INT)); 2338 msecs_to_jiffies(ATH5K_TX_COMPLETE_POLL_INT));
2357} 2339}
2358 2340
@@ -2362,15 +2344,15 @@ ath5k_tx_complete_poll_work(struct work_struct *work)
2362\*************************/ 2344\*************************/
2363 2345
2364int __devinit 2346int __devinit
2365ath5k_init_softc(struct ath5k_softc *sc, const struct ath_bus_ops *bus_ops) 2347ath5k_init_softc(struct ath5k_hw *ah, const struct ath_bus_ops *bus_ops)
2366{ 2348{
2367 struct ieee80211_hw *hw = sc->hw; 2349 struct ieee80211_hw *hw = ah->hw;
2368 struct ath_common *common; 2350 struct ath_common *common;
2369 int ret; 2351 int ret;
2370 int csz; 2352 int csz;
2371 2353
2372 /* Initialize driver private data */ 2354 /* Initialize driver private data */
2373 SET_IEEE80211_DEV(hw, sc->dev); 2355 SET_IEEE80211_DEV(hw, ah->dev);
2374 hw->flags = IEEE80211_HW_RX_INCLUDES_FCS | 2356 hw->flags = IEEE80211_HW_RX_INCLUDES_FCS |
2375 IEEE80211_HW_HOST_BROADCAST_PS_BUFFERING | 2357 IEEE80211_HW_HOST_BROADCAST_PS_BUFFERING |
2376 IEEE80211_HW_SIGNAL_DBM | 2358 IEEE80211_HW_SIGNAL_DBM |
@@ -2393,39 +2375,29 @@ ath5k_init_softc(struct ath5k_softc *sc, const struct ath_bus_ops *bus_ops)
2393 * Mark the device as detached to avoid processing 2375 * Mark the device as detached to avoid processing
2394 * interrupts until setup is complete. 2376 * interrupts until setup is complete.
2395 */ 2377 */
2396 __set_bit(ATH_STAT_INVALID, sc->status); 2378 __set_bit(ATH_STAT_INVALID, ah->status);
2397 2379
2398 sc->opmode = NL80211_IFTYPE_STATION; 2380 ah->opmode = NL80211_IFTYPE_STATION;
2399 sc->bintval = 1000; 2381 ah->bintval = 1000;
2400 mutex_init(&sc->lock); 2382 mutex_init(&ah->lock);
2401 spin_lock_init(&sc->rxbuflock); 2383 spin_lock_init(&ah->rxbuflock);
2402 spin_lock_init(&sc->txbuflock); 2384 spin_lock_init(&ah->txbuflock);
2403 spin_lock_init(&sc->block); 2385 spin_lock_init(&ah->block);
2404 spin_lock_init(&sc->irqlock); 2386 spin_lock_init(&ah->irqlock);
2405 2387
2406 /* Setup interrupt handler */ 2388 /* Setup interrupt handler */
2407 ret = request_irq(sc->irq, ath5k_intr, IRQF_SHARED, "ath", sc); 2389 ret = request_irq(ah->irq, ath5k_intr, IRQF_SHARED, "ath", ah);
2408 if (ret) { 2390 if (ret) {
2409 ATH5K_ERR(sc, "request_irq failed\n"); 2391 ATH5K_ERR(ah, "request_irq failed\n");
2410 goto err; 2392 goto err;
2411 } 2393 }
2412 2394
2413 /* If we passed the test, malloc an ath5k_hw struct */ 2395 common = ath5k_hw_common(ah);
2414 sc->ah = kzalloc(sizeof(struct ath5k_hw), GFP_KERNEL);
2415 if (!sc->ah) {
2416 ret = -ENOMEM;
2417 ATH5K_ERR(sc, "out of memory\n");
2418 goto err_irq;
2419 }
2420
2421 sc->ah->ah_sc = sc;
2422 sc->ah->ah_iobase = sc->iobase;
2423 common = ath5k_hw_common(sc->ah);
2424 common->ops = &ath5k_common_ops; 2396 common->ops = &ath5k_common_ops;
2425 common->bus_ops = bus_ops; 2397 common->bus_ops = bus_ops;
2426 common->ah = sc->ah; 2398 common->ah = ah;
2427 common->hw = hw; 2399 common->hw = hw;
2428 common->priv = sc; 2400 common->priv = ah;
2429 common->clockrate = 40; 2401 common->clockrate = 40;
2430 2402
2431 /* 2403 /*
@@ -2438,12 +2410,12 @@ ath5k_init_softc(struct ath5k_softc *sc, const struct ath_bus_ops *bus_ops)
2438 spin_lock_init(&common->cc_lock); 2410 spin_lock_init(&common->cc_lock);
2439 2411
2440 /* Initialize device */ 2412 /* Initialize device */
2441 ret = ath5k_hw_init(sc); 2413 ret = ath5k_hw_init(ah);
2442 if (ret) 2414 if (ret)
2443 goto err_free_ah; 2415 goto err_irq;
2444 2416
2445 /* set up multi-rate retry capabilities */ 2417 /* set up multi-rate retry capabilities */
2446 if (sc->ah->ah_version == AR5K_AR5212) { 2418 if (ah->ah_version == AR5K_AR5212) {
2447 hw->max_rates = 4; 2419 hw->max_rates = 4;
2448 hw->max_rate_tries = max(AR5K_INIT_RETRY_SHORT, 2420 hw->max_rate_tries = max(AR5K_INIT_RETRY_SHORT,
2449 AR5K_INIT_RETRY_LONG); 2421 AR5K_INIT_RETRY_LONG);
@@ -2456,77 +2428,74 @@ ath5k_init_softc(struct ath5k_softc *sc, const struct ath_bus_ops *bus_ops)
2456 if (ret) 2428 if (ret)
2457 goto err_ah; 2429 goto err_ah;
2458 2430
2459 ATH5K_INFO(sc, "Atheros AR%s chip found (MAC: 0x%x, PHY: 0x%x)\n", 2431 ATH5K_INFO(ah, "Atheros AR%s chip found (MAC: 0x%x, PHY: 0x%x)\n",
2460 ath5k_chip_name(AR5K_VERSION_MAC, sc->ah->ah_mac_srev), 2432 ath5k_chip_name(AR5K_VERSION_MAC, ah->ah_mac_srev),
2461 sc->ah->ah_mac_srev, 2433 ah->ah_mac_srev,
2462 sc->ah->ah_phy_revision); 2434 ah->ah_phy_revision);
2463 2435
2464 if (!sc->ah->ah_single_chip) { 2436 if (!ah->ah_single_chip) {
2465 /* Single chip radio (!RF5111) */ 2437 /* Single chip radio (!RF5111) */
2466 if (sc->ah->ah_radio_5ghz_revision && 2438 if (ah->ah_radio_5ghz_revision &&
2467 !sc->ah->ah_radio_2ghz_revision) { 2439 !ah->ah_radio_2ghz_revision) {
2468 /* No 5GHz support -> report 2GHz radio */ 2440 /* No 5GHz support -> report 2GHz radio */
2469 if (!test_bit(AR5K_MODE_11A, 2441 if (!test_bit(AR5K_MODE_11A,
2470 sc->ah->ah_capabilities.cap_mode)) { 2442 ah->ah_capabilities.cap_mode)) {
2471 ATH5K_INFO(sc, "RF%s 2GHz radio found (0x%x)\n", 2443 ATH5K_INFO(ah, "RF%s 2GHz radio found (0x%x)\n",
2472 ath5k_chip_name(AR5K_VERSION_RAD, 2444 ath5k_chip_name(AR5K_VERSION_RAD,
2473 sc->ah->ah_radio_5ghz_revision), 2445 ah->ah_radio_5ghz_revision),
2474 sc->ah->ah_radio_5ghz_revision); 2446 ah->ah_radio_5ghz_revision);
2475 /* No 2GHz support (5110 and some 2447 /* No 2GHz support (5110 and some
2476 * 5GHz only cards) -> report 5GHz radio */ 2448 * 5GHz only cards) -> report 5GHz radio */
2477 } else if (!test_bit(AR5K_MODE_11B, 2449 } else if (!test_bit(AR5K_MODE_11B,
2478 sc->ah->ah_capabilities.cap_mode)) { 2450 ah->ah_capabilities.cap_mode)) {
2479 ATH5K_INFO(sc, "RF%s 5GHz radio found (0x%x)\n", 2451 ATH5K_INFO(ah, "RF%s 5GHz radio found (0x%x)\n",
2480 ath5k_chip_name(AR5K_VERSION_RAD, 2452 ath5k_chip_name(AR5K_VERSION_RAD,
2481 sc->ah->ah_radio_5ghz_revision), 2453 ah->ah_radio_5ghz_revision),
2482 sc->ah->ah_radio_5ghz_revision); 2454 ah->ah_radio_5ghz_revision);
2483 /* Multiband radio */ 2455 /* Multiband radio */
2484 } else { 2456 } else {
2485 ATH5K_INFO(sc, "RF%s multiband radio found" 2457 ATH5K_INFO(ah, "RF%s multiband radio found"
2486 " (0x%x)\n", 2458 " (0x%x)\n",
2487 ath5k_chip_name(AR5K_VERSION_RAD, 2459 ath5k_chip_name(AR5K_VERSION_RAD,
2488 sc->ah->ah_radio_5ghz_revision), 2460 ah->ah_radio_5ghz_revision),
2489 sc->ah->ah_radio_5ghz_revision); 2461 ah->ah_radio_5ghz_revision);
2490 } 2462 }
2491 } 2463 }
2492 /* Multi chip radio (RF5111 - RF2111) -> 2464 /* Multi chip radio (RF5111 - RF2111) ->
2493 * report both 2GHz/5GHz radios */ 2465 * report both 2GHz/5GHz radios */
2494 else if (sc->ah->ah_radio_5ghz_revision && 2466 else if (ah->ah_radio_5ghz_revision &&
2495 sc->ah->ah_radio_2ghz_revision) { 2467 ah->ah_radio_2ghz_revision) {
2496 ATH5K_INFO(sc, "RF%s 5GHz radio found (0x%x)\n", 2468 ATH5K_INFO(ah, "RF%s 5GHz radio found (0x%x)\n",
2497 ath5k_chip_name(AR5K_VERSION_RAD, 2469 ath5k_chip_name(AR5K_VERSION_RAD,
2498 sc->ah->ah_radio_5ghz_revision), 2470 ah->ah_radio_5ghz_revision),
2499 sc->ah->ah_radio_5ghz_revision); 2471 ah->ah_radio_5ghz_revision);
2500 ATH5K_INFO(sc, "RF%s 2GHz radio found (0x%x)\n", 2472 ATH5K_INFO(ah, "RF%s 2GHz radio found (0x%x)\n",
2501 ath5k_chip_name(AR5K_VERSION_RAD, 2473 ath5k_chip_name(AR5K_VERSION_RAD,
2502 sc->ah->ah_radio_2ghz_revision), 2474 ah->ah_radio_2ghz_revision),
2503 sc->ah->ah_radio_2ghz_revision); 2475 ah->ah_radio_2ghz_revision);
2504 } 2476 }
2505 } 2477 }
2506 2478
2507 ath5k_debug_init_device(sc); 2479 ath5k_debug_init_device(ah);
2508 2480
2509 /* ready to process interrupts */ 2481 /* ready to process interrupts */
2510 __clear_bit(ATH_STAT_INVALID, sc->status); 2482 __clear_bit(ATH_STAT_INVALID, ah->status);
2511 2483
2512 return 0; 2484 return 0;
2513err_ah: 2485err_ah:
2514 ath5k_hw_deinit(sc->ah); 2486 ath5k_hw_deinit(ah);
2515err_free_ah:
2516 kfree(sc->ah);
2517err_irq: 2487err_irq:
2518 free_irq(sc->irq, sc); 2488 free_irq(ah->irq, ah);
2519err: 2489err:
2520 return ret; 2490 return ret;
2521} 2491}
2522 2492
2523static int 2493static int
2524ath5k_stop_locked(struct ath5k_softc *sc) 2494ath5k_stop_locked(struct ath5k_hw *ah)
2525{ 2495{
2526 struct ath5k_hw *ah = sc->ah;
2527 2496
2528 ATH5K_DBG(sc, ATH5K_DEBUG_RESET, "invalid %u\n", 2497 ATH5K_DBG(ah, ATH5K_DEBUG_RESET, "invalid %u\n",
2529 test_bit(ATH_STAT_INVALID, sc->status)); 2498 test_bit(ATH_STAT_INVALID, ah->status));
2530 2499
2531 /* 2500 /*
2532 * Shutdown the hardware and driver: 2501 * Shutdown the hardware and driver:
@@ -2543,37 +2512,36 @@ ath5k_stop_locked(struct ath5k_softc *sc)
2543 * Note that some of this work is not possible if the 2512 * Note that some of this work is not possible if the
2544 * hardware is gone (invalid). 2513 * hardware is gone (invalid).
2545 */ 2514 */
2546 ieee80211_stop_queues(sc->hw); 2515 ieee80211_stop_queues(ah->hw);
2547 2516
2548 if (!test_bit(ATH_STAT_INVALID, sc->status)) { 2517 if (!test_bit(ATH_STAT_INVALID, ah->status)) {
2549 ath5k_led_off(sc); 2518 ath5k_led_off(ah);
2550 ath5k_hw_set_imr(ah, 0); 2519 ath5k_hw_set_imr(ah, 0);
2551 synchronize_irq(sc->irq); 2520 synchronize_irq(ah->irq);
2552 ath5k_rx_stop(sc); 2521 ath5k_rx_stop(ah);
2553 ath5k_hw_dma_stop(ah); 2522 ath5k_hw_dma_stop(ah);
2554 ath5k_drain_tx_buffs(sc); 2523 ath5k_drain_tx_buffs(ah);
2555 ath5k_hw_phy_disable(ah); 2524 ath5k_hw_phy_disable(ah);
2556 } 2525 }
2557 2526
2558 return 0; 2527 return 0;
2559} 2528}
2560 2529
2561int 2530int ath5k_start(struct ieee80211_hw *hw)
2562ath5k_init_hw(struct ath5k_softc *sc)
2563{ 2531{
2564 struct ath5k_hw *ah = sc->ah; 2532 struct ath5k_hw *ah = hw->priv;
2565 struct ath_common *common = ath5k_hw_common(ah); 2533 struct ath_common *common = ath5k_hw_common(ah);
2566 int ret, i; 2534 int ret, i;
2567 2535
2568 mutex_lock(&sc->lock); 2536 mutex_lock(&ah->lock);
2569 2537
2570 ATH5K_DBG(sc, ATH5K_DEBUG_RESET, "mode %d\n", sc->opmode); 2538 ATH5K_DBG(ah, ATH5K_DEBUG_RESET, "mode %d\n", ah->opmode);
2571 2539
2572 /* 2540 /*
2573 * Stop anything previously setup. This is safe 2541 * Stop anything previously setup. This is safe
2574 * no matter this is the first time through or not. 2542 * no matter this is the first time through or not.
2575 */ 2543 */
2576 ath5k_stop_locked(sc); 2544 ath5k_stop_locked(ah);
2577 2545
2578 /* 2546 /*
2579 * The basic interface to setting the hardware in a good 2547 * The basic interface to setting the hardware in a good
@@ -2582,12 +2550,12 @@ ath5k_init_hw(struct ath5k_softc *sc)
2582 * be followed by initialization of the appropriate bits 2550 * be followed by initialization of the appropriate bits
2583 * and then setup of the interrupt mask. 2551 * and then setup of the interrupt mask.
2584 */ 2552 */
2585 sc->curchan = sc->hw->conf.channel; 2553 ah->curchan = ah->hw->conf.channel;
2586 sc->imask = AR5K_INT_RXOK | AR5K_INT_RXERR | AR5K_INT_RXEOL | 2554 ah->imask = AR5K_INT_RXOK | AR5K_INT_RXERR | AR5K_INT_RXEOL |
2587 AR5K_INT_RXORN | AR5K_INT_TXDESC | AR5K_INT_TXEOL | 2555 AR5K_INT_RXORN | AR5K_INT_TXDESC | AR5K_INT_TXEOL |
2588 AR5K_INT_FATAL | AR5K_INT_GLOBAL | AR5K_INT_MIB; 2556 AR5K_INT_FATAL | AR5K_INT_GLOBAL | AR5K_INT_MIB;
2589 2557
2590 ret = ath5k_reset(sc, NULL, false); 2558 ret = ath5k_reset(ah, NULL, false);
2591 if (ret) 2559 if (ret)
2592 goto done; 2560 goto done;
2593 2561
@@ -2604,29 +2572,29 @@ ath5k_init_hw(struct ath5k_softc *sc)
2604 * rate */ 2572 * rate */
2605 ah->ah_ack_bitrate_high = true; 2573 ah->ah_ack_bitrate_high = true;
2606 2574
2607 for (i = 0; i < ARRAY_SIZE(sc->bslot); i++) 2575 for (i = 0; i < ARRAY_SIZE(ah->bslot); i++)
2608 sc->bslot[i] = NULL; 2576 ah->bslot[i] = NULL;
2609 2577
2610 ret = 0; 2578 ret = 0;
2611done: 2579done:
2612 mmiowb(); 2580 mmiowb();
2613 mutex_unlock(&sc->lock); 2581 mutex_unlock(&ah->lock);
2614 2582
2615 ieee80211_queue_delayed_work(sc->hw, &sc->tx_complete_work, 2583 ieee80211_queue_delayed_work(ah->hw, &ah->tx_complete_work,
2616 msecs_to_jiffies(ATH5K_TX_COMPLETE_POLL_INT)); 2584 msecs_to_jiffies(ATH5K_TX_COMPLETE_POLL_INT));
2617 2585
2618 return ret; 2586 return ret;
2619} 2587}
2620 2588
2621static void ath5k_stop_tasklets(struct ath5k_softc *sc) 2589static void ath5k_stop_tasklets(struct ath5k_hw *ah)
2622{ 2590{
2623 sc->rx_pending = false; 2591 ah->rx_pending = false;
2624 sc->tx_pending = false; 2592 ah->tx_pending = false;
2625 tasklet_kill(&sc->rxtq); 2593 tasklet_kill(&ah->rxtq);
2626 tasklet_kill(&sc->txtq); 2594 tasklet_kill(&ah->txtq);
2627 tasklet_kill(&sc->calib); 2595 tasklet_kill(&ah->calib);
2628 tasklet_kill(&sc->beacontq); 2596 tasklet_kill(&ah->beacontq);
2629 tasklet_kill(&sc->ani_tasklet); 2597 tasklet_kill(&ah->ani_tasklet);
2630} 2598}
2631 2599
2632/* 2600/*
@@ -2635,14 +2603,14 @@ static void ath5k_stop_tasklets(struct ath5k_softc *sc)
2635 * if another thread does a system call and the thread doing the 2603 * if another thread does a system call and the thread doing the
2636 * stop is preempted). 2604 * stop is preempted).
2637 */ 2605 */
2638int 2606void ath5k_stop(struct ieee80211_hw *hw)
2639ath5k_stop_hw(struct ath5k_softc *sc)
2640{ 2607{
2608 struct ath5k_hw *ah = hw->priv;
2641 int ret; 2609 int ret;
2642 2610
2643 mutex_lock(&sc->lock); 2611 mutex_lock(&ah->lock);
2644 ret = ath5k_stop_locked(sc); 2612 ret = ath5k_stop_locked(ah);
2645 if (ret == 0 && !test_bit(ATH_STAT_INVALID, sc->status)) { 2613 if (ret == 0 && !test_bit(ATH_STAT_INVALID, ah->status)) {
2646 /* 2614 /*
2647 * Don't set the card in full sleep mode! 2615 * Don't set the card in full sleep mode!
2648 * 2616 *
@@ -2663,69 +2631,66 @@ ath5k_stop_hw(struct ath5k_softc *sc)
2663 * and Sam's HAL do anyway). Instead Perform a full reset 2631 * and Sam's HAL do anyway). Instead Perform a full reset
2664 * on the device (same as initial state after attach) and 2632 * on the device (same as initial state after attach) and
2665 * leave it idle (keep MAC/BB on warm reset) */ 2633 * leave it idle (keep MAC/BB on warm reset) */
2666 ret = ath5k_hw_on_hold(sc->ah); 2634 ret = ath5k_hw_on_hold(ah);
2667 2635
2668 ATH5K_DBG(sc, ATH5K_DEBUG_RESET, 2636 ATH5K_DBG(ah, ATH5K_DEBUG_RESET,
2669 "putting device to sleep\n"); 2637 "putting device to sleep\n");
2670 } 2638 }
2671 2639
2672 mmiowb(); 2640 mmiowb();
2673 mutex_unlock(&sc->lock); 2641 mutex_unlock(&ah->lock);
2674
2675 ath5k_stop_tasklets(sc);
2676 2642
2677 cancel_delayed_work_sync(&sc->tx_complete_work); 2643 ath5k_stop_tasklets(ah);
2678 2644
2679 ath5k_rfkill_hw_stop(sc->ah); 2645 cancel_delayed_work_sync(&ah->tx_complete_work);
2680 2646
2681 return ret; 2647 ath5k_rfkill_hw_stop(ah);
2682} 2648}
2683 2649
2684/* 2650/*
2685 * Reset the hardware. If chan is not NULL, then also pause rx/tx 2651 * Reset the hardware. If chan is not NULL, then also pause rx/tx
2686 * and change to the given channel. 2652 * and change to the given channel.
2687 * 2653 *
2688 * This should be called with sc->lock. 2654 * This should be called with ah->lock.
2689 */ 2655 */
2690static int 2656static int
2691ath5k_reset(struct ath5k_softc *sc, struct ieee80211_channel *chan, 2657ath5k_reset(struct ath5k_hw *ah, struct ieee80211_channel *chan,
2692 bool skip_pcu) 2658 bool skip_pcu)
2693{ 2659{
2694 struct ath5k_hw *ah = sc->ah;
2695 struct ath_common *common = ath5k_hw_common(ah); 2660 struct ath_common *common = ath5k_hw_common(ah);
2696 int ret, ani_mode; 2661 int ret, ani_mode;
2697 bool fast; 2662 bool fast;
2698 2663
2699 ATH5K_DBG(sc, ATH5K_DEBUG_RESET, "resetting\n"); 2664 ATH5K_DBG(ah, ATH5K_DEBUG_RESET, "resetting\n");
2700 2665
2701 ath5k_hw_set_imr(ah, 0); 2666 ath5k_hw_set_imr(ah, 0);
2702 synchronize_irq(sc->irq); 2667 synchronize_irq(ah->irq);
2703 ath5k_stop_tasklets(sc); 2668 ath5k_stop_tasklets(ah);
2704 2669
2705 /* Save ani mode and disable ANI during 2670 /* Save ani mode and disable ANI during
2706 * reset. If we don't we might get false 2671 * reset. If we don't we might get false
2707 * PHY error interrupts. */ 2672 * PHY error interrupts. */
2708 ani_mode = ah->ah_sc->ani_state.ani_mode; 2673 ani_mode = ah->ani_state.ani_mode;
2709 ath5k_ani_init(ah, ATH5K_ANI_MODE_OFF); 2674 ath5k_ani_init(ah, ATH5K_ANI_MODE_OFF);
2710 2675
2711 /* We are going to empty hw queues 2676 /* We are going to empty hw queues
2712 * so we should also free any remaining 2677 * so we should also free any remaining
2713 * tx buffers */ 2678 * tx buffers */
2714 ath5k_drain_tx_buffs(sc); 2679 ath5k_drain_tx_buffs(ah);
2715 if (chan) 2680 if (chan)
2716 sc->curchan = chan; 2681 ah->curchan = chan;
2717 2682
2718 fast = ((chan != NULL) && modparam_fastchanswitch) ? 1 : 0; 2683 fast = ((chan != NULL) && modparam_fastchanswitch) ? 1 : 0;
2719 2684
2720 ret = ath5k_hw_reset(ah, sc->opmode, sc->curchan, fast, skip_pcu); 2685 ret = ath5k_hw_reset(ah, ah->opmode, ah->curchan, fast, skip_pcu);
2721 if (ret) { 2686 if (ret) {
2722 ATH5K_ERR(sc, "can't reset hardware (%d)\n", ret); 2687 ATH5K_ERR(ah, "can't reset hardware (%d)\n", ret);
2723 goto err; 2688 goto err;
2724 } 2689 }
2725 2690
2726 ret = ath5k_rx_start(sc); 2691 ret = ath5k_rx_start(ah);
2727 if (ret) { 2692 if (ret) {
2728 ATH5K_ERR(sc, "can't start recv logic\n"); 2693 ATH5K_ERR(ah, "can't start recv logic\n");
2729 goto err; 2694 goto err;
2730 } 2695 }
2731 2696
@@ -2737,7 +2702,7 @@ ath5k_reset(struct ath5k_softc *sc, struct ieee80211_channel *chan,
2737 ewma_init(&ah->ah_beacon_rssi_avg, 1024, 8); 2702 ewma_init(&ah->ah_beacon_rssi_avg, 1024, 8);
2738 2703
2739 /* clear survey data and cycle counters */ 2704 /* clear survey data and cycle counters */
2740 memset(&sc->survey, 0, sizeof(sc->survey)); 2705 memset(&ah->survey, 0, sizeof(ah->survey));
2741 spin_lock_bh(&common->cc_lock); 2706 spin_lock_bh(&common->cc_lock);
2742 ath_hw_cycle_counters_update(common); 2707 ath_hw_cycle_counters_update(common);
2743 memset(&common->cc_survey, 0, sizeof(common->cc_survey)); 2708 memset(&common->cc_survey, 0, sizeof(common->cc_survey));
@@ -2753,12 +2718,12 @@ ath5k_reset(struct ath5k_softc *sc, struct ieee80211_channel *chan,
2753 * 2718 *
2754 * XXX needed? 2719 * XXX needed?
2755 */ 2720 */
2756/* ath5k_chan_change(sc, c); */ 2721/* ath5k_chan_change(ah, c); */
2757 2722
2758 ath5k_beacon_config(sc); 2723 ath5k_beacon_config(ah);
2759 /* intrs are enabled by ath5k_beacon_config */ 2724 /* intrs are enabled by ath5k_beacon_config */
2760 2725
2761 ieee80211_wake_queues(sc->hw); 2726 ieee80211_wake_queues(ah->hw);
2762 2727
2763 return 0; 2728 return 0;
2764err: 2729err:
@@ -2767,20 +2732,19 @@ err:
2767 2732
2768static void ath5k_reset_work(struct work_struct *work) 2733static void ath5k_reset_work(struct work_struct *work)
2769{ 2734{
2770 struct ath5k_softc *sc = container_of(work, struct ath5k_softc, 2735 struct ath5k_hw *ah = container_of(work, struct ath5k_hw,
2771 reset_work); 2736 reset_work);
2772 2737
2773 mutex_lock(&sc->lock); 2738 mutex_lock(&ah->lock);
2774 ath5k_reset(sc, NULL, true); 2739 ath5k_reset(ah, NULL, true);
2775 mutex_unlock(&sc->lock); 2740 mutex_unlock(&ah->lock);
2776} 2741}
2777 2742
2778static int __devinit 2743static int __devinit
2779ath5k_init(struct ieee80211_hw *hw) 2744ath5k_init(struct ieee80211_hw *hw)
2780{ 2745{
2781 2746
2782 struct ath5k_softc *sc = hw->priv; 2747 struct ath5k_hw *ah = hw->priv;
2783 struct ath5k_hw *ah = sc->ah;
2784 struct ath_regulatory *regulatory = ath5k_hw_regulatory(ah); 2748 struct ath_regulatory *regulatory = ath5k_hw_regulatory(ah);
2785 struct ath5k_txq *txq; 2749 struct ath5k_txq *txq;
2786 u8 mac[ETH_ALEN] = {}; 2750 u8 mac[ETH_ALEN] = {};
@@ -2799,7 +2763,7 @@ ath5k_init(struct ieee80211_hw *hw)
2799 if (ret < 0) 2763 if (ret < 0)
2800 goto err; 2764 goto err;
2801 if (ret > 0) 2765 if (ret > 0)
2802 __set_bit(ATH_STAT_MRRETRY, sc->status); 2766 __set_bit(ATH_STAT_MRRETRY, ah->status);
2803 2767
2804 /* 2768 /*
2805 * Collect the channel list. The 802.11 layer 2769 * Collect the channel list. The 802.11 layer
@@ -2809,16 +2773,16 @@ ath5k_init(struct ieee80211_hw *hw)
2809 */ 2773 */
2810 ret = ath5k_setup_bands(hw); 2774 ret = ath5k_setup_bands(hw);
2811 if (ret) { 2775 if (ret) {
2812 ATH5K_ERR(sc, "can't get channels\n"); 2776 ATH5K_ERR(ah, "can't get channels\n");
2813 goto err; 2777 goto err;
2814 } 2778 }
2815 2779
2816 /* 2780 /*
2817 * Allocate tx+rx descriptors and populate the lists. 2781 * Allocate tx+rx descriptors and populate the lists.
2818 */ 2782 */
2819 ret = ath5k_desc_alloc(sc); 2783 ret = ath5k_desc_alloc(ah);
2820 if (ret) { 2784 if (ret) {
2821 ATH5K_ERR(sc, "can't allocate descriptors\n"); 2785 ATH5K_ERR(ah, "can't allocate descriptors\n");
2822 goto err; 2786 goto err;
2823 } 2787 }
2824 2788
@@ -2830,14 +2794,14 @@ ath5k_init(struct ieee80211_hw *hw)
2830 */ 2794 */
2831 ret = ath5k_beaconq_setup(ah); 2795 ret = ath5k_beaconq_setup(ah);
2832 if (ret < 0) { 2796 if (ret < 0) {
2833 ATH5K_ERR(sc, "can't setup a beacon xmit queue\n"); 2797 ATH5K_ERR(ah, "can't setup a beacon xmit queue\n");
2834 goto err_desc; 2798 goto err_desc;
2835 } 2799 }
2836 sc->bhalq = ret; 2800 ah->bhalq = ret;
2837 sc->cabq = ath5k_txq_setup(sc, AR5K_TX_QUEUE_CAB, 0); 2801 ah->cabq = ath5k_txq_setup(ah, AR5K_TX_QUEUE_CAB, 0);
2838 if (IS_ERR(sc->cabq)) { 2802 if (IS_ERR(ah->cabq)) {
2839 ATH5K_ERR(sc, "can't setup cab queue\n"); 2803 ATH5K_ERR(ah, "can't setup cab queue\n");
2840 ret = PTR_ERR(sc->cabq); 2804 ret = PTR_ERR(ah->cabq);
2841 goto err_bhal; 2805 goto err_bhal;
2842 } 2806 }
2843 2807
@@ -2846,97 +2810,97 @@ ath5k_init(struct ieee80211_hw *hw)
2846 if (ah->ah_capabilities.cap_queues.q_tx_num >= 6) { 2810 if (ah->ah_capabilities.cap_queues.q_tx_num >= 6) {
2847 /* This order matches mac80211's queue priority, so we can 2811 /* This order matches mac80211's queue priority, so we can
2848 * directly use the mac80211 queue number without any mapping */ 2812 * directly use the mac80211 queue number without any mapping */
2849 txq = ath5k_txq_setup(sc, AR5K_TX_QUEUE_DATA, AR5K_WME_AC_VO); 2813 txq = ath5k_txq_setup(ah, AR5K_TX_QUEUE_DATA, AR5K_WME_AC_VO);
2850 if (IS_ERR(txq)) { 2814 if (IS_ERR(txq)) {
2851 ATH5K_ERR(sc, "can't setup xmit queue\n"); 2815 ATH5K_ERR(ah, "can't setup xmit queue\n");
2852 ret = PTR_ERR(txq); 2816 ret = PTR_ERR(txq);
2853 goto err_queues; 2817 goto err_queues;
2854 } 2818 }
2855 txq = ath5k_txq_setup(sc, AR5K_TX_QUEUE_DATA, AR5K_WME_AC_VI); 2819 txq = ath5k_txq_setup(ah, AR5K_TX_QUEUE_DATA, AR5K_WME_AC_VI);
2856 if (IS_ERR(txq)) { 2820 if (IS_ERR(txq)) {
2857 ATH5K_ERR(sc, "can't setup xmit queue\n"); 2821 ATH5K_ERR(ah, "can't setup xmit queue\n");
2858 ret = PTR_ERR(txq); 2822 ret = PTR_ERR(txq);
2859 goto err_queues; 2823 goto err_queues;
2860 } 2824 }
2861 txq = ath5k_txq_setup(sc, AR5K_TX_QUEUE_DATA, AR5K_WME_AC_BE); 2825 txq = ath5k_txq_setup(ah, AR5K_TX_QUEUE_DATA, AR5K_WME_AC_BE);
2862 if (IS_ERR(txq)) { 2826 if (IS_ERR(txq)) {
2863 ATH5K_ERR(sc, "can't setup xmit queue\n"); 2827 ATH5K_ERR(ah, "can't setup xmit queue\n");
2864 ret = PTR_ERR(txq); 2828 ret = PTR_ERR(txq);
2865 goto err_queues; 2829 goto err_queues;
2866 } 2830 }
2867 txq = ath5k_txq_setup(sc, AR5K_TX_QUEUE_DATA, AR5K_WME_AC_BK); 2831 txq = ath5k_txq_setup(ah, AR5K_TX_QUEUE_DATA, AR5K_WME_AC_BK);
2868 if (IS_ERR(txq)) { 2832 if (IS_ERR(txq)) {
2869 ATH5K_ERR(sc, "can't setup xmit queue\n"); 2833 ATH5K_ERR(ah, "can't setup xmit queue\n");
2870 ret = PTR_ERR(txq); 2834 ret = PTR_ERR(txq);
2871 goto err_queues; 2835 goto err_queues;
2872 } 2836 }
2873 hw->queues = 4; 2837 hw->queues = 4;
2874 } else { 2838 } else {
2875 /* older hardware (5210) can only support one data queue */ 2839 /* older hardware (5210) can only support one data queue */
2876 txq = ath5k_txq_setup(sc, AR5K_TX_QUEUE_DATA, AR5K_WME_AC_BE); 2840 txq = ath5k_txq_setup(ah, AR5K_TX_QUEUE_DATA, AR5K_WME_AC_BE);
2877 if (IS_ERR(txq)) { 2841 if (IS_ERR(txq)) {
2878 ATH5K_ERR(sc, "can't setup xmit queue\n"); 2842 ATH5K_ERR(ah, "can't setup xmit queue\n");
2879 ret = PTR_ERR(txq); 2843 ret = PTR_ERR(txq);
2880 goto err_queues; 2844 goto err_queues;
2881 } 2845 }
2882 hw->queues = 1; 2846 hw->queues = 1;
2883 } 2847 }
2884 2848
2885 tasklet_init(&sc->rxtq, ath5k_tasklet_rx, (unsigned long)sc); 2849 tasklet_init(&ah->rxtq, ath5k_tasklet_rx, (unsigned long)ah);
2886 tasklet_init(&sc->txtq, ath5k_tasklet_tx, (unsigned long)sc); 2850 tasklet_init(&ah->txtq, ath5k_tasklet_tx, (unsigned long)ah);
2887 tasklet_init(&sc->calib, ath5k_tasklet_calibrate, (unsigned long)sc); 2851 tasklet_init(&ah->calib, ath5k_tasklet_calibrate, (unsigned long)ah);
2888 tasklet_init(&sc->beacontq, ath5k_tasklet_beacon, (unsigned long)sc); 2852 tasklet_init(&ah->beacontq, ath5k_tasklet_beacon, (unsigned long)ah);
2889 tasklet_init(&sc->ani_tasklet, ath5k_tasklet_ani, (unsigned long)sc); 2853 tasklet_init(&ah->ani_tasklet, ath5k_tasklet_ani, (unsigned long)ah);
2890 2854
2891 INIT_WORK(&sc->reset_work, ath5k_reset_work); 2855 INIT_WORK(&ah->reset_work, ath5k_reset_work);
2892 INIT_DELAYED_WORK(&sc->tx_complete_work, ath5k_tx_complete_poll_work); 2856 INIT_DELAYED_WORK(&ah->tx_complete_work, ath5k_tx_complete_poll_work);
2893 2857
2894 ret = ath5k_hw_common(ah)->bus_ops->eeprom_read_mac(ah, mac); 2858 ret = ath5k_hw_common(ah)->bus_ops->eeprom_read_mac(ah, mac);
2895 if (ret) { 2859 if (ret) {
2896 ATH5K_ERR(sc, "unable to read address from EEPROM\n"); 2860 ATH5K_ERR(ah, "unable to read address from EEPROM\n");
2897 goto err_queues; 2861 goto err_queues;
2898 } 2862 }
2899 2863
2900 SET_IEEE80211_PERM_ADDR(hw, mac); 2864 SET_IEEE80211_PERM_ADDR(hw, mac);
2901 memcpy(&sc->lladdr, mac, ETH_ALEN); 2865 memcpy(&ah->lladdr, mac, ETH_ALEN);
2902 /* All MAC address bits matter for ACKs */ 2866 /* All MAC address bits matter for ACKs */
2903 ath5k_update_bssid_mask_and_opmode(sc, NULL); 2867 ath5k_update_bssid_mask_and_opmode(ah, NULL);
2904 2868
2905 regulatory->current_rd = ah->ah_capabilities.cap_eeprom.ee_regdomain; 2869 regulatory->current_rd = ah->ah_capabilities.cap_eeprom.ee_regdomain;
2906 ret = ath_regd_init(regulatory, hw->wiphy, ath5k_reg_notifier); 2870 ret = ath_regd_init(regulatory, hw->wiphy, ath5k_reg_notifier);
2907 if (ret) { 2871 if (ret) {
2908 ATH5K_ERR(sc, "can't initialize regulatory system\n"); 2872 ATH5K_ERR(ah, "can't initialize regulatory system\n");
2909 goto err_queues; 2873 goto err_queues;
2910 } 2874 }
2911 2875
2912 ret = ieee80211_register_hw(hw); 2876 ret = ieee80211_register_hw(hw);
2913 if (ret) { 2877 if (ret) {
2914 ATH5K_ERR(sc, "can't register ieee80211 hw\n"); 2878 ATH5K_ERR(ah, "can't register ieee80211 hw\n");
2915 goto err_queues; 2879 goto err_queues;
2916 } 2880 }
2917 2881
2918 if (!ath_is_world_regd(regulatory)) 2882 if (!ath_is_world_regd(regulatory))
2919 regulatory_hint(hw->wiphy, regulatory->alpha2); 2883 regulatory_hint(hw->wiphy, regulatory->alpha2);
2920 2884
2921 ath5k_init_leds(sc); 2885 ath5k_init_leds(ah);
2922 2886
2923 ath5k_sysfs_register(sc); 2887 ath5k_sysfs_register(ah);
2924 2888
2925 return 0; 2889 return 0;
2926err_queues: 2890err_queues:
2927 ath5k_txq_release(sc); 2891 ath5k_txq_release(ah);
2928err_bhal: 2892err_bhal:
2929 ath5k_hw_release_tx_queue(ah, sc->bhalq); 2893 ath5k_hw_release_tx_queue(ah, ah->bhalq);
2930err_desc: 2894err_desc:
2931 ath5k_desc_free(sc); 2895 ath5k_desc_free(ah);
2932err: 2896err:
2933 return ret; 2897 return ret;
2934} 2898}
2935 2899
2936void 2900void
2937ath5k_deinit_softc(struct ath5k_softc *sc) 2901ath5k_deinit_softc(struct ath5k_hw *ah)
2938{ 2902{
2939 struct ieee80211_hw *hw = sc->hw; 2903 struct ieee80211_hw *hw = ah->hw;
2940 2904
2941 /* 2905 /*
2942 * NB: the order of these is important: 2906 * NB: the order of these is important:
@@ -2952,24 +2916,23 @@ ath5k_deinit_softc(struct ath5k_softc *sc)
2952 * Other than that, it's straightforward... 2916 * Other than that, it's straightforward...
2953 */ 2917 */
2954 ieee80211_unregister_hw(hw); 2918 ieee80211_unregister_hw(hw);
2955 ath5k_desc_free(sc); 2919 ath5k_desc_free(ah);
2956 ath5k_txq_release(sc); 2920 ath5k_txq_release(ah);
2957 ath5k_hw_release_tx_queue(sc->ah, sc->bhalq); 2921 ath5k_hw_release_tx_queue(ah, ah->bhalq);
2958 ath5k_unregister_leds(sc); 2922 ath5k_unregister_leds(ah);
2959 2923
2960 ath5k_sysfs_unregister(sc); 2924 ath5k_sysfs_unregister(ah);
2961 /* 2925 /*
2962 * NB: can't reclaim these until after ieee80211_ifdetach 2926 * NB: can't reclaim these until after ieee80211_ifdetach
2963 * returns because we'll get called back to reclaim node 2927 * returns because we'll get called back to reclaim node
2964 * state and potentially want to use them. 2928 * state and potentially want to use them.
2965 */ 2929 */
2966 ath5k_hw_deinit(sc->ah); 2930 ath5k_hw_deinit(ah);
2967 kfree(sc->ah); 2931 free_irq(ah->irq, ah);
2968 free_irq(sc->irq, sc);
2969} 2932}
2970 2933
2971bool 2934bool
2972ath5k_any_vif_assoc(struct ath5k_softc *sc) 2935ath5k_any_vif_assoc(struct ath5k_hw *ah)
2973{ 2936{
2974 struct ath5k_vif_iter_data iter_data; 2937 struct ath5k_vif_iter_data iter_data;
2975 iter_data.hw_macaddr = NULL; 2938 iter_data.hw_macaddr = NULL;
@@ -2977,7 +2940,7 @@ ath5k_any_vif_assoc(struct ath5k_softc *sc)
2977 iter_data.need_set_hw_addr = false; 2940 iter_data.need_set_hw_addr = false;
2978 iter_data.found_active = true; 2941 iter_data.found_active = true;
2979 2942
2980 ieee80211_iterate_active_interfaces_atomic(sc->hw, ath5k_vif_iter, 2943 ieee80211_iterate_active_interfaces_atomic(ah->hw, ath5k_vif_iter,
2981 &iter_data); 2944 &iter_data);
2982 return iter_data.any_assoc; 2945 return iter_data.any_assoc;
2983} 2946}
@@ -2985,8 +2948,7 @@ ath5k_any_vif_assoc(struct ath5k_softc *sc)
2985void 2948void
2986ath5k_set_beacon_filter(struct ieee80211_hw *hw, bool enable) 2949ath5k_set_beacon_filter(struct ieee80211_hw *hw, bool enable)
2987{ 2950{
2988 struct ath5k_softc *sc = hw->priv; 2951 struct ath5k_hw *ah = hw->priv;
2989 struct ath5k_hw *ah = sc->ah;
2990 u32 rfilt; 2952 u32 rfilt;
2991 rfilt = ath5k_hw_get_rx_filter(ah); 2953 rfilt = ath5k_hw_get_rx_filter(ah);
2992 if (enable) 2954 if (enable)
@@ -2994,5 +2956,5 @@ ath5k_set_beacon_filter(struct ieee80211_hw *hw, bool enable)
2994 else 2956 else
2995 rfilt &= ~AR5K_RX_FILTER_BEACON; 2957 rfilt &= ~AR5K_RX_FILTER_BEACON;
2996 ath5k_hw_set_rx_filter(ah, rfilt); 2958 ath5k_hw_set_rx_filter(ah, rfilt);
2997 sc->filter_flags = rfilt; 2959 ah->filter_flags = rfilt;
2998} 2960}
diff --git a/drivers/net/wireless/ath/ath5k/base.h b/drivers/net/wireless/ath/ath5k/base.h
index 0a98777b9373..a81f28d5bddc 100644
--- a/drivers/net/wireless/ath/ath5k/base.h
+++ b/drivers/net/wireless/ath/ath5k/base.h
@@ -45,23 +45,13 @@
45#include <linux/list.h> 45#include <linux/list.h>
46#include <linux/wireless.h> 46#include <linux/wireless.h>
47#include <linux/if_ether.h> 47#include <linux/if_ether.h>
48#include <linux/leds.h>
49#include <linux/rfkill.h> 48#include <linux/rfkill.h>
50#include <linux/workqueue.h> 49#include <linux/workqueue.h>
51 50
52#include "ath5k.h" 51#include "ath5k.h"
53#include "debug.h"
54#include "ani.h"
55
56#include "../regd.h" 52#include "../regd.h"
57#include "../ath.h" 53#include "../ath.h"
58 54
59#define ATH_RXBUF 40 /* number of RX buffers */
60#define ATH_TXBUF 200 /* number of TX buffers */
61#define ATH_BCBUF 4 /* number of beacon buffers */
62#define ATH5K_TXQ_LEN_MAX (ATH_TXBUF / 4) /* bufs per queue */
63#define ATH5K_TXQ_LEN_LOW (ATH5K_TXQ_LEN_MAX / 2) /* low mark */
64
65struct ath5k_buf { 55struct ath5k_buf {
66 struct list_head list; 56 struct list_head list;
67 struct ath5k_desc *desc; /* virtual addr of desc */ 57 struct ath5k_desc *desc; /* virtual addr of desc */
@@ -70,94 +60,6 @@ struct ath5k_buf {
70 dma_addr_t skbaddr;/* physical addr of skb data */ 60 dma_addr_t skbaddr;/* physical addr of skb data */
71}; 61};
72 62
73/*
74 * Data transmit queue state. One of these exists for each
75 * hardware transmit queue. Packets sent to us from above
76 * are assigned to queues based on their priority. Not all
77 * devices support a complete set of hardware transmit queues.
78 * For those devices the array sc_ac2q will map multiple
79 * priorities to fewer hardware queues (typically all to one
80 * hardware queue).
81 */
82struct ath5k_txq {
83 unsigned int qnum; /* hardware q number */
84 u32 *link; /* link ptr in last TX desc */
85 struct list_head q; /* transmit queue */
86 spinlock_t lock; /* lock on q and link */
87 bool setup;
88 int txq_len; /* number of queued buffers */
89 int txq_max; /* max allowed num of queued buffers */
90 bool txq_poll_mark;
91 unsigned int txq_stuck; /* informational counter */
92};
93
94#define ATH5K_LED_MAX_NAME_LEN 31
95
96/*
97 * State for LED triggers
98 */
99struct ath5k_led {
100 char name[ATH5K_LED_MAX_NAME_LEN + 1]; /* name of the LED in sysfs */
101 struct ath5k_softc *sc; /* driver state */
102 struct led_classdev led_dev; /* led classdev */
103};
104
105/* Rfkill */
106struct ath5k_rfkill {
107 /* GPIO PIN for rfkill */
108 u16 gpio;
109 /* polarity of rfkill GPIO PIN */
110 bool polarity;
111 /* RFKILL toggle tasklet */
112 struct tasklet_struct toggleq;
113};
114
115/* statistics */
116struct ath5k_statistics {
117 /* antenna use */
118 unsigned int antenna_rx[5]; /* frames count per antenna RX */
119 unsigned int antenna_tx[5]; /* frames count per antenna TX */
120
121 /* frame errors */
122 unsigned int rx_all_count; /* all RX frames, including errors */
123 unsigned int tx_all_count; /* all TX frames, including errors */
124 unsigned int rx_bytes_count; /* all RX bytes, including errored pkts
125 * and the MAC headers for each packet
126 */
127 unsigned int tx_bytes_count; /* all TX bytes, including errored pkts
128 * and the MAC headers and padding for
129 * each packet.
130 */
131 unsigned int rxerr_crc;
132 unsigned int rxerr_phy;
133 unsigned int rxerr_phy_code[32];
134 unsigned int rxerr_fifo;
135 unsigned int rxerr_decrypt;
136 unsigned int rxerr_mic;
137 unsigned int rxerr_proc;
138 unsigned int rxerr_jumbo;
139 unsigned int txerr_retry;
140 unsigned int txerr_fifo;
141 unsigned int txerr_filt;
142
143 /* MIB counters */
144 unsigned int ack_fail;
145 unsigned int rts_fail;
146 unsigned int rts_ok;
147 unsigned int fcs_error;
148 unsigned int beacons;
149
150 unsigned int mib_intr;
151 unsigned int rxorn_intr;
152 unsigned int rxeol_intr;
153};
154
155#if CHAN_DEBUG
156#define ATH_CHAN_MAX (26 + 26 + 26 + 200 + 200)
157#else
158#define ATH_CHAN_MAX (14 + 14 + 14 + 252 + 20)
159#endif
160
161struct ath5k_vif { 63struct ath5k_vif {
162 bool assoc; /* are we associated or not */ 64 bool assoc; /* are we associated or not */
163 enum nl80211_iftype opmode; 65 enum nl80211_iftype opmode;
@@ -166,104 +68,6 @@ struct ath5k_vif {
166 u8 lladdr[ETH_ALEN]; 68 u8 lladdr[ETH_ALEN];
167}; 69};
168 70
169/* Software Carrier, keeps track of the driver state
170 * associated with an instance of a device */
171struct ath5k_softc {
172 struct pci_dev *pdev;
173 struct device *dev; /* for dma mapping */
174 int irq;
175 u16 devid;
176 void __iomem *iobase; /* address of the device */
177 struct mutex lock; /* dev-level lock */
178 struct ieee80211_hw *hw; /* IEEE 802.11 common */
179 struct ieee80211_supported_band sbands[IEEE80211_NUM_BANDS];
180 struct ieee80211_channel channels[ATH_CHAN_MAX];
181 struct ieee80211_rate rates[IEEE80211_NUM_BANDS][AR5K_MAX_RATES];
182 s8 rate_idx[IEEE80211_NUM_BANDS][AR5K_MAX_RATES];
183 enum nl80211_iftype opmode;
184 struct ath5k_hw *ah; /* Atheros HW */
185
186#ifdef CONFIG_ATH5K_DEBUG
187 struct ath5k_dbg_info debug; /* debug info */
188#endif /* CONFIG_ATH5K_DEBUG */
189
190 struct ath5k_buf *bufptr; /* allocated buffer ptr */
191 struct ath5k_desc *desc; /* TX/RX descriptors */
192 dma_addr_t desc_daddr; /* DMA (physical) address */
193 size_t desc_len; /* size of TX/RX descriptors */
194
195 DECLARE_BITMAP(status, 6);
196#define ATH_STAT_INVALID 0 /* disable hardware accesses */
197#define ATH_STAT_MRRETRY 1 /* multi-rate retry support */
198#define ATH_STAT_PROMISC 2
199#define ATH_STAT_LEDSOFT 3 /* enable LED gpio status */
200#define ATH_STAT_STARTED 4 /* opened & irqs enabled */
201#define ATH_STAT_2G_DISABLED 5 /* multiband radio without 2G */
202
203 unsigned int filter_flags; /* HW flags, AR5K_RX_FILTER_* */
204 struct ieee80211_channel *curchan; /* current h/w channel */
205
206 u16 nvifs;
207
208 enum ath5k_int imask; /* interrupt mask copy */
209
210 spinlock_t irqlock;
211 bool rx_pending; /* rx tasklet pending */
212 bool tx_pending; /* tx tasklet pending */
213
214 u8 lladdr[ETH_ALEN];
215 u8 bssidmask[ETH_ALEN];
216
217 unsigned int led_pin, /* GPIO pin for driving LED */
218 led_on; /* pin setting for LED on */
219
220 struct work_struct reset_work; /* deferred chip reset */
221
222 unsigned int rxbufsize; /* rx size based on mtu */
223 struct list_head rxbuf; /* receive buffer */
224 spinlock_t rxbuflock;
225 u32 *rxlink; /* link ptr in last RX desc */
226 struct tasklet_struct rxtq; /* rx intr tasklet */
227 struct ath5k_led rx_led; /* rx led */
228
229 struct list_head txbuf; /* transmit buffer */
230 spinlock_t txbuflock;
231 unsigned int txbuf_len; /* buf count in txbuf list */
232 struct ath5k_txq txqs[AR5K_NUM_TX_QUEUES]; /* tx queues */
233 struct tasklet_struct txtq; /* tx intr tasklet */
234 struct ath5k_led tx_led; /* tx led */
235
236 struct ath5k_rfkill rf_kill;
237
238 struct tasklet_struct calib; /* calibration tasklet */
239
240 spinlock_t block; /* protects beacon */
241 struct tasklet_struct beacontq; /* beacon intr tasklet */
242 struct list_head bcbuf; /* beacon buffer */
243 struct ieee80211_vif *bslot[ATH_BCBUF];
244 u16 num_ap_vifs;
245 u16 num_adhoc_vifs;
246 unsigned int bhalq, /* SW q for outgoing beacons */
247 bmisscount, /* missed beacon transmits */
248 bintval, /* beacon interval in TU */
249 bsent;
250 unsigned int nexttbtt; /* next beacon time in TU */
251 struct ath5k_txq *cabq; /* content after beacon */
252
253 int power_level; /* Requested tx power in dBm */
254 bool assoc; /* associate state */
255 bool enable_beacon; /* true if beacons are on */
256
257 struct ath5k_statistics stats;
258
259 struct ath5k_ani_state ani_state;
260 struct tasklet_struct ani_tasklet; /* ANI calibration */
261
262 struct delayed_work tx_complete_work;
263
264 struct survey_info survey; /* collected survey info */
265};
266
267struct ath5k_vif_iter_data { 71struct ath5k_vif_iter_data {
268 const u8 *hw_macaddr; 72 const u8 *hw_macaddr;
269 u8 mask[ETH_ALEN]; 73 u8 mask[ETH_ALEN];
@@ -277,9 +81,10 @@ struct ath5k_vif_iter_data {
277void ath5k_vif_iter(void *data, u8 *mac, struct ieee80211_vif *vif); 81void ath5k_vif_iter(void *data, u8 *mac, struct ieee80211_vif *vif);
278 82
279 83
280#define ath5k_hw_hasbssidmask(_ah) \ 84/* Check whether BSSID mask is supported */
281 (ath5k_hw_get_capability(_ah, AR5K_CAP_BSSIDMASK, 0, NULL) == 0) 85#define ath5k_hw_hasbssidmask(_ah) (ah->ah_version == AR5K_AR5212)
282#define ath5k_hw_hasveol(_ah) \ 86
283 (ath5k_hw_get_capability(_ah, AR5K_CAP_VEOL, 0, NULL) == 0) 87/* Check whether virtual EOL is supported */
88#define ath5k_hw_hasveol(_ah) (ah->ah_version != AR5K_AR5210)
284 89
285#endif 90#endif
diff --git a/drivers/net/wireless/ath/ath5k/caps.c b/drivers/net/wireless/ath/ath5k/caps.c
index c752982aec05..eefe670e28a7 100644
--- a/drivers/net/wireless/ath/ath5k/caps.c
+++ b/drivers/net/wireless/ath/ath5k/caps.c
@@ -112,51 +112,6 @@ int ath5k_hw_set_capabilities(struct ath5k_hw *ah)
112 return 0; 112 return 0;
113} 113}
114 114
115/* Main function used by the driver part to check caps */
116int ath5k_hw_get_capability(struct ath5k_hw *ah,
117 enum ath5k_capability_type cap_type,
118 u32 capability, u32 *result)
119{
120 switch (cap_type) {
121 case AR5K_CAP_NUM_TXQUEUES:
122 if (result) {
123 if (ah->ah_version == AR5K_AR5210)
124 *result = AR5K_NUM_TX_QUEUES_NOQCU;
125 else
126 *result = AR5K_NUM_TX_QUEUES;
127 goto yes;
128 }
129 case AR5K_CAP_VEOL:
130 goto yes;
131 case AR5K_CAP_COMPRESSION:
132 if (ah->ah_version == AR5K_AR5212)
133 goto yes;
134 else
135 goto no;
136 case AR5K_CAP_BURST:
137 goto yes;
138 case AR5K_CAP_TPC:
139 goto yes;
140 case AR5K_CAP_BSSIDMASK:
141 if (ah->ah_version == AR5K_AR5212)
142 goto yes;
143 else
144 goto no;
145 case AR5K_CAP_XR:
146 if (ah->ah_version == AR5K_AR5212)
147 goto yes;
148 else
149 goto no;
150 default:
151 goto no;
152 }
153
154no:
155 return -EINVAL;
156yes:
157 return 0;
158}
159
160/* 115/*
161 * TODO: Following functions should be part of a new function 116 * TODO: Following functions should be part of a new function
162 * set_capability 117 * set_capability
diff --git a/drivers/net/wireless/ath/ath5k/debug.c b/drivers/net/wireless/ath/ath5k/debug.c
index 4edca7072d53..ccca724de173 100644
--- a/drivers/net/wireless/ath/ath5k/debug.c
+++ b/drivers/net/wireless/ath/ath5k/debug.c
@@ -157,10 +157,10 @@ static void *reg_next(struct seq_file *seq, void *p, loff_t *pos)
157 157
158static int reg_show(struct seq_file *seq, void *p) 158static int reg_show(struct seq_file *seq, void *p)
159{ 159{
160 struct ath5k_softc *sc = seq->private; 160 struct ath5k_hw *ah = seq->private;
161 struct reg *r = p; 161 struct reg *r = p;
162 seq_printf(seq, "%-25s0x%08x\n", r->name, 162 seq_printf(seq, "%-25s0x%08x\n", r->name,
163 ath5k_hw_reg_read(sc->ah, r->addr)); 163 ath5k_hw_reg_read(ah, r->addr));
164 return 0; 164 return 0;
165} 165}
166 166
@@ -197,42 +197,41 @@ static const struct file_operations fops_registers = {
197static ssize_t read_file_beacon(struct file *file, char __user *user_buf, 197static ssize_t read_file_beacon(struct file *file, char __user *user_buf,
198 size_t count, loff_t *ppos) 198 size_t count, loff_t *ppos)
199{ 199{
200 struct ath5k_softc *sc = file->private_data; 200 struct ath5k_hw *ah = file->private_data;
201 struct ath5k_hw *ah = sc->ah;
202 char buf[500]; 201 char buf[500];
203 unsigned int len = 0; 202 unsigned int len = 0;
204 unsigned int v; 203 unsigned int v;
205 u64 tsf; 204 u64 tsf;
206 205
207 v = ath5k_hw_reg_read(sc->ah, AR5K_BEACON); 206 v = ath5k_hw_reg_read(ah, AR5K_BEACON);
208 len += snprintf(buf + len, sizeof(buf) - len, 207 len += snprintf(buf + len, sizeof(buf) - len,
209 "%-24s0x%08x\tintval: %d\tTIM: 0x%x\n", 208 "%-24s0x%08x\tintval: %d\tTIM: 0x%x\n",
210 "AR5K_BEACON", v, v & AR5K_BEACON_PERIOD, 209 "AR5K_BEACON", v, v & AR5K_BEACON_PERIOD,
211 (v & AR5K_BEACON_TIM) >> AR5K_BEACON_TIM_S); 210 (v & AR5K_BEACON_TIM) >> AR5K_BEACON_TIM_S);
212 211
213 len += snprintf(buf + len, sizeof(buf) - len, "%-24s0x%08x\n", 212 len += snprintf(buf + len, sizeof(buf) - len, "%-24s0x%08x\n",
214 "AR5K_LAST_TSTP", ath5k_hw_reg_read(sc->ah, AR5K_LAST_TSTP)); 213 "AR5K_LAST_TSTP", ath5k_hw_reg_read(ah, AR5K_LAST_TSTP));
215 214
216 len += snprintf(buf + len, sizeof(buf) - len, "%-24s0x%08x\n\n", 215 len += snprintf(buf + len, sizeof(buf) - len, "%-24s0x%08x\n\n",
217 "AR5K_BEACON_CNT", ath5k_hw_reg_read(sc->ah, AR5K_BEACON_CNT)); 216 "AR5K_BEACON_CNT", ath5k_hw_reg_read(ah, AR5K_BEACON_CNT));
218 217
219 v = ath5k_hw_reg_read(sc->ah, AR5K_TIMER0); 218 v = ath5k_hw_reg_read(ah, AR5K_TIMER0);
220 len += snprintf(buf + len, sizeof(buf) - len, "%-24s0x%08x\tTU: %08x\n", 219 len += snprintf(buf + len, sizeof(buf) - len, "%-24s0x%08x\tTU: %08x\n",
221 "AR5K_TIMER0 (TBTT)", v, v); 220 "AR5K_TIMER0 (TBTT)", v, v);
222 221
223 v = ath5k_hw_reg_read(sc->ah, AR5K_TIMER1); 222 v = ath5k_hw_reg_read(ah, AR5K_TIMER1);
224 len += snprintf(buf + len, sizeof(buf) - len, "%-24s0x%08x\tTU: %08x\n", 223 len += snprintf(buf + len, sizeof(buf) - len, "%-24s0x%08x\tTU: %08x\n",
225 "AR5K_TIMER1 (DMA)", v, v >> 3); 224 "AR5K_TIMER1 (DMA)", v, v >> 3);
226 225
227 v = ath5k_hw_reg_read(sc->ah, AR5K_TIMER2); 226 v = ath5k_hw_reg_read(ah, AR5K_TIMER2);
228 len += snprintf(buf + len, sizeof(buf) - len, "%-24s0x%08x\tTU: %08x\n", 227 len += snprintf(buf + len, sizeof(buf) - len, "%-24s0x%08x\tTU: %08x\n",
229 "AR5K_TIMER2 (SWBA)", v, v >> 3); 228 "AR5K_TIMER2 (SWBA)", v, v >> 3);
230 229
231 v = ath5k_hw_reg_read(sc->ah, AR5K_TIMER3); 230 v = ath5k_hw_reg_read(ah, AR5K_TIMER3);
232 len += snprintf(buf + len, sizeof(buf) - len, "%-24s0x%08x\tTU: %08x\n", 231 len += snprintf(buf + len, sizeof(buf) - len, "%-24s0x%08x\tTU: %08x\n",
233 "AR5K_TIMER3 (ATIM)", v, v); 232 "AR5K_TIMER3 (ATIM)", v, v);
234 233
235 tsf = ath5k_hw_get_tsf64(sc->ah); 234 tsf = ath5k_hw_get_tsf64(ah);
236 len += snprintf(buf + len, sizeof(buf) - len, 235 len += snprintf(buf + len, sizeof(buf) - len,
237 "TSF\t\t0x%016llx\tTU: %08x\n", 236 "TSF\t\t0x%016llx\tTU: %08x\n",
238 (unsigned long long)tsf, TSF_TO_TU(tsf)); 237 (unsigned long long)tsf, TSF_TO_TU(tsf));
@@ -247,8 +246,7 @@ static ssize_t write_file_beacon(struct file *file,
247 const char __user *userbuf, 246 const char __user *userbuf,
248 size_t count, loff_t *ppos) 247 size_t count, loff_t *ppos)
249{ 248{
250 struct ath5k_softc *sc = file->private_data; 249 struct ath5k_hw *ah = file->private_data;
251 struct ath5k_hw *ah = sc->ah;
252 char buf[20]; 250 char buf[20];
253 251
254 if (copy_from_user(buf, userbuf, min(count, sizeof(buf)))) 252 if (copy_from_user(buf, userbuf, min(count, sizeof(buf))))
@@ -279,9 +277,9 @@ static ssize_t write_file_reset(struct file *file,
279 const char __user *userbuf, 277 const char __user *userbuf,
280 size_t count, loff_t *ppos) 278 size_t count, loff_t *ppos)
281{ 279{
282 struct ath5k_softc *sc = file->private_data; 280 struct ath5k_hw *ah = file->private_data;
283 ATH5K_DBG(sc, ATH5K_DEBUG_RESET, "debug file triggered reset\n"); 281 ATH5K_DBG(ah, ATH5K_DEBUG_RESET, "debug file triggered reset\n");
284 ieee80211_queue_work(sc->hw, &sc->reset_work); 282 ieee80211_queue_work(ah->hw, &ah->reset_work);
285 return count; 283 return count;
286} 284}
287 285
@@ -318,23 +316,23 @@ static const struct {
318static ssize_t read_file_debug(struct file *file, char __user *user_buf, 316static ssize_t read_file_debug(struct file *file, char __user *user_buf,
319 size_t count, loff_t *ppos) 317 size_t count, loff_t *ppos)
320{ 318{
321 struct ath5k_softc *sc = file->private_data; 319 struct ath5k_hw *ah = file->private_data;
322 char buf[700]; 320 char buf[700];
323 unsigned int len = 0; 321 unsigned int len = 0;
324 unsigned int i; 322 unsigned int i;
325 323
326 len += snprintf(buf + len, sizeof(buf) - len, 324 len += snprintf(buf + len, sizeof(buf) - len,
327 "DEBUG LEVEL: 0x%08x\n\n", sc->debug.level); 325 "DEBUG LEVEL: 0x%08x\n\n", ah->debug.level);
328 326
329 for (i = 0; i < ARRAY_SIZE(dbg_info) - 1; i++) { 327 for (i = 0; i < ARRAY_SIZE(dbg_info) - 1; i++) {
330 len += snprintf(buf + len, sizeof(buf) - len, 328 len += snprintf(buf + len, sizeof(buf) - len,
331 "%10s %c 0x%08x - %s\n", dbg_info[i].name, 329 "%10s %c 0x%08x - %s\n", dbg_info[i].name,
332 sc->debug.level & dbg_info[i].level ? '+' : ' ', 330 ah->debug.level & dbg_info[i].level ? '+' : ' ',
333 dbg_info[i].level, dbg_info[i].desc); 331 dbg_info[i].level, dbg_info[i].desc);
334 } 332 }
335 len += snprintf(buf + len, sizeof(buf) - len, 333 len += snprintf(buf + len, sizeof(buf) - len,
336 "%10s %c 0x%08x - %s\n", dbg_info[i].name, 334 "%10s %c 0x%08x - %s\n", dbg_info[i].name,
337 sc->debug.level == dbg_info[i].level ? '+' : ' ', 335 ah->debug.level == dbg_info[i].level ? '+' : ' ',
338 dbg_info[i].level, dbg_info[i].desc); 336 dbg_info[i].level, dbg_info[i].desc);
339 337
340 if (len > sizeof(buf)) 338 if (len > sizeof(buf))
@@ -347,7 +345,7 @@ static ssize_t write_file_debug(struct file *file,
347 const char __user *userbuf, 345 const char __user *userbuf,
348 size_t count, loff_t *ppos) 346 size_t count, loff_t *ppos)
349{ 347{
350 struct ath5k_softc *sc = file->private_data; 348 struct ath5k_hw *ah = file->private_data;
351 unsigned int i; 349 unsigned int i;
352 char buf[20]; 350 char buf[20];
353 351
@@ -357,7 +355,7 @@ static ssize_t write_file_debug(struct file *file,
357 for (i = 0; i < ARRAY_SIZE(dbg_info); i++) { 355 for (i = 0; i < ARRAY_SIZE(dbg_info); i++) {
358 if (strncmp(buf, dbg_info[i].name, 356 if (strncmp(buf, dbg_info[i].name,
359 strlen(dbg_info[i].name)) == 0) { 357 strlen(dbg_info[i].name)) == 0) {
360 sc->debug.level ^= dbg_info[i].level; /* toggle bit */ 358 ah->debug.level ^= dbg_info[i].level; /* toggle bit */
361 break; 359 break;
362 } 360 }
363 } 361 }
@@ -378,33 +376,33 @@ static const struct file_operations fops_debug = {
378static ssize_t read_file_antenna(struct file *file, char __user *user_buf, 376static ssize_t read_file_antenna(struct file *file, char __user *user_buf,
379 size_t count, loff_t *ppos) 377 size_t count, loff_t *ppos)
380{ 378{
381 struct ath5k_softc *sc = file->private_data; 379 struct ath5k_hw *ah = file->private_data;
382 char buf[700]; 380 char buf[700];
383 unsigned int len = 0; 381 unsigned int len = 0;
384 unsigned int i; 382 unsigned int i;
385 unsigned int v; 383 unsigned int v;
386 384
387 len += snprintf(buf + len, sizeof(buf) - len, "antenna mode\t%d\n", 385 len += snprintf(buf + len, sizeof(buf) - len, "antenna mode\t%d\n",
388 sc->ah->ah_ant_mode); 386 ah->ah_ant_mode);
389 len += snprintf(buf + len, sizeof(buf) - len, "default antenna\t%d\n", 387 len += snprintf(buf + len, sizeof(buf) - len, "default antenna\t%d\n",
390 sc->ah->ah_def_ant); 388 ah->ah_def_ant);
391 len += snprintf(buf + len, sizeof(buf) - len, "tx antenna\t%d\n", 389 len += snprintf(buf + len, sizeof(buf) - len, "tx antenna\t%d\n",
392 sc->ah->ah_tx_ant); 390 ah->ah_tx_ant);
393 391
394 len += snprintf(buf + len, sizeof(buf) - len, "\nANTENNA\t\tRX\tTX\n"); 392 len += snprintf(buf + len, sizeof(buf) - len, "\nANTENNA\t\tRX\tTX\n");
395 for (i = 1; i < ARRAY_SIZE(sc->stats.antenna_rx); i++) { 393 for (i = 1; i < ARRAY_SIZE(ah->stats.antenna_rx); i++) {
396 len += snprintf(buf + len, sizeof(buf) - len, 394 len += snprintf(buf + len, sizeof(buf) - len,
397 "[antenna %d]\t%d\t%d\n", 395 "[antenna %d]\t%d\t%d\n",
398 i, sc->stats.antenna_rx[i], sc->stats.antenna_tx[i]); 396 i, ah->stats.antenna_rx[i], ah->stats.antenna_tx[i]);
399 } 397 }
400 len += snprintf(buf + len, sizeof(buf) - len, "[invalid]\t%d\t%d\n", 398 len += snprintf(buf + len, sizeof(buf) - len, "[invalid]\t%d\t%d\n",
401 sc->stats.antenna_rx[0], sc->stats.antenna_tx[0]); 399 ah->stats.antenna_rx[0], ah->stats.antenna_tx[0]);
402 400
403 v = ath5k_hw_reg_read(sc->ah, AR5K_DEFAULT_ANTENNA); 401 v = ath5k_hw_reg_read(ah, AR5K_DEFAULT_ANTENNA);
404 len += snprintf(buf + len, sizeof(buf) - len, 402 len += snprintf(buf + len, sizeof(buf) - len,
405 "\nAR5K_DEFAULT_ANTENNA\t0x%08x\n", v); 403 "\nAR5K_DEFAULT_ANTENNA\t0x%08x\n", v);
406 404
407 v = ath5k_hw_reg_read(sc->ah, AR5K_STA_ID1); 405 v = ath5k_hw_reg_read(ah, AR5K_STA_ID1);
408 len += snprintf(buf + len, sizeof(buf) - len, 406 len += snprintf(buf + len, sizeof(buf) - len,
409 "AR5K_STA_ID1_DEFAULT_ANTENNA\t%d\n", 407 "AR5K_STA_ID1_DEFAULT_ANTENNA\t%d\n",
410 (v & AR5K_STA_ID1_DEFAULT_ANTENNA) != 0); 408 (v & AR5K_STA_ID1_DEFAULT_ANTENNA) != 0);
@@ -418,25 +416,25 @@ static ssize_t read_file_antenna(struct file *file, char __user *user_buf,
418 "AR5K_STA_ID1_SELFGEN_DEF_ANT\t%d\n", 416 "AR5K_STA_ID1_SELFGEN_DEF_ANT\t%d\n",
419 (v & AR5K_STA_ID1_SELFGEN_DEF_ANT) != 0); 417 (v & AR5K_STA_ID1_SELFGEN_DEF_ANT) != 0);
420 418
421 v = ath5k_hw_reg_read(sc->ah, AR5K_PHY_AGCCTL); 419 v = ath5k_hw_reg_read(ah, AR5K_PHY_AGCCTL);
422 len += snprintf(buf + len, sizeof(buf) - len, 420 len += snprintf(buf + len, sizeof(buf) - len,
423 "\nAR5K_PHY_AGCCTL_OFDM_DIV_DIS\t%d\n", 421 "\nAR5K_PHY_AGCCTL_OFDM_DIV_DIS\t%d\n",
424 (v & AR5K_PHY_AGCCTL_OFDM_DIV_DIS) != 0); 422 (v & AR5K_PHY_AGCCTL_OFDM_DIV_DIS) != 0);
425 423
426 v = ath5k_hw_reg_read(sc->ah, AR5K_PHY_RESTART); 424 v = ath5k_hw_reg_read(ah, AR5K_PHY_RESTART);
427 len += snprintf(buf + len, sizeof(buf) - len, 425 len += snprintf(buf + len, sizeof(buf) - len,
428 "AR5K_PHY_RESTART_DIV_GC\t\t%x\n", 426 "AR5K_PHY_RESTART_DIV_GC\t\t%x\n",
429 (v & AR5K_PHY_RESTART_DIV_GC) >> AR5K_PHY_RESTART_DIV_GC_S); 427 (v & AR5K_PHY_RESTART_DIV_GC) >> AR5K_PHY_RESTART_DIV_GC_S);
430 428
431 v = ath5k_hw_reg_read(sc->ah, AR5K_PHY_FAST_ANT_DIV); 429 v = ath5k_hw_reg_read(ah, AR5K_PHY_FAST_ANT_DIV);
432 len += snprintf(buf + len, sizeof(buf) - len, 430 len += snprintf(buf + len, sizeof(buf) - len,
433 "AR5K_PHY_FAST_ANT_DIV_EN\t%d\n", 431 "AR5K_PHY_FAST_ANT_DIV_EN\t%d\n",
434 (v & AR5K_PHY_FAST_ANT_DIV_EN) != 0); 432 (v & AR5K_PHY_FAST_ANT_DIV_EN) != 0);
435 433
436 v = ath5k_hw_reg_read(sc->ah, AR5K_PHY_ANT_SWITCH_TABLE_0); 434 v = ath5k_hw_reg_read(ah, AR5K_PHY_ANT_SWITCH_TABLE_0);
437 len += snprintf(buf + len, sizeof(buf) - len, 435 len += snprintf(buf + len, sizeof(buf) - len,
438 "\nAR5K_PHY_ANT_SWITCH_TABLE_0\t0x%08x\n", v); 436 "\nAR5K_PHY_ANT_SWITCH_TABLE_0\t0x%08x\n", v);
439 v = ath5k_hw_reg_read(sc->ah, AR5K_PHY_ANT_SWITCH_TABLE_1); 437 v = ath5k_hw_reg_read(ah, AR5K_PHY_ANT_SWITCH_TABLE_1);
440 len += snprintf(buf + len, sizeof(buf) - len, 438 len += snprintf(buf + len, sizeof(buf) - len,
441 "AR5K_PHY_ANT_SWITCH_TABLE_1\t0x%08x\n", v); 439 "AR5K_PHY_ANT_SWITCH_TABLE_1\t0x%08x\n", v);
442 440
@@ -450,7 +448,7 @@ static ssize_t write_file_antenna(struct file *file,
450 const char __user *userbuf, 448 const char __user *userbuf,
451 size_t count, loff_t *ppos) 449 size_t count, loff_t *ppos)
452{ 450{
453 struct ath5k_softc *sc = file->private_data; 451 struct ath5k_hw *ah = file->private_data;
454 unsigned int i; 452 unsigned int i;
455 char buf[20]; 453 char buf[20];
456 454
@@ -458,18 +456,18 @@ static ssize_t write_file_antenna(struct file *file,
458 return -EFAULT; 456 return -EFAULT;
459 457
460 if (strncmp(buf, "diversity", 9) == 0) { 458 if (strncmp(buf, "diversity", 9) == 0) {
461 ath5k_hw_set_antenna_mode(sc->ah, AR5K_ANTMODE_DEFAULT); 459 ath5k_hw_set_antenna_mode(ah, AR5K_ANTMODE_DEFAULT);
462 printk(KERN_INFO "ath5k debug: enable diversity\n"); 460 printk(KERN_INFO "ath5k debug: enable diversity\n");
463 } else if (strncmp(buf, "fixed-a", 7) == 0) { 461 } else if (strncmp(buf, "fixed-a", 7) == 0) {
464 ath5k_hw_set_antenna_mode(sc->ah, AR5K_ANTMODE_FIXED_A); 462 ath5k_hw_set_antenna_mode(ah, AR5K_ANTMODE_FIXED_A);
465 printk(KERN_INFO "ath5k debugfs: fixed antenna A\n"); 463 printk(KERN_INFO "ath5k debugfs: fixed antenna A\n");
466 } else if (strncmp(buf, "fixed-b", 7) == 0) { 464 } else if (strncmp(buf, "fixed-b", 7) == 0) {
467 ath5k_hw_set_antenna_mode(sc->ah, AR5K_ANTMODE_FIXED_B); 465 ath5k_hw_set_antenna_mode(ah, AR5K_ANTMODE_FIXED_B);
468 printk(KERN_INFO "ath5k debug: fixed antenna B\n"); 466 printk(KERN_INFO "ath5k debug: fixed antenna B\n");
469 } else if (strncmp(buf, "clear", 5) == 0) { 467 } else if (strncmp(buf, "clear", 5) == 0) {
470 for (i = 0; i < ARRAY_SIZE(sc->stats.antenna_rx); i++) { 468 for (i = 0; i < ARRAY_SIZE(ah->stats.antenna_rx); i++) {
471 sc->stats.antenna_rx[i] = 0; 469 ah->stats.antenna_rx[i] = 0;
472 sc->stats.antenna_tx[i] = 0; 470 ah->stats.antenna_tx[i] = 0;
473 } 471 }
474 printk(KERN_INFO "ath5k debug: cleared antenna stats\n"); 472 printk(KERN_INFO "ath5k debug: cleared antenna stats\n");
475 } 473 }
@@ -489,13 +487,13 @@ static const struct file_operations fops_antenna = {
489static ssize_t read_file_misc(struct file *file, char __user *user_buf, 487static ssize_t read_file_misc(struct file *file, char __user *user_buf,
490 size_t count, loff_t *ppos) 488 size_t count, loff_t *ppos)
491{ 489{
492 struct ath5k_softc *sc = file->private_data; 490 struct ath5k_hw *ah = file->private_data;
493 char buf[700]; 491 char buf[700];
494 unsigned int len = 0; 492 unsigned int len = 0;
495 u32 filt = ath5k_hw_get_rx_filter(sc->ah); 493 u32 filt = ath5k_hw_get_rx_filter(ah);
496 494
497 len += snprintf(buf + len, sizeof(buf) - len, "bssid-mask: %pM\n", 495 len += snprintf(buf + len, sizeof(buf) - len, "bssid-mask: %pM\n",
498 sc->bssidmask); 496 ah->bssidmask);
499 len += snprintf(buf + len, sizeof(buf) - len, "filter-flags: 0x%x ", 497 len += snprintf(buf + len, sizeof(buf) - len, "filter-flags: 0x%x ",
500 filt); 498 filt);
501 if (filt & AR5K_RX_FILTER_UCAST) 499 if (filt & AR5K_RX_FILTER_UCAST)
@@ -524,7 +522,7 @@ static ssize_t read_file_misc(struct file *file, char __user *user_buf,
524 len += snprintf(buf + len, sizeof(buf) - len, " RADARERR-5211"); 522 len += snprintf(buf + len, sizeof(buf) - len, " RADARERR-5211");
525 523
526 len += snprintf(buf + len, sizeof(buf) - len, "\nopmode: %s (%d)\n", 524 len += snprintf(buf + len, sizeof(buf) - len, "\nopmode: %s (%d)\n",
527 ath_opmode_to_string(sc->opmode), sc->opmode); 525 ath_opmode_to_string(ah->opmode), ah->opmode);
528 526
529 if (len > sizeof(buf)) 527 if (len > sizeof(buf))
530 len = sizeof(buf); 528 len = sizeof(buf);
@@ -544,8 +542,8 @@ static const struct file_operations fops_misc = {
544static ssize_t read_file_frameerrors(struct file *file, char __user *user_buf, 542static ssize_t read_file_frameerrors(struct file *file, char __user *user_buf,
545 size_t count, loff_t *ppos) 543 size_t count, loff_t *ppos)
546{ 544{
547 struct ath5k_softc *sc = file->private_data; 545 struct ath5k_hw *ah = file->private_data;
548 struct ath5k_statistics *st = &sc->stats; 546 struct ath5k_statistics *st = &ah->stats;
549 char buf[700]; 547 char buf[700];
550 unsigned int len = 0; 548 unsigned int len = 0;
551 int i; 549 int i;
@@ -621,8 +619,8 @@ static ssize_t write_file_frameerrors(struct file *file,
621 const char __user *userbuf, 619 const char __user *userbuf,
622 size_t count, loff_t *ppos) 620 size_t count, loff_t *ppos)
623{ 621{
624 struct ath5k_softc *sc = file->private_data; 622 struct ath5k_hw *ah = file->private_data;
625 struct ath5k_statistics *st = &sc->stats; 623 struct ath5k_statistics *st = &ah->stats;
626 char buf[20]; 624 char buf[20];
627 625
628 if (copy_from_user(buf, userbuf, min(count, sizeof(buf)))) 626 if (copy_from_user(buf, userbuf, min(count, sizeof(buf))))
@@ -660,16 +658,16 @@ static const struct file_operations fops_frameerrors = {
660static ssize_t read_file_ani(struct file *file, char __user *user_buf, 658static ssize_t read_file_ani(struct file *file, char __user *user_buf,
661 size_t count, loff_t *ppos) 659 size_t count, loff_t *ppos)
662{ 660{
663 struct ath5k_softc *sc = file->private_data; 661 struct ath5k_hw *ah = file->private_data;
664 struct ath5k_statistics *st = &sc->stats; 662 struct ath5k_statistics *st = &ah->stats;
665 struct ath5k_ani_state *as = &sc->ani_state; 663 struct ath5k_ani_state *as = &ah->ani_state;
666 664
667 char buf[700]; 665 char buf[700];
668 unsigned int len = 0; 666 unsigned int len = 0;
669 667
670 len += snprintf(buf + len, sizeof(buf) - len, 668 len += snprintf(buf + len, sizeof(buf) - len,
671 "HW has PHY error counters:\t%s\n", 669 "HW has PHY error counters:\t%s\n",
672 sc->ah->ah_capabilities.cap_has_phyerr_counters ? 670 ah->ah_capabilities.cap_has_phyerr_counters ?
673 "yes" : "no"); 671 "yes" : "no");
674 len += snprintf(buf + len, sizeof(buf) - len, 672 len += snprintf(buf + len, sizeof(buf) - len,
675 "HW max spur immunity level:\t%d\n", 673 "HW max spur immunity level:\t%d\n",
@@ -718,7 +716,7 @@ static ssize_t read_file_ani(struct file *file, char __user *user_buf,
718 st->mib_intr); 716 st->mib_intr);
719 len += snprintf(buf + len, sizeof(buf) - len, 717 len += snprintf(buf + len, sizeof(buf) - len,
720 "beacon RSSI average:\t%d\n", 718 "beacon RSSI average:\t%d\n",
721 (int)ewma_read(&sc->ah->ah_beacon_rssi_avg)); 719 (int)ewma_read(&ah->ah_beacon_rssi_avg));
722 720
723#define CC_PRINT(_struct, _field) \ 721#define CC_PRINT(_struct, _field) \
724 _struct._field, \ 722 _struct._field, \
@@ -750,14 +748,14 @@ static ssize_t read_file_ani(struct file *file, char __user *user_buf,
750 as->sum_cck_errors); 748 as->sum_cck_errors);
751 len += snprintf(buf + len, sizeof(buf) - len, 749 len += snprintf(buf + len, sizeof(buf) - len,
752 "AR5K_PHYERR_CNT1\t%x\t(=%d)\n", 750 "AR5K_PHYERR_CNT1\t%x\t(=%d)\n",
753 ath5k_hw_reg_read(sc->ah, AR5K_PHYERR_CNT1), 751 ath5k_hw_reg_read(ah, AR5K_PHYERR_CNT1),
754 ATH5K_ANI_OFDM_TRIG_HIGH - (ATH5K_PHYERR_CNT_MAX - 752 ATH5K_ANI_OFDM_TRIG_HIGH - (ATH5K_PHYERR_CNT_MAX -
755 ath5k_hw_reg_read(sc->ah, AR5K_PHYERR_CNT1))); 753 ath5k_hw_reg_read(ah, AR5K_PHYERR_CNT1)));
756 len += snprintf(buf + len, sizeof(buf) - len, 754 len += snprintf(buf + len, sizeof(buf) - len,
757 "AR5K_PHYERR_CNT2\t%x\t(=%d)\n", 755 "AR5K_PHYERR_CNT2\t%x\t(=%d)\n",
758 ath5k_hw_reg_read(sc->ah, AR5K_PHYERR_CNT2), 756 ath5k_hw_reg_read(ah, AR5K_PHYERR_CNT2),
759 ATH5K_ANI_CCK_TRIG_HIGH - (ATH5K_PHYERR_CNT_MAX - 757 ATH5K_ANI_CCK_TRIG_HIGH - (ATH5K_PHYERR_CNT_MAX -
760 ath5k_hw_reg_read(sc->ah, AR5K_PHYERR_CNT2))); 758 ath5k_hw_reg_read(ah, AR5K_PHYERR_CNT2)));
761 759
762 if (len > sizeof(buf)) 760 if (len > sizeof(buf))
763 len = sizeof(buf); 761 len = sizeof(buf);
@@ -769,42 +767,42 @@ static ssize_t write_file_ani(struct file *file,
769 const char __user *userbuf, 767 const char __user *userbuf,
770 size_t count, loff_t *ppos) 768 size_t count, loff_t *ppos)
771{ 769{
772 struct ath5k_softc *sc = file->private_data; 770 struct ath5k_hw *ah = file->private_data;
773 char buf[20]; 771 char buf[20];
774 772
775 if (copy_from_user(buf, userbuf, min(count, sizeof(buf)))) 773 if (copy_from_user(buf, userbuf, min(count, sizeof(buf))))
776 return -EFAULT; 774 return -EFAULT;
777 775
778 if (strncmp(buf, "sens-low", 8) == 0) { 776 if (strncmp(buf, "sens-low", 8) == 0) {
779 ath5k_ani_init(sc->ah, ATH5K_ANI_MODE_MANUAL_HIGH); 777 ath5k_ani_init(ah, ATH5K_ANI_MODE_MANUAL_HIGH);
780 } else if (strncmp(buf, "sens-high", 9) == 0) { 778 } else if (strncmp(buf, "sens-high", 9) == 0) {
781 ath5k_ani_init(sc->ah, ATH5K_ANI_MODE_MANUAL_LOW); 779 ath5k_ani_init(ah, ATH5K_ANI_MODE_MANUAL_LOW);
782 } else if (strncmp(buf, "ani-off", 7) == 0) { 780 } else if (strncmp(buf, "ani-off", 7) == 0) {
783 ath5k_ani_init(sc->ah, ATH5K_ANI_MODE_OFF); 781 ath5k_ani_init(ah, ATH5K_ANI_MODE_OFF);
784 } else if (strncmp(buf, "ani-on", 6) == 0) { 782 } else if (strncmp(buf, "ani-on", 6) == 0) {
785 ath5k_ani_init(sc->ah, ATH5K_ANI_MODE_AUTO); 783 ath5k_ani_init(ah, ATH5K_ANI_MODE_AUTO);
786 } else if (strncmp(buf, "noise-low", 9) == 0) { 784 } else if (strncmp(buf, "noise-low", 9) == 0) {
787 ath5k_ani_set_noise_immunity_level(sc->ah, 0); 785 ath5k_ani_set_noise_immunity_level(ah, 0);
788 } else if (strncmp(buf, "noise-high", 10) == 0) { 786 } else if (strncmp(buf, "noise-high", 10) == 0) {
789 ath5k_ani_set_noise_immunity_level(sc->ah, 787 ath5k_ani_set_noise_immunity_level(ah,
790 ATH5K_ANI_MAX_NOISE_IMM_LVL); 788 ATH5K_ANI_MAX_NOISE_IMM_LVL);
791 } else if (strncmp(buf, "spur-low", 8) == 0) { 789 } else if (strncmp(buf, "spur-low", 8) == 0) {
792 ath5k_ani_set_spur_immunity_level(sc->ah, 0); 790 ath5k_ani_set_spur_immunity_level(ah, 0);
793 } else if (strncmp(buf, "spur-high", 9) == 0) { 791 } else if (strncmp(buf, "spur-high", 9) == 0) {
794 ath5k_ani_set_spur_immunity_level(sc->ah, 792 ath5k_ani_set_spur_immunity_level(ah,
795 sc->ani_state.max_spur_level); 793 ah->ani_state.max_spur_level);
796 } else if (strncmp(buf, "fir-low", 7) == 0) { 794 } else if (strncmp(buf, "fir-low", 7) == 0) {
797 ath5k_ani_set_firstep_level(sc->ah, 0); 795 ath5k_ani_set_firstep_level(ah, 0);
798 } else if (strncmp(buf, "fir-high", 8) == 0) { 796 } else if (strncmp(buf, "fir-high", 8) == 0) {
799 ath5k_ani_set_firstep_level(sc->ah, ATH5K_ANI_MAX_FIRSTEP_LVL); 797 ath5k_ani_set_firstep_level(ah, ATH5K_ANI_MAX_FIRSTEP_LVL);
800 } else if (strncmp(buf, "ofdm-off", 8) == 0) { 798 } else if (strncmp(buf, "ofdm-off", 8) == 0) {
801 ath5k_ani_set_ofdm_weak_signal_detection(sc->ah, false); 799 ath5k_ani_set_ofdm_weak_signal_detection(ah, false);
802 } else if (strncmp(buf, "ofdm-on", 7) == 0) { 800 } else if (strncmp(buf, "ofdm-on", 7) == 0) {
803 ath5k_ani_set_ofdm_weak_signal_detection(sc->ah, true); 801 ath5k_ani_set_ofdm_weak_signal_detection(ah, true);
804 } else if (strncmp(buf, "cck-off", 7) == 0) { 802 } else if (strncmp(buf, "cck-off", 7) == 0) {
805 ath5k_ani_set_cck_weak_signal_detection(sc->ah, false); 803 ath5k_ani_set_cck_weak_signal_detection(ah, false);
806 } else if (strncmp(buf, "cck-on", 6) == 0) { 804 } else if (strncmp(buf, "cck-on", 6) == 0) {
807 ath5k_ani_set_cck_weak_signal_detection(sc->ah, true); 805 ath5k_ani_set_cck_weak_signal_detection(ah, true);
808 } 806 }
809 return count; 807 return count;
810} 808}
@@ -823,7 +821,7 @@ static const struct file_operations fops_ani = {
823static ssize_t read_file_queue(struct file *file, char __user *user_buf, 821static ssize_t read_file_queue(struct file *file, char __user *user_buf,
824 size_t count, loff_t *ppos) 822 size_t count, loff_t *ppos)
825{ 823{
826 struct ath5k_softc *sc = file->private_data; 824 struct ath5k_hw *ah = file->private_data;
827 char buf[700]; 825 char buf[700];
828 unsigned int len = 0; 826 unsigned int len = 0;
829 827
@@ -832,10 +830,10 @@ static ssize_t read_file_queue(struct file *file, char __user *user_buf,
832 int i, n; 830 int i, n;
833 831
834 len += snprintf(buf + len, sizeof(buf) - len, 832 len += snprintf(buf + len, sizeof(buf) - len,
835 "available txbuffers: %d\n", sc->txbuf_len); 833 "available txbuffers: %d\n", ah->txbuf_len);
836 834
837 for (i = 0; i < ARRAY_SIZE(sc->txqs); i++) { 835 for (i = 0; i < ARRAY_SIZE(ah->txqs); i++) {
838 txq = &sc->txqs[i]; 836 txq = &ah->txqs[i];
839 837
840 len += snprintf(buf + len, sizeof(buf) - len, 838 len += snprintf(buf + len, sizeof(buf) - len,
841 "%02d: %ssetup\n", i, txq->setup ? "" : "not "); 839 "%02d: %ssetup\n", i, txq->setup ? "" : "not ");
@@ -865,16 +863,16 @@ static ssize_t write_file_queue(struct file *file,
865 const char __user *userbuf, 863 const char __user *userbuf,
866 size_t count, loff_t *ppos) 864 size_t count, loff_t *ppos)
867{ 865{
868 struct ath5k_softc *sc = file->private_data; 866 struct ath5k_hw *ah = file->private_data;
869 char buf[20]; 867 char buf[20];
870 868
871 if (copy_from_user(buf, userbuf, min(count, sizeof(buf)))) 869 if (copy_from_user(buf, userbuf, min(count, sizeof(buf))))
872 return -EFAULT; 870 return -EFAULT;
873 871
874 if (strncmp(buf, "start", 5) == 0) 872 if (strncmp(buf, "start", 5) == 0)
875 ieee80211_wake_queues(sc->hw); 873 ieee80211_wake_queues(ah->hw);
876 else if (strncmp(buf, "stop", 4) == 0) 874 else if (strncmp(buf, "stop", 4) == 0)
877 ieee80211_stop_queues(sc->hw); 875 ieee80211_stop_queues(ah->hw);
878 876
879 return count; 877 return count;
880} 878}
@@ -890,57 +888,57 @@ static const struct file_operations fops_queue = {
890 888
891 889
892void 890void
893ath5k_debug_init_device(struct ath5k_softc *sc) 891ath5k_debug_init_device(struct ath5k_hw *ah)
894{ 892{
895 struct dentry *phydir; 893 struct dentry *phydir;
896 894
897 sc->debug.level = ath5k_debug; 895 ah->debug.level = ath5k_debug;
898 896
899 phydir = debugfs_create_dir("ath5k", sc->hw->wiphy->debugfsdir); 897 phydir = debugfs_create_dir("ath5k", ah->hw->wiphy->debugfsdir);
900 if (!phydir) 898 if (!phydir)
901 return; 899 return;
902 900
903 debugfs_create_file("debug", S_IWUSR | S_IRUSR, phydir, sc, 901 debugfs_create_file("debug", S_IWUSR | S_IRUSR, phydir, ah,
904 &fops_debug); 902 &fops_debug);
905 903
906 debugfs_create_file("registers", S_IRUSR, phydir, sc, &fops_registers); 904 debugfs_create_file("registers", S_IRUSR, phydir, ah, &fops_registers);
907 905
908 debugfs_create_file("beacon", S_IWUSR | S_IRUSR, phydir, sc, 906 debugfs_create_file("beacon", S_IWUSR | S_IRUSR, phydir, ah,
909 &fops_beacon); 907 &fops_beacon);
910 908
911 debugfs_create_file("reset", S_IWUSR, phydir, sc, &fops_reset); 909 debugfs_create_file("reset", S_IWUSR, phydir, ah, &fops_reset);
912 910
913 debugfs_create_file("antenna", S_IWUSR | S_IRUSR, phydir, sc, 911 debugfs_create_file("antenna", S_IWUSR | S_IRUSR, phydir, ah,
914 &fops_antenna); 912 &fops_antenna);
915 913
916 debugfs_create_file("misc", S_IRUSR, phydir, sc, &fops_misc); 914 debugfs_create_file("misc", S_IRUSR, phydir, ah, &fops_misc);
917 915
918 debugfs_create_file("frameerrors", S_IWUSR | S_IRUSR, phydir, sc, 916 debugfs_create_file("frameerrors", S_IWUSR | S_IRUSR, phydir, ah,
919 &fops_frameerrors); 917 &fops_frameerrors);
920 918
921 debugfs_create_file("ani", S_IWUSR | S_IRUSR, phydir, sc, &fops_ani); 919 debugfs_create_file("ani", S_IWUSR | S_IRUSR, phydir, ah, &fops_ani);
922 920
923 debugfs_create_file("queue", S_IWUSR | S_IRUSR, phydir, sc, 921 debugfs_create_file("queue", S_IWUSR | S_IRUSR, phydir, ah,
924 &fops_queue); 922 &fops_queue);
925 923
926 debugfs_create_bool("32khz_clock", S_IWUSR | S_IRUSR, phydir, 924 debugfs_create_bool("32khz_clock", S_IWUSR | S_IRUSR, phydir,
927 &sc->ah->ah_use_32khz_clock); 925 &ah->ah_use_32khz_clock);
928} 926}
929 927
930/* functions used in other places */ 928/* functions used in other places */
931 929
932void 930void
933ath5k_debug_dump_bands(struct ath5k_softc *sc) 931ath5k_debug_dump_bands(struct ath5k_hw *ah)
934{ 932{
935 unsigned int b, i; 933 unsigned int b, i;
936 934
937 if (likely(!(sc->debug.level & ATH5K_DEBUG_DUMPBANDS))) 935 if (likely(!(ah->debug.level & ATH5K_DEBUG_DUMPBANDS)))
938 return; 936 return;
939 937
940 BUG_ON(!sc->sbands); 938 BUG_ON(!ah->sbands);
941 939
942 for (b = 0; b < IEEE80211_NUM_BANDS; b++) { 940 for (b = 0; b < IEEE80211_NUM_BANDS; b++) {
943 struct ieee80211_supported_band *band = &sc->sbands[b]; 941 struct ieee80211_supported_band *band = &ah->sbands[b];
944 char bname[6]; 942 char bname[6];
945 switch (band->band) { 943 switch (band->band) {
946 case IEEE80211_BAND_2GHZ: 944 case IEEE80211_BAND_2GHZ:
@@ -990,41 +988,41 @@ ath5k_debug_printrxbuf(struct ath5k_buf *bf, int done,
990} 988}
991 989
992void 990void
993ath5k_debug_printrxbuffs(struct ath5k_softc *sc, struct ath5k_hw *ah) 991ath5k_debug_printrxbuffs(struct ath5k_hw *ah)
994{ 992{
995 struct ath5k_desc *ds; 993 struct ath5k_desc *ds;
996 struct ath5k_buf *bf; 994 struct ath5k_buf *bf;
997 struct ath5k_rx_status rs = {}; 995 struct ath5k_rx_status rs = {};
998 int status; 996 int status;
999 997
1000 if (likely(!(sc->debug.level & ATH5K_DEBUG_DESC))) 998 if (likely(!(ah->debug.level & ATH5K_DEBUG_DESC)))
1001 return; 999 return;
1002 1000
1003 printk(KERN_DEBUG "rxdp %x, rxlink %p\n", 1001 printk(KERN_DEBUG "rxdp %x, rxlink %p\n",
1004 ath5k_hw_get_rxdp(ah), sc->rxlink); 1002 ath5k_hw_get_rxdp(ah), ah->rxlink);
1005 1003
1006 spin_lock_bh(&sc->rxbuflock); 1004 spin_lock_bh(&ah->rxbuflock);
1007 list_for_each_entry(bf, &sc->rxbuf, list) { 1005 list_for_each_entry(bf, &ah->rxbuf, list) {
1008 ds = bf->desc; 1006 ds = bf->desc;
1009 status = ah->ah_proc_rx_desc(ah, ds, &rs); 1007 status = ah->ah_proc_rx_desc(ah, ds, &rs);
1010 if (!status) 1008 if (!status)
1011 ath5k_debug_printrxbuf(bf, status == 0, &rs); 1009 ath5k_debug_printrxbuf(bf, status == 0, &rs);
1012 } 1010 }
1013 spin_unlock_bh(&sc->rxbuflock); 1011 spin_unlock_bh(&ah->rxbuflock);
1014} 1012}
1015 1013
1016void 1014void
1017ath5k_debug_printtxbuf(struct ath5k_softc *sc, struct ath5k_buf *bf) 1015ath5k_debug_printtxbuf(struct ath5k_hw *ah, struct ath5k_buf *bf)
1018{ 1016{
1019 struct ath5k_desc *ds = bf->desc; 1017 struct ath5k_desc *ds = bf->desc;
1020 struct ath5k_hw_5212_tx_desc *td = &ds->ud.ds_tx5212; 1018 struct ath5k_hw_5212_tx_desc *td = &ds->ud.ds_tx5212;
1021 struct ath5k_tx_status ts = {}; 1019 struct ath5k_tx_status ts = {};
1022 int done; 1020 int done;
1023 1021
1024 if (likely(!(sc->debug.level & ATH5K_DEBUG_DESC))) 1022 if (likely(!(ah->debug.level & ATH5K_DEBUG_DESC)))
1025 return; 1023 return;
1026 1024
1027 done = sc->ah->ah_proc_tx_desc(sc->ah, bf->desc, &ts); 1025 done = ah->ah_proc_tx_desc(ah, bf->desc, &ts);
1028 1026
1029 printk(KERN_DEBUG "T (%p %llx) %08x %08x %08x %08x %08x %08x %08x " 1027 printk(KERN_DEBUG "T (%p %llx) %08x %08x %08x %08x %08x %08x %08x "
1030 "%08x %c\n", ds, (unsigned long long)bf->daddr, ds->ds_link, 1028 "%08x %c\n", ds, (unsigned long long)bf->daddr, ds->ds_link,
diff --git a/drivers/net/wireless/ath/ath5k/debug.h b/drivers/net/wireless/ath/ath5k/debug.h
index 193dd2d4ea3c..7f37df3125fd 100644
--- a/drivers/net/wireless/ath/ath5k/debug.h
+++ b/drivers/net/wireless/ath/ath5k/debug.h
@@ -61,7 +61,6 @@
61#ifndef _ATH5K_DEBUG_H 61#ifndef _ATH5K_DEBUG_H
62#define _ATH5K_DEBUG_H 62#define _ATH5K_DEBUG_H
63 63
64struct ath5k_softc;
65struct ath5k_hw; 64struct ath5k_hw;
66struct sk_buff; 65struct sk_buff;
67struct ath5k_buf; 66struct ath5k_buf;
@@ -127,39 +126,39 @@ enum ath5k_debug_level {
127 } while (0) 126 } while (0)
128 127
129void 128void
130ath5k_debug_init_device(struct ath5k_softc *sc); 129ath5k_debug_init_device(struct ath5k_hw *ah);
131 130
132void 131void
133ath5k_debug_printrxbuffs(struct ath5k_softc *sc, struct ath5k_hw *ah); 132ath5k_debug_printrxbuffs(struct ath5k_hw *ah);
134 133
135void 134void
136ath5k_debug_dump_bands(struct ath5k_softc *sc); 135ath5k_debug_dump_bands(struct ath5k_hw *ah);
137 136
138void 137void
139ath5k_debug_printtxbuf(struct ath5k_softc *sc, struct ath5k_buf *bf); 138ath5k_debug_printtxbuf(struct ath5k_hw *ah, struct ath5k_buf *bf);
140 139
141#else /* no debugging */ 140#else /* no debugging */
142 141
143#include <linux/compiler.h> 142#include <linux/compiler.h>
144 143
145static inline void __attribute__ ((format (printf, 3, 4))) 144static inline void __attribute__ ((format (printf, 3, 4)))
146ATH5K_DBG(struct ath5k_softc *sc, unsigned int m, const char *fmt, ...) {} 145ATH5K_DBG(struct ath5k_hw *ah, unsigned int m, const char *fmt, ...) {}
147 146
148static inline void __attribute__ ((format (printf, 3, 4))) 147static inline void __attribute__ ((format (printf, 3, 4)))
149ATH5K_DBG_UNLIMIT(struct ath5k_softc *sc, unsigned int m, const char *fmt, ...) 148ATH5K_DBG_UNLIMIT(struct ath5k_hw *ah, unsigned int m, const char *fmt, ...)
150{} 149{}
151 150
152static inline void 151static inline void
153ath5k_debug_init_device(struct ath5k_softc *sc) {} 152ath5k_debug_init_device(struct ath5k_hw *ah) {}
154 153
155static inline void 154static inline void
156ath5k_debug_printrxbuffs(struct ath5k_softc *sc, struct ath5k_hw *ah) {} 155ath5k_debug_printrxbuffs(struct ath5k_hw *ah) {}
157 156
158static inline void 157static inline void
159ath5k_debug_dump_bands(struct ath5k_softc *sc) {} 158ath5k_debug_dump_bands(struct ath5k_hw *ah) {}
160 159
161static inline void 160static inline void
162ath5k_debug_printtxbuf(struct ath5k_softc *sc, struct ath5k_buf *bf) {} 161ath5k_debug_printtxbuf(struct ath5k_hw *ah, struct ath5k_buf *bf) {}
163 162
164#endif /* ifdef CONFIG_ATH5K_DEBUG */ 163#endif /* ifdef CONFIG_ATH5K_DEBUG */
165 164
diff --git a/drivers/net/wireless/ath/ath5k/desc.c b/drivers/net/wireless/ath/ath5k/desc.c
index f82383b3ed30..846535f59efc 100644
--- a/drivers/net/wireless/ath/ath5k/desc.c
+++ b/drivers/net/wireless/ath/ath5k/desc.c
@@ -55,12 +55,12 @@ ath5k_hw_setup_2word_tx_desc(struct ath5k_hw *ah, struct ath5k_desc *desc,
55 * noise on the channel, so it is important to avoid this. 55 * noise on the channel, so it is important to avoid this.
56 */ 56 */
57 if (unlikely(tx_tries0 == 0)) { 57 if (unlikely(tx_tries0 == 0)) {
58 ATH5K_ERR(ah->ah_sc, "zero retries\n"); 58 ATH5K_ERR(ah, "zero retries\n");
59 WARN_ON(1); 59 WARN_ON(1);
60 return -EINVAL; 60 return -EINVAL;
61 } 61 }
62 if (unlikely(tx_rate0 == 0)) { 62 if (unlikely(tx_rate0 == 0)) {
63 ATH5K_ERR(ah->ah_sc, "zero rate\n"); 63 ATH5K_ERR(ah, "zero rate\n");
64 WARN_ON(1); 64 WARN_ON(1);
65 return -EINVAL; 65 return -EINVAL;
66 } 66 }
@@ -203,12 +203,12 @@ static int ath5k_hw_setup_4word_tx_desc(struct ath5k_hw *ah,
203 * noise on the channel, so it is important to avoid this. 203 * noise on the channel, so it is important to avoid this.
204 */ 204 */
205 if (unlikely(tx_tries0 == 0)) { 205 if (unlikely(tx_tries0 == 0)) {
206 ATH5K_ERR(ah->ah_sc, "zero retries\n"); 206 ATH5K_ERR(ah, "zero retries\n");
207 WARN_ON(1); 207 WARN_ON(1);
208 return -EINVAL; 208 return -EINVAL;
209 } 209 }
210 if (unlikely(tx_rate0 == 0)) { 210 if (unlikely(tx_rate0 == 0)) {
211 ATH5K_ERR(ah->ah_sc, "zero rate\n"); 211 ATH5K_ERR(ah, "zero rate\n");
212 WARN_ON(1); 212 WARN_ON(1);
213 return -EINVAL; 213 return -EINVAL;
214 } 214 }
@@ -316,7 +316,7 @@ ath5k_hw_setup_mrr_tx_desc(struct ath5k_hw *ah, struct ath5k_desc *desc,
316 if (unlikely((tx_rate1 == 0 && tx_tries1 != 0) || 316 if (unlikely((tx_rate1 == 0 && tx_tries1 != 0) ||
317 (tx_rate2 == 0 && tx_tries2 != 0) || 317 (tx_rate2 == 0 && tx_tries2 != 0) ||
318 (tx_rate3 == 0 && tx_tries3 != 0))) { 318 (tx_rate3 == 0 && tx_tries3 != 0))) {
319 ATH5K_ERR(ah->ah_sc, "zero rate\n"); 319 ATH5K_ERR(ah, "zero rate\n");
320 WARN_ON(1); 320 WARN_ON(1);
321 return -EINVAL; 321 return -EINVAL;
322 } 322 }
diff --git a/drivers/net/wireless/ath/ath5k/dma.c b/drivers/net/wireless/ath/ath5k/dma.c
index b788ecfbdaf6..0d5d4033f12a 100644
--- a/drivers/net/wireless/ath/ath5k/dma.c
+++ b/drivers/net/wireless/ath/ath5k/dma.c
@@ -73,7 +73,7 @@ static int ath5k_hw_stop_rx_dma(struct ath5k_hw *ah)
73 udelay(100); 73 udelay(100);
74 74
75 if (!i) 75 if (!i)
76 ATH5K_DBG(ah->ah_sc, ATH5K_DEBUG_DMA, 76 ATH5K_DBG(ah, ATH5K_DEBUG_DMA,
77 "failed to stop RX DMA !\n"); 77 "failed to stop RX DMA !\n");
78 78
79 return i ? 0 : -EBUSY; 79 return i ? 0 : -EBUSY;
@@ -100,7 +100,7 @@ u32 ath5k_hw_get_rxdp(struct ath5k_hw *ah)
100int ath5k_hw_set_rxdp(struct ath5k_hw *ah, u32 phys_addr) 100int ath5k_hw_set_rxdp(struct ath5k_hw *ah, u32 phys_addr)
101{ 101{
102 if (ath5k_hw_reg_read(ah, AR5K_CR) & AR5K_CR_RXE) { 102 if (ath5k_hw_reg_read(ah, AR5K_CR) & AR5K_CR_RXE) {
103 ATH5K_DBG(ah->ah_sc, ATH5K_DEBUG_DMA, 103 ATH5K_DBG(ah, ATH5K_DEBUG_DMA,
104 "tried to set RXDP while rx was active !\n"); 104 "tried to set RXDP while rx was active !\n");
105 return -EIO; 105 return -EIO;
106 } 106 }
@@ -243,7 +243,7 @@ static int ath5k_hw_stop_tx_dma(struct ath5k_hw *ah, unsigned int queue)
243 udelay(100); 243 udelay(100);
244 244
245 if (AR5K_REG_READ_Q(ah, AR5K_QCU_TXE, queue)) 245 if (AR5K_REG_READ_Q(ah, AR5K_QCU_TXE, queue))
246 ATH5K_DBG(ah->ah_sc, ATH5K_DEBUG_DMA, 246 ATH5K_DBG(ah, ATH5K_DEBUG_DMA,
247 "queue %i didn't stop !\n", queue); 247 "queue %i didn't stop !\n", queue);
248 248
249 /* Check for pending frames */ 249 /* Check for pending frames */
@@ -295,7 +295,7 @@ static int ath5k_hw_stop_tx_dma(struct ath5k_hw *ah, unsigned int queue)
295 AR5K_DIAG_SW_CHANNEL_IDLE_HIGH); 295 AR5K_DIAG_SW_CHANNEL_IDLE_HIGH);
296 296
297 if (pending) 297 if (pending)
298 ATH5K_DBG(ah->ah_sc, ATH5K_DEBUG_DMA, 298 ATH5K_DBG(ah, ATH5K_DEBUG_DMA,
299 "quiet mechanism didn't work q:%i !\n", 299 "quiet mechanism didn't work q:%i !\n",
300 queue); 300 queue);
301 } 301 }
@@ -309,7 +309,7 @@ static int ath5k_hw_stop_tx_dma(struct ath5k_hw *ah, unsigned int queue)
309 /* Clear register */ 309 /* Clear register */
310 ath5k_hw_reg_write(ah, 0, AR5K_QCU_TXD); 310 ath5k_hw_reg_write(ah, 0, AR5K_QCU_TXD);
311 if (pending) { 311 if (pending) {
312 ATH5K_DBG(ah->ah_sc, ATH5K_DEBUG_DMA, 312 ATH5K_DBG(ah, ATH5K_DEBUG_DMA,
313 "tx dma didn't stop (q:%i, frm:%i) !\n", 313 "tx dma didn't stop (q:%i, frm:%i) !\n",
314 queue, pending); 314 queue, pending);
315 return -EBUSY; 315 return -EBUSY;
@@ -333,7 +333,7 @@ int ath5k_hw_stop_beacon_queue(struct ath5k_hw *ah, unsigned int queue)
333 int ret; 333 int ret;
334 ret = ath5k_hw_stop_tx_dma(ah, queue); 334 ret = ath5k_hw_stop_tx_dma(ah, queue);
335 if (ret) { 335 if (ret) {
336 ATH5K_DBG(ah->ah_sc, ATH5K_DEBUG_DMA, 336 ATH5K_DBG(ah, ATH5K_DEBUG_DMA,
337 "beacon queue didn't stop !\n"); 337 "beacon queue didn't stop !\n");
338 return -EIO; 338 return -EIO;
339 } 339 }
diff --git a/drivers/net/wireless/ath/ath5k/eeprom.c b/drivers/net/wireless/ath/ath5k/eeprom.c
index d9e605e37007..9068b9165265 100644
--- a/drivers/net/wireless/ath/ath5k/eeprom.c
+++ b/drivers/net/wireless/ath/ath5k/eeprom.c
@@ -105,7 +105,7 @@ ath5k_eeprom_init_header(struct ath5k_hw *ah)
105 * big still, waiting on a better value. 105 * big still, waiting on a better value.
106 */ 106 */
107 if (eep_max > (3 * AR5K_EEPROM_INFO_MAX)) { 107 if (eep_max > (3 * AR5K_EEPROM_INFO_MAX)) {
108 ATH5K_ERR(ah->ah_sc, "Invalid max custom EEPROM size: " 108 ATH5K_ERR(ah, "Invalid max custom EEPROM size: "
109 "%d (0x%04x) max expected: %d (0x%04x)\n", 109 "%d (0x%04x) max expected: %d (0x%04x)\n",
110 eep_max, eep_max, 110 eep_max, eep_max,
111 3 * AR5K_EEPROM_INFO_MAX, 111 3 * AR5K_EEPROM_INFO_MAX,
@@ -119,7 +119,7 @@ ath5k_eeprom_init_header(struct ath5k_hw *ah)
119 cksum ^= val; 119 cksum ^= val;
120 } 120 }
121 if (cksum != AR5K_EEPROM_INFO_CKSUM) { 121 if (cksum != AR5K_EEPROM_INFO_CKSUM) {
122 ATH5K_ERR(ah->ah_sc, "Invalid EEPROM " 122 ATH5K_ERR(ah, "Invalid EEPROM "
123 "checksum: 0x%04x eep_max: 0x%04x (%s)\n", 123 "checksum: 0x%04x eep_max: 0x%04x (%s)\n",
124 cksum, eep_max, 124 cksum, eep_max,
125 eep_max == AR5K_EEPROM_INFO_MAX ? 125 eep_max == AR5K_EEPROM_INFO_MAX ?
diff --git a/drivers/net/wireless/ath/ath5k/initvals.c b/drivers/net/wireless/ath/ath5k/initvals.c
index 855d1af3e710..5ab607f40e0e 100644
--- a/drivers/net/wireless/ath/ath5k/initvals.c
+++ b/drivers/net/wireless/ath/ath5k/initvals.c
@@ -1542,7 +1542,7 @@ int ath5k_hw_write_initvals(struct ath5k_hw *ah, u8 mode, bool skip_pcu)
1542 1542
1543 /* AR5K_MODE_11B */ 1543 /* AR5K_MODE_11B */
1544 if (mode > 2) { 1544 if (mode > 2) {
1545 ATH5K_ERR(ah->ah_sc, 1545 ATH5K_ERR(ah,
1546 "unsupported channel mode: %d\n", mode); 1546 "unsupported channel mode: %d\n", mode);
1547 return -EINVAL; 1547 return -EINVAL;
1548 } 1548 }
diff --git a/drivers/net/wireless/ath/ath5k/led.c b/drivers/net/wireless/ath/ath5k/led.c
index 127bfbd35172..8c17a00f7dad 100644
--- a/drivers/net/wireless/ath/ath5k/led.c
+++ b/drivers/net/wireless/ath/ath5k/led.c
@@ -86,26 +86,26 @@ static DEFINE_PCI_DEVICE_TABLE(ath5k_led_devices) = {
86 { } 86 { }
87}; 87};
88 88
89void ath5k_led_enable(struct ath5k_softc *sc) 89void ath5k_led_enable(struct ath5k_hw *ah)
90{ 90{
91 if (test_bit(ATH_STAT_LEDSOFT, sc->status)) { 91 if (test_bit(ATH_STAT_LEDSOFT, ah->status)) {
92 ath5k_hw_set_gpio_output(sc->ah, sc->led_pin); 92 ath5k_hw_set_gpio_output(ah, ah->led_pin);
93 ath5k_led_off(sc); 93 ath5k_led_off(ah);
94 } 94 }
95} 95}
96 96
97static void ath5k_led_on(struct ath5k_softc *sc) 97static void ath5k_led_on(struct ath5k_hw *ah)
98{ 98{
99 if (!test_bit(ATH_STAT_LEDSOFT, sc->status)) 99 if (!test_bit(ATH_STAT_LEDSOFT, ah->status))
100 return; 100 return;
101 ath5k_hw_set_gpio(sc->ah, sc->led_pin, sc->led_on); 101 ath5k_hw_set_gpio(ah, ah->led_pin, ah->led_on);
102} 102}
103 103
104void ath5k_led_off(struct ath5k_softc *sc) 104void ath5k_led_off(struct ath5k_hw *ah)
105{ 105{
106 if (!test_bit(ATH_STAT_LEDSOFT, sc->status)) 106 if (!test_bit(ATH_STAT_LEDSOFT, ah->status))
107 return; 107 return;
108 ath5k_hw_set_gpio(sc->ah, sc->led_pin, !sc->led_on); 108 ath5k_hw_set_gpio(ah, ah->led_pin, !ah->led_on);
109} 109}
110 110
111static void 111static void
@@ -116,27 +116,27 @@ ath5k_led_brightness_set(struct led_classdev *led_dev,
116 led_dev); 116 led_dev);
117 117
118 if (brightness == LED_OFF) 118 if (brightness == LED_OFF)
119 ath5k_led_off(led->sc); 119 ath5k_led_off(led->ah);
120 else 120 else
121 ath5k_led_on(led->sc); 121 ath5k_led_on(led->ah);
122} 122}
123 123
124static int 124static int
125ath5k_register_led(struct ath5k_softc *sc, struct ath5k_led *led, 125ath5k_register_led(struct ath5k_hw *ah, struct ath5k_led *led,
126 const char *name, char *trigger) 126 const char *name, char *trigger)
127{ 127{
128 int err; 128 int err;
129 129
130 led->sc = sc; 130 led->ah = ah;
131 strncpy(led->name, name, sizeof(led->name)); 131 strncpy(led->name, name, sizeof(led->name));
132 led->led_dev.name = led->name; 132 led->led_dev.name = led->name;
133 led->led_dev.default_trigger = trigger; 133 led->led_dev.default_trigger = trigger;
134 led->led_dev.brightness_set = ath5k_led_brightness_set; 134 led->led_dev.brightness_set = ath5k_led_brightness_set;
135 135
136 err = led_classdev_register(sc->dev, &led->led_dev); 136 err = led_classdev_register(ah->dev, &led->led_dev);
137 if (err) { 137 if (err) {
138 ATH5K_WARN(sc, "could not register LED %s\n", name); 138 ATH5K_WARN(ah, "could not register LED %s\n", name);
139 led->sc = NULL; 139 led->ah = NULL;
140 } 140 }
141 return err; 141 return err;
142} 142}
@@ -144,30 +144,30 @@ ath5k_register_led(struct ath5k_softc *sc, struct ath5k_led *led,
144static void 144static void
145ath5k_unregister_led(struct ath5k_led *led) 145ath5k_unregister_led(struct ath5k_led *led)
146{ 146{
147 if (!led->sc) 147 if (!led->ah)
148 return; 148 return;
149 led_classdev_unregister(&led->led_dev); 149 led_classdev_unregister(&led->led_dev);
150 ath5k_led_off(led->sc); 150 ath5k_led_off(led->ah);
151 led->sc = NULL; 151 led->ah = NULL;
152} 152}
153 153
154void ath5k_unregister_leds(struct ath5k_softc *sc) 154void ath5k_unregister_leds(struct ath5k_hw *ah)
155{ 155{
156 ath5k_unregister_led(&sc->rx_led); 156 ath5k_unregister_led(&ah->rx_led);
157 ath5k_unregister_led(&sc->tx_led); 157 ath5k_unregister_led(&ah->tx_led);
158} 158}
159 159
160int __devinit ath5k_init_leds(struct ath5k_softc *sc) 160int __devinit ath5k_init_leds(struct ath5k_hw *ah)
161{ 161{
162 int ret = 0; 162 int ret = 0;
163 struct ieee80211_hw *hw = sc->hw; 163 struct ieee80211_hw *hw = ah->hw;
164#ifndef CONFIG_ATHEROS_AR231X 164#ifndef CONFIG_ATHEROS_AR231X
165 struct pci_dev *pdev = sc->pdev; 165 struct pci_dev *pdev = ah->pdev;
166#endif 166#endif
167 char name[ATH5K_LED_MAX_NAME_LEN + 1]; 167 char name[ATH5K_LED_MAX_NAME_LEN + 1];
168 const struct pci_device_id *match; 168 const struct pci_device_id *match;
169 169
170 if (!sc->pdev) 170 if (!ah->pdev)
171 return 0; 171 return 0;
172 172
173#ifdef CONFIG_ATHEROS_AR231X 173#ifdef CONFIG_ATHEROS_AR231X
@@ -176,24 +176,24 @@ int __devinit ath5k_init_leds(struct ath5k_softc *sc)
176 match = pci_match_id(&ath5k_led_devices[0], pdev); 176 match = pci_match_id(&ath5k_led_devices[0], pdev);
177#endif 177#endif
178 if (match) { 178 if (match) {
179 __set_bit(ATH_STAT_LEDSOFT, sc->status); 179 __set_bit(ATH_STAT_LEDSOFT, ah->status);
180 sc->led_pin = ATH_PIN(match->driver_data); 180 ah->led_pin = ATH_PIN(match->driver_data);
181 sc->led_on = ATH_POLARITY(match->driver_data); 181 ah->led_on = ATH_POLARITY(match->driver_data);
182 } 182 }
183 183
184 if (!test_bit(ATH_STAT_LEDSOFT, sc->status)) 184 if (!test_bit(ATH_STAT_LEDSOFT, ah->status))
185 goto out; 185 goto out;
186 186
187 ath5k_led_enable(sc); 187 ath5k_led_enable(ah);
188 188
189 snprintf(name, sizeof(name), "ath5k-%s::rx", wiphy_name(hw->wiphy)); 189 snprintf(name, sizeof(name), "ath5k-%s::rx", wiphy_name(hw->wiphy));
190 ret = ath5k_register_led(sc, &sc->rx_led, name, 190 ret = ath5k_register_led(ah, &ah->rx_led, name,
191 ieee80211_get_rx_led_name(hw)); 191 ieee80211_get_rx_led_name(hw));
192 if (ret) 192 if (ret)
193 goto out; 193 goto out;
194 194
195 snprintf(name, sizeof(name), "ath5k-%s::tx", wiphy_name(hw->wiphy)); 195 snprintf(name, sizeof(name), "ath5k-%s::tx", wiphy_name(hw->wiphy));
196 ret = ath5k_register_led(sc, &sc->tx_led, name, 196 ret = ath5k_register_led(ah, &ah->tx_led, name,
197 ieee80211_get_tx_led_name(hw)); 197 ieee80211_get_tx_led_name(hw));
198out: 198out:
199 return ret; 199 return ret;
diff --git a/drivers/net/wireless/ath/ath5k/mac80211-ops.c b/drivers/net/wireless/ath/ath5k/mac80211-ops.c
index 0d5ab3428be5..2a715ca0c5e4 100644
--- a/drivers/net/wireless/ath/ath5k/mac80211-ops.c
+++ b/drivers/net/wireless/ath/ath5k/mac80211-ops.c
@@ -53,44 +53,30 @@
53static void 53static void
54ath5k_tx(struct ieee80211_hw *hw, struct sk_buff *skb) 54ath5k_tx(struct ieee80211_hw *hw, struct sk_buff *skb)
55{ 55{
56 struct ath5k_softc *sc = hw->priv; 56 struct ath5k_hw *ah = hw->priv;
57 u16 qnum = skb_get_queue_mapping(skb); 57 u16 qnum = skb_get_queue_mapping(skb);
58 58
59 if (WARN_ON(qnum >= sc->ah->ah_capabilities.cap_queues.q_tx_num)) { 59 if (WARN_ON(qnum >= ah->ah_capabilities.cap_queues.q_tx_num)) {
60 dev_kfree_skb_any(skb); 60 dev_kfree_skb_any(skb);
61 return; 61 return;
62 } 62 }
63 63
64 ath5k_tx_queue(hw, skb, &sc->txqs[qnum]); 64 ath5k_tx_queue(hw, skb, &ah->txqs[qnum]);
65}
66
67
68static int
69ath5k_start(struct ieee80211_hw *hw)
70{
71 return ath5k_init_hw(hw->priv);
72}
73
74
75static void
76ath5k_stop(struct ieee80211_hw *hw)
77{
78 ath5k_stop_hw(hw->priv);
79} 65}
80 66
81 67
82static int 68static int
83ath5k_add_interface(struct ieee80211_hw *hw, struct ieee80211_vif *vif) 69ath5k_add_interface(struct ieee80211_hw *hw, struct ieee80211_vif *vif)
84{ 70{
85 struct ath5k_softc *sc = hw->priv; 71 struct ath5k_hw *ah = hw->priv;
86 int ret; 72 int ret;
87 struct ath5k_vif *avf = (void *)vif->drv_priv; 73 struct ath5k_vif *avf = (void *)vif->drv_priv;
88 74
89 mutex_lock(&sc->lock); 75 mutex_lock(&ah->lock);
90 76
91 if ((vif->type == NL80211_IFTYPE_AP || 77 if ((vif->type == NL80211_IFTYPE_AP ||
92 vif->type == NL80211_IFTYPE_ADHOC) 78 vif->type == NL80211_IFTYPE_ADHOC)
93 && (sc->num_ap_vifs + sc->num_adhoc_vifs) >= ATH_BCBUF) { 79 && (ah->num_ap_vifs + ah->num_adhoc_vifs) >= ATH_BCBUF) {
94 ret = -ELNRNG; 80 ret = -ELNRNG;
95 goto end; 81 goto end;
96 } 82 }
@@ -100,9 +86,9 @@ ath5k_add_interface(struct ieee80211_hw *hw, struct ieee80211_vif *vif)
100 * We would need to operate the HW in ad-hoc mode to allow TSF updates 86 * We would need to operate the HW in ad-hoc mode to allow TSF updates
101 * for the IBSS, but this breaks with additional AP or STA interfaces 87 * for the IBSS, but this breaks with additional AP or STA interfaces
102 * at the moment. */ 88 * at the moment. */
103 if (sc->num_adhoc_vifs || 89 if (ah->num_adhoc_vifs ||
104 (sc->nvifs && vif->type == NL80211_IFTYPE_ADHOC)) { 90 (ah->nvifs && vif->type == NL80211_IFTYPE_ADHOC)) {
105 ATH5K_ERR(sc, "Only one single ad-hoc interface is allowed.\n"); 91 ATH5K_ERR(ah, "Only one single ad-hoc interface is allowed.\n");
106 ret = -ELNRNG; 92 ret = -ELNRNG;
107 goto end; 93 goto end;
108 } 94 }
@@ -119,8 +105,8 @@ ath5k_add_interface(struct ieee80211_hw *hw, struct ieee80211_vif *vif)
119 goto end; 105 goto end;
120 } 106 }
121 107
122 sc->nvifs++; 108 ah->nvifs++;
123 ATH5K_DBG(sc, ATH5K_DEBUG_MODE, "add interface mode %d\n", avf->opmode); 109 ATH5K_DBG(ah, ATH5K_DEBUG_MODE, "add interface mode %d\n", avf->opmode);
124 110
125 /* Assign the vap/adhoc to a beacon xmit slot. */ 111 /* Assign the vap/adhoc to a beacon xmit slot. */
126 if ((avf->opmode == NL80211_IFTYPE_AP) || 112 if ((avf->opmode == NL80211_IFTYPE_AP) ||
@@ -128,38 +114,38 @@ ath5k_add_interface(struct ieee80211_hw *hw, struct ieee80211_vif *vif)
128 (avf->opmode == NL80211_IFTYPE_MESH_POINT)) { 114 (avf->opmode == NL80211_IFTYPE_MESH_POINT)) {
129 int slot; 115 int slot;
130 116
131 WARN_ON(list_empty(&sc->bcbuf)); 117 WARN_ON(list_empty(&ah->bcbuf));
132 avf->bbuf = list_first_entry(&sc->bcbuf, struct ath5k_buf, 118 avf->bbuf = list_first_entry(&ah->bcbuf, struct ath5k_buf,
133 list); 119 list);
134 list_del(&avf->bbuf->list); 120 list_del(&avf->bbuf->list);
135 121
136 avf->bslot = 0; 122 avf->bslot = 0;
137 for (slot = 0; slot < ATH_BCBUF; slot++) { 123 for (slot = 0; slot < ATH_BCBUF; slot++) {
138 if (!sc->bslot[slot]) { 124 if (!ah->bslot[slot]) {
139 avf->bslot = slot; 125 avf->bslot = slot;
140 break; 126 break;
141 } 127 }
142 } 128 }
143 BUG_ON(sc->bslot[avf->bslot] != NULL); 129 BUG_ON(ah->bslot[avf->bslot] != NULL);
144 sc->bslot[avf->bslot] = vif; 130 ah->bslot[avf->bslot] = vif;
145 if (avf->opmode == NL80211_IFTYPE_AP) 131 if (avf->opmode == NL80211_IFTYPE_AP)
146 sc->num_ap_vifs++; 132 ah->num_ap_vifs++;
147 else if (avf->opmode == NL80211_IFTYPE_ADHOC) 133 else if (avf->opmode == NL80211_IFTYPE_ADHOC)
148 sc->num_adhoc_vifs++; 134 ah->num_adhoc_vifs++;
149 } 135 }
150 136
151 /* Any MAC address is fine, all others are included through the 137 /* Any MAC address is fine, all others are included through the
152 * filter. 138 * filter.
153 */ 139 */
154 memcpy(&sc->lladdr, vif->addr, ETH_ALEN); 140 memcpy(&ah->lladdr, vif->addr, ETH_ALEN);
155 ath5k_hw_set_lladdr(sc->ah, vif->addr); 141 ath5k_hw_set_lladdr(ah, vif->addr);
156 142
157 memcpy(&avf->lladdr, vif->addr, ETH_ALEN); 143 memcpy(&avf->lladdr, vif->addr, ETH_ALEN);
158 144
159 ath5k_update_bssid_mask_and_opmode(sc, vif); 145 ath5k_update_bssid_mask_and_opmode(ah, vif);
160 ret = 0; 146 ret = 0;
161end: 147end:
162 mutex_unlock(&sc->lock); 148 mutex_unlock(&ah->lock);
163 return ret; 149 return ret;
164} 150}
165 151
@@ -168,31 +154,31 @@ static void
168ath5k_remove_interface(struct ieee80211_hw *hw, 154ath5k_remove_interface(struct ieee80211_hw *hw,
169 struct ieee80211_vif *vif) 155 struct ieee80211_vif *vif)
170{ 156{
171 struct ath5k_softc *sc = hw->priv; 157 struct ath5k_hw *ah = hw->priv;
172 struct ath5k_vif *avf = (void *)vif->drv_priv; 158 struct ath5k_vif *avf = (void *)vif->drv_priv;
173 unsigned int i; 159 unsigned int i;
174 160
175 mutex_lock(&sc->lock); 161 mutex_lock(&ah->lock);
176 sc->nvifs--; 162 ah->nvifs--;
177 163
178 if (avf->bbuf) { 164 if (avf->bbuf) {
179 ath5k_txbuf_free_skb(sc, avf->bbuf); 165 ath5k_txbuf_free_skb(ah, avf->bbuf);
180 list_add_tail(&avf->bbuf->list, &sc->bcbuf); 166 list_add_tail(&avf->bbuf->list, &ah->bcbuf);
181 for (i = 0; i < ATH_BCBUF; i++) { 167 for (i = 0; i < ATH_BCBUF; i++) {
182 if (sc->bslot[i] == vif) { 168 if (ah->bslot[i] == vif) {
183 sc->bslot[i] = NULL; 169 ah->bslot[i] = NULL;
184 break; 170 break;
185 } 171 }
186 } 172 }
187 avf->bbuf = NULL; 173 avf->bbuf = NULL;
188 } 174 }
189 if (avf->opmode == NL80211_IFTYPE_AP) 175 if (avf->opmode == NL80211_IFTYPE_AP)
190 sc->num_ap_vifs--; 176 ah->num_ap_vifs--;
191 else if (avf->opmode == NL80211_IFTYPE_ADHOC) 177 else if (avf->opmode == NL80211_IFTYPE_ADHOC)
192 sc->num_adhoc_vifs--; 178 ah->num_adhoc_vifs--;
193 179
194 ath5k_update_bssid_mask_and_opmode(sc, NULL); 180 ath5k_update_bssid_mask_and_opmode(ah, NULL);
195 mutex_unlock(&sc->lock); 181 mutex_unlock(&ah->lock);
196} 182}
197 183
198 184
@@ -202,23 +188,22 @@ ath5k_remove_interface(struct ieee80211_hw *hw,
202static int 188static int
203ath5k_config(struct ieee80211_hw *hw, u32 changed) 189ath5k_config(struct ieee80211_hw *hw, u32 changed)
204{ 190{
205 struct ath5k_softc *sc = hw->priv; 191 struct ath5k_hw *ah = hw->priv;
206 struct ath5k_hw *ah = sc->ah;
207 struct ieee80211_conf *conf = &hw->conf; 192 struct ieee80211_conf *conf = &hw->conf;
208 int ret = 0; 193 int ret = 0;
209 int i; 194 int i;
210 195
211 mutex_lock(&sc->lock); 196 mutex_lock(&ah->lock);
212 197
213 if (changed & IEEE80211_CONF_CHANGE_CHANNEL) { 198 if (changed & IEEE80211_CONF_CHANGE_CHANNEL) {
214 ret = ath5k_chan_set(sc, conf->channel); 199 ret = ath5k_chan_set(ah, conf->channel);
215 if (ret < 0) 200 if (ret < 0)
216 goto unlock; 201 goto unlock;
217 } 202 }
218 203
219 if ((changed & IEEE80211_CONF_CHANGE_POWER) && 204 if ((changed & IEEE80211_CONF_CHANGE_POWER) &&
220 (sc->power_level != conf->power_level)) { 205 (ah->power_level != conf->power_level)) {
221 sc->power_level = conf->power_level; 206 ah->power_level = conf->power_level;
222 207
223 /* Half dB steps */ 208 /* Half dB steps */
224 ath5k_hw_set_txpower_limit(ah, (conf->power_level * 2)); 209 ath5k_hw_set_txpower_limit(ah, (conf->power_level * 2));
@@ -252,7 +237,7 @@ ath5k_config(struct ieee80211_hw *hw, u32 changed)
252 ath5k_hw_set_antenna_mode(ah, ah->ah_ant_mode); 237 ath5k_hw_set_antenna_mode(ah, ah->ah_ant_mode);
253 238
254unlock: 239unlock:
255 mutex_unlock(&sc->lock); 240 mutex_unlock(&ah->lock);
256 return ret; 241 return ret;
257} 242}
258 243
@@ -262,12 +247,11 @@ ath5k_bss_info_changed(struct ieee80211_hw *hw, struct ieee80211_vif *vif,
262 struct ieee80211_bss_conf *bss_conf, u32 changes) 247 struct ieee80211_bss_conf *bss_conf, u32 changes)
263{ 248{
264 struct ath5k_vif *avf = (void *)vif->drv_priv; 249 struct ath5k_vif *avf = (void *)vif->drv_priv;
265 struct ath5k_softc *sc = hw->priv; 250 struct ath5k_hw *ah = hw->priv;
266 struct ath5k_hw *ah = sc->ah;
267 struct ath_common *common = ath5k_hw_common(ah); 251 struct ath_common *common = ath5k_hw_common(ah);
268 unsigned long flags; 252 unsigned long flags;
269 253
270 mutex_lock(&sc->lock); 254 mutex_lock(&ah->lock);
271 255
272 if (changes & BSS_CHANGED_BSSID) { 256 if (changes & BSS_CHANGED_BSSID) {
273 /* Cache for later use during resets */ 257 /* Cache for later use during resets */
@@ -278,7 +262,7 @@ ath5k_bss_info_changed(struct ieee80211_hw *hw, struct ieee80211_vif *vif,
278 } 262 }
279 263
280 if (changes & BSS_CHANGED_BEACON_INT) 264 if (changes & BSS_CHANGED_BEACON_INT)
281 sc->bintval = bss_conf->beacon_int; 265 ah->bintval = bss_conf->beacon_int;
282 266
283 if (changes & BSS_CHANGED_ERP_SLOT) { 267 if (changes & BSS_CHANGED_ERP_SLOT) {
284 int slot_time; 268 int slot_time;
@@ -292,16 +276,16 @@ ath5k_bss_info_changed(struct ieee80211_hw *hw, struct ieee80211_vif *vif,
292 if (changes & BSS_CHANGED_ASSOC) { 276 if (changes & BSS_CHANGED_ASSOC) {
293 avf->assoc = bss_conf->assoc; 277 avf->assoc = bss_conf->assoc;
294 if (bss_conf->assoc) 278 if (bss_conf->assoc)
295 sc->assoc = bss_conf->assoc; 279 ah->assoc = bss_conf->assoc;
296 else 280 else
297 sc->assoc = ath5k_any_vif_assoc(sc); 281 ah->assoc = ath5k_any_vif_assoc(ah);
298 282
299 if (sc->opmode == NL80211_IFTYPE_STATION) 283 if (ah->opmode == NL80211_IFTYPE_STATION)
300 ath5k_set_beacon_filter(hw, sc->assoc); 284 ath5k_set_beacon_filter(hw, ah->assoc);
301 ath5k_hw_set_ledstate(sc->ah, sc->assoc ? 285 ath5k_hw_set_ledstate(ah, ah->assoc ?
302 AR5K_LED_ASSOC : AR5K_LED_INIT); 286 AR5K_LED_ASSOC : AR5K_LED_INIT);
303 if (bss_conf->assoc) { 287 if (bss_conf->assoc) {
304 ATH5K_DBG(sc, ATH5K_DEBUG_ANY, 288 ATH5K_DBG(ah, ATH5K_DEBUG_ANY,
305 "Bss Info ASSOC %d, bssid: %pM\n", 289 "Bss Info ASSOC %d, bssid: %pM\n",
306 bss_conf->aid, common->curbssid); 290 bss_conf->aid, common->curbssid);
307 common->curaid = bss_conf->aid; 291 common->curaid = bss_conf->aid;
@@ -311,19 +295,19 @@ ath5k_bss_info_changed(struct ieee80211_hw *hw, struct ieee80211_vif *vif,
311 } 295 }
312 296
313 if (changes & BSS_CHANGED_BEACON) { 297 if (changes & BSS_CHANGED_BEACON) {
314 spin_lock_irqsave(&sc->block, flags); 298 spin_lock_irqsave(&ah->block, flags);
315 ath5k_beacon_update(hw, vif); 299 ath5k_beacon_update(hw, vif);
316 spin_unlock_irqrestore(&sc->block, flags); 300 spin_unlock_irqrestore(&ah->block, flags);
317 } 301 }
318 302
319 if (changes & BSS_CHANGED_BEACON_ENABLED) 303 if (changes & BSS_CHANGED_BEACON_ENABLED)
320 sc->enable_beacon = bss_conf->enable_beacon; 304 ah->enable_beacon = bss_conf->enable_beacon;
321 305
322 if (changes & (BSS_CHANGED_BEACON | BSS_CHANGED_BEACON_ENABLED | 306 if (changes & (BSS_CHANGED_BEACON | BSS_CHANGED_BEACON_ENABLED |
323 BSS_CHANGED_BEACON_INT)) 307 BSS_CHANGED_BEACON_INT))
324 ath5k_beacon_config(sc); 308 ath5k_beacon_config(ah);
325 309
326 mutex_unlock(&sc->lock); 310 mutex_unlock(&ah->lock);
327} 311}
328 312
329 313
@@ -384,12 +368,11 @@ ath5k_configure_filter(struct ieee80211_hw *hw, unsigned int changed_flags,
384 FIF_PLCPFAIL | FIF_CONTROL | FIF_OTHER_BSS | \ 368 FIF_PLCPFAIL | FIF_CONTROL | FIF_OTHER_BSS | \
385 FIF_BCN_PRBRESP_PROMISC) 369 FIF_BCN_PRBRESP_PROMISC)
386 370
387 struct ath5k_softc *sc = hw->priv; 371 struct ath5k_hw *ah = hw->priv;
388 struct ath5k_hw *ah = sc->ah;
389 u32 mfilt[2], rfilt; 372 u32 mfilt[2], rfilt;
390 struct ath5k_vif_iter_data iter_data; /* to count STA interfaces */ 373 struct ath5k_vif_iter_data iter_data; /* to count STA interfaces */
391 374
392 mutex_lock(&sc->lock); 375 mutex_lock(&ah->lock);
393 376
394 mfilt[0] = multicast; 377 mfilt[0] = multicast;
395 mfilt[1] = multicast >> 32; 378 mfilt[1] = multicast >> 32;
@@ -407,12 +390,12 @@ ath5k_configure_filter(struct ieee80211_hw *hw, unsigned int changed_flags,
407 390
408 if (changed_flags & (FIF_PROMISC_IN_BSS | FIF_OTHER_BSS)) { 391 if (changed_flags & (FIF_PROMISC_IN_BSS | FIF_OTHER_BSS)) {
409 if (*new_flags & FIF_PROMISC_IN_BSS) 392 if (*new_flags & FIF_PROMISC_IN_BSS)
410 __set_bit(ATH_STAT_PROMISC, sc->status); 393 __set_bit(ATH_STAT_PROMISC, ah->status);
411 else 394 else
412 __clear_bit(ATH_STAT_PROMISC, sc->status); 395 __clear_bit(ATH_STAT_PROMISC, ah->status);
413 } 396 }
414 397
415 if (test_bit(ATH_STAT_PROMISC, sc->status)) 398 if (test_bit(ATH_STAT_PROMISC, ah->status))
416 rfilt |= AR5K_RX_FILTER_PROM; 399 rfilt |= AR5K_RX_FILTER_PROM;
417 400
418 /* Note, AR5K_RX_FILTER_MCAST is already enabled */ 401 /* Note, AR5K_RX_FILTER_MCAST is already enabled */
@@ -427,7 +410,7 @@ ath5k_configure_filter(struct ieee80211_hw *hw, unsigned int changed_flags,
427 410
428 /* FIF_BCN_PRBRESP_PROMISC really means to enable beacons 411 /* FIF_BCN_PRBRESP_PROMISC really means to enable beacons
429 * and probes for any BSSID */ 412 * and probes for any BSSID */
430 if ((*new_flags & FIF_BCN_PRBRESP_PROMISC) || (sc->nvifs > 1)) 413 if ((*new_flags & FIF_BCN_PRBRESP_PROMISC) || (ah->nvifs > 1))
431 rfilt |= AR5K_RX_FILTER_BEACON; 414 rfilt |= AR5K_RX_FILTER_BEACON;
432 415
433 /* FIF_CONTROL doc says that if FIF_PROMISC_IN_BSS is not 416 /* FIF_CONTROL doc says that if FIF_PROMISC_IN_BSS is not
@@ -442,7 +425,7 @@ ath5k_configure_filter(struct ieee80211_hw *hw, unsigned int changed_flags,
442 425
443 /* XXX move these to mac80211, and add a beacon IFF flag to mac80211 */ 426 /* XXX move these to mac80211, and add a beacon IFF flag to mac80211 */
444 427
445 switch (sc->opmode) { 428 switch (ah->opmode) {
446 case NL80211_IFTYPE_MESH_POINT: 429 case NL80211_IFTYPE_MESH_POINT:
447 rfilt |= AR5K_RX_FILTER_CONTROL | 430 rfilt |= AR5K_RX_FILTER_CONTROL |
448 AR5K_RX_FILTER_BEACON | 431 AR5K_RX_FILTER_BEACON |
@@ -455,7 +438,7 @@ ath5k_configure_filter(struct ieee80211_hw *hw, unsigned int changed_flags,
455 AR5K_RX_FILTER_BEACON; 438 AR5K_RX_FILTER_BEACON;
456 break; 439 break;
457 case NL80211_IFTYPE_STATION: 440 case NL80211_IFTYPE_STATION:
458 if (sc->assoc) 441 if (ah->assoc)
459 rfilt |= AR5K_RX_FILTER_BEACON; 442 rfilt |= AR5K_RX_FILTER_BEACON;
460 default: 443 default:
461 break; 444 break;
@@ -464,7 +447,7 @@ ath5k_configure_filter(struct ieee80211_hw *hw, unsigned int changed_flags,
464 iter_data.hw_macaddr = NULL; 447 iter_data.hw_macaddr = NULL;
465 iter_data.n_stas = 0; 448 iter_data.n_stas = 0;
466 iter_data.need_set_hw_addr = false; 449 iter_data.need_set_hw_addr = false;
467 ieee80211_iterate_active_interfaces_atomic(sc->hw, ath5k_vif_iter, 450 ieee80211_iterate_active_interfaces_atomic(ah->hw, ath5k_vif_iter,
468 &iter_data); 451 &iter_data);
469 452
470 /* Set up RX Filter */ 453 /* Set up RX Filter */
@@ -483,9 +466,9 @@ ath5k_configure_filter(struct ieee80211_hw *hw, unsigned int changed_flags,
483 ath5k_hw_set_mcast_filter(ah, mfilt[0], mfilt[1]); 466 ath5k_hw_set_mcast_filter(ah, mfilt[0], mfilt[1]);
484 /* Set the cached hw filter flags, this will later actually 467 /* Set the cached hw filter flags, this will later actually
485 * be set in HW */ 468 * be set in HW */
486 sc->filter_flags = rfilt; 469 ah->filter_flags = rfilt;
487 470
488 mutex_unlock(&sc->lock); 471 mutex_unlock(&ah->lock);
489} 472}
490 473
491 474
@@ -494,8 +477,7 @@ ath5k_set_key(struct ieee80211_hw *hw, enum set_key_cmd cmd,
494 struct ieee80211_vif *vif, struct ieee80211_sta *sta, 477 struct ieee80211_vif *vif, struct ieee80211_sta *sta,
495 struct ieee80211_key_conf *key) 478 struct ieee80211_key_conf *key)
496{ 479{
497 struct ath5k_softc *sc = hw->priv; 480 struct ath5k_hw *ah = hw->priv;
498 struct ath5k_hw *ah = sc->ah;
499 struct ath_common *common = ath5k_hw_common(ah); 481 struct ath_common *common = ath5k_hw_common(ah);
500 int ret = 0; 482 int ret = 0;
501 483
@@ -516,7 +498,7 @@ ath5k_set_key(struct ieee80211_hw *hw, enum set_key_cmd cmd,
516 return -EINVAL; 498 return -EINVAL;
517 } 499 }
518 500
519 mutex_lock(&sc->lock); 501 mutex_lock(&ah->lock);
520 502
521 switch (cmd) { 503 switch (cmd) {
522 case SET_KEY: 504 case SET_KEY:
@@ -540,7 +522,7 @@ ath5k_set_key(struct ieee80211_hw *hw, enum set_key_cmd cmd,
540 } 522 }
541 523
542 mmiowb(); 524 mmiowb();
543 mutex_unlock(&sc->lock); 525 mutex_unlock(&ah->lock);
544 return ret; 526 return ret;
545} 527}
546 528
@@ -548,17 +530,17 @@ ath5k_set_key(struct ieee80211_hw *hw, enum set_key_cmd cmd,
548static void 530static void
549ath5k_sw_scan_start(struct ieee80211_hw *hw) 531ath5k_sw_scan_start(struct ieee80211_hw *hw)
550{ 532{
551 struct ath5k_softc *sc = hw->priv; 533 struct ath5k_hw *ah = hw->priv;
552 if (!sc->assoc) 534 if (!ah->assoc)
553 ath5k_hw_set_ledstate(sc->ah, AR5K_LED_SCAN); 535 ath5k_hw_set_ledstate(ah, AR5K_LED_SCAN);
554} 536}
555 537
556 538
557static void 539static void
558ath5k_sw_scan_complete(struct ieee80211_hw *hw) 540ath5k_sw_scan_complete(struct ieee80211_hw *hw)
559{ 541{
560 struct ath5k_softc *sc = hw->priv; 542 struct ath5k_hw *ah = hw->priv;
561 ath5k_hw_set_ledstate(sc->ah, sc->assoc ? 543 ath5k_hw_set_ledstate(ah, ah->assoc ?
562 AR5K_LED_ASSOC : AR5K_LED_INIT); 544 AR5K_LED_ASSOC : AR5K_LED_INIT);
563} 545}
564 546
@@ -567,15 +549,15 @@ static int
567ath5k_get_stats(struct ieee80211_hw *hw, 549ath5k_get_stats(struct ieee80211_hw *hw,
568 struct ieee80211_low_level_stats *stats) 550 struct ieee80211_low_level_stats *stats)
569{ 551{
570 struct ath5k_softc *sc = hw->priv; 552 struct ath5k_hw *ah = hw->priv;
571 553
572 /* Force update */ 554 /* Force update */
573 ath5k_hw_update_mib_counters(sc->ah); 555 ath5k_hw_update_mib_counters(ah);
574 556
575 stats->dot11ACKFailureCount = sc->stats.ack_fail; 557 stats->dot11ACKFailureCount = ah->stats.ack_fail;
576 stats->dot11RTSFailureCount = sc->stats.rts_fail; 558 stats->dot11RTSFailureCount = ah->stats.rts_fail;
577 stats->dot11RTSSuccessCount = sc->stats.rts_ok; 559 stats->dot11RTSSuccessCount = ah->stats.rts_ok;
578 stats->dot11FCSErrorCount = sc->stats.fcs_error; 560 stats->dot11FCSErrorCount = ah->stats.fcs_error;
579 561
580 return 0; 562 return 0;
581} 563}
@@ -585,15 +567,14 @@ static int
585ath5k_conf_tx(struct ieee80211_hw *hw, u16 queue, 567ath5k_conf_tx(struct ieee80211_hw *hw, u16 queue,
586 const struct ieee80211_tx_queue_params *params) 568 const struct ieee80211_tx_queue_params *params)
587{ 569{
588 struct ath5k_softc *sc = hw->priv; 570 struct ath5k_hw *ah = hw->priv;
589 struct ath5k_hw *ah = sc->ah;
590 struct ath5k_txq_info qi; 571 struct ath5k_txq_info qi;
591 int ret = 0; 572 int ret = 0;
592 573
593 if (queue >= ah->ah_capabilities.cap_queues.q_tx_num) 574 if (queue >= ah->ah_capabilities.cap_queues.q_tx_num)
594 return 0; 575 return 0;
595 576
596 mutex_lock(&sc->lock); 577 mutex_lock(&ah->lock);
597 578
598 ath5k_hw_get_tx_queueprops(ah, queue, &qi); 579 ath5k_hw_get_tx_queueprops(ah, queue, &qi);
599 580
@@ -602,20 +583,20 @@ ath5k_conf_tx(struct ieee80211_hw *hw, u16 queue,
602 qi.tqi_cw_max = params->cw_max; 583 qi.tqi_cw_max = params->cw_max;
603 qi.tqi_burst_time = params->txop; 584 qi.tqi_burst_time = params->txop;
604 585
605 ATH5K_DBG(sc, ATH5K_DEBUG_ANY, 586 ATH5K_DBG(ah, ATH5K_DEBUG_ANY,
606 "Configure tx [queue %d], " 587 "Configure tx [queue %d], "
607 "aifs: %d, cw_min: %d, cw_max: %d, txop: %d\n", 588 "aifs: %d, cw_min: %d, cw_max: %d, txop: %d\n",
608 queue, params->aifs, params->cw_min, 589 queue, params->aifs, params->cw_min,
609 params->cw_max, params->txop); 590 params->cw_max, params->txop);
610 591
611 if (ath5k_hw_set_tx_queueprops(ah, queue, &qi)) { 592 if (ath5k_hw_set_tx_queueprops(ah, queue, &qi)) {
612 ATH5K_ERR(sc, 593 ATH5K_ERR(ah,
613 "Unable to update hardware queue %u!\n", queue); 594 "Unable to update hardware queue %u!\n", queue);
614 ret = -EIO; 595 ret = -EIO;
615 } else 596 } else
616 ath5k_hw_reset_tx_queue(ah, queue); 597 ath5k_hw_reset_tx_queue(ah, queue);
617 598
618 mutex_unlock(&sc->lock); 599 mutex_unlock(&ah->lock);
619 600
620 return ret; 601 return ret;
621} 602}
@@ -624,43 +605,43 @@ ath5k_conf_tx(struct ieee80211_hw *hw, u16 queue,
624static u64 605static u64
625ath5k_get_tsf(struct ieee80211_hw *hw) 606ath5k_get_tsf(struct ieee80211_hw *hw)
626{ 607{
627 struct ath5k_softc *sc = hw->priv; 608 struct ath5k_hw *ah = hw->priv;
628 609
629 return ath5k_hw_get_tsf64(sc->ah); 610 return ath5k_hw_get_tsf64(ah);
630} 611}
631 612
632 613
633static void 614static void
634ath5k_set_tsf(struct ieee80211_hw *hw, u64 tsf) 615ath5k_set_tsf(struct ieee80211_hw *hw, u64 tsf)
635{ 616{
636 struct ath5k_softc *sc = hw->priv; 617 struct ath5k_hw *ah = hw->priv;
637 618
638 ath5k_hw_set_tsf64(sc->ah, tsf); 619 ath5k_hw_set_tsf64(ah, tsf);
639} 620}
640 621
641 622
642static void 623static void
643ath5k_reset_tsf(struct ieee80211_hw *hw) 624ath5k_reset_tsf(struct ieee80211_hw *hw)
644{ 625{
645 struct ath5k_softc *sc = hw->priv; 626 struct ath5k_hw *ah = hw->priv;
646 627
647 /* 628 /*
648 * in IBSS mode we need to update the beacon timers too. 629 * in IBSS mode we need to update the beacon timers too.
649 * this will also reset the TSF if we call it with 0 630 * this will also reset the TSF if we call it with 0
650 */ 631 */
651 if (sc->opmode == NL80211_IFTYPE_ADHOC) 632 if (ah->opmode == NL80211_IFTYPE_ADHOC)
652 ath5k_beacon_update_timers(sc, 0); 633 ath5k_beacon_update_timers(ah, 0);
653 else 634 else
654 ath5k_hw_reset_tsf(sc->ah); 635 ath5k_hw_reset_tsf(ah);
655} 636}
656 637
657 638
658static int 639static int
659ath5k_get_survey(struct ieee80211_hw *hw, int idx, struct survey_info *survey) 640ath5k_get_survey(struct ieee80211_hw *hw, int idx, struct survey_info *survey)
660{ 641{
661 struct ath5k_softc *sc = hw->priv; 642 struct ath5k_hw *ah = hw->priv;
662 struct ieee80211_conf *conf = &hw->conf; 643 struct ieee80211_conf *conf = &hw->conf;
663 struct ath_common *common = ath5k_hw_common(sc->ah); 644 struct ath_common *common = ath5k_hw_common(ah);
664 struct ath_cycle_counters *cc = &common->cc_survey; 645 struct ath_cycle_counters *cc = &common->cc_survey;
665 unsigned int div = common->clockrate * 1000; 646 unsigned int div = common->clockrate * 1000;
666 647
@@ -670,18 +651,18 @@ ath5k_get_survey(struct ieee80211_hw *hw, int idx, struct survey_info *survey)
670 spin_lock_bh(&common->cc_lock); 651 spin_lock_bh(&common->cc_lock);
671 ath_hw_cycle_counters_update(common); 652 ath_hw_cycle_counters_update(common);
672 if (cc->cycles > 0) { 653 if (cc->cycles > 0) {
673 sc->survey.channel_time += cc->cycles / div; 654 ah->survey.channel_time += cc->cycles / div;
674 sc->survey.channel_time_busy += cc->rx_busy / div; 655 ah->survey.channel_time_busy += cc->rx_busy / div;
675 sc->survey.channel_time_rx += cc->rx_frame / div; 656 ah->survey.channel_time_rx += cc->rx_frame / div;
676 sc->survey.channel_time_tx += cc->tx_frame / div; 657 ah->survey.channel_time_tx += cc->tx_frame / div;
677 } 658 }
678 memset(cc, 0, sizeof(*cc)); 659 memset(cc, 0, sizeof(*cc));
679 spin_unlock_bh(&common->cc_lock); 660 spin_unlock_bh(&common->cc_lock);
680 661
681 memcpy(survey, &sc->survey, sizeof(*survey)); 662 memcpy(survey, &ah->survey, sizeof(*survey));
682 663
683 survey->channel = conf->channel; 664 survey->channel = conf->channel;
684 survey->noise = sc->ah->ah_noise_floor; 665 survey->noise = ah->ah_noise_floor;
685 survey->filled = SURVEY_INFO_NOISE_DBM | 666 survey->filled = SURVEY_INFO_NOISE_DBM |
686 SURVEY_INFO_CHANNEL_TIME | 667 SURVEY_INFO_CHANNEL_TIME |
687 SURVEY_INFO_CHANNEL_TIME_BUSY | 668 SURVEY_INFO_CHANNEL_TIME_BUSY |
@@ -705,25 +686,25 @@ ath5k_get_survey(struct ieee80211_hw *hw, int idx, struct survey_info *survey)
705static void 686static void
706ath5k_set_coverage_class(struct ieee80211_hw *hw, u8 coverage_class) 687ath5k_set_coverage_class(struct ieee80211_hw *hw, u8 coverage_class)
707{ 688{
708 struct ath5k_softc *sc = hw->priv; 689 struct ath5k_hw *ah = hw->priv;
709 690
710 mutex_lock(&sc->lock); 691 mutex_lock(&ah->lock);
711 ath5k_hw_set_coverage_class(sc->ah, coverage_class); 692 ath5k_hw_set_coverage_class(ah, coverage_class);
712 mutex_unlock(&sc->lock); 693 mutex_unlock(&ah->lock);
713} 694}
714 695
715 696
716static int 697static int
717ath5k_set_antenna(struct ieee80211_hw *hw, u32 tx_ant, u32 rx_ant) 698ath5k_set_antenna(struct ieee80211_hw *hw, u32 tx_ant, u32 rx_ant)
718{ 699{
719 struct ath5k_softc *sc = hw->priv; 700 struct ath5k_hw *ah = hw->priv;
720 701
721 if (tx_ant == 1 && rx_ant == 1) 702 if (tx_ant == 1 && rx_ant == 1)
722 ath5k_hw_set_antenna_mode(sc->ah, AR5K_ANTMODE_FIXED_A); 703 ath5k_hw_set_antenna_mode(ah, AR5K_ANTMODE_FIXED_A);
723 else if (tx_ant == 2 && rx_ant == 2) 704 else if (tx_ant == 2 && rx_ant == 2)
724 ath5k_hw_set_antenna_mode(sc->ah, AR5K_ANTMODE_FIXED_B); 705 ath5k_hw_set_antenna_mode(ah, AR5K_ANTMODE_FIXED_B);
725 else if ((tx_ant & 3) == 3 && (rx_ant & 3) == 3) 706 else if ((tx_ant & 3) == 3 && (rx_ant & 3) == 3)
726 ath5k_hw_set_antenna_mode(sc->ah, AR5K_ANTMODE_DEFAULT); 707 ath5k_hw_set_antenna_mode(ah, AR5K_ANTMODE_DEFAULT);
727 else 708 else
728 return -EINVAL; 709 return -EINVAL;
729 return 0; 710 return 0;
@@ -733,9 +714,9 @@ ath5k_set_antenna(struct ieee80211_hw *hw, u32 tx_ant, u32 rx_ant)
733static int 714static int
734ath5k_get_antenna(struct ieee80211_hw *hw, u32 *tx_ant, u32 *rx_ant) 715ath5k_get_antenna(struct ieee80211_hw *hw, u32 *tx_ant, u32 *rx_ant)
735{ 716{
736 struct ath5k_softc *sc = hw->priv; 717 struct ath5k_hw *ah = hw->priv;
737 718
738 switch (sc->ah->ah_ant_mode) { 719 switch (ah->ah_ant_mode) {
739 case AR5K_ANTMODE_FIXED_A: 720 case AR5K_ANTMODE_FIXED_A:
740 *tx_ant = 1; *rx_ant = 1; break; 721 *tx_ant = 1; *rx_ant = 1; break;
741 case AR5K_ANTMODE_FIXED_B: 722 case AR5K_ANTMODE_FIXED_B:
@@ -750,9 +731,9 @@ ath5k_get_antenna(struct ieee80211_hw *hw, u32 *tx_ant, u32 *rx_ant)
750static void ath5k_get_ringparam(struct ieee80211_hw *hw, 731static void ath5k_get_ringparam(struct ieee80211_hw *hw,
751 u32 *tx, u32 *tx_max, u32 *rx, u32 *rx_max) 732 u32 *tx, u32 *tx_max, u32 *rx, u32 *rx_max)
752{ 733{
753 struct ath5k_softc *sc = hw->priv; 734 struct ath5k_hw *ah = hw->priv;
754 735
755 *tx = sc->txqs[AR5K_TX_QUEUE_ID_DATA_MIN].txq_max; 736 *tx = ah->txqs[AR5K_TX_QUEUE_ID_DATA_MIN].txq_max;
756 737
757 *tx_max = ATH5K_TXQ_LEN_MAX; 738 *tx_max = ATH5K_TXQ_LEN_MAX;
758 *rx = *rx_max = ATH_RXBUF; 739 *rx = *rx_max = ATH_RXBUF;
@@ -761,7 +742,7 @@ static void ath5k_get_ringparam(struct ieee80211_hw *hw,
761 742
762static int ath5k_set_ringparam(struct ieee80211_hw *hw, u32 tx, u32 rx) 743static int ath5k_set_ringparam(struct ieee80211_hw *hw, u32 tx, u32 rx)
763{ 744{
764 struct ath5k_softc *sc = hw->priv; 745 struct ath5k_hw *ah = hw->priv;
765 u16 qnum; 746 u16 qnum;
766 747
767 /* only support setting tx ring size for now */ 748 /* only support setting tx ring size for now */
@@ -772,16 +753,16 @@ static int ath5k_set_ringparam(struct ieee80211_hw *hw, u32 tx, u32 rx)
772 if (!tx || tx > ATH5K_TXQ_LEN_MAX) 753 if (!tx || tx > ATH5K_TXQ_LEN_MAX)
773 return -EINVAL; 754 return -EINVAL;
774 755
775 for (qnum = 0; qnum < ARRAY_SIZE(sc->txqs); qnum++) { 756 for (qnum = 0; qnum < ARRAY_SIZE(ah->txqs); qnum++) {
776 if (!sc->txqs[qnum].setup) 757 if (!ah->txqs[qnum].setup)
777 continue; 758 continue;
778 if (sc->txqs[qnum].qnum < AR5K_TX_QUEUE_ID_DATA_MIN || 759 if (ah->txqs[qnum].qnum < AR5K_TX_QUEUE_ID_DATA_MIN ||
779 sc->txqs[qnum].qnum > AR5K_TX_QUEUE_ID_DATA_MAX) 760 ah->txqs[qnum].qnum > AR5K_TX_QUEUE_ID_DATA_MAX)
780 continue; 761 continue;
781 762
782 sc->txqs[qnum].txq_max = tx; 763 ah->txqs[qnum].txq_max = tx;
783 if (sc->txqs[qnum].txq_len >= sc->txqs[qnum].txq_max) 764 if (ah->txqs[qnum].txq_len >= ah->txqs[qnum].txq_max)
784 ieee80211_stop_queue(hw, sc->txqs[qnum].qnum); 765 ieee80211_stop_queue(hw, ah->txqs[qnum].qnum);
785 } 766 }
786 767
787 return 0; 768 return 0;
diff --git a/drivers/net/wireless/ath/ath5k/pci.c b/drivers/net/wireless/ath/ath5k/pci.c
index aac5b7831948..eaf79b49341e 100644
--- a/drivers/net/wireless/ath/ath5k/pci.c
+++ b/drivers/net/wireless/ath/ath5k/pci.c
@@ -51,10 +51,10 @@ MODULE_DEVICE_TABLE(pci, ath5k_pci_id_table);
51/* return bus cachesize in 4B word units */ 51/* return bus cachesize in 4B word units */
52static void ath5k_pci_read_cachesize(struct ath_common *common, int *csz) 52static void ath5k_pci_read_cachesize(struct ath_common *common, int *csz)
53{ 53{
54 struct ath5k_softc *sc = (struct ath5k_softc *) common->priv; 54 struct ath5k_hw *ah = (struct ath5k_hw *) common->priv;
55 u8 u8tmp; 55 u8 u8tmp;
56 56
57 pci_read_config_byte(sc->pdev, PCI_CACHE_LINE_SIZE, &u8tmp); 57 pci_read_config_byte(ah->pdev, PCI_CACHE_LINE_SIZE, &u8tmp);
58 *csz = (int)u8tmp; 58 *csz = (int)u8tmp;
59 59
60 /* 60 /*
@@ -156,7 +156,7 @@ ath5k_pci_probe(struct pci_dev *pdev,
156 const struct pci_device_id *id) 156 const struct pci_device_id *id)
157{ 157{
158 void __iomem *mem; 158 void __iomem *mem;
159 struct ath5k_softc *sc; 159 struct ath5k_hw *ah;
160 struct ieee80211_hw *hw; 160 struct ieee80211_hw *hw;
161 int ret; 161 int ret;
162 u8 csz; 162 u8 csz;
@@ -243,7 +243,7 @@ ath5k_pci_probe(struct pci_dev *pdev,
243 * Allocate hw (mac80211 main struct) 243 * Allocate hw (mac80211 main struct)
244 * and hw->priv (driver private data) 244 * and hw->priv (driver private data)
245 */ 245 */
246 hw = ieee80211_alloc_hw(sizeof(*sc), &ath5k_hw_ops); 246 hw = ieee80211_alloc_hw(sizeof(*ah), &ath5k_hw_ops);
247 if (hw == NULL) { 247 if (hw == NULL) {
248 dev_err(&pdev->dev, "cannot allocate ieee80211_hw\n"); 248 dev_err(&pdev->dev, "cannot allocate ieee80211_hw\n");
249 ret = -ENOMEM; 249 ret = -ENOMEM;
@@ -252,16 +252,16 @@ ath5k_pci_probe(struct pci_dev *pdev,
252 252
253 dev_info(&pdev->dev, "registered as '%s'\n", wiphy_name(hw->wiphy)); 253 dev_info(&pdev->dev, "registered as '%s'\n", wiphy_name(hw->wiphy));
254 254
255 sc = hw->priv; 255 ah = hw->priv;
256 sc->hw = hw; 256 ah->hw = hw;
257 sc->pdev = pdev; 257 ah->pdev = pdev;
258 sc->dev = &pdev->dev; 258 ah->dev = &pdev->dev;
259 sc->irq = pdev->irq; 259 ah->irq = pdev->irq;
260 sc->devid = id->device; 260 ah->devid = id->device;
261 sc->iobase = mem; /* So we can unmap it on detach */ 261 ah->iobase = mem; /* So we can unmap it on detach */
262 262
263 /* Initialize */ 263 /* Initialize */
264 ret = ath5k_init_softc(sc, &ath_pci_bus_ops); 264 ret = ath5k_init_softc(ah, &ath_pci_bus_ops);
265 if (ret) 265 if (ret)
266 goto err_free; 266 goto err_free;
267 267
@@ -285,10 +285,10 @@ static void __devexit
285ath5k_pci_remove(struct pci_dev *pdev) 285ath5k_pci_remove(struct pci_dev *pdev)
286{ 286{
287 struct ieee80211_hw *hw = pci_get_drvdata(pdev); 287 struct ieee80211_hw *hw = pci_get_drvdata(pdev);
288 struct ath5k_softc *sc = hw->priv; 288 struct ath5k_hw *ah = hw->priv;
289 289
290 ath5k_deinit_softc(sc); 290 ath5k_deinit_softc(ah);
291 pci_iounmap(pdev, sc->iobase); 291 pci_iounmap(pdev, ah->iobase);
292 pci_release_region(pdev, 0); 292 pci_release_region(pdev, 0);
293 pci_disable_device(pdev); 293 pci_disable_device(pdev);
294 ieee80211_free_hw(hw); 294 ieee80211_free_hw(hw);
@@ -299,9 +299,9 @@ static int ath5k_pci_suspend(struct device *dev)
299{ 299{
300 struct pci_dev *pdev = to_pci_dev(dev); 300 struct pci_dev *pdev = to_pci_dev(dev);
301 struct ieee80211_hw *hw = pci_get_drvdata(pdev); 301 struct ieee80211_hw *hw = pci_get_drvdata(pdev);
302 struct ath5k_softc *sc = hw->priv; 302 struct ath5k_hw *ah = hw->priv;
303 303
304 ath5k_led_off(sc); 304 ath5k_led_off(ah);
305 return 0; 305 return 0;
306} 306}
307 307
@@ -309,7 +309,7 @@ static int ath5k_pci_resume(struct device *dev)
309{ 309{
310 struct pci_dev *pdev = to_pci_dev(dev); 310 struct pci_dev *pdev = to_pci_dev(dev);
311 struct ieee80211_hw *hw = pci_get_drvdata(pdev); 311 struct ieee80211_hw *hw = pci_get_drvdata(pdev);
312 struct ath5k_softc *sc = hw->priv; 312 struct ath5k_hw *ah = hw->priv;
313 313
314 /* 314 /*
315 * Suspend/Resume resets the PCI configuration space, so we have to 315 * Suspend/Resume resets the PCI configuration space, so we have to
@@ -318,7 +318,7 @@ static int ath5k_pci_resume(struct device *dev)
318 */ 318 */
319 pci_write_config_byte(pdev, 0x41, 0); 319 pci_write_config_byte(pdev, 0x41, 0);
320 320
321 ath5k_led_enable(sc); 321 ath5k_led_enable(ah);
322 return 0; 322 return 0;
323} 323}
324 324
diff --git a/drivers/net/wireless/ath/ath5k/pcu.c b/drivers/net/wireless/ath/ath5k/pcu.c
index 618ee54d5fe5..067313845060 100644
--- a/drivers/net/wireless/ath/ath5k/pcu.c
+++ b/drivers/net/wireless/ath/ath5k/pcu.c
@@ -77,14 +77,13 @@ static const unsigned int ack_rates_high[] =
77int ath5k_hw_get_frame_duration(struct ath5k_hw *ah, 77int ath5k_hw_get_frame_duration(struct ath5k_hw *ah,
78 int len, struct ieee80211_rate *rate, bool shortpre) 78 int len, struct ieee80211_rate *rate, bool shortpre)
79{ 79{
80 struct ath5k_softc *sc = ah->ah_sc;
81 int sifs, preamble, plcp_bits, sym_time; 80 int sifs, preamble, plcp_bits, sym_time;
82 int bitrate, bits, symbols, symbol_bits; 81 int bitrate, bits, symbols, symbol_bits;
83 int dur; 82 int dur;
84 83
85 /* Fallback */ 84 /* Fallback */
86 if (!ah->ah_bwmode) { 85 if (!ah->ah_bwmode) {
87 __le16 raw_dur = ieee80211_generic_frame_duration(sc->hw, 86 __le16 raw_dur = ieee80211_generic_frame_duration(ah->hw,
88 NULL, len, rate); 87 NULL, len, rate);
89 88
90 /* subtract difference between long and short preamble */ 89 /* subtract difference between long and short preamble */
@@ -205,7 +204,7 @@ unsigned int ath5k_hw_get_default_sifs(struct ath5k_hw *ah)
205 */ 204 */
206void ath5k_hw_update_mib_counters(struct ath5k_hw *ah) 205void ath5k_hw_update_mib_counters(struct ath5k_hw *ah)
207{ 206{
208 struct ath5k_statistics *stats = &ah->ah_sc->stats; 207 struct ath5k_statistics *stats = &ah->stats;
209 208
210 /* Read-And-Clear */ 209 /* Read-And-Clear */
211 stats->ack_fail += ath5k_hw_reg_read(ah, AR5K_ACK_FAIL); 210 stats->ack_fail += ath5k_hw_reg_read(ah, AR5K_ACK_FAIL);
@@ -240,25 +239,24 @@ void ath5k_hw_update_mib_counters(struct ath5k_hw *ah)
240 */ 239 */
241static inline void ath5k_hw_write_rate_duration(struct ath5k_hw *ah) 240static inline void ath5k_hw_write_rate_duration(struct ath5k_hw *ah)
242{ 241{
243 struct ath5k_softc *sc = ah->ah_sc;
244 struct ieee80211_rate *rate; 242 struct ieee80211_rate *rate;
245 unsigned int i; 243 unsigned int i;
246 /* 802.11g covers both OFDM and CCK */ 244 /* 802.11g covers both OFDM and CCK */
247 u8 band = IEEE80211_BAND_2GHZ; 245 u8 band = IEEE80211_BAND_2GHZ;
248 246
249 /* Write rate duration table */ 247 /* Write rate duration table */
250 for (i = 0; i < sc->sbands[band].n_bitrates; i++) { 248 for (i = 0; i < ah->sbands[band].n_bitrates; i++) {
251 u32 reg; 249 u32 reg;
252 u16 tx_time; 250 u16 tx_time;
253 251
254 if (ah->ah_ack_bitrate_high) 252 if (ah->ah_ack_bitrate_high)
255 rate = &sc->sbands[band].bitrates[ack_rates_high[i]]; 253 rate = &ah->sbands[band].bitrates[ack_rates_high[i]];
256 /* CCK -> 1Mb */ 254 /* CCK -> 1Mb */
257 else if (i < 4) 255 else if (i < 4)
258 rate = &sc->sbands[band].bitrates[0]; 256 rate = &ah->sbands[band].bitrates[0];
259 /* OFDM -> 6Mb */ 257 /* OFDM -> 6Mb */
260 else 258 else
261 rate = &sc->sbands[band].bitrates[4]; 259 rate = &ah->sbands[band].bitrates[4];
262 260
263 /* Set ACK timeout */ 261 /* Set ACK timeout */
264 reg = AR5K_RATE_DUR(rate->hw_value); 262 reg = AR5K_RATE_DUR(rate->hw_value);
@@ -586,7 +584,7 @@ void ath5k_hw_init_beacon(struct ath5k_hw *ah, u32 next_beacon, u32 interval)
586 /* 584 /*
587 * Set the additional timers by mode 585 * Set the additional timers by mode
588 */ 586 */
589 switch (ah->ah_sc->opmode) { 587 switch (ah->opmode) {
590 case NL80211_IFTYPE_MONITOR: 588 case NL80211_IFTYPE_MONITOR:
591 case NL80211_IFTYPE_STATION: 589 case NL80211_IFTYPE_STATION:
592 /* In STA mode timer1 is used as next wakeup 590 /* In STA mode timer1 is used as next wakeup
@@ -623,8 +621,8 @@ void ath5k_hw_init_beacon(struct ath5k_hw *ah, u32 next_beacon, u32 interval)
623 * Set the beacon register and enable all timers. 621 * Set the beacon register and enable all timers.
624 */ 622 */
625 /* When in AP or Mesh Point mode zero timer0 to start TSF */ 623 /* When in AP or Mesh Point mode zero timer0 to start TSF */
626 if (ah->ah_sc->opmode == NL80211_IFTYPE_AP || 624 if (ah->opmode == NL80211_IFTYPE_AP ||
627 ah->ah_sc->opmode == NL80211_IFTYPE_MESH_POINT) 625 ah->opmode == NL80211_IFTYPE_MESH_POINT)
628 ath5k_hw_reg_write(ah, 0, AR5K_TIMER0); 626 ath5k_hw_reg_write(ah, 0, AR5K_TIMER0);
629 627
630 ath5k_hw_reg_write(ah, next_beacon, AR5K_TIMER0); 628 ath5k_hw_reg_write(ah, next_beacon, AR5K_TIMER0);
@@ -814,7 +812,7 @@ int ath5k_hw_set_opmode(struct ath5k_hw *ah, enum nl80211_iftype op_mode)
814 struct ath_common *common = ath5k_hw_common(ah); 812 struct ath_common *common = ath5k_hw_common(ah);
815 u32 pcu_reg, beacon_reg, low_id, high_id; 813 u32 pcu_reg, beacon_reg, low_id, high_id;
816 814
817 ATH5K_DBG(ah->ah_sc, ATH5K_DEBUG_MODE, "mode %d\n", op_mode); 815 ATH5K_DBG(ah, ATH5K_DEBUG_MODE, "mode %d\n", op_mode);
818 816
819 /* Preserve rest settings */ 817 /* Preserve rest settings */
820 pcu_reg = ath5k_hw_reg_read(ah, AR5K_STA_ID1) & 0xffff0000; 818 pcu_reg = ath5k_hw_reg_read(ah, AR5K_STA_ID1) & 0xffff0000;
@@ -890,7 +888,7 @@ void ath5k_hw_pcu_init(struct ath5k_hw *ah, enum nl80211_iftype op_mode,
890 * XXX: rethink this after new mode changes to 888 * XXX: rethink this after new mode changes to
891 * mac80211 are integrated */ 889 * mac80211 are integrated */
892 if (ah->ah_version == AR5K_AR5212 && 890 if (ah->ah_version == AR5K_AR5212 &&
893 ah->ah_sc->nvifs) 891 ah->nvifs)
894 ath5k_hw_write_rate_duration(ah); 892 ath5k_hw_write_rate_duration(ah);
895 893
896 /* Set RSSI/BRSSI thresholds 894 /* Set RSSI/BRSSI thresholds
diff --git a/drivers/net/wireless/ath/ath5k/phy.c b/drivers/net/wireless/ath/ath5k/phy.c
index dd2b417729ba..81e465e70175 100644
--- a/drivers/net/wireless/ath/ath5k/phy.c
+++ b/drivers/net/wireless/ath/ath5k/phy.c
@@ -22,6 +22,7 @@
22 22
23#include <linux/delay.h> 23#include <linux/delay.h>
24#include <linux/slab.h> 24#include <linux/slab.h>
25#include <asm/unaligned.h>
25 26
26#include "ath5k.h" 27#include "ath5k.h"
27#include "reg.h" 28#include "reg.h"
@@ -561,7 +562,7 @@ static s8 ath5k_hw_rf_gainf_adjust(struct ath5k_hw *ah)
561 } 562 }
562 563
563done: 564done:
564 ATH5K_DBG(ah->ah_sc, ATH5K_DEBUG_CALIBRATE, 565 ATH5K_DBG(ah, ATH5K_DEBUG_CALIBRATE,
565 "ret %d, gain step %u, current gain %u, target gain %u\n", 566 "ret %d, gain step %u, current gain %u, target gain %u\n",
566 ret, ah->ah_gain.g_step_idx, ah->ah_gain.g_current, 567 ret, ah->ah_gain.g_step_idx, ah->ah_gain.g_current,
567 ah->ah_gain.g_target); 568 ah->ah_gain.g_target);
@@ -773,7 +774,7 @@ static int ath5k_hw_rfregs_init(struct ath5k_hw *ah,
773 ah->ah_rf_banks = kmalloc(sizeof(u32) * ah->ah_rf_banks_size, 774 ah->ah_rf_banks = kmalloc(sizeof(u32) * ah->ah_rf_banks_size,
774 GFP_KERNEL); 775 GFP_KERNEL);
775 if (ah->ah_rf_banks == NULL) { 776 if (ah->ah_rf_banks == NULL) {
776 ATH5K_ERR(ah->ah_sc, "out of memory\n"); 777 ATH5K_ERR(ah, "out of memory\n");
777 return -ENOMEM; 778 return -ENOMEM;
778 } 779 }
779 } 780 }
@@ -783,7 +784,7 @@ static int ath5k_hw_rfregs_init(struct ath5k_hw *ah,
783 784
784 for (i = 0; i < ah->ah_rf_banks_size; i++) { 785 for (i = 0; i < ah->ah_rf_banks_size; i++) {
785 if (ini_rfb[i].rfb_bank >= AR5K_MAX_RF_BANKS) { 786 if (ini_rfb[i].rfb_bank >= AR5K_MAX_RF_BANKS) {
786 ATH5K_ERR(ah->ah_sc, "invalid bank\n"); 787 ATH5K_ERR(ah, "invalid bank\n");
787 return -EINVAL; 788 return -EINVAL;
788 } 789 }
789 790
@@ -1268,7 +1269,7 @@ static int ath5k_hw_channel(struct ath5k_hw *ah,
1268 * (CHANNEL_2GHZ, or CHANNEL_5GHZ) so we inform ath5k_channel_ok() 1269 * (CHANNEL_2GHZ, or CHANNEL_5GHZ) so we inform ath5k_channel_ok()
1269 * of the band by that */ 1270 * of the band by that */
1270 if (!ath5k_channel_ok(ah, channel->center_freq, channel->hw_value)) { 1271 if (!ath5k_channel_ok(ah, channel->center_freq, channel->hw_value)) {
1271 ATH5K_ERR(ah->ah_sc, 1272 ATH5K_ERR(ah,
1272 "channel frequency (%u MHz) out of supported " 1273 "channel frequency (%u MHz) out of supported "
1273 "band range\n", 1274 "band range\n",
1274 channel->center_freq); 1275 channel->center_freq);
@@ -1356,7 +1357,7 @@ static s16 ath5k_hw_get_median_noise_floor(struct ath5k_hw *ah)
1356 } 1357 }
1357 } 1358 }
1358 for (i = 0; i < ATH5K_NF_CAL_HIST_MAX; i++) { 1359 for (i = 0; i < ATH5K_NF_CAL_HIST_MAX; i++) {
1359 ATH5K_DBG(ah->ah_sc, ATH5K_DEBUG_CALIBRATE, 1360 ATH5K_DBG(ah, ATH5K_DEBUG_CALIBRATE,
1360 "cal %d:%d\n", i, sort[i]); 1361 "cal %d:%d\n", i, sort[i]);
1361 } 1362 }
1362 return sort[(ATH5K_NF_CAL_HIST_MAX - 1) / 2]; 1363 return sort[(ATH5K_NF_CAL_HIST_MAX - 1) / 2];
@@ -1382,7 +1383,7 @@ void ath5k_hw_update_noise_floor(struct ath5k_hw *ah)
1382 1383
1383 /* keep last value if calibration hasn't completed */ 1384 /* keep last value if calibration hasn't completed */
1384 if (ath5k_hw_reg_read(ah, AR5K_PHY_AGCCTL) & AR5K_PHY_AGCCTL_NF) { 1385 if (ath5k_hw_reg_read(ah, AR5K_PHY_AGCCTL) & AR5K_PHY_AGCCTL_NF) {
1385 ATH5K_DBG(ah->ah_sc, ATH5K_DEBUG_CALIBRATE, 1386 ATH5K_DBG(ah, ATH5K_DEBUG_CALIBRATE,
1386 "NF did not complete in calibration window\n"); 1387 "NF did not complete in calibration window\n");
1387 1388
1388 return; 1389 return;
@@ -1395,7 +1396,7 @@ void ath5k_hw_update_noise_floor(struct ath5k_hw *ah)
1395 threshold = ee->ee_noise_floor_thr[ee_mode]; 1396 threshold = ee->ee_noise_floor_thr[ee_mode];
1396 1397
1397 if (nf > threshold) { 1398 if (nf > threshold) {
1398 ATH5K_DBG(ah->ah_sc, ATH5K_DEBUG_CALIBRATE, 1399 ATH5K_DBG(ah, ATH5K_DEBUG_CALIBRATE,
1399 "noise floor failure detected; " 1400 "noise floor failure detected; "
1400 "read %d, threshold %d\n", 1401 "read %d, threshold %d\n",
1401 nf, threshold); 1402 nf, threshold);
@@ -1432,7 +1433,7 @@ void ath5k_hw_update_noise_floor(struct ath5k_hw *ah)
1432 1433
1433 ah->ah_noise_floor = nf; 1434 ah->ah_noise_floor = nf;
1434 1435
1435 ATH5K_DBG(ah->ah_sc, ATH5K_DEBUG_CALIBRATE, 1436 ATH5K_DBG(ah, ATH5K_DEBUG_CALIBRATE,
1436 "noise floor calibrated: %d\n", nf); 1437 "noise floor calibrated: %d\n", nf);
1437} 1438}
1438 1439
@@ -1520,7 +1521,7 @@ static int ath5k_hw_rf5110_calibrate(struct ath5k_hw *ah,
1520 ath5k_hw_reg_write(ah, phy_sat, AR5K_PHY_ADCSAT); 1521 ath5k_hw_reg_write(ah, phy_sat, AR5K_PHY_ADCSAT);
1521 1522
1522 if (ret) { 1523 if (ret) {
1523 ATH5K_ERR(ah->ah_sc, "calibration timeout (%uMHz)\n", 1524 ATH5K_ERR(ah, "calibration timeout (%uMHz)\n",
1524 channel->center_freq); 1525 channel->center_freq);
1525 return ret; 1526 return ret;
1526 } 1527 }
@@ -1555,7 +1556,7 @@ ath5k_hw_rf511x_iq_calibrate(struct ath5k_hw *ah)
1555 iq_corr = ath5k_hw_reg_read(ah, AR5K_PHY_IQRES_CAL_CORR); 1556 iq_corr = ath5k_hw_reg_read(ah, AR5K_PHY_IQRES_CAL_CORR);
1556 i_pwr = ath5k_hw_reg_read(ah, AR5K_PHY_IQRES_CAL_PWR_I); 1557 i_pwr = ath5k_hw_reg_read(ah, AR5K_PHY_IQRES_CAL_PWR_I);
1557 q_pwr = ath5k_hw_reg_read(ah, AR5K_PHY_IQRES_CAL_PWR_Q); 1558 q_pwr = ath5k_hw_reg_read(ah, AR5K_PHY_IQRES_CAL_PWR_Q);
1558 ATH5K_DBG_UNLIMIT(ah->ah_sc, ATH5K_DEBUG_CALIBRATE, 1559 ATH5K_DBG_UNLIMIT(ah, ATH5K_DEBUG_CALIBRATE,
1559 "iq_corr:%x i_pwr:%x q_pwr:%x", iq_corr, i_pwr, q_pwr); 1560 "iq_corr:%x i_pwr:%x q_pwr:%x", iq_corr, i_pwr, q_pwr);
1560 if (i_pwr && q_pwr) 1561 if (i_pwr && q_pwr)
1561 break; 1562 break;
@@ -1581,7 +1582,7 @@ ath5k_hw_rf511x_iq_calibrate(struct ath5k_hw *ah)
1581 q_coff = (i_pwr / q_coffd) - 128; 1582 q_coff = (i_pwr / q_coffd) - 128;
1582 q_coff = clamp(q_coff, -16, 15); /* signed 5 bit */ 1583 q_coff = clamp(q_coff, -16, 15); /* signed 5 bit */
1583 1584
1584 ATH5K_DBG_UNLIMIT(ah->ah_sc, ATH5K_DEBUG_CALIBRATE, 1585 ATH5K_DBG_UNLIMIT(ah, ATH5K_DEBUG_CALIBRATE,
1585 "new I:%d Q:%d (i_coffd:%x q_coffd:%x)", 1586 "new I:%d Q:%d (i_coffd:%x q_coffd:%x)",
1586 i_coff, q_coff, i_coffd, q_coffd); 1587 i_coff, q_coff, i_coffd, q_coffd);
1587 1588
@@ -1966,7 +1967,7 @@ ath5k_hw_set_antenna_mode(struct ath5k_hw *ah, u8 ant_mode)
1966 1967
1967 ee_mode = ath5k_eeprom_mode_from_channel(channel); 1968 ee_mode = ath5k_eeprom_mode_from_channel(channel);
1968 if (ee_mode < 0) { 1969 if (ee_mode < 0) {
1969 ATH5K_ERR(ah->ah_sc, 1970 ATH5K_ERR(ah,
1970 "invalid channel: %d\n", channel->center_freq); 1971 "invalid channel: %d\n", channel->center_freq);
1971 return; 1972 return;
1972 } 1973 }
@@ -2794,12 +2795,8 @@ ath5k_write_pwr_to_pdadc_table(struct ath5k_hw *ah, u8 ee_mode)
2794 * Write TX power values 2795 * Write TX power values
2795 */ 2796 */
2796 for (i = 0; i < (AR5K_EEPROM_POWER_TABLE_SIZE / 2); i++) { 2797 for (i = 0; i < (AR5K_EEPROM_POWER_TABLE_SIZE / 2); i++) {
2797 ath5k_hw_reg_write(ah, 2798 u32 val = get_unaligned_le32(&pdadc_out[4 * i]);
2798 ((pdadc_out[4 * i + 0] & 0xff) << 0) | 2799 ath5k_hw_reg_write(ah, val, AR5K_PHY_PDADC_TXPOWER(i));
2799 ((pdadc_out[4 * i + 1] & 0xff) << 8) |
2800 ((pdadc_out[4 * i + 2] & 0xff) << 16) |
2801 ((pdadc_out[4 * i + 3] & 0xff) << 24),
2802 AR5K_PHY_PDADC_TXPOWER(i));
2803 } 2800 }
2804} 2801}
2805 2802
@@ -3122,13 +3119,13 @@ ath5k_hw_txpower(struct ath5k_hw *ah, struct ieee80211_channel *channel,
3122 int ret; 3119 int ret;
3123 3120
3124 if (txpower > AR5K_TUNE_MAX_TXPOWER) { 3121 if (txpower > AR5K_TUNE_MAX_TXPOWER) {
3125 ATH5K_ERR(ah->ah_sc, "invalid tx power: %u\n", txpower); 3122 ATH5K_ERR(ah, "invalid tx power: %u\n", txpower);
3126 return -EINVAL; 3123 return -EINVAL;
3127 } 3124 }
3128 3125
3129 ee_mode = ath5k_eeprom_mode_from_channel(channel); 3126 ee_mode = ath5k_eeprom_mode_from_channel(channel);
3130 if (ee_mode < 0) { 3127 if (ee_mode < 0) {
3131 ATH5K_ERR(ah->ah_sc, 3128 ATH5K_ERR(ah,
3132 "invalid channel: %d\n", channel->center_freq); 3129 "invalid channel: %d\n", channel->center_freq);
3133 return -EINVAL; 3130 return -EINVAL;
3134 } 3131 }
@@ -3229,7 +3226,7 @@ ath5k_hw_txpower(struct ath5k_hw *ah, struct ieee80211_channel *channel,
3229 3226
3230int ath5k_hw_set_txpower_limit(struct ath5k_hw *ah, u8 txpower) 3227int ath5k_hw_set_txpower_limit(struct ath5k_hw *ah, u8 txpower)
3231{ 3228{
3232 ATH5K_DBG(ah->ah_sc, ATH5K_DEBUG_TXPOWER, 3229 ATH5K_DBG(ah, ATH5K_DEBUG_TXPOWER,
3233 "changing txpower to %d\n", txpower); 3230 "changing txpower to %d\n", txpower);
3234 3231
3235 return ath5k_hw_txpower(ah, ah->ah_current_channel, txpower); 3232 return ath5k_hw_txpower(ah, ah->ah_current_channel, txpower);
@@ -3440,7 +3437,7 @@ int ath5k_hw_phy_init(struct ath5k_hw *ah, struct ieee80211_channel *channel,
3440 * during ath5k_phy_calibrate) */ 3437 * during ath5k_phy_calibrate) */
3441 if (ath5k_hw_register_timeout(ah, AR5K_PHY_AGCCTL, 3438 if (ath5k_hw_register_timeout(ah, AR5K_PHY_AGCCTL,
3442 AR5K_PHY_AGCCTL_CAL, 0, false)) { 3439 AR5K_PHY_AGCCTL_CAL, 0, false)) {
3443 ATH5K_ERR(ah->ah_sc, "gain calibration timeout (%uMHz)\n", 3440 ATH5K_ERR(ah, "gain calibration timeout (%uMHz)\n",
3444 channel->center_freq); 3441 channel->center_freq);
3445 } 3442 }
3446 3443
diff --git a/drivers/net/wireless/ath/ath5k/qcu.c b/drivers/net/wireless/ath/ath5k/qcu.c
index b18c5021aac3..65f10398999e 100644
--- a/drivers/net/wireless/ath/ath5k/qcu.c
+++ b/drivers/net/wireless/ath/ath5k/qcu.c
@@ -187,7 +187,7 @@ int ath5k_hw_setup_tx_queue(struct ath5k_hw *ah, enum ath5k_tx_queue queue_type,
187 break; 187 break;
188 case AR5K_TX_QUEUE_XR_DATA: 188 case AR5K_TX_QUEUE_XR_DATA:
189 if (ah->ah_version != AR5K_AR5212) 189 if (ah->ah_version != AR5K_AR5212)
190 ATH5K_ERR(ah->ah_sc, 190 ATH5K_ERR(ah,
191 "XR data queues only supported in" 191 "XR data queues only supported in"
192 " 5212!\n"); 192 " 5212!\n");
193 queue = AR5K_TX_QUEUE_ID_XR_DATA; 193 queue = AR5K_TX_QUEUE_ID_XR_DATA;
@@ -510,7 +510,6 @@ int ath5k_hw_reset_tx_queue(struct ath5k_hw *ah, unsigned int queue)
510int ath5k_hw_set_ifs_intervals(struct ath5k_hw *ah, unsigned int slot_time) 510int ath5k_hw_set_ifs_intervals(struct ath5k_hw *ah, unsigned int slot_time)
511{ 511{
512 struct ieee80211_channel *channel = ah->ah_current_channel; 512 struct ieee80211_channel *channel = ah->ah_current_channel;
513 struct ath5k_softc *sc = ah->ah_sc;
514 struct ieee80211_rate *rate; 513 struct ieee80211_rate *rate;
515 u32 ack_tx_time, eifs, eifs_clock, sifs, sifs_clock; 514 u32 ack_tx_time, eifs, eifs_clock, sifs, sifs_clock;
516 u32 slot_time_clock = ath5k_hw_htoclock(ah, slot_time); 515 u32 slot_time_clock = ath5k_hw_htoclock(ah, slot_time);
@@ -546,9 +545,9 @@ int ath5k_hw_set_ifs_intervals(struct ath5k_hw *ah, unsigned int slot_time)
546 * Also we have different lowest rate for 802.11a 545 * Also we have different lowest rate for 802.11a
547 */ 546 */
548 if (channel->hw_value & CHANNEL_5GHZ) 547 if (channel->hw_value & CHANNEL_5GHZ)
549 rate = &sc->sbands[IEEE80211_BAND_5GHZ].bitrates[0]; 548 rate = &ah->sbands[IEEE80211_BAND_5GHZ].bitrates[0];
550 else 549 else
551 rate = &sc->sbands[IEEE80211_BAND_2GHZ].bitrates[0]; 550 rate = &ah->sbands[IEEE80211_BAND_2GHZ].bitrates[0];
552 551
553 ack_tx_time = ath5k_hw_get_frame_duration(ah, 10, rate, false); 552 ack_tx_time = ath5k_hw_get_frame_duration(ah, 10, rate, false);
554 553
@@ -622,7 +621,7 @@ int ath5k_hw_init_queues(struct ath5k_hw *ah)
622 for (i = 0; i < ah->ah_capabilities.cap_queues.q_tx_num; i++) { 621 for (i = 0; i < ah->ah_capabilities.cap_queues.q_tx_num; i++) {
623 ret = ath5k_hw_reset_tx_queue(ah, i); 622 ret = ath5k_hw_reset_tx_queue(ah, i);
624 if (ret) { 623 if (ret) {
625 ATH5K_ERR(ah->ah_sc, 624 ATH5K_ERR(ah,
626 "failed to reset TX queue #%d\n", i); 625 "failed to reset TX queue #%d\n", i);
627 return ret; 626 return ret;
628 } 627 }
diff --git a/drivers/net/wireless/ath/ath5k/reset.c b/drivers/net/wireless/ath/ath5k/reset.c
index 9f9c2ad3ca66..0686c5d8d56e 100644
--- a/drivers/net/wireless/ath/ath5k/reset.c
+++ b/drivers/net/wireless/ath/ath5k/reset.c
@@ -390,7 +390,7 @@ static int ath5k_hw_wisoc_reset(struct ath5k_hw *ah, u32 flags)
390 u32 val = 0; 390 u32 val = 0;
391 391
392 /* ah->ah_mac_srev is not available at this point yet */ 392 /* ah->ah_mac_srev is not available at this point yet */
393 if (ah->ah_sc->devid >= AR5K_SREV_AR2315_R6) { 393 if (ah->devid >= AR5K_SREV_AR2315_R6) {
394 reg = (u32 __iomem *) AR5K_AR2315_RESET; 394 reg = (u32 __iomem *) AR5K_AR2315_RESET;
395 if (mask & AR5K_RESET_CTL_PCU) 395 if (mask & AR5K_RESET_CTL_PCU)
396 val |= AR5K_AR2315_RESET_WMAC; 396 val |= AR5K_AR2315_RESET_WMAC;
@@ -398,7 +398,7 @@ static int ath5k_hw_wisoc_reset(struct ath5k_hw *ah, u32 flags)
398 val |= AR5K_AR2315_RESET_BB_WARM; 398 val |= AR5K_AR2315_RESET_BB_WARM;
399 } else { 399 } else {
400 reg = (u32 __iomem *) AR5K_AR5312_RESET; 400 reg = (u32 __iomem *) AR5K_AR5312_RESET;
401 if (to_platform_device(ah->ah_sc->dev)->id == 0) { 401 if (to_platform_device(ah->dev)->id == 0) {
402 if (mask & AR5K_RESET_CTL_PCU) 402 if (mask & AR5K_RESET_CTL_PCU)
403 val |= AR5K_AR5312_RESET_WMAC0; 403 val |= AR5K_AR5312_RESET_WMAC0;
404 if (mask & AR5K_RESET_CTL_BASEBAND) 404 if (mask & AR5K_RESET_CTL_BASEBAND)
@@ -530,7 +530,7 @@ commit:
530 */ 530 */
531int ath5k_hw_on_hold(struct ath5k_hw *ah) 531int ath5k_hw_on_hold(struct ath5k_hw *ah)
532{ 532{
533 struct pci_dev *pdev = ah->ah_sc->pdev; 533 struct pci_dev *pdev = ah->pdev;
534 u32 bus_flags; 534 u32 bus_flags;
535 int ret; 535 int ret;
536 536
@@ -540,7 +540,7 @@ int ath5k_hw_on_hold(struct ath5k_hw *ah)
540 /* Make sure device is awake */ 540 /* Make sure device is awake */
541 ret = ath5k_hw_set_power(ah, AR5K_PM_AWAKE, true, 0); 541 ret = ath5k_hw_set_power(ah, AR5K_PM_AWAKE, true, 0);
542 if (ret) { 542 if (ret) {
543 ATH5K_ERR(ah->ah_sc, "failed to wakeup the MAC Chip\n"); 543 ATH5K_ERR(ah, "failed to wakeup the MAC Chip\n");
544 return ret; 544 return ret;
545 } 545 }
546 546
@@ -565,14 +565,14 @@ int ath5k_hw_on_hold(struct ath5k_hw *ah)
565 } 565 }
566 566
567 if (ret) { 567 if (ret) {
568 ATH5K_ERR(ah->ah_sc, "failed to put device on warm reset\n"); 568 ATH5K_ERR(ah, "failed to put device on warm reset\n");
569 return -EIO; 569 return -EIO;
570 } 570 }
571 571
572 /* ...wakeup again!*/ 572 /* ...wakeup again!*/
573 ret = ath5k_hw_set_power(ah, AR5K_PM_AWAKE, true, 0); 573 ret = ath5k_hw_set_power(ah, AR5K_PM_AWAKE, true, 0);
574 if (ret) { 574 if (ret) {
575 ATH5K_ERR(ah->ah_sc, "failed to put device on hold\n"); 575 ATH5K_ERR(ah, "failed to put device on hold\n");
576 return ret; 576 return ret;
577 } 577 }
578 578
@@ -584,7 +584,7 @@ int ath5k_hw_on_hold(struct ath5k_hw *ah)
584 */ 584 */
585int ath5k_hw_nic_wakeup(struct ath5k_hw *ah, int flags, bool initial) 585int ath5k_hw_nic_wakeup(struct ath5k_hw *ah, int flags, bool initial)
586{ 586{
587 struct pci_dev *pdev = ah->ah_sc->pdev; 587 struct pci_dev *pdev = ah->pdev;
588 u32 turbo, mode, clock, bus_flags; 588 u32 turbo, mode, clock, bus_flags;
589 int ret; 589 int ret;
590 590
@@ -596,7 +596,7 @@ int ath5k_hw_nic_wakeup(struct ath5k_hw *ah, int flags, bool initial)
596 /* Wakeup the device */ 596 /* Wakeup the device */
597 ret = ath5k_hw_set_power(ah, AR5K_PM_AWAKE, true, 0); 597 ret = ath5k_hw_set_power(ah, AR5K_PM_AWAKE, true, 0);
598 if (ret) { 598 if (ret) {
599 ATH5K_ERR(ah->ah_sc, "failed to wakeup the MAC Chip\n"); 599 ATH5K_ERR(ah, "failed to wakeup the MAC Chip\n");
600 return ret; 600 return ret;
601 } 601 }
602 } 602 }
@@ -626,14 +626,14 @@ int ath5k_hw_nic_wakeup(struct ath5k_hw *ah, int flags, bool initial)
626 } 626 }
627 627
628 if (ret) { 628 if (ret) {
629 ATH5K_ERR(ah->ah_sc, "failed to reset the MAC Chip\n"); 629 ATH5K_ERR(ah, "failed to reset the MAC Chip\n");
630 return -EIO; 630 return -EIO;
631 } 631 }
632 632
633 /* ...wakeup again!...*/ 633 /* ...wakeup again!...*/
634 ret = ath5k_hw_set_power(ah, AR5K_PM_AWAKE, true, 0); 634 ret = ath5k_hw_set_power(ah, AR5K_PM_AWAKE, true, 0);
635 if (ret) { 635 if (ret) {
636 ATH5K_ERR(ah->ah_sc, "failed to resume the MAC Chip\n"); 636 ATH5K_ERR(ah, "failed to resume the MAC Chip\n");
637 return ret; 637 return ret;
638 } 638 }
639 639
@@ -646,7 +646,7 @@ int ath5k_hw_nic_wakeup(struct ath5k_hw *ah, int flags, bool initial)
646 ret = ath5k_hw_nic_reset(ah, 0); 646 ret = ath5k_hw_nic_reset(ah, 0);
647 647
648 if (ret) { 648 if (ret) {
649 ATH5K_ERR(ah->ah_sc, "failed to warm reset the MAC Chip\n"); 649 ATH5K_ERR(ah, "failed to warm reset the MAC Chip\n");
650 return -EIO; 650 return -EIO;
651 } 651 }
652 652
@@ -687,7 +687,7 @@ int ath5k_hw_nic_wakeup(struct ath5k_hw *ah, int flags, bool initial)
687 else 687 else
688 mode |= AR5K_PHY_MODE_MOD_DYN; 688 mode |= AR5K_PHY_MODE_MOD_DYN;
689 } else { 689 } else {
690 ATH5K_ERR(ah->ah_sc, 690 ATH5K_ERR(ah,
691 "invalid radio modulation mode\n"); 691 "invalid radio modulation mode\n");
692 return -EINVAL; 692 return -EINVAL;
693 } 693 }
@@ -703,12 +703,12 @@ int ath5k_hw_nic_wakeup(struct ath5k_hw *ah, int flags, bool initial)
703 if (flags & CHANNEL_OFDM) 703 if (flags & CHANNEL_OFDM)
704 mode |= AR5K_PHY_MODE_MOD_OFDM; 704 mode |= AR5K_PHY_MODE_MOD_OFDM;
705 else { 705 else {
706 ATH5K_ERR(ah->ah_sc, 706 ATH5K_ERR(ah,
707 "invalid radio modulation mode\n"); 707 "invalid radio modulation mode\n");
708 return -EINVAL; 708 return -EINVAL;
709 } 709 }
710 } else { 710 } else {
711 ATH5K_ERR(ah->ah_sc, "invalid radio frequency mode\n"); 711 ATH5K_ERR(ah, "invalid radio frequency mode\n");
712 return -EINVAL; 712 return -EINVAL;
713 } 713 }
714 714
@@ -1076,7 +1076,7 @@ int ath5k_hw_reset(struct ath5k_hw *ah, enum nl80211_iftype op_mode,
1076 /* RF Bus grant won't work if we have pending 1076 /* RF Bus grant won't work if we have pending
1077 * frames */ 1077 * frames */
1078 if (ret && fast) { 1078 if (ret && fast) {
1079 ATH5K_DBG(ah->ah_sc, ATH5K_DEBUG_RESET, 1079 ATH5K_DBG(ah, ATH5K_DEBUG_RESET,
1080 "DMA didn't stop, falling back to normal reset\n"); 1080 "DMA didn't stop, falling back to normal reset\n");
1081 fast = 0; 1081 fast = 0;
1082 /* Non fatal, just continue with 1082 /* Non fatal, just continue with
@@ -1091,7 +1091,7 @@ int ath5k_hw_reset(struct ath5k_hw *ah, enum nl80211_iftype op_mode,
1091 case CHANNEL_G: 1091 case CHANNEL_G:
1092 1092
1093 if (ah->ah_version <= AR5K_AR5211) { 1093 if (ah->ah_version <= AR5K_AR5211) {
1094 ATH5K_ERR(ah->ah_sc, 1094 ATH5K_ERR(ah,
1095 "G mode not available on 5210/5211"); 1095 "G mode not available on 5210/5211");
1096 return -EINVAL; 1096 return -EINVAL;
1097 } 1097 }
@@ -1101,7 +1101,7 @@ int ath5k_hw_reset(struct ath5k_hw *ah, enum nl80211_iftype op_mode,
1101 case CHANNEL_B: 1101 case CHANNEL_B:
1102 1102
1103 if (ah->ah_version < AR5K_AR5211) { 1103 if (ah->ah_version < AR5K_AR5211) {
1104 ATH5K_ERR(ah->ah_sc, 1104 ATH5K_ERR(ah,
1105 "B mode not available on 5210"); 1105 "B mode not available on 5210");
1106 return -EINVAL; 1106 return -EINVAL;
1107 } 1107 }
@@ -1110,14 +1110,14 @@ int ath5k_hw_reset(struct ath5k_hw *ah, enum nl80211_iftype op_mode,
1110 break; 1110 break;
1111 case CHANNEL_XR: 1111 case CHANNEL_XR:
1112 if (ah->ah_version == AR5K_AR5211) { 1112 if (ah->ah_version == AR5K_AR5211) {
1113 ATH5K_ERR(ah->ah_sc, 1113 ATH5K_ERR(ah,
1114 "XR mode not available on 5211"); 1114 "XR mode not available on 5211");
1115 return -EINVAL; 1115 return -EINVAL;
1116 } 1116 }
1117 mode = AR5K_MODE_XR; 1117 mode = AR5K_MODE_XR;
1118 break; 1118 break;
1119 default: 1119 default:
1120 ATH5K_ERR(ah->ah_sc, 1120 ATH5K_ERR(ah,
1121 "invalid channel: %d\n", channel->center_freq); 1121 "invalid channel: %d\n", channel->center_freq);
1122 return -EINVAL; 1122 return -EINVAL;
1123 } 1123 }
@@ -1129,13 +1129,13 @@ int ath5k_hw_reset(struct ath5k_hw *ah, enum nl80211_iftype op_mode,
1129 if (fast) { 1129 if (fast) {
1130 ret = ath5k_hw_phy_init(ah, channel, mode, true); 1130 ret = ath5k_hw_phy_init(ah, channel, mode, true);
1131 if (ret) { 1131 if (ret) {
1132 ATH5K_DBG(ah->ah_sc, ATH5K_DEBUG_RESET, 1132 ATH5K_DBG(ah, ATH5K_DEBUG_RESET,
1133 "fast chan change failed, falling back to normal reset\n"); 1133 "fast chan change failed, falling back to normal reset\n");
1134 /* Non fatal, can happen eg. 1134 /* Non fatal, can happen eg.
1135 * on mode change */ 1135 * on mode change */
1136 ret = 0; 1136 ret = 0;
1137 } else { 1137 } else {
1138 ATH5K_DBG(ah->ah_sc, ATH5K_DEBUG_RESET, 1138 ATH5K_DBG(ah, ATH5K_DEBUG_RESET,
1139 "fast chan change successful\n"); 1139 "fast chan change successful\n");
1140 return 0; 1140 return 0;
1141 } 1141 }
@@ -1268,7 +1268,7 @@ int ath5k_hw_reset(struct ath5k_hw *ah, enum nl80211_iftype op_mode,
1268 */ 1268 */
1269 ret = ath5k_hw_phy_init(ah, channel, mode, false); 1269 ret = ath5k_hw_phy_init(ah, channel, mode, false);
1270 if (ret) { 1270 if (ret) {
1271 ATH5K_ERR(ah->ah_sc, 1271 ATH5K_ERR(ah,
1272 "failed to initialize PHY (%i) !\n", ret); 1272 "failed to initialize PHY (%i) !\n", ret);
1273 return ret; 1273 return ret;
1274 } 1274 }
diff --git a/drivers/net/wireless/ath/ath5k/rfkill.c b/drivers/net/wireless/ath/ath5k/rfkill.c
index 41a877b73fce..945fc9f21e76 100644
--- a/drivers/net/wireless/ath/ath5k/rfkill.c
+++ b/drivers/net/wireless/ath/ath5k/rfkill.c
@@ -36,86 +36,81 @@
36#include "base.h" 36#include "base.h"
37 37
38 38
39static inline void ath5k_rfkill_disable(struct ath5k_softc *sc) 39static inline void ath5k_rfkill_disable(struct ath5k_hw *ah)
40{ 40{
41 ATH5K_DBG(sc, ATH5K_DEBUG_ANY, "rfkill disable (gpio:%d polarity:%d)\n", 41 ATH5K_DBG(ah, ATH5K_DEBUG_ANY, "rfkill disable (gpio:%d polarity:%d)\n",
42 sc->rf_kill.gpio, sc->rf_kill.polarity); 42 ah->rf_kill.gpio, ah->rf_kill.polarity);
43 ath5k_hw_set_gpio_output(sc->ah, sc->rf_kill.gpio); 43 ath5k_hw_set_gpio_output(ah, ah->rf_kill.gpio);
44 ath5k_hw_set_gpio(sc->ah, sc->rf_kill.gpio, !sc->rf_kill.polarity); 44 ath5k_hw_set_gpio(ah, ah->rf_kill.gpio, !ah->rf_kill.polarity);
45} 45}
46 46
47 47
48static inline void ath5k_rfkill_enable(struct ath5k_softc *sc) 48static inline void ath5k_rfkill_enable(struct ath5k_hw *ah)
49{ 49{
50 ATH5K_DBG(sc, ATH5K_DEBUG_ANY, "rfkill enable (gpio:%d polarity:%d)\n", 50 ATH5K_DBG(ah, ATH5K_DEBUG_ANY, "rfkill enable (gpio:%d polarity:%d)\n",
51 sc->rf_kill.gpio, sc->rf_kill.polarity); 51 ah->rf_kill.gpio, ah->rf_kill.polarity);
52 ath5k_hw_set_gpio_output(sc->ah, sc->rf_kill.gpio); 52 ath5k_hw_set_gpio_output(ah, ah->rf_kill.gpio);
53 ath5k_hw_set_gpio(sc->ah, sc->rf_kill.gpio, sc->rf_kill.polarity); 53 ath5k_hw_set_gpio(ah, ah->rf_kill.gpio, ah->rf_kill.polarity);
54} 54}
55 55
56static inline void ath5k_rfkill_set_intr(struct ath5k_softc *sc, bool enable) 56static inline void ath5k_rfkill_set_intr(struct ath5k_hw *ah, bool enable)
57{ 57{
58 struct ath5k_hw *ah = sc->ah;
59 u32 curval; 58 u32 curval;
60 59
61 ath5k_hw_set_gpio_input(ah, sc->rf_kill.gpio); 60 ath5k_hw_set_gpio_input(ah, ah->rf_kill.gpio);
62 curval = ath5k_hw_get_gpio(ah, sc->rf_kill.gpio); 61 curval = ath5k_hw_get_gpio(ah, ah->rf_kill.gpio);
63 ath5k_hw_set_gpio_intr(ah, sc->rf_kill.gpio, enable ? 62 ath5k_hw_set_gpio_intr(ah, ah->rf_kill.gpio, enable ?
64 !!curval : !curval); 63 !!curval : !curval);
65} 64}
66 65
67static bool 66static bool
68ath5k_is_rfkill_set(struct ath5k_softc *sc) 67ath5k_is_rfkill_set(struct ath5k_hw *ah)
69{ 68{
70 /* configuring GPIO for input for some reason disables rfkill */ 69 /* configuring GPIO for input for some reason disables rfkill */
71 /*ath5k_hw_set_gpio_input(sc->ah, sc->rf_kill.gpio);*/ 70 /*ath5k_hw_set_gpio_input(ah, ah->rf_kill.gpio);*/
72 return ath5k_hw_get_gpio(sc->ah, sc->rf_kill.gpio) == 71 return ath5k_hw_get_gpio(ah, ah->rf_kill.gpio) ==
73 sc->rf_kill.polarity; 72 ah->rf_kill.polarity;
74} 73}
75 74
76static void 75static void
77ath5k_tasklet_rfkill_toggle(unsigned long data) 76ath5k_tasklet_rfkill_toggle(unsigned long data)
78{ 77{
79 struct ath5k_softc *sc = (void *)data; 78 struct ath5k_hw *ah = (void *)data;
80 bool blocked; 79 bool blocked;
81 80
82 blocked = ath5k_is_rfkill_set(sc); 81 blocked = ath5k_is_rfkill_set(ah);
83 wiphy_rfkill_set_hw_state(sc->hw->wiphy, blocked); 82 wiphy_rfkill_set_hw_state(ah->hw->wiphy, blocked);
84} 83}
85 84
86 85
87void 86void
88ath5k_rfkill_hw_start(struct ath5k_hw *ah) 87ath5k_rfkill_hw_start(struct ath5k_hw *ah)
89{ 88{
90 struct ath5k_softc *sc = ah->ah_sc;
91
92 /* read rfkill GPIO configuration from EEPROM header */ 89 /* read rfkill GPIO configuration from EEPROM header */
93 sc->rf_kill.gpio = ah->ah_capabilities.cap_eeprom.ee_rfkill_pin; 90 ah->rf_kill.gpio = ah->ah_capabilities.cap_eeprom.ee_rfkill_pin;
94 sc->rf_kill.polarity = ah->ah_capabilities.cap_eeprom.ee_rfkill_pol; 91 ah->rf_kill.polarity = ah->ah_capabilities.cap_eeprom.ee_rfkill_pol;
95 92
96 tasklet_init(&sc->rf_kill.toggleq, ath5k_tasklet_rfkill_toggle, 93 tasklet_init(&ah->rf_kill.toggleq, ath5k_tasklet_rfkill_toggle,
97 (unsigned long)sc); 94 (unsigned long)ah);
98 95
99 ath5k_rfkill_disable(sc); 96 ath5k_rfkill_disable(ah);
100 97
101 /* enable interrupt for rfkill switch */ 98 /* enable interrupt for rfkill switch */
102 if (AR5K_EEPROM_HDR_RFKILL(ah->ah_capabilities.cap_eeprom.ee_header)) 99 if (AR5K_EEPROM_HDR_RFKILL(ah->ah_capabilities.cap_eeprom.ee_header))
103 ath5k_rfkill_set_intr(sc, true); 100 ath5k_rfkill_set_intr(ah, true);
104} 101}
105 102
106 103
107void 104void
108ath5k_rfkill_hw_stop(struct ath5k_hw *ah) 105ath5k_rfkill_hw_stop(struct ath5k_hw *ah)
109{ 106{
110 struct ath5k_softc *sc = ah->ah_sc;
111
112 /* disable interrupt for rfkill switch */ 107 /* disable interrupt for rfkill switch */
113 if (AR5K_EEPROM_HDR_RFKILL(ah->ah_capabilities.cap_eeprom.ee_header)) 108 if (AR5K_EEPROM_HDR_RFKILL(ah->ah_capabilities.cap_eeprom.ee_header))
114 ath5k_rfkill_set_intr(sc, false); 109 ath5k_rfkill_set_intr(ah, false);
115 110
116 tasklet_kill(&sc->rf_kill.toggleq); 111 tasklet_kill(&ah->rf_kill.toggleq);
117 112
118 /* enable RFKILL when stopping HW so Wifi LED is turned off */ 113 /* enable RFKILL when stopping HW so Wifi LED is turned off */
119 ath5k_rfkill_enable(sc); 114 ath5k_rfkill_enable(ah);
120} 115}
121 116
diff --git a/drivers/net/wireless/ath/ath5k/sysfs.c b/drivers/net/wireless/ath/ath5k/sysfs.c
index d8ad0e45e1c4..0244a36ba958 100644
--- a/drivers/net/wireless/ath/ath5k/sysfs.c
+++ b/drivers/net/wireless/ath/ath5k/sysfs.c
@@ -11,7 +11,7 @@ static ssize_t ath5k_attr_show_##name(struct device *dev, \
11 char *buf) \ 11 char *buf) \
12{ \ 12{ \
13 struct ieee80211_hw *hw = dev_get_drvdata(dev); \ 13 struct ieee80211_hw *hw = dev_get_drvdata(dev); \
14 struct ath5k_softc *sc = hw->priv; \ 14 struct ath5k_hw *ah = hw->priv; \
15 return snprintf(buf, PAGE_SIZE, "%d\n", get); \ 15 return snprintf(buf, PAGE_SIZE, "%d\n", get); \
16} \ 16} \
17 \ 17 \
@@ -20,13 +20,13 @@ static ssize_t ath5k_attr_store_##name(struct device *dev, \
20 const char *buf, size_t count) \ 20 const char *buf, size_t count) \
21{ \ 21{ \
22 struct ieee80211_hw *hw = dev_get_drvdata(dev); \ 22 struct ieee80211_hw *hw = dev_get_drvdata(dev); \
23 struct ath5k_softc *sc = hw->priv; \ 23 struct ath5k_hw *ah = hw->priv; \
24 int val, ret; \ 24 int val, ret; \
25 \ 25 \
26 ret = kstrtoint(buf, 10, &val); \ 26 ret = kstrtoint(buf, 10, &val); \
27 if (ret < 0) \ 27 if (ret < 0) \
28 return ret; \ 28 return ret; \
29 set(sc->ah, val); \ 29 set(ah, val); \
30 return count; \ 30 return count; \
31} \ 31} \
32static DEVICE_ATTR(name, S_IRUGO | S_IWUSR, \ 32static DEVICE_ATTR(name, S_IRUGO | S_IWUSR, \
@@ -38,25 +38,25 @@ static ssize_t ath5k_attr_show_##name(struct device *dev, \
38 char *buf) \ 38 char *buf) \
39{ \ 39{ \
40 struct ieee80211_hw *hw = dev_get_drvdata(dev); \ 40 struct ieee80211_hw *hw = dev_get_drvdata(dev); \
41 struct ath5k_softc *sc = hw->priv; \ 41 struct ath5k_hw *ah = hw->priv; \
42 return snprintf(buf, PAGE_SIZE, "%d\n", get); \ 42 return snprintf(buf, PAGE_SIZE, "%d\n", get); \
43} \ 43} \
44static DEVICE_ATTR(name, S_IRUGO, ath5k_attr_show_##name, NULL) 44static DEVICE_ATTR(name, S_IRUGO, ath5k_attr_show_##name, NULL)
45 45
46/*** ANI ***/ 46/*** ANI ***/
47 47
48SIMPLE_SHOW_STORE(ani_mode, sc->ani_state.ani_mode, ath5k_ani_init); 48SIMPLE_SHOW_STORE(ani_mode, ah->ani_state.ani_mode, ath5k_ani_init);
49SIMPLE_SHOW_STORE(noise_immunity_level, sc->ani_state.noise_imm_level, 49SIMPLE_SHOW_STORE(noise_immunity_level, ah->ani_state.noise_imm_level,
50 ath5k_ani_set_noise_immunity_level); 50 ath5k_ani_set_noise_immunity_level);
51SIMPLE_SHOW_STORE(spur_level, sc->ani_state.spur_level, 51SIMPLE_SHOW_STORE(spur_level, ah->ani_state.spur_level,
52 ath5k_ani_set_spur_immunity_level); 52 ath5k_ani_set_spur_immunity_level);
53SIMPLE_SHOW_STORE(firstep_level, sc->ani_state.firstep_level, 53SIMPLE_SHOW_STORE(firstep_level, ah->ani_state.firstep_level,
54 ath5k_ani_set_firstep_level); 54 ath5k_ani_set_firstep_level);
55SIMPLE_SHOW_STORE(ofdm_weak_signal_detection, sc->ani_state.ofdm_weak_sig, 55SIMPLE_SHOW_STORE(ofdm_weak_signal_detection, ah->ani_state.ofdm_weak_sig,
56 ath5k_ani_set_ofdm_weak_signal_detection); 56 ath5k_ani_set_ofdm_weak_signal_detection);
57SIMPLE_SHOW_STORE(cck_weak_signal_detection, sc->ani_state.cck_weak_sig, 57SIMPLE_SHOW_STORE(cck_weak_signal_detection, ah->ani_state.cck_weak_sig,
58 ath5k_ani_set_cck_weak_signal_detection); 58 ath5k_ani_set_cck_weak_signal_detection);
59SIMPLE_SHOW(spur_level_max, sc->ani_state.max_spur_level); 59SIMPLE_SHOW(spur_level_max, ah->ani_state.max_spur_level);
60 60
61static ssize_t ath5k_attr_show_noise_immunity_level_max(struct device *dev, 61static ssize_t ath5k_attr_show_noise_immunity_level_max(struct device *dev,
62 struct device_attribute *attr, 62 struct device_attribute *attr,
@@ -98,14 +98,14 @@ static struct attribute_group ath5k_attribute_group_ani = {
98/*** register / unregister ***/ 98/*** register / unregister ***/
99 99
100int 100int
101ath5k_sysfs_register(struct ath5k_softc *sc) 101ath5k_sysfs_register(struct ath5k_hw *ah)
102{ 102{
103 struct device *dev = sc->dev; 103 struct device *dev = ah->dev;
104 int err; 104 int err;
105 105
106 err = sysfs_create_group(&dev->kobj, &ath5k_attribute_group_ani); 106 err = sysfs_create_group(&dev->kobj, &ath5k_attribute_group_ani);
107 if (err) { 107 if (err) {
108 ATH5K_ERR(sc, "failed to create sysfs group\n"); 108 ATH5K_ERR(ah, "failed to create sysfs group\n");
109 return err; 109 return err;
110 } 110 }
111 111
@@ -113,9 +113,9 @@ ath5k_sysfs_register(struct ath5k_softc *sc)
113} 113}
114 114
115void 115void
116ath5k_sysfs_unregister(struct ath5k_softc *sc) 116ath5k_sysfs_unregister(struct ath5k_hw *ah)
117{ 117{
118 struct device *dev = sc->dev; 118 struct device *dev = ah->dev;
119 119
120 sysfs_remove_group(&dev->kobj, &ath5k_attribute_group_ani); 120 sysfs_remove_group(&dev->kobj, &ath5k_attribute_group_ani);
121} 121}
diff --git a/drivers/net/wireless/ath/ath5k/trace.h b/drivers/net/wireless/ath/ath5k/trace.h
index 235e0768ce1d..c741c871f4e9 100644
--- a/drivers/net/wireless/ath/ath5k/trace.h
+++ b/drivers/net/wireless/ath/ath5k/trace.h
@@ -16,10 +16,10 @@ struct sk_buff;
16#define TRACE_SYSTEM ath5k 16#define TRACE_SYSTEM ath5k
17 17
18TRACE_EVENT(ath5k_rx, 18TRACE_EVENT(ath5k_rx,
19 TP_PROTO(struct ath5k_softc *priv, struct sk_buff *skb), 19 TP_PROTO(struct ath5k_hw *priv, struct sk_buff *skb),
20 TP_ARGS(priv, skb), 20 TP_ARGS(priv, skb),
21 TP_STRUCT__entry( 21 TP_STRUCT__entry(
22 __field(struct ath5k_softc *, priv) 22 __field(struct ath5k_hw *, priv)
23 __field(unsigned long, skbaddr) 23 __field(unsigned long, skbaddr)
24 __dynamic_array(u8, frame, skb->len) 24 __dynamic_array(u8, frame, skb->len)
25 ), 25 ),
@@ -34,13 +34,13 @@ TRACE_EVENT(ath5k_rx,
34); 34);
35 35
36TRACE_EVENT(ath5k_tx, 36TRACE_EVENT(ath5k_tx,
37 TP_PROTO(struct ath5k_softc *priv, struct sk_buff *skb, 37 TP_PROTO(struct ath5k_hw *priv, struct sk_buff *skb,
38 struct ath5k_txq *q), 38 struct ath5k_txq *q),
39 39
40 TP_ARGS(priv, skb, q), 40 TP_ARGS(priv, skb, q),
41 41
42 TP_STRUCT__entry( 42 TP_STRUCT__entry(
43 __field(struct ath5k_softc *, priv) 43 __field(struct ath5k_hw *, priv)
44 __field(unsigned long, skbaddr) 44 __field(unsigned long, skbaddr)
45 __field(u8, qnum) 45 __field(u8, qnum)
46 __dynamic_array(u8, frame, skb->len) 46 __dynamic_array(u8, frame, skb->len)
@@ -60,13 +60,13 @@ TRACE_EVENT(ath5k_tx,
60); 60);
61 61
62TRACE_EVENT(ath5k_tx_complete, 62TRACE_EVENT(ath5k_tx_complete,
63 TP_PROTO(struct ath5k_softc *priv, struct sk_buff *skb, 63 TP_PROTO(struct ath5k_hw *priv, struct sk_buff *skb,
64 struct ath5k_txq *q, struct ath5k_tx_status *ts), 64 struct ath5k_txq *q, struct ath5k_tx_status *ts),
65 65
66 TP_ARGS(priv, skb, q, ts), 66 TP_ARGS(priv, skb, q, ts),
67 67
68 TP_STRUCT__entry( 68 TP_STRUCT__entry(
69 __field(struct ath5k_softc *, priv) 69 __field(struct ath5k_hw *, priv)
70 __field(unsigned long, skbaddr) 70 __field(unsigned long, skbaddr)
71 __field(u8, qnum) 71 __field(u8, qnum)
72 __field(u8, ts_status) 72 __field(u8, ts_status)
diff --git a/drivers/net/wireless/ath/ath9k/ar9003_eeprom.c b/drivers/net/wireless/ath/ath9k/ar9003_eeprom.c
index 1d09f22fee4d..d109c25417f4 100644
--- a/drivers/net/wireless/ath/ath9k/ar9003_eeprom.c
+++ b/drivers/net/wireless/ath/ath9k/ar9003_eeprom.c
@@ -14,6 +14,7 @@
14 * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. 14 * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
15 */ 15 */
16 16
17#include <asm/unaligned.h>
17#include "hw.h" 18#include "hw.h"
18#include "ar9003_phy.h" 19#include "ar9003_phy.h"
19#include "ar9003_eeprom.h" 20#include "ar9003_eeprom.h"
@@ -3006,11 +3007,11 @@ static u32 ath9k_hw_ar9300_get_eeprom(struct ath_hw *ah,
3006 3007
3007 switch (param) { 3008 switch (param) {
3008 case EEP_MAC_LSW: 3009 case EEP_MAC_LSW:
3009 return eep->macAddr[0] << 8 | eep->macAddr[1]; 3010 return get_unaligned_be16(eep->macAddr);
3010 case EEP_MAC_MID: 3011 case EEP_MAC_MID:
3011 return eep->macAddr[2] << 8 | eep->macAddr[3]; 3012 return get_unaligned_be16(eep->macAddr + 2);
3012 case EEP_MAC_MSW: 3013 case EEP_MAC_MSW:
3013 return eep->macAddr[4] << 8 | eep->macAddr[5]; 3014 return get_unaligned_be16(eep->macAddr + 4);
3014 case EEP_REG_0: 3015 case EEP_REG_0:
3015 return le16_to_cpu(pBase->regDmn[0]); 3016 return le16_to_cpu(pBase->regDmn[0]);
3016 case EEP_REG_1: 3017 case EEP_REG_1:
@@ -3038,7 +3039,7 @@ static u32 ath9k_hw_ar9300_get_eeprom(struct ath_hw *ah,
3038 case EEP_CHAIN_MASK_REDUCE: 3039 case EEP_CHAIN_MASK_REDUCE:
3039 return (pBase->miscConfiguration >> 0x3) & 0x1; 3040 return (pBase->miscConfiguration >> 0x3) & 0x1;
3040 case EEP_ANT_DIV_CTL1: 3041 case EEP_ANT_DIV_CTL1:
3041 return le32_to_cpu(eep->base_ext1.ant_div_control); 3042 return eep->base_ext1.ant_div_control;
3042 default: 3043 default:
3043 return 0; 3044 return 0;
3044 } 3045 }
@@ -3380,8 +3381,7 @@ found:
3380 osize = length; 3381 osize = length;
3381 read(ah, cptr, word, COMP_HDR_LEN + osize + COMP_CKSUM_LEN); 3382 read(ah, cptr, word, COMP_HDR_LEN + osize + COMP_CKSUM_LEN);
3382 checksum = ar9300_comp_cksum(&word[COMP_HDR_LEN], length); 3383 checksum = ar9300_comp_cksum(&word[COMP_HDR_LEN], length);
3383 mchecksum = word[COMP_HDR_LEN + osize] | 3384 mchecksum = get_unaligned_le16(&word[COMP_HDR_LEN + osize]);
3384 (word[COMP_HDR_LEN + osize + 1] << 8);
3385 ath_dbg(common, ATH_DBG_EEPROM, 3385 ath_dbg(common, ATH_DBG_EEPROM,
3386 "checksum %x %x\n", checksum, mchecksum); 3386 "checksum %x %x\n", checksum, mchecksum);
3387 if (checksum == mchecksum) { 3387 if (checksum == mchecksum) {
diff --git a/drivers/net/wireless/ath/ath9k/btcoex.c b/drivers/net/wireless/ath/ath9k/btcoex.c
index 41ce0b139886..6635c377dc00 100644
--- a/drivers/net/wireless/ath/ath9k/btcoex.c
+++ b/drivers/net/wireless/ath/ath9k/btcoex.c
@@ -50,7 +50,7 @@ void ath9k_hw_init_btcoex_hw(struct ath_hw *ah, int qnum)
50 .bt_first_slot_time = 5, 50 .bt_first_slot_time = 5,
51 .bt_hold_rx_clear = true, 51 .bt_hold_rx_clear = true,
52 }; 52 };
53 u32 i; 53 u32 i, idx;
54 bool rxclear_polarity = ath_bt_config.bt_rxclear_polarity; 54 bool rxclear_polarity = ath_bt_config.bt_rxclear_polarity;
55 55
56 if (AR_SREV_9300_20_OR_LATER(ah)) 56 if (AR_SREV_9300_20_OR_LATER(ah))
@@ -73,8 +73,10 @@ void ath9k_hw_init_btcoex_hw(struct ath_hw *ah, int qnum)
73 SM(ATH_BTCOEX_BMISS_THRESH, AR_BT_BCN_MISS_THRESH) | 73 SM(ATH_BTCOEX_BMISS_THRESH, AR_BT_BCN_MISS_THRESH) |
74 AR_BT_DISABLE_BT_ANT; 74 AR_BT_DISABLE_BT_ANT;
75 75
76 for (i = 0; i < 32; i++) 76 for (i = 0; i < 32; i++) {
77 ah->hw_gen_timers.gen_timer_index[(debruijn32 << i) >> 27] = i; 77 idx = (debruijn32 << i) >> 27;
78 ah->hw_gen_timers.gen_timer_index[idx] = i;
79 }
78} 80}
79EXPORT_SYMBOL(ath9k_hw_init_btcoex_hw); 81EXPORT_SYMBOL(ath9k_hw_init_btcoex_hw);
80 82
diff --git a/drivers/net/wireless/ath/ath9k/debug.c b/drivers/net/wireless/ath/ath9k/debug.c
index 22d3a26e684d..d1eb89611ff7 100644
--- a/drivers/net/wireless/ath/ath9k/debug.c
+++ b/drivers/net/wireless/ath/ath9k/debug.c
@@ -749,7 +749,6 @@ static ssize_t read_file_misc(struct file *file, char __user *user_buf,
749 char *buf; 749 char *buf;
750 unsigned int len = 0, size = 8000; 750 unsigned int len = 0, size = 8000;
751 ssize_t retval = 0; 751 ssize_t retval = 0;
752 const char *tmp;
753 unsigned int reg; 752 unsigned int reg;
754 struct ath9k_vif_iter_data iter_data; 753 struct ath9k_vif_iter_data iter_data;
755 754
@@ -759,31 +758,14 @@ static ssize_t read_file_misc(struct file *file, char __user *user_buf,
759 if (buf == NULL) 758 if (buf == NULL)
760 return -ENOMEM; 759 return -ENOMEM;
761 760
762 switch (sc->sc_ah->opmode) {
763 case NL80211_IFTYPE_ADHOC:
764 tmp = "ADHOC";
765 break;
766 case NL80211_IFTYPE_MESH_POINT:
767 tmp = "MESH";
768 break;
769 case NL80211_IFTYPE_AP:
770 tmp = "AP";
771 break;
772 case NL80211_IFTYPE_STATION:
773 tmp = "STATION";
774 break;
775 default:
776 tmp = "???";
777 break;
778 }
779
780 ath9k_ps_wakeup(sc); 761 ath9k_ps_wakeup(sc);
781 len += snprintf(buf + len, size - len, 762 len += snprintf(buf + len, size - len,
782 "curbssid: %pM\n" 763 "curbssid: %pM\n"
783 "OP-Mode: %s(%i)\n" 764 "OP-Mode: %s(%i)\n"
784 "Beacon-Timer-Register: 0x%x\n", 765 "Beacon-Timer-Register: 0x%x\n",
785 common->curbssid, 766 common->curbssid,
786 tmp, (int)(sc->sc_ah->opmode), 767 ath_opmode_to_string(sc->sc_ah->opmode),
768 (int)(sc->sc_ah->opmode),
787 REG_READ(ah, AR_BEACON_PERIOD)); 769 REG_READ(ah, AR_BEACON_PERIOD));
788 770
789 reg = REG_READ(ah, AR_TIMER_MODE); 771 reg = REG_READ(ah, AR_TIMER_MODE);
diff --git a/drivers/net/wireless/ath/ath9k/eeprom_4k.c b/drivers/net/wireless/ath/ath9k/eeprom_4k.c
index 5b1e894f3d67..47cc95086e6e 100644
--- a/drivers/net/wireless/ath/ath9k/eeprom_4k.c
+++ b/drivers/net/wireless/ath/ath9k/eeprom_4k.c
@@ -14,6 +14,7 @@
14 * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. 14 * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
15 */ 15 */
16 16
17#include <asm/unaligned.h>
17#include "hw.h" 18#include "hw.h"
18#include "ar9002_phy.h" 19#include "ar9002_phy.h"
19 20
@@ -203,11 +204,11 @@ static u32 ath9k_hw_4k_get_eeprom(struct ath_hw *ah,
203 case EEP_NFTHRESH_2: 204 case EEP_NFTHRESH_2:
204 return pModal->noiseFloorThreshCh[0]; 205 return pModal->noiseFloorThreshCh[0];
205 case EEP_MAC_LSW: 206 case EEP_MAC_LSW:
206 return pBase->macAddr[0] << 8 | pBase->macAddr[1]; 207 return get_unaligned_be16(pBase->macAddr);
207 case EEP_MAC_MID: 208 case EEP_MAC_MID:
208 return pBase->macAddr[2] << 8 | pBase->macAddr[3]; 209 return get_unaligned_be16(pBase->macAddr + 2);
209 case EEP_MAC_MSW: 210 case EEP_MAC_MSW:
210 return pBase->macAddr[4] << 8 | pBase->macAddr[5]; 211 return get_unaligned_be16(pBase->macAddr + 4);
211 case EEP_REG_0: 212 case EEP_REG_0:
212 return pBase->regDmn[0]; 213 return pBase->regDmn[0];
213 case EEP_REG_1: 214 case EEP_REG_1:
@@ -331,10 +332,7 @@ static void ath9k_hw_set_4k_power_cal_table(struct ath_hw *ah,
331 332
332 regOffset = AR_PHY_BASE + (672 << 2) + regChainOffset; 333 regOffset = AR_PHY_BASE + (672 << 2) + regChainOffset;
333 for (j = 0; j < 32; j++) { 334 for (j = 0; j < 32; j++) {
334 reg32 = ((pdadcValues[4 * j + 0] & 0xFF) << 0) | 335 reg32 = get_unaligned_le32(&pdadcValues[4 * j]);
335 ((pdadcValues[4 * j + 1] & 0xFF) << 8) |
336 ((pdadcValues[4 * j + 2] & 0xFF) << 16)|
337 ((pdadcValues[4 * j + 3] & 0xFF) << 24);
338 REG_WRITE(ah, regOffset, reg32); 336 REG_WRITE(ah, regOffset, reg32);
339 337
340 ath_dbg(common, ATH_DBG_EEPROM, 338 ath_dbg(common, ATH_DBG_EEPROM,
diff --git a/drivers/net/wireless/ath/ath9k/eeprom_9287.c b/drivers/net/wireless/ath/ath9k/eeprom_9287.c
index 343fc9f946db..d6f6b192f450 100644
--- a/drivers/net/wireless/ath/ath9k/eeprom_9287.c
+++ b/drivers/net/wireless/ath/ath9k/eeprom_9287.c
@@ -14,6 +14,7 @@
14 * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. 14 * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
15 */ 15 */
16 16
17#include <asm/unaligned.h>
17#include "hw.h" 18#include "hw.h"
18#include "ar9002_phy.h" 19#include "ar9002_phy.h"
19 20
@@ -195,11 +196,11 @@ static u32 ath9k_hw_ar9287_get_eeprom(struct ath_hw *ah,
195 case EEP_NFTHRESH_2: 196 case EEP_NFTHRESH_2:
196 return pModal->noiseFloorThreshCh[0]; 197 return pModal->noiseFloorThreshCh[0];
197 case EEP_MAC_LSW: 198 case EEP_MAC_LSW:
198 return pBase->macAddr[0] << 8 | pBase->macAddr[1]; 199 return get_unaligned_be16(pBase->macAddr);
199 case EEP_MAC_MID: 200 case EEP_MAC_MID:
200 return pBase->macAddr[2] << 8 | pBase->macAddr[3]; 201 return get_unaligned_be16(pBase->macAddr + 2);
201 case EEP_MAC_MSW: 202 case EEP_MAC_MSW:
202 return pBase->macAddr[4] << 8 | pBase->macAddr[5]; 203 return get_unaligned_be16(pBase->macAddr + 4);
203 case EEP_REG_0: 204 case EEP_REG_0:
204 return pBase->regDmn[0]; 205 return pBase->regDmn[0];
205 case EEP_REG_1: 206 case EEP_REG_1:
@@ -434,10 +435,7 @@ static void ath9k_hw_set_ar9287_power_cal_table(struct ath_hw *ah,
434 (672 << 2) + regChainOffset; 435 (672 << 2) + regChainOffset;
435 436
436 for (j = 0; j < 32; j++) { 437 for (j = 0; j < 32; j++) {
437 reg32 = ((pdadcValues[4*j + 0] & 0xFF) << 0) 438 reg32 = get_unaligned_le32(&pdadcValues[4 * j]);
438 | ((pdadcValues[4*j + 1] & 0xFF) << 8)
439 | ((pdadcValues[4*j + 2] & 0xFF) << 16)
440 | ((pdadcValues[4*j + 3] & 0xFF) << 24);
441 439
442 REG_WRITE(ah, regOffset, reg32); 440 REG_WRITE(ah, regOffset, reg32);
443 regOffset += 4; 441 regOffset += 4;
diff --git a/drivers/net/wireless/ath/ath9k/eeprom_def.c b/drivers/net/wireless/ath/ath9k/eeprom_def.c
index 17f0a6806207..b9540a992616 100644
--- a/drivers/net/wireless/ath/ath9k/eeprom_def.c
+++ b/drivers/net/wireless/ath/ath9k/eeprom_def.c
@@ -14,6 +14,7 @@
14 * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. 14 * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
15 */ 15 */
16 16
17#include <asm/unaligned.h>
17#include "hw.h" 18#include "hw.h"
18#include "ar9002_phy.h" 19#include "ar9002_phy.h"
19 20
@@ -276,11 +277,11 @@ static u32 ath9k_hw_def_get_eeprom(struct ath_hw *ah,
276 case EEP_NFTHRESH_2: 277 case EEP_NFTHRESH_2:
277 return pModal[1].noiseFloorThreshCh[0]; 278 return pModal[1].noiseFloorThreshCh[0];
278 case EEP_MAC_LSW: 279 case EEP_MAC_LSW:
279 return pBase->macAddr[0] << 8 | pBase->macAddr[1]; 280 return get_unaligned_be16(pBase->macAddr);
280 case EEP_MAC_MID: 281 case EEP_MAC_MID:
281 return pBase->macAddr[2] << 8 | pBase->macAddr[3]; 282 return get_unaligned_be16(pBase->macAddr + 2);
282 case EEP_MAC_MSW: 283 case EEP_MAC_MSW:
283 return pBase->macAddr[4] << 8 | pBase->macAddr[5]; 284 return get_unaligned_be16(pBase->macAddr + 4);
284 case EEP_REG_0: 285 case EEP_REG_0:
285 return pBase->regDmn[0]; 286 return pBase->regDmn[0];
286 case EEP_REG_1: 287 case EEP_REG_1:
@@ -831,10 +832,7 @@ static void ath9k_hw_set_def_power_cal_table(struct ath_hw *ah,
831 832
832 regOffset = AR_PHY_BASE + (672 << 2) + regChainOffset; 833 regOffset = AR_PHY_BASE + (672 << 2) + regChainOffset;
833 for (j = 0; j < 32; j++) { 834 for (j = 0; j < 32; j++) {
834 reg32 = ((pdadcValues[4 * j + 0] & 0xFF) << 0) | 835 reg32 = get_unaligned_le32(&pdadcValues[4 * j]);
835 ((pdadcValues[4 * j + 1] & 0xFF) << 8) |
836 ((pdadcValues[4 * j + 2] & 0xFF) << 16)|
837 ((pdadcValues[4 * j + 3] & 0xFF) << 24);
838 REG_WRITE(ah, regOffset, reg32); 836 REG_WRITE(ah, regOffset, reg32);
839 837
840 ath_dbg(common, ATH_DBG_EEPROM, 838 ath_dbg(common, ATH_DBG_EEPROM,
diff --git a/drivers/net/wireless/ath/ath9k/hif_usb.c b/drivers/net/wireless/ath/ath9k/hif_usb.c
index 8028fe90f666..d3f4a59cd456 100644
--- a/drivers/net/wireless/ath/ath9k/hif_usb.c
+++ b/drivers/net/wireless/ath/ath9k/hif_usb.c
@@ -14,6 +14,7 @@
14 * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. 14 * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
15 */ 15 */
16 16
17#include <asm/unaligned.h>
17#include "htc.h" 18#include "htc.h"
18 19
19/* identify firmware images */ 20/* identify firmware images */
@@ -129,12 +130,14 @@ static int hif_usb_send_regout(struct hif_device_usb *hif_dev,
129static void hif_usb_mgmt_cb(struct urb *urb) 130static void hif_usb_mgmt_cb(struct urb *urb)
130{ 131{
131 struct cmd_buf *cmd = (struct cmd_buf *)urb->context; 132 struct cmd_buf *cmd = (struct cmd_buf *)urb->context;
132 struct hif_device_usb *hif_dev = cmd->hif_dev; 133 struct hif_device_usb *hif_dev;
133 bool txok = true; 134 bool txok = true;
134 135
135 if (!cmd || !cmd->skb || !cmd->hif_dev) 136 if (!cmd || !cmd->skb || !cmd->hif_dev)
136 return; 137 return;
137 138
139 hif_dev = cmd->hif_dev;
140
138 switch (urb->status) { 141 switch (urb->status) {
139 case 0: 142 case 0:
140 break; 143 break;
@@ -557,8 +560,8 @@ static void ath9k_hif_usb_rx_stream(struct hif_device_usb *hif_dev,
557 560
558 ptr = (u8 *) skb->data; 561 ptr = (u8 *) skb->data;
559 562
560 pkt_len = ptr[index] + (ptr[index+1] << 8); 563 pkt_len = get_unaligned_le16(ptr + index);
561 pkt_tag = ptr[index+2] + (ptr[index+3] << 8); 564 pkt_tag = get_unaligned_le16(ptr + index + 2);
562 565
563 if (pkt_tag != ATH_USB_RX_STREAM_MODE_TAG) { 566 if (pkt_tag != ATH_USB_RX_STREAM_MODE_TAG) {
564 RX_STAT_INC(skb_dropped); 567 RX_STAT_INC(skb_dropped);
diff --git a/drivers/net/wireless/ath/ath9k/htc_drv_debug.c b/drivers/net/wireless/ath/ath9k/htc_drv_debug.c
index aa48b3abbc48..d3ff33c71aa5 100644
--- a/drivers/net/wireless/ath/ath9k/htc_drv_debug.c
+++ b/drivers/net/wireless/ath/ath9k/htc_drv_debug.c
@@ -623,11 +623,8 @@ static ssize_t read_file_base_eeprom(struct file *file, char __user *user_buf,
623 pBase9287->openLoopPwrCntl); 623 pBase9287->openLoopPwrCntl);
624 } 624 }
625 625
626 len += snprintf(buf + len, size - len, 626 len += snprintf(buf + len, size - len, "%20s : %pM\n", "MacAddress",
627 "%20s : %02X:%02X:%02X:%02X:%02X:%02X\n", 627 pBase->macAddr);
628 "MacAddress",
629 pBase->macAddr[0], pBase->macAddr[1], pBase->macAddr[2],
630 pBase->macAddr[3], pBase->macAddr[4], pBase->macAddr[5]);
631 if (len > size) 628 if (len > size)
632 len = size; 629 len = size;
633 630
diff --git a/drivers/net/wireless/ath/ath9k/hw.c b/drivers/net/wireless/ath/ath9k/hw.c
index 2a5f908d8037..8006ce0c7357 100644
--- a/drivers/net/wireless/ath/ath9k/hw.c
+++ b/drivers/net/wireless/ath/ath9k/hw.c
@@ -1997,12 +1997,22 @@ EXPORT_SYMBOL(ath9k_hw_set_sta_beacon_timers);
1997/* HW Capabilities */ 1997/* HW Capabilities */
1998/*******************/ 1998/*******************/
1999 1999
2000static u8 fixup_chainmask(u8 chip_chainmask, u8 eeprom_chainmask)
2001{
2002 eeprom_chainmask &= chip_chainmask;
2003 if (eeprom_chainmask)
2004 return eeprom_chainmask;
2005 else
2006 return chip_chainmask;
2007}
2008
2000int ath9k_hw_fill_cap_info(struct ath_hw *ah) 2009int ath9k_hw_fill_cap_info(struct ath_hw *ah)
2001{ 2010{
2002 struct ath9k_hw_capabilities *pCap = &ah->caps; 2011 struct ath9k_hw_capabilities *pCap = &ah->caps;
2003 struct ath_regulatory *regulatory = ath9k_hw_regulatory(ah); 2012 struct ath_regulatory *regulatory = ath9k_hw_regulatory(ah);
2004 struct ath_common *common = ath9k_hw_common(ah); 2013 struct ath_common *common = ath9k_hw_common(ah);
2005 struct ath_btcoex_hw *btcoex_hw = &ah->btcoex_hw; 2014 struct ath_btcoex_hw *btcoex_hw = &ah->btcoex_hw;
2015 unsigned int chip_chainmask;
2006 2016
2007 u16 eeval; 2017 u16 eeval;
2008 u8 ant_div_ctl1, tx_chainmask, rx_chainmask; 2018 u8 ant_div_ctl1, tx_chainmask, rx_chainmask;
@@ -2039,6 +2049,15 @@ int ath9k_hw_fill_cap_info(struct ath_hw *ah)
2039 if (eeval & AR5416_OPFLAGS_11G) 2049 if (eeval & AR5416_OPFLAGS_11G)
2040 pCap->hw_caps |= ATH9K_HW_CAP_2GHZ; 2050 pCap->hw_caps |= ATH9K_HW_CAP_2GHZ;
2041 2051
2052 if (AR_SREV_9485(ah) || AR_SREV_9285(ah) || AR_SREV_9330(ah))
2053 chip_chainmask = 1;
2054 else if (!AR_SREV_9280_20_OR_LATER(ah))
2055 chip_chainmask = 7;
2056 else if (!AR_SREV_9300_20_OR_LATER(ah) || AR_SREV_9340(ah))
2057 chip_chainmask = 3;
2058 else
2059 chip_chainmask = 7;
2060
2042 pCap->tx_chainmask = ah->eep_ops->get_eeprom(ah, EEP_TX_MASK); 2061 pCap->tx_chainmask = ah->eep_ops->get_eeprom(ah, EEP_TX_MASK);
2043 /* 2062 /*
2044 * For AR9271 we will temporarilly uses the rx chainmax as read from 2063 * For AR9271 we will temporarilly uses the rx chainmax as read from
@@ -2055,6 +2074,9 @@ int ath9k_hw_fill_cap_info(struct ath_hw *ah)
2055 /* Use rx_chainmask from EEPROM. */ 2074 /* Use rx_chainmask from EEPROM. */
2056 pCap->rx_chainmask = ah->eep_ops->get_eeprom(ah, EEP_RX_MASK); 2075 pCap->rx_chainmask = ah->eep_ops->get_eeprom(ah, EEP_RX_MASK);
2057 2076
2077 pCap->tx_chainmask = fixup_chainmask(chip_chainmask, pCap->tx_chainmask);
2078 pCap->rx_chainmask = fixup_chainmask(chip_chainmask, pCap->rx_chainmask);
2079
2058 ah->misc_mode |= AR_PCU_MIC_NEW_LOC_ENA; 2080 ah->misc_mode |= AR_PCU_MIC_NEW_LOC_ENA;
2059 2081
2060 /* enable key search for every frame in an aggregate */ 2082 /* enable key search for every frame in an aggregate */
diff --git a/drivers/net/wireless/ath/ath9k/init.c b/drivers/net/wireless/ath/ath9k/init.c
index b855fe1adc39..ac5107172f94 100644
--- a/drivers/net/wireless/ath/ath9k/init.c
+++ b/drivers/net/wireless/ath/ath9k/init.c
@@ -197,6 +197,19 @@ static unsigned int ath9k_ioread32(void *hw_priv, u32 reg_offset)
197 return val; 197 return val;
198} 198}
199 199
200static unsigned int __ath9k_reg_rmw(struct ath_softc *sc, u32 reg_offset,
201 u32 set, u32 clr)
202{
203 u32 val;
204
205 val = ioread32(sc->mem + reg_offset);
206 val &= ~clr;
207 val |= set;
208 iowrite32(val, sc->mem + reg_offset);
209
210 return val;
211}
212
200static unsigned int ath9k_reg_rmw(void *hw_priv, u32 reg_offset, u32 set, u32 clr) 213static unsigned int ath9k_reg_rmw(void *hw_priv, u32 reg_offset, u32 set, u32 clr)
201{ 214{
202 struct ath_hw *ah = (struct ath_hw *) hw_priv; 215 struct ath_hw *ah = (struct ath_hw *) hw_priv;
@@ -205,16 +218,12 @@ static unsigned int ath9k_reg_rmw(void *hw_priv, u32 reg_offset, u32 set, u32 cl
205 unsigned long uninitialized_var(flags); 218 unsigned long uninitialized_var(flags);
206 u32 val; 219 u32 val;
207 220
208 if (ah->config.serialize_regmode == SER_REG_MODE_ON) 221 if (ah->config.serialize_regmode == SER_REG_MODE_ON) {
209 spin_lock_irqsave(&sc->sc_serial_rw, flags); 222 spin_lock_irqsave(&sc->sc_serial_rw, flags);
210 223 val = __ath9k_reg_rmw(sc, reg_offset, set, clr);
211 val = ioread32(sc->mem + reg_offset);
212 val &= ~clr;
213 val |= set;
214 iowrite32(val, sc->mem + reg_offset);
215
216 if (ah->config.serialize_regmode == SER_REG_MODE_ON)
217 spin_unlock_irqrestore(&sc->sc_serial_rw, flags); 224 spin_unlock_irqrestore(&sc->sc_serial_rw, flags);
225 } else
226 val = __ath9k_reg_rmw(sc, reg_offset, set, clr);
218 227
219 return val; 228 return val;
220} 229}
diff --git a/drivers/net/wireless/ath/ath9k/recv.c b/drivers/net/wireless/ath/ath9k/recv.c
index 70dc8ecdad4d..9a4850154fb2 100644
--- a/drivers/net/wireless/ath/ath9k/recv.c
+++ b/drivers/net/wireless/ath/ath9k/recv.c
@@ -815,16 +815,19 @@ static bool ath9k_rx_accept(struct ath_common *common,
815 struct ath_rx_status *rx_stats, 815 struct ath_rx_status *rx_stats,
816 bool *decrypt_error) 816 bool *decrypt_error)
817{ 817{
818#define is_mc_or_valid_tkip_keyix ((is_mc || \ 818 bool is_mc, is_valid_tkip, strip_mic, mic_error;
819 (rx_stats->rs_keyix != ATH9K_RXKEYIX_INVALID && \
820 test_bit(rx_stats->rs_keyix, common->tkip_keymap))))
821
822 struct ath_hw *ah = common->ah; 819 struct ath_hw *ah = common->ah;
823 __le16 fc; 820 __le16 fc;
824 u8 rx_status_len = ah->caps.rx_status_len; 821 u8 rx_status_len = ah->caps.rx_status_len;
825 822
826 fc = hdr->frame_control; 823 fc = hdr->frame_control;
827 824
825 is_mc = !!is_multicast_ether_addr(hdr->addr1);
826 is_valid_tkip = rx_stats->rs_keyix != ATH9K_RXKEYIX_INVALID &&
827 test_bit(rx_stats->rs_keyix, common->tkip_keymap);
828 strip_mic = is_valid_tkip && !(rx_stats->rs_status &
829 (ATH9K_RXERR_DECRYPT | ATH9K_RXERR_CRC | ATH9K_RXERR_MIC));
830
828 if (!rx_stats->rs_datalen) 831 if (!rx_stats->rs_datalen)
829 return false; 832 return false;
830 /* 833 /*
@@ -839,6 +842,11 @@ static bool ath9k_rx_accept(struct ath_common *common,
839 if (rx_stats->rs_more) 842 if (rx_stats->rs_more)
840 return true; 843 return true;
841 844
845 mic_error = is_valid_tkip && !ieee80211_is_ctl(fc) &&
846 !ieee80211_has_morefrags(fc) &&
847 !(le16_to_cpu(hdr->seq_ctrl) & IEEE80211_SCTL_FRAG) &&
848 (rx_stats->rs_status & ATH9K_RXERR_MIC);
849
842 /* 850 /*
843 * The rx_stats->rs_status will not be set until the end of the 851 * The rx_stats->rs_status will not be set until the end of the
844 * chained descriptors so it can be ignored if rs_more is set. The 852 * chained descriptors so it can be ignored if rs_more is set. The
@@ -846,30 +854,18 @@ static bool ath9k_rx_accept(struct ath_common *common,
846 * descriptors. 854 * descriptors.
847 */ 855 */
848 if (rx_stats->rs_status != 0) { 856 if (rx_stats->rs_status != 0) {
849 if (rx_stats->rs_status & ATH9K_RXERR_CRC) 857 if (rx_stats->rs_status & ATH9K_RXERR_CRC) {
850 rxs->flag |= RX_FLAG_FAILED_FCS_CRC; 858 rxs->flag |= RX_FLAG_FAILED_FCS_CRC;
859 mic_error = false;
860 }
851 if (rx_stats->rs_status & ATH9K_RXERR_PHY) 861 if (rx_stats->rs_status & ATH9K_RXERR_PHY)
852 return false; 862 return false;
853 863
854 if (rx_stats->rs_status & ATH9K_RXERR_DECRYPT) { 864 if (rx_stats->rs_status & ATH9K_RXERR_DECRYPT) {
855 *decrypt_error = true; 865 *decrypt_error = true;
856 } else if (rx_stats->rs_status & ATH9K_RXERR_MIC) { 866 mic_error = false;
857 bool is_mc;
858 /*
859 * The MIC error bit is only valid if the frame
860 * is not a control frame or fragment, and it was
861 * decrypted using a valid TKIP key.
862 */
863 is_mc = !!is_multicast_ether_addr(hdr->addr1);
864
865 if (!ieee80211_is_ctl(fc) &&
866 !ieee80211_has_morefrags(fc) &&
867 !(le16_to_cpu(hdr->seq_ctrl) & IEEE80211_SCTL_FRAG) &&
868 is_mc_or_valid_tkip_keyix)
869 rxs->flag |= RX_FLAG_MMIC_ERROR;
870 else
871 rx_stats->rs_status &= ~ATH9K_RXERR_MIC;
872 } 867 }
868
873 /* 869 /*
874 * Reject error frames with the exception of 870 * Reject error frames with the exception of
875 * decryption and MIC failures. For monitor mode, 871 * decryption and MIC failures. For monitor mode,
@@ -887,6 +883,18 @@ static bool ath9k_rx_accept(struct ath_common *common,
887 } 883 }
888 } 884 }
889 } 885 }
886
887 /*
888 * For unicast frames the MIC error bit can have false positives,
889 * so all MIC error reports need to be validated in software.
890 * False negatives are not common, so skip software verification
891 * if the hardware considers the MIC valid.
892 */
893 if (strip_mic)
894 rxs->flag |= RX_FLAG_MMIC_STRIPPED;
895 else if (is_mc && mic_error)
896 rxs->flag |= RX_FLAG_MMIC_ERROR;
897
890 return true; 898 return true;
891} 899}
892 900
@@ -1939,6 +1947,9 @@ int ath_rx_tasklet(struct ath_softc *sc, int flush, bool hp)
1939 sc->rx.rxotherant = 0; 1947 sc->rx.rxotherant = 0;
1940 } 1948 }
1941 1949
1950 if (rxs->flag & RX_FLAG_MMIC_STRIPPED)
1951 skb_trim(skb, skb->len - 8);
1952
1942 spin_lock_irqsave(&sc->sc_pm_lock, flags); 1953 spin_lock_irqsave(&sc->sc_pm_lock, flags);
1943 1954
1944 if ((sc->ps_flags & (PS_WAIT_FOR_BEACON | 1955 if ((sc->ps_flags & (PS_WAIT_FOR_BEACON |
diff --git a/drivers/net/wireless/ath/ath9k/reg.h b/drivers/net/wireless/ath/ath9k/reg.h
index 759b72cca3cc..fa4c0bbce6b9 100644
--- a/drivers/net/wireless/ath/ath9k/reg.h
+++ b/drivers/net/wireless/ath/ath9k/reg.h
@@ -1873,29 +1873,6 @@ enum {
1873#define AR_RATE_DURATION(_n) (AR_RATE_DURATION_0 + ((_n)<<2)) 1873#define AR_RATE_DURATION(_n) (AR_RATE_DURATION_0 + ((_n)<<2))
1874 1874
1875 1875
1876#define AR_KEYTABLE_0 0x8800
1877#define AR_KEYTABLE(_n) (AR_KEYTABLE_0 + ((_n)*32))
1878#define AR_KEY_CACHE_SIZE 128
1879#define AR_RSVD_KEYTABLE_ENTRIES 4
1880#define AR_KEY_TYPE 0x00000007
1881#define AR_KEYTABLE_TYPE_40 0x00000000
1882#define AR_KEYTABLE_TYPE_104 0x00000001
1883#define AR_KEYTABLE_TYPE_128 0x00000003
1884#define AR_KEYTABLE_TYPE_TKIP 0x00000004
1885#define AR_KEYTABLE_TYPE_AES 0x00000005
1886#define AR_KEYTABLE_TYPE_CCM 0x00000006
1887#define AR_KEYTABLE_TYPE_CLR 0x00000007
1888#define AR_KEYTABLE_ANT 0x00000008
1889#define AR_KEYTABLE_VALID 0x00008000
1890#define AR_KEYTABLE_KEY0(_n) (AR_KEYTABLE(_n) + 0)
1891#define AR_KEYTABLE_KEY1(_n) (AR_KEYTABLE(_n) + 4)
1892#define AR_KEYTABLE_KEY2(_n) (AR_KEYTABLE(_n) + 8)
1893#define AR_KEYTABLE_KEY3(_n) (AR_KEYTABLE(_n) + 12)
1894#define AR_KEYTABLE_KEY4(_n) (AR_KEYTABLE(_n) + 16)
1895#define AR_KEYTABLE_TYPE(_n) (AR_KEYTABLE(_n) + 20)
1896#define AR_KEYTABLE_MAC0(_n) (AR_KEYTABLE(_n) + 24)
1897#define AR_KEYTABLE_MAC1(_n) (AR_KEYTABLE(_n) + 28)
1898
1899#define AR9271_CORE_CLOCK 117 /* clock to 117Mhz */ 1876#define AR9271_CORE_CLOCK 117 /* clock to 117Mhz */
1900#define AR9271_TARGET_BAUD_RATE 19200 /* 115200 */ 1877#define AR9271_TARGET_BAUD_RATE 19200 /* 115200 */
1901 1878
diff --git a/drivers/net/wireless/ath/ath9k/xmit.c b/drivers/net/wireless/ath/ath9k/xmit.c
index 6eb58b16ab06..cc595712f518 100644
--- a/drivers/net/wireless/ath/ath9k/xmit.c
+++ b/drivers/net/wireless/ath/ath9k/xmit.c
@@ -1148,6 +1148,8 @@ static bool bf_is_ampdu_not_probing(struct ath_buf *bf)
1148 1148
1149static void ath_drain_txq_list(struct ath_softc *sc, struct ath_txq *txq, 1149static void ath_drain_txq_list(struct ath_softc *sc, struct ath_txq *txq,
1150 struct list_head *list, bool retry_tx) 1150 struct list_head *list, bool retry_tx)
1151 __releases(txq->axq_lock)
1152 __acquires(txq->axq_lock)
1151{ 1153{
1152 struct ath_buf *bf, *lastbf; 1154 struct ath_buf *bf, *lastbf;
1153 struct list_head bf_head; 1155 struct list_head bf_head;
@@ -2036,6 +2038,8 @@ static void ath_tx_rc_status(struct ath_softc *sc, struct ath_buf *bf,
2036static void ath_tx_process_buffer(struct ath_softc *sc, struct ath_txq *txq, 2038static void ath_tx_process_buffer(struct ath_softc *sc, struct ath_txq *txq,
2037 struct ath_tx_status *ts, struct ath_buf *bf, 2039 struct ath_tx_status *ts, struct ath_buf *bf,
2038 struct list_head *bf_head) 2040 struct list_head *bf_head)
2041 __releases(txq->axq_lock)
2042 __acquires(txq->axq_lock)
2039{ 2043{
2040 int txok; 2044 int txok;
2041 2045
diff --git a/drivers/net/wireless/ath/carl9170/carl9170.h b/drivers/net/wireless/ath/carl9170/carl9170.h
index f9a4655ea0b8..c5427a72a1e2 100644
--- a/drivers/net/wireless/ath/carl9170/carl9170.h
+++ b/drivers/net/wireless/ath/carl9170/carl9170.h
@@ -177,7 +177,7 @@ struct carl9170_tx_queue_stats {
177 177
178struct carl9170_vif { 178struct carl9170_vif {
179 unsigned int id; 179 unsigned int id;
180 struct ieee80211_vif *vif; 180 struct ieee80211_vif __rcu *vif;
181}; 181};
182 182
183struct carl9170_vif_info { 183struct carl9170_vif_info {
@@ -311,7 +311,7 @@ struct ar9170 {
311 spinlock_t beacon_lock; 311 spinlock_t beacon_lock;
312 unsigned int global_pretbtt; 312 unsigned int global_pretbtt;
313 unsigned int global_beacon_int; 313 unsigned int global_beacon_int;
314 struct carl9170_vif_info *beacon_iter; 314 struct carl9170_vif_info __rcu *beacon_iter;
315 unsigned int beacon_enabled; 315 unsigned int beacon_enabled;
316 316
317 /* cryptographic engine */ 317 /* cryptographic engine */
@@ -389,7 +389,7 @@ struct ar9170 {
389 /* tx ampdu */ 389 /* tx ampdu */
390 struct work_struct ampdu_work; 390 struct work_struct ampdu_work;
391 spinlock_t tx_ampdu_list_lock; 391 spinlock_t tx_ampdu_list_lock;
392 struct carl9170_sta_tid *tx_ampdu_iter; 392 struct carl9170_sta_tid __rcu *tx_ampdu_iter;
393 struct list_head tx_ampdu_list; 393 struct list_head tx_ampdu_list;
394 atomic_t tx_ampdu_upload; 394 atomic_t tx_ampdu_upload;
395 atomic_t tx_ampdu_scheduler; 395 atomic_t tx_ampdu_scheduler;
@@ -456,7 +456,7 @@ struct carl9170_sta_info {
456 bool sleeping; 456 bool sleeping;
457 atomic_t pending_frames; 457 atomic_t pending_frames;
458 unsigned int ampdu_max_len; 458 unsigned int ampdu_max_len;
459 struct carl9170_sta_tid *agg[CARL9170_NUM_TID]; 459 struct carl9170_sta_tid __rcu *agg[CARL9170_NUM_TID];
460 struct carl9170_ba_stats stats[CARL9170_NUM_TID]; 460 struct carl9170_ba_stats stats[CARL9170_NUM_TID];
461}; 461};
462 462
@@ -532,7 +532,6 @@ int carl9170_set_ampdu_settings(struct ar9170 *ar);
532int carl9170_set_slot_time(struct ar9170 *ar); 532int carl9170_set_slot_time(struct ar9170 *ar);
533int carl9170_set_mac_rates(struct ar9170 *ar); 533int carl9170_set_mac_rates(struct ar9170 *ar);
534int carl9170_set_hwretry_limit(struct ar9170 *ar, const u32 max_retry); 534int carl9170_set_hwretry_limit(struct ar9170 *ar, const u32 max_retry);
535int carl9170_update_beacon(struct ar9170 *ar, const bool submit);
536int carl9170_upload_key(struct ar9170 *ar, const u8 id, const u8 *mac, 535int carl9170_upload_key(struct ar9170 *ar, const u8 id, const u8 *mac,
537 const u8 ktype, const u8 keyidx, const u8 *keydata, const int keylen); 536 const u8 ktype, const u8 keyidx, const u8 *keydata, const int keylen);
538int carl9170_disable_key(struct ar9170 *ar, const u8 id); 537int carl9170_disable_key(struct ar9170 *ar, const u8 id);
@@ -553,6 +552,7 @@ void carl9170_tx_drop(struct ar9170 *ar, struct sk_buff *skb);
553void carl9170_tx_scheduler(struct ar9170 *ar); 552void carl9170_tx_scheduler(struct ar9170 *ar);
554void carl9170_tx_get_skb(struct sk_buff *skb); 553void carl9170_tx_get_skb(struct sk_buff *skb);
555int carl9170_tx_put_skb(struct sk_buff *skb); 554int carl9170_tx_put_skb(struct sk_buff *skb);
555int carl9170_update_beacon(struct ar9170 *ar, const bool submit);
556 556
557/* LEDs */ 557/* LEDs */
558#ifdef CONFIG_CARL9170_LEDS 558#ifdef CONFIG_CARL9170_LEDS
diff --git a/drivers/net/wireless/ath/carl9170/cmd.h b/drivers/net/wireless/ath/carl9170/cmd.h
index 568174c71b94..d5f95bdc75c1 100644
--- a/drivers/net/wireless/ath/carl9170/cmd.h
+++ b/drivers/net/wireless/ath/carl9170/cmd.h
@@ -87,7 +87,7 @@ do { \
87 __ar->cmd_buf[2 * __nreg + 1] = cpu_to_le32(r); \ 87 __ar->cmd_buf[2 * __nreg + 1] = cpu_to_le32(r); \
88 __ar->cmd_buf[2 * __nreg + 2] = cpu_to_le32(v); \ 88 __ar->cmd_buf[2 * __nreg + 2] = cpu_to_le32(v); \
89 __nreg++; \ 89 __nreg++; \
90 if ((__nreg >= PAYLOAD_MAX/2)) { \ 90 if ((__nreg >= PAYLOAD_MAX / 2)) { \
91 if (IS_ACCEPTING_CMD(__ar)) \ 91 if (IS_ACCEPTING_CMD(__ar)) \
92 __err = carl9170_exec_cmd(__ar, \ 92 __err = carl9170_exec_cmd(__ar, \
93 CARL9170_CMD_WREG, 8 * __nreg, \ 93 CARL9170_CMD_WREG, 8 * __nreg, \
@@ -160,7 +160,7 @@ do { \
160} while (0) 160} while (0)
161 161
162#define carl9170_async_regwrite_finish() do { \ 162#define carl9170_async_regwrite_finish() do { \
163__async_regwrite_out : \ 163__async_regwrite_out: \
164 if (__cmd != NULL && __err == 0) \ 164 if (__cmd != NULL && __err == 0) \
165 carl9170_async_regwrite_flush(); \ 165 carl9170_async_regwrite_flush(); \
166 kfree(__cmd); \ 166 kfree(__cmd); \
diff --git a/drivers/net/wireless/ath/carl9170/debug.c b/drivers/net/wireless/ath/carl9170/debug.c
index 0ac1124c2a0b..de57f90e1d5f 100644
--- a/drivers/net/wireless/ath/carl9170/debug.c
+++ b/drivers/net/wireless/ath/carl9170/debug.c
@@ -695,7 +695,7 @@ static char *carl9170_debugfs_bug_read(struct ar9170 *ar, char *buf,
695} 695}
696__DEBUGFS_DECLARE_RW_FILE(bug, 400, CARL9170_STOPPED); 696__DEBUGFS_DECLARE_RW_FILE(bug, 400, CARL9170_STOPPED);
697 697
698static const char *erp_modes[] = { 698static const char *const erp_modes[] = {
699 [CARL9170_ERP_INVALID] = "INVALID", 699 [CARL9170_ERP_INVALID] = "INVALID",
700 [CARL9170_ERP_AUTO] = "Automatic", 700 [CARL9170_ERP_AUTO] = "Automatic",
701 [CARL9170_ERP_MAC80211] = "Set by MAC80211", 701 [CARL9170_ERP_MAC80211] = "Set by MAC80211",
diff --git a/drivers/net/wireless/ath/carl9170/fwdesc.h b/drivers/net/wireless/ath/carl9170/fwdesc.h
index 7ba62bb77054..6d9c0891ce7f 100644
--- a/drivers/net/wireless/ath/carl9170/fwdesc.h
+++ b/drivers/net/wireless/ath/carl9170/fwdesc.h
@@ -75,6 +75,9 @@ enum carl9170fw_feature_list {
75 /* Firmware supports PSM in the 5GHZ Band */ 75 /* Firmware supports PSM in the 5GHZ Band */
76 CARL9170FW_FIXED_5GHZ_PSM, 76 CARL9170FW_FIXED_5GHZ_PSM,
77 77
78 /* HW (ANI, CCA, MIB) tally counters */
79 CARL9170FW_HW_COUNTERS,
80
78 /* KEEP LAST */ 81 /* KEEP LAST */
79 __CARL9170FW_FEATURE_NUM 82 __CARL9170FW_FEATURE_NUM
80}; 83};
diff --git a/drivers/net/wireless/ath/carl9170/hw.h b/drivers/net/wireless/ath/carl9170/hw.h
index 261f89351070..fa834c1460f0 100644
--- a/drivers/net/wireless/ath/carl9170/hw.h
+++ b/drivers/net/wireless/ath/carl9170/hw.h
@@ -174,6 +174,7 @@
174#define AR9170_MAC_SNIFFER_ENABLE_PROMISC BIT(0) 174#define AR9170_MAC_SNIFFER_ENABLE_PROMISC BIT(0)
175#define AR9170_MAC_SNIFFER_DEFAULTS 0x02000000 175#define AR9170_MAC_SNIFFER_DEFAULTS 0x02000000
176#define AR9170_MAC_REG_ENCRYPTION (AR9170_MAC_REG_BASE + 0x678) 176#define AR9170_MAC_REG_ENCRYPTION (AR9170_MAC_REG_BASE + 0x678)
177#define AR9170_MAC_ENCRYPTION_MGMT_RX_SOFTWARE BIT(2)
177#define AR9170_MAC_ENCRYPTION_RX_SOFTWARE BIT(3) 178#define AR9170_MAC_ENCRYPTION_RX_SOFTWARE BIT(3)
178#define AR9170_MAC_ENCRYPTION_DEFAULTS 0x70 179#define AR9170_MAC_ENCRYPTION_DEFAULTS 0x70
179 180
@@ -222,6 +223,12 @@
222#define AR9170_MAC_REG_TX_BLOCKACKS (AR9170_MAC_REG_BASE + 0x6c0) 223#define AR9170_MAC_REG_TX_BLOCKACKS (AR9170_MAC_REG_BASE + 0x6c0)
223#define AR9170_MAC_REG_NAV_COUNT (AR9170_MAC_REG_BASE + 0x6c4) 224#define AR9170_MAC_REG_NAV_COUNT (AR9170_MAC_REG_BASE + 0x6c4)
224#define AR9170_MAC_REG_BACKOFF_STATUS (AR9170_MAC_REG_BASE + 0x6c8) 225#define AR9170_MAC_REG_BACKOFF_STATUS (AR9170_MAC_REG_BASE + 0x6c8)
226#define AR9170_MAC_BACKOFF_CCA BIT(24)
227#define AR9170_MAC_BACKOFF_TX_PEX BIT(25)
228#define AR9170_MAC_BACKOFF_RX_PE BIT(26)
229#define AR9170_MAC_BACKOFF_MD_READY BIT(27)
230#define AR9170_MAC_BACKOFF_TX_PE BIT(28)
231
225#define AR9170_MAC_REG_TX_RETRY (AR9170_MAC_REG_BASE + 0x6cc) 232#define AR9170_MAC_REG_TX_RETRY (AR9170_MAC_REG_BASE + 0x6cc)
226 233
227#define AR9170_MAC_REG_TX_COMPLETE (AR9170_MAC_REG_BASE + 0x6d4) 234#define AR9170_MAC_REG_TX_COMPLETE (AR9170_MAC_REG_BASE + 0x6d4)
@@ -388,10 +395,40 @@
388 395
389#define AR9170_MAC_REG_BCN_CURR_ADDR (AR9170_MAC_REG_BASE + 0xd98) 396#define AR9170_MAC_REG_BCN_CURR_ADDR (AR9170_MAC_REG_BASE + 0xd98)
390#define AR9170_MAC_REG_BCN_COUNT (AR9170_MAC_REG_BASE + 0xd9c) 397#define AR9170_MAC_REG_BCN_COUNT (AR9170_MAC_REG_BASE + 0xd9c)
391
392
393#define AR9170_MAC_REG_BCN_HT1 (AR9170_MAC_REG_BASE + 0xda0) 398#define AR9170_MAC_REG_BCN_HT1 (AR9170_MAC_REG_BASE + 0xda0)
399#define AR9170_MAC_BCN_HT1_HT_EN BIT(0)
400#define AR9170_MAC_BCN_HT1_GF_PMB BIT(1)
401#define AR9170_MAC_BCN_HT1_SP_EXP BIT(2)
402#define AR9170_MAC_BCN_HT1_TX_BF BIT(3)
403#define AR9170_MAC_BCN_HT1_PWR_CTRL_S 4
404#define AR9170_MAC_BCN_HT1_PWR_CTRL 0x70
405#define AR9170_MAC_BCN_HT1_TX_ANT1 BIT(7)
406#define AR9170_MAC_BCN_HT1_TX_ANT0 BIT(8)
407#define AR9170_MAC_BCN_HT1_NUM_LFT_S 9
408#define AR9170_MAC_BCN_HT1_NUM_LFT 0x600
409#define AR9170_MAC_BCN_HT1_BWC_20M_EXT BIT(16)
410#define AR9170_MAC_BCN_HT1_BWC_40M_SHARED BIT(17)
411#define AR9170_MAC_BCN_HT1_BWC_40M_DUP (BIT(16) | BIT(17))
412#define AR9170_MAC_BCN_HT1_BF_MCS_S 18
413#define AR9170_MAC_BCN_HT1_BF_MCS 0x1c0000
414#define AR9170_MAC_BCN_HT1_TPC_S 21
415#define AR9170_MAC_BCN_HT1_TPC 0x7e00000
416#define AR9170_MAC_BCN_HT1_CHAIN_MASK_S 27
417#define AR9170_MAC_BCN_HT1_CHAIN_MASK 0x38000000
418
394#define AR9170_MAC_REG_BCN_HT2 (AR9170_MAC_REG_BASE + 0xda4) 419#define AR9170_MAC_REG_BCN_HT2 (AR9170_MAC_REG_BASE + 0xda4)
420#define AR9170_MAC_BCN_HT2_MCS_S 0
421#define AR9170_MAC_BCN_HT2_MCS 0x7f
422#define AR9170_MAC_BCN_HT2_BW40 BIT(8)
423#define AR9170_MAC_BCN_HT2_SMOOTHING BIT(9)
424#define AR9170_MAC_BCN_HT2_SS BIT(10)
425#define AR9170_MAC_BCN_HT2_NSS BIT(11)
426#define AR9170_MAC_BCN_HT2_STBC_S 12
427#define AR9170_MAC_BCN_HT2_STBC 0x3000
428#define AR9170_MAC_BCN_HT2_ADV_COD BIT(14)
429#define AR9170_MAC_BCN_HT2_SGI BIT(15)
430#define AR9170_MAC_BCN_HT2_LEN_S 16
431#define AR9170_MAC_BCN_HT2_LEN 0xffff0000
395 432
396#define AR9170_MAC_REG_DMA_TXQX_ADDR_CURR (AR9170_MAC_REG_BASE + 0xdc0) 433#define AR9170_MAC_REG_DMA_TXQX_ADDR_CURR (AR9170_MAC_REG_BASE + 0xdc0)
397 434
diff --git a/drivers/net/wireless/ath/carl9170/led.c b/drivers/net/wireless/ath/carl9170/led.c
index 4bb2cbd8bd9b..78dadc797558 100644
--- a/drivers/net/wireless/ath/carl9170/led.c
+++ b/drivers/net/wireless/ath/carl9170/led.c
@@ -118,7 +118,7 @@ static void carl9170_led_set_brightness(struct led_classdev *led,
118 } 118 }
119 119
120 if (likely(IS_ACCEPTING_CMD(ar) && arl->toggled)) 120 if (likely(IS_ACCEPTING_CMD(ar) && arl->toggled))
121 ieee80211_queue_delayed_work(ar->hw, &ar->led_work, HZ/10); 121 ieee80211_queue_delayed_work(ar->hw, &ar->led_work, HZ / 10);
122} 122}
123 123
124static int carl9170_led_register_led(struct ar9170 *ar, int i, char *name, 124static int carl9170_led_register_led(struct ar9170 *ar, int i, char *name,
diff --git a/drivers/net/wireless/ath/carl9170/mac.c b/drivers/net/wireless/ath/carl9170/mac.c
index 385cf508479b..dfda91970995 100644
--- a/drivers/net/wireless/ath/carl9170/mac.c
+++ b/drivers/net/wireless/ath/carl9170/mac.c
@@ -455,135 +455,6 @@ int carl9170_set_beacon_timers(struct ar9170 *ar)
455 return carl9170_regwrite_result(); 455 return carl9170_regwrite_result();
456} 456}
457 457
458int carl9170_update_beacon(struct ar9170 *ar, const bool submit)
459{
460 struct sk_buff *skb = NULL;
461 struct carl9170_vif_info *cvif;
462 struct ieee80211_tx_info *txinfo;
463 __le32 *data, *old = NULL;
464 u32 word, off, addr, len;
465 int i = 0, err = 0;
466
467 rcu_read_lock();
468 cvif = rcu_dereference(ar->beacon_iter);
469retry:
470 if (ar->vifs == 0 || !cvif)
471 goto out_unlock;
472
473 list_for_each_entry_continue_rcu(cvif, &ar->vif_list, list) {
474 if (cvif->active && cvif->enable_beacon)
475 goto found;
476 }
477
478 if (!ar->beacon_enabled || i++)
479 goto out_unlock;
480
481 goto retry;
482
483found:
484 rcu_assign_pointer(ar->beacon_iter, cvif);
485
486 skb = ieee80211_beacon_get_tim(ar->hw, carl9170_get_vif(cvif),
487 NULL, NULL);
488
489 if (!skb) {
490 err = -ENOMEM;
491 goto err_free;
492 }
493
494 txinfo = IEEE80211_SKB_CB(skb);
495 if (txinfo->control.rates[0].flags & IEEE80211_TX_RC_MCS) {
496 err = -EINVAL;
497 goto err_free;
498 }
499
500 spin_lock_bh(&ar->beacon_lock);
501 data = (__le32 *)skb->data;
502 if (cvif->beacon)
503 old = (__le32 *)cvif->beacon->data;
504
505 off = cvif->id * AR9170_MAC_BCN_LENGTH_MAX;
506 addr = ar->fw.beacon_addr + off;
507 len = roundup(skb->len + FCS_LEN, 4);
508
509 if ((off + len) > ar->fw.beacon_max_len) {
510 if (net_ratelimit()) {
511 wiphy_err(ar->hw->wiphy, "beacon does not "
512 "fit into device memory!\n");
513 }
514 err = -EINVAL;
515 goto err_unlock;
516 }
517
518 if (len > AR9170_MAC_BCN_LENGTH_MAX) {
519 if (net_ratelimit()) {
520 wiphy_err(ar->hw->wiphy, "no support for beacons "
521 "bigger than %d (yours:%d).\n",
522 AR9170_MAC_BCN_LENGTH_MAX, len);
523 }
524
525 err = -EMSGSIZE;
526 goto err_unlock;
527 }
528
529 i = txinfo->control.rates[0].idx;
530 if (txinfo->band != IEEE80211_BAND_2GHZ)
531 i += 4;
532
533 word = __carl9170_ratetable[i].hw_value & 0xf;
534 if (i < 4)
535 word |= ((skb->len + FCS_LEN) << (3 + 16)) + 0x0400;
536 else
537 word |= ((skb->len + FCS_LEN) << 16) + 0x0010;
538
539 carl9170_async_regwrite_begin(ar);
540 carl9170_async_regwrite(AR9170_MAC_REG_BCN_PLCP, word);
541
542 for (i = 0; i < DIV_ROUND_UP(skb->len, 4); i++) {
543 /*
544 * XXX: This accesses beyond skb data for up
545 * to the last 3 bytes!!
546 */
547
548 if (old && (data[i] == old[i]))
549 continue;
550
551 word = le32_to_cpu(data[i]);
552 carl9170_async_regwrite(addr + 4 * i, word);
553 }
554 carl9170_async_regwrite_finish();
555
556 dev_kfree_skb_any(cvif->beacon);
557 cvif->beacon = NULL;
558
559 err = carl9170_async_regwrite_result();
560 if (!err)
561 cvif->beacon = skb;
562 spin_unlock_bh(&ar->beacon_lock);
563 if (err)
564 goto err_free;
565
566 if (submit) {
567 err = carl9170_bcn_ctrl(ar, cvif->id,
568 CARL9170_BCN_CTRL_CAB_TRIGGER,
569 addr, skb->len + FCS_LEN);
570
571 if (err)
572 goto err_free;
573 }
574out_unlock:
575 rcu_read_unlock();
576 return 0;
577
578err_unlock:
579 spin_unlock_bh(&ar->beacon_lock);
580
581err_free:
582 rcu_read_unlock();
583 dev_kfree_skb_any(skb);
584 return err;
585}
586
587int carl9170_upload_key(struct ar9170 *ar, const u8 id, const u8 *mac, 458int carl9170_upload_key(struct ar9170 *ar, const u8 id, const u8 *mac,
588 const u8 ktype, const u8 keyidx, const u8 *keydata, 459 const u8 ktype, const u8 keyidx, const u8 *keydata,
589 const int keylen) 460 const int keylen)
diff --git a/drivers/net/wireless/ath/carl9170/main.c b/drivers/net/wireless/ath/carl9170/main.c
index a61cf6781d5e..0122930b14c7 100644
--- a/drivers/net/wireless/ath/carl9170/main.c
+++ b/drivers/net/wireless/ath/carl9170/main.c
@@ -1630,7 +1630,7 @@ static int carl9170_read_eeprom(struct ar9170 *ar)
1630 BUILD_BUG_ON(sizeof(ar->eeprom) % RB); 1630 BUILD_BUG_ON(sizeof(ar->eeprom) % RB);
1631#endif 1631#endif
1632 1632
1633 for (i = 0; i < sizeof(ar->eeprom)/RB; i++) { 1633 for (i = 0; i < sizeof(ar->eeprom) / RB; i++) {
1634 for (j = 0; j < RW; j++) 1634 for (j = 0; j < RW; j++)
1635 offsets[j] = cpu_to_le32(AR9170_EEPROM_START + 1635 offsets[j] = cpu_to_le32(AR9170_EEPROM_START +
1636 RB * i + 4 * j); 1636 RB * i + 4 * j);
diff --git a/drivers/net/wireless/ath/carl9170/phy.c b/drivers/net/wireless/ath/carl9170/phy.c
index da1ab962ee48..aa147a9120b6 100644
--- a/drivers/net/wireless/ath/carl9170/phy.c
+++ b/drivers/net/wireless/ath/carl9170/phy.c
@@ -1098,7 +1098,7 @@ static u8 carl9170_interpolate_u8(u8 x, u8 x1, u8 y1, u8 x2, u8 y2)
1098 * Isn't it just DIV_ROUND_UP(y, 1<<SHIFT)? 1098 * Isn't it just DIV_ROUND_UP(y, 1<<SHIFT)?
1099 * Can we rely on the compiler to optimise away the div? 1099 * Can we rely on the compiler to optimise away the div?
1100 */ 1100 */
1101 return (y >> SHIFT) + ((y & (1<<(SHIFT-1))) >> (SHIFT - 1)); 1101 return (y >> SHIFT) + ((y & (1 << (SHIFT - 1))) >> (SHIFT - 1));
1102#undef SHIFT 1102#undef SHIFT
1103} 1103}
1104 1104
@@ -1379,7 +1379,7 @@ static void carl9170_calc_ctl(struct ar9170 *ar, u32 freq, enum carl9170_bw bw)
1379 1379
1380 modes[i].max_power = 1380 modes[i].max_power =
1381 carl9170_get_max_edge_power(ar, 1381 carl9170_get_max_edge_power(ar,
1382 freq+f_off, EDGES(ctl_idx, 1)); 1382 freq + f_off, EDGES(ctl_idx, 1));
1383 1383
1384 /* 1384 /*
1385 * TODO: check if the regulatory max. power is 1385 * TODO: check if the regulatory max. power is
@@ -1441,7 +1441,7 @@ static int carl9170_set_power_cal(struct ar9170 *ar, u32 freq,
1441 if (freq < 3000) 1441 if (freq < 3000)
1442 f = freq - 2300; 1442 f = freq - 2300;
1443 else 1443 else
1444 f = (freq - 4800)/5; 1444 f = (freq - 4800) / 5;
1445 1445
1446 /* 1446 /*
1447 * cycle through the various modes 1447 * cycle through the various modes
diff --git a/drivers/net/wireless/ath/carl9170/tx.c b/drivers/net/wireless/ath/carl9170/tx.c
index e94084fcf6f5..d20946939cd8 100644
--- a/drivers/net/wireless/ath/carl9170/tx.c
+++ b/drivers/net/wireless/ath/carl9170/tx.c
@@ -661,11 +661,67 @@ void carl9170_tx_process_status(struct ar9170 *ar,
661 } 661 }
662} 662}
663 663
664static void carl9170_tx_rate_tpc_chains(struct ar9170 *ar,
665 struct ieee80211_tx_info *info, struct ieee80211_tx_rate *txrate,
666 unsigned int *phyrate, unsigned int *tpc, unsigned int *chains)
667{
668 struct ieee80211_rate *rate = NULL;
669 u8 *txpower;
670 unsigned int idx;
671
672 idx = txrate->idx;
673 *tpc = 0;
674 *phyrate = 0;
675
676 if (txrate->flags & IEEE80211_TX_RC_MCS) {
677 if (txrate->flags & IEEE80211_TX_RC_40_MHZ_WIDTH) {
678 /* +1 dBm for HT40 */
679 *tpc += 2;
680
681 if (info->band == IEEE80211_BAND_2GHZ)
682 txpower = ar->power_2G_ht40;
683 else
684 txpower = ar->power_5G_ht40;
685 } else {
686 if (info->band == IEEE80211_BAND_2GHZ)
687 txpower = ar->power_2G_ht20;
688 else
689 txpower = ar->power_5G_ht20;
690 }
691
692 *phyrate = txrate->idx;
693 *tpc += txpower[idx & 7];
694 } else {
695 if (info->band == IEEE80211_BAND_2GHZ) {
696 if (idx < 4)
697 txpower = ar->power_2G_cck;
698 else
699 txpower = ar->power_2G_ofdm;
700 } else {
701 txpower = ar->power_5G_leg;
702 idx += 4;
703 }
704
705 rate = &__carl9170_ratetable[idx];
706 *tpc += txpower[(rate->hw_value & 0x30) >> 4];
707 *phyrate = rate->hw_value & 0xf;
708 }
709
710 if (ar->eeprom.tx_mask == 1) {
711 *chains = AR9170_TX_PHY_TXCHAIN_1;
712 } else {
713 if (!(txrate->flags & IEEE80211_TX_RC_MCS) &&
714 rate && rate->bitrate >= 360)
715 *chains = AR9170_TX_PHY_TXCHAIN_1;
716 else
717 *chains = AR9170_TX_PHY_TXCHAIN_2;
718 }
719}
720
664static __le32 carl9170_tx_physet(struct ar9170 *ar, 721static __le32 carl9170_tx_physet(struct ar9170 *ar,
665 struct ieee80211_tx_info *info, struct ieee80211_tx_rate *txrate) 722 struct ieee80211_tx_info *info, struct ieee80211_tx_rate *txrate)
666{ 723{
667 struct ieee80211_rate *rate = NULL; 724 unsigned int power = 0, chains = 0, phyrate = 0;
668 u32 power, chains;
669 __le32 tmp; 725 __le32 tmp;
670 726
671 tmp = cpu_to_le32(0); 727 tmp = cpu_to_le32(0);
@@ -682,35 +738,12 @@ static __le32 carl9170_tx_physet(struct ar9170 *ar,
682 tmp |= cpu_to_le32(AR9170_TX_PHY_SHORT_GI); 738 tmp |= cpu_to_le32(AR9170_TX_PHY_SHORT_GI);
683 739
684 if (txrate->flags & IEEE80211_TX_RC_MCS) { 740 if (txrate->flags & IEEE80211_TX_RC_MCS) {
685 u32 r = txrate->idx; 741 SET_VAL(AR9170_TX_PHY_MCS, phyrate, txrate->idx);
686 u8 *txpower;
687 742
688 /* heavy clip control */ 743 /* heavy clip control */
689 tmp |= cpu_to_le32((r & 0x7) << 744 tmp |= cpu_to_le32((txrate->idx & 0x7) <<
690 AR9170_TX_PHY_TX_HEAVY_CLIP_S); 745 AR9170_TX_PHY_TX_HEAVY_CLIP_S);
691 746
692 if (txrate->flags & IEEE80211_TX_RC_40_MHZ_WIDTH) {
693 if (info->band == IEEE80211_BAND_5GHZ)
694 txpower = ar->power_5G_ht40;
695 else
696 txpower = ar->power_2G_ht40;
697 } else {
698 if (info->band == IEEE80211_BAND_5GHZ)
699 txpower = ar->power_5G_ht20;
700 else
701 txpower = ar->power_2G_ht20;
702 }
703
704 power = txpower[r & 7];
705
706 /* +1 dBm for HT40 */
707 if (txrate->flags & IEEE80211_TX_RC_40_MHZ_WIDTH)
708 power += 2;
709
710 r <<= AR9170_TX_PHY_MCS_S;
711 BUG_ON(r & ~AR9170_TX_PHY_MCS);
712
713 tmp |= cpu_to_le32(r & AR9170_TX_PHY_MCS);
714 tmp |= cpu_to_le32(AR9170_TX_PHY_MOD_HT); 747 tmp |= cpu_to_le32(AR9170_TX_PHY_MOD_HT);
715 748
716 /* 749 /*
@@ -720,34 +753,15 @@ static __le32 carl9170_tx_physet(struct ar9170 *ar,
720 * tmp |= cpu_to_le32(AR9170_TX_PHY_GREENFIELD); 753 * tmp |= cpu_to_le32(AR9170_TX_PHY_GREENFIELD);
721 */ 754 */
722 } else { 755 } else {
723 u8 *txpower; 756 if (info->band == IEEE80211_BAND_2GHZ) {
724 u32 mod; 757 if (txrate->idx <= AR9170_TX_PHY_RATE_CCK_11M)
725 u32 phyrate; 758 tmp |= cpu_to_le32(AR9170_TX_PHY_MOD_CCK);
726 u8 idx = txrate->idx; 759 else
727 760 tmp |= cpu_to_le32(AR9170_TX_PHY_MOD_OFDM);
728 if (info->band != IEEE80211_BAND_2GHZ) {
729 idx += 4;
730 txpower = ar->power_5G_leg;
731 mod = AR9170_TX_PHY_MOD_OFDM;
732 } else { 761 } else {
733 if (idx < 4) { 762 tmp |= cpu_to_le32(AR9170_TX_PHY_MOD_OFDM);
734 txpower = ar->power_2G_cck;
735 mod = AR9170_TX_PHY_MOD_CCK;
736 } else {
737 mod = AR9170_TX_PHY_MOD_OFDM;
738 txpower = ar->power_2G_ofdm;
739 }
740 } 763 }
741 764
742 rate = &__carl9170_ratetable[idx];
743
744 phyrate = rate->hw_value & 0xF;
745 power = txpower[(rate->hw_value & 0x30) >> 4];
746 phyrate <<= AR9170_TX_PHY_MCS_S;
747
748 tmp |= cpu_to_le32(mod);
749 tmp |= cpu_to_le32(phyrate);
750
751 /* 765 /*
752 * short preamble seems to be broken too. 766 * short preamble seems to be broken too.
753 * 767 *
@@ -755,23 +769,12 @@ static __le32 carl9170_tx_physet(struct ar9170 *ar,
755 * tmp |= cpu_to_le32(AR9170_TX_PHY_SHORT_PREAMBLE); 769 * tmp |= cpu_to_le32(AR9170_TX_PHY_SHORT_PREAMBLE);
756 */ 770 */
757 } 771 }
758 power <<= AR9170_TX_PHY_TX_PWR_S; 772 carl9170_tx_rate_tpc_chains(ar, info, txrate,
759 power &= AR9170_TX_PHY_TX_PWR; 773 &phyrate, &power, &chains);
760 tmp |= cpu_to_le32(power);
761
762 /* set TX chains */
763 if (ar->eeprom.tx_mask == 1) {
764 chains = AR9170_TX_PHY_TXCHAIN_1;
765 } else {
766 chains = AR9170_TX_PHY_TXCHAIN_2;
767
768 /* >= 36M legacy OFDM - use only one chain */
769 if (rate && rate->bitrate >= 360 &&
770 !(txrate->flags & IEEE80211_TX_RC_MCS))
771 chains = AR9170_TX_PHY_TXCHAIN_1;
772 }
773 tmp |= cpu_to_le32(chains << AR9170_TX_PHY_TXCHAIN_S);
774 774
775 tmp |= cpu_to_le32(SET_CONSTVAL(AR9170_TX_PHY_MCS, phyrate));
776 tmp |= cpu_to_le32(SET_CONSTVAL(AR9170_TX_PHY_TX_PWR, power));
777 tmp |= cpu_to_le32(SET_CONSTVAL(AR9170_TX_PHY_TXCHAIN, chains));
775 return tmp; 778 return tmp;
776} 779}
777 780
@@ -1438,3 +1441,154 @@ void carl9170_tx_scheduler(struct ar9170 *ar)
1438 if (ar->tx_schedule) 1441 if (ar->tx_schedule)
1439 carl9170_tx(ar); 1442 carl9170_tx(ar);
1440} 1443}
1444
1445int carl9170_update_beacon(struct ar9170 *ar, const bool submit)
1446{
1447 struct sk_buff *skb = NULL;
1448 struct carl9170_vif_info *cvif;
1449 struct ieee80211_tx_info *txinfo;
1450 struct ieee80211_tx_rate *rate;
1451 __le32 *data, *old = NULL;
1452 unsigned int plcp, power, chains;
1453 u32 word, ht1, off, addr, len;
1454 int i = 0, err = 0;
1455
1456 rcu_read_lock();
1457 cvif = rcu_dereference(ar->beacon_iter);
1458retry:
1459 if (ar->vifs == 0 || !cvif)
1460 goto out_unlock;
1461
1462 list_for_each_entry_continue_rcu(cvif, &ar->vif_list, list) {
1463 if (cvif->active && cvif->enable_beacon)
1464 goto found;
1465 }
1466
1467 if (!ar->beacon_enabled || i++)
1468 goto out_unlock;
1469
1470 goto retry;
1471
1472found:
1473 rcu_assign_pointer(ar->beacon_iter, cvif);
1474
1475 skb = ieee80211_beacon_get_tim(ar->hw, carl9170_get_vif(cvif),
1476 NULL, NULL);
1477
1478 if (!skb) {
1479 err = -ENOMEM;
1480 goto err_free;
1481 }
1482
1483 txinfo = IEEE80211_SKB_CB(skb);
1484 spin_lock_bh(&ar->beacon_lock);
1485 data = (__le32 *)skb->data;
1486 if (cvif->beacon)
1487 old = (__le32 *)cvif->beacon->data;
1488
1489 off = cvif->id * AR9170_MAC_BCN_LENGTH_MAX;
1490 addr = ar->fw.beacon_addr + off;
1491 len = roundup(skb->len + FCS_LEN, 4);
1492
1493 if ((off + len) > ar->fw.beacon_max_len) {
1494 if (net_ratelimit()) {
1495 wiphy_err(ar->hw->wiphy, "beacon does not "
1496 "fit into device memory!\n");
1497 }
1498 err = -EINVAL;
1499 goto err_unlock;
1500 }
1501
1502 if (len > AR9170_MAC_BCN_LENGTH_MAX) {
1503 if (net_ratelimit()) {
1504 wiphy_err(ar->hw->wiphy, "no support for beacons "
1505 "bigger than %d (yours:%d).\n",
1506 AR9170_MAC_BCN_LENGTH_MAX, len);
1507 }
1508
1509 err = -EMSGSIZE;
1510 goto err_unlock;
1511 }
1512
1513 ht1 = AR9170_MAC_BCN_HT1_TX_ANT0;
1514 rate = &txinfo->control.rates[0];
1515 carl9170_tx_rate_tpc_chains(ar, txinfo, rate, &plcp, &power, &chains);
1516 if (!(txinfo->control.rates[0].flags & IEEE80211_TX_RC_MCS)) {
1517 if (plcp <= AR9170_TX_PHY_RATE_CCK_11M)
1518 plcp |= ((skb->len + FCS_LEN) << (3 + 16)) + 0x0400;
1519 else
1520 plcp |= ((skb->len + FCS_LEN) << 16) + 0x0010;
1521 } else {
1522 ht1 |= AR9170_MAC_BCN_HT1_HT_EN;
1523 if (rate->flags & IEEE80211_TX_RC_SHORT_GI)
1524 plcp |= AR9170_MAC_BCN_HT2_SGI;
1525
1526 if (rate->flags & IEEE80211_TX_RC_40_MHZ_WIDTH) {
1527 ht1 |= AR9170_MAC_BCN_HT1_BWC_40M_SHARED;
1528 plcp |= AR9170_MAC_BCN_HT2_BW40;
1529 }
1530 if (rate->flags & IEEE80211_TX_RC_DUP_DATA) {
1531 ht1 |= AR9170_MAC_BCN_HT1_BWC_40M_DUP;
1532 plcp |= AR9170_MAC_BCN_HT2_BW40;
1533 }
1534
1535 SET_VAL(AR9170_MAC_BCN_HT2_LEN, plcp, skb->len + FCS_LEN);
1536 }
1537
1538 SET_VAL(AR9170_MAC_BCN_HT1_PWR_CTRL, ht1, 7);
1539 SET_VAL(AR9170_MAC_BCN_HT1_TPC, ht1, power);
1540 SET_VAL(AR9170_MAC_BCN_HT1_CHAIN_MASK, ht1, chains);
1541 if (chains == AR9170_TX_PHY_TXCHAIN_2)
1542 ht1 |= AR9170_MAC_BCN_HT1_TX_ANT1;
1543
1544 carl9170_async_regwrite_begin(ar);
1545 carl9170_async_regwrite(AR9170_MAC_REG_BCN_HT1, ht1);
1546 if (!(txinfo->control.rates[0].flags & IEEE80211_TX_RC_MCS))
1547 carl9170_async_regwrite(AR9170_MAC_REG_BCN_PLCP, plcp);
1548 else
1549 carl9170_async_regwrite(AR9170_MAC_REG_BCN_HT2, plcp);
1550
1551 for (i = 0; i < DIV_ROUND_UP(skb->len, 4); i++) {
1552 /*
1553 * XXX: This accesses beyond skb data for up
1554 * to the last 3 bytes!!
1555 */
1556
1557 if (old && (data[i] == old[i]))
1558 continue;
1559
1560 word = le32_to_cpu(data[i]);
1561 carl9170_async_regwrite(addr + 4 * i, word);
1562 }
1563 carl9170_async_regwrite_finish();
1564
1565 dev_kfree_skb_any(cvif->beacon);
1566 cvif->beacon = NULL;
1567
1568 err = carl9170_async_regwrite_result();
1569 if (!err)
1570 cvif->beacon = skb;
1571 spin_unlock_bh(&ar->beacon_lock);
1572 if (err)
1573 goto err_free;
1574
1575 if (submit) {
1576 err = carl9170_bcn_ctrl(ar, cvif->id,
1577 CARL9170_BCN_CTRL_CAB_TRIGGER,
1578 addr, skb->len + FCS_LEN);
1579
1580 if (err)
1581 goto err_free;
1582 }
1583out_unlock:
1584 rcu_read_unlock();
1585 return 0;
1586
1587err_unlock:
1588 spin_unlock_bh(&ar->beacon_lock);
1589
1590err_free:
1591 rcu_read_unlock();
1592 dev_kfree_skb_any(skb);
1593 return err;
1594}
diff --git a/drivers/net/wireless/ath/key.c b/drivers/net/wireless/ath/key.c
index a61ef3d6d89c..17b0efd86f9a 100644
--- a/drivers/net/wireless/ath/key.c
+++ b/drivers/net/wireless/ath/key.c
@@ -105,11 +105,8 @@ static bool ath_hw_keysetmac(struct ath_common *common,
105 if (mac[0] & 0x01) 105 if (mac[0] & 0x01)
106 unicast_flag = 0; 106 unicast_flag = 0;
107 107
108 macHi = (mac[5] << 8) | mac[4]; 108 macLo = get_unaligned_le32(mac);
109 macLo = (mac[3] << 24) | 109 macHi = get_unaligned_le16(mac + 4);
110 (mac[2] << 16) |
111 (mac[1] << 8) |
112 mac[0];
113 macLo >>= 1; 110 macLo >>= 1;
114 macLo |= (macHi & 1) << 31; 111 macLo |= (macHi & 1) << 31;
115 macHi >>= 1; 112 macHi >>= 1;
diff --git a/drivers/net/wireless/b43/b43.h b/drivers/net/wireless/b43/b43.h
index 08a28270bbb3..c818b0bc88ec 100644
--- a/drivers/net/wireless/b43/b43.h
+++ b/drivers/net/wireless/b43/b43.h
@@ -433,6 +433,12 @@ enum {
433#define B43_BCMA_IOCTL_PHY_BW_40MHZ 0x00000080 /* 40 MHz bandwidth, 160 MHz PHY */ 433#define B43_BCMA_IOCTL_PHY_BW_40MHZ 0x00000080 /* 40 MHz bandwidth, 160 MHz PHY */
434#define B43_BCMA_IOCTL_GMODE 0x00002000 /* G Mode Enable */ 434#define B43_BCMA_IOCTL_GMODE 0x00002000 /* G Mode Enable */
435 435
436/* BCMA 802.11 core specific IO status (BCMA_IOST) flags */
437#define B43_BCMA_IOST_2G_PHY 0x00000001 /* 2.4G capable phy */
438#define B43_BCMA_IOST_5G_PHY 0x00000002 /* 5G capable phy */
439#define B43_BCMA_IOST_FASTCLKA 0x00000004 /* Fast Clock Available */
440#define B43_BCMA_IOST_DUALB_PHY 0x00000008 /* Dualband phy */
441
436/* 802.11 core specific TM State Low (SSB_TMSLOW) flags */ 442/* 802.11 core specific TM State Low (SSB_TMSLOW) flags */
437#define B43_TMSLOW_GMODE 0x20000000 /* G Mode Enable */ 443#define B43_TMSLOW_GMODE 0x20000000 /* G Mode Enable */
438#define B43_TMSLOW_PHY_BANDWIDTH 0x00C00000 /* PHY band width and clock speed mask (N-PHY only) */ 444#define B43_TMSLOW_PHY_BANDWIDTH 0x00C00000 /* PHY band width and clock speed mask (N-PHY only) */
@@ -588,6 +594,7 @@ struct b43_dma {
588 struct b43_dmaring *rx_ring; 594 struct b43_dmaring *rx_ring;
589 595
590 u32 translation; /* Routing bits */ 596 u32 translation; /* Routing bits */
597 bool parity; /* Check for parity */
591}; 598};
592 599
593struct b43_pio_txqueue; 600struct b43_pio_txqueue;
diff --git a/drivers/net/wireless/b43/bus.c b/drivers/net/wireless/b43/bus.c
index a5e61a9fb539..64c3f65ff8c0 100644
--- a/drivers/net/wireless/b43/bus.c
+++ b/drivers/net/wireless/b43/bus.c
@@ -126,55 +126,52 @@ struct b43_bus_dev *b43_bus_dev_bcma_init(struct bcma_device *core)
126 126
127/* SSB */ 127/* SSB */
128#ifdef CONFIG_B43_SSB 128#ifdef CONFIG_B43_SSB
129static inline int b43_bus_ssb_bus_may_powerdown(struct b43_bus_dev *dev) 129static int b43_bus_ssb_bus_may_powerdown(struct b43_bus_dev *dev)
130{ 130{
131 return ssb_bus_may_powerdown(dev->sdev->bus); 131 return ssb_bus_may_powerdown(dev->sdev->bus);
132} 132}
133static inline int b43_bus_ssb_bus_powerup(struct b43_bus_dev *dev, 133static int b43_bus_ssb_bus_powerup(struct b43_bus_dev *dev,
134 bool dynamic_pctl) 134 bool dynamic_pctl)
135{ 135{
136 return ssb_bus_powerup(dev->sdev->bus, dynamic_pctl); 136 return ssb_bus_powerup(dev->sdev->bus, dynamic_pctl);
137} 137}
138static inline int b43_bus_ssb_device_is_enabled(struct b43_bus_dev *dev) 138static int b43_bus_ssb_device_is_enabled(struct b43_bus_dev *dev)
139{ 139{
140 return ssb_device_is_enabled(dev->sdev); 140 return ssb_device_is_enabled(dev->sdev);
141} 141}
142static inline void b43_bus_ssb_device_enable(struct b43_bus_dev *dev, 142static void b43_bus_ssb_device_enable(struct b43_bus_dev *dev,
143 u32 core_specific_flags) 143 u32 core_specific_flags)
144{ 144{
145 ssb_device_enable(dev->sdev, core_specific_flags); 145 ssb_device_enable(dev->sdev, core_specific_flags);
146} 146}
147static inline void b43_bus_ssb_device_disable(struct b43_bus_dev *dev, 147static void b43_bus_ssb_device_disable(struct b43_bus_dev *dev,
148 u32 core_specific_flags) 148 u32 core_specific_flags)
149{ 149{
150 ssb_device_disable(dev->sdev, core_specific_flags); 150 ssb_device_disable(dev->sdev, core_specific_flags);
151} 151}
152 152
153static inline u16 b43_bus_ssb_read16(struct b43_bus_dev *dev, u16 offset) 153static u16 b43_bus_ssb_read16(struct b43_bus_dev *dev, u16 offset)
154{ 154{
155 return ssb_read16(dev->sdev, offset); 155 return ssb_read16(dev->sdev, offset);
156} 156}
157static inline u32 b43_bus_ssb_read32(struct b43_bus_dev *dev, u16 offset) 157static u32 b43_bus_ssb_read32(struct b43_bus_dev *dev, u16 offset)
158{ 158{
159 return ssb_read32(dev->sdev, offset); 159 return ssb_read32(dev->sdev, offset);
160} 160}
161static inline 161static void b43_bus_ssb_write16(struct b43_bus_dev *dev, u16 offset, u16 value)
162void b43_bus_ssb_write16(struct b43_bus_dev *dev, u16 offset, u16 value)
163{ 162{
164 ssb_write16(dev->sdev, offset, value); 163 ssb_write16(dev->sdev, offset, value);
165} 164}
166static inline 165static void b43_bus_ssb_write32(struct b43_bus_dev *dev, u16 offset, u32 value)
167void b43_bus_ssb_write32(struct b43_bus_dev *dev, u16 offset, u32 value)
168{ 166{
169 ssb_write32(dev->sdev, offset, value); 167 ssb_write32(dev->sdev, offset, value);
170} 168}
171static inline 169static void b43_bus_ssb_block_read(struct b43_bus_dev *dev, void *buffer,
172void b43_bus_ssb_block_read(struct b43_bus_dev *dev, void *buffer, 170 size_t count, u16 offset, u8 reg_width)
173 size_t count, u16 offset, u8 reg_width)
174{ 171{
175 ssb_block_read(dev->sdev, buffer, count, offset, reg_width); 172 ssb_block_read(dev->sdev, buffer, count, offset, reg_width);
176} 173}
177static inline 174static
178void b43_bus_ssb_block_write(struct b43_bus_dev *dev, const void *buffer, 175void b43_bus_ssb_block_write(struct b43_bus_dev *dev, const void *buffer,
179 size_t count, u16 offset, u8 reg_width) 176 size_t count, u16 offset, u8 reg_width)
180{ 177{
diff --git a/drivers/net/wireless/b43/dma.c b/drivers/net/wireless/b43/dma.c
index ce572aebeffd..0953ce1ac1b0 100644
--- a/drivers/net/wireless/b43/dma.c
+++ b/drivers/net/wireless/b43/dma.c
@@ -174,7 +174,7 @@ static void op64_fill_descriptor(struct b43_dmaring *ring,
174 addrhi = (((u64) dmaaddr >> 32) & ~SSB_DMA_TRANSLATION_MASK); 174 addrhi = (((u64) dmaaddr >> 32) & ~SSB_DMA_TRANSLATION_MASK);
175 addrext = (((u64) dmaaddr >> 32) & SSB_DMA_TRANSLATION_MASK) 175 addrext = (((u64) dmaaddr >> 32) & SSB_DMA_TRANSLATION_MASK)
176 >> SSB_DMA_TRANSLATION_SHIFT; 176 >> SSB_DMA_TRANSLATION_SHIFT;
177 addrhi |= (ring->dev->dma.translation << 1); 177 addrhi |= ring->dev->dma.translation;
178 if (slot == ring->nr_slots - 1) 178 if (slot == ring->nr_slots - 1)
179 ctl0 |= B43_DMA64_DCTL0_DTABLEEND; 179 ctl0 |= B43_DMA64_DCTL0_DTABLEEND;
180 if (start) 180 if (start)
@@ -659,6 +659,7 @@ static int dmacontroller_setup(struct b43_dmaring *ring)
659 u32 value; 659 u32 value;
660 u32 addrext; 660 u32 addrext;
661 u32 trans = ring->dev->dma.translation; 661 u32 trans = ring->dev->dma.translation;
662 bool parity = ring->dev->dma.parity;
662 663
663 if (ring->tx) { 664 if (ring->tx) {
664 if (ring->type == B43_DMA_64BIT) { 665 if (ring->type == B43_DMA_64BIT) {
@@ -669,13 +670,15 @@ static int dmacontroller_setup(struct b43_dmaring *ring)
669 value = B43_DMA64_TXENABLE; 670 value = B43_DMA64_TXENABLE;
670 value |= (addrext << B43_DMA64_TXADDREXT_SHIFT) 671 value |= (addrext << B43_DMA64_TXADDREXT_SHIFT)
671 & B43_DMA64_TXADDREXT_MASK; 672 & B43_DMA64_TXADDREXT_MASK;
673 if (!parity)
674 value |= B43_DMA64_TXPARITYDISABLE;
672 b43_dma_write(ring, B43_DMA64_TXCTL, value); 675 b43_dma_write(ring, B43_DMA64_TXCTL, value);
673 b43_dma_write(ring, B43_DMA64_TXRINGLO, 676 b43_dma_write(ring, B43_DMA64_TXRINGLO,
674 (ringbase & 0xFFFFFFFF)); 677 (ringbase & 0xFFFFFFFF));
675 b43_dma_write(ring, B43_DMA64_TXRINGHI, 678 b43_dma_write(ring, B43_DMA64_TXRINGHI,
676 ((ringbase >> 32) & 679 ((ringbase >> 32) &
677 ~SSB_DMA_TRANSLATION_MASK) 680 ~SSB_DMA_TRANSLATION_MASK)
678 | (trans << 1)); 681 | trans);
679 } else { 682 } else {
680 u32 ringbase = (u32) (ring->dmabase); 683 u32 ringbase = (u32) (ring->dmabase);
681 684
@@ -684,6 +687,8 @@ static int dmacontroller_setup(struct b43_dmaring *ring)
684 value = B43_DMA32_TXENABLE; 687 value = B43_DMA32_TXENABLE;
685 value |= (addrext << B43_DMA32_TXADDREXT_SHIFT) 688 value |= (addrext << B43_DMA32_TXADDREXT_SHIFT)
686 & B43_DMA32_TXADDREXT_MASK; 689 & B43_DMA32_TXADDREXT_MASK;
690 if (!parity)
691 value |= B43_DMA32_TXPARITYDISABLE;
687 b43_dma_write(ring, B43_DMA32_TXCTL, value); 692 b43_dma_write(ring, B43_DMA32_TXCTL, value);
688 b43_dma_write(ring, B43_DMA32_TXRING, 693 b43_dma_write(ring, B43_DMA32_TXRING,
689 (ringbase & ~SSB_DMA_TRANSLATION_MASK) 694 (ringbase & ~SSB_DMA_TRANSLATION_MASK)
@@ -702,13 +707,15 @@ static int dmacontroller_setup(struct b43_dmaring *ring)
702 value |= B43_DMA64_RXENABLE; 707 value |= B43_DMA64_RXENABLE;
703 value |= (addrext << B43_DMA64_RXADDREXT_SHIFT) 708 value |= (addrext << B43_DMA64_RXADDREXT_SHIFT)
704 & B43_DMA64_RXADDREXT_MASK; 709 & B43_DMA64_RXADDREXT_MASK;
710 if (!parity)
711 value |= B43_DMA64_RXPARITYDISABLE;
705 b43_dma_write(ring, B43_DMA64_RXCTL, value); 712 b43_dma_write(ring, B43_DMA64_RXCTL, value);
706 b43_dma_write(ring, B43_DMA64_RXRINGLO, 713 b43_dma_write(ring, B43_DMA64_RXRINGLO,
707 (ringbase & 0xFFFFFFFF)); 714 (ringbase & 0xFFFFFFFF));
708 b43_dma_write(ring, B43_DMA64_RXRINGHI, 715 b43_dma_write(ring, B43_DMA64_RXRINGHI,
709 ((ringbase >> 32) & 716 ((ringbase >> 32) &
710 ~SSB_DMA_TRANSLATION_MASK) 717 ~SSB_DMA_TRANSLATION_MASK)
711 | (trans << 1)); 718 | trans);
712 b43_dma_write(ring, B43_DMA64_RXINDEX, ring->nr_slots * 719 b43_dma_write(ring, B43_DMA64_RXINDEX, ring->nr_slots *
713 sizeof(struct b43_dmadesc64)); 720 sizeof(struct b43_dmadesc64));
714 } else { 721 } else {
@@ -720,6 +727,8 @@ static int dmacontroller_setup(struct b43_dmaring *ring)
720 value |= B43_DMA32_RXENABLE; 727 value |= B43_DMA32_RXENABLE;
721 value |= (addrext << B43_DMA32_RXADDREXT_SHIFT) 728 value |= (addrext << B43_DMA32_RXADDREXT_SHIFT)
722 & B43_DMA32_RXADDREXT_MASK; 729 & B43_DMA32_RXADDREXT_MASK;
730 if (!parity)
731 value |= B43_DMA32_RXPARITYDISABLE;
723 b43_dma_write(ring, B43_DMA32_RXCTL, value); 732 b43_dma_write(ring, B43_DMA32_RXCTL, value);
724 b43_dma_write(ring, B43_DMA32_RXRING, 733 b43_dma_write(ring, B43_DMA32_RXRING,
725 (ringbase & ~SSB_DMA_TRANSLATION_MASK) 734 (ringbase & ~SSB_DMA_TRANSLATION_MASK)
@@ -1057,6 +1066,11 @@ int b43_dma_init(struct b43_wldev *dev)
1057 return err; 1066 return err;
1058 1067
1059 switch (dev->dev->bus_type) { 1068 switch (dev->dev->bus_type) {
1069#ifdef CONFIG_B43_BCMA
1070 case B43_BUS_BCMA:
1071 dma->translation = bcma_core_dma_translation(dev->dev->bdev);
1072 break;
1073#endif
1060#ifdef CONFIG_B43_SSB 1074#ifdef CONFIG_B43_SSB
1061 case B43_BUS_SSB: 1075 case B43_BUS_SSB:
1062 dma->translation = ssb_dma_translation(dev->dev->sdev); 1076 dma->translation = ssb_dma_translation(dev->dev->sdev);
@@ -1064,6 +1078,13 @@ int b43_dma_init(struct b43_wldev *dev)
1064#endif 1078#endif
1065 } 1079 }
1066 1080
1081 dma->parity = true;
1082#ifdef CONFIG_B43_BCMA
1083 /* TODO: find out which SSB devices need disabling parity */
1084 if (dev->dev->bus_type == B43_BUS_BCMA)
1085 dma->parity = false;
1086#endif
1087
1067 err = -ENOMEM; 1088 err = -ENOMEM;
1068 /* setup TX DMA channels. */ 1089 /* setup TX DMA channels. */
1069 dma->tx_ring_AC_BK = b43_setup_dmaring(dev, 0, 1, type); 1090 dma->tx_ring_AC_BK = b43_setup_dmaring(dev, 0, 1, type);
diff --git a/drivers/net/wireless/b43/dma.h b/drivers/net/wireless/b43/dma.h
index e8a80a1251bf..cdf87094efe8 100644
--- a/drivers/net/wireless/b43/dma.h
+++ b/drivers/net/wireless/b43/dma.h
@@ -20,6 +20,7 @@
20#define B43_DMA32_TXSUSPEND 0x00000002 20#define B43_DMA32_TXSUSPEND 0x00000002
21#define B43_DMA32_TXLOOPBACK 0x00000004 21#define B43_DMA32_TXLOOPBACK 0x00000004
22#define B43_DMA32_TXFLUSH 0x00000010 22#define B43_DMA32_TXFLUSH 0x00000010
23#define B43_DMA32_TXPARITYDISABLE 0x00000800
23#define B43_DMA32_TXADDREXT_MASK 0x00030000 24#define B43_DMA32_TXADDREXT_MASK 0x00030000
24#define B43_DMA32_TXADDREXT_SHIFT 16 25#define B43_DMA32_TXADDREXT_SHIFT 16
25#define B43_DMA32_TXRING 0x04 26#define B43_DMA32_TXRING 0x04
@@ -44,6 +45,7 @@
44#define B43_DMA32_RXFROFF_MASK 0x000000FE 45#define B43_DMA32_RXFROFF_MASK 0x000000FE
45#define B43_DMA32_RXFROFF_SHIFT 1 46#define B43_DMA32_RXFROFF_SHIFT 1
46#define B43_DMA32_RXDIRECTFIFO 0x00000100 47#define B43_DMA32_RXDIRECTFIFO 0x00000100
48#define B43_DMA32_RXPARITYDISABLE 0x00000800
47#define B43_DMA32_RXADDREXT_MASK 0x00030000 49#define B43_DMA32_RXADDREXT_MASK 0x00030000
48#define B43_DMA32_RXADDREXT_SHIFT 16 50#define B43_DMA32_RXADDREXT_SHIFT 16
49#define B43_DMA32_RXRING 0x14 51#define B43_DMA32_RXRING 0x14
@@ -84,6 +86,7 @@ struct b43_dmadesc32 {
84#define B43_DMA64_TXSUSPEND 0x00000002 86#define B43_DMA64_TXSUSPEND 0x00000002
85#define B43_DMA64_TXLOOPBACK 0x00000004 87#define B43_DMA64_TXLOOPBACK 0x00000004
86#define B43_DMA64_TXFLUSH 0x00000010 88#define B43_DMA64_TXFLUSH 0x00000010
89#define B43_DMA64_TXPARITYDISABLE 0x00000800
87#define B43_DMA64_TXADDREXT_MASK 0x00030000 90#define B43_DMA64_TXADDREXT_MASK 0x00030000
88#define B43_DMA64_TXADDREXT_SHIFT 16 91#define B43_DMA64_TXADDREXT_SHIFT 16
89#define B43_DMA64_TXINDEX 0x04 92#define B43_DMA64_TXINDEX 0x04
@@ -111,6 +114,7 @@ struct b43_dmadesc32 {
111#define B43_DMA64_RXFROFF_MASK 0x000000FE 114#define B43_DMA64_RXFROFF_MASK 0x000000FE
112#define B43_DMA64_RXFROFF_SHIFT 1 115#define B43_DMA64_RXFROFF_SHIFT 1
113#define B43_DMA64_RXDIRECTFIFO 0x00000100 116#define B43_DMA64_RXDIRECTFIFO 0x00000100
117#define B43_DMA64_RXPARITYDISABLE 0x00000800
114#define B43_DMA64_RXADDREXT_MASK 0x00030000 118#define B43_DMA64_RXADDREXT_MASK 0x00030000
115#define B43_DMA64_RXADDREXT_SHIFT 16 119#define B43_DMA64_RXADDREXT_SHIFT 16
116#define B43_DMA64_RXINDEX 0x24 120#define B43_DMA64_RXINDEX 0x24
diff --git a/drivers/net/wireless/b43/main.c b/drivers/net/wireless/b43/main.c
index 092dd9318869..73fbf0358f96 100644
--- a/drivers/net/wireless/b43/main.c
+++ b/drivers/net/wireless/b43/main.c
@@ -1156,17 +1156,37 @@ void b43_power_saving_ctl_bits(struct b43_wldev *dev, unsigned int ps_flags)
1156} 1156}
1157 1157
1158#ifdef CONFIG_B43_BCMA 1158#ifdef CONFIG_B43_BCMA
1159static void b43_bcma_wireless_core_reset(struct b43_wldev *dev, bool gmode) 1159static void b43_bcma_phy_reset(struct b43_wldev *dev)
1160{ 1160{
1161 u32 flags = 0; 1161 u32 flags;
1162 1162
1163 if (gmode) 1163 /* Put PHY into reset */
1164 flags = B43_BCMA_IOCTL_GMODE; 1164 flags = bcma_aread32(dev->dev->bdev, BCMA_IOCTL);
1165 flags |= B43_BCMA_IOCTL_PHY_CLKEN; 1165 flags |= B43_BCMA_IOCTL_PHY_RESET;
1166 flags |= B43_BCMA_IOCTL_PHY_BW_20MHZ; /* Make 20 MHz def */ 1166 flags |= B43_BCMA_IOCTL_PHY_BW_20MHZ; /* Make 20 MHz def */
1167 b43_device_enable(dev, flags); 1167 bcma_awrite32(dev->dev->bdev, BCMA_IOCTL, flags);
1168 udelay(2);
1169
1170 /* Take PHY out of reset */
1171 flags = bcma_aread32(dev->dev->bdev, BCMA_IOCTL);
1172 flags &= ~B43_BCMA_IOCTL_PHY_RESET;
1173 flags |= BCMA_IOCTL_FGC;
1174 bcma_awrite32(dev->dev->bdev, BCMA_IOCTL, flags);
1175 udelay(1);
1168 1176
1169 /* TODO: reset PHY */ 1177 /* Do not force clock anymore */
1178 flags = bcma_aread32(dev->dev->bdev, BCMA_IOCTL);
1179 flags &= ~BCMA_IOCTL_FGC;
1180 bcma_awrite32(dev->dev->bdev, BCMA_IOCTL, flags);
1181 udelay(1);
1182}
1183
1184static void b43_bcma_wireless_core_reset(struct b43_wldev *dev, bool gmode)
1185{
1186 b43_device_enable(dev, B43_BCMA_IOCTL_PHY_CLKEN);
1187 bcma_core_set_clockmode(dev->dev->bdev, BCMA_CLKMODE_FAST);
1188 b43_bcma_phy_reset(dev);
1189 bcma_core_pll_ctl(dev->dev->bdev, 0x300, 0x3000000, true);
1170} 1190}
1171#endif 1191#endif
1172 1192
@@ -2814,12 +2834,12 @@ void b43_mac_phy_clock_set(struct b43_wldev *dev, bool on)
2814 switch (dev->dev->bus_type) { 2834 switch (dev->dev->bus_type) {
2815#ifdef CONFIG_B43_BCMA 2835#ifdef CONFIG_B43_BCMA
2816 case B43_BUS_BCMA: 2836 case B43_BUS_BCMA:
2817 tmp = bcma_read32(dev->dev->bdev, BCMA_IOCTL); 2837 tmp = bcma_aread32(dev->dev->bdev, BCMA_IOCTL);
2818 if (on) 2838 if (on)
2819 tmp |= B43_BCMA_IOCTL_MACPHYCLKEN; 2839 tmp |= B43_BCMA_IOCTL_MACPHYCLKEN;
2820 else 2840 else
2821 tmp &= ~B43_BCMA_IOCTL_MACPHYCLKEN; 2841 tmp &= ~B43_BCMA_IOCTL_MACPHYCLKEN;
2822 bcma_write32(dev->dev->bdev, BCMA_IOCTL, tmp); 2842 bcma_awrite32(dev->dev->bdev, BCMA_IOCTL, tmp);
2823 break; 2843 break;
2824#endif 2844#endif
2825#ifdef CONFIG_B43_SSB 2845#ifdef CONFIG_B43_SSB
@@ -4948,6 +4968,7 @@ static int b43_wireless_core_attach(struct b43_wldev *dev)
4948 struct b43_wl *wl = dev->wl; 4968 struct b43_wl *wl = dev->wl;
4949 struct pci_dev *pdev = NULL; 4969 struct pci_dev *pdev = NULL;
4950 int err; 4970 int err;
4971 u32 tmp;
4951 bool have_2ghz_phy = 0, have_5ghz_phy = 0; 4972 bool have_2ghz_phy = 0, have_5ghz_phy = 0;
4952 4973
4953 /* Do NOT do any device initialization here. 4974 /* Do NOT do any device initialization here.
@@ -4973,17 +4994,17 @@ static int b43_wireless_core_attach(struct b43_wldev *dev)
4973 switch (dev->dev->bus_type) { 4994 switch (dev->dev->bus_type) {
4974#ifdef CONFIG_B43_BCMA 4995#ifdef CONFIG_B43_BCMA
4975 case B43_BUS_BCMA: 4996 case B43_BUS_BCMA:
4976 /* FIXME */ 4997 tmp = bcma_aread32(dev->dev->bdev, BCMA_IOST);
4977 have_2ghz_phy = 1; 4998 have_2ghz_phy = !!(tmp & B43_BCMA_IOST_2G_PHY);
4978 have_5ghz_phy = 0; 4999 have_5ghz_phy = !!(tmp & B43_BCMA_IOST_5G_PHY);
4979 break; 5000 break;
4980#endif 5001#endif
4981#ifdef CONFIG_B43_SSB 5002#ifdef CONFIG_B43_SSB
4982 case B43_BUS_SSB: 5003 case B43_BUS_SSB:
4983 if (dev->dev->core_rev >= 5) { 5004 if (dev->dev->core_rev >= 5) {
4984 u32 tmshigh = ssb_read32(dev->dev->sdev, SSB_TMSHIGH); 5005 tmp = ssb_read32(dev->dev->sdev, SSB_TMSHIGH);
4985 have_2ghz_phy = !!(tmshigh & B43_TMSHIGH_HAVE_2GHZ_PHY); 5006 have_2ghz_phy = !!(tmp & B43_TMSHIGH_HAVE_2GHZ_PHY);
4986 have_5ghz_phy = !!(tmshigh & B43_TMSHIGH_HAVE_5GHZ_PHY); 5007 have_5ghz_phy = !!(tmp & B43_TMSHIGH_HAVE_5GHZ_PHY);
4987 } else 5008 } else
4988 B43_WARN_ON(1); 5009 B43_WARN_ON(1);
4989 break; 5010 break;
@@ -5164,6 +5185,7 @@ static struct b43_wl *b43_wireless_init(struct b43_bus_dev *dev)
5164 struct ssb_sprom *sprom = dev->bus_sprom; 5185 struct ssb_sprom *sprom = dev->bus_sprom;
5165 struct ieee80211_hw *hw; 5186 struct ieee80211_hw *hw;
5166 struct b43_wl *wl; 5187 struct b43_wl *wl;
5188 char chip_name[6];
5167 5189
5168 hw = ieee80211_alloc_hw(sizeof(*wl), &b43_hw_ops); 5190 hw = ieee80211_alloc_hw(sizeof(*wl), &b43_hw_ops);
5169 if (!hw) { 5191 if (!hw) {
@@ -5202,8 +5224,10 @@ static struct b43_wl *b43_wireless_init(struct b43_bus_dev *dev)
5202 INIT_WORK(&wl->tx_work, b43_tx_work); 5224 INIT_WORK(&wl->tx_work, b43_tx_work);
5203 skb_queue_head_init(&wl->tx_queue); 5225 skb_queue_head_init(&wl->tx_queue);
5204 5226
5205 b43info(wl, "Broadcom %04X WLAN found (core revision %u)\n", 5227 snprintf(chip_name, ARRAY_SIZE(chip_name),
5206 dev->chip_id, dev->core_rev); 5228 (dev->chip_id > 0x9999) ? "%d" : "%04X", dev->chip_id);
5229 b43info(wl, "Broadcom %s WLAN found (core revision %u)\n", chip_name,
5230 dev->core_rev);
5207 return wl; 5231 return wl;
5208} 5232}
5209 5233
@@ -5211,19 +5235,59 @@ static struct b43_wl *b43_wireless_init(struct b43_bus_dev *dev)
5211static int b43_bcma_probe(struct bcma_device *core) 5235static int b43_bcma_probe(struct bcma_device *core)
5212{ 5236{
5213 struct b43_bus_dev *dev; 5237 struct b43_bus_dev *dev;
5238 struct b43_wl *wl;
5239 int err;
5214 5240
5215 dev = b43_bus_dev_bcma_init(core); 5241 dev = b43_bus_dev_bcma_init(core);
5216 if (!dev) 5242 if (!dev)
5217 return -ENODEV; 5243 return -ENODEV;
5218 5244
5219 b43err(NULL, "BCMA is not supported yet!"); 5245 wl = b43_wireless_init(dev);
5220 kfree(dev); 5246 if (IS_ERR(wl)) {
5221 return -EOPNOTSUPP; 5247 err = PTR_ERR(wl);
5248 goto bcma_out;
5249 }
5250
5251 err = b43_one_core_attach(dev, wl);
5252 if (err)
5253 goto bcma_err_wireless_exit;
5254
5255 err = ieee80211_register_hw(wl->hw);
5256 if (err)
5257 goto bcma_err_one_core_detach;
5258 b43_leds_register(wl->current_dev);
5259
5260bcma_out:
5261 return err;
5262
5263bcma_err_one_core_detach:
5264 b43_one_core_detach(dev);
5265bcma_err_wireless_exit:
5266 ieee80211_free_hw(wl->hw);
5267 return err;
5222} 5268}
5223 5269
5224static void b43_bcma_remove(struct bcma_device *core) 5270static void b43_bcma_remove(struct bcma_device *core)
5225{ 5271{
5226 /* TODO */ 5272 struct b43_wldev *wldev = bcma_get_drvdata(core);
5273 struct b43_wl *wl = wldev->wl;
5274
5275 /* We must cancel any work here before unregistering from ieee80211,
5276 * as the ieee80211 unreg will destroy the workqueue. */
5277 cancel_work_sync(&wldev->restart_work);
5278
5279 /* Restore the queues count before unregistering, because firmware detect
5280 * might have modified it. Restoring is important, so the networking
5281 * stack can properly free resources. */
5282 wl->hw->queues = wl->mac80211_initially_registered_queues;
5283 b43_leds_stop(wldev);
5284 ieee80211_unregister_hw(wl->hw);
5285
5286 b43_one_core_detach(wldev->dev);
5287
5288 b43_leds_unregister(wl);
5289
5290 ieee80211_free_hw(wl->hw);
5227} 5291}
5228 5292
5229static struct bcma_driver b43_bcma_driver = { 5293static struct bcma_driver b43_bcma_driver = {
diff --git a/drivers/net/wireless/b43/phy_ht.c b/drivers/net/wireless/b43/phy_ht.c
index 29821036badf..7c40919651a7 100644
--- a/drivers/net/wireless/b43/phy_ht.c
+++ b/drivers/net/wireless/b43/phy_ht.c
@@ -148,7 +148,7 @@ static void b43_radio_2059_init(struct b43_wldev *dev)
148 b43_radio_mask(dev, 0x17F, ~0x1); 148 b43_radio_mask(dev, 0x17F, ~0x1);
149 } 149 }
150 150
151 b43_radio_mask(dev, 0x11, 0x0008); 151 b43_radio_mask(dev, 0x11, ~0x0008);
152} 152}
153 153
154/************************************************** 154/**************************************************
@@ -276,18 +276,25 @@ static void b43_phy_ht_op_software_rfkill(struct b43_wldev *dev,
276 if (b43_read32(dev, B43_MMIO_MACCTL) & B43_MACCTL_ENABLED) 276 if (b43_read32(dev, B43_MMIO_MACCTL) & B43_MACCTL_ENABLED)
277 b43err(dev->wl, "MAC not suspended\n"); 277 b43err(dev->wl, "MAC not suspended\n");
278 278
279 /* In the following PHY ops we copy wl's dummy behaviour.
280 * TODO: Find out if reads (currently hidden in masks/masksets) are
281 * needed and replace following ops with just writes or w&r.
282 * Note: B43_PHY_HT_RF_CTL1 register is tricky, wrong operation can
283 * cause delayed (!) machine lock up. */
279 if (blocked) { 284 if (blocked) {
280 b43_phy_mask(dev, B43_PHY_HT_RF_CTL1, ~0); 285 b43_phy_mask(dev, B43_PHY_HT_RF_CTL1, 0);
281 } else { 286 } else {
282 b43_phy_mask(dev, B43_PHY_HT_RF_CTL1, ~0); 287 b43_phy_mask(dev, B43_PHY_HT_RF_CTL1, 0);
283 b43_phy_maskset(dev, B43_PHY_HT_RF_CTL1, ~0, 0x1); 288 b43_phy_maskset(dev, B43_PHY_HT_RF_CTL1, 0, 0x1);
284 b43_phy_mask(dev, B43_PHY_HT_RF_CTL1, ~0); 289 b43_phy_mask(dev, B43_PHY_HT_RF_CTL1, 0);
285 b43_phy_maskset(dev, B43_PHY_HT_RF_CTL1, ~0, 0x2); 290 b43_phy_maskset(dev, B43_PHY_HT_RF_CTL1, 0, 0x2);
286 291
287 if (dev->phy.radio_ver == 0x2059) 292 if (dev->phy.radio_ver == 0x2059)
288 b43_radio_2059_init(dev); 293 b43_radio_2059_init(dev);
289 else 294 else
290 B43_WARN_ON(1); 295 B43_WARN_ON(1);
296
297 b43_switch_channel(dev, dev->phy.channel);
291 } 298 }
292} 299}
293 300
@@ -329,7 +336,7 @@ static int b43_phy_ht_op_switch_channel(struct b43_wldev *dev,
329static unsigned int b43_phy_ht_op_get_default_chan(struct b43_wldev *dev) 336static unsigned int b43_phy_ht_op_get_default_chan(struct b43_wldev *dev)
330{ 337{
331 if (b43_current_band(dev->wl) == IEEE80211_BAND_2GHZ) 338 if (b43_current_band(dev->wl) == IEEE80211_BAND_2GHZ)
332 return 1; 339 return 11;
333 return 36; 340 return 36;
334} 341}
335 342
diff --git a/drivers/net/wireless/b43/phy_n.c b/drivers/net/wireless/b43/phy_n.c
index 95c28f584ed9..1ae1e84cb4d1 100644
--- a/drivers/net/wireless/b43/phy_n.c
+++ b/drivers/net/wireless/b43/phy_n.c
@@ -611,12 +611,12 @@ static void b43_nphy_bmac_clock_fgc(struct b43_wldev *dev, bool force)
611 switch (dev->dev->bus_type) { 611 switch (dev->dev->bus_type) {
612#ifdef CONFIG_B43_BCMA 612#ifdef CONFIG_B43_BCMA
613 case B43_BUS_BCMA: 613 case B43_BUS_BCMA:
614 tmp = bcma_read32(dev->dev->bdev, BCMA_IOCTL); 614 tmp = bcma_aread32(dev->dev->bdev, BCMA_IOCTL);
615 if (force) 615 if (force)
616 tmp |= BCMA_IOCTL_FGC; 616 tmp |= BCMA_IOCTL_FGC;
617 else 617 else
618 tmp &= ~BCMA_IOCTL_FGC; 618 tmp &= ~BCMA_IOCTL_FGC;
619 bcma_write32(dev->dev->bdev, BCMA_IOCTL, tmp); 619 bcma_awrite32(dev->dev->bdev, BCMA_IOCTL, tmp);
620 break; 620 break;
621#endif 621#endif
622#ifdef CONFIG_B43_SSB 622#ifdef CONFIG_B43_SSB
diff --git a/drivers/net/wireless/b43/radio_2059.c b/drivers/net/wireless/b43/radio_2059.c
index 23dea4ba8219..f029f6e1f5d1 100644
--- a/drivers/net/wireless/b43/radio_2059.c
+++ b/drivers/net/wireless/b43/radio_2059.c
@@ -161,5 +161,14 @@ static const struct b43_phy_ht_channeltab_e_radio2059 b43_phy_ht_channeltab_radi
161const struct b43_phy_ht_channeltab_e_radio2059 161const struct b43_phy_ht_channeltab_e_radio2059
162*b43_phy_ht_get_channeltab_e_r2059(struct b43_wldev *dev, u16 freq) 162*b43_phy_ht_get_channeltab_e_r2059(struct b43_wldev *dev, u16 freq)
163{ 163{
164 const struct b43_phy_ht_channeltab_e_radio2059 *e;
165 unsigned int i;
166
167 e = b43_phy_ht_channeltab_radio2059;
168 for (i = 0; i < ARRAY_SIZE(b43_phy_ht_channeltab_radio2059); i++, e++) {
169 if (e->freq == freq)
170 return e;
171 }
172
164 return NULL; 173 return NULL;
165} 174}
diff --git a/drivers/net/wireless/b43legacy/b43legacy.h b/drivers/net/wireless/b43legacy/b43legacy.h
index 23583be1ee0b..17a130d18dc9 100644
--- a/drivers/net/wireless/b43legacy/b43legacy.h
+++ b/drivers/net/wireless/b43legacy/b43legacy.h
@@ -532,6 +532,8 @@ struct b43legacy_dma {
532 532
533 struct b43legacy_dmaring *rx_ring0; 533 struct b43legacy_dmaring *rx_ring0;
534 struct b43legacy_dmaring *rx_ring3; /* only on core.rev < 5 */ 534 struct b43legacy_dmaring *rx_ring3; /* only on core.rev < 5 */
535
536 u32 translation; /* Routing bits */
535}; 537};
536 538
537/* Data structures for PIO transmission, per 80211 core. */ 539/* Data structures for PIO transmission, per 80211 core. */
diff --git a/drivers/net/wireless/b43legacy/dma.c b/drivers/net/wireless/b43legacy/dma.c
index c33934ad6cd2..704ee62101bd 100644
--- a/drivers/net/wireless/b43legacy/dma.c
+++ b/drivers/net/wireless/b43legacy/dma.c
@@ -73,7 +73,7 @@ static void op32_fill_descriptor(struct b43legacy_dmaring *ring,
73 addr = (u32)(dmaaddr & ~SSB_DMA_TRANSLATION_MASK); 73 addr = (u32)(dmaaddr & ~SSB_DMA_TRANSLATION_MASK);
74 addrext = (u32)(dmaaddr & SSB_DMA_TRANSLATION_MASK) 74 addrext = (u32)(dmaaddr & SSB_DMA_TRANSLATION_MASK)
75 >> SSB_DMA_TRANSLATION_SHIFT; 75 >> SSB_DMA_TRANSLATION_SHIFT;
76 addr |= ssb_dma_translation(ring->dev->dev); 76 addr |= ring->dev->dma.translation;
77 ctl = (bufsize - ring->frameoffset) 77 ctl = (bufsize - ring->frameoffset)
78 & B43legacy_DMA32_DCTL_BYTECNT; 78 & B43legacy_DMA32_DCTL_BYTECNT;
79 if (slot == ring->nr_slots - 1) 79 if (slot == ring->nr_slots - 1)
@@ -175,7 +175,7 @@ static void op64_fill_descriptor(struct b43legacy_dmaring *ring,
175 addrhi = (((u64)dmaaddr >> 32) & ~SSB_DMA_TRANSLATION_MASK); 175 addrhi = (((u64)dmaaddr >> 32) & ~SSB_DMA_TRANSLATION_MASK);
176 addrext = (((u64)dmaaddr >> 32) & SSB_DMA_TRANSLATION_MASK) 176 addrext = (((u64)dmaaddr >> 32) & SSB_DMA_TRANSLATION_MASK)
177 >> SSB_DMA_TRANSLATION_SHIFT; 177 >> SSB_DMA_TRANSLATION_SHIFT;
178 addrhi |= ssb_dma_translation(ring->dev->dev); 178 addrhi |= ring->dev->dma.translation;
179 if (slot == ring->nr_slots - 1) 179 if (slot == ring->nr_slots - 1)
180 ctl0 |= B43legacy_DMA64_DCTL0_DTABLEEND; 180 ctl0 |= B43legacy_DMA64_DCTL0_DTABLEEND;
181 if (start) 181 if (start)
@@ -709,7 +709,7 @@ static int dmacontroller_setup(struct b43legacy_dmaring *ring)
709 int err = 0; 709 int err = 0;
710 u32 value; 710 u32 value;
711 u32 addrext; 711 u32 addrext;
712 u32 trans = ssb_dma_translation(ring->dev->dev); 712 u32 trans = ring->dev->dma.translation;
713 713
714 if (ring->tx) { 714 if (ring->tx) {
715 if (ring->type == B43legacy_DMA_64BIT) { 715 if (ring->type == B43legacy_DMA_64BIT) {
@@ -1093,6 +1093,7 @@ int b43legacy_dma_init(struct b43legacy_wldev *dev)
1093 return -EOPNOTSUPP; 1093 return -EOPNOTSUPP;
1094#endif 1094#endif
1095 } 1095 }
1096 dma->translation = ssb_dma_translation(dev->dev);
1096 1097
1097 err = -ENOMEM; 1098 err = -ENOMEM;
1098 /* setup TX DMA channels. */ 1099 /* setup TX DMA channels. */
diff --git a/drivers/net/wireless/iwlwifi/Makefile b/drivers/net/wireless/iwlwifi/Makefile
index 19150398a248..48ab9142af38 100644
--- a/drivers/net/wireless/iwlwifi/Makefile
+++ b/drivers/net/wireless/iwlwifi/Makefile
@@ -5,16 +5,16 @@ iwlagn-objs += iwl-agn-ucode.o iwl-agn-tx.o
5iwlagn-objs += iwl-agn-lib.o iwl-agn-calib.o iwl-io.o 5iwlagn-objs += iwl-agn-lib.o iwl-agn-calib.o iwl-io.o
6iwlagn-objs += iwl-agn-tt.o iwl-agn-sta.o iwl-agn-eeprom.o 6iwlagn-objs += iwl-agn-tt.o iwl-agn-sta.o iwl-agn-eeprom.o
7 7
8iwlagn-objs += iwl-core.o iwl-eeprom.o iwl-hcmd.o iwl-power.o 8iwlagn-objs += iwl-core.o iwl-eeprom.o iwl-power.o
9iwlagn-objs += iwl-rx.o iwl-tx.o iwl-sta.o 9iwlagn-objs += iwl-rx.o iwl-sta.o
10iwlagn-objs += iwl-scan.o iwl-led.o 10iwlagn-objs += iwl-scan.o iwl-led.o
11iwlagn-objs += iwl-agn-rxon.o iwl-agn-hcmd.o iwl-agn-ict.o 11iwlagn-objs += iwl-agn-rxon.o
12iwlagn-objs += iwl-5000.o 12iwlagn-objs += iwl-5000.o
13iwlagn-objs += iwl-6000.o 13iwlagn-objs += iwl-6000.o
14iwlagn-objs += iwl-1000.o 14iwlagn-objs += iwl-1000.o
15iwlagn-objs += iwl-2000.o 15iwlagn-objs += iwl-2000.o
16iwlagn-objs += iwl-pci.o 16iwlagn-objs += iwl-pci.o
17iwlagn-objs += iwl-trans.o 17iwlagn-objs += iwl-trans.o iwl-trans-rx-pcie.o iwl-trans-tx-pcie.o
18 18
19iwlagn-$(CONFIG_IWLWIFI_DEBUGFS) += iwl-debugfs.o 19iwlagn-$(CONFIG_IWLWIFI_DEBUGFS) += iwl-debugfs.o
20iwlagn-$(CONFIG_IWLWIFI_DEVICE_TRACING) += iwl-devtrace.o 20iwlagn-$(CONFIG_IWLWIFI_DEVICE_TRACING) += iwl-devtrace.o
diff --git a/drivers/net/wireless/iwlwifi/iwl-1000.c b/drivers/net/wireless/iwlwifi/iwl-1000.c
index 2f56b343e869..01b49eb8c8ec 100644
--- a/drivers/net/wireless/iwlwifi/iwl-1000.c
+++ b/drivers/net/wireless/iwlwifi/iwl-1000.c
@@ -168,9 +168,6 @@ static int iwl1000_hw_set_hw_params(struct iwl_priv *priv)
168 168
169static struct iwl_lib_ops iwl1000_lib = { 169static struct iwl_lib_ops iwl1000_lib = {
170 .set_hw_params = iwl1000_hw_set_hw_params, 170 .set_hw_params = iwl1000_hw_set_hw_params,
171 .rx_handler_setup = iwlagn_rx_handler_setup,
172 .setup_deferred_work = iwlagn_setup_deferred_work,
173 .is_valid_rtc_data_addr = iwlagn_hw_valid_rtc_data_addr,
174 .nic_config = iwl1000_nic_config, 171 .nic_config = iwl1000_nic_config,
175 .eeprom_ops = { 172 .eeprom_ops = {
176 .regulatory_bands = { 173 .regulatory_bands = {
@@ -186,10 +183,6 @@ static struct iwl_lib_ops iwl1000_lib = {
186 .temperature = iwlagn_temperature, 183 .temperature = iwlagn_temperature,
187}; 184};
188 185
189static const struct iwl_ops iwl1000_ops = {
190 .lib = &iwl1000_lib,
191};
192
193static struct iwl_base_params iwl1000_base_params = { 186static struct iwl_base_params iwl1000_base_params = {
194 .num_of_queues = IWLAGN_NUM_QUEUES, 187 .num_of_queues = IWLAGN_NUM_QUEUES,
195 .num_of_ampdu_queues = IWLAGN_NUM_AMPDU_QUEUES, 188 .num_of_ampdu_queues = IWLAGN_NUM_AMPDU_QUEUES,
@@ -217,7 +210,7 @@ static struct iwl_ht_params iwl1000_ht_params = {
217 .ucode_api_min = IWL1000_UCODE_API_MIN, \ 210 .ucode_api_min = IWL1000_UCODE_API_MIN, \
218 .eeprom_ver = EEPROM_1000_EEPROM_VERSION, \ 211 .eeprom_ver = EEPROM_1000_EEPROM_VERSION, \
219 .eeprom_calib_ver = EEPROM_1000_TX_POWER_VERSION, \ 212 .eeprom_calib_ver = EEPROM_1000_TX_POWER_VERSION, \
220 .ops = &iwl1000_ops, \ 213 .lib = &iwl1000_lib, \
221 .base_params = &iwl1000_base_params, \ 214 .base_params = &iwl1000_base_params, \
222 .led_mode = IWL_LED_BLINK 215 .led_mode = IWL_LED_BLINK
223 216
@@ -238,7 +231,7 @@ struct iwl_cfg iwl1000_bg_cfg = {
238 .ucode_api_min = IWL100_UCODE_API_MIN, \ 231 .ucode_api_min = IWL100_UCODE_API_MIN, \
239 .eeprom_ver = EEPROM_1000_EEPROM_VERSION, \ 232 .eeprom_ver = EEPROM_1000_EEPROM_VERSION, \
240 .eeprom_calib_ver = EEPROM_1000_TX_POWER_VERSION, \ 233 .eeprom_calib_ver = EEPROM_1000_TX_POWER_VERSION, \
241 .ops = &iwl1000_ops, \ 234 .lib = &iwl1000_lib, \
242 .base_params = &iwl1000_base_params, \ 235 .base_params = &iwl1000_base_params, \
243 .led_mode = IWL_LED_RF_STATE, \ 236 .led_mode = IWL_LED_RF_STATE, \
244 .rx_with_siso_diversity = true 237 .rx_with_siso_diversity = true
diff --git a/drivers/net/wireless/iwlwifi/iwl-2000.c b/drivers/net/wireless/iwlwifi/iwl-2000.c
index 32ac8654b79a..0e13f0bb2e17 100644
--- a/drivers/net/wireless/iwlwifi/iwl-2000.c
+++ b/drivers/net/wireless/iwlwifi/iwl-2000.c
@@ -85,9 +85,6 @@ static void iwl2000_nic_config(struct iwl_priv *priv)
85 if (priv->cfg->iq_invert) 85 if (priv->cfg->iq_invert)
86 iwl_set_bit(priv, CSR_GP_DRIVER_REG, 86 iwl_set_bit(priv, CSR_GP_DRIVER_REG,
87 CSR_GP_DRIVER_REG_BIT_RADIO_IQ_INVER); 87 CSR_GP_DRIVER_REG_BIT_RADIO_IQ_INVER);
88
89 if (priv->cfg->disable_otp_refresh)
90 iwl_write_prph(priv, APMG_ANALOG_SVR_REG, 0x80000010);
91} 88}
92 89
93static struct iwl_sensitivity_ranges iwl2000_sensitivity = { 90static struct iwl_sensitivity_ranges iwl2000_sensitivity = {
@@ -156,7 +153,7 @@ static int iwl2000_hw_set_hw_params(struct iwl_priv *priv)
156 BIT(IWL_CALIB_TX_IQ) | 153 BIT(IWL_CALIB_TX_IQ) |
157 BIT(IWL_CALIB_BASE_BAND); 154 BIT(IWL_CALIB_BASE_BAND);
158 if (priv->cfg->need_dc_calib) 155 if (priv->cfg->need_dc_calib)
159 priv->hw_params.calib_rt_cfg |= BIT(IWL_CALIB_CFG_DC_IDX); 156 priv->hw_params.calib_rt_cfg |= IWL_CALIB_CFG_DC_IDX;
160 if (priv->cfg->need_temp_offset_calib) 157 if (priv->cfg->need_temp_offset_calib)
161 priv->hw_params.calib_init_cfg |= BIT(IWL_CALIB_TEMP_OFFSET); 158 priv->hw_params.calib_init_cfg |= BIT(IWL_CALIB_TEMP_OFFSET);
162 159
@@ -167,9 +164,6 @@ static int iwl2000_hw_set_hw_params(struct iwl_priv *priv)
167 164
168static struct iwl_lib_ops iwl2000_lib = { 165static struct iwl_lib_ops iwl2000_lib = {
169 .set_hw_params = iwl2000_hw_set_hw_params, 166 .set_hw_params = iwl2000_hw_set_hw_params,
170 .rx_handler_setup = iwlagn_rx_handler_setup,
171 .setup_deferred_work = iwlagn_setup_deferred_work,
172 .is_valid_rtc_data_addr = iwlagn_hw_valid_rtc_data_addr,
173 .nic_config = iwl2000_nic_config, 167 .nic_config = iwl2000_nic_config,
174 .eeprom_ops = { 168 .eeprom_ops = {
175 .regulatory_bands = { 169 .regulatory_bands = {
@@ -188,10 +182,9 @@ static struct iwl_lib_ops iwl2000_lib = {
188 182
189static struct iwl_lib_ops iwl2030_lib = { 183static struct iwl_lib_ops iwl2030_lib = {
190 .set_hw_params = iwl2000_hw_set_hw_params, 184 .set_hw_params = iwl2000_hw_set_hw_params,
191 .rx_handler_setup = iwlagn_bt_rx_handler_setup, 185 .bt_rx_handler_setup = iwlagn_bt_rx_handler_setup,
192 .setup_deferred_work = iwlagn_bt_setup_deferred_work, 186 .bt_setup_deferred_work = iwlagn_bt_setup_deferred_work,
193 .cancel_deferred_work = iwlagn_bt_cancel_deferred_work, 187 .cancel_deferred_work = iwlagn_bt_cancel_deferred_work,
194 .is_valid_rtc_data_addr = iwlagn_hw_valid_rtc_data_addr,
195 .nic_config = iwl2000_nic_config, 188 .nic_config = iwl2000_nic_config,
196 .eeprom_ops = { 189 .eeprom_ops = {
197 .regulatory_bands = { 190 .regulatory_bands = {
@@ -208,22 +201,6 @@ static struct iwl_lib_ops iwl2030_lib = {
208 .temperature = iwlagn_temperature, 201 .temperature = iwlagn_temperature,
209}; 202};
210 203
211static const struct iwl_ops iwl2000_ops = {
212 .lib = &iwl2000_lib,
213};
214
215static const struct iwl_ops iwl2030_ops = {
216 .lib = &iwl2030_lib,
217};
218
219static const struct iwl_ops iwl105_ops = {
220 .lib = &iwl2000_lib,
221};
222
223static const struct iwl_ops iwl135_ops = {
224 .lib = &iwl2030_lib,
225};
226
227static struct iwl_base_params iwl2000_base_params = { 204static struct iwl_base_params iwl2000_base_params = {
228 .eeprom_size = OTP_LOW_IMAGE_SIZE, 205 .eeprom_size = OTP_LOW_IMAGE_SIZE,
229 .num_of_queues = IWLAGN_NUM_QUEUES, 206 .num_of_queues = IWLAGN_NUM_QUEUES,
@@ -282,13 +259,12 @@ static struct iwl_bt_params iwl2030_bt_params = {
282 .ucode_api_min = IWL2000_UCODE_API_MIN, \ 259 .ucode_api_min = IWL2000_UCODE_API_MIN, \
283 .eeprom_ver = EEPROM_2000_EEPROM_VERSION, \ 260 .eeprom_ver = EEPROM_2000_EEPROM_VERSION, \
284 .eeprom_calib_ver = EEPROM_2000_TX_POWER_VERSION, \ 261 .eeprom_calib_ver = EEPROM_2000_TX_POWER_VERSION, \
285 .ops = &iwl2000_ops, \ 262 .lib = &iwl2000_lib, \
286 .base_params = &iwl2000_base_params, \ 263 .base_params = &iwl2000_base_params, \
287 .need_dc_calib = true, \ 264 .need_dc_calib = true, \
288 .need_temp_offset_calib = true, \ 265 .need_temp_offset_calib = true, \
289 .led_mode = IWL_LED_RF_STATE, \ 266 .led_mode = IWL_LED_RF_STATE, \
290 .iq_invert = true, \ 267 .iq_invert = true \
291 .disable_otp_refresh = true \
292 268
293struct iwl_cfg iwl2000_2bgn_cfg = { 269struct iwl_cfg iwl2000_2bgn_cfg = {
294 .name = "2000 Series 2x2 BGN", 270 .name = "2000 Series 2x2 BGN",
@@ -307,7 +283,7 @@ struct iwl_cfg iwl2000_2bg_cfg = {
307 .ucode_api_min = IWL2030_UCODE_API_MIN, \ 283 .ucode_api_min = IWL2030_UCODE_API_MIN, \
308 .eeprom_ver = EEPROM_2000_EEPROM_VERSION, \ 284 .eeprom_ver = EEPROM_2000_EEPROM_VERSION, \
309 .eeprom_calib_ver = EEPROM_2000_TX_POWER_VERSION, \ 285 .eeprom_calib_ver = EEPROM_2000_TX_POWER_VERSION, \
310 .ops = &iwl2030_ops, \ 286 .lib = &iwl2030_lib, \
311 .base_params = &iwl2030_base_params, \ 287 .base_params = &iwl2030_base_params, \
312 .bt_params = &iwl2030_bt_params, \ 288 .bt_params = &iwl2030_bt_params, \
313 .need_dc_calib = true, \ 289 .need_dc_calib = true, \
@@ -333,13 +309,14 @@ struct iwl_cfg iwl2030_2bg_cfg = {
333 .ucode_api_min = IWL105_UCODE_API_MIN, \ 309 .ucode_api_min = IWL105_UCODE_API_MIN, \
334 .eeprom_ver = EEPROM_2000_EEPROM_VERSION, \ 310 .eeprom_ver = EEPROM_2000_EEPROM_VERSION, \
335 .eeprom_calib_ver = EEPROM_2000_TX_POWER_VERSION, \ 311 .eeprom_calib_ver = EEPROM_2000_TX_POWER_VERSION, \
336 .ops = &iwl105_ops, \ 312 .lib = &iwl2000_lib, \
337 .base_params = &iwl2000_base_params, \ 313 .base_params = &iwl2000_base_params, \
338 .need_dc_calib = true, \ 314 .need_dc_calib = true, \
339 .need_temp_offset_calib = true, \ 315 .need_temp_offset_calib = true, \
340 .led_mode = IWL_LED_RF_STATE, \ 316 .led_mode = IWL_LED_RF_STATE, \
341 .adv_pm = true, \ 317 .adv_pm = true, \
342 .rx_with_siso_diversity = true \ 318 .rx_with_siso_diversity = true, \
319 .iq_invert = true \
343 320
344struct iwl_cfg iwl105_bg_cfg = { 321struct iwl_cfg iwl105_bg_cfg = {
345 .name = "105 Series 1x1 BG", 322 .name = "105 Series 1x1 BG",
@@ -358,14 +335,15 @@ struct iwl_cfg iwl105_bgn_cfg = {
358 .ucode_api_min = IWL135_UCODE_API_MIN, \ 335 .ucode_api_min = IWL135_UCODE_API_MIN, \
359 .eeprom_ver = EEPROM_2000_EEPROM_VERSION, \ 336 .eeprom_ver = EEPROM_2000_EEPROM_VERSION, \
360 .eeprom_calib_ver = EEPROM_2000_TX_POWER_VERSION, \ 337 .eeprom_calib_ver = EEPROM_2000_TX_POWER_VERSION, \
361 .ops = &iwl135_ops, \ 338 .lib = &iwl2030_lib, \
362 .base_params = &iwl2030_base_params, \ 339 .base_params = &iwl2030_base_params, \
363 .bt_params = &iwl2030_bt_params, \ 340 .bt_params = &iwl2030_bt_params, \
364 .need_dc_calib = true, \ 341 .need_dc_calib = true, \
365 .need_temp_offset_calib = true, \ 342 .need_temp_offset_calib = true, \
366 .led_mode = IWL_LED_RF_STATE, \ 343 .led_mode = IWL_LED_RF_STATE, \
367 .adv_pm = true, \ 344 .adv_pm = true, \
368 .rx_with_siso_diversity = true \ 345 .rx_with_siso_diversity = true, \
346 .iq_invert = true \
369 347
370struct iwl_cfg iwl135_bg_cfg = { 348struct iwl_cfg iwl135_bg_cfg = {
371 .name = "135 Series 1x1 BG/BT", 349 .name = "135 Series 1x1 BG/BT",
diff --git a/drivers/net/wireless/iwlwifi/iwl-5000.c b/drivers/net/wireless/iwlwifi/iwl-5000.c
index 556489302da3..3eeb12ebe6e9 100644
--- a/drivers/net/wireless/iwlwifi/iwl-5000.c
+++ b/drivers/net/wireless/iwlwifi/iwl-5000.c
@@ -315,14 +315,11 @@ static int iwl5000_hw_channel_switch(struct iwl_priv *priv,
315 return -EFAULT; 315 return -EFAULT;
316 } 316 }
317 317
318 return trans_send_cmd(priv, &hcmd); 318 return trans_send_cmd(&priv->trans, &hcmd);
319} 319}
320 320
321static struct iwl_lib_ops iwl5000_lib = { 321static struct iwl_lib_ops iwl5000_lib = {
322 .set_hw_params = iwl5000_hw_set_hw_params, 322 .set_hw_params = iwl5000_hw_set_hw_params,
323 .rx_handler_setup = iwlagn_rx_handler_setup,
324 .setup_deferred_work = iwlagn_setup_deferred_work,
325 .is_valid_rtc_data_addr = iwlagn_hw_valid_rtc_data_addr,
326 .set_channel_switch = iwl5000_hw_channel_switch, 323 .set_channel_switch = iwl5000_hw_channel_switch,
327 .nic_config = iwl5000_nic_config, 324 .nic_config = iwl5000_nic_config,
328 .eeprom_ops = { 325 .eeprom_ops = {
@@ -341,9 +338,6 @@ static struct iwl_lib_ops iwl5000_lib = {
341 338
342static struct iwl_lib_ops iwl5150_lib = { 339static struct iwl_lib_ops iwl5150_lib = {
343 .set_hw_params = iwl5150_hw_set_hw_params, 340 .set_hw_params = iwl5150_hw_set_hw_params,
344 .rx_handler_setup = iwlagn_rx_handler_setup,
345 .setup_deferred_work = iwlagn_setup_deferred_work,
346 .is_valid_rtc_data_addr = iwlagn_hw_valid_rtc_data_addr,
347 .set_channel_switch = iwl5000_hw_channel_switch, 341 .set_channel_switch = iwl5000_hw_channel_switch,
348 .nic_config = iwl5000_nic_config, 342 .nic_config = iwl5000_nic_config,
349 .eeprom_ops = { 343 .eeprom_ops = {
@@ -360,14 +354,6 @@ static struct iwl_lib_ops iwl5150_lib = {
360 .temperature = iwl5150_temperature, 354 .temperature = iwl5150_temperature,
361}; 355};
362 356
363static const struct iwl_ops iwl5000_ops = {
364 .lib = &iwl5000_lib,
365};
366
367static const struct iwl_ops iwl5150_ops = {
368 .lib = &iwl5150_lib,
369};
370
371static struct iwl_base_params iwl5000_base_params = { 357static struct iwl_base_params iwl5000_base_params = {
372 .eeprom_size = IWLAGN_EEPROM_IMG_SIZE, 358 .eeprom_size = IWLAGN_EEPROM_IMG_SIZE,
373 .num_of_queues = IWLAGN_NUM_QUEUES, 359 .num_of_queues = IWLAGN_NUM_QUEUES,
@@ -390,7 +376,7 @@ static struct iwl_ht_params iwl5000_ht_params = {
390 .ucode_api_min = IWL5000_UCODE_API_MIN, \ 376 .ucode_api_min = IWL5000_UCODE_API_MIN, \
391 .eeprom_ver = EEPROM_5000_EEPROM_VERSION, \ 377 .eeprom_ver = EEPROM_5000_EEPROM_VERSION, \
392 .eeprom_calib_ver = EEPROM_5000_TX_POWER_VERSION, \ 378 .eeprom_calib_ver = EEPROM_5000_TX_POWER_VERSION, \
393 .ops = &iwl5000_ops, \ 379 .lib = &iwl5000_lib, \
394 .base_params = &iwl5000_base_params, \ 380 .base_params = &iwl5000_base_params, \
395 .led_mode = IWL_LED_BLINK 381 .led_mode = IWL_LED_BLINK
396 382
@@ -433,7 +419,7 @@ struct iwl_cfg iwl5350_agn_cfg = {
433 .ucode_api_min = IWL5000_UCODE_API_MIN, 419 .ucode_api_min = IWL5000_UCODE_API_MIN,
434 .eeprom_ver = EEPROM_5050_EEPROM_VERSION, 420 .eeprom_ver = EEPROM_5050_EEPROM_VERSION,
435 .eeprom_calib_ver = EEPROM_5050_TX_POWER_VERSION, 421 .eeprom_calib_ver = EEPROM_5050_TX_POWER_VERSION,
436 .ops = &iwl5000_ops, 422 .lib = &iwl5000_lib,
437 .base_params = &iwl5000_base_params, 423 .base_params = &iwl5000_base_params,
438 .ht_params = &iwl5000_ht_params, 424 .ht_params = &iwl5000_ht_params,
439 .led_mode = IWL_LED_BLINK, 425 .led_mode = IWL_LED_BLINK,
@@ -446,7 +432,7 @@ struct iwl_cfg iwl5350_agn_cfg = {
446 .ucode_api_min = IWL5150_UCODE_API_MIN, \ 432 .ucode_api_min = IWL5150_UCODE_API_MIN, \
447 .eeprom_ver = EEPROM_5050_EEPROM_VERSION, \ 433 .eeprom_ver = EEPROM_5050_EEPROM_VERSION, \
448 .eeprom_calib_ver = EEPROM_5050_TX_POWER_VERSION, \ 434 .eeprom_calib_ver = EEPROM_5050_TX_POWER_VERSION, \
449 .ops = &iwl5150_ops, \ 435 .lib = &iwl5150_lib, \
450 .base_params = &iwl5000_base_params, \ 436 .base_params = &iwl5000_base_params, \
451 .need_dc_calib = true, \ 437 .need_dc_calib = true, \
452 .led_mode = IWL_LED_BLINK, \ 438 .led_mode = IWL_LED_BLINK, \
diff --git a/drivers/net/wireless/iwlwifi/iwl-6000.c b/drivers/net/wireless/iwlwifi/iwl-6000.c
index 80f1ef61a3d5..973d1972e8cc 100644
--- a/drivers/net/wireless/iwlwifi/iwl-6000.c
+++ b/drivers/net/wireless/iwlwifi/iwl-6000.c
@@ -106,10 +106,8 @@ static void iwl6000_nic_config(struct iwl_priv *priv)
106 CSR_GP_DRIVER_REG_BIT_RADIO_SKU_2x2_IPA); 106 CSR_GP_DRIVER_REG_BIT_RADIO_SKU_2x2_IPA);
107 } 107 }
108 /* do additional nic configuration if needed */ 108 /* do additional nic configuration if needed */
109 if (priv->cfg->ops->nic && 109 if (priv->cfg->additional_nic_config)
110 priv->cfg->ops->nic->additional_nic_config) { 110 priv->cfg->additional_nic_config(priv);
111 priv->cfg->ops->nic->additional_nic_config(priv);
112 }
113} 111}
114 112
115static struct iwl_sensitivity_ranges iwl6000_sensitivity = { 113static struct iwl_sensitivity_ranges iwl6000_sensitivity = {
@@ -178,7 +176,7 @@ static int iwl6000_hw_set_hw_params(struct iwl_priv *priv)
178 BIT(IWL_CALIB_TX_IQ) | 176 BIT(IWL_CALIB_TX_IQ) |
179 BIT(IWL_CALIB_BASE_BAND); 177 BIT(IWL_CALIB_BASE_BAND);
180 if (priv->cfg->need_dc_calib) 178 if (priv->cfg->need_dc_calib)
181 priv->hw_params.calib_rt_cfg |= BIT(IWL_CALIB_CFG_DC_IDX); 179 priv->hw_params.calib_rt_cfg |= IWL_CALIB_CFG_DC_IDX;
182 if (priv->cfg->need_temp_offset_calib) 180 if (priv->cfg->need_temp_offset_calib)
183 priv->hw_params.calib_init_cfg |= BIT(IWL_CALIB_TEMP_OFFSET); 181 priv->hw_params.calib_init_cfg |= BIT(IWL_CALIB_TEMP_OFFSET);
184 182
@@ -255,14 +253,11 @@ static int iwl6000_hw_channel_switch(struct iwl_priv *priv,
255 return -EFAULT; 253 return -EFAULT;
256 } 254 }
257 255
258 return trans_send_cmd(priv, &hcmd); 256 return trans_send_cmd(&priv->trans, &hcmd);
259} 257}
260 258
261static struct iwl_lib_ops iwl6000_lib = { 259static struct iwl_lib_ops iwl6000_lib = {
262 .set_hw_params = iwl6000_hw_set_hw_params, 260 .set_hw_params = iwl6000_hw_set_hw_params,
263 .rx_handler_setup = iwlagn_rx_handler_setup,
264 .setup_deferred_work = iwlagn_setup_deferred_work,
265 .is_valid_rtc_data_addr = iwlagn_hw_valid_rtc_data_addr,
266 .set_channel_switch = iwl6000_hw_channel_switch, 261 .set_channel_switch = iwl6000_hw_channel_switch,
267 .nic_config = iwl6000_nic_config, 262 .nic_config = iwl6000_nic_config,
268 .eeprom_ops = { 263 .eeprom_ops = {
@@ -282,10 +277,9 @@ static struct iwl_lib_ops iwl6000_lib = {
282 277
283static struct iwl_lib_ops iwl6030_lib = { 278static struct iwl_lib_ops iwl6030_lib = {
284 .set_hw_params = iwl6000_hw_set_hw_params, 279 .set_hw_params = iwl6000_hw_set_hw_params,
285 .rx_handler_setup = iwlagn_bt_rx_handler_setup, 280 .bt_rx_handler_setup = iwlagn_bt_rx_handler_setup,
286 .setup_deferred_work = iwlagn_bt_setup_deferred_work, 281 .bt_setup_deferred_work = iwlagn_bt_setup_deferred_work,
287 .cancel_deferred_work = iwlagn_bt_cancel_deferred_work, 282 .cancel_deferred_work = iwlagn_bt_cancel_deferred_work,
288 .is_valid_rtc_data_addr = iwlagn_hw_valid_rtc_data_addr,
289 .set_channel_switch = iwl6000_hw_channel_switch, 283 .set_channel_switch = iwl6000_hw_channel_switch,
290 .nic_config = iwl6000_nic_config, 284 .nic_config = iwl6000_nic_config,
291 .eeprom_ops = { 285 .eeprom_ops = {
@@ -303,32 +297,6 @@ static struct iwl_lib_ops iwl6030_lib = {
303 .temperature = iwlagn_temperature, 297 .temperature = iwlagn_temperature,
304}; 298};
305 299
306static struct iwl_nic_ops iwl6050_nic_ops = {
307 .additional_nic_config = &iwl6050_additional_nic_config,
308};
309
310static struct iwl_nic_ops iwl6150_nic_ops = {
311 .additional_nic_config = &iwl6150_additional_nic_config,
312};
313
314static const struct iwl_ops iwl6000_ops = {
315 .lib = &iwl6000_lib,
316};
317
318static const struct iwl_ops iwl6050_ops = {
319 .lib = &iwl6000_lib,
320 .nic = &iwl6050_nic_ops,
321};
322
323static const struct iwl_ops iwl6150_ops = {
324 .lib = &iwl6000_lib,
325 .nic = &iwl6150_nic_ops,
326};
327
328static const struct iwl_ops iwl6030_ops = {
329 .lib = &iwl6030_lib,
330};
331
332static struct iwl_base_params iwl6000_base_params = { 300static struct iwl_base_params iwl6000_base_params = {
333 .eeprom_size = OTP_LOW_IMAGE_SIZE, 301 .eeprom_size = OTP_LOW_IMAGE_SIZE,
334 .num_of_queues = IWLAGN_NUM_QUEUES, 302 .num_of_queues = IWLAGN_NUM_QUEUES,
@@ -402,7 +370,7 @@ static struct iwl_bt_params iwl6000_bt_params = {
402 .ucode_api_min = IWL6000G2_UCODE_API_MIN, \ 370 .ucode_api_min = IWL6000G2_UCODE_API_MIN, \
403 .eeprom_ver = EEPROM_6005_EEPROM_VERSION, \ 371 .eeprom_ver = EEPROM_6005_EEPROM_VERSION, \
404 .eeprom_calib_ver = EEPROM_6005_TX_POWER_VERSION, \ 372 .eeprom_calib_ver = EEPROM_6005_TX_POWER_VERSION, \
405 .ops = &iwl6000_ops, \ 373 .lib = &iwl6000_lib, \
406 .base_params = &iwl6000_g2_base_params, \ 374 .base_params = &iwl6000_g2_base_params, \
407 .need_dc_calib = true, \ 375 .need_dc_calib = true, \
408 .need_temp_offset_calib = true, \ 376 .need_temp_offset_calib = true, \
@@ -430,7 +398,7 @@ struct iwl_cfg iwl6005_2bg_cfg = {
430 .ucode_api_min = IWL6000G2_UCODE_API_MIN, \ 398 .ucode_api_min = IWL6000G2_UCODE_API_MIN, \
431 .eeprom_ver = EEPROM_6030_EEPROM_VERSION, \ 399 .eeprom_ver = EEPROM_6030_EEPROM_VERSION, \
432 .eeprom_calib_ver = EEPROM_6030_TX_POWER_VERSION, \ 400 .eeprom_calib_ver = EEPROM_6030_TX_POWER_VERSION, \
433 .ops = &iwl6030_ops, \ 401 .lib = &iwl6030_lib, \
434 .base_params = &iwl6000_g2_base_params, \ 402 .base_params = &iwl6000_g2_base_params, \
435 .bt_params = &iwl6000_bt_params, \ 403 .bt_params = &iwl6000_bt_params, \
436 .need_dc_calib = true, \ 404 .need_dc_calib = true, \
@@ -511,7 +479,7 @@ struct iwl_cfg iwl130_bg_cfg = {
511 .valid_rx_ant = ANT_BC, /* .cfg overwrite */ \ 479 .valid_rx_ant = ANT_BC, /* .cfg overwrite */ \
512 .eeprom_ver = EEPROM_6000_EEPROM_VERSION, \ 480 .eeprom_ver = EEPROM_6000_EEPROM_VERSION, \
513 .eeprom_calib_ver = EEPROM_6000_TX_POWER_VERSION, \ 481 .eeprom_calib_ver = EEPROM_6000_TX_POWER_VERSION, \
514 .ops = &iwl6000_ops, \ 482 .lib = &iwl6000_lib, \
515 .base_params = &iwl6000_base_params, \ 483 .base_params = &iwl6000_base_params, \
516 .pa_type = IWL_PA_INTERNAL, \ 484 .pa_type = IWL_PA_INTERNAL, \
517 .led_mode = IWL_LED_BLINK 485 .led_mode = IWL_LED_BLINK
@@ -538,7 +506,8 @@ struct iwl_cfg iwl6000i_2bg_cfg = {
538 .ucode_api_min = IWL6050_UCODE_API_MIN, \ 506 .ucode_api_min = IWL6050_UCODE_API_MIN, \
539 .valid_tx_ant = ANT_AB, /* .cfg overwrite */ \ 507 .valid_tx_ant = ANT_AB, /* .cfg overwrite */ \
540 .valid_rx_ant = ANT_AB, /* .cfg overwrite */ \ 508 .valid_rx_ant = ANT_AB, /* .cfg overwrite */ \
541 .ops = &iwl6050_ops, \ 509 .lib = &iwl6000_lib, \
510 .additional_nic_config = iwl6050_additional_nic_config, \
542 .eeprom_ver = EEPROM_6050_EEPROM_VERSION, \ 511 .eeprom_ver = EEPROM_6050_EEPROM_VERSION, \
543 .eeprom_calib_ver = EEPROM_6050_TX_POWER_VERSION, \ 512 .eeprom_calib_ver = EEPROM_6050_TX_POWER_VERSION, \
544 .base_params = &iwl6050_base_params, \ 513 .base_params = &iwl6050_base_params, \
@@ -561,7 +530,8 @@ struct iwl_cfg iwl6050_2abg_cfg = {
561 .fw_name_pre = IWL6050_FW_PRE, \ 530 .fw_name_pre = IWL6050_FW_PRE, \
562 .ucode_api_max = IWL6050_UCODE_API_MAX, \ 531 .ucode_api_max = IWL6050_UCODE_API_MAX, \
563 .ucode_api_min = IWL6050_UCODE_API_MIN, \ 532 .ucode_api_min = IWL6050_UCODE_API_MIN, \
564 .ops = &iwl6150_ops, \ 533 .lib = &iwl6000_lib, \
534 .additional_nic_config = iwl6150_additional_nic_config, \
565 .eeprom_ver = EEPROM_6150_EEPROM_VERSION, \ 535 .eeprom_ver = EEPROM_6150_EEPROM_VERSION, \
566 .eeprom_calib_ver = EEPROM_6150_TX_POWER_VERSION, \ 536 .eeprom_calib_ver = EEPROM_6150_TX_POWER_VERSION, \
567 .base_params = &iwl6050_base_params, \ 537 .base_params = &iwl6050_base_params, \
@@ -587,7 +557,7 @@ struct iwl_cfg iwl6000_3agn_cfg = {
587 .ucode_api_min = IWL6000_UCODE_API_MIN, 557 .ucode_api_min = IWL6000_UCODE_API_MIN,
588 .eeprom_ver = EEPROM_6000_EEPROM_VERSION, 558 .eeprom_ver = EEPROM_6000_EEPROM_VERSION,
589 .eeprom_calib_ver = EEPROM_6000_TX_POWER_VERSION, 559 .eeprom_calib_ver = EEPROM_6000_TX_POWER_VERSION,
590 .ops = &iwl6000_ops, 560 .lib = &iwl6000_lib,
591 .base_params = &iwl6000_base_params, 561 .base_params = &iwl6000_base_params,
592 .ht_params = &iwl6000_ht_params, 562 .ht_params = &iwl6000_ht_params,
593 .need_dc_calib = true, 563 .need_dc_calib = true,
diff --git a/drivers/net/wireless/iwlwifi/iwl-agn-calib.c b/drivers/net/wireless/iwlwifi/iwl-agn-calib.c
index 02c7c65ee86a..72d6297602b8 100644
--- a/drivers/net/wireless/iwlwifi/iwl-agn-calib.c
+++ b/drivers/net/wireless/iwlwifi/iwl-agn-calib.c
@@ -98,7 +98,7 @@ int iwl_send_calib_results(struct iwl_priv *priv)
98 hcmd.len[0] = priv->calib_results[i].buf_len; 98 hcmd.len[0] = priv->calib_results[i].buf_len;
99 hcmd.data[0] = priv->calib_results[i].buf; 99 hcmd.data[0] = priv->calib_results[i].buf;
100 hcmd.dataflags[0] = IWL_HCMD_DFL_NOCOPY; 100 hcmd.dataflags[0] = IWL_HCMD_DFL_NOCOPY;
101 ret = trans_send_cmd(priv, &hcmd); 101 ret = trans_send_cmd(&priv->trans, &hcmd);
102 if (ret) { 102 if (ret) {
103 IWL_ERR(priv, "Error %d iteration %d\n", 103 IWL_ERR(priv, "Error %d iteration %d\n",
104 ret, i); 104 ret, i);
@@ -484,7 +484,7 @@ static int iwl_sensitivity_write(struct iwl_priv *priv)
484 memcpy(&(priv->sensitivity_tbl[0]), &(cmd.table[0]), 484 memcpy(&(priv->sensitivity_tbl[0]), &(cmd.table[0]),
485 sizeof(u16)*HD_TABLE_SIZE); 485 sizeof(u16)*HD_TABLE_SIZE);
486 486
487 return trans_send_cmd(priv, &cmd_out); 487 return trans_send_cmd(&priv->trans, &cmd_out);
488} 488}
489 489
490/* Prepare a SENSITIVITY_CMD, send to uCode if values have changed */ 490/* Prepare a SENSITIVITY_CMD, send to uCode if values have changed */
@@ -548,7 +548,7 @@ static int iwl_enhance_sensitivity_write(struct iwl_priv *priv)
548 &(cmd.enhance_table[HD_INA_NON_SQUARE_DET_OFDM_INDEX]), 548 &(cmd.enhance_table[HD_INA_NON_SQUARE_DET_OFDM_INDEX]),
549 sizeof(u16)*ENHANCE_HD_TABLE_ENTRIES); 549 sizeof(u16)*ENHANCE_HD_TABLE_ENTRIES);
550 550
551 return trans_send_cmd(priv, &cmd_out); 551 return trans_send_cmd(&priv->trans, &cmd_out);
552} 552}
553 553
554void iwl_init_sensitivity(struct iwl_priv *priv) 554void iwl_init_sensitivity(struct iwl_priv *priv)
@@ -840,6 +840,65 @@ static void iwl_find_disconn_antenna(struct iwl_priv *priv, u32* average_sig,
840 active_chains); 840 active_chains);
841} 841}
842 842
843static void iwlagn_gain_computation(struct iwl_priv *priv,
844 u32 average_noise[NUM_RX_CHAINS],
845 u16 min_average_noise_antenna_i,
846 u32 min_average_noise,
847 u8 default_chain)
848{
849 int i;
850 s32 delta_g;
851 struct iwl_chain_noise_data *data = &priv->chain_noise_data;
852
853 /*
854 * Find Gain Code for the chains based on "default chain"
855 */
856 for (i = default_chain + 1; i < NUM_RX_CHAINS; i++) {
857 if ((data->disconn_array[i])) {
858 data->delta_gain_code[i] = 0;
859 continue;
860 }
861
862 delta_g = (priv->cfg->base_params->chain_noise_scale *
863 ((s32)average_noise[default_chain] -
864 (s32)average_noise[i])) / 1500;
865
866 /* bound gain by 2 bits value max, 3rd bit is sign */
867 data->delta_gain_code[i] =
868 min(abs(delta_g),
869 (long) CHAIN_NOISE_MAX_DELTA_GAIN_CODE);
870
871 if (delta_g < 0)
872 /*
873 * set negative sign ...
874 * note to Intel developers: This is uCode API format,
875 * not the format of any internal device registers.
876 * Do not change this format for e.g. 6050 or similar
877 * devices. Change format only if more resolution
878 * (i.e. more than 2 bits magnitude) is needed.
879 */
880 data->delta_gain_code[i] |= (1 << 2);
881 }
882
883 IWL_DEBUG_CALIB(priv, "Delta gains: ANT_B = %d ANT_C = %d\n",
884 data->delta_gain_code[1], data->delta_gain_code[2]);
885
886 if (!data->radio_write) {
887 struct iwl_calib_chain_noise_gain_cmd cmd;
888
889 memset(&cmd, 0, sizeof(cmd));
890
891 iwl_set_calib_hdr(&cmd.hdr,
892 priv->phy_calib_chain_noise_gain_cmd);
893 cmd.delta_gain_1 = data->delta_gain_code[1];
894 cmd.delta_gain_2 = data->delta_gain_code[2];
895 trans_send_cmd_pdu(&priv->trans, REPLY_PHY_CALIBRATION_CMD,
896 CMD_ASYNC, sizeof(cmd), &cmd);
897
898 data->radio_write = 1;
899 data->state = IWL_CHAIN_NOISE_CALIBRATED;
900 }
901}
843 902
844/* 903/*
845 * Accumulate 16 beacons of signal and noise statistics for each of 904 * Accumulate 16 beacons of signal and noise statistics for each of
diff --git a/drivers/net/wireless/iwlwifi/iwl-agn-hcmd.c b/drivers/net/wireless/iwlwifi/iwl-agn-hcmd.c
deleted file mode 100644
index f0f5f5eada75..000000000000
--- a/drivers/net/wireless/iwlwifi/iwl-agn-hcmd.c
+++ /dev/null
@@ -1,210 +0,0 @@
1/******************************************************************************
2 *
3 * GPL LICENSE SUMMARY
4 *
5 * Copyright(c) 2008 - 2011 Intel Corporation. All rights reserved.
6 *
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of version 2 of the GNU General Public License as
9 * published by the Free Software Foundation.
10 *
11 * This program is distributed in the hope that it will be useful, but
12 * WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
14 * General Public License for more details.
15 *
16 * You should have received a copy of the GNU General Public License
17 * along with this program; if not, write to the Free Software
18 * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110,
19 * USA
20 *
21 * The full GNU General Public License is included in this distribution
22 * in the file called LICENSE.GPL.
23 *
24 * Contact Information:
25 * Intel Linux Wireless <ilw@linux.intel.com>
26 * Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
27 *
28 *****************************************************************************/
29
30#include <linux/kernel.h>
31#include <linux/module.h>
32#include <linux/init.h>
33#include <linux/sched.h>
34
35#include "iwl-dev.h"
36#include "iwl-core.h"
37#include "iwl-io.h"
38#include "iwl-agn.h"
39#include "iwl-trans.h"
40
41int iwlagn_send_tx_ant_config(struct iwl_priv *priv, u8 valid_tx_ant)
42{
43 struct iwl_tx_ant_config_cmd tx_ant_cmd = {
44 .valid = cpu_to_le32(valid_tx_ant),
45 };
46
47 if (IWL_UCODE_API(priv->ucode_ver) > 1) {
48 IWL_DEBUG_HC(priv, "select valid tx ant: %u\n", valid_tx_ant);
49 return trans_send_cmd_pdu(priv,
50 TX_ANT_CONFIGURATION_CMD,
51 CMD_SYNC,
52 sizeof(struct iwl_tx_ant_config_cmd),
53 &tx_ant_cmd);
54 } else {
55 IWL_DEBUG_HC(priv, "TX_ANT_CONFIGURATION_CMD not supported\n");
56 return -EOPNOTSUPP;
57 }
58}
59
60void iwlagn_gain_computation(struct iwl_priv *priv,
61 u32 average_noise[NUM_RX_CHAINS],
62 u16 min_average_noise_antenna_i,
63 u32 min_average_noise,
64 u8 default_chain)
65{
66 int i;
67 s32 delta_g;
68 struct iwl_chain_noise_data *data = &priv->chain_noise_data;
69
70 /*
71 * Find Gain Code for the chains based on "default chain"
72 */
73 for (i = default_chain + 1; i < NUM_RX_CHAINS; i++) {
74 if ((data->disconn_array[i])) {
75 data->delta_gain_code[i] = 0;
76 continue;
77 }
78
79 delta_g = (priv->cfg->base_params->chain_noise_scale *
80 ((s32)average_noise[default_chain] -
81 (s32)average_noise[i])) / 1500;
82
83 /* bound gain by 2 bits value max, 3rd bit is sign */
84 data->delta_gain_code[i] =
85 min(abs(delta_g), (long) CHAIN_NOISE_MAX_DELTA_GAIN_CODE);
86
87 if (delta_g < 0)
88 /*
89 * set negative sign ...
90 * note to Intel developers: This is uCode API format,
91 * not the format of any internal device registers.
92 * Do not change this format for e.g. 6050 or similar
93 * devices. Change format only if more resolution
94 * (i.e. more than 2 bits magnitude) is needed.
95 */
96 data->delta_gain_code[i] |= (1 << 2);
97 }
98
99 IWL_DEBUG_CALIB(priv, "Delta gains: ANT_B = %d ANT_C = %d\n",
100 data->delta_gain_code[1], data->delta_gain_code[2]);
101
102 if (!data->radio_write) {
103 struct iwl_calib_chain_noise_gain_cmd cmd;
104
105 memset(&cmd, 0, sizeof(cmd));
106
107 iwl_set_calib_hdr(&cmd.hdr,
108 priv->_agn.phy_calib_chain_noise_gain_cmd);
109 cmd.delta_gain_1 = data->delta_gain_code[1];
110 cmd.delta_gain_2 = data->delta_gain_code[2];
111 trans_send_cmd_pdu(priv, REPLY_PHY_CALIBRATION_CMD,
112 CMD_ASYNC, sizeof(cmd), &cmd);
113
114 data->radio_write = 1;
115 data->state = IWL_CHAIN_NOISE_CALIBRATED;
116 }
117}
118
119int iwlagn_set_pan_params(struct iwl_priv *priv)
120{
121 struct iwl_wipan_params_cmd cmd;
122 struct iwl_rxon_context *ctx_bss, *ctx_pan;
123 int slot0 = 300, slot1 = 0;
124 int ret;
125
126 if (priv->valid_contexts == BIT(IWL_RXON_CTX_BSS))
127 return 0;
128
129 BUILD_BUG_ON(NUM_IWL_RXON_CTX != 2);
130
131 lockdep_assert_held(&priv->mutex);
132
133 ctx_bss = &priv->contexts[IWL_RXON_CTX_BSS];
134 ctx_pan = &priv->contexts[IWL_RXON_CTX_PAN];
135
136 /*
137 * If the PAN context is inactive, then we don't need
138 * to update the PAN parameters, the last thing we'll
139 * have done before it goes inactive is making the PAN
140 * parameters be WLAN-only.
141 */
142 if (!ctx_pan->is_active)
143 return 0;
144
145 memset(&cmd, 0, sizeof(cmd));
146
147 /* only 2 slots are currently allowed */
148 cmd.num_slots = 2;
149
150 cmd.slots[0].type = 0; /* BSS */
151 cmd.slots[1].type = 1; /* PAN */
152
153 if (priv->_agn.hw_roc_channel) {
154 /* both contexts must be used for this to happen */
155 slot1 = priv->_agn.hw_roc_duration;
156 slot0 = IWL_MIN_SLOT_TIME;
157 } else if (ctx_bss->vif && ctx_pan->vif) {
158 int bcnint = ctx_pan->vif->bss_conf.beacon_int;
159 int dtim = ctx_pan->vif->bss_conf.dtim_period ?: 1;
160
161 /* should be set, but seems unused?? */
162 cmd.flags |= cpu_to_le16(IWL_WIPAN_PARAMS_FLG_SLOTTED_MODE);
163
164 if (ctx_pan->vif->type == NL80211_IFTYPE_AP &&
165 bcnint &&
166 bcnint != ctx_bss->vif->bss_conf.beacon_int) {
167 IWL_ERR(priv,
168 "beacon intervals don't match (%d, %d)\n",
169 ctx_bss->vif->bss_conf.beacon_int,
170 ctx_pan->vif->bss_conf.beacon_int);
171 } else
172 bcnint = max_t(int, bcnint,
173 ctx_bss->vif->bss_conf.beacon_int);
174 if (!bcnint)
175 bcnint = DEFAULT_BEACON_INTERVAL;
176 slot0 = bcnint / 2;
177 slot1 = bcnint - slot0;
178
179 if (test_bit(STATUS_SCAN_HW, &priv->status) ||
180 (!ctx_bss->vif->bss_conf.idle &&
181 !ctx_bss->vif->bss_conf.assoc)) {
182 slot0 = dtim * bcnint * 3 - IWL_MIN_SLOT_TIME;
183 slot1 = IWL_MIN_SLOT_TIME;
184 } else if (!ctx_pan->vif->bss_conf.idle &&
185 !ctx_pan->vif->bss_conf.assoc) {
186 slot1 = bcnint * 3 - IWL_MIN_SLOT_TIME;
187 slot0 = IWL_MIN_SLOT_TIME;
188 }
189 } else if (ctx_pan->vif) {
190 slot0 = 0;
191 slot1 = max_t(int, 1, ctx_pan->vif->bss_conf.dtim_period) *
192 ctx_pan->vif->bss_conf.beacon_int;
193 slot1 = max_t(int, DEFAULT_BEACON_INTERVAL, slot1);
194
195 if (test_bit(STATUS_SCAN_HW, &priv->status)) {
196 slot0 = slot1 * 3 - IWL_MIN_SLOT_TIME;
197 slot1 = IWL_MIN_SLOT_TIME;
198 }
199 }
200
201 cmd.slots[0].width = cpu_to_le16(slot0);
202 cmd.slots[1].width = cpu_to_le16(slot1);
203
204 ret = trans_send_cmd_pdu(priv, REPLY_WIPAN_PARAMS, CMD_SYNC,
205 sizeof(cmd), &cmd);
206 if (ret)
207 IWL_ERR(priv, "Error setting PAN parameters (%d)\n", ret);
208
209 return ret;
210}
diff --git a/drivers/net/wireless/iwlwifi/iwl-agn-ict.c b/drivers/net/wireless/iwlwifi/iwl-agn-ict.c
deleted file mode 100644
index f1b40ec1c873..000000000000
--- a/drivers/net/wireless/iwlwifi/iwl-agn-ict.c
+++ /dev/null
@@ -1,306 +0,0 @@
1/******************************************************************************
2 *
3 * GPL LICENSE SUMMARY
4 *
5 * Copyright(c) 2008 - 2011 Intel Corporation. All rights reserved.
6 *
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of version 2 of the GNU General Public License as
9 * published by the Free Software Foundation.
10 *
11 * This program is distributed in the hope that it will be useful, but
12 * WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
14 * General Public License for more details.
15 *
16 * You should have received a copy of the GNU General Public License
17 * along with this program; if not, write to the Free Software
18 * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110,
19 * USA
20 *
21 * The full GNU General Public License is included in this distribution
22 * in the file called LICENSE.GPL.
23 *
24 * Contact Information:
25 * Intel Linux Wireless <ilw@linux.intel.com>
26 * Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
27 *****************************************************************************/
28
29#include <linux/kernel.h>
30#include <linux/module.h>
31#include <linux/etherdevice.h>
32#include <linux/sched.h>
33#include <linux/gfp.h>
34#include <net/mac80211.h>
35
36#include "iwl-dev.h"
37#include "iwl-core.h"
38#include "iwl-agn.h"
39#include "iwl-helpers.h"
40
41#define ICT_COUNT (PAGE_SIZE/sizeof(u32))
42
43/* Free dram table */
44void iwl_free_isr_ict(struct iwl_priv *priv)
45{
46 if (priv->_agn.ict_tbl_vir) {
47 dma_free_coherent(priv->bus.dev,
48 (sizeof(u32) * ICT_COUNT) + PAGE_SIZE,
49 priv->_agn.ict_tbl_vir,
50 priv->_agn.ict_tbl_dma);
51 priv->_agn.ict_tbl_vir = NULL;
52 }
53}
54
55
56/* allocate dram shared table it is a PAGE_SIZE aligned
57 * also reset all data related to ICT table interrupt.
58 */
59int iwl_alloc_isr_ict(struct iwl_priv *priv)
60{
61
62 /* allocate shrared data table */
63 priv->_agn.ict_tbl_vir =
64 dma_alloc_coherent(priv->bus.dev,
65 (sizeof(u32) * ICT_COUNT) + PAGE_SIZE,
66 &priv->_agn.ict_tbl_dma, GFP_KERNEL);
67 if (!priv->_agn.ict_tbl_vir)
68 return -ENOMEM;
69
70 /* align table to PAGE_SIZE boundary */
71 priv->_agn.aligned_ict_tbl_dma = ALIGN(priv->_agn.ict_tbl_dma, PAGE_SIZE);
72
73 IWL_DEBUG_ISR(priv, "ict dma addr %Lx dma aligned %Lx diff %d\n",
74 (unsigned long long)priv->_agn.ict_tbl_dma,
75 (unsigned long long)priv->_agn.aligned_ict_tbl_dma,
76 (int)(priv->_agn.aligned_ict_tbl_dma - priv->_agn.ict_tbl_dma));
77
78 priv->_agn.ict_tbl = priv->_agn.ict_tbl_vir +
79 (priv->_agn.aligned_ict_tbl_dma - priv->_agn.ict_tbl_dma);
80
81 IWL_DEBUG_ISR(priv, "ict vir addr %p vir aligned %p diff %d\n",
82 priv->_agn.ict_tbl, priv->_agn.ict_tbl_vir,
83 (int)(priv->_agn.aligned_ict_tbl_dma - priv->_agn.ict_tbl_dma));
84
85 /* reset table and index to all 0 */
86 memset(priv->_agn.ict_tbl_vir,0, (sizeof(u32) * ICT_COUNT) + PAGE_SIZE);
87 priv->_agn.ict_index = 0;
88
89 /* add periodic RX interrupt */
90 priv->inta_mask |= CSR_INT_BIT_RX_PERIODIC;
91 return 0;
92}
93
94/* Device is going up inform it about using ICT interrupt table,
95 * also we need to tell the driver to start using ICT interrupt.
96 */
97int iwl_reset_ict(struct iwl_priv *priv)
98{
99 u32 val;
100 unsigned long flags;
101
102 if (!priv->_agn.ict_tbl_vir)
103 return 0;
104
105 spin_lock_irqsave(&priv->lock, flags);
106 iwl_disable_interrupts(priv);
107
108 memset(&priv->_agn.ict_tbl[0], 0, sizeof(u32) * ICT_COUNT);
109
110 val = priv->_agn.aligned_ict_tbl_dma >> PAGE_SHIFT;
111
112 val |= CSR_DRAM_INT_TBL_ENABLE;
113 val |= CSR_DRAM_INIT_TBL_WRAP_CHECK;
114
115 IWL_DEBUG_ISR(priv, "CSR_DRAM_INT_TBL_REG =0x%X "
116 "aligned dma address %Lx\n",
117 val, (unsigned long long)priv->_agn.aligned_ict_tbl_dma);
118
119 iwl_write32(priv, CSR_DRAM_INT_TBL_REG, val);
120 priv->_agn.use_ict = true;
121 priv->_agn.ict_index = 0;
122 iwl_write32(priv, CSR_INT, priv->inta_mask);
123 iwl_enable_interrupts(priv);
124 spin_unlock_irqrestore(&priv->lock, flags);
125
126 return 0;
127}
128
129/* Device is going down disable ict interrupt usage */
130void iwl_disable_ict(struct iwl_priv *priv)
131{
132 unsigned long flags;
133
134 spin_lock_irqsave(&priv->lock, flags);
135 priv->_agn.use_ict = false;
136 spin_unlock_irqrestore(&priv->lock, flags);
137}
138
139static irqreturn_t iwl_isr(int irq, void *data)
140{
141 struct iwl_priv *priv = data;
142 u32 inta, inta_mask;
143 unsigned long flags;
144#ifdef CONFIG_IWLWIFI_DEBUG
145 u32 inta_fh;
146#endif
147 if (!priv)
148 return IRQ_NONE;
149
150 spin_lock_irqsave(&priv->lock, flags);
151
152 /* Disable (but don't clear!) interrupts here to avoid
153 * back-to-back ISRs and sporadic interrupts from our NIC.
154 * If we have something to service, the tasklet will re-enable ints.
155 * If we *don't* have something, we'll re-enable before leaving here. */
156 inta_mask = iwl_read32(priv, CSR_INT_MASK); /* just for debug */
157 iwl_write32(priv, CSR_INT_MASK, 0x00000000);
158
159 /* Discover which interrupts are active/pending */
160 inta = iwl_read32(priv, CSR_INT);
161
162 /* Ignore interrupt if there's nothing in NIC to service.
163 * This may be due to IRQ shared with another device,
164 * or due to sporadic interrupts thrown from our NIC. */
165 if (!inta) {
166 IWL_DEBUG_ISR(priv, "Ignore interrupt, inta == 0\n");
167 goto none;
168 }
169
170 if ((inta == 0xFFFFFFFF) || ((inta & 0xFFFFFFF0) == 0xa5a5a5a0)) {
171 /* Hardware disappeared. It might have already raised
172 * an interrupt */
173 IWL_WARN(priv, "HARDWARE GONE?? INTA == 0x%08x\n", inta);
174 goto unplugged;
175 }
176
177#ifdef CONFIG_IWLWIFI_DEBUG
178 if (iwl_get_debug_level(priv) & (IWL_DL_ISR)) {
179 inta_fh = iwl_read32(priv, CSR_FH_INT_STATUS);
180 IWL_DEBUG_ISR(priv, "ISR inta 0x%08x, enabled 0x%08x, "
181 "fh 0x%08x\n", inta, inta_mask, inta_fh);
182 }
183#endif
184
185 priv->_agn.inta |= inta;
186 /* iwl_irq_tasklet() will service interrupts and re-enable them */
187 if (likely(inta))
188 tasklet_schedule(&priv->irq_tasklet);
189 else if (test_bit(STATUS_INT_ENABLED, &priv->status) && !priv->_agn.inta)
190 iwl_enable_interrupts(priv);
191
192 unplugged:
193 spin_unlock_irqrestore(&priv->lock, flags);
194 return IRQ_HANDLED;
195
196 none:
197 /* re-enable interrupts here since we don't have anything to service. */
198 /* only Re-enable if disabled by irq and no schedules tasklet. */
199 if (test_bit(STATUS_INT_ENABLED, &priv->status) && !priv->_agn.inta)
200 iwl_enable_interrupts(priv);
201
202 spin_unlock_irqrestore(&priv->lock, flags);
203 return IRQ_NONE;
204}
205
206/* interrupt handler using ict table, with this interrupt driver will
207 * stop using INTA register to get device's interrupt, reading this register
208 * is expensive, device will write interrupts in ICT dram table, increment
209 * index then will fire interrupt to driver, driver will OR all ICT table
210 * entries from current index up to table entry with 0 value. the result is
211 * the interrupt we need to service, driver will set the entries back to 0 and
212 * set index.
213 */
214irqreturn_t iwl_isr_ict(int irq, void *data)
215{
216 struct iwl_priv *priv = data;
217 u32 inta, inta_mask;
218 u32 val = 0;
219 unsigned long flags;
220
221 if (!priv)
222 return IRQ_NONE;
223
224 /* dram interrupt table not set yet,
225 * use legacy interrupt.
226 */
227 if (!priv->_agn.use_ict)
228 return iwl_isr(irq, data);
229
230 spin_lock_irqsave(&priv->lock, flags);
231
232 /* Disable (but don't clear!) interrupts here to avoid
233 * back-to-back ISRs and sporadic interrupts from our NIC.
234 * If we have something to service, the tasklet will re-enable ints.
235 * If we *don't* have something, we'll re-enable before leaving here.
236 */
237 inta_mask = iwl_read32(priv, CSR_INT_MASK); /* just for debug */
238 iwl_write32(priv, CSR_INT_MASK, 0x00000000);
239
240
241 /* Ignore interrupt if there's nothing in NIC to service.
242 * This may be due to IRQ shared with another device,
243 * or due to sporadic interrupts thrown from our NIC. */
244 if (!priv->_agn.ict_tbl[priv->_agn.ict_index]) {
245 IWL_DEBUG_ISR(priv, "Ignore interrupt, inta == 0\n");
246 goto none;
247 }
248
249 /* read all entries that not 0 start with ict_index */
250 while (priv->_agn.ict_tbl[priv->_agn.ict_index]) {
251
252 val |= le32_to_cpu(priv->_agn.ict_tbl[priv->_agn.ict_index]);
253 IWL_DEBUG_ISR(priv, "ICT index %d value 0x%08X\n",
254 priv->_agn.ict_index,
255 le32_to_cpu(priv->_agn.ict_tbl[priv->_agn.ict_index]));
256 priv->_agn.ict_tbl[priv->_agn.ict_index] = 0;
257 priv->_agn.ict_index = iwl_queue_inc_wrap(priv->_agn.ict_index,
258 ICT_COUNT);
259
260 }
261
262 /* We should not get this value, just ignore it. */
263 if (val == 0xffffffff)
264 val = 0;
265
266 /*
267 * this is a w/a for a h/w bug. the h/w bug may cause the Rx bit
268 * (bit 15 before shifting it to 31) to clear when using interrupt
269 * coalescing. fortunately, bits 18 and 19 stay set when this happens
270 * so we use them to decide on the real state of the Rx bit.
271 * In order words, bit 15 is set if bit 18 or bit 19 are set.
272 */
273 if (val & 0xC0000)
274 val |= 0x8000;
275
276 inta = (0xff & val) | ((0xff00 & val) << 16);
277 IWL_DEBUG_ISR(priv, "ISR inta 0x%08x, enabled 0x%08x ict 0x%08x\n",
278 inta, inta_mask, val);
279
280 inta &= priv->inta_mask;
281 priv->_agn.inta |= inta;
282
283 /* iwl_irq_tasklet() will service interrupts and re-enable them */
284 if (likely(inta))
285 tasklet_schedule(&priv->irq_tasklet);
286 else if (test_bit(STATUS_INT_ENABLED, &priv->status) && !priv->_agn.inta) {
287 /* Allow interrupt if was disabled by this handler and
288 * no tasklet was schedules, We should not enable interrupt,
289 * tasklet will enable it.
290 */
291 iwl_enable_interrupts(priv);
292 }
293
294 spin_unlock_irqrestore(&priv->lock, flags);
295 return IRQ_HANDLED;
296
297 none:
298 /* re-enable interrupts here since we don't have anything to service.
299 * only Re-enable if disabled by irq.
300 */
301 if (test_bit(STATUS_INT_ENABLED, &priv->status) && !priv->_agn.inta)
302 iwl_enable_interrupts(priv);
303
304 spin_unlock_irqrestore(&priv->lock, flags);
305 return IRQ_NONE;
306}
diff --git a/drivers/net/wireless/iwlwifi/iwl-agn-lib.c b/drivers/net/wireless/iwlwifi/iwl-agn-lib.c
index eb2be0d30483..3bee0f119bcd 100644
--- a/drivers/net/wireless/iwlwifi/iwl-agn-lib.c
+++ b/drivers/net/wireless/iwlwifi/iwl-agn-lib.c
@@ -53,73 +53,73 @@ static void iwlagn_count_tx_err_status(struct iwl_priv *priv, u16 status)
53 53
54 switch (status) { 54 switch (status) {
55 case TX_STATUS_POSTPONE_DELAY: 55 case TX_STATUS_POSTPONE_DELAY:
56 priv->_agn.reply_tx_stats.pp_delay++; 56 priv->reply_tx_stats.pp_delay++;
57 break; 57 break;
58 case TX_STATUS_POSTPONE_FEW_BYTES: 58 case TX_STATUS_POSTPONE_FEW_BYTES:
59 priv->_agn.reply_tx_stats.pp_few_bytes++; 59 priv->reply_tx_stats.pp_few_bytes++;
60 break; 60 break;
61 case TX_STATUS_POSTPONE_BT_PRIO: 61 case TX_STATUS_POSTPONE_BT_PRIO:
62 priv->_agn.reply_tx_stats.pp_bt_prio++; 62 priv->reply_tx_stats.pp_bt_prio++;
63 break; 63 break;
64 case TX_STATUS_POSTPONE_QUIET_PERIOD: 64 case TX_STATUS_POSTPONE_QUIET_PERIOD:
65 priv->_agn.reply_tx_stats.pp_quiet_period++; 65 priv->reply_tx_stats.pp_quiet_period++;
66 break; 66 break;
67 case TX_STATUS_POSTPONE_CALC_TTAK: 67 case TX_STATUS_POSTPONE_CALC_TTAK:
68 priv->_agn.reply_tx_stats.pp_calc_ttak++; 68 priv->reply_tx_stats.pp_calc_ttak++;
69 break; 69 break;
70 case TX_STATUS_FAIL_INTERNAL_CROSSED_RETRY: 70 case TX_STATUS_FAIL_INTERNAL_CROSSED_RETRY:
71 priv->_agn.reply_tx_stats.int_crossed_retry++; 71 priv->reply_tx_stats.int_crossed_retry++;
72 break; 72 break;
73 case TX_STATUS_FAIL_SHORT_LIMIT: 73 case TX_STATUS_FAIL_SHORT_LIMIT:
74 priv->_agn.reply_tx_stats.short_limit++; 74 priv->reply_tx_stats.short_limit++;
75 break; 75 break;
76 case TX_STATUS_FAIL_LONG_LIMIT: 76 case TX_STATUS_FAIL_LONG_LIMIT:
77 priv->_agn.reply_tx_stats.long_limit++; 77 priv->reply_tx_stats.long_limit++;
78 break; 78 break;
79 case TX_STATUS_FAIL_FIFO_UNDERRUN: 79 case TX_STATUS_FAIL_FIFO_UNDERRUN:
80 priv->_agn.reply_tx_stats.fifo_underrun++; 80 priv->reply_tx_stats.fifo_underrun++;
81 break; 81 break;
82 case TX_STATUS_FAIL_DRAIN_FLOW: 82 case TX_STATUS_FAIL_DRAIN_FLOW:
83 priv->_agn.reply_tx_stats.drain_flow++; 83 priv->reply_tx_stats.drain_flow++;
84 break; 84 break;
85 case TX_STATUS_FAIL_RFKILL_FLUSH: 85 case TX_STATUS_FAIL_RFKILL_FLUSH:
86 priv->_agn.reply_tx_stats.rfkill_flush++; 86 priv->reply_tx_stats.rfkill_flush++;
87 break; 87 break;
88 case TX_STATUS_FAIL_LIFE_EXPIRE: 88 case TX_STATUS_FAIL_LIFE_EXPIRE:
89 priv->_agn.reply_tx_stats.life_expire++; 89 priv->reply_tx_stats.life_expire++;
90 break; 90 break;
91 case TX_STATUS_FAIL_DEST_PS: 91 case TX_STATUS_FAIL_DEST_PS:
92 priv->_agn.reply_tx_stats.dest_ps++; 92 priv->reply_tx_stats.dest_ps++;
93 break; 93 break;
94 case TX_STATUS_FAIL_HOST_ABORTED: 94 case TX_STATUS_FAIL_HOST_ABORTED:
95 priv->_agn.reply_tx_stats.host_abort++; 95 priv->reply_tx_stats.host_abort++;
96 break; 96 break;
97 case TX_STATUS_FAIL_BT_RETRY: 97 case TX_STATUS_FAIL_BT_RETRY:
98 priv->_agn.reply_tx_stats.bt_retry++; 98 priv->reply_tx_stats.bt_retry++;
99 break; 99 break;
100 case TX_STATUS_FAIL_STA_INVALID: 100 case TX_STATUS_FAIL_STA_INVALID:
101 priv->_agn.reply_tx_stats.sta_invalid++; 101 priv->reply_tx_stats.sta_invalid++;
102 break; 102 break;
103 case TX_STATUS_FAIL_FRAG_DROPPED: 103 case TX_STATUS_FAIL_FRAG_DROPPED:
104 priv->_agn.reply_tx_stats.frag_drop++; 104 priv->reply_tx_stats.frag_drop++;
105 break; 105 break;
106 case TX_STATUS_FAIL_TID_DISABLE: 106 case TX_STATUS_FAIL_TID_DISABLE:
107 priv->_agn.reply_tx_stats.tid_disable++; 107 priv->reply_tx_stats.tid_disable++;
108 break; 108 break;
109 case TX_STATUS_FAIL_FIFO_FLUSHED: 109 case TX_STATUS_FAIL_FIFO_FLUSHED:
110 priv->_agn.reply_tx_stats.fifo_flush++; 110 priv->reply_tx_stats.fifo_flush++;
111 break; 111 break;
112 case TX_STATUS_FAIL_INSUFFICIENT_CF_POLL: 112 case TX_STATUS_FAIL_INSUFFICIENT_CF_POLL:
113 priv->_agn.reply_tx_stats.insuff_cf_poll++; 113 priv->reply_tx_stats.insuff_cf_poll++;
114 break; 114 break;
115 case TX_STATUS_FAIL_PASSIVE_NO_RX: 115 case TX_STATUS_FAIL_PASSIVE_NO_RX:
116 priv->_agn.reply_tx_stats.fail_hw_drop++; 116 priv->reply_tx_stats.fail_hw_drop++;
117 break; 117 break;
118 case TX_STATUS_FAIL_NO_BEACON_ON_RADAR: 118 case TX_STATUS_FAIL_NO_BEACON_ON_RADAR:
119 priv->_agn.reply_tx_stats.sta_color_mismatch++; 119 priv->reply_tx_stats.sta_color_mismatch++;
120 break; 120 break;
121 default: 121 default:
122 priv->_agn.reply_tx_stats.unknown++; 122 priv->reply_tx_stats.unknown++;
123 break; 123 break;
124 } 124 }
125} 125}
@@ -130,43 +130,43 @@ static void iwlagn_count_agg_tx_err_status(struct iwl_priv *priv, u16 status)
130 130
131 switch (status) { 131 switch (status) {
132 case AGG_TX_STATE_UNDERRUN_MSK: 132 case AGG_TX_STATE_UNDERRUN_MSK:
133 priv->_agn.reply_agg_tx_stats.underrun++; 133 priv->reply_agg_tx_stats.underrun++;
134 break; 134 break;
135 case AGG_TX_STATE_BT_PRIO_MSK: 135 case AGG_TX_STATE_BT_PRIO_MSK:
136 priv->_agn.reply_agg_tx_stats.bt_prio++; 136 priv->reply_agg_tx_stats.bt_prio++;
137 break; 137 break;
138 case AGG_TX_STATE_FEW_BYTES_MSK: 138 case AGG_TX_STATE_FEW_BYTES_MSK:
139 priv->_agn.reply_agg_tx_stats.few_bytes++; 139 priv->reply_agg_tx_stats.few_bytes++;
140 break; 140 break;
141 case AGG_TX_STATE_ABORT_MSK: 141 case AGG_TX_STATE_ABORT_MSK:
142 priv->_agn.reply_agg_tx_stats.abort++; 142 priv->reply_agg_tx_stats.abort++;
143 break; 143 break;
144 case AGG_TX_STATE_LAST_SENT_TTL_MSK: 144 case AGG_TX_STATE_LAST_SENT_TTL_MSK:
145 priv->_agn.reply_agg_tx_stats.last_sent_ttl++; 145 priv->reply_agg_tx_stats.last_sent_ttl++;
146 break; 146 break;
147 case AGG_TX_STATE_LAST_SENT_TRY_CNT_MSK: 147 case AGG_TX_STATE_LAST_SENT_TRY_CNT_MSK:
148 priv->_agn.reply_agg_tx_stats.last_sent_try++; 148 priv->reply_agg_tx_stats.last_sent_try++;
149 break; 149 break;
150 case AGG_TX_STATE_LAST_SENT_BT_KILL_MSK: 150 case AGG_TX_STATE_LAST_SENT_BT_KILL_MSK:
151 priv->_agn.reply_agg_tx_stats.last_sent_bt_kill++; 151 priv->reply_agg_tx_stats.last_sent_bt_kill++;
152 break; 152 break;
153 case AGG_TX_STATE_SCD_QUERY_MSK: 153 case AGG_TX_STATE_SCD_QUERY_MSK:
154 priv->_agn.reply_agg_tx_stats.scd_query++; 154 priv->reply_agg_tx_stats.scd_query++;
155 break; 155 break;
156 case AGG_TX_STATE_TEST_BAD_CRC32_MSK: 156 case AGG_TX_STATE_TEST_BAD_CRC32_MSK:
157 priv->_agn.reply_agg_tx_stats.bad_crc32++; 157 priv->reply_agg_tx_stats.bad_crc32++;
158 break; 158 break;
159 case AGG_TX_STATE_RESPONSE_MSK: 159 case AGG_TX_STATE_RESPONSE_MSK:
160 priv->_agn.reply_agg_tx_stats.response++; 160 priv->reply_agg_tx_stats.response++;
161 break; 161 break;
162 case AGG_TX_STATE_DUMP_TX_MSK: 162 case AGG_TX_STATE_DUMP_TX_MSK:
163 priv->_agn.reply_agg_tx_stats.dump_tx++; 163 priv->reply_agg_tx_stats.dump_tx++;
164 break; 164 break;
165 case AGG_TX_STATE_DELAY_TX_MSK: 165 case AGG_TX_STATE_DELAY_TX_MSK:
166 priv->_agn.reply_agg_tx_stats.delay_tx++; 166 priv->reply_agg_tx_stats.delay_tx++;
167 break; 167 break;
168 default: 168 default:
169 priv->_agn.reply_agg_tx_stats.unknown++; 169 priv->reply_agg_tx_stats.unknown++;
170 break; 170 break;
171 } 171 }
172} 172}
@@ -391,8 +391,7 @@ void iwl_check_abort_status(struct iwl_priv *priv,
391 } 391 }
392} 392}
393 393
394static void iwlagn_rx_reply_tx(struct iwl_priv *priv, 394void iwlagn_rx_reply_tx(struct iwl_priv *priv, struct iwl_rx_mem_buffer *rxb)
395 struct iwl_rx_mem_buffer *rxb)
396{ 395{
397 struct iwl_rx_packet *pkt = rxb_addr(rxb); 396 struct iwl_rx_packet *pkt = rxb_addr(rxb);
398 u16 sequence = le16_to_cpu(pkt->hdr.sequence); 397 u16 sequence = le16_to_cpu(pkt->hdr.sequence);
@@ -401,6 +400,7 @@ static void iwlagn_rx_reply_tx(struct iwl_priv *priv,
401 struct iwl_tx_queue *txq = &priv->txq[txq_id]; 400 struct iwl_tx_queue *txq = &priv->txq[txq_id];
402 struct ieee80211_tx_info *info; 401 struct ieee80211_tx_info *info;
403 struct iwlagn_tx_resp *tx_resp = (void *)&pkt->u.raw[0]; 402 struct iwlagn_tx_resp *tx_resp = (void *)&pkt->u.raw[0];
403 struct ieee80211_hdr *hdr;
404 struct iwl_tx_info *txb; 404 struct iwl_tx_info *txb;
405 u32 status = le16_to_cpu(tx_resp->status.status); 405 u32 status = le16_to_cpu(tx_resp->status.status);
406 int tid; 406 int tid;
@@ -427,6 +427,11 @@ static void iwlagn_rx_reply_tx(struct iwl_priv *priv,
427 IWLAGN_TX_RES_RA_POS; 427 IWLAGN_TX_RES_RA_POS;
428 428
429 spin_lock_irqsave(&priv->sta_lock, flags); 429 spin_lock_irqsave(&priv->sta_lock, flags);
430
431 hdr = (void *)txb->skb->data;
432 if (!ieee80211_is_data_qos(hdr->frame_control))
433 priv->last_seq_ctl = tx_resp->seq_ctl;
434
430 if (txq->sched_retry) { 435 if (txq->sched_retry) {
431 const u32 scd_ssn = iwlagn_get_scd_ssn(tx_resp); 436 const u32 scd_ssn = iwlagn_get_scd_ssn(tx_resp);
432 struct iwl_ht_agg *agg; 437 struct iwl_ht_agg *agg;
@@ -479,27 +484,6 @@ static void iwlagn_rx_reply_tx(struct iwl_priv *priv,
479 spin_unlock_irqrestore(&priv->sta_lock, flags); 484 spin_unlock_irqrestore(&priv->sta_lock, flags);
480} 485}
481 486
482void iwlagn_rx_handler_setup(struct iwl_priv *priv)
483{
484 /* init calibration handlers */
485 priv->rx_handlers[CALIBRATION_RES_NOTIFICATION] =
486 iwlagn_rx_calib_result;
487 priv->rx_handlers[REPLY_TX] = iwlagn_rx_reply_tx;
488
489 /* set up notification wait support */
490 spin_lock_init(&priv->_agn.notif_wait_lock);
491 INIT_LIST_HEAD(&priv->_agn.notif_waits);
492 init_waitqueue_head(&priv->_agn.notif_waitq);
493}
494
495void iwlagn_setup_deferred_work(struct iwl_priv *priv)
496{
497 /*
498 * nothing need to be done here anymore
499 * still keep for future use if needed
500 */
501}
502
503int iwlagn_hw_valid_rtc_data_addr(u32 addr) 487int iwlagn_hw_valid_rtc_data_addr(u32 addr)
504{ 488{
505 return (addr >= IWLAGN_RTC_DATA_LOWER_BOUND) && 489 return (addr >= IWLAGN_RTC_DATA_LOWER_BOUND) &&
@@ -541,7 +525,7 @@ int iwlagn_send_tx_power(struct iwl_priv *priv)
541 else 525 else
542 tx_ant_cfg_cmd = REPLY_TX_POWER_DBM_CMD; 526 tx_ant_cfg_cmd = REPLY_TX_POWER_DBM_CMD;
543 527
544 return trans_send_cmd_pdu(priv, tx_ant_cfg_cmd, CMD_SYNC, 528 return trans_send_cmd_pdu(&priv->trans, tx_ant_cfg_cmd, CMD_SYNC,
545 sizeof(tx_power_cmd), &tx_power_cmd); 529 sizeof(tx_power_cmd), &tx_power_cmd);
546} 530}
547 531
@@ -628,283 +612,6 @@ struct iwl_mod_params iwlagn_mod_params = {
628 /* the rest are 0 by default */ 612 /* the rest are 0 by default */
629}; 613};
630 614
631int iwlagn_rx_init(struct iwl_priv *priv, struct iwl_rx_queue *rxq)
632{
633 u32 rb_size;
634 const u32 rfdnlog = RX_QUEUE_SIZE_LOG; /* 256 RBDs */
635 u32 rb_timeout = 0; /* FIXME: RX_RB_TIMEOUT for all devices? */
636
637 rb_timeout = RX_RB_TIMEOUT;
638
639 if (iwlagn_mod_params.amsdu_size_8K)
640 rb_size = FH_RCSR_RX_CONFIG_REG_VAL_RB_SIZE_8K;
641 else
642 rb_size = FH_RCSR_RX_CONFIG_REG_VAL_RB_SIZE_4K;
643
644 /* Stop Rx DMA */
645 iwl_write_direct32(priv, FH_MEM_RCSR_CHNL0_CONFIG_REG, 0);
646
647 /* Reset driver's Rx queue write index */
648 iwl_write_direct32(priv, FH_RSCSR_CHNL0_RBDCB_WPTR_REG, 0);
649
650 /* Tell device where to find RBD circular buffer in DRAM */
651 iwl_write_direct32(priv, FH_RSCSR_CHNL0_RBDCB_BASE_REG,
652 (u32)(rxq->bd_dma >> 8));
653
654 /* Tell device where in DRAM to update its Rx status */
655 iwl_write_direct32(priv, FH_RSCSR_CHNL0_STTS_WPTR_REG,
656 rxq->rb_stts_dma >> 4);
657
658 /* Enable Rx DMA
659 * FH_RCSR_CHNL0_RX_IGNORE_RXF_EMPTY is set because of HW bug in
660 * the credit mechanism in 5000 HW RX FIFO
661 * Direct rx interrupts to hosts
662 * Rx buffer size 4 or 8k
663 * RB timeout 0x10
664 * 256 RBDs
665 */
666 iwl_write_direct32(priv, FH_MEM_RCSR_CHNL0_CONFIG_REG,
667 FH_RCSR_RX_CONFIG_CHNL_EN_ENABLE_VAL |
668 FH_RCSR_CHNL0_RX_IGNORE_RXF_EMPTY |
669 FH_RCSR_CHNL0_RX_CONFIG_IRQ_DEST_INT_HOST_VAL |
670 FH_RCSR_CHNL0_RX_CONFIG_SINGLE_FRAME_MSK |
671 rb_size|
672 (rb_timeout << FH_RCSR_RX_CONFIG_REG_IRQ_RBTH_POS)|
673 (rfdnlog << FH_RCSR_RX_CONFIG_RBDCB_SIZE_POS));
674
675 /* Set interrupt coalescing timer to default (2048 usecs) */
676 iwl_write8(priv, CSR_INT_COALESCING, IWL_HOST_INT_TIMEOUT_DEF);
677
678 return 0;
679}
680
681static void iwlagn_set_pwr_vmain(struct iwl_priv *priv)
682{
683/*
684 * (for documentation purposes)
685 * to set power to V_AUX, do:
686
687 if (pci_pme_capable(priv->pci_dev, PCI_D3cold))
688 iwl_set_bits_mask_prph(priv, APMG_PS_CTRL_REG,
689 APMG_PS_CTRL_VAL_PWR_SRC_VAUX,
690 ~APMG_PS_CTRL_MSK_PWR_SRC);
691 */
692
693 iwl_set_bits_mask_prph(priv, APMG_PS_CTRL_REG,
694 APMG_PS_CTRL_VAL_PWR_SRC_VMAIN,
695 ~APMG_PS_CTRL_MSK_PWR_SRC);
696}
697
698int iwlagn_hw_nic_init(struct iwl_priv *priv)
699{
700 unsigned long flags;
701 struct iwl_rx_queue *rxq = &priv->rxq;
702
703 /* nic_init */
704 spin_lock_irqsave(&priv->lock, flags);
705 iwl_apm_init(priv);
706
707 /* Set interrupt coalescing calibration timer to default (512 usecs) */
708 iwl_write8(priv, CSR_INT_COALESCING, IWL_HOST_INT_CALIB_TIMEOUT_DEF);
709
710 spin_unlock_irqrestore(&priv->lock, flags);
711
712 iwlagn_set_pwr_vmain(priv);
713
714 priv->cfg->ops->lib->nic_config(priv);
715
716 /* Allocate the RX queue, or reset if it is already allocated */
717 trans_rx_init(priv);
718
719 iwlagn_rx_replenish(priv);
720
721 iwlagn_rx_init(priv, rxq);
722
723 spin_lock_irqsave(&priv->lock, flags);
724
725 rxq->need_update = 1;
726 iwl_rx_queue_update_write_ptr(priv, rxq);
727
728 spin_unlock_irqrestore(&priv->lock, flags);
729
730 /* Allocate or reset and init all Tx and Command queues */
731 if (trans_tx_init(priv))
732 return -ENOMEM;
733
734 if (priv->cfg->base_params->shadow_reg_enable) {
735 /* enable shadow regs in HW */
736 iwl_set_bit(priv, CSR_MAC_SHADOW_REG_CTRL,
737 0x800FFFFF);
738 }
739
740 set_bit(STATUS_INIT, &priv->status);
741
742 return 0;
743}
744
745/**
746 * iwlagn_dma_addr2rbd_ptr - convert a DMA address to a uCode read buffer ptr
747 */
748static inline __le32 iwlagn_dma_addr2rbd_ptr(struct iwl_priv *priv,
749 dma_addr_t dma_addr)
750{
751 return cpu_to_le32((u32)(dma_addr >> 8));
752}
753
754/**
755 * iwlagn_rx_queue_restock - refill RX queue from pre-allocated pool
756 *
757 * If there are slots in the RX queue that need to be restocked,
758 * and we have free pre-allocated buffers, fill the ranks as much
759 * as we can, pulling from rx_free.
760 *
761 * This moves the 'write' index forward to catch up with 'processed', and
762 * also updates the memory address in the firmware to reference the new
763 * target buffer.
764 */
765void iwlagn_rx_queue_restock(struct iwl_priv *priv)
766{
767 struct iwl_rx_queue *rxq = &priv->rxq;
768 struct list_head *element;
769 struct iwl_rx_mem_buffer *rxb;
770 unsigned long flags;
771
772 spin_lock_irqsave(&rxq->lock, flags);
773 while ((iwl_rx_queue_space(rxq) > 0) && (rxq->free_count)) {
774 /* The overwritten rxb must be a used one */
775 rxb = rxq->queue[rxq->write];
776 BUG_ON(rxb && rxb->page);
777
778 /* Get next free Rx buffer, remove from free list */
779 element = rxq->rx_free.next;
780 rxb = list_entry(element, struct iwl_rx_mem_buffer, list);
781 list_del(element);
782
783 /* Point to Rx buffer via next RBD in circular buffer */
784 rxq->bd[rxq->write] = iwlagn_dma_addr2rbd_ptr(priv,
785 rxb->page_dma);
786 rxq->queue[rxq->write] = rxb;
787 rxq->write = (rxq->write + 1) & RX_QUEUE_MASK;
788 rxq->free_count--;
789 }
790 spin_unlock_irqrestore(&rxq->lock, flags);
791 /* If the pre-allocated buffer pool is dropping low, schedule to
792 * refill it */
793 if (rxq->free_count <= RX_LOW_WATERMARK)
794 queue_work(priv->workqueue, &priv->rx_replenish);
795
796
797 /* If we've added more space for the firmware to place data, tell it.
798 * Increment device's write pointer in multiples of 8. */
799 if (rxq->write_actual != (rxq->write & ~0x7)) {
800 spin_lock_irqsave(&rxq->lock, flags);
801 rxq->need_update = 1;
802 spin_unlock_irqrestore(&rxq->lock, flags);
803 iwl_rx_queue_update_write_ptr(priv, rxq);
804 }
805}
806
807/**
808 * iwlagn_rx_replenish - Move all used packet from rx_used to rx_free
809 *
810 * When moving to rx_free an SKB is allocated for the slot.
811 *
812 * Also restock the Rx queue via iwl_rx_queue_restock.
813 * This is called as a scheduled work item (except for during initialization)
814 */
815void iwlagn_rx_allocate(struct iwl_priv *priv, gfp_t priority)
816{
817 struct iwl_rx_queue *rxq = &priv->rxq;
818 struct list_head *element;
819 struct iwl_rx_mem_buffer *rxb;
820 struct page *page;
821 unsigned long flags;
822 gfp_t gfp_mask = priority;
823
824 while (1) {
825 spin_lock_irqsave(&rxq->lock, flags);
826 if (list_empty(&rxq->rx_used)) {
827 spin_unlock_irqrestore(&rxq->lock, flags);
828 return;
829 }
830 spin_unlock_irqrestore(&rxq->lock, flags);
831
832 if (rxq->free_count > RX_LOW_WATERMARK)
833 gfp_mask |= __GFP_NOWARN;
834
835 if (priv->hw_params.rx_page_order > 0)
836 gfp_mask |= __GFP_COMP;
837
838 /* Alloc a new receive buffer */
839 page = alloc_pages(gfp_mask, priv->hw_params.rx_page_order);
840 if (!page) {
841 if (net_ratelimit())
842 IWL_DEBUG_INFO(priv, "alloc_pages failed, "
843 "order: %d\n",
844 priv->hw_params.rx_page_order);
845
846 if ((rxq->free_count <= RX_LOW_WATERMARK) &&
847 net_ratelimit())
848 IWL_CRIT(priv, "Failed to alloc_pages with %s. Only %u free buffers remaining.\n",
849 priority == GFP_ATOMIC ? "GFP_ATOMIC" : "GFP_KERNEL",
850 rxq->free_count);
851 /* We don't reschedule replenish work here -- we will
852 * call the restock method and if it still needs
853 * more buffers it will schedule replenish */
854 return;
855 }
856
857 spin_lock_irqsave(&rxq->lock, flags);
858
859 if (list_empty(&rxq->rx_used)) {
860 spin_unlock_irqrestore(&rxq->lock, flags);
861 __free_pages(page, priv->hw_params.rx_page_order);
862 return;
863 }
864 element = rxq->rx_used.next;
865 rxb = list_entry(element, struct iwl_rx_mem_buffer, list);
866 list_del(element);
867
868 spin_unlock_irqrestore(&rxq->lock, flags);
869
870 BUG_ON(rxb->page);
871 rxb->page = page;
872 /* Get physical address of the RB */
873 rxb->page_dma = dma_map_page(priv->bus.dev, page, 0,
874 PAGE_SIZE << priv->hw_params.rx_page_order,
875 DMA_FROM_DEVICE);
876 /* dma address must be no more than 36 bits */
877 BUG_ON(rxb->page_dma & ~DMA_BIT_MASK(36));
878 /* and also 256 byte aligned! */
879 BUG_ON(rxb->page_dma & DMA_BIT_MASK(8));
880
881 spin_lock_irqsave(&rxq->lock, flags);
882
883 list_add_tail(&rxb->list, &rxq->rx_free);
884 rxq->free_count++;
885
886 spin_unlock_irqrestore(&rxq->lock, flags);
887 }
888}
889
890void iwlagn_rx_replenish(struct iwl_priv *priv)
891{
892 unsigned long flags;
893
894 iwlagn_rx_allocate(priv, GFP_KERNEL);
895
896 spin_lock_irqsave(&priv->lock, flags);
897 iwlagn_rx_queue_restock(priv);
898 spin_unlock_irqrestore(&priv->lock, flags);
899}
900
901void iwlagn_rx_replenish_now(struct iwl_priv *priv)
902{
903 iwlagn_rx_allocate(priv, GFP_ATOMIC);
904
905 iwlagn_rx_queue_restock(priv);
906}
907
908int iwlagn_hwrate_to_mac80211_idx(u32 rate_n_flags, enum ieee80211_band band) 615int iwlagn_hwrate_to_mac80211_idx(u32 rate_n_flags, enum ieee80211_band band)
909{ 616{
910 int idx = 0; 617 int idx = 0;
@@ -1048,7 +755,7 @@ static int iwl_get_channels_for_scan(struct iwl_priv *priv,
1048 755
1049static int iwl_fill_offch_tx(struct iwl_priv *priv, void *data, size_t maxlen) 756static int iwl_fill_offch_tx(struct iwl_priv *priv, void *data, size_t maxlen)
1050{ 757{
1051 struct sk_buff *skb = priv->_agn.offchan_tx_skb; 758 struct sk_buff *skb = priv->offchan_tx_skb;
1052 759
1053 if (skb->len < maxlen) 760 if (skb->len < maxlen)
1054 maxlen = skb->len; 761 maxlen = skb->len;
@@ -1134,7 +841,7 @@ int iwlagn_request_scan(struct iwl_priv *priv, struct ieee80211_vif *vif)
1134 } else if (priv->scan_type == IWL_SCAN_OFFCH_TX) { 841 } else if (priv->scan_type == IWL_SCAN_OFFCH_TX) {
1135 scan->suspend_time = 0; 842 scan->suspend_time = 0;
1136 scan->max_out_time = 843 scan->max_out_time =
1137 cpu_to_le32(1024 * priv->_agn.offchan_tx_timeout); 844 cpu_to_le32(1024 * priv->offchan_tx_timeout);
1138 } 845 }
1139 846
1140 switch (priv->scan_type) { 847 switch (priv->scan_type) {
@@ -1322,9 +1029,9 @@ int iwlagn_request_scan(struct iwl_priv *priv, struct ieee80211_vif *vif)
1322 scan_ch = (void *)&scan->data[cmd_len]; 1029 scan_ch = (void *)&scan->data[cmd_len];
1323 scan_ch->type = SCAN_CHANNEL_TYPE_ACTIVE; 1030 scan_ch->type = SCAN_CHANNEL_TYPE_ACTIVE;
1324 scan_ch->channel = 1031 scan_ch->channel =
1325 cpu_to_le16(priv->_agn.offchan_tx_chan->hw_value); 1032 cpu_to_le16(priv->offchan_tx_chan->hw_value);
1326 scan_ch->active_dwell = 1033 scan_ch->active_dwell =
1327 cpu_to_le16(priv->_agn.offchan_tx_timeout); 1034 cpu_to_le16(priv->offchan_tx_timeout);
1328 scan_ch->passive_dwell = 0; 1035 scan_ch->passive_dwell = 0;
1329 1036
1330 /* Set txpower levels to defaults */ 1037 /* Set txpower levels to defaults */
@@ -1334,7 +1041,7 @@ int iwlagn_request_scan(struct iwl_priv *priv, struct ieee80211_vif *vif)
1334 * power level: 1041 * power level:
1335 * scan_ch->tx_gain = ((1 << 5) | (2 << 3)) | 3; 1042 * scan_ch->tx_gain = ((1 << 5) | (2 << 3)) | 3;
1336 */ 1043 */
1337 if (priv->_agn.offchan_tx_chan->band == IEEE80211_BAND_5GHZ) 1044 if (priv->offchan_tx_chan->band == IEEE80211_BAND_5GHZ)
1338 scan_ch->tx_gain = ((1 << 5) | (3 << 3)) | 3; 1045 scan_ch->tx_gain = ((1 << 5) | (3 << 3)) | 3;
1339 else 1046 else
1340 scan_ch->tx_gain = ((1 << 5) | (5 << 3)); 1047 scan_ch->tx_gain = ((1 << 5) | (5 << 3));
@@ -1360,7 +1067,7 @@ int iwlagn_request_scan(struct iwl_priv *priv, struct ieee80211_vif *vif)
1360 if (ret) 1067 if (ret)
1361 return ret; 1068 return ret;
1362 1069
1363 ret = trans_send_cmd(priv, &cmd); 1070 ret = trans_send_cmd(&priv->trans, &cmd);
1364 if (ret) { 1071 if (ret) {
1365 clear_bit(STATUS_SCAN_HW, &priv->status); 1072 clear_bit(STATUS_SCAN_HW, &priv->status);
1366 iwlagn_set_pan_params(priv); 1073 iwlagn_set_pan_params(priv);
@@ -1466,7 +1173,7 @@ int iwlagn_txfifo_flush(struct iwl_priv *priv, u16 flush_control)
1466 flush_cmd.fifo_control); 1173 flush_cmd.fifo_control);
1467 flush_cmd.flush_control = cpu_to_le16(flush_control); 1174 flush_cmd.flush_control = cpu_to_le16(flush_control);
1468 1175
1469 return trans_send_cmd(priv, &cmd); 1176 return trans_send_cmd(&priv->trans, &cmd);
1470} 1177}
1471 1178
1472void iwlagn_dev_txfifo_flush(struct iwl_priv *priv, u16 flush_control) 1179void iwlagn_dev_txfifo_flush(struct iwl_priv *priv, u16 flush_control)
@@ -1660,12 +1367,12 @@ void iwlagn_send_advance_bt_config(struct iwl_priv *priv)
1660 if (priv->cfg->bt_params->bt_session_2) { 1367 if (priv->cfg->bt_params->bt_session_2) {
1661 memcpy(&bt_cmd_2000.basic, &basic, 1368 memcpy(&bt_cmd_2000.basic, &basic,
1662 sizeof(basic)); 1369 sizeof(basic));
1663 ret = trans_send_cmd_pdu(priv, REPLY_BT_CONFIG, 1370 ret = trans_send_cmd_pdu(&priv->trans, REPLY_BT_CONFIG,
1664 CMD_SYNC, sizeof(bt_cmd_2000), &bt_cmd_2000); 1371 CMD_SYNC, sizeof(bt_cmd_2000), &bt_cmd_2000);
1665 } else { 1372 } else {
1666 memcpy(&bt_cmd_6000.basic, &basic, 1373 memcpy(&bt_cmd_6000.basic, &basic,
1667 sizeof(basic)); 1374 sizeof(basic));
1668 ret = trans_send_cmd_pdu(priv, REPLY_BT_CONFIG, 1375 ret = trans_send_cmd_pdu(&priv->trans, REPLY_BT_CONFIG,
1669 CMD_SYNC, sizeof(bt_cmd_6000), &bt_cmd_6000); 1376 CMD_SYNC, sizeof(bt_cmd_6000), &bt_cmd_6000);
1670 } 1377 }
1671 if (ret) 1378 if (ret)
@@ -1986,15 +1693,12 @@ void iwlagn_bt_coex_profile_notif(struct iwl_priv *priv,
1986 1693
1987void iwlagn_bt_rx_handler_setup(struct iwl_priv *priv) 1694void iwlagn_bt_rx_handler_setup(struct iwl_priv *priv)
1988{ 1695{
1989 iwlagn_rx_handler_setup(priv);
1990 priv->rx_handlers[REPLY_BT_COEX_PROFILE_NOTIF] = 1696 priv->rx_handlers[REPLY_BT_COEX_PROFILE_NOTIF] =
1991 iwlagn_bt_coex_profile_notif; 1697 iwlagn_bt_coex_profile_notif;
1992} 1698}
1993 1699
1994void iwlagn_bt_setup_deferred_work(struct iwl_priv *priv) 1700void iwlagn_bt_setup_deferred_work(struct iwl_priv *priv)
1995{ 1701{
1996 iwlagn_setup_deferred_work(priv);
1997
1998 INIT_WORK(&priv->bt_traffic_change_work, 1702 INIT_WORK(&priv->bt_traffic_change_work,
1999 iwlagn_bt_traffic_change_work); 1703 iwlagn_bt_traffic_change_work);
2000} 1704}
@@ -2306,9 +2010,9 @@ void iwlagn_init_notification_wait(struct iwl_priv *priv,
2306 wait_entry->triggered = false; 2010 wait_entry->triggered = false;
2307 wait_entry->aborted = false; 2011 wait_entry->aborted = false;
2308 2012
2309 spin_lock_bh(&priv->_agn.notif_wait_lock); 2013 spin_lock_bh(&priv->notif_wait_lock);
2310 list_add(&wait_entry->list, &priv->_agn.notif_waits); 2014 list_add(&wait_entry->list, &priv->notif_waits);
2311 spin_unlock_bh(&priv->_agn.notif_wait_lock); 2015 spin_unlock_bh(&priv->notif_wait_lock);
2312} 2016}
2313 2017
2314int iwlagn_wait_notification(struct iwl_priv *priv, 2018int iwlagn_wait_notification(struct iwl_priv *priv,
@@ -2317,13 +2021,13 @@ int iwlagn_wait_notification(struct iwl_priv *priv,
2317{ 2021{
2318 int ret; 2022 int ret;
2319 2023
2320 ret = wait_event_timeout(priv->_agn.notif_waitq, 2024 ret = wait_event_timeout(priv->notif_waitq,
2321 wait_entry->triggered || wait_entry->aborted, 2025 wait_entry->triggered || wait_entry->aborted,
2322 timeout); 2026 timeout);
2323 2027
2324 spin_lock_bh(&priv->_agn.notif_wait_lock); 2028 spin_lock_bh(&priv->notif_wait_lock);
2325 list_del(&wait_entry->list); 2029 list_del(&wait_entry->list);
2326 spin_unlock_bh(&priv->_agn.notif_wait_lock); 2030 spin_unlock_bh(&priv->notif_wait_lock);
2327 2031
2328 if (wait_entry->aborted) 2032 if (wait_entry->aborted)
2329 return -EIO; 2033 return -EIO;
@@ -2337,93 +2041,7 @@ int iwlagn_wait_notification(struct iwl_priv *priv,
2337void iwlagn_remove_notification(struct iwl_priv *priv, 2041void iwlagn_remove_notification(struct iwl_priv *priv,
2338 struct iwl_notification_wait *wait_entry) 2042 struct iwl_notification_wait *wait_entry)
2339{ 2043{
2340 spin_lock_bh(&priv->_agn.notif_wait_lock); 2044 spin_lock_bh(&priv->notif_wait_lock);
2341 list_del(&wait_entry->list); 2045 list_del(&wait_entry->list);
2342 spin_unlock_bh(&priv->_agn.notif_wait_lock); 2046 spin_unlock_bh(&priv->notif_wait_lock);
2343}
2344
2345int iwlagn_start_device(struct iwl_priv *priv)
2346{
2347 int ret;
2348
2349 if ((priv->cfg->sku & EEPROM_SKU_CAP_AMT_ENABLE) &&
2350 iwl_prepare_card_hw(priv)) {
2351 IWL_WARN(priv, "Exit HW not ready\n");
2352 return -EIO;
2353 }
2354
2355 /* If platform's RF_KILL switch is NOT set to KILL */
2356 if (iwl_read32(priv, CSR_GP_CNTRL) & CSR_GP_CNTRL_REG_FLAG_HW_RF_KILL_SW)
2357 clear_bit(STATUS_RF_KILL_HW, &priv->status);
2358 else
2359 set_bit(STATUS_RF_KILL_HW, &priv->status);
2360
2361 if (iwl_is_rfkill(priv)) {
2362 wiphy_rfkill_set_hw_state(priv->hw->wiphy, true);
2363 iwl_enable_interrupts(priv);
2364 return -ERFKILL;
2365 }
2366
2367 iwl_write32(priv, CSR_INT, 0xFFFFFFFF);
2368
2369 ret = iwlagn_hw_nic_init(priv);
2370 if (ret) {
2371 IWL_ERR(priv, "Unable to init nic\n");
2372 return ret;
2373 }
2374
2375 /* make sure rfkill handshake bits are cleared */
2376 iwl_write32(priv, CSR_UCODE_DRV_GP1_CLR, CSR_UCODE_SW_BIT_RFKILL);
2377 iwl_write32(priv, CSR_UCODE_DRV_GP1_CLR,
2378 CSR_UCODE_DRV_GP1_BIT_CMD_BLOCKED);
2379
2380 /* clear (again), then enable host interrupts */
2381 iwl_write32(priv, CSR_INT, 0xFFFFFFFF);
2382 iwl_enable_interrupts(priv);
2383
2384 /* really make sure rfkill handshake bits are cleared */
2385 iwl_write32(priv, CSR_UCODE_DRV_GP1_CLR, CSR_UCODE_SW_BIT_RFKILL);
2386 iwl_write32(priv, CSR_UCODE_DRV_GP1_CLR, CSR_UCODE_SW_BIT_RFKILL);
2387
2388 return 0;
2389}
2390
2391void iwlagn_stop_device(struct iwl_priv *priv)
2392{
2393 unsigned long flags;
2394
2395 /* stop and reset the on-board processor */
2396 iwl_write32(priv, CSR_RESET, CSR_RESET_REG_FLAG_NEVO_RESET);
2397
2398 /* tell the device to stop sending interrupts */
2399 spin_lock_irqsave(&priv->lock, flags);
2400 iwl_disable_interrupts(priv);
2401 spin_unlock_irqrestore(&priv->lock, flags);
2402 iwl_synchronize_irq(priv);
2403
2404 /* device going down, Stop using ICT table */
2405 iwl_disable_ict(priv);
2406
2407 /*
2408 * If a HW restart happens during firmware loading,
2409 * then the firmware loading might call this function
2410 * and later it might be called again due to the
2411 * restart. So don't process again if the device is
2412 * already dead.
2413 */
2414 if (test_bit(STATUS_DEVICE_ENABLED, &priv->status)) {
2415 trans_tx_stop(priv);
2416 trans_rx_stop(priv);
2417
2418 /* Power-down device's busmaster DMA clocks */
2419 iwl_write_prph(priv, APMG_CLK_DIS_REG,
2420 APMG_CLK_VAL_DMA_CLK_RQT);
2421 udelay(5);
2422 }
2423
2424 /* Make sure (redundant) we've released our request to stay awake */
2425 iwl_clear_bit(priv, CSR_GP_CNTRL, CSR_GP_CNTRL_REG_FLAG_MAC_ACCESS_REQ);
2426
2427 /* Stop the device, and put it in low power state */
2428 iwl_apm_stop(priv);
2429} 2047}
diff --git a/drivers/net/wireless/iwlwifi/iwl-agn-rs.c b/drivers/net/wireless/iwlwifi/iwl-agn-rs.c
index ebcd13bc10d9..3789ff4bf53b 100644
--- a/drivers/net/wireless/iwlwifi/iwl-agn-rs.c
+++ b/drivers/net/wireless/iwlwifi/iwl-agn-rs.c
@@ -354,9 +354,11 @@ static void rs_program_fix_rate(struct iwl_priv *priv,
354 lq_sta->active_mimo2_rate = 0x1FD0; /* 6 - 60 MBits, no 9, no CCK */ 354 lq_sta->active_mimo2_rate = 0x1FD0; /* 6 - 60 MBits, no 9, no CCK */
355 lq_sta->active_mimo3_rate = 0x1FD0; /* 6 - 60 MBits, no 9, no CCK */ 355 lq_sta->active_mimo3_rate = 0x1FD0; /* 6 - 60 MBits, no 9, no CCK */
356 356
357#ifdef CONFIG_IWLWIFI_DEVICE_SVTOOL
357 /* testmode has higher priority to overwirte the fixed rate */ 358 /* testmode has higher priority to overwirte the fixed rate */
358 if (priv->tm_fixed_rate) 359 if (priv->tm_fixed_rate)
359 lq_sta->dbg_fixed_rate = priv->tm_fixed_rate; 360 lq_sta->dbg_fixed_rate = priv->tm_fixed_rate;
361#endif
360 362
361 IWL_DEBUG_RATE(priv, "sta_id %d rate 0x%X\n", 363 IWL_DEBUG_RATE(priv, "sta_id %d rate 0x%X\n",
362 lq_sta->lq.sta_id, lq_sta->dbg_fixed_rate); 364 lq_sta->lq.sta_id, lq_sta->dbg_fixed_rate);
@@ -1080,7 +1082,8 @@ done:
1080 /* See if there's a better rate or modulation mode to try. */ 1082 /* See if there's a better rate or modulation mode to try. */
1081 if (sta && sta->supp_rates[sband->band]) 1083 if (sta && sta->supp_rates[sband->band])
1082 rs_rate_scale_perform(priv, skb, sta, lq_sta); 1084 rs_rate_scale_perform(priv, skb, sta, lq_sta);
1083#ifdef CONFIG_MAC80211_DEBUGFS 1085
1086#if defined(CONFIG_MAC80211_DEBUGFS) && defined(CONFIG_IWLWIFI_DEVICE_SVTOOL)
1084 if ((priv->tm_fixed_rate) && 1087 if ((priv->tm_fixed_rate) &&
1085 (priv->tm_fixed_rate != lq_sta->dbg_fixed_rate)) 1088 (priv->tm_fixed_rate != lq_sta->dbg_fixed_rate))
1086 rs_program_fix_rate(priv, lq_sta); 1089 rs_program_fix_rate(priv, lq_sta);
@@ -2904,8 +2907,9 @@ void iwl_rs_rate_init(struct iwl_priv *priv, struct ieee80211_sta *sta, u8 sta_i
2904 if (sband->band == IEEE80211_BAND_5GHZ) 2907 if (sband->band == IEEE80211_BAND_5GHZ)
2905 lq_sta->last_txrate_idx += IWL_FIRST_OFDM_RATE; 2908 lq_sta->last_txrate_idx += IWL_FIRST_OFDM_RATE;
2906 lq_sta->is_agg = 0; 2909 lq_sta->is_agg = 0;
2907 2910#ifdef CONFIG_IWLWIFI_DEVICE_SVTOOL
2908 priv->tm_fixed_rate = 0; 2911 priv->tm_fixed_rate = 0;
2912#endif
2909#ifdef CONFIG_MAC80211_DEBUGFS 2913#ifdef CONFIG_MAC80211_DEBUGFS
2910 lq_sta->dbg_fixed_rate = 0; 2914 lq_sta->dbg_fixed_rate = 0;
2911#endif 2915#endif
diff --git a/drivers/net/wireless/iwlwifi/iwl-agn-rxon.c b/drivers/net/wireless/iwlwifi/iwl-agn-rxon.c
index dc64f2515357..d42ef1763a71 100644
--- a/drivers/net/wireless/iwlwifi/iwl-agn-rxon.c
+++ b/drivers/net/wireless/iwlwifi/iwl-agn-rxon.c
@@ -40,7 +40,7 @@ static int iwlagn_disable_bss(struct iwl_priv *priv,
40 int ret; 40 int ret;
41 41
42 send->filter_flags &= ~RXON_FILTER_ASSOC_MSK; 42 send->filter_flags &= ~RXON_FILTER_ASSOC_MSK;
43 ret = trans_send_cmd_pdu(priv, ctx->rxon_cmd, 43 ret = trans_send_cmd_pdu(&priv->trans, ctx->rxon_cmd,
44 CMD_SYNC, sizeof(*send), send); 44 CMD_SYNC, sizeof(*send), send);
45 45
46 send->filter_flags = old_filter; 46 send->filter_flags = old_filter;
@@ -66,7 +66,7 @@ static int iwlagn_disable_pan(struct iwl_priv *priv,
66 66
67 send->filter_flags &= ~RXON_FILTER_ASSOC_MSK; 67 send->filter_flags &= ~RXON_FILTER_ASSOC_MSK;
68 send->dev_type = RXON_DEV_TYPE_P2P; 68 send->dev_type = RXON_DEV_TYPE_P2P;
69 ret = trans_send_cmd_pdu(priv, ctx->rxon_cmd, 69 ret = trans_send_cmd_pdu(&priv->trans, ctx->rxon_cmd,
70 CMD_SYNC, sizeof(*send), send); 70 CMD_SYNC, sizeof(*send), send);
71 71
72 send->filter_flags = old_filter; 72 send->filter_flags = old_filter;
@@ -92,7 +92,7 @@ static int iwlagn_disconn_pan(struct iwl_priv *priv,
92 int ret; 92 int ret;
93 93
94 send->filter_flags &= ~RXON_FILTER_ASSOC_MSK; 94 send->filter_flags &= ~RXON_FILTER_ASSOC_MSK;
95 ret = trans_send_cmd_pdu(priv, ctx->rxon_cmd, CMD_SYNC, 95 ret = trans_send_cmd_pdu(&priv->trans, ctx->rxon_cmd, CMD_SYNC,
96 sizeof(*send), send); 96 sizeof(*send), send);
97 97
98 send->filter_flags = old_filter; 98 send->filter_flags = old_filter;
@@ -121,7 +121,7 @@ static void iwlagn_update_qos(struct iwl_priv *priv,
121 ctx->qos_data.qos_active, 121 ctx->qos_data.qos_active,
122 ctx->qos_data.def_qos_parm.qos_flags); 122 ctx->qos_data.def_qos_parm.qos_flags);
123 123
124 ret = trans_send_cmd_pdu(priv, ctx->qos_cmd, CMD_SYNC, 124 ret = trans_send_cmd_pdu(&priv->trans, ctx->qos_cmd, CMD_SYNC,
125 sizeof(struct iwl_qosparam_cmd), 125 sizeof(struct iwl_qosparam_cmd),
126 &ctx->qos_data.def_qos_parm); 126 &ctx->qos_data.def_qos_parm);
127 if (ret) 127 if (ret)
@@ -180,7 +180,7 @@ static int iwlagn_send_rxon_assoc(struct iwl_priv *priv,
180 ctx->staging.ofdm_ht_triple_stream_basic_rates; 180 ctx->staging.ofdm_ht_triple_stream_basic_rates;
181 rxon_assoc.acquisition_data = ctx->staging.acquisition_data; 181 rxon_assoc.acquisition_data = ctx->staging.acquisition_data;
182 182
183 ret = trans_send_cmd_pdu(priv, ctx->rxon_assoc_cmd, 183 ret = trans_send_cmd_pdu(&priv->trans, ctx->rxon_assoc_cmd,
184 CMD_ASYNC, sizeof(rxon_assoc), &rxon_assoc); 184 CMD_ASYNC, sizeof(rxon_assoc), &rxon_assoc);
185 return ret; 185 return ret;
186} 186}
@@ -266,7 +266,7 @@ static int iwlagn_rxon_connect(struct iwl_priv *priv,
266 * Associated RXON doesn't clear the station table in uCode, 266 * Associated RXON doesn't clear the station table in uCode,
267 * so we don't need to restore stations etc. after this. 267 * so we don't need to restore stations etc. after this.
268 */ 268 */
269 ret = trans_send_cmd_pdu(priv, ctx->rxon_cmd, CMD_SYNC, 269 ret = trans_send_cmd_pdu(&priv->trans, ctx->rxon_cmd, CMD_SYNC,
270 sizeof(struct iwl_rxon_cmd), &ctx->staging); 270 sizeof(struct iwl_rxon_cmd), &ctx->staging);
271 if (ret) { 271 if (ret) {
272 IWL_ERR(priv, "Error setting new RXON (%d)\n", ret); 272 IWL_ERR(priv, "Error setting new RXON (%d)\n", ret);
@@ -303,6 +303,98 @@ static int iwlagn_rxon_connect(struct iwl_priv *priv,
303 return 0; 303 return 0;
304} 304}
305 305
306int iwlagn_set_pan_params(struct iwl_priv *priv)
307{
308 struct iwl_wipan_params_cmd cmd;
309 struct iwl_rxon_context *ctx_bss, *ctx_pan;
310 int slot0 = 300, slot1 = 0;
311 int ret;
312
313 if (priv->valid_contexts == BIT(IWL_RXON_CTX_BSS))
314 return 0;
315
316 BUILD_BUG_ON(NUM_IWL_RXON_CTX != 2);
317
318 lockdep_assert_held(&priv->mutex);
319
320 ctx_bss = &priv->contexts[IWL_RXON_CTX_BSS];
321 ctx_pan = &priv->contexts[IWL_RXON_CTX_PAN];
322
323 /*
324 * If the PAN context is inactive, then we don't need
325 * to update the PAN parameters, the last thing we'll
326 * have done before it goes inactive is making the PAN
327 * parameters be WLAN-only.
328 */
329 if (!ctx_pan->is_active)
330 return 0;
331
332 memset(&cmd, 0, sizeof(cmd));
333
334 /* only 2 slots are currently allowed */
335 cmd.num_slots = 2;
336
337 cmd.slots[0].type = 0; /* BSS */
338 cmd.slots[1].type = 1; /* PAN */
339
340 if (priv->hw_roc_channel) {
341 /* both contexts must be used for this to happen */
342 slot1 = priv->hw_roc_duration;
343 slot0 = IWL_MIN_SLOT_TIME;
344 } else if (ctx_bss->vif && ctx_pan->vif) {
345 int bcnint = ctx_pan->beacon_int;
346 int dtim = ctx_pan->vif->bss_conf.dtim_period ?: 1;
347
348 /* should be set, but seems unused?? */
349 cmd.flags |= cpu_to_le16(IWL_WIPAN_PARAMS_FLG_SLOTTED_MODE);
350
351 if (ctx_pan->vif->type == NL80211_IFTYPE_AP &&
352 bcnint &&
353 bcnint != ctx_bss->beacon_int) {
354 IWL_ERR(priv,
355 "beacon intervals don't match (%d, %d)\n",
356 ctx_bss->beacon_int, ctx_pan->beacon_int);
357 } else
358 bcnint = max_t(int, bcnint,
359 ctx_bss->beacon_int);
360 if (!bcnint)
361 bcnint = DEFAULT_BEACON_INTERVAL;
362 slot0 = bcnint / 2;
363 slot1 = bcnint - slot0;
364
365 if (test_bit(STATUS_SCAN_HW, &priv->status) ||
366 (!ctx_bss->vif->bss_conf.idle &&
367 !ctx_bss->vif->bss_conf.assoc)) {
368 slot0 = dtim * bcnint * 3 - IWL_MIN_SLOT_TIME;
369 slot1 = IWL_MIN_SLOT_TIME;
370 } else if (!ctx_pan->vif->bss_conf.idle &&
371 !ctx_pan->vif->bss_conf.assoc) {
372 slot1 = bcnint * 3 - IWL_MIN_SLOT_TIME;
373 slot0 = IWL_MIN_SLOT_TIME;
374 }
375 } else if (ctx_pan->vif) {
376 slot0 = 0;
377 slot1 = max_t(int, 1, ctx_pan->vif->bss_conf.dtim_period) *
378 ctx_pan->beacon_int;
379 slot1 = max_t(int, DEFAULT_BEACON_INTERVAL, slot1);
380
381 if (test_bit(STATUS_SCAN_HW, &priv->status)) {
382 slot0 = slot1 * 3 - IWL_MIN_SLOT_TIME;
383 slot1 = IWL_MIN_SLOT_TIME;
384 }
385 }
386
387 cmd.slots[0].width = cpu_to_le16(slot0);
388 cmd.slots[1].width = cpu_to_le16(slot1);
389
390 ret = trans_send_cmd_pdu(&priv->trans, REPLY_WIPAN_PARAMS, CMD_SYNC,
391 sizeof(cmd), &cmd);
392 if (ret)
393 IWL_ERR(priv, "Error setting PAN parameters (%d)\n", ret);
394
395 return ret;
396}
397
306/** 398/**
307 * iwlagn_commit_rxon - commit staging_rxon to hardware 399 * iwlagn_commit_rxon - commit staging_rxon to hardware
308 * 400 *
@@ -345,8 +437,8 @@ int iwlagn_commit_rxon(struct iwl_priv *priv, struct iwl_rxon_context *ctx)
345 /* always get timestamp with Rx frame */ 437 /* always get timestamp with Rx frame */
346 ctx->staging.flags |= RXON_FLG_TSF2HOST_MSK; 438 ctx->staging.flags |= RXON_FLG_TSF2HOST_MSK;
347 439
348 if (ctx->ctxid == IWL_RXON_CTX_PAN && priv->_agn.hw_roc_channel) { 440 if (ctx->ctxid == IWL_RXON_CTX_PAN && priv->hw_roc_channel) {
349 struct ieee80211_channel *chan = priv->_agn.hw_roc_channel; 441 struct ieee80211_channel *chan = priv->hw_roc_channel;
350 442
351 iwl_set_rxon_channel(priv, chan, ctx); 443 iwl_set_rxon_channel(priv, chan, ctx);
352 iwl_set_flags_for_band(priv, ctx, chan->band, NULL); 444 iwl_set_flags_for_band(priv, ctx, chan->band, NULL);
@@ -694,8 +786,8 @@ static void iwlagn_chain_noise_reset(struct iwl_priv *priv)
694 786
695 memset(&cmd, 0, sizeof(cmd)); 787 memset(&cmd, 0, sizeof(cmd));
696 iwl_set_calib_hdr(&cmd.hdr, 788 iwl_set_calib_hdr(&cmd.hdr,
697 priv->_agn.phy_calib_chain_noise_reset_cmd); 789 priv->phy_calib_chain_noise_reset_cmd);
698 ret = trans_send_cmd_pdu(priv, 790 ret = trans_send_cmd_pdu(&priv->trans,
699 REPLY_PHY_CALIBRATION_CMD, 791 REPLY_PHY_CALIBRATION_CMD,
700 CMD_SYNC, sizeof(cmd), &cmd); 792 CMD_SYNC, sizeof(cmd), &cmd);
701 if (ret) 793 if (ret)
@@ -762,6 +854,9 @@ void iwlagn_bss_info_changed(struct ieee80211_hw *hw,
762 iwl_wake_any_queue(priv, ctx); 854 iwl_wake_any_queue(priv, ctx);
763 } 855 }
764 ctx->staging.filter_flags &= ~RXON_FILTER_ASSOC_MSK; 856 ctx->staging.filter_flags &= ~RXON_FILTER_ASSOC_MSK;
857
858 if (ctx->ctxid == IWL_RXON_CTX_BSS)
859 priv->have_rekey_data = false;
765 } 860 }
766 861
767 iwlagn_bt_coex_rssi_monitor(priv); 862 iwlagn_bt_coex_rssi_monitor(priv);
diff --git a/drivers/net/wireless/iwlwifi/iwl-agn-sta.c b/drivers/net/wireless/iwlwifi/iwl-agn-sta.c
index 001622c06526..37e624095e40 100644
--- a/drivers/net/wireless/iwlwifi/iwl-agn-sta.c
+++ b/drivers/net/wireless/iwlwifi/iwl-agn-sta.c
@@ -139,6 +139,14 @@ int iwlagn_add_bssid_station(struct iwl_priv *priv, struct iwl_rxon_context *ctx
139 return 0; 139 return 0;
140} 140}
141 141
142/*
143 * static WEP keys
144 *
145 * For each context, the device has a table of 4 static WEP keys
146 * (one for each key index) that is updated with the following
147 * commands.
148 */
149
142static int iwl_send_static_wepkey_cmd(struct iwl_priv *priv, 150static int iwl_send_static_wepkey_cmd(struct iwl_priv *priv,
143 struct iwl_rxon_context *ctx, 151 struct iwl_rxon_context *ctx,
144 bool send_if_empty) 152 bool send_if_empty)
@@ -181,7 +189,7 @@ static int iwl_send_static_wepkey_cmd(struct iwl_priv *priv,
181 cmd.len[0] = cmd_size; 189 cmd.len[0] = cmd_size;
182 190
183 if (not_empty || send_if_empty) 191 if (not_empty || send_if_empty)
184 return trans_send_cmd(priv, &cmd); 192 return trans_send_cmd(&priv->trans, &cmd);
185 else 193 else
186 return 0; 194 return 0;
187} 195}
@@ -232,9 +240,7 @@ int iwl_set_default_wep_key(struct iwl_priv *priv,
232 return -EINVAL; 240 return -EINVAL;
233 } 241 }
234 242
235 keyconf->flags &= ~IEEE80211_KEY_FLAG_GENERATE_IV; 243 keyconf->hw_key_idx = IWLAGN_HW_KEY_DEFAULT;
236 keyconf->hw_key_idx = HW_KEY_DEFAULT;
237 priv->stations[ctx->ap_sta_id].keyinfo.cipher = keyconf->cipher;
238 244
239 ctx->wep_keys[keyconf->keyidx].key_size = keyconf->keylen; 245 ctx->wep_keys[keyconf->keyidx].key_size = keyconf->keylen;
240 memcpy(&ctx->wep_keys[keyconf->keyidx].key, &keyconf->key, 246 memcpy(&ctx->wep_keys[keyconf->keyidx].key, &keyconf->key,
@@ -247,166 +253,117 @@ int iwl_set_default_wep_key(struct iwl_priv *priv,
247 return ret; 253 return ret;
248} 254}
249 255
250static int iwl_set_wep_dynamic_key_info(struct iwl_priv *priv, 256/*
251 struct iwl_rxon_context *ctx, 257 * dynamic (per-station) keys
252 struct ieee80211_key_conf *keyconf, 258 *
253 u8 sta_id) 259 * The dynamic keys are a little more complicated. The device has
254{ 260 * a key cache of up to STA_KEY_MAX_NUM/STA_KEY_MAX_NUM_PAN keys.
255 unsigned long flags; 261 * These are linked to stations by a table that contains an index
256 __le16 key_flags = 0; 262 * into the key table for each station/key index/{mcast,unicast},
257 struct iwl_addsta_cmd sta_cmd; 263 * i.e. it's basically an array of pointers like this:
258 264 * key_offset_t key_mapping[NUM_STATIONS][4][2];
259 lockdep_assert_held(&priv->mutex); 265 * (it really works differently, but you can think of it as such)
260 266 *
261 keyconf->flags &= ~IEEE80211_KEY_FLAG_GENERATE_IV; 267 * The key uploading and linking happens in the same command, the
262 268 * add station command with STA_MODIFY_KEY_MASK.
263 key_flags |= (STA_KEY_FLG_WEP | STA_KEY_FLG_MAP_KEY_MSK); 269 */
264 key_flags |= cpu_to_le16(keyconf->keyidx << STA_KEY_FLG_KEYID_POS);
265 key_flags &= ~STA_KEY_FLG_INVALID;
266
267 if (keyconf->keylen == WEP_KEY_LEN_128)
268 key_flags |= STA_KEY_FLG_KEY_SIZE_MSK;
269
270 if (sta_id == ctx->bcast_sta_id)
271 key_flags |= STA_KEY_MULTICAST_MSK;
272
273 spin_lock_irqsave(&priv->sta_lock, flags);
274
275 priv->stations[sta_id].keyinfo.cipher = keyconf->cipher;
276 priv->stations[sta_id].keyinfo.keylen = keyconf->keylen;
277 priv->stations[sta_id].keyinfo.keyidx = keyconf->keyidx;
278
279 memcpy(priv->stations[sta_id].keyinfo.key,
280 keyconf->key, keyconf->keylen);
281
282 memcpy(&priv->stations[sta_id].sta.key.key[3],
283 keyconf->key, keyconf->keylen);
284
285 if ((priv->stations[sta_id].sta.key.key_flags & STA_KEY_FLG_ENCRYPT_MSK)
286 == STA_KEY_FLG_NO_ENC)
287 priv->stations[sta_id].sta.key.key_offset =
288 iwl_get_free_ucode_key_index(priv);
289 /* else, we are overriding an existing key => no need to allocated room
290 * in uCode. */
291 270
292 WARN(priv->stations[sta_id].sta.key.key_offset == WEP_INVALID_OFFSET, 271static u8 iwlagn_key_sta_id(struct iwl_priv *priv,
293 "no space for a new key"); 272 struct ieee80211_vif *vif,
273 struct ieee80211_sta *sta)
274{
275 struct iwl_vif_priv *vif_priv = (void *)vif->drv_priv;
276 u8 sta_id = IWL_INVALID_STATION;
294 277
295 priv->stations[sta_id].sta.key.key_flags = key_flags; 278 if (sta)
296 priv->stations[sta_id].sta.sta.modify_mask = STA_MODIFY_KEY_MASK; 279 sta_id = iwl_sta_id(sta);
297 priv->stations[sta_id].sta.mode = STA_CONTROL_MODIFY_MSK;
298 280
299 memcpy(&sta_cmd, &priv->stations[sta_id].sta, sizeof(struct iwl_addsta_cmd)); 281 /*
300 spin_unlock_irqrestore(&priv->sta_lock, flags); 282 * The device expects GTKs for station interfaces to be
283 * installed as GTKs for the AP station. If we have no
284 * station ID, then use the ap_sta_id in that case.
285 */
286 if (!sta && vif && vif_priv->ctx) {
287 switch (vif->type) {
288 case NL80211_IFTYPE_STATION:
289 sta_id = vif_priv->ctx->ap_sta_id;
290 break;
291 default:
292 /*
293 * In all other cases, the key will be
294 * used either for TX only or is bound
295 * to a station already.
296 */
297 break;
298 }
299 }
301 300
302 return iwl_send_add_sta(priv, &sta_cmd, CMD_SYNC); 301 return sta_id;
303} 302}
304 303
305static int iwl_set_ccmp_dynamic_key_info(struct iwl_priv *priv, 304static int iwlagn_send_sta_key(struct iwl_priv *priv,
306 struct iwl_rxon_context *ctx, 305 struct ieee80211_key_conf *keyconf,
307 struct ieee80211_key_conf *keyconf, 306 u8 sta_id, u32 tkip_iv32, u16 *tkip_p1k,
308 u8 sta_id) 307 u32 cmd_flags)
309{ 308{
310 unsigned long flags; 309 unsigned long flags;
311 __le16 key_flags = 0; 310 __le16 key_flags;
312 struct iwl_addsta_cmd sta_cmd; 311 struct iwl_addsta_cmd sta_cmd;
313 312 int i;
314 lockdep_assert_held(&priv->mutex);
315
316 key_flags |= (STA_KEY_FLG_CCMP | STA_KEY_FLG_MAP_KEY_MSK);
317 key_flags |= cpu_to_le16(keyconf->keyidx << STA_KEY_FLG_KEYID_POS);
318 key_flags &= ~STA_KEY_FLG_INVALID;
319
320 if (sta_id == ctx->bcast_sta_id)
321 key_flags |= STA_KEY_MULTICAST_MSK;
322
323 keyconf->flags |= IEEE80211_KEY_FLAG_GENERATE_IV;
324 313
325 spin_lock_irqsave(&priv->sta_lock, flags); 314 spin_lock_irqsave(&priv->sta_lock, flags);
326 priv->stations[sta_id].keyinfo.cipher = keyconf->cipher; 315 memcpy(&sta_cmd, &priv->stations[sta_id].sta, sizeof(sta_cmd));
327 priv->stations[sta_id].keyinfo.keylen = keyconf->keylen;
328
329 memcpy(priv->stations[sta_id].keyinfo.key, keyconf->key,
330 keyconf->keylen);
331
332 memcpy(priv->stations[sta_id].sta.key.key, keyconf->key,
333 keyconf->keylen);
334
335 if ((priv->stations[sta_id].sta.key.key_flags & STA_KEY_FLG_ENCRYPT_MSK)
336 == STA_KEY_FLG_NO_ENC)
337 priv->stations[sta_id].sta.key.key_offset =
338 iwl_get_free_ucode_key_index(priv);
339 /* else, we are overriding an existing key => no need to allocated room
340 * in uCode. */
341
342 WARN(priv->stations[sta_id].sta.key.key_offset == WEP_INVALID_OFFSET,
343 "no space for a new key");
344
345 priv->stations[sta_id].sta.key.key_flags = key_flags;
346 priv->stations[sta_id].sta.sta.modify_mask = STA_MODIFY_KEY_MASK;
347 priv->stations[sta_id].sta.mode = STA_CONTROL_MODIFY_MSK;
348
349 memcpy(&sta_cmd, &priv->stations[sta_id].sta, sizeof(struct iwl_addsta_cmd));
350 spin_unlock_irqrestore(&priv->sta_lock, flags); 316 spin_unlock_irqrestore(&priv->sta_lock, flags);
351 317
352 return iwl_send_add_sta(priv, &sta_cmd, CMD_SYNC); 318 key_flags = cpu_to_le16(keyconf->keyidx << STA_KEY_FLG_KEYID_POS);
353} 319 key_flags |= STA_KEY_FLG_MAP_KEY_MSK;
354
355static int iwl_set_tkip_dynamic_key_info(struct iwl_priv *priv,
356 struct iwl_rxon_context *ctx,
357 struct ieee80211_key_conf *keyconf,
358 u8 sta_id)
359{
360 unsigned long flags;
361 int ret = 0;
362 __le16 key_flags = 0;
363 320
364 key_flags |= (STA_KEY_FLG_TKIP | STA_KEY_FLG_MAP_KEY_MSK); 321 switch (keyconf->cipher) {
365 key_flags |= cpu_to_le16(keyconf->keyidx << STA_KEY_FLG_KEYID_POS); 322 case WLAN_CIPHER_SUITE_CCMP:
366 key_flags &= ~STA_KEY_FLG_INVALID; 323 key_flags |= STA_KEY_FLG_CCMP;
324 memcpy(sta_cmd.key.key, keyconf->key, keyconf->keylen);
325 break;
326 case WLAN_CIPHER_SUITE_TKIP:
327 key_flags |= STA_KEY_FLG_TKIP;
328 sta_cmd.key.tkip_rx_tsc_byte2 = tkip_iv32;
329 for (i = 0; i < 5; i++)
330 sta_cmd.key.tkip_rx_ttak[i] = cpu_to_le16(tkip_p1k[i]);
331 memcpy(sta_cmd.key.key, keyconf->key, keyconf->keylen);
332 break;
333 case WLAN_CIPHER_SUITE_WEP104:
334 key_flags |= STA_KEY_FLG_KEY_SIZE_MSK;
335 /* fall through */
336 case WLAN_CIPHER_SUITE_WEP40:
337 key_flags |= STA_KEY_FLG_WEP;
338 memcpy(&sta_cmd.key.key[3], keyconf->key, keyconf->keylen);
339 break;
340 default:
341 WARN_ON(1);
342 return -EINVAL;
343 }
367 344
368 if (sta_id == ctx->bcast_sta_id) 345 if (!(keyconf->flags & IEEE80211_KEY_FLAG_PAIRWISE))
369 key_flags |= STA_KEY_MULTICAST_MSK; 346 key_flags |= STA_KEY_MULTICAST_MSK;
370 347
371 keyconf->flags |= IEEE80211_KEY_FLAG_GENERATE_IV; 348 /* key pointer (offset) */
372 keyconf->flags |= IEEE80211_KEY_FLAG_GENERATE_MMIC; 349 sta_cmd.key.key_offset = keyconf->hw_key_idx;
373 350
374 spin_lock_irqsave(&priv->sta_lock, flags); 351 sta_cmd.key.key_flags = key_flags;
375 352 sta_cmd.mode = STA_CONTROL_MODIFY_MSK;
376 priv->stations[sta_id].keyinfo.cipher = keyconf->cipher; 353 sta_cmd.sta.modify_mask = STA_MODIFY_KEY_MASK;
377 priv->stations[sta_id].keyinfo.keylen = 16;
378
379 if ((priv->stations[sta_id].sta.key.key_flags & STA_KEY_FLG_ENCRYPT_MSK)
380 == STA_KEY_FLG_NO_ENC)
381 priv->stations[sta_id].sta.key.key_offset =
382 iwl_get_free_ucode_key_index(priv);
383 /* else, we are overriding an existing key => no need to allocated room
384 * in uCode. */
385
386 WARN(priv->stations[sta_id].sta.key.key_offset == WEP_INVALID_OFFSET,
387 "no space for a new key");
388
389 priv->stations[sta_id].sta.key.key_flags = key_flags;
390 354
391 355 return iwl_send_add_sta(priv, &sta_cmd, cmd_flags);
392 /* This copy is acutally not needed: we get the key with each TX */
393 memcpy(priv->stations[sta_id].keyinfo.key, keyconf->key, 16);
394
395 memcpy(priv->stations[sta_id].sta.key.key, keyconf->key, 16);
396
397 spin_unlock_irqrestore(&priv->sta_lock, flags);
398
399 return ret;
400} 356}
401 357
402void iwl_update_tkip_key(struct iwl_priv *priv, 358void iwl_update_tkip_key(struct iwl_priv *priv,
403 struct iwl_rxon_context *ctx, 359 struct ieee80211_vif *vif,
404 struct ieee80211_key_conf *keyconf, 360 struct ieee80211_key_conf *keyconf,
405 struct ieee80211_sta *sta, u32 iv32, u16 *phase1key) 361 struct ieee80211_sta *sta, u32 iv32, u16 *phase1key)
406{ 362{
407 u8 sta_id; 363 u8 sta_id = iwlagn_key_sta_id(priv, vif, sta);
408 unsigned long flags; 364
409 int i; 365 if (sta_id == IWL_INVALID_STATION)
366 return;
410 367
411 if (iwl_scan_cancel(priv)) { 368 if (iwl_scan_cancel(priv)) {
412 /* cancel scan failed, just live w/ bad key and rely 369 /* cancel scan failed, just live w/ bad key and rely
@@ -414,121 +371,110 @@ void iwl_update_tkip_key(struct iwl_priv *priv,
414 return; 371 return;
415 } 372 }
416 373
417 sta_id = iwl_sta_id_or_broadcast(priv, ctx, sta); 374 iwlagn_send_sta_key(priv, keyconf, sta_id,
418 if (sta_id == IWL_INVALID_STATION) 375 iv32, phase1key, CMD_ASYNC);
419 return;
420
421 spin_lock_irqsave(&priv->sta_lock, flags);
422
423 priv->stations[sta_id].sta.key.tkip_rx_tsc_byte2 = (u8) iv32;
424
425 for (i = 0; i < 5; i++)
426 priv->stations[sta_id].sta.key.tkip_rx_ttak[i] =
427 cpu_to_le16(phase1key[i]);
428
429 priv->stations[sta_id].sta.sta.modify_mask = STA_MODIFY_KEY_MASK;
430 priv->stations[sta_id].sta.mode = STA_CONTROL_MODIFY_MSK;
431
432 iwl_send_add_sta(priv, &priv->stations[sta_id].sta, CMD_ASYNC);
433
434 spin_unlock_irqrestore(&priv->sta_lock, flags);
435
436} 376}
437 377
438int iwl_remove_dynamic_key(struct iwl_priv *priv, 378int iwl_remove_dynamic_key(struct iwl_priv *priv,
439 struct iwl_rxon_context *ctx, 379 struct iwl_rxon_context *ctx,
440 struct ieee80211_key_conf *keyconf, 380 struct ieee80211_key_conf *keyconf,
441 u8 sta_id) 381 struct ieee80211_sta *sta)
442{ 382{
443 unsigned long flags; 383 unsigned long flags;
444 u16 key_flags;
445 u8 keyidx;
446 struct iwl_addsta_cmd sta_cmd; 384 struct iwl_addsta_cmd sta_cmd;
385 u8 sta_id = iwlagn_key_sta_id(priv, ctx->vif, sta);
386
387 /* if station isn't there, neither is the key */
388 if (sta_id == IWL_INVALID_STATION)
389 return -ENOENT;
390
391 spin_lock_irqsave(&priv->sta_lock, flags);
392 memcpy(&sta_cmd, &priv->stations[sta_id].sta, sizeof(sta_cmd));
393 if (!(priv->stations[sta_id].used & IWL_STA_UCODE_ACTIVE))
394 sta_id = IWL_INVALID_STATION;
395 spin_unlock_irqrestore(&priv->sta_lock, flags);
396
397 if (sta_id == IWL_INVALID_STATION)
398 return 0;
447 399
448 lockdep_assert_held(&priv->mutex); 400 lockdep_assert_held(&priv->mutex);
449 401
450 ctx->key_mapping_keys--; 402 ctx->key_mapping_keys--;
451 403
452 spin_lock_irqsave(&priv->sta_lock, flags);
453 key_flags = le16_to_cpu(priv->stations[sta_id].sta.key.key_flags);
454 keyidx = (key_flags >> STA_KEY_FLG_KEYID_POS) & 0x3;
455
456 IWL_DEBUG_WEP(priv, "Remove dynamic key: idx=%d sta=%d\n", 404 IWL_DEBUG_WEP(priv, "Remove dynamic key: idx=%d sta=%d\n",
457 keyconf->keyidx, sta_id); 405 keyconf->keyidx, sta_id);
458 406
459 if (keyconf->keyidx != keyidx) { 407 if (!test_and_clear_bit(keyconf->hw_key_idx, &priv->ucode_key_table))
460 /* We need to remove a key with index different that the one 408 IWL_ERR(priv, "offset %d not used in uCode key table.\n",
461 * in the uCode. This means that the key we need to remove has 409 keyconf->hw_key_idx);
462 * been replaced by another one with different index.
463 * Don't do anything and return ok
464 */
465 spin_unlock_irqrestore(&priv->sta_lock, flags);
466 return 0;
467 }
468
469 if (priv->stations[sta_id].sta.key.key_offset == WEP_INVALID_OFFSET) {
470 IWL_WARN(priv, "Removing wrong key %d 0x%x\n",
471 keyconf->keyidx, key_flags);
472 spin_unlock_irqrestore(&priv->sta_lock, flags);
473 return 0;
474 }
475 410
476 if (!test_and_clear_bit(priv->stations[sta_id].sta.key.key_offset, 411 sta_cmd.key.key_flags = STA_KEY_FLG_NO_ENC | STA_KEY_FLG_INVALID;
477 &priv->ucode_key_table)) 412 sta_cmd.key.key_offset = WEP_INVALID_OFFSET;
478 IWL_ERR(priv, "index %d not used in uCode key table.\n", 413 sta_cmd.sta.modify_mask = STA_MODIFY_KEY_MASK;
479 priv->stations[sta_id].sta.key.key_offset); 414 sta_cmd.mode = STA_CONTROL_MODIFY_MSK;
480 memset(&priv->stations[sta_id].keyinfo, 0,
481 sizeof(struct iwl_hw_key));
482 memset(&priv->stations[sta_id].sta.key, 0,
483 sizeof(struct iwl_keyinfo));
484 priv->stations[sta_id].sta.key.key_flags =
485 STA_KEY_FLG_NO_ENC | STA_KEY_FLG_INVALID;
486 priv->stations[sta_id].sta.key.key_offset = WEP_INVALID_OFFSET;
487 priv->stations[sta_id].sta.sta.modify_mask = STA_MODIFY_KEY_MASK;
488 priv->stations[sta_id].sta.mode = STA_CONTROL_MODIFY_MSK;
489
490 if (iwl_is_rfkill(priv)) {
491 IWL_DEBUG_WEP(priv, "Not sending REPLY_ADD_STA command because RFKILL enabled.\n");
492 spin_unlock_irqrestore(&priv->sta_lock, flags);
493 return 0;
494 }
495 memcpy(&sta_cmd, &priv->stations[sta_id].sta, sizeof(struct iwl_addsta_cmd));
496 spin_unlock_irqrestore(&priv->sta_lock, flags);
497 415
498 return iwl_send_add_sta(priv, &sta_cmd, CMD_SYNC); 416 return iwl_send_add_sta(priv, &sta_cmd, CMD_SYNC);
499} 417}
500 418
501int iwl_set_dynamic_key(struct iwl_priv *priv, struct iwl_rxon_context *ctx, 419int iwl_set_dynamic_key(struct iwl_priv *priv,
502 struct ieee80211_key_conf *keyconf, u8 sta_id) 420 struct iwl_rxon_context *ctx,
421 struct ieee80211_key_conf *keyconf,
422 struct ieee80211_sta *sta)
503{ 423{
424 struct ieee80211_key_seq seq;
425 u16 p1k[5];
504 int ret; 426 int ret;
427 u8 sta_id = iwlagn_key_sta_id(priv, ctx->vif, sta);
428 const u8 *addr;
429
430 if (sta_id == IWL_INVALID_STATION)
431 return -EINVAL;
505 432
506 lockdep_assert_held(&priv->mutex); 433 lockdep_assert_held(&priv->mutex);
507 434
435 keyconf->hw_key_idx = iwl_get_free_ucode_key_offset(priv);
436 if (keyconf->hw_key_idx == WEP_INVALID_OFFSET)
437 return -ENOSPC;
438
508 ctx->key_mapping_keys++; 439 ctx->key_mapping_keys++;
509 keyconf->hw_key_idx = HW_KEY_DYNAMIC;
510 440
511 switch (keyconf->cipher) { 441 switch (keyconf->cipher) {
512 case WLAN_CIPHER_SUITE_CCMP:
513 ret = iwl_set_ccmp_dynamic_key_info(priv, ctx, keyconf, sta_id);
514 break;
515 case WLAN_CIPHER_SUITE_TKIP: 442 case WLAN_CIPHER_SUITE_TKIP:
516 ret = iwl_set_tkip_dynamic_key_info(priv, ctx, keyconf, sta_id); 443 keyconf->flags |= IEEE80211_KEY_FLAG_GENERATE_MMIC;
444 keyconf->flags |= IEEE80211_KEY_FLAG_GENERATE_IV;
445
446 if (sta)
447 addr = sta->addr;
448 else /* station mode case only */
449 addr = ctx->active.bssid_addr;
450
451 /* pre-fill phase 1 key into device cache */
452 ieee80211_get_key_rx_seq(keyconf, 0, &seq);
453 ieee80211_get_tkip_rx_p1k(keyconf, addr, seq.tkip.iv32, p1k);
454 ret = iwlagn_send_sta_key(priv, keyconf, sta_id,
455 seq.tkip.iv32, p1k, CMD_SYNC);
517 break; 456 break;
457 case WLAN_CIPHER_SUITE_CCMP:
458 keyconf->flags |= IEEE80211_KEY_FLAG_GENERATE_IV;
459 /* fall through */
518 case WLAN_CIPHER_SUITE_WEP40: 460 case WLAN_CIPHER_SUITE_WEP40:
519 case WLAN_CIPHER_SUITE_WEP104: 461 case WLAN_CIPHER_SUITE_WEP104:
520 ret = iwl_set_wep_dynamic_key_info(priv, ctx, keyconf, sta_id); 462 ret = iwlagn_send_sta_key(priv, keyconf, sta_id,
463 0, NULL, CMD_SYNC);
521 break; 464 break;
522 default: 465 default:
523 IWL_ERR(priv, 466 IWL_ERR(priv, "Unknown cipher %x\n", keyconf->cipher);
524 "Unknown alg: %s cipher = %x\n", __func__,
525 keyconf->cipher);
526 ret = -EINVAL; 467 ret = -EINVAL;
527 } 468 }
528 469
529 IWL_DEBUG_WEP(priv, "Set dynamic key: cipher=%x len=%d idx=%d sta=%d ret=%d\n", 470 if (ret) {
471 ctx->key_mapping_keys--;
472 clear_bit(keyconf->hw_key_idx, &priv->ucode_key_table);
473 }
474
475 IWL_DEBUG_WEP(priv, "Set dynamic key: cipher=%x len=%d idx=%d sta=%pM ret=%d\n",
530 keyconf->cipher, keyconf->keylen, keyconf->keyidx, 476 keyconf->cipher, keyconf->keylen, keyconf->keyidx,
531 sta_id, ret); 477 sta ? sta->addr : NULL, ret);
532 478
533 return ret; 479 return ret;
534} 480}
diff --git a/drivers/net/wireless/iwlwifi/iwl-agn-tx.c b/drivers/net/wireless/iwlwifi/iwl-agn-tx.c
index 7d3aad83e0d6..53bb59ee719d 100644
--- a/drivers/net/wireless/iwlwifi/iwl-agn-tx.c
+++ b/drivers/net/wireless/iwlwifi/iwl-agn-tx.c
@@ -39,6 +39,7 @@
39#include "iwl-helpers.h" 39#include "iwl-helpers.h"
40#include "iwl-agn-hw.h" 40#include "iwl-agn-hw.h"
41#include "iwl-agn.h" 41#include "iwl-agn.h"
42#include "iwl-trans.h"
42 43
43/* 44/*
44 * mac80211 queues, ACs, hardware queues, FIFOs. 45 * mac80211 queues, ACs, hardware queues, FIFOs.
@@ -95,132 +96,8 @@ static inline int get_fifo_from_tid(struct iwl_rxon_context *ctx, u16 tid)
95 return -EINVAL; 96 return -EINVAL;
96} 97}
97 98
98/** 99static int iwlagn_txq_agg_enable(struct iwl_priv *priv, int txq_id, int sta_id,
99 * iwlagn_txq_update_byte_cnt_tbl - Set up entry in Tx byte-count array 100 int tid)
100 */
101static void iwlagn_txq_update_byte_cnt_tbl(struct iwl_priv *priv,
102 struct iwl_tx_queue *txq,
103 u16 byte_cnt)
104{
105 struct iwlagn_scd_bc_tbl *scd_bc_tbl = priv->scd_bc_tbls.addr;
106 int write_ptr = txq->q.write_ptr;
107 int txq_id = txq->q.id;
108 u8 sec_ctl = 0;
109 u8 sta_id = 0;
110 u16 len = byte_cnt + IWL_TX_CRC_SIZE + IWL_TX_DELIMITER_SIZE;
111 __le16 bc_ent;
112
113 WARN_ON(len > 0xFFF || write_ptr >= TFD_QUEUE_SIZE_MAX);
114
115 sta_id = txq->cmd[txq->q.write_ptr]->cmd.tx.sta_id;
116 sec_ctl = txq->cmd[txq->q.write_ptr]->cmd.tx.sec_ctl;
117
118 switch (sec_ctl & TX_CMD_SEC_MSK) {
119 case TX_CMD_SEC_CCM:
120 len += CCMP_MIC_LEN;
121 break;
122 case TX_CMD_SEC_TKIP:
123 len += TKIP_ICV_LEN;
124 break;
125 case TX_CMD_SEC_WEP:
126 len += WEP_IV_LEN + WEP_ICV_LEN;
127 break;
128 }
129
130 bc_ent = cpu_to_le16((len & 0xFFF) | (sta_id << 12));
131
132 scd_bc_tbl[txq_id].tfd_offset[write_ptr] = bc_ent;
133
134 if (write_ptr < TFD_QUEUE_SIZE_BC_DUP)
135 scd_bc_tbl[txq_id].
136 tfd_offset[TFD_QUEUE_SIZE_MAX + write_ptr] = bc_ent;
137}
138
139static void iwlagn_txq_inval_byte_cnt_tbl(struct iwl_priv *priv,
140 struct iwl_tx_queue *txq)
141{
142 struct iwlagn_scd_bc_tbl *scd_bc_tbl = priv->scd_bc_tbls.addr;
143 int txq_id = txq->q.id;
144 int read_ptr = txq->q.read_ptr;
145 u8 sta_id = 0;
146 __le16 bc_ent;
147
148 WARN_ON(read_ptr >= TFD_QUEUE_SIZE_MAX);
149
150 if (txq_id != priv->cmd_queue)
151 sta_id = txq->cmd[read_ptr]->cmd.tx.sta_id;
152
153 bc_ent = cpu_to_le16(1 | (sta_id << 12));
154 scd_bc_tbl[txq_id].tfd_offset[read_ptr] = bc_ent;
155
156 if (read_ptr < TFD_QUEUE_SIZE_BC_DUP)
157 scd_bc_tbl[txq_id].
158 tfd_offset[TFD_QUEUE_SIZE_MAX + read_ptr] = bc_ent;
159}
160
161static int iwlagn_tx_queue_set_q2ratid(struct iwl_priv *priv, u16 ra_tid,
162 u16 txq_id)
163{
164 u32 tbl_dw_addr;
165 u32 tbl_dw;
166 u16 scd_q2ratid;
167
168 scd_q2ratid = ra_tid & IWL_SCD_QUEUE_RA_TID_MAP_RATID_MSK;
169
170 tbl_dw_addr = priv->scd_base_addr +
171 IWLAGN_SCD_TRANSLATE_TBL_OFFSET_QUEUE(txq_id);
172
173 tbl_dw = iwl_read_targ_mem(priv, tbl_dw_addr);
174
175 if (txq_id & 0x1)
176 tbl_dw = (scd_q2ratid << 16) | (tbl_dw & 0x0000FFFF);
177 else
178 tbl_dw = scd_q2ratid | (tbl_dw & 0xFFFF0000);
179
180 iwl_write_targ_mem(priv, tbl_dw_addr, tbl_dw);
181
182 return 0;
183}
184
185static void iwlagn_tx_queue_stop_scheduler(struct iwl_priv *priv, u16 txq_id)
186{
187 /* Simply stop the queue, but don't change any configuration;
188 * the SCD_ACT_EN bit is the write-enable mask for the ACTIVE bit. */
189 iwl_write_prph(priv,
190 IWLAGN_SCD_QUEUE_STATUS_BITS(txq_id),
191 (0 << IWLAGN_SCD_QUEUE_STTS_REG_POS_ACTIVE)|
192 (1 << IWLAGN_SCD_QUEUE_STTS_REG_POS_SCD_ACT_EN));
193}
194
195void iwlagn_set_wr_ptrs(struct iwl_priv *priv,
196 int txq_id, u32 index)
197{
198 iwl_write_direct32(priv, HBUS_TARG_WRPTR,
199 (index & 0xff) | (txq_id << 8));
200 iwl_write_prph(priv, IWLAGN_SCD_QUEUE_RDPTR(txq_id), index);
201}
202
203void iwlagn_tx_queue_set_status(struct iwl_priv *priv,
204 struct iwl_tx_queue *txq,
205 int tx_fifo_id, int scd_retry)
206{
207 int txq_id = txq->q.id;
208 int active = test_bit(txq_id, &priv->txq_ctx_active_msk) ? 1 : 0;
209
210 iwl_write_prph(priv, IWLAGN_SCD_QUEUE_STATUS_BITS(txq_id),
211 (active << IWLAGN_SCD_QUEUE_STTS_REG_POS_ACTIVE) |
212 (tx_fifo_id << IWLAGN_SCD_QUEUE_STTS_REG_POS_TXF) |
213 (1 << IWLAGN_SCD_QUEUE_STTS_REG_POS_WSL) |
214 IWLAGN_SCD_QUEUE_STTS_REG_MSK);
215
216 txq->sched_retry = scd_retry;
217
218 IWL_DEBUG_INFO(priv, "%s %s Queue %d on FIFO %d\n",
219 active ? "Activate" : "Deactivate",
220 scd_retry ? "BA" : "AC/CMD", txq_id, tx_fifo_id);
221}
222
223static int iwlagn_txq_agg_enable(struct iwl_priv *priv, int txq_id, int sta_id, int tid)
224{ 101{
225 if ((IWLAGN_FIRST_AMPDU_QUEUE > txq_id) || 102 if ((IWLAGN_FIRST_AMPDU_QUEUE > txq_id) ||
226 (IWLAGN_FIRST_AMPDU_QUEUE + 103 (IWLAGN_FIRST_AMPDU_QUEUE +
@@ -237,108 +114,6 @@ static int iwlagn_txq_agg_enable(struct iwl_priv *priv, int txq_id, int sta_id,
237 return iwl_sta_tx_modify_enable_tid(priv, sta_id, tid); 114 return iwl_sta_tx_modify_enable_tid(priv, sta_id, tid);
238} 115}
239 116
240void iwlagn_txq_agg_queue_setup(struct iwl_priv *priv,
241 struct ieee80211_sta *sta,
242 int tid, int frame_limit)
243{
244 int sta_id, tx_fifo, txq_id, ssn_idx;
245 u16 ra_tid;
246 unsigned long flags;
247 struct iwl_tid_data *tid_data;
248
249 sta_id = iwl_sta_id(sta);
250 if (WARN_ON(sta_id == IWL_INVALID_STATION))
251 return;
252 if (WARN_ON(tid >= MAX_TID_COUNT))
253 return;
254
255 spin_lock_irqsave(&priv->sta_lock, flags);
256 tid_data = &priv->stations[sta_id].tid[tid];
257 ssn_idx = SEQ_TO_SN(tid_data->seq_number);
258 txq_id = tid_data->agg.txq_id;
259 tx_fifo = tid_data->agg.tx_fifo;
260 spin_unlock_irqrestore(&priv->sta_lock, flags);
261
262 ra_tid = BUILD_RAxTID(sta_id, tid);
263
264 spin_lock_irqsave(&priv->lock, flags);
265
266 /* Stop this Tx queue before configuring it */
267 iwlagn_tx_queue_stop_scheduler(priv, txq_id);
268
269 /* Map receiver-address / traffic-ID to this queue */
270 iwlagn_tx_queue_set_q2ratid(priv, ra_tid, txq_id);
271
272 /* Set this queue as a chain-building queue */
273 iwl_set_bits_prph(priv, IWLAGN_SCD_QUEUECHAIN_SEL, (1<<txq_id));
274
275 /* enable aggregations for the queue */
276 iwl_set_bits_prph(priv, IWLAGN_SCD_AGGR_SEL, (1<<txq_id));
277
278 /* Place first TFD at index corresponding to start sequence number.
279 * Assumes that ssn_idx is valid (!= 0xFFF) */
280 priv->txq[txq_id].q.read_ptr = (ssn_idx & 0xff);
281 priv->txq[txq_id].q.write_ptr = (ssn_idx & 0xff);
282 iwlagn_set_wr_ptrs(priv, txq_id, ssn_idx);
283
284 /* Set up Tx window size and frame limit for this queue */
285 iwl_write_targ_mem(priv, priv->scd_base_addr +
286 IWLAGN_SCD_CONTEXT_QUEUE_OFFSET(txq_id) +
287 sizeof(u32),
288 ((frame_limit <<
289 IWLAGN_SCD_QUEUE_CTX_REG2_WIN_SIZE_POS) &
290 IWLAGN_SCD_QUEUE_CTX_REG2_WIN_SIZE_MSK) |
291 ((frame_limit <<
292 IWLAGN_SCD_QUEUE_CTX_REG2_FRAME_LIMIT_POS) &
293 IWLAGN_SCD_QUEUE_CTX_REG2_FRAME_LIMIT_MSK));
294
295 iwl_set_bits_prph(priv, IWLAGN_SCD_INTERRUPT_MASK, (1 << txq_id));
296
297 /* Set up Status area in SRAM, map to Tx DMA/FIFO, activate the queue */
298 iwlagn_tx_queue_set_status(priv, &priv->txq[txq_id], tx_fifo, 1);
299
300 spin_unlock_irqrestore(&priv->lock, flags);
301}
302
303static int iwlagn_txq_agg_disable(struct iwl_priv *priv, u16 txq_id,
304 u16 ssn_idx, u8 tx_fifo)
305{
306 if ((IWLAGN_FIRST_AMPDU_QUEUE > txq_id) ||
307 (IWLAGN_FIRST_AMPDU_QUEUE +
308 priv->cfg->base_params->num_of_ampdu_queues <= txq_id)) {
309 IWL_ERR(priv,
310 "queue number out of range: %d, must be %d to %d\n",
311 txq_id, IWLAGN_FIRST_AMPDU_QUEUE,
312 IWLAGN_FIRST_AMPDU_QUEUE +
313 priv->cfg->base_params->num_of_ampdu_queues - 1);
314 return -EINVAL;
315 }
316
317 iwlagn_tx_queue_stop_scheduler(priv, txq_id);
318
319 iwl_clear_bits_prph(priv, IWLAGN_SCD_AGGR_SEL, (1 << txq_id));
320
321 priv->txq[txq_id].q.read_ptr = (ssn_idx & 0xff);
322 priv->txq[txq_id].q.write_ptr = (ssn_idx & 0xff);
323 /* supposes that ssn_idx is valid (!= 0xFFF) */
324 iwlagn_set_wr_ptrs(priv, txq_id, ssn_idx);
325
326 iwl_clear_bits_prph(priv, IWLAGN_SCD_INTERRUPT_MASK, (1 << txq_id));
327 iwl_txq_ctx_deactivate(priv, txq_id);
328 iwlagn_tx_queue_set_status(priv, &priv->txq[txq_id], tx_fifo, 0);
329
330 return 0;
331}
332
333/*
334 * Activate/Deactivate Tx DMA/FIFO channels according tx fifos mask
335 * must be called under priv->lock and mac access
336 */
337void iwlagn_txq_set_sched(struct iwl_priv *priv, u32 mask)
338{
339 iwl_write_prph(priv, IWLAGN_SCD_TXFACT, mask);
340}
341
342static void iwlagn_tx_cmd_protection(struct iwl_priv *priv, 117static void iwlagn_tx_cmd_protection(struct iwl_priv *priv,
343 struct ieee80211_tx_info *info, 118 struct ieee80211_tx_info *info,
344 __le16 fc, __le32 *tx_flags) 119 __le16 fc, __le32 *tx_flags)
@@ -363,19 +138,15 @@ static void iwlagn_tx_cmd_build_basic(struct iwl_priv *priv,
363 __le32 tx_flags = tx_cmd->tx_flags; 138 __le32 tx_flags = tx_cmd->tx_flags;
364 139
365 tx_cmd->stop_time.life_time = TX_CMD_LIFE_TIME_INFINITE; 140 tx_cmd->stop_time.life_time = TX_CMD_LIFE_TIME_INFINITE;
366 if (!(info->flags & IEEE80211_TX_CTL_NO_ACK)) { 141
142 if (!(info->flags & IEEE80211_TX_CTL_NO_ACK))
367 tx_flags |= TX_CMD_FLG_ACK_MSK; 143 tx_flags |= TX_CMD_FLG_ACK_MSK;
368 if (ieee80211_is_mgmt(fc)) 144 else
369 tx_flags |= TX_CMD_FLG_SEQ_CTL_MSK; 145 tx_flags &= ~TX_CMD_FLG_ACK_MSK;
370 if (ieee80211_is_probe_resp(fc) &&
371 !(le16_to_cpu(hdr->seq_ctrl) & 0xf))
372 tx_flags |= TX_CMD_FLG_TSF_MSK;
373 } else {
374 tx_flags &= (~TX_CMD_FLG_ACK_MSK);
375 tx_flags |= TX_CMD_FLG_SEQ_CTL_MSK;
376 }
377 146
378 if (ieee80211_is_back_req(fc)) 147 if (ieee80211_is_probe_resp(fc))
148 tx_flags |= TX_CMD_FLG_TSF_MSK;
149 else if (ieee80211_is_back_req(fc))
379 tx_flags |= TX_CMD_FLG_ACK_MSK | TX_CMD_FLG_IMM_BA_RSP_MASK; 150 tx_flags |= TX_CMD_FLG_ACK_MSK | TX_CMD_FLG_IMM_BA_RSP_MASK;
380 else if (info->band == IEEE80211_BAND_2GHZ && 151 else if (info->band == IEEE80211_BAND_2GHZ &&
381 priv->cfg->bt_params && 152 priv->cfg->bt_params &&
@@ -446,6 +217,7 @@ static void iwlagn_tx_cmd_build_rate(struct iwl_priv *priv,
446 if (ieee80211_is_data(fc)) { 217 if (ieee80211_is_data(fc)) {
447 tx_cmd->initial_rate_index = 0; 218 tx_cmd->initial_rate_index = 0;
448 tx_cmd->tx_flags |= TX_CMD_FLG_STA_RATE_MSK; 219 tx_cmd->tx_flags |= TX_CMD_FLG_STA_RATE_MSK;
220#ifdef CONFIG_IWLWIFI_DEVICE_SVTOOL
449 if (priv->tm_fixed_rate) { 221 if (priv->tm_fixed_rate) {
450 /* 222 /*
451 * rate overwrite by testmode 223 * rate overwrite by testmode
@@ -456,6 +228,7 @@ static void iwlagn_tx_cmd_build_rate(struct iwl_priv *priv,
456 memcpy(&tx_cmd->rate_n_flags, &priv->tm_fixed_rate, 228 memcpy(&tx_cmd->rate_n_flags, &priv->tm_fixed_rate,
457 sizeof(tx_cmd->rate_n_flags)); 229 sizeof(tx_cmd->rate_n_flags));
458 } 230 }
231#endif
459 return; 232 return;
460 } 233 }
461 234
@@ -547,26 +320,17 @@ int iwlagn_tx_skb(struct iwl_priv *priv, struct sk_buff *skb)
547{ 320{
548 struct ieee80211_hdr *hdr = (struct ieee80211_hdr *)skb->data; 321 struct ieee80211_hdr *hdr = (struct ieee80211_hdr *)skb->data;
549 struct ieee80211_tx_info *info = IEEE80211_SKB_CB(skb); 322 struct ieee80211_tx_info *info = IEEE80211_SKB_CB(skb);
550 struct ieee80211_sta *sta = info->control.sta;
551 struct iwl_station_priv *sta_priv = NULL; 323 struct iwl_station_priv *sta_priv = NULL;
552 struct iwl_tx_queue *txq;
553 struct iwl_queue *q;
554 struct iwl_device_cmd *out_cmd;
555 struct iwl_cmd_meta *out_meta;
556 struct iwl_tx_cmd *tx_cmd;
557 struct iwl_rxon_context *ctx = &priv->contexts[IWL_RXON_CTX_BSS]; 324 struct iwl_rxon_context *ctx = &priv->contexts[IWL_RXON_CTX_BSS];
325 struct iwl_tx_cmd *tx_cmd;
558 int txq_id; 326 int txq_id;
559 dma_addr_t phys_addr = 0; 327
560 dma_addr_t txcmd_phys;
561 dma_addr_t scratch_phys;
562 u16 len, firstlen, secondlen;
563 u16 seq_number = 0; 328 u16 seq_number = 0;
564 __le16 fc; 329 __le16 fc;
565 u8 hdr_len; 330 u8 hdr_len;
331 u16 len;
566 u8 sta_id; 332 u8 sta_id;
567 u8 wait_write_ptr = 0;
568 u8 tid = 0; 333 u8 tid = 0;
569 u8 *qc = NULL;
570 unsigned long flags; 334 unsigned long flags;
571 bool is_agg = false; 335 bool is_agg = false;
572 336
@@ -614,8 +378,8 @@ int iwlagn_tx_skb(struct iwl_priv *priv, struct sk_buff *skb)
614 378
615 IWL_DEBUG_TX(priv, "station Id %d\n", sta_id); 379 IWL_DEBUG_TX(priv, "station Id %d\n", sta_id);
616 380
617 if (sta) 381 if (info->control.sta)
618 sta_priv = (void *)sta->drv_priv; 382 sta_priv = (void *)info->control.sta->drv_priv;
619 383
620 if (sta_priv && sta_priv->asleep && 384 if (sta_priv && sta_priv->asleep &&
621 (info->flags & IEEE80211_TX_CTL_PSPOLL_RESPONSE)) { 385 (info->flags & IEEE80211_TX_CTL_PSPOLL_RESPONSE)) {
@@ -650,6 +414,7 @@ int iwlagn_tx_skb(struct iwl_priv *priv, struct sk_buff *skb)
650 spin_lock(&priv->sta_lock); 414 spin_lock(&priv->sta_lock);
651 415
652 if (ieee80211_is_data_qos(fc)) { 416 if (ieee80211_is_data_qos(fc)) {
417 u8 *qc = NULL;
653 qc = ieee80211_get_qos_ctl(hdr); 418 qc = ieee80211_get_qos_ctl(hdr);
654 tid = qc[0] & IEEE80211_QOS_CTL_TID_MASK; 419 tid = qc[0] & IEEE80211_QOS_CTL_TID_MASK;
655 420
@@ -670,38 +435,13 @@ int iwlagn_tx_skb(struct iwl_priv *priv, struct sk_buff *skb)
670 } 435 }
671 } 436 }
672 437
673 txq = &priv->txq[txq_id]; 438 tx_cmd = trans_get_tx_cmd(&priv->trans, txq_id);
674 q = &txq->q; 439 if (unlikely(!tx_cmd))
675
676 if (unlikely(iwl_queue_space(q) < q->high_mark))
677 goto drop_unlock_sta; 440 goto drop_unlock_sta;
678 441
679 /* Set up driver data for this TFD */
680 memset(&(txq->txb[q->write_ptr]), 0, sizeof(struct iwl_tx_info));
681 txq->txb[q->write_ptr].skb = skb;
682 txq->txb[q->write_ptr].ctx = ctx;
683
684 /* Set up first empty entry in queue's array of Tx/cmd buffers */
685 out_cmd = txq->cmd[q->write_ptr];
686 out_meta = &txq->meta[q->write_ptr];
687 tx_cmd = &out_cmd->cmd.tx;
688 memset(&out_cmd->hdr, 0, sizeof(out_cmd->hdr));
689 memset(tx_cmd, 0, sizeof(struct iwl_tx_cmd));
690
691 /*
692 * Set up the Tx-command (not MAC!) header.
693 * Store the chosen Tx queue and TFD index within the sequence field;
694 * after Tx, uCode's Tx response will return this value so driver can
695 * locate the frame within the tx queue and do post-tx processing.
696 */
697 out_cmd->hdr.cmd = REPLY_TX;
698 out_cmd->hdr.sequence = cpu_to_le16((u16)(QUEUE_TO_SEQ(txq_id) |
699 INDEX_TO_SEQ(q->write_ptr)));
700
701 /* Copy MAC header from skb into command buffer */ 442 /* Copy MAC header from skb into command buffer */
702 memcpy(tx_cmd->hdr, hdr, hdr_len); 443 memcpy(tx_cmd->hdr, hdr, hdr_len);
703 444
704
705 /* Total # bytes to be transmitted */ 445 /* Total # bytes to be transmitted */
706 len = (u16)skb->len; 446 len = (u16)skb->len;
707 tx_cmd->len = cpu_to_le16(len); 447 tx_cmd->len = cpu_to_le16(len);
@@ -716,54 +456,9 @@ int iwlagn_tx_skb(struct iwl_priv *priv, struct sk_buff *skb)
716 iwlagn_tx_cmd_build_rate(priv, tx_cmd, info, fc); 456 iwlagn_tx_cmd_build_rate(priv, tx_cmd, info, fc);
717 457
718 iwl_update_stats(priv, true, fc, len); 458 iwl_update_stats(priv, true, fc, len);
719 /*
720 * Use the first empty entry in this queue's command buffer array
721 * to contain the Tx command and MAC header concatenated together
722 * (payload data will be in another buffer).
723 * Size of this varies, due to varying MAC header length.
724 * If end is not dword aligned, we'll have 2 extra bytes at the end
725 * of the MAC header (device reads on dword boundaries).
726 * We'll tell device about this padding later.
727 */
728 len = sizeof(struct iwl_tx_cmd) +
729 sizeof(struct iwl_cmd_header) + hdr_len;
730 firstlen = (len + 3) & ~3;
731
732 /* Tell NIC about any 2-byte padding after MAC header */
733 if (firstlen != len)
734 tx_cmd->tx_flags |= TX_CMD_FLG_MH_PAD_MSK;
735
736 /* Physical address of this Tx command's header (not MAC header!),
737 * within command buffer array. */
738 txcmd_phys = dma_map_single(priv->bus.dev,
739 &out_cmd->hdr, firstlen,
740 DMA_BIDIRECTIONAL);
741 if (unlikely(dma_mapping_error(priv->bus.dev, txcmd_phys)))
742 goto drop_unlock_sta;
743 dma_unmap_addr_set(out_meta, mapping, txcmd_phys);
744 dma_unmap_len_set(out_meta, len, firstlen);
745
746 if (!ieee80211_has_morefrags(hdr->frame_control)) {
747 txq->need_update = 1;
748 } else {
749 wait_write_ptr = 1;
750 txq->need_update = 0;
751 }
752 459
753 /* Set up TFD's 2nd entry to point directly to remainder of skb, 460 if (trans_tx(&priv->trans, skb, tx_cmd, txq_id, fc, is_agg, ctx))
754 * if any (802.11 null frames have no payload). */ 461 goto drop_unlock_sta;
755 secondlen = skb->len - hdr_len;
756 if (secondlen > 0) {
757 phys_addr = dma_map_single(priv->bus.dev, skb->data + hdr_len,
758 secondlen, DMA_TO_DEVICE);
759 if (unlikely(dma_mapping_error(priv->bus.dev, phys_addr))) {
760 dma_unmap_single(priv->bus.dev,
761 dma_unmap_addr(out_meta, mapping),
762 dma_unmap_len(out_meta, len),
763 DMA_BIDIRECTIONAL);
764 goto drop_unlock_sta;
765 }
766 }
767 462
768 if (ieee80211_is_data_qos(fc)) { 463 if (ieee80211_is_data_qos(fc)) {
769 priv->stations[sta_id].tid[tid].tfds_in_queue++; 464 priv->stations[sta_id].tid[tid].tfds_in_queue++;
@@ -772,55 +467,9 @@ int iwlagn_tx_skb(struct iwl_priv *priv, struct sk_buff *skb)
772 } 467 }
773 468
774 spin_unlock(&priv->sta_lock); 469 spin_unlock(&priv->sta_lock);
775
776 /* Attach buffers to TFD */
777 iwlagn_txq_attach_buf_to_tfd(priv, txq, txcmd_phys, firstlen, 1);
778 if (secondlen > 0)
779 iwlagn_txq_attach_buf_to_tfd(priv, txq, phys_addr,
780 secondlen, 0);
781
782 scratch_phys = txcmd_phys + sizeof(struct iwl_cmd_header) +
783 offsetof(struct iwl_tx_cmd, scratch);
784
785 /* take back ownership of DMA buffer to enable update */
786 dma_sync_single_for_cpu(priv->bus.dev, txcmd_phys, firstlen,
787 DMA_BIDIRECTIONAL);
788 tx_cmd->dram_lsb_ptr = cpu_to_le32(scratch_phys);
789 tx_cmd->dram_msb_ptr = iwl_get_dma_hi_addr(scratch_phys);
790
791 IWL_DEBUG_TX(priv, "sequence nr = 0X%x\n",
792 le16_to_cpu(out_cmd->hdr.sequence));
793 IWL_DEBUG_TX(priv, "tx_flags = 0X%x\n", le32_to_cpu(tx_cmd->tx_flags));
794 iwl_print_hex_dump(priv, IWL_DL_TX, (u8 *)tx_cmd, sizeof(*tx_cmd));
795 iwl_print_hex_dump(priv, IWL_DL_TX, (u8 *)tx_cmd->hdr, hdr_len);
796
797 /* Set up entry for this TFD in Tx byte-count array */
798 if (info->flags & IEEE80211_TX_CTL_AMPDU)
799 iwlagn_txq_update_byte_cnt_tbl(priv, txq,
800 le16_to_cpu(tx_cmd->len));
801
802 dma_sync_single_for_device(priv->bus.dev, txcmd_phys, firstlen,
803 DMA_BIDIRECTIONAL);
804
805 trace_iwlwifi_dev_tx(priv,
806 &((struct iwl_tfd *)txq->tfds)[txq->q.write_ptr],
807 sizeof(struct iwl_tfd),
808 &out_cmd->hdr, firstlen,
809 skb->data + hdr_len, secondlen);
810
811 /* Tell device the write index *just past* this latest filled TFD */
812 q->write_ptr = iwl_queue_inc_wrap(q->write_ptr, q->n_bd);
813 iwl_txq_update_write_ptr(priv, txq);
814 spin_unlock_irqrestore(&priv->lock, flags); 470 spin_unlock_irqrestore(&priv->lock, flags);
815 471
816 /* 472 /*
817 * At this point the frame is "transmitted" successfully
818 * and we will get a TX status notification eventually,
819 * regardless of the value of ret. "ret" only indicates
820 * whether or not we should update the write pointer.
821 */
822
823 /*
824 * Avoid atomic ops if it isn't an associated client. 473 * Avoid atomic ops if it isn't an associated client.
825 * Also, if this is a packet for aggregation, don't 474 * Also, if this is a packet for aggregation, don't
826 * increase the counter because the ucode will stop 475 * increase the counter because the ucode will stop
@@ -830,17 +479,6 @@ int iwlagn_tx_skb(struct iwl_priv *priv, struct sk_buff *skb)
830 if (sta_priv && sta_priv->client && !is_agg) 479 if (sta_priv && sta_priv->client && !is_agg)
831 atomic_inc(&sta_priv->pending_frames); 480 atomic_inc(&sta_priv->pending_frames);
832 481
833 if ((iwl_queue_space(q) < q->high_mark) && priv->mac80211_registered) {
834 if (wait_write_ptr) {
835 spin_lock_irqsave(&priv->lock, flags);
836 txq->need_update = 1;
837 iwl_txq_update_write_ptr(priv, txq);
838 spin_unlock_irqrestore(&priv->lock, flags);
839 } else {
840 iwl_stop_queue(priv, txq);
841 }
842 }
843
844 return 0; 482 return 0;
845 483
846drop_unlock_sta: 484drop_unlock_sta:
@@ -997,7 +635,7 @@ int iwlagn_tx_agg_stop(struct iwl_priv *priv, struct ieee80211_vif *vif,
997 * to deactivate the uCode queue, just return "success" to allow 635 * to deactivate the uCode queue, just return "success" to allow
998 * mac80211 to clean up it own data. 636 * mac80211 to clean up it own data.
999 */ 637 */
1000 iwlagn_txq_agg_disable(priv, txq_id, ssn, tx_fifo_id); 638 trans_txq_agg_disable(&priv->trans, txq_id, ssn, tx_fifo_id);
1001 spin_unlock_irqrestore(&priv->lock, flags); 639 spin_unlock_irqrestore(&priv->lock, flags);
1002 640
1003 ieee80211_stop_tx_ba_cb_irqsafe(vif, sta->addr, tid); 641 ieee80211_stop_tx_ba_cb_irqsafe(vif, sta->addr, tid);
@@ -1026,7 +664,8 @@ int iwlagn_txq_check_empty(struct iwl_priv *priv,
1026 u16 ssn = SEQ_TO_SN(tid_data->seq_number); 664 u16 ssn = SEQ_TO_SN(tid_data->seq_number);
1027 int tx_fifo = get_fifo_from_tid(ctx, tid); 665 int tx_fifo = get_fifo_from_tid(ctx, tid);
1028 IWL_DEBUG_HT(priv, "HW queue empty: continue DELBA flow\n"); 666 IWL_DEBUG_HT(priv, "HW queue empty: continue DELBA flow\n");
1029 iwlagn_txq_agg_disable(priv, txq_id, ssn, tx_fifo); 667 trans_txq_agg_disable(&priv->trans, txq_id,
668 ssn, tx_fifo);
1030 tid_data->agg.state = IWL_AGG_OFF; 669 tid_data->agg.state = IWL_AGG_OFF;
1031 ieee80211_stop_tx_ba_cb_irqsafe(ctx->vif, addr, tid); 670 ieee80211_stop_tx_ba_cb_irqsafe(ctx->vif, addr, tid);
1032 } 671 }
diff --git a/drivers/net/wireless/iwlwifi/iwl-agn-ucode.c b/drivers/net/wireless/iwlwifi/iwl-agn-ucode.c
index 06304a681ed3..a895a099d086 100644
--- a/drivers/net/wireless/iwlwifi/iwl-agn-ucode.c
+++ b/drivers/net/wireless/iwlwifi/iwl-agn-ucode.c
@@ -41,38 +41,6 @@
41#include "iwl-agn-calib.h" 41#include "iwl-agn-calib.h"
42#include "iwl-trans.h" 42#include "iwl-trans.h"
43 43
44#define IWL_AC_UNSET -1
45
46struct queue_to_fifo_ac {
47 s8 fifo, ac;
48};
49
50static const struct queue_to_fifo_ac iwlagn_default_queue_to_tx_fifo[] = {
51 { IWL_TX_FIFO_VO, IEEE80211_AC_VO, },
52 { IWL_TX_FIFO_VI, IEEE80211_AC_VI, },
53 { IWL_TX_FIFO_BE, IEEE80211_AC_BE, },
54 { IWL_TX_FIFO_BK, IEEE80211_AC_BK, },
55 { IWLAGN_CMD_FIFO_NUM, IWL_AC_UNSET, },
56 { IWL_TX_FIFO_UNUSED, IWL_AC_UNSET, },
57 { IWL_TX_FIFO_UNUSED, IWL_AC_UNSET, },
58 { IWL_TX_FIFO_UNUSED, IWL_AC_UNSET, },
59 { IWL_TX_FIFO_UNUSED, IWL_AC_UNSET, },
60 { IWL_TX_FIFO_UNUSED, IWL_AC_UNSET, },
61};
62
63static const struct queue_to_fifo_ac iwlagn_ipan_queue_to_tx_fifo[] = {
64 { IWL_TX_FIFO_VO, IEEE80211_AC_VO, },
65 { IWL_TX_FIFO_VI, IEEE80211_AC_VI, },
66 { IWL_TX_FIFO_BE, IEEE80211_AC_BE, },
67 { IWL_TX_FIFO_BK, IEEE80211_AC_BK, },
68 { IWL_TX_FIFO_BK_IPAN, IEEE80211_AC_BK, },
69 { IWL_TX_FIFO_BE_IPAN, IEEE80211_AC_BE, },
70 { IWL_TX_FIFO_VI_IPAN, IEEE80211_AC_VI, },
71 { IWL_TX_FIFO_VO_IPAN, IEEE80211_AC_VO, },
72 { IWL_TX_FIFO_BE_IPAN, 2, },
73 { IWLAGN_CMD_FIFO_NUM, IWL_AC_UNSET, },
74};
75
76static struct iwl_wimax_coex_event_entry cu_priorities[COEX_NUM_OF_EVENTS] = { 44static struct iwl_wimax_coex_event_entry cu_priorities[COEX_NUM_OF_EVENTS] = {
77 {COEX_CU_UNASSOC_IDLE_RP, COEX_CU_UNASSOC_IDLE_WP, 45 {COEX_CU_UNASSOC_IDLE_RP, COEX_CU_UNASSOC_IDLE_WP,
78 0, COEX_UNASSOC_IDLE_FLAGS}, 46 0, COEX_UNASSOC_IDLE_FLAGS},
@@ -199,12 +167,12 @@ static int iwlagn_set_temperature_offset_calib(struct iwl_priv *priv)
199 167
200 memset(&cmd, 0, sizeof(cmd)); 168 memset(&cmd, 0, sizeof(cmd));
201 iwl_set_calib_hdr(&cmd.hdr, IWL_PHY_CALIBRATE_TEMP_OFFSET_CMD); 169 iwl_set_calib_hdr(&cmd.hdr, IWL_PHY_CALIBRATE_TEMP_OFFSET_CMD);
202 cmd.radio_sensor_offset = le16_to_cpu(offset_calib[1]); 170 memcpy(&cmd.radio_sensor_offset, offset_calib, sizeof(offset_calib));
203 if (!(cmd.radio_sensor_offset)) 171 if (!(cmd.radio_sensor_offset))
204 cmd.radio_sensor_offset = DEFAULT_RADIO_SENSOR_OFFSET; 172 cmd.radio_sensor_offset = DEFAULT_RADIO_SENSOR_OFFSET;
205 173
206 IWL_DEBUG_CALIB(priv, "Radio sensor offset: %d\n", 174 IWL_DEBUG_CALIB(priv, "Radio sensor offset: %d\n",
207 cmd.radio_sensor_offset); 175 le16_to_cpu(cmd.radio_sensor_offset));
208 return iwl_calib_set(&priv->calib_results[IWL_CALIB_TEMP_OFFSET], 176 return iwl_calib_set(&priv->calib_results[IWL_CALIB_TEMP_OFFSET],
209 (u8 *)&cmd, sizeof(cmd)); 177 (u8 *)&cmd, sizeof(cmd));
210} 178}
@@ -222,9 +190,10 @@ static int iwlagn_send_calib_cfg(struct iwl_priv *priv)
222 calib_cfg_cmd.ucd_calib_cfg.once.is_enable = IWL_CALIB_INIT_CFG_ALL; 190 calib_cfg_cmd.ucd_calib_cfg.once.is_enable = IWL_CALIB_INIT_CFG_ALL;
223 calib_cfg_cmd.ucd_calib_cfg.once.start = IWL_CALIB_INIT_CFG_ALL; 191 calib_cfg_cmd.ucd_calib_cfg.once.start = IWL_CALIB_INIT_CFG_ALL;
224 calib_cfg_cmd.ucd_calib_cfg.once.send_res = IWL_CALIB_INIT_CFG_ALL; 192 calib_cfg_cmd.ucd_calib_cfg.once.send_res = IWL_CALIB_INIT_CFG_ALL;
225 calib_cfg_cmd.ucd_calib_cfg.flags = IWL_CALIB_INIT_CFG_ALL; 193 calib_cfg_cmd.ucd_calib_cfg.flags =
194 IWL_CALIB_CFG_FLAG_SEND_COMPLETE_NTFY_MSK;
226 195
227 return trans_send_cmd(priv, &cmd); 196 return trans_send_cmd(&priv->trans, &cmd);
228} 197}
229 198
230void iwlagn_rx_calib_result(struct iwl_priv *priv, 199void iwlagn_rx_calib_result(struct iwl_priv *priv,
@@ -322,7 +291,7 @@ static int iwlagn_send_wimax_coex(struct iwl_priv *priv)
322 /* coexistence is disabled */ 291 /* coexistence is disabled */
323 memset(&coex_cmd, 0, sizeof(coex_cmd)); 292 memset(&coex_cmd, 0, sizeof(coex_cmd));
324 } 293 }
325 return trans_send_cmd_pdu(priv, 294 return trans_send_cmd_pdu(&priv->trans,
326 COEX_PRIORITY_TABLE_CMD, CMD_SYNC, 295 COEX_PRIORITY_TABLE_CMD, CMD_SYNC,
327 sizeof(coex_cmd), &coex_cmd); 296 sizeof(coex_cmd), &coex_cmd);
328} 297}
@@ -355,7 +324,7 @@ void iwlagn_send_prio_tbl(struct iwl_priv *priv)
355 324
356 memcpy(prio_tbl_cmd.prio_tbl, iwlagn_bt_prio_tbl, 325 memcpy(prio_tbl_cmd.prio_tbl, iwlagn_bt_prio_tbl,
357 sizeof(iwlagn_bt_prio_tbl)); 326 sizeof(iwlagn_bt_prio_tbl));
358 if (trans_send_cmd_pdu(priv, 327 if (trans_send_cmd_pdu(&priv->trans,
359 REPLY_BT_COEX_PRIO_TABLE, CMD_SYNC, 328 REPLY_BT_COEX_PRIO_TABLE, CMD_SYNC,
360 sizeof(prio_tbl_cmd), &prio_tbl_cmd)) 329 sizeof(prio_tbl_cmd), &prio_tbl_cmd))
361 IWL_ERR(priv, "failed to send BT prio tbl command\n"); 330 IWL_ERR(priv, "failed to send BT prio tbl command\n");
@@ -368,7 +337,7 @@ int iwlagn_send_bt_env(struct iwl_priv *priv, u8 action, u8 type)
368 337
369 env_cmd.action = action; 338 env_cmd.action = action;
370 env_cmd.type = type; 339 env_cmd.type = type;
371 ret = trans_send_cmd_pdu(priv, 340 ret = trans_send_cmd_pdu(&priv->trans,
372 REPLY_BT_COEX_PROT_ENV, CMD_SYNC, 341 REPLY_BT_COEX_PROT_ENV, CMD_SYNC,
373 sizeof(env_cmd), &env_cmd); 342 sizeof(env_cmd), &env_cmd);
374 if (ret) 343 if (ret)
@@ -379,111 +348,9 @@ int iwlagn_send_bt_env(struct iwl_priv *priv, u8 action, u8 type)
379 348
380static int iwlagn_alive_notify(struct iwl_priv *priv) 349static int iwlagn_alive_notify(struct iwl_priv *priv)
381{ 350{
382 const struct queue_to_fifo_ac *queue_to_fifo;
383 struct iwl_rxon_context *ctx;
384 u32 a;
385 unsigned long flags;
386 int i, chan;
387 u32 reg_val;
388 int ret; 351 int ret;
389 352
390 spin_lock_irqsave(&priv->lock, flags); 353 trans_tx_start(&priv->trans);
391
392 priv->scd_base_addr = iwl_read_prph(priv, IWLAGN_SCD_SRAM_BASE_ADDR);
393 a = priv->scd_base_addr + IWLAGN_SCD_CONTEXT_MEM_LOWER_BOUND;
394 /* reset conext data memory */
395 for (; a < priv->scd_base_addr + IWLAGN_SCD_CONTEXT_MEM_UPPER_BOUND;
396 a += 4)
397 iwl_write_targ_mem(priv, a, 0);
398 /* reset tx status memory */
399 for (; a < priv->scd_base_addr + IWLAGN_SCD_TX_STTS_MEM_UPPER_BOUND;
400 a += 4)
401 iwl_write_targ_mem(priv, a, 0);
402 for (; a < priv->scd_base_addr +
403 IWLAGN_SCD_TRANSLATE_TBL_OFFSET_QUEUE(priv->hw_params.max_txq_num); a += 4)
404 iwl_write_targ_mem(priv, a, 0);
405
406 iwl_write_prph(priv, IWLAGN_SCD_DRAM_BASE_ADDR,
407 priv->scd_bc_tbls.dma >> 10);
408
409 /* Enable DMA channel */
410 for (chan = 0; chan < FH_TCSR_CHNL_NUM ; chan++)
411 iwl_write_direct32(priv, FH_TCSR_CHNL_TX_CONFIG_REG(chan),
412 FH_TCSR_TX_CONFIG_REG_VAL_DMA_CHNL_ENABLE |
413 FH_TCSR_TX_CONFIG_REG_VAL_DMA_CREDIT_ENABLE);
414
415 /* Update FH chicken bits */
416 reg_val = iwl_read_direct32(priv, FH_TX_CHICKEN_BITS_REG);
417 iwl_write_direct32(priv, FH_TX_CHICKEN_BITS_REG,
418 reg_val | FH_TX_CHICKEN_BITS_SCD_AUTO_RETRY_EN);
419
420 iwl_write_prph(priv, IWLAGN_SCD_QUEUECHAIN_SEL,
421 IWLAGN_SCD_QUEUECHAIN_SEL_ALL(priv));
422 iwl_write_prph(priv, IWLAGN_SCD_AGGR_SEL, 0);
423
424 /* initiate the queues */
425 for (i = 0; i < priv->hw_params.max_txq_num; i++) {
426 iwl_write_prph(priv, IWLAGN_SCD_QUEUE_RDPTR(i), 0);
427 iwl_write_direct32(priv, HBUS_TARG_WRPTR, 0 | (i << 8));
428 iwl_write_targ_mem(priv, priv->scd_base_addr +
429 IWLAGN_SCD_CONTEXT_QUEUE_OFFSET(i), 0);
430 iwl_write_targ_mem(priv, priv->scd_base_addr +
431 IWLAGN_SCD_CONTEXT_QUEUE_OFFSET(i) +
432 sizeof(u32),
433 ((SCD_WIN_SIZE <<
434 IWLAGN_SCD_QUEUE_CTX_REG2_WIN_SIZE_POS) &
435 IWLAGN_SCD_QUEUE_CTX_REG2_WIN_SIZE_MSK) |
436 ((SCD_FRAME_LIMIT <<
437 IWLAGN_SCD_QUEUE_CTX_REG2_FRAME_LIMIT_POS) &
438 IWLAGN_SCD_QUEUE_CTX_REG2_FRAME_LIMIT_MSK));
439 }
440
441 iwl_write_prph(priv, IWLAGN_SCD_INTERRUPT_MASK,
442 IWL_MASK(0, priv->hw_params.max_txq_num));
443
444 /* Activate all Tx DMA/FIFO channels */
445 iwlagn_txq_set_sched(priv, IWL_MASK(0, 7));
446
447 /* map queues to FIFOs */
448 if (priv->valid_contexts != BIT(IWL_RXON_CTX_BSS))
449 queue_to_fifo = iwlagn_ipan_queue_to_tx_fifo;
450 else
451 queue_to_fifo = iwlagn_default_queue_to_tx_fifo;
452
453 iwlagn_set_wr_ptrs(priv, priv->cmd_queue, 0);
454
455 /* make sure all queue are not stopped */
456 memset(&priv->queue_stopped[0], 0, sizeof(priv->queue_stopped));
457 for (i = 0; i < 4; i++)
458 atomic_set(&priv->queue_stop_count[i], 0);
459 for_each_context(priv, ctx)
460 ctx->last_tx_rejected = false;
461
462 /* reset to 0 to enable all the queue first */
463 priv->txq_ctx_active_msk = 0;
464
465 BUILD_BUG_ON(ARRAY_SIZE(iwlagn_default_queue_to_tx_fifo) != 10);
466 BUILD_BUG_ON(ARRAY_SIZE(iwlagn_ipan_queue_to_tx_fifo) != 10);
467
468 for (i = 0; i < 10; i++) {
469 int fifo = queue_to_fifo[i].fifo;
470 int ac = queue_to_fifo[i].ac;
471
472 iwl_txq_ctx_activate(priv, i);
473
474 if (fifo == IWL_TX_FIFO_UNUSED)
475 continue;
476
477 if (ac != IWL_AC_UNSET)
478 iwl_set_swq_id(&priv->txq[i], ac, i);
479 iwlagn_tx_queue_set_status(priv, &priv->txq[i], fifo, 0);
480 }
481
482 spin_unlock_irqrestore(&priv->lock, flags);
483
484 /* Enable L1-Active */
485 iwl_clear_bits_prph(priv, APMG_PCIDEV_STT_REG,
486 APMG_PCIDEV_STT_VAL_L1_ACT_DIS);
487 354
488 ret = iwlagn_send_wimax_coex(priv); 355 ret = iwlagn_send_wimax_coex(priv);
489 if (ret) 356 if (ret)
@@ -611,7 +478,7 @@ int iwlagn_load_ucode_wait_alive(struct iwl_priv *priv,
611 int ret; 478 int ret;
612 enum iwlagn_ucode_type old_type; 479 enum iwlagn_ucode_type old_type;
613 480
614 ret = iwlagn_start_device(priv); 481 ret = trans_start_device(&priv->trans);
615 if (ret) 482 if (ret)
616 return ret; 483 return ret;
617 484
@@ -628,8 +495,7 @@ int iwlagn_load_ucode_wait_alive(struct iwl_priv *priv,
628 return ret; 495 return ret;
629 } 496 }
630 497
631 /* Remove all resets to allow NIC to operate */ 498 trans_kick_nic(&priv->trans);
632 iwl_write32(priv, CSR_RESET, 0);
633 499
634 /* 500 /*
635 * Some things may run in the background now, but we 501 * Some things may run in the background now, but we
@@ -647,14 +513,21 @@ int iwlagn_load_ucode_wait_alive(struct iwl_priv *priv,
647 return -EIO; 513 return -EIO;
648 } 514 }
649 515
650 ret = iwl_verify_ucode(priv, image); 516 /*
651 if (ret) { 517 * This step takes a long time (60-80ms!!) and
652 priv->ucode_type = old_type; 518 * WoWLAN image should be loaded quickly, so
653 return ret; 519 * skip it for WoWLAN.
654 } 520 */
521 if (ucode_type != IWL_UCODE_WOWLAN) {
522 ret = iwl_verify_ucode(priv, image);
523 if (ret) {
524 priv->ucode_type = old_type;
525 return ret;
526 }
655 527
656 /* delay a bit to give rfkill time to run */ 528 /* delay a bit to give rfkill time to run */
657 msleep(5); 529 msleep(5);
530 }
658 531
659 ret = iwlagn_alive_notify(priv); 532 ret = iwlagn_alive_notify(priv);
660 if (ret) { 533 if (ret) {
@@ -707,6 +580,6 @@ int iwlagn_run_init_ucode(struct iwl_priv *priv)
707 iwlagn_remove_notification(priv, &calib_wait); 580 iwlagn_remove_notification(priv, &calib_wait);
708 out: 581 out:
709 /* Whatever happened, stop the device */ 582 /* Whatever happened, stop the device */
710 iwlagn_stop_device(priv); 583 trans_stop_device(&priv->trans);
711 return ret; 584 return ret;
712} 585}
diff --git a/drivers/net/wireless/iwlwifi/iwl-agn.c b/drivers/net/wireless/iwlwifi/iwl-agn.c
index 38a1e4f58829..4b666b7dfe60 100644
--- a/drivers/net/wireless/iwlwifi/iwl-agn.c
+++ b/drivers/net/wireless/iwlwifi/iwl-agn.c
@@ -26,9 +26,6 @@
26 * Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497 26 * Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
27 * 27 *
28 *****************************************************************************/ 28 *****************************************************************************/
29
30#define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
31
32#include <linux/kernel.h> 29#include <linux/kernel.h>
33#include <linux/module.h> 30#include <linux/module.h>
34#include <linux/init.h> 31#include <linux/init.h>
@@ -55,7 +52,7 @@
55#include "iwl-sta.h" 52#include "iwl-sta.h"
56#include "iwl-agn-calib.h" 53#include "iwl-agn-calib.h"
57#include "iwl-agn.h" 54#include "iwl-agn.h"
58#include "iwl-pci.h" 55#include "iwl-bus.h"
59#include "iwl-trans.h" 56#include "iwl-trans.h"
60 57
61/****************************************************************************** 58/******************************************************************************
@@ -206,7 +203,7 @@ int iwlagn_send_beacon_cmd(struct iwl_priv *priv)
206 cmd.data[1] = priv->beacon_skb->data; 203 cmd.data[1] = priv->beacon_skb->data;
207 cmd.dataflags[1] = IWL_HCMD_DFL_NOCOPY; 204 cmd.dataflags[1] = IWL_HCMD_DFL_NOCOPY;
208 205
209 return trans_send_cmd(priv, &cmd); 206 return trans_send_cmd(&priv->trans, &cmd);
210} 207}
211 208
212static void iwl_bg_beacon_update(struct work_struct *work) 209static void iwl_bg_beacon_update(struct work_struct *work)
@@ -375,7 +372,7 @@ static void iwl_continuous_event_trace(struct iwl_priv *priv)
375 u32 next_entry; /* index of next entry to be written by uCode */ 372 u32 next_entry; /* index of next entry to be written by uCode */
376 373
377 base = priv->device_pointers.error_event_table; 374 base = priv->device_pointers.error_event_table;
378 if (priv->cfg->ops->lib->is_valid_rtc_data_addr(base)) { 375 if (iwlagn_hw_valid_rtc_data_addr(base)) {
379 capacity = iwl_read_targ_mem(priv, base); 376 capacity = iwl_read_targ_mem(priv, base);
380 num_wraps = iwl_read_targ_mem(priv, base + (2 * sizeof(u32))); 377 num_wraps = iwl_read_targ_mem(priv, base + (2 * sizeof(u32)));
381 mode = iwl_read_targ_mem(priv, base + (1 * sizeof(u32))); 378 mode = iwl_read_targ_mem(priv, base + (1 * sizeof(u32)));
@@ -457,380 +454,6 @@ static void iwl_bg_tx_flush(struct work_struct *work)
457 iwlagn_dev_txfifo_flush(priv, IWL_DROP_ALL); 454 iwlagn_dev_txfifo_flush(priv, IWL_DROP_ALL);
458} 455}
459 456
460/**
461 * iwl_rx_handle - Main entry function for receiving responses from uCode
462 *
463 * Uses the priv->rx_handlers callback function array to invoke
464 * the appropriate handlers, including command responses,
465 * frame-received notifications, and other notifications.
466 */
467static void iwl_rx_handle(struct iwl_priv *priv)
468{
469 struct iwl_rx_mem_buffer *rxb;
470 struct iwl_rx_packet *pkt;
471 struct iwl_rx_queue *rxq = &priv->rxq;
472 u32 r, i;
473 int reclaim;
474 unsigned long flags;
475 u8 fill_rx = 0;
476 u32 count = 8;
477 int total_empty;
478
479 /* uCode's read index (stored in shared DRAM) indicates the last Rx
480 * buffer that the driver may process (last buffer filled by ucode). */
481 r = le16_to_cpu(rxq->rb_stts->closed_rb_num) & 0x0FFF;
482 i = rxq->read;
483
484 /* Rx interrupt, but nothing sent from uCode */
485 if (i == r)
486 IWL_DEBUG_RX(priv, "r = %d, i = %d\n", r, i);
487
488 /* calculate total frames need to be restock after handling RX */
489 total_empty = r - rxq->write_actual;
490 if (total_empty < 0)
491 total_empty += RX_QUEUE_SIZE;
492
493 if (total_empty > (RX_QUEUE_SIZE / 2))
494 fill_rx = 1;
495
496 while (i != r) {
497 int len;
498
499 rxb = rxq->queue[i];
500
501 /* If an RXB doesn't have a Rx queue slot associated with it,
502 * then a bug has been introduced in the queue refilling
503 * routines -- catch it here */
504 if (WARN_ON(rxb == NULL)) {
505 i = (i + 1) & RX_QUEUE_MASK;
506 continue;
507 }
508
509 rxq->queue[i] = NULL;
510
511 dma_unmap_page(priv->bus.dev, rxb->page_dma,
512 PAGE_SIZE << priv->hw_params.rx_page_order,
513 DMA_FROM_DEVICE);
514 pkt = rxb_addr(rxb);
515
516 len = le32_to_cpu(pkt->len_n_flags) & FH_RSCSR_FRAME_SIZE_MSK;
517 len += sizeof(u32); /* account for status word */
518 trace_iwlwifi_dev_rx(priv, pkt, len);
519
520 /* Reclaim a command buffer only if this packet is a response
521 * to a (driver-originated) command.
522 * If the packet (e.g. Rx frame) originated from uCode,
523 * there is no command buffer to reclaim.
524 * Ucode should set SEQ_RX_FRAME bit if ucode-originated,
525 * but apparently a few don't get set; catch them here. */
526 reclaim = !(pkt->hdr.sequence & SEQ_RX_FRAME) &&
527 (pkt->hdr.cmd != REPLY_RX_PHY_CMD) &&
528 (pkt->hdr.cmd != REPLY_RX) &&
529 (pkt->hdr.cmd != REPLY_RX_MPDU_CMD) &&
530 (pkt->hdr.cmd != REPLY_COMPRESSED_BA) &&
531 (pkt->hdr.cmd != STATISTICS_NOTIFICATION) &&
532 (pkt->hdr.cmd != REPLY_TX);
533
534 /*
535 * Do the notification wait before RX handlers so
536 * even if the RX handler consumes the RXB we have
537 * access to it in the notification wait entry.
538 */
539 if (!list_empty(&priv->_agn.notif_waits)) {
540 struct iwl_notification_wait *w;
541
542 spin_lock(&priv->_agn.notif_wait_lock);
543 list_for_each_entry(w, &priv->_agn.notif_waits, list) {
544 if (w->cmd == pkt->hdr.cmd) {
545 w->triggered = true;
546 if (w->fn)
547 w->fn(priv, pkt, w->fn_data);
548 }
549 }
550 spin_unlock(&priv->_agn.notif_wait_lock);
551
552 wake_up_all(&priv->_agn.notif_waitq);
553 }
554 if (priv->pre_rx_handler)
555 priv->pre_rx_handler(priv, rxb);
556
557 /* Based on type of command response or notification,
558 * handle those that need handling via function in
559 * rx_handlers table. See iwl_setup_rx_handlers() */
560 if (priv->rx_handlers[pkt->hdr.cmd]) {
561 IWL_DEBUG_RX(priv, "r = %d, i = %d, %s, 0x%02x\n", r,
562 i, get_cmd_string(pkt->hdr.cmd), pkt->hdr.cmd);
563 priv->isr_stats.rx_handlers[pkt->hdr.cmd]++;
564 priv->rx_handlers[pkt->hdr.cmd] (priv, rxb);
565 } else {
566 /* No handling needed */
567 IWL_DEBUG_RX(priv,
568 "r %d i %d No handler needed for %s, 0x%02x\n",
569 r, i, get_cmd_string(pkt->hdr.cmd),
570 pkt->hdr.cmd);
571 }
572
573 /*
574 * XXX: After here, we should always check rxb->page
575 * against NULL before touching it or its virtual
576 * memory (pkt). Because some rx_handler might have
577 * already taken or freed the pages.
578 */
579
580 if (reclaim) {
581 /* Invoke any callbacks, transfer the buffer to caller,
582 * and fire off the (possibly) blocking
583 * trans_send_cmd()
584 * as we reclaim the driver command queue */
585 if (rxb->page)
586 iwl_tx_cmd_complete(priv, rxb);
587 else
588 IWL_WARN(priv, "Claim null rxb?\n");
589 }
590
591 /* Reuse the page if possible. For notification packets and
592 * SKBs that fail to Rx correctly, add them back into the
593 * rx_free list for reuse later. */
594 spin_lock_irqsave(&rxq->lock, flags);
595 if (rxb->page != NULL) {
596 rxb->page_dma = dma_map_page(priv->bus.dev, rxb->page,
597 0, PAGE_SIZE << priv->hw_params.rx_page_order,
598 DMA_FROM_DEVICE);
599 list_add_tail(&rxb->list, &rxq->rx_free);
600 rxq->free_count++;
601 } else
602 list_add_tail(&rxb->list, &rxq->rx_used);
603
604 spin_unlock_irqrestore(&rxq->lock, flags);
605
606 i = (i + 1) & RX_QUEUE_MASK;
607 /* If there are a lot of unused frames,
608 * restock the Rx queue so ucode wont assert. */
609 if (fill_rx) {
610 count++;
611 if (count >= 8) {
612 rxq->read = i;
613 iwlagn_rx_replenish_now(priv);
614 count = 0;
615 }
616 }
617 }
618
619 /* Backtrack one entry */
620 rxq->read = i;
621 if (fill_rx)
622 iwlagn_rx_replenish_now(priv);
623 else
624 iwlagn_rx_queue_restock(priv);
625}
626
627/* tasklet for iwlagn interrupt */
628static void iwl_irq_tasklet(struct iwl_priv *priv)
629{
630 u32 inta = 0;
631 u32 handled = 0;
632 unsigned long flags;
633 u32 i;
634#ifdef CONFIG_IWLWIFI_DEBUG
635 u32 inta_mask;
636#endif
637
638 spin_lock_irqsave(&priv->lock, flags);
639
640 /* Ack/clear/reset pending uCode interrupts.
641 * Note: Some bits in CSR_INT are "OR" of bits in CSR_FH_INT_STATUS,
642 */
643 /* There is a hardware bug in the interrupt mask function that some
644 * interrupts (i.e. CSR_INT_BIT_SCD) can still be generated even if
645 * they are disabled in the CSR_INT_MASK register. Furthermore the
646 * ICT interrupt handling mechanism has another bug that might cause
647 * these unmasked interrupts fail to be detected. We workaround the
648 * hardware bugs here by ACKing all the possible interrupts so that
649 * interrupt coalescing can still be achieved.
650 */
651 iwl_write32(priv, CSR_INT, priv->_agn.inta | ~priv->inta_mask);
652
653 inta = priv->_agn.inta;
654
655#ifdef CONFIG_IWLWIFI_DEBUG
656 if (iwl_get_debug_level(priv) & IWL_DL_ISR) {
657 /* just for debug */
658 inta_mask = iwl_read32(priv, CSR_INT_MASK);
659 IWL_DEBUG_ISR(priv, "inta 0x%08x, enabled 0x%08x\n ",
660 inta, inta_mask);
661 }
662#endif
663
664 spin_unlock_irqrestore(&priv->lock, flags);
665
666 /* saved interrupt in inta variable now we can reset priv->_agn.inta */
667 priv->_agn.inta = 0;
668
669 /* Now service all interrupt bits discovered above. */
670 if (inta & CSR_INT_BIT_HW_ERR) {
671 IWL_ERR(priv, "Hardware error detected. Restarting.\n");
672
673 /* Tell the device to stop sending interrupts */
674 iwl_disable_interrupts(priv);
675
676 priv->isr_stats.hw++;
677 iwl_irq_handle_error(priv);
678
679 handled |= CSR_INT_BIT_HW_ERR;
680
681 return;
682 }
683
684#ifdef CONFIG_IWLWIFI_DEBUG
685 if (iwl_get_debug_level(priv) & (IWL_DL_ISR)) {
686 /* NIC fires this, but we don't use it, redundant with WAKEUP */
687 if (inta & CSR_INT_BIT_SCD) {
688 IWL_DEBUG_ISR(priv, "Scheduler finished to transmit "
689 "the frame/frames.\n");
690 priv->isr_stats.sch++;
691 }
692
693 /* Alive notification via Rx interrupt will do the real work */
694 if (inta & CSR_INT_BIT_ALIVE) {
695 IWL_DEBUG_ISR(priv, "Alive interrupt\n");
696 priv->isr_stats.alive++;
697 }
698 }
699#endif
700 /* Safely ignore these bits for debug checks below */
701 inta &= ~(CSR_INT_BIT_SCD | CSR_INT_BIT_ALIVE);
702
703 /* HW RF KILL switch toggled */
704 if (inta & CSR_INT_BIT_RF_KILL) {
705 int hw_rf_kill = 0;
706 if (!(iwl_read32(priv, CSR_GP_CNTRL) &
707 CSR_GP_CNTRL_REG_FLAG_HW_RF_KILL_SW))
708 hw_rf_kill = 1;
709
710 IWL_WARN(priv, "RF_KILL bit toggled to %s.\n",
711 hw_rf_kill ? "disable radio" : "enable radio");
712
713 priv->isr_stats.rfkill++;
714
715 /* driver only loads ucode once setting the interface up.
716 * the driver allows loading the ucode even if the radio
717 * is killed. Hence update the killswitch state here. The
718 * rfkill handler will care about restarting if needed.
719 */
720 if (!test_bit(STATUS_ALIVE, &priv->status)) {
721 if (hw_rf_kill)
722 set_bit(STATUS_RF_KILL_HW, &priv->status);
723 else
724 clear_bit(STATUS_RF_KILL_HW, &priv->status);
725 wiphy_rfkill_set_hw_state(priv->hw->wiphy, hw_rf_kill);
726 }
727
728 handled |= CSR_INT_BIT_RF_KILL;
729 }
730
731 /* Chip got too hot and stopped itself */
732 if (inta & CSR_INT_BIT_CT_KILL) {
733 IWL_ERR(priv, "Microcode CT kill error detected.\n");
734 priv->isr_stats.ctkill++;
735 handled |= CSR_INT_BIT_CT_KILL;
736 }
737
738 /* Error detected by uCode */
739 if (inta & CSR_INT_BIT_SW_ERR) {
740 IWL_ERR(priv, "Microcode SW error detected. "
741 " Restarting 0x%X.\n", inta);
742 priv->isr_stats.sw++;
743 iwl_irq_handle_error(priv);
744 handled |= CSR_INT_BIT_SW_ERR;
745 }
746
747 /* uCode wakes up after power-down sleep */
748 if (inta & CSR_INT_BIT_WAKEUP) {
749 IWL_DEBUG_ISR(priv, "Wakeup interrupt\n");
750 iwl_rx_queue_update_write_ptr(priv, &priv->rxq);
751 for (i = 0; i < priv->hw_params.max_txq_num; i++)
752 iwl_txq_update_write_ptr(priv, &priv->txq[i]);
753
754 priv->isr_stats.wakeup++;
755
756 handled |= CSR_INT_BIT_WAKEUP;
757 }
758
759 /* All uCode command responses, including Tx command responses,
760 * Rx "responses" (frame-received notification), and other
761 * notifications from uCode come through here*/
762 if (inta & (CSR_INT_BIT_FH_RX | CSR_INT_BIT_SW_RX |
763 CSR_INT_BIT_RX_PERIODIC)) {
764 IWL_DEBUG_ISR(priv, "Rx interrupt\n");
765 if (inta & (CSR_INT_BIT_FH_RX | CSR_INT_BIT_SW_RX)) {
766 handled |= (CSR_INT_BIT_FH_RX | CSR_INT_BIT_SW_RX);
767 iwl_write32(priv, CSR_FH_INT_STATUS,
768 CSR_FH_INT_RX_MASK);
769 }
770 if (inta & CSR_INT_BIT_RX_PERIODIC) {
771 handled |= CSR_INT_BIT_RX_PERIODIC;
772 iwl_write32(priv, CSR_INT, CSR_INT_BIT_RX_PERIODIC);
773 }
774 /* Sending RX interrupt require many steps to be done in the
775 * the device:
776 * 1- write interrupt to current index in ICT table.
777 * 2- dma RX frame.
778 * 3- update RX shared data to indicate last write index.
779 * 4- send interrupt.
780 * This could lead to RX race, driver could receive RX interrupt
781 * but the shared data changes does not reflect this;
782 * periodic interrupt will detect any dangling Rx activity.
783 */
784
785 /* Disable periodic interrupt; we use it as just a one-shot. */
786 iwl_write8(priv, CSR_INT_PERIODIC_REG,
787 CSR_INT_PERIODIC_DIS);
788 iwl_rx_handle(priv);
789
790 /*
791 * Enable periodic interrupt in 8 msec only if we received
792 * real RX interrupt (instead of just periodic int), to catch
793 * any dangling Rx interrupt. If it was just the periodic
794 * interrupt, there was no dangling Rx activity, and no need
795 * to extend the periodic interrupt; one-shot is enough.
796 */
797 if (inta & (CSR_INT_BIT_FH_RX | CSR_INT_BIT_SW_RX))
798 iwl_write8(priv, CSR_INT_PERIODIC_REG,
799 CSR_INT_PERIODIC_ENA);
800
801 priv->isr_stats.rx++;
802 }
803
804 /* This "Tx" DMA channel is used only for loading uCode */
805 if (inta & CSR_INT_BIT_FH_TX) {
806 iwl_write32(priv, CSR_FH_INT_STATUS, CSR_FH_INT_TX_MASK);
807 IWL_DEBUG_ISR(priv, "uCode load interrupt\n");
808 priv->isr_stats.tx++;
809 handled |= CSR_INT_BIT_FH_TX;
810 /* Wake up uCode load routine, now that load is complete */
811 priv->ucode_write_complete = 1;
812 wake_up_interruptible(&priv->wait_command_queue);
813 }
814
815 if (inta & ~handled) {
816 IWL_ERR(priv, "Unhandled INTA bits 0x%08x\n", inta & ~handled);
817 priv->isr_stats.unhandled++;
818 }
819
820 if (inta & ~(priv->inta_mask)) {
821 IWL_WARN(priv, "Disabled INTA bits 0x%08x were pending\n",
822 inta & ~priv->inta_mask);
823 }
824
825 /* Re-enable all interrupts */
826 /* only Re-enable if disabled by irq */
827 if (test_bit(STATUS_INT_ENABLED, &priv->status))
828 iwl_enable_interrupts(priv);
829 /* Re-enable RF_KILL if it occurred */
830 else if (handled & CSR_INT_BIT_RF_KILL)
831 iwl_enable_rfkill_int(priv);
832}
833
834/***************************************************************************** 457/*****************************************************************************
835 * 458 *
836 * sysfs attributes 459 * sysfs attributes
@@ -954,7 +577,7 @@ static struct attribute_group iwl_attribute_group = {
954static void iwl_free_fw_desc(struct iwl_priv *priv, struct fw_desc *desc) 577static void iwl_free_fw_desc(struct iwl_priv *priv, struct fw_desc *desc)
955{ 578{
956 if (desc->v_addr) 579 if (desc->v_addr)
957 dma_free_coherent(priv->bus.dev, desc->len, 580 dma_free_coherent(priv->bus->dev, desc->len,
958 desc->v_addr, desc->p_addr); 581 desc->v_addr, desc->p_addr);
959 desc->v_addr = NULL; 582 desc->v_addr = NULL;
960 desc->len = 0; 583 desc->len = 0;
@@ -970,6 +593,7 @@ static void iwl_dealloc_ucode(struct iwl_priv *priv)
970{ 593{
971 iwl_free_fw_img(priv, &priv->ucode_rt); 594 iwl_free_fw_img(priv, &priv->ucode_rt);
972 iwl_free_fw_img(priv, &priv->ucode_init); 595 iwl_free_fw_img(priv, &priv->ucode_init);
596 iwl_free_fw_img(priv, &priv->ucode_wowlan);
973} 597}
974 598
975static int iwl_alloc_fw_desc(struct iwl_priv *priv, struct fw_desc *desc, 599static int iwl_alloc_fw_desc(struct iwl_priv *priv, struct fw_desc *desc,
@@ -980,7 +604,7 @@ static int iwl_alloc_fw_desc(struct iwl_priv *priv, struct fw_desc *desc,
980 return -EINVAL; 604 return -EINVAL;
981 } 605 }
982 606
983 desc->v_addr = dma_alloc_coherent(priv->bus.dev, len, 607 desc->v_addr = dma_alloc_coherent(priv->bus->dev, len,
984 &desc->p_addr, GFP_KERNEL); 608 &desc->p_addr, GFP_KERNEL);
985 if (!desc->v_addr) 609 if (!desc->v_addr)
986 return -ENOMEM; 610 return -ENOMEM;
@@ -1034,13 +658,14 @@ static int __must_check iwl_request_firmware(struct iwl_priv *priv, bool first)
1034 priv->firmware_name); 658 priv->firmware_name);
1035 659
1036 return request_firmware_nowait(THIS_MODULE, 1, priv->firmware_name, 660 return request_firmware_nowait(THIS_MODULE, 1, priv->firmware_name,
1037 priv->bus.dev, 661 priv->bus->dev,
1038 GFP_KERNEL, priv, iwl_ucode_callback); 662 GFP_KERNEL, priv, iwl_ucode_callback);
1039} 663}
1040 664
1041struct iwlagn_firmware_pieces { 665struct iwlagn_firmware_pieces {
1042 const void *inst, *data, *init, *init_data; 666 const void *inst, *data, *init, *init_data, *wowlan_inst, *wowlan_data;
1043 size_t inst_size, data_size, init_size, init_data_size; 667 size_t inst_size, data_size, init_size, init_data_size,
668 wowlan_inst_size, wowlan_data_size;
1044 669
1045 u32 build; 670 u32 build;
1046 671
@@ -1279,6 +904,14 @@ static int iwlagn_load_firmware(struct iwl_priv *priv,
1279 goto invalid_tlv_len; 904 goto invalid_tlv_len;
1280 priv->enhance_sensitivity_table = true; 905 priv->enhance_sensitivity_table = true;
1281 break; 906 break;
907 case IWL_UCODE_TLV_WOWLAN_INST:
908 pieces->wowlan_inst = tlv_data;
909 pieces->wowlan_inst_size = tlv_len;
910 break;
911 case IWL_UCODE_TLV_WOWLAN_DATA:
912 pieces->wowlan_data = tlv_data;
913 pieces->wowlan_data_size = tlv_len;
914 break;
1282 case IWL_UCODE_TLV_PHY_CALIBRATION_SIZE: 915 case IWL_UCODE_TLV_PHY_CALIBRATION_SIZE:
1283 if (tlv_len != sizeof(u32)) 916 if (tlv_len != sizeof(u32))
1284 goto invalid_tlv_len; 917 goto invalid_tlv_len;
@@ -1473,6 +1106,18 @@ static void iwl_ucode_callback(const struct firmware *ucode_raw, void *context)
1473 goto err_pci_alloc; 1106 goto err_pci_alloc;
1474 } 1107 }
1475 1108
1109 /* WoWLAN instructions and data */
1110 if (pieces.wowlan_inst_size && pieces.wowlan_data_size) {
1111 if (iwl_alloc_fw_desc(priv, &priv->ucode_wowlan.code,
1112 pieces.wowlan_inst,
1113 pieces.wowlan_inst_size))
1114 goto err_pci_alloc;
1115 if (iwl_alloc_fw_desc(priv, &priv->ucode_wowlan.data,
1116 pieces.wowlan_data,
1117 pieces.wowlan_data_size))
1118 goto err_pci_alloc;
1119 }
1120
1476 /* Now that we can no longer fail, copy information */ 1121 /* Now that we can no longer fail, copy information */
1477 1122
1478 /* 1123 /*
@@ -1480,20 +1125,20 @@ static void iwl_ucode_callback(const struct firmware *ucode_raw, void *context)
1480 * for each event, which is of mode 1 (including timestamp) for all 1125 * for each event, which is of mode 1 (including timestamp) for all
1481 * new microcodes that include this information. 1126 * new microcodes that include this information.
1482 */ 1127 */
1483 priv->_agn.init_evtlog_ptr = pieces.init_evtlog_ptr; 1128 priv->init_evtlog_ptr = pieces.init_evtlog_ptr;
1484 if (pieces.init_evtlog_size) 1129 if (pieces.init_evtlog_size)
1485 priv->_agn.init_evtlog_size = (pieces.init_evtlog_size - 16)/12; 1130 priv->init_evtlog_size = (pieces.init_evtlog_size - 16)/12;
1486 else 1131 else
1487 priv->_agn.init_evtlog_size = 1132 priv->init_evtlog_size =
1488 priv->cfg->base_params->max_event_log_size; 1133 priv->cfg->base_params->max_event_log_size;
1489 priv->_agn.init_errlog_ptr = pieces.init_errlog_ptr; 1134 priv->init_errlog_ptr = pieces.init_errlog_ptr;
1490 priv->_agn.inst_evtlog_ptr = pieces.inst_evtlog_ptr; 1135 priv->inst_evtlog_ptr = pieces.inst_evtlog_ptr;
1491 if (pieces.inst_evtlog_size) 1136 if (pieces.inst_evtlog_size)
1492 priv->_agn.inst_evtlog_size = (pieces.inst_evtlog_size - 16)/12; 1137 priv->inst_evtlog_size = (pieces.inst_evtlog_size - 16)/12;
1493 else 1138 else
1494 priv->_agn.inst_evtlog_size = 1139 priv->inst_evtlog_size =
1495 priv->cfg->base_params->max_event_log_size; 1140 priv->cfg->base_params->max_event_log_size;
1496 priv->_agn.inst_errlog_ptr = pieces.inst_errlog_ptr; 1141 priv->inst_errlog_ptr = pieces.inst_errlog_ptr;
1497 1142
1498 priv->new_scan_threshold_behaviour = 1143 priv->new_scan_threshold_behaviour =
1499 !!(ucode_capa.flags & IWL_UCODE_TLV_FLAGS_NEWSCAN); 1144 !!(ucode_capa.flags & IWL_UCODE_TLV_FLAGS_NEWSCAN);
@@ -1519,9 +1164,9 @@ static void iwl_ucode_callback(const struct firmware *ucode_raw, void *context)
1519 ucode_capa.standard_phy_calibration_size = 1164 ucode_capa.standard_phy_calibration_size =
1520 IWL_MAX_STANDARD_PHY_CALIBRATE_TBL_SIZE; 1165 IWL_MAX_STANDARD_PHY_CALIBRATE_TBL_SIZE;
1521 1166
1522 priv->_agn.phy_calib_chain_noise_reset_cmd = 1167 priv->phy_calib_chain_noise_reset_cmd =
1523 ucode_capa.standard_phy_calibration_size; 1168 ucode_capa.standard_phy_calibration_size;
1524 priv->_agn.phy_calib_chain_noise_gain_cmd = 1169 priv->phy_calib_chain_noise_gain_cmd =
1525 ucode_capa.standard_phy_calibration_size + 1; 1170 ucode_capa.standard_phy_calibration_size + 1;
1526 1171
1527 /************************************************** 1172 /**************************************************
@@ -1537,7 +1182,7 @@ static void iwl_ucode_callback(const struct firmware *ucode_raw, void *context)
1537 if (err) 1182 if (err)
1538 IWL_ERR(priv, "failed to create debugfs files. Ignoring error: %d\n", err); 1183 IWL_ERR(priv, "failed to create debugfs files. Ignoring error: %d\n", err);
1539 1184
1540 err = sysfs_create_group(&(priv->bus.dev->kobj), 1185 err = sysfs_create_group(&(priv->bus->dev->kobj),
1541 &iwl_attribute_group); 1186 &iwl_attribute_group);
1542 if (err) { 1187 if (err) {
1543 IWL_ERR(priv, "failed to create sysfs device attributes\n"); 1188 IWL_ERR(priv, "failed to create sysfs device attributes\n");
@@ -1546,7 +1191,7 @@ static void iwl_ucode_callback(const struct firmware *ucode_raw, void *context)
1546 1191
1547 /* We have our copies now, allow OS release its copies */ 1192 /* We have our copies now, allow OS release its copies */
1548 release_firmware(ucode_raw); 1193 release_firmware(ucode_raw);
1549 complete(&priv->_agn.firmware_loading_complete); 1194 complete(&priv->firmware_loading_complete);
1550 return; 1195 return;
1551 1196
1552 try_again: 1197 try_again:
@@ -1560,8 +1205,8 @@ static void iwl_ucode_callback(const struct firmware *ucode_raw, void *context)
1560 IWL_ERR(priv, "failed to allocate pci memory\n"); 1205 IWL_ERR(priv, "failed to allocate pci memory\n");
1561 iwl_dealloc_ucode(priv); 1206 iwl_dealloc_ucode(priv);
1562 out_unbind: 1207 out_unbind:
1563 complete(&priv->_agn.firmware_loading_complete); 1208 complete(&priv->firmware_loading_complete);
1564 device_release_driver(priv->bus.dev); 1209 device_release_driver(priv->bus->dev);
1565 release_firmware(ucode_raw); 1210 release_firmware(ucode_raw);
1566} 1211}
1567 1212
@@ -1642,13 +1287,13 @@ void iwl_dump_nic_error_log(struct iwl_priv *priv)
1642 base = priv->device_pointers.error_event_table; 1287 base = priv->device_pointers.error_event_table;
1643 if (priv->ucode_type == IWL_UCODE_INIT) { 1288 if (priv->ucode_type == IWL_UCODE_INIT) {
1644 if (!base) 1289 if (!base)
1645 base = priv->_agn.init_errlog_ptr; 1290 base = priv->init_errlog_ptr;
1646 } else { 1291 } else {
1647 if (!base) 1292 if (!base)
1648 base = priv->_agn.inst_errlog_ptr; 1293 base = priv->inst_errlog_ptr;
1649 } 1294 }
1650 1295
1651 if (!priv->cfg->ops->lib->is_valid_rtc_data_addr(base)) { 1296 if (!iwlagn_hw_valid_rtc_data_addr(base)) {
1652 IWL_ERR(priv, 1297 IWL_ERR(priv,
1653 "Not valid error log pointer 0x%08X for %s uCode\n", 1298 "Not valid error log pointer 0x%08X for %s uCode\n",
1654 base, 1299 base,
@@ -1718,10 +1363,10 @@ static int iwl_print_event_log(struct iwl_priv *priv, u32 start_idx,
1718 base = priv->device_pointers.log_event_table; 1363 base = priv->device_pointers.log_event_table;
1719 if (priv->ucode_type == IWL_UCODE_INIT) { 1364 if (priv->ucode_type == IWL_UCODE_INIT) {
1720 if (!base) 1365 if (!base)
1721 base = priv->_agn.init_evtlog_ptr; 1366 base = priv->init_evtlog_ptr;
1722 } else { 1367 } else {
1723 if (!base) 1368 if (!base)
1724 base = priv->_agn.inst_evtlog_ptr; 1369 base = priv->inst_evtlog_ptr;
1725 } 1370 }
1726 1371
1727 if (mode == 0) 1372 if (mode == 0)
@@ -1830,16 +1475,16 @@ int iwl_dump_nic_event_log(struct iwl_priv *priv, bool full_log,
1830 1475
1831 base = priv->device_pointers.log_event_table; 1476 base = priv->device_pointers.log_event_table;
1832 if (priv->ucode_type == IWL_UCODE_INIT) { 1477 if (priv->ucode_type == IWL_UCODE_INIT) {
1833 logsize = priv->_agn.init_evtlog_size; 1478 logsize = priv->init_evtlog_size;
1834 if (!base) 1479 if (!base)
1835 base = priv->_agn.init_evtlog_ptr; 1480 base = priv->init_evtlog_ptr;
1836 } else { 1481 } else {
1837 logsize = priv->_agn.inst_evtlog_size; 1482 logsize = priv->inst_evtlog_size;
1838 if (!base) 1483 if (!base)
1839 base = priv->_agn.inst_evtlog_ptr; 1484 base = priv->inst_evtlog_ptr;
1840 } 1485 }
1841 1486
1842 if (!priv->cfg->ops->lib->is_valid_rtc_data_addr(base)) { 1487 if (!iwlagn_hw_valid_rtc_data_addr(base)) {
1843 IWL_ERR(priv, 1488 IWL_ERR(priv,
1844 "Invalid event log pointer 0x%08X for %s uCode\n", 1489 "Invalid event log pointer 0x%08X for %s uCode\n",
1845 base, 1490 base,
@@ -1942,7 +1587,7 @@ static void iwl_rf_kill_ct_config(struct iwl_priv *priv)
1942 adv_cmd.critical_temperature_exit = 1587 adv_cmd.critical_temperature_exit =
1943 cpu_to_le32(priv->hw_params.ct_kill_exit_threshold); 1588 cpu_to_le32(priv->hw_params.ct_kill_exit_threshold);
1944 1589
1945 ret = trans_send_cmd_pdu(priv, 1590 ret = trans_send_cmd_pdu(&priv->trans,
1946 REPLY_CT_KILL_CONFIG_CMD, 1591 REPLY_CT_KILL_CONFIG_CMD,
1947 CMD_SYNC, sizeof(adv_cmd), &adv_cmd); 1592 CMD_SYNC, sizeof(adv_cmd), &adv_cmd);
1948 if (ret) 1593 if (ret)
@@ -1958,7 +1603,7 @@ static void iwl_rf_kill_ct_config(struct iwl_priv *priv)
1958 cmd.critical_temperature_R = 1603 cmd.critical_temperature_R =
1959 cpu_to_le32(priv->hw_params.ct_kill_threshold); 1604 cpu_to_le32(priv->hw_params.ct_kill_threshold);
1960 1605
1961 ret = trans_send_cmd_pdu(priv, 1606 ret = trans_send_cmd_pdu(&priv->trans,
1962 REPLY_CT_KILL_CONFIG_CMD, 1607 REPLY_CT_KILL_CONFIG_CMD,
1963 CMD_SYNC, sizeof(cmd), &cmd); 1608 CMD_SYNC, sizeof(cmd), &cmd);
1964 if (ret) 1609 if (ret)
@@ -1984,10 +1629,29 @@ static int iwlagn_send_calib_cfg_rt(struct iwl_priv *priv, u32 cfg)
1984 calib_cfg_cmd.ucd_calib_cfg.once.is_enable = IWL_CALIB_INIT_CFG_ALL; 1629 calib_cfg_cmd.ucd_calib_cfg.once.is_enable = IWL_CALIB_INIT_CFG_ALL;
1985 calib_cfg_cmd.ucd_calib_cfg.once.start = cpu_to_le32(cfg); 1630 calib_cfg_cmd.ucd_calib_cfg.once.start = cpu_to_le32(cfg);
1986 1631
1987 return trans_send_cmd(priv, &cmd); 1632 return trans_send_cmd(&priv->trans, &cmd);
1988} 1633}
1989 1634
1990 1635
1636static int iwlagn_send_tx_ant_config(struct iwl_priv *priv, u8 valid_tx_ant)
1637{
1638 struct iwl_tx_ant_config_cmd tx_ant_cmd = {
1639 .valid = cpu_to_le32(valid_tx_ant),
1640 };
1641
1642 if (IWL_UCODE_API(priv->ucode_ver) > 1) {
1643 IWL_DEBUG_HC(priv, "select valid tx ant: %u\n", valid_tx_ant);
1644 return trans_send_cmd_pdu(&priv->trans,
1645 TX_ANT_CONFIGURATION_CMD,
1646 CMD_SYNC,
1647 sizeof(struct iwl_tx_ant_config_cmd),
1648 &tx_ant_cmd);
1649 } else {
1650 IWL_DEBUG_HC(priv, "TX_ANT_CONFIGURATION_CMD not supported\n");
1651 return -EOPNOTSUPP;
1652 }
1653}
1654
1991/** 1655/**
1992 * iwl_alive_start - called after REPLY_ALIVE notification received 1656 * iwl_alive_start - called after REPLY_ALIVE notification received
1993 * from protocol/runtime uCode (initialization uCode's 1657 * from protocol/runtime uCode (initialization uCode's
@@ -1998,6 +1662,7 @@ int iwl_alive_start(struct iwl_priv *priv)
1998 int ret = 0; 1662 int ret = 0;
1999 struct iwl_rxon_context *ctx = &priv->contexts[IWL_RXON_CTX_BSS]; 1663 struct iwl_rxon_context *ctx = &priv->contexts[IWL_RXON_CTX_BSS];
2000 1664
1665 /*TODO: this should go to the transport layer */
2001 iwl_reset_ict(priv); 1666 iwl_reset_ict(priv);
2002 1667
2003 IWL_DEBUG_INFO(priv, "Runtime Alive received.\n"); 1668 IWL_DEBUG_INFO(priv, "Runtime Alive received.\n");
@@ -2055,7 +1720,7 @@ int iwl_alive_start(struct iwl_priv *priv)
2055 /* Configure Tx antenna selection based on H/W config */ 1720 /* Configure Tx antenna selection based on H/W config */
2056 iwlagn_send_tx_ant_config(priv, priv->cfg->valid_tx_ant); 1721 iwlagn_send_tx_ant_config(priv, priv->cfg->valid_tx_ant);
2057 1722
2058 if (iwl_is_associated_ctx(ctx)) { 1723 if (iwl_is_associated_ctx(ctx) && !priv->wowlan) {
2059 struct iwl_rxon_cmd *active_rxon = 1724 struct iwl_rxon_cmd *active_rxon =
2060 (struct iwl_rxon_cmd *)&ctx->active; 1725 (struct iwl_rxon_cmd *)&ctx->active;
2061 /* apply any changes in staging */ 1726 /* apply any changes in staging */
@@ -2070,7 +1735,10 @@ int iwl_alive_start(struct iwl_priv *priv)
2070 iwlagn_set_rxon_chain(priv, ctx); 1735 iwlagn_set_rxon_chain(priv, ctx);
2071 } 1736 }
2072 1737
2073 iwl_reset_run_time_calib(priv); 1738 if (!priv->wowlan) {
1739 /* WoWLAN ucode will not reply in the same way, skip it */
1740 iwl_reset_run_time_calib(priv);
1741 }
2074 1742
2075 set_bit(STATUS_READY, &priv->status); 1743 set_bit(STATUS_READY, &priv->status);
2076 1744
@@ -2137,7 +1805,7 @@ static void __iwl_down(struct iwl_priv *priv)
2137 test_bit(STATUS_EXIT_PENDING, &priv->status) << 1805 test_bit(STATUS_EXIT_PENDING, &priv->status) <<
2138 STATUS_EXIT_PENDING; 1806 STATUS_EXIT_PENDING;
2139 1807
2140 iwlagn_stop_device(priv); 1808 trans_stop_device(&priv->trans);
2141 1809
2142 dev_kfree_skb(priv->beacon_skb); 1810 dev_kfree_skb(priv->beacon_skb);
2143 priv->beacon_skb = NULL; 1811 priv->beacon_skb = NULL;
@@ -2152,55 +1820,6 @@ static void iwl_down(struct iwl_priv *priv)
2152 iwl_cancel_deferred_work(priv); 1820 iwl_cancel_deferred_work(priv);
2153} 1821}
2154 1822
2155#define HW_READY_TIMEOUT (50)
2156
2157/* Note: returns poll_bit return value, which is >= 0 if success */
2158static int iwl_set_hw_ready(struct iwl_priv *priv)
2159{
2160 int ret;
2161
2162 iwl_set_bit(priv, CSR_HW_IF_CONFIG_REG,
2163 CSR_HW_IF_CONFIG_REG_BIT_NIC_READY);
2164
2165 /* See if we got it */
2166 ret = iwl_poll_bit(priv, CSR_HW_IF_CONFIG_REG,
2167 CSR_HW_IF_CONFIG_REG_BIT_NIC_READY,
2168 CSR_HW_IF_CONFIG_REG_BIT_NIC_READY,
2169 HW_READY_TIMEOUT);
2170
2171 IWL_DEBUG_INFO(priv, "hardware%s ready\n", ret < 0 ? " not" : "");
2172 return ret;
2173}
2174
2175/* Note: returns standard 0/-ERROR code */
2176int iwl_prepare_card_hw(struct iwl_priv *priv)
2177{
2178 int ret;
2179
2180 IWL_DEBUG_INFO(priv, "iwl_prepare_card_hw enter\n");
2181
2182 ret = iwl_set_hw_ready(priv);
2183 if (ret >= 0)
2184 return 0;
2185
2186 /* If HW is not ready, prepare the conditions to check again */
2187 iwl_set_bit(priv, CSR_HW_IF_CONFIG_REG,
2188 CSR_HW_IF_CONFIG_REG_PREPARE);
2189
2190 ret = iwl_poll_bit(priv, CSR_HW_IF_CONFIG_REG,
2191 ~CSR_HW_IF_CONFIG_REG_BIT_NIC_PREPARE_DONE,
2192 CSR_HW_IF_CONFIG_REG_BIT_NIC_PREPARE_DONE, 150000);
2193
2194 if (ret < 0)
2195 return ret;
2196
2197 /* HW should be ready by now, check again. */
2198 ret = iwl_set_hw_ready(priv);
2199 if (ret >= 0)
2200 return 0;
2201 return ret;
2202}
2203
2204#define MAX_HW_RESTARTS 5 1823#define MAX_HW_RESTARTS 5
2205 1824
2206static int __iwl_up(struct iwl_priv *priv) 1825static int __iwl_up(struct iwl_priv *priv)
@@ -2336,19 +1955,6 @@ static void iwl_bg_restart(struct work_struct *data)
2336 } 1955 }
2337} 1956}
2338 1957
2339static void iwl_bg_rx_replenish(struct work_struct *data)
2340{
2341 struct iwl_priv *priv =
2342 container_of(data, struct iwl_priv, rx_replenish);
2343
2344 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
2345 return;
2346
2347 mutex_lock(&priv->mutex);
2348 iwlagn_rx_replenish(priv);
2349 mutex_unlock(&priv->mutex);
2350}
2351
2352static int iwl_mac_offchannel_tx(struct ieee80211_hw *hw, struct sk_buff *skb, 1958static int iwl_mac_offchannel_tx(struct ieee80211_hw *hw, struct sk_buff *skb,
2353 struct ieee80211_channel *chan, 1959 struct ieee80211_channel *chan,
2354 enum nl80211_channel_type channel_type, 1960 enum nl80211_channel_type channel_type,
@@ -2383,7 +1989,7 @@ static int iwl_mac_offchannel_tx(struct ieee80211_hw *hw, struct sk_buff *skb,
2383 1989
2384 /* TODO: queue up if scanning? */ 1990 /* TODO: queue up if scanning? */
2385 if (test_bit(STATUS_SCANNING, &priv->status) || 1991 if (test_bit(STATUS_SCANNING, &priv->status) ||
2386 priv->_agn.offchan_tx_skb) { 1992 priv->offchan_tx_skb) {
2387 ret = -EBUSY; 1993 ret = -EBUSY;
2388 goto out; 1994 goto out;
2389 } 1995 }
@@ -2397,14 +2003,14 @@ static int iwl_mac_offchannel_tx(struct ieee80211_hw *hw, struct sk_buff *skb,
2397 goto out; 2003 goto out;
2398 } 2004 }
2399 2005
2400 priv->_agn.offchan_tx_skb = skb; 2006 priv->offchan_tx_skb = skb;
2401 priv->_agn.offchan_tx_timeout = wait; 2007 priv->offchan_tx_timeout = wait;
2402 priv->_agn.offchan_tx_chan = chan; 2008 priv->offchan_tx_chan = chan;
2403 2009
2404 ret = iwl_scan_initiate(priv, priv->contexts[IWL_RXON_CTX_PAN].vif, 2010 ret = iwl_scan_initiate(priv, priv->contexts[IWL_RXON_CTX_PAN].vif,
2405 IWL_SCAN_OFFCH_TX, chan->band); 2011 IWL_SCAN_OFFCH_TX, chan->band);
2406 if (ret) 2012 if (ret)
2407 priv->_agn.offchan_tx_skb = NULL; 2013 priv->offchan_tx_skb = NULL;
2408 out: 2014 out:
2409 mutex_unlock(&priv->mutex); 2015 mutex_unlock(&priv->mutex);
2410 free: 2016 free:
@@ -2421,12 +2027,12 @@ static int iwl_mac_offchannel_tx_cancel_wait(struct ieee80211_hw *hw)
2421 2027
2422 mutex_lock(&priv->mutex); 2028 mutex_lock(&priv->mutex);
2423 2029
2424 if (!priv->_agn.offchan_tx_skb) { 2030 if (!priv->offchan_tx_skb) {
2425 ret = -EINVAL; 2031 ret = -EINVAL;
2426 goto unlock; 2032 goto unlock;
2427 } 2033 }
2428 2034
2429 priv->_agn.offchan_tx_skb = NULL; 2035 priv->offchan_tx_skb = NULL;
2430 2036
2431 ret = iwl_scan_cancel_timeout(priv, 200); 2037 ret = iwl_scan_cancel_timeout(priv, 200);
2432 if (ret) 2038 if (ret)
@@ -2572,6 +2178,23 @@ static int iwl_mac_setup_register(struct iwl_priv *priv,
2572 WIPHY_FLAG_DISABLE_BEACON_HINTS | 2178 WIPHY_FLAG_DISABLE_BEACON_HINTS |
2573 WIPHY_FLAG_IBSS_RSN; 2179 WIPHY_FLAG_IBSS_RSN;
2574 2180
2181 if (priv->ucode_wowlan.code.len && device_can_wakeup(priv->bus->dev)) {
2182 hw->wiphy->wowlan.flags = WIPHY_WOWLAN_MAGIC_PKT |
2183 WIPHY_WOWLAN_DISCONNECT |
2184 WIPHY_WOWLAN_EAP_IDENTITY_REQ |
2185 WIPHY_WOWLAN_RFKILL_RELEASE;
2186 if (!iwlagn_mod_params.sw_crypto)
2187 hw->wiphy->wowlan.flags |=
2188 WIPHY_WOWLAN_SUPPORTS_GTK_REKEY |
2189 WIPHY_WOWLAN_GTK_REKEY_FAILURE;
2190
2191 hw->wiphy->wowlan.n_patterns = IWLAGN_WOWLAN_MAX_PATTERNS;
2192 hw->wiphy->wowlan.pattern_min_len =
2193 IWLAGN_WOWLAN_MIN_PATTERN_LEN;
2194 hw->wiphy->wowlan.pattern_max_len =
2195 IWLAGN_WOWLAN_MAX_PATTERN_LEN;
2196 }
2197
2575 if (iwlagn_mod_params.power_save) 2198 if (iwlagn_mod_params.power_save)
2576 hw->wiphy->flags |= WIPHY_FLAG_PS_ON_BY_DEFAULT; 2199 hw->wiphy->flags |= WIPHY_FLAG_PS_ON_BY_DEFAULT;
2577 else 2200 else
@@ -2656,6 +2279,467 @@ static void iwlagn_mac_stop(struct ieee80211_hw *hw)
2656 IWL_DEBUG_MAC80211(priv, "leave\n"); 2279 IWL_DEBUG_MAC80211(priv, "leave\n");
2657} 2280}
2658 2281
2282static int iwlagn_send_patterns(struct iwl_priv *priv,
2283 struct cfg80211_wowlan *wowlan)
2284{
2285 struct iwlagn_wowlan_patterns_cmd *pattern_cmd;
2286 struct iwl_host_cmd cmd = {
2287 .id = REPLY_WOWLAN_PATTERNS,
2288 .dataflags[0] = IWL_HCMD_DFL_NOCOPY,
2289 .flags = CMD_SYNC,
2290 };
2291 int i, err;
2292
2293 if (!wowlan->n_patterns)
2294 return 0;
2295
2296 cmd.len[0] = sizeof(*pattern_cmd) +
2297 wowlan->n_patterns * sizeof(struct iwlagn_wowlan_pattern);
2298
2299 pattern_cmd = kmalloc(cmd.len[0], GFP_KERNEL);
2300 if (!pattern_cmd)
2301 return -ENOMEM;
2302
2303 pattern_cmd->n_patterns = cpu_to_le32(wowlan->n_patterns);
2304
2305 for (i = 0; i < wowlan->n_patterns; i++) {
2306 int mask_len = DIV_ROUND_UP(wowlan->patterns[i].pattern_len, 8);
2307
2308 memcpy(&pattern_cmd->patterns[i].mask,
2309 wowlan->patterns[i].mask, mask_len);
2310 memcpy(&pattern_cmd->patterns[i].pattern,
2311 wowlan->patterns[i].pattern,
2312 wowlan->patterns[i].pattern_len);
2313 pattern_cmd->patterns[i].mask_size = mask_len;
2314 pattern_cmd->patterns[i].pattern_size =
2315 wowlan->patterns[i].pattern_len;
2316 }
2317
2318 cmd.data[0] = pattern_cmd;
2319 err = trans_send_cmd(&priv->trans, &cmd);
2320 kfree(pattern_cmd);
2321 return err;
2322}
2323
2324static void iwlagn_mac_set_rekey_data(struct ieee80211_hw *hw,
2325 struct ieee80211_vif *vif,
2326 struct cfg80211_gtk_rekey_data *data)
2327{
2328 struct iwl_priv *priv = hw->priv;
2329
2330 if (iwlagn_mod_params.sw_crypto)
2331 return;
2332
2333 mutex_lock(&priv->mutex);
2334
2335 if (priv->contexts[IWL_RXON_CTX_BSS].vif != vif)
2336 goto out;
2337
2338 memcpy(priv->kek, data->kek, NL80211_KEK_LEN);
2339 memcpy(priv->kck, data->kck, NL80211_KCK_LEN);
2340 priv->replay_ctr = cpu_to_le64(be64_to_cpup((__be64 *)&data->replay_ctr));
2341 priv->have_rekey_data = true;
2342
2343 out:
2344 mutex_unlock(&priv->mutex);
2345}
2346
2347struct wowlan_key_data {
2348 struct iwl_rxon_context *ctx;
2349 struct iwlagn_wowlan_rsc_tsc_params_cmd *rsc_tsc;
2350 struct iwlagn_wowlan_tkip_params_cmd *tkip;
2351 const u8 *bssid;
2352 bool error, use_rsc_tsc, use_tkip;
2353};
2354
2355static void iwlagn_convert_p1k(u16 *p1k, __le16 *out)
2356{
2357 int i;
2358
2359 for (i = 0; i < IWLAGN_P1K_SIZE; i++)
2360 out[i] = cpu_to_le16(p1k[i]);
2361}
2362
2363static void iwlagn_wowlan_program_keys(struct ieee80211_hw *hw,
2364 struct ieee80211_vif *vif,
2365 struct ieee80211_sta *sta,
2366 struct ieee80211_key_conf *key,
2367 void *_data)
2368{
2369 struct iwl_priv *priv = hw->priv;
2370 struct wowlan_key_data *data = _data;
2371 struct iwl_rxon_context *ctx = data->ctx;
2372 struct aes_sc *aes_sc, *aes_tx_sc = NULL;
2373 struct tkip_sc *tkip_sc, *tkip_tx_sc = NULL;
2374 struct iwlagn_p1k_cache *rx_p1ks;
2375 u8 *rx_mic_key;
2376 struct ieee80211_key_seq seq;
2377 u32 cur_rx_iv32 = 0;
2378 u16 p1k[IWLAGN_P1K_SIZE];
2379 int ret, i;
2380
2381 mutex_lock(&priv->mutex);
2382
2383 if ((key->cipher == WLAN_CIPHER_SUITE_WEP40 ||
2384 key->cipher == WLAN_CIPHER_SUITE_WEP104) &&
2385 !sta && !ctx->key_mapping_keys)
2386 ret = iwl_set_default_wep_key(priv, ctx, key);
2387 else
2388 ret = iwl_set_dynamic_key(priv, ctx, key, sta);
2389
2390 if (ret) {
2391 IWL_ERR(priv, "Error setting key during suspend!\n");
2392 data->error = true;
2393 }
2394
2395 switch (key->cipher) {
2396 case WLAN_CIPHER_SUITE_TKIP:
2397 if (sta) {
2398 tkip_sc = data->rsc_tsc->all_tsc_rsc.tkip.unicast_rsc;
2399 tkip_tx_sc = &data->rsc_tsc->all_tsc_rsc.tkip.tsc;
2400
2401 rx_p1ks = data->tkip->rx_uni;
2402
2403 ieee80211_get_key_tx_seq(key, &seq);
2404 tkip_tx_sc->iv16 = cpu_to_le16(seq.tkip.iv16);
2405 tkip_tx_sc->iv32 = cpu_to_le32(seq.tkip.iv32);
2406
2407 ieee80211_get_tkip_p1k_iv(key, seq.tkip.iv32, p1k);
2408 iwlagn_convert_p1k(p1k, data->tkip->tx.p1k);
2409
2410 memcpy(data->tkip->mic_keys.tx,
2411 &key->key[NL80211_TKIP_DATA_OFFSET_TX_MIC_KEY],
2412 IWLAGN_MIC_KEY_SIZE);
2413
2414 rx_mic_key = data->tkip->mic_keys.rx_unicast;
2415 } else {
2416 tkip_sc = data->rsc_tsc->all_tsc_rsc.tkip.multicast_rsc;
2417 rx_p1ks = data->tkip->rx_multi;
2418 rx_mic_key = data->tkip->mic_keys.rx_mcast;
2419 }
2420
2421 /*
2422 * For non-QoS this relies on the fact that both the uCode and
2423 * mac80211 use TID 0 (as they need to to avoid replay attacks)
2424 * for checking the IV in the frames.
2425 */
2426 for (i = 0; i < IWLAGN_NUM_RSC; i++) {
2427 ieee80211_get_key_rx_seq(key, i, &seq);
2428 tkip_sc[i].iv16 = cpu_to_le16(seq.tkip.iv16);
2429 tkip_sc[i].iv32 = cpu_to_le32(seq.tkip.iv32);
2430 /* wrapping isn't allowed, AP must rekey */
2431 if (seq.tkip.iv32 > cur_rx_iv32)
2432 cur_rx_iv32 = seq.tkip.iv32;
2433 }
2434
2435 ieee80211_get_tkip_rx_p1k(key, data->bssid, cur_rx_iv32, p1k);
2436 iwlagn_convert_p1k(p1k, rx_p1ks[0].p1k);
2437 ieee80211_get_tkip_rx_p1k(key, data->bssid,
2438 cur_rx_iv32 + 1, p1k);
2439 iwlagn_convert_p1k(p1k, rx_p1ks[1].p1k);
2440
2441 memcpy(rx_mic_key,
2442 &key->key[NL80211_TKIP_DATA_OFFSET_RX_MIC_KEY],
2443 IWLAGN_MIC_KEY_SIZE);
2444
2445 data->use_tkip = true;
2446 data->use_rsc_tsc = true;
2447 break;
2448 case WLAN_CIPHER_SUITE_CCMP:
2449 if (sta) {
2450 u8 *pn = seq.ccmp.pn;
2451
2452 aes_sc = data->rsc_tsc->all_tsc_rsc.aes.unicast_rsc;
2453 aes_tx_sc = &data->rsc_tsc->all_tsc_rsc.aes.tsc;
2454
2455 ieee80211_get_key_tx_seq(key, &seq);
2456 aes_tx_sc->pn = cpu_to_le64(
2457 (u64)pn[5] |
2458 ((u64)pn[4] << 8) |
2459 ((u64)pn[3] << 16) |
2460 ((u64)pn[2] << 24) |
2461 ((u64)pn[1] << 32) |
2462 ((u64)pn[0] << 40));
2463 } else
2464 aes_sc = data->rsc_tsc->all_tsc_rsc.aes.multicast_rsc;
2465
2466 /*
2467 * For non-QoS this relies on the fact that both the uCode and
2468 * mac80211 use TID 0 for checking the IV in the frames.
2469 */
2470 for (i = 0; i < IWLAGN_NUM_RSC; i++) {
2471 u8 *pn = seq.ccmp.pn;
2472
2473 ieee80211_get_key_rx_seq(key, i, &seq);
2474 aes_sc->pn = cpu_to_le64(
2475 (u64)pn[5] |
2476 ((u64)pn[4] << 8) |
2477 ((u64)pn[3] << 16) |
2478 ((u64)pn[2] << 24) |
2479 ((u64)pn[1] << 32) |
2480 ((u64)pn[0] << 40));
2481 }
2482 data->use_rsc_tsc = true;
2483 break;
2484 }
2485
2486 mutex_unlock(&priv->mutex);
2487}
2488
2489static int iwlagn_mac_suspend(struct ieee80211_hw *hw,
2490 struct cfg80211_wowlan *wowlan)
2491{
2492 struct iwl_priv *priv = hw->priv;
2493 struct iwlagn_wowlan_wakeup_filter_cmd wakeup_filter_cmd;
2494 struct iwl_rxon_cmd rxon;
2495 struct iwl_rxon_context *ctx = &priv->contexts[IWL_RXON_CTX_BSS];
2496 struct iwlagn_wowlan_kek_kck_material_cmd kek_kck_cmd;
2497 struct iwlagn_wowlan_tkip_params_cmd tkip_cmd = {};
2498 struct wowlan_key_data key_data = {
2499 .ctx = ctx,
2500 .bssid = ctx->active.bssid_addr,
2501 .use_rsc_tsc = false,
2502 .tkip = &tkip_cmd,
2503 .use_tkip = false,
2504 };
2505 int ret, i;
2506 u16 seq;
2507
2508 if (WARN_ON(!wowlan))
2509 return -EINVAL;
2510
2511 mutex_lock(&priv->mutex);
2512
2513 /* Don't attempt WoWLAN when not associated, tear down instead. */
2514 if (!ctx->vif || ctx->vif->type != NL80211_IFTYPE_STATION ||
2515 !iwl_is_associated_ctx(ctx)) {
2516 ret = 1;
2517 goto out;
2518 }
2519
2520 key_data.rsc_tsc = kzalloc(sizeof(*key_data.rsc_tsc), GFP_KERNEL);
2521 if (!key_data.rsc_tsc) {
2522 ret = -ENOMEM;
2523 goto out;
2524 }
2525
2526 memset(&wakeup_filter_cmd, 0, sizeof(wakeup_filter_cmd));
2527
2528 /*
2529 * We know the last used seqno, and the uCode expects to know that
2530 * one, it will increment before TX.
2531 */
2532 seq = le16_to_cpu(priv->last_seq_ctl) & IEEE80211_SCTL_SEQ;
2533 wakeup_filter_cmd.non_qos_seq = cpu_to_le16(seq);
2534
2535 /*
2536 * For QoS counters, we store the one to use next, so subtract 0x10
2537 * since the uCode will add 0x10 before using the value.
2538 */
2539 for (i = 0; i < 8; i++) {
2540 seq = priv->stations[IWL_AP_ID].tid[i].seq_number;
2541 seq -= 0x10;
2542 wakeup_filter_cmd.qos_seq[i] = cpu_to_le16(seq);
2543 }
2544
2545 if (wowlan->disconnect)
2546 wakeup_filter_cmd.enabled |=
2547 cpu_to_le32(IWLAGN_WOWLAN_WAKEUP_BEACON_MISS |
2548 IWLAGN_WOWLAN_WAKEUP_LINK_CHANGE);
2549 if (wowlan->magic_pkt)
2550 wakeup_filter_cmd.enabled |=
2551 cpu_to_le32(IWLAGN_WOWLAN_WAKEUP_MAGIC_PACKET);
2552 if (wowlan->gtk_rekey_failure)
2553 wakeup_filter_cmd.enabled |=
2554 cpu_to_le32(IWLAGN_WOWLAN_WAKEUP_GTK_REKEY_FAIL);
2555 if (wowlan->eap_identity_req)
2556 wakeup_filter_cmd.enabled |=
2557 cpu_to_le32(IWLAGN_WOWLAN_WAKEUP_EAP_IDENT_REQ);
2558 if (wowlan->four_way_handshake)
2559 wakeup_filter_cmd.enabled |=
2560 cpu_to_le32(IWLAGN_WOWLAN_WAKEUP_4WAY_HANDSHAKE);
2561 if (wowlan->rfkill_release)
2562 wakeup_filter_cmd.enabled |=
2563 cpu_to_le32(IWLAGN_WOWLAN_WAKEUP_RFKILL);
2564 if (wowlan->n_patterns)
2565 wakeup_filter_cmd.enabled |=
2566 cpu_to_le32(IWLAGN_WOWLAN_WAKEUP_PATTERN_MATCH);
2567
2568 iwl_scan_cancel_timeout(priv, 200);
2569
2570 memcpy(&rxon, &ctx->active, sizeof(rxon));
2571
2572 trans_stop_device(&priv->trans);
2573
2574 priv->wowlan = true;
2575
2576 ret = iwlagn_load_ucode_wait_alive(priv, &priv->ucode_wowlan,
2577 IWL_UCODE_WOWLAN);
2578 if (ret)
2579 goto error;
2580
2581 /* now configure WoWLAN ucode */
2582 ret = iwl_alive_start(priv);
2583 if (ret)
2584 goto error;
2585
2586 memcpy(&ctx->staging, &rxon, sizeof(rxon));
2587 ret = iwlagn_commit_rxon(priv, ctx);
2588 if (ret)
2589 goto error;
2590
2591 ret = iwl_power_update_mode(priv, true);
2592 if (ret)
2593 goto error;
2594
2595 if (!iwlagn_mod_params.sw_crypto) {
2596 /* mark all keys clear */
2597 priv->ucode_key_table = 0;
2598 ctx->key_mapping_keys = 0;
2599
2600 /*
2601 * This needs to be unlocked due to lock ordering
2602 * constraints. Since we're in the suspend path
2603 * that isn't really a problem though.
2604 */
2605 mutex_unlock(&priv->mutex);
2606 ieee80211_iter_keys(priv->hw, ctx->vif,
2607 iwlagn_wowlan_program_keys,
2608 &key_data);
2609 mutex_lock(&priv->mutex);
2610 if (key_data.error) {
2611 ret = -EIO;
2612 goto error;
2613 }
2614
2615 if (key_data.use_rsc_tsc) {
2616 struct iwl_host_cmd rsc_tsc_cmd = {
2617 .id = REPLY_WOWLAN_TSC_RSC_PARAMS,
2618 .flags = CMD_SYNC,
2619 .data[0] = key_data.rsc_tsc,
2620 .dataflags[0] = IWL_HCMD_DFL_NOCOPY,
2621 .len[0] = sizeof(*key_data.rsc_tsc),
2622 };
2623
2624 ret = trans_send_cmd(&priv->trans, &rsc_tsc_cmd);
2625 if (ret)
2626 goto error;
2627 }
2628
2629 if (key_data.use_tkip) {
2630 ret = trans_send_cmd_pdu(&priv->trans,
2631 REPLY_WOWLAN_TKIP_PARAMS,
2632 CMD_SYNC, sizeof(tkip_cmd),
2633 &tkip_cmd);
2634 if (ret)
2635 goto error;
2636 }
2637
2638 if (priv->have_rekey_data) {
2639 memset(&kek_kck_cmd, 0, sizeof(kek_kck_cmd));
2640 memcpy(kek_kck_cmd.kck, priv->kck, NL80211_KCK_LEN);
2641 kek_kck_cmd.kck_len = cpu_to_le16(NL80211_KCK_LEN);
2642 memcpy(kek_kck_cmd.kek, priv->kek, NL80211_KEK_LEN);
2643 kek_kck_cmd.kek_len = cpu_to_le16(NL80211_KEK_LEN);
2644 kek_kck_cmd.replay_ctr = priv->replay_ctr;
2645
2646 ret = trans_send_cmd_pdu(&priv->trans,
2647 REPLY_WOWLAN_KEK_KCK_MATERIAL,
2648 CMD_SYNC, sizeof(kek_kck_cmd),
2649 &kek_kck_cmd);
2650 if (ret)
2651 goto error;
2652 }
2653 }
2654
2655 ret = trans_send_cmd_pdu(&priv->trans, REPLY_WOWLAN_WAKEUP_FILTER,
2656 CMD_SYNC, sizeof(wakeup_filter_cmd),
2657 &wakeup_filter_cmd);
2658 if (ret)
2659 goto error;
2660
2661 ret = iwlagn_send_patterns(priv, wowlan);
2662 if (ret)
2663 goto error;
2664
2665 device_set_wakeup_enable(priv->bus->dev, true);
2666
2667 /* Now let the ucode operate on its own */
2668 iwl_write32(priv, CSR_UCODE_DRV_GP1_SET,
2669 CSR_UCODE_DRV_GP1_BIT_D3_CFG_COMPLETE);
2670
2671 goto out;
2672
2673 error:
2674 priv->wowlan = false;
2675 iwlagn_prepare_restart(priv);
2676 ieee80211_restart_hw(priv->hw);
2677 out:
2678 mutex_unlock(&priv->mutex);
2679 kfree(key_data.rsc_tsc);
2680 return ret;
2681}
2682
2683static int iwlagn_mac_resume(struct ieee80211_hw *hw)
2684{
2685 struct iwl_priv *priv = hw->priv;
2686 struct iwl_rxon_context *ctx = &priv->contexts[IWL_RXON_CTX_BSS];
2687 struct ieee80211_vif *vif;
2688 unsigned long flags;
2689 u32 base, status = 0xffffffff;
2690 int ret = -EIO;
2691
2692 mutex_lock(&priv->mutex);
2693
2694 iwl_write32(priv, CSR_UCODE_DRV_GP1_CLR,
2695 CSR_UCODE_DRV_GP1_BIT_D3_CFG_COMPLETE);
2696
2697 base = priv->device_pointers.error_event_table;
2698 if (iwlagn_hw_valid_rtc_data_addr(base)) {
2699 spin_lock_irqsave(&priv->reg_lock, flags);
2700 ret = iwl_grab_nic_access_silent(priv);
2701 if (ret == 0) {
2702 iwl_write32(priv, HBUS_TARG_MEM_RADDR, base);
2703 status = iwl_read32(priv, HBUS_TARG_MEM_RDAT);
2704 iwl_release_nic_access(priv);
2705 }
2706 spin_unlock_irqrestore(&priv->reg_lock, flags);
2707
2708#ifdef CONFIG_IWLWIFI_DEBUGFS
2709 if (ret == 0) {
2710 if (!priv->wowlan_sram)
2711 priv->wowlan_sram =
2712 kzalloc(priv->ucode_wowlan.data.len,
2713 GFP_KERNEL);
2714
2715 if (priv->wowlan_sram)
2716 _iwl_read_targ_mem_words(
2717 priv, 0x800000, priv->wowlan_sram,
2718 priv->ucode_wowlan.data.len / 4);
2719 }
2720#endif
2721 }
2722
2723 /* we'll clear ctx->vif during iwlagn_prepare_restart() */
2724 vif = ctx->vif;
2725
2726 priv->wowlan = false;
2727
2728 device_set_wakeup_enable(priv->bus->dev, false);
2729
2730 iwlagn_prepare_restart(priv);
2731
2732 memset((void *)&ctx->active, 0, sizeof(ctx->active));
2733 iwl_connection_init_rx_config(priv, ctx);
2734 iwlagn_set_rxon_chain(priv, ctx);
2735
2736 mutex_unlock(&priv->mutex);
2737
2738 ieee80211_resume_disconnect(vif);
2739
2740 return 1;
2741}
2742
2659static void iwlagn_mac_tx(struct ieee80211_hw *hw, struct sk_buff *skb) 2743static void iwlagn_mac_tx(struct ieee80211_hw *hw, struct sk_buff *skb)
2660{ 2744{
2661 struct iwl_priv *priv = hw->priv; 2745 struct iwl_priv *priv = hw->priv;
@@ -2678,14 +2762,8 @@ static void iwlagn_mac_update_tkip_key(struct ieee80211_hw *hw,
2678 u32 iv32, u16 *phase1key) 2762 u32 iv32, u16 *phase1key)
2679{ 2763{
2680 struct iwl_priv *priv = hw->priv; 2764 struct iwl_priv *priv = hw->priv;
2681 struct iwl_vif_priv *vif_priv = (void *)vif->drv_priv;
2682
2683 IWL_DEBUG_MAC80211(priv, "enter\n");
2684
2685 iwl_update_tkip_key(priv, vif_priv->ctx, keyconf, sta,
2686 iv32, phase1key);
2687 2765
2688 IWL_DEBUG_MAC80211(priv, "leave\n"); 2766 iwl_update_tkip_key(priv, vif, keyconf, sta, iv32, phase1key);
2689} 2767}
2690 2768
2691static int iwlagn_mac_set_key(struct ieee80211_hw *hw, enum set_key_cmd cmd, 2769static int iwlagn_mac_set_key(struct ieee80211_hw *hw, enum set_key_cmd cmd,
@@ -2697,7 +2775,6 @@ static int iwlagn_mac_set_key(struct ieee80211_hw *hw, enum set_key_cmd cmd,
2697 struct iwl_vif_priv *vif_priv = (void *)vif->drv_priv; 2775 struct iwl_vif_priv *vif_priv = (void *)vif->drv_priv;
2698 struct iwl_rxon_context *ctx = vif_priv->ctx; 2776 struct iwl_rxon_context *ctx = vif_priv->ctx;
2699 int ret; 2777 int ret;
2700 u8 sta_id;
2701 bool is_default_wep_key = false; 2778 bool is_default_wep_key = false;
2702 2779
2703 IWL_DEBUG_MAC80211(priv, "enter\n"); 2780 IWL_DEBUG_MAC80211(priv, "enter\n");
@@ -2708,20 +2785,27 @@ static int iwlagn_mac_set_key(struct ieee80211_hw *hw, enum set_key_cmd cmd,
2708 } 2785 }
2709 2786
2710 /* 2787 /*
2711 * To support IBSS RSN, don't program group keys in IBSS, the 2788 * We could program these keys into the hardware as well, but we
2712 * hardware will then not attempt to decrypt the frames. 2789 * don't expect much multicast traffic in IBSS and having keys
2790 * for more stations is probably more useful.
2791 *
2792 * Mark key TX-only and return 0.
2713 */ 2793 */
2714 if (vif->type == NL80211_IFTYPE_ADHOC && 2794 if (vif->type == NL80211_IFTYPE_ADHOC &&
2715 !(key->flags & IEEE80211_KEY_FLAG_PAIRWISE)) 2795 !(key->flags & IEEE80211_KEY_FLAG_PAIRWISE)) {
2716 return -EOPNOTSUPP; 2796 key->hw_key_idx = WEP_INVALID_OFFSET;
2797 return 0;
2798 }
2717 2799
2718 sta_id = iwl_sta_id_or_broadcast(priv, vif_priv->ctx, sta); 2800 /* If they key was TX-only, accept deletion */
2719 if (sta_id == IWL_INVALID_STATION) 2801 if (cmd == DISABLE_KEY && key->hw_key_idx == WEP_INVALID_OFFSET)
2720 return -EINVAL; 2802 return 0;
2721 2803
2722 mutex_lock(&priv->mutex); 2804 mutex_lock(&priv->mutex);
2723 iwl_scan_cancel_timeout(priv, 100); 2805 iwl_scan_cancel_timeout(priv, 100);
2724 2806
2807 BUILD_BUG_ON(WEP_INVALID_OFFSET == IWLAGN_HW_KEY_DEFAULT);
2808
2725 /* 2809 /*
2726 * If we are getting WEP group key and we didn't receive any key mapping 2810 * If we are getting WEP group key and we didn't receive any key mapping
2727 * so far, we are in legacy wep mode (group key only), otherwise we are 2811 * so far, we are in legacy wep mode (group key only), otherwise we are
@@ -2729,22 +2813,30 @@ static int iwlagn_mac_set_key(struct ieee80211_hw *hw, enum set_key_cmd cmd,
2729 * In legacy wep mode, we use another host command to the uCode. 2813 * In legacy wep mode, we use another host command to the uCode.
2730 */ 2814 */
2731 if ((key->cipher == WLAN_CIPHER_SUITE_WEP40 || 2815 if ((key->cipher == WLAN_CIPHER_SUITE_WEP40 ||
2732 key->cipher == WLAN_CIPHER_SUITE_WEP104) && 2816 key->cipher == WLAN_CIPHER_SUITE_WEP104) && !sta) {
2733 !sta) {
2734 if (cmd == SET_KEY) 2817 if (cmd == SET_KEY)
2735 is_default_wep_key = !ctx->key_mapping_keys; 2818 is_default_wep_key = !ctx->key_mapping_keys;
2736 else 2819 else
2737 is_default_wep_key = 2820 is_default_wep_key =
2738 (key->hw_key_idx == HW_KEY_DEFAULT); 2821 key->hw_key_idx == IWLAGN_HW_KEY_DEFAULT;
2739 } 2822 }
2740 2823
2824
2741 switch (cmd) { 2825 switch (cmd) {
2742 case SET_KEY: 2826 case SET_KEY:
2743 if (is_default_wep_key) 2827 if (is_default_wep_key) {
2744 ret = iwl_set_default_wep_key(priv, vif_priv->ctx, key); 2828 ret = iwl_set_default_wep_key(priv, vif_priv->ctx, key);
2745 else 2829 break;
2746 ret = iwl_set_dynamic_key(priv, vif_priv->ctx, 2830 }
2747 key, sta_id); 2831 ret = iwl_set_dynamic_key(priv, vif_priv->ctx, key, sta);
2832 if (ret) {
2833 /*
2834 * can't add key for RX, but we don't need it
2835 * in the device for TX so still return 0
2836 */
2837 ret = 0;
2838 key->hw_key_idx = WEP_INVALID_OFFSET;
2839 }
2748 2840
2749 IWL_DEBUG_MAC80211(priv, "enable hwcrypto key\n"); 2841 IWL_DEBUG_MAC80211(priv, "enable hwcrypto key\n");
2750 break; 2842 break;
@@ -2752,7 +2844,7 @@ static int iwlagn_mac_set_key(struct ieee80211_hw *hw, enum set_key_cmd cmd,
2752 if (is_default_wep_key) 2844 if (is_default_wep_key)
2753 ret = iwl_remove_default_wep_key(priv, ctx, key); 2845 ret = iwl_remove_default_wep_key(priv, ctx, key);
2754 else 2846 else
2755 ret = iwl_remove_dynamic_key(priv, ctx, key, sta_id); 2847 ret = iwl_remove_dynamic_key(priv, ctx, key, sta);
2756 2848
2757 IWL_DEBUG_MAC80211(priv, "disable hwcrypto key\n"); 2849 IWL_DEBUG_MAC80211(priv, "disable hwcrypto key\n");
2758 break; 2850 break;
@@ -2799,18 +2891,18 @@ static int iwlagn_mac_ampdu_action(struct ieee80211_hw *hw,
2799 IWL_DEBUG_HT(priv, "start Tx\n"); 2891 IWL_DEBUG_HT(priv, "start Tx\n");
2800 ret = iwlagn_tx_agg_start(priv, vif, sta, tid, ssn); 2892 ret = iwlagn_tx_agg_start(priv, vif, sta, tid, ssn);
2801 if (ret == 0) { 2893 if (ret == 0) {
2802 priv->_agn.agg_tids_count++; 2894 priv->agg_tids_count++;
2803 IWL_DEBUG_HT(priv, "priv->_agn.agg_tids_count = %u\n", 2895 IWL_DEBUG_HT(priv, "priv->agg_tids_count = %u\n",
2804 priv->_agn.agg_tids_count); 2896 priv->agg_tids_count);
2805 } 2897 }
2806 break; 2898 break;
2807 case IEEE80211_AMPDU_TX_STOP: 2899 case IEEE80211_AMPDU_TX_STOP:
2808 IWL_DEBUG_HT(priv, "stop Tx\n"); 2900 IWL_DEBUG_HT(priv, "stop Tx\n");
2809 ret = iwlagn_tx_agg_stop(priv, vif, sta, tid); 2901 ret = iwlagn_tx_agg_stop(priv, vif, sta, tid);
2810 if ((ret == 0) && (priv->_agn.agg_tids_count > 0)) { 2902 if ((ret == 0) && (priv->agg_tids_count > 0)) {
2811 priv->_agn.agg_tids_count--; 2903 priv->agg_tids_count--;
2812 IWL_DEBUG_HT(priv, "priv->_agn.agg_tids_count = %u\n", 2904 IWL_DEBUG_HT(priv, "priv->agg_tids_count = %u\n",
2813 priv->_agn.agg_tids_count); 2905 priv->agg_tids_count);
2814 } 2906 }
2815 if (test_bit(STATUS_EXIT_PENDING, &priv->status)) 2907 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
2816 ret = 0; 2908 ret = 0;
@@ -2828,7 +2920,8 @@ static int iwlagn_mac_ampdu_action(struct ieee80211_hw *hw,
2828 case IEEE80211_AMPDU_TX_OPERATIONAL: 2920 case IEEE80211_AMPDU_TX_OPERATIONAL:
2829 buf_size = min_t(int, buf_size, LINK_QUAL_AGG_FRAME_LIMIT_DEF); 2921 buf_size = min_t(int, buf_size, LINK_QUAL_AGG_FRAME_LIMIT_DEF);
2830 2922
2831 iwlagn_txq_agg_queue_setup(priv, sta, tid, buf_size); 2923 trans_txq_agg_setup(&priv->trans, iwl_sta_id(sta), tid,
2924 buf_size);
2832 2925
2833 /* 2926 /*
2834 * If the limit is 0, then it wasn't initialised yet, 2927 * If the limit is 0, then it wasn't initialised yet,
@@ -2954,7 +3047,7 @@ static void iwlagn_mac_channel_switch(struct ieee80211_hw *hw,
2954 if (!iwl_is_associated_ctx(ctx)) 3047 if (!iwl_is_associated_ctx(ctx))
2955 goto out; 3048 goto out;
2956 3049
2957 if (!priv->cfg->ops->lib->set_channel_switch) 3050 if (!priv->cfg->lib->set_channel_switch)
2958 goto out; 3051 goto out;
2959 3052
2960 ch = channel->hw_value; 3053 ch = channel->hw_value;
@@ -3006,7 +3099,7 @@ static void iwlagn_mac_channel_switch(struct ieee80211_hw *hw,
3006 */ 3099 */
3007 set_bit(STATUS_CHANNEL_SWITCH_PENDING, &priv->status); 3100 set_bit(STATUS_CHANNEL_SWITCH_PENDING, &priv->status);
3008 priv->switch_channel = cpu_to_le16(ch); 3101 priv->switch_channel = cpu_to_le16(ch);
3009 if (priv->cfg->ops->lib->set_channel_switch(priv, ch_switch)) { 3102 if (priv->cfg->lib->set_channel_switch(priv, ch_switch)) {
3010 clear_bit(STATUS_CHANNEL_SWITCH_PENDING, &priv->status); 3103 clear_bit(STATUS_CHANNEL_SWITCH_PENDING, &priv->status);
3011 priv->switch_channel = 0; 3104 priv->switch_channel = 0;
3012 ieee80211_chswitch_done(ctx->vif, false); 3105 ieee80211_chswitch_done(ctx->vif, false);
@@ -3116,7 +3209,7 @@ static void iwlagn_disable_roc(struct iwl_priv *priv)
3116 iwl_set_rxon_channel(priv, chan, ctx); 3209 iwl_set_rxon_channel(priv, chan, ctx);
3117 iwl_set_flags_for_band(priv, ctx, chan->band, NULL); 3210 iwl_set_flags_for_band(priv, ctx, chan->band, NULL);
3118 3211
3119 priv->_agn.hw_roc_channel = NULL; 3212 priv->hw_roc_channel = NULL;
3120 3213
3121 iwlagn_commit_rxon(priv, ctx); 3214 iwlagn_commit_rxon(priv, ctx);
3122 3215
@@ -3126,7 +3219,7 @@ static void iwlagn_disable_roc(struct iwl_priv *priv)
3126static void iwlagn_bg_roc_done(struct work_struct *work) 3219static void iwlagn_bg_roc_done(struct work_struct *work)
3127{ 3220{
3128 struct iwl_priv *priv = container_of(work, struct iwl_priv, 3221 struct iwl_priv *priv = container_of(work, struct iwl_priv,
3129 _agn.hw_roc_work.work); 3222 hw_roc_work.work);
3130 3223
3131 mutex_lock(&priv->mutex); 3224 mutex_lock(&priv->mutex);
3132 ieee80211_remain_on_channel_expired(priv->hw); 3225 ieee80211_remain_on_channel_expired(priv->hw);
@@ -3158,11 +3251,11 @@ static int iwl_mac_remain_on_channel(struct ieee80211_hw *hw,
3158 } 3251 }
3159 3252
3160 priv->contexts[IWL_RXON_CTX_PAN].is_active = true; 3253 priv->contexts[IWL_RXON_CTX_PAN].is_active = true;
3161 priv->_agn.hw_roc_channel = channel; 3254 priv->hw_roc_channel = channel;
3162 priv->_agn.hw_roc_chantype = channel_type; 3255 priv->hw_roc_chantype = channel_type;
3163 priv->_agn.hw_roc_duration = DIV_ROUND_UP(duration * 1000, 1024); 3256 priv->hw_roc_duration = DIV_ROUND_UP(duration * 1000, 1024);
3164 iwlagn_commit_rxon(priv, &priv->contexts[IWL_RXON_CTX_PAN]); 3257 iwlagn_commit_rxon(priv, &priv->contexts[IWL_RXON_CTX_PAN]);
3165 queue_delayed_work(priv->workqueue, &priv->_agn.hw_roc_work, 3258 queue_delayed_work(priv->workqueue, &priv->hw_roc_work,
3166 msecs_to_jiffies(duration + 20)); 3259 msecs_to_jiffies(duration + 20));
3167 3260
3168 msleep(IWL_MIN_SLOT_TIME); /* TU is almost ms */ 3261 msleep(IWL_MIN_SLOT_TIME); /* TU is almost ms */
@@ -3181,7 +3274,7 @@ static int iwl_mac_cancel_remain_on_channel(struct ieee80211_hw *hw)
3181 if (!(priv->valid_contexts & BIT(IWL_RXON_CTX_PAN))) 3274 if (!(priv->valid_contexts & BIT(IWL_RXON_CTX_PAN)))
3182 return -EOPNOTSUPP; 3275 return -EOPNOTSUPP;
3183 3276
3184 cancel_delayed_work_sync(&priv->_agn.hw_roc_work); 3277 cancel_delayed_work_sync(&priv->hw_roc_work);
3185 3278
3186 mutex_lock(&priv->mutex); 3279 mutex_lock(&priv->mutex);
3187 iwlagn_disable_roc(priv); 3280 iwlagn_disable_roc(priv);
@@ -3203,18 +3296,17 @@ static void iwl_setup_deferred_work(struct iwl_priv *priv)
3203 init_waitqueue_head(&priv->wait_command_queue); 3296 init_waitqueue_head(&priv->wait_command_queue);
3204 3297
3205 INIT_WORK(&priv->restart, iwl_bg_restart); 3298 INIT_WORK(&priv->restart, iwl_bg_restart);
3206 INIT_WORK(&priv->rx_replenish, iwl_bg_rx_replenish);
3207 INIT_WORK(&priv->beacon_update, iwl_bg_beacon_update); 3299 INIT_WORK(&priv->beacon_update, iwl_bg_beacon_update);
3208 INIT_WORK(&priv->run_time_calib_work, iwl_bg_run_time_calib_work); 3300 INIT_WORK(&priv->run_time_calib_work, iwl_bg_run_time_calib_work);
3209 INIT_WORK(&priv->tx_flush, iwl_bg_tx_flush); 3301 INIT_WORK(&priv->tx_flush, iwl_bg_tx_flush);
3210 INIT_WORK(&priv->bt_full_concurrency, iwl_bg_bt_full_concurrency); 3302 INIT_WORK(&priv->bt_full_concurrency, iwl_bg_bt_full_concurrency);
3211 INIT_WORK(&priv->bt_runtime_config, iwl_bg_bt_runtime_config); 3303 INIT_WORK(&priv->bt_runtime_config, iwl_bg_bt_runtime_config);
3212 INIT_DELAYED_WORK(&priv->_agn.hw_roc_work, iwlagn_bg_roc_done); 3304 INIT_DELAYED_WORK(&priv->hw_roc_work, iwlagn_bg_roc_done);
3213 3305
3214 iwl_setup_scan_deferred_work(priv); 3306 iwl_setup_scan_deferred_work(priv);
3215 3307
3216 if (priv->cfg->ops->lib->setup_deferred_work) 3308 if (priv->cfg->lib->bt_setup_deferred_work)
3217 priv->cfg->ops->lib->setup_deferred_work(priv); 3309 priv->cfg->lib->bt_setup_deferred_work(priv);
3218 3310
3219 init_timer(&priv->statistics_periodic); 3311 init_timer(&priv->statistics_periodic);
3220 priv->statistics_periodic.data = (unsigned long)priv; 3312 priv->statistics_periodic.data = (unsigned long)priv;
@@ -3227,15 +3319,12 @@ static void iwl_setup_deferred_work(struct iwl_priv *priv)
3227 init_timer(&priv->watchdog); 3319 init_timer(&priv->watchdog);
3228 priv->watchdog.data = (unsigned long)priv; 3320 priv->watchdog.data = (unsigned long)priv;
3229 priv->watchdog.function = iwl_bg_watchdog; 3321 priv->watchdog.function = iwl_bg_watchdog;
3230
3231 tasklet_init(&priv->irq_tasklet, (void (*)(unsigned long))
3232 iwl_irq_tasklet, (unsigned long)priv);
3233} 3322}
3234 3323
3235static void iwl_cancel_deferred_work(struct iwl_priv *priv) 3324static void iwl_cancel_deferred_work(struct iwl_priv *priv)
3236{ 3325{
3237 if (priv->cfg->ops->lib->cancel_deferred_work) 3326 if (priv->cfg->lib->cancel_deferred_work)
3238 priv->cfg->ops->lib->cancel_deferred_work(priv); 3327 priv->cfg->lib->cancel_deferred_work(priv);
3239 3328
3240 cancel_work_sync(&priv->run_time_calib_work); 3329 cancel_work_sync(&priv->run_time_calib_work);
3241 cancel_work_sync(&priv->beacon_update); 3330 cancel_work_sync(&priv->beacon_update);
@@ -3286,7 +3375,7 @@ static int iwl_init_drv(struct iwl_priv *priv)
3286 priv->iw_mode = NL80211_IFTYPE_STATION; 3375 priv->iw_mode = NL80211_IFTYPE_STATION;
3287 priv->current_ht_config.smps = IEEE80211_SMPS_STATIC; 3376 priv->current_ht_config.smps = IEEE80211_SMPS_STATIC;
3288 priv->missed_beacon_threshold = IWL_MISSED_BEACON_THRESHOLD_DEF; 3377 priv->missed_beacon_threshold = IWL_MISSED_BEACON_THRESHOLD_DEF;
3289 priv->_agn.agg_tids_count = 0; 3378 priv->agg_tids_count = 0;
3290 3379
3291 /* initialize force reset */ 3380 /* initialize force reset */
3292 priv->force_reset[IWL_RF_RESET].reset_duration = 3381 priv->force_reset[IWL_RF_RESET].reset_duration =
@@ -3340,6 +3429,9 @@ static void iwl_uninit_drv(struct iwl_priv *priv)
3340 iwl_free_channel_map(priv); 3429 iwl_free_channel_map(priv);
3341 kfree(priv->scan_cmd); 3430 kfree(priv->scan_cmd);
3342 kfree(priv->beacon_cmd); 3431 kfree(priv->beacon_cmd);
3432#ifdef CONFIG_IWLWIFI_DEBUGFS
3433 kfree(priv->wowlan_sram);
3434#endif
3343} 3435}
3344 3436
3345static void iwl_mac_rssi_callback(struct ieee80211_hw *hw, 3437static void iwl_mac_rssi_callback(struct ieee80211_hw *hw,
@@ -3369,6 +3461,8 @@ struct ieee80211_ops iwlagn_hw_ops = {
3369 .tx = iwlagn_mac_tx, 3461 .tx = iwlagn_mac_tx,
3370 .start = iwlagn_mac_start, 3462 .start = iwlagn_mac_start,
3371 .stop = iwlagn_mac_stop, 3463 .stop = iwlagn_mac_stop,
3464 .suspend = iwlagn_mac_suspend,
3465 .resume = iwlagn_mac_resume,
3372 .add_interface = iwl_mac_add_interface, 3466 .add_interface = iwl_mac_add_interface,
3373 .remove_interface = iwl_mac_remove_interface, 3467 .remove_interface = iwl_mac_remove_interface,
3374 .change_interface = iwl_mac_change_interface, 3468 .change_interface = iwl_mac_change_interface,
@@ -3376,6 +3470,7 @@ struct ieee80211_ops iwlagn_hw_ops = {
3376 .configure_filter = iwlagn_configure_filter, 3470 .configure_filter = iwlagn_configure_filter,
3377 .set_key = iwlagn_mac_set_key, 3471 .set_key = iwlagn_mac_set_key,
3378 .update_tkip_key = iwlagn_mac_update_tkip_key, 3472 .update_tkip_key = iwlagn_mac_update_tkip_key,
3473 .set_rekey_data = iwlagn_mac_set_rekey_data,
3379 .conf_tx = iwl_mac_conf_tx, 3474 .conf_tx = iwl_mac_conf_tx,
3380 .bss_info_changed = iwlagn_bss_info_changed, 3475 .bss_info_changed = iwlagn_bss_info_changed,
3381 .ampdu_action = iwlagn_mac_ampdu_action, 3476 .ampdu_action = iwlagn_mac_ampdu_action,
@@ -3415,7 +3510,7 @@ static int iwl_set_hw_params(struct iwl_priv *priv)
3415 priv->cfg->sku &= ~EEPROM_SKU_CAP_11N_ENABLE; 3510 priv->cfg->sku &= ~EEPROM_SKU_CAP_11N_ENABLE;
3416 3511
3417 /* Device-specific setup */ 3512 /* Device-specific setup */
3418 return priv->cfg->ops->lib->set_hw_params(priv); 3513 return priv->cfg->lib->set_hw_params(priv);
3419} 3514}
3420 3515
3421static const u8 iwlagn_bss_ac_to_fifo[] = { 3516static const u8 iwlagn_bss_ac_to_fifo[] = {
@@ -3521,8 +3616,7 @@ static void iwl_init_context(struct iwl_priv *priv)
3521 BUILD_BUG_ON(NUM_IWL_RXON_CTX != 2); 3616 BUILD_BUG_ON(NUM_IWL_RXON_CTX != 2);
3522} 3617}
3523 3618
3524int iwl_probe(void *bus_specific, struct iwl_bus_ops *bus_ops, 3619int iwl_probe(struct iwl_bus *bus, struct iwl_cfg *cfg)
3525 struct iwl_cfg *cfg)
3526{ 3620{
3527 int err = 0; 3621 int err = 0;
3528 struct iwl_priv *priv; 3622 struct iwl_priv *priv;
@@ -3540,19 +3634,12 @@ int iwl_probe(void *bus_specific, struct iwl_bus_ops *bus_ops,
3540 } 3634 }
3541 3635
3542 priv = hw->priv; 3636 priv = hw->priv;
3543 3637 priv->bus = bus;
3544 priv->bus.priv = priv; 3638 bus_set_drv_data(priv->bus, priv);
3545 priv->bus.bus_specific = bus_specific;
3546 priv->bus.ops = bus_ops;
3547 priv->bus.irq = priv->bus.ops->get_irq(&priv->bus);
3548 priv->bus.ops->set_drv_data(&priv->bus, priv);
3549 priv->bus.dev = priv->bus.ops->get_dev(&priv->bus);
3550
3551 iwl_trans_register(&priv->trans);
3552 3639
3553 /* At this point both hw and priv are allocated. */ 3640 /* At this point both hw and priv are allocated. */
3554 3641
3555 SET_IEEE80211_DEV(hw, priv->bus.dev); 3642 SET_IEEE80211_DEV(hw, priv->bus->dev);
3556 3643
3557 IWL_DEBUG_INFO(priv, "*** LOAD DRIVER ***\n"); 3644 IWL_DEBUG_INFO(priv, "*** LOAD DRIVER ***\n");
3558 priv->cfg = cfg; 3645 priv->cfg = cfg;
@@ -3571,7 +3658,6 @@ int iwl_probe(void *bus_specific, struct iwl_bus_ops *bus_ops,
3571 if (iwl_alloc_traffic_mem(priv)) 3658 if (iwl_alloc_traffic_mem(priv))
3572 IWL_ERR(priv, "Not enough memory to generate traffic log\n"); 3659 IWL_ERR(priv, "Not enough memory to generate traffic log\n");
3573 3660
3574
3575 /* these spin locks will be used in apm_ops.init and EEPROM access 3661 /* these spin locks will be used in apm_ops.init and EEPROM access
3576 * we should init now 3662 * we should init now
3577 */ 3663 */
@@ -3592,10 +3678,14 @@ int iwl_probe(void *bus_specific, struct iwl_bus_ops *bus_ops,
3592 IWL_INFO(priv, "Detected %s, REV=0x%X\n", 3678 IWL_INFO(priv, "Detected %s, REV=0x%X\n",
3593 priv->cfg->name, hw_rev); 3679 priv->cfg->name, hw_rev);
3594 3680
3595 if (iwl_prepare_card_hw(priv)) { 3681 err = iwl_trans_register(&priv->trans, priv);
3682 if (err)
3683 goto out_free_traffic_mem;
3684
3685 if (trans_prepare_card_hw(&priv->trans)) {
3596 err = -EIO; 3686 err = -EIO;
3597 IWL_WARN(priv, "Failed, HW not ready\n"); 3687 IWL_WARN(priv, "Failed, HW not ready\n");
3598 goto out_free_traffic_mem; 3688 goto out_free_trans;
3599 } 3689 }
3600 3690
3601 /***************** 3691 /*****************
@@ -3605,7 +3695,7 @@ int iwl_probe(void *bus_specific, struct iwl_bus_ops *bus_ops,
3605 err = iwl_eeprom_init(priv, hw_rev); 3695 err = iwl_eeprom_init(priv, hw_rev);
3606 if (err) { 3696 if (err) {
3607 IWL_ERR(priv, "Unable to init EEPROM\n"); 3697 IWL_ERR(priv, "Unable to init EEPROM\n");
3608 goto out_free_traffic_mem; 3698 goto out_free_trans;
3609 } 3699 }
3610 err = iwl_eeprom_check_version(priv); 3700 err = iwl_eeprom_check_version(priv);
3611 if (err) 3701 if (err)
@@ -3652,15 +3742,6 @@ int iwl_probe(void *bus_specific, struct iwl_bus_ops *bus_ops,
3652 /******************** 3742 /********************
3653 * 7. Setup services 3743 * 7. Setup services
3654 ********************/ 3744 ********************/
3655 iwl_alloc_isr_ict(priv);
3656
3657 err = request_irq(priv->bus.irq, iwl_isr_ict, IRQF_SHARED,
3658 DRV_NAME, priv);
3659 if (err) {
3660 IWL_ERR(priv, "Error allocating IRQ %d\n", priv->bus.irq);
3661 goto out_uninit_drv;
3662 }
3663
3664 iwl_setup_deferred_work(priv); 3745 iwl_setup_deferred_work(priv);
3665 iwl_setup_rx_handlers(priv); 3746 iwl_setup_rx_handlers(priv);
3666 iwl_testmode_init(priv); 3747 iwl_testmode_init(priv);
@@ -3683,7 +3764,7 @@ int iwl_probe(void *bus_specific, struct iwl_bus_ops *bus_ops,
3683 iwl_power_initialize(priv); 3764 iwl_power_initialize(priv);
3684 iwl_tt_initialize(priv); 3765 iwl_tt_initialize(priv);
3685 3766
3686 init_completion(&priv->_agn.firmware_loading_complete); 3767 init_completion(&priv->firmware_loading_complete);
3687 3768
3688 err = iwl_request_firmware(priv, true); 3769 err = iwl_request_firmware(priv, true);
3689 if (err) 3770 if (err)
@@ -3691,19 +3772,18 @@ int iwl_probe(void *bus_specific, struct iwl_bus_ops *bus_ops,
3691 3772
3692 return 0; 3773 return 0;
3693 3774
3694 out_destroy_workqueue: 3775out_destroy_workqueue:
3695 destroy_workqueue(priv->workqueue); 3776 destroy_workqueue(priv->workqueue);
3696 priv->workqueue = NULL; 3777 priv->workqueue = NULL;
3697 free_irq(priv->bus.irq, priv);
3698 iwl_free_isr_ict(priv);
3699 out_uninit_drv:
3700 iwl_uninit_drv(priv); 3778 iwl_uninit_drv(priv);
3701 out_free_eeprom: 3779out_free_eeprom:
3702 iwl_eeprom_free(priv); 3780 iwl_eeprom_free(priv);
3703 out_free_traffic_mem: 3781out_free_trans:
3782 trans_free(&priv->trans);
3783out_free_traffic_mem:
3704 iwl_free_traffic_mem(priv); 3784 iwl_free_traffic_mem(priv);
3705 ieee80211_free_hw(priv->hw); 3785 ieee80211_free_hw(priv->hw);
3706 out: 3786out:
3707 return err; 3787 return err;
3708} 3788}
3709 3789
@@ -3711,12 +3791,12 @@ void __devexit iwl_remove(struct iwl_priv * priv)
3711{ 3791{
3712 unsigned long flags; 3792 unsigned long flags;
3713 3793
3714 wait_for_completion(&priv->_agn.firmware_loading_complete); 3794 wait_for_completion(&priv->firmware_loading_complete);
3715 3795
3716 IWL_DEBUG_INFO(priv, "*** UNLOAD DRIVER ***\n"); 3796 IWL_DEBUG_INFO(priv, "*** UNLOAD DRIVER ***\n");
3717 3797
3718 iwl_dbgfs_unregister(priv); 3798 iwl_dbgfs_unregister(priv);
3719 sysfs_remove_group(&priv->bus.dev->kobj, 3799 sysfs_remove_group(&priv->bus->dev->kobj,
3720 &iwl_attribute_group); 3800 &iwl_attribute_group);
3721 3801
3722 /* ieee80211_unregister_hw call wil cause iwl_mac_stop to 3802 /* ieee80211_unregister_hw call wil cause iwl_mac_stop to
@@ -3745,16 +3825,15 @@ void __devexit iwl_remove(struct iwl_priv * priv)
3745 iwl_disable_interrupts(priv); 3825 iwl_disable_interrupts(priv);
3746 spin_unlock_irqrestore(&priv->lock, flags); 3826 spin_unlock_irqrestore(&priv->lock, flags);
3747 3827
3748 iwl_synchronize_irq(priv); 3828 trans_sync_irq(&priv->trans);
3749 3829
3750 iwl_dealloc_ucode(priv); 3830 iwl_dealloc_ucode(priv);
3751 3831
3752 trans_rx_free(priv); 3832 trans_rx_free(&priv->trans);
3753 trans_tx_free(priv); 3833 trans_tx_free(&priv->trans);
3754 3834
3755 iwl_eeprom_free(priv); 3835 iwl_eeprom_free(priv);
3756 3836
3757
3758 /*netif_stop_queue(dev); */ 3837 /*netif_stop_queue(dev); */
3759 flush_workqueue(priv->workqueue); 3838 flush_workqueue(priv->workqueue);
3760 3839
@@ -3765,12 +3844,11 @@ void __devexit iwl_remove(struct iwl_priv * priv)
3765 priv->workqueue = NULL; 3844 priv->workqueue = NULL;
3766 iwl_free_traffic_mem(priv); 3845 iwl_free_traffic_mem(priv);
3767 3846
3768 free_irq(priv->bus.irq, priv); 3847 trans_free(&priv->trans);
3769 priv->bus.ops->set_drv_data(&priv->bus, NULL);
3770 3848
3771 iwl_uninit_drv(priv); 3849 bus_set_drv_data(priv->bus, NULL);
3772 3850
3773 iwl_free_isr_ict(priv); 3851 iwl_uninit_drv(priv);
3774 3852
3775 dev_kfree_skb(priv->beacon_skb); 3853 dev_kfree_skb(priv->beacon_skb);
3776 3854
diff --git a/drivers/net/wireless/iwlwifi/iwl-agn.h b/drivers/net/wireless/iwlwifi/iwl-agn.h
index 5f58b44bb2a0..d941c4c98e4b 100644
--- a/drivers/net/wireless/iwlwifi/iwl-agn.h
+++ b/drivers/net/wireless/iwlwifi/iwl-agn.h
@@ -113,18 +113,6 @@ extern struct iwl_mod_params iwlagn_mod_params;
113extern struct ieee80211_ops iwlagn_hw_ops; 113extern struct ieee80211_ops iwlagn_hw_ops;
114 114
115int iwl_reset_ict(struct iwl_priv *priv); 115int iwl_reset_ict(struct iwl_priv *priv);
116void iwl_disable_ict(struct iwl_priv *priv);
117int iwl_alloc_isr_ict(struct iwl_priv *priv);
118void iwl_free_isr_ict(struct iwl_priv *priv);
119irqreturn_t iwl_isr_ict(int irq, void *data);
120
121/* call this function to flush any scheduled tasklet */
122static inline void iwl_synchronize_irq(struct iwl_priv *priv)
123{
124 /* wait to make sure we flush pending tasklet*/
125 synchronize_irq(priv->bus.irq);
126 tasklet_kill(&priv->irq_tasklet);
127}
128 116
129static inline void iwl_set_calib_hdr(struct iwl_calib_hdr *hdr, u8 cmd) 117static inline void iwl_set_calib_hdr(struct iwl_calib_hdr *hdr, u8 cmd)
130{ 118{
@@ -134,22 +122,12 @@ static inline void iwl_set_calib_hdr(struct iwl_calib_hdr *hdr, u8 cmd)
134 hdr->data_valid = 1; 122 hdr->data_valid = 1;
135} 123}
136 124
137int iwl_prepare_card_hw(struct iwl_priv *priv);
138
139int iwlagn_start_device(struct iwl_priv *priv);
140void iwlagn_stop_device(struct iwl_priv *priv);
141
142/* tx queue */ 125/* tx queue */
143void iwlagn_set_wr_ptrs(struct iwl_priv *priv,
144 int txq_id, u32 index);
145void iwlagn_tx_queue_set_status(struct iwl_priv *priv,
146 struct iwl_tx_queue *txq,
147 int tx_fifo_id, int scd_retry);
148void iwlagn_txq_set_sched(struct iwl_priv *priv, u32 mask);
149void iwl_free_tfds_in_queue(struct iwl_priv *priv, 126void iwl_free_tfds_in_queue(struct iwl_priv *priv,
150 int sta_id, int tid, int freed); 127 int sta_id, int tid, int freed);
151 128
152/* RXON */ 129/* RXON */
130int iwlagn_set_pan_params(struct iwl_priv *priv);
153int iwlagn_commit_rxon(struct iwl_priv *priv, struct iwl_rxon_context *ctx); 131int iwlagn_commit_rxon(struct iwl_priv *priv, struct iwl_rxon_context *ctx);
154void iwlagn_set_rxon_chain(struct iwl_priv *priv, struct iwl_rxon_context *ctx); 132void iwlagn_set_rxon_chain(struct iwl_priv *priv, struct iwl_rxon_context *ctx);
155int iwlagn_mac_config(struct ieee80211_hw *hw, u32 changed); 133int iwlagn_mac_config(struct ieee80211_hw *hw, u32 changed);
@@ -171,32 +149,24 @@ int iwlagn_load_ucode_wait_alive(struct iwl_priv *priv,
171/* lib */ 149/* lib */
172void iwl_check_abort_status(struct iwl_priv *priv, 150void iwl_check_abort_status(struct iwl_priv *priv,
173 u8 frame_count, u32 status); 151 u8 frame_count, u32 status);
174void iwlagn_rx_handler_setup(struct iwl_priv *priv);
175void iwlagn_setup_deferred_work(struct iwl_priv *priv);
176int iwlagn_hw_valid_rtc_data_addr(u32 addr); 152int iwlagn_hw_valid_rtc_data_addr(u32 addr);
177int iwlagn_send_tx_power(struct iwl_priv *priv); 153int iwlagn_send_tx_power(struct iwl_priv *priv);
178void iwlagn_temperature(struct iwl_priv *priv); 154void iwlagn_temperature(struct iwl_priv *priv);
179u16 iwlagn_eeprom_calib_version(struct iwl_priv *priv); 155u16 iwlagn_eeprom_calib_version(struct iwl_priv *priv);
180int iwlagn_rx_init(struct iwl_priv *priv, struct iwl_rx_queue *rxq);
181int iwlagn_hw_nic_init(struct iwl_priv *priv);
182int iwlagn_wait_tx_queue_empty(struct iwl_priv *priv); 156int iwlagn_wait_tx_queue_empty(struct iwl_priv *priv);
183int iwlagn_txfifo_flush(struct iwl_priv *priv, u16 flush_control); 157int iwlagn_txfifo_flush(struct iwl_priv *priv, u16 flush_control);
184void iwlagn_dev_txfifo_flush(struct iwl_priv *priv, u16 flush_control); 158void iwlagn_dev_txfifo_flush(struct iwl_priv *priv, u16 flush_control);
159int iwlagn_send_beacon_cmd(struct iwl_priv *priv);
185 160
186/* rx */ 161/* rx */
187void iwlagn_rx_queue_restock(struct iwl_priv *priv);
188void iwlagn_rx_allocate(struct iwl_priv *priv, gfp_t priority);
189void iwlagn_rx_replenish(struct iwl_priv *priv);
190void iwlagn_rx_replenish_now(struct iwl_priv *priv);
191int iwlagn_hwrate_to_mac80211_idx(u32 rate_n_flags, enum ieee80211_band band); 162int iwlagn_hwrate_to_mac80211_idx(u32 rate_n_flags, enum ieee80211_band band);
192void iwl_setup_rx_handlers(struct iwl_priv *priv); 163void iwl_setup_rx_handlers(struct iwl_priv *priv);
164void iwl_rx_dispatch(struct iwl_priv *priv, struct iwl_rx_mem_buffer *rxb);
165
193 166
194/* tx */ 167/* tx */
195void iwlagn_txq_free_tfd(struct iwl_priv *priv, struct iwl_tx_queue *txq, 168void iwlagn_txq_free_tfd(struct iwl_priv *priv, struct iwl_tx_queue *txq,
196 int index); 169 int index);
197int iwlagn_txq_attach_buf_to_tfd(struct iwl_priv *priv,
198 struct iwl_tx_queue *txq,
199 dma_addr_t addr, u16 len, u8 reset);
200void iwlagn_hwrate_to_tx_control(struct iwl_priv *priv, u32 rate_n_flags, 170void iwlagn_hwrate_to_tx_control(struct iwl_priv *priv, u32 rate_n_flags,
201 struct ieee80211_tx_info *info); 171 struct ieee80211_tx_info *info);
202int iwlagn_tx_skb(struct iwl_priv *priv, struct sk_buff *skb); 172int iwlagn_tx_skb(struct iwl_priv *priv, struct sk_buff *skb);
@@ -204,13 +174,11 @@ int iwlagn_tx_agg_start(struct iwl_priv *priv, struct ieee80211_vif *vif,
204 struct ieee80211_sta *sta, u16 tid, u16 *ssn); 174 struct ieee80211_sta *sta, u16 tid, u16 *ssn);
205int iwlagn_tx_agg_stop(struct iwl_priv *priv, struct ieee80211_vif *vif, 175int iwlagn_tx_agg_stop(struct iwl_priv *priv, struct ieee80211_vif *vif,
206 struct ieee80211_sta *sta, u16 tid); 176 struct ieee80211_sta *sta, u16 tid);
207void iwlagn_txq_agg_queue_setup(struct iwl_priv *priv,
208 struct ieee80211_sta *sta,
209 int tid, int frame_limit);
210int iwlagn_txq_check_empty(struct iwl_priv *priv, 177int iwlagn_txq_check_empty(struct iwl_priv *priv,
211 int sta_id, u8 tid, int txq_id); 178 int sta_id, u8 tid, int txq_id);
212void iwlagn_rx_reply_compressed_ba(struct iwl_priv *priv, 179void iwlagn_rx_reply_compressed_ba(struct iwl_priv *priv,
213 struct iwl_rx_mem_buffer *rxb); 180 struct iwl_rx_mem_buffer *rxb);
181void iwlagn_rx_reply_tx(struct iwl_priv *priv, struct iwl_rx_mem_buffer *rxb);
214int iwlagn_tx_queue_reclaim(struct iwl_priv *priv, int txq_id, int index); 182int iwlagn_tx_queue_reclaim(struct iwl_priv *priv, int txq_id, int index);
215 183
216static inline u32 iwl_tx_status_to_mac80211(u32 status) 184static inline u32 iwl_tx_status_to_mac80211(u32 status)
@@ -246,17 +214,6 @@ void iwlagn_post_scan(struct iwl_priv *priv);
246int iwlagn_manage_ibss_station(struct iwl_priv *priv, 214int iwlagn_manage_ibss_station(struct iwl_priv *priv,
247 struct ieee80211_vif *vif, bool add); 215 struct ieee80211_vif *vif, bool add);
248 216
249/* hcmd */
250int iwlagn_send_tx_ant_config(struct iwl_priv *priv, u8 valid_tx_ant);
251int iwlagn_send_beacon_cmd(struct iwl_priv *priv);
252int iwlagn_set_pan_params(struct iwl_priv *priv);
253void iwlagn_gain_computation(struct iwl_priv *priv,
254 u32 average_noise[NUM_RX_CHAINS],
255 u16 min_average_noise_antenna_i,
256 u32 min_average_noise,
257 u8 default_chain);
258
259
260/* bt coex */ 217/* bt coex */
261void iwlagn_send_advance_bt_config(struct iwl_priv *priv); 218void iwlagn_send_advance_bt_config(struct iwl_priv *priv);
262void iwlagn_bt_coex_profile_notif(struct iwl_priv *priv, 219void iwlagn_bt_coex_profile_notif(struct iwl_priv *priv,
@@ -289,11 +246,13 @@ int iwl_set_default_wep_key(struct iwl_priv *priv,
289int iwl_restore_default_wep_keys(struct iwl_priv *priv, 246int iwl_restore_default_wep_keys(struct iwl_priv *priv,
290 struct iwl_rxon_context *ctx); 247 struct iwl_rxon_context *ctx);
291int iwl_set_dynamic_key(struct iwl_priv *priv, struct iwl_rxon_context *ctx, 248int iwl_set_dynamic_key(struct iwl_priv *priv, struct iwl_rxon_context *ctx,
292 struct ieee80211_key_conf *key, u8 sta_id); 249 struct ieee80211_key_conf *key,
250 struct ieee80211_sta *sta);
293int iwl_remove_dynamic_key(struct iwl_priv *priv, struct iwl_rxon_context *ctx, 251int iwl_remove_dynamic_key(struct iwl_priv *priv, struct iwl_rxon_context *ctx,
294 struct ieee80211_key_conf *key, u8 sta_id); 252 struct ieee80211_key_conf *key,
253 struct ieee80211_sta *sta);
295void iwl_update_tkip_key(struct iwl_priv *priv, 254void iwl_update_tkip_key(struct iwl_priv *priv,
296 struct iwl_rxon_context *ctx, 255 struct ieee80211_vif *vif,
297 struct ieee80211_key_conf *keyconf, 256 struct ieee80211_key_conf *keyconf,
298 struct ieee80211_sta *sta, u32 iv32, u16 *phase1key); 257 struct ieee80211_sta *sta, u32 iv32, u16 *phase1key);
299int iwl_sta_tx_modify_enable_tid(struct iwl_priv *priv, int sta_id, int tid); 258int iwl_sta_tx_modify_enable_tid(struct iwl_priv *priv, int sta_id, int tid);
@@ -379,8 +338,4 @@ void iwl_testmode_cleanup(struct iwl_priv *priv)
379} 338}
380#endif 339#endif
381 340
382int iwl_probe(void *bus_specific, struct iwl_bus_ops *bus_ops,
383 struct iwl_cfg *cfg);
384void __devexit iwl_remove(struct iwl_priv * priv);
385
386#endif /* __iwl_agn_h__ */ 341#endif /* __iwl_agn_h__ */
diff --git a/drivers/net/wireless/iwlwifi/iwl-pci.h b/drivers/net/wireless/iwlwifi/iwl-bus.h
index 9396c7c8d6a4..f3ee1c0c004c 100644
--- a/drivers/net/wireless/iwlwifi/iwl-pci.h
+++ b/drivers/net/wireless/iwlwifi/iwl-bus.h
@@ -63,6 +63,76 @@
63#ifndef __iwl_pci_h__ 63#ifndef __iwl_pci_h__
64#define __iwl_pci_h__ 64#define __iwl_pci_h__
65 65
66struct iwl_bus;
67
68/**
69 * struct iwl_bus_ops - bus specific operations
70 * @get_pm_support: must returns true if the bus can go to sleep
71 * @apm_config: will be called during the config of the APM configuration
72 * @set_drv_data: set the drv_data pointer to the bus layer
73 * @get_hw_id: prints the hw_id in the provided buffer
74 * @write8: write a byte to register at offset ofs
75 * @write32: write a dword to register at offset ofs
76 * @wread32: read a dword at register at offset ofs
77 */
78struct iwl_bus_ops {
79 bool (*get_pm_support)(struct iwl_bus *bus);
80 void (*apm_config)(struct iwl_bus *bus);
81 void (*set_drv_data)(struct iwl_bus *bus, void *drv_data);
82 void (*get_hw_id)(struct iwl_bus *bus, char buf[], int buf_len);
83 void (*write8)(struct iwl_bus *bus, u32 ofs, u8 val);
84 void (*write32)(struct iwl_bus *bus, u32 ofs, u32 val);
85 u32 (*read32)(struct iwl_bus *bus, u32 ofs);
86};
87
88struct iwl_bus {
89 /* Common data to all buses */
90 void *drv_data; /* driver's context */
91 struct device *dev;
92 struct iwl_bus_ops *ops;
93
94 unsigned int irq;
95
96 /* pointer to bus specific struct */
97 /*Ensure that this pointer will always be aligned to sizeof pointer */
98 char bus_specific[0] __attribute__((__aligned__(sizeof(void *))));
99};
100
101static inline bool bus_get_pm_support(struct iwl_bus *bus)
102{
103 return bus->ops->get_pm_support(bus);
104}
105
106static inline void bus_apm_config(struct iwl_bus *bus)
107{
108 bus->ops->apm_config(bus);
109}
110
111static inline void bus_set_drv_data(struct iwl_bus *bus, void *drv_data)
112{
113 bus->ops->set_drv_data(bus, drv_data);
114}
115
116static inline void bus_get_hw_id(struct iwl_bus *bus, char buf[], int buf_len)
117{
118 bus->ops->get_hw_id(bus, buf, buf_len);
119}
120
121static inline void bus_write8(struct iwl_bus *bus, u32 ofs, u8 val)
122{
123 bus->ops->write8(bus, ofs, val);
124}
125
126static inline void bus_write32(struct iwl_bus *bus, u32 ofs, u32 val)
127{
128 bus->ops->write32(bus, ofs, val);
129}
130
131static inline u32 bus_read32(struct iwl_bus *bus, u32 ofs)
132{
133 return bus->ops->read32(bus, ofs);
134}
135
66int __must_check iwl_pci_register_driver(void); 136int __must_check iwl_pci_register_driver(void);
67void iwl_pci_unregister_driver(void); 137void iwl_pci_unregister_driver(void);
68 138
diff --git a/drivers/net/wireless/iwlwifi/iwl-commands.h b/drivers/net/wireless/iwlwifi/iwl-commands.h
index ee2563777e8d..5769ca5cebca 100644
--- a/drivers/net/wireless/iwlwifi/iwl-commands.h
+++ b/drivers/net/wireless/iwlwifi/iwl-commands.h
@@ -188,6 +188,13 @@ enum {
188 REPLY_WIPAN_NOA_NOTIFICATION = 0xbc, 188 REPLY_WIPAN_NOA_NOTIFICATION = 0xbc,
189 REPLY_WIPAN_DEACTIVATION_COMPLETE = 0xbd, 189 REPLY_WIPAN_DEACTIVATION_COMPLETE = 0xbd,
190 190
191 REPLY_WOWLAN_PATTERNS = 0xe0,
192 REPLY_WOWLAN_WAKEUP_FILTER = 0xe1,
193 REPLY_WOWLAN_TSC_RSC_PARAMS = 0xe2,
194 REPLY_WOWLAN_TKIP_PARAMS = 0xe3,
195 REPLY_WOWLAN_KEK_KCK_MATERIAL = 0xe4,
196 REPLY_WOWLAN_GET_STATUS = 0xe5,
197
191 REPLY_MAX = 0xff 198 REPLY_MAX = 0xff
192}; 199};
193 200
@@ -832,6 +839,8 @@ struct iwl_qosparam_cmd {
832#define STA_KEY_MULTICAST_MSK cpu_to_le16(0x4000) 839#define STA_KEY_MULTICAST_MSK cpu_to_le16(0x4000)
833#define STA_KEY_MAX_NUM 8 840#define STA_KEY_MAX_NUM 8
834#define STA_KEY_MAX_NUM_PAN 16 841#define STA_KEY_MAX_NUM_PAN 16
842/* must not match WEP_INVALID_OFFSET */
843#define IWLAGN_HW_KEY_DEFAULT 0xfe
835 844
836/* Flags indicate whether to modify vs. don't change various station params */ 845/* Flags indicate whether to modify vs. don't change various station params */
837#define STA_MODIFY_KEY_MASK 0x01 846#define STA_MODIFY_KEY_MASK 0x01
@@ -3155,7 +3164,6 @@ struct iwl_enhance_sensitivity_cmd {
3155/* The default calibrate table size if not specified by firmware */ 3164/* The default calibrate table size if not specified by firmware */
3156#define IWL_DEFAULT_STANDARD_PHY_CALIBRATE_TBL_SIZE 18 3165#define IWL_DEFAULT_STANDARD_PHY_CALIBRATE_TBL_SIZE 18
3157enum { 3166enum {
3158 IWL_PHY_CALIBRATE_DIFF_GAIN_CMD = 7,
3159 IWL_PHY_CALIBRATE_DC_CMD = 8, 3167 IWL_PHY_CALIBRATE_DC_CMD = 8,
3160 IWL_PHY_CALIBRATE_LO_CMD = 9, 3168 IWL_PHY_CALIBRATE_LO_CMD = 9,
3161 IWL_PHY_CALIBRATE_TX_IQ_CMD = 11, 3169 IWL_PHY_CALIBRATE_TX_IQ_CMD = 11,
@@ -3168,22 +3176,36 @@ enum {
3168 3176
3169#define IWL_MAX_PHY_CALIBRATE_TBL_SIZE (253) 3177#define IWL_MAX_PHY_CALIBRATE_TBL_SIZE (253)
3170 3178
3171#define IWL_CALIB_INIT_CFG_ALL cpu_to_le32(0xffffffff)
3172
3173/* This enum defines the bitmap of various calibrations to enable in both 3179/* This enum defines the bitmap of various calibrations to enable in both
3174 * init ucode and runtime ucode through CALIBRATION_CFG_CMD. 3180 * init ucode and runtime ucode through CALIBRATION_CFG_CMD.
3175 */ 3181 */
3176enum iwl_ucode_calib_cfg { 3182enum iwl_ucode_calib_cfg {
3177 IWL_CALIB_CFG_RX_BB_IDX, 3183 IWL_CALIB_CFG_RX_BB_IDX = BIT(0),
3178 IWL_CALIB_CFG_DC_IDX, 3184 IWL_CALIB_CFG_DC_IDX = BIT(1),
3179 IWL_CALIB_CFG_TX_IQ_IDX, 3185 IWL_CALIB_CFG_LO_IDX = BIT(2),
3180 IWL_CALIB_CFG_RX_IQ_IDX, 3186 IWL_CALIB_CFG_TX_IQ_IDX = BIT(3),
3181 IWL_CALIB_CFG_NOISE_IDX, 3187 IWL_CALIB_CFG_RX_IQ_IDX = BIT(4),
3182 IWL_CALIB_CFG_CRYSTAL_IDX, 3188 IWL_CALIB_CFG_NOISE_IDX = BIT(5),
3183 IWL_CALIB_CFG_TEMPERATURE_IDX, 3189 IWL_CALIB_CFG_CRYSTAL_IDX = BIT(6),
3184 IWL_CALIB_CFG_PAPD_IDX, 3190 IWL_CALIB_CFG_TEMPERATURE_IDX = BIT(7),
3191 IWL_CALIB_CFG_PAPD_IDX = BIT(8),
3192 IWL_CALIB_CFG_SENSITIVITY_IDX = BIT(9),
3193 IWL_CALIB_CFG_TX_PWR_IDX = BIT(10),
3185}; 3194};
3186 3195
3196#define IWL_CALIB_INIT_CFG_ALL cpu_to_le32(IWL_CALIB_CFG_RX_BB_IDX | \
3197 IWL_CALIB_CFG_DC_IDX | \
3198 IWL_CALIB_CFG_LO_IDX | \
3199 IWL_CALIB_CFG_TX_IQ_IDX | \
3200 IWL_CALIB_CFG_RX_IQ_IDX | \
3201 IWL_CALIB_CFG_NOISE_IDX | \
3202 IWL_CALIB_CFG_CRYSTAL_IDX | \
3203 IWL_CALIB_CFG_TEMPERATURE_IDX | \
3204 IWL_CALIB_CFG_PAPD_IDX | \
3205 IWL_CALIB_CFG_SENSITIVITY_IDX | \
3206 IWL_CALIB_CFG_TX_PWR_IDX)
3207
3208#define IWL_CALIB_CFG_FLAG_SEND_COMPLETE_NTFY_MSK cpu_to_le32(BIT(0))
3187 3209
3188struct iwl_calib_cfg_elmnt_s { 3210struct iwl_calib_cfg_elmnt_s {
3189 __le32 is_enable; 3211 __le32 is_enable;
@@ -3217,15 +3239,6 @@ struct iwl_calib_cmd {
3217 u8 data[0]; 3239 u8 data[0];
3218} __packed; 3240} __packed;
3219 3241
3220/* IWL_PHY_CALIBRATE_DIFF_GAIN_CMD (7) */
3221struct iwl_calib_diff_gain_cmd {
3222 struct iwl_calib_hdr hdr;
3223 s8 diff_gain_a; /* see above */
3224 s8 diff_gain_b;
3225 s8 diff_gain_c;
3226 u8 reserved1;
3227} __packed;
3228
3229struct iwl_calib_xtal_freq_cmd { 3242struct iwl_calib_xtal_freq_cmd {
3230 struct iwl_calib_hdr hdr; 3243 struct iwl_calib_hdr hdr;
3231 u8 cap_pin1; 3244 u8 cap_pin1;
@@ -3233,11 +3246,11 @@ struct iwl_calib_xtal_freq_cmd {
3233 u8 pad[2]; 3246 u8 pad[2];
3234} __packed; 3247} __packed;
3235 3248
3236#define DEFAULT_RADIO_SENSOR_OFFSET 2700 3249#define DEFAULT_RADIO_SENSOR_OFFSET cpu_to_le16(2700)
3237struct iwl_calib_temperature_offset_cmd { 3250struct iwl_calib_temperature_offset_cmd {
3238 struct iwl_calib_hdr hdr; 3251 struct iwl_calib_hdr hdr;
3239 s16 radio_sensor_offset; 3252 __le16 radio_sensor_offset;
3240 s16 reserved; 3253 __le16 reserved;
3241} __packed; 3254} __packed;
3242 3255
3243/* IWL_PHY_CALIBRATE_CHAIN_NOISE_RESET_CMD */ 3256/* IWL_PHY_CALIBRATE_CHAIN_NOISE_RESET_CMD */
@@ -3758,6 +3771,127 @@ struct iwl_bt_coex_prot_env_cmd {
3758 u8 reserved[2]; 3771 u8 reserved[2];
3759} __attribute__((packed)); 3772} __attribute__((packed));
3760 3773
3774/*
3775 * REPLY_WOWLAN_PATTERNS
3776 */
3777#define IWLAGN_WOWLAN_MIN_PATTERN_LEN 16
3778#define IWLAGN_WOWLAN_MAX_PATTERN_LEN 128
3779
3780struct iwlagn_wowlan_pattern {
3781 u8 mask[IWLAGN_WOWLAN_MAX_PATTERN_LEN / 8];
3782 u8 pattern[IWLAGN_WOWLAN_MAX_PATTERN_LEN];
3783 u8 mask_size;
3784 u8 pattern_size;
3785 __le16 reserved;
3786} __packed;
3787
3788#define IWLAGN_WOWLAN_MAX_PATTERNS 20
3789
3790struct iwlagn_wowlan_patterns_cmd {
3791 __le32 n_patterns;
3792 struct iwlagn_wowlan_pattern patterns[];
3793} __packed;
3794
3795/*
3796 * REPLY_WOWLAN_WAKEUP_FILTER
3797 */
3798enum iwlagn_wowlan_wakeup_filters {
3799 IWLAGN_WOWLAN_WAKEUP_MAGIC_PACKET = BIT(0),
3800 IWLAGN_WOWLAN_WAKEUP_PATTERN_MATCH = BIT(1),
3801 IWLAGN_WOWLAN_WAKEUP_BEACON_MISS = BIT(2),
3802 IWLAGN_WOWLAN_WAKEUP_LINK_CHANGE = BIT(3),
3803 IWLAGN_WOWLAN_WAKEUP_GTK_REKEY_FAIL = BIT(4),
3804 IWLAGN_WOWLAN_WAKEUP_RFKILL = BIT(5),
3805 IWLAGN_WOWLAN_WAKEUP_UCODE_ERROR = BIT(6),
3806 IWLAGN_WOWLAN_WAKEUP_EAP_IDENT_REQ = BIT(7),
3807 IWLAGN_WOWLAN_WAKEUP_4WAY_HANDSHAKE = BIT(8),
3808 IWLAGN_WOWLAN_WAKEUP_ALWAYS = BIT(9),
3809 IWLAGN_WOWLAN_WAKEUP_ENABLE_NET_DETECT = BIT(10),
3810};
3811
3812struct iwlagn_wowlan_wakeup_filter_cmd {
3813 __le32 enabled;
3814 __le16 non_qos_seq;
3815 u8 min_sleep_seconds;
3816 u8 reserved;
3817 __le16 qos_seq[8];
3818};
3819
3820/*
3821 * REPLY_WOWLAN_TSC_RSC_PARAMS
3822 */
3823#define IWLAGN_NUM_RSC 16
3824
3825struct tkip_sc {
3826 __le16 iv16;
3827 __le16 pad;
3828 __le32 iv32;
3829} __packed;
3830
3831struct iwlagn_tkip_rsc_tsc {
3832 struct tkip_sc unicast_rsc[IWLAGN_NUM_RSC];
3833 struct tkip_sc multicast_rsc[IWLAGN_NUM_RSC];
3834 struct tkip_sc tsc;
3835} __packed;
3836
3837struct aes_sc {
3838 __le64 pn;
3839} __packed;
3840
3841struct iwlagn_aes_rsc_tsc {
3842 struct aes_sc unicast_rsc[IWLAGN_NUM_RSC];
3843 struct aes_sc multicast_rsc[IWLAGN_NUM_RSC];
3844 struct aes_sc tsc;
3845} __packed;
3846
3847union iwlagn_all_tsc_rsc {
3848 struct iwlagn_tkip_rsc_tsc tkip;
3849 struct iwlagn_aes_rsc_tsc aes;
3850};
3851
3852struct iwlagn_wowlan_rsc_tsc_params_cmd {
3853 union iwlagn_all_tsc_rsc all_tsc_rsc;
3854} __packed;
3855
3856/*
3857 * REPLY_WOWLAN_TKIP_PARAMS
3858 */
3859#define IWLAGN_MIC_KEY_SIZE 8
3860#define IWLAGN_P1K_SIZE 5
3861struct iwlagn_mic_keys {
3862 u8 tx[IWLAGN_MIC_KEY_SIZE];
3863 u8 rx_unicast[IWLAGN_MIC_KEY_SIZE];
3864 u8 rx_mcast[IWLAGN_MIC_KEY_SIZE];
3865} __packed;
3866
3867struct iwlagn_p1k_cache {
3868 __le16 p1k[IWLAGN_P1K_SIZE];
3869} __packed;
3870
3871#define IWLAGN_NUM_RX_P1K_CACHE 2
3872
3873struct iwlagn_wowlan_tkip_params_cmd {
3874 struct iwlagn_mic_keys mic_keys;
3875 struct iwlagn_p1k_cache tx;
3876 struct iwlagn_p1k_cache rx_uni[IWLAGN_NUM_RX_P1K_CACHE];
3877 struct iwlagn_p1k_cache rx_multi[IWLAGN_NUM_RX_P1K_CACHE];
3878} __packed;
3879
3880/*
3881 * REPLY_WOWLAN_KEK_KCK_MATERIAL
3882 */
3883
3884#define IWLAGN_KCK_MAX_SIZE 32
3885#define IWLAGN_KEK_MAX_SIZE 32
3886
3887struct iwlagn_wowlan_kek_kck_material_cmd {
3888 u8 kck[IWLAGN_KCK_MAX_SIZE];
3889 u8 kek[IWLAGN_KEK_MAX_SIZE];
3890 __le16 kck_len;
3891 __le16 kek_len;
3892 __le64 replay_ctr;
3893} __packed;
3894
3761/****************************************************************************** 3895/******************************************************************************
3762 * (13) 3896 * (13)
3763 * Union of all expected notifications/responses: 3897 * Union of all expected notifications/responses:
diff --git a/drivers/net/wireless/iwlwifi/iwl-core.c b/drivers/net/wireless/iwlwifi/iwl-core.c
index fa3d5bacbde2..cf376f62b2f6 100644
--- a/drivers/net/wireless/iwlwifi/iwl-core.c
+++ b/drivers/net/wireless/iwlwifi/iwl-core.c
@@ -211,7 +211,7 @@ int iwlcore_init_geos(struct iwl_priv *priv)
211 if ((priv->bands[IEEE80211_BAND_5GHZ].n_channels == 0) && 211 if ((priv->bands[IEEE80211_BAND_5GHZ].n_channels == 0) &&
212 priv->cfg->sku & EEPROM_SKU_CAP_BAND_52GHZ) { 212 priv->cfg->sku & EEPROM_SKU_CAP_BAND_52GHZ) {
213 char buf[32]; 213 char buf[32];
214 priv->bus.ops->get_hw_id(&priv->bus, buf, sizeof(buf)); 214 bus_get_hw_id(priv->bus, buf, sizeof(buf));
215 IWL_INFO(priv, "Incorrectly detected BG card as ABG. " 215 IWL_INFO(priv, "Incorrectly detected BG card as ABG. "
216 "Please send your %s to maintainer.\n", buf); 216 "Please send your %s to maintainer.\n", buf);
217 priv->cfg->sku &= ~EEPROM_SKU_CAP_BAND_52GHZ; 217 priv->cfg->sku &= ~EEPROM_SKU_CAP_BAND_52GHZ;
@@ -363,6 +363,8 @@ int iwl_send_rxon_timing(struct iwl_priv *priv, struct iwl_rxon_context *ctx)
363 ctx->timing.beacon_interval = cpu_to_le16(beacon_int); 363 ctx->timing.beacon_interval = cpu_to_le16(beacon_int);
364 } 364 }
365 365
366 ctx->beacon_int = beacon_int;
367
366 tsf = priv->timestamp; /* tsf is modifed by do_div: copy it */ 368 tsf = priv->timestamp; /* tsf is modifed by do_div: copy it */
367 interval_tm = beacon_int * TIME_UNIT; 369 interval_tm = beacon_int * TIME_UNIT;
368 rem = do_div(tsf, interval_tm); 370 rem = do_div(tsf, interval_tm);
@@ -376,7 +378,7 @@ int iwl_send_rxon_timing(struct iwl_priv *priv, struct iwl_rxon_context *ctx)
376 le32_to_cpu(ctx->timing.beacon_init_val), 378 le32_to_cpu(ctx->timing.beacon_init_val),
377 le16_to_cpu(ctx->timing.atim_window)); 379 le16_to_cpu(ctx->timing.atim_window));
378 380
379 return trans_send_cmd_pdu(priv, ctx->rxon_timing_cmd, 381 return trans_send_cmd_pdu(&priv->trans, ctx->rxon_timing_cmd,
380 CMD_SYNC, sizeof(ctx->timing), &ctx->timing); 382 CMD_SYNC, sizeof(ctx->timing), &ctx->timing);
381} 383}
382 384
@@ -840,12 +842,12 @@ static void iwlagn_abort_notification_waits(struct iwl_priv *priv)
840 unsigned long flags; 842 unsigned long flags;
841 struct iwl_notification_wait *wait_entry; 843 struct iwl_notification_wait *wait_entry;
842 844
843 spin_lock_irqsave(&priv->_agn.notif_wait_lock, flags); 845 spin_lock_irqsave(&priv->notif_wait_lock, flags);
844 list_for_each_entry(wait_entry, &priv->_agn.notif_waits, list) 846 list_for_each_entry(wait_entry, &priv->notif_waits, list)
845 wait_entry->aborted = true; 847 wait_entry->aborted = true;
846 spin_unlock_irqrestore(&priv->_agn.notif_wait_lock, flags); 848 spin_unlock_irqrestore(&priv->notif_wait_lock, flags);
847 849
848 wake_up_all(&priv->_agn.notif_waitq); 850 wake_up_all(&priv->notif_waitq);
849} 851}
850 852
851void iwlagn_fw_error(struct iwl_priv *priv, bool ondemand) 853void iwlagn_fw_error(struct iwl_priv *priv, bool ondemand)
@@ -1012,7 +1014,7 @@ int iwl_apm_init(struct iwl_priv *priv)
1012 iwl_set_bit(priv, CSR_HW_IF_CONFIG_REG, 1014 iwl_set_bit(priv, CSR_HW_IF_CONFIG_REG,
1013 CSR_HW_IF_CONFIG_REG_BIT_HAP_WAKE_L1A); 1015 CSR_HW_IF_CONFIG_REG_BIT_HAP_WAKE_L1A);
1014 1016
1015 priv->bus.ops->apm_config(&priv->bus); 1017 bus_apm_config(priv->bus);
1016 1018
1017 /* Configure analog phase-lock-loop before activating to D0A */ 1019 /* Configure analog phase-lock-loop before activating to D0A */
1018 if (priv->cfg->base_params->pll_cfg_val) 1020 if (priv->cfg->base_params->pll_cfg_val)
@@ -1132,7 +1134,7 @@ void iwl_send_bt_config(struct iwl_priv *priv)
1132 IWL_DEBUG_INFO(priv, "BT coex %s\n", 1134 IWL_DEBUG_INFO(priv, "BT coex %s\n",
1133 (bt_cmd.flags == BT_COEX_DISABLE) ? "disable" : "active"); 1135 (bt_cmd.flags == BT_COEX_DISABLE) ? "disable" : "active");
1134 1136
1135 if (trans_send_cmd_pdu(priv, REPLY_BT_CONFIG, 1137 if (trans_send_cmd_pdu(&priv->trans, REPLY_BT_CONFIG,
1136 CMD_SYNC, sizeof(struct iwl_bt_cmd), &bt_cmd)) 1138 CMD_SYNC, sizeof(struct iwl_bt_cmd), &bt_cmd))
1137 IWL_ERR(priv, "failed to send BT Coex Config\n"); 1139 IWL_ERR(priv, "failed to send BT Coex Config\n");
1138} 1140}
@@ -1145,12 +1147,12 @@ int iwl_send_statistics_request(struct iwl_priv *priv, u8 flags, bool clear)
1145 }; 1147 };
1146 1148
1147 if (flags & CMD_ASYNC) 1149 if (flags & CMD_ASYNC)
1148 return trans_send_cmd_pdu(priv, REPLY_STATISTICS_CMD, 1150 return trans_send_cmd_pdu(&priv->trans, REPLY_STATISTICS_CMD,
1149 CMD_ASYNC, 1151 CMD_ASYNC,
1150 sizeof(struct iwl_statistics_cmd), 1152 sizeof(struct iwl_statistics_cmd),
1151 &statistics_cmd); 1153 &statistics_cmd);
1152 else 1154 else
1153 return trans_send_cmd_pdu(priv, REPLY_STATISTICS_CMD, 1155 return trans_send_cmd_pdu(&priv->trans, REPLY_STATISTICS_CMD,
1154 CMD_SYNC, 1156 CMD_SYNC,
1155 sizeof(struct iwl_statistics_cmd), 1157 sizeof(struct iwl_statistics_cmd),
1156 &statistics_cmd); 1158 &statistics_cmd);
@@ -1903,8 +1905,12 @@ int iwl_suspend(struct iwl_priv *priv)
1903 * first but since iwl_mac_stop() has no knowledge of who the caller is, 1905 * first but since iwl_mac_stop() has no knowledge of who the caller is,
1904 * it will not call apm_ops.stop() to stop the DMA operation. 1906 * it will not call apm_ops.stop() to stop the DMA operation.
1905 * Calling apm_ops.stop here to make sure we stop the DMA. 1907 * Calling apm_ops.stop here to make sure we stop the DMA.
1908 *
1909 * But of course ... if we have configured WoWLAN then we did other
1910 * things already :-)
1906 */ 1911 */
1907 iwl_apm_stop(priv); 1912 if (!priv->wowlan)
1913 iwl_apm_stop(priv);
1908 1914
1909 return 0; 1915 return 0;
1910} 1916}
diff --git a/drivers/net/wireless/iwlwifi/iwl-core.h b/drivers/net/wireless/iwlwifi/iwl-core.h
index 692c30cb2fac..3e6bb734dcb7 100644
--- a/drivers/net/wireless/iwlwifi/iwl-core.h
+++ b/drivers/net/wireless/iwlwifi/iwl-core.h
@@ -83,14 +83,12 @@ struct iwl_cmd;
83struct iwl_lib_ops { 83struct iwl_lib_ops {
84 /* set hw dependent parameters */ 84 /* set hw dependent parameters */
85 int (*set_hw_params)(struct iwl_priv *priv); 85 int (*set_hw_params)(struct iwl_priv *priv);
86 /* setup Rx handler */ 86 /* setup BT Rx handler */
87 void (*rx_handler_setup)(struct iwl_priv *priv); 87 void (*bt_rx_handler_setup)(struct iwl_priv *priv);
88 /* setup deferred work */ 88 /* setup BT related deferred work */
89 void (*setup_deferred_work)(struct iwl_priv *priv); 89 void (*bt_setup_deferred_work)(struct iwl_priv *priv);
90 /* cancel deferred work */ 90 /* cancel deferred work */
91 void (*cancel_deferred_work)(struct iwl_priv *priv); 91 void (*cancel_deferred_work)(struct iwl_priv *priv);
92 /* check validity of rtc data address */
93 int (*is_valid_rtc_data_addr)(u32 addr);
94 int (*set_channel_switch)(struct iwl_priv *priv, 92 int (*set_channel_switch)(struct iwl_priv *priv,
95 struct ieee80211_channel_switch *ch_switch); 93 struct ieee80211_channel_switch *ch_switch);
96 /* device specific configuration */ 94 /* device specific configuration */
@@ -103,16 +101,6 @@ struct iwl_lib_ops {
103 void (*temperature)(struct iwl_priv *priv); 101 void (*temperature)(struct iwl_priv *priv);
104}; 102};
105 103
106/* NIC specific ops */
107struct iwl_nic_ops {
108 void (*additional_nic_config)(struct iwl_priv *priv);
109};
110
111struct iwl_ops {
112 const struct iwl_lib_ops *lib;
113 const struct iwl_nic_ops *nic;
114};
115
116struct iwl_mod_params { 104struct iwl_mod_params {
117 int sw_crypto; /* def: 0 = using hardware encryption */ 105 int sw_crypto; /* def: 0 = using hardware encryption */
118 int num_of_queues; /* def: HW dependent */ 106 int num_of_queues; /* def: HW dependent */
@@ -199,11 +187,22 @@ struct iwl_ht_params {
199 187
200/** 188/**
201 * struct iwl_cfg 189 * struct iwl_cfg
190 * @name: Offical name of the device
202 * @fw_name_pre: Firmware filename prefix. The api version and extension 191 * @fw_name_pre: Firmware filename prefix. The api version and extension
203 * (.ucode) will be added to filename before loading from disk. The 192 * (.ucode) will be added to filename before loading from disk. The
204 * filename is constructed as fw_name_pre<api>.ucode. 193 * filename is constructed as fw_name_pre<api>.ucode.
205 * @ucode_api_max: Highest version of uCode API supported by driver. 194 * @ucode_api_max: Highest version of uCode API supported by driver.
206 * @ucode_api_min: Lowest version of uCode API supported by driver. 195 * @ucode_api_min: Lowest version of uCode API supported by driver.
196 * @valid_tx_ant: valid transmit antenna
197 * @valid_rx_ant: valid receive antenna
198 * @sku: sku information from EEPROM
199 * @eeprom_ver: EEPROM version
200 * @eeprom_calib_ver: EEPROM calibration version
201 * @lib: pointer to the lib ops
202 * @additional_nic_config: additional nic configuration
203 * @base_params: pointer to basic parameters
204 * @ht_params: point to ht patameters
205 * @bt_params: pointer to bt parameters
207 * @pa_type: used by 6000 series only to identify the type of Power Amplifier 206 * @pa_type: used by 6000 series only to identify the type of Power Amplifier
208 * @need_dc_calib: need to perform init dc calibration 207 * @need_dc_calib: need to perform init dc calibration
209 * @need_temp_offset_calib: need to perform temperature offset calibration 208 * @need_temp_offset_calib: need to perform temperature offset calibration
@@ -213,7 +212,6 @@ struct iwl_ht_params {
213 * @rx_with_siso_diversity: 1x1 device with rx antenna diversity 212 * @rx_with_siso_diversity: 1x1 device with rx antenna diversity
214 * @internal_wimax_coex: internal wifi/wimax combo device 213 * @internal_wimax_coex: internal wifi/wimax combo device
215 * @iq_invert: I/Q inversion 214 * @iq_invert: I/Q inversion
216 * @disable_otp_refresh: disable OTP refresh current limit
217 * 215 *
218 * We enable the driver to be backward compatible wrt API version. The 216 * We enable the driver to be backward compatible wrt API version. The
219 * driver specifies which APIs it supports (with @ucode_api_max being the 217 * driver specifies which APIs it supports (with @ucode_api_max being the
@@ -230,11 +228,7 @@ struct iwl_ht_params {
230 * } 228 * }
231 * 229 *
232 * The ideal usage of this infrastructure is to treat a new ucode API 230 * The ideal usage of this infrastructure is to treat a new ucode API
233 * release as a new hardware revision. That is, through utilizing the 231 * release as a new hardware revision.
234 * iwl_hcmd_utils_ops etc. we accommodate different command structures
235 * and flows between hardware versions (4965/5000) as well as their API
236 * versions.
237 *
238 */ 232 */
239struct iwl_cfg { 233struct iwl_cfg {
240 /* params specific to an individual device within a device family */ 234 /* params specific to an individual device within a device family */
@@ -247,7 +241,8 @@ struct iwl_cfg {
247 u16 sku; 241 u16 sku;
248 u16 eeprom_ver; 242 u16 eeprom_ver;
249 u16 eeprom_calib_ver; 243 u16 eeprom_calib_ver;
250 const struct iwl_ops *ops; 244 const struct iwl_lib_ops *lib;
245 void (*additional_nic_config)(struct iwl_priv *priv);
251 /* params not likely to change within a device family */ 246 /* params not likely to change within a device family */
252 struct iwl_base_params *base_params; 247 struct iwl_base_params *base_params;
253 /* params likely to change within a device family */ 248 /* params likely to change within a device family */
@@ -262,7 +257,6 @@ struct iwl_cfg {
262 const bool rx_with_siso_diversity; 257 const bool rx_with_siso_diversity;
263 const bool internal_wimax_coex; 258 const bool internal_wimax_coex;
264 const bool iq_invert; 259 const bool iq_invert;
265 const bool disable_otp_refresh;
266}; 260};
267 261
268/*************************** 262/***************************
@@ -340,21 +334,8 @@ static inline void iwl_update_stats(struct iwl_priv *priv, bool is_tx,
340/***************************************************** 334/*****************************************************
341* RX 335* RX
342******************************************************/ 336******************************************************/
343void iwl_rx_queue_update_write_ptr(struct iwl_priv *priv,
344 struct iwl_rx_queue *q);
345int iwl_rx_queue_space(const struct iwl_rx_queue *q);
346void iwl_tx_cmd_complete(struct iwl_priv *priv, struct iwl_rx_mem_buffer *rxb);
347
348void iwl_chswitch_done(struct iwl_priv *priv, bool is_success); 337void iwl_chswitch_done(struct iwl_priv *priv, bool is_success);
349 338
350/* TX helpers */
351
352/*****************************************************
353* TX
354******************************************************/
355void iwl_txq_update_write_ptr(struct iwl_priv *priv, struct iwl_tx_queue *txq);
356int iwl_queue_init(struct iwl_priv *priv, struct iwl_queue *q,
357 int count, int slots_num, u32 id);
358void iwl_setup_watchdog(struct iwl_priv *priv); 339void iwl_setup_watchdog(struct iwl_priv *priv);
359/***************************************************** 340/*****************************************************
360 * TX power 341 * TX power
@@ -405,12 +386,6 @@ int __must_check iwl_scan_initiate(struct iwl_priv *priv,
405 *****************************************************/ 386 *****************************************************/
406 387
407const char *get_cmd_string(u8 cmd); 388const char *get_cmd_string(u8 cmd);
408int iwl_send_cmd(struct iwl_priv *priv, struct iwl_host_cmd *cmd);
409int __must_check iwl_send_cmd_pdu(struct iwl_priv *priv, u8 id, u32 flags,
410 u16 len, const void *data);
411
412int iwl_enqueue_hcmd(struct iwl_priv *priv, struct iwl_host_cmd *cmd);
413
414void iwl_bg_watchdog(unsigned long data); 389void iwl_bg_watchdog(unsigned long data);
415u32 iwl_usecs_to_beacons(struct iwl_priv *priv, u32 usec, u32 beacon_interval); 390u32 iwl_usecs_to_beacons(struct iwl_priv *priv, u32 usec, u32 beacon_interval);
416__le32 iwl_add_beacon_time(struct iwl_priv *priv, u32 base, 391__le32 iwl_add_beacon_time(struct iwl_priv *priv, u32 base,
@@ -421,6 +396,9 @@ int iwl_suspend(struct iwl_priv *priv);
421int iwl_resume(struct iwl_priv *priv); 396int iwl_resume(struct iwl_priv *priv);
422#endif /* !CONFIG_PM */ 397#endif /* !CONFIG_PM */
423 398
399int iwl_probe(struct iwl_bus *bus, struct iwl_cfg *cfg);
400void __devexit iwl_remove(struct iwl_priv * priv);
401
424/***************************************************** 402/*****************************************************
425* Error Handling Debugging 403* Error Handling Debugging
426******************************************************/ 404******************************************************/
diff --git a/drivers/net/wireless/iwlwifi/iwl-csr.h b/drivers/net/wireless/iwlwifi/iwl-csr.h
index 5ab90ba7a024..d6dbb0423045 100644
--- a/drivers/net/wireless/iwlwifi/iwl-csr.h
+++ b/drivers/net/wireless/iwlwifi/iwl-csr.h
@@ -351,6 +351,7 @@
351#define CSR_UCODE_SW_BIT_RFKILL (0x00000002) 351#define CSR_UCODE_SW_BIT_RFKILL (0x00000002)
352#define CSR_UCODE_DRV_GP1_BIT_CMD_BLOCKED (0x00000004) 352#define CSR_UCODE_DRV_GP1_BIT_CMD_BLOCKED (0x00000004)
353#define CSR_UCODE_DRV_GP1_REG_BIT_CT_KILL_EXIT (0x00000008) 353#define CSR_UCODE_DRV_GP1_REG_BIT_CT_KILL_EXIT (0x00000008)
354#define CSR_UCODE_DRV_GP1_BIT_D3_CFG_COMPLETE (0x00000020)
354 355
355/* GP Driver */ 356/* GP Driver */
356#define CSR_GP_DRIVER_REG_BIT_RADIO_SKU_MSK (0x00000003) 357#define CSR_GP_DRIVER_REG_BIT_RADIO_SKU_MSK (0x00000003)
diff --git a/drivers/net/wireless/iwlwifi/iwl-debug.h b/drivers/net/wireless/iwlwifi/iwl-debug.h
index eb95d1a37487..f9a407e40aff 100644
--- a/drivers/net/wireless/iwlwifi/iwl-debug.h
+++ b/drivers/net/wireless/iwlwifi/iwl-debug.h
@@ -32,10 +32,10 @@
32struct iwl_priv; 32struct iwl_priv;
33extern u32 iwl_debug_level; 33extern u32 iwl_debug_level;
34 34
35#define IWL_ERR(p, f, a...) dev_err(p->bus.ops->get_dev(&p->bus), f, ## a) 35#define IWL_ERR(p, f, a...) dev_err(p->bus->dev, f, ## a)
36#define IWL_WARN(p, f, a...) dev_warn(p->bus.ops->get_dev(&p->bus), f, ## a) 36#define IWL_WARN(p, f, a...) dev_warn(p->bus->dev, f, ## a)
37#define IWL_INFO(p, f, a...) dev_info(p->bus.ops->get_dev(&p->bus), f, ## a) 37#define IWL_INFO(p, f, a...) dev_info(p->bus->dev, f, ## a)
38#define IWL_CRIT(p, f, a...) dev_crit(p->bus.ops->get_dev(&p->bus), f, ## a) 38#define IWL_CRIT(p, f, a...) dev_crit(p->bus->dev, f, ## a)
39 39
40#define iwl_print_hex_error(priv, p, len) \ 40#define iwl_print_hex_error(priv, p, len) \
41do { \ 41do { \
@@ -78,8 +78,6 @@ static inline void iwl_print_hex_dump(struct iwl_priv *priv, int level,
78#ifdef CONFIG_IWLWIFI_DEBUGFS 78#ifdef CONFIG_IWLWIFI_DEBUGFS
79int iwl_dbgfs_register(struct iwl_priv *priv, const char *name); 79int iwl_dbgfs_register(struct iwl_priv *priv, const char *name);
80void iwl_dbgfs_unregister(struct iwl_priv *priv); 80void iwl_dbgfs_unregister(struct iwl_priv *priv);
81extern int iwl_dbgfs_statistics_flag(struct iwl_priv *priv, char *buf,
82 int bufsz);
83#else 81#else
84static inline int iwl_dbgfs_register(struct iwl_priv *priv, const char *name) 82static inline int iwl_dbgfs_register(struct iwl_priv *priv, const char *name)
85{ 83{
diff --git a/drivers/net/wireless/iwlwifi/iwl-debugfs.c b/drivers/net/wireless/iwlwifi/iwl-debugfs.c
index 6f9ebae8ca06..ec1485b2d3fe 100644
--- a/drivers/net/wireless/iwlwifi/iwl-debugfs.c
+++ b/drivers/net/wireless/iwlwifi/iwl-debugfs.c
@@ -322,6 +322,19 @@ static ssize_t iwl_dbgfs_sram_write(struct file *file,
322 return count; 322 return count;
323} 323}
324 324
325static ssize_t iwl_dbgfs_wowlan_sram_read(struct file *file,
326 char __user *user_buf,
327 size_t count, loff_t *ppos)
328{
329 struct iwl_priv *priv = file->private_data;
330
331 if (!priv->wowlan_sram)
332 return -ENODATA;
333
334 return simple_read_from_buffer(user_buf, count, ppos,
335 priv->wowlan_sram,
336 priv->ucode_wowlan.data.len);
337}
325static ssize_t iwl_dbgfs_stations_read(struct file *file, char __user *user_buf, 338static ssize_t iwl_dbgfs_stations_read(struct file *file, char __user *user_buf,
326 size_t count, loff_t *ppos) 339 size_t count, loff_t *ppos)
327{ 340{
@@ -856,6 +869,7 @@ static ssize_t iwl_dbgfs_current_sleep_command_read(struct file *file,
856} 869}
857 870
858DEBUGFS_READ_WRITE_FILE_OPS(sram); 871DEBUGFS_READ_WRITE_FILE_OPS(sram);
872DEBUGFS_READ_FILE_OPS(wowlan_sram);
859DEBUGFS_READ_WRITE_FILE_OPS(log_event); 873DEBUGFS_READ_WRITE_FILE_OPS(log_event);
860DEBUGFS_READ_FILE_OPS(nvm); 874DEBUGFS_READ_FILE_OPS(nvm);
861DEBUGFS_READ_FILE_OPS(stations); 875DEBUGFS_READ_FILE_OPS(stations);
@@ -1915,121 +1929,121 @@ static ssize_t iwl_dbgfs_reply_tx_error_read(struct file *file,
1915 pos += scnprintf(buf + pos, bufsz - pos, "Statistics_TX_Error:\n"); 1929 pos += scnprintf(buf + pos, bufsz - pos, "Statistics_TX_Error:\n");
1916 pos += scnprintf(buf + pos, bufsz - pos, "%s:\t\t\t\t%u\n", 1930 pos += scnprintf(buf + pos, bufsz - pos, "%s:\t\t\t\t%u\n",
1917 iwl_get_tx_fail_reason(TX_STATUS_POSTPONE_DELAY), 1931 iwl_get_tx_fail_reason(TX_STATUS_POSTPONE_DELAY),
1918 priv->_agn.reply_tx_stats.pp_delay); 1932 priv->reply_tx_stats.pp_delay);
1919 pos += scnprintf(buf + pos, bufsz - pos, "%s:\t\t\t%u\n", 1933 pos += scnprintf(buf + pos, bufsz - pos, "%s:\t\t\t%u\n",
1920 iwl_get_tx_fail_reason(TX_STATUS_POSTPONE_FEW_BYTES), 1934 iwl_get_tx_fail_reason(TX_STATUS_POSTPONE_FEW_BYTES),
1921 priv->_agn.reply_tx_stats.pp_few_bytes); 1935 priv->reply_tx_stats.pp_few_bytes);
1922 pos += scnprintf(buf + pos, bufsz - pos, "%s:\t\t\t%u\n", 1936 pos += scnprintf(buf + pos, bufsz - pos, "%s:\t\t\t%u\n",
1923 iwl_get_tx_fail_reason(TX_STATUS_POSTPONE_BT_PRIO), 1937 iwl_get_tx_fail_reason(TX_STATUS_POSTPONE_BT_PRIO),
1924 priv->_agn.reply_tx_stats.pp_bt_prio); 1938 priv->reply_tx_stats.pp_bt_prio);
1925 pos += scnprintf(buf + pos, bufsz - pos, "%s:\t\t\t%u\n", 1939 pos += scnprintf(buf + pos, bufsz - pos, "%s:\t\t\t%u\n",
1926 iwl_get_tx_fail_reason(TX_STATUS_POSTPONE_QUIET_PERIOD), 1940 iwl_get_tx_fail_reason(TX_STATUS_POSTPONE_QUIET_PERIOD),
1927 priv->_agn.reply_tx_stats.pp_quiet_period); 1941 priv->reply_tx_stats.pp_quiet_period);
1928 pos += scnprintf(buf + pos, bufsz - pos, "%s:\t\t\t%u\n", 1942 pos += scnprintf(buf + pos, bufsz - pos, "%s:\t\t\t%u\n",
1929 iwl_get_tx_fail_reason(TX_STATUS_POSTPONE_CALC_TTAK), 1943 iwl_get_tx_fail_reason(TX_STATUS_POSTPONE_CALC_TTAK),
1930 priv->_agn.reply_tx_stats.pp_calc_ttak); 1944 priv->reply_tx_stats.pp_calc_ttak);
1931 pos += scnprintf(buf + pos, bufsz - pos, "%s:\t\t%u\n", 1945 pos += scnprintf(buf + pos, bufsz - pos, "%s:\t\t%u\n",
1932 iwl_get_tx_fail_reason( 1946 iwl_get_tx_fail_reason(
1933 TX_STATUS_FAIL_INTERNAL_CROSSED_RETRY), 1947 TX_STATUS_FAIL_INTERNAL_CROSSED_RETRY),
1934 priv->_agn.reply_tx_stats.int_crossed_retry); 1948 priv->reply_tx_stats.int_crossed_retry);
1935 pos += scnprintf(buf + pos, bufsz - pos, "%s:\t\t\t%u\n", 1949 pos += scnprintf(buf + pos, bufsz - pos, "%s:\t\t\t%u\n",
1936 iwl_get_tx_fail_reason(TX_STATUS_FAIL_SHORT_LIMIT), 1950 iwl_get_tx_fail_reason(TX_STATUS_FAIL_SHORT_LIMIT),
1937 priv->_agn.reply_tx_stats.short_limit); 1951 priv->reply_tx_stats.short_limit);
1938 pos += scnprintf(buf + pos, bufsz - pos, "%s:\t\t\t%u\n", 1952 pos += scnprintf(buf + pos, bufsz - pos, "%s:\t\t\t%u\n",
1939 iwl_get_tx_fail_reason(TX_STATUS_FAIL_LONG_LIMIT), 1953 iwl_get_tx_fail_reason(TX_STATUS_FAIL_LONG_LIMIT),
1940 priv->_agn.reply_tx_stats.long_limit); 1954 priv->reply_tx_stats.long_limit);
1941 pos += scnprintf(buf + pos, bufsz - pos, "%s:\t\t\t%u\n", 1955 pos += scnprintf(buf + pos, bufsz - pos, "%s:\t\t\t%u\n",
1942 iwl_get_tx_fail_reason(TX_STATUS_FAIL_FIFO_UNDERRUN), 1956 iwl_get_tx_fail_reason(TX_STATUS_FAIL_FIFO_UNDERRUN),
1943 priv->_agn.reply_tx_stats.fifo_underrun); 1957 priv->reply_tx_stats.fifo_underrun);
1944 pos += scnprintf(buf + pos, bufsz - pos, "%s:\t\t\t%u\n", 1958 pos += scnprintf(buf + pos, bufsz - pos, "%s:\t\t\t%u\n",
1945 iwl_get_tx_fail_reason(TX_STATUS_FAIL_DRAIN_FLOW), 1959 iwl_get_tx_fail_reason(TX_STATUS_FAIL_DRAIN_FLOW),
1946 priv->_agn.reply_tx_stats.drain_flow); 1960 priv->reply_tx_stats.drain_flow);
1947 pos += scnprintf(buf + pos, bufsz - pos, "%s:\t\t\t%u\n", 1961 pos += scnprintf(buf + pos, bufsz - pos, "%s:\t\t\t%u\n",
1948 iwl_get_tx_fail_reason(TX_STATUS_FAIL_RFKILL_FLUSH), 1962 iwl_get_tx_fail_reason(TX_STATUS_FAIL_RFKILL_FLUSH),
1949 priv->_agn.reply_tx_stats.rfkill_flush); 1963 priv->reply_tx_stats.rfkill_flush);
1950 pos += scnprintf(buf + pos, bufsz - pos, "%s:\t\t\t%u\n", 1964 pos += scnprintf(buf + pos, bufsz - pos, "%s:\t\t\t%u\n",
1951 iwl_get_tx_fail_reason(TX_STATUS_FAIL_LIFE_EXPIRE), 1965 iwl_get_tx_fail_reason(TX_STATUS_FAIL_LIFE_EXPIRE),
1952 priv->_agn.reply_tx_stats.life_expire); 1966 priv->reply_tx_stats.life_expire);
1953 pos += scnprintf(buf + pos, bufsz - pos, "%s:\t\t\t%u\n", 1967 pos += scnprintf(buf + pos, bufsz - pos, "%s:\t\t\t%u\n",
1954 iwl_get_tx_fail_reason(TX_STATUS_FAIL_DEST_PS), 1968 iwl_get_tx_fail_reason(TX_STATUS_FAIL_DEST_PS),
1955 priv->_agn.reply_tx_stats.dest_ps); 1969 priv->reply_tx_stats.dest_ps);
1956 pos += scnprintf(buf + pos, bufsz - pos, "%s:\t\t\t%u\n", 1970 pos += scnprintf(buf + pos, bufsz - pos, "%s:\t\t\t%u\n",
1957 iwl_get_tx_fail_reason(TX_STATUS_FAIL_HOST_ABORTED), 1971 iwl_get_tx_fail_reason(TX_STATUS_FAIL_HOST_ABORTED),
1958 priv->_agn.reply_tx_stats.host_abort); 1972 priv->reply_tx_stats.host_abort);
1959 pos += scnprintf(buf + pos, bufsz - pos, "%s:\t\t\t%u\n", 1973 pos += scnprintf(buf + pos, bufsz - pos, "%s:\t\t\t%u\n",
1960 iwl_get_tx_fail_reason(TX_STATUS_FAIL_BT_RETRY), 1974 iwl_get_tx_fail_reason(TX_STATUS_FAIL_BT_RETRY),
1961 priv->_agn.reply_tx_stats.pp_delay); 1975 priv->reply_tx_stats.pp_delay);
1962 pos += scnprintf(buf + pos, bufsz - pos, "%s:\t\t\t%u\n", 1976 pos += scnprintf(buf + pos, bufsz - pos, "%s:\t\t\t%u\n",
1963 iwl_get_tx_fail_reason(TX_STATUS_FAIL_STA_INVALID), 1977 iwl_get_tx_fail_reason(TX_STATUS_FAIL_STA_INVALID),
1964 priv->_agn.reply_tx_stats.sta_invalid); 1978 priv->reply_tx_stats.sta_invalid);
1965 pos += scnprintf(buf + pos, bufsz - pos, "%s:\t\t\t%u\n", 1979 pos += scnprintf(buf + pos, bufsz - pos, "%s:\t\t\t%u\n",
1966 iwl_get_tx_fail_reason(TX_STATUS_FAIL_FRAG_DROPPED), 1980 iwl_get_tx_fail_reason(TX_STATUS_FAIL_FRAG_DROPPED),
1967 priv->_agn.reply_tx_stats.frag_drop); 1981 priv->reply_tx_stats.frag_drop);
1968 pos += scnprintf(buf + pos, bufsz - pos, "%s:\t\t\t%u\n", 1982 pos += scnprintf(buf + pos, bufsz - pos, "%s:\t\t\t%u\n",
1969 iwl_get_tx_fail_reason(TX_STATUS_FAIL_TID_DISABLE), 1983 iwl_get_tx_fail_reason(TX_STATUS_FAIL_TID_DISABLE),
1970 priv->_agn.reply_tx_stats.tid_disable); 1984 priv->reply_tx_stats.tid_disable);
1971 pos += scnprintf(buf + pos, bufsz - pos, "%s:\t\t\t%u\n", 1985 pos += scnprintf(buf + pos, bufsz - pos, "%s:\t\t\t%u\n",
1972 iwl_get_tx_fail_reason(TX_STATUS_FAIL_FIFO_FLUSHED), 1986 iwl_get_tx_fail_reason(TX_STATUS_FAIL_FIFO_FLUSHED),
1973 priv->_agn.reply_tx_stats.fifo_flush); 1987 priv->reply_tx_stats.fifo_flush);
1974 pos += scnprintf(buf + pos, bufsz - pos, "%s:\t\t%u\n", 1988 pos += scnprintf(buf + pos, bufsz - pos, "%s:\t\t%u\n",
1975 iwl_get_tx_fail_reason( 1989 iwl_get_tx_fail_reason(
1976 TX_STATUS_FAIL_INSUFFICIENT_CF_POLL), 1990 TX_STATUS_FAIL_INSUFFICIENT_CF_POLL),
1977 priv->_agn.reply_tx_stats.insuff_cf_poll); 1991 priv->reply_tx_stats.insuff_cf_poll);
1978 pos += scnprintf(buf + pos, bufsz - pos, "%s:\t\t\t%u\n", 1992 pos += scnprintf(buf + pos, bufsz - pos, "%s:\t\t\t%u\n",
1979 iwl_get_tx_fail_reason(TX_STATUS_FAIL_PASSIVE_NO_RX), 1993 iwl_get_tx_fail_reason(TX_STATUS_FAIL_PASSIVE_NO_RX),
1980 priv->_agn.reply_tx_stats.fail_hw_drop); 1994 priv->reply_tx_stats.fail_hw_drop);
1981 pos += scnprintf(buf + pos, bufsz - pos, "%s:\t\t%u\n", 1995 pos += scnprintf(buf + pos, bufsz - pos, "%s:\t\t%u\n",
1982 iwl_get_tx_fail_reason( 1996 iwl_get_tx_fail_reason(
1983 TX_STATUS_FAIL_NO_BEACON_ON_RADAR), 1997 TX_STATUS_FAIL_NO_BEACON_ON_RADAR),
1984 priv->_agn.reply_tx_stats.sta_color_mismatch); 1998 priv->reply_tx_stats.sta_color_mismatch);
1985 pos += scnprintf(buf + pos, bufsz - pos, "UNKNOWN:\t\t\t%u\n", 1999 pos += scnprintf(buf + pos, bufsz - pos, "UNKNOWN:\t\t\t%u\n",
1986 priv->_agn.reply_tx_stats.unknown); 2000 priv->reply_tx_stats.unknown);
1987 2001
1988 pos += scnprintf(buf + pos, bufsz - pos, 2002 pos += scnprintf(buf + pos, bufsz - pos,
1989 "\nStatistics_Agg_TX_Error:\n"); 2003 "\nStatistics_Agg_TX_Error:\n");
1990 2004
1991 pos += scnprintf(buf + pos, bufsz - pos, "%s:\t\t\t%u\n", 2005 pos += scnprintf(buf + pos, bufsz - pos, "%s:\t\t\t%u\n",
1992 iwl_get_agg_tx_fail_reason(AGG_TX_STATE_UNDERRUN_MSK), 2006 iwl_get_agg_tx_fail_reason(AGG_TX_STATE_UNDERRUN_MSK),
1993 priv->_agn.reply_agg_tx_stats.underrun); 2007 priv->reply_agg_tx_stats.underrun);
1994 pos += scnprintf(buf + pos, bufsz - pos, "%s:\t\t\t%u\n", 2008 pos += scnprintf(buf + pos, bufsz - pos, "%s:\t\t\t%u\n",
1995 iwl_get_agg_tx_fail_reason(AGG_TX_STATE_BT_PRIO_MSK), 2009 iwl_get_agg_tx_fail_reason(AGG_TX_STATE_BT_PRIO_MSK),
1996 priv->_agn.reply_agg_tx_stats.bt_prio); 2010 priv->reply_agg_tx_stats.bt_prio);
1997 pos += scnprintf(buf + pos, bufsz - pos, "%s:\t\t\t%u\n", 2011 pos += scnprintf(buf + pos, bufsz - pos, "%s:\t\t\t%u\n",
1998 iwl_get_agg_tx_fail_reason(AGG_TX_STATE_FEW_BYTES_MSK), 2012 iwl_get_agg_tx_fail_reason(AGG_TX_STATE_FEW_BYTES_MSK),
1999 priv->_agn.reply_agg_tx_stats.few_bytes); 2013 priv->reply_agg_tx_stats.few_bytes);
2000 pos += scnprintf(buf + pos, bufsz - pos, "%s:\t\t\t%u\n", 2014 pos += scnprintf(buf + pos, bufsz - pos, "%s:\t\t\t%u\n",
2001 iwl_get_agg_tx_fail_reason(AGG_TX_STATE_ABORT_MSK), 2015 iwl_get_agg_tx_fail_reason(AGG_TX_STATE_ABORT_MSK),
2002 priv->_agn.reply_agg_tx_stats.abort); 2016 priv->reply_agg_tx_stats.abort);
2003 pos += scnprintf(buf + pos, bufsz - pos, "%s:\t\t%u\n", 2017 pos += scnprintf(buf + pos, bufsz - pos, "%s:\t\t%u\n",
2004 iwl_get_agg_tx_fail_reason( 2018 iwl_get_agg_tx_fail_reason(
2005 AGG_TX_STATE_LAST_SENT_TTL_MSK), 2019 AGG_TX_STATE_LAST_SENT_TTL_MSK),
2006 priv->_agn.reply_agg_tx_stats.last_sent_ttl); 2020 priv->reply_agg_tx_stats.last_sent_ttl);
2007 pos += scnprintf(buf + pos, bufsz - pos, "%s:\t\t%u\n", 2021 pos += scnprintf(buf + pos, bufsz - pos, "%s:\t\t%u\n",
2008 iwl_get_agg_tx_fail_reason( 2022 iwl_get_agg_tx_fail_reason(
2009 AGG_TX_STATE_LAST_SENT_TRY_CNT_MSK), 2023 AGG_TX_STATE_LAST_SENT_TRY_CNT_MSK),
2010 priv->_agn.reply_agg_tx_stats.last_sent_try); 2024 priv->reply_agg_tx_stats.last_sent_try);
2011 pos += scnprintf(buf + pos, bufsz - pos, "%s:\t\t%u\n", 2025 pos += scnprintf(buf + pos, bufsz - pos, "%s:\t\t%u\n",
2012 iwl_get_agg_tx_fail_reason( 2026 iwl_get_agg_tx_fail_reason(
2013 AGG_TX_STATE_LAST_SENT_BT_KILL_MSK), 2027 AGG_TX_STATE_LAST_SENT_BT_KILL_MSK),
2014 priv->_agn.reply_agg_tx_stats.last_sent_bt_kill); 2028 priv->reply_agg_tx_stats.last_sent_bt_kill);
2015 pos += scnprintf(buf + pos, bufsz - pos, "%s:\t\t\t%u\n", 2029 pos += scnprintf(buf + pos, bufsz - pos, "%s:\t\t\t%u\n",
2016 iwl_get_agg_tx_fail_reason(AGG_TX_STATE_SCD_QUERY_MSK), 2030 iwl_get_agg_tx_fail_reason(AGG_TX_STATE_SCD_QUERY_MSK),
2017 priv->_agn.reply_agg_tx_stats.scd_query); 2031 priv->reply_agg_tx_stats.scd_query);
2018 pos += scnprintf(buf + pos, bufsz - pos, "%s:\t\t%u\n", 2032 pos += scnprintf(buf + pos, bufsz - pos, "%s:\t\t%u\n",
2019 iwl_get_agg_tx_fail_reason( 2033 iwl_get_agg_tx_fail_reason(
2020 AGG_TX_STATE_TEST_BAD_CRC32_MSK), 2034 AGG_TX_STATE_TEST_BAD_CRC32_MSK),
2021 priv->_agn.reply_agg_tx_stats.bad_crc32); 2035 priv->reply_agg_tx_stats.bad_crc32);
2022 pos += scnprintf(buf + pos, bufsz - pos, "%s:\t\t\t%u\n", 2036 pos += scnprintf(buf + pos, bufsz - pos, "%s:\t\t\t%u\n",
2023 iwl_get_agg_tx_fail_reason(AGG_TX_STATE_RESPONSE_MSK), 2037 iwl_get_agg_tx_fail_reason(AGG_TX_STATE_RESPONSE_MSK),
2024 priv->_agn.reply_agg_tx_stats.response); 2038 priv->reply_agg_tx_stats.response);
2025 pos += scnprintf(buf + pos, bufsz - pos, "%s:\t\t\t%u\n", 2039 pos += scnprintf(buf + pos, bufsz - pos, "%s:\t\t\t%u\n",
2026 iwl_get_agg_tx_fail_reason(AGG_TX_STATE_DUMP_TX_MSK), 2040 iwl_get_agg_tx_fail_reason(AGG_TX_STATE_DUMP_TX_MSK),
2027 priv->_agn.reply_agg_tx_stats.dump_tx); 2041 priv->reply_agg_tx_stats.dump_tx);
2028 pos += scnprintf(buf + pos, bufsz - pos, "%s:\t\t\t%u\n", 2042 pos += scnprintf(buf + pos, bufsz - pos, "%s:\t\t\t%u\n",
2029 iwl_get_agg_tx_fail_reason(AGG_TX_STATE_DELAY_TX_MSK), 2043 iwl_get_agg_tx_fail_reason(AGG_TX_STATE_DELAY_TX_MSK),
2030 priv->_agn.reply_agg_tx_stats.delay_tx); 2044 priv->reply_agg_tx_stats.delay_tx);
2031 pos += scnprintf(buf + pos, bufsz - pos, "UNKNOWN:\t\t\t%u\n", 2045 pos += scnprintf(buf + pos, bufsz - pos, "UNKNOWN:\t\t\t%u\n",
2032 priv->_agn.reply_agg_tx_stats.unknown); 2046 priv->reply_agg_tx_stats.unknown);
2033 2047
2034 ret = simple_read_from_buffer(user_buf, count, ppos, buf, pos); 2048 ret = simple_read_from_buffer(user_buf, count, ppos, buf, pos);
2035 kfree(buf); 2049 kfree(buf);
@@ -2667,6 +2681,7 @@ int iwl_dbgfs_register(struct iwl_priv *priv, const char *name)
2667 2681
2668 DEBUGFS_ADD_FILE(nvm, dir_data, S_IRUSR); 2682 DEBUGFS_ADD_FILE(nvm, dir_data, S_IRUSR);
2669 DEBUGFS_ADD_FILE(sram, dir_data, S_IWUSR | S_IRUSR); 2683 DEBUGFS_ADD_FILE(sram, dir_data, S_IWUSR | S_IRUSR);
2684 DEBUGFS_ADD_FILE(wowlan_sram, dir_data, S_IRUSR);
2670 DEBUGFS_ADD_FILE(log_event, dir_data, S_IWUSR | S_IRUSR); 2685 DEBUGFS_ADD_FILE(log_event, dir_data, S_IWUSR | S_IRUSR);
2671 DEBUGFS_ADD_FILE(stations, dir_data, S_IRUSR); 2686 DEBUGFS_ADD_FILE(stations, dir_data, S_IRUSR);
2672 DEBUGFS_ADD_FILE(channels, dir_data, S_IRUSR); 2687 DEBUGFS_ADD_FILE(channels, dir_data, S_IRUSR);
diff --git a/drivers/net/wireless/iwlwifi/iwl-dev.h b/drivers/net/wireless/iwlwifi/iwl-dev.h
index 424c45c43f5b..6c9790cac8d0 100644
--- a/drivers/net/wireless/iwlwifi/iwl-dev.h
+++ b/drivers/net/wireless/iwlwifi/iwl-dev.h
@@ -48,6 +48,8 @@
48#include "iwl-power.h" 48#include "iwl-power.h"
49#include "iwl-agn-rs.h" 49#include "iwl-agn-rs.h"
50#include "iwl-agn-tt.h" 50#include "iwl-agn-tt.h"
51#include "iwl-bus.h"
52#include "iwl-trans.h"
51 53
52#define DRV_NAME "iwlagn" 54#define DRV_NAME "iwlagn"
53 55
@@ -396,13 +398,6 @@ struct iwl_tid_data {
396 struct iwl_ht_agg agg; 398 struct iwl_ht_agg agg;
397}; 399};
398 400
399struct iwl_hw_key {
400 u32 cipher;
401 int keylen;
402 u8 keyidx;
403 u8 key[32];
404};
405
406union iwl_ht_rate_supp { 401union iwl_ht_rate_supp {
407 u16 rates; 402 u16 rates;
408 struct { 403 struct {
@@ -455,7 +450,6 @@ struct iwl_station_entry {
455 struct iwl_addsta_cmd sta; 450 struct iwl_addsta_cmd sta;
456 struct iwl_tid_data tid[MAX_TID_COUNT]; 451 struct iwl_tid_data tid[MAX_TID_COUNT];
457 u8 used, ctxid; 452 u8 used, ctxid;
458 struct iwl_hw_key keyinfo;
459 struct iwl_link_quality_cmd *lq; 453 struct iwl_link_quality_cmd *lq;
460}; 454};
461 455
@@ -558,7 +552,8 @@ enum iwl_ucode_tlv_type {
558 IWL_UCODE_TLV_INIT_ERRLOG_PTR = 13, 552 IWL_UCODE_TLV_INIT_ERRLOG_PTR = 13,
559 IWL_UCODE_TLV_ENHANCE_SENS_TBL = 14, 553 IWL_UCODE_TLV_ENHANCE_SENS_TBL = 14,
560 IWL_UCODE_TLV_PHY_CALIBRATION_SIZE = 15, 554 IWL_UCODE_TLV_PHY_CALIBRATION_SIZE = 15,
561 /* 16 and 17 reserved for future use */ 555 IWL_UCODE_TLV_WOWLAN_INST = 16,
556 IWL_UCODE_TLV_WOWLAN_DATA = 17,
562 IWL_UCODE_TLV_FLAGS = 18, 557 IWL_UCODE_TLV_FLAGS = 18,
563}; 558};
564 559
@@ -1158,6 +1153,8 @@ struct iwl_rxon_context {
1158 1153
1159 __le32 station_flags; 1154 __le32 station_flags;
1160 1155
1156 int beacon_int;
1157
1161 struct { 1158 struct {
1162 bool non_gf_sta_present; 1159 bool non_gf_sta_present;
1163 u8 protection; 1160 u8 protection;
@@ -1193,77 +1190,6 @@ struct iwl_testmode_trace {
1193}; 1190};
1194#endif 1191#endif
1195 1192
1196struct iwl_bus;
1197
1198/**
1199 * struct iwl_bus_ops - bus specific operations
1200
1201 * @get_pm_support: must returns true if the bus can go to sleep
1202 * @apm_config: will be called during the config of the APM configuration
1203 * @set_drv_data: set the priv pointer to the bus layer
1204 * @get_dev: returns the device struct
1205 * @get_irq: returns the irq number
1206 * @get_hw_id: prints the hw_id in the provided buffer
1207 * @write8: write a byte to register at offset ofs
1208 * @write32: write a dword to register at offset ofs
1209 * @wread32: read a dword at register at offset ofs
1210 */
1211struct iwl_bus_ops {
1212 bool (*get_pm_support)(struct iwl_bus *bus);
1213 void (*apm_config)(struct iwl_bus *bus);
1214 void (*set_drv_data)(struct iwl_bus *bus, void *priv);
1215 struct device *(*get_dev)(const struct iwl_bus *bus);
1216 unsigned int (*get_irq)(const struct iwl_bus *bus);
1217 void (*get_hw_id)(struct iwl_bus *bus, char buf[], int buf_len);
1218 void (*write8)(struct iwl_bus *bus, u32 ofs, u8 val);
1219 void (*write32)(struct iwl_bus *bus, u32 ofs, u32 val);
1220 u32 (*read32)(struct iwl_bus *bus, u32 ofs);
1221};
1222
1223struct iwl_bus {
1224 /* pointer to bus specific struct */
1225 void *bus_specific;
1226
1227 /* Common data to all buses */
1228 struct iwl_priv *priv; /* driver's context */
1229 struct device *dev;
1230 struct iwl_bus_ops *ops;
1231 unsigned int irq;
1232};
1233
1234struct iwl_trans;
1235
1236/**
1237 * struct iwl_trans_ops - transport specific operations
1238
1239 * @rx_init: inits the rx memory, allocate it if needed
1240 * @rx_stop: stop the rx
1241 * @rx_free: frees the rx memory
1242 * @tx_init:inits the tx memory, allocate if needed
1243 * @tx_stop: stop the tx
1244 * @tx_free: frees the tx memory
1245 * @send_cmd:send a host command
1246 * @send_cmd_pdu:send a host command: flags can be CMD_*
1247 */
1248struct iwl_trans_ops {
1249 int (*rx_init)(struct iwl_priv *priv);
1250 int (*rx_stop)(struct iwl_priv *priv);
1251 void (*rx_free)(struct iwl_priv *priv);
1252
1253 int (*tx_init)(struct iwl_priv *priv);
1254 int (*tx_stop)(struct iwl_priv *priv);
1255 void (*tx_free)(struct iwl_priv *priv);
1256
1257 int (*send_cmd)(struct iwl_priv *priv, struct iwl_host_cmd *cmd);
1258
1259 int (*send_cmd_pdu)(struct iwl_priv *priv, u8 id, u32 flags, u16 len,
1260 const void *data);
1261};
1262
1263struct iwl_trans {
1264 const struct iwl_trans_ops *ops;
1265};
1266
1267/* uCode ownership */ 1193/* uCode ownership */
1268#define IWL_OWNERSHIP_DRIVER 0 1194#define IWL_OWNERSHIP_DRIVER 0
1269#define IWL_OWNERSHIP_TM 1 1195#define IWL_OWNERSHIP_TM 1
@@ -1335,7 +1261,7 @@ struct iwl_priv {
1335 spinlock_t reg_lock; /* protect hw register access */ 1261 spinlock_t reg_lock; /* protect hw register access */
1336 struct mutex mutex; 1262 struct mutex mutex;
1337 1263
1338 struct iwl_bus bus; /* bus specific data */ 1264 struct iwl_bus *bus; /* bus specific data */
1339 struct iwl_trans trans; 1265 struct iwl_trans trans;
1340 1266
1341 /* microcode/device supports multiple contexts */ 1267 /* microcode/device supports multiple contexts */
@@ -1362,6 +1288,7 @@ struct iwl_priv {
1362 1288
1363 struct fw_img ucode_rt; 1289 struct fw_img ucode_rt;
1364 struct fw_img ucode_init; 1290 struct fw_img ucode_init;
1291 struct fw_img ucode_wowlan;
1365 1292
1366 enum iwlagn_ucode_type ucode_type; 1293 enum iwlagn_ucode_type ucode_type;
1367 u8 ucode_write_complete; /* the image write is complete */ 1294 u8 ucode_write_complete; /* the image write is complete */
@@ -1434,6 +1361,8 @@ struct iwl_priv {
1434 1361
1435 u8 mac80211_registered; 1362 u8 mac80211_registered;
1436 1363
1364 bool wowlan;
1365
1437 /* eeprom -- this is in the card's little endian byte order */ 1366 /* eeprom -- this is in the card's little endian byte order */
1438 u8 *eeprom; 1367 u8 *eeprom;
1439 int nvm_device_type; 1368 int nvm_device_type;
@@ -1469,56 +1398,54 @@ struct iwl_priv {
1469 } accum_stats, delta_stats, max_delta_stats; 1398 } accum_stats, delta_stats, max_delta_stats;
1470#endif 1399#endif
1471 1400
1472 struct { 1401 /* INT ICT Table */
1473 /* INT ICT Table */ 1402 __le32 *ict_tbl;
1474 __le32 *ict_tbl; 1403 void *ict_tbl_vir;
1475 void *ict_tbl_vir; 1404 dma_addr_t ict_tbl_dma;
1476 dma_addr_t ict_tbl_dma; 1405 dma_addr_t aligned_ict_tbl_dma;
1477 dma_addr_t aligned_ict_tbl_dma; 1406 int ict_index;
1478 int ict_index; 1407 u32 inta;
1479 u32 inta; 1408 bool use_ict;
1480 bool use_ict; 1409 /*
1481 /* 1410 * reporting the number of tids has AGG on. 0 means
1482 * reporting the number of tids has AGG on. 0 means 1411 * no AGGREGATION
1483 * no AGGREGATION 1412 */
1484 */ 1413 u8 agg_tids_count;
1485 u8 agg_tids_count; 1414
1486 1415 struct iwl_rx_phy_res last_phy_res;
1487 struct iwl_rx_phy_res last_phy_res; 1416 bool last_phy_res_valid;
1488 bool last_phy_res_valid; 1417
1489 1418 struct completion firmware_loading_complete;
1490 struct completion firmware_loading_complete; 1419
1491 1420 u32 init_evtlog_ptr, init_evtlog_size, init_errlog_ptr;
1492 u32 init_evtlog_ptr, init_evtlog_size, init_errlog_ptr; 1421 u32 inst_evtlog_ptr, inst_evtlog_size, inst_errlog_ptr;
1493 u32 inst_evtlog_ptr, inst_evtlog_size, inst_errlog_ptr; 1422
1494 1423 /*
1495 /* 1424 * chain noise reset and gain commands are the
1496 * chain noise reset and gain commands are the 1425 * two extra calibration commands follows the standard
1497 * two extra calibration commands follows the standard 1426 * phy calibration commands
1498 * phy calibration commands 1427 */
1499 */ 1428 u8 phy_calib_chain_noise_reset_cmd;
1500 u8 phy_calib_chain_noise_reset_cmd; 1429 u8 phy_calib_chain_noise_gain_cmd;
1501 u8 phy_calib_chain_noise_gain_cmd; 1430
1502 1431 /* counts reply_tx error */
1503 /* counts reply_tx error */ 1432 struct reply_tx_error_statistics reply_tx_stats;
1504 struct reply_tx_error_statistics reply_tx_stats; 1433 struct reply_agg_tx_error_statistics reply_agg_tx_stats;
1505 struct reply_agg_tx_error_statistics reply_agg_tx_stats; 1434 /* notification wait support */
1506 /* notification wait support */ 1435 struct list_head notif_waits;
1507 struct list_head notif_waits; 1436 spinlock_t notif_wait_lock;
1508 spinlock_t notif_wait_lock; 1437 wait_queue_head_t notif_waitq;
1509 wait_queue_head_t notif_waitq; 1438
1510 1439 /* remain-on-channel offload support */
1511 /* remain-on-channel offload support */ 1440 struct ieee80211_channel *hw_roc_channel;
1512 struct ieee80211_channel *hw_roc_channel; 1441 struct delayed_work hw_roc_work;
1513 struct delayed_work hw_roc_work; 1442 enum nl80211_channel_type hw_roc_chantype;
1514 enum nl80211_channel_type hw_roc_chantype; 1443 int hw_roc_duration;
1515 int hw_roc_duration; 1444 bool hw_roc_setup;
1516 bool hw_roc_setup; 1445
1517 1446 struct sk_buff *offchan_tx_skb;
1518 struct sk_buff *offchan_tx_skb; 1447 int offchan_tx_timeout;
1519 int offchan_tx_timeout; 1448 struct ieee80211_channel *offchan_tx_chan;
1520 struct ieee80211_channel *offchan_tx_chan;
1521 } _agn;
1522 1449
1523 /* bt coex */ 1450 /* bt coex */
1524 u8 bt_enable_flag; 1451 u8 bt_enable_flag;
@@ -1588,6 +1515,7 @@ struct iwl_priv {
1588 struct dentry *debugfs_dir; 1515 struct dentry *debugfs_dir;
1589 u32 dbgfs_sram_offset, dbgfs_sram_len; 1516 u32 dbgfs_sram_offset, dbgfs_sram_len;
1590 bool disable_ht40; 1517 bool disable_ht40;
1518 void *wowlan_sram;
1591#endif /* CONFIG_IWLWIFI_DEBUGFS */ 1519#endif /* CONFIG_IWLWIFI_DEBUGFS */
1592 1520
1593 struct work_struct txpower_work; 1521 struct work_struct txpower_work;
@@ -1605,9 +1533,14 @@ struct iwl_priv {
1605 bool led_registered; 1533 bool led_registered;
1606#ifdef CONFIG_IWLWIFI_DEVICE_SVTOOL 1534#ifdef CONFIG_IWLWIFI_DEVICE_SVTOOL
1607 struct iwl_testmode_trace testmode_trace; 1535 struct iwl_testmode_trace testmode_trace;
1608#endif
1609 u32 tm_fixed_rate; 1536 u32 tm_fixed_rate;
1537#endif
1610 1538
1539 /* WoWLAN GTK rekey data */
1540 u8 kck[NL80211_KCK_LEN], kek[NL80211_KEK_LEN];
1541 __le64 replay_ctr;
1542 __le16 last_seq_ctl;
1543 bool have_rekey_data;
1611}; /*iwl_priv */ 1544}; /*iwl_priv */
1612 1545
1613static inline void iwl_txq_ctx_activate(struct iwl_priv *priv, int txq_id) 1546static inline void iwl_txq_ctx_activate(struct iwl_priv *priv, int txq_id)
diff --git a/drivers/net/wireless/iwlwifi/iwl-eeprom.c b/drivers/net/wireless/iwlwifi/iwl-eeprom.c
index eee97bcf9802..19d31a5e32e5 100644
--- a/drivers/net/wireless/iwlwifi/iwl-eeprom.c
+++ b/drivers/net/wireless/iwlwifi/iwl-eeprom.c
@@ -543,7 +543,7 @@ static void iwl_init_band_reference(const struct iwl_priv *priv,
543 const struct iwl_eeprom_channel **eeprom_ch_info, 543 const struct iwl_eeprom_channel **eeprom_ch_info,
544 const u8 **eeprom_ch_index) 544 const u8 **eeprom_ch_index)
545{ 545{
546 u32 offset = priv->cfg->ops->lib-> 546 u32 offset = priv->cfg->lib->
547 eeprom_ops.regulatory_bands[eep_band - 1]; 547 eeprom_ops.regulatory_bands[eep_band - 1];
548 switch (eep_band) { 548 switch (eep_band) {
549 case 1: /* 2.4GHz band */ 549 case 1: /* 2.4GHz band */
@@ -749,9 +749,9 @@ int iwl_init_channel_map(struct iwl_priv *priv)
749 } 749 }
750 750
751 /* Check if we do have HT40 channels */ 751 /* Check if we do have HT40 channels */
752 if (priv->cfg->ops->lib->eeprom_ops.regulatory_bands[5] == 752 if (priv->cfg->lib->eeprom_ops.regulatory_bands[5] ==
753 EEPROM_REGULATORY_BAND_NO_HT40 && 753 EEPROM_REGULATORY_BAND_NO_HT40 &&
754 priv->cfg->ops->lib->eeprom_ops.regulatory_bands[6] == 754 priv->cfg->lib->eeprom_ops.regulatory_bands[6] ==
755 EEPROM_REGULATORY_BAND_NO_HT40) 755 EEPROM_REGULATORY_BAND_NO_HT40)
756 return 0; 756 return 0;
757 757
@@ -787,8 +787,8 @@ int iwl_init_channel_map(struct iwl_priv *priv)
787 * driver need to process addition information 787 * driver need to process addition information
788 * to determine the max channel tx power limits 788 * to determine the max channel tx power limits
789 */ 789 */
790 if (priv->cfg->ops->lib->eeprom_ops.update_enhanced_txpower) 790 if (priv->cfg->lib->eeprom_ops.update_enhanced_txpower)
791 priv->cfg->ops->lib->eeprom_ops.update_enhanced_txpower(priv); 791 priv->cfg->lib->eeprom_ops.update_enhanced_txpower(priv);
792 792
793 return 0; 793 return 0;
794} 794}
diff --git a/drivers/net/wireless/iwlwifi/iwl-hcmd.c b/drivers/net/wireless/iwlwifi/iwl-hcmd.c
deleted file mode 100644
index 6cff8c165ce9..000000000000
--- a/drivers/net/wireless/iwlwifi/iwl-hcmd.c
+++ /dev/null
@@ -1,271 +0,0 @@
1/******************************************************************************
2 *
3 * GPL LICENSE SUMMARY
4 *
5 * Copyright(c) 2008 - 2011 Intel Corporation. All rights reserved.
6 *
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of version 2 of the GNU General Public License as
9 * published by the Free Software Foundation.
10 *
11 * This program is distributed in the hope that it will be useful, but
12 * WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
14 * General Public License for more details.
15 *
16 * You should have received a copy of the GNU General Public License
17 * along with this program; if not, write to the Free Software
18 * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110,
19 * USA
20 *
21 * The full GNU General Public License is included in this distribution
22 * in the file called LICENSE.GPL.
23 *
24 * Contact Information:
25 * Intel Linux Wireless <ilw@linux.intel.com>
26 * Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
27 *****************************************************************************/
28
29#include <linux/kernel.h>
30#include <linux/module.h>
31#include <linux/sched.h>
32#include <net/mac80211.h>
33
34#include "iwl-dev.h" /* FIXME: remove */
35#include "iwl-debug.h"
36#include "iwl-eeprom.h"
37#include "iwl-core.h"
38
39
40const char *get_cmd_string(u8 cmd)
41{
42 switch (cmd) {
43 IWL_CMD(REPLY_ALIVE);
44 IWL_CMD(REPLY_ERROR);
45 IWL_CMD(REPLY_RXON);
46 IWL_CMD(REPLY_RXON_ASSOC);
47 IWL_CMD(REPLY_QOS_PARAM);
48 IWL_CMD(REPLY_RXON_TIMING);
49 IWL_CMD(REPLY_ADD_STA);
50 IWL_CMD(REPLY_REMOVE_STA);
51 IWL_CMD(REPLY_REMOVE_ALL_STA);
52 IWL_CMD(REPLY_TXFIFO_FLUSH);
53 IWL_CMD(REPLY_WEPKEY);
54 IWL_CMD(REPLY_TX);
55 IWL_CMD(REPLY_LEDS_CMD);
56 IWL_CMD(REPLY_TX_LINK_QUALITY_CMD);
57 IWL_CMD(COEX_PRIORITY_TABLE_CMD);
58 IWL_CMD(COEX_MEDIUM_NOTIFICATION);
59 IWL_CMD(COEX_EVENT_CMD);
60 IWL_CMD(REPLY_QUIET_CMD);
61 IWL_CMD(REPLY_CHANNEL_SWITCH);
62 IWL_CMD(CHANNEL_SWITCH_NOTIFICATION);
63 IWL_CMD(REPLY_SPECTRUM_MEASUREMENT_CMD);
64 IWL_CMD(SPECTRUM_MEASURE_NOTIFICATION);
65 IWL_CMD(POWER_TABLE_CMD);
66 IWL_CMD(PM_SLEEP_NOTIFICATION);
67 IWL_CMD(PM_DEBUG_STATISTIC_NOTIFIC);
68 IWL_CMD(REPLY_SCAN_CMD);
69 IWL_CMD(REPLY_SCAN_ABORT_CMD);
70 IWL_CMD(SCAN_START_NOTIFICATION);
71 IWL_CMD(SCAN_RESULTS_NOTIFICATION);
72 IWL_CMD(SCAN_COMPLETE_NOTIFICATION);
73 IWL_CMD(BEACON_NOTIFICATION);
74 IWL_CMD(REPLY_TX_BEACON);
75 IWL_CMD(WHO_IS_AWAKE_NOTIFICATION);
76 IWL_CMD(QUIET_NOTIFICATION);
77 IWL_CMD(REPLY_TX_PWR_TABLE_CMD);
78 IWL_CMD(MEASURE_ABORT_NOTIFICATION);
79 IWL_CMD(REPLY_BT_CONFIG);
80 IWL_CMD(REPLY_STATISTICS_CMD);
81 IWL_CMD(STATISTICS_NOTIFICATION);
82 IWL_CMD(REPLY_CARD_STATE_CMD);
83 IWL_CMD(CARD_STATE_NOTIFICATION);
84 IWL_CMD(MISSED_BEACONS_NOTIFICATION);
85 IWL_CMD(REPLY_CT_KILL_CONFIG_CMD);
86 IWL_CMD(SENSITIVITY_CMD);
87 IWL_CMD(REPLY_PHY_CALIBRATION_CMD);
88 IWL_CMD(REPLY_RX_PHY_CMD);
89 IWL_CMD(REPLY_RX_MPDU_CMD);
90 IWL_CMD(REPLY_RX);
91 IWL_CMD(REPLY_COMPRESSED_BA);
92 IWL_CMD(CALIBRATION_CFG_CMD);
93 IWL_CMD(CALIBRATION_RES_NOTIFICATION);
94 IWL_CMD(CALIBRATION_COMPLETE_NOTIFICATION);
95 IWL_CMD(REPLY_TX_POWER_DBM_CMD);
96 IWL_CMD(TEMPERATURE_NOTIFICATION);
97 IWL_CMD(TX_ANT_CONFIGURATION_CMD);
98 IWL_CMD(REPLY_BT_COEX_PROFILE_NOTIF);
99 IWL_CMD(REPLY_BT_COEX_PRIO_TABLE);
100 IWL_CMD(REPLY_BT_COEX_PROT_ENV);
101 IWL_CMD(REPLY_WIPAN_PARAMS);
102 IWL_CMD(REPLY_WIPAN_RXON);
103 IWL_CMD(REPLY_WIPAN_RXON_TIMING);
104 IWL_CMD(REPLY_WIPAN_RXON_ASSOC);
105 IWL_CMD(REPLY_WIPAN_QOS_PARAM);
106 IWL_CMD(REPLY_WIPAN_WEPKEY);
107 IWL_CMD(REPLY_WIPAN_P2P_CHANNEL_SWITCH);
108 IWL_CMD(REPLY_WIPAN_NOA_NOTIFICATION);
109 IWL_CMD(REPLY_WIPAN_DEACTIVATION_COMPLETE);
110 default:
111 return "UNKNOWN";
112
113 }
114}
115
116#define HOST_COMPLETE_TIMEOUT (2 * HZ)
117
118static void iwl_generic_cmd_callback(struct iwl_priv *priv,
119 struct iwl_device_cmd *cmd,
120 struct iwl_rx_packet *pkt)
121{
122 if (pkt->hdr.flags & IWL_CMD_FAILED_MSK) {
123 IWL_ERR(priv, "Bad return from %s (0x%08X)\n",
124 get_cmd_string(cmd->hdr.cmd), pkt->hdr.flags);
125 return;
126 }
127
128#ifdef CONFIG_IWLWIFI_DEBUG
129 switch (cmd->hdr.cmd) {
130 case REPLY_TX_LINK_QUALITY_CMD:
131 case SENSITIVITY_CMD:
132 IWL_DEBUG_HC_DUMP(priv, "back from %s (0x%08X)\n",
133 get_cmd_string(cmd->hdr.cmd), pkt->hdr.flags);
134 break;
135 default:
136 IWL_DEBUG_HC(priv, "back from %s (0x%08X)\n",
137 get_cmd_string(cmd->hdr.cmd), pkt->hdr.flags);
138 }
139#endif
140}
141
142static int iwl_send_cmd_async(struct iwl_priv *priv, struct iwl_host_cmd *cmd)
143{
144 int ret;
145
146 /* An asynchronous command can not expect an SKB to be set. */
147 if (WARN_ON(cmd->flags & CMD_WANT_SKB))
148 return -EINVAL;
149
150 /* Assign a generic callback if one is not provided */
151 if (!cmd->callback)
152 cmd->callback = iwl_generic_cmd_callback;
153
154 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
155 return -EBUSY;
156
157 ret = iwl_enqueue_hcmd(priv, cmd);
158 if (ret < 0) {
159 IWL_ERR(priv, "Error sending %s: enqueue_hcmd failed: %d\n",
160 get_cmd_string(cmd->id), ret);
161 return ret;
162 }
163 return 0;
164}
165
166static int iwl_send_cmd_sync(struct iwl_priv *priv, struct iwl_host_cmd *cmd)
167{
168 int cmd_idx;
169 int ret;
170
171 lockdep_assert_held(&priv->mutex);
172
173 /* A synchronous command can not have a callback set. */
174 if (WARN_ON(cmd->callback))
175 return -EINVAL;
176
177 IWL_DEBUG_INFO(priv, "Attempting to send sync command %s\n",
178 get_cmd_string(cmd->id));
179
180 set_bit(STATUS_HCMD_ACTIVE, &priv->status);
181 IWL_DEBUG_INFO(priv, "Setting HCMD_ACTIVE for command %s\n",
182 get_cmd_string(cmd->id));
183
184 cmd_idx = iwl_enqueue_hcmd(priv, cmd);
185 if (cmd_idx < 0) {
186 ret = cmd_idx;
187 clear_bit(STATUS_HCMD_ACTIVE, &priv->status);
188 IWL_ERR(priv, "Error sending %s: enqueue_hcmd failed: %d\n",
189 get_cmd_string(cmd->id), ret);
190 return ret;
191 }
192
193 ret = wait_event_interruptible_timeout(priv->wait_command_queue,
194 !test_bit(STATUS_HCMD_ACTIVE, &priv->status),
195 HOST_COMPLETE_TIMEOUT);
196 if (!ret) {
197 if (test_bit(STATUS_HCMD_ACTIVE, &priv->status)) {
198 IWL_ERR(priv,
199 "Error sending %s: time out after %dms.\n",
200 get_cmd_string(cmd->id),
201 jiffies_to_msecs(HOST_COMPLETE_TIMEOUT));
202
203 clear_bit(STATUS_HCMD_ACTIVE, &priv->status);
204 IWL_DEBUG_INFO(priv, "Clearing HCMD_ACTIVE for command %s\n",
205 get_cmd_string(cmd->id));
206 ret = -ETIMEDOUT;
207 goto cancel;
208 }
209 }
210
211 if (test_bit(STATUS_RF_KILL_HW, &priv->status)) {
212 IWL_ERR(priv, "Command %s aborted: RF KILL Switch\n",
213 get_cmd_string(cmd->id));
214 ret = -ECANCELED;
215 goto fail;
216 }
217 if (test_bit(STATUS_FW_ERROR, &priv->status)) {
218 IWL_ERR(priv, "Command %s failed: FW Error\n",
219 get_cmd_string(cmd->id));
220 ret = -EIO;
221 goto fail;
222 }
223 if ((cmd->flags & CMD_WANT_SKB) && !cmd->reply_page) {
224 IWL_ERR(priv, "Error: Response NULL in '%s'\n",
225 get_cmd_string(cmd->id));
226 ret = -EIO;
227 goto cancel;
228 }
229
230 return 0;
231
232cancel:
233 if (cmd->flags & CMD_WANT_SKB) {
234 /*
235 * Cancel the CMD_WANT_SKB flag for the cmd in the
236 * TX cmd queue. Otherwise in case the cmd comes
237 * in later, it will possibly set an invalid
238 * address (cmd->meta.source).
239 */
240 priv->txq[priv->cmd_queue].meta[cmd_idx].flags &=
241 ~CMD_WANT_SKB;
242 }
243fail:
244 if (cmd->reply_page) {
245 iwl_free_pages(priv, cmd->reply_page);
246 cmd->reply_page = 0;
247 }
248
249 return ret;
250}
251
252int iwl_send_cmd(struct iwl_priv *priv, struct iwl_host_cmd *cmd)
253{
254 if (cmd->flags & CMD_ASYNC)
255 return iwl_send_cmd_async(priv, cmd);
256
257 return iwl_send_cmd_sync(priv, cmd);
258}
259
260int iwl_send_cmd_pdu(struct iwl_priv *priv, u8 id, u32 flags, u16 len,
261 const void *data)
262{
263 struct iwl_host_cmd cmd = {
264 .id = id,
265 .len = { len, },
266 .data = { data, },
267 .flags = flags,
268 };
269
270 return iwl_send_cmd(priv, &cmd);
271}
diff --git a/drivers/net/wireless/iwlwifi/iwl-io.h b/drivers/net/wireless/iwlwifi/iwl-io.h
index c56eae74c3cd..19a093101122 100644
--- a/drivers/net/wireless/iwlwifi/iwl-io.h
+++ b/drivers/net/wireless/iwlwifi/iwl-io.h
@@ -34,22 +34,23 @@
34#include "iwl-dev.h" 34#include "iwl-dev.h"
35#include "iwl-debug.h" 35#include "iwl-debug.h"
36#include "iwl-devtrace.h" 36#include "iwl-devtrace.h"
37#include "iwl-bus.h"
37 38
38static inline void iwl_write8(struct iwl_priv *priv, u32 ofs, u8 val) 39static inline void iwl_write8(struct iwl_priv *priv, u32 ofs, u8 val)
39{ 40{
40 trace_iwlwifi_dev_iowrite8(priv, ofs, val); 41 trace_iwlwifi_dev_iowrite8(priv, ofs, val);
41 priv->bus.ops->write8(&priv->bus, ofs, val); 42 bus_write8(priv->bus, ofs, val);
42} 43}
43 44
44static inline void iwl_write32(struct iwl_priv *priv, u32 ofs, u32 val) 45static inline void iwl_write32(struct iwl_priv *priv, u32 ofs, u32 val)
45{ 46{
46 trace_iwlwifi_dev_iowrite32(priv, ofs, val); 47 trace_iwlwifi_dev_iowrite32(priv, ofs, val);
47 priv->bus.ops->write32(&priv->bus, ofs, val); 48 bus_write32(priv->bus, ofs, val);
48} 49}
49 50
50static inline u32 iwl_read32(struct iwl_priv *priv, u32 ofs) 51static inline u32 iwl_read32(struct iwl_priv *priv, u32 ofs)
51{ 52{
52 u32 val = priv->bus.ops->read32(&priv->bus, ofs); 53 u32 val = bus_read32(priv->bus, ofs);
53 trace_iwlwifi_dev_ioread32(priv, ofs, val); 54 trace_iwlwifi_dev_ioread32(priv, ofs, val);
54 return val; 55 return val;
55} 56}
diff --git a/drivers/net/wireless/iwlwifi/iwl-led.c b/drivers/net/wireless/iwlwifi/iwl-led.c
index 60e4169f25e1..a67ae56d5464 100644
--- a/drivers/net/wireless/iwlwifi/iwl-led.c
+++ b/drivers/net/wireless/iwlwifi/iwl-led.c
@@ -112,7 +112,7 @@ static int iwl_send_led_cmd(struct iwl_priv *priv, struct iwl_led_cmd *led_cmd)
112 if (reg != (reg & CSR_LED_BSM_CTRL_MSK)) 112 if (reg != (reg & CSR_LED_BSM_CTRL_MSK))
113 iwl_write32(priv, CSR_LED_REG, reg & CSR_LED_BSM_CTRL_MSK); 113 iwl_write32(priv, CSR_LED_REG, reg & CSR_LED_BSM_CTRL_MSK);
114 114
115 return trans_send_cmd(priv, &cmd); 115 return trans_send_cmd(&priv->trans, &cmd);
116} 116}
117 117
118/* Set led pattern command */ 118/* Set led pattern command */
@@ -203,7 +203,7 @@ void iwl_leds_init(struct iwl_priv *priv)
203 break; 203 break;
204 } 204 }
205 205
206 ret = led_classdev_register(priv->bus.dev, 206 ret = led_classdev_register(priv->bus->dev,
207 &priv->led); 207 &priv->led);
208 if (ret) { 208 if (ret) {
209 kfree(priv->led.name); 209 kfree(priv->led.name);
diff --git a/drivers/net/wireless/iwlwifi/iwl-pci.c b/drivers/net/wireless/iwlwifi/iwl-pci.c
index 74911348a2ee..fb7e436b40c7 100644
--- a/drivers/net/wireless/iwlwifi/iwl-pci.c
+++ b/drivers/net/wireless/iwlwifi/iwl-pci.c
@@ -63,11 +63,10 @@
63#include <linux/pci.h> 63#include <linux/pci.h>
64#include <linux/pci-aspm.h> 64#include <linux/pci-aspm.h>
65 65
66#include "iwl-pci.h" 66#include "iwl-bus.h"
67#include "iwl-agn.h" 67#include "iwl-agn.h"
68#include "iwl-core.h" 68#include "iwl-core.h"
69#include "iwl-io.h" 69#include "iwl-io.h"
70#include "iwl-trans.h"
71 70
72/* PCI registers */ 71/* PCI registers */
73#define PCI_CFG_RETRY_TIMEOUT 0x041 72#define PCI_CFG_RETRY_TIMEOUT 0x041
@@ -121,30 +120,20 @@ static void iwl_pci_apm_config(struct iwl_bus *bus)
121 if ((lctl & PCI_CFG_LINK_CTRL_VAL_L1_EN) == 120 if ((lctl & PCI_CFG_LINK_CTRL_VAL_L1_EN) ==
122 PCI_CFG_LINK_CTRL_VAL_L1_EN) { 121 PCI_CFG_LINK_CTRL_VAL_L1_EN) {
123 /* L1-ASPM enabled; disable(!) L0S */ 122 /* L1-ASPM enabled; disable(!) L0S */
124 iwl_set_bit(bus->priv, CSR_GIO_REG, 123 iwl_set_bit(bus->drv_data, CSR_GIO_REG,
125 CSR_GIO_REG_VAL_L0S_ENABLED); 124 CSR_GIO_REG_VAL_L0S_ENABLED);
126 IWL_DEBUG_POWER(bus->priv, "L1 Enabled; Disabling L0S\n"); 125 dev_printk(KERN_INFO, bus->dev, "L1 Enabled; Disabling L0S\n");
127 } else { 126 } else {
128 /* L1-ASPM disabled; enable(!) L0S */ 127 /* L1-ASPM disabled; enable(!) L0S */
129 iwl_clear_bit(bus->priv, CSR_GIO_REG, 128 iwl_clear_bit(bus->drv_data, CSR_GIO_REG,
130 CSR_GIO_REG_VAL_L0S_ENABLED); 129 CSR_GIO_REG_VAL_L0S_ENABLED);
131 IWL_DEBUG_POWER(bus->priv, "L1 Disabled; Enabling L0S\n"); 130 dev_printk(KERN_INFO, bus->dev, "L1 Disabled; Enabling L0S\n");
132 } 131 }
133} 132}
134 133
135static void iwl_pci_set_drv_data(struct iwl_bus *bus, void *drv_priv) 134static void iwl_pci_set_drv_data(struct iwl_bus *bus, void *drv_data)
136{ 135{
137 pci_set_drvdata(IWL_BUS_GET_PCI_DEV(bus), drv_priv); 136 bus->drv_data = drv_data;
138}
139
140static struct device *iwl_pci_get_dev(const struct iwl_bus *bus)
141{
142 return &(IWL_BUS_GET_PCI_DEV(bus)->dev);
143}
144
145static unsigned int iwl_pci_get_irq(const struct iwl_bus *bus)
146{
147 return IWL_BUS_GET_PCI_DEV(bus)->irq;
148} 137}
149 138
150static void iwl_pci_get_hw_id(struct iwl_bus *bus, char buf[], 139static void iwl_pci_get_hw_id(struct iwl_bus *bus, char buf[],
@@ -176,8 +165,6 @@ static struct iwl_bus_ops pci_ops = {
176 .get_pm_support = iwl_pci_is_pm_supported, 165 .get_pm_support = iwl_pci_is_pm_supported,
177 .apm_config = iwl_pci_apm_config, 166 .apm_config = iwl_pci_apm_config,
178 .set_drv_data = iwl_pci_set_drv_data, 167 .set_drv_data = iwl_pci_set_drv_data,
179 .get_dev = iwl_pci_get_dev,
180 .get_irq = iwl_pci_get_irq,
181 .get_hw_id = iwl_pci_get_hw_id, 168 .get_hw_id = iwl_pci_get_hw_id,
182 .write8 = iwl_pci_write8, 169 .write8 = iwl_pci_write8,
183 .write32 = iwl_pci_write32, 170 .write32 = iwl_pci_write32,
@@ -383,18 +370,21 @@ MODULE_DEVICE_TABLE(pci, iwl_hw_card_ids);
383static int iwl_pci_probe(struct pci_dev *pdev, const struct pci_device_id *ent) 370static int iwl_pci_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
384{ 371{
385 struct iwl_cfg *cfg = (struct iwl_cfg *)(ent->driver_data); 372 struct iwl_cfg *cfg = (struct iwl_cfg *)(ent->driver_data);
386 struct iwl_pci_bus *bus; 373 struct iwl_bus *bus;
374 struct iwl_pci_bus *pci_bus;
387 u16 pci_cmd; 375 u16 pci_cmd;
388 int err; 376 int err;
389 377
390 bus = kzalloc(sizeof(*bus), GFP_KERNEL); 378 bus = kzalloc(sizeof(*bus) + sizeof(*pci_bus), GFP_KERNEL);
391 if (!bus) { 379 if (!bus) {
392 pr_err("Couldn't allocate iwl_pci_bus"); 380 dev_printk(KERN_ERR, &pdev->dev,
381 "Couldn't allocate iwl_pci_bus");
393 err = -ENOMEM; 382 err = -ENOMEM;
394 goto out_no_pci; 383 goto out_no_pci;
395 } 384 }
396 385
397 bus->pci_dev = pdev; 386 pci_bus = IWL_BUS_GET_PCI_BUS(bus);
387 pci_bus->pci_dev = pdev;
398 388
399 /* W/A - seems to solve weird behavior. We need to remove this if we 389 /* W/A - seems to solve weird behavior. We need to remove this if we
400 * don't want to stay in L1 all the time. This wastes a lot of power */ 390 * don't want to stay in L1 all the time. This wastes a lot of power */
@@ -418,29 +408,33 @@ static int iwl_pci_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
418 DMA_BIT_MASK(32)); 408 DMA_BIT_MASK(32));
419 /* both attempts failed: */ 409 /* both attempts failed: */
420 if (err) { 410 if (err) {
421 pr_err("No suitable DMA available.\n"); 411 dev_printk(KERN_ERR, bus->dev,
412 "No suitable DMA available.\n");
422 goto out_pci_disable_device; 413 goto out_pci_disable_device;
423 } 414 }
424 } 415 }
425 416
426 err = pci_request_regions(pdev, DRV_NAME); 417 err = pci_request_regions(pdev, DRV_NAME);
427 if (err) { 418 if (err) {
428 pr_err("pci_request_regions failed"); 419 dev_printk(KERN_ERR, bus->dev, "pci_request_regions failed");
429 goto out_pci_disable_device; 420 goto out_pci_disable_device;
430 } 421 }
431 422
432 bus->hw_base = pci_iomap(pdev, 0, 0); 423 pci_bus->hw_base = pci_iomap(pdev, 0, 0);
433 if (!bus->hw_base) { 424 if (!pci_bus->hw_base) {
434 pr_err("pci_iomap failed"); 425 dev_printk(KERN_ERR, bus->dev, "pci_iomap failed");
435 err = -ENODEV; 426 err = -ENODEV;
436 goto out_pci_release_regions; 427 goto out_pci_release_regions;
437 } 428 }
438 429
439 pr_info("pci_resource_len = 0x%08llx\n", 430 dev_printk(KERN_INFO, &pdev->dev,
431 "pci_resource_len = 0x%08llx\n",
440 (unsigned long long) pci_resource_len(pdev, 0)); 432 (unsigned long long) pci_resource_len(pdev, 0));
441 pr_info("pci_resource_base = %p\n", bus->hw_base); 433 dev_printk(KERN_INFO, &pdev->dev,
434 "pci_resource_base = %p\n", pci_bus->hw_base);
442 435
443 pr_info("HW Revision ID = 0x%X\n", pdev->revision); 436 dev_printk(KERN_INFO, &pdev->dev,
437 "HW Revision ID = 0x%X\n", pdev->revision);
444 438
445 /* We disable the RETRY_TIMEOUT register (0x41) to keep 439 /* We disable the RETRY_TIMEOUT register (0x41) to keep
446 * PCI Tx retries from interfering with C3 CPU state */ 440 * PCI Tx retries from interfering with C3 CPU state */
@@ -448,7 +442,7 @@ static int iwl_pci_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
448 442
449 err = pci_enable_msi(pdev); 443 err = pci_enable_msi(pdev);
450 if (err) { 444 if (err) {
451 pr_err("pci_enable_msi failed"); 445 dev_printk(KERN_ERR, &pdev->dev, "pci_enable_msi failed");
452 goto out_iounmap; 446 goto out_iounmap;
453 } 447 }
454 448
@@ -460,7 +454,13 @@ static int iwl_pci_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
460 pci_write_config_word(pdev, PCI_COMMAND, pci_cmd); 454 pci_write_config_word(pdev, PCI_COMMAND, pci_cmd);
461 } 455 }
462 456
463 err = iwl_probe((void *) bus, &pci_ops, cfg); 457 pci_set_drvdata(pdev, bus);
458
459 bus->dev = &pdev->dev;
460 bus->irq = pdev->irq;
461 bus->ops = &pci_ops;
462
463 err = iwl_probe(bus, cfg);
464 if (err) 464 if (err)
465 goto out_disable_msi; 465 goto out_disable_msi;
466 return 0; 466 return 0;
@@ -468,7 +468,7 @@ static int iwl_pci_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
468out_disable_msi: 468out_disable_msi:
469 pci_disable_msi(pdev); 469 pci_disable_msi(pdev);
470out_iounmap: 470out_iounmap:
471 pci_iounmap(pdev, bus->hw_base); 471 pci_iounmap(pdev, pci_bus->hw_base);
472out_pci_release_regions: 472out_pci_release_regions:
473 pci_set_drvdata(pdev, NULL); 473 pci_set_drvdata(pdev, NULL);
474 pci_release_regions(pdev); 474 pci_release_regions(pdev);
@@ -479,9 +479,9 @@ out_no_pci:
479 return err; 479 return err;
480} 480}
481 481
482static void iwl_pci_down(void *bus) 482static void iwl_pci_down(struct iwl_bus *bus)
483{ 483{
484 struct iwl_pci_bus *pci_bus = (struct iwl_pci_bus *) bus; 484 struct iwl_pci_bus *pci_bus = (struct iwl_pci_bus *) bus->bus_specific;
485 485
486 pci_disable_msi(pci_bus->pci_dev); 486 pci_disable_msi(pci_bus->pci_dev);
487 pci_iounmap(pci_bus->pci_dev, pci_bus->hw_base); 487 pci_iounmap(pci_bus->pci_dev, pci_bus->hw_base);
@@ -489,17 +489,16 @@ static void iwl_pci_down(void *bus)
489 pci_disable_device(pci_bus->pci_dev); 489 pci_disable_device(pci_bus->pci_dev);
490 pci_set_drvdata(pci_bus->pci_dev, NULL); 490 pci_set_drvdata(pci_bus->pci_dev, NULL);
491 491
492 kfree(pci_bus); 492 kfree(bus);
493} 493}
494 494
495static void __devexit iwl_pci_remove(struct pci_dev *pdev) 495static void __devexit iwl_pci_remove(struct pci_dev *pdev)
496{ 496{
497 struct iwl_priv *priv = pci_get_drvdata(pdev); 497 struct iwl_bus *bus = pci_get_drvdata(pdev);
498 void *bus_specific = priv->bus.bus_specific;
499 498
500 iwl_remove(priv); 499 iwl_remove(bus->drv_data);
501 500
502 iwl_pci_down(bus_specific); 501 iwl_pci_down(bus);
503} 502}
504 503
505#ifdef CONFIG_PM 504#ifdef CONFIG_PM
@@ -507,15 +506,25 @@ static void __devexit iwl_pci_remove(struct pci_dev *pdev)
507static int iwl_pci_suspend(struct device *device) 506static int iwl_pci_suspend(struct device *device)
508{ 507{
509 struct pci_dev *pdev = to_pci_dev(device); 508 struct pci_dev *pdev = to_pci_dev(device);
510 struct iwl_priv *priv = pci_get_drvdata(pdev); 509 struct iwl_bus *bus = pci_get_drvdata(pdev);
510
511 /* Before you put code here, think about WoWLAN. You cannot check here
512 * whether WoWLAN is enabled or not, and your code will run even if
513 * WoWLAN is enabled - don't kill the NIC, someone may need it in Sx.
514 */
511 515
512 return iwl_suspend(priv); 516 return iwl_suspend(bus->drv_data);
513} 517}
514 518
515static int iwl_pci_resume(struct device *device) 519static int iwl_pci_resume(struct device *device)
516{ 520{
517 struct pci_dev *pdev = to_pci_dev(device); 521 struct pci_dev *pdev = to_pci_dev(device);
518 struct iwl_priv *priv = pci_get_drvdata(pdev); 522 struct iwl_bus *bus = pci_get_drvdata(pdev);
523
524 /* Before you put code here, think about WoWLAN. You cannot check here
525 * whether WoWLAN is enabled or not, and your code will run even if
526 * WoWLAN is enabled - the NIC may be alive.
527 */
519 528
520 /* 529 /*
521 * We disable the RETRY_TIMEOUT register (0x41) to keep 530 * We disable the RETRY_TIMEOUT register (0x41) to keep
@@ -523,7 +532,7 @@ static int iwl_pci_resume(struct device *device)
523 */ 532 */
524 pci_write_config_byte(pdev, PCI_CFG_RETRY_TIMEOUT, 0x00); 533 pci_write_config_byte(pdev, PCI_CFG_RETRY_TIMEOUT, 0x00);
525 534
526 return iwl_resume(priv); 535 return iwl_resume(bus->drv_data);
527} 536}
528 537
529static SIMPLE_DEV_PM_OPS(iwl_dev_pm_ops, iwl_pci_suspend, iwl_pci_resume); 538static SIMPLE_DEV_PM_OPS(iwl_dev_pm_ops, iwl_pci_suspend, iwl_pci_resume);
diff --git a/drivers/net/wireless/iwlwifi/iwl-power.c b/drivers/net/wireless/iwlwifi/iwl-power.c
index 64ff40ae1026..3ec619c6881c 100644
--- a/drivers/net/wireless/iwlwifi/iwl-power.c
+++ b/drivers/net/wireless/iwlwifi/iwl-power.c
@@ -335,7 +335,7 @@ static int iwl_set_power(struct iwl_priv *priv, struct iwl_powertable_cmd *cmd)
335 le32_to_cpu(cmd->sleep_interval[3]), 335 le32_to_cpu(cmd->sleep_interval[3]),
336 le32_to_cpu(cmd->sleep_interval[4])); 336 le32_to_cpu(cmd->sleep_interval[4]));
337 337
338 return trans_send_cmd_pdu(priv, POWER_TABLE_CMD, CMD_SYNC, 338 return trans_send_cmd_pdu(&priv->trans, POWER_TABLE_CMD, CMD_SYNC,
339 sizeof(struct iwl_powertable_cmd), cmd); 339 sizeof(struct iwl_powertable_cmd), cmd);
340} 340}
341 341
@@ -347,7 +347,9 @@ static void iwl_power_build_cmd(struct iwl_priv *priv,
347 347
348 dtimper = priv->hw->conf.ps_dtim_period ?: 1; 348 dtimper = priv->hw->conf.ps_dtim_period ?: 1;
349 349
350 if (priv->hw->conf.flags & IEEE80211_CONF_IDLE) 350 if (priv->wowlan)
351 iwl_static_sleep_cmd(priv, cmd, IWL_POWER_INDEX_5, dtimper);
352 else if (priv->hw->conf.flags & IEEE80211_CONF_IDLE)
351 iwl_static_sleep_cmd(priv, cmd, IWL_POWER_INDEX_5, 20); 353 iwl_static_sleep_cmd(priv, cmd, IWL_POWER_INDEX_5, 20);
352 else if (iwl_tt_is_low_power_state(priv)) { 354 else if (iwl_tt_is_low_power_state(priv)) {
353 /* in thermal throttling low power state */ 355 /* in thermal throttling low power state */
@@ -432,7 +434,7 @@ int iwl_power_update_mode(struct iwl_priv *priv, bool force)
432/* initialize to default */ 434/* initialize to default */
433void iwl_power_initialize(struct iwl_priv *priv) 435void iwl_power_initialize(struct iwl_priv *priv)
434{ 436{
435 priv->power_data.bus_pm = priv->bus.ops->get_pm_support(&priv->bus); 437 priv->power_data.bus_pm = bus_get_pm_support(priv->bus);
436 438
437 priv->power_data.debug_sleep_level_override = -1; 439 priv->power_data.debug_sleep_level_override = -1;
438 440
diff --git a/drivers/net/wireless/iwlwifi/iwl-prph.h b/drivers/net/wireless/iwlwifi/iwl-prph.h
index 1cc0ed1f488c..2f267b8aabbb 100644
--- a/drivers/net/wireless/iwlwifi/iwl-prph.h
+++ b/drivers/net/wireless/iwlwifi/iwl-prph.h
@@ -178,61 +178,61 @@
178#define SCD_WIN_SIZE 64 178#define SCD_WIN_SIZE 64
179#define SCD_FRAME_LIMIT 64 179#define SCD_FRAME_LIMIT 64
180 180
181#define IWL_SCD_TXFIFO_POS_TID (0) 181#define SCD_TXFIFO_POS_TID (0)
182#define IWL_SCD_TXFIFO_POS_RA (4) 182#define SCD_TXFIFO_POS_RA (4)
183#define IWL_SCD_QUEUE_RA_TID_MAP_RATID_MSK (0x01FF) 183#define SCD_QUEUE_RA_TID_MAP_RATID_MSK (0x01FF)
184 184
185/* agn SCD */ 185/* agn SCD */
186#define IWLAGN_SCD_QUEUE_STTS_REG_POS_TXF (0) 186#define SCD_QUEUE_STTS_REG_POS_TXF (0)
187#define IWLAGN_SCD_QUEUE_STTS_REG_POS_ACTIVE (3) 187#define SCD_QUEUE_STTS_REG_POS_ACTIVE (3)
188#define IWLAGN_SCD_QUEUE_STTS_REG_POS_WSL (4) 188#define SCD_QUEUE_STTS_REG_POS_WSL (4)
189#define IWLAGN_SCD_QUEUE_STTS_REG_POS_SCD_ACT_EN (19) 189#define SCD_QUEUE_STTS_REG_POS_SCD_ACT_EN (19)
190#define IWLAGN_SCD_QUEUE_STTS_REG_MSK (0x00FF0000) 190#define SCD_QUEUE_STTS_REG_MSK (0x00FF0000)
191 191
192#define IWLAGN_SCD_QUEUE_CTX_REG1_CREDIT_POS (8) 192#define SCD_QUEUE_CTX_REG1_CREDIT_POS (8)
193#define IWLAGN_SCD_QUEUE_CTX_REG1_CREDIT_MSK (0x00FFFF00) 193#define SCD_QUEUE_CTX_REG1_CREDIT_MSK (0x00FFFF00)
194#define IWLAGN_SCD_QUEUE_CTX_REG1_SUPER_CREDIT_POS (24) 194#define SCD_QUEUE_CTX_REG1_SUPER_CREDIT_POS (24)
195#define IWLAGN_SCD_QUEUE_CTX_REG1_SUPER_CREDIT_MSK (0xFF000000) 195#define SCD_QUEUE_CTX_REG1_SUPER_CREDIT_MSK (0xFF000000)
196#define IWLAGN_SCD_QUEUE_CTX_REG2_WIN_SIZE_POS (0) 196#define SCD_QUEUE_CTX_REG2_WIN_SIZE_POS (0)
197#define IWLAGN_SCD_QUEUE_CTX_REG2_WIN_SIZE_MSK (0x0000007F) 197#define SCD_QUEUE_CTX_REG2_WIN_SIZE_MSK (0x0000007F)
198#define IWLAGN_SCD_QUEUE_CTX_REG2_FRAME_LIMIT_POS (16) 198#define SCD_QUEUE_CTX_REG2_FRAME_LIMIT_POS (16)
199#define IWLAGN_SCD_QUEUE_CTX_REG2_FRAME_LIMIT_MSK (0x007F0000) 199#define SCD_QUEUE_CTX_REG2_FRAME_LIMIT_MSK (0x007F0000)
200 200
201/* Context Data */ 201/* Context Data */
202#define IWLAGN_SCD_CONTEXT_MEM_LOWER_BOUND (SCD_MEM_LOWER_BOUND + 0x600) 202#define SCD_CONTEXT_MEM_LOWER_BOUND (SCD_MEM_LOWER_BOUND + 0x600)
203#define IWLAGN_SCD_CONTEXT_MEM_UPPER_BOUND (SCD_MEM_LOWER_BOUND + 0x6A0) 203#define SCD_CONTEXT_MEM_UPPER_BOUND (SCD_MEM_LOWER_BOUND + 0x6A0)
204 204
205/* Tx status */ 205/* Tx status */
206#define IWLAGN_SCD_TX_STTS_MEM_LOWER_BOUND (SCD_MEM_LOWER_BOUND + 0x6A0) 206#define SCD_TX_STTS_MEM_LOWER_BOUND (SCD_MEM_LOWER_BOUND + 0x6A0)
207#define IWLAGN_SCD_TX_STTS_MEM_UPPER_BOUND (SCD_MEM_LOWER_BOUND + 0x7E0) 207#define SCD_TX_STTS_MEM_UPPER_BOUND (SCD_MEM_LOWER_BOUND + 0x7E0)
208 208
209/* Translation Data */ 209/* Translation Data */
210#define IWLAGN_SCD_TRANS_TBL_MEM_LOWER_BOUND (SCD_MEM_LOWER_BOUND + 0x7E0) 210#define SCD_TRANS_TBL_MEM_LOWER_BOUND (SCD_MEM_LOWER_BOUND + 0x7E0)
211#define IWLAGN_SCD_TRANS_TBL_MEM_UPPER_BOUND (SCD_MEM_LOWER_BOUND + 0x808) 211#define SCD_TRANS_TBL_MEM_UPPER_BOUND (SCD_MEM_LOWER_BOUND + 0x808)
212 212
213#define IWLAGN_SCD_CONTEXT_QUEUE_OFFSET(x)\ 213#define SCD_CONTEXT_QUEUE_OFFSET(x)\
214 (IWLAGN_SCD_CONTEXT_MEM_LOWER_BOUND + ((x) * 8)) 214 (SCD_CONTEXT_MEM_LOWER_BOUND + ((x) * 8))
215 215
216#define IWLAGN_SCD_TRANSLATE_TBL_OFFSET_QUEUE(x) \ 216#define SCD_TRANS_TBL_OFFSET_QUEUE(x) \
217 ((IWLAGN_SCD_TRANS_TBL_MEM_LOWER_BOUND + ((x) * 2)) & 0xfffc) 217 ((SCD_TRANS_TBL_MEM_LOWER_BOUND + ((x) * 2)) & 0xfffc)
218 218
219#define IWLAGN_SCD_QUEUECHAIN_SEL_ALL(priv) \ 219#define SCD_QUEUECHAIN_SEL_ALL(priv) \
220 (((1<<(priv)->hw_params.max_txq_num) - 1) &\ 220 (((1<<(priv)->hw_params.max_txq_num) - 1) &\
221 (~(1<<(priv)->cmd_queue))) 221 (~(1<<(priv)->cmd_queue)))
222 222
223#define IWLAGN_SCD_BASE (PRPH_BASE + 0xa02c00) 223#define SCD_BASE (PRPH_BASE + 0xa02c00)
224 224
225#define IWLAGN_SCD_SRAM_BASE_ADDR (IWLAGN_SCD_BASE + 0x0) 225#define SCD_SRAM_BASE_ADDR (SCD_BASE + 0x0)
226#define IWLAGN_SCD_DRAM_BASE_ADDR (IWLAGN_SCD_BASE + 0x8) 226#define SCD_DRAM_BASE_ADDR (SCD_BASE + 0x8)
227#define IWLAGN_SCD_AIT (IWLAGN_SCD_BASE + 0x0c) 227#define SCD_AIT (SCD_BASE + 0x0c)
228#define IWLAGN_SCD_TXFACT (IWLAGN_SCD_BASE + 0x10) 228#define SCD_TXFACT (SCD_BASE + 0x10)
229#define IWLAGN_SCD_ACTIVE (IWLAGN_SCD_BASE + 0x14) 229#define SCD_ACTIVE (SCD_BASE + 0x14)
230#define IWLAGN_SCD_QUEUE_WRPTR(x) (IWLAGN_SCD_BASE + 0x18 + (x) * 4) 230#define SCD_QUEUE_WRPTR(x) (SCD_BASE + 0x18 + (x) * 4)
231#define IWLAGN_SCD_QUEUE_RDPTR(x) (IWLAGN_SCD_BASE + 0x68 + (x) * 4) 231#define SCD_QUEUE_RDPTR(x) (SCD_BASE + 0x68 + (x) * 4)
232#define IWLAGN_SCD_QUEUECHAIN_SEL (IWLAGN_SCD_BASE + 0xe8) 232#define SCD_QUEUECHAIN_SEL (SCD_BASE + 0xe8)
233#define IWLAGN_SCD_AGGR_SEL (IWLAGN_SCD_BASE + 0x248) 233#define SCD_AGGR_SEL (SCD_BASE + 0x248)
234#define IWLAGN_SCD_INTERRUPT_MASK (IWLAGN_SCD_BASE + 0x108) 234#define SCD_INTERRUPT_MASK (SCD_BASE + 0x108)
235#define IWLAGN_SCD_QUEUE_STATUS_BITS(x) (IWLAGN_SCD_BASE + 0x10c + (x) * 4) 235#define SCD_QUEUE_STATUS_BITS(x) (SCD_BASE + 0x10c + (x) * 4)
236 236
237/*********************** END TX SCHEDULER *************************************/ 237/*********************** END TX SCHEDULER *************************************/
238 238
diff --git a/drivers/net/wireless/iwlwifi/iwl-rx.c b/drivers/net/wireless/iwlwifi/iwl-rx.c
index f3f3efe38ce2..8e314003b63a 100644
--- a/drivers/net/wireless/iwlwifi/iwl-rx.c
+++ b/drivers/net/wireless/iwlwifi/iwl-rx.c
@@ -41,142 +41,6 @@
41#include "iwl-agn-calib.h" 41#include "iwl-agn-calib.h"
42#include "iwl-agn.h" 42#include "iwl-agn.h"
43 43
44/******************************************************************************
45 *
46 * RX path functions
47 *
48 ******************************************************************************/
49
50/*
51 * Rx theory of operation
52 *
53 * Driver allocates a circular buffer of Receive Buffer Descriptors (RBDs),
54 * each of which point to Receive Buffers to be filled by the NIC. These get
55 * used not only for Rx frames, but for any command response or notification
56 * from the NIC. The driver and NIC manage the Rx buffers by means
57 * of indexes into the circular buffer.
58 *
59 * Rx Queue Indexes
60 * The host/firmware share two index registers for managing the Rx buffers.
61 *
62 * The READ index maps to the first position that the firmware may be writing
63 * to -- the driver can read up to (but not including) this position and get
64 * good data.
65 * The READ index is managed by the firmware once the card is enabled.
66 *
67 * The WRITE index maps to the last position the driver has read from -- the
68 * position preceding WRITE is the last slot the firmware can place a packet.
69 *
70 * The queue is empty (no good data) if WRITE = READ - 1, and is full if
71 * WRITE = READ.
72 *
73 * During initialization, the host sets up the READ queue position to the first
74 * INDEX position, and WRITE to the last (READ - 1 wrapped)
75 *
76 * When the firmware places a packet in a buffer, it will advance the READ index
77 * and fire the RX interrupt. The driver can then query the READ index and
78 * process as many packets as possible, moving the WRITE index forward as it
79 * resets the Rx queue buffers with new memory.
80 *
81 * The management in the driver is as follows:
82 * + A list of pre-allocated SKBs is stored in iwl->rxq->rx_free. When
83 * iwl->rxq->free_count drops to or below RX_LOW_WATERMARK, work is scheduled
84 * to replenish the iwl->rxq->rx_free.
85 * + In iwl_rx_replenish (scheduled) if 'processed' != 'read' then the
86 * iwl->rxq is replenished and the READ INDEX is updated (updating the
87 * 'processed' and 'read' driver indexes as well)
88 * + A received packet is processed and handed to the kernel network stack,
89 * detached from the iwl->rxq. The driver 'processed' index is updated.
90 * + The Host/Firmware iwl->rxq is replenished at tasklet time from the rx_free
91 * list. If there are no allocated buffers in iwl->rxq->rx_free, the READ
92 * INDEX is not incremented and iwl->status(RX_STALLED) is set. If there
93 * were enough free buffers and RX_STALLED is set it is cleared.
94 *
95 *
96 * Driver sequence:
97 *
98 * iwl_rx_queue_alloc() Allocates rx_free
99 * iwl_rx_replenish() Replenishes rx_free list from rx_used, and calls
100 * iwl_rx_queue_restock
101 * iwl_rx_queue_restock() Moves available buffers from rx_free into Rx
102 * queue, updates firmware pointers, and updates
103 * the WRITE index. If insufficient rx_free buffers
104 * are available, schedules iwl_rx_replenish
105 *
106 * -- enable interrupts --
107 * ISR - iwl_rx() Detach iwl_rx_mem_buffers from pool up to the
108 * READ INDEX, detaching the SKB from the pool.
109 * Moves the packet buffer from queue to rx_used.
110 * Calls iwl_rx_queue_restock to refill any empty
111 * slots.
112 * ...
113 *
114 */
115
116/**
117 * iwl_rx_queue_space - Return number of free slots available in queue.
118 */
119int iwl_rx_queue_space(const struct iwl_rx_queue *q)
120{
121 int s = q->read - q->write;
122 if (s <= 0)
123 s += RX_QUEUE_SIZE;
124 /* keep some buffer to not confuse full and empty queue */
125 s -= 2;
126 if (s < 0)
127 s = 0;
128 return s;
129}
130
131/**
132 * iwl_rx_queue_update_write_ptr - Update the write pointer for the RX queue
133 */
134void iwl_rx_queue_update_write_ptr(struct iwl_priv *priv, struct iwl_rx_queue *q)
135{
136 unsigned long flags;
137 u32 reg;
138
139 spin_lock_irqsave(&q->lock, flags);
140
141 if (q->need_update == 0)
142 goto exit_unlock;
143
144 if (priv->cfg->base_params->shadow_reg_enable) {
145 /* shadow register enabled */
146 /* Device expects a multiple of 8 */
147 q->write_actual = (q->write & ~0x7);
148 iwl_write32(priv, FH_RSCSR_CHNL0_WPTR, q->write_actual);
149 } else {
150 /* If power-saving is in use, make sure device is awake */
151 if (test_bit(STATUS_POWER_PMI, &priv->status)) {
152 reg = iwl_read32(priv, CSR_UCODE_DRV_GP1);
153
154 if (reg & CSR_UCODE_DRV_GP1_BIT_MAC_SLEEP) {
155 IWL_DEBUG_INFO(priv,
156 "Rx queue requesting wakeup,"
157 " GP1 = 0x%x\n", reg);
158 iwl_set_bit(priv, CSR_GP_CNTRL,
159 CSR_GP_CNTRL_REG_FLAG_MAC_ACCESS_REQ);
160 goto exit_unlock;
161 }
162
163 q->write_actual = (q->write & ~0x7);
164 iwl_write_direct32(priv, FH_RSCSR_CHNL0_WPTR,
165 q->write_actual);
166
167 /* Else device is assumed to be awake */
168 } else {
169 /* Device expects a multiple of 8 */
170 q->write_actual = (q->write & ~0x7);
171 iwl_write_direct32(priv, FH_RSCSR_CHNL0_WPTR,
172 q->write_actual);
173 }
174 }
175 q->need_update = 0;
176
177 exit_unlock:
178 spin_unlock_irqrestore(&q->lock, flags);
179}
180 44
181/****************************************************************************** 45/******************************************************************************
182 * 46 *
@@ -306,7 +170,7 @@ static bool iwl_good_ack_health(struct iwl_priv *priv,
306 int actual_delta, expected_delta, ba_timeout_delta; 170 int actual_delta, expected_delta, ba_timeout_delta;
307 struct statistics_tx *old; 171 struct statistics_tx *old;
308 172
309 if (priv->_agn.agg_tids_count) 173 if (priv->agg_tids_count)
310 return true; 174 return true;
311 175
312 old = &priv->statistics.tx; 176 old = &priv->statistics.tx;
@@ -624,8 +488,8 @@ static void iwl_rx_statistics(struct iwl_priv *priv,
624 iwl_rx_calc_noise(priv); 488 iwl_rx_calc_noise(priv);
625 queue_work(priv->workqueue, &priv->run_time_calib_work); 489 queue_work(priv->workqueue, &priv->run_time_calib_work);
626 } 490 }
627 if (priv->cfg->ops->lib->temperature && change) 491 if (priv->cfg->lib->temperature && change)
628 priv->cfg->ops->lib->temperature(priv); 492 priv->cfg->lib->temperature(priv);
629} 493}
630 494
631static void iwl_rx_reply_statistics(struct iwl_priv *priv, 495static void iwl_rx_reply_statistics(struct iwl_priv *priv,
@@ -728,8 +592,8 @@ static void iwl_rx_reply_rx_phy(struct iwl_priv *priv,
728{ 592{
729 struct iwl_rx_packet *pkt = rxb_addr(rxb); 593 struct iwl_rx_packet *pkt = rxb_addr(rxb);
730 594
731 priv->_agn.last_phy_res_valid = true; 595 priv->last_phy_res_valid = true;
732 memcpy(&priv->_agn.last_phy_res, pkt->u.raw, 596 memcpy(&priv->last_phy_res, pkt->u.raw,
733 sizeof(struct iwl_rx_phy_res)); 597 sizeof(struct iwl_rx_phy_res));
734} 598}
735 599
@@ -977,11 +841,11 @@ static void iwl_rx_reply_rx(struct iwl_priv *priv,
977 phy_res->cfg_phy_cnt + len); 841 phy_res->cfg_phy_cnt + len);
978 ampdu_status = le32_to_cpu(rx_pkt_status); 842 ampdu_status = le32_to_cpu(rx_pkt_status);
979 } else { 843 } else {
980 if (!priv->_agn.last_phy_res_valid) { 844 if (!priv->last_phy_res_valid) {
981 IWL_ERR(priv, "MPDU frame without cached PHY data\n"); 845 IWL_ERR(priv, "MPDU frame without cached PHY data\n");
982 return; 846 return;
983 } 847 }
984 phy_res = &priv->_agn.last_phy_res; 848 phy_res = &priv->last_phy_res;
985 amsdu = (struct iwl_rx_mpdu_res_start *)pkt->u.raw; 849 amsdu = (struct iwl_rx_mpdu_res_start *)pkt->u.raw;
986 header = (struct ieee80211_hdr *)(pkt->u.raw + sizeof(*amsdu)); 850 header = (struct ieee80211_hdr *)(pkt->u.raw + sizeof(*amsdu));
987 len = le16_to_cpu(amsdu->byte_count); 851 len = le16_to_cpu(amsdu->byte_count);
@@ -1102,6 +966,64 @@ void iwl_setup_rx_handlers(struct iwl_priv *priv)
1102 /* block ack */ 966 /* block ack */
1103 handlers[REPLY_COMPRESSED_BA] = iwlagn_rx_reply_compressed_ba; 967 handlers[REPLY_COMPRESSED_BA] = iwlagn_rx_reply_compressed_ba;
1104 968
1105 /* Set up hardware specific Rx handlers */ 969 /* init calibration handlers */
1106 priv->cfg->ops->lib->rx_handler_setup(priv); 970 priv->rx_handlers[CALIBRATION_RES_NOTIFICATION] =
971 iwlagn_rx_calib_result;
972 priv->rx_handlers[REPLY_TX] = iwlagn_rx_reply_tx;
973
974 /* set up notification wait support */
975 spin_lock_init(&priv->notif_wait_lock);
976 INIT_LIST_HEAD(&priv->notif_waits);
977 init_waitqueue_head(&priv->notif_waitq);
978
979 /* Set up BT Rx handlers */
980 if (priv->cfg->lib->bt_rx_handler_setup)
981 priv->cfg->lib->bt_rx_handler_setup(priv);
982
983}
984
985void iwl_rx_dispatch(struct iwl_priv *priv, struct iwl_rx_mem_buffer *rxb)
986{
987 struct iwl_rx_packet *pkt = rxb_addr(rxb);
988
989 /*
990 * Do the notification wait before RX handlers so
991 * even if the RX handler consumes the RXB we have
992 * access to it in the notification wait entry.
993 */
994 if (!list_empty(&priv->notif_waits)) {
995 struct iwl_notification_wait *w;
996
997 spin_lock(&priv->notif_wait_lock);
998 list_for_each_entry(w, &priv->notif_waits, list) {
999 if (w->cmd != pkt->hdr.cmd)
1000 continue;
1001 IWL_DEBUG_RX(priv,
1002 "Notif: %s, 0x%02x - wake the callers up\n",
1003 get_cmd_string(pkt->hdr.cmd),
1004 pkt->hdr.cmd);
1005 w->triggered = true;
1006 if (w->fn)
1007 w->fn(priv, pkt, w->fn_data);
1008 }
1009 spin_unlock(&priv->notif_wait_lock);
1010
1011 wake_up_all(&priv->notif_waitq);
1012 }
1013
1014 if (priv->pre_rx_handler)
1015 priv->pre_rx_handler(priv, rxb);
1016
1017 /* Based on type of command response or notification,
1018 * handle those that need handling via function in
1019 * rx_handlers table. See iwl_setup_rx_handlers() */
1020 if (priv->rx_handlers[pkt->hdr.cmd]) {
1021 priv->isr_stats.rx_handlers[pkt->hdr.cmd]++;
1022 priv->rx_handlers[pkt->hdr.cmd] (priv, rxb);
1023 } else {
1024 /* No handling needed */
1025 IWL_DEBUG_RX(priv,
1026 "No handler needed for %s, 0x%02x\n",
1027 get_cmd_string(pkt->hdr.cmd), pkt->hdr.cmd);
1028 }
1107} 1029}
diff --git a/drivers/net/wireless/iwlwifi/iwl-scan.c b/drivers/net/wireless/iwlwifi/iwl-scan.c
index f6ebe29eb790..dd6937e97055 100644
--- a/drivers/net/wireless/iwlwifi/iwl-scan.c
+++ b/drivers/net/wireless/iwlwifi/iwl-scan.c
@@ -75,7 +75,7 @@ static int iwl_send_scan_abort(struct iwl_priv *priv)
75 test_bit(STATUS_EXIT_PENDING, &priv->status)) 75 test_bit(STATUS_EXIT_PENDING, &priv->status))
76 return -EIO; 76 return -EIO;
77 77
78 ret = trans_send_cmd(priv, &cmd); 78 ret = trans_send_cmd(&priv->trans, &cmd);
79 if (ret) 79 if (ret)
80 return ret; 80 return ret;
81 81
@@ -565,10 +565,10 @@ static void iwl_bg_scan_completed(struct work_struct *work)
565 goto out_settings; 565 goto out_settings;
566 } 566 }
567 567
568 if (priv->scan_type == IWL_SCAN_OFFCH_TX && priv->_agn.offchan_tx_skb) { 568 if (priv->scan_type == IWL_SCAN_OFFCH_TX && priv->offchan_tx_skb) {
569 ieee80211_tx_status_irqsafe(priv->hw, 569 ieee80211_tx_status_irqsafe(priv->hw,
570 priv->_agn.offchan_tx_skb); 570 priv->offchan_tx_skb);
571 priv->_agn.offchan_tx_skb = NULL; 571 priv->offchan_tx_skb = NULL;
572 } 572 }
573 573
574 if (priv->scan_type != IWL_SCAN_NORMAL && !aborted) { 574 if (priv->scan_type != IWL_SCAN_NORMAL && !aborted) {
diff --git a/drivers/net/wireless/iwlwifi/iwl-sta.c b/drivers/net/wireless/iwlwifi/iwl-sta.c
index 65386e575b1c..1ef3b7106ad5 100644
--- a/drivers/net/wireless/iwlwifi/iwl-sta.c
+++ b/drivers/net/wireless/iwlwifi/iwl-sta.c
@@ -168,7 +168,7 @@ int iwl_send_add_sta(struct iwl_priv *priv,
168 } 168 }
169 169
170 cmd.len[0] = iwlagn_build_addsta_hcmd(sta, data); 170 cmd.len[0] = iwlagn_build_addsta_hcmd(sta, data);
171 ret = trans_send_cmd(priv, &cmd); 171 ret = trans_send_cmd(&priv->trans, &cmd);
172 172
173 if (ret || (flags & CMD_ASYNC)) 173 if (ret || (flags & CMD_ASYNC))
174 return ret; 174 return ret;
@@ -424,7 +424,7 @@ static int iwl_send_remove_station(struct iwl_priv *priv,
424 424
425 cmd.flags |= CMD_WANT_SKB; 425 cmd.flags |= CMD_WANT_SKB;
426 426
427 ret = trans_send_cmd(priv, &cmd); 427 ret = trans_send_cmd(&priv->trans, &cmd);
428 428
429 if (ret) 429 if (ret)
430 return ret; 430 return ret;
@@ -669,7 +669,7 @@ void iwl_reprogram_ap_sta(struct iwl_priv *priv, struct iwl_rxon_context *ctx)
669 iwl_send_lq_cmd(priv, ctx, &lq, CMD_SYNC, true); 669 iwl_send_lq_cmd(priv, ctx, &lq, CMD_SYNC, true);
670} 670}
671 671
672int iwl_get_free_ucode_key_index(struct iwl_priv *priv) 672int iwl_get_free_ucode_key_offset(struct iwl_priv *priv)
673{ 673{
674 int i; 674 int i;
675 675
@@ -793,7 +793,7 @@ int iwl_send_lq_cmd(struct iwl_priv *priv, struct iwl_rxon_context *ctx,
793 return -EINVAL; 793 return -EINVAL;
794 794
795 if (is_lq_table_valid(priv, ctx, lq)) 795 if (is_lq_table_valid(priv, ctx, lq))
796 ret = trans_send_cmd(priv, &cmd); 796 ret = trans_send_cmd(&priv->trans, &cmd);
797 else 797 else
798 ret = -EINVAL; 798 ret = -EINVAL;
799 799
diff --git a/drivers/net/wireless/iwlwifi/iwl-sta.h b/drivers/net/wireless/iwlwifi/iwl-sta.h
index ff64027ff4cb..9a6768d66851 100644
--- a/drivers/net/wireless/iwlwifi/iwl-sta.h
+++ b/drivers/net/wireless/iwlwifi/iwl-sta.h
@@ -31,9 +31,6 @@
31 31
32#include "iwl-dev.h" 32#include "iwl-dev.h"
33 33
34#define HW_KEY_DYNAMIC 0
35#define HW_KEY_DEFAULT 1
36
37#define IWL_STA_DRIVER_ACTIVE BIT(0) /* driver entry is active */ 34#define IWL_STA_DRIVER_ACTIVE BIT(0) /* driver entry is active */
38#define IWL_STA_UCODE_ACTIVE BIT(1) /* ucode entry is active */ 35#define IWL_STA_UCODE_ACTIVE BIT(1) /* ucode entry is active */
39#define IWL_STA_UCODE_INPROGRESS BIT(2) /* ucode entry is in process of 36#define IWL_STA_UCODE_INPROGRESS BIT(2) /* ucode entry is in process of
@@ -47,7 +44,7 @@ void iwl_restore_stations(struct iwl_priv *priv, struct iwl_rxon_context *ctx);
47void iwl_clear_ucode_stations(struct iwl_priv *priv, 44void iwl_clear_ucode_stations(struct iwl_priv *priv,
48 struct iwl_rxon_context *ctx); 45 struct iwl_rxon_context *ctx);
49void iwl_dealloc_bcast_stations(struct iwl_priv *priv); 46void iwl_dealloc_bcast_stations(struct iwl_priv *priv);
50int iwl_get_free_ucode_key_index(struct iwl_priv *priv); 47int iwl_get_free_ucode_key_offset(struct iwl_priv *priv);
51int iwl_send_add_sta(struct iwl_priv *priv, 48int iwl_send_add_sta(struct iwl_priv *priv,
52 struct iwl_addsta_cmd *sta, u8 flags); 49 struct iwl_addsta_cmd *sta, u8 flags);
53int iwl_add_station_common(struct iwl_priv *priv, struct iwl_rxon_context *ctx, 50int iwl_add_station_common(struct iwl_priv *priv, struct iwl_rxon_context *ctx,
diff --git a/drivers/net/wireless/iwlwifi/iwl-sv-open.c b/drivers/net/wireless/iwlwifi/iwl-sv-open.c
index 77ed1c295da4..b11f60de4f1e 100644
--- a/drivers/net/wireless/iwlwifi/iwl-sv-open.c
+++ b/drivers/net/wireless/iwlwifi/iwl-sv-open.c
@@ -181,12 +181,10 @@ void iwl_testmode_init(struct iwl_priv *priv)
181 181
182static void iwl_trace_cleanup(struct iwl_priv *priv) 182static void iwl_trace_cleanup(struct iwl_priv *priv)
183{ 183{
184 struct device *dev = priv->bus.dev;
185
186 if (priv->testmode_trace.trace_enabled) { 184 if (priv->testmode_trace.trace_enabled) {
187 if (priv->testmode_trace.cpu_addr && 185 if (priv->testmode_trace.cpu_addr &&
188 priv->testmode_trace.dma_addr) 186 priv->testmode_trace.dma_addr)
189 dma_free_coherent(dev, 187 dma_free_coherent(priv->bus->dev,
190 priv->testmode_trace.total_size, 188 priv->testmode_trace.total_size,
191 priv->testmode_trace.cpu_addr, 189 priv->testmode_trace.cpu_addr,
192 priv->testmode_trace.dma_addr); 190 priv->testmode_trace.dma_addr);
@@ -241,7 +239,7 @@ static int iwl_testmode_ucode(struct ieee80211_hw *hw, struct nlattr **tb)
241 IWL_INFO(priv, "testmode ucode command ID 0x%x, flags 0x%x," 239 IWL_INFO(priv, "testmode ucode command ID 0x%x, flags 0x%x,"
242 " len %d\n", cmd.id, cmd.flags, cmd.len[0]); 240 " len %d\n", cmd.id, cmd.flags, cmd.len[0]);
243 /* ok, let's submit the command to ucode */ 241 /* ok, let's submit the command to ucode */
244 return trans_send_cmd(priv, &cmd); 242 return trans_send_cmd(&priv->trans, &cmd);
245} 243}
246 244
247 245
@@ -407,7 +405,7 @@ static int iwl_testmode_driver(struct ieee80211_hw *hw, struct nlattr **tb)
407 405
408 case IWL_TM_CMD_APP2DEV_CFG_INIT_CALIB: 406 case IWL_TM_CMD_APP2DEV_CFG_INIT_CALIB:
409 iwl_testmode_cfg_init_calib(priv); 407 iwl_testmode_cfg_init_calib(priv);
410 iwlagn_stop_device(priv); 408 trans_stop_device(&priv->trans);
411 break; 409 break;
412 410
413 case IWL_TM_CMD_APP2DEV_LOAD_RUNTIME_FW: 411 case IWL_TM_CMD_APP2DEV_LOAD_RUNTIME_FW:
@@ -486,7 +484,7 @@ static int iwl_testmode_trace(struct ieee80211_hw *hw, struct nlattr **tb)
486 struct iwl_priv *priv = hw->priv; 484 struct iwl_priv *priv = hw->priv;
487 struct sk_buff *skb; 485 struct sk_buff *skb;
488 int status = 0; 486 int status = 0;
489 struct device *dev = priv->bus.dev; 487 struct device *dev = priv->bus->dev;
490 488
491 switch (nla_get_u32(tb[IWL_TM_ATTR_COMMAND])) { 489 switch (nla_get_u32(tb[IWL_TM_ATTR_COMMAND])) {
492 case IWL_TM_CMD_APP2DEV_BEGIN_TRACE: 490 case IWL_TM_CMD_APP2DEV_BEGIN_TRACE:
diff --git a/drivers/net/wireless/iwlwifi/iwl-trans-int-pcie.h b/drivers/net/wireless/iwlwifi/iwl-trans-int-pcie.h
new file mode 100644
index 000000000000..b79330d84185
--- /dev/null
+++ b/drivers/net/wireless/iwlwifi/iwl-trans-int-pcie.h
@@ -0,0 +1,82 @@
1/******************************************************************************
2 *
3 * Copyright(c) 2003 - 2011 Intel Corporation. All rights reserved.
4 *
5 * Portions of this file are derived from the ipw3945 project, as well
6 * as portions of the ieee80211 subsystem header files.
7 *
8 * This program is free software; you can redistribute it and/or modify it
9 * under the terms of version 2 of the GNU General Public License as
10 * published by the Free Software Foundation.
11 *
12 * This program is distributed in the hope that it will be useful, but WITHOUT
13 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
14 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
15 * more details.
16 *
17 * You should have received a copy of the GNU General Public License along with
18 * this program; if not, write to the Free Software Foundation, Inc.,
19 * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
20 *
21 * The full GNU General Public License is included in this distribution in the
22 * file called LICENSE.
23 *
24 * Contact Information:
25 * Intel Linux Wireless <ilw@linux.intel.com>
26 * Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
27 *
28 *****************************************************************************/
29#ifndef __iwl_trans_int_pcie_h__
30#define __iwl_trans_int_pcie_h__
31
32/*This file includes the declaration that are internal to the
33 * trans_pcie layer */
34
35/*****************************************************
36* RX
37******************************************************/
38void iwl_bg_rx_replenish(struct work_struct *data);
39void iwl_irq_tasklet(struct iwl_priv *priv);
40void iwlagn_rx_replenish(struct iwl_priv *priv);
41void iwl_rx_queue_update_write_ptr(struct iwl_priv *priv,
42 struct iwl_rx_queue *q);
43
44/*****************************************************
45* ICT
46******************************************************/
47int iwl_reset_ict(struct iwl_priv *priv);
48void iwl_disable_ict(struct iwl_priv *priv);
49int iwl_alloc_isr_ict(struct iwl_priv *priv);
50void iwl_free_isr_ict(struct iwl_priv *priv);
51irqreturn_t iwl_isr_ict(int irq, void *data);
52
53
54/*****************************************************
55* TX / HCMD
56******************************************************/
57void iwl_txq_update_write_ptr(struct iwl_priv *priv, struct iwl_tx_queue *txq);
58void iwlagn_txq_free_tfd(struct iwl_priv *priv, struct iwl_tx_queue *txq,
59 int index);
60int iwlagn_txq_attach_buf_to_tfd(struct iwl_priv *priv,
61 struct iwl_tx_queue *txq,
62 dma_addr_t addr, u16 len, u8 reset);
63int iwl_queue_init(struct iwl_priv *priv, struct iwl_queue *q,
64 int count, int slots_num, u32 id);
65int iwl_send_cmd(struct iwl_priv *priv, struct iwl_host_cmd *cmd);
66int __must_check iwl_send_cmd_pdu(struct iwl_priv *priv, u8 id, u32 flags,
67 u16 len, const void *data);
68void iwl_tx_cmd_complete(struct iwl_priv *priv, struct iwl_rx_mem_buffer *rxb);
69void iwl_trans_txq_update_byte_cnt_tbl(struct iwl_priv *priv,
70 struct iwl_tx_queue *txq,
71 u16 byte_cnt);
72int iwl_trans_txq_agg_disable(struct iwl_priv *priv, u16 txq_id,
73 u16 ssn_idx, u8 tx_fifo);
74void iwl_trans_set_wr_ptrs(struct iwl_priv *priv,
75 int txq_id, u32 index);
76void iwl_trans_tx_queue_set_status(struct iwl_priv *priv,
77 struct iwl_tx_queue *txq,
78 int tx_fifo_id, int scd_retry);
79void iwl_trans_txq_agg_setup(struct iwl_priv *priv, int sta_id, int tid,
80 int frame_limit);
81
82#endif /* __iwl_trans_int_pcie_h__ */
diff --git a/drivers/net/wireless/iwlwifi/iwl-trans-rx-pcie.c b/drivers/net/wireless/iwlwifi/iwl-trans-rx-pcie.c
new file mode 100644
index 000000000000..474860290404
--- /dev/null
+++ b/drivers/net/wireless/iwlwifi/iwl-trans-rx-pcie.c
@@ -0,0 +1,979 @@
1/******************************************************************************
2 *
3 * Copyright(c) 2003 - 2011 Intel Corporation. All rights reserved.
4 *
5 * Portions of this file are derived from the ipw3945 project, as well
6 * as portions of the ieee80211 subsystem header files.
7 *
8 * This program is free software; you can redistribute it and/or modify it
9 * under the terms of version 2 of the GNU General Public License as
10 * published by the Free Software Foundation.
11 *
12 * This program is distributed in the hope that it will be useful, but WITHOUT
13 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
14 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
15 * more details.
16 *
17 * You should have received a copy of the GNU General Public License along with
18 * this program; if not, write to the Free Software Foundation, Inc.,
19 * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
20 *
21 * The full GNU General Public License is included in this distribution in the
22 * file called LICENSE.
23 *
24 * Contact Information:
25 * Intel Linux Wireless <ilw@linux.intel.com>
26 * Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
27 *
28 *****************************************************************************/
29#include <linux/sched.h>
30#include <linux/wait.h>
31#include <linux/gfp.h>
32
33#include "iwl-dev.h"
34#include "iwl-agn.h"
35#include "iwl-core.h"
36#include "iwl-io.h"
37#include "iwl-helpers.h"
38#include "iwl-trans-int-pcie.h"
39
40/******************************************************************************
41 *
42 * RX path functions
43 *
44 ******************************************************************************/
45
46/*
47 * Rx theory of operation
48 *
49 * Driver allocates a circular buffer of Receive Buffer Descriptors (RBDs),
50 * each of which point to Receive Buffers to be filled by the NIC. These get
51 * used not only for Rx frames, but for any command response or notification
52 * from the NIC. The driver and NIC manage the Rx buffers by means
53 * of indexes into the circular buffer.
54 *
55 * Rx Queue Indexes
56 * The host/firmware share two index registers for managing the Rx buffers.
57 *
58 * The READ index maps to the first position that the firmware may be writing
59 * to -- the driver can read up to (but not including) this position and get
60 * good data.
61 * The READ index is managed by the firmware once the card is enabled.
62 *
63 * The WRITE index maps to the last position the driver has read from -- the
64 * position preceding WRITE is the last slot the firmware can place a packet.
65 *
66 * The queue is empty (no good data) if WRITE = READ - 1, and is full if
67 * WRITE = READ.
68 *
69 * During initialization, the host sets up the READ queue position to the first
70 * INDEX position, and WRITE to the last (READ - 1 wrapped)
71 *
72 * When the firmware places a packet in a buffer, it will advance the READ index
73 * and fire the RX interrupt. The driver can then query the READ index and
74 * process as many packets as possible, moving the WRITE index forward as it
75 * resets the Rx queue buffers with new memory.
76 *
77 * The management in the driver is as follows:
78 * + A list of pre-allocated SKBs is stored in iwl->rxq->rx_free. When
79 * iwl->rxq->free_count drops to or below RX_LOW_WATERMARK, work is scheduled
80 * to replenish the iwl->rxq->rx_free.
81 * + In iwl_rx_replenish (scheduled) if 'processed' != 'read' then the
82 * iwl->rxq is replenished and the READ INDEX is updated (updating the
83 * 'processed' and 'read' driver indexes as well)
84 * + A received packet is processed and handed to the kernel network stack,
85 * detached from the iwl->rxq. The driver 'processed' index is updated.
86 * + The Host/Firmware iwl->rxq is replenished at tasklet time from the rx_free
87 * list. If there are no allocated buffers in iwl->rxq->rx_free, the READ
88 * INDEX is not incremented and iwl->status(RX_STALLED) is set. If there
89 * were enough free buffers and RX_STALLED is set it is cleared.
90 *
91 *
92 * Driver sequence:
93 *
94 * iwl_rx_queue_alloc() Allocates rx_free
95 * iwl_rx_replenish() Replenishes rx_free list from rx_used, and calls
96 * iwl_rx_queue_restock
97 * iwl_rx_queue_restock() Moves available buffers from rx_free into Rx
98 * queue, updates firmware pointers, and updates
99 * the WRITE index. If insufficient rx_free buffers
100 * are available, schedules iwl_rx_replenish
101 *
102 * -- enable interrupts --
103 * ISR - iwl_rx() Detach iwl_rx_mem_buffers from pool up to the
104 * READ INDEX, detaching the SKB from the pool.
105 * Moves the packet buffer from queue to rx_used.
106 * Calls iwl_rx_queue_restock to refill any empty
107 * slots.
108 * ...
109 *
110 */
111
112/**
113 * iwl_rx_queue_space - Return number of free slots available in queue.
114 */
115static int iwl_rx_queue_space(const struct iwl_rx_queue *q)
116{
117 int s = q->read - q->write;
118 if (s <= 0)
119 s += RX_QUEUE_SIZE;
120 /* keep some buffer to not confuse full and empty queue */
121 s -= 2;
122 if (s < 0)
123 s = 0;
124 return s;
125}
126
127/**
128 * iwl_rx_queue_update_write_ptr - Update the write pointer for the RX queue
129 */
130void iwl_rx_queue_update_write_ptr(struct iwl_priv *priv,
131 struct iwl_rx_queue *q)
132{
133 unsigned long flags;
134 u32 reg;
135
136 spin_lock_irqsave(&q->lock, flags);
137
138 if (q->need_update == 0)
139 goto exit_unlock;
140
141 if (priv->cfg->base_params->shadow_reg_enable) {
142 /* shadow register enabled */
143 /* Device expects a multiple of 8 */
144 q->write_actual = (q->write & ~0x7);
145 iwl_write32(priv, FH_RSCSR_CHNL0_WPTR, q->write_actual);
146 } else {
147 /* If power-saving is in use, make sure device is awake */
148 if (test_bit(STATUS_POWER_PMI, &priv->status)) {
149 reg = iwl_read32(priv, CSR_UCODE_DRV_GP1);
150
151 if (reg & CSR_UCODE_DRV_GP1_BIT_MAC_SLEEP) {
152 IWL_DEBUG_INFO(priv,
153 "Rx queue requesting wakeup,"
154 " GP1 = 0x%x\n", reg);
155 iwl_set_bit(priv, CSR_GP_CNTRL,
156 CSR_GP_CNTRL_REG_FLAG_MAC_ACCESS_REQ);
157 goto exit_unlock;
158 }
159
160 q->write_actual = (q->write & ~0x7);
161 iwl_write_direct32(priv, FH_RSCSR_CHNL0_WPTR,
162 q->write_actual);
163
164 /* Else device is assumed to be awake */
165 } else {
166 /* Device expects a multiple of 8 */
167 q->write_actual = (q->write & ~0x7);
168 iwl_write_direct32(priv, FH_RSCSR_CHNL0_WPTR,
169 q->write_actual);
170 }
171 }
172 q->need_update = 0;
173
174 exit_unlock:
175 spin_unlock_irqrestore(&q->lock, flags);
176}
177
178/**
179 * iwlagn_dma_addr2rbd_ptr - convert a DMA address to a uCode read buffer ptr
180 */
181static inline __le32 iwlagn_dma_addr2rbd_ptr(struct iwl_priv *priv,
182 dma_addr_t dma_addr)
183{
184 return cpu_to_le32((u32)(dma_addr >> 8));
185}
186
187/**
188 * iwlagn_rx_queue_restock - refill RX queue from pre-allocated pool
189 *
190 * If there are slots in the RX queue that need to be restocked,
191 * and we have free pre-allocated buffers, fill the ranks as much
192 * as we can, pulling from rx_free.
193 *
194 * This moves the 'write' index forward to catch up with 'processed', and
195 * also updates the memory address in the firmware to reference the new
196 * target buffer.
197 */
198static void iwlagn_rx_queue_restock(struct iwl_priv *priv)
199{
200 struct iwl_rx_queue *rxq = &priv->rxq;
201 struct list_head *element;
202 struct iwl_rx_mem_buffer *rxb;
203 unsigned long flags;
204
205 spin_lock_irqsave(&rxq->lock, flags);
206 while ((iwl_rx_queue_space(rxq) > 0) && (rxq->free_count)) {
207 /* The overwritten rxb must be a used one */
208 rxb = rxq->queue[rxq->write];
209 BUG_ON(rxb && rxb->page);
210
211 /* Get next free Rx buffer, remove from free list */
212 element = rxq->rx_free.next;
213 rxb = list_entry(element, struct iwl_rx_mem_buffer, list);
214 list_del(element);
215
216 /* Point to Rx buffer via next RBD in circular buffer */
217 rxq->bd[rxq->write] = iwlagn_dma_addr2rbd_ptr(priv,
218 rxb->page_dma);
219 rxq->queue[rxq->write] = rxb;
220 rxq->write = (rxq->write + 1) & RX_QUEUE_MASK;
221 rxq->free_count--;
222 }
223 spin_unlock_irqrestore(&rxq->lock, flags);
224 /* If the pre-allocated buffer pool is dropping low, schedule to
225 * refill it */
226 if (rxq->free_count <= RX_LOW_WATERMARK)
227 queue_work(priv->workqueue, &priv->rx_replenish);
228
229
230 /* If we've added more space for the firmware to place data, tell it.
231 * Increment device's write pointer in multiples of 8. */
232 if (rxq->write_actual != (rxq->write & ~0x7)) {
233 spin_lock_irqsave(&rxq->lock, flags);
234 rxq->need_update = 1;
235 spin_unlock_irqrestore(&rxq->lock, flags);
236 iwl_rx_queue_update_write_ptr(priv, rxq);
237 }
238}
239
240/**
241 * iwlagn_rx_replenish - Move all used packet from rx_used to rx_free
242 *
243 * When moving to rx_free an SKB is allocated for the slot.
244 *
245 * Also restock the Rx queue via iwl_rx_queue_restock.
246 * This is called as a scheduled work item (except for during initialization)
247 */
248static void iwlagn_rx_allocate(struct iwl_priv *priv, gfp_t priority)
249{
250 struct iwl_rx_queue *rxq = &priv->rxq;
251 struct list_head *element;
252 struct iwl_rx_mem_buffer *rxb;
253 struct page *page;
254 unsigned long flags;
255 gfp_t gfp_mask = priority;
256
257 while (1) {
258 spin_lock_irqsave(&rxq->lock, flags);
259 if (list_empty(&rxq->rx_used)) {
260 spin_unlock_irqrestore(&rxq->lock, flags);
261 return;
262 }
263 spin_unlock_irqrestore(&rxq->lock, flags);
264
265 if (rxq->free_count > RX_LOW_WATERMARK)
266 gfp_mask |= __GFP_NOWARN;
267
268 if (priv->hw_params.rx_page_order > 0)
269 gfp_mask |= __GFP_COMP;
270
271 /* Alloc a new receive buffer */
272 page = alloc_pages(gfp_mask, priv->hw_params.rx_page_order);
273 if (!page) {
274 if (net_ratelimit())
275 IWL_DEBUG_INFO(priv, "alloc_pages failed, "
276 "order: %d\n",
277 priv->hw_params.rx_page_order);
278
279 if ((rxq->free_count <= RX_LOW_WATERMARK) &&
280 net_ratelimit())
281 IWL_CRIT(priv, "Failed to alloc_pages with %s."
282 "Only %u free buffers remaining.\n",
283 priority == GFP_ATOMIC ?
284 "GFP_ATOMIC" : "GFP_KERNEL",
285 rxq->free_count);
286 /* We don't reschedule replenish work here -- we will
287 * call the restock method and if it still needs
288 * more buffers it will schedule replenish */
289 return;
290 }
291
292 spin_lock_irqsave(&rxq->lock, flags);
293
294 if (list_empty(&rxq->rx_used)) {
295 spin_unlock_irqrestore(&rxq->lock, flags);
296 __free_pages(page, priv->hw_params.rx_page_order);
297 return;
298 }
299 element = rxq->rx_used.next;
300 rxb = list_entry(element, struct iwl_rx_mem_buffer, list);
301 list_del(element);
302
303 spin_unlock_irqrestore(&rxq->lock, flags);
304
305 BUG_ON(rxb->page);
306 rxb->page = page;
307 /* Get physical address of the RB */
308 rxb->page_dma = dma_map_page(priv->bus->dev, page, 0,
309 PAGE_SIZE << priv->hw_params.rx_page_order,
310 DMA_FROM_DEVICE);
311 /* dma address must be no more than 36 bits */
312 BUG_ON(rxb->page_dma & ~DMA_BIT_MASK(36));
313 /* and also 256 byte aligned! */
314 BUG_ON(rxb->page_dma & DMA_BIT_MASK(8));
315
316 spin_lock_irqsave(&rxq->lock, flags);
317
318 list_add_tail(&rxb->list, &rxq->rx_free);
319 rxq->free_count++;
320
321 spin_unlock_irqrestore(&rxq->lock, flags);
322 }
323}
324
325void iwlagn_rx_replenish(struct iwl_priv *priv)
326{
327 unsigned long flags;
328
329 iwlagn_rx_allocate(priv, GFP_KERNEL);
330
331 spin_lock_irqsave(&priv->lock, flags);
332 iwlagn_rx_queue_restock(priv);
333 spin_unlock_irqrestore(&priv->lock, flags);
334}
335
336static void iwlagn_rx_replenish_now(struct iwl_priv *priv)
337{
338 iwlagn_rx_allocate(priv, GFP_ATOMIC);
339
340 iwlagn_rx_queue_restock(priv);
341}
342
343void iwl_bg_rx_replenish(struct work_struct *data)
344{
345 struct iwl_priv *priv =
346 container_of(data, struct iwl_priv, rx_replenish);
347
348 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
349 return;
350
351 mutex_lock(&priv->mutex);
352 iwlagn_rx_replenish(priv);
353 mutex_unlock(&priv->mutex);
354}
355
356/**
357 * iwl_rx_handle - Main entry function for receiving responses from uCode
358 *
359 * Uses the priv->rx_handlers callback function array to invoke
360 * the appropriate handlers, including command responses,
361 * frame-received notifications, and other notifications.
362 */
363static void iwl_rx_handle(struct iwl_priv *priv)
364{
365 struct iwl_rx_mem_buffer *rxb;
366 struct iwl_rx_packet *pkt;
367 struct iwl_rx_queue *rxq = &priv->rxq;
368 u32 r, i;
369 int reclaim;
370 unsigned long flags;
371 u8 fill_rx = 0;
372 u32 count = 8;
373 int total_empty;
374
375 /* uCode's read index (stored in shared DRAM) indicates the last Rx
376 * buffer that the driver may process (last buffer filled by ucode). */
377 r = le16_to_cpu(rxq->rb_stts->closed_rb_num) & 0x0FFF;
378 i = rxq->read;
379
380 /* Rx interrupt, but nothing sent from uCode */
381 if (i == r)
382 IWL_DEBUG_RX(priv, "r = %d, i = %d\n", r, i);
383
384 /* calculate total frames need to be restock after handling RX */
385 total_empty = r - rxq->write_actual;
386 if (total_empty < 0)
387 total_empty += RX_QUEUE_SIZE;
388
389 if (total_empty > (RX_QUEUE_SIZE / 2))
390 fill_rx = 1;
391
392 while (i != r) {
393 int len;
394
395 rxb = rxq->queue[i];
396
397 /* If an RXB doesn't have a Rx queue slot associated with it,
398 * then a bug has been introduced in the queue refilling
399 * routines -- catch it here */
400 if (WARN_ON(rxb == NULL)) {
401 i = (i + 1) & RX_QUEUE_MASK;
402 continue;
403 }
404
405 rxq->queue[i] = NULL;
406
407 dma_unmap_page(priv->bus->dev, rxb->page_dma,
408 PAGE_SIZE << priv->hw_params.rx_page_order,
409 DMA_FROM_DEVICE);
410 pkt = rxb_addr(rxb);
411
412 IWL_DEBUG_RX(priv, "r = %d, i = %d, %s, 0x%02x\n", r,
413 i, get_cmd_string(pkt->hdr.cmd), pkt->hdr.cmd);
414
415 len = le32_to_cpu(pkt->len_n_flags) & FH_RSCSR_FRAME_SIZE_MSK;
416 len += sizeof(u32); /* account for status word */
417 trace_iwlwifi_dev_rx(priv, pkt, len);
418
419 /* Reclaim a command buffer only if this packet is a response
420 * to a (driver-originated) command.
421 * If the packet (e.g. Rx frame) originated from uCode,
422 * there is no command buffer to reclaim.
423 * Ucode should set SEQ_RX_FRAME bit if ucode-originated,
424 * but apparently a few don't get set; catch them here. */
425 reclaim = !(pkt->hdr.sequence & SEQ_RX_FRAME) &&
426 (pkt->hdr.cmd != REPLY_RX_PHY_CMD) &&
427 (pkt->hdr.cmd != REPLY_RX) &&
428 (pkt->hdr.cmd != REPLY_RX_MPDU_CMD) &&
429 (pkt->hdr.cmd != REPLY_COMPRESSED_BA) &&
430 (pkt->hdr.cmd != STATISTICS_NOTIFICATION) &&
431 (pkt->hdr.cmd != REPLY_TX);
432
433 iwl_rx_dispatch(priv, rxb);
434
435 /*
436 * XXX: After here, we should always check rxb->page
437 * against NULL before touching it or its virtual
438 * memory (pkt). Because some rx_handler might have
439 * already taken or freed the pages.
440 */
441
442 if (reclaim) {
443 /* Invoke any callbacks, transfer the buffer to caller,
444 * and fire off the (possibly) blocking
445 * trans_send_cmd()
446 * as we reclaim the driver command queue */
447 if (rxb->page)
448 iwl_tx_cmd_complete(priv, rxb);
449 else
450 IWL_WARN(priv, "Claim null rxb?\n");
451 }
452
453 /* Reuse the page if possible. For notification packets and
454 * SKBs that fail to Rx correctly, add them back into the
455 * rx_free list for reuse later. */
456 spin_lock_irqsave(&rxq->lock, flags);
457 if (rxb->page != NULL) {
458 rxb->page_dma = dma_map_page(priv->bus->dev, rxb->page,
459 0, PAGE_SIZE << priv->hw_params.rx_page_order,
460 DMA_FROM_DEVICE);
461 list_add_tail(&rxb->list, &rxq->rx_free);
462 rxq->free_count++;
463 } else
464 list_add_tail(&rxb->list, &rxq->rx_used);
465
466 spin_unlock_irqrestore(&rxq->lock, flags);
467
468 i = (i + 1) & RX_QUEUE_MASK;
469 /* If there are a lot of unused frames,
470 * restock the Rx queue so ucode wont assert. */
471 if (fill_rx) {
472 count++;
473 if (count >= 8) {
474 rxq->read = i;
475 iwlagn_rx_replenish_now(priv);
476 count = 0;
477 }
478 }
479 }
480
481 /* Backtrack one entry */
482 rxq->read = i;
483 if (fill_rx)
484 iwlagn_rx_replenish_now(priv);
485 else
486 iwlagn_rx_queue_restock(priv);
487}
488
489/* tasklet for iwlagn interrupt */
490void iwl_irq_tasklet(struct iwl_priv *priv)
491{
492 u32 inta = 0;
493 u32 handled = 0;
494 unsigned long flags;
495 u32 i;
496#ifdef CONFIG_IWLWIFI_DEBUG
497 u32 inta_mask;
498#endif
499
500 spin_lock_irqsave(&priv->lock, flags);
501
502 /* Ack/clear/reset pending uCode interrupts.
503 * Note: Some bits in CSR_INT are "OR" of bits in CSR_FH_INT_STATUS,
504 */
505 /* There is a hardware bug in the interrupt mask function that some
506 * interrupts (i.e. CSR_INT_BIT_SCD) can still be generated even if
507 * they are disabled in the CSR_INT_MASK register. Furthermore the
508 * ICT interrupt handling mechanism has another bug that might cause
509 * these unmasked interrupts fail to be detected. We workaround the
510 * hardware bugs here by ACKing all the possible interrupts so that
511 * interrupt coalescing can still be achieved.
512 */
513 iwl_write32(priv, CSR_INT, priv->inta | ~priv->inta_mask);
514
515 inta = priv->inta;
516
517#ifdef CONFIG_IWLWIFI_DEBUG
518 if (iwl_get_debug_level(priv) & IWL_DL_ISR) {
519 /* just for debug */
520 inta_mask = iwl_read32(priv, CSR_INT_MASK);
521 IWL_DEBUG_ISR(priv, "inta 0x%08x, enabled 0x%08x\n ",
522 inta, inta_mask);
523 }
524#endif
525
526 spin_unlock_irqrestore(&priv->lock, flags);
527
528 /* saved interrupt in inta variable now we can reset priv->inta */
529 priv->inta = 0;
530
531 /* Now service all interrupt bits discovered above. */
532 if (inta & CSR_INT_BIT_HW_ERR) {
533 IWL_ERR(priv, "Hardware error detected. Restarting.\n");
534
535 /* Tell the device to stop sending interrupts */
536 iwl_disable_interrupts(priv);
537
538 priv->isr_stats.hw++;
539 iwl_irq_handle_error(priv);
540
541 handled |= CSR_INT_BIT_HW_ERR;
542
543 return;
544 }
545
546#ifdef CONFIG_IWLWIFI_DEBUG
547 if (iwl_get_debug_level(priv) & (IWL_DL_ISR)) {
548 /* NIC fires this, but we don't use it, redundant with WAKEUP */
549 if (inta & CSR_INT_BIT_SCD) {
550 IWL_DEBUG_ISR(priv, "Scheduler finished to transmit "
551 "the frame/frames.\n");
552 priv->isr_stats.sch++;
553 }
554
555 /* Alive notification via Rx interrupt will do the real work */
556 if (inta & CSR_INT_BIT_ALIVE) {
557 IWL_DEBUG_ISR(priv, "Alive interrupt\n");
558 priv->isr_stats.alive++;
559 }
560 }
561#endif
562 /* Safely ignore these bits for debug checks below */
563 inta &= ~(CSR_INT_BIT_SCD | CSR_INT_BIT_ALIVE);
564
565 /* HW RF KILL switch toggled */
566 if (inta & CSR_INT_BIT_RF_KILL) {
567 int hw_rf_kill = 0;
568 if (!(iwl_read32(priv, CSR_GP_CNTRL) &
569 CSR_GP_CNTRL_REG_FLAG_HW_RF_KILL_SW))
570 hw_rf_kill = 1;
571
572 IWL_WARN(priv, "RF_KILL bit toggled to %s.\n",
573 hw_rf_kill ? "disable radio" : "enable radio");
574
575 priv->isr_stats.rfkill++;
576
577 /* driver only loads ucode once setting the interface up.
578 * the driver allows loading the ucode even if the radio
579 * is killed. Hence update the killswitch state here. The
580 * rfkill handler will care about restarting if needed.
581 */
582 if (!test_bit(STATUS_ALIVE, &priv->status)) {
583 if (hw_rf_kill)
584 set_bit(STATUS_RF_KILL_HW, &priv->status);
585 else
586 clear_bit(STATUS_RF_KILL_HW, &priv->status);
587 wiphy_rfkill_set_hw_state(priv->hw->wiphy, hw_rf_kill);
588 }
589
590 handled |= CSR_INT_BIT_RF_KILL;
591 }
592
593 /* Chip got too hot and stopped itself */
594 if (inta & CSR_INT_BIT_CT_KILL) {
595 IWL_ERR(priv, "Microcode CT kill error detected.\n");
596 priv->isr_stats.ctkill++;
597 handled |= CSR_INT_BIT_CT_KILL;
598 }
599
600 /* Error detected by uCode */
601 if (inta & CSR_INT_BIT_SW_ERR) {
602 IWL_ERR(priv, "Microcode SW error detected. "
603 " Restarting 0x%X.\n", inta);
604 priv->isr_stats.sw++;
605 iwl_irq_handle_error(priv);
606 handled |= CSR_INT_BIT_SW_ERR;
607 }
608
609 /* uCode wakes up after power-down sleep */
610 if (inta & CSR_INT_BIT_WAKEUP) {
611 IWL_DEBUG_ISR(priv, "Wakeup interrupt\n");
612 iwl_rx_queue_update_write_ptr(priv, &priv->rxq);
613 for (i = 0; i < priv->hw_params.max_txq_num; i++)
614 iwl_txq_update_write_ptr(priv, &priv->txq[i]);
615
616 priv->isr_stats.wakeup++;
617
618 handled |= CSR_INT_BIT_WAKEUP;
619 }
620
621 /* All uCode command responses, including Tx command responses,
622 * Rx "responses" (frame-received notification), and other
623 * notifications from uCode come through here*/
624 if (inta & (CSR_INT_BIT_FH_RX | CSR_INT_BIT_SW_RX |
625 CSR_INT_BIT_RX_PERIODIC)) {
626 IWL_DEBUG_ISR(priv, "Rx interrupt\n");
627 if (inta & (CSR_INT_BIT_FH_RX | CSR_INT_BIT_SW_RX)) {
628 handled |= (CSR_INT_BIT_FH_RX | CSR_INT_BIT_SW_RX);
629 iwl_write32(priv, CSR_FH_INT_STATUS,
630 CSR_FH_INT_RX_MASK);
631 }
632 if (inta & CSR_INT_BIT_RX_PERIODIC) {
633 handled |= CSR_INT_BIT_RX_PERIODIC;
634 iwl_write32(priv, CSR_INT, CSR_INT_BIT_RX_PERIODIC);
635 }
636 /* Sending RX interrupt require many steps to be done in the
637 * the device:
638 * 1- write interrupt to current index in ICT table.
639 * 2- dma RX frame.
640 * 3- update RX shared data to indicate last write index.
641 * 4- send interrupt.
642 * This could lead to RX race, driver could receive RX interrupt
643 * but the shared data changes does not reflect this;
644 * periodic interrupt will detect any dangling Rx activity.
645 */
646
647 /* Disable periodic interrupt; we use it as just a one-shot. */
648 iwl_write8(priv, CSR_INT_PERIODIC_REG,
649 CSR_INT_PERIODIC_DIS);
650 iwl_rx_handle(priv);
651
652 /*
653 * Enable periodic interrupt in 8 msec only if we received
654 * real RX interrupt (instead of just periodic int), to catch
655 * any dangling Rx interrupt. If it was just the periodic
656 * interrupt, there was no dangling Rx activity, and no need
657 * to extend the periodic interrupt; one-shot is enough.
658 */
659 if (inta & (CSR_INT_BIT_FH_RX | CSR_INT_BIT_SW_RX))
660 iwl_write8(priv, CSR_INT_PERIODIC_REG,
661 CSR_INT_PERIODIC_ENA);
662
663 priv->isr_stats.rx++;
664 }
665
666 /* This "Tx" DMA channel is used only for loading uCode */
667 if (inta & CSR_INT_BIT_FH_TX) {
668 iwl_write32(priv, CSR_FH_INT_STATUS, CSR_FH_INT_TX_MASK);
669 IWL_DEBUG_ISR(priv, "uCode load interrupt\n");
670 priv->isr_stats.tx++;
671 handled |= CSR_INT_BIT_FH_TX;
672 /* Wake up uCode load routine, now that load is complete */
673 priv->ucode_write_complete = 1;
674 wake_up_interruptible(&priv->wait_command_queue);
675 }
676
677 if (inta & ~handled) {
678 IWL_ERR(priv, "Unhandled INTA bits 0x%08x\n", inta & ~handled);
679 priv->isr_stats.unhandled++;
680 }
681
682 if (inta & ~(priv->inta_mask)) {
683 IWL_WARN(priv, "Disabled INTA bits 0x%08x were pending\n",
684 inta & ~priv->inta_mask);
685 }
686
687 /* Re-enable all interrupts */
688 /* only Re-enable if disabled by irq */
689 if (test_bit(STATUS_INT_ENABLED, &priv->status))
690 iwl_enable_interrupts(priv);
691 /* Re-enable RF_KILL if it occurred */
692 else if (handled & CSR_INT_BIT_RF_KILL)
693 iwl_enable_rfkill_int(priv);
694}
695
696/******************************************************************************
697 *
698 * ICT functions
699 *
700 ******************************************************************************/
701#define ICT_COUNT (PAGE_SIZE/sizeof(u32))
702
703/* Free dram table */
704void iwl_free_isr_ict(struct iwl_priv *priv)
705{
706 if (priv->ict_tbl_vir) {
707 dma_free_coherent(priv->bus->dev,
708 (sizeof(u32) * ICT_COUNT) + PAGE_SIZE,
709 priv->ict_tbl_vir,
710 priv->ict_tbl_dma);
711 priv->ict_tbl_vir = NULL;
712 memset(&priv->ict_tbl_dma, 0,
713 sizeof(priv->ict_tbl_dma));
714 memset(&priv->aligned_ict_tbl_dma, 0,
715 sizeof(priv->aligned_ict_tbl_dma));
716 }
717}
718
719
720/* allocate dram shared table it is a PAGE_SIZE aligned
721 * also reset all data related to ICT table interrupt.
722 */
723int iwl_alloc_isr_ict(struct iwl_priv *priv)
724{
725
726 /* allocate shrared data table */
727 priv->ict_tbl_vir =
728 dma_alloc_coherent(priv->bus->dev,
729 (sizeof(u32) * ICT_COUNT) + PAGE_SIZE,
730 &priv->ict_tbl_dma, GFP_KERNEL);
731 if (!priv->ict_tbl_vir)
732 return -ENOMEM;
733
734 /* align table to PAGE_SIZE boundary */
735 priv->aligned_ict_tbl_dma =
736 ALIGN(priv->ict_tbl_dma, PAGE_SIZE);
737
738 IWL_DEBUG_ISR(priv, "ict dma addr %Lx dma aligned %Lx diff %d\n",
739 (unsigned long long)priv->ict_tbl_dma,
740 (unsigned long long)priv->aligned_ict_tbl_dma,
741 (int)(priv->aligned_ict_tbl_dma -
742 priv->ict_tbl_dma));
743
744 priv->ict_tbl = priv->ict_tbl_vir +
745 (priv->aligned_ict_tbl_dma -
746 priv->ict_tbl_dma);
747
748 IWL_DEBUG_ISR(priv, "ict vir addr %p vir aligned %p diff %d\n",
749 priv->ict_tbl, priv->ict_tbl_vir,
750 (int)(priv->aligned_ict_tbl_dma -
751 priv->ict_tbl_dma));
752
753 /* reset table and index to all 0 */
754 memset(priv->ict_tbl_vir, 0,
755 (sizeof(u32) * ICT_COUNT) + PAGE_SIZE);
756 priv->ict_index = 0;
757
758 /* add periodic RX interrupt */
759 priv->inta_mask |= CSR_INT_BIT_RX_PERIODIC;
760 return 0;
761}
762
763/* Device is going up inform it about using ICT interrupt table,
764 * also we need to tell the driver to start using ICT interrupt.
765 */
766int iwl_reset_ict(struct iwl_priv *priv)
767{
768 u32 val;
769 unsigned long flags;
770
771 if (!priv->ict_tbl_vir)
772 return 0;
773
774 spin_lock_irqsave(&priv->lock, flags);
775 iwl_disable_interrupts(priv);
776
777 memset(&priv->ict_tbl[0], 0, sizeof(u32) * ICT_COUNT);
778
779 val = priv->aligned_ict_tbl_dma >> PAGE_SHIFT;
780
781 val |= CSR_DRAM_INT_TBL_ENABLE;
782 val |= CSR_DRAM_INIT_TBL_WRAP_CHECK;
783
784 IWL_DEBUG_ISR(priv, "CSR_DRAM_INT_TBL_REG =0x%X "
785 "aligned dma address %Lx\n",
786 val,
787 (unsigned long long)priv->aligned_ict_tbl_dma);
788
789 iwl_write32(priv, CSR_DRAM_INT_TBL_REG, val);
790 priv->use_ict = true;
791 priv->ict_index = 0;
792 iwl_write32(priv, CSR_INT, priv->inta_mask);
793 iwl_enable_interrupts(priv);
794 spin_unlock_irqrestore(&priv->lock, flags);
795
796 return 0;
797}
798
799/* Device is going down disable ict interrupt usage */
800void iwl_disable_ict(struct iwl_priv *priv)
801{
802 unsigned long flags;
803
804 spin_lock_irqsave(&priv->lock, flags);
805 priv->use_ict = false;
806 spin_unlock_irqrestore(&priv->lock, flags);
807}
808
809static irqreturn_t iwl_isr(int irq, void *data)
810{
811 struct iwl_priv *priv = data;
812 u32 inta, inta_mask;
813 unsigned long flags;
814#ifdef CONFIG_IWLWIFI_DEBUG
815 u32 inta_fh;
816#endif
817 if (!priv)
818 return IRQ_NONE;
819
820 spin_lock_irqsave(&priv->lock, flags);
821
822 /* Disable (but don't clear!) interrupts here to avoid
823 * back-to-back ISRs and sporadic interrupts from our NIC.
824 * If we have something to service, the tasklet will re-enable ints.
825 * If we *don't* have something, we'll re-enable before leaving here. */
826 inta_mask = iwl_read32(priv, CSR_INT_MASK); /* just for debug */
827 iwl_write32(priv, CSR_INT_MASK, 0x00000000);
828
829 /* Discover which interrupts are active/pending */
830 inta = iwl_read32(priv, CSR_INT);
831
832 /* Ignore interrupt if there's nothing in NIC to service.
833 * This may be due to IRQ shared with another device,
834 * or due to sporadic interrupts thrown from our NIC. */
835 if (!inta) {
836 IWL_DEBUG_ISR(priv, "Ignore interrupt, inta == 0\n");
837 goto none;
838 }
839
840 if ((inta == 0xFFFFFFFF) || ((inta & 0xFFFFFFF0) == 0xa5a5a5a0)) {
841 /* Hardware disappeared. It might have already raised
842 * an interrupt */
843 IWL_WARN(priv, "HARDWARE GONE?? INTA == 0x%08x\n", inta);
844 goto unplugged;
845 }
846
847#ifdef CONFIG_IWLWIFI_DEBUG
848 if (iwl_get_debug_level(priv) & (IWL_DL_ISR)) {
849 inta_fh = iwl_read32(priv, CSR_FH_INT_STATUS);
850 IWL_DEBUG_ISR(priv, "ISR inta 0x%08x, enabled 0x%08x, "
851 "fh 0x%08x\n", inta, inta_mask, inta_fh);
852 }
853#endif
854
855 priv->inta |= inta;
856 /* iwl_irq_tasklet() will service interrupts and re-enable them */
857 if (likely(inta))
858 tasklet_schedule(&priv->irq_tasklet);
859 else if (test_bit(STATUS_INT_ENABLED, &priv->status) &&
860 !priv->inta)
861 iwl_enable_interrupts(priv);
862
863 unplugged:
864 spin_unlock_irqrestore(&priv->lock, flags);
865 return IRQ_HANDLED;
866
867 none:
868 /* re-enable interrupts here since we don't have anything to service. */
869 /* only Re-enable if disabled by irq and no schedules tasklet. */
870 if (test_bit(STATUS_INT_ENABLED, &priv->status) && !priv->inta)
871 iwl_enable_interrupts(priv);
872
873 spin_unlock_irqrestore(&priv->lock, flags);
874 return IRQ_NONE;
875}
876
877/* interrupt handler using ict table, with this interrupt driver will
878 * stop using INTA register to get device's interrupt, reading this register
879 * is expensive, device will write interrupts in ICT dram table, increment
880 * index then will fire interrupt to driver, driver will OR all ICT table
881 * entries from current index up to table entry with 0 value. the result is
882 * the interrupt we need to service, driver will set the entries back to 0 and
883 * set index.
884 */
885irqreturn_t iwl_isr_ict(int irq, void *data)
886{
887 struct iwl_priv *priv = data;
888 u32 inta, inta_mask;
889 u32 val = 0;
890 unsigned long flags;
891
892 if (!priv)
893 return IRQ_NONE;
894
895 /* dram interrupt table not set yet,
896 * use legacy interrupt.
897 */
898 if (!priv->use_ict)
899 return iwl_isr(irq, data);
900
901 spin_lock_irqsave(&priv->lock, flags);
902
903 /* Disable (but don't clear!) interrupts here to avoid
904 * back-to-back ISRs and sporadic interrupts from our NIC.
905 * If we have something to service, the tasklet will re-enable ints.
906 * If we *don't* have something, we'll re-enable before leaving here.
907 */
908 inta_mask = iwl_read32(priv, CSR_INT_MASK); /* just for debug */
909 iwl_write32(priv, CSR_INT_MASK, 0x00000000);
910
911
912 /* Ignore interrupt if there's nothing in NIC to service.
913 * This may be due to IRQ shared with another device,
914 * or due to sporadic interrupts thrown from our NIC. */
915 if (!priv->ict_tbl[priv->ict_index]) {
916 IWL_DEBUG_ISR(priv, "Ignore interrupt, inta == 0\n");
917 goto none;
918 }
919
920 /* read all entries that not 0 start with ict_index */
921 while (priv->ict_tbl[priv->ict_index]) {
922
923 val |= le32_to_cpu(priv->ict_tbl[priv->ict_index]);
924 IWL_DEBUG_ISR(priv, "ICT index %d value 0x%08X\n",
925 priv->ict_index,
926 le32_to_cpu(
927 priv->ict_tbl[priv->ict_index]));
928 priv->ict_tbl[priv->ict_index] = 0;
929 priv->ict_index = iwl_queue_inc_wrap(priv->ict_index,
930 ICT_COUNT);
931
932 }
933
934 /* We should not get this value, just ignore it. */
935 if (val == 0xffffffff)
936 val = 0;
937
938 /*
939 * this is a w/a for a h/w bug. the h/w bug may cause the Rx bit
940 * (bit 15 before shifting it to 31) to clear when using interrupt
941 * coalescing. fortunately, bits 18 and 19 stay set when this happens
942 * so we use them to decide on the real state of the Rx bit.
943 * In order words, bit 15 is set if bit 18 or bit 19 are set.
944 */
945 if (val & 0xC0000)
946 val |= 0x8000;
947
948 inta = (0xff & val) | ((0xff00 & val) << 16);
949 IWL_DEBUG_ISR(priv, "ISR inta 0x%08x, enabled 0x%08x ict 0x%08x\n",
950 inta, inta_mask, val);
951
952 inta &= priv->inta_mask;
953 priv->inta |= inta;
954
955 /* iwl_irq_tasklet() will service interrupts and re-enable them */
956 if (likely(inta))
957 tasklet_schedule(&priv->irq_tasklet);
958 else if (test_bit(STATUS_INT_ENABLED, &priv->status) &&
959 !priv->inta) {
960 /* Allow interrupt if was disabled by this handler and
961 * no tasklet was schedules, We should not enable interrupt,
962 * tasklet will enable it.
963 */
964 iwl_enable_interrupts(priv);
965 }
966
967 spin_unlock_irqrestore(&priv->lock, flags);
968 return IRQ_HANDLED;
969
970 none:
971 /* re-enable interrupts here since we don't have anything to service.
972 * only Re-enable if disabled by irq.
973 */
974 if (test_bit(STATUS_INT_ENABLED, &priv->status) && !priv->inta)
975 iwl_enable_interrupts(priv);
976
977 spin_unlock_irqrestore(&priv->lock, flags);
978 return IRQ_NONE;
979}
diff --git a/drivers/net/wireless/iwlwifi/iwl-tx.c b/drivers/net/wireless/iwlwifi/iwl-trans-tx-pcie.c
index 9b07e07f1689..a6b2b1db0b1d 100644
--- a/drivers/net/wireless/iwlwifi/iwl-tx.c
+++ b/drivers/net/wireless/iwlwifi/iwl-trans-tx-pcie.c
@@ -26,18 +26,58 @@
26 * Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497 26 * Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
27 * 27 *
28 *****************************************************************************/ 28 *****************************************************************************/
29
30#include <linux/etherdevice.h> 29#include <linux/etherdevice.h>
31#include <linux/sched.h>
32#include <linux/slab.h> 30#include <linux/slab.h>
31#include <linux/sched.h>
33#include <net/mac80211.h> 32#include <net/mac80211.h>
34#include "iwl-eeprom.h" 33
35#include "iwl-agn.h" 34#include "iwl-agn.h"
36#include "iwl-dev.h" 35#include "iwl-dev.h"
37#include "iwl-core.h" 36#include "iwl-core.h"
38#include "iwl-sta.h"
39#include "iwl-io.h" 37#include "iwl-io.h"
40#include "iwl-helpers.h" 38#include "iwl-helpers.h"
39#include "iwl-trans-int-pcie.h"
40
41/**
42 * iwl_trans_txq_update_byte_cnt_tbl - Set up entry in Tx byte-count array
43 */
44void iwl_trans_txq_update_byte_cnt_tbl(struct iwl_priv *priv,
45 struct iwl_tx_queue *txq,
46 u16 byte_cnt)
47{
48 struct iwlagn_scd_bc_tbl *scd_bc_tbl = priv->scd_bc_tbls.addr;
49 int write_ptr = txq->q.write_ptr;
50 int txq_id = txq->q.id;
51 u8 sec_ctl = 0;
52 u8 sta_id = 0;
53 u16 len = byte_cnt + IWL_TX_CRC_SIZE + IWL_TX_DELIMITER_SIZE;
54 __le16 bc_ent;
55
56 WARN_ON(len > 0xFFF || write_ptr >= TFD_QUEUE_SIZE_MAX);
57
58 sta_id = txq->cmd[txq->q.write_ptr]->cmd.tx.sta_id;
59 sec_ctl = txq->cmd[txq->q.write_ptr]->cmd.tx.sec_ctl;
60
61 switch (sec_ctl & TX_CMD_SEC_MSK) {
62 case TX_CMD_SEC_CCM:
63 len += CCMP_MIC_LEN;
64 break;
65 case TX_CMD_SEC_TKIP:
66 len += TKIP_ICV_LEN;
67 break;
68 case TX_CMD_SEC_WEP:
69 len += WEP_IV_LEN + WEP_ICV_LEN;
70 break;
71 }
72
73 bc_ent = cpu_to_le16((len & 0xFFF) | (sta_id << 12));
74
75 scd_bc_tbl[txq_id].tfd_offset[write_ptr] = bc_ent;
76
77 if (write_ptr < TFD_QUEUE_SIZE_BC_DUP)
78 scd_bc_tbl[txq_id].
79 tfd_offset[TFD_QUEUE_SIZE_MAX + write_ptr] = bc_ent;
80}
41 81
42/** 82/**
43 * iwl_txq_update_write_ptr - Send new write index to hardware 83 * iwl_txq_update_write_ptr - Send new write index to hardware
@@ -126,7 +166,7 @@ static inline u8 iwl_tfd_get_num_tbs(struct iwl_tfd *tfd)
126} 166}
127 167
128static void iwlagn_unmap_tfd(struct iwl_priv *priv, struct iwl_cmd_meta *meta, 168static void iwlagn_unmap_tfd(struct iwl_priv *priv, struct iwl_cmd_meta *meta,
129 struct iwl_tfd *tfd, enum dma_data_direction dma_dir) 169 struct iwl_tfd *tfd, enum dma_data_direction dma_dir)
130{ 170{
131 int i; 171 int i;
132 int num_tbs; 172 int num_tbs;
@@ -142,14 +182,14 @@ static void iwlagn_unmap_tfd(struct iwl_priv *priv, struct iwl_cmd_meta *meta,
142 182
143 /* Unmap tx_cmd */ 183 /* Unmap tx_cmd */
144 if (num_tbs) 184 if (num_tbs)
145 dma_unmap_single(priv->bus.dev, 185 dma_unmap_single(priv->bus->dev,
146 dma_unmap_addr(meta, mapping), 186 dma_unmap_addr(meta, mapping),
147 dma_unmap_len(meta, len), 187 dma_unmap_len(meta, len),
148 DMA_BIDIRECTIONAL); 188 DMA_BIDIRECTIONAL);
149 189
150 /* Unmap chunks, if any. */ 190 /* Unmap chunks, if any. */
151 for (i = 1; i < num_tbs; i++) 191 for (i = 1; i < num_tbs; i++)
152 dma_unmap_single(priv->bus.dev, iwl_tfd_tb_get_addr(tfd, i), 192 dma_unmap_single(priv->bus->dev, iwl_tfd_tb_get_addr(tfd, i),
153 iwl_tfd_tb_get_len(tfd, i), dma_dir); 193 iwl_tfd_tb_get_len(tfd, i), dma_dir);
154} 194}
155 195
@@ -292,6 +332,187 @@ int iwl_queue_init(struct iwl_priv *priv, struct iwl_queue *q,
292 return 0; 332 return 0;
293} 333}
294 334
335/*TODO: this functions should NOT be exported from trans module - export it
336 * until the reclaim flow will be brought to the transport module too.
337 * Add a declaration to make sparse happy */
338void iwlagn_txq_inval_byte_cnt_tbl(struct iwl_priv *priv,
339 struct iwl_tx_queue *txq);
340
341void iwlagn_txq_inval_byte_cnt_tbl(struct iwl_priv *priv,
342 struct iwl_tx_queue *txq)
343{
344 struct iwlagn_scd_bc_tbl *scd_bc_tbl = priv->scd_bc_tbls.addr;
345 int txq_id = txq->q.id;
346 int read_ptr = txq->q.read_ptr;
347 u8 sta_id = 0;
348 __le16 bc_ent;
349
350 WARN_ON(read_ptr >= TFD_QUEUE_SIZE_MAX);
351
352 if (txq_id != priv->cmd_queue)
353 sta_id = txq->cmd[read_ptr]->cmd.tx.sta_id;
354
355 bc_ent = cpu_to_le16(1 | (sta_id << 12));
356 scd_bc_tbl[txq_id].tfd_offset[read_ptr] = bc_ent;
357
358 if (read_ptr < TFD_QUEUE_SIZE_BC_DUP)
359 scd_bc_tbl[txq_id].
360 tfd_offset[TFD_QUEUE_SIZE_MAX + read_ptr] = bc_ent;
361}
362
363static int iwlagn_tx_queue_set_q2ratid(struct iwl_priv *priv, u16 ra_tid,
364 u16 txq_id)
365{
366 u32 tbl_dw_addr;
367 u32 tbl_dw;
368 u16 scd_q2ratid;
369
370 scd_q2ratid = ra_tid & SCD_QUEUE_RA_TID_MAP_RATID_MSK;
371
372 tbl_dw_addr = priv->scd_base_addr +
373 SCD_TRANS_TBL_OFFSET_QUEUE(txq_id);
374
375 tbl_dw = iwl_read_targ_mem(priv, tbl_dw_addr);
376
377 if (txq_id & 0x1)
378 tbl_dw = (scd_q2ratid << 16) | (tbl_dw & 0x0000FFFF);
379 else
380 tbl_dw = scd_q2ratid | (tbl_dw & 0xFFFF0000);
381
382 iwl_write_targ_mem(priv, tbl_dw_addr, tbl_dw);
383
384 return 0;
385}
386
387static void iwlagn_tx_queue_stop_scheduler(struct iwl_priv *priv, u16 txq_id)
388{
389 /* Simply stop the queue, but don't change any configuration;
390 * the SCD_ACT_EN bit is the write-enable mask for the ACTIVE bit. */
391 iwl_write_prph(priv,
392 SCD_QUEUE_STATUS_BITS(txq_id),
393 (0 << SCD_QUEUE_STTS_REG_POS_ACTIVE)|
394 (1 << SCD_QUEUE_STTS_REG_POS_SCD_ACT_EN));
395}
396
397void iwl_trans_set_wr_ptrs(struct iwl_priv *priv,
398 int txq_id, u32 index)
399{
400 iwl_write_direct32(priv, HBUS_TARG_WRPTR,
401 (index & 0xff) | (txq_id << 8));
402 iwl_write_prph(priv, SCD_QUEUE_RDPTR(txq_id), index);
403}
404
405void iwl_trans_tx_queue_set_status(struct iwl_priv *priv,
406 struct iwl_tx_queue *txq,
407 int tx_fifo_id, int scd_retry)
408{
409 int txq_id = txq->q.id;
410 int active = test_bit(txq_id, &priv->txq_ctx_active_msk) ? 1 : 0;
411
412 iwl_write_prph(priv, SCD_QUEUE_STATUS_BITS(txq_id),
413 (active << SCD_QUEUE_STTS_REG_POS_ACTIVE) |
414 (tx_fifo_id << SCD_QUEUE_STTS_REG_POS_TXF) |
415 (1 << SCD_QUEUE_STTS_REG_POS_WSL) |
416 SCD_QUEUE_STTS_REG_MSK);
417
418 txq->sched_retry = scd_retry;
419
420 IWL_DEBUG_INFO(priv, "%s %s Queue %d on FIFO %d\n",
421 active ? "Activate" : "Deactivate",
422 scd_retry ? "BA" : "AC/CMD", txq_id, tx_fifo_id);
423}
424
425void iwl_trans_txq_agg_setup(struct iwl_priv *priv, int sta_id, int tid,
426 int frame_limit)
427{
428 int tx_fifo, txq_id, ssn_idx;
429 u16 ra_tid;
430 unsigned long flags;
431 struct iwl_tid_data *tid_data;
432
433 if (WARN_ON(sta_id == IWL_INVALID_STATION))
434 return;
435 if (WARN_ON(tid >= MAX_TID_COUNT))
436 return;
437
438 spin_lock_irqsave(&priv->sta_lock, flags);
439 tid_data = &priv->stations[sta_id].tid[tid];
440 ssn_idx = SEQ_TO_SN(tid_data->seq_number);
441 txq_id = tid_data->agg.txq_id;
442 tx_fifo = tid_data->agg.tx_fifo;
443 spin_unlock_irqrestore(&priv->sta_lock, flags);
444
445 ra_tid = BUILD_RAxTID(sta_id, tid);
446
447 spin_lock_irqsave(&priv->lock, flags);
448
449 /* Stop this Tx queue before configuring it */
450 iwlagn_tx_queue_stop_scheduler(priv, txq_id);
451
452 /* Map receiver-address / traffic-ID to this queue */
453 iwlagn_tx_queue_set_q2ratid(priv, ra_tid, txq_id);
454
455 /* Set this queue as a chain-building queue */
456 iwl_set_bits_prph(priv, SCD_QUEUECHAIN_SEL, (1<<txq_id));
457
458 /* enable aggregations for the queue */
459 iwl_set_bits_prph(priv, SCD_AGGR_SEL, (1<<txq_id));
460
461 /* Place first TFD at index corresponding to start sequence number.
462 * Assumes that ssn_idx is valid (!= 0xFFF) */
463 priv->txq[txq_id].q.read_ptr = (ssn_idx & 0xff);
464 priv->txq[txq_id].q.write_ptr = (ssn_idx & 0xff);
465 iwl_trans_set_wr_ptrs(priv, txq_id, ssn_idx);
466
467 /* Set up Tx window size and frame limit for this queue */
468 iwl_write_targ_mem(priv, priv->scd_base_addr +
469 SCD_CONTEXT_QUEUE_OFFSET(txq_id) +
470 sizeof(u32),
471 ((frame_limit <<
472 SCD_QUEUE_CTX_REG2_WIN_SIZE_POS) &
473 SCD_QUEUE_CTX_REG2_WIN_SIZE_MSK) |
474 ((frame_limit <<
475 SCD_QUEUE_CTX_REG2_FRAME_LIMIT_POS) &
476 SCD_QUEUE_CTX_REG2_FRAME_LIMIT_MSK));
477
478 iwl_set_bits_prph(priv, SCD_INTERRUPT_MASK, (1 << txq_id));
479
480 /* Set up Status area in SRAM, map to Tx DMA/FIFO, activate the queue */
481 iwl_trans_tx_queue_set_status(priv, &priv->txq[txq_id], tx_fifo, 1);
482
483 spin_unlock_irqrestore(&priv->lock, flags);
484}
485
486int iwl_trans_txq_agg_disable(struct iwl_priv *priv, u16 txq_id,
487 u16 ssn_idx, u8 tx_fifo)
488{
489 if ((IWLAGN_FIRST_AMPDU_QUEUE > txq_id) ||
490 (IWLAGN_FIRST_AMPDU_QUEUE +
491 priv->cfg->base_params->num_of_ampdu_queues <= txq_id)) {
492 IWL_ERR(priv,
493 "queue number out of range: %d, must be %d to %d\n",
494 txq_id, IWLAGN_FIRST_AMPDU_QUEUE,
495 IWLAGN_FIRST_AMPDU_QUEUE +
496 priv->cfg->base_params->num_of_ampdu_queues - 1);
497 return -EINVAL;
498 }
499
500 iwlagn_tx_queue_stop_scheduler(priv, txq_id);
501
502 iwl_clear_bits_prph(priv, SCD_AGGR_SEL, (1 << txq_id));
503
504 priv->txq[txq_id].q.read_ptr = (ssn_idx & 0xff);
505 priv->txq[txq_id].q.write_ptr = (ssn_idx & 0xff);
506 /* supposes that ssn_idx is valid (!= 0xFFF) */
507 iwl_trans_set_wr_ptrs(priv, txq_id, ssn_idx);
508
509 iwl_clear_bits_prph(priv, SCD_INTERRUPT_MASK, (1 << txq_id));
510 iwl_txq_ctx_deactivate(priv, txq_id);
511 iwl_trans_tx_queue_set_status(priv, &priv->txq[txq_id], tx_fifo, 0);
512
513 return 0;
514}
515
295/*************** HOST COMMAND QUEUE FUNCTIONS *****/ 516/*************** HOST COMMAND QUEUE FUNCTIONS *****/
296 517
297/** 518/**
@@ -303,7 +524,7 @@ int iwl_queue_init(struct iwl_priv *priv, struct iwl_queue *q,
303 * failed. On success, it turns the index (> 0) of command in the 524 * failed. On success, it turns the index (> 0) of command in the
304 * command queue. 525 * command queue.
305 */ 526 */
306int iwl_enqueue_hcmd(struct iwl_priv *priv, struct iwl_host_cmd *cmd) 527static int iwl_enqueue_hcmd(struct iwl_priv *priv, struct iwl_host_cmd *cmd)
307{ 528{
308 struct iwl_tx_queue *txq = &priv->txq[priv->cmd_queue]; 529 struct iwl_tx_queue *txq = &priv->txq[priv->cmd_queue];
309 struct iwl_queue *q = &txq->q; 530 struct iwl_queue *q = &txq->q;
@@ -419,9 +640,9 @@ int iwl_enqueue_hcmd(struct iwl_priv *priv, struct iwl_host_cmd *cmd)
419 le16_to_cpu(out_cmd->hdr.sequence), cmd_size, 640 le16_to_cpu(out_cmd->hdr.sequence), cmd_size,
420 q->write_ptr, idx, priv->cmd_queue); 641 q->write_ptr, idx, priv->cmd_queue);
421 642
422 phys_addr = dma_map_single(priv->bus.dev, &out_cmd->hdr, copy_size, 643 phys_addr = dma_map_single(priv->bus->dev, &out_cmd->hdr, copy_size,
423 DMA_BIDIRECTIONAL); 644 DMA_BIDIRECTIONAL);
424 if (unlikely(dma_mapping_error(priv->bus.dev, phys_addr))) { 645 if (unlikely(dma_mapping_error(priv->bus->dev, phys_addr))) {
425 idx = -ENOMEM; 646 idx = -ENOMEM;
426 goto out; 647 goto out;
427 } 648 }
@@ -441,9 +662,9 @@ int iwl_enqueue_hcmd(struct iwl_priv *priv, struct iwl_host_cmd *cmd)
441 continue; 662 continue;
442 if (!(cmd->dataflags[i] & IWL_HCMD_DFL_NOCOPY)) 663 if (!(cmd->dataflags[i] & IWL_HCMD_DFL_NOCOPY))
443 continue; 664 continue;
444 phys_addr = dma_map_single(priv->bus.dev, (void *)cmd->data[i], 665 phys_addr = dma_map_single(priv->bus->dev, (void *)cmd->data[i],
445 cmd->len[i], DMA_BIDIRECTIONAL); 666 cmd->len[i], DMA_BIDIRECTIONAL);
446 if (dma_mapping_error(priv->bus.dev, phys_addr)) { 667 if (dma_mapping_error(priv->bus->dev, phys_addr)) {
447 iwlagn_unmap_tfd(priv, out_meta, 668 iwlagn_unmap_tfd(priv, out_meta,
448 &txq->tfds[q->write_ptr], 669 &txq->tfds[q->write_ptr],
449 DMA_BIDIRECTIONAL); 670 DMA_BIDIRECTIONAL);
@@ -574,3 +795,242 @@ void iwl_tx_cmd_complete(struct iwl_priv *priv, struct iwl_rx_mem_buffer *rxb)
574 795
575 spin_unlock_irqrestore(&priv->hcmd_lock, flags); 796 spin_unlock_irqrestore(&priv->hcmd_lock, flags);
576} 797}
798
799const char *get_cmd_string(u8 cmd)
800{
801 switch (cmd) {
802 IWL_CMD(REPLY_ALIVE);
803 IWL_CMD(REPLY_ERROR);
804 IWL_CMD(REPLY_RXON);
805 IWL_CMD(REPLY_RXON_ASSOC);
806 IWL_CMD(REPLY_QOS_PARAM);
807 IWL_CMD(REPLY_RXON_TIMING);
808 IWL_CMD(REPLY_ADD_STA);
809 IWL_CMD(REPLY_REMOVE_STA);
810 IWL_CMD(REPLY_REMOVE_ALL_STA);
811 IWL_CMD(REPLY_TXFIFO_FLUSH);
812 IWL_CMD(REPLY_WEPKEY);
813 IWL_CMD(REPLY_TX);
814 IWL_CMD(REPLY_LEDS_CMD);
815 IWL_CMD(REPLY_TX_LINK_QUALITY_CMD);
816 IWL_CMD(COEX_PRIORITY_TABLE_CMD);
817 IWL_CMD(COEX_MEDIUM_NOTIFICATION);
818 IWL_CMD(COEX_EVENT_CMD);
819 IWL_CMD(REPLY_QUIET_CMD);
820 IWL_CMD(REPLY_CHANNEL_SWITCH);
821 IWL_CMD(CHANNEL_SWITCH_NOTIFICATION);
822 IWL_CMD(REPLY_SPECTRUM_MEASUREMENT_CMD);
823 IWL_CMD(SPECTRUM_MEASURE_NOTIFICATION);
824 IWL_CMD(POWER_TABLE_CMD);
825 IWL_CMD(PM_SLEEP_NOTIFICATION);
826 IWL_CMD(PM_DEBUG_STATISTIC_NOTIFIC);
827 IWL_CMD(REPLY_SCAN_CMD);
828 IWL_CMD(REPLY_SCAN_ABORT_CMD);
829 IWL_CMD(SCAN_START_NOTIFICATION);
830 IWL_CMD(SCAN_RESULTS_NOTIFICATION);
831 IWL_CMD(SCAN_COMPLETE_NOTIFICATION);
832 IWL_CMD(BEACON_NOTIFICATION);
833 IWL_CMD(REPLY_TX_BEACON);
834 IWL_CMD(WHO_IS_AWAKE_NOTIFICATION);
835 IWL_CMD(QUIET_NOTIFICATION);
836 IWL_CMD(REPLY_TX_PWR_TABLE_CMD);
837 IWL_CMD(MEASURE_ABORT_NOTIFICATION);
838 IWL_CMD(REPLY_BT_CONFIG);
839 IWL_CMD(REPLY_STATISTICS_CMD);
840 IWL_CMD(STATISTICS_NOTIFICATION);
841 IWL_CMD(REPLY_CARD_STATE_CMD);
842 IWL_CMD(CARD_STATE_NOTIFICATION);
843 IWL_CMD(MISSED_BEACONS_NOTIFICATION);
844 IWL_CMD(REPLY_CT_KILL_CONFIG_CMD);
845 IWL_CMD(SENSITIVITY_CMD);
846 IWL_CMD(REPLY_PHY_CALIBRATION_CMD);
847 IWL_CMD(REPLY_RX_PHY_CMD);
848 IWL_CMD(REPLY_RX_MPDU_CMD);
849 IWL_CMD(REPLY_RX);
850 IWL_CMD(REPLY_COMPRESSED_BA);
851 IWL_CMD(CALIBRATION_CFG_CMD);
852 IWL_CMD(CALIBRATION_RES_NOTIFICATION);
853 IWL_CMD(CALIBRATION_COMPLETE_NOTIFICATION);
854 IWL_CMD(REPLY_TX_POWER_DBM_CMD);
855 IWL_CMD(TEMPERATURE_NOTIFICATION);
856 IWL_CMD(TX_ANT_CONFIGURATION_CMD);
857 IWL_CMD(REPLY_BT_COEX_PROFILE_NOTIF);
858 IWL_CMD(REPLY_BT_COEX_PRIO_TABLE);
859 IWL_CMD(REPLY_BT_COEX_PROT_ENV);
860 IWL_CMD(REPLY_WIPAN_PARAMS);
861 IWL_CMD(REPLY_WIPAN_RXON);
862 IWL_CMD(REPLY_WIPAN_RXON_TIMING);
863 IWL_CMD(REPLY_WIPAN_RXON_ASSOC);
864 IWL_CMD(REPLY_WIPAN_QOS_PARAM);
865 IWL_CMD(REPLY_WIPAN_WEPKEY);
866 IWL_CMD(REPLY_WIPAN_P2P_CHANNEL_SWITCH);
867 IWL_CMD(REPLY_WIPAN_NOA_NOTIFICATION);
868 IWL_CMD(REPLY_WIPAN_DEACTIVATION_COMPLETE);
869 IWL_CMD(REPLY_WOWLAN_PATTERNS);
870 IWL_CMD(REPLY_WOWLAN_WAKEUP_FILTER);
871 IWL_CMD(REPLY_WOWLAN_TSC_RSC_PARAMS);
872 IWL_CMD(REPLY_WOWLAN_TKIP_PARAMS);
873 IWL_CMD(REPLY_WOWLAN_KEK_KCK_MATERIAL);
874 IWL_CMD(REPLY_WOWLAN_GET_STATUS);
875 default:
876 return "UNKNOWN";
877
878 }
879}
880
881#define HOST_COMPLETE_TIMEOUT (2 * HZ)
882
883static void iwl_generic_cmd_callback(struct iwl_priv *priv,
884 struct iwl_device_cmd *cmd,
885 struct iwl_rx_packet *pkt)
886{
887 if (pkt->hdr.flags & IWL_CMD_FAILED_MSK) {
888 IWL_ERR(priv, "Bad return from %s (0x%08X)\n",
889 get_cmd_string(cmd->hdr.cmd), pkt->hdr.flags);
890 return;
891 }
892
893#ifdef CONFIG_IWLWIFI_DEBUG
894 switch (cmd->hdr.cmd) {
895 case REPLY_TX_LINK_QUALITY_CMD:
896 case SENSITIVITY_CMD:
897 IWL_DEBUG_HC_DUMP(priv, "back from %s (0x%08X)\n",
898 get_cmd_string(cmd->hdr.cmd), pkt->hdr.flags);
899 break;
900 default:
901 IWL_DEBUG_HC(priv, "back from %s (0x%08X)\n",
902 get_cmd_string(cmd->hdr.cmd), pkt->hdr.flags);
903 }
904#endif
905}
906
907static int iwl_send_cmd_async(struct iwl_priv *priv, struct iwl_host_cmd *cmd)
908{
909 int ret;
910
911 /* An asynchronous command can not expect an SKB to be set. */
912 if (WARN_ON(cmd->flags & CMD_WANT_SKB))
913 return -EINVAL;
914
915 /* Assign a generic callback if one is not provided */
916 if (!cmd->callback)
917 cmd->callback = iwl_generic_cmd_callback;
918
919 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
920 return -EBUSY;
921
922 ret = iwl_enqueue_hcmd(priv, cmd);
923 if (ret < 0) {
924 IWL_ERR(priv, "Error sending %s: enqueue_hcmd failed: %d\n",
925 get_cmd_string(cmd->id), ret);
926 return ret;
927 }
928 return 0;
929}
930
931static int iwl_send_cmd_sync(struct iwl_priv *priv, struct iwl_host_cmd *cmd)
932{
933 int cmd_idx;
934 int ret;
935
936 lockdep_assert_held(&priv->mutex);
937
938 /* A synchronous command can not have a callback set. */
939 if (WARN_ON(cmd->callback))
940 return -EINVAL;
941
942 IWL_DEBUG_INFO(priv, "Attempting to send sync command %s\n",
943 get_cmd_string(cmd->id));
944
945 set_bit(STATUS_HCMD_ACTIVE, &priv->status);
946 IWL_DEBUG_INFO(priv, "Setting HCMD_ACTIVE for command %s\n",
947 get_cmd_string(cmd->id));
948
949 cmd_idx = iwl_enqueue_hcmd(priv, cmd);
950 if (cmd_idx < 0) {
951 ret = cmd_idx;
952 clear_bit(STATUS_HCMD_ACTIVE, &priv->status);
953 IWL_ERR(priv, "Error sending %s: enqueue_hcmd failed: %d\n",
954 get_cmd_string(cmd->id), ret);
955 return ret;
956 }
957
958 ret = wait_event_interruptible_timeout(priv->wait_command_queue,
959 !test_bit(STATUS_HCMD_ACTIVE, &priv->status),
960 HOST_COMPLETE_TIMEOUT);
961 if (!ret) {
962 if (test_bit(STATUS_HCMD_ACTIVE, &priv->status)) {
963 IWL_ERR(priv,
964 "Error sending %s: time out after %dms.\n",
965 get_cmd_string(cmd->id),
966 jiffies_to_msecs(HOST_COMPLETE_TIMEOUT));
967
968 clear_bit(STATUS_HCMD_ACTIVE, &priv->status);
969 IWL_DEBUG_INFO(priv, "Clearing HCMD_ACTIVE for command"
970 "%s\n", get_cmd_string(cmd->id));
971 ret = -ETIMEDOUT;
972 goto cancel;
973 }
974 }
975
976 if (test_bit(STATUS_RF_KILL_HW, &priv->status)) {
977 IWL_ERR(priv, "Command %s aborted: RF KILL Switch\n",
978 get_cmd_string(cmd->id));
979 ret = -ECANCELED;
980 goto fail;
981 }
982 if (test_bit(STATUS_FW_ERROR, &priv->status)) {
983 IWL_ERR(priv, "Command %s failed: FW Error\n",
984 get_cmd_string(cmd->id));
985 ret = -EIO;
986 goto fail;
987 }
988 if ((cmd->flags & CMD_WANT_SKB) && !cmd->reply_page) {
989 IWL_ERR(priv, "Error: Response NULL in '%s'\n",
990 get_cmd_string(cmd->id));
991 ret = -EIO;
992 goto cancel;
993 }
994
995 return 0;
996
997cancel:
998 if (cmd->flags & CMD_WANT_SKB) {
999 /*
1000 * Cancel the CMD_WANT_SKB flag for the cmd in the
1001 * TX cmd queue. Otherwise in case the cmd comes
1002 * in later, it will possibly set an invalid
1003 * address (cmd->meta.source).
1004 */
1005 priv->txq[priv->cmd_queue].meta[cmd_idx].flags &=
1006 ~CMD_WANT_SKB;
1007 }
1008fail:
1009 if (cmd->reply_page) {
1010 iwl_free_pages(priv, cmd->reply_page);
1011 cmd->reply_page = 0;
1012 }
1013
1014 return ret;
1015}
1016
1017int iwl_send_cmd(struct iwl_priv *priv, struct iwl_host_cmd *cmd)
1018{
1019 if (cmd->flags & CMD_ASYNC)
1020 return iwl_send_cmd_async(priv, cmd);
1021
1022 return iwl_send_cmd_sync(priv, cmd);
1023}
1024
1025int iwl_send_cmd_pdu(struct iwl_priv *priv, u8 id, u32 flags, u16 len,
1026 const void *data)
1027{
1028 struct iwl_host_cmd cmd = {
1029 .id = id,
1030 .len = { len, },
1031 .data = { data, },
1032 .flags = flags,
1033 };
1034
1035 return iwl_send_cmd(priv, &cmd);
1036}
diff --git a/drivers/net/wireless/iwlwifi/iwl-trans.c b/drivers/net/wireless/iwlwifi/iwl-trans.c
index d760857c8636..41f0de914008 100644
--- a/drivers/net/wireless/iwlwifi/iwl-trans.c
+++ b/drivers/net/wireless/iwlwifi/iwl-trans.c
@@ -64,6 +64,7 @@
64#include "iwl-trans.h" 64#include "iwl-trans.h"
65#include "iwl-core.h" 65#include "iwl-core.h"
66#include "iwl-helpers.h" 66#include "iwl-helpers.h"
67#include "iwl-trans-int-pcie.h"
67/*TODO remove uneeded includes when the transport layer tx_free will be here */ 68/*TODO remove uneeded includes when the transport layer tx_free will be here */
68#include "iwl-agn.h" 69#include "iwl-agn.h"
69#include "iwl-core.h" 70#include "iwl-core.h"
@@ -71,7 +72,7 @@
71static int iwl_trans_rx_alloc(struct iwl_priv *priv) 72static int iwl_trans_rx_alloc(struct iwl_priv *priv)
72{ 73{
73 struct iwl_rx_queue *rxq = &priv->rxq; 74 struct iwl_rx_queue *rxq = &priv->rxq;
74 struct device *dev = priv->bus.dev; 75 struct device *dev = priv->bus->dev;
75 76
76 memset(&priv->rxq, 0, sizeof(priv->rxq)); 77 memset(&priv->rxq, 0, sizeof(priv->rxq));
77 78
@@ -117,7 +118,7 @@ static void iwl_trans_rxq_free_rx_bufs(struct iwl_priv *priv)
117 /* In the reset function, these buffers may have been allocated 118 /* In the reset function, these buffers may have been allocated
118 * to an SKB, so we need to unmap and free potential storage */ 119 * to an SKB, so we need to unmap and free potential storage */
119 if (rxq->pool[i].page != NULL) { 120 if (rxq->pool[i].page != NULL) {
120 dma_unmap_page(priv->bus.dev, rxq->pool[i].page_dma, 121 dma_unmap_page(priv->bus->dev, rxq->pool[i].page_dma,
121 PAGE_SIZE << priv->hw_params.rx_page_order, 122 PAGE_SIZE << priv->hw_params.rx_page_order,
122 DMA_FROM_DEVICE); 123 DMA_FROM_DEVICE);
123 __iwl_free_pages(priv, rxq->pool[i].page); 124 __iwl_free_pages(priv, rxq->pool[i].page);
@@ -127,7 +128,56 @@ static void iwl_trans_rxq_free_rx_bufs(struct iwl_priv *priv)
127 } 128 }
128} 129}
129 130
130static int iwl_trans_rx_init(struct iwl_priv *priv) 131static void iwl_trans_rx_hw_init(struct iwl_priv *priv,
132 struct iwl_rx_queue *rxq)
133{
134 u32 rb_size;
135 const u32 rfdnlog = RX_QUEUE_SIZE_LOG; /* 256 RBDs */
136 u32 rb_timeout = 0; /* FIXME: RX_RB_TIMEOUT for all devices? */
137
138 rb_timeout = RX_RB_TIMEOUT;
139
140 if (iwlagn_mod_params.amsdu_size_8K)
141 rb_size = FH_RCSR_RX_CONFIG_REG_VAL_RB_SIZE_8K;
142 else
143 rb_size = FH_RCSR_RX_CONFIG_REG_VAL_RB_SIZE_4K;
144
145 /* Stop Rx DMA */
146 iwl_write_direct32(priv, FH_MEM_RCSR_CHNL0_CONFIG_REG, 0);
147
148 /* Reset driver's Rx queue write index */
149 iwl_write_direct32(priv, FH_RSCSR_CHNL0_RBDCB_WPTR_REG, 0);
150
151 /* Tell device where to find RBD circular buffer in DRAM */
152 iwl_write_direct32(priv, FH_RSCSR_CHNL0_RBDCB_BASE_REG,
153 (u32)(rxq->bd_dma >> 8));
154
155 /* Tell device where in DRAM to update its Rx status */
156 iwl_write_direct32(priv, FH_RSCSR_CHNL0_STTS_WPTR_REG,
157 rxq->rb_stts_dma >> 4);
158
159 /* Enable Rx DMA
160 * FH_RCSR_CHNL0_RX_IGNORE_RXF_EMPTY is set because of HW bug in
161 * the credit mechanism in 5000 HW RX FIFO
162 * Direct rx interrupts to hosts
163 * Rx buffer size 4 or 8k
164 * RB timeout 0x10
165 * 256 RBDs
166 */
167 iwl_write_direct32(priv, FH_MEM_RCSR_CHNL0_CONFIG_REG,
168 FH_RCSR_RX_CONFIG_CHNL_EN_ENABLE_VAL |
169 FH_RCSR_CHNL0_RX_IGNORE_RXF_EMPTY |
170 FH_RCSR_CHNL0_RX_CONFIG_IRQ_DEST_INT_HOST_VAL |
171 FH_RCSR_CHNL0_RX_CONFIG_SINGLE_FRAME_MSK |
172 rb_size|
173 (rb_timeout << FH_RCSR_RX_CONFIG_REG_IRQ_RBTH_POS)|
174 (rfdnlog << FH_RCSR_RX_CONFIG_RBDCB_SIZE_POS));
175
176 /* Set interrupt coalescing timer to default (2048 usecs) */
177 iwl_write8(priv, CSR_INT_COALESCING, IWL_HOST_INT_TIMEOUT_DEF);
178}
179
180static int iwl_rx_init(struct iwl_priv *priv)
131{ 181{
132 struct iwl_rx_queue *rxq = &priv->rxq; 182 struct iwl_rx_queue *rxq = &priv->rxq;
133 int i, err; 183 int i, err;
@@ -155,6 +205,15 @@ static int iwl_trans_rx_init(struct iwl_priv *priv)
155 rxq->free_count = 0; 205 rxq->free_count = 0;
156 spin_unlock_irqrestore(&rxq->lock, flags); 206 spin_unlock_irqrestore(&rxq->lock, flags);
157 207
208 iwlagn_rx_replenish(priv);
209
210 iwl_trans_rx_hw_init(priv, rxq);
211
212 spin_lock_irqsave(&priv->lock, flags);
213 rxq->need_update = 1;
214 iwl_rx_queue_update_write_ptr(priv, rxq);
215 spin_unlock_irqrestore(&priv->lock, flags);
216
158 return 0; 217 return 0;
159} 218}
160 219
@@ -174,13 +233,13 @@ static void iwl_trans_rx_free(struct iwl_priv *priv)
174 iwl_trans_rxq_free_rx_bufs(priv); 233 iwl_trans_rxq_free_rx_bufs(priv);
175 spin_unlock_irqrestore(&rxq->lock, flags); 234 spin_unlock_irqrestore(&rxq->lock, flags);
176 235
177 dma_free_coherent(priv->bus.dev, sizeof(__le32) * RX_QUEUE_SIZE, 236 dma_free_coherent(priv->bus->dev, sizeof(__le32) * RX_QUEUE_SIZE,
178 rxq->bd, rxq->bd_dma); 237 rxq->bd, rxq->bd_dma);
179 memset(&rxq->bd_dma, 0, sizeof(rxq->bd_dma)); 238 memset(&rxq->bd_dma, 0, sizeof(rxq->bd_dma));
180 rxq->bd = NULL; 239 rxq->bd = NULL;
181 240
182 if (rxq->rb_stts) 241 if (rxq->rb_stts)
183 dma_free_coherent(priv->bus.dev, 242 dma_free_coherent(priv->bus->dev,
184 sizeof(struct iwl_rb_status), 243 sizeof(struct iwl_rb_status),
185 rxq->rb_stts, rxq->rb_stts_dma); 244 rxq->rb_stts, rxq->rb_stts_dma);
186 else 245 else
@@ -204,7 +263,7 @@ static inline int iwlagn_alloc_dma_ptr(struct iwl_priv *priv,
204 if (WARN_ON(ptr->addr)) 263 if (WARN_ON(ptr->addr))
205 return -EINVAL; 264 return -EINVAL;
206 265
207 ptr->addr = dma_alloc_coherent(priv->bus.dev, size, 266 ptr->addr = dma_alloc_coherent(priv->bus->dev, size,
208 &ptr->dma, GFP_KERNEL); 267 &ptr->dma, GFP_KERNEL);
209 if (!ptr->addr) 268 if (!ptr->addr)
210 return -ENOMEM; 269 return -ENOMEM;
@@ -218,7 +277,7 @@ static inline void iwlagn_free_dma_ptr(struct iwl_priv *priv,
218 if (unlikely(!ptr->addr)) 277 if (unlikely(!ptr->addr))
219 return; 278 return;
220 279
221 dma_free_coherent(priv->bus.dev, ptr->size, ptr->addr, ptr->dma); 280 dma_free_coherent(priv->bus->dev, ptr->size, ptr->addr, ptr->dma);
222 memset(ptr, 0, sizeof(*ptr)); 281 memset(ptr, 0, sizeof(*ptr));
223} 282}
224 283
@@ -265,7 +324,7 @@ static int iwl_trans_txq_alloc(struct iwl_priv *priv, struct iwl_tx_queue *txq,
265 324
266 /* Circular buffer of transmit frame descriptors (TFDs), 325 /* Circular buffer of transmit frame descriptors (TFDs),
267 * shared with device */ 326 * shared with device */
268 txq->tfds = dma_alloc_coherent(priv->bus.dev, tfd_sz, &txq->q.dma_addr, 327 txq->tfds = dma_alloc_coherent(priv->bus->dev, tfd_sz, &txq->q.dma_addr,
269 GFP_KERNEL); 328 GFP_KERNEL);
270 if (!txq->tfds) { 329 if (!txq->tfds) {
271 IWL_ERR(priv, "dma_alloc_coherent(%zd) failed\n", tfd_sz); 330 IWL_ERR(priv, "dma_alloc_coherent(%zd) failed\n", tfd_sz);
@@ -356,7 +415,7 @@ static void iwl_tx_queue_unmap(struct iwl_priv *priv, int txq_id)
356static void iwl_tx_queue_free(struct iwl_priv *priv, int txq_id) 415static void iwl_tx_queue_free(struct iwl_priv *priv, int txq_id)
357{ 416{
358 struct iwl_tx_queue *txq = &priv->txq[txq_id]; 417 struct iwl_tx_queue *txq = &priv->txq[txq_id];
359 struct device *dev = priv->bus.dev; 418 struct device *dev = priv->bus->dev;
360 int i; 419 int i;
361 if (WARN_ON(!txq)) 420 if (WARN_ON(!txq))
362 return; 421 return;
@@ -467,11 +526,11 @@ static int iwl_trans_tx_alloc(struct iwl_priv *priv)
467 return 0; 526 return 0;
468 527
469error: 528error:
470 trans_tx_free(priv); 529 trans_tx_free(&priv->trans);
471 530
472 return ret; 531 return ret;
473} 532}
474static int iwl_trans_tx_init(struct iwl_priv *priv) 533static int iwl_tx_init(struct iwl_priv *priv)
475{ 534{
476 int ret; 535 int ret;
477 int txq_id, slots_num; 536 int txq_id, slots_num;
@@ -488,7 +547,7 @@ static int iwl_trans_tx_init(struct iwl_priv *priv)
488 spin_lock_irqsave(&priv->lock, flags); 547 spin_lock_irqsave(&priv->lock, flags);
489 548
490 /* Turn off all Tx DMA fifos */ 549 /* Turn off all Tx DMA fifos */
491 iwl_write_prph(priv, IWLAGN_SCD_TXFACT, 0); 550 iwl_write_prph(priv, SCD_TXFACT, 0);
492 551
493 /* Tell NIC where to find the "keep warm" buffer */ 552 /* Tell NIC where to find the "keep warm" buffer */
494 iwl_write_direct32(priv, FH_KW_MEM_ADDR_REG, priv->kw.dma >> 4); 553 iwl_write_direct32(priv, FH_KW_MEM_ADDR_REG, priv->kw.dma >> 4);
@@ -511,10 +570,308 @@ static int iwl_trans_tx_init(struct iwl_priv *priv)
511error: 570error:
512 /*Upon error, free only if we allocated something */ 571 /*Upon error, free only if we allocated something */
513 if (alloc) 572 if (alloc)
514 trans_tx_free(priv); 573 trans_tx_free(&priv->trans);
574 return ret;
575}
576
577static void iwl_set_pwr_vmain(struct iwl_priv *priv)
578{
579/*
580 * (for documentation purposes)
581 * to set power to V_AUX, do:
582
583 if (pci_pme_capable(priv->pci_dev, PCI_D3cold))
584 iwl_set_bits_mask_prph(priv, APMG_PS_CTRL_REG,
585 APMG_PS_CTRL_VAL_PWR_SRC_VAUX,
586 ~APMG_PS_CTRL_MSK_PWR_SRC);
587 */
588
589 iwl_set_bits_mask_prph(priv, APMG_PS_CTRL_REG,
590 APMG_PS_CTRL_VAL_PWR_SRC_VMAIN,
591 ~APMG_PS_CTRL_MSK_PWR_SRC);
592}
593
594static int iwl_nic_init(struct iwl_priv *priv)
595{
596 unsigned long flags;
597
598 /* nic_init */
599 spin_lock_irqsave(&priv->lock, flags);
600 iwl_apm_init(priv);
601
602 /* Set interrupt coalescing calibration timer to default (512 usecs) */
603 iwl_write8(priv, CSR_INT_COALESCING, IWL_HOST_INT_CALIB_TIMEOUT_DEF);
604
605 spin_unlock_irqrestore(&priv->lock, flags);
606
607 iwl_set_pwr_vmain(priv);
608
609 priv->cfg->lib->nic_config(priv);
610
611 /* Allocate the RX queue, or reset if it is already allocated */
612 iwl_rx_init(priv);
613
614 /* Allocate or reset and init all Tx and Command queues */
615 if (iwl_tx_init(priv))
616 return -ENOMEM;
617
618 if (priv->cfg->base_params->shadow_reg_enable) {
619 /* enable shadow regs in HW */
620 iwl_set_bit(priv, CSR_MAC_SHADOW_REG_CTRL,
621 0x800FFFFF);
622 }
623
624 set_bit(STATUS_INIT, &priv->status);
625
626 return 0;
627}
628
629#define HW_READY_TIMEOUT (50)
630
631/* Note: returns poll_bit return value, which is >= 0 if success */
632static int iwl_set_hw_ready(struct iwl_priv *priv)
633{
634 int ret;
635
636 iwl_set_bit(priv, CSR_HW_IF_CONFIG_REG,
637 CSR_HW_IF_CONFIG_REG_BIT_NIC_READY);
638
639 /* See if we got it */
640 ret = iwl_poll_bit(priv, CSR_HW_IF_CONFIG_REG,
641 CSR_HW_IF_CONFIG_REG_BIT_NIC_READY,
642 CSR_HW_IF_CONFIG_REG_BIT_NIC_READY,
643 HW_READY_TIMEOUT);
644
645 IWL_DEBUG_INFO(priv, "hardware%s ready\n", ret < 0 ? " not" : "");
646 return ret;
647}
648
649/* Note: returns standard 0/-ERROR code */
650static int iwl_trans_prepare_card_hw(struct iwl_priv *priv)
651{
652 int ret;
653
654 IWL_DEBUG_INFO(priv, "iwl_trans_prepare_card_hw enter\n");
655
656 ret = iwl_set_hw_ready(priv);
657 if (ret >= 0)
658 return 0;
659
660 /* If HW is not ready, prepare the conditions to check again */
661 iwl_set_bit(priv, CSR_HW_IF_CONFIG_REG,
662 CSR_HW_IF_CONFIG_REG_PREPARE);
663
664 ret = iwl_poll_bit(priv, CSR_HW_IF_CONFIG_REG,
665 ~CSR_HW_IF_CONFIG_REG_BIT_NIC_PREPARE_DONE,
666 CSR_HW_IF_CONFIG_REG_BIT_NIC_PREPARE_DONE, 150000);
667
668 if (ret < 0)
669 return ret;
670
671 /* HW should be ready by now, check again. */
672 ret = iwl_set_hw_ready(priv);
673 if (ret >= 0)
674 return 0;
515 return ret; 675 return ret;
516} 676}
517 677
678static int iwl_trans_start_device(struct iwl_priv *priv)
679{
680 int ret;
681
682 priv->ucode_owner = IWL_OWNERSHIP_DRIVER;
683
684 if ((priv->cfg->sku & EEPROM_SKU_CAP_AMT_ENABLE) &&
685 iwl_trans_prepare_card_hw(priv)) {
686 IWL_WARN(priv, "Exit HW not ready\n");
687 return -EIO;
688 }
689
690 /* If platform's RF_KILL switch is NOT set to KILL */
691 if (iwl_read32(priv, CSR_GP_CNTRL) &
692 CSR_GP_CNTRL_REG_FLAG_HW_RF_KILL_SW)
693 clear_bit(STATUS_RF_KILL_HW, &priv->status);
694 else
695 set_bit(STATUS_RF_KILL_HW, &priv->status);
696
697 if (iwl_is_rfkill(priv)) {
698 wiphy_rfkill_set_hw_state(priv->hw->wiphy, true);
699 iwl_enable_interrupts(priv);
700 return -ERFKILL;
701 }
702
703 iwl_write32(priv, CSR_INT, 0xFFFFFFFF);
704
705 ret = iwl_nic_init(priv);
706 if (ret) {
707 IWL_ERR(priv, "Unable to init nic\n");
708 return ret;
709 }
710
711 /* make sure rfkill handshake bits are cleared */
712 iwl_write32(priv, CSR_UCODE_DRV_GP1_CLR, CSR_UCODE_SW_BIT_RFKILL);
713 iwl_write32(priv, CSR_UCODE_DRV_GP1_CLR,
714 CSR_UCODE_DRV_GP1_BIT_CMD_BLOCKED);
715
716 /* clear (again), then enable host interrupts */
717 iwl_write32(priv, CSR_INT, 0xFFFFFFFF);
718 iwl_enable_interrupts(priv);
719
720 /* really make sure rfkill handshake bits are cleared */
721 iwl_write32(priv, CSR_UCODE_DRV_GP1_CLR, CSR_UCODE_SW_BIT_RFKILL);
722 iwl_write32(priv, CSR_UCODE_DRV_GP1_CLR, CSR_UCODE_SW_BIT_RFKILL);
723
724 return 0;
725}
726
727/*
728 * Activate/Deactivate Tx DMA/FIFO channels according tx fifos mask
729 * must be called under priv->lock and mac access
730 */
731static void iwl_trans_txq_set_sched(struct iwl_priv *priv, u32 mask)
732{
733 iwl_write_prph(priv, SCD_TXFACT, mask);
734}
735
736#define IWL_AC_UNSET -1
737
738struct queue_to_fifo_ac {
739 s8 fifo, ac;
740};
741
742static const struct queue_to_fifo_ac iwlagn_default_queue_to_tx_fifo[] = {
743 { IWL_TX_FIFO_VO, IEEE80211_AC_VO, },
744 { IWL_TX_FIFO_VI, IEEE80211_AC_VI, },
745 { IWL_TX_FIFO_BE, IEEE80211_AC_BE, },
746 { IWL_TX_FIFO_BK, IEEE80211_AC_BK, },
747 { IWLAGN_CMD_FIFO_NUM, IWL_AC_UNSET, },
748 { IWL_TX_FIFO_UNUSED, IWL_AC_UNSET, },
749 { IWL_TX_FIFO_UNUSED, IWL_AC_UNSET, },
750 { IWL_TX_FIFO_UNUSED, IWL_AC_UNSET, },
751 { IWL_TX_FIFO_UNUSED, IWL_AC_UNSET, },
752 { IWL_TX_FIFO_UNUSED, IWL_AC_UNSET, },
753};
754
755static const struct queue_to_fifo_ac iwlagn_ipan_queue_to_tx_fifo[] = {
756 { IWL_TX_FIFO_VO, IEEE80211_AC_VO, },
757 { IWL_TX_FIFO_VI, IEEE80211_AC_VI, },
758 { IWL_TX_FIFO_BE, IEEE80211_AC_BE, },
759 { IWL_TX_FIFO_BK, IEEE80211_AC_BK, },
760 { IWL_TX_FIFO_BK_IPAN, IEEE80211_AC_BK, },
761 { IWL_TX_FIFO_BE_IPAN, IEEE80211_AC_BE, },
762 { IWL_TX_FIFO_VI_IPAN, IEEE80211_AC_VI, },
763 { IWL_TX_FIFO_VO_IPAN, IEEE80211_AC_VO, },
764 { IWL_TX_FIFO_BE_IPAN, 2, },
765 { IWLAGN_CMD_FIFO_NUM, IWL_AC_UNSET, },
766};
767static void iwl_trans_tx_start(struct iwl_priv *priv)
768{
769 const struct queue_to_fifo_ac *queue_to_fifo;
770 struct iwl_rxon_context *ctx;
771 u32 a;
772 unsigned long flags;
773 int i, chan;
774 u32 reg_val;
775
776 spin_lock_irqsave(&priv->lock, flags);
777
778 priv->scd_base_addr = iwl_read_prph(priv, SCD_SRAM_BASE_ADDR);
779 a = priv->scd_base_addr + SCD_CONTEXT_MEM_LOWER_BOUND;
780 /* reset conext data memory */
781 for (; a < priv->scd_base_addr + SCD_CONTEXT_MEM_UPPER_BOUND;
782 a += 4)
783 iwl_write_targ_mem(priv, a, 0);
784 /* reset tx status memory */
785 for (; a < priv->scd_base_addr + SCD_TX_STTS_MEM_UPPER_BOUND;
786 a += 4)
787 iwl_write_targ_mem(priv, a, 0);
788 for (; a < priv->scd_base_addr +
789 SCD_TRANS_TBL_OFFSET_QUEUE(priv->hw_params.max_txq_num); a += 4)
790 iwl_write_targ_mem(priv, a, 0);
791
792 iwl_write_prph(priv, SCD_DRAM_BASE_ADDR,
793 priv->scd_bc_tbls.dma >> 10);
794
795 /* Enable DMA channel */
796 for (chan = 0; chan < FH_TCSR_CHNL_NUM ; chan++)
797 iwl_write_direct32(priv, FH_TCSR_CHNL_TX_CONFIG_REG(chan),
798 FH_TCSR_TX_CONFIG_REG_VAL_DMA_CHNL_ENABLE |
799 FH_TCSR_TX_CONFIG_REG_VAL_DMA_CREDIT_ENABLE);
800
801 /* Update FH chicken bits */
802 reg_val = iwl_read_direct32(priv, FH_TX_CHICKEN_BITS_REG);
803 iwl_write_direct32(priv, FH_TX_CHICKEN_BITS_REG,
804 reg_val | FH_TX_CHICKEN_BITS_SCD_AUTO_RETRY_EN);
805
806 iwl_write_prph(priv, SCD_QUEUECHAIN_SEL,
807 SCD_QUEUECHAIN_SEL_ALL(priv));
808 iwl_write_prph(priv, SCD_AGGR_SEL, 0);
809
810 /* initiate the queues */
811 for (i = 0; i < priv->hw_params.max_txq_num; i++) {
812 iwl_write_prph(priv, SCD_QUEUE_RDPTR(i), 0);
813 iwl_write_direct32(priv, HBUS_TARG_WRPTR, 0 | (i << 8));
814 iwl_write_targ_mem(priv, priv->scd_base_addr +
815 SCD_CONTEXT_QUEUE_OFFSET(i), 0);
816 iwl_write_targ_mem(priv, priv->scd_base_addr +
817 SCD_CONTEXT_QUEUE_OFFSET(i) +
818 sizeof(u32),
819 ((SCD_WIN_SIZE <<
820 SCD_QUEUE_CTX_REG2_WIN_SIZE_POS) &
821 SCD_QUEUE_CTX_REG2_WIN_SIZE_MSK) |
822 ((SCD_FRAME_LIMIT <<
823 SCD_QUEUE_CTX_REG2_FRAME_LIMIT_POS) &
824 SCD_QUEUE_CTX_REG2_FRAME_LIMIT_MSK));
825 }
826
827 iwl_write_prph(priv, SCD_INTERRUPT_MASK,
828 IWL_MASK(0, priv->hw_params.max_txq_num));
829
830 /* Activate all Tx DMA/FIFO channels */
831 iwl_trans_txq_set_sched(priv, IWL_MASK(0, 7));
832
833 /* map queues to FIFOs */
834 if (priv->valid_contexts != BIT(IWL_RXON_CTX_BSS))
835 queue_to_fifo = iwlagn_ipan_queue_to_tx_fifo;
836 else
837 queue_to_fifo = iwlagn_default_queue_to_tx_fifo;
838
839 iwl_trans_set_wr_ptrs(priv, priv->cmd_queue, 0);
840
841 /* make sure all queue are not stopped */
842 memset(&priv->queue_stopped[0], 0, sizeof(priv->queue_stopped));
843 for (i = 0; i < 4; i++)
844 atomic_set(&priv->queue_stop_count[i], 0);
845 for_each_context(priv, ctx)
846 ctx->last_tx_rejected = false;
847
848 /* reset to 0 to enable all the queue first */
849 priv->txq_ctx_active_msk = 0;
850
851 BUILD_BUG_ON(ARRAY_SIZE(iwlagn_default_queue_to_tx_fifo) != 10);
852 BUILD_BUG_ON(ARRAY_SIZE(iwlagn_ipan_queue_to_tx_fifo) != 10);
853
854 for (i = 0; i < 10; i++) {
855 int fifo = queue_to_fifo[i].fifo;
856 int ac = queue_to_fifo[i].ac;
857
858 iwl_txq_ctx_activate(priv, i);
859
860 if (fifo == IWL_TX_FIFO_UNUSED)
861 continue;
862
863 if (ac != IWL_AC_UNSET)
864 iwl_set_swq_id(&priv->txq[i], ac, i);
865 iwl_trans_tx_queue_set_status(priv, &priv->txq[i], fifo, 0);
866 }
867
868 spin_unlock_irqrestore(&priv->lock, flags);
869
870 /* Enable L1-Active */
871 iwl_clear_bits_prph(priv, APMG_PCIDEV_STT_REG,
872 APMG_PCIDEV_STT_VAL_L1_ACT_DIS);
873}
874
518/** 875/**
519 * iwlagn_txq_ctx_stop - Stop all Tx DMA channels 876 * iwlagn_txq_ctx_stop - Stop all Tx DMA channels
520 */ 877 */
@@ -526,7 +883,7 @@ static int iwl_trans_tx_stop(struct iwl_priv *priv)
526 /* Turn off all Tx DMA fifos */ 883 /* Turn off all Tx DMA fifos */
527 spin_lock_irqsave(&priv->lock, flags); 884 spin_lock_irqsave(&priv->lock, flags);
528 885
529 iwlagn_txq_set_sched(priv, 0); 886 iwl_trans_txq_set_sched(priv, 0);
530 887
531 /* Stop each Tx DMA channel, and wait for it to be idle */ 888 /* Stop each Tx DMA channel, and wait for it to be idle */
532 for (ch = 0; ch < FH_TCSR_CHNL_NUM; ch++) { 889 for (ch = 0; ch < FH_TCSR_CHNL_NUM; ch++) {
@@ -552,20 +909,264 @@ static int iwl_trans_tx_stop(struct iwl_priv *priv)
552 return 0; 909 return 0;
553} 910}
554 911
912static void iwl_trans_stop_device(struct iwl_priv *priv)
913{
914 unsigned long flags;
915
916 /* stop and reset the on-board processor */
917 iwl_write32(priv, CSR_RESET, CSR_RESET_REG_FLAG_NEVO_RESET);
918
919 /* tell the device to stop sending interrupts */
920 spin_lock_irqsave(&priv->lock, flags);
921 iwl_disable_interrupts(priv);
922 spin_unlock_irqrestore(&priv->lock, flags);
923 trans_sync_irq(&priv->trans);
924
925 /* device going down, Stop using ICT table */
926 iwl_disable_ict(priv);
927
928 /*
929 * If a HW restart happens during firmware loading,
930 * then the firmware loading might call this function
931 * and later it might be called again due to the
932 * restart. So don't process again if the device is
933 * already dead.
934 */
935 if (test_bit(STATUS_DEVICE_ENABLED, &priv->status)) {
936 iwl_trans_tx_stop(priv);
937 iwl_trans_rx_stop(priv);
938
939 /* Power-down device's busmaster DMA clocks */
940 iwl_write_prph(priv, APMG_CLK_DIS_REG,
941 APMG_CLK_VAL_DMA_CLK_RQT);
942 udelay(5);
943 }
944
945 /* Make sure (redundant) we've released our request to stay awake */
946 iwl_clear_bit(priv, CSR_GP_CNTRL, CSR_GP_CNTRL_REG_FLAG_MAC_ACCESS_REQ);
947
948 /* Stop the device, and put it in low power state */
949 iwl_apm_stop(priv);
950}
951
952static struct iwl_tx_cmd *iwl_trans_get_tx_cmd(struct iwl_priv *priv,
953 int txq_id)
954{
955 struct iwl_tx_queue *txq = &priv->txq[txq_id];
956 struct iwl_queue *q = &txq->q;
957 struct iwl_device_cmd *dev_cmd;
958
959 if (unlikely(iwl_queue_space(q) < q->high_mark))
960 return NULL;
961
962 /*
963 * Set up the Tx-command (not MAC!) header.
964 * Store the chosen Tx queue and TFD index within the sequence field;
965 * after Tx, uCode's Tx response will return this value so driver can
966 * locate the frame within the tx queue and do post-tx processing.
967 */
968 dev_cmd = txq->cmd[q->write_ptr];
969 memset(dev_cmd, 0, sizeof(*dev_cmd));
970 dev_cmd->hdr.cmd = REPLY_TX;
971 dev_cmd->hdr.sequence = cpu_to_le16((u16)(QUEUE_TO_SEQ(txq_id) |
972 INDEX_TO_SEQ(q->write_ptr)));
973 return &dev_cmd->cmd.tx;
974}
975
976static int iwl_trans_tx(struct iwl_priv *priv, struct sk_buff *skb,
977 struct iwl_tx_cmd *tx_cmd, int txq_id, __le16 fc, bool ampdu,
978 struct iwl_rxon_context *ctx)
979{
980 struct iwl_tx_queue *txq = &priv->txq[txq_id];
981 struct iwl_queue *q = &txq->q;
982 struct iwl_device_cmd *dev_cmd = txq->cmd[q->write_ptr];
983 struct iwl_cmd_meta *out_meta;
984
985 dma_addr_t phys_addr = 0;
986 dma_addr_t txcmd_phys;
987 dma_addr_t scratch_phys;
988 u16 len, firstlen, secondlen;
989 u8 wait_write_ptr = 0;
990 u8 hdr_len = ieee80211_hdrlen(fc);
991
992 /* Set up driver data for this TFD */
993 memset(&(txq->txb[q->write_ptr]), 0, sizeof(struct iwl_tx_info));
994 txq->txb[q->write_ptr].skb = skb;
995 txq->txb[q->write_ptr].ctx = ctx;
996
997 /* Set up first empty entry in queue's array of Tx/cmd buffers */
998 out_meta = &txq->meta[q->write_ptr];
999
1000 /*
1001 * Use the first empty entry in this queue's command buffer array
1002 * to contain the Tx command and MAC header concatenated together
1003 * (payload data will be in another buffer).
1004 * Size of this varies, due to varying MAC header length.
1005 * If end is not dword aligned, we'll have 2 extra bytes at the end
1006 * of the MAC header (device reads on dword boundaries).
1007 * We'll tell device about this padding later.
1008 */
1009 len = sizeof(struct iwl_tx_cmd) +
1010 sizeof(struct iwl_cmd_header) + hdr_len;
1011 firstlen = (len + 3) & ~3;
1012
1013 /* Tell NIC about any 2-byte padding after MAC header */
1014 if (firstlen != len)
1015 tx_cmd->tx_flags |= TX_CMD_FLG_MH_PAD_MSK;
1016
1017 /* Physical address of this Tx command's header (not MAC header!),
1018 * within command buffer array. */
1019 txcmd_phys = dma_map_single(priv->bus->dev,
1020 &dev_cmd->hdr, firstlen,
1021 DMA_BIDIRECTIONAL);
1022 if (unlikely(dma_mapping_error(priv->bus->dev, txcmd_phys)))
1023 return -1;
1024 dma_unmap_addr_set(out_meta, mapping, txcmd_phys);
1025 dma_unmap_len_set(out_meta, len, firstlen);
1026
1027 if (!ieee80211_has_morefrags(fc)) {
1028 txq->need_update = 1;
1029 } else {
1030 wait_write_ptr = 1;
1031 txq->need_update = 0;
1032 }
1033
1034 /* Set up TFD's 2nd entry to point directly to remainder of skb,
1035 * if any (802.11 null frames have no payload). */
1036 secondlen = skb->len - hdr_len;
1037 if (secondlen > 0) {
1038 phys_addr = dma_map_single(priv->bus->dev, skb->data + hdr_len,
1039 secondlen, DMA_TO_DEVICE);
1040 if (unlikely(dma_mapping_error(priv->bus->dev, phys_addr))) {
1041 dma_unmap_single(priv->bus->dev,
1042 dma_unmap_addr(out_meta, mapping),
1043 dma_unmap_len(out_meta, len),
1044 DMA_BIDIRECTIONAL);
1045 return -1;
1046 }
1047 }
1048
1049 /* Attach buffers to TFD */
1050 iwlagn_txq_attach_buf_to_tfd(priv, txq, txcmd_phys, firstlen, 1);
1051 if (secondlen > 0)
1052 iwlagn_txq_attach_buf_to_tfd(priv, txq, phys_addr,
1053 secondlen, 0);
1054
1055 scratch_phys = txcmd_phys + sizeof(struct iwl_cmd_header) +
1056 offsetof(struct iwl_tx_cmd, scratch);
1057
1058 /* take back ownership of DMA buffer to enable update */
1059 dma_sync_single_for_cpu(priv->bus->dev, txcmd_phys, firstlen,
1060 DMA_BIDIRECTIONAL);
1061 tx_cmd->dram_lsb_ptr = cpu_to_le32(scratch_phys);
1062 tx_cmd->dram_msb_ptr = iwl_get_dma_hi_addr(scratch_phys);
1063
1064 IWL_DEBUG_TX(priv, "sequence nr = 0X%x\n",
1065 le16_to_cpu(dev_cmd->hdr.sequence));
1066 IWL_DEBUG_TX(priv, "tx_flags = 0X%x\n", le32_to_cpu(tx_cmd->tx_flags));
1067 iwl_print_hex_dump(priv, IWL_DL_TX, (u8 *)tx_cmd, sizeof(*tx_cmd));
1068 iwl_print_hex_dump(priv, IWL_DL_TX, (u8 *)tx_cmd->hdr, hdr_len);
1069
1070 /* Set up entry for this TFD in Tx byte-count array */
1071 if (ampdu)
1072 iwl_trans_txq_update_byte_cnt_tbl(priv, txq,
1073 le16_to_cpu(tx_cmd->len));
1074
1075 dma_sync_single_for_device(priv->bus->dev, txcmd_phys, firstlen,
1076 DMA_BIDIRECTIONAL);
1077
1078 trace_iwlwifi_dev_tx(priv,
1079 &((struct iwl_tfd *)txq->tfds)[txq->q.write_ptr],
1080 sizeof(struct iwl_tfd),
1081 &dev_cmd->hdr, firstlen,
1082 skb->data + hdr_len, secondlen);
1083
1084 /* Tell device the write index *just past* this latest filled TFD */
1085 q->write_ptr = iwl_queue_inc_wrap(q->write_ptr, q->n_bd);
1086 iwl_txq_update_write_ptr(priv, txq);
1087
1088 /*
1089 * At this point the frame is "transmitted" successfully
1090 * and we will get a TX status notification eventually,
1091 * regardless of the value of ret. "ret" only indicates
1092 * whether or not we should update the write pointer.
1093 */
1094 if ((iwl_queue_space(q) < q->high_mark) && priv->mac80211_registered) {
1095 if (wait_write_ptr) {
1096 txq->need_update = 1;
1097 iwl_txq_update_write_ptr(priv, txq);
1098 } else {
1099 iwl_stop_queue(priv, txq);
1100 }
1101 }
1102 return 0;
1103}
1104
1105static void iwl_trans_kick_nic(struct iwl_priv *priv)
1106{
1107 /* Remove all resets to allow NIC to operate */
1108 iwl_write32(priv, CSR_RESET, 0);
1109}
1110
1111static void iwl_trans_sync_irq(struct iwl_priv *priv)
1112{
1113 /* wait to make sure we flush pending tasklet*/
1114 synchronize_irq(priv->bus->irq);
1115 tasklet_kill(&priv->irq_tasklet);
1116}
1117
1118static void iwl_trans_free(struct iwl_priv *priv)
1119{
1120 free_irq(priv->bus->irq, priv);
1121 iwl_free_isr_ict(priv);
1122}
1123
555static const struct iwl_trans_ops trans_ops = { 1124static const struct iwl_trans_ops trans_ops = {
556 .rx_init = iwl_trans_rx_init, 1125 .start_device = iwl_trans_start_device,
557 .rx_stop = iwl_trans_rx_stop, 1126 .prepare_card_hw = iwl_trans_prepare_card_hw,
558 .rx_free = iwl_trans_rx_free, 1127 .stop_device = iwl_trans_stop_device,
559 1128
560 .tx_init = iwl_trans_tx_init, 1129 .tx_start = iwl_trans_tx_start,
561 .tx_stop = iwl_trans_tx_stop, 1130
1131 .rx_free = iwl_trans_rx_free,
562 .tx_free = iwl_trans_tx_free, 1132 .tx_free = iwl_trans_tx_free,
563 1133
564 .send_cmd = iwl_send_cmd, 1134 .send_cmd = iwl_send_cmd,
565 .send_cmd_pdu = iwl_send_cmd_pdu, 1135 .send_cmd_pdu = iwl_send_cmd_pdu,
1136
1137 .get_tx_cmd = iwl_trans_get_tx_cmd,
1138 .tx = iwl_trans_tx,
1139
1140 .txq_agg_disable = iwl_trans_txq_agg_disable,
1141 .txq_agg_setup = iwl_trans_txq_agg_setup,
1142
1143 .kick_nic = iwl_trans_kick_nic,
1144
1145 .sync_irq = iwl_trans_sync_irq,
1146 .free = iwl_trans_free,
566}; 1147};
567 1148
568void iwl_trans_register(struct iwl_trans *trans) 1149int iwl_trans_register(struct iwl_trans *trans, struct iwl_priv *priv)
569{ 1150{
570 trans->ops = &trans_ops; 1151 int err;
1152
1153 priv->trans.ops = &trans_ops;
1154 priv->trans.priv = priv;
1155
1156 tasklet_init(&priv->irq_tasklet, (void (*)(unsigned long))
1157 iwl_irq_tasklet, (unsigned long)priv);
1158
1159 iwl_alloc_isr_ict(priv);
1160
1161 err = request_irq(priv->bus->irq, iwl_isr_ict, IRQF_SHARED,
1162 DRV_NAME, priv);
1163 if (err) {
1164 IWL_ERR(priv, "Error allocating IRQ %d\n", priv->bus->irq);
1165 iwl_free_isr_ict(priv);
1166 return err;
1167 }
1168
1169 INIT_WORK(&priv->rx_replenish, iwl_bg_rx_replenish);
1170
1171 return 0;
571} 1172}
diff --git a/drivers/net/wireless/iwlwifi/iwl-trans.h b/drivers/net/wireless/iwlwifi/iwl-trans.h
index 111acca07d75..7993aa7ae668 100644
--- a/drivers/net/wireless/iwlwifi/iwl-trans.h
+++ b/drivers/net/wireless/iwlwifi/iwl-trans.h
@@ -60,46 +60,166 @@
60 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 60 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
61 * 61 *
62 *****************************************************************************/ 62 *****************************************************************************/
63static inline int trans_rx_init(struct iwl_priv *priv) 63#ifndef __iwl_trans_h__
64#define __iwl_trans_h__
65
66 /*This file includes the declaration that are exported from the transport
67 * layer */
68
69struct iwl_priv;
70struct iwl_rxon_context;
71struct iwl_host_cmd;
72
73/**
74 * struct iwl_trans_ops - transport specific operations
75 * @start_device: allocates and inits all the resources for the transport
76 * layer.
77 * @prepare_card_hw: claim the ownership on the HW. Will be called during
78 * probe.
79 * @tx_start: starts and configures all the Tx fifo - usually done once the fw
80 * is alive.
81 * @stop_device:stops the whole device (embedded CPU put to reset)
82 * @rx_free: frees the rx memory
83 * @tx_free: frees the tx memory
84 * @send_cmd:send a host command
85 * @send_cmd_pdu:send a host command: flags can be CMD_*
86 * @get_tx_cmd: returns a pointer to a new Tx cmd for the upper layer use
87 * @tx: send an skb
88 * @txq_agg_setup: setup a tx queue for AMPDU - will be called once the HW is
89 * ready and a successful ADDBA response has been received.
90 * @txq_agg_disable: de-configure a Tx queue to send AMPDUs
91 * @kick_nic: remove the RESET from the embedded CPU and let it run
92 * @sync_irq: the upper layer will typically disable interrupt and call this
93 * handler. After this handler returns, it is guaranteed that all
94 * the ISR / tasklet etc... have finished running and the transport
95 * layer shall not pass any Rx.
96 * @free: release all the ressource for the transport layer itself such as
97 * irq, tasklet etc...
98 */
99struct iwl_trans_ops {
100
101 int (*start_device)(struct iwl_priv *priv);
102 int (*prepare_card_hw)(struct iwl_priv *priv);
103 void (*stop_device)(struct iwl_priv *priv);
104 void (*tx_start)(struct iwl_priv *priv);
105 void (*tx_free)(struct iwl_priv *priv);
106 void (*rx_free)(struct iwl_priv *priv);
107
108 int (*send_cmd)(struct iwl_priv *priv, struct iwl_host_cmd *cmd);
109
110 int (*send_cmd_pdu)(struct iwl_priv *priv, u8 id, u32 flags, u16 len,
111 const void *data);
112 struct iwl_tx_cmd * (*get_tx_cmd)(struct iwl_priv *priv, int txq_id);
113 int (*tx)(struct iwl_priv *priv, struct sk_buff *skb,
114 struct iwl_tx_cmd *tx_cmd, int txq_id, __le16 fc, bool ampdu,
115 struct iwl_rxon_context *ctx);
116
117 int (*txq_agg_disable)(struct iwl_priv *priv, u16 txq_id,
118 u16 ssn_idx, u8 tx_fifo);
119 void (*txq_agg_setup)(struct iwl_priv *priv, int sta_id, int tid,
120 int frame_limit);
121
122 void (*kick_nic)(struct iwl_priv *priv);
123
124 void (*sync_irq)(struct iwl_priv *priv);
125 void (*free)(struct iwl_priv *priv);
126};
127
128struct iwl_trans {
129 const struct iwl_trans_ops *ops;
130 struct iwl_priv *priv;
131};
132
133static inline int trans_start_device(struct iwl_trans *trans)
64{ 134{
65 return priv->trans.ops->rx_init(priv); 135 return trans->ops->start_device(trans->priv);
66} 136}
67 137
68static inline int trans_rx_stop(struct iwl_priv *priv) 138static inline int trans_prepare_card_hw(struct iwl_trans *trans)
69{ 139{
70 return priv->trans.ops->rx_stop(priv); 140 return trans->ops->prepare_card_hw(trans->priv);
71} 141}
72 142
73static inline void trans_rx_free(struct iwl_priv *priv) 143static inline void trans_stop_device(struct iwl_trans *trans)
74{ 144{
75 priv->trans.ops->rx_free(priv); 145 trans->ops->stop_device(trans->priv);
76} 146}
77 147
78static inline int trans_tx_init(struct iwl_priv *priv) 148static inline void trans_tx_start(struct iwl_trans *trans)
79{ 149{
80 return priv->trans.ops->tx_init(priv); 150 trans->ops->tx_start(trans->priv);
81} 151}
82 152
83static inline int trans_tx_stop(struct iwl_priv *priv) 153static inline void trans_rx_free(struct iwl_trans *trans)
84{ 154{
85 return priv->trans.ops->tx_stop(priv); 155 trans->ops->rx_free(trans->priv);
86} 156}
87 157
88static inline void trans_tx_free(struct iwl_priv *priv) 158static inline void trans_tx_free(struct iwl_trans *trans)
89{ 159{
90 priv->trans.ops->tx_free(priv); 160 trans->ops->tx_free(trans->priv);
91} 161}
92 162
93static inline int trans_send_cmd(struct iwl_priv *priv, 163static inline int trans_send_cmd(struct iwl_trans *trans,
94 struct iwl_host_cmd *cmd) 164 struct iwl_host_cmd *cmd)
95{ 165{
96 return priv->trans.ops->send_cmd(priv, cmd); 166 return trans->ops->send_cmd(trans->priv, cmd);
97} 167}
98 168
99static inline int trans_send_cmd_pdu(struct iwl_priv *priv, u8 id, u32 flags, 169static inline int trans_send_cmd_pdu(struct iwl_trans *trans, u8 id, u32 flags,
100 u16 len, const void *data) 170 u16 len, const void *data)
101{ 171{
102 return priv->trans.ops->send_cmd_pdu(priv, id, flags, len, data); 172 return trans->ops->send_cmd_pdu(trans->priv, id, flags, len, data);
173}
174
175static inline struct iwl_tx_cmd *trans_get_tx_cmd(struct iwl_trans *trans,
176 int txq_id)
177{
178 return trans->ops->get_tx_cmd(trans->priv, txq_id);
103} 179}
104 180
105void iwl_trans_register(struct iwl_trans *trans); 181static inline int trans_tx(struct iwl_trans *trans, struct sk_buff *skb,
182 struct iwl_tx_cmd *tx_cmd, int txq_id, __le16 fc, bool ampdu,
183 struct iwl_rxon_context *ctx)
184{
185 return trans->ops->tx(trans->priv, skb, tx_cmd, txq_id, fc, ampdu, ctx);
186}
187
188static inline int trans_txq_agg_disable(struct iwl_trans *trans, u16 txq_id,
189 u16 ssn_idx, u8 tx_fifo)
190{
191 return trans->ops->txq_agg_disable(trans->priv, txq_id,
192 ssn_idx, tx_fifo);
193}
194
195static inline void trans_txq_agg_setup(struct iwl_trans *trans, int sta_id,
196 int tid, int frame_limit)
197{
198 trans->ops->txq_agg_setup(trans->priv, sta_id, tid, frame_limit);
199}
200
201static inline void trans_kick_nic(struct iwl_trans *trans)
202{
203 trans->ops->kick_nic(trans->priv);
204}
205
206static inline void trans_sync_irq(struct iwl_trans *trans)
207{
208 trans->ops->sync_irq(trans->priv);
209}
210
211static inline void trans_free(struct iwl_trans *trans)
212{
213 trans->ops->free(trans->priv);
214}
215
216int iwl_trans_register(struct iwl_trans *trans, struct iwl_priv *priv);
217
218/*TODO: this functions should NOT be exported from trans module - export it
219 * until the reclaim flow will be brought to the transport module too */
220
221struct iwl_tx_queue;
222void iwlagn_txq_inval_byte_cnt_tbl(struct iwl_priv *priv,
223 struct iwl_tx_queue *txq);
224
225#endif /* __iwl_trans_h__ */
diff --git a/drivers/net/wireless/libertas/dev.h b/drivers/net/wireless/libertas/dev.h
index 76d018beebf4..adb3490e3cf5 100644
--- a/drivers/net/wireless/libertas/dev.h
+++ b/drivers/net/wireless/libertas/dev.h
@@ -44,9 +44,7 @@ struct lbs_private {
44 /* Mesh */ 44 /* Mesh */
45 struct net_device *mesh_dev; /* Virtual device */ 45 struct net_device *mesh_dev; /* Virtual device */
46#ifdef CONFIG_LIBERTAS_MESH 46#ifdef CONFIG_LIBERTAS_MESH
47 u32 mesh_connect_status;
48 struct lbs_mesh_stats mstats; 47 struct lbs_mesh_stats mstats;
49 int mesh_open;
50 uint16_t mesh_tlv; 48 uint16_t mesh_tlv;
51 u8 mesh_ssid[IEEE80211_MAX_SSID_LEN + 1]; 49 u8 mesh_ssid[IEEE80211_MAX_SSID_LEN + 1];
52 u8 mesh_ssid_len; 50 u8 mesh_ssid_len;
diff --git a/drivers/net/wireless/libertas/main.c b/drivers/net/wireless/libertas/main.c
index c79aac4b1dae..94652c5a25de 100644
--- a/drivers/net/wireless/libertas/main.c
+++ b/drivers/net/wireless/libertas/main.c
@@ -512,7 +512,7 @@ static int lbs_thread(void *data)
512 if (priv->connect_status == LBS_CONNECTED) 512 if (priv->connect_status == LBS_CONNECTED)
513 netif_wake_queue(priv->dev); 513 netif_wake_queue(priv->dev);
514 if (priv->mesh_dev && 514 if (priv->mesh_dev &&
515 lbs_mesh_connected(priv)) 515 netif_running(priv->mesh_dev))
516 netif_wake_queue(priv->mesh_dev); 516 netif_wake_queue(priv->mesh_dev);
517 } 517 }
518 } 518 }
diff --git a/drivers/net/wireless/libertas/mesh.c b/drivers/net/wireless/libertas/mesh.c
index 7969d104189d..be72c08ea2a7 100644
--- a/drivers/net/wireless/libertas/mesh.c
+++ b/drivers/net/wireless/libertas/mesh.c
@@ -15,6 +15,121 @@
15#include "cmd.h" 15#include "cmd.h"
16 16
17 17
18static int lbs_add_mesh(struct lbs_private *priv);
19
20/***************************************************************************
21 * Mesh command handling
22 */
23
24static int lbs_mesh_access(struct lbs_private *priv, uint16_t cmd_action,
25 struct cmd_ds_mesh_access *cmd)
26{
27 int ret;
28
29 lbs_deb_enter_args(LBS_DEB_CMD, "action %d", cmd_action);
30
31 cmd->hdr.command = cpu_to_le16(CMD_MESH_ACCESS);
32 cmd->hdr.size = cpu_to_le16(sizeof(*cmd));
33 cmd->hdr.result = 0;
34
35 cmd->action = cpu_to_le16(cmd_action);
36
37 ret = lbs_cmd_with_response(priv, CMD_MESH_ACCESS, cmd);
38
39 lbs_deb_leave(LBS_DEB_CMD);
40 return ret;
41}
42
43static int __lbs_mesh_config_send(struct lbs_private *priv,
44 struct cmd_ds_mesh_config *cmd,
45 uint16_t action, uint16_t type)
46{
47 int ret;
48 u16 command = CMD_MESH_CONFIG_OLD;
49
50 lbs_deb_enter(LBS_DEB_CMD);
51
52 /*
53 * Command id is 0xac for v10 FW along with mesh interface
54 * id in bits 14-13-12.
55 */
56 if (priv->mesh_tlv == TLV_TYPE_MESH_ID)
57 command = CMD_MESH_CONFIG |
58 (MESH_IFACE_ID << MESH_IFACE_BIT_OFFSET);
59
60 cmd->hdr.command = cpu_to_le16(command);
61 cmd->hdr.size = cpu_to_le16(sizeof(struct cmd_ds_mesh_config));
62 cmd->hdr.result = 0;
63
64 cmd->type = cpu_to_le16(type);
65 cmd->action = cpu_to_le16(action);
66
67 ret = lbs_cmd_with_response(priv, command, cmd);
68
69 lbs_deb_leave(LBS_DEB_CMD);
70 return ret;
71}
72
73static int lbs_mesh_config_send(struct lbs_private *priv,
74 struct cmd_ds_mesh_config *cmd,
75 uint16_t action, uint16_t type)
76{
77 int ret;
78
79 if (!(priv->fwcapinfo & FW_CAPINFO_PERSISTENT_CONFIG))
80 return -EOPNOTSUPP;
81
82 ret = __lbs_mesh_config_send(priv, cmd, action, type);
83 return ret;
84}
85
86/* This function is the CMD_MESH_CONFIG legacy function. It only handles the
87 * START and STOP actions. The extended actions supported by CMD_MESH_CONFIG
88 * are all handled by preparing a struct cmd_ds_mesh_config and passing it to
89 * lbs_mesh_config_send.
90 */
91static int lbs_mesh_config(struct lbs_private *priv, uint16_t action,
92 uint16_t chan)
93{
94 struct cmd_ds_mesh_config cmd;
95 struct mrvl_meshie *ie;
96 DECLARE_SSID_BUF(ssid);
97
98 memset(&cmd, 0, sizeof(cmd));
99 cmd.channel = cpu_to_le16(chan);
100 ie = (struct mrvl_meshie *)cmd.data;
101
102 switch (action) {
103 case CMD_ACT_MESH_CONFIG_START:
104 ie->id = WLAN_EID_GENERIC;
105 ie->val.oui[0] = 0x00;
106 ie->val.oui[1] = 0x50;
107 ie->val.oui[2] = 0x43;
108 ie->val.type = MARVELL_MESH_IE_TYPE;
109 ie->val.subtype = MARVELL_MESH_IE_SUBTYPE;
110 ie->val.version = MARVELL_MESH_IE_VERSION;
111 ie->val.active_protocol_id = MARVELL_MESH_PROTO_ID_HWMP;
112 ie->val.active_metric_id = MARVELL_MESH_METRIC_ID;
113 ie->val.mesh_capability = MARVELL_MESH_CAPABILITY;
114 ie->val.mesh_id_len = priv->mesh_ssid_len;
115 memcpy(ie->val.mesh_id, priv->mesh_ssid, priv->mesh_ssid_len);
116 ie->len = sizeof(struct mrvl_meshie_val) -
117 IEEE80211_MAX_SSID_LEN + priv->mesh_ssid_len;
118 cmd.length = cpu_to_le16(sizeof(struct mrvl_meshie_val));
119 break;
120 case CMD_ACT_MESH_CONFIG_STOP:
121 break;
122 default:
123 return -1;
124 }
125 lbs_deb_cmd("mesh config action %d type %x channel %d SSID %s\n",
126 action, priv->mesh_tlv, chan,
127 print_ssid(ssid, priv->mesh_ssid, priv->mesh_ssid_len));
128
129 return __lbs_mesh_config_send(priv, &cmd, action, priv->mesh_tlv);
130}
131
132
18/*************************************************************************** 133/***************************************************************************
19 * Mesh sysfs support 134 * Mesh sysfs support
20 */ 135 */
@@ -155,17 +270,11 @@ static ssize_t lbs_mesh_set(struct device *dev,
155{ 270{
156 struct lbs_private *priv = to_net_dev(dev)->ml_priv; 271 struct lbs_private *priv = to_net_dev(dev)->ml_priv;
157 int enable; 272 int enable;
158 int ret, action = CMD_ACT_MESH_CONFIG_STOP;
159 273
160 sscanf(buf, "%x", &enable); 274 sscanf(buf, "%x", &enable);
161 enable = !!enable; 275 enable = !!enable;
162 if (enable == !!priv->mesh_dev) 276 if (enable == !!priv->mesh_dev)
163 return count; 277 return count;
164 if (enable)
165 action = CMD_ACT_MESH_CONFIG_START;
166 ret = lbs_mesh_config(priv, action, priv->channel);
167 if (ret)
168 return ret;
169 278
170 if (enable) 279 if (enable)
171 lbs_add_mesh(priv); 280 lbs_add_mesh(priv);
@@ -200,582 +309,11 @@ static struct attribute *lbs_mesh_sysfs_entries[] = {
200 NULL, 309 NULL,
201}; 310};
202 311
203static struct attribute_group lbs_mesh_attr_group = { 312static const struct attribute_group lbs_mesh_attr_group = {
204 .attrs = lbs_mesh_sysfs_entries, 313 .attrs = lbs_mesh_sysfs_entries,
205}; 314};
206 315
207 316
208
209/***************************************************************************
210 * Initializing and starting, stopping mesh
211 */
212
213/*
214 * Check mesh FW version and appropriately send the mesh start
215 * command
216 */
217int lbs_init_mesh(struct lbs_private *priv)
218{
219 struct net_device *dev = priv->dev;
220 int ret = 0;
221
222 lbs_deb_enter(LBS_DEB_MESH);
223
224 priv->mesh_connect_status = LBS_DISCONNECTED;
225
226 /* Determine mesh_fw_ver from fwrelease and fwcapinfo */
227 /* 5.0.16p0 9.0.0.p0 is known to NOT support any mesh */
228 /* 5.110.22 have mesh command with 0xa3 command id */
229 /* 10.0.0.p0 FW brings in mesh config command with different id */
230 /* Check FW version MSB and initialize mesh_fw_ver */
231 if (MRVL_FW_MAJOR_REV(priv->fwrelease) == MRVL_FW_V5) {
232 /* Enable mesh, if supported, and work out which TLV it uses.
233 0x100 + 291 is an unofficial value used in 5.110.20.pXX
234 0x100 + 37 is the official value used in 5.110.21.pXX
235 but we check them in that order because 20.pXX doesn't
236 give an error -- it just silently fails. */
237
238 /* 5.110.20.pXX firmware will fail the command if the channel
239 doesn't match the existing channel. But only if the TLV
240 is correct. If the channel is wrong, _BOTH_ versions will
241 give an error to 0x100+291, and allow 0x100+37 to succeed.
242 It's just that 5.110.20.pXX will not have done anything
243 useful */
244
245 priv->mesh_tlv = TLV_TYPE_OLD_MESH_ID;
246 if (lbs_mesh_config(priv, CMD_ACT_MESH_CONFIG_START,
247 priv->channel)) {
248 priv->mesh_tlv = TLV_TYPE_MESH_ID;
249 if (lbs_mesh_config(priv, CMD_ACT_MESH_CONFIG_START,
250 priv->channel))
251 priv->mesh_tlv = 0;
252 }
253 } else
254 if ((MRVL_FW_MAJOR_REV(priv->fwrelease) >= MRVL_FW_V10) &&
255 (priv->fwcapinfo & MESH_CAPINFO_ENABLE_MASK)) {
256 /* 10.0.0.pXX new firmwares should succeed with TLV
257 * 0x100+37; Do not invoke command with old TLV.
258 */
259 priv->mesh_tlv = TLV_TYPE_MESH_ID;
260 if (lbs_mesh_config(priv, CMD_ACT_MESH_CONFIG_START,
261 priv->channel))
262 priv->mesh_tlv = 0;
263 }
264
265
266 if (priv->mesh_tlv) {
267 sprintf(priv->mesh_ssid, "mesh");
268 priv->mesh_ssid_len = 4;
269
270 lbs_add_mesh(priv);
271
272 if (device_create_file(&dev->dev, &dev_attr_lbs_mesh))
273 netdev_err(dev, "cannot register lbs_mesh attribute\n");
274
275 ret = 1;
276 }
277
278 lbs_deb_leave_args(LBS_DEB_MESH, "ret %d", ret);
279 return ret;
280}
281
282
283int lbs_deinit_mesh(struct lbs_private *priv)
284{
285 struct net_device *dev = priv->dev;
286 int ret = 0;
287
288 lbs_deb_enter(LBS_DEB_MESH);
289
290 if (priv->mesh_tlv) {
291 device_remove_file(&dev->dev, &dev_attr_lbs_mesh);
292 ret = 1;
293 }
294
295 lbs_deb_leave_args(LBS_DEB_MESH, "ret %d", ret);
296 return ret;
297}
298
299
300/**
301 * lbs_mesh_stop - close the mshX interface
302 *
303 * @dev: A pointer to &net_device structure
304 * returns: 0
305 */
306static int lbs_mesh_stop(struct net_device *dev)
307{
308 struct lbs_private *priv = dev->ml_priv;
309
310 lbs_deb_enter(LBS_DEB_MESH);
311 spin_lock_irq(&priv->driver_lock);
312
313 priv->mesh_open = 0;
314 priv->mesh_connect_status = LBS_DISCONNECTED;
315
316 netif_stop_queue(dev);
317 netif_carrier_off(dev);
318
319 spin_unlock_irq(&priv->driver_lock);
320
321 schedule_work(&priv->mcast_work);
322
323 lbs_deb_leave(LBS_DEB_MESH);
324 return 0;
325}
326
327/**
328 * lbs_mesh_dev_open - open the mshX interface
329 *
330 * @dev: A pointer to &net_device structure
331 * returns: 0 or -EBUSY if monitor mode active
332 */
333static int lbs_mesh_dev_open(struct net_device *dev)
334{
335 struct lbs_private *priv = dev->ml_priv;
336 int ret = 0;
337
338 lbs_deb_enter(LBS_DEB_NET);
339
340 spin_lock_irq(&priv->driver_lock);
341
342 if (priv->wdev->iftype == NL80211_IFTYPE_MONITOR) {
343 ret = -EBUSY;
344 goto out;
345 }
346
347 priv->mesh_open = 1;
348 priv->mesh_connect_status = LBS_CONNECTED;
349 netif_carrier_on(dev);
350
351 if (!priv->tx_pending_len)
352 netif_wake_queue(dev);
353 out:
354
355 spin_unlock_irq(&priv->driver_lock);
356 lbs_deb_leave_args(LBS_DEB_NET, "ret %d", ret);
357 return ret;
358}
359
360static const struct net_device_ops mesh_netdev_ops = {
361 .ndo_open = lbs_mesh_dev_open,
362 .ndo_stop = lbs_mesh_stop,
363 .ndo_start_xmit = lbs_hard_start_xmit,
364 .ndo_set_mac_address = lbs_set_mac_address,
365 .ndo_set_multicast_list = lbs_set_multicast_list,
366};
367
368/**
369 * lbs_add_mesh - add mshX interface
370 *
371 * @priv: A pointer to the &struct lbs_private structure
372 * returns: 0 if successful, -X otherwise
373 */
374int lbs_add_mesh(struct lbs_private *priv)
375{
376 struct net_device *mesh_dev = NULL;
377 int ret = 0;
378
379 lbs_deb_enter(LBS_DEB_MESH);
380
381 /* Allocate a virtual mesh device */
382 mesh_dev = alloc_netdev(0, "msh%d", ether_setup);
383 if (!mesh_dev) {
384 lbs_deb_mesh("init mshX device failed\n");
385 ret = -ENOMEM;
386 goto done;
387 }
388 mesh_dev->ml_priv = priv;
389 priv->mesh_dev = mesh_dev;
390
391 mesh_dev->netdev_ops = &mesh_netdev_ops;
392 mesh_dev->ethtool_ops = &lbs_ethtool_ops;
393 memcpy(mesh_dev->dev_addr, priv->dev->dev_addr, ETH_ALEN);
394
395 SET_NETDEV_DEV(priv->mesh_dev, priv->dev->dev.parent);
396
397 mesh_dev->flags |= IFF_BROADCAST | IFF_MULTICAST;
398 /* Register virtual mesh interface */
399 ret = register_netdev(mesh_dev);
400 if (ret) {
401 pr_err("cannot register mshX virtual interface\n");
402 goto err_free;
403 }
404
405 ret = sysfs_create_group(&(mesh_dev->dev.kobj), &lbs_mesh_attr_group);
406 if (ret)
407 goto err_unregister;
408
409 lbs_persist_config_init(mesh_dev);
410
411 /* Everything successful */
412 ret = 0;
413 goto done;
414
415err_unregister:
416 unregister_netdev(mesh_dev);
417
418err_free:
419 free_netdev(mesh_dev);
420
421done:
422 lbs_deb_leave_args(LBS_DEB_MESH, "ret %d", ret);
423 return ret;
424}
425
426void lbs_remove_mesh(struct lbs_private *priv)
427{
428 struct net_device *mesh_dev;
429
430 mesh_dev = priv->mesh_dev;
431 if (!mesh_dev)
432 return;
433
434 lbs_deb_enter(LBS_DEB_MESH);
435 netif_stop_queue(mesh_dev);
436 netif_carrier_off(mesh_dev);
437 sysfs_remove_group(&(mesh_dev->dev.kobj), &lbs_mesh_attr_group);
438 lbs_persist_config_remove(mesh_dev);
439 unregister_netdev(mesh_dev);
440 priv->mesh_dev = NULL;
441 free_netdev(mesh_dev);
442 lbs_deb_leave(LBS_DEB_MESH);
443}
444
445
446
447/***************************************************************************
448 * Sending and receiving
449 */
450struct net_device *lbs_mesh_set_dev(struct lbs_private *priv,
451 struct net_device *dev, struct rxpd *rxpd)
452{
453 if (priv->mesh_dev) {
454 if (priv->mesh_tlv == TLV_TYPE_OLD_MESH_ID) {
455 if (rxpd->rx_control & RxPD_MESH_FRAME)
456 dev = priv->mesh_dev;
457 } else if (priv->mesh_tlv == TLV_TYPE_MESH_ID) {
458 if (rxpd->u.bss.bss_num == MESH_IFACE_ID)
459 dev = priv->mesh_dev;
460 }
461 }
462 return dev;
463}
464
465
466void lbs_mesh_set_txpd(struct lbs_private *priv,
467 struct net_device *dev, struct txpd *txpd)
468{
469 if (dev == priv->mesh_dev) {
470 if (priv->mesh_tlv == TLV_TYPE_OLD_MESH_ID)
471 txpd->tx_control |= cpu_to_le32(TxPD_MESH_FRAME);
472 else if (priv->mesh_tlv == TLV_TYPE_MESH_ID)
473 txpd->u.bss.bss_num = MESH_IFACE_ID;
474 }
475}
476
477
478/***************************************************************************
479 * Mesh command handling
480 */
481
482/**
483 * lbs_mesh_bt_add_del - Add or delete Mesh Blinding Table entries
484 *
485 * @priv: A pointer to &struct lbs_private structure
486 * @add: TRUE to add the entry, FALSE to delete it
487 * @addr1: Destination address to blind or unblind
488 *
489 * returns: 0 on success, error on failure
490 */
491int lbs_mesh_bt_add_del(struct lbs_private *priv, bool add, u8 *addr1)
492{
493 struct cmd_ds_bt_access cmd;
494 int ret = 0;
495
496 lbs_deb_enter(LBS_DEB_CMD);
497
498 BUG_ON(addr1 == NULL);
499
500 memset(&cmd, 0, sizeof(cmd));
501 cmd.hdr.size = cpu_to_le16(sizeof(cmd));
502 memcpy(cmd.addr1, addr1, ETH_ALEN);
503 if (add) {
504 cmd.action = cpu_to_le16(CMD_ACT_BT_ACCESS_ADD);
505 lbs_deb_hex(LBS_DEB_MESH, "BT_ADD: blinded MAC addr",
506 addr1, ETH_ALEN);
507 } else {
508 cmd.action = cpu_to_le16(CMD_ACT_BT_ACCESS_DEL);
509 lbs_deb_hex(LBS_DEB_MESH, "BT_DEL: blinded MAC addr",
510 addr1, ETH_ALEN);
511 }
512
513 ret = lbs_cmd_with_response(priv, CMD_BT_ACCESS, &cmd);
514
515 lbs_deb_leave_args(LBS_DEB_CMD, "ret %d", ret);
516 return ret;
517}
518
519/**
520 * lbs_mesh_bt_reset - Reset/clear the mesh blinding table
521 *
522 * @priv: A pointer to &struct lbs_private structure
523 *
524 * returns: 0 on success, error on failure
525 */
526int lbs_mesh_bt_reset(struct lbs_private *priv)
527{
528 struct cmd_ds_bt_access cmd;
529 int ret = 0;
530
531 lbs_deb_enter(LBS_DEB_CMD);
532
533 memset(&cmd, 0, sizeof(cmd));
534 cmd.hdr.size = cpu_to_le16(sizeof(cmd));
535 cmd.action = cpu_to_le16(CMD_ACT_BT_ACCESS_RESET);
536
537 ret = lbs_cmd_with_response(priv, CMD_BT_ACCESS, &cmd);
538
539 lbs_deb_leave_args(LBS_DEB_CMD, "ret %d", ret);
540 return ret;
541}
542
543/**
544 * lbs_mesh_bt_get_inverted - Gets the inverted status of the mesh
545 * blinding table
546 *
547 * Normally the firmware "blinds" or ignores traffic from mesh nodes in the
548 * table, but an inverted table allows *only* traffic from nodes listed in
549 * the table.
550 *
551 * @priv: A pointer to &struct lbs_private structure
552 * @inverted: On success, TRUE if the blinding table is inverted,
553 * FALSE if it is not inverted
554 *
555 * returns: 0 on success, error on failure
556 */
557int lbs_mesh_bt_get_inverted(struct lbs_private *priv, bool *inverted)
558{
559 struct cmd_ds_bt_access cmd;
560 int ret = 0;
561
562 lbs_deb_enter(LBS_DEB_CMD);
563
564 BUG_ON(inverted == NULL);
565
566 memset(&cmd, 0, sizeof(cmd));
567 cmd.hdr.size = cpu_to_le16(sizeof(cmd));
568 cmd.action = cpu_to_le16(CMD_ACT_BT_ACCESS_GET_INVERT);
569
570 ret = lbs_cmd_with_response(priv, CMD_BT_ACCESS, &cmd);
571 if (ret == 0)
572 *inverted = !!cmd.id;
573
574 lbs_deb_leave_args(LBS_DEB_CMD, "ret %d", ret);
575 return ret;
576}
577
578/**
579 * lbs_mesh_bt_set_inverted - Sets the inverted status of the mesh
580 * blinding table
581 *
582 * Normally the firmware "blinds" or ignores traffic from mesh nodes in the
583 * table, but an inverted table allows *only* traffic from nodes listed in
584 * the table.
585 *
586 * @priv: A pointer to &struct lbs_private structure
587 * @inverted: TRUE to invert the blinding table (only traffic from
588 * listed nodes allowed), FALSE to return it
589 * to normal state (listed nodes ignored)
590 *
591 * returns: 0 on success, error on failure
592 */
593int lbs_mesh_bt_set_inverted(struct lbs_private *priv, bool inverted)
594{
595 struct cmd_ds_bt_access cmd;
596 int ret = 0;
597
598 lbs_deb_enter(LBS_DEB_CMD);
599
600 memset(&cmd, 0, sizeof(cmd));
601 cmd.hdr.size = cpu_to_le16(sizeof(cmd));
602 cmd.action = cpu_to_le16(CMD_ACT_BT_ACCESS_SET_INVERT);
603 cmd.id = cpu_to_le32(!!inverted);
604
605 ret = lbs_cmd_with_response(priv, CMD_BT_ACCESS, &cmd);
606
607 lbs_deb_leave_args(LBS_DEB_CMD, "ret %d", ret);
608 return ret;
609}
610
611/**
612 * lbs_mesh_bt_get_entry - List an entry in the mesh blinding table
613 *
614 * @priv: A pointer to &struct lbs_private structure
615 * @id: The ID of the entry to list
616 * @addr1: MAC address associated with the table entry
617 *
618 * returns: 0 on success, error on failure
619 */
620int lbs_mesh_bt_get_entry(struct lbs_private *priv, u32 id, u8 *addr1)
621{
622 struct cmd_ds_bt_access cmd;
623 int ret = 0;
624
625 lbs_deb_enter(LBS_DEB_CMD);
626
627 BUG_ON(addr1 == NULL);
628
629 memset(&cmd, 0, sizeof(cmd));
630 cmd.hdr.size = cpu_to_le16(sizeof(cmd));
631 cmd.action = cpu_to_le16(CMD_ACT_BT_ACCESS_SET_INVERT);
632 cmd.id = cpu_to_le32(id);
633
634 ret = lbs_cmd_with_response(priv, CMD_BT_ACCESS, &cmd);
635 if (ret == 0)
636 memcpy(addr1, cmd.addr1, sizeof(cmd.addr1));
637
638 lbs_deb_leave_args(LBS_DEB_CMD, "ret %d", ret);
639 return ret;
640}
641
642/**
643 * lbs_cmd_fwt_access - Access the mesh forwarding table
644 *
645 * @priv: A pointer to &struct lbs_private structure
646 * @cmd_action: The forwarding table action to perform
647 * @cmd: The pre-filled FWT_ACCESS command
648 *
649 * returns: 0 on success and 'cmd' will be filled with the
650 * firmware's response
651 */
652int lbs_cmd_fwt_access(struct lbs_private *priv, u16 cmd_action,
653 struct cmd_ds_fwt_access *cmd)
654{
655 int ret;
656
657 lbs_deb_enter_args(LBS_DEB_CMD, "action %d", cmd_action);
658
659 cmd->hdr.command = cpu_to_le16(CMD_FWT_ACCESS);
660 cmd->hdr.size = cpu_to_le16(sizeof(struct cmd_ds_fwt_access));
661 cmd->hdr.result = 0;
662 cmd->action = cpu_to_le16(cmd_action);
663
664 ret = lbs_cmd_with_response(priv, CMD_FWT_ACCESS, cmd);
665
666 lbs_deb_leave_args(LBS_DEB_CMD, "ret %d", ret);
667 return 0;
668}
669
670int lbs_mesh_access(struct lbs_private *priv, uint16_t cmd_action,
671 struct cmd_ds_mesh_access *cmd)
672{
673 int ret;
674
675 lbs_deb_enter_args(LBS_DEB_CMD, "action %d", cmd_action);
676
677 cmd->hdr.command = cpu_to_le16(CMD_MESH_ACCESS);
678 cmd->hdr.size = cpu_to_le16(sizeof(*cmd));
679 cmd->hdr.result = 0;
680
681 cmd->action = cpu_to_le16(cmd_action);
682
683 ret = lbs_cmd_with_response(priv, CMD_MESH_ACCESS, cmd);
684
685 lbs_deb_leave(LBS_DEB_CMD);
686 return ret;
687}
688
689static int __lbs_mesh_config_send(struct lbs_private *priv,
690 struct cmd_ds_mesh_config *cmd,
691 uint16_t action, uint16_t type)
692{
693 int ret;
694 u16 command = CMD_MESH_CONFIG_OLD;
695
696 lbs_deb_enter(LBS_DEB_CMD);
697
698 /*
699 * Command id is 0xac for v10 FW along with mesh interface
700 * id in bits 14-13-12.
701 */
702 if (priv->mesh_tlv == TLV_TYPE_MESH_ID)
703 command = CMD_MESH_CONFIG |
704 (MESH_IFACE_ID << MESH_IFACE_BIT_OFFSET);
705
706 cmd->hdr.command = cpu_to_le16(command);
707 cmd->hdr.size = cpu_to_le16(sizeof(struct cmd_ds_mesh_config));
708 cmd->hdr.result = 0;
709
710 cmd->type = cpu_to_le16(type);
711 cmd->action = cpu_to_le16(action);
712
713 ret = lbs_cmd_with_response(priv, command, cmd);
714
715 lbs_deb_leave(LBS_DEB_CMD);
716 return ret;
717}
718
719int lbs_mesh_config_send(struct lbs_private *priv,
720 struct cmd_ds_mesh_config *cmd,
721 uint16_t action, uint16_t type)
722{
723 int ret;
724
725 if (!(priv->fwcapinfo & FW_CAPINFO_PERSISTENT_CONFIG))
726 return -EOPNOTSUPP;
727
728 ret = __lbs_mesh_config_send(priv, cmd, action, type);
729 return ret;
730}
731
732/* This function is the CMD_MESH_CONFIG legacy function. It only handles the
733 * START and STOP actions. The extended actions supported by CMD_MESH_CONFIG
734 * are all handled by preparing a struct cmd_ds_mesh_config and passing it to
735 * lbs_mesh_config_send.
736 */
737int lbs_mesh_config(struct lbs_private *priv, uint16_t action, uint16_t chan)
738{
739 struct cmd_ds_mesh_config cmd;
740 struct mrvl_meshie *ie;
741 DECLARE_SSID_BUF(ssid);
742
743 memset(&cmd, 0, sizeof(cmd));
744 cmd.channel = cpu_to_le16(chan);
745 ie = (struct mrvl_meshie *)cmd.data;
746
747 switch (action) {
748 case CMD_ACT_MESH_CONFIG_START:
749 ie->id = WLAN_EID_GENERIC;
750 ie->val.oui[0] = 0x00;
751 ie->val.oui[1] = 0x50;
752 ie->val.oui[2] = 0x43;
753 ie->val.type = MARVELL_MESH_IE_TYPE;
754 ie->val.subtype = MARVELL_MESH_IE_SUBTYPE;
755 ie->val.version = MARVELL_MESH_IE_VERSION;
756 ie->val.active_protocol_id = MARVELL_MESH_PROTO_ID_HWMP;
757 ie->val.active_metric_id = MARVELL_MESH_METRIC_ID;
758 ie->val.mesh_capability = MARVELL_MESH_CAPABILITY;
759 ie->val.mesh_id_len = priv->mesh_ssid_len;
760 memcpy(ie->val.mesh_id, priv->mesh_ssid, priv->mesh_ssid_len);
761 ie->len = sizeof(struct mrvl_meshie_val) -
762 IEEE80211_MAX_SSID_LEN + priv->mesh_ssid_len;
763 cmd.length = cpu_to_le16(sizeof(struct mrvl_meshie_val));
764 break;
765 case CMD_ACT_MESH_CONFIG_STOP:
766 break;
767 default:
768 return -1;
769 }
770 lbs_deb_cmd("mesh config action %d type %x channel %d SSID %s\n",
771 action, priv->mesh_tlv, chan,
772 print_ssid(ssid, priv->mesh_ssid, priv->mesh_ssid_len));
773
774 return __lbs_mesh_config_send(priv, &cmd, action, priv->mesh_tlv);
775}
776
777
778
779/*************************************************************************** 317/***************************************************************************
780 * Persistent configuration support 318 * Persistent configuration support
781 */ 319 */
@@ -1232,7 +770,7 @@ static struct attribute *boot_opts_attrs[] = {
1232 NULL 770 NULL
1233}; 771};
1234 772
1235static struct attribute_group boot_opts_group = { 773static const struct attribute_group boot_opts_group = {
1236 .name = "boot_options", 774 .name = "boot_options",
1237 .attrs = boot_opts_attrs, 775 .attrs = boot_opts_attrs,
1238}; 776};
@@ -1245,31 +783,299 @@ static struct attribute *mesh_ie_attrs[] = {
1245 NULL 783 NULL
1246}; 784};
1247 785
1248static struct attribute_group mesh_ie_group = { 786static const struct attribute_group mesh_ie_group = {
1249 .name = "mesh_ie", 787 .name = "mesh_ie",
1250 .attrs = mesh_ie_attrs, 788 .attrs = mesh_ie_attrs,
1251}; 789};
1252 790
1253void lbs_persist_config_init(struct net_device *dev) 791static void lbs_persist_config_init(struct net_device *dev)
1254{ 792{
1255 int ret; 793 int ret;
1256 ret = sysfs_create_group(&(dev->dev.kobj), &boot_opts_group); 794 ret = sysfs_create_group(&(dev->dev.kobj), &boot_opts_group);
1257 ret = sysfs_create_group(&(dev->dev.kobj), &mesh_ie_group); 795 ret = sysfs_create_group(&(dev->dev.kobj), &mesh_ie_group);
1258} 796}
1259 797
1260void lbs_persist_config_remove(struct net_device *dev) 798static void lbs_persist_config_remove(struct net_device *dev)
1261{ 799{
1262 sysfs_remove_group(&(dev->dev.kobj), &boot_opts_group); 800 sysfs_remove_group(&(dev->dev.kobj), &boot_opts_group);
1263 sysfs_remove_group(&(dev->dev.kobj), &mesh_ie_group); 801 sysfs_remove_group(&(dev->dev.kobj), &mesh_ie_group);
1264} 802}
1265 803
1266 804
805/***************************************************************************
806 * Initializing and starting, stopping mesh
807 */
808
809/*
810 * Check mesh FW version and appropriately send the mesh start
811 * command
812 */
813int lbs_init_mesh(struct lbs_private *priv)
814{
815 struct net_device *dev = priv->dev;
816 int ret = 0;
817
818 lbs_deb_enter(LBS_DEB_MESH);
819
820 /* Determine mesh_fw_ver from fwrelease and fwcapinfo */
821 /* 5.0.16p0 9.0.0.p0 is known to NOT support any mesh */
822 /* 5.110.22 have mesh command with 0xa3 command id */
823 /* 10.0.0.p0 FW brings in mesh config command with different id */
824 /* Check FW version MSB and initialize mesh_fw_ver */
825 if (MRVL_FW_MAJOR_REV(priv->fwrelease) == MRVL_FW_V5) {
826 /* Enable mesh, if supported, and work out which TLV it uses.
827 0x100 + 291 is an unofficial value used in 5.110.20.pXX
828 0x100 + 37 is the official value used in 5.110.21.pXX
829 but we check them in that order because 20.pXX doesn't
830 give an error -- it just silently fails. */
831
832 /* 5.110.20.pXX firmware will fail the command if the channel
833 doesn't match the existing channel. But only if the TLV
834 is correct. If the channel is wrong, _BOTH_ versions will
835 give an error to 0x100+291, and allow 0x100+37 to succeed.
836 It's just that 5.110.20.pXX will not have done anything
837 useful */
838
839 priv->mesh_tlv = TLV_TYPE_OLD_MESH_ID;
840 if (lbs_mesh_config(priv, CMD_ACT_MESH_CONFIG_START,
841 priv->channel)) {
842 priv->mesh_tlv = TLV_TYPE_MESH_ID;
843 if (lbs_mesh_config(priv, CMD_ACT_MESH_CONFIG_START,
844 priv->channel))
845 priv->mesh_tlv = 0;
846 }
847 } else
848 if ((MRVL_FW_MAJOR_REV(priv->fwrelease) >= MRVL_FW_V10) &&
849 (priv->fwcapinfo & MESH_CAPINFO_ENABLE_MASK)) {
850 /* 10.0.0.pXX new firmwares should succeed with TLV
851 * 0x100+37; Do not invoke command with old TLV.
852 */
853 priv->mesh_tlv = TLV_TYPE_MESH_ID;
854 if (lbs_mesh_config(priv, CMD_ACT_MESH_CONFIG_START,
855 priv->channel))
856 priv->mesh_tlv = 0;
857 }
858
859 /* Stop meshing until interface is brought up */
860 lbs_mesh_config(priv, CMD_ACT_MESH_CONFIG_STOP, priv->channel);
861
862 if (priv->mesh_tlv) {
863 sprintf(priv->mesh_ssid, "mesh");
864 priv->mesh_ssid_len = 4;
865
866 lbs_add_mesh(priv);
867
868 if (device_create_file(&dev->dev, &dev_attr_lbs_mesh))
869 netdev_err(dev, "cannot register lbs_mesh attribute\n");
870
871 ret = 1;
872 }
873
874 lbs_deb_leave_args(LBS_DEB_MESH, "ret %d", ret);
875 return ret;
876}
877
878
879int lbs_deinit_mesh(struct lbs_private *priv)
880{
881 struct net_device *dev = priv->dev;
882 int ret = 0;
883
884 lbs_deb_enter(LBS_DEB_MESH);
885
886 if (priv->mesh_tlv) {
887 device_remove_file(&dev->dev, &dev_attr_lbs_mesh);
888 ret = 1;
889 }
890
891 lbs_deb_leave_args(LBS_DEB_MESH, "ret %d", ret);
892 return ret;
893}
894
895
896/**
897 * lbs_mesh_stop - close the mshX interface
898 *
899 * @dev: A pointer to &net_device structure
900 * returns: 0
901 */
902static int lbs_mesh_stop(struct net_device *dev)
903{
904 struct lbs_private *priv = dev->ml_priv;
905
906 lbs_deb_enter(LBS_DEB_MESH);
907 lbs_mesh_config(priv, CMD_ACT_MESH_CONFIG_STOP, priv->channel);
908
909 spin_lock_irq(&priv->driver_lock);
910
911 netif_stop_queue(dev);
912 netif_carrier_off(dev);
913
914 spin_unlock_irq(&priv->driver_lock);
915
916 schedule_work(&priv->mcast_work);
917
918 lbs_deb_leave(LBS_DEB_MESH);
919 return 0;
920}
921
922/**
923 * lbs_mesh_dev_open - open the mshX interface
924 *
925 * @dev: A pointer to &net_device structure
926 * returns: 0 or -EBUSY if monitor mode active
927 */
928static int lbs_mesh_dev_open(struct net_device *dev)
929{
930 struct lbs_private *priv = dev->ml_priv;
931 int ret = 0;
932
933 lbs_deb_enter(LBS_DEB_NET);
934
935 spin_lock_irq(&priv->driver_lock);
936
937 if (priv->wdev->iftype == NL80211_IFTYPE_MONITOR) {
938 ret = -EBUSY;
939 spin_unlock_irq(&priv->driver_lock);
940 goto out;
941 }
942
943 netif_carrier_on(dev);
944
945 if (!priv->tx_pending_len)
946 netif_wake_queue(dev);
947
948 spin_unlock_irq(&priv->driver_lock);
949
950 ret = lbs_mesh_config(priv, CMD_ACT_MESH_CONFIG_START, priv->channel);
951
952out:
953 lbs_deb_leave_args(LBS_DEB_NET, "ret %d", ret);
954 return ret;
955}
956
957static const struct net_device_ops mesh_netdev_ops = {
958 .ndo_open = lbs_mesh_dev_open,
959 .ndo_stop = lbs_mesh_stop,
960 .ndo_start_xmit = lbs_hard_start_xmit,
961 .ndo_set_mac_address = lbs_set_mac_address,
962 .ndo_set_multicast_list = lbs_set_multicast_list,
963};
964
965/**
966 * lbs_add_mesh - add mshX interface
967 *
968 * @priv: A pointer to the &struct lbs_private structure
969 * returns: 0 if successful, -X otherwise
970 */
971static int lbs_add_mesh(struct lbs_private *priv)
972{
973 struct net_device *mesh_dev = NULL;
974 int ret = 0;
975
976 lbs_deb_enter(LBS_DEB_MESH);
977
978 /* Allocate a virtual mesh device */
979 mesh_dev = alloc_netdev(0, "msh%d", ether_setup);
980 if (!mesh_dev) {
981 lbs_deb_mesh("init mshX device failed\n");
982 ret = -ENOMEM;
983 goto done;
984 }
985 mesh_dev->ml_priv = priv;
986 priv->mesh_dev = mesh_dev;
987
988 mesh_dev->netdev_ops = &mesh_netdev_ops;
989 mesh_dev->ethtool_ops = &lbs_ethtool_ops;
990 memcpy(mesh_dev->dev_addr, priv->dev->dev_addr, ETH_ALEN);
991
992 SET_NETDEV_DEV(priv->mesh_dev, priv->dev->dev.parent);
993
994 mesh_dev->flags |= IFF_BROADCAST | IFF_MULTICAST;
995 /* Register virtual mesh interface */
996 ret = register_netdev(mesh_dev);
997 if (ret) {
998 pr_err("cannot register mshX virtual interface\n");
999 goto err_free;
1000 }
1001
1002 ret = sysfs_create_group(&(mesh_dev->dev.kobj), &lbs_mesh_attr_group);
1003 if (ret)
1004 goto err_unregister;
1005
1006 lbs_persist_config_init(mesh_dev);
1007
1008 /* Everything successful */
1009 ret = 0;
1010 goto done;
1011
1012err_unregister:
1013 unregister_netdev(mesh_dev);
1014
1015err_free:
1016 free_netdev(mesh_dev);
1017
1018done:
1019 lbs_deb_leave_args(LBS_DEB_MESH, "ret %d", ret);
1020 return ret;
1021}
1022
1023void lbs_remove_mesh(struct lbs_private *priv)
1024{
1025 struct net_device *mesh_dev;
1026
1027 mesh_dev = priv->mesh_dev;
1028 if (!mesh_dev)
1029 return;
1030
1031 lbs_deb_enter(LBS_DEB_MESH);
1032 netif_stop_queue(mesh_dev);
1033 netif_carrier_off(mesh_dev);
1034 sysfs_remove_group(&(mesh_dev->dev.kobj), &lbs_mesh_attr_group);
1035 lbs_persist_config_remove(mesh_dev);
1036 unregister_netdev(mesh_dev);
1037 priv->mesh_dev = NULL;
1038 free_netdev(mesh_dev);
1039 lbs_deb_leave(LBS_DEB_MESH);
1040}
1041
1042
1043/***************************************************************************
1044 * Sending and receiving
1045 */
1046struct net_device *lbs_mesh_set_dev(struct lbs_private *priv,
1047 struct net_device *dev, struct rxpd *rxpd)
1048{
1049 if (priv->mesh_dev) {
1050 if (priv->mesh_tlv == TLV_TYPE_OLD_MESH_ID) {
1051 if (rxpd->rx_control & RxPD_MESH_FRAME)
1052 dev = priv->mesh_dev;
1053 } else if (priv->mesh_tlv == TLV_TYPE_MESH_ID) {
1054 if (rxpd->u.bss.bss_num == MESH_IFACE_ID)
1055 dev = priv->mesh_dev;
1056 }
1057 }
1058 return dev;
1059}
1060
1061
1062void lbs_mesh_set_txpd(struct lbs_private *priv,
1063 struct net_device *dev, struct txpd *txpd)
1064{
1065 if (dev == priv->mesh_dev) {
1066 if (priv->mesh_tlv == TLV_TYPE_OLD_MESH_ID)
1067 txpd->tx_control |= cpu_to_le32(TxPD_MESH_FRAME);
1068 else if (priv->mesh_tlv == TLV_TYPE_MESH_ID)
1069 txpd->u.bss.bss_num = MESH_IFACE_ID;
1070 }
1071}
1072
1267 1073
1268/*************************************************************************** 1074/***************************************************************************
1269 * Ethtool related 1075 * Ethtool related
1270 */ 1076 */
1271 1077
1272static const char *mesh_stat_strings[] = { 1078static const char * const mesh_stat_strings[] = {
1273 "drop_duplicate_bcast", 1079 "drop_duplicate_bcast",
1274 "drop_ttl_zero", 1080 "drop_ttl_zero",
1275 "drop_no_fwd_route", 1081 "drop_no_fwd_route",
diff --git a/drivers/net/wireless/libertas/mesh.h b/drivers/net/wireless/libertas/mesh.h
index ee95c73ed5f4..50144913f2ab 100644
--- a/drivers/net/wireless/libertas/mesh.h
+++ b/drivers/net/wireless/libertas/mesh.h
@@ -31,7 +31,6 @@ struct lbs_private;
31int lbs_init_mesh(struct lbs_private *priv); 31int lbs_init_mesh(struct lbs_private *priv);
32int lbs_deinit_mesh(struct lbs_private *priv); 32int lbs_deinit_mesh(struct lbs_private *priv);
33 33
34int lbs_add_mesh(struct lbs_private *priv);
35void lbs_remove_mesh(struct lbs_private *priv); 34void lbs_remove_mesh(struct lbs_private *priv);
36 35
37 36
@@ -52,29 +51,6 @@ struct cmd_ds_command;
52struct cmd_ds_mesh_access; 51struct cmd_ds_mesh_access;
53struct cmd_ds_mesh_config; 52struct cmd_ds_mesh_config;
54 53
55int lbs_mesh_bt_add_del(struct lbs_private *priv, bool add, u8 *addr1);
56int lbs_mesh_bt_reset(struct lbs_private *priv);
57int lbs_mesh_bt_get_inverted(struct lbs_private *priv, bool *inverted);
58int lbs_mesh_bt_set_inverted(struct lbs_private *priv, bool inverted);
59int lbs_mesh_bt_get_entry(struct lbs_private *priv, u32 id, u8 *addr1);
60
61int lbs_cmd_fwt_access(struct lbs_private *priv, u16 cmd_action,
62 struct cmd_ds_fwt_access *cmd);
63
64int lbs_mesh_access(struct lbs_private *priv, uint16_t cmd_action,
65 struct cmd_ds_mesh_access *cmd);
66int lbs_mesh_config_send(struct lbs_private *priv,
67 struct cmd_ds_mesh_config *cmd,
68 uint16_t action, uint16_t type);
69int lbs_mesh_config(struct lbs_private *priv, uint16_t enable, uint16_t chan);
70
71
72
73/* Persistent configuration */
74
75void lbs_persist_config_init(struct net_device *net);
76void lbs_persist_config_remove(struct net_device *net);
77
78 54
79/* Ethtool statistics */ 55/* Ethtool statistics */
80 56
@@ -87,11 +63,6 @@ void lbs_mesh_ethtool_get_strings(struct net_device *dev,
87 uint32_t stringset, uint8_t *s); 63 uint32_t stringset, uint8_t *s);
88 64
89 65
90/* Accessors */
91
92#define lbs_mesh_open(priv) (priv->mesh_open)
93#define lbs_mesh_connected(priv) (priv->mesh_connect_status == LBS_CONNECTED)
94
95#else 66#else
96 67
97#define lbs_init_mesh(priv) 68#define lbs_init_mesh(priv)
@@ -101,8 +72,6 @@ void lbs_mesh_ethtool_get_strings(struct net_device *dev,
101#define lbs_mesh_set_dev(priv, dev, rxpd) (dev) 72#define lbs_mesh_set_dev(priv, dev, rxpd) (dev)
102#define lbs_mesh_set_txpd(priv, dev, txpd) 73#define lbs_mesh_set_txpd(priv, dev, txpd)
103#define lbs_mesh_config(priv, enable, chan) 74#define lbs_mesh_config(priv, enable, chan)
104#define lbs_mesh_open(priv) (0)
105#define lbs_mesh_connected(priv) (0)
106 75
107#endif 76#endif
108 77
diff --git a/drivers/net/wireless/libertas/tx.c b/drivers/net/wireless/libertas/tx.c
index f19495b178f6..a6e85134cfe1 100644
--- a/drivers/net/wireless/libertas/tx.c
+++ b/drivers/net/wireless/libertas/tx.c
@@ -199,7 +199,7 @@ void lbs_send_tx_feedback(struct lbs_private *priv, u32 try_count)
199 if (priv->connect_status == LBS_CONNECTED) 199 if (priv->connect_status == LBS_CONNECTED)
200 netif_wake_queue(priv->dev); 200 netif_wake_queue(priv->dev);
201 201
202 if (priv->mesh_dev && lbs_mesh_connected(priv)) 202 if (priv->mesh_dev && netif_running(priv->mesh_dev))
203 netif_wake_queue(priv->mesh_dev); 203 netif_wake_queue(priv->mesh_dev);
204} 204}
205EXPORT_SYMBOL_GPL(lbs_send_tx_feedback); 205EXPORT_SYMBOL_GPL(lbs_send_tx_feedback);
diff --git a/drivers/net/wireless/mwifiex/debugfs.c b/drivers/net/wireless/mwifiex/debugfs.c
index 1bcf9eaa107d..d26a78b6b3c4 100644
--- a/drivers/net/wireless/mwifiex/debugfs.c
+++ b/drivers/net/wireless/mwifiex/debugfs.c
@@ -216,28 +216,19 @@ mwifiex_info_read(struct file *file, char __user *ubuf,
216 p += sprintf(p, "bss_mode=\"%s\"\n", bss_modes[info.bss_mode]); 216 p += sprintf(p, "bss_mode=\"%s\"\n", bss_modes[info.bss_mode]);
217 p += sprintf(p, "media_state=\"%s\"\n", 217 p += sprintf(p, "media_state=\"%s\"\n",
218 (!priv->media_connected ? "Disconnected" : "Connected")); 218 (!priv->media_connected ? "Disconnected" : "Connected"));
219 p += sprintf(p, "mac_address=\"%02x:%02x:%02x:%02x:%02x:%02x\"\n", 219 p += sprintf(p, "mac_address=\"%pM\"\n", netdev->dev_addr);
220 netdev->dev_addr[0], netdev->dev_addr[1],
221 netdev->dev_addr[2], netdev->dev_addr[3],
222 netdev->dev_addr[4], netdev->dev_addr[5]);
223 220
224 if (GET_BSS_ROLE(priv) == MWIFIEX_BSS_ROLE_STA) { 221 if (GET_BSS_ROLE(priv) == MWIFIEX_BSS_ROLE_STA) {
225 p += sprintf(p, "multicast_count=\"%d\"\n", 222 p += sprintf(p, "multicast_count=\"%d\"\n",
226 netdev_mc_count(netdev)); 223 netdev_mc_count(netdev));
227 p += sprintf(p, "essid=\"%s\"\n", info.ssid.ssid); 224 p += sprintf(p, "essid=\"%s\"\n", info.ssid.ssid);
228 p += sprintf(p, "bssid=\"%02x:%02x:%02x:%02x:%02x:%02x\"\n", 225 p += sprintf(p, "bssid=\"%pM\"\n", info.bssid);
229 info.bssid[0], info.bssid[1],
230 info.bssid[2], info.bssid[3],
231 info.bssid[4], info.bssid[5]);
232 p += sprintf(p, "channel=\"%d\"\n", (int) info.bss_chan); 226 p += sprintf(p, "channel=\"%d\"\n", (int) info.bss_chan);
233 p += sprintf(p, "region_code = \"%02x\"\n", info.region_code); 227 p += sprintf(p, "region_code = \"%02x\"\n", info.region_code);
234 228
235 netdev_for_each_mc_addr(ha, netdev) 229 netdev_for_each_mc_addr(ha, netdev)
236 p += sprintf(p, "multicast_address[%d]=" 230 p += sprintf(p, "multicast_address[%d]=\"%pM\"\n",
237 "\"%02x:%02x:%02x:%02x:%02x:%02x\"\n", i++, 231 i++, ha->addr);
238 ha->addr[0], ha->addr[1],
239 ha->addr[2], ha->addr[3],
240 ha->addr[4], ha->addr[5]);
241 } 232 }
242 233
243 p += sprintf(p, "num_tx_bytes = %lu\n", priv->stats.tx_bytes); 234 p += sprintf(p, "num_tx_bytes = %lu\n", priv->stats.tx_bytes);
@@ -451,26 +442,18 @@ mwifiex_debug_read(struct file *file, char __user *ubuf,
451 if (info.tx_tbl_num) { 442 if (info.tx_tbl_num) {
452 p += sprintf(p, "Tx BA stream table:\n"); 443 p += sprintf(p, "Tx BA stream table:\n");
453 for (i = 0; i < info.tx_tbl_num; i++) 444 for (i = 0; i < info.tx_tbl_num; i++)
454 p += sprintf(p, "tid = %d, " 445 p += sprintf(p, "tid = %d, ra = %pM\n",
455 "ra = %02x:%02x:%02x:%02x:%02x:%02x\n", 446 info.tx_tbl[i].tid, info.tx_tbl[i].ra);
456 info.tx_tbl[i].tid, info.tx_tbl[i].ra[0],
457 info.tx_tbl[i].ra[1], info.tx_tbl[i].ra[2],
458 info.tx_tbl[i].ra[3], info.tx_tbl[i].ra[4],
459 info.tx_tbl[i].ra[5]);
460 } 447 }
461 448
462 if (info.rx_tbl_num) { 449 if (info.rx_tbl_num) {
463 p += sprintf(p, "Rx reorder table:\n"); 450 p += sprintf(p, "Rx reorder table:\n");
464 for (i = 0; i < info.rx_tbl_num; i++) { 451 for (i = 0; i < info.rx_tbl_num; i++) {
465 452 p += sprintf(p, "tid = %d, ta = %pM, "
466 p += sprintf(p, "tid = %d, "
467 "ta = %02x:%02x:%02x:%02x:%02x:%02x, "
468 "start_win = %d, " 453 "start_win = %d, "
469 "win_size = %d, buffer: ", 454 "win_size = %d, buffer: ",
470 info.rx_tbl[i].tid, 455 info.rx_tbl[i].tid,
471 info.rx_tbl[i].ta[0], info.rx_tbl[i].ta[1], 456 info.rx_tbl[i].ta,
472 info.rx_tbl[i].ta[2], info.rx_tbl[i].ta[3],
473 info.rx_tbl[i].ta[4], info.rx_tbl[i].ta[5],
474 info.rx_tbl[i].start_win, 457 info.rx_tbl[i].start_win,
475 info.rx_tbl[i].win_size); 458 info.rx_tbl[i].win_size);
476 459
diff --git a/drivers/net/wireless/mwifiex/ioctl.h b/drivers/net/wireless/mwifiex/ioctl.h
index 7c1c5ee40eb9..f6bcc868562f 100644
--- a/drivers/net/wireless/mwifiex/ioctl.h
+++ b/drivers/net/wireless/mwifiex/ioctl.h
@@ -249,6 +249,7 @@ struct mwifiex_ds_hs_cfg {
249}; 249};
250 250
251#define DEEP_SLEEP_ON 1 251#define DEEP_SLEEP_ON 1
252#define DEEP_SLEEP_OFF 0
252#define DEEP_SLEEP_IDLE_TIME 100 253#define DEEP_SLEEP_IDLE_TIME 100
253#define PS_MODE_AUTO 1 254#define PS_MODE_AUTO 1
254 255
diff --git a/drivers/net/wireless/mwifiex/main.h b/drivers/net/wireless/mwifiex/main.h
index 03691c02a6e8..2215c3c97354 100644
--- a/drivers/net/wireless/mwifiex/main.h
+++ b/drivers/net/wireless/mwifiex/main.h
@@ -929,6 +929,7 @@ int mwifiex_set_hs_params(struct mwifiex_private *priv,
929 struct mwifiex_ds_hs_cfg *hscfg); 929 struct mwifiex_ds_hs_cfg *hscfg);
930int mwifiex_cancel_hs(struct mwifiex_private *priv, int cmd_type); 930int mwifiex_cancel_hs(struct mwifiex_private *priv, int cmd_type);
931int mwifiex_enable_hs(struct mwifiex_adapter *adapter); 931int mwifiex_enable_hs(struct mwifiex_adapter *adapter);
932int mwifiex_disable_auto_ds(struct mwifiex_private *priv);
932int mwifiex_get_signal_info(struct mwifiex_private *priv, 933int mwifiex_get_signal_info(struct mwifiex_private *priv,
933 struct mwifiex_ds_get_signal *signal); 934 struct mwifiex_ds_get_signal *signal);
934int mwifiex_drv_get_data_rate(struct mwifiex_private *priv, 935int mwifiex_drv_get_data_rate(struct mwifiex_private *priv,
diff --git a/drivers/net/wireless/mwifiex/sdio.c b/drivers/net/wireless/mwifiex/sdio.c
index 711fa689a95c..82098ac483b8 100644
--- a/drivers/net/wireless/mwifiex/sdio.c
+++ b/drivers/net/wireless/mwifiex/sdio.c
@@ -133,6 +133,9 @@ mwifiex_sdio_remove(struct sdio_func *func)
133 adapter->priv[i]->media_connected) 133 adapter->priv[i]->media_connected)
134 mwifiex_deauthenticate(adapter->priv[i], NULL); 134 mwifiex_deauthenticate(adapter->priv[i], NULL);
135 135
136 mwifiex_disable_auto_ds(mwifiex_get_priv(adapter,
137 MWIFIEX_BSS_ROLE_ANY));
138
136 mwifiex_init_shutdown_fw(mwifiex_get_priv(adapter, 139 mwifiex_init_shutdown_fw(mwifiex_get_priv(adapter,
137 MWIFIEX_BSS_ROLE_ANY), 140 MWIFIEX_BSS_ROLE_ANY),
138 MWIFIEX_FUNC_SHUTDOWN); 141 MWIFIEX_FUNC_SHUTDOWN);
@@ -1319,7 +1322,7 @@ static int mwifiex_host_to_card_mp_aggr(struct mwifiex_adapter *adapter,
1319 if (!(card->mp_wr_bitmap & 1322 if (!(card->mp_wr_bitmap &
1320 (1 << card->curr_wr_port)) 1323 (1 << card->curr_wr_port))
1321 || !MP_TX_AGGR_BUF_HAS_ROOM( 1324 || !MP_TX_AGGR_BUF_HAS_ROOM(
1322 card, next_pkt_len)) 1325 card, pkt_len + next_pkt_len))
1323 f_send_aggr_buf = 1; 1326 f_send_aggr_buf = 1;
1324 } else { 1327 } else {
1325 /* No room in Aggr buf, send it */ 1328 /* No room in Aggr buf, send it */
diff --git a/drivers/net/wireless/mwifiex/sta_ioctl.c b/drivers/net/wireless/mwifiex/sta_ioctl.c
index d05907d05039..c34ff8c4f4f8 100644
--- a/drivers/net/wireless/mwifiex/sta_ioctl.c
+++ b/drivers/net/wireless/mwifiex/sta_ioctl.c
@@ -487,6 +487,20 @@ int mwifiex_set_radio_band_cfg(struct mwifiex_private *priv,
487} 487}
488 488
489/* 489/*
490 * The function disables auto deep sleep mode.
491 */
492int mwifiex_disable_auto_ds(struct mwifiex_private *priv)
493{
494 struct mwifiex_ds_auto_ds auto_ds;
495
496 auto_ds.auto_ds = DEEP_SLEEP_OFF;
497
498 return mwifiex_send_cmd_sync(priv, HostCmd_CMD_802_11_PS_MODE_ENH,
499 DIS_AUTO_PS, BITMAP_AUTO_DS, &auto_ds);
500}
501EXPORT_SYMBOL_GPL(mwifiex_disable_auto_ds);
502
503/*
490 * IOCTL request handler to set/get active channel. 504 * IOCTL request handler to set/get active channel.
491 * 505 *
492 * This function performs validity checking on channel/frequency 506 * This function performs validity checking on channel/frequency
diff --git a/drivers/net/wireless/mwifiex/wmm.c b/drivers/net/wireless/mwifiex/wmm.c
index 67b2d0b78c71..69e260b41711 100644
--- a/drivers/net/wireless/mwifiex/wmm.c
+++ b/drivers/net/wireless/mwifiex/wmm.c
@@ -634,6 +634,8 @@ mwifiex_wmm_add_buf_txqueue(struct mwifiex_adapter *adapter,
634 ra_list = NULL; 634 ra_list = NULL;
635 } else { 635 } else {
636 memcpy(ra, skb->data, ETH_ALEN); 636 memcpy(ra, skb->data, ETH_ALEN);
637 if (ra[0] & 0x01)
638 memset(ra, 0xff, ETH_ALEN);
637 ra_list = mwifiex_wmm_get_queue_raptr(priv, tid_down, ra); 639 ra_list = mwifiex_wmm_get_queue_raptr(priv, tid_down, ra);
638 } 640 }
639 641
diff --git a/drivers/net/wireless/mwl8k.c b/drivers/net/wireless/mwl8k.c
index d633edbd9796..da36dbf8d871 100644
--- a/drivers/net/wireless/mwl8k.c
+++ b/drivers/net/wireless/mwl8k.c
@@ -1892,9 +1892,9 @@ mwl8k_txq_xmit(struct ieee80211_hw *hw, int index, struct sk_buff *skb)
1892 1892
1893 txpriority = index; 1893 txpriority = index;
1894 1894
1895 if (ieee80211_is_data_qos(wh->frame_control) && 1895 if (priv->ap_fw && sta && sta->ht_cap.ht_supported
1896 skb->protocol != cpu_to_be16(ETH_P_PAE) && 1896 && skb->protocol != cpu_to_be16(ETH_P_PAE)
1897 sta->ht_cap.ht_supported && priv->ap_fw) { 1897 && ieee80211_is_data_qos(wh->frame_control)) {
1898 tid = qos & 0xf; 1898 tid = qos & 0xf;
1899 mwl8k_tx_count_packet(sta, tid); 1899 mwl8k_tx_count_packet(sta, tid);
1900 spin_lock(&priv->stream_lock); 1900 spin_lock(&priv->stream_lock);
diff --git a/drivers/net/wireless/orinoco/airport.c b/drivers/net/wireless/orinoco/airport.c
index 4a0a0e5265c9..0ca8b1455cd9 100644
--- a/drivers/net/wireless/orinoco/airport.c
+++ b/drivers/net/wireless/orinoco/airport.c
@@ -150,7 +150,7 @@ airport_attach(struct macio_dev *mdev, const struct of_device_id *match)
150 struct orinoco_private *priv; 150 struct orinoco_private *priv;
151 struct airport *card; 151 struct airport *card;
152 unsigned long phys_addr; 152 unsigned long phys_addr;
153 hermes_t *hw; 153 struct hermes *hw;
154 154
155 if (macio_resource_count(mdev) < 1 || macio_irq_count(mdev) < 1) { 155 if (macio_resource_count(mdev) < 1 || macio_irq_count(mdev) < 1) {
156 printk(KERN_ERR PFX "Wrong interrupt/addresses in OF tree\n"); 156 printk(KERN_ERR PFX "Wrong interrupt/addresses in OF tree\n");
@@ -228,10 +228,9 @@ MODULE_AUTHOR("Benjamin Herrenschmidt <benh@kernel.crashing.org>");
228MODULE_DESCRIPTION("Driver for the Apple Airport wireless card."); 228MODULE_DESCRIPTION("Driver for the Apple Airport wireless card.");
229MODULE_LICENSE("Dual MPL/GPL"); 229MODULE_LICENSE("Dual MPL/GPL");
230 230
231static struct of_device_id airport_match[] = 231static struct of_device_id airport_match[] = {
232{
233 { 232 {
234 .name = "radio", 233 .name = "radio",
235 }, 234 },
236 {}, 235 {},
237}; 236};
@@ -240,7 +239,7 @@ MODULE_DEVICE_TABLE(of, airport_match);
240 239
241static struct macio_driver airport_driver = { 240static struct macio_driver airport_driver = {
242 .driver = { 241 .driver = {
243 .name = DRIVER_NAME, 242 .name = DRIVER_NAME,
244 .owner = THIS_MODULE, 243 .owner = THIS_MODULE,
245 .of_match_table = airport_match, 244 .of_match_table = airport_match,
246 }, 245 },
diff --git a/drivers/net/wireless/orinoco/cfg.c b/drivers/net/wireless/orinoco/cfg.c
index 736bbb9bd1d0..f7b15b8934fa 100644
--- a/drivers/net/wireless/orinoco/cfg.c
+++ b/drivers/net/wireless/orinoco/cfg.c
@@ -59,7 +59,7 @@ int orinoco_wiphy_register(struct wiphy *wiphy)
59 for (i = 0; i < NUM_CHANNELS; i++) { 59 for (i = 0; i < NUM_CHANNELS; i++) {
60 if (priv->channel_mask & (1 << i)) { 60 if (priv->channel_mask & (1 << i)) {
61 priv->channels[i].center_freq = 61 priv->channels[i].center_freq =
62 ieee80211_dsss_chan_to_freq(i+1); 62 ieee80211_dsss_chan_to_freq(i + 1);
63 channels++; 63 channels++;
64 } 64 }
65 } 65 }
@@ -182,7 +182,7 @@ static int orinoco_set_channel(struct wiphy *wiphy,
182 channel = ieee80211_freq_to_dsss_chan(chan->center_freq); 182 channel = ieee80211_freq_to_dsss_chan(chan->center_freq);
183 183
184 if ((channel < 1) || (channel > NUM_CHANNELS) || 184 if ((channel < 1) || (channel > NUM_CHANNELS) ||
185 !(priv->channel_mask & (1 << (channel-1)))) 185 !(priv->channel_mask & (1 << (channel - 1))))
186 return -EINVAL; 186 return -EINVAL;
187 187
188 if (orinoco_lock(priv, &flags) != 0) 188 if (orinoco_lock(priv, &flags) != 0)
@@ -191,7 +191,7 @@ static int orinoco_set_channel(struct wiphy *wiphy,
191 priv->channel = channel; 191 priv->channel = channel;
192 if (priv->iw_mode == NL80211_IFTYPE_MONITOR) { 192 if (priv->iw_mode == NL80211_IFTYPE_MONITOR) {
193 /* Fast channel change - no commit if successful */ 193 /* Fast channel change - no commit if successful */
194 hermes_t *hw = &priv->hw; 194 struct hermes *hw = &priv->hw;
195 err = hw->ops->cmd_wait(hw, HERMES_CMD_TEST | 195 err = hw->ops->cmd_wait(hw, HERMES_CMD_TEST |
196 HERMES_TEST_SET_CHANNEL, 196 HERMES_TEST_SET_CHANNEL,
197 channel, NULL); 197 channel, NULL);
diff --git a/drivers/net/wireless/orinoco/fw.c b/drivers/net/wireless/orinoco/fw.c
index 259d75853984..527cf5333db5 100644
--- a/drivers/net/wireless/orinoco/fw.c
+++ b/drivers/net/wireless/orinoco/fw.c
@@ -100,7 +100,7 @@ orinoco_dl_firmware(struct orinoco_private *priv,
100 /* Plug Data Area (PDA) */ 100 /* Plug Data Area (PDA) */
101 __le16 *pda; 101 __le16 *pda;
102 102
103 hermes_t *hw = &priv->hw; 103 struct hermes *hw = &priv->hw;
104 const struct firmware *fw_entry; 104 const struct firmware *fw_entry;
105 const struct orinoco_fw_header *hdr; 105 const struct orinoco_fw_header *hdr;
106 const unsigned char *first_block; 106 const unsigned char *first_block;
@@ -205,7 +205,7 @@ symbol_dl_image(struct orinoco_private *priv, const struct fw_info *fw,
205 const unsigned char *image, const void *end, 205 const unsigned char *image, const void *end,
206 int secondary) 206 int secondary)
207{ 207{
208 hermes_t *hw = &priv->hw; 208 struct hermes *hw = &priv->hw;
209 int ret = 0; 209 int ret = 0;
210 const unsigned char *ptr; 210 const unsigned char *ptr;
211 const unsigned char *first_block; 211 const unsigned char *first_block;
@@ -322,9 +322,8 @@ symbol_dl_firmware(struct orinoco_private *priv,
322 fw_entry->data + fw_entry->size, 1); 322 fw_entry->data + fw_entry->size, 1);
323 if (!orinoco_cached_fw_get(priv, false)) 323 if (!orinoco_cached_fw_get(priv, false))
324 release_firmware(fw_entry); 324 release_firmware(fw_entry);
325 if (ret) { 325 if (ret)
326 dev_err(dev, "Secondary firmware download failed\n"); 326 dev_err(dev, "Secondary firmware download failed\n");
327 }
328 327
329 return ret; 328 return ret;
330} 329}
diff --git a/drivers/net/wireless/orinoco/fw.h b/drivers/net/wireless/orinoco/fw.h
index 89fc26d25b06..aca63e3c4b5b 100644
--- a/drivers/net/wireless/orinoco/fw.h
+++ b/drivers/net/wireless/orinoco/fw.h
@@ -14,7 +14,7 @@ int orinoco_download(struct orinoco_private *priv);
14void orinoco_cache_fw(struct orinoco_private *priv, int ap); 14void orinoco_cache_fw(struct orinoco_private *priv, int ap);
15void orinoco_uncache_fw(struct orinoco_private *priv); 15void orinoco_uncache_fw(struct orinoco_private *priv);
16#else 16#else
17#define orinoco_cache_fw(priv, ap) do { } while(0) 17#define orinoco_cache_fw(priv, ap) do { } while (0)
18#define orinoco_uncache_fw(priv) do { } while (0) 18#define orinoco_uncache_fw(priv) do { } while (0)
19#endif 19#endif
20 20
diff --git a/drivers/net/wireless/orinoco/hermes.c b/drivers/net/wireless/orinoco/hermes.c
index 6c6a23e08df6..75c15bc7b34c 100644
--- a/drivers/net/wireless/orinoco/hermes.c
+++ b/drivers/net/wireless/orinoco/hermes.c
@@ -103,7 +103,7 @@ static const struct hermes_ops hermes_ops_local;
103 103
104 Callable from any context. 104 Callable from any context.
105*/ 105*/
106static int hermes_issue_cmd(hermes_t *hw, u16 cmd, u16 param0, 106static int hermes_issue_cmd(struct hermes *hw, u16 cmd, u16 param0,
107 u16 param1, u16 param2) 107 u16 param1, u16 param2)
108{ 108{
109 int k = CMD_BUSY_TIMEOUT; 109 int k = CMD_BUSY_TIMEOUT;
@@ -132,7 +132,7 @@ static int hermes_issue_cmd(hermes_t *hw, u16 cmd, u16 param0,
132 */ 132 */
133 133
134/* For doing cmds that wipe the magic constant in SWSUPPORT0 */ 134/* For doing cmds that wipe the magic constant in SWSUPPORT0 */
135static int hermes_doicmd_wait(hermes_t *hw, u16 cmd, 135static int hermes_doicmd_wait(struct hermes *hw, u16 cmd,
136 u16 parm0, u16 parm1, u16 parm2, 136 u16 parm0, u16 parm1, u16 parm2,
137 struct hermes_response *resp) 137 struct hermes_response *resp)
138{ 138{
@@ -185,7 +185,8 @@ out:
185 return err; 185 return err;
186} 186}
187 187
188void hermes_struct_init(hermes_t *hw, void __iomem *address, int reg_spacing) 188void hermes_struct_init(struct hermes *hw, void __iomem *address,
189 int reg_spacing)
189{ 190{
190 hw->iobase = address; 191 hw->iobase = address;
191 hw->reg_spacing = reg_spacing; 192 hw->reg_spacing = reg_spacing;
@@ -195,7 +196,7 @@ void hermes_struct_init(hermes_t *hw, void __iomem *address, int reg_spacing)
195} 196}
196EXPORT_SYMBOL(hermes_struct_init); 197EXPORT_SYMBOL(hermes_struct_init);
197 198
198static int hermes_init(hermes_t *hw) 199static int hermes_init(struct hermes *hw)
199{ 200{
200 u16 reg; 201 u16 reg;
201 int err = 0; 202 int err = 0;
@@ -249,7 +250,7 @@ static int hermes_init(hermes_t *hw)
249 * > 0 on error returned by the firmware 250 * > 0 on error returned by the firmware
250 * 251 *
251 * Callable from any context, but locking is your problem. */ 252 * Callable from any context, but locking is your problem. */
252static int hermes_docmd_wait(hermes_t *hw, u16 cmd, u16 parm0, 253static int hermes_docmd_wait(struct hermes *hw, u16 cmd, u16 parm0,
253 struct hermes_response *resp) 254 struct hermes_response *resp)
254{ 255{
255 int err; 256 int err;
@@ -313,7 +314,7 @@ static int hermes_docmd_wait(hermes_t *hw, u16 cmd, u16 parm0,
313 return err; 314 return err;
314} 315}
315 316
316static int hermes_allocate(hermes_t *hw, u16 size, u16 *fid) 317static int hermes_allocate(struct hermes *hw, u16 size, u16 *fid)
317{ 318{
318 int err = 0; 319 int err = 0;
319 int k; 320 int k;
@@ -363,7 +364,7 @@ static int hermes_allocate(hermes_t *hw, u16 size, u16 *fid)
363 * from firmware 364 * from firmware
364 * 365 *
365 * Callable from any context */ 366 * Callable from any context */
366static int hermes_bap_seek(hermes_t *hw, int bap, u16 id, u16 offset) 367static int hermes_bap_seek(struct hermes *hw, int bap, u16 id, u16 offset)
367{ 368{
368 int sreg = bap ? HERMES_SELECT1 : HERMES_SELECT0; 369 int sreg = bap ? HERMES_SELECT1 : HERMES_SELECT0;
369 int oreg = bap ? HERMES_OFFSET1 : HERMES_OFFSET0; 370 int oreg = bap ? HERMES_OFFSET1 : HERMES_OFFSET0;
@@ -422,7 +423,7 @@ static int hermes_bap_seek(hermes_t *hw, int bap, u16 id, u16 offset)
422 * 0 on success 423 * 0 on success
423 * > 0 on error from firmware 424 * > 0 on error from firmware
424 */ 425 */
425static int hermes_bap_pread(hermes_t *hw, int bap, void *buf, int len, 426static int hermes_bap_pread(struct hermes *hw, int bap, void *buf, int len,
426 u16 id, u16 offset) 427 u16 id, u16 offset)
427{ 428{
428 int dreg = bap ? HERMES_DATA1 : HERMES_DATA0; 429 int dreg = bap ? HERMES_DATA1 : HERMES_DATA0;
@@ -436,7 +437,7 @@ static int hermes_bap_pread(hermes_t *hw, int bap, void *buf, int len,
436 goto out; 437 goto out;
437 438
438 /* Actually do the transfer */ 439 /* Actually do the transfer */
439 hermes_read_words(hw, dreg, buf, len/2); 440 hermes_read_words(hw, dreg, buf, len / 2);
440 441
441 out: 442 out:
442 return err; 443 return err;
@@ -450,8 +451,8 @@ static int hermes_bap_pread(hermes_t *hw, int bap, void *buf, int len,
450 * 0 on success 451 * 0 on success
451 * > 0 on error from firmware 452 * > 0 on error from firmware
452 */ 453 */
453static int hermes_bap_pwrite(hermes_t *hw, int bap, const void *buf, int len, 454static int hermes_bap_pwrite(struct hermes *hw, int bap, const void *buf,
454 u16 id, u16 offset) 455 int len, u16 id, u16 offset)
455{ 456{
456 int dreg = bap ? HERMES_DATA1 : HERMES_DATA0; 457 int dreg = bap ? HERMES_DATA1 : HERMES_DATA0;
457 int err = 0; 458 int err = 0;
@@ -478,8 +479,8 @@ static int hermes_bap_pwrite(hermes_t *hw, int bap, const void *buf, int len,
478 * practice. 479 * practice.
479 * 480 *
480 * Callable from user or bh context. */ 481 * Callable from user or bh context. */
481static int hermes_read_ltv(hermes_t *hw, int bap, u16 rid, unsigned bufsize, 482static int hermes_read_ltv(struct hermes *hw, int bap, u16 rid,
482 u16 *length, void *buf) 483 unsigned bufsize, u16 *length, void *buf)
483{ 484{
484 int err = 0; 485 int err = 0;
485 int dreg = bap ? HERMES_DATA1 : HERMES_DATA0; 486 int dreg = bap ? HERMES_DATA1 : HERMES_DATA0;
@@ -523,7 +524,7 @@ static int hermes_read_ltv(hermes_t *hw, int bap, u16 rid, unsigned bufsize,
523 return 0; 524 return 0;
524} 525}
525 526
526static int hermes_write_ltv(hermes_t *hw, int bap, u16 rid, 527static int hermes_write_ltv(struct hermes *hw, int bap, u16 rid,
527 u16 length, const void *value) 528 u16 length, const void *value)
528{ 529{
529 int dreg = bap ? HERMES_DATA1 : HERMES_DATA0; 530 int dreg = bap ? HERMES_DATA1 : HERMES_DATA0;
@@ -553,14 +554,14 @@ static int hermes_write_ltv(hermes_t *hw, int bap, u16 rid,
553/*** Hermes AUX control ***/ 554/*** Hermes AUX control ***/
554 555
555static inline void 556static inline void
556hermes_aux_setaddr(hermes_t *hw, u32 addr) 557hermes_aux_setaddr(struct hermes *hw, u32 addr)
557{ 558{
558 hermes_write_reg(hw, HERMES_AUXPAGE, (u16) (addr >> 7)); 559 hermes_write_reg(hw, HERMES_AUXPAGE, (u16) (addr >> 7));
559 hermes_write_reg(hw, HERMES_AUXOFFSET, (u16) (addr & 0x7F)); 560 hermes_write_reg(hw, HERMES_AUXOFFSET, (u16) (addr & 0x7F));
560} 561}
561 562
562static inline int 563static inline int
563hermes_aux_control(hermes_t *hw, int enabled) 564hermes_aux_control(struct hermes *hw, int enabled)
564{ 565{
565 int desired_state = enabled ? HERMES_AUX_ENABLED : HERMES_AUX_DISABLED; 566 int desired_state = enabled ? HERMES_AUX_ENABLED : HERMES_AUX_DISABLED;
566 int action = enabled ? HERMES_AUX_ENABLE : HERMES_AUX_DISABLE; 567 int action = enabled ? HERMES_AUX_ENABLE : HERMES_AUX_DISABLE;
@@ -594,7 +595,7 @@ hermes_aux_control(hermes_t *hw, int enabled)
594 * wl_lkm Agere fw does 595 * wl_lkm Agere fw does
595 * Don't know about intersil 596 * Don't know about intersil
596 */ 597 */
597static int hermesi_program_init(hermes_t *hw, u32 offset) 598static int hermesi_program_init(struct hermes *hw, u32 offset)
598{ 599{
599 int err; 600 int err;
600 601
@@ -643,7 +644,7 @@ static int hermesi_program_init(hermes_t *hw, u32 offset)
643 * wl_lkm Agere fw does 644 * wl_lkm Agere fw does
644 * Don't know about intersil 645 * Don't know about intersil
645 */ 646 */
646static int hermesi_program_end(hermes_t *hw) 647static int hermesi_program_end(struct hermes *hw)
647{ 648{
648 struct hermes_response resp; 649 struct hermes_response resp;
649 int rc = 0; 650 int rc = 0;
@@ -684,7 +685,8 @@ static int hermes_program_bytes(struct hermes *hw, const char *data,
684} 685}
685 686
686/* Read PDA from the adapter */ 687/* Read PDA from the adapter */
687static int hermes_read_pda(hermes_t *hw, __le16 *pda, u32 pda_addr, u16 pda_len) 688static int hermes_read_pda(struct hermes *hw, __le16 *pda, u32 pda_addr,
689 u16 pda_len)
688{ 690{
689 int ret; 691 int ret;
690 u16 pda_size; 692 u16 pda_size;
diff --git a/drivers/net/wireless/orinoco/hermes.h b/drivers/net/wireless/orinoco/hermes.h
index d9f18c11682a..28a42448d329 100644
--- a/drivers/net/wireless/orinoco/hermes.h
+++ b/drivers/net/wireless/orinoco/hermes.h
@@ -28,7 +28,7 @@
28 * 28 *
29 * As a module of low level hardware access routines, there is no 29 * As a module of low level hardware access routines, there is no
30 * locking. Users of this module should ensure that they serialize 30 * locking. Users of this module should ensure that they serialize
31 * access to the hermes_t structure, and to the hardware 31 * access to the hermes structure, and to the hardware
32*/ 32*/
33 33
34#include <linux/if_ether.h> 34#include <linux/if_ether.h>
@@ -43,7 +43,7 @@
43#define HERMES_BAP_DATALEN_MAX (4096) 43#define HERMES_BAP_DATALEN_MAX (4096)
44#define HERMES_BAP_OFFSET_MAX (4096) 44#define HERMES_BAP_OFFSET_MAX (4096)
45#define HERMES_PORTID_MAX (7) 45#define HERMES_PORTID_MAX (7)
46#define HERMES_NUMPORTS_MAX (HERMES_PORTID_MAX+1) 46#define HERMES_NUMPORTS_MAX (HERMES_PORTID_MAX + 1)
47#define HERMES_PDR_LEN_MAX (260) /* in bytes, from EK */ 47#define HERMES_PDR_LEN_MAX (260) /* in bytes, from EK */
48#define HERMES_PDA_RECS_MAX (200) /* a guess */ 48#define HERMES_PDA_RECS_MAX (200) /* a guess */
49#define HERMES_PDA_LEN_MAX (1024) /* in bytes, from EK */ 49#define HERMES_PDA_LEN_MAX (1024) /* in bytes, from EK */
@@ -148,7 +148,7 @@
148#define HERMES_CMD_WRITEMIF (0x0031) 148#define HERMES_CMD_WRITEMIF (0x0031)
149 149
150/*--- Debugging Commands -----------------------------*/ 150/*--- Debugging Commands -----------------------------*/
151#define HERMES_CMD_TEST (0x0038) 151#define HERMES_CMD_TEST (0x0038)
152 152
153 153
154/* Test command arguments */ 154/* Test command arguments */
@@ -178,8 +178,8 @@
178 178
179#define HERMES_DESCRIPTOR_OFFSET 0 179#define HERMES_DESCRIPTOR_OFFSET 0
180#define HERMES_802_11_OFFSET (14) 180#define HERMES_802_11_OFFSET (14)
181#define HERMES_802_3_OFFSET (14+32) 181#define HERMES_802_3_OFFSET (14 + 32)
182#define HERMES_802_2_OFFSET (14+32+14) 182#define HERMES_802_2_OFFSET (14 + 32 + 14)
183#define HERMES_TXCNTL2_OFFSET (HERMES_802_3_OFFSET - 2) 183#define HERMES_TXCNTL2_OFFSET (HERMES_802_3_OFFSET - 2)
184 184
185#define HERMES_RXSTAT_ERR (0x0003) 185#define HERMES_RXSTAT_ERR (0x0003)
@@ -406,7 +406,7 @@ struct hermes_ops {
406}; 406};
407 407
408/* Basic control structure */ 408/* Basic control structure */
409typedef struct hermes { 409struct hermes {
410 void __iomem *iobase; 410 void __iomem *iobase;
411 int reg_spacing; 411 int reg_spacing;
412#define HERMES_16BIT_REGSPACING 0 412#define HERMES_16BIT_REGSPACING 0
@@ -415,7 +415,7 @@ typedef struct hermes {
415 bool eeprom_pda; 415 bool eeprom_pda;
416 const struct hermes_ops *ops; 416 const struct hermes_ops *ops;
417 void *priv; 417 void *priv;
418} hermes_t; 418};
419 419
420/* Register access convenience macros */ 420/* Register access convenience macros */
421#define hermes_read_reg(hw, off) \ 421#define hermes_read_reg(hw, off) \
@@ -427,28 +427,29 @@ typedef struct hermes {
427 hermes_write_reg((hw), HERMES_##name, (val)) 427 hermes_write_reg((hw), HERMES_##name, (val))
428 428
429/* Function prototypes */ 429/* Function prototypes */
430void hermes_struct_init(hermes_t *hw, void __iomem *address, int reg_spacing); 430void hermes_struct_init(struct hermes *hw, void __iomem *address,
431 int reg_spacing);
431 432
432/* Inline functions */ 433/* Inline functions */
433 434
434static inline int hermes_present(hermes_t *hw) 435static inline int hermes_present(struct hermes *hw)
435{ 436{
436 return hermes_read_regn(hw, SWSUPPORT0) == HERMES_MAGIC; 437 return hermes_read_regn(hw, SWSUPPORT0) == HERMES_MAGIC;
437} 438}
438 439
439static inline void hermes_set_irqmask(hermes_t *hw, u16 events) 440static inline void hermes_set_irqmask(struct hermes *hw, u16 events)
440{ 441{
441 hw->inten = events; 442 hw->inten = events;
442 hermes_write_regn(hw, INTEN, events); 443 hermes_write_regn(hw, INTEN, events);
443} 444}
444 445
445static inline int hermes_enable_port(hermes_t *hw, int port) 446static inline int hermes_enable_port(struct hermes *hw, int port)
446{ 447{
447 return hw->ops->cmd_wait(hw, HERMES_CMD_ENABLE | (port << 8), 448 return hw->ops->cmd_wait(hw, HERMES_CMD_ENABLE | (port << 8),
448 0, NULL); 449 0, NULL);
449} 450}
450 451
451static inline int hermes_disable_port(hermes_t *hw, int port) 452static inline int hermes_disable_port(struct hermes *hw, int port)
452{ 453{
453 return hw->ops->cmd_wait(hw, HERMES_CMD_DISABLE | (port << 8), 454 return hw->ops->cmd_wait(hw, HERMES_CMD_DISABLE | (port << 8),
454 0, NULL); 455 0, NULL);
@@ -456,13 +457,13 @@ static inline int hermes_disable_port(hermes_t *hw, int port)
456 457
457/* Initiate an INQUIRE command (tallies or scan). The result will come as an 458/* Initiate an INQUIRE command (tallies or scan). The result will come as an
458 * information frame in __orinoco_ev_info() */ 459 * information frame in __orinoco_ev_info() */
459static inline int hermes_inquire(hermes_t *hw, u16 rid) 460static inline int hermes_inquire(struct hermes *hw, u16 rid)
460{ 461{
461 return hw->ops->cmd_wait(hw, HERMES_CMD_INQUIRE, rid, NULL); 462 return hw->ops->cmd_wait(hw, HERMES_CMD_INQUIRE, rid, NULL);
462} 463}
463 464
464#define HERMES_BYTES_TO_RECLEN(n) ((((n)+1)/2) + 1) 465#define HERMES_BYTES_TO_RECLEN(n) ((((n) + 1) / 2) + 1)
465#define HERMES_RECLEN_TO_BYTES(n) (((n)-1) * 2) 466#define HERMES_RECLEN_TO_BYTES(n) (((n) - 1) * 2)
466 467
467/* Note that for the next two, the count is in 16-bit words, not bytes */ 468/* Note that for the next two, the count is in 16-bit words, not bytes */
468static inline void hermes_read_words(struct hermes *hw, int off, 469static inline void hermes_read_words(struct hermes *hw, int off,
@@ -498,7 +499,8 @@ static inline void hermes_clear_words(struct hermes *hw, int off,
498 (hw->ops->write_ltv((hw), (bap), (rid), \ 499 (hw->ops->write_ltv((hw), (bap), (rid), \
499 HERMES_BYTES_TO_RECLEN(sizeof(*buf)), (buf))) 500 HERMES_BYTES_TO_RECLEN(sizeof(*buf)), (buf)))
500 501
501static inline int hermes_read_wordrec(hermes_t *hw, int bap, u16 rid, u16 *word) 502static inline int hermes_read_wordrec(struct hermes *hw, int bap, u16 rid,
503 u16 *word)
502{ 504{
503 __le16 rec; 505 __le16 rec;
504 int err; 506 int err;
@@ -508,7 +510,8 @@ static inline int hermes_read_wordrec(hermes_t *hw, int bap, u16 rid, u16 *word)
508 return err; 510 return err;
509} 511}
510 512
511static inline int hermes_write_wordrec(hermes_t *hw, int bap, u16 rid, u16 word) 513static inline int hermes_write_wordrec(struct hermes *hw, int bap, u16 rid,
514 u16 word)
512{ 515{
513 __le16 rec = cpu_to_le16(word); 516 __le16 rec = cpu_to_le16(word);
514 return HERMES_WRITE_RECORD(hw, bap, rid, &rec); 517 return HERMES_WRITE_RECORD(hw, bap, rid, &rec);
diff --git a/drivers/net/wireless/orinoco/hermes_dld.c b/drivers/net/wireless/orinoco/hermes_dld.c
index 2b2b9a1a979c..4a10b7aca043 100644
--- a/drivers/net/wireless/orinoco/hermes_dld.c
+++ b/drivers/net/wireless/orinoco/hermes_dld.c
@@ -193,7 +193,7 @@ hermes_find_pdi(const struct pdi *first_pdi, u32 record_id, const void *end)
193 193
194/* Process one Plug Data Item - find corresponding PDR and plug it */ 194/* Process one Plug Data Item - find corresponding PDR and plug it */
195static int 195static int
196hermes_plug_pdi(hermes_t *hw, const struct pdr *first_pdr, 196hermes_plug_pdi(struct hermes *hw, const struct pdr *first_pdr,
197 const struct pdi *pdi, const void *pdr_end) 197 const struct pdi *pdi, const void *pdr_end)
198{ 198{
199 const struct pdr *pdr; 199 const struct pdr *pdr;
@@ -220,7 +220,7 @@ hermes_plug_pdi(hermes_t *hw, const struct pdr *first_pdr,
220 * Attempt to write every records that is in the specified pda 220 * Attempt to write every records that is in the specified pda
221 * which also has a valid production data record for the firmware. 221 * which also has a valid production data record for the firmware.
222 */ 222 */
223int hermes_apply_pda(hermes_t *hw, 223int hermes_apply_pda(struct hermes *hw,
224 const char *first_pdr, 224 const char *first_pdr,
225 const void *pdr_end, 225 const void *pdr_end,
226 const __le16 *pda, 226 const __le16 *pda,
@@ -274,7 +274,7 @@ hermes_blocks_length(const char *first_block, const void *end)
274/*** Hermes programming ***/ 274/*** Hermes programming ***/
275 275
276/* Program the data blocks */ 276/* Program the data blocks */
277int hermes_program(hermes_t *hw, const char *first_block, const void *end) 277int hermes_program(struct hermes *hw, const char *first_block, const void *end)
278{ 278{
279 const struct dblock *blk; 279 const struct dblock *blk;
280 u32 blkaddr; 280 u32 blkaddr;
@@ -387,7 +387,7 @@ DEFINE_DEFAULT_PDR(0x0161, 256,
387 * 387 *
388 * For certain records, use defaults if they are not found in pda. 388 * For certain records, use defaults if they are not found in pda.
389 */ 389 */
390int hermes_apply_pda_with_defaults(hermes_t *hw, 390int hermes_apply_pda_with_defaults(struct hermes *hw,
391 const char *first_pdr, 391 const char *first_pdr,
392 const void *pdr_end, 392 const void *pdr_end,
393 const __le16 *pda, 393 const __le16 *pda,
diff --git a/drivers/net/wireless/orinoco/hermes_dld.h b/drivers/net/wireless/orinoco/hermes_dld.h
index 583a5bcf9175..b5377e232c63 100644
--- a/drivers/net/wireless/orinoco/hermes_dld.h
+++ b/drivers/net/wireless/orinoco/hermes_dld.h
@@ -27,21 +27,21 @@
27 27
28#include "hermes.h" 28#include "hermes.h"
29 29
30int hermesi_program_init(hermes_t *hw, u32 offset); 30int hermesi_program_init(struct hermes *hw, u32 offset);
31int hermesi_program_end(hermes_t *hw); 31int hermesi_program_end(struct hermes *hw);
32int hermes_program(hermes_t *hw, const char *first_block, const void *end); 32int hermes_program(struct hermes *hw, const char *first_block, const void *end);
33 33
34int hermes_read_pda(hermes_t *hw, 34int hermes_read_pda(struct hermes *hw,
35 __le16 *pda, 35 __le16 *pda,
36 u32 pda_addr, 36 u32 pda_addr,
37 u16 pda_len, 37 u16 pda_len,
38 int use_eeprom); 38 int use_eeprom);
39int hermes_apply_pda(hermes_t *hw, 39int hermes_apply_pda(struct hermes *hw,
40 const char *first_pdr, 40 const char *first_pdr,
41 const void *pdr_end, 41 const void *pdr_end,
42 const __le16 *pda, 42 const __le16 *pda,
43 const void *pda_end); 43 const void *pda_end);
44int hermes_apply_pda_with_defaults(hermes_t *hw, 44int hermes_apply_pda_with_defaults(struct hermes *hw,
45 const char *first_pdr, 45 const char *first_pdr,
46 const void *pdr_end, 46 const void *pdr_end,
47 const __le16 *pda, 47 const __le16 *pda,
diff --git a/drivers/net/wireless/orinoco/hw.c b/drivers/net/wireless/orinoco/hw.c
index 3c7877a7c31c..c09c8437c0b8 100644
--- a/drivers/net/wireless/orinoco/hw.c
+++ b/drivers/net/wireless/orinoco/hw.c
@@ -47,7 +47,7 @@ struct comp_id {
47 u16 id, variant, major, minor; 47 u16 id, variant, major, minor;
48} __packed; 48} __packed;
49 49
50static inline fwtype_t determine_firmware_type(struct comp_id *nic_id) 50static inline enum fwtype determine_firmware_type(struct comp_id *nic_id)
51{ 51{
52 if (nic_id->id < 0x8000) 52 if (nic_id->id < 0x8000)
53 return FIRMWARE_TYPE_AGERE; 53 return FIRMWARE_TYPE_AGERE;
@@ -71,11 +71,11 @@ int determine_fw_capabilities(struct orinoco_private *priv,
71 u32 *hw_ver) 71 u32 *hw_ver)
72{ 72{
73 struct device *dev = priv->dev; 73 struct device *dev = priv->dev;
74 hermes_t *hw = &priv->hw; 74 struct hermes *hw = &priv->hw;
75 int err; 75 int err;
76 struct comp_id nic_id, sta_id; 76 struct comp_id nic_id, sta_id;
77 unsigned int firmver; 77 unsigned int firmver;
78 char tmp[SYMBOL_MAX_VER_LEN+1] __attribute__((aligned(2))); 78 char tmp[SYMBOL_MAX_VER_LEN + 1] __attribute__((aligned(2)));
79 79
80 /* Get the hardware version */ 80 /* Get the hardware version */
81 err = HERMES_READ_RECORD(hw, USER_BAP, HERMES_RID_NICID, &nic_id); 81 err = HERMES_READ_RECORD(hw, USER_BAP, HERMES_RID_NICID, &nic_id);
@@ -280,7 +280,7 @@ int orinoco_hw_read_card_settings(struct orinoco_private *priv, u8 *dev_addr)
280{ 280{
281 struct device *dev = priv->dev; 281 struct device *dev = priv->dev;
282 struct hermes_idstring nickbuf; 282 struct hermes_idstring nickbuf;
283 hermes_t *hw = &priv->hw; 283 struct hermes *hw = &priv->hw;
284 int len; 284 int len;
285 int err; 285 int err;
286 u16 reclen; 286 u16 reclen;
@@ -458,7 +458,7 @@ int orinoco_hw_program_rids(struct orinoco_private *priv)
458{ 458{
459 struct net_device *dev = priv->ndev; 459 struct net_device *dev = priv->ndev;
460 struct wireless_dev *wdev = netdev_priv(dev); 460 struct wireless_dev *wdev = netdev_priv(dev);
461 hermes_t *hw = &priv->hw; 461 struct hermes *hw = &priv->hw;
462 int err; 462 int err;
463 struct hermes_idstring idbuf; 463 struct hermes_idstring idbuf;
464 464
@@ -529,7 +529,7 @@ int orinoco_hw_program_rids(struct orinoco_private *priv)
529 memcpy(&idbuf.val, priv->desired_essid, sizeof(idbuf.val)); 529 memcpy(&idbuf.val, priv->desired_essid, sizeof(idbuf.val));
530 /* WinXP wants partner to configure OWNSSID even in IBSS mode. (jimc) */ 530 /* WinXP wants partner to configure OWNSSID even in IBSS mode. (jimc) */
531 err = hw->ops->write_ltv(hw, USER_BAP, HERMES_RID_CNFOWNSSID, 531 err = hw->ops->write_ltv(hw, USER_BAP, HERMES_RID_CNFOWNSSID,
532 HERMES_BYTES_TO_RECLEN(strlen(priv->desired_essid)+2), 532 HERMES_BYTES_TO_RECLEN(strlen(priv->desired_essid) + 2),
533 &idbuf); 533 &idbuf);
534 if (err) { 534 if (err) {
535 printk(KERN_ERR "%s: Error %d setting OWNSSID\n", 535 printk(KERN_ERR "%s: Error %d setting OWNSSID\n",
@@ -537,7 +537,7 @@ int orinoco_hw_program_rids(struct orinoco_private *priv)
537 return err; 537 return err;
538 } 538 }
539 err = hw->ops->write_ltv(hw, USER_BAP, HERMES_RID_CNFDESIREDSSID, 539 err = hw->ops->write_ltv(hw, USER_BAP, HERMES_RID_CNFDESIREDSSID,
540 HERMES_BYTES_TO_RECLEN(strlen(priv->desired_essid)+2), 540 HERMES_BYTES_TO_RECLEN(strlen(priv->desired_essid) + 2),
541 &idbuf); 541 &idbuf);
542 if (err) { 542 if (err) {
543 printk(KERN_ERR "%s: Error %d setting DESIREDSSID\n", 543 printk(KERN_ERR "%s: Error %d setting DESIREDSSID\n",
@@ -549,7 +549,7 @@ int orinoco_hw_program_rids(struct orinoco_private *priv)
549 idbuf.len = cpu_to_le16(strlen(priv->nick)); 549 idbuf.len = cpu_to_le16(strlen(priv->nick));
550 memcpy(&idbuf.val, priv->nick, sizeof(idbuf.val)); 550 memcpy(&idbuf.val, priv->nick, sizeof(idbuf.val));
551 err = hw->ops->write_ltv(hw, USER_BAP, HERMES_RID_CNFOWNNAME, 551 err = hw->ops->write_ltv(hw, USER_BAP, HERMES_RID_CNFOWNNAME,
552 HERMES_BYTES_TO_RECLEN(strlen(priv->nick)+2), 552 HERMES_BYTES_TO_RECLEN(strlen(priv->nick) + 2),
553 &idbuf); 553 &idbuf);
554 if (err) { 554 if (err) {
555 printk(KERN_ERR "%s: Error %d setting nickname\n", 555 printk(KERN_ERR "%s: Error %d setting nickname\n",
@@ -689,7 +689,7 @@ int orinoco_hw_program_rids(struct orinoco_private *priv)
689/* Get tsc from the firmware */ 689/* Get tsc from the firmware */
690int orinoco_hw_get_tkip_iv(struct orinoco_private *priv, int key, u8 *tsc) 690int orinoco_hw_get_tkip_iv(struct orinoco_private *priv, int key, u8 *tsc)
691{ 691{
692 hermes_t *hw = &priv->hw; 692 struct hermes *hw = &priv->hw;
693 int err = 0; 693 int err = 0;
694 u8 tsc_arr[4][ORINOCO_SEQ_LEN]; 694 u8 tsc_arr[4][ORINOCO_SEQ_LEN];
695 695
@@ -706,7 +706,7 @@ int orinoco_hw_get_tkip_iv(struct orinoco_private *priv, int key, u8 *tsc)
706 706
707int __orinoco_hw_set_bitrate(struct orinoco_private *priv) 707int __orinoco_hw_set_bitrate(struct orinoco_private *priv)
708{ 708{
709 hermes_t *hw = &priv->hw; 709 struct hermes *hw = &priv->hw;
710 int ratemode = priv->bitratemode; 710 int ratemode = priv->bitratemode;
711 int err = 0; 711 int err = 0;
712 712
@@ -737,7 +737,7 @@ int __orinoco_hw_set_bitrate(struct orinoco_private *priv)
737 737
738int orinoco_hw_get_act_bitrate(struct orinoco_private *priv, int *bitrate) 738int orinoco_hw_get_act_bitrate(struct orinoco_private *priv, int *bitrate)
739{ 739{
740 hermes_t *hw = &priv->hw; 740 struct hermes *hw = &priv->hw;
741 int i; 741 int i;
742 int err = 0; 742 int err = 0;
743 u16 val; 743 u16 val;
@@ -786,7 +786,7 @@ int __orinoco_hw_set_wap(struct orinoco_private *priv)
786{ 786{
787 int roaming_flag; 787 int roaming_flag;
788 int err = 0; 788 int err = 0;
789 hermes_t *hw = &priv->hw; 789 struct hermes *hw = &priv->hw;
790 790
791 switch (priv->firmware_type) { 791 switch (priv->firmware_type) {
792 case FIRMWARE_TYPE_AGERE: 792 case FIRMWARE_TYPE_AGERE:
@@ -818,7 +818,7 @@ int __orinoco_hw_set_wap(struct orinoco_private *priv)
818 * which is needed for 802.1x implementations. */ 818 * which is needed for 802.1x implementations. */
819int __orinoco_hw_setup_wepkeys(struct orinoco_private *priv) 819int __orinoco_hw_setup_wepkeys(struct orinoco_private *priv)
820{ 820{
821 hermes_t *hw = &priv->hw; 821 struct hermes *hw = &priv->hw;
822 int err = 0; 822 int err = 0;
823 int i; 823 int i;
824 824
@@ -902,7 +902,7 @@ int __orinoco_hw_setup_wepkeys(struct orinoco_private *priv)
902 902
903int __orinoco_hw_setup_enc(struct orinoco_private *priv) 903int __orinoco_hw_setup_enc(struct orinoco_private *priv)
904{ 904{
905 hermes_t *hw = &priv->hw; 905 struct hermes *hw = &priv->hw;
906 int err = 0; 906 int err = 0;
907 int master_wep_flag; 907 int master_wep_flag;
908 int auth_flag; 908 int auth_flag;
@@ -999,7 +999,7 @@ int __orinoco_hw_set_tkip_key(struct orinoco_private *priv, int key_idx,
999 u8 rx_mic[MIC_KEYLEN]; 999 u8 rx_mic[MIC_KEYLEN];
1000 u8 tsc[ORINOCO_SEQ_LEN]; 1000 u8 tsc[ORINOCO_SEQ_LEN];
1001 } __packed buf; 1001 } __packed buf;
1002 hermes_t *hw = &priv->hw; 1002 struct hermes *hw = &priv->hw;
1003 int ret; 1003 int ret;
1004 int err; 1004 int err;
1005 int k; 1005 int k;
@@ -1052,7 +1052,7 @@ int __orinoco_hw_set_tkip_key(struct orinoco_private *priv, int key_idx,
1052 1052
1053int orinoco_clear_tkip_key(struct orinoco_private *priv, int key_idx) 1053int orinoco_clear_tkip_key(struct orinoco_private *priv, int key_idx)
1054{ 1054{
1055 hermes_t *hw = &priv->hw; 1055 struct hermes *hw = &priv->hw;
1056 int err; 1056 int err;
1057 1057
1058 err = hermes_write_wordrec(hw, USER_BAP, 1058 err = hermes_write_wordrec(hw, USER_BAP,
@@ -1068,7 +1068,7 @@ int __orinoco_hw_set_multicast_list(struct orinoco_private *priv,
1068 struct net_device *dev, 1068 struct net_device *dev,
1069 int mc_count, int promisc) 1069 int mc_count, int promisc)
1070{ 1070{
1071 hermes_t *hw = &priv->hw; 1071 struct hermes *hw = &priv->hw;
1072 int err = 0; 1072 int err = 0;
1073 1073
1074 if (promisc != priv->promiscuous) { 1074 if (promisc != priv->promiscuous) {
@@ -1111,9 +1111,9 @@ int __orinoco_hw_set_multicast_list(struct orinoco_private *priv,
1111 1111
1112/* Return : < 0 -> error code ; >= 0 -> length */ 1112/* Return : < 0 -> error code ; >= 0 -> length */
1113int orinoco_hw_get_essid(struct orinoco_private *priv, int *active, 1113int orinoco_hw_get_essid(struct orinoco_private *priv, int *active,
1114 char buf[IW_ESSID_MAX_SIZE+1]) 1114 char buf[IW_ESSID_MAX_SIZE + 1])
1115{ 1115{
1116 hermes_t *hw = &priv->hw; 1116 struct hermes *hw = &priv->hw;
1117 int err = 0; 1117 int err = 0;
1118 struct hermes_idstring essidbuf; 1118 struct hermes_idstring essidbuf;
1119 char *p = (char *)(&essidbuf.val); 1119 char *p = (char *)(&essidbuf.val);
@@ -1166,7 +1166,7 @@ int orinoco_hw_get_essid(struct orinoco_private *priv, int *active,
1166 1166
1167int orinoco_hw_get_freq(struct orinoco_private *priv) 1167int orinoco_hw_get_freq(struct orinoco_private *priv)
1168{ 1168{
1169 hermes_t *hw = &priv->hw; 1169 struct hermes *hw = &priv->hw;
1170 int err = 0; 1170 int err = 0;
1171 u16 channel; 1171 u16 channel;
1172 int freq = 0; 1172 int freq = 0;
@@ -1206,7 +1206,7 @@ int orinoco_hw_get_freq(struct orinoco_private *priv)
1206int orinoco_hw_get_bitratelist(struct orinoco_private *priv, 1206int orinoco_hw_get_bitratelist(struct orinoco_private *priv,
1207 int *numrates, s32 *rates, int max) 1207 int *numrates, s32 *rates, int max)
1208{ 1208{
1209 hermes_t *hw = &priv->hw; 1209 struct hermes *hw = &priv->hw;
1210 struct hermes_idstring list; 1210 struct hermes_idstring list;
1211 unsigned char *p = (unsigned char *)&list.val; 1211 unsigned char *p = (unsigned char *)&list.val;
1212 int err = 0; 1212 int err = 0;
@@ -1238,7 +1238,7 @@ int orinoco_hw_trigger_scan(struct orinoco_private *priv,
1238 const struct cfg80211_ssid *ssid) 1238 const struct cfg80211_ssid *ssid)
1239{ 1239{
1240 struct net_device *dev = priv->ndev; 1240 struct net_device *dev = priv->ndev;
1241 hermes_t *hw = &priv->hw; 1241 struct hermes *hw = &priv->hw;
1242 unsigned long flags; 1242 unsigned long flags;
1243 int err = 0; 1243 int err = 0;
1244 1244
@@ -1323,7 +1323,7 @@ int orinoco_hw_trigger_scan(struct orinoco_private *priv,
1323int orinoco_hw_disassociate(struct orinoco_private *priv, 1323int orinoco_hw_disassociate(struct orinoco_private *priv,
1324 u8 *addr, u16 reason_code) 1324 u8 *addr, u16 reason_code)
1325{ 1325{
1326 hermes_t *hw = &priv->hw; 1326 struct hermes *hw = &priv->hw;
1327 int err; 1327 int err;
1328 1328
1329 struct { 1329 struct {
@@ -1346,7 +1346,7 @@ int orinoco_hw_disassociate(struct orinoco_private *priv,
1346int orinoco_hw_get_current_bssid(struct orinoco_private *priv, 1346int orinoco_hw_get_current_bssid(struct orinoco_private *priv,
1347 u8 *addr) 1347 u8 *addr)
1348{ 1348{
1349 hermes_t *hw = &priv->hw; 1349 struct hermes *hw = &priv->hw;
1350 int err; 1350 int err;
1351 1351
1352 err = hw->ops->read_ltv(hw, USER_BAP, HERMES_RID_CURRENTBSSID, 1352 err = hw->ops->read_ltv(hw, USER_BAP, HERMES_RID_CURRENTBSSID,
diff --git a/drivers/net/wireless/orinoco/hw.h b/drivers/net/wireless/orinoco/hw.h
index 97af71e79950..8f6831f4e328 100644
--- a/drivers/net/wireless/orinoco/hw.h
+++ b/drivers/net/wireless/orinoco/hw.h
@@ -45,7 +45,7 @@ int __orinoco_hw_set_multicast_list(struct orinoco_private *priv,
45 struct net_device *dev, 45 struct net_device *dev,
46 int mc_count, int promisc); 46 int mc_count, int promisc);
47int orinoco_hw_get_essid(struct orinoco_private *priv, int *active, 47int orinoco_hw_get_essid(struct orinoco_private *priv, int *active,
48 char buf[IW_ESSID_MAX_SIZE+1]); 48 char buf[IW_ESSID_MAX_SIZE + 1]);
49int orinoco_hw_get_freq(struct orinoco_private *priv); 49int orinoco_hw_get_freq(struct orinoco_private *priv);
50int orinoco_hw_get_bitratelist(struct orinoco_private *priv, 50int orinoco_hw_get_bitratelist(struct orinoco_private *priv,
51 int *numrates, s32 *rates, int max); 51 int *numrates, s32 *rates, int max);
diff --git a/drivers/net/wireless/orinoco/main.c b/drivers/net/wireless/orinoco/main.c
index b0f233f1100e..ef7efe839bb8 100644
--- a/drivers/net/wireless/orinoco/main.c
+++ b/drivers/net/wireless/orinoco/main.c
@@ -4,7 +4,7 @@
4 * adaptors, with Lucent/Agere, Intersil or Symbol firmware. 4 * adaptors, with Lucent/Agere, Intersil or Symbol firmware.
5 * 5 *
6 * Current maintainers (as of 29 September 2003) are: 6 * Current maintainers (as of 29 September 2003) are:
7 * Pavel Roskin <proski AT gnu.org> 7 * Pavel Roskin <proski AT gnu.org>
8 * and David Gibson <hermes AT gibson.dropbear.id.au> 8 * and David Gibson <hermes AT gibson.dropbear.id.au>
9 * 9 *
10 * (C) Copyright David Gibson, IBM Corporation 2001-2003. 10 * (C) Copyright David Gibson, IBM Corporation 2001-2003.
@@ -146,10 +146,10 @@ static const u8 encaps_hdr[] = {0xaa, 0xaa, 0x03, 0x00, 0x00, 0x00};
146#define ORINOCO_MAX_MTU (IEEE80211_MAX_DATA_LEN - ENCAPS_OVERHEAD) 146#define ORINOCO_MAX_MTU (IEEE80211_MAX_DATA_LEN - ENCAPS_OVERHEAD)
147 147
148#define MAX_IRQLOOPS_PER_IRQ 10 148#define MAX_IRQLOOPS_PER_IRQ 10
149#define MAX_IRQLOOPS_PER_JIFFY (20000/HZ) /* Based on a guestimate of 149#define MAX_IRQLOOPS_PER_JIFFY (20000 / HZ) /* Based on a guestimate of
150 * how many events the 150 * how many events the
151 * device could 151 * device could
152 * legitimately generate */ 152 * legitimately generate */
153 153
154#define DUMMY_FID 0xFFFF 154#define DUMMY_FID 0xFFFF
155 155
@@ -157,7 +157,7 @@ static const u8 encaps_hdr[] = {0xaa, 0xaa, 0x03, 0x00, 0x00, 0x00};
157 HERMES_MAX_MULTICAST : 0)*/ 157 HERMES_MAX_MULTICAST : 0)*/
158#define MAX_MULTICAST(priv) (HERMES_MAX_MULTICAST) 158#define MAX_MULTICAST(priv) (HERMES_MAX_MULTICAST)
159 159
160#define ORINOCO_INTEN (HERMES_EV_RX | HERMES_EV_ALLOC \ 160#define ORINOCO_INTEN (HERMES_EV_RX | HERMES_EV_ALLOC \
161 | HERMES_EV_TX | HERMES_EV_TXEXC \ 161 | HERMES_EV_TX | HERMES_EV_TXEXC \
162 | HERMES_EV_WTERR | HERMES_EV_INFO \ 162 | HERMES_EV_WTERR | HERMES_EV_INFO \
163 | HERMES_EV_INFDROP) 163 | HERMES_EV_INFDROP)
@@ -437,12 +437,12 @@ static netdev_tx_t orinoco_xmit(struct sk_buff *skb, struct net_device *dev)
437{ 437{
438 struct orinoco_private *priv = ndev_priv(dev); 438 struct orinoco_private *priv = ndev_priv(dev);
439 struct net_device_stats *stats = &priv->stats; 439 struct net_device_stats *stats = &priv->stats;
440 hermes_t *hw = &priv->hw; 440 struct hermes *hw = &priv->hw;
441 int err = 0; 441 int err = 0;
442 u16 txfid = priv->txfid; 442 u16 txfid = priv->txfid;
443 int tx_control; 443 int tx_control;
444 unsigned long flags; 444 unsigned long flags;
445 u8 mic_buf[MICHAEL_MIC_LEN+1]; 445 u8 mic_buf[MICHAEL_MIC_LEN + 1];
446 446
447 if (!netif_running(dev)) { 447 if (!netif_running(dev)) {
448 printk(KERN_ERR "%s: Tx on stopped device!\n", 448 printk(KERN_ERR "%s: Tx on stopped device!\n",
@@ -579,7 +579,7 @@ static netdev_tx_t orinoco_xmit(struct sk_buff *skb, struct net_device *dev)
579 return NETDEV_TX_BUSY; 579 return NETDEV_TX_BUSY;
580} 580}
581 581
582static void __orinoco_ev_alloc(struct net_device *dev, hermes_t *hw) 582static void __orinoco_ev_alloc(struct net_device *dev, struct hermes *hw)
583{ 583{
584 struct orinoco_private *priv = ndev_priv(dev); 584 struct orinoco_private *priv = ndev_priv(dev);
585 u16 fid = hermes_read_regn(hw, ALLOCFID); 585 u16 fid = hermes_read_regn(hw, ALLOCFID);
@@ -594,7 +594,7 @@ static void __orinoco_ev_alloc(struct net_device *dev, hermes_t *hw)
594 hermes_write_regn(hw, ALLOCFID, DUMMY_FID); 594 hermes_write_regn(hw, ALLOCFID, DUMMY_FID);
595} 595}
596 596
597static void __orinoco_ev_tx(struct net_device *dev, hermes_t *hw) 597static void __orinoco_ev_tx(struct net_device *dev, struct hermes *hw)
598{ 598{
599 struct orinoco_private *priv = ndev_priv(dev); 599 struct orinoco_private *priv = ndev_priv(dev);
600 struct net_device_stats *stats = &priv->stats; 600 struct net_device_stats *stats = &priv->stats;
@@ -606,7 +606,7 @@ static void __orinoco_ev_tx(struct net_device *dev, hermes_t *hw)
606 hermes_write_regn(hw, TXCOMPLFID, DUMMY_FID); 606 hermes_write_regn(hw, TXCOMPLFID, DUMMY_FID);
607} 607}
608 608
609static void __orinoco_ev_txexc(struct net_device *dev, hermes_t *hw) 609static void __orinoco_ev_txexc(struct net_device *dev, struct hermes *hw)
610{ 610{
611 struct orinoco_private *priv = ndev_priv(dev); 611 struct orinoco_private *priv = ndev_priv(dev);
612 struct net_device_stats *stats = &priv->stats; 612 struct net_device_stats *stats = &priv->stats;
@@ -753,7 +753,7 @@ static void orinoco_rx_monitor(struct net_device *dev, u16 rxfid,
753 struct sk_buff *skb; 753 struct sk_buff *skb;
754 struct orinoco_private *priv = ndev_priv(dev); 754 struct orinoco_private *priv = ndev_priv(dev);
755 struct net_device_stats *stats = &priv->stats; 755 struct net_device_stats *stats = &priv->stats;
756 hermes_t *hw = &priv->hw; 756 struct hermes *hw = &priv->hw;
757 757
758 len = le16_to_cpu(desc->data_len); 758 len = le16_to_cpu(desc->data_len);
759 759
@@ -840,7 +840,7 @@ static void orinoco_rx_monitor(struct net_device *dev, u16 rxfid,
840 stats->rx_dropped++; 840 stats->rx_dropped++;
841} 841}
842 842
843void __orinoco_ev_rx(struct net_device *dev, hermes_t *hw) 843void __orinoco_ev_rx(struct net_device *dev, struct hermes *hw)
844{ 844{
845 struct orinoco_private *priv = ndev_priv(dev); 845 struct orinoco_private *priv = ndev_priv(dev);
846 struct net_device_stats *stats = &priv->stats; 846 struct net_device_stats *stats = &priv->stats;
@@ -918,7 +918,7 @@ void __orinoco_ev_rx(struct net_device *dev, hermes_t *hw)
918 32bit boundary, plus 1 byte so we can read in odd length 918 32bit boundary, plus 1 byte so we can read in odd length
919 packets from the card, which has an IO granularity of 16 919 packets from the card, which has an IO granularity of 16
920 bits */ 920 bits */
921 skb = dev_alloc_skb(length+ETH_HLEN+2+1); 921 skb = dev_alloc_skb(length + ETH_HLEN + 2 + 1);
922 if (!skb) { 922 if (!skb) {
923 printk(KERN_WARNING "%s: Can't allocate skb for Rx\n", 923 printk(KERN_WARNING "%s: Can't allocate skb for Rx\n",
924 dev->name); 924 dev->name);
@@ -1402,7 +1402,7 @@ static void orinoco_process_scan_results(struct work_struct *work)
1402 spin_unlock_irqrestore(&priv->scan_lock, flags); 1402 spin_unlock_irqrestore(&priv->scan_lock, flags);
1403} 1403}
1404 1404
1405void __orinoco_ev_info(struct net_device *dev, hermes_t *hw) 1405void __orinoco_ev_info(struct net_device *dev, struct hermes *hw)
1406{ 1406{
1407 struct orinoco_private *priv = ndev_priv(dev); 1407 struct orinoco_private *priv = ndev_priv(dev);
1408 u16 infofid; 1408 u16 infofid;
@@ -1620,7 +1620,7 @@ void __orinoco_ev_info(struct net_device *dev, hermes_t *hw)
1620} 1620}
1621EXPORT_SYMBOL(__orinoco_ev_info); 1621EXPORT_SYMBOL(__orinoco_ev_info);
1622 1622
1623static void __orinoco_ev_infdrop(struct net_device *dev, hermes_t *hw) 1623static void __orinoco_ev_infdrop(struct net_device *dev, struct hermes *hw)
1624{ 1624{
1625 if (net_ratelimit()) 1625 if (net_ratelimit())
1626 printk(KERN_DEBUG "%s: Information frame lost.\n", dev->name); 1626 printk(KERN_DEBUG "%s: Information frame lost.\n", dev->name);
@@ -1831,7 +1831,7 @@ static int __orinoco_commit(struct orinoco_private *priv)
1831int orinoco_commit(struct orinoco_private *priv) 1831int orinoco_commit(struct orinoco_private *priv)
1832{ 1832{
1833 struct net_device *dev = priv->ndev; 1833 struct net_device *dev = priv->ndev;
1834 hermes_t *hw = &priv->hw; 1834 struct hermes *hw = &priv->hw;
1835 int err; 1835 int err;
1836 1836
1837 if (priv->broken_disableport) { 1837 if (priv->broken_disableport) {
@@ -1874,12 +1874,12 @@ int orinoco_commit(struct orinoco_private *priv)
1874/* Interrupt handler */ 1874/* Interrupt handler */
1875/********************************************************************/ 1875/********************************************************************/
1876 1876
1877static void __orinoco_ev_tick(struct net_device *dev, hermes_t *hw) 1877static void __orinoco_ev_tick(struct net_device *dev, struct hermes *hw)
1878{ 1878{
1879 printk(KERN_DEBUG "%s: TICK\n", dev->name); 1879 printk(KERN_DEBUG "%s: TICK\n", dev->name);
1880} 1880}
1881 1881
1882static void __orinoco_ev_wterr(struct net_device *dev, hermes_t *hw) 1882static void __orinoco_ev_wterr(struct net_device *dev, struct hermes *hw)
1883{ 1883{
1884 /* This seems to happen a fair bit under load, but ignoring it 1884 /* This seems to happen a fair bit under load, but ignoring it
1885 seems to work fine...*/ 1885 seems to work fine...*/
@@ -1891,7 +1891,7 @@ irqreturn_t orinoco_interrupt(int irq, void *dev_id)
1891{ 1891{
1892 struct orinoco_private *priv = dev_id; 1892 struct orinoco_private *priv = dev_id;
1893 struct net_device *dev = priv->ndev; 1893 struct net_device *dev = priv->ndev;
1894 hermes_t *hw = &priv->hw; 1894 struct hermes *hw = &priv->hw;
1895 int count = MAX_IRQLOOPS_PER_IRQ; 1895 int count = MAX_IRQLOOPS_PER_IRQ;
1896 u16 evstat, events; 1896 u16 evstat, events;
1897 /* These are used to detect a runaway interrupt situation. 1897 /* These are used to detect a runaway interrupt situation.
@@ -2017,8 +2017,8 @@ static void orinoco_unregister_pm_notifier(struct orinoco_private *priv)
2017 unregister_pm_notifier(&priv->pm_notifier); 2017 unregister_pm_notifier(&priv->pm_notifier);
2018} 2018}
2019#else /* !PM_SLEEP || HERMES_CACHE_FW_ON_INIT */ 2019#else /* !PM_SLEEP || HERMES_CACHE_FW_ON_INIT */
2020#define orinoco_register_pm_notifier(priv) do { } while(0) 2020#define orinoco_register_pm_notifier(priv) do { } while (0)
2021#define orinoco_unregister_pm_notifier(priv) do { } while(0) 2021#define orinoco_unregister_pm_notifier(priv) do { } while (0)
2022#endif 2022#endif
2023 2023
2024/********************************************************************/ 2024/********************************************************************/
@@ -2029,7 +2029,7 @@ int orinoco_init(struct orinoco_private *priv)
2029{ 2029{
2030 struct device *dev = priv->dev; 2030 struct device *dev = priv->dev;
2031 struct wiphy *wiphy = priv_to_wiphy(priv); 2031 struct wiphy *wiphy = priv_to_wiphy(priv);
2032 hermes_t *hw = &priv->hw; 2032 struct hermes *hw = &priv->hw;
2033 int err = 0; 2033 int err = 0;
2034 2034
2035 /* No need to lock, the hw_unavailable flag is already set in 2035 /* No need to lock, the hw_unavailable flag is already set in
diff --git a/drivers/net/wireless/orinoco/mic.c b/drivers/net/wireless/orinoco/mic.c
index c03e7f54d1b8..fce4a843e656 100644
--- a/drivers/net/wireless/orinoco/mic.c
+++ b/drivers/net/wireless/orinoco/mic.c
@@ -59,10 +59,10 @@ int orinoco_mic(struct crypto_hash *tfm_michael, u8 *key,
59 /* Copy header into buffer. We need the padding on the end zeroed */ 59 /* Copy header into buffer. We need the padding on the end zeroed */
60 memcpy(&hdr[0], da, ETH_ALEN); 60 memcpy(&hdr[0], da, ETH_ALEN);
61 memcpy(&hdr[ETH_ALEN], sa, ETH_ALEN); 61 memcpy(&hdr[ETH_ALEN], sa, ETH_ALEN);
62 hdr[ETH_ALEN*2] = priority; 62 hdr[ETH_ALEN * 2] = priority;
63 hdr[ETH_ALEN*2+1] = 0; 63 hdr[ETH_ALEN * 2 + 1] = 0;
64 hdr[ETH_ALEN*2+2] = 0; 64 hdr[ETH_ALEN * 2 + 2] = 0;
65 hdr[ETH_ALEN*2+3] = 0; 65 hdr[ETH_ALEN * 2 + 3] = 0;
66 66
67 /* Use scatter gather to MIC header and data in one go */ 67 /* Use scatter gather to MIC header and data in one go */
68 sg_init_table(sg, 2); 68 sg_init_table(sg, 2);
diff --git a/drivers/net/wireless/orinoco/orinoco.h b/drivers/net/wireless/orinoco/orinoco.h
index 255710ef082a..3bb936b9558c 100644
--- a/drivers/net/wireless/orinoco/orinoco.h
+++ b/drivers/net/wireless/orinoco/orinoco.h
@@ -49,11 +49,11 @@ enum orinoco_alg {
49 ORINOCO_ALG_TKIP 49 ORINOCO_ALG_TKIP
50}; 50};
51 51
52typedef enum { 52enum fwtype {
53 FIRMWARE_TYPE_AGERE, 53 FIRMWARE_TYPE_AGERE,
54 FIRMWARE_TYPE_INTERSIL, 54 FIRMWARE_TYPE_INTERSIL,
55 FIRMWARE_TYPE_SYMBOL 55 FIRMWARE_TYPE_SYMBOL
56} fwtype_t; 56};
57 57
58struct firmware; 58struct firmware;
59 59
@@ -88,11 +88,11 @@ struct orinoco_private {
88 struct iw_statistics wstats; 88 struct iw_statistics wstats;
89 89
90 /* Hardware control variables */ 90 /* Hardware control variables */
91 hermes_t hw; 91 struct hermes hw;
92 u16 txfid; 92 u16 txfid;
93 93
94 /* Capabilities of the hardware/firmware */ 94 /* Capabilities of the hardware/firmware */
95 fwtype_t firmware_type; 95 enum fwtype firmware_type;
96 int ibss_port; 96 int ibss_port;
97 int nicbuf_size; 97 int nicbuf_size;
98 u16 channel_mask; 98 u16 channel_mask;
@@ -122,8 +122,8 @@ struct orinoco_private {
122 struct key_params keys[ORINOCO_MAX_KEYS]; 122 struct key_params keys[ORINOCO_MAX_KEYS];
123 123
124 int bitratemode; 124 int bitratemode;
125 char nick[IW_ESSID_MAX_SIZE+1]; 125 char nick[IW_ESSID_MAX_SIZE + 1];
126 char desired_essid[IW_ESSID_MAX_SIZE+1]; 126 char desired_essid[IW_ESSID_MAX_SIZE + 1];
127 char desired_bssid[ETH_ALEN]; 127 char desired_bssid[ETH_ALEN];
128 int bssid_fixed; 128 int bssid_fixed;
129 u16 frag_thresh, mwo_robust; 129 u16 frag_thresh, mwo_robust;
@@ -197,8 +197,8 @@ extern int orinoco_up(struct orinoco_private *priv);
197extern void orinoco_down(struct orinoco_private *priv); 197extern void orinoco_down(struct orinoco_private *priv);
198extern irqreturn_t orinoco_interrupt(int irq, void *dev_id); 198extern irqreturn_t orinoco_interrupt(int irq, void *dev_id);
199 199
200extern void __orinoco_ev_info(struct net_device *dev, hermes_t *hw); 200extern void __orinoco_ev_info(struct net_device *dev, struct hermes *hw);
201extern void __orinoco_ev_rx(struct net_device *dev, hermes_t *hw); 201extern void __orinoco_ev_rx(struct net_device *dev, struct hermes *hw);
202 202
203int orinoco_process_xmit_skb(struct sk_buff *skb, 203int orinoco_process_xmit_skb(struct sk_buff *skb,
204 struct net_device *dev, 204 struct net_device *dev,
diff --git a/drivers/net/wireless/orinoco/orinoco_cs.c b/drivers/net/wireless/orinoco/orinoco_cs.c
index 88e3c0ebcaad..3f7fc4a0b43d 100644
--- a/drivers/net/wireless/orinoco/orinoco_cs.c
+++ b/drivers/net/wireless/orinoco/orinoco_cs.c
@@ -65,7 +65,7 @@ static void orinoco_cs_release(struct pcmcia_device *link);
65static void orinoco_cs_detach(struct pcmcia_device *p_dev); 65static void orinoco_cs_detach(struct pcmcia_device *p_dev);
66 66
67/********************************************************************/ 67/********************************************************************/
68/* Device methods */ 68/* Device methods */
69/********************************************************************/ 69/********************************************************************/
70 70
71static int 71static int
@@ -89,7 +89,7 @@ orinoco_cs_hard_reset(struct orinoco_private *priv)
89} 89}
90 90
91/********************************************************************/ 91/********************************************************************/
92/* PCMCIA stuff */ 92/* PCMCIA stuff */
93/********************************************************************/ 93/********************************************************************/
94 94
95static int 95static int
@@ -134,7 +134,7 @@ static int
134orinoco_cs_config(struct pcmcia_device *link) 134orinoco_cs_config(struct pcmcia_device *link)
135{ 135{
136 struct orinoco_private *priv = link->priv; 136 struct orinoco_private *priv = link->priv;
137 hermes_t *hw = &priv->hw; 137 struct hermes *hw = &priv->hw;
138 int ret; 138 int ret;
139 void __iomem *mem; 139 void __iomem *mem;
140 140
diff --git a/drivers/net/wireless/orinoco/orinoco_nortel.c b/drivers/net/wireless/orinoco/orinoco_nortel.c
index bc3ea0b67a4f..326396b313a6 100644
--- a/drivers/net/wireless/orinoco/orinoco_nortel.c
+++ b/drivers/net/wireless/orinoco/orinoco_nortel.c
@@ -296,8 +296,7 @@ static struct pci_driver orinoco_nortel_driver = {
296static char version[] __initdata = DRIVER_NAME " " DRIVER_VERSION 296static char version[] __initdata = DRIVER_NAME " " DRIVER_VERSION
297 " (Tobias Hoffmann & Christoph Jungegger <disdos@traum404.de>)"; 297 " (Tobias Hoffmann & Christoph Jungegger <disdos@traum404.de>)";
298MODULE_AUTHOR("Christoph Jungegger <disdos@traum404.de>"); 298MODULE_AUTHOR("Christoph Jungegger <disdos@traum404.de>");
299MODULE_DESCRIPTION 299MODULE_DESCRIPTION("Driver for wireless LAN cards using the Nortel PCI bridge");
300 ("Driver for wireless LAN cards using the Nortel PCI bridge");
301MODULE_LICENSE("Dual MPL/GPL"); 300MODULE_LICENSE("Dual MPL/GPL");
302 301
303static int __init orinoco_nortel_init(void) 302static int __init orinoco_nortel_init(void)
diff --git a/drivers/net/wireless/orinoco/orinoco_pci.c b/drivers/net/wireless/orinoco/orinoco_pci.c
index 468197f86673..6058c66b844e 100644
--- a/drivers/net/wireless/orinoco/orinoco_pci.c
+++ b/drivers/net/wireless/orinoco/orinoco_pci.c
@@ -6,7 +6,7 @@
6 * hermes registers, as well as the COR register. 6 * hermes registers, as well as the COR register.
7 * 7 *
8 * Current maintainers are: 8 * Current maintainers are:
9 * Pavel Roskin <proski AT gnu.org> 9 * Pavel Roskin <proski AT gnu.org>
10 * and David Gibson <hermes AT gibson.dropbear.id.au> 10 * and David Gibson <hermes AT gibson.dropbear.id.au>
11 * 11 *
12 * Some of this code is borrowed from orinoco_plx.c 12 * Some of this code is borrowed from orinoco_plx.c
@@ -81,7 +81,7 @@
81 */ 81 */
82static int orinoco_pci_cor_reset(struct orinoco_private *priv) 82static int orinoco_pci_cor_reset(struct orinoco_private *priv)
83{ 83{
84 hermes_t *hw = &priv->hw; 84 struct hermes *hw = &priv->hw;
85 unsigned long timeout; 85 unsigned long timeout;
86 u16 reg; 86 u16 reg;
87 87
diff --git a/drivers/net/wireless/orinoco/orinoco_plx.c b/drivers/net/wireless/orinoco/orinoco_plx.c
index 9358f4d2307b..2bac8248a991 100644
--- a/drivers/net/wireless/orinoco/orinoco_plx.c
+++ b/drivers/net/wireless/orinoco/orinoco_plx.c
@@ -4,7 +4,7 @@
4 * but are connected to the PCI bus by a PLX9052. 4 * but are connected to the PCI bus by a PLX9052.
5 * 5 *
6 * Current maintainers are: 6 * Current maintainers are:
7 * Pavel Roskin <proski AT gnu.org> 7 * Pavel Roskin <proski AT gnu.org>
8 * and David Gibson <hermes AT gibson.dropbear.id.au> 8 * and David Gibson <hermes AT gibson.dropbear.id.au>
9 * 9 *
10 * (C) Copyright David Gibson, IBM Corp. 2001-2003. 10 * (C) Copyright David Gibson, IBM Corp. 2001-2003.
@@ -102,14 +102,14 @@
102#define PLX_RESET_TIME (500) /* milliseconds */ 102#define PLX_RESET_TIME (500) /* milliseconds */
103 103
104#define PLX_INTCSR 0x4c /* Interrupt Control & Status Register */ 104#define PLX_INTCSR 0x4c /* Interrupt Control & Status Register */
105#define PLX_INTCSR_INTEN (1<<6) /* Interrupt Enable bit */ 105#define PLX_INTCSR_INTEN (1 << 6) /* Interrupt Enable bit */
106 106
107/* 107/*
108 * Do a soft reset of the card using the Configuration Option Register 108 * Do a soft reset of the card using the Configuration Option Register
109 */ 109 */
110static int orinoco_plx_cor_reset(struct orinoco_private *priv) 110static int orinoco_plx_cor_reset(struct orinoco_private *priv)
111{ 111{
112 hermes_t *hw = &priv->hw; 112 struct hermes *hw = &priv->hw;
113 struct orinoco_pci_card *card = priv->card; 113 struct orinoco_pci_card *card = priv->card;
114 unsigned long timeout; 114 unsigned long timeout;
115 u16 reg; 115 u16 reg;
diff --git a/drivers/net/wireless/orinoco/orinoco_tmd.c b/drivers/net/wireless/orinoco/orinoco_tmd.c
index 784605f0af15..93159d68ec93 100644
--- a/drivers/net/wireless/orinoco/orinoco_tmd.c
+++ b/drivers/net/wireless/orinoco/orinoco_tmd.c
@@ -59,7 +59,7 @@
59 */ 59 */
60static int orinoco_tmd_cor_reset(struct orinoco_private *priv) 60static int orinoco_tmd_cor_reset(struct orinoco_private *priv)
61{ 61{
62 hermes_t *hw = &priv->hw; 62 struct hermes *hw = &priv->hw;
63 struct orinoco_pci_card *card = priv->card; 63 struct orinoco_pci_card *card = priv->card;
64 unsigned long timeout; 64 unsigned long timeout;
65 u16 reg; 65 u16 reg;
diff --git a/drivers/net/wireless/orinoco/orinoco_usb.c b/drivers/net/wireless/orinoco/orinoco_usb.c
index b9aedf18a046..811e87f8a349 100644
--- a/drivers/net/wireless/orinoco/orinoco_usb.c
+++ b/drivers/net/wireless/orinoco/orinoco_usb.c
@@ -199,7 +199,7 @@ MODULE_FIRMWARE("orinoco_ezusb_fw");
199#define EZUSB_FRAME_DATA 1 199#define EZUSB_FRAME_DATA 1
200#define EZUSB_FRAME_CONTROL 2 200#define EZUSB_FRAME_CONTROL 2
201 201
202#define DEF_TIMEOUT (3*HZ) 202#define DEF_TIMEOUT (3 * HZ)
203 203
204#define BULK_BUF_SIZE 2048 204#define BULK_BUF_SIZE 2048
205 205
@@ -959,7 +959,7 @@ static int ezusb_access_ltv(struct ezusb_priv *upriv,
959 return retval; 959 return retval;
960} 960}
961 961
962static int ezusb_write_ltv(hermes_t *hw, int bap, u16 rid, 962static int ezusb_write_ltv(struct hermes *hw, int bap, u16 rid,
963 u16 length, const void *data) 963 u16 length, const void *data)
964{ 964{
965 struct ezusb_priv *upriv = hw->priv; 965 struct ezusb_priv *upriv = hw->priv;
@@ -989,7 +989,7 @@ static int ezusb_write_ltv(hermes_t *hw, int bap, u16 rid,
989 NULL, 0, NULL); 989 NULL, 0, NULL);
990} 990}
991 991
992static int ezusb_read_ltv(hermes_t *hw, int bap, u16 rid, 992static int ezusb_read_ltv(struct hermes *hw, int bap, u16 rid,
993 unsigned bufsize, u16 *length, void *buf) 993 unsigned bufsize, u16 *length, void *buf)
994{ 994{
995 struct ezusb_priv *upriv = hw->priv; 995 struct ezusb_priv *upriv = hw->priv;
@@ -1006,7 +1006,7 @@ static int ezusb_read_ltv(hermes_t *hw, int bap, u16 rid,
1006 buf, bufsize, length); 1006 buf, bufsize, length);
1007} 1007}
1008 1008
1009static int ezusb_doicmd_wait(hermes_t *hw, u16 cmd, u16 parm0, u16 parm1, 1009static int ezusb_doicmd_wait(struct hermes *hw, u16 cmd, u16 parm0, u16 parm1,
1010 u16 parm2, struct hermes_response *resp) 1010 u16 parm2, struct hermes_response *resp)
1011{ 1011{
1012 struct ezusb_priv *upriv = hw->priv; 1012 struct ezusb_priv *upriv = hw->priv;
@@ -1028,7 +1028,7 @@ static int ezusb_doicmd_wait(hermes_t *hw, u16 cmd, u16 parm0, u16 parm1,
1028 EZUSB_FRAME_CONTROL, NULL, 0, NULL); 1028 EZUSB_FRAME_CONTROL, NULL, 0, NULL);
1029} 1029}
1030 1030
1031static int ezusb_docmd_wait(hermes_t *hw, u16 cmd, u16 parm0, 1031static int ezusb_docmd_wait(struct hermes *hw, u16 cmd, u16 parm0,
1032 struct hermes_response *resp) 1032 struct hermes_response *resp)
1033{ 1033{
1034 struct ezusb_priv *upriv = hw->priv; 1034 struct ezusb_priv *upriv = hw->priv;
@@ -1196,7 +1196,7 @@ static netdev_tx_t ezusb_xmit(struct sk_buff *skb, struct net_device *dev)
1196 struct orinoco_private *priv = ndev_priv(dev); 1196 struct orinoco_private *priv = ndev_priv(dev);
1197 struct net_device_stats *stats = &priv->stats; 1197 struct net_device_stats *stats = &priv->stats;
1198 struct ezusb_priv *upriv = priv->card; 1198 struct ezusb_priv *upriv = priv->card;
1199 u8 mic[MICHAEL_MIC_LEN+1]; 1199 u8 mic[MICHAEL_MIC_LEN + 1];
1200 int err = 0; 1200 int err = 0;
1201 int tx_control; 1201 int tx_control;
1202 unsigned long flags; 1202 unsigned long flags;
@@ -1356,7 +1356,7 @@ static int ezusb_hard_reset(struct orinoco_private *priv)
1356} 1356}
1357 1357
1358 1358
1359static int ezusb_init(hermes_t *hw) 1359static int ezusb_init(struct hermes *hw)
1360{ 1360{
1361 struct ezusb_priv *upriv = hw->priv; 1361 struct ezusb_priv *upriv = hw->priv;
1362 int retval; 1362 int retval;
@@ -1438,7 +1438,7 @@ static void ezusb_bulk_in_callback(struct urb *urb)
1438 } else if (upriv->dev) { 1438 } else if (upriv->dev) {
1439 struct net_device *dev = upriv->dev; 1439 struct net_device *dev = upriv->dev;
1440 struct orinoco_private *priv = ndev_priv(dev); 1440 struct orinoco_private *priv = ndev_priv(dev);
1441 hermes_t *hw = &priv->hw; 1441 struct hermes *hw = &priv->hw;
1442 1442
1443 if (hermes_rid == EZUSB_RID_RX) { 1443 if (hermes_rid == EZUSB_RID_RX) {
1444 __orinoco_ev_rx(dev, hw); 1444 __orinoco_ev_rx(dev, hw);
@@ -1575,7 +1575,7 @@ static int ezusb_probe(struct usb_interface *interface,
1575{ 1575{
1576 struct usb_device *udev = interface_to_usbdev(interface); 1576 struct usb_device *udev = interface_to_usbdev(interface);
1577 struct orinoco_private *priv; 1577 struct orinoco_private *priv;
1578 hermes_t *hw; 1578 struct hermes *hw;
1579 struct ezusb_priv *upriv = NULL; 1579 struct ezusb_priv *upriv = NULL;
1580 struct usb_interface_descriptor *iface_desc; 1580 struct usb_interface_descriptor *iface_desc;
1581 struct usb_endpoint_descriptor *ep; 1581 struct usb_endpoint_descriptor *ep;
@@ -1757,7 +1757,7 @@ static struct usb_driver orinoco_driver = {
1757/* Can't be declared "const" or the whole __initdata section will 1757/* Can't be declared "const" or the whole __initdata section will
1758 * become const */ 1758 * become const */
1759static char version[] __initdata = DRIVER_NAME " " DRIVER_VERSION 1759static char version[] __initdata = DRIVER_NAME " " DRIVER_VERSION
1760 " (Manuel Estrada Sainz)"; 1760 " (Manuel Estrada Sainz)";
1761 1761
1762static int __init ezusb_module_init(void) 1762static int __init ezusb_module_init(void)
1763{ 1763{
@@ -1787,6 +1787,5 @@ module_init(ezusb_module_init);
1787module_exit(ezusb_module_exit); 1787module_exit(ezusb_module_exit);
1788 1788
1789MODULE_AUTHOR("Manuel Estrada Sainz"); 1789MODULE_AUTHOR("Manuel Estrada Sainz");
1790MODULE_DESCRIPTION 1790MODULE_DESCRIPTION("Driver for Orinoco wireless LAN cards using EZUSB bridge");
1791 ("Driver for Orinoco wireless LAN cards using EZUSB bridge");
1792MODULE_LICENSE("Dual MPL/GPL"); 1791MODULE_LICENSE("Dual MPL/GPL");
diff --git a/drivers/net/wireless/orinoco/spectrum_cs.c b/drivers/net/wireless/orinoco/spectrum_cs.c
index 81f3673d31d4..6e28ee4e9c52 100644
--- a/drivers/net/wireless/orinoco/spectrum_cs.c
+++ b/drivers/net/wireless/orinoco/spectrum_cs.c
@@ -11,9 +11,9 @@
11 * 11 *
12 * Copyright (C) 2002-2005 Pavel Roskin <proski@gnu.org> 12 * Copyright (C) 2002-2005 Pavel Roskin <proski@gnu.org>
13 * Portions based on orinoco_cs.c: 13 * Portions based on orinoco_cs.c:
14 * Copyright (C) David Gibson, Linuxcare Australia 14 * Copyright (C) David Gibson, Linuxcare Australia
15 * Portions based on Spectrum24tDnld.c from original spectrum24 driver: 15 * Portions based on Spectrum24tDnld.c from original spectrum24 driver:
16 * Copyright (C) Symbol Technologies. 16 * Copyright (C) Symbol Technologies.
17 * 17 *
18 * See copyright notice in file main.c. 18 * See copyright notice in file main.c.
19 */ 19 */
@@ -125,7 +125,7 @@ failed:
125} 125}
126 126
127/********************************************************************/ 127/********************************************************************/
128/* Device methods */ 128/* Device methods */
129/********************************************************************/ 129/********************************************************************/
130 130
131static int 131static int
@@ -150,7 +150,7 @@ spectrum_cs_stop_firmware(struct orinoco_private *priv, int idle)
150} 150}
151 151
152/********************************************************************/ 152/********************************************************************/
153/* PCMCIA stuff */ 153/* PCMCIA stuff */
154/********************************************************************/ 154/********************************************************************/
155 155
156static int 156static int
@@ -197,7 +197,7 @@ static int
197spectrum_cs_config(struct pcmcia_device *link) 197spectrum_cs_config(struct pcmcia_device *link)
198{ 198{
199 struct orinoco_private *priv = link->priv; 199 struct orinoco_private *priv = link->priv;
200 hermes_t *hw = &priv->hw; 200 struct hermes *hw = &priv->hw;
201 int ret; 201 int ret;
202 void __iomem *mem; 202 void __iomem *mem;
203 203
diff --git a/drivers/net/wireless/orinoco/wext.c b/drivers/net/wireless/orinoco/wext.c
index e793679e2e19..bbb9beb206b1 100644
--- a/drivers/net/wireless/orinoco/wext.c
+++ b/drivers/net/wireless/orinoco/wext.c
@@ -87,7 +87,7 @@ nomem:
87static struct iw_statistics *orinoco_get_wireless_stats(struct net_device *dev) 87static struct iw_statistics *orinoco_get_wireless_stats(struct net_device *dev)
88{ 88{
89 struct orinoco_private *priv = ndev_priv(dev); 89 struct orinoco_private *priv = ndev_priv(dev);
90 hermes_t *hw = &priv->hw; 90 struct hermes *hw = &priv->hw;
91 struct iw_statistics *wstats = &priv->wstats; 91 struct iw_statistics *wstats = &priv->wstats;
92 int err; 92 int err;
93 unsigned long flags; 93 unsigned long flags;
@@ -448,7 +448,7 @@ static int orinoco_ioctl_setfreq(struct net_device *dev,
448 } 448 }
449 449
450 if ((chan < 1) || (chan > NUM_CHANNELS) || 450 if ((chan < 1) || (chan > NUM_CHANNELS) ||
451 !(priv->channel_mask & (1 << (chan-1)))) 451 !(priv->channel_mask & (1 << (chan - 1))))
452 return -EINVAL; 452 return -EINVAL;
453 453
454 if (orinoco_lock(priv, &flags) != 0) 454 if (orinoco_lock(priv, &flags) != 0)
@@ -457,7 +457,7 @@ static int orinoco_ioctl_setfreq(struct net_device *dev,
457 priv->channel = chan; 457 priv->channel = chan;
458 if (priv->iw_mode == NL80211_IFTYPE_MONITOR) { 458 if (priv->iw_mode == NL80211_IFTYPE_MONITOR) {
459 /* Fast channel change - no commit if successful */ 459 /* Fast channel change - no commit if successful */
460 hermes_t *hw = &priv->hw; 460 struct hermes *hw = &priv->hw;
461 err = hw->ops->cmd_wait(hw, HERMES_CMD_TEST | 461 err = hw->ops->cmd_wait(hw, HERMES_CMD_TEST |
462 HERMES_TEST_SET_CHANNEL, 462 HERMES_TEST_SET_CHANNEL,
463 chan, NULL); 463 chan, NULL);
@@ -492,7 +492,7 @@ static int orinoco_ioctl_getsens(struct net_device *dev,
492 char *extra) 492 char *extra)
493{ 493{
494 struct orinoco_private *priv = ndev_priv(dev); 494 struct orinoco_private *priv = ndev_priv(dev);
495 hermes_t *hw = &priv->hw; 495 struct hermes *hw = &priv->hw;
496 u16 val; 496 u16 val;
497 int err; 497 int err;
498 unsigned long flags; 498 unsigned long flags;
@@ -668,7 +668,7 @@ static int orinoco_ioctl_getpower(struct net_device *dev,
668 char *extra) 668 char *extra)
669{ 669{
670 struct orinoco_private *priv = ndev_priv(dev); 670 struct orinoco_private *priv = ndev_priv(dev);
671 hermes_t *hw = &priv->hw; 671 struct hermes *hw = &priv->hw;
672 int err = 0; 672 int err = 0;
673 u16 enable, period, timeout, mcast; 673 u16 enable, period, timeout, mcast;
674 unsigned long flags; 674 unsigned long flags;
@@ -873,7 +873,7 @@ static int orinoco_ioctl_set_auth(struct net_device *dev,
873 union iwreq_data *wrqu, char *extra) 873 union iwreq_data *wrqu, char *extra)
874{ 874{
875 struct orinoco_private *priv = ndev_priv(dev); 875 struct orinoco_private *priv = ndev_priv(dev);
876 hermes_t *hw = &priv->hw; 876 struct hermes *hw = &priv->hw;
877 struct iw_param *param = &wrqu->param; 877 struct iw_param *param = &wrqu->param;
878 unsigned long flags; 878 unsigned long flags;
879 int ret = -EINPROGRESS; 879 int ret = -EINPROGRESS;
@@ -1269,7 +1269,7 @@ static int orinoco_ioctl_getrid(struct net_device *dev,
1269 char *extra) 1269 char *extra)
1270{ 1270{
1271 struct orinoco_private *priv = ndev_priv(dev); 1271 struct orinoco_private *priv = ndev_priv(dev);
1272 hermes_t *hw = &priv->hw; 1272 struct hermes *hw = &priv->hw;
1273 int rid = data->flags; 1273 int rid = data->flags;
1274 u16 length; 1274 u16 length;
1275 int err; 1275 int err;
diff --git a/drivers/net/wireless/rtlwifi/base.c b/drivers/net/wireless/rtlwifi/base.c
index bc13533a5418..0b598db38da9 100644
--- a/drivers/net/wireless/rtlwifi/base.c
+++ b/drivers/net/wireless/rtlwifi/base.c
@@ -27,6 +27,8 @@
27 * 27 *
28 *****************************************************************************/ 28 *****************************************************************************/
29 29
30#define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
31
30#include <linux/ip.h> 32#include <linux/ip.h>
31#include "wifi.h" 33#include "wifi.h"
32#include "rc.h" 34#include "rc.h"
@@ -397,8 +399,8 @@ void rtl_init_rfkill(struct ieee80211_hw *hw)
397 radio_state = rtlpriv->cfg->ops->radio_onoff_checking(hw, &valid); 399 radio_state = rtlpriv->cfg->ops->radio_onoff_checking(hw, &valid);
398 400
399 if (valid) { 401 if (valid) {
400 printk(KERN_INFO "rtlwifi: wireless switch is %s\n", 402 pr_info("wireless switch is %s\n",
401 rtlpriv->rfkill.rfkill_state ? "on" : "off"); 403 rtlpriv->rfkill.rfkill_state ? "on" : "off");
402 404
403 rtlpriv->rfkill.rfkill_state = radio_state; 405 rtlpriv->rfkill.rfkill_state = radio_state;
404 406
@@ -756,18 +758,17 @@ bool rtl_action_proc(struct ieee80211_hw *hw, struct sk_buff *skb, u8 is_tx)
756 return false; 758 return false;
757 759
758 RT_TRACE(rtlpriv, (COMP_SEND | COMP_RECV), DBG_DMESG, 760 RT_TRACE(rtlpriv, (COMP_SEND | COMP_RECV), DBG_DMESG,
759 ("%s ACT_ADDBAREQ From :" MAC_FMT "\n", 761 ("%s ACT_ADDBAREQ From :%pM\n",
760 is_tx ? "Tx" : "Rx", MAC_ARG(hdr->addr2))); 762 is_tx ? "Tx" : "Rx", hdr->addr2));
761 break; 763 break;
762 case ACT_ADDBARSP: 764 case ACT_ADDBARSP:
763 RT_TRACE(rtlpriv, (COMP_SEND | COMP_RECV), DBG_DMESG, 765 RT_TRACE(rtlpriv, (COMP_SEND | COMP_RECV), DBG_DMESG,
764 ("%s ACT_ADDBARSP From :" MAC_FMT "\n", 766 ("%s ACT_ADDBARSP From :%pM\n",
765 is_tx ? "Tx" : "Rx", MAC_ARG(hdr->addr2))); 767 is_tx ? "Tx" : "Rx", hdr->addr2));
766 break; 768 break;
767 case ACT_DELBA: 769 case ACT_DELBA:
768 RT_TRACE(rtlpriv, (COMP_SEND | COMP_RECV), DBG_DMESG, 770 RT_TRACE(rtlpriv, (COMP_SEND | COMP_RECV), DBG_DMESG,
769 ("ACT_ADDBADEL From :" MAC_FMT "\n", 771 ("ACT_ADDBADEL From :%pM\n", hdr->addr2));
770 MAC_ARG(hdr->addr2)));
771 break; 772 break;
772 } 773 }
773 break; 774 break;
@@ -1402,8 +1403,7 @@ MODULE_DESCRIPTION("Realtek 802.11n PCI wireless core");
1402static int __init rtl_core_module_init(void) 1403static int __init rtl_core_module_init(void)
1403{ 1404{
1404 if (rtl_rate_control_register()) 1405 if (rtl_rate_control_register())
1405 printk(KERN_ERR "rtlwifi: Unable to register rtl_rc," 1406 pr_err("Unable to register rtl_rc, use default RC !!\n");
1406 "use default RC !!\n");
1407 1407
1408 return 0; 1408 return 0;
1409} 1409}
diff --git a/drivers/net/wireless/rtlwifi/cam.c b/drivers/net/wireless/rtlwifi/cam.c
index 7295af0536b7..7babb6acd957 100644
--- a/drivers/net/wireless/rtlwifi/cam.c
+++ b/drivers/net/wireless/rtlwifi/cam.c
@@ -27,6 +27,8 @@
27 * 27 *
28 *****************************************************************************/ 28 *****************************************************************************/
29 29
30#define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
31
30#include "wifi.h" 32#include "wifi.h"
31#include "cam.h" 33#include "cam.h"
32 34
@@ -131,9 +133,9 @@ u8 rtl_cam_add_one_entry(struct ieee80211_hw *hw, u8 *mac_addr,
131 133
132 RT_TRACE(rtlpriv, COMP_SEC, DBG_DMESG, 134 RT_TRACE(rtlpriv, COMP_SEC, DBG_DMESG,
133 ("EntryNo:%x, ulKeyId=%x, ulEncAlg=%x, " 135 ("EntryNo:%x, ulKeyId=%x, ulEncAlg=%x, "
134 "ulUseDK=%x MacAddr" MAC_FMT "\n", 136 "ulUseDK=%x MacAddr %pM\n",
135 ul_entry_idx, ul_key_id, ul_enc_alg, 137 ul_entry_idx, ul_key_id, ul_enc_alg,
136 ul_default_key, MAC_ARG(mac_addr))); 138 ul_default_key, mac_addr));
137 139
138 if (ul_key_id == TOTAL_CAM_ENTRY) { 140 if (ul_key_id == TOTAL_CAM_ENTRY) {
139 RT_TRACE(rtlpriv, COMP_ERR, DBG_WARNING, 141 RT_TRACE(rtlpriv, COMP_ERR, DBG_WARNING,
@@ -347,7 +349,7 @@ void rtl_cam_del_entry(struct ieee80211_hw *hw, u8 *sta_addr)
347 /* Remove from HW Security CAM */ 349 /* Remove from HW Security CAM */
348 memset(rtlpriv->sec.hwsec_cam_sta_addr[i], 0, ETH_ALEN); 350 memset(rtlpriv->sec.hwsec_cam_sta_addr[i], 0, ETH_ALEN);
349 rtlpriv->sec.hwsec_cam_bitmap &= ~(BIT(0) << i); 351 rtlpriv->sec.hwsec_cam_bitmap &= ~(BIT(0) << i);
350 printk(KERN_INFO "&&&&&&&&&del entry %d\n", i); 352 pr_info("&&&&&&&&&del entry %d\n", i);
351 } 353 }
352 } 354 }
353 return; 355 return;
diff --git a/drivers/net/wireless/rtlwifi/core.c b/drivers/net/wireless/rtlwifi/core.c
index 03ce69660b26..1bdc1aa305c0 100644
--- a/drivers/net/wireless/rtlwifi/core.c
+++ b/drivers/net/wireless/rtlwifi/core.c
@@ -456,7 +456,7 @@ static int rtl_op_sta_add(struct ieee80211_hw *hw,
456 sta_entry->wireless_mode = WIRELESS_MODE_G; 456 sta_entry->wireless_mode = WIRELESS_MODE_G;
457 457
458 RT_TRACE(rtlpriv, COMP_MAC80211, DBG_DMESG, 458 RT_TRACE(rtlpriv, COMP_MAC80211, DBG_DMESG,
459 ("Add sta addr is "MAC_FMT"\n", MAC_ARG(sta->addr))); 459 ("Add sta addr is %pM\n", sta->addr));
460 rtlpriv->cfg->ops->update_rate_tbl(hw, sta, 0); 460 rtlpriv->cfg->ops->update_rate_tbl(hw, sta, 0);
461 } 461 }
462 return 0; 462 return 0;
@@ -469,7 +469,7 @@ static int rtl_op_sta_remove(struct ieee80211_hw *hw,
469 struct rtl_sta_info *sta_entry; 469 struct rtl_sta_info *sta_entry;
470 if (sta) { 470 if (sta) {
471 RT_TRACE(rtlpriv, COMP_MAC80211, DBG_DMESG, 471 RT_TRACE(rtlpriv, COMP_MAC80211, DBG_DMESG,
472 ("Remove sta addr is "MAC_FMT"\n", MAC_ARG(sta->addr))); 472 ("Remove sta addr is %pM\n", sta->addr));
473 sta_entry = (struct rtl_sta_info *) sta->drv_priv; 473 sta_entry = (struct rtl_sta_info *) sta->drv_priv;
474 sta_entry->wireless_mode = 0; 474 sta_entry->wireless_mode = 0;
475 sta_entry->ratr_index = 0; 475 sta_entry->ratr_index = 0;
@@ -678,7 +678,7 @@ static void rtl_op_bss_info_changed(struct ieee80211_hw *hw,
678 (u8 *) bss_conf->bssid); 678 (u8 *) bss_conf->bssid);
679 679
680 RT_TRACE(rtlpriv, COMP_MAC80211, DBG_DMESG, 680 RT_TRACE(rtlpriv, COMP_MAC80211, DBG_DMESG,
681 (MAC_FMT "\n", MAC_ARG(bss_conf->bssid))); 681 ("%pM\n", bss_conf->bssid));
682 682
683 mac->vendor = PEER_UNKNOWN; 683 mac->vendor = PEER_UNKNOWN;
684 memcpy(mac->bssid, bss_conf->bssid, 6); 684 memcpy(mac->bssid, bss_conf->bssid, 6);
diff --git a/drivers/net/wireless/rtlwifi/debug.h b/drivers/net/wireless/rtlwifi/debug.h
index e4aa8687408c..160dd0685213 100644
--- a/drivers/net/wireless/rtlwifi/debug.h
+++ b/drivers/net/wireless/rtlwifi/debug.h
@@ -204,10 +204,5 @@ enum dbgp_flag_e {
204 } \ 204 } \
205 } while (0); 205 } while (0);
206 206
207#define MAC_FMT "%02x:%02x:%02x:%02x:%02x:%02x"
208#define MAC_ARG(x) \
209 ((u8 *)(x))[0], ((u8 *)(x))[1], ((u8 *)(x))[2],\
210 ((u8 *)(x))[3], ((u8 *)(x))[4], ((u8 *)(x))[5]
211
212void rtl_dbgp_flag_init(struct ieee80211_hw *hw); 207void rtl_dbgp_flag_init(struct ieee80211_hw *hw);
213#endif 208#endif
diff --git a/drivers/net/wireless/rtlwifi/rtl8192c/fw_common.c b/drivers/net/wireless/rtlwifi/rtl8192c/fw_common.c
index f9f2370e9256..49a064bdbce6 100644
--- a/drivers/net/wireless/rtlwifi/rtl8192c/fw_common.c
+++ b/drivers/net/wireless/rtlwifi/rtl8192c/fw_common.c
@@ -27,6 +27,8 @@
27 * 27 *
28 *****************************************************************************/ 28 *****************************************************************************/
29 29
30#define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
31
30#include <linux/firmware.h> 32#include <linux/firmware.h>
31#include "../wifi.h" 33#include "../wifi.h"
32#include "../pci.h" 34#include "../pci.h"
@@ -224,8 +226,7 @@ int rtl92c_download_fw(struct ieee80211_hw *hw)
224 u32 fwsize; 226 u32 fwsize;
225 enum version_8192c version = rtlhal->version; 227 enum version_8192c version = rtlhal->version;
226 228
227 printk(KERN_INFO "rtl8192c: Loading firmware file %s\n", 229 pr_info("Loading firmware file %s\n", rtlpriv->cfg->fw_name);
228 rtlpriv->cfg->fw_name);
229 if (!rtlhal->pfirmware) 230 if (!rtlhal->pfirmware)
230 return 1; 231 return 1;
231 232
diff --git a/drivers/net/wireless/rtlwifi/rtl8192ce/hw.c b/drivers/net/wireless/rtlwifi/rtl8192ce/hw.c
index 9e2a9e34a699..a3deaefa788c 100644
--- a/drivers/net/wireless/rtlwifi/rtl8192ce/hw.c
+++ b/drivers/net/wireless/rtlwifi/rtl8192ce/hw.c
@@ -1592,7 +1592,7 @@ static void _rtl92ce_read_adapter_info(struct ieee80211_hw *hw)
1592 } 1592 }
1593 1593
1594 RT_TRACE(rtlpriv, COMP_INIT, DBG_DMESG, 1594 RT_TRACE(rtlpriv, COMP_INIT, DBG_DMESG,
1595 (MAC_FMT "\n", MAC_ARG(rtlefuse->dev_addr))); 1595 ("%pM\n", rtlefuse->dev_addr));
1596 1596
1597 _rtl92ce_read_txpower_info_from_hwpg(hw, 1597 _rtl92ce_read_txpower_info_from_hwpg(hw,
1598 rtlefuse->autoload_failflag, 1598 rtlefuse->autoload_failflag,
diff --git a/drivers/net/wireless/rtlwifi/rtl8192cu/hw.c b/drivers/net/wireless/rtlwifi/rtl8192cu/hw.c
index 2b34764fbf73..814c05df51e8 100644
--- a/drivers/net/wireless/rtlwifi/rtl8192cu/hw.c
+++ b/drivers/net/wireless/rtlwifi/rtl8192cu/hw.c
@@ -27,6 +27,8 @@
27 * 27 *
28 *****************************************************************************/ 28 *****************************************************************************/
29 29
30#define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
31
30#include "../wifi.h" 32#include "../wifi.h"
31#include "../efuse.h" 33#include "../efuse.h"
32#include "../base.h" 34#include "../base.h"
@@ -337,7 +339,7 @@ static void _rtl92cu_read_board_type(struct ieee80211_hw *hw, u8 *contents)
337 rtlefuse->board_type = boardType; 339 rtlefuse->board_type = boardType;
338 if (IS_HIGHT_PA(rtlefuse->board_type)) 340 if (IS_HIGHT_PA(rtlefuse->board_type))
339 rtlefuse->external_pa = 1; 341 rtlefuse->external_pa = 1;
340 printk(KERN_INFO "rtl8192cu: Board Type %x\n", rtlefuse->board_type); 342 pr_info("Board Type %x\n", rtlefuse->board_type);
341 343
342#ifdef CONFIG_ANTENNA_DIVERSITY 344#ifdef CONFIG_ANTENNA_DIVERSITY
343 /* Antenna Diversity setting. */ 345 /* Antenna Diversity setting. */
@@ -346,8 +348,7 @@ static void _rtl92cu_read_board_type(struct ieee80211_hw *hw, u8 *contents)
346 else 348 else
347 rtl_efuse->antenna_cfg = registry_par->antdiv_cfg; /* 0:OFF, */ 349 rtl_efuse->antenna_cfg = registry_par->antdiv_cfg; /* 0:OFF, */
348 350
349 printk(KERN_INFO "rtl8192cu: Antenna Config %x\n", 351 pr_info("Antenna Config %x\n", rtl_efuse->antenna_cfg);
350 rtl_efuse->antenna_cfg);
351#endif 352#endif
352} 353}
353 354
@@ -384,71 +385,57 @@ static void _update_bt_param(_adapter *padapter)
384 pbtpriv->bBTNonTrafficModeSet = _FALSE; 385 pbtpriv->bBTNonTrafficModeSet = _FALSE;
385 pbtpriv->CurrentState = 0; 386 pbtpriv->CurrentState = 0;
386 pbtpriv->PreviousState = 0; 387 pbtpriv->PreviousState = 0;
387 printk(KERN_INFO "rtl8192cu: BT Coexistance = %s\n", 388 pr_info("BT Coexistance = %s\n",
388 (pbtpriv->BT_Coexist == _TRUE) ? "enable" : "disable"); 389 (pbtpriv->BT_Coexist == _TRUE) ? "enable" : "disable");
389 if (pbtpriv->BT_Coexist) { 390 if (pbtpriv->BT_Coexist) {
390 if (pbtpriv->BT_Ant_Num == Ant_x2) 391 if (pbtpriv->BT_Ant_Num == Ant_x2)
391 printk(KERN_INFO "rtl8192cu: BlueTooth BT_" 392 pr_info("BlueTooth BT_Ant_Num = Antx2\n");
392 "Ant_Num = Antx2\n");
393 else if (pbtpriv->BT_Ant_Num == Ant_x1) 393 else if (pbtpriv->BT_Ant_Num == Ant_x1)
394 printk(KERN_INFO "rtl8192cu: BlueTooth BT_" 394 pr_info("BlueTooth BT_Ant_Num = Antx1\n");
395 "Ant_Num = Antx1\n");
396 switch (pbtpriv->BT_CoexistType) { 395 switch (pbtpriv->BT_CoexistType) {
397 case BT_2Wire: 396 case BT_2Wire:
398 printk(KERN_INFO "rtl8192cu: BlueTooth BT_" 397 pr_info("BlueTooth BT_CoexistType = BT_2Wire\n");
399 "CoexistType = BT_2Wire\n");
400 break; 398 break;
401 case BT_ISSC_3Wire: 399 case BT_ISSC_3Wire:
402 printk(KERN_INFO "rtl8192cu: BlueTooth BT_" 400 pr_info("BlueTooth BT_CoexistType = BT_ISSC_3Wire\n");
403 "CoexistType = BT_ISSC_3Wire\n");
404 break; 401 break;
405 case BT_Accel: 402 case BT_Accel:
406 printk(KERN_INFO "rtl8192cu: BlueTooth BT_" 403 pr_info("BlueTooth BT_CoexistType = BT_Accel\n");
407 "CoexistType = BT_Accel\n");
408 break; 404 break;
409 case BT_CSR_BC4: 405 case BT_CSR_BC4:
410 printk(KERN_INFO "rtl8192cu: BlueTooth BT_" 406 pr_info("BlueTooth BT_CoexistType = BT_CSR_BC4\n");
411 "CoexistType = BT_CSR_BC4\n");
412 break; 407 break;
413 case BT_CSR_BC8: 408 case BT_CSR_BC8:
414 printk(KERN_INFO "rtl8192cu: BlueTooth BT_" 409 pr_info("BlueTooth BT_CoexistType = BT_CSR_BC8\n");
415 "CoexistType = BT_CSR_BC8\n");
416 break; 410 break;
417 case BT_RTL8756: 411 case BT_RTL8756:
418 printk(KERN_INFO "rtl8192cu: BlueTooth BT_" 412 pr_info("BlueTooth BT_CoexistType = BT_RTL8756\n");
419 "CoexistType = BT_RTL8756\n");
420 break; 413 break;
421 default: 414 default:
422 printk(KERN_INFO "rtl8192cu: BlueTooth BT_" 415 pr_info("BlueTooth BT_CoexistType = Unknown\n");
423 "CoexistType = Unknown\n");
424 break; 416 break;
425 } 417 }
426 printk(KERN_INFO "rtl8192cu: BlueTooth BT_Ant_isolation = %d\n", 418 pr_info("BlueTooth BT_Ant_isolation = %d\n",
427 pbtpriv->BT_Ant_isolation); 419 pbtpriv->BT_Ant_isolation);
428 switch (pbtpriv->BT_Service) { 420 switch (pbtpriv->BT_Service) {
429 case BT_OtherAction: 421 case BT_OtherAction:
430 printk(KERN_INFO "rtl8192cu: BlueTooth BT_Service = " 422 pr_info("BlueTooth BT_Service = BT_OtherAction\n");
431 "BT_OtherAction\n");
432 break; 423 break;
433 case BT_SCO: 424 case BT_SCO:
434 printk(KERN_INFO "rtl8192cu: BlueTooth BT_Service = " 425 pr_info("BlueTooth BT_Service = BT_SCO\n");
435 "BT_SCO\n");
436 break; 426 break;
437 case BT_Busy: 427 case BT_Busy:
438 printk(KERN_INFO "rtl8192cu: BlueTooth BT_Service = " 428 pr_info("BlueTooth BT_Service = BT_Busy\n");
439 "BT_Busy\n");
440 break; 429 break;
441 case BT_OtherBusy: 430 case BT_OtherBusy:
442 printk(KERN_INFO "rtl8192cu: BlueTooth BT_Service = " 431 pr_info("BlueTooth BT_Service = BT_OtherBusy\n");
443 "BT_OtherBusy\n");
444 break; 432 break;
445 default: 433 default:
446 printk(KERN_INFO "rtl8192cu: BlueTooth BT_Service = " 434 pr_info("BlueTooth BT_Service = BT_Idle\n");
447 "BT_Idle\n");
448 break; 435 break;
449 } 436 }
450 printk(KERN_INFO "rtl8192cu: BT_RadioSharedType = 0x%x\n", 437 pr_info("BT_RadioSharedType = 0x%x\n",
451 pbtpriv->BT_RadioSharedType); 438 pbtpriv->BT_RadioSharedType);
452 } 439 }
453} 440}
454 441
@@ -526,7 +513,7 @@ static void _rtl92cu_read_adapter_info(struct ieee80211_hw *hw)
526 usvalue = *(u16 *)&hwinfo[EEPROM_MAC_ADDR + i]; 513 usvalue = *(u16 *)&hwinfo[EEPROM_MAC_ADDR + i];
527 *((u16 *) (&rtlefuse->dev_addr[i])) = usvalue; 514 *((u16 *) (&rtlefuse->dev_addr[i])) = usvalue;
528 } 515 }
529 printk(KERN_INFO "rtl8192cu: MAC address: %pM\n", rtlefuse->dev_addr); 516 pr_info("MAC address: %pM\n", rtlefuse->dev_addr);
530 _rtl92cu_read_txpower_info_from_hwpg(hw, 517 _rtl92cu_read_txpower_info_from_hwpg(hw,
531 rtlefuse->autoload_failflag, hwinfo); 518 rtlefuse->autoload_failflag, hwinfo);
532 rtlefuse->eeprom_vid = *(u16 *)&hwinfo[EEPROM_VID]; 519 rtlefuse->eeprom_vid = *(u16 *)&hwinfo[EEPROM_VID];
@@ -665,7 +652,7 @@ static int _rtl92cu_init_power_on(struct ieee80211_hw *hw)
665 rtl_write_word(rtlpriv, REG_APS_FSMCO, value16); 652 rtl_write_word(rtlpriv, REG_APS_FSMCO, value16);
666 do { 653 do {
667 if (!(rtl_read_word(rtlpriv, REG_APS_FSMCO) & APFM_ONMAC)) { 654 if (!(rtl_read_word(rtlpriv, REG_APS_FSMCO) & APFM_ONMAC)) {
668 printk(KERN_INFO "rtl8192cu: MAC auto ON okay!\n"); 655 pr_info("MAC auto ON okay!\n");
669 break; 656 break;
670 } 657 }
671 if (pollingCount++ > 100) { 658 if (pollingCount++ > 100) {
@@ -819,7 +806,7 @@ static void _rtl92cu_init_chipN_one_out_ep_priority(struct ieee80211_hw *hw,
819 } 806 }
820 _rtl92c_init_chipN_reg_priority(hw, value, value, value, value, 807 _rtl92c_init_chipN_reg_priority(hw, value, value, value, value,
821 value, value); 808 value, value);
822 printk(KERN_INFO "rtl8192cu: Tx queue select: 0x%02x\n", queue_sel); 809 pr_info("Tx queue select: 0x%02x\n", queue_sel);
823} 810}
824 811
825static void _rtl92cu_init_chipN_two_out_ep_priority(struct ieee80211_hw *hw, 812static void _rtl92cu_init_chipN_two_out_ep_priority(struct ieee80211_hw *hw,
@@ -863,7 +850,7 @@ static void _rtl92cu_init_chipN_two_out_ep_priority(struct ieee80211_hw *hw,
863 hiQ = valueHi; 850 hiQ = valueHi;
864 } 851 }
865 _rtl92c_init_chipN_reg_priority(hw, beQ, bkQ, viQ, voQ, mgtQ, hiQ); 852 _rtl92c_init_chipN_reg_priority(hw, beQ, bkQ, viQ, voQ, mgtQ, hiQ);
866 printk(KERN_INFO "rtl8192cu: Tx queue select: 0x%02x\n", queue_sel); 853 pr_info("Tx queue select: 0x%02x\n", queue_sel);
867} 854}
868 855
869static void _rtl92cu_init_chipN_three_out_ep_priority(struct ieee80211_hw *hw, 856static void _rtl92cu_init_chipN_three_out_ep_priority(struct ieee80211_hw *hw,
diff --git a/drivers/net/wireless/rtlwifi/rtl8192cu/mac.c b/drivers/net/wireless/rtlwifi/rtl8192cu/mac.c
index a90c09b42390..194fc693c1fa 100644
--- a/drivers/net/wireless/rtlwifi/rtl8192cu/mac.c
+++ b/drivers/net/wireless/rtlwifi/rtl8192cu/mac.c
@@ -26,6 +26,9 @@
26 * Larry Finger <Larry.Finger@lwfinger.net> 26 * Larry Finger <Larry.Finger@lwfinger.net>
27 * 27 *
28****************************************************************************/ 28****************************************************************************/
29
30#define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
31
29#include <linux/module.h> 32#include <linux/module.h>
30 33
31#include "../wifi.h" 34#include "../wifi.h"
@@ -213,14 +216,14 @@ bool rtl92c_init_llt_table(struct ieee80211_hw *hw, u32 boundary)
213 for (i = 0; i < (boundary - 1); i++) { 216 for (i = 0; i < (boundary - 1); i++) {
214 rst = rtl92c_llt_write(hw, i , i + 1); 217 rst = rtl92c_llt_write(hw, i , i + 1);
215 if (true != rst) { 218 if (true != rst) {
216 printk(KERN_ERR "===> %s #1 fail\n", __func__); 219 pr_err("===> %s #1 fail\n", __func__);
217 return rst; 220 return rst;
218 } 221 }
219 } 222 }
220 /* end of list */ 223 /* end of list */
221 rst = rtl92c_llt_write(hw, (boundary - 1), 0xFF); 224 rst = rtl92c_llt_write(hw, (boundary - 1), 0xFF);
222 if (true != rst) { 225 if (true != rst) {
223 printk(KERN_ERR "===> %s #2 fail\n", __func__); 226 pr_err("===> %s #2 fail\n", __func__);
224 return rst; 227 return rst;
225 } 228 }
226 /* Make the other pages as ring buffer 229 /* Make the other pages as ring buffer
@@ -231,14 +234,14 @@ bool rtl92c_init_llt_table(struct ieee80211_hw *hw, u32 boundary)
231 for (i = boundary; i < LLT_LAST_ENTRY_OF_TX_PKT_BUFFER; i++) { 234 for (i = boundary; i < LLT_LAST_ENTRY_OF_TX_PKT_BUFFER; i++) {
232 rst = rtl92c_llt_write(hw, i, (i + 1)); 235 rst = rtl92c_llt_write(hw, i, (i + 1));
233 if (true != rst) { 236 if (true != rst) {
234 printk(KERN_ERR "===> %s #3 fail\n", __func__); 237 pr_err("===> %s #3 fail\n", __func__);
235 return rst; 238 return rst;
236 } 239 }
237 } 240 }
238 /* Let last entry point to the start entry of ring buffer */ 241 /* Let last entry point to the start entry of ring buffer */
239 rst = rtl92c_llt_write(hw, LLT_LAST_ENTRY_OF_TX_PKT_BUFFER, boundary); 242 rst = rtl92c_llt_write(hw, LLT_LAST_ENTRY_OF_TX_PKT_BUFFER, boundary);
240 if (true != rst) { 243 if (true != rst) {
241 printk(KERN_ERR "===> %s #4 fail\n", __func__); 244 pr_err("===> %s #4 fail\n", __func__);
242 return rst; 245 return rst;
243 } 246 }
244 return rst; 247 return rst;
diff --git a/drivers/net/wireless/rtlwifi/rtl8192de/hw.c b/drivers/net/wireless/rtlwifi/rtl8192de/hw.c
index 5a65bea4cb8f..0073cf106af2 100644
--- a/drivers/net/wireless/rtlwifi/rtl8192de/hw.c
+++ b/drivers/net/wireless/rtlwifi/rtl8192de/hw.c
@@ -1829,7 +1829,7 @@ static void _rtl92de_read_adapter_info(struct ieee80211_hw *hw)
1829 rtlpriv->cfg->ops->set_hw_reg(hw, HW_VAR_ETHER_ADDR, 1829 rtlpriv->cfg->ops->set_hw_reg(hw, HW_VAR_ETHER_ADDR,
1830 rtlefuse->dev_addr); 1830 rtlefuse->dev_addr);
1831 RT_TRACE(rtlpriv, COMP_INIT, DBG_DMESG, 1831 RT_TRACE(rtlpriv, COMP_INIT, DBG_DMESG,
1832 (MAC_FMT "\n", MAC_ARG(rtlefuse->dev_addr))); 1832 ("%pM\n", rtlefuse->dev_addr));
1833 _rtl92de_read_txpower_info(hw, rtlefuse->autoload_failflag, hwinfo); 1833 _rtl92de_read_txpower_info(hw, rtlefuse->autoload_failflag, hwinfo);
1834 1834
1835 /* Read Channel Plan */ 1835 /* Read Channel Plan */
diff --git a/drivers/net/wireless/rtlwifi/rtl8192de/sw.c b/drivers/net/wireless/rtlwifi/rtl8192de/sw.c
index 08837744f6f1..351765df517d 100644
--- a/drivers/net/wireless/rtlwifi/rtl8192de/sw.c
+++ b/drivers/net/wireless/rtlwifi/rtl8192de/sw.c
@@ -27,6 +27,8 @@
27 * 27 *
28 *****************************************************************************/ 28 *****************************************************************************/
29 29
30#define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
31
30#include <linux/vmalloc.h> 32#include <linux/vmalloc.h>
31 33
32#include "../wifi.h" 34#include "../wifi.h"
@@ -170,10 +172,8 @@ static int rtl92d_init_sw_vars(struct ieee80211_hw *hw)
170 } 172 }
171 173
172 if (!header_print) { 174 if (!header_print) {
173 printk(KERN_INFO "rtl8192de: Driver for Realtek RTL8192DE" 175 pr_info("Driver for Realtek RTL8192DE WLAN interface\n");
174 " WLAN interface"); 176 pr_info("Loading firmware file %s\n", rtlpriv->cfg->fw_name);
175 printk(KERN_INFO "rtl8192de: Loading firmware file %s\n",
176 rtlpriv->cfg->fw_name);
177 header_print++; 177 header_print++;
178 } 178 }
179 /* request fw */ 179 /* request fw */
diff --git a/drivers/net/wireless/rtlwifi/rtl8192se/hw.c b/drivers/net/wireless/rtlwifi/rtl8192se/hw.c
index b1d0213dc60e..d59f66cb7768 100644
--- a/drivers/net/wireless/rtlwifi/rtl8192se/hw.c
+++ b/drivers/net/wireless/rtlwifi/rtl8192se/hw.c
@@ -27,6 +27,8 @@
27 * 27 *
28 *****************************************************************************/ 28 *****************************************************************************/
29 29
30#define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
31
30#include "../wifi.h" 32#include "../wifi.h"
31#include "../efuse.h" 33#include "../efuse.h"
32#include "../base.h" 34#include "../base.h"
@@ -465,8 +467,7 @@ static u8 _rtl92ce_halset_sysclk(struct ieee80211_hw *hw, u8 data)
465 if ((tmpvalue & BIT(6))) 467 if ((tmpvalue & BIT(6)))
466 break; 468 break;
467 469
468 printk(KERN_ERR "wait for BIT(6) return value %x\n", 470 pr_err("wait for BIT(6) return value %x\n", tmpvalue);
469 tmpvalue);
470 if (waitcount == 0) 471 if (waitcount == 0)
471 break; 472 break;
472 473
@@ -1255,8 +1256,7 @@ static u8 _rtl92s_set_sysclk(struct ieee80211_hw *hw, u8 data)
1255 if ((tmp & BIT(6))) 1256 if ((tmp & BIT(6)))
1256 break; 1257 break;
1257 1258
1258 printk(KERN_ERR "wait for BIT(6) return value %x\n", 1259 pr_err("wait for BIT(6) return value %x\n", tmp);
1259 tmp);
1260 1260
1261 if (waitcnt == 0) 1261 if (waitcnt == 0)
1262 break; 1262 break;
@@ -1315,7 +1315,7 @@ static void _rtl92s_phy_set_rfhalt(struct ieee80211_hw *hw)
1315 if (u1btmp & BIT(7)) { 1315 if (u1btmp & BIT(7)) {
1316 u1btmp &= ~(BIT(6) | BIT(7)); 1316 u1btmp &= ~(BIT(6) | BIT(7));
1317 if (!_rtl92s_set_sysclk(hw, u1btmp)) { 1317 if (!_rtl92s_set_sysclk(hw, u1btmp)) {
1318 printk(KERN_ERR "Switch ctrl path fail\n"); 1318 pr_err("Switch ctrl path fail\n");
1319 return; 1319 return;
1320 } 1320 }
1321 } 1321 }
@@ -1682,7 +1682,7 @@ static void _rtl92se_read_adapter_info(struct ieee80211_hw *hw)
1682 rtl_write_byte(rtlpriv, MACIDR0 + i, rtlefuse->dev_addr[i]); 1682 rtl_write_byte(rtlpriv, MACIDR0 + i, rtlefuse->dev_addr[i]);
1683 1683
1684 RT_TRACE(rtlpriv, COMP_INIT, DBG_DMESG, 1684 RT_TRACE(rtlpriv, COMP_INIT, DBG_DMESG,
1685 (MAC_FMT "\n", MAC_ARG(rtlefuse->dev_addr))); 1685 ("%pM\n", rtlefuse->dev_addr));
1686 1686
1687 /* Get Tx Power Level by Channel */ 1687 /* Get Tx Power Level by Channel */
1688 /* Read Tx power of Channel 1 ~ 14 from EEPROM. */ 1688 /* Read Tx power of Channel 1 ~ 14 from EEPROM. */
diff --git a/drivers/net/wireless/rtlwifi/rtl8192se/phy.c b/drivers/net/wireless/rtlwifi/rtl8192se/phy.c
index 81a5aa4370cf..f27171af979c 100644
--- a/drivers/net/wireless/rtlwifi/rtl8192se/phy.c
+++ b/drivers/net/wireless/rtlwifi/rtl8192se/phy.c
@@ -27,6 +27,8 @@
27 * 27 *
28 *****************************************************************************/ 28 *****************************************************************************/
29 29
30#define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
31
30#include "../wifi.h" 32#include "../wifi.h"
31#include "../pci.h" 33#include "../pci.h"
32#include "../ps.h" 34#include "../ps.h"
@@ -1016,8 +1018,7 @@ static bool _rtl92s_phy_bb_config_parafile(struct ieee80211_hw *hw)
1016 rtstatus = _rtl92s_phy_config_bb(hw, BASEBAND_CONFIG_AGC_TAB); 1018 rtstatus = _rtl92s_phy_config_bb(hw, BASEBAND_CONFIG_AGC_TAB);
1017 1019
1018 if (rtstatus != true) { 1020 if (rtstatus != true) {
1019 printk(KERN_ERR "_rtl92s_phy_bb_config_parafile(): " 1021 pr_err("%s(): AGC Table Fail\n", __func__);
1020 "AGC Table Fail\n");
1021 goto phy_BB8190_Config_ParaFile_Fail; 1022 goto phy_BB8190_Config_ParaFile_Fail;
1022 } 1023 }
1023 1024
diff --git a/drivers/net/wireless/rtlwifi/rtl8192se/rf.c b/drivers/net/wireless/rtlwifi/rtl8192se/rf.c
index c6e3a4ca42f9..0ad50fe44aa2 100644
--- a/drivers/net/wireless/rtlwifi/rtl8192se/rf.c
+++ b/drivers/net/wireless/rtlwifi/rtl8192se/rf.c
@@ -27,6 +27,8 @@
27 * 27 *
28 *****************************************************************************/ 28 *****************************************************************************/
29 29
30#define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
31
30#include "../wifi.h" 32#include "../wifi.h"
31#include "reg.h" 33#include "reg.h"
32#include "def.h" 34#include "def.h"
@@ -507,7 +509,7 @@ bool rtl92s_phy_rf6052_config(struct ieee80211_hw *hw)
507 } 509 }
508 510
509 if (rtstatus != true) { 511 if (rtstatus != true) {
510 printk(KERN_ERR "Radio[%d] Fail!!", rfpath); 512 pr_err("Radio[%d] Fail!!\n", rfpath);
511 goto fail; 513 goto fail;
512 } 514 }
513 515
diff --git a/drivers/net/wireless/rtlwifi/rtl8192se/sw.c b/drivers/net/wireless/rtlwifi/rtl8192se/sw.c
index 1c6cb1d7d660..3876078a63de 100644
--- a/drivers/net/wireless/rtlwifi/rtl8192se/sw.c
+++ b/drivers/net/wireless/rtlwifi/rtl8192se/sw.c
@@ -27,6 +27,8 @@
27 * 27 *
28 *****************************************************************************/ 28 *****************************************************************************/
29 29
30#define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
31
30#include <linux/vmalloc.h> 32#include <linux/vmalloc.h>
31 33
32#include "../wifi.h" 34#include "../wifi.h"
@@ -183,8 +185,8 @@ static int rtl92s_init_sw_vars(struct ieee80211_hw *hw)
183 return 1; 185 return 1;
184 } 186 }
185 187
186 printk(KERN_INFO "rtl8192se: Driver for Realtek RTL8192SE/RTL8191SE\n" 188 pr_info("Driver for Realtek RTL8192SE/RTL8191SE\n"
187 " Loading firmware %s\n", rtlpriv->cfg->fw_name); 189 "Loading firmware %s\n", rtlpriv->cfg->fw_name);
188 /* request fw */ 190 /* request fw */
189 err = request_firmware(&firmware, rtlpriv->cfg->fw_name, 191 err = request_firmware(&firmware, rtlpriv->cfg->fw_name,
190 rtlpriv->io.dev); 192 rtlpriv->io.dev);
diff --git a/drivers/net/wireless/rtlwifi/usb.c b/drivers/net/wireless/rtlwifi/usb.c
index a9367eba1ea7..8b1cef0ffde6 100644
--- a/drivers/net/wireless/rtlwifi/usb.c
+++ b/drivers/net/wireless/rtlwifi/usb.c
@@ -24,6 +24,9 @@
24 * Hsinchu 300, Taiwan. 24 * Hsinchu 300, Taiwan.
25 * 25 *
26 *****************************************************************************/ 26 *****************************************************************************/
27
28#define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
29
27#include <linux/usb.h> 30#include <linux/usb.h>
28#include "core.h" 31#include "core.h"
29#include "wifi.h" 32#include "wifi.h"
@@ -104,9 +107,8 @@ static int _usbctrl_vendorreq_sync_read(struct usb_device *udev, u8 request,
104 pdata, len, 0); /* max. timeout */ 107 pdata, len, 0); /* max. timeout */
105 108
106 if (status < 0) 109 if (status < 0)
107 printk(KERN_ERR "reg 0x%x, usbctrl_vendorreq TimeOut! " 110 pr_err("reg 0x%x, usbctrl_vendorreq TimeOut! status:0x%x value=0x%x\n",
108 "status:0x%x value=0x%x\n", value, status, 111 value, status, *(u32 *)pdata);
109 *(u32 *)pdata);
110 return status; 112 return status;
111} 113}
112 114
@@ -316,7 +318,7 @@ static int _rtl_usb_init_rx(struct ieee80211_hw *hw)
316 rtlusb->usb_rx_segregate_hdl = 318 rtlusb->usb_rx_segregate_hdl =
317 rtlpriv->cfg->usb_interface_cfg->usb_rx_segregate_hdl; 319 rtlpriv->cfg->usb_interface_cfg->usb_rx_segregate_hdl;
318 320
319 printk(KERN_INFO "rtl8192cu: rx_max_size %d, rx_urb_num %d, in_ep %d\n", 321 pr_info("rx_max_size %d, rx_urb_num %d, in_ep %d\n",
320 rtlusb->rx_max_size, rtlusb->rx_urb_num, rtlusb->in_ep); 322 rtlusb->rx_max_size, rtlusb->rx_urb_num, rtlusb->in_ep);
321 init_usb_anchor(&rtlusb->rx_submitted); 323 init_usb_anchor(&rtlusb->rx_submitted);
322 return 0; 324 return 0;
@@ -580,7 +582,7 @@ static void _rtl_rx_completed(struct urb *_urb)
580 } else{ 582 } else{
581 /* TO DO */ 583 /* TO DO */
582 _rtl_rx_pre_process(hw, skb); 584 _rtl_rx_pre_process(hw, skb);
583 printk(KERN_ERR "rtlwifi: rx agg not supported\n"); 585 pr_err("rx agg not supported\n");
584 } 586 }
585 goto resubmit; 587 goto resubmit;
586 } 588 }
diff --git a/drivers/ssb/main.c b/drivers/ssb/main.c
index 57b7b6460896..6ec6e099fe04 100644
--- a/drivers/ssb/main.c
+++ b/drivers/ssb/main.c
@@ -1266,7 +1266,10 @@ u32 ssb_dma_translation(struct ssb_device *dev)
1266 case SSB_BUSTYPE_SSB: 1266 case SSB_BUSTYPE_SSB:
1267 return 0; 1267 return 0;
1268 case SSB_BUSTYPE_PCI: 1268 case SSB_BUSTYPE_PCI:
1269 return SSB_PCI_DMA; 1269 if (ssb_read32(dev, SSB_TMSHIGH) & SSB_TMSHIGH_DMA64)
1270 return SSB_PCIE_DMA_H32;
1271 else
1272 return SSB_PCI_DMA;
1270 default: 1273 default:
1271 __ssb_dma_not_implemented(dev); 1274 __ssb_dma_not_implemented(dev);
1272 } 1275 }