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authorTomi Valkeinen <tomi.valkeinen@ti.com>2012-05-15 08:31:01 -0400
committerTomi Valkeinen <tomi.valkeinen@ti.com>2012-05-22 03:59:13 -0400
commit3568f2a46f2a73bab18c914df06afd98a97e0e0e (patch)
treeff90a459d943101693a74e4ccf44112d1e9d3423 /drivers
parent6f28c2964b535f9439d52c437aa2fbfef7ed149c (diff)
OMAPDSS: use DSI_FIFO_BUG workaround only for manual update displays
There is a problem related to DSS FIFO thresholds and power management on OMAP3. It seems that when the full PM hits in, we get underflows. The core reason is unknown, but after experiments it looks like only particular FIFO thresholds work correctly. This bug is related to an earlier patch, which added special FIFO threshold configuration for OMAP3, because DSI command mode output didn't work with the normal threshold configuration. However, as the above work-around worked fine for other output types also, we currently always configure thresholds in this special way on OMAP3. In theory there should be negligible difference with this special way and the standard way. The first paragraph explains what happens in practice. This patch changes the driver to use the special threshold configuration only when the output is a manual update display on OMAP3. This does include RFBI displays also, and although it hasn't been tested (no boards using RFBI) I suspect the similar behaviour is present there also, as the DISPC side should work similarly for DSI command mode and RFBI. Signed-off-by: Tomi Valkeinen <tomi.valkeinen@ti.com> Cc: Joe Woodward <jw@terrafix.co.uk>
Diffstat (limited to 'drivers')
-rw-r--r--drivers/video/omap2/dss/apply.c2
-rw-r--r--drivers/video/omap2/dss/dispc.c5
-rw-r--r--drivers/video/omap2/dss/dss.h3
3 files changed, 6 insertions, 4 deletions
diff --git a/drivers/video/omap2/dss/apply.c b/drivers/video/omap2/dss/apply.c
index dd88b8f936c4..ab22cc224f3e 100644
--- a/drivers/video/omap2/dss/apply.c
+++ b/drivers/video/omap2/dss/apply.c
@@ -966,7 +966,7 @@ static void dss_ovl_setup_fifo(struct omap_overlay *ovl,
966 return; 966 return;
967 967
968 dispc_ovl_compute_fifo_thresholds(ovl->id, &fifo_low, &fifo_high, 968 dispc_ovl_compute_fifo_thresholds(ovl->id, &fifo_low, &fifo_high,
969 use_fifo_merge); 969 use_fifo_merge, ovl_manual_update(ovl));
970 970
971 dss_apply_ovl_fifo_thresholds(ovl, fifo_low, fifo_high); 971 dss_apply_ovl_fifo_thresholds(ovl, fifo_low, fifo_high);
972} 972}
diff --git a/drivers/video/omap2/dss/dispc.c b/drivers/video/omap2/dss/dispc.c
index b81fafac35b8..ac71fec1dbba 100644
--- a/drivers/video/omap2/dss/dispc.c
+++ b/drivers/video/omap2/dss/dispc.c
@@ -1031,7 +1031,8 @@ void dispc_enable_fifomerge(bool enable)
1031} 1031}
1032 1032
1033void dispc_ovl_compute_fifo_thresholds(enum omap_plane plane, 1033void dispc_ovl_compute_fifo_thresholds(enum omap_plane plane,
1034 u32 *fifo_low, u32 *fifo_high, bool use_fifomerge) 1034 u32 *fifo_low, u32 *fifo_high, bool use_fifomerge,
1035 bool manual_update)
1035{ 1036{
1036 /* 1037 /*
1037 * All sizes are in bytes. Both the buffer and burst are made of 1038 * All sizes are in bytes. Both the buffer and burst are made of
@@ -1059,7 +1060,7 @@ void dispc_ovl_compute_fifo_thresholds(enum omap_plane plane,
1059 * combined fifo size 1060 * combined fifo size
1060 */ 1061 */
1061 1062
1062 if (dss_has_feature(FEAT_OMAP3_DSI_FIFO_BUG)) { 1063 if (manual_update && dss_has_feature(FEAT_OMAP3_DSI_FIFO_BUG)) {
1063 *fifo_low = ovl_fifo_size - burst_size * 2; 1064 *fifo_low = ovl_fifo_size - burst_size * 2;
1064 *fifo_high = total_fifo_size - burst_size; 1065 *fifo_high = total_fifo_size - burst_size;
1065 } else { 1066 } else {
diff --git a/drivers/video/omap2/dss/dss.h b/drivers/video/omap2/dss/dss.h
index 4aa9529a4768..dd1092ceaeef 100644
--- a/drivers/video/omap2/dss/dss.h
+++ b/drivers/video/omap2/dss/dss.h
@@ -395,7 +395,8 @@ int dispc_calc_clock_rates(unsigned long dispc_fclk_rate,
395 395
396void dispc_ovl_set_fifo_threshold(enum omap_plane plane, u32 low, u32 high); 396void dispc_ovl_set_fifo_threshold(enum omap_plane plane, u32 low, u32 high);
397void dispc_ovl_compute_fifo_thresholds(enum omap_plane plane, 397void dispc_ovl_compute_fifo_thresholds(enum omap_plane plane,
398 u32 *fifo_low, u32 *fifo_high, bool use_fifomerge); 398 u32 *fifo_low, u32 *fifo_high, bool use_fifomerge,
399 bool manual_update);
399int dispc_ovl_setup(enum omap_plane plane, struct omap_overlay_info *oi, 400int dispc_ovl_setup(enum omap_plane plane, struct omap_overlay_info *oi,
400 bool ilace, bool replication, 401 bool ilace, bool replication,
401 const struct omap_video_timings *mgr_timings); 402 const struct omap_video_timings *mgr_timings);