diff options
author | Ingo Molnar <mingo@kernel.org> | 2012-07-31 11:05:27 -0400 |
---|---|---|
committer | Ingo Molnar <mingo@kernel.org> | 2012-07-31 11:05:27 -0400 |
commit | 1f815faec46e83bc96039797151846b60875bb06 (patch) | |
tree | 41a874f8090e3f69c8a9f13e3c85dd7a371e569b /drivers | |
parent | b44d50dcacea0d485ca2ff9140f8cc28ee22f28d (diff) | |
parent | e2b34e311be3a57c9abcb927e37a57e38913714c (diff) |
Merge branch 'linus' into timers/urgent
Merge in Linus's branch which already has timers/core merged.
Signed-off-by: Ingo Molnar <mingo@kernel.org>
Diffstat (limited to 'drivers')
61 files changed, 921 insertions, 729 deletions
diff --git a/drivers/base/dd.c b/drivers/base/dd.c index dcb8a6e48692..4b01ab3d2c24 100644 --- a/drivers/base/dd.c +++ b/drivers/base/dd.c | |||
@@ -24,6 +24,7 @@ | |||
24 | #include <linux/wait.h> | 24 | #include <linux/wait.h> |
25 | #include <linux/async.h> | 25 | #include <linux/async.h> |
26 | #include <linux/pm_runtime.h> | 26 | #include <linux/pm_runtime.h> |
27 | #include <scsi/scsi_scan.h> | ||
27 | 28 | ||
28 | #include "base.h" | 29 | #include "base.h" |
29 | #include "power/power.h" | 30 | #include "power/power.h" |
@@ -332,6 +333,7 @@ void wait_for_device_probe(void) | |||
332 | /* wait for the known devices to complete their probing */ | 333 | /* wait for the known devices to complete their probing */ |
333 | wait_event(probe_waitqueue, atomic_read(&probe_count) == 0); | 334 | wait_event(probe_waitqueue, atomic_read(&probe_count) == 0); |
334 | async_synchronize_full(); | 335 | async_synchronize_full(); |
336 | scsi_complete_async_scans(); | ||
335 | } | 337 | } |
336 | EXPORT_SYMBOL_GPL(wait_for_device_probe); | 338 | EXPORT_SYMBOL_GPL(wait_for_device_probe); |
337 | 339 | ||
diff --git a/drivers/block/rbd.c b/drivers/block/rbd.c index 65665c9c42c6..8f428a8ab003 100644 --- a/drivers/block/rbd.c +++ b/drivers/block/rbd.c | |||
@@ -499,7 +499,7 @@ static int rbd_header_from_disk(struct rbd_image_header *header, | |||
499 | / sizeof (*ondisk)) | 499 | / sizeof (*ondisk)) |
500 | return -EINVAL; | 500 | return -EINVAL; |
501 | header->snapc = kmalloc(sizeof(struct ceph_snap_context) + | 501 | header->snapc = kmalloc(sizeof(struct ceph_snap_context) + |
502 | snap_count * sizeof (*ondisk), | 502 | snap_count * sizeof(u64), |
503 | gfp_flags); | 503 | gfp_flags); |
504 | if (!header->snapc) | 504 | if (!header->snapc) |
505 | return -ENOMEM; | 505 | return -ENOMEM; |
@@ -977,7 +977,7 @@ static void rbd_req_cb(struct ceph_osd_request *req, struct ceph_msg *msg) | |||
977 | op = (void *)(replyhead + 1); | 977 | op = (void *)(replyhead + 1); |
978 | rc = le32_to_cpu(replyhead->result); | 978 | rc = le32_to_cpu(replyhead->result); |
979 | bytes = le64_to_cpu(op->extent.length); | 979 | bytes = le64_to_cpu(op->extent.length); |
980 | read_op = (le32_to_cpu(op->op) == CEPH_OSD_OP_READ); | 980 | read_op = (le16_to_cpu(op->op) == CEPH_OSD_OP_READ); |
981 | 981 | ||
982 | dout("rbd_req_cb bytes=%lld readop=%d rc=%d\n", bytes, read_op, rc); | 982 | dout("rbd_req_cb bytes=%lld readop=%d rc=%d\n", bytes, read_op, rc); |
983 | 983 | ||
diff --git a/drivers/clk/spear/spear1310_clock.c b/drivers/clk/spear/spear1310_clock.c index 8f05652d53e6..0fcec2aae19c 100644 --- a/drivers/clk/spear/spear1310_clock.c +++ b/drivers/clk/spear/spear1310_clock.c | |||
@@ -345,31 +345,30 @@ static struct frac_rate_tbl gen_rtbl[] = { | |||
345 | /* clock parents */ | 345 | /* clock parents */ |
346 | static const char *vco_parents[] = { "osc_24m_clk", "osc_25m_clk", }; | 346 | static const char *vco_parents[] = { "osc_24m_clk", "osc_25m_clk", }; |
347 | static const char *gpt_parents[] = { "osc_24m_clk", "apb_clk", }; | 347 | static const char *gpt_parents[] = { "osc_24m_clk", "apb_clk", }; |
348 | static const char *uart0_parents[] = { "pll5_clk", "uart_synth_gate_clk", }; | 348 | static const char *uart0_parents[] = { "pll5_clk", "uart_syn_gclk", }; |
349 | static const char *c3_parents[] = { "pll5_clk", "c3_synth_gate_clk", }; | 349 | static const char *c3_parents[] = { "pll5_clk", "c3_syn_gclk", }; |
350 | static const char *gmac_phy_input_parents[] = { "gmii_125m_pad_clk", "pll2_clk", | 350 | static const char *gmac_phy_input_parents[] = { "gmii_pad_clk", "pll2_clk", |
351 | "osc_25m_clk", }; | 351 | "osc_25m_clk", }; |
352 | static const char *gmac_phy_parents[] = { "gmac_phy_input_mux_clk", | 352 | static const char *gmac_phy_parents[] = { "phy_input_mclk", "phy_syn_gclk", }; |
353 | "gmac_phy_synth_gate_clk", }; | ||
354 | static const char *clcd_synth_parents[] = { "vco1div4_clk", "pll2_clk", }; | 353 | static const char *clcd_synth_parents[] = { "vco1div4_clk", "pll2_clk", }; |
355 | static const char *clcd_pixel_parents[] = { "pll5_clk", "clcd_synth_clk", }; | 354 | static const char *clcd_pixel_parents[] = { "pll5_clk", "clcd_syn_clk", }; |
356 | static const char *i2s_src_parents[] = { "vco1div2_clk", "none", "pll3_clk", | 355 | static const char *i2s_src_parents[] = { "vco1div2_clk", "none", "pll3_clk", |
357 | "i2s_src_pad_clk", }; | 356 | "i2s_src_pad_clk", }; |
358 | static const char *i2s_ref_parents[] = { "i2s_src_mux_clk", "i2s_prs1_clk", }; | 357 | static const char *i2s_ref_parents[] = { "i2s_src_mclk", "i2s_prs1_clk", }; |
359 | static const char *gen_synth0_1_parents[] = { "vco1div4_clk", "vco3div2_clk", | 358 | static const char *gen_synth0_1_parents[] = { "vco1div4_clk", "vco3div2_clk", |
360 | "pll3_clk", }; | 359 | "pll3_clk", }; |
361 | static const char *gen_synth2_3_parents[] = { "vco1div4_clk", "vco3div2_clk", | 360 | static const char *gen_synth2_3_parents[] = { "vco1div4_clk", "vco3div2_clk", |
362 | "pll2_clk", }; | 361 | "pll2_clk", }; |
363 | static const char *rmii_phy_parents[] = { "ras_tx50_clk", "none", | 362 | static const char *rmii_phy_parents[] = { "ras_tx50_clk", "none", |
364 | "ras_pll2_clk", "ras_synth0_clk", }; | 363 | "ras_pll2_clk", "ras_syn0_clk", }; |
365 | static const char *smii_rgmii_phy_parents[] = { "none", "ras_tx125_clk", | 364 | static const char *smii_rgmii_phy_parents[] = { "none", "ras_tx125_clk", |
366 | "ras_pll2_clk", "ras_synth0_clk", }; | 365 | "ras_pll2_clk", "ras_syn0_clk", }; |
367 | static const char *uart_parents[] = { "ras_apb_clk", "gen_synth3_clk", }; | 366 | static const char *uart_parents[] = { "ras_apb_clk", "gen_syn3_clk", }; |
368 | static const char *i2c_parents[] = { "ras_apb_clk", "gen_synth1_clk", }; | 367 | static const char *i2c_parents[] = { "ras_apb_clk", "gen_syn1_clk", }; |
369 | static const char *ssp1_parents[] = { "ras_apb_clk", "gen_synth1_clk", | 368 | static const char *ssp1_parents[] = { "ras_apb_clk", "gen_syn1_clk", |
370 | "ras_plclk0_clk", }; | 369 | "ras_plclk0_clk", }; |
371 | static const char *pci_parents[] = { "ras_pll3_clk", "gen_synth2_clk", }; | 370 | static const char *pci_parents[] = { "ras_pll3_clk", "gen_syn2_clk", }; |
372 | static const char *tdm_parents[] = { "ras_pll3_clk", "gen_synth1_clk", }; | 371 | static const char *tdm_parents[] = { "ras_pll3_clk", "gen_syn1_clk", }; |
373 | 372 | ||
374 | void __init spear1310_clk_init(void) | 373 | void __init spear1310_clk_init(void) |
375 | { | 374 | { |
@@ -390,9 +389,9 @@ void __init spear1310_clk_init(void) | |||
390 | 25000000); | 389 | 25000000); |
391 | clk_register_clkdev(clk, "osc_25m_clk", NULL); | 390 | clk_register_clkdev(clk, "osc_25m_clk", NULL); |
392 | 391 | ||
393 | clk = clk_register_fixed_rate(NULL, "gmii_125m_pad_clk", NULL, | 392 | clk = clk_register_fixed_rate(NULL, "gmii_pad_clk", NULL, CLK_IS_ROOT, |
394 | CLK_IS_ROOT, 125000000); | 393 | 125000000); |
395 | clk_register_clkdev(clk, "gmii_125m_pad_clk", NULL); | 394 | clk_register_clkdev(clk, "gmii_pad_clk", NULL); |
396 | 395 | ||
397 | clk = clk_register_fixed_rate(NULL, "i2s_src_pad_clk", NULL, | 396 | clk = clk_register_fixed_rate(NULL, "i2s_src_pad_clk", NULL, |
398 | CLK_IS_ROOT, 12288000); | 397 | CLK_IS_ROOT, 12288000); |
@@ -406,34 +405,34 @@ void __init spear1310_clk_init(void) | |||
406 | 405 | ||
407 | /* clock derived from 24 or 25 MHz osc clk */ | 406 | /* clock derived from 24 or 25 MHz osc clk */ |
408 | /* vco-pll */ | 407 | /* vco-pll */ |
409 | clk = clk_register_mux(NULL, "vco1_mux_clk", vco_parents, | 408 | clk = clk_register_mux(NULL, "vco1_mclk", vco_parents, |
410 | ARRAY_SIZE(vco_parents), 0, SPEAR1310_PLL_CFG, | 409 | ARRAY_SIZE(vco_parents), 0, SPEAR1310_PLL_CFG, |
411 | SPEAR1310_PLL1_CLK_SHIFT, SPEAR1310_PLL_CLK_MASK, 0, | 410 | SPEAR1310_PLL1_CLK_SHIFT, SPEAR1310_PLL_CLK_MASK, 0, |
412 | &_lock); | 411 | &_lock); |
413 | clk_register_clkdev(clk, "vco1_mux_clk", NULL); | 412 | clk_register_clkdev(clk, "vco1_mclk", NULL); |
414 | clk = clk_register_vco_pll("vco1_clk", "pll1_clk", NULL, "vco1_mux_clk", | 413 | clk = clk_register_vco_pll("vco1_clk", "pll1_clk", NULL, "vco1_mclk", |
415 | 0, SPEAR1310_PLL1_CTR, SPEAR1310_PLL1_FRQ, pll_rtbl, | 414 | 0, SPEAR1310_PLL1_CTR, SPEAR1310_PLL1_FRQ, pll_rtbl, |
416 | ARRAY_SIZE(pll_rtbl), &_lock, &clk1, NULL); | 415 | ARRAY_SIZE(pll_rtbl), &_lock, &clk1, NULL); |
417 | clk_register_clkdev(clk, "vco1_clk", NULL); | 416 | clk_register_clkdev(clk, "vco1_clk", NULL); |
418 | clk_register_clkdev(clk1, "pll1_clk", NULL); | 417 | clk_register_clkdev(clk1, "pll1_clk", NULL); |
419 | 418 | ||
420 | clk = clk_register_mux(NULL, "vco2_mux_clk", vco_parents, | 419 | clk = clk_register_mux(NULL, "vco2_mclk", vco_parents, |
421 | ARRAY_SIZE(vco_parents), 0, SPEAR1310_PLL_CFG, | 420 | ARRAY_SIZE(vco_parents), 0, SPEAR1310_PLL_CFG, |
422 | SPEAR1310_PLL2_CLK_SHIFT, SPEAR1310_PLL_CLK_MASK, 0, | 421 | SPEAR1310_PLL2_CLK_SHIFT, SPEAR1310_PLL_CLK_MASK, 0, |
423 | &_lock); | 422 | &_lock); |
424 | clk_register_clkdev(clk, "vco2_mux_clk", NULL); | 423 | clk_register_clkdev(clk, "vco2_mclk", NULL); |
425 | clk = clk_register_vco_pll("vco2_clk", "pll2_clk", NULL, "vco2_mux_clk", | 424 | clk = clk_register_vco_pll("vco2_clk", "pll2_clk", NULL, "vco2_mclk", |
426 | 0, SPEAR1310_PLL2_CTR, SPEAR1310_PLL2_FRQ, pll_rtbl, | 425 | 0, SPEAR1310_PLL2_CTR, SPEAR1310_PLL2_FRQ, pll_rtbl, |
427 | ARRAY_SIZE(pll_rtbl), &_lock, &clk1, NULL); | 426 | ARRAY_SIZE(pll_rtbl), &_lock, &clk1, NULL); |
428 | clk_register_clkdev(clk, "vco2_clk", NULL); | 427 | clk_register_clkdev(clk, "vco2_clk", NULL); |
429 | clk_register_clkdev(clk1, "pll2_clk", NULL); | 428 | clk_register_clkdev(clk1, "pll2_clk", NULL); |
430 | 429 | ||
431 | clk = clk_register_mux(NULL, "vco3_mux_clk", vco_parents, | 430 | clk = clk_register_mux(NULL, "vco3_mclk", vco_parents, |
432 | ARRAY_SIZE(vco_parents), 0, SPEAR1310_PLL_CFG, | 431 | ARRAY_SIZE(vco_parents), 0, SPEAR1310_PLL_CFG, |
433 | SPEAR1310_PLL3_CLK_SHIFT, SPEAR1310_PLL_CLK_MASK, 0, | 432 | SPEAR1310_PLL3_CLK_SHIFT, SPEAR1310_PLL_CLK_MASK, 0, |
434 | &_lock); | 433 | &_lock); |
435 | clk_register_clkdev(clk, "vco3_mux_clk", NULL); | 434 | clk_register_clkdev(clk, "vco3_mclk", NULL); |
436 | clk = clk_register_vco_pll("vco3_clk", "pll3_clk", NULL, "vco3_mux_clk", | 435 | clk = clk_register_vco_pll("vco3_clk", "pll3_clk", NULL, "vco3_mclk", |
437 | 0, SPEAR1310_PLL3_CTR, SPEAR1310_PLL3_FRQ, pll_rtbl, | 436 | 0, SPEAR1310_PLL3_CTR, SPEAR1310_PLL3_FRQ, pll_rtbl, |
438 | ARRAY_SIZE(pll_rtbl), &_lock, &clk1, NULL); | 437 | ARRAY_SIZE(pll_rtbl), &_lock, &clk1, NULL); |
439 | clk_register_clkdev(clk, "vco3_clk", NULL); | 438 | clk_register_clkdev(clk, "vco3_clk", NULL); |
@@ -473,7 +472,7 @@ void __init spear1310_clk_init(void) | |||
473 | /* peripherals */ | 472 | /* peripherals */ |
474 | clk_register_fixed_factor(NULL, "thermal_clk", "osc_24m_clk", 0, 1, | 473 | clk_register_fixed_factor(NULL, "thermal_clk", "osc_24m_clk", 0, 1, |
475 | 128); | 474 | 128); |
476 | clk = clk_register_gate(NULL, "thermal_gate_clk", "thermal_clk", 0, | 475 | clk = clk_register_gate(NULL, "thermal_gclk", "thermal_clk", 0, |
477 | SPEAR1310_PERIP2_CLK_ENB, SPEAR1310_THSENS_CLK_ENB, 0, | 476 | SPEAR1310_PERIP2_CLK_ENB, SPEAR1310_THSENS_CLK_ENB, 0, |
478 | &_lock); | 477 | &_lock); |
479 | clk_register_clkdev(clk, NULL, "spear_thermal"); | 478 | clk_register_clkdev(clk, NULL, "spear_thermal"); |
@@ -500,177 +499,176 @@ void __init spear1310_clk_init(void) | |||
500 | clk_register_clkdev(clk, "apb_clk", NULL); | 499 | clk_register_clkdev(clk, "apb_clk", NULL); |
501 | 500 | ||
502 | /* gpt clocks */ | 501 | /* gpt clocks */ |
503 | clk = clk_register_mux(NULL, "gpt0_mux_clk", gpt_parents, | 502 | clk = clk_register_mux(NULL, "gpt0_mclk", gpt_parents, |
504 | ARRAY_SIZE(gpt_parents), 0, SPEAR1310_PERIP_CLK_CFG, | 503 | ARRAY_SIZE(gpt_parents), 0, SPEAR1310_PERIP_CLK_CFG, |
505 | SPEAR1310_GPT0_CLK_SHIFT, SPEAR1310_GPT_CLK_MASK, 0, | 504 | SPEAR1310_GPT0_CLK_SHIFT, SPEAR1310_GPT_CLK_MASK, 0, |
506 | &_lock); | 505 | &_lock); |
507 | clk_register_clkdev(clk, "gpt0_mux_clk", NULL); | 506 | clk_register_clkdev(clk, "gpt0_mclk", NULL); |
508 | clk = clk_register_gate(NULL, "gpt0_clk", "gpt0_mux_clk", 0, | 507 | clk = clk_register_gate(NULL, "gpt0_clk", "gpt0_mclk", 0, |
509 | SPEAR1310_PERIP1_CLK_ENB, SPEAR1310_GPT0_CLK_ENB, 0, | 508 | SPEAR1310_PERIP1_CLK_ENB, SPEAR1310_GPT0_CLK_ENB, 0, |
510 | &_lock); | 509 | &_lock); |
511 | clk_register_clkdev(clk, NULL, "gpt0"); | 510 | clk_register_clkdev(clk, NULL, "gpt0"); |
512 | 511 | ||
513 | clk = clk_register_mux(NULL, "gpt1_mux_clk", gpt_parents, | 512 | clk = clk_register_mux(NULL, "gpt1_mclk", gpt_parents, |
514 | ARRAY_SIZE(gpt_parents), 0, SPEAR1310_PERIP_CLK_CFG, | 513 | ARRAY_SIZE(gpt_parents), 0, SPEAR1310_PERIP_CLK_CFG, |
515 | SPEAR1310_GPT1_CLK_SHIFT, SPEAR1310_GPT_CLK_MASK, 0, | 514 | SPEAR1310_GPT1_CLK_SHIFT, SPEAR1310_GPT_CLK_MASK, 0, |
516 | &_lock); | 515 | &_lock); |
517 | clk_register_clkdev(clk, "gpt1_mux_clk", NULL); | 516 | clk_register_clkdev(clk, "gpt1_mclk", NULL); |
518 | clk = clk_register_gate(NULL, "gpt1_clk", "gpt1_mux_clk", 0, | 517 | clk = clk_register_gate(NULL, "gpt1_clk", "gpt1_mclk", 0, |
519 | SPEAR1310_PERIP1_CLK_ENB, SPEAR1310_GPT1_CLK_ENB, 0, | 518 | SPEAR1310_PERIP1_CLK_ENB, SPEAR1310_GPT1_CLK_ENB, 0, |
520 | &_lock); | 519 | &_lock); |
521 | clk_register_clkdev(clk, NULL, "gpt1"); | 520 | clk_register_clkdev(clk, NULL, "gpt1"); |
522 | 521 | ||
523 | clk = clk_register_mux(NULL, "gpt2_mux_clk", gpt_parents, | 522 | clk = clk_register_mux(NULL, "gpt2_mclk", gpt_parents, |
524 | ARRAY_SIZE(gpt_parents), 0, SPEAR1310_PERIP_CLK_CFG, | 523 | ARRAY_SIZE(gpt_parents), 0, SPEAR1310_PERIP_CLK_CFG, |
525 | SPEAR1310_GPT2_CLK_SHIFT, SPEAR1310_GPT_CLK_MASK, 0, | 524 | SPEAR1310_GPT2_CLK_SHIFT, SPEAR1310_GPT_CLK_MASK, 0, |
526 | &_lock); | 525 | &_lock); |
527 | clk_register_clkdev(clk, "gpt2_mux_clk", NULL); | 526 | clk_register_clkdev(clk, "gpt2_mclk", NULL); |
528 | clk = clk_register_gate(NULL, "gpt2_clk", "gpt2_mux_clk", 0, | 527 | clk = clk_register_gate(NULL, "gpt2_clk", "gpt2_mclk", 0, |
529 | SPEAR1310_PERIP2_CLK_ENB, SPEAR1310_GPT2_CLK_ENB, 0, | 528 | SPEAR1310_PERIP2_CLK_ENB, SPEAR1310_GPT2_CLK_ENB, 0, |
530 | &_lock); | 529 | &_lock); |
531 | clk_register_clkdev(clk, NULL, "gpt2"); | 530 | clk_register_clkdev(clk, NULL, "gpt2"); |
532 | 531 | ||
533 | clk = clk_register_mux(NULL, "gpt3_mux_clk", gpt_parents, | 532 | clk = clk_register_mux(NULL, "gpt3_mclk", gpt_parents, |
534 | ARRAY_SIZE(gpt_parents), 0, SPEAR1310_PERIP_CLK_CFG, | 533 | ARRAY_SIZE(gpt_parents), 0, SPEAR1310_PERIP_CLK_CFG, |
535 | SPEAR1310_GPT3_CLK_SHIFT, SPEAR1310_GPT_CLK_MASK, 0, | 534 | SPEAR1310_GPT3_CLK_SHIFT, SPEAR1310_GPT_CLK_MASK, 0, |
536 | &_lock); | 535 | &_lock); |
537 | clk_register_clkdev(clk, "gpt3_mux_clk", NULL); | 536 | clk_register_clkdev(clk, "gpt3_mclk", NULL); |
538 | clk = clk_register_gate(NULL, "gpt3_clk", "gpt3_mux_clk", 0, | 537 | clk = clk_register_gate(NULL, "gpt3_clk", "gpt3_mclk", 0, |
539 | SPEAR1310_PERIP2_CLK_ENB, SPEAR1310_GPT3_CLK_ENB, 0, | 538 | SPEAR1310_PERIP2_CLK_ENB, SPEAR1310_GPT3_CLK_ENB, 0, |
540 | &_lock); | 539 | &_lock); |
541 | clk_register_clkdev(clk, NULL, "gpt3"); | 540 | clk_register_clkdev(clk, NULL, "gpt3"); |
542 | 541 | ||
543 | /* others */ | 542 | /* others */ |
544 | clk = clk_register_aux("uart_synth_clk", "uart_synth_gate_clk", | 543 | clk = clk_register_aux("uart_syn_clk", "uart_syn_gclk", "vco1div2_clk", |
545 | "vco1div2_clk", 0, SPEAR1310_UART_CLK_SYNT, NULL, | 544 | 0, SPEAR1310_UART_CLK_SYNT, NULL, aux_rtbl, |
546 | aux_rtbl, ARRAY_SIZE(aux_rtbl), &_lock, &clk1); | 545 | ARRAY_SIZE(aux_rtbl), &_lock, &clk1); |
547 | clk_register_clkdev(clk, "uart_synth_clk", NULL); | 546 | clk_register_clkdev(clk, "uart_syn_clk", NULL); |
548 | clk_register_clkdev(clk1, "uart_synth_gate_clk", NULL); | 547 | clk_register_clkdev(clk1, "uart_syn_gclk", NULL); |
549 | 548 | ||
550 | clk = clk_register_mux(NULL, "uart0_mux_clk", uart0_parents, | 549 | clk = clk_register_mux(NULL, "uart0_mclk", uart0_parents, |
551 | ARRAY_SIZE(uart0_parents), 0, SPEAR1310_PERIP_CLK_CFG, | 550 | ARRAY_SIZE(uart0_parents), 0, SPEAR1310_PERIP_CLK_CFG, |
552 | SPEAR1310_UART_CLK_SHIFT, SPEAR1310_UART_CLK_MASK, 0, | 551 | SPEAR1310_UART_CLK_SHIFT, SPEAR1310_UART_CLK_MASK, 0, |
553 | &_lock); | 552 | &_lock); |
554 | clk_register_clkdev(clk, "uart0_mux_clk", NULL); | 553 | clk_register_clkdev(clk, "uart0_mclk", NULL); |
555 | 554 | ||
556 | clk = clk_register_gate(NULL, "uart0_clk", "uart0_mux_clk", 0, | 555 | clk = clk_register_gate(NULL, "uart0_clk", "uart0_mclk", 0, |
557 | SPEAR1310_PERIP1_CLK_ENB, SPEAR1310_UART_CLK_ENB, 0, | 556 | SPEAR1310_PERIP1_CLK_ENB, SPEAR1310_UART_CLK_ENB, 0, |
558 | &_lock); | 557 | &_lock); |
559 | clk_register_clkdev(clk, NULL, "e0000000.serial"); | 558 | clk_register_clkdev(clk, NULL, "e0000000.serial"); |
560 | 559 | ||
561 | clk = clk_register_aux("sdhci_synth_clk", "sdhci_synth_gate_clk", | 560 | clk = clk_register_aux("sdhci_syn_clk", "sdhci_syn_gclk", |
562 | "vco1div2_clk", 0, SPEAR1310_SDHCI_CLK_SYNT, NULL, | 561 | "vco1div2_clk", 0, SPEAR1310_SDHCI_CLK_SYNT, NULL, |
563 | aux_rtbl, ARRAY_SIZE(aux_rtbl), &_lock, &clk1); | 562 | aux_rtbl, ARRAY_SIZE(aux_rtbl), &_lock, &clk1); |
564 | clk_register_clkdev(clk, "sdhci_synth_clk", NULL); | 563 | clk_register_clkdev(clk, "sdhci_syn_clk", NULL); |
565 | clk_register_clkdev(clk1, "sdhci_synth_gate_clk", NULL); | 564 | clk_register_clkdev(clk1, "sdhci_syn_gclk", NULL); |
566 | 565 | ||
567 | clk = clk_register_gate(NULL, "sdhci_clk", "sdhci_synth_gate_clk", 0, | 566 | clk = clk_register_gate(NULL, "sdhci_clk", "sdhci_syn_gclk", 0, |
568 | SPEAR1310_PERIP1_CLK_ENB, SPEAR1310_SDHCI_CLK_ENB, 0, | 567 | SPEAR1310_PERIP1_CLK_ENB, SPEAR1310_SDHCI_CLK_ENB, 0, |
569 | &_lock); | 568 | &_lock); |
570 | clk_register_clkdev(clk, NULL, "b3000000.sdhci"); | 569 | clk_register_clkdev(clk, NULL, "b3000000.sdhci"); |
571 | 570 | ||
572 | clk = clk_register_aux("cfxd_synth_clk", "cfxd_synth_gate_clk", | 571 | clk = clk_register_aux("cfxd_syn_clk", "cfxd_syn_gclk", "vco1div2_clk", |
573 | "vco1div2_clk", 0, SPEAR1310_CFXD_CLK_SYNT, NULL, | 572 | 0, SPEAR1310_CFXD_CLK_SYNT, NULL, aux_rtbl, |
574 | aux_rtbl, ARRAY_SIZE(aux_rtbl), &_lock, &clk1); | 573 | ARRAY_SIZE(aux_rtbl), &_lock, &clk1); |
575 | clk_register_clkdev(clk, "cfxd_synth_clk", NULL); | 574 | clk_register_clkdev(clk, "cfxd_syn_clk", NULL); |
576 | clk_register_clkdev(clk1, "cfxd_synth_gate_clk", NULL); | 575 | clk_register_clkdev(clk1, "cfxd_syn_gclk", NULL); |
577 | 576 | ||
578 | clk = clk_register_gate(NULL, "cfxd_clk", "cfxd_synth_gate_clk", 0, | 577 | clk = clk_register_gate(NULL, "cfxd_clk", "cfxd_syn_gclk", 0, |
579 | SPEAR1310_PERIP1_CLK_ENB, SPEAR1310_CFXD_CLK_ENB, 0, | 578 | SPEAR1310_PERIP1_CLK_ENB, SPEAR1310_CFXD_CLK_ENB, 0, |
580 | &_lock); | 579 | &_lock); |
581 | clk_register_clkdev(clk, NULL, "b2800000.cf"); | 580 | clk_register_clkdev(clk, NULL, "b2800000.cf"); |
582 | clk_register_clkdev(clk, NULL, "arasan_xd"); | 581 | clk_register_clkdev(clk, NULL, "arasan_xd"); |
583 | 582 | ||
584 | clk = clk_register_aux("c3_synth_clk", "c3_synth_gate_clk", | 583 | clk = clk_register_aux("c3_syn_clk", "c3_syn_gclk", "vco1div2_clk", |
585 | "vco1div2_clk", 0, SPEAR1310_C3_CLK_SYNT, NULL, | 584 | 0, SPEAR1310_C3_CLK_SYNT, NULL, aux_rtbl, |
586 | aux_rtbl, ARRAY_SIZE(aux_rtbl), &_lock, &clk1); | 585 | ARRAY_SIZE(aux_rtbl), &_lock, &clk1); |
587 | clk_register_clkdev(clk, "c3_synth_clk", NULL); | 586 | clk_register_clkdev(clk, "c3_syn_clk", NULL); |
588 | clk_register_clkdev(clk1, "c3_synth_gate_clk", NULL); | 587 | clk_register_clkdev(clk1, "c3_syn_gclk", NULL); |
589 | 588 | ||
590 | clk = clk_register_mux(NULL, "c3_mux_clk", c3_parents, | 589 | clk = clk_register_mux(NULL, "c3_mclk", c3_parents, |
591 | ARRAY_SIZE(c3_parents), 0, SPEAR1310_PERIP_CLK_CFG, | 590 | ARRAY_SIZE(c3_parents), 0, SPEAR1310_PERIP_CLK_CFG, |
592 | SPEAR1310_C3_CLK_SHIFT, SPEAR1310_C3_CLK_MASK, 0, | 591 | SPEAR1310_C3_CLK_SHIFT, SPEAR1310_C3_CLK_MASK, 0, |
593 | &_lock); | 592 | &_lock); |
594 | clk_register_clkdev(clk, "c3_mux_clk", NULL); | 593 | clk_register_clkdev(clk, "c3_mclk", NULL); |
595 | 594 | ||
596 | clk = clk_register_gate(NULL, "c3_clk", "c3_mux_clk", 0, | 595 | clk = clk_register_gate(NULL, "c3_clk", "c3_mclk", 0, |
597 | SPEAR1310_PERIP1_CLK_ENB, SPEAR1310_C3_CLK_ENB, 0, | 596 | SPEAR1310_PERIP1_CLK_ENB, SPEAR1310_C3_CLK_ENB, 0, |
598 | &_lock); | 597 | &_lock); |
599 | clk_register_clkdev(clk, NULL, "c3"); | 598 | clk_register_clkdev(clk, NULL, "c3"); |
600 | 599 | ||
601 | /* gmac */ | 600 | /* gmac */ |
602 | clk = clk_register_mux(NULL, "gmac_phy_input_mux_clk", | 601 | clk = clk_register_mux(NULL, "phy_input_mclk", gmac_phy_input_parents, |
603 | gmac_phy_input_parents, | ||
604 | ARRAY_SIZE(gmac_phy_input_parents), 0, | 602 | ARRAY_SIZE(gmac_phy_input_parents), 0, |
605 | SPEAR1310_GMAC_CLK_CFG, | 603 | SPEAR1310_GMAC_CLK_CFG, |
606 | SPEAR1310_GMAC_PHY_INPUT_CLK_SHIFT, | 604 | SPEAR1310_GMAC_PHY_INPUT_CLK_SHIFT, |
607 | SPEAR1310_GMAC_PHY_INPUT_CLK_MASK, 0, &_lock); | 605 | SPEAR1310_GMAC_PHY_INPUT_CLK_MASK, 0, &_lock); |
608 | clk_register_clkdev(clk, "gmac_phy_input_mux_clk", NULL); | 606 | clk_register_clkdev(clk, "phy_input_mclk", NULL); |
609 | 607 | ||
610 | clk = clk_register_aux("gmac_phy_synth_clk", "gmac_phy_synth_gate_clk", | 608 | clk = clk_register_aux("phy_syn_clk", "phy_syn_gclk", "phy_input_mclk", |
611 | "gmac_phy_input_mux_clk", 0, SPEAR1310_GMAC_CLK_SYNT, | 609 | 0, SPEAR1310_GMAC_CLK_SYNT, NULL, gmac_rtbl, |
612 | NULL, gmac_rtbl, ARRAY_SIZE(gmac_rtbl), &_lock, &clk1); | 610 | ARRAY_SIZE(gmac_rtbl), &_lock, &clk1); |
613 | clk_register_clkdev(clk, "gmac_phy_synth_clk", NULL); | 611 | clk_register_clkdev(clk, "phy_syn_clk", NULL); |
614 | clk_register_clkdev(clk1, "gmac_phy_synth_gate_clk", NULL); | 612 | clk_register_clkdev(clk1, "phy_syn_gclk", NULL); |
615 | 613 | ||
616 | clk = clk_register_mux(NULL, "gmac_phy_mux_clk", gmac_phy_parents, | 614 | clk = clk_register_mux(NULL, "phy_mclk", gmac_phy_parents, |
617 | ARRAY_SIZE(gmac_phy_parents), 0, | 615 | ARRAY_SIZE(gmac_phy_parents), 0, |
618 | SPEAR1310_PERIP_CLK_CFG, SPEAR1310_GMAC_PHY_CLK_SHIFT, | 616 | SPEAR1310_PERIP_CLK_CFG, SPEAR1310_GMAC_PHY_CLK_SHIFT, |
619 | SPEAR1310_GMAC_PHY_CLK_MASK, 0, &_lock); | 617 | SPEAR1310_GMAC_PHY_CLK_MASK, 0, &_lock); |
620 | clk_register_clkdev(clk, NULL, "stmmacphy.0"); | 618 | clk_register_clkdev(clk, NULL, "stmmacphy.0"); |
621 | 619 | ||
622 | /* clcd */ | 620 | /* clcd */ |
623 | clk = clk_register_mux(NULL, "clcd_synth_mux_clk", clcd_synth_parents, | 621 | clk = clk_register_mux(NULL, "clcd_syn_mclk", clcd_synth_parents, |
624 | ARRAY_SIZE(clcd_synth_parents), 0, | 622 | ARRAY_SIZE(clcd_synth_parents), 0, |
625 | SPEAR1310_CLCD_CLK_SYNT, SPEAR1310_CLCD_SYNT_CLK_SHIFT, | 623 | SPEAR1310_CLCD_CLK_SYNT, SPEAR1310_CLCD_SYNT_CLK_SHIFT, |
626 | SPEAR1310_CLCD_SYNT_CLK_MASK, 0, &_lock); | 624 | SPEAR1310_CLCD_SYNT_CLK_MASK, 0, &_lock); |
627 | clk_register_clkdev(clk, "clcd_synth_mux_clk", NULL); | 625 | clk_register_clkdev(clk, "clcd_syn_mclk", NULL); |
628 | 626 | ||
629 | clk = clk_register_frac("clcd_synth_clk", "clcd_synth_mux_clk", 0, | 627 | clk = clk_register_frac("clcd_syn_clk", "clcd_syn_mclk", 0, |
630 | SPEAR1310_CLCD_CLK_SYNT, clcd_rtbl, | 628 | SPEAR1310_CLCD_CLK_SYNT, clcd_rtbl, |
631 | ARRAY_SIZE(clcd_rtbl), &_lock); | 629 | ARRAY_SIZE(clcd_rtbl), &_lock); |
632 | clk_register_clkdev(clk, "clcd_synth_clk", NULL); | 630 | clk_register_clkdev(clk, "clcd_syn_clk", NULL); |
633 | 631 | ||
634 | clk = clk_register_mux(NULL, "clcd_pixel_mux_clk", clcd_pixel_parents, | 632 | clk = clk_register_mux(NULL, "clcd_pixel_mclk", clcd_pixel_parents, |
635 | ARRAY_SIZE(clcd_pixel_parents), 0, | 633 | ARRAY_SIZE(clcd_pixel_parents), 0, |
636 | SPEAR1310_PERIP_CLK_CFG, SPEAR1310_CLCD_CLK_SHIFT, | 634 | SPEAR1310_PERIP_CLK_CFG, SPEAR1310_CLCD_CLK_SHIFT, |
637 | SPEAR1310_CLCD_CLK_MASK, 0, &_lock); | 635 | SPEAR1310_CLCD_CLK_MASK, 0, &_lock); |
638 | clk_register_clkdev(clk, "clcd_pixel_clk", NULL); | 636 | clk_register_clkdev(clk, "clcd_pixel_clk", NULL); |
639 | 637 | ||
640 | clk = clk_register_gate(NULL, "clcd_clk", "clcd_pixel_mux_clk", 0, | 638 | clk = clk_register_gate(NULL, "clcd_clk", "clcd_pixel_mclk", 0, |
641 | SPEAR1310_PERIP1_CLK_ENB, SPEAR1310_CLCD_CLK_ENB, 0, | 639 | SPEAR1310_PERIP1_CLK_ENB, SPEAR1310_CLCD_CLK_ENB, 0, |
642 | &_lock); | 640 | &_lock); |
643 | clk_register_clkdev(clk, "clcd_clk", NULL); | 641 | clk_register_clkdev(clk, "clcd_clk", NULL); |
644 | 642 | ||
645 | /* i2s */ | 643 | /* i2s */ |
646 | clk = clk_register_mux(NULL, "i2s_src_mux_clk", i2s_src_parents, | 644 | clk = clk_register_mux(NULL, "i2s_src_mclk", i2s_src_parents, |
647 | ARRAY_SIZE(i2s_src_parents), 0, SPEAR1310_I2S_CLK_CFG, | 645 | ARRAY_SIZE(i2s_src_parents), 0, SPEAR1310_I2S_CLK_CFG, |
648 | SPEAR1310_I2S_SRC_CLK_SHIFT, SPEAR1310_I2S_SRC_CLK_MASK, | 646 | SPEAR1310_I2S_SRC_CLK_SHIFT, SPEAR1310_I2S_SRC_CLK_MASK, |
649 | 0, &_lock); | 647 | 0, &_lock); |
650 | clk_register_clkdev(clk, "i2s_src_clk", NULL); | 648 | clk_register_clkdev(clk, "i2s_src_clk", NULL); |
651 | 649 | ||
652 | clk = clk_register_aux("i2s_prs1_clk", NULL, "i2s_src_mux_clk", 0, | 650 | clk = clk_register_aux("i2s_prs1_clk", NULL, "i2s_src_mclk", 0, |
653 | SPEAR1310_I2S_CLK_CFG, &i2s_prs1_masks, i2s_prs1_rtbl, | 651 | SPEAR1310_I2S_CLK_CFG, &i2s_prs1_masks, i2s_prs1_rtbl, |
654 | ARRAY_SIZE(i2s_prs1_rtbl), &_lock, NULL); | 652 | ARRAY_SIZE(i2s_prs1_rtbl), &_lock, NULL); |
655 | clk_register_clkdev(clk, "i2s_prs1_clk", NULL); | 653 | clk_register_clkdev(clk, "i2s_prs1_clk", NULL); |
656 | 654 | ||
657 | clk = clk_register_mux(NULL, "i2s_ref_mux_clk", i2s_ref_parents, | 655 | clk = clk_register_mux(NULL, "i2s_ref_mclk", i2s_ref_parents, |
658 | ARRAY_SIZE(i2s_ref_parents), 0, SPEAR1310_I2S_CLK_CFG, | 656 | ARRAY_SIZE(i2s_ref_parents), 0, SPEAR1310_I2S_CLK_CFG, |
659 | SPEAR1310_I2S_REF_SHIFT, SPEAR1310_I2S_REF_SEL_MASK, 0, | 657 | SPEAR1310_I2S_REF_SHIFT, SPEAR1310_I2S_REF_SEL_MASK, 0, |
660 | &_lock); | 658 | &_lock); |
661 | clk_register_clkdev(clk, "i2s_ref_clk", NULL); | 659 | clk_register_clkdev(clk, "i2s_ref_clk", NULL); |
662 | 660 | ||
663 | clk = clk_register_gate(NULL, "i2s_ref_pad_clk", "i2s_ref_mux_clk", 0, | 661 | clk = clk_register_gate(NULL, "i2s_ref_pad_clk", "i2s_ref_mclk", 0, |
664 | SPEAR1310_PERIP2_CLK_ENB, SPEAR1310_I2S_REF_PAD_CLK_ENB, | 662 | SPEAR1310_PERIP2_CLK_ENB, SPEAR1310_I2S_REF_PAD_CLK_ENB, |
665 | 0, &_lock); | 663 | 0, &_lock); |
666 | clk_register_clkdev(clk, "i2s_ref_pad_clk", NULL); | 664 | clk_register_clkdev(clk, "i2s_ref_pad_clk", NULL); |
667 | 665 | ||
668 | clk = clk_register_aux("i2s_sclk_clk", "i2s_sclk_gate_clk", | 666 | clk = clk_register_aux("i2s_sclk_clk", "i2s_sclk_gclk", |
669 | "i2s_ref_pad_clk", 0, SPEAR1310_I2S_CLK_CFG, | 667 | "i2s_ref_pad_clk", 0, SPEAR1310_I2S_CLK_CFG, |
670 | &i2s_sclk_masks, i2s_sclk_rtbl, | 668 | &i2s_sclk_masks, i2s_sclk_rtbl, |
671 | ARRAY_SIZE(i2s_sclk_rtbl), &_lock, &clk1); | 669 | ARRAY_SIZE(i2s_sclk_rtbl), &_lock, &clk1); |
672 | clk_register_clkdev(clk, "i2s_sclk_clk", NULL); | 670 | clk_register_clkdev(clk, "i2s_sclk_clk", NULL); |
673 | clk_register_clkdev(clk1, "i2s_sclk_gate_clk", NULL); | 671 | clk_register_clkdev(clk1, "i2s_sclk_gclk", NULL); |
674 | 672 | ||
675 | /* clock derived from ahb clk */ | 673 | /* clock derived from ahb clk */ |
676 | clk = clk_register_gate(NULL, "i2c0_clk", "ahb_clk", 0, | 674 | clk = clk_register_gate(NULL, "i2c0_clk", "ahb_clk", 0, |
@@ -747,13 +745,13 @@ void __init spear1310_clk_init(void) | |||
747 | &_lock); | 745 | &_lock); |
748 | clk_register_clkdev(clk, "sysram1_clk", NULL); | 746 | clk_register_clkdev(clk, "sysram1_clk", NULL); |
749 | 747 | ||
750 | clk = clk_register_aux("adc_synth_clk", "adc_synth_gate_clk", "ahb_clk", | 748 | clk = clk_register_aux("adc_syn_clk", "adc_syn_gclk", "ahb_clk", |
751 | 0, SPEAR1310_ADC_CLK_SYNT, NULL, adc_rtbl, | 749 | 0, SPEAR1310_ADC_CLK_SYNT, NULL, adc_rtbl, |
752 | ARRAY_SIZE(adc_rtbl), &_lock, &clk1); | 750 | ARRAY_SIZE(adc_rtbl), &_lock, &clk1); |
753 | clk_register_clkdev(clk, "adc_synth_clk", NULL); | 751 | clk_register_clkdev(clk, "adc_syn_clk", NULL); |
754 | clk_register_clkdev(clk1, "adc_synth_gate_clk", NULL); | 752 | clk_register_clkdev(clk1, "adc_syn_gclk", NULL); |
755 | 753 | ||
756 | clk = clk_register_gate(NULL, "adc_clk", "adc_synth_gate_clk", 0, | 754 | clk = clk_register_gate(NULL, "adc_clk", "adc_syn_gclk", 0, |
757 | SPEAR1310_PERIP1_CLK_ENB, SPEAR1310_ADC_CLK_ENB, 0, | 755 | SPEAR1310_PERIP1_CLK_ENB, SPEAR1310_ADC_CLK_ENB, 0, |
758 | &_lock); | 756 | &_lock); |
759 | clk_register_clkdev(clk, NULL, "adc_clk"); | 757 | clk_register_clkdev(clk, NULL, "adc_clk"); |
@@ -790,37 +788,37 @@ void __init spear1310_clk_init(void) | |||
790 | clk_register_clkdev(clk, NULL, "e0300000.kbd"); | 788 | clk_register_clkdev(clk, NULL, "e0300000.kbd"); |
791 | 789 | ||
792 | /* RAS clks */ | 790 | /* RAS clks */ |
793 | clk = clk_register_mux(NULL, "gen_synth0_1_mux_clk", | 791 | clk = clk_register_mux(NULL, "gen_syn0_1_mclk", gen_synth0_1_parents, |
794 | gen_synth0_1_parents, ARRAY_SIZE(gen_synth0_1_parents), | 792 | ARRAY_SIZE(gen_synth0_1_parents), 0, SPEAR1310_PLL_CFG, |
795 | 0, SPEAR1310_PLL_CFG, SPEAR1310_RAS_SYNT0_1_CLK_SHIFT, | 793 | SPEAR1310_RAS_SYNT0_1_CLK_SHIFT, |
796 | SPEAR1310_RAS_SYNT_CLK_MASK, 0, &_lock); | 794 | SPEAR1310_RAS_SYNT_CLK_MASK, 0, &_lock); |
797 | clk_register_clkdev(clk, "gen_synth0_1_clk", NULL); | 795 | clk_register_clkdev(clk, "gen_syn0_1_clk", NULL); |
798 | 796 | ||
799 | clk = clk_register_mux(NULL, "gen_synth2_3_mux_clk", | 797 | clk = clk_register_mux(NULL, "gen_syn2_3_mclk", gen_synth2_3_parents, |
800 | gen_synth2_3_parents, ARRAY_SIZE(gen_synth2_3_parents), | 798 | ARRAY_SIZE(gen_synth2_3_parents), 0, SPEAR1310_PLL_CFG, |
801 | 0, SPEAR1310_PLL_CFG, SPEAR1310_RAS_SYNT2_3_CLK_SHIFT, | 799 | SPEAR1310_RAS_SYNT2_3_CLK_SHIFT, |
802 | SPEAR1310_RAS_SYNT_CLK_MASK, 0, &_lock); | 800 | SPEAR1310_RAS_SYNT_CLK_MASK, 0, &_lock); |
803 | clk_register_clkdev(clk, "gen_synth2_3_clk", NULL); | 801 | clk_register_clkdev(clk, "gen_syn2_3_clk", NULL); |
804 | 802 | ||
805 | clk = clk_register_frac("gen_synth0_clk", "gen_synth0_1_clk", 0, | 803 | clk = clk_register_frac("gen_syn0_clk", "gen_syn0_1_clk", 0, |
806 | SPEAR1310_RAS_CLK_SYNT0, gen_rtbl, ARRAY_SIZE(gen_rtbl), | 804 | SPEAR1310_RAS_CLK_SYNT0, gen_rtbl, ARRAY_SIZE(gen_rtbl), |
807 | &_lock); | 805 | &_lock); |
808 | clk_register_clkdev(clk, "gen_synth0_clk", NULL); | 806 | clk_register_clkdev(clk, "gen_syn0_clk", NULL); |
809 | 807 | ||
810 | clk = clk_register_frac("gen_synth1_clk", "gen_synth0_1_clk", 0, | 808 | clk = clk_register_frac("gen_syn1_clk", "gen_syn0_1_clk", 0, |
811 | SPEAR1310_RAS_CLK_SYNT1, gen_rtbl, ARRAY_SIZE(gen_rtbl), | 809 | SPEAR1310_RAS_CLK_SYNT1, gen_rtbl, ARRAY_SIZE(gen_rtbl), |
812 | &_lock); | 810 | &_lock); |
813 | clk_register_clkdev(clk, "gen_synth1_clk", NULL); | 811 | clk_register_clkdev(clk, "gen_syn1_clk", NULL); |
814 | 812 | ||
815 | clk = clk_register_frac("gen_synth2_clk", "gen_synth2_3_clk", 0, | 813 | clk = clk_register_frac("gen_syn2_clk", "gen_syn2_3_clk", 0, |
816 | SPEAR1310_RAS_CLK_SYNT2, gen_rtbl, ARRAY_SIZE(gen_rtbl), | 814 | SPEAR1310_RAS_CLK_SYNT2, gen_rtbl, ARRAY_SIZE(gen_rtbl), |
817 | &_lock); | 815 | &_lock); |
818 | clk_register_clkdev(clk, "gen_synth2_clk", NULL); | 816 | clk_register_clkdev(clk, "gen_syn2_clk", NULL); |
819 | 817 | ||
820 | clk = clk_register_frac("gen_synth3_clk", "gen_synth2_3_clk", 0, | 818 | clk = clk_register_frac("gen_syn3_clk", "gen_syn2_3_clk", 0, |
821 | SPEAR1310_RAS_CLK_SYNT3, gen_rtbl, ARRAY_SIZE(gen_rtbl), | 819 | SPEAR1310_RAS_CLK_SYNT3, gen_rtbl, ARRAY_SIZE(gen_rtbl), |
822 | &_lock); | 820 | &_lock); |
823 | clk_register_clkdev(clk, "gen_synth3_clk", NULL); | 821 | clk_register_clkdev(clk, "gen_syn3_clk", NULL); |
824 | 822 | ||
825 | clk = clk_register_gate(NULL, "ras_osc_24m_clk", "osc_24m_clk", 0, | 823 | clk = clk_register_gate(NULL, "ras_osc_24m_clk", "osc_24m_clk", 0, |
826 | SPEAR1310_RAS_CLK_ENB, SPEAR1310_OSC_24M_CLK_ENB, 0, | 824 | SPEAR1310_RAS_CLK_ENB, SPEAR1310_OSC_24M_CLK_ENB, 0, |
@@ -847,7 +845,7 @@ void __init spear1310_clk_init(void) | |||
847 | &_lock); | 845 | &_lock); |
848 | clk_register_clkdev(clk, "ras_pll3_clk", NULL); | 846 | clk_register_clkdev(clk, "ras_pll3_clk", NULL); |
849 | 847 | ||
850 | clk = clk_register_gate(NULL, "ras_tx125_clk", "gmii_125m_pad_clk", 0, | 848 | clk = clk_register_gate(NULL, "ras_tx125_clk", "gmii_pad_clk", 0, |
851 | SPEAR1310_RAS_CLK_ENB, SPEAR1310_C125M_PAD_CLK_ENB, 0, | 849 | SPEAR1310_RAS_CLK_ENB, SPEAR1310_C125M_PAD_CLK_ENB, 0, |
852 | &_lock); | 850 | &_lock); |
853 | clk_register_clkdev(clk, "ras_tx125_clk", NULL); | 851 | clk_register_clkdev(clk, "ras_tx125_clk", NULL); |
@@ -912,7 +910,7 @@ void __init spear1310_clk_init(void) | |||
912 | &_lock); | 910 | &_lock); |
913 | clk_register_clkdev(clk, NULL, "5c700000.eth"); | 911 | clk_register_clkdev(clk, NULL, "5c700000.eth"); |
914 | 912 | ||
915 | clk = clk_register_mux(NULL, "smii_rgmii_phy_mux_clk", | 913 | clk = clk_register_mux(NULL, "smii_rgmii_phy_mclk", |
916 | smii_rgmii_phy_parents, | 914 | smii_rgmii_phy_parents, |
917 | ARRAY_SIZE(smii_rgmii_phy_parents), 0, | 915 | ARRAY_SIZE(smii_rgmii_phy_parents), 0, |
918 | SPEAR1310_RAS_CTRL_REG1, | 916 | SPEAR1310_RAS_CTRL_REG1, |
@@ -922,184 +920,184 @@ void __init spear1310_clk_init(void) | |||
922 | clk_register_clkdev(clk, NULL, "stmmacphy.2"); | 920 | clk_register_clkdev(clk, NULL, "stmmacphy.2"); |
923 | clk_register_clkdev(clk, NULL, "stmmacphy.4"); | 921 | clk_register_clkdev(clk, NULL, "stmmacphy.4"); |
924 | 922 | ||
925 | clk = clk_register_mux(NULL, "rmii_phy_mux_clk", rmii_phy_parents, | 923 | clk = clk_register_mux(NULL, "rmii_phy_mclk", rmii_phy_parents, |
926 | ARRAY_SIZE(rmii_phy_parents), 0, | 924 | ARRAY_SIZE(rmii_phy_parents), 0, |
927 | SPEAR1310_RAS_CTRL_REG1, SPEAR1310_RMII_PHY_CLK_SHIFT, | 925 | SPEAR1310_RAS_CTRL_REG1, SPEAR1310_RMII_PHY_CLK_SHIFT, |
928 | SPEAR1310_PHY_CLK_MASK, 0, &_lock); | 926 | SPEAR1310_PHY_CLK_MASK, 0, &_lock); |
929 | clk_register_clkdev(clk, NULL, "stmmacphy.3"); | 927 | clk_register_clkdev(clk, NULL, "stmmacphy.3"); |
930 | 928 | ||
931 | clk = clk_register_mux(NULL, "uart1_mux_clk", uart_parents, | 929 | clk = clk_register_mux(NULL, "uart1_mclk", uart_parents, |
932 | ARRAY_SIZE(uart_parents), 0, SPEAR1310_RAS_CTRL_REG0, | 930 | ARRAY_SIZE(uart_parents), 0, SPEAR1310_RAS_CTRL_REG0, |
933 | SPEAR1310_UART1_CLK_SHIFT, SPEAR1310_RAS_UART_CLK_MASK, | 931 | SPEAR1310_UART1_CLK_SHIFT, SPEAR1310_RAS_UART_CLK_MASK, |
934 | 0, &_lock); | 932 | 0, &_lock); |
935 | clk_register_clkdev(clk, "uart1_mux_clk", NULL); | 933 | clk_register_clkdev(clk, "uart1_mclk", NULL); |
936 | 934 | ||
937 | clk = clk_register_gate(NULL, "uart1_clk", "uart1_mux_clk", 0, | 935 | clk = clk_register_gate(NULL, "uart1_clk", "uart1_mclk", 0, |
938 | SPEAR1310_RAS_SW_CLK_CTRL, SPEAR1310_UART1_CLK_ENB, 0, | 936 | SPEAR1310_RAS_SW_CLK_CTRL, SPEAR1310_UART1_CLK_ENB, 0, |
939 | &_lock); | 937 | &_lock); |
940 | clk_register_clkdev(clk, NULL, "5c800000.serial"); | 938 | clk_register_clkdev(clk, NULL, "5c800000.serial"); |
941 | 939 | ||
942 | clk = clk_register_mux(NULL, "uart2_mux_clk", uart_parents, | 940 | clk = clk_register_mux(NULL, "uart2_mclk", uart_parents, |
943 | ARRAY_SIZE(uart_parents), 0, SPEAR1310_RAS_CTRL_REG0, | 941 | ARRAY_SIZE(uart_parents), 0, SPEAR1310_RAS_CTRL_REG0, |
944 | SPEAR1310_UART2_CLK_SHIFT, SPEAR1310_RAS_UART_CLK_MASK, | 942 | SPEAR1310_UART2_CLK_SHIFT, SPEAR1310_RAS_UART_CLK_MASK, |
945 | 0, &_lock); | 943 | 0, &_lock); |
946 | clk_register_clkdev(clk, "uart2_mux_clk", NULL); | 944 | clk_register_clkdev(clk, "uart2_mclk", NULL); |
947 | 945 | ||
948 | clk = clk_register_gate(NULL, "uart2_clk", "uart2_mux_clk", 0, | 946 | clk = clk_register_gate(NULL, "uart2_clk", "uart2_mclk", 0, |
949 | SPEAR1310_RAS_SW_CLK_CTRL, SPEAR1310_UART2_CLK_ENB, 0, | 947 | SPEAR1310_RAS_SW_CLK_CTRL, SPEAR1310_UART2_CLK_ENB, 0, |
950 | &_lock); | 948 | &_lock); |
951 | clk_register_clkdev(clk, NULL, "5c900000.serial"); | 949 | clk_register_clkdev(clk, NULL, "5c900000.serial"); |
952 | 950 | ||
953 | clk = clk_register_mux(NULL, "uart3_mux_clk", uart_parents, | 951 | clk = clk_register_mux(NULL, "uart3_mclk", uart_parents, |
954 | ARRAY_SIZE(uart_parents), 0, SPEAR1310_RAS_CTRL_REG0, | 952 | ARRAY_SIZE(uart_parents), 0, SPEAR1310_RAS_CTRL_REG0, |
955 | SPEAR1310_UART3_CLK_SHIFT, SPEAR1310_RAS_UART_CLK_MASK, | 953 | SPEAR1310_UART3_CLK_SHIFT, SPEAR1310_RAS_UART_CLK_MASK, |
956 | 0, &_lock); | 954 | 0, &_lock); |
957 | clk_register_clkdev(clk, "uart3_mux_clk", NULL); | 955 | clk_register_clkdev(clk, "uart3_mclk", NULL); |
958 | 956 | ||
959 | clk = clk_register_gate(NULL, "uart3_clk", "uart3_mux_clk", 0, | 957 | clk = clk_register_gate(NULL, "uart3_clk", "uart3_mclk", 0, |
960 | SPEAR1310_RAS_SW_CLK_CTRL, SPEAR1310_UART3_CLK_ENB, 0, | 958 | SPEAR1310_RAS_SW_CLK_CTRL, SPEAR1310_UART3_CLK_ENB, 0, |
961 | &_lock); | 959 | &_lock); |
962 | clk_register_clkdev(clk, NULL, "5ca00000.serial"); | 960 | clk_register_clkdev(clk, NULL, "5ca00000.serial"); |
963 | 961 | ||
964 | clk = clk_register_mux(NULL, "uart4_mux_clk", uart_parents, | 962 | clk = clk_register_mux(NULL, "uart4_mclk", uart_parents, |
965 | ARRAY_SIZE(uart_parents), 0, SPEAR1310_RAS_CTRL_REG0, | 963 | ARRAY_SIZE(uart_parents), 0, SPEAR1310_RAS_CTRL_REG0, |
966 | SPEAR1310_UART4_CLK_SHIFT, SPEAR1310_RAS_UART_CLK_MASK, | 964 | SPEAR1310_UART4_CLK_SHIFT, SPEAR1310_RAS_UART_CLK_MASK, |
967 | 0, &_lock); | 965 | 0, &_lock); |
968 | clk_register_clkdev(clk, "uart4_mux_clk", NULL); | 966 | clk_register_clkdev(clk, "uart4_mclk", NULL); |
969 | 967 | ||
970 | clk = clk_register_gate(NULL, "uart4_clk", "uart4_mux_clk", 0, | 968 | clk = clk_register_gate(NULL, "uart4_clk", "uart4_mclk", 0, |
971 | SPEAR1310_RAS_SW_CLK_CTRL, SPEAR1310_UART4_CLK_ENB, 0, | 969 | SPEAR1310_RAS_SW_CLK_CTRL, SPEAR1310_UART4_CLK_ENB, 0, |
972 | &_lock); | 970 | &_lock); |
973 | clk_register_clkdev(clk, NULL, "5cb00000.serial"); | 971 | clk_register_clkdev(clk, NULL, "5cb00000.serial"); |
974 | 972 | ||
975 | clk = clk_register_mux(NULL, "uart5_mux_clk", uart_parents, | 973 | clk = clk_register_mux(NULL, "uart5_mclk", uart_parents, |
976 | ARRAY_SIZE(uart_parents), 0, SPEAR1310_RAS_CTRL_REG0, | 974 | ARRAY_SIZE(uart_parents), 0, SPEAR1310_RAS_CTRL_REG0, |
977 | SPEAR1310_UART5_CLK_SHIFT, SPEAR1310_RAS_UART_CLK_MASK, | 975 | SPEAR1310_UART5_CLK_SHIFT, SPEAR1310_RAS_UART_CLK_MASK, |
978 | 0, &_lock); | 976 | 0, &_lock); |
979 | clk_register_clkdev(clk, "uart5_mux_clk", NULL); | 977 | clk_register_clkdev(clk, "uart5_mclk", NULL); |
980 | 978 | ||
981 | clk = clk_register_gate(NULL, "uart5_clk", "uart5_mux_clk", 0, | 979 | clk = clk_register_gate(NULL, "uart5_clk", "uart5_mclk", 0, |
982 | SPEAR1310_RAS_SW_CLK_CTRL, SPEAR1310_UART5_CLK_ENB, 0, | 980 | SPEAR1310_RAS_SW_CLK_CTRL, SPEAR1310_UART5_CLK_ENB, 0, |
983 | &_lock); | 981 | &_lock); |
984 | clk_register_clkdev(clk, NULL, "5cc00000.serial"); | 982 | clk_register_clkdev(clk, NULL, "5cc00000.serial"); |
985 | 983 | ||
986 | clk = clk_register_mux(NULL, "i2c1_mux_clk", i2c_parents, | 984 | clk = clk_register_mux(NULL, "i2c1_mclk", i2c_parents, |
987 | ARRAY_SIZE(i2c_parents), 0, SPEAR1310_RAS_CTRL_REG0, | 985 | ARRAY_SIZE(i2c_parents), 0, SPEAR1310_RAS_CTRL_REG0, |
988 | SPEAR1310_I2C1_CLK_SHIFT, SPEAR1310_I2C_CLK_MASK, 0, | 986 | SPEAR1310_I2C1_CLK_SHIFT, SPEAR1310_I2C_CLK_MASK, 0, |
989 | &_lock); | 987 | &_lock); |
990 | clk_register_clkdev(clk, "i2c1_mux_clk", NULL); | 988 | clk_register_clkdev(clk, "i2c1_mclk", NULL); |
991 | 989 | ||
992 | clk = clk_register_gate(NULL, "i2c1_clk", "i2c1_mux_clk", 0, | 990 | clk = clk_register_gate(NULL, "i2c1_clk", "i2c1_mclk", 0, |
993 | SPEAR1310_RAS_SW_CLK_CTRL, SPEAR1310_I2C1_CLK_ENB, 0, | 991 | SPEAR1310_RAS_SW_CLK_CTRL, SPEAR1310_I2C1_CLK_ENB, 0, |
994 | &_lock); | 992 | &_lock); |
995 | clk_register_clkdev(clk, NULL, "5cd00000.i2c"); | 993 | clk_register_clkdev(clk, NULL, "5cd00000.i2c"); |
996 | 994 | ||
997 | clk = clk_register_mux(NULL, "i2c2_mux_clk", i2c_parents, | 995 | clk = clk_register_mux(NULL, "i2c2_mclk", i2c_parents, |
998 | ARRAY_SIZE(i2c_parents), 0, SPEAR1310_RAS_CTRL_REG0, | 996 | ARRAY_SIZE(i2c_parents), 0, SPEAR1310_RAS_CTRL_REG0, |
999 | SPEAR1310_I2C2_CLK_SHIFT, SPEAR1310_I2C_CLK_MASK, 0, | 997 | SPEAR1310_I2C2_CLK_SHIFT, SPEAR1310_I2C_CLK_MASK, 0, |
1000 | &_lock); | 998 | &_lock); |
1001 | clk_register_clkdev(clk, "i2c2_mux_clk", NULL); | 999 | clk_register_clkdev(clk, "i2c2_mclk", NULL); |
1002 | 1000 | ||
1003 | clk = clk_register_gate(NULL, "i2c2_clk", "i2c2_mux_clk", 0, | 1001 | clk = clk_register_gate(NULL, "i2c2_clk", "i2c2_mclk", 0, |
1004 | SPEAR1310_RAS_SW_CLK_CTRL, SPEAR1310_I2C2_CLK_ENB, 0, | 1002 | SPEAR1310_RAS_SW_CLK_CTRL, SPEAR1310_I2C2_CLK_ENB, 0, |
1005 | &_lock); | 1003 | &_lock); |
1006 | clk_register_clkdev(clk, NULL, "5ce00000.i2c"); | 1004 | clk_register_clkdev(clk, NULL, "5ce00000.i2c"); |
1007 | 1005 | ||
1008 | clk = clk_register_mux(NULL, "i2c3_mux_clk", i2c_parents, | 1006 | clk = clk_register_mux(NULL, "i2c3_mclk", i2c_parents, |
1009 | ARRAY_SIZE(i2c_parents), 0, SPEAR1310_RAS_CTRL_REG0, | 1007 | ARRAY_SIZE(i2c_parents), 0, SPEAR1310_RAS_CTRL_REG0, |
1010 | SPEAR1310_I2C3_CLK_SHIFT, SPEAR1310_I2C_CLK_MASK, 0, | 1008 | SPEAR1310_I2C3_CLK_SHIFT, SPEAR1310_I2C_CLK_MASK, 0, |
1011 | &_lock); | 1009 | &_lock); |
1012 | clk_register_clkdev(clk, "i2c3_mux_clk", NULL); | 1010 | clk_register_clkdev(clk, "i2c3_mclk", NULL); |
1013 | 1011 | ||
1014 | clk = clk_register_gate(NULL, "i2c3_clk", "i2c3_mux_clk", 0, | 1012 | clk = clk_register_gate(NULL, "i2c3_clk", "i2c3_mclk", 0, |
1015 | SPEAR1310_RAS_SW_CLK_CTRL, SPEAR1310_I2C3_CLK_ENB, 0, | 1013 | SPEAR1310_RAS_SW_CLK_CTRL, SPEAR1310_I2C3_CLK_ENB, 0, |
1016 | &_lock); | 1014 | &_lock); |
1017 | clk_register_clkdev(clk, NULL, "5cf00000.i2c"); | 1015 | clk_register_clkdev(clk, NULL, "5cf00000.i2c"); |
1018 | 1016 | ||
1019 | clk = clk_register_mux(NULL, "i2c4_mux_clk", i2c_parents, | 1017 | clk = clk_register_mux(NULL, "i2c4_mclk", i2c_parents, |
1020 | ARRAY_SIZE(i2c_parents), 0, SPEAR1310_RAS_CTRL_REG0, | 1018 | ARRAY_SIZE(i2c_parents), 0, SPEAR1310_RAS_CTRL_REG0, |
1021 | SPEAR1310_I2C4_CLK_SHIFT, SPEAR1310_I2C_CLK_MASK, 0, | 1019 | SPEAR1310_I2C4_CLK_SHIFT, SPEAR1310_I2C_CLK_MASK, 0, |
1022 | &_lock); | 1020 | &_lock); |
1023 | clk_register_clkdev(clk, "i2c4_mux_clk", NULL); | 1021 | clk_register_clkdev(clk, "i2c4_mclk", NULL); |
1024 | 1022 | ||
1025 | clk = clk_register_gate(NULL, "i2c4_clk", "i2c4_mux_clk", 0, | 1023 | clk = clk_register_gate(NULL, "i2c4_clk", "i2c4_mclk", 0, |
1026 | SPEAR1310_RAS_SW_CLK_CTRL, SPEAR1310_I2C4_CLK_ENB, 0, | 1024 | SPEAR1310_RAS_SW_CLK_CTRL, SPEAR1310_I2C4_CLK_ENB, 0, |
1027 | &_lock); | 1025 | &_lock); |
1028 | clk_register_clkdev(clk, NULL, "5d000000.i2c"); | 1026 | clk_register_clkdev(clk, NULL, "5d000000.i2c"); |
1029 | 1027 | ||
1030 | clk = clk_register_mux(NULL, "i2c5_mux_clk", i2c_parents, | 1028 | clk = clk_register_mux(NULL, "i2c5_mclk", i2c_parents, |
1031 | ARRAY_SIZE(i2c_parents), 0, SPEAR1310_RAS_CTRL_REG0, | 1029 | ARRAY_SIZE(i2c_parents), 0, SPEAR1310_RAS_CTRL_REG0, |
1032 | SPEAR1310_I2C5_CLK_SHIFT, SPEAR1310_I2C_CLK_MASK, 0, | 1030 | SPEAR1310_I2C5_CLK_SHIFT, SPEAR1310_I2C_CLK_MASK, 0, |
1033 | &_lock); | 1031 | &_lock); |
1034 | clk_register_clkdev(clk, "i2c5_mux_clk", NULL); | 1032 | clk_register_clkdev(clk, "i2c5_mclk", NULL); |
1035 | 1033 | ||
1036 | clk = clk_register_gate(NULL, "i2c5_clk", "i2c5_mux_clk", 0, | 1034 | clk = clk_register_gate(NULL, "i2c5_clk", "i2c5_mclk", 0, |
1037 | SPEAR1310_RAS_SW_CLK_CTRL, SPEAR1310_I2C5_CLK_ENB, 0, | 1035 | SPEAR1310_RAS_SW_CLK_CTRL, SPEAR1310_I2C5_CLK_ENB, 0, |
1038 | &_lock); | 1036 | &_lock); |
1039 | clk_register_clkdev(clk, NULL, "5d100000.i2c"); | 1037 | clk_register_clkdev(clk, NULL, "5d100000.i2c"); |
1040 | 1038 | ||
1041 | clk = clk_register_mux(NULL, "i2c6_mux_clk", i2c_parents, | 1039 | clk = clk_register_mux(NULL, "i2c6_mclk", i2c_parents, |
1042 | ARRAY_SIZE(i2c_parents), 0, SPEAR1310_RAS_CTRL_REG0, | 1040 | ARRAY_SIZE(i2c_parents), 0, SPEAR1310_RAS_CTRL_REG0, |
1043 | SPEAR1310_I2C6_CLK_SHIFT, SPEAR1310_I2C_CLK_MASK, 0, | 1041 | SPEAR1310_I2C6_CLK_SHIFT, SPEAR1310_I2C_CLK_MASK, 0, |
1044 | &_lock); | 1042 | &_lock); |
1045 | clk_register_clkdev(clk, "i2c6_mux_clk", NULL); | 1043 | clk_register_clkdev(clk, "i2c6_mclk", NULL); |
1046 | 1044 | ||
1047 | clk = clk_register_gate(NULL, "i2c6_clk", "i2c6_mux_clk", 0, | 1045 | clk = clk_register_gate(NULL, "i2c6_clk", "i2c6_mclk", 0, |
1048 | SPEAR1310_RAS_SW_CLK_CTRL, SPEAR1310_I2C6_CLK_ENB, 0, | 1046 | SPEAR1310_RAS_SW_CLK_CTRL, SPEAR1310_I2C6_CLK_ENB, 0, |
1049 | &_lock); | 1047 | &_lock); |
1050 | clk_register_clkdev(clk, NULL, "5d200000.i2c"); | 1048 | clk_register_clkdev(clk, NULL, "5d200000.i2c"); |
1051 | 1049 | ||
1052 | clk = clk_register_mux(NULL, "i2c7_mux_clk", i2c_parents, | 1050 | clk = clk_register_mux(NULL, "i2c7_mclk", i2c_parents, |
1053 | ARRAY_SIZE(i2c_parents), 0, SPEAR1310_RAS_CTRL_REG0, | 1051 | ARRAY_SIZE(i2c_parents), 0, SPEAR1310_RAS_CTRL_REG0, |
1054 | SPEAR1310_I2C7_CLK_SHIFT, SPEAR1310_I2C_CLK_MASK, 0, | 1052 | SPEAR1310_I2C7_CLK_SHIFT, SPEAR1310_I2C_CLK_MASK, 0, |
1055 | &_lock); | 1053 | &_lock); |
1056 | clk_register_clkdev(clk, "i2c7_mux_clk", NULL); | 1054 | clk_register_clkdev(clk, "i2c7_mclk", NULL); |
1057 | 1055 | ||
1058 | clk = clk_register_gate(NULL, "i2c7_clk", "i2c7_mux_clk", 0, | 1056 | clk = clk_register_gate(NULL, "i2c7_clk", "i2c7_mclk", 0, |
1059 | SPEAR1310_RAS_SW_CLK_CTRL, SPEAR1310_I2C7_CLK_ENB, 0, | 1057 | SPEAR1310_RAS_SW_CLK_CTRL, SPEAR1310_I2C7_CLK_ENB, 0, |
1060 | &_lock); | 1058 | &_lock); |
1061 | clk_register_clkdev(clk, NULL, "5d300000.i2c"); | 1059 | clk_register_clkdev(clk, NULL, "5d300000.i2c"); |
1062 | 1060 | ||
1063 | clk = clk_register_mux(NULL, "ssp1_mux_clk", ssp1_parents, | 1061 | clk = clk_register_mux(NULL, "ssp1_mclk", ssp1_parents, |
1064 | ARRAY_SIZE(ssp1_parents), 0, SPEAR1310_RAS_CTRL_REG0, | 1062 | ARRAY_SIZE(ssp1_parents), 0, SPEAR1310_RAS_CTRL_REG0, |
1065 | SPEAR1310_SSP1_CLK_SHIFT, SPEAR1310_SSP1_CLK_MASK, 0, | 1063 | SPEAR1310_SSP1_CLK_SHIFT, SPEAR1310_SSP1_CLK_MASK, 0, |
1066 | &_lock); | 1064 | &_lock); |
1067 | clk_register_clkdev(clk, "ssp1_mux_clk", NULL); | 1065 | clk_register_clkdev(clk, "ssp1_mclk", NULL); |
1068 | 1066 | ||
1069 | clk = clk_register_gate(NULL, "ssp1_clk", "ssp1_mux_clk", 0, | 1067 | clk = clk_register_gate(NULL, "ssp1_clk", "ssp1_mclk", 0, |
1070 | SPEAR1310_RAS_SW_CLK_CTRL, SPEAR1310_SSP1_CLK_ENB, 0, | 1068 | SPEAR1310_RAS_SW_CLK_CTRL, SPEAR1310_SSP1_CLK_ENB, 0, |
1071 | &_lock); | 1069 | &_lock); |
1072 | clk_register_clkdev(clk, NULL, "5d400000.spi"); | 1070 | clk_register_clkdev(clk, NULL, "5d400000.spi"); |
1073 | 1071 | ||
1074 | clk = clk_register_mux(NULL, "pci_mux_clk", pci_parents, | 1072 | clk = clk_register_mux(NULL, "pci_mclk", pci_parents, |
1075 | ARRAY_SIZE(pci_parents), 0, SPEAR1310_RAS_CTRL_REG0, | 1073 | ARRAY_SIZE(pci_parents), 0, SPEAR1310_RAS_CTRL_REG0, |
1076 | SPEAR1310_PCI_CLK_SHIFT, SPEAR1310_PCI_CLK_MASK, 0, | 1074 | SPEAR1310_PCI_CLK_SHIFT, SPEAR1310_PCI_CLK_MASK, 0, |
1077 | &_lock); | 1075 | &_lock); |
1078 | clk_register_clkdev(clk, "pci_mux_clk", NULL); | 1076 | clk_register_clkdev(clk, "pci_mclk", NULL); |
1079 | 1077 | ||
1080 | clk = clk_register_gate(NULL, "pci_clk", "pci_mux_clk", 0, | 1078 | clk = clk_register_gate(NULL, "pci_clk", "pci_mclk", 0, |
1081 | SPEAR1310_RAS_SW_CLK_CTRL, SPEAR1310_PCI_CLK_ENB, 0, | 1079 | SPEAR1310_RAS_SW_CLK_CTRL, SPEAR1310_PCI_CLK_ENB, 0, |
1082 | &_lock); | 1080 | &_lock); |
1083 | clk_register_clkdev(clk, NULL, "pci"); | 1081 | clk_register_clkdev(clk, NULL, "pci"); |
1084 | 1082 | ||
1085 | clk = clk_register_mux(NULL, "tdm1_mux_clk", tdm_parents, | 1083 | clk = clk_register_mux(NULL, "tdm1_mclk", tdm_parents, |
1086 | ARRAY_SIZE(tdm_parents), 0, SPEAR1310_RAS_CTRL_REG0, | 1084 | ARRAY_SIZE(tdm_parents), 0, SPEAR1310_RAS_CTRL_REG0, |
1087 | SPEAR1310_TDM1_CLK_SHIFT, SPEAR1310_TDM_CLK_MASK, 0, | 1085 | SPEAR1310_TDM1_CLK_SHIFT, SPEAR1310_TDM_CLK_MASK, 0, |
1088 | &_lock); | 1086 | &_lock); |
1089 | clk_register_clkdev(clk, "tdm1_mux_clk", NULL); | 1087 | clk_register_clkdev(clk, "tdm1_mclk", NULL); |
1090 | 1088 | ||
1091 | clk = clk_register_gate(NULL, "tdm1_clk", "tdm1_mux_clk", 0, | 1089 | clk = clk_register_gate(NULL, "tdm1_clk", "tdm1_mclk", 0, |
1092 | SPEAR1310_RAS_SW_CLK_CTRL, SPEAR1310_TDM1_CLK_ENB, 0, | 1090 | SPEAR1310_RAS_SW_CLK_CTRL, SPEAR1310_TDM1_CLK_ENB, 0, |
1093 | &_lock); | 1091 | &_lock); |
1094 | clk_register_clkdev(clk, NULL, "tdm_hdlc.0"); | 1092 | clk_register_clkdev(clk, NULL, "tdm_hdlc.0"); |
1095 | 1093 | ||
1096 | clk = clk_register_mux(NULL, "tdm2_mux_clk", tdm_parents, | 1094 | clk = clk_register_mux(NULL, "tdm2_mclk", tdm_parents, |
1097 | ARRAY_SIZE(tdm_parents), 0, SPEAR1310_RAS_CTRL_REG0, | 1095 | ARRAY_SIZE(tdm_parents), 0, SPEAR1310_RAS_CTRL_REG0, |
1098 | SPEAR1310_TDM2_CLK_SHIFT, SPEAR1310_TDM_CLK_MASK, 0, | 1096 | SPEAR1310_TDM2_CLK_SHIFT, SPEAR1310_TDM_CLK_MASK, 0, |
1099 | &_lock); | 1097 | &_lock); |
1100 | clk_register_clkdev(clk, "tdm2_mux_clk", NULL); | 1098 | clk_register_clkdev(clk, "tdm2_mclk", NULL); |
1101 | 1099 | ||
1102 | clk = clk_register_gate(NULL, "tdm2_clk", "tdm2_mux_clk", 0, | 1100 | clk = clk_register_gate(NULL, "tdm2_clk", "tdm2_mclk", 0, |
1103 | SPEAR1310_RAS_SW_CLK_CTRL, SPEAR1310_TDM2_CLK_ENB, 0, | 1101 | SPEAR1310_RAS_SW_CLK_CTRL, SPEAR1310_TDM2_CLK_ENB, 0, |
1104 | &_lock); | 1102 | &_lock); |
1105 | clk_register_clkdev(clk, NULL, "tdm_hdlc.1"); | 1103 | clk_register_clkdev(clk, NULL, "tdm_hdlc.1"); |
diff --git a/drivers/clk/spear/spear1340_clock.c b/drivers/clk/spear/spear1340_clock.c index e3ea72162236..2352cee7f645 100644 --- a/drivers/clk/spear/spear1340_clock.c +++ b/drivers/clk/spear/spear1340_clock.c | |||
@@ -369,27 +369,25 @@ static struct frac_rate_tbl gen_rtbl[] = { | |||
369 | 369 | ||
370 | /* clock parents */ | 370 | /* clock parents */ |
371 | static const char *vco_parents[] = { "osc_24m_clk", "osc_25m_clk", }; | 371 | static const char *vco_parents[] = { "osc_24m_clk", "osc_25m_clk", }; |
372 | static const char *sys_parents[] = { "none", "pll1_clk", "none", "none", | 372 | static const char *sys_parents[] = { "pll1_clk", "pll1_clk", "pll1_clk", |
373 | "sys_synth_clk", "none", "pll2_clk", "pll3_clk", }; | 373 | "pll1_clk", "sys_synth_clk", "sys_synth_clk", "pll2_clk", "pll3_clk", }; |
374 | static const char *ahb_parents[] = { "cpu_div3_clk", "amba_synth_clk", }; | 374 | static const char *ahb_parents[] = { "cpu_div3_clk", "amba_syn_clk", }; |
375 | static const char *gpt_parents[] = { "osc_24m_clk", "apb_clk", }; | 375 | static const char *gpt_parents[] = { "osc_24m_clk", "apb_clk", }; |
376 | static const char *uart0_parents[] = { "pll5_clk", "osc_24m_clk", | 376 | static const char *uart0_parents[] = { "pll5_clk", "osc_24m_clk", |
377 | "uart0_synth_gate_clk", }; | 377 | "uart0_syn_gclk", }; |
378 | static const char *uart1_parents[] = { "pll5_clk", "osc_24m_clk", | 378 | static const char *uart1_parents[] = { "pll5_clk", "osc_24m_clk", |
379 | "uart1_synth_gate_clk", }; | 379 | "uart1_syn_gclk", }; |
380 | static const char *c3_parents[] = { "pll5_clk", "c3_synth_gate_clk", }; | 380 | static const char *c3_parents[] = { "pll5_clk", "c3_syn_gclk", }; |
381 | static const char *gmac_phy_input_parents[] = { "gmii_125m_pad_clk", "pll2_clk", | 381 | static const char *gmac_phy_input_parents[] = { "gmii_pad_clk", "pll2_clk", |
382 | "osc_25m_clk", }; | 382 | "osc_25m_clk", }; |
383 | static const char *gmac_phy_parents[] = { "gmac_phy_input_mux_clk", | 383 | static const char *gmac_phy_parents[] = { "phy_input_mclk", "phy_syn_gclk", }; |
384 | "gmac_phy_synth_gate_clk", }; | ||
385 | static const char *clcd_synth_parents[] = { "vco1div4_clk", "pll2_clk", }; | 384 | static const char *clcd_synth_parents[] = { "vco1div4_clk", "pll2_clk", }; |
386 | static const char *clcd_pixel_parents[] = { "pll5_clk", "clcd_synth_clk", }; | 385 | static const char *clcd_pixel_parents[] = { "pll5_clk", "clcd_syn_clk", }; |
387 | static const char *i2s_src_parents[] = { "vco1div2_clk", "pll2_clk", "pll3_clk", | 386 | static const char *i2s_src_parents[] = { "vco1div2_clk", "pll2_clk", "pll3_clk", |
388 | "i2s_src_pad_clk", }; | 387 | "i2s_src_pad_clk", }; |
389 | static const char *i2s_ref_parents[] = { "i2s_src_mux_clk", "i2s_prs1_clk", }; | 388 | static const char *i2s_ref_parents[] = { "i2s_src_mclk", "i2s_prs1_clk", }; |
390 | static const char *spdif_out_parents[] = { "i2s_src_pad_clk", "gen_synth2_clk", | 389 | static const char *spdif_out_parents[] = { "i2s_src_pad_clk", "gen_syn2_clk", }; |
391 | }; | 390 | static const char *spdif_in_parents[] = { "pll2_clk", "gen_syn3_clk", }; |
392 | static const char *spdif_in_parents[] = { "pll2_clk", "gen_synth3_clk", }; | ||
393 | 391 | ||
394 | static const char *gen_synth0_1_parents[] = { "vco1div4_clk", "vco3div2_clk", | 392 | static const char *gen_synth0_1_parents[] = { "vco1div4_clk", "vco3div2_clk", |
395 | "pll3_clk", }; | 393 | "pll3_clk", }; |
@@ -415,9 +413,9 @@ void __init spear1340_clk_init(void) | |||
415 | 25000000); | 413 | 25000000); |
416 | clk_register_clkdev(clk, "osc_25m_clk", NULL); | 414 | clk_register_clkdev(clk, "osc_25m_clk", NULL); |
417 | 415 | ||
418 | clk = clk_register_fixed_rate(NULL, "gmii_125m_pad_clk", NULL, | 416 | clk = clk_register_fixed_rate(NULL, "gmii_pad_clk", NULL, CLK_IS_ROOT, |
419 | CLK_IS_ROOT, 125000000); | 417 | 125000000); |
420 | clk_register_clkdev(clk, "gmii_125m_pad_clk", NULL); | 418 | clk_register_clkdev(clk, "gmii_pad_clk", NULL); |
421 | 419 | ||
422 | clk = clk_register_fixed_rate(NULL, "i2s_src_pad_clk", NULL, | 420 | clk = clk_register_fixed_rate(NULL, "i2s_src_pad_clk", NULL, |
423 | CLK_IS_ROOT, 12288000); | 421 | CLK_IS_ROOT, 12288000); |
@@ -431,35 +429,35 @@ void __init spear1340_clk_init(void) | |||
431 | 429 | ||
432 | /* clock derived from 24 or 25 MHz osc clk */ | 430 | /* clock derived from 24 or 25 MHz osc clk */ |
433 | /* vco-pll */ | 431 | /* vco-pll */ |
434 | clk = clk_register_mux(NULL, "vco1_mux_clk", vco_parents, | 432 | clk = clk_register_mux(NULL, "vco1_mclk", vco_parents, |
435 | ARRAY_SIZE(vco_parents), 0, SPEAR1340_PLL_CFG, | 433 | ARRAY_SIZE(vco_parents), 0, SPEAR1340_PLL_CFG, |
436 | SPEAR1340_PLL1_CLK_SHIFT, SPEAR1340_PLL_CLK_MASK, 0, | 434 | SPEAR1340_PLL1_CLK_SHIFT, SPEAR1340_PLL_CLK_MASK, 0, |
437 | &_lock); | 435 | &_lock); |
438 | clk_register_clkdev(clk, "vco1_mux_clk", NULL); | 436 | clk_register_clkdev(clk, "vco1_mclk", NULL); |
439 | clk = clk_register_vco_pll("vco1_clk", "pll1_clk", NULL, "vco1_mux_clk", | 437 | clk = clk_register_vco_pll("vco1_clk", "pll1_clk", NULL, "vco1_mclk", 0, |
440 | 0, SPEAR1340_PLL1_CTR, SPEAR1340_PLL1_FRQ, pll_rtbl, | 438 | SPEAR1340_PLL1_CTR, SPEAR1340_PLL1_FRQ, pll_rtbl, |
441 | ARRAY_SIZE(pll_rtbl), &_lock, &clk1, NULL); | 439 | ARRAY_SIZE(pll_rtbl), &_lock, &clk1, NULL); |
442 | clk_register_clkdev(clk, "vco1_clk", NULL); | 440 | clk_register_clkdev(clk, "vco1_clk", NULL); |
443 | clk_register_clkdev(clk1, "pll1_clk", NULL); | 441 | clk_register_clkdev(clk1, "pll1_clk", NULL); |
444 | 442 | ||
445 | clk = clk_register_mux(NULL, "vco2_mux_clk", vco_parents, | 443 | clk = clk_register_mux(NULL, "vco2_mclk", vco_parents, |
446 | ARRAY_SIZE(vco_parents), 0, SPEAR1340_PLL_CFG, | 444 | ARRAY_SIZE(vco_parents), 0, SPEAR1340_PLL_CFG, |
447 | SPEAR1340_PLL2_CLK_SHIFT, SPEAR1340_PLL_CLK_MASK, 0, | 445 | SPEAR1340_PLL2_CLK_SHIFT, SPEAR1340_PLL_CLK_MASK, 0, |
448 | &_lock); | 446 | &_lock); |
449 | clk_register_clkdev(clk, "vco2_mux_clk", NULL); | 447 | clk_register_clkdev(clk, "vco2_mclk", NULL); |
450 | clk = clk_register_vco_pll("vco2_clk", "pll2_clk", NULL, "vco2_mux_clk", | 448 | clk = clk_register_vco_pll("vco2_clk", "pll2_clk", NULL, "vco2_mclk", 0, |
451 | 0, SPEAR1340_PLL2_CTR, SPEAR1340_PLL2_FRQ, pll_rtbl, | 449 | SPEAR1340_PLL2_CTR, SPEAR1340_PLL2_FRQ, pll_rtbl, |
452 | ARRAY_SIZE(pll_rtbl), &_lock, &clk1, NULL); | 450 | ARRAY_SIZE(pll_rtbl), &_lock, &clk1, NULL); |
453 | clk_register_clkdev(clk, "vco2_clk", NULL); | 451 | clk_register_clkdev(clk, "vco2_clk", NULL); |
454 | clk_register_clkdev(clk1, "pll2_clk", NULL); | 452 | clk_register_clkdev(clk1, "pll2_clk", NULL); |
455 | 453 | ||
456 | clk = clk_register_mux(NULL, "vco3_mux_clk", vco_parents, | 454 | clk = clk_register_mux(NULL, "vco3_mclk", vco_parents, |
457 | ARRAY_SIZE(vco_parents), 0, SPEAR1340_PLL_CFG, | 455 | ARRAY_SIZE(vco_parents), 0, SPEAR1340_PLL_CFG, |
458 | SPEAR1340_PLL3_CLK_SHIFT, SPEAR1340_PLL_CLK_MASK, 0, | 456 | SPEAR1340_PLL3_CLK_SHIFT, SPEAR1340_PLL_CLK_MASK, 0, |
459 | &_lock); | 457 | &_lock); |
460 | clk_register_clkdev(clk, "vco3_mux_clk", NULL); | 458 | clk_register_clkdev(clk, "vco3_mclk", NULL); |
461 | clk = clk_register_vco_pll("vco3_clk", "pll3_clk", NULL, "vco3_mux_clk", | 459 | clk = clk_register_vco_pll("vco3_clk", "pll3_clk", NULL, "vco3_mclk", 0, |
462 | 0, SPEAR1340_PLL3_CTR, SPEAR1340_PLL3_FRQ, pll_rtbl, | 460 | SPEAR1340_PLL3_CTR, SPEAR1340_PLL3_FRQ, pll_rtbl, |
463 | ARRAY_SIZE(pll_rtbl), &_lock, &clk1, NULL); | 461 | ARRAY_SIZE(pll_rtbl), &_lock, &clk1, NULL); |
464 | clk_register_clkdev(clk, "vco3_clk", NULL); | 462 | clk_register_clkdev(clk, "vco3_clk", NULL); |
465 | clk_register_clkdev(clk1, "pll3_clk", NULL); | 463 | clk_register_clkdev(clk1, "pll3_clk", NULL); |
@@ -498,7 +496,7 @@ void __init spear1340_clk_init(void) | |||
498 | /* peripherals */ | 496 | /* peripherals */ |
499 | clk_register_fixed_factor(NULL, "thermal_clk", "osc_24m_clk", 0, 1, | 497 | clk_register_fixed_factor(NULL, "thermal_clk", "osc_24m_clk", 0, 1, |
500 | 128); | 498 | 128); |
501 | clk = clk_register_gate(NULL, "thermal_gate_clk", "thermal_clk", 0, | 499 | clk = clk_register_gate(NULL, "thermal_gclk", "thermal_clk", 0, |
502 | SPEAR1340_PERIP2_CLK_ENB, SPEAR1340_THSENS_CLK_ENB, 0, | 500 | SPEAR1340_PERIP2_CLK_ENB, SPEAR1340_THSENS_CLK_ENB, 0, |
503 | &_lock); | 501 | &_lock); |
504 | clk_register_clkdev(clk, NULL, "spear_thermal"); | 502 | clk_register_clkdev(clk, NULL, "spear_thermal"); |
@@ -509,23 +507,23 @@ void __init spear1340_clk_init(void) | |||
509 | clk_register_clkdev(clk, "ddr_clk", NULL); | 507 | clk_register_clkdev(clk, "ddr_clk", NULL); |
510 | 508 | ||
511 | /* clock derived from pll1 clk */ | 509 | /* clock derived from pll1 clk */ |
512 | clk = clk_register_frac("sys_synth_clk", "vco1div2_clk", 0, | 510 | clk = clk_register_frac("sys_syn_clk", "vco1div2_clk", 0, |
513 | SPEAR1340_SYS_CLK_SYNT, sys_synth_rtbl, | 511 | SPEAR1340_SYS_CLK_SYNT, sys_synth_rtbl, |
514 | ARRAY_SIZE(sys_synth_rtbl), &_lock); | 512 | ARRAY_SIZE(sys_synth_rtbl), &_lock); |
515 | clk_register_clkdev(clk, "sys_synth_clk", NULL); | 513 | clk_register_clkdev(clk, "sys_syn_clk", NULL); |
516 | 514 | ||
517 | clk = clk_register_frac("amba_synth_clk", "vco1div2_clk", 0, | 515 | clk = clk_register_frac("amba_syn_clk", "vco1div2_clk", 0, |
518 | SPEAR1340_AMBA_CLK_SYNT, amba_synth_rtbl, | 516 | SPEAR1340_AMBA_CLK_SYNT, amba_synth_rtbl, |
519 | ARRAY_SIZE(amba_synth_rtbl), &_lock); | 517 | ARRAY_SIZE(amba_synth_rtbl), &_lock); |
520 | clk_register_clkdev(clk, "amba_synth_clk", NULL); | 518 | clk_register_clkdev(clk, "amba_syn_clk", NULL); |
521 | 519 | ||
522 | clk = clk_register_mux(NULL, "sys_mux_clk", sys_parents, | 520 | clk = clk_register_mux(NULL, "sys_mclk", sys_parents, |
523 | ARRAY_SIZE(sys_parents), 0, SPEAR1340_SYS_CLK_CTRL, | 521 | ARRAY_SIZE(sys_parents), 0, SPEAR1340_SYS_CLK_CTRL, |
524 | SPEAR1340_SCLK_SRC_SEL_SHIFT, | 522 | SPEAR1340_SCLK_SRC_SEL_SHIFT, |
525 | SPEAR1340_SCLK_SRC_SEL_MASK, 0, &_lock); | 523 | SPEAR1340_SCLK_SRC_SEL_MASK, 0, &_lock); |
526 | clk_register_clkdev(clk, "sys_clk", NULL); | 524 | clk_register_clkdev(clk, "sys_clk", NULL); |
527 | 525 | ||
528 | clk = clk_register_fixed_factor(NULL, "cpu_clk", "sys_mux_clk", 0, 1, | 526 | clk = clk_register_fixed_factor(NULL, "cpu_clk", "sys_mclk", 0, 1, |
529 | 2); | 527 | 2); |
530 | clk_register_clkdev(clk, "cpu_clk", NULL); | 528 | clk_register_clkdev(clk, "cpu_clk", NULL); |
531 | 529 | ||
@@ -548,194 +546,193 @@ void __init spear1340_clk_init(void) | |||
548 | clk_register_clkdev(clk, "apb_clk", NULL); | 546 | clk_register_clkdev(clk, "apb_clk", NULL); |
549 | 547 | ||
550 | /* gpt clocks */ | 548 | /* gpt clocks */ |
551 | clk = clk_register_mux(NULL, "gpt0_mux_clk", gpt_parents, | 549 | clk = clk_register_mux(NULL, "gpt0_mclk", gpt_parents, |
552 | ARRAY_SIZE(gpt_parents), 0, SPEAR1340_PERIP_CLK_CFG, | 550 | ARRAY_SIZE(gpt_parents), 0, SPEAR1340_PERIP_CLK_CFG, |
553 | SPEAR1340_GPT0_CLK_SHIFT, SPEAR1340_GPT_CLK_MASK, 0, | 551 | SPEAR1340_GPT0_CLK_SHIFT, SPEAR1340_GPT_CLK_MASK, 0, |
554 | &_lock); | 552 | &_lock); |
555 | clk_register_clkdev(clk, "gpt0_mux_clk", NULL); | 553 | clk_register_clkdev(clk, "gpt0_mclk", NULL); |
556 | clk = clk_register_gate(NULL, "gpt0_clk", "gpt0_mux_clk", 0, | 554 | clk = clk_register_gate(NULL, "gpt0_clk", "gpt0_mclk", 0, |
557 | SPEAR1340_PERIP1_CLK_ENB, SPEAR1340_GPT0_CLK_ENB, 0, | 555 | SPEAR1340_PERIP1_CLK_ENB, SPEAR1340_GPT0_CLK_ENB, 0, |
558 | &_lock); | 556 | &_lock); |
559 | clk_register_clkdev(clk, NULL, "gpt0"); | 557 | clk_register_clkdev(clk, NULL, "gpt0"); |
560 | 558 | ||
561 | clk = clk_register_mux(NULL, "gpt1_mux_clk", gpt_parents, | 559 | clk = clk_register_mux(NULL, "gpt1_mclk", gpt_parents, |
562 | ARRAY_SIZE(gpt_parents), 0, SPEAR1340_PERIP_CLK_CFG, | 560 | ARRAY_SIZE(gpt_parents), 0, SPEAR1340_PERIP_CLK_CFG, |
563 | SPEAR1340_GPT1_CLK_SHIFT, SPEAR1340_GPT_CLK_MASK, 0, | 561 | SPEAR1340_GPT1_CLK_SHIFT, SPEAR1340_GPT_CLK_MASK, 0, |
564 | &_lock); | 562 | &_lock); |
565 | clk_register_clkdev(clk, "gpt1_mux_clk", NULL); | 563 | clk_register_clkdev(clk, "gpt1_mclk", NULL); |
566 | clk = clk_register_gate(NULL, "gpt1_clk", "gpt1_mux_clk", 0, | 564 | clk = clk_register_gate(NULL, "gpt1_clk", "gpt1_mclk", 0, |
567 | SPEAR1340_PERIP1_CLK_ENB, SPEAR1340_GPT1_CLK_ENB, 0, | 565 | SPEAR1340_PERIP1_CLK_ENB, SPEAR1340_GPT1_CLK_ENB, 0, |
568 | &_lock); | 566 | &_lock); |
569 | clk_register_clkdev(clk, NULL, "gpt1"); | 567 | clk_register_clkdev(clk, NULL, "gpt1"); |
570 | 568 | ||
571 | clk = clk_register_mux(NULL, "gpt2_mux_clk", gpt_parents, | 569 | clk = clk_register_mux(NULL, "gpt2_mclk", gpt_parents, |
572 | ARRAY_SIZE(gpt_parents), 0, SPEAR1340_PERIP_CLK_CFG, | 570 | ARRAY_SIZE(gpt_parents), 0, SPEAR1340_PERIP_CLK_CFG, |
573 | SPEAR1340_GPT2_CLK_SHIFT, SPEAR1340_GPT_CLK_MASK, 0, | 571 | SPEAR1340_GPT2_CLK_SHIFT, SPEAR1340_GPT_CLK_MASK, 0, |
574 | &_lock); | 572 | &_lock); |
575 | clk_register_clkdev(clk, "gpt2_mux_clk", NULL); | 573 | clk_register_clkdev(clk, "gpt2_mclk", NULL); |
576 | clk = clk_register_gate(NULL, "gpt2_clk", "gpt2_mux_clk", 0, | 574 | clk = clk_register_gate(NULL, "gpt2_clk", "gpt2_mclk", 0, |
577 | SPEAR1340_PERIP2_CLK_ENB, SPEAR1340_GPT2_CLK_ENB, 0, | 575 | SPEAR1340_PERIP2_CLK_ENB, SPEAR1340_GPT2_CLK_ENB, 0, |
578 | &_lock); | 576 | &_lock); |
579 | clk_register_clkdev(clk, NULL, "gpt2"); | 577 | clk_register_clkdev(clk, NULL, "gpt2"); |
580 | 578 | ||
581 | clk = clk_register_mux(NULL, "gpt3_mux_clk", gpt_parents, | 579 | clk = clk_register_mux(NULL, "gpt3_mclk", gpt_parents, |
582 | ARRAY_SIZE(gpt_parents), 0, SPEAR1340_PERIP_CLK_CFG, | 580 | ARRAY_SIZE(gpt_parents), 0, SPEAR1340_PERIP_CLK_CFG, |
583 | SPEAR1340_GPT3_CLK_SHIFT, SPEAR1340_GPT_CLK_MASK, 0, | 581 | SPEAR1340_GPT3_CLK_SHIFT, SPEAR1340_GPT_CLK_MASK, 0, |
584 | &_lock); | 582 | &_lock); |
585 | clk_register_clkdev(clk, "gpt3_mux_clk", NULL); | 583 | clk_register_clkdev(clk, "gpt3_mclk", NULL); |
586 | clk = clk_register_gate(NULL, "gpt3_clk", "gpt3_mux_clk", 0, | 584 | clk = clk_register_gate(NULL, "gpt3_clk", "gpt3_mclk", 0, |
587 | SPEAR1340_PERIP2_CLK_ENB, SPEAR1340_GPT3_CLK_ENB, 0, | 585 | SPEAR1340_PERIP2_CLK_ENB, SPEAR1340_GPT3_CLK_ENB, 0, |
588 | &_lock); | 586 | &_lock); |
589 | clk_register_clkdev(clk, NULL, "gpt3"); | 587 | clk_register_clkdev(clk, NULL, "gpt3"); |
590 | 588 | ||
591 | /* others */ | 589 | /* others */ |
592 | clk = clk_register_aux("uart0_synth_clk", "uart0_synth_gate_clk", | 590 | clk = clk_register_aux("uart0_syn_clk", "uart0_syn_gclk", |
593 | "vco1div2_clk", 0, SPEAR1340_UART0_CLK_SYNT, NULL, | 591 | "vco1div2_clk", 0, SPEAR1340_UART0_CLK_SYNT, NULL, |
594 | aux_rtbl, ARRAY_SIZE(aux_rtbl), &_lock, &clk1); | 592 | aux_rtbl, ARRAY_SIZE(aux_rtbl), &_lock, &clk1); |
595 | clk_register_clkdev(clk, "uart0_synth_clk", NULL); | 593 | clk_register_clkdev(clk, "uart0_syn_clk", NULL); |
596 | clk_register_clkdev(clk1, "uart0_synth_gate_clk", NULL); | 594 | clk_register_clkdev(clk1, "uart0_syn_gclk", NULL); |
597 | 595 | ||
598 | clk = clk_register_mux(NULL, "uart0_mux_clk", uart0_parents, | 596 | clk = clk_register_mux(NULL, "uart0_mclk", uart0_parents, |
599 | ARRAY_SIZE(uart0_parents), 0, SPEAR1340_PERIP_CLK_CFG, | 597 | ARRAY_SIZE(uart0_parents), 0, SPEAR1340_PERIP_CLK_CFG, |
600 | SPEAR1340_UART0_CLK_SHIFT, SPEAR1340_UART_CLK_MASK, 0, | 598 | SPEAR1340_UART0_CLK_SHIFT, SPEAR1340_UART_CLK_MASK, 0, |
601 | &_lock); | 599 | &_lock); |
602 | clk_register_clkdev(clk, "uart0_mux_clk", NULL); | 600 | clk_register_clkdev(clk, "uart0_mclk", NULL); |
603 | 601 | ||
604 | clk = clk_register_gate(NULL, "uart0_clk", "uart0_mux_clk", 0, | 602 | clk = clk_register_gate(NULL, "uart0_clk", "uart0_mclk", 0, |
605 | SPEAR1340_PERIP1_CLK_ENB, SPEAR1340_UART0_CLK_ENB, 0, | 603 | SPEAR1340_PERIP1_CLK_ENB, SPEAR1340_UART0_CLK_ENB, 0, |
606 | &_lock); | 604 | &_lock); |
607 | clk_register_clkdev(clk, NULL, "e0000000.serial"); | 605 | clk_register_clkdev(clk, NULL, "e0000000.serial"); |
608 | 606 | ||
609 | clk = clk_register_aux("uart1_synth_clk", "uart1_synth_gate_clk", | 607 | clk = clk_register_aux("uart1_syn_clk", "uart1_syn_gclk", |
610 | "vco1div2_clk", 0, SPEAR1340_UART1_CLK_SYNT, NULL, | 608 | "vco1div2_clk", 0, SPEAR1340_UART1_CLK_SYNT, NULL, |
611 | aux_rtbl, ARRAY_SIZE(aux_rtbl), &_lock, &clk1); | 609 | aux_rtbl, ARRAY_SIZE(aux_rtbl), &_lock, &clk1); |
612 | clk_register_clkdev(clk, "uart1_synth_clk", NULL); | 610 | clk_register_clkdev(clk, "uart1_syn_clk", NULL); |
613 | clk_register_clkdev(clk1, "uart1_synth_gate_clk", NULL); | 611 | clk_register_clkdev(clk1, "uart1_syn_gclk", NULL); |
614 | 612 | ||
615 | clk = clk_register_mux(NULL, "uart1_mux_clk", uart1_parents, | 613 | clk = clk_register_mux(NULL, "uart1_mclk", uart1_parents, |
616 | ARRAY_SIZE(uart1_parents), 0, SPEAR1340_PERIP_CLK_CFG, | 614 | ARRAY_SIZE(uart1_parents), 0, SPEAR1340_PERIP_CLK_CFG, |
617 | SPEAR1340_UART1_CLK_SHIFT, SPEAR1340_UART_CLK_MASK, 0, | 615 | SPEAR1340_UART1_CLK_SHIFT, SPEAR1340_UART_CLK_MASK, 0, |
618 | &_lock); | 616 | &_lock); |
619 | clk_register_clkdev(clk, "uart1_mux_clk", NULL); | 617 | clk_register_clkdev(clk, "uart1_mclk", NULL); |
620 | 618 | ||
621 | clk = clk_register_gate(NULL, "uart1_clk", "uart1_mux_clk", 0, | 619 | clk = clk_register_gate(NULL, "uart1_clk", "uart1_mclk", 0, |
622 | SPEAR1340_PERIP1_CLK_ENB, SPEAR1340_UART1_CLK_ENB, 0, | 620 | SPEAR1340_PERIP3_CLK_ENB, SPEAR1340_UART1_CLK_ENB, 0, |
623 | &_lock); | 621 | &_lock); |
624 | clk_register_clkdev(clk, NULL, "b4100000.serial"); | 622 | clk_register_clkdev(clk, NULL, "b4100000.serial"); |
625 | 623 | ||
626 | clk = clk_register_aux("sdhci_synth_clk", "sdhci_synth_gate_clk", | 624 | clk = clk_register_aux("sdhci_syn_clk", "sdhci_syn_gclk", |
627 | "vco1div2_clk", 0, SPEAR1340_SDHCI_CLK_SYNT, NULL, | 625 | "vco1div2_clk", 0, SPEAR1340_SDHCI_CLK_SYNT, NULL, |
628 | aux_rtbl, ARRAY_SIZE(aux_rtbl), &_lock, &clk1); | 626 | aux_rtbl, ARRAY_SIZE(aux_rtbl), &_lock, &clk1); |
629 | clk_register_clkdev(clk, "sdhci_synth_clk", NULL); | 627 | clk_register_clkdev(clk, "sdhci_syn_clk", NULL); |
630 | clk_register_clkdev(clk1, "sdhci_synth_gate_clk", NULL); | 628 | clk_register_clkdev(clk1, "sdhci_syn_gclk", NULL); |
631 | 629 | ||
632 | clk = clk_register_gate(NULL, "sdhci_clk", "sdhci_synth_gate_clk", 0, | 630 | clk = clk_register_gate(NULL, "sdhci_clk", "sdhci_syn_gclk", 0, |
633 | SPEAR1340_PERIP1_CLK_ENB, SPEAR1340_SDHCI_CLK_ENB, 0, | 631 | SPEAR1340_PERIP1_CLK_ENB, SPEAR1340_SDHCI_CLK_ENB, 0, |
634 | &_lock); | 632 | &_lock); |
635 | clk_register_clkdev(clk, NULL, "b3000000.sdhci"); | 633 | clk_register_clkdev(clk, NULL, "b3000000.sdhci"); |
636 | 634 | ||
637 | clk = clk_register_aux("cfxd_synth_clk", "cfxd_synth_gate_clk", | 635 | clk = clk_register_aux("cfxd_syn_clk", "cfxd_syn_gclk", "vco1div2_clk", |
638 | "vco1div2_clk", 0, SPEAR1340_CFXD_CLK_SYNT, NULL, | 636 | 0, SPEAR1340_CFXD_CLK_SYNT, NULL, aux_rtbl, |
639 | aux_rtbl, ARRAY_SIZE(aux_rtbl), &_lock, &clk1); | 637 | ARRAY_SIZE(aux_rtbl), &_lock, &clk1); |
640 | clk_register_clkdev(clk, "cfxd_synth_clk", NULL); | 638 | clk_register_clkdev(clk, "cfxd_syn_clk", NULL); |
641 | clk_register_clkdev(clk1, "cfxd_synth_gate_clk", NULL); | 639 | clk_register_clkdev(clk1, "cfxd_syn_gclk", NULL); |
642 | 640 | ||
643 | clk = clk_register_gate(NULL, "cfxd_clk", "cfxd_synth_gate_clk", 0, | 641 | clk = clk_register_gate(NULL, "cfxd_clk", "cfxd_syn_gclk", 0, |
644 | SPEAR1340_PERIP1_CLK_ENB, SPEAR1340_CFXD_CLK_ENB, 0, | 642 | SPEAR1340_PERIP1_CLK_ENB, SPEAR1340_CFXD_CLK_ENB, 0, |
645 | &_lock); | 643 | &_lock); |
646 | clk_register_clkdev(clk, NULL, "b2800000.cf"); | 644 | clk_register_clkdev(clk, NULL, "b2800000.cf"); |
647 | clk_register_clkdev(clk, NULL, "arasan_xd"); | 645 | clk_register_clkdev(clk, NULL, "arasan_xd"); |
648 | 646 | ||
649 | clk = clk_register_aux("c3_synth_clk", "c3_synth_gate_clk", | 647 | clk = clk_register_aux("c3_syn_clk", "c3_syn_gclk", "vco1div2_clk", 0, |
650 | "vco1div2_clk", 0, SPEAR1340_C3_CLK_SYNT, NULL, | 648 | SPEAR1340_C3_CLK_SYNT, NULL, aux_rtbl, |
651 | aux_rtbl, ARRAY_SIZE(aux_rtbl), &_lock, &clk1); | 649 | ARRAY_SIZE(aux_rtbl), &_lock, &clk1); |
652 | clk_register_clkdev(clk, "c3_synth_clk", NULL); | 650 | clk_register_clkdev(clk, "c3_syn_clk", NULL); |
653 | clk_register_clkdev(clk1, "c3_synth_gate_clk", NULL); | 651 | clk_register_clkdev(clk1, "c3_syn_gclk", NULL); |
654 | 652 | ||
655 | clk = clk_register_mux(NULL, "c3_mux_clk", c3_parents, | 653 | clk = clk_register_mux(NULL, "c3_mclk", c3_parents, |
656 | ARRAY_SIZE(c3_parents), 0, SPEAR1340_PERIP_CLK_CFG, | 654 | ARRAY_SIZE(c3_parents), 0, SPEAR1340_PERIP_CLK_CFG, |
657 | SPEAR1340_C3_CLK_SHIFT, SPEAR1340_C3_CLK_MASK, 0, | 655 | SPEAR1340_C3_CLK_SHIFT, SPEAR1340_C3_CLK_MASK, 0, |
658 | &_lock); | 656 | &_lock); |
659 | clk_register_clkdev(clk, "c3_mux_clk", NULL); | 657 | clk_register_clkdev(clk, "c3_mclk", NULL); |
660 | 658 | ||
661 | clk = clk_register_gate(NULL, "c3_clk", "c3_mux_clk", 0, | 659 | clk = clk_register_gate(NULL, "c3_clk", "c3_mclk", 0, |
662 | SPEAR1340_PERIP1_CLK_ENB, SPEAR1340_C3_CLK_ENB, 0, | 660 | SPEAR1340_PERIP1_CLK_ENB, SPEAR1340_C3_CLK_ENB, 0, |
663 | &_lock); | 661 | &_lock); |
664 | clk_register_clkdev(clk, NULL, "c3"); | 662 | clk_register_clkdev(clk, NULL, "c3"); |
665 | 663 | ||
666 | /* gmac */ | 664 | /* gmac */ |
667 | clk = clk_register_mux(NULL, "gmac_phy_input_mux_clk", | 665 | clk = clk_register_mux(NULL, "phy_input_mclk", gmac_phy_input_parents, |
668 | gmac_phy_input_parents, | ||
669 | ARRAY_SIZE(gmac_phy_input_parents), 0, | 666 | ARRAY_SIZE(gmac_phy_input_parents), 0, |
670 | SPEAR1340_GMAC_CLK_CFG, | 667 | SPEAR1340_GMAC_CLK_CFG, |
671 | SPEAR1340_GMAC_PHY_INPUT_CLK_SHIFT, | 668 | SPEAR1340_GMAC_PHY_INPUT_CLK_SHIFT, |
672 | SPEAR1340_GMAC_PHY_INPUT_CLK_MASK, 0, &_lock); | 669 | SPEAR1340_GMAC_PHY_INPUT_CLK_MASK, 0, &_lock); |
673 | clk_register_clkdev(clk, "gmac_phy_input_mux_clk", NULL); | 670 | clk_register_clkdev(clk, "phy_input_mclk", NULL); |
674 | 671 | ||
675 | clk = clk_register_aux("gmac_phy_synth_clk", "gmac_phy_synth_gate_clk", | 672 | clk = clk_register_aux("phy_syn_clk", "phy_syn_gclk", "phy_input_mclk", |
676 | "gmac_phy_input_mux_clk", 0, SPEAR1340_GMAC_CLK_SYNT, | 673 | 0, SPEAR1340_GMAC_CLK_SYNT, NULL, gmac_rtbl, |
677 | NULL, gmac_rtbl, ARRAY_SIZE(gmac_rtbl), &_lock, &clk1); | 674 | ARRAY_SIZE(gmac_rtbl), &_lock, &clk1); |
678 | clk_register_clkdev(clk, "gmac_phy_synth_clk", NULL); | 675 | clk_register_clkdev(clk, "phy_syn_clk", NULL); |
679 | clk_register_clkdev(clk1, "gmac_phy_synth_gate_clk", NULL); | 676 | clk_register_clkdev(clk1, "phy_syn_gclk", NULL); |
680 | 677 | ||
681 | clk = clk_register_mux(NULL, "gmac_phy_mux_clk", gmac_phy_parents, | 678 | clk = clk_register_mux(NULL, "phy_mclk", gmac_phy_parents, |
682 | ARRAY_SIZE(gmac_phy_parents), 0, | 679 | ARRAY_SIZE(gmac_phy_parents), 0, |
683 | SPEAR1340_PERIP_CLK_CFG, SPEAR1340_GMAC_PHY_CLK_SHIFT, | 680 | SPEAR1340_PERIP_CLK_CFG, SPEAR1340_GMAC_PHY_CLK_SHIFT, |
684 | SPEAR1340_GMAC_PHY_CLK_MASK, 0, &_lock); | 681 | SPEAR1340_GMAC_PHY_CLK_MASK, 0, &_lock); |
685 | clk_register_clkdev(clk, NULL, "stmmacphy.0"); | 682 | clk_register_clkdev(clk, NULL, "stmmacphy.0"); |
686 | 683 | ||
687 | /* clcd */ | 684 | /* clcd */ |
688 | clk = clk_register_mux(NULL, "clcd_synth_mux_clk", clcd_synth_parents, | 685 | clk = clk_register_mux(NULL, "clcd_syn_mclk", clcd_synth_parents, |
689 | ARRAY_SIZE(clcd_synth_parents), 0, | 686 | ARRAY_SIZE(clcd_synth_parents), 0, |
690 | SPEAR1340_CLCD_CLK_SYNT, SPEAR1340_CLCD_SYNT_CLK_SHIFT, | 687 | SPEAR1340_CLCD_CLK_SYNT, SPEAR1340_CLCD_SYNT_CLK_SHIFT, |
691 | SPEAR1340_CLCD_SYNT_CLK_MASK, 0, &_lock); | 688 | SPEAR1340_CLCD_SYNT_CLK_MASK, 0, &_lock); |
692 | clk_register_clkdev(clk, "clcd_synth_mux_clk", NULL); | 689 | clk_register_clkdev(clk, "clcd_syn_mclk", NULL); |
693 | 690 | ||
694 | clk = clk_register_frac("clcd_synth_clk", "clcd_synth_mux_clk", 0, | 691 | clk = clk_register_frac("clcd_syn_clk", "clcd_syn_mclk", 0, |
695 | SPEAR1340_CLCD_CLK_SYNT, clcd_rtbl, | 692 | SPEAR1340_CLCD_CLK_SYNT, clcd_rtbl, |
696 | ARRAY_SIZE(clcd_rtbl), &_lock); | 693 | ARRAY_SIZE(clcd_rtbl), &_lock); |
697 | clk_register_clkdev(clk, "clcd_synth_clk", NULL); | 694 | clk_register_clkdev(clk, "clcd_syn_clk", NULL); |
698 | 695 | ||
699 | clk = clk_register_mux(NULL, "clcd_pixel_mux_clk", clcd_pixel_parents, | 696 | clk = clk_register_mux(NULL, "clcd_pixel_mclk", clcd_pixel_parents, |
700 | ARRAY_SIZE(clcd_pixel_parents), 0, | 697 | ARRAY_SIZE(clcd_pixel_parents), 0, |
701 | SPEAR1340_PERIP_CLK_CFG, SPEAR1340_CLCD_CLK_SHIFT, | 698 | SPEAR1340_PERIP_CLK_CFG, SPEAR1340_CLCD_CLK_SHIFT, |
702 | SPEAR1340_CLCD_CLK_MASK, 0, &_lock); | 699 | SPEAR1340_CLCD_CLK_MASK, 0, &_lock); |
703 | clk_register_clkdev(clk, "clcd_pixel_clk", NULL); | 700 | clk_register_clkdev(clk, "clcd_pixel_clk", NULL); |
704 | 701 | ||
705 | clk = clk_register_gate(NULL, "clcd_clk", "clcd_pixel_mux_clk", 0, | 702 | clk = clk_register_gate(NULL, "clcd_clk", "clcd_pixel_mclk", 0, |
706 | SPEAR1340_PERIP1_CLK_ENB, SPEAR1340_CLCD_CLK_ENB, 0, | 703 | SPEAR1340_PERIP1_CLK_ENB, SPEAR1340_CLCD_CLK_ENB, 0, |
707 | &_lock); | 704 | &_lock); |
708 | clk_register_clkdev(clk, "clcd_clk", NULL); | 705 | clk_register_clkdev(clk, "clcd_clk", NULL); |
709 | 706 | ||
710 | /* i2s */ | 707 | /* i2s */ |
711 | clk = clk_register_mux(NULL, "i2s_src_mux_clk", i2s_src_parents, | 708 | clk = clk_register_mux(NULL, "i2s_src_mclk", i2s_src_parents, |
712 | ARRAY_SIZE(i2s_src_parents), 0, SPEAR1340_I2S_CLK_CFG, | 709 | ARRAY_SIZE(i2s_src_parents), 0, SPEAR1340_I2S_CLK_CFG, |
713 | SPEAR1340_I2S_SRC_CLK_SHIFT, SPEAR1340_I2S_SRC_CLK_MASK, | 710 | SPEAR1340_I2S_SRC_CLK_SHIFT, SPEAR1340_I2S_SRC_CLK_MASK, |
714 | 0, &_lock); | 711 | 0, &_lock); |
715 | clk_register_clkdev(clk, "i2s_src_clk", NULL); | 712 | clk_register_clkdev(clk, "i2s_src_clk", NULL); |
716 | 713 | ||
717 | clk = clk_register_aux("i2s_prs1_clk", NULL, "i2s_src_mux_clk", 0, | 714 | clk = clk_register_aux("i2s_prs1_clk", NULL, "i2s_src_mclk", 0, |
718 | SPEAR1340_I2S_CLK_CFG, &i2s_prs1_masks, i2s_prs1_rtbl, | 715 | SPEAR1340_I2S_CLK_CFG, &i2s_prs1_masks, i2s_prs1_rtbl, |
719 | ARRAY_SIZE(i2s_prs1_rtbl), &_lock, NULL); | 716 | ARRAY_SIZE(i2s_prs1_rtbl), &_lock, NULL); |
720 | clk_register_clkdev(clk, "i2s_prs1_clk", NULL); | 717 | clk_register_clkdev(clk, "i2s_prs1_clk", NULL); |
721 | 718 | ||
722 | clk = clk_register_mux(NULL, "i2s_ref_mux_clk", i2s_ref_parents, | 719 | clk = clk_register_mux(NULL, "i2s_ref_mclk", i2s_ref_parents, |
723 | ARRAY_SIZE(i2s_ref_parents), 0, SPEAR1340_I2S_CLK_CFG, | 720 | ARRAY_SIZE(i2s_ref_parents), 0, SPEAR1340_I2S_CLK_CFG, |
724 | SPEAR1340_I2S_REF_SHIFT, SPEAR1340_I2S_REF_SEL_MASK, 0, | 721 | SPEAR1340_I2S_REF_SHIFT, SPEAR1340_I2S_REF_SEL_MASK, 0, |
725 | &_lock); | 722 | &_lock); |
726 | clk_register_clkdev(clk, "i2s_ref_clk", NULL); | 723 | clk_register_clkdev(clk, "i2s_ref_clk", NULL); |
727 | 724 | ||
728 | clk = clk_register_gate(NULL, "i2s_ref_pad_clk", "i2s_ref_mux_clk", 0, | 725 | clk = clk_register_gate(NULL, "i2s_ref_pad_clk", "i2s_ref_mclk", 0, |
729 | SPEAR1340_PERIP2_CLK_ENB, SPEAR1340_I2S_REF_PAD_CLK_ENB, | 726 | SPEAR1340_PERIP2_CLK_ENB, SPEAR1340_I2S_REF_PAD_CLK_ENB, |
730 | 0, &_lock); | 727 | 0, &_lock); |
731 | clk_register_clkdev(clk, "i2s_ref_pad_clk", NULL); | 728 | clk_register_clkdev(clk, "i2s_ref_pad_clk", NULL); |
732 | 729 | ||
733 | clk = clk_register_aux("i2s_sclk_clk", "i2s_sclk_gate_clk", | 730 | clk = clk_register_aux("i2s_sclk_clk", "i2s_sclk_gclk", "i2s_ref_mclk", |
734 | "i2s_ref_mux_clk", 0, SPEAR1340_I2S_CLK_CFG, | 731 | 0, SPEAR1340_I2S_CLK_CFG, &i2s_sclk_masks, |
735 | &i2s_sclk_masks, i2s_sclk_rtbl, | 732 | i2s_sclk_rtbl, ARRAY_SIZE(i2s_sclk_rtbl), &_lock, |
736 | ARRAY_SIZE(i2s_sclk_rtbl), &_lock, &clk1); | 733 | &clk1); |
737 | clk_register_clkdev(clk, "i2s_sclk_clk", NULL); | 734 | clk_register_clkdev(clk, "i2s_sclk_clk", NULL); |
738 | clk_register_clkdev(clk1, "i2s_sclk_gate_clk", NULL); | 735 | clk_register_clkdev(clk1, "i2s_sclk_gclk", NULL); |
739 | 736 | ||
740 | /* clock derived from ahb clk */ | 737 | /* clock derived from ahb clk */ |
741 | clk = clk_register_gate(NULL, "i2c0_clk", "ahb_clk", 0, | 738 | clk = clk_register_gate(NULL, "i2c0_clk", "ahb_clk", 0, |
@@ -744,7 +741,7 @@ void __init spear1340_clk_init(void) | |||
744 | clk_register_clkdev(clk, NULL, "e0280000.i2c"); | 741 | clk_register_clkdev(clk, NULL, "e0280000.i2c"); |
745 | 742 | ||
746 | clk = clk_register_gate(NULL, "i2c1_clk", "ahb_clk", 0, | 743 | clk = clk_register_gate(NULL, "i2c1_clk", "ahb_clk", 0, |
747 | SPEAR1340_PERIP1_CLK_ENB, SPEAR1340_I2C1_CLK_ENB, 0, | 744 | SPEAR1340_PERIP3_CLK_ENB, SPEAR1340_I2C1_CLK_ENB, 0, |
748 | &_lock); | 745 | &_lock); |
749 | clk_register_clkdev(clk, NULL, "b4000000.i2c"); | 746 | clk_register_clkdev(clk, NULL, "b4000000.i2c"); |
750 | 747 | ||
@@ -800,13 +797,13 @@ void __init spear1340_clk_init(void) | |||
800 | &_lock); | 797 | &_lock); |
801 | clk_register_clkdev(clk, "sysram1_clk", NULL); | 798 | clk_register_clkdev(clk, "sysram1_clk", NULL); |
802 | 799 | ||
803 | clk = clk_register_aux("adc_synth_clk", "adc_synth_gate_clk", "ahb_clk", | 800 | clk = clk_register_aux("adc_syn_clk", "adc_syn_gclk", "ahb_clk", |
804 | 0, SPEAR1340_ADC_CLK_SYNT, NULL, adc_rtbl, | 801 | 0, SPEAR1340_ADC_CLK_SYNT, NULL, adc_rtbl, |
805 | ARRAY_SIZE(adc_rtbl), &_lock, &clk1); | 802 | ARRAY_SIZE(adc_rtbl), &_lock, &clk1); |
806 | clk_register_clkdev(clk, "adc_synth_clk", NULL); | 803 | clk_register_clkdev(clk, "adc_syn_clk", NULL); |
807 | clk_register_clkdev(clk1, "adc_synth_gate_clk", NULL); | 804 | clk_register_clkdev(clk1, "adc_syn_gclk", NULL); |
808 | 805 | ||
809 | clk = clk_register_gate(NULL, "adc_clk", "adc_synth_gate_clk", 0, | 806 | clk = clk_register_gate(NULL, "adc_clk", "adc_syn_gclk", 0, |
810 | SPEAR1340_PERIP1_CLK_ENB, SPEAR1340_ADC_CLK_ENB, 0, | 807 | SPEAR1340_PERIP1_CLK_ENB, SPEAR1340_ADC_CLK_ENB, 0, |
811 | &_lock); | 808 | &_lock); |
812 | clk_register_clkdev(clk, NULL, "adc_clk"); | 809 | clk_register_clkdev(clk, NULL, "adc_clk"); |
@@ -843,39 +840,39 @@ void __init spear1340_clk_init(void) | |||
843 | clk_register_clkdev(clk, NULL, "e0300000.kbd"); | 840 | clk_register_clkdev(clk, NULL, "e0300000.kbd"); |
844 | 841 | ||
845 | /* RAS clks */ | 842 | /* RAS clks */ |
846 | clk = clk_register_mux(NULL, "gen_synth0_1_mux_clk", | 843 | clk = clk_register_mux(NULL, "gen_syn0_1_mclk", gen_synth0_1_parents, |
847 | gen_synth0_1_parents, ARRAY_SIZE(gen_synth0_1_parents), | 844 | ARRAY_SIZE(gen_synth0_1_parents), 0, SPEAR1340_PLL_CFG, |
848 | 0, SPEAR1340_PLL_CFG, SPEAR1340_GEN_SYNT0_1_CLK_SHIFT, | 845 | SPEAR1340_GEN_SYNT0_1_CLK_SHIFT, |
849 | SPEAR1340_GEN_SYNT_CLK_MASK, 0, &_lock); | 846 | SPEAR1340_GEN_SYNT_CLK_MASK, 0, &_lock); |
850 | clk_register_clkdev(clk, "gen_synth0_1_clk", NULL); | 847 | clk_register_clkdev(clk, "gen_syn0_1_clk", NULL); |
851 | 848 | ||
852 | clk = clk_register_mux(NULL, "gen_synth2_3_mux_clk", | 849 | clk = clk_register_mux(NULL, "gen_syn2_3_mclk", gen_synth2_3_parents, |
853 | gen_synth2_3_parents, ARRAY_SIZE(gen_synth2_3_parents), | 850 | ARRAY_SIZE(gen_synth2_3_parents), 0, SPEAR1340_PLL_CFG, |
854 | 0, SPEAR1340_PLL_CFG, SPEAR1340_GEN_SYNT2_3_CLK_SHIFT, | 851 | SPEAR1340_GEN_SYNT2_3_CLK_SHIFT, |
855 | SPEAR1340_GEN_SYNT_CLK_MASK, 0, &_lock); | 852 | SPEAR1340_GEN_SYNT_CLK_MASK, 0, &_lock); |
856 | clk_register_clkdev(clk, "gen_synth2_3_clk", NULL); | 853 | clk_register_clkdev(clk, "gen_syn2_3_clk", NULL); |
857 | 854 | ||
858 | clk = clk_register_frac("gen_synth0_clk", "gen_synth0_1_clk", 0, | 855 | clk = clk_register_frac("gen_syn0_clk", "gen_syn0_1_clk", 0, |
859 | SPEAR1340_GEN_CLK_SYNT0, gen_rtbl, ARRAY_SIZE(gen_rtbl), | 856 | SPEAR1340_GEN_CLK_SYNT0, gen_rtbl, ARRAY_SIZE(gen_rtbl), |
860 | &_lock); | 857 | &_lock); |
861 | clk_register_clkdev(clk, "gen_synth0_clk", NULL); | 858 | clk_register_clkdev(clk, "gen_syn0_clk", NULL); |
862 | 859 | ||
863 | clk = clk_register_frac("gen_synth1_clk", "gen_synth0_1_clk", 0, | 860 | clk = clk_register_frac("gen_syn1_clk", "gen_syn0_1_clk", 0, |
864 | SPEAR1340_GEN_CLK_SYNT1, gen_rtbl, ARRAY_SIZE(gen_rtbl), | 861 | SPEAR1340_GEN_CLK_SYNT1, gen_rtbl, ARRAY_SIZE(gen_rtbl), |
865 | &_lock); | 862 | &_lock); |
866 | clk_register_clkdev(clk, "gen_synth1_clk", NULL); | 863 | clk_register_clkdev(clk, "gen_syn1_clk", NULL); |
867 | 864 | ||
868 | clk = clk_register_frac("gen_synth2_clk", "gen_synth2_3_clk", 0, | 865 | clk = clk_register_frac("gen_syn2_clk", "gen_syn2_3_clk", 0, |
869 | SPEAR1340_GEN_CLK_SYNT2, gen_rtbl, ARRAY_SIZE(gen_rtbl), | 866 | SPEAR1340_GEN_CLK_SYNT2, gen_rtbl, ARRAY_SIZE(gen_rtbl), |
870 | &_lock); | 867 | &_lock); |
871 | clk_register_clkdev(clk, "gen_synth2_clk", NULL); | 868 | clk_register_clkdev(clk, "gen_syn2_clk", NULL); |
872 | 869 | ||
873 | clk = clk_register_frac("gen_synth3_clk", "gen_synth2_3_clk", 0, | 870 | clk = clk_register_frac("gen_syn3_clk", "gen_syn2_3_clk", 0, |
874 | SPEAR1340_GEN_CLK_SYNT3, gen_rtbl, ARRAY_SIZE(gen_rtbl), | 871 | SPEAR1340_GEN_CLK_SYNT3, gen_rtbl, ARRAY_SIZE(gen_rtbl), |
875 | &_lock); | 872 | &_lock); |
876 | clk_register_clkdev(clk, "gen_synth3_clk", NULL); | 873 | clk_register_clkdev(clk, "gen_syn3_clk", NULL); |
877 | 874 | ||
878 | clk = clk_register_gate(NULL, "mali_clk", "gen_synth3_clk", 0, | 875 | clk = clk_register_gate(NULL, "mali_clk", "gen_syn3_clk", 0, |
879 | SPEAR1340_PERIP3_CLK_ENB, SPEAR1340_MALI_CLK_ENB, 0, | 876 | SPEAR1340_PERIP3_CLK_ENB, SPEAR1340_MALI_CLK_ENB, 0, |
880 | &_lock); | 877 | &_lock); |
881 | clk_register_clkdev(clk, NULL, "mali"); | 878 | clk_register_clkdev(clk, NULL, "mali"); |
@@ -890,74 +887,74 @@ void __init spear1340_clk_init(void) | |||
890 | &_lock); | 887 | &_lock); |
891 | clk_register_clkdev(clk, NULL, "spear_cec.1"); | 888 | clk_register_clkdev(clk, NULL, "spear_cec.1"); |
892 | 889 | ||
893 | clk = clk_register_mux(NULL, "spdif_out_mux_clk", spdif_out_parents, | 890 | clk = clk_register_mux(NULL, "spdif_out_mclk", spdif_out_parents, |
894 | ARRAY_SIZE(spdif_out_parents), 0, | 891 | ARRAY_SIZE(spdif_out_parents), 0, |
895 | SPEAR1340_PERIP_CLK_CFG, SPEAR1340_SPDIF_OUT_CLK_SHIFT, | 892 | SPEAR1340_PERIP_CLK_CFG, SPEAR1340_SPDIF_OUT_CLK_SHIFT, |
896 | SPEAR1340_SPDIF_CLK_MASK, 0, &_lock); | 893 | SPEAR1340_SPDIF_CLK_MASK, 0, &_lock); |
897 | clk_register_clkdev(clk, "spdif_out_mux_clk", NULL); | 894 | clk_register_clkdev(clk, "spdif_out_mclk", NULL); |
898 | 895 | ||
899 | clk = clk_register_gate(NULL, "spdif_out_clk", "spdif_out_mux_clk", 0, | 896 | clk = clk_register_gate(NULL, "spdif_out_clk", "spdif_out_mclk", 0, |
900 | SPEAR1340_PERIP3_CLK_ENB, SPEAR1340_SPDIF_OUT_CLK_ENB, | 897 | SPEAR1340_PERIP3_CLK_ENB, SPEAR1340_SPDIF_OUT_CLK_ENB, |
901 | 0, &_lock); | 898 | 0, &_lock); |
902 | clk_register_clkdev(clk, NULL, "spdif-out"); | 899 | clk_register_clkdev(clk, NULL, "spdif-out"); |
903 | 900 | ||
904 | clk = clk_register_mux(NULL, "spdif_in_mux_clk", spdif_in_parents, | 901 | clk = clk_register_mux(NULL, "spdif_in_mclk", spdif_in_parents, |
905 | ARRAY_SIZE(spdif_in_parents), 0, | 902 | ARRAY_SIZE(spdif_in_parents), 0, |
906 | SPEAR1340_PERIP_CLK_CFG, SPEAR1340_SPDIF_IN_CLK_SHIFT, | 903 | SPEAR1340_PERIP_CLK_CFG, SPEAR1340_SPDIF_IN_CLK_SHIFT, |
907 | SPEAR1340_SPDIF_CLK_MASK, 0, &_lock); | 904 | SPEAR1340_SPDIF_CLK_MASK, 0, &_lock); |
908 | clk_register_clkdev(clk, "spdif_in_mux_clk", NULL); | 905 | clk_register_clkdev(clk, "spdif_in_mclk", NULL); |
909 | 906 | ||
910 | clk = clk_register_gate(NULL, "spdif_in_clk", "spdif_in_mux_clk", 0, | 907 | clk = clk_register_gate(NULL, "spdif_in_clk", "spdif_in_mclk", 0, |
911 | SPEAR1340_PERIP3_CLK_ENB, SPEAR1340_SPDIF_IN_CLK_ENB, 0, | 908 | SPEAR1340_PERIP3_CLK_ENB, SPEAR1340_SPDIF_IN_CLK_ENB, 0, |
912 | &_lock); | 909 | &_lock); |
913 | clk_register_clkdev(clk, NULL, "spdif-in"); | 910 | clk_register_clkdev(clk, NULL, "spdif-in"); |
914 | 911 | ||
915 | clk = clk_register_gate(NULL, "acp_clk", "acp_mux_clk", 0, | 912 | clk = clk_register_gate(NULL, "acp_clk", "acp_mclk", 0, |
916 | SPEAR1340_PERIP2_CLK_ENB, SPEAR1340_ACP_CLK_ENB, 0, | 913 | SPEAR1340_PERIP2_CLK_ENB, SPEAR1340_ACP_CLK_ENB, 0, |
917 | &_lock); | 914 | &_lock); |
918 | clk_register_clkdev(clk, NULL, "acp_clk"); | 915 | clk_register_clkdev(clk, NULL, "acp_clk"); |
919 | 916 | ||
920 | clk = clk_register_gate(NULL, "plgpio_clk", "plgpio_mux_clk", 0, | 917 | clk = clk_register_gate(NULL, "plgpio_clk", "plgpio_mclk", 0, |
921 | SPEAR1340_PERIP3_CLK_ENB, SPEAR1340_PLGPIO_CLK_ENB, 0, | 918 | SPEAR1340_PERIP3_CLK_ENB, SPEAR1340_PLGPIO_CLK_ENB, 0, |
922 | &_lock); | 919 | &_lock); |
923 | clk_register_clkdev(clk, NULL, "plgpio"); | 920 | clk_register_clkdev(clk, NULL, "plgpio"); |
924 | 921 | ||
925 | clk = clk_register_gate(NULL, "video_dec_clk", "video_dec_mux_clk", 0, | 922 | clk = clk_register_gate(NULL, "video_dec_clk", "video_dec_mclk", 0, |
926 | SPEAR1340_PERIP3_CLK_ENB, SPEAR1340_VIDEO_DEC_CLK_ENB, | 923 | SPEAR1340_PERIP3_CLK_ENB, SPEAR1340_VIDEO_DEC_CLK_ENB, |
927 | 0, &_lock); | 924 | 0, &_lock); |
928 | clk_register_clkdev(clk, NULL, "video_dec"); | 925 | clk_register_clkdev(clk, NULL, "video_dec"); |
929 | 926 | ||
930 | clk = clk_register_gate(NULL, "video_enc_clk", "video_enc_mux_clk", 0, | 927 | clk = clk_register_gate(NULL, "video_enc_clk", "video_enc_mclk", 0, |
931 | SPEAR1340_PERIP3_CLK_ENB, SPEAR1340_VIDEO_ENC_CLK_ENB, | 928 | SPEAR1340_PERIP3_CLK_ENB, SPEAR1340_VIDEO_ENC_CLK_ENB, |
932 | 0, &_lock); | 929 | 0, &_lock); |
933 | clk_register_clkdev(clk, NULL, "video_enc"); | 930 | clk_register_clkdev(clk, NULL, "video_enc"); |
934 | 931 | ||
935 | clk = clk_register_gate(NULL, "video_in_clk", "video_in_mux_clk", 0, | 932 | clk = clk_register_gate(NULL, "video_in_clk", "video_in_mclk", 0, |
936 | SPEAR1340_PERIP3_CLK_ENB, SPEAR1340_VIDEO_IN_CLK_ENB, 0, | 933 | SPEAR1340_PERIP3_CLK_ENB, SPEAR1340_VIDEO_IN_CLK_ENB, 0, |
937 | &_lock); | 934 | &_lock); |
938 | clk_register_clkdev(clk, NULL, "spear_vip"); | 935 | clk_register_clkdev(clk, NULL, "spear_vip"); |
939 | 936 | ||
940 | clk = clk_register_gate(NULL, "cam0_clk", "cam0_mux_clk", 0, | 937 | clk = clk_register_gate(NULL, "cam0_clk", "cam0_mclk", 0, |
941 | SPEAR1340_PERIP3_CLK_ENB, SPEAR1340_CAM0_CLK_ENB, 0, | 938 | SPEAR1340_PERIP3_CLK_ENB, SPEAR1340_CAM0_CLK_ENB, 0, |
942 | &_lock); | 939 | &_lock); |
943 | clk_register_clkdev(clk, NULL, "spear_camif.0"); | 940 | clk_register_clkdev(clk, NULL, "spear_camif.0"); |
944 | 941 | ||
945 | clk = clk_register_gate(NULL, "cam1_clk", "cam1_mux_clk", 0, | 942 | clk = clk_register_gate(NULL, "cam1_clk", "cam1_mclk", 0, |
946 | SPEAR1340_PERIP3_CLK_ENB, SPEAR1340_CAM1_CLK_ENB, 0, | 943 | SPEAR1340_PERIP3_CLK_ENB, SPEAR1340_CAM1_CLK_ENB, 0, |
947 | &_lock); | 944 | &_lock); |
948 | clk_register_clkdev(clk, NULL, "spear_camif.1"); | 945 | clk_register_clkdev(clk, NULL, "spear_camif.1"); |
949 | 946 | ||
950 | clk = clk_register_gate(NULL, "cam2_clk", "cam2_mux_clk", 0, | 947 | clk = clk_register_gate(NULL, "cam2_clk", "cam2_mclk", 0, |
951 | SPEAR1340_PERIP3_CLK_ENB, SPEAR1340_CAM2_CLK_ENB, 0, | 948 | SPEAR1340_PERIP3_CLK_ENB, SPEAR1340_CAM2_CLK_ENB, 0, |
952 | &_lock); | 949 | &_lock); |
953 | clk_register_clkdev(clk, NULL, "spear_camif.2"); | 950 | clk_register_clkdev(clk, NULL, "spear_camif.2"); |
954 | 951 | ||
955 | clk = clk_register_gate(NULL, "cam3_clk", "cam3_mux_clk", 0, | 952 | clk = clk_register_gate(NULL, "cam3_clk", "cam3_mclk", 0, |
956 | SPEAR1340_PERIP3_CLK_ENB, SPEAR1340_CAM3_CLK_ENB, 0, | 953 | SPEAR1340_PERIP3_CLK_ENB, SPEAR1340_CAM3_CLK_ENB, 0, |
957 | &_lock); | 954 | &_lock); |
958 | clk_register_clkdev(clk, NULL, "spear_camif.3"); | 955 | clk_register_clkdev(clk, NULL, "spear_camif.3"); |
959 | 956 | ||
960 | clk = clk_register_gate(NULL, "pwm_clk", "pwm_mux_clk", 0, | 957 | clk = clk_register_gate(NULL, "pwm_clk", "pwm_mclk", 0, |
961 | SPEAR1340_PERIP3_CLK_ENB, SPEAR1340_PWM_CLK_ENB, 0, | 958 | SPEAR1340_PERIP3_CLK_ENB, SPEAR1340_PWM_CLK_ENB, 0, |
962 | &_lock); | 959 | &_lock); |
963 | clk_register_clkdev(clk, NULL, "pwm"); | 960 | clk_register_clkdev(clk, NULL, "pwm"); |
diff --git a/drivers/clk/spear/spear3xx_clock.c b/drivers/clk/spear/spear3xx_clock.c index 01dd6daff2a1..c3157454bb3f 100644 --- a/drivers/clk/spear/spear3xx_clock.c +++ b/drivers/clk/spear/spear3xx_clock.c | |||
@@ -122,12 +122,12 @@ static struct gpt_rate_tbl gpt_rtbl[] = { | |||
122 | }; | 122 | }; |
123 | 123 | ||
124 | /* clock parents */ | 124 | /* clock parents */ |
125 | static const char *uart0_parents[] = { "pll3_48m_clk", "uart_synth_gate_clk", }; | 125 | static const char *uart0_parents[] = { "pll3_clk", "uart_syn_gclk", }; |
126 | static const char *firda_parents[] = { "pll3_48m_clk", "firda_synth_gate_clk", | 126 | static const char *firda_parents[] = { "pll3_clk", "firda_syn_gclk", |
127 | }; | 127 | }; |
128 | static const char *gpt0_parents[] = { "pll3_48m_clk", "gpt0_synth_clk", }; | 128 | static const char *gpt0_parents[] = { "pll3_clk", "gpt0_syn_clk", }; |
129 | static const char *gpt1_parents[] = { "pll3_48m_clk", "gpt1_synth_clk", }; | 129 | static const char *gpt1_parents[] = { "pll3_clk", "gpt1_syn_clk", }; |
130 | static const char *gpt2_parents[] = { "pll3_48m_clk", "gpt2_synth_clk", }; | 130 | static const char *gpt2_parents[] = { "pll3_clk", "gpt2_syn_clk", }; |
131 | static const char *gen2_3_parents[] = { "pll1_clk", "pll2_clk", }; | 131 | static const char *gen2_3_parents[] = { "pll1_clk", "pll2_clk", }; |
132 | static const char *ddr_parents[] = { "ahb_clk", "ahbmult2_clk", "none", | 132 | static const char *ddr_parents[] = { "ahb_clk", "ahbmult2_clk", "none", |
133 | "pll2_clk", }; | 133 | "pll2_clk", }; |
@@ -137,7 +137,7 @@ static void __init spear300_clk_init(void) | |||
137 | { | 137 | { |
138 | struct clk *clk; | 138 | struct clk *clk; |
139 | 139 | ||
140 | clk = clk_register_fixed_factor(NULL, "clcd_clk", "ras_pll3_48m_clk", 0, | 140 | clk = clk_register_fixed_factor(NULL, "clcd_clk", "ras_pll3_clk", 0, |
141 | 1, 1); | 141 | 1, 1); |
142 | clk_register_clkdev(clk, NULL, "60000000.clcd"); | 142 | clk_register_clkdev(clk, NULL, "60000000.clcd"); |
143 | 143 | ||
@@ -219,15 +219,11 @@ static void __init spear310_clk_init(void) | |||
219 | #define SPEAR320_UARTX_PCLK_VAL_SYNTH1 0x0 | 219 | #define SPEAR320_UARTX_PCLK_VAL_SYNTH1 0x0 |
220 | #define SPEAR320_UARTX_PCLK_VAL_APB 0x1 | 220 | #define SPEAR320_UARTX_PCLK_VAL_APB 0x1 |
221 | 221 | ||
222 | static const char *i2s_ref_parents[] = { "ras_pll2_clk", | 222 | static const char *i2s_ref_parents[] = { "ras_pll2_clk", "ras_syn2_gclk", }; |
223 | "ras_gen2_synth_gate_clk", }; | 223 | static const char *sdhci_parents[] = { "ras_pll3_clk", "ras_syn3_gclk", }; |
224 | static const char *sdhci_parents[] = { "ras_pll3_48m_clk", | ||
225 | "ras_gen3_synth_gate_clk", | ||
226 | }; | ||
227 | static const char *smii0_parents[] = { "smii_125m_pad", "ras_pll2_clk", | 224 | static const char *smii0_parents[] = { "smii_125m_pad", "ras_pll2_clk", |
228 | "ras_gen0_synth_gate_clk", }; | 225 | "ras_syn0_gclk", }; |
229 | static const char *uartx_parents[] = { "ras_gen1_synth_gate_clk", "ras_apb_clk", | 226 | static const char *uartx_parents[] = { "ras_syn1_gclk", "ras_apb_clk", }; |
230 | }; | ||
231 | 227 | ||
232 | static void __init spear320_clk_init(void) | 228 | static void __init spear320_clk_init(void) |
233 | { | 229 | { |
@@ -237,7 +233,7 @@ static void __init spear320_clk_init(void) | |||
237 | CLK_IS_ROOT, 125000000); | 233 | CLK_IS_ROOT, 125000000); |
238 | clk_register_clkdev(clk, "smii_125m_pad", NULL); | 234 | clk_register_clkdev(clk, "smii_125m_pad", NULL); |
239 | 235 | ||
240 | clk = clk_register_fixed_factor(NULL, "clcd_clk", "ras_pll3_48m_clk", 0, | 236 | clk = clk_register_fixed_factor(NULL, "clcd_clk", "ras_pll3_clk", 0, |
241 | 1, 1); | 237 | 1, 1); |
242 | clk_register_clkdev(clk, NULL, "90000000.clcd"); | 238 | clk_register_clkdev(clk, NULL, "90000000.clcd"); |
243 | 239 | ||
@@ -363,9 +359,9 @@ void __init spear3xx_clk_init(void) | |||
363 | clk_register_clkdev(clk, NULL, "fc900000.rtc"); | 359 | clk_register_clkdev(clk, NULL, "fc900000.rtc"); |
364 | 360 | ||
365 | /* clock derived from 24 MHz osc clk */ | 361 | /* clock derived from 24 MHz osc clk */ |
366 | clk = clk_register_fixed_rate(NULL, "pll3_48m_clk", "osc_24m_clk", 0, | 362 | clk = clk_register_fixed_rate(NULL, "pll3_clk", "osc_24m_clk", 0, |
367 | 48000000); | 363 | 48000000); |
368 | clk_register_clkdev(clk, "pll3_48m_clk", NULL); | 364 | clk_register_clkdev(clk, "pll3_clk", NULL); |
369 | 365 | ||
370 | clk = clk_register_fixed_factor(NULL, "wdt_clk", "osc_24m_clk", 0, 1, | 366 | clk = clk_register_fixed_factor(NULL, "wdt_clk", "osc_24m_clk", 0, 1, |
371 | 1); | 367 | 1); |
@@ -392,98 +388,98 @@ void __init spear3xx_clk_init(void) | |||
392 | HCLK_RATIO_MASK, 0, &_lock); | 388 | HCLK_RATIO_MASK, 0, &_lock); |
393 | clk_register_clkdev(clk, "ahb_clk", NULL); | 389 | clk_register_clkdev(clk, "ahb_clk", NULL); |
394 | 390 | ||
395 | clk = clk_register_aux("uart_synth_clk", "uart_synth_gate_clk", | 391 | clk = clk_register_aux("uart_syn_clk", "uart_syn_gclk", "pll1_clk", 0, |
396 | "pll1_clk", 0, UART_CLK_SYNT, NULL, aux_rtbl, | 392 | UART_CLK_SYNT, NULL, aux_rtbl, ARRAY_SIZE(aux_rtbl), |
397 | ARRAY_SIZE(aux_rtbl), &_lock, &clk1); | 393 | &_lock, &clk1); |
398 | clk_register_clkdev(clk, "uart_synth_clk", NULL); | 394 | clk_register_clkdev(clk, "uart_syn_clk", NULL); |
399 | clk_register_clkdev(clk1, "uart_synth_gate_clk", NULL); | 395 | clk_register_clkdev(clk1, "uart_syn_gclk", NULL); |
400 | 396 | ||
401 | clk = clk_register_mux(NULL, "uart0_mux_clk", uart0_parents, | 397 | clk = clk_register_mux(NULL, "uart0_mclk", uart0_parents, |
402 | ARRAY_SIZE(uart0_parents), 0, PERIP_CLK_CFG, | 398 | ARRAY_SIZE(uart0_parents), 0, PERIP_CLK_CFG, |
403 | UART_CLK_SHIFT, UART_CLK_MASK, 0, &_lock); | 399 | UART_CLK_SHIFT, UART_CLK_MASK, 0, &_lock); |
404 | clk_register_clkdev(clk, "uart0_mux_clk", NULL); | 400 | clk_register_clkdev(clk, "uart0_mclk", NULL); |
405 | 401 | ||
406 | clk = clk_register_gate(NULL, "uart0", "uart0_mux_clk", 0, | 402 | clk = clk_register_gate(NULL, "uart0", "uart0_mclk", 0, PERIP1_CLK_ENB, |
407 | PERIP1_CLK_ENB, UART_CLK_ENB, 0, &_lock); | 403 | UART_CLK_ENB, 0, &_lock); |
408 | clk_register_clkdev(clk, NULL, "d0000000.serial"); | 404 | clk_register_clkdev(clk, NULL, "d0000000.serial"); |
409 | 405 | ||
410 | clk = clk_register_aux("firda_synth_clk", "firda_synth_gate_clk", | 406 | clk = clk_register_aux("firda_syn_clk", "firda_syn_gclk", "pll1_clk", 0, |
411 | "pll1_clk", 0, FIRDA_CLK_SYNT, NULL, aux_rtbl, | 407 | FIRDA_CLK_SYNT, NULL, aux_rtbl, ARRAY_SIZE(aux_rtbl), |
412 | ARRAY_SIZE(aux_rtbl), &_lock, &clk1); | 408 | &_lock, &clk1); |
413 | clk_register_clkdev(clk, "firda_synth_clk", NULL); | 409 | clk_register_clkdev(clk, "firda_syn_clk", NULL); |
414 | clk_register_clkdev(clk1, "firda_synth_gate_clk", NULL); | 410 | clk_register_clkdev(clk1, "firda_syn_gclk", NULL); |
415 | 411 | ||
416 | clk = clk_register_mux(NULL, "firda_mux_clk", firda_parents, | 412 | clk = clk_register_mux(NULL, "firda_mclk", firda_parents, |
417 | ARRAY_SIZE(firda_parents), 0, PERIP_CLK_CFG, | 413 | ARRAY_SIZE(firda_parents), 0, PERIP_CLK_CFG, |
418 | FIRDA_CLK_SHIFT, FIRDA_CLK_MASK, 0, &_lock); | 414 | FIRDA_CLK_SHIFT, FIRDA_CLK_MASK, 0, &_lock); |
419 | clk_register_clkdev(clk, "firda_mux_clk", NULL); | 415 | clk_register_clkdev(clk, "firda_mclk", NULL); |
420 | 416 | ||
421 | clk = clk_register_gate(NULL, "firda_clk", "firda_mux_clk", 0, | 417 | clk = clk_register_gate(NULL, "firda_clk", "firda_mclk", 0, |
422 | PERIP1_CLK_ENB, FIRDA_CLK_ENB, 0, &_lock); | 418 | PERIP1_CLK_ENB, FIRDA_CLK_ENB, 0, &_lock); |
423 | clk_register_clkdev(clk, NULL, "firda"); | 419 | clk_register_clkdev(clk, NULL, "firda"); |
424 | 420 | ||
425 | /* gpt clocks */ | 421 | /* gpt clocks */ |
426 | clk_register_gpt("gpt0_synth_clk", "pll1_clk", 0, PRSC0_CLK_CFG, | 422 | clk_register_gpt("gpt0_syn_clk", "pll1_clk", 0, PRSC0_CLK_CFG, gpt_rtbl, |
427 | gpt_rtbl, ARRAY_SIZE(gpt_rtbl), &_lock); | 423 | ARRAY_SIZE(gpt_rtbl), &_lock); |
428 | clk = clk_register_mux(NULL, "gpt0_clk", gpt0_parents, | 424 | clk = clk_register_mux(NULL, "gpt0_clk", gpt0_parents, |
429 | ARRAY_SIZE(gpt0_parents), 0, PERIP_CLK_CFG, | 425 | ARRAY_SIZE(gpt0_parents), 0, PERIP_CLK_CFG, |
430 | GPT0_CLK_SHIFT, GPT_CLK_MASK, 0, &_lock); | 426 | GPT0_CLK_SHIFT, GPT_CLK_MASK, 0, &_lock); |
431 | clk_register_clkdev(clk, NULL, "gpt0"); | 427 | clk_register_clkdev(clk, NULL, "gpt0"); |
432 | 428 | ||
433 | clk_register_gpt("gpt1_synth_clk", "pll1_clk", 0, PRSC1_CLK_CFG, | 429 | clk_register_gpt("gpt1_syn_clk", "pll1_clk", 0, PRSC1_CLK_CFG, gpt_rtbl, |
434 | gpt_rtbl, ARRAY_SIZE(gpt_rtbl), &_lock); | 430 | ARRAY_SIZE(gpt_rtbl), &_lock); |
435 | clk = clk_register_mux(NULL, "gpt1_mux_clk", gpt1_parents, | 431 | clk = clk_register_mux(NULL, "gpt1_mclk", gpt1_parents, |
436 | ARRAY_SIZE(gpt1_parents), 0, PERIP_CLK_CFG, | 432 | ARRAY_SIZE(gpt1_parents), 0, PERIP_CLK_CFG, |
437 | GPT1_CLK_SHIFT, GPT_CLK_MASK, 0, &_lock); | 433 | GPT1_CLK_SHIFT, GPT_CLK_MASK, 0, &_lock); |
438 | clk_register_clkdev(clk, "gpt1_mux_clk", NULL); | 434 | clk_register_clkdev(clk, "gpt1_mclk", NULL); |
439 | clk = clk_register_gate(NULL, "gpt1_clk", "gpt1_mux_clk", 0, | 435 | clk = clk_register_gate(NULL, "gpt1_clk", "gpt1_mclk", 0, |
440 | PERIP1_CLK_ENB, GPT1_CLK_ENB, 0, &_lock); | 436 | PERIP1_CLK_ENB, GPT1_CLK_ENB, 0, &_lock); |
441 | clk_register_clkdev(clk, NULL, "gpt1"); | 437 | clk_register_clkdev(clk, NULL, "gpt1"); |
442 | 438 | ||
443 | clk_register_gpt("gpt2_synth_clk", "pll1_clk", 0, PRSC2_CLK_CFG, | 439 | clk_register_gpt("gpt2_syn_clk", "pll1_clk", 0, PRSC2_CLK_CFG, gpt_rtbl, |
444 | gpt_rtbl, ARRAY_SIZE(gpt_rtbl), &_lock); | 440 | ARRAY_SIZE(gpt_rtbl), &_lock); |
445 | clk = clk_register_mux(NULL, "gpt2_mux_clk", gpt2_parents, | 441 | clk = clk_register_mux(NULL, "gpt2_mclk", gpt2_parents, |
446 | ARRAY_SIZE(gpt2_parents), 0, PERIP_CLK_CFG, | 442 | ARRAY_SIZE(gpt2_parents), 0, PERIP_CLK_CFG, |
447 | GPT2_CLK_SHIFT, GPT_CLK_MASK, 0, &_lock); | 443 | GPT2_CLK_SHIFT, GPT_CLK_MASK, 0, &_lock); |
448 | clk_register_clkdev(clk, "gpt2_mux_clk", NULL); | 444 | clk_register_clkdev(clk, "gpt2_mclk", NULL); |
449 | clk = clk_register_gate(NULL, "gpt2_clk", "gpt2_mux_clk", 0, | 445 | clk = clk_register_gate(NULL, "gpt2_clk", "gpt2_mclk", 0, |
450 | PERIP1_CLK_ENB, GPT2_CLK_ENB, 0, &_lock); | 446 | PERIP1_CLK_ENB, GPT2_CLK_ENB, 0, &_lock); |
451 | clk_register_clkdev(clk, NULL, "gpt2"); | 447 | clk_register_clkdev(clk, NULL, "gpt2"); |
452 | 448 | ||
453 | /* general synths clocks */ | 449 | /* general synths clocks */ |
454 | clk = clk_register_aux("gen0_synth_clk", "gen0_synth_gate_clk", | 450 | clk = clk_register_aux("gen0_syn_clk", "gen0_syn_gclk", "pll1_clk", |
455 | "pll1_clk", 0, GEN0_CLK_SYNT, NULL, aux_rtbl, | 451 | 0, GEN0_CLK_SYNT, NULL, aux_rtbl, ARRAY_SIZE(aux_rtbl), |
456 | ARRAY_SIZE(aux_rtbl), &_lock, &clk1); | 452 | &_lock, &clk1); |
457 | clk_register_clkdev(clk, "gen0_synth_clk", NULL); | 453 | clk_register_clkdev(clk, "gen0_syn_clk", NULL); |
458 | clk_register_clkdev(clk1, "gen0_synth_gate_clk", NULL); | 454 | clk_register_clkdev(clk1, "gen0_syn_gclk", NULL); |
459 | 455 | ||
460 | clk = clk_register_aux("gen1_synth_clk", "gen1_synth_gate_clk", | 456 | clk = clk_register_aux("gen1_syn_clk", "gen1_syn_gclk", "pll1_clk", |
461 | "pll1_clk", 0, GEN1_CLK_SYNT, NULL, aux_rtbl, | 457 | 0, GEN1_CLK_SYNT, NULL, aux_rtbl, ARRAY_SIZE(aux_rtbl), |
462 | ARRAY_SIZE(aux_rtbl), &_lock, &clk1); | 458 | &_lock, &clk1); |
463 | clk_register_clkdev(clk, "gen1_synth_clk", NULL); | 459 | clk_register_clkdev(clk, "gen1_syn_clk", NULL); |
464 | clk_register_clkdev(clk1, "gen1_synth_gate_clk", NULL); | 460 | clk_register_clkdev(clk1, "gen1_syn_gclk", NULL); |
465 | 461 | ||
466 | clk = clk_register_mux(NULL, "gen2_3_parent_clk", gen2_3_parents, | 462 | clk = clk_register_mux(NULL, "gen2_3_par_clk", gen2_3_parents, |
467 | ARRAY_SIZE(gen2_3_parents), 0, CORE_CLK_CFG, | 463 | ARRAY_SIZE(gen2_3_parents), 0, CORE_CLK_CFG, |
468 | GEN_SYNTH2_3_CLK_SHIFT, GEN_SYNTH2_3_CLK_MASK, 0, | 464 | GEN_SYNTH2_3_CLK_SHIFT, GEN_SYNTH2_3_CLK_MASK, 0, |
469 | &_lock); | 465 | &_lock); |
470 | clk_register_clkdev(clk, "gen2_3_parent_clk", NULL); | 466 | clk_register_clkdev(clk, "gen2_3_par_clk", NULL); |
471 | 467 | ||
472 | clk = clk_register_aux("gen2_synth_clk", "gen2_synth_gate_clk", | 468 | clk = clk_register_aux("gen2_syn_clk", "gen2_syn_gclk", |
473 | "gen2_3_parent_clk", 0, GEN2_CLK_SYNT, NULL, aux_rtbl, | 469 | "gen2_3_par_clk", 0, GEN2_CLK_SYNT, NULL, aux_rtbl, |
474 | ARRAY_SIZE(aux_rtbl), &_lock, &clk1); | 470 | ARRAY_SIZE(aux_rtbl), &_lock, &clk1); |
475 | clk_register_clkdev(clk, "gen2_synth_clk", NULL); | 471 | clk_register_clkdev(clk, "gen2_syn_clk", NULL); |
476 | clk_register_clkdev(clk1, "gen2_synth_gate_clk", NULL); | 472 | clk_register_clkdev(clk1, "gen2_syn_gclk", NULL); |
477 | 473 | ||
478 | clk = clk_register_aux("gen3_synth_clk", "gen3_synth_gate_clk", | 474 | clk = clk_register_aux("gen3_syn_clk", "gen3_syn_gclk", |
479 | "gen2_3_parent_clk", 0, GEN3_CLK_SYNT, NULL, aux_rtbl, | 475 | "gen2_3_par_clk", 0, GEN3_CLK_SYNT, NULL, aux_rtbl, |
480 | ARRAY_SIZE(aux_rtbl), &_lock, &clk1); | 476 | ARRAY_SIZE(aux_rtbl), &_lock, &clk1); |
481 | clk_register_clkdev(clk, "gen3_synth_clk", NULL); | 477 | clk_register_clkdev(clk, "gen3_syn_clk", NULL); |
482 | clk_register_clkdev(clk1, "gen3_synth_gate_clk", NULL); | 478 | clk_register_clkdev(clk1, "gen3_syn_gclk", NULL); |
483 | 479 | ||
484 | /* clock derived from pll3 clk */ | 480 | /* clock derived from pll3 clk */ |
485 | clk = clk_register_gate(NULL, "usbh_clk", "pll3_48m_clk", 0, | 481 | clk = clk_register_gate(NULL, "usbh_clk", "pll3_clk", 0, PERIP1_CLK_ENB, |
486 | PERIP1_CLK_ENB, USBH_CLK_ENB, 0, &_lock); | 482 | USBH_CLK_ENB, 0, &_lock); |
487 | clk_register_clkdev(clk, "usbh_clk", NULL); | 483 | clk_register_clkdev(clk, "usbh_clk", NULL); |
488 | 484 | ||
489 | clk = clk_register_fixed_factor(NULL, "usbh.0_clk", "usbh_clk", 0, 1, | 485 | clk = clk_register_fixed_factor(NULL, "usbh.0_clk", "usbh_clk", 0, 1, |
@@ -494,8 +490,8 @@ void __init spear3xx_clk_init(void) | |||
494 | 1); | 490 | 1); |
495 | clk_register_clkdev(clk, "usbh.1_clk", NULL); | 491 | clk_register_clkdev(clk, "usbh.1_clk", NULL); |
496 | 492 | ||
497 | clk = clk_register_gate(NULL, "usbd_clk", "pll3_48m_clk", 0, | 493 | clk = clk_register_gate(NULL, "usbd_clk", "pll3_clk", 0, PERIP1_CLK_ENB, |
498 | PERIP1_CLK_ENB, USBD_CLK_ENB, 0, &_lock); | 494 | USBD_CLK_ENB, 0, &_lock); |
499 | clk_register_clkdev(clk, NULL, "designware_udc"); | 495 | clk_register_clkdev(clk, NULL, "designware_udc"); |
500 | 496 | ||
501 | /* clock derived from ahb clk */ | 497 | /* clock derived from ahb clk */ |
@@ -579,29 +575,25 @@ void __init spear3xx_clk_init(void) | |||
579 | RAS_CLK_ENB, RAS_PLL2_CLK_ENB, 0, &_lock); | 575 | RAS_CLK_ENB, RAS_PLL2_CLK_ENB, 0, &_lock); |
580 | clk_register_clkdev(clk, "ras_pll2_clk", NULL); | 576 | clk_register_clkdev(clk, "ras_pll2_clk", NULL); |
581 | 577 | ||
582 | clk = clk_register_gate(NULL, "ras_pll3_48m_clk", "pll3_48m_clk", 0, | 578 | clk = clk_register_gate(NULL, "ras_pll3_clk", "pll3_clk", 0, |
583 | RAS_CLK_ENB, RAS_48M_CLK_ENB, 0, &_lock); | 579 | RAS_CLK_ENB, RAS_48M_CLK_ENB, 0, &_lock); |
584 | clk_register_clkdev(clk, "ras_pll3_48m_clk", NULL); | 580 | clk_register_clkdev(clk, "ras_pll3_clk", NULL); |
585 | 581 | ||
586 | clk = clk_register_gate(NULL, "ras_gen0_synth_gate_clk", | 582 | clk = clk_register_gate(NULL, "ras_syn0_gclk", "gen0_syn_gclk", 0, |
587 | "gen0_synth_gate_clk", 0, RAS_CLK_ENB, | 583 | RAS_CLK_ENB, RAS_SYNT0_CLK_ENB, 0, &_lock); |
588 | RAS_SYNT0_CLK_ENB, 0, &_lock); | 584 | clk_register_clkdev(clk, "ras_syn0_gclk", NULL); |
589 | clk_register_clkdev(clk, "ras_gen0_synth_gate_clk", NULL); | 585 | |
590 | 586 | clk = clk_register_gate(NULL, "ras_syn1_gclk", "gen1_syn_gclk", 0, | |
591 | clk = clk_register_gate(NULL, "ras_gen1_synth_gate_clk", | 587 | RAS_CLK_ENB, RAS_SYNT1_CLK_ENB, 0, &_lock); |
592 | "gen1_synth_gate_clk", 0, RAS_CLK_ENB, | 588 | clk_register_clkdev(clk, "ras_syn1_gclk", NULL); |
593 | RAS_SYNT1_CLK_ENB, 0, &_lock); | 589 | |
594 | clk_register_clkdev(clk, "ras_gen1_synth_gate_clk", NULL); | 590 | clk = clk_register_gate(NULL, "ras_syn2_gclk", "gen2_syn_gclk", 0, |
595 | 591 | RAS_CLK_ENB, RAS_SYNT2_CLK_ENB, 0, &_lock); | |
596 | clk = clk_register_gate(NULL, "ras_gen2_synth_gate_clk", | 592 | clk_register_clkdev(clk, "ras_syn2_gclk", NULL); |
597 | "gen2_synth_gate_clk", 0, RAS_CLK_ENB, | 593 | |
598 | RAS_SYNT2_CLK_ENB, 0, &_lock); | 594 | clk = clk_register_gate(NULL, "ras_syn3_gclk", "gen3_syn_gclk", 0, |
599 | clk_register_clkdev(clk, "ras_gen2_synth_gate_clk", NULL); | 595 | RAS_CLK_ENB, RAS_SYNT3_CLK_ENB, 0, &_lock); |
600 | 596 | clk_register_clkdev(clk, "ras_syn3_gclk", NULL); | |
601 | clk = clk_register_gate(NULL, "ras_gen3_synth_gate_clk", | ||
602 | "gen3_synth_gate_clk", 0, RAS_CLK_ENB, | ||
603 | RAS_SYNT3_CLK_ENB, 0, &_lock); | ||
604 | clk_register_clkdev(clk, "ras_gen3_synth_gate_clk", NULL); | ||
605 | 597 | ||
606 | if (of_machine_is_compatible("st,spear300")) | 598 | if (of_machine_is_compatible("st,spear300")) |
607 | spear300_clk_init(); | 599 | spear300_clk_init(); |
diff --git a/drivers/clk/spear/spear6xx_clock.c b/drivers/clk/spear/spear6xx_clock.c index 61026ae564ab..a98d0866f541 100644 --- a/drivers/clk/spear/spear6xx_clock.c +++ b/drivers/clk/spear/spear6xx_clock.c | |||
@@ -97,13 +97,12 @@ static struct aux_rate_tbl aux_rtbl[] = { | |||
97 | {.xscale = 1, .yscale = 2, .eq = 1}, /* 166 MHz */ | 97 | {.xscale = 1, .yscale = 2, .eq = 1}, /* 166 MHz */ |
98 | }; | 98 | }; |
99 | 99 | ||
100 | static const char *clcd_parents[] = { "pll3_48m_clk", "clcd_synth_gate_clk", }; | 100 | static const char *clcd_parents[] = { "pll3_clk", "clcd_syn_gclk", }; |
101 | static const char *firda_parents[] = { "pll3_48m_clk", "firda_synth_gate_clk", | 101 | static const char *firda_parents[] = { "pll3_clk", "firda_syn_gclk", }; |
102 | }; | 102 | static const char *uart_parents[] = { "pll3_clk", "uart_syn_gclk", }; |
103 | static const char *uart_parents[] = { "pll3_48m_clk", "uart_synth_gate_clk", }; | 103 | static const char *gpt0_1_parents[] = { "pll3_clk", "gpt0_1_syn_clk", }; |
104 | static const char *gpt0_1_parents[] = { "pll3_48m_clk", "gpt0_1_synth_clk", }; | 104 | static const char *gpt2_parents[] = { "pll3_clk", "gpt2_syn_clk", }; |
105 | static const char *gpt2_parents[] = { "pll3_48m_clk", "gpt2_synth_clk", }; | 105 | static const char *gpt3_parents[] = { "pll3_clk", "gpt3_syn_clk", }; |
106 | static const char *gpt3_parents[] = { "pll3_48m_clk", "gpt3_synth_clk", }; | ||
107 | static const char *ddr_parents[] = { "ahb_clk", "ahbmult2_clk", "none", | 106 | static const char *ddr_parents[] = { "ahb_clk", "ahbmult2_clk", "none", |
108 | "pll2_clk", }; | 107 | "pll2_clk", }; |
109 | 108 | ||
@@ -136,9 +135,9 @@ void __init spear6xx_clk_init(void) | |||
136 | clk_register_clkdev(clk, NULL, "rtc-spear"); | 135 | clk_register_clkdev(clk, NULL, "rtc-spear"); |
137 | 136 | ||
138 | /* clock derived from 30 MHz osc clk */ | 137 | /* clock derived from 30 MHz osc clk */ |
139 | clk = clk_register_fixed_rate(NULL, "pll3_48m_clk", "osc_24m_clk", 0, | 138 | clk = clk_register_fixed_rate(NULL, "pll3_clk", "osc_24m_clk", 0, |
140 | 48000000); | 139 | 48000000); |
141 | clk_register_clkdev(clk, "pll3_48m_clk", NULL); | 140 | clk_register_clkdev(clk, "pll3_clk", NULL); |
142 | 141 | ||
143 | clk = clk_register_vco_pll("vco1_clk", "pll1_clk", NULL, "osc_30m_clk", | 142 | clk = clk_register_vco_pll("vco1_clk", "pll1_clk", NULL, "osc_30m_clk", |
144 | 0, PLL1_CTR, PLL1_FRQ, pll_rtbl, ARRAY_SIZE(pll_rtbl), | 143 | 0, PLL1_CTR, PLL1_FRQ, pll_rtbl, ARRAY_SIZE(pll_rtbl), |
@@ -146,9 +145,9 @@ void __init spear6xx_clk_init(void) | |||
146 | clk_register_clkdev(clk, "vco1_clk", NULL); | 145 | clk_register_clkdev(clk, "vco1_clk", NULL); |
147 | clk_register_clkdev(clk1, "pll1_clk", NULL); | 146 | clk_register_clkdev(clk1, "pll1_clk", NULL); |
148 | 147 | ||
149 | clk = clk_register_vco_pll("vco2_clk", "pll2_clk", NULL, | 148 | clk = clk_register_vco_pll("vco2_clk", "pll2_clk", NULL, "osc_30m_clk", |
150 | "osc_30m_clk", 0, PLL2_CTR, PLL2_FRQ, pll_rtbl, | 149 | 0, PLL2_CTR, PLL2_FRQ, pll_rtbl, ARRAY_SIZE(pll_rtbl), |
151 | ARRAY_SIZE(pll_rtbl), &_lock, &clk1, NULL); | 150 | &_lock, &clk1, NULL); |
152 | clk_register_clkdev(clk, "vco2_clk", NULL); | 151 | clk_register_clkdev(clk, "vco2_clk", NULL); |
153 | clk_register_clkdev(clk1, "pll2_clk", NULL); | 152 | clk_register_clkdev(clk1, "pll2_clk", NULL); |
154 | 153 | ||
@@ -165,111 +164,111 @@ void __init spear6xx_clk_init(void) | |||
165 | HCLK_RATIO_MASK, 0, &_lock); | 164 | HCLK_RATIO_MASK, 0, &_lock); |
166 | clk_register_clkdev(clk, "ahb_clk", NULL); | 165 | clk_register_clkdev(clk, "ahb_clk", NULL); |
167 | 166 | ||
168 | clk = clk_register_aux("uart_synth_clk", "uart_synth_gate_clk", | 167 | clk = clk_register_aux("uart_syn_clk", "uart_syn_gclk", "pll1_clk", 0, |
169 | "pll1_clk", 0, UART_CLK_SYNT, NULL, aux_rtbl, | 168 | UART_CLK_SYNT, NULL, aux_rtbl, ARRAY_SIZE(aux_rtbl), |
170 | ARRAY_SIZE(aux_rtbl), &_lock, &clk1); | 169 | &_lock, &clk1); |
171 | clk_register_clkdev(clk, "uart_synth_clk", NULL); | 170 | clk_register_clkdev(clk, "uart_syn_clk", NULL); |
172 | clk_register_clkdev(clk1, "uart_synth_gate_clk", NULL); | 171 | clk_register_clkdev(clk1, "uart_syn_gclk", NULL); |
173 | 172 | ||
174 | clk = clk_register_mux(NULL, "uart_mux_clk", uart_parents, | 173 | clk = clk_register_mux(NULL, "uart_mclk", uart_parents, |
175 | ARRAY_SIZE(uart_parents), 0, PERIP_CLK_CFG, | 174 | ARRAY_SIZE(uart_parents), 0, PERIP_CLK_CFG, |
176 | UART_CLK_SHIFT, UART_CLK_MASK, 0, &_lock); | 175 | UART_CLK_SHIFT, UART_CLK_MASK, 0, &_lock); |
177 | clk_register_clkdev(clk, "uart_mux_clk", NULL); | 176 | clk_register_clkdev(clk, "uart_mclk", NULL); |
178 | 177 | ||
179 | clk = clk_register_gate(NULL, "uart0", "uart_mux_clk", 0, | 178 | clk = clk_register_gate(NULL, "uart0", "uart_mclk", 0, PERIP1_CLK_ENB, |
180 | PERIP1_CLK_ENB, UART0_CLK_ENB, 0, &_lock); | 179 | UART0_CLK_ENB, 0, &_lock); |
181 | clk_register_clkdev(clk, NULL, "d0000000.serial"); | 180 | clk_register_clkdev(clk, NULL, "d0000000.serial"); |
182 | 181 | ||
183 | clk = clk_register_gate(NULL, "uart1", "uart_mux_clk", 0, | 182 | clk = clk_register_gate(NULL, "uart1", "uart_mclk", 0, PERIP1_CLK_ENB, |
184 | PERIP1_CLK_ENB, UART1_CLK_ENB, 0, &_lock); | 183 | UART1_CLK_ENB, 0, &_lock); |
185 | clk_register_clkdev(clk, NULL, "d0080000.serial"); | 184 | clk_register_clkdev(clk, NULL, "d0080000.serial"); |
186 | 185 | ||
187 | clk = clk_register_aux("firda_synth_clk", "firda_synth_gate_clk", | 186 | clk = clk_register_aux("firda_syn_clk", "firda_syn_gclk", "pll1_clk", |
188 | "pll1_clk", 0, FIRDA_CLK_SYNT, NULL, aux_rtbl, | 187 | 0, FIRDA_CLK_SYNT, NULL, aux_rtbl, ARRAY_SIZE(aux_rtbl), |
189 | ARRAY_SIZE(aux_rtbl), &_lock, &clk1); | 188 | &_lock, &clk1); |
190 | clk_register_clkdev(clk, "firda_synth_clk", NULL); | 189 | clk_register_clkdev(clk, "firda_syn_clk", NULL); |
191 | clk_register_clkdev(clk1, "firda_synth_gate_clk", NULL); | 190 | clk_register_clkdev(clk1, "firda_syn_gclk", NULL); |
192 | 191 | ||
193 | clk = clk_register_mux(NULL, "firda_mux_clk", firda_parents, | 192 | clk = clk_register_mux(NULL, "firda_mclk", firda_parents, |
194 | ARRAY_SIZE(firda_parents), 0, PERIP_CLK_CFG, | 193 | ARRAY_SIZE(firda_parents), 0, PERIP_CLK_CFG, |
195 | FIRDA_CLK_SHIFT, FIRDA_CLK_MASK, 0, &_lock); | 194 | FIRDA_CLK_SHIFT, FIRDA_CLK_MASK, 0, &_lock); |
196 | clk_register_clkdev(clk, "firda_mux_clk", NULL); | 195 | clk_register_clkdev(clk, "firda_mclk", NULL); |
197 | 196 | ||
198 | clk = clk_register_gate(NULL, "firda_clk", "firda_mux_clk", 0, | 197 | clk = clk_register_gate(NULL, "firda_clk", "firda_mclk", 0, |
199 | PERIP1_CLK_ENB, FIRDA_CLK_ENB, 0, &_lock); | 198 | PERIP1_CLK_ENB, FIRDA_CLK_ENB, 0, &_lock); |
200 | clk_register_clkdev(clk, NULL, "firda"); | 199 | clk_register_clkdev(clk, NULL, "firda"); |
201 | 200 | ||
202 | clk = clk_register_aux("clcd_synth_clk", "clcd_synth_gate_clk", | 201 | clk = clk_register_aux("clcd_syn_clk", "clcd_syn_gclk", "pll1_clk", |
203 | "pll1_clk", 0, CLCD_CLK_SYNT, NULL, aux_rtbl, | 202 | 0, CLCD_CLK_SYNT, NULL, aux_rtbl, ARRAY_SIZE(aux_rtbl), |
204 | ARRAY_SIZE(aux_rtbl), &_lock, &clk1); | 203 | &_lock, &clk1); |
205 | clk_register_clkdev(clk, "clcd_synth_clk", NULL); | 204 | clk_register_clkdev(clk, "clcd_syn_clk", NULL); |
206 | clk_register_clkdev(clk1, "clcd_synth_gate_clk", NULL); | 205 | clk_register_clkdev(clk1, "clcd_syn_gclk", NULL); |
207 | 206 | ||
208 | clk = clk_register_mux(NULL, "clcd_mux_clk", clcd_parents, | 207 | clk = clk_register_mux(NULL, "clcd_mclk", clcd_parents, |
209 | ARRAY_SIZE(clcd_parents), 0, PERIP_CLK_CFG, | 208 | ARRAY_SIZE(clcd_parents), 0, PERIP_CLK_CFG, |
210 | CLCD_CLK_SHIFT, CLCD_CLK_MASK, 0, &_lock); | 209 | CLCD_CLK_SHIFT, CLCD_CLK_MASK, 0, &_lock); |
211 | clk_register_clkdev(clk, "clcd_mux_clk", NULL); | 210 | clk_register_clkdev(clk, "clcd_mclk", NULL); |
212 | 211 | ||
213 | clk = clk_register_gate(NULL, "clcd_clk", "clcd_mux_clk", 0, | 212 | clk = clk_register_gate(NULL, "clcd_clk", "clcd_mclk", 0, |
214 | PERIP1_CLK_ENB, CLCD_CLK_ENB, 0, &_lock); | 213 | PERIP1_CLK_ENB, CLCD_CLK_ENB, 0, &_lock); |
215 | clk_register_clkdev(clk, NULL, "clcd"); | 214 | clk_register_clkdev(clk, NULL, "clcd"); |
216 | 215 | ||
217 | /* gpt clocks */ | 216 | /* gpt clocks */ |
218 | clk = clk_register_gpt("gpt0_1_synth_clk", "pll1_clk", 0, PRSC0_CLK_CFG, | 217 | clk = clk_register_gpt("gpt0_1_syn_clk", "pll1_clk", 0, PRSC0_CLK_CFG, |
219 | gpt_rtbl, ARRAY_SIZE(gpt_rtbl), &_lock); | 218 | gpt_rtbl, ARRAY_SIZE(gpt_rtbl), &_lock); |
220 | clk_register_clkdev(clk, "gpt0_1_synth_clk", NULL); | 219 | clk_register_clkdev(clk, "gpt0_1_syn_clk", NULL); |
221 | 220 | ||
222 | clk = clk_register_mux(NULL, "gpt0_mux_clk", gpt0_1_parents, | 221 | clk = clk_register_mux(NULL, "gpt0_mclk", gpt0_1_parents, |
223 | ARRAY_SIZE(gpt0_1_parents), 0, PERIP_CLK_CFG, | 222 | ARRAY_SIZE(gpt0_1_parents), 0, PERIP_CLK_CFG, |
224 | GPT0_CLK_SHIFT, GPT_CLK_MASK, 0, &_lock); | 223 | GPT0_CLK_SHIFT, GPT_CLK_MASK, 0, &_lock); |
225 | clk_register_clkdev(clk, NULL, "gpt0"); | 224 | clk_register_clkdev(clk, NULL, "gpt0"); |
226 | 225 | ||
227 | clk = clk_register_mux(NULL, "gpt1_mux_clk", gpt0_1_parents, | 226 | clk = clk_register_mux(NULL, "gpt1_mclk", gpt0_1_parents, |
228 | ARRAY_SIZE(gpt0_1_parents), 0, PERIP_CLK_CFG, | 227 | ARRAY_SIZE(gpt0_1_parents), 0, PERIP_CLK_CFG, |
229 | GPT1_CLK_SHIFT, GPT_CLK_MASK, 0, &_lock); | 228 | GPT1_CLK_SHIFT, GPT_CLK_MASK, 0, &_lock); |
230 | clk_register_clkdev(clk, "gpt1_mux_clk", NULL); | 229 | clk_register_clkdev(clk, "gpt1_mclk", NULL); |
231 | 230 | ||
232 | clk = clk_register_gate(NULL, "gpt1_clk", "gpt1_mux_clk", 0, | 231 | clk = clk_register_gate(NULL, "gpt1_clk", "gpt1_mclk", 0, |
233 | PERIP1_CLK_ENB, GPT1_CLK_ENB, 0, &_lock); | 232 | PERIP1_CLK_ENB, GPT1_CLK_ENB, 0, &_lock); |
234 | clk_register_clkdev(clk, NULL, "gpt1"); | 233 | clk_register_clkdev(clk, NULL, "gpt1"); |
235 | 234 | ||
236 | clk = clk_register_gpt("gpt2_synth_clk", "pll1_clk", 0, PRSC1_CLK_CFG, | 235 | clk = clk_register_gpt("gpt2_syn_clk", "pll1_clk", 0, PRSC1_CLK_CFG, |
237 | gpt_rtbl, ARRAY_SIZE(gpt_rtbl), &_lock); | 236 | gpt_rtbl, ARRAY_SIZE(gpt_rtbl), &_lock); |
238 | clk_register_clkdev(clk, "gpt2_synth_clk", NULL); | 237 | clk_register_clkdev(clk, "gpt2_syn_clk", NULL); |
239 | 238 | ||
240 | clk = clk_register_mux(NULL, "gpt2_mux_clk", gpt2_parents, | 239 | clk = clk_register_mux(NULL, "gpt2_mclk", gpt2_parents, |
241 | ARRAY_SIZE(gpt2_parents), 0, PERIP_CLK_CFG, | 240 | ARRAY_SIZE(gpt2_parents), 0, PERIP_CLK_CFG, |
242 | GPT2_CLK_SHIFT, GPT_CLK_MASK, 0, &_lock); | 241 | GPT2_CLK_SHIFT, GPT_CLK_MASK, 0, &_lock); |
243 | clk_register_clkdev(clk, "gpt2_mux_clk", NULL); | 242 | clk_register_clkdev(clk, "gpt2_mclk", NULL); |
244 | 243 | ||
245 | clk = clk_register_gate(NULL, "gpt2_clk", "gpt2_mux_clk", 0, | 244 | clk = clk_register_gate(NULL, "gpt2_clk", "gpt2_mclk", 0, |
246 | PERIP1_CLK_ENB, GPT2_CLK_ENB, 0, &_lock); | 245 | PERIP1_CLK_ENB, GPT2_CLK_ENB, 0, &_lock); |
247 | clk_register_clkdev(clk, NULL, "gpt2"); | 246 | clk_register_clkdev(clk, NULL, "gpt2"); |
248 | 247 | ||
249 | clk = clk_register_gpt("gpt3_synth_clk", "pll1_clk", 0, PRSC2_CLK_CFG, | 248 | clk = clk_register_gpt("gpt3_syn_clk", "pll1_clk", 0, PRSC2_CLK_CFG, |
250 | gpt_rtbl, ARRAY_SIZE(gpt_rtbl), &_lock); | 249 | gpt_rtbl, ARRAY_SIZE(gpt_rtbl), &_lock); |
251 | clk_register_clkdev(clk, "gpt3_synth_clk", NULL); | 250 | clk_register_clkdev(clk, "gpt3_syn_clk", NULL); |
252 | 251 | ||
253 | clk = clk_register_mux(NULL, "gpt3_mux_clk", gpt3_parents, | 252 | clk = clk_register_mux(NULL, "gpt3_mclk", gpt3_parents, |
254 | ARRAY_SIZE(gpt3_parents), 0, PERIP_CLK_CFG, | 253 | ARRAY_SIZE(gpt3_parents), 0, PERIP_CLK_CFG, |
255 | GPT3_CLK_SHIFT, GPT_CLK_MASK, 0, &_lock); | 254 | GPT3_CLK_SHIFT, GPT_CLK_MASK, 0, &_lock); |
256 | clk_register_clkdev(clk, "gpt3_mux_clk", NULL); | 255 | clk_register_clkdev(clk, "gpt3_mclk", NULL); |
257 | 256 | ||
258 | clk = clk_register_gate(NULL, "gpt3_clk", "gpt3_mux_clk", 0, | 257 | clk = clk_register_gate(NULL, "gpt3_clk", "gpt3_mclk", 0, |
259 | PERIP1_CLK_ENB, GPT3_CLK_ENB, 0, &_lock); | 258 | PERIP1_CLK_ENB, GPT3_CLK_ENB, 0, &_lock); |
260 | clk_register_clkdev(clk, NULL, "gpt3"); | 259 | clk_register_clkdev(clk, NULL, "gpt3"); |
261 | 260 | ||
262 | /* clock derived from pll3 clk */ | 261 | /* clock derived from pll3 clk */ |
263 | clk = clk_register_gate(NULL, "usbh0_clk", "pll3_48m_clk", 0, | 262 | clk = clk_register_gate(NULL, "usbh0_clk", "pll3_clk", 0, |
264 | PERIP1_CLK_ENB, USBH0_CLK_ENB, 0, &_lock); | 263 | PERIP1_CLK_ENB, USBH0_CLK_ENB, 0, &_lock); |
265 | clk_register_clkdev(clk, NULL, "usbh.0_clk"); | 264 | clk_register_clkdev(clk, NULL, "usbh.0_clk"); |
266 | 265 | ||
267 | clk = clk_register_gate(NULL, "usbh1_clk", "pll3_48m_clk", 0, | 266 | clk = clk_register_gate(NULL, "usbh1_clk", "pll3_clk", 0, |
268 | PERIP1_CLK_ENB, USBH1_CLK_ENB, 0, &_lock); | 267 | PERIP1_CLK_ENB, USBH1_CLK_ENB, 0, &_lock); |
269 | clk_register_clkdev(clk, NULL, "usbh.1_clk"); | 268 | clk_register_clkdev(clk, NULL, "usbh.1_clk"); |
270 | 269 | ||
271 | clk = clk_register_gate(NULL, "usbd_clk", "pll3_48m_clk", 0, | 270 | clk = clk_register_gate(NULL, "usbd_clk", "pll3_clk", 0, PERIP1_CLK_ENB, |
272 | PERIP1_CLK_ENB, USBD_CLK_ENB, 0, &_lock); | 271 | USBD_CLK_ENB, 0, &_lock); |
273 | clk_register_clkdev(clk, NULL, "designware_udc"); | 272 | clk_register_clkdev(clk, NULL, "designware_udc"); |
274 | 273 | ||
275 | /* clock derived from ahb clk */ | 274 | /* clock derived from ahb clk */ |
@@ -278,9 +277,8 @@ void __init spear6xx_clk_init(void) | |||
278 | clk_register_clkdev(clk, "ahbmult2_clk", NULL); | 277 | clk_register_clkdev(clk, "ahbmult2_clk", NULL); |
279 | 278 | ||
280 | clk = clk_register_mux(NULL, "ddr_clk", ddr_parents, | 279 | clk = clk_register_mux(NULL, "ddr_clk", ddr_parents, |
281 | ARRAY_SIZE(ddr_parents), | 280 | ARRAY_SIZE(ddr_parents), 0, PLL_CLK_CFG, MCTR_CLK_SHIFT, |
282 | 0, PLL_CLK_CFG, MCTR_CLK_SHIFT, MCTR_CLK_MASK, 0, | 281 | MCTR_CLK_MASK, 0, &_lock); |
283 | &_lock); | ||
284 | clk_register_clkdev(clk, "ddr_clk", NULL); | 282 | clk_register_clkdev(clk, "ddr_clk", NULL); |
285 | 283 | ||
286 | clk = clk_register_divider(NULL, "apb_clk", "ahb_clk", | 284 | clk = clk_register_divider(NULL, "apb_clk", "ahb_clk", |
diff --git a/drivers/gpu/drm/gma500/cdv_device.c b/drivers/gpu/drm/gma500/cdv_device.c index 9764045428ce..b7e7b49d8f62 100644 --- a/drivers/gpu/drm/gma500/cdv_device.c +++ b/drivers/gpu/drm/gma500/cdv_device.c | |||
@@ -78,21 +78,6 @@ static int cdv_backlight_combination_mode(struct drm_device *dev) | |||
78 | return REG_READ(BLC_PWM_CTL2) & PWM_LEGACY_MODE; | 78 | return REG_READ(BLC_PWM_CTL2) & PWM_LEGACY_MODE; |
79 | } | 79 | } |
80 | 80 | ||
81 | static int cdv_get_brightness(struct backlight_device *bd) | ||
82 | { | ||
83 | struct drm_device *dev = bl_get_data(bd); | ||
84 | u32 val = REG_READ(BLC_PWM_CTL) & BACKLIGHT_DUTY_CYCLE_MASK; | ||
85 | |||
86 | if (cdv_backlight_combination_mode(dev)) { | ||
87 | u8 lbpc; | ||
88 | |||
89 | val &= ~1; | ||
90 | pci_read_config_byte(dev->pdev, 0xF4, &lbpc); | ||
91 | val *= lbpc; | ||
92 | } | ||
93 | return val; | ||
94 | } | ||
95 | |||
96 | static u32 cdv_get_max_backlight(struct drm_device *dev) | 81 | static u32 cdv_get_max_backlight(struct drm_device *dev) |
97 | { | 82 | { |
98 | u32 max = REG_READ(BLC_PWM_CTL); | 83 | u32 max = REG_READ(BLC_PWM_CTL); |
@@ -110,6 +95,22 @@ static u32 cdv_get_max_backlight(struct drm_device *dev) | |||
110 | return max; | 95 | return max; |
111 | } | 96 | } |
112 | 97 | ||
98 | static int cdv_get_brightness(struct backlight_device *bd) | ||
99 | { | ||
100 | struct drm_device *dev = bl_get_data(bd); | ||
101 | u32 val = REG_READ(BLC_PWM_CTL) & BACKLIGHT_DUTY_CYCLE_MASK; | ||
102 | |||
103 | if (cdv_backlight_combination_mode(dev)) { | ||
104 | u8 lbpc; | ||
105 | |||
106 | val &= ~1; | ||
107 | pci_read_config_byte(dev->pdev, 0xF4, &lbpc); | ||
108 | val *= lbpc; | ||
109 | } | ||
110 | return (val * 100)/cdv_get_max_backlight(dev); | ||
111 | |||
112 | } | ||
113 | |||
113 | static int cdv_set_brightness(struct backlight_device *bd) | 114 | static int cdv_set_brightness(struct backlight_device *bd) |
114 | { | 115 | { |
115 | struct drm_device *dev = bl_get_data(bd); | 116 | struct drm_device *dev = bl_get_data(bd); |
@@ -120,6 +121,9 @@ static int cdv_set_brightness(struct backlight_device *bd) | |||
120 | if (level < 1) | 121 | if (level < 1) |
121 | level = 1; | 122 | level = 1; |
122 | 123 | ||
124 | level *= cdv_get_max_backlight(dev); | ||
125 | level /= 100; | ||
126 | |||
123 | if (cdv_backlight_combination_mode(dev)) { | 127 | if (cdv_backlight_combination_mode(dev)) { |
124 | u32 max = cdv_get_max_backlight(dev); | 128 | u32 max = cdv_get_max_backlight(dev); |
125 | u8 lbpc; | 129 | u8 lbpc; |
@@ -157,7 +161,6 @@ static int cdv_backlight_init(struct drm_device *dev) | |||
157 | 161 | ||
158 | cdv_backlight_device->props.brightness = | 162 | cdv_backlight_device->props.brightness = |
159 | cdv_get_brightness(cdv_backlight_device); | 163 | cdv_get_brightness(cdv_backlight_device); |
160 | cdv_backlight_device->props.max_brightness = cdv_get_max_backlight(dev); | ||
161 | backlight_update_status(cdv_backlight_device); | 164 | backlight_update_status(cdv_backlight_device); |
162 | dev_priv->backlight_device = cdv_backlight_device; | 165 | dev_priv->backlight_device = cdv_backlight_device; |
163 | return 0; | 166 | return 0; |
diff --git a/drivers/gpu/drm/gma500/opregion.c b/drivers/gpu/drm/gma500/opregion.c index 4f186eca3a30..c430bd424681 100644 --- a/drivers/gpu/drm/gma500/opregion.c +++ b/drivers/gpu/drm/gma500/opregion.c | |||
@@ -144,6 +144,8 @@ struct opregion_asle { | |||
144 | 144 | ||
145 | #define ASLE_CBLV_VALID (1<<31) | 145 | #define ASLE_CBLV_VALID (1<<31) |
146 | 146 | ||
147 | static struct psb_intel_opregion *system_opregion; | ||
148 | |||
147 | static u32 asle_set_backlight(struct drm_device *dev, u32 bclp) | 149 | static u32 asle_set_backlight(struct drm_device *dev, u32 bclp) |
148 | { | 150 | { |
149 | struct drm_psb_private *dev_priv = dev->dev_private; | 151 | struct drm_psb_private *dev_priv = dev->dev_private; |
@@ -205,7 +207,7 @@ void psb_intel_opregion_enable_asle(struct drm_device *dev) | |||
205 | struct drm_psb_private *dev_priv = dev->dev_private; | 207 | struct drm_psb_private *dev_priv = dev->dev_private; |
206 | struct opregion_asle *asle = dev_priv->opregion.asle; | 208 | struct opregion_asle *asle = dev_priv->opregion.asle; |
207 | 209 | ||
208 | if (asle) { | 210 | if (asle && system_opregion ) { |
209 | /* Don't do this on Medfield or other non PC like devices, they | 211 | /* Don't do this on Medfield or other non PC like devices, they |
210 | use the bit for something different altogether */ | 212 | use the bit for something different altogether */ |
211 | psb_enable_pipestat(dev_priv, 0, PIPE_LEGACY_BLC_EVENT_ENABLE); | 213 | psb_enable_pipestat(dev_priv, 0, PIPE_LEGACY_BLC_EVENT_ENABLE); |
@@ -221,7 +223,6 @@ void psb_intel_opregion_enable_asle(struct drm_device *dev) | |||
221 | #define ACPI_EV_LID (1<<1) | 223 | #define ACPI_EV_LID (1<<1) |
222 | #define ACPI_EV_DOCK (1<<2) | 224 | #define ACPI_EV_DOCK (1<<2) |
223 | 225 | ||
224 | static struct psb_intel_opregion *system_opregion; | ||
225 | 226 | ||
226 | static int psb_intel_opregion_video_event(struct notifier_block *nb, | 227 | static int psb_intel_opregion_video_event(struct notifier_block *nb, |
227 | unsigned long val, void *data) | 228 | unsigned long val, void *data) |
@@ -266,9 +267,6 @@ void psb_intel_opregion_init(struct drm_device *dev) | |||
266 | system_opregion = opregion; | 267 | system_opregion = opregion; |
267 | register_acpi_notifier(&psb_intel_opregion_notifier); | 268 | register_acpi_notifier(&psb_intel_opregion_notifier); |
268 | } | 269 | } |
269 | |||
270 | if (opregion->asle) | ||
271 | psb_intel_opregion_enable_asle(dev); | ||
272 | } | 270 | } |
273 | 271 | ||
274 | void psb_intel_opregion_fini(struct drm_device *dev) | 272 | void psb_intel_opregion_fini(struct drm_device *dev) |
diff --git a/drivers/gpu/drm/gma500/opregion.h b/drivers/gpu/drm/gma500/opregion.h index 72dc6b921265..4a90f8b0e16c 100644 --- a/drivers/gpu/drm/gma500/opregion.h +++ b/drivers/gpu/drm/gma500/opregion.h | |||
@@ -27,6 +27,7 @@ extern void psb_intel_opregion_asle_intr(struct drm_device *dev); | |||
27 | extern void psb_intel_opregion_init(struct drm_device *dev); | 27 | extern void psb_intel_opregion_init(struct drm_device *dev); |
28 | extern void psb_intel_opregion_fini(struct drm_device *dev); | 28 | extern void psb_intel_opregion_fini(struct drm_device *dev); |
29 | extern int psb_intel_opregion_setup(struct drm_device *dev); | 29 | extern int psb_intel_opregion_setup(struct drm_device *dev); |
30 | extern void psb_intel_opregion_enable_asle(struct drm_device *dev); | ||
30 | 31 | ||
31 | #else | 32 | #else |
32 | 33 | ||
@@ -46,4 +47,8 @@ extern inline int psb_intel_opregion_setup(struct drm_device *dev) | |||
46 | { | 47 | { |
47 | return 0; | 48 | return 0; |
48 | } | 49 | } |
50 | |||
51 | extern inline void psb_intel_opregion_enable_asle(struct drm_device *dev) | ||
52 | { | ||
53 | } | ||
49 | #endif | 54 | #endif |
diff --git a/drivers/gpu/drm/gma500/psb_device.c b/drivers/gpu/drm/gma500/psb_device.c index eff039bf92d4..5971bc82b765 100644 --- a/drivers/gpu/drm/gma500/psb_device.c +++ b/drivers/gpu/drm/gma500/psb_device.c | |||
@@ -144,6 +144,10 @@ static int psb_backlight_init(struct drm_device *dev) | |||
144 | psb_backlight_device->props.max_brightness = 100; | 144 | psb_backlight_device->props.max_brightness = 100; |
145 | backlight_update_status(psb_backlight_device); | 145 | backlight_update_status(psb_backlight_device); |
146 | dev_priv->backlight_device = psb_backlight_device; | 146 | dev_priv->backlight_device = psb_backlight_device; |
147 | |||
148 | /* This must occur after the backlight is properly initialised */ | ||
149 | psb_lid_timer_init(dev_priv); | ||
150 | |||
147 | return 0; | 151 | return 0; |
148 | } | 152 | } |
149 | 153 | ||
@@ -354,13 +358,6 @@ static int psb_chip_setup(struct drm_device *dev) | |||
354 | return 0; | 358 | return 0; |
355 | } | 359 | } |
356 | 360 | ||
357 | /* Not exactly an erratum more an irritation */ | ||
358 | static void psb_chip_errata(struct drm_device *dev) | ||
359 | { | ||
360 | struct drm_psb_private *dev_priv = dev->dev_private; | ||
361 | psb_lid_timer_init(dev_priv); | ||
362 | } | ||
363 | |||
364 | static void psb_chip_teardown(struct drm_device *dev) | 361 | static void psb_chip_teardown(struct drm_device *dev) |
365 | { | 362 | { |
366 | struct drm_psb_private *dev_priv = dev->dev_private; | 363 | struct drm_psb_private *dev_priv = dev->dev_private; |
@@ -379,7 +376,6 @@ const struct psb_ops psb_chip_ops = { | |||
379 | .sgx_offset = PSB_SGX_OFFSET, | 376 | .sgx_offset = PSB_SGX_OFFSET, |
380 | .chip_setup = psb_chip_setup, | 377 | .chip_setup = psb_chip_setup, |
381 | .chip_teardown = psb_chip_teardown, | 378 | .chip_teardown = psb_chip_teardown, |
382 | .errata = psb_chip_errata, | ||
383 | 379 | ||
384 | .crtc_helper = &psb_intel_helper_funcs, | 380 | .crtc_helper = &psb_intel_helper_funcs, |
385 | .crtc_funcs = &psb_intel_crtc_funcs, | 381 | .crtc_funcs = &psb_intel_crtc_funcs, |
diff --git a/drivers/gpu/drm/gma500/psb_drv.c b/drivers/gpu/drm/gma500/psb_drv.c index caba6e08693c..a8858a907f47 100644 --- a/drivers/gpu/drm/gma500/psb_drv.c +++ b/drivers/gpu/drm/gma500/psb_drv.c | |||
@@ -374,6 +374,7 @@ static int psb_driver_load(struct drm_device *dev, unsigned long chipset) | |||
374 | 374 | ||
375 | if (ret) | 375 | if (ret) |
376 | return ret; | 376 | return ret; |
377 | psb_intel_opregion_enable_asle(dev); | ||
377 | #if 0 | 378 | #if 0 |
378 | /*enable runtime pm at last*/ | 379 | /*enable runtime pm at last*/ |
379 | pm_runtime_enable(&dev->pdev->dev); | 380 | pm_runtime_enable(&dev->pdev->dev); |
diff --git a/drivers/hid/Kconfig b/drivers/hid/Kconfig index bef04c192768..3fda8c87f02c 100644 --- a/drivers/hid/Kconfig +++ b/drivers/hid/Kconfig | |||
@@ -386,6 +386,7 @@ config HID_MULTITOUCH | |||
386 | - Unitec Panels | 386 | - Unitec Panels |
387 | - XAT optical touch panels | 387 | - XAT optical touch panels |
388 | - Xiroku optical touch panels | 388 | - Xiroku optical touch panels |
389 | - Zytronic touch panels | ||
389 | 390 | ||
390 | If unsure, say N. | 391 | If unsure, say N. |
391 | 392 | ||
diff --git a/drivers/hid/hid-ids.h b/drivers/hid/hid-ids.h index 875ff451842b..32039235cfee 100644 --- a/drivers/hid/hid-ids.h +++ b/drivers/hid/hid-ids.h | |||
@@ -659,6 +659,9 @@ | |||
659 | #define USB_DEVICE_ID_SAMSUNG_IR_REMOTE 0x0001 | 659 | #define USB_DEVICE_ID_SAMSUNG_IR_REMOTE 0x0001 |
660 | #define USB_DEVICE_ID_SAMSUNG_WIRELESS_KBD_MOUSE 0x0600 | 660 | #define USB_DEVICE_ID_SAMSUNG_WIRELESS_KBD_MOUSE 0x0600 |
661 | 661 | ||
662 | #define USB_VENDOR_ID_SENNHEISER 0x1395 | ||
663 | #define USB_DEVICE_ID_SENNHEISER_BTD500USB 0x002c | ||
664 | |||
662 | #define USB_VENDOR_ID_SIGMA_MICRO 0x1c4f | 665 | #define USB_VENDOR_ID_SIGMA_MICRO 0x1c4f |
663 | #define USB_DEVICE_ID_SIGMA_MICRO_KEYBOARD 0x0002 | 666 | #define USB_DEVICE_ID_SIGMA_MICRO_KEYBOARD 0x0002 |
664 | 667 | ||
@@ -808,6 +811,9 @@ | |||
808 | #define USB_VENDOR_ID_ZYDACRON 0x13EC | 811 | #define USB_VENDOR_ID_ZYDACRON 0x13EC |
809 | #define USB_DEVICE_ID_ZYDACRON_REMOTE_CONTROL 0x0006 | 812 | #define USB_DEVICE_ID_ZYDACRON_REMOTE_CONTROL 0x0006 |
810 | 813 | ||
814 | #define USB_VENDOR_ID_ZYTRONIC 0x14c8 | ||
815 | #define USB_DEVICE_ID_ZYTRONIC_ZXY100 0x0005 | ||
816 | |||
811 | #define USB_VENDOR_ID_PRIMAX 0x0461 | 817 | #define USB_VENDOR_ID_PRIMAX 0x0461 |
812 | #define USB_DEVICE_ID_PRIMAX_KEYBOARD 0x4e05 | 818 | #define USB_DEVICE_ID_PRIMAX_KEYBOARD 0x4e05 |
813 | 819 | ||
diff --git a/drivers/hid/hid-input.c b/drivers/hid/hid-input.c index 132b0019365e..5301006f6c15 100644 --- a/drivers/hid/hid-input.c +++ b/drivers/hid/hid-input.c | |||
@@ -301,6 +301,9 @@ static const struct hid_device_id hid_battery_quirks[] = { | |||
301 | { HID_BLUETOOTH_DEVICE(USB_VENDOR_ID_APPLE, | 301 | { HID_BLUETOOTH_DEVICE(USB_VENDOR_ID_APPLE, |
302 | USB_DEVICE_ID_APPLE_ALU_WIRELESS_2011_ANSI), | 302 | USB_DEVICE_ID_APPLE_ALU_WIRELESS_2011_ANSI), |
303 | HID_BATTERY_QUIRK_PERCENT | HID_BATTERY_QUIRK_FEATURE }, | 303 | HID_BATTERY_QUIRK_PERCENT | HID_BATTERY_QUIRK_FEATURE }, |
304 | { HID_BLUETOOTH_DEVICE(USB_VENDOR_ID_APPLE, | ||
305 | USB_DEVICE_ID_APPLE_ALU_WIRELESS_ANSI), | ||
306 | HID_BATTERY_QUIRK_PERCENT | HID_BATTERY_QUIRK_FEATURE }, | ||
304 | {} | 307 | {} |
305 | }; | 308 | }; |
306 | 309 | ||
diff --git a/drivers/hid/hid-multitouch.c b/drivers/hid/hid-multitouch.c index 6e3332a99976..76479246d4ee 100644 --- a/drivers/hid/hid-multitouch.c +++ b/drivers/hid/hid-multitouch.c | |||
@@ -1048,6 +1048,11 @@ static const struct hid_device_id mt_devices[] = { | |||
1048 | MT_USB_DEVICE(USB_VENDOR_ID_XIROKU, | 1048 | MT_USB_DEVICE(USB_VENDOR_ID_XIROKU, |
1049 | USB_DEVICE_ID_XIROKU_CSR2) }, | 1049 | USB_DEVICE_ID_XIROKU_CSR2) }, |
1050 | 1050 | ||
1051 | /* Zytronic panels */ | ||
1052 | { .driver_data = MT_CLS_SERIAL, | ||
1053 | MT_USB_DEVICE(USB_VENDOR_ID_ZYTRONIC, | ||
1054 | USB_DEVICE_ID_ZYTRONIC_ZXY100) }, | ||
1055 | |||
1051 | /* Generic MT device */ | 1056 | /* Generic MT device */ |
1052 | { HID_DEVICE(HID_BUS_ANY, HID_GROUP_MULTITOUCH, HID_ANY_ID, HID_ANY_ID) }, | 1057 | { HID_DEVICE(HID_BUS_ANY, HID_GROUP_MULTITOUCH, HID_ANY_ID, HID_ANY_ID) }, |
1053 | { } | 1058 | { } |
diff --git a/drivers/hid/usbhid/hid-quirks.c b/drivers/hid/usbhid/hid-quirks.c index 0597ee604f6e..903eef3d3e10 100644 --- a/drivers/hid/usbhid/hid-quirks.c +++ b/drivers/hid/usbhid/hid-quirks.c | |||
@@ -76,6 +76,7 @@ static const struct hid_blacklist { | |||
76 | { USB_VENDOR_ID_PRODIGE, USB_DEVICE_ID_PRODIGE_CORDLESS, HID_QUIRK_NOGET }, | 76 | { USB_VENDOR_ID_PRODIGE, USB_DEVICE_ID_PRODIGE_CORDLESS, HID_QUIRK_NOGET }, |
77 | { USB_VENDOR_ID_QUANTA, USB_DEVICE_ID_PIXART_IMAGING_INC_OPTICAL_TOUCH_SCREEN, HID_QUIRK_NOGET }, | 77 | { USB_VENDOR_ID_QUANTA, USB_DEVICE_ID_PIXART_IMAGING_INC_OPTICAL_TOUCH_SCREEN, HID_QUIRK_NOGET }, |
78 | { USB_VENDOR_ID_QUANTA, USB_DEVICE_ID_QUANTA_OPTICAL_TOUCH_3008, HID_QUIRK_NOGET }, | 78 | { USB_VENDOR_ID_QUANTA, USB_DEVICE_ID_QUANTA_OPTICAL_TOUCH_3008, HID_QUIRK_NOGET }, |
79 | { USB_VENDOR_ID_SENNHEISER, USB_DEVICE_ID_SENNHEISER_BTD500USB, HID_QUIRK_NOGET }, | ||
79 | { USB_VENDOR_ID_SUN, USB_DEVICE_ID_RARITAN_KVM_DONGLE, HID_QUIRK_NOGET }, | 80 | { USB_VENDOR_ID_SUN, USB_DEVICE_ID_RARITAN_KVM_DONGLE, HID_QUIRK_NOGET }, |
80 | { USB_VENDOR_ID_SYMBOL, USB_DEVICE_ID_SYMBOL_SCANNER_1, HID_QUIRK_NOGET }, | 81 | { USB_VENDOR_ID_SYMBOL, USB_DEVICE_ID_SYMBOL_SCANNER_1, HID_QUIRK_NOGET }, |
81 | { USB_VENDOR_ID_SYMBOL, USB_DEVICE_ID_SYMBOL_SCANNER_2, HID_QUIRK_NOGET }, | 82 | { USB_VENDOR_ID_SYMBOL, USB_DEVICE_ID_SYMBOL_SCANNER_2, HID_QUIRK_NOGET }, |
diff --git a/drivers/infiniband/ulp/ipoib/ipoib_ib.c b/drivers/infiniband/ulp/ipoib/ipoib_ib.c index 5c1bc995e560..f10221f40803 100644 --- a/drivers/infiniband/ulp/ipoib/ipoib_ib.c +++ b/drivers/infiniband/ulp/ipoib/ipoib_ib.c | |||
@@ -123,7 +123,7 @@ static void ipoib_ud_skb_put_frags(struct ipoib_dev_priv *priv, | |||
123 | 123 | ||
124 | skb_frag_size_set(frag, size); | 124 | skb_frag_size_set(frag, size); |
125 | skb->data_len += size; | 125 | skb->data_len += size; |
126 | skb->truesize += size; | 126 | skb->truesize += PAGE_SIZE; |
127 | } else | 127 | } else |
128 | skb_put(skb, length); | 128 | skb_put(skb, length); |
129 | 129 | ||
@@ -156,14 +156,18 @@ static struct sk_buff *ipoib_alloc_rx_skb(struct net_device *dev, int id) | |||
156 | struct ipoib_dev_priv *priv = netdev_priv(dev); | 156 | struct ipoib_dev_priv *priv = netdev_priv(dev); |
157 | struct sk_buff *skb; | 157 | struct sk_buff *skb; |
158 | int buf_size; | 158 | int buf_size; |
159 | int tailroom; | ||
159 | u64 *mapping; | 160 | u64 *mapping; |
160 | 161 | ||
161 | if (ipoib_ud_need_sg(priv->max_ib_mtu)) | 162 | if (ipoib_ud_need_sg(priv->max_ib_mtu)) { |
162 | buf_size = IPOIB_UD_HEAD_SIZE; | 163 | buf_size = IPOIB_UD_HEAD_SIZE; |
163 | else | 164 | tailroom = 128; /* reserve some tailroom for IP/TCP headers */ |
165 | } else { | ||
164 | buf_size = IPOIB_UD_BUF_SIZE(priv->max_ib_mtu); | 166 | buf_size = IPOIB_UD_BUF_SIZE(priv->max_ib_mtu); |
167 | tailroom = 0; | ||
168 | } | ||
165 | 169 | ||
166 | skb = dev_alloc_skb(buf_size + 4); | 170 | skb = dev_alloc_skb(buf_size + tailroom + 4); |
167 | if (unlikely(!skb)) | 171 | if (unlikely(!skb)) |
168 | return NULL; | 172 | return NULL; |
169 | 173 | ||
diff --git a/drivers/iommu/dmar.c b/drivers/iommu/dmar.c index 3a74e4410fc0..86e2f4a62b9a 100644 --- a/drivers/iommu/dmar.c +++ b/drivers/iommu/dmar.c | |||
@@ -26,6 +26,8 @@ | |||
26 | * These routines are used by both DMA-remapping and Interrupt-remapping | 26 | * These routines are used by both DMA-remapping and Interrupt-remapping |
27 | */ | 27 | */ |
28 | 28 | ||
29 | #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt /* has to precede printk.h */ | ||
30 | |||
29 | #include <linux/pci.h> | 31 | #include <linux/pci.h> |
30 | #include <linux/dmar.h> | 32 | #include <linux/dmar.h> |
31 | #include <linux/iova.h> | 33 | #include <linux/iova.h> |
@@ -39,8 +41,6 @@ | |||
39 | #include <asm/irq_remapping.h> | 41 | #include <asm/irq_remapping.h> |
40 | #include <asm/iommu_table.h> | 42 | #include <asm/iommu_table.h> |
41 | 43 | ||
42 | #define PREFIX "DMAR: " | ||
43 | |||
44 | /* No locks are needed as DMA remapping hardware unit | 44 | /* No locks are needed as DMA remapping hardware unit |
45 | * list is constructed at boot time and hotplug of | 45 | * list is constructed at boot time and hotplug of |
46 | * these units are not supported by the architecture. | 46 | * these units are not supported by the architecture. |
@@ -83,16 +83,12 @@ static int __init dmar_parse_one_dev_scope(struct acpi_dmar_device_scope *scope, | |||
83 | * ignore it | 83 | * ignore it |
84 | */ | 84 | */ |
85 | if (!bus) { | 85 | if (!bus) { |
86 | printk(KERN_WARNING | 86 | pr_warn("Device scope bus [%d] not found\n", scope->bus); |
87 | PREFIX "Device scope bus [%d] not found\n", | ||
88 | scope->bus); | ||
89 | break; | 87 | break; |
90 | } | 88 | } |
91 | pdev = pci_get_slot(bus, PCI_DEVFN(path->dev, path->fn)); | 89 | pdev = pci_get_slot(bus, PCI_DEVFN(path->dev, path->fn)); |
92 | if (!pdev) { | 90 | if (!pdev) { |
93 | printk(KERN_WARNING PREFIX | 91 | /* warning will be printed below */ |
94 | "Device scope device [%04x:%02x:%02x.%02x] not found\n", | ||
95 | segment, bus->number, path->dev, path->fn); | ||
96 | break; | 92 | break; |
97 | } | 93 | } |
98 | path ++; | 94 | path ++; |
@@ -100,9 +96,8 @@ static int __init dmar_parse_one_dev_scope(struct acpi_dmar_device_scope *scope, | |||
100 | bus = pdev->subordinate; | 96 | bus = pdev->subordinate; |
101 | } | 97 | } |
102 | if (!pdev) { | 98 | if (!pdev) { |
103 | printk(KERN_WARNING PREFIX | 99 | pr_warn("Device scope device [%04x:%02x:%02x.%02x] not found\n", |
104 | "Device scope device [%04x:%02x:%02x.%02x] not found\n", | 100 | segment, scope->bus, path->dev, path->fn); |
105 | segment, scope->bus, path->dev, path->fn); | ||
106 | *dev = NULL; | 101 | *dev = NULL; |
107 | return 0; | 102 | return 0; |
108 | } | 103 | } |
@@ -110,9 +105,8 @@ static int __init dmar_parse_one_dev_scope(struct acpi_dmar_device_scope *scope, | |||
110 | pdev->subordinate) || (scope->entry_type == \ | 105 | pdev->subordinate) || (scope->entry_type == \ |
111 | ACPI_DMAR_SCOPE_TYPE_BRIDGE && !pdev->subordinate)) { | 106 | ACPI_DMAR_SCOPE_TYPE_BRIDGE && !pdev->subordinate)) { |
112 | pci_dev_put(pdev); | 107 | pci_dev_put(pdev); |
113 | printk(KERN_WARNING PREFIX | 108 | pr_warn("Device scope type does not match for %s\n", |
114 | "Device scope type does not match for %s\n", | 109 | pci_name(pdev)); |
115 | pci_name(pdev)); | ||
116 | return -EINVAL; | 110 | return -EINVAL; |
117 | } | 111 | } |
118 | *dev = pdev; | 112 | *dev = pdev; |
@@ -134,8 +128,7 @@ int __init dmar_parse_dev_scope(void *start, void *end, int *cnt, | |||
134 | scope->entry_type == ACPI_DMAR_SCOPE_TYPE_BRIDGE) | 128 | scope->entry_type == ACPI_DMAR_SCOPE_TYPE_BRIDGE) |
135 | (*cnt)++; | 129 | (*cnt)++; |
136 | else if (scope->entry_type != ACPI_DMAR_SCOPE_TYPE_IOAPIC) { | 130 | else if (scope->entry_type != ACPI_DMAR_SCOPE_TYPE_IOAPIC) { |
137 | printk(KERN_WARNING PREFIX | 131 | pr_warn("Unsupported device scope\n"); |
138 | "Unsupported device scope\n"); | ||
139 | } | 132 | } |
140 | start += scope->length; | 133 | start += scope->length; |
141 | } | 134 | } |
@@ -261,25 +254,23 @@ dmar_table_print_dmar_entry(struct acpi_dmar_header *header) | |||
261 | case ACPI_DMAR_TYPE_HARDWARE_UNIT: | 254 | case ACPI_DMAR_TYPE_HARDWARE_UNIT: |
262 | drhd = container_of(header, struct acpi_dmar_hardware_unit, | 255 | drhd = container_of(header, struct acpi_dmar_hardware_unit, |
263 | header); | 256 | header); |
264 | printk (KERN_INFO PREFIX | 257 | pr_info("DRHD base: %#016Lx flags: %#x\n", |
265 | "DRHD base: %#016Lx flags: %#x\n", | ||
266 | (unsigned long long)drhd->address, drhd->flags); | 258 | (unsigned long long)drhd->address, drhd->flags); |
267 | break; | 259 | break; |
268 | case ACPI_DMAR_TYPE_RESERVED_MEMORY: | 260 | case ACPI_DMAR_TYPE_RESERVED_MEMORY: |
269 | rmrr = container_of(header, struct acpi_dmar_reserved_memory, | 261 | rmrr = container_of(header, struct acpi_dmar_reserved_memory, |
270 | header); | 262 | header); |
271 | printk (KERN_INFO PREFIX | 263 | pr_info("RMRR base: %#016Lx end: %#016Lx\n", |
272 | "RMRR base: %#016Lx end: %#016Lx\n", | ||
273 | (unsigned long long)rmrr->base_address, | 264 | (unsigned long long)rmrr->base_address, |
274 | (unsigned long long)rmrr->end_address); | 265 | (unsigned long long)rmrr->end_address); |
275 | break; | 266 | break; |
276 | case ACPI_DMAR_TYPE_ATSR: | 267 | case ACPI_DMAR_TYPE_ATSR: |
277 | atsr = container_of(header, struct acpi_dmar_atsr, header); | 268 | atsr = container_of(header, struct acpi_dmar_atsr, header); |
278 | printk(KERN_INFO PREFIX "ATSR flags: %#x\n", atsr->flags); | 269 | pr_info("ATSR flags: %#x\n", atsr->flags); |
279 | break; | 270 | break; |
280 | case ACPI_DMAR_HARDWARE_AFFINITY: | 271 | case ACPI_DMAR_HARDWARE_AFFINITY: |
281 | rhsa = container_of(header, struct acpi_dmar_rhsa, header); | 272 | rhsa = container_of(header, struct acpi_dmar_rhsa, header); |
282 | printk(KERN_INFO PREFIX "RHSA base: %#016Lx proximity domain: %#x\n", | 273 | pr_info("RHSA base: %#016Lx proximity domain: %#x\n", |
283 | (unsigned long long)rhsa->base_address, | 274 | (unsigned long long)rhsa->base_address, |
284 | rhsa->proximity_domain); | 275 | rhsa->proximity_domain); |
285 | break; | 276 | break; |
@@ -299,7 +290,7 @@ static int __init dmar_table_detect(void) | |||
299 | &dmar_tbl_size); | 290 | &dmar_tbl_size); |
300 | 291 | ||
301 | if (ACPI_SUCCESS(status) && !dmar_tbl) { | 292 | if (ACPI_SUCCESS(status) && !dmar_tbl) { |
302 | printk (KERN_WARNING PREFIX "Unable to map DMAR\n"); | 293 | pr_warn("Unable to map DMAR\n"); |
303 | status = AE_NOT_FOUND; | 294 | status = AE_NOT_FOUND; |
304 | } | 295 | } |
305 | 296 | ||
@@ -333,20 +324,18 @@ parse_dmar_table(void) | |||
333 | return -ENODEV; | 324 | return -ENODEV; |
334 | 325 | ||
335 | if (dmar->width < PAGE_SHIFT - 1) { | 326 | if (dmar->width < PAGE_SHIFT - 1) { |
336 | printk(KERN_WARNING PREFIX "Invalid DMAR haw\n"); | 327 | pr_warn("Invalid DMAR haw\n"); |
337 | return -EINVAL; | 328 | return -EINVAL; |
338 | } | 329 | } |
339 | 330 | ||
340 | printk (KERN_INFO PREFIX "Host address width %d\n", | 331 | pr_info("Host address width %d\n", dmar->width + 1); |
341 | dmar->width + 1); | ||
342 | 332 | ||
343 | entry_header = (struct acpi_dmar_header *)(dmar + 1); | 333 | entry_header = (struct acpi_dmar_header *)(dmar + 1); |
344 | while (((unsigned long)entry_header) < | 334 | while (((unsigned long)entry_header) < |
345 | (((unsigned long)dmar) + dmar_tbl->length)) { | 335 | (((unsigned long)dmar) + dmar_tbl->length)) { |
346 | /* Avoid looping forever on bad ACPI tables */ | 336 | /* Avoid looping forever on bad ACPI tables */ |
347 | if (entry_header->length == 0) { | 337 | if (entry_header->length == 0) { |
348 | printk(KERN_WARNING PREFIX | 338 | pr_warn("Invalid 0-length structure\n"); |
349 | "Invalid 0-length structure\n"); | ||
350 | ret = -EINVAL; | 339 | ret = -EINVAL; |
351 | break; | 340 | break; |
352 | } | 341 | } |
@@ -369,8 +358,7 @@ parse_dmar_table(void) | |||
369 | #endif | 358 | #endif |
370 | break; | 359 | break; |
371 | default: | 360 | default: |
372 | printk(KERN_WARNING PREFIX | 361 | pr_warn("Unknown DMAR structure type %d\n", |
373 | "Unknown DMAR structure type %d\n", | ||
374 | entry_header->type); | 362 | entry_header->type); |
375 | ret = 0; /* for forward compatibility */ | 363 | ret = 0; /* for forward compatibility */ |
376 | break; | 364 | break; |
@@ -469,12 +457,12 @@ int __init dmar_table_init(void) | |||
469 | ret = parse_dmar_table(); | 457 | ret = parse_dmar_table(); |
470 | if (ret) { | 458 | if (ret) { |
471 | if (ret != -ENODEV) | 459 | if (ret != -ENODEV) |
472 | printk(KERN_INFO PREFIX "parse DMAR table failure.\n"); | 460 | pr_info("parse DMAR table failure.\n"); |
473 | return ret; | 461 | return ret; |
474 | } | 462 | } |
475 | 463 | ||
476 | if (list_empty(&dmar_drhd_units)) { | 464 | if (list_empty(&dmar_drhd_units)) { |
477 | printk(KERN_INFO PREFIX "No DMAR devices found\n"); | 465 | pr_info("No DMAR devices found\n"); |
478 | return -ENODEV; | 466 | return -ENODEV; |
479 | } | 467 | } |
480 | 468 | ||
@@ -506,8 +494,7 @@ int __init check_zero_address(void) | |||
506 | (((unsigned long)dmar) + dmar_tbl->length)) { | 494 | (((unsigned long)dmar) + dmar_tbl->length)) { |
507 | /* Avoid looping forever on bad ACPI tables */ | 495 | /* Avoid looping forever on bad ACPI tables */ |
508 | if (entry_header->length == 0) { | 496 | if (entry_header->length == 0) { |
509 | printk(KERN_WARNING PREFIX | 497 | pr_warn("Invalid 0-length structure\n"); |
510 | "Invalid 0-length structure\n"); | ||
511 | return 0; | 498 | return 0; |
512 | } | 499 | } |
513 | 500 | ||
@@ -558,8 +545,7 @@ int __init detect_intel_iommu(void) | |||
558 | 545 | ||
559 | if (ret && irq_remapping_enabled && cpu_has_x2apic && | 546 | if (ret && irq_remapping_enabled && cpu_has_x2apic && |
560 | dmar->flags & 0x1) | 547 | dmar->flags & 0x1) |
561 | printk(KERN_INFO | 548 | pr_info("Queued invalidation will be enabled to support x2apic and Intr-remapping.\n"); |
562 | "Queued invalidation will be enabled to support x2apic and Intr-remapping.\n"); | ||
563 | 549 | ||
564 | if (ret && !no_iommu && !iommu_detected && !dmar_disabled) { | 550 | if (ret && !no_iommu && !iommu_detected && !dmar_disabled) { |
565 | iommu_detected = 1; | 551 | iommu_detected = 1; |
@@ -579,14 +565,89 @@ int __init detect_intel_iommu(void) | |||
579 | } | 565 | } |
580 | 566 | ||
581 | 567 | ||
568 | static void unmap_iommu(struct intel_iommu *iommu) | ||
569 | { | ||
570 | iounmap(iommu->reg); | ||
571 | release_mem_region(iommu->reg_phys, iommu->reg_size); | ||
572 | } | ||
573 | |||
574 | /** | ||
575 | * map_iommu: map the iommu's registers | ||
576 | * @iommu: the iommu to map | ||
577 | * @phys_addr: the physical address of the base resgister | ||
578 | * | ||
579 | * Memory map the iommu's registers. Start w/ a single page, and | ||
580 | * possibly expand if that turns out to be insufficent. | ||
581 | */ | ||
582 | static int map_iommu(struct intel_iommu *iommu, u64 phys_addr) | ||
583 | { | ||
584 | int map_size, err=0; | ||
585 | |||
586 | iommu->reg_phys = phys_addr; | ||
587 | iommu->reg_size = VTD_PAGE_SIZE; | ||
588 | |||
589 | if (!request_mem_region(iommu->reg_phys, iommu->reg_size, iommu->name)) { | ||
590 | pr_err("IOMMU: can't reserve memory\n"); | ||
591 | err = -EBUSY; | ||
592 | goto out; | ||
593 | } | ||
594 | |||
595 | iommu->reg = ioremap(iommu->reg_phys, iommu->reg_size); | ||
596 | if (!iommu->reg) { | ||
597 | pr_err("IOMMU: can't map the region\n"); | ||
598 | err = -ENOMEM; | ||
599 | goto release; | ||
600 | } | ||
601 | |||
602 | iommu->cap = dmar_readq(iommu->reg + DMAR_CAP_REG); | ||
603 | iommu->ecap = dmar_readq(iommu->reg + DMAR_ECAP_REG); | ||
604 | |||
605 | if (iommu->cap == (uint64_t)-1 && iommu->ecap == (uint64_t)-1) { | ||
606 | err = -EINVAL; | ||
607 | warn_invalid_dmar(phys_addr, " returns all ones"); | ||
608 | goto unmap; | ||
609 | } | ||
610 | |||
611 | /* the registers might be more than one page */ | ||
612 | map_size = max_t(int, ecap_max_iotlb_offset(iommu->ecap), | ||
613 | cap_max_fault_reg_offset(iommu->cap)); | ||
614 | map_size = VTD_PAGE_ALIGN(map_size); | ||
615 | if (map_size > iommu->reg_size) { | ||
616 | iounmap(iommu->reg); | ||
617 | release_mem_region(iommu->reg_phys, iommu->reg_size); | ||
618 | iommu->reg_size = map_size; | ||
619 | if (!request_mem_region(iommu->reg_phys, iommu->reg_size, | ||
620 | iommu->name)) { | ||
621 | pr_err("IOMMU: can't reserve memory\n"); | ||
622 | err = -EBUSY; | ||
623 | goto out; | ||
624 | } | ||
625 | iommu->reg = ioremap(iommu->reg_phys, iommu->reg_size); | ||
626 | if (!iommu->reg) { | ||
627 | pr_err("IOMMU: can't map the region\n"); | ||
628 | err = -ENOMEM; | ||
629 | goto release; | ||
630 | } | ||
631 | } | ||
632 | err = 0; | ||
633 | goto out; | ||
634 | |||
635 | unmap: | ||
636 | iounmap(iommu->reg); | ||
637 | release: | ||
638 | release_mem_region(iommu->reg_phys, iommu->reg_size); | ||
639 | out: | ||
640 | return err; | ||
641 | } | ||
642 | |||
582 | int alloc_iommu(struct dmar_drhd_unit *drhd) | 643 | int alloc_iommu(struct dmar_drhd_unit *drhd) |
583 | { | 644 | { |
584 | struct intel_iommu *iommu; | 645 | struct intel_iommu *iommu; |
585 | int map_size; | ||
586 | u32 ver; | 646 | u32 ver; |
587 | static int iommu_allocated = 0; | 647 | static int iommu_allocated = 0; |
588 | int agaw = 0; | 648 | int agaw = 0; |
589 | int msagaw = 0; | 649 | int msagaw = 0; |
650 | int err; | ||
590 | 651 | ||
591 | if (!drhd->reg_base_addr) { | 652 | if (!drhd->reg_base_addr) { |
592 | warn_invalid_dmar(0, ""); | 653 | warn_invalid_dmar(0, ""); |
@@ -600,30 +661,22 @@ int alloc_iommu(struct dmar_drhd_unit *drhd) | |||
600 | iommu->seq_id = iommu_allocated++; | 661 | iommu->seq_id = iommu_allocated++; |
601 | sprintf (iommu->name, "dmar%d", iommu->seq_id); | 662 | sprintf (iommu->name, "dmar%d", iommu->seq_id); |
602 | 663 | ||
603 | iommu->reg = ioremap(drhd->reg_base_addr, VTD_PAGE_SIZE); | 664 | err = map_iommu(iommu, drhd->reg_base_addr); |
604 | if (!iommu->reg) { | 665 | if (err) { |
605 | printk(KERN_ERR "IOMMU: can't map the region\n"); | 666 | pr_err("IOMMU: failed to map %s\n", iommu->name); |
606 | goto error; | 667 | goto error; |
607 | } | 668 | } |
608 | iommu->cap = dmar_readq(iommu->reg + DMAR_CAP_REG); | ||
609 | iommu->ecap = dmar_readq(iommu->reg + DMAR_ECAP_REG); | ||
610 | |||
611 | if (iommu->cap == (uint64_t)-1 && iommu->ecap == (uint64_t)-1) { | ||
612 | warn_invalid_dmar(drhd->reg_base_addr, " returns all ones"); | ||
613 | goto err_unmap; | ||
614 | } | ||
615 | 669 | ||
670 | err = -EINVAL; | ||
616 | agaw = iommu_calculate_agaw(iommu); | 671 | agaw = iommu_calculate_agaw(iommu); |
617 | if (agaw < 0) { | 672 | if (agaw < 0) { |
618 | printk(KERN_ERR | 673 | pr_err("Cannot get a valid agaw for iommu (seq_id = %d)\n", |
619 | "Cannot get a valid agaw for iommu (seq_id = %d)\n", | 674 | iommu->seq_id); |
620 | iommu->seq_id); | ||
621 | goto err_unmap; | 675 | goto err_unmap; |
622 | } | 676 | } |
623 | msagaw = iommu_calculate_max_sagaw(iommu); | 677 | msagaw = iommu_calculate_max_sagaw(iommu); |
624 | if (msagaw < 0) { | 678 | if (msagaw < 0) { |
625 | printk(KERN_ERR | 679 | pr_err("Cannot get a valid max agaw for iommu (seq_id = %d)\n", |
626 | "Cannot get a valid max agaw for iommu (seq_id = %d)\n", | ||
627 | iommu->seq_id); | 680 | iommu->seq_id); |
628 | goto err_unmap; | 681 | goto err_unmap; |
629 | } | 682 | } |
@@ -632,19 +685,6 @@ int alloc_iommu(struct dmar_drhd_unit *drhd) | |||
632 | 685 | ||
633 | iommu->node = -1; | 686 | iommu->node = -1; |
634 | 687 | ||
635 | /* the registers might be more than one page */ | ||
636 | map_size = max_t(int, ecap_max_iotlb_offset(iommu->ecap), | ||
637 | cap_max_fault_reg_offset(iommu->cap)); | ||
638 | map_size = VTD_PAGE_ALIGN(map_size); | ||
639 | if (map_size > VTD_PAGE_SIZE) { | ||
640 | iounmap(iommu->reg); | ||
641 | iommu->reg = ioremap(drhd->reg_base_addr, map_size); | ||
642 | if (!iommu->reg) { | ||
643 | printk(KERN_ERR "IOMMU: can't map the region\n"); | ||
644 | goto error; | ||
645 | } | ||
646 | } | ||
647 | |||
648 | ver = readl(iommu->reg + DMAR_VER_REG); | 688 | ver = readl(iommu->reg + DMAR_VER_REG); |
649 | pr_info("IOMMU %d: reg_base_addr %llx ver %d:%d cap %llx ecap %llx\n", | 689 | pr_info("IOMMU %d: reg_base_addr %llx ver %d:%d cap %llx ecap %llx\n", |
650 | iommu->seq_id, | 690 | iommu->seq_id, |
@@ -659,10 +699,10 @@ int alloc_iommu(struct dmar_drhd_unit *drhd) | |||
659 | return 0; | 699 | return 0; |
660 | 700 | ||
661 | err_unmap: | 701 | err_unmap: |
662 | iounmap(iommu->reg); | 702 | unmap_iommu(iommu); |
663 | error: | 703 | error: |
664 | kfree(iommu); | 704 | kfree(iommu); |
665 | return -1; | 705 | return err; |
666 | } | 706 | } |
667 | 707 | ||
668 | void free_iommu(struct intel_iommu *iommu) | 708 | void free_iommu(struct intel_iommu *iommu) |
@@ -673,7 +713,8 @@ void free_iommu(struct intel_iommu *iommu) | |||
673 | free_dmar_iommu(iommu); | 713 | free_dmar_iommu(iommu); |
674 | 714 | ||
675 | if (iommu->reg) | 715 | if (iommu->reg) |
676 | iounmap(iommu->reg); | 716 | unmap_iommu(iommu); |
717 | |||
677 | kfree(iommu); | 718 | kfree(iommu); |
678 | } | 719 | } |
679 | 720 | ||
@@ -710,7 +751,7 @@ static int qi_check_fault(struct intel_iommu *iommu, int index) | |||
710 | if (fault & DMA_FSTS_IQE) { | 751 | if (fault & DMA_FSTS_IQE) { |
711 | head = readl(iommu->reg + DMAR_IQH_REG); | 752 | head = readl(iommu->reg + DMAR_IQH_REG); |
712 | if ((head >> DMAR_IQ_SHIFT) == index) { | 753 | if ((head >> DMAR_IQ_SHIFT) == index) { |
713 | printk(KERN_ERR "VT-d detected invalid descriptor: " | 754 | pr_err("VT-d detected invalid descriptor: " |
714 | "low=%llx, high=%llx\n", | 755 | "low=%llx, high=%llx\n", |
715 | (unsigned long long)qi->desc[index].low, | 756 | (unsigned long long)qi->desc[index].low, |
716 | (unsigned long long)qi->desc[index].high); | 757 | (unsigned long long)qi->desc[index].high); |
@@ -1129,15 +1170,14 @@ static int dmar_fault_do_one(struct intel_iommu *iommu, int type, | |||
1129 | reason = dmar_get_fault_reason(fault_reason, &fault_type); | 1170 | reason = dmar_get_fault_reason(fault_reason, &fault_type); |
1130 | 1171 | ||
1131 | if (fault_type == INTR_REMAP) | 1172 | if (fault_type == INTR_REMAP) |
1132 | printk(KERN_ERR "INTR-REMAP: Request device [[%02x:%02x.%d] " | 1173 | pr_err("INTR-REMAP: Request device [[%02x:%02x.%d] " |
1133 | "fault index %llx\n" | 1174 | "fault index %llx\n" |
1134 | "INTR-REMAP:[fault reason %02d] %s\n", | 1175 | "INTR-REMAP:[fault reason %02d] %s\n", |
1135 | (source_id >> 8), PCI_SLOT(source_id & 0xFF), | 1176 | (source_id >> 8), PCI_SLOT(source_id & 0xFF), |
1136 | PCI_FUNC(source_id & 0xFF), addr >> 48, | 1177 | PCI_FUNC(source_id & 0xFF), addr >> 48, |
1137 | fault_reason, reason); | 1178 | fault_reason, reason); |
1138 | else | 1179 | else |
1139 | printk(KERN_ERR | 1180 | pr_err("DMAR:[%s] Request device [%02x:%02x.%d] " |
1140 | "DMAR:[%s] Request device [%02x:%02x.%d] " | ||
1141 | "fault addr %llx \n" | 1181 | "fault addr %llx \n" |
1142 | "DMAR:[fault reason %02d] %s\n", | 1182 | "DMAR:[fault reason %02d] %s\n", |
1143 | (type ? "DMA Read" : "DMA Write"), | 1183 | (type ? "DMA Read" : "DMA Write"), |
@@ -1157,8 +1197,7 @@ irqreturn_t dmar_fault(int irq, void *dev_id) | |||
1157 | raw_spin_lock_irqsave(&iommu->register_lock, flag); | 1197 | raw_spin_lock_irqsave(&iommu->register_lock, flag); |
1158 | fault_status = readl(iommu->reg + DMAR_FSTS_REG); | 1198 | fault_status = readl(iommu->reg + DMAR_FSTS_REG); |
1159 | if (fault_status) | 1199 | if (fault_status) |
1160 | printk(KERN_ERR "DRHD: handling fault status reg %x\n", | 1200 | pr_err("DRHD: handling fault status reg %x\n", fault_status); |
1161 | fault_status); | ||
1162 | 1201 | ||
1163 | /* TBD: ignore advanced fault log currently */ | 1202 | /* TBD: ignore advanced fault log currently */ |
1164 | if (!(fault_status & DMA_FSTS_PPF)) | 1203 | if (!(fault_status & DMA_FSTS_PPF)) |
@@ -1224,7 +1263,7 @@ int dmar_set_interrupt(struct intel_iommu *iommu) | |||
1224 | 1263 | ||
1225 | irq = create_irq(); | 1264 | irq = create_irq(); |
1226 | if (!irq) { | 1265 | if (!irq) { |
1227 | printk(KERN_ERR "IOMMU: no free vectors\n"); | 1266 | pr_err("IOMMU: no free vectors\n"); |
1228 | return -EINVAL; | 1267 | return -EINVAL; |
1229 | } | 1268 | } |
1230 | 1269 | ||
@@ -1241,7 +1280,7 @@ int dmar_set_interrupt(struct intel_iommu *iommu) | |||
1241 | 1280 | ||
1242 | ret = request_irq(irq, dmar_fault, IRQF_NO_THREAD, iommu->name, iommu); | 1281 | ret = request_irq(irq, dmar_fault, IRQF_NO_THREAD, iommu->name, iommu); |
1243 | if (ret) | 1282 | if (ret) |
1244 | printk(KERN_ERR "IOMMU: can't request irq\n"); | 1283 | pr_err("IOMMU: can't request irq\n"); |
1245 | return ret; | 1284 | return ret; |
1246 | } | 1285 | } |
1247 | 1286 | ||
@@ -1258,8 +1297,7 @@ int __init enable_drhd_fault_handling(void) | |||
1258 | ret = dmar_set_interrupt(iommu); | 1297 | ret = dmar_set_interrupt(iommu); |
1259 | 1298 | ||
1260 | if (ret) { | 1299 | if (ret) { |
1261 | printk(KERN_ERR "DRHD %Lx: failed to enable fault, " | 1300 | pr_err("DRHD %Lx: failed to enable fault, interrupt, ret %d\n", |
1262 | " interrupt, ret %d\n", | ||
1263 | (unsigned long long)drhd->reg_base_addr, ret); | 1301 | (unsigned long long)drhd->reg_base_addr, ret); |
1264 | return -1; | 1302 | return -1; |
1265 | } | 1303 | } |
diff --git a/drivers/iommu/intel_irq_remapping.c b/drivers/iommu/intel_irq_remapping.c index 6d347064b8b0..e0b18f3ae9a8 100644 --- a/drivers/iommu/intel_irq_remapping.c +++ b/drivers/iommu/intel_irq_remapping.c | |||
@@ -902,7 +902,6 @@ static int intel_setup_ioapic_entry(int irq, | |||
902 | return 0; | 902 | return 0; |
903 | } | 903 | } |
904 | 904 | ||
905 | #ifdef CONFIG_SMP | ||
906 | /* | 905 | /* |
907 | * Migrate the IO-APIC irq in the presence of intr-remapping. | 906 | * Migrate the IO-APIC irq in the presence of intr-remapping. |
908 | * | 907 | * |
@@ -924,6 +923,10 @@ intel_ioapic_set_affinity(struct irq_data *data, const struct cpumask *mask, | |||
924 | struct irq_cfg *cfg = data->chip_data; | 923 | struct irq_cfg *cfg = data->chip_data; |
925 | unsigned int dest, irq = data->irq; | 924 | unsigned int dest, irq = data->irq; |
926 | struct irte irte; | 925 | struct irte irte; |
926 | int err; | ||
927 | |||
928 | if (!config_enabled(CONFIG_SMP)) | ||
929 | return -EINVAL; | ||
927 | 930 | ||
928 | if (!cpumask_intersects(mask, cpu_online_mask)) | 931 | if (!cpumask_intersects(mask, cpu_online_mask)) |
929 | return -EINVAL; | 932 | return -EINVAL; |
@@ -931,10 +934,16 @@ intel_ioapic_set_affinity(struct irq_data *data, const struct cpumask *mask, | |||
931 | if (get_irte(irq, &irte)) | 934 | if (get_irte(irq, &irte)) |
932 | return -EBUSY; | 935 | return -EBUSY; |
933 | 936 | ||
934 | if (assign_irq_vector(irq, cfg, mask)) | 937 | err = assign_irq_vector(irq, cfg, mask); |
935 | return -EBUSY; | 938 | if (err) |
939 | return err; | ||
936 | 940 | ||
937 | dest = apic->cpu_mask_to_apicid_and(cfg->domain, mask); | 941 | err = apic->cpu_mask_to_apicid_and(cfg->domain, mask, &dest); |
942 | if (err) { | ||
943 | if (assign_irq_vector(irq, cfg, data->affinity)) | ||
944 | pr_err("Failed to recover vector for irq %d\n", irq); | ||
945 | return err; | ||
946 | } | ||
938 | 947 | ||
939 | irte.vector = cfg->vector; | 948 | irte.vector = cfg->vector; |
940 | irte.dest_id = IRTE_DEST(dest); | 949 | irte.dest_id = IRTE_DEST(dest); |
@@ -956,7 +965,6 @@ intel_ioapic_set_affinity(struct irq_data *data, const struct cpumask *mask, | |||
956 | cpumask_copy(data->affinity, mask); | 965 | cpumask_copy(data->affinity, mask); |
957 | return 0; | 966 | return 0; |
958 | } | 967 | } |
959 | #endif | ||
960 | 968 | ||
961 | static void intel_compose_msi_msg(struct pci_dev *pdev, | 969 | static void intel_compose_msi_msg(struct pci_dev *pdev, |
962 | unsigned int irq, unsigned int dest, | 970 | unsigned int irq, unsigned int dest, |
@@ -1058,9 +1066,7 @@ struct irq_remap_ops intel_irq_remap_ops = { | |||
1058 | .reenable = reenable_irq_remapping, | 1066 | .reenable = reenable_irq_remapping, |
1059 | .enable_faulting = enable_drhd_fault_handling, | 1067 | .enable_faulting = enable_drhd_fault_handling, |
1060 | .setup_ioapic_entry = intel_setup_ioapic_entry, | 1068 | .setup_ioapic_entry = intel_setup_ioapic_entry, |
1061 | #ifdef CONFIG_SMP | ||
1062 | .set_affinity = intel_ioapic_set_affinity, | 1069 | .set_affinity = intel_ioapic_set_affinity, |
1063 | #endif | ||
1064 | .free_irq = free_irte, | 1070 | .free_irq = free_irte, |
1065 | .compose_msi_msg = intel_compose_msi_msg, | 1071 | .compose_msi_msg = intel_compose_msi_msg, |
1066 | .msi_alloc_irq = intel_msi_alloc_irq, | 1072 | .msi_alloc_irq = intel_msi_alloc_irq, |
diff --git a/drivers/iommu/irq_remapping.c b/drivers/iommu/irq_remapping.c index 40cda8e98d87..1d29b1c66e72 100644 --- a/drivers/iommu/irq_remapping.c +++ b/drivers/iommu/irq_remapping.c | |||
@@ -111,16 +111,15 @@ int setup_ioapic_remapped_entry(int irq, | |||
111 | vector, attr); | 111 | vector, attr); |
112 | } | 112 | } |
113 | 113 | ||
114 | #ifdef CONFIG_SMP | ||
115 | int set_remapped_irq_affinity(struct irq_data *data, const struct cpumask *mask, | 114 | int set_remapped_irq_affinity(struct irq_data *data, const struct cpumask *mask, |
116 | bool force) | 115 | bool force) |
117 | { | 116 | { |
118 | if (!remap_ops || !remap_ops->set_affinity) | 117 | if (!config_enabled(CONFIG_SMP) || !remap_ops || |
118 | !remap_ops->set_affinity) | ||
119 | return 0; | 119 | return 0; |
120 | 120 | ||
121 | return remap_ops->set_affinity(data, mask, force); | 121 | return remap_ops->set_affinity(data, mask, force); |
122 | } | 122 | } |
123 | #endif | ||
124 | 123 | ||
125 | void free_remapped_irq(int irq) | 124 | void free_remapped_irq(int irq) |
126 | { | 125 | { |
diff --git a/drivers/iommu/irq_remapping.h b/drivers/iommu/irq_remapping.h index be9d72950c51..b12974cc1dfe 100644 --- a/drivers/iommu/irq_remapping.h +++ b/drivers/iommu/irq_remapping.h | |||
@@ -59,11 +59,9 @@ struct irq_remap_ops { | |||
59 | unsigned int, int, | 59 | unsigned int, int, |
60 | struct io_apic_irq_attr *); | 60 | struct io_apic_irq_attr *); |
61 | 61 | ||
62 | #ifdef CONFIG_SMP | ||
63 | /* Set the CPU affinity of a remapped interrupt */ | 62 | /* Set the CPU affinity of a remapped interrupt */ |
64 | int (*set_affinity)(struct irq_data *data, const struct cpumask *mask, | 63 | int (*set_affinity)(struct irq_data *data, const struct cpumask *mask, |
65 | bool force); | 64 | bool force); |
66 | #endif | ||
67 | 65 | ||
68 | /* Free an IRQ */ | 66 | /* Free an IRQ */ |
69 | int (*free_irq)(int); | 67 | int (*free_irq)(int); |
diff --git a/drivers/isdn/mISDN/stack.c b/drivers/isdn/mISDN/stack.c index 1a0ae4445ff2..5f21f629b7ae 100644 --- a/drivers/isdn/mISDN/stack.c +++ b/drivers/isdn/mISDN/stack.c | |||
@@ -135,8 +135,8 @@ send_layer2(struct mISDNstack *st, struct sk_buff *skb) | |||
135 | skb = NULL; | 135 | skb = NULL; |
136 | else if (*debug & DEBUG_SEND_ERR) | 136 | else if (*debug & DEBUG_SEND_ERR) |
137 | printk(KERN_DEBUG | 137 | printk(KERN_DEBUG |
138 | "%s ch%d mgr prim(%x) addr(%x) err %d\n", | 138 | "%s mgr prim(%x) err %d\n", |
139 | __func__, ch->nr, hh->prim, ch->addr, ret); | 139 | __func__, hh->prim, ret); |
140 | } | 140 | } |
141 | out: | 141 | out: |
142 | mutex_unlock(&st->lmutex); | 142 | mutex_unlock(&st->lmutex); |
diff --git a/drivers/md/dm-raid1.c b/drivers/md/dm-raid1.c index d039de8322f0..b58b7a33914a 100644 --- a/drivers/md/dm-raid1.c +++ b/drivers/md/dm-raid1.c | |||
@@ -1084,6 +1084,7 @@ static int mirror_ctr(struct dm_target *ti, unsigned int argc, char **argv) | |||
1084 | ti->split_io = dm_rh_get_region_size(ms->rh); | 1084 | ti->split_io = dm_rh_get_region_size(ms->rh); |
1085 | ti->num_flush_requests = 1; | 1085 | ti->num_flush_requests = 1; |
1086 | ti->num_discard_requests = 1; | 1086 | ti->num_discard_requests = 1; |
1087 | ti->discard_zeroes_data_unsupported = 1; | ||
1087 | 1088 | ||
1088 | ms->kmirrord_wq = alloc_workqueue("kmirrord", | 1089 | ms->kmirrord_wq = alloc_workqueue("kmirrord", |
1089 | WQ_NON_REENTRANT | WQ_MEM_RECLAIM, 0); | 1090 | WQ_NON_REENTRANT | WQ_MEM_RECLAIM, 0); |
@@ -1214,7 +1215,7 @@ static int mirror_end_io(struct dm_target *ti, struct bio *bio, | |||
1214 | * We need to dec pending if this was a write. | 1215 | * We need to dec pending if this was a write. |
1215 | */ | 1216 | */ |
1216 | if (rw == WRITE) { | 1217 | if (rw == WRITE) { |
1217 | if (!(bio->bi_rw & REQ_FLUSH)) | 1218 | if (!(bio->bi_rw & (REQ_FLUSH | REQ_DISCARD))) |
1218 | dm_rh_dec(ms->rh, map_context->ll); | 1219 | dm_rh_dec(ms->rh, map_context->ll); |
1219 | return error; | 1220 | return error; |
1220 | } | 1221 | } |
diff --git a/drivers/md/dm-region-hash.c b/drivers/md/dm-region-hash.c index 7771ed212182..69732e03eb34 100644 --- a/drivers/md/dm-region-hash.c +++ b/drivers/md/dm-region-hash.c | |||
@@ -404,6 +404,9 @@ void dm_rh_mark_nosync(struct dm_region_hash *rh, struct bio *bio) | |||
404 | return; | 404 | return; |
405 | } | 405 | } |
406 | 406 | ||
407 | if (bio->bi_rw & REQ_DISCARD) | ||
408 | return; | ||
409 | |||
407 | /* We must inform the log that the sync count has changed. */ | 410 | /* We must inform the log that the sync count has changed. */ |
408 | log->type->set_region_sync(log, region, 0); | 411 | log->type->set_region_sync(log, region, 0); |
409 | 412 | ||
@@ -524,7 +527,7 @@ void dm_rh_inc_pending(struct dm_region_hash *rh, struct bio_list *bios) | |||
524 | struct bio *bio; | 527 | struct bio *bio; |
525 | 528 | ||
526 | for (bio = bios->head; bio; bio = bio->bi_next) { | 529 | for (bio = bios->head; bio; bio = bio->bi_next) { |
527 | if (bio->bi_rw & REQ_FLUSH) | 530 | if (bio->bi_rw & (REQ_FLUSH | REQ_DISCARD)) |
528 | continue; | 531 | continue; |
529 | rh_inc(rh, dm_rh_bio_to_region(rh, bio)); | 532 | rh_inc(rh, dm_rh_bio_to_region(rh, bio)); |
530 | } | 533 | } |
diff --git a/drivers/md/dm-thin.c b/drivers/md/dm-thin.c index ce59824fb414..68694da0d21d 100644 --- a/drivers/md/dm-thin.c +++ b/drivers/md/dm-thin.c | |||
@@ -1245,7 +1245,10 @@ static void process_discard(struct thin_c *tc, struct bio *bio) | |||
1245 | 1245 | ||
1246 | cell_release_singleton(cell, bio); | 1246 | cell_release_singleton(cell, bio); |
1247 | cell_release_singleton(cell2, bio); | 1247 | cell_release_singleton(cell2, bio); |
1248 | remap_and_issue(tc, bio, lookup_result.block); | 1248 | if ((!lookup_result.shared) && pool->pf.discard_passdown) |
1249 | remap_and_issue(tc, bio, lookup_result.block); | ||
1250 | else | ||
1251 | bio_endio(bio, 0); | ||
1249 | } | 1252 | } |
1250 | break; | 1253 | break; |
1251 | 1254 | ||
@@ -2628,6 +2631,7 @@ static int thin_ctr(struct dm_target *ti, unsigned argc, char **argv) | |||
2628 | if (tc->pool->pf.discard_enabled) { | 2631 | if (tc->pool->pf.discard_enabled) { |
2629 | ti->discards_supported = 1; | 2632 | ti->discards_supported = 1; |
2630 | ti->num_discard_requests = 1; | 2633 | ti->num_discard_requests = 1; |
2634 | ti->discard_zeroes_data_unsupported = 1; | ||
2631 | } | 2635 | } |
2632 | 2636 | ||
2633 | dm_put(pool_md); | 2637 | dm_put(pool_md); |
diff --git a/drivers/md/md.c b/drivers/md/md.c index a4c219e3c859..d5ab4493c8be 100644 --- a/drivers/md/md.c +++ b/drivers/md/md.c | |||
@@ -2931,6 +2931,7 @@ offset_store(struct md_rdev *rdev, const char *buf, size_t len) | |||
2931 | * can be sane */ | 2931 | * can be sane */ |
2932 | return -EBUSY; | 2932 | return -EBUSY; |
2933 | rdev->data_offset = offset; | 2933 | rdev->data_offset = offset; |
2934 | rdev->new_data_offset = offset; | ||
2934 | return len; | 2935 | return len; |
2935 | } | 2936 | } |
2936 | 2937 | ||
@@ -3926,8 +3927,8 @@ array_state_show(struct mddev *mddev, char *page) | |||
3926 | return sprintf(page, "%s\n", array_states[st]); | 3927 | return sprintf(page, "%s\n", array_states[st]); |
3927 | } | 3928 | } |
3928 | 3929 | ||
3929 | static int do_md_stop(struct mddev * mddev, int ro, int is_open); | 3930 | static int do_md_stop(struct mddev * mddev, int ro, struct block_device *bdev); |
3930 | static int md_set_readonly(struct mddev * mddev, int is_open); | 3931 | static int md_set_readonly(struct mddev * mddev, struct block_device *bdev); |
3931 | static int do_md_run(struct mddev * mddev); | 3932 | static int do_md_run(struct mddev * mddev); |
3932 | static int restart_array(struct mddev *mddev); | 3933 | static int restart_array(struct mddev *mddev); |
3933 | 3934 | ||
@@ -3943,14 +3944,14 @@ array_state_store(struct mddev *mddev, const char *buf, size_t len) | |||
3943 | /* stopping an active array */ | 3944 | /* stopping an active array */ |
3944 | if (atomic_read(&mddev->openers) > 0) | 3945 | if (atomic_read(&mddev->openers) > 0) |
3945 | return -EBUSY; | 3946 | return -EBUSY; |
3946 | err = do_md_stop(mddev, 0, 0); | 3947 | err = do_md_stop(mddev, 0, NULL); |
3947 | break; | 3948 | break; |
3948 | case inactive: | 3949 | case inactive: |
3949 | /* stopping an active array */ | 3950 | /* stopping an active array */ |
3950 | if (mddev->pers) { | 3951 | if (mddev->pers) { |
3951 | if (atomic_read(&mddev->openers) > 0) | 3952 | if (atomic_read(&mddev->openers) > 0) |
3952 | return -EBUSY; | 3953 | return -EBUSY; |
3953 | err = do_md_stop(mddev, 2, 0); | 3954 | err = do_md_stop(mddev, 2, NULL); |
3954 | } else | 3955 | } else |
3955 | err = 0; /* already inactive */ | 3956 | err = 0; /* already inactive */ |
3956 | break; | 3957 | break; |
@@ -3958,7 +3959,7 @@ array_state_store(struct mddev *mddev, const char *buf, size_t len) | |||
3958 | break; /* not supported yet */ | 3959 | break; /* not supported yet */ |
3959 | case readonly: | 3960 | case readonly: |
3960 | if (mddev->pers) | 3961 | if (mddev->pers) |
3961 | err = md_set_readonly(mddev, 0); | 3962 | err = md_set_readonly(mddev, NULL); |
3962 | else { | 3963 | else { |
3963 | mddev->ro = 1; | 3964 | mddev->ro = 1; |
3964 | set_disk_ro(mddev->gendisk, 1); | 3965 | set_disk_ro(mddev->gendisk, 1); |
@@ -3968,7 +3969,7 @@ array_state_store(struct mddev *mddev, const char *buf, size_t len) | |||
3968 | case read_auto: | 3969 | case read_auto: |
3969 | if (mddev->pers) { | 3970 | if (mddev->pers) { |
3970 | if (mddev->ro == 0) | 3971 | if (mddev->ro == 0) |
3971 | err = md_set_readonly(mddev, 0); | 3972 | err = md_set_readonly(mddev, NULL); |
3972 | else if (mddev->ro == 1) | 3973 | else if (mddev->ro == 1) |
3973 | err = restart_array(mddev); | 3974 | err = restart_array(mddev); |
3974 | if (err == 0) { | 3975 | if (err == 0) { |
@@ -5351,15 +5352,17 @@ void md_stop(struct mddev *mddev) | |||
5351 | } | 5352 | } |
5352 | EXPORT_SYMBOL_GPL(md_stop); | 5353 | EXPORT_SYMBOL_GPL(md_stop); |
5353 | 5354 | ||
5354 | static int md_set_readonly(struct mddev *mddev, int is_open) | 5355 | static int md_set_readonly(struct mddev *mddev, struct block_device *bdev) |
5355 | { | 5356 | { |
5356 | int err = 0; | 5357 | int err = 0; |
5357 | mutex_lock(&mddev->open_mutex); | 5358 | mutex_lock(&mddev->open_mutex); |
5358 | if (atomic_read(&mddev->openers) > is_open) { | 5359 | if (atomic_read(&mddev->openers) > !!bdev) { |
5359 | printk("md: %s still in use.\n",mdname(mddev)); | 5360 | printk("md: %s still in use.\n",mdname(mddev)); |
5360 | err = -EBUSY; | 5361 | err = -EBUSY; |
5361 | goto out; | 5362 | goto out; |
5362 | } | 5363 | } |
5364 | if (bdev) | ||
5365 | sync_blockdev(bdev); | ||
5363 | if (mddev->pers) { | 5366 | if (mddev->pers) { |
5364 | __md_stop_writes(mddev); | 5367 | __md_stop_writes(mddev); |
5365 | 5368 | ||
@@ -5381,18 +5384,26 @@ out: | |||
5381 | * 0 - completely stop and dis-assemble array | 5384 | * 0 - completely stop and dis-assemble array |
5382 | * 2 - stop but do not disassemble array | 5385 | * 2 - stop but do not disassemble array |
5383 | */ | 5386 | */ |
5384 | static int do_md_stop(struct mddev * mddev, int mode, int is_open) | 5387 | static int do_md_stop(struct mddev * mddev, int mode, |
5388 | struct block_device *bdev) | ||
5385 | { | 5389 | { |
5386 | struct gendisk *disk = mddev->gendisk; | 5390 | struct gendisk *disk = mddev->gendisk; |
5387 | struct md_rdev *rdev; | 5391 | struct md_rdev *rdev; |
5388 | 5392 | ||
5389 | mutex_lock(&mddev->open_mutex); | 5393 | mutex_lock(&mddev->open_mutex); |
5390 | if (atomic_read(&mddev->openers) > is_open || | 5394 | if (atomic_read(&mddev->openers) > !!bdev || |
5391 | mddev->sysfs_active) { | 5395 | mddev->sysfs_active) { |
5392 | printk("md: %s still in use.\n",mdname(mddev)); | 5396 | printk("md: %s still in use.\n",mdname(mddev)); |
5393 | mutex_unlock(&mddev->open_mutex); | 5397 | mutex_unlock(&mddev->open_mutex); |
5394 | return -EBUSY; | 5398 | return -EBUSY; |
5395 | } | 5399 | } |
5400 | if (bdev) | ||
5401 | /* It is possible IO was issued on some other | ||
5402 | * open file which was closed before we took ->open_mutex. | ||
5403 | * As that was not the last close __blkdev_put will not | ||
5404 | * have called sync_blockdev, so we must. | ||
5405 | */ | ||
5406 | sync_blockdev(bdev); | ||
5396 | 5407 | ||
5397 | if (mddev->pers) { | 5408 | if (mddev->pers) { |
5398 | if (mddev->ro) | 5409 | if (mddev->ro) |
@@ -5466,7 +5477,7 @@ static void autorun_array(struct mddev *mddev) | |||
5466 | err = do_md_run(mddev); | 5477 | err = do_md_run(mddev); |
5467 | if (err) { | 5478 | if (err) { |
5468 | printk(KERN_WARNING "md: do_md_run() returned %d\n", err); | 5479 | printk(KERN_WARNING "md: do_md_run() returned %d\n", err); |
5469 | do_md_stop(mddev, 0, 0); | 5480 | do_md_stop(mddev, 0, NULL); |
5470 | } | 5481 | } |
5471 | } | 5482 | } |
5472 | 5483 | ||
@@ -6481,11 +6492,11 @@ static int md_ioctl(struct block_device *bdev, fmode_t mode, | |||
6481 | goto done_unlock; | 6492 | goto done_unlock; |
6482 | 6493 | ||
6483 | case STOP_ARRAY: | 6494 | case STOP_ARRAY: |
6484 | err = do_md_stop(mddev, 0, 1); | 6495 | err = do_md_stop(mddev, 0, bdev); |
6485 | goto done_unlock; | 6496 | goto done_unlock; |
6486 | 6497 | ||
6487 | case STOP_ARRAY_RO: | 6498 | case STOP_ARRAY_RO: |
6488 | err = md_set_readonly(mddev, 1); | 6499 | err = md_set_readonly(mddev, bdev); |
6489 | goto done_unlock; | 6500 | goto done_unlock; |
6490 | 6501 | ||
6491 | case BLKROSET: | 6502 | case BLKROSET: |
diff --git a/drivers/md/raid1.c b/drivers/md/raid1.c index 240ff3125040..cacd008d6864 100644 --- a/drivers/md/raid1.c +++ b/drivers/md/raid1.c | |||
@@ -1818,8 +1818,14 @@ static void sync_request_write(struct mddev *mddev, struct r1bio *r1_bio) | |||
1818 | 1818 | ||
1819 | if (atomic_dec_and_test(&r1_bio->remaining)) { | 1819 | if (atomic_dec_and_test(&r1_bio->remaining)) { |
1820 | /* if we're here, all write(s) have completed, so clean up */ | 1820 | /* if we're here, all write(s) have completed, so clean up */ |
1821 | md_done_sync(mddev, r1_bio->sectors, 1); | 1821 | int s = r1_bio->sectors; |
1822 | put_buf(r1_bio); | 1822 | if (test_bit(R1BIO_MadeGood, &r1_bio->state) || |
1823 | test_bit(R1BIO_WriteError, &r1_bio->state)) | ||
1824 | reschedule_retry(r1_bio); | ||
1825 | else { | ||
1826 | put_buf(r1_bio); | ||
1827 | md_done_sync(mddev, s, 1); | ||
1828 | } | ||
1823 | } | 1829 | } |
1824 | } | 1830 | } |
1825 | 1831 | ||
diff --git a/drivers/media/video/cx25821/cx25821-core.c b/drivers/media/video/cx25821/cx25821-core.c index 83c1aa6b2e6c..f11f6f07e915 100644 --- a/drivers/media/video/cx25821/cx25821-core.c +++ b/drivers/media/video/cx25821/cx25821-core.c | |||
@@ -904,9 +904,6 @@ static int cx25821_dev_setup(struct cx25821_dev *dev) | |||
904 | list_add_tail(&dev->devlist, &cx25821_devlist); | 904 | list_add_tail(&dev->devlist, &cx25821_devlist); |
905 | mutex_unlock(&cx25821_devlist_mutex); | 905 | mutex_unlock(&cx25821_devlist_mutex); |
906 | 906 | ||
907 | strcpy(cx25821_boards[UNKNOWN_BOARD].name, "unknown"); | ||
908 | strcpy(cx25821_boards[CX25821_BOARD].name, "cx25821"); | ||
909 | |||
910 | if (dev->pci->device != 0x8210) { | 907 | if (dev->pci->device != 0x8210) { |
911 | pr_info("%s(): Exiting. Incorrect Hardware device = 0x%02x\n", | 908 | pr_info("%s(): Exiting. Incorrect Hardware device = 0x%02x\n", |
912 | __func__, dev->pci->device); | 909 | __func__, dev->pci->device); |
diff --git a/drivers/media/video/cx25821/cx25821.h b/drivers/media/video/cx25821/cx25821.h index b9aa801b00a7..029f2934a6d8 100644 --- a/drivers/media/video/cx25821/cx25821.h +++ b/drivers/media/video/cx25821/cx25821.h | |||
@@ -187,7 +187,7 @@ enum port { | |||
187 | }; | 187 | }; |
188 | 188 | ||
189 | struct cx25821_board { | 189 | struct cx25821_board { |
190 | char *name; | 190 | const char *name; |
191 | enum port porta; | 191 | enum port porta; |
192 | enum port portb; | 192 | enum port portb; |
193 | enum port portc; | 193 | enum port portc; |
diff --git a/drivers/media/video/v4l2-dev.c b/drivers/media/video/v4l2-dev.c index 83dbb2ddff10..0cbada18f6f5 100644 --- a/drivers/media/video/v4l2-dev.c +++ b/drivers/media/video/v4l2-dev.c | |||
@@ -681,6 +681,7 @@ static void determine_valid_ioctls(struct video_device *vdev) | |||
681 | SET_VALID_IOCTL(ops, VIDIOC_G_DV_TIMINGS, vidioc_g_dv_timings); | 681 | SET_VALID_IOCTL(ops, VIDIOC_G_DV_TIMINGS, vidioc_g_dv_timings); |
682 | SET_VALID_IOCTL(ops, VIDIOC_ENUM_DV_TIMINGS, vidioc_enum_dv_timings); | 682 | SET_VALID_IOCTL(ops, VIDIOC_ENUM_DV_TIMINGS, vidioc_enum_dv_timings); |
683 | SET_VALID_IOCTL(ops, VIDIOC_QUERY_DV_TIMINGS, vidioc_query_dv_timings); | 683 | SET_VALID_IOCTL(ops, VIDIOC_QUERY_DV_TIMINGS, vidioc_query_dv_timings); |
684 | SET_VALID_IOCTL(ops, VIDIOC_DV_TIMINGS_CAP, vidioc_dv_timings_cap); | ||
684 | /* yes, really vidioc_subscribe_event */ | 685 | /* yes, really vidioc_subscribe_event */ |
685 | SET_VALID_IOCTL(ops, VIDIOC_DQEVENT, vidioc_subscribe_event); | 686 | SET_VALID_IOCTL(ops, VIDIOC_DQEVENT, vidioc_subscribe_event); |
686 | SET_VALID_IOCTL(ops, VIDIOC_SUBSCRIBE_EVENT, vidioc_subscribe_event); | 687 | SET_VALID_IOCTL(ops, VIDIOC_SUBSCRIBE_EVENT, vidioc_subscribe_event); |
diff --git a/drivers/net/bonding/bond_debugfs.c b/drivers/net/bonding/bond_debugfs.c index 3680aa251dea..2cf084eb9d52 100644 --- a/drivers/net/bonding/bond_debugfs.c +++ b/drivers/net/bonding/bond_debugfs.c | |||
@@ -6,7 +6,7 @@ | |||
6 | #include "bonding.h" | 6 | #include "bonding.h" |
7 | #include "bond_alb.h" | 7 | #include "bond_alb.h" |
8 | 8 | ||
9 | #ifdef CONFIG_DEBUG_FS | 9 | #if defined(CONFIG_DEBUG_FS) && !defined(CONFIG_NET_NS) |
10 | 10 | ||
11 | #include <linux/debugfs.h> | 11 | #include <linux/debugfs.h> |
12 | #include <linux/seq_file.h> | 12 | #include <linux/seq_file.h> |
diff --git a/drivers/net/bonding/bond_main.c b/drivers/net/bonding/bond_main.c index b9c2ae62166d..2ee76993f052 100644 --- a/drivers/net/bonding/bond_main.c +++ b/drivers/net/bonding/bond_main.c | |||
@@ -3227,6 +3227,12 @@ static int bond_master_netdev_event(unsigned long event, | |||
3227 | switch (event) { | 3227 | switch (event) { |
3228 | case NETDEV_CHANGENAME: | 3228 | case NETDEV_CHANGENAME: |
3229 | return bond_event_changename(event_bond); | 3229 | return bond_event_changename(event_bond); |
3230 | case NETDEV_UNREGISTER: | ||
3231 | bond_remove_proc_entry(event_bond); | ||
3232 | break; | ||
3233 | case NETDEV_REGISTER: | ||
3234 | bond_create_proc_entry(event_bond); | ||
3235 | break; | ||
3230 | default: | 3236 | default: |
3231 | break; | 3237 | break; |
3232 | } | 3238 | } |
@@ -4411,8 +4417,6 @@ static void bond_uninit(struct net_device *bond_dev) | |||
4411 | 4417 | ||
4412 | bond_work_cancel_all(bond); | 4418 | bond_work_cancel_all(bond); |
4413 | 4419 | ||
4414 | bond_remove_proc_entry(bond); | ||
4415 | |||
4416 | bond_debug_unregister(bond); | 4420 | bond_debug_unregister(bond); |
4417 | 4421 | ||
4418 | __hw_addr_flush(&bond->mc_list); | 4422 | __hw_addr_flush(&bond->mc_list); |
@@ -4814,7 +4818,6 @@ static int bond_init(struct net_device *bond_dev) | |||
4814 | 4818 | ||
4815 | bond_set_lockdep_class(bond_dev); | 4819 | bond_set_lockdep_class(bond_dev); |
4816 | 4820 | ||
4817 | bond_create_proc_entry(bond); | ||
4818 | list_add_tail(&bond->bond_list, &bn->dev_list); | 4821 | list_add_tail(&bond->bond_list, &bn->dev_list); |
4819 | 4822 | ||
4820 | bond_prepare_sysfs_group(bond); | 4823 | bond_prepare_sysfs_group(bond); |
diff --git a/drivers/net/ethernet/atheros/atl1c/atl1c_main.c b/drivers/net/ethernet/atheros/atl1c/atl1c_main.c index 9cc15701101b..1f78b63d5efe 100644 --- a/drivers/net/ethernet/atheros/atl1c/atl1c_main.c +++ b/drivers/net/ethernet/atheros/atl1c/atl1c_main.c | |||
@@ -261,7 +261,6 @@ static void atl1c_check_link_status(struct atl1c_adapter *adapter) | |||
261 | if ((phy_data & BMSR_LSTATUS) == 0) { | 261 | if ((phy_data & BMSR_LSTATUS) == 0) { |
262 | /* link down */ | 262 | /* link down */ |
263 | netif_carrier_off(netdev); | 263 | netif_carrier_off(netdev); |
264 | netif_stop_queue(netdev); | ||
265 | hw->hibernate = true; | 264 | hw->hibernate = true; |
266 | if (atl1c_reset_mac(hw) != 0) | 265 | if (atl1c_reset_mac(hw) != 0) |
267 | if (netif_msg_hw(adapter)) | 266 | if (netif_msg_hw(adapter)) |
diff --git a/drivers/net/ethernet/broadcom/b44.c b/drivers/net/ethernet/broadcom/b44.c index 46b8b7d81633..d09c6b583d17 100644 --- a/drivers/net/ethernet/broadcom/b44.c +++ b/drivers/net/ethernet/broadcom/b44.c | |||
@@ -656,7 +656,7 @@ static int b44_alloc_rx_skb(struct b44 *bp, int src_idx, u32 dest_idx_unmasked) | |||
656 | dma_unmap_single(bp->sdev->dma_dev, mapping, | 656 | dma_unmap_single(bp->sdev->dma_dev, mapping, |
657 | RX_PKT_BUF_SZ, DMA_FROM_DEVICE); | 657 | RX_PKT_BUF_SZ, DMA_FROM_DEVICE); |
658 | dev_kfree_skb_any(skb); | 658 | dev_kfree_skb_any(skb); |
659 | skb = __netdev_alloc_skb(bp->dev, RX_PKT_BUF_SZ, GFP_ATOMIC|GFP_DMA); | 659 | skb = alloc_skb(RX_PKT_BUF_SZ, GFP_ATOMIC | GFP_DMA); |
660 | if (skb == NULL) | 660 | if (skb == NULL) |
661 | return -ENOMEM; | 661 | return -ENOMEM; |
662 | mapping = dma_map_single(bp->sdev->dma_dev, skb->data, | 662 | mapping = dma_map_single(bp->sdev->dma_dev, skb->data, |
@@ -967,7 +967,7 @@ static netdev_tx_t b44_start_xmit(struct sk_buff *skb, struct net_device *dev) | |||
967 | dma_unmap_single(bp->sdev->dma_dev, mapping, len, | 967 | dma_unmap_single(bp->sdev->dma_dev, mapping, len, |
968 | DMA_TO_DEVICE); | 968 | DMA_TO_DEVICE); |
969 | 969 | ||
970 | bounce_skb = __netdev_alloc_skb(dev, len, GFP_ATOMIC | GFP_DMA); | 970 | bounce_skb = alloc_skb(len, GFP_ATOMIC | GFP_DMA); |
971 | if (!bounce_skb) | 971 | if (!bounce_skb) |
972 | goto err_out; | 972 | goto err_out; |
973 | 973 | ||
diff --git a/drivers/net/ethernet/broadcom/bnx2.c b/drivers/net/ethernet/broadcom/bnx2.c index ac7b74488531..1fa4927a45b1 100644 --- a/drivers/net/ethernet/broadcom/bnx2.c +++ b/drivers/net/ethernet/broadcom/bnx2.c | |||
@@ -5372,7 +5372,7 @@ bnx2_free_tx_skbs(struct bnx2 *bp) | |||
5372 | int k, last; | 5372 | int k, last; |
5373 | 5373 | ||
5374 | if (skb == NULL) { | 5374 | if (skb == NULL) { |
5375 | j++; | 5375 | j = NEXT_TX_BD(j); |
5376 | continue; | 5376 | continue; |
5377 | } | 5377 | } |
5378 | 5378 | ||
@@ -5384,8 +5384,8 @@ bnx2_free_tx_skbs(struct bnx2 *bp) | |||
5384 | tx_buf->skb = NULL; | 5384 | tx_buf->skb = NULL; |
5385 | 5385 | ||
5386 | last = tx_buf->nr_frags; | 5386 | last = tx_buf->nr_frags; |
5387 | j++; | 5387 | j = NEXT_TX_BD(j); |
5388 | for (k = 0; k < last; k++, j++) { | 5388 | for (k = 0; k < last; k++, j = NEXT_TX_BD(j)) { |
5389 | tx_buf = &txr->tx_buf_ring[TX_RING_IDX(j)]; | 5389 | tx_buf = &txr->tx_buf_ring[TX_RING_IDX(j)]; |
5390 | dma_unmap_page(&bp->pdev->dev, | 5390 | dma_unmap_page(&bp->pdev->dev, |
5391 | dma_unmap_addr(tx_buf, mapping), | 5391 | dma_unmap_addr(tx_buf, mapping), |
diff --git a/drivers/net/ethernet/broadcom/cnic.c b/drivers/net/ethernet/broadcom/cnic.c index c95e7b5e2b85..2c89d17cbb29 100644 --- a/drivers/net/ethernet/broadcom/cnic.c +++ b/drivers/net/ethernet/broadcom/cnic.c | |||
@@ -534,7 +534,8 @@ int cnic_unregister_driver(int ulp_type) | |||
534 | } | 534 | } |
535 | 535 | ||
536 | if (atomic_read(&ulp_ops->ref_count) != 0) | 536 | if (atomic_read(&ulp_ops->ref_count) != 0) |
537 | netdev_warn(dev->netdev, "Failed waiting for ref count to go to zero\n"); | 537 | pr_warn("%s: Failed waiting for ref count to go to zero\n", |
538 | __func__); | ||
538 | return 0; | 539 | return 0; |
539 | 540 | ||
540 | out_unlock: | 541 | out_unlock: |
@@ -1053,12 +1054,13 @@ static int cnic_init_uio(struct cnic_dev *dev) | |||
1053 | 1054 | ||
1054 | uinfo = &udev->cnic_uinfo; | 1055 | uinfo = &udev->cnic_uinfo; |
1055 | 1056 | ||
1056 | uinfo->mem[0].addr = dev->netdev->base_addr; | 1057 | uinfo->mem[0].addr = pci_resource_start(dev->pcidev, 0); |
1057 | uinfo->mem[0].internal_addr = dev->regview; | 1058 | uinfo->mem[0].internal_addr = dev->regview; |
1058 | uinfo->mem[0].size = dev->netdev->mem_end - dev->netdev->mem_start; | ||
1059 | uinfo->mem[0].memtype = UIO_MEM_PHYS; | 1059 | uinfo->mem[0].memtype = UIO_MEM_PHYS; |
1060 | 1060 | ||
1061 | if (test_bit(CNIC_F_BNX2_CLASS, &dev->flags)) { | 1061 | if (test_bit(CNIC_F_BNX2_CLASS, &dev->flags)) { |
1062 | uinfo->mem[0].size = MB_GET_CID_ADDR(TX_TSS_CID + | ||
1063 | TX_MAX_TSS_RINGS + 1); | ||
1062 | uinfo->mem[1].addr = (unsigned long) cp->status_blk.gen & | 1064 | uinfo->mem[1].addr = (unsigned long) cp->status_blk.gen & |
1063 | PAGE_MASK; | 1065 | PAGE_MASK; |
1064 | if (cp->ethdev->drv_state & CNIC_DRV_STATE_USING_MSIX) | 1066 | if (cp->ethdev->drv_state & CNIC_DRV_STATE_USING_MSIX) |
@@ -1068,6 +1070,8 @@ static int cnic_init_uio(struct cnic_dev *dev) | |||
1068 | 1070 | ||
1069 | uinfo->name = "bnx2_cnic"; | 1071 | uinfo->name = "bnx2_cnic"; |
1070 | } else if (test_bit(CNIC_F_BNX2X_CLASS, &dev->flags)) { | 1072 | } else if (test_bit(CNIC_F_BNX2X_CLASS, &dev->flags)) { |
1073 | uinfo->mem[0].size = pci_resource_len(dev->pcidev, 0); | ||
1074 | |||
1071 | uinfo->mem[1].addr = (unsigned long) cp->bnx2x_def_status_blk & | 1075 | uinfo->mem[1].addr = (unsigned long) cp->bnx2x_def_status_blk & |
1072 | PAGE_MASK; | 1076 | PAGE_MASK; |
1073 | uinfo->mem[1].size = sizeof(*cp->bnx2x_def_status_blk); | 1077 | uinfo->mem[1].size = sizeof(*cp->bnx2x_def_status_blk); |
diff --git a/drivers/net/ethernet/freescale/gianfar.c b/drivers/net/ethernet/freescale/gianfar.c index f2db8fca46a1..ab1d80ff0791 100644 --- a/drivers/net/ethernet/freescale/gianfar.c +++ b/drivers/net/ethernet/freescale/gianfar.c | |||
@@ -2063,10 +2063,9 @@ static int gfar_start_xmit(struct sk_buff *skb, struct net_device *dev) | |||
2063 | return NETDEV_TX_OK; | 2063 | return NETDEV_TX_OK; |
2064 | } | 2064 | } |
2065 | 2065 | ||
2066 | /* Steal sock reference for processing TX time stamps */ | 2066 | if (skb->sk) |
2067 | swap(skb_new->sk, skb->sk); | 2067 | skb_set_owner_w(skb_new, skb->sk); |
2068 | swap(skb_new->destructor, skb->destructor); | 2068 | consume_skb(skb); |
2069 | kfree_skb(skb); | ||
2070 | skb = skb_new; | 2069 | skb = skb_new; |
2071 | } | 2070 | } |
2072 | 2071 | ||
diff --git a/drivers/net/ethernet/intel/e1000e/82571.c b/drivers/net/ethernet/intel/e1000e/82571.c index 36db4df09aed..1f063dcd8f85 100644 --- a/drivers/net/ethernet/intel/e1000e/82571.c +++ b/drivers/net/ethernet/intel/e1000e/82571.c | |||
@@ -1572,6 +1572,9 @@ static s32 e1000_check_for_serdes_link_82571(struct e1000_hw *hw) | |||
1572 | ctrl = er32(CTRL); | 1572 | ctrl = er32(CTRL); |
1573 | status = er32(STATUS); | 1573 | status = er32(STATUS); |
1574 | rxcw = er32(RXCW); | 1574 | rxcw = er32(RXCW); |
1575 | /* SYNCH bit and IV bit are sticky */ | ||
1576 | udelay(10); | ||
1577 | rxcw = er32(RXCW); | ||
1575 | 1578 | ||
1576 | if ((rxcw & E1000_RXCW_SYNCH) && !(rxcw & E1000_RXCW_IV)) { | 1579 | if ((rxcw & E1000_RXCW_SYNCH) && !(rxcw & E1000_RXCW_IV)) { |
1577 | 1580 | ||
diff --git a/drivers/net/ethernet/intel/e1000e/ich8lan.c b/drivers/net/ethernet/intel/e1000e/ich8lan.c index 238ab2f8a5e7..e3a7b07df629 100644 --- a/drivers/net/ethernet/intel/e1000e/ich8lan.c +++ b/drivers/net/ethernet/intel/e1000e/ich8lan.c | |||
@@ -325,24 +325,46 @@ static inline void __ew32flash(struct e1000_hw *hw, unsigned long reg, u32 val) | |||
325 | **/ | 325 | **/ |
326 | static bool e1000_phy_is_accessible_pchlan(struct e1000_hw *hw) | 326 | static bool e1000_phy_is_accessible_pchlan(struct e1000_hw *hw) |
327 | { | 327 | { |
328 | u16 phy_reg; | 328 | u16 phy_reg = 0; |
329 | u32 phy_id; | 329 | u32 phy_id = 0; |
330 | s32 ret_val; | ||
331 | u16 retry_count; | ||
332 | |||
333 | for (retry_count = 0; retry_count < 2; retry_count++) { | ||
334 | ret_val = e1e_rphy_locked(hw, PHY_ID1, &phy_reg); | ||
335 | if (ret_val || (phy_reg == 0xFFFF)) | ||
336 | continue; | ||
337 | phy_id = (u32)(phy_reg << 16); | ||
330 | 338 | ||
331 | e1e_rphy_locked(hw, PHY_ID1, &phy_reg); | 339 | ret_val = e1e_rphy_locked(hw, PHY_ID2, &phy_reg); |
332 | phy_id = (u32)(phy_reg << 16); | 340 | if (ret_val || (phy_reg == 0xFFFF)) { |
333 | e1e_rphy_locked(hw, PHY_ID2, &phy_reg); | 341 | phy_id = 0; |
334 | phy_id |= (u32)(phy_reg & PHY_REVISION_MASK); | 342 | continue; |
343 | } | ||
344 | phy_id |= (u32)(phy_reg & PHY_REVISION_MASK); | ||
345 | break; | ||
346 | } | ||
335 | 347 | ||
336 | if (hw->phy.id) { | 348 | if (hw->phy.id) { |
337 | if (hw->phy.id == phy_id) | 349 | if (hw->phy.id == phy_id) |
338 | return true; | 350 | return true; |
339 | } else { | 351 | } else if (phy_id) { |
340 | if ((phy_id != 0) && (phy_id != PHY_REVISION_MASK)) | 352 | hw->phy.id = phy_id; |
341 | hw->phy.id = phy_id; | 353 | hw->phy.revision = (u32)(phy_reg & ~PHY_REVISION_MASK); |
342 | return true; | 354 | return true; |
343 | } | 355 | } |
344 | 356 | ||
345 | return false; | 357 | /* |
358 | * In case the PHY needs to be in mdio slow mode, | ||
359 | * set slow mode and try to get the PHY id again. | ||
360 | */ | ||
361 | hw->phy.ops.release(hw); | ||
362 | ret_val = e1000_set_mdio_slow_mode_hv(hw); | ||
363 | if (!ret_val) | ||
364 | ret_val = e1000e_get_phy_id(hw); | ||
365 | hw->phy.ops.acquire(hw); | ||
366 | |||
367 | return !ret_val; | ||
346 | } | 368 | } |
347 | 369 | ||
348 | /** | 370 | /** |
diff --git a/drivers/net/ethernet/intel/ixgbe/ixgbe_main.c b/drivers/net/ethernet/intel/ixgbe/ixgbe_main.c index 18ca3bcadf0c..e242104ab471 100644 --- a/drivers/net/ethernet/intel/ixgbe/ixgbe_main.c +++ b/drivers/net/ethernet/intel/ixgbe/ixgbe_main.c | |||
@@ -6647,6 +6647,11 @@ int ixgbe_setup_tc(struct net_device *dev, u8 tc) | |||
6647 | return -EINVAL; | 6647 | return -EINVAL; |
6648 | } | 6648 | } |
6649 | 6649 | ||
6650 | if (adapter->flags & IXGBE_FLAG_SRIOV_ENABLED) { | ||
6651 | e_err(drv, "Enable failed, SR-IOV enabled\n"); | ||
6652 | return -EINVAL; | ||
6653 | } | ||
6654 | |||
6650 | /* Hardware supports up to 8 traffic classes */ | 6655 | /* Hardware supports up to 8 traffic classes */ |
6651 | if (tc > adapter->dcb_cfg.num_tcs.pg_tcs || | 6656 | if (tc > adapter->dcb_cfg.num_tcs.pg_tcs || |
6652 | (hw->mac.type == ixgbe_mac_82598EB && | 6657 | (hw->mac.type == ixgbe_mac_82598EB && |
diff --git a/drivers/net/ethernet/intel/ixgbevf/ixgbevf_main.c b/drivers/net/ethernet/intel/ixgbevf/ixgbevf_main.c index f69ec4288b10..41e32257a4e8 100644 --- a/drivers/net/ethernet/intel/ixgbevf/ixgbevf_main.c +++ b/drivers/net/ethernet/intel/ixgbevf/ixgbevf_main.c | |||
@@ -201,6 +201,9 @@ static bool ixgbevf_clean_tx_irq(struct ixgbevf_adapter *adapter, | |||
201 | unsigned int i, eop, count = 0; | 201 | unsigned int i, eop, count = 0; |
202 | unsigned int total_bytes = 0, total_packets = 0; | 202 | unsigned int total_bytes = 0, total_packets = 0; |
203 | 203 | ||
204 | if (test_bit(__IXGBEVF_DOWN, &adapter->state)) | ||
205 | return true; | ||
206 | |||
204 | i = tx_ring->next_to_clean; | 207 | i = tx_ring->next_to_clean; |
205 | eop = tx_ring->tx_buffer_info[i].next_to_watch; | 208 | eop = tx_ring->tx_buffer_info[i].next_to_watch; |
206 | eop_desc = IXGBE_TX_DESC_ADV(*tx_ring, eop); | 209 | eop_desc = IXGBE_TX_DESC_ADV(*tx_ring, eop); |
@@ -969,8 +972,6 @@ static irqreturn_t ixgbevf_msix_clean_tx(int irq, void *data) | |||
969 | r_idx = find_first_bit(q_vector->txr_idx, adapter->num_tx_queues); | 972 | r_idx = find_first_bit(q_vector->txr_idx, adapter->num_tx_queues); |
970 | for (i = 0; i < q_vector->txr_count; i++) { | 973 | for (i = 0; i < q_vector->txr_count; i++) { |
971 | tx_ring = &(adapter->tx_ring[r_idx]); | 974 | tx_ring = &(adapter->tx_ring[r_idx]); |
972 | tx_ring->total_bytes = 0; | ||
973 | tx_ring->total_packets = 0; | ||
974 | ixgbevf_clean_tx_irq(adapter, tx_ring); | 975 | ixgbevf_clean_tx_irq(adapter, tx_ring); |
975 | r_idx = find_next_bit(q_vector->txr_idx, adapter->num_tx_queues, | 976 | r_idx = find_next_bit(q_vector->txr_idx, adapter->num_tx_queues, |
976 | r_idx + 1); | 977 | r_idx + 1); |
@@ -994,16 +995,6 @@ static irqreturn_t ixgbevf_msix_clean_rx(int irq, void *data) | |||
994 | struct ixgbe_hw *hw = &adapter->hw; | 995 | struct ixgbe_hw *hw = &adapter->hw; |
995 | struct ixgbevf_ring *rx_ring; | 996 | struct ixgbevf_ring *rx_ring; |
996 | int r_idx; | 997 | int r_idx; |
997 | int i; | ||
998 | |||
999 | r_idx = find_first_bit(q_vector->rxr_idx, adapter->num_rx_queues); | ||
1000 | for (i = 0; i < q_vector->rxr_count; i++) { | ||
1001 | rx_ring = &(adapter->rx_ring[r_idx]); | ||
1002 | rx_ring->total_bytes = 0; | ||
1003 | rx_ring->total_packets = 0; | ||
1004 | r_idx = find_next_bit(q_vector->rxr_idx, adapter->num_rx_queues, | ||
1005 | r_idx + 1); | ||
1006 | } | ||
1007 | 998 | ||
1008 | if (!q_vector->rxr_count) | 999 | if (!q_vector->rxr_count) |
1009 | return IRQ_HANDLED; | 1000 | return IRQ_HANDLED; |
diff --git a/drivers/net/ethernet/stmicro/stmmac/ring_mode.c b/drivers/net/ethernet/stmicro/stmmac/ring_mode.c index fb8377da1687..4b785e10f2ed 100644 --- a/drivers/net/ethernet/stmicro/stmmac/ring_mode.c +++ b/drivers/net/ethernet/stmicro/stmmac/ring_mode.c | |||
@@ -51,7 +51,7 @@ static unsigned int stmmac_jumbo_frm(void *p, struct sk_buff *skb, int csum) | |||
51 | desc->des3 = desc->des2 + BUF_SIZE_4KiB; | 51 | desc->des3 = desc->des2 + BUF_SIZE_4KiB; |
52 | priv->hw->desc->prepare_tx_desc(desc, 1, bmax, | 52 | priv->hw->desc->prepare_tx_desc(desc, 1, bmax, |
53 | csum); | 53 | csum); |
54 | 54 | wmb(); | |
55 | entry = (++priv->cur_tx) % txsize; | 55 | entry = (++priv->cur_tx) % txsize; |
56 | desc = priv->dma_tx + entry; | 56 | desc = priv->dma_tx + entry; |
57 | 57 | ||
@@ -59,6 +59,7 @@ static unsigned int stmmac_jumbo_frm(void *p, struct sk_buff *skb, int csum) | |||
59 | len, DMA_TO_DEVICE); | 59 | len, DMA_TO_DEVICE); |
60 | desc->des3 = desc->des2 + BUF_SIZE_4KiB; | 60 | desc->des3 = desc->des2 + BUF_SIZE_4KiB; |
61 | priv->hw->desc->prepare_tx_desc(desc, 0, len, csum); | 61 | priv->hw->desc->prepare_tx_desc(desc, 0, len, csum); |
62 | wmb(); | ||
62 | priv->hw->desc->set_tx_owner(desc); | 63 | priv->hw->desc->set_tx_owner(desc); |
63 | priv->tx_skbuff[entry] = NULL; | 64 | priv->tx_skbuff[entry] = NULL; |
64 | } else { | 65 | } else { |
diff --git a/drivers/net/ethernet/stmicro/stmmac/stmmac_main.c b/drivers/net/ethernet/stmicro/stmmac/stmmac_main.c index 51b3b68528ee..ea3003edde18 100644 --- a/drivers/net/ethernet/stmicro/stmmac/stmmac_main.c +++ b/drivers/net/ethernet/stmicro/stmmac/stmmac_main.c | |||
@@ -1212,6 +1212,7 @@ static netdev_tx_t stmmac_xmit(struct sk_buff *skb, struct net_device *dev) | |||
1212 | priv->hw->desc->prepare_tx_desc(desc, 0, len, csum_insertion); | 1212 | priv->hw->desc->prepare_tx_desc(desc, 0, len, csum_insertion); |
1213 | wmb(); | 1213 | wmb(); |
1214 | priv->hw->desc->set_tx_owner(desc); | 1214 | priv->hw->desc->set_tx_owner(desc); |
1215 | wmb(); | ||
1215 | } | 1216 | } |
1216 | 1217 | ||
1217 | /* Interrupt on completition only for the latest segment */ | 1218 | /* Interrupt on completition only for the latest segment */ |
@@ -1227,6 +1228,7 @@ static netdev_tx_t stmmac_xmit(struct sk_buff *skb, struct net_device *dev) | |||
1227 | 1228 | ||
1228 | /* To avoid raise condition */ | 1229 | /* To avoid raise condition */ |
1229 | priv->hw->desc->set_tx_owner(first); | 1230 | priv->hw->desc->set_tx_owner(first); |
1231 | wmb(); | ||
1230 | 1232 | ||
1231 | priv->cur_tx++; | 1233 | priv->cur_tx++; |
1232 | 1234 | ||
@@ -1290,6 +1292,7 @@ static inline void stmmac_rx_refill(struct stmmac_priv *priv) | |||
1290 | } | 1292 | } |
1291 | wmb(); | 1293 | wmb(); |
1292 | priv->hw->desc->set_rx_owner(p + entry); | 1294 | priv->hw->desc->set_rx_owner(p + entry); |
1295 | wmb(); | ||
1293 | } | 1296 | } |
1294 | } | 1297 | } |
1295 | 1298 | ||
diff --git a/drivers/net/phy/mdio-mux.c b/drivers/net/phy/mdio-mux.c index 39ea0674dcde..5c120189ec86 100644 --- a/drivers/net/phy/mdio-mux.c +++ b/drivers/net/phy/mdio-mux.c | |||
@@ -46,7 +46,13 @@ static int mdio_mux_read(struct mii_bus *bus, int phy_id, int regnum) | |||
46 | struct mdio_mux_parent_bus *pb = cb->parent; | 46 | struct mdio_mux_parent_bus *pb = cb->parent; |
47 | int r; | 47 | int r; |
48 | 48 | ||
49 | mutex_lock(&pb->mii_bus->mdio_lock); | 49 | /* In theory multiple mdio_mux could be stacked, thus creating |
50 | * more than a single level of nesting. But in practice, | ||
51 | * SINGLE_DEPTH_NESTING will cover the vast majority of use | ||
52 | * cases. We use it, instead of trying to handle the general | ||
53 | * case. | ||
54 | */ | ||
55 | mutex_lock_nested(&pb->mii_bus->mdio_lock, SINGLE_DEPTH_NESTING); | ||
50 | r = pb->switch_fn(pb->current_child, cb->bus_number, pb->switch_data); | 56 | r = pb->switch_fn(pb->current_child, cb->bus_number, pb->switch_data); |
51 | if (r) | 57 | if (r) |
52 | goto out; | 58 | goto out; |
@@ -71,7 +77,7 @@ static int mdio_mux_write(struct mii_bus *bus, int phy_id, | |||
71 | 77 | ||
72 | int r; | 78 | int r; |
73 | 79 | ||
74 | mutex_lock(&pb->mii_bus->mdio_lock); | 80 | mutex_lock_nested(&pb->mii_bus->mdio_lock, SINGLE_DEPTH_NESTING); |
75 | r = pb->switch_fn(pb->current_child, cb->bus_number, pb->switch_data); | 81 | r = pb->switch_fn(pb->current_child, cb->bus_number, pb->switch_data); |
76 | if (r) | 82 | if (r) |
77 | goto out; | 83 | goto out; |
diff --git a/drivers/net/usb/qmi_wwan.c b/drivers/net/usb/qmi_wwan.c index b01960fcfbc9..a051cedd64bd 100644 --- a/drivers/net/usb/qmi_wwan.c +++ b/drivers/net/usb/qmi_wwan.c | |||
@@ -346,6 +346,15 @@ static const struct driver_info qmi_wwan_force_int1 = { | |||
346 | .data = BIT(1), /* interface whitelist bitmap */ | 346 | .data = BIT(1), /* interface whitelist bitmap */ |
347 | }; | 347 | }; |
348 | 348 | ||
349 | static const struct driver_info qmi_wwan_force_int2 = { | ||
350 | .description = "Qualcomm WWAN/QMI device", | ||
351 | .flags = FLAG_WWAN, | ||
352 | .bind = qmi_wwan_bind_shared, | ||
353 | .unbind = qmi_wwan_unbind_shared, | ||
354 | .manage_power = qmi_wwan_manage_power, | ||
355 | .data = BIT(2), /* interface whitelist bitmap */ | ||
356 | }; | ||
357 | |||
349 | static const struct driver_info qmi_wwan_force_int3 = { | 358 | static const struct driver_info qmi_wwan_force_int3 = { |
350 | .description = "Qualcomm WWAN/QMI device", | 359 | .description = "Qualcomm WWAN/QMI device", |
351 | .flags = FLAG_WWAN, | 360 | .flags = FLAG_WWAN, |
@@ -498,6 +507,15 @@ static const struct usb_device_id products[] = { | |||
498 | .bInterfaceProtocol = 0xff, | 507 | .bInterfaceProtocol = 0xff, |
499 | .driver_info = (unsigned long)&qmi_wwan_force_int4, | 508 | .driver_info = (unsigned long)&qmi_wwan_force_int4, |
500 | }, | 509 | }, |
510 | { /* ZTE MF60 */ | ||
511 | .match_flags = USB_DEVICE_ID_MATCH_DEVICE | USB_DEVICE_ID_MATCH_INT_INFO, | ||
512 | .idVendor = 0x19d2, | ||
513 | .idProduct = 0x1402, | ||
514 | .bInterfaceClass = 0xff, | ||
515 | .bInterfaceSubClass = 0xff, | ||
516 | .bInterfaceProtocol = 0xff, | ||
517 | .driver_info = (unsigned long)&qmi_wwan_force_int2, | ||
518 | }, | ||
501 | { /* Sierra Wireless MC77xx in QMI mode */ | 519 | { /* Sierra Wireless MC77xx in QMI mode */ |
502 | .match_flags = USB_DEVICE_ID_MATCH_DEVICE | USB_DEVICE_ID_MATCH_INT_INFO, | 520 | .match_flags = USB_DEVICE_ID_MATCH_DEVICE | USB_DEVICE_ID_MATCH_INT_INFO, |
503 | .idVendor = 0x1199, | 521 | .idVendor = 0x1199, |
diff --git a/drivers/net/wireless/b43legacy/dma.c b/drivers/net/wireless/b43legacy/dma.c index f1f8bd09bd87..c8baf020c20f 100644 --- a/drivers/net/wireless/b43legacy/dma.c +++ b/drivers/net/wireless/b43legacy/dma.c | |||
@@ -1072,7 +1072,7 @@ static int dma_tx_fragment(struct b43legacy_dmaring *ring, | |||
1072 | meta->dmaaddr = map_descbuffer(ring, skb->data, skb->len, 1); | 1072 | meta->dmaaddr = map_descbuffer(ring, skb->data, skb->len, 1); |
1073 | /* create a bounce buffer in zone_dma on mapping failure. */ | 1073 | /* create a bounce buffer in zone_dma on mapping failure. */ |
1074 | if (b43legacy_dma_mapping_error(ring, meta->dmaaddr, skb->len, 1)) { | 1074 | if (b43legacy_dma_mapping_error(ring, meta->dmaaddr, skb->len, 1)) { |
1075 | bounce_skb = __dev_alloc_skb(skb->len, GFP_ATOMIC | GFP_DMA); | 1075 | bounce_skb = alloc_skb(skb->len, GFP_ATOMIC | GFP_DMA); |
1076 | if (!bounce_skb) { | 1076 | if (!bounce_skb) { |
1077 | ring->current_slot = old_top_slot; | 1077 | ring->current_slot = old_top_slot; |
1078 | ring->used_slots = old_used_slots; | 1078 | ring->used_slots = old_used_slots; |
diff --git a/drivers/net/wireless/iwlegacy/4965-mac.c b/drivers/net/wireless/iwlegacy/4965-mac.c index 509301a5e7e2..ff5d689e13f3 100644 --- a/drivers/net/wireless/iwlegacy/4965-mac.c +++ b/drivers/net/wireless/iwlegacy/4965-mac.c | |||
@@ -3405,7 +3405,7 @@ il4965_remove_dynamic_key(struct il_priv *il, | |||
3405 | return 0; | 3405 | return 0; |
3406 | } | 3406 | } |
3407 | 3407 | ||
3408 | if (il->stations[sta_id].sta.key.key_offset == WEP_INVALID_OFFSET) { | 3408 | if (il->stations[sta_id].sta.key.key_flags & STA_KEY_FLG_INVALID) { |
3409 | IL_WARN("Removing wrong key %d 0x%x\n", keyconf->keyidx, | 3409 | IL_WARN("Removing wrong key %d 0x%x\n", keyconf->keyidx, |
3410 | key_flags); | 3410 | key_flags); |
3411 | spin_unlock_irqrestore(&il->sta_lock, flags); | 3411 | spin_unlock_irqrestore(&il->sta_lock, flags); |
@@ -3420,7 +3420,7 @@ il4965_remove_dynamic_key(struct il_priv *il, | |||
3420 | memset(&il->stations[sta_id].sta.key, 0, sizeof(struct il4965_keyinfo)); | 3420 | memset(&il->stations[sta_id].sta.key, 0, sizeof(struct il4965_keyinfo)); |
3421 | il->stations[sta_id].sta.key.key_flags = | 3421 | il->stations[sta_id].sta.key.key_flags = |
3422 | STA_KEY_FLG_NO_ENC | STA_KEY_FLG_INVALID; | 3422 | STA_KEY_FLG_NO_ENC | STA_KEY_FLG_INVALID; |
3423 | il->stations[sta_id].sta.key.key_offset = WEP_INVALID_OFFSET; | 3423 | il->stations[sta_id].sta.key.key_offset = keyconf->hw_key_idx; |
3424 | il->stations[sta_id].sta.sta.modify_mask = STA_MODIFY_KEY_MASK; | 3424 | il->stations[sta_id].sta.sta.modify_mask = STA_MODIFY_KEY_MASK; |
3425 | il->stations[sta_id].sta.mode = STA_CONTROL_MODIFY_MSK; | 3425 | il->stations[sta_id].sta.mode = STA_CONTROL_MODIFY_MSK; |
3426 | 3426 | ||
diff --git a/drivers/net/wireless/iwlegacy/common.c b/drivers/net/wireless/iwlegacy/common.c index cbf2dc18341f..5d4807c2b56d 100644 --- a/drivers/net/wireless/iwlegacy/common.c +++ b/drivers/net/wireless/iwlegacy/common.c | |||
@@ -4767,14 +4767,12 @@ il_bg_watchdog(unsigned long data) | |||
4767 | return; | 4767 | return; |
4768 | 4768 | ||
4769 | /* monitor and check for other stuck queues */ | 4769 | /* monitor and check for other stuck queues */ |
4770 | if (il_is_any_associated(il)) { | 4770 | for (cnt = 0; cnt < il->hw_params.max_txq_num; cnt++) { |
4771 | for (cnt = 0; cnt < il->hw_params.max_txq_num; cnt++) { | 4771 | /* skip as we already checked the command queue */ |
4772 | /* skip as we already checked the command queue */ | 4772 | if (cnt == il->cmd_queue) |
4773 | if (cnt == il->cmd_queue) | 4773 | continue; |
4774 | continue; | 4774 | if (il_check_stuck_queue(il, cnt)) |
4775 | if (il_check_stuck_queue(il, cnt)) | 4775 | return; |
4776 | return; | ||
4777 | } | ||
4778 | } | 4776 | } |
4779 | 4777 | ||
4780 | mod_timer(&il->watchdog, | 4778 | mod_timer(&il->watchdog, |
diff --git a/drivers/net/wireless/mwifiex/cfg80211.c b/drivers/net/wireless/mwifiex/cfg80211.c index ce61b6fae1c9..5c7fd185373c 100644 --- a/drivers/net/wireless/mwifiex/cfg80211.c +++ b/drivers/net/wireless/mwifiex/cfg80211.c | |||
@@ -958,6 +958,7 @@ static int mwifiex_cfg80211_start_ap(struct wiphy *wiphy, | |||
958 | case NL80211_HIDDEN_SSID_ZERO_CONTENTS: | 958 | case NL80211_HIDDEN_SSID_ZERO_CONTENTS: |
959 | /* firmware doesn't support this type of hidden SSID */ | 959 | /* firmware doesn't support this type of hidden SSID */ |
960 | default: | 960 | default: |
961 | kfree(bss_cfg); | ||
961 | return -EINVAL; | 962 | return -EINVAL; |
962 | } | 963 | } |
963 | 964 | ||
diff --git a/drivers/net/wireless/rt2x00/rt2x00usb.c b/drivers/net/wireless/rt2x00/rt2x00usb.c index d357d1ed92f6..74ecc33fdd90 100644 --- a/drivers/net/wireless/rt2x00/rt2x00usb.c +++ b/drivers/net/wireless/rt2x00/rt2x00usb.c | |||
@@ -436,8 +436,8 @@ void rt2x00usb_kick_queue(struct data_queue *queue) | |||
436 | case QID_RX: | 436 | case QID_RX: |
437 | if (!rt2x00queue_full(queue)) | 437 | if (!rt2x00queue_full(queue)) |
438 | rt2x00queue_for_each_entry(queue, | 438 | rt2x00queue_for_each_entry(queue, |
439 | Q_INDEX_DONE, | ||
440 | Q_INDEX, | 439 | Q_INDEX, |
440 | Q_INDEX_DONE, | ||
441 | NULL, | 441 | NULL, |
442 | rt2x00usb_kick_rx_entry); | 442 | rt2x00usb_kick_rx_entry); |
443 | break; | 443 | break; |
diff --git a/drivers/oprofile/oprofile_perf.c b/drivers/oprofile/oprofile_perf.c index efc4b7f308cf..f3cfa0b9adfa 100644 --- a/drivers/oprofile/oprofile_perf.c +++ b/drivers/oprofile/oprofile_perf.c | |||
@@ -1,5 +1,6 @@ | |||
1 | /* | 1 | /* |
2 | * Copyright 2010 ARM Ltd. | 2 | * Copyright 2010 ARM Ltd. |
3 | * Copyright 2012 Advanced Micro Devices, Inc., Robert Richter | ||
3 | * | 4 | * |
4 | * Perf-events backend for OProfile. | 5 | * Perf-events backend for OProfile. |
5 | */ | 6 | */ |
@@ -25,7 +26,7 @@ static int oprofile_perf_enabled; | |||
25 | static DEFINE_MUTEX(oprofile_perf_mutex); | 26 | static DEFINE_MUTEX(oprofile_perf_mutex); |
26 | 27 | ||
27 | static struct op_counter_config *counter_config; | 28 | static struct op_counter_config *counter_config; |
28 | static struct perf_event **perf_events[NR_CPUS]; | 29 | static DEFINE_PER_CPU(struct perf_event **, perf_events); |
29 | static int num_counters; | 30 | static int num_counters; |
30 | 31 | ||
31 | /* | 32 | /* |
@@ -38,7 +39,7 @@ static void op_overflow_handler(struct perf_event *event, | |||
38 | u32 cpu = smp_processor_id(); | 39 | u32 cpu = smp_processor_id(); |
39 | 40 | ||
40 | for (id = 0; id < num_counters; ++id) | 41 | for (id = 0; id < num_counters; ++id) |
41 | if (perf_events[cpu][id] == event) | 42 | if (per_cpu(perf_events, cpu)[id] == event) |
42 | break; | 43 | break; |
43 | 44 | ||
44 | if (id != num_counters) | 45 | if (id != num_counters) |
@@ -74,7 +75,7 @@ static int op_create_counter(int cpu, int event) | |||
74 | { | 75 | { |
75 | struct perf_event *pevent; | 76 | struct perf_event *pevent; |
76 | 77 | ||
77 | if (!counter_config[event].enabled || perf_events[cpu][event]) | 78 | if (!counter_config[event].enabled || per_cpu(perf_events, cpu)[event]) |
78 | return 0; | 79 | return 0; |
79 | 80 | ||
80 | pevent = perf_event_create_kernel_counter(&counter_config[event].attr, | 81 | pevent = perf_event_create_kernel_counter(&counter_config[event].attr, |
@@ -91,18 +92,18 @@ static int op_create_counter(int cpu, int event) | |||
91 | return -EBUSY; | 92 | return -EBUSY; |
92 | } | 93 | } |
93 | 94 | ||
94 | perf_events[cpu][event] = pevent; | 95 | per_cpu(perf_events, cpu)[event] = pevent; |
95 | 96 | ||
96 | return 0; | 97 | return 0; |
97 | } | 98 | } |
98 | 99 | ||
99 | static void op_destroy_counter(int cpu, int event) | 100 | static void op_destroy_counter(int cpu, int event) |
100 | { | 101 | { |
101 | struct perf_event *pevent = perf_events[cpu][event]; | 102 | struct perf_event *pevent = per_cpu(perf_events, cpu)[event]; |
102 | 103 | ||
103 | if (pevent) { | 104 | if (pevent) { |
104 | perf_event_release_kernel(pevent); | 105 | perf_event_release_kernel(pevent); |
105 | perf_events[cpu][event] = NULL; | 106 | per_cpu(perf_events, cpu)[event] = NULL; |
106 | } | 107 | } |
107 | } | 108 | } |
108 | 109 | ||
@@ -257,12 +258,12 @@ void oprofile_perf_exit(void) | |||
257 | 258 | ||
258 | for_each_possible_cpu(cpu) { | 259 | for_each_possible_cpu(cpu) { |
259 | for (id = 0; id < num_counters; ++id) { | 260 | for (id = 0; id < num_counters; ++id) { |
260 | event = perf_events[cpu][id]; | 261 | event = per_cpu(perf_events, cpu)[id]; |
261 | if (event) | 262 | if (event) |
262 | perf_event_release_kernel(event); | 263 | perf_event_release_kernel(event); |
263 | } | 264 | } |
264 | 265 | ||
265 | kfree(perf_events[cpu]); | 266 | kfree(per_cpu(perf_events, cpu)); |
266 | } | 267 | } |
267 | 268 | ||
268 | kfree(counter_config); | 269 | kfree(counter_config); |
@@ -277,8 +278,6 @@ int __init oprofile_perf_init(struct oprofile_operations *ops) | |||
277 | if (ret) | 278 | if (ret) |
278 | return ret; | 279 | return ret; |
279 | 280 | ||
280 | memset(&perf_events, 0, sizeof(perf_events)); | ||
281 | |||
282 | num_counters = perf_num_counters(); | 281 | num_counters = perf_num_counters(); |
283 | if (num_counters <= 0) { | 282 | if (num_counters <= 0) { |
284 | pr_info("oprofile: no performance counters\n"); | 283 | pr_info("oprofile: no performance counters\n"); |
@@ -298,9 +297,9 @@ int __init oprofile_perf_init(struct oprofile_operations *ops) | |||
298 | } | 297 | } |
299 | 298 | ||
300 | for_each_possible_cpu(cpu) { | 299 | for_each_possible_cpu(cpu) { |
301 | perf_events[cpu] = kcalloc(num_counters, | 300 | per_cpu(perf_events, cpu) = kcalloc(num_counters, |
302 | sizeof(struct perf_event *), GFP_KERNEL); | 301 | sizeof(struct perf_event *), GFP_KERNEL); |
303 | if (!perf_events[cpu]) { | 302 | if (!per_cpu(perf_events, cpu)) { |
304 | pr_info("oprofile: failed to allocate %d perf events " | 303 | pr_info("oprofile: failed to allocate %d perf events " |
305 | "for cpu %d\n", num_counters, cpu); | 304 | "for cpu %d\n", num_counters, cpu); |
306 | ret = -ENOMEM; | 305 | ret = -ENOMEM; |
diff --git a/drivers/pinctrl/pinctrl-imx.c b/drivers/pinctrl/pinctrl-imx.c index dd6d93aa5334..90c837f469a6 100644 --- a/drivers/pinctrl/pinctrl-imx.c +++ b/drivers/pinctrl/pinctrl-imx.c | |||
@@ -474,7 +474,9 @@ static int __devinit imx_pinctrl_parse_groups(struct device_node *np, | |||
474 | grp->configs[j] = config & ~IMX_PAD_SION; | 474 | grp->configs[j] = config & ~IMX_PAD_SION; |
475 | } | 475 | } |
476 | 476 | ||
477 | #ifdef DEBUG | ||
477 | IMX_PMX_DUMP(info, grp->pins, grp->mux_mode, grp->configs, grp->npins); | 478 | IMX_PMX_DUMP(info, grp->pins, grp->mux_mode, grp->configs, grp->npins); |
479 | #endif | ||
478 | 480 | ||
479 | return 0; | 481 | return 0; |
480 | } | 482 | } |
diff --git a/drivers/pinctrl/pinctrl-imx6q.c b/drivers/pinctrl/pinctrl-imx6q.c index 7737d4d71a3c..e9bf71fbedca 100644 --- a/drivers/pinctrl/pinctrl-imx6q.c +++ b/drivers/pinctrl/pinctrl-imx6q.c | |||
@@ -1950,6 +1950,8 @@ static struct imx_pin_reg imx6q_pin_regs[] = { | |||
1950 | IMX_PIN_REG(MX6Q_PAD_SD2_DAT3, 0x0744, 0x035C, 5, 0x0000, 0), /* MX6Q_PAD_SD2_DAT3__GPIO_1_12 */ | 1950 | IMX_PIN_REG(MX6Q_PAD_SD2_DAT3, 0x0744, 0x035C, 5, 0x0000, 0), /* MX6Q_PAD_SD2_DAT3__GPIO_1_12 */ |
1951 | IMX_PIN_REG(MX6Q_PAD_SD2_DAT3, 0x0744, 0x035C, 6, 0x0000, 0), /* MX6Q_PAD_SD2_DAT3__SJC_DONE */ | 1951 | IMX_PIN_REG(MX6Q_PAD_SD2_DAT3, 0x0744, 0x035C, 6, 0x0000, 0), /* MX6Q_PAD_SD2_DAT3__SJC_DONE */ |
1952 | IMX_PIN_REG(MX6Q_PAD_SD2_DAT3, 0x0744, 0x035C, 7, 0x0000, 0), /* MX6Q_PAD_SD2_DAT3__ANATOP_TESTO_3 */ | 1952 | IMX_PIN_REG(MX6Q_PAD_SD2_DAT3, 0x0744, 0x035C, 7, 0x0000, 0), /* MX6Q_PAD_SD2_DAT3__ANATOP_TESTO_3 */ |
1953 | IMX_PIN_REG(MX6Q_PAD_ENET_RX_ER, 0x04EC, 0x01D8, 0, 0x0000, 0), /* MX6Q_PAD_ENET_RX_ER__ANATOP_USBOTG_ID */ | ||
1954 | IMX_PIN_REG(MX6Q_PAD_GPIO_1, 0x05F4, 0x0224, 3, 0x0000, 0), /* MX6Q_PAD_GPIO_1__ANATOP_USBOTG_ID */ | ||
1953 | }; | 1955 | }; |
1954 | 1956 | ||
1955 | /* Pad names for the pinmux subsystem */ | 1957 | /* Pad names for the pinmux subsystem */ |
diff --git a/drivers/platform/x86/ideapad-laptop.c b/drivers/platform/x86/ideapad-laptop.c index 4f20f8dd3d7c..17f6dfd8dbfb 100644 --- a/drivers/platform/x86/ideapad-laptop.c +++ b/drivers/platform/x86/ideapad-laptop.c | |||
@@ -694,10 +694,10 @@ MODULE_DEVICE_TABLE(acpi, ideapad_device_ids); | |||
694 | static int __devinit ideapad_acpi_add(struct acpi_device *adevice) | 694 | static int __devinit ideapad_acpi_add(struct acpi_device *adevice) |
695 | { | 695 | { |
696 | int ret, i; | 696 | int ret, i; |
697 | unsigned long cfg; | 697 | int cfg; |
698 | struct ideapad_private *priv; | 698 | struct ideapad_private *priv; |
699 | 699 | ||
700 | if (read_method_int(adevice->handle, "_CFG", (int *)&cfg)) | 700 | if (read_method_int(adevice->handle, "_CFG", &cfg)) |
701 | return -ENODEV; | 701 | return -ENODEV; |
702 | 702 | ||
703 | priv = kzalloc(sizeof(*priv), GFP_KERNEL); | 703 | priv = kzalloc(sizeof(*priv), GFP_KERNEL); |
@@ -721,7 +721,7 @@ static int __devinit ideapad_acpi_add(struct acpi_device *adevice) | |||
721 | goto input_failed; | 721 | goto input_failed; |
722 | 722 | ||
723 | for (i = 0; i < IDEAPAD_RFKILL_DEV_NUM; i++) { | 723 | for (i = 0; i < IDEAPAD_RFKILL_DEV_NUM; i++) { |
724 | if (test_bit(ideapad_rfk_data[i].cfgbit, &cfg)) | 724 | if (test_bit(ideapad_rfk_data[i].cfgbit, &priv->cfg)) |
725 | ideapad_register_rfkill(adevice, i); | 725 | ideapad_register_rfkill(adevice, i); |
726 | else | 726 | else |
727 | priv->rfk[i] = NULL; | 727 | priv->rfk[i] = NULL; |
diff --git a/drivers/platform/x86/intel_ips.c b/drivers/platform/x86/intel_ips.c index 0ffdb3cde2bb..9af4257d4901 100644 --- a/drivers/platform/x86/intel_ips.c +++ b/drivers/platform/x86/intel_ips.c | |||
@@ -72,6 +72,7 @@ | |||
72 | #include <linux/string.h> | 72 | #include <linux/string.h> |
73 | #include <linux/tick.h> | 73 | #include <linux/tick.h> |
74 | #include <linux/timer.h> | 74 | #include <linux/timer.h> |
75 | #include <linux/dmi.h> | ||
75 | #include <drm/i915_drm.h> | 76 | #include <drm/i915_drm.h> |
76 | #include <asm/msr.h> | 77 | #include <asm/msr.h> |
77 | #include <asm/processor.h> | 78 | #include <asm/processor.h> |
@@ -1485,6 +1486,24 @@ static DEFINE_PCI_DEVICE_TABLE(ips_id_table) = { | |||
1485 | 1486 | ||
1486 | MODULE_DEVICE_TABLE(pci, ips_id_table); | 1487 | MODULE_DEVICE_TABLE(pci, ips_id_table); |
1487 | 1488 | ||
1489 | static int ips_blacklist_callback(const struct dmi_system_id *id) | ||
1490 | { | ||
1491 | pr_info("Blacklisted intel_ips for %s\n", id->ident); | ||
1492 | return 1; | ||
1493 | } | ||
1494 | |||
1495 | static const struct dmi_system_id ips_blacklist[] = { | ||
1496 | { | ||
1497 | .callback = ips_blacklist_callback, | ||
1498 | .ident = "HP ProBook", | ||
1499 | .matches = { | ||
1500 | DMI_MATCH(DMI_SYS_VENDOR, "Hewlett-Packard"), | ||
1501 | DMI_MATCH(DMI_PRODUCT_NAME, "HP ProBook"), | ||
1502 | }, | ||
1503 | }, | ||
1504 | { } /* terminating entry */ | ||
1505 | }; | ||
1506 | |||
1488 | static int ips_probe(struct pci_dev *dev, const struct pci_device_id *id) | 1507 | static int ips_probe(struct pci_dev *dev, const struct pci_device_id *id) |
1489 | { | 1508 | { |
1490 | u64 platform_info; | 1509 | u64 platform_info; |
@@ -1494,6 +1513,9 @@ static int ips_probe(struct pci_dev *dev, const struct pci_device_id *id) | |||
1494 | u16 htshi, trc, trc_required_mask; | 1513 | u16 htshi, trc, trc_required_mask; |
1495 | u8 tse; | 1514 | u8 tse; |
1496 | 1515 | ||
1516 | if (dmi_check_system(ips_blacklist)) | ||
1517 | return -ENODEV; | ||
1518 | |||
1497 | ips = kzalloc(sizeof(struct ips_driver), GFP_KERNEL); | 1519 | ips = kzalloc(sizeof(struct ips_driver), GFP_KERNEL); |
1498 | if (!ips) | 1520 | if (!ips) |
1499 | return -ENOMEM; | 1521 | return -ENOMEM; |
diff --git a/drivers/platform/x86/sony-laptop.c b/drivers/platform/x86/sony-laptop.c index 210d4ae547c2..d456ff0c73b7 100644 --- a/drivers/platform/x86/sony-laptop.c +++ b/drivers/platform/x86/sony-laptop.c | |||
@@ -973,7 +973,7 @@ static ssize_t sony_nc_sysfs_store(struct device *dev, | |||
973 | struct device_attribute *attr, | 973 | struct device_attribute *attr, |
974 | const char *buffer, size_t count) | 974 | const char *buffer, size_t count) |
975 | { | 975 | { |
976 | unsigned long value = 0; | 976 | int value; |
977 | int ret = 0; | 977 | int ret = 0; |
978 | struct sony_nc_value *item = | 978 | struct sony_nc_value *item = |
979 | container_of(attr, struct sony_nc_value, devattr); | 979 | container_of(attr, struct sony_nc_value, devattr); |
@@ -984,7 +984,7 @@ static ssize_t sony_nc_sysfs_store(struct device *dev, | |||
984 | if (count > 31) | 984 | if (count > 31) |
985 | return -EINVAL; | 985 | return -EINVAL; |
986 | 986 | ||
987 | if (kstrtoul(buffer, 10, &value)) | 987 | if (kstrtoint(buffer, 10, &value)) |
988 | return -EINVAL; | 988 | return -EINVAL; |
989 | 989 | ||
990 | if (item->validate) | 990 | if (item->validate) |
@@ -994,7 +994,7 @@ static ssize_t sony_nc_sysfs_store(struct device *dev, | |||
994 | return value; | 994 | return value; |
995 | 995 | ||
996 | ret = sony_nc_int_call(sony_nc_acpi_handle, *item->acpiset, | 996 | ret = sony_nc_int_call(sony_nc_acpi_handle, *item->acpiset, |
997 | (int *)&value, NULL); | 997 | &value, NULL); |
998 | if (ret < 0) | 998 | if (ret < 0) |
999 | return -EIO; | 999 | return -EIO; |
1000 | 1000 | ||
@@ -1010,6 +1010,7 @@ static ssize_t sony_nc_sysfs_store(struct device *dev, | |||
1010 | struct sony_backlight_props { | 1010 | struct sony_backlight_props { |
1011 | struct backlight_device *dev; | 1011 | struct backlight_device *dev; |
1012 | int handle; | 1012 | int handle; |
1013 | int cmd_base; | ||
1013 | u8 offset; | 1014 | u8 offset; |
1014 | u8 maxlvl; | 1015 | u8 maxlvl; |
1015 | }; | 1016 | }; |
@@ -1037,7 +1038,7 @@ static int sony_nc_get_brightness_ng(struct backlight_device *bd) | |||
1037 | struct sony_backlight_props *sdev = | 1038 | struct sony_backlight_props *sdev = |
1038 | (struct sony_backlight_props *)bl_get_data(bd); | 1039 | (struct sony_backlight_props *)bl_get_data(bd); |
1039 | 1040 | ||
1040 | sony_call_snc_handle(sdev->handle, 0x0200, &result); | 1041 | sony_call_snc_handle(sdev->handle, sdev->cmd_base + 0x100, &result); |
1041 | 1042 | ||
1042 | return (result & 0xff) - sdev->offset; | 1043 | return (result & 0xff) - sdev->offset; |
1043 | } | 1044 | } |
@@ -1049,7 +1050,8 @@ static int sony_nc_update_status_ng(struct backlight_device *bd) | |||
1049 | (struct sony_backlight_props *)bl_get_data(bd); | 1050 | (struct sony_backlight_props *)bl_get_data(bd); |
1050 | 1051 | ||
1051 | value = bd->props.brightness + sdev->offset; | 1052 | value = bd->props.brightness + sdev->offset; |
1052 | if (sony_call_snc_handle(sdev->handle, 0x0100 | (value << 16), &result)) | 1053 | if (sony_call_snc_handle(sdev->handle, sdev->cmd_base | (value << 0x10), |
1054 | &result)) | ||
1053 | return -EIO; | 1055 | return -EIO; |
1054 | 1056 | ||
1055 | return value; | 1057 | return value; |
@@ -1172,6 +1174,11 @@ static int sony_nc_hotkeys_decode(u32 event, unsigned int handle) | |||
1172 | /* | 1174 | /* |
1173 | * ACPI callbacks | 1175 | * ACPI callbacks |
1174 | */ | 1176 | */ |
1177 | enum event_types { | ||
1178 | HOTKEY = 1, | ||
1179 | KILLSWITCH, | ||
1180 | GFX_SWITCH | ||
1181 | }; | ||
1175 | static void sony_nc_notify(struct acpi_device *device, u32 event) | 1182 | static void sony_nc_notify(struct acpi_device *device, u32 event) |
1176 | { | 1183 | { |
1177 | u32 real_ev = event; | 1184 | u32 real_ev = event; |
@@ -1196,7 +1203,7 @@ static void sony_nc_notify(struct acpi_device *device, u32 event) | |||
1196 | /* hotkey event */ | 1203 | /* hotkey event */ |
1197 | case 0x0100: | 1204 | case 0x0100: |
1198 | case 0x0127: | 1205 | case 0x0127: |
1199 | ev_type = 1; | 1206 | ev_type = HOTKEY; |
1200 | real_ev = sony_nc_hotkeys_decode(event, handle); | 1207 | real_ev = sony_nc_hotkeys_decode(event, handle); |
1201 | 1208 | ||
1202 | if (real_ev > 0) | 1209 | if (real_ev > 0) |
@@ -1216,7 +1223,7 @@ static void sony_nc_notify(struct acpi_device *device, u32 event) | |||
1216 | * update the rfkill device status when the | 1223 | * update the rfkill device status when the |
1217 | * switch is moved. | 1224 | * switch is moved. |
1218 | */ | 1225 | */ |
1219 | ev_type = 2; | 1226 | ev_type = KILLSWITCH; |
1220 | sony_call_snc_handle(handle, 0x0100, &result); | 1227 | sony_call_snc_handle(handle, 0x0100, &result); |
1221 | real_ev = result & 0x03; | 1228 | real_ev = result & 0x03; |
1222 | 1229 | ||
@@ -1226,6 +1233,24 @@ static void sony_nc_notify(struct acpi_device *device, u32 event) | |||
1226 | 1233 | ||
1227 | break; | 1234 | break; |
1228 | 1235 | ||
1236 | case 0x0128: | ||
1237 | case 0x0146: | ||
1238 | /* Hybrid GFX switching */ | ||
1239 | sony_call_snc_handle(handle, 0x0000, &result); | ||
1240 | dprintk("GFX switch event received (reason: %s)\n", | ||
1241 | (result & 0x01) ? | ||
1242 | "switch change" : "unknown"); | ||
1243 | |||
1244 | /* verify the switch state | ||
1245 | * 1: discrete GFX | ||
1246 | * 0: integrated GFX | ||
1247 | */ | ||
1248 | sony_call_snc_handle(handle, 0x0100, &result); | ||
1249 | |||
1250 | ev_type = GFX_SWITCH; | ||
1251 | real_ev = result & 0xff; | ||
1252 | break; | ||
1253 | |||
1229 | default: | 1254 | default: |
1230 | dprintk("Unknown event 0x%x for handle 0x%x\n", | 1255 | dprintk("Unknown event 0x%x for handle 0x%x\n", |
1231 | event, handle); | 1256 | event, handle); |
@@ -1238,7 +1263,7 @@ static void sony_nc_notify(struct acpi_device *device, u32 event) | |||
1238 | 1263 | ||
1239 | } else { | 1264 | } else { |
1240 | /* old style event */ | 1265 | /* old style event */ |
1241 | ev_type = 1; | 1266 | ev_type = HOTKEY; |
1242 | sony_laptop_report_input_event(real_ev); | 1267 | sony_laptop_report_input_event(real_ev); |
1243 | } | 1268 | } |
1244 | 1269 | ||
@@ -1893,32 +1918,33 @@ static ssize_t sony_nc_battery_care_limit_store(struct device *dev, | |||
1893 | * bits 4,5: store the limit into the EC | 1918 | * bits 4,5: store the limit into the EC |
1894 | * bits 6,7: store the limit into the battery | 1919 | * bits 6,7: store the limit into the battery |
1895 | */ | 1920 | */ |
1921 | cmd = 0; | ||
1896 | 1922 | ||
1897 | /* | 1923 | if (value > 0) { |
1898 | * handle 0x0115 should allow storing on battery too; | 1924 | if (value <= 50) |
1899 | * handle 0x0136 same as 0x0115 + health status; | 1925 | cmd = 0x20; |
1900 | * handle 0x013f, same as 0x0136 but no storing on the battery | ||
1901 | * | ||
1902 | * Store only inside the EC for now, regardless the handle number | ||
1903 | */ | ||
1904 | if (value == 0) | ||
1905 | /* disable limits */ | ||
1906 | cmd = 0x0; | ||
1907 | 1926 | ||
1908 | else if (value <= 50) | 1927 | else if (value <= 80) |
1909 | cmd = 0x21; | 1928 | cmd = 0x10; |
1910 | 1929 | ||
1911 | else if (value <= 80) | 1930 | else if (value <= 100) |
1912 | cmd = 0x11; | 1931 | cmd = 0x30; |
1913 | 1932 | ||
1914 | else if (value <= 100) | 1933 | else |
1915 | cmd = 0x31; | 1934 | return -EINVAL; |
1916 | 1935 | ||
1917 | else | 1936 | /* |
1918 | return -EINVAL; | 1937 | * handle 0x0115 should allow storing on battery too; |
1938 | * handle 0x0136 same as 0x0115 + health status; | ||
1939 | * handle 0x013f, same as 0x0136 but no storing on the battery | ||
1940 | */ | ||
1941 | if (bcare_ctl->handle != 0x013f) | ||
1942 | cmd = cmd | (cmd << 2); | ||
1919 | 1943 | ||
1920 | if (sony_call_snc_handle(bcare_ctl->handle, (cmd << 0x10) | 0x0100, | 1944 | cmd = (cmd | 0x1) << 0x10; |
1921 | &result)) | 1945 | } |
1946 | |||
1947 | if (sony_call_snc_handle(bcare_ctl->handle, cmd | 0x0100, &result)) | ||
1922 | return -EIO; | 1948 | return -EIO; |
1923 | 1949 | ||
1924 | return count; | 1950 | return count; |
@@ -2113,7 +2139,7 @@ static ssize_t sony_nc_thermal_mode_show(struct device *dev, | |||
2113 | struct device_attribute *attr, char *buffer) | 2139 | struct device_attribute *attr, char *buffer) |
2114 | { | 2140 | { |
2115 | ssize_t count = 0; | 2141 | ssize_t count = 0; |
2116 | unsigned int mode = sony_nc_thermal_mode_get(); | 2142 | int mode = sony_nc_thermal_mode_get(); |
2117 | 2143 | ||
2118 | if (mode < 0) | 2144 | if (mode < 0) |
2119 | return mode; | 2145 | return mode; |
@@ -2472,6 +2498,7 @@ static void sony_nc_backlight_ng_read_limits(int handle, | |||
2472 | { | 2498 | { |
2473 | u64 offset; | 2499 | u64 offset; |
2474 | int i; | 2500 | int i; |
2501 | int lvl_table_len = 0; | ||
2475 | u8 min = 0xff, max = 0x00; | 2502 | u8 min = 0xff, max = 0x00; |
2476 | unsigned char buffer[32] = { 0 }; | 2503 | unsigned char buffer[32] = { 0 }; |
2477 | 2504 | ||
@@ -2480,8 +2507,6 @@ static void sony_nc_backlight_ng_read_limits(int handle, | |||
2480 | props->maxlvl = 0xff; | 2507 | props->maxlvl = 0xff; |
2481 | 2508 | ||
2482 | offset = sony_find_snc_handle(handle); | 2509 | offset = sony_find_snc_handle(handle); |
2483 | if (offset < 0) | ||
2484 | return; | ||
2485 | 2510 | ||
2486 | /* try to read the boundaries from ACPI tables, if we fail the above | 2511 | /* try to read the boundaries from ACPI tables, if we fail the above |
2487 | * defaults should be reasonable | 2512 | * defaults should be reasonable |
@@ -2491,11 +2516,21 @@ static void sony_nc_backlight_ng_read_limits(int handle, | |||
2491 | if (i < 0) | 2516 | if (i < 0) |
2492 | return; | 2517 | return; |
2493 | 2518 | ||
2519 | switch (handle) { | ||
2520 | case 0x012f: | ||
2521 | case 0x0137: | ||
2522 | lvl_table_len = 9; | ||
2523 | break; | ||
2524 | case 0x143: | ||
2525 | lvl_table_len = 16; | ||
2526 | break; | ||
2527 | } | ||
2528 | |||
2494 | /* the buffer lists brightness levels available, brightness levels are | 2529 | /* the buffer lists brightness levels available, brightness levels are |
2495 | * from position 0 to 8 in the array, other values are used by ALS | 2530 | * from position 0 to 8 in the array, other values are used by ALS |
2496 | * control. | 2531 | * control. |
2497 | */ | 2532 | */ |
2498 | for (i = 0; i < 9 && i < ARRAY_SIZE(buffer); i++) { | 2533 | for (i = 0; i < lvl_table_len && i < ARRAY_SIZE(buffer); i++) { |
2499 | 2534 | ||
2500 | dprintk("Brightness level: %d\n", buffer[i]); | 2535 | dprintk("Brightness level: %d\n", buffer[i]); |
2501 | 2536 | ||
@@ -2520,16 +2555,24 @@ static void sony_nc_backlight_setup(void) | |||
2520 | const struct backlight_ops *ops = NULL; | 2555 | const struct backlight_ops *ops = NULL; |
2521 | struct backlight_properties props; | 2556 | struct backlight_properties props; |
2522 | 2557 | ||
2523 | if (sony_find_snc_handle(0x12f) != -1) { | 2558 | if (sony_find_snc_handle(0x12f) >= 0) { |
2524 | ops = &sony_backlight_ng_ops; | 2559 | ops = &sony_backlight_ng_ops; |
2560 | sony_bl_props.cmd_base = 0x0100; | ||
2525 | sony_nc_backlight_ng_read_limits(0x12f, &sony_bl_props); | 2561 | sony_nc_backlight_ng_read_limits(0x12f, &sony_bl_props); |
2526 | max_brightness = sony_bl_props.maxlvl - sony_bl_props.offset; | 2562 | max_brightness = sony_bl_props.maxlvl - sony_bl_props.offset; |
2527 | 2563 | ||
2528 | } else if (sony_find_snc_handle(0x137) != -1) { | 2564 | } else if (sony_find_snc_handle(0x137) >= 0) { |
2529 | ops = &sony_backlight_ng_ops; | 2565 | ops = &sony_backlight_ng_ops; |
2566 | sony_bl_props.cmd_base = 0x0100; | ||
2530 | sony_nc_backlight_ng_read_limits(0x137, &sony_bl_props); | 2567 | sony_nc_backlight_ng_read_limits(0x137, &sony_bl_props); |
2531 | max_brightness = sony_bl_props.maxlvl - sony_bl_props.offset; | 2568 | max_brightness = sony_bl_props.maxlvl - sony_bl_props.offset; |
2532 | 2569 | ||
2570 | } else if (sony_find_snc_handle(0x143) >= 0) { | ||
2571 | ops = &sony_backlight_ng_ops; | ||
2572 | sony_bl_props.cmd_base = 0x3000; | ||
2573 | sony_nc_backlight_ng_read_limits(0x143, &sony_bl_props); | ||
2574 | max_brightness = sony_bl_props.maxlvl - sony_bl_props.offset; | ||
2575 | |||
2533 | } else if (ACPI_SUCCESS(acpi_get_handle(sony_nc_acpi_handle, "GBRT", | 2576 | } else if (ACPI_SUCCESS(acpi_get_handle(sony_nc_acpi_handle, "GBRT", |
2534 | &unused))) { | 2577 | &unused))) { |
2535 | ops = &sony_backlight_ops; | 2578 | ops = &sony_backlight_ops; |
@@ -2597,6 +2640,12 @@ static int sony_nc_add(struct acpi_device *device) | |||
2597 | } | 2640 | } |
2598 | } | 2641 | } |
2599 | 2642 | ||
2643 | result = sony_laptop_setup_input(device); | ||
2644 | if (result) { | ||
2645 | pr_err("Unable to create input devices\n"); | ||
2646 | goto outplatform; | ||
2647 | } | ||
2648 | |||
2600 | if (ACPI_SUCCESS(acpi_get_handle(sony_nc_acpi_handle, "ECON", | 2649 | if (ACPI_SUCCESS(acpi_get_handle(sony_nc_acpi_handle, "ECON", |
2601 | &handle))) { | 2650 | &handle))) { |
2602 | int arg = 1; | 2651 | int arg = 1; |
@@ -2614,12 +2663,6 @@ static int sony_nc_add(struct acpi_device *device) | |||
2614 | } | 2663 | } |
2615 | 2664 | ||
2616 | /* setup input devices and helper fifo */ | 2665 | /* setup input devices and helper fifo */ |
2617 | result = sony_laptop_setup_input(device); | ||
2618 | if (result) { | ||
2619 | pr_err("Unable to create input devices\n"); | ||
2620 | goto outsnc; | ||
2621 | } | ||
2622 | |||
2623 | if (acpi_video_backlight_support()) { | 2666 | if (acpi_video_backlight_support()) { |
2624 | pr_info("brightness ignored, must be controlled by ACPI video driver\n"); | 2667 | pr_info("brightness ignored, must be controlled by ACPI video driver\n"); |
2625 | } else { | 2668 | } else { |
@@ -2667,22 +2710,21 @@ static int sony_nc_add(struct acpi_device *device) | |||
2667 | 2710 | ||
2668 | return 0; | 2711 | return 0; |
2669 | 2712 | ||
2670 | out_sysfs: | 2713 | out_sysfs: |
2671 | for (item = sony_nc_values; item->name; ++item) { | 2714 | for (item = sony_nc_values; item->name; ++item) { |
2672 | device_remove_file(&sony_pf_device->dev, &item->devattr); | 2715 | device_remove_file(&sony_pf_device->dev, &item->devattr); |
2673 | } | 2716 | } |
2674 | sony_nc_backlight_cleanup(); | 2717 | sony_nc_backlight_cleanup(); |
2675 | |||
2676 | sony_laptop_remove_input(); | ||
2677 | |||
2678 | outsnc: | ||
2679 | sony_nc_function_cleanup(sony_pf_device); | 2718 | sony_nc_function_cleanup(sony_pf_device); |
2680 | sony_nc_handles_cleanup(sony_pf_device); | 2719 | sony_nc_handles_cleanup(sony_pf_device); |
2681 | 2720 | ||
2682 | outpresent: | 2721 | outplatform: |
2722 | sony_laptop_remove_input(); | ||
2723 | |||
2724 | outpresent: | ||
2683 | sony_pf_remove(); | 2725 | sony_pf_remove(); |
2684 | 2726 | ||
2685 | outwalk: | 2727 | outwalk: |
2686 | sony_nc_rfkill_cleanup(); | 2728 | sony_nc_rfkill_cleanup(); |
2687 | return result; | 2729 | return result; |
2688 | } | 2730 | } |
diff --git a/drivers/rpmsg/virtio_rpmsg_bus.c b/drivers/rpmsg/virtio_rpmsg_bus.c index 39d3aa41adda..f56c8ba3a861 100644 --- a/drivers/rpmsg/virtio_rpmsg_bus.c +++ b/drivers/rpmsg/virtio_rpmsg_bus.c | |||
@@ -1085,7 +1085,7 @@ static int __init rpmsg_init(void) | |||
1085 | 1085 | ||
1086 | return ret; | 1086 | return ret; |
1087 | } | 1087 | } |
1088 | module_init(rpmsg_init); | 1088 | subsys_initcall(rpmsg_init); |
1089 | 1089 | ||
1090 | static void __exit rpmsg_fini(void) | 1090 | static void __exit rpmsg_fini(void) |
1091 | { | 1091 | { |
diff --git a/drivers/scsi/scsi_wait_scan.c b/drivers/scsi/scsi_wait_scan.c index ae7814874618..072734538876 100644 --- a/drivers/scsi/scsi_wait_scan.c +++ b/drivers/scsi/scsi_wait_scan.c | |||
@@ -22,11 +22,6 @@ static int __init wait_scan_init(void) | |||
22 | * and might not yet have reached the scsi async scanning | 22 | * and might not yet have reached the scsi async scanning |
23 | */ | 23 | */ |
24 | wait_for_device_probe(); | 24 | wait_for_device_probe(); |
25 | /* | ||
26 | * and then we wait for the actual asynchronous scsi scan | ||
27 | * to finish. | ||
28 | */ | ||
29 | scsi_complete_async_scans(); | ||
30 | return 0; | 25 | return 0; |
31 | } | 26 | } |
32 | 27 | ||
diff --git a/drivers/target/target_core_cdb.c b/drivers/target/target_core_cdb.c index 9888693a18fe..664f6e775d0e 100644 --- a/drivers/target/target_core_cdb.c +++ b/drivers/target/target_core_cdb.c | |||
@@ -1095,7 +1095,7 @@ int target_emulate_write_same(struct se_cmd *cmd) | |||
1095 | if (num_blocks != 0) | 1095 | if (num_blocks != 0) |
1096 | range = num_blocks; | 1096 | range = num_blocks; |
1097 | else | 1097 | else |
1098 | range = (dev->transport->get_blocks(dev) - lba); | 1098 | range = (dev->transport->get_blocks(dev) - lba) + 1; |
1099 | 1099 | ||
1100 | pr_debug("WRITE_SAME UNMAP: LBA: %llu Range: %llu\n", | 1100 | pr_debug("WRITE_SAME UNMAP: LBA: %llu Range: %llu\n", |
1101 | (unsigned long long)lba, (unsigned long long)range); | 1101 | (unsigned long long)lba, (unsigned long long)range); |
diff --git a/drivers/target/target_core_pr.c b/drivers/target/target_core_pr.c index 85564998500a..a1bcd927a9e6 100644 --- a/drivers/target/target_core_pr.c +++ b/drivers/target/target_core_pr.c | |||
@@ -2031,7 +2031,7 @@ static int __core_scsi3_write_aptpl_to_file( | |||
2031 | if (IS_ERR(file) || !file || !file->f_dentry) { | 2031 | if (IS_ERR(file) || !file || !file->f_dentry) { |
2032 | pr_err("filp_open(%s) for APTPL metadata" | 2032 | pr_err("filp_open(%s) for APTPL metadata" |
2033 | " failed\n", path); | 2033 | " failed\n", path); |
2034 | return (PTR_ERR(file) < 0 ? PTR_ERR(file) : -ENOENT); | 2034 | return IS_ERR(file) ? PTR_ERR(file) : -ENOENT; |
2035 | } | 2035 | } |
2036 | 2036 | ||
2037 | iov[0].iov_base = &buf[0]; | 2037 | iov[0].iov_base = &buf[0]; |
@@ -3818,7 +3818,7 @@ int target_scsi3_emulate_pr_out(struct se_cmd *cmd) | |||
3818 | " SPC-2 reservation is held, returning" | 3818 | " SPC-2 reservation is held, returning" |
3819 | " RESERVATION_CONFLICT\n"); | 3819 | " RESERVATION_CONFLICT\n"); |
3820 | cmd->scsi_sense_reason = TCM_RESERVATION_CONFLICT; | 3820 | cmd->scsi_sense_reason = TCM_RESERVATION_CONFLICT; |
3821 | ret = EINVAL; | 3821 | ret = -EINVAL; |
3822 | goto out; | 3822 | goto out; |
3823 | } | 3823 | } |
3824 | 3824 | ||
@@ -3828,7 +3828,8 @@ int target_scsi3_emulate_pr_out(struct se_cmd *cmd) | |||
3828 | */ | 3828 | */ |
3829 | if (!cmd->se_sess) { | 3829 | if (!cmd->se_sess) { |
3830 | cmd->scsi_sense_reason = TCM_LOGICAL_UNIT_COMMUNICATION_FAILURE; | 3830 | cmd->scsi_sense_reason = TCM_LOGICAL_UNIT_COMMUNICATION_FAILURE; |
3831 | return -EINVAL; | 3831 | ret = -EINVAL; |
3832 | goto out; | ||
3832 | } | 3833 | } |
3833 | 3834 | ||
3834 | if (cmd->data_length < 24) { | 3835 | if (cmd->data_length < 24) { |
diff --git a/drivers/target/tcm_fc/tfc_cmd.c b/drivers/target/tcm_fc/tfc_cmd.c index f03fb9730f5b..5b65f33939a8 100644 --- a/drivers/target/tcm_fc/tfc_cmd.c +++ b/drivers/target/tcm_fc/tfc_cmd.c | |||
@@ -230,6 +230,8 @@ u32 ft_get_task_tag(struct se_cmd *se_cmd) | |||
230 | { | 230 | { |
231 | struct ft_cmd *cmd = container_of(se_cmd, struct ft_cmd, se_cmd); | 231 | struct ft_cmd *cmd = container_of(se_cmd, struct ft_cmd, se_cmd); |
232 | 232 | ||
233 | if (cmd->aborted) | ||
234 | return ~0; | ||
233 | return fc_seq_exch(cmd->seq)->rxid; | 235 | return fc_seq_exch(cmd->seq)->rxid; |
234 | } | 236 | } |
235 | 237 | ||