diff options
author | Andrew Lutomirski <luto@mit.edu> | 2009-12-21 10:10:22 -0500 |
---|---|---|
committer | Eric Anholt <eric@anholt.net> | 2010-01-06 12:39:53 -0500 |
commit | 1d3c36ad4122651018599d4e3c9be0cccfbfb939 (patch) | |
tree | c7505143a7b2a1459d8a87c680461692927aec0f /drivers | |
parent | 76446cac68568fc7f5168a27deaf803ed22a4360 (diff) |
drm/i915: Fix RC6 suspend/resume
We restored RC6 twice on resume, even with modesetting off. Instead,
only restore it once and skip RC6 initialization entirely in non-KMS mode.
Signed-off-by: Andy Lutomirski <luto@mit.edu>
Tested-by: Jeff Chua <jeff.chua.linux@gmail.com>
Signed-off-by: Eric Anholt <eric@anholt.net>
Diffstat (limited to 'drivers')
-rw-r--r-- | drivers/gpu/drm/i915/i915_drv.h | 2 | ||||
-rw-r--r-- | drivers/gpu/drm/i915/i915_suspend.c | 12 | ||||
-rw-r--r-- | drivers/gpu/drm/i915/intel_display.c | 2 |
3 files changed, 1 insertions, 15 deletions
diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h index 7eb4ad51034d..29dd67626967 100644 --- a/drivers/gpu/drm/i915/i915_drv.h +++ b/drivers/gpu/drm/i915/i915_drv.h | |||
@@ -307,8 +307,6 @@ typedef struct drm_i915_private { | |||
307 | u32 saveDSPACNTR; | 307 | u32 saveDSPACNTR; |
308 | u32 saveDSPBCNTR; | 308 | u32 saveDSPBCNTR; |
309 | u32 saveDSPARB; | 309 | u32 saveDSPARB; |
310 | u32 saveRENDERSTANDBY; | ||
311 | u32 savePWRCTXA; | ||
312 | u32 saveHWS; | 310 | u32 saveHWS; |
313 | u32 savePIPEACONF; | 311 | u32 savePIPEACONF; |
314 | u32 savePIPEBCONF; | 312 | u32 savePIPEBCONF; |
diff --git a/drivers/gpu/drm/i915/i915_suspend.c b/drivers/gpu/drm/i915/i915_suspend.c index d5ebb00a9d49..a3b90c9561dc 100644 --- a/drivers/gpu/drm/i915/i915_suspend.c +++ b/drivers/gpu/drm/i915/i915_suspend.c | |||
@@ -732,12 +732,6 @@ int i915_save_state(struct drm_device *dev) | |||
732 | 732 | ||
733 | pci_read_config_byte(dev->pdev, LBB, &dev_priv->saveLBB); | 733 | pci_read_config_byte(dev->pdev, LBB, &dev_priv->saveLBB); |
734 | 734 | ||
735 | /* Render Standby */ | ||
736 | if (I915_HAS_RC6(dev)) { | ||
737 | dev_priv->saveRENDERSTANDBY = I915_READ(MCHBAR_RENDER_STANDBY); | ||
738 | dev_priv->savePWRCTXA = I915_READ(PWRCTXA); | ||
739 | } | ||
740 | |||
741 | /* Hardware status page */ | 735 | /* Hardware status page */ |
742 | dev_priv->saveHWS = I915_READ(HWS_PGA); | 736 | dev_priv->saveHWS = I915_READ(HWS_PGA); |
743 | 737 | ||
@@ -793,12 +787,6 @@ int i915_restore_state(struct drm_device *dev) | |||
793 | 787 | ||
794 | pci_write_config_byte(dev->pdev, LBB, dev_priv->saveLBB); | 788 | pci_write_config_byte(dev->pdev, LBB, dev_priv->saveLBB); |
795 | 789 | ||
796 | /* Render Standby */ | ||
797 | if (I915_HAS_RC6(dev)) { | ||
798 | I915_WRITE(MCHBAR_RENDER_STANDBY, dev_priv->saveRENDERSTANDBY); | ||
799 | I915_WRITE(PWRCTXA, dev_priv->savePWRCTXA); | ||
800 | } | ||
801 | |||
802 | /* Hardware status page */ | 790 | /* Hardware status page */ |
803 | I915_WRITE(HWS_PGA, dev_priv->saveHWS); | 791 | I915_WRITE(HWS_PGA, dev_priv->saveHWS); |
804 | 792 | ||
diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c index c21dede6461c..089b1df5448b 100644 --- a/drivers/gpu/drm/i915/intel_display.c +++ b/drivers/gpu/drm/i915/intel_display.c | |||
@@ -4593,7 +4593,7 @@ void intel_init_clock_gating(struct drm_device *dev) | |||
4593 | * GPU can automatically power down the render unit if given a page | 4593 | * GPU can automatically power down the render unit if given a page |
4594 | * to save state. | 4594 | * to save state. |
4595 | */ | 4595 | */ |
4596 | if (I915_HAS_RC6(dev)) { | 4596 | if (I915_HAS_RC6(dev) && drm_core_check_feature(dev, DRIVER_MODESET)) { |
4597 | struct drm_gem_object *pwrctx; | 4597 | struct drm_gem_object *pwrctx; |
4598 | struct drm_i915_gem_object *obj_priv; | 4598 | struct drm_i915_gem_object *obj_priv; |
4599 | int ret; | 4599 | int ret; |