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authorJakob Bornecrantz <jakob@vmware.com>2014-01-17 03:12:26 -0500
committerThomas Hellstrom <thellstrom@vmware.com>2014-01-17 03:12:26 -0500
commit1985f99987ff04e1bb0405101dd8e25cf1b6b037 (patch)
tree7cd7d3b6782eb733cc1791ef5acb35c406ee026a /drivers
parent96b43626a54317233f3e2c9750967e085b8d2850 (diff)
drm/vmwgfx: Invalidate surface on non-readback unbind
Fixes error messages in vmware.log Signed-off-by: Jakob Bornecrantz <jakob@vmware.com> Reviewed-by: Michael Banack <banackm@vmware.com> Signed-off-by: Thomas Hellstrom <thellstrom@vmware.com>
Diffstat (limited to 'drivers')
-rw-r--r--drivers/gpu/drm/vmwgfx/vmwgfx_surface.c26
1 files changed, 18 insertions, 8 deletions
diff --git a/drivers/gpu/drm/vmwgfx/vmwgfx_surface.c b/drivers/gpu/drm/vmwgfx/vmwgfx_surface.c
index a729b20ee14d..3bb3331acdaf 100644
--- a/drivers/gpu/drm/vmwgfx/vmwgfx_surface.c
+++ b/drivers/gpu/drm/vmwgfx/vmwgfx_surface.c
@@ -1043,15 +1043,19 @@ static int vmw_gb_surface_unbind(struct vmw_resource *res,
1043 } *cmd1; 1043 } *cmd1;
1044 struct { 1044 struct {
1045 SVGA3dCmdHeader header; 1045 SVGA3dCmdHeader header;
1046 SVGA3dCmdBindGBSurface body; 1046 SVGA3dCmdInvalidateGBSurface body;
1047 } *cmd2; 1047 } *cmd2;
1048 struct {
1049 SVGA3dCmdHeader header;
1050 SVGA3dCmdBindGBSurface body;
1051 } *cmd3;
1048 uint32_t submit_size; 1052 uint32_t submit_size;
1049 uint8_t *cmd; 1053 uint8_t *cmd;
1050 1054
1051 1055
1052 BUG_ON(bo->mem.mem_type != VMW_PL_MOB); 1056 BUG_ON(bo->mem.mem_type != VMW_PL_MOB);
1053 1057
1054 submit_size = sizeof(*cmd2) + (readback ? sizeof(*cmd1) : 0); 1058 submit_size = sizeof(*cmd3) + (readback ? sizeof(*cmd1) : sizeof(*cmd2));
1055 cmd = vmw_fifo_reserve(dev_priv, submit_size); 1059 cmd = vmw_fifo_reserve(dev_priv, submit_size);
1056 if (unlikely(cmd == NULL)) { 1060 if (unlikely(cmd == NULL)) {
1057 DRM_ERROR("Failed reserving FIFO space for surface " 1061 DRM_ERROR("Failed reserving FIFO space for surface "
@@ -1059,18 +1063,24 @@ static int vmw_gb_surface_unbind(struct vmw_resource *res,
1059 return -ENOMEM; 1063 return -ENOMEM;
1060 } 1064 }
1061 1065
1062 cmd2 = (void *) cmd;
1063 if (readback) { 1066 if (readback) {
1064 cmd1 = (void *) cmd; 1067 cmd1 = (void *) cmd;
1065 cmd1->header.id = SVGA_3D_CMD_READBACK_GB_SURFACE; 1068 cmd1->header.id = SVGA_3D_CMD_READBACK_GB_SURFACE;
1066 cmd1->header.size = sizeof(cmd1->body); 1069 cmd1->header.size = sizeof(cmd1->body);
1067 cmd1->body.sid = res->id; 1070 cmd1->body.sid = res->id;
1068 cmd2 = (void *) &cmd1[1]; 1071 cmd3 = (void *) &cmd1[1];
1072 } else {
1073 cmd2 = (void *) cmd;
1074 cmd2->header.id = SVGA_3D_CMD_INVALIDATE_GB_SURFACE;
1075 cmd2->header.size = sizeof(cmd2->body);
1076 cmd2->body.sid = res->id;
1077 cmd3 = (void *) &cmd2[1];
1069 } 1078 }
1070 cmd2->header.id = SVGA_3D_CMD_BIND_GB_SURFACE; 1079
1071 cmd2->header.size = sizeof(cmd2->body); 1080 cmd3->header.id = SVGA_3D_CMD_BIND_GB_SURFACE;
1072 cmd2->body.sid = res->id; 1081 cmd3->header.size = sizeof(cmd3->body);
1073 cmd2->body.mobid = SVGA3D_INVALID_ID; 1082 cmd3->body.sid = res->id;
1083 cmd3->body.mobid = SVGA3D_INVALID_ID;
1074 1084
1075 vmw_fifo_commit(dev_priv, submit_size); 1085 vmw_fifo_commit(dev_priv, submit_size);
1076 1086