drm/radeon/kms: allow "invalid" DB formats as a means to disable DB

Signed-off-by: Marek Olšák <maraeo@gmail.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Cc: stable@vger.kernel.org
Signed-off-by: Dave Airlie <airlied@redhat.com>

4 files changed, 12 insertions, 5 deletions

diff --git a/drivers/gpu/drm/radeon/evergreen_cs.c b/drivers/gpu/drm/radeon/evergreen_cs.c
index c16554122ccd..f2e5c545c973 100644
--- a/drivers/gpu/drm/radeon/evergreen_cs.c
+++ b/drivers/gpu/drm/radeon/evergreen_cs.c
@@ -961,13 +961,15 @@ static int evergreen_cs_track_check(struct radeon_cs_parser *p)
 
         if (track->db_dirty) {
                 /* Check stencil buffer */
-                if (G_028800_STENCIL_ENABLE(track->db_depth_control)) {
+                if (G_028044_FORMAT(track->db_s_info) != V_028044_STENCIL_INVALID &&
+                    G_028800_STENCIL_ENABLE(track->db_depth_control)) {
                         r = evergreen_cs_track_validate_stencil(p);
                         if (r)
                                 return r;
                 }
                 /* Check depth buffer */
-                if (G_028800_Z_ENABLE(track->db_depth_control)) {
+                if (G_028040_FORMAT(track->db_z_info) != V_028040_Z_INVALID &&
+                    G_028800_Z_ENABLE(track->db_depth_control)) {
                         r = evergreen_cs_track_validate_depth(p);
                         if (r)
                                 return r;
diff --git a/drivers/gpu/drm/radeon/evergreend.h b/drivers/gpu/drm/radeon/evergreend.h
index d3bd098e4e19..79347855d9bf 100644
--- a/drivers/gpu/drm/radeon/evergreend.h
+++ b/drivers/gpu/drm/radeon/evergreend.h
@@ -1277,6 +1277,8 @@
 #define   S_028044_FORMAT(x)                           (((x) & 0x1) << 0)
 #define   G_028044_FORMAT(x)                           (((x) >> 0) & 0x1)
 #define   C_028044_FORMAT                              0xFFFFFFFE
+#define     V_028044_STENCIL_INVALID                    0
+#define     V_028044_STENCIL_8                          1
 #define   G_028044_TILE_SPLIT(x)                       (((x) >> 8) & 0x7)
 #define DB_Z_READ_BASE                                  0x28048
 #define DB_STENCIL_READ_BASE                            0x2804c
diff --git a/drivers/gpu/drm/radeon/r600_cs.c b/drivers/gpu/drm/radeon/r600_cs.c
index ca87f7afaf23..1119e31e5c2f 100644
--- a/drivers/gpu/drm/radeon/r600_cs.c
+++ b/drivers/gpu/drm/radeon/r600_cs.c
@@ -764,8 +764,10 @@ static int r600_cs_track_check(struct radeon_cs_parser *p)
         }
 
         /* Check depth buffer */
-        if (track->db_dirty && (G_028800_STENCIL_ENABLE(track->db_depth_control) ||
-                G_028800_Z_ENABLE(track->db_depth_control))) {
+        if (track->db_dirty &&
+            G_028010_FORMAT(track->db_depth_info) != V_028010_DEPTH_INVALID &&
+            (G_028800_STENCIL_ENABLE(track->db_depth_control) ||
+             G_028800_Z_ENABLE(track->db_depth_control))) {
                 r = r600_cs_track_validate_db(p);
                 if (r)
                         return r;
diff --git a/drivers/gpu/drm/radeon/radeon_drv.c b/drivers/gpu/drm/radeon/radeon_drv.c
index dcea6f01ae4e..4b736ecb0aa5 100644
--- a/drivers/gpu/drm/radeon/radeon_drv.c
+++ b/drivers/gpu/drm/radeon/radeon_drv.c
@@ -59,9 +59,10 @@
  *   2.15.0 - add max_pipes query
  *   2.16.0 - fix evergreen 2D tiled surface calculation
  *   2.17.0 - add STRMOUT_BASE_UPDATE for r7xx
+ *   2.18.0 - r600-eg: allow "invalid" DB formats
  */
 #define KMS_DRIVER_MAJOR        2
-#define KMS_DRIVER_MINOR        17
+#define KMS_DRIVER_MINOR        18
 #define KMS_DRIVER_PATCHLEVEL   0
 int radeon_driver_load_kms(struct drm_device *dev, unsigned long flags);
 int radeon_driver_unload_kms(struct drm_device *dev);