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authorGreg Kroah-Hartman <gregkh@suse.de>2010-05-17 13:33:41 -0400
committerGreg Kroah-Hartman <gregkh@suse.de>2010-05-20 16:21:47 -0400
commita320471147fe61ed9260295958f07cc23ec360c8 (patch)
tree7a324996de1f0e897f8efbad1a2ba55ed347e943 /drivers
parent3bb36aa266f11f762e345cc85499a15d8df7ec51 (diff)
USB: io_edgeport: checkpatch cleanups
Minor whitespace cleanups to make checkpatch happy. Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
Diffstat (limited to 'drivers')
-rw-r--r--drivers/usb/serial/io_edgeport.h16
-rw-r--r--drivers/usb/serial/io_ionsp.h95
-rw-r--r--drivers/usb/serial/io_ti.h92
-rw-r--r--drivers/usb/serial/io_usbvend.h87
4 files changed, 143 insertions, 147 deletions
diff --git a/drivers/usb/serial/io_edgeport.h b/drivers/usb/serial/io_edgeport.h
index cb201c1f67f9..dced7ec65470 100644
--- a/drivers/usb/serial/io_edgeport.h
+++ b/drivers/usb/serial/io_edgeport.h
@@ -34,15 +34,15 @@
34 34
35 35
36 36
37/* The following table is used to map the USBx port number to 37/* The following table is used to map the USBx port number to
38 * the device serial number (or physical USB path), */ 38 * the device serial number (or physical USB path), */
39#define MAX_EDGEPORTS 64 39#define MAX_EDGEPORTS 64
40 40
41struct comMapper { 41struct comMapper {
42 char SerialNumber[MAX_SERIALNUMBER_LEN+1]; /* Serial number/usb path */ 42 char SerialNumber[MAX_SERIALNUMBER_LEN+1]; /* Serial number/usb path */
43 int numPorts; /* Number of ports */ 43 int numPorts; /* Number of ports */
44 int Original[MAX_RS232_PORTS]; /* Port numbers set by IOCTL */ 44 int Original[MAX_RS232_PORTS]; /* Port numbers set by IOCTL */
45 int Port[MAX_RS232_PORTS]; /* Actual used port numbers */ 45 int Port[MAX_RS232_PORTS]; /* Actual used port numbers */
46}; 46};
47 47
48 48
@@ -51,7 +51,7 @@ struct comMapper {
51/* /proc/edgeport Interface 51/* /proc/edgeport Interface
52 * This interface uses read/write/lseek interface to talk to the edgeport driver 52 * This interface uses read/write/lseek interface to talk to the edgeport driver
53 * the following read functions are supported: */ 53 * the following read functions are supported: */
54#define PROC_GET_MAPPING_TO_PATH 1 54#define PROC_GET_MAPPING_TO_PATH 1
55#define PROC_GET_COM_ENTRY 2 55#define PROC_GET_COM_ENTRY 2
56#define PROC_GET_EDGE_MANUF_DESCRIPTOR 3 56#define PROC_GET_EDGE_MANUF_DESCRIPTOR 3
57#define PROC_GET_BOOT_DESCRIPTOR 4 57#define PROC_GET_BOOT_DESCRIPTOR 4
@@ -64,7 +64,7 @@ struct comMapper {
64 64
65 65
66/* the following write functions are supported: */ 66/* the following write functions are supported: */
67#define PROC_SET_COM_MAPPING 1 67#define PROC_SET_COM_MAPPING 1
68#define PROC_SET_COM_ENTRY 2 68#define PROC_SET_COM_ENTRY 2
69 69
70 70
@@ -97,8 +97,8 @@ struct edgeport_product_info {
97 __u8 BoardRev; /* PCB revision level (chg only if s/w visible) */ 97 __u8 BoardRev; /* PCB revision level (chg only if s/w visible) */
98 98
99 __u8 BootMajorVersion; /* Boot Firmware version: xx. */ 99 __u8 BootMajorVersion; /* Boot Firmware version: xx. */
100 __u8 BootMinorVersion; /* yy. */ 100 __u8 BootMinorVersion; /* yy. */
101 __le16 BootBuildNumber; /* zzzz (LE format) */ 101 __le16 BootBuildNumber; /* zzzz (LE format) */
102 102
103 __u8 FirmwareMajorVersion; /* Operational Firmware version:xx. */ 103 __u8 FirmwareMajorVersion; /* Operational Firmware version:xx. */
104 __u8 FirmwareMinorVersion; /* yy. */ 104 __u8 FirmwareMinorVersion; /* yy. */
diff --git a/drivers/usb/serial/io_ionsp.h b/drivers/usb/serial/io_ionsp.h
index 092e03d2dfc4..5cc591bae54d 100644
--- a/drivers/usb/serial/io_ionsp.h
+++ b/drivers/usb/serial/io_ionsp.h
@@ -89,10 +89,10 @@ All 16-bit fields are sent in little-endian (Intel) format.
89// 89//
90 90
91struct int_status_pkt { 91struct int_status_pkt {
92 __u16 RxBytesAvail; // Additional bytes available to 92 __u16 RxBytesAvail; // Additional bytes available to
93 // be read from Bulk IN pipe 93 // be read from Bulk IN pipe
94 __u16 TxCredits[ MAX_RS232_PORTS ]; // Additional space available in 94 __u16 TxCredits[MAX_RS232_PORTS]; // Additional space available in
95 // given port's TxBuffer 95 // given port's TxBuffer
96}; 96};
97 97
98 98
@@ -115,24 +115,24 @@ struct int_status_pkt {
115#define IOSP_CMD_STAT_BIT 0x80 // If set, this is command/status header 115#define IOSP_CMD_STAT_BIT 0x80 // If set, this is command/status header
116 116
117#define IS_CMD_STAT_HDR(Byte1) ((Byte1) & IOSP_CMD_STAT_BIT) 117#define IS_CMD_STAT_HDR(Byte1) ((Byte1) & IOSP_CMD_STAT_BIT)
118#define IS_DATA_HDR(Byte1) (! IS_CMD_STAT_HDR(Byte1)) 118#define IS_DATA_HDR(Byte1) (!IS_CMD_STAT_HDR(Byte1))
119 119
120#define IOSP_GET_HDR_PORT(Byte1) ((__u8) ((Byte1) & IOSP_PORT_MASK)) 120#define IOSP_GET_HDR_PORT(Byte1) ((__u8) ((Byte1) & IOSP_PORT_MASK))
121#define IOSP_GET_HDR_DATA_LEN(Byte1, Byte2) ((__u16) ( ((__u16)((Byte1) & 0x78)) << 5) | (Byte2)) 121#define IOSP_GET_HDR_DATA_LEN(Byte1, Byte2) ((__u16) (((__u16)((Byte1) & 0x78)) << 5) | (Byte2))
122#define IOSP_GET_STATUS_CODE(Byte1) ((__u8) (((Byte1) & 0x78) >> 3)) 122#define IOSP_GET_STATUS_CODE(Byte1) ((__u8) (((Byte1) & 0x78) >> 3))
123 123
124 124
125// 125//
126// These macros build the 1st and 2nd bytes for a data header 126// These macros build the 1st and 2nd bytes for a data header
127// 127//
128#define IOSP_BUILD_DATA_HDR1(Port, Len) ((__u8) (((Port) | ((__u8) (((__u16) (Len)) >> 5) & 0x78 )))) 128#define IOSP_BUILD_DATA_HDR1(Port, Len) ((__u8) (((Port) | ((__u8) (((__u16) (Len)) >> 5) & 0x78))))
129#define IOSP_BUILD_DATA_HDR2(Port, Len) ((__u8) (Len)) 129#define IOSP_BUILD_DATA_HDR2(Port, Len) ((__u8) (Len))
130 130
131 131
132// 132//
133// These macros build the 1st and 2nd bytes for a command header 133// These macros build the 1st and 2nd bytes for a command header
134// 134//
135#define IOSP_BUILD_CMD_HDR1(Port, Cmd) ((__u8) ( IOSP_CMD_STAT_BIT | (Port) | ((__u8) ((Cmd) << 3)) )) 135#define IOSP_BUILD_CMD_HDR1(Port, Cmd) ((__u8) (IOSP_CMD_STAT_BIT | (Port) | ((__u8) ((Cmd) << 3))))
136 136
137 137
138//-------------------------------------------------------------- 138//--------------------------------------------------------------
@@ -194,24 +194,25 @@ struct int_status_pkt {
194// Define macros to simplify building of IOSP cmds 194// Define macros to simplify building of IOSP cmds
195// 195//
196 196
197#define MAKE_CMD_WRITE_REG(ppBuf, pLen, Port, Reg, Val) \ 197#define MAKE_CMD_WRITE_REG(ppBuf, pLen, Port, Reg, Val) \
198 do { \ 198do { \
199 (*(ppBuf))[0] = IOSP_BUILD_CMD_HDR1( (Port), IOSP_WRITE_UART_REG(Reg) ); \ 199 (*(ppBuf))[0] = IOSP_BUILD_CMD_HDR1((Port), \
200 (*(ppBuf))[1] = (Val); \ 200 IOSP_WRITE_UART_REG(Reg)); \
201 \ 201 (*(ppBuf))[1] = (Val); \
202 *ppBuf += 2; \ 202 \
203 *pLen += 2; \ 203 *ppBuf += 2; \
204 } while (0) 204 *pLen += 2; \
205} while (0)
205 206
206#define MAKE_CMD_EXT_CMD(ppBuf, pLen, Port, ExtCmd, Param) \ 207#define MAKE_CMD_EXT_CMD(ppBuf, pLen, Port, ExtCmd, Param) \
207 do { \ 208do { \
208 (*(ppBuf))[0] = IOSP_BUILD_CMD_HDR1( (Port), IOSP_EXT_CMD ); \ 209 (*(ppBuf))[0] = IOSP_BUILD_CMD_HDR1((Port), IOSP_EXT_CMD); \
209 (*(ppBuf))[1] = (ExtCmd); \ 210 (*(ppBuf))[1] = (ExtCmd); \
210 (*(ppBuf))[2] = (Param); \ 211 (*(ppBuf))[2] = (Param); \
211 \ 212 \
212 *ppBuf += 3; \ 213 *ppBuf += 3; \
213 *pLen += 3; \ 214 *pLen += 3; \
214 } while (0) 215} while (0)
215 216
216 217
217 218
@@ -310,16 +311,16 @@ struct int_status_pkt {
310// 311//
311// IOSP_CMD_RX_CHECK_REQ 312// IOSP_CMD_RX_CHECK_REQ
312// 313//
313// This command is used to assist in the implementation of the 314// This command is used to assist in the implementation of the
314// IOCTL_SERIAL_PURGE Windows IOCTL. 315// IOCTL_SERIAL_PURGE Windows IOCTL.
315// This IOSP command tries to place a marker at the end of the RX 316// This IOSP command tries to place a marker at the end of the RX
316// queue in the Edgeport. If the Edgeport RX queue is full then 317// queue in the Edgeport. If the Edgeport RX queue is full then
317// the Check will be discarded. 318// the Check will be discarded.
318// It is up to the device driver to timeout waiting for the 319// It is up to the device driver to timeout waiting for the
319// RX_CHECK_RSP. If a RX_CHECK_RSP is received, the driver is 320// RX_CHECK_RSP. If a RX_CHECK_RSP is received, the driver is
320// sure that all data has been received from the edgeport and 321// sure that all data has been received from the edgeport and
321// may now purge any internal RX buffers. 322// may now purge any internal RX buffers.
322// Note tat the sequence numbers may be used to detect lost 323// Note tat the sequence numbers may be used to detect lost
323// CHECK_REQs. 324// CHECK_REQs.
324 325
325// Example for Port 0 326// Example for Port 0
@@ -341,7 +342,7 @@ struct int_status_pkt {
341// 342//
342// 1ssssPPP P1P1P1P1 [ P2P2P2P2P2 ]... 343// 1ssssPPP P1P1P1P1 [ P2P2P2P2P2 ]...
343// 344//
344// ssss: 00-07 2-byte status. ssss identifies which UART register 345// ssss: 00-07 2-byte status. ssss identifies which UART register
345// has changed value, and the new value is in P1. 346// has changed value, and the new value is in P1.
346// Note that the ssss values do not correspond to the 347// Note that the ssss values do not correspond to the
347// 16554 register numbers given in 16554.H. Instead, 348// 16554 register numbers given in 16554.H. Instead,
@@ -383,14 +384,14 @@ struct int_status_pkt {
383// returns this in order to report 384// returns this in order to report
384// changes in modem status lines 385// changes in modem status lines
385// (CTS, DSR, RI, CD) 386// (CTS, DSR, RI, CD)
386// 387//
387 388
388// 0x02 // Available for future expansion 389// 0x02 // Available for future expansion
389// 0x03 // 390// 0x03 //
390// 0x04 // 391// 0x04 //
391// 0x05 // 392// 0x05 //
392// 0x06 // 393// 0x06 //
393// 0x07 // 394// 0x07 //
394 395
395 396
396/**************************************************** 397/****************************************************
@@ -400,7 +401,7 @@ struct int_status_pkt {
400#define IOSP_STATUS_LSR_DATA 0x08 // P1 is new value of LSR register (same as STATUS_LSR) 401#define IOSP_STATUS_LSR_DATA 0x08 // P1 is new value of LSR register (same as STATUS_LSR)
401 402
402// P2 is errored character read from 403// P2 is errored character read from
403// RxFIFO after LSR reported an error. 404// RxFIFO after LSR reported an error.
404 405
405#define IOSP_EXT_STATUS 0x09 // P1 is status/response code, param in P2. 406#define IOSP_EXT_STATUS 0x09 // P1 is status/response code, param in P2.
406 407
@@ -408,7 +409,7 @@ struct int_status_pkt {
408// Response Codes (P1 values) for 3-byte status messages 409// Response Codes (P1 values) for 3-byte status messages
409 410
410#define IOSP_EXT_STATUS_CHASE_RSP 0 // Reply to CHASE_PORT cmd. P2 is outcome: 411#define IOSP_EXT_STATUS_CHASE_RSP 0 // Reply to CHASE_PORT cmd. P2 is outcome:
411#define IOSP_EXT_STATUS_CHASE_PASS 0 // P2 = 0: All Tx data drained successfully 412#define IOSP_EXT_STATUS_CHASE_PASS 0 // P2 = 0: All Tx data drained successfully
412#define IOSP_EXT_STATUS_CHASE_FAIL 1 // P2 = 1: Timed out (stuck due to flow 413#define IOSP_EXT_STATUS_CHASE_FAIL 1 // P2 = 1: Timed out (stuck due to flow
413 414
414// control from remote device). 415// control from remote device).
@@ -446,9 +447,9 @@ struct int_status_pkt {
446// Macros to parse status messages 447// Macros to parse status messages
447// 448//
448 449
449#define IOSP_GET_STATUS_LEN(code) ( (code) < 8 ? 2 : ((code) < 0x0A ? 3 : 4) ) 450#define IOSP_GET_STATUS_LEN(code) ((code) < 8 ? 2 : ((code) < 0x0A ? 3 : 4))
450 451
451#define IOSP_STATUS_IS_2BYTE(code) ( (code) < 0x08 ) 452#define IOSP_STATUS_IS_2BYTE(code) ((code) < 0x08)
452#define IOSP_STATUS_IS_3BYTE(code) ( ((code) >= 0x08) && ((code) <= 0x0B) ) 453#define IOSP_STATUS_IS_3BYTE(code) (((code) >= 0x08) && ((code) <= 0x0B))
453#define IOSP_STATUS_IS_4BYTE(code) ( ((code) >= 0x0C) && ((code) <= 0x0D) ) 454#define IOSP_STATUS_IS_4BYTE(code) (((code) >= 0x0C) && ((code) <= 0x0D))
454 455
diff --git a/drivers/usb/serial/io_ti.h b/drivers/usb/serial/io_ti.h
index cab84f2256b9..1bd67b24f916 100644
--- a/drivers/usb/serial/io_ti.h
+++ b/drivers/usb/serial/io_ti.h
@@ -1,4 +1,4 @@
1/***************************************************************************** 1/*****************************************************************************
2 * 2 *
3 * Copyright (C) 1997-2002 Inside Out Networks, Inc. 3 * Copyright (C) 1997-2002 Inside Out Networks, Inc.
4 * 4 *
@@ -22,10 +22,10 @@
22#define DTK_ADDR_SPACE_I2C_TYPE_II 0x82 /* Addr is placed in I2C area */ 22#define DTK_ADDR_SPACE_I2C_TYPE_II 0x82 /* Addr is placed in I2C area */
23#define DTK_ADDR_SPACE_I2C_TYPE_III 0x83 /* Addr is placed in I2C area */ 23#define DTK_ADDR_SPACE_I2C_TYPE_III 0x83 /* Addr is placed in I2C area */
24 24
25// UART Defines 25/* UART Defines */
26#define UMPMEM_BASE_UART1 0xFFA0 /* UMP UART1 base address */ 26#define UMPMEM_BASE_UART1 0xFFA0 /* UMP UART1 base address */
27#define UMPMEM_BASE_UART2 0xFFB0 /* UMP UART2 base address */ 27#define UMPMEM_BASE_UART2 0xFFB0 /* UMP UART2 base address */
28#define UMPMEM_OFFS_UART_LSR 0x05 /* UMP UART LSR register offset */ 28#define UMPMEM_OFFS_UART_LSR 0x05 /* UMP UART LSR register offset */
29 29
30/* Bits per character */ 30/* Bits per character */
31#define UMP_UART_CHAR5BITS 0x00 31#define UMP_UART_CHAR5BITS 0x00
@@ -54,7 +54,7 @@
54#define UMP_UART_LSR_RX_MASK 0x10 54#define UMP_UART_LSR_RX_MASK 0x10
55#define UMP_UART_LSR_TX_MASK 0x20 55#define UMP_UART_LSR_TX_MASK 0x20
56 56
57#define UMP_UART_LSR_DATA_MASK ( LSR_PAR_ERR | LSR_FRM_ERR | LSR_BREAK ) 57#define UMP_UART_LSR_DATA_MASK (LSR_PAR_ERR | LSR_FRM_ERR | LSR_BREAK)
58 58
59/* Port Settings Constants) */ 59/* Port Settings Constants) */
60#define UMP_MASK_UART_FLAGS_RTS_FLOW 0x0001 60#define UMP_MASK_UART_FLAGS_RTS_FLOW 0x0001
@@ -79,50 +79,57 @@
79#define UMP_PORT_DIR_OUT 0x01 79#define UMP_PORT_DIR_OUT 0x01
80#define UMP_PORT_DIR_IN 0x02 80#define UMP_PORT_DIR_IN 0x02
81 81
82// Address of Port 0 82/* Address of Port 0 */
83#define UMPM_UART1_PORT 0x03 83#define UMPM_UART1_PORT 0x03
84 84
85// Commands 85/* Commands */
86#define UMPC_SET_CONFIG 0x05 86#define UMPC_SET_CONFIG 0x05
87#define UMPC_OPEN_PORT 0x06 87#define UMPC_OPEN_PORT 0x06
88#define UMPC_CLOSE_PORT 0x07 88#define UMPC_CLOSE_PORT 0x07
89#define UMPC_START_PORT 0x08 89#define UMPC_START_PORT 0x08
90#define UMPC_STOP_PORT 0x09 90#define UMPC_STOP_PORT 0x09
91#define UMPC_TEST_PORT 0x0A 91#define UMPC_TEST_PORT 0x0A
92#define UMPC_PURGE_PORT 0x0B 92#define UMPC_PURGE_PORT 0x0B
93 93
94#define UMPC_COMPLETE_READ 0x80 // Force the Firmware to complete the current Read 94/* Force the Firmware to complete the current Read */
95#define UMPC_HARDWARE_RESET 0x81 // Force UMP back into BOOT Mode 95#define UMPC_COMPLETE_READ 0x80
96#define UMPC_COPY_DNLD_TO_I2C 0x82 // Copy current download image to type 0xf2 record in 16k I2C 96/* Force UMP back into BOOT Mode */
97 // firmware will change 0xff record to type 2 record when complete 97#define UMPC_HARDWARE_RESET 0x81
98/*
99 * Copy current download image to type 0xf2 record in 16k I2C
100 * firmware will change 0xff record to type 2 record when complete
101 */
102#define UMPC_COPY_DNLD_TO_I2C 0x82
98 103
99 // Special function register commands 104/*
100 // wIndex is register address 105 * Special function register commands
101 // wValue is MSB/LSB mask/data 106 * wIndex is register address
102#define UMPC_WRITE_SFR 0x83 // Write SFR Register 107 * wValue is MSB/LSB mask/data
108 */
109#define UMPC_WRITE_SFR 0x83 /* Write SFR Register */
103 110
104 // wIndex is register address 111/* wIndex is register address */
105#define UMPC_READ_SFR 0x84 // Read SRF Register 112#define UMPC_READ_SFR 0x84 /* Read SRF Register */
106 113
107 // Set or Clear DTR (wValue bit 0 Set/Clear) wIndex ModuleID (port) 114/* Set or Clear DTR (wValue bit 0 Set/Clear) wIndex ModuleID (port) */
108#define UMPC_SET_CLR_DTR 0x85 115#define UMPC_SET_CLR_DTR 0x85
109 116
110 // Set or Clear RTS (wValue bit 0 Set/Clear) wIndex ModuleID (port) 117/* Set or Clear RTS (wValue bit 0 Set/Clear) wIndex ModuleID (port) */
111#define UMPC_SET_CLR_RTS 0x86 118#define UMPC_SET_CLR_RTS 0x86
112 119
113 // Set or Clear LOOPBACK (wValue bit 0 Set/Clear) wIndex ModuleID (port) 120/* Set or Clear LOOPBACK (wValue bit 0 Set/Clear) wIndex ModuleID (port) */
114#define UMPC_SET_CLR_LOOPBACK 0x87 121#define UMPC_SET_CLR_LOOPBACK 0x87
115 122
116 // Set or Clear BREAK (wValue bit 0 Set/Clear) wIndex ModuleID (port) 123/* Set or Clear BREAK (wValue bit 0 Set/Clear) wIndex ModuleID (port) */
117#define UMPC_SET_CLR_BREAK 0x88 124#define UMPC_SET_CLR_BREAK 0x88
118 125
119 // Read MSR wIndex ModuleID (port) 126/* Read MSR wIndex ModuleID (port) */
120#define UMPC_READ_MSR 0x89 127#define UMPC_READ_MSR 0x89
121 128
122 /* Toolkit commands */ 129/* Toolkit commands */
123 /* Read-write group */ 130/* Read-write group */
124#define UMPC_MEMORY_READ 0x92 131#define UMPC_MEMORY_READ 0x92
125#define UMPC_MEMORY_WRITE 0x93 132#define UMPC_MEMORY_WRITE 0x93
126 133
127/* 134/*
128 * UMP DMA Definitions 135 * UMP DMA Definitions
@@ -130,8 +137,7 @@
130#define UMPD_OEDB1_ADDRESS 0xFF08 137#define UMPD_OEDB1_ADDRESS 0xFF08
131#define UMPD_OEDB2_ADDRESS 0xFF10 138#define UMPD_OEDB2_ADDRESS 0xFF10
132 139
133struct out_endpoint_desc_block 140struct out_endpoint_desc_block {
134{
135 __u8 Configuration; 141 __u8 Configuration;
136 __u8 XBufAddr; 142 __u8 XBufAddr;
137 __u8 XByteCount; 143 __u8 XByteCount;
@@ -147,8 +153,8 @@ struct out_endpoint_desc_block
147 * TYPE DEFINITIONS 153 * TYPE DEFINITIONS
148 * Structures for Firmware commands 154 * Structures for Firmware commands
149 */ 155 */
150struct ump_uart_config /* UART settings */ 156/* UART settings */
151{ 157struct ump_uart_config {
152 __u16 wBaudRate; /* Baud rate */ 158 __u16 wBaudRate; /* Baud rate */
153 __u16 wFlags; /* Bitmap mask of flags */ 159 __u16 wFlags; /* Bitmap mask of flags */
154 __u8 bDataBits; /* 5..8 - data bits per character */ 160 __u8 bDataBits; /* 5..8 - data bits per character */
@@ -165,8 +171,8 @@ struct ump_uart_config /* UART settings */
165 * TYPE DEFINITIONS 171 * TYPE DEFINITIONS
166 * Structures for USB interrupts 172 * Structures for USB interrupts
167 */ 173 */
168struct ump_interrupt /* Interrupt packet structure */ 174/* Interrupt packet structure */
169{ 175struct ump_interrupt {
170 __u8 bICode; /* Interrupt code (interrupt num) */ 176 __u8 bICode; /* Interrupt code (interrupt num) */
171 __u8 bIInfo; /* Interrupt information */ 177 __u8 bIInfo; /* Interrupt information */
172} __attribute__((packed)); 178} __attribute__((packed));
diff --git a/drivers/usb/serial/io_usbvend.h b/drivers/usb/serial/io_usbvend.h
index 8e1a491e52a9..51f83fbb73bb 100644
--- a/drivers/usb/serial/io_usbvend.h
+++ b/drivers/usb/serial/io_usbvend.h
@@ -26,7 +26,7 @@
26 26
27// 27//
28// Definitions of USB product IDs 28// Definitions of USB product IDs
29// 29//
30 30
31#define USB_VENDOR_ID_ION 0x1608 // Our VID 31#define USB_VENDOR_ID_ION 0x1608 // Our VID
32#define USB_VENDOR_ID_TI 0x0451 // TI VID 32#define USB_VENDOR_ID_TI 0x0451 // TI VID
@@ -54,7 +54,7 @@
54// Product IDs - assigned to match middle digit of serial number (No longer true) 54// Product IDs - assigned to match middle digit of serial number (No longer true)
55 55
56#define ION_DEVICE_ID_80251_NETCHIP 0x020 // This bit is set in the PID if this edgeport hardware$ 56#define ION_DEVICE_ID_80251_NETCHIP 0x020 // This bit is set in the PID if this edgeport hardware$
57 // is based on the 80251+Netchip. 57 // is based on the 80251+Netchip.
58 58
59#define ION_DEVICE_ID_GENERATION_1 0x00 // Value for 930 based edgeports 59#define ION_DEVICE_ID_GENERATION_1 0x00 // Value for 930 based edgeports
60#define ION_DEVICE_ID_GENERATION_2 0x01 // Value for 80251+Netchip. 60#define ION_DEVICE_ID_GENERATION_2 0x01 // Value for 80251+Netchip.
@@ -134,7 +134,7 @@
134#define ION_DEVICE_ID_TI_EDGEPORT_416 0x0212 // Edgeport/416 134#define ION_DEVICE_ID_TI_EDGEPORT_416 0x0212 // Edgeport/416
135#define ION_DEVICE_ID_TI_EDGEPORT_1 0x0215 // Edgeport/1 RS232 135#define ION_DEVICE_ID_TI_EDGEPORT_1 0x0215 // Edgeport/1 RS232
136#define ION_DEVICE_ID_TI_EDGEPORT_42 0x0217 // Edgeport/42 4 hub 2 RS232 136#define ION_DEVICE_ID_TI_EDGEPORT_42 0x0217 // Edgeport/42 4 hub 2 RS232
137#define ION_DEVICE_ID_TI_EDGEPORT_22I 0x021A // Edgeport/22I is an Edgeport/4 with ports 1&2 RS422 and ports 3&4 RS232 137#define ION_DEVICE_ID_TI_EDGEPORT_22I 0x021A // Edgeport/22I is an Edgeport/4 with ports 1&2 RS422 and ports 3&4 RS232
138#define ION_DEVICE_ID_TI_EDGEPORT_2C 0x021B // Edgeport/2c RS232 138#define ION_DEVICE_ID_TI_EDGEPORT_2C 0x021B // Edgeport/2c RS232
139#define ION_DEVICE_ID_TI_EDGEPORT_221C 0x021C // Edgeport/221c is a TI based Edgeport/2 with lucent chip and 139#define ION_DEVICE_ID_TI_EDGEPORT_221C 0x021C // Edgeport/221c is a TI based Edgeport/2 with lucent chip and
140 // 2 external hub ports - Large I2C 140 // 2 external hub ports - Large I2C
@@ -142,7 +142,7 @@
142 // 2 external hub ports - Large I2C 142 // 2 external hub ports - Large I2C
143#define ION_DEVICE_ID_TI_EDGEPORT_21C 0x021E // Edgeport/21c is a TI based Edgeport/2 with lucent chip 143#define ION_DEVICE_ID_TI_EDGEPORT_21C 0x021E // Edgeport/21c is a TI based Edgeport/2 with lucent chip
144 144
145// Generation 3 devices -- 3410 based edgport/1 (256 byte I2C) 145// Generation 3 devices -- 3410 based edgport/1 (256 byte I2C)
146#define ION_DEVICE_ID_TI_TI3410_EDGEPORT_1 0x0240 // Edgeport/1 RS232 146#define ION_DEVICE_ID_TI_TI3410_EDGEPORT_1 0x0240 // Edgeport/1 RS232
147#define ION_DEVICE_ID_TI_TI3410_EDGEPORT_1I 0x0241 // Edgeport/1i- RS422 model 147#define ION_DEVICE_ID_TI_TI3410_EDGEPORT_1I 0x0241 // Edgeport/1i- RS422 model
148 148
@@ -176,7 +176,7 @@
176 // Default to /P function 176 // Default to /P function
177 177
178#define ION_DEVICE_ID_PLUS_PWR_HP4CD 0x30C // 5052 Plus Power HubPort/4CD+ (for Dell) 178#define ION_DEVICE_ID_PLUS_PWR_HP4CD 0x30C // 5052 Plus Power HubPort/4CD+ (for Dell)
179#define ION_DEVICE_ID_PLUS_PWR_HP4C 0x30D // 5052 Plus Power HubPort/4C+ 179#define ION_DEVICE_ID_PLUS_PWR_HP4C 0x30D // 5052 Plus Power HubPort/4C+
180#define ION_DEVICE_ID_PLUS_PWR_PCI 0x30E // 3410 Plus Power PCI Host Controller 4 port 180#define ION_DEVICE_ID_PLUS_PWR_PCI 0x30E // 3410 Plus Power PCI Host Controller 4 port
181 181
182 182
@@ -217,17 +217,17 @@
217#define ION_DEVICE_ID_MT4X56USB 0x1403 // OEM device 217#define ION_DEVICE_ID_MT4X56USB 0x1403 // OEM device
218 218
219 219
220#define GENERATION_ID_FROM_USB_PRODUCT_ID( ProductId ) \ 220#define GENERATION_ID_FROM_USB_PRODUCT_ID(ProductId) \
221 ( (__u16) ((ProductId >> 8) & (ION_GENERATION_MASK)) ) 221 ((__u16) ((ProductId >> 8) & (ION_GENERATION_MASK)))
222 222
223#define MAKE_USB_PRODUCT_ID( OemId, DeviceId ) \ 223#define MAKE_USB_PRODUCT_ID(OemId, DeviceId) \
224 ( (__u16) (((OemId) << 10) || (DeviceId)) ) 224 ((__u16) (((OemId) << 10) || (DeviceId)))
225 225
226#define DEVICE_ID_FROM_USB_PRODUCT_ID( ProductId ) \ 226#define DEVICE_ID_FROM_USB_PRODUCT_ID(ProductId) \
227 ( (__u16) ((ProductId) & (EDGEPORT_DEVICE_ID_MASK)) ) 227 ((__u16) ((ProductId) & (EDGEPORT_DEVICE_ID_MASK)))
228 228
229#define OEM_ID_FROM_USB_PRODUCT_ID( ProductId ) \ 229#define OEM_ID_FROM_USB_PRODUCT_ID(ProductId) \
230 ( (__u16) (((ProductId) >> 10) & 0x3F) ) 230 ((__u16) (((ProductId) >> 10) & 0x3F))
231 231
232// 232//
233// Definitions of parameters for download code. Note that these are 233// Definitions of parameters for download code. Note that these are
@@ -237,7 +237,7 @@
237 237
238// TxCredits value below which driver won't bother sending (to prevent too many small writes). 238// TxCredits value below which driver won't bother sending (to prevent too many small writes).
239// Send only if above 25% 239// Send only if above 25%
240#define EDGE_FW_GET_TX_CREDITS_SEND_THRESHOLD(InitialCredit, MaxPacketSize) (max( ((InitialCredit) / 4), (MaxPacketSize) )) 240#define EDGE_FW_GET_TX_CREDITS_SEND_THRESHOLD(InitialCredit, MaxPacketSize) (max(((InitialCredit) / 4), (MaxPacketSize)))
241 241
242#define EDGE_FW_BULK_MAX_PACKET_SIZE 64 // Max Packet Size for Bulk In Endpoint (EP1) 242#define EDGE_FW_BULK_MAX_PACKET_SIZE 64 // Max Packet Size for Bulk In Endpoint (EP1)
243#define EDGE_FW_BULK_READ_BUFFER_SIZE 1024 // Size to use for Bulk reads 243#define EDGE_FW_BULK_READ_BUFFER_SIZE 1024 // Size to use for Bulk reads
@@ -263,7 +263,7 @@
263// wValue = 16-bit address 263// wValue = 16-bit address
264// wIndex = unused (though we could put segment 00: or FF: here) 264// wIndex = unused (though we could put segment 00: or FF: here)
265// wLength = # bytes to read/write (max 64) 265// wLength = # bytes to read/write (max 64)
266// 266//
267 267
268#define USB_REQUEST_ION_RESET_DEVICE 0 // Warm reboot Edgeport, retaining USB address 268#define USB_REQUEST_ION_RESET_DEVICE 0 // Warm reboot Edgeport, retaining USB address
269#define USB_REQUEST_ION_GET_EPIC_DESC 1 // Get Edgeport Compatibility Descriptor 269#define USB_REQUEST_ION_GET_EPIC_DESC 1 // Get Edgeport Compatibility Descriptor
@@ -278,7 +278,7 @@
278#define USB_REQUEST_ION_ENABLE_SUSPEND 9 // Enable/Disable suspend feature 278#define USB_REQUEST_ION_ENABLE_SUSPEND 9 // Enable/Disable suspend feature
279 // (wValue != 0: Enable; wValue = 0: Disable) 279 // (wValue != 0: Enable; wValue = 0: Disable)
280 280
281#define USB_REQUEST_ION_SEND_IOSP 10 // Send an IOSP command to the edgeport over the control pipe 281#define USB_REQUEST_ION_SEND_IOSP 10 // Send an IOSP command to the edgeport over the control pipe
282#define USB_REQUEST_ION_RECV_IOSP 11 // Receive an IOSP command from the edgeport over the control pipe 282#define USB_REQUEST_ION_RECV_IOSP 11 // Receive an IOSP command from the edgeport over the control pipe
283 283
284 284
@@ -301,8 +301,7 @@
301// this is a "real" Edgeport. 301// this is a "real" Edgeport.
302// 302//
303 303
304struct edge_compatibility_bits 304struct edge_compatibility_bits {
305{
306 // This __u32 defines which Vendor-specific commands/functionality 305 // This __u32 defines which Vendor-specific commands/functionality
307 // the device supports on the default EP0 pipe. 306 // the device supports on the default EP0 pipe.
308 307
@@ -334,24 +333,22 @@ struct edge_compatibility_bits
334 __u32 TrueEdgeport : 1; // 0001 Set if device is a 'real' Edgeport 333 __u32 TrueEdgeport : 1; // 0001 Set if device is a 'real' Edgeport
335 // (Used only by driver, NEVER set by an EPiC device) 334 // (Used only by driver, NEVER set by an EPiC device)
336 __u32 GenUnused : 31; // Available for future expansion, must be 0 335 __u32 GenUnused : 31; // Available for future expansion, must be 0
337
338}; 336};
339 337
340#define EDGE_COMPATIBILITY_MASK0 0x0001 338#define EDGE_COMPATIBILITY_MASK0 0x0001
341#define EDGE_COMPATIBILITY_MASK1 0x3FFF 339#define EDGE_COMPATIBILITY_MASK1 0x3FFF
342#define EDGE_COMPATIBILITY_MASK2 0x0001 340#define EDGE_COMPATIBILITY_MASK2 0x0001
343 341
344struct edge_compatibility_descriptor 342struct edge_compatibility_descriptor {
345{
346 __u8 Length; // Descriptor Length (per USB spec) 343 __u8 Length; // Descriptor Length (per USB spec)
347 __u8 DescType; // Descriptor Type (per USB spec, =DEVICE type) 344 __u8 DescType; // Descriptor Type (per USB spec, =DEVICE type)
348 __u8 EpicVer; // Version of EPiC spec supported 345 __u8 EpicVer; // Version of EPiC spec supported
349 // (Currently must be 1) 346 // (Currently must be 1)
350 __u8 NumPorts; // Number of serial ports supported 347 __u8 NumPorts; // Number of serial ports supported
351 __u8 iDownloadFile; // Index of string containing download code filename 348 __u8 iDownloadFile; // Index of string containing download code filename
352 // 0=no download, FF=download compiled into driver. 349 // 0=no download, FF=download compiled into driver.
353 __u8 Unused[ 3 ]; // Available for future expansion, must be 0 350 __u8 Unused[3]; // Available for future expansion, must be 0
354 // (Currently must be 0). 351 // (Currently must be 0).
355 __u8 MajorVersion; // Firmware version: xx. 352 __u8 MajorVersion; // Firmware version: xx.
356 __u8 MinorVersion; // yy. 353 __u8 MinorVersion; // yy.
357 __le16 BuildNumber; // zzzz (LE format) 354 __le16 BuildNumber; // zzzz (LE format)
@@ -359,9 +356,7 @@ struct edge_compatibility_descriptor
359 // The following structure contains __u32s, with each bit 356 // The following structure contains __u32s, with each bit
360 // specifying whether the EPiC device supports the given 357 // specifying whether the EPiC device supports the given
361 // command or functionality. 358 // command or functionality.
362
363 struct edge_compatibility_bits Supports; 359 struct edge_compatibility_bits Supports;
364
365}; 360};
366 361
367// Values for iDownloadFile 362// Values for iDownloadFile
@@ -391,8 +386,8 @@ struct edge_compatibility_descriptor
391 386
392// Define the max block size that may be read or written 387// Define the max block size that may be read or written
393// in a read/write RAM/ROM command. 388// in a read/write RAM/ROM command.
394#define MAX_SIZE_REQ_ION_READ_MEM ( (__u16) 64 ) 389#define MAX_SIZE_REQ_ION_READ_MEM ((__u16)64)
395#define MAX_SIZE_REQ_ION_WRITE_MEM ( (__u16) 64 ) 390#define MAX_SIZE_REQ_ION_WRITE_MEM ((__u16)64)
396 391
397 392
398// 393//
@@ -545,7 +540,7 @@ struct edge_boot_descriptor {
545 __u8 MajorVersion; // C6 Firmware version: xx. 540 __u8 MajorVersion; // C6 Firmware version: xx.
546 __u8 MinorVersion; // C7 yy. 541 __u8 MinorVersion; // C7 yy.
547 __le16 BuildNumber; // C8 zzzz (LE format) 542 __le16 BuildNumber; // C8 zzzz (LE format)
548 543
549 __u16 EnumRootDescTable; // CA Root of ROM-based descriptor table 544 __u16 EnumRootDescTable; // CA Root of ROM-based descriptor table
550 __u8 NumDescTypes; // CC Number of supported descriptor types 545 __u8 NumDescTypes; // CC Number of supported descriptor types
551 546
@@ -597,41 +592,36 @@ struct edge_boot_descriptor {
597#define I2C_DESC_TYPE_ION 0 // Not defined by TI 592#define I2C_DESC_TYPE_ION 0 // Not defined by TI
598 593
599 594
600struct ti_i2c_desc 595struct ti_i2c_desc {
601{
602 __u8 Type; // Type of descriptor 596 __u8 Type; // Type of descriptor
603 __u16 Size; // Size of data only not including header 597 __u16 Size; // Size of data only not including header
604 __u8 CheckSum; // Checksum (8 bit sum of data only) 598 __u8 CheckSum; // Checksum (8 bit sum of data only)
605 __u8 Data[0]; // Data starts here 599 __u8 Data[0]; // Data starts here
606}__attribute__((packed)); 600} __attribute__((packed));
607 601
608// for 5152 devices only (type 2 record) 602// for 5152 devices only (type 2 record)
609// for 3410 the version is stored in the WATCHPORT_FIRMWARE_VERSION descriptor 603// for 3410 the version is stored in the WATCHPORT_FIRMWARE_VERSION descriptor
610struct ti_i2c_firmware_rec 604struct ti_i2c_firmware_rec {
611{
612 __u8 Ver_Major; // Firmware Major version number 605 __u8 Ver_Major; // Firmware Major version number
613 __u8 Ver_Minor; // Firmware Minor version number 606 __u8 Ver_Minor; // Firmware Minor version number
614 __u8 Data[0]; // Download starts here 607 __u8 Data[0]; // Download starts here
615}__attribute__((packed)); 608} __attribute__((packed));
616 609
617 610
618struct watchport_firmware_version 611struct watchport_firmware_version {
619{
620// Added 2 bytes for version number 612// Added 2 bytes for version number
621 __u8 Version_Major; // Download Version (for Watchport) 613 __u8 Version_Major; // Download Version (for Watchport)
622 __u8 Version_Minor; 614 __u8 Version_Minor;
623}__attribute__((packed)); 615} __attribute__((packed));
624 616
625 617
626// Structure of header of download image in fw_down.h 618// Structure of header of download image in fw_down.h
627struct ti_i2c_image_header 619struct ti_i2c_image_header {
628{
629 __le16 Length; 620 __le16 Length;
630 __u8 CheckSum; 621 __u8 CheckSum;
631}__attribute__((packed)); 622} __attribute__((packed));
632 623
633struct ti_basic_descriptor 624struct ti_basic_descriptor {
634{
635 __u8 Power; // Self powered 625 __u8 Power; // Self powered
636 // bit 7: 1 - power switching supported 626 // bit 7: 1 - power switching supported
637 // 0 - power switching not supported 627 // 0 - power switching not supported
@@ -663,9 +653,9 @@ struct ti_basic_descriptor
663#define TI_I2C_SIZE_MASK 0x1f // 5 bits 653#define TI_I2C_SIZE_MASK 0x1f // 5 bits
664#define TI_GET_I2C_SIZE(x) ((((x) & TI_I2C_SIZE_MASK)+1)*256) 654#define TI_GET_I2C_SIZE(x) ((((x) & TI_I2C_SIZE_MASK)+1)*256)
665 655
666#define TI_MAX_I2C_SIZE ( 16 * 1024 ) 656#define TI_MAX_I2C_SIZE (16 * 1024)
667 657
668#define TI_MANUF_VERSION_0 0 658#define TI_MANUF_VERSION_0 0
669 659
670// IonConig2 flags 660// IonConig2 flags
671#define TI_CONFIG2_RS232 0x01 661#define TI_CONFIG2_RS232 0x01
@@ -676,8 +666,7 @@ struct ti_basic_descriptor
676#define TI_CONFIG2_WATCHPORT 0x10 666#define TI_CONFIG2_WATCHPORT 0x10
677 667
678 668
679struct edge_ti_manuf_descriptor 669struct edge_ti_manuf_descriptor {
680{
681 __u8 IonConfig; // Config byte for ION manufacturing use 670 __u8 IonConfig; // Config byte for ION manufacturing use
682 __u8 IonConfig2; // Expansion 671 __u8 IonConfig2; // Expansion
683 __u8 Version; // Version 672 __u8 Version; // Version
@@ -688,7 +677,7 @@ struct edge_ti_manuf_descriptor
688 __u8 HubConfig2; // Used to configure the Hub 677 __u8 HubConfig2; // Used to configure the Hub
689 __u8 TotalPorts; // Total Number of Com Ports for the entire device (All UMPs) 678 __u8 TotalPorts; // Total Number of Com Ports for the entire device (All UMPs)
690 __u8 Reserved; // Reserved 679 __u8 Reserved; // Reserved
691}__attribute__((packed)); 680} __attribute__((packed));
692 681
693 682
694#endif // if !defined(_USBVEND_H) 683#endif // if !defined(_USBVEND_H)
generated by cgit v1.2.2 (git 2.25.0) at 2025-01-08 14:00:53 -0500