diff options
author | Chuanxiao Dong <chuanxiao.dong@intel.com> | 2010-07-26 22:48:34 -0400 |
---|---|---|
committer | David Woodhouse <David.Woodhouse@intel.com> | 2010-08-05 11:31:54 -0400 |
commit | bf1806ddee9a872a70dfe403fa591328edd3ea5d (patch) | |
tree | e8b994713d9d2b4cfc78c4ad3fb4c7eddffc05e5 /drivers | |
parent | 345b1d3b46fa1b7b2bf5d27bef6ea4c4dbf08731 (diff) |
mtd: denali.c: add and update KERN_ facility level in printk()
Signed-off-by: Chuanxiao Dong <chuanxiao.dong@intel.com>
Signed-off-by: David Woodhouse <David.Woodhouse@intel.com>
Diffstat (limited to 'drivers')
-rw-r--r-- | drivers/mtd/nand/denali.c | 32 |
1 files changed, 16 insertions, 16 deletions
diff --git a/drivers/mtd/nand/denali.c b/drivers/mtd/nand/denali.c index f850a6516bc9..55a7a3940113 100644 --- a/drivers/mtd/nand/denali.c +++ b/drivers/mtd/nand/denali.c | |||
@@ -138,7 +138,7 @@ static void denali_write32(uint32_t value, void *addr) | |||
138 | iowrite32(value, addr); | 138 | iowrite32(value, addr); |
139 | 139 | ||
140 | #if DEBUG_DENALI | 140 | #if DEBUG_DENALI |
141 | printk(KERN_ERR "wrote: 0x%x -> 0x%x\n", value, (uint32_t)((uint32_t)addr & 0x1fff)); | 141 | printk(KERN_INFO "wrote: 0x%x -> 0x%x\n", value, (uint32_t)((uint32_t)addr & 0x1fff)); |
142 | #endif | 142 | #endif |
143 | } | 143 | } |
144 | 144 | ||
@@ -191,7 +191,7 @@ static void read_status(struct denali_nand_info *denali) | |||
191 | write_byte_to_buf(denali, ioread32(denali->flash_mem + 0x10)); | 191 | write_byte_to_buf(denali, ioread32(denali->flash_mem + 0x10)); |
192 | 192 | ||
193 | #if DEBUG_DENALI | 193 | #if DEBUG_DENALI |
194 | printk("device reporting status value of 0x%2x\n", denali->buf.buf[0]); | 194 | printk(KERN_INFO "device reporting status value of 0x%2x\n", denali->buf.buf[0]); |
195 | #endif | 195 | #endif |
196 | } | 196 | } |
197 | 197 | ||
@@ -989,9 +989,9 @@ static void print_irq_log(struct denali_nand_info *denali) | |||
989 | { | 989 | { |
990 | int i = 0; | 990 | int i = 0; |
991 | 991 | ||
992 | printk("ISR debug log index = %X\n", denali->idx); | 992 | printk(KERN_INFO "ISR debug log index = %X\n", denali->idx); |
993 | for (i = 0; i < 32; i++) | 993 | for (i = 0; i < 32; i++) |
994 | printk("%08X: %08X\n", i, denali->irq_debug_array[i]); | 994 | printk(KERN_INFO "%08X: %08X\n", i, denali->irq_debug_array[i]); |
995 | } | 995 | } |
996 | #endif | 996 | #endif |
997 | 997 | ||
@@ -1018,7 +1018,7 @@ static irqreturn_t denali_isr(int irq, void *dev_id) | |||
1018 | denali->irq_debug_array[denali->idx++] = 0x10000000 | irq_status; | 1018 | denali->irq_debug_array[denali->idx++] = 0x10000000 | irq_status; |
1019 | denali->idx %= 32; | 1019 | denali->idx %= 32; |
1020 | 1020 | ||
1021 | printk("IRQ status = 0x%04x\n", irq_status); | 1021 | printk(KERN_INFO "IRQ status = 0x%04x\n", irq_status); |
1022 | #endif | 1022 | #endif |
1023 | /* handle interrupt */ | 1023 | /* handle interrupt */ |
1024 | /* first acknowledge it */ | 1024 | /* first acknowledge it */ |
@@ -1046,7 +1046,7 @@ static uint32_t wait_for_irq(struct denali_nand_info *denali, uint32_t irq_mask) | |||
1046 | 1046 | ||
1047 | do { | 1047 | do { |
1048 | #if DEBUG_DENALI | 1048 | #if DEBUG_DENALI |
1049 | printk("waiting for 0x%x\n", irq_mask); | 1049 | printk(KERN_INFO "waiting for 0x%x\n", irq_mask); |
1050 | #endif | 1050 | #endif |
1051 | comp_res = wait_for_completion_timeout(&denali->complete, timeout); | 1051 | comp_res = wait_for_completion_timeout(&denali->complete, timeout); |
1052 | spin_lock_irq(&denali->irq_lock); | 1052 | spin_lock_irq(&denali->irq_lock); |
@@ -1061,7 +1061,7 @@ static uint32_t wait_for_irq(struct denali_nand_info *denali, uint32_t irq_mask) | |||
1061 | denali->irq_status &= ~irq_mask; | 1061 | denali->irq_status &= ~irq_mask; |
1062 | spin_unlock_irq(&denali->irq_lock); | 1062 | spin_unlock_irq(&denali->irq_lock); |
1063 | #if DEBUG_DENALI | 1063 | #if DEBUG_DENALI |
1064 | if (retry) printk("status on retry = 0x%x\n", intr_status); | 1064 | if (retry) printk(KERN_INFO "status on retry = 0x%x\n", intr_status); |
1065 | #endif | 1065 | #endif |
1066 | /* our interrupt was detected */ | 1066 | /* our interrupt was detected */ |
1067 | break; | 1067 | break; |
@@ -1071,7 +1071,7 @@ static uint32_t wait_for_irq(struct denali_nand_info *denali, uint32_t irq_mask) | |||
1071 | spin_unlock_irq(&denali->irq_lock); | 1071 | spin_unlock_irq(&denali->irq_lock); |
1072 | #if DEBUG_DENALI | 1072 | #if DEBUG_DENALI |
1073 | print_irq_log(denali); | 1073 | print_irq_log(denali); |
1074 | printk("received irq nobody cared: irq_status = 0x%x," | 1074 | printk(KERN_INFO "received irq nobody cared: irq_status = 0x%x," |
1075 | " irq_mask = 0x%x, timeout = %ld\n", intr_status, irq_mask, comp_res); | 1075 | " irq_mask = 0x%x, timeout = %ld\n", intr_status, irq_mask, comp_res); |
1076 | #endif | 1076 | #endif |
1077 | retry = true; | 1077 | retry = true; |
@@ -1263,7 +1263,7 @@ static void read_oob_data(struct mtd_info *mtd, uint8_t *buf, int page) | |||
1263 | denali->page = page; | 1263 | denali->page = page; |
1264 | 1264 | ||
1265 | #if DEBUG_DENALI | 1265 | #if DEBUG_DENALI |
1266 | printk("read_oob %d\n", page); | 1266 | printk(KERN_INFO "read_oob %d\n", page); |
1267 | #endif | 1267 | #endif |
1268 | if (denali_send_pipeline_cmd(denali, false, true, SPARE_ACCESS, | 1268 | if (denali_send_pipeline_cmd(denali, false, true, SPARE_ACCESS, |
1269 | DENALI_READ) == PASS) { | 1269 | DENALI_READ) == PASS) { |
@@ -1364,7 +1364,7 @@ static bool handle_ecc(struct denali_nand_info *denali, uint8_t *buf, | |||
1364 | } | 1364 | } |
1365 | 1365 | ||
1366 | #if DEBUG_DENALI | 1366 | #if DEBUG_DENALI |
1367 | printk("Detected ECC error in page %d: err_addr = 0x%08x," | 1367 | printk(KERN_INFO "Detected ECC error in page %d: err_addr = 0x%08x," |
1368 | " info to fix is 0x%08x\n", denali->page, err_address, | 1368 | " info to fix is 0x%08x\n", denali->page, err_address, |
1369 | err_correction_info); | 1369 | err_correction_info); |
1370 | #endif | 1370 | #endif |
@@ -1589,7 +1589,7 @@ static uint8_t denali_read_byte(struct mtd_info *mtd) | |||
1589 | result = denali->buf.buf[denali->buf.head++]; | 1589 | result = denali->buf.buf[denali->buf.head++]; |
1590 | 1590 | ||
1591 | #if DEBUG_DENALI | 1591 | #if DEBUG_DENALI |
1592 | printk("read byte -> 0x%02x\n", result); | 1592 | printk(KERN_INFO "read byte -> 0x%02x\n", result); |
1593 | #endif | 1593 | #endif |
1594 | return result; | 1594 | return result; |
1595 | } | 1595 | } |
@@ -1598,7 +1598,7 @@ static void denali_select_chip(struct mtd_info *mtd, int chip) | |||
1598 | { | 1598 | { |
1599 | struct denali_nand_info *denali = mtd_to_denali(mtd); | 1599 | struct denali_nand_info *denali = mtd_to_denali(mtd); |
1600 | #if DEBUG_DENALI | 1600 | #if DEBUG_DENALI |
1601 | printk("denali select chip %d\n", chip); | 1601 | printk(KERN_INFO "denali select chip %d\n", chip); |
1602 | #endif | 1602 | #endif |
1603 | spin_lock_irq(&denali->irq_lock); | 1603 | spin_lock_irq(&denali->irq_lock); |
1604 | denali->flash_bank = chip; | 1604 | denali->flash_bank = chip; |
@@ -1612,7 +1612,7 @@ static int denali_waitfunc(struct mtd_info *mtd, struct nand_chip *chip) | |||
1612 | denali->status = 0; | 1612 | denali->status = 0; |
1613 | 1613 | ||
1614 | #if DEBUG_DENALI | 1614 | #if DEBUG_DENALI |
1615 | printk("waitfunc %d\n", status); | 1615 | printk(KERN_INFO "waitfunc %d\n", status); |
1616 | #endif | 1616 | #endif |
1617 | return status; | 1617 | return status; |
1618 | } | 1618 | } |
@@ -1624,7 +1624,7 @@ static void denali_erase(struct mtd_info *mtd, int page) | |||
1624 | uint32_t cmd = 0x0, irq_status = 0; | 1624 | uint32_t cmd = 0x0, irq_status = 0; |
1625 | 1625 | ||
1626 | #if DEBUG_DENALI | 1626 | #if DEBUG_DENALI |
1627 | printk("erase page: %d\n", page); | 1627 | printk(KERN_INFO "erase page: %d\n", page); |
1628 | #endif | 1628 | #endif |
1629 | /* clear interrupts */ | 1629 | /* clear interrupts */ |
1630 | clear_interrupts(denali); | 1630 | clear_interrupts(denali); |
@@ -1647,7 +1647,7 @@ static void denali_cmdfunc(struct mtd_info *mtd, unsigned int cmd, int col, | |||
1647 | struct denali_nand_info *denali = mtd_to_denali(mtd); | 1647 | struct denali_nand_info *denali = mtd_to_denali(mtd); |
1648 | 1648 | ||
1649 | #if DEBUG_DENALI | 1649 | #if DEBUG_DENALI |
1650 | printk("cmdfunc: 0x%x %d %d\n", cmd, col, page); | 1650 | printk(KERN_INFO "cmdfunc: 0x%x %d %d\n", cmd, col, page); |
1651 | #endif | 1651 | #endif |
1652 | switch (cmd) { | 1652 | switch (cmd) { |
1653 | case NAND_CMD_PAGEPROG: | 1653 | case NAND_CMD_PAGEPROG: |
@@ -1824,7 +1824,7 @@ static int denali_pci_probe(struct pci_dev *dev, const struct pci_device_id *id) | |||
1824 | * ONFI timing mode 1 and below. | 1824 | * ONFI timing mode 1 and below. |
1825 | */ | 1825 | */ |
1826 | if (onfi_timing_mode < -1 || onfi_timing_mode > 1) { | 1826 | if (onfi_timing_mode < -1 || onfi_timing_mode > 1) { |
1827 | printk("Intel CE4100 only supports ONFI timing mode 1 " | 1827 | printk(KERN_ERR "Intel CE4100 only supports ONFI timing mode 1 " |
1828 | "or below\n"); | 1828 | "or below\n"); |
1829 | ret = -EINVAL; | 1829 | ret = -EINVAL; |
1830 | goto failed_enable; | 1830 | goto failed_enable; |