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authorOskar Schirmer <os@emlix.com>2009-04-02 07:19:07 -0400
committerBen Dooks <ben-linux@fluff.org>2009-04-07 05:23:34 -0400
commitb486ddbc0fb8127ccf2c820cfbf0b98e6f8a4e97 (patch)
treee13edcaaae7198a8e31c1ed8305498e3acf7b482 /drivers
parentc724d67dfff3bd547d2768b450af8d3b9f83bb27 (diff)
i2c: xtensa s6000 i2c driver
Support for the s6000 on-chip i2c controller. Signed-off-by: Oskar Schirmer <os@emlix.com> Signed-off-by: Daniel Glöckner <dg@emlix.com> Signed-off-by: Ben Dooks <ben-linux@fluff.org>
Diffstat (limited to 'drivers')
-rw-r--r--drivers/i2c/busses/Kconfig10
-rw-r--r--drivers/i2c/busses/Makefile1
-rw-r--r--drivers/i2c/busses/i2c-s6000.c407
-rw-r--r--drivers/i2c/busses/i2c-s6000.h79
4 files changed, 497 insertions, 0 deletions
diff --git a/drivers/i2c/busses/Kconfig b/drivers/i2c/busses/Kconfig
index 5d4aa5e873ca..94eae5c3cbc7 100644
--- a/drivers/i2c/busses/Kconfig
+++ b/drivers/i2c/busses/Kconfig
@@ -472,6 +472,16 @@ config I2C_S3C2410
472 Say Y here to include support for I2C controller in the 472 Say Y here to include support for I2C controller in the
473 Samsung S3C2410 based System-on-Chip devices. 473 Samsung S3C2410 based System-on-Chip devices.
474 474
475config I2C_S6000
476 tristate "S6000 I2C support"
477 depends on XTENSA_VARIANT_S6000
478 help
479 This driver supports the on chip I2C device on the
480 S6000 xtensa processor family.
481
482 To compile this driver as a module, choose M here. The module
483 will be called i2c-s6000.
484
475config I2C_SH7760 485config I2C_SH7760
476 tristate "Renesas SH7760 I2C Controller" 486 tristate "Renesas SH7760 I2C Controller"
477 depends on CPU_SUBTYPE_SH7760 487 depends on CPU_SUBTYPE_SH7760
diff --git a/drivers/i2c/busses/Makefile b/drivers/i2c/busses/Makefile
index 657ab2428011..776acb6403a7 100644
--- a/drivers/i2c/busses/Makefile
+++ b/drivers/i2c/busses/Makefile
@@ -44,6 +44,7 @@ obj-$(CONFIG_I2C_PASEMI) += i2c-pasemi.o
44obj-$(CONFIG_I2C_PNX) += i2c-pnx.o 44obj-$(CONFIG_I2C_PNX) += i2c-pnx.o
45obj-$(CONFIG_I2C_PXA) += i2c-pxa.o 45obj-$(CONFIG_I2C_PXA) += i2c-pxa.o
46obj-$(CONFIG_I2C_S3C2410) += i2c-s3c2410.o 46obj-$(CONFIG_I2C_S3C2410) += i2c-s3c2410.o
47obj-$(CONFIG_I2C_S6000) += i2c-s6000.o
47obj-$(CONFIG_I2C_SH7760) += i2c-sh7760.o 48obj-$(CONFIG_I2C_SH7760) += i2c-sh7760.o
48obj-$(CONFIG_I2C_SH_MOBILE) += i2c-sh_mobile.o 49obj-$(CONFIG_I2C_SH_MOBILE) += i2c-sh_mobile.o
49obj-$(CONFIG_I2C_SIMTEC) += i2c-simtec.o 50obj-$(CONFIG_I2C_SIMTEC) += i2c-simtec.o
diff --git a/drivers/i2c/busses/i2c-s6000.c b/drivers/i2c/busses/i2c-s6000.c
new file mode 100644
index 000000000000..c91359f4965c
--- /dev/null
+++ b/drivers/i2c/busses/i2c-s6000.c
@@ -0,0 +1,407 @@
1/*
2 * drivers/i2c/busses/i2c-s6000.c
3 *
4 * Description: Driver for S6000 Family I2C Interface
5 * Copyright (c) 2008 emlix GmbH
6 * Author: Oskar Schirmer <os@emlix.com>
7 *
8 * Partially based on i2c-bfin-twi.c driver by <sonic.zhang@analog.com>
9 * Copyright (c) 2005-2007 Analog Devices, Inc.
10 *
11 * This program is free software; you can redistribute it and/or modify
12 * it under the terms of the GNU General Public License as published by
13 * the Free Software Foundation; either version 2 of the License, or
14 * (at your option) any later version.
15 *
16 * This program is distributed in the hope that it will be useful,
17 * but WITHOUT ANY WARRANTY; without even the implied warranty of
18 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
19 * GNU General Public License for more details.
20 *
21 * You should have received a copy of the GNU General Public License
22 * along with this program; if not, write to the Free Software
23 * Foundation, Inc., 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA
24 */
25
26#include <linux/clk.h>
27#include <linux/err.h>
28#include <linux/module.h>
29#include <linux/kernel.h>
30#include <linux/init.h>
31#include <linux/delay.h>
32#include <linux/i2c.h>
33#include <linux/i2c/s6000.h>
34#include <linux/timer.h>
35#include <linux/spinlock.h>
36#include <linux/completion.h>
37#include <linux/interrupt.h>
38#include <linux/platform_device.h>
39
40#include <asm/io.h>
41#include "i2c-s6000.h"
42
43#define DRV_NAME "i2c-s6000"
44
45#define POLL_TIMEOUT (2 * HZ)
46
47struct s6i2c_if {
48 u8 __iomem *reg; /* memory mapped registers */
49 int irq;
50 spinlock_t lock;
51 struct i2c_msg *msgs; /* messages currently handled */
52 int msgs_num; /* nb of msgs to do */
53 int msgs_push; /* nb of msgs read/written */
54 int msgs_done; /* nb of msgs finally handled */
55 unsigned push; /* nb of bytes read/written in msg */
56 unsigned done; /* nb of bytes finally handled */
57 int timeout_count; /* timeout retries left */
58 struct timer_list timeout_timer;
59 struct i2c_adapter adap;
60 struct completion complete;
61 struct clk *clk;
62 struct resource *res;
63};
64
65static inline u16 i2c_rd16(struct s6i2c_if *iface, unsigned n)
66{
67 return readw(iface->reg + (n));
68}
69
70static inline void i2c_wr16(struct s6i2c_if *iface, unsigned n, u16 v)
71{
72 writew(v, iface->reg + (n));
73}
74
75static inline u32 i2c_rd32(struct s6i2c_if *iface, unsigned n)
76{
77 return readl(iface->reg + (n));
78}
79
80static inline void i2c_wr32(struct s6i2c_if *iface, unsigned n, u32 v)
81{
82 writel(v, iface->reg + (n));
83}
84
85static struct s6i2c_if s6i2c_if;
86
87static void s6i2c_handle_interrupt(struct s6i2c_if *iface)
88{
89 if (i2c_rd16(iface, S6_I2C_INTRSTAT) & (1 << S6_I2C_INTR_TXABRT)) {
90 i2c_rd16(iface, S6_I2C_CLRTXABRT);
91 i2c_wr16(iface, S6_I2C_INTRMASK, 0);
92 complete(&iface->complete);
93 return;
94 }
95 if (iface->msgs_done >= iface->msgs_num) {
96 dev_err(&iface->adap.dev, "s6i2c: spurious I2C irq: %04x\n",
97 i2c_rd16(iface, S6_I2C_INTRSTAT));
98 i2c_wr16(iface, S6_I2C_INTRMASK, 0);
99 return;
100 }
101 while ((iface->msgs_push < iface->msgs_num)
102 && (i2c_rd16(iface, S6_I2C_STATUS) & (1 << S6_I2C_STATUS_TFNF))) {
103 struct i2c_msg *m = &iface->msgs[iface->msgs_push];
104 if (!(m->flags & I2C_M_RD))
105 i2c_wr16(iface, S6_I2C_DATACMD, m->buf[iface->push]);
106 else
107 i2c_wr16(iface, S6_I2C_DATACMD,
108 1 << S6_I2C_DATACMD_READ);
109 if (++iface->push >= m->len) {
110 iface->push = 0;
111 iface->msgs_push += 1;
112 }
113 }
114 do {
115 struct i2c_msg *m = &iface->msgs[iface->msgs_done];
116 if (!(m->flags & I2C_M_RD)) {
117 if (iface->msgs_done < iface->msgs_push)
118 iface->msgs_done += 1;
119 else
120 break;
121 } else if (i2c_rd16(iface, S6_I2C_STATUS)
122 & (1 << S6_I2C_STATUS_RFNE)) {
123 m->buf[iface->done] = i2c_rd16(iface, S6_I2C_DATACMD);
124 if (++iface->done >= m->len) {
125 iface->done = 0;
126 iface->msgs_done += 1;
127 }
128 } else{
129 break;
130 }
131 } while (iface->msgs_done < iface->msgs_num);
132 if (iface->msgs_done >= iface->msgs_num) {
133 i2c_wr16(iface, S6_I2C_INTRMASK, 1 << S6_I2C_INTR_TXABRT);
134 complete(&iface->complete);
135 } else if (iface->msgs_push >= iface->msgs_num) {
136 i2c_wr16(iface, S6_I2C_INTRMASK, (1 << S6_I2C_INTR_TXABRT) |
137 (1 << S6_I2C_INTR_RXFULL));
138 } else {
139 i2c_wr16(iface, S6_I2C_INTRMASK, (1 << S6_I2C_INTR_TXABRT) |
140 (1 << S6_I2C_INTR_TXEMPTY) |
141 (1 << S6_I2C_INTR_RXFULL));
142 }
143}
144
145static irqreturn_t s6i2c_interrupt_entry(int irq, void *dev_id)
146{
147 struct s6i2c_if *iface = dev_id;
148 if (!(i2c_rd16(iface, S6_I2C_STATUS) & ((1 << S6_I2C_INTR_RXUNDER)
149 | (1 << S6_I2C_INTR_RXOVER)
150 | (1 << S6_I2C_INTR_RXFULL)
151 | (1 << S6_I2C_INTR_TXOVER)
152 | (1 << S6_I2C_INTR_TXEMPTY)
153 | (1 << S6_I2C_INTR_RDREQ)
154 | (1 << S6_I2C_INTR_TXABRT)
155 | (1 << S6_I2C_INTR_RXDONE)
156 | (1 << S6_I2C_INTR_ACTIVITY)
157 | (1 << S6_I2C_INTR_STOPDET)
158 | (1 << S6_I2C_INTR_STARTDET)
159 | (1 << S6_I2C_INTR_GENCALL))))
160 return IRQ_NONE;
161
162 spin_lock(&iface->lock);
163 del_timer(&iface->timeout_timer);
164 s6i2c_handle_interrupt(iface);
165 spin_unlock(&iface->lock);
166 return IRQ_HANDLED;
167}
168
169static void s6i2c_timeout(unsigned long data)
170{
171 struct s6i2c_if *iface = (struct s6i2c_if *)data;
172 unsigned long flags;
173
174 spin_lock_irqsave(&iface->lock, flags);
175 s6i2c_handle_interrupt(iface);
176 if (--iface->timeout_count > 0) {
177 iface->timeout_timer.expires = jiffies + POLL_TIMEOUT;
178 add_timer(&iface->timeout_timer);
179 } else {
180 complete(&iface->complete);
181 i2c_wr16(iface, S6_I2C_INTRMASK, 0);
182 }
183 spin_unlock_irqrestore(&iface->lock, flags);
184}
185
186static int s6i2c_master_xfer(struct i2c_adapter *adap,
187 struct i2c_msg *msgs, int num)
188{
189 struct s6i2c_if *iface = adap->algo_data;
190 int i;
191 if (num == 0)
192 return 0;
193 if (i2c_rd16(iface, S6_I2C_STATUS) & (1 << S6_I2C_STATUS_ACTIVITY))
194 yield();
195 i2c_wr16(iface, S6_I2C_INTRMASK, 0);
196 i2c_rd16(iface, S6_I2C_CLRINTR);
197 for (i = 0; i < num; i++) {
198 if (msgs[i].flags & I2C_M_TEN) {
199 dev_err(&adap->dev,
200 "s6i2c: 10 bits addr not supported\n");
201 return -EINVAL;
202 }
203 if (msgs[i].len == 0) {
204 dev_err(&adap->dev,
205 "s6i2c: zero length message not supported\n");
206 return -EINVAL;
207 }
208 if (msgs[i].addr != msgs[0].addr) {
209 dev_err(&adap->dev,
210 "s6i2c: multiple xfer cannot change target\n");
211 return -EINVAL;
212 }
213 }
214
215 iface->msgs = msgs;
216 iface->msgs_num = num;
217 iface->msgs_push = 0;
218 iface->msgs_done = 0;
219 iface->push = 0;
220 iface->done = 0;
221 iface->timeout_count = 10;
222 i2c_wr16(iface, S6_I2C_TAR, msgs[0].addr);
223 i2c_wr16(iface, S6_I2C_ENABLE, 1);
224 i2c_wr16(iface, S6_I2C_INTRMASK, (1 << S6_I2C_INTR_TXEMPTY) |
225 (1 << S6_I2C_INTR_TXABRT));
226
227 iface->timeout_timer.expires = jiffies + POLL_TIMEOUT;
228 add_timer(&iface->timeout_timer);
229 wait_for_completion(&iface->complete);
230 del_timer_sync(&iface->timeout_timer);
231 while (i2c_rd32(iface, S6_I2C_TXFLR) > 0)
232 schedule();
233 while (i2c_rd16(iface, S6_I2C_STATUS) & (1 << S6_I2C_STATUS_ACTIVITY))
234 schedule();
235
236 i2c_wr16(iface, S6_I2C_INTRMASK, 0);
237 i2c_wr16(iface, S6_I2C_ENABLE, 0);
238 return iface->msgs_done;
239}
240
241static u32 s6i2c_functionality(struct i2c_adapter *adap)
242{
243 return I2C_FUNC_I2C | I2C_FUNC_SMBUS_EMUL;
244}
245
246static struct i2c_algorithm s6i2c_algorithm = {
247 .master_xfer = s6i2c_master_xfer,
248 .functionality = s6i2c_functionality,
249};
250
251static u16 __devinit nanoseconds_on_clk(struct s6i2c_if *iface, u32 ns)
252{
253 u32 dividend = ((clk_get_rate(iface->clk) / 1000) * ns) / 1000000;
254 if (dividend > 0xffff)
255 return 0xffff;
256 return dividend;
257}
258
259static int __devinit s6i2c_probe(struct platform_device *dev)
260{
261 struct s6i2c_if *iface = &s6i2c_if;
262 struct i2c_adapter *p_adap;
263 const char *clock;
264 int bus_num, rc;
265 spin_lock_init(&iface->lock);
266 init_completion(&iface->complete);
267 iface->irq = platform_get_irq(dev, 0);
268 if (iface->irq < 0) {
269 rc = iface->irq;
270 goto err_out;
271 }
272 iface->res = platform_get_resource(dev, IORESOURCE_MEM, 0);
273 if (!iface->res) {
274 rc = -ENXIO;
275 goto err_out;
276 }
277 iface->res = request_mem_region(iface->res->start,
278 resource_size(iface->res),
279 dev->dev.bus_id);
280 if (!iface->res) {
281 rc = -EBUSY;
282 goto err_out;
283 }
284 iface->reg = ioremap_nocache(iface->res->start,
285 resource_size(iface->res));
286 if (!iface->reg) {
287 rc = -ENOMEM;
288 goto err_reg;
289 }
290
291 clock = 0;
292 bus_num = -1;
293 if (dev->dev.platform_data) {
294 struct s6_i2c_platform_data *pdata = dev->dev.platform_data;
295 bus_num = pdata->bus_num;
296 clock = pdata->clock;
297 }
298 iface->clk = clk_get(&dev->dev, clock);
299 if (IS_ERR(iface->clk)) {
300 rc = PTR_ERR(iface->clk);
301 goto err_map;
302 }
303 rc = clk_enable(iface->clk);
304 if (rc < 0)
305 goto err_clk_put;
306 init_timer(&iface->timeout_timer);
307 iface->timeout_timer.function = s6i2c_timeout;
308 iface->timeout_timer.data = (unsigned long)iface;
309
310 p_adap = &iface->adap;
311 strlcpy(p_adap->name, dev->name, sizeof(p_adap->name));
312 p_adap->algo = &s6i2c_algorithm;
313 p_adap->algo_data = iface;
314 p_adap->nr = bus_num;
315 p_adap->class = 0;
316 p_adap->dev.parent = &dev->dev;
317 i2c_wr16(iface, S6_I2C_INTRMASK, 0);
318 rc = request_irq(iface->irq, s6i2c_interrupt_entry,
319 IRQF_SHARED, dev->name, iface);
320 if (rc) {
321 dev_err(&p_adap->dev, "s6i2c: cant get IRQ %d\n", iface->irq);
322 goto err_clk_dis;
323 }
324
325 i2c_wr16(iface, S6_I2C_ENABLE, 0);
326 udelay(1);
327 i2c_wr32(iface, S6_I2C_SRESET, 1 << S6_I2C_SRESET_IC_SRST);
328 i2c_wr16(iface, S6_I2C_CLRTXABRT, 1);
329 i2c_wr16(iface, S6_I2C_CON,
330 (1 << S6_I2C_CON_MASTER) |
331 (S6_I2C_CON_SPEED_NORMAL << S6_I2C_CON_SPEED) |
332 (0 << S6_I2C_CON_10BITSLAVE) |
333 (0 << S6_I2C_CON_10BITMASTER) |
334 (1 << S6_I2C_CON_RESTARTENA) |
335 (1 << S6_I2C_CON_SLAVEDISABLE));
336 i2c_wr16(iface, S6_I2C_SSHCNT, nanoseconds_on_clk(iface, 4000));
337 i2c_wr16(iface, S6_I2C_SSLCNT, nanoseconds_on_clk(iface, 4700));
338 i2c_wr16(iface, S6_I2C_FSHCNT, nanoseconds_on_clk(iface, 600));
339 i2c_wr16(iface, S6_I2C_FSLCNT, nanoseconds_on_clk(iface, 1300));
340 i2c_wr16(iface, S6_I2C_RXTL, 0);
341 i2c_wr16(iface, S6_I2C_TXTL, 0);
342
343 platform_set_drvdata(dev, iface);
344 if (bus_num < 0)
345 rc = i2c_add_adapter(p_adap);
346 else
347 rc = i2c_add_numbered_adapter(p_adap);
348 if (rc)
349 goto err_irq_free;
350 return 0;
351
352err_irq_free:
353 free_irq(iface->irq, iface);
354err_clk_dis:
355 clk_disable(iface->clk);
356err_clk_put:
357 clk_put(iface->clk);
358err_map:
359 iounmap(iface->reg);
360err_reg:
361 release_mem_region(iface->res->start,
362 resource_size(iface->res));
363err_out:
364 return rc;
365}
366
367static int __devexit s6i2c_remove(struct platform_device *pdev)
368{
369 struct s6i2c_if *iface = platform_get_drvdata(pdev);
370 i2c_wr16(iface, S6_I2C_ENABLE, 0);
371 platform_set_drvdata(pdev, NULL);
372 i2c_del_adapter(&iface->adap);
373 free_irq(iface->irq, iface);
374 clk_disable(iface->clk);
375 clk_put(iface->clk);
376 iounmap(iface->reg);
377 release_mem_region(iface->res->start,
378 resource_size(iface->res));
379 return 0;
380}
381
382static struct platform_driver s6i2c_driver = {
383 .probe = s6i2c_probe,
384 .remove = __devexit_p(s6i2c_remove),
385 .driver = {
386 .name = DRV_NAME,
387 .owner = THIS_MODULE,
388 },
389};
390
391static int __init s6i2c_init(void)
392{
393 pr_info("I2C: S6000 I2C driver\n");
394 return platform_driver_register(&s6i2c_driver);
395}
396
397static void __exit s6i2c_exit(void)
398{
399 platform_driver_unregister(&s6i2c_driver);
400}
401
402MODULE_DESCRIPTION("I2C-Bus adapter routines for S6000 I2C");
403MODULE_LICENSE("GPL");
404MODULE_ALIAS("platform:" DRV_NAME);
405
406subsys_initcall(s6i2c_init);
407module_exit(s6i2c_exit);
diff --git a/drivers/i2c/busses/i2c-s6000.h b/drivers/i2c/busses/i2c-s6000.h
new file mode 100644
index 000000000000..ff23b81ded44
--- /dev/null
+++ b/drivers/i2c/busses/i2c-s6000.h
@@ -0,0 +1,79 @@
1/*
2 * drivers/i2c/busses/i2c-s6000.h
3 *
4 * This file is subject to the terms and conditions of the GNU General Public
5 * License. See the file "COPYING" in the main directory of this archive
6 * for more details.
7 *
8 * Copyright (C) 2008 Emlix GmbH <info@emlix.com>
9 * Author: Oskar Schirmer <os@emlix.com>
10 */
11
12#ifndef __DRIVERS_I2C_BUSSES_I2C_S6000_H
13#define __DRIVERS_I2C_BUSSES_I2C_S6000_H
14
15#define S6_I2C_CON 0x000
16#define S6_I2C_CON_MASTER 0
17#define S6_I2C_CON_SPEED 1
18#define S6_I2C_CON_SPEED_NORMAL 1
19#define S6_I2C_CON_SPEED_FAST 2
20#define S6_I2C_CON_SPEED_MASK 3
21#define S6_I2C_CON_10BITSLAVE 3
22#define S6_I2C_CON_10BITMASTER 4
23#define S6_I2C_CON_RESTARTENA 5
24#define S6_I2C_CON_SLAVEDISABLE 6
25#define S6_I2C_TAR 0x004
26#define S6_I2C_TAR_GCORSTART 10
27#define S6_I2C_TAR_SPECIAL 11
28#define S6_I2C_SAR 0x008
29#define S6_I2C_HSMADDR 0x00C
30#define S6_I2C_DATACMD 0x010
31#define S6_I2C_DATACMD_READ 8
32#define S6_I2C_SSHCNT 0x014
33#define S6_I2C_SSLCNT 0x018
34#define S6_I2C_FSHCNT 0x01C
35#define S6_I2C_FSLCNT 0x020
36#define S6_I2C_INTRSTAT 0x02C
37#define S6_I2C_INTRMASK 0x030
38#define S6_I2C_RAWINTR 0x034
39#define S6_I2C_INTR_RXUNDER 0
40#define S6_I2C_INTR_RXOVER 1
41#define S6_I2C_INTR_RXFULL 2
42#define S6_I2C_INTR_TXOVER 3
43#define S6_I2C_INTR_TXEMPTY 4
44#define S6_I2C_INTR_RDREQ 5
45#define S6_I2C_INTR_TXABRT 6
46#define S6_I2C_INTR_RXDONE 7
47#define S6_I2C_INTR_ACTIVITY 8
48#define S6_I2C_INTR_STOPDET 9
49#define S6_I2C_INTR_STARTDET 10
50#define S6_I2C_INTR_GENCALL 11
51#define S6_I2C_RXTL 0x038
52#define S6_I2C_TXTL 0x03C
53#define S6_I2C_CLRINTR 0x040
54#define S6_I2C_CLRRXUNDER 0x044
55#define S6_I2C_CLRRXOVER 0x048
56#define S6_I2C_CLRTXOVER 0x04C
57#define S6_I2C_CLRRDREQ 0x050
58#define S6_I2C_CLRTXABRT 0x054
59#define S6_I2C_CLRRXDONE 0x058
60#define S6_I2C_CLRACTIVITY 0x05C
61#define S6_I2C_CLRSTOPDET 0x060
62#define S6_I2C_CLRSTARTDET 0x064
63#define S6_I2C_CLRGENCALL 0x068
64#define S6_I2C_ENABLE 0x06C
65#define S6_I2C_STATUS 0x070
66#define S6_I2C_STATUS_ACTIVITY 0
67#define S6_I2C_STATUS_TFNF 1
68#define S6_I2C_STATUS_TFE 2
69#define S6_I2C_STATUS_RFNE 3
70#define S6_I2C_STATUS_RFF 4
71#define S6_I2C_TXFLR 0x074
72#define S6_I2C_RXFLR 0x078
73#define S6_I2C_SRESET 0x07C
74#define S6_I2C_SRESET_IC_SRST 0
75#define S6_I2C_SRESET_IC_MASTER_SRST 1
76#define S6_I2C_SRESET_IC_SLAVE_SRST 2
77#define S6_I2C_TXABRTSOURCE 0x080
78
79#endif