diff options
author | Matt Carlson <mcarlson@broadcom.com> | 2009-11-02 09:31:11 -0500 |
---|---|---|
committer | David S. Miller <davem@davemloft.net> | 2009-11-03 02:39:12 -0500 |
commit | cdd4e09d692bd4f3457b3789279005e112b7696d (patch) | |
tree | 25a7619a2cd9dc2ab787fd768bda96c8f507243d /drivers | |
parent | 63a14ce449dd6d647de2725809159eb072b2c44f (diff) |
tg3 / broadcom: Refine AC131 APD support
Auto power-down (APD) support is a power-saving feature. It should be
selectively enabled since it might expose MAC bugs. This patch changes
the code to enable APD only if the PHY_BRCM_AUTO_PWRDWN_ENABLE flag is
set. The tg3 driver was changed to set this bit.
Signed-off-by: Matt Carlson <mcarlson@broadcom.com>
Reviewed-by: Michael Chan <mchan@broadcom.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
Diffstat (limited to 'drivers')
-rw-r--r-- | drivers/net/phy/broadcom.c | 8 | ||||
-rw-r--r-- | drivers/net/tg3.c | 1 |
2 files changed, 6 insertions, 3 deletions
diff --git a/drivers/net/phy/broadcom.c b/drivers/net/phy/broadcom.c index 5d2a2e90aba8..bddf4a42ae68 100644 --- a/drivers/net/phy/broadcom.c +++ b/drivers/net/phy/broadcom.c | |||
@@ -561,9 +561,11 @@ static int brcm_fet_config_init(struct phy_device *phydev) | |||
561 | if (err < 0) | 561 | if (err < 0) |
562 | goto done; | 562 | goto done; |
563 | 563 | ||
564 | /* Enable auto power down */ | 564 | if (phydev->dev_flags & PHY_BRCM_AUTO_PWRDWN_ENABLE) { |
565 | err = brcm_phy_setbits(phydev, MII_BRCM_FET_SHDW_AUXSTAT2, | 565 | /* Enable auto power down */ |
566 | MII_BRCM_FET_SHDW_AS2_APDE); | 566 | err = brcm_phy_setbits(phydev, MII_BRCM_FET_SHDW_AUXSTAT2, |
567 | MII_BRCM_FET_SHDW_AS2_APDE); | ||
568 | } | ||
567 | 569 | ||
568 | done: | 570 | done: |
569 | /* Disable shadow register access */ | 571 | /* Disable shadow register access */ |
diff --git a/drivers/net/tg3.c b/drivers/net/tg3.c index e7128f6ae2d8..592b5bf09e40 100644 --- a/drivers/net/tg3.c +++ b/drivers/net/tg3.c | |||
@@ -1114,6 +1114,7 @@ static int tg3_mdio_init(struct tg3 *tp) | |||
1114 | case TG3_PHY_ID_RTL8201E: | 1114 | case TG3_PHY_ID_RTL8201E: |
1115 | case TG3_PHY_ID_BCMAC131: | 1115 | case TG3_PHY_ID_BCMAC131: |
1116 | phydev->interface = PHY_INTERFACE_MODE_MII; | 1116 | phydev->interface = PHY_INTERFACE_MODE_MII; |
1117 | phydev->dev_flags |= PHY_BRCM_AUTO_PWRDWN_ENABLE; | ||
1117 | tp->tg3_flags3 |= TG3_FLG3_PHY_IS_FET; | 1118 | tp->tg3_flags3 |= TG3_FLG3_PHY_IS_FET; |
1118 | break; | 1119 | break; |
1119 | } | 1120 | } |